From b1ae9a5e492b06b49bc85b28b71b6cf198428c15 Mon Sep 17 00:00:00 2001
From: Ayzen <ayzen>
Date: Mon, 9 Feb 2026 10:28:20 +0300
Subject: [PATCH] added AD9833 and DS1809 support

---
 AD7686.pdf                  |   Bin 0 -> 512225 bytes
 DS1809.pdf                  |   Bin 0 -> 139178 bytes
 For_stm32.ioc               |    38 +-
 Inc/main.h                  |    28 +-
 Src/main.c                  |   482 +-
 Src/stm32f7xx_hal_msp.c     |    75 +-
 Src/stm32f7xx_it.c          |    26 +
 ad9833.pdf                  |   Bin 0 -> 476260 bytes
 build/File_Handling.lst     |   262 +-
 build/For_stm32.bin         |   Bin 46932 -> 48356 bytes
 build/For_stm32.elf         |   Bin 749540 -> 757124 bytes
 build/For_stm32.hex         |  5331 ++---
 build/For_stm32.map         |  2210 +-
 build/diskio.lst            |    52 +-
 build/fatfs.lst             |    34 +-
 build/ff.lst                |  1070 +-
 build/ff_gen_drv.lst        |    48 +-
 build/main.lst              | 42277 ++++++++++++++++++----------------
 build/main.o                |   Bin 162152 -> 175860 bytes
 build/sd_diskio.lst         |    66 +-
 build/stm32f7xx_hal_msp.lst |  2167 +-
 build/stm32f7xx_hal_msp.o   |   Bin 32180 -> 32612 bytes
 build/stm32f7xx_it.lst      |  3455 +--
 build/stm32f7xx_it.o        |   Bin 28476 -> 28808 bytes
 build/syscall.lst           |     4 +-
 25 files changed, 30112 insertions(+), 27513 deletions(-)
 create mode 100644 AD7686.pdf
 create mode 100644 DS1809.pdf
 create mode 100644 ad9833.pdf

diff --git a/AD7686.pdf b/AD7686.pdf
new file mode 100644
index 0000000000000000000000000000000000000000..9f6ae5a42bf3a6b32f236e3d933ed32ed4c48829
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diff --git a/DS1809.pdf b/DS1809.pdf
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DeREib

literal 0
HcmV?d00001

diff --git a/For_stm32.ioc b/For_stm32.ioc
index 3f16004..e5cc3ee 100644
--- a/For_stm32.ioc
+++ b/For_stm32.ioc
@@ -89,7 +89,7 @@ Mcu.Pin0=PF3
 Mcu.Pin1=PF4
 Mcu.Pin10=PC0
 Mcu.Pin11=PC1
-Mcu.Pin12=PC2
+Mcu.Pin12=PC7
 Mcu.Pin13=PC3
 Mcu.Pin14=PA0/WKUP
 Mcu.Pin15=PA1
@@ -166,8 +166,12 @@ Mcu.Pin79=VP_TIM8_VS_ClockSourceINT
 Mcu.Pin8=PH0/OSC_IN
 Mcu.Pin80=VP_TIM10_VS_ClockSourceINT
 Mcu.Pin81=VP_TIM11_VS_ClockSourceINT
+Mcu.Pin82=PD12
+Mcu.Pin83=PD13
+Mcu.Pin84=PE2
+Mcu.Pin85=PE3
 Mcu.Pin9=PH1/OSC_OUT
-Mcu.PinsNb=82
+Mcu.PinsNb=86
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F767ZITx
@@ -250,7 +254,7 @@ PB11.GPIO_Label=TEC1_PD
 PB11.Locked=true
 PB11.Signal=GPIO_Output
 PB12.GPIOParameters=PinState,GPIO_Label
-PB12.GPIO_Label=DAC_TEC1_CS
+PB12.GPIO_Label=AD9102_CS
 PB12.Locked=true
 PB12.PinState=GPIO_PIN_SET
 PB12.Signal=GPIO_Output
@@ -296,10 +300,10 @@ PC11.Mode=SD_4_bits_Wide_bus
 PC11.Signal=SDMMC1_D3
 PC12.Mode=SD_4_bits_Wide_bus
 PC12.Signal=SDMMC1_CK
-PC2.GPIOParameters=GPIO_Label
-PC2.GPIO_Label=EN_5V2
-PC2.Locked=true
-PC2.Signal=GPIO_Output
+PC7.GPIOParameters=GPIO_Label
+PC7.GPIO_Label=EN_5V2
+PC7.Locked=true
+PC7.Signal=GPIO_Output
 PC3.GPIOParameters=GPIO_Speed,GPIO_Label
 PC3.GPIO_Label=EN_5V1
 PC3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
@@ -325,6 +329,16 @@ PD1.GPIOParameters=GPIO_Label
 PD1.GPIO_Label=TEST_01
 PD1.Locked=true
 PD1.Signal=GPIO_Output
+PD12.GPIOParameters=PinState,GPIO_Label
+PD12.GPIO_Label=DAC_TEC1_CS
+PD12.Locked=true
+PD12.PinState=GPIO_PIN_SET
+PD12.Signal=GPIO_Output
+PD13.GPIOParameters=PinState,GPIO_Label
+PD13.GPIO_Label=AD9833_CS
+PD13.Locked=true
+PD13.PinState=GPIO_PIN_SET
+PD13.Signal=GPIO_Output
 PD2.Mode=SD_4_bits_Wide_bus
 PD2.Signal=SDMMC1_CMD
 PD7.Locked=true
@@ -339,6 +353,16 @@ PE0.Signal=UART8_RX
 PE1.Locked=true
 PE1.Mode=Asynchronous
 PE1.Signal=UART8_TX
+PE2.GPIOParameters=PinState,GPIO_Label
+PE2.GPIO_Label=DS1809_UC
+PE2.Locked=true
+PE2.PinState=GPIO_PIN_SET
+PE2.Signal=GPIO_Output
+PE3.GPIOParameters=PinState,GPIO_Label
+PE3.GPIO_Label=DS1809_DC
+PE3.Locked=true
+PE3.PinState=GPIO_PIN_SET
+PE3.Signal=GPIO_Output
 PE10.GPIOParameters=GPIO_Label
 PE10.GPIO_Label=ADC_MPD1_CS
 PE10.Locked=true
diff --git a/Inc/main.h b/Inc/main.h
index 35c119a..cce46c1 100644
--- a/Inc/main.h
+++ b/Inc/main.h
@@ -83,8 +83,8 @@ void Set_LTEC(uint8_t, uint16_t);
 #define SPI5_CNV_GPIO_Port GPIOF
 #define ADC_ThrLD2_CS_Pin GPIO_PIN_10
 #define ADC_ThrLD2_CS_GPIO_Port GPIOF
-#define EN_5V2_Pin GPIO_PIN_2
-#define EN_5V2_GPIO_Port GPIOC
+#define EN_5V2_Pin GPIO_PIN_7
+#define EN_5V2_GPIO_Port GPIOC
 #define EN_5V1_Pin GPIO_PIN_3
 #define EN_5V1_GPIO_Port GPIOC
 #define AD9102_RESET_Pin GPIO_PIN_6
@@ -122,11 +122,21 @@ void Set_LTEC(uint8_t, uint16_t);
 #define TEC1_PD_Pin GPIO_PIN_11
 #define TEC1_PD_GPIO_Port GPIOB
 #define DAC_TEC1_CS_Pin GPIO_PIN_12
-#define DAC_TEC1_CS_GPIO_Port GPIOB
+#define DAC_TEC1_CS_GPIO_Port GPIOD
 #define DAC_LD1_CS_Pin GPIO_PIN_14
 #define DAC_LD1_CS_GPIO_Port GPIOB
 #define LD1_EN_Pin GPIO_PIN_8
 #define LD1_EN_GPIO_Port GPIOD
+#define AD9102_CS_Pin GPIO_PIN_12
+#define AD9102_CS_GPIO_Port GPIOB
+#define AD9833_CS_Pin GPIO_PIN_13
+#define AD9833_CS_GPIO_Port GPIOD
+#define AD9833_MCLK_Pin GPIO_PIN_9
+#define AD9833_MCLK_GPIO_Port GPIOE
+#define DS1809_UC_Pin GPIO_PIN_2
+#define DS1809_UC_GPIO_Port GPIOE
+#define DS1809_DC_Pin GPIO_PIN_3
+#define DS1809_DC_GPIO_Port GPIOE
 #define AD9102_TRIG_Pin GPIO_PIN_11
 #define AD9102_TRIG_GPIO_Port GPIOD
 #define USB_FLAG_Pin GPIO_PIN_8
@@ -178,6 +188,8 @@ void Set_LTEC(uint8_t, uint16_t);
   #define DECODE_TASK 8
   #define RUN_TASK 9
   #define AD9102_CMD 10
+  #define AD9833_CMD 11
+  #define DS1809_CMD 12
 	
 	#define SD_ERR 0x01	
 	#define UART_ERR 0x02
@@ -197,12 +209,16 @@ void Set_LTEC(uint8_t, uint16_t);
   #define AD9102_CMD_HEADER 0x8888
   #define AD9102_CMD_8 10          // total bytes including header
   #define AD9102_CMD_WORDS 4       // data words (flags, freq LSW, freq MSW, checksum)
+  #define AD9833_CMD_HEADER 0x9999
+  #define AD9833_CMD_8 10          // total bytes including header
+  #define AD9833_CMD_WORDS 4       // data words (flags, freq LSW, freq MSW, checksum)
+  #define DS1809_CMD_HEADER 0xAAAA
+  #define DS1809_CMD_8 10           // total bytes including header
+  #define DS1809_CMD_WORDS 4        // data words (flags, count, pulse_ms, checksum)
 
   #define AD9102_ON_SPI2 1
 
-  // AD9102 CS (chip select). Adjust to your wiring.
-  #define AD9102_CS_GPIO_Port DAC_TEC1_CS_GPIO_Port
-  #define AD9102_CS_Pin DAC_TEC1_CS_Pin
+  // AD9102 CS (chip select) uses AD9102_CS_* pin definitions above.
 	
 	typedef struct{
 	
diff --git a/Src/main.c b/Src/main.c
index c3af010..9d8cf61 100644
--- a/Src/main.c
+++ b/Src/main.c
@@ -80,6 +80,7 @@
 #define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u
 #define AD9102_SRAM_START_DLY_DEFAULT 0x0000u
 #define AD9102_SRAM_HOLD_DEFAULT 0x1u
+#define AD9102_SRAM_AMP_DEFAULT 8191u
 #define AD9102_SRAM_SAMPLES_DEFAULT 16u
 #define AD9102_SRAM_MAX_SAMPLES 4096u
 #define AD9102_SRAM_RAMP_MIN   (-8192)
@@ -95,6 +96,13 @@
 #define AD9102_FLAG_ENABLE   0x0001u
 #define AD9102_FLAG_TRIANGLE 0x0002u
 #define AD9102_FLAG_SRAM     0x0004u
+#define AD9102_FLAG_SRAM_FMT 0x0008u
+
+#define AD9833_FLAG_ENABLE   0x0001u
+#define AD9833_FLAG_TRIANGLE 0x0002u
+#define DS1809_FLAG_UC       0x0001u
+#define DS1809_FLAG_DC       0x0002u
+#define DS1809_PULSE_MS_DEFAULT 2u
 /* USER CODE END PD */
 
 /* Private macro -------------------------------------------------------------*/
@@ -108,10 +116,11 @@ ADC_HandleTypeDef hadc3;
 
 SD_HandleTypeDef hsd1;
 
-TIM_HandleTypeDef htim4;
-TIM_HandleTypeDef htim8;
-TIM_HandleTypeDef htim10;
-TIM_HandleTypeDef htim11;
+TIM_HandleTypeDef htim4;
+TIM_HandleTypeDef htim8;
+TIM_HandleTypeDef htim1;
+TIM_HandleTypeDef htim10;
+TIM_HandleTypeDef htim11;
 
 UART_HandleTypeDef huart8;
 
@@ -188,11 +197,12 @@ static void MX_USART1_UART_Init(void);
 static void MX_SDMMC1_SD_Init(void);
 static void MX_TIM7_Init(void);
 static void MX_TIM6_Init(void);
-static void MX_TIM10_Init(void);
-static void MX_UART8_Init(void);
-static void MX_TIM8_Init(void);
-static void MX_TIM11_Init(void);
-static void MX_TIM4_Init(void);
+static void MX_TIM10_Init(void);
+static void MX_UART8_Init(void);
+static void MX_TIM8_Init(void);
+static void MX_TIM11_Init(void);
+static void MX_TIM4_Init(void);
+static void MX_TIM1_Init(void);
 /* USER CODE BEGIN PFP */
 static void Init_params(void);
 static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup);
@@ -206,10 +216,14 @@ static void AD9102_WriteReg(uint16_t addr, uint16_t value);
 static uint16_t AD9102_ReadReg(uint16_t addr);
 static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
 static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
-static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle);
-static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle);
+static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude);
+static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude);
 static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
 static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold);
+static void SPI2_SetMode(uint32_t polarity, uint32_t phase);
+static void AD9833_WriteWord(uint16_t word);
+static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word);
+static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms);
 uint8_t CheckChecksum(uint16_t *pbuff);
 uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
 //int SD_Init(void);
@@ -273,11 +287,12 @@ int main(void)
   MX_TIM6_Init();
   MX_TIM10_Init();
   MX_UART8_Init();
-  MX_TIM8_Init();
-  MX_TIM11_Init();
-  MX_TIM4_Init();
-  /* USER CODE BEGIN 2 */
-	Init_params();
+  MX_TIM8_Init();
+  MX_TIM11_Init();
+  MX_TIM4_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+	Init_params();
 	//HAL_TIM_Base_Start(&htim11);
 	//HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
 
@@ -293,10 +308,14 @@ int main(void)
 	TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
 
 
-	//Mach-Zander clock (should be 1/4 of ADC clock freq)
-
-	TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1;
-	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+	//Mach-Zander clock (should be 1/4 of ADC clock freq)
+
+	TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1;
+	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+
+	// AD9833 MCLK output on PE9 (TIM1_CH1)
+	// TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output
+	HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
 
 	/*
   if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){
@@ -468,7 +487,7 @@ int main(void)
 						CPU_state_old = WORK_ENABLE;//Save main current cycle
 						}
 					break;
-				case AD9102_CMD://10 - Configure AD9102 sawtooth output
+				case AD9102_CMD://10 - Configure AD9102 sawtooth output
 					if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
 					{
 						uint16_t flags = COMMAND[0];
@@ -480,9 +499,25 @@ int main(void)
 
 						if (sram_mode)
 						{
-							uint16_t samples = param0;
-							uint8_t hold = (uint8_t)(param1 & 0x0Fu);
-							uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle);
+							uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u;
+							uint16_t samples;
+							uint8_t hold;
+							uint16_t amplitude;
+
+							if (sram_fmt)
+							{
+								amplitude = param0;
+								samples = param1;
+								hold = AD9102_SRAM_HOLD_DEFAULT;
+							}
+							else
+							{
+								samples = param0;
+								hold = (uint8_t)(param1 & 0x0Fu);
+								amplitude = AD9102_SRAM_AMP_DEFAULT;
+							}
+
+							uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude);
 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
 							if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
 							{
@@ -530,9 +565,70 @@ int main(void)
 					{
 						State_Data[0] |= UART_DECODE_ERR;
 					}
-					UART_transmission_request = MESS_01;
-					CPU_state = CPU_state_old;
-				break;
+					UART_transmission_request = MESS_01;
+					CPU_state = CPU_state_old;
+				break;
+				case AD9833_CMD://11 - Configure AD9833 triangle output
+					State_Data[1] = 0u;
+					if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
+					{
+						uint16_t flags = COMMAND[0];
+						uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
+						uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
+						uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
+						uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u;
+						uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
+
+						AD9833_Apply(enable, triangle, freq_word);
+					}
+					else
+					{
+						State_Data[0] |= UART_DECODE_ERR;
+					}
+					UART_transmission_request = MESS_01;
+					CPU_state = CPU_state_old;
+				break;
+				case DS1809_CMD://12 - Pulse DS1809 UC/DC controls
+					if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1])
+					{
+						uint16_t flags = COMMAND[0];
+						uint16_t count = COMMAND[1];
+						uint16_t pulse_ms = COMMAND[2];
+						uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
+						uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u;
+
+						if (uc && dc)
+						{
+							State_Data[0] |= UART_DECODE_ERR;
+						}
+						else
+						{
+							if (count == 0u)
+							{
+								count = 1u;
+							}
+							if (count > 64u)
+							{
+								count = 64u;
+							}
+							if (pulse_ms == 0u)
+							{
+								pulse_ms = DS1809_PULSE_MS_DEFAULT;
+							}
+							if (pulse_ms > 500u)
+							{
+								pulse_ms = 500u;
+							}
+							DS1809_Pulse(uc, dc, count, pulse_ms);
+						}
+					}
+					else
+					{
+						State_Data[0] |= UART_DECODE_ERR;
+					}
+					UART_transmission_request = MESS_01;
+					CPU_state = CPU_state_old;
+				break;
 				case DECODE_TASK:
 					if (CheckChecksum(COMMAND))
 					{
@@ -1703,7 +1799,7 @@ static void MX_TIM10_Init(void)
   * @param None
   * @retval None
   */
-static void MX_TIM11_Init(void)
+static void MX_TIM11_Init(void)
 {
 
   /* USER CODE BEGIN TIM11_Init 0 */
@@ -1740,9 +1836,78 @@ static void MX_TIM11_Init(void)
   /* USER CODE BEGIN TIM11_Init 2 */
 
   /* USER CODE END TIM11_Init 2 */
-  HAL_TIM_MspPostInit(&htim11);
-
-}
+  HAL_TIM_MspPostInit(&htim11);
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 8;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = 4;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+  sBreakDeadTimeConfig.DeadTime = 0;
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+  sBreakDeadTimeConfig.BreakFilter = 0;
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+  sBreakDeadTimeConfig.Break2Filter = 0;
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+  HAL_TIM_MspPostInit(&htim1);
+
+}
 
 /**
   * @brief UART8 Initialization Function
@@ -1924,22 +2089,25 @@ static void MX_GPIO_Init(void)
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
 
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET);
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
 
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
-                          |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
+                          |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+  HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
 
   /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
-  HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+  HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+  HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
@@ -1987,12 +2155,19 @@ static void MX_GPIO_Init(void)
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 
-  /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */
-  GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+  /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */
+  GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */
+  GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 
   /*Configure GPIO pin : SPI4_CNV_Pin */
   GPIO_InitStruct.Pin = SPI4_CNV_Pin;
@@ -2001,21 +2176,21 @@ static void MX_GPIO_Init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
   HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
 
-  /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin
-                           OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
-  GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin
-                          |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */
-  GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+  /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin
+                           OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
+  GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin
+                          |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin */
+  GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 
   /*Configure GPIO pin : USB_FLAG_Pin */
   GPIO_InitStruct.Pin = USB_FLAG_Pin;
@@ -2448,24 +2623,114 @@ void OUT_trigger(uint8_t out_n)
 	}
 }
 
-static void AD9102_Init(void)
-{
-	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
+static void AD9102_Init(void)
+{
+	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
 	for (volatile uint32_t d = 0; d < 1000; d++) {}
 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
 
 	AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-	HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-}
-
+	HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+}
+
+static void SPI2_SetMode(uint32_t polarity, uint32_t phase)
+{
+	if (LL_SPI_IsEnabled(SPI2))
+	{
+		LL_SPI_Disable(SPI2);
+	}
+	LL_SPI_SetClockPolarity(SPI2, polarity);
+	LL_SPI_SetClockPhase(SPI2, phase);
+	if (!LL_SPI_IsEnabled(SPI2))
+	{
+		LL_SPI_Enable(SPI2);
+	}
+}
+
+static void AD9833_WriteWord(uint16_t word)
+{
+	uint32_t tmp32 = 0;
+
+	SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE);
+
+	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+
+	HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET);
+
+	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+	LL_SPI_TransmitData16(SPI2, word);
+	tmp32 = 0;
+	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+	(void) SPI2->DR;
+
+	HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
+}
+
+static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word)
+{
+	uint16_t control = 0x2000u; // B28 = 1
+	if (triangle)
+	{
+		control |= 0x0002u; // MODE = 1 (triangle)
+	}
+	control |= 0x0100u; // RESET = 1 while updating
+
+	freq_word &= 0x0FFFFFFFu;
+	uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB
+	uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
+
+	AD9833_WriteWord(control);
+	AD9833_WriteWord(lsw);
+	AD9833_WriteWord(msw);
+	AD9833_WriteWord(0xC000u); // PHASE0 = 0
+
+	if (enable)
+	{
+		control &= (uint16_t)(~0x0100u);
+	}
+	AD9833_WriteWord(control);
+}
+
+static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms)
+{
+	for (uint16_t i = 0; i < count; i++)
+	{
+		if (uc)
+		{
+			HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET);
+		}
+		if (dc)
+		{
+			HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET);
+		}
+		HAL_Delay(pulse_ms);
+		if (uc)
+		{
+			HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET);
+		}
+		if (dc)
+		{
+			HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET);
+		}
+		HAL_Delay(pulse_ms);
+	}
+}
+
 static void AD9102_WriteReg(uint16_t addr, uint16_t value)
 {
 	uint32_t tmp32 = 0;
 	uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
 
+	SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
+
+	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+
 	if (!LL_SPI_IsEnabled(SPI2))
 	{
 		LL_SPI_Enable(SPI2);
@@ -2495,6 +2760,11 @@ static uint16_t AD9102_ReadReg(uint16_t addr)
 	uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
 	uint16_t value;
 
+	SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
+
+	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+
 	if (!LL_SPI_IsEnabled(SPI2))
 	{
 		LL_SPI_Enable(SPI2);
@@ -2571,7 +2841,7 @@ static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step,
 	return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
 }
 
-static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
+static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude)
 {
 	if (samples < 2u)
 	{
@@ -2581,6 +2851,10 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
 	{
 		samples = AD9102_SRAM_MAX_SAMPLES;
 	}
+	if (amplitude > AD9102_SRAM_AMP_DEFAULT)
+	{
+		amplitude = AD9102_SRAM_AMP_DEFAULT;
+	}
 
 	// Enable SRAM access.
 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u);
@@ -2588,6 +2862,9 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
 	for (uint16_t i = 0; i < samples; i++)
 	{
 		int32_t value;
+		int32_t min_val = -(int32_t)amplitude;
+		int32_t max_val = (int32_t)amplitude;
+		int32_t span = max_val - min_val;
 		if (triangle)
 		{
 			uint16_t half = samples / 2u;
@@ -2598,22 +2875,40 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
 			if (i < half)
 			{
 				uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u;
-				value = AD9102_SRAM_RAMP_MIN +
-				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
+				if (span == 0)
+				{
+					value = 0;
+				}
+				else
+				{
+					value = min_val + (span * (int32_t)i) / (int32_t)denom;
+				}
 			}
 			else
 			{
 				uint16_t tail = (uint16_t)(samples - half);
 				uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
-				value = AD9102_SRAM_RAMP_MAX -
-				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom;
+				if (span == 0)
+				{
+					value = 0;
+				}
+				else
+				{
+					value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom;
+				}
 			}
 		}
 		else
 		{
 			uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u;
-			value = AD9102_SRAM_RAMP_MIN +
-			        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
+			if (span == 0)
+			{
+				value = 0;
+			}
+			else
+			{
+				value = min_val + (span * (int32_t)i) / (int32_t)denom;
+			}
 		}
 
 		if (value < -8192)
@@ -2634,7 +2929,7 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
 }
 
-static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle)
+static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude)
 {
 	if (samples == 0u)
 	{
@@ -2657,6 +2952,11 @@ static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold,
 		hold = 0x0Fu;
 	}
 
+	if (amplitude > AD9102_SRAM_AMP_DEFAULT)
+	{
+		amplitude = AD9102_SRAM_AMP_DEFAULT;
+	}
+
 	uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
 	                                   (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
@@ -2683,7 +2983,7 @@ static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold,
 	AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
 
-	AD9102_LoadSramRamp(samples, triangle);
+	AD9102_LoadSramRamp(samples, triangle, amplitude);
 
 	if (enable)
 	{
@@ -2880,20 +3180,18 @@ static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, ui
 	return (ok ? 0u : 1u);
 }
 
-void Set_LTEC(uint8_t num, uint16_t DATA)
-{
-	uint32_t tmp32;
-
-#if AD9102_ON_SPI2
-	// AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts.
-	if (num == 1 || num == 3)
-	{
-		return;
-	}
-#endif
-
-	switch (num)
-	{
+void Set_LTEC(uint8_t num, uint16_t DATA)
+{
+	uint32_t tmp32;
+
+	if (num == 1 || num == 3)
+	{
+		SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE);
+		HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+	}
+
+	switch (num)
+	{
 		case 1:
 			HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1
 			//tmp32=0;
diff --git a/Src/stm32f7xx_hal_msp.c b/Src/stm32f7xx_hal_msp.c
index 57ccd69..27ce150 100644
--- a/Src/stm32f7xx_hal_msp.c
+++ b/Src/stm32f7xx_hal_msp.c
@@ -332,8 +332,8 @@ void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
   */
 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
 {
-  if(htim_base->Instance==TIM4)
-  {
+  if(htim_base->Instance==TIM4)
+  {
     /* USER CODE BEGIN TIM4_MspInit 0 */
 
     /* USER CODE END TIM4_MspInit 0 */
@@ -341,10 +341,21 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
     __HAL_RCC_TIM4_CLK_ENABLE();
     /* USER CODE BEGIN TIM4_MspInit 1 */
 
-    /* USER CODE END TIM4_MspInit 1 */
-  }
-  else if(htim_base->Instance==TIM8)
-  {
+    /* USER CODE END TIM4_MspInit 1 */
+  }
+  else if(htim_base->Instance==TIM1)
+  {
+    /* USER CODE BEGIN TIM1_MspInit 0 */
+
+    /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+    /* USER CODE BEGIN TIM1_MspInit 1 */
+
+    /* USER CODE END TIM1_MspInit 1 */
+  }
+  else if(htim_base->Instance==TIM8)
+  {
     /* USER CODE BEGIN TIM8_MspInit 0 */
 
     /* USER CODE END TIM8_MspInit 0 */
@@ -391,8 +402,8 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
 void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
 {
   GPIO_InitTypeDef GPIO_InitStruct = {0};
-  if(htim->Instance==TIM4)
-  {
+  if(htim->Instance==TIM4)
+  {
     /* USER CODE BEGIN TIM4_MspPostInit 0 */
 
     /* USER CODE END TIM4_MspPostInit 0 */
@@ -409,10 +420,31 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
 
     /* USER CODE BEGIN TIM4_MspPostInit 1 */
 
-    /* USER CODE END TIM4_MspPostInit 1 */
-  }
-  else if(htim->Instance==TIM11)
-  {
+    /* USER CODE END TIM4_MspPostInit 1 */
+  }
+  else if(htim->Instance==TIM1)
+  {
+    /* USER CODE BEGIN TIM1_MspPostInit 0 */
+
+    /* USER CODE END TIM1_MspPostInit 0 */
+
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PE9     ------> TIM1_CH1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN TIM1_MspPostInit 1 */
+
+    /* USER CODE END TIM1_MspPostInit 1 */
+  }
+  else if(htim->Instance==TIM11)
+  {
     /* USER CODE BEGIN TIM11_MspPostInit 0 */
 
     /* USER CODE END TIM11_MspPostInit 0 */
@@ -451,10 +483,21 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
     __HAL_RCC_TIM4_CLK_DISABLE();
     /* USER CODE BEGIN TIM4_MspDeInit 1 */
 
-    /* USER CODE END TIM4_MspDeInit 1 */
-  }
-  else if(htim_base->Instance==TIM8)
-  {
+    /* USER CODE END TIM4_MspDeInit 1 */
+  }
+  else if(htim_base->Instance==TIM1)
+  {
+    /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+    /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+    /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+    /* USER CODE END TIM1_MspDeInit 1 */
+  }
+  else if(htim_base->Instance==TIM8)
+  {
     /* USER CODE BEGIN TIM8_MspDeInit 0 */
 
     /* USER CODE END TIM8_MspDeInit 0 */
diff --git a/Src/stm32f7xx_it.c b/Src/stm32f7xx_it.c
index 265c0bd..3a7b5fc 100644
--- a/Src/stm32f7xx_it.c
+++ b/Src/stm32f7xx_it.c
@@ -481,6 +481,12 @@ void UART_RxCpltCallback(void)
         case AD9102_CMD_HEADER: // AD9102 command
             UART_rec_incr = 2;//timeout flag is still setting!
         break;
+        case AD9833_CMD_HEADER: // AD9833 command
+            UART_rec_incr = 2;//timeout flag is still setting!
+        break;
+        case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command
+            UART_rec_incr = 2;//timeout flag is still setting!
+        break;
         default: //error decoding header
             UART_rec_incr = 0;
             flg_tmt = 0;//Reset the timeout flag
@@ -503,6 +509,26 @@ void UART_RxCpltCallback(void)
             UART_rec_incr = 0;
             flg_tmt = 0;//Reset the timeout flag
         }
+        else if (UART_header == AD9833_CMD_HEADER)
+        {
+            if ((UART_rec_incr & 0x0001) > 0)
+                COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+            else
+                COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
+            CPU_state = AD9833_CMD;
+            UART_rec_incr = 0;
+            flg_tmt = 0;//Reset the timeout flag
+        }
+        else if (UART_header == DS1809_CMD_HEADER)
+        {
+            if ((UART_rec_incr & 0x0001) > 0)
+                COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+            else
+                COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
+            CPU_state = DS1809_CMD;
+            UART_rec_incr = 0;
+            flg_tmt = 0;//Reset the timeout flag
+        }
         else
         {
             if ((UART_rec_incr&0x0001)>0)
diff --git a/ad9833.pdf b/ad9833.pdf
new file mode 100644
index 0000000000000000000000000000000000000000..075f8cdcf73306224a142173c29bbb60707171e4
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zU|6zN+C$C*#!N9DKGBKA_`Wt=S3*RkQIeLWnW-=4M4mfWE-t1r9u<U2M@64tlvr)!
z>H5gcu|1#H#d^nHf4J5TU^HP~WNAy9VpC%o;pSyKl%xO^vTQQfX@h0U4UckH0Dac%
zjS1BW5tJG>ftrb9?1d(Ude)fA!paO(IqEAa{zPk2o~HO+^}AFO1J>7TWdpEeULwhn
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zrXuAqRR5rz%Q3@IPDxA!XPeUrNIXfzNt|G()85iZ(b85sQ&rKLEA>|M)DO;EDu~Ne
z&vVvBC?savl=f?JX^7_ke#foop8b4;b3^omMu0^CE|8`FMZaaHu|5hNhE7Kp{bm9L
z;7c)S=P2bEn8|2pjq32}ROlTyQyWKQQI%G~i*#&N3}jy_d8N9Ap5;cRMZH&vQmGh{
zGAb_#bVzadxMwf=j$R6+w(mcu?4vs``O3IO;Wh-@?u~V;0Q3z{8D-NLnjLBV>xYR{
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z5xBu#MbI5GZ#8HA$2qwTJX9X|ZBJkIg*R8V9?HPGva)=|pjuZ&&sra5pk)ByD<JWc
z;a$cE%*;%qb55<d-35~baZ(=&woE;lVVx12R^gu18`3jw@g7k56=khs3o(V)L|4Bu
zf3=jk)`}`{@mMNY>~*tqOmqC<qTndJcG5oGnY=%{CbDk2Tt2tj$how&sJ}6@&$>*#
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z5~a5$*LxsTDPyTTky2z!HNpBt^dSpP*E?aF$SBeX2h5+=6SE0kOS4AP&t?|7+{He{
z>vpnkG+r399`;qG&Y7;HZk6uouHEodjC&X;I%BQgk+Tl;P~@Qv#Tvy8MKm)vb1+L4
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zxukPc8r5igR_`_8cXpV%0y%aGMy}4&`}BBBUWx78bb7B5?1W;X(a##hJpItMF^y#h
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zB%p2l0i)DW7vUkG{lYWb{&&GqPqoLyAYlB)`lNofeZ3<zrX~uA?5?-*`q+5?c*u>u
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zT)#{aknw%%Jx>{<H$|S_@j|@2_kEzqy=Q>I;OuA*GFm#kR|fO4&|M~h9%A9PbF2Az
zhkZ?H)qPzRpcpwCq?54WbI7kvB^Ha4rYbDG&rFVis0p3f{t;np!8#_jUl<aYPBvl8
zFyDT%dkSTWwp0cSe_2cPDXE&A_on{}T~99&P;XG5j09#!hgfk9#Y(|y?@6Z9UJ#f<
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zDoK-Yw#=(s1m`lCoYwK1VUM#tliCW`YhCnw(RKZ$O?i^hLUgmSp+__VLsdm=k^S6_
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Y&Ik(t5kG_<EXWHWVqt;7WdKC~2Uu&J#sB~S

literal 0
HcmV?d00001

diff --git a/build/File_Handling.lst b/build/File_Handling.lst
index fcd1175..0e4e51f 100644
--- a/build/File_Handling.lst
+++ b/build/File_Handling.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/cczIN1cV.s 			page 1
+ARM GAS  /tmp/cc6OCjXR.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
   28:Src/File_Handling.c **** 
   29:Src/File_Handling.c **** 
   30:Src/File_Handling.c **** void Send_Uart (char *string)
-ARM GAS  /tmp/cczIN1cV.s 			page 2
+ARM GAS  /tmp/cc6OCjXR.s 			page 2
 
 
   31:Src/File_Handling.c **** {
@@ -118,7 +118,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
   75 0012 0120     		movs	r0, #1
   76              	.L2:
   41:Src/File_Handling.c **** 	else return 0;
-ARM GAS  /tmp/cczIN1cV.s 			page 3
+ARM GAS  /tmp/cc6OCjXR.s 			page 3
 
 
   42:Src/File_Handling.c **** }
@@ -178,7 +178,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
   48:Src/File_Handling.c **** 	return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n");
  126              		.loc 1 48 9 view .LVU21
  127 0012 0120     		movs	r0, #1
-ARM GAS  /tmp/cczIN1cV.s 			page 4
+ARM GAS  /tmp/cc6OCjXR.s 			page 4
 
 
  128              	.L8:
@@ -238,7 +238,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  171              	.LCFI2:
  172              		.cfi_def_cfa_offset 16
  173              		.cfi_offset 4, -16
-ARM GAS  /tmp/cczIN1cV.s 			page 5
+ARM GAS  /tmp/cc6OCjXR.s 			page 5
 
 
  174              		.cfi_offset 5, -12
@@ -298,7 +298,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
   69:Src/File_Handling.c ****             	char *buf = malloc(30*sizeof(char));
   70:Src/File_Handling.c ****             	sprintf (buf, "Dir: %s\r\n", fno.fname);
   71:Src/File_Handling.c ****             	Send_Uart(buf);
-ARM GAS  /tmp/cczIN1cV.s 			page 6
+ARM GAS  /tmp/cc6OCjXR.s 			page 6
 
 
   72:Src/File_Handling.c ****             	free(buf);
@@ -358,7 +358,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  247              		.loc 1 65 46 discriminator 1 view .LVU49
  248 004c 1D4B     		ldr	r3, .L21+12
  249 004e 5B7A     		ldrb	r3, [r3, #9]	@ zero_extendqisi2
-ARM GAS  /tmp/cczIN1cV.s 			page 7
+ARM GAS  /tmp/cc6OCjXR.s 			page 7
 
 
   65:Src/File_Handling.c ****             if (fno.fattrib & AM_DIR)     /* It is a directory */
@@ -418,7 +418,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  290 0082 FFF7FEFF 		bl	strlen
  291              	.LVL24:
  292 0086 0546     		mov	r5, r0
-ARM GAS  /tmp/cczIN1cV.s 			page 8
+ARM GAS  /tmp/cc6OCjXR.s 			page 8
 
 
  293              	.LVL25:
@@ -478,7 +478,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  331              		.loc 1 91 1 is_stmt 0 view .LVU76
  332 00b0 014B     		ldr	r3, .L21
  333 00b2 1878     		ldrb	r0, [r3]	@ zero_extendqisi2
-ARM GAS  /tmp/cczIN1cV.s 			page 9
+ARM GAS  /tmp/cc6OCjXR.s 			page 9
 
 
  334 00b4 0CB0     		add	sp, sp, #48
@@ -538,7 +538,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  384              	.LVL33:
  385 000a 0446     		mov	r4, r0
  386              	.LVL34:
-ARM GAS  /tmp/cczIN1cV.s 			page 10
+ARM GAS  /tmp/cc6OCjXR.s 			page 10
 
 
   98:Src/File_Handling.c ****     sprintf (path, "%s","/");
@@ -598,7 +598,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  420 002e 6846     		mov	r0, sp
  421 0030 FFF7FEFF 		bl	f_readdir
  422              	.LVL38:
-ARM GAS  /tmp/cczIN1cV.s 			page 11
+ARM GAS  /tmp/cc6OCjXR.s 			page 11
 
 
  105:Src/File_Handling.c ****             if (fresult != FR_OK || fno.fname[0] == 0) break;  /* Break on error or end of dir */
@@ -658,7 +658,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  461              	.L26:
  116:Src/File_Handling.c ****             }
  117:Src/File_Handling.c ****         }
-ARM GAS  /tmp/cczIN1cV.s 			page 12
+ARM GAS  /tmp/cc6OCjXR.s 			page 12
 
 
  118:Src/File_Handling.c ****         f_closedir(&dir);
@@ -718,7 +718,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  507              		.loc 1 128 1 is_stmt 0 view .LVU117
  508 0000 70B5     		push	{r4, r5, r6, lr}
  509              	.LCFI8:
-ARM GAS  /tmp/cczIN1cV.s 			page 13
+ARM GAS  /tmp/cc6OCjXR.s 			page 13
 
 
  510              		.cfi_def_cfa_offset 16
@@ -778,7 +778,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  153:Src/File_Handling.c **** 
  154:Src/File_Handling.c **** 	    else
  155:Src/File_Handling.c **** 	    {
-ARM GAS  /tmp/cczIN1cV.s 			page 14
+ARM GAS  /tmp/cc6OCjXR.s 			page 14
 
 
  156:Src/File_Handling.c **** 	    	fresult = f_write(&fil, data, strlen(data), &bw);
@@ -838,7 +838,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  150:Src/File_Handling.c **** 	        return fresult;
  559              		.loc 1 150 10 view .LVU136
  151:Src/File_Handling.c **** 	    }
-ARM GAS  /tmp/cczIN1cV.s 			page 15
+ARM GAS  /tmp/cc6OCjXR.s 			page 15
 
 
  560              		.loc 1 151 10 view .LVU137
@@ -898,7 +898,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  182:Src/File_Handling.c **** 	}
  598              		.loc 1 182 13 is_stmt 0 view .LVU154
  599 004a C0B2     		uxtb	r0, r0
-ARM GAS  /tmp/cczIN1cV.s 			page 16
+ARM GAS  /tmp/cc6OCjXR.s 			page 16
 
 
  600 004c E2E7     		b	.L34
@@ -958,7 +958,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  649              		.loc 1 191 5 is_stmt 0 view .LVU162
  650 0012 08B1     		cbz	r0, .L40
  651              	.LBB6:
-ARM GAS  /tmp/cczIN1cV.s 			page 17
+ARM GAS  /tmp/cc6OCjXR.s 			page 17
 
 
  192:Src/File_Handling.c **** 	{
@@ -1018,7 +1018,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  237:Src/File_Handling.c **** 	    		//Send_Uart(buf);
  238:Src/File_Handling.c **** 	    		free(buf);
  239:Src/File_Handling.c **** 	    	}
-ARM GAS  /tmp/cczIN1cV.s 			page 18
+ARM GAS  /tmp/cc6OCjXR.s 			page 18
 
 
  240:Src/File_Handling.c **** 	    }
@@ -1078,7 +1078,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  215:Src/File_Handling.c **** 	    	if (fresult != FR_OK)
  699              		.loc 1 215 15 discriminator 1 view .LVU181
  700 003c 2070     		strb	r0, [r4]
-ARM GAS  /tmp/cczIN1cV.s 			page 19
+ARM GAS  /tmp/cc6OCjXR.s 			page 19
 
 
  216:Src/File_Handling.c **** 	    	{
@@ -1138,7 +1138,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  737 004c 4552524F 		.ascii	"ERROR!!! No. %d in reading file *%s*\012\012\000"
  737      52212121 
  737      204E6F2E 
-ARM GAS  /tmp/cczIN1cV.s 			page 20
+ARM GAS  /tmp/cc6OCjXR.s 			page 20
 
 
  737      20256420 
@@ -1198,7 +1198,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  777 000e B8B9     		cbnz	r0, .L54
  778              	.LBB8:
  250:Src/File_Handling.c **** 	{
-ARM GAS  /tmp/cczIN1cV.s 			page 21
+ARM GAS  /tmp/cc6OCjXR.s 			page 21
 
 
  251:Src/File_Handling.c **** 		char *buf = malloc(100*sizeof(char));
@@ -1258,7 +1258,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  814 003a 2B4B     		ldr	r3, .L55+4
  815 003c 1878     		ldrb	r0, [r3]	@ zero_extendqisi2
  816 003e 0CE0     		b	.L48
-ARM GAS  /tmp/cczIN1cV.s 			page 22
+ARM GAS  /tmp/cc6OCjXR.s 			page 22
 
 
  817              	.LVL70:
@@ -1318,7 +1318,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  285:Src/File_Handling.c **** 
  286:Src/File_Handling.c **** 		else
  287:Src/File_Handling.c **** 		{
-ARM GAS  /tmp/cczIN1cV.s 			page 23
+ARM GAS  /tmp/cc6OCjXR.s 			page 23
 
 
  288:Src/File_Handling.c **** 			Send_Uart(buffer);
@@ -1378,7 +1378,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  277:Src/File_Handling.c **** 		{
  873              		.loc 1 277 3 is_stmt 1 view .LVU228
  277:Src/File_Handling.c **** 		{
-ARM GAS  /tmp/cczIN1cV.s 			page 24
+ARM GAS  /tmp/cc6OCjXR.s 			page 24
 
 
  874              		.loc 1 277 6 is_stmt 0 view .LVU229
@@ -1438,7 +1438,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  916 00a0 FFF7FEFF 		bl	free
  917              	.LVL88:
  292:Src/File_Handling.c **** 			if (fresult != FR_OK)
-ARM GAS  /tmp/cczIN1cV.s 			page 25
+ARM GAS  /tmp/cc6OCjXR.s 			page 25
 
 
  918              		.loc 1 292 4 view .LVU242
@@ -1498,7 +1498,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  961              	.LVL97:
  303:Src/File_Handling.c **** 				Send_Uart(buf);
  962              		.loc 1 303 5 is_stmt 1 view .LVU254
-ARM GAS  /tmp/cczIN1cV.s 			page 26
+ARM GAS  /tmp/cc6OCjXR.s 			page 26
 
 
  963 00d4 2246     		mov	r2, r4
@@ -1558,7 +1558,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1010              	.LCFI11:
  1011              		.cfi_def_cfa_offset 24
  1012              		.cfi_offset 4, -24
-ARM GAS  /tmp/cczIN1cV.s 			page 27
+ARM GAS  /tmp/cc6OCjXR.s 			page 27
 
 
  1013              		.cfi_offset 5, -20
@@ -1618,7 +1618,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  332:Src/File_Handling.c **** 			char *buf = malloc(100*sizeof(char));
  333:Src/File_Handling.c **** 			sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
  334:Src/File_Handling.c **** 		    //Send_Uart(buf);
-ARM GAS  /tmp/cczIN1cV.s 			page 28
+ARM GAS  /tmp/cc6OCjXR.s 			page 28
 
 
  335:Src/File_Handling.c **** 		    free(buf);
@@ -1678,7 +1678,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1086              	.LBE15:
  1087              	.LBB16:
  318:Src/File_Handling.c **** 		sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
-ARM GAS  /tmp/cczIN1cV.s 			page 29
+ARM GAS  /tmp/cc6OCjXR.s 			page 29
 
 
  1088              		.loc 1 318 3 is_stmt 1 view .LVU282
@@ -1738,7 +1738,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  376:Src/File_Handling.c **** 			
  377:Src/File_Handling.c **** 			/* Close file */
  378:Src/File_Handling.c **** 			fresult = f_close(&fil);
-ARM GAS  /tmp/cczIN1cV.s 			page 30
+ARM GAS  /tmp/cc6OCjXR.s 			page 30
 
 
  379:Src/File_Handling.c **** 			if (fresult != FR_OK)
@@ -1798,7 +1798,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1141              		.loc 1 336 14 view .LVU296
  1142              	.LBE17:
  353:Src/File_Handling.c **** 		if (fresult != FR_OK)
-ARM GAS  /tmp/cczIN1cV.s 			page 31
+ARM GAS  /tmp/cc6OCjXR.s 			page 31
 
 
  1143              		.loc 1 353 3 is_stmt 1 view .LVU297
@@ -1858,7 +1858,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1180 00b6 BA70     		strb	r2, [r7, #2]
  374:Src/File_Handling.c **** 			}
  1181              		.loc 1 374 5 is_stmt 1 view .LVU315
-ARM GAS  /tmp/cczIN1cV.s 			page 32
+ARM GAS  /tmp/cc6OCjXR.s 			page 32
 
 
  374:Src/File_Handling.c **** 			}
@@ -1918,7 +1918,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1222              		.loc 1 394 13 is_stmt 0 view .LVU329
  1223 00e2 0F4B     		ldr	r3, .L70+4
  1224 00e4 1878     		ldrb	r0, [r3]	@ zero_extendqisi2
-ARM GAS  /tmp/cczIN1cV.s 			page 33
+ARM GAS  /tmp/cc6OCjXR.s 			page 33
 
 
  1225 00e6 C2E7     		b	.L59
@@ -1978,7 +1978,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1271 011c 00000000 		.word	fno
  1272 0120 00000000 		.word	fresult
  1273 0124 00000000 		.word	fil
-ARM GAS  /tmp/cczIN1cV.s 			page 34
+ARM GAS  /tmp/cc6OCjXR.s 			page 34
 
 
  1274 0128 00000000 		.word	.LC10
@@ -2038,7 +2038,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1320              		.loc 1 406 3 view .LVU346
  407:Src/File_Handling.c **** 	    return fresult;
  1321              		.loc 1 407 6 view .LVU347
-ARM GAS  /tmp/cczIN1cV.s 			page 35
+ARM GAS  /tmp/cc6OCjXR.s 			page 35
 
 
  1322              		.loc 1 407 13 is_stmt 0 view .LVU348
@@ -2098,7 +2098,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1336              	.LVL141:
  411:Src/File_Handling.c **** 		if (fresult != FR_OK)
  1337              		.loc 1 411 11 discriminator 1 view .LVU352
-ARM GAS  /tmp/cczIN1cV.s 			page 36
+ARM GAS  /tmp/cc6OCjXR.s 			page 36
 
 
  1338 001e 074B     		ldr	r3, .L77+4
@@ -2158,7 +2158,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1376              	.LFE1195:
  1378              		.section	.text.Update_File,"ax",%progbits
  1379              		.align	1
-ARM GAS  /tmp/cczIN1cV.s 			page 37
+ARM GAS  /tmp/cc6OCjXR.s 			page 37
 
 
  1380              		.global	Update_File
@@ -2218,7 +2218,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1423              		.loc 1 457 13 view .LVU381
  1424              	.LBE23:
  458:Src/File_Handling.c **** 	}
-ARM GAS  /tmp/cczIN1cV.s 			page 38
+ARM GAS  /tmp/cc6OCjXR.s 			page 38
 
 
  459:Src/File_Handling.c **** 
@@ -2278,7 +2278,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1428              	.L80:
  463:Src/File_Handling.c **** 	    if (fresult != FR_OK)
  1429              		.loc 1 463 6 is_stmt 1 view .LVU383
-ARM GAS  /tmp/cczIN1cV.s 			page 39
+ARM GAS  /tmp/cc6OCjXR.s 			page 39
 
 
  463:Src/File_Handling.c **** 	    if (fresult != FR_OK)
@@ -2338,7 +2338,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  485:Src/File_Handling.c **** 	    	//sprintf (buf, "*%s* UPDATED successfully\n", name);
  1470              		.loc 1 485 7 view .LVU398
  488:Src/File_Handling.c **** 	    }
-ARM GAS  /tmp/cczIN1cV.s 			page 40
+ARM GAS  /tmp/cc6OCjXR.s 			page 40
 
 
  1471              		.loc 1 488 7 view .LVU399
@@ -2398,7 +2398,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1506              		.section	.text.Remove_File,"ax",%progbits
  1507              		.align	1
  1508              		.global	Remove_File
-ARM GAS  /tmp/cczIN1cV.s 			page 41
+ARM GAS  /tmp/cc6OCjXR.s 			page 41
 
 
  1509              		.syntax unified
@@ -2458,7 +2458,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1547 0018 164B     		ldr	r3, .L93+4
  1548 001a 1870     		strb	r0, [r3]
  527:Src/File_Handling.c **** 		if (fresult == FR_OK)
-ARM GAS  /tmp/cczIN1cV.s 			page 42
+ARM GAS  /tmp/cc6OCjXR.s 			page 42
 
 
  1549              		.loc 1 527 3 is_stmt 1 view .LVU418
@@ -2518,7 +2518,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1584              		.loc 1 517 15 is_stmt 0 view .LVU430
  1585 003a 6420     		movs	r0, #100
  1586 003c FFF7FEFF 		bl	malloc
-ARM GAS  /tmp/cczIN1cV.s 			page 43
+ARM GAS  /tmp/cc6OCjXR.s 			page 43
 
 
  1587              	.LVL161:
@@ -2578,7 +2578,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1630              		.align	2
  1631              	.L93:
  1632 0070 00000000 		.word	fno
-ARM GAS  /tmp/cczIN1cV.s 			page 44
+ARM GAS  /tmp/cc6OCjXR.s 			page 44
 
 
  1633 0074 00000000 		.word	fresult
@@ -2638,7 +2638,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1677 000a 1870     		strb	r0, [r3]
  549:Src/File_Handling.c ****     if (fresult == FR_OK)
  1678              		.loc 1 549 5 is_stmt 1 view .LVU447
-ARM GAS  /tmp/cczIN1cV.s 			page 45
+ARM GAS  /tmp/cc6OCjXR.s 			page 45
 
 
  1679              		.loc 1 549 8 is_stmt 0 view .LVU448
@@ -2698,7 +2698,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1716              	.LVL177:
  1717 0032 0646     		mov	r6, r0
  1718              	.LVL178:
-ARM GAS  /tmp/cczIN1cV.s 			page 46
+ARM GAS  /tmp/cc6OCjXR.s 			page 46
 
 
  559:Src/File_Handling.c ****     	Send_Uart(buf);
@@ -2758,7 +2758,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1761              		.cfi_startproc
  1762              		@ args = 0, pretend = 0, frame = 0
  1763              		@ frame_needed = 0, uses_anonymous_args = 0
-ARM GAS  /tmp/cczIN1cV.s 			page 47
+ARM GAS  /tmp/cc6OCjXR.s 			page 47
 
 
  1764 0000 F8B5     		push	{r3, r4, r5, r6, r7, lr}
@@ -2818,7 +2818,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1813              	.LVL183:
  573:Src/File_Handling.c ****     sprintf (buf, "SD CARD Total Size: \t%lu\n",total);
  1814              		.loc 1 573 5 is_stmt 1 view .LVU475
-ARM GAS  /tmp/cczIN1cV.s 			page 48
+ARM GAS  /tmp/cc6OCjXR.s 			page 48
 
 
  1815 0046 2246     		mov	r2, r4
@@ -2878,7 +2878,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1861              		.cfi_restore 80
  1862              		.cfi_restore 81
  1863              		.cfi_def_cfa_offset 24
-ARM GAS  /tmp/cczIN1cV.s 			page 49
+ARM GAS  /tmp/cc6OCjXR.s 			page 49
 
 
  1864 0092 F8BD     		pop	{r3, r4, r5, r6, r7, pc}
@@ -2938,7 +2938,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1915 000e 104B     		ldr	r3, .L110+4
  1916 0010 1870     		strb	r0, [r3]
  587:Src/File_Handling.c **** 	if (fresult != FR_OK)
-ARM GAS  /tmp/cczIN1cV.s 			page 50
+ARM GAS  /tmp/cc6OCjXR.s 			page 50
 
 
  1917              		.loc 1 587 2 is_stmt 1 view .LVU497
@@ -2998,7 +2998,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  629:Src/File_Handling.c **** 	    if (fresult != FR_OK)
  630:Src/File_Handling.c **** 	    {
  631:Src/File_Handling.c **** 	    	char *buf = malloc(100*sizeof(char));
-ARM GAS  /tmp/cczIN1cV.s 			page 51
+ARM GAS  /tmp/cc6OCjXR.s 			page 51
 
 
  632:Src/File_Handling.c **** 	    	//sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
@@ -3058,7 +3058,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  1959 002e 0A4B     		ldr	r3, .L110+12
  1960 0030 3246     		mov	r2, r6
  1961 0032 2946     		mov	r1, r5
-ARM GAS  /tmp/cczIN1cV.s 			page 52
+ARM GAS  /tmp/cc6OCjXR.s 			page 52
 
 
  1962 0034 3846     		mov	r0, r7
@@ -3118,7 +3118,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  2005              	.LVL200:
  2006              	.LFB1201:
  646:Src/File_Handling.c **** 
-ARM GAS  /tmp/cczIN1cV.s 			page 53
+ARM GAS  /tmp/cc6OCjXR.s 			page 53
 
 
  647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize)
@@ -3178,7 +3178,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  661:Src/File_Handling.c **** 	{
  662:Src/File_Handling.c **** 		 /* Create a file with read write access and open it */
  663:Src/File_Handling.c **** 	    fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
-ARM GAS  /tmp/cczIN1cV.s 			page 54
+ARM GAS  /tmp/cc6OCjXR.s 			page 54
 
 
  664:Src/File_Handling.c **** 	    if (fresult != FR_OK)
@@ -3238,7 +3238,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  2053 0018 3222     		movs	r2, #50
  2054 001a 2146     		mov	r1, r4
  2055 001c 0D48     		ldr	r0, .L117+8
-ARM GAS  /tmp/cczIN1cV.s 			page 55
+ARM GAS  /tmp/cc6OCjXR.s 			page 55
 
 
  2056 001e FFF7FEFF 		bl	f_open
@@ -3298,7 +3298,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  2094              	.LVL208:
  692:Src/File_Handling.c **** 	    if (fresult != FR_OK)
  2095              		.loc 1 692 14 discriminator 1 view .LVU561
-ARM GAS  /tmp/cczIN1cV.s 			page 56
+ARM GAS  /tmp/cc6OCjXR.s 			page 56
 
 
  2096 0044 2070     		strb	r0, [r4]
@@ -3358,7 +3358,7 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  2158              		.align	2
  2161              	fno:
  2162 0000 00000000 		.space	24
-ARM GAS  /tmp/cczIN1cV.s 			page 57
+ARM GAS  /tmp/cc6OCjXR.s 			page 57
 
 
  2162      00000000 
@@ -3396,86 +3396,86 @@ ARM GAS  /tmp/cczIN1cV.s 			page 1
  2187              		.file 10 "/usr/include/newlib/stdio.h"
  2188              		.file 11 "/usr/include/newlib/stdlib.h"
  2189              		.file 12 "<built-in>"
-ARM GAS  /tmp/cczIN1cV.s 			page 58
+ARM GAS  /tmp/cc6OCjXR.s 			page 58
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 File_Handling.c
-     /tmp/cczIN1cV.s:20     .text.Send_Uart:00000000 $t
-     /tmp/cczIN1cV.s:26     .text.Send_Uart:00000000 Send_Uart
-     /tmp/cczIN1cV.s:40     .text.Mount_SD:00000000 $t
-     /tmp/cczIN1cV.s:46     .text.Mount_SD:00000000 Mount_SD
-     /tmp/cczIN1cV.s:86     .text.Mount_SD:0000001c $d
-     /tmp/cczIN1cV.s:2175   .bss.fs:00000000 fs
-     /tmp/cczIN1cV.s:92     .text.Unmount_SD:00000000 $t
-     /tmp/cczIN1cV.s:98     .text.Unmount_SD:00000000 Unmount_SD
-     /tmp/cczIN1cV.s:138    .text.Unmount_SD:0000001c $d
-     /tmp/cczIN1cV.s:143    .rodata.Scan_SD.str1.4:00000000 $d
-     /tmp/cczIN1cV.s:156    .text.Scan_SD:00000000 $t
-     /tmp/cczIN1cV.s:162    .text.Scan_SD:00000000 Scan_SD
-     /tmp/cczIN1cV.s:344    .text.Scan_SD:000000b8 $d
-     /tmp/cczIN1cV.s:2161   .bss.fno:00000000 fno
-     /tmp/cczIN1cV.s:355    .rodata.Format_SD.str1.4:00000000 $d
-     /tmp/cczIN1cV.s:359    .text.Format_SD:00000000 $t
-     /tmp/cczIN1cV.s:365    .text.Format_SD:00000000 Format_SD
-     /tmp/cczIN1cV.s:485    .text.Format_SD:00000078 $d
-     /tmp/cczIN1cV.s:494    .text.Write_File:00000000 $t
-     /tmp/cczIN1cV.s:500    .text.Write_File:00000000 Write_File
-     /tmp/cczIN1cV.s:604    .text.Write_File:00000050 $d
-     /tmp/cczIN1cV.s:2168   .bss.fil:00000000 fil
-     /tmp/cczIN1cV.s:2147   .bss.bw:00000000 bw
-     /tmp/cczIN1cV.s:612    .text.Write_File_byte:00000000 $t
-     /tmp/cczIN1cV.s:618    .text.Write_File_byte:00000000 Write_File_byte
-     /tmp/cczIN1cV.s:721    .text.Write_File_byte:0000004c $d
-     /tmp/cczIN1cV.s:729    .rodata.Read_File.str1.4:00000000 $d
-     /tmp/cczIN1cV.s:745    .text.Read_File:00000000 $t
-     /tmp/cczIN1cV.s:751    .text.Read_File:00000000 Read_File
-     /tmp/cczIN1cV.s:976    .text.Read_File:000000e4 $d
-     /tmp/cczIN1cV.s:2154   .bss.br:00000000 br
-     /tmp/cczIN1cV.s:991    .rodata.Seek_Read_File.str1.4:00000000 $d
-     /tmp/cczIN1cV.s:995    .text.Seek_Read_File:00000000 $t
-     /tmp/cczIN1cV.s:1001   .text.Seek_Read_File:00000000 Seek_Read_File
-     /tmp/cczIN1cV.s:1271   .text.Seek_Read_File:0000011c $d
-     /tmp/cczIN1cV.s:1287   .text.Create_File:00000000 $t
-     /tmp/cczIN1cV.s:1293   .text.Create_File:00000000 Create_File
-     /tmp/cczIN1cV.s:1372   .text.Create_File:00000038 $d
-     /tmp/cczIN1cV.s:1379   .text.Update_File:00000000 $t
-     /tmp/cczIN1cV.s:1385   .text.Update_File:00000000 Update_File
-     /tmp/cczIN1cV.s:1489   .text.Update_File:00000050 $d
-     /tmp/cczIN1cV.s:1497   .rodata.Remove_File.str1.4:00000000 $d
-     /tmp/cczIN1cV.s:1507   .text.Remove_File:00000000 $t
-     /tmp/cczIN1cV.s:1513   .text.Remove_File:00000000 Remove_File
-     /tmp/cczIN1cV.s:1632   .text.Remove_File:00000070 $d
-     /tmp/cczIN1cV.s:1642   .rodata.Create_Dir.str1.4:00000000 $d
-     /tmp/cczIN1cV.s:1649   .text.Create_Dir:00000000 $t
-     /tmp/cczIN1cV.s:1655   .text.Create_Dir:00000000 Create_Dir
-     /tmp/cczIN1cV.s:1734   .text.Create_Dir:00000048 $d
-     /tmp/cczIN1cV.s:1742   .rodata.Check_SD_Space.str1.4:00000000 $d
-     /tmp/cczIN1cV.s:1752   .text.Check_SD_Space:00000000 $t
-     /tmp/cczIN1cV.s:1758   .text.Check_SD_Space:00000000 Check_SD_Space
-     /tmp/cczIN1cV.s:1870   .text.Check_SD_Space:00000094 $d
-     /tmp/cczIN1cV.s:2140   .bss.pfs:00000000 pfs
-     /tmp/cczIN1cV.s:2133   .bss.fre_clust:00000000 fre_clust
-ARM GAS  /tmp/cczIN1cV.s 			page 59
+     /tmp/cc6OCjXR.s:20     .text.Send_Uart:00000000 $t
+     /tmp/cc6OCjXR.s:26     .text.Send_Uart:00000000 Send_Uart
+     /tmp/cc6OCjXR.s:40     .text.Mount_SD:00000000 $t
+     /tmp/cc6OCjXR.s:46     .text.Mount_SD:00000000 Mount_SD
+     /tmp/cc6OCjXR.s:86     .text.Mount_SD:0000001c $d
+     /tmp/cc6OCjXR.s:2175   .bss.fs:00000000 fs
+     /tmp/cc6OCjXR.s:92     .text.Unmount_SD:00000000 $t
+     /tmp/cc6OCjXR.s:98     .text.Unmount_SD:00000000 Unmount_SD
+     /tmp/cc6OCjXR.s:138    .text.Unmount_SD:0000001c $d
+     /tmp/cc6OCjXR.s:143    .rodata.Scan_SD.str1.4:00000000 $d
+     /tmp/cc6OCjXR.s:156    .text.Scan_SD:00000000 $t
+     /tmp/cc6OCjXR.s:162    .text.Scan_SD:00000000 Scan_SD
+     /tmp/cc6OCjXR.s:344    .text.Scan_SD:000000b8 $d
+     /tmp/cc6OCjXR.s:2161   .bss.fno:00000000 fno
+     /tmp/cc6OCjXR.s:355    .rodata.Format_SD.str1.4:00000000 $d
+     /tmp/cc6OCjXR.s:359    .text.Format_SD:00000000 $t
+     /tmp/cc6OCjXR.s:365    .text.Format_SD:00000000 Format_SD
+     /tmp/cc6OCjXR.s:485    .text.Format_SD:00000078 $d
+     /tmp/cc6OCjXR.s:494    .text.Write_File:00000000 $t
+     /tmp/cc6OCjXR.s:500    .text.Write_File:00000000 Write_File
+     /tmp/cc6OCjXR.s:604    .text.Write_File:00000050 $d
+     /tmp/cc6OCjXR.s:2168   .bss.fil:00000000 fil
+     /tmp/cc6OCjXR.s:2147   .bss.bw:00000000 bw
+     /tmp/cc6OCjXR.s:612    .text.Write_File_byte:00000000 $t
+     /tmp/cc6OCjXR.s:618    .text.Write_File_byte:00000000 Write_File_byte
+     /tmp/cc6OCjXR.s:721    .text.Write_File_byte:0000004c $d
+     /tmp/cc6OCjXR.s:729    .rodata.Read_File.str1.4:00000000 $d
+     /tmp/cc6OCjXR.s:745    .text.Read_File:00000000 $t
+     /tmp/cc6OCjXR.s:751    .text.Read_File:00000000 Read_File
+     /tmp/cc6OCjXR.s:976    .text.Read_File:000000e4 $d
+     /tmp/cc6OCjXR.s:2154   .bss.br:00000000 br
+     /tmp/cc6OCjXR.s:991    .rodata.Seek_Read_File.str1.4:00000000 $d
+     /tmp/cc6OCjXR.s:995    .text.Seek_Read_File:00000000 $t
+     /tmp/cc6OCjXR.s:1001   .text.Seek_Read_File:00000000 Seek_Read_File
+     /tmp/cc6OCjXR.s:1271   .text.Seek_Read_File:0000011c $d
+     /tmp/cc6OCjXR.s:1287   .text.Create_File:00000000 $t
+     /tmp/cc6OCjXR.s:1293   .text.Create_File:00000000 Create_File
+     /tmp/cc6OCjXR.s:1372   .text.Create_File:00000038 $d
+     /tmp/cc6OCjXR.s:1379   .text.Update_File:00000000 $t
+     /tmp/cc6OCjXR.s:1385   .text.Update_File:00000000 Update_File
+     /tmp/cc6OCjXR.s:1489   .text.Update_File:00000050 $d
+     /tmp/cc6OCjXR.s:1497   .rodata.Remove_File.str1.4:00000000 $d
+     /tmp/cc6OCjXR.s:1507   .text.Remove_File:00000000 $t
+     /tmp/cc6OCjXR.s:1513   .text.Remove_File:00000000 Remove_File
+     /tmp/cc6OCjXR.s:1632   .text.Remove_File:00000070 $d
+     /tmp/cc6OCjXR.s:1642   .rodata.Create_Dir.str1.4:00000000 $d
+     /tmp/cc6OCjXR.s:1649   .text.Create_Dir:00000000 $t
+     /tmp/cc6OCjXR.s:1655   .text.Create_Dir:00000000 Create_Dir
+     /tmp/cc6OCjXR.s:1734   .text.Create_Dir:00000048 $d
+     /tmp/cc6OCjXR.s:1742   .rodata.Check_SD_Space.str1.4:00000000 $d
+     /tmp/cc6OCjXR.s:1752   .text.Check_SD_Space:00000000 $t
+     /tmp/cc6OCjXR.s:1758   .text.Check_SD_Space:00000000 Check_SD_Space
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+     /tmp/cc6OCjXR.s:2140   .bss.pfs:00000000 pfs
+     /tmp/cc6OCjXR.s:2133   .bss.fre_clust:00000000 fre_clust
+ARM GAS  /tmp/cc6OCjXR.s 			page 59
 
 
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+     /tmp/cc6OCjXR.s:1998   .text.Update_File_byte:00000000 $t
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 f_mount
diff --git a/build/For_stm32.bin b/build/For_stm32.bin
index 62f9194cf41328e6991a24697a7962e8f9b86d09..1a774cf0bce61afeffdadaf8d1c98574ac3a79c6 100755
GIT binary patch
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diff --git a/build/For_stm32.elf b/build/For_stm32.elf
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diff --git a/build/For_stm32.hex b/build/For_stm32.hex
index 9f6ce8a..b49196b 100644
--- a/build/For_stm32.hex
+++ b/build/For_stm32.hex
@@ -1,45 +1,45 @@
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+:10B7400000224FF400112046FFF785FF0028E3D0C8
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+:10B770006FF07E4300932B4600224FF48001204659
+:10B78000FFF769FF0028CCD0226852E8003F23F47D
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+:10B7A00053E8003F23F00103083242E8003100294A
+:10B7B000F3D12023C4F88030002384F878300320AC
+:10B7C000B8E768B310B50446C36F03B32423E36737
+:10B7D0002268136823F001031360636AE3B920460B
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+:10B8000043F0010313602046FFF778FF10BD80F876
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+:10B84000F9D30A4A0A4C002301E013600432A242F1
+:10B85000FBD3F4F759FFF8F75DF9704700000820B3
+:10B86000000000205C00002088BC00085C00002074
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+:10B8E000696E206F70656E696E672066696C652091
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+:10BB80002D002E002F003000310032003300340031
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+:08BC7000F8F9FAFBFCFDFEFFF0
+:08BC7800984EFF7F010000005F
+:04BC8000690200084D
+:04BC84004102000871
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 :00000001FF
diff --git a/build/For_stm32.map b/build/For_stm32.map
index b5237bb..20702d4 100644
--- a/build/For_stm32.map
+++ b/build/For_stm32.map
@@ -148,7 +148,7 @@ Discarded input sections
  .text.HAL_SD_MspDeInit
                 0x00000000       0x3c build/stm32f7xx_hal_msp.o
  .text.HAL_TIM_Base_MspDeInit
-                0x00000000       0x78 build/stm32f7xx_hal_msp.o
+                0x00000000       0x90 build/stm32f7xx_hal_msp.o
  .text.HAL_UART_MspDeInit
                 0x00000000       0x2c build/stm32f7xx_hal_msp.o
  .text          0x00000000        0x0 build/stm32f7xx_hal_adc.o
@@ -1328,8 +1328,6 @@ Discarded input sections
                 0x00000000       0x76 build/stm32f7xx_hal_tim_ex.o
  .text.HAL_TIMEx_ConfigCommutEvent_DMA
                 0x00000000       0x94 build/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_ConfigBreakDeadTime
-                0x00000000       0x90 build/stm32f7xx_hal_tim_ex.o
  .text.HAL_TIMEx_ConfigBreakInput
                 0x00000000       0xa4 build/stm32f7xx_hal_tim_ex.o
  .text.HAL_TIMEx_RemapConfig
@@ -2080,7 +2078,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
                 0x08000000                g_pfnVectors
                 0x080001f8                        . = ALIGN (0x4)
 
-.text           0x08000200     0xb100
+.text           0x08000200     0xb690
                 0x08000200                        . = ALIGN (0x4)
  *(.text)
  .text          0x08000200       0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
@@ -2143,964 +2141,978 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
                 0x080014a0       0x48 build/main.o
  .text.Decode_task
                 0x080014e8      0x168 build/main.o
+ .text.SPI2_SetMode
+                0x08001650       0x44 build/main.o
  .text.PID_Controller_Temp
-                0x08001650       0xe4 build/main.o
+                0x08001694       0xe4 build/main.o
  .text.AD9102_WriteReg
-                0x08001734       0xb0 build/main.o
+                0x08001778       0xd4 build/main.o
  .text.AD9102_WriteRegTable
-                0x080017e4       0x28 build/main.o
+                0x0800184c       0x28 build/main.o
  .text.AD9102_LoadSramRamp
-                0x0800180c       0xc4 build/main.o
+                0x08001874       0xd8 build/main.o
  .text.AD9102_Init
-                0x080018d0       0x74 build/main.o
+                0x0800194c       0x74 build/main.o
  .text.AD9102_ReadReg
-                0x08001944       0xb0 build/main.o
+                0x080019c0       0xd4 build/main.o
  .text.AD9102_CheckFlagsSram
-                0x080019f4      0x112 build/main.o
+                0x08001a94      0x112 build/main.o
  .text.AD9102_CheckFlags
-                0x08001b06       0xd8 build/main.o
- *fill*         0x08001bde        0x2 
+                0x08001ba6       0xd8 build/main.o
+ *fill*         0x08001c7e        0x2 
  .text.AD9102_ApplySram
-                0x08001be0      0x134 build/main.o
+                0x08001c80      0x144 build/main.o
  .text.AD9102_Apply
-                0x08001d14       0xb8 build/main.o
+                0x08001dc4       0xb8 build/main.o
+ .text.AD9833_WriteWord
+                0x08001e7c       0x94 build/main.o
+ .text.AD9833_Apply
+                0x08001f10       0x4e build/main.o
+ *fill*         0x08001f5e        0x2 
  .text.OUT_trigger
-                0x08001dcc      0x124 build/main.o
- .text.MPhD_T   0x08001ef0      0x220 build/main.o
+                0x08001f60      0x124 build/main.o
+ .text.MPhD_T   0x08002084      0x220 build/main.o
  .text.Stop_TIM10
-                0x08002110       0x20 build/main.o
+                0x080022a4       0x20 build/main.o
  .text.MX_GPIO_Init
-                0x08002130      0x25c build/main.o
+                0x080022c4      0x294 build/main.o
  .text.MX_SPI4_Init
-                0x0800238c       0xd4 build/main.o
+                0x08002558       0xd4 build/main.o
  .text.MX_SPI2_Init
-                0x08002460       0xe8 build/main.o
+                0x0800262c       0xe8 build/main.o
  .text.MX_SPI5_Init
-                0x08002548       0xd0 build/main.o
+                0x08002714       0xd0 build/main.o
  .text.MX_SPI6_Init
-                0x08002618       0xd0 build/main.o
+                0x080027e4       0xd0 build/main.o
  .text.MX_TIM2_Init
-                0x080026e8       0x9c build/main.o
+                0x080028b4       0x9c build/main.o
  .text.MX_TIM5_Init
-                0x08002784       0x98 build/main.o
+                0x08002950       0x98 build/main.o
  .text.MX_TIM7_Init
-                0x0800281c       0x8c build/main.o
+                0x080029e8       0x8c build/main.o
  .text.MX_TIM6_Init
-                0x080028a8       0x8c build/main.o
+                0x08002a74       0x8c build/main.o
  .text.Init_params
-                0x08002934      0x310 build/main.o
- .text.Get_ADC  0x08002c44       0x70 build/main.o
+                0x08002b00      0x310 build/main.o
+ .text.DS1809_Pulse
+                0x08002e10       0x6c build/main.o
+ .text.Get_ADC  0x08002e7c       0x70 build/main.o
  .text.Set_LTEC
-                0x08002cb4      0x164 build/main.o
-                0x08002cb4                Set_LTEC
+                0x08002eec      0x178 build/main.o
+                0x08002eec                Set_LTEC
  .text.Decode_uart
-                0x08002e18      0x2f8 build/main.o
+                0x08003064      0x2f8 build/main.o
  .text.CalculateChecksum
-                0x08003110       0x18 build/main.o
-                0x08003110                CalculateChecksum
+                0x0800335c       0x18 build/main.o
+                0x0800335c                CalculateChecksum
  .text.CheckChecksum
-                0x08003128       0x48 build/main.o
-                0x08003128                CheckChecksum
- .text.SD_SAVE  0x08003170       0x3c build/main.o
-                0x08003170                SD_SAVE
- .text.SD_READ  0x080031ac       0x4c build/main.o
-                0x080031ac                SD_READ
+                0x08003374       0x48 build/main.o
+                0x08003374                CheckChecksum
+ .text.SD_SAVE  0x080033bc       0x3c build/main.o
+                0x080033bc                SD_SAVE
+ .text.SD_READ  0x080033f8       0x4c build/main.o
+                0x080033f8                SD_READ
  .text.SD_REMOVE
-                0x080031f8       0x40 build/main.o
-                0x080031f8                SD_REMOVE
+                0x08003444       0x40 build/main.o
+                0x08003444                SD_REMOVE
  .text.USART_TX
-                0x08003238       0x2c build/main.o
-                0x08003238                USART_TX
+                0x08003484       0x2c build/main.o
+                0x08003484                USART_TX
  .text.USART_TX_DMA
-                0x08003264       0x40 build/main.o
-                0x08003264                USART_TX_DMA
+                0x080034b0       0x40 build/main.o
+                0x080034b0                USART_TX_DMA
  .text.Error_Handler
-                0x080032a4        0x4 build/main.o
-                0x080032a4                Error_Handler
+                0x080034f0        0x4 build/main.o
+                0x080034f0                Error_Handler
  .text.MX_ADC1_Init
-                0x080032a8       0xc8 build/main.o
+                0x080034f4       0xc8 build/main.o
  .text.MX_ADC3_Init
-                0x08003370       0x6c build/main.o
+                0x080035bc       0x6c build/main.o
  .text.MX_USART1_UART_Init
-                0x080033dc      0x190 build/main.o
+                0x08003628      0x190 build/main.o
  .text.MX_TIM10_Init
-                0x0800356c       0x2c build/main.o
+                0x080037b8       0x2c build/main.o
  .text.MX_UART8_Init
-                0x08003598       0x38 build/main.o
+                0x080037e4       0x38 build/main.o
  .text.MX_TIM8_Init
-                0x080035d0       0x6c build/main.o
+                0x0800381c       0x6c build/main.o
  .text.MX_TIM11_Init
-                0x0800363c       0x70 build/main.o
+                0x08003888       0x70 build/main.o
  .text.MX_TIM4_Init
-                0x080036ac       0xa4 build/main.o
+                0x080038f8       0xa4 build/main.o
+ .text.MX_TIM1_Init
+                0x0800399c       0xc4 build/main.o
  .text.SystemClock_Config
-                0x08003750       0xb4 build/main.o
-                0x08003750                SystemClock_Config
- .text.main     0x08003804      0xb0c build/main.o
-                0x08003804                main
+                0x08003a60       0xb4 build/main.o
+                0x08003a60                SystemClock_Config
+ .text.main     0x08003b14      0xbfc build/main.o
+                0x08003b14                main
  .text.BSP_SD_ReadBlocks
-                0x08004310       0x20 build/bsp_driver_sd.o
-                0x08004310                BSP_SD_ReadBlocks
+                0x08004710       0x20 build/bsp_driver_sd.o
+                0x08004710                BSP_SD_ReadBlocks
  .text.BSP_SD_WriteBlocks
-                0x08004330       0x20 build/bsp_driver_sd.o
-                0x08004330                BSP_SD_WriteBlocks
+                0x08004730       0x20 build/bsp_driver_sd.o
+                0x08004730                BSP_SD_WriteBlocks
  .text.BSP_SD_GetCardState
-                0x08004350       0x14 build/bsp_driver_sd.o
-                0x08004350                BSP_SD_GetCardState
+                0x08004750       0x14 build/bsp_driver_sd.o
+                0x08004750                BSP_SD_GetCardState
  .text.BSP_SD_GetCardInfo
-                0x08004364       0x10 build/bsp_driver_sd.o
-                0x08004364                BSP_SD_GetCardInfo
+                0x08004764       0x10 build/bsp_driver_sd.o
+                0x08004764                BSP_SD_GetCardInfo
  .text.BSP_SD_IsDetected
-                0x08004374       0x20 build/bsp_driver_sd.o
-                0x08004374                BSP_SD_IsDetected
+                0x08004774       0x20 build/bsp_driver_sd.o
+                0x08004774                BSP_SD_IsDetected
  .text.BSP_SD_Init
-                0x08004394       0x34 build/bsp_driver_sd.o
-                0x08004394                BSP_SD_Init
+                0x08004794       0x34 build/bsp_driver_sd.o
+                0x08004794                BSP_SD_Init
  .text.SD_CheckStatus
-                0x080043c8       0x24 build/sd_diskio.o
+                0x080047c8       0x24 build/sd_diskio.o
  .text.SD_initialize
-                0x080043ec       0x28 build/sd_diskio.o
-                0x080043ec                SD_initialize
+                0x080047ec       0x28 build/sd_diskio.o
+                0x080047ec                SD_initialize
  .text.SD_status
-                0x08004414        0x8 build/sd_diskio.o
-                0x08004414                SD_status
- .text.SD_read  0x0800441c       0x24 build/sd_diskio.o
-                0x0800441c                SD_read
+                0x08004814        0x8 build/sd_diskio.o
+                0x08004814                SD_status
+ .text.SD_read  0x0800481c       0x24 build/sd_diskio.o
+                0x0800481c                SD_read
  .text.SD_write
-                0x08004440       0x24 build/sd_diskio.o
-                0x08004440                SD_write
+                0x08004840       0x24 build/sd_diskio.o
+                0x08004840                SD_write
  .text.SD_ioctl
-                0x08004464       0x58 build/sd_diskio.o
-                0x08004464                SD_ioctl
+                0x08004864       0x58 build/sd_diskio.o
+                0x08004864                SD_ioctl
  .text.MX_FATFS_Init
-                0x080044bc       0x1c build/fatfs.o
-                0x080044bc                MX_FATFS_Init
+                0x080048bc       0x1c build/fatfs.o
+                0x080048bc                MX_FATFS_Init
  .text.get_fattime
-                0x080044d8        0x4 build/fatfs.o
-                0x080044d8                get_fattime
+                0x080048d8        0x4 build/fatfs.o
+                0x080048d8                get_fattime
  .text.BSP_PlatformIsDetected
-                0x080044dc       0x18 build/fatfs_platform.o
-                0x080044dc                BSP_PlatformIsDetected
+                0x080048dc       0x18 build/fatfs_platform.o
+                0x080048dc                BSP_PlatformIsDetected
  .text.NMI_Handler
-                0x080044f4        0x2 build/stm32f7xx_it.o
-                0x080044f4                NMI_Handler
+                0x080048f4        0x2 build/stm32f7xx_it.o
+                0x080048f4                NMI_Handler
  .text.HardFault_Handler
-                0x080044f6        0x2 build/stm32f7xx_it.o
-                0x080044f6                HardFault_Handler
+                0x080048f6        0x2 build/stm32f7xx_it.o
+                0x080048f6                HardFault_Handler
  .text.MemManage_Handler
-                0x080044f8        0x2 build/stm32f7xx_it.o
-                0x080044f8                MemManage_Handler
+                0x080048f8        0x2 build/stm32f7xx_it.o
+                0x080048f8                MemManage_Handler
  .text.BusFault_Handler
-                0x080044fa        0x2 build/stm32f7xx_it.o
-                0x080044fa                BusFault_Handler
+                0x080048fa        0x2 build/stm32f7xx_it.o
+                0x080048fa                BusFault_Handler
  .text.UsageFault_Handler
-                0x080044fc        0x2 build/stm32f7xx_it.o
-                0x080044fc                UsageFault_Handler
+                0x080048fc        0x2 build/stm32f7xx_it.o
+                0x080048fc                UsageFault_Handler
  .text.SVC_Handler
-                0x080044fe        0x2 build/stm32f7xx_it.o
-                0x080044fe                SVC_Handler
+                0x080048fe        0x2 build/stm32f7xx_it.o
+                0x080048fe                SVC_Handler
  .text.DebugMon_Handler
-                0x08004500        0x2 build/stm32f7xx_it.o
-                0x08004500                DebugMon_Handler
+                0x08004900        0x2 build/stm32f7xx_it.o
+                0x08004900                DebugMon_Handler
  .text.PendSV_Handler
-                0x08004502        0x2 build/stm32f7xx_it.o
-                0x08004502                PendSV_Handler
+                0x08004902        0x2 build/stm32f7xx_it.o
+                0x08004902                PendSV_Handler
  .text.SysTick_Handler
-                0x08004504        0x8 build/stm32f7xx_it.o
-                0x08004504                SysTick_Handler
+                0x08004904        0x8 build/stm32f7xx_it.o
+                0x08004904                SysTick_Handler
  .text.ADC_IRQHandler
-                0x0800450c       0x18 build/stm32f7xx_it.o
-                0x0800450c                ADC_IRQHandler
+                0x0800490c       0x18 build/stm32f7xx_it.o
+                0x0800490c                ADC_IRQHandler
  .text.TIM1_UP_TIM10_IRQHandler
-                0x08004524       0x34 build/stm32f7xx_it.o
-                0x08004524                TIM1_UP_TIM10_IRQHandler
+                0x08004924       0x34 build/stm32f7xx_it.o
+                0x08004924                TIM1_UP_TIM10_IRQHandler
  .text.TIM1_TRG_COM_TIM11_IRQHandler
-                0x08004558       0x34 build/stm32f7xx_it.o
-                0x08004558                TIM1_TRG_COM_TIM11_IRQHandler
+                0x08004958       0x34 build/stm32f7xx_it.o
+                0x08004958                TIM1_TRG_COM_TIM11_IRQHandler
  .text.TIM2_IRQHandler
-                0x0800458c        0x2 build/stm32f7xx_it.o
-                0x0800458c                TIM2_IRQHandler
- *fill*         0x0800458e        0x2 
+                0x0800498c        0x2 build/stm32f7xx_it.o
+                0x0800498c                TIM2_IRQHandler
+ *fill*         0x0800498e        0x2 
  .text.TIM8_UP_TIM13_IRQHandler
-                0x08004590       0x50 build/stm32f7xx_it.o
-                0x08004590                TIM8_UP_TIM13_IRQHandler
+                0x08004990       0x50 build/stm32f7xx_it.o
+                0x08004990                TIM8_UP_TIM13_IRQHandler
  .text.TIM5_IRQHandler
-                0x080045e0        0x2 build/stm32f7xx_it.o
-                0x080045e0                TIM5_IRQHandler
- *fill*         0x080045e2        0x2 
+                0x080049e0        0x2 build/stm32f7xx_it.o
+                0x080049e0                TIM5_IRQHandler
+ *fill*         0x080049e2        0x2 
  .text.TIM6_DAC_IRQHandler
-                0x080045e4       0x34 build/stm32f7xx_it.o
-                0x080045e4                TIM6_DAC_IRQHandler
+                0x080049e4       0x34 build/stm32f7xx_it.o
+                0x080049e4                TIM6_DAC_IRQHandler
  .text.TIM7_IRQHandler
-                0x08004618       0x24 build/stm32f7xx_it.o
-                0x08004618                TIM7_IRQHandler
+                0x08004a18       0x24 build/stm32f7xx_it.o
+                0x08004a18                TIM7_IRQHandler
  .text.UART_RxCpltCallback
-                0x0800463c      0x324 build/stm32f7xx_it.o
-                0x0800463c                UART_RxCpltCallback
+                0x08004a3c      0x3c8 build/stm32f7xx_it.o
+                0x08004a3c                UART_RxCpltCallback
  .text.USART1_IRQHandler
-                0x08004960       0xd0 build/stm32f7xx_it.o
-                0x08004960                USART1_IRQHandler
+                0x08004e04       0xd0 build/stm32f7xx_it.o
+                0x08004e04                USART1_IRQHandler
  .text.DMA2_Stream7_TransferComplete
-                0x08004a30       0x10 build/stm32f7xx_it.o
-                0x08004a30                DMA2_Stream7_TransferComplete
+                0x08004ed4       0x10 build/stm32f7xx_it.o
+                0x08004ed4                DMA2_Stream7_TransferComplete
  .text.DMA2_Stream7_IRQHandler
-                0x08004a40       0x34 build/stm32f7xx_it.o
-                0x08004a40                DMA2_Stream7_IRQHandler
+                0x08004ee4       0x34 build/stm32f7xx_it.o
+                0x08004ee4                DMA2_Stream7_IRQHandler
  .text.HAL_MspInit
-                0x08004a74       0x30 build/stm32f7xx_hal_msp.o
-                0x08004a74                HAL_MspInit
+                0x08004f18       0x30 build/stm32f7xx_hal_msp.o
+                0x08004f18                HAL_MspInit
  .text.HAL_ADC_MspInit
-                0x08004aa4      0x110 build/stm32f7xx_hal_msp.o
-                0x08004aa4                HAL_ADC_MspInit
+                0x08004f48      0x110 build/stm32f7xx_hal_msp.o
+                0x08004f48                HAL_ADC_MspInit
  .text.HAL_SD_MspInit
-                0x08004bb4       0xb8 build/stm32f7xx_hal_msp.o
-                0x08004bb4                HAL_SD_MspInit
+                0x08005058       0xb8 build/stm32f7xx_hal_msp.o
+                0x08005058                HAL_SD_MspInit
  .text.HAL_TIM_Base_MspInit
-                0x08004c6c       0xc0 build/stm32f7xx_hal_msp.o
-                0x08004c6c                HAL_TIM_Base_MspInit
+                0x08005110       0xe0 build/stm32f7xx_hal_msp.o
+                0x08005110                HAL_TIM_Base_MspInit
  .text.HAL_TIM_MspPostInit
-                0x08004d2c       0x8c build/stm32f7xx_hal_msp.o
-                0x08004d2c                HAL_TIM_MspPostInit
+                0x080051f0       0xc8 build/stm32f7xx_hal_msp.o
+                0x080051f0                HAL_TIM_MspPostInit
  .text.HAL_UART_MspInit
-                0x08004db8       0x88 build/stm32f7xx_hal_msp.o
-                0x08004db8                HAL_UART_MspInit
+                0x080052b8       0x88 build/stm32f7xx_hal_msp.o
+                0x080052b8                HAL_UART_MspInit
  .text.ADC_Init
-                0x08004e40      0x134 build/stm32f7xx_hal_adc.o
+                0x08005340      0x134 build/stm32f7xx_hal_adc.o
  .text.HAL_ADC_Init
-                0x08004f74       0x58 build/stm32f7xx_hal_adc.o
-                0x08004f74                HAL_ADC_Init
+                0x08005474       0x58 build/stm32f7xx_hal_adc.o
+                0x08005474                HAL_ADC_Init
  .text.HAL_ADC_Start
-                0x08004fcc      0x134 build/stm32f7xx_hal_adc.o
-                0x08004fcc                HAL_ADC_Start
+                0x080054cc      0x134 build/stm32f7xx_hal_adc.o
+                0x080054cc                HAL_ADC_Start
  .text.HAL_ADC_Stop
-                0x08005100       0x40 build/stm32f7xx_hal_adc.o
-                0x08005100                HAL_ADC_Stop
+                0x08005600       0x40 build/stm32f7xx_hal_adc.o
+                0x08005600                HAL_ADC_Stop
  .text.HAL_ADC_PollForConversion
-                0x08005140       0xc2 build/stm32f7xx_hal_adc.o
-                0x08005140                HAL_ADC_PollForConversion
+                0x08005640       0xc2 build/stm32f7xx_hal_adc.o
+                0x08005640                HAL_ADC_PollForConversion
  .text.HAL_ADC_GetValue
-                0x08005202        0x6 build/stm32f7xx_hal_adc.o
-                0x08005202                HAL_ADC_GetValue
+                0x08005702        0x6 build/stm32f7xx_hal_adc.o
+                0x08005702                HAL_ADC_GetValue
  .text.HAL_ADC_ConvCpltCallback
-                0x08005208        0x2 build/stm32f7xx_hal_adc.o
-                0x08005208                HAL_ADC_ConvCpltCallback
+                0x08005708        0x2 build/stm32f7xx_hal_adc.o
+                0x08005708                HAL_ADC_ConvCpltCallback
  .text.HAL_ADC_LevelOutOfWindowCallback
-                0x0800520a        0x2 build/stm32f7xx_hal_adc.o
-                0x0800520a                HAL_ADC_LevelOutOfWindowCallback
+                0x0800570a        0x2 build/stm32f7xx_hal_adc.o
+                0x0800570a                HAL_ADC_LevelOutOfWindowCallback
  .text.HAL_ADC_ErrorCallback
-                0x0800520c        0x2 build/stm32f7xx_hal_adc.o
-                0x0800520c                HAL_ADC_ErrorCallback
+                0x0800570c        0x2 build/stm32f7xx_hal_adc.o
+                0x0800570c                HAL_ADC_ErrorCallback
  .text.HAL_ADC_IRQHandler
-                0x0800520e      0x136 build/stm32f7xx_hal_adc.o
-                0x0800520e                HAL_ADC_IRQHandler
+                0x0800570e      0x136 build/stm32f7xx_hal_adc.o
+                0x0800570e                HAL_ADC_IRQHandler
  .text.HAL_ADC_ConfigChannel
-                0x08005344      0x1e4 build/stm32f7xx_hal_adc.o
-                0x08005344                HAL_ADC_ConfigChannel
+                0x08005844      0x1e4 build/stm32f7xx_hal_adc.o
+                0x08005844                HAL_ADC_ConfigChannel
  .text.HAL_ADCEx_InjectedConvCpltCallback
-                0x08005528        0x2 build/stm32f7xx_hal_adc_ex.o
-                0x08005528                HAL_ADCEx_InjectedConvCpltCallback
- *fill*         0x0800552a        0x2 
+                0x08005a28        0x2 build/stm32f7xx_hal_adc_ex.o
+                0x08005a28                HAL_ADCEx_InjectedConvCpltCallback
+ *fill*         0x08005a2a        0x2 
  .text.HAL_RCC_OscConfig
-                0x0800552c      0x444 build/stm32f7xx_hal_rcc.o
-                0x0800552c                HAL_RCC_OscConfig
+                0x08005a2c      0x444 build/stm32f7xx_hal_rcc.o
+                0x08005a2c                HAL_RCC_OscConfig
  .text.HAL_RCC_GetSysClockFreq
-                0x08005970       0xa8 build/stm32f7xx_hal_rcc.o
-                0x08005970                HAL_RCC_GetSysClockFreq
+                0x08005e70       0xa8 build/stm32f7xx_hal_rcc.o
+                0x08005e70                HAL_RCC_GetSysClockFreq
  .text.HAL_RCC_ClockConfig
-                0x08005a18      0x16c build/stm32f7xx_hal_rcc.o
-                0x08005a18                HAL_RCC_ClockConfig
+                0x08005f18      0x16c build/stm32f7xx_hal_rcc.o
+                0x08005f18                HAL_RCC_ClockConfig
  .text.HAL_RCC_GetHCLKFreq
-                0x08005b84        0xc build/stm32f7xx_hal_rcc.o
-                0x08005b84                HAL_RCC_GetHCLKFreq
+                0x08006084        0xc build/stm32f7xx_hal_rcc.o
+                0x08006084                HAL_RCC_GetHCLKFreq
  .text.HAL_RCC_GetPCLK1Freq
-                0x08005b90       0x20 build/stm32f7xx_hal_rcc.o
-                0x08005b90                HAL_RCC_GetPCLK1Freq
+                0x08006090       0x20 build/stm32f7xx_hal_rcc.o
+                0x08006090                HAL_RCC_GetPCLK1Freq
  .text.HAL_RCC_GetPCLK2Freq
-                0x08005bb0       0x20 build/stm32f7xx_hal_rcc.o
-                0x08005bb0                HAL_RCC_GetPCLK2Freq
+                0x080060b0       0x20 build/stm32f7xx_hal_rcc.o
+                0x080060b0                HAL_RCC_GetPCLK2Freq
  .text.HAL_RCCEx_PeriphCLKConfig
-                0x08005bd0      0x600 build/stm32f7xx_hal_rcc_ex.o
-                0x08005bd0                HAL_RCCEx_PeriphCLKConfig
+                0x080060d0      0x600 build/stm32f7xx_hal_rcc_ex.o
+                0x080060d0                HAL_RCCEx_PeriphCLKConfig
  .text.HAL_GPIO_Init
-                0x080061d0      0x204 build/stm32f7xx_hal_gpio.o
-                0x080061d0                HAL_GPIO_Init
+                0x080066d0      0x204 build/stm32f7xx_hal_gpio.o
+                0x080066d0                HAL_GPIO_Init
  .text.HAL_GPIO_ReadPin
-                0x080063d4        0xe build/stm32f7xx_hal_gpio.o
-                0x080063d4                HAL_GPIO_ReadPin
+                0x080068d4        0xe build/stm32f7xx_hal_gpio.o
+                0x080068d4                HAL_GPIO_ReadPin
  .text.HAL_GPIO_WritePin
-                0x080063e2        0xc build/stm32f7xx_hal_gpio.o
-                0x080063e2                HAL_GPIO_WritePin
+                0x080068e2        0xc build/stm32f7xx_hal_gpio.o
+                0x080068e2                HAL_GPIO_WritePin
  .text.HAL_GPIO_TogglePin
-                0x080063ee       0x12 build/stm32f7xx_hal_gpio.o
-                0x080063ee                HAL_GPIO_TogglePin
+                0x080068ee       0x12 build/stm32f7xx_hal_gpio.o
+                0x080068ee                HAL_GPIO_TogglePin
  .text.HAL_PWREx_EnableOverDrive
-                0x08006400       0x7c build/stm32f7xx_hal_pwr_ex.o
-                0x08006400                HAL_PWREx_EnableOverDrive
+                0x08006900       0x7c build/stm32f7xx_hal_pwr_ex.o
+                0x08006900                HAL_PWREx_EnableOverDrive
  .text.__NVIC_SetPriority
-                0x0800647c       0x24 build/stm32f7xx_hal_cortex.o
+                0x0800697c       0x24 build/stm32f7xx_hal_cortex.o
  .text.NVIC_EncodePriority
-                0x080064a0       0x3e build/stm32f7xx_hal_cortex.o
- *fill*         0x080064de        0x2 
+                0x080069a0       0x3e build/stm32f7xx_hal_cortex.o
+ *fill*         0x080069de        0x2 
  .text.HAL_NVIC_SetPriorityGrouping
-                0x080064e0       0x24 build/stm32f7xx_hal_cortex.o
-                0x080064e0                HAL_NVIC_SetPriorityGrouping
+                0x080069e0       0x24 build/stm32f7xx_hal_cortex.o
+                0x080069e0                HAL_NVIC_SetPriorityGrouping
  .text.HAL_NVIC_SetPriority
-                0x08006504       0x20 build/stm32f7xx_hal_cortex.o
-                0x08006504                HAL_NVIC_SetPriority
+                0x08006a04       0x20 build/stm32f7xx_hal_cortex.o
+                0x08006a04                HAL_NVIC_SetPriority
  .text.HAL_NVIC_EnableIRQ
-                0x08006524       0x1c build/stm32f7xx_hal_cortex.o
-                0x08006524                HAL_NVIC_EnableIRQ
+                0x08006a24       0x1c build/stm32f7xx_hal_cortex.o
+                0x08006a24                HAL_NVIC_EnableIRQ
  .text.HAL_SYSTICK_Config
-                0x08006540       0x28 build/stm32f7xx_hal_cortex.o
-                0x08006540                HAL_SYSTICK_Config
+                0x08006a40       0x28 build/stm32f7xx_hal_cortex.o
+                0x08006a40                HAL_SYSTICK_Config
  .text.HAL_InitTick
-                0x08006568       0x4c build/stm32f7xx_hal.o
-                0x08006568                HAL_InitTick
+                0x08006a68       0x4c build/stm32f7xx_hal.o
+                0x08006a68                HAL_InitTick
  .text.HAL_Init
-                0x080065b4       0x16 build/stm32f7xx_hal.o
-                0x080065b4                HAL_Init
- *fill*         0x080065ca        0x2 
+                0x08006ab4       0x16 build/stm32f7xx_hal.o
+                0x08006ab4                HAL_Init
+ *fill*         0x08006aca        0x2 
  .text.HAL_IncTick
-                0x080065cc       0x18 build/stm32f7xx_hal.o
-                0x080065cc                HAL_IncTick
+                0x08006acc       0x18 build/stm32f7xx_hal.o
+                0x08006acc                HAL_IncTick
  .text.HAL_GetTick
-                0x080065e4        0xc build/stm32f7xx_hal.o
-                0x080065e4                HAL_GetTick
+                0x08006ae4        0xc build/stm32f7xx_hal.o
+                0x08006ae4                HAL_GetTick
  .text.HAL_Delay
-                0x080065f0       0x28 build/stm32f7xx_hal.o
-                0x080065f0                HAL_Delay
+                0x08006af0       0x28 build/stm32f7xx_hal.o
+                0x08006af0                HAL_Delay
  .text.RCC_GetHCLKClockFreq
-                0x08006618       0x18 build/stm32f7xx_ll_rcc.o
-                0x08006618                RCC_GetHCLKClockFreq
+                0x08006b18       0x18 build/stm32f7xx_ll_rcc.o
+                0x08006b18                RCC_GetHCLKClockFreq
  .text.RCC_GetPCLK1ClockFreq
-                0x08006630       0x18 build/stm32f7xx_ll_rcc.o
-                0x08006630                RCC_GetPCLK1ClockFreq
+                0x08006b30       0x18 build/stm32f7xx_ll_rcc.o
+                0x08006b30                RCC_GetPCLK1ClockFreq
  .text.RCC_GetPCLK2ClockFreq
-                0x08006648       0x18 build/stm32f7xx_ll_rcc.o
-                0x08006648                RCC_GetPCLK2ClockFreq
+                0x08006b48       0x18 build/stm32f7xx_ll_rcc.o
+                0x08006b48                RCC_GetPCLK2ClockFreq
  .text.RCC_PLL_GetFreqDomain_SYS
-                0x08006660       0x44 build/stm32f7xx_ll_rcc.o
-                0x08006660                RCC_PLL_GetFreqDomain_SYS
+                0x08006b60       0x44 build/stm32f7xx_ll_rcc.o
+                0x08006b60                RCC_PLL_GetFreqDomain_SYS
  .text.RCC_GetSystemClockFreq
-                0x080066a4       0x2c build/stm32f7xx_ll_rcc.o
-                0x080066a4                RCC_GetSystemClockFreq
+                0x08006ba4       0x2c build/stm32f7xx_ll_rcc.o
+                0x08006ba4                RCC_GetSystemClockFreq
  .text.LL_RCC_GetUSARTClockFreq
-                0x080066d0      0x178 build/stm32f7xx_ll_rcc.o
-                0x080066d0                LL_RCC_GetUSARTClockFreq
+                0x08006bd0      0x178 build/stm32f7xx_ll_rcc.o
+                0x08006bd0                LL_RCC_GetUSARTClockFreq
  .text.LL_RCC_GetUARTClockFreq
-                0x08006848      0x180 build/stm32f7xx_ll_rcc.o
-                0x08006848                LL_RCC_GetUARTClockFreq
+                0x08006d48      0x180 build/stm32f7xx_ll_rcc.o
+                0x08006d48                LL_RCC_GetUARTClockFreq
  .text.LL_GPIO_SetPinSpeed
-                0x080069c8       0x30 build/stm32f7xx_ll_gpio.o
+                0x08006ec8       0x30 build/stm32f7xx_ll_gpio.o
  .text.LL_GPIO_SetPinPull
-                0x080069f8       0x30 build/stm32f7xx_ll_gpio.o
+                0x08006ef8       0x30 build/stm32f7xx_ll_gpio.o
  .text.LL_GPIO_SetAFPin_0_7
-                0x08006a28       0x30 build/stm32f7xx_ll_gpio.o
+                0x08006f28       0x30 build/stm32f7xx_ll_gpio.o
  .text.LL_GPIO_SetAFPin_8_15
-                0x08006a58       0x32 build/stm32f7xx_ll_gpio.o
+                0x08006f58       0x32 build/stm32f7xx_ll_gpio.o
  .text.LL_GPIO_SetPinMode
-                0x08006a8a       0x30 build/stm32f7xx_ll_gpio.o
+                0x08006f8a       0x30 build/stm32f7xx_ll_gpio.o
  .text.LL_GPIO_Init
-                0x08006aba       0x8a build/stm32f7xx_ll_gpio.o
-                0x08006aba                LL_GPIO_Init
+                0x08006fba       0x8a build/stm32f7xx_ll_gpio.o
+                0x08006fba                LL_GPIO_Init
  .text.SDMMC_GetCmdError
-                0x08006b44       0x38 build/stm32f7xx_ll_sdmmc.o
+                0x08007044       0x38 build/stm32f7xx_ll_sdmmc.o
  .text.SDMMC_Init
-                0x08006b7c       0x34 build/stm32f7xx_ll_sdmmc.o
-                0x08006b7c                SDMMC_Init
+                0x0800707c       0x34 build/stm32f7xx_ll_sdmmc.o
+                0x0800707c                SDMMC_Init
  .text.SDMMC_ReadFIFO
-                0x08006bb0        0x6 build/stm32f7xx_ll_sdmmc.o
-                0x08006bb0                SDMMC_ReadFIFO
+                0x080070b0        0x6 build/stm32f7xx_ll_sdmmc.o
+                0x080070b0                SDMMC_ReadFIFO
  .text.SDMMC_WriteFIFO
-                0x08006bb6        0xa build/stm32f7xx_ll_sdmmc.o
-                0x08006bb6                SDMMC_WriteFIFO
+                0x080070b6        0xa build/stm32f7xx_ll_sdmmc.o
+                0x080070b6                SDMMC_WriteFIFO
  .text.SDMMC_PowerState_ON
-                0x08006bc0        0x8 build/stm32f7xx_ll_sdmmc.o
-                0x08006bc0                SDMMC_PowerState_ON
+                0x080070c0        0x8 build/stm32f7xx_ll_sdmmc.o
+                0x080070c0                SDMMC_PowerState_ON
  .text.SDMMC_GetPowerState
-                0x08006bc8        0x8 build/stm32f7xx_ll_sdmmc.o
-                0x08006bc8                SDMMC_GetPowerState
+                0x080070c8        0x8 build/stm32f7xx_ll_sdmmc.o
+                0x080070c8                SDMMC_GetPowerState
  .text.SDMMC_SendCommand
-                0x08006bd0       0x20 build/stm32f7xx_ll_sdmmc.o
-                0x08006bd0                SDMMC_SendCommand
+                0x080070d0       0x20 build/stm32f7xx_ll_sdmmc.o
+                0x080070d0                SDMMC_SendCommand
  .text.SDMMC_GetCommandResponse
-                0x08006bf0        0x6 build/stm32f7xx_ll_sdmmc.o
-                0x08006bf0                SDMMC_GetCommandResponse
+                0x080070f0        0x6 build/stm32f7xx_ll_sdmmc.o
+                0x080070f0                SDMMC_GetCommandResponse
  .text.SDMMC_GetResponse
-                0x08006bf6        0x6 build/stm32f7xx_ll_sdmmc.o
-                0x08006bf6                SDMMC_GetResponse
+                0x080070f6        0x6 build/stm32f7xx_ll_sdmmc.o
+                0x080070f6                SDMMC_GetResponse
  .text.SDMMC_ConfigData
-                0x08006bfc       0x24 build/stm32f7xx_ll_sdmmc.o
-                0x08006bfc                SDMMC_ConfigData
+                0x080070fc       0x24 build/stm32f7xx_ll_sdmmc.o
+                0x080070fc                SDMMC_ConfigData
  .text.SDMMC_CmdGoIdleState
-                0x08006c20       0x26 build/stm32f7xx_ll_sdmmc.o
-                0x08006c20                SDMMC_CmdGoIdleState
- *fill*         0x08006c46        0x2 
+                0x08007120       0x26 build/stm32f7xx_ll_sdmmc.o
+                0x08007120                SDMMC_CmdGoIdleState
+ *fill*         0x08007146        0x2 
  .text.SDMMC_GetCmdResp1
-                0x08006c48      0x154 build/stm32f7xx_ll_sdmmc.o
-                0x08006c48                SDMMC_GetCmdResp1
+                0x08007148      0x154 build/stm32f7xx_ll_sdmmc.o
+                0x08007148                SDMMC_GetCmdResp1
  .text.SDMMC_CmdBlockLength
-                0x08006d9c       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006d9c                SDMMC_CmdBlockLength
+                0x0800729c       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x0800729c                SDMMC_CmdBlockLength
  .text.SDMMC_CmdReadSingleBlock
-                0x08006dcc       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006dcc                SDMMC_CmdReadSingleBlock
+                0x080072cc       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x080072cc                SDMMC_CmdReadSingleBlock
  .text.SDMMC_CmdReadMultiBlock
-                0x08006dfc       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006dfc                SDMMC_CmdReadMultiBlock
+                0x080072fc       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x080072fc                SDMMC_CmdReadMultiBlock
  .text.SDMMC_CmdWriteSingleBlock
-                0x08006e2c       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006e2c                SDMMC_CmdWriteSingleBlock
+                0x0800732c       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x0800732c                SDMMC_CmdWriteSingleBlock
  .text.SDMMC_CmdWriteMultiBlock
-                0x08006e5c       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006e5c                SDMMC_CmdWriteMultiBlock
+                0x0800735c       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x0800735c                SDMMC_CmdWriteMultiBlock
  .text.SDMMC_CmdStopTransfer
-                0x08006e8c       0x34 build/stm32f7xx_ll_sdmmc.o
-                0x08006e8c                SDMMC_CmdStopTransfer
+                0x0800738c       0x34 build/stm32f7xx_ll_sdmmc.o
+                0x0800738c                SDMMC_CmdStopTransfer
  .text.SDMMC_CmdSelDesel
-                0x08006ec0       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006ec0                SDMMC_CmdSelDesel
+                0x080073c0       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x080073c0                SDMMC_CmdSelDesel
  .text.SDMMC_CmdAppCommand
-                0x08006ef0       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006ef0                SDMMC_CmdAppCommand
+                0x080073f0       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x080073f0                SDMMC_CmdAppCommand
  .text.SDMMC_CmdBusWidth
-                0x08006f20       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006f20                SDMMC_CmdBusWidth
+                0x08007420       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x08007420                SDMMC_CmdBusWidth
  .text.SDMMC_CmdSendSCR
-                0x08006f50       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006f50                SDMMC_CmdSendSCR
+                0x08007450       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x08007450                SDMMC_CmdSendSCR
  .text.SDMMC_CmdSendStatus
-                0x08006f80       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08006f80                SDMMC_CmdSendStatus
+                0x08007480       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x08007480                SDMMC_CmdSendStatus
  .text.SDMMC_GetCmdResp2
-                0x08006fb0       0x5c build/stm32f7xx_ll_sdmmc.o
-                0x08006fb0                SDMMC_GetCmdResp2
+                0x080074b0       0x5c build/stm32f7xx_ll_sdmmc.o
+                0x080074b0                SDMMC_GetCmdResp2
  .text.SDMMC_CmdSendCID
-                0x0800700c       0x2a build/stm32f7xx_ll_sdmmc.o
-                0x0800700c                SDMMC_CmdSendCID
+                0x0800750c       0x2a build/stm32f7xx_ll_sdmmc.o
+                0x0800750c                SDMMC_CmdSendCID
  .text.SDMMC_CmdSendCSD
-                0x08007036       0x2a build/stm32f7xx_ll_sdmmc.o
-                0x08007036                SDMMC_CmdSendCSD
+                0x08007536       0x2a build/stm32f7xx_ll_sdmmc.o
+                0x08007536                SDMMC_CmdSendCSD
  .text.SDMMC_GetCmdResp3
-                0x08007060       0x4c build/stm32f7xx_ll_sdmmc.o
-                0x08007060                SDMMC_GetCmdResp3
+                0x08007560       0x4c build/stm32f7xx_ll_sdmmc.o
+                0x08007560                SDMMC_GetCmdResp3
  .text.SDMMC_CmdAppOperCommand
-                0x080070ac       0x34 build/stm32f7xx_ll_sdmmc.o
-                0x080070ac                SDMMC_CmdAppOperCommand
+                0x080075ac       0x34 build/stm32f7xx_ll_sdmmc.o
+                0x080075ac                SDMMC_CmdAppOperCommand
  .text.SDMMC_GetCmdResp6
-                0x080070e0       0xa0 build/stm32f7xx_ll_sdmmc.o
-                0x080070e0                SDMMC_GetCmdResp6
+                0x080075e0       0xa0 build/stm32f7xx_ll_sdmmc.o
+                0x080075e0                SDMMC_GetCmdResp6
  .text.SDMMC_CmdSetRelAdd
-                0x08007180       0x30 build/stm32f7xx_ll_sdmmc.o
-                0x08007180                SDMMC_CmdSetRelAdd
+                0x08007680       0x30 build/stm32f7xx_ll_sdmmc.o
+                0x08007680                SDMMC_CmdSetRelAdd
  .text.SDMMC_GetCmdResp7
-                0x080071b0       0x64 build/stm32f7xx_ll_sdmmc.o
-                0x080071b0                SDMMC_GetCmdResp7
+                0x080076b0       0x64 build/stm32f7xx_ll_sdmmc.o
+                0x080076b0                SDMMC_GetCmdResp7
  .text.SDMMC_CmdOperCond
-                0x08007214       0x2e build/stm32f7xx_ll_sdmmc.o
-                0x08007214                SDMMC_CmdOperCond
- *fill*         0x08007242        0x2 
+                0x08007714       0x2e build/stm32f7xx_ll_sdmmc.o
+                0x08007714                SDMMC_CmdOperCond
+ *fill*         0x08007742        0x2 
  .text.SD_PowerON
-                0x08007244       0xc0 build/stm32f7xx_hal_sd.o
+                0x08007744       0xc0 build/stm32f7xx_hal_sd.o
  .text.SD_FindSCR
-                0x08007304      0x100 build/stm32f7xx_hal_sd.o
+                0x08007804      0x100 build/stm32f7xx_hal_sd.o
  .text.SD_WideBus_Enable
-                0x08007404       0x4e build/stm32f7xx_hal_sd.o
+                0x08007904       0x4e build/stm32f7xx_hal_sd.o
  .text.SD_WideBus_Disable
-                0x08007452       0x4e build/stm32f7xx_hal_sd.o
+                0x08007952       0x4e build/stm32f7xx_hal_sd.o
  .text.SD_SendStatus
-                0x080074a0       0x2c build/stm32f7xx_hal_sd.o
+                0x080079a0       0x2c build/stm32f7xx_hal_sd.o
  .text.HAL_SD_ReadBlocks
-                0x080074cc      0x248 build/stm32f7xx_hal_sd.o
-                0x080074cc                HAL_SD_ReadBlocks
+                0x080079cc      0x248 build/stm32f7xx_hal_sd.o
+                0x080079cc                HAL_SD_ReadBlocks
  .text.HAL_SD_WriteBlocks
-                0x08007714      0x200 build/stm32f7xx_hal_sd.o
-                0x08007714                HAL_SD_WriteBlocks
+                0x08007c14      0x200 build/stm32f7xx_hal_sd.o
+                0x08007c14                HAL_SD_WriteBlocks
  .text.HAL_SD_GetCardCSD
-                0x08007914      0x1b8 build/stm32f7xx_hal_sd.o
-                0x08007914                HAL_SD_GetCardCSD
+                0x08007e14      0x1b8 build/stm32f7xx_hal_sd.o
+                0x08007e14                HAL_SD_GetCardCSD
  .text.SD_InitCard
-                0x08007acc      0x100 build/stm32f7xx_hal_sd.o
+                0x08007fcc      0x100 build/stm32f7xx_hal_sd.o
  .text.HAL_SD_InitCard
-                0x08007bcc       0xa8 build/stm32f7xx_hal_sd.o
-                0x08007bcc                HAL_SD_InitCard
+                0x080080cc       0xa8 build/stm32f7xx_hal_sd.o
+                0x080080cc                HAL_SD_InitCard
  .text.HAL_SD_Init
-                0x08007c74       0x36 build/stm32f7xx_hal_sd.o
-                0x08007c74                HAL_SD_Init
+                0x08008174       0x36 build/stm32f7xx_hal_sd.o
+                0x08008174                HAL_SD_Init
  .text.HAL_SD_GetCardInfo
-                0x08007caa       0x24 build/stm32f7xx_hal_sd.o
-                0x08007caa                HAL_SD_GetCardInfo
- *fill*         0x08007cce        0x2 
+                0x080081aa       0x24 build/stm32f7xx_hal_sd.o
+                0x080081aa                HAL_SD_GetCardInfo
+ *fill*         0x080081ce        0x2 
  .text.HAL_SD_ConfigWideBusOperation
-                0x08007cd0       0xc0 build/stm32f7xx_hal_sd.o
-                0x08007cd0                HAL_SD_ConfigWideBusOperation
+                0x080081d0       0xc0 build/stm32f7xx_hal_sd.o
+                0x080081d0                HAL_SD_ConfigWideBusOperation
  .text.HAL_SD_GetCardState
-                0x08007d90       0x22 build/stm32f7xx_hal_sd.o
-                0x08007d90                HAL_SD_GetCardState
- *fill*         0x08007db2        0x2 
+                0x08008290       0x22 build/stm32f7xx_hal_sd.o
+                0x08008290                HAL_SD_GetCardState
+ *fill*         0x080082b2        0x2 
  .text.LL_SPI_Init
-                0x08007db4       0x8c build/stm32f7xx_ll_spi.o
-                0x08007db4                LL_SPI_Init
+                0x080082b4       0x8c build/stm32f7xx_ll_spi.o
+                0x080082b4                LL_SPI_Init
  .text.TIM_OC1_SetConfig
-                0x08007e40       0x68 build/stm32f7xx_hal_tim.o
+                0x08008340       0x68 build/stm32f7xx_hal_tim.o
  .text.TIM_OC3_SetConfig
-                0x08007ea8       0x70 build/stm32f7xx_hal_tim.o
+                0x080083a8       0x70 build/stm32f7xx_hal_tim.o
  .text.TIM_OC4_SetConfig
-                0x08007f18       0x54 build/stm32f7xx_hal_tim.o
+                0x08008418       0x54 build/stm32f7xx_hal_tim.o
  .text.TIM_OC5_SetConfig
-                0x08007f6c       0x54 build/stm32f7xx_hal_tim.o
+                0x0800846c       0x54 build/stm32f7xx_hal_tim.o
  .text.TIM_OC6_SetConfig
-                0x08007fc0       0x54 build/stm32f7xx_hal_tim.o
+                0x080084c0       0x54 build/stm32f7xx_hal_tim.o
  .text.TIM_TI1_ConfigInputStage
-                0x08008014       0x26 build/stm32f7xx_hal_tim.o
+                0x08008514       0x26 build/stm32f7xx_hal_tim.o
  .text.TIM_TI2_ConfigInputStage
-                0x0800803a       0x28 build/stm32f7xx_hal_tim.o
+                0x0800853a       0x28 build/stm32f7xx_hal_tim.o
  .text.TIM_ITRx_SetConfig
-                0x08008062       0x10 build/stm32f7xx_hal_tim.o
+                0x08008562       0x10 build/stm32f7xx_hal_tim.o
  .text.HAL_TIM_Base_Stop
-                0x08008072       0x28 build/stm32f7xx_hal_tim.o
-                0x08008072                HAL_TIM_Base_Stop
- *fill*         0x0800809a        0x2 
+                0x08008572       0x28 build/stm32f7xx_hal_tim.o
+                0x08008572                HAL_TIM_Base_Stop
+ *fill*         0x0800859a        0x2 
  .text.HAL_TIM_Base_Start_IT
-                0x0800809c       0x90 build/stm32f7xx_hal_tim.o
-                0x0800809c                HAL_TIM_Base_Start_IT
+                0x0800859c       0x90 build/stm32f7xx_hal_tim.o
+                0x0800859c                HAL_TIM_Base_Start_IT
  .text.HAL_TIM_Base_Stop_IT
-                0x0800812c       0x32 build/stm32f7xx_hal_tim.o
-                0x0800812c                HAL_TIM_Base_Stop_IT
+                0x0800862c       0x32 build/stm32f7xx_hal_tim.o
+                0x0800862c                HAL_TIM_Base_Stop_IT
  .text.HAL_TIM_PWM_MspInit
-                0x0800815e        0x2 build/stm32f7xx_hal_tim.o
-                0x0800815e                HAL_TIM_PWM_MspInit
+                0x0800865e        0x2 build/stm32f7xx_hal_tim.o
+                0x0800865e                HAL_TIM_PWM_MspInit
  .text.HAL_TIM_PeriodElapsedCallback
-                0x08008160        0x2 build/stm32f7xx_hal_tim.o
-                0x08008160                HAL_TIM_PeriodElapsedCallback
+                0x08008660        0x2 build/stm32f7xx_hal_tim.o
+                0x08008660                HAL_TIM_PeriodElapsedCallback
  .text.HAL_TIM_OC_DelayElapsedCallback
-                0x08008162        0x2 build/stm32f7xx_hal_tim.o
-                0x08008162                HAL_TIM_OC_DelayElapsedCallback
+                0x08008662        0x2 build/stm32f7xx_hal_tim.o
+                0x08008662                HAL_TIM_OC_DelayElapsedCallback
  .text.HAL_TIM_IC_CaptureCallback
-                0x08008164        0x2 build/stm32f7xx_hal_tim.o
-                0x08008164                HAL_TIM_IC_CaptureCallback
+                0x08008664        0x2 build/stm32f7xx_hal_tim.o
+                0x08008664                HAL_TIM_IC_CaptureCallback
  .text.HAL_TIM_PWM_PulseFinishedCallback
-                0x08008166        0x2 build/stm32f7xx_hal_tim.o
-                0x08008166                HAL_TIM_PWM_PulseFinishedCallback
+                0x08008666        0x2 build/stm32f7xx_hal_tim.o
+                0x08008666                HAL_TIM_PWM_PulseFinishedCallback
  .text.HAL_TIM_TriggerCallback
-                0x08008168        0x2 build/stm32f7xx_hal_tim.o
-                0x08008168                HAL_TIM_TriggerCallback
+                0x08008668        0x2 build/stm32f7xx_hal_tim.o
+                0x08008668                HAL_TIM_TriggerCallback
  .text.HAL_TIM_IRQHandler
-                0x0800816a      0x17a build/stm32f7xx_hal_tim.o
-                0x0800816a                HAL_TIM_IRQHandler
+                0x0800866a      0x17a build/stm32f7xx_hal_tim.o
+                0x0800866a                HAL_TIM_IRQHandler
  .text.TIM_Base_SetConfig
-                0x080082e4      0x120 build/stm32f7xx_hal_tim.o
-                0x080082e4                TIM_Base_SetConfig
+                0x080087e4      0x120 build/stm32f7xx_hal_tim.o
+                0x080087e4                TIM_Base_SetConfig
  .text.HAL_TIM_Base_Init
-                0x08008404       0x60 build/stm32f7xx_hal_tim.o
-                0x08008404                HAL_TIM_Base_Init
+                0x08008904       0x60 build/stm32f7xx_hal_tim.o
+                0x08008904                HAL_TIM_Base_Init
  .text.HAL_TIM_PWM_Init
-                0x08008464       0x60 build/stm32f7xx_hal_tim.o
-                0x08008464                HAL_TIM_PWM_Init
+                0x08008964       0x60 build/stm32f7xx_hal_tim.o
+                0x08008964                HAL_TIM_PWM_Init
  .text.TIM_OC2_SetConfig
-                0x080084c4       0x70 build/stm32f7xx_hal_tim.o
-                0x080084c4                TIM_OC2_SetConfig
+                0x080089c4       0x70 build/stm32f7xx_hal_tim.o
+                0x080089c4                TIM_OC2_SetConfig
  .text.HAL_TIM_PWM_ConfigChannel
-                0x08008534      0x13a build/stm32f7xx_hal_tim.o
-                0x08008534                HAL_TIM_PWM_ConfigChannel
+                0x08008a34      0x13a build/stm32f7xx_hal_tim.o
+                0x08008a34                HAL_TIM_PWM_ConfigChannel
  .text.TIM_ETR_SetConfig
-                0x0800866e       0x1a build/stm32f7xx_hal_tim.o
-                0x0800866e                TIM_ETR_SetConfig
+                0x08008b6e       0x1a build/stm32f7xx_hal_tim.o
+                0x08008b6e                TIM_ETR_SetConfig
  .text.HAL_TIM_ConfigClockSource
-                0x08008688      0x100 build/stm32f7xx_hal_tim.o
-                0x08008688                HAL_TIM_ConfigClockSource
+                0x08008b88      0x100 build/stm32f7xx_hal_tim.o
+                0x08008b88                HAL_TIM_ConfigClockSource
  .text.TIM_CCxChannelCmd
-                0x08008788       0x1e build/stm32f7xx_hal_tim.o
-                0x08008788                TIM_CCxChannelCmd
- *fill*         0x080087a6        0x2 
+                0x08008c88       0x1e build/stm32f7xx_hal_tim.o
+                0x08008c88                TIM_CCxChannelCmd
+ *fill*         0x08008ca6        0x2 
  .text.HAL_TIM_PWM_Start
-                0x080087a8      0x158 build/stm32f7xx_hal_tim.o
-                0x080087a8                HAL_TIM_PWM_Start
+                0x08008ca8      0x158 build/stm32f7xx_hal_tim.o
+                0x08008ca8                HAL_TIM_PWM_Start
  .text.HAL_TIM_PWM_Stop
-                0x08008900       0xac build/stm32f7xx_hal_tim.o
-                0x08008900                HAL_TIM_PWM_Stop
+                0x08008e00       0xac build/stm32f7xx_hal_tim.o
+                0x08008e00                HAL_TIM_PWM_Stop
  .text.HAL_TIMEx_MasterConfigSynchronization
-                0x080089ac       0xa0 build/stm32f7xx_hal_tim_ex.o
-                0x080089ac                HAL_TIMEx_MasterConfigSynchronization
+                0x08008eac       0xa0 build/stm32f7xx_hal_tim_ex.o
+                0x08008eac                HAL_TIMEx_MasterConfigSynchronization
+ .text.HAL_TIMEx_ConfigBreakDeadTime
+                0x08008f4c       0x90 build/stm32f7xx_hal_tim_ex.o
+                0x08008f4c                HAL_TIMEx_ConfigBreakDeadTime
  .text.HAL_TIMEx_CommutCallback
-                0x08008a4c        0x2 build/stm32f7xx_hal_tim_ex.o
-                0x08008a4c                HAL_TIMEx_CommutCallback
+                0x08008fdc        0x2 build/stm32f7xx_hal_tim_ex.o
+                0x08008fdc                HAL_TIMEx_CommutCallback
  .text.HAL_TIMEx_BreakCallback
-                0x08008a4e        0x2 build/stm32f7xx_hal_tim_ex.o
-                0x08008a4e                HAL_TIMEx_BreakCallback
+                0x08008fde        0x2 build/stm32f7xx_hal_tim_ex.o
+                0x08008fde                HAL_TIMEx_BreakCallback
  .text.HAL_TIMEx_Break2Callback
-                0x08008a50        0x2 build/stm32f7xx_hal_tim_ex.o
-                0x08008a50                HAL_TIMEx_Break2Callback
- *fill*         0x08008a52        0x2 
+                0x08008fe0        0x2 build/stm32f7xx_hal_tim_ex.o
+                0x08008fe0                HAL_TIMEx_Break2Callback
+ *fill*         0x08008fe2        0x2 
  .text.LL_TIM_Init
-                0x08008a54      0x110 build/stm32f7xx_ll_tim.o
-                0x08008a54                LL_TIM_Init
+                0x08008fe4      0x110 build/stm32f7xx_ll_tim.o
+                0x08008fe4                LL_TIM_Init
  .text.LL_USART_SetBaudRate
-                0x08008b64       0x2e build/stm32f7xx_ll_usart.o
- *fill*         0x08008b92        0x2 
+                0x080090f4       0x2e build/stm32f7xx_ll_usart.o
+ *fill*         0x08009122        0x2 
  .text.LL_USART_Init
-                0x08008b94       0xfc build/stm32f7xx_ll_usart.o
-                0x08008b94                LL_USART_Init
+                0x08009124       0xfc build/stm32f7xx_ll_usart.o
+                0x08009124                LL_USART_Init
  .text.SystemInit
-                0x08008c90       0x14 build/system_stm32f7xx.o
-                0x08008c90                SystemInit
+                0x08009220       0x14 build/system_stm32f7xx.o
+                0x08009220                SystemInit
  .text.Mount_SD
-                0x08008ca4       0x24 build/File_Handling.o
-                0x08008ca4                Mount_SD
+                0x08009234       0x24 build/File_Handling.o
+                0x08009234                Mount_SD
  .text.Unmount_SD
-                0x08008cc8       0x20 build/File_Handling.o
-                0x08008cc8                Unmount_SD
+                0x08009258       0x20 build/File_Handling.o
+                0x08009258                Unmount_SD
  .text.Write_File_byte
-                0x08008ce8       0x5c build/File_Handling.o
-                0x08008ce8                Write_File_byte
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+                0x08009278                Write_File_byte
  .text.Seek_Read_File
-                0x08008d44      0x148 build/File_Handling.o
-                0x08008d44                Seek_Read_File
+                0x080092d4      0x148 build/File_Handling.o
+                0x080092d4                Seek_Read_File
  .text.Create_File
-                0x08008e8c       0x44 build/File_Handling.o
-                0x08008e8c                Create_File
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+                0x0800941c                Create_File
  .text.Remove_File
-                0x08008ed0       0x84 build/File_Handling.o
-                0x08008ed0                Remove_File
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+                0x08009460                Remove_File
  .text.Update_File_byte
-                0x08008f54       0x5c build/File_Handling.o
-                0x08008f54                Update_File_byte
+                0x080094e4       0x5c build/File_Handling.o
+                0x080094e4                Update_File_byte
  .text.disk_status
-                0x08008fb0       0x18 build/diskio.o
-                0x08008fb0                disk_status
+                0x08009540       0x18 build/diskio.o
+                0x08009540                disk_status
  .text.disk_initialize
-                0x08008fc8       0x28 build/diskio.o
-                0x08008fc8                disk_initialize
+                0x08009558       0x28 build/diskio.o
+                0x08009558                disk_initialize
  .text.disk_read
-                0x08008ff0       0x18 build/diskio.o
-                0x08008ff0                disk_read
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+                0x08009580                disk_read
  .text.disk_write
-                0x08009008       0x18 build/diskio.o
-                0x08009008                disk_write
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+                0x08009598                disk_write
  .text.disk_ioctl
-                0x08009020       0x18 build/diskio.o
-                0x08009020                disk_ioctl
- .text.ld_word  0x08009038        0xa build/ff.o
+                0x080095b0       0x18 build/diskio.o
+                0x080095b0                disk_ioctl
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  .text.ld_dword
-                0x08009042       0x16 build/ff.o
- .text.st_word  0x08009058        0x8 build/ff.o
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  .text.st_dword
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- .text.mem_cmp  0x08009092       0x1a build/ff.o
- .text.chk_chr  0x080090ac       0x10 build/ff.o
+                0x080095f0       0x14 build/ff.o
+ .text.mem_cpy  0x08009604       0x14 build/ff.o
+ .text.mem_set  0x08009618        0xa build/ff.o
+ .text.mem_cmp  0x08009622       0x1a build/ff.o
+ .text.chk_chr  0x0800963c       0x10 build/ff.o
  .text.chk_lock
-                0x080090bc       0x7c build/ff.o
+                0x0800964c       0x7c build/ff.o
  .text.enq_lock
-                0x08009138       0x20 build/ff.o
+                0x080096c8       0x20 build/ff.o
  .text.inc_lock
-                0x08009158       0xa0 build/ff.o
+                0x080096e8       0xa0 build/ff.o
  .text.dec_lock
-                0x080091f8       0x40 build/ff.o
+                0x08009788       0x40 build/ff.o
  .text.clear_lock
-                0x08009238       0x3c build/ff.o
+                0x080097c8       0x3c build/ff.o
  .text.clust2sect
-                0x08009274       0x18 build/ff.o
+                0x08009804       0x18 build/ff.o
  .text.clmt_clust
-                0x0800928c       0x26 build/ff.o
+                0x0800981c       0x26 build/ff.o
  .text.ld_clust
-                0x080092b2       0x26 build/ff.o
+                0x08009842       0x26 build/ff.o
  .text.st_clust
-                0x080092d8       0x26 build/ff.o
+                0x08009868       0x26 build/ff.o
  .text.get_fileinfo
-                0x080092fe       0x6a build/ff.o
+                0x0800988e       0x6a build/ff.o
  .text.create_name
-                0x08009368       0xd0 build/ff.o
+                0x080098f8       0xd0 build/ff.o
  .text.get_ldnumber
-                0x08009438       0x48 build/ff.o
+                0x080099c8       0x48 build/ff.o
  .text.validate
-                0x08009480       0x46 build/ff.o
+                0x08009a10       0x46 build/ff.o
  .text.sync_window
-                0x080094c6       0x54 build/ff.o
+                0x08009a56       0x54 build/ff.o
  .text.move_window
-                0x0800951a       0x36 build/ff.o
+                0x08009aaa       0x36 build/ff.o
  .text.check_fs
-                0x08009550       0x78 build/ff.o
+                0x08009ae0       0x78 build/ff.o
  .text.find_volume
-                0x080095c8      0x34c build/ff.o
- .text.put_fat  0x08009914      0x136 build/ff.o
- .text.get_fat  0x08009a4a       0xfc build/ff.o
- .text.dir_sdi  0x08009b46       0xc0 build/ff.o
+                0x08009b58      0x34c build/ff.o
+ .text.put_fat  0x08009ea4      0x136 build/ff.o
+ .text.get_fat  0x08009fda       0xfc build/ff.o
+ .text.dir_sdi  0x0800a0d6       0xc0 build/ff.o
  .text.create_chain
-                0x08009c06       0xd6 build/ff.o
+                0x0800a196       0xd6 build/ff.o
  .text.remove_chain
-                0x08009cdc       0x7e build/ff.o
+                0x0800a26c       0x7e build/ff.o
  .text.dir_remove
-                0x08009d5a       0x1c build/ff.o
+                0x0800a2ea       0x1c build/ff.o
  .text.dir_next
-                0x08009d76      0x118 build/ff.o
+                0x0800a306      0x118 build/ff.o
  .text.dir_find
-                0x08009e8e       0x5a build/ff.o
+                0x0800a41e       0x5a build/ff.o
  .text.follow_path
-                0x08009ee8       0x92 build/ff.o
+                0x0800a478       0x92 build/ff.o
  .text.dir_alloc
-                0x08009f7a       0x4e build/ff.o
+                0x0800a50a       0x4e build/ff.o
  .text.dir_register
-                0x08009fc8       0x3e build/ff.o
+                0x0800a558       0x3e build/ff.o
  .text.dir_read
-                0x0800a006       0x5e build/ff.o
- .text.sync_fs  0x0800a064       0x88 build/ff.o
- .text.f_mount  0x0800a0ec       0x60 build/ff.o
-                0x0800a0ec                f_mount
- .text.f_open   0x0800a14c      0x232 build/ff.o
-                0x0800a14c                f_open
- .text.f_read   0x0800a37e      0x1d8 build/ff.o
-                0x0800a37e                f_read
- .text.f_write  0x0800a556      0x210 build/ff.o
-                0x0800a556                f_write
- .text.f_sync   0x0800a766       0x98 build/ff.o
-                0x0800a766                f_sync
- .text.f_close  0x0800a7fe       0x2a build/ff.o
-                0x0800a7fe                f_close
- .text.f_lseek  0x0800a828      0x2a6 build/ff.o
-                0x0800a828                f_lseek
- .text.f_stat   0x0800aace       0x44 build/ff.o
-                0x0800aace                f_stat
+                0x0800a596       0x5e build/ff.o
+ .text.sync_fs  0x0800a5f4       0x88 build/ff.o
+ .text.f_mount  0x0800a67c       0x60 build/ff.o
+                0x0800a67c                f_mount
+ .text.f_open   0x0800a6dc      0x232 build/ff.o
+                0x0800a6dc                f_open
+ .text.f_read   0x0800a90e      0x1d8 build/ff.o
+                0x0800a90e                f_read
+ .text.f_write  0x0800aae6      0x210 build/ff.o
+                0x0800aae6                f_write
+ .text.f_sync   0x0800acf6       0x98 build/ff.o
+                0x0800acf6                f_sync
+ .text.f_close  0x0800ad8e       0x2a build/ff.o
+                0x0800ad8e                f_close
+ .text.f_lseek  0x0800adb8      0x2a6 build/ff.o
+                0x0800adb8                f_lseek
+ .text.f_stat   0x0800b05e       0x44 build/ff.o
+                0x0800b05e                f_stat
  .text.f_unlink
-                0x0800ab12       0xc4 build/ff.o
-                0x0800ab12                f_unlink
- *fill*         0x0800abd6        0x2 
+                0x0800b0a2       0xc4 build/ff.o
+                0x0800b0a2                f_unlink
+ *fill*         0x0800b166        0x2 
  .text.FATFS_LinkDriverEx
-                0x0800abd8       0x54 build/ff_gen_drv.o
-                0x0800abd8                FATFS_LinkDriverEx
+                0x0800b168       0x54 build/ff_gen_drv.o
+                0x0800b168                FATFS_LinkDriverEx
  .text.FATFS_LinkDriver
-                0x0800ac2c        0xa build/ff_gen_drv.o
-                0x0800ac2c                FATFS_LinkDriver
- *fill*         0x0800ac36        0x2 
- .text._sbrk    0x0800ac38       0x48 build/sysmem.o
-                0x0800ac38                _sbrk
+                0x0800b1bc        0xa build/ff_gen_drv.o
+                0x0800b1bc                FATFS_LinkDriver
+ *fill*         0x0800b1c6        0x2 
+ .text._sbrk    0x0800b1c8       0x48 build/sysmem.o
+                0x0800b1c8                _sbrk
  .text.UART_EndRxTransfer
-                0x0800ac80       0x52 build/stm32f7xx_hal_uart.o
- *fill*         0x0800acd2        0x2 
+                0x0800b210       0x52 build/stm32f7xx_hal_uart.o
+ *fill*         0x0800b262        0x2 
  .text.UART_SetConfig
-                0x0800acd4      0x328 build/stm32f7xx_hal_uart.o
-                0x0800acd4                UART_SetConfig
+                0x0800b264      0x328 build/stm32f7xx_hal_uart.o
+                0x0800b264                UART_SetConfig
  .text.UART_AdvFeatureConfig
-                0x0800affc       0xca build/stm32f7xx_hal_uart.o
-                0x0800affc                UART_AdvFeatureConfig
+                0x0800b58c       0xca build/stm32f7xx_hal_uart.o
+                0x0800b58c                UART_AdvFeatureConfig
  .text.UART_WaitOnFlagUntilTimeout
-                0x0800b0c6       0xa6 build/stm32f7xx_hal_uart.o
-                0x0800b0c6                UART_WaitOnFlagUntilTimeout
+                0x0800b656       0xa6 build/stm32f7xx_hal_uart.o
+                0x0800b656                UART_WaitOnFlagUntilTimeout
  .text.UART_CheckIdleState
-                0x0800b16c       0xc6 build/stm32f7xx_hal_uart.o
-                0x0800b16c                UART_CheckIdleState
+                0x0800b6fc       0xc6 build/stm32f7xx_hal_uart.o
+                0x0800b6fc                UART_CheckIdleState
  .text.HAL_UART_Init
-                0x0800b232       0x62 build/stm32f7xx_hal_uart.o
-                0x0800b232                HAL_UART_Init
+                0x0800b7c2       0x62 build/stm32f7xx_hal_uart.o
+                0x0800b7c2                HAL_UART_Init
  .text.Reset_Handler
-                0x0800b294       0x50 build/startup_stm32f767xx.o
-                0x0800b294                Reset_Handler
+                0x0800b824       0x50 build/startup_stm32f767xx.o
+                0x0800b824                Reset_Handler
  .text.Default_Handler
-                0x0800b2e4        0x2 build/startup_stm32f767xx.o
-                0x0800b2e4                RTC_Alarm_IRQHandler
-                0x0800b2e4                EXTI2_IRQHandler
-                0x0800b2e4                TIM8_CC_IRQHandler
-                0x0800b2e4                UART8_IRQHandler
-                0x0800b2e4                SPI4_IRQHandler
-                0x0800b2e4                TIM1_CC_IRQHandler
-                0x0800b2e4                DMA2_Stream5_IRQHandler
-                0x0800b2e4                JPEG_IRQHandler
-                0x0800b2e4                DMA1_Stream5_IRQHandler
-                0x0800b2e4                CAN3_RX1_IRQHandler
-                0x0800b2e4                PVD_IRQHandler
-                0x0800b2e4                TAMP_STAMP_IRQHandler
-                0x0800b2e4                CAN2_RX1_IRQHandler
-                0x0800b2e4                EXTI3_IRQHandler
-                0x0800b2e4                TIM8_TRG_COM_TIM14_IRQHandler
-                0x0800b2e4                DFSDM1_FLT1_IRQHandler
-                0x0800b2e4                I2C3_ER_IRQHandler
-                0x0800b2e4                DFSDM1_FLT2_IRQHandler
-                0x0800b2e4                EXTI0_IRQHandler
-                0x0800b2e4                I2C2_EV_IRQHandler
-                0x0800b2e4                DMA1_Stream2_IRQHandler
-                0x0800b2e4                CAN1_RX0_IRQHandler
-                0x0800b2e4                FPU_IRQHandler
-                0x0800b2e4                OTG_HS_WKUP_IRQHandler
-                0x0800b2e4                CAN3_SCE_IRQHandler
-                0x0800b2e4                LTDC_ER_IRQHandler
-                0x0800b2e4                CAN2_SCE_IRQHandler
-                0x0800b2e4                DMA2_Stream2_IRQHandler
-                0x0800b2e4                SPI1_IRQHandler
-                0x0800b2e4                TIM1_BRK_TIM9_IRQHandler
-                0x0800b2e4                DCMI_IRQHandler
-                0x0800b2e4                CAN2_RX0_IRQHandler
-                0x0800b2e4                DMA2_Stream3_IRQHandler
-                0x0800b2e4                SAI2_IRQHandler
-                0x0800b2e4                DFSDM1_FLT3_IRQHandler
-                0x0800b2e4                USART6_IRQHandler
-                0x0800b2e4                CAN3_RX0_IRQHandler
-                0x0800b2e4                USART3_IRQHandler
-                0x0800b2e4                CAN1_RX1_IRQHandler
-                0x0800b2e4                UART5_IRQHandler
-                0x0800b2e4                DMA2_Stream0_IRQHandler
-                0x0800b2e4                TIM4_IRQHandler
-                0x0800b2e4                QUADSPI_IRQHandler
-                0x0800b2e4                I2C1_EV_IRQHandler
-                0x0800b2e4                DMA1_Stream6_IRQHandler
-                0x0800b2e4                DMA1_Stream1_IRQHandler
-                0x0800b2e4                UART4_IRQHandler
-                0x0800b2e4                TIM3_IRQHandler
-                0x0800b2e4                RCC_IRQHandler
-                0x0800b2e4                TIM8_BRK_TIM12_IRQHandler
-                0x0800b2e4                Default_Handler
-                0x0800b2e4                CEC_IRQHandler
-                0x0800b2e4                EXTI15_10_IRQHandler
-                0x0800b2e4                DMA1_Stream7_IRQHandler
-                0x0800b2e4                SPI5_IRQHandler
-                0x0800b2e4                SDMMC1_IRQHandler
-                0x0800b2e4                CAN2_TX_IRQHandler
-                0x0800b2e4                I2C3_EV_IRQHandler
-                0x0800b2e4                EXTI9_5_IRQHandler
-                0x0800b2e4                RTC_WKUP_IRQHandler
-                0x0800b2e4                LTDC_IRQHandler
-                0x0800b2e4                ETH_WKUP_IRQHandler
-                0x0800b2e4                SPDIF_RX_IRQHandler
-                0x0800b2e4                SPI2_IRQHandler
-                0x0800b2e4                OTG_HS_EP1_IN_IRQHandler
-                0x0800b2e4                DMA1_Stream0_IRQHandler
-                0x0800b2e4                CAN1_TX_IRQHandler
-                0x0800b2e4                EXTI4_IRQHandler
-                0x0800b2e4                RNG_IRQHandler
-                0x0800b2e4                ETH_IRQHandler
-                0x0800b2e4                OTG_HS_EP1_OUT_IRQHandler
-                0x0800b2e4                WWDG_IRQHandler
-                0x0800b2e4                SPI6_IRQHandler
-                0x0800b2e4                MDIOS_IRQHandler
-                0x0800b2e4                I2C4_EV_IRQHandler
-                0x0800b2e4                CAN3_TX_IRQHandler
-                0x0800b2e4                OTG_FS_WKUP_IRQHandler
-                0x0800b2e4                OTG_HS_IRQHandler
-                0x0800b2e4                DMA2D_IRQHandler
-                0x0800b2e4                EXTI1_IRQHandler
-                0x0800b2e4                SDMMC2_IRQHandler
-                0x0800b2e4                UART7_IRQHandler
-                0x0800b2e4                USART2_IRQHandler
-                0x0800b2e4                DFSDM1_FLT0_IRQHandler
-                0x0800b2e4                I2C2_ER_IRQHandler
-                0x0800b2e4                DMA2_Stream1_IRQHandler
-                0x0800b2e4                CAN1_SCE_IRQHandler
-                0x0800b2e4                FLASH_IRQHandler
-                0x0800b2e4                DMA2_Stream4_IRQHandler
-                0x0800b2e4                OTG_FS_IRQHandler
-                0x0800b2e4                SPI3_IRQHandler
-                0x0800b2e4                DMA1_Stream4_IRQHandler
-                0x0800b2e4                I2C1_ER_IRQHandler
-                0x0800b2e4                FMC_IRQHandler
-                0x0800b2e4                LPTIM1_IRQHandler
-                0x0800b2e4                I2C4_ER_IRQHandler
-                0x0800b2e4                DMA2_Stream6_IRQHandler
-                0x0800b2e4                SAI1_IRQHandler
-                0x0800b2e4                DMA1_Stream3_IRQHandler
+                0x0800b874        0x2 build/startup_stm32f767xx.o
+                0x0800b874                RTC_Alarm_IRQHandler
+                0x0800b874                EXTI2_IRQHandler
+                0x0800b874                TIM8_CC_IRQHandler
+                0x0800b874                UART8_IRQHandler
+                0x0800b874                SPI4_IRQHandler
+                0x0800b874                TIM1_CC_IRQHandler
+                0x0800b874                DMA2_Stream5_IRQHandler
+                0x0800b874                JPEG_IRQHandler
+                0x0800b874                DMA1_Stream5_IRQHandler
+                0x0800b874                CAN3_RX1_IRQHandler
+                0x0800b874                PVD_IRQHandler
+                0x0800b874                TAMP_STAMP_IRQHandler
+                0x0800b874                CAN2_RX1_IRQHandler
+                0x0800b874                EXTI3_IRQHandler
+                0x0800b874                TIM8_TRG_COM_TIM14_IRQHandler
+                0x0800b874                DFSDM1_FLT1_IRQHandler
+                0x0800b874                I2C3_ER_IRQHandler
+                0x0800b874                DFSDM1_FLT2_IRQHandler
+                0x0800b874                EXTI0_IRQHandler
+                0x0800b874                I2C2_EV_IRQHandler
+                0x0800b874                DMA1_Stream2_IRQHandler
+                0x0800b874                CAN1_RX0_IRQHandler
+                0x0800b874                FPU_IRQHandler
+                0x0800b874                OTG_HS_WKUP_IRQHandler
+                0x0800b874                CAN3_SCE_IRQHandler
+                0x0800b874                LTDC_ER_IRQHandler
+                0x0800b874                CAN2_SCE_IRQHandler
+                0x0800b874                DMA2_Stream2_IRQHandler
+                0x0800b874                SPI1_IRQHandler
+                0x0800b874                TIM1_BRK_TIM9_IRQHandler
+                0x0800b874                DCMI_IRQHandler
+                0x0800b874                CAN2_RX0_IRQHandler
+                0x0800b874                DMA2_Stream3_IRQHandler
+                0x0800b874                SAI2_IRQHandler
+                0x0800b874                DFSDM1_FLT3_IRQHandler
+                0x0800b874                USART6_IRQHandler
+                0x0800b874                CAN3_RX0_IRQHandler
+                0x0800b874                USART3_IRQHandler
+                0x0800b874                CAN1_RX1_IRQHandler
+                0x0800b874                UART5_IRQHandler
+                0x0800b874                DMA2_Stream0_IRQHandler
+                0x0800b874                TIM4_IRQHandler
+                0x0800b874                QUADSPI_IRQHandler
+                0x0800b874                I2C1_EV_IRQHandler
+                0x0800b874                DMA1_Stream6_IRQHandler
+                0x0800b874                DMA1_Stream1_IRQHandler
+                0x0800b874                UART4_IRQHandler
+                0x0800b874                TIM3_IRQHandler
+                0x0800b874                RCC_IRQHandler
+                0x0800b874                TIM8_BRK_TIM12_IRQHandler
+                0x0800b874                Default_Handler
+                0x0800b874                CEC_IRQHandler
+                0x0800b874                EXTI15_10_IRQHandler
+                0x0800b874                DMA1_Stream7_IRQHandler
+                0x0800b874                SPI5_IRQHandler
+                0x0800b874                SDMMC1_IRQHandler
+                0x0800b874                CAN2_TX_IRQHandler
+                0x0800b874                I2C3_EV_IRQHandler
+                0x0800b874                EXTI9_5_IRQHandler
+                0x0800b874                RTC_WKUP_IRQHandler
+                0x0800b874                LTDC_IRQHandler
+                0x0800b874                ETH_WKUP_IRQHandler
+                0x0800b874                SPDIF_RX_IRQHandler
+                0x0800b874                SPI2_IRQHandler
+                0x0800b874                OTG_HS_EP1_IN_IRQHandler
+                0x0800b874                DMA1_Stream0_IRQHandler
+                0x0800b874                CAN1_TX_IRQHandler
+                0x0800b874                EXTI4_IRQHandler
+                0x0800b874                RNG_IRQHandler
+                0x0800b874                ETH_IRQHandler
+                0x0800b874                OTG_HS_EP1_OUT_IRQHandler
+                0x0800b874                WWDG_IRQHandler
+                0x0800b874                SPI6_IRQHandler
+                0x0800b874                MDIOS_IRQHandler
+                0x0800b874                I2C4_EV_IRQHandler
+                0x0800b874                CAN3_TX_IRQHandler
+                0x0800b874                OTG_FS_WKUP_IRQHandler
+                0x0800b874                OTG_HS_IRQHandler
+                0x0800b874                DMA2D_IRQHandler
+                0x0800b874                EXTI1_IRQHandler
+                0x0800b874                SDMMC2_IRQHandler
+                0x0800b874                UART7_IRQHandler
+                0x0800b874                USART2_IRQHandler
+                0x0800b874                DFSDM1_FLT0_IRQHandler
+                0x0800b874                I2C2_ER_IRQHandler
+                0x0800b874                DMA2_Stream1_IRQHandler
+                0x0800b874                CAN1_SCE_IRQHandler
+                0x0800b874                FLASH_IRQHandler
+                0x0800b874                DMA2_Stream4_IRQHandler
+                0x0800b874                OTG_FS_IRQHandler
+                0x0800b874                SPI3_IRQHandler
+                0x0800b874                DMA1_Stream4_IRQHandler
+                0x0800b874                I2C1_ER_IRQHandler
+                0x0800b874                FMC_IRQHandler
+                0x0800b874                LPTIM1_IRQHandler
+                0x0800b874                I2C4_ER_IRQHandler
+                0x0800b874                DMA2_Stream6_IRQHandler
+                0x0800b874                SAI1_IRQHandler
+                0x0800b874                DMA1_Stream3_IRQHandler
  *(.glue_7)
- .glue_7        0x0800b2e6        0x0 linker stubs
+ .glue_7        0x0800b876        0x0 linker stubs
  *(.glue_7t)
- .glue_7t       0x0800b2e6        0x0 linker stubs
+ .glue_7t       0x0800b876        0x0 linker stubs
  *(.eh_frame)
- *fill*         0x0800b2e6        0x2 
- .eh_frame      0x0800b2e8        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+ *fill*         0x0800b876        0x2 
+ .eh_frame      0x0800b878        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
  *(.init)
- .init          0x0800b2e8        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
-                0x0800b2e8                _init
- .init          0x0800b2ec        0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
+ .init          0x0800b878        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
+                0x0800b878                _init
+ .init          0x0800b87c        0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
  *(.fini)
- .fini          0x0800b2f4        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
-                0x0800b2f4                _fini
- .fini          0x0800b2f8        0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
-                0x0800b300                        . = ALIGN (0x4)
-                0x0800b300                        _etext = .
+ .fini          0x0800b884        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
+                0x0800b884                _fini
+ .fini          0x0800b888        0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
+                0x0800b890                        . = ALIGN (0x4)
+                0x0800b890                        _etext = .
 
-.vfp11_veneer   0x0800b300        0x0
- .vfp11_veneer  0x0800b300        0x0 linker stubs
+.vfp11_veneer   0x0800b890        0x0
+ .vfp11_veneer  0x0800b890        0x0 linker stubs
 
-.v4_bx          0x0800b300        0x0
- .v4_bx         0x0800b300        0x0 linker stubs
+.v4_bx          0x0800b890        0x0
+ .v4_bx         0x0800b890        0x0 linker stubs
 
-.iplt           0x0800b300        0x0
- .iplt          0x0800b300        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+.iplt           0x0800b890        0x0
+ .iplt          0x0800b890        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
 
-.rodata         0x0800b300      0x3e8
-                0x0800b300                        . = ALIGN (0x4)
+.rodata         0x0800b890      0x3e8
+                0x0800b890                        . = ALIGN (0x4)
  *(.rodata)
  *(.rodata*)
  .rodata.Init_params.str1.4
-                0x0800b300      0x1ad build/main.o
+                0x0800b890      0x1ad build/main.o
                                  0x10 (size before relaxing)
  .rodata.SD_SAVE.str1.4
-                0x0800b4ad        0xa build/main.o
- *fill*         0x0800b4ad        0x3 
+                0x0800ba3d        0xa build/main.o
+ *fill*         0x0800ba3d        0x3 
  .rodata.ad9102_example2_regval
-                0x0800b4b0       0x84 build/main.o
+                0x0800ba40       0x84 build/main.o
  .rodata.ad9102_example4_regval
-                0x0800b534       0x84 build/main.o
+                0x0800bac4       0x84 build/main.o
  .rodata.ad9102_reg_addr
-                0x0800b5b8       0x84 build/main.o
+                0x0800bb48       0x84 build/main.o
  .rodata.SD_Driver
-                0x0800b63c       0x14 build/sd_diskio.o
-                0x0800b63c                SD_Driver
+                0x0800bbcc       0x14 build/sd_diskio.o
+                0x0800bbcc                SD_Driver
  .rodata.APBPrescTable
-                0x0800b650        0x8 build/system_stm32f7xx.o
-                0x0800b650                APBPrescTable
+                0x0800bbe0        0x8 build/system_stm32f7xx.o
+                0x0800bbe0                APBPrescTable
  .rodata.AHBPrescTable
-                0x0800b658       0x10 build/system_stm32f7xx.o
-                0x0800b658                AHBPrescTable
+                0x0800bbe8       0x10 build/system_stm32f7xx.o
+                0x0800bbe8                AHBPrescTable
  .rodata.Read_File.str1.4
-                0x0800b668       0xbb build/File_Handling.o
+                0x0800bbf8       0xbb build/File_Handling.o
  .rodata.Seek_Read_File.str1.4
-                0x0800b668       0x27 build/File_Handling.o
+                0x0800bbf8       0x27 build/File_Handling.o
  .rodata.Remove_File.str1.4
-                0x0800b668       0x64 build/File_Handling.o
+                0x0800bbf8       0x64 build/File_Handling.o
  .rodata.create_name.str1.4
-                0x0800b668        0xf build/ff.o
- .rodata.ExCvt  0x0800b668       0x80 build/ff.o
+                0x0800bbf8        0xf build/ff.o
+ .rodata.ExCvt  0x0800bbf8       0x80 build/ff.o
  .rodata.str1.4
-                0x0800b6e8       0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+                0x0800bc78       0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
  .rodata.str1.4
-                0x0800b6e8       0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
-                0x0800b724                        . = ALIGN (0x4)
+                0x0800bc78       0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+                0x0800bcb4                        . = ALIGN (0x4)
 
 .ARM.extab
  *(.ARM.extab* .gnu.linkonce.armextab.*)
 
-.ARM            0x0800b6e8        0x8
-                0x0800b6e8                        __exidx_start = .
+.ARM            0x0800bc78        0x8
+                0x0800bc78                        __exidx_start = .
  *(.ARM.exidx*)
- .ARM.exidx     0x0800b6e8        0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
- .ARM.exidx     0x0800b6f0        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
+ .ARM.exidx     0x0800bc78        0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
+ .ARM.exidx     0x0800bc80        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
                                   0x8 (size before relaxing)
- .ARM.exidx     0x0800b6f0        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
+ .ARM.exidx     0x0800bc80        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
                                   0x8 (size before relaxing)
-                0x0800b6f0                        __exidx_end = .
+                0x0800bc80                        __exidx_end = .
 
-.rel.dyn        0x0800b6f0        0x0
- .rel.iplt      0x0800b6f0        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+.rel.dyn        0x0800bc80        0x0
+ .rel.iplt      0x0800bc80        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
 
-.preinit_array  0x0800b6f0        0x0
-                0x0800b6f0                        PROVIDE (__preinit_array_start = .)
+.preinit_array  0x0800bc80        0x0
+                0x0800bc80                        PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x0800b6f0                        PROVIDE (__preinit_array_end = .)
+                0x0800bc80                        PROVIDE (__preinit_array_end = .)
 
-.init_array     0x0800b6f0        0x4
-                0x0800b6f0                        PROVIDE (__init_array_start = .)
+.init_array     0x0800bc80        0x4
+                0x0800bc80                        PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x0800b6f0        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
-                0x0800b6f4                        PROVIDE (__init_array_end = .)
+ .init_array    0x0800bc80        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+                0x0800bc84                        PROVIDE (__init_array_end = .)
 
-.fini_array     0x0800b6f4        0x4
-                0x0800b6f4                        PROVIDE (__fini_array_start = .)
+.fini_array     0x0800bc84        0x4
+                0x0800bc84                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x0800b6f4        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
-                0x0800b6f8                        PROVIDE (__fini_array_end = .)
-                0x0800b6f8                        _sidata = LOADADDR (.data)
+ .fini_array    0x0800bc84        0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+                0x0800bc88                        PROVIDE (__fini_array_end = .)
+                0x0800bc88                        _sidata = LOADADDR (.data)
 
-.data           0x20000000       0x5c load address 0x0800b6f8
+.data           0x20000000       0x5c load address 0x0800bc88
                 0x20000000                        . = ALIGN (0x4)
                 0x20000000                        _sdata = .
  *(.data)
@@ -3123,17 +3135,17 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
                 0x2000005c                        _edata = .
 
 .tm_clone_table
-                0x2000005c        0x0 load address 0x0800b754
+                0x2000005c        0x0 load address 0x0800bce4
  .tm_clone_table
                 0x2000005c        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
  .tm_clone_table
                 0x2000005c        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o
 
-.igot.plt       0x2000005c        0x0 load address 0x0800b754
+.igot.plt       0x2000005c        0x0 load address 0x0800bce4
  .igot.plt      0x2000005c        0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
                 0x2000005c                        . = ALIGN (0x4)
 
-.bss            0x2000005c     0x266c load address 0x0800b754
+.bss            0x2000005c     0x26b8 load address 0x0800bce4
                 0x2000005c                        _sbss = .
                 0x2000005c                        __bss_start__ = _sbss
  *(.bss)
@@ -3268,56 +3280,59 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
                 0x200003bc                htim11
  .bss.htim10    0x20000408       0x4c build/main.o
                 0x20000408                htim10
- .bss.htim8     0x20000454       0x4c build/main.o
-                0x20000454                htim8
- .bss.htim4     0x200004a0       0x4c build/main.o
-                0x200004a0                htim4
- .bss.hsd1      0x200004ec       0x84 build/main.o
-                0x200004ec                hsd1
- .bss.hadc3     0x20000570       0x48 build/main.o
-                0x20000570                hadc3
- .bss.hadc1     0x200005b8       0x48 build/main.o
-                0x200005b8                hadc1
- .bss.SDPath    0x20000600        0x4 build/fatfs.o
-                0x20000600                SDPath
- .bss.retSD     0x20000604        0x1 build/fatfs.o
-                0x20000604                retSD
- *fill*         0x20000605        0x3 
- .bss.uwTick    0x20000608        0x4 build/stm32f7xx_hal.o
-                0x20000608                uwTick
- .bss.bw        0x2000060c        0x4 build/File_Handling.o
-                0x2000060c                bw
- .bss.br        0x20000610        0x4 build/File_Handling.o
-                0x20000610                br
- .bss.fno       0x20000614       0x18 build/File_Handling.o
-                0x20000614                fno
- .bss.fil       0x2000062c     0x1030 build/File_Handling.o
-                0x2000062c                fil
- .bss.fs        0x2000165c     0x1034 build/File_Handling.o
-                0x2000165c                fs
- .bss.Files     0x20002690       0x20 build/ff.o
- .bss.Fsid      0x200026b0        0x2 build/ff.o
- *fill*         0x200026b2        0x2 
- .bss.FatFs     0x200026b4        0x4 build/ff.o
- .bss.disk      0x200026b8        0xc build/ff_gen_drv.o
-                0x200026b8                disk
+ .bss.htim1     0x20000454       0x4c build/main.o
+                0x20000454                htim1
+ .bss.htim8     0x200004a0       0x4c build/main.o
+                0x200004a0                htim8
+ .bss.htim4     0x200004ec       0x4c build/main.o
+                0x200004ec                htim4
+ .bss.hsd1      0x20000538       0x84 build/main.o
+                0x20000538                hsd1
+ .bss.hadc3     0x200005bc       0x48 build/main.o
+                0x200005bc                hadc3
+ .bss.hadc1     0x20000604       0x48 build/main.o
+                0x20000604                hadc1
+ .bss.SDPath    0x2000064c        0x4 build/fatfs.o
+                0x2000064c                SDPath
+ .bss.retSD     0x20000650        0x1 build/fatfs.o
+                0x20000650                retSD
+ *fill*         0x20000651        0x3 
+ .bss.uwTick    0x20000654        0x4 build/stm32f7xx_hal.o
+                0x20000654                uwTick
+ .bss.bw        0x20000658        0x4 build/File_Handling.o
+                0x20000658                bw
+ .bss.br        0x2000065c        0x4 build/File_Handling.o
+                0x2000065c                br
+ .bss.fno       0x20000660       0x18 build/File_Handling.o
+                0x20000660                fno
+ .bss.fil       0x20000678     0x1030 build/File_Handling.o
+                0x20000678                fil
+ .bss.fs        0x200016a8     0x1034 build/File_Handling.o
+                0x200016a8                fs
+ .bss.Files     0x200026dc       0x20 build/ff.o
+ .bss.Fsid      0x200026fc        0x2 build/ff.o
+ *fill*         0x200026fe        0x2 
+ .bss.FatFs     0x20002700        0x4 build/ff.o
+ .bss.disk      0x20002704        0xc build/ff_gen_drv.o
+                0x20002704                disk
  .bss.__sbrk_heap_end
-                0x200026c4        0x4 build/sysmem.o
+                0x20002710        0x4 build/sysmem.o
  *(COMMON)
-                0x200026c8                        . = ALIGN (0x4)
-                0x200026c8                        _ebss = .
-                0x200026c8                        __bss_end__ = _ebss
+                0x20002714                        . = ALIGN (0x4)
+                0x20002714                        _ebss = .
+                0x20002714                        __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x200026c8     0x6000 load address 0x0800b754
-                0x200026c8                        . = ALIGN (0x8)
+                0x20002714     0x6004 load address 0x0800bce4
+                0x20002718                        . = ALIGN (0x8)
+ *fill*         0x20002714        0x4 
                 [!provide]                        PROVIDE (end = .)
-                0x200026c8                        PROVIDE (_end = .)
-                0x200046c8                        . = (. + _Min_Heap_Size)
- *fill*         0x200026c8     0x2000 
-                0x200086c8                        . = (. + _Min_Stack_Size)
- *fill*         0x200046c8     0x4000 
-                0x200086c8                        . = ALIGN (0x8)
+                0x20002718                        PROVIDE (_end = .)
+                0x20004718                        . = (. + _Min_Heap_Size)
+ *fill*         0x20002718     0x2000 
+                0x20008718                        . = (. + _Min_Stack_Size)
+ *fill*         0x20004718     0x4000 
+                0x20008718                        . = ALIGN (0x8)
 
 /DISCARD/
  libc.a(*)
@@ -3502,458 +3517,458 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a
  .comment       0x00000026       0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
  .comment       0x00000026       0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o
 
-.debug_info     0x00000000    0x3bab6
- .debug_info    0x00000000     0x94b1 build/main.o
- .debug_info    0x000094b1      0xe39 build/bsp_driver_sd.o
- .debug_info    0x0000a2ea      0x74a build/sd_diskio.o
- .debug_info    0x0000aa34      0x65a build/fatfs.o
- .debug_info    0x0000b08e      0x1f0 build/fatfs_platform.o
- .debug_info    0x0000b27e     0x1925 build/stm32f7xx_it.o
- .debug_info    0x0000cba3     0x23e6 build/stm32f7xx_hal_msp.o
- .debug_info    0x0000ef89      0xfb5 build/stm32f7xx_hal_adc.o
- .debug_info    0x0000ff3e      0xd39 build/stm32f7xx_hal_adc_ex.o
- .debug_info    0x00010c77      0xd0b build/stm32f7xx_hal_rcc.o
- .debug_info    0x00011982      0x96b build/stm32f7xx_hal_rcc_ex.o
- .debug_info    0x000122ed      0x867 build/stm32f7xx_hal_gpio.o
- .debug_info    0x00012b54      0xb00 build/stm32f7xx_hal_pwr_ex.o
- .debug_info    0x00013654     0x145b build/stm32f7xx_hal_cortex.o
- .debug_info    0x00014aaf      0xc0b build/stm32f7xx_hal.o
- .debug_info    0x000156ba     0x1d6b build/stm32f7xx_ll_rcc.o
- .debug_info    0x00017425      0xda5 build/stm32f7xx_ll_gpio.o
- .debug_info    0x000181ca     0x1ad6 build/stm32f7xx_ll_sdmmc.o
- .debug_info    0x00019ca0     0x2a28 build/stm32f7xx_hal_sd.o
- .debug_info    0x0001c6c8      0xb14 build/stm32f7xx_ll_spi.o
- .debug_info    0x0001d1dc     0x42a3 build/stm32f7xx_hal_tim.o
- .debug_info    0x0002147f     0x2009 build/stm32f7xx_hal_tim_ex.o
- .debug_info    0x00023488     0x19f0 build/stm32f7xx_ll_tim.o
- .debug_info    0x00024e78      0xc07 build/stm32f7xx_ll_usart.o
- .debug_info    0x00025a7f      0x7ea build/system_stm32f7xx.o
- .debug_info    0x00026269     0x1ef6 build/File_Handling.o
- .debug_info    0x0002815f      0x5f7 build/diskio.o
- .debug_info    0x00028756     0x47f5 build/ff.o
- .debug_info    0x0002cf4b      0x525 build/ff_gen_drv.o
- .debug_info    0x0002d470      0x174 build/sysmem.o
- .debug_info    0x0002d5e4     0x54ac build/stm32f7xx_hal_uart.o
- .debug_info    0x00032a90       0x30 build/startup_stm32f767xx.o
- .debug_info    0x00032ac0      0x87b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
- .debug_info    0x0003333b      0x70b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o)
- .debug_info    0x00033a46     0x1092 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
- .debug_info    0x00034ad8      0x10b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
- .debug_info    0x00034be3      0x135 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o)
- .debug_info    0x00034d18      0x6f1 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o)
- .debug_info    0x00035409      0x9b6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
- .debug_info    0x00035dbf      0x87f /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
- .debug_info    0x0003663e      0x148 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o)
- .debug_info    0x00036786       0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
- .debug_info    0x000367ab       0x33 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
- .debug_info    0x000367de      0x796 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
- .debug_info    0x00036f74      0x8cd /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
- .debug_info    0x00037841      0xdd7 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
- .debug_info    0x00038618      0x71c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o)
- .debug_info    0x00038d34      0x778 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o)
- .debug_info    0x000394ac      0x78a /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
- .debug_info    0x00039c36      0xe8c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
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+ .debug_frame   0x00004bc0       0x30 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
+ .debug_frame   0x00004bf0       0x38 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
+ .debug_frame   0x00004c28       0x6c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+ .debug_frame   0x00004c94       0x30 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o)
+ .debug_frame   0x00004cc4       0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o)
+ .debug_frame   0x00004cf0       0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
+ .debug_frame   0x00004d10       0xf4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ .debug_frame   0x00004e04       0x40 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ .debug_frame   0x00004e44       0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
+ .debug_frame   0x00004e70       0x34 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
 
 .debug_loclists
                 0x00000000     0x2087
@@ -4214,6 +4229,7 @@ HAL_DMA_UnRegisterCallback                        build/stm32f7xx_hal_dma.o
 HAL_DeInit                                        build/stm32f7xx_hal.o
 HAL_Delay                                         build/stm32f7xx_hal.o
                                                   build/stm32f7xx_hal_sd.o
+                                                  build/main.o
 HAL_DisableCompensationCell                       build/stm32f7xx_hal.o
 HAL_DisableFMCMemorySwapping                      build/stm32f7xx_hal.o
 HAL_DisableMemorySwappingBank                     build/stm32f7xx_hal.o
@@ -4485,6 +4501,7 @@ HAL_TIMEx_CommutCallback                          build/stm32f7xx_hal_tim_ex.o
                                                   build/stm32f7xx_hal_tim.o
 HAL_TIMEx_CommutHalfCpltCallback                  build/stm32f7xx_hal_tim_ex.o
 HAL_TIMEx_ConfigBreakDeadTime                     build/stm32f7xx_hal_tim_ex.o
+                                                  build/main.o
 HAL_TIMEx_ConfigBreakInput                        build/stm32f7xx_hal_tim_ex.o
 HAL_TIMEx_ConfigCommutEvent                       build/stm32f7xx_hal_tim_ex.o
 HAL_TIMEx_ConfigCommutEvent_DMA                   build/stm32f7xx_hal_tim_ex.o
@@ -5262,6 +5279,7 @@ hadc3                                             build/main.o
 hardware_init_hook                                /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
 hsd1                                              build/main.o
                                                   build/bsp_driver_sd.o
+htim1                                             build/main.o
 htim10                                            build/main.o
                                                   build/stm32f7xx_it.o
 htim11                                            build/main.o
diff --git a/build/diskio.lst b/build/diskio.lst
index df2d7cd..4ed3ed0 100644
--- a/build/diskio.lst
+++ b/build/diskio.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/cckyLcZT.s 			page 1
+ARM GAS  /tmp/ccdXV1P2.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
   28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/
   29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/
   30:Middlewares/Third_Party/FatFs/src/diskio.c **** 
-ARM GAS  /tmp/cckyLcZT.s 			page 2
+ARM GAS  /tmp/ccdXV1P2.s 			page 2
 
 
   31:Middlewares/Third_Party/FatFs/src/diskio.c **** /**
@@ -118,7 +118,7 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
   71              	disk_initialize:
   72              	.LVL3:
   73              	.LFB1184:
-ARM GAS  /tmp/cckyLcZT.s 			page 3
+ARM GAS  /tmp/ccdXV1P2.s 			page 3
 
 
   45:Middlewares/Third_Party/FatFs/src/diskio.c **** 
@@ -178,7 +178,7 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
   62:Middlewares/Third_Party/FatFs/src/diskio.c ****   return stat;
  111              		.loc 1 62 3 is_stmt 1 view .LVU23
   63:Middlewares/Third_Party/FatFs/src/diskio.c **** }
-ARM GAS  /tmp/cckyLcZT.s 			page 4
+ARM GAS  /tmp/ccdXV1P2.s 			page 4
 
 
  112              		.loc 1 63 1 is_stmt 0 view .LVU24
@@ -238,7 +238,7 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
   80:Middlewares/Third_Party/FatFs/src/diskio.c ****   DRESULT res;
  150              		.loc 1 80 3 is_stmt 1 view .LVU29
   81:Middlewares/Third_Party/FatFs/src/diskio.c **** 
-ARM GAS  /tmp/cckyLcZT.s 			page 5
+ARM GAS  /tmp/ccdXV1P2.s 			page 5
 
 
   82:Middlewares/Third_Party/FatFs/src/diskio.c ****   res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
@@ -298,7 +298,7 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
  187              		@ args = 0, pretend = 0, frame = 0
  188              		@ frame_needed = 0, uses_anonymous_args = 0
  189              		.loc 1 101 1 is_stmt 0 view .LVU38
-ARM GAS  /tmp/cckyLcZT.s 			page 6
+ARM GAS  /tmp/ccdXV1P2.s 			page 6
 
 
  190 0000 38B5     		push	{r3, r4, r5, lr}
@@ -358,7 +358,7 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
  116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1
  117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl (
  118:Middlewares/Third_Party/FatFs/src/diskio.c **** 	BYTE pdrv,		/* Physical drive nmuber (0..) */
-ARM GAS  /tmp/cckyLcZT.s 			page 7
+ARM GAS  /tmp/ccdXV1P2.s 			page 7
 
 
  119:Middlewares/Third_Party/FatFs/src/diskio.c **** 	BYTE cmd,		/* Control code */
@@ -418,7 +418,7 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
  131:Middlewares/Third_Party/FatFs/src/diskio.c ****   * @brief  Gets Time from RTC
  132:Middlewares/Third_Party/FatFs/src/diskio.c ****   * @param  None
  133:Middlewares/Third_Party/FatFs/src/diskio.c ****   * @retval Time in DWORD
-ARM GAS  /tmp/cckyLcZT.s 			page 8
+ARM GAS  /tmp/ccdXV1P2.s 			page 8
 
 
  134:Middlewares/Third_Party/FatFs/src/diskio.c ****   */
@@ -446,28 +446,28 @@ ARM GAS  /tmp/cckyLcZT.s 			page 1
  294              		.file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
  295              		.file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
  296              		.file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
-ARM GAS  /tmp/cckyLcZT.s 			page 9
+ARM GAS  /tmp/ccdXV1P2.s 			page 9
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 diskio.c
-     /tmp/cckyLcZT.s:20     .text.disk_status:00000000 $t
-     /tmp/cckyLcZT.s:26     .text.disk_status:00000000 disk_status
-     /tmp/cckyLcZT.s:60     .text.disk_status:00000014 $d
-     /tmp/cckyLcZT.s:65     .text.disk_initialize:00000000 $t
-     /tmp/cckyLcZT.s:71     .text.disk_initialize:00000000 disk_initialize
-     /tmp/cckyLcZT.s:124    .text.disk_initialize:00000024 $d
-     /tmp/cckyLcZT.s:129    .text.disk_read:00000000 $t
-     /tmp/cckyLcZT.s:135    .text.disk_read:00000000 disk_read
-     /tmp/cckyLcZT.s:171    .text.disk_read:00000014 $d
-     /tmp/cckyLcZT.s:176    .text.disk_write:00000000 $t
-     /tmp/cckyLcZT.s:182    .text.disk_write:00000000 disk_write
-     /tmp/cckyLcZT.s:218    .text.disk_write:00000014 $d
-     /tmp/cckyLcZT.s:223    .text.disk_ioctl:00000000 $t
-     /tmp/cckyLcZT.s:229    .text.disk_ioctl:00000000 disk_ioctl
-     /tmp/cckyLcZT.s:263    .text.disk_ioctl:00000014 $d
-     /tmp/cckyLcZT.s:268    .text.get_fattime:00000000 $t
-     /tmp/cckyLcZT.s:274    .text.get_fattime:00000000 get_fattime
+     /tmp/ccdXV1P2.s:20     .text.disk_status:00000000 $t
+     /tmp/ccdXV1P2.s:26     .text.disk_status:00000000 disk_status
+     /tmp/ccdXV1P2.s:60     .text.disk_status:00000014 $d
+     /tmp/ccdXV1P2.s:65     .text.disk_initialize:00000000 $t
+     /tmp/ccdXV1P2.s:71     .text.disk_initialize:00000000 disk_initialize
+     /tmp/ccdXV1P2.s:124    .text.disk_initialize:00000024 $d
+     /tmp/ccdXV1P2.s:129    .text.disk_read:00000000 $t
+     /tmp/ccdXV1P2.s:135    .text.disk_read:00000000 disk_read
+     /tmp/ccdXV1P2.s:171    .text.disk_read:00000014 $d
+     /tmp/ccdXV1P2.s:176    .text.disk_write:00000000 $t
+     /tmp/ccdXV1P2.s:182    .text.disk_write:00000000 disk_write
+     /tmp/ccdXV1P2.s:218    .text.disk_write:00000014 $d
+     /tmp/ccdXV1P2.s:223    .text.disk_ioctl:00000000 $t
+     /tmp/ccdXV1P2.s:229    .text.disk_ioctl:00000000 disk_ioctl
+     /tmp/ccdXV1P2.s:263    .text.disk_ioctl:00000014 $d
+     /tmp/ccdXV1P2.s:268    .text.get_fattime:00000000 $t
+     /tmp/ccdXV1P2.s:274    .text.get_fattime:00000000 get_fattime
 
 UNDEFINED SYMBOLS
 disk
diff --git a/build/fatfs.lst b/build/fatfs.lst
index 510b14b..c2e0b27 100644
--- a/build/fatfs.lst
+++ b/build/fatfs.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccFLcHcr.s 			page 1
+ARM GAS  /tmp/ccXTUOPr.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/ccFLcHcr.s 			page 1
   29:Src/fatfs.c   **** 
   30:Src/fatfs.c   **** void MX_FATFS_Init(void)
   31:Src/fatfs.c   **** {
-ARM GAS  /tmp/ccFLcHcr.s 			page 2
+ARM GAS  /tmp/ccXTUOPr.s 			page 2
 
 
   28              		.loc 1 31 1 view -0
@@ -118,7 +118,7 @@ ARM GAS  /tmp/ccFLcHcr.s 			page 1
   69              		@ frame_needed = 0, uses_anonymous_args = 0
   70              		@ link register save eliminated.
   47:Src/fatfs.c   ****   /* USER CODE BEGIN get_fattime */
-ARM GAS  /tmp/ccFLcHcr.s 			page 3
+ARM GAS  /tmp/ccXTUOPr.s 			page 3
 
 
   48:Src/fatfs.c   ****   return 0;
@@ -169,24 +169,24 @@ ARM GAS  /tmp/ccFLcHcr.s 			page 1
  114              		.file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
  115              		.file 10 "Inc/sd_diskio.h"
  116              		.file 11 "Inc/fatfs.h"
-ARM GAS  /tmp/ccFLcHcr.s 			page 4
+ARM GAS  /tmp/ccXTUOPr.s 			page 4
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 fatfs.c
-     /tmp/ccFLcHcr.s:20     .text.MX_FATFS_Init:00000000 $t
-     /tmp/ccFLcHcr.s:26     .text.MX_FATFS_Init:00000000 MX_FATFS_Init
-     /tmp/ccFLcHcr.s:51     .text.MX_FATFS_Init:00000010 $d
-     /tmp/ccFLcHcr.s:97     .bss.SDPath:00000000 SDPath
-     /tmp/ccFLcHcr.s:103    .bss.retSD:00000000 retSD
-     /tmp/ccFLcHcr.s:58     .text.get_fattime:00000000 $t
-     /tmp/ccFLcHcr.s:64     .text.get_fattime:00000000 get_fattime
-     /tmp/ccFLcHcr.s:83     .bss.SDFile:00000000 SDFile
-     /tmp/ccFLcHcr.s:80     .bss.SDFile:00000000 $d
-     /tmp/ccFLcHcr.s:90     .bss.SDFatFS:00000000 SDFatFS
-     /tmp/ccFLcHcr.s:87     .bss.SDFatFS:00000000 $d
-     /tmp/ccFLcHcr.s:94     .bss.SDPath:00000000 $d
-     /tmp/ccFLcHcr.s:104    .bss.retSD:00000000 $d
+     /tmp/ccXTUOPr.s:20     .text.MX_FATFS_Init:00000000 $t
+     /tmp/ccXTUOPr.s:26     .text.MX_FATFS_Init:00000000 MX_FATFS_Init
+     /tmp/ccXTUOPr.s:51     .text.MX_FATFS_Init:00000010 $d
+     /tmp/ccXTUOPr.s:97     .bss.SDPath:00000000 SDPath
+     /tmp/ccXTUOPr.s:103    .bss.retSD:00000000 retSD
+     /tmp/ccXTUOPr.s:58     .text.get_fattime:00000000 $t
+     /tmp/ccXTUOPr.s:64     .text.get_fattime:00000000 get_fattime
+     /tmp/ccXTUOPr.s:83     .bss.SDFile:00000000 SDFile
+     /tmp/ccXTUOPr.s:80     .bss.SDFile:00000000 $d
+     /tmp/ccXTUOPr.s:90     .bss.SDFatFS:00000000 SDFatFS
+     /tmp/ccXTUOPr.s:87     .bss.SDFatFS:00000000 $d
+     /tmp/ccXTUOPr.s:94     .bss.SDPath:00000000 $d
+     /tmp/ccXTUOPr.s:104    .bss.retSD:00000000 $d
 
 UNDEFINED SYMBOLS
 FATFS_LinkDriver
diff --git a/build/ff.lst b/build/ff.lst
index ba7d1fd..b18a9b2 100644
--- a/build/ff.lst
+++ b/build/ff.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccH7dUYB.s 			page 1
+ARM GAS  /tmp/cczbjqIl.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
   29:Middlewares/Third_Party/FatFs/src/ff.c **** ---------------------------------------------------------------------------*/
   30:Middlewares/Third_Party/FatFs/src/ff.c **** 
   31:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FATFS != 68300	/* Revision ID */
-ARM GAS  /tmp/ccH7dUYB.s 			page 2
+ARM GAS  /tmp/cczbjqIl.s 			page 2
 
 
   32:Middlewares/Third_Party/FatFs/src/ff.c **** #error Wrong include file (ff.h).
@@ -118,7 +118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
   86:Middlewares/Third_Party/FatFs/src/ff.c **** #define _DF1S	0
   87:Middlewares/Third_Party/FatFs/src/ff.c **** #define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
   88:Middlewares/Third_Party/FatFs/src/ff.c **** 				0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
-ARM GAS  /tmp/ccH7dUYB.s 			page 3
+ARM GAS  /tmp/cczbjqIl.s 			page 3
 
 
   89:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
@@ -178,7 +178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  143:Middlewares/Third_Party/FatFs/src/ff.c **** 				0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \
  144:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \
  145:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \
-ARM GAS  /tmp/ccH7dUYB.s 			page 4
+ARM GAS  /tmp/cczbjqIl.s 			page 4
 
 
  146:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
@@ -238,7 +238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  200:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
  201:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
  202:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
-ARM GAS  /tmp/ccH7dUYB.s 			page 5
+ARM GAS  /tmp/cczbjqIl.s 			page 5
 
 
  203:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
@@ -298,7 +298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  257:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \
  258:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \
  259:Middlewares/Third_Party/FatFs/src/ff.c **** 				0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF}
-ARM GAS  /tmp/ccH7dUYB.s 			page 6
+ARM GAS  /tmp/cczbjqIl.s 			page 6
 
 
  260:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -358,7 +358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  314:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LOSS		0x01	/* Out of 8.3 format */
  315:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LFN		0x02	/* Force to create LFN entry */
  316:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LAST		0x04	/* Last segment */
-ARM GAS  /tmp/ccH7dUYB.s 			page 7
+ARM GAS  /tmp/cczbjqIl.s 			page 7
 
 
  317:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_BODY		0x08	/* Lower case flag (body) */
@@ -418,7 +418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  371:Middlewares/Third_Party/FatFs/src/ff.c **** #define BS_BootCode32		90		/* FAT32: Boot code (420-byte) */
  372:Middlewares/Third_Party/FatFs/src/ff.c **** 
  373:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_ZeroedEx		11		/* exFAT: MBZ field (53-byte) */
-ARM GAS  /tmp/ccH7dUYB.s 			page 8
+ARM GAS  /tmp/cczbjqIl.s 			page 8
 
 
  374:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_VolOfsEx		64		/* exFAT: Volume offset from top of the drive [sector] (QWORD) */
@@ -478,7 +478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  428:Middlewares/Third_Party/FatFs/src/ff.c **** #define	XDIR_FileSize		56		/* exFAT: File/Directory size (QWORD) */
  429:Middlewares/Third_Party/FatFs/src/ff.c **** 
  430:Middlewares/Third_Party/FatFs/src/ff.c **** #define	SZDIRE				32		/* Size of a directory entry */
-ARM GAS  /tmp/ccH7dUYB.s 			page 9
+ARM GAS  /tmp/cczbjqIl.s 			page 9
 
 
  431:Middlewares/Third_Party/FatFs/src/ff.c **** #define	DDEM				0xE5	/* Deleted directory entry mark set to DIR_Name[0] */
@@ -538,7 +538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  485:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS == _MIN_SS
  486:Middlewares/Third_Party/FatFs/src/ff.c **** #define	SS(fs)	((UINT)_MAX_SS)	/* Fixed sector size */
  487:Middlewares/Third_Party/FatFs/src/ff.c **** #else
-ARM GAS  /tmp/ccH7dUYB.s 			page 10
+ARM GAS  /tmp/cczbjqIl.s 			page 10
 
 
  488:Middlewares/Third_Party/FatFs/src/ff.c **** #define	SS(fs)	((fs)->ssize)	/* Variable sector size */
@@ -598,7 +598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  542:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
  543:Middlewares/Third_Party/FatFs/src/ff.c **** 
  544:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 0		/* Non-LFN configuration */
-ARM GAS  /tmp/ccH7dUYB.s 			page 11
+ARM GAS  /tmp/cczbjqIl.s 			page 11
 
 
  545:Middlewares/Third_Party/FatFs/src/ff.c **** #define	DEF_NAMBUF
@@ -658,7 +658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  599:Middlewares/Third_Party/FatFs/src/ff.c **** 
  600:Middlewares/Third_Party/FatFs/src/ff.c **** 
  601:Middlewares/Third_Party/FatFs/src/ff.c **** /*--------------------------------------------------------------------------
-ARM GAS  /tmp/ccH7dUYB.s 			page 12
+ARM GAS  /tmp/cczbjqIl.s 			page 12
 
 
  602:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -718,7 +718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
   61              		.cfi_startproc
   62              		@ args = 0, pretend = 0, frame = 0
   63              		@ frame_needed = 0, uses_anonymous_args = 0
-ARM GAS  /tmp/ccH7dUYB.s 			page 13
+ARM GAS  /tmp/cczbjqIl.s 			page 13
 
 
   64              		@ link register save eliminated.
@@ -778,7 +778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  641:Middlewares/Third_Party/FatFs/src/ff.c **** 	rv = rv << 8 | ptr[6];
  642:Middlewares/Third_Party/FatFs/src/ff.c **** 	rv = rv << 8 | ptr[5];
  643:Middlewares/Third_Party/FatFs/src/ff.c **** 	rv = rv << 8 | ptr[4];
-ARM GAS  /tmp/ccH7dUYB.s 			page 14
+ARM GAS  /tmp/cczbjqIl.s 			page 14
 
 
  644:Middlewares/Third_Party/FatFs/src/ff.c **** 	rv = rv << 8 | ptr[3];
@@ -838,7 +838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  140 0000 0170     		strb	r1, [r0]
  141              		.loc 1 663 22 is_stmt 1 view .LVU35
  142              	.LVL13:
-ARM GAS  /tmp/ccH7dUYB.s 			page 15
+ARM GAS  /tmp/cczbjqIl.s 			page 15
 
 
  664:Middlewares/Third_Party/FatFs/src/ff.c **** 	*ptr++ = (BYTE)val; val >>= 8;
@@ -898,7 +898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  686:Middlewares/Third_Party/FatFs/src/ff.c **** 
  687:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
  688:Middlewares/Third_Party/FatFs/src/ff.c **** /* String functions                                                      */
-ARM GAS  /tmp/ccH7dUYB.s 			page 16
+ARM GAS  /tmp/cczbjqIl.s 			page 16
 
 
  689:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
@@ -958,7 +958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  219              	mem_set:
  220              	.LFB1188:
  703:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 17
+ARM GAS  /tmp/cczbjqIl.s 			page 17
 
 
  704:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill memory block */
@@ -1018,7 +1018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  718:Middlewares/Third_Party/FatFs/src/ff.c **** 	int r = 0;
  263              		.loc 1 718 2 view .LVU72
  264              	.L12:
-ARM GAS  /tmp/ccH7dUYB.s 			page 18
+ARM GAS  /tmp/cczbjqIl.s 			page 18
 
 
  719:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -1078,7 +1078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  309              		.loc 1 730 2 is_stmt 1 view .LVU85
  310              		.loc 1 730 8 is_stmt 0 view .LVU86
  311 0002 00E0     		b	.L14
-ARM GAS  /tmp/ccH7dUYB.s 			page 19
+ARM GAS  /tmp/cczbjqIl.s 			page 19
 
 
  312              	.LVL33:
@@ -1138,7 +1138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  756:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) {
  757:Middlewares/Third_Party/FatFs/src/ff.c **** 		ff_rel_grant(fs->sobj);
  758:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
-ARM GAS  /tmp/ccH7dUYB.s 			page 20
+ARM GAS  /tmp/cczbjqIl.s 			page 20
 
 
  759:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -1198,7 +1198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  369 000e 0133     		adds	r3, r3, #1
  370              	.LVL39:
  371              	.L18:
-ARM GAS  /tmp/ccH7dUYB.s 			page 21
+ARM GAS  /tmp/cczbjqIl.s 			page 21
 
 
  779:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (Files[i].fs) {	/* Existing entry */
@@ -1258,7 +1258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  410 0040 022B     		cmp	r3, #2
  411 0042 0BD0     		beq	.L30
  789:Middlewares/Third_Party/FatFs/src/ff.c **** 		return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES;	/* Is there a blank entry for new objec
-ARM GAS  /tmp/ccH7dUYB.s 			page 22
+ARM GAS  /tmp/cczbjqIl.s 			page 22
 
 
  790:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
@@ -1318,7 +1318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  455              		.loc 1 789 35 discriminator 2 view .LVU131
  456 006c 1220     		movs	r0, #18
  457              	.LVL46:
-ARM GAS  /tmp/ccH7dUYB.s 			page 23
+ARM GAS  /tmp/cczbjqIl.s 			page 23
 
 
  789:Middlewares/Third_Party/FatFs/src/ff.c **** 		return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES;	/* Is there a blank entry for new objec
@@ -1378,7 +1378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  501              	.LVL52:
  502              	.L37:
  503              		.loc 1 802 44 is_stmt 1 discriminator 4 view .LVU142
-ARM GAS  /tmp/ccH7dUYB.s 			page 24
+ARM GAS  /tmp/cczbjqIl.s 			page 24
 
 
  504 0004 0130     		adds	r0, r0, #1
@@ -1438,7 +1438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  550 0000 70B4     		push	{r4, r5, r6}
  551              	.LCFI3:
  552              		.cfi_def_cfa_offset 12
-ARM GAS  /tmp/ccH7dUYB.s 			page 25
+ARM GAS  /tmp/cczbjqIl.s 			page 25
 
 
  553              		.cfi_offset 4, -12
@@ -1498,7 +1498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  598 0030 9442     		cmp	r4, r2
  599 0032 E8D1     		bne	.L42
  600              	.L43:
-ARM GAS  /tmp/ccH7dUYB.s 			page 26
+ARM GAS  /tmp/cczbjqIl.s 			page 26
 
 
  820:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
@@ -1558,7 +1558,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  636              	.LVL63:
  823:Middlewares/Third_Party/FatFs/src/ff.c **** 		for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
  637              		.loc 1 823 45 is_stmt 0 discriminator 4 view .LVU180
-ARM GAS  /tmp/ccH7dUYB.s 			page 27
+ARM GAS  /tmp/cczbjqIl.s 			page 27
 
 
  638 005a F7E7     		b	.L45
@@ -1618,7 +1618,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  680 0088 01EB0311 		add	r1, r1, r3, lsl #4
  681 008c 8A81     		strh	r2, [r1, #12]	@ movhi
  834:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 28
+ARM GAS  /tmp/cczbjqIl.s 			page 28
 
 
  835:Middlewares/Third_Party/FatFs/src/ff.c **** 	return i + 1;
@@ -1678,7 +1678,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  726              		@ args = 0, pretend = 0, frame = 0
  727              		@ frame_needed = 0, uses_anonymous_args = 0
  728              		@ link register save eliminated.
-ARM GAS  /tmp/ccH7dUYB.s 			page 29
+ARM GAS  /tmp/cczbjqIl.s 			page 29
 
 
  844:Middlewares/Third_Party/FatFs/src/ff.c **** 	WORD n;
@@ -1738,7 +1738,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  772 0026 33B9     		cbnz	r3, .L65
  773              	.L62:
  774              	.LVL74:
-ARM GAS  /tmp/ccH7dUYB.s 			page 30
+ARM GAS  /tmp/cczbjqIl.s 			page 30
 
 
  775              		.loc 1 853 15 is_stmt 1 discriminator 1 view .LVU224
@@ -1798,7 +1798,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  817              		@ args = 0, pretend = 0, frame = 0
  818              		@ frame_needed = 0, uses_anonymous_args = 0
  819              		@ link register save eliminated.
-ARM GAS  /tmp/ccH7dUYB.s 			page 31
+ARM GAS  /tmp/cczbjqIl.s 			page 31
 
 
  867:Middlewares/Third_Party/FatFs/src/ff.c **** 	UINT i;
@@ -1858,7 +1858,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  860              		.loc 1 870 38 is_stmt 0 discriminator 1 view .LVU245
  861 001c 1A01     		lsls	r2, r3, #4
  862 001e 0024     		movs	r4, #0
-ARM GAS  /tmp/ccH7dUYB.s 			page 32
+ARM GAS  /tmp/cczbjqIl.s 			page 32
 
 
  863 0020 8C50     		str	r4, [r1, r2]
@@ -1918,7 +1918,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  884:Middlewares/Third_Party/FatFs/src/ff.c **** 	FATFS* fs			/* File system object */
  885:Middlewares/Third_Party/FatFs/src/ff.c **** )
  886:Middlewares/Third_Party/FatFs/src/ff.c **** {
-ARM GAS  /tmp/ccH7dUYB.s 			page 33
+ARM GAS  /tmp/cczbjqIl.s 			page 33
 
 
  887:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD wsect;
@@ -1978,7 +1978,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  941:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
  942:Middlewares/Third_Party/FatFs/src/ff.c **** 
  943:Middlewares/Third_Party/FatFs/src/ff.c **** static
-ARM GAS  /tmp/ccH7dUYB.s 			page 34
+ARM GAS  /tmp/cczbjqIl.s 			page 34
 
 
  944:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT sync_fs (	/* FR_OK:succeeded, !=0:error */
@@ -2038,7 +2038,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  989:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (clst >= fs->n_fatent - 2) return 0;		/* Invalid cluster# */
  911              		.loc 1 989 2 is_stmt 1 view .LVU255
  912              		.loc 1 989 16 is_stmt 0 view .LVU256
-ARM GAS  /tmp/ccH7dUYB.s 			page 35
+ARM GAS  /tmp/cczbjqIl.s 			page 35
 
 
  913 0002 8369     		ldr	r3, [r0, #24]
@@ -2098,7 +2098,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1011:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (clst < 2 || clst >= fs->n_fatent) {	/* Check if in valid range */
 1012:Middlewares/Third_Party/FatFs/src/ff.c **** 		val = 1;	/* Internal error */
 1013:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 36
+ARM GAS  /tmp/cczbjqIl.s 			page 36
 
 
 1014:Middlewares/Third_Party/FatFs/src/ff.c **** 	} else {
@@ -2158,7 +2158,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1068:Middlewares/Third_Party/FatFs/src/ff.c **** 
 1069:Middlewares/Third_Party/FatFs/src/ff.c **** 	return val;
 1070:Middlewares/Third_Party/FatFs/src/ff.c **** }
-ARM GAS  /tmp/ccH7dUYB.s 			page 37
+ARM GAS  /tmp/cczbjqIl.s 			page 37
 
 
 1071:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -2218,7 +2218,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1125:Middlewares/Third_Party/FatFs/src/ff.c **** 			break;
 1126:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
 1127:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
-ARM GAS  /tmp/ccH7dUYB.s 			page 38
+ARM GAS  /tmp/cczbjqIl.s 			page 38
 
 
 1128:Middlewares/Third_Party/FatFs/src/ff.c **** 	return res;
@@ -2278,7 +2278,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1182:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/
 1183:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set/Clear a block of allocation bitmap */
 1184:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/
-ARM GAS  /tmp/ccH7dUYB.s 			page 39
+ARM GAS  /tmp/cczbjqIl.s 			page 39
 
 
 1185:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -2338,7 +2338,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1239:Middlewares/Third_Party/FatFs/src/ff.c **** 
 1240:Middlewares/Third_Party/FatFs/src/ff.c **** 
 1241:Middlewares/Third_Party/FatFs/src/ff.c **** /*---------------------------------------------*/
-ARM GAS  /tmp/ccH7dUYB.s 			page 40
+ARM GAS  /tmp/cczbjqIl.s 			page 40
 
 
 1242:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill the last fragment of the FAT chain     */
@@ -2398,7 +2398,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1296:Middlewares/Third_Party/FatFs/src/ff.c **** 	do {
 1297:Middlewares/Third_Party/FatFs/src/ff.c **** 		nxt = get_fat(obj, clst);			/* Get cluster status */
 1298:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (nxt == 0) break;				/* Empty cluster? */
-ARM GAS  /tmp/ccH7dUYB.s 			page 41
+ARM GAS  /tmp/cczbjqIl.s 			page 41
 
 
 1299:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (nxt == 1) return FR_INT_ERR;	/* Internal error? */
@@ -2458,7 +2458,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1353:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD clst			/* Cluster# to stretch, 0:Create a new chain */
 1354:Middlewares/Third_Party/FatFs/src/ff.c **** )
 1355:Middlewares/Third_Party/FatFs/src/ff.c **** {
-ARM GAS  /tmp/ccH7dUYB.s 			page 42
+ARM GAS  /tmp/cczbjqIl.s 			page 42
 
 
 1356:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD cs, ncl, scl;
@@ -2518,7 +2518,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1410:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ncl == scl) return 0;		/* No free cluster */
 1411:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
 1412:Middlewares/Third_Party/FatFs/src/ff.c **** 		res = put_fat(fs, ncl, 0xFFFFFFFF);	/* Mark the new cluster 'EOC' */
-ARM GAS  /tmp/ccH7dUYB.s 			page 43
+ARM GAS  /tmp/cczbjqIl.s 			page 43
 
 
 1413:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res == FR_OK && clst != 0) {
@@ -2578,7 +2578,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  963              		.loc 1 1450 2 is_stmt 1 view .LVU272
  964              		.loc 1 1450 21 is_stmt 0 view .LVU273
  965 0006 9089     		ldrh	r0, [r2, #12]
-ARM GAS  /tmp/ccH7dUYB.s 			page 44
+ARM GAS  /tmp/cczbjqIl.s 			page 44
 
 
  966              	.LVL92:
@@ -2638,7 +2638,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1005              	.LVL100:
  1006              		.loc 1 1457 12 view .LVU292
  1007 0022 0844     		add	r0, r0, r1
-ARM GAS  /tmp/ccH7dUYB.s 			page 45
+ARM GAS  /tmp/cczbjqIl.s 			page 45
 
 
  1008              	.L86:
@@ -2698,7 +2698,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1499:Middlewares/Third_Party/FatFs/src/ff.c **** 			ofs -= csz;
 1500:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
 1501:Middlewares/Third_Party/FatFs/src/ff.c **** 		dp->sect = clust2sect(fs, clst);
-ARM GAS  /tmp/ccH7dUYB.s 			page 46
+ARM GAS  /tmp/cczbjqIl.s 			page 46
 
 
 1502:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
@@ -2758,7 +2758,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1556:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (_FS_EXFAT) dp->obj.stat |= 4;			/* The directory needs to be updated */
 1557:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (sync_window(fs) != FR_OK) return FR_DISK_ERR;	/* Flush disk access window */
 1558:Middlewares/Third_Party/FatFs/src/ff.c **** 					mem_set(fs->win, 0, SS(fs));				/* Clear window buffer */
-ARM GAS  /tmp/ccH7dUYB.s 			page 47
+ARM GAS  /tmp/cczbjqIl.s 			page 47
 
 
 1559:Middlewares/Third_Party/FatFs/src/ff.c **** 					for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) {	/* Fill t
@@ -2818,7 +2818,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1613:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
 1614:Middlewares/Third_Party/FatFs/src/ff.c **** 			res = dir_next(dp, 1);
 1615:Middlewares/Third_Party/FatFs/src/ff.c **** 		} while (res == FR_OK);	/* Next entry with table stretch enabled */
-ARM GAS  /tmp/ccH7dUYB.s 			page 48
+ARM GAS  /tmp/cczbjqIl.s 			page 48
 
 
 1616:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
@@ -2878,7 +2878,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1052              	.L91:
 1641:Middlewares/Third_Party/FatFs/src/ff.c **** 		cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16;
 1642:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
-ARM GAS  /tmp/ccH7dUYB.s 			page 49
+ARM GAS  /tmp/cczbjqIl.s 			page 49
 
 
 1643:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -2938,7 +2938,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1090              	.LCFI11:
  1091              		.cfi_def_cfa_offset 16
  1092              		.cfi_offset 4, -16
-ARM GAS  /tmp/ccH7dUYB.s 			page 50
+ARM GAS  /tmp/cczbjqIl.s 			page 50
 
 
  1093              		.cfi_offset 5, -12
@@ -2998,7 +2998,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1666:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/
 1667:Middlewares/Third_Party/FatFs/src/ff.c **** /* FAT-LFN: LFN handling                                                  */
 1668:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/
-ARM GAS  /tmp/ccH7dUYB.s 			page 51
+ARM GAS  /tmp/cczbjqIl.s 			page 51
 
 
 1669:Middlewares/Third_Party/FatFs/src/ff.c **** static
@@ -3058,7 +3058,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1723:Middlewares/Third_Party/FatFs/src/ff.c **** 
 1724:Middlewares/Third_Party/FatFs/src/ff.c **** 	i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13;	/* Offset in the LFN buffer */
 1725:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 52
+ARM GAS  /tmp/cczbjqIl.s 			page 52
 
 
 1726:Middlewares/Third_Party/FatFs/src/ff.c **** 	for (wc = 1, s = 0; s < 13; s++) {		/* Process all characters in the entry */
@@ -3118,7 +3118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1780:Middlewares/Third_Party/FatFs/src/ff.c **** 
 1781:Middlewares/Third_Party/FatFs/src/ff.c **** 
 1782:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 53
+ARM GAS  /tmp/cczbjqIl.s 			page 53
 
 
 1783:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 && !_FS_READONLY
@@ -3178,7 +3178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1837:Middlewares/Third_Party/FatFs/src/ff.c **** }
 1838:Middlewares/Third_Party/FatFs/src/ff.c **** #endif	/* _USE_LFN != 0 && !_FS_READONLY */
 1839:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 54
+ARM GAS  /tmp/cczbjqIl.s 			page 54
 
 
 1840:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -3238,7 +3238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1894:Middlewares/Third_Party/FatFs/src/ff.c **** 	const WCHAR* name	/* File name to be calculated */
 1895:Middlewares/Third_Party/FatFs/src/ff.c **** )
 1896:Middlewares/Third_Party/FatFs/src/ff.c **** {
-ARM GAS  /tmp/ccH7dUYB.s 			page 55
+ARM GAS  /tmp/cczbjqIl.s 			page 55
 
 
 1897:Middlewares/Third_Party/FatFs/src/ff.c **** 	WCHAR chr;
@@ -3298,7 +3298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1951:Middlewares/Third_Party/FatFs/src/ff.c **** 		if ((si % SZDIRE) == 0) si += 2;		/* Skip entry type field */
 1952:Middlewares/Third_Party/FatFs/src/ff.c **** 		w = ff_convert(ld_word(dirb + si), 0);	/* Get a character and Unicode -> OEM */
 1953:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (_DF1S && w >= 0x100) {				/* Is it a double byte char? (always false at SBCS cfg) */
-ARM GAS  /tmp/ccH7dUYB.s 			page 56
+ARM GAS  /tmp/cczbjqIl.s 			page 56
 
 
 1954:Middlewares/Third_Party/FatFs/src/ff.c **** 			fno->fname[di++] = (char)(w >> 8);	/* Put 1st byte of the DBC */
@@ -3358,7 +3358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2008:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res != FR_OK) return res;
 2009:Middlewares/Third_Party/FatFs/src/ff.c **** 		res = move_window(dp->obj.fs, dp->sect);
 2010:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res != FR_OK) return res;
-ARM GAS  /tmp/ccH7dUYB.s 			page 57
+ARM GAS  /tmp/cczbjqIl.s 			page 57
 
 
 2011:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (dp->dir[XDIR_Type] != 0xC1) return FR_INT_ERR;
@@ -3418,7 +3418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2065:Middlewares/Third_Party/FatFs/src/ff.c **** 	st_word(dirb + XDIR_SetSum, xdir_sum(dirb));
 2066:Middlewares/Third_Party/FatFs/src/ff.c **** 	nent = dirb[XDIR_NumSec] + 1;
 2067:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 58
+ARM GAS  /tmp/cczbjqIl.s 			page 58
 
 
 2068:Middlewares/Third_Party/FatFs/src/ff.c **** 	/* Store the set of directory to the volume */
@@ -3478,7 +3478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2122:Middlewares/Third_Party/FatFs/src/ff.c **** 
 2123:Middlewares/Third_Party/FatFs/src/ff.c **** 
 2124:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 59
+ARM GAS  /tmp/cczbjqIl.s 			page 59
 
 
 2125:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 1 || _FS_RPATH >= 2 || _USE_LABEL || _FS_EXFAT
@@ -3538,7 +3538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2179:Middlewares/Third_Party/FatFs/src/ff.c **** 					ord = (c == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0
 2180:Middlewares/Third_Party/FatFs/src/ff.c **** 				} else {					/* An SFN entry is found */
 2181:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (ord || sum != sum_sfn(dp->dir)) {	/* Is there a valid LFN? */
-ARM GAS  /tmp/ccH7dUYB.s 			page 60
+ARM GAS  /tmp/cczbjqIl.s 			page 60
 
 
 2182:Middlewares/Third_Party/FatFs/src/ff.c **** 						dp->blk_ofs = 0xFFFFFFFF;			/* It has no LFN. */
@@ -3598,7 +3598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2236:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break;
 2237:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
 2238:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (nc == 0 && !fs->lfnbuf[ni]) break;	/* Name matched? */
-ARM GAS  /tmp/ccH7dUYB.s 			page 61
+ARM GAS  /tmp/cczbjqIl.s 			page 61
 
 
 2239:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
@@ -3658,7 +3658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2293:Middlewares/Third_Party/FatFs/src/ff.c **** 	DIR* dp				/* Target directory with object name to be created */
 2294:Middlewares/Third_Party/FatFs/src/ff.c **** )
 2295:Middlewares/Third_Party/FatFs/src/ff.c **** {
-ARM GAS  /tmp/ccH7dUYB.s 			page 62
+ARM GAS  /tmp/cczbjqIl.s 			page 62
 
 
 2296:Middlewares/Third_Party/FatFs/src/ff.c **** 	FRESULT res;
@@ -3718,7 +3718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2350:Middlewares/Third_Party/FatFs/src/ff.c **** 	res = dir_alloc(dp, nent);		/* Allocate entries */
 2351:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (res == FR_OK && --nent) {	/* Set LFN entry if needed */
 2352:Middlewares/Third_Party/FatFs/src/ff.c **** 		res = dir_sdi(dp, dp->dptr - nent * SZDIRE);
-ARM GAS  /tmp/ccH7dUYB.s 			page 63
+ARM GAS  /tmp/cczbjqIl.s 			page 63
 
 
 2353:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res == FR_OK) {
@@ -3778,7 +3778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2407:Middlewares/Third_Party/FatFs/src/ff.c **** 		do {
 2408:Middlewares/Third_Party/FatFs/src/ff.c **** 			res = move_window(fs, dp->sect);
 2409:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (res != FR_OK) break;
-ARM GAS  /tmp/ccH7dUYB.s 			page 64
+ARM GAS  /tmp/cczbjqIl.s 			page 64
 
 
 2410:Middlewares/Third_Party/FatFs/src/ff.c **** 			/* Mark an entry 'deleted' */
@@ -3838,7 +3838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1151              		.loc 1 2450 2 view .LVU325
 2451:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD tm;
  1152              		.loc 1 2451 2 view .LVU326
-ARM GAS  /tmp/ccH7dUYB.s 			page 65
+ARM GAS  /tmp/cczbjqIl.s 			page 65
 
 
 2452:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0
@@ -3898,7 +3898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2495:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
 2496:Middlewares/Third_Party/FatFs/src/ff.c **** #if _LFN_UNICODE
 2497:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (IsDBCS1(c) && i != 8 && i != 11 && IsDBCS2(dp->dir[i])) {
-ARM GAS  /tmp/ccH7dUYB.s 			page 66
+ARM GAS  /tmp/cczbjqIl.s 			page 66
 
 
 2498:Middlewares/Third_Party/FatFs/src/ff.c **** 			c = c << 8 | dp->dir[i++];
@@ -3958,7 +3958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1189              		.loc 1 2520 11 is_stmt 1 view .LVU340
  1190 0022 0A2B     		cmp	r3, #10
  1191 0024 0ED8     		bhi	.L109
-ARM GAS  /tmp/ccH7dUYB.s 			page 67
+ARM GAS  /tmp/cczbjqIl.s 			page 67
 
 
 2521:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (c == ' ') continue;				/* Skip padding spaces */
@@ -4018,7 +4018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1231              		.loc 1 2527 16 view .LVU356
  1232 0046 0023     		movs	r3, #0
  1233              	.LVL127:
-ARM GAS  /tmp/ccH7dUYB.s 			page 68
+ARM GAS  /tmp/cczbjqIl.s 			page 68
 
 
  1234              		.loc 1 2527 16 view .LVU357
@@ -4078,7 +4078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1279              		.align	1
  1280              		.syntax unified
  1281              		.thumb
-ARM GAS  /tmp/ccH7dUYB.s 			page 69
+ARM GAS  /tmp/cczbjqIl.s 			page 69
 
 
  1282              		.thumb_func
@@ -4138,7 +4138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2585:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (!*pat && inf) return 1;		/* (short circuit) */
 2586:Middlewares/Third_Party/FatFs/src/ff.c **** 
 2587:Middlewares/Third_Party/FatFs/src/ff.c **** 	do {
-ARM GAS  /tmp/ccH7dUYB.s 			page 70
+ARM GAS  /tmp/cczbjqIl.s 			page 70
 
 
 2588:Middlewares/Third_Party/FatFs/src/ff.c **** 		pp = pat; np = nam;			/* Top of pattern and name to match */
@@ -4198,7 +4198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1306 0006 8A46     		mov	r10, r1
 2623:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0	/* LFN configuration */
 2624:Middlewares/Third_Party/FatFs/src/ff.c **** 	BYTE b, cf;
-ARM GAS  /tmp/ccH7dUYB.s 			page 71
+ARM GAS  /tmp/cczbjqIl.s 			page 71
 
 
 2625:Middlewares/Third_Party/FatFs/src/ff.c **** 	WCHAR w, *lfn;
@@ -4258,7 +4258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2679:Middlewares/Third_Party/FatFs/src/ff.c **** 	for (;;) {
 2680:Middlewares/Third_Party/FatFs/src/ff.c **** 		w = lfn[si++];					/* Get an LFN character */
 2681:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (!w) break;					/* Break on end of the LFN */
-ARM GAS  /tmp/ccH7dUYB.s 			page 72
+ARM GAS  /tmp/cczbjqIl.s 			page 72
 
 
 2682:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (w == ' ' || (w == '.' && si != di)) {	/* Remove spaces and dots */
@@ -4318,7 +4318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2736:Middlewares/Third_Party/FatFs/src/ff.c **** 	dp->fn[NSFLAG] = cf;	/* SFN is created */
 2737:Middlewares/Third_Party/FatFs/src/ff.c **** 
 2738:Middlewares/Third_Party/FatFs/src/ff.c **** 	return FR_OK;
-ARM GAS  /tmp/ccH7dUYB.s 			page 73
+ARM GAS  /tmp/cczbjqIl.s 			page 73
 
 
 2739:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -4378,7 +4378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2761:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
 2762:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 2763:Middlewares/Third_Party/FatFs/src/ff.c **** 	for (;;) {
-ARM GAS  /tmp/ccH7dUYB.s 			page 74
+ARM GAS  /tmp/cczbjqIl.s 			page 74
 
 
 2764:Middlewares/Third_Party/FatFs/src/ff.c **** 		c = (BYTE)p[si++];
@@ -4438,7 +4438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1360              		.loc 1 2796 2 is_stmt 1 view .LVU400
  1361              		.loc 1 2796 5 is_stmt 0 view .LVU401
  1362 0036 002D     		cmp	r5, #0
-ARM GAS  /tmp/ccH7dUYB.s 			page 75
+ARM GAS  /tmp/cczbjqIl.s 			page 75
 
 
  1363 0038 44D0     		beq	.L125
@@ -4498,7 +4498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2791:Middlewares/Third_Party/FatFs/src/ff.c **** 			sfn[i++] = c;
  1404              		.loc 1 2791 7 view .LVU419
  1405 0066 192B     		cmp	r3, #25
-ARM GAS  /tmp/ccH7dUYB.s 			page 76
+ARM GAS  /tmp/cczbjqIl.s 			page 76
 
 
  1406 0068 01D8     		bhi	.L120
@@ -4558,7 +4558,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1444              		.loc 1 2770 3 is_stmt 1 view .LVU435
 2770:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ni == 11 || c != '.') return FR_INVALID_NAME;	/* Over size or invalid dot */
  1445              		.loc 1 2770 6 is_stmt 0 view .LVU436
-ARM GAS  /tmp/ccH7dUYB.s 			page 77
+ARM GAS  /tmp/cczbjqIl.s 			page 77
 
 
  1446 0088 2E2C     		cmp	r4, #46
@@ -4618,7 +4618,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2798:Middlewares/Third_Party/FatFs/src/ff.c **** 	sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0;		/* Set last segment flag if end of the path */
  1487              		.loc 1 2798 29 is_stmt 0 discriminator 1 view .LVU450
  1488 00ae 0523     		movs	r3, #5
-ARM GAS  /tmp/ccH7dUYB.s 			page 78
+ARM GAS  /tmp/cczbjqIl.s 			page 78
 
 
  1489 00b0 89F82430 		strb	r3, [r9, #36]
@@ -4678,7 +4678,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2813:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT follow_path (	/* FR_OK(0): successful, !=0: error code */
 2814:Middlewares/Third_Party/FatFs/src/ff.c **** 	DIR* dp,			/* Directory object to return last directory and found object */
 2815:Middlewares/Third_Party/FatFs/src/ff.c **** 	const TCHAR* path	/* Full-path string to find a file or directory */
-ARM GAS  /tmp/ccH7dUYB.s 			page 79
+ARM GAS  /tmp/cczbjqIl.s 			page 79
 
 
 2816:Middlewares/Third_Party/FatFs/src/ff.c **** )
@@ -4738,7 +4738,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2870:Middlewares/Third_Party/FatFs/src/ff.c **** 				break;
 2871:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
 2872:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ns & NS_LAST) break;			/* Last segment matched. Function completed. */
-ARM GAS  /tmp/ccH7dUYB.s 			page 80
+ARM GAS  /tmp/cczbjqIl.s 			page 80
 
 
 2873:Middlewares/Third_Party/FatFs/src/ff.c **** 			/* Get into the sub-directory */
@@ -4798,7 +4798,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2916:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 2917:Middlewares/Third_Party/FatFs/src/ff.c **** 
 2918:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 81
+ARM GAS  /tmp/cczbjqIl.s 			page 81
 
 
 2919:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (*path) {	/* If the pointer is not a null */
@@ -4858,7 +4858,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2940:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (i < _VOLUMES) {	/* If a drive id is found, get the value and strip it */
 2941:Middlewares/Third_Party/FatFs/src/ff.c **** 					vol = (int)i;
 2942:Middlewares/Third_Party/FatFs/src/ff.c **** 					*path = tt;
-ARM GAS  /tmp/ccH7dUYB.s 			page 82
+ARM GAS  /tmp/cczbjqIl.s 			page 82
 
 
 2943:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
@@ -4918,7 +4918,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2927:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
  1603              		.loc 1 2927 12 is_stmt 0 view .LVU485
  1604 0036 0132     		adds	r2, r2, #1
-ARM GAS  /tmp/ccH7dUYB.s 			page 83
+ARM GAS  /tmp/cczbjqIl.s 			page 83
 
 
  1605              	.LVL172:
@@ -4978,7 +4978,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2975:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90
 2976:Middlewares/Third_Party/FatFs/src/ff.c **** 		if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0;	/* Check "FAT" string *
 2977:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0;			/* Check "FAT3" string */
-ARM GAS  /tmp/ccH7dUYB.s 			page 84
+ARM GAS  /tmp/cczbjqIl.s 			page 84
 
 
 2978:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
@@ -5038,7 +5038,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3032:Middlewares/Third_Party/FatFs/src/ff.c **** 	/* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */
 3033:Middlewares/Third_Party/FatFs/src/ff.c **** 
 3034:Middlewares/Third_Party/FatFs/src/ff.c **** 	fs->fs_type = 0;					/* Clear the file system object */
-ARM GAS  /tmp/ccH7dUYB.s 			page 85
+ARM GAS  /tmp/cczbjqIl.s 			page 85
 
 
 3035:Middlewares/Third_Party/FatFs/src/ff.c **** 	fs->drv = LD2PD(vol);				/* Bind the logical drive and a physical drive */
@@ -5098,7 +5098,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3089:Middlewares/Third_Party/FatFs/src/ff.c **** 		fs->csize = 1 << fs->win[BPB_SecPerClusEx];		/* Cluster size */
 3090:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (fs->csize == 0)	return FR_NO_FILESYSTEM;	/* (Must be 1..32768) */
 3091:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 86
+ARM GAS  /tmp/cczbjqIl.s 			page 86
 
 
 3092:Middlewares/Third_Party/FatFs/src/ff.c **** 		nclst = ld_dword(fs->win + BPB_NumClusEx);		/* Number of clusters */
@@ -5158,7 +5158,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3146:Middlewares/Third_Party/FatFs/src/ff.c **** 
 3147:Middlewares/Third_Party/FatFs/src/ff.c **** 		/* Boundaries and Limits */
 3148:Middlewares/Third_Party/FatFs/src/ff.c **** 		fs->n_fatent = nclst + 2;						/* Number of FAT entries */
-ARM GAS  /tmp/ccH7dUYB.s 			page 87
+ARM GAS  /tmp/cczbjqIl.s 			page 87
 
 
 3149:Middlewares/Third_Party/FatFs/src/ff.c **** 		fs->volbase = bsect;							/* Volume start sector */
@@ -5218,7 +5218,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3203:Middlewares/Third_Party/FatFs/src/ff.c **** 	clear_lock(fs);
 3204:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 3205:Middlewares/Third_Party/FatFs/src/ff.c **** 	return FR_OK;
-ARM GAS  /tmp/ccH7dUYB.s 			page 88
+ARM GAS  /tmp/cczbjqIl.s 			page 88
 
 
 3206:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -5278,7 +5278,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3260:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_mount (
 3261:Middlewares/Third_Party/FatFs/src/ff.c **** 	FATFS* fs,			/* Pointer to the file system object (NULL:unmount)*/
 3262:Middlewares/Third_Party/FatFs/src/ff.c **** 	const TCHAR* path,	/* Logical drive number to be mounted/unmounted */
-ARM GAS  /tmp/ccH7dUYB.s 			page 89
+ARM GAS  /tmp/cczbjqIl.s 			page 89
 
 
 3263:Middlewares/Third_Party/FatFs/src/ff.c **** 	BYTE opt			/* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */
@@ -5338,7 +5338,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3317:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
 3318:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD dw, cl, bcs, clst, sc;
 3319:Middlewares/Third_Party/FatFs/src/ff.c **** 	FSIZE_t ofs;
-ARM GAS  /tmp/ccH7dUYB.s 			page 90
+ARM GAS  /tmp/cczbjqIl.s 			page 90
 
 
 3320:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -5398,7 +5398,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3374:Middlewares/Third_Party/FatFs/src/ff.c **** 					st_dword(fs->dirbuf + XDIR_CrtTime, dw);	/* Set created time */
 3375:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->dirbuf[XDIR_CrtTime10] = 0;
 3376:Middlewares/Third_Party/FatFs/src/ff.c **** 					st_dword(fs->dirbuf + XDIR_ModTime, dw);	/* Set modified time */
-ARM GAS  /tmp/ccH7dUYB.s 			page 91
+ARM GAS  /tmp/cczbjqIl.s 			page 91
 
 
 3377:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->dirbuf[XDIR_ModTime10] = 0;
@@ -5458,7 +5458,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3431:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
 3432:Middlewares/Third_Party/FatFs/src/ff.c **** #else		/* R/O configuration */
 3433:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res == FR_OK) {
-ARM GAS  /tmp/ccH7dUYB.s 			page 92
+ARM GAS  /tmp/cczbjqIl.s 			page 92
 
 
 3434:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (dj.fn[NSFLAG] & NS_NONAME) {	/* Origin directory itself? */
@@ -5518,7 +5518,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3488:Middlewares/Third_Party/FatFs/src/ff.c **** 						if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR;
 3489:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 3490:Middlewares/Third_Party/FatFs/src/ff.c **** 					}
-ARM GAS  /tmp/ccH7dUYB.s 			page 93
+ARM GAS  /tmp/cczbjqIl.s 			page 93
 
 
 3491:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
@@ -5578,7 +5578,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3545:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 3546:Middlewares/Third_Party/FatFs/src/ff.c **** 					{
 3547:Middlewares/Third_Party/FatFs/src/ff.c **** 						clst = get_fat(&fp->obj, fp->clust);	/* Follow cluster chain on the FAT */
-ARM GAS  /tmp/ccH7dUYB.s 			page 94
+ARM GAS  /tmp/cczbjqIl.s 			page 94
 
 
 3548:Middlewares/Third_Party/FatFs/src/ff.c **** 					}
@@ -5638,7 +5638,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3602:Middlewares/Third_Party/FatFs/src/ff.c **** 
 3603:Middlewares/Third_Party/FatFs/src/ff.c **** 
 3604:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 95
+ARM GAS  /tmp/cczbjqIl.s 			page 95
 
 
 3605:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -5698,7 +5698,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3659:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (fp->obj.sclust == 0) fp->obj.sclust = clst;	/* Set start cluster if the first write */
 3660:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
 3661:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_TINY
-ARM GAS  /tmp/ccH7dUYB.s 			page 96
+ARM GAS  /tmp/cczbjqIl.s 			page 96
 
 
 3662:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR);	/* Write-back s
@@ -5758,7 +5758,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3716:Middlewares/Third_Party/FatFs/src/ff.c **** 		fp->flag |= FA_DIRTY;
 3717:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 3718:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
-ARM GAS  /tmp/ccH7dUYB.s 			page 97
+ARM GAS  /tmp/cczbjqIl.s 			page 97
 
 
 3719:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -5818,7 +5818,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3773:Middlewares/Third_Party/FatFs/src/ff.c **** 						st_dword(fs->dirbuf + XDIR_AccTime, 0);
 3774:Middlewares/Third_Party/FatFs/src/ff.c **** 						res = store_xdir(&dj);	/* Restore it to the directory */
 3775:Middlewares/Third_Party/FatFs/src/ff.c **** 						if (res == FR_OK) {
-ARM GAS  /tmp/ccH7dUYB.s 			page 98
+ARM GAS  /tmp/cczbjqIl.s 			page 98
 
 
 3776:Middlewares/Third_Party/FatFs/src/ff.c **** 							res = sync_fs(fs);
@@ -5878,7 +5878,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3830:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 3831:Middlewares/Third_Party/FatFs/src/ff.c **** 			{
 3832:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->obj.fs = 0;			/* Invalidate file object */
-ARM GAS  /tmp/ccH7dUYB.s 			page 99
+ARM GAS  /tmp/cczbjqIl.s 			page 99
 
 
 3833:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
@@ -5938,7 +5938,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3887:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT
 3888:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (fs->fs_type == FS_EXFAT) {
 3889:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->cdc_scl = dj.obj.c_scl;
-ARM GAS  /tmp/ccH7dUYB.s 			page 100
+ARM GAS  /tmp/cczbjqIl.s 			page 100
 
 
 3890:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->cdc_size = dj.obj.c_size;
@@ -5998,7 +5998,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3944:Middlewares/Third_Party/FatFs/src/ff.c **** 			dj.obj.sclust = fs->cdir;				/* Start to follow upper directory from current directory */
 3945:Middlewares/Third_Party/FatFs/src/ff.c **** 			while ((ccl = dj.obj.sclust) != 0) {	/* Repeat while current directory is a sub-directory */
 3946:Middlewares/Third_Party/FatFs/src/ff.c **** 				res = dir_sdi(&dj, 1 * SZDIRE);	/* Get parent directory */
-ARM GAS  /tmp/ccH7dUYB.s 			page 101
+ARM GAS  /tmp/cczbjqIl.s 			page 101
 
 
 3947:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (res != FR_OK) break;
@@ -6058,7 +6058,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4001:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_lseek (
 4002:Middlewares/Third_Party/FatFs/src/ff.c **** 	FIL* fp,		/* Pointer to the file object */
 4003:Middlewares/Third_Party/FatFs/src/ff.c **** 	FSIZE_t ofs		/* File pointer from top of file */
-ARM GAS  /tmp/ccH7dUYB.s 			page 102
+ARM GAS  /tmp/cczbjqIl.s 			page 102
 
 
 4004:Middlewares/Third_Party/FatFs/src/ff.c **** )
@@ -6118,7 +6118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4058:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (fp->fptr % SS(fs) && dsc != fp->sect) {	/* Refill sector cache if needed */
 4059:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
 4060:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
-ARM GAS  /tmp/ccH7dUYB.s 			page 103
+ARM GAS  /tmp/cczbjqIl.s 			page 103
 
 
 4061:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (fp->flag & FA_DIRTY) {		/* Write-back dirty sector cache */
@@ -6178,7 +6178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4115:Middlewares/Third_Party/FatFs/src/ff.c **** 							ofs = 0; break;
 4116:Middlewares/Third_Party/FatFs/src/ff.c **** 						}
 4117:Middlewares/Third_Party/FatFs/src/ff.c **** 					} else
-ARM GAS  /tmp/ccH7dUYB.s 			page 104
+ARM GAS  /tmp/cczbjqIl.s 			page 104
 
 
 4118:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -6238,7 +6238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4172:Middlewares/Third_Party/FatFs/src/ff.c **** 
 4173:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (!dp) return FR_INVALID_OBJECT;
 4174:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 105
+ARM GAS  /tmp/cczbjqIl.s 			page 105
 
 
 4175:Middlewares/Third_Party/FatFs/src/ff.c **** 	/* Get logical drive */
@@ -6298,7 +6298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4229:Middlewares/Third_Party/FatFs/src/ff.c **** /* Close Directory                                                       */
 4230:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
 4231:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 106
+ARM GAS  /tmp/cczbjqIl.s 			page 106
 
 
 4232:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_closedir (
@@ -6358,7 +6358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4286:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (res == FR_NO_FILE) res = FR_OK;	/* Ignore end of directory now */
 4287:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
 4288:Middlewares/Third_Party/FatFs/src/ff.c **** 			FREE_NAMBUF();
-ARM GAS  /tmp/ccH7dUYB.s 			page 107
+ARM GAS  /tmp/cczbjqIl.s 			page 107
 
 
 4289:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
@@ -6418,7 +6418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4343:Middlewares/Third_Party/FatFs/src/ff.c **** 
 4344:Middlewares/Third_Party/FatFs/src/ff.c **** #endif	/* _USE_FIND */
 4345:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 108
+ARM GAS  /tmp/cczbjqIl.s 			page 108
 
 
 4346:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -6478,7 +6478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4400:Middlewares/Third_Party/FatFs/src/ff.c **** 
 4401:Middlewares/Third_Party/FatFs/src/ff.c **** 
 4402:Middlewares/Third_Party/FatFs/src/ff.c **** 	/* Get logical drive */
-ARM GAS  /tmp/ccH7dUYB.s 			page 109
+ARM GAS  /tmp/cczbjqIl.s 			page 109
 
 
 4403:Middlewares/Third_Party/FatFs/src/ff.c **** 	res = find_volume(&path, &fs, 0);
@@ -6538,7 +6538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4457:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
 4458:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
 4459:Middlewares/Third_Party/FatFs/src/ff.c **** 			*nclst = nfree;			/* Return the free clusters */
-ARM GAS  /tmp/ccH7dUYB.s 			page 110
+ARM GAS  /tmp/cczbjqIl.s 			page 110
 
 
 4460:Middlewares/Third_Party/FatFs/src/ff.c **** 			fs->free_clst = nfree;	/* Now free_clst is valid */
@@ -6598,7 +6598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4514:Middlewares/Third_Party/FatFs/src/ff.c **** 
 4515:Middlewares/Third_Party/FatFs/src/ff.c **** 	LEAVE_FF(fs, res);
 4516:Middlewares/Third_Party/FatFs/src/ff.c **** }
-ARM GAS  /tmp/ccH7dUYB.s 			page 111
+ARM GAS  /tmp/cczbjqIl.s 			page 111
 
 
 4517:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -6658,7 +6658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4571:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (dj.obj.attr & AM_DIR) {			/* Is it a sub-directory? */
 4572:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_RPATH != 0
 4573:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (dclst == fs->cdir) {		 		/* Is it the current directory? */
-ARM GAS  /tmp/ccH7dUYB.s 			page 112
+ARM GAS  /tmp/cczbjqIl.s 			page 112
 
 
 4574:Middlewares/Third_Party/FatFs/src/ff.c **** 						res = FR_DENIED;
@@ -6718,7 +6718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4628:Middlewares/Third_Party/FatFs/src/ff.c **** 	UINT n;
 4629:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD dsc, dcl, pcl, tm;
 4630:Middlewares/Third_Party/FatFs/src/ff.c **** 	DEF_NAMBUF
-ARM GAS  /tmp/ccH7dUYB.s 			page 113
+ARM GAS  /tmp/cczbjqIl.s 			page 113
 
 
 4631:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -6778,7 +6778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4685:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->dirbuf[XDIR_GenFlags] = 3;				/* Initialize the object flag (contiguous) */
 4686:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->dirbuf[XDIR_Attr] = AM_DIR;				/* Attribute */
 4687:Middlewares/Third_Party/FatFs/src/ff.c **** 					res = store_xdir(&dj);
-ARM GAS  /tmp/ccH7dUYB.s 			page 114
+ARM GAS  /tmp/cczbjqIl.s 			page 114
 
 
 4688:Middlewares/Third_Party/FatFs/src/ff.c **** 				} else
@@ -6838,7 +6838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4742:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res == FR_OK) {						/* Object to be renamed is found */
 4743:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT
 4744:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (fs->fs_type == FS_EXFAT) {	/* At exFAT */
-ARM GAS  /tmp/ccH7dUYB.s 			page 115
+ARM GAS  /tmp/cczbjqIl.s 			page 115
 
 
 4745:Middlewares/Third_Party/FatFs/src/ff.c **** 				BYTE nf, nn;
@@ -6898,7 +6898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4799:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (res == FR_OK) {
 4800:Middlewares/Third_Party/FatFs/src/ff.c **** 				res = dir_remove(&djo);		/* Remove old entry */
 4801:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (res == FR_OK) {
-ARM GAS  /tmp/ccH7dUYB.s 			page 116
+ARM GAS  /tmp/cczbjqIl.s 			page 116
 
 
 4802:Middlewares/Third_Party/FatFs/src/ff.c **** 					res = sync_fs(fs);
@@ -6958,7 +6958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4856:Middlewares/Third_Party/FatFs/src/ff.c **** 				res = sync_fs(fs);
 4857:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
 4858:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
-ARM GAS  /tmp/ccH7dUYB.s 			page 117
+ARM GAS  /tmp/cczbjqIl.s 			page 117
 
 
 4859:Middlewares/Third_Party/FatFs/src/ff.c **** 		FREE_NAMBUF();
@@ -7018,7 +7018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4913:Middlewares/Third_Party/FatFs/src/ff.c **** 
 4914:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LABEL
 4915:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
-ARM GAS  /tmp/ccH7dUYB.s 			page 118
+ARM GAS  /tmp/cczbjqIl.s 			page 118
 
 
 4916:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get Volume Label                                                      */
@@ -7078,7 +7078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4970:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
 4971:Middlewares/Third_Party/FatFs/src/ff.c **** 					} while (di < 11);
 4972:Middlewares/Third_Party/FatFs/src/ff.c **** 					do {				/* Truncate trailing spaces */
-ARM GAS  /tmp/ccH7dUYB.s 			page 119
+ARM GAS  /tmp/cczbjqIl.s 			page 119
 
 
 4973:Middlewares/Third_Party/FatFs/src/ff.c **** 						label[di] = 0;
@@ -7138,7 +7138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5027:Middlewares/Third_Party/FatFs/src/ff.c **** 	res = find_volume(&label, &fs, FA_WRITE);
 5028:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (res != FR_OK) LEAVE_FF(fs, res);
 5029:Middlewares/Third_Party/FatFs/src/ff.c **** 	dj.obj.fs = fs;
-ARM GAS  /tmp/ccH7dUYB.s 			page 120
+ARM GAS  /tmp/cczbjqIl.s 			page 120
 
 
 5030:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -7198,7 +7198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5084:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
 5085:Middlewares/Third_Party/FatFs/src/ff.c **** 
 5086:Middlewares/Third_Party/FatFs/src/ff.c **** 	/* Set volume label */
-ARM GAS  /tmp/ccH7dUYB.s 			page 121
+ARM GAS  /tmp/cczbjqIl.s 			page 121
 
 
 5087:Middlewares/Third_Party/FatFs/src/ff.c **** 	dj.obj.sclust = 0;		/* Open root directory */
@@ -7258,7 +7258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5141:Middlewares/Third_Party/FatFs/src/ff.c **** 	FIL* fp,		/* Pointer to the file object */
 5142:Middlewares/Third_Party/FatFs/src/ff.c **** 	FSIZE_t fsz,	/* File size to be expanded to */
 5143:Middlewares/Third_Party/FatFs/src/ff.c **** 	BYTE opt		/* Operation mode 0:Find and prepare or 1:Find and allocate */
-ARM GAS  /tmp/ccH7dUYB.s 			page 122
+ARM GAS  /tmp/cczbjqIl.s 			page 122
 
 
 5144:Middlewares/Third_Party/FatFs/src/ff.c **** )
@@ -7318,7 +7318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5198:Middlewares/Third_Party/FatFs/src/ff.c **** 			} else {		/* Set it as suggested point for next allocation */
 5199:Middlewares/Third_Party/FatFs/src/ff.c **** 				lclst = scl - 1;
 5200:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
-ARM GAS  /tmp/ccH7dUYB.s 			page 123
+ARM GAS  /tmp/cczbjqIl.s 			page 123
 
 
 5201:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
@@ -7378,7 +7378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5255:Middlewares/Third_Party/FatFs/src/ff.c **** 		csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1));	/* Sector offset in the cluster */
 5256:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (fp->fptr % SS(fs) == 0) {				/* On the sector boundary? */
 5257:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (csect == 0) {						/* On the cluster boundary? */
-ARM GAS  /tmp/ccH7dUYB.s 			page 124
+ARM GAS  /tmp/cczbjqIl.s 			page 124
 
 
 5258:Middlewares/Third_Party/FatFs/src/ff.c **** 				clst = (fp->fptr == 0) ?			/* On the top of the file? */
@@ -7438,7 +7438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5312:Middlewares/Third_Party/FatFs/src/ff.c **** 	static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0};	/* Cluster size boundary for FAT32 volume (12
 5313:Middlewares/Third_Party/FatFs/src/ff.c **** 	BYTE fmt, sys, *buf, *pte, pdrv, part;
 5314:Middlewares/Third_Party/FatFs/src/ff.c **** 	WORD ss;
-ARM GAS  /tmp/ccH7dUYB.s 			page 125
+ARM GAS  /tmp/cczbjqIl.s 			page 125
 
 
 5315:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD szb_buf, sz_buf, sz_blk, n_clst, pau, sect, nsect, n;
@@ -7498,7 +7498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5369:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (sz_vol < 128) return FR_MKFS_ABORTED;	/* Check if volume size is >=128s */
 5370:Middlewares/Third_Party/FatFs/src/ff.c **** 
 5371:Middlewares/Third_Party/FatFs/src/ff.c **** 	/* Pre-determine the FAT type */
-ARM GAS  /tmp/ccH7dUYB.s 			page 126
+ARM GAS  /tmp/cczbjqIl.s 			page 126
 
 
 5372:Middlewares/Third_Party/FatFs/src/ff.c **** 	do {
@@ -7558,7 +7558,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5426:Middlewares/Third_Party/FatFs/src/ff.c **** 					si++; break;		/* Store the up-case char if exist */
 5427:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
 5428:Middlewares/Third_Party/FatFs/src/ff.c **** 				for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ;	/* Get r
-ARM GAS  /tmp/ccH7dUYB.s 			page 127
+ARM GAS  /tmp/cczbjqIl.s 			page 127
 
 
 5429:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (j >= 128) {
@@ -7618,7 +7618,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5483:Middlewares/Third_Party/FatFs/src/ff.c **** 			n = (nsect > sz_buf) ? sz_buf : nsect;	/* Write the buffered data */
 5484:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (disk_write(pdrv, buf, sect, n) != RES_OK) return FR_DISK_ERR;
 5485:Middlewares/Third_Party/FatFs/src/ff.c **** 			sect += n; nsect -= n;
-ARM GAS  /tmp/ccH7dUYB.s 			page 128
+ARM GAS  /tmp/cczbjqIl.s 			page 128
 
 
 5486:Middlewares/Third_Party/FatFs/src/ff.c **** 		} while (nsect);
@@ -7678,7 +7678,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5540:Middlewares/Third_Party/FatFs/src/ff.c **** 			for ( ; j < 11; j++) {
 5541:Middlewares/Third_Party/FatFs/src/ff.c **** 				for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ;	/* VBR checksum */
 5542:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (disk_write(pdrv, buf, sect++, 1) != RES_OK) return FR_DISK_ERR;
-ARM GAS  /tmp/ccH7dUYB.s 			page 129
+ARM GAS  /tmp/cczbjqIl.s 			page 129
 
 
 5543:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
@@ -7738,7 +7738,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5597:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (!au && (au = pau / 2) != 0) continue;	/* Adjust cluster size and retry */
 5598:Middlewares/Third_Party/FatFs/src/ff.c **** 					return FR_MKFS_ABORTED;
 5599:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
-ARM GAS  /tmp/ccH7dUYB.s 			page 130
+ARM GAS  /tmp/cczbjqIl.s 			page 130
 
 
 5600:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
@@ -7798,7 +7798,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5654:Middlewares/Third_Party/FatFs/src/ff.c **** 			st_dword(buf + BS_VolID, GET_FATTIME());	/* VSN */
 5655:Middlewares/Third_Party/FatFs/src/ff.c **** 			st_word(buf + BPB_FATSz16, (WORD)sz_fat);	/* FAT size [sector] */
 5656:Middlewares/Third_Party/FatFs/src/ff.c **** 			buf[BS_DrvNum] = 0x80;						/* Drive number (for int13) */
-ARM GAS  /tmp/ccH7dUYB.s 			page 131
+ARM GAS  /tmp/cczbjqIl.s 			page 131
 
 
 5657:Middlewares/Third_Party/FatFs/src/ff.c **** 			buf[BS_BootSig] = 0x29;						/* Extended boot signature */
@@ -7858,7 +7858,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5711:Middlewares/Third_Party/FatFs/src/ff.c **** 		} else {
 5712:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (sz_vol >= 0x10000) {
 5713:Middlewares/Third_Party/FatFs/src/ff.c **** 				sys = 0x06;	/* FAT12/16 (>=64KS) */
-ARM GAS  /tmp/ccH7dUYB.s 			page 132
+ARM GAS  /tmp/cczbjqIl.s 			page 132
 
 
 5714:Middlewares/Third_Party/FatFs/src/ff.c **** 			} else {
@@ -7918,7 +7918,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5768:Middlewares/Third_Party/FatFs/src/ff.c **** 
 5769:Middlewares/Third_Party/FatFs/src/ff.c **** 
 5770:Middlewares/Third_Party/FatFs/src/ff.c **** 	stat = disk_initialize(pdrv);
-ARM GAS  /tmp/ccH7dUYB.s 			page 133
+ARM GAS  /tmp/cczbjqIl.s 			page 133
 
 
 5771:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (stat & STA_NOINIT) return FR_NOT_READY;
@@ -7978,7 +7978,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5825:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_STRFUNC
 5826:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
 5827:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get a string from the file                                            */
-ARM GAS  /tmp/ccH7dUYB.s 			page 134
+ARM GAS  /tmp/cczbjqIl.s 			page 134
 
 
 5828:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
@@ -8038,7 +8038,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5882:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
 5883:Middlewares/Third_Party/FatFs/src/ff.c **** 		c = ff_convert(c, 1);	/* OEM -> Unicode */
 5884:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (!c) c = '?';
-ARM GAS  /tmp/ccH7dUYB.s 			page 135
+ARM GAS  /tmp/cczbjqIl.s 			page 135
 
 
 5885:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -8098,7 +8098,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5939:Middlewares/Third_Party/FatFs/src/ff.c **** 			pb->buf[i++] = (BYTE)(0xC0 | c >> 6);
 5940:Middlewares/Third_Party/FatFs/src/ff.c **** 		} else {				/* 16-bit */
 5941:Middlewares/Third_Party/FatFs/src/ff.c **** 			pb->buf[i++] = (BYTE)(0xE0 | c >> 12);
-ARM GAS  /tmp/ccH7dUYB.s 			page 136
+ARM GAS  /tmp/cczbjqIl.s 			page 136
 
 
 5942:Middlewares/Third_Party/FatFs/src/ff.c **** 			pb->buf[i++] = (BYTE)(0x80 | (c >> 6 & 0x3F));
@@ -8158,7 +8158,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1640              		@ link register save eliminated.
 5992:Middlewares/Third_Party/FatFs/src/ff.c **** 	pb->fp = fp;
  1641              		.loc 1 5992 2 view .LVU493
-ARM GAS  /tmp/ccH7dUYB.s 			page 137
+ARM GAS  /tmp/cczbjqIl.s 			page 137
 
 
  1642              		.loc 1 5992 9 is_stmt 0 view .LVU494
@@ -8218,7 +8218,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1688 000c 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
 3224:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_REENTRANT
  1689              		.loc 1 3224 21 discriminator 2 view .LVU507
-ARM GAS  /tmp/ccH7dUYB.s 			page 138
+ARM GAS  /tmp/cczbjqIl.s 			page 138
 
 
  1690 000e A2B1     		cbz	r2, .L151
@@ -8278,7 +8278,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3241:Middlewares/Third_Party/FatFs/src/ff.c **** 	return res;
  1729              		.loc 1 3241 33 discriminator 1 view .LVU523
  1730 002e F5E7     		b	.L148
-ARM GAS  /tmp/ccH7dUYB.s 			page 139
+ARM GAS  /tmp/cczbjqIl.s 			page 139
 
 
  1731              	.LVL188:
@@ -8338,7 +8338,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1776              	.LVL197:
  1777              	.LFB1196:
  886:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD wsect;
-ARM GAS  /tmp/ccH7dUYB.s 			page 140
+ARM GAS  /tmp/cczbjqIl.s 			page 140
 
 
  1778              		.loc 1 886 1 is_stmt 1 view -0
@@ -8398,7 +8398,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  894:Middlewares/Third_Party/FatFs/src/ff.c **** 			res = FR_DISK_ERR;
  1818              		.loc 1 894 7 view .LVU550
  1819 0016 0123     		movs	r3, #1
-ARM GAS  /tmp/ccH7dUYB.s 			page 141
+ARM GAS  /tmp/cczbjqIl.s 			page 141
 
 
  1820 0018 3A46     		mov	r2, r7
@@ -8458,7 +8458,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1858 003c 0123     		movs	r3, #1
  1859 003e 3A46     		mov	r2, r7
  1860 0040 4146     		mov	r1, r8
-ARM GAS  /tmp/ccH7dUYB.s 			page 142
+ARM GAS  /tmp/cczbjqIl.s 			page 142
 
 
  1861 0042 6078     		ldrb	r0, [r4, #1]	@ zero_extendqisi2
@@ -8518,7 +8518,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1907              		.loc 1 920 5 view .LVU576
  1908 0004 8B42     		cmp	r3, r1
  1909 0006 02D1     		bne	.L169
-ARM GAS  /tmp/ccH7dUYB.s 			page 143
+ARM GAS  /tmp/cczbjqIl.s 			page 143
 
 
  917:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -8578,7 +8578,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1950              	.L165:
  929:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
  1951              		.loc 1 929 4 is_stmt 1 view .LVU591
-ARM GAS  /tmp/ccH7dUYB.s 			page 144
+ARM GAS  /tmp/cczbjqIl.s 			page 144
 
 
  929:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
@@ -8638,7 +8638,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  1996              		.loc 1 2973 6 is_stmt 0 view .LVU603
  1997 0016 04F23220 		addw	r0, r4, #562
  1998 001a FFF7FEFF 		bl	ld_word
-ARM GAS  /tmp/ccH7dUYB.s 			page 145
+ARM GAS  /tmp/cczbjqIl.s 			page 145
 
 
  1999              	.LVL220:
@@ -8698,7 +8698,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2039 005a 9842     		cmp	r0, r3
  2040 005c 04D0     		beq	.L171
 2982:Middlewares/Third_Party/FatFs/src/ff.c **** }
-ARM GAS  /tmp/ccH7dUYB.s 			page 146
+ARM GAS  /tmp/cczbjqIl.s 			page 146
 
 
  2041              		.loc 1 2982 9 view .LVU618
@@ -8758,7 +8758,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2091              		.cfi_offset 14, -4
  2092 0004 87B0     		sub	sp, sp, #28
  2093              	.LCFI19:
-ARM GAS  /tmp/ccH7dUYB.s 			page 147
+ARM GAS  /tmp/cczbjqIl.s 			page 147
 
 
  2094              		.cfi_def_cfa_offset 64
@@ -8818,7 +8818,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2128 0024 2C60     		str	r4, [r5]
 3020:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (fs->fs_type) {					/* If the volume has been mounted */
  2129              		.loc 1 3020 2 is_stmt 1 view .LVU645
-ARM GAS  /tmp/ccH7dUYB.s 			page 148
+ARM GAS  /tmp/cczbjqIl.s 			page 148
 
 
 3020:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (fs->fs_type) {					/* If the volume has been mounted */
@@ -8878,7 +8878,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2167              		.loc 1 3035 2 is_stmt 1 view .LVU662
 3035:Middlewares/Third_Party/FatFs/src/ff.c **** 	stat = disk_initialize(fs->drv);	/* Initialize the physical drive */
  2168              		.loc 1 3035 12 is_stmt 0 view .LVU663
-ARM GAS  /tmp/ccH7dUYB.s 			page 149
+ARM GAS  /tmp/cczbjqIl.s 			page 149
 
 
  2169 0050 F8B2     		uxtb	r0, r7
@@ -8938,7 +8938,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2207 0086 B3F5606F 		cmp	r3, #3584
  2208 008a 00F23981 		bhi	.L202
 3045:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
-ARM GAS  /tmp/ccH7dUYB.s 			page 150
+ARM GAS  /tmp/cczbjqIl.s 			page 150
 
 
  2209              		.loc 1 3045 64 discriminator 2 view .LVU680
@@ -8998,7 +8998,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2248              	.LVL239:
 3116:Middlewares/Third_Party/FatFs/src/ff.c **** 
  2249              		.loc 1 3116 44 discriminator 1 view .LVU696
-ARM GAS  /tmp/ccH7dUYB.s 			page 151
+ARM GAS  /tmp/cczbjqIl.s 			page 151
 
 
  2250 00bc B4F80C80 		ldrh	r8, [r4, #12]
@@ -9058,7 +9058,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2287              		.loc 1 3123 6 view .LVU713
  2288 00e8 012B     		cmp	r3, #1
  2289 00ea 00F21181 		bhi	.L210
-ARM GAS  /tmp/ccH7dUYB.s 			page 152
+ARM GAS  /tmp/cczbjqIl.s 			page 152
 
 
 3124:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -9118,7 +9118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3132:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32);
  2328              		.loc 1 3132 11 is_stmt 0 view .LVU730
  2329 0130 04F14700 		add	r0, r4, #71
-ARM GAS  /tmp/ccH7dUYB.s 			page 153
+ARM GAS  /tmp/cczbjqIl.s 			page 153
 
 
  2330 0134 FFF7FEFF 		bl	ld_word
@@ -9178,7 +9178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2368              		.loc 1 3140 6 is_stmt 0 view .LVU746
  2369 0160 019A     		ldr	r2, [sp, #4]
  2370 0162 9A42     		cmp	r2, r3
-ARM GAS  /tmp/ccH7dUYB.s 			page 154
+ARM GAS  /tmp/cczbjqIl.s 			page 154
 
 
  2371 0164 C0F0E680 		bcc	.L215
@@ -9238,7 +9238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2411              	.L183:
 3052:Middlewares/Third_Party/FatFs/src/ff.c **** 			pt = fs->win + (MBR_Table + i * SZ_PTE);
  2412              		.loc 1 3052 17 discriminator 1 view .LVU761
-ARM GAS  /tmp/ccH7dUYB.s 			page 155
+ARM GAS  /tmp/cczbjqIl.s 			page 155
 
 
  2413 0198 032E     		cmp	r6, #3
@@ -9298,7 +9298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2452 01bc 0AE0     		b	.L188
  2453              	.LVL268:
  2454              	.L226:
-ARM GAS  /tmp/ccH7dUYB.s 			page 156
+ARM GAS  /tmp/cczbjqIl.s 			page 156
 
 
 3060:Middlewares/Third_Party/FatFs/src/ff.c **** 		} while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4);
@@ -9358,7 +9358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3148:Middlewares/Third_Party/FatFs/src/ff.c **** 		fs->volbase = bsect;							/* Volume start sector */
  2496              		.loc 1 3148 16 view .LVU790
  2497 01ee C4F81890 		str	r9, [r4, #24]
-ARM GAS  /tmp/ccH7dUYB.s 			page 157
+ARM GAS  /tmp/cczbjqIl.s 			page 157
 
 
 3149:Middlewares/Third_Party/FatFs/src/ff.c **** 		fs->fatbase = bsect + nrsv; 					/* FAT start sector */
@@ -9418,7 +9418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2533 021a 09F00103 		and	r3, r9, #1
 3161:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
  2534              		.loc 1 3161 22 discriminator 2 view .LVU810
-ARM GAS  /tmp/ccH7dUYB.s 			page 158
+ARM GAS  /tmp/cczbjqIl.s 			page 158
 
 
  2535 021e 03EB5203 		add	r3, r3, r2, lsr #1
@@ -9478,7 +9478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3192:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 1
  2573              		.loc 1 3192 9 view .LVU827
  2574 024e 1380     		strh	r3, [r2]	@ movhi
-ARM GAS  /tmp/ccH7dUYB.s 			page 159
+ARM GAS  /tmp/cczbjqIl.s 			page 159
 
 
  2575 0250 E380     		strh	r3, [r4, #6]	@ movhi
@@ -9538,7 +9538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2614              	.LVL285:
 3156:Middlewares/Third_Party/FatFs/src/ff.c **** 		} else {
  2615              		.loc 1 3156 11 view .LVU843
-ARM GAS  /tmp/ccH7dUYB.s 			page 160
+ARM GAS  /tmp/cczbjqIl.s 			page 160
 
 
  2616 0280 CFE7     		b	.L193
@@ -9598,7 +9598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2658 02be 9842     		cmp	r0, r3
  2659 02c0 BFD1     		bne	.L195
 3177:Middlewares/Third_Party/FatFs/src/ff.c **** 			{
-ARM GAS  /tmp/ccH7dUYB.s 			page 161
+ARM GAS  /tmp/cczbjqIl.s 			page 161
 
 
  2660              		.loc 1 3177 8 view .LVU856
@@ -9658,7 +9658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3015:Middlewares/Third_Party/FatFs/src/ff.c **** 
  2704              		.loc 1 3015 18 discriminator 1 view .LVU867
  2705 02f2 F9E7     		b	.L180
-ARM GAS  /tmp/ccH7dUYB.s 			page 162
+ARM GAS  /tmp/cczbjqIl.s 			page 162
 
 
  2706              	.LVL299:
@@ -9718,7 +9718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3127:Middlewares/Third_Party/FatFs/src/ff.c **** 
  2752              		.loc 1 3127 63 discriminator 3 view .LVU876
  2753 0324 0D25     		movs	r5, #13
-ARM GAS  /tmp/ccH7dUYB.s 			page 163
+ARM GAS  /tmp/cczbjqIl.s 			page 163
 
 
  2754 0326 DFE7     		b	.L180
@@ -9778,7 +9778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2799              	.LFE1219:
  2801              		.section	.text.put_fat,"ax",%progbits
  2802              		.align	1
-ARM GAS  /tmp/ccH7dUYB.s 			page 164
+ARM GAS  /tmp/cczbjqIl.s 			page 164
 
 
  2803              		.syntax unified
@@ -9838,7 +9838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2846 001a 022B     		cmp	r3, #2
  2847 001c 49D0     		beq	.L234
  2848 001e 032B     		cmp	r3, #3
-ARM GAS  /tmp/ccH7dUYB.s 			page 165
+ARM GAS  /tmp/cczbjqIl.s 			page 165
 
 
  2849 0020 60D0     		beq	.L235
@@ -9898,7 +9898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2887              		.loc 1 1098 4 is_stmt 1 view .LVU913
 1098:Middlewares/Third_Party/FatFs/src/ff.c **** 			fs->wflag = 1;
  2888              		.loc 1 1098 7 is_stmt 0 view .LVU914
-ARM GAS  /tmp/ccH7dUYB.s 			page 166
+ARM GAS  /tmp/cczbjqIl.s 			page 166
 
 
  2889 0052 15F00105 		ands	r5, r5, #1
@@ -9958,7 +9958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  2927 0084 A389     		ldrh	r3, [r4, #12]
 1102:Middlewares/Third_Party/FatFs/src/ff.c **** 			*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
  2928              		.loc 1 1102 21 view .LVU931
-ARM GAS  /tmp/ccH7dUYB.s 			page 167
+ARM GAS  /tmp/cczbjqIl.s 			page 167
 
 
  2929 0086 B9FBF3F2 		udiv	r2, r9, r3
@@ -10018,7 +10018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1108:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (res != FR_OK) break;
  2969              		.loc 1 1108 56 view .LVU946
  2970 00b6 5B08     		lsrs	r3, r3, #1
-ARM GAS  /tmp/ccH7dUYB.s 			page 168
+ARM GAS  /tmp/cczbjqIl.s 			page 168
 
 
 1108:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (res != FR_OK) break;
@@ -10078,7 +10078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1118:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (res != FR_OK) break;
  3010              		.loc 1 1118 49 view .LVU962
  3011 00e6 8389     		ldrh	r3, [r0, #12]
-ARM GAS  /tmp/ccH7dUYB.s 			page 169
+ARM GAS  /tmp/cczbjqIl.s 			page 169
 
 
 1118:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (res != FR_OK) break;
@@ -10138,7 +10138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3050 0118 3943     		orrs	r1, r1, r7
  3051              	.LVL340:
 1123:Middlewares/Third_Party/FatFs/src/ff.c **** 			fs->wflag = 1;
-ARM GAS  /tmp/ccH7dUYB.s 			page 170
+ARM GAS  /tmp/cczbjqIl.s 			page 170
 
 
  3052              		.loc 1 1123 4 is_stmt 0 view .LVU979
@@ -10198,7 +10198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3098 0000 F8B5     		push	{r3, r4, r5, r6, r7, lr}
  3099              	.LCFI23:
  3100              		.cfi_def_cfa_offset 24
-ARM GAS  /tmp/ccH7dUYB.s 			page 171
+ARM GAS  /tmp/cczbjqIl.s 			page 171
 
 
  3101              		.cfi_offset 3, -24
@@ -10258,7 +10258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3140              	.LVL349:
 1020:Middlewares/Third_Party/FatFs/src/ff.c **** 			wc = fs->win[bc++ % SS(fs)];
  3141              		.loc 1 1020 4 is_stmt 1 view .LVU1005
-ARM GAS  /tmp/ccH7dUYB.s 			page 172
+ARM GAS  /tmp/cczbjqIl.s 			page 172
 
 
 1020:Middlewares/Third_Party/FatFs/src/ff.c **** 			wc = fs->win[bc++ % SS(fs)];
@@ -10318,7 +10318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3180              		.loc 1 1022 8 view .LVU1021
  3181 0052 1944     		add	r1, r1, r3
  3182 0054 2846     		mov	r0, r5
-ARM GAS  /tmp/ccH7dUYB.s 			page 173
+ARM GAS  /tmp/cczbjqIl.s 			page 173
 
 
  3183 0056 FFF7FEFF 		bl	move_window
@@ -10378,7 +10378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1028:Middlewares/Third_Party/FatFs/src/ff.c **** 			val = ld_word(fs->win + clst * 2 % SS(fs));
  3223              		.loc 1 1028 47 view .LVU1036
  3224 0084 AB89     		ldrh	r3, [r5, #12]
-ARM GAS  /tmp/ccH7dUYB.s 			page 174
+ARM GAS  /tmp/cczbjqIl.s 			page 174
 
 
 1028:Middlewares/Third_Party/FatFs/src/ff.c **** 			val = ld_word(fs->win + clst * 2 % SS(fs));
@@ -10438,7 +10438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3263              		.loc 1 1033 54 view .LVU1052
  3264 00b2 9B08     		lsrs	r3, r3, #2
 1033:Middlewares/Third_Party/FatFs/src/ff.c **** 			val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF;
-ARM GAS  /tmp/ccH7dUYB.s 			page 175
+ARM GAS  /tmp/cczbjqIl.s 			page 175
 
 
  3265              		.loc 1 1033 44 view .LVU1053
@@ -10498,7 +10498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1012:Middlewares/Third_Party/FatFs/src/ff.c **** 
  3306              		.loc 1 1012 7 view .LVU1067
  3307 00e2 0120     		movs	r0, #1
-ARM GAS  /tmp/ccH7dUYB.s 			page 176
+ARM GAS  /tmp/cczbjqIl.s 			page 176
 
 
  3308              	.LVL377:
@@ -10558,7 +10558,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3354              		.cfi_offset 4, -24
  3355              		.cfi_offset 5, -20
  3356              		.cfi_offset 6, -16
-ARM GAS  /tmp/ccH7dUYB.s 			page 177
+ARM GAS  /tmp/cczbjqIl.s 			page 177
 
 
  3357              		.cfi_offset 7, -12
@@ -10618,7 +10618,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3394              	.L261:
 1489:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (ofs / SZDIRE >= fs->n_rootdir)	return FR_INT_ERR;	/* Is index out of range? */
  3395              		.loc 1 1489 2 view .LVU1095
-ARM GAS  /tmp/ccH7dUYB.s 			page 178
+ARM GAS  /tmp/cczbjqIl.s 			page 178
 
 
 1489:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (ofs / SZDIRE >= fs->n_rootdir)	return FR_INT_ERR;	/* Is index out of range? */
@@ -10678,7 +10678,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3431 0052 B8F80C20 		ldrh	r2, [r8, #12]
 1506:Middlewares/Third_Party/FatFs/src/ff.c **** 
  3432              		.loc 1 1506 27 view .LVU1115
-ARM GAS  /tmp/ccH7dUYB.s 			page 179
+ARM GAS  /tmp/cczbjqIl.s 			page 179
 
 
  3433 0056 B6FBF2F1 		udiv	r1, r6, r2
@@ -10738,7 +10738,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3471              		.loc 1 1498 7 is_stmt 0 view .LVU1131
  3472 0086 0128     		cmp	r0, #1
  3473 0088 14D9     		bls	.L269
-ARM GAS  /tmp/ccH7dUYB.s 			page 180
+ARM GAS  /tmp/cczbjqIl.s 			page 180
 
 
 1498:Middlewares/Third_Party/FatFs/src/ff.c **** 			ofs -= csz;
@@ -10798,7 +10798,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3515              	.LVL399:
 1490:Middlewares/Third_Party/FatFs/src/ff.c **** 		dp->sect = fs->dirbase;
  3516              		.loc 1 1490 45 discriminator 1 view .LVU1145
-ARM GAS  /tmp/ccH7dUYB.s 			page 181
+ARM GAS  /tmp/cczbjqIl.s 			page 181
 
 
  3517 00ae F9E7     		b	.L259
@@ -10858,7 +10858,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3564              		.cfi_offset 4, -24
  3565              		.cfi_offset 5, -20
  3566              		.cfi_offset 6, -16
-ARM GAS  /tmp/ccH7dUYB.s 			page 182
+ARM GAS  /tmp/cczbjqIl.s 			page 182
 
 
  3567              		.cfi_offset 7, -12
@@ -10918,7 +10918,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1366:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (cs < 2) return 1;				/* Invalid FAT value */
  3605              		.loc 1 1366 8 view .LVU1171
  3606 0026 0346     		mov	r3, r0
-ARM GAS  /tmp/ccH7dUYB.s 			page 183
+ARM GAS  /tmp/cczbjqIl.s 			page 183
 
 
  3607              	.LVL413:
@@ -10978,7 +10978,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3646 004e 78B1     		cbz	r0, .L279
 1409:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ncl == scl) return 0;		/* No free cluster */
  3647              		.loc 1 1409 4 is_stmt 1 view .LVU1187
-ARM GAS  /tmp/ccH7dUYB.s 			page 184
+ARM GAS  /tmp/cczbjqIl.s 			page 184
 
 
 1409:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ncl == scl) return 0;		/* No free cluster */
@@ -11038,7 +11038,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1412:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res == FR_OK && clst != 0) {
  3687              		.loc 1 1412 9 view .LVU1203
  3688 0078 FFF7FEFF 		bl	put_fat
-ARM GAS  /tmp/ccH7dUYB.s 			page 185
+ARM GAS  /tmp/cczbjqIl.s 			page 185
 
 
  3689              	.LVL423:
@@ -11098,7 +11098,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1421:Middlewares/Third_Party/FatFs/src/ff.c **** 	} else {
  3727              		.loc 1 1421 3 is_stmt 1 view .LVU1220
 1421:Middlewares/Third_Party/FatFs/src/ff.c **** 	} else {
-ARM GAS  /tmp/ccH7dUYB.s 			page 186
+ARM GAS  /tmp/cczbjqIl.s 			page 186
 
 
  3728              		.loc 1 1421 5 is_stmt 0 view .LVU1221
@@ -11158,7 +11158,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3771              	.L287:
 1405:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
  3772              		.loc 1 1405 27 discriminator 1 view .LVU1233
-ARM GAS  /tmp/ccH7dUYB.s 			page 187
+ARM GAS  /tmp/cczbjqIl.s 			page 187
 
 
  3773 00ca 0023     		movs	r3, #0
@@ -11218,7 +11218,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3819              		.loc 1 1287 2 is_stmt 1 view .LVU1243
 1287:Middlewares/Third_Party/FatFs/src/ff.c **** 
  3820              		.loc 1 1287 5 is_stmt 0 view .LVU1244
-ARM GAS  /tmp/ccH7dUYB.s 			page 188
+ARM GAS  /tmp/cczbjqIl.s 			page 188
 
 
  3821 0006 0129     		cmp	r1, #1
@@ -11278,7 +11278,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3860              		.loc 1 1297 9 is_stmt 0 view .LVU1259
  3861 002c 2146     		mov	r1, r4
  3862 002e 3046     		mov	r0, r6
-ARM GAS  /tmp/ccH7dUYB.s 			page 189
+ARM GAS  /tmp/cczbjqIl.s 			page 189
 
 
  3863 0030 FFF7FEFF 		bl	get_fat
@@ -11338,7 +11338,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1305:Middlewares/Third_Party/FatFs/src/ff.c **** 			fs->free_clst++;
  3900              		.loc 1 1305 36 view .LVU1277
  3901 0054 911E     		subs	r1, r2, #2
-ARM GAS  /tmp/ccH7dUYB.s 			page 190
+ARM GAS  /tmp/cczbjqIl.s 			page 190
 
 
 1305:Middlewares/Third_Party/FatFs/src/ff.c **** 			fs->free_clst++;
@@ -11398,7 +11398,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3943 0078 F9E7     		b	.L295
  3944              	.LVL458:
  3945              	.L303:
-ARM GAS  /tmp/ccH7dUYB.s 			page 191
+ARM GAS  /tmp/cczbjqIl.s 			page 191
 
 
 1300:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
@@ -11458,7 +11458,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  3990              		.loc 1 2425 5 is_stmt 0 view .LVU1302
  3991 000e 20B9     		cbnz	r0, .L306
 2426:Middlewares/Third_Party/FatFs/src/ff.c **** 		fs->wflag = 1;
-ARM GAS  /tmp/ccH7dUYB.s 			page 192
+ARM GAS  /tmp/cczbjqIl.s 			page 192
 
 
  3992              		.loc 1 2426 3 is_stmt 1 view .LVU1303
@@ -11518,7 +11518,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1525:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
  4037              		.loc 1 1525 9 is_stmt 0 view .LVU1315
  4038 0004 0668     		ldr	r6, [r0]
-ARM GAS  /tmp/ccH7dUYB.s 			page 193
+ARM GAS  /tmp/cczbjqIl.s 			page 193
 
 
  4039              	.LVL465:
@@ -11578,7 +11578,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4076              		.loc 1 1537 4 is_stmt 1 view .LVU1332
 1537:Middlewares/Third_Party/FatFs/src/ff.c **** 				dp->sect = 0; return FR_NO_FILE;
  4077              		.loc 1 1537 26 is_stmt 0 view .LVU1333
-ARM GAS  /tmp/ccH7dUYB.s 			page 194
+ARM GAS  /tmp/cczbjqIl.s 			page 194
 
 
  4078 002e 3389     		ldrh	r3, [r6, #8]
@@ -11638,7 +11638,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4116              	.LVL473:
 1538:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
  4117              		.loc 1 1538 26 view .LVU1350
-ARM GAS  /tmp/ccH7dUYB.s 			page 195
+ARM GAS  /tmp/cczbjqIl.s 			page 195
 
 
  4118 0056 F9E7     		b	.L309
@@ -11698,7 +11698,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1548:Middlewares/Third_Party/FatFs/src/ff.c **** 						dp->sect = 0; return FR_NO_FILE;
  4155              		.loc 1 1548 9 is_stmt 0 view .LVU1368
  4156 007e 8FB1     		cbz	r7, .L327
-ARM GAS  /tmp/ccH7dUYB.s 			page 196
+ARM GAS  /tmp/cczbjqIl.s 			page 196
 
 
 1551:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (clst == 0) return FR_DENIED;			/* No free cluster */
@@ -11758,7 +11758,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4194              		.loc 1 1549 16 is_stmt 0 view .LVU1385
  4195 00a4 0023     		movs	r3, #0
  4196 00a6 EB61     		str	r3, [r5, #28]
-ARM GAS  /tmp/ccH7dUYB.s 			page 197
+ARM GAS  /tmp/cczbjqIl.s 			page 197
 
 
 1549:Middlewares/Third_Party/FatFs/src/ff.c **** 					}
@@ -11818,7 +11818,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4236 00d2 F8B9     		cbnz	r0, .L324
 1559:Middlewares/Third_Party/FatFs/src/ff.c **** 						fs->wflag = 1;
  4237              		.loc 1 1559 72 is_stmt 1 discriminator 2 view .LVU1401
-ARM GAS  /tmp/ccH7dUYB.s 			page 198
+ARM GAS  /tmp/cczbjqIl.s 			page 198
 
 
 1559:Middlewares/Third_Party/FatFs/src/ff.c **** 						fs->wflag = 1;
@@ -11878,7 +11878,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4278 00fc 0420     		movs	r0, #4
  4279              	.LVL493:
 1531:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 199
+ARM GAS  /tmp/cczbjqIl.s 			page 199
 
 
  4280              		.loc 1 1531 105 discriminator 3 view .LVU1416
@@ -11938,7 +11938,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4323              	.LFE1206:
  4325              		.section	.text.dir_find,"ax",%progbits
  4326              		.align	1
-ARM GAS  /tmp/ccH7dUYB.s 			page 200
+ARM GAS  /tmp/cczbjqIl.s 			page 200
 
 
  4327              		.syntax unified
@@ -11998,7 +11998,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2277:Middlewares/Third_Party/FatFs/src/ff.c **** 	} while (res == FR_OK);
  4370              		.loc 1 2277 9 is_stmt 0 view .LVU1440
  4371 0014 0021     		movs	r1, #0
-ARM GAS  /tmp/ccH7dUYB.s 			page 201
+ARM GAS  /tmp/cczbjqIl.s 			page 201
 
 
  4372 0016 2046     		mov	r0, r4
@@ -12058,7 +12058,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4410              		.loc 1 2274 16 view .LVU1456
  4411 003c A371     		strb	r3, [r4, #6]
  4412              	.LVL516:
-ARM GAS  /tmp/ccH7dUYB.s 			page 202
+ARM GAS  /tmp/cczbjqIl.s 			page 202
 
 
 2275:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -12118,7 +12118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4460              		.cfi_def_cfa_offset 24
  4461 0004 0446     		mov	r4, r0
  4462 0006 0191     		str	r1, [sp, #4]
-ARM GAS  /tmp/ccH7dUYB.s 			page 203
+ARM GAS  /tmp/cczbjqIl.s 			page 203
 
 
 2818:Middlewares/Third_Party/FatFs/src/ff.c **** 	BYTE ns;
@@ -12178,7 +12178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4500              	.L339:
 2855:Middlewares/Third_Party/FatFs/src/ff.c **** 			res = create_name(dp, &path);	/* Get a segment name of the path */
  4501              		.loc 1 2855 3 is_stmt 1 view .LVU1483
-ARM GAS  /tmp/ccH7dUYB.s 			page 204
+ARM GAS  /tmp/cczbjqIl.s 			page 204
 
 
 2856:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (res != FR_OK) break;
@@ -12238,7 +12238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4538              		.loc 1 2888 32 is_stmt 0 view .LVU1501
  4539 004e 05F13401 		add	r1, r5, #52
 2888:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
-ARM GAS  /tmp/ccH7dUYB.s 			page 205
+ARM GAS  /tmp/cczbjqIl.s 			page 205
 
 
  4540              		.loc 1 2888 44 view .LVU1502
@@ -12298,7 +12298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2894:Middlewares/Third_Party/FatFs/src/ff.c **** 
  4580              		.loc 1 2894 1 is_stmt 0 view .LVU1517
  4581 007a 1846     		mov	r0, r3
-ARM GAS  /tmp/ccH7dUYB.s 			page 206
+ARM GAS  /tmp/cczbjqIl.s 			page 206
 
 
  4582 007c 03B0     		add	sp, sp, #12
@@ -12358,7 +12358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4629              		.cfi_offset 4, -20
  4630              		.cfi_offset 5, -16
  4631              		.cfi_offset 6, -12
-ARM GAS  /tmp/ccH7dUYB.s 			page 207
+ARM GAS  /tmp/cczbjqIl.s 			page 207
 
 
  4632              		.cfi_offset 7, -8
@@ -12418,7 +12418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4671 0020 0246     		mov	r2, r0
  4672 0022 70B9     		cbnz	r0, .L348
  4673              	.LVL545:
-ARM GAS  /tmp/ccH7dUYB.s 			page 208
+ARM GAS  /tmp/cczbjqIl.s 			page 208
 
 
  4674              	.L350:
@@ -12478,7 +12478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 1619:Middlewares/Third_Party/FatFs/src/ff.c **** }
  4713              		.loc 1 1619 2 is_stmt 1 view .LVU1557
 1620:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 209
+ARM GAS  /tmp/cczbjqIl.s 			page 209
 
 
  4714              		.loc 1 1620 1 is_stmt 0 view .LVU1558
@@ -12538,7 +12538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2371:Middlewares/Third_Party/FatFs/src/ff.c **** 		res = move_window(fs, dp->sect);
  4760              		.loc 1 2371 5 is_stmt 0 view .LVU1569
  4761 000c 0546     		mov	r5, r0
-ARM GAS  /tmp/ccH7dUYB.s 			page 210
+ARM GAS  /tmp/cczbjqIl.s 			page 210
 
 
  4762 000e 08B1     		cbz	r0, .L359
@@ -12598,7 +12598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4804              	.LFE1212:
  4806              		.section	.text.dir_read,"ax",%progbits
  4807              		.align	1
-ARM GAS  /tmp/ccH7dUYB.s 			page 211
+ARM GAS  /tmp/cczbjqIl.s 			page 211
 
 
  4808              		.syntax unified
@@ -12658,7 +12658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4851 0010 FFF7FEFF 		bl	dir_next
  4852              	.LVL568:
 2194:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
-ARM GAS  /tmp/ccH7dUYB.s 			page 212
+ARM GAS  /tmp/cczbjqIl.s 			page 212
 
 
  4853              		.loc 1 2194 3 is_stmt 1 view .LVU1594
@@ -12718,7 +12718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 2188:Middlewares/Third_Party/FatFs/src/ff.c **** 				break;
  4890              		.loc 1 2188 4 is_stmt 1 view .LVU1612
 2188:Middlewares/Third_Party/FatFs/src/ff.c **** 				break;
-ARM GAS  /tmp/ccH7dUYB.s 			page 213
+ARM GAS  /tmp/cczbjqIl.s 			page 213
 
 
  4891              		.loc 1 2188 7 is_stmt 0 view .LVU1613
@@ -12778,7 +12778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4934              		.align	1
  4935              		.syntax unified
  4936              		.thumb
-ARM GAS  /tmp/ccH7dUYB.s 			page 214
+ARM GAS  /tmp/cczbjqIl.s 			page 214
 
 
  4937              		.thumb_func
@@ -12838,7 +12838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  4979              		.loc 1 968 6 discriminator 1 view .LVU1638
  4980 001c 00B1     		cbz	r0, .L369
  968:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
-ARM GAS  /tmp/ccH7dUYB.s 			page 215
+ARM GAS  /tmp/cczbjqIl.s 			page 215
 
 
  4981              		.loc 1 968 56 discriminator 1 view .LVU1639
@@ -12898,7 +12898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5023 0056 6169     		ldr	r1, [r4, #20]
  5024 0058 04F50770 		add	r0, r4, #540
  5025 005c FFF7FEFF 		bl	st_dword
-ARM GAS  /tmp/ccH7dUYB.s 			page 216
+ARM GAS  /tmp/cczbjqIl.s 			page 216
 
 
  5026              	.LVL587:
@@ -12958,7 +12958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5072              		.loc 1 3265 1 is_stmt 0 view .LVU1661
  5073 0000 70B5     		push	{r4, r5, r6, lr}
  5074              	.LCFI38:
-ARM GAS  /tmp/ccH7dUYB.s 			page 217
+ARM GAS  /tmp/cczbjqIl.s 			page 217
 
 
  5075              		.cfi_def_cfa_offset 16
@@ -13018,7 +13018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3279:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
  5114              		.loc 1 3279 3 is_stmt 0 view .LVU1677
  5115 0020 FFF7FEFF 		bl	clear_lock
-ARM GAS  /tmp/ccH7dUYB.s 			page 218
+ARM GAS  /tmp/cczbjqIl.s 			page 218
 
 
  5116              	.LVL595:
@@ -13078,7 +13078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5155              		.cfi_remember_state
  5156              		.cfi_def_cfa_offset 16
  5157              		@ sp needed
-ARM GAS  /tmp/ccH7dUYB.s 			page 219
+ARM GAS  /tmp/cczbjqIl.s 			page 219
 
 
  5158 004c 70BD     		pop	{r4, r5, r6, pc}
@@ -13138,7 +13138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5207              		.cfi_offset 8, -12
  5208              		.cfi_offset 9, -8
  5209              		.cfi_offset 14, -4
-ARM GAS  /tmp/ccH7dUYB.s 			page 220
+ARM GAS  /tmp/cczbjqIl.s 			page 220
 
 
  5210 0004 91B0     		sub	sp, sp, #68
@@ -13198,7 +13198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5247              		.loc 1 3499 31 is_stmt 0 discriminator 1 view .LVU1716
  5248 0024 0023     		movs	r3, #0
  5249 0026 3360     		str	r3, [r6]
-ARM GAS  /tmp/ccH7dUYB.s 			page 221
+ARM GAS  /tmp/cczbjqIl.s 			page 221
 
 
  5250              	.LVL607:
@@ -13258,7 +13258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5290 004c 14BF     		ite	ne
  5291 004e 0121     		movne	r1, #1
  5292 0050 0021     		moveq	r1, #0
-ARM GAS  /tmp/ccH7dUYB.s 			page 222
+ARM GAS  /tmp/cczbjqIl.s 			page 222
 
 
  5293 0052 04A8     		add	r0, sp, #16
@@ -13318,7 +13318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3392:Middlewares/Third_Party/FatFs/src/ff.c **** 					st_dword(dj.dir + DIR_ModTime, dw);	/* Set modified time */
  5333              		.loc 1 3392 6 is_stmt 1 view .LVU1745
  5334 007c 0146     		mov	r1, r0
-ARM GAS  /tmp/ccH7dUYB.s 			page 223
+ARM GAS  /tmp/cczbjqIl.s 			page 223
 
 
  5335 007e 0C98     		ldr	r0, [sp, #48]
@@ -13378,7 +13378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3398:Middlewares/Third_Party/FatFs/src/ff.c **** 
  5378              		.loc 1 3398 6 view .LVU1757
 3398:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 224
+ARM GAS  /tmp/cczbjqIl.s 			page 224
 
 
  5379              		.loc 1 3398 16 is_stmt 0 view .LVU1758
@@ -13438,7 +13438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3405:Middlewares/Third_Party/FatFs/src/ff.c **** 						}
  5419              		.loc 1 3405 22 view .LVU1773
  5420 00e8 039B     		ldr	r3, [sp, #12]
-ARM GAS  /tmp/ccH7dUYB.s 			page 225
+ARM GAS  /tmp/cczbjqIl.s 			page 225
 
 
  5421 00ea 1C61     		str	r4, [r3, #16]
@@ -13498,7 +13498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5462 0114 AAD0     		beq	.L393
 3360:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
  5463              		.loc 1 3360 36 discriminator 1 view .LVU1787
-ARM GAS  /tmp/ccH7dUYB.s 			page 226
+ARM GAS  /tmp/cczbjqIl.s 			page 226
 
 
  5464 0116 0825     		movs	r5, #8
@@ -13558,7 +13558,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3423:Middlewares/Third_Party/FatFs/src/ff.c **** 				mode |= FA_MODIFIED;
  5503              		.loc 1 3423 7 is_stmt 0 view .LVU1803
  5504 0140 17F0080F 		tst	r7, #8
-ARM GAS  /tmp/ccH7dUYB.s 			page 227
+ARM GAS  /tmp/cczbjqIl.s 			page 227
 
 
  5505 0144 01D0     		beq	.L395
@@ -13618,7 +13618,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5543              		.loc 1 3444 3 is_stmt 1 view .LVU1819
 3456:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
  5544              		.loc 1 3456 5 view .LVU1820
-ARM GAS  /tmp/ccH7dUYB.s 			page 228
+ARM GAS  /tmp/cczbjqIl.s 			page 228
 
 
 3456:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
@@ -13678,7 +13678,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3466:Middlewares/Third_Party/FatFs/src/ff.c **** 			fp->fptr = 0;			/* Set file pointer top of the file */
  5581              		.loc 1 3466 4 is_stmt 1 view .LVU1839
 3466:Middlewares/Third_Party/FatFs/src/ff.c **** 			fp->fptr = 0;			/* Set file pointer top of the file */
-ARM GAS  /tmp/ccH7dUYB.s 			page 229
+ARM GAS  /tmp/cczbjqIl.s 			page 229
 
 
  5582              		.loc 1 3466 13 is_stmt 0 view .LVU1840
@@ -13738,7 +13738,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5619 01bc B168     		ldr	r1, [r6, #8]
  5620              	.LVL654:
 3476:Middlewares/Third_Party/FatFs/src/ff.c **** 					clst = get_fat(&fp->obj, clst);
-ARM GAS  /tmp/ccH7dUYB.s 			page 230
+ARM GAS  /tmp/cczbjqIl.s 			page 230
 
 
  5621              		.loc 1 3476 5 is_stmt 1 view .LVU1858
@@ -13798,7 +13798,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5660              		.loc 1 3479 34 discriminator 1 view .LVU1873
  5661 01e2 0125     		movs	r5, #1
  5662              	.LVL660:
-ARM GAS  /tmp/ccH7dUYB.s 			page 231
+ARM GAS  /tmp/cczbjqIl.s 			page 231
 
 
 3479:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
@@ -13858,7 +13858,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
  5701              		.loc 1 3486 21 view .LVU1890
  5702 020e 0244     		add	r2, r2, r0
-ARM GAS  /tmp/ccH7dUYB.s 			page 232
+ARM GAS  /tmp/cczbjqIl.s 			page 232
 
 
 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
@@ -13918,7 +13918,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5743 0230 FAE6     		b	.L387
  5744              		.cfi_endproc
  5745              	.LFE1222:
-ARM GAS  /tmp/ccH7dUYB.s 			page 233
+ARM GAS  /tmp/cczbjqIl.s 			page 233
 
 
  5747              		.section	.text.f_read,"ax",%progbits
@@ -13978,7 +13978,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3526:Middlewares/Third_Party/FatFs/src/ff.c **** 	res = validate(&fp->obj, &fs);				/* Check validity of the file object */
  5792              		.loc 1 3526 6 view .LVU1915
  5793 0010 C8F80030 		str	r3, [r8]
-ARM GAS  /tmp/ccH7dUYB.s 			page 234
+ARM GAS  /tmp/cczbjqIl.s 			page 234
 
 
 3527:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res);	/* Check validity */
@@ -14038,7 +14038,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5832 0040 2E46     		mov	r6, r5
  5833              	.LVL682:
 3531:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 235
+ARM GAS  /tmp/cczbjqIl.s 			page 235
 
 
  5834              		.loc 1 3531 5 view .LVU1932
@@ -14098,7 +14098,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5874              		.loc 1 3551 29 discriminator 1 view .LVU1946
  5875 0070 CDF804A0 		str	r10, [sp, #4]
  5876              	.LVL689:
-ARM GAS  /tmp/ccH7dUYB.s 			page 236
+ARM GAS  /tmp/cczbjqIl.s 			page 236
 
 
 3551:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->clust = clst;				/* Update current cluster */
@@ -14158,7 +14158,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5916 009c 5345     		cmp	r3, r10
  5917 009e F5D2     		bcs	.L437
 3570:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
-ARM GAS  /tmp/ccH7dUYB.s 			page 237
+ARM GAS  /tmp/cczbjqIl.s 			page 237
 
 
  5918              		.loc 1 3570 6 is_stmt 1 view .LVU1962
@@ -14218,7 +14218,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  5958 00d4 C4F82090 		str	r9, [r4, #32]
  5959              	.LVL698:
  5960              	.L426:
-ARM GAS  /tmp/ccH7dUYB.s 			page 238
+ARM GAS  /tmp/cczbjqIl.s 			page 238
 
 
 3590:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (rcnt > btr) rcnt = btr;					/* Clip it by btr if needed */
@@ -14278,7 +14278,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3534:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (fp->fptr % SS(fs) == 0) {			/* On the sector boundary? */
  6000              		.loc 1 3534 36 view .LVU1992
  6001 0104 D8F80030 		ldr	r3, [r8]
-ARM GAS  /tmp/ccH7dUYB.s 			page 239
+ARM GAS  /tmp/cczbjqIl.s 			page 239
 
 
 3534:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (fp->fptr % SS(fs) == 0) {			/* On the sector boundary? */
@@ -14338,7 +14338,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6039              		.loc 1 3538 8 is_stmt 0 view .LVU2009
  6040 0132 0029     		cmp	r1, #0
  6041 0134 86D1     		bne	.L428
-ARM GAS  /tmp/ccH7dUYB.s 			page 240
+ARM GAS  /tmp/cczbjqIl.s 			page 240
 
 
 3539:Middlewares/Third_Party/FatFs/src/ff.c **** 				} else {						/* Middle or end of the file */
@@ -14398,7 +14398,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3557:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (cc) {							/* Read maximum contiguous sectors directly */
  6079              		.loc 1 3557 4 is_stmt 1 view .LVU2027
 3557:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (cc) {							/* Read maximum contiguous sectors directly */
-ARM GAS  /tmp/ccH7dUYB.s 			page 241
+ARM GAS  /tmp/cczbjqIl.s 			page 241
 
 
  6080              		.loc 1 3557 15 is_stmt 0 view .LVU2028
@@ -14458,7 +14458,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6119 0190 CDF804A0 		str	r10, [sp, #4]
  6120              	.LVL714:
  6121              	.L423:
-ARM GAS  /tmp/ccH7dUYB.s 			page 242
+ARM GAS  /tmp/cczbjqIl.s 			page 242
 
 
 3601:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -14518,7 +14518,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3585:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
  6164              		.loc 1 3585 57 is_stmt 1 discriminator 1 view .LVU2056
  6165 01c4 4FF0010A 		mov	r10, #1
-ARM GAS  /tmp/ccH7dUYB.s 			page 243
+ARM GAS  /tmp/cczbjqIl.s 			page 243
 
 
  6166              	.LVL720:
@@ -14578,7 +14578,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6215 0006 0446     		mov	r4, r0
  6216 0008 0F46     		mov	r7, r1
  6217 000a 1546     		mov	r5, r2
-ARM GAS  /tmp/ccH7dUYB.s 			page 244
+ARM GAS  /tmp/cczbjqIl.s 			page 244
 
 
  6218 000c 9846     		mov	r8, r3
@@ -14638,7 +14638,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6254              		.loc 1 3628 5 view .LVU2081
  6255 002a 13F0020F 		tst	r3, #2
  6256 002e 00F0EC80 		beq	.L482
-ARM GAS  /tmp/ccH7dUYB.s 			page 245
+ARM GAS  /tmp/cczbjqIl.s 			page 245
 
 
 3631:Middlewares/Third_Party/FatFs/src/ff.c **** 		btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
@@ -14698,7 +14698,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6294              		.loc 1 3657 5 view .LVU2098
 3657:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->clust = clst;			/* Update current cluster */
  6295              		.loc 1 3657 8 is_stmt 0 view .LVU2099
-ARM GAS  /tmp/ccH7dUYB.s 			page 246
+ARM GAS  /tmp/cczbjqIl.s 			page 246
 
 
  6296 0054 B0F1FF3F 		cmp	r0, #-1
@@ -14758,7 +14758,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6332              		.loc 1 3671 9 is_stmt 0 view .LVU2117
  6333 007c B144     		add	r9, r9, r6
  6334              	.LVL736:
-ARM GAS  /tmp/ccH7dUYB.s 			page 247
+ARM GAS  /tmp/cczbjqIl.s 			page 247
 
 
 3672:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (cc) {						/* Write maximum contiguous sectors directly */
@@ -14818,7 +14818,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3677:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 2
  6373              		.loc 1 3677 57 is_stmt 1 discriminator 1 view .LVU2134
  6374 00b2 CDF804A0 		str	r10, [sp, #4]
-ARM GAS  /tmp/ccH7dUYB.s 			page 248
+ARM GAS  /tmp/cczbjqIl.s 			page 248
 
 
  6375              	.LVL741:
@@ -14878,7 +14878,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3665:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->flag &= (BYTE)~FA_DIRTY;
  6419              		.loc 1 3665 5 is_stmt 1 view .LVU2145
 3665:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->flag &= (BYTE)~FA_DIRTY;
-ARM GAS  /tmp/ccH7dUYB.s 			page 249
+ARM GAS  /tmp/cczbjqIl.s 			page 249
 
 
  6420              		.loc 1 3665 9 is_stmt 0 view .LVU2146
@@ -14938,7 +14938,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3685:Middlewares/Third_Party/FatFs/src/ff.c **** 					mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
  6461              		.loc 1 3685 11 is_stmt 0 view .LVU2160
  6462 011c 236A     		ldr	r3, [r4, #32]
-ARM GAS  /tmp/ccH7dUYB.s 			page 250
+ARM GAS  /tmp/cczbjqIl.s 			page 250
 
 
 3685:Middlewares/Third_Party/FatFs/src/ff.c **** 					mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
@@ -14998,7 +14998,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6502 014c 4B45     		cmp	r3, r9
  6503 014e 03D0     		beq	.L478
 3701:Middlewares/Third_Party/FatFs/src/ff.c **** 				disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) {
-ARM GAS  /tmp/ccH7dUYB.s 			page 251
+ARM GAS  /tmp/cczbjqIl.s 			page 251
 
 
  6504              		.loc 1 3701 7 view .LVU2176
@@ -15058,7 +15058,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6542 0176 3246     		mov	r2, r6
  6543 0178 3946     		mov	r1, r7
  6544 017a 1844     		add	r0, r0, r3
-ARM GAS  /tmp/ccH7dUYB.s 			page 252
+ARM GAS  /tmp/cczbjqIl.s 			page 252
 
 
  6545 017c FFF7FEFF 		bl	mem_cpy
@@ -15118,7 +15118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6583              		.loc 1 3637 9 is_stmt 0 view .LVU2208
  6584 01a8 A169     		ldr	r1, [r4, #24]
 3637:Middlewares/Third_Party/FatFs/src/ff.c **** 			csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1);	/* Sector offset in the cluster */
-ARM GAS  /tmp/ccH7dUYB.s 			page 253
+ARM GAS  /tmp/cczbjqIl.s 			page 253
 
 
  6585              		.loc 1 3637 18 view .LVU2209
@@ -15178,7 +15178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6622 01d6 2046     		mov	r0, r4
  6623              	.LVL767:
 3643:Middlewares/Third_Party/FatFs/src/ff.c **** 					}
-ARM GAS  /tmp/ccH7dUYB.s 			page 254
+ARM GAS  /tmp/cczbjqIl.s 			page 254
 
 
  6624              		.loc 1 3643 14 view .LVU2227
@@ -15238,7 +15238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6666              	.LVL775:
 3628:Middlewares/Third_Party/FatFs/src/ff.c **** 
  6667              		.loc 1 3628 30 discriminator 1 view .LVU2240
-ARM GAS  /tmp/ccH7dUYB.s 			page 255
+ARM GAS  /tmp/cczbjqIl.s 			page 255
 
 
  6668 020e 52E7     		b	.L459
@@ -15298,7 +15298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
  6714              		.loc 1 5960 2 is_stmt 1 view .LVU2251
 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
-ARM GAS  /tmp/ccH7dUYB.s 			page 256
+ARM GAS  /tmp/cczbjqIl.s 			page 256
 
 
  6715              		.loc 1 5960 11 is_stmt 0 view .LVU2252
@@ -15358,7 +15358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6757              	.LVL785:
  6758              	.L500:
 5964:Middlewares/Third_Party/FatFs/src/ff.c **** 		i = (bw == (UINT)i) ? 0 : -1;
-ARM GAS  /tmp/ccH7dUYB.s 			page 257
+ARM GAS  /tmp/cczbjqIl.s 			page 257
 
 
  6759              		.loc 1 5964 3 is_stmt 1 view .LVU2265
@@ -15418,7 +15418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6803              		.loc 1 5979 2 view .LVU2277
 5979:Middlewares/Third_Party/FatFs/src/ff.c **** 		&& f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK
  6804              		.loc 1 5979 11 is_stmt 0 view .LVU2278
-ARM GAS  /tmp/ccH7dUYB.s 			page 258
+ARM GAS  /tmp/cczbjqIl.s 			page 258
 
 
  6805 0000 4268     		ldr	r2, [r0, #4]
@@ -15478,7 +15478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6847              	.LVL793:
  6848              	.L504:
  6849              	.LCFI61:
-ARM GAS  /tmp/ccH7dUYB.s 			page 259
+ARM GAS  /tmp/cczbjqIl.s 			page 259
 
 
  6850              		.cfi_def_cfa_offset 0
@@ -15538,7 +15538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 3737:Middlewares/Third_Party/FatFs/src/ff.c **** 	DWORD tm;
  6900              		.loc 1 3737 2 view .LVU2297
 3738:Middlewares/Third_Party/FatFs/src/ff.c **** 	BYTE *dir;
-ARM GAS  /tmp/ccH7dUYB.s 			page 260
+ARM GAS  /tmp/cczbjqIl.s 			page 260
 
 
  6901              		.loc 1 3738 2 view .LVU2298
@@ -15598,7 +15598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6938 002a 78B1     		cbz	r0, .L517
  6939              	.LVL802:
  6940              	.L512:
-ARM GAS  /tmp/ccH7dUYB.s 			page 261
+ARM GAS  /tmp/cczbjqIl.s 			page 261
 
 
 3802:Middlewares/Third_Party/FatFs/src/ff.c **** 
@@ -15658,7 +15658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  6982              		.loc 1 3789 6 is_stmt 1 view .LVU2328
  6983 0056 A268     		ldr	r2, [r4, #8]
  6984 0058 3146     		mov	r1, r6
-ARM GAS  /tmp/ccH7dUYB.s 			page 262
+ARM GAS  /tmp/cczbjqIl.s 			page 262
 
 
  6985 005a 2068     		ldr	r0, [r4]
@@ -15718,7 +15718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7027              		.cfi_endproc
  7028              	.LFE1225:
  7030              		.section	.text.f_close,"ax",%progbits
-ARM GAS  /tmp/ccH7dUYB.s 			page 263
+ARM GAS  /tmp/cczbjqIl.s 			page 263
 
 
  7031              		.align	1
@@ -15778,7 +15778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7076              		.cfi_restore_state
 3825:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res == FR_OK) {
  7077              		.loc 1 3825 3 is_stmt 1 view .LVU2351
-ARM GAS  /tmp/ccH7dUYB.s 			page 264
+ARM GAS  /tmp/cczbjqIl.s 			page 264
 
 
 3825:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (res == FR_OK) {
@@ -15838,7 +15838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7122              		.cfi_def_cfa_offset 36
  7123              		.cfi_offset 4, -36
  7124              		.cfi_offset 5, -32
-ARM GAS  /tmp/ccH7dUYB.s 			page 265
+ARM GAS  /tmp/cczbjqIl.s 			page 265
 
 
  7125              		.cfi_offset 6, -28
@@ -15898,7 +15898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4024:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (ofs == CREATE_LINKMAP) {	/* Create CLMT */
  7163              		.loc 1 4024 5 view .LVU2380
  7164 001a 002B     		cmp	r3, #0
-ARM GAS  /tmp/ccH7dUYB.s 			page 266
+ARM GAS  /tmp/cczbjqIl.s 			page 266
 
 
  7165 001c 00F08E80 		beq	.L526
@@ -15958,7 +15958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7205              		.loc 1 4027 9 view .LVU2394
  7206 003e 58F804BB 		ldr	fp, [r8], #4
  7207              	.LVL829:
-ARM GAS  /tmp/ccH7dUYB.s 			page 267
+ARM GAS  /tmp/cczbjqIl.s 			page 267
 
 
 4027:Middlewares/Third_Party/FatFs/src/ff.c **** 			cl = fp->obj.sclust;		/* Origin of the chain */
@@ -16018,7 +16018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7243 005c 2046     		mov	r0, r4
  7244 005e FFF7FEFF 		bl	get_fat
  7245              	.LVL835:
-ARM GAS  /tmp/ccH7dUYB.s 			page 268
+ARM GAS  /tmp/cczbjqIl.s 			page 268
 
 
 4035:Middlewares/Third_Party/FatFs/src/ff.c **** 						if (cl <= 1) ABORT(fs, FR_INT_ERR);
@@ -16078,7 +16078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4042:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
  7283              		.loc 1 4042 17 is_stmt 1 view .LVU2431
 4042:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
-ARM GAS  /tmp/ccH7dUYB.s 			page 269
+ARM GAS  /tmp/cczbjqIl.s 			page 269
 
 
  7284              		.loc 1 4042 21 is_stmt 0 view .LVU2432
@@ -16138,7 +16138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4044:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ulen <= tlen) {
  7324              		.loc 1 4044 15 view .LVU2447
  7325 00a2 C3F80090 		str	r9, [r3]
-ARM GAS  /tmp/ccH7dUYB.s 			page 270
+ARM GAS  /tmp/cczbjqIl.s 			page 270
 
 
 4045:Middlewares/Third_Party/FatFs/src/ff.c **** 				*tbl = 0;		/* Terminate table */
@@ -16198,7 +16198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4057:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (fp->fptr % SS(fs) && dsc != fp->sect) {	/* Refill sector cache if needed */
  7364              		.loc 1 4057 53 view .LVU2464
  7365 00da 013A     		subs	r2, r2, #1
-ARM GAS  /tmp/ccH7dUYB.s 			page 271
+ARM GAS  /tmp/cczbjqIl.s 			page 271
 
 
 4057:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (fp->fptr % SS(fs) && dsc != fp->sect) {	/* Refill sector cache if needed */
@@ -16258,7 +16258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7404              		.loc 1 4068 15 is_stmt 0 view .LVU2480
  7405 010c 2562     		str	r5, [r4, #32]
  7406 010e 91E7     		b	.L525
-ARM GAS  /tmp/ccH7dUYB.s 			page 272
+ARM GAS  /tmp/cczbjqIl.s 			page 272
 
 
  7407              	.LVL854:
@@ -16318,7 +16318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7446              	.L572:
 4066:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
  7447              		.loc 1 4066 57 is_stmt 1 discriminator 1 view .LVU2496
-ARM GAS  /tmp/ccH7dUYB.s 			page 273
+ARM GAS  /tmp/cczbjqIl.s 			page 273
 
 
  7448 0136 0126     		movs	r6, #1
@@ -16378,7 +16378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7485 0154 019A     		ldr	r2, [sp, #4]
  7486 0156 B2F80A80 		ldrh	r8, [r2, #10]
 4086:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ifptr > 0 &&
-ARM GAS  /tmp/ccH7dUYB.s 			page 274
+ARM GAS  /tmp/cczbjqIl.s 			page 274
 
 
  7487              		.loc 1 4086 29 view .LVU2514
@@ -16438,7 +16438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7524 017e 04E0     		b	.L542
  7525              	.LVL869:
  7526              	.L541:
-ARM GAS  /tmp/ccH7dUYB.s 			page 275
+ARM GAS  /tmp/cczbjqIl.s 			page 275
 
 
 4093:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
@@ -16498,7 +16498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7564 019e 2275     		strb	r2, [r4, #20]
  7565              	.L555:
 4138:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
-ARM GAS  /tmp/ccH7dUYB.s 			page 276
+ARM GAS  /tmp/cczbjqIl.s 			page 276
 
 
  7566              		.loc 1 4138 3 is_stmt 1 view .LVU2549
@@ -16558,7 +16558,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7606              	.L574:
 4096:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (clst == 1) ABORT(fs, FR_INT_ERR);
  7607              		.loc 1 4096 6 is_stmt 1 view .LVU2564
-ARM GAS  /tmp/ccH7dUYB.s 			page 277
+ARM GAS  /tmp/cczbjqIl.s 			page 277
 
 
 4096:Middlewares/Third_Party/FatFs/src/ff.c **** 					if (clst == 1) ABORT(fs, FR_INT_ERR);
@@ -16618,7 +16618,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7645              		.loc 1 4098 30 is_stmt 1 discriminator 1 view .LVU2581
 4098:Middlewares/Third_Party/FatFs/src/ff.c **** 					fp->obj.sclust = clst;
  7646              		.loc 1 4098 30 is_stmt 0 view .LVU2582
-ARM GAS  /tmp/ccH7dUYB.s 			page 278
+ARM GAS  /tmp/cczbjqIl.s 			page 278
 
 
  7647 01fa 1BE7     		b	.L525
@@ -16678,7 +16678,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7686              	.LVL884:
 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
  7687              		.loc 1 4106 18 is_stmt 1 view .LVU2598
-ARM GAS  /tmp/ccH7dUYB.s 			page 279
+ARM GAS  /tmp/cczbjqIl.s 			page 279
 
 
 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
@@ -16738,7 +16738,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4127:Middlewares/Third_Party/FatFs/src/ff.c **** 					nsect = clust2sect(fs, clst);	/* Current sector */
  7726              		.loc 1 4127 13 view .LVU2615
  7727 024c B7FBF8F3 		udiv	r3, r7, r8
-ARM GAS  /tmp/ccH7dUYB.s 			page 280
+ARM GAS  /tmp/cczbjqIl.s 			page 280
 
 
  7728 0250 08FB1373 		mls	r3, r8, r3, r7
@@ -16798,7 +16798,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7766              	.LVL895:
 4123:Middlewares/Third_Party/FatFs/src/ff.c **** 					fp->clust = clst;
  7767              		.loc 1 4123 45 is_stmt 0 discriminator 3 view .LVU2632
-ARM GAS  /tmp/ccH7dUYB.s 			page 281
+ARM GAS  /tmp/cczbjqIl.s 			page 281
 
 
  7768 0270 6675     		strb	r6, [r4, #21]
@@ -16858,7 +16858,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7807 0294 95E7     		b	.L556
  7808              	.L581:
 4142:Middlewares/Third_Party/FatFs/src/ff.c **** 				fp->flag &= (BYTE)~FA_DIRTY;
-ARM GAS  /tmp/ccH7dUYB.s 			page 282
+ARM GAS  /tmp/cczbjqIl.s 			page 282
 
 
  7809              		.loc 1 4142 62 is_stmt 1 discriminator 1 view .LVU2648
@@ -16918,7 +16918,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7854              		.cfi_def_cfa_offset 12
  7855              		.cfi_offset 4, -12
  7856              		.cfi_offset 5, -8
-ARM GAS  /tmp/ccH7dUYB.s 			page 283
+ARM GAS  /tmp/cczbjqIl.s 			page 283
 
 
  7857              		.cfi_offset 14, -4
@@ -16978,7 +16978,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7896 001e 2046     		mov	r0, r4
  7897 0020 05B0     		add	sp, sp, #20
  7898              	.LCFI77:
-ARM GAS  /tmp/ccH7dUYB.s 			page 284
+ARM GAS  /tmp/cczbjqIl.s 			page 284
 
 
  7899              		.cfi_remember_state
@@ -17038,7 +17038,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7937              		.loc 1 4196 21 is_stmt 0 view .LVU2690
  7938 0044 296A     		ldr	r1, [r5, #32]
  7939 0046 0398     		ldr	r0, [sp, #12]
-ARM GAS  /tmp/ccH7dUYB.s 			page 285
+ARM GAS  /tmp/cczbjqIl.s 			page 285
 
 
  7940              	.LVL917:
@@ -17098,7 +17098,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  7977 006a 0021     		movs	r1, #0
  7978 006c 2846     		mov	r0, r5
  7979              	.LVL920:
-ARM GAS  /tmp/ccH7dUYB.s 			page 286
+ARM GAS  /tmp/cczbjqIl.s 			page 286
 
 
 4208:Middlewares/Third_Party/FatFs/src/ff.c **** 						if (!obj->lockid) res = FR_TOO_MANY_OPEN_FILES;
@@ -17158,7 +17158,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8021              	.LFE1228:
  8023              		.section	.text.f_closedir,"ax",%progbits
  8024              		.align	1
-ARM GAS  /tmp/ccH7dUYB.s 			page 287
+ARM GAS  /tmp/cczbjqIl.s 			page 287
 
 
  8025              		.global	f_closedir
@@ -17218,7 +17218,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4249:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
  8067              		.loc 1 4249 4 is_stmt 1 view .LVU2734
 4249:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
-ARM GAS  /tmp/ccH7dUYB.s 			page 288
+ARM GAS  /tmp/cczbjqIl.s 			page 288
 
 
  8068              		.loc 1 4249 15 is_stmt 0 view .LVU2735
@@ -17278,7 +17278,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8117 0002 82B0     		sub	sp, sp, #8
  8118              	.LCFI84:
  8119              		.cfi_def_cfa_offset 24
-ARM GAS  /tmp/ccH7dUYB.s 			page 289
+ARM GAS  /tmp/cczbjqIl.s 			page 289
 
 
  8120 0004 0446     		mov	r4, r0
@@ -17338,7 +17338,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8156              		.loc 1 4284 5 is_stmt 1 view .LVU2760
  8157 0022 2946     		mov	r1, r5
  8158 0024 2046     		mov	r0, r4
-ARM GAS  /tmp/ccH7dUYB.s 			page 290
+ARM GAS  /tmp/cczbjqIl.s 			page 290
 
 
  8159 0026 FFF7FEFF 		bl	get_fileinfo
@@ -17398,7 +17398,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8201 004a 0646     		mov	r6, r0
  8202 004c FAE7     		b	.L603
  8203              		.cfi_endproc
-ARM GAS  /tmp/ccH7dUYB.s 			page 291
+ARM GAS  /tmp/cczbjqIl.s 			page 291
 
 
  8204              	.LFE1230:
@@ -17458,7 +17458,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8250              	.L610:
 4375:Middlewares/Third_Party/FatFs/src/ff.c **** 	}
  8251              		.loc 1 4375 16 is_stmt 1 view .LVU2783
-ARM GAS  /tmp/ccH7dUYB.s 			page 292
+ARM GAS  /tmp/cczbjqIl.s 			page 292
 
 
 4378:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -17518,7 +17518,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8292              	.LVL954:
 4372:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
  8293              		.loc 1 4372 14 is_stmt 0 discriminator 1 view .LVU2798
-ARM GAS  /tmp/ccH7dUYB.s 			page 293
+ARM GAS  /tmp/cczbjqIl.s 			page 293
 
 
  8294 003a FFF7FEFF 		bl	get_fileinfo
@@ -17578,7 +17578,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8342              		.loc 1 4398 2 view .LVU2806
 4399:Middlewares/Third_Party/FatFs/src/ff.c **** 
  8343              		.loc 1 4399 2 view .LVU2807
-ARM GAS  /tmp/ccH7dUYB.s 			page 294
+ARM GAS  /tmp/cczbjqIl.s 			page 294
 
 
 4403:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (res == FR_OK) {
@@ -17638,7 +17638,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8381              		.loc 1 4411 4 is_stmt 1 view .LVU2824
  8382              	.LVL962:
 4412:Middlewares/Third_Party/FatFs/src/ff.c **** 				clst = 2; obj.fs = fs;
-ARM GAS  /tmp/ccH7dUYB.s 			page 295
+ARM GAS  /tmp/cczbjqIl.s 			page 295
 
 
  8383              		.loc 1 4412 4 view .LVU2825
@@ -17698,7 +17698,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8421              	.LVL969:
 4419:Middlewares/Third_Party/FatFs/src/ff.c **** 			} else {
  8422              		.loc 1 4419 25 is_stmt 0 view .LVU2842
-ARM GAS  /tmp/ccH7dUYB.s 			page 296
+ARM GAS  /tmp/cczbjqIl.s 			page 296
 
 
  8423 004c 079B     		ldr	r3, [sp, #28]
@@ -17758,7 +17758,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8461              		.loc 1 4444 14 view .LVU2858
  8462 0072 5146     		mov	r1, r10
  8463 0074 0798     		ldr	r0, [sp, #28]
-ARM GAS  /tmp/ccH7dUYB.s 			page 297
+ARM GAS  /tmp/cczbjqIl.s 			page 297
 
 
  8464 0076 FFF7FEFF 		bl	move_window
@@ -17818,7 +17818,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4451:Middlewares/Third_Party/FatFs/src/ff.c **** 						} else {
  8502              		.loc 1 4451 18 is_stmt 0 view .LVU2875
  8503 0096 023E     		subs	r6, r6, #2
-ARM GAS  /tmp/ccH7dUYB.s 			page 298
+ARM GAS  /tmp/cczbjqIl.s 			page 298
 
 
  8504              	.LVL982:
@@ -17878,7 +17878,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8542 00b0 FFF7FEFF 		bl	ld_dword
  8543              	.LVL988:
 4453:Middlewares/Third_Party/FatFs/src/ff.c **** 							p += 4; i -= 4;
-ARM GAS  /tmp/ccH7dUYB.s 			page 299
+ARM GAS  /tmp/cczbjqIl.s 			page 299
 
 
  8544              		.loc 1 4453 11 discriminator 1 view .LVU2892
@@ -17938,7 +17938,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8584              	.LVL993:
  8585              	.L628:
  8586              	.LCFI94:
-ARM GAS  /tmp/ccH7dUYB.s 			page 300
+ARM GAS  /tmp/cczbjqIl.s 			page 300
 
 
  8587              		.cfi_restore_state
@@ -17998,7 +17998,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8632 000e 0028     		cmp	r0, #0
  8633 0010 49D1     		bne	.L636
 4485:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED);	/* Check access mode */
-ARM GAS  /tmp/ccH7dUYB.s 			page 301
+ARM GAS  /tmp/cczbjqIl.s 			page 301
 
 
  8634              		.loc 1 4485 27 discriminator 2 view .LVU2918
@@ -18058,7 +18058,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4501:Middlewares/Third_Party/FatFs/src/ff.c **** 		fp->flag |= FA_MODIFIED;
  8673              		.loc 1 4501 23 is_stmt 0 view .LVU2934
  8674 003a A369     		ldr	r3, [r4, #24]
-ARM GAS  /tmp/ccH7dUYB.s 			page 302
+ARM GAS  /tmp/cczbjqIl.s 			page 302
 
 
 4501:Middlewares/Third_Party/FatFs/src/ff.c **** 		fp->flag |= FA_MODIFIED;
@@ -18118,7 +18118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4494:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR;
  8714              		.loc 1 4494 4 is_stmt 1 view .LVU2950
 4495:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (ncl == 1) res = FR_INT_ERR;
-ARM GAS  /tmp/ccH7dUYB.s 			page 303
+ARM GAS  /tmp/cczbjqIl.s 			page 303
 
 
  8715              		.loc 1 4495 4 view .LVU2951
@@ -18178,7 +18178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8755              		.loc 1 4496 22 discriminator 1 view .LVU2965
  8756 009a 0225     		movs	r5, #2
  8757 009c CDE7     		b	.L638
-ARM GAS  /tmp/ccH7dUYB.s 			page 304
+ARM GAS  /tmp/cczbjqIl.s 			page 304
 
 
  8758              	.LVL1008:
@@ -18238,7 +18238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8805              		.cfi_offset 5, -16
  8806              		.cfi_offset 6, -12
  8807              		.cfi_offset 7, -8
-ARM GAS  /tmp/ccH7dUYB.s 			page 305
+ARM GAS  /tmp/cczbjqIl.s 			page 305
 
 
  8808              		.cfi_offset 14, -4
@@ -18298,7 +18298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8848              	.L656:
  8849              	.LCFI101:
  8850              		.cfi_restore_state
-ARM GAS  /tmp/ccH7dUYB.s 			page 306
+ARM GAS  /tmp/cczbjqIl.s 			page 306
 
 
 4543:Middlewares/Third_Party/FatFs/src/ff.c **** 		res = follow_path(&dj, path);		/* Follow the file path */
@@ -18358,7 +18358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4555:Middlewares/Third_Party/FatFs/src/ff.c **** 					res = FR_DENIED;		/* Cannot remove R/O object */
  8888              		.loc 1 4555 8 view .LVU3006
  8889 0046 15F0010F 		tst	r5, #1
-ARM GAS  /tmp/ccH7dUYB.s 			page 307
+ARM GAS  /tmp/cczbjqIl.s 			page 307
 
 
  8890 004a 39D1     		bne	.L653
@@ -18418,7 +18418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8930              		.loc 1 4597 8 view .LVU3020
  8931 0076 D0B9     		cbnz	r0, .L658
  8932              	.LVL1029:
-ARM GAS  /tmp/ccH7dUYB.s 			page 308
+ARM GAS  /tmp/cczbjqIl.s 			page 308
 
 
  8933              	.L651:
@@ -18478,7 +18478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  8971 009a 04A8     		add	r0, sp, #16
  8972              	.LVL1035:
 4588:Middlewares/Third_Party/FatFs/src/ff.c **** 							if (res == FR_OK) res = FR_DENIED;	/* Not empty? */
-ARM GAS  /tmp/ccH7dUYB.s 			page 309
+ARM GAS  /tmp/cczbjqIl.s 			page 309
 
 
  8973              		.loc 1 4588 14 view .LVU3037
@@ -18538,7 +18538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9018              		.thumb
  9019              		.thumb_func
  9021              	f_mkdir:
-ARM GAS  /tmp/ccH7dUYB.s 			page 310
+ARM GAS  /tmp/cczbjqIl.s 			page 310
 
 
  9022              	.LVL1041:
@@ -18598,7 +18598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9063 0014 0493     		str	r3, [sp, #16]
 4636:Middlewares/Third_Party/FatFs/src/ff.c **** 		INIT_NAMBUF(fs);
  9064              		.loc 1 4636 2 is_stmt 1 view .LVU3061
-ARM GAS  /tmp/ccH7dUYB.s 			page 311
+ARM GAS  /tmp/cczbjqIl.s 			page 311
 
 
 4636:Middlewares/Third_Party/FatFs/src/ff.c **** 		INIT_NAMBUF(fs);
@@ -18658,7 +18658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9105              		.loc 1 4644 4 is_stmt 1 view .LVU3075
 4644:Middlewares/Third_Party/FatFs/src/ff.c **** 			dj.obj.objsize = (DWORD)fs->csize * SS(fs);
  9106              		.loc 1 4644 10 is_stmt 0 view .LVU3076
-ARM GAS  /tmp/ccH7dUYB.s 			page 312
+ARM GAS  /tmp/cczbjqIl.s 			page 312
 
 
  9107 0038 0021     		movs	r1, #0
@@ -18718,7 +18718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9146              	.L662:
 4650:Middlewares/Third_Party/FatFs/src/ff.c **** 			tm = GET_FATTIME();
  9147              		.loc 1 4650 4 is_stmt 1 view .LVU3092
-ARM GAS  /tmp/ccH7dUYB.s 			page 313
+ARM GAS  /tmp/cczbjqIl.s 			page 313
 
 
 4650:Middlewares/Third_Party/FatFs/src/ff.c **** 			tm = GET_FATTIME();
@@ -18778,7 +18778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9188 0088 0B22     		movs	r2, #11
  9189 008a 2021     		movs	r1, #32
  9190 008c 4046     		mov	r0, r8
-ARM GAS  /tmp/ccH7dUYB.s 			page 314
+ARM GAS  /tmp/cczbjqIl.s 			page 314
 
 
  9191 008e FFF7FEFF 		bl	mem_set
@@ -18838,7 +18838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9230 00c8 0398     		ldr	r0, [sp, #12]
  9231 00ca 0378     		ldrb	r3, [r0]	@ zero_extendqisi2
 4664:Middlewares/Third_Party/FatFs/src/ff.c **** 					st_clust(fs, dir + SZDIRE, pcl);
-ARM GAS  /tmp/ccH7dUYB.s 			page 315
+ARM GAS  /tmp/cczbjqIl.s 			page 315
 
 
  9232              		.loc 1 4664 9 view .LVU3122
@@ -18898,7 +18898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9271 00f0 039B     		ldr	r3, [sp, #12]
  9272 00f2 9A89     		ldrh	r2, [r3, #12]
  9273 00f4 0021     		movs	r1, #0
-ARM GAS  /tmp/ccH7dUYB.s 			page 316
+ARM GAS  /tmp/cczbjqIl.s 			page 316
 
 
  9274 00f6 4046     		mov	r0, r8
@@ -18958,7 +18958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9315              		.loc 1 4664 61 discriminator 2 view .LVU3150
  9316 0118 DAE7     		b	.L665
  9317              	.LVL1083:
-ARM GAS  /tmp/ccH7dUYB.s 			page 317
+ARM GAS  /tmp/cczbjqIl.s 			page 317
 
 
  9318              	.L667:
@@ -19018,7 +19018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4694:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->wflag = 1;
  9360              		.loc 1 4694 6 view .LVU3163
 4694:Middlewares/Third_Party/FatFs/src/ff.c **** 					fs->wflag = 1;
-ARM GAS  /tmp/ccH7dUYB.s 			page 318
+ARM GAS  /tmp/cczbjqIl.s 			page 318
 
 
  9361              		.loc 1 4694 20 is_stmt 0 view .LVU3164
@@ -19078,7 +19078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9408 0002 A3B0     		sub	sp, sp, #140
  9409              	.LCFI107:
  9410              		.cfi_def_cfa_offset 152
-ARM GAS  /tmp/ccH7dUYB.s 			page 319
+ARM GAS  /tmp/cczbjqIl.s 			page 319
 
 
  9411 0004 0190     		str	r0, [sp, #4]
@@ -19138,7 +19138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 4733:Middlewares/Third_Party/FatFs/src/ff.c **** 		INIT_NAMBUF(fs);
  9451              		.loc 1 4733 3 is_stmt 1 view .LVU3188
 4733:Middlewares/Third_Party/FatFs/src/ff.c **** 		INIT_NAMBUF(fs);
-ARM GAS  /tmp/ccH7dUYB.s 			page 320
+ARM GAS  /tmp/cczbjqIl.s 			page 320
 
 
  9452              		.loc 1 4733 14 is_stmt 0 view .LVU3189
@@ -19198,7 +19198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9491 004c 1E99     		ldr	r1, [sp, #120]
  9492 004e 0B31     		adds	r1, r1, #11
  9493 0050 03A8     		add	r0, sp, #12
-ARM GAS  /tmp/ccH7dUYB.s 			page 321
+ARM GAS  /tmp/cczbjqIl.s 			page 321
 
 
  9494 0052 FFF7FEFF 		bl	mem_cpy
@@ -19258,7 +19258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9536              		.loc 1 4775 8 is_stmt 0 view .LVU3216
  9537 0084 0428     		cmp	r0, #4
  9538 0086 0CD0     		beq	.L687
-ARM GAS  /tmp/ccH7dUYB.s 			page 322
+ARM GAS  /tmp/cczbjqIl.s 			page 322
 
 
  9539              	.LVL1113:
@@ -19318,7 +19318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9578              		.loc 1 4778 7 is_stmt 1 view .LVU3231
 4778:Middlewares/Third_Party/FatFs/src/ff.c **** 						mem_cpy(dir + 13, buf + 2, 19);
  9579              		.loc 1 4778 11 is_stmt 0 view .LVU3232
-ARM GAS  /tmp/ccH7dUYB.s 			page 323
+ARM GAS  /tmp/cczbjqIl.s 			page 323
 
 
  9580 00ae 129D     		ldr	r5, [sp, #72]
@@ -19378,7 +19378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9620              	.LVL1124:
  9621 00e8 0146     		mov	r1, r0
 4783:Middlewares/Third_Party/FatFs/src/ff.c **** 							if (!dw) {
-ARM GAS  /tmp/ccH7dUYB.s 			page 324
+ARM GAS  /tmp/cczbjqIl.s 			page 324
 
 
  9622              		.loc 1 4783 13 discriminator 1 view .LVU3247
@@ -19438,7 +19438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9662              	.LVL1131:
 4791:Middlewares/Third_Party/FatFs/src/ff.c **** 									fs->wflag = 1;
  9663              		.loc 1 4791 10 is_stmt 0 view .LVU3262
-ARM GAS  /tmp/ccH7dUYB.s 			page 325
+ARM GAS  /tmp/cczbjqIl.s 			page 325
 
 
  9664 0116 FFF7FEFF 		bl	st_clust
@@ -19498,7 +19498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9705 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
  9706              	.LCFI110:
  9707              		.cfi_def_cfa_offset 36
-ARM GAS  /tmp/ccH7dUYB.s 			page 326
+ARM GAS  /tmp/cczbjqIl.s 			page 326
 
 
  9708              		.cfi_offset 4, -36
@@ -19558,7 +19558,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9745              		.loc 1 5328 5 is_stmt 0 view .LVU3284
  9746 0014 0028     		cmp	r0, #0
 5328:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (FatFs[vol]) FatFs[vol]->fs_type = 0;	/* Clear the volume */
-ARM GAS  /tmp/ccH7dUYB.s 			page 327
+ARM GAS  /tmp/cczbjqIl.s 			page 327
 
 
  9747              		.loc 1 5328 5 view .LVU3285
@@ -19618,7 +19618,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9784 0042 2046     		mov	r0, r4
  9785              	.LVL1141:
 5337:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS != _MIN_SS		/* Get sector size of the medium if variable sector size cfg. */
-ARM GAS  /tmp/ccH7dUYB.s 			page 328
+ARM GAS  /tmp/cczbjqIl.s 			page 328
 
 
  9786              		.loc 1 5337 6 view .LVU3303
@@ -19678,7 +19678,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9826 007e 00F2D082 		bhi	.L742
 5340:Middlewares/Third_Party/FatFs/src/ff.c **** #else
  9827              		.loc 1 5340 48 discriminator 2 view .LVU3318
-ARM GAS  /tmp/ccH7dUYB.s 			page 329
+ARM GAS  /tmp/cczbjqIl.s 			page 329
 
 
  9828 0082 5A1E     		subs	r2, r3, #1
@@ -19738,7 +19738,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9866 00b6 00F0BE82 		beq	.L747
 5354:Middlewares/Third_Party/FatFs/src/ff.c **** 		/* Get partition information from partition table in the MBR */
  9867              		.loc 1 5354 2 is_stmt 1 view .LVU3335
-ARM GAS  /tmp/ccH7dUYB.s 			page 330
+ARM GAS  /tmp/cczbjqIl.s 			page 330
 
 
 5364:Middlewares/Third_Party/FatFs/src/ff.c **** 		b_vol = (opt & FM_SFD) ? 0 : 63;		/* Volume start sector */
@@ -19798,7 +19798,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9905 00ea 802D     		cmp	r5, #128
  9906 00ec 00F2B882 		bhi	.L752
 5379:Middlewares/Third_Party/FatFs/src/ff.c **** 			if ((opt & FM_ANY) == FM_FAT32 || !(opt & FM_FAT)) {	/* FAT32 only or no-FAT? */
-ARM GAS  /tmp/ccH7dUYB.s 			page 331
+ARM GAS  /tmp/cczbjqIl.s 			page 331
 
 
  9907              		.loc 1 5379 3 is_stmt 1 view .LVU3353
@@ -19858,7 +19858,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9950 0136 1D46     		mov	r5, r3
  9951              	.LVL1152:
 5604:Middlewares/Third_Party/FatFs/src/ff.c **** 					}
-ARM GAS  /tmp/ccH7dUYB.s 			page 332
+ARM GAS  /tmp/cczbjqIl.s 			page 332
 
 
  9952              		.loc 1 5604 10 view .LVU3365
@@ -19918,7 +19918,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  9990 015a 0444     		add	r4, r4, r0
 5564:Middlewares/Third_Party/FatFs/src/ff.c **** 			} else {				/* FAT12/16 volume */
  9991              		.loc 1 5564 8 view .LVU3382
-ARM GAS  /tmp/ccH7dUYB.s 			page 333
+ARM GAS  /tmp/cczbjqIl.s 			page 333
 
 
  9992 015c 5248     		ldr	r0, .L793+8
@@ -19978,7 +19978,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10031 0186 DDD0     		beq	.L706
 5558:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
  10032              		.loc 1 5558 36 discriminator 3 view .LVU3398
-ARM GAS  /tmp/ccH7dUYB.s 			page 334
+ARM GAS  /tmp/cczbjqIl.s 			page 334
 
 
  10033 0188 A342     		cmp	r3, r4
@@ -20038,7 +20038,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10072              		.loc 1 5575 6 view .LVU3413
 5575:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
  10073              		.loc 1 5575 18 is_stmt 0 view .LVU3414
-ARM GAS  /tmp/ccH7dUYB.s 			page 335
+ARM GAS  /tmp/cczbjqIl.s 			page 335
 
 
  10074 01ac 03EB4303 		add	r3, r3, r3, lsl #1
@@ -20098,7 +20098,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10113              	.LVL1178:
 5597:Middlewares/Third_Party/FatFs/src/ff.c **** 					return FR_MKFS_ABORTED;
  10114              		.loc 1 5597 14 discriminator 1 view .LVU3430
-ARM GAS  /tmp/ccH7dUYB.s 			page 336
+ARM GAS  /tmp/cczbjqIl.s 			page 336
 
 
  10115 01d4 B8F1010F 		cmp	r8, #1
@@ -20158,7 +20158,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10153 01fe A846     		mov	r8, r5
  10154              	.LVL1183:
  10155              	.L710:
-ARM GAS  /tmp/ccH7dUYB.s 			page 337
+ARM GAS  /tmp/cczbjqIl.s 			page 337
 
 
 5570:Middlewares/Third_Party/FatFs/src/ff.c **** 				if (n_clst > MAX_FAT12) {
@@ -20218,7 +20218,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5581:Middlewares/Third_Party/FatFs/src/ff.c **** 			b_data = b_fat + sz_fat * n_fats + sz_dir;	/* Data base */
  10194              		.loc 1 5581 10 is_stmt 0 view .LVU3463
  10195 0228 0EEB0B09 		add	r9, lr, fp
-ARM GAS  /tmp/ccH7dUYB.s 			page 338
+ARM GAS  /tmp/cczbjqIl.s 			page 338
 
 
  10196              	.LVL1191:
@@ -20278,7 +20278,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10233 0250 C0F00C82 		bcc	.L759
 5594:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (fmt == FS_FAT32) {
  10234              		.loc 1 5594 4 is_stmt 1 view .LVU3481
-ARM GAS  /tmp/ccH7dUYB.s 			page 339
+ARM GAS  /tmp/cczbjqIl.s 			page 339
 
 
 5594:Middlewares/Third_Party/FatFs/src/ff.c **** 			if (fmt == FS_FAT32) {
@@ -20338,7 +20338,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5609:Middlewares/Third_Party/FatFs/src/ff.c **** 					return FR_MKFS_ABORTED;
  10273              		.loc 1 5609 6 is_stmt 1 view .LVU3498
 5609:Middlewares/Third_Party/FatFs/src/ff.c **** 					return FR_MKFS_ABORTED;
-ARM GAS  /tmp/ccH7dUYB.s 			page 340
+ARM GAS  /tmp/cczbjqIl.s 			page 340
 
 
  10274              		.loc 1 5609 9 is_stmt 0 view .LVU3499
@@ -20398,7 +20398,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10318 02c8 40F6F572 		movw	r2, #4085
  10319 02cc BAF1010F 		cmp	r10, #1
  10320 02d0 14BF     		ite	ne
-ARM GAS  /tmp/ccH7dUYB.s 			page 341
+ARM GAS  /tmp/cczbjqIl.s 			page 341
 
 
  10321 02d2 0023     		movne	r3, #0
@@ -20458,7 +20458,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10363 0314 3374     		strb	r3, [r6, #16]
 5634:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (sz_vol < 0x10000) {
  10364              		.loc 1 5634 3 is_stmt 1 view .LVU3522
-ARM GAS  /tmp/ccH7dUYB.s 			page 342
+ARM GAS  /tmp/cczbjqIl.s 			page 342
 
 
  10365 0316 06F11100 		add	r0, r6, #17
@@ -20518,7 +20518,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10406              		.loc 1 5644 6 is_stmt 0 view .LVU3535
  10407 035e BAF1030F 		cmp	r10, #3
  10408 0362 6BD0     		beq	.L787
-ARM GAS  /tmp/ccH7dUYB.s 			page 343
+ARM GAS  /tmp/cczbjqIl.s 			page 343
 
 
 5654:Middlewares/Third_Party/FatFs/src/ff.c **** 			st_word(buf + BPB_FATSz16, (WORD)sz_fat);	/* FAT size [sector] */
@@ -20578,7 +20578,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10451 03ac FFF7FEFF 		bl	disk_write
  10452              	.LVL1224:
 5661:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 344
+ARM GAS  /tmp/cczbjqIl.s 			page 344
 
 
  10453              		.loc 1 5661 6 discriminator 1 view .LVU3548
@@ -20638,7 +20638,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5697:Middlewares/Third_Party/FatFs/src/ff.c **** 		do {
  10494              		.loc 1 5697 35 view .LVU3562
  10495 03e2 DDF82080 		ldr	r8, [sp, #32]
-ARM GAS  /tmp/ccH7dUYB.s 			page 345
+ARM GAS  /tmp/cczbjqIl.s 			page 345
 
 
  10496 03e6 0197     		str	r7, [sp, #4]
@@ -20698,7 +20698,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10535              		.loc 1 5709 3 view .LVU3577
 5709:Middlewares/Third_Party/FatFs/src/ff.c **** 			sys = 0x0C;		/* FAT32X */
  10536              		.loc 1 5709 6 is_stmt 0 view .LVU3578
-ARM GAS  /tmp/ccH7dUYB.s 			page 346
+ARM GAS  /tmp/cczbjqIl.s 			page 346
 
 
  10537 040e BAF1030F 		cmp	r10, #3
@@ -20758,7 +20758,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5647:Middlewares/Third_Party/FatFs/src/ff.c **** 			st_word(buf + BPB_FSInfo32, 1);				/* Offset of FSINFO sector (VBR + 1) */
  10579              		.loc 1 5647 4 view .LVU3591
  10580 0454 0221     		movs	r1, #2
-ARM GAS  /tmp/ccH7dUYB.s 			page 347
+ARM GAS  /tmp/cczbjqIl.s 			page 347
 
 
  10581 0456 06F12C00 		add	r0, r6, #44
@@ -20818,7 +20818,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10625 04a6 6A49     		ldr	r1, .L795+12
  10626 04a8 3046     		mov	r0, r6
  10627 04aa FFF7FEFF 		bl	st_dword
-ARM GAS  /tmp/ccH7dUYB.s 			page 348
+ARM GAS  /tmp/cczbjqIl.s 			page 348
 
 
  10628              	.LVL1251:
@@ -20878,7 +20878,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5685:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
  10673              		.loc 1 5685 5 is_stmt 0 discriminator 2 view .LVU3611
  10674 0500 6FF00701 		mvn	r1, #7
-ARM GAS  /tmp/ccH7dUYB.s 			page 349
+ARM GAS  /tmp/cczbjqIl.s 			page 349
 
 
  10675              	.L731:
@@ -20938,7 +20938,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10716              		.loc 1 5693 13 view .LVU3624
  10717 053a B8EB0A08 		subs	r8, r8, r10
  10718              	.LVL1265:
-ARM GAS  /tmp/ccH7dUYB.s 			page 350
+ARM GAS  /tmp/cczbjqIl.s 			page 350
 
 
 5693:Middlewares/Third_Party/FatFs/src/ff.c **** 		}
@@ -20998,7 +20998,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10763 0578 4FF00408 		mov	r8, #4
  10764              	.LVL1275:
 5715:Middlewares/Third_Party/FatFs/src/ff.c **** 			}
-ARM GAS  /tmp/ccH7dUYB.s 			page 351
+ARM GAS  /tmp/cczbjqIl.s 			page 351
 
 
  10765              		.loc 1 5715 9 discriminator 1 view .LVU3635
@@ -21058,7 +21058,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5734:Middlewares/Third_Party/FatFs/src/ff.c **** 			pte[PTE_System] = sys;				/* System type */
  10804              		.loc 1 5734 19 is_stmt 0 view .LVU3651
  10805 05ac 86F8C151 		strb	r5, [r6, #449]
-ARM GAS  /tmp/ccH7dUYB.s 			page 352
+ARM GAS  /tmp/cczbjqIl.s 			page 352
 
 
 5735:Middlewares/Third_Party/FatFs/src/ff.c **** 			n = (b_vol + sz_vol) / (63 * 255);	/* (End CHS may be invalid) */
@@ -21118,7 +21118,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10843 05e8 3B46     		mov	r3, r7
  10844 05ea 2A46     		mov	r2, r5
  10845 05ec 3146     		mov	r1, r6
-ARM GAS  /tmp/ccH7dUYB.s 			page 353
+ARM GAS  /tmp/cczbjqIl.s 			page 353
 
 
  10846 05ee 2046     		mov	r0, r4
@@ -21178,7 +21178,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 5336:Middlewares/Third_Party/FatFs/src/ff.c **** 	if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK || !sz_blk || sz_blk > 32768 || (sz_blk & 
  10889              		.loc 1 5336 33 discriminator 1 view .LVU3680
  10890 0616 0A20     		movs	r0, #10
-ARM GAS  /tmp/ccH7dUYB.s 			page 354
+ARM GAS  /tmp/cczbjqIl.s 			page 354
 
 
  10891              	.LVL1294:
@@ -21238,7 +21238,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10937              		.loc 1 5366 30 discriminator 1 view .LVU3688
  10938 063e 0E20     		movs	r0, #14
  10939 0640 EAE7     		b	.L696
-ARM GAS  /tmp/ccH7dUYB.s 			page 355
+ARM GAS  /tmp/cczbjqIl.s 			page 355
 
 
  10940              	.L796:
@@ -21298,7 +21298,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  10985              	.LVL1305:
  10986              	.L764:
 5614:Middlewares/Third_Party/FatFs/src/ff.c **** 				}
-ARM GAS  /tmp/ccH7dUYB.s 			page 356
+ARM GAS  /tmp/cczbjqIl.s 			page 356
 
 
  10987              		.loc 1 5614 13 view .LVU3698
@@ -21358,7 +21358,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11035              		@ frame_needed = 0, uses_anonymous_args = 0
 5835:Middlewares/Third_Party/FatFs/src/ff.c **** 	int n = 0;
  11036              		.loc 1 5835 1 is_stmt 0 view .LVU3707
-ARM GAS  /tmp/ccH7dUYB.s 			page 357
+ARM GAS  /tmp/cczbjqIl.s 			page 357
 
 
  11037 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
@@ -21418,7 +21418,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11078 0018 AB42     		cmp	r3, r5
  11079 001a 13DD     		ble	.L799
 5887:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (rc != 1) break;
-ARM GAS  /tmp/ccH7dUYB.s 			page 358
+ARM GAS  /tmp/cczbjqIl.s 			page 358
 
 
  11080              		.loc 1 5887 3 is_stmt 1 view .LVU3721
@@ -21478,7 +21478,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11119              	.L799:
 5896:Middlewares/Third_Party/FatFs/src/ff.c **** 	return n ? buff : 0;			/* When no data read (eof or error), return with error. */
  11120              		.loc 1 5896 2 is_stmt 1 view .LVU3737
-ARM GAS  /tmp/ccH7dUYB.s 			page 359
+ARM GAS  /tmp/cczbjqIl.s 			page 359
 
 
 5896:Middlewares/Third_Party/FatFs/src/ff.c **** 	return n ? buff : 0;			/* When no data read (eof or error), return with error. */
@@ -21538,7 +21538,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11162              		.loc 1 6002 1 is_stmt 0 view .LVU3746
  11163 0000 10B5     		push	{r4, lr}
  11164              	.LCFI118:
-ARM GAS  /tmp/ccH7dUYB.s 			page 360
+ARM GAS  /tmp/cczbjqIl.s 			page 360
 
 
  11165              		.cfi_def_cfa_offset 8
@@ -21598,7 +21598,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 6015:Middlewares/Third_Party/FatFs/src/ff.c **** /* Put a string to the file                                              */
 6016:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
 6017:Middlewares/Third_Party/FatFs/src/ff.c **** 
-ARM GAS  /tmp/ccH7dUYB.s 			page 361
+ARM GAS  /tmp/cczbjqIl.s 			page 361
 
 
 6018:Middlewares/Third_Party/FatFs/src/ff.c **** int f_puts (
@@ -21658,7 +21658,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 6029:Middlewares/Third_Party/FatFs/src/ff.c **** }
  11252              		.loc 1 6029 1 view .LVU3768
  11253 0022 14B0     		add	sp, sp, #80
-ARM GAS  /tmp/ccH7dUYB.s 			page 362
+ARM GAS  /tmp/cczbjqIl.s 			page 362
 
 
  11254              	.LCFI123:
@@ -21718,7 +21718,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11296              		.cfi_def_cfa_offset 160
  11297 0008 0146     		mov	r1, r0
  11298 000a 25AC     		add	r4, sp, #148
-ARM GAS  /tmp/ccH7dUYB.s 			page 363
+ARM GAS  /tmp/cczbjqIl.s 			page 363
 
 
  11299 000c 54F8045B 		ldr	r5, [r4], #4
@@ -21778,7 +21778,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 6061:Middlewares/Third_Party/FatFs/src/ff.c **** 			continue;
  11336              		.loc 1 6061 4 view .LVU3790
 6057:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (c == 0) break;			/* End of string */
-ARM GAS  /tmp/ccH7dUYB.s 			page 364
+ARM GAS  /tmp/cczbjqIl.s 			page 364
 
 
  11337              		.loc 1 6057 11 is_stmt 0 view .LVU3791
@@ -21838,7 +21838,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11377              	.LVL1349:
 6066:Middlewares/Third_Party/FatFs/src/ff.c **** 			f = 1; c = *fmt++;
  11378              		.loc 1 6066 6 view .LVU3808
-ARM GAS  /tmp/ccH7dUYB.s 			page 365
+ARM GAS  /tmp/cczbjqIl.s 			page 365
 
 
  11379 004a 0126     		movs	r6, #1
@@ -21898,7 +21898,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11423 0076 46F00406 		orr	r6, r6, #4
  11424              	.LVL1357:
  11425              		.loc 1 6077 12 is_stmt 1 view .LVU3825
-ARM GAS  /tmp/ccH7dUYB.s 			page 366
+ARM GAS  /tmp/cczbjqIl.s 			page 366
 
 
  11426              		.loc 1 6077 14 is_stmt 0 view .LVU3826
@@ -21958,7 +21958,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11475 00b4 5C       		.byte	(.L824-.L826)/2
  11476 00b5 5C       		.byte	(.L824-.L826)/2
  11477 00b6 5A       		.byte	(.L825-.L826)/2
-ARM GAS  /tmp/ccH7dUYB.s 			page 367
+ARM GAS  /tmp/cczbjqIl.s 			page 367
 
 
  11478              	.LVL1361:
@@ -22018,7 +22018,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11526              		.loc 1 6087 13 is_stmt 0 discriminator 1 view .LVU3851
  11527 00e6 3746     		mov	r7, r6
  11528              	.LVL1370:
-ARM GAS  /tmp/ccH7dUYB.s 			page 368
+ARM GAS  /tmp/cczbjqIl.s 			page 368
 
 
  11529              	.L834:
@@ -22078,7 +22078,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
 6093:Middlewares/Third_Party/FatFs/src/ff.c **** 		case 'C' :					/* Character */
 6094:Middlewares/Third_Party/FatFs/src/ff.c **** 			putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue;
  11578              		.loc 1 6094 4 is_stmt 1 view .LVU3866
-ARM GAS  /tmp/ccH7dUYB.s 			page 369
+ARM GAS  /tmp/cczbjqIl.s 			page 369
 
 
  11579              		.loc 1 6094 25 is_stmt 0 view .LVU3867
@@ -22138,7 +22138,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11613 0138 1268     		ldr	r2, [r2]
  11614              	.L842:
  11615              	.LVL1386:
-ARM GAS  /tmp/ccH7dUYB.s 			page 370
+ARM GAS  /tmp/cczbjqIl.s 			page 370
 
 
 6115:Middlewares/Third_Party/FatFs/src/ff.c **** 		if (d == 'D' && (v & 0x80000000)) {
@@ -22198,7 +22198,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11657              		.loc 1 6082 3 view .LVU3896
  11658 0160 0220     		movs	r0, #2
  11659 0162 E3E7     		b	.L829
-ARM GAS  /tmp/ccH7dUYB.s 			page 371
+ARM GAS  /tmp/cczbjqIl.s 			page 371
 
 
  11660              	.L859:
@@ -22258,7 +22258,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11705              		.loc 1 6124 14 is_stmt 1 view .LVU3908
  11706              		.loc 1 6124 19 is_stmt 0 view .LVU3909
  11707 0196 1F2F     		cmp	r7, #31
-ARM GAS  /tmp/ccH7dUYB.s 			page 372
+ARM GAS  /tmp/cczbjqIl.s 			page 372
 
 
  11708 0198 8CBF     		ite	hi
@@ -22318,7 +22318,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11749              		.loc 1 6125 6 is_stmt 0 view .LVU3925
  11750 01c2 16F0080F 		tst	r6, #8
  11751 01c6 08D0     		beq	.L849
-ARM GAS  /tmp/ccH7dUYB.s 			page 373
+ARM GAS  /tmp/cczbjqIl.s 			page 373
 
 
  11752              		.loc 1 6125 14 is_stmt 1 discriminator 1 view .LVU3926
@@ -22378,7 +22378,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11802              		.loc 1 6127 23 discriminator 2 view .LVU3942
  11803 0206 C846     		mov	r8, r9
  11804              	.LVL1412:
-ARM GAS  /tmp/ccH7dUYB.s 			page 374
+ARM GAS  /tmp/cczbjqIl.s 			page 374
 
 
  11805              	.L854:
@@ -22438,7 +22438,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11849              		@ sp needed
  11850 023c BDE8F047 		pop	{r4, r5, r6, r7, r8, r9, r10, lr}
  11851              	.LCFI128:
-ARM GAS  /tmp/ccH7dUYB.s 			page 375
+ARM GAS  /tmp/cczbjqIl.s 			page 375
 
 
  11852              		.cfi_restore 14
@@ -22498,7 +22498,7 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11903 0040 C0C1C2C3 		.ascii	"\300\301\302\303\304\305AA\310\311\312\313\314\315\316"
  11903      C4C54141 
  11903      C8C9CACB 
-ARM GAS  /tmp/ccH7dUYB.s 			page 376
+ARM GAS  /tmp/cczbjqIl.s 			page 376
 
 
  11903      CCCDCE
@@ -22542,173 +22542,173 @@ ARM GAS  /tmp/ccH7dUYB.s 			page 1
  11933              		.file 8 "Middlewares/Third_Party/FatFs/src/diskio.h"
  11934              		.file 9 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdarg.h"
  11935              		.file 10 "<built-in>"
-ARM GAS  /tmp/ccH7dUYB.s 			page 377
+ARM GAS  /tmp/cczbjqIl.s 			page 377
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 ff.c
-     /tmp/ccH7dUYB.s:20     .text.ld_word:00000000 $t
-     /tmp/ccH7dUYB.s:25     .text.ld_word:00000000 ld_word
-     /tmp/ccH7dUYB.s:52     .text.ld_dword:00000000 $t
-     /tmp/ccH7dUYB.s:57     .text.ld_dword:00000000 ld_dword
-     /tmp/ccH7dUYB.s:96     .text.st_word:00000000 $t
-     /tmp/ccH7dUYB.s:101    .text.st_word:00000000 st_word
-     /tmp/ccH7dUYB.s:125    .text.st_dword:00000000 $t
-     /tmp/ccH7dUYB.s:130    .text.st_dword:00000000 st_dword
-     /tmp/ccH7dUYB.s:169    .text.mem_cpy:00000000 $t
-     /tmp/ccH7dUYB.s:174    .text.mem_cpy:00000000 mem_cpy
-     /tmp/ccH7dUYB.s:214    .text.mem_set:00000000 $t
-     /tmp/ccH7dUYB.s:219    .text.mem_set:00000000 mem_set
-     /tmp/ccH7dUYB.s:246    .text.mem_cmp:00000000 $t
-     /tmp/ccH7dUYB.s:251    .text.mem_cmp:00000000 mem_cmp
-     /tmp/ccH7dUYB.s:294    .text.chk_chr:00000000 $t
-     /tmp/ccH7dUYB.s:299    .text.chk_chr:00000000 chk_chr
-     /tmp/ccH7dUYB.s:335    .text.chk_lock:00000000 $t
-     /tmp/ccH7dUYB.s:340    .text.chk_lock:00000000 chk_lock
-     /tmp/ccH7dUYB.s:477    .text.chk_lock:00000078 $d
-     /tmp/ccH7dUYB.s:11911  .bss.Files:00000000 Files
-     /tmp/ccH7dUYB.s:482    .text.enq_lock:00000000 $t
-     /tmp/ccH7dUYB.s:487    .text.enq_lock:00000000 enq_lock
-     /tmp/ccH7dUYB.s:531    .text.enq_lock:0000001c $d
-     /tmp/ccH7dUYB.s:536    .text.inc_lock:00000000 $t
-     /tmp/ccH7dUYB.s:541    .text.inc_lock:00000000 inc_lock
-     /tmp/ccH7dUYB.s:711    .text.inc_lock:0000009c $d
-     /tmp/ccH7dUYB.s:716    .text.dec_lock:00000000 $t
-     /tmp/ccH7dUYB.s:721    .text.dec_lock:00000000 dec_lock
-     /tmp/ccH7dUYB.s:802    .text.dec_lock:0000003c $d
-     /tmp/ccH7dUYB.s:807    .text.clear_lock:00000000 $t
-     /tmp/ccH7dUYB.s:812    .text.clear_lock:00000000 clear_lock
-     /tmp/ccH7dUYB.s:889    .text.clear_lock:00000038 $d
-     /tmp/ccH7dUYB.s:894    .text.clust2sect:00000000 $t
-     /tmp/ccH7dUYB.s:899    .text.clust2sect:00000000 clust2sect
-     /tmp/ccH7dUYB.s:939    .text.clmt_clust:00000000 $t
-     /tmp/ccH7dUYB.s:944    .text.clmt_clust:00000000 clmt_clust
-     /tmp/ccH7dUYB.s:1015   .text.ld_clust:00000000 $t
-     /tmp/ccH7dUYB.s:1020   .text.ld_clust:00000000 ld_clust
-     /tmp/ccH7dUYB.s:1076   .text.st_clust:00000000 $t
-     /tmp/ccH7dUYB.s:1081   .text.st_clust:00000000 st_clust
-     /tmp/ccH7dUYB.s:1130   .text.get_fileinfo:00000000 $t
-     /tmp/ccH7dUYB.s:1135   .text.get_fileinfo:00000000 get_fileinfo
-     /tmp/ccH7dUYB.s:1275   .rodata.create_name.str1.4:00000000 $d
-     /tmp/ccH7dUYB.s:1279   .text.create_name:00000000 $t
-     /tmp/ccH7dUYB.s:1284   .text.create_name:00000000 create_name
-     /tmp/ccH7dUYB.s:1516   .text.create_name:000000c8 $d
-     /tmp/ccH7dUYB.s:11899  .rodata.ExCvt:00000000 ExCvt
-     /tmp/ccH7dUYB.s:1522   .text.get_ldnumber:00000000 $t
-     /tmp/ccH7dUYB.s:1527   .text.get_ldnumber:00000000 get_ldnumber
-     /tmp/ccH7dUYB.s:1628   .text.putc_init:00000000 $t
-     /tmp/ccH7dUYB.s:1633   .text.putc_init:00000000 putc_init
-     /tmp/ccH7dUYB.s:1656   .text.validate:00000000 $t
-     /tmp/ccH7dUYB.s:1661   .text.validate:00000000 validate
-     /tmp/ccH7dUYB.s:1770   .text.sync_window:00000000 $t
-     /tmp/ccH7dUYB.s:1775   .text.sync_window:00000000 sync_window
-ARM GAS  /tmp/ccH7dUYB.s 			page 378
+     /tmp/cczbjqIl.s:20     .text.ld_word:00000000 $t
+     /tmp/cczbjqIl.s:25     .text.ld_word:00000000 ld_word
+     /tmp/cczbjqIl.s:52     .text.ld_dword:00000000 $t
+     /tmp/cczbjqIl.s:57     .text.ld_dword:00000000 ld_dword
+     /tmp/cczbjqIl.s:96     .text.st_word:00000000 $t
+     /tmp/cczbjqIl.s:101    .text.st_word:00000000 st_word
+     /tmp/cczbjqIl.s:125    .text.st_dword:00000000 $t
+     /tmp/cczbjqIl.s:130    .text.st_dword:00000000 st_dword
+     /tmp/cczbjqIl.s:169    .text.mem_cpy:00000000 $t
+     /tmp/cczbjqIl.s:174    .text.mem_cpy:00000000 mem_cpy
+     /tmp/cczbjqIl.s:214    .text.mem_set:00000000 $t
+     /tmp/cczbjqIl.s:219    .text.mem_set:00000000 mem_set
+     /tmp/cczbjqIl.s:246    .text.mem_cmp:00000000 $t
+     /tmp/cczbjqIl.s:251    .text.mem_cmp:00000000 mem_cmp
+     /tmp/cczbjqIl.s:294    .text.chk_chr:00000000 $t
+     /tmp/cczbjqIl.s:299    .text.chk_chr:00000000 chk_chr
+     /tmp/cczbjqIl.s:335    .text.chk_lock:00000000 $t
+     /tmp/cczbjqIl.s:340    .text.chk_lock:00000000 chk_lock
+     /tmp/cczbjqIl.s:477    .text.chk_lock:00000078 $d
+     /tmp/cczbjqIl.s:11911  .bss.Files:00000000 Files
+     /tmp/cczbjqIl.s:482    .text.enq_lock:00000000 $t
+     /tmp/cczbjqIl.s:487    .text.enq_lock:00000000 enq_lock
+     /tmp/cczbjqIl.s:531    .text.enq_lock:0000001c $d
+     /tmp/cczbjqIl.s:536    .text.inc_lock:00000000 $t
+     /tmp/cczbjqIl.s:541    .text.inc_lock:00000000 inc_lock
+     /tmp/cczbjqIl.s:711    .text.inc_lock:0000009c $d
+     /tmp/cczbjqIl.s:716    .text.dec_lock:00000000 $t
+     /tmp/cczbjqIl.s:721    .text.dec_lock:00000000 dec_lock
+     /tmp/cczbjqIl.s:802    .text.dec_lock:0000003c $d
+     /tmp/cczbjqIl.s:807    .text.clear_lock:00000000 $t
+     /tmp/cczbjqIl.s:812    .text.clear_lock:00000000 clear_lock
+     /tmp/cczbjqIl.s:889    .text.clear_lock:00000038 $d
+     /tmp/cczbjqIl.s:894    .text.clust2sect:00000000 $t
+     /tmp/cczbjqIl.s:899    .text.clust2sect:00000000 clust2sect
+     /tmp/cczbjqIl.s:939    .text.clmt_clust:00000000 $t
+     /tmp/cczbjqIl.s:944    .text.clmt_clust:00000000 clmt_clust
+     /tmp/cczbjqIl.s:1015   .text.ld_clust:00000000 $t
+     /tmp/cczbjqIl.s:1020   .text.ld_clust:00000000 ld_clust
+     /tmp/cczbjqIl.s:1076   .text.st_clust:00000000 $t
+     /tmp/cczbjqIl.s:1081   .text.st_clust:00000000 st_clust
+     /tmp/cczbjqIl.s:1130   .text.get_fileinfo:00000000 $t
+     /tmp/cczbjqIl.s:1135   .text.get_fileinfo:00000000 get_fileinfo
+     /tmp/cczbjqIl.s:1275   .rodata.create_name.str1.4:00000000 $d
+     /tmp/cczbjqIl.s:1279   .text.create_name:00000000 $t
+     /tmp/cczbjqIl.s:1284   .text.create_name:00000000 create_name
+     /tmp/cczbjqIl.s:1516   .text.create_name:000000c8 $d
+     /tmp/cczbjqIl.s:11899  .rodata.ExCvt:00000000 ExCvt
+     /tmp/cczbjqIl.s:1522   .text.get_ldnumber:00000000 $t
+     /tmp/cczbjqIl.s:1527   .text.get_ldnumber:00000000 get_ldnumber
+     /tmp/cczbjqIl.s:1628   .text.putc_init:00000000 $t
+     /tmp/cczbjqIl.s:1633   .text.putc_init:00000000 putc_init
+     /tmp/cczbjqIl.s:1656   .text.validate:00000000 $t
+     /tmp/cczbjqIl.s:1661   .text.validate:00000000 validate
+     /tmp/cczbjqIl.s:1770   .text.sync_window:00000000 $t
+     /tmp/cczbjqIl.s:1775   .text.sync_window:00000000 sync_window
+ARM GAS  /tmp/cczbjqIl.s 			page 378
 
 
-     /tmp/ccH7dUYB.s:1882   .text.move_window:00000000 $t
-     /tmp/ccH7dUYB.s:1887   .text.move_window:00000000 move_window
-     /tmp/ccH7dUYB.s:1959   .text.check_fs:00000000 $t
-     /tmp/ccH7dUYB.s:1964   .text.check_fs:00000000 check_fs
-     /tmp/ccH7dUYB.s:2060   .text.check_fs:0000006c $d
-     /tmp/ccH7dUYB.s:2067   .text.find_volume:00000000 $t
-     /tmp/ccH7dUYB.s:2072   .text.find_volume:00000000 find_volume
-     /tmp/ccH7dUYB.s:2746   .text.find_volume:00000314 $d
-     /tmp/ccH7dUYB.s:11923  .bss.FatFs:00000000 FatFs
-     /tmp/ccH7dUYB.s:11917  .bss.Fsid:00000000 Fsid
-     /tmp/ccH7dUYB.s:2753   .text.find_volume:00000324 $t
-     /tmp/ccH7dUYB.s:2802   .text.put_fat:00000000 $t
-     /tmp/ccH7dUYB.s:2807   .text.put_fat:00000000 put_fat
-     /tmp/ccH7dUYB.s:3085   .text.get_fat:00000000 $t
-     /tmp/ccH7dUYB.s:3090   .text.get_fat:00000000 get_fat
-     /tmp/ccH7dUYB.s:3338   .text.dir_sdi:00000000 $t
-     /tmp/ccH7dUYB.s:3343   .text.dir_sdi:00000000 dir_sdi
-     /tmp/ccH7dUYB.s:3548   .text.create_chain:00000000 $t
-     /tmp/ccH7dUYB.s:3553   .text.create_chain:00000000 create_chain
-     /tmp/ccH7dUYB.s:3789   .text.remove_chain:00000000 $t
-     /tmp/ccH7dUYB.s:3794   .text.remove_chain:00000000 remove_chain
-     /tmp/ccH7dUYB.s:3955   .text.dir_remove:00000000 $t
-     /tmp/ccH7dUYB.s:3960   .text.dir_remove:00000000 dir_remove
-     /tmp/ccH7dUYB.s:4011   .text.dir_next:00000000 $t
-     /tmp/ccH7dUYB.s:4016   .text.dir_next:00000000 dir_next
-     /tmp/ccH7dUYB.s:4326   .text.dir_find:00000000 $t
-     /tmp/ccH7dUYB.s:4331   .text.dir_find:00000000 dir_find
-     /tmp/ccH7dUYB.s:4439   .text.follow_path:00000000 $t
-     /tmp/ccH7dUYB.s:4444   .text.follow_path:00000000 follow_path
-     /tmp/ccH7dUYB.s:4612   .text.dir_alloc:00000000 $t
-     /tmp/ccH7dUYB.s:4617   .text.dir_alloc:00000000 dir_alloc
-     /tmp/ccH7dUYB.s:4728   .text.dir_register:00000000 $t
-     /tmp/ccH7dUYB.s:4733   .text.dir_register:00000000 dir_register
-     /tmp/ccH7dUYB.s:4807   .text.dir_read:00000000 $t
-     /tmp/ccH7dUYB.s:4812   .text.dir_read:00000000 dir_read
-     /tmp/ccH7dUYB.s:4934   .text.sync_fs:00000000 $t
-     /tmp/ccH7dUYB.s:4939   .text.sync_fs:00000000 sync_fs
-     /tmp/ccH7dUYB.s:5053   .text.sync_fs:00000080 $d
-     /tmp/ccH7dUYB.s:5059   .text.f_mount:00000000 $t
-     /tmp/ccH7dUYB.s:5065   .text.f_mount:00000000 f_mount
-     /tmp/ccH7dUYB.s:5181   .text.f_mount:0000005c $d
-     /tmp/ccH7dUYB.s:5186   .text.f_open:00000000 $t
-     /tmp/ccH7dUYB.s:5192   .text.f_open:00000000 f_open
-     /tmp/ccH7dUYB.s:5748   .text.f_read:00000000 $t
-     /tmp/ccH7dUYB.s:5754   .text.f_read:00000000 f_read
-     /tmp/ccH7dUYB.s:6186   .text.f_write:00000000 $t
-     /tmp/ccH7dUYB.s:6192   .text.f_write:00000000 f_write
-     /tmp/ccH7dUYB.s:6673   .text.putc_bfd:00000000 $t
-     /tmp/ccH7dUYB.s:6678   .text.putc_bfd:00000000 putc_bfd
-     /tmp/ccH7dUYB.s:6790   .text.putc_flush:00000000 $t
-     /tmp/ccH7dUYB.s:6795   .text.putc_flush:00000000 putc_flush
-     /tmp/ccH7dUYB.s:6874   .text.f_sync:00000000 $t
-     /tmp/ccH7dUYB.s:6880   .text.f_sync:00000000 f_sync
-     /tmp/ccH7dUYB.s:7031   .text.f_close:00000000 $t
-     /tmp/ccH7dUYB.s:7037   .text.f_close:00000000 f_close
-     /tmp/ccH7dUYB.s:7106   .text.f_lseek:00000000 $t
-     /tmp/ccH7dUYB.s:7112   .text.f_lseek:00000000 f_lseek
-ARM GAS  /tmp/ccH7dUYB.s 			page 379
+     /tmp/cczbjqIl.s:1882   .text.move_window:00000000 $t
+     /tmp/cczbjqIl.s:1887   .text.move_window:00000000 move_window
+     /tmp/cczbjqIl.s:1959   .text.check_fs:00000000 $t
+     /tmp/cczbjqIl.s:1964   .text.check_fs:00000000 check_fs
+     /tmp/cczbjqIl.s:2060   .text.check_fs:0000006c $d
+     /tmp/cczbjqIl.s:2067   .text.find_volume:00000000 $t
+     /tmp/cczbjqIl.s:2072   .text.find_volume:00000000 find_volume
+     /tmp/cczbjqIl.s:2746   .text.find_volume:00000314 $d
+     /tmp/cczbjqIl.s:11923  .bss.FatFs:00000000 FatFs
+     /tmp/cczbjqIl.s:11917  .bss.Fsid:00000000 Fsid
+     /tmp/cczbjqIl.s:2753   .text.find_volume:00000324 $t
+     /tmp/cczbjqIl.s:2802   .text.put_fat:00000000 $t
+     /tmp/cczbjqIl.s:2807   .text.put_fat:00000000 put_fat
+     /tmp/cczbjqIl.s:3085   .text.get_fat:00000000 $t
+     /tmp/cczbjqIl.s:3090   .text.get_fat:00000000 get_fat
+     /tmp/cczbjqIl.s:3338   .text.dir_sdi:00000000 $t
+     /tmp/cczbjqIl.s:3343   .text.dir_sdi:00000000 dir_sdi
+     /tmp/cczbjqIl.s:3548   .text.create_chain:00000000 $t
+     /tmp/cczbjqIl.s:3553   .text.create_chain:00000000 create_chain
+     /tmp/cczbjqIl.s:3789   .text.remove_chain:00000000 $t
+     /tmp/cczbjqIl.s:3794   .text.remove_chain:00000000 remove_chain
+     /tmp/cczbjqIl.s:3955   .text.dir_remove:00000000 $t
+     /tmp/cczbjqIl.s:3960   .text.dir_remove:00000000 dir_remove
+     /tmp/cczbjqIl.s:4011   .text.dir_next:00000000 $t
+     /tmp/cczbjqIl.s:4016   .text.dir_next:00000000 dir_next
+     /tmp/cczbjqIl.s:4326   .text.dir_find:00000000 $t
+     /tmp/cczbjqIl.s:4331   .text.dir_find:00000000 dir_find
+     /tmp/cczbjqIl.s:4439   .text.follow_path:00000000 $t
+     /tmp/cczbjqIl.s:4444   .text.follow_path:00000000 follow_path
+     /tmp/cczbjqIl.s:4612   .text.dir_alloc:00000000 $t
+     /tmp/cczbjqIl.s:4617   .text.dir_alloc:00000000 dir_alloc
+     /tmp/cczbjqIl.s:4728   .text.dir_register:00000000 $t
+     /tmp/cczbjqIl.s:4733   .text.dir_register:00000000 dir_register
+     /tmp/cczbjqIl.s:4807   .text.dir_read:00000000 $t
+     /tmp/cczbjqIl.s:4812   .text.dir_read:00000000 dir_read
+     /tmp/cczbjqIl.s:4934   .text.sync_fs:00000000 $t
+     /tmp/cczbjqIl.s:4939   .text.sync_fs:00000000 sync_fs
+     /tmp/cczbjqIl.s:5053   .text.sync_fs:00000080 $d
+     /tmp/cczbjqIl.s:5059   .text.f_mount:00000000 $t
+     /tmp/cczbjqIl.s:5065   .text.f_mount:00000000 f_mount
+     /tmp/cczbjqIl.s:5181   .text.f_mount:0000005c $d
+     /tmp/cczbjqIl.s:5186   .text.f_open:00000000 $t
+     /tmp/cczbjqIl.s:5192   .text.f_open:00000000 f_open
+     /tmp/cczbjqIl.s:5748   .text.f_read:00000000 $t
+     /tmp/cczbjqIl.s:5754   .text.f_read:00000000 f_read
+     /tmp/cczbjqIl.s:6186   .text.f_write:00000000 $t
+     /tmp/cczbjqIl.s:6192   .text.f_write:00000000 f_write
+     /tmp/cczbjqIl.s:6673   .text.putc_bfd:00000000 $t
+     /tmp/cczbjqIl.s:6678   .text.putc_bfd:00000000 putc_bfd
+     /tmp/cczbjqIl.s:6790   .text.putc_flush:00000000 $t
+     /tmp/cczbjqIl.s:6795   .text.putc_flush:00000000 putc_flush
+     /tmp/cczbjqIl.s:6874   .text.f_sync:00000000 $t
+     /tmp/cczbjqIl.s:6880   .text.f_sync:00000000 f_sync
+     /tmp/cczbjqIl.s:7031   .text.f_close:00000000 $t
+     /tmp/cczbjqIl.s:7037   .text.f_close:00000000 f_close
+     /tmp/cczbjqIl.s:7106   .text.f_lseek:00000000 $t
+     /tmp/cczbjqIl.s:7112   .text.f_lseek:00000000 f_lseek
+ARM GAS  /tmp/cczbjqIl.s 			page 379
 
 
-     /tmp/ccH7dUYB.s:7838   .text.f_opendir:00000000 $t
-     /tmp/ccH7dUYB.s:7844   .text.f_opendir:00000000 f_opendir
-     /tmp/ccH7dUYB.s:8024   .text.f_closedir:00000000 $t
-     /tmp/ccH7dUYB.s:8030   .text.f_closedir:00000000 f_closedir
-     /tmp/ccH7dUYB.s:8096   .text.f_readdir:00000000 $t
-     /tmp/ccH7dUYB.s:8102   .text.f_readdir:00000000 f_readdir
-     /tmp/ccH7dUYB.s:8207   .text.f_stat:00000000 $t
-     /tmp/ccH7dUYB.s:8213   .text.f_stat:00000000 f_stat
-     /tmp/ccH7dUYB.s:8306   .text.f_getfree:00000000 $t
-     /tmp/ccH7dUYB.s:8312   .text.f_getfree:00000000 f_getfree
-     /tmp/ccH7dUYB.s:8597   .text.f_truncate:00000000 $t
-     /tmp/ccH7dUYB.s:8603   .text.f_truncate:00000000 f_truncate
-     /tmp/ccH7dUYB.s:8787   .text.f_unlink:00000000 $t
-     /tmp/ccH7dUYB.s:8793   .text.f_unlink:00000000 f_unlink
-     /tmp/ccH7dUYB.s:9015   .text.f_mkdir:00000000 $t
-     /tmp/ccH7dUYB.s:9021   .text.f_mkdir:00000000 f_mkdir
-     /tmp/ccH7dUYB.s:9388   .text.f_rename:00000000 $t
-     /tmp/ccH7dUYB.s:9394   .text.f_rename:00000000 f_rename
-     /tmp/ccH7dUYB.s:9681   .rodata.f_mkfs.str1.4:00000000 $d
-     /tmp/ccH7dUYB.s:9691   .text.f_mkfs:00000000 $t
-     /tmp/ccH7dUYB.s:9697   .text.f_mkfs:00000000 f_mkfs
-     /tmp/ccH7dUYB.s:10298  .text.f_mkfs:000002a0 $d
-     /tmp/ccH7dUYB.s:11887  .rodata.cst32.1:00000000 cst32.1
-     /tmp/ccH7dUYB.s:11875  .rodata.cst.0:00000000 cst.0
-     /tmp/ccH7dUYB.s:10306  .text.f_mkfs:000002b4 $t
-     /tmp/ccH7dUYB.s:10943  .text.f_mkfs:00000644 $d
-     /tmp/ccH7dUYB.s:10951  .text.f_mkfs:0000065c $t
-     /tmp/ccH7dUYB.s:11023  .text.f_gets:00000000 $t
-     /tmp/ccH7dUYB.s:11029  .text.f_gets:00000000 f_gets
-     /tmp/ccH7dUYB.s:11149  .text.f_putc:00000000 $t
-     /tmp/ccH7dUYB.s:11155  .text.f_putc:00000000 f_putc
-     /tmp/ccH7dUYB.s:11200  .text.f_puts:00000000 $t
-     /tmp/ccH7dUYB.s:11206  .text.f_puts:00000000 f_puts
-     /tmp/ccH7dUYB.s:11263  .text.f_printf:00000000 $t
-     /tmp/ccH7dUYB.s:11269  .text.f_printf:00000000 f_printf
-     /tmp/ccH7dUYB.s:11455  .text.f_printf:000000a0 $d
-     /tmp/ccH7dUYB.s:11872  .rodata.cst.0:00000000 $d
-     /tmp/ccH7dUYB.s:11884  .rodata.cst32.1:00000000 $d
-     /tmp/ccH7dUYB.s:11896  .rodata.ExCvt:00000000 $d
-     /tmp/ccH7dUYB.s:11908  .bss.Files:00000000 $d
-     /tmp/ccH7dUYB.s:11914  .bss.Fsid:00000000 $d
-     /tmp/ccH7dUYB.s:11920  .bss.FatFs:00000000 $d
-     /tmp/ccH7dUYB.s:11479  .text.f_printf:000000b7 $d
-     /tmp/ccH7dUYB.s:11479  .text.f_printf:000000b8 $t
+     /tmp/cczbjqIl.s:7838   .text.f_opendir:00000000 $t
+     /tmp/cczbjqIl.s:7844   .text.f_opendir:00000000 f_opendir
+     /tmp/cczbjqIl.s:8024   .text.f_closedir:00000000 $t
+     /tmp/cczbjqIl.s:8030   .text.f_closedir:00000000 f_closedir
+     /tmp/cczbjqIl.s:8096   .text.f_readdir:00000000 $t
+     /tmp/cczbjqIl.s:8102   .text.f_readdir:00000000 f_readdir
+     /tmp/cczbjqIl.s:8207   .text.f_stat:00000000 $t
+     /tmp/cczbjqIl.s:8213   .text.f_stat:00000000 f_stat
+     /tmp/cczbjqIl.s:8306   .text.f_getfree:00000000 $t
+     /tmp/cczbjqIl.s:8312   .text.f_getfree:00000000 f_getfree
+     /tmp/cczbjqIl.s:8597   .text.f_truncate:00000000 $t
+     /tmp/cczbjqIl.s:8603   .text.f_truncate:00000000 f_truncate
+     /tmp/cczbjqIl.s:8787   .text.f_unlink:00000000 $t
+     /tmp/cczbjqIl.s:8793   .text.f_unlink:00000000 f_unlink
+     /tmp/cczbjqIl.s:9015   .text.f_mkdir:00000000 $t
+     /tmp/cczbjqIl.s:9021   .text.f_mkdir:00000000 f_mkdir
+     /tmp/cczbjqIl.s:9388   .text.f_rename:00000000 $t
+     /tmp/cczbjqIl.s:9394   .text.f_rename:00000000 f_rename
+     /tmp/cczbjqIl.s:9681   .rodata.f_mkfs.str1.4:00000000 $d
+     /tmp/cczbjqIl.s:9691   .text.f_mkfs:00000000 $t
+     /tmp/cczbjqIl.s:9697   .text.f_mkfs:00000000 f_mkfs
+     /tmp/cczbjqIl.s:10298  .text.f_mkfs:000002a0 $d
+     /tmp/cczbjqIl.s:11887  .rodata.cst32.1:00000000 cst32.1
+     /tmp/cczbjqIl.s:11875  .rodata.cst.0:00000000 cst.0
+     /tmp/cczbjqIl.s:10306  .text.f_mkfs:000002b4 $t
+     /tmp/cczbjqIl.s:10943  .text.f_mkfs:00000644 $d
+     /tmp/cczbjqIl.s:10951  .text.f_mkfs:0000065c $t
+     /tmp/cczbjqIl.s:11023  .text.f_gets:00000000 $t
+     /tmp/cczbjqIl.s:11029  .text.f_gets:00000000 f_gets
+     /tmp/cczbjqIl.s:11149  .text.f_putc:00000000 $t
+     /tmp/cczbjqIl.s:11155  .text.f_putc:00000000 f_putc
+     /tmp/cczbjqIl.s:11200  .text.f_puts:00000000 $t
+     /tmp/cczbjqIl.s:11206  .text.f_puts:00000000 f_puts
+     /tmp/cczbjqIl.s:11263  .text.f_printf:00000000 $t
+     /tmp/cczbjqIl.s:11269  .text.f_printf:00000000 f_printf
+     /tmp/cczbjqIl.s:11455  .text.f_printf:000000a0 $d
+     /tmp/cczbjqIl.s:11872  .rodata.cst.0:00000000 $d
+     /tmp/cczbjqIl.s:11884  .rodata.cst32.1:00000000 $d
+     /tmp/cczbjqIl.s:11896  .rodata.ExCvt:00000000 $d
+     /tmp/cczbjqIl.s:11908  .bss.Files:00000000 $d
+     /tmp/cczbjqIl.s:11914  .bss.Fsid:00000000 $d
+     /tmp/cczbjqIl.s:11920  .bss.FatFs:00000000 $d
+     /tmp/cczbjqIl.s:11479  .text.f_printf:000000b7 $d
+     /tmp/cczbjqIl.s:11479  .text.f_printf:000000b8 $t
 
 UNDEFINED SYMBOLS
 disk_status
diff --git a/build/ff_gen_drv.lst b/build/ff_gen_drv.lst
index 47d73b9..03932a8 100644
--- a/build/ff_gen_drv.lst
+++ b/build/ff_gen_drv.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccoeDKf8.s 			page 1
+ARM GAS  /tmp/ccaLv9j7.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
   28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** 
   29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /**
   30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c ****   * @brief  Links a compatible diskio driver/lun id and increments the number of active
-ARM GAS  /tmp/ccoeDKf8.s 			page 2
+ARM GAS  /tmp/ccaLv9j7.s 			page 2
 
 
   31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c ****   *         linked drivers.
@@ -118,7 +118,7 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
   64              		.loc 1 48 5 is_stmt 1 view .LVU13
   65              		.loc 1 48 18 is_stmt 0 view .LVU14
   66 002c 5C7A     		ldrb	r4, [r3, #9]	@ zero_extendqisi2
-ARM GAS  /tmp/ccoeDKf8.s 			page 3
+ARM GAS  /tmp/ccaLv9j7.s 			page 3
 
 
   67              	.LVL2:
@@ -178,7 +178,7 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
   41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c ****   uint8_t DiskNum = 0;
  111              		.loc 1 41 11 view .LVU32
  112 004c 0120     		movs	r0, #1
-ARM GAS  /tmp/ccoeDKf8.s 			page 4
+ARM GAS  /tmp/ccaLv9j7.s 			page 4
 
 
  113              	.LVL10:
@@ -238,7 +238,7 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
  156              		.global	FATFS_UnLinkDriverEx
  157              		.syntax unified
  158              		.thumb
-ARM GAS  /tmp/ccoeDKf8.s 			page 5
+ARM GAS  /tmp/ccaLv9j7.s 			page 5
 
 
  159              		.thumb_func
@@ -298,7 +298,7 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
  195              	.LVL15:
  196              		.loc 1 90 25 view .LVU54
  197 001c 0020     		movs	r0, #0
-ARM GAS  /tmp/ccoeDKf8.s 			page 6
+ARM GAS  /tmp/ccaLv9j7.s 			page 6
 
 
  198              	.LVL16:
@@ -358,7 +358,7 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
  242              		.align	1
  243              		.global	FATFS_UnLinkDriver
  244              		.syntax unified
-ARM GAS  /tmp/ccoeDKf8.s 			page 7
+ARM GAS  /tmp/ccaLv9j7.s 			page 7
 
 
  245              		.thumb
@@ -418,7 +418,7 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
  283              		@ frame_needed = 0, uses_anonymous_args = 0
  284              		@ link register save eliminated.
  118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c ****   return disk.nbr;
-ARM GAS  /tmp/ccoeDKf8.s 			page 8
+ARM GAS  /tmp/ccaLv9j7.s 			page 8
 
 
  285              		.loc 1 118 3 view .LVU75
@@ -450,25 +450,25 @@ ARM GAS  /tmp/ccoeDKf8.s 			page 1
  311              		.file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
  312              		.file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
  313              		.file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
-ARM GAS  /tmp/ccoeDKf8.s 			page 9
+ARM GAS  /tmp/ccaLv9j7.s 			page 9
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 ff_gen_drv.c
-     /tmp/ccoeDKf8.s:20     .text.FATFS_LinkDriverEx:00000000 $t
-     /tmp/ccoeDKf8.s:26     .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx
-     /tmp/ccoeDKf8.s:120    .text.FATFS_LinkDriverEx:00000050 $d
-     /tmp/ccoeDKf8.s:303    .bss.disk:00000000 disk
-     /tmp/ccoeDKf8.s:125    .text.FATFS_LinkDriver:00000000 $t
-     /tmp/ccoeDKf8.s:131    .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver
-     /tmp/ccoeDKf8.s:155    .text.FATFS_UnLinkDriverEx:00000000 $t
-     /tmp/ccoeDKf8.s:161    .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx
-     /tmp/ccoeDKf8.s:237    .text.FATFS_UnLinkDriverEx:00000038 $d
-     /tmp/ccoeDKf8.s:242    .text.FATFS_UnLinkDriver:00000000 $t
-     /tmp/ccoeDKf8.s:248    .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver
-     /tmp/ccoeDKf8.s:272    .text.FATFS_GetAttachedDriversNbr:00000000 $t
-     /tmp/ccoeDKf8.s:278    .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr
-     /tmp/ccoeDKf8.s:294    .text.FATFS_GetAttachedDriversNbr:00000008 $d
-     /tmp/ccoeDKf8.s:300    .bss.disk:00000000 $d
+     /tmp/ccaLv9j7.s:20     .text.FATFS_LinkDriverEx:00000000 $t
+     /tmp/ccaLv9j7.s:26     .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx
+     /tmp/ccaLv9j7.s:120    .text.FATFS_LinkDriverEx:00000050 $d
+     /tmp/ccaLv9j7.s:303    .bss.disk:00000000 disk
+     /tmp/ccaLv9j7.s:125    .text.FATFS_LinkDriver:00000000 $t
+     /tmp/ccaLv9j7.s:131    .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver
+     /tmp/ccaLv9j7.s:155    .text.FATFS_UnLinkDriverEx:00000000 $t
+     /tmp/ccaLv9j7.s:161    .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx
+     /tmp/ccaLv9j7.s:237    .text.FATFS_UnLinkDriverEx:00000038 $d
+     /tmp/ccaLv9j7.s:242    .text.FATFS_UnLinkDriver:00000000 $t
+     /tmp/ccaLv9j7.s:248    .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver
+     /tmp/ccaLv9j7.s:272    .text.FATFS_GetAttachedDriversNbr:00000000 $t
+     /tmp/ccaLv9j7.s:278    .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr
+     /tmp/ccaLv9j7.s:294    .text.FATFS_GetAttachedDriversNbr:00000008 $d
+     /tmp/ccaLv9j7.s:300    .bss.disk:00000000 $d
 
 NO UNDEFINED SYMBOLS
diff --git a/build/main.lst b/build/main.lst
index 0509742..62b9f39 100644
--- a/build/main.lst
+++ b/build/main.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccwR4KB7.s 			page 1
+ARM GAS  /tmp/ccEQxcUB.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   28:Drivers/CMSIS/Include/core_cm7.h ****   #pragma clang system_header   /* treat file as system include file */
   29:Drivers/CMSIS/Include/core_cm7.h **** #endif
   30:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 2
+ARM GAS  /tmp/ccEQxcUB.s 			page 2
 
 
   31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC
@@ -118,7 +118,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   85:Drivers/CMSIS/Include/core_cm7.h ****     #define __FPU_USED         0U
   86:Drivers/CMSIS/Include/core_cm7.h ****   #endif
   87:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 3
+ARM GAS  /tmp/ccEQxcUB.s 			page 3
 
 
   88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
@@ -178,7 +178,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  142:Drivers/CMSIS/Include/core_cm7.h ****       #define __FPU_USED       0U
  143:Drivers/CMSIS/Include/core_cm7.h ****     #endif
  144:Drivers/CMSIS/Include/core_cm7.h ****   #else
-ARM GAS  /tmp/ccwR4KB7.s 			page 4
+ARM GAS  /tmp/ccEQxcUB.s 			page 4
 
 
  145:Drivers/CMSIS/Include/core_cm7.h ****     #define __FPU_USED         0U
@@ -238,7 +238,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  199:Drivers/CMSIS/Include/core_cm7.h ****     #warning "__ICACHE_PRESENT not defined in device header file; using default!"
  200:Drivers/CMSIS/Include/core_cm7.h ****   #endif
  201:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 5
+ARM GAS  /tmp/ccEQxcUB.s 			page 5
 
 
  202:Drivers/CMSIS/Include/core_cm7.h ****   #ifndef __DCACHE_PRESENT
@@ -298,7 +298,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  256:Drivers/CMSIS/Include/core_cm7.h ****   - Core MPU Register
  257:Drivers/CMSIS/Include/core_cm7.h ****   - Core FPU Register
  258:Drivers/CMSIS/Include/core_cm7.h ****  ******************************************************************************/
-ARM GAS  /tmp/ccwR4KB7.s 			page 6
+ARM GAS  /tmp/ccEQxcUB.s 			page 6
 
 
  259:Drivers/CMSIS/Include/core_cm7.h **** /**
@@ -358,7 +358,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  313:Drivers/CMSIS/Include/core_cm7.h **** typedef union
  314:Drivers/CMSIS/Include/core_cm7.h **** {
  315:Drivers/CMSIS/Include/core_cm7.h ****   struct
-ARM GAS  /tmp/ccwR4KB7.s 			page 7
+ARM GAS  /tmp/ccEQxcUB.s 			page 7
 
 
  316:Drivers/CMSIS/Include/core_cm7.h ****   {
@@ -418,7 +418,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos                         24U                                            /*!< xPSR
  371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR
  372:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 8
+ARM GAS  /tmp/ccEQxcUB.s 			page 8
 
 
  373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos                        16U                                            /*!< xPSR
@@ -478,7 +478,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  427:Drivers/CMSIS/Include/core_cm7.h ****   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register *
  428:Drivers/CMSIS/Include/core_cm7.h ****         uint32_t RESERVED2[24U];
  429:Drivers/CMSIS/Include/core_cm7.h ****   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register
-ARM GAS  /tmp/ccwR4KB7.s 			page 9
+ARM GAS  /tmp/ccEQxcUB.s 			page 9
 
 
  430:Drivers/CMSIS/Include/core_cm7.h ****         uint32_t RESERVED3[24U];
@@ -538,7 +538,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  484:Drivers/CMSIS/Include/core_cm7.h ****         uint32_t RESERVED4[15U];
  485:Drivers/CMSIS/Include/core_cm7.h ****   __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0
  486:Drivers/CMSIS/Include/core_cm7.h ****   __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1
-ARM GAS  /tmp/ccwR4KB7.s 			page 10
+ARM GAS  /tmp/ccEQxcUB.s 			page 10
 
 
  487:Drivers/CMSIS/Include/core_cm7.h ****   __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2
@@ -598,7 +598,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB 
  542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB 
  543:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 11
+ARM GAS  /tmp/ccEQxcUB.s 			page 11
 
 
  544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB 
@@ -658,7 +658,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  598:Drivers/CMSIS/Include/core_cm7.h **** 
  599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos                      16U                                           /*!< SCB 
  600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB 
-ARM GAS  /tmp/ccwR4KB7.s 			page 12
+ARM GAS  /tmp/ccEQxcUB.s 			page 12
 
 
  601:Drivers/CMSIS/Include/core_cm7.h **** 
@@ -718,7 +718,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB 
  656:Drivers/CMSIS/Include/core_cm7.h **** 
  657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB 
-ARM GAS  /tmp/ccwR4KB7.s 			page 13
+ARM GAS  /tmp/ccEQxcUB.s 			page 13
 
 
  658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB 
@@ -778,7 +778,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB 
  713:Drivers/CMSIS/Include/core_cm7.h **** 
  714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-ARM GAS  /tmp/ccwR4KB7.s 			page 14
+ARM GAS  /tmp/ccEQxcUB.s 			page 14
 
 
  715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB 
@@ -838,7 +838,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  769:Drivers/CMSIS/Include/core_cm7.h **** 
  770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB 
  771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB 
-ARM GAS  /tmp/ccwR4KB7.s 			page 15
+ARM GAS  /tmp/ccEQxcUB.s 			page 15
 
 
  772:Drivers/CMSIS/Include/core_cm7.h **** 
@@ -898,7 +898,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB 
  827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB 
  828:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 16
+ARM GAS  /tmp/ccEQxcUB.s 			page 16
 
 
  829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
@@ -958,7 +958,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB 
  884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB 
  885:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 17
+ARM GAS  /tmp/ccEQxcUB.s 			page 17
 
 
  886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB 
@@ -1018,7 +1018,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk         (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)         /*!< ACTLR: 
  941:Drivers/CMSIS/Include/core_cm7.h **** 
  942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: 
-ARM GAS  /tmp/ccwR4KB7.s 			page 18
+ARM GAS  /tmp/ccEQxcUB.s 			page 18
 
 
  943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: 
@@ -1078,7 +1078,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysT
  998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysT
  999:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 19
+ARM GAS  /tmp/ccEQxcUB.s 			page 19
 
 
 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */
@@ -1138,7 +1138,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM 
 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM 
 1056:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 20
+ARM GAS  /tmp/ccEQxcUB.s 			page 20
 
 
 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM 
@@ -1198,7 +1198,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1111:Drivers/CMSIS/Include/core_cm7.h ****  */
 1112:Drivers/CMSIS/Include/core_cm7.h **** 
 1113:Drivers/CMSIS/Include/core_cm7.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 21
+ARM GAS  /tmp/ccEQxcUB.s 			page 21
 
 
 1114:Drivers/CMSIS/Include/core_cm7.h ****   \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
@@ -1258,7 +1258,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTR
 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTR
 1170:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 22
+ARM GAS  /tmp/ccEQxcUB.s 			page 22
 
 
 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTR
@@ -1318,7 +1318,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */
 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUN
 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUN
-ARM GAS  /tmp/ccwR4KB7.s 			page 23
+ARM GAS  /tmp/ccEQxcUB.s 			page 23
 
 
 1228:Drivers/CMSIS/Include/core_cm7.h **** 
@@ -1378,7 +1378,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1282:Drivers/CMSIS/Include/core_cm7.h ****         uint32_t RESERVED4[1U];
 1283:Drivers/CMSIS/Include/core_cm7.h ****   __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
 1284:Drivers/CMSIS/Include/core_cm7.h ****   __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-ARM GAS  /tmp/ccwR4KB7.s 			page 24
+ARM GAS  /tmp/ccEQxcUB.s 			page 24
 
 
 1285:Drivers/CMSIS/Include/core_cm7.h ****   __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
@@ -1438,7 +1438,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIF
 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIF
 1341:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 25
+ARM GAS  /tmp/ccEQxcUB.s 			page 25
 
 
 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIF
@@ -1498,7 +1498,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEV
 1397:Drivers/CMSIS/Include/core_cm7.h **** 
 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEV
-ARM GAS  /tmp/ccwR4KB7.s 			page 26
+ARM GAS  /tmp/ccEQxcUB.s 			page 26
 
 
 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEV
@@ -1558,7 +1558,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU 
 1454:Drivers/CMSIS/Include/core_cm7.h **** 
 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */
-ARM GAS  /tmp/ccwR4KB7.s 			page 27
+ARM GAS  /tmp/ccEQxcUB.s 			page 27
 
 
 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU 
@@ -1618,7 +1618,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */
 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
 1512:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 28
+ARM GAS  /tmp/ccEQxcUB.s 			page 28
 
 
 1513:Drivers/CMSIS/Include/core_cm7.h **** 
@@ -1678,7 +1678,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */
 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDS
 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDS
-ARM GAS  /tmp/ccwR4KB7.s 			page 29
+ARM GAS  /tmp/ccEQxcUB.s 			page 29
 
 
 1570:Drivers/CMSIS/Include/core_cm7.h **** 
@@ -1738,7 +1738,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1624:Drivers/CMSIS/Include/core_cm7.h ****   \ingroup  CMSIS_core_register
 1625:Drivers/CMSIS/Include/core_cm7.h ****   \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
 1626:Drivers/CMSIS/Include/core_cm7.h ****   \brief    Type definitions for the Core Debug Registers
-ARM GAS  /tmp/ccwR4KB7.s 			page 30
+ARM GAS  /tmp/ccEQxcUB.s 			page 30
 
 
 1627:Drivers/CMSIS/Include/core_cm7.h ****   @{
@@ -1798,7 +1798,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1681:Drivers/CMSIS/Include/core_cm7.h **** 
 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< Core
 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< Core
-ARM GAS  /tmp/ccwR4KB7.s 			page 31
+ARM GAS  /tmp/ccEQxcUB.s 			page 31
 
 
 1684:Drivers/CMSIS/Include/core_cm7.h **** 
@@ -1858,7 +1858,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1738:Drivers/CMSIS/Include/core_cm7.h ****   \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
 1739:Drivers/CMSIS/Include/core_cm7.h ****   \return           Masked and shifted value.
 1740:Drivers/CMSIS/Include/core_cm7.h **** */
-ARM GAS  /tmp/ccwR4KB7.s 			page 32
+ARM GAS  /tmp/ccEQxcUB.s 			page 32
 
 
 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
@@ -1918,7 +1918,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1795:Drivers/CMSIS/Include/core_cm7.h ****   - Core NVIC Functions
 1796:Drivers/CMSIS/Include/core_cm7.h ****   - Core SysTick Functions
 1797:Drivers/CMSIS/Include/core_cm7.h ****   - Core Debug Functions
-ARM GAS  /tmp/ccwR4KB7.s 			page 33
+ARM GAS  /tmp/ccEQxcUB.s 			page 33
 
 
 1798:Drivers/CMSIS/Include/core_cm7.h ****   - Core Register Access Functions
@@ -1978,7 +1978,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after retu
 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after retu
 1854:Drivers/CMSIS/Include/core_cm7.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 34
+ARM GAS  /tmp/ccEQxcUB.s 			page 34
 
 
 1855:Drivers/CMSIS/Include/core_cm7.h **** 
@@ -2038,7 +2038,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1909:Drivers/CMSIS/Include/core_cm7.h ****   \return             0  Interrupt is not enabled.
 1910:Drivers/CMSIS/Include/core_cm7.h ****   \return             1  Interrupt is enabled.
 1911:Drivers/CMSIS/Include/core_cm7.h ****   \note    IRQn must not be negative.
-ARM GAS  /tmp/ccwR4KB7.s 			page 35
+ARM GAS  /tmp/ccEQxcUB.s 			page 35
 
 
 1912:Drivers/CMSIS/Include/core_cm7.h ****  */
@@ -2098,7 +2098,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1966:Drivers/CMSIS/Include/core_cm7.h ****   \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
 1967:Drivers/CMSIS/Include/core_cm7.h ****   \param [in]      IRQn  Device specific interrupt number.
 1968:Drivers/CMSIS/Include/core_cm7.h ****   \note    IRQn must not be negative.
-ARM GAS  /tmp/ccwR4KB7.s 			page 36
+ARM GAS  /tmp/ccEQxcUB.s 			page 36
 
 
 1969:Drivers/CMSIS/Include/core_cm7.h ****  */
@@ -2158,7 +2158,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2023:Drivers/CMSIS/Include/core_cm7.h ****  */
 2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
 2025:Drivers/CMSIS/Include/core_cm7.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 37
+ARM GAS  /tmp/ccEQxcUB.s 			page 37
 
 
 2026:Drivers/CMSIS/Include/core_cm7.h ****   if ((int32_t)(IRQn) >= 0)
@@ -2218,7 +2218,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   36              		.cfi_def_cfa_offset 4
   37              		.cfi_offset 14, -4
 2073:Drivers/CMSIS/Include/core_cm7.h ****   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used   
-ARM GAS  /tmp/ccwR4KB7.s 			page 38
+ARM GAS  /tmp/ccEQxcUB.s 			page 38
 
 
   38              		.loc 2 2073 3 is_stmt 1 view .LVU2
@@ -2278,7 +2278,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2078:Drivers/CMSIS/Include/core_cm7.h **** 
   81              		.loc 2 2078 109 discriminator 2 view .LVU19
   82 003a 0023     		movs	r3, #0
-ARM GAS  /tmp/ccwR4KB7.s 			page 39
+ARM GAS  /tmp/ccEQxcUB.s 			page 39
 
 
   83 003c EEE7     		b	.L2
@@ -2338,7 +2338,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   45:Src/main.c    **** #define AD9102_REG_PAT_TIMEBASE 0x0028u
   46:Src/main.c    **** #define AD9102_REG_PAT_PERIOD 0x0029u
   47:Src/main.c    **** #define AD9102_REG_DAC_PAT 0x002Bu
-ARM GAS  /tmp/ccwR4KB7.s 			page 40
+ARM GAS  /tmp/ccEQxcUB.s 			page 40
 
 
   48:Src/main.c    **** #define AD9102_REG_SAW_CONFIG 0x0037u
@@ -2376,1171 +2376,1270 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   80:Src/main.c    **** #define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u
   81:Src/main.c    **** #define AD9102_SRAM_START_DLY_DEFAULT 0x0000u
   82:Src/main.c    **** #define AD9102_SRAM_HOLD_DEFAULT 0x1u
-  83:Src/main.c    **** #define AD9102_SRAM_SAMPLES_DEFAULT 16u
-  84:Src/main.c    **** #define AD9102_SRAM_MAX_SAMPLES 4096u
-  85:Src/main.c    **** #define AD9102_SRAM_RAMP_MIN   (-8192)
-  86:Src/main.c    **** #define AD9102_SRAM_RAMP_MAX   (8191)
-  87:Src/main.c    **** #define AD9102_SRAM_RAMP_SPAN  (AD9102_SRAM_RAMP_MAX - AD9102_SRAM_RAMP_MIN)
-  88:Src/main.c    **** 
-  89:Src/main.c    **** #define AD9102_SAW_STEP_DEFAULT 1u
-  90:Src/main.c    **** #define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u
-  91:Src/main.c    **** #define AD9102_START_DELAY_BASE_DEFAULT 0x1u
-  92:Src/main.c    **** #define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u
-  93:Src/main.c    **** #define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu
-  94:Src/main.c    **** 
-  95:Src/main.c    **** #define AD9102_FLAG_ENABLE   0x0001u
-  96:Src/main.c    **** #define AD9102_FLAG_TRIANGLE 0x0002u
-  97:Src/main.c    **** #define AD9102_FLAG_SRAM     0x0004u
-  98:Src/main.c    **** /* USER CODE END PD */
-  99:Src/main.c    **** 
- 100:Src/main.c    **** /* Private macro -------------------------------------------------------------*/
- 101:Src/main.c    **** /* USER CODE BEGIN PM */
- 102:Src/main.c    **** 
- 103:Src/main.c    **** /* USER CODE END PM */
- 104:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 41
+  83:Src/main.c    **** #define AD9102_SRAM_AMP_DEFAULT 8191u
+  84:Src/main.c    **** #define AD9102_SRAM_SAMPLES_DEFAULT 16u
+  85:Src/main.c    **** #define AD9102_SRAM_MAX_SAMPLES 4096u
+  86:Src/main.c    **** #define AD9102_SRAM_RAMP_MIN   (-8192)
+  87:Src/main.c    **** #define AD9102_SRAM_RAMP_MAX   (8191)
+  88:Src/main.c    **** #define AD9102_SRAM_RAMP_SPAN  (AD9102_SRAM_RAMP_MAX - AD9102_SRAM_RAMP_MIN)
+  89:Src/main.c    **** 
+  90:Src/main.c    **** #define AD9102_SAW_STEP_DEFAULT 1u
+  91:Src/main.c    **** #define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u
+  92:Src/main.c    **** #define AD9102_START_DELAY_BASE_DEFAULT 0x1u
+  93:Src/main.c    **** #define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u
+  94:Src/main.c    **** #define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu
+  95:Src/main.c    **** 
+  96:Src/main.c    **** #define AD9102_FLAG_ENABLE   0x0001u
+  97:Src/main.c    **** #define AD9102_FLAG_TRIANGLE 0x0002u
+  98:Src/main.c    **** #define AD9102_FLAG_SRAM     0x0004u
+  99:Src/main.c    **** #define AD9102_FLAG_SRAM_FMT 0x0008u
+ 100:Src/main.c    **** 
+ 101:Src/main.c    **** #define AD9833_FLAG_ENABLE   0x0001u
+ 102:Src/main.c    **** #define AD9833_FLAG_TRIANGLE 0x0002u
+ 103:Src/main.c    **** #define DS1809_FLAG_UC       0x0001u
+ 104:Src/main.c    **** #define DS1809_FLAG_DC       0x0002u
+ARM GAS  /tmp/ccEQxcUB.s 			page 41
 
 
- 105:Src/main.c    **** /* Private variables ---------------------------------------------------------*/
- 106:Src/main.c    **** ADC_HandleTypeDef hadc1;
- 107:Src/main.c    **** ADC_HandleTypeDef hadc3;
- 108:Src/main.c    **** 
- 109:Src/main.c    **** SD_HandleTypeDef hsd1;
+ 105:Src/main.c    **** #define DS1809_PULSE_MS_DEFAULT 2u
+ 106:Src/main.c    **** /* USER CODE END PD */
+ 107:Src/main.c    **** 
+ 108:Src/main.c    **** /* Private macro -------------------------------------------------------------*/
+ 109:Src/main.c    **** /* USER CODE BEGIN PM */
  110:Src/main.c    **** 
- 111:Src/main.c    **** TIM_HandleTypeDef htim4;
- 112:Src/main.c    **** TIM_HandleTypeDef htim8;
- 113:Src/main.c    **** TIM_HandleTypeDef htim10;
- 114:Src/main.c    **** TIM_HandleTypeDef htim11;
- 115:Src/main.c    **** 
- 116:Src/main.c    **** UART_HandleTypeDef huart8;
- 117:Src/main.c    **** 
- 118:Src/main.c    **** /* USER CODE BEGIN PV */
- 119:Src/main.c    **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, 
- 120:Src/main.c    **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_
- 121:Src/main.c    **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat
- 122:Src/main.c    **** FRESULT fresult;  // result
- 123:Src/main.c    **** int test;
- 124:Src/main.c    **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_
- 125:Src/main.c    **** 
- 126:Src/main.c    **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup;
- 127:Src/main.c    **** Work_SetupTypeDef Curr_setup, Def_setup;
- 128:Src/main.c    **** LDx_ParamTypeDef LD1_param, LD2_param;
- 129:Src/main.c    **** 
- 130:Src/main.c    **** LD_Blinker_StateTypeDef LD_blinker;
- 131:Src/main.c    **** 
- 132:Src/main.c    **** task_t task;
- 133:Src/main.c    **** 
- 134:Src/main.c    **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = {
- 135:Src/main.c    **** 	0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u,
- 136:Src/main.c    **** 	0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu,
- 137:Src/main.c    **** 	0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u,
- 138:Src/main.c    **** 	0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u,
- 139:Src/main.c    **** 	0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu,
- 140:Src/main.c    **** 	0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u,
- 141:Src/main.c    **** 	0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u,
- 142:Src/main.c    **** 	0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu,
- 143:Src/main.c    **** 	0x001eu, 0x001du
- 144:Src/main.c    **** };
- 145:Src/main.c    **** 
- 146:Src/main.c    **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = {
- 147:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
- 148:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
- 149:Src/main.c    **** 	0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u,
- 150:Src/main.c    **** 	0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 151:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u,
- 152:Src/main.c    **** 	0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 153:Src/main.c    **** 	0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 154:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu,
- 155:Src/main.c    **** 	0x0001u, 0x0001u
- 156:Src/main.c    **** };
- 157:Src/main.c    **** 
- 158:Src/main.c    **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = {
- 159:Src/main.c    **** 	0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
- 160:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
- 161:Src/main.c    **** 	0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u,
-ARM GAS  /tmp/ccwR4KB7.s 			page 42
+ 111:Src/main.c    **** /* USER CODE END PM */
+ 112:Src/main.c    **** 
+ 113:Src/main.c    **** /* Private variables ---------------------------------------------------------*/
+ 114:Src/main.c    **** ADC_HandleTypeDef hadc1;
+ 115:Src/main.c    **** ADC_HandleTypeDef hadc3;
+ 116:Src/main.c    **** 
+ 117:Src/main.c    **** SD_HandleTypeDef hsd1;
+ 118:Src/main.c    **** 
+ 119:Src/main.c    **** TIM_HandleTypeDef htim4;
+ 120:Src/main.c    **** TIM_HandleTypeDef htim8;
+ 121:Src/main.c    **** TIM_HandleTypeDef htim1;
+ 122:Src/main.c    **** TIM_HandleTypeDef htim10;
+ 123:Src/main.c    **** TIM_HandleTypeDef htim11;
+ 124:Src/main.c    **** 
+ 125:Src/main.c    **** UART_HandleTypeDef huart8;
+ 126:Src/main.c    **** 
+ 127:Src/main.c    **** /* USER CODE BEGIN PV */
+ 128:Src/main.c    **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, 
+ 129:Src/main.c    **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_
+ 130:Src/main.c    **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat
+ 131:Src/main.c    **** FRESULT fresult;  // result
+ 132:Src/main.c    **** int test;
+ 133:Src/main.c    **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_
+ 134:Src/main.c    **** 
+ 135:Src/main.c    **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup;
+ 136:Src/main.c    **** Work_SetupTypeDef Curr_setup, Def_setup;
+ 137:Src/main.c    **** LDx_ParamTypeDef LD1_param, LD2_param;
+ 138:Src/main.c    **** 
+ 139:Src/main.c    **** LD_Blinker_StateTypeDef LD_blinker;
+ 140:Src/main.c    **** 
+ 141:Src/main.c    **** task_t task;
+ 142:Src/main.c    **** 
+ 143:Src/main.c    **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = {
+ 144:Src/main.c    **** 	0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u,
+ 145:Src/main.c    **** 	0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu,
+ 146:Src/main.c    **** 	0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u,
+ 147:Src/main.c    **** 	0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u,
+ 148:Src/main.c    **** 	0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu,
+ 149:Src/main.c    **** 	0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u,
+ 150:Src/main.c    **** 	0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u,
+ 151:Src/main.c    **** 	0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu,
+ 152:Src/main.c    **** 	0x001eu, 0x001du
+ 153:Src/main.c    **** };
+ 154:Src/main.c    **** 
+ 155:Src/main.c    **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = {
+ 156:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
+ 157:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
+ 158:Src/main.c    **** 	0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u,
+ 159:Src/main.c    **** 	0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 160:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u,
+ 161:Src/main.c    **** 	0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ARM GAS  /tmp/ccEQxcUB.s 			page 42
 
 
- 162:Src/main.c    **** 	0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 163:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u,
- 164:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 165:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 166:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u,
- 167:Src/main.c    **** 	0x0001u, 0x0001u
- 168:Src/main.c    **** };
- 169:Src/main.c    **** 
- 170:Src/main.c    **** 
- 171:Src/main.c    **** 
- 172:Src/main.c    **** 
- 173:Src/main.c    **** /* USER CODE END PV */
- 174:Src/main.c    **** 
- 175:Src/main.c    **** /* Private function prototypes -----------------------------------------------*/
- 176:Src/main.c    **** void SystemClock_Config(void);
- 177:Src/main.c    **** static void MX_GPIO_Init(void);
- 178:Src/main.c    **** static void MX_DMA_Init(void);
- 179:Src/main.c    **** static void MX_SPI4_Init(void);
- 180:Src/main.c    **** static void MX_TIM2_Init(void);
- 181:Src/main.c    **** static void MX_TIM5_Init(void);
- 182:Src/main.c    **** static void MX_ADC1_Init(void);
- 183:Src/main.c    **** static void MX_ADC3_Init(void);
- 184:Src/main.c    **** static void MX_SPI2_Init(void);
- 185:Src/main.c    **** static void MX_SPI5_Init(void);
- 186:Src/main.c    **** static void MX_SPI6_Init(void);
- 187:Src/main.c    **** static void MX_USART1_UART_Init(void);
- 188:Src/main.c    **** static void MX_SDMMC1_SD_Init(void);
- 189:Src/main.c    **** static void MX_TIM7_Init(void);
- 190:Src/main.c    **** static void MX_TIM6_Init(void);
- 191:Src/main.c    **** static void MX_TIM10_Init(void);
- 192:Src/main.c    **** static void MX_UART8_Init(void);
- 193:Src/main.c    **** static void MX_TIM8_Init(void);
- 194:Src/main.c    **** static void MX_TIM11_Init(void);
- 195:Src/main.c    **** static void MX_TIM4_Init(void);
- 196:Src/main.c    **** /* USER CODE BEGIN PFP */
- 197:Src/main.c    **** static void Init_params(void);
- 198:Src/main.c    **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
- 199:Src/main.c    **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
- 200:Src/main.c    **** void Set_LTEC(uint8_t num, uint16_t DATA);
- 201:Src/main.c    **** static uint16_t MPhD_T(uint8_t num);
- 202:Src/main.c    **** static uint16_t Get_ADC(uint8_t num);
- 203:Src/main.c    **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul
- 204:Src/main.c    **** static void AD9102_Init(void);
- 205:Src/main.c    **** static void AD9102_WriteReg(uint16_t addr, uint16_t value);
- 206:Src/main.c    **** static uint16_t AD9102_ReadReg(uint16_t addr);
- 207:Src/main.c    **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
- 208:Src/main.c    **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, 
- 209:Src/main.c    **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle);
- 210:Src/main.c    **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle);
- 211:Src/main.c    **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t
- 212:Src/main.c    **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin
- 213:Src/main.c    **** uint8_t CheckChecksum(uint16_t *pbuff);
- 214:Src/main.c    **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
- 215:Src/main.c    **** //int SD_Init(void);
- 216:Src/main.c    **** int SD_SAVE(uint16_t *pbuff);
- 217:Src/main.c    **** //uint32_t Get_Length(void);
- 218:Src/main.c    **** int SD_READ(uint16_t *pbuff);
-ARM GAS  /tmp/ccwR4KB7.s 			page 43
+ 162:Src/main.c    **** 	0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 163:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu,
+ 164:Src/main.c    **** 	0x0001u, 0x0001u
+ 165:Src/main.c    **** };
+ 166:Src/main.c    **** 
+ 167:Src/main.c    **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = {
+ 168:Src/main.c    **** 	0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
+ 169:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
+ 170:Src/main.c    **** 	0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u,
+ 171:Src/main.c    **** 	0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 172:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u,
+ 173:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 174:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 175:Src/main.c    **** 	0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u,
+ 176:Src/main.c    **** 	0x0001u, 0x0001u
+ 177:Src/main.c    **** };
+ 178:Src/main.c    **** 
+ 179:Src/main.c    **** 
+ 180:Src/main.c    **** 
+ 181:Src/main.c    **** 
+ 182:Src/main.c    **** /* USER CODE END PV */
+ 183:Src/main.c    **** 
+ 184:Src/main.c    **** /* Private function prototypes -----------------------------------------------*/
+ 185:Src/main.c    **** void SystemClock_Config(void);
+ 186:Src/main.c    **** static void MX_GPIO_Init(void);
+ 187:Src/main.c    **** static void MX_DMA_Init(void);
+ 188:Src/main.c    **** static void MX_SPI4_Init(void);
+ 189:Src/main.c    **** static void MX_TIM2_Init(void);
+ 190:Src/main.c    **** static void MX_TIM5_Init(void);
+ 191:Src/main.c    **** static void MX_ADC1_Init(void);
+ 192:Src/main.c    **** static void MX_ADC3_Init(void);
+ 193:Src/main.c    **** static void MX_SPI2_Init(void);
+ 194:Src/main.c    **** static void MX_SPI5_Init(void);
+ 195:Src/main.c    **** static void MX_SPI6_Init(void);
+ 196:Src/main.c    **** static void MX_USART1_UART_Init(void);
+ 197:Src/main.c    **** static void MX_SDMMC1_SD_Init(void);
+ 198:Src/main.c    **** static void MX_TIM7_Init(void);
+ 199:Src/main.c    **** static void MX_TIM6_Init(void);
+ 200:Src/main.c    **** static void MX_TIM10_Init(void);
+ 201:Src/main.c    **** static void MX_UART8_Init(void);
+ 202:Src/main.c    **** static void MX_TIM8_Init(void);
+ 203:Src/main.c    **** static void MX_TIM11_Init(void);
+ 204:Src/main.c    **** static void MX_TIM4_Init(void);
+ 205:Src/main.c    **** static void MX_TIM1_Init(void);
+ 206:Src/main.c    **** /* USER CODE BEGIN PFP */
+ 207:Src/main.c    **** static void Init_params(void);
+ 208:Src/main.c    **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
+ 209:Src/main.c    **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
+ 210:Src/main.c    **** void Set_LTEC(uint8_t num, uint16_t DATA);
+ 211:Src/main.c    **** static uint16_t MPhD_T(uint8_t num);
+ 212:Src/main.c    **** static uint16_t Get_ADC(uint8_t num);
+ 213:Src/main.c    **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul
+ 214:Src/main.c    **** static void AD9102_Init(void);
+ 215:Src/main.c    **** static void AD9102_WriteReg(uint16_t addr, uint16_t value);
+ 216:Src/main.c    **** static uint16_t AD9102_ReadReg(uint16_t addr);
+ 217:Src/main.c    **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
+ 218:Src/main.c    **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, 
+ARM GAS  /tmp/ccEQxcUB.s 			page 43
 
 
- 219:Src/main.c    **** int SD_REMOVE(void);
- 220:Src/main.c    **** void USART_TX (uint8_t* dt, uint16_t sz);
- 221:Src/main.c    **** void USART_TX_DMA (uint16_t sz);
- 222:Src/main.c    **** static void Stop_TIM10();
- 223:Src/main.c    **** static void OUT_trigger(uint8_t);
- 224:Src/main.c    **** /* USER CODE END PFP */
- 225:Src/main.c    **** 
- 226:Src/main.c    **** /* Private user code ---------------------------------------------------------*/
- 227:Src/main.c    **** /* USER CODE BEGIN 0 */
- 228:Src/main.c    **** 
- 229:Src/main.c    **** /* USER CODE END 0 */
- 230:Src/main.c    **** 
- 231:Src/main.c    **** /**
- 232:Src/main.c    ****   * @brief  The application entry point.
- 233:Src/main.c    ****   * @retval int
- 234:Src/main.c    ****   */
- 235:Src/main.c    **** int main(void)
- 236:Src/main.c    **** {
- 237:Src/main.c    **** 
- 238:Src/main.c    ****   /* USER CODE BEGIN 1 */
- 239:Src/main.c    **** 	HAL_StatusTypeDef st;
- 240:Src/main.c    ****   /* USER CODE END 1 */
- 241:Src/main.c    **** 
- 242:Src/main.c    ****   /* MCU Configuration--------------------------------------------------------*/
- 243:Src/main.c    **** 
- 244:Src/main.c    ****   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- 245:Src/main.c    ****   HAL_Init();
- 246:Src/main.c    **** 
- 247:Src/main.c    ****   /* USER CODE BEGIN Init */
- 248:Src/main.c    **** 	/*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/
- 249:Src/main.c    ****   /* USER CODE END Init */
- 250:Src/main.c    **** 
- 251:Src/main.c    ****   /* Configure the system clock */
- 252:Src/main.c    ****   SystemClock_Config();
- 253:Src/main.c    **** 
- 254:Src/main.c    ****   /* USER CODE BEGIN SysInit */
- 255:Src/main.c    **** 	
- 256:Src/main.c    ****   /* USER CODE END SysInit */
+ 219:Src/main.c    **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, 
+ 220:Src/main.c    **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude);
+ 221:Src/main.c    **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t
+ 222:Src/main.c    **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin
+ 223:Src/main.c    **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase);
+ 224:Src/main.c    **** static void AD9833_WriteWord(uint16_t word);
+ 225:Src/main.c    **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word);
+ 226:Src/main.c    **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms);
+ 227:Src/main.c    **** uint8_t CheckChecksum(uint16_t *pbuff);
+ 228:Src/main.c    **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
+ 229:Src/main.c    **** //int SD_Init(void);
+ 230:Src/main.c    **** int SD_SAVE(uint16_t *pbuff);
+ 231:Src/main.c    **** //uint32_t Get_Length(void);
+ 232:Src/main.c    **** int SD_READ(uint16_t *pbuff);
+ 233:Src/main.c    **** int SD_REMOVE(void);
+ 234:Src/main.c    **** void USART_TX (uint8_t* dt, uint16_t sz);
+ 235:Src/main.c    **** void USART_TX_DMA (uint16_t sz);
+ 236:Src/main.c    **** static void Stop_TIM10();
+ 237:Src/main.c    **** static void OUT_trigger(uint8_t);
+ 238:Src/main.c    **** /* USER CODE END PFP */
+ 239:Src/main.c    **** 
+ 240:Src/main.c    **** /* Private user code ---------------------------------------------------------*/
+ 241:Src/main.c    **** /* USER CODE BEGIN 0 */
+ 242:Src/main.c    **** 
+ 243:Src/main.c    **** /* USER CODE END 0 */
+ 244:Src/main.c    **** 
+ 245:Src/main.c    **** /**
+ 246:Src/main.c    ****   * @brief  The application entry point.
+ 247:Src/main.c    ****   * @retval int
+ 248:Src/main.c    ****   */
+ 249:Src/main.c    **** int main(void)
+ 250:Src/main.c    **** {
+ 251:Src/main.c    **** 
+ 252:Src/main.c    ****   /* USER CODE BEGIN 1 */
+ 253:Src/main.c    **** 	HAL_StatusTypeDef st;
+ 254:Src/main.c    ****   /* USER CODE END 1 */
+ 255:Src/main.c    **** 
+ 256:Src/main.c    ****   /* MCU Configuration--------------------------------------------------------*/
  257:Src/main.c    **** 
- 258:Src/main.c    ****   /* Initialize all configured peripherals */
- 259:Src/main.c    ****   MX_GPIO_Init();
- 260:Src/main.c    ****   MX_DMA_Init();
- 261:Src/main.c    ****   MX_SPI4_Init();
- 262:Src/main.c    ****   MX_FATFS_Init();
- 263:Src/main.c    ****   MX_TIM2_Init();
- 264:Src/main.c    ****   MX_TIM5_Init();
- 265:Src/main.c    ****   MX_ADC1_Init();
- 266:Src/main.c    ****   MX_ADC3_Init();
- 267:Src/main.c    ****   MX_SPI2_Init();
- 268:Src/main.c    ****   MX_SPI5_Init();
- 269:Src/main.c    ****   MX_SPI6_Init();
- 270:Src/main.c    ****   MX_USART1_UART_Init();
- 271:Src/main.c    ****   MX_SDMMC1_SD_Init();
- 272:Src/main.c    ****   MX_TIM7_Init();
- 273:Src/main.c    ****   MX_TIM6_Init();
- 274:Src/main.c    ****   MX_TIM10_Init();
- 275:Src/main.c    ****   MX_UART8_Init();
-ARM GAS  /tmp/ccwR4KB7.s 			page 44
+ 258:Src/main.c    ****   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ 259:Src/main.c    ****   HAL_Init();
+ 260:Src/main.c    **** 
+ 261:Src/main.c    ****   /* USER CODE BEGIN Init */
+ 262:Src/main.c    **** 	/*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/
+ 263:Src/main.c    ****   /* USER CODE END Init */
+ 264:Src/main.c    **** 
+ 265:Src/main.c    ****   /* Configure the system clock */
+ 266:Src/main.c    ****   SystemClock_Config();
+ 267:Src/main.c    **** 
+ 268:Src/main.c    ****   /* USER CODE BEGIN SysInit */
+ 269:Src/main.c    **** 	
+ 270:Src/main.c    ****   /* USER CODE END SysInit */
+ 271:Src/main.c    **** 
+ 272:Src/main.c    ****   /* Initialize all configured peripherals */
+ 273:Src/main.c    ****   MX_GPIO_Init();
+ 274:Src/main.c    ****   MX_DMA_Init();
+ 275:Src/main.c    ****   MX_SPI4_Init();
+ARM GAS  /tmp/ccEQxcUB.s 			page 44
 
 
- 276:Src/main.c    ****   MX_TIM8_Init();
- 277:Src/main.c    ****   MX_TIM11_Init();
- 278:Src/main.c    ****   MX_TIM4_Init();
- 279:Src/main.c    ****   /* USER CODE BEGIN 2 */
- 280:Src/main.c    **** 	Init_params();
- 281:Src/main.c    **** 	//HAL_TIM_Base_Start(&htim11);
- 282:Src/main.c    **** 	//HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 283:Src/main.c    **** 
- 284:Src/main.c    **** 
- 285:Src/main.c    ****     //TIM4,11 clocks = 92 MHz
- 286:Src/main.c    **** 
- 287:Src/main.c    **** 	//ADC clock
- 288:Src/main.c    **** 	//TIM4 -> ARR = 60; // for 1.5 MHz
- 289:Src/main.c    **** 	//TIM4 -> ARR = 91; // for 1 MHz
- 290:Src/main.c    **** 	//TIM4 -> ARR = 45; // for 2 MHz
- 291:Src/main.c    **** 	TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre
- 292:Src/main.c    **** 
- 293:Src/main.c    **** 	TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
- 294:Src/main.c    **** 
- 295:Src/main.c    **** 
- 296:Src/main.c    **** 	//Mach-Zander clock (should be 1/4 of ADC clock freq)
- 297:Src/main.c    **** 
- 298:Src/main.c    **** 	TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1;
- 299:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 300:Src/main.c    **** 
- 301:Src/main.c    **** 	/*
- 302:Src/main.c    ****   if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){
- 303:Src/main.c    **** 
- 304:Src/main.c    **** 	  CPU_state = DECODE_ENABLE;
- 305:Src/main.c    ****   }
- 306:Src/main.c    ****   */
- 307:Src/main.c    ****   /* USER CODE END 2 */
- 308:Src/main.c    **** 
- 309:Src/main.c    ****   /* Infinite loop */
- 310:Src/main.c    ****   /* USER CODE BEGIN WHILE */
- 311:Src/main.c    ****   while (1)
- 312:Src/main.c    ****   {
- 313:Src/main.c    **** 		if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0))
- 314:Src/main.c    **** 		{
- 315:Src/main.c    **** 			//NVIC_DisableIRQ(USART1_IRQn);
- 316:Src/main.c    **** 			LL_USART_EnableIT_PE(USART1);
- 317:Src/main.c    **** 			LL_USART_EnableIT_RXNE(USART1);
- 318:Src/main.c    **** 			LL_USART_EnableIT_ERROR(USART1);
- 319:Src/main.c    **** 			NVIC_SetPriority(USART1_IRQn, 0);
- 320:Src/main.c    **** 			NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
- 321:Src/main.c    **** 			u_rx_flg = 1;
- 322:Src/main.c    **** 		}
- 323:Src/main.c    **** //		else
- 324:Src/main.c    **** //		{
- 325:Src/main.c    **** //			//NVIC_DisableIRQ(USART1_IRQn);
- 326:Src/main.c    **** //			u_rx_flg = 0;
- 327:Src/main.c    **** //		}
- 328:Src/main.c    **** 			switch (CPU_state)
- 329:Src/main.c    **** 			{
- 330:Src/main.c    **** 				case HALT://0 - Default state
- 331:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
- 332:Src/main.c    **** 					task.current_param = task.min_param;
-ARM GAS  /tmp/ccwR4KB7.s 			page 45
+ 276:Src/main.c    ****   MX_FATFS_Init();
+ 277:Src/main.c    ****   MX_TIM2_Init();
+ 278:Src/main.c    ****   MX_TIM5_Init();
+ 279:Src/main.c    ****   MX_ADC1_Init();
+ 280:Src/main.c    ****   MX_ADC3_Init();
+ 281:Src/main.c    ****   MX_SPI2_Init();
+ 282:Src/main.c    ****   MX_SPI5_Init();
+ 283:Src/main.c    ****   MX_SPI6_Init();
+ 284:Src/main.c    ****   MX_USART1_UART_Init();
+ 285:Src/main.c    ****   MX_SDMMC1_SD_Init();
+ 286:Src/main.c    ****   MX_TIM7_Init();
+ 287:Src/main.c    ****   MX_TIM6_Init();
+ 288:Src/main.c    ****   MX_TIM10_Init();
+ 289:Src/main.c    ****   MX_UART8_Init();
+ 290:Src/main.c    ****   MX_TIM8_Init();
+ 291:Src/main.c    ****   MX_TIM11_Init();
+ 292:Src/main.c    ****   MX_TIM4_Init();
+ 293:Src/main.c    ****   MX_TIM1_Init();
+ 294:Src/main.c    ****   /* USER CODE BEGIN 2 */
+ 295:Src/main.c    **** 	Init_params();
+ 296:Src/main.c    **** 	//HAL_TIM_Base_Start(&htim11);
+ 297:Src/main.c    **** 	//HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
+ 298:Src/main.c    **** 
+ 299:Src/main.c    **** 
+ 300:Src/main.c    ****     //TIM4,11 clocks = 92 MHz
+ 301:Src/main.c    **** 
+ 302:Src/main.c    **** 	//ADC clock
+ 303:Src/main.c    **** 	//TIM4 -> ARR = 60; // for 1.5 MHz
+ 304:Src/main.c    **** 	//TIM4 -> ARR = 91; // for 1 MHz
+ 305:Src/main.c    **** 	//TIM4 -> ARR = 45; // for 2 MHz
+ 306:Src/main.c    **** 	TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre
+ 307:Src/main.c    **** 
+ 308:Src/main.c    **** 	TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
+ 309:Src/main.c    **** 
+ 310:Src/main.c    **** 
+ 311:Src/main.c    **** 	//Mach-Zander clock (should be 1/4 of ADC clock freq)
+ 312:Src/main.c    **** 
+ 313:Src/main.c    **** 	TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1;
+ 314:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+ 315:Src/main.c    **** 
+ 316:Src/main.c    **** 	// AD9833 MCLK output on PE9 (TIM1_CH1)
+ 317:Src/main.c    **** 	// TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output
+ 318:Src/main.c    **** 	HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
+ 319:Src/main.c    **** 
+ 320:Src/main.c    **** 	/*
+ 321:Src/main.c    ****   if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){
+ 322:Src/main.c    **** 
+ 323:Src/main.c    **** 	  CPU_state = DECODE_ENABLE;
+ 324:Src/main.c    ****   }
+ 325:Src/main.c    ****   */
+ 326:Src/main.c    ****   /* USER CODE END 2 */
+ 327:Src/main.c    **** 
+ 328:Src/main.c    ****   /* Infinite loop */
+ 329:Src/main.c    ****   /* USER CODE BEGIN WHILE */
+ 330:Src/main.c    ****   while (1)
+ 331:Src/main.c    ****   {
+ 332:Src/main.c    **** 		if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0))
+ARM GAS  /tmp/ccEQxcUB.s 			page 45
 
 
- 333:Src/main.c    **** 					Stop_TIM10();
- 334:Src/main.c    **** 				break;
- 335:Src/main.c    **** 				case DECODE_ENABLE://1 - Decode rec. message
- 336:Src/main.c    **** 					CS_result = CalculateChecksum(COMMAND, CL_16-2);
- 337:Src/main.c    **** 					if (CheckChecksum(COMMAND))
- 338:Src/main.c    **** 					{
- 339:Src/main.c    **** 						LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1
- 340:Src/main.c    **** 						LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
- 341:Src/main.c    **** 						Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- 342:Src/main.c    **** 						TO6_before = TO6;
- 343:Src/main.c    **** 						//LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- 344:Src/main.c    **** 						//LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP;
- 345:Src/main.c    **** 						CPU_state = WORK_ENABLE;
- 346:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
- 347:Src/main.c    **** 					}
- 348:Src/main.c    **** 					else
- 349:Src/main.c    **** 					{
- 350:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
- 351:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 352:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
- 353:Src/main.c    **** 					}
- 354:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 355:Src/main.c    **** 				break;
- 356:Src/main.c    **** 				case DEFAULT_ENABLE://2 - Go to HALT
- 357:Src/main.c    **** 					//Set current setup to default
- 358:Src/main.c    **** 					task.current_param = task.min_param;
- 359:Src/main.c    **** 					Stop_TIM10();
- 360:Src/main.c    **** 					Init_params();
- 361:Src/main.c    **** 					LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
- 362:Src/main.c    **** 					LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
- 363:Src/main.c    **** 					CPU_state = HALT;
- 364:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
- 365:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 366:Src/main.c    **** 				break;
- 367:Src/main.c    **** 				case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
- 368:Src/main.c    **** 					temp16 = SD_READ(&Long_Data[0]);
- 369:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
- 370:Src/main.c    **** 					if (temp16==0)
- 371:Src/main.c    **** 					{	
- 372:Src/main.c    **** 						UART_transmission_request = MESS_03;
- 373:Src/main.c    **** 					}
- 374:Src/main.c    **** 					else
- 375:Src/main.c    **** 					{
- 376:Src/main.c    **** 						UART_transmission_request = MESS_01;
- 377:Src/main.c    **** 					}
- 378:Src/main.c    **** 					CPU_state_old = HALT;
- 379:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 380:Src/main.c    **** 				break;
- 381:Src/main.c    **** 				case TRANS_ENABLE://4 - Transmith current packet
- 382:Src/main.c    **** 					UART_transmission_request = MESS_02;
- 383:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 384:Src/main.c    **** 				break;
- 385:Src/main.c    **** 				case REMOVE_FILE://5 - Remove file from SD
- 386:Src/main.c    **** 					State_Data[0]|=SD_REMOVE()&0xff;
- 387:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 388:Src/main.c    **** 					CPU_state = CPU_state_old;
- 389:Src/main.c    **** 				break;
-ARM GAS  /tmp/ccwR4KB7.s 			page 46
+ 333:Src/main.c    **** 		{
+ 334:Src/main.c    **** 			//NVIC_DisableIRQ(USART1_IRQn);
+ 335:Src/main.c    **** 			LL_USART_EnableIT_PE(USART1);
+ 336:Src/main.c    **** 			LL_USART_EnableIT_RXNE(USART1);
+ 337:Src/main.c    **** 			LL_USART_EnableIT_ERROR(USART1);
+ 338:Src/main.c    **** 			NVIC_SetPriority(USART1_IRQn, 0);
+ 339:Src/main.c    **** 			NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
+ 340:Src/main.c    **** 			u_rx_flg = 1;
+ 341:Src/main.c    **** 		}
+ 342:Src/main.c    **** //		else
+ 343:Src/main.c    **** //		{
+ 344:Src/main.c    **** //			//NVIC_DisableIRQ(USART1_IRQn);
+ 345:Src/main.c    **** //			u_rx_flg = 0;
+ 346:Src/main.c    **** //		}
+ 347:Src/main.c    **** 			switch (CPU_state)
+ 348:Src/main.c    **** 			{
+ 349:Src/main.c    **** 				case HALT://0 - Default state
+ 350:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
+ 351:Src/main.c    **** 					task.current_param = task.min_param;
+ 352:Src/main.c    **** 					Stop_TIM10();
+ 353:Src/main.c    **** 				break;
+ 354:Src/main.c    **** 				case DECODE_ENABLE://1 - Decode rec. message
+ 355:Src/main.c    **** 					CS_result = CalculateChecksum(COMMAND, CL_16-2);
+ 356:Src/main.c    **** 					if (CheckChecksum(COMMAND))
+ 357:Src/main.c    **** 					{
+ 358:Src/main.c    **** 						LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1
+ 359:Src/main.c    **** 						LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
+ 360:Src/main.c    **** 						Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
+ 361:Src/main.c    **** 						TO6_before = TO6;
+ 362:Src/main.c    **** 						//LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
+ 363:Src/main.c    **** 						//LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP;
+ 364:Src/main.c    **** 						CPU_state = WORK_ENABLE;
+ 365:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
+ 366:Src/main.c    **** 					}
+ 367:Src/main.c    **** 					else
+ 368:Src/main.c    **** 					{
+ 369:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
+ 370:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ 371:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
+ 372:Src/main.c    **** 					}
+ 373:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 374:Src/main.c    **** 				break;
+ 375:Src/main.c    **** 				case DEFAULT_ENABLE://2 - Go to HALT
+ 376:Src/main.c    **** 					//Set current setup to default
+ 377:Src/main.c    **** 					task.current_param = task.min_param;
+ 378:Src/main.c    **** 					Stop_TIM10();
+ 379:Src/main.c    **** 					Init_params();
+ 380:Src/main.c    **** 					LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
+ 381:Src/main.c    **** 					LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
+ 382:Src/main.c    **** 					CPU_state = HALT;
+ 383:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
+ 384:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 385:Src/main.c    **** 				break;
+ 386:Src/main.c    **** 				case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
+ 387:Src/main.c    **** 					temp16 = SD_READ(&Long_Data[0]);
+ 388:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
+ 389:Src/main.c    **** 					if (temp16==0)
+ARM GAS  /tmp/ccEQxcUB.s 			page 46
 
 
- 390:Src/main.c    **** 				case STATE://6 - Transmith state message
- 391:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 392:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 393:Src/main.c    **** 				break;
- 394:Src/main.c    **** 				case WORK_ENABLE://7 - Main work cycle
- 395:Src/main.c    **** 					task.current_param = task.min_param;
- 396:Src/main.c    **** 					Stop_TIM10();
- 397:Src/main.c    **** 					if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
- 398:Src/main.c    **** 					{
- 399:Src/main.c    **** 						TO7_before = TO7;
- 400:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 401:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 402:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 403:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 404:Src/main.c    **** 						
- 405:Src/main.c    **** 						//Correct temperature in all pulses
- 406:Src/main.c    **** 						(void) MPhD_T(3);
- 407:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(3);
- 408:Src/main.c    **** 						(void) MPhD_T(4);
- 409:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(4);
- 410:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 411:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
- 412:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 413:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
- 414:Src/main.c    **** 						
- 415:Src/main.c    **** 						Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
- 416:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 417:Src/main.c    **** 
- 418:Src/main.c    **** 						Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1
- 419:Src/main.c    **** 						Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
- 420:Src/main.c    **** 
- 421:Src/main.c    **** 						//Prepare DATA of internals ADCs
- 422:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 423:Src/main.c    **** 						temp16 = Get_ADC(0);
- 424:Src/main.c    **** 						temp16 = Get_ADC(1);
- 425:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 426:Src/main.c    **** 						
- 427:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 428:Src/main.c    **** 						temp16 = Get_ADC(1);
- 429:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- 430:Src/main.c    **** 						
- 431:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 432:Src/main.c    **** 						temp16 = Get_ADC(1);
- 433:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 434:Src/main.c    **** 						
- 435:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 436:Src/main.c    **** 						temp16 = Get_ADC(1);
- 437:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 438:Src/main.c    **** 						
- 439:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 440:Src/main.c    **** 						temp16 = Get_ADC(1);
- 441:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- 442:Src/main.c    **** 						temp16 = Get_ADC(2);
- 443:Src/main.c    **** 						
- 444:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 445:Src/main.c    **** 						temp16 = Get_ADC(3);
- 446:Src/main.c    **** 						temp16 = Get_ADC(4);
-ARM GAS  /tmp/ccwR4KB7.s 			page 47
+ 390:Src/main.c    **** 					{	
+ 391:Src/main.c    **** 						UART_transmission_request = MESS_03;
+ 392:Src/main.c    **** 					}
+ 393:Src/main.c    **** 					else
+ 394:Src/main.c    **** 					{
+ 395:Src/main.c    **** 						UART_transmission_request = MESS_01;
+ 396:Src/main.c    **** 					}
+ 397:Src/main.c    **** 					CPU_state_old = HALT;
+ 398:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 399:Src/main.c    **** 				break;
+ 400:Src/main.c    **** 				case TRANS_ENABLE://4 - Transmith current packet
+ 401:Src/main.c    **** 					UART_transmission_request = MESS_02;
+ 402:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 403:Src/main.c    **** 				break;
+ 404:Src/main.c    **** 				case REMOVE_FILE://5 - Remove file from SD
+ 405:Src/main.c    **** 					State_Data[0]|=SD_REMOVE()&0xff;
+ 406:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 407:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 408:Src/main.c    **** 				break;
+ 409:Src/main.c    **** 				case STATE://6 - Transmith state message
+ 410:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 411:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 412:Src/main.c    **** 				break;
+ 413:Src/main.c    **** 				case WORK_ENABLE://7 - Main work cycle
+ 414:Src/main.c    **** 					task.current_param = task.min_param;
+ 415:Src/main.c    **** 					Stop_TIM10();
+ 416:Src/main.c    **** 					if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
+ 417:Src/main.c    **** 					{
+ 418:Src/main.c    **** 						TO7_before = TO7;
+ 419:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 420:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 421:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 422:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 423:Src/main.c    **** 						
+ 424:Src/main.c    **** 						//Correct temperature in all pulses
+ 425:Src/main.c    **** 						(void) MPhD_T(3);
+ 426:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(3);
+ 427:Src/main.c    **** 						(void) MPhD_T(4);
+ 428:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(4);
+ 429:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 430:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
+ 431:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 432:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
+ 433:Src/main.c    **** 						
+ 434:Src/main.c    **** 						Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
+ 435:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ 436:Src/main.c    **** 
+ 437:Src/main.c    **** 						Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1
+ 438:Src/main.c    **** 						Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
+ 439:Src/main.c    **** 
+ 440:Src/main.c    **** 						//Prepare DATA of internals ADCs
+ 441:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 442:Src/main.c    **** 						temp16 = Get_ADC(0);
+ 443:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 444:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
+ 445:Src/main.c    **** 						
+ 446:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ARM GAS  /tmp/ccEQxcUB.s 			page 47
 
 
- 447:Src/main.c    **** 						Long_Data[12] = temp16;
- 448:Src/main.c    **** 						temp16 = Get_ADC(5);
- 449:Src/main.c    **** 													
- 450:Src/main.c    **** 						//Put the timer tick to Long_Data:
- 451:Src/main.c    **** 						TO6_stop = TO6;
- 452:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
- 453:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
- 454:Src/main.c    **** 						
- 455:Src/main.c    **** 						//Put the average temperature of LD1 to Long_Data:
- 456:Src/main.c    **** 						Long_Data[5] = LD1_param.LD_CURR_TEMP;
+ 447:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 448:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
+ 449:Src/main.c    **** 						
+ 450:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 451:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 452:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
+ 453:Src/main.c    **** 						
+ 454:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 455:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 456:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
  457:Src/main.c    **** 						
- 458:Src/main.c    **** 						//Put the average temperature of LD2 to Long_Data:
- 459:Src/main.c    **** 						Long_Data[6] = LD2_param.LD_CURR_TEMP;
- 460:Src/main.c    **** 
- 461:Src/main.c    **** 						if (Curr_setup.SD_EN==1)
- 462:Src/main.c    **** 						{
- 463:Src/main.c    **** 							CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
- 464:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
- 465:Src/main.c    **** 							temp16 = SD_SAVE(&Long_Data[0]);
- 466:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
- 467:Src/main.c    **** 						}
- 468:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
- 469:Src/main.c    **** 						}
- 470:Src/main.c    **** 					break;
- 471:Src/main.c    **** 				case AD9102_CMD://10 - Configure AD9102 sawtooth output
- 472:Src/main.c    **** 					if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
- 473:Src/main.c    **** 					{
- 474:Src/main.c    **** 						uint16_t flags = COMMAND[0];
- 475:Src/main.c    **** 						uint16_t param0 = COMMAND[1];
- 476:Src/main.c    **** 						uint16_t param1 = COMMAND[2];
- 477:Src/main.c    **** 						uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
- 478:Src/main.c    **** 						uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
- 479:Src/main.c    **** 						uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
- 480:Src/main.c    **** 
- 481:Src/main.c    **** 						if (sram_mode)
- 482:Src/main.c    **** 						{
- 483:Src/main.c    **** 							uint16_t samples = param0;
- 484:Src/main.c    **** 							uint8_t hold = (uint8_t)(param1 & 0x0Fu);
- 485:Src/main.c    **** 							uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle);
- 486:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 487:Src/main.c    **** 							if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
- 488:Src/main.c    **** 							{
- 489:Src/main.c    **** 								State_Data[0] |= AD9102_ERR;
- 490:Src/main.c    **** 							}
- 491:Src/main.c    **** 						}
- 492:Src/main.c    **** 						else
- 493:Src/main.c    **** 						{
- 494:Src/main.c    **** 							uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP;
- 495:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 496:Src/main.c    **** 							uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
- 497:Src/main.c    **** 							uint16_t pat_period = param1;
- 498:Src/main.c    **** 
- 499:Src/main.c    **** 							if (param0 == 0u && param1 == 0u)
- 500:Src/main.c    **** 							{
- 501:Src/main.c    **** 								saw_step = AD9102_SAW_STEP_DEFAULT;
- 502:Src/main.c    **** 								pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
- 503:Src/main.c    **** 								pat_period = AD9102_PAT_PERIOD_DEFAULT;
-ARM GAS  /tmp/ccwR4KB7.s 			page 48
+ 458:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 459:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 460:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
+ 461:Src/main.c    **** 						temp16 = Get_ADC(2);
+ 462:Src/main.c    **** 						
+ 463:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 464:Src/main.c    **** 						temp16 = Get_ADC(3);
+ 465:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 466:Src/main.c    **** 						Long_Data[12] = temp16;
+ 467:Src/main.c    **** 						temp16 = Get_ADC(5);
+ 468:Src/main.c    **** 													
+ 469:Src/main.c    **** 						//Put the timer tick to Long_Data:
+ 470:Src/main.c    **** 						TO6_stop = TO6;
+ 471:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
+ 472:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
+ 473:Src/main.c    **** 						
+ 474:Src/main.c    **** 						//Put the average temperature of LD1 to Long_Data:
+ 475:Src/main.c    **** 						Long_Data[5] = LD1_param.LD_CURR_TEMP;
+ 476:Src/main.c    **** 						
+ 477:Src/main.c    **** 						//Put the average temperature of LD2 to Long_Data:
+ 478:Src/main.c    **** 						Long_Data[6] = LD2_param.LD_CURR_TEMP;
+ 479:Src/main.c    **** 
+ 480:Src/main.c    **** 						if (Curr_setup.SD_EN==1)
+ 481:Src/main.c    **** 						{
+ 482:Src/main.c    **** 							CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
+ 483:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
+ 484:Src/main.c    **** 							temp16 = SD_SAVE(&Long_Data[0]);
+ 485:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
+ 486:Src/main.c    **** 						}
+ 487:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
+ 488:Src/main.c    **** 						}
+ 489:Src/main.c    **** 					break;
+ 490:Src/main.c    **** 				case AD9102_CMD://10 - Configure AD9102 sawtooth output
+ 491:Src/main.c    **** 					if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
+ 492:Src/main.c    **** 					{
+ 493:Src/main.c    **** 						uint16_t flags = COMMAND[0];
+ 494:Src/main.c    **** 						uint16_t param0 = COMMAND[1];
+ 495:Src/main.c    **** 						uint16_t param1 = COMMAND[2];
+ 496:Src/main.c    **** 						uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
+ 497:Src/main.c    **** 						uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
+ 498:Src/main.c    **** 						uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
+ 499:Src/main.c    **** 
+ 500:Src/main.c    **** 						if (sram_mode)
+ 501:Src/main.c    **** 						{
+ 502:Src/main.c    **** 							uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u;
+ 503:Src/main.c    **** 							uint16_t samples;
+ARM GAS  /tmp/ccEQxcUB.s 			page 48
 
 
- 504:Src/main.c    **** 							}
- 505:Src/main.c    **** 							else
- 506:Src/main.c    **** 							{
- 507:Src/main.c    **** 								if (saw_step == 0u)
- 508:Src/main.c    **** 								{
- 509:Src/main.c    **** 									saw_step = AD9102_SAW_STEP_DEFAULT;
- 510:Src/main.c    **** 								}
- 511:Src/main.c    **** 								else if (saw_step > 63u)
- 512:Src/main.c    **** 								{
- 513:Src/main.c    **** 									saw_step = 63u;
- 514:Src/main.c    **** 								}
- 515:Src/main.c    **** 								if (pat_period == 0u)
- 516:Src/main.c    **** 								{
- 517:Src/main.c    **** 									pat_period = AD9102_PAT_PERIOD_DEFAULT;
- 518:Src/main.c    **** 								}
- 519:Src/main.c    **** 							}
- 520:Src/main.c    **** 
- 521:Src/main.c    **** 							uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period);
- 522:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 523:Src/main.c    **** 							if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
- 524:Src/main.c    **** 							{
- 525:Src/main.c    **** 								State_Data[0] |= AD9102_ERR;
- 526:Src/main.c    **** 							}
- 527:Src/main.c    **** 						}
- 528:Src/main.c    **** 					}
- 529:Src/main.c    **** 					else
- 530:Src/main.c    **** 					{
- 531:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
- 532:Src/main.c    **** 					}
- 533:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 534:Src/main.c    **** 					CPU_state = CPU_state_old;
- 535:Src/main.c    **** 				break;
- 536:Src/main.c    **** 				case DECODE_TASK:
- 537:Src/main.c    **** 					if (CheckChecksum(COMMAND))
- 538:Src/main.c    **** 					{
- 539:Src/main.c    **** 						Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- 540:Src/main.c    **** 						TO6_before = TO6;
- 541:Src/main.c    **** 						CPU_state = RUN_TASK;
- 542:Src/main.c    **** 						CPU_state_old = RUN_TASK;//Save main current cycle
- 543:Src/main.c    **** 					}
- 544:Src/main.c    **** 					else
- 545:Src/main.c    **** 					{
- 546:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
- 547:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 548:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
- 549:Src/main.c    **** 					}
- 550:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 551:Src/main.c    **** 				break;
- 552:Src/main.c    **** 				case RUN_TASK:
- 553:Src/main.c    **** 					switch (task.task_type)
- 554:Src/main.c    **** 					{
- 555:Src/main.c    **** 					case TT_CHANGE_CURR_1:
- 556:Src/main.c    **** 
- 557:Src/main.c    **** 
- 558:Src/main.c    **** 						//calculating timer periods for ADC clock and Mach-Zander modulator
- 559:Src/main.c    **** 						//ADC clock
- 560:Src/main.c    **** 						//TIM4 -> ARR = 60; // for 1.5 MHz
-ARM GAS  /tmp/ccwR4KB7.s 			page 49
+ 504:Src/main.c    **** 							uint8_t hold;
+ 505:Src/main.c    **** 							uint16_t amplitude;
+ 506:Src/main.c    **** 
+ 507:Src/main.c    **** 							if (sram_fmt)
+ 508:Src/main.c    **** 							{
+ 509:Src/main.c    **** 								amplitude = param0;
+ 510:Src/main.c    **** 								samples = param1;
+ 511:Src/main.c    **** 								hold = AD9102_SRAM_HOLD_DEFAULT;
+ 512:Src/main.c    **** 							}
+ 513:Src/main.c    **** 							else
+ 514:Src/main.c    **** 							{
+ 515:Src/main.c    **** 								samples = param0;
+ 516:Src/main.c    **** 								hold = (uint8_t)(param1 & 0x0Fu);
+ 517:Src/main.c    **** 								amplitude = AD9102_SRAM_AMP_DEFAULT;
+ 518:Src/main.c    **** 							}
+ 519:Src/main.c    **** 
+ 520:Src/main.c    **** 							uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude);
+ 521:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 522:Src/main.c    **** 							if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
+ 523:Src/main.c    **** 							{
+ 524:Src/main.c    **** 								State_Data[0] |= AD9102_ERR;
+ 525:Src/main.c    **** 							}
+ 526:Src/main.c    **** 						}
+ 527:Src/main.c    **** 						else
+ 528:Src/main.c    **** 						{
+ 529:Src/main.c    **** 							uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP;
+ 530:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
+ 531:Src/main.c    **** 							uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
+ 532:Src/main.c    **** 							uint16_t pat_period = param1;
+ 533:Src/main.c    **** 
+ 534:Src/main.c    **** 							if (param0 == 0u && param1 == 0u)
+ 535:Src/main.c    **** 							{
+ 536:Src/main.c    **** 								saw_step = AD9102_SAW_STEP_DEFAULT;
+ 537:Src/main.c    **** 								pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
+ 538:Src/main.c    **** 								pat_period = AD9102_PAT_PERIOD_DEFAULT;
+ 539:Src/main.c    **** 							}
+ 540:Src/main.c    **** 							else
+ 541:Src/main.c    **** 							{
+ 542:Src/main.c    **** 								if (saw_step == 0u)
+ 543:Src/main.c    **** 								{
+ 544:Src/main.c    **** 									saw_step = AD9102_SAW_STEP_DEFAULT;
+ 545:Src/main.c    **** 								}
+ 546:Src/main.c    **** 								else if (saw_step > 63u)
+ 547:Src/main.c    **** 								{
+ 548:Src/main.c    **** 									saw_step = 63u;
+ 549:Src/main.c    **** 								}
+ 550:Src/main.c    **** 								if (pat_period == 0u)
+ 551:Src/main.c    **** 								{
+ 552:Src/main.c    **** 									pat_period = AD9102_PAT_PERIOD_DEFAULT;
+ 553:Src/main.c    **** 								}
+ 554:Src/main.c    **** 							}
+ 555:Src/main.c    **** 
+ 556:Src/main.c    **** 							uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period);
+ 557:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 558:Src/main.c    **** 							if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
+ 559:Src/main.c    **** 							{
+ 560:Src/main.c    **** 								State_Data[0] |= AD9102_ERR;
+ARM GAS  /tmp/ccEQxcUB.s 			page 49
 
 
- 561:Src/main.c    **** 						//TIM4 -> ARR = 91; // for 1 MHz
- 562:Src/main.c    **** 						//TIM4 -> ARR = 45; // for 2 MHz
- 563:Src/main.c    **** 
- 564:Src/main.c    **** 						//online calculation for debug purposes:
- 565:Src/main.c    **** 						//manually varying TIM4 -> ARR by debugger while running
- 566:Src/main.c    **** 						//TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
- 567:Src/main.c    **** 
- 568:Src/main.c    **** 
- 569:Src/main.c    **** 						//Mach-Zander clock (should be half of ADC clock freq)
- 570:Src/main.c    **** 						//TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1;
- 571:Src/main.c    **** 						//TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 572:Src/main.c    **** 
- 573:Src/main.c    **** 
- 574:Src/main.c    **** 
- 575:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.curr);
- 576:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 577:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 578:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 579:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 580:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 581:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 582:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 583:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 584:Src/main.c    **** 
- 585:Src/main.c    **** 						// Toggle pin for oscilloscope
- 586:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc
- 587:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 588:Src/main.c    **** 		
- 589:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim10);
- 590:Src/main.c    **** 						if (st != HAL_OK)
- 591:Src/main.c    **** 							while(1);
- 592:Src/main.c    **** 
- 593:Src/main.c    **** 						uint16_t step_counter = 0;
- 594:Src/main.c    **** 						uint16_t trigger_counter = 0;
- 595:Src/main.c    **** 						uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
- 596:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 597:Src/main.c    **** 
- 598:Src/main.c    **** 
+ 561:Src/main.c    **** 							}
+ 562:Src/main.c    **** 						}
+ 563:Src/main.c    **** 					}
+ 564:Src/main.c    **** 					else
+ 565:Src/main.c    **** 					{
+ 566:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
+ 567:Src/main.c    **** 					}
+ 568:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 569:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 570:Src/main.c    **** 				break;
+ 571:Src/main.c    **** 				case AD9833_CMD://11 - Configure AD9833 triangle output
+ 572:Src/main.c    **** 					State_Data[1] = 0u;
+ 573:Src/main.c    **** 					if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
+ 574:Src/main.c    **** 					{
+ 575:Src/main.c    **** 						uint16_t flags = COMMAND[0];
+ 576:Src/main.c    **** 						uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
+ 577:Src/main.c    **** 						uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
+ 578:Src/main.c    **** 						uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
+ 579:Src/main.c    **** 						uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u;
+ 580:Src/main.c    **** 						uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
+ 581:Src/main.c    **** 
+ 582:Src/main.c    **** 						AD9833_Apply(enable, triangle, freq_word);
+ 583:Src/main.c    **** 					}
+ 584:Src/main.c    **** 					else
+ 585:Src/main.c    **** 					{
+ 586:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
+ 587:Src/main.c    **** 					}
+ 588:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 589:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 590:Src/main.c    **** 				break;
+ 591:Src/main.c    **** 				case DS1809_CMD://12 - Pulse DS1809 UC/DC controls
+ 592:Src/main.c    **** 					if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1])
+ 593:Src/main.c    **** 					{
+ 594:Src/main.c    **** 						uint16_t flags = COMMAND[0];
+ 595:Src/main.c    **** 						uint16_t count = COMMAND[1];
+ 596:Src/main.c    **** 						uint16_t pulse_ms = COMMAND[2];
+ 597:Src/main.c    **** 						uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
+ 598:Src/main.c    **** 						uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u;
  599:Src/main.c    **** 
- 600:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 601:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- 602:Src/main.c    **** 						TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 603:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 604:Src/main.c    **** 
- 605:Src/main.c    **** 
- 606:Src/main.c    **** 
- 607:Src/main.c    **** 						TIM11 -> CNT = 0;
- 608:Src/main.c    **** 						TIM4 -> CNT = 0;
- 609:Src/main.c    **** 
- 610:Src/main.c    **** 						HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 611:Src/main.c    **** 						HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock
- 612:Src/main.c    **** 						//TIM4 -> CNT = 0;
- 613:Src/main.c    **** 
- 614:Src/main.c    **** 						TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de
- 615:Src/main.c    **** 						TIM11 -> CNT = 0;
- 616:Src/main.c    **** 
- 617:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 50
+ 600:Src/main.c    **** 						if (uc && dc)
+ 601:Src/main.c    **** 						{
+ 602:Src/main.c    **** 							State_Data[0] |= UART_DECODE_ERR;
+ 603:Src/main.c    **** 						}
+ 604:Src/main.c    **** 						else
+ 605:Src/main.c    **** 						{
+ 606:Src/main.c    **** 							if (count == 0u)
+ 607:Src/main.c    **** 							{
+ 608:Src/main.c    **** 								count = 1u;
+ 609:Src/main.c    **** 							}
+ 610:Src/main.c    **** 							if (count > 64u)
+ 611:Src/main.c    **** 							{
+ 612:Src/main.c    **** 								count = 64u;
+ 613:Src/main.c    **** 							}
+ 614:Src/main.c    **** 							if (pulse_ms == 0u)
+ 615:Src/main.c    **** 							{
+ 616:Src/main.c    **** 								pulse_ms = DS1809_PULSE_MS_DEFAULT;
+ 617:Src/main.c    **** 							}
+ARM GAS  /tmp/ccEQxcUB.s 			page 50
 
 
- 618:Src/main.c    **** 						while (task.current_param < task.max_param)
- 619:Src/main.c    **** 						{
- 620:Src/main.c    **** 							if (TIM10_coflag)
- 621:Src/main.c    **** 							{
- 622:Src/main.c    **** 								Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 623:Src/main.c    **** 								//TIM11 -> CNT = 0; // to link modulator phase
- 624:Src/main.c    **** 								//TIM4 -> CNT = 0; // to link ADC clock phase
- 625:Src/main.c    **** 								task.current_param += task.delta_param;
- 626:Src/main.c    **** 								TO10 = 0;
- 627:Src/main.c    **** 								TIM10_coflag = 0;
- 628:Src/main.c    **** 								
- 629:Src/main.c    **** 								HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t
- 630:Src/main.c    **** 								HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
- 631:Src/main.c    **** //*
- 632:Src/main.c    **** 								if (step_counter % trigger_step == 0){ //trigger at every 60 step
- 633:Src/main.c    **** 									OUT_trigger(trigger_counter);
- 634:Src/main.c    **** 									++trigger_counter;
- 635:Src/main.c    **** 								}
- 636:Src/main.c    **** 								++step_counter;
- 637:Src/main.c    **** //*/
- 638:Src/main.c    **** /*
- 639:Src/main.c    **** 								++task_sheduler;
- 640:Src/main.c    **** 								if (task_sheduler >= 10){
- 641:Src/main.c    **** 									task_sheduler = 0;
- 642:Src/main.c    **** 								}
- 643:Src/main.c    **** 								//maintain stable temperature of laser 2
- 644:Src/main.c    **** 								if (task_sheduler == 0){
- 645:Src/main.c    **** 									(void) MPhD_T(TT_CHANGE_TEMP_2);
- 646:Src/main.c    **** 									LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 647:Src/main.c    **** 									temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 648:Src/main.c    **** 									Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 649:Src/main.c    **** 								}
- 650:Src/main.c    **** 								//maintain stable temperature of laser 1
- 651:Src/main.c    **** 								//*
- 652:Src/main.c    **** 								if (task_sheduler == 5){
- 653:Src/main.c    **** 									(void) MPhD_T(TT_CHANGE_TEMP_1);
- 654:Src/main.c    **** 									LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 655:Src/main.c    **** 									temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 656:Src/main.c    **** 									Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 657:Src/main.c    **** 								}
- 658:Src/main.c    **** //*/
- 659:Src/main.c    **** 							}
- 660:Src/main.c    **** 						}
- 661:Src/main.c    **** 						TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o
- 662:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 663:Src/main.c    **** 						//TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda
- 664:Src/main.c    **** 						//but one-pulse mode should be disabled
- 665:Src/main.c    **** 
- 666:Src/main.c    **** 						//HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 667:Src/main.c    **** 						//HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
+ 618:Src/main.c    **** 							if (pulse_ms > 500u)
+ 619:Src/main.c    **** 							{
+ 620:Src/main.c    **** 								pulse_ms = 500u;
+ 621:Src/main.c    **** 							}
+ 622:Src/main.c    **** 							DS1809_Pulse(uc, dc, count, pulse_ms);
+ 623:Src/main.c    **** 						}
+ 624:Src/main.c    **** 					}
+ 625:Src/main.c    **** 					else
+ 626:Src/main.c    **** 					{
+ 627:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
+ 628:Src/main.c    **** 					}
+ 629:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 630:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 631:Src/main.c    **** 				break;
+ 632:Src/main.c    **** 				case DECODE_TASK:
+ 633:Src/main.c    **** 					if (CheckChecksum(COMMAND))
+ 634:Src/main.c    **** 					{
+ 635:Src/main.c    **** 						Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
+ 636:Src/main.c    **** 						TO6_before = TO6;
+ 637:Src/main.c    **** 						CPU_state = RUN_TASK;
+ 638:Src/main.c    **** 						CPU_state_old = RUN_TASK;//Save main current cycle
+ 639:Src/main.c    **** 					}
+ 640:Src/main.c    **** 					else
+ 641:Src/main.c    **** 					{
+ 642:Src/main.c    **** 						State_Data[0] |= UART_DECODE_ERR;
+ 643:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ 644:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
+ 645:Src/main.c    **** 					}
+ 646:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 647:Src/main.c    **** 				break;
+ 648:Src/main.c    **** 				case RUN_TASK:
+ 649:Src/main.c    **** 					switch (task.task_type)
+ 650:Src/main.c    **** 					{
+ 651:Src/main.c    **** 					case TT_CHANGE_CURR_1:
+ 652:Src/main.c    **** 
+ 653:Src/main.c    **** 
+ 654:Src/main.c    **** 						//calculating timer periods for ADC clock and Mach-Zander modulator
+ 655:Src/main.c    **** 						//ADC clock
+ 656:Src/main.c    **** 						//TIM4 -> ARR = 60; // for 1.5 MHz
+ 657:Src/main.c    **** 						//TIM4 -> ARR = 91; // for 1 MHz
+ 658:Src/main.c    **** 						//TIM4 -> ARR = 45; // for 2 MHz
+ 659:Src/main.c    **** 
+ 660:Src/main.c    **** 						//online calculation for debug purposes:
+ 661:Src/main.c    **** 						//manually varying TIM4 -> ARR by debugger while running
+ 662:Src/main.c    **** 						//TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
+ 663:Src/main.c    **** 
+ 664:Src/main.c    **** 
+ 665:Src/main.c    **** 						//Mach-Zander clock (should be half of ADC clock freq)
+ 666:Src/main.c    **** 						//TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1;
+ 667:Src/main.c    **** 						//TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
  668:Src/main.c    **** 
  669:Src/main.c    **** 
  670:Src/main.c    **** 
- 671:Src/main.c    **** 						Stop_TIM10();
- 672:Src/main.c    **** 
- 673:Src/main.c    **** 						task.current_param = task.min_param;
- 674:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
-ARM GAS  /tmp/ccwR4KB7.s 			page 51
+ 671:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.curr);
+ 672:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 673:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 674:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ARM GAS  /tmp/ccEQxcUB.s 			page 51
 
 
- 675:Src/main.c    **** 						if (task.tau > 3)
- 676:Src/main.c    **** 						{
- 677:Src/main.c    **** 							TIM10_period = htim10.Init.Period;
- 678:Src/main.c    **** 							htim10.Init.Period = 9999;
- 679:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
- 680:Src/main.c    **** 						}
- 681:Src/main.c    **** 						HAL_TIM_Base_Start_IT(&htim10);
- 682:Src/main.c    **** 					break;
- 683:Src/main.c    **** 					case TT_CHANGE_CURR_2:
- 684:Src/main.c    **** 						//Blink laser 2
- 685:Src/main.c    **** //*
- 686:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- 687:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 688:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 689:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 690:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 691:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 692:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 693:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 694:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 675:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 676:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 677:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 678:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 679:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 680:Src/main.c    **** 
+ 681:Src/main.c    **** 						// Toggle pin for oscilloscope
+ 682:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc
+ 683:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 684:Src/main.c    **** 		
+ 685:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim10);
+ 686:Src/main.c    **** 						if (st != HAL_OK)
+ 687:Src/main.c    **** 							while(1);
+ 688:Src/main.c    **** 
+ 689:Src/main.c    **** 						uint16_t step_counter = 0;
+ 690:Src/main.c    **** 						uint16_t trigger_counter = 0;
+ 691:Src/main.c    **** 						uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
+ 692:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 693:Src/main.c    **** 
+ 694:Src/main.c    **** 
  695:Src/main.c    **** 
- 696:Src/main.c    **** 						LD_blinker.task_type = 2;
- 697:Src/main.c    **** 						LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
- 698:Src/main.c    **** 						//LD_blinker.param = task.current_param;
- 699:Src/main.c    **** 						LD_blinker.param = 0;
- 700:Src/main.c    **** 						LD_blinker.param = 1000; // LD2 current (in unspecified units)
- 701:Src/main.c    **** 						LD_blinker.signal_port = OUT_9_GPIO_Port;
- 702:Src/main.c    **** 						LD_blinker.signal_pin = OUT_9_Pin;
- 703:Src/main.c    **** 
- 704:Src/main.c    **** 						TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units).
- 705:Src/main.c    **** 											//When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
- 706:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim8);
- 707:Src/main.c    **** 						if (st != HAL_OK)
- 708:Src/main.c    **** 							while(1);
- 709:Src/main.c    **** //						*/
- 710:Src/main.c    **** 
- 711:Src/main.c    **** 						// Toggle pin for oscilloscope
- 712:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 713:Src/main.c    **** 						uint32_t i = 10000; while (--i){}
- 714:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 715:Src/main.c    **** 						LD_blinker.state = 2;
- 716:Src/main.c    **** 
- 717:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim10);
- 718:Src/main.c    **** 						if (st != HAL_OK)
- 719:Src/main.c    **** 							while(1);
- 720:Src/main.c    **** 						while (task.current_param < task.max_param)
- 721:Src/main.c    **** 						{
- 722:Src/main.c    **** 							if (TIM10_coflag)
- 723:Src/main.c    **** 							{
- 724:Src/main.c    **** 								//Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 725:Src/main.c    **** 								//LD_blinker.param = task.current_param;
- 726:Src/main.c    **** 								//++LD_blinker.param;
- 727:Src/main.c    **** 								task.current_param += task.delta_param;
- 728:Src/main.c    **** 								TO10 = 0;
- 729:Src/main.c    **** 								TIM10_coflag = 0;
- 730:Src/main.c    **** 
- 731:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 52
+ 696:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
+ 697:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
+ 698:Src/main.c    **** 						TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode
+ 699:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
+ 700:Src/main.c    **** 
+ 701:Src/main.c    **** 
+ 702:Src/main.c    **** 
+ 703:Src/main.c    **** 						TIM11 -> CNT = 0;
+ 704:Src/main.c    **** 						TIM4 -> CNT = 0;
+ 705:Src/main.c    **** 
+ 706:Src/main.c    **** 						HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
+ 707:Src/main.c    **** 						HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock
+ 708:Src/main.c    **** 						//TIM4 -> CNT = 0;
+ 709:Src/main.c    **** 
+ 710:Src/main.c    **** 						TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de
+ 711:Src/main.c    **** 						TIM11 -> CNT = 0;
+ 712:Src/main.c    **** 
+ 713:Src/main.c    **** 
+ 714:Src/main.c    **** 						while (task.current_param < task.max_param)
+ 715:Src/main.c    **** 						{
+ 716:Src/main.c    **** 							if (TIM10_coflag)
+ 717:Src/main.c    **** 							{
+ 718:Src/main.c    **** 								Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
+ 719:Src/main.c    **** 								//TIM11 -> CNT = 0; // to link modulator phase
+ 720:Src/main.c    **** 								//TIM4 -> CNT = 0; // to link ADC clock phase
+ 721:Src/main.c    **** 								task.current_param += task.delta_param;
+ 722:Src/main.c    **** 								TO10 = 0;
+ 723:Src/main.c    **** 								TIM10_coflag = 0;
+ 724:Src/main.c    **** 								
+ 725:Src/main.c    **** 								HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t
+ 726:Src/main.c    **** 								HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
+ 727:Src/main.c    **** //*
+ 728:Src/main.c    **** 								if (step_counter % trigger_step == 0){ //trigger at every 60 step
+ 729:Src/main.c    **** 									OUT_trigger(trigger_counter);
+ 730:Src/main.c    **** 									++trigger_counter;
+ 731:Src/main.c    **** 								}
+ARM GAS  /tmp/ccEQxcUB.s 			page 52
 
 
- 732:Src/main.c    **** 							}
- 733:Src/main.c    **** 						}
- 734:Src/main.c    **** 						HAL_TIM_Base_Stop(&htim10);
- 735:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 736:Src/main.c    **** 
- 737:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 738:Src/main.c    **** 
- 739:Src/main.c    **** 						HAL_TIM_Base_Stop_IT(&htim8);
- 740:Src/main.c    **** 						TIM8->CNT = 0;
- 741:Src/main.c    **** 
- 742:Src/main.c    **** 						Stop_TIM10();
- 743:Src/main.c    **** 						task.current_param = task.min_param;
- 744:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 745:Src/main.c    **** 						if (task.tau > 3)
- 746:Src/main.c    **** 						{
- 747:Src/main.c    **** 							TIM10_period = htim10.Init.Period;
- 748:Src/main.c    **** 							htim10.Init.Period = 9999;
- 749:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
- 750:Src/main.c    **** 						}
- 751:Src/main.c    **** 						HAL_TIM_Base_Start_IT(&htim10);
- 752:Src/main.c    **** 
- 753:Src/main.c    **** 
+ 732:Src/main.c    **** 								++step_counter;
+ 733:Src/main.c    **** //*/
+ 734:Src/main.c    **** /*
+ 735:Src/main.c    **** 								++task_sheduler;
+ 736:Src/main.c    **** 								if (task_sheduler >= 10){
+ 737:Src/main.c    **** 									task_sheduler = 0;
+ 738:Src/main.c    **** 								}
+ 739:Src/main.c    **** 								//maintain stable temperature of laser 2
+ 740:Src/main.c    **** 								if (task_sheduler == 0){
+ 741:Src/main.c    **** 									(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 742:Src/main.c    **** 									LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 743:Src/main.c    **** 									temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 744:Src/main.c    **** 									Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 745:Src/main.c    **** 								}
+ 746:Src/main.c    **** 								//maintain stable temperature of laser 1
+ 747:Src/main.c    **** 								//*
+ 748:Src/main.c    **** 								if (task_sheduler == 5){
+ 749:Src/main.c    **** 									(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 750:Src/main.c    **** 									LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 751:Src/main.c    **** 									temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 752:Src/main.c    **** 									Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 753:Src/main.c    **** 								}
  754:Src/main.c    **** //*/
- 755:Src/main.c    **** 
- 756:Src/main.c    **** 						/*  // Backup
- 757:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- 758:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 759:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 760:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 761:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 762:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 763:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 764:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 765:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 755:Src/main.c    **** 							}
+ 756:Src/main.c    **** 						}
+ 757:Src/main.c    **** 						TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o
+ 758:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
+ 759:Src/main.c    **** 						//TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda
+ 760:Src/main.c    **** 						//but one-pulse mode should be disabled
+ 761:Src/main.c    **** 
+ 762:Src/main.c    **** 						//HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
+ 763:Src/main.c    **** 						//HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
+ 764:Src/main.c    **** 
+ 765:Src/main.c    **** 
  766:Src/main.c    **** 
- 767:Src/main.c    **** 						// Toggle pin for oscilloscope
- 768:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 769:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 770:Src/main.c    **** 
- 771:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim10);
- 772:Src/main.c    **** 						if (st != HAL_OK)
- 773:Src/main.c    **** 							while(1);
- 774:Src/main.c    **** 						while (task.current_param < task.max_param)
- 775:Src/main.c    **** 						{
- 776:Src/main.c    **** 							if (TIM10_coflag)
- 777:Src/main.c    **** 							{
- 778:Src/main.c    **** 								Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 779:Src/main.c    **** 								task.current_param += task.delta_param;
- 780:Src/main.c    **** 								TO10 = 0;
- 781:Src/main.c    **** 								TIM10_coflag = 0;
- 782:Src/main.c    **** 
- 783:Src/main.c    **** 
- 784:Src/main.c    **** 							}
- 785:Src/main.c    **** 						}
- 786:Src/main.c    **** 						Stop_TIM10();
- 787:Src/main.c    **** 						task.current_param = task.min_param;
- 788:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
-ARM GAS  /tmp/ccwR4KB7.s 			page 53
+ 767:Src/main.c    **** 						Stop_TIM10();
+ 768:Src/main.c    **** 
+ 769:Src/main.c    **** 						task.current_param = task.min_param;
+ 770:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
+ 771:Src/main.c    **** 						if (task.tau > 3)
+ 772:Src/main.c    **** 						{
+ 773:Src/main.c    **** 							TIM10_period = htim10.Init.Period;
+ 774:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 775:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
+ 776:Src/main.c    **** 						}
+ 777:Src/main.c    **** 						HAL_TIM_Base_Start_IT(&htim10);
+ 778:Src/main.c    **** 					break;
+ 779:Src/main.c    **** 					case TT_CHANGE_CURR_2:
+ 780:Src/main.c    **** 						//Blink laser 2
+ 781:Src/main.c    **** //*
+ 782:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.curr);
+ 783:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 784:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 785:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 786:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 787:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 788:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ARM GAS  /tmp/ccEQxcUB.s 			page 53
 
 
- 789:Src/main.c    **** 						if (task.tau > 3)
- 790:Src/main.c    **** 						{
- 791:Src/main.c    **** 							TIM10_period = htim10.Init.Period;
- 792:Src/main.c    **** 							htim10.Init.Period = 9999;
- 793:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
- 794:Src/main.c    **** 						}
- 795:Src/main.c    **** 						HAL_TIM_Base_Start_IT(&htim10);
- 796:Src/main.c    **** 						*/
- 797:Src/main.c    **** 
- 798:Src/main.c    **** 
- 799:Src/main.c    **** 					break;
- 800:Src/main.c    **** 					case TT_CHANGE_TEMP_1:
- 801:Src/main.c    **** 						// isn't implemented
- 802:Src/main.c    **** 					break;
- 803:Src/main.c    **** 					case TT_CHANGE_TEMP_2:
- 804:Src/main.c    **** 						// isn't implemented
- 805:Src/main.c    **** 					break;
- 806:Src/main.c    **** 					}
- 807:Src/main.c    **** 	
- 808:Src/main.c    **** 					if (TO7>TO7_before)
- 809:Src/main.c    **** 					{
- 810:Src/main.c    **** 						TO7_before = TO7;
- 811:Src/main.c    **** 						
- 812:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 813:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 814:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 815:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 816:Src/main.c    **** 						
- 817:Src/main.c    **** 						Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
- 818:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 819:Src/main.c    **** 	
- 820:Src/main.c    **** 						//Prepare DATA of internals ADCs
- 821:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 822:Src/main.c    **** 						temp16 = Get_ADC(0);
- 823:Src/main.c    **** 						temp16 = Get_ADC(1);
- 824:Src/main.c    **** 						Long_Data[7] = temp16;
- 825:Src/main.c    **** 						
- 826:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 827:Src/main.c    **** 						temp16 = Get_ADC(1);
- 828:Src/main.c    **** 						Long_Data[8] = temp16;
- 829:Src/main.c    **** 						
- 830:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 831:Src/main.c    **** 						temp16 = Get_ADC(1);
- 832:Src/main.c    **** 						Long_Data[9] = temp16;
- 833:Src/main.c    **** 						
- 834:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 835:Src/main.c    **** 						temp16 = Get_ADC(1);
- 836:Src/main.c    **** 						Long_Data[10] = temp16;
- 837:Src/main.c    **** 						
- 838:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 839:Src/main.c    **** 						temp16 = Get_ADC(1);
- 840:Src/main.c    **** 						Long_Data[11] = temp16;
- 841:Src/main.c    **** 						temp16 = Get_ADC(2);
- 842:Src/main.c    **** 						
- 843:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
- 844:Src/main.c    **** 						temp16 = Get_ADC(3);
- 845:Src/main.c    **** 						temp16 = Get_ADC(4);
-ARM GAS  /tmp/ccwR4KB7.s 			page 54
+ 789:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 790:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 791:Src/main.c    **** 
+ 792:Src/main.c    **** 						LD_blinker.task_type = 2;
+ 793:Src/main.c    **** 						LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
+ 794:Src/main.c    **** 						//LD_blinker.param = task.current_param;
+ 795:Src/main.c    **** 						LD_blinker.param = 0;
+ 796:Src/main.c    **** 						LD_blinker.param = 1000; // LD2 current (in unspecified units)
+ 797:Src/main.c    **** 						LD_blinker.signal_port = OUT_9_GPIO_Port;
+ 798:Src/main.c    **** 						LD_blinker.signal_pin = OUT_9_Pin;
+ 799:Src/main.c    **** 
+ 800:Src/main.c    **** 						TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units).
+ 801:Src/main.c    **** 											//When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
+ 802:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim8);
+ 803:Src/main.c    **** 						if (st != HAL_OK)
+ 804:Src/main.c    **** 							while(1);
+ 805:Src/main.c    **** //						*/
+ 806:Src/main.c    **** 
+ 807:Src/main.c    **** 						// Toggle pin for oscilloscope
+ 808:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
+ 809:Src/main.c    **** 						uint32_t i = 10000; while (--i){}
+ 810:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 811:Src/main.c    **** 						LD_blinker.state = 2;
+ 812:Src/main.c    **** 
+ 813:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim10);
+ 814:Src/main.c    **** 						if (st != HAL_OK)
+ 815:Src/main.c    **** 							while(1);
+ 816:Src/main.c    **** 						while (task.current_param < task.max_param)
+ 817:Src/main.c    **** 						{
+ 818:Src/main.c    **** 							if (TIM10_coflag)
+ 819:Src/main.c    **** 							{
+ 820:Src/main.c    **** 								//Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
+ 821:Src/main.c    **** 								//LD_blinker.param = task.current_param;
+ 822:Src/main.c    **** 								//++LD_blinker.param;
+ 823:Src/main.c    **** 								task.current_param += task.delta_param;
+ 824:Src/main.c    **** 								TO10 = 0;
+ 825:Src/main.c    **** 								TIM10_coflag = 0;
+ 826:Src/main.c    **** 
+ 827:Src/main.c    **** 
+ 828:Src/main.c    **** 							}
+ 829:Src/main.c    **** 						}
+ 830:Src/main.c    **** 						HAL_TIM_Base_Stop(&htim10);
+ 831:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
+ 832:Src/main.c    **** 
+ 833:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 834:Src/main.c    **** 
+ 835:Src/main.c    **** 						HAL_TIM_Base_Stop_IT(&htim8);
+ 836:Src/main.c    **** 						TIM8->CNT = 0;
+ 837:Src/main.c    **** 
+ 838:Src/main.c    **** 						Stop_TIM10();
+ 839:Src/main.c    **** 						task.current_param = task.min_param;
+ 840:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
+ 841:Src/main.c    **** 						if (task.tau > 3)
+ 842:Src/main.c    **** 						{
+ 843:Src/main.c    **** 							TIM10_period = htim10.Init.Period;
+ 844:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 845:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
+ARM GAS  /tmp/ccEQxcUB.s 			page 54
 
 
- 846:Src/main.c    **** 						Long_Data[12] = temp16;
- 847:Src/main.c    **** 						temp16 = Get_ADC(5);
- 848:Src/main.c    **** 													
- 849:Src/main.c    **** 						//Put the timer tick to Long_Data:
- 850:Src/main.c    **** 						TO6_stop = TO6;
- 851:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
- 852:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
- 853:Src/main.c    **** 						
- 854:Src/main.c    **** 						//Put the average temperature of LD1 to Long_Data:
- 855:Src/main.c    **** 						Long_Data[5] = LD1_param.LD_CURR_TEMP;
- 856:Src/main.c    **** 						
- 857:Src/main.c    **** 						//Put the average temperature of LD2 to Long_Data:
- 858:Src/main.c    **** 						Long_Data[6] = LD2_param.LD_CURR_TEMP;
- 859:Src/main.c    **** 					}
- 860:Src/main.c    **** 					while (!TIM10_coflag);
- 861:Src/main.c    **** 					
- 862:Src/main.c    **** 					Stop_TIM10();
- 863:Src/main.c    **** 					
- 864:Src/main.c    **** 					if (task.tau > 3)
- 865:Src/main.c    **** 					{
- 866:Src/main.c    **** 						htim10.Init.Period = TIM10_period;
- 867:Src/main.c    **** 						TO10_counter = task.dt / 10;
- 868:Src/main.c    **** 					}
- 869:Src/main.c    **** 					
- 870:Src/main.c    **** 					CPU_state_old = RUN_TASK;
- 871:Src/main.c    ****         break;
- 872:Src/main.c    **** 			}
- 873:Src/main.c    **** 			
- 874:Src/main.c    **** 		switch (UART_transmission_request)
- 875:Src/main.c    **** 		{
- 876:Src/main.c    **** 			case MESS_01://Default state
- 877:Src/main.c    **** 				USART_TX(State_Data,2);
- 878:Src/main.c    **** 				//HAL_UART_Transmit(&huart1, State_Data, 2, 10);
- 879:Src/main.c    **** 				State_Data[0]=0;
- 880:Src/main.c    **** 				State_Data[1]=0;//All OK!
- 881:Src/main.c    **** 				UART_transmission_request = NO_MESS;
- 882:Src/main.c    **** 			break;
- 883:Src/main.c    **** 			case MESS_02://Transmith packet
- 884:Src/main.c    **** 				
- 885:Src/main.c    **** 				//Find CS and put to Long_Data:
- 886:Src/main.c    **** 				CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
- 887:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
- 888:Src/main.c    **** 				
- 889:Src/main.c    **** 				for (uint16_t i = 0; i < DL_16; i++)
- 890:Src/main.c    **** 				{
- 891:Src/main.c    **** 					UART_DATA[i*2] = (Long_Data[i])&0xff;
- 892:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 893:Src/main.c    **** 				}
- 894:Src/main.c    **** 				//HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
- 895:Src/main.c    **** 				//HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- 896:Src/main.c    **** 				//HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
- 897:Src/main.c    **** 				//huart1.gState = HAL_UART_STATE_READY;
- 898:Src/main.c    **** 				//hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
- 899:Src/main.c    **** 				USART_TX_DMA (DL_8);//Send data by USART using DMA
- 900:Src/main.c    **** 				UART_transmission_request = NO_MESS;
- 901:Src/main.c    **** 			break;
- 902:Src/main.c    **** 			case MESS_03://Transmith saved packet
-ARM GAS  /tmp/ccwR4KB7.s 			page 55
+ 846:Src/main.c    **** 						}
+ 847:Src/main.c    **** 						HAL_TIM_Base_Start_IT(&htim10);
+ 848:Src/main.c    **** 
+ 849:Src/main.c    **** 
+ 850:Src/main.c    **** //*/
+ 851:Src/main.c    **** 
+ 852:Src/main.c    **** 						/*  // Backup
+ 853:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.curr);
+ 854:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 855:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 856:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 857:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 858:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 859:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 860:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 861:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 862:Src/main.c    **** 
+ 863:Src/main.c    **** 						// Toggle pin for oscilloscope
+ 864:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
+ 865:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 866:Src/main.c    **** 
+ 867:Src/main.c    **** 						st = HAL_TIM_Base_Start_IT(&htim10);
+ 868:Src/main.c    **** 						if (st != HAL_OK)
+ 869:Src/main.c    **** 							while(1);
+ 870:Src/main.c    **** 						while (task.current_param < task.max_param)
+ 871:Src/main.c    **** 						{
+ 872:Src/main.c    **** 							if (TIM10_coflag)
+ 873:Src/main.c    **** 							{
+ 874:Src/main.c    **** 								Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
+ 875:Src/main.c    **** 								task.current_param += task.delta_param;
+ 876:Src/main.c    **** 								TO10 = 0;
+ 877:Src/main.c    **** 								TIM10_coflag = 0;
+ 878:Src/main.c    **** 
+ 879:Src/main.c    **** 
+ 880:Src/main.c    **** 							}
+ 881:Src/main.c    **** 						}
+ 882:Src/main.c    **** 						Stop_TIM10();
+ 883:Src/main.c    **** 						task.current_param = task.min_param;
+ 884:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
+ 885:Src/main.c    **** 						if (task.tau > 3)
+ 886:Src/main.c    **** 						{
+ 887:Src/main.c    **** 							TIM10_period = htim10.Init.Period;
+ 888:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 889:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
+ 890:Src/main.c    **** 						}
+ 891:Src/main.c    **** 						HAL_TIM_Base_Start_IT(&htim10);
+ 892:Src/main.c    **** 						*/
+ 893:Src/main.c    **** 
+ 894:Src/main.c    **** 
+ 895:Src/main.c    **** 					break;
+ 896:Src/main.c    **** 					case TT_CHANGE_TEMP_1:
+ 897:Src/main.c    **** 						// isn't implemented
+ 898:Src/main.c    **** 					break;
+ 899:Src/main.c    **** 					case TT_CHANGE_TEMP_2:
+ 900:Src/main.c    **** 						// isn't implemented
+ 901:Src/main.c    **** 					break;
+ 902:Src/main.c    **** 					}
+ARM GAS  /tmp/ccEQxcUB.s 			page 55
 
 
- 903:Src/main.c    **** 				for (uint16_t i = 0; i < DL_16; i++)
- 904:Src/main.c    **** 				{
- 905:Src/main.c    **** 					UART_DATA[i*2] = (Long_Data[i])&0xff;
- 906:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 907:Src/main.c    **** 				}
- 908:Src/main.c    **** 				//HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- 909:Src/main.c    **** 				//HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
- 910:Src/main.c    **** 				//huart1.gState = HAL_UART_STATE_READY;
- 911:Src/main.c    **** 				//hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
- 912:Src/main.c    **** 				USART_TX_DMA (DL_8);//Send data by USART using DMA
- 913:Src/main.c    **** 				UART_transmission_request = NO_MESS;
- 914:Src/main.c    **** 			break;			
- 915:Src/main.c    **** 		}
- 916:Src/main.c    ****     if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of 
- 917:Src/main.c    **** 		{
- 918:Src/main.c    **** 			UART_rec_incr = 0;//Reset uart command counter
- 919:Src/main.c    **** 			State_Data[0] |= UART_ERR;//timeout error!
- 920:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
- 921:Src/main.c    **** 			flg_tmt = 0;//Reset timeout flag
- 922:Src/main.c    **** 		}
- 923:Src/main.c    ****     /* USER CODE END WHILE */
- 924:Src/main.c    **** 
- 925:Src/main.c    ****     /* USER CODE BEGIN 3 */
- 926:Src/main.c    ****   }
- 927:Src/main.c    ****   /* USER CODE END 3 */
- 928:Src/main.c    **** }
- 929:Src/main.c    **** 
- 930:Src/main.c    **** /**
- 931:Src/main.c    ****   * @brief System Clock Configuration
- 932:Src/main.c    ****   * @retval None
- 933:Src/main.c    ****   */
- 934:Src/main.c    **** void SystemClock_Config(void)
- 935:Src/main.c    **** {
- 936:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 937:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 938:Src/main.c    **** 
- 939:Src/main.c    ****   /** Configure the main internal regulator output voltage
- 940:Src/main.c    ****   */
- 941:Src/main.c    ****   __HAL_RCC_PWR_CLK_ENABLE();
- 942:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 943:Src/main.c    **** 
- 944:Src/main.c    ****   /** Initializes the RCC Oscillators according to the specified parameters
- 945:Src/main.c    ****   * in the RCC_OscInitTypeDef structure.
- 946:Src/main.c    ****   */
- 947:Src/main.c    ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- 948:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 949:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 950:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 951:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = 25;
- 952:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 368;
- 953:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 954:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = 8;
- 955:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = 2;
- 956:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 957:Src/main.c    ****   {
- 958:Src/main.c    ****     Error_Handler();
- 959:Src/main.c    ****   }
-ARM GAS  /tmp/ccwR4KB7.s 			page 56
+ 903:Src/main.c    **** 	
+ 904:Src/main.c    **** 					if (TO7>TO7_before)
+ 905:Src/main.c    **** 					{
+ 906:Src/main.c    **** 						TO7_before = TO7;
+ 907:Src/main.c    **** 						
+ 908:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 909:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 910:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 911:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 912:Src/main.c    **** 						
+ 913:Src/main.c    **** 						Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
+ 914:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ 915:Src/main.c    **** 	
+ 916:Src/main.c    **** 						//Prepare DATA of internals ADCs
+ 917:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 918:Src/main.c    **** 						temp16 = Get_ADC(0);
+ 919:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 920:Src/main.c    **** 						Long_Data[7] = temp16;
+ 921:Src/main.c    **** 						
+ 922:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 923:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 924:Src/main.c    **** 						Long_Data[8] = temp16;
+ 925:Src/main.c    **** 						
+ 926:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 927:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 928:Src/main.c    **** 						Long_Data[9] = temp16;
+ 929:Src/main.c    **** 						
+ 930:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 931:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 932:Src/main.c    **** 						Long_Data[10] = temp16;
+ 933:Src/main.c    **** 						
+ 934:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 935:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 936:Src/main.c    **** 						Long_Data[11] = temp16;
+ 937:Src/main.c    **** 						temp16 = Get_ADC(2);
+ 938:Src/main.c    **** 						
+ 939:Src/main.c    **** 						//Put the temperature of LD2 to Long_Data:
+ 940:Src/main.c    **** 						temp16 = Get_ADC(3);
+ 941:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 942:Src/main.c    **** 						Long_Data[12] = temp16;
+ 943:Src/main.c    **** 						temp16 = Get_ADC(5);
+ 944:Src/main.c    **** 													
+ 945:Src/main.c    **** 						//Put the timer tick to Long_Data:
+ 946:Src/main.c    **** 						TO6_stop = TO6;
+ 947:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
+ 948:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
+ 949:Src/main.c    **** 						
+ 950:Src/main.c    **** 						//Put the average temperature of LD1 to Long_Data:
+ 951:Src/main.c    **** 						Long_Data[5] = LD1_param.LD_CURR_TEMP;
+ 952:Src/main.c    **** 						
+ 953:Src/main.c    **** 						//Put the average temperature of LD2 to Long_Data:
+ 954:Src/main.c    **** 						Long_Data[6] = LD2_param.LD_CURR_TEMP;
+ 955:Src/main.c    **** 					}
+ 956:Src/main.c    **** 					while (!TIM10_coflag);
+ 957:Src/main.c    **** 					
+ 958:Src/main.c    **** 					Stop_TIM10();
+ 959:Src/main.c    **** 					
+ARM GAS  /tmp/ccEQxcUB.s 			page 56
 
 
- 960:Src/main.c    **** 
- 961:Src/main.c    ****   /** Activate the Over-Drive mode
- 962:Src/main.c    ****   */
- 963:Src/main.c    ****   if (HAL_PWREx_EnableOverDrive() != HAL_OK)
- 964:Src/main.c    ****   {
- 965:Src/main.c    ****     Error_Handler();
- 966:Src/main.c    ****   }
- 967:Src/main.c    **** 
- 968:Src/main.c    ****   /** Initializes the CPU, AHB and APB buses clocks
- 969:Src/main.c    ****   */
- 970:Src/main.c    ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 971:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- 972:Src/main.c    ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 973:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 974:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 975:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 976:Src/main.c    **** 
- 977:Src/main.c    ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
- 978:Src/main.c    ****   {
- 979:Src/main.c    ****     Error_Handler();
- 980:Src/main.c    ****   }
- 981:Src/main.c    **** }
- 982:Src/main.c    **** 
- 983:Src/main.c    **** /**
- 984:Src/main.c    ****   * @brief ADC1 Initialization Function
- 985:Src/main.c    ****   * @param None
- 986:Src/main.c    ****   * @retval None
- 987:Src/main.c    ****   */
- 988:Src/main.c    **** static void MX_ADC1_Init(void)
- 989:Src/main.c    **** {
- 990:Src/main.c    **** 
- 991:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 0 */
- 992:Src/main.c    **** 
- 993:Src/main.c    ****   /* USER CODE END ADC1_Init 0 */
- 994:Src/main.c    **** 
- 995:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
- 996:Src/main.c    **** 
- 997:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 1 */
- 998:Src/main.c    **** 
- 999:Src/main.c    ****   /* USER CODE END ADC1_Init 1 */
-1000:Src/main.c    **** 
-1001:Src/main.c    ****   /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
-1002:Src/main.c    ****   */
-1003:Src/main.c    ****   hadc1.Instance = ADC1;
-1004:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
-1005:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
-1006:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
-1007:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
-1008:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
-1009:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-1010:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-1011:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-1012:Src/main.c    ****   hadc1.Init.NbrOfConversion = 5;
-1013:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
-1014:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
-1015:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
-1016:Src/main.c    ****   {
-ARM GAS  /tmp/ccwR4KB7.s 			page 57
+ 960:Src/main.c    **** 					if (task.tau > 3)
+ 961:Src/main.c    **** 					{
+ 962:Src/main.c    **** 						htim10.Init.Period = TIM10_period;
+ 963:Src/main.c    **** 						TO10_counter = task.dt / 10;
+ 964:Src/main.c    **** 					}
+ 965:Src/main.c    **** 					
+ 966:Src/main.c    **** 					CPU_state_old = RUN_TASK;
+ 967:Src/main.c    ****         break;
+ 968:Src/main.c    **** 			}
+ 969:Src/main.c    **** 			
+ 970:Src/main.c    **** 		switch (UART_transmission_request)
+ 971:Src/main.c    **** 		{
+ 972:Src/main.c    **** 			case MESS_01://Default state
+ 973:Src/main.c    **** 				USART_TX(State_Data,2);
+ 974:Src/main.c    **** 				//HAL_UART_Transmit(&huart1, State_Data, 2, 10);
+ 975:Src/main.c    **** 				State_Data[0]=0;
+ 976:Src/main.c    **** 				State_Data[1]=0;//All OK!
+ 977:Src/main.c    **** 				UART_transmission_request = NO_MESS;
+ 978:Src/main.c    **** 			break;
+ 979:Src/main.c    **** 			case MESS_02://Transmith packet
+ 980:Src/main.c    **** 				
+ 981:Src/main.c    **** 				//Find CS and put to Long_Data:
+ 982:Src/main.c    **** 				CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
+ 983:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
+ 984:Src/main.c    **** 				
+ 985:Src/main.c    **** 				for (uint16_t i = 0; i < DL_16; i++)
+ 986:Src/main.c    **** 				{
+ 987:Src/main.c    **** 					UART_DATA[i*2] = (Long_Data[i])&0xff;
+ 988:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 989:Src/main.c    **** 				}
+ 990:Src/main.c    **** 				//HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
+ 991:Src/main.c    **** 				//HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
+ 992:Src/main.c    **** 				//HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
+ 993:Src/main.c    **** 				//huart1.gState = HAL_UART_STATE_READY;
+ 994:Src/main.c    **** 				//hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
+ 995:Src/main.c    **** 				USART_TX_DMA (DL_8);//Send data by USART using DMA
+ 996:Src/main.c    **** 				UART_transmission_request = NO_MESS;
+ 997:Src/main.c    **** 			break;
+ 998:Src/main.c    **** 			case MESS_03://Transmith saved packet
+ 999:Src/main.c    **** 				for (uint16_t i = 0; i < DL_16; i++)
+1000:Src/main.c    **** 				{
+1001:Src/main.c    **** 					UART_DATA[i*2] = (Long_Data[i])&0xff;
+1002:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+1003:Src/main.c    **** 				}
+1004:Src/main.c    **** 				//HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
+1005:Src/main.c    **** 				//HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
+1006:Src/main.c    **** 				//huart1.gState = HAL_UART_STATE_READY;
+1007:Src/main.c    **** 				//hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
+1008:Src/main.c    **** 				USART_TX_DMA (DL_8);//Send data by USART using DMA
+1009:Src/main.c    **** 				UART_transmission_request = NO_MESS;
+1010:Src/main.c    **** 			break;			
+1011:Src/main.c    **** 		}
+1012:Src/main.c    ****     if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of 
+1013:Src/main.c    **** 		{
+1014:Src/main.c    **** 			UART_rec_incr = 0;//Reset uart command counter
+1015:Src/main.c    **** 			State_Data[0] |= UART_ERR;//timeout error!
+1016:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
+ARM GAS  /tmp/ccEQxcUB.s 			page 57
 
 
-1017:Src/main.c    ****     Error_Handler();
-1018:Src/main.c    ****   }
-1019:Src/main.c    **** 
-1020:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1021:Src/main.c    ****   */
-1022:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_9;
-1023:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
-1024:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
-1025:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1026:Src/main.c    ****   {
-1027:Src/main.c    ****     Error_Handler();
-1028:Src/main.c    ****   }
-1029:Src/main.c    **** 
-1030:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1031:Src/main.c    ****   */
-1032:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_8;
-1033:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
-1034:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1035:Src/main.c    ****   {
-1036:Src/main.c    ****     Error_Handler();
-1037:Src/main.c    ****   }
-1038:Src/main.c    **** 
-1039:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1040:Src/main.c    ****   */
-1041:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_2;
-1042:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
-1043:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1044:Src/main.c    ****   {
-1045:Src/main.c    ****     Error_Handler();
-1046:Src/main.c    ****   }
-1047:Src/main.c    **** 
-1048:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1049:Src/main.c    ****   */
-1050:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_10;
-1051:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
-1052:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+1017:Src/main.c    **** 			flg_tmt = 0;//Reset timeout flag
+1018:Src/main.c    **** 		}
+1019:Src/main.c    ****     /* USER CODE END WHILE */
+1020:Src/main.c    **** 
+1021:Src/main.c    ****     /* USER CODE BEGIN 3 */
+1022:Src/main.c    ****   }
+1023:Src/main.c    ****   /* USER CODE END 3 */
+1024:Src/main.c    **** }
+1025:Src/main.c    **** 
+1026:Src/main.c    **** /**
+1027:Src/main.c    ****   * @brief System Clock Configuration
+1028:Src/main.c    ****   * @retval None
+1029:Src/main.c    ****   */
+1030:Src/main.c    **** void SystemClock_Config(void)
+1031:Src/main.c    **** {
+1032:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+1033:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+1034:Src/main.c    **** 
+1035:Src/main.c    ****   /** Configure the main internal regulator output voltage
+1036:Src/main.c    ****   */
+1037:Src/main.c    ****   __HAL_RCC_PWR_CLK_ENABLE();
+1038:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+1039:Src/main.c    **** 
+1040:Src/main.c    ****   /** Initializes the RCC Oscillators according to the specified parameters
+1041:Src/main.c    ****   * in the RCC_OscInitTypeDef structure.
+1042:Src/main.c    ****   */
+1043:Src/main.c    ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+1044:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+1045:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+1046:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+1047:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = 25;
+1048:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 368;
+1049:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+1050:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = 8;
+1051:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = 2;
+1052:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 1053:Src/main.c    ****   {
 1054:Src/main.c    ****     Error_Handler();
 1055:Src/main.c    ****   }
 1056:Src/main.c    **** 
-1057:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+1057:Src/main.c    ****   /** Activate the Over-Drive mode
 1058:Src/main.c    ****   */
-1059:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_11;
-1060:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_5;
-1061:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1062:Src/main.c    ****   {
-1063:Src/main.c    ****     Error_Handler();
-1064:Src/main.c    ****   }
-1065:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 2 */
-1066:Src/main.c    **** 
-1067:Src/main.c    ****   /* USER CODE END ADC1_Init 2 */
-1068:Src/main.c    **** 
-1069:Src/main.c    **** }
-1070:Src/main.c    **** 
-1071:Src/main.c    **** /**
-1072:Src/main.c    ****   * @brief ADC3 Initialization Function
-1073:Src/main.c    ****   * @param None
-ARM GAS  /tmp/ccwR4KB7.s 			page 58
+1059:Src/main.c    ****   if (HAL_PWREx_EnableOverDrive() != HAL_OK)
+1060:Src/main.c    ****   {
+1061:Src/main.c    ****     Error_Handler();
+1062:Src/main.c    ****   }
+1063:Src/main.c    **** 
+1064:Src/main.c    ****   /** Initializes the CPU, AHB and APB buses clocks
+1065:Src/main.c    ****   */
+1066:Src/main.c    ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+1067:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+1068:Src/main.c    ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+1069:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+1070:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+1071:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+1072:Src/main.c    **** 
+1073:Src/main.c    ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
+ARM GAS  /tmp/ccEQxcUB.s 			page 58
 
 
-1074:Src/main.c    ****   * @retval None
-1075:Src/main.c    ****   */
-1076:Src/main.c    **** static void MX_ADC3_Init(void)
-1077:Src/main.c    **** {
+1074:Src/main.c    ****   {
+1075:Src/main.c    ****     Error_Handler();
+1076:Src/main.c    ****   }
+1077:Src/main.c    **** }
 1078:Src/main.c    **** 
-1079:Src/main.c    ****   /* USER CODE BEGIN ADC3_Init 0 */
-1080:Src/main.c    **** 
-1081:Src/main.c    ****   /* USER CODE END ADC3_Init 0 */
-1082:Src/main.c    **** 
-1083:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
-1084:Src/main.c    **** 
-1085:Src/main.c    ****   /* USER CODE BEGIN ADC3_Init 1 */
+1079:Src/main.c    **** /**
+1080:Src/main.c    ****   * @brief ADC1 Initialization Function
+1081:Src/main.c    ****   * @param None
+1082:Src/main.c    ****   * @retval None
+1083:Src/main.c    ****   */
+1084:Src/main.c    **** static void MX_ADC1_Init(void)
+1085:Src/main.c    **** {
 1086:Src/main.c    **** 
-1087:Src/main.c    ****   /* USER CODE END ADC3_Init 1 */
+1087:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 0 */
 1088:Src/main.c    **** 
-1089:Src/main.c    ****   /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
-1090:Src/main.c    ****   */
-1091:Src/main.c    ****   hadc3.Instance = ADC3;
-1092:Src/main.c    ****   hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
-1093:Src/main.c    ****   hadc3.Init.Resolution = ADC_RESOLUTION_12B;
-1094:Src/main.c    ****   hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
-1095:Src/main.c    ****   hadc3.Init.ContinuousConvMode = DISABLE;
-1096:Src/main.c    ****   hadc3.Init.DiscontinuousConvMode = DISABLE;
-1097:Src/main.c    ****   hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-1098:Src/main.c    ****   hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-1099:Src/main.c    ****   hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-1100:Src/main.c    ****   hadc3.Init.NbrOfConversion = 1;
-1101:Src/main.c    ****   hadc3.Init.DMAContinuousRequests = DISABLE;
-1102:Src/main.c    ****   hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
-1103:Src/main.c    ****   if (HAL_ADC_Init(&hadc3) != HAL_OK)
-1104:Src/main.c    ****   {
-1105:Src/main.c    ****     Error_Handler();
-1106:Src/main.c    ****   }
-1107:Src/main.c    **** 
-1108:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1109:Src/main.c    ****   */
-1110:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_15;
-1111:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
-1112:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
-1113:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
-1114:Src/main.c    ****   {
-1115:Src/main.c    ****     Error_Handler();
-1116:Src/main.c    ****   }
-1117:Src/main.c    ****   /* USER CODE BEGIN ADC3_Init 2 */
-1118:Src/main.c    **** 
-1119:Src/main.c    ****   /* USER CODE END ADC3_Init 2 */
-1120:Src/main.c    **** 
-1121:Src/main.c    **** }
-1122:Src/main.c    **** 
-1123:Src/main.c    **** /**
-1124:Src/main.c    ****   * @brief SDMMC1 Initialization Function
-1125:Src/main.c    ****   * @param None
-1126:Src/main.c    ****   * @retval None
+1089:Src/main.c    ****   /* USER CODE END ADC1_Init 0 */
+1090:Src/main.c    **** 
+1091:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
+1092:Src/main.c    **** 
+1093:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 1 */
+1094:Src/main.c    **** 
+1095:Src/main.c    ****   /* USER CODE END ADC1_Init 1 */
+1096:Src/main.c    **** 
+1097:Src/main.c    ****   /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
+1098:Src/main.c    ****   */
+1099:Src/main.c    ****   hadc1.Instance = ADC1;
+1100:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+1101:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+1102:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+1103:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
+1104:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
+1105:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+1106:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+1107:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+1108:Src/main.c    ****   hadc1.Init.NbrOfConversion = 5;
+1109:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
+1110:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+1111:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
+1112:Src/main.c    ****   {
+1113:Src/main.c    ****     Error_Handler();
+1114:Src/main.c    ****   }
+1115:Src/main.c    **** 
+1116:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+1117:Src/main.c    ****   */
+1118:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_9;
+1119:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
+1120:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+1121:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+1122:Src/main.c    ****   {
+1123:Src/main.c    ****     Error_Handler();
+1124:Src/main.c    ****   }
+1125:Src/main.c    **** 
+1126:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
 1127:Src/main.c    ****   */
-1128:Src/main.c    **** static void MX_SDMMC1_SD_Init(void)
-1129:Src/main.c    **** {
-  95              		.loc 1 1129 1 is_stmt 1 view -0
-ARM GAS  /tmp/ccwR4KB7.s 			page 59
+1128:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_8;
+1129:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
+1130:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ARM GAS  /tmp/ccEQxcUB.s 			page 59
 
 
+1131:Src/main.c    ****   {
+1132:Src/main.c    ****     Error_Handler();
+1133:Src/main.c    ****   }
+1134:Src/main.c    **** 
+1135:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+1136:Src/main.c    ****   */
+1137:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_2;
+1138:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
+1139:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+1140:Src/main.c    ****   {
+1141:Src/main.c    ****     Error_Handler();
+1142:Src/main.c    ****   }
+1143:Src/main.c    **** 
+1144:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+1145:Src/main.c    ****   */
+1146:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_10;
+1147:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
+1148:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+1149:Src/main.c    ****   {
+1150:Src/main.c    ****     Error_Handler();
+1151:Src/main.c    ****   }
+1152:Src/main.c    **** 
+1153:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+1154:Src/main.c    ****   */
+1155:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_11;
+1156:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_5;
+1157:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+1158:Src/main.c    ****   {
+1159:Src/main.c    ****     Error_Handler();
+1160:Src/main.c    ****   }
+1161:Src/main.c    ****   /* USER CODE BEGIN ADC1_Init 2 */
+1162:Src/main.c    **** 
+1163:Src/main.c    ****   /* USER CODE END ADC1_Init 2 */
+1164:Src/main.c    **** 
+1165:Src/main.c    **** }
+1166:Src/main.c    **** 
+1167:Src/main.c    **** /**
+1168:Src/main.c    ****   * @brief ADC3 Initialization Function
+1169:Src/main.c    ****   * @param None
+1170:Src/main.c    ****   * @retval None
+1171:Src/main.c    ****   */
+1172:Src/main.c    **** static void MX_ADC3_Init(void)
+1173:Src/main.c    **** {
+1174:Src/main.c    **** 
+1175:Src/main.c    ****   /* USER CODE BEGIN ADC3_Init 0 */
+1176:Src/main.c    **** 
+1177:Src/main.c    ****   /* USER CODE END ADC3_Init 0 */
+1178:Src/main.c    **** 
+1179:Src/main.c    ****   ADC_ChannelConfTypeDef sConfig = {0};
+1180:Src/main.c    **** 
+1181:Src/main.c    ****   /* USER CODE BEGIN ADC3_Init 1 */
+1182:Src/main.c    **** 
+1183:Src/main.c    ****   /* USER CODE END ADC3_Init 1 */
+1184:Src/main.c    **** 
+1185:Src/main.c    ****   /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
+1186:Src/main.c    ****   */
+1187:Src/main.c    ****   hadc3.Instance = ADC3;
+ARM GAS  /tmp/ccEQxcUB.s 			page 60
+
+
+1188:Src/main.c    ****   hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+1189:Src/main.c    ****   hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+1190:Src/main.c    ****   hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+1191:Src/main.c    ****   hadc3.Init.ContinuousConvMode = DISABLE;
+1192:Src/main.c    ****   hadc3.Init.DiscontinuousConvMode = DISABLE;
+1193:Src/main.c    ****   hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+1194:Src/main.c    ****   hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+1195:Src/main.c    ****   hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+1196:Src/main.c    ****   hadc3.Init.NbrOfConversion = 1;
+1197:Src/main.c    ****   hadc3.Init.DMAContinuousRequests = DISABLE;
+1198:Src/main.c    ****   hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+1199:Src/main.c    ****   if (HAL_ADC_Init(&hadc3) != HAL_OK)
+1200:Src/main.c    ****   {
+1201:Src/main.c    ****     Error_Handler();
+1202:Src/main.c    ****   }
+1203:Src/main.c    **** 
+1204:Src/main.c    ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+1205:Src/main.c    ****   */
+1206:Src/main.c    ****   sConfig.Channel = ADC_CHANNEL_15;
+1207:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
+1208:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+1209:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+1210:Src/main.c    ****   {
+1211:Src/main.c    ****     Error_Handler();
+1212:Src/main.c    ****   }
+1213:Src/main.c    ****   /* USER CODE BEGIN ADC3_Init 2 */
+1214:Src/main.c    **** 
+1215:Src/main.c    ****   /* USER CODE END ADC3_Init 2 */
+1216:Src/main.c    **** 
+1217:Src/main.c    **** }
+1218:Src/main.c    **** 
+1219:Src/main.c    **** /**
+1220:Src/main.c    ****   * @brief SDMMC1 Initialization Function
+1221:Src/main.c    ****   * @param None
+1222:Src/main.c    ****   * @retval None
+1223:Src/main.c    ****   */
+1224:Src/main.c    **** static void MX_SDMMC1_SD_Init(void)
+1225:Src/main.c    **** {
+  95              		.loc 1 1225 1 is_stmt 1 view -0
   96              		.cfi_startproc
   97              		@ args = 0, pretend = 0, frame = 0
   98              		@ frame_needed = 0, uses_anonymous_args = 0
   99              		@ link register save eliminated.
-1130:Src/main.c    **** 
-1131:Src/main.c    ****   /* USER CODE BEGIN SDMMC1_Init 0 */
-1132:Src/main.c    **** 
-1133:Src/main.c    ****   /* USER CODE END SDMMC1_Init 0 */
-1134:Src/main.c    **** 
-1135:Src/main.c    ****   /* USER CODE BEGIN SDMMC1_Init 1 */
-1136:Src/main.c    **** 
-1137:Src/main.c    ****   /* USER CODE END SDMMC1_Init 1 */
-1138:Src/main.c    ****   hsd1.Instance = SDMMC1;
- 100              		.loc 1 1138 3 view .LVU21
- 101              		.loc 1 1138 17 is_stmt 0 view .LVU22
+1226:Src/main.c    **** 
+1227:Src/main.c    ****   /* USER CODE BEGIN SDMMC1_Init 0 */
+1228:Src/main.c    **** 
+1229:Src/main.c    ****   /* USER CODE END SDMMC1_Init 0 */
+1230:Src/main.c    **** 
+1231:Src/main.c    ****   /* USER CODE BEGIN SDMMC1_Init 1 */
+1232:Src/main.c    **** 
+1233:Src/main.c    ****   /* USER CODE END SDMMC1_Init 1 */
+1234:Src/main.c    ****   hsd1.Instance = SDMMC1;
+ 100              		.loc 1 1234 3 view .LVU21
+ 101              		.loc 1 1234 17 is_stmt 0 view .LVU22
  102 0000 064B     		ldr	r3, .L6
  103 0002 074A     		ldr	r2, .L6+4
  104 0004 1A60     		str	r2, [r3]
-1139:Src/main.c    ****   hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
- 105              		.loc 1 1139 3 is_stmt 1 view .LVU23
- 106              		.loc 1 1139 23 is_stmt 0 view .LVU24
+ARM GAS  /tmp/ccEQxcUB.s 			page 61
+
+
+1235:Src/main.c    ****   hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
+ 105              		.loc 1 1235 3 is_stmt 1 view .LVU23
+ 106              		.loc 1 1235 23 is_stmt 0 view .LVU24
  107 0006 0022     		movs	r2, #0
  108 0008 5A60     		str	r2, [r3, #4]
-1140:Src/main.c    ****   hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
- 109              		.loc 1 1140 3 is_stmt 1 view .LVU25
- 110              		.loc 1 1140 25 is_stmt 0 view .LVU26
+1236:Src/main.c    ****   hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
+ 109              		.loc 1 1236 3 is_stmt 1 view .LVU25
+ 110              		.loc 1 1236 25 is_stmt 0 view .LVU26
  111 000a 9A60     		str	r2, [r3, #8]
-1141:Src/main.c    ****   hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
- 112              		.loc 1 1141 3 is_stmt 1 view .LVU27
- 113              		.loc 1 1141 28 is_stmt 0 view .LVU28
+1237:Src/main.c    ****   hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
+ 112              		.loc 1 1237 3 is_stmt 1 view .LVU27
+ 113              		.loc 1 1237 28 is_stmt 0 view .LVU28
  114 000c DA60     		str	r2, [r3, #12]
-1142:Src/main.c    ****   hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
- 115              		.loc 1 1142 3 is_stmt 1 view .LVU29
- 116              		.loc 1 1142 21 is_stmt 0 view .LVU30
+1238:Src/main.c    ****   hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
+ 115              		.loc 1 1238 3 is_stmt 1 view .LVU29
+ 116              		.loc 1 1238 21 is_stmt 0 view .LVU30
  117 000e 4FF40061 		mov	r1, #2048
  118 0012 1961     		str	r1, [r3, #16]
-1143:Src/main.c    ****   hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
- 119              		.loc 1 1143 3 is_stmt 1 view .LVU31
- 120              		.loc 1 1143 33 is_stmt 0 view .LVU32
+1239:Src/main.c    ****   hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
+ 119              		.loc 1 1239 3 is_stmt 1 view .LVU31
+ 120              		.loc 1 1239 33 is_stmt 0 view .LVU32
  121 0014 5A61     		str	r2, [r3, #20]
-1144:Src/main.c    ****   hsd1.Init.ClockDiv = 20;
- 122              		.loc 1 1144 3 is_stmt 1 view .LVU33
- 123              		.loc 1 1144 22 is_stmt 0 view .LVU34
+1240:Src/main.c    ****   hsd1.Init.ClockDiv = 20;
+ 122              		.loc 1 1240 3 is_stmt 1 view .LVU33
+ 123              		.loc 1 1240 22 is_stmt 0 view .LVU34
  124 0016 1422     		movs	r2, #20
  125 0018 9A61     		str	r2, [r3, #24]
-1145:Src/main.c    ****   /* USER CODE BEGIN SDMMC1_Init 2 */
-1146:Src/main.c    **** 
-1147:Src/main.c    ****   /* USER CODE END SDMMC1_Init 2 */
-1148:Src/main.c    **** 
-1149:Src/main.c    **** }
- 126              		.loc 1 1149 1 view .LVU35
+1241:Src/main.c    ****   /* USER CODE BEGIN SDMMC1_Init 2 */
+1242:Src/main.c    **** 
+1243:Src/main.c    ****   /* USER CODE END SDMMC1_Init 2 */
+1244:Src/main.c    **** 
+1245:Src/main.c    **** }
+ 126              		.loc 1 1245 1 view .LVU35
  127 001a 7047     		bx	lr
  128              	.L7:
  129              		.align	2
  130              	.L6:
  131 001c 00000000 		.word	hsd1
  132 0020 002C0140 		.word	1073818624
-ARM GAS  /tmp/ccwR4KB7.s 			page 60
-
-
  133              		.cfi_endproc
  134              	.LFE1190:
  136              		.section	.text.MX_DMA_Init,"ax",%progbits
@@ -3549,796 +3648,871 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  139              		.thumb
  140              		.thumb_func
  142              	MX_DMA_Init:
- 143              	.LFB1205:
-1150:Src/main.c    **** 
-1151:Src/main.c    **** /**
-1152:Src/main.c    ****   * @brief SPI2 Initialization Function
-1153:Src/main.c    ****   * @param None
-1154:Src/main.c    ****   * @retval None
-1155:Src/main.c    ****   */
-1156:Src/main.c    **** static void MX_SPI2_Init(void)
-1157:Src/main.c    **** {
-1158:Src/main.c    **** 
-1159:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 0 */
-1160:Src/main.c    **** 
-1161:Src/main.c    ****   /* USER CODE END SPI2_Init 0 */
-1162:Src/main.c    **** 
-1163:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1164:Src/main.c    **** 
-1165:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1166:Src/main.c    **** 
-1167:Src/main.c    ****   /* Peripheral clock enable */
-1168:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
-1169:Src/main.c    **** 
-1170:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
-1171:Src/main.c    ****   /**SPI2 GPIO Configuration
-1172:Src/main.c    ****   PB13   ------> SPI2_SCK
-1173:Src/main.c    ****   PB14   ------> SPI2_MISO
-1174:Src/main.c    ****   PB15   ------> SPI2_MOSI
-1175:Src/main.c    ****   */
-1176:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
-1177:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1178:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1179:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1180:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1181:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1182:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-1183:Src/main.c    **** 
-1184:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_14;
-1185:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1186:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1187:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1188:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1189:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1190:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-1191:Src/main.c    **** 
-1192:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
-1193:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1194:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1195:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1196:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1197:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-ARM GAS  /tmp/ccwR4KB7.s 			page 61
-
-
-1198:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-1199:Src/main.c    **** 
-1200:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 1 */
-1201:Src/main.c    **** 
-1202:Src/main.c    ****   /* USER CODE END SPI2_Init 1 */
-1203:Src/main.c    ****   /* SPI2 parameter configuration*/
-1204:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
-1205:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1206:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1207:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
-1208:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
-1209:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
-1210:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
-1211:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1212:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1213:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
-1214:Src/main.c    ****   LL_SPI_Init(SPI2, &SPI_InitStruct);
-1215:Src/main.c    ****   LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
-1216:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI2);
-1217:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 2 */
-1218:Src/main.c    **** 
-1219:Src/main.c    ****   /* USER CODE END SPI2_Init 2 */
-1220:Src/main.c    **** 
-1221:Src/main.c    **** }
-1222:Src/main.c    **** 
-1223:Src/main.c    **** /**
-1224:Src/main.c    ****   * @brief SPI4 Initialization Function
-1225:Src/main.c    ****   * @param None
-1226:Src/main.c    ****   * @retval None
-1227:Src/main.c    ****   */
-1228:Src/main.c    **** static void MX_SPI4_Init(void)
-1229:Src/main.c    **** {
-1230:Src/main.c    **** 
-1231:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 0 */
-1232:Src/main.c    **** 
-1233:Src/main.c    ****   /* USER CODE END SPI4_Init 0 */
-1234:Src/main.c    **** 
-1235:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1236:Src/main.c    **** 
-1237:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1238:Src/main.c    **** 
-1239:Src/main.c    ****   /* Peripheral clock enable */
-1240:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4);
-1241:Src/main.c    **** 
-1242:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE);
-1243:Src/main.c    ****   /**SPI4 GPIO Configuration
-1244:Src/main.c    ****   PE12   ------> SPI4_SCK
-1245:Src/main.c    ****   PE13   ------> SPI4_MISO
-1246:Src/main.c    ****   */
-1247:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
-1248:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1249:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1250:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1251:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1252:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1253:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 143              	.LFB1206:
+1246:Src/main.c    **** 
+1247:Src/main.c    **** /**
+1248:Src/main.c    ****   * @brief SPI2 Initialization Function
+1249:Src/main.c    ****   * @param None
+1250:Src/main.c    ****   * @retval None
+1251:Src/main.c    ****   */
+1252:Src/main.c    **** static void MX_SPI2_Init(void)
+1253:Src/main.c    **** {
 1254:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 62
+ARM GAS  /tmp/ccEQxcUB.s 			page 62
 
 
-1255:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
-1256:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1257:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1258:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1259:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1260:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1261:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+1255:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 0 */
+1256:Src/main.c    **** 
+1257:Src/main.c    ****   /* USER CODE END SPI2_Init 0 */
+1258:Src/main.c    **** 
+1259:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
+1260:Src/main.c    **** 
+1261:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 1262:Src/main.c    **** 
-1263:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 1 */
-1264:Src/main.c    **** 
-1265:Src/main.c    ****   /* USER CODE END SPI4_Init 1 */
-1266:Src/main.c    ****   /* SPI4 parameter configuration*/
-1267:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
-1268:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1269:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1270:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
-1271:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
-1272:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
-1273:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
-1274:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1275:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1276:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
-1277:Src/main.c    ****   LL_SPI_Init(SPI4, &SPI_InitStruct);
-1278:Src/main.c    ****   LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
-1279:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI4);
-1280:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 2 */
-1281:Src/main.c    **** 
-1282:Src/main.c    ****   /* USER CODE END SPI4_Init 2 */
-1283:Src/main.c    **** 
-1284:Src/main.c    **** }
-1285:Src/main.c    **** 
-1286:Src/main.c    **** /**
-1287:Src/main.c    ****   * @brief SPI5 Initialization Function
-1288:Src/main.c    ****   * @param None
-1289:Src/main.c    ****   * @retval None
-1290:Src/main.c    ****   */
-1291:Src/main.c    **** static void MX_SPI5_Init(void)
-1292:Src/main.c    **** {
-1293:Src/main.c    **** 
-1294:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 0 */
+1263:Src/main.c    ****   /* Peripheral clock enable */
+1264:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
+1265:Src/main.c    **** 
+1266:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
+1267:Src/main.c    ****   /**SPI2 GPIO Configuration
+1268:Src/main.c    ****   PB13   ------> SPI2_SCK
+1269:Src/main.c    ****   PB14   ------> SPI2_MISO
+1270:Src/main.c    ****   PB15   ------> SPI2_MOSI
+1271:Src/main.c    ****   */
+1272:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
+1273:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1274:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1275:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1276:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1277:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+1278:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+1279:Src/main.c    **** 
+1280:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_14;
+1281:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1282:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1283:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1284:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1285:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+1286:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+1287:Src/main.c    **** 
+1288:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
+1289:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1290:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1291:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1292:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1293:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+1294:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 1295:Src/main.c    **** 
-1296:Src/main.c    ****   /* USER CODE END SPI5_Init 0 */
+1296:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 1 */
 1297:Src/main.c    **** 
-1298:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1299:Src/main.c    **** 
-1300:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1301:Src/main.c    **** 
-1302:Src/main.c    ****   /* Peripheral clock enable */
-1303:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5);
-1304:Src/main.c    **** 
-1305:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);
-1306:Src/main.c    ****   /**SPI5 GPIO Configuration
-1307:Src/main.c    ****   PF7   ------> SPI5_SCK
-1308:Src/main.c    ****   PF8   ------> SPI5_MISO
-1309:Src/main.c    ****   */
-1310:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
-1311:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-ARM GAS  /tmp/ccwR4KB7.s 			page 63
+1298:Src/main.c    ****   /* USER CODE END SPI2_Init 1 */
+1299:Src/main.c    ****   /* SPI2 parameter configuration*/
+1300:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
+1301:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+1302:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+1303:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
+1304:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+1305:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+1306:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
+1307:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+1308:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+1309:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+1310:Src/main.c    ****   LL_SPI_Init(SPI2, &SPI_InitStruct);
+1311:Src/main.c    ****   LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
+ARM GAS  /tmp/ccEQxcUB.s 			page 63
 
 
-1312:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1313:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1314:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1315:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1316:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-1317:Src/main.c    **** 
-1318:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
-1319:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1320:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1321:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1322:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1323:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1324:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-1325:Src/main.c    **** 
-1326:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 1 */
-1327:Src/main.c    **** 
-1328:Src/main.c    ****   /* USER CODE END SPI5_Init 1 */
-1329:Src/main.c    ****   /* SPI5 parameter configuration*/
-1330:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
-1331:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1332:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1333:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
-1334:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
-1335:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
-1336:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
-1337:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1338:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1339:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
-1340:Src/main.c    ****   LL_SPI_Init(SPI5, &SPI_InitStruct);
-1341:Src/main.c    ****   LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
-1342:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI5);
-1343:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 2 */
-1344:Src/main.c    **** 
-1345:Src/main.c    ****   /* USER CODE END SPI5_Init 2 */
-1346:Src/main.c    **** 
-1347:Src/main.c    **** }
-1348:Src/main.c    **** 
-1349:Src/main.c    **** /**
-1350:Src/main.c    ****   * @brief SPI6 Initialization Function
-1351:Src/main.c    ****   * @param None
-1352:Src/main.c    ****   * @retval None
-1353:Src/main.c    ****   */
-1354:Src/main.c    **** static void MX_SPI6_Init(void)
-1355:Src/main.c    **** {
-1356:Src/main.c    **** 
-1357:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 0 */
+1312:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI2);
+1313:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 2 */
+1314:Src/main.c    **** 
+1315:Src/main.c    ****   /* USER CODE END SPI2_Init 2 */
+1316:Src/main.c    **** 
+1317:Src/main.c    **** }
+1318:Src/main.c    **** 
+1319:Src/main.c    **** /**
+1320:Src/main.c    ****   * @brief SPI4 Initialization Function
+1321:Src/main.c    ****   * @param None
+1322:Src/main.c    ****   * @retval None
+1323:Src/main.c    ****   */
+1324:Src/main.c    **** static void MX_SPI4_Init(void)
+1325:Src/main.c    **** {
+1326:Src/main.c    **** 
+1327:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 0 */
+1328:Src/main.c    **** 
+1329:Src/main.c    ****   /* USER CODE END SPI4_Init 0 */
+1330:Src/main.c    **** 
+1331:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
+1332:Src/main.c    **** 
+1333:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+1334:Src/main.c    **** 
+1335:Src/main.c    ****   /* Peripheral clock enable */
+1336:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4);
+1337:Src/main.c    **** 
+1338:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE);
+1339:Src/main.c    ****   /**SPI4 GPIO Configuration
+1340:Src/main.c    ****   PE12   ------> SPI4_SCK
+1341:Src/main.c    ****   PE13   ------> SPI4_MISO
+1342:Src/main.c    ****   */
+1343:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
+1344:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1345:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1346:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1347:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1348:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+1349:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+1350:Src/main.c    **** 
+1351:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
+1352:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1353:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1354:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1355:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1356:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+1357:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 1358:Src/main.c    **** 
-1359:Src/main.c    ****   /* USER CODE END SPI6_Init 0 */
+1359:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 1 */
 1360:Src/main.c    **** 
-1361:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1362:Src/main.c    **** 
-1363:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1364:Src/main.c    **** 
-1365:Src/main.c    ****   /* Peripheral clock enable */
-1366:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6);
-1367:Src/main.c    **** 
-1368:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
-ARM GAS  /tmp/ccwR4KB7.s 			page 64
+1361:Src/main.c    ****   /* USER CODE END SPI4_Init 1 */
+1362:Src/main.c    ****   /* SPI4 parameter configuration*/
+1363:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
+1364:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+1365:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+1366:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+1367:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+1368:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ARM GAS  /tmp/ccEQxcUB.s 			page 64
 
 
-1369:Src/main.c    ****   /**SPI6 GPIO Configuration
-1370:Src/main.c    ****   PA5   ------> SPI6_SCK
-1371:Src/main.c    ****   PA7   ------> SPI6_MOSI
-1372:Src/main.c    ****   */
-1373:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
-1374:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1375:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1376:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1377:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1378:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
-1379:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-1380:Src/main.c    **** 
-1381:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
-1382:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1383:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1384:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1385:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1386:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
-1387:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-1388:Src/main.c    **** 
-1389:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 1 */
-1390:Src/main.c    **** 
-1391:Src/main.c    ****   /* USER CODE END SPI6_Init 1 */
-1392:Src/main.c    ****   /* SPI6 parameter configuration*/
-1393:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
-1394:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1395:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1396:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
-1397:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
-1398:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
-1399:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
-1400:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1401:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1402:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
-1403:Src/main.c    ****   LL_SPI_Init(SPI6, &SPI_InitStruct);
-1404:Src/main.c    ****   LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
-1405:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI6);
-1406:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 2 */
-1407:Src/main.c    **** 
-1408:Src/main.c    ****   /* USER CODE END SPI6_Init 2 */
-1409:Src/main.c    **** 
-1410:Src/main.c    **** }
-1411:Src/main.c    **** 
-1412:Src/main.c    **** /**
-1413:Src/main.c    ****   * @brief TIM2 Initialization Function
-1414:Src/main.c    ****   * @param None
-1415:Src/main.c    ****   * @retval None
-1416:Src/main.c    ****   */
-1417:Src/main.c    **** static void MX_TIM2_Init(void)
-1418:Src/main.c    **** {
-1419:Src/main.c    **** 
-1420:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 0 */
+1369:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+1370:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+1371:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+1372:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+1373:Src/main.c    ****   LL_SPI_Init(SPI4, &SPI_InitStruct);
+1374:Src/main.c    ****   LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
+1375:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI4);
+1376:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 2 */
+1377:Src/main.c    **** 
+1378:Src/main.c    ****   /* USER CODE END SPI4_Init 2 */
+1379:Src/main.c    **** 
+1380:Src/main.c    **** }
+1381:Src/main.c    **** 
+1382:Src/main.c    **** /**
+1383:Src/main.c    ****   * @brief SPI5 Initialization Function
+1384:Src/main.c    ****   * @param None
+1385:Src/main.c    ****   * @retval None
+1386:Src/main.c    ****   */
+1387:Src/main.c    **** static void MX_SPI5_Init(void)
+1388:Src/main.c    **** {
+1389:Src/main.c    **** 
+1390:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 0 */
+1391:Src/main.c    **** 
+1392:Src/main.c    ****   /* USER CODE END SPI5_Init 0 */
+1393:Src/main.c    **** 
+1394:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
+1395:Src/main.c    **** 
+1396:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+1397:Src/main.c    **** 
+1398:Src/main.c    ****   /* Peripheral clock enable */
+1399:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5);
+1400:Src/main.c    **** 
+1401:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);
+1402:Src/main.c    ****   /**SPI5 GPIO Configuration
+1403:Src/main.c    ****   PF7   ------> SPI5_SCK
+1404:Src/main.c    ****   PF8   ------> SPI5_MISO
+1405:Src/main.c    ****   */
+1406:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
+1407:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1408:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1409:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1410:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1411:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+1412:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+1413:Src/main.c    **** 
+1414:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
+1415:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1416:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1417:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1418:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1419:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+1420:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 1421:Src/main.c    **** 
-1422:Src/main.c    ****   /* USER CODE END TIM2_Init 0 */
+1422:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 1 */
 1423:Src/main.c    **** 
-1424:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
-1425:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 65
+1424:Src/main.c    ****   /* USER CODE END SPI5_Init 1 */
+1425:Src/main.c    ****   /* SPI5 parameter configuration*/
+ARM GAS  /tmp/ccEQxcUB.s 			page 65
 
 
-1426:Src/main.c    ****   /* Peripheral clock enable */
-1427:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
-1428:Src/main.c    **** 
-1429:Src/main.c    ****   /* TIM2 interrupt Init */
-1430:Src/main.c    ****   NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1431:Src/main.c    ****   NVIC_EnableIRQ(TIM2_IRQn);
-1432:Src/main.c    **** 
-1433:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 1 */
-1434:Src/main.c    **** 
-1435:Src/main.c    ****   /* USER CODE END TIM2_Init 1 */
-1436:Src/main.c    ****   TIM_InitStruct.Prescaler = 1000;
-1437:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1438:Src/main.c    ****   TIM_InitStruct.Autoreload = 840000;
-1439:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
-1440:Src/main.c    ****   LL_TIM_Init(TIM2, &TIM_InitStruct);
-1441:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM2);
-1442:Src/main.c    ****   LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
-1443:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
-1444:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM2);
-1445:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 2 */
-1446:Src/main.c    **** 
-1447:Src/main.c    ****   /* USER CODE END TIM2_Init 2 */
-1448:Src/main.c    **** 
-1449:Src/main.c    **** }
-1450:Src/main.c    **** 
-1451:Src/main.c    **** /**
-1452:Src/main.c    ****   * @brief TIM4 Initialization Function
-1453:Src/main.c    ****   * @param None
-1454:Src/main.c    ****   * @retval None
-1455:Src/main.c    ****   */
-1456:Src/main.c    **** static void MX_TIM4_Init(void)
-1457:Src/main.c    **** {
+1426:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
+1427:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+1428:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+1429:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+1430:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+1431:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+1432:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+1433:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+1434:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+1435:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+1436:Src/main.c    ****   LL_SPI_Init(SPI5, &SPI_InitStruct);
+1437:Src/main.c    ****   LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
+1438:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI5);
+1439:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 2 */
+1440:Src/main.c    **** 
+1441:Src/main.c    ****   /* USER CODE END SPI5_Init 2 */
+1442:Src/main.c    **** 
+1443:Src/main.c    **** }
+1444:Src/main.c    **** 
+1445:Src/main.c    **** /**
+1446:Src/main.c    ****   * @brief SPI6 Initialization Function
+1447:Src/main.c    ****   * @param None
+1448:Src/main.c    ****   * @retval None
+1449:Src/main.c    ****   */
+1450:Src/main.c    **** static void MX_SPI6_Init(void)
+1451:Src/main.c    **** {
+1452:Src/main.c    **** 
+1453:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 0 */
+1454:Src/main.c    **** 
+1455:Src/main.c    ****   /* USER CODE END SPI6_Init 0 */
+1456:Src/main.c    **** 
+1457:Src/main.c    ****   LL_SPI_InitTypeDef SPI_InitStruct = {0};
 1458:Src/main.c    **** 
-1459:Src/main.c    ****   /* USER CODE BEGIN TIM4_Init 0 */
+1459:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 1460:Src/main.c    **** 
-1461:Src/main.c    ****   /* USER CODE END TIM4_Init 0 */
-1462:Src/main.c    **** 
-1463:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
-1464:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
-1465:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
-1466:Src/main.c    **** 
-1467:Src/main.c    ****   /* USER CODE BEGIN TIM4_Init 1 */
-1468:Src/main.c    **** 
-1469:Src/main.c    ****   /* USER CODE END TIM4_Init 1 */
-1470:Src/main.c    ****   htim4.Instance = TIM4;
-1471:Src/main.c    ****   htim4.Init.Prescaler = 0;
-1472:Src/main.c    ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
-1473:Src/main.c    ****   htim4.Init.Period = 45;
-1474:Src/main.c    ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1475:Src/main.c    ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
-1476:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
-1477:Src/main.c    ****   {
-1478:Src/main.c    ****     Error_Handler();
-1479:Src/main.c    ****   }
-1480:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
-1481:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
-1482:Src/main.c    ****   {
-ARM GAS  /tmp/ccwR4KB7.s 			page 66
+1461:Src/main.c    ****   /* Peripheral clock enable */
+1462:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6);
+1463:Src/main.c    **** 
+1464:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
+1465:Src/main.c    ****   /**SPI6 GPIO Configuration
+1466:Src/main.c    ****   PA5   ------> SPI6_SCK
+1467:Src/main.c    ****   PA7   ------> SPI6_MOSI
+1468:Src/main.c    ****   */
+1469:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
+1470:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1471:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1472:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1473:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1474:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+1475:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+1476:Src/main.c    **** 
+1477:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
+1478:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1479:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1480:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1481:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1482:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ARM GAS  /tmp/ccEQxcUB.s 			page 66
 
 
-1483:Src/main.c    ****     Error_Handler();
-1484:Src/main.c    ****   }
-1485:Src/main.c    ****   if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
-1486:Src/main.c    ****   {
-1487:Src/main.c    ****     Error_Handler();
-1488:Src/main.c    ****   }
-1489:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
-1490:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
-1491:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
-1492:Src/main.c    ****   {
-1493:Src/main.c    ****     Error_Handler();
-1494:Src/main.c    ****   }
-1495:Src/main.c    ****   sConfigOC.OCMode = TIM_OCMODE_PWM1;
-1496:Src/main.c    ****   sConfigOC.Pulse = 22;
-1497:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
-1498:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
-1499:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
-1500:Src/main.c    ****   {
-1501:Src/main.c    ****     Error_Handler();
-1502:Src/main.c    ****   }
-1503:Src/main.c    ****   /* USER CODE BEGIN TIM4_Init 2 */
-1504:Src/main.c    **** 
-1505:Src/main.c    ****   /* USER CODE END TIM4_Init 2 */
-1506:Src/main.c    ****   HAL_TIM_MspPostInit(&htim4);
+1483:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+1484:Src/main.c    **** 
+1485:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 1 */
+1486:Src/main.c    **** 
+1487:Src/main.c    ****   /* USER CODE END SPI6_Init 1 */
+1488:Src/main.c    ****   /* SPI6 parameter configuration*/
+1489:Src/main.c    ****   SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
+1490:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+1491:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+1492:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+1493:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
+1494:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+1495:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+1496:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+1497:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+1498:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+1499:Src/main.c    ****   LL_SPI_Init(SPI6, &SPI_InitStruct);
+1500:Src/main.c    ****   LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
+1501:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI6);
+1502:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 2 */
+1503:Src/main.c    **** 
+1504:Src/main.c    ****   /* USER CODE END SPI6_Init 2 */
+1505:Src/main.c    **** 
+1506:Src/main.c    **** }
 1507:Src/main.c    **** 
-1508:Src/main.c    **** }
-1509:Src/main.c    **** 
-1510:Src/main.c    **** /**
-1511:Src/main.c    ****   * @brief TIM5 Initialization Function
-1512:Src/main.c    ****   * @param None
-1513:Src/main.c    ****   * @retval None
-1514:Src/main.c    ****   */
-1515:Src/main.c    **** static void MX_TIM5_Init(void)
-1516:Src/main.c    **** {
+1508:Src/main.c    **** /**
+1509:Src/main.c    ****   * @brief TIM2 Initialization Function
+1510:Src/main.c    ****   * @param None
+1511:Src/main.c    ****   * @retval None
+1512:Src/main.c    ****   */
+1513:Src/main.c    **** static void MX_TIM2_Init(void)
+1514:Src/main.c    **** {
+1515:Src/main.c    **** 
+1516:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 0 */
 1517:Src/main.c    **** 
-1518:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 0 */
+1518:Src/main.c    ****   /* USER CODE END TIM2_Init 0 */
 1519:Src/main.c    **** 
-1520:Src/main.c    ****   /* USER CODE END TIM5_Init 0 */
+1520:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
 1521:Src/main.c    **** 
-1522:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
-1523:Src/main.c    **** 
-1524:Src/main.c    ****   /* Peripheral clock enable */
-1525:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5);
-1526:Src/main.c    **** 
-1527:Src/main.c    ****   /* TIM5 interrupt Init */
-1528:Src/main.c    ****   NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1529:Src/main.c    ****   NVIC_EnableIRQ(TIM5_IRQn);
+1522:Src/main.c    ****   /* Peripheral clock enable */
+1523:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
+1524:Src/main.c    **** 
+1525:Src/main.c    ****   /* TIM2 interrupt Init */
+1526:Src/main.c    ****   NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+1527:Src/main.c    ****   NVIC_EnableIRQ(TIM2_IRQn);
+1528:Src/main.c    **** 
+1529:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 1 */
 1530:Src/main.c    **** 
-1531:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 1 */
-1532:Src/main.c    **** 
-1533:Src/main.c    ****   /* USER CODE END TIM5_Init 1 */
-1534:Src/main.c    ****   TIM_InitStruct.Prescaler = 10000;
-1535:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1536:Src/main.c    ****   TIM_InitStruct.Autoreload = 560;
-1537:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
-1538:Src/main.c    ****   LL_TIM_Init(TIM5, &TIM_InitStruct);
-1539:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM5);
-ARM GAS  /tmp/ccwR4KB7.s 			page 67
+1531:Src/main.c    ****   /* USER CODE END TIM2_Init 1 */
+1532:Src/main.c    ****   TIM_InitStruct.Prescaler = 1000;
+1533:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+1534:Src/main.c    ****   TIM_InitStruct.Autoreload = 840000;
+1535:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+1536:Src/main.c    ****   LL_TIM_Init(TIM2, &TIM_InitStruct);
+1537:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM2);
+1538:Src/main.c    ****   LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
+1539:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
+ARM GAS  /tmp/ccEQxcUB.s 			page 67
 
 
-1540:Src/main.c    ****   LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
-1541:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
-1542:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM5);
-1543:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 2 */
+1540:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM2);
+1541:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 2 */
+1542:Src/main.c    **** 
+1543:Src/main.c    ****   /* USER CODE END TIM2_Init 2 */
 1544:Src/main.c    **** 
-1545:Src/main.c    ****   /* USER CODE END TIM5_Init 2 */
+1545:Src/main.c    **** }
 1546:Src/main.c    **** 
-1547:Src/main.c    **** }
-1548:Src/main.c    **** 
-1549:Src/main.c    **** /**
-1550:Src/main.c    ****   * @brief TIM6 Initialization Function
-1551:Src/main.c    ****   * @param None
-1552:Src/main.c    ****   * @retval None
-1553:Src/main.c    ****   */
-1554:Src/main.c    **** static void MX_TIM6_Init(void)
-1555:Src/main.c    **** {
+1547:Src/main.c    **** /**
+1548:Src/main.c    ****   * @brief TIM4 Initialization Function
+1549:Src/main.c    ****   * @param None
+1550:Src/main.c    ****   * @retval None
+1551:Src/main.c    ****   */
+1552:Src/main.c    **** static void MX_TIM4_Init(void)
+1553:Src/main.c    **** {
+1554:Src/main.c    **** 
+1555:Src/main.c    ****   /* USER CODE BEGIN TIM4_Init 0 */
 1556:Src/main.c    **** 
-1557:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 0 */
+1557:Src/main.c    ****   /* USER CODE END TIM4_Init 0 */
 1558:Src/main.c    **** 
-1559:Src/main.c    ****   /* USER CODE END TIM6_Init 0 */
-1560:Src/main.c    **** 
-1561:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
+1559:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+1560:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
+1561:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 1562:Src/main.c    **** 
-1563:Src/main.c    ****   /* Peripheral clock enable */
-1564:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6);
-1565:Src/main.c    **** 
-1566:Src/main.c    ****   /* TIM6 interrupt Init */
-1567:Src/main.c    ****   NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1568:Src/main.c    ****   NVIC_EnableIRQ(TIM6_DAC_IRQn);
-1569:Src/main.c    **** 
-1570:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 1 */
-1571:Src/main.c    **** 
-1572:Src/main.c    ****   /* USER CODE END TIM6_Init 1 */
-1573:Src/main.c    ****   TIM_InitStruct.Prescaler = 45999;
-1574:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1575:Src/main.c    ****   TIM_InitStruct.Autoreload = 19;
-1576:Src/main.c    ****   LL_TIM_Init(TIM6, &TIM_InitStruct);
-1577:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM6);
-1578:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
-1579:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM6);
-1580:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 2 */
-1581:Src/main.c    **** 
-1582:Src/main.c    ****   /* USER CODE END TIM6_Init 2 */
-1583:Src/main.c    **** 
-1584:Src/main.c    **** }
-1585:Src/main.c    **** 
-1586:Src/main.c    **** /**
-1587:Src/main.c    ****   * @brief TIM7 Initialization Function
-1588:Src/main.c    ****   * @param None
-1589:Src/main.c    ****   * @retval None
-1590:Src/main.c    ****   */
-1591:Src/main.c    **** static void MX_TIM7_Init(void)
-1592:Src/main.c    **** {
-1593:Src/main.c    **** 
-1594:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 0 */
-1595:Src/main.c    **** 
-1596:Src/main.c    ****   /* USER CODE END TIM7_Init 0 */
-ARM GAS  /tmp/ccwR4KB7.s 			page 68
+1563:Src/main.c    ****   /* USER CODE BEGIN TIM4_Init 1 */
+1564:Src/main.c    **** 
+1565:Src/main.c    ****   /* USER CODE END TIM4_Init 1 */
+1566:Src/main.c    ****   htim4.Instance = TIM4;
+1567:Src/main.c    ****   htim4.Init.Prescaler = 0;
+1568:Src/main.c    ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+1569:Src/main.c    ****   htim4.Init.Period = 45;
+1570:Src/main.c    ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+1571:Src/main.c    ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+1572:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+1573:Src/main.c    ****   {
+1574:Src/main.c    ****     Error_Handler();
+1575:Src/main.c    ****   }
+1576:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+1577:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+1578:Src/main.c    ****   {
+1579:Src/main.c    ****     Error_Handler();
+1580:Src/main.c    ****   }
+1581:Src/main.c    ****   if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
+1582:Src/main.c    ****   {
+1583:Src/main.c    ****     Error_Handler();
+1584:Src/main.c    ****   }
+1585:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+1586:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+1587:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+1588:Src/main.c    ****   {
+1589:Src/main.c    ****     Error_Handler();
+1590:Src/main.c    ****   }
+1591:Src/main.c    ****   sConfigOC.OCMode = TIM_OCMODE_PWM1;
+1592:Src/main.c    ****   sConfigOC.Pulse = 22;
+1593:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+1594:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+1595:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+1596:Src/main.c    ****   {
+ARM GAS  /tmp/ccEQxcUB.s 			page 68
 
 
-1597:Src/main.c    **** 
-1598:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
-1599:Src/main.c    **** 
-1600:Src/main.c    ****   /* Peripheral clock enable */
-1601:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7);
-1602:Src/main.c    **** 
-1603:Src/main.c    ****   /* TIM7 interrupt Init */
-1604:Src/main.c    ****   NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1605:Src/main.c    ****   NVIC_EnableIRQ(TIM7_IRQn);
-1606:Src/main.c    **** 
-1607:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 1 */
-1608:Src/main.c    **** 
-1609:Src/main.c    ****   /* USER CODE END TIM7_Init 1 */
-1610:Src/main.c    ****   TIM_InitStruct.Prescaler = 919;
-1611:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1612:Src/main.c    ****   TIM_InitStruct.Autoreload = 99;
-1613:Src/main.c    ****   LL_TIM_Init(TIM7, &TIM_InitStruct);
-1614:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM7);
-1615:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
-1616:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM7);
-1617:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 2 */
-1618:Src/main.c    **** 
-1619:Src/main.c    ****   /* USER CODE END TIM7_Init 2 */
-1620:Src/main.c    **** 
-1621:Src/main.c    **** }
+1597:Src/main.c    ****     Error_Handler();
+1598:Src/main.c    ****   }
+1599:Src/main.c    ****   /* USER CODE BEGIN TIM4_Init 2 */
+1600:Src/main.c    **** 
+1601:Src/main.c    ****   /* USER CODE END TIM4_Init 2 */
+1602:Src/main.c    ****   HAL_TIM_MspPostInit(&htim4);
+1603:Src/main.c    **** 
+1604:Src/main.c    **** }
+1605:Src/main.c    **** 
+1606:Src/main.c    **** /**
+1607:Src/main.c    ****   * @brief TIM5 Initialization Function
+1608:Src/main.c    ****   * @param None
+1609:Src/main.c    ****   * @retval None
+1610:Src/main.c    ****   */
+1611:Src/main.c    **** static void MX_TIM5_Init(void)
+1612:Src/main.c    **** {
+1613:Src/main.c    **** 
+1614:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 0 */
+1615:Src/main.c    **** 
+1616:Src/main.c    ****   /* USER CODE END TIM5_Init 0 */
+1617:Src/main.c    **** 
+1618:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
+1619:Src/main.c    **** 
+1620:Src/main.c    ****   /* Peripheral clock enable */
+1621:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5);
 1622:Src/main.c    **** 
-1623:Src/main.c    **** /**
-1624:Src/main.c    ****   * @brief TIM8 Initialization Function
-1625:Src/main.c    ****   * @param None
-1626:Src/main.c    ****   * @retval None
-1627:Src/main.c    ****   */
-1628:Src/main.c    **** static void MX_TIM8_Init(void)
-1629:Src/main.c    **** {
-1630:Src/main.c    **** 
-1631:Src/main.c    ****   /* USER CODE BEGIN TIM8_Init 0 */
-1632:Src/main.c    **** 
-1633:Src/main.c    ****   /* USER CODE END TIM8_Init 0 */
-1634:Src/main.c    **** 
-1635:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
-1636:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
-1637:Src/main.c    **** 
-1638:Src/main.c    ****   /* USER CODE BEGIN TIM8_Init 1 */
-1639:Src/main.c    **** 
-1640:Src/main.c    ****   /* USER CODE END TIM8_Init 1 */
-1641:Src/main.c    ****   htim8.Instance = TIM8;
-1642:Src/main.c    ****   htim8.Init.Prescaler = 0;
-1643:Src/main.c    ****   htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
-1644:Src/main.c    ****   htim8.Init.Period = 91;
-1645:Src/main.c    ****   htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1646:Src/main.c    ****   htim8.Init.RepetitionCounter = 0;
-1647:Src/main.c    ****   htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
-1648:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
-1649:Src/main.c    ****   {
-1650:Src/main.c    ****     Error_Handler();
-1651:Src/main.c    ****   }
-1652:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
-1653:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
-ARM GAS  /tmp/ccwR4KB7.s 			page 69
+1623:Src/main.c    ****   /* TIM5 interrupt Init */
+1624:Src/main.c    ****   NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+1625:Src/main.c    ****   NVIC_EnableIRQ(TIM5_IRQn);
+1626:Src/main.c    **** 
+1627:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 1 */
+1628:Src/main.c    **** 
+1629:Src/main.c    ****   /* USER CODE END TIM5_Init 1 */
+1630:Src/main.c    ****   TIM_InitStruct.Prescaler = 10000;
+1631:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+1632:Src/main.c    ****   TIM_InitStruct.Autoreload = 560;
+1633:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+1634:Src/main.c    ****   LL_TIM_Init(TIM5, &TIM_InitStruct);
+1635:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM5);
+1636:Src/main.c    ****   LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
+1637:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
+1638:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM5);
+1639:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 2 */
+1640:Src/main.c    **** 
+1641:Src/main.c    ****   /* USER CODE END TIM5_Init 2 */
+1642:Src/main.c    **** 
+1643:Src/main.c    **** }
+1644:Src/main.c    **** 
+1645:Src/main.c    **** /**
+1646:Src/main.c    ****   * @brief TIM6 Initialization Function
+1647:Src/main.c    ****   * @param None
+1648:Src/main.c    ****   * @retval None
+1649:Src/main.c    ****   */
+1650:Src/main.c    **** static void MX_TIM6_Init(void)
+1651:Src/main.c    **** {
+1652:Src/main.c    **** 
+1653:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 0 */
+ARM GAS  /tmp/ccEQxcUB.s 			page 69
 
 
-1654:Src/main.c    ****   {
-1655:Src/main.c    ****     Error_Handler();
-1656:Src/main.c    ****   }
-1657:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
-1658:Src/main.c    ****   sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
-1659:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
-1660:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
-1661:Src/main.c    ****   {
-1662:Src/main.c    ****     Error_Handler();
-1663:Src/main.c    ****   }
-1664:Src/main.c    ****   /* USER CODE BEGIN TIM8_Init 2 */
+1654:Src/main.c    **** 
+1655:Src/main.c    ****   /* USER CODE END TIM6_Init 0 */
+1656:Src/main.c    **** 
+1657:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
+1658:Src/main.c    **** 
+1659:Src/main.c    ****   /* Peripheral clock enable */
+1660:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6);
+1661:Src/main.c    **** 
+1662:Src/main.c    ****   /* TIM6 interrupt Init */
+1663:Src/main.c    ****   NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+1664:Src/main.c    ****   NVIC_EnableIRQ(TIM6_DAC_IRQn);
 1665:Src/main.c    **** 
-1666:Src/main.c    ****   /* USER CODE END TIM8_Init 2 */
+1666:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 1 */
 1667:Src/main.c    **** 
-1668:Src/main.c    **** }
-1669:Src/main.c    **** 
-1670:Src/main.c    **** /**
-1671:Src/main.c    ****   * @brief TIM10 Initialization Function
-1672:Src/main.c    ****   * @param None
-1673:Src/main.c    ****   * @retval None
-1674:Src/main.c    ****   */
-1675:Src/main.c    **** static void MX_TIM10_Init(void)
-1676:Src/main.c    **** {
+1668:Src/main.c    ****   /* USER CODE END TIM6_Init 1 */
+1669:Src/main.c    ****   TIM_InitStruct.Prescaler = 45999;
+1670:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+1671:Src/main.c    ****   TIM_InitStruct.Autoreload = 19;
+1672:Src/main.c    ****   LL_TIM_Init(TIM6, &TIM_InitStruct);
+1673:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM6);
+1674:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
+1675:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM6);
+1676:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 2 */
 1677:Src/main.c    **** 
-1678:Src/main.c    ****   /* USER CODE BEGIN TIM10_Init 0 */
+1678:Src/main.c    ****   /* USER CODE END TIM6_Init 2 */
 1679:Src/main.c    **** 
-1680:Src/main.c    ****   /* USER CODE END TIM10_Init 0 */
+1680:Src/main.c    **** }
 1681:Src/main.c    **** 
-1682:Src/main.c    ****   /* USER CODE BEGIN TIM10_Init 1 */
-1683:Src/main.c    **** 
-1684:Src/main.c    ****   /* USER CODE END TIM10_Init 1 */
-1685:Src/main.c    ****   htim10.Instance = TIM10;
-1686:Src/main.c    ****   htim10.Init.Prescaler = 183;
-1687:Src/main.c    ****   htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
-1688:Src/main.c    ****   htim10.Init.Period = 9;
-1689:Src/main.c    ****   htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1690:Src/main.c    ****   htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
-1691:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
-1692:Src/main.c    ****   {
-1693:Src/main.c    ****     Error_Handler();
-1694:Src/main.c    ****   }
-1695:Src/main.c    ****   /* USER CODE BEGIN TIM10_Init 2 */
-1696:Src/main.c    **** 
-1697:Src/main.c    ****   /* USER CODE END TIM10_Init 2 */
+1682:Src/main.c    **** /**
+1683:Src/main.c    ****   * @brief TIM7 Initialization Function
+1684:Src/main.c    ****   * @param None
+1685:Src/main.c    ****   * @retval None
+1686:Src/main.c    ****   */
+1687:Src/main.c    **** static void MX_TIM7_Init(void)
+1688:Src/main.c    **** {
+1689:Src/main.c    **** 
+1690:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 0 */
+1691:Src/main.c    **** 
+1692:Src/main.c    ****   /* USER CODE END TIM7_Init 0 */
+1693:Src/main.c    **** 
+1694:Src/main.c    ****   LL_TIM_InitTypeDef TIM_InitStruct = {0};
+1695:Src/main.c    **** 
+1696:Src/main.c    ****   /* Peripheral clock enable */
+1697:Src/main.c    ****   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7);
 1698:Src/main.c    **** 
-1699:Src/main.c    **** }
-1700:Src/main.c    **** 
-1701:Src/main.c    **** /**
-1702:Src/main.c    ****   * @brief TIM11 Initialization Function
-1703:Src/main.c    ****   * @param None
-1704:Src/main.c    ****   * @retval None
-1705:Src/main.c    ****   */
-1706:Src/main.c    **** static void MX_TIM11_Init(void)
-1707:Src/main.c    **** {
-1708:Src/main.c    **** 
-1709:Src/main.c    ****   /* USER CODE BEGIN TIM11_Init 0 */
-1710:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 70
+1699:Src/main.c    ****   /* TIM7 interrupt Init */
+1700:Src/main.c    ****   NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+1701:Src/main.c    ****   NVIC_EnableIRQ(TIM7_IRQn);
+1702:Src/main.c    **** 
+1703:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 1 */
+1704:Src/main.c    **** 
+1705:Src/main.c    ****   /* USER CODE END TIM7_Init 1 */
+1706:Src/main.c    ****   TIM_InitStruct.Prescaler = 919;
+1707:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+1708:Src/main.c    ****   TIM_InitStruct.Autoreload = 99;
+1709:Src/main.c    ****   LL_TIM_Init(TIM7, &TIM_InitStruct);
+1710:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM7);
+ARM GAS  /tmp/ccEQxcUB.s 			page 70
 
 
-1711:Src/main.c    ****   /* USER CODE END TIM11_Init 0 */
-1712:Src/main.c    **** 
-1713:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
+1711:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
+1712:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM7);
+1713:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 2 */
 1714:Src/main.c    **** 
-1715:Src/main.c    ****   /* USER CODE BEGIN TIM11_Init 1 */
+1715:Src/main.c    ****   /* USER CODE END TIM7_Init 2 */
 1716:Src/main.c    **** 
-1717:Src/main.c    ****   /* USER CODE END TIM11_Init 1 */
-1718:Src/main.c    ****   htim11.Instance = TIM11;
-1719:Src/main.c    ****   htim11.Init.Prescaler = 1;
-1720:Src/main.c    ****   htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
-1721:Src/main.c    ****   htim11.Init.Period = 91;
-1722:Src/main.c    ****   htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1723:Src/main.c    ****   htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
-1724:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
-1725:Src/main.c    ****   {
-1726:Src/main.c    ****     Error_Handler();
-1727:Src/main.c    ****   }
-1728:Src/main.c    ****   if (HAL_TIM_PWM_Init(&htim11) != HAL_OK)
-1729:Src/main.c    ****   {
-1730:Src/main.c    ****     Error_Handler();
-1731:Src/main.c    ****   }
-1732:Src/main.c    ****   sConfigOC.OCMode = TIM_OCMODE_PWM1;
-1733:Src/main.c    ****   sConfigOC.Pulse = 91;
-1734:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
-1735:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
-1736:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
-1737:Src/main.c    ****   {
-1738:Src/main.c    ****     Error_Handler();
-1739:Src/main.c    ****   }
-1740:Src/main.c    ****   /* USER CODE BEGIN TIM11_Init 2 */
-1741:Src/main.c    **** 
-1742:Src/main.c    ****   /* USER CODE END TIM11_Init 2 */
-1743:Src/main.c    ****   HAL_TIM_MspPostInit(&htim11);
-1744:Src/main.c    **** 
-1745:Src/main.c    **** }
-1746:Src/main.c    **** 
-1747:Src/main.c    **** /**
-1748:Src/main.c    ****   * @brief UART8 Initialization Function
-1749:Src/main.c    ****   * @param None
-1750:Src/main.c    ****   * @retval None
-1751:Src/main.c    ****   */
-1752:Src/main.c    **** static void MX_UART8_Init(void)
-1753:Src/main.c    **** {
-1754:Src/main.c    **** 
-1755:Src/main.c    ****   /* USER CODE BEGIN UART8_Init 0 */
-1756:Src/main.c    **** 
-1757:Src/main.c    ****   /* USER CODE END UART8_Init 0 */
-1758:Src/main.c    **** 
-1759:Src/main.c    ****   /* USER CODE BEGIN UART8_Init 1 */
-1760:Src/main.c    **** 
-1761:Src/main.c    ****   /* USER CODE END UART8_Init 1 */
-1762:Src/main.c    ****   huart8.Instance = UART8;
-1763:Src/main.c    ****   huart8.Init.BaudRate = 115200;
-1764:Src/main.c    ****   huart8.Init.WordLength = UART_WORDLENGTH_8B;
-1765:Src/main.c    ****   huart8.Init.StopBits = UART_STOPBITS_1;
-1766:Src/main.c    ****   huart8.Init.Parity = UART_PARITY_NONE;
-1767:Src/main.c    ****   huart8.Init.Mode = UART_MODE_TX_RX;
-ARM GAS  /tmp/ccwR4KB7.s 			page 71
+1717:Src/main.c    **** }
+1718:Src/main.c    **** 
+1719:Src/main.c    **** /**
+1720:Src/main.c    ****   * @brief TIM8 Initialization Function
+1721:Src/main.c    ****   * @param None
+1722:Src/main.c    ****   * @retval None
+1723:Src/main.c    ****   */
+1724:Src/main.c    **** static void MX_TIM8_Init(void)
+1725:Src/main.c    **** {
+1726:Src/main.c    **** 
+1727:Src/main.c    ****   /* USER CODE BEGIN TIM8_Init 0 */
+1728:Src/main.c    **** 
+1729:Src/main.c    ****   /* USER CODE END TIM8_Init 0 */
+1730:Src/main.c    **** 
+1731:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+1732:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
+1733:Src/main.c    **** 
+1734:Src/main.c    ****   /* USER CODE BEGIN TIM8_Init 1 */
+1735:Src/main.c    **** 
+1736:Src/main.c    ****   /* USER CODE END TIM8_Init 1 */
+1737:Src/main.c    ****   htim8.Instance = TIM8;
+1738:Src/main.c    ****   htim8.Init.Prescaler = 0;
+1739:Src/main.c    ****   htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
+1740:Src/main.c    ****   htim8.Init.Period = 91;
+1741:Src/main.c    ****   htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+1742:Src/main.c    ****   htim8.Init.RepetitionCounter = 0;
+1743:Src/main.c    ****   htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+1744:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
+1745:Src/main.c    ****   {
+1746:Src/main.c    ****     Error_Handler();
+1747:Src/main.c    ****   }
+1748:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+1749:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
+1750:Src/main.c    ****   {
+1751:Src/main.c    ****     Error_Handler();
+1752:Src/main.c    ****   }
+1753:Src/main.c    ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+1754:Src/main.c    ****   sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+1755:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+1756:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
+1757:Src/main.c    ****   {
+1758:Src/main.c    ****     Error_Handler();
+1759:Src/main.c    ****   }
+1760:Src/main.c    ****   /* USER CODE BEGIN TIM8_Init 2 */
+1761:Src/main.c    **** 
+1762:Src/main.c    ****   /* USER CODE END TIM8_Init 2 */
+1763:Src/main.c    **** 
+1764:Src/main.c    **** }
+1765:Src/main.c    **** 
+1766:Src/main.c    **** /**
+1767:Src/main.c    ****   * @brief TIM10 Initialization Function
+ARM GAS  /tmp/ccEQxcUB.s 			page 71
 
 
-1768:Src/main.c    ****   huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-1769:Src/main.c    ****   huart8.Init.OverSampling = UART_OVERSAMPLING_16;
-1770:Src/main.c    ****   huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
-1771:Src/main.c    ****   huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-1772:Src/main.c    ****   if (HAL_UART_Init(&huart8) != HAL_OK)
-1773:Src/main.c    ****   {
-1774:Src/main.c    ****     Error_Handler();
-1775:Src/main.c    ****   }
-1776:Src/main.c    ****   /* USER CODE BEGIN UART8_Init 2 */
+1768:Src/main.c    ****   * @param None
+1769:Src/main.c    ****   * @retval None
+1770:Src/main.c    ****   */
+1771:Src/main.c    **** static void MX_TIM10_Init(void)
+1772:Src/main.c    **** {
+1773:Src/main.c    **** 
+1774:Src/main.c    ****   /* USER CODE BEGIN TIM10_Init 0 */
+1775:Src/main.c    **** 
+1776:Src/main.c    ****   /* USER CODE END TIM10_Init 0 */
 1777:Src/main.c    **** 
-1778:Src/main.c    ****   /* USER CODE END UART8_Init 2 */
+1778:Src/main.c    ****   /* USER CODE BEGIN TIM10_Init 1 */
 1779:Src/main.c    **** 
-1780:Src/main.c    **** }
-1781:Src/main.c    **** 
-1782:Src/main.c    **** /**
-1783:Src/main.c    ****   * @brief USART1 Initialization Function
-1784:Src/main.c    ****   * @param None
-1785:Src/main.c    ****   * @retval None
-1786:Src/main.c    ****   */
-1787:Src/main.c    **** static void MX_USART1_UART_Init(void)
-1788:Src/main.c    **** {
-1789:Src/main.c    **** 
-1790:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 0 */
-1791:Src/main.c    **** 
-1792:Src/main.c    ****   /* USER CODE END USART1_Init 0 */
-1793:Src/main.c    **** 
-1794:Src/main.c    ****   LL_USART_InitTypeDef USART_InitStruct = {0};
-1795:Src/main.c    **** 
-1796:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1797:Src/main.c    ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-1798:Src/main.c    **** 
-1799:Src/main.c    ****   /** Initializes the peripherals clock
-1800:Src/main.c    ****   */
-1801:Src/main.c    ****   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
-1802:Src/main.c    ****   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
-1803:Src/main.c    ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
-1804:Src/main.c    ****   {
-1805:Src/main.c    ****     Error_Handler();
-1806:Src/main.c    ****   }
-1807:Src/main.c    **** 
-1808:Src/main.c    ****   /* Peripheral clock enable */
-1809:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
+1780:Src/main.c    ****   /* USER CODE END TIM10_Init 1 */
+1781:Src/main.c    ****   htim10.Instance = TIM10;
+1782:Src/main.c    ****   htim10.Init.Prescaler = 183;
+1783:Src/main.c    ****   htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
+1784:Src/main.c    ****   htim10.Init.Period = 9;
+1785:Src/main.c    ****   htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+1786:Src/main.c    ****   htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+1787:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
+1788:Src/main.c    ****   {
+1789:Src/main.c    ****     Error_Handler();
+1790:Src/main.c    ****   }
+1791:Src/main.c    ****   /* USER CODE BEGIN TIM10_Init 2 */
+1792:Src/main.c    **** 
+1793:Src/main.c    ****   /* USER CODE END TIM10_Init 2 */
+1794:Src/main.c    **** 
+1795:Src/main.c    **** }
+1796:Src/main.c    **** 
+1797:Src/main.c    **** /**
+1798:Src/main.c    ****   * @brief TIM11 Initialization Function
+1799:Src/main.c    ****   * @param None
+1800:Src/main.c    ****   * @retval None
+1801:Src/main.c    ****   */
+1802:Src/main.c    **** static void MX_TIM11_Init(void)
+1803:Src/main.c    **** {
+1804:Src/main.c    **** 
+1805:Src/main.c    ****   /* USER CODE BEGIN TIM11_Init 0 */
+1806:Src/main.c    **** 
+1807:Src/main.c    ****   /* USER CODE END TIM11_Init 0 */
+1808:Src/main.c    **** 
+1809:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
 1810:Src/main.c    **** 
-1811:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
-1812:Src/main.c    ****   /**USART1 GPIO Configuration
-1813:Src/main.c    ****   PA9   ------> USART1_TX
-1814:Src/main.c    ****   PA10   ------> USART1_RX
-1815:Src/main.c    ****   */
-1816:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
-1817:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1818:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1819:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1820:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1821:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
-1822:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-1823:Src/main.c    **** 
-1824:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
-ARM GAS  /tmp/ccwR4KB7.s 			page 72
+1811:Src/main.c    ****   /* USER CODE BEGIN TIM11_Init 1 */
+1812:Src/main.c    **** 
+1813:Src/main.c    ****   /* USER CODE END TIM11_Init 1 */
+1814:Src/main.c    ****   htim11.Instance = TIM11;
+1815:Src/main.c    ****   htim11.Init.Prescaler = 1;
+1816:Src/main.c    ****   htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
+1817:Src/main.c    ****   htim11.Init.Period = 91;
+1818:Src/main.c    ****   htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+1819:Src/main.c    ****   htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
+1820:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
+1821:Src/main.c    ****   {
+1822:Src/main.c    ****     Error_Handler();
+1823:Src/main.c    ****   }
+1824:Src/main.c    ****   if (HAL_TIM_PWM_Init(&htim11) != HAL_OK)
+ARM GAS  /tmp/ccEQxcUB.s 			page 72
 
 
-1825:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1826:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1827:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1828:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1829:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
-1830:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-1831:Src/main.c    **** 
-1832:Src/main.c    ****   /* USART1 DMA Init */
-1833:Src/main.c    **** 
-1834:Src/main.c    ****   /* USART1_TX Init */
-1835:Src/main.c    ****   LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4);
-1836:Src/main.c    **** 
-1837:Src/main.c    ****   LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
-1838:Src/main.c    **** 
-1839:Src/main.c    ****   LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH);
+1825:Src/main.c    ****   {
+1826:Src/main.c    ****     Error_Handler();
+1827:Src/main.c    ****   }
+1828:Src/main.c    ****   sConfigOC.OCMode = TIM_OCMODE_PWM1;
+1829:Src/main.c    ****   sConfigOC.Pulse = 91;
+1830:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+1831:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+1832:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+1833:Src/main.c    ****   {
+1834:Src/main.c    ****     Error_Handler();
+1835:Src/main.c    ****   }
+1836:Src/main.c    ****   /* USER CODE BEGIN TIM11_Init 2 */
+1837:Src/main.c    **** 
+1838:Src/main.c    ****   /* USER CODE END TIM11_Init 2 */
+1839:Src/main.c    ****   HAL_TIM_MspPostInit(&htim11);
 1840:Src/main.c    **** 
-1841:Src/main.c    ****   LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL);
+1841:Src/main.c    **** }
 1842:Src/main.c    **** 
-1843:Src/main.c    ****   LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT);
-1844:Src/main.c    **** 
-1845:Src/main.c    ****   LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT);
-1846:Src/main.c    **** 
-1847:Src/main.c    ****   LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE);
-1848:Src/main.c    **** 
-1849:Src/main.c    ****   LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE);
+1843:Src/main.c    **** /**
+1844:Src/main.c    ****   * @brief TIM1 Initialization Function
+1845:Src/main.c    ****   * @param None
+1846:Src/main.c    ****   * @retval None
+1847:Src/main.c    ****   */
+1848:Src/main.c    **** static void MX_TIM1_Init(void)
+1849:Src/main.c    **** {
 1850:Src/main.c    **** 
-1851:Src/main.c    ****   LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7);
+1851:Src/main.c    ****   /* USER CODE BEGIN TIM1_Init 0 */
 1852:Src/main.c    **** 
-1853:Src/main.c    ****   /* USART1 interrupt Init */
-1854:Src/main.c    ****   NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1855:Src/main.c    ****   NVIC_EnableIRQ(USART1_IRQn);
-1856:Src/main.c    **** 
-1857:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 1 */
+1853:Src/main.c    ****   /* USER CODE END TIM1_Init 0 */
+1854:Src/main.c    **** 
+1855:Src/main.c    ****   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+1856:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
+1857:Src/main.c    ****   TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
 1858:Src/main.c    **** 
-1859:Src/main.c    ****   /* USER CODE END USART1_Init 1 */
-1860:Src/main.c    ****   USART_InitStruct.BaudRate = 115200;
-1861:Src/main.c    ****   USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
-1862:Src/main.c    ****   USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
-1863:Src/main.c    ****   USART_InitStruct.Parity = LL_USART_PARITY_NONE;
-1864:Src/main.c    ****   USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
-1865:Src/main.c    ****   USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
-1866:Src/main.c    ****   USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
-1867:Src/main.c    ****   LL_USART_Init(USART1, &USART_InitStruct);
-1868:Src/main.c    ****   LL_USART_ConfigAsyncMode(USART1);
-1869:Src/main.c    ****   LL_USART_Enable(USART1);
-1870:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 2 */
-1871:Src/main.c    **** 
-1872:Src/main.c    ****   /* USER CODE END USART1_Init 2 */
-1873:Src/main.c    **** 
-1874:Src/main.c    **** }
-1875:Src/main.c    **** 
-1876:Src/main.c    **** /**
-1877:Src/main.c    ****   * Enable DMA controller clock
-1878:Src/main.c    ****   */
-1879:Src/main.c    **** static void MX_DMA_Init(void)
-1880:Src/main.c    **** {
- 144              		.loc 1 1880 1 is_stmt 1 view -0
-ARM GAS  /tmp/ccwR4KB7.s 			page 73
+1859:Src/main.c    ****   /* USER CODE BEGIN TIM1_Init 1 */
+1860:Src/main.c    **** 
+1861:Src/main.c    ****   /* USER CODE END TIM1_Init 1 */
+1862:Src/main.c    ****   htim1.Instance = TIM1;
+1863:Src/main.c    ****   htim1.Init.Prescaler = 0;
+1864:Src/main.c    ****   htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+1865:Src/main.c    ****   htim1.Init.Period = 8;
+1866:Src/main.c    ****   htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+1867:Src/main.c    ****   htim1.Init.RepetitionCounter = 0;
+1868:Src/main.c    ****   htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+1869:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+1870:Src/main.c    ****   {
+1871:Src/main.c    ****     Error_Handler();
+1872:Src/main.c    ****   }
+1873:Src/main.c    ****   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+1874:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+1875:Src/main.c    ****   {
+1876:Src/main.c    ****     Error_Handler();
+1877:Src/main.c    ****   }
+1878:Src/main.c    ****   if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
+1879:Src/main.c    ****   {
+1880:Src/main.c    ****     Error_Handler();
+1881:Src/main.c    ****   }
+ARM GAS  /tmp/ccEQxcUB.s 			page 73
 
 
+1882:Src/main.c    ****   sConfigOC.OCMode = TIM_OCMODE_PWM1;
+1883:Src/main.c    ****   sConfigOC.Pulse = 4;
+1884:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+1885:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+1886:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+1887:Src/main.c    ****   {
+1888:Src/main.c    ****     Error_Handler();
+1889:Src/main.c    ****   }
+1890:Src/main.c    ****   sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+1891:Src/main.c    ****   sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+1892:Src/main.c    ****   sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+1893:Src/main.c    ****   sBreakDeadTimeConfig.DeadTime = 0;
+1894:Src/main.c    ****   sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+1895:Src/main.c    ****   sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+1896:Src/main.c    ****   sBreakDeadTimeConfig.BreakFilter = 0;
+1897:Src/main.c    ****   sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+1898:Src/main.c    ****   sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+1899:Src/main.c    ****   sBreakDeadTimeConfig.Break2Filter = 0;
+1900:Src/main.c    ****   sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+1901:Src/main.c    ****   if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+1902:Src/main.c    ****   {
+1903:Src/main.c    ****     Error_Handler();
+1904:Src/main.c    ****   }
+1905:Src/main.c    ****   /* USER CODE BEGIN TIM1_Init 2 */
+1906:Src/main.c    **** 
+1907:Src/main.c    ****   /* USER CODE END TIM1_Init 2 */
+1908:Src/main.c    ****   HAL_TIM_MspPostInit(&htim1);
+1909:Src/main.c    **** 
+1910:Src/main.c    **** }
+1911:Src/main.c    **** 
+1912:Src/main.c    **** /**
+1913:Src/main.c    ****   * @brief UART8 Initialization Function
+1914:Src/main.c    ****   * @param None
+1915:Src/main.c    ****   * @retval None
+1916:Src/main.c    ****   */
+1917:Src/main.c    **** static void MX_UART8_Init(void)
+1918:Src/main.c    **** {
+1919:Src/main.c    **** 
+1920:Src/main.c    ****   /* USER CODE BEGIN UART8_Init 0 */
+1921:Src/main.c    **** 
+1922:Src/main.c    ****   /* USER CODE END UART8_Init 0 */
+1923:Src/main.c    **** 
+1924:Src/main.c    ****   /* USER CODE BEGIN UART8_Init 1 */
+1925:Src/main.c    **** 
+1926:Src/main.c    ****   /* USER CODE END UART8_Init 1 */
+1927:Src/main.c    ****   huart8.Instance = UART8;
+1928:Src/main.c    ****   huart8.Init.BaudRate = 115200;
+1929:Src/main.c    ****   huart8.Init.WordLength = UART_WORDLENGTH_8B;
+1930:Src/main.c    ****   huart8.Init.StopBits = UART_STOPBITS_1;
+1931:Src/main.c    ****   huart8.Init.Parity = UART_PARITY_NONE;
+1932:Src/main.c    ****   huart8.Init.Mode = UART_MODE_TX_RX;
+1933:Src/main.c    ****   huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+1934:Src/main.c    ****   huart8.Init.OverSampling = UART_OVERSAMPLING_16;
+1935:Src/main.c    ****   huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+1936:Src/main.c    ****   huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+1937:Src/main.c    ****   if (HAL_UART_Init(&huart8) != HAL_OK)
+1938:Src/main.c    ****   {
+ARM GAS  /tmp/ccEQxcUB.s 			page 74
+
+
+1939:Src/main.c    ****     Error_Handler();
+1940:Src/main.c    ****   }
+1941:Src/main.c    ****   /* USER CODE BEGIN UART8_Init 2 */
+1942:Src/main.c    **** 
+1943:Src/main.c    ****   /* USER CODE END UART8_Init 2 */
+1944:Src/main.c    **** 
+1945:Src/main.c    **** }
+1946:Src/main.c    **** 
+1947:Src/main.c    **** /**
+1948:Src/main.c    ****   * @brief USART1 Initialization Function
+1949:Src/main.c    ****   * @param None
+1950:Src/main.c    ****   * @retval None
+1951:Src/main.c    ****   */
+1952:Src/main.c    **** static void MX_USART1_UART_Init(void)
+1953:Src/main.c    **** {
+1954:Src/main.c    **** 
+1955:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 0 */
+1956:Src/main.c    **** 
+1957:Src/main.c    ****   /* USER CODE END USART1_Init 0 */
+1958:Src/main.c    **** 
+1959:Src/main.c    ****   LL_USART_InitTypeDef USART_InitStruct = {0};
+1960:Src/main.c    **** 
+1961:Src/main.c    ****   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+1962:Src/main.c    ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+1963:Src/main.c    **** 
+1964:Src/main.c    ****   /** Initializes the peripherals clock
+1965:Src/main.c    ****   */
+1966:Src/main.c    ****   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+1967:Src/main.c    ****   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+1968:Src/main.c    ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+1969:Src/main.c    ****   {
+1970:Src/main.c    ****     Error_Handler();
+1971:Src/main.c    ****   }
+1972:Src/main.c    **** 
+1973:Src/main.c    ****   /* Peripheral clock enable */
+1974:Src/main.c    ****   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
+1975:Src/main.c    **** 
+1976:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
+1977:Src/main.c    ****   /**USART1 GPIO Configuration
+1978:Src/main.c    ****   PA9   ------> USART1_TX
+1979:Src/main.c    ****   PA10   ------> USART1_RX
+1980:Src/main.c    ****   */
+1981:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
+1982:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1983:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1984:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1985:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1986:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+1987:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+1988:Src/main.c    **** 
+1989:Src/main.c    ****   GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
+1990:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+1991:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+1992:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+1993:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+1994:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+1995:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ARM GAS  /tmp/ccEQxcUB.s 			page 75
+
+
+1996:Src/main.c    **** 
+1997:Src/main.c    ****   /* USART1 DMA Init */
+1998:Src/main.c    **** 
+1999:Src/main.c    ****   /* USART1_TX Init */
+2000:Src/main.c    ****   LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4);
+2001:Src/main.c    **** 
+2002:Src/main.c    ****   LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
+2003:Src/main.c    **** 
+2004:Src/main.c    ****   LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH);
+2005:Src/main.c    **** 
+2006:Src/main.c    ****   LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL);
+2007:Src/main.c    **** 
+2008:Src/main.c    ****   LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT);
+2009:Src/main.c    **** 
+2010:Src/main.c    ****   LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT);
+2011:Src/main.c    **** 
+2012:Src/main.c    ****   LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE);
+2013:Src/main.c    **** 
+2014:Src/main.c    ****   LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE);
+2015:Src/main.c    **** 
+2016:Src/main.c    ****   LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7);
+2017:Src/main.c    **** 
+2018:Src/main.c    ****   /* USART1 interrupt Init */
+2019:Src/main.c    ****   NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+2020:Src/main.c    ****   NVIC_EnableIRQ(USART1_IRQn);
+2021:Src/main.c    **** 
+2022:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 1 */
+2023:Src/main.c    **** 
+2024:Src/main.c    ****   /* USER CODE END USART1_Init 1 */
+2025:Src/main.c    ****   USART_InitStruct.BaudRate = 115200;
+2026:Src/main.c    ****   USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+2027:Src/main.c    ****   USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+2028:Src/main.c    ****   USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+2029:Src/main.c    ****   USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+2030:Src/main.c    ****   USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+2031:Src/main.c    ****   USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+2032:Src/main.c    ****   LL_USART_Init(USART1, &USART_InitStruct);
+2033:Src/main.c    ****   LL_USART_ConfigAsyncMode(USART1);
+2034:Src/main.c    ****   LL_USART_Enable(USART1);
+2035:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 2 */
+2036:Src/main.c    **** 
+2037:Src/main.c    ****   /* USER CODE END USART1_Init 2 */
+2038:Src/main.c    **** 
+2039:Src/main.c    **** }
+2040:Src/main.c    **** 
+2041:Src/main.c    **** /**
+2042:Src/main.c    ****   * Enable DMA controller clock
+2043:Src/main.c    ****   */
+2044:Src/main.c    **** static void MX_DMA_Init(void)
+2045:Src/main.c    **** {
+ 144              		.loc 1 2045 1 is_stmt 1 view -0
  145              		.cfi_startproc
  146              		@ args = 0, pretend = 0, frame = 8
  147              		@ frame_needed = 0, uses_anonymous_args = 0
  148 0000 00B5     		push	{lr}
  149              	.LCFI1:
  150              		.cfi_def_cfa_offset 4
+ARM GAS  /tmp/ccEQxcUB.s 			page 76
+
+
  151              		.cfi_offset 14, -4
  152 0002 83B0     		sub	sp, sp, #12
  153              	.LCFI2:
  154              		.cfi_def_cfa_offset 16
-1881:Src/main.c    **** 
-1882:Src/main.c    ****   /* Init with LL driver */
-1883:Src/main.c    ****   /* DMA controller clock enable */
-1884:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
- 155              		.loc 1 1884 3 view .LVU37
+2046:Src/main.c    **** 
+2047:Src/main.c    ****   /* Init with LL driver */
+2048:Src/main.c    ****   /* DMA controller clock enable */
+2049:Src/main.c    ****   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
+ 155              		.loc 1 2049 3 view .LVU37
  156              	.LVL8:
- 157              	.LBB331:
- 158              	.LBI331:
+ 157              	.LBB351:
+ 158              	.LBI351:
  159              		.file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h"
    1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
    2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   ******************************************************************************
@@ -4378,15 +4552,15 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifndef __STM32F7xx_LL_BUS_H
   37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define __STM32F7xx_LL_BUS_H
   38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 74
-
-
   39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifdef __cplusplus
   40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** extern "C" {
   41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif
   42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
   43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/
   44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #include "stm32f7xx.h"
+ARM GAS  /tmp/ccEQxcUB.s 			page 77
+
+
   45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
   46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver
   47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @{
@@ -4438,15 +4612,15 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(ETH)
   94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMAC          RCC_AHB1ENR_ETHMACEN
   95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACTX        RCC_AHB1ENR_ETHMACTXEN
-ARM GAS  /tmp/ccwR4KB7.s 			page 75
-
-
   96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACRX        RCC_AHB1ENR_ETHMACRXEN
   97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACPTP       RCC_AHB1ENR_ETHMACPTPEN
   98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* ETH */
   99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHS           RCC_AHB1ENR_OTGHSEN
  100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHSULPI       RCC_AHB1ENR_OTGHSULPIEN
  101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_AXI             RCC_AHB1LPENR_AXILPEN
+ARM GAS  /tmp/ccEQxcUB.s 			page 78
+
+
  102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF           RCC_AHB1LPENR_FLITFLPEN
  103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1           RCC_AHB1LPENR_SRAM1LPEN
  104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2           RCC_AHB1LPENR_SRAM2LPEN
@@ -4498,15 +4672,15 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM4           RCC_APB1ENR_TIM4EN
  151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM5           RCC_APB1ENR_TIM5EN
  152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM6           RCC_APB1ENR_TIM6EN
-ARM GAS  /tmp/ccwR4KB7.s 			page 76
-
-
  153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM7           RCC_APB1ENR_TIM7EN
  154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM12          RCC_APB1ENR_TIM12EN
  155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM13          RCC_APB1ENR_TIM13EN
  156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM14          RCC_APB1ENR_TIM14EN
  157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1         RCC_APB1ENR_LPTIM1EN
  158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG           RCC_APB1ENR_WWDGEN
+ARM GAS  /tmp/ccEQxcUB.s 			page 79
+
+
  159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2           RCC_APB1ENR_SPI2EN
  160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3           RCC_APB1ENR_SPI3EN
  161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX)
@@ -4558,15 +4732,15 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SDMMC2)
  208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SDMMC2       RCC_APB2ENR_SDMMC2EN
  209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SDMMC2 */
-ARM GAS  /tmp/ccwR4KB7.s 			page 77
-
-
  210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI1         RCC_APB2ENR_SPI1EN
  211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI4         RCC_APB2ENR_SPI4EN
  212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SYSCFG       RCC_APB2ENR_SYSCFGEN
  213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM9         RCC_APB2ENR_TIM9EN
  214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM10        RCC_APB2ENR_TIM10EN
  215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM11        RCC_APB2ENR_TIM11EN
+ARM GAS  /tmp/ccEQxcUB.s 			page 80
+
+
  216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5         RCC_APB2ENR_SPI5EN
  217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6)
  218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6         RCC_APB2ENR_SPI6EN
@@ -4618,15 +4792,15 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOGEN            LL_AHB1_GRP1_EnableClock\n
  265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOHEN            LL_AHB1_GRP1_EnableClock\n
  266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOIEN            LL_AHB1_GRP1_EnableClock\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 78
-
-
  267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOJEN            LL_AHB1_GRP1_EnableClock\n
  268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOKEN            LL_AHB1_GRP1_EnableClock\n
  269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      CRCEN              LL_AHB1_GRP1_EnableClock\n
  270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      BKPSRAMEN          LL_AHB1_GRP1_EnableClock\n
  271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      DTCMRAMEN          LL_AHB1_GRP1_EnableClock\n
  272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      DMA1EN             LL_AHB1_GRP1_EnableClock\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 81
+
+
  273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      DMA2EN             LL_AHB1_GRP1_EnableClock\n
  274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      DMA2DEN            LL_AHB1_GRP1_EnableClock\n
  275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      ETHMACEN           LL_AHB1_GRP1_EnableClock\n
@@ -4665,7 +4839,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
  309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
  160              		.loc 3 309 22 view .LVU38
- 161              	.LBB332:
+ 161              	.LBB352:
  310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
  311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   __IO uint32_t tmpreg;
  162              		.loc 3 311 3 view .LVU39
@@ -4678,50 +4852,50 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->AHB1ENR, Periphs);
  168              		.loc 3 314 3 view .LVU41
-ARM GAS  /tmp/ccwR4KB7.s 			page 79
-
-
  169              		.loc 3 314 12 is_stmt 0 view .LVU42
  170 000e 1B6B     		ldr	r3, [r3, #48]
  171 0010 03F48003 		and	r3, r3, #4194304
  172              		.loc 3 314 10 view .LVU43
  173 0014 0193     		str	r3, [sp, #4]
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ARM GAS  /tmp/ccEQxcUB.s 			page 82
+
+
  174              		.loc 3 315 3 is_stmt 1 view .LVU44
  175 0016 019B     		ldr	r3, [sp, #4]
  176              	.LVL9:
  177              		.loc 3 315 3 is_stmt 0 view .LVU45
- 178              	.LBE332:
- 179              	.LBE331:
-1885:Src/main.c    **** 
-1886:Src/main.c    ****   /* DMA interrupt init */
-1887:Src/main.c    ****   /* DMA2_Stream7_IRQn interrupt configuration */
-1888:Src/main.c    ****   NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- 180              		.loc 1 1888 3 is_stmt 1 view .LVU46
- 181              	.LBB333:
- 182              	.LBI333:
+ 178              	.LBE352:
+ 179              	.LBE351:
+2050:Src/main.c    **** 
+2051:Src/main.c    ****   /* DMA interrupt init */
+2052:Src/main.c    ****   /* DMA2_Stream7_IRQn interrupt configuration */
+2053:Src/main.c    ****   NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ 180              		.loc 1 2053 3 is_stmt 1 view .LVU46
+ 181              	.LBB353:
+ 182              	.LBI353:
 1884:Drivers/CMSIS/Include/core_cm7.h **** {
  183              		.loc 2 1884 26 view .LVU47
- 184              	.LBB334:
+ 184              	.LBB354:
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
  185              		.loc 2 1886 3 view .LVU48
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
  186              		.loc 2 1886 26 is_stmt 0 view .LVU49
  187 0018 094B     		ldr	r3, .L10+4
  188 001a D868     		ldr	r0, [r3, #12]
- 189              	.LBE334:
- 190              	.LBE333:
- 191              		.loc 1 1888 3 discriminator 1 view .LVU50
+ 189              	.LBE354:
+ 190              	.LBE353:
+ 191              		.loc 1 2053 3 discriminator 1 view .LVU50
  192 001c 0022     		movs	r2, #0
  193 001e 1146     		mov	r1, r2
  194 0020 C0F30220 		ubfx	r0, r0, #8, #3
  195 0024 FFF7FEFF 		bl	NVIC_EncodePriority
  196              	.LVL10:
- 197              	.LBB335:
- 198              	.LBI335:
+ 197              	.LBB355:
+ 198              	.LBI355:
 2024:Drivers/CMSIS/Include/core_cm7.h **** {
  199              		.loc 2 2024 22 is_stmt 1 view .LVU51
- 200              	.LBB336:
+ 200              	.LBB356:
 2026:Drivers/CMSIS/Include/core_cm7.h ****   {
  201              		.loc 2 2026 3 view .LVU52
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
@@ -4738,20 +4912,20 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  209 002c 054B     		ldr	r3, .L10+8
  210 002e 83F84603 		strb	r0, [r3, #838]
  211              	.LVL12:
-ARM GAS  /tmp/ccwR4KB7.s 			page 80
-
-
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
  212              		.loc 2 2028 47 view .LVU57
- 213              	.LBE336:
- 214              	.LBE335:
-1889:Src/main.c    ****   NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- 215              		.loc 1 1889 3 is_stmt 1 view .LVU58
- 216              	.LBB337:
- 217              	.LBI337:
+ 213              	.LBE356:
+ 214              	.LBE355:
+2054:Src/main.c    ****   NVIC_EnableIRQ(DMA2_Stream7_IRQn);
+ 215              		.loc 1 2054 3 is_stmt 1 view .LVU58
+ARM GAS  /tmp/ccEQxcUB.s 			page 83
+
+
+ 216              	.LBB357:
+ 217              	.LBI357:
 1896:Drivers/CMSIS/Include/core_cm7.h **** {
  218              		.loc 2 1896 22 view .LVU59
- 219              	.LBB338:
+ 219              	.LBB358:
 1898:Drivers/CMSIS/Include/core_cm7.h ****   {
  220              		.loc 2 1898 3 view .LVU60
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
@@ -4763,11 +4937,11 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  225              	.LVL13:
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
  226              		.loc 2 1900 43 view .LVU63
- 227              	.LBE338:
- 228              	.LBE337:
-1890:Src/main.c    **** 
-1891:Src/main.c    **** }
- 229              		.loc 1 1891 1 view .LVU64
+ 227              	.LBE358:
+ 228              	.LBE357:
+2055:Src/main.c    **** 
+2056:Src/main.c    **** }
+ 229              		.loc 1 2056 1 view .LVU64
  230 0036 03B0     		add	sp, sp, #12
  231              	.LCFI3:
  232              		.cfi_def_cfa_offset 4
@@ -4780,7 +4954,7 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  239 0040 00ED00E0 		.word	-536810240
  240 0044 00E100E0 		.word	-536813312
  241              		.cfi_endproc
- 242              	.LFE1205:
+ 242              	.LFE1206:
  244              		.section	.text.Decode_task,"ax",%progbits
  245              		.align	1
  246              		.syntax unified
@@ -4788,817 +4962,827 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  248              		.thumb_func
  250              	Decode_task:
  251              	.LVL14:
- 252              	.LFB1209:
-1892:Src/main.c    **** 
-1893:Src/main.c    **** /**
-1894:Src/main.c    ****   * @brief GPIO Initialization Function
-1895:Src/main.c    ****   * @param None
-1896:Src/main.c    ****   * @retval None
-1897:Src/main.c    ****   */
-1898:Src/main.c    **** static void MX_GPIO_Init(void)
-1899:Src/main.c    **** {
-1900:Src/main.c    ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
-ARM GAS  /tmp/ccwR4KB7.s 			page 81
+ 252              	.LFB1210:
+2057:Src/main.c    **** 
+2058:Src/main.c    **** /**
+2059:Src/main.c    ****   * @brief GPIO Initialization Function
+2060:Src/main.c    ****   * @param None
+2061:Src/main.c    ****   * @retval None
+2062:Src/main.c    ****   */
+2063:Src/main.c    **** static void MX_GPIO_Init(void)
+2064:Src/main.c    **** {
+2065:Src/main.c    ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
+2066:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_1 */
+2067:Src/main.c    ****   /* USER CODE END MX_GPIO_Init_1 */
+2068:Src/main.c    **** 
+2069:Src/main.c    ****   /* GPIO Ports Clock Enable */
+2070:Src/main.c    ****   __HAL_RCC_GPIOF_CLK_ENABLE();
+2071:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
+ARM GAS  /tmp/ccEQxcUB.s 			page 84
 
 
-1901:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_1 */
-1902:Src/main.c    ****   /* USER CODE END MX_GPIO_Init_1 */
-1903:Src/main.c    **** 
-1904:Src/main.c    ****   /* GPIO Ports Clock Enable */
-1905:Src/main.c    ****   __HAL_RCC_GPIOF_CLK_ENABLE();
-1906:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
-1907:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
-1908:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
-1909:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
-1910:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
-1911:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
-1912:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
-1913:Src/main.c    **** 
-1914:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1915:Src/main.c    ****   HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
-1916:Src/main.c    **** 
-1917:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1918:Src/main.c    ****   HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET);
-1919:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
-1920:Src/main.c    **** 
-1921:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1922:Src/main.c    ****   HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET);
-1923:Src/main.c    **** 
-1924:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1925:Src/main.c    ****   HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
-1926:Src/main.c    **** 
-1927:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1928:Src/main.c    ****   HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
-1929:Src/main.c    **** 
-1930:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1931:Src/main.c    ****   HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
-1932:Src/main.c    **** 
-1933:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1934:Src/main.c    ****   HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
-1935:Src/main.c    ****                           |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
-1936:Src/main.c    **** 
-1937:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1938:Src/main.c    ****   HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-1939:Src/main.c    **** 
-1940:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1941:Src/main.c    ****   HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
-1942:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-1943:Src/main.c    **** 
-1944:Src/main.c    ****   /*Configure GPIO pin Output Level */
-1945:Src/main.c    ****   HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
-1946:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET);
-1947:Src/main.c    **** 
-1948:Src/main.c    ****   /*Configure GPIO pins : INP_0_Pin INP_1_Pin */
-1949:Src/main.c    ****   GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin;
-1950:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-1951:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_PULLUP;
-1952:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-1953:Src/main.c    **** 
-1954:Src/main.c    ****   /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */
-1955:Src/main.c    ****   GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin;
-1956:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-1957:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-ARM GAS  /tmp/ccwR4KB7.s 			page 82
+2072:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+2073:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+2074:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+2075:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
+2076:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+2077:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
+2078:Src/main.c    **** 
+2079:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2080:Src/main.c    ****   HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
+2081:Src/main.c    **** 
+2082:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2083:Src/main.c    ****   HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET);
+2084:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+2085:Src/main.c    **** 
+2086:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2087:Src/main.c    ****   HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET);
+2088:Src/main.c    **** 
+2089:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2090:Src/main.c    ****   HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
+2091:Src/main.c    **** 
+2092:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2093:Src/main.c    ****   HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
+2094:Src/main.c    ****   HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET);
+2095:Src/main.c    **** 
+2096:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2097:Src/main.c    ****   HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
+2098:Src/main.c    **** 
+2099:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2100:Src/main.c    ****   HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
+2101:Src/main.c    ****                           |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
+2102:Src/main.c    **** 
+2103:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2104:Src/main.c    ****   HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+2105:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+2106:Src/main.c    **** 
+2107:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2108:Src/main.c    ****   HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
+2109:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+2110:Src/main.c    ****   HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
+2111:Src/main.c    **** 
+2112:Src/main.c    ****   /*Configure GPIO pin Output Level */
+2113:Src/main.c    ****   HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
+2114:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET);
+2115:Src/main.c    **** 
+2116:Src/main.c    ****   /*Configure GPIO pins : INP_0_Pin INP_1_Pin */
+2117:Src/main.c    ****   GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin;
+2118:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+2119:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_PULLUP;
+2120:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+2121:Src/main.c    **** 
+2122:Src/main.c    ****   /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */
+2123:Src/main.c    ****   GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin;
+2124:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2125:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2126:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+2127:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+2128:Src/main.c    **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 85
 
 
-1958:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-1959:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-1960:Src/main.c    **** 
-1961:Src/main.c    ****   /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */
-1962:Src/main.c    ****   GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin;
-1963:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-1964:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-1965:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-1966:Src/main.c    ****   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-1967:Src/main.c    **** 
-1968:Src/main.c    ****   /*Configure GPIO pin : EN_5V1_Pin */
-1969:Src/main.c    ****   GPIO_InitStruct.Pin = EN_5V1_Pin;
-1970:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-1971:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-1972:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-1973:Src/main.c    ****   HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
-1974:Src/main.c    **** 
-1975:Src/main.c    ****   /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin
-1976:Src/main.c    ****                            DAC_LD2_CS_Pin */
-1977:Src/main.c    ****   GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin
-1978:Src/main.c    ****                           |DAC_LD2_CS_Pin;
-1979:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-1980:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-1981:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-1982:Src/main.c    ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-1983:Src/main.c    **** 
-1984:Src/main.c    ****   /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */
-1985:Src/main.c    ****   GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin;
-1986:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-1987:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-1988:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-1989:Src/main.c    **** 
-1990:Src/main.c    ****   /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */
-1991:Src/main.c    ****   GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin;
-1992:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-1993:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-1994:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-1995:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-1996:Src/main.c    **** 
-1997:Src/main.c    ****   /*Configure GPIO pin : SPI4_CNV_Pin */
-1998:Src/main.c    ****   GPIO_InitStruct.Pin = SPI4_CNV_Pin;
-1999:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2000:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-2001:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-2002:Src/main.c    ****   HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
-2003:Src/main.c    **** 
-2004:Src/main.c    ****   /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin
-2005:Src/main.c    ****                            OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
-2006:Src/main.c    ****   GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin
-2007:Src/main.c    ****                           |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
-2008:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2009:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-2010:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2011:Src/main.c    ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-2012:Src/main.c    **** 
-2013:Src/main.c    ****   /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */
-2014:Src/main.c    ****   GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin;
-ARM GAS  /tmp/ccwR4KB7.s 			page 83
+2129:Src/main.c    ****   /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */
+2130:Src/main.c    ****   GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin;
+2131:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2132:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2133:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+2134:Src/main.c    ****   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+2135:Src/main.c    **** 
+2136:Src/main.c    ****   /*Configure GPIO pin : EN_5V1_Pin */
+2137:Src/main.c    ****   GPIO_InitStruct.Pin = EN_5V1_Pin;
+2138:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2139:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2140:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+2141:Src/main.c    ****   HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
+2142:Src/main.c    **** 
+2143:Src/main.c    ****   /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin
+2144:Src/main.c    ****                            DAC_LD2_CS_Pin */
+2145:Src/main.c    ****   GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin
+2146:Src/main.c    ****                           |DAC_LD2_CS_Pin;
+2147:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2148:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2149:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+2150:Src/main.c    ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+2151:Src/main.c    **** 
+2152:Src/main.c    ****   /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */
+2153:Src/main.c    ****   GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin;
+2154:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+2155:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2156:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+2157:Src/main.c    **** 
+2158:Src/main.c    ****   /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */
+2159:Src/main.c    ****   GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin;
+2160:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2161:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2162:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+2163:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+2164:Src/main.c    **** 
+2165:Src/main.c    ****   /*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */
+2166:Src/main.c    ****   GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin;
+2167:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+2168:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2169:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+2170:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+2171:Src/main.c    **** 
+2172:Src/main.c    ****   /*Configure GPIO pin : SPI4_CNV_Pin */
+2173:Src/main.c    ****   GPIO_InitStruct.Pin = SPI4_CNV_Pin;
+2174:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2175:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2176:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+2177:Src/main.c    ****   HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
+2178:Src/main.c    **** 
+2179:Src/main.c    ****   /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin
+2180:Src/main.c    ****                            OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
+2181:Src/main.c    ****   GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin
+2182:Src/main.c    ****                           |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
+2183:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2184:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2185:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ARM GAS  /tmp/ccEQxcUB.s 			page 86
 
 
-2015:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2016:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-2017:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2018:Src/main.c    ****   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-2019:Src/main.c    **** 
-2020:Src/main.c    ****   /*Configure GPIO pin : USB_FLAG_Pin */
-2021:Src/main.c    ****   GPIO_InitStruct.Pin = USB_FLAG_Pin;
-2022:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-2023:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-2024:Src/main.c    ****   HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
-2025:Src/main.c    **** 
-2026:Src/main.c    ****   /*Configure GPIO pin : SDMMC1_EN_Pin */
-2027:Src/main.c    ****   GPIO_InitStruct.Pin = SDMMC1_EN_Pin;
-2028:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-2029:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-2030:Src/main.c    ****   HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
-2031:Src/main.c    **** 
-2032:Src/main.c    ****   /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin
-2033:Src/main.c    ****                            OUT_3_Pin OUT_4_Pin OUT_5_Pin */
-2034:Src/main.c    ****   GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
-2035:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
-2036:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2037:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-2038:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2039:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
-2040:Src/main.c    **** 
-2041:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_2 */
-2042:Src/main.c    ****   /* USER CODE END MX_GPIO_Init_2 */
-2043:Src/main.c    **** }
-2044:Src/main.c    **** 
-2045:Src/main.c    **** /* USER CODE BEGIN 4 */
-2046:Src/main.c    **** 
-2047:Src/main.c    **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
-2048:Src/main.c    **** 
-2049:Src/main.c    **** //	UART_transmission_request = NO_MESS;
-2050:Src/main.c    **** 
-2051:Src/main.c    **** //}
-2052:Src/main.c    **** 
-2053:Src/main.c    **** static void Init_params(void)
-2054:Src/main.c    **** {
-2055:Src/main.c    **** 	TO6 = 0;
-2056:Src/main.c    **** 	TO7 = 0;
-2057:Src/main.c    **** 	TO7_before = 0;
-2058:Src/main.c    **** 	TO6_before = 0;
-2059:Src/main.c    **** 	TO6_uart = 0;
-2060:Src/main.c    **** 	flg_tmt = 0;
-2061:Src/main.c    **** 	UART_rec_incr = 0;
-2062:Src/main.c    **** 	fgoto = 0;
-2063:Src/main.c    **** 	sizeoffile = 0;
-2064:Src/main.c    **** 	u_tx_flg = 0;
-2065:Src/main.c    **** 	u_rx_flg = 0;
-2066:Src/main.c    **** 	//State_Data[0]=0;
-2067:Src/main.c    **** 	//State_Data[1]=0;//All OK!
-2068:Src/main.c    **** 	for (uint16_t i=0; i<DL_16; i++)
-2069:Src/main.c    **** 	{
-2070:Src/main.c    **** 		Long_Data[i] = 0x00;
-2071:Src/main.c    **** 	}
-ARM GAS  /tmp/ccwR4KB7.s 			page 84
+2186:Src/main.c    ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+2187:Src/main.c    **** 
+2188:Src/main.c    ****   /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin 
+2189:Src/main.c    ****   GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS
+2190:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2191:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2192:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+2193:Src/main.c    ****   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+2194:Src/main.c    **** 
+2195:Src/main.c    ****   /*Configure GPIO pin : USB_FLAG_Pin */
+2196:Src/main.c    ****   GPIO_InitStruct.Pin = USB_FLAG_Pin;
+2197:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+2198:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2199:Src/main.c    ****   HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
+2200:Src/main.c    **** 
+2201:Src/main.c    ****   /*Configure GPIO pin : SDMMC1_EN_Pin */
+2202:Src/main.c    ****   GPIO_InitStruct.Pin = SDMMC1_EN_Pin;
+2203:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+2204:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2205:Src/main.c    ****   HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
+2206:Src/main.c    **** 
+2207:Src/main.c    ****   /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin
+2208:Src/main.c    ****                            OUT_3_Pin OUT_4_Pin OUT_5_Pin */
+2209:Src/main.c    ****   GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
+2210:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
+2211:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+2212:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+2213:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+2214:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+2215:Src/main.c    **** 
+2216:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_2 */
+2217:Src/main.c    ****   /* USER CODE END MX_GPIO_Init_2 */
+2218:Src/main.c    **** }
+2219:Src/main.c    **** 
+2220:Src/main.c    **** /* USER CODE BEGIN 4 */
+2221:Src/main.c    **** 
+2222:Src/main.c    **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
+2223:Src/main.c    **** 
+2224:Src/main.c    **** //	UART_transmission_request = NO_MESS;
+2225:Src/main.c    **** 
+2226:Src/main.c    **** //}
+2227:Src/main.c    **** 
+2228:Src/main.c    **** static void Init_params(void)
+2229:Src/main.c    **** {
+2230:Src/main.c    **** 	TO6 = 0;
+2231:Src/main.c    **** 	TO7 = 0;
+2232:Src/main.c    **** 	TO7_before = 0;
+2233:Src/main.c    **** 	TO6_before = 0;
+2234:Src/main.c    **** 	TO6_uart = 0;
+2235:Src/main.c    **** 	flg_tmt = 0;
+2236:Src/main.c    **** 	UART_rec_incr = 0;
+2237:Src/main.c    **** 	fgoto = 0;
+2238:Src/main.c    **** 	sizeoffile = 0;
+2239:Src/main.c    **** 	u_tx_flg = 0;
+2240:Src/main.c    **** 	u_rx_flg = 0;
+2241:Src/main.c    **** 	//State_Data[0]=0;
+2242:Src/main.c    **** 	//State_Data[1]=0;//All OK!
+ARM GAS  /tmp/ccEQxcUB.s 			page 87
 
 
-2072:Src/main.c    **** 	Long_Data[0]=0x1111;
-2073:Src/main.c    **** 	
-2074:Src/main.c    **** 	//Set default parameters
-2075:Src/main.c    **** 	Def_setup.AVERAGES = 0;
-2076:Src/main.c    **** 	Def_setup.LD1_EN = 0;
-2077:Src/main.c    **** 	Def_setup.LD2_EN = 0;
-2078:Src/main.c    **** 	Def_setup.MES_ID = 0;
-2079:Src/main.c    **** 	Def_setup.PI1_RD = 0;
-2080:Src/main.c    **** 	Def_setup.PI2_RD = 0;
-2081:Src/main.c    **** 	Def_setup.REF1_EN = 0;
-2082:Src/main.c    **** 	Def_setup.REF2_EN = 0;
-2083:Src/main.c    **** 	Def_setup.SD_EN = 0;
-2084:Src/main.c    **** 	Def_setup.TEC1_EN = 0;
-2085:Src/main.c    **** 	Def_setup.TEC2_EN = 0;
-2086:Src/main.c    **** 	Def_setup.TS1_EN = 0;
-2087:Src/main.c    **** 	Def_setup.TS2_EN = 0;
-2088:Src/main.c    **** 	Def_setup.U5V1_EN = 0;
-2089:Src/main.c    **** 	Def_setup.U5V2_EN = 0;
-2090:Src/main.c    **** 	Def_setup.WORK_EN = 0;
-2091:Src/main.c    **** 	
-2092:Src/main.c    **** 	LD1_def_setup.LD_TEMP = 0;
-2093:Src/main.c    **** 	LD2_def_setup.LD_TEMP = 0;
-2094:Src/main.c    **** 	LD1_def_setup.P_coef_temp = 0;
-2095:Src/main.c    **** 	LD2_def_setup.P_coef_temp = 0;
-2096:Src/main.c    **** 	LD1_def_setup.I_coef_temp = 0;
-2097:Src/main.c    **** 	LD2_def_setup.I_coef_temp = 0;
-2098:Src/main.c    **** 	
-2099:Src/main.c    **** 	//Set current setup to default
-2100:Src/main.c    **** 	Curr_setup = Def_setup;
-2101:Src/main.c    **** 	LD1_curr_setup = LD1_def_setup;
-2102:Src/main.c    **** 	LD2_curr_setup = LD2_def_setup;
-2103:Src/main.c    **** 	
-2104:Src/main.c    **** 	
-2105:Src/main.c    **** 	
-2106:Src/main.c    **** 	//Start timers 6 & 7
-2107:Src/main.c    **** 	LL_TIM_EnableIT_UPDATE(TIM6);
-2108:Src/main.c    **** 	LL_TIM_EnableCounter(TIM6);
-2109:Src/main.c    **** 	LL_TIM_EnableIT_UPDATE(TIM7);
-2110:Src/main.c    **** 	LL_TIM_EnableCounter(TIM7);
-2111:Src/main.c    **** 	//HAL_TIM_Base_Start_IT(&htim6);
-2112:Src/main.c    **** 	//HAL_TIM_Base_Start_IT(&htim7);
-2113:Src/main.c    **** 	//Start listen usart port
-2114:Src/main.c    **** 
-2115:Src/main.c    **** 	
-2116:Src/main.c    **** 	//Enable DMA
-2117:Src/main.c    ****   LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
-2118:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
-2119:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
-2120:Src/main.c    ****   LL_USART_EnableDMAReq_TX(USART1);
-2121:Src/main.c    ****   LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7);
-2122:Src/main.c    ****   LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7);
-2123:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
-2124:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
-2125:Src/main.c    ****   LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART
-2126:Src/main.c    **** 	
-2127:Src/main.c    **** 	//HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
-2128:Src/main.c    **** 	
-ARM GAS  /tmp/ccwR4KB7.s 			page 85
+2243:Src/main.c    **** 	for (uint16_t i=0; i<DL_16; i++)
+2244:Src/main.c    **** 	{
+2245:Src/main.c    **** 		Long_Data[i] = 0x00;
+2246:Src/main.c    **** 	}
+2247:Src/main.c    **** 	Long_Data[0]=0x1111;
+2248:Src/main.c    **** 	
+2249:Src/main.c    **** 	//Set default parameters
+2250:Src/main.c    **** 	Def_setup.AVERAGES = 0;
+2251:Src/main.c    **** 	Def_setup.LD1_EN = 0;
+2252:Src/main.c    **** 	Def_setup.LD2_EN = 0;
+2253:Src/main.c    **** 	Def_setup.MES_ID = 0;
+2254:Src/main.c    **** 	Def_setup.PI1_RD = 0;
+2255:Src/main.c    **** 	Def_setup.PI2_RD = 0;
+2256:Src/main.c    **** 	Def_setup.REF1_EN = 0;
+2257:Src/main.c    **** 	Def_setup.REF2_EN = 0;
+2258:Src/main.c    **** 	Def_setup.SD_EN = 0;
+2259:Src/main.c    **** 	Def_setup.TEC1_EN = 0;
+2260:Src/main.c    **** 	Def_setup.TEC2_EN = 0;
+2261:Src/main.c    **** 	Def_setup.TS1_EN = 0;
+2262:Src/main.c    **** 	Def_setup.TS2_EN = 0;
+2263:Src/main.c    **** 	Def_setup.U5V1_EN = 0;
+2264:Src/main.c    **** 	Def_setup.U5V2_EN = 0;
+2265:Src/main.c    **** 	Def_setup.WORK_EN = 0;
+2266:Src/main.c    **** 	
+2267:Src/main.c    **** 	LD1_def_setup.LD_TEMP = 0;
+2268:Src/main.c    **** 	LD2_def_setup.LD_TEMP = 0;
+2269:Src/main.c    **** 	LD1_def_setup.P_coef_temp = 0;
+2270:Src/main.c    **** 	LD2_def_setup.P_coef_temp = 0;
+2271:Src/main.c    **** 	LD1_def_setup.I_coef_temp = 0;
+2272:Src/main.c    **** 	LD2_def_setup.I_coef_temp = 0;
+2273:Src/main.c    **** 	
+2274:Src/main.c    **** 	//Set current setup to default
+2275:Src/main.c    **** 	Curr_setup = Def_setup;
+2276:Src/main.c    **** 	LD1_curr_setup = LD1_def_setup;
+2277:Src/main.c    **** 	LD2_curr_setup = LD2_def_setup;
+2278:Src/main.c    **** 	
+2279:Src/main.c    **** 	
+2280:Src/main.c    **** 	
+2281:Src/main.c    **** 	//Start timers 6 & 7
+2282:Src/main.c    **** 	LL_TIM_EnableIT_UPDATE(TIM6);
+2283:Src/main.c    **** 	LL_TIM_EnableCounter(TIM6);
+2284:Src/main.c    **** 	LL_TIM_EnableIT_UPDATE(TIM7);
+2285:Src/main.c    **** 	LL_TIM_EnableCounter(TIM7);
+2286:Src/main.c    **** 	//HAL_TIM_Base_Start_IT(&htim6);
+2287:Src/main.c    **** 	//HAL_TIM_Base_Start_IT(&htim7);
+2288:Src/main.c    **** 	//Start listen usart port
+2289:Src/main.c    **** 
+2290:Src/main.c    **** 	
+2291:Src/main.c    **** 	//Enable DMA
+2292:Src/main.c    ****   LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
+2293:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
+2294:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
+2295:Src/main.c    ****   LL_USART_EnableDMAReq_TX(USART1);
+2296:Src/main.c    ****   LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7);
+2297:Src/main.c    ****   LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7);
+2298:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
+2299:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
+ARM GAS  /tmp/ccEQxcUB.s 			page 88
 
 
-2129:Src/main.c    **** 	
-2130:Src/main.c    **** 	SD_SEEK = 0;
-2131:Src/main.c    **** 	SD_SLIDE = 0;
-2132:Src/main.c    **** 	//Reset all periphery
-2133:Src/main.c    **** 	HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
-2134:Src/main.c    **** 	HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
-2135:Src/main.c    **** 	HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
-2136:Src/main.c    **** 	HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
-2137:Src/main.c    **** 	HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
-2138:Src/main.c    **** 	HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
-2139:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
-2140:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
-2141:Src/main.c    **** 	HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
-2142:Src/main.c    **** 	HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
-2143:Src/main.c    **** //	for (uint16_t i = 0; i < SD_Length; i++)
-2144:Src/main.c    **** //	{
-2145:Src/main.c    **** //		for (uint16_t j = 0; j < DL_16; j++)
-2146:Src/main.c    **** //		{
-2147:Src/main.c    **** //			SD_matr[i][j] = 0;
-2148:Src/main.c    **** //		}
-2149:Src/main.c    **** //	}
-2150:Src/main.c    **** 	//LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC
-2151:Src/main.c    **** 	//LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC
-2152:Src/main.c    **** 	HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD1 ADC
-2153:Src/main.c    **** 	HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC
-2154:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
-2155:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
-2156:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
-2157:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
-2158:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 
-2159:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 
-2160:Src/main.c    **** 	
-2161:Src/main.c    **** 	//------------------------------------------------------------------------------------------------
-2162:Src/main.c    **** 	//test = 11;
-2163:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)//if exist sd && disconne
-2164:Src/main.c    **** 	{
-2165:Src/main.c    **** 		//test = 14;
-2166:Src/main.c    **** 		if (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_RESET)
-2167:Src/main.c    **** 		{
-2168:Src/main.c    **** 			//test = 15;
-2169:Src/main.c    **** 			test = Mount_SD("/");
-2170:Src/main.c    **** 			if (test == 0) //0 - suc
-2171:Src/main.c    **** 			{
-2172:Src/main.c    **** 				//Format_SD();
-2173:Src/main.c    **** 				test = Seek_Read_File ("COMMAND.TXT", (uint8_t *)COMMAND, DL_8, DL_8);//Read next DL_8 bytes
-2174:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
-2175:Src/main.c    **** 				UART_rec_incr = 0;
-2176:Src/main.c    **** 				flg_tmt = 0;//Reset the timeout flag
-2177:Src/main.c    **** 			}
-2178:Src/main.c    **** //			else
-2179:Src/main.c    **** //			{
-2180:Src/main.c    **** //				test = 13;
-2181:Src/main.c    **** //			}
-2182:Src/main.c    **** 			CPU_state = DECODE_ENABLE;//Decoding data with last saved settings
-2183:Src/main.c    **** 		}
-2184:Src/main.c    **** //		else
-2185:Src/main.c    **** //		{
-ARM GAS  /tmp/ccwR4KB7.s 			page 86
-
-
-2186:Src/main.c    **** //			test = 16;
-2187:Src/main.c    **** //		}
-2188:Src/main.c    **** 	}
-2189:Src/main.c    **** //	else
-2190:Src/main.c    **** //	{
-2191:Src/main.c    **** //		test = 12;
-2192:Src/main.c    **** //	}
-2193:Src/main.c    **** 
-2194:Src/main.c    **** 	AD9102_Init();
-2195:Src/main.c    **** }
-2196:Src/main.c    **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
-2197:Src/main.c    **** {
-2198:Src/main.c    **** //	uint8_t *temp1;
-2199:Src/main.c    **** 	uint16_t *temp2;
-2200:Src/main.c    **** 	
-2201:Src/main.c    **** 	//------------------------------------------------------------------------------------------------
-2202:Src/main.c    **** 	
-2203:Src/main.c    **** 
-2204:Src/main.c    **** 	test=0;
-2205:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
-2206:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
-2207:Src/main.c    **** 	{
-2208:Src/main.c    **** 		test = Mount_SD("/");
-2209:Src/main.c    **** 		if (test == 0) //0 - suc
-2210:Src/main.c    **** 		{
-2211:Src/main.c    **** 			//Format_SD();
-2212:Src/main.c    **** 			test = Remove_File ("COMMAND.TXT");
-2213:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
-2214:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
-2215:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
-2216:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
-2217:Src/main.c    **** 		}
-2218:Src/main.c    **** 	}
-2219:Src/main.c    **** 	
-2220:Src/main.c    **** 	temp2 = (uint16_t *)Command;
-2221:Src/main.c    **** 	Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
-2222:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
-2223:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
-2224:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
-2225:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
-2226:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
-2227:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
-2228:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
-2229:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
-2230:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
-2231:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
-2232:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
-2233:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
-2234:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
-2235:Src/main.c    **** 	
-2236:Src/main.c    **** 	temp2++;
-2237:Src/main.c    **** 	LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
-2238:Src/main.c    **** 	temp2++;
-2239:Src/main.c    **** 	LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
-2240:Src/main.c    **** 	temp2++;
-2241:Src/main.c    **** 	temp2++;
-2242:Src/main.c    **** 	temp2++;
-ARM GAS  /tmp/ccwR4KB7.s 			page 87
-
-
-2243:Src/main.c    **** 	Curr_setup->AVERAGES = (uint16_t)(*temp2);
-2244:Src/main.c    **** 	temp2++;
-2245:Src/main.c    **** 	LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2246:Src/main.c    **** 	temp2++;
-2247:Src/main.c    **** 	LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2248:Src/main.c    **** 	temp2++;
-2249:Src/main.c    **** 	LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2250:Src/main.c    **** 	temp2++;
-2251:Src/main.c    **** 	LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2252:Src/main.c    **** 	temp2++;
-2253:Src/main.c    **** 	Long_Data[13] = (uint16_t)(*temp2);//Message ID
-2254:Src/main.c    **** 	temp2++;
-2255:Src/main.c    **** 	LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
-2256:Src/main.c    **** 	temp2++;
-2257:Src/main.c    **** 	LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
-2258:Src/main.c    **** 	temp2++;
-2259:Src/main.c    **** 	
-2260:Src/main.c    **** 	if (Curr_setup->U5V1_EN)
-2261:Src/main.c    **** 	{
-2262:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET);
-2263:Src/main.c    **** 	}
-2264:Src/main.c    **** 	else
-2265:Src/main.c    **** 	{
-2266:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
-2267:Src/main.c    **** 	}
-2268:Src/main.c    **** 	
-2269:Src/main.c    **** 	if (Curr_setup->U5V2_EN)
-2270:Src/main.c    **** 	{
-2271:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET);
-2272:Src/main.c    **** 	}
-2273:Src/main.c    **** 	else
-2274:Src/main.c    **** 	{
-2275:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
-2276:Src/main.c    **** 	}
-2277:Src/main.c    **** 	
-2278:Src/main.c    **** 	if (Curr_setup->LD1_EN)
-2279:Src/main.c    **** 	{
-2280:Src/main.c    **** 		HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET);
-2281:Src/main.c    **** 		//LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
-2282:Src/main.c    **** 	}
-2283:Src/main.c    **** 	else
-2284:Src/main.c    **** 	{
-2285:Src/main.c    **** 		HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
-2286:Src/main.c    **** 		//LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
-2287:Src/main.c    **** 	}
-2288:Src/main.c    **** 	
-2289:Src/main.c    **** 	if (Curr_setup->LD2_EN)
-2290:Src/main.c    **** 	{
-2291:Src/main.c    **** 		HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET);
-2292:Src/main.c    **** 		//LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
-2293:Src/main.c    **** 	}
-2294:Src/main.c    **** 	else
-2295:Src/main.c    **** 	{
-2296:Src/main.c    **** 		HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
-2297:Src/main.c    **** 		//LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
-2298:Src/main.c    **** 	}
-2299:Src/main.c    **** 	
-ARM GAS  /tmp/ccwR4KB7.s 			page 88
-
-
-2300:Src/main.c    **** 	if (Curr_setup->REF1_EN)
-2301:Src/main.c    **** 	{
-2302:Src/main.c    **** 		HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET);
-2303:Src/main.c    **** 	}
-2304:Src/main.c    **** 	else
-2305:Src/main.c    **** 	{
-2306:Src/main.c    **** 		HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
-2307:Src/main.c    **** 	}
-2308:Src/main.c    **** 	
-2309:Src/main.c    **** 	if (Curr_setup->REF2_EN)
-2310:Src/main.c    **** 	{
-2311:Src/main.c    **** 		HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET);
-2312:Src/main.c    **** 	}
-2313:Src/main.c    **** 	else
-2314:Src/main.c    **** 	{
-2315:Src/main.c    **** 		HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
-2316:Src/main.c    **** 	}
-2317:Src/main.c    **** 	
-2318:Src/main.c    **** 	if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN))
-2319:Src/main.c    **** 	{
-2320:Src/main.c    **** 		Set_LTEC(3,32767);
-2321:Src/main.c    **** 		Set_LTEC(3,32767);
-2322:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
-2323:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
-2324:Src/main.c    **** 	}
-2325:Src/main.c    **** 	else
-2326:Src/main.c    **** 	{
-2327:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
-2328:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);		
-2329:Src/main.c    **** 	}
-2330:Src/main.c    **** 	
-2331:Src/main.c    **** 	if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN))
-2332:Src/main.c    **** 	{
-2333:Src/main.c    **** 		Set_LTEC(4,32767);
-2334:Src/main.c    **** 		Set_LTEC(4,32767);
-2335:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
-2336:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
-2337:Src/main.c    **** 	}
-2338:Src/main.c    **** 	else
+2300:Src/main.c    ****   LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART
+2301:Src/main.c    **** 	
+2302:Src/main.c    **** 	//HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
+2303:Src/main.c    **** 	
+2304:Src/main.c    **** 	
+2305:Src/main.c    **** 	SD_SEEK = 0;
+2306:Src/main.c    **** 	SD_SLIDE = 0;
+2307:Src/main.c    **** 	//Reset all periphery
+2308:Src/main.c    **** 	HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
+2309:Src/main.c    **** 	HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
+2310:Src/main.c    **** 	HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
+2311:Src/main.c    **** 	HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
+2312:Src/main.c    **** 	HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
+2313:Src/main.c    **** 	HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
+2314:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
+2315:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
+2316:Src/main.c    **** 	HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
+2317:Src/main.c    **** 	HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
+2318:Src/main.c    **** //	for (uint16_t i = 0; i < SD_Length; i++)
+2319:Src/main.c    **** //	{
+2320:Src/main.c    **** //		for (uint16_t j = 0; j < DL_16; j++)
+2321:Src/main.c    **** //		{
+2322:Src/main.c    **** //			SD_matr[i][j] = 0;
+2323:Src/main.c    **** //		}
+2324:Src/main.c    **** //	}
+2325:Src/main.c    **** 	//LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC
+2326:Src/main.c    **** 	//LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC
+2327:Src/main.c    **** 	HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD1 ADC
+2328:Src/main.c    **** 	HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC
+2329:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
+2330:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
+2331:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
+2332:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
+2333:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 
+2334:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 
+2335:Src/main.c    **** 	
+2336:Src/main.c    **** 	//------------------------------------------------------------------------------------------------
+2337:Src/main.c    **** 	//test = 11;
+2338:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)//if exist sd && disconne
 2339:Src/main.c    **** 	{
-2340:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
-2341:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);		
-2342:Src/main.c    **** 	}
-2343:Src/main.c    **** 	
-2344:Src/main.c    **** 	if (Curr_setup->PI1_RD==0)
-2345:Src/main.c    **** 	{
-2346:Src/main.c    **** 		LD1_curr_setup->P_coef_temp = 10;
-2347:Src/main.c    **** 		LD1_curr_setup->I_coef_temp = 0.01;
-2348:Src/main.c    **** 	}
-2349:Src/main.c    **** 	
-2350:Src/main.c    **** 	if (Curr_setup->PI2_RD==0)
-2351:Src/main.c    **** 	{
-2352:Src/main.c    **** 		LD2_curr_setup->P_coef_temp = 10;
-2353:Src/main.c    **** 		LD2_curr_setup->I_coef_temp = 0.01;
-2354:Src/main.c    **** 	}
-2355:Src/main.c    **** }
-2356:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 89
+2340:Src/main.c    **** 		//test = 14;
+2341:Src/main.c    **** 		if (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_RESET)
+2342:Src/main.c    **** 		{
+2343:Src/main.c    **** 			//test = 15;
+2344:Src/main.c    **** 			test = Mount_SD("/");
+2345:Src/main.c    **** 			if (test == 0) //0 - suc
+2346:Src/main.c    **** 			{
+2347:Src/main.c    **** 				//Format_SD();
+2348:Src/main.c    **** 				test = Seek_Read_File ("COMMAND.TXT", (uint8_t *)COMMAND, DL_8, DL_8);//Read next DL_8 bytes
+2349:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
+2350:Src/main.c    **** 				UART_rec_incr = 0;
+2351:Src/main.c    **** 				flg_tmt = 0;//Reset the timeout flag
+2352:Src/main.c    **** 			}
+2353:Src/main.c    **** //			else
+2354:Src/main.c    **** //			{
+2355:Src/main.c    **** //				test = 13;
+2356:Src/main.c    **** //			}
+ARM GAS  /tmp/ccEQxcUB.s 			page 89
 
 
-2357:Src/main.c    **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
-2358:Src/main.c    **** {
- 253              		.loc 1 2358 1 is_stmt 1 view -0
+2357:Src/main.c    **** 			CPU_state = DECODE_ENABLE;//Decoding data with last saved settings
+2358:Src/main.c    **** 		}
+2359:Src/main.c    **** //		else
+2360:Src/main.c    **** //		{
+2361:Src/main.c    **** //			test = 16;
+2362:Src/main.c    **** //		}
+2363:Src/main.c    **** 	}
+2364:Src/main.c    **** //	else
+2365:Src/main.c    **** //	{
+2366:Src/main.c    **** //		test = 12;
+2367:Src/main.c    **** //	}
+2368:Src/main.c    **** 
+2369:Src/main.c    **** 	AD9102_Init();
+2370:Src/main.c    **** }
+2371:Src/main.c    **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
+2372:Src/main.c    **** {
+2373:Src/main.c    **** //	uint8_t *temp1;
+2374:Src/main.c    **** 	uint16_t *temp2;
+2375:Src/main.c    **** 	
+2376:Src/main.c    **** 	//------------------------------------------------------------------------------------------------
+2377:Src/main.c    **** 	
+2378:Src/main.c    **** 
+2379:Src/main.c    **** 	test=0;
+2380:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
+2381:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
+2382:Src/main.c    **** 	{
+2383:Src/main.c    **** 		test = Mount_SD("/");
+2384:Src/main.c    **** 		if (test == 0) //0 - suc
+2385:Src/main.c    **** 		{
+2386:Src/main.c    **** 			//Format_SD();
+2387:Src/main.c    **** 			test = Remove_File ("COMMAND.TXT");
+2388:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
+2389:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+2390:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+2391:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+2392:Src/main.c    **** 		}
+2393:Src/main.c    **** 	}
+2394:Src/main.c    **** 	
+2395:Src/main.c    **** 	temp2 = (uint16_t *)Command;
+2396:Src/main.c    **** 	Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
+2397:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
+2398:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
+2399:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
+2400:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
+2401:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
+2402:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
+2403:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
+2404:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
+2405:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
+2406:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
+2407:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
+2408:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
+2409:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
+2410:Src/main.c    **** 	
+2411:Src/main.c    **** 	temp2++;
+2412:Src/main.c    **** 	LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
+2413:Src/main.c    **** 	temp2++;
+ARM GAS  /tmp/ccEQxcUB.s 			page 90
+
+
+2414:Src/main.c    **** 	LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
+2415:Src/main.c    **** 	temp2++;
+2416:Src/main.c    **** 	temp2++;
+2417:Src/main.c    **** 	temp2++;
+2418:Src/main.c    **** 	Curr_setup->AVERAGES = (uint16_t)(*temp2);
+2419:Src/main.c    **** 	temp2++;
+2420:Src/main.c    **** 	LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+2421:Src/main.c    **** 	temp2++;
+2422:Src/main.c    **** 	LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+2423:Src/main.c    **** 	temp2++;
+2424:Src/main.c    **** 	LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+2425:Src/main.c    **** 	temp2++;
+2426:Src/main.c    **** 	LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+2427:Src/main.c    **** 	temp2++;
+2428:Src/main.c    **** 	Long_Data[13] = (uint16_t)(*temp2);//Message ID
+2429:Src/main.c    **** 	temp2++;
+2430:Src/main.c    **** 	LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
+2431:Src/main.c    **** 	temp2++;
+2432:Src/main.c    **** 	LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
+2433:Src/main.c    **** 	temp2++;
+2434:Src/main.c    **** 	
+2435:Src/main.c    **** 	if (Curr_setup->U5V1_EN)
+2436:Src/main.c    **** 	{
+2437:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET);
+2438:Src/main.c    **** 	}
+2439:Src/main.c    **** 	else
+2440:Src/main.c    **** 	{
+2441:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
+2442:Src/main.c    **** 	}
+2443:Src/main.c    **** 	
+2444:Src/main.c    **** 	if (Curr_setup->U5V2_EN)
+2445:Src/main.c    **** 	{
+2446:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET);
+2447:Src/main.c    **** 	}
+2448:Src/main.c    **** 	else
+2449:Src/main.c    **** 	{
+2450:Src/main.c    **** 		HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
+2451:Src/main.c    **** 	}
+2452:Src/main.c    **** 	
+2453:Src/main.c    **** 	if (Curr_setup->LD1_EN)
+2454:Src/main.c    **** 	{
+2455:Src/main.c    **** 		HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET);
+2456:Src/main.c    **** 		//LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
+2457:Src/main.c    **** 	}
+2458:Src/main.c    **** 	else
+2459:Src/main.c    **** 	{
+2460:Src/main.c    **** 		HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
+2461:Src/main.c    **** 		//LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
+2462:Src/main.c    **** 	}
+2463:Src/main.c    **** 	
+2464:Src/main.c    **** 	if (Curr_setup->LD2_EN)
+2465:Src/main.c    **** 	{
+2466:Src/main.c    **** 		HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET);
+2467:Src/main.c    **** 		//LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
+2468:Src/main.c    **** 	}
+2469:Src/main.c    **** 	else
+2470:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 91
+
+
+2471:Src/main.c    **** 		HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
+2472:Src/main.c    **** 		//LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
+2473:Src/main.c    **** 	}
+2474:Src/main.c    **** 	
+2475:Src/main.c    **** 	if (Curr_setup->REF1_EN)
+2476:Src/main.c    **** 	{
+2477:Src/main.c    **** 		HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET);
+2478:Src/main.c    **** 	}
+2479:Src/main.c    **** 	else
+2480:Src/main.c    **** 	{
+2481:Src/main.c    **** 		HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
+2482:Src/main.c    **** 	}
+2483:Src/main.c    **** 	
+2484:Src/main.c    **** 	if (Curr_setup->REF2_EN)
+2485:Src/main.c    **** 	{
+2486:Src/main.c    **** 		HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET);
+2487:Src/main.c    **** 	}
+2488:Src/main.c    **** 	else
+2489:Src/main.c    **** 	{
+2490:Src/main.c    **** 		HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
+2491:Src/main.c    **** 	}
+2492:Src/main.c    **** 	
+2493:Src/main.c    **** 	if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN))
+2494:Src/main.c    **** 	{
+2495:Src/main.c    **** 		Set_LTEC(3,32767);
+2496:Src/main.c    **** 		Set_LTEC(3,32767);
+2497:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
+2498:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
+2499:Src/main.c    **** 	}
+2500:Src/main.c    **** 	else
+2501:Src/main.c    **** 	{
+2502:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
+2503:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);		
+2504:Src/main.c    **** 	}
+2505:Src/main.c    **** 	
+2506:Src/main.c    **** 	if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN))
+2507:Src/main.c    **** 	{
+2508:Src/main.c    **** 		Set_LTEC(4,32767);
+2509:Src/main.c    **** 		Set_LTEC(4,32767);
+2510:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
+2511:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
+2512:Src/main.c    **** 	}
+2513:Src/main.c    **** 	else
+2514:Src/main.c    **** 	{
+2515:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
+2516:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);		
+2517:Src/main.c    **** 	}
+2518:Src/main.c    **** 	
+2519:Src/main.c    **** 	if (Curr_setup->PI1_RD==0)
+2520:Src/main.c    **** 	{
+2521:Src/main.c    **** 		LD1_curr_setup->P_coef_temp = 10;
+2522:Src/main.c    **** 		LD1_curr_setup->I_coef_temp = 0.01;
+2523:Src/main.c    **** 	}
+2524:Src/main.c    **** 	
+2525:Src/main.c    **** 	if (Curr_setup->PI2_RD==0)
+2526:Src/main.c    **** 	{
+2527:Src/main.c    **** 		LD2_curr_setup->P_coef_temp = 10;
+ARM GAS  /tmp/ccEQxcUB.s 			page 92
+
+
+2528:Src/main.c    **** 		LD2_curr_setup->I_coef_temp = 0.01;
+2529:Src/main.c    **** 	}
+2530:Src/main.c    **** }
+2531:Src/main.c    **** 
+2532:Src/main.c    **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
+2533:Src/main.c    **** {
+ 253              		.loc 1 2533 1 is_stmt 1 view -0
  254              		.cfi_startproc
  255              		@ args = 0, pretend = 0, frame = 8
  256              		@ frame_needed = 0, uses_anonymous_args = 0
  257              		@ link register save eliminated.
- 258              		.loc 1 2358 1 is_stmt 0 view .LVU66
+ 258              		.loc 1 2533 1 is_stmt 0 view .LVU66
  259 0000 82B0     		sub	sp, sp, #8
  260              	.LCFI4:
  261              		.cfi_def_cfa_offset 8
-2359:Src/main.c    **** 	uint16_t *temp2;
- 262              		.loc 1 2359 2 is_stmt 1 view .LVU67
-2360:Src/main.c    **** 
-2361:Src/main.c    **** 	temp2 = (uint16_t *)Command;
- 263              		.loc 1 2361 2 view .LVU68
+2534:Src/main.c    **** 	uint16_t *temp2;
+ 262              		.loc 1 2534 2 is_stmt 1 view .LVU67
+2535:Src/main.c    **** 
+2536:Src/main.c    **** 	temp2 = (uint16_t *)Command;
+ 263              		.loc 1 2536 2 view .LVU68
  264              	.LVL15:
-2362:Src/main.c    **** 	Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- 265              		.loc 1 2362 2 view .LVU69
- 266              		.loc 1 2362 36 is_stmt 0 view .LVU70
+2537:Src/main.c    **** 	Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
+ 265              		.loc 1 2537 2 view .LVU69
+ 266              		.loc 1 2537 36 is_stmt 0 view .LVU70
  267 0002 0288     		ldrh	r2, [r0]
  268              	.LVL16:
- 269              		.loc 1 2362 48 view .LVU71
+ 269              		.loc 1 2537 48 view .LVU71
  270 0004 02F00102 		and	r2, r2, #1
- 271              		.loc 1 2362 22 view .LVU72
+ 271              		.loc 1 2537 22 view .LVU72
  272 0008 1A70     		strb	r2, [r3]
-2363:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 273              		.loc 1 2363 2 is_stmt 1 view .LVU73
- 274              		.loc 1 2363 36 is_stmt 0 view .LVU74
+2538:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
+ 273              		.loc 1 2538 2 is_stmt 1 view .LVU73
+ 274              		.loc 1 2538 36 is_stmt 0 view .LVU74
  275 000a 0288     		ldrh	r2, [r0]
- 276              		.loc 1 2363 48 view .LVU75
+ 276              		.loc 1 2538 48 view .LVU75
  277 000c C2F34002 		ubfx	r2, r2, #1, #1
- 278              		.loc 1 2363 22 view .LVU76
+ 278              		.loc 1 2538 22 view .LVU76
  279 0010 5A70     		strb	r2, [r3, #1]
-2364:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 280              		.loc 1 2364 2 is_stmt 1 view .LVU77
- 281              		.loc 1 2364 36 is_stmt 0 view .LVU78
+2539:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
+ 280              		.loc 1 2539 2 is_stmt 1 view .LVU77
+ 281              		.loc 1 2539 36 is_stmt 0 view .LVU78
  282 0012 0288     		ldrh	r2, [r0]
- 283              		.loc 1 2364 48 view .LVU79
+ 283              		.loc 1 2539 48 view .LVU79
  284 0014 C2F38002 		ubfx	r2, r2, #2, #1
- 285              		.loc 1 2364 22 view .LVU80
+ 285              		.loc 1 2539 22 view .LVU80
  286 0018 9A70     		strb	r2, [r3, #2]
-2365:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 287              		.loc 1 2365 2 is_stmt 1 view .LVU81
- 288              		.loc 1 2365 35 is_stmt 0 view .LVU82
+2540:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
+ 287              		.loc 1 2540 2 is_stmt 1 view .LVU81
+ 288              		.loc 1 2540 35 is_stmt 0 view .LVU82
  289 001a 0288     		ldrh	r2, [r0]
- 290              		.loc 1 2365 47 view .LVU83
+ 290              		.loc 1 2540 47 view .LVU83
  291 001c C2F3C002 		ubfx	r2, r2, #3, #1
- 292              		.loc 1 2365 21 view .LVU84
+ 292              		.loc 1 2540 21 view .LVU84
  293 0020 DA70     		strb	r2, [r3, #3]
-2366:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 294              		.loc 1 2366 2 is_stmt 1 view .LVU85
- 295              		.loc 1 2366 35 is_stmt 0 view .LVU86
+2541:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
+ 294              		.loc 1 2541 2 is_stmt 1 view .LVU85
+ 295              		.loc 1 2541 35 is_stmt 0 view .LVU86
+ARM GAS  /tmp/ccEQxcUB.s 			page 93
+
+
  296 0022 0288     		ldrh	r2, [r0]
- 297              		.loc 1 2366 47 view .LVU87
+ 297              		.loc 1 2541 47 view .LVU87
  298 0024 C2F30012 		ubfx	r2, r2, #4, #1
- 299              		.loc 1 2366 21 view .LVU88
-ARM GAS  /tmp/ccwR4KB7.s 			page 90
-
-
+ 299              		.loc 1 2541 21 view .LVU88
  300 0028 1A71     		strb	r2, [r3, #4]
-2367:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 301              		.loc 1 2367 2 is_stmt 1 view .LVU89
- 302              		.loc 1 2367 36 is_stmt 0 view .LVU90
+2542:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
+ 301              		.loc 1 2542 2 is_stmt 1 view .LVU89
+ 302              		.loc 1 2542 36 is_stmt 0 view .LVU90
  303 002a 0288     		ldrh	r2, [r0]
- 304              		.loc 1 2367 48 view .LVU91
+ 304              		.loc 1 2542 48 view .LVU91
  305 002c C2F34012 		ubfx	r2, r2, #5, #1
- 306              		.loc 1 2367 22 view .LVU92
+ 306              		.loc 1 2542 22 view .LVU92
  307 0030 5A71     		strb	r2, [r3, #5]
-2368:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 308              		.loc 1 2368 2 is_stmt 1 view .LVU93
- 309              		.loc 1 2368 36 is_stmt 0 view .LVU94
+2543:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
+ 308              		.loc 1 2543 2 is_stmt 1 view .LVU93
+ 309              		.loc 1 2543 36 is_stmt 0 view .LVU94
  310 0032 0288     		ldrh	r2, [r0]
- 311              		.loc 1 2368 48 view .LVU95
+ 311              		.loc 1 2543 48 view .LVU95
  312 0034 C2F38012 		ubfx	r2, r2, #6, #1
- 313              		.loc 1 2368 22 view .LVU96
+ 313              		.loc 1 2543 22 view .LVU96
  314 0038 9A71     		strb	r2, [r3, #6]
-2369:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 315              		.loc 1 2369 2 is_stmt 1 view .LVU97
- 316              		.loc 1 2369 36 is_stmt 0 view .LVU98
+2544:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
+ 315              		.loc 1 2544 2 is_stmt 1 view .LVU97
+ 316              		.loc 1 2544 36 is_stmt 0 view .LVU98
  317 003a 0288     		ldrh	r2, [r0]
- 318              		.loc 1 2369 48 view .LVU99
+ 318              		.loc 1 2544 48 view .LVU99
  319 003c C2F3C012 		ubfx	r2, r2, #7, #1
- 320              		.loc 1 2369 22 view .LVU100
+ 320              		.loc 1 2544 22 view .LVU100
  321 0040 DA71     		strb	r2, [r3, #7]
-2370:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 322              		.loc 1 2370 2 is_stmt 1 view .LVU101
- 323              		.loc 1 2370 36 is_stmt 0 view .LVU102
+2545:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
+ 322              		.loc 1 2545 2 is_stmt 1 view .LVU101
+ 323              		.loc 1 2545 36 is_stmt 0 view .LVU102
  324 0042 0288     		ldrh	r2, [r0]
- 325              		.loc 1 2370 48 view .LVU103
+ 325              		.loc 1 2545 48 view .LVU103
  326 0044 C2F30022 		ubfx	r2, r2, #8, #1
- 327              		.loc 1 2370 22 view .LVU104
+ 327              		.loc 1 2545 22 view .LVU104
  328 0048 1A72     		strb	r2, [r3, #8]
-2371:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 329              		.loc 1 2371 2 is_stmt 1 view .LVU105
- 330              		.loc 1 2371 35 is_stmt 0 view .LVU106
+2546:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
+ 329              		.loc 1 2546 2 is_stmt 1 view .LVU105
+ 330              		.loc 1 2546 35 is_stmt 0 view .LVU106
  331 004a 0288     		ldrh	r2, [r0]
- 332              		.loc 1 2371 47 view .LVU107
+ 332              		.loc 1 2546 47 view .LVU107
  333 004c C2F34022 		ubfx	r2, r2, #9, #1
- 334              		.loc 1 2371 21 view .LVU108
+ 334              		.loc 1 2546 21 view .LVU108
  335 0050 5A72     		strb	r2, [r3, #9]
-2372:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 336              		.loc 1 2372 2 is_stmt 1 view .LVU109
- 337              		.loc 1 2372 35 is_stmt 0 view .LVU110
+2547:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
+ 336              		.loc 1 2547 2 is_stmt 1 view .LVU109
+ 337              		.loc 1 2547 35 is_stmt 0 view .LVU110
  338 0052 0288     		ldrh	r2, [r0]
- 339              		.loc 1 2372 48 view .LVU111
+ 339              		.loc 1 2547 48 view .LVU111
  340 0054 C2F38022 		ubfx	r2, r2, #10, #1
- 341              		.loc 1 2372 21 view .LVU112
+ 341              		.loc 1 2547 21 view .LVU112
  342 0058 9A72     		strb	r2, [r3, #10]
-2373:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 343              		.loc 1 2373 2 is_stmt 1 view .LVU113
- 344              		.loc 1 2373 34 is_stmt 0 view .LVU114
+2548:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
+ 343              		.loc 1 2548 2 is_stmt 1 view .LVU113
+ 344              		.loc 1 2548 34 is_stmt 0 view .LVU114
  345 005a 0288     		ldrh	r2, [r0]
- 346              		.loc 1 2373 47 view .LVU115
+ARM GAS  /tmp/ccEQxcUB.s 			page 94
+
+
+ 346              		.loc 1 2548 47 view .LVU115
  347 005c C2F3C022 		ubfx	r2, r2, #11, #1
- 348              		.loc 1 2373 20 view .LVU116
+ 348              		.loc 1 2548 20 view .LVU116
  349 0060 DA72     		strb	r2, [r3, #11]
-ARM GAS  /tmp/ccwR4KB7.s 			page 91
-
-
-2374:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 350              		.loc 1 2374 2 is_stmt 1 view .LVU117
- 351              		.loc 1 2374 35 is_stmt 0 view .LVU118
+2549:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
+ 350              		.loc 1 2549 2 is_stmt 1 view .LVU117
+ 351              		.loc 1 2549 35 is_stmt 0 view .LVU118
  352 0062 0288     		ldrh	r2, [r0]
- 353              		.loc 1 2374 48 view .LVU119
+ 353              		.loc 1 2549 48 view .LVU119
  354 0064 C2F30032 		ubfx	r2, r2, #12, #1
- 355              		.loc 1 2374 21 view .LVU120
+ 355              		.loc 1 2549 21 view .LVU120
  356 0068 1A73     		strb	r2, [r3, #12]
-2375:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 357              		.loc 1 2375 2 is_stmt 1 view .LVU121
- 358              		.loc 1 2375 35 is_stmt 0 view .LVU122
+2550:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
+ 357              		.loc 1 2550 2 is_stmt 1 view .LVU121
+ 358              		.loc 1 2550 35 is_stmt 0 view .LVU122
  359 006a 0288     		ldrh	r2, [r0]
- 360              		.loc 1 2375 48 view .LVU123
+ 360              		.loc 1 2550 48 view .LVU123
  361 006c C2F34032 		ubfx	r2, r2, #13, #1
- 362              		.loc 1 2375 21 view .LVU124
+ 362              		.loc 1 2550 21 view .LVU124
  363 0070 5A73     		strb	r2, [r3, #13]
-2376:Src/main.c    **** 
-2377:Src/main.c    **** 	temp2++;
- 364              		.loc 1 2377 2 is_stmt 1 view .LVU125
+2551:Src/main.c    **** 
+2552:Src/main.c    **** 	temp2++;
+ 364              		.loc 1 2552 2 is_stmt 1 view .LVU125
  365              	.LVL17:
-2378:Src/main.c    **** 	task.task_type   = (uint8_t)(*temp2); temp2++;
- 366              		.loc 1 2378 2 view .LVU126
- 367              		.loc 1 2378 21 is_stmt 0 view .LVU127
+2553:Src/main.c    **** 	task.task_type   = (uint8_t)(*temp2); temp2++;
+ 366              		.loc 1 2553 2 view .LVU126
+ 367              		.loc 1 2553 21 is_stmt 0 view .LVU127
  368 0072 8278     		ldrb	r2, [r0, #2]	@ zero_extendqisi2
- 369              		.loc 1 2378 19 view .LVU128
+ 369              		.loc 1 2553 19 view .LVU128
  370 0074 384B     		ldr	r3, .L14+8
  371              	.LVL18:
- 372              		.loc 1 2378 19 view .LVU129
+ 372              		.loc 1 2553 19 view .LVU129
  373 0076 1A70     		strb	r2, [r3]
- 374              		.loc 1 2378 40 is_stmt 1 view .LVU130
+ 374              		.loc 1 2553 40 is_stmt 1 view .LVU130
  375              	.LVL19:
-2379:Src/main.c    **** 	task.min_param   = (float)(*temp2); temp2++;
- 376              		.loc 1 2379 2 view .LVU131
- 377              		.loc 1 2379 29 is_stmt 0 view .LVU132
+2554:Src/main.c    **** 	task.min_param   = (float)(*temp2); temp2++;
+ 376              		.loc 1 2554 2 view .LVU131
+ 377              		.loc 1 2554 29 is_stmt 0 view .LVU132
  378 0078 8288     		ldrh	r2, [r0, #4]
  379 007a 07EE902A 		vmov	s15, r2	@ int
- 380              		.loc 1 2379 21 view .LVU133
+ 380              		.loc 1 2554 21 view .LVU133
  381 007e F8EE677A 		vcvt.f32.u32	s15, s15
- 382              		.loc 1 2379 19 view .LVU134
+ 382              		.loc 1 2554 19 view .LVU134
  383 0082 C3ED017A 		vstr.32	s15, [r3, #4]
- 384              		.loc 1 2379 38 is_stmt 1 view .LVU135
+ 384              		.loc 1 2554 38 is_stmt 1 view .LVU135
  385              	.LVL20:
-2380:Src/main.c    **** 	task.max_param   = (float)(*temp2); temp2++;
- 386              		.loc 1 2380 2 view .LVU136
- 387              		.loc 1 2380 29 is_stmt 0 view .LVU137
+2555:Src/main.c    **** 	task.max_param   = (float)(*temp2); temp2++;
+ 386              		.loc 1 2555 2 view .LVU136
+ 387              		.loc 1 2555 29 is_stmt 0 view .LVU137
  388 0086 C288     		ldrh	r2, [r0, #6]
  389 0088 07EE902A 		vmov	s15, r2	@ int
- 390              		.loc 1 2380 21 view .LVU138
+ 390              		.loc 1 2555 21 view .LVU138
  391 008c F8EE677A 		vcvt.f32.u32	s15, s15
- 392              		.loc 1 2380 19 view .LVU139
+ 392              		.loc 1 2555 19 view .LVU139
  393 0090 C3ED027A 		vstr.32	s15, [r3, #8]
- 394              		.loc 1 2380 38 is_stmt 1 view .LVU140
+ 394              		.loc 1 2555 38 is_stmt 1 view .LVU140
  395              	.LVL21:
-2381:Src/main.c    **** 	task.delta_param = (float)(*temp2); temp2++;
- 396              		.loc 1 2381 2 view .LVU141
- 397              		.loc 1 2381 29 is_stmt 0 view .LVU142
+ARM GAS  /tmp/ccEQxcUB.s 			page 95
+
+
+2556:Src/main.c    **** 	task.delta_param = (float)(*temp2); temp2++;
+ 396              		.loc 1 2556 2 view .LVU141
+ 397              		.loc 1 2556 29 is_stmt 0 view .LVU142
  398 0094 0289     		ldrh	r2, [r0, #8]
-ARM GAS  /tmp/ccwR4KB7.s 			page 92
-
-
  399 0096 07EE902A 		vmov	s15, r2	@ int
- 400              		.loc 1 2381 21 view .LVU143
+ 400              		.loc 1 2556 21 view .LVU143
  401 009a F8EE677A 		vcvt.f32.u32	s15, s15
- 402              		.loc 1 2381 19 view .LVU144
+ 402              		.loc 1 2556 19 view .LVU144
  403 009e C3ED037A 		vstr.32	s15, [r3, #12]
- 404              		.loc 1 2381 38 is_stmt 1 view .LVU145
+ 404              		.loc 1 2556 38 is_stmt 1 view .LVU145
  405              	.LVL22:
-2382:Src/main.c    **** 	task.dt          = (float)(*temp2) / 100.0; temp2++;
- 406              		.loc 1 2382 2 view .LVU146
- 407              		.loc 1 2382 29 is_stmt 0 view .LVU147
+2557:Src/main.c    **** 	task.dt          = (float)(*temp2) / 100.0; temp2++;
+ 406              		.loc 1 2557 2 view .LVU146
+ 407              		.loc 1 2557 29 is_stmt 0 view .LVU147
  408 00a2 4289     		ldrh	r2, [r0, #10]
  409 00a4 07EE102A 		vmov	s14, r2	@ int
- 410              		.loc 1 2382 21 view .LVU148
+ 410              		.loc 1 2557 21 view .LVU148
  411 00a8 B8EE477B 		vcvt.f64.u32	d7, s14
- 412              		.loc 1 2382 37 view .LVU149
+ 412              		.loc 1 2557 37 view .LVU149
  413 00ac 9FED285B 		vldr.64	d5, .L14
  414 00b0 87EE056B 		vdiv.f64	d6, d7, d5
- 415              		.loc 1 2382 19 view .LVU150
+ 415              		.loc 1 2557 19 view .LVU150
  416 00b4 FCEEC67B 		vcvt.u32.f64	s15, d6
  417 00b8 CDED017A 		vstr.32	s15, [sp, #4]	@ int
  418 00bc 9DF80420 		ldrb	r2, [sp, #4]	@ zero_extendqisi2
  419 00c0 1A75     		strb	r2, [r3, #20]
- 420              		.loc 1 2382 46 is_stmt 1 view .LVU151
+ 420              		.loc 1 2557 46 is_stmt 1 view .LVU151
  421              	.LVL23:
-2383:Src/main.c    **** 	task.sec_param   = (float)(*temp2); temp2++;
- 422              		.loc 1 2383 2 view .LVU152
- 423              		.loc 1 2383 29 is_stmt 0 view .LVU153
+2558:Src/main.c    **** 	task.sec_param   = (float)(*temp2); temp2++;
+ 422              		.loc 1 2558 2 view .LVU152
+ 423              		.loc 1 2558 29 is_stmt 0 view .LVU153
  424 00c2 8189     		ldrh	r1, [r0, #12]
  425              	.LVL24:
- 426              		.loc 1 2383 29 view .LVU154
+ 426              		.loc 1 2558 29 view .LVU154
  427 00c4 07EE901A 		vmov	s15, r1	@ int
- 428              		.loc 1 2383 21 view .LVU155
+ 428              		.loc 1 2558 21 view .LVU155
  429 00c8 F8EE677A 		vcvt.f32.u32	s15, s15
- 430              		.loc 1 2383 19 view .LVU156
+ 430              		.loc 1 2558 19 view .LVU156
  431 00cc C3ED067A 		vstr.32	s15, [r3, #24]
- 432              		.loc 1 2383 38 is_stmt 1 view .LVU157
+ 432              		.loc 1 2558 38 is_stmt 1 view .LVU157
  433              	.LVL25:
-2384:Src/main.c    **** 	task.curr        = (float)(*temp2); temp2++;
- 434              		.loc 1 2384 2 view .LVU158
- 435              		.loc 1 2384 29 is_stmt 0 view .LVU159
+2559:Src/main.c    **** 	task.curr        = (float)(*temp2); temp2++;
+ 434              		.loc 1 2559 2 view .LVU158
+ 435              		.loc 1 2559 29 is_stmt 0 view .LVU159
  436 00d0 C189     		ldrh	r1, [r0, #14]
  437 00d2 07EE901A 		vmov	s15, r1	@ int
- 438              		.loc 1 2384 21 view .LVU160
+ 438              		.loc 1 2559 21 view .LVU160
  439 00d6 F8EE677A 		vcvt.f32.u32	s15, s15
- 440              		.loc 1 2384 19 view .LVU161
+ 440              		.loc 1 2559 19 view .LVU161
  441 00da C3ED077A 		vstr.32	s15, [r3, #28]
- 442              		.loc 1 2384 38 is_stmt 1 view .LVU162
+ 442              		.loc 1 2559 38 is_stmt 1 view .LVU162
  443              	.LVL26:
-2385:Src/main.c    **** 	task.temp        = (float)(*temp2); temp2++;
- 444              		.loc 1 2385 2 view .LVU163
- 445              		.loc 1 2385 29 is_stmt 0 view .LVU164
+2560:Src/main.c    **** 	task.temp        = (float)(*temp2); temp2++;
+ 444              		.loc 1 2560 2 view .LVU163
+ 445              		.loc 1 2560 29 is_stmt 0 view .LVU164
  446 00de 018A     		ldrh	r1, [r0, #16]
  447 00e0 07EE901A 		vmov	s15, r1	@ int
- 448              		.loc 1 2385 21 view .LVU165
+ARM GAS  /tmp/ccEQxcUB.s 			page 96
+
+
+ 448              		.loc 1 2560 21 view .LVU165
  449 00e4 F8EE677A 		vcvt.f32.u32	s15, s15
- 450              		.loc 1 2385 19 view .LVU166
+ 450              		.loc 1 2560 19 view .LVU166
  451 00e8 C3ED087A 		vstr.32	s15, [r3, #32]
-ARM GAS  /tmp/ccwR4KB7.s 			page 93
-
-
- 452              		.loc 1 2385 38 is_stmt 1 view .LVU167
+ 452              		.loc 1 2560 38 is_stmt 1 view .LVU167
  453              	.LVL27:
-2386:Src/main.c    **** 	task.tau         = (float)(*temp2); temp2++;
- 454              		.loc 1 2386 2 view .LVU168
- 455              		.loc 1 2386 29 is_stmt 0 view .LVU169
+2561:Src/main.c    **** 	task.tau         = (float)(*temp2); temp2++;
+ 454              		.loc 1 2561 2 view .LVU168
+ 455              		.loc 1 2561 29 is_stmt 0 view .LVU169
  456 00ec 418A     		ldrh	r1, [r0, #18]
- 457              		.loc 1 2386 19 view .LVU170
+ 457              		.loc 1 2561 19 view .LVU170
  458 00ee D982     		strh	r1, [r3, #22]	@ movhi
- 459              		.loc 1 2386 38 is_stmt 1 view .LVU171
+ 459              		.loc 1 2561 38 is_stmt 1 view .LVU171
  460              	.LVL28:
-2387:Src/main.c    **** 	task.p_coef_1    = (float)(*temp2) * 256.0; temp2++;
- 461              		.loc 1 2387 2 view .LVU172
- 462              		.loc 1 2387 29 is_stmt 0 view .LVU173
+2562:Src/main.c    **** 	task.p_coef_1    = (float)(*temp2) * 256.0; temp2++;
+ 461              		.loc 1 2562 2 view .LVU172
+ 462              		.loc 1 2562 29 is_stmt 0 view .LVU173
  463 00f0 818A     		ldrh	r1, [r0, #20]
  464 00f2 07EE901A 		vmov	s15, r1	@ int
- 465              		.loc 1 2387 21 view .LVU174
+ 465              		.loc 1 2562 21 view .LVU174
  466 00f6 F8EE677A 		vcvt.f32.u32	s15, s15
- 467              		.loc 1 2387 37 view .LVU175
+ 467              		.loc 1 2562 37 view .LVU175
  468 00fa 9FED187A 		vldr.32	s14, .L14+12
  469 00fe 67EE877A 		vmul.f32	s15, s15, s14
- 470              		.loc 1 2387 19 view .LVU176
+ 470              		.loc 1 2562 19 view .LVU176
  471 0102 C3ED0A7A 		vstr.32	s15, [r3, #40]
- 472              		.loc 1 2387 46 is_stmt 1 view .LVU177
+ 472              		.loc 1 2562 46 is_stmt 1 view .LVU177
  473              	.LVL29:
-2388:Src/main.c    **** 	task.i_coef_1    = (float)(*temp2) * 256.0; temp2++;
- 474              		.loc 1 2388 2 view .LVU178
- 475              		.loc 1 2388 29 is_stmt 0 view .LVU179
+2563:Src/main.c    **** 	task.i_coef_1    = (float)(*temp2) * 256.0; temp2++;
+ 474              		.loc 1 2563 2 view .LVU178
+ 475              		.loc 1 2563 29 is_stmt 0 view .LVU179
  476 0106 C18A     		ldrh	r1, [r0, #22]
  477 0108 07EE901A 		vmov	s15, r1	@ int
- 478              		.loc 1 2388 21 view .LVU180
+ 478              		.loc 1 2563 21 view .LVU180
  479 010c F8EE677A 		vcvt.f32.u32	s15, s15
- 480              		.loc 1 2388 37 view .LVU181
+ 480              		.loc 1 2563 37 view .LVU181
  481 0110 67EE877A 		vmul.f32	s15, s15, s14
- 482              		.loc 1 2388 19 view .LVU182
+ 482              		.loc 1 2563 19 view .LVU182
  483 0114 C3ED097A 		vstr.32	s15, [r3, #36]
- 484              		.loc 1 2388 46 is_stmt 1 view .LVU183
+ 484              		.loc 1 2563 46 is_stmt 1 view .LVU183
  485              	.LVL30:
-2389:Src/main.c    **** 	task.p_coef_2    = (float)(*temp2) * 256.0; temp2++;
- 486              		.loc 1 2389 2 view .LVU184
- 487              		.loc 1 2389 29 is_stmt 0 view .LVU185
+2564:Src/main.c    **** 	task.p_coef_2    = (float)(*temp2) * 256.0; temp2++;
+ 486              		.loc 1 2564 2 view .LVU184
+ 487              		.loc 1 2564 29 is_stmt 0 view .LVU185
  488 0118 018B     		ldrh	r1, [r0, #24]
  489 011a 07EE901A 		vmov	s15, r1	@ int
- 490              		.loc 1 2389 21 view .LVU186
+ 490              		.loc 1 2564 21 view .LVU186
  491 011e F8EE677A 		vcvt.f32.u32	s15, s15
- 492              		.loc 1 2389 37 view .LVU187
+ 492              		.loc 1 2564 37 view .LVU187
  493 0122 67EE877A 		vmul.f32	s15, s15, s14
- 494              		.loc 1 2389 19 view .LVU188
+ 494              		.loc 1 2564 19 view .LVU188
  495 0126 C3ED0C7A 		vstr.32	s15, [r3, #48]
- 496              		.loc 1 2389 46 is_stmt 1 view .LVU189
+ 496              		.loc 1 2564 46 is_stmt 1 view .LVU189
  497              	.LVL31:
-2390:Src/main.c    **** 	task.i_coef_2    = (float)(*temp2) * 256.0; temp2++;
- 498              		.loc 1 2390 2 view .LVU190
- 499              		.loc 1 2390 29 is_stmt 0 view .LVU191
+2565:Src/main.c    **** 	task.i_coef_2    = (float)(*temp2) * 256.0; temp2++;
+ 498              		.loc 1 2565 2 view .LVU190
+ 499              		.loc 1 2565 29 is_stmt 0 view .LVU191
+ARM GAS  /tmp/ccEQxcUB.s 			page 97
+
+
  500 012a 418B     		ldrh	r1, [r0, #26]
  501 012c 07EE901A 		vmov	s15, r1	@ int
- 502              		.loc 1 2390 21 view .LVU192
+ 502              		.loc 1 2565 21 view .LVU192
  503 0130 F8EE677A 		vcvt.f32.u32	s15, s15
-ARM GAS  /tmp/ccwR4KB7.s 			page 94
-
-
- 504              		.loc 1 2390 37 view .LVU193
+ 504              		.loc 1 2565 37 view .LVU193
  505 0134 67EE877A 		vmul.f32	s15, s15, s14
- 506              		.loc 1 2390 19 view .LVU194
+ 506              		.loc 1 2565 19 view .LVU194
  507 0138 C3ED0B7A 		vstr.32	s15, [r3, #44]
- 508              		.loc 1 2390 46 is_stmt 1 view .LVU195
+ 508              		.loc 1 2565 46 is_stmt 1 view .LVU195
  509              	.LVL32:
-2391:Src/main.c    **** 	
-2392:Src/main.c    **** 	TO10_counter = task.dt / 10;
- 510              		.loc 1 2392 2 view .LVU196
- 511              		.loc 1 2392 25 is_stmt 0 view .LVU197
+2566:Src/main.c    **** 	
+2567:Src/main.c    **** 	TO10_counter = task.dt / 10;
+ 510              		.loc 1 2567 2 view .LVU196
+ 511              		.loc 1 2567 25 is_stmt 0 view .LVU197
  512 013c 084B     		ldr	r3, .L14+16
  513 013e A3FB0232 		umull	r3, r2, r3, r2
  514 0142 D208     		lsrs	r2, r2, #3
- 515              		.loc 1 2392 15 view .LVU198
+ 515              		.loc 1 2567 15 view .LVU198
  516 0144 074B     		ldr	r3, .L14+20
  517 0146 1A60     		str	r2, [r3]
-2393:Src/main.c    **** }
- 518              		.loc 1 2393 1 view .LVU199
+2568:Src/main.c    **** }
+ 518              		.loc 1 2568 1 view .LVU199
  519 0148 02B0     		add	sp, sp, #8
  520              	.LCFI5:
  521              		.cfi_def_cfa_offset 0
@@ -5614,1078 +5798,103 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  531 0160 CDCCCCCC 		.word	-858993459
  532 0164 00000000 		.word	TO10_counter
  533              		.cfi_endproc
- 534              	.LFE1209:
- 536              		.section	.text.PID_Controller_Temp,"ax",%progbits
+ 534              	.LFE1210:
+ 536              		.section	.text.SPI2_SetMode,"ax",%progbits
  537              		.align	1
  538              		.syntax unified
  539              		.thumb
  540              		.thumb_func
- 542              	PID_Controller_Temp:
+ 542              	SPI2_SetMode:
  543              	.LVL33:
- 544              	.LFB1224:
-2394:Src/main.c    **** 
-2395:Src/main.c    **** void OUT_trigger(uint8_t out_n)
-2396:Src/main.c    **** {
-2397:Src/main.c    **** 	switch (out_n)
-2398:Src/main.c    **** 	{
-2399:Src/main.c    **** 	case 0:
-2400:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET);
-2401:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
-2402:Src/main.c    **** 	break;
-2403:Src/main.c    **** 
-2404:Src/main.c    **** 	case 1:
-2405:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET);
-2406:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
-2407:Src/main.c    **** 	break;
-2408:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 95
+ 544              	.LFB1213:
+2569:Src/main.c    **** 
+2570:Src/main.c    **** void OUT_trigger(uint8_t out_n)
+2571:Src/main.c    **** {
+2572:Src/main.c    **** 	switch (out_n)
+2573:Src/main.c    **** 	{
+2574:Src/main.c    **** 	case 0:
+2575:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET);
+2576:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
+2577:Src/main.c    **** 	break;
+2578:Src/main.c    **** 
+2579:Src/main.c    **** 	case 1:
+ARM GAS  /tmp/ccEQxcUB.s 			page 98
 
 
-2409:Src/main.c    **** 	case 2:
-2410:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET);
-2411:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
-2412:Src/main.c    **** 	break;
-2413:Src/main.c    **** 
-2414:Src/main.c    **** 	case 3:
-2415:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET);
-2416:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
-2417:Src/main.c    **** 	break;
-2418:Src/main.c    **** 
-2419:Src/main.c    **** 	case 4:
-2420:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET);
-2421:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
-2422:Src/main.c    **** 	break;
-2423:Src/main.c    **** 
-2424:Src/main.c    **** 	case 5:
-2425:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET);
-2426:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
-2427:Src/main.c    **** 	break;
-2428:Src/main.c    **** 
-2429:Src/main.c    **** 	case 6:
-2430:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET);
-2431:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
-2432:Src/main.c    **** 	break;
-2433:Src/main.c    **** 
-2434:Src/main.c    **** 	case 7:
-2435:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);
-2436:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
-2437:Src/main.c    **** 	break;
-2438:Src/main.c    **** 
-2439:Src/main.c    **** 	case 8:
-2440:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET);
-2441:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
-2442:Src/main.c    **** 	break;
-2443:Src/main.c    **** 
-2444:Src/main.c    **** 	case 9:
-2445:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET);
-2446:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
-2447:Src/main.c    **** 	break;
-2448:Src/main.c    **** 	}
-2449:Src/main.c    **** }
-2450:Src/main.c    **** 
-2451:Src/main.c    **** static void AD9102_Init(void)
-2452:Src/main.c    **** {
-2453:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-2454:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
-2455:Src/main.c    **** 	for (volatile uint32_t d = 0; d < 1000; d++) {}
-2456:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
-2457:Src/main.c    **** 
-2458:Src/main.c    **** 	AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
-2459:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-2460:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-2461:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2462:Src/main.c    **** }
-2463:Src/main.c    **** 
-2464:Src/main.c    **** static void AD9102_WriteReg(uint16_t addr, uint16_t value)
-2465:Src/main.c    **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 96
-
-
-2466:Src/main.c    **** 	uint32_t tmp32 = 0;
-2467:Src/main.c    **** 	uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
-2468:Src/main.c    **** 
-2469:Src/main.c    **** 	if (!LL_SPI_IsEnabled(SPI2))
-2470:Src/main.c    **** 	{
-2471:Src/main.c    **** 		LL_SPI_Enable(SPI2);
-2472:Src/main.c    **** 	}
-2473:Src/main.c    **** 
-2474:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
-2475:Src/main.c    **** 
-2476:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2477:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
-2478:Src/main.c    **** 	tmp32 = 0;
-2479:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2480:Src/main.c    **** 	(void) SPI2->DR;
-2481:Src/main.c    **** 
-2482:Src/main.c    **** 	tmp32 = 0;
-2483:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2484:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
-2485:Src/main.c    **** 	tmp32 = 0;
-2486:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2487:Src/main.c    **** 	(void) SPI2->DR;
-2488:Src/main.c    **** 
-2489:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-2490:Src/main.c    **** }
-2491:Src/main.c    **** 
-2492:Src/main.c    **** static uint16_t AD9102_ReadReg(uint16_t addr)
-2493:Src/main.c    **** {
-2494:Src/main.c    **** 	uint32_t tmp32 = 0;
-2495:Src/main.c    **** 	uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
-2496:Src/main.c    **** 	uint16_t value;
-2497:Src/main.c    **** 
-2498:Src/main.c    **** 	if (!LL_SPI_IsEnabled(SPI2))
-2499:Src/main.c    **** 	{
-2500:Src/main.c    **** 		LL_SPI_Enable(SPI2);
-2501:Src/main.c    **** 	}
-2502:Src/main.c    **** 
-2503:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
-2504:Src/main.c    **** 
-2505:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2506:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
-2507:Src/main.c    **** 	tmp32 = 0;
-2508:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2509:Src/main.c    **** 	(void) SPI2->DR;
-2510:Src/main.c    **** 
-2511:Src/main.c    **** 	tmp32 = 0;
-2512:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2513:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
-2514:Src/main.c    **** 	tmp32 = 0;
-2515:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2516:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
-2517:Src/main.c    **** 
-2518:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-2519:Src/main.c    **** 	return value;
-2520:Src/main.c    **** }
-2521:Src/main.c    **** 
-2522:Src/main.c    **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count)
-ARM GAS  /tmp/ccwR4KB7.s 			page 97
-
-
-2523:Src/main.c    **** {
-2524:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
-2525:Src/main.c    **** 	{
-2526:Src/main.c    **** 		AD9102_WriteReg(ad9102_reg_addr[i], values[i]);
-2527:Src/main.c    **** 	}
-2528:Src/main.c    **** }
-2529:Src/main.c    **** 
-2530:Src/main.c    **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, 
-2531:Src/main.c    **** {
-2532:Src/main.c    **** 	if (enable)
-2533:Src/main.c    **** 	{
-2534:Src/main.c    **** 		uint16_t saw_cfg;
-2535:Src/main.c    **** 		uint16_t pat_timebase;
-2536:Src/main.c    **** 
-2537:Src/main.c    **** 		if (saw_step == 0u)
-2538:Src/main.c    **** 		{
-2539:Src/main.c    **** 			saw_step = AD9102_SAW_STEP_DEFAULT;
-2540:Src/main.c    **** 		}
-2541:Src/main.c    **** 		if (saw_step > 63u)
-2542:Src/main.c    **** 		{
-2543:Src/main.c    **** 			saw_step = 63u;
-2544:Src/main.c    **** 		}
-2545:Src/main.c    **** 		saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
-2546:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
-2547:Src/main.c    **** 		pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
-2548:Src/main.c    **** 		                          ((pat_base & 0x0Fu) << 4) |
-2549:Src/main.c    **** 		                          (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
-2550:Src/main.c    **** 
-2551:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG);
-2552:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
-2553:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
-2554:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
-2555:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
-2556:Src/main.c    **** 
-2557:Src/main.c    **** 		// Update RUN then RAMUPDATE at the end of the write sequence.
-2558:Src/main.c    **** 		// AD9102 output is started by a falling edge of TRIGGER pin when RUN=1.
-2559:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2560:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
-2561:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-2562:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
-2563:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
-2564:Src/main.c    **** 	}
-2565:Src/main.c    **** 	else
-2566:Src/main.c    **** 	{
-2567:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-2568:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2569:Src/main.c    **** 	}
-2570:Src/main.c    **** 
-2571:Src/main.c    **** 	return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-2572:Src/main.c    **** }
-2573:Src/main.c    **** 
-2574:Src/main.c    **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
-2575:Src/main.c    **** {
-2576:Src/main.c    **** 	if (samples < 2u)
-2577:Src/main.c    **** 	{
-2578:Src/main.c    **** 		samples = 2u;
-2579:Src/main.c    **** 	}
-ARM GAS  /tmp/ccwR4KB7.s 			page 98
-
-
-2580:Src/main.c    **** 	if (samples > AD9102_SRAM_MAX_SAMPLES)
-2581:Src/main.c    **** 	{
-2582:Src/main.c    **** 		samples = AD9102_SRAM_MAX_SAMPLES;
-2583:Src/main.c    **** 	}
-2584:Src/main.c    **** 
-2585:Src/main.c    **** 	// Enable SRAM access.
-2586:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u);
-2587:Src/main.c    **** 
-2588:Src/main.c    **** 	for (uint16_t i = 0; i < samples; i++)
-2589:Src/main.c    **** 	{
-2590:Src/main.c    **** 		int32_t value;
-2591:Src/main.c    **** 		if (triangle)
-2592:Src/main.c    **** 		{
-2593:Src/main.c    **** 			uint16_t half = samples / 2u;
-2594:Src/main.c    **** 			if (half == 0u)
-2595:Src/main.c    **** 			{
-2596:Src/main.c    **** 				half = 1u;
-2597:Src/main.c    **** 			}
-2598:Src/main.c    **** 			if (i < half)
-2599:Src/main.c    **** 			{
-2600:Src/main.c    **** 				uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u;
-2601:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MIN +
-2602:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
-2603:Src/main.c    **** 			}
-2604:Src/main.c    **** 			else
-2605:Src/main.c    **** 			{
-2606:Src/main.c    **** 				uint16_t tail = (uint16_t)(samples - half);
-2607:Src/main.c    **** 				uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
-2608:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
-2609:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom;
-2610:Src/main.c    **** 			}
-2611:Src/main.c    **** 		}
-2612:Src/main.c    **** 		else
-2613:Src/main.c    **** 		{
-2614:Src/main.c    **** 			uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u;
-2615:Src/main.c    **** 			value = AD9102_SRAM_RAMP_MIN +
-2616:Src/main.c    **** 			        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
-2617:Src/main.c    **** 		}
+2580:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET);
+2581:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
+2582:Src/main.c    **** 	break;
+2583:Src/main.c    **** 
+2584:Src/main.c    **** 	case 2:
+2585:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET);
+2586:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
+2587:Src/main.c    **** 	break;
+2588:Src/main.c    **** 
+2589:Src/main.c    **** 	case 3:
+2590:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET);
+2591:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
+2592:Src/main.c    **** 	break;
+2593:Src/main.c    **** 
+2594:Src/main.c    **** 	case 4:
+2595:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET);
+2596:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
+2597:Src/main.c    **** 	break;
+2598:Src/main.c    **** 
+2599:Src/main.c    **** 	case 5:
+2600:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET);
+2601:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
+2602:Src/main.c    **** 	break;
+2603:Src/main.c    **** 
+2604:Src/main.c    **** 	case 6:
+2605:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET);
+2606:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
+2607:Src/main.c    **** 	break;
+2608:Src/main.c    **** 
+2609:Src/main.c    **** 	case 7:
+2610:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);
+2611:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
+2612:Src/main.c    **** 	break;
+2613:Src/main.c    **** 
+2614:Src/main.c    **** 	case 8:
+2615:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET);
+2616:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
+2617:Src/main.c    **** 	break;
 2618:Src/main.c    **** 
-2619:Src/main.c    **** 		if (value < -8192)
-2620:Src/main.c    **** 		{
-2621:Src/main.c    **** 			value = -8192;
-2622:Src/main.c    **** 		}
-2623:Src/main.c    **** 		else if (value > 8191)
-2624:Src/main.c    **** 		{
-2625:Src/main.c    **** 			value = 8191;
-2626:Src/main.c    **** 		}
-2627:Src/main.c    **** 
-2628:Src/main.c    **** 		uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu;
-2629:Src/main.c    **** 		uint16_t word = (uint16_t)(sample_u14 << 2);
-2630:Src/main.c    **** 		AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word);
-2631:Src/main.c    **** 	}
+2619:Src/main.c    **** 	case 9:
+2620:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET);
+2621:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
+2622:Src/main.c    **** 	break;
+2623:Src/main.c    **** 	}
+2624:Src/main.c    **** }
+2625:Src/main.c    **** 
+2626:Src/main.c    **** static void AD9102_Init(void)
+2627:Src/main.c    **** {
+2628:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+2629:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
+2630:Src/main.c    **** 	for (volatile uint32_t d = 0; d < 1000; d++) {}
+2631:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
 2632:Src/main.c    **** 
-2633:Src/main.c    **** 	// Disable SRAM access.
+2633:Src/main.c    **** 	AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
 2634:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-2635:Src/main.c    **** }
-2636:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 99
+2635:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+2636:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ARM GAS  /tmp/ccEQxcUB.s 			page 99
 
 
-2637:Src/main.c    **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle)
-2638:Src/main.c    **** {
-2639:Src/main.c    **** 	if (samples == 0u)
-2640:Src/main.c    **** 	{
-2641:Src/main.c    **** 		samples = AD9102_SRAM_SAMPLES_DEFAULT;
-2642:Src/main.c    **** 	}
-2643:Src/main.c    **** 	if (samples < 2u)
-2644:Src/main.c    **** 	{
-2645:Src/main.c    **** 		samples = 2u;
-2646:Src/main.c    **** 	}
-2647:Src/main.c    **** 	if (samples > AD9102_SRAM_MAX_SAMPLES)
-2648:Src/main.c    **** 	{
-2649:Src/main.c    **** 		samples = AD9102_SRAM_MAX_SAMPLES;
-2650:Src/main.c    **** 	}
-2651:Src/main.c    **** 	if (hold == 0u)
-2652:Src/main.c    **** 	{
-2653:Src/main.c    **** 		hold = AD9102_SRAM_HOLD_DEFAULT;
-2654:Src/main.c    **** 	}
-2655:Src/main.c    **** 	if (hold > 0x0Fu)
-2656:Src/main.c    **** 	{
-2657:Src/main.c    **** 		hold = 0x0Fu;
-2658:Src/main.c    **** 	}
-2659:Src/main.c    **** 
-2660:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
-2661:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
-2662:Src/main.c    **** 	                                   (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
-2663:Src/main.c    **** 	uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
-2664:Src/main.c    **** 	if (pat_period == 0u)
-2665:Src/main.c    **** 	{
-2666:Src/main.c    **** 		pat_period = samples;
-2667:Src/main.c    **** 	}
-2668:Src/main.c    **** 	if (pat_period > 0xFFFFu)
-2669:Src/main.c    **** 	{
-2670:Src/main.c    **** 		pat_period = 0xFFFFu;
-2671:Src/main.c    **** 	}
-2672:Src/main.c    **** 
-2673:Src/main.c    **** 	AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT);
-2674:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-2675:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
-2676:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
-2677:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
-2678:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
-2679:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
-2680:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
-2681:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
-2682:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
-2683:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
-2684:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-2685:Src/main.c    **** 
-2686:Src/main.c    **** 	AD9102_LoadSramRamp(samples, triangle);
-2687:Src/main.c    **** 
-2688:Src/main.c    **** 	if (enable)
-2689:Src/main.c    **** 	{
-2690:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2691:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
-2692:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-2693:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
-ARM GAS  /tmp/ccwR4KB7.s 			page 100
-
-
-2694:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
-2695:Src/main.c    **** 	}
-2696:Src/main.c    **** 	else
-2697:Src/main.c    **** 	{
-2698:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-2699:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2700:Src/main.c    **** 	}
-2701:Src/main.c    **** 
-2702:Src/main.c    **** 	return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-2703:Src/main.c    **** }
-2704:Src/main.c    **** 
-2705:Src/main.c    **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t
-2706:Src/main.c    **** {
-2707:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
-2708:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
-2709:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
-2710:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
-2711:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
-2712:Src/main.c    **** 	                                   ((pat_base & 0x0Fu) << 4) |
-2713:Src/main.c    **** 	                                   (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
-2714:Src/main.c    **** 
-2715:Src/main.c    **** 	if (saw_step == 0u)
-2716:Src/main.c    **** 	{
-2717:Src/main.c    **** 		saw_step = AD9102_SAW_STEP_DEFAULT;
-2718:Src/main.c    **** 	}
-2719:Src/main.c    **** 	if (saw_step > 63u)
-2720:Src/main.c    **** 	{
-2721:Src/main.c    **** 		saw_step = 63u;
-2722:Src/main.c    **** 	}
-2723:Src/main.c    **** 	if (pat_period == 0u)
-2724:Src/main.c    **** 	{
-2725:Src/main.c    **** 		pat_period = AD9102_PAT_PERIOD_DEFAULT;
-2726:Src/main.c    **** 	}
-2727:Src/main.c    **** 	uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
-2728:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
-2729:Src/main.c    **** 
-2730:Src/main.c    **** 	uint8_t ok = 1u;
-2731:Src/main.c    **** 
-2732:Src/main.c    **** 	// Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset.
-2733:Src/main.c    **** 	if (spiconfig != 0x0000u)
-2734:Src/main.c    **** 	{
-2735:Src/main.c    **** 		ok = 0u;
-2736:Src/main.c    **** 	}
-2737:Src/main.c    **** 
-2738:Src/main.c    **** 	// Power blocks should not be powered down.
-2739:Src/main.c    **** 	if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
-2740:Src/main.c    **** 	{
-2741:Src/main.c    **** 		ok = 0u;
-2742:Src/main.c    **** 	}
-2743:Src/main.c    **** 
-2744:Src/main.c    **** 	// Clock receiver must be enabled (cannot directly detect external clock presence).
-2745:Src/main.c    **** 	if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
-2746:Src/main.c    **** 	{
-2747:Src/main.c    **** 		ok = 0u;
-2748:Src/main.c    **** 	}
-2749:Src/main.c    **** 
-2750:Src/main.c    **** 	// Any configuration error flags indicate a bad setup.
-ARM GAS  /tmp/ccwR4KB7.s 			page 101
-
-
-2751:Src/main.c    **** 	if (cfg_err & 0x003Fu)
-2752:Src/main.c    **** 	{
-2753:Src/main.c    **** 		ok = 0u;
-2754:Src/main.c    **** 	}
-2755:Src/main.c    **** 
-2756:Src/main.c    **** 	if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
-2757:Src/main.c    **** 	{
-2758:Src/main.c    **** 		ok = 0u;
-2759:Src/main.c    **** 	}
-2760:Src/main.c    **** 
-2761:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG)
-2762:Src/main.c    **** 	{
-2763:Src/main.c    **** 		ok = 0u;
-2764:Src/main.c    **** 	}
-2765:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
-2766:Src/main.c    **** 	{
-2767:Src/main.c    **** 		ok = 0u;
-2768:Src/main.c    **** 	}
-2769:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period)
-2770:Src/main.c    **** 	{
-2771:Src/main.c    **** 		ok = 0u;
-2772:Src/main.c    **** 	}
-2773:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
-2774:Src/main.c    **** 	{
-2775:Src/main.c    **** 		ok = 0u;
-2776:Src/main.c    **** 	}
-2777:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw)
-2778:Src/main.c    **** 	{
-2779:Src/main.c    **** 		ok = 0u;
-2780:Src/main.c    **** 	}
-2781:Src/main.c    **** 
-2782:Src/main.c    **** 	return (ok ? 0u : 1u);
-2783:Src/main.c    **** }
-2784:Src/main.c    **** 
-2785:Src/main.c    **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin
-2786:Src/main.c    **** {
-2787:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
-2788:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
-2789:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
-2790:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
-2791:Src/main.c    **** 
-2792:Src/main.c    **** 	if (samples == 0u)
-2793:Src/main.c    **** 	{
-2794:Src/main.c    **** 		samples = AD9102_SRAM_SAMPLES_DEFAULT;
-2795:Src/main.c    **** 	}
-2796:Src/main.c    **** 	if (samples < 2u)
-2797:Src/main.c    **** 	{
-2798:Src/main.c    **** 		samples = 2u;
-2799:Src/main.c    **** 	}
-2800:Src/main.c    **** 	if (samples > AD9102_SRAM_MAX_SAMPLES)
-2801:Src/main.c    **** 	{
-2802:Src/main.c    **** 		samples = AD9102_SRAM_MAX_SAMPLES;
-2803:Src/main.c    **** 	}
-2804:Src/main.c    **** 	if (hold == 0u)
-2805:Src/main.c    **** 	{
-2806:Src/main.c    **** 		hold = AD9102_SRAM_HOLD_DEFAULT;
-2807:Src/main.c    **** 	}
-ARM GAS  /tmp/ccwR4KB7.s 			page 102
-
-
-2808:Src/main.c    **** 	if (hold > 0x0Fu)
-2809:Src/main.c    **** 	{
-2810:Src/main.c    **** 		hold = 0x0Fu;
-2811:Src/main.c    **** 	}
-2812:Src/main.c    **** 
-2813:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
-2814:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
-2815:Src/main.c    **** 	                                   (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
-2816:Src/main.c    **** 	uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
-2817:Src/main.c    **** 	if (pat_period == 0u)
-2818:Src/main.c    **** 	{
-2819:Src/main.c    **** 		pat_period = samples;
-2820:Src/main.c    **** 	}
-2821:Src/main.c    **** 	if (pat_period > 0xFFFFu)
-2822:Src/main.c    **** 	{
-2823:Src/main.c    **** 		pat_period = 0xFFFFu;
-2824:Src/main.c    **** 	}
-2825:Src/main.c    **** 
-2826:Src/main.c    **** 	uint16_t stop_addr = (uint16_t)((samples - 1u) << 4);
-2827:Src/main.c    **** 
-2828:Src/main.c    **** 	uint8_t ok = 1u;
-2829:Src/main.c    **** 
-2830:Src/main.c    **** 	if (spiconfig != 0x0000u)
-2831:Src/main.c    **** 	{
-2832:Src/main.c    **** 		ok = 0u;
-2833:Src/main.c    **** 	}
-2834:Src/main.c    **** 	if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
-2835:Src/main.c    **** 	{
-2836:Src/main.c    **** 		ok = 0u;
-2837:Src/main.c    **** 	}
-2838:Src/main.c    **** 	if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
-2839:Src/main.c    **** 	{
-2840:Src/main.c    **** 		ok = 0u;
-2841:Src/main.c    **** 	}
-2842:Src/main.c    **** 	if (cfg_err & 0x003Fu)
-2843:Src/main.c    **** 	{
-2844:Src/main.c    **** 		ok = 0u;
-2845:Src/main.c    **** 	}
-2846:Src/main.c    **** 	if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
-2847:Src/main.c    **** 	{
-2848:Src/main.c    **** 		ok = 0u;
-2849:Src/main.c    **** 	}
-2850:Src/main.c    **** 
-2851:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG)
-2852:Src/main.c    **** 	{
-2853:Src/main.c    **** 		ok = 0u;
-2854:Src/main.c    **** 	}
-2855:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
-2856:Src/main.c    **** 	{
-2857:Src/main.c    **** 		ok = 0u;
-2858:Src/main.c    **** 	}
-2859:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period)
-2860:Src/main.c    **** 	{
-2861:Src/main.c    **** 		ok = 0u;
-2862:Src/main.c    **** 	}
-2863:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
-2864:Src/main.c    **** 	{
-ARM GAS  /tmp/ccwR4KB7.s 			page 103
-
-
-2865:Src/main.c    **** 		ok = 0u;
-2866:Src/main.c    **** 	}
-2867:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u)
-2868:Src/main.c    **** 	{
-2869:Src/main.c    **** 		ok = 0u;
-2870:Src/main.c    **** 	}
-2871:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr)
-2872:Src/main.c    **** 	{
-2873:Src/main.c    **** 		ok = 0u;
-2874:Src/main.c    **** 	}
-2875:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT)
-2876:Src/main.c    **** 	{
-2877:Src/main.c    **** 		ok = 0u;
-2878:Src/main.c    **** 	}
-2879:Src/main.c    **** 
-2880:Src/main.c    **** 	return (ok ? 0u : 1u);
-2881:Src/main.c    **** }
-2882:Src/main.c    **** 
-2883:Src/main.c    **** void Set_LTEC(uint8_t num, uint16_t DATA)
-2884:Src/main.c    **** {
-2885:Src/main.c    **** 	uint32_t tmp32;
-2886:Src/main.c    **** 
-2887:Src/main.c    **** #if AD9102_ON_SPI2
-2888:Src/main.c    **** 	// AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts.
-2889:Src/main.c    **** 	if (num == 1 || num == 3)
-2890:Src/main.c    **** 	{
-2891:Src/main.c    **** 		return;
-2892:Src/main.c    **** 	}
-2893:Src/main.c    **** #endif
-2894:Src/main.c    **** 
-2895:Src/main.c    **** 	switch (num)
-2896:Src/main.c    **** 	{
-2897:Src/main.c    **** 		case 1:
-2898:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L
-2899:Src/main.c    **** 			//tmp32=0;
-2900:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
-2901:Src/main.c    **** 			tmp32 = 0;
-2902:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-2903:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
-2904:Src/main.c    **** 			tmp32 = 0;
-2905:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-2906:Src/main.c    **** 			(void) SPI2->DR;
-2907:Src/main.c    **** 		break;
-2908:Src/main.c    **** 		case 2:
-2909:Src/main.c    **** 			//HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes
-2910:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L
-2911:Src/main.c    **** 			//tmp32=0;
-2912:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
-2913:Src/main.c    **** 			tmp32 = 0;
-2914:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-2915:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
-2916:Src/main.c    **** 			tmp32 = 0;
-2917:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-2918:Src/main.c    **** 			(void) SPI6->DR;
-2919:Src/main.c    **** 		break;
-2920:Src/main.c    **** 		case 3:
-2921:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with
-ARM GAS  /tmp/ccwR4KB7.s 			page 104
-
-
-2922:Src/main.c    **** 			//tmp32=0;
-2923:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
-2924:Src/main.c    **** 			tmp32 = 0;
-2925:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-2926:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
-2927:Src/main.c    **** 			tmp32 = 0;
-2928:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-2929:Src/main.c    **** 			(void) SPI2->DR;
-2930:Src/main.c    **** 		break;
-2931:Src/main.c    **** 		case 4:
-2932:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with
-2933:Src/main.c    **** 			//tmp32=0;
-2934:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
-2935:Src/main.c    **** 			tmp32 = 0;
-2936:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-2937:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
-2938:Src/main.c    **** 			tmp32 = 0;
-2939:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-2940:Src/main.c    **** 			(void) SPI6->DR;
-2941:Src/main.c    **** 		break;
-2942:Src/main.c    **** 	}
-2943:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
-2944:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
-2945:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
-2946:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
-2947:Src/main.c    **** }
-2948:Src/main.c    **** static uint16_t MPhD_T(uint8_t num)
-2949:Src/main.c    **** {
-2950:Src/main.c    **** 	uint16_t P;
-2951:Src/main.c    **** 	uint32_t tmp32;
-2952:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
-2953:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
-2954:Src/main.c    **** 	tmp32=0;
-2955:Src/main.c    **** 	while(tmp32<500){tmp32++;}
-2956:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
-2957:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
-2958:Src/main.c    **** 	tmp32=0;
-2959:Src/main.c    **** 	while(tmp32<500){tmp32++;}
-2960:Src/main.c    **** 	if (num==1)//MPD1
-2961:Src/main.c    **** 	{
-2962:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
-2963:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
-2964:Src/main.c    **** 		tmp32=0;
-2965:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-2966:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-2967:Src/main.c    **** 		LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC
-2968:Src/main.c    **** 		tmp32 = 0;
-2969:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-2970:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
-2971:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-2972:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-2973:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
-2974:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
-2975:Src/main.c    **** 	}
-2976:Src/main.c    **** 	else if (num==2)//MPD2
-2977:Src/main.c    **** 	{
-2978:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
-ARM GAS  /tmp/ccwR4KB7.s 			page 105
-
-
-2979:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
-2980:Src/main.c    **** 		tmp32=0;
-2981:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-2982:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-2983:Src/main.c    **** 		LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC
-2984:Src/main.c    **** 		tmp32 = 0;
-2985:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-2986:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
-2987:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-2988:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-2989:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
-2990:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
-2991:Src/main.c    **** 	}
-2992:Src/main.c    **** 	else if (num==3)//ThrLD1
-2993:Src/main.c    **** 	{
-2994:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
-2995:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
-2996:Src/main.c    **** 		tmp32=0;
-2997:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-2998:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-2999:Src/main.c    **** 		LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC
-3000:Src/main.c    **** 		tmp32 = 0;
-3001:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-3002:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
-3003:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-3004:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-3005:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
-3006:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
-3007:Src/main.c    **** 	}
-3008:Src/main.c    **** 	else if (num==4)//ThrLD2
-3009:Src/main.c    **** 	{
-3010:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
-3011:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
-3012:Src/main.c    **** 		tmp32=0;
-3013:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-3014:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-3015:Src/main.c    **** 		LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC
-3016:Src/main.c    **** 		tmp32 = 0;
-3017:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-3018:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
-3019:Src/main.c    **** 		while(tmp32<500){tmp32++;}
-3020:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-3021:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
-3022:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
-3023:Src/main.c    **** 	}
-3024:Src/main.c    **** 	/*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm;
-3025:Src/main.c    **** 	
-3026:Src/main.c    **** 	Inorm = (float) (65535) / (float) (100);
-3027:Src/main.c    **** 	Tnorm1 = (float) (65535) / (float) (50);
-3028:Src/main.c    **** 	Tnorm2 = 4;
-3029:Src/main.c    **** 	Pnorm = (float)(65535) / (float)(20);
-3030:Src/main.c    **** 	I0m = 8.1568;//@4 C - lowest temperature of system
-3031:Src/main.c    **** 	T0m = 48.6282;
-3032:Src/main.c    **** 	T_C = (float) (T_LD) / Tnorm1 + Tnorm2;
-3033:Src/main.c    **** 	
-3034:Src/main.c    **** 	Ith = I0m * expf(T_C/T0m);
-3035:Src/main.c    **** 	I_LD = (float) (C_LD) / Inorm;
-ARM GAS  /tmp/ccwR4KB7.s 			page 106
-
-
-3036:Src/main.c    **** 	
-3037:Src/main.c    **** 	if (I_LD > Ith)
-3038:Src/main.c    **** 	{
-3039:Src/main.c    **** 		A = (float) (2.24276128270098e-07) * T_C * T_C * T_C  - (float) (4.73392579025590e-05) * T_C * T_
-3040:Src/main.c    **** 		P = A * (I_LD - Ith) * Pnorm;
-3041:Src/main.c    **** 	}
-3042:Src/main.c    **** 	else
-3043:Src/main.c    **** 	{
-3044:Src/main.c    **** 		P = 0;
-3045:Src/main.c    **** 	}	*/
-3046:Src/main.c    **** 	return P;
-3047:Src/main.c    **** }
-3048:Src/main.c    **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time
-3049:Src/main.c    **** {
-3050:Src/main.c    **** 	uint16_t Result;
-3051:Src/main.c    **** //	uint8_t randf;
-3052:Src/main.c    **** 	
-3053:Src/main.c    **** 	randf = 0;
-3054:Src/main.c    **** 	for (uint8_t i = 0; i < 32; i++)
-3055:Src/main.c    **** 	{
-3056:Src/main.c    **** 		randf = ((Timer>>i)&0x0001)^randf;
-3057:Src/main.c    **** 	}
-3058:Src/main.c    **** 	
-3059:Src/main.c    **** 	Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl
-3060:Src/main.c    **** 	
-3061:Src/main.c    **** 	return (uint16_t)(Result);
-3062:Src/main.c    **** }*/
-3063:Src/main.c    **** static uint16_t Get_ADC(uint8_t num)
-3064:Src/main.c    **** {
-3065:Src/main.c    **** 	uint16_t OUT;
-3066:Src/main.c    **** 	switch (num)
-3067:Src/main.c    **** 		{
-3068:Src/main.c    **** 			case 0:
-3069:Src/main.c    **** 				HAL_ADC_Start(&hadc1); // Power on
-3070:Src/main.c    **** 			break;
-3071:Src/main.c    **** 			case 1:
-3072:Src/main.c    **** 				HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion
-3073:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
-3074:Src/main.c    **** 			break;
-3075:Src/main.c    **** 			case 2:
-3076:Src/main.c    **** 				HAL_ADC_Stop(&hadc1); // Power off
-3077:Src/main.c    **** 			break;
-3078:Src/main.c    **** 			case 3:
-3079:Src/main.c    **** 				HAL_ADC_Start(&hadc3); // Power on
-3080:Src/main.c    **** 			break;
-3081:Src/main.c    **** 			case 4:
-3082:Src/main.c    **** 				HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion
-3083:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
-3084:Src/main.c    **** 			break;
-3085:Src/main.c    **** 			case 5:
-3086:Src/main.c    ****         HAL_ADC_Stop(&hadc3); // Power off
-3087:Src/main.c    **** 			break;
-3088:Src/main.c    **** 		}
-3089:Src/main.c    **** 	return OUT;
-3090:Src/main.c    **** }
-3091:Src/main.c    **** 
-3092:Src/main.c    **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results
-ARM GAS  /tmp/ccwR4KB7.s 			page 107
-
-
-3093:Src/main.c    **** {
-3094:Src/main.c    **** 	// Main idea:
-3095:Src/main.c    **** 	// I is responsible to maintaining constant temperature difference between laser and room temperat
-3096:Src/main.c    **** 	// As room temperature can be approximated as constant at current-varying time -- I should be kept
-3097:Src/main.c    **** 	// As current through laser diode heats it -- we can estimate excessive power on laser diode and t
-3098:Src/main.c    **** 	// So, equation should be look like this:
-3099:Src/main.c    **** 	//   x_output = x_output_original + I(laser)*(a + (t - b)c)
-3100:Src/main.c    **** 	//     t -- cycle phase
-3101:Src/main.c    **** 	//     a,b,c -- constants
-3102:Src/main.c    **** 	//
-3103:Src/main.c    **** 	// How can we control laser diode temperature?
-3104:Src/main.c    **** 	//   -- We can set laser to fixed current at the time we need to measure.
-3105:Src/main.c    **** 	//   Then we should measure wavelength.
-3106:Src/main.c    **** 	// Calibration sequence:
-3107:Src/main.c    **** 	//   1) n
-3108:Src/main.c    **** 
-3109:Src/main.c    **** 
-3110:Src/main.c    **** 
-3111:Src/main.c    **** 	int e_pid;
-3112:Src/main.c    **** 	float P_coef_current;//, I_coef_current;
-3113:Src/main.c    **** 	float e_integral;
-3114:Src/main.c    **** 	int x_output;
-3115:Src/main.c    **** 
-3116:Src/main.c    **** 	e_pid =  (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
-3117:Src/main.c    **** 
-3118:Src/main.c    **** 	e_integral = LDx_results->e_integral;
-3119:Src/main.c    **** 
-3120:Src/main.c    **** 	if((e_pid < 3000) && (e_pid > - 3000)){
-3121:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
-3122:Src/main.c    **** 	}
-3123:Src/main.c    **** 	P_coef_current = LDx_curr_setup->P_coef_temp;
-3124:Src/main.c    **** 
-3125:Src/main.c    **** 	if (e_integral > 32000){
-3126:Src/main.c    **** 			e_integral = 32000;
-3127:Src/main.c    **** 	}
-3128:Src/main.c    **** 	else if (e_integral < - 32000){
-3129:Src/main.c    **** 			e_integral = -32000;
-3130:Src/main.c    **** 	}
-3131:Src/main.c    **** 	LDx_results->e_integral = e_integral;
-3132:Src/main.c    **** 
-3133:Src/main.c    **** 	x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in
-3134:Src/main.c    **** 
-3135:Src/main.c    **** 	if(x_output < 1000){
-3136:Src/main.c    **** 		x_output = 8800;
-3137:Src/main.c    **** 	}
-3138:Src/main.c    **** 	else if(x_output > 56800){
-3139:Src/main.c    **** 		x_output = 56800;
-3140:Src/main.c    **** 	}
-3141:Src/main.c    **** 
-3142:Src/main.c    **** 	if (num==2)
-3143:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
-3144:Src/main.c    **** 
-3145:Src/main.c    **** 	return (uint16_t)x_output;
-3146:Src/main.c    **** }
-3147:Src/main.c    **** 
-3148:Src/main.c    **** 
-3149:Src/main.c    **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin
-ARM GAS  /tmp/ccwR4KB7.s 			page 108
-
-
-3150:Src/main.c    **** {			
- 545              		.loc 1 3150 1 is_stmt 1 view -0
+2637:Src/main.c    **** }
+2638:Src/main.c    **** 
+2639:Src/main.c    **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase)
+2640:Src/main.c    **** {
+ 545              		.loc 1 2640 1 is_stmt 1 view -0
  546              		.cfi_startproc
  547              		@ args = 0, pretend = 0, frame = 0
  548              		@ frame_needed = 0, uses_anonymous_args = 0
  549              		@ link register save eliminated.
- 550              		.loc 1 3150 1 is_stmt 0 view .LVU201
- 551 0000 30B4     		push	{r4, r5}
- 552              	.LCFI6:
- 553              		.cfi_def_cfa_offset 8
- 554              		.cfi_offset 4, -8
- 555              		.cfi_offset 5, -4
-3151:Src/main.c    **** 	int e_pid;
- 556              		.loc 1 3151 2 is_stmt 1 view .LVU202
-3152:Src/main.c    **** 	float P_coef_current;//, I_coef_current;
- 557              		.loc 1 3152 2 view .LVU203
-3153:Src/main.c    **** 	float e_integral;
- 558              		.loc 1 3153 2 view .LVU204
-3154:Src/main.c    **** 	int x_output;
- 559              		.loc 1 3154 2 view .LVU205
-3155:Src/main.c    **** 	
-3156:Src/main.c    **** 	e_pid =  (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
- 560              		.loc 1 3156 2 view .LVU206
- 561              		.loc 1 3156 28 is_stmt 0 view .LVU207
- 562 0002 0B88     		ldrh	r3, [r1]
- 563              		.loc 1 3156 65 view .LVU208
- 564 0004 0488     		ldrh	r4, [r0]
- 565              		.loc 1 3156 8 view .LVU209
- 566 0006 1B1B     		subs	r3, r3, r4
- 567              	.LVL34:
-3157:Src/main.c    **** 
-3158:Src/main.c    **** 	e_integral = LDx_results->e_integral;
- 568              		.loc 1 3158 2 is_stmt 1 view .LVU210
- 569              		.loc 1 3158 13 is_stmt 0 view .LVU211
- 570 0008 D1ED017A 		vldr.32	s15, [r1, #4]
- 571              	.LVL35:
-3159:Src/main.c    **** 	
-3160:Src/main.c    **** 	if((e_pid < 3000) && (e_pid > - 3000)){
- 572              		.loc 1 3160 2 is_stmt 1 view .LVU212
- 573              		.loc 1 3160 20 is_stmt 0 view .LVU213
- 574 000c 03F6B73C 		addw	ip, r3, #2999
- 575              		.loc 1 3160 4 view .LVU214
- 576 0010 41F26E74 		movw	r4, #5998
- 577 0014 A445     		cmp	ip, r4
- 578 0016 18D8     		bhi	.L17
-3161:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 579              		.loc 1 3161 3 is_stmt 1 view .LVU215
- 580              		.loc 1 3161 31 is_stmt 0 view .LVU216
- 581 0018 90ED027A 		vldr.32	s14, [r0, #8]
- 582              		.loc 1 3161 47 view .LVU217
- 583 001c 06EE903A 		vmov	s13, r3	@ int
- 584 0020 F8EEE66A 		vcvt.f32.s32	s13, s13
- 585              		.loc 1 3161 45 view .LVU218
- 586 0024 27EE267A 		vmul.f32	s14, s14, s13
- 587              		.loc 1 3161 76 view .LVU219
- 588 0028 284C     		ldr	r4, .L27
- 589 002a 2468     		ldr	r4, [r4]
-ARM GAS  /tmp/ccwR4KB7.s 			page 109
-
-
- 590 002c 284D     		ldr	r5, .L27+4
- 591 002e 2D68     		ldr	r5, [r5]
- 592 0030 641B     		subs	r4, r4, r5
- 593              		.loc 1 3161 64 view .LVU220
- 594 0032 06EE904A 		vmov	s13, r4	@ int
- 595 0036 F8EE666A 		vcvt.f32.u32	s13, s13
- 596              		.loc 1 3161 62 view .LVU221
- 597 003a 27EE267A 		vmul.f32	s14, s14, s13
- 598              		.loc 1 3161 87 view .LVU222
- 599 003e 9FED256A 		vldr.32	s12, .L27+8
- 600 0042 C7EE066A 		vdiv.f32	s13, s14, s12
- 601              		.loc 1 3161 14 view .LVU223
- 602 0046 77EEA67A 		vadd.f32	s15, s15, s13
- 603              	.LVL36:
- 604              	.L17:
-3162:Src/main.c    **** 	}
-3163:Src/main.c    **** 	P_coef_current = LDx_curr_setup->P_coef_temp;
- 605              		.loc 1 3163 2 is_stmt 1 view .LVU224
- 606              		.loc 1 3163 17 is_stmt 0 view .LVU225
- 607 004a D0ED016A 		vldr.32	s13, [r0, #4]
- 608              	.LVL37:
-3164:Src/main.c    **** 	
-3165:Src/main.c    **** 	if (e_integral > 32000){
- 609              		.loc 1 3165 2 is_stmt 1 view .LVU226
- 610              		.loc 1 3165 5 is_stmt 0 view .LVU227
- 611 004e 9FED227A 		vldr.32	s14, .L27+12
- 612 0052 F4EEC77A 		vcmpe.f32	s15, s14
- 613 0056 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
- 614 005a 09DC     		bgt	.L21
-3166:Src/main.c    **** 			e_integral = 32000;
-3167:Src/main.c    **** 	}
-3168:Src/main.c    **** 	else if (e_integral < - 32000){
- 615              		.loc 1 3168 7 is_stmt 1 view .LVU228
- 616              		.loc 1 3168 10 is_stmt 0 view .LVU229
- 617 005c 9FED1F7A 		vldr.32	s14, .L27+16
- 618 0060 F4EEC77A 		vcmpe.f32	s15, s14
- 619 0064 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
- 620 0068 04D5     		bpl	.L18
-3169:Src/main.c    **** 			e_integral = -32000;
- 621              		.loc 1 3169 15 view .LVU230
- 622 006a DFED1C7A 		vldr.32	s15, .L27+16
- 623              	.LVL38:
- 624              		.loc 1 3169 15 view .LVU231
- 625 006e 01E0     		b	.L18
- 626              	.LVL39:
- 627              	.L21:
-3166:Src/main.c    **** 			e_integral = 32000;
- 628              		.loc 1 3166 15 view .LVU232
- 629 0070 DFED197A 		vldr.32	s15, .L27+12
- 630              	.LVL40:
- 631              	.L18:
-3170:Src/main.c    **** 	}
-3171:Src/main.c    **** 	LDx_results->e_integral = e_integral;
- 632              		.loc 1 3171 2 is_stmt 1 view .LVU233
- 633              		.loc 1 3171 26 is_stmt 0 view .LVU234
- 634 0074 C1ED017A 		vstr.32	s15, [r1, #4]
-3172:Src/main.c    **** 	
-ARM GAS  /tmp/ccwR4KB7.s 			page 110
-
-
-3173:Src/main.c    **** 	x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in
- 635              		.loc 1 3173 2 is_stmt 1 view .LVU235
- 636              		.loc 1 3173 36 is_stmt 0 view .LVU236
- 637 0078 07EE103A 		vmov	s14, r3	@ int
- 638 007c B8EEC77A 		vcvt.f32.s32	s14, s14
- 639 0080 27EE267A 		vmul.f32	s14, s14, s13
- 640              		.loc 1 3173 19 view .LVU237
- 641 0084 DFED166A 		vldr.32	s13, .L27+20
- 642              	.LVL41:
- 643              		.loc 1 3173 19 view .LVU238
- 644 0088 37EE267A 		vadd.f32	s14, s14, s13
- 645              		.loc 1 3173 46 view .LVU239
- 646 008c FDEEE77A 		vcvt.s32.f32	s15, s15
- 647              	.LVL42:
- 648              		.loc 1 3173 44 view .LVU240
- 649 0090 F8EEE77A 		vcvt.f32.s32	s15, s15
- 650 0094 77EE877A 		vadd.f32	s15, s15, s14
- 651              		.loc 1 3173 11 view .LVU241
- 652 0098 FDEEE77A 		vcvt.s32.f32	s15, s15
- 653 009c 17EE900A 		vmov	r0, s15	@ int
- 654              	.LVL43:
-3174:Src/main.c    **** 	
-3175:Src/main.c    **** 	if(x_output < 1000){
- 655              		.loc 1 3175 2 is_stmt 1 view .LVU242
- 656              		.loc 1 3175 4 is_stmt 0 view .LVU243
- 657 00a0 B0F57A7F 		cmp	r0, #1000
- 658 00a4 06DB     		blt	.L23
-3176:Src/main.c    **** 		x_output = 8800;
-3177:Src/main.c    **** 	}
-3178:Src/main.c    **** 	else if(x_output > 56800){
- 659              		.loc 1 3178 7 is_stmt 1 view .LVU244
- 660              		.loc 1 3178 9 is_stmt 0 view .LVU245
- 661 00a6 4DF6E053 		movw	r3, #56800
- 662              	.LVL44:
- 663              		.loc 1 3178 9 view .LVU246
- 664 00aa 9842     		cmp	r0, r3
- 665 00ac 04DD     		ble	.L19
-3179:Src/main.c    **** 		x_output = 56800;
- 666              		.loc 1 3179 12 view .LVU247
- 667 00ae 4DF6E050 		movw	r0, #56800
- 668              	.LVL45:
- 669              		.loc 1 3179 12 view .LVU248
- 670 00b2 01E0     		b	.L19
- 671              	.LVL46:
- 672              	.L23:
-3176:Src/main.c    **** 		x_output = 8800;
- 673              		.loc 1 3176 12 view .LVU249
- 674 00b4 42F26020 		movw	r0, #8800
- 675              	.LVL47:
- 676              	.L19:
-3180:Src/main.c    **** 	}
-3181:Src/main.c    **** 	
-3182:Src/main.c    **** 	if (num==2)
- 677              		.loc 1 3182 2 is_stmt 1 view .LVU250
- 678              		.loc 1 3182 5 is_stmt 0 view .LVU251
- 679 00b8 022A     		cmp	r2, #2
- 680 00ba 02D0     		beq	.L26
-ARM GAS  /tmp/ccwR4KB7.s 			page 111
-
-
- 681              	.LVL48:
- 682              	.L20:
-3183:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
-3184:Src/main.c    **** 	
-3185:Src/main.c    **** 	return (uint16_t)x_output;
- 683              		.loc 1 3185 2 is_stmt 1 view .LVU252
-3186:Src/main.c    **** }
- 684              		.loc 1 3186 1 is_stmt 0 view .LVU253
- 685 00bc 80B2     		uxth	r0, r0
- 686              	.LVL49:
- 687              		.loc 1 3186 1 view .LVU254
- 688 00be 30BC     		pop	{r4, r5}
- 689              	.LCFI7:
- 690              		.cfi_remember_state
- 691              		.cfi_restore 5
- 692              		.cfi_restore 4
- 693              		.cfi_def_cfa_offset 0
- 694 00c0 7047     		bx	lr
- 695              	.LVL50:
- 696              	.L26:
- 697              	.LCFI8:
- 698              		.cfi_restore_state
-3183:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
- 699              		.loc 1 3183 3 is_stmt 1 view .LVU255
-3183:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
- 700              		.loc 1 3183 11 is_stmt 0 view .LVU256
- 701 00c2 024B     		ldr	r3, .L27
- 702 00c4 1A68     		ldr	r2, [r3]
- 703              	.LVL51:
-3183:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
- 704              		.loc 1 3183 11 view .LVU257
- 705 00c6 024B     		ldr	r3, .L27+4
- 706 00c8 1A60     		str	r2, [r3]
- 707 00ca F7E7     		b	.L20
- 708              	.L28:
- 709              		.align	2
- 710              	.L27:
- 711 00cc 00000000 		.word	TO7
- 712 00d0 00000000 		.word	TO7_PID
- 713 00d4 0000C842 		.word	1120403456
- 714 00d8 0000FA46 		.word	1190789120
- 715 00dc 0000FAC6 		.word	-956694528
- 716 00e0 00000047 		.word	1191182336
- 717              		.cfi_endproc
- 718              	.LFE1224:
- 720              		.section	.text.AD9102_WriteReg,"ax",%progbits
- 721              		.align	1
- 722              		.syntax unified
- 723              		.thumb
- 724              		.thumb_func
- 726              	AD9102_WriteReg:
- 727              	.LVL52:
- 728              	.LFB1212:
-2465:Src/main.c    **** 	uint32_t tmp32 = 0;
- 729              		.loc 1 2465 1 is_stmt 1 view -0
- 730              		.cfi_startproc
- 731              		@ args = 0, pretend = 0, frame = 0
-ARM GAS  /tmp/ccwR4KB7.s 			page 112
-
-
- 732              		@ frame_needed = 0, uses_anonymous_args = 0
-2465:Src/main.c    **** 	uint32_t tmp32 = 0;
- 733              		.loc 1 2465 1 is_stmt 0 view .LVU259
- 734 0000 38B5     		push	{r3, r4, r5, lr}
- 735              	.LCFI9:
- 736              		.cfi_def_cfa_offset 16
- 737              		.cfi_offset 3, -16
- 738              		.cfi_offset 4, -12
- 739              		.cfi_offset 5, -8
- 740              		.cfi_offset 14, -4
- 741 0002 0C46     		mov	r4, r1
-2466:Src/main.c    **** 	uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
- 742              		.loc 1 2466 2 is_stmt 1 view .LVU260
- 743              	.LVL53:
-2467:Src/main.c    **** 
- 744              		.loc 1 2467 2 view .LVU261
-2467:Src/main.c    **** 
- 745              		.loc 1 2467 11 is_stmt 0 view .LVU262
- 746 0004 C0F30E05 		ubfx	r5, r0, #0, #15
- 747              	.LVL54:
-2469:Src/main.c    **** 	{
- 748              		.loc 1 2469 2 is_stmt 1 view .LVU263
- 749              	.LBB339:
- 750              	.LBI339:
- 751              		.file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h"
+2641:Src/main.c    **** 	if (LL_SPI_IsEnabled(SPI2))
+ 550              		.loc 1 2641 2 view .LVU201
+ 551              	.LBB359:
+ 552              	.LBI359:
+ 553              		.file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h"
    1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
    2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   ******************************************************************************
    3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @file    stm32f7xx_ll_spi.h
@@ -6718,9 +5927,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @addtogroup STM32F7xx_LL_Driver
   31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @{
   32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 113
-
-
   33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
   34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defin
   35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
@@ -6732,6 +5938,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private variables ---------------------------------------------------------*/
   42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private macros ------------------------------------------------------------*/
   43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 100
+
+
   44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported types ------------------------------------------------------------*/
   45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined(USE_FULL_LL_DRIVER)
   46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_ES_INIT SPI Exported Init structure
@@ -6778,9 +5987,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****                                          @note The communication clock is derived from the master c
   88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
   89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****                                          This feature can be modified afterwards using unitary func
-ARM GAS  /tmp/ccwR4KB7.s 			page 114
-
-
   90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
   91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   uint32_t BitOrder;                /*!< Specifies whether data transfers start from MSB or LSB bit
   92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****                                          This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER.
@@ -6792,6 +5998,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
   99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****                                          This feature can be modified afterwards using unitary func
  100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 101
+
+
  101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   uint32_t CRCPoly;                 /*!< Specifies the polynomial used for the CRC calculation.
  102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****                                          This parameter must be a number between Min_Data = 0x00 an
  103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
@@ -6838,9 +6047,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_MODE Operation Mode
  145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @{
  146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 115
-
-
  147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)    /*!< Master configuratio
  148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_MODE_SLAVE                  0x00000000U                     /*!< Slave configuration
  149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -6852,6 +6058,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_MOTOROLA           0x00000000U               /*!< Motorola mode. Used as de
  157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_TI                 (SPI_CR2_FRF)             /*!< TI mode                  
+ARM GAS  /tmp/ccEQxcUB.s 			page 102
+
+
  158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @}
  160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
@@ -6898,9 +6107,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @}
  202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 116
-
-
  204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode
  205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @{
  206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
@@ -6912,6 +6118,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @}
  213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 103
+
+
  215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode
  216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @{
  217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
@@ -6958,9 +6167,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRC_8BIT                    0x00000000U               /*!<  8-bit CRC length */
  260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRC_16BIT                   (SPI_CR1_CRCL)            /*!< 16-bit CRC length */
-ARM GAS  /tmp/ccwR4KB7.s 			page 117
-
-
  261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @}
  263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
@@ -6972,6 +6178,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_RX_FIFO_TH_QUARTER          (SPI_CR2_FRXTH)           /*!< RXNE event is generated i
  270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @}
+ARM GAS  /tmp/ccEQxcUB.s 			page 104
+
+
  272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_RX_FIFO RX FIFO Level
@@ -7018,9 +6227,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros
  316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @{
  317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 118
-
-
  318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Write a value in SPI register
@@ -7032,6 +6238,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE
  327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 105
+
+
  329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Read a value in SPI register
  330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  __INSTANCE__ SPI Instance
  331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  __REG__ Register to be read
@@ -7078,9 +6287,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
  373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 119
-
-
  375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Check if SPI peripheral is enabled
  377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR1          SPE           LL_SPI_IsEnabled
@@ -7088,69 +6294,49 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval State of bit (1 or 0).
  380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
- 752              		.loc 4 381 26 view .LVU264
- 753              	.LBB340:
+ 554              		.loc 4 381 26 view .LVU202
+ 555              	.LBB360:
  382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
  383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL);
- 754              		.loc 4 383 3 view .LVU265
- 755              		.loc 4 383 12 is_stmt 0 view .LVU266
- 756 0008 274B     		ldr	r3, .L44
- 757 000a 1B68     		ldr	r3, [r3]
- 758              		.loc 4 383 69 view .LVU267
- 759 000c 13F0400F 		tst	r3, #64
- 760 0010 04D1     		bne	.L30
- 761              	.LVL55:
- 762              		.loc 4 383 69 view .LVU268
- 763              	.LBE340:
- 764              	.LBE339:
-2471:Src/main.c    **** 	}
- 765              		.loc 1 2471 3 is_stmt 1 view .LVU269
- 766              	.LBB341:
- 767              	.LBI341:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 768              		.loc 4 358 22 view .LVU270
- 769              	.LBB342:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 770              		.loc 4 360 3 view .LVU271
- 771 0012 254A     		ldr	r2, .L44
- 772 0014 1368     		ldr	r3, [r2]
- 773 0016 43F04003 		orr	r3, r3, #64
- 774 001a 1360     		str	r3, [r2]
- 775              	.LVL56:
- 776              	.L30:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 777              		.loc 4 360 3 is_stmt 0 view .LVU272
- 778              	.LBE342:
- 779              	.LBE341:
-2474:Src/main.c    **** 
- 780              		.loc 1 2474 2 is_stmt 1 view .LVU273
- 781 001c 0022     		movs	r2, #0
- 782 001e 4FF48051 		mov	r1, #4096
- 783              	.LVL57:
-2474:Src/main.c    **** 
- 784              		.loc 1 2474 2 is_stmt 0 view .LVU274
- 785 0022 2248     		ldr	r0, .L44+4
- 786              	.LVL58:
-2474:Src/main.c    **** 
- 787              		.loc 1 2474 2 view .LVU275
- 788 0024 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 789              	.LVL59:
-2476:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 790              		.loc 1 2476 2 is_stmt 1 view .LVU276
-2466:Src/main.c    **** 	uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
-ARM GAS  /tmp/ccwR4KB7.s 			page 120
+ARM GAS  /tmp/ccEQxcUB.s 			page 106
 
 
- 791              		.loc 1 2466 11 is_stmt 0 view .LVU277
- 792 0028 0023     		movs	r3, #0
- 793              	.LVL60:
- 794              	.L32:
-2476:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 795              		.loc 1 2476 63 is_stmt 1 discriminator 2 view .LVU278
-2476:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 796              		.loc 1 2476 41 discriminator 2 view .LVU279
- 797              	.LBB343:
- 798              	.LBI343:
+ 556              		.loc 4 383 3 view .LVU203
+ 557              		.loc 4 383 12 is_stmt 0 view .LVU204
+ 558 0000 0F4B     		ldr	r3, .L19
+ 559 0002 1B68     		ldr	r3, [r3]
+ 560              		.loc 4 383 69 view .LVU205
+ 561 0004 13F0400F 		tst	r3, #64
+ 562 0008 04D0     		beq	.L17
+ 563              	.LVL34:
+ 564              		.loc 4 383 69 view .LVU206
+ 565              	.LBE360:
+ 566              	.LBE359:
+2642:Src/main.c    **** 	{
+2643:Src/main.c    **** 		LL_SPI_Disable(SPI2);
+ 567              		.loc 1 2643 3 is_stmt 1 view .LVU207
+ 568              	.LBB361:
+ 569              	.LBI361:
+ 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 570              		.loc 4 370 22 view .LVU208
+ 571              	.LBB362:
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 572              		.loc 4 372 3 view .LVU209
+ 573 000a 0D4A     		ldr	r2, .L19
+ 574 000c 1368     		ldr	r3, [r2]
+ 575 000e 23F04003 		bic	r3, r3, #64
+ 576 0012 1360     		str	r3, [r2]
+ 577              	.LVL35:
+ 578              	.L17:
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 579              		.loc 4 372 3 is_stmt 0 view .LVU210
+ 580              	.LBE362:
+ 581              	.LBE361:
+2644:Src/main.c    **** 	}
+2645:Src/main.c    **** 	LL_SPI_SetClockPolarity(SPI2, polarity);
+ 582              		.loc 1 2645 2 is_stmt 1 view .LVU211
+ 583              	.LBB363:
+ 584              	.LBI363:
  384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -7172,6 +6358,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Get SPI operation mode (Master or Slave)
  404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR1          MSTR          LL_SPI_GetMode\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 107
+
+
  405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         CR1          SSI           LL_SPI_GetMode
  406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
  407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval Returned value can be one of the following values:
@@ -7198,9 +6387,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard);
  429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 121
-
-
  431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Get serial protocol used
  433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR2          FRF           LL_SPI_GetStandard
@@ -7232,6 +6418,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Get clock phase
+ARM GAS  /tmp/ccEQxcUB.s 			page 108
+
+
  462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR1          CPHA          LL_SPI_GetClockPhase
  463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
  464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval Returned value can be one of the following values:
@@ -7255,15 +6444,1303 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
  483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
+ 585              		.loc 4 484 22 view .LVU212
+ 586              	.LBB364:
  485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
  486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity);
+ 587              		.loc 4 486 3 view .LVU213
+ 588 0014 0A4B     		ldr	r3, .L19
+ 589 0016 1A68     		ldr	r2, [r3]
+ 590 0018 22F00202 		bic	r2, r2, #2
+ 591 001c 1043     		orrs	r0, r0, r2
+ 592              	.LVL36:
+ 593              		.loc 4 486 3 is_stmt 0 view .LVU214
+ 594 001e 1860     		str	r0, [r3]
+ 595              	.LVL37:
+ 596              		.loc 4 486 3 view .LVU215
+ 597              	.LBE364:
+ 598              	.LBE363:
+2646:Src/main.c    **** 	LL_SPI_SetClockPhase(SPI2, phase);
+ 599              		.loc 1 2646 2 is_stmt 1 view .LVU216
+ 600              	.LBB365:
+ 601              	.LBI365:
+ 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 602              		.loc 4 455 22 view .LVU217
+ 603              	.LBB366:
+ 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 604              		.loc 4 457 3 view .LVU218
+ 605 0020 1A68     		ldr	r2, [r3]
+ 606 0022 22F00102 		bic	r2, r2, #1
+ 607 0026 1143     		orrs	r1, r1, r2
+ 608              	.LVL38:
+ 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 609              		.loc 4 457 3 is_stmt 0 view .LVU219
+ 610 0028 1960     		str	r1, [r3]
+ 611              	.LVL39:
+ 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 109
+
+
+ 612              		.loc 4 457 3 view .LVU220
+ 613              	.LBE366:
+ 614              	.LBE365:
+2647:Src/main.c    **** 	if (!LL_SPI_IsEnabled(SPI2))
+ 615              		.loc 1 2647 2 is_stmt 1 view .LVU221
+ 616              	.LBB367:
+ 617              	.LBI367:
+ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 618              		.loc 4 381 26 view .LVU222
+ 619              	.LBB368:
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 620              		.loc 4 383 3 view .LVU223
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 621              		.loc 4 383 12 is_stmt 0 view .LVU224
+ 622 002a 1B68     		ldr	r3, [r3]
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 623              		.loc 4 383 69 view .LVU225
+ 624 002c 13F0400F 		tst	r3, #64
+ 625 0030 04D1     		bne	.L16
+ 626              	.LVL40:
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 627              		.loc 4 383 69 view .LVU226
+ 628              	.LBE368:
+ 629              	.LBE367:
+2648:Src/main.c    **** 	{
+2649:Src/main.c    **** 		LL_SPI_Enable(SPI2);
+ 630              		.loc 1 2649 3 is_stmt 1 view .LVU227
+ 631              	.LBB369:
+ 632              	.LBI369:
+ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 633              		.loc 4 358 22 view .LVU228
+ 634              	.LBB370:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 635              		.loc 4 360 3 view .LVU229
+ 636 0032 034A     		ldr	r2, .L19
+ 637 0034 1368     		ldr	r3, [r2]
+ 638 0036 43F04003 		orr	r3, r3, #64
+ 639 003a 1360     		str	r3, [r2]
+ 640              	.LVL41:
+ 641              	.L16:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 642              		.loc 4 360 3 is_stmt 0 view .LVU230
+ 643              	.LBE370:
+ 644              	.LBE369:
+2650:Src/main.c    **** 	}
+2651:Src/main.c    **** }
+ 645              		.loc 1 2651 1 view .LVU231
+ 646 003c 7047     		bx	lr
+ 647              	.L20:
+ 648 003e 00BF     		.align	2
+ 649              	.L19:
+ 650 0040 00380040 		.word	1073756160
+ 651              		.cfi_endproc
+ 652              	.LFE1213:
+ 654              		.section	.text.PID_Controller_Temp,"ax",%progbits
+ 655              		.align	1
+ 656              		.syntax unified
+ARM GAS  /tmp/ccEQxcUB.s 			page 110
+
+
+ 657              		.thumb
+ 658              		.thumb_func
+ 660              	PID_Controller_Temp:
+ 661              	.LVL42:
+ 662              	.LFB1229:
+2652:Src/main.c    **** 
+2653:Src/main.c    **** static void AD9833_WriteWord(uint16_t word)
+2654:Src/main.c    **** {
+2655:Src/main.c    **** 	uint32_t tmp32 = 0;
+2656:Src/main.c    **** 
+2657:Src/main.c    **** 	SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE);
+2658:Src/main.c    **** 
+2659:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+2660:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+2661:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+2662:Src/main.c    **** 
+2663:Src/main.c    **** 	HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET);
+2664:Src/main.c    **** 
+2665:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+2666:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, word);
+2667:Src/main.c    **** 	tmp32 = 0;
+2668:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+2669:Src/main.c    **** 	(void) SPI2->DR;
+2670:Src/main.c    **** 
+2671:Src/main.c    **** 	HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
+2672:Src/main.c    **** }
+2673:Src/main.c    **** 
+2674:Src/main.c    **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word)
+2675:Src/main.c    **** {
+2676:Src/main.c    **** 	uint16_t control = 0x2000u; // B28 = 1
+2677:Src/main.c    **** 	if (triangle)
+2678:Src/main.c    **** 	{
+2679:Src/main.c    **** 		control |= 0x0002u; // MODE = 1 (triangle)
+2680:Src/main.c    **** 	}
+2681:Src/main.c    **** 	control |= 0x0100u; // RESET = 1 while updating
+2682:Src/main.c    **** 
+2683:Src/main.c    **** 	freq_word &= 0x0FFFFFFFu;
+2684:Src/main.c    **** 	uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB
+2685:Src/main.c    **** 	uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
+2686:Src/main.c    **** 
+2687:Src/main.c    **** 	AD9833_WriteWord(control);
+2688:Src/main.c    **** 	AD9833_WriteWord(lsw);
+2689:Src/main.c    **** 	AD9833_WriteWord(msw);
+2690:Src/main.c    **** 	AD9833_WriteWord(0xC000u); // PHASE0 = 0
+2691:Src/main.c    **** 
+2692:Src/main.c    **** 	if (enable)
+2693:Src/main.c    **** 	{
+2694:Src/main.c    **** 		control &= (uint16_t)(~0x0100u);
+2695:Src/main.c    **** 	}
+2696:Src/main.c    **** 	AD9833_WriteWord(control);
+2697:Src/main.c    **** }
+2698:Src/main.c    **** 
+2699:Src/main.c    **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms)
+2700:Src/main.c    **** {
+2701:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
+2702:Src/main.c    **** 	{
+2703:Src/main.c    **** 		if (uc)
+ARM GAS  /tmp/ccEQxcUB.s 			page 111
+
+
+2704:Src/main.c    **** 		{
+2705:Src/main.c    **** 			HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET);
+2706:Src/main.c    **** 		}
+2707:Src/main.c    **** 		if (dc)
+2708:Src/main.c    **** 		{
+2709:Src/main.c    **** 			HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET);
+2710:Src/main.c    **** 		}
+2711:Src/main.c    **** 		HAL_Delay(pulse_ms);
+2712:Src/main.c    **** 		if (uc)
+2713:Src/main.c    **** 		{
+2714:Src/main.c    **** 			HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET);
+2715:Src/main.c    **** 		}
+2716:Src/main.c    **** 		if (dc)
+2717:Src/main.c    **** 		{
+2718:Src/main.c    **** 			HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET);
+2719:Src/main.c    **** 		}
+2720:Src/main.c    **** 		HAL_Delay(pulse_ms);
+2721:Src/main.c    **** 	}
+2722:Src/main.c    **** }
+2723:Src/main.c    **** 
+2724:Src/main.c    **** static void AD9102_WriteReg(uint16_t addr, uint16_t value)
+2725:Src/main.c    **** {
+2726:Src/main.c    **** 	uint32_t tmp32 = 0;
+2727:Src/main.c    **** 	uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
+2728:Src/main.c    **** 
+2729:Src/main.c    **** 	SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
+2730:Src/main.c    **** 
+2731:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+2732:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+2733:Src/main.c    **** 
+2734:Src/main.c    **** 	if (!LL_SPI_IsEnabled(SPI2))
+2735:Src/main.c    **** 	{
+2736:Src/main.c    **** 		LL_SPI_Enable(SPI2);
+2737:Src/main.c    **** 	}
+2738:Src/main.c    **** 
+2739:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
+2740:Src/main.c    **** 
+2741:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+2742:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+2743:Src/main.c    **** 	tmp32 = 0;
+2744:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+2745:Src/main.c    **** 	(void) SPI2->DR;
+2746:Src/main.c    **** 
+2747:Src/main.c    **** 	tmp32 = 0;
+2748:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+2749:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
+2750:Src/main.c    **** 	tmp32 = 0;
+2751:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+2752:Src/main.c    **** 	(void) SPI2->DR;
+2753:Src/main.c    **** 
+2754:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+2755:Src/main.c    **** }
+2756:Src/main.c    **** 
+2757:Src/main.c    **** static uint16_t AD9102_ReadReg(uint16_t addr)
+2758:Src/main.c    **** {
+2759:Src/main.c    **** 	uint32_t tmp32 = 0;
+2760:Src/main.c    **** 	uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
+ARM GAS  /tmp/ccEQxcUB.s 			page 112
+
+
+2761:Src/main.c    **** 	uint16_t value;
+2762:Src/main.c    **** 
+2763:Src/main.c    **** 	SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
+2764:Src/main.c    **** 
+2765:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+2766:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+2767:Src/main.c    **** 
+2768:Src/main.c    **** 	if (!LL_SPI_IsEnabled(SPI2))
+2769:Src/main.c    **** 	{
+2770:Src/main.c    **** 		LL_SPI_Enable(SPI2);
+2771:Src/main.c    **** 	}
+2772:Src/main.c    **** 
+2773:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
+2774:Src/main.c    **** 
+2775:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+2776:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+2777:Src/main.c    **** 	tmp32 = 0;
+2778:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+2779:Src/main.c    **** 	(void) SPI2->DR;
+2780:Src/main.c    **** 
+2781:Src/main.c    **** 	tmp32 = 0;
+2782:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+2783:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
+2784:Src/main.c    **** 	tmp32 = 0;
+2785:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+2786:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
+2787:Src/main.c    **** 
+2788:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+2789:Src/main.c    **** 	return value;
+2790:Src/main.c    **** }
+2791:Src/main.c    **** 
+2792:Src/main.c    **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count)
+2793:Src/main.c    **** {
+2794:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
+2795:Src/main.c    **** 	{
+2796:Src/main.c    **** 		AD9102_WriteReg(ad9102_reg_addr[i], values[i]);
+2797:Src/main.c    **** 	}
+2798:Src/main.c    **** }
+2799:Src/main.c    **** 
+2800:Src/main.c    **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, 
+2801:Src/main.c    **** {
+2802:Src/main.c    **** 	if (enable)
+2803:Src/main.c    **** 	{
+2804:Src/main.c    **** 		uint16_t saw_cfg;
+2805:Src/main.c    **** 		uint16_t pat_timebase;
+2806:Src/main.c    **** 
+2807:Src/main.c    **** 		if (saw_step == 0u)
+2808:Src/main.c    **** 		{
+2809:Src/main.c    **** 			saw_step = AD9102_SAW_STEP_DEFAULT;
+2810:Src/main.c    **** 		}
+2811:Src/main.c    **** 		if (saw_step > 63u)
+2812:Src/main.c    **** 		{
+2813:Src/main.c    **** 			saw_step = 63u;
+2814:Src/main.c    **** 		}
+2815:Src/main.c    **** 		saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
+2816:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
+2817:Src/main.c    **** 		pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
+ARM GAS  /tmp/ccEQxcUB.s 			page 113
+
+
+2818:Src/main.c    **** 		                          ((pat_base & 0x0Fu) << 4) |
+2819:Src/main.c    **** 		                          (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
+2820:Src/main.c    **** 
+2821:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG);
+2822:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
+2823:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
+2824:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
+2825:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
+2826:Src/main.c    **** 
+2827:Src/main.c    **** 		// Update RUN then RAMUPDATE at the end of the write sequence.
+2828:Src/main.c    **** 		// AD9102 output is started by a falling edge of TRIGGER pin when RUN=1.
+2829:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+2830:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
+2831:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+2832:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
+2833:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+2834:Src/main.c    **** 	}
+2835:Src/main.c    **** 	else
+2836:Src/main.c    **** 	{
+2837:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
+2838:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+2839:Src/main.c    **** 	}
+2840:Src/main.c    **** 
+2841:Src/main.c    **** 	return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
+2842:Src/main.c    **** }
+2843:Src/main.c    **** 
+2844:Src/main.c    **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude)
+2845:Src/main.c    **** {
+2846:Src/main.c    **** 	if (samples < 2u)
+2847:Src/main.c    **** 	{
+2848:Src/main.c    **** 		samples = 2u;
+2849:Src/main.c    **** 	}
+2850:Src/main.c    **** 	if (samples > AD9102_SRAM_MAX_SAMPLES)
+2851:Src/main.c    **** 	{
+2852:Src/main.c    **** 		samples = AD9102_SRAM_MAX_SAMPLES;
+2853:Src/main.c    **** 	}
+2854:Src/main.c    **** 	if (amplitude > AD9102_SRAM_AMP_DEFAULT)
+2855:Src/main.c    **** 	{
+2856:Src/main.c    **** 		amplitude = AD9102_SRAM_AMP_DEFAULT;
+2857:Src/main.c    **** 	}
+2858:Src/main.c    **** 
+2859:Src/main.c    **** 	// Enable SRAM access.
+2860:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u);
+2861:Src/main.c    **** 
+2862:Src/main.c    **** 	for (uint16_t i = 0; i < samples; i++)
+2863:Src/main.c    **** 	{
+2864:Src/main.c    **** 		int32_t value;
+2865:Src/main.c    **** 		int32_t min_val = -(int32_t)amplitude;
+2866:Src/main.c    **** 		int32_t max_val = (int32_t)amplitude;
+2867:Src/main.c    **** 		int32_t span = max_val - min_val;
+2868:Src/main.c    **** 		if (triangle)
+2869:Src/main.c    **** 		{
+2870:Src/main.c    **** 			uint16_t half = samples / 2u;
+2871:Src/main.c    **** 			if (half == 0u)
+2872:Src/main.c    **** 			{
+2873:Src/main.c    **** 				half = 1u;
+2874:Src/main.c    **** 			}
+ARM GAS  /tmp/ccEQxcUB.s 			page 114
+
+
+2875:Src/main.c    **** 			if (i < half)
+2876:Src/main.c    **** 			{
+2877:Src/main.c    **** 				uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u;
+2878:Src/main.c    **** 				if (span == 0)
+2879:Src/main.c    **** 				{
+2880:Src/main.c    **** 					value = 0;
+2881:Src/main.c    **** 				}
+2882:Src/main.c    **** 				else
+2883:Src/main.c    **** 				{
+2884:Src/main.c    **** 					value = min_val + (span * (int32_t)i) / (int32_t)denom;
+2885:Src/main.c    **** 				}
+2886:Src/main.c    **** 			}
+2887:Src/main.c    **** 			else
+2888:Src/main.c    **** 			{
+2889:Src/main.c    **** 				uint16_t tail = (uint16_t)(samples - half);
+2890:Src/main.c    **** 				uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
+2891:Src/main.c    **** 				if (span == 0)
+2892:Src/main.c    **** 				{
+2893:Src/main.c    **** 					value = 0;
+2894:Src/main.c    **** 				}
+2895:Src/main.c    **** 				else
+2896:Src/main.c    **** 				{
+2897:Src/main.c    **** 					value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom;
+2898:Src/main.c    **** 				}
+2899:Src/main.c    **** 			}
+2900:Src/main.c    **** 		}
+2901:Src/main.c    **** 		else
+2902:Src/main.c    **** 		{
+2903:Src/main.c    **** 			uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u;
+2904:Src/main.c    **** 			if (span == 0)
+2905:Src/main.c    **** 			{
+2906:Src/main.c    **** 				value = 0;
+2907:Src/main.c    **** 			}
+2908:Src/main.c    **** 			else
+2909:Src/main.c    **** 			{
+2910:Src/main.c    **** 				value = min_val + (span * (int32_t)i) / (int32_t)denom;
+2911:Src/main.c    **** 			}
+2912:Src/main.c    **** 		}
+2913:Src/main.c    **** 
+2914:Src/main.c    **** 		if (value < -8192)
+2915:Src/main.c    **** 		{
+2916:Src/main.c    **** 			value = -8192;
+2917:Src/main.c    **** 		}
+2918:Src/main.c    **** 		else if (value > 8191)
+2919:Src/main.c    **** 		{
+2920:Src/main.c    **** 			value = 8191;
+2921:Src/main.c    **** 		}
+2922:Src/main.c    **** 
+2923:Src/main.c    **** 		uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu;
+2924:Src/main.c    **** 		uint16_t word = (uint16_t)(sample_u14 << 2);
+2925:Src/main.c    **** 		AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word);
+2926:Src/main.c    **** 	}
+2927:Src/main.c    **** 
+2928:Src/main.c    **** 	// Disable SRAM access.
+2929:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
+2930:Src/main.c    **** }
+2931:Src/main.c    **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 115
+
+
+2932:Src/main.c    **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, 
+2933:Src/main.c    **** {
+2934:Src/main.c    **** 	if (samples == 0u)
+2935:Src/main.c    **** 	{
+2936:Src/main.c    **** 		samples = AD9102_SRAM_SAMPLES_DEFAULT;
+2937:Src/main.c    **** 	}
+2938:Src/main.c    **** 	if (samples < 2u)
+2939:Src/main.c    **** 	{
+2940:Src/main.c    **** 		samples = 2u;
+2941:Src/main.c    **** 	}
+2942:Src/main.c    **** 	if (samples > AD9102_SRAM_MAX_SAMPLES)
+2943:Src/main.c    **** 	{
+2944:Src/main.c    **** 		samples = AD9102_SRAM_MAX_SAMPLES;
+2945:Src/main.c    **** 	}
+2946:Src/main.c    **** 	if (hold == 0u)
+2947:Src/main.c    **** 	{
+2948:Src/main.c    **** 		hold = AD9102_SRAM_HOLD_DEFAULT;
+2949:Src/main.c    **** 	}
+2950:Src/main.c    **** 	if (hold > 0x0Fu)
+2951:Src/main.c    **** 	{
+2952:Src/main.c    **** 		hold = 0x0Fu;
+2953:Src/main.c    **** 	}
+2954:Src/main.c    **** 
+2955:Src/main.c    **** 	if (amplitude > AD9102_SRAM_AMP_DEFAULT)
+2956:Src/main.c    **** 	{
+2957:Src/main.c    **** 		amplitude = AD9102_SRAM_AMP_DEFAULT;
+2958:Src/main.c    **** 	}
+2959:Src/main.c    **** 
+2960:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
+2961:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+2962:Src/main.c    **** 	                                   (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
+2963:Src/main.c    **** 	uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
+2964:Src/main.c    **** 	if (pat_period == 0u)
+2965:Src/main.c    **** 	{
+2966:Src/main.c    **** 		pat_period = samples;
+2967:Src/main.c    **** 	}
+2968:Src/main.c    **** 	if (pat_period > 0xFFFFu)
+2969:Src/main.c    **** 	{
+2970:Src/main.c    **** 		pat_period = 0xFFFFu;
+2971:Src/main.c    **** 	}
+2972:Src/main.c    **** 
+2973:Src/main.c    **** 	AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT);
+2974:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
+2975:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
+2976:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
+2977:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
+2978:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
+2979:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
+2980:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
+2981:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
+2982:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
+2983:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
+2984:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+2985:Src/main.c    **** 
+2986:Src/main.c    **** 	AD9102_LoadSramRamp(samples, triangle, amplitude);
+2987:Src/main.c    **** 
+2988:Src/main.c    **** 	if (enable)
+ARM GAS  /tmp/ccEQxcUB.s 			page 116
+
+
+2989:Src/main.c    **** 	{
+2990:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+2991:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
+2992:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+2993:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
+2994:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+2995:Src/main.c    **** 	}
+2996:Src/main.c    **** 	else
+2997:Src/main.c    **** 	{
+2998:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
+2999:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+3000:Src/main.c    **** 	}
+3001:Src/main.c    **** 
+3002:Src/main.c    **** 	return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
+3003:Src/main.c    **** }
+3004:Src/main.c    **** 
+3005:Src/main.c    **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t
+3006:Src/main.c    **** {
+3007:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
+3008:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+3009:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
+3010:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
+3011:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
+3012:Src/main.c    **** 	                                   ((pat_base & 0x0Fu) << 4) |
+3013:Src/main.c    **** 	                                   (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
+3014:Src/main.c    **** 
+3015:Src/main.c    **** 	if (saw_step == 0u)
+3016:Src/main.c    **** 	{
+3017:Src/main.c    **** 		saw_step = AD9102_SAW_STEP_DEFAULT;
+3018:Src/main.c    **** 	}
+3019:Src/main.c    **** 	if (saw_step > 63u)
+3020:Src/main.c    **** 	{
+3021:Src/main.c    **** 		saw_step = 63u;
+3022:Src/main.c    **** 	}
+3023:Src/main.c    **** 	if (pat_period == 0u)
+3024:Src/main.c    **** 	{
+3025:Src/main.c    **** 		pat_period = AD9102_PAT_PERIOD_DEFAULT;
+3026:Src/main.c    **** 	}
+3027:Src/main.c    **** 	uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
+3028:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
+3029:Src/main.c    **** 
+3030:Src/main.c    **** 	uint8_t ok = 1u;
+3031:Src/main.c    **** 
+3032:Src/main.c    **** 	// Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset.
+3033:Src/main.c    **** 	if (spiconfig != 0x0000u)
+3034:Src/main.c    **** 	{
+3035:Src/main.c    **** 		ok = 0u;
+3036:Src/main.c    **** 	}
+3037:Src/main.c    **** 
+3038:Src/main.c    **** 	// Power blocks should not be powered down.
+3039:Src/main.c    **** 	if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
+3040:Src/main.c    **** 	{
+3041:Src/main.c    **** 		ok = 0u;
+3042:Src/main.c    **** 	}
+3043:Src/main.c    **** 
+3044:Src/main.c    **** 	// Clock receiver must be enabled (cannot directly detect external clock presence).
+3045:Src/main.c    **** 	if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
+ARM GAS  /tmp/ccEQxcUB.s 			page 117
+
+
+3046:Src/main.c    **** 	{
+3047:Src/main.c    **** 		ok = 0u;
+3048:Src/main.c    **** 	}
+3049:Src/main.c    **** 
+3050:Src/main.c    **** 	// Any configuration error flags indicate a bad setup.
+3051:Src/main.c    **** 	if (cfg_err & 0x003Fu)
+3052:Src/main.c    **** 	{
+3053:Src/main.c    **** 		ok = 0u;
+3054:Src/main.c    **** 	}
+3055:Src/main.c    **** 
+3056:Src/main.c    **** 	if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
+3057:Src/main.c    **** 	{
+3058:Src/main.c    **** 		ok = 0u;
+3059:Src/main.c    **** 	}
+3060:Src/main.c    **** 
+3061:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG)
+3062:Src/main.c    **** 	{
+3063:Src/main.c    **** 		ok = 0u;
+3064:Src/main.c    **** 	}
+3065:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
+3066:Src/main.c    **** 	{
+3067:Src/main.c    **** 		ok = 0u;
+3068:Src/main.c    **** 	}
+3069:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period)
+3070:Src/main.c    **** 	{
+3071:Src/main.c    **** 		ok = 0u;
+3072:Src/main.c    **** 	}
+3073:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
+3074:Src/main.c    **** 	{
+3075:Src/main.c    **** 		ok = 0u;
+3076:Src/main.c    **** 	}
+3077:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw)
+3078:Src/main.c    **** 	{
+3079:Src/main.c    **** 		ok = 0u;
+3080:Src/main.c    **** 	}
+3081:Src/main.c    **** 
+3082:Src/main.c    **** 	return (ok ? 0u : 1u);
+3083:Src/main.c    **** }
+3084:Src/main.c    **** 
+3085:Src/main.c    **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin
+3086:Src/main.c    **** {
+3087:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
+3088:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+3089:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
+3090:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
+3091:Src/main.c    **** 
+3092:Src/main.c    **** 	if (samples == 0u)
+3093:Src/main.c    **** 	{
+3094:Src/main.c    **** 		samples = AD9102_SRAM_SAMPLES_DEFAULT;
+3095:Src/main.c    **** 	}
+3096:Src/main.c    **** 	if (samples < 2u)
+3097:Src/main.c    **** 	{
+3098:Src/main.c    **** 		samples = 2u;
+3099:Src/main.c    **** 	}
+3100:Src/main.c    **** 	if (samples > AD9102_SRAM_MAX_SAMPLES)
+3101:Src/main.c    **** 	{
+3102:Src/main.c    **** 		samples = AD9102_SRAM_MAX_SAMPLES;
+ARM GAS  /tmp/ccEQxcUB.s 			page 118
+
+
+3103:Src/main.c    **** 	}
+3104:Src/main.c    **** 	if (hold == 0u)
+3105:Src/main.c    **** 	{
+3106:Src/main.c    **** 		hold = AD9102_SRAM_HOLD_DEFAULT;
+3107:Src/main.c    **** 	}
+3108:Src/main.c    **** 	if (hold > 0x0Fu)
+3109:Src/main.c    **** 	{
+3110:Src/main.c    **** 		hold = 0x0Fu;
+3111:Src/main.c    **** 	}
+3112:Src/main.c    **** 
+3113:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
+3114:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+3115:Src/main.c    **** 	                                   (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
+3116:Src/main.c    **** 	uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
+3117:Src/main.c    **** 	if (pat_period == 0u)
+3118:Src/main.c    **** 	{
+3119:Src/main.c    **** 		pat_period = samples;
+3120:Src/main.c    **** 	}
+3121:Src/main.c    **** 	if (pat_period > 0xFFFFu)
+3122:Src/main.c    **** 	{
+3123:Src/main.c    **** 		pat_period = 0xFFFFu;
+3124:Src/main.c    **** 	}
+3125:Src/main.c    **** 
+3126:Src/main.c    **** 	uint16_t stop_addr = (uint16_t)((samples - 1u) << 4);
+3127:Src/main.c    **** 
+3128:Src/main.c    **** 	uint8_t ok = 1u;
+3129:Src/main.c    **** 
+3130:Src/main.c    **** 	if (spiconfig != 0x0000u)
+3131:Src/main.c    **** 	{
+3132:Src/main.c    **** 		ok = 0u;
+3133:Src/main.c    **** 	}
+3134:Src/main.c    **** 	if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
+3135:Src/main.c    **** 	{
+3136:Src/main.c    **** 		ok = 0u;
+3137:Src/main.c    **** 	}
+3138:Src/main.c    **** 	if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
+3139:Src/main.c    **** 	{
+3140:Src/main.c    **** 		ok = 0u;
+3141:Src/main.c    **** 	}
+3142:Src/main.c    **** 	if (cfg_err & 0x003Fu)
+3143:Src/main.c    **** 	{
+3144:Src/main.c    **** 		ok = 0u;
+3145:Src/main.c    **** 	}
+3146:Src/main.c    **** 	if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
+3147:Src/main.c    **** 	{
+3148:Src/main.c    **** 		ok = 0u;
+3149:Src/main.c    **** 	}
+3150:Src/main.c    **** 
+3151:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG)
+3152:Src/main.c    **** 	{
+3153:Src/main.c    **** 		ok = 0u;
+3154:Src/main.c    **** 	}
+3155:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
+3156:Src/main.c    **** 	{
+3157:Src/main.c    **** 		ok = 0u;
+3158:Src/main.c    **** 	}
+3159:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period)
+ARM GAS  /tmp/ccEQxcUB.s 			page 119
+
+
+3160:Src/main.c    **** 	{
+3161:Src/main.c    **** 		ok = 0u;
+3162:Src/main.c    **** 	}
+3163:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
+3164:Src/main.c    **** 	{
+3165:Src/main.c    **** 		ok = 0u;
+3166:Src/main.c    **** 	}
+3167:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u)
+3168:Src/main.c    **** 	{
+3169:Src/main.c    **** 		ok = 0u;
+3170:Src/main.c    **** 	}
+3171:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr)
+3172:Src/main.c    **** 	{
+3173:Src/main.c    **** 		ok = 0u;
+3174:Src/main.c    **** 	}
+3175:Src/main.c    **** 	if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT)
+3176:Src/main.c    **** 	{
+3177:Src/main.c    **** 		ok = 0u;
+3178:Src/main.c    **** 	}
+3179:Src/main.c    **** 
+3180:Src/main.c    **** 	return (ok ? 0u : 1u);
+3181:Src/main.c    **** }
+3182:Src/main.c    **** 
+3183:Src/main.c    **** void Set_LTEC(uint8_t num, uint16_t DATA)
+3184:Src/main.c    **** {
+3185:Src/main.c    **** 	uint32_t tmp32;
+3186:Src/main.c    **** 
+3187:Src/main.c    **** 	if (num == 1 || num == 3)
+3188:Src/main.c    **** 	{
+3189:Src/main.c    **** 		SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE);
+3190:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+3191:Src/main.c    **** 	}
+3192:Src/main.c    **** 
+3193:Src/main.c    **** 	switch (num)
+3194:Src/main.c    **** 	{
+3195:Src/main.c    **** 		case 1:
+3196:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L
+3197:Src/main.c    **** 			//tmp32=0;
+3198:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
+3199:Src/main.c    **** 			tmp32 = 0;
+3200:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+3201:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+3202:Src/main.c    **** 			tmp32 = 0;
+3203:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+3204:Src/main.c    **** 			(void) SPI2->DR;
+3205:Src/main.c    **** 		break;
+3206:Src/main.c    **** 		case 2:
+3207:Src/main.c    **** 			//HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes
+3208:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L
+3209:Src/main.c    **** 			//tmp32=0;
+3210:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
+3211:Src/main.c    **** 			tmp32 = 0;
+3212:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+3213:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+3214:Src/main.c    **** 			tmp32 = 0;
+3215:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+3216:Src/main.c    **** 			(void) SPI6->DR;
+ARM GAS  /tmp/ccEQxcUB.s 			page 120
+
+
+3217:Src/main.c    **** 		break;
+3218:Src/main.c    **** 		case 3:
+3219:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with
+3220:Src/main.c    **** 			//tmp32=0;
+3221:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
+3222:Src/main.c    **** 			tmp32 = 0;
+3223:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+3224:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+3225:Src/main.c    **** 			tmp32 = 0;
+3226:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+3227:Src/main.c    **** 			(void) SPI2->DR;
+3228:Src/main.c    **** 		break;
+3229:Src/main.c    **** 		case 4:
+3230:Src/main.c    **** 			HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with
+3231:Src/main.c    **** 			//tmp32=0;
+3232:Src/main.c    **** 			//while(tmp32<500){tmp32++;}
+3233:Src/main.c    **** 			tmp32 = 0;
+3234:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+3235:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+3236:Src/main.c    **** 			tmp32 = 0;
+3237:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+3238:Src/main.c    **** 			(void) SPI6->DR;
+3239:Src/main.c    **** 		break;
+3240:Src/main.c    **** 	}
+3241:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
+3242:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
+3243:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
+3244:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
+3245:Src/main.c    **** }
+3246:Src/main.c    **** static uint16_t MPhD_T(uint8_t num)
+3247:Src/main.c    **** {
+3248:Src/main.c    **** 	uint16_t P;
+3249:Src/main.c    **** 	uint32_t tmp32;
+3250:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
+3251:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
+3252:Src/main.c    **** 	tmp32=0;
+3253:Src/main.c    **** 	while(tmp32<500){tmp32++;}
+3254:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+3255:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+3256:Src/main.c    **** 	tmp32=0;
+3257:Src/main.c    **** 	while(tmp32<500){tmp32++;}
+3258:Src/main.c    **** 	if (num==1)//MPD1
+3259:Src/main.c    **** 	{
+3260:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
+3261:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
+3262:Src/main.c    **** 		tmp32=0;
+3263:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3264:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+3265:Src/main.c    **** 		LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC
+3266:Src/main.c    **** 		tmp32 = 0;
+3267:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+3268:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
+3269:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3270:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+3271:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
+3272:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
+3273:Src/main.c    **** 	}
+ARM GAS  /tmp/ccEQxcUB.s 			page 121
+
+
+3274:Src/main.c    **** 	else if (num==2)//MPD2
+3275:Src/main.c    **** 	{
+3276:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
+3277:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
+3278:Src/main.c    **** 		tmp32=0;
+3279:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3280:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+3281:Src/main.c    **** 		LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC
+3282:Src/main.c    **** 		tmp32 = 0;
+3283:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+3284:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
+3285:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3286:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+3287:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
+3288:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
+3289:Src/main.c    **** 	}
+3290:Src/main.c    **** 	else if (num==3)//ThrLD1
+3291:Src/main.c    **** 	{
+3292:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
+3293:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
+3294:Src/main.c    **** 		tmp32=0;
+3295:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3296:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+3297:Src/main.c    **** 		LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC
+3298:Src/main.c    **** 		tmp32 = 0;
+3299:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+3300:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
+3301:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3302:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+3303:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
+3304:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
+3305:Src/main.c    **** 	}
+3306:Src/main.c    **** 	else if (num==4)//ThrLD2
+3307:Src/main.c    **** 	{
+3308:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
+3309:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
+3310:Src/main.c    **** 		tmp32=0;
+3311:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3312:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+3313:Src/main.c    **** 		LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC
+3314:Src/main.c    **** 		tmp32 = 0;
+3315:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+3316:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
+3317:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+3318:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+3319:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
+3320:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
+3321:Src/main.c    **** 	}
+3322:Src/main.c    **** 	/*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm;
+3323:Src/main.c    **** 	
+3324:Src/main.c    **** 	Inorm = (float) (65535) / (float) (100);
+3325:Src/main.c    **** 	Tnorm1 = (float) (65535) / (float) (50);
+3326:Src/main.c    **** 	Tnorm2 = 4;
+3327:Src/main.c    **** 	Pnorm = (float)(65535) / (float)(20);
+3328:Src/main.c    **** 	I0m = 8.1568;//@4 C - lowest temperature of system
+3329:Src/main.c    **** 	T0m = 48.6282;
+3330:Src/main.c    **** 	T_C = (float) (T_LD) / Tnorm1 + Tnorm2;
+ARM GAS  /tmp/ccEQxcUB.s 			page 122
+
+
+3331:Src/main.c    **** 	
+3332:Src/main.c    **** 	Ith = I0m * expf(T_C/T0m);
+3333:Src/main.c    **** 	I_LD = (float) (C_LD) / Inorm;
+3334:Src/main.c    **** 	
+3335:Src/main.c    **** 	if (I_LD > Ith)
+3336:Src/main.c    **** 	{
+3337:Src/main.c    **** 		A = (float) (2.24276128270098e-07) * T_C * T_C * T_C  - (float) (4.73392579025590e-05) * T_C * T_
+3338:Src/main.c    **** 		P = A * (I_LD - Ith) * Pnorm;
+3339:Src/main.c    **** 	}
+3340:Src/main.c    **** 	else
+3341:Src/main.c    **** 	{
+3342:Src/main.c    **** 		P = 0;
+3343:Src/main.c    **** 	}	*/
+3344:Src/main.c    **** 	return P;
+3345:Src/main.c    **** }
+3346:Src/main.c    **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time
+3347:Src/main.c    **** {
+3348:Src/main.c    **** 	uint16_t Result;
+3349:Src/main.c    **** //	uint8_t randf;
+3350:Src/main.c    **** 	
+3351:Src/main.c    **** 	randf = 0;
+3352:Src/main.c    **** 	for (uint8_t i = 0; i < 32; i++)
+3353:Src/main.c    **** 	{
+3354:Src/main.c    **** 		randf = ((Timer>>i)&0x0001)^randf;
+3355:Src/main.c    **** 	}
+3356:Src/main.c    **** 	
+3357:Src/main.c    **** 	Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl
+3358:Src/main.c    **** 	
+3359:Src/main.c    **** 	return (uint16_t)(Result);
+3360:Src/main.c    **** }*/
+3361:Src/main.c    **** static uint16_t Get_ADC(uint8_t num)
+3362:Src/main.c    **** {
+3363:Src/main.c    **** 	uint16_t OUT;
+3364:Src/main.c    **** 	switch (num)
+3365:Src/main.c    **** 		{
+3366:Src/main.c    **** 			case 0:
+3367:Src/main.c    **** 				HAL_ADC_Start(&hadc1); // Power on
+3368:Src/main.c    **** 			break;
+3369:Src/main.c    **** 			case 1:
+3370:Src/main.c    **** 				HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion
+3371:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
+3372:Src/main.c    **** 			break;
+3373:Src/main.c    **** 			case 2:
+3374:Src/main.c    **** 				HAL_ADC_Stop(&hadc1); // Power off
+3375:Src/main.c    **** 			break;
+3376:Src/main.c    **** 			case 3:
+3377:Src/main.c    **** 				HAL_ADC_Start(&hadc3); // Power on
+3378:Src/main.c    **** 			break;
+3379:Src/main.c    **** 			case 4:
+3380:Src/main.c    **** 				HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion
+3381:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
+3382:Src/main.c    **** 			break;
+3383:Src/main.c    **** 			case 5:
+3384:Src/main.c    ****         HAL_ADC_Stop(&hadc3); // Power off
+3385:Src/main.c    **** 			break;
+3386:Src/main.c    **** 		}
+3387:Src/main.c    **** 	return OUT;
+ARM GAS  /tmp/ccEQxcUB.s 			page 123
+
+
+3388:Src/main.c    **** }
+3389:Src/main.c    **** 
+3390:Src/main.c    **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results
+3391:Src/main.c    **** {
+3392:Src/main.c    **** 	// Main idea:
+3393:Src/main.c    **** 	// I is responsible to maintaining constant temperature difference between laser and room temperat
+3394:Src/main.c    **** 	// As room temperature can be approximated as constant at current-varying time -- I should be kept
+3395:Src/main.c    **** 	// As current through laser diode heats it -- we can estimate excessive power on laser diode and t
+3396:Src/main.c    **** 	// So, equation should be look like this:
+3397:Src/main.c    **** 	//   x_output = x_output_original + I(laser)*(a + (t - b)c)
+3398:Src/main.c    **** 	//     t -- cycle phase
+3399:Src/main.c    **** 	//     a,b,c -- constants
+3400:Src/main.c    **** 	//
+3401:Src/main.c    **** 	// How can we control laser diode temperature?
+3402:Src/main.c    **** 	//   -- We can set laser to fixed current at the time we need to measure.
+3403:Src/main.c    **** 	//   Then we should measure wavelength.
+3404:Src/main.c    **** 	// Calibration sequence:
+3405:Src/main.c    **** 	//   1) n
+3406:Src/main.c    **** 
+3407:Src/main.c    **** 
+3408:Src/main.c    **** 
+3409:Src/main.c    **** 	int e_pid;
+3410:Src/main.c    **** 	float P_coef_current;//, I_coef_current;
+3411:Src/main.c    **** 	float e_integral;
+3412:Src/main.c    **** 	int x_output;
+3413:Src/main.c    **** 
+3414:Src/main.c    **** 	e_pid =  (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
+3415:Src/main.c    **** 
+3416:Src/main.c    **** 	e_integral = LDx_results->e_integral;
+3417:Src/main.c    **** 
+3418:Src/main.c    **** 	if((e_pid < 3000) && (e_pid > - 3000)){
+3419:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
+3420:Src/main.c    **** 	}
+3421:Src/main.c    **** 	P_coef_current = LDx_curr_setup->P_coef_temp;
+3422:Src/main.c    **** 
+3423:Src/main.c    **** 	if (e_integral > 32000){
+3424:Src/main.c    **** 			e_integral = 32000;
+3425:Src/main.c    **** 	}
+3426:Src/main.c    **** 	else if (e_integral < - 32000){
+3427:Src/main.c    **** 			e_integral = -32000;
+3428:Src/main.c    **** 	}
+3429:Src/main.c    **** 	LDx_results->e_integral = e_integral;
+3430:Src/main.c    **** 
+3431:Src/main.c    **** 	x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in
+3432:Src/main.c    **** 
+3433:Src/main.c    **** 	if(x_output < 1000){
+3434:Src/main.c    **** 		x_output = 8800;
+3435:Src/main.c    **** 	}
+3436:Src/main.c    **** 	else if(x_output > 56800){
+3437:Src/main.c    **** 		x_output = 56800;
+3438:Src/main.c    **** 	}
+3439:Src/main.c    **** 
+3440:Src/main.c    **** 	if (num==2)
+3441:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
+3442:Src/main.c    **** 
+3443:Src/main.c    **** 	return (uint16_t)x_output;
+3444:Src/main.c    **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 124
+
+
+3445:Src/main.c    **** 
+3446:Src/main.c    **** 
+3447:Src/main.c    **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin
+3448:Src/main.c    **** {			
+ 663              		.loc 1 3448 1 is_stmt 1 view -0
+ 664              		.cfi_startproc
+ 665              		@ args = 0, pretend = 0, frame = 0
+ 666              		@ frame_needed = 0, uses_anonymous_args = 0
+ 667              		@ link register save eliminated.
+ 668              		.loc 1 3448 1 is_stmt 0 view .LVU233
+ 669 0000 30B4     		push	{r4, r5}
+ 670              	.LCFI6:
+ 671              		.cfi_def_cfa_offset 8
+ 672              		.cfi_offset 4, -8
+ 673              		.cfi_offset 5, -4
+3449:Src/main.c    **** 	int e_pid;
+ 674              		.loc 1 3449 2 is_stmt 1 view .LVU234
+3450:Src/main.c    **** 	float P_coef_current;//, I_coef_current;
+ 675              		.loc 1 3450 2 view .LVU235
+3451:Src/main.c    **** 	float e_integral;
+ 676              		.loc 1 3451 2 view .LVU236
+3452:Src/main.c    **** 	int x_output;
+ 677              		.loc 1 3452 2 view .LVU237
+3453:Src/main.c    **** 	
+3454:Src/main.c    **** 	e_pid =  (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
+ 678              		.loc 1 3454 2 view .LVU238
+ 679              		.loc 1 3454 28 is_stmt 0 view .LVU239
+ 680 0002 0B88     		ldrh	r3, [r1]
+ 681              		.loc 1 3454 65 view .LVU240
+ 682 0004 0488     		ldrh	r4, [r0]
+ 683              		.loc 1 3454 8 view .LVU241
+ 684 0006 1B1B     		subs	r3, r3, r4
+ 685              	.LVL43:
+3455:Src/main.c    **** 
+3456:Src/main.c    **** 	e_integral = LDx_results->e_integral;
+ 686              		.loc 1 3456 2 is_stmt 1 view .LVU242
+ 687              		.loc 1 3456 13 is_stmt 0 view .LVU243
+ 688 0008 D1ED017A 		vldr.32	s15, [r1, #4]
+ 689              	.LVL44:
+3457:Src/main.c    **** 	
+3458:Src/main.c    **** 	if((e_pid < 3000) && (e_pid > - 3000)){
+ 690              		.loc 1 3458 2 is_stmt 1 view .LVU244
+ 691              		.loc 1 3458 20 is_stmt 0 view .LVU245
+ 692 000c 03F6B73C 		addw	ip, r3, #2999
+ 693              		.loc 1 3458 4 view .LVU246
+ 694 0010 41F26E74 		movw	r4, #5998
+ 695 0014 A445     		cmp	ip, r4
+ 696 0016 18D8     		bhi	.L22
+3459:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
+ 697              		.loc 1 3459 3 is_stmt 1 view .LVU247
+ 698              		.loc 1 3459 31 is_stmt 0 view .LVU248
+ 699 0018 90ED027A 		vldr.32	s14, [r0, #8]
+ 700              		.loc 1 3459 47 view .LVU249
+ 701 001c 06EE903A 		vmov	s13, r3	@ int
+ 702 0020 F8EEE66A 		vcvt.f32.s32	s13, s13
+ 703              		.loc 1 3459 45 view .LVU250
+ 704 0024 27EE267A 		vmul.f32	s14, s14, s13
+ARM GAS  /tmp/ccEQxcUB.s 			page 125
+
+
+ 705              		.loc 1 3459 76 view .LVU251
+ 706 0028 284C     		ldr	r4, .L32
+ 707 002a 2468     		ldr	r4, [r4]
+ 708 002c 284D     		ldr	r5, .L32+4
+ 709 002e 2D68     		ldr	r5, [r5]
+ 710 0030 641B     		subs	r4, r4, r5
+ 711              		.loc 1 3459 64 view .LVU252
+ 712 0032 06EE904A 		vmov	s13, r4	@ int
+ 713 0036 F8EE666A 		vcvt.f32.u32	s13, s13
+ 714              		.loc 1 3459 62 view .LVU253
+ 715 003a 27EE267A 		vmul.f32	s14, s14, s13
+ 716              		.loc 1 3459 87 view .LVU254
+ 717 003e 9FED256A 		vldr.32	s12, .L32+8
+ 718 0042 C7EE066A 		vdiv.f32	s13, s14, s12
+ 719              		.loc 1 3459 14 view .LVU255
+ 720 0046 77EEA67A 		vadd.f32	s15, s15, s13
+ 721              	.LVL45:
+ 722              	.L22:
+3460:Src/main.c    **** 	}
+3461:Src/main.c    **** 	P_coef_current = LDx_curr_setup->P_coef_temp;
+ 723              		.loc 1 3461 2 is_stmt 1 view .LVU256
+ 724              		.loc 1 3461 17 is_stmt 0 view .LVU257
+ 725 004a D0ED016A 		vldr.32	s13, [r0, #4]
+ 726              	.LVL46:
+3462:Src/main.c    **** 	
+3463:Src/main.c    **** 	if (e_integral > 32000){
+ 727              		.loc 1 3463 2 is_stmt 1 view .LVU258
+ 728              		.loc 1 3463 5 is_stmt 0 view .LVU259
+ 729 004e 9FED227A 		vldr.32	s14, .L32+12
+ 730 0052 F4EEC77A 		vcmpe.f32	s15, s14
+ 731 0056 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ 732 005a 09DC     		bgt	.L26
+3464:Src/main.c    **** 			e_integral = 32000;
+3465:Src/main.c    **** 	}
+3466:Src/main.c    **** 	else if (e_integral < - 32000){
+ 733              		.loc 1 3466 7 is_stmt 1 view .LVU260
+ 734              		.loc 1 3466 10 is_stmt 0 view .LVU261
+ 735 005c 9FED1F7A 		vldr.32	s14, .L32+16
+ 736 0060 F4EEC77A 		vcmpe.f32	s15, s14
+ 737 0064 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ 738 0068 04D5     		bpl	.L23
+3467:Src/main.c    **** 			e_integral = -32000;
+ 739              		.loc 1 3467 15 view .LVU262
+ 740 006a DFED1C7A 		vldr.32	s15, .L32+16
+ 741              	.LVL47:
+ 742              		.loc 1 3467 15 view .LVU263
+ 743 006e 01E0     		b	.L23
+ 744              	.LVL48:
+ 745              	.L26:
+3464:Src/main.c    **** 			e_integral = 32000;
+ 746              		.loc 1 3464 15 view .LVU264
+ 747 0070 DFED197A 		vldr.32	s15, .L32+12
+ 748              	.LVL49:
+ 749              	.L23:
+3468:Src/main.c    **** 	}
+3469:Src/main.c    **** 	LDx_results->e_integral = e_integral;
+ 750              		.loc 1 3469 2 is_stmt 1 view .LVU265
+ARM GAS  /tmp/ccEQxcUB.s 			page 126
+
+
+ 751              		.loc 1 3469 26 is_stmt 0 view .LVU266
+ 752 0074 C1ED017A 		vstr.32	s15, [r1, #4]
+3470:Src/main.c    **** 	
+3471:Src/main.c    **** 	x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in
+ 753              		.loc 1 3471 2 is_stmt 1 view .LVU267
+ 754              		.loc 1 3471 36 is_stmt 0 view .LVU268
+ 755 0078 07EE103A 		vmov	s14, r3	@ int
+ 756 007c B8EEC77A 		vcvt.f32.s32	s14, s14
+ 757 0080 27EE267A 		vmul.f32	s14, s14, s13
+ 758              		.loc 1 3471 19 view .LVU269
+ 759 0084 DFED166A 		vldr.32	s13, .L32+20
+ 760              	.LVL50:
+ 761              		.loc 1 3471 19 view .LVU270
+ 762 0088 37EE267A 		vadd.f32	s14, s14, s13
+ 763              		.loc 1 3471 46 view .LVU271
+ 764 008c FDEEE77A 		vcvt.s32.f32	s15, s15
+ 765              	.LVL51:
+ 766              		.loc 1 3471 44 view .LVU272
+ 767 0090 F8EEE77A 		vcvt.f32.s32	s15, s15
+ 768 0094 77EE877A 		vadd.f32	s15, s15, s14
+ 769              		.loc 1 3471 11 view .LVU273
+ 770 0098 FDEEE77A 		vcvt.s32.f32	s15, s15
+ 771 009c 17EE900A 		vmov	r0, s15	@ int
+ 772              	.LVL52:
+3472:Src/main.c    **** 	
+3473:Src/main.c    **** 	if(x_output < 1000){
+ 773              		.loc 1 3473 2 is_stmt 1 view .LVU274
+ 774              		.loc 1 3473 4 is_stmt 0 view .LVU275
+ 775 00a0 B0F57A7F 		cmp	r0, #1000
+ 776 00a4 06DB     		blt	.L28
+3474:Src/main.c    **** 		x_output = 8800;
+3475:Src/main.c    **** 	}
+3476:Src/main.c    **** 	else if(x_output > 56800){
+ 777              		.loc 1 3476 7 is_stmt 1 view .LVU276
+ 778              		.loc 1 3476 9 is_stmt 0 view .LVU277
+ 779 00a6 4DF6E053 		movw	r3, #56800
+ 780              	.LVL53:
+ 781              		.loc 1 3476 9 view .LVU278
+ 782 00aa 9842     		cmp	r0, r3
+ 783 00ac 04DD     		ble	.L24
+3477:Src/main.c    **** 		x_output = 56800;
+ 784              		.loc 1 3477 12 view .LVU279
+ 785 00ae 4DF6E050 		movw	r0, #56800
+ 786              	.LVL54:
+ 787              		.loc 1 3477 12 view .LVU280
+ 788 00b2 01E0     		b	.L24
+ 789              	.LVL55:
+ 790              	.L28:
+3474:Src/main.c    **** 		x_output = 8800;
+ 791              		.loc 1 3474 12 view .LVU281
+ 792 00b4 42F26020 		movw	r0, #8800
+ 793              	.LVL56:
+ 794              	.L24:
+3478:Src/main.c    **** 	}
+3479:Src/main.c    **** 	
+3480:Src/main.c    **** 	if (num==2)
+ 795              		.loc 1 3480 2 is_stmt 1 view .LVU282
+ARM GAS  /tmp/ccEQxcUB.s 			page 127
+
+
+ 796              		.loc 1 3480 5 is_stmt 0 view .LVU283
+ 797 00b8 022A     		cmp	r2, #2
+ 798 00ba 02D0     		beq	.L31
+ 799              	.LVL57:
+ 800              	.L25:
+3481:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
+3482:Src/main.c    **** 	
+3483:Src/main.c    **** 	return (uint16_t)x_output;
+ 801              		.loc 1 3483 2 is_stmt 1 view .LVU284
+3484:Src/main.c    **** }
+ 802              		.loc 1 3484 1 is_stmt 0 view .LVU285
+ 803 00bc 80B2     		uxth	r0, r0
+ 804              	.LVL58:
+ 805              		.loc 1 3484 1 view .LVU286
+ 806 00be 30BC     		pop	{r4, r5}
+ 807              	.LCFI7:
+ 808              		.cfi_remember_state
+ 809              		.cfi_restore 5
+ 810              		.cfi_restore 4
+ 811              		.cfi_def_cfa_offset 0
+ 812 00c0 7047     		bx	lr
+ 813              	.LVL59:
+ 814              	.L31:
+ 815              	.LCFI8:
+ 816              		.cfi_restore_state
+3481:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
+ 817              		.loc 1 3481 3 is_stmt 1 view .LVU287
+3481:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
+ 818              		.loc 1 3481 11 is_stmt 0 view .LVU288
+ 819 00c2 024B     		ldr	r3, .L32
+ 820 00c4 1A68     		ldr	r2, [r3]
+ 821              	.LVL60:
+3481:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
+ 822              		.loc 1 3481 11 view .LVU289
+ 823 00c6 024B     		ldr	r3, .L32+4
+ 824 00c8 1A60     		str	r2, [r3]
+ 825 00ca F7E7     		b	.L25
+ 826              	.L33:
+ 827              		.align	2
+ 828              	.L32:
+ 829 00cc 00000000 		.word	TO7
+ 830 00d0 00000000 		.word	TO7_PID
+ 831 00d4 0000C842 		.word	1120403456
+ 832 00d8 0000FA46 		.word	1190789120
+ 833 00dc 0000FAC6 		.word	-956694528
+ 834 00e0 00000047 		.word	1191182336
+ 835              		.cfi_endproc
+ 836              	.LFE1229:
+ 838              		.section	.text.AD9102_WriteReg,"ax",%progbits
+ 839              		.align	1
+ 840              		.syntax unified
+ 841              		.thumb
+ 842              		.thumb_func
+ 844              	AD9102_WriteReg:
+ 845              	.LVL61:
+ 846              	.LFB1217:
+2725:Src/main.c    **** 	uint32_t tmp32 = 0;
+ARM GAS  /tmp/ccEQxcUB.s 			page 128
+
+
+ 847              		.loc 1 2725 1 is_stmt 1 view -0
+ 848              		.cfi_startproc
+ 849              		@ args = 0, pretend = 0, frame = 0
+ 850              		@ frame_needed = 0, uses_anonymous_args = 0
+2725:Src/main.c    **** 	uint32_t tmp32 = 0;
+ 851              		.loc 1 2725 1 is_stmt 0 view .LVU291
+ 852 0000 38B5     		push	{r3, r4, r5, lr}
+ 853              	.LCFI9:
+ 854              		.cfi_def_cfa_offset 16
+ 855              		.cfi_offset 3, -16
+ 856              		.cfi_offset 4, -12
+ 857              		.cfi_offset 5, -8
+ 858              		.cfi_offset 14, -4
+ 859 0002 0C46     		mov	r4, r1
+2726:Src/main.c    **** 	uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
+ 860              		.loc 1 2726 2 is_stmt 1 view .LVU292
+ 861              	.LVL62:
+2727:Src/main.c    **** 
+ 862              		.loc 1 2727 2 view .LVU293
+2727:Src/main.c    **** 
+ 863              		.loc 1 2727 11 is_stmt 0 view .LVU294
+ 864 0004 C0F30E05 		ubfx	r5, r0, #0, #15
+ 865              	.LVL63:
+2729:Src/main.c    **** 
+ 866              		.loc 1 2729 2 is_stmt 1 view .LVU295
+ 867 0008 0021     		movs	r1, #0
+ 868              	.LVL64:
+2729:Src/main.c    **** 
+ 869              		.loc 1 2729 2 is_stmt 0 view .LVU296
+ 870 000a 0846     		mov	r0, r1
+ 871              	.LVL65:
+2729:Src/main.c    **** 
+ 872              		.loc 1 2729 2 view .LVU297
+ 873 000c FFF7FEFF 		bl	SPI2_SetMode
+ 874              	.LVL66:
+2731:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+ 875              		.loc 1 2731 2 is_stmt 1 view .LVU298
+ 876 0010 0122     		movs	r2, #1
+ 877 0012 4FF48041 		mov	r1, #16384
+ 878 0016 2C48     		ldr	r0, .L49
+ 879 0018 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 880              	.LVL67:
+2732:Src/main.c    **** 
+ 881              		.loc 1 2732 2 view .LVU299
+ 882 001c 0122     		movs	r2, #1
+ 883 001e 4FF48051 		mov	r1, #4096
+ 884 0022 2A48     		ldr	r0, .L49+4
+ 885 0024 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 886              	.LVL68:
+2734:Src/main.c    **** 	{
+ 887              		.loc 1 2734 2 view .LVU300
+ 888              	.LBB371:
+ 889              	.LBI371:
+ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 890              		.loc 4 381 26 view .LVU301
+ 891              	.LBB372:
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 129
+
+
+ 892              		.loc 4 383 3 view .LVU302
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 893              		.loc 4 383 12 is_stmt 0 view .LVU303
+ 894 0028 294B     		ldr	r3, .L49+8
+ 895 002a 1B68     		ldr	r3, [r3]
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 896              		.loc 4 383 69 view .LVU304
+ 897 002c 13F0400F 		tst	r3, #64
+ 898 0030 04D1     		bne	.L35
+ 899              	.LVL69:
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 900              		.loc 4 383 69 view .LVU305
+ 901              	.LBE372:
+ 902              	.LBE371:
+2736:Src/main.c    **** 	}
+ 903              		.loc 1 2736 3 is_stmt 1 view .LVU306
+ 904              	.LBB373:
+ 905              	.LBI373:
+ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 906              		.loc 4 358 22 view .LVU307
+ 907              	.LBB374:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 908              		.loc 4 360 3 view .LVU308
+ 909 0032 274A     		ldr	r2, .L49+8
+ 910 0034 1368     		ldr	r3, [r2]
+ 911 0036 43F04003 		orr	r3, r3, #64
+ 912 003a 1360     		str	r3, [r2]
+ 913              	.LVL70:
+ 914              	.L35:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 915              		.loc 4 360 3 is_stmt 0 view .LVU309
+ 916              	.LBE374:
+ 917              	.LBE373:
+2739:Src/main.c    **** 
+ 918              		.loc 1 2739 2 is_stmt 1 view .LVU310
+ 919 003c 0022     		movs	r2, #0
+ 920 003e 4FF48051 		mov	r1, #4096
+ 921 0042 2148     		ldr	r0, .L49
+ 922 0044 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 923              	.LVL71:
+2741:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 924              		.loc 1 2741 2 view .LVU311
+2726:Src/main.c    **** 	uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
+ 925              		.loc 1 2726 11 is_stmt 0 view .LVU312
+ 926 0048 0023     		movs	r3, #0
+ 927              	.LVL72:
+ 928              	.L37:
+2741:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 929              		.loc 1 2741 63 is_stmt 1 discriminator 2 view .LVU313
+2741:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 930              		.loc 1 2741 41 discriminator 2 view .LVU314
+ 931              	.LBB375:
+ 932              	.LBI375:
  487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 122
-
-
  488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Get clock polarity
+ARM GAS  /tmp/ccEQxcUB.s 			page 130
+
+
  491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR1          CPOL          LL_SPI_GetClockPolarity
  492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
  493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval Returned value can be one of the following values:
@@ -7318,12 +7795,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Set transfer bit order
  544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @note   This bit should not be changed when communication is ongoing. This bit is not used in S
-ARM GAS  /tmp/ccwR4KB7.s 			page 123
-
-
  545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR1          LSBFIRST      LL_SPI_SetTransferBitOrder
  546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
  547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  BitOrder This parameter can be one of the following values:
+ARM GAS  /tmp/ccEQxcUB.s 			page 131
+
+
  548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_LSB_FIRST
  549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_MSB_FIRST
  550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
@@ -7378,12 +7855,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_HALF_DUPLEX_RX
  600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_HALF_DUPLEX_TX
  601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 124
-
-
  602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx)
  603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
  604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE));
+ARM GAS  /tmp/ccEQxcUB.s 			page 132
+
+
  605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -7438,12 +7915,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Set threshold of RXFIFO that triggers an RXNE event
  658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR2          FRXTH         LL_SPI_SetRxFIFOThreshold
-ARM GAS  /tmp/ccwR4KB7.s 			page 125
-
-
  659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
  660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  Threshold This parameter can be one of the following values:
  661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_RX_FIFO_TH_HALF
+ARM GAS  /tmp/ccEQxcUB.s 			page 133
+
+
  662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_RX_FIFO_TH_QUARTER
  663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
  664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
@@ -7498,12 +7975,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 126
-
-
  716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Check if CRC is enabled
  717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
  718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR1          CRCEN         LL_SPI_IsEnabledCRC
+ARM GAS  /tmp/ccEQxcUB.s 			page 134
+
+
  719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
  720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval State of bit (1 or 0).
  721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
@@ -7558,12 +8035,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
  771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF
  772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
-ARM GAS  /tmp/ccwR4KB7.s 			page 127
-
-
  773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly)
  775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 135
+
+
  776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly);
  777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
@@ -7618,12 +8095,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_NSS_SOFT
  828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_NSS_HARD_INPUT
  829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_NSS_HARD_OUTPUT
-ARM GAS  /tmp/ccwR4KB7.s 			page 128
-
-
  830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
  831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS)
+ARM GAS  /tmp/ccEQxcUB.s 			page 136
+
+
  833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
  834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   MODIFY_REG(SPIx->CR1, SPI_CR1_SSM,  NSS);
  835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U)));
@@ -7678,12 +8155,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval State of bit (1 or 0).
  885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx)
-ARM GAS  /tmp/ccwR4KB7.s 			page 129
-
-
  887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
  888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL);
  889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 137
+
+
  890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
  892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @}
@@ -7711,42 +8188,42 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval State of bit (1 or 0).
  915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
  916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
- 799              		.loc 4 916 26 view .LVU280
- 800              	.LBB344:
+ 933              		.loc 4 916 26 view .LVU315
+ 934              	.LBB376:
  917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL);
- 801              		.loc 4 918 3 view .LVU281
- 802              		.loc 4 918 12 is_stmt 0 view .LVU282
- 803 002a 1F4A     		ldr	r2, .L44
- 804 002c 9268     		ldr	r2, [r2, #8]
- 805              		.loc 4 918 66 view .LVU283
- 806 002e 12F0020F 		tst	r2, #2
- 807 0032 05D1     		bne	.L31
- 808              	.LVL61:
- 809              		.loc 4 918 66 view .LVU284
- 810              	.LBE344:
- 811              	.LBE343:
-2476:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 812              		.loc 1 2476 50 discriminator 1 view .LVU285
- 813 0034 5A1C     		adds	r2, r3, #1
- 814              	.LVL62:
-2476:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 815              		.loc 1 2476 41 discriminator 1 view .LVU286
- 816 0036 B3F57A7F 		cmp	r3, #1000
- 817 003a 01D2     		bcs	.L31
-2476:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 818              		.loc 1 2476 50 discriminator 1 view .LVU287
- 819 003c 1346     		mov	r3, r2
- 820 003e F4E7     		b	.L32
-ARM GAS  /tmp/ccwR4KB7.s 			page 130
+ 935              		.loc 4 918 3 view .LVU316
+ 936              		.loc 4 918 12 is_stmt 0 view .LVU317
+ 937 004a 214A     		ldr	r2, .L49+8
+ 938 004c 9268     		ldr	r2, [r2, #8]
+ 939              		.loc 4 918 66 view .LVU318
+ 940 004e 12F0020F 		tst	r2, #2
+ 941 0052 05D1     		bne	.L36
+ 942              	.LVL73:
+ 943              		.loc 4 918 66 view .LVU319
+ 944              	.LBE376:
+ 945              	.LBE375:
+2741:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 946              		.loc 1 2741 50 discriminator 1 view .LVU320
+ 947 0054 5A1C     		adds	r2, r3, #1
+ 948              	.LVL74:
+2741:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 949              		.loc 1 2741 41 discriminator 1 view .LVU321
+ 950 0056 B3F57A7F 		cmp	r3, #1000
+ 951 005a 01D2     		bcs	.L36
+2741:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 952              		.loc 1 2741 50 discriminator 1 view .LVU322
+ 953 005c 1346     		mov	r3, r2
+ 954 005e F4E7     		b	.L37
+ 955              	.LVL75:
+ 956              	.L36:
+2742:Src/main.c    **** 	tmp32 = 0;
+ARM GAS  /tmp/ccEQxcUB.s 			page 138
 
 
- 821              	.LVL63:
- 822              	.L31:
-2477:Src/main.c    **** 	tmp32 = 0;
- 823              		.loc 1 2477 2 is_stmt 1 view .LVU288
- 824              	.LBB345:
- 825              	.LBI345:
+ 957              		.loc 1 2742 2 is_stmt 1 view .LVU323
+ 958              	.LBB377:
+ 959              	.LBI377:
  919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -7798,12 +8275,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
  968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
  969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL);
-ARM GAS  /tmp/ccwR4KB7.s 			page 131
-
-
  970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
  971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
  972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 139
+
+
  973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Get frame format error flag
  974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll SR           FRE           LL_SPI_IsActiveFlag_FRE
  975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
@@ -7858,12 +8335,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Clear mode fault error flag
 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @note   Clearing this flag is done by a read access to the SPIx_SR
-ARM GAS  /tmp/ccwR4KB7.s 			page 132
-
-
 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         register followed by a write access to the SPIx_CR1 register
 1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll SR           MODF          LL_SPI_ClearFlag_MODF
 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 140
+
+
 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx)
@@ -7918,12 +8395,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @note   This bit controls the generation of an interrupt when an error condition occurs (CRCERR
 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR2          ERRIE         LL_SPI_EnableIT_ERR
 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 133
-
-
 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
 1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 141
+
+
 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);
 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
@@ -7978,12 +8455,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR2          TXEIE         LL_SPI_DisableIT_TXE
 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
-ARM GAS  /tmp/ccwR4KB7.s 			page 134
-
-
 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
 1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx)
 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 142
+
+
 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);
 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
@@ -8038,12 +8515,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 135
-
-
 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
 1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Disable DMA Rx
+ARM GAS  /tmp/ccEQxcUB.s 			page 143
+
+
 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR2          RXDMAEN       LL_SPI_DisableDMAReq_RX
 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
@@ -8098,12 +8575,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 136
-
-
 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Set parity of  Last DMA reception
 1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll CR2          LDMARX        LL_SPI_SetDMAParity_RX
 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 144
+
+
 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  Parity This parameter can be one of the following values:
 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_DMA_PARITY_ODD
 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *         @arg @ref LL_SPI_DMA_PARITY_EVEN
@@ -8158,12 +8635,12 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Get the data register address used for DMA transfer
 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll DR           DR            LL_SPI_DMA_GetRegAddr
 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 137
-
-
 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval Address of data register
 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 145
+
+
 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   return (uint32_t) &(SPIx->DR);
 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
@@ -8218,4612 +8695,5081 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @brief  Write 16-Bits in the data register
 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @rmtoll DR           DR            LL_SPI_TransmitData16
-ARM GAS  /tmp/ccwR4KB7.s 			page 138
-
-
 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  SPIx SPI Instance
 1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @param  TxData Value between Min_Data=0x00 and Max_Data=0xFFFF
 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 146
+
+
 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   */
 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
- 826              		.loc 4 1373 22 view .LVU289
- 827              	.LBB346:
+ 960              		.loc 4 1373 22 view .LVU324
+ 961              	.LBB378:
 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__)
 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR);
- 828              		.loc 4 1376 3 view .LVU290
+ 962              		.loc 4 1376 3 view .LVU325
 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
- 829              		.loc 4 1377 3 view .LVU291
- 830              		.loc 4 1377 10 is_stmt 0 view .LVU292
- 831 0040 194B     		ldr	r3, .L44
- 832 0042 9D81     		strh	r5, [r3, #12]	@ movhi
- 833              	.LVL64:
- 834              		.loc 4 1377 10 view .LVU293
- 835              	.LBE346:
- 836              	.LBE345:
-2478:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 837              		.loc 1 2478 2 is_stmt 1 view .LVU294
-2479:Src/main.c    **** 	(void) SPI2->DR;
- 838              		.loc 1 2479 2 view .LVU295
-2478:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 839              		.loc 1 2478 8 is_stmt 0 view .LVU296
- 840 0044 0023     		movs	r3, #0
- 841              	.LVL65:
- 842              	.L34:
-2479:Src/main.c    **** 	(void) SPI2->DR;
- 843              		.loc 1 2479 64 is_stmt 1 discriminator 2 view .LVU297
-2479:Src/main.c    **** 	(void) SPI2->DR;
- 844              		.loc 1 2479 42 discriminator 2 view .LVU298
- 845              	.LBB347:
- 846              	.LBI347:
+ 963              		.loc 4 1377 3 view .LVU326
+ 964              		.loc 4 1377 10 is_stmt 0 view .LVU327
+ 965 0060 1B4B     		ldr	r3, .L49+8
+ 966 0062 9D81     		strh	r5, [r3, #12]	@ movhi
+ 967              	.LVL76:
+ 968              		.loc 4 1377 10 view .LVU328
+ 969              	.LBE378:
+ 970              	.LBE377:
+2743:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 971              		.loc 1 2743 2 is_stmt 1 view .LVU329
+2744:Src/main.c    **** 	(void) SPI2->DR;
+ 972              		.loc 1 2744 2 view .LVU330
+2743:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 973              		.loc 1 2743 8 is_stmt 0 view .LVU331
+ 974 0064 0023     		movs	r3, #0
+ 975              	.LVL77:
+ 976              	.L39:
+2744:Src/main.c    **** 	(void) SPI2->DR;
+ 977              		.loc 1 2744 64 is_stmt 1 discriminator 2 view .LVU332
+2744:Src/main.c    **** 	(void) SPI2->DR;
+ 978              		.loc 1 2744 42 discriminator 2 view .LVU333
+ 979              	.LBB379:
+ 980              	.LBI379:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 847              		.loc 4 905 26 view .LVU299
- 848              	.LBB348:
+ 981              		.loc 4 905 26 view .LVU334
+ 982              	.LBB380:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 849              		.loc 4 907 3 view .LVU300
+ 983              		.loc 4 907 3 view .LVU335
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 850              		.loc 4 907 12 is_stmt 0 view .LVU301
- 851 0046 184A     		ldr	r2, .L44
- 852 0048 9268     		ldr	r2, [r2, #8]
+ 984              		.loc 4 907 12 is_stmt 0 view .LVU336
+ 985 0066 1A4A     		ldr	r2, .L49+8
+ 986 0068 9268     		ldr	r2, [r2, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 853              		.loc 4 907 68 view .LVU302
- 854 004a 12F0010F 		tst	r2, #1
- 855 004e 05D1     		bne	.L33
- 856              	.LVL66:
+ 987              		.loc 4 907 68 view .LVU337
+ 988 006a 12F0010F 		tst	r2, #1
+ 989 006e 05D1     		bne	.L38
+ 990              	.LVL78:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 857              		.loc 4 907 68 view .LVU303
- 858              	.LBE348:
- 859              	.LBE347:
-2479:Src/main.c    **** 	(void) SPI2->DR;
- 860              		.loc 1 2479 51 discriminator 1 view .LVU304
- 861 0050 5A1C     		adds	r2, r3, #1
- 862              	.LVL67:
-ARM GAS  /tmp/ccwR4KB7.s 			page 139
+ 991              		.loc 4 907 68 view .LVU338
+ 992              	.LBE380:
+ 993              	.LBE379:
+2744:Src/main.c    **** 	(void) SPI2->DR;
+ 994              		.loc 1 2744 51 discriminator 1 view .LVU339
+ 995 0070 5A1C     		adds	r2, r3, #1
+ 996              	.LVL79:
+2744:Src/main.c    **** 	(void) SPI2->DR;
+ 997              		.loc 1 2744 42 discriminator 1 view .LVU340
+ 998 0072 B3F57A7F 		cmp	r3, #1000
+ARM GAS  /tmp/ccEQxcUB.s 			page 147
 
 
-2479:Src/main.c    **** 	(void) SPI2->DR;
- 863              		.loc 1 2479 42 discriminator 1 view .LVU305
- 864 0052 B3F57A7F 		cmp	r3, #1000
- 865 0056 01D2     		bcs	.L33
-2479:Src/main.c    **** 	(void) SPI2->DR;
- 866              		.loc 1 2479 51 discriminator 1 view .LVU306
- 867 0058 1346     		mov	r3, r2
- 868 005a F4E7     		b	.L34
- 869              	.LVL68:
- 870              	.L33:
-2480:Src/main.c    **** 
- 871              		.loc 1 2480 2 is_stmt 1 view .LVU307
- 872 005c 124B     		ldr	r3, .L44
- 873 005e DB68     		ldr	r3, [r3, #12]
-2482:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 874              		.loc 1 2482 2 view .LVU308
- 875              	.LVL69:
-2483:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
- 876              		.loc 1 2483 2 view .LVU309
-2482:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 877              		.loc 1 2482 8 is_stmt 0 view .LVU310
- 878 0060 0023     		movs	r3, #0
- 879              	.LVL70:
- 880              	.L36:
-2483:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
- 881              		.loc 1 2483 63 is_stmt 1 discriminator 2 view .LVU311
-2483:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
- 882              		.loc 1 2483 41 discriminator 2 view .LVU312
- 883              	.LBB349:
- 884              	.LBI349:
+ 999 0076 01D2     		bcs	.L38
+2744:Src/main.c    **** 	(void) SPI2->DR;
+ 1000              		.loc 1 2744 51 discriminator 1 view .LVU341
+ 1001 0078 1346     		mov	r3, r2
+ 1002 007a F4E7     		b	.L39
+ 1003              	.LVL80:
+ 1004              	.L38:
+2745:Src/main.c    **** 
+ 1005              		.loc 1 2745 2 is_stmt 1 view .LVU342
+ 1006 007c 144B     		ldr	r3, .L49+8
+ 1007 007e DB68     		ldr	r3, [r3, #12]
+2747:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+ 1008              		.loc 1 2747 2 view .LVU343
+ 1009              	.LVL81:
+2748:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
+ 1010              		.loc 1 2748 2 view .LVU344
+2747:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+ 1011              		.loc 1 2747 8 is_stmt 0 view .LVU345
+ 1012 0080 0023     		movs	r3, #0
+ 1013              	.LVL82:
+ 1014              	.L41:
+2748:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
+ 1015              		.loc 1 2748 63 is_stmt 1 discriminator 2 view .LVU346
+2748:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
+ 1016              		.loc 1 2748 41 discriminator 2 view .LVU347
+ 1017              	.LBB381:
+ 1018              	.LBI381:
  916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 885              		.loc 4 916 26 view .LVU313
- 886              	.LBB350:
+ 1019              		.loc 4 916 26 view .LVU348
+ 1020              	.LBB382:
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 887              		.loc 4 918 3 view .LVU314
+ 1021              		.loc 4 918 3 view .LVU349
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 888              		.loc 4 918 12 is_stmt 0 view .LVU315
- 889 0062 114A     		ldr	r2, .L44
- 890 0064 9268     		ldr	r2, [r2, #8]
+ 1022              		.loc 4 918 12 is_stmt 0 view .LVU350
+ 1023 0082 134A     		ldr	r2, .L49+8
+ 1024 0084 9268     		ldr	r2, [r2, #8]
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 891              		.loc 4 918 66 view .LVU316
- 892 0066 12F0020F 		tst	r2, #2
- 893 006a 05D1     		bne	.L35
- 894              	.LVL71:
+ 1025              		.loc 4 918 66 view .LVU351
+ 1026 0086 12F0020F 		tst	r2, #2
+ 1027 008a 05D1     		bne	.L40
+ 1028              	.LVL83:
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 895              		.loc 4 918 66 view .LVU317
- 896              	.LBE350:
- 897              	.LBE349:
-2483:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
- 898              		.loc 1 2483 50 discriminator 1 view .LVU318
- 899 006c 5A1C     		adds	r2, r3, #1
- 900              	.LVL72:
-2483:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
- 901              		.loc 1 2483 41 discriminator 1 view .LVU319
- 902 006e B3F57A7F 		cmp	r3, #1000
- 903 0072 01D2     		bcs	.L35
-2483:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
-ARM GAS  /tmp/ccwR4KB7.s 			page 140
+ 1029              		.loc 4 918 66 view .LVU352
+ 1030              	.LBE382:
+ 1031              	.LBE381:
+2748:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
+ 1032              		.loc 1 2748 50 discriminator 1 view .LVU353
+ 1033 008c 5A1C     		adds	r2, r3, #1
+ 1034              	.LVL84:
+2748:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
+ 1035              		.loc 1 2748 41 discriminator 1 view .LVU354
+ 1036 008e B3F57A7F 		cmp	r3, #1000
+ 1037 0092 01D2     		bcs	.L40
+2748:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, value);
+ 1038              		.loc 1 2748 50 discriminator 1 view .LVU355
+ 1039 0094 1346     		mov	r3, r2
+ 1040 0096 F4E7     		b	.L41
+ARM GAS  /tmp/ccEQxcUB.s 			page 148
 
 
- 904              		.loc 1 2483 50 discriminator 1 view .LVU320
- 905 0074 1346     		mov	r3, r2
- 906 0076 F4E7     		b	.L36
- 907              	.LVL73:
- 908              	.L35:
-2484:Src/main.c    **** 	tmp32 = 0;
- 909              		.loc 1 2484 2 is_stmt 1 view .LVU321
- 910              	.LBB351:
- 911              	.LBI351:
+ 1041              	.LVL85:
+ 1042              	.L40:
+2749:Src/main.c    **** 	tmp32 = 0;
+ 1043              		.loc 1 2749 2 is_stmt 1 view .LVU356
+ 1044              	.LBB383:
+ 1045              	.LBI383:
 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 912              		.loc 4 1373 22 view .LVU322
- 913              	.LBB352:
+ 1046              		.loc 4 1373 22 view .LVU357
+ 1047              	.LBB384:
 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
- 914              		.loc 4 1376 3 view .LVU323
- 915              		.loc 4 1377 3 view .LVU324
- 916              		.loc 4 1377 10 is_stmt 0 view .LVU325
- 917 0078 0B4B     		ldr	r3, .L44
- 918 007a 9C81     		strh	r4, [r3, #12]	@ movhi
- 919              	.LVL74:
- 920              		.loc 4 1377 10 view .LVU326
- 921              	.LBE352:
- 922              	.LBE351:
-2485:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 923              		.loc 1 2485 2 is_stmt 1 view .LVU327
-2486:Src/main.c    **** 	(void) SPI2->DR;
- 924              		.loc 1 2486 2 view .LVU328
-2485:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 925              		.loc 1 2485 8 is_stmt 0 view .LVU329
- 926 007c 0023     		movs	r3, #0
- 927              	.LVL75:
- 928              	.L38:
-2486:Src/main.c    **** 	(void) SPI2->DR;
- 929              		.loc 1 2486 64 is_stmt 1 discriminator 2 view .LVU330
-2486:Src/main.c    **** 	(void) SPI2->DR;
- 930              		.loc 1 2486 42 discriminator 2 view .LVU331
- 931              	.LBB353:
- 932              	.LBI353:
+ 1048              		.loc 4 1376 3 view .LVU358
+ 1049              		.loc 4 1377 3 view .LVU359
+ 1050              		.loc 4 1377 10 is_stmt 0 view .LVU360
+ 1051 0098 0D4B     		ldr	r3, .L49+8
+ 1052 009a 9C81     		strh	r4, [r3, #12]	@ movhi
+ 1053              	.LVL86:
+ 1054              		.loc 4 1377 10 view .LVU361
+ 1055              	.LBE384:
+ 1056              	.LBE383:
+2750:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 1057              		.loc 1 2750 2 is_stmt 1 view .LVU362
+2751:Src/main.c    **** 	(void) SPI2->DR;
+ 1058              		.loc 1 2751 2 view .LVU363
+2750:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 1059              		.loc 1 2750 8 is_stmt 0 view .LVU364
+ 1060 009c 0023     		movs	r3, #0
+ 1061              	.LVL87:
+ 1062              	.L43:
+2751:Src/main.c    **** 	(void) SPI2->DR;
+ 1063              		.loc 1 2751 64 is_stmt 1 discriminator 2 view .LVU365
+2751:Src/main.c    **** 	(void) SPI2->DR;
+ 1064              		.loc 1 2751 42 discriminator 2 view .LVU366
+ 1065              	.LBB385:
+ 1066              	.LBI385:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 933              		.loc 4 905 26 view .LVU332
- 934              	.LBB354:
+ 1067              		.loc 4 905 26 view .LVU367
+ 1068              	.LBB386:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 935              		.loc 4 907 3 view .LVU333
+ 1069              		.loc 4 907 3 view .LVU368
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 936              		.loc 4 907 12 is_stmt 0 view .LVU334
- 937 007e 0A4A     		ldr	r2, .L44
- 938 0080 9268     		ldr	r2, [r2, #8]
+ 1070              		.loc 4 907 12 is_stmt 0 view .LVU369
+ 1071 009e 0C4A     		ldr	r2, .L49+8
+ 1072 00a0 9268     		ldr	r2, [r2, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 939              		.loc 4 907 68 view .LVU335
- 940 0082 12F0010F 		tst	r2, #1
- 941 0086 05D1     		bne	.L37
- 942              	.LVL76:
+ 1073              		.loc 4 907 68 view .LVU370
+ 1074 00a2 12F0010F 		tst	r2, #1
+ 1075 00a6 05D1     		bne	.L42
+ 1076              	.LVL88:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 943              		.loc 4 907 68 view .LVU336
- 944              	.LBE354:
- 945              	.LBE353:
-2486:Src/main.c    **** 	(void) SPI2->DR;
- 946              		.loc 1 2486 51 discriminator 1 view .LVU337
-ARM GAS  /tmp/ccwR4KB7.s 			page 141
+ 1077              		.loc 4 907 68 view .LVU371
+ 1078              	.LBE386:
+ 1079              	.LBE385:
+2751:Src/main.c    **** 	(void) SPI2->DR;
+ 1080              		.loc 1 2751 51 discriminator 1 view .LVU372
+ 1081 00a8 5A1C     		adds	r2, r3, #1
+ 1082              	.LVL89:
+2751:Src/main.c    **** 	(void) SPI2->DR;
+ARM GAS  /tmp/ccEQxcUB.s 			page 149
 
 
- 947 0088 5A1C     		adds	r2, r3, #1
- 948              	.LVL77:
-2486:Src/main.c    **** 	(void) SPI2->DR;
- 949              		.loc 1 2486 42 discriminator 1 view .LVU338
- 950 008a B3F57A7F 		cmp	r3, #1000
- 951 008e 01D2     		bcs	.L37
-2486:Src/main.c    **** 	(void) SPI2->DR;
- 952              		.loc 1 2486 51 discriminator 1 view .LVU339
- 953 0090 1346     		mov	r3, r2
- 954 0092 F4E7     		b	.L38
- 955              	.LVL78:
- 956              	.L37:
-2487:Src/main.c    **** 
- 957              		.loc 1 2487 2 is_stmt 1 view .LVU340
- 958 0094 044B     		ldr	r3, .L44
- 959 0096 DB68     		ldr	r3, [r3, #12]
-2489:Src/main.c    **** }
- 960              		.loc 1 2489 2 view .LVU341
- 961 0098 0122     		movs	r2, #1
- 962 009a 4FF48051 		mov	r1, #4096
- 963 009e 0348     		ldr	r0, .L44+4
- 964 00a0 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 965              	.LVL79:
-2490:Src/main.c    **** 
- 966              		.loc 1 2490 1 is_stmt 0 view .LVU342
- 967 00a4 38BD     		pop	{r3, r4, r5, pc}
- 968              	.LVL80:
- 969              	.L45:
-2490:Src/main.c    **** 
- 970              		.loc 1 2490 1 view .LVU343
- 971 00a6 00BF     		.align	2
- 972              	.L44:
- 973 00a8 00380040 		.word	1073756160
- 974 00ac 00040240 		.word	1073873920
- 975              		.cfi_endproc
- 976              	.LFE1212:
- 978              		.section	.text.AD9102_WriteRegTable,"ax",%progbits
- 979              		.align	1
- 980              		.syntax unified
- 981              		.thumb
- 982              		.thumb_func
- 984              	AD9102_WriteRegTable:
- 985              	.LVL81:
- 986              	.LFB1214:
-2523:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
- 987              		.loc 1 2523 1 is_stmt 1 view -0
- 988              		.cfi_startproc
- 989              		@ args = 0, pretend = 0, frame = 0
- 990              		@ frame_needed = 0, uses_anonymous_args = 0
-2523:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
- 991              		.loc 1 2523 1 is_stmt 0 view .LVU345
- 992 0000 70B5     		push	{r4, r5, r6, lr}
- 993              	.LCFI10:
- 994              		.cfi_def_cfa_offset 16
- 995              		.cfi_offset 4, -16
- 996              		.cfi_offset 5, -12
- 997              		.cfi_offset 6, -8
-ARM GAS  /tmp/ccwR4KB7.s 			page 142
+ 1083              		.loc 1 2751 42 discriminator 1 view .LVU373
+ 1084 00aa B3F57A7F 		cmp	r3, #1000
+ 1085 00ae 01D2     		bcs	.L42
+2751:Src/main.c    **** 	(void) SPI2->DR;
+ 1086              		.loc 1 2751 51 discriminator 1 view .LVU374
+ 1087 00b0 1346     		mov	r3, r2
+ 1088 00b2 F4E7     		b	.L43
+ 1089              	.LVL90:
+ 1090              	.L42:
+2752:Src/main.c    **** 
+ 1091              		.loc 1 2752 2 is_stmt 1 view .LVU375
+ 1092 00b4 064B     		ldr	r3, .L49+8
+ 1093 00b6 DB68     		ldr	r3, [r3, #12]
+2754:Src/main.c    **** }
+ 1094              		.loc 1 2754 2 view .LVU376
+ 1095 00b8 0122     		movs	r2, #1
+ 1096 00ba 4FF48051 		mov	r1, #4096
+ 1097 00be 0248     		ldr	r0, .L49
+ 1098 00c0 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1099              	.LVL91:
+2755:Src/main.c    **** 
+ 1100              		.loc 1 2755 1 is_stmt 0 view .LVU377
+ 1101 00c4 38BD     		pop	{r3, r4, r5, pc}
+ 1102              	.LVL92:
+ 1103              	.L50:
+2755:Src/main.c    **** 
+ 1104              		.loc 1 2755 1 view .LVU378
+ 1105 00c6 00BF     		.align	2
+ 1106              	.L49:
+ 1107 00c8 00040240 		.word	1073873920
+ 1108 00cc 000C0240 		.word	1073875968
+ 1109 00d0 00380040 		.word	1073756160
+ 1110              		.cfi_endproc
+ 1111              	.LFE1217:
+ 1113              		.section	.text.AD9102_WriteRegTable,"ax",%progbits
+ 1114              		.align	1
+ 1115              		.syntax unified
+ 1116              		.thumb
+ 1117              		.thumb_func
+ 1119              	AD9102_WriteRegTable:
+ 1120              	.LVL93:
+ 1121              	.LFB1219:
+2793:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
+ 1122              		.loc 1 2793 1 is_stmt 1 view -0
+ 1123              		.cfi_startproc
+ 1124              		@ args = 0, pretend = 0, frame = 0
+ 1125              		@ frame_needed = 0, uses_anonymous_args = 0
+2793:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
+ 1126              		.loc 1 2793 1 is_stmt 0 view .LVU380
+ 1127 0000 70B5     		push	{r4, r5, r6, lr}
+ 1128              	.LCFI10:
+ 1129              		.cfi_def_cfa_offset 16
+ 1130              		.cfi_offset 4, -16
+ 1131              		.cfi_offset 5, -12
+ 1132              		.cfi_offset 6, -8
+ 1133              		.cfi_offset 14, -4
+ 1134 0002 0646     		mov	r6, r0
+ARM GAS  /tmp/ccEQxcUB.s 			page 150
 
 
- 998              		.cfi_offset 14, -4
- 999 0002 0646     		mov	r6, r0
- 1000 0004 0D46     		mov	r5, r1
-2524:Src/main.c    **** 	{
- 1001              		.loc 1 2524 2 is_stmt 1 view .LVU346
- 1002              	.LBB355:
-2524:Src/main.c    **** 	{
- 1003              		.loc 1 2524 7 view .LVU347
- 1004              	.LVL82:
-2524:Src/main.c    **** 	{
- 1005              		.loc 1 2524 16 is_stmt 0 view .LVU348
- 1006 0006 0024     		movs	r4, #0
-2524:Src/main.c    **** 	{
- 1007              		.loc 1 2524 2 view .LVU349
- 1008 0008 08E0     		b	.L47
- 1009              	.LVL83:
- 1010              	.L48:
-2526:Src/main.c    **** 	}
- 1011              		.loc 1 2526 3 is_stmt 1 view .LVU350
- 1012 000a 36F81410 		ldrh	r1, [r6, r4, lsl #1]
- 1013 000e 054B     		ldr	r3, .L50
- 1014 0010 33F81400 		ldrh	r0, [r3, r4, lsl #1]
- 1015 0014 FFF7FEFF 		bl	AD9102_WriteReg
- 1016              	.LVL84:
-2524:Src/main.c    **** 	{
- 1017              		.loc 1 2524 35 discriminator 3 view .LVU351
- 1018 0018 0134     		adds	r4, r4, #1
- 1019              	.LVL85:
-2524:Src/main.c    **** 	{
- 1020              		.loc 1 2524 35 is_stmt 0 discriminator 3 view .LVU352
- 1021 001a A4B2     		uxth	r4, r4
- 1022              	.LVL86:
- 1023              	.L47:
-2524:Src/main.c    **** 	{
- 1024              		.loc 1 2524 25 is_stmt 1 discriminator 1 view .LVU353
- 1025 001c AC42     		cmp	r4, r5
- 1026 001e F4D3     		bcc	.L48
- 1027              	.LBE355:
-2528:Src/main.c    **** 
- 1028              		.loc 1 2528 1 is_stmt 0 view .LVU354
- 1029 0020 70BD     		pop	{r4, r5, r6, pc}
- 1030              	.LVL87:
- 1031              	.L51:
-2528:Src/main.c    **** 
- 1032              		.loc 1 2528 1 view .LVU355
- 1033 0022 00BF     		.align	2
- 1034              	.L50:
- 1035 0024 00000000 		.word	ad9102_reg_addr
- 1036              		.cfi_endproc
- 1037              	.LFE1214:
- 1039              		.section	.text.AD9102_LoadSramRamp,"ax",%progbits
- 1040              		.align	1
- 1041              		.syntax unified
- 1042              		.thumb
- 1043              		.thumb_func
- 1045              	AD9102_LoadSramRamp:
- 1046              	.LVL88:
-ARM GAS  /tmp/ccwR4KB7.s 			page 143
+ 1135 0004 0D46     		mov	r5, r1
+2794:Src/main.c    **** 	{
+ 1136              		.loc 1 2794 2 is_stmt 1 view .LVU381
+ 1137              	.LBB387:
+2794:Src/main.c    **** 	{
+ 1138              		.loc 1 2794 7 view .LVU382
+ 1139              	.LVL94:
+2794:Src/main.c    **** 	{
+ 1140              		.loc 1 2794 16 is_stmt 0 view .LVU383
+ 1141 0006 0024     		movs	r4, #0
+2794:Src/main.c    **** 	{
+ 1142              		.loc 1 2794 2 view .LVU384
+ 1143 0008 08E0     		b	.L52
+ 1144              	.LVL95:
+ 1145              	.L53:
+2796:Src/main.c    **** 	}
+ 1146              		.loc 1 2796 3 is_stmt 1 view .LVU385
+ 1147 000a 36F81410 		ldrh	r1, [r6, r4, lsl #1]
+ 1148 000e 054B     		ldr	r3, .L55
+ 1149 0010 33F81400 		ldrh	r0, [r3, r4, lsl #1]
+ 1150 0014 FFF7FEFF 		bl	AD9102_WriteReg
+ 1151              	.LVL96:
+2794:Src/main.c    **** 	{
+ 1152              		.loc 1 2794 35 discriminator 3 view .LVU386
+ 1153 0018 0134     		adds	r4, r4, #1
+ 1154              	.LVL97:
+2794:Src/main.c    **** 	{
+ 1155              		.loc 1 2794 35 is_stmt 0 discriminator 3 view .LVU387
+ 1156 001a A4B2     		uxth	r4, r4
+ 1157              	.LVL98:
+ 1158              	.L52:
+2794:Src/main.c    **** 	{
+ 1159              		.loc 1 2794 25 is_stmt 1 discriminator 1 view .LVU388
+ 1160 001c AC42     		cmp	r4, r5
+ 1161 001e F4D3     		bcc	.L53
+ 1162              	.LBE387:
+2798:Src/main.c    **** 
+ 1163              		.loc 1 2798 1 is_stmt 0 view .LVU389
+ 1164 0020 70BD     		pop	{r4, r5, r6, pc}
+ 1165              	.LVL99:
+ 1166              	.L56:
+2798:Src/main.c    **** 
+ 1167              		.loc 1 2798 1 view .LVU390
+ 1168 0022 00BF     		.align	2
+ 1169              	.L55:
+ 1170 0024 00000000 		.word	ad9102_reg_addr
+ 1171              		.cfi_endproc
+ 1172              	.LFE1219:
+ 1174              		.section	.text.AD9102_LoadSramRamp,"ax",%progbits
+ 1175              		.align	1
+ 1176              		.syntax unified
+ 1177              		.thumb
+ 1178              		.thumb_func
+ 1180              	AD9102_LoadSramRamp:
+ 1181              	.LVL100:
+ 1182              	.LFB1221:
+2845:Src/main.c    **** 	if (samples < 2u)
+ARM GAS  /tmp/ccEQxcUB.s 			page 151
 
 
- 1047              	.LFB1216:
-2575:Src/main.c    **** 	if (samples < 2u)
- 1048              		.loc 1 2575 1 is_stmt 1 view -0
- 1049              		.cfi_startproc
- 1050              		@ args = 0, pretend = 0, frame = 0
- 1051              		@ frame_needed = 0, uses_anonymous_args = 0
-2575:Src/main.c    **** 	if (samples < 2u)
- 1052              		.loc 1 2575 1 is_stmt 0 view .LVU357
- 1053 0000 70B5     		push	{r4, r5, r6, lr}
- 1054              	.LCFI11:
- 1055              		.cfi_def_cfa_offset 16
- 1056              		.cfi_offset 4, -16
- 1057              		.cfi_offset 5, -12
- 1058              		.cfi_offset 6, -8
- 1059              		.cfi_offset 14, -4
- 1060 0002 0E46     		mov	r6, r1
-2576:Src/main.c    **** 	{
- 1061              		.loc 1 2576 2 is_stmt 1 view .LVU358
-2576:Src/main.c    **** 	{
- 1062              		.loc 1 2576 5 is_stmt 0 view .LVU359
- 1063 0004 0128     		cmp	r0, #1
- 1064 0006 06D9     		bls	.L64
- 1065 0008 0546     		mov	r5, r0
-2580:Src/main.c    **** 	{
- 1066              		.loc 1 2580 2 is_stmt 1 view .LVU360
-2580:Src/main.c    **** 	{
- 1067              		.loc 1 2580 5 is_stmt 0 view .LVU361
- 1068 000a B0F5805F 		cmp	r0, #4096
- 1069 000e 03D9     		bls	.L53
-2582:Src/main.c    **** 	}
- 1070              		.loc 1 2582 11 view .LVU362
- 1071 0010 4FF48055 		mov	r5, #4096
- 1072 0014 00E0     		b	.L53
- 1073              	.L64:
-2578:Src/main.c    **** 	}
- 1074              		.loc 1 2578 11 view .LVU363
- 1075 0016 0225     		movs	r5, #2
- 1076              	.L53:
- 1077              	.LVL89:
-2586:Src/main.c    **** 
- 1078              		.loc 1 2586 2 is_stmt 1 view .LVU364
- 1079 0018 0421     		movs	r1, #4
- 1080              	.LVL90:
-2586:Src/main.c    **** 
- 1081              		.loc 1 2586 2 is_stmt 0 view .LVU365
- 1082 001a 1E20     		movs	r0, #30
- 1083 001c FFF7FEFF 		bl	AD9102_WriteReg
- 1084              	.LVL91:
-2588:Src/main.c    **** 	{
- 1085              		.loc 1 2588 2 is_stmt 1 view .LVU366
- 1086              	.LBB356:
-2588:Src/main.c    **** 	{
- 1087              		.loc 1 2588 7 view .LVU367
-2588:Src/main.c    **** 	{
- 1088              		.loc 1 2588 16 is_stmt 0 view .LVU368
- 1089 0020 0024     		movs	r4, #0
-2588:Src/main.c    **** 	{
-ARM GAS  /tmp/ccwR4KB7.s 			page 144
-
-
- 1090              		.loc 1 2588 2 view .LVU369
- 1091 0022 2FE0     		b	.L54
- 1092              	.LVL92:
- 1093              	.L74:
- 1094              	.LBB357:
- 1095              	.LBB358:
-2596:Src/main.c    **** 			}
- 1096              		.loc 1 2596 10 view .LVU370
- 1097 0024 0123     		movs	r3, #1
- 1098              	.LVL93:
-2596:Src/main.c    **** 			}
- 1099              		.loc 1 2596 10 view .LVU371
- 1100 0026 34E0     		b	.L56
- 1101              	.LVL94:
- 1102              	.L67:
- 1103              	.LBB359:
-2600:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MIN +
- 1104              		.loc 1 2600 14 discriminator 2 view .LVU372
- 1105 0028 0122     		movs	r2, #1
- 1106 002a 38E0     		b	.L58
- 1107              	.L57:
- 1108              	.LBE359:
- 1109              	.LBB360:
-2606:Src/main.c    **** 				uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
- 1110              		.loc 1 2606 5 is_stmt 1 view .LVU373
-2606:Src/main.c    **** 				uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
- 1111              		.loc 1 2606 14 is_stmt 0 view .LVU374
- 1112 002c EA1A     		subs	r2, r5, r3
- 1113 002e 92B2     		uxth	r2, r2
- 1114              	.LVL95:
-2607:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
- 1115              		.loc 1 2607 5 is_stmt 1 view .LVU375
-2607:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
- 1116              		.loc 1 2607 14 is_stmt 0 view .LVU376
- 1117 0030 012A     		cmp	r2, #1
- 1118 0032 0ED9     		bls	.L68
-2607:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
- 1119              		.loc 1 2607 14 discriminator 1 view .LVU377
- 1120 0034 013A     		subs	r2, r2, #1
- 1121              	.LVL96:
-2607:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
- 1122              		.loc 1 2607 14 discriminator 1 view .LVU378
- 1123 0036 92B2     		uxth	r2, r2
- 1124              	.LVL97:
- 1125              	.L60:
-2608:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom;
- 1126              		.loc 1 2608 5 is_stmt 1 view .LVU379
-2609:Src/main.c    **** 			}
- 1127              		.loc 1 2609 59 is_stmt 0 view .LVU380
- 1128 0038 E31A     		subs	r3, r4, r3
- 1129              	.LVL98:
-2609:Src/main.c    **** 			}
- 1130              		.loc 1 2609 45 view .LVU381
- 1131 003a C3EB8333 		rsb	r3, r3, r3, lsl #14
-2609:Src/main.c    **** 			}
- 1132              		.loc 1 2609 68 view .LVU382
- 1133 003e 93FBF2F2 		sdiv	r2, r3, r2
-ARM GAS  /tmp/ccwR4KB7.s 			page 145
-
-
- 1134              	.LVL99:
-2608:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom;
- 1135              		.loc 1 2608 11 view .LVU383
- 1136 0042 41F6FF71 		movw	r1, #8191
- 1137 0046 891A     		subs	r1, r1, r2
- 1138              	.LVL100:
-2608:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom;
- 1139              		.loc 1 2608 11 view .LVU384
- 1140              	.LBE360:
- 1141              	.LBE358:
-2619:Src/main.c    **** 		{
- 1142              		.loc 1 2619 3 is_stmt 1 view .LVU385
-2619:Src/main.c    **** 		{
- 1143              		.loc 1 2619 6 is_stmt 0 view .LVU386
- 1144 0048 11F5005F 		cmn	r1, #8192
- 1145 004c 0DDA     		bge	.L59
-2621:Src/main.c    **** 		}
- 1146              		.loc 1 2621 10 view .LVU387
- 1147 004e 1C49     		ldr	r1, .L75
- 1148              	.LVL101:
-2621:Src/main.c    **** 		}
- 1149              		.loc 1 2621 10 view .LVU388
- 1150 0050 0EE0     		b	.L61
- 1151              	.LVL102:
- 1152              	.L68:
- 1153              	.LBB363:
- 1154              	.LBB361:
-2607:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
- 1155              		.loc 1 2607 14 discriminator 2 view .LVU389
- 1156 0052 0122     		movs	r2, #1
- 1157              	.LVL103:
-2607:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
- 1158              		.loc 1 2607 14 discriminator 2 view .LVU390
- 1159 0054 F0E7     		b	.L60
- 1160              	.LVL104:
- 1161              	.L55:
-2607:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MAX -
- 1162              		.loc 1 2607 14 discriminator 2 view .LVU391
- 1163              	.LBE361:
- 1164              	.LBE363:
- 1165              	.LBB364:
-2614:Src/main.c    **** 			value = AD9102_SRAM_RAMP_MIN +
- 1166              		.loc 1 2614 4 is_stmt 1 view .LVU392
-2614:Src/main.c    **** 			value = AD9102_SRAM_RAMP_MIN +
- 1167              		.loc 1 2614 13 is_stmt 0 view .LVU393
- 1168 0056 012D     		cmp	r5, #1
- 1169 0058 28D9     		bls	.L70
-2614:Src/main.c    **** 			value = AD9102_SRAM_RAMP_MIN +
- 1170              		.loc 1 2614 13 discriminator 1 view .LVU394
- 1171 005a 6A1E     		subs	r2, r5, #1
- 1172 005c 92B2     		uxth	r2, r2
- 1173              	.L62:
- 1174              	.LVL105:
-2615:Src/main.c    **** 			        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
- 1175              		.loc 1 2615 4 is_stmt 1 view .LVU395
-2616:Src/main.c    **** 		}
- 1176              		.loc 1 2616 44 is_stmt 0 view .LVU396
-ARM GAS  /tmp/ccwR4KB7.s 			page 146
-
-
- 1177 005e C4EB8433 		rsb	r3, r4, r4, lsl #14
-2616:Src/main.c    **** 		}
- 1178              		.loc 1 2616 58 view .LVU397
- 1179 0062 93FBF2F3 		sdiv	r3, r3, r2
-2615:Src/main.c    **** 			        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
- 1180              		.loc 1 2615 10 view .LVU398
- 1181 0066 A3F50051 		sub	r1, r3, #8192
- 1182              	.LVL106:
-2615:Src/main.c    **** 			        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
- 1183              		.loc 1 2615 10 view .LVU399
- 1184              	.LBE364:
-2619:Src/main.c    **** 		{
- 1185              		.loc 1 2619 3 is_stmt 1 view .LVU400
- 1186              	.L59:
-2623:Src/main.c    **** 		{
- 1187              		.loc 1 2623 8 view .LVU401
-2623:Src/main.c    **** 		{
- 1188              		.loc 1 2623 11 is_stmt 0 view .LVU402
- 1189 006a B1F5005F 		cmp	r1, #8192
- 1190 006e 1FDA     		bge	.L71
- 1191              	.LVL107:
- 1192              	.L61:
-2628:Src/main.c    **** 		uint16_t word = (uint16_t)(sample_u14 << 2);
- 1193              		.loc 1 2628 3 is_stmt 1 view .LVU403
-2628:Src/main.c    **** 		uint16_t word = (uint16_t)(sample_u14 << 2);
- 1194              		.loc 1 2628 25 is_stmt 0 view .LVU404
- 1195 0070 89B2     		uxth	r1, r1
- 1196              	.LVL108:
-2629:Src/main.c    **** 		AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word);
- 1197              		.loc 1 2629 3 is_stmt 1 view .LVU405
-2630:Src/main.c    **** 	}
- 1198              		.loc 1 2630 3 view .LVU406
- 1199 0072 8900     		lsls	r1, r1, #2
- 1200              	.LVL109:
-2630:Src/main.c    **** 	}
- 1201              		.loc 1 2630 3 is_stmt 0 view .LVU407
- 1202 0074 89B2     		uxth	r1, r1
- 1203 0076 04F5C040 		add	r0, r4, #24576
- 1204 007a 80B2     		uxth	r0, r0
- 1205 007c FFF7FEFF 		bl	AD9102_WriteReg
- 1206              	.LVL110:
- 1207              	.LBE357:
-2588:Src/main.c    **** 	{
- 1208              		.loc 1 2588 37 is_stmt 1 discriminator 2 view .LVU408
- 1209 0080 0134     		adds	r4, r4, #1
- 1210              	.LVL111:
-2588:Src/main.c    **** 	{
- 1211              		.loc 1 2588 37 is_stmt 0 discriminator 2 view .LVU409
- 1212 0082 A4B2     		uxth	r4, r4
- 1213              	.LVL112:
- 1214              	.L54:
-2588:Src/main.c    **** 	{
- 1215              		.loc 1 2588 25 is_stmt 1 discriminator 1 view .LVU410
- 1216 0084 A542     		cmp	r5, r4
- 1217 0086 16D9     		bls	.L73
- 1218              	.LBB367:
-2590:Src/main.c    **** 		if (triangle)
-ARM GAS  /tmp/ccwR4KB7.s 			page 147
-
-
- 1219              		.loc 1 2590 3 view .LVU411
-2591:Src/main.c    **** 		{
- 1220              		.loc 1 2591 3 view .LVU412
-2591:Src/main.c    **** 		{
- 1221              		.loc 1 2591 6 is_stmt 0 view .LVU413
- 1222 0088 002E     		cmp	r6, #0
- 1223 008a E4D0     		beq	.L55
- 1224              	.LBB365:
-2593:Src/main.c    **** 			if (half == 0u)
- 1225              		.loc 1 2593 4 is_stmt 1 view .LVU414
-2593:Src/main.c    **** 			if (half == 0u)
- 1226              		.loc 1 2593 13 is_stmt 0 view .LVU415
- 1227 008c 6B08     		lsrs	r3, r5, #1
- 1228              	.LVL113:
-2594:Src/main.c    **** 			{
- 1229              		.loc 1 2594 4 is_stmt 1 view .LVU416
-2594:Src/main.c    **** 			{
- 1230              		.loc 1 2594 7 is_stmt 0 view .LVU417
- 1231 008e 012D     		cmp	r5, #1
- 1232 0090 C8D9     		bls	.L74
- 1233              	.LVL114:
- 1234              	.L56:
-2598:Src/main.c    **** 			{
- 1235              		.loc 1 2598 4 is_stmt 1 view .LVU418
-2598:Src/main.c    **** 			{
- 1236              		.loc 1 2598 7 is_stmt 0 view .LVU419
- 1237 0092 9C42     		cmp	r4, r3
- 1238 0094 CAD2     		bcs	.L57
- 1239              	.LBB362:
-2600:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MIN +
- 1240              		.loc 1 2600 5 is_stmt 1 view .LVU420
-2600:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MIN +
- 1241              		.loc 1 2600 14 is_stmt 0 view .LVU421
- 1242 0096 012B     		cmp	r3, #1
- 1243 0098 C6D9     		bls	.L67
-2600:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MIN +
- 1244              		.loc 1 2600 14 discriminator 1 view .LVU422
- 1245 009a 013B     		subs	r3, r3, #1
- 1246              	.LVL115:
-2600:Src/main.c    **** 				value = AD9102_SRAM_RAMP_MIN +
- 1247              		.loc 1 2600 14 discriminator 1 view .LVU423
- 1248 009c 9AB2     		uxth	r2, r3
- 1249              	.LVL116:
- 1250              	.L58:
-2601:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
- 1251              		.loc 1 2601 5 is_stmt 1 view .LVU424
-2602:Src/main.c    **** 			}
- 1252              		.loc 1 2602 45 is_stmt 0 view .LVU425
- 1253 009e C4EB8433 		rsb	r3, r4, r4, lsl #14
-2602:Src/main.c    **** 			}
- 1254              		.loc 1 2602 59 view .LVU426
- 1255 00a2 93FBF2F3 		sdiv	r3, r3, r2
-2601:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
- 1256              		.loc 1 2601 11 view .LVU427
- 1257 00a6 A3F50051 		sub	r1, r3, #8192
- 1258              	.LVL117:
-2601:Src/main.c    **** 				        ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom;
-ARM GAS  /tmp/ccwR4KB7.s 			page 148
-
-
- 1259              		.loc 1 2601 11 view .LVU428
- 1260              	.LBE362:
- 1261              	.LBE365:
-2619:Src/main.c    **** 		{
- 1262              		.loc 1 2619 3 is_stmt 1 view .LVU429
- 1263 00aa DEE7     		b	.L59
- 1264              	.LVL118:
- 1265              	.L70:
- 1266              	.LBB366:
-2614:Src/main.c    **** 			value = AD9102_SRAM_RAMP_MIN +
- 1267              		.loc 1 2614 13 is_stmt 0 discriminator 2 view .LVU430
- 1268 00ac 0122     		movs	r2, #1
- 1269 00ae D6E7     		b	.L62
- 1270              	.LVL119:
- 1271              	.L71:
-2614:Src/main.c    **** 			value = AD9102_SRAM_RAMP_MIN +
- 1272              		.loc 1 2614 13 discriminator 2 view .LVU431
- 1273              	.LBE366:
-2625:Src/main.c    **** 		}
- 1274              		.loc 1 2625 10 view .LVU432
- 1275 00b0 41F6FF71 		movw	r1, #8191
- 1276              	.LVL120:
-2625:Src/main.c    **** 		}
- 1277              		.loc 1 2625 10 view .LVU433
- 1278 00b4 DCE7     		b	.L61
- 1279              	.LVL121:
- 1280              	.L73:
-2625:Src/main.c    **** 		}
- 1281              		.loc 1 2625 10 view .LVU434
- 1282              	.LBE367:
- 1283              	.LBE356:
-2634:Src/main.c    **** }
- 1284              		.loc 1 2634 2 is_stmt 1 view .LVU435
- 1285 00b6 0021     		movs	r1, #0
- 1286 00b8 1E20     		movs	r0, #30
- 1287 00ba FFF7FEFF 		bl	AD9102_WriteReg
- 1288              	.LVL122:
-2635:Src/main.c    **** 
- 1289              		.loc 1 2635 1 is_stmt 0 view .LVU436
- 1290 00be 70BD     		pop	{r4, r5, r6, pc}
- 1291              	.LVL123:
- 1292              	.L76:
-2635:Src/main.c    **** 
- 1293              		.loc 1 2635 1 view .LVU437
- 1294              		.align	2
- 1295              	.L75:
- 1296 00c0 00E0FFFF 		.word	-8192
- 1297              		.cfi_endproc
- 1298              	.LFE1216:
- 1300              		.section	.text.AD9102_Init,"ax",%progbits
- 1301              		.align	1
- 1302              		.syntax unified
- 1303              		.thumb
- 1304              		.thumb_func
- 1306              	AD9102_Init:
- 1307              	.LFB1211:
-2452:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-ARM GAS  /tmp/ccwR4KB7.s 			page 149
-
-
- 1308              		.loc 1 2452 1 is_stmt 1 view -0
- 1309              		.cfi_startproc
- 1310              		@ args = 0, pretend = 0, frame = 8
- 1311              		@ frame_needed = 0, uses_anonymous_args = 0
- 1312 0000 00B5     		push	{lr}
- 1313              	.LCFI12:
- 1314              		.cfi_def_cfa_offset 4
- 1315              		.cfi_offset 14, -4
- 1316 0002 83B0     		sub	sp, sp, #12
- 1317              	.LCFI13:
- 1318              		.cfi_def_cfa_offset 16
-2453:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
- 1319              		.loc 1 2453 2 view .LVU439
- 1320 0004 0122     		movs	r2, #1
- 1321 0006 4FF48051 		mov	r1, #4096
- 1322 000a 1648     		ldr	r0, .L81
- 1323 000c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 1324              	.LVL124:
-2454:Src/main.c    **** 	for (volatile uint32_t d = 0; d < 1000; d++) {}
- 1325              		.loc 1 2454 2 view .LVU440
- 1326 0010 0022     		movs	r2, #0
- 1327 0012 4021     		movs	r1, #64
- 1328 0014 1448     		ldr	r0, .L81+4
- 1329 0016 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 1330              	.LVL125:
-2455:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1331              		.loc 1 2455 2 view .LVU441
- 1332              	.LBB368:
-2455:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1333              		.loc 1 2455 7 view .LVU442
-2455:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1334              		.loc 1 2455 25 is_stmt 0 view .LVU443
- 1335 001a 0023     		movs	r3, #0
- 1336 001c 0193     		str	r3, [sp, #4]
-2455:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1337              		.loc 1 2455 2 view .LVU444
- 1338 001e 02E0     		b	.L78
- 1339              	.L79:
-2455:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1340              		.loc 1 2455 48 is_stmt 1 discriminator 3 view .LVU445
-2455:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1341              		.loc 1 2455 43 discriminator 3 view .LVU446
- 1342 0020 019B     		ldr	r3, [sp, #4]
- 1343 0022 0133     		adds	r3, r3, #1
- 1344 0024 0193     		str	r3, [sp, #4]
- 1345              	.L78:
-2455:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1346              		.loc 1 2455 34 discriminator 1 view .LVU447
- 1347 0026 019B     		ldr	r3, [sp, #4]
- 1348 0028 B3F57A7F 		cmp	r3, #1000
- 1349 002c F8D3     		bcc	.L79
- 1350              	.LBE368:
-2456:Src/main.c    **** 
- 1351              		.loc 1 2456 2 view .LVU448
- 1352 002e 0122     		movs	r2, #1
- 1353 0030 4021     		movs	r1, #64
- 1354 0032 0D48     		ldr	r0, .L81+4
-ARM GAS  /tmp/ccwR4KB7.s 			page 150
-
-
- 1355 0034 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 1356              	.LVL126:
-2458:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- 1357              		.loc 1 2458 2 view .LVU449
- 1358 0038 4221     		movs	r1, #66
- 1359 003a 0C48     		ldr	r0, .L81+8
- 1360 003c FFF7FEFF 		bl	AD9102_WriteRegTable
- 1361              	.LVL127:
-2459:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 1362              		.loc 1 2459 2 view .LVU450
- 1363 0040 0021     		movs	r1, #0
- 1364 0042 1E20     		movs	r0, #30
- 1365 0044 FFF7FEFF 		bl	AD9102_WriteReg
- 1366              	.LVL128:
-2460:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 1367              		.loc 1 2460 2 view .LVU451
- 1368 0048 0121     		movs	r1, #1
- 1369 004a 1D20     		movs	r0, #29
- 1370 004c FFF7FEFF 		bl	AD9102_WriteReg
- 1371              	.LVL129:
-2461:Src/main.c    **** }
- 1372              		.loc 1 2461 2 view .LVU452
- 1373 0050 0122     		movs	r2, #1
- 1374 0052 4FF40061 		mov	r1, #2048
- 1375 0056 0648     		ldr	r0, .L81+12
- 1376 0058 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 1377              	.LVL130:
-2462:Src/main.c    **** 
- 1378              		.loc 1 2462 1 is_stmt 0 view .LVU453
- 1379 005c 03B0     		add	sp, sp, #12
- 1380              	.LCFI14:
- 1381              		.cfi_def_cfa_offset 4
- 1382              		@ sp needed
- 1383 005e 5DF804FB 		ldr	pc, [sp], #4
- 1384              	.L82:
- 1385 0062 00BF     		.align	2
- 1386              	.L81:
- 1387 0064 00040240 		.word	1073873920
- 1388 0068 00080240 		.word	1073874944
- 1389 006c 00000000 		.word	ad9102_example4_regval
- 1390 0070 000C0240 		.word	1073875968
- 1391              		.cfi_endproc
- 1392              	.LFE1211:
- 1394              		.section	.text.AD9102_ReadReg,"ax",%progbits
- 1395              		.align	1
- 1396              		.syntax unified
- 1397              		.thumb
- 1398              		.thumb_func
- 1400              	AD9102_ReadReg:
- 1401              	.LVL131:
- 1402              	.LFB1213:
-2493:Src/main.c    **** 	uint32_t tmp32 = 0;
- 1403              		.loc 1 2493 1 is_stmt 1 view -0
- 1404              		.cfi_startproc
- 1405              		@ args = 0, pretend = 0, frame = 0
- 1406              		@ frame_needed = 0, uses_anonymous_args = 0
-2493:Src/main.c    **** 	uint32_t tmp32 = 0;
-ARM GAS  /tmp/ccwR4KB7.s 			page 151
-
-
- 1407              		.loc 1 2493 1 is_stmt 0 view .LVU455
- 1408 0000 10B5     		push	{r4, lr}
- 1409              	.LCFI15:
- 1410              		.cfi_def_cfa_offset 8
- 1411              		.cfi_offset 4, -8
- 1412              		.cfi_offset 14, -4
-2494:Src/main.c    **** 	uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
- 1413              		.loc 1 2494 2 is_stmt 1 view .LVU456
- 1414              	.LVL132:
-2495:Src/main.c    **** 	uint16_t value;
- 1415              		.loc 1 2495 2 view .LVU457
-2495:Src/main.c    **** 	uint16_t value;
- 1416              		.loc 1 2495 11 is_stmt 0 view .LVU458
- 1417 0002 40F40044 		orr	r4, r0, #32768
- 1418              	.LVL133:
-2496:Src/main.c    **** 
- 1419              		.loc 1 2496 2 is_stmt 1 view .LVU459
-2498:Src/main.c    **** 	{
- 1420              		.loc 1 2498 2 view .LVU460
- 1421              	.LBB369:
- 1422              	.LBI369:
- 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1423              		.loc 4 381 26 view .LVU461
- 1424              	.LBB370:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1425              		.loc 4 383 3 view .LVU462
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1426              		.loc 4 383 12 is_stmt 0 view .LVU463
- 1427 0006 284B     		ldr	r3, .L98
- 1428 0008 1B68     		ldr	r3, [r3]
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1429              		.loc 4 383 69 view .LVU464
- 1430 000a 13F0400F 		tst	r3, #64
- 1431 000e 04D1     		bne	.L84
- 1432              	.LVL134:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1433              		.loc 4 383 69 view .LVU465
- 1434              	.LBE370:
- 1435              	.LBE369:
-2500:Src/main.c    **** 	}
- 1436              		.loc 1 2500 3 is_stmt 1 view .LVU466
- 1437              	.LBB371:
- 1438              	.LBI371:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1439              		.loc 4 358 22 view .LVU467
- 1440              	.LBB372:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1441              		.loc 4 360 3 view .LVU468
- 1442 0010 254A     		ldr	r2, .L98
- 1443 0012 1368     		ldr	r3, [r2]
- 1444 0014 43F04003 		orr	r3, r3, #64
- 1445 0018 1360     		str	r3, [r2]
- 1446              	.LVL135:
- 1447              	.L84:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1448              		.loc 4 360 3 is_stmt 0 view .LVU469
- 1449              	.LBE372:
-ARM GAS  /tmp/ccwR4KB7.s 			page 152
-
-
- 1450              	.LBE371:
-2503:Src/main.c    **** 
- 1451              		.loc 1 2503 2 is_stmt 1 view .LVU470
- 1452 001a 0022     		movs	r2, #0
- 1453 001c 4FF48051 		mov	r1, #4096
- 1454 0020 2248     		ldr	r0, .L98+4
- 1455              	.LVL136:
-2503:Src/main.c    **** 
- 1456              		.loc 1 2503 2 is_stmt 0 view .LVU471
- 1457 0022 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 1458              	.LVL137:
-2505:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 1459              		.loc 1 2505 2 is_stmt 1 view .LVU472
-2494:Src/main.c    **** 	uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
- 1460              		.loc 1 2494 11 is_stmt 0 view .LVU473
- 1461 0026 0023     		movs	r3, #0
- 1462              	.LVL138:
- 1463              	.L86:
-2505:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 1464              		.loc 1 2505 63 is_stmt 1 discriminator 2 view .LVU474
-2505:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 1465              		.loc 1 2505 41 discriminator 2 view .LVU475
- 1466              	.LBB373:
- 1467              	.LBI373:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1468              		.loc 4 916 26 view .LVU476
- 1469              	.LBB374:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1470              		.loc 4 918 3 view .LVU477
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1471              		.loc 4 918 12 is_stmt 0 view .LVU478
- 1472 0028 1F4A     		ldr	r2, .L98
- 1473 002a 9268     		ldr	r2, [r2, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1474              		.loc 4 918 66 view .LVU479
- 1475 002c 12F0020F 		tst	r2, #2
- 1476 0030 05D1     		bne	.L85
- 1477              	.LVL139:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1478              		.loc 4 918 66 view .LVU480
- 1479              	.LBE374:
- 1480              	.LBE373:
-2505:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 1481              		.loc 1 2505 50 discriminator 1 view .LVU481
- 1482 0032 5A1C     		adds	r2, r3, #1
- 1483              	.LVL140:
-2505:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 1484              		.loc 1 2505 41 discriminator 1 view .LVU482
- 1485 0034 B3F57A7F 		cmp	r3, #1000
- 1486 0038 01D2     		bcs	.L85
-2505:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
- 1487              		.loc 1 2505 50 discriminator 1 view .LVU483
- 1488 003a 1346     		mov	r3, r2
- 1489 003c F4E7     		b	.L86
- 1490              	.LVL141:
- 1491              	.L85:
-2506:Src/main.c    **** 	tmp32 = 0;
-ARM GAS  /tmp/ccwR4KB7.s 			page 153
-
-
- 1492              		.loc 1 2506 2 is_stmt 1 view .LVU484
- 1493              	.LBB375:
- 1494              	.LBI375:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1495              		.loc 4 1373 22 view .LVU485
- 1496              	.LBB376:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
- 1497              		.loc 4 1376 3 view .LVU486
- 1498              		.loc 4 1377 3 view .LVU487
- 1499              		.loc 4 1377 10 is_stmt 0 view .LVU488
- 1500 003e 1A4B     		ldr	r3, .L98
- 1501 0040 9C81     		strh	r4, [r3, #12]	@ movhi
- 1502              	.LVL142:
- 1503              		.loc 4 1377 10 view .LVU489
- 1504              	.LBE376:
- 1505              	.LBE375:
-2507:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 1506              		.loc 1 2507 2 is_stmt 1 view .LVU490
-2508:Src/main.c    **** 	(void) SPI2->DR;
- 1507              		.loc 1 2508 2 view .LVU491
-2507:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 1508              		.loc 1 2507 8 is_stmt 0 view .LVU492
- 1509 0042 0023     		movs	r3, #0
- 1510              	.LVL143:
- 1511              	.L88:
-2508:Src/main.c    **** 	(void) SPI2->DR;
- 1512              		.loc 1 2508 64 is_stmt 1 discriminator 2 view .LVU493
-2508:Src/main.c    **** 	(void) SPI2->DR;
- 1513              		.loc 1 2508 42 discriminator 2 view .LVU494
- 1514              	.LBB377:
- 1515              	.LBI377:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1516              		.loc 4 905 26 view .LVU495
- 1517              	.LBB378:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1518              		.loc 4 907 3 view .LVU496
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1519              		.loc 4 907 12 is_stmt 0 view .LVU497
- 1520 0044 184A     		ldr	r2, .L98
- 1521 0046 9268     		ldr	r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1522              		.loc 4 907 68 view .LVU498
- 1523 0048 12F0010F 		tst	r2, #1
- 1524 004c 05D1     		bne	.L87
- 1525              	.LVL144:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1526              		.loc 4 907 68 view .LVU499
- 1527              	.LBE378:
- 1528              	.LBE377:
-2508:Src/main.c    **** 	(void) SPI2->DR;
- 1529              		.loc 1 2508 51 discriminator 1 view .LVU500
- 1530 004e 5A1C     		adds	r2, r3, #1
- 1531              	.LVL145:
-2508:Src/main.c    **** 	(void) SPI2->DR;
- 1532              		.loc 1 2508 42 discriminator 1 view .LVU501
- 1533 0050 B3F57A7F 		cmp	r3, #1000
- 1534 0054 01D2     		bcs	.L87
-ARM GAS  /tmp/ccwR4KB7.s 			page 154
-
-
-2508:Src/main.c    **** 	(void) SPI2->DR;
- 1535              		.loc 1 2508 51 discriminator 1 view .LVU502
- 1536 0056 1346     		mov	r3, r2
- 1537 0058 F4E7     		b	.L88
- 1538              	.LVL146:
- 1539              	.L87:
-2509:Src/main.c    **** 
- 1540              		.loc 1 2509 2 is_stmt 1 view .LVU503
- 1541 005a 134B     		ldr	r3, .L98
- 1542 005c DB68     		ldr	r3, [r3, #12]
-2511:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 1543              		.loc 1 2511 2 view .LVU504
- 1544              	.LVL147:
-2512:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
- 1545              		.loc 1 2512 2 view .LVU505
-2511:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 1546              		.loc 1 2511 8 is_stmt 0 view .LVU506
- 1547 005e 0023     		movs	r3, #0
- 1548              	.LVL148:
- 1549              	.L90:
-2512:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
- 1550              		.loc 1 2512 63 is_stmt 1 discriminator 2 view .LVU507
-2512:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
- 1551              		.loc 1 2512 41 discriminator 2 view .LVU508
- 1552              	.LBB379:
- 1553              	.LBI379:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1554              		.loc 4 916 26 view .LVU509
- 1555              	.LBB380:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1556              		.loc 4 918 3 view .LVU510
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1557              		.loc 4 918 12 is_stmt 0 view .LVU511
- 1558 0060 114A     		ldr	r2, .L98
- 1559 0062 9268     		ldr	r2, [r2, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1560              		.loc 4 918 66 view .LVU512
- 1561 0064 12F0020F 		tst	r2, #2
- 1562 0068 05D1     		bne	.L89
- 1563              	.LVL149:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1564              		.loc 4 918 66 view .LVU513
- 1565              	.LBE380:
- 1566              	.LBE379:
-2512:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
- 1567              		.loc 1 2512 50 discriminator 1 view .LVU514
- 1568 006a 5A1C     		adds	r2, r3, #1
- 1569              	.LVL150:
-2512:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
- 1570              		.loc 1 2512 41 discriminator 1 view .LVU515
- 1571 006c B3F57A7F 		cmp	r3, #1000
- 1572 0070 01D2     		bcs	.L89
-2512:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
- 1573              		.loc 1 2512 50 discriminator 1 view .LVU516
- 1574 0072 1346     		mov	r3, r2
- 1575 0074 F4E7     		b	.L90
- 1576              	.LVL151:
-ARM GAS  /tmp/ccwR4KB7.s 			page 155
-
-
- 1577              	.L89:
-2513:Src/main.c    **** 	tmp32 = 0;
- 1578              		.loc 1 2513 2 is_stmt 1 view .LVU517
- 1579              	.LBB381:
- 1580              	.LBI381:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1581              		.loc 4 1373 22 view .LVU518
- 1582              	.LBB382:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
- 1583              		.loc 4 1376 3 view .LVU519
- 1584              		.loc 4 1377 3 view .LVU520
- 1585              		.loc 4 1377 10 is_stmt 0 view .LVU521
- 1586 0076 0023     		movs	r3, #0
- 1587 0078 0B4A     		ldr	r2, .L98
- 1588 007a 9381     		strh	r3, [r2, #12]	@ movhi
- 1589              	.LVL152:
- 1590              		.loc 4 1377 10 view .LVU522
- 1591              	.LBE382:
- 1592              	.LBE381:
-2514:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 1593              		.loc 1 2514 2 is_stmt 1 view .LVU523
-2515:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
- 1594              		.loc 1 2515 2 view .LVU524
- 1595              	.L92:
-2515:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
- 1596              		.loc 1 2515 64 discriminator 2 view .LVU525
-2515:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
- 1597              		.loc 1 2515 42 discriminator 2 view .LVU526
- 1598              	.LBB383:
- 1599              	.LBI383:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1600              		.loc 4 905 26 view .LVU527
- 1601              	.LBB384:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1602              		.loc 4 907 3 view .LVU528
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1603              		.loc 4 907 12 is_stmt 0 view .LVU529
- 1604 007c 0A4A     		ldr	r2, .L98
- 1605 007e 9268     		ldr	r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1606              		.loc 4 907 68 view .LVU530
- 1607 0080 12F0010F 		tst	r2, #1
- 1608 0084 05D1     		bne	.L91
- 1609              	.LVL153:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1610              		.loc 4 907 68 view .LVU531
- 1611              	.LBE384:
- 1612              	.LBE383:
-2515:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
- 1613              		.loc 1 2515 51 discriminator 1 view .LVU532
- 1614 0086 5A1C     		adds	r2, r3, #1
- 1615              	.LVL154:
-2515:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
- 1616              		.loc 1 2515 42 discriminator 1 view .LVU533
- 1617 0088 B3F57A7F 		cmp	r3, #1000
- 1618 008c 01D2     		bcs	.L91
-2515:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
-ARM GAS  /tmp/ccwR4KB7.s 			page 156
-
-
- 1619              		.loc 1 2515 51 discriminator 1 view .LVU534
- 1620 008e 1346     		mov	r3, r2
- 1621 0090 F4E7     		b	.L92
- 1622              	.LVL155:
- 1623              	.L91:
-2516:Src/main.c    **** 
- 1624              		.loc 1 2516 2 is_stmt 1 view .LVU535
- 1625              	.LBB385:
- 1626              	.LBI385:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1627              		.loc 4 1344 26 view .LVU536
- 1628              	.LBB386:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1629              		.loc 4 1346 3 view .LVU537
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1630              		.loc 4 1346 21 is_stmt 0 view .LVU538
- 1631 0092 054B     		ldr	r3, .L98
- 1632 0094 DC68     		ldr	r4, [r3, #12]
- 1633              	.LVL156:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1634              		.loc 4 1346 10 view .LVU539
- 1635 0096 A4B2     		uxth	r4, r4
- 1636              	.LVL157:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1637              		.loc 4 1346 10 view .LVU540
- 1638              	.LBE386:
- 1639              	.LBE385:
-2518:Src/main.c    **** 	return value;
- 1640              		.loc 1 2518 2 is_stmt 1 view .LVU541
- 1641 0098 0122     		movs	r2, #1
- 1642 009a 4FF48051 		mov	r1, #4096
- 1643 009e 0348     		ldr	r0, .L98+4
- 1644 00a0 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 1645              	.LVL158:
-2519:Src/main.c    **** }
- 1646              		.loc 1 2519 2 view .LVU542
-2520:Src/main.c    **** 
- 1647              		.loc 1 2520 1 is_stmt 0 view .LVU543
- 1648 00a4 2046     		mov	r0, r4
- 1649 00a6 10BD     		pop	{r4, pc}
- 1650              	.LVL159:
- 1651              	.L99:
-2520:Src/main.c    **** 
- 1652              		.loc 1 2520 1 view .LVU544
- 1653              		.align	2
- 1654              	.L98:
- 1655 00a8 00380040 		.word	1073756160
- 1656 00ac 00040240 		.word	1073873920
- 1657              		.cfi_endproc
- 1658              	.LFE1213:
- 1660              		.section	.text.AD9102_CheckFlagsSram,"ax",%progbits
- 1661              		.align	1
- 1662              		.syntax unified
- 1663              		.thumb
- 1664              		.thumb_func
- 1666              	AD9102_CheckFlagsSram:
- 1667              	.LVL160:
-ARM GAS  /tmp/ccwR4KB7.s 			page 157
-
-
- 1668              	.LFB1219:
-2786:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- 1669              		.loc 1 2786 1 is_stmt 1 view -0
- 1670              		.cfi_startproc
- 1671              		@ args = 0, pretend = 0, frame = 8
- 1672              		@ frame_needed = 0, uses_anonymous_args = 0
-2786:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- 1673              		.loc 1 2786 1 is_stmt 0 view .LVU546
- 1674 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
- 1675              	.LCFI16:
- 1676              		.cfi_def_cfa_offset 36
- 1677              		.cfi_offset 4, -36
- 1678              		.cfi_offset 5, -32
- 1679              		.cfi_offset 6, -28
- 1680              		.cfi_offset 7, -24
- 1681              		.cfi_offset 8, -20
- 1682              		.cfi_offset 9, -16
- 1683              		.cfi_offset 10, -12
- 1684              		.cfi_offset 11, -8
- 1685              		.cfi_offset 14, -4
- 1686 0004 83B0     		sub	sp, sp, #12
- 1687              	.LCFI17:
- 1688              		.cfi_def_cfa_offset 48
- 1689 0006 8346     		mov	fp, r0
- 1690 0008 0F46     		mov	r7, r1
- 1691 000a 1446     		mov	r4, r2
- 1692 000c 1D46     		mov	r5, r3
-2787:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 1693              		.loc 1 2787 2 is_stmt 1 view .LVU547
-2787:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 1694              		.loc 1 2787 23 is_stmt 0 view .LVU548
- 1695 000e 0020     		movs	r0, #0
- 1696              	.LVL161:
-2787:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 1697              		.loc 1 2787 23 view .LVU549
- 1698 0010 FFF7FEFF 		bl	AD9102_ReadReg
- 1699              	.LVL162:
-2787:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 1700              		.loc 1 2787 23 view .LVU550
- 1701 0014 8246     		mov	r10, r0
- 1702              	.LVL163:
-2788:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 1703              		.loc 1 2788 2 is_stmt 1 view .LVU551
-2788:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 1704              		.loc 1 2788 22 is_stmt 0 view .LVU552
- 1705 0016 0120     		movs	r0, #1
- 1706 0018 FFF7FEFF 		bl	AD9102_ReadReg
- 1707              	.LVL164:
- 1708 001c 8146     		mov	r9, r0
- 1709              	.LVL165:
-2789:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 1710              		.loc 1 2789 2 is_stmt 1 view .LVU553
-2789:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 1711              		.loc 1 2789 22 is_stmt 0 view .LVU554
- 1712 001e 0220     		movs	r0, #2
- 1713 0020 FFF7FEFF 		bl	AD9102_ReadReg
- 1714              	.LVL166:
-ARM GAS  /tmp/ccwR4KB7.s 			page 158
-
-
- 1715 0024 8046     		mov	r8, r0
- 1716              	.LVL167:
-2790:Src/main.c    **** 
- 1717              		.loc 1 2790 2 is_stmt 1 view .LVU555
-2790:Src/main.c    **** 
- 1718              		.loc 1 2790 21 is_stmt 0 view .LVU556
- 1719 0026 6020     		movs	r0, #96
- 1720 0028 FFF7FEFF 		bl	AD9102_ReadReg
- 1721              	.LVL168:
-2792:Src/main.c    **** 	{
- 1722              		.loc 1 2792 2 is_stmt 1 view .LVU557
-2792:Src/main.c    **** 	{
- 1723              		.loc 1 2792 5 is_stmt 0 view .LVU558
- 1724 002c 1CB1     		cbz	r4, .L117
-2796:Src/main.c    **** 	{
- 1725              		.loc 1 2796 2 is_stmt 1 view .LVU559
-2796:Src/main.c    **** 	{
- 1726              		.loc 1 2796 5 is_stmt 0 view .LVU560
- 1727 002e 012C     		cmp	r4, #1
- 1728 0030 02D8     		bhi	.L101
-2798:Src/main.c    **** 	}
- 1729              		.loc 1 2798 11 view .LVU561
- 1730 0032 0224     		movs	r4, #2
- 1731              	.LVL169:
-2798:Src/main.c    **** 	}
- 1732              		.loc 1 2798 11 view .LVU562
- 1733 0034 03E0     		b	.L102
- 1734              	.LVL170:
- 1735              	.L117:
-2794:Src/main.c    **** 	}
- 1736              		.loc 1 2794 11 view .LVU563
- 1737 0036 1024     		movs	r4, #16
- 1738              	.LVL171:
- 1739              	.L101:
-2800:Src/main.c    **** 	{
- 1740              		.loc 1 2800 2 is_stmt 1 view .LVU564
-2800:Src/main.c    **** 	{
- 1741              		.loc 1 2800 5 is_stmt 0 view .LVU565
- 1742 0038 B4F5805F 		cmp	r4, #4096
- 1743 003c 04D8     		bhi	.L119
- 1744              	.LVL172:
- 1745              	.L102:
-2804:Src/main.c    **** 	{
- 1746              		.loc 1 2804 2 is_stmt 1 view .LVU566
-2804:Src/main.c    **** 	{
- 1747              		.loc 1 2804 5 is_stmt 0 view .LVU567
- 1748 003e 35B1     		cbz	r5, .L120
-2808:Src/main.c    **** 	{
- 1749              		.loc 1 2808 2 is_stmt 1 view .LVU568
-2808:Src/main.c    **** 	{
- 1750              		.loc 1 2808 5 is_stmt 0 view .LVU569
- 1751 0040 0F2D     		cmp	r5, #15
- 1752 0042 05D9     		bls	.L103
-2810:Src/main.c    **** 	}
- 1753              		.loc 1 2810 8 view .LVU570
- 1754 0044 0F25     		movs	r5, #15
- 1755              	.LVL173:
-ARM GAS  /tmp/ccwR4KB7.s 			page 159
-
-
-2810:Src/main.c    **** 	}
- 1756              		.loc 1 2810 8 view .LVU571
- 1757 0046 03E0     		b	.L103
- 1758              	.LVL174:
- 1759              	.L119:
-2802:Src/main.c    **** 	}
- 1760              		.loc 1 2802 11 view .LVU572
- 1761 0048 4FF48054 		mov	r4, #4096
- 1762              	.LVL175:
-2802:Src/main.c    **** 	}
- 1763              		.loc 1 2802 11 view .LVU573
- 1764 004c F7E7     		b	.L102
- 1765              	.LVL176:
- 1766              	.L120:
-2806:Src/main.c    **** 	}
- 1767              		.loc 1 2806 8 view .LVU574
- 1768 004e 0125     		movs	r5, #1
- 1769              	.LVL177:
- 1770              	.L103:
-2813:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 1771              		.loc 1 2813 2 is_stmt 1 view .LVU575
-2813:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 1772              		.loc 1 2813 63 is_stmt 0 view .LVU576
- 1773 0050 2E02     		lsls	r6, r5, #8
- 1774 0052 06F47066 		and	r6, r6, #3840
-2813:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 1775              		.loc 1 2813 11 view .LVU577
- 1776 0056 46F01106 		orr	r6, r6, #17
- 1777              	.LVL178:
-2816:Src/main.c    **** 	if (pat_period == 0u)
- 1778              		.loc 1 2816 2 is_stmt 1 view .LVU578
-2816:Src/main.c    **** 	if (pat_period == 0u)
- 1779              		.loc 1 2816 24 is_stmt 0 view .LVU579
- 1780 005a 0194     		str	r4, [sp, #4]
-2816:Src/main.c    **** 	if (pat_period == 0u)
- 1781              		.loc 1 2816 44 view .LVU580
- 1782 005c 05F00F05 		and	r5, r5, #15
- 1783              	.LVL179:
-2816:Src/main.c    **** 	if (pat_period == 0u)
- 1784              		.loc 1 2816 11 view .LVU581
- 1785 0060 04FB05F5 		mul	r5, r4, r5
- 1786              	.LVL180:
-2817:Src/main.c    **** 	{
- 1787              		.loc 1 2817 2 is_stmt 1 view .LVU582
-2817:Src/main.c    **** 	{
- 1788              		.loc 1 2817 5 is_stmt 0 view .LVU583
- 1789 0064 1DB1     		cbz	r5, .L104
-2821:Src/main.c    **** 	{
- 1790              		.loc 1 2821 2 is_stmt 1 view .LVU584
-2821:Src/main.c    **** 	{
- 1791              		.loc 1 2821 5 is_stmt 0 view .LVU585
- 1792 0066 B5F5803F 		cmp	r5, #65536
- 1793 006a 4CD2     		bcs	.L122
- 1794 006c 0195     		str	r5, [sp, #4]
- 1795              	.L104:
- 1796              	.LVL181:
-2826:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 160
-
-
- 1797              		.loc 1 2826 2 is_stmt 1 view .LVU586
-2826:Src/main.c    **** 
- 1798              		.loc 1 2826 43 is_stmt 0 view .LVU587
- 1799 006e 013C     		subs	r4, r4, #1
- 1800              	.LVL182:
-2826:Src/main.c    **** 
- 1801              		.loc 1 2826 43 view .LVU588
- 1802 0070 A4B2     		uxth	r4, r4
-2826:Src/main.c    **** 
- 1803              		.loc 1 2826 11 view .LVU589
- 1804 0072 2401     		lsls	r4, r4, #4
- 1805 0074 A4B2     		uxth	r4, r4
- 1806              	.LVL183:
-2828:Src/main.c    **** 
- 1807              		.loc 1 2828 2 is_stmt 1 view .LVU590
-2830:Src/main.c    **** 	{
- 1808              		.loc 1 2830 2 view .LVU591
-2830:Src/main.c    **** 	{
- 1809              		.loc 1 2830 5 is_stmt 0 view .LVU592
- 1810 0076 BAF1000F 		cmp	r10, #0
- 1811 007a 48D1     		bne	.L123
-2828:Src/main.c    **** 
- 1812              		.loc 1 2828 10 view .LVU593
- 1813 007c 0125     		movs	r5, #1
- 1814              	.L105:
- 1815              	.LVL184:
-2834:Src/main.c    **** 	{
- 1816              		.loc 1 2834 2 is_stmt 1 view .LVU594
-2834:Src/main.c    **** 	{
- 1817              		.loc 1 2834 5 is_stmt 0 view .LVU595
- 1818 007e 19F4F47F 		tst	r9, #488
- 1819 0082 00D0     		beq	.L106
-2836:Src/main.c    **** 	}
- 1820              		.loc 1 2836 6 view .LVU596
- 1821 0084 0025     		movs	r5, #0
- 1822              	.LVL185:
- 1823              	.L106:
-2838:Src/main.c    **** 	{
- 1824              		.loc 1 2838 2 is_stmt 1 view .LVU597
-2838:Src/main.c    **** 	{
- 1825              		.loc 1 2838 5 is_stmt 0 view .LVU598
- 1826 0086 18F40E6F 		tst	r8, #2272
- 1827 008a 00D0     		beq	.L107
-2840:Src/main.c    **** 	}
- 1828              		.loc 1 2840 6 view .LVU599
- 1829 008c 0025     		movs	r5, #0
- 1830              	.LVL186:
- 1831              	.L107:
-2842:Src/main.c    **** 	{
- 1832              		.loc 1 2842 2 is_stmt 1 view .LVU600
-2842:Src/main.c    **** 	{
- 1833              		.loc 1 2842 5 is_stmt 0 view .LVU601
- 1834 008e 10F03F0F 		tst	r0, #63
- 1835 0092 00D0     		beq	.L108
-2844:Src/main.c    **** 	}
- 1836              		.loc 1 2844 6 view .LVU602
- 1837 0094 0025     		movs	r5, #0
-ARM GAS  /tmp/ccwR4KB7.s 			page 161
-
-
- 1838              	.LVL187:
- 1839              	.L108:
+ 1183              		.loc 1 2845 1 is_stmt 1 view -0
+ 1184              		.cfi_startproc
+ 1185              		@ args = 0, pretend = 0, frame = 0
+ 1186              		@ frame_needed = 0, uses_anonymous_args = 0
+2845:Src/main.c    **** 	if (samples < 2u)
+ 1187              		.loc 1 2845 1 is_stmt 0 view .LVU392
+ 1188 0000 F8B5     		push	{r3, r4, r5, r6, r7, lr}
+ 1189              	.LCFI11:
+ 1190              		.cfi_def_cfa_offset 24
+ 1191              		.cfi_offset 3, -24
+ 1192              		.cfi_offset 4, -20
+ 1193              		.cfi_offset 5, -16
+ 1194              		.cfi_offset 6, -12
+ 1195              		.cfi_offset 7, -8
+ 1196              		.cfi_offset 14, -4
+ 1197 0002 0F46     		mov	r7, r1
+ 1198 0004 1646     		mov	r6, r2
 2846:Src/main.c    **** 	{
- 1840              		.loc 1 2846 2 is_stmt 1 view .LVU603
+ 1199              		.loc 1 2846 2 is_stmt 1 view .LVU393
 2846:Src/main.c    **** 	{
- 1841              		.loc 1 2846 5 is_stmt 0 view .LVU604
- 1842 0096 1FB1     		cbz	r7, .L109
-2846:Src/main.c    **** 	{
- 1843              		.loc 1 2846 17 discriminator 1 view .LVU605
- 1844 0098 1BF0010F 		tst	fp, #1
- 1845 009c 00D1     		bne	.L109
+ 1200              		.loc 1 2846 5 is_stmt 0 view .LVU394
+ 1201 0006 0128     		cmp	r0, #1
+ 1202 0008 06D9     		bls	.L71
+ 1203 000a 0546     		mov	r5, r0
+2850:Src/main.c    **** 	{
+ 1204              		.loc 1 2850 2 is_stmt 1 view .LVU395
+2850:Src/main.c    **** 	{
+ 1205              		.loc 1 2850 5 is_stmt 0 view .LVU396
+ 1206 000c B0F5805F 		cmp	r0, #4096
+ 1207 0010 03D9     		bls	.L58
+2852:Src/main.c    **** 	}
+ 1208              		.loc 1 2852 11 view .LVU397
+ 1209 0012 4FF48055 		mov	r5, #4096
+ 1210 0016 00E0     		b	.L58
+ 1211              	.L71:
 2848:Src/main.c    **** 	}
- 1846              		.loc 1 2848 6 view .LVU606
- 1847 009e 0025     		movs	r5, #0
- 1848              	.LVL188:
- 1849              	.L109:
-2851:Src/main.c    **** 	{
- 1850              		.loc 1 2851 2 is_stmt 1 view .LVU607
-2851:Src/main.c    **** 	{
- 1851              		.loc 1 2851 6 is_stmt 0 view .LVU608
- 1852 00a0 2720     		movs	r0, #39
- 1853              	.LVL189:
-2851:Src/main.c    **** 	{
- 1854              		.loc 1 2851 6 view .LVU609
- 1855 00a2 FFF7FEFF 		bl	AD9102_ReadReg
- 1856              	.LVL190:
-2851:Src/main.c    **** 	{
- 1857              		.loc 1 2851 5 discriminator 1 view .LVU610
- 1858 00a6 43F23003 		movw	r3, #12336
- 1859 00aa 9842     		cmp	r0, r3
- 1860 00ac 00D0     		beq	.L110
-2853:Src/main.c    **** 	}
- 1861              		.loc 1 2853 6 view .LVU611
- 1862 00ae 0025     		movs	r5, #0
- 1863              	.LVL191:
- 1864              	.L110:
-2855:Src/main.c    **** 	{
- 1865              		.loc 1 2855 2 is_stmt 1 view .LVU612
-2855:Src/main.c    **** 	{
- 1866              		.loc 1 2855 6 is_stmt 0 view .LVU613
- 1867 00b0 2820     		movs	r0, #40
- 1868 00b2 FFF7FEFF 		bl	AD9102_ReadReg
- 1869              	.LVL192:
-2855:Src/main.c    **** 	{
- 1870              		.loc 1 2855 5 discriminator 1 view .LVU614
- 1871 00b6 B042     		cmp	r0, r6
- 1872 00b8 00D0     		beq	.L111
-2857:Src/main.c    **** 	}
- 1873              		.loc 1 2857 6 view .LVU615
- 1874 00ba 0025     		movs	r5, #0
- 1875              	.LVL193:
- 1876              	.L111:
-2859:Src/main.c    **** 	{
- 1877              		.loc 1 2859 2 is_stmt 1 view .LVU616
-2859:Src/main.c    **** 	{
- 1878              		.loc 1 2859 6 is_stmt 0 view .LVU617
- 1879 00bc 2920     		movs	r0, #41
-ARM GAS  /tmp/ccwR4KB7.s 			page 162
+ 1212              		.loc 1 2848 11 view .LVU398
+ 1213 0018 0225     		movs	r5, #2
+ 1214              	.L58:
+ 1215              	.LVL101:
+2854:Src/main.c    **** 	{
+ 1216              		.loc 1 2854 2 is_stmt 1 view .LVU399
+2854:Src/main.c    **** 	{
+ 1217              		.loc 1 2854 5 is_stmt 0 view .LVU400
+ 1218 001a B6F5005F 		cmp	r6, #8192
+ 1219 001e 01D3     		bcc	.L59
+2856:Src/main.c    **** 	}
+ 1220              		.loc 1 2856 13 view .LVU401
+ 1221 0020 41F6FF76 		movw	r6, #8191
+ 1222              	.L59:
+ 1223              	.LVL102:
+2860:Src/main.c    **** 
+ 1224              		.loc 1 2860 2 is_stmt 1 view .LVU402
+ 1225 0024 0421     		movs	r1, #4
+ 1226              	.LVL103:
+2860:Src/main.c    **** 
+ 1227              		.loc 1 2860 2 is_stmt 0 view .LVU403
+ARM GAS  /tmp/ccEQxcUB.s 			page 152
 
 
- 1880 00be FFF7FEFF 		bl	AD9102_ReadReg
- 1881              	.LVL194:
-2859:Src/main.c    **** 	{
- 1882              		.loc 1 2859 44 discriminator 1 view .LVU618
- 1883 00c2 BDF80430 		ldrh	r3, [sp, #4]
-2859:Src/main.c    **** 	{
- 1884              		.loc 1 2859 5 discriminator 1 view .LVU619
- 1885 00c6 9842     		cmp	r0, r3
- 1886 00c8 00D0     		beq	.L112
-2861:Src/main.c    **** 	}
- 1887              		.loc 1 2861 6 view .LVU620
- 1888 00ca 0025     		movs	r5, #0
- 1889              	.LVL195:
- 1890              	.L112:
-2863:Src/main.c    **** 	{
- 1891              		.loc 1 2863 2 is_stmt 1 view .LVU621
-2863:Src/main.c    **** 	{
- 1892              		.loc 1 2863 6 is_stmt 0 view .LVU622
- 1893 00cc 1F20     		movs	r0, #31
- 1894 00ce FFF7FEFF 		bl	AD9102_ReadReg
- 1895              	.LVL196:
-2863:Src/main.c    **** 	{
- 1896              		.loc 1 2863 5 discriminator 1 view .LVU623
- 1897 00d2 00B1     		cbz	r0, .L113
-2865:Src/main.c    **** 	}
- 1898              		.loc 1 2865 6 view .LVU624
- 1899 00d4 0025     		movs	r5, #0
- 1900              	.LVL197:
- 1901              	.L113:
-2867:Src/main.c    **** 	{
- 1902              		.loc 1 2867 2 is_stmt 1 view .LVU625
-2867:Src/main.c    **** 	{
- 1903              		.loc 1 2867 6 is_stmt 0 view .LVU626
- 1904 00d6 5D20     		movs	r0, #93
- 1905 00d8 FFF7FEFF 		bl	AD9102_ReadReg
- 1906              	.LVL198:
-2867:Src/main.c    **** 	{
- 1907              		.loc 1 2867 5 discriminator 1 view .LVU627
- 1908 00dc 00B1     		cbz	r0, .L114
-2869:Src/main.c    **** 	}
- 1909              		.loc 1 2869 6 view .LVU628
- 1910 00de 0025     		movs	r5, #0
- 1911              	.LVL199:
- 1912              	.L114:
-2871:Src/main.c    **** 	{
- 1913              		.loc 1 2871 2 is_stmt 1 view .LVU629
-2871:Src/main.c    **** 	{
- 1914              		.loc 1 2871 6 is_stmt 0 view .LVU630
- 1915 00e0 5E20     		movs	r0, #94
- 1916 00e2 FFF7FEFF 		bl	AD9102_ReadReg
- 1917              	.LVL200:
-2871:Src/main.c    **** 	{
- 1918              		.loc 1 2871 5 discriminator 1 view .LVU631
- 1919 00e6 A042     		cmp	r0, r4
- 1920 00e8 00D0     		beq	.L115
-2873:Src/main.c    **** 	}
- 1921              		.loc 1 2873 6 view .LVU632
-ARM GAS  /tmp/ccwR4KB7.s 			page 163
+ 1228 0026 1E20     		movs	r0, #30
+ 1229 0028 FFF7FEFF 		bl	AD9102_WriteReg
+ 1230              	.LVL104:
+2862:Src/main.c    **** 	{
+ 1231              		.loc 1 2862 2 is_stmt 1 view .LVU404
+ 1232              	.LBB388:
+2862:Src/main.c    **** 	{
+ 1233              		.loc 1 2862 7 view .LVU405
+2862:Src/main.c    **** 	{
+ 1234              		.loc 1 2862 16 is_stmt 0 view .LVU406
+ 1235 002c 0024     		movs	r4, #0
+2862:Src/main.c    **** 	{
+ 1236              		.loc 1 2862 2 view .LVU407
+ 1237 002e 2DE0     		b	.L60
+ 1238              	.LVL105:
+ 1239              	.L82:
+ 1240              	.LBB389:
+ 1241              	.LBB390:
+2873:Src/main.c    **** 			}
+ 1242              		.loc 1 2873 10 view .LVU408
+ 1243 0030 0122     		movs	r2, #1
+ 1244              	.LVL106:
+2873:Src/main.c    **** 			}
+ 1245              		.loc 1 2873 10 view .LVU409
+ 1246 0032 34E0     		b	.L62
+ 1247              	.LVL107:
+ 1248              	.L75:
+ 1249              	.LBB391:
+2877:Src/main.c    **** 				if (span == 0)
+ 1250              		.loc 1 2877 14 discriminator 2 view .LVU410
+ 1251 0034 0122     		movs	r2, #1
+ 1252              	.LVL108:
+2877:Src/main.c    **** 				if (span == 0)
+ 1253              		.loc 1 2877 14 discriminator 2 view .LVU411
+ 1254 0036 38E0     		b	.L64
+ 1255              	.LVL109:
+ 1256              	.L63:
+2877:Src/main.c    **** 				if (span == 0)
+ 1257              		.loc 1 2877 14 discriminator 2 view .LVU412
+ 1258              	.LBE391:
+ 1259              	.LBB392:
+2889:Src/main.c    **** 				uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
+ 1260              		.loc 1 2889 5 is_stmt 1 view .LVU413
+2889:Src/main.c    **** 				uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
+ 1261              		.loc 1 2889 14 is_stmt 0 view .LVU414
+ 1262 0038 A91A     		subs	r1, r5, r2
+ 1263 003a 89B2     		uxth	r1, r1
+ 1264              	.LVL110:
+2890:Src/main.c    **** 				if (span == 0)
+ 1265              		.loc 1 2890 5 is_stmt 1 view .LVU415
+2890:Src/main.c    **** 				if (span == 0)
+ 1266              		.loc 1 2890 14 is_stmt 0 view .LVU416
+ 1267 003c 0129     		cmp	r1, #1
+ 1268 003e 09D9     		bls	.L76
+2890:Src/main.c    **** 				if (span == 0)
+ 1269              		.loc 1 2890 14 discriminator 1 view .LVU417
+ 1270 0040 0139     		subs	r1, r1, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 153
 
 
- 1922 00ea 0025     		movs	r5, #0
- 1923              	.LVL201:
- 1924              	.L115:
-2875:Src/main.c    **** 	{
- 1925              		.loc 1 2875 2 is_stmt 1 view .LVU633
-2875:Src/main.c    **** 	{
- 1926              		.loc 1 2875 6 is_stmt 0 view .LVU634
- 1927 00ec 2B20     		movs	r0, #43
- 1928 00ee FFF7FEFF 		bl	AD9102_ReadReg
- 1929              	.LVL202:
-2875:Src/main.c    **** 	{
- 1930              		.loc 1 2875 5 discriminator 1 view .LVU635
- 1931 00f2 40F20113 		movw	r3, #257
- 1932 00f6 9842     		cmp	r0, r3
- 1933 00f8 00D0     		beq	.L116
-2877:Src/main.c    **** 	}
- 1934              		.loc 1 2877 6 view .LVU636
- 1935 00fa 0025     		movs	r5, #0
- 1936              	.LVL203:
- 1937              	.L116:
-2880:Src/main.c    **** }
- 1938              		.loc 1 2880 2 is_stmt 1 view .LVU637
-2881:Src/main.c    **** 
- 1939              		.loc 1 2881 1 is_stmt 0 view .LVU638
- 1940 00fc 85F00100 		eor	r0, r5, #1
- 1941 0100 03B0     		add	sp, sp, #12
- 1942              	.LCFI18:
- 1943              		.cfi_remember_state
- 1944              		.cfi_def_cfa_offset 36
- 1945              		@ sp needed
- 1946 0102 BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
- 1947              	.LVL204:
- 1948              	.L122:
- 1949              	.LCFI19:
- 1950              		.cfi_restore_state
-2823:Src/main.c    **** 	}
- 1951              		.loc 1 2823 14 view .LVU639
- 1952 0106 4FF6FF73 		movw	r3, #65535
- 1953 010a 0193     		str	r3, [sp, #4]
- 1954 010c AFE7     		b	.L104
- 1955              	.LVL205:
- 1956              	.L123:
-2832:Src/main.c    **** 	}
- 1957              		.loc 1 2832 6 view .LVU640
- 1958 010e 0025     		movs	r5, #0
- 1959 0110 B5E7     		b	.L105
- 1960              		.cfi_endproc
- 1961              	.LFE1219:
- 1963              		.section	.text.AD9102_CheckFlags,"ax",%progbits
- 1964              		.align	1
- 1965              		.syntax unified
- 1966              		.thumb
- 1967              		.thumb_func
- 1969              	AD9102_CheckFlags:
- 1970              	.LVL206:
- 1971              	.LFB1218:
-2706:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
-ARM GAS  /tmp/ccwR4KB7.s 			page 164
+ 1271              	.LVL111:
+2890:Src/main.c    **** 				if (span == 0)
+ 1272              		.loc 1 2890 14 discriminator 1 view .LVU418
+ 1273 0042 89B2     		uxth	r1, r1
+ 1274              	.LVL112:
+ 1275              	.L67:
+2891:Src/main.c    **** 				{
+ 1276              		.loc 1 2891 5 is_stmt 1 view .LVU419
+2891:Src/main.c    **** 				{
+ 1277              		.loc 1 2891 8 is_stmt 0 view .LVU420
+ 1278 0044 ABB1     		cbz	r3, .L65
+2897:Src/main.c    **** 				}
+ 1279              		.loc 1 2897 6 is_stmt 1 view .LVU421
+2897:Src/main.c    **** 				}
+ 1280              		.loc 1 2897 44 is_stmt 0 view .LVU422
+ 1281 0046 A21A     		subs	r2, r4, r2
+ 1282              	.LVL113:
+2897:Src/main.c    **** 				}
+ 1283              		.loc 1 2897 30 view .LVU423
+ 1284 0048 03FB02F2 		mul	r2, r3, r2
+2897:Src/main.c    **** 				}
+ 1285              		.loc 1 2897 53 view .LVU424
+ 1286 004c 92FBF1F2 		sdiv	r2, r2, r1
+2897:Src/main.c    **** 				}
+ 1287              		.loc 1 2897 12 view .LVU425
+ 1288 0050 831A     		subs	r3, r0, r2
+ 1289              	.LVL114:
+2897:Src/main.c    **** 				}
+ 1290              		.loc 1 2897 12 view .LVU426
+ 1291 0052 0BE0     		b	.L66
+ 1292              	.LVL115:
+ 1293              	.L76:
+2890:Src/main.c    **** 				if (span == 0)
+ 1294              		.loc 1 2890 14 discriminator 2 view .LVU427
+ 1295 0054 0121     		movs	r1, #1
+ 1296              	.LVL116:
+2890:Src/main.c    **** 				if (span == 0)
+ 1297              		.loc 1 2890 14 discriminator 2 view .LVU428
+ 1298 0056 F5E7     		b	.L67
+ 1299              	.LVL117:
+ 1300              	.L61:
+2890:Src/main.c    **** 				if (span == 0)
+ 1301              		.loc 1 2890 14 discriminator 2 view .LVU429
+ 1302              	.LBE392:
+ 1303              	.LBE390:
+ 1304              	.LBB394:
+2903:Src/main.c    **** 			if (span == 0)
+ 1305              		.loc 1 2903 4 is_stmt 1 view .LVU430
+2903:Src/main.c    **** 			if (span == 0)
+ 1306              		.loc 1 2903 13 is_stmt 0 view .LVU431
+ 1307 0058 012D     		cmp	r5, #1
+ 1308 005a 2ED9     		bls	.L77
+2903:Src/main.c    **** 			if (span == 0)
+ 1309              		.loc 1 2903 13 discriminator 1 view .LVU432
+ 1310 005c 6A1E     		subs	r2, r5, #1
+ 1311 005e 92B2     		uxth	r2, r2
+ 1312              	.L68:
+ARM GAS  /tmp/ccEQxcUB.s 			page 154
 
 
- 1972              		.loc 1 2706 1 is_stmt 1 view -0
- 1973              		.cfi_startproc
- 1974              		@ args = 8, pretend = 0, frame = 8
- 1975              		@ frame_needed = 0, uses_anonymous_args = 0
-2706:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- 1976              		.loc 1 2706 1 is_stmt 0 view .LVU642
- 1977 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
- 1978              	.LCFI20:
- 1979              		.cfi_def_cfa_offset 36
- 1980              		.cfi_offset 4, -36
- 1981              		.cfi_offset 5, -32
- 1982              		.cfi_offset 6, -28
- 1983              		.cfi_offset 7, -24
- 1984              		.cfi_offset 8, -20
- 1985              		.cfi_offset 9, -16
- 1986              		.cfi_offset 10, -12
- 1987              		.cfi_offset 11, -8
- 1988              		.cfi_offset 14, -4
- 1989 0004 83B0     		sub	sp, sp, #12
- 1990              	.LCFI21:
- 1991              		.cfi_def_cfa_offset 48
- 1992 0006 0190     		str	r0, [sp, #4]
- 1993 0008 0F46     		mov	r7, r1
- 1994 000a 1546     		mov	r5, r2
- 1995 000c 1C46     		mov	r4, r3
- 1996 000e BDF834B0 		ldrh	fp, [sp, #52]
-2707:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 1997              		.loc 1 2707 2 is_stmt 1 view .LVU643
-2707:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 1998              		.loc 1 2707 23 is_stmt 0 view .LVU644
- 1999 0012 0020     		movs	r0, #0
- 2000              	.LVL207:
-2707:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 2001              		.loc 1 2707 23 view .LVU645
- 2002 0014 FFF7FEFF 		bl	AD9102_ReadReg
- 2003              	.LVL208:
-2707:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 2004              		.loc 1 2707 23 view .LVU646
- 2005 0018 8246     		mov	r10, r0
- 2006              	.LVL209:
-2708:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 2007              		.loc 1 2708 2 is_stmt 1 view .LVU647
-2708:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 2008              		.loc 1 2708 22 is_stmt 0 view .LVU648
- 2009 001a 0120     		movs	r0, #1
- 2010 001c FFF7FEFF 		bl	AD9102_ReadReg
- 2011              	.LVL210:
- 2012 0020 8146     		mov	r9, r0
- 2013              	.LVL211:
-2709:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 2014              		.loc 1 2709 2 is_stmt 1 view .LVU649
-2709:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 2015              		.loc 1 2709 22 is_stmt 0 view .LVU650
- 2016 0022 0220     		movs	r0, #2
- 2017 0024 FFF7FEFF 		bl	AD9102_ReadReg
- 2018              	.LVL212:
- 2019 0028 8046     		mov	r8, r0
-ARM GAS  /tmp/ccwR4KB7.s 			page 165
+ 1313              	.LVL118:
+2904:Src/main.c    **** 			{
+ 1314              		.loc 1 2904 4 is_stmt 1 view .LVU433
+2904:Src/main.c    **** 			{
+ 1315              		.loc 1 2904 7 is_stmt 0 view .LVU434
+ 1316 0060 3BB1     		cbz	r3, .L65
+2910:Src/main.c    **** 			}
+ 1317              		.loc 1 2910 5 is_stmt 1 view .LVU435
+2910:Src/main.c    **** 			}
+ 1318              		.loc 1 2910 29 is_stmt 0 view .LVU436
+ 1319 0062 04FB03F3 		mul	r3, r4, r3
+ 1320              	.LVL119:
+2910:Src/main.c    **** 			}
+ 1321              		.loc 1 2910 43 view .LVU437
+ 1322 0066 93FBF2F3 		sdiv	r3, r3, r2
+ 1323 006a 1B1A     		subs	r3, r3, r0
+ 1324              	.LVL120:
+ 1325              	.L66:
+2910:Src/main.c    **** 			}
+ 1326              		.loc 1 2910 43 view .LVU438
+ 1327              	.LBE394:
+2914:Src/main.c    **** 		{
+ 1328              		.loc 1 2914 3 is_stmt 1 view .LVU439
+2914:Src/main.c    **** 		{
+ 1329              		.loc 1 2914 6 is_stmt 0 view .LVU440
+ 1330 006c 13F5005F 		cmn	r3, #8192
+ 1331 0070 25DB     		blt	.L78
+ 1332              	.LVL121:
+ 1333              	.L65:
+2918:Src/main.c    **** 		{
+ 1334              		.loc 1 2918 8 is_stmt 1 view .LVU441
+2918:Src/main.c    **** 		{
+ 1335              		.loc 1 2918 11 is_stmt 0 view .LVU442
+ 1336 0072 B3F5005F 		cmp	r3, #8192
+ 1337 0076 24DA     		bge	.L79
+ 1338              	.L69:
+ 1339              	.LVL122:
+2923:Src/main.c    **** 		uint16_t word = (uint16_t)(sample_u14 << 2);
+ 1340              		.loc 1 2923 3 is_stmt 1 view .LVU443
+2923:Src/main.c    **** 		uint16_t word = (uint16_t)(sample_u14 << 2);
+ 1341              		.loc 1 2923 25 is_stmt 0 view .LVU444
+ 1342 0078 99B2     		uxth	r1, r3
+ 1343              	.LVL123:
+2924:Src/main.c    **** 		AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word);
+ 1344              		.loc 1 2924 3 is_stmt 1 view .LVU445
+2925:Src/main.c    **** 	}
+ 1345              		.loc 1 2925 3 view .LVU446
+ 1346 007a 8900     		lsls	r1, r1, #2
+ 1347              	.LVL124:
+2925:Src/main.c    **** 	}
+ 1348              		.loc 1 2925 3 is_stmt 0 view .LVU447
+ 1349 007c 89B2     		uxth	r1, r1
+ 1350 007e 04F5C040 		add	r0, r4, #24576
+ 1351              	.LVL125:
+2925:Src/main.c    **** 	}
+ 1352              		.loc 1 2925 3 view .LVU448
+ 1353 0082 80B2     		uxth	r0, r0
+ARM GAS  /tmp/ccEQxcUB.s 			page 155
 
 
- 2020              	.LVL213:
-2710:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- 2021              		.loc 1 2710 2 is_stmt 1 view .LVU651
-2710:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- 2022              		.loc 1 2710 21 is_stmt 0 view .LVU652
- 2023 002a 6020     		movs	r0, #96
- 2024 002c FFF7FEFF 		bl	AD9102_ReadReg
- 2025              	.LVL214:
-2711:Src/main.c    **** 	                                   ((pat_base & 0x0Fu) << 4) |
- 2026              		.loc 1 2711 2 is_stmt 1 view .LVU653
-2712:Src/main.c    **** 	                                   (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
- 2027              		.loc 1 2712 57 is_stmt 0 view .LVU654
- 2028 0030 9DF83030 		ldrb	r3, [sp, #48]	@ zero_extendqisi2
- 2029 0034 1B01     		lsls	r3, r3, #4
- 2030 0036 03F0F003 		and	r3, r3, #240
-2711:Src/main.c    **** 	                                   ((pat_base & 0x0Fu) << 4) |
- 2031              		.loc 1 2711 11 view .LVU655
- 2032 003a 40F20116 		movw	r6, #257
- 2033 003e 1E43     		orrs	r6, r6, r3
- 2034              	.LVL215:
-2715:Src/main.c    **** 	{
- 2035              		.loc 1 2715 2 is_stmt 1 view .LVU656
-2715:Src/main.c    **** 	{
- 2036              		.loc 1 2715 5 is_stmt 0 view .LVU657
- 2037 0040 1CB1     		cbz	r4, .L149
-2719:Src/main.c    **** 	{
- 2038              		.loc 1 2719 2 is_stmt 1 view .LVU658
-2719:Src/main.c    **** 	{
- 2039              		.loc 1 2719 5 is_stmt 0 view .LVU659
- 2040 0042 3F2C     		cmp	r4, #63
- 2041 0044 02D9     		bls	.L137
-2721:Src/main.c    **** 	}
- 2042              		.loc 1 2721 12 view .LVU660
- 2043 0046 3F24     		movs	r4, #63
- 2044              	.LVL216:
-2721:Src/main.c    **** 	}
- 2045              		.loc 1 2721 12 view .LVU661
- 2046 0048 00E0     		b	.L137
- 2047              	.LVL217:
- 2048              	.L149:
-2717:Src/main.c    **** 	}
- 2049              		.loc 1 2717 12 view .LVU662
- 2050 004a 0124     		movs	r4, #1
- 2051              	.LVL218:
- 2052              	.L137:
-2723:Src/main.c    **** 	{
- 2053              		.loc 1 2723 2 is_stmt 1 view .LVU663
-2723:Src/main.c    **** 	{
- 2054              		.loc 1 2723 5 is_stmt 0 view .LVU664
- 2055 004c BBF1000F 		cmp	fp, #0
- 2056 0050 01D1     		bne	.L138
-2725:Src/main.c    **** 	}
- 2057              		.loc 1 2725 14 view .LVU665
- 2058 0052 4FF6FF7B 		movw	fp, #65535
- 2059              	.L138:
- 2060              	.LVL219:
-2727:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
-ARM GAS  /tmp/ccwR4KB7.s 			page 166
+ 1354 0084 FFF7FEFF 		bl	AD9102_WriteReg
+ 1355              	.LVL126:
+2925:Src/main.c    **** 	}
+ 1356              		.loc 1 2925 3 view .LVU449
+ 1357              	.LBE389:
+2862:Src/main.c    **** 	{
+ 1358              		.loc 1 2862 37 is_stmt 1 discriminator 2 view .LVU450
+ 1359 0088 0134     		adds	r4, r4, #1
+ 1360              	.LVL127:
+2862:Src/main.c    **** 	{
+ 1361              		.loc 1 2862 37 is_stmt 0 discriminator 2 view .LVU451
+ 1362 008a A4B2     		uxth	r4, r4
+ 1363              	.LVL128:
+ 1364              	.L60:
+2862:Src/main.c    **** 	{
+ 1365              		.loc 1 2862 25 is_stmt 1 discriminator 1 view .LVU452
+ 1366 008c A542     		cmp	r5, r4
+ 1367 008e 1BD9     		bls	.L81
+ 1368              	.LBB397:
+2864:Src/main.c    **** 		int32_t min_val = -(int32_t)amplitude;
+ 1369              		.loc 1 2864 3 view .LVU453
+2865:Src/main.c    **** 		int32_t max_val = (int32_t)amplitude;
+ 1370              		.loc 1 2865 3 view .LVU454
+2865:Src/main.c    **** 		int32_t max_val = (int32_t)amplitude;
+ 1371              		.loc 1 2865 22 is_stmt 0 view .LVU455
+ 1372 0090 3046     		mov	r0, r6
+ 1373              	.LVL129:
+2866:Src/main.c    **** 		int32_t span = max_val - min_val;
+ 1374              		.loc 1 2866 3 is_stmt 1 view .LVU456
+2867:Src/main.c    **** 		if (triangle)
+ 1375              		.loc 1 2867 3 view .LVU457
+2867:Src/main.c    **** 		if (triangle)
+ 1376              		.loc 1 2867 11 is_stmt 0 view .LVU458
+ 1377 0092 7300     		lsls	r3, r6, #1
+ 1378              	.LVL130:
+2868:Src/main.c    **** 		{
+ 1379              		.loc 1 2868 3 is_stmt 1 view .LVU459
+2868:Src/main.c    **** 		{
+ 1380              		.loc 1 2868 6 is_stmt 0 view .LVU460
+ 1381 0094 002F     		cmp	r7, #0
+ 1382 0096 DFD0     		beq	.L61
+ 1383              	.LBB395:
+2870:Src/main.c    **** 			if (half == 0u)
+ 1384              		.loc 1 2870 4 is_stmt 1 view .LVU461
+2870:Src/main.c    **** 			if (half == 0u)
+ 1385              		.loc 1 2870 13 is_stmt 0 view .LVU462
+ 1386 0098 6A08     		lsrs	r2, r5, #1
+ 1387              	.LVL131:
+2871:Src/main.c    **** 			{
+ 1388              		.loc 1 2871 4 is_stmt 1 view .LVU463
+2871:Src/main.c    **** 			{
+ 1389              		.loc 1 2871 7 is_stmt 0 view .LVU464
+ 1390 009a 012D     		cmp	r5, #1
+ 1391 009c C8D9     		bls	.L82
+ 1392              	.LVL132:
+ 1393              	.L62:
+2875:Src/main.c    **** 			{
+ARM GAS  /tmp/ccEQxcUB.s 			page 156
 
 
- 2061              		.loc 1 2727 2 is_stmt 1 view .LVU666
-2728:Src/main.c    **** 
- 2062              		.loc 1 2728 35 is_stmt 0 view .LVU667
- 2063 0056 05F00305 		and	r5, r5, #3
- 2064              	.LVL220:
-2727:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
- 2065              		.loc 1 2727 71 view .LVU668
- 2066 005a A400     		lsls	r4, r4, #2
- 2067              	.LVL221:
-2727:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
- 2068              		.loc 1 2727 71 view .LVU669
- 2069 005c E4B2     		uxtb	r4, r4
-2727:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
- 2070              		.loc 1 2727 11 view .LVU670
- 2071 005e 2543     		orrs	r5, r5, r4
- 2072              	.LVL222:
-2730:Src/main.c    **** 
- 2073              		.loc 1 2730 2 is_stmt 1 view .LVU671
-2733:Src/main.c    **** 	{
- 2074              		.loc 1 2733 2 view .LVU672
-2733:Src/main.c    **** 	{
- 2075              		.loc 1 2733 5 is_stmt 0 view .LVU673
- 2076 0060 BAF1000F 		cmp	r10, #0
- 2077 0064 36D1     		bne	.L152
-2730:Src/main.c    **** 
- 2078              		.loc 1 2730 10 view .LVU674
- 2079 0066 0124     		movs	r4, #1
- 2080              	.L139:
- 2081              	.LVL223:
-2739:Src/main.c    **** 	{
- 2082              		.loc 1 2739 2 is_stmt 1 view .LVU675
-2739:Src/main.c    **** 	{
- 2083              		.loc 1 2739 5 is_stmt 0 view .LVU676
- 2084 0068 19F4F47F 		tst	r9, #488
- 2085 006c 00D0     		beq	.L140
-2741:Src/main.c    **** 	}
- 2086              		.loc 1 2741 6 view .LVU677
- 2087 006e 0024     		movs	r4, #0
- 2088              	.LVL224:
- 2089              	.L140:
-2745:Src/main.c    **** 	{
- 2090              		.loc 1 2745 2 is_stmt 1 view .LVU678
-2745:Src/main.c    **** 	{
- 2091              		.loc 1 2745 5 is_stmt 0 view .LVU679
- 2092 0070 18F40E6F 		tst	r8, #2272
- 2093 0074 00D0     		beq	.L141
-2747:Src/main.c    **** 	}
- 2094              		.loc 1 2747 6 view .LVU680
- 2095 0076 0024     		movs	r4, #0
- 2096              	.LVL225:
- 2097              	.L141:
-2751:Src/main.c    **** 	{
- 2098              		.loc 1 2751 2 is_stmt 1 view .LVU681
-2751:Src/main.c    **** 	{
- 2099              		.loc 1 2751 5 is_stmt 0 view .LVU682
- 2100 0078 10F03F0F 		tst	r0, #63
- 2101 007c 00D0     		beq	.L142
-ARM GAS  /tmp/ccwR4KB7.s 			page 167
+ 1394              		.loc 1 2875 4 is_stmt 1 view .LVU465
+2875:Src/main.c    **** 			{
+ 1395              		.loc 1 2875 7 is_stmt 0 view .LVU466
+ 1396 009e 9442     		cmp	r4, r2
+ 1397 00a0 CAD2     		bcs	.L63
+ 1398              	.LBB393:
+2877:Src/main.c    **** 				if (span == 0)
+ 1399              		.loc 1 2877 5 is_stmt 1 view .LVU467
+2877:Src/main.c    **** 				if (span == 0)
+ 1400              		.loc 1 2877 14 is_stmt 0 view .LVU468
+ 1401 00a2 012A     		cmp	r2, #1
+ 1402 00a4 C6D9     		bls	.L75
+2877:Src/main.c    **** 				if (span == 0)
+ 1403              		.loc 1 2877 14 discriminator 1 view .LVU469
+ 1404 00a6 013A     		subs	r2, r2, #1
+ 1405              	.LVL133:
+2877:Src/main.c    **** 				if (span == 0)
+ 1406              		.loc 1 2877 14 discriminator 1 view .LVU470
+ 1407 00a8 92B2     		uxth	r2, r2
+ 1408              	.LVL134:
+ 1409              	.L64:
+2878:Src/main.c    **** 				{
+ 1410              		.loc 1 2878 5 is_stmt 1 view .LVU471
+2878:Src/main.c    **** 				{
+ 1411              		.loc 1 2878 8 is_stmt 0 view .LVU472
+ 1412 00aa 002B     		cmp	r3, #0
+ 1413 00ac E1D0     		beq	.L65
+2884:Src/main.c    **** 				}
+ 1414              		.loc 1 2884 6 is_stmt 1 view .LVU473
+2884:Src/main.c    **** 				}
+ 1415              		.loc 1 2884 30 is_stmt 0 view .LVU474
+ 1416 00ae 04FB03F3 		mul	r3, r4, r3
+ 1417              	.LVL135:
+2884:Src/main.c    **** 				}
+ 1418              		.loc 1 2884 44 view .LVU475
+ 1419 00b2 93FBF2F3 		sdiv	r3, r3, r2
+ 1420 00b6 1B1A     		subs	r3, r3, r0
+ 1421              	.LVL136:
+2884:Src/main.c    **** 				}
+ 1422              		.loc 1 2884 44 view .LVU476
+ 1423 00b8 D8E7     		b	.L66
+ 1424              	.LVL137:
+ 1425              	.L77:
+2884:Src/main.c    **** 				}
+ 1426              		.loc 1 2884 44 view .LVU477
+ 1427              	.LBE393:
+ 1428              	.LBE395:
+ 1429              	.LBB396:
+2903:Src/main.c    **** 			if (span == 0)
+ 1430              		.loc 1 2903 13 discriminator 2 view .LVU478
+ 1431 00ba 0122     		movs	r2, #1
+ 1432 00bc D0E7     		b	.L68
+ 1433              	.LVL138:
+ 1434              	.L78:
+2903:Src/main.c    **** 			if (span == 0)
+ 1435              		.loc 1 2903 13 discriminator 2 view .LVU479
+ 1436              	.LBE396:
+ARM GAS  /tmp/ccEQxcUB.s 			page 157
 
 
-2753:Src/main.c    **** 	}
- 2102              		.loc 1 2753 6 view .LVU683
- 2103 007e 0024     		movs	r4, #0
- 2104              	.LVL226:
- 2105              	.L142:
-2756:Src/main.c    **** 	{
- 2106              		.loc 1 2756 2 is_stmt 1 view .LVU684
-2756:Src/main.c    **** 	{
- 2107              		.loc 1 2756 5 is_stmt 0 view .LVU685
- 2108 0080 27B1     		cbz	r7, .L143
-2756:Src/main.c    **** 	{
- 2109              		.loc 1 2756 17 discriminator 1 view .LVU686
- 2110 0082 019B     		ldr	r3, [sp, #4]
- 2111 0084 13F0010F 		tst	r3, #1
- 2112 0088 00D1     		bne	.L143
-2758:Src/main.c    **** 	}
- 2113              		.loc 1 2758 6 view .LVU687
- 2114 008a 0024     		movs	r4, #0
- 2115              	.LVL227:
- 2116              	.L143:
-2761:Src/main.c    **** 	{
- 2117              		.loc 1 2761 2 is_stmt 1 view .LVU688
-2761:Src/main.c    **** 	{
- 2118              		.loc 1 2761 6 is_stmt 0 view .LVU689
- 2119 008c 2720     		movs	r0, #39
- 2120              	.LVL228:
-2761:Src/main.c    **** 	{
- 2121              		.loc 1 2761 6 view .LVU690
- 2122 008e FFF7FEFF 		bl	AD9102_ReadReg
- 2123              	.LVL229:
-2761:Src/main.c    **** 	{
- 2124              		.loc 1 2761 5 discriminator 1 view .LVU691
- 2125 0092 43F21223 		movw	r3, #12818
- 2126 0096 9842     		cmp	r0, r3
- 2127 0098 00D0     		beq	.L144
-2763:Src/main.c    **** 	}
- 2128              		.loc 1 2763 6 view .LVU692
- 2129 009a 0024     		movs	r4, #0
- 2130              	.LVL230:
- 2131              	.L144:
-2765:Src/main.c    **** 	{
- 2132              		.loc 1 2765 2 is_stmt 1 view .LVU693
-2765:Src/main.c    **** 	{
- 2133              		.loc 1 2765 6 is_stmt 0 view .LVU694
- 2134 009c 2820     		movs	r0, #40
- 2135 009e FFF7FEFF 		bl	AD9102_ReadReg
- 2136              	.LVL231:
-2765:Src/main.c    **** 	{
- 2137              		.loc 1 2765 5 discriminator 1 view .LVU695
- 2138 00a2 B042     		cmp	r0, r6
- 2139 00a4 00D0     		beq	.L145
-2767:Src/main.c    **** 	}
- 2140              		.loc 1 2767 6 view .LVU696
- 2141 00a6 0024     		movs	r4, #0
- 2142              	.LVL232:
- 2143              	.L145:
-2769:Src/main.c    **** 	{
-ARM GAS  /tmp/ccwR4KB7.s 			page 168
+2916:Src/main.c    **** 		}
+ 1437              		.loc 1 2916 10 view .LVU480
+ 1438 00be 054B     		ldr	r3, .L83
+ 1439              	.LVL139:
+2916:Src/main.c    **** 		}
+ 1440              		.loc 1 2916 10 view .LVU481
+ 1441 00c0 DAE7     		b	.L69
+ 1442              	.LVL140:
+ 1443              	.L79:
+2920:Src/main.c    **** 		}
+ 1444              		.loc 1 2920 10 view .LVU482
+ 1445 00c2 41F6FF73 		movw	r3, #8191
+ 1446 00c6 D7E7     		b	.L69
+ 1447              	.LVL141:
+ 1448              	.L81:
+2920:Src/main.c    **** 		}
+ 1449              		.loc 1 2920 10 view .LVU483
+ 1450              	.LBE397:
+ 1451              	.LBE388:
+2929:Src/main.c    **** }
+ 1452              		.loc 1 2929 2 is_stmt 1 view .LVU484
+ 1453 00c8 0021     		movs	r1, #0
+ 1454 00ca 1E20     		movs	r0, #30
+ 1455 00cc FFF7FEFF 		bl	AD9102_WriteReg
+ 1456              	.LVL142:
+2930:Src/main.c    **** 
+ 1457              		.loc 1 2930 1 is_stmt 0 view .LVU485
+ 1458 00d0 F8BD     		pop	{r3, r4, r5, r6, r7, pc}
+ 1459              	.LVL143:
+ 1460              	.L84:
+2930:Src/main.c    **** 
+ 1461              		.loc 1 2930 1 view .LVU486
+ 1462 00d2 00BF     		.align	2
+ 1463              	.L83:
+ 1464 00d4 00E0FFFF 		.word	-8192
+ 1465              		.cfi_endproc
+ 1466              	.LFE1221:
+ 1468              		.section	.text.AD9102_Init,"ax",%progbits
+ 1469              		.align	1
+ 1470              		.syntax unified
+ 1471              		.thumb
+ 1472              		.thumb_func
+ 1474              	AD9102_Init:
+ 1475              	.LFB1212:
+2627:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ 1476              		.loc 1 2627 1 is_stmt 1 view -0
+ 1477              		.cfi_startproc
+ 1478              		@ args = 0, pretend = 0, frame = 8
+ 1479              		@ frame_needed = 0, uses_anonymous_args = 0
+ 1480 0000 00B5     		push	{lr}
+ 1481              	.LCFI12:
+ 1482              		.cfi_def_cfa_offset 4
+ 1483              		.cfi_offset 14, -4
+ 1484 0002 83B0     		sub	sp, sp, #12
+ 1485              	.LCFI13:
+ 1486              		.cfi_def_cfa_offset 16
+2628:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
+ARM GAS  /tmp/ccEQxcUB.s 			page 158
 
 
- 2144              		.loc 1 2769 2 is_stmt 1 view .LVU697
-2769:Src/main.c    **** 	{
- 2145              		.loc 1 2769 6 is_stmt 0 view .LVU698
- 2146 00a8 2920     		movs	r0, #41
- 2147 00aa FFF7FEFF 		bl	AD9102_ReadReg
- 2148              	.LVL233:
-2769:Src/main.c    **** 	{
- 2149              		.loc 1 2769 5 discriminator 1 view .LVU699
- 2150 00ae 5845     		cmp	r0, fp
- 2151 00b0 00D0     		beq	.L146
-2771:Src/main.c    **** 	}
- 2152              		.loc 1 2771 6 view .LVU700
- 2153 00b2 0024     		movs	r4, #0
- 2154              	.LVL234:
- 2155              	.L146:
-2773:Src/main.c    **** 	{
- 2156              		.loc 1 2773 2 is_stmt 1 view .LVU701
-2773:Src/main.c    **** 	{
- 2157              		.loc 1 2773 6 is_stmt 0 view .LVU702
- 2158 00b4 1F20     		movs	r0, #31
- 2159 00b6 FFF7FEFF 		bl	AD9102_ReadReg
- 2160              	.LVL235:
-2773:Src/main.c    **** 	{
- 2161              		.loc 1 2773 5 discriminator 1 view .LVU703
- 2162 00ba 00B1     		cbz	r0, .L147
-2775:Src/main.c    **** 	}
- 2163              		.loc 1 2775 6 view .LVU704
- 2164 00bc 0024     		movs	r4, #0
- 2165              	.LVL236:
- 2166              	.L147:
-2777:Src/main.c    **** 	{
- 2167              		.loc 1 2777 2 is_stmt 1 view .LVU705
-2777:Src/main.c    **** 	{
- 2168              		.loc 1 2777 6 is_stmt 0 view .LVU706
- 2169 00be 3720     		movs	r0, #55
- 2170 00c0 FFF7FEFF 		bl	AD9102_ReadReg
- 2171              	.LVL237:
-2777:Src/main.c    **** 	{
- 2172              		.loc 1 2777 5 discriminator 1 view .LVU707
- 2173 00c4 A842     		cmp	r0, r5
- 2174 00c6 00D0     		beq	.L148
-2779:Src/main.c    **** 	}
- 2175              		.loc 1 2779 6 view .LVU708
- 2176 00c8 0024     		movs	r4, #0
- 2177              	.LVL238:
- 2178              	.L148:
-2782:Src/main.c    **** }
- 2179              		.loc 1 2782 2 is_stmt 1 view .LVU709
-2783:Src/main.c    **** 
- 2180              		.loc 1 2783 1 is_stmt 0 view .LVU710
- 2181 00ca 84F00100 		eor	r0, r4, #1
- 2182 00ce 03B0     		add	sp, sp, #12
- 2183              	.LCFI22:
- 2184              		.cfi_remember_state
- 2185              		.cfi_def_cfa_offset 36
- 2186              		@ sp needed
- 2187 00d0 BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-ARM GAS  /tmp/ccwR4KB7.s 			page 169
+ 1487              		.loc 1 2628 2 view .LVU488
+ 1488 0004 0122     		movs	r2, #1
+ 1489 0006 4FF48051 		mov	r1, #4096
+ 1490 000a 1648     		ldr	r0, .L89
+ 1491 000c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1492              	.LVL144:
+2629:Src/main.c    **** 	for (volatile uint32_t d = 0; d < 1000; d++) {}
+ 1493              		.loc 1 2629 2 view .LVU489
+ 1494 0010 0022     		movs	r2, #0
+ 1495 0012 4021     		movs	r1, #64
+ 1496 0014 1448     		ldr	r0, .L89+4
+ 1497 0016 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1498              	.LVL145:
+2630:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 1499              		.loc 1 2630 2 view .LVU490
+ 1500              	.LBB398:
+2630:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 1501              		.loc 1 2630 7 view .LVU491
+2630:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 1502              		.loc 1 2630 25 is_stmt 0 view .LVU492
+ 1503 001a 0023     		movs	r3, #0
+ 1504 001c 0193     		str	r3, [sp, #4]
+2630:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 1505              		.loc 1 2630 2 view .LVU493
+ 1506 001e 02E0     		b	.L86
+ 1507              	.L87:
+2630:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 1508              		.loc 1 2630 48 is_stmt 1 discriminator 3 view .LVU494
+2630:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 1509              		.loc 1 2630 43 discriminator 3 view .LVU495
+ 1510 0020 019B     		ldr	r3, [sp, #4]
+ 1511 0022 0133     		adds	r3, r3, #1
+ 1512 0024 0193     		str	r3, [sp, #4]
+ 1513              	.L86:
+2630:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 1514              		.loc 1 2630 34 discriminator 1 view .LVU496
+ 1515 0026 019B     		ldr	r3, [sp, #4]
+ 1516 0028 B3F57A7F 		cmp	r3, #1000
+ 1517 002c F8D3     		bcc	.L87
+ 1518              	.LBE398:
+2631:Src/main.c    **** 
+ 1519              		.loc 1 2631 2 view .LVU497
+ 1520 002e 0122     		movs	r2, #1
+ 1521 0030 4021     		movs	r1, #64
+ 1522 0032 0D48     		ldr	r0, .L89+4
+ 1523 0034 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1524              	.LVL146:
+2633:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
+ 1525              		.loc 1 2633 2 view .LVU498
+ 1526 0038 4221     		movs	r1, #66
+ 1527 003a 0C48     		ldr	r0, .L89+8
+ 1528 003c FFF7FEFF 		bl	AD9102_WriteRegTable
+ 1529              	.LVL147:
+2634:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+ 1530              		.loc 1 2634 2 view .LVU499
+ 1531 0040 0021     		movs	r1, #0
+ 1532 0042 1E20     		movs	r0, #30
+ARM GAS  /tmp/ccEQxcUB.s 			page 159
 
 
- 2188              	.LVL239:
- 2189              	.L152:
- 2190              	.LCFI23:
- 2191              		.cfi_restore_state
-2735:Src/main.c    **** 	}
- 2192              		.loc 1 2735 6 view .LVU711
- 2193 00d4 0024     		movs	r4, #0
- 2194 00d6 C7E7     		b	.L139
- 2195              		.cfi_endproc
- 2196              	.LFE1218:
- 2198              		.section	.text.AD9102_ApplySram,"ax",%progbits
- 2199              		.align	1
- 2200              		.syntax unified
- 2201              		.thumb
- 2202              		.thumb_func
- 2204              	AD9102_ApplySram:
- 2205              	.LVL240:
- 2206              	.LFB1217:
-2638:Src/main.c    **** 	if (samples == 0u)
- 2207              		.loc 1 2638 1 is_stmt 1 view -0
- 2208              		.cfi_startproc
- 2209              		@ args = 0, pretend = 0, frame = 8
- 2210              		@ frame_needed = 0, uses_anonymous_args = 0
-2638:Src/main.c    **** 	if (samples == 0u)
- 2211              		.loc 1 2638 1 is_stmt 0 view .LVU713
- 2212 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
- 2213              	.LCFI24:
- 2214              		.cfi_def_cfa_offset 24
- 2215              		.cfi_offset 4, -24
- 2216              		.cfi_offset 5, -20
- 2217              		.cfi_offset 6, -16
- 2218              		.cfi_offset 7, -12
- 2219              		.cfi_offset 8, -8
- 2220              		.cfi_offset 14, -4
- 2221 0004 82B0     		sub	sp, sp, #8
- 2222              	.LCFI25:
- 2223              		.cfi_def_cfa_offset 32
- 2224 0006 0546     		mov	r5, r0
- 2225 0008 1E46     		mov	r6, r3
-2639:Src/main.c    **** 	{
- 2226              		.loc 1 2639 2 is_stmt 1 view .LVU714
-2639:Src/main.c    **** 	{
- 2227              		.loc 1 2639 5 is_stmt 0 view .LVU715
- 2228 000a 21B1     		cbz	r1, .L172
- 2229 000c 0C46     		mov	r4, r1
-2643:Src/main.c    **** 	{
- 2230              		.loc 1 2643 2 is_stmt 1 view .LVU716
-2643:Src/main.c    **** 	{
- 2231              		.loc 1 2643 5 is_stmt 0 view .LVU717
- 2232 000e 0129     		cmp	r1, #1
- 2233 0010 02D8     		bhi	.L164
-2645:Src/main.c    **** 	}
- 2234              		.loc 1 2645 11 view .LVU718
- 2235 0012 0224     		movs	r4, #2
- 2236 0014 03E0     		b	.L165
- 2237              	.L172:
-2641:Src/main.c    **** 	}
-ARM GAS  /tmp/ccwR4KB7.s 			page 170
+ 1533 0044 FFF7FEFF 		bl	AD9102_WriteReg
+ 1534              	.LVL148:
+2635:Src/main.c    **** 	HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ 1535              		.loc 1 2635 2 view .LVU500
+ 1536 0048 0121     		movs	r1, #1
+ 1537 004a 1D20     		movs	r0, #29
+ 1538 004c FFF7FEFF 		bl	AD9102_WriteReg
+ 1539              	.LVL149:
+2636:Src/main.c    **** }
+ 1540              		.loc 1 2636 2 view .LVU501
+ 1541 0050 0122     		movs	r2, #1
+ 1542 0052 4FF40061 		mov	r1, #2048
+ 1543 0056 0648     		ldr	r0, .L89+12
+ 1544 0058 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1545              	.LVL150:
+2637:Src/main.c    **** 
+ 1546              		.loc 1 2637 1 is_stmt 0 view .LVU502
+ 1547 005c 03B0     		add	sp, sp, #12
+ 1548              	.LCFI14:
+ 1549              		.cfi_def_cfa_offset 4
+ 1550              		@ sp needed
+ 1551 005e 5DF804FB 		ldr	pc, [sp], #4
+ 1552              	.L90:
+ 1553 0062 00BF     		.align	2
+ 1554              	.L89:
+ 1555 0064 00040240 		.word	1073873920
+ 1556 0068 00080240 		.word	1073874944
+ 1557 006c 00000000 		.word	ad9102_example4_regval
+ 1558 0070 000C0240 		.word	1073875968
+ 1559              		.cfi_endproc
+ 1560              	.LFE1212:
+ 1562              		.section	.text.AD9102_ReadReg,"ax",%progbits
+ 1563              		.align	1
+ 1564              		.syntax unified
+ 1565              		.thumb
+ 1566              		.thumb_func
+ 1568              	AD9102_ReadReg:
+ 1569              	.LVL151:
+ 1570              	.LFB1218:
+2758:Src/main.c    **** 	uint32_t tmp32 = 0;
+ 1571              		.loc 1 2758 1 is_stmt 1 view -0
+ 1572              		.cfi_startproc
+ 1573              		@ args = 0, pretend = 0, frame = 0
+ 1574              		@ frame_needed = 0, uses_anonymous_args = 0
+2758:Src/main.c    **** 	uint32_t tmp32 = 0;
+ 1575              		.loc 1 2758 1 is_stmt 0 view .LVU504
+ 1576 0000 10B5     		push	{r4, lr}
+ 1577              	.LCFI15:
+ 1578              		.cfi_def_cfa_offset 8
+ 1579              		.cfi_offset 4, -8
+ 1580              		.cfi_offset 14, -4
+2759:Src/main.c    **** 	uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
+ 1581              		.loc 1 2759 2 is_stmt 1 view .LVU505
+ 1582              	.LVL152:
+2760:Src/main.c    **** 	uint16_t value;
+ 1583              		.loc 1 2760 2 view .LVU506
+2760:Src/main.c    **** 	uint16_t value;
+ARM GAS  /tmp/ccEQxcUB.s 			page 160
 
 
- 2238              		.loc 1 2641 11 view .LVU719
- 2239 0016 1024     		movs	r4, #16
- 2240              	.L164:
- 2241              	.LVL241:
-2647:Src/main.c    **** 	{
- 2242              		.loc 1 2647 2 is_stmt 1 view .LVU720
-2647:Src/main.c    **** 	{
- 2243              		.loc 1 2647 5 is_stmt 0 view .LVU721
- 2244 0018 B4F5805F 		cmp	r4, #4096
- 2245 001c 04D8     		bhi	.L174
+ 1584              		.loc 1 2760 11 is_stmt 0 view .LVU507
+ 1585 0002 40F40044 		orr	r4, r0, #32768
+ 1586              	.LVL153:
+2761:Src/main.c    **** 
+ 1587              		.loc 1 2761 2 is_stmt 1 view .LVU508
+2763:Src/main.c    **** 
+ 1588              		.loc 1 2763 2 view .LVU509
+ 1589 0006 0021     		movs	r1, #0
+ 1590 0008 0846     		mov	r0, r1
+ 1591              	.LVL154:
+2763:Src/main.c    **** 
+ 1592              		.loc 1 2763 2 is_stmt 0 view .LVU510
+ 1593 000a FFF7FEFF 		bl	SPI2_SetMode
+ 1594              	.LVL155:
+2765:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+ 1595              		.loc 1 2765 2 is_stmt 1 view .LVU511
+ 1596 000e 0122     		movs	r2, #1
+ 1597 0010 4FF48041 		mov	r1, #16384
+ 1598 0014 2C48     		ldr	r0, .L106
+ 1599 0016 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1600              	.LVL156:
+2766:Src/main.c    **** 
+ 1601              		.loc 1 2766 2 view .LVU512
+ 1602 001a 0122     		movs	r2, #1
+ 1603 001c 4FF48051 		mov	r1, #4096
+ 1604 0020 2A48     		ldr	r0, .L106+4
+ 1605 0022 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1606              	.LVL157:
+2768:Src/main.c    **** 	{
+ 1607              		.loc 1 2768 2 view .LVU513
+ 1608              	.LBB399:
+ 1609              	.LBI399:
+ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1610              		.loc 4 381 26 view .LVU514
+ 1611              	.LBB400:
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1612              		.loc 4 383 3 view .LVU515
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1613              		.loc 4 383 12 is_stmt 0 view .LVU516
+ 1614 0026 2A4B     		ldr	r3, .L106+8
+ 1615 0028 1B68     		ldr	r3, [r3]
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1616              		.loc 4 383 69 view .LVU517
+ 1617 002a 13F0400F 		tst	r3, #64
+ 1618 002e 04D1     		bne	.L92
+ 1619              	.LVL158:
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1620              		.loc 4 383 69 view .LVU518
+ 1621              	.LBE400:
+ 1622              	.LBE399:
+2770:Src/main.c    **** 	}
+ 1623              		.loc 1 2770 3 is_stmt 1 view .LVU519
+ 1624              	.LBB401:
+ 1625              	.LBI401:
+ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1626              		.loc 4 358 22 view .LVU520
+ 1627              	.LBB402:
+ARM GAS  /tmp/ccEQxcUB.s 			page 161
+
+
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1628              		.loc 4 360 3 view .LVU521
+ 1629 0030 274A     		ldr	r2, .L106+8
+ 1630 0032 1368     		ldr	r3, [r2]
+ 1631 0034 43F04003 		orr	r3, r3, #64
+ 1632 0038 1360     		str	r3, [r2]
+ 1633              	.LVL159:
+ 1634              	.L92:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1635              		.loc 4 360 3 is_stmt 0 view .LVU522
+ 1636              	.LBE402:
+ 1637              	.LBE401:
+2773:Src/main.c    **** 
+ 1638              		.loc 1 2773 2 is_stmt 1 view .LVU523
+ 1639 003a 0022     		movs	r2, #0
+ 1640 003c 4FF48051 		mov	r1, #4096
+ 1641 0040 2148     		ldr	r0, .L106
+ 1642 0042 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1643              	.LVL160:
+2775:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 1644              		.loc 1 2775 2 view .LVU524
+2759:Src/main.c    **** 	uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
+ 1645              		.loc 1 2759 11 is_stmt 0 view .LVU525
+ 1646 0046 0023     		movs	r3, #0
+ 1647              	.LVL161:
+ 1648              	.L94:
+2775:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 1649              		.loc 1 2775 63 is_stmt 1 discriminator 2 view .LVU526
+2775:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 1650              		.loc 1 2775 41 discriminator 2 view .LVU527
+ 1651              	.LBB403:
+ 1652              	.LBI403:
+ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1653              		.loc 4 916 26 view .LVU528
+ 1654              	.LBB404:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1655              		.loc 4 918 3 view .LVU529
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1656              		.loc 4 918 12 is_stmt 0 view .LVU530
+ 1657 0048 214A     		ldr	r2, .L106+8
+ 1658 004a 9268     		ldr	r2, [r2, #8]
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1659              		.loc 4 918 66 view .LVU531
+ 1660 004c 12F0020F 		tst	r2, #2
+ 1661 0050 05D1     		bne	.L93
+ 1662              	.LVL162:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1663              		.loc 4 918 66 view .LVU532
+ 1664              	.LBE404:
+ 1665              	.LBE403:
+2775:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 1666              		.loc 1 2775 50 discriminator 1 view .LVU533
+ 1667 0052 5A1C     		adds	r2, r3, #1
+ 1668              	.LVL163:
+2775:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 1669              		.loc 1 2775 41 discriminator 1 view .LVU534
+ 1670 0054 B3F57A7F 		cmp	r3, #1000
+ARM GAS  /tmp/ccEQxcUB.s 			page 162
+
+
+ 1671 0058 01D2     		bcs	.L93
+2775:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, cmd);
+ 1672              		.loc 1 2775 50 discriminator 1 view .LVU535
+ 1673 005a 1346     		mov	r3, r2
+ 1674 005c F4E7     		b	.L94
+ 1675              	.LVL164:
+ 1676              	.L93:
+2776:Src/main.c    **** 	tmp32 = 0;
+ 1677              		.loc 1 2776 2 is_stmt 1 view .LVU536
+ 1678              	.LBB405:
+ 1679              	.LBI405:
+1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1680              		.loc 4 1373 22 view .LVU537
+ 1681              	.LBB406:
+1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
+ 1682              		.loc 4 1376 3 view .LVU538
+ 1683              		.loc 4 1377 3 view .LVU539
+ 1684              		.loc 4 1377 10 is_stmt 0 view .LVU540
+ 1685 005e 1C4B     		ldr	r3, .L106+8
+ 1686 0060 9C81     		strh	r4, [r3, #12]	@ movhi
+ 1687              	.LVL165:
+ 1688              		.loc 4 1377 10 view .LVU541
+ 1689              	.LBE406:
+ 1690              	.LBE405:
+2777:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 1691              		.loc 1 2777 2 is_stmt 1 view .LVU542
+2778:Src/main.c    **** 	(void) SPI2->DR;
+ 1692              		.loc 1 2778 2 view .LVU543
+2777:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 1693              		.loc 1 2777 8 is_stmt 0 view .LVU544
+ 1694 0062 0023     		movs	r3, #0
+ 1695              	.LVL166:
+ 1696              	.L96:
+2778:Src/main.c    **** 	(void) SPI2->DR;
+ 1697              		.loc 1 2778 64 is_stmt 1 discriminator 2 view .LVU545
+2778:Src/main.c    **** 	(void) SPI2->DR;
+ 1698              		.loc 1 2778 42 discriminator 2 view .LVU546
+ 1699              	.LBB407:
+ 1700              	.LBI407:
+ 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1701              		.loc 4 905 26 view .LVU547
+ 1702              	.LBB408:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1703              		.loc 4 907 3 view .LVU548
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1704              		.loc 4 907 12 is_stmt 0 view .LVU549
+ 1705 0064 1A4A     		ldr	r2, .L106+8
+ 1706 0066 9268     		ldr	r2, [r2, #8]
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1707              		.loc 4 907 68 view .LVU550
+ 1708 0068 12F0010F 		tst	r2, #1
+ 1709 006c 05D1     		bne	.L95
+ 1710              	.LVL167:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1711              		.loc 4 907 68 view .LVU551
+ 1712              	.LBE408:
+ 1713              	.LBE407:
+ARM GAS  /tmp/ccEQxcUB.s 			page 163
+
+
+2778:Src/main.c    **** 	(void) SPI2->DR;
+ 1714              		.loc 1 2778 51 discriminator 1 view .LVU552
+ 1715 006e 5A1C     		adds	r2, r3, #1
+ 1716              	.LVL168:
+2778:Src/main.c    **** 	(void) SPI2->DR;
+ 1717              		.loc 1 2778 42 discriminator 1 view .LVU553
+ 1718 0070 B3F57A7F 		cmp	r3, #1000
+ 1719 0074 01D2     		bcs	.L95
+2778:Src/main.c    **** 	(void) SPI2->DR;
+ 1720              		.loc 1 2778 51 discriminator 1 view .LVU554
+ 1721 0076 1346     		mov	r3, r2
+ 1722 0078 F4E7     		b	.L96
+ 1723              	.LVL169:
+ 1724              	.L95:
+2779:Src/main.c    **** 
+ 1725              		.loc 1 2779 2 is_stmt 1 view .LVU555
+ 1726 007a 154B     		ldr	r3, .L106+8
+ 1727 007c DB68     		ldr	r3, [r3, #12]
+2781:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+ 1728              		.loc 1 2781 2 view .LVU556
+ 1729              	.LVL170:
+2782:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
+ 1730              		.loc 1 2782 2 view .LVU557
+2781:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
+ 1731              		.loc 1 2781 8 is_stmt 0 view .LVU558
+ 1732 007e 0023     		movs	r3, #0
+ 1733              	.LVL171:
+ 1734              	.L98:
+2782:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
+ 1735              		.loc 1 2782 63 is_stmt 1 discriminator 2 view .LVU559
+2782:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
+ 1736              		.loc 1 2782 41 discriminator 2 view .LVU560
+ 1737              	.LBB409:
+ 1738              	.LBI409:
+ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1739              		.loc 4 916 26 view .LVU561
+ 1740              	.LBB410:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1741              		.loc 4 918 3 view .LVU562
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1742              		.loc 4 918 12 is_stmt 0 view .LVU563
+ 1743 0080 134A     		ldr	r2, .L106+8
+ 1744 0082 9268     		ldr	r2, [r2, #8]
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1745              		.loc 4 918 66 view .LVU564
+ 1746 0084 12F0020F 		tst	r2, #2
+ 1747 0088 05D1     		bne	.L97
+ 1748              	.LVL172:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1749              		.loc 4 918 66 view .LVU565
+ 1750              	.LBE410:
+ 1751              	.LBE409:
+2782:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
+ 1752              		.loc 1 2782 50 discriminator 1 view .LVU566
+ 1753 008a 5A1C     		adds	r2, r3, #1
+ 1754              	.LVL173:
+2782:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
+ARM GAS  /tmp/ccEQxcUB.s 			page 164
+
+
+ 1755              		.loc 1 2782 41 discriminator 1 view .LVU567
+ 1756 008c B3F57A7F 		cmp	r3, #1000
+ 1757 0090 01D2     		bcs	.L97
+2782:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, 0x0000u);
+ 1758              		.loc 1 2782 50 discriminator 1 view .LVU568
+ 1759 0092 1346     		mov	r3, r2
+ 1760 0094 F4E7     		b	.L98
+ 1761              	.LVL174:
+ 1762              	.L97:
+2783:Src/main.c    **** 	tmp32 = 0;
+ 1763              		.loc 1 2783 2 is_stmt 1 view .LVU569
+ 1764              	.LBB411:
+ 1765              	.LBI411:
+1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1766              		.loc 4 1373 22 view .LVU570
+ 1767              	.LBB412:
+1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
+ 1768              		.loc 4 1376 3 view .LVU571
+ 1769              		.loc 4 1377 3 view .LVU572
+ 1770              		.loc 4 1377 10 is_stmt 0 view .LVU573
+ 1771 0096 0023     		movs	r3, #0
+ 1772 0098 0D4A     		ldr	r2, .L106+8
+ 1773 009a 9381     		strh	r3, [r2, #12]	@ movhi
+ 1774              	.LVL175:
+ 1775              		.loc 4 1377 10 view .LVU574
+ 1776              	.LBE412:
+ 1777              	.LBE411:
+2784:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 1778              		.loc 1 2784 2 is_stmt 1 view .LVU575
+2785:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
+ 1779              		.loc 1 2785 2 view .LVU576
+ 1780              	.L100:
+2785:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
+ 1781              		.loc 1 2785 64 discriminator 2 view .LVU577
+2785:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
+ 1782              		.loc 1 2785 42 discriminator 2 view .LVU578
+ 1783              	.LBB413:
+ 1784              	.LBI413:
+ 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1785              		.loc 4 905 26 view .LVU579
+ 1786              	.LBB414:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1787              		.loc 4 907 3 view .LVU580
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1788              		.loc 4 907 12 is_stmt 0 view .LVU581
+ 1789 009c 0C4A     		ldr	r2, .L106+8
+ 1790 009e 9268     		ldr	r2, [r2, #8]
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1791              		.loc 4 907 68 view .LVU582
+ 1792 00a0 12F0010F 		tst	r2, #1
+ 1793 00a4 05D1     		bne	.L99
+ 1794              	.LVL176:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1795              		.loc 4 907 68 view .LVU583
+ 1796              	.LBE414:
+ 1797              	.LBE413:
+2785:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
+ARM GAS  /tmp/ccEQxcUB.s 			page 165
+
+
+ 1798              		.loc 1 2785 51 discriminator 1 view .LVU584
+ 1799 00a6 5A1C     		adds	r2, r3, #1
+ 1800              	.LVL177:
+2785:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
+ 1801              		.loc 1 2785 42 discriminator 1 view .LVU585
+ 1802 00a8 B3F57A7F 		cmp	r3, #1000
+ 1803 00ac 01D2     		bcs	.L99
+2785:Src/main.c    **** 	value = LL_SPI_ReceiveData16(SPI2);
+ 1804              		.loc 1 2785 51 discriminator 1 view .LVU586
+ 1805 00ae 1346     		mov	r3, r2
+ 1806 00b0 F4E7     		b	.L100
+ 1807              	.LVL178:
+ 1808              	.L99:
+2786:Src/main.c    **** 
+ 1809              		.loc 1 2786 2 is_stmt 1 view .LVU587
+ 1810              	.LBB415:
+ 1811              	.LBI415:
+1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 1812              		.loc 4 1344 26 view .LVU588
+ 1813              	.LBB416:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1814              		.loc 4 1346 3 view .LVU589
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1815              		.loc 4 1346 21 is_stmt 0 view .LVU590
+ 1816 00b2 074B     		ldr	r3, .L106+8
+ 1817 00b4 DC68     		ldr	r4, [r3, #12]
+ 1818              	.LVL179:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1819              		.loc 4 1346 10 view .LVU591
+ 1820 00b6 A4B2     		uxth	r4, r4
+ 1821              	.LVL180:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 1822              		.loc 4 1346 10 view .LVU592
+ 1823              	.LBE416:
+ 1824              	.LBE415:
+2788:Src/main.c    **** 	return value;
+ 1825              		.loc 1 2788 2 is_stmt 1 view .LVU593
+ 1826 00b8 0122     		movs	r2, #1
+ 1827 00ba 4FF48051 		mov	r1, #4096
+ 1828 00be 0248     		ldr	r0, .L106
+ 1829 00c0 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 1830              	.LVL181:
+2789:Src/main.c    **** }
+ 1831              		.loc 1 2789 2 view .LVU594
+2790:Src/main.c    **** 
+ 1832              		.loc 1 2790 1 is_stmt 0 view .LVU595
+ 1833 00c4 2046     		mov	r0, r4
+ 1834 00c6 10BD     		pop	{r4, pc}
+ 1835              	.LVL182:
+ 1836              	.L107:
+2790:Src/main.c    **** 
+ 1837              		.loc 1 2790 1 view .LVU596
+ 1838              		.align	2
+ 1839              	.L106:
+ 1840 00c8 00040240 		.word	1073873920
+ 1841 00cc 000C0240 		.word	1073875968
+ 1842 00d0 00380040 		.word	1073756160
+ARM GAS  /tmp/ccEQxcUB.s 			page 166
+
+
+ 1843              		.cfi_endproc
+ 1844              	.LFE1218:
+ 1846              		.section	.text.AD9102_CheckFlagsSram,"ax",%progbits
+ 1847              		.align	1
+ 1848              		.syntax unified
+ 1849              		.thumb
+ 1850              		.thumb_func
+ 1852              	AD9102_CheckFlagsSram:
+ 1853              	.LVL183:
+ 1854              	.LFB1224:
+3086:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
+ 1855              		.loc 1 3086 1 is_stmt 1 view -0
+ 1856              		.cfi_startproc
+ 1857              		@ args = 0, pretend = 0, frame = 8
+ 1858              		@ frame_needed = 0, uses_anonymous_args = 0
+3086:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
+ 1859              		.loc 1 3086 1 is_stmt 0 view .LVU598
+ 1860 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+ 1861              	.LCFI16:
+ 1862              		.cfi_def_cfa_offset 36
+ 1863              		.cfi_offset 4, -36
+ 1864              		.cfi_offset 5, -32
+ 1865              		.cfi_offset 6, -28
+ 1866              		.cfi_offset 7, -24
+ 1867              		.cfi_offset 8, -20
+ 1868              		.cfi_offset 9, -16
+ 1869              		.cfi_offset 10, -12
+ 1870              		.cfi_offset 11, -8
+ 1871              		.cfi_offset 14, -4
+ 1872 0004 83B0     		sub	sp, sp, #12
+ 1873              	.LCFI17:
+ 1874              		.cfi_def_cfa_offset 48
+ 1875 0006 8346     		mov	fp, r0
+ 1876 0008 0F46     		mov	r7, r1
+ 1877 000a 1446     		mov	r4, r2
+ 1878 000c 1D46     		mov	r5, r3
+3087:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 1879              		.loc 1 3087 2 is_stmt 1 view .LVU599
+3087:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 1880              		.loc 1 3087 23 is_stmt 0 view .LVU600
+ 1881 000e 0020     		movs	r0, #0
+ 1882              	.LVL184:
+3087:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 1883              		.loc 1 3087 23 view .LVU601
+ 1884 0010 FFF7FEFF 		bl	AD9102_ReadReg
+ 1885              	.LVL185:
+3087:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 1886              		.loc 1 3087 23 view .LVU602
+ 1887 0014 8246     		mov	r10, r0
+ 1888              	.LVL186:
+3088:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
+ 1889              		.loc 1 3088 2 is_stmt 1 view .LVU603
+3088:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
+ 1890              		.loc 1 3088 22 is_stmt 0 view .LVU604
+ 1891 0016 0120     		movs	r0, #1
+ 1892 0018 FFF7FEFF 		bl	AD9102_ReadReg
+ 1893              	.LVL187:
+ARM GAS  /tmp/ccEQxcUB.s 			page 167
+
+
+ 1894 001c 8146     		mov	r9, r0
+ 1895              	.LVL188:
+3089:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
+ 1896              		.loc 1 3089 2 is_stmt 1 view .LVU605
+3089:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
+ 1897              		.loc 1 3089 22 is_stmt 0 view .LVU606
+ 1898 001e 0220     		movs	r0, #2
+ 1899 0020 FFF7FEFF 		bl	AD9102_ReadReg
+ 1900              	.LVL189:
+ 1901 0024 8046     		mov	r8, r0
+ 1902              	.LVL190:
+3090:Src/main.c    **** 
+ 1903              		.loc 1 3090 2 is_stmt 1 view .LVU607
+3090:Src/main.c    **** 
+ 1904              		.loc 1 3090 21 is_stmt 0 view .LVU608
+ 1905 0026 6020     		movs	r0, #96
+ 1906 0028 FFF7FEFF 		bl	AD9102_ReadReg
+ 1907              	.LVL191:
+3092:Src/main.c    **** 	{
+ 1908              		.loc 1 3092 2 is_stmt 1 view .LVU609
+3092:Src/main.c    **** 	{
+ 1909              		.loc 1 3092 5 is_stmt 0 view .LVU610
+ 1910 002c 1CB1     		cbz	r4, .L125
+3096:Src/main.c    **** 	{
+ 1911              		.loc 1 3096 2 is_stmt 1 view .LVU611
+3096:Src/main.c    **** 	{
+ 1912              		.loc 1 3096 5 is_stmt 0 view .LVU612
+ 1913 002e 012C     		cmp	r4, #1
+ 1914 0030 02D8     		bhi	.L109
+3098:Src/main.c    **** 	}
+ 1915              		.loc 1 3098 11 view .LVU613
+ 1916 0032 0224     		movs	r4, #2
+ 1917              	.LVL192:
+3098:Src/main.c    **** 	}
+ 1918              		.loc 1 3098 11 view .LVU614
+ 1919 0034 03E0     		b	.L110
+ 1920              	.LVL193:
+ 1921              	.L125:
+3094:Src/main.c    **** 	}
+ 1922              		.loc 1 3094 11 view .LVU615
+ 1923 0036 1024     		movs	r4, #16
+ 1924              	.LVL194:
+ 1925              	.L109:
+3100:Src/main.c    **** 	{
+ 1926              		.loc 1 3100 2 is_stmt 1 view .LVU616
+3100:Src/main.c    **** 	{
+ 1927              		.loc 1 3100 5 is_stmt 0 view .LVU617
+ 1928 0038 B4F5805F 		cmp	r4, #4096
+ 1929 003c 04D8     		bhi	.L127
+ 1930              	.LVL195:
+ 1931              	.L110:
+3104:Src/main.c    **** 	{
+ 1932              		.loc 1 3104 2 is_stmt 1 view .LVU618
+3104:Src/main.c    **** 	{
+ 1933              		.loc 1 3104 5 is_stmt 0 view .LVU619
+ 1934 003e 35B1     		cbz	r5, .L128
+3108:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 168
+
+
+ 1935              		.loc 1 3108 2 is_stmt 1 view .LVU620
+3108:Src/main.c    **** 	{
+ 1936              		.loc 1 3108 5 is_stmt 0 view .LVU621
+ 1937 0040 0F2D     		cmp	r5, #15
+ 1938 0042 05D9     		bls	.L111
+3110:Src/main.c    **** 	}
+ 1939              		.loc 1 3110 8 view .LVU622
+ 1940 0044 0F25     		movs	r5, #15
+ 1941              	.LVL196:
+3110:Src/main.c    **** 	}
+ 1942              		.loc 1 3110 8 view .LVU623
+ 1943 0046 03E0     		b	.L111
+ 1944              	.LVL197:
+ 1945              	.L127:
+3102:Src/main.c    **** 	}
+ 1946              		.loc 1 3102 11 view .LVU624
+ 1947 0048 4FF48054 		mov	r4, #4096
+ 1948              	.LVL198:
+3102:Src/main.c    **** 	}
+ 1949              		.loc 1 3102 11 view .LVU625
+ 1950 004c F7E7     		b	.L110
+ 1951              	.LVL199:
+ 1952              	.L128:
+3106:Src/main.c    **** 	}
+ 1953              		.loc 1 3106 8 view .LVU626
+ 1954 004e 0125     		movs	r5, #1
+ 1955              	.LVL200:
+ 1956              	.L111:
+3113:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ 1957              		.loc 1 3113 2 is_stmt 1 view .LVU627
+3113:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ 1958              		.loc 1 3113 63 is_stmt 0 view .LVU628
+ 1959 0050 2E02     		lsls	r6, r5, #8
+ 1960 0052 06F47066 		and	r6, r6, #3840
+3113:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ 1961              		.loc 1 3113 11 view .LVU629
+ 1962 0056 46F01106 		orr	r6, r6, #17
+ 1963              	.LVL201:
+3116:Src/main.c    **** 	if (pat_period == 0u)
+ 1964              		.loc 1 3116 2 is_stmt 1 view .LVU630
+3116:Src/main.c    **** 	if (pat_period == 0u)
+ 1965              		.loc 1 3116 24 is_stmt 0 view .LVU631
+ 1966 005a 0194     		str	r4, [sp, #4]
+3116:Src/main.c    **** 	if (pat_period == 0u)
+ 1967              		.loc 1 3116 44 view .LVU632
+ 1968 005c 05F00F05 		and	r5, r5, #15
+ 1969              	.LVL202:
+3116:Src/main.c    **** 	if (pat_period == 0u)
+ 1970              		.loc 1 3116 11 view .LVU633
+ 1971 0060 04FB05F5 		mul	r5, r4, r5
+ 1972              	.LVL203:
+3117:Src/main.c    **** 	{
+ 1973              		.loc 1 3117 2 is_stmt 1 view .LVU634
+3117:Src/main.c    **** 	{
+ 1974              		.loc 1 3117 5 is_stmt 0 view .LVU635
+ 1975 0064 1DB1     		cbz	r5, .L112
+3121:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 169
+
+
+ 1976              		.loc 1 3121 2 is_stmt 1 view .LVU636
+3121:Src/main.c    **** 	{
+ 1977              		.loc 1 3121 5 is_stmt 0 view .LVU637
+ 1978 0066 B5F5803F 		cmp	r5, #65536
+ 1979 006a 4CD2     		bcs	.L130
+ 1980 006c 0195     		str	r5, [sp, #4]
+ 1981              	.L112:
+ 1982              	.LVL204:
+3126:Src/main.c    **** 
+ 1983              		.loc 1 3126 2 is_stmt 1 view .LVU638
+3126:Src/main.c    **** 
+ 1984              		.loc 1 3126 43 is_stmt 0 view .LVU639
+ 1985 006e 013C     		subs	r4, r4, #1
+ 1986              	.LVL205:
+3126:Src/main.c    **** 
+ 1987              		.loc 1 3126 43 view .LVU640
+ 1988 0070 A4B2     		uxth	r4, r4
+3126:Src/main.c    **** 
+ 1989              		.loc 1 3126 11 view .LVU641
+ 1990 0072 2401     		lsls	r4, r4, #4
+ 1991 0074 A4B2     		uxth	r4, r4
+ 1992              	.LVL206:
+3128:Src/main.c    **** 
+ 1993              		.loc 1 3128 2 is_stmt 1 view .LVU642
+3130:Src/main.c    **** 	{
+ 1994              		.loc 1 3130 2 view .LVU643
+3130:Src/main.c    **** 	{
+ 1995              		.loc 1 3130 5 is_stmt 0 view .LVU644
+ 1996 0076 BAF1000F 		cmp	r10, #0
+ 1997 007a 48D1     		bne	.L131
+3128:Src/main.c    **** 
+ 1998              		.loc 1 3128 10 view .LVU645
+ 1999 007c 0125     		movs	r5, #1
+ 2000              	.L113:
+ 2001              	.LVL207:
+3134:Src/main.c    **** 	{
+ 2002              		.loc 1 3134 2 is_stmt 1 view .LVU646
+3134:Src/main.c    **** 	{
+ 2003              		.loc 1 3134 5 is_stmt 0 view .LVU647
+ 2004 007e 19F4F47F 		tst	r9, #488
+ 2005 0082 00D0     		beq	.L114
+3136:Src/main.c    **** 	}
+ 2006              		.loc 1 3136 6 view .LVU648
+ 2007 0084 0025     		movs	r5, #0
+ 2008              	.LVL208:
+ 2009              	.L114:
+3138:Src/main.c    **** 	{
+ 2010              		.loc 1 3138 2 is_stmt 1 view .LVU649
+3138:Src/main.c    **** 	{
+ 2011              		.loc 1 3138 5 is_stmt 0 view .LVU650
+ 2012 0086 18F40E6F 		tst	r8, #2272
+ 2013 008a 00D0     		beq	.L115
+3140:Src/main.c    **** 	}
+ 2014              		.loc 1 3140 6 view .LVU651
+ 2015 008c 0025     		movs	r5, #0
+ 2016              	.LVL209:
+ 2017              	.L115:
+ARM GAS  /tmp/ccEQxcUB.s 			page 170
+
+
+3142:Src/main.c    **** 	{
+ 2018              		.loc 1 3142 2 is_stmt 1 view .LVU652
+3142:Src/main.c    **** 	{
+ 2019              		.loc 1 3142 5 is_stmt 0 view .LVU653
+ 2020 008e 10F03F0F 		tst	r0, #63
+ 2021 0092 00D0     		beq	.L116
+3144:Src/main.c    **** 	}
+ 2022              		.loc 1 3144 6 view .LVU654
+ 2023 0094 0025     		movs	r5, #0
+ 2024              	.LVL210:
+ 2025              	.L116:
+3146:Src/main.c    **** 	{
+ 2026              		.loc 1 3146 2 is_stmt 1 view .LVU655
+3146:Src/main.c    **** 	{
+ 2027              		.loc 1 3146 5 is_stmt 0 view .LVU656
+ 2028 0096 1FB1     		cbz	r7, .L117
+3146:Src/main.c    **** 	{
+ 2029              		.loc 1 3146 17 discriminator 1 view .LVU657
+ 2030 0098 1BF0010F 		tst	fp, #1
+ 2031 009c 00D1     		bne	.L117
+3148:Src/main.c    **** 	}
+ 2032              		.loc 1 3148 6 view .LVU658
+ 2033 009e 0025     		movs	r5, #0
+ 2034              	.LVL211:
+ 2035              	.L117:
+3151:Src/main.c    **** 	{
+ 2036              		.loc 1 3151 2 is_stmt 1 view .LVU659
+3151:Src/main.c    **** 	{
+ 2037              		.loc 1 3151 6 is_stmt 0 view .LVU660
+ 2038 00a0 2720     		movs	r0, #39
+ 2039              	.LVL212:
+3151:Src/main.c    **** 	{
+ 2040              		.loc 1 3151 6 view .LVU661
+ 2041 00a2 FFF7FEFF 		bl	AD9102_ReadReg
+ 2042              	.LVL213:
+3151:Src/main.c    **** 	{
+ 2043              		.loc 1 3151 5 discriminator 1 view .LVU662
+ 2044 00a6 43F23003 		movw	r3, #12336
+ 2045 00aa 9842     		cmp	r0, r3
+ 2046 00ac 00D0     		beq	.L118
+3153:Src/main.c    **** 	}
+ 2047              		.loc 1 3153 6 view .LVU663
+ 2048 00ae 0025     		movs	r5, #0
+ 2049              	.LVL214:
+ 2050              	.L118:
+3155:Src/main.c    **** 	{
+ 2051              		.loc 1 3155 2 is_stmt 1 view .LVU664
+3155:Src/main.c    **** 	{
+ 2052              		.loc 1 3155 6 is_stmt 0 view .LVU665
+ 2053 00b0 2820     		movs	r0, #40
+ 2054 00b2 FFF7FEFF 		bl	AD9102_ReadReg
+ 2055              	.LVL215:
+3155:Src/main.c    **** 	{
+ 2056              		.loc 1 3155 5 discriminator 1 view .LVU666
+ 2057 00b6 B042     		cmp	r0, r6
+ 2058 00b8 00D0     		beq	.L119
+3157:Src/main.c    **** 	}
+ARM GAS  /tmp/ccEQxcUB.s 			page 171
+
+
+ 2059              		.loc 1 3157 6 view .LVU667
+ 2060 00ba 0025     		movs	r5, #0
+ 2061              	.LVL216:
+ 2062              	.L119:
+3159:Src/main.c    **** 	{
+ 2063              		.loc 1 3159 2 is_stmt 1 view .LVU668
+3159:Src/main.c    **** 	{
+ 2064              		.loc 1 3159 6 is_stmt 0 view .LVU669
+ 2065 00bc 2920     		movs	r0, #41
+ 2066 00be FFF7FEFF 		bl	AD9102_ReadReg
+ 2067              	.LVL217:
+3159:Src/main.c    **** 	{
+ 2068              		.loc 1 3159 44 discriminator 1 view .LVU670
+ 2069 00c2 BDF80430 		ldrh	r3, [sp, #4]
+3159:Src/main.c    **** 	{
+ 2070              		.loc 1 3159 5 discriminator 1 view .LVU671
+ 2071 00c6 9842     		cmp	r0, r3
+ 2072 00c8 00D0     		beq	.L120
+3161:Src/main.c    **** 	}
+ 2073              		.loc 1 3161 6 view .LVU672
+ 2074 00ca 0025     		movs	r5, #0
+ 2075              	.LVL218:
+ 2076              	.L120:
+3163:Src/main.c    **** 	{
+ 2077              		.loc 1 3163 2 is_stmt 1 view .LVU673
+3163:Src/main.c    **** 	{
+ 2078              		.loc 1 3163 6 is_stmt 0 view .LVU674
+ 2079 00cc 1F20     		movs	r0, #31
+ 2080 00ce FFF7FEFF 		bl	AD9102_ReadReg
+ 2081              	.LVL219:
+3163:Src/main.c    **** 	{
+ 2082              		.loc 1 3163 5 discriminator 1 view .LVU675
+ 2083 00d2 00B1     		cbz	r0, .L121
+3165:Src/main.c    **** 	}
+ 2084              		.loc 1 3165 6 view .LVU676
+ 2085 00d4 0025     		movs	r5, #0
+ 2086              	.LVL220:
+ 2087              	.L121:
+3167:Src/main.c    **** 	{
+ 2088              		.loc 1 3167 2 is_stmt 1 view .LVU677
+3167:Src/main.c    **** 	{
+ 2089              		.loc 1 3167 6 is_stmt 0 view .LVU678
+ 2090 00d6 5D20     		movs	r0, #93
+ 2091 00d8 FFF7FEFF 		bl	AD9102_ReadReg
+ 2092              	.LVL221:
+3167:Src/main.c    **** 	{
+ 2093              		.loc 1 3167 5 discriminator 1 view .LVU679
+ 2094 00dc 00B1     		cbz	r0, .L122
+3169:Src/main.c    **** 	}
+ 2095              		.loc 1 3169 6 view .LVU680
+ 2096 00de 0025     		movs	r5, #0
+ 2097              	.LVL222:
+ 2098              	.L122:
+3171:Src/main.c    **** 	{
+ 2099              		.loc 1 3171 2 is_stmt 1 view .LVU681
+3171:Src/main.c    **** 	{
+ 2100              		.loc 1 3171 6 is_stmt 0 view .LVU682
+ARM GAS  /tmp/ccEQxcUB.s 			page 172
+
+
+ 2101 00e0 5E20     		movs	r0, #94
+ 2102 00e2 FFF7FEFF 		bl	AD9102_ReadReg
+ 2103              	.LVL223:
+3171:Src/main.c    **** 	{
+ 2104              		.loc 1 3171 5 discriminator 1 view .LVU683
+ 2105 00e6 A042     		cmp	r0, r4
+ 2106 00e8 00D0     		beq	.L123
+3173:Src/main.c    **** 	}
+ 2107              		.loc 1 3173 6 view .LVU684
+ 2108 00ea 0025     		movs	r5, #0
+ 2109              	.LVL224:
+ 2110              	.L123:
+3175:Src/main.c    **** 	{
+ 2111              		.loc 1 3175 2 is_stmt 1 view .LVU685
+3175:Src/main.c    **** 	{
+ 2112              		.loc 1 3175 6 is_stmt 0 view .LVU686
+ 2113 00ec 2B20     		movs	r0, #43
+ 2114 00ee FFF7FEFF 		bl	AD9102_ReadReg
+ 2115              	.LVL225:
+3175:Src/main.c    **** 	{
+ 2116              		.loc 1 3175 5 discriminator 1 view .LVU687
+ 2117 00f2 40F20113 		movw	r3, #257
+ 2118 00f6 9842     		cmp	r0, r3
+ 2119 00f8 00D0     		beq	.L124
+3177:Src/main.c    **** 	}
+ 2120              		.loc 1 3177 6 view .LVU688
+ 2121 00fa 0025     		movs	r5, #0
+ 2122              	.LVL226:
+ 2123              	.L124:
+3180:Src/main.c    **** }
+ 2124              		.loc 1 3180 2 is_stmt 1 view .LVU689
+3181:Src/main.c    **** 
+ 2125              		.loc 1 3181 1 is_stmt 0 view .LVU690
+ 2126 00fc 85F00100 		eor	r0, r5, #1
+ 2127 0100 03B0     		add	sp, sp, #12
+ 2128              	.LCFI18:
+ 2129              		.cfi_remember_state
+ 2130              		.cfi_def_cfa_offset 36
+ 2131              		@ sp needed
+ 2132 0102 BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+ 2133              	.LVL227:
+ 2134              	.L130:
+ 2135              	.LCFI19:
+ 2136              		.cfi_restore_state
+3123:Src/main.c    **** 	}
+ 2137              		.loc 1 3123 14 view .LVU691
+ 2138 0106 4FF6FF73 		movw	r3, #65535
+ 2139 010a 0193     		str	r3, [sp, #4]
+ 2140 010c AFE7     		b	.L112
+ 2141              	.LVL228:
+ 2142              	.L131:
+3132:Src/main.c    **** 	}
+ 2143              		.loc 1 3132 6 view .LVU692
+ 2144 010e 0025     		movs	r5, #0
+ 2145 0110 B5E7     		b	.L113
+ 2146              		.cfi_endproc
+ 2147              	.LFE1224:
+ARM GAS  /tmp/ccEQxcUB.s 			page 173
+
+
+ 2149              		.section	.text.AD9102_CheckFlags,"ax",%progbits
+ 2150              		.align	1
+ 2151              		.syntax unified
+ 2152              		.thumb
+ 2153              		.thumb_func
+ 2155              	AD9102_CheckFlags:
+ 2156              	.LVL229:
+ 2157              	.LFB1223:
+3006:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
+ 2158              		.loc 1 3006 1 is_stmt 1 view -0
+ 2159              		.cfi_startproc
+ 2160              		@ args = 8, pretend = 0, frame = 8
+ 2161              		@ frame_needed = 0, uses_anonymous_args = 0
+3006:Src/main.c    **** 	uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
+ 2162              		.loc 1 3006 1 is_stmt 0 view .LVU694
+ 2163 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+ 2164              	.LCFI20:
+ 2165              		.cfi_def_cfa_offset 36
+ 2166              		.cfi_offset 4, -36
+ 2167              		.cfi_offset 5, -32
+ 2168              		.cfi_offset 6, -28
+ 2169              		.cfi_offset 7, -24
+ 2170              		.cfi_offset 8, -20
+ 2171              		.cfi_offset 9, -16
+ 2172              		.cfi_offset 10, -12
+ 2173              		.cfi_offset 11, -8
+ 2174              		.cfi_offset 14, -4
+ 2175 0004 83B0     		sub	sp, sp, #12
+ 2176              	.LCFI21:
+ 2177              		.cfi_def_cfa_offset 48
+ 2178 0006 0190     		str	r0, [sp, #4]
+ 2179 0008 0F46     		mov	r7, r1
+ 2180 000a 1546     		mov	r5, r2
+ 2181 000c 1C46     		mov	r4, r3
+ 2182 000e BDF834B0 		ldrh	fp, [sp, #52]
+3007:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 2183              		.loc 1 3007 2 is_stmt 1 view .LVU695
+3007:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 2184              		.loc 1 3007 23 is_stmt 0 view .LVU696
+ 2185 0012 0020     		movs	r0, #0
+ 2186              	.LVL230:
+3007:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 2187              		.loc 1 3007 23 view .LVU697
+ 2188 0014 FFF7FEFF 		bl	AD9102_ReadReg
+ 2189              	.LVL231:
+3007:Src/main.c    **** 	uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
+ 2190              		.loc 1 3007 23 view .LVU698
+ 2191 0018 8246     		mov	r10, r0
+ 2192              	.LVL232:
+3008:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
+ 2193              		.loc 1 3008 2 is_stmt 1 view .LVU699
+3008:Src/main.c    **** 	uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
+ 2194              		.loc 1 3008 22 is_stmt 0 view .LVU700
+ 2195 001a 0120     		movs	r0, #1
+ 2196 001c FFF7FEFF 		bl	AD9102_ReadReg
+ 2197              	.LVL233:
+ 2198 0020 8146     		mov	r9, r0
+ARM GAS  /tmp/ccEQxcUB.s 			page 174
+
+
+ 2199              	.LVL234:
+3009:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
+ 2200              		.loc 1 3009 2 is_stmt 1 view .LVU701
+3009:Src/main.c    **** 	uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
+ 2201              		.loc 1 3009 22 is_stmt 0 view .LVU702
+ 2202 0022 0220     		movs	r0, #2
+ 2203 0024 FFF7FEFF 		bl	AD9102_ReadReg
+ 2204              	.LVL235:
+ 2205 0028 8046     		mov	r8, r0
+ 2206              	.LVL236:
+3010:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
+ 2207              		.loc 1 3010 2 is_stmt 1 view .LVU703
+3010:Src/main.c    **** 	uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
+ 2208              		.loc 1 3010 21 is_stmt 0 view .LVU704
+ 2209 002a 6020     		movs	r0, #96
+ 2210 002c FFF7FEFF 		bl	AD9102_ReadReg
+ 2211              	.LVL237:
+3011:Src/main.c    **** 	                                   ((pat_base & 0x0Fu) << 4) |
+ 2212              		.loc 1 3011 2 is_stmt 1 view .LVU705
+3012:Src/main.c    **** 	                                   (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
+ 2213              		.loc 1 3012 57 is_stmt 0 view .LVU706
+ 2214 0030 9DF83030 		ldrb	r3, [sp, #48]	@ zero_extendqisi2
+ 2215 0034 1B01     		lsls	r3, r3, #4
+ 2216 0036 03F0F003 		and	r3, r3, #240
+3011:Src/main.c    **** 	                                   ((pat_base & 0x0Fu) << 4) |
+ 2217              		.loc 1 3011 11 view .LVU707
+ 2218 003a 40F20116 		movw	r6, #257
+ 2219 003e 1E43     		orrs	r6, r6, r3
+ 2220              	.LVL238:
+3015:Src/main.c    **** 	{
+ 2221              		.loc 1 3015 2 is_stmt 1 view .LVU708
+3015:Src/main.c    **** 	{
+ 2222              		.loc 1 3015 5 is_stmt 0 view .LVU709
+ 2223 0040 1CB1     		cbz	r4, .L157
+3019:Src/main.c    **** 	{
+ 2224              		.loc 1 3019 2 is_stmt 1 view .LVU710
+3019:Src/main.c    **** 	{
+ 2225              		.loc 1 3019 5 is_stmt 0 view .LVU711
+ 2226 0042 3F2C     		cmp	r4, #63
+ 2227 0044 02D9     		bls	.L145
+3021:Src/main.c    **** 	}
+ 2228              		.loc 1 3021 12 view .LVU712
+ 2229 0046 3F24     		movs	r4, #63
+ 2230              	.LVL239:
+3021:Src/main.c    **** 	}
+ 2231              		.loc 1 3021 12 view .LVU713
+ 2232 0048 00E0     		b	.L145
+ 2233              	.LVL240:
+ 2234              	.L157:
+3017:Src/main.c    **** 	}
+ 2235              		.loc 1 3017 12 view .LVU714
+ 2236 004a 0124     		movs	r4, #1
+ 2237              	.LVL241:
+ 2238              	.L145:
+3023:Src/main.c    **** 	{
+ 2239              		.loc 1 3023 2 is_stmt 1 view .LVU715
+3023:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 175
+
+
+ 2240              		.loc 1 3023 5 is_stmt 0 view .LVU716
+ 2241 004c BBF1000F 		cmp	fp, #0
+ 2242 0050 01D1     		bne	.L146
+3025:Src/main.c    **** 	}
+ 2243              		.loc 1 3025 14 view .LVU717
+ 2244 0052 4FF6FF7B 		movw	fp, #65535
+ 2245              	.L146:
  2246              	.LVL242:
- 2247              	.L165:
-2651:Src/main.c    **** 	{
- 2248              		.loc 1 2651 2 is_stmt 1 view .LVU722
-2651:Src/main.c    **** 	{
- 2249              		.loc 1 2651 5 is_stmt 0 view .LVU723
- 2250 001e 32B1     		cbz	r2, .L175
-2655:Src/main.c    **** 	{
- 2251              		.loc 1 2655 2 is_stmt 1 view .LVU724
-2655:Src/main.c    **** 	{
- 2252              		.loc 1 2655 5 is_stmt 0 view .LVU725
- 2253 0020 0F2A     		cmp	r2, #15
- 2254 0022 05D9     		bls	.L166
-2657:Src/main.c    **** 	}
- 2255              		.loc 1 2657 8 view .LVU726
- 2256 0024 0F22     		movs	r2, #15
- 2257              	.LVL243:
-2657:Src/main.c    **** 	}
- 2258              		.loc 1 2657 8 view .LVU727
- 2259 0026 03E0     		b	.L166
- 2260              	.LVL244:
- 2261              	.L174:
-2649:Src/main.c    **** 	}
- 2262              		.loc 1 2649 11 view .LVU728
- 2263 0028 4FF48054 		mov	r4, #4096
- 2264              	.LVL245:
-2649:Src/main.c    **** 	}
- 2265              		.loc 1 2649 11 view .LVU729
- 2266 002c F7E7     		b	.L165
+3027:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
+ 2247              		.loc 1 3027 2 is_stmt 1 view .LVU718
+3028:Src/main.c    **** 
+ 2248              		.loc 1 3028 35 is_stmt 0 view .LVU719
+ 2249 0056 05F00305 		and	r5, r5, #3
+ 2250              	.LVL243:
+3027:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
+ 2251              		.loc 1 3027 71 view .LVU720
+ 2252 005a A400     		lsls	r4, r4, #2
+ 2253              	.LVL244:
+3027:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
+ 2254              		.loc 1 3027 71 view .LVU721
+ 2255 005c E4B2     		uxtb	r4, r4
+3027:Src/main.c    **** 	                                ((uint16_t)(saw_type & 0x3u)));
+ 2256              		.loc 1 3027 11 view .LVU722
+ 2257 005e 2543     		orrs	r5, r5, r4
+ 2258              	.LVL245:
+3030:Src/main.c    **** 
+ 2259              		.loc 1 3030 2 is_stmt 1 view .LVU723
+3033:Src/main.c    **** 	{
+ 2260              		.loc 1 3033 2 view .LVU724
+3033:Src/main.c    **** 	{
+ 2261              		.loc 1 3033 5 is_stmt 0 view .LVU725
+ 2262 0060 BAF1000F 		cmp	r10, #0
+ 2263 0064 36D1     		bne	.L160
+3030:Src/main.c    **** 
+ 2264              		.loc 1 3030 10 view .LVU726
+ 2265 0066 0124     		movs	r4, #1
+ 2266              	.L147:
  2267              	.LVL246:
- 2268              	.L175:
-2653:Src/main.c    **** 	}
- 2269              		.loc 1 2653 8 view .LVU730
- 2270 002e 0122     		movs	r2, #1
- 2271              	.LVL247:
- 2272              	.L166:
-2660:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 2273              		.loc 1 2660 2 is_stmt 1 view .LVU731
-2660:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 2274              		.loc 1 2660 63 is_stmt 0 view .LVU732
- 2275 0030 1702     		lsls	r7, r2, #8
- 2276 0032 07F47067 		and	r7, r7, #3840
-2660:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 2277              		.loc 1 2660 11 view .LVU733
- 2278 0036 47F01107 		orr	r7, r7, #17
- 2279              	.LVL248:
-2663:Src/main.c    **** 	if (pat_period == 0u)
-ARM GAS  /tmp/ccwR4KB7.s 			page 171
+3039:Src/main.c    **** 	{
+ 2268              		.loc 1 3039 2 is_stmt 1 view .LVU727
+3039:Src/main.c    **** 	{
+ 2269              		.loc 1 3039 5 is_stmt 0 view .LVU728
+ 2270 0068 19F4F47F 		tst	r9, #488
+ 2271 006c 00D0     		beq	.L148
+3041:Src/main.c    **** 	}
+ 2272              		.loc 1 3041 6 view .LVU729
+ 2273 006e 0024     		movs	r4, #0
+ 2274              	.LVL247:
+ 2275              	.L148:
+3045:Src/main.c    **** 	{
+ 2276              		.loc 1 3045 2 is_stmt 1 view .LVU730
+3045:Src/main.c    **** 	{
+ 2277              		.loc 1 3045 5 is_stmt 0 view .LVU731
+ 2278 0070 18F40E6F 		tst	r8, #2272
+ 2279 0074 00D0     		beq	.L149
+3047:Src/main.c    **** 	}
+ 2280              		.loc 1 3047 6 view .LVU732
+ARM GAS  /tmp/ccEQxcUB.s 			page 176
 
 
- 2280              		.loc 1 2663 2 is_stmt 1 view .LVU734
-2663:Src/main.c    **** 	if (pat_period == 0u)
- 2281              		.loc 1 2663 24 is_stmt 0 view .LVU735
- 2282 003a A046     		mov	r8, r4
-2663:Src/main.c    **** 	if (pat_period == 0u)
- 2283              		.loc 1 2663 44 view .LVU736
- 2284 003c 02F00F02 		and	r2, r2, #15
- 2285              	.LVL249:
-2663:Src/main.c    **** 	if (pat_period == 0u)
- 2286              		.loc 1 2663 11 view .LVU737
- 2287 0040 04FB02F2 		mul	r2, r4, r2
- 2288              	.LVL250:
-2664:Src/main.c    **** 	{
- 2289              		.loc 1 2664 2 is_stmt 1 view .LVU738
-2664:Src/main.c    **** 	{
- 2290              		.loc 1 2664 5 is_stmt 0 view .LVU739
- 2291 0044 1AB1     		cbz	r2, .L167
-2668:Src/main.c    **** 	{
- 2292              		.loc 1 2668 2 is_stmt 1 view .LVU740
-2668:Src/main.c    **** 	{
- 2293              		.loc 1 2668 5 is_stmt 0 view .LVU741
- 2294 0046 B2F5803F 		cmp	r2, #65536
- 2295 004a 4DD2     		bcs	.L177
- 2296 004c 9046     		mov	r8, r2
- 2297              	.L167:
- 2298              	.LVL251:
-2673:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- 2299              		.loc 1 2673 2 is_stmt 1 view .LVU742
- 2300 004e 4221     		movs	r1, #66
- 2301 0050 3648     		ldr	r0, .L179
- 2302              	.LVL252:
-2673:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- 2303              		.loc 1 2673 2 is_stmt 0 view .LVU743
- 2304 0052 FFF7FEFF 		bl	AD9102_WriteRegTable
- 2305              	.LVL253:
-2674:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
- 2306              		.loc 1 2674 2 is_stmt 1 view .LVU744
- 2307 0056 0021     		movs	r1, #0
- 2308 0058 1E20     		movs	r0, #30
- 2309 005a FFF7FEFF 		bl	AD9102_WriteReg
- 2310              	.LVL254:
-2675:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
- 2311              		.loc 1 2675 2 view .LVU745
- 2312 005e 43F23001 		movw	r1, #12336
- 2313 0062 2720     		movs	r0, #39
- 2314 0064 FFF7FEFF 		bl	AD9102_WriteReg
- 2315              	.LVL255:
-2676:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
- 2316              		.loc 1 2676 2 view .LVU746
- 2317 0068 4FF40071 		mov	r1, #512
- 2318 006c 3720     		movs	r0, #55
- 2319 006e FFF7FEFF 		bl	AD9102_WriteReg
- 2320              	.LVL256:
-2677:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
- 2321              		.loc 1 2677 2 view .LVU747
- 2322 0072 40F20111 		movw	r1, #257
- 2323 0076 2B20     		movs	r0, #43
-ARM GAS  /tmp/ccwR4KB7.s 			page 172
+ 2281 0076 0024     		movs	r4, #0
+ 2282              	.LVL248:
+ 2283              	.L149:
+3051:Src/main.c    **** 	{
+ 2284              		.loc 1 3051 2 is_stmt 1 view .LVU733
+3051:Src/main.c    **** 	{
+ 2285              		.loc 1 3051 5 is_stmt 0 view .LVU734
+ 2286 0078 10F03F0F 		tst	r0, #63
+ 2287 007c 00D0     		beq	.L150
+3053:Src/main.c    **** 	}
+ 2288              		.loc 1 3053 6 view .LVU735
+ 2289 007e 0024     		movs	r4, #0
+ 2290              	.LVL249:
+ 2291              	.L150:
+3056:Src/main.c    **** 	{
+ 2292              		.loc 1 3056 2 is_stmt 1 view .LVU736
+3056:Src/main.c    **** 	{
+ 2293              		.loc 1 3056 5 is_stmt 0 view .LVU737
+ 2294 0080 27B1     		cbz	r7, .L151
+3056:Src/main.c    **** 	{
+ 2295              		.loc 1 3056 17 discriminator 1 view .LVU738
+ 2296 0082 019B     		ldr	r3, [sp, #4]
+ 2297 0084 13F0010F 		tst	r3, #1
+ 2298 0088 00D1     		bne	.L151
+3058:Src/main.c    **** 	}
+ 2299              		.loc 1 3058 6 view .LVU739
+ 2300 008a 0024     		movs	r4, #0
+ 2301              	.LVL250:
+ 2302              	.L151:
+3061:Src/main.c    **** 	{
+ 2303              		.loc 1 3061 2 is_stmt 1 view .LVU740
+3061:Src/main.c    **** 	{
+ 2304              		.loc 1 3061 6 is_stmt 0 view .LVU741
+ 2305 008c 2720     		movs	r0, #39
+ 2306              	.LVL251:
+3061:Src/main.c    **** 	{
+ 2307              		.loc 1 3061 6 view .LVU742
+ 2308 008e FFF7FEFF 		bl	AD9102_ReadReg
+ 2309              	.LVL252:
+3061:Src/main.c    **** 	{
+ 2310              		.loc 1 3061 5 discriminator 1 view .LVU743
+ 2311 0092 43F21223 		movw	r3, #12818
+ 2312 0096 9842     		cmp	r0, r3
+ 2313 0098 00D0     		beq	.L152
+3063:Src/main.c    **** 	}
+ 2314              		.loc 1 3063 6 view .LVU744
+ 2315 009a 0024     		movs	r4, #0
+ 2316              	.LVL253:
+ 2317              	.L152:
+3065:Src/main.c    **** 	{
+ 2318              		.loc 1 3065 2 is_stmt 1 view .LVU745
+3065:Src/main.c    **** 	{
+ 2319              		.loc 1 3065 6 is_stmt 0 view .LVU746
+ 2320 009c 2820     		movs	r0, #40
+ 2321 009e FFF7FEFF 		bl	AD9102_ReadReg
+ 2322              	.LVL254:
+3065:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 177
 
 
- 2324 0078 FFF7FEFF 		bl	AD9102_WriteReg
- 2325              	.LVL257:
-2678:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
- 2326              		.loc 1 2678 2 view .LVU748
- 2327 007c 3946     		mov	r1, r7
- 2328 007e 2820     		movs	r0, #40
- 2329 0080 FFF7FEFF 		bl	AD9102_WriteReg
- 2330              	.LVL258:
-2679:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
- 2331              		.loc 1 2679 2 view .LVU749
- 2332 0084 1FFA88F1 		uxth	r1, r8
- 2333 0088 2920     		movs	r0, #41
- 2334 008a FFF7FEFF 		bl	AD9102_WriteReg
- 2335              	.LVL259:
-2680:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
- 2336              		.loc 1 2680 2 view .LVU750
- 2337 008e 0021     		movs	r1, #0
- 2338 0090 1F20     		movs	r0, #31
- 2339 0092 FFF7FEFF 		bl	AD9102_WriteReg
- 2340              	.LVL260:
-2681:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
- 2341              		.loc 1 2681 2 view .LVU751
- 2342 0096 0021     		movs	r1, #0
- 2343 0098 5C20     		movs	r0, #92
- 2344 009a FFF7FEFF 		bl	AD9102_WriteReg
- 2345              	.LVL261:
-2682:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
- 2346              		.loc 1 2682 2 view .LVU752
- 2347 009e 0021     		movs	r1, #0
- 2348 00a0 5D20     		movs	r0, #93
- 2349 00a2 FFF7FEFF 		bl	AD9102_WriteReg
- 2350              	.LVL262:
-2683:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2351              		.loc 1 2683 2 view .LVU753
-2683:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2352              		.loc 1 2683 60 is_stmt 0 view .LVU754
- 2353 00a6 611E     		subs	r1, r4, #1
- 2354 00a8 89B2     		uxth	r1, r1
-2683:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2355              		.loc 1 2683 2 view .LVU755
- 2356 00aa 0901     		lsls	r1, r1, #4
- 2357 00ac 89B2     		uxth	r1, r1
- 2358 00ae 5E20     		movs	r0, #94
- 2359 00b0 FFF7FEFF 		bl	AD9102_WriteReg
- 2360              	.LVL263:
-2684:Src/main.c    **** 
- 2361              		.loc 1 2684 2 is_stmt 1 view .LVU756
- 2362 00b4 0121     		movs	r1, #1
- 2363 00b6 1D20     		movs	r0, #29
- 2364 00b8 FFF7FEFF 		bl	AD9102_WriteReg
- 2365              	.LVL264:
-2686:Src/main.c    **** 
- 2366              		.loc 1 2686 2 view .LVU757
- 2367 00bc 3146     		mov	r1, r6
- 2368 00be 2046     		mov	r0, r4
- 2369 00c0 FFF7FEFF 		bl	AD9102_LoadSramRamp
- 2370              	.LVL265:
-ARM GAS  /tmp/ccwR4KB7.s 			page 173
+ 2323              		.loc 1 3065 5 discriminator 1 view .LVU747
+ 2324 00a2 B042     		cmp	r0, r6
+ 2325 00a4 00D0     		beq	.L153
+3067:Src/main.c    **** 	}
+ 2326              		.loc 1 3067 6 view .LVU748
+ 2327 00a6 0024     		movs	r4, #0
+ 2328              	.LVL255:
+ 2329              	.L153:
+3069:Src/main.c    **** 	{
+ 2330              		.loc 1 3069 2 is_stmt 1 view .LVU749
+3069:Src/main.c    **** 	{
+ 2331              		.loc 1 3069 6 is_stmt 0 view .LVU750
+ 2332 00a8 2920     		movs	r0, #41
+ 2333 00aa FFF7FEFF 		bl	AD9102_ReadReg
+ 2334              	.LVL256:
+3069:Src/main.c    **** 	{
+ 2335              		.loc 1 3069 5 discriminator 1 view .LVU751
+ 2336 00ae 5845     		cmp	r0, fp
+ 2337 00b0 00D0     		beq	.L154
+3071:Src/main.c    **** 	}
+ 2338              		.loc 1 3071 6 view .LVU752
+ 2339 00b2 0024     		movs	r4, #0
+ 2340              	.LVL257:
+ 2341              	.L154:
+3073:Src/main.c    **** 	{
+ 2342              		.loc 1 3073 2 is_stmt 1 view .LVU753
+3073:Src/main.c    **** 	{
+ 2343              		.loc 1 3073 6 is_stmt 0 view .LVU754
+ 2344 00b4 1F20     		movs	r0, #31
+ 2345 00b6 FFF7FEFF 		bl	AD9102_ReadReg
+ 2346              	.LVL258:
+3073:Src/main.c    **** 	{
+ 2347              		.loc 1 3073 5 discriminator 1 view .LVU755
+ 2348 00ba 00B1     		cbz	r0, .L155
+3075:Src/main.c    **** 	}
+ 2349              		.loc 1 3075 6 view .LVU756
+ 2350 00bc 0024     		movs	r4, #0
+ 2351              	.LVL259:
+ 2352              	.L155:
+3077:Src/main.c    **** 	{
+ 2353              		.loc 1 3077 2 is_stmt 1 view .LVU757
+3077:Src/main.c    **** 	{
+ 2354              		.loc 1 3077 6 is_stmt 0 view .LVU758
+ 2355 00be 3720     		movs	r0, #55
+ 2356 00c0 FFF7FEFF 		bl	AD9102_ReadReg
+ 2357              	.LVL260:
+3077:Src/main.c    **** 	{
+ 2358              		.loc 1 3077 5 discriminator 1 view .LVU759
+ 2359 00c4 A842     		cmp	r0, r5
+ 2360 00c6 00D0     		beq	.L156
+3079:Src/main.c    **** 	}
+ 2361              		.loc 1 3079 6 view .LVU760
+ 2362 00c8 0024     		movs	r4, #0
+ 2363              	.LVL261:
+ 2364              	.L156:
+3082:Src/main.c    **** }
+ 2365              		.loc 1 3082 2 is_stmt 1 view .LVU761
+ARM GAS  /tmp/ccEQxcUB.s 			page 178
 
 
-2688:Src/main.c    **** 	{
- 2371              		.loc 1 2688 2 view .LVU758
-2688:Src/main.c    **** 	{
- 2372              		.loc 1 2688 5 is_stmt 0 view .LVU759
- 2373 00c4 35B3     		cbz	r5, .L168
-2690:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
- 2374              		.loc 1 2690 3 is_stmt 1 view .LVU760
- 2375 00c6 0122     		movs	r2, #1
- 2376 00c8 4FF40061 		mov	r1, #2048
- 2377 00cc 1848     		ldr	r0, .L179+4
- 2378 00ce FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2379              	.LVL266:
-2691:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2380              		.loc 1 2691 3 view .LVU761
- 2381 00d2 0121     		movs	r1, #1
- 2382 00d4 1E20     		movs	r0, #30
- 2383 00d6 FFF7FEFF 		bl	AD9102_WriteReg
- 2384              	.LVL267:
-2692:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
- 2385              		.loc 1 2692 3 view .LVU762
- 2386 00da 0121     		movs	r1, #1
- 2387 00dc 1D20     		movs	r0, #29
- 2388 00de FFF7FEFF 		bl	AD9102_WriteReg
- 2389              	.LVL268:
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2390              		.loc 1 2693 3 view .LVU763
- 2391              	.LBB387:
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2392              		.loc 1 2693 8 view .LVU764
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2393              		.loc 1 2693 26 is_stmt 0 view .LVU765
- 2394 00e2 0023     		movs	r3, #0
- 2395 00e4 0193     		str	r3, [sp, #4]
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2396              		.loc 1 2693 3 view .LVU766
- 2397 00e6 05E0     		b	.L169
- 2398              	.LVL269:
- 2399              	.L177:
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2400              		.loc 1 2693 3 view .LVU767
- 2401              	.LBE387:
-2670:Src/main.c    **** 	}
- 2402              		.loc 1 2670 14 view .LVU768
- 2403 00e8 4FF6FF78 		movw	r8, #65535
- 2404 00ec AFE7     		b	.L167
- 2405              	.LVL270:
- 2406              	.L170:
- 2407              	.LBB388:
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2408              		.loc 1 2693 49 is_stmt 1 discriminator 3 view .LVU769
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2409              		.loc 1 2693 44 discriminator 3 view .LVU770
- 2410 00ee 019B     		ldr	r3, [sp, #4]
- 2411 00f0 0133     		adds	r3, r3, #1
- 2412 00f2 0193     		str	r3, [sp, #4]
- 2413              	.L169:
-2693:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
-ARM GAS  /tmp/ccwR4KB7.s 			page 174
+3083:Src/main.c    **** 
+ 2366              		.loc 1 3083 1 is_stmt 0 view .LVU762
+ 2367 00ca 84F00100 		eor	r0, r4, #1
+ 2368 00ce 03B0     		add	sp, sp, #12
+ 2369              	.LCFI22:
+ 2370              		.cfi_remember_state
+ 2371              		.cfi_def_cfa_offset 36
+ 2372              		@ sp needed
+ 2373 00d0 BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+ 2374              	.LVL262:
+ 2375              	.L160:
+ 2376              	.LCFI23:
+ 2377              		.cfi_restore_state
+3035:Src/main.c    **** 	}
+ 2378              		.loc 1 3035 6 view .LVU763
+ 2379 00d4 0024     		movs	r4, #0
+ 2380 00d6 C7E7     		b	.L147
+ 2381              		.cfi_endproc
+ 2382              	.LFE1223:
+ 2384              		.section	.text.AD9102_ApplySram,"ax",%progbits
+ 2385              		.align	1
+ 2386              		.syntax unified
+ 2387              		.thumb
+ 2388              		.thumb_func
+ 2390              	AD9102_ApplySram:
+ 2391              	.LVL263:
+ 2392              	.LFB1222:
+2933:Src/main.c    **** 	if (samples == 0u)
+ 2393              		.loc 1 2933 1 is_stmt 1 view -0
+ 2394              		.cfi_startproc
+ 2395              		@ args = 4, pretend = 0, frame = 8
+ 2396              		@ frame_needed = 0, uses_anonymous_args = 0
+2933:Src/main.c    **** 	if (samples == 0u)
+ 2397              		.loc 1 2933 1 is_stmt 0 view .LVU765
+ 2398 0000 2DE9F043 		push	{r4, r5, r6, r7, r8, r9, lr}
+ 2399              	.LCFI24:
+ 2400              		.cfi_def_cfa_offset 28
+ 2401              		.cfi_offset 4, -28
+ 2402              		.cfi_offset 5, -24
+ 2403              		.cfi_offset 6, -20
+ 2404              		.cfi_offset 7, -16
+ 2405              		.cfi_offset 8, -12
+ 2406              		.cfi_offset 9, -8
+ 2407              		.cfi_offset 14, -4
+ 2408 0004 83B0     		sub	sp, sp, #12
+ 2409              	.LCFI25:
+ 2410              		.cfi_def_cfa_offset 40
+ 2411 0006 0646     		mov	r6, r0
+ 2412 0008 1F46     		mov	r7, r3
+ 2413 000a BDF82880 		ldrh	r8, [sp, #40]
+2934:Src/main.c    **** 	{
+ 2414              		.loc 1 2934 2 is_stmt 1 view .LVU766
+2934:Src/main.c    **** 	{
+ 2415              		.loc 1 2934 5 is_stmt 0 view .LVU767
+ 2416 000e 21B1     		cbz	r1, .L181
+ 2417 0010 0C46     		mov	r4, r1
+2938:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 179
 
 
- 2414              		.loc 1 2693 35 discriminator 1 view .LVU771
- 2415 00f4 019B     		ldr	r3, [sp, #4]
- 2416 00f6 B3F57A7F 		cmp	r3, #1000
- 2417 00fa F8D3     		bcc	.L170
- 2418              	.LBE388:
-2694:Src/main.c    **** 	}
- 2419              		.loc 1 2694 3 view .LVU772
- 2420 00fc 0022     		movs	r2, #0
- 2421 00fe 4FF40061 		mov	r1, #2048
- 2422 0102 0B48     		ldr	r0, .L179+4
- 2423 0104 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2424              	.LVL271:
- 2425              	.L171:
-2702:Src/main.c    **** }
- 2426              		.loc 1 2702 2 view .LVU773
-2702:Src/main.c    **** }
- 2427              		.loc 1 2702 9 is_stmt 0 view .LVU774
- 2428 0108 1E20     		movs	r0, #30
- 2429 010a FFF7FEFF 		bl	AD9102_ReadReg
- 2430              	.LVL272:
-2703:Src/main.c    **** 
- 2431              		.loc 1 2703 1 view .LVU775
- 2432 010e 02B0     		add	sp, sp, #8
- 2433              	.LCFI26:
- 2434              		.cfi_remember_state
- 2435              		.cfi_def_cfa_offset 24
- 2436              		@ sp needed
- 2437 0110 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
- 2438              	.LVL273:
- 2439              	.L168:
- 2440              	.LCFI27:
- 2441              		.cfi_restore_state
-2698:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 2442              		.loc 1 2698 3 is_stmt 1 view .LVU776
- 2443 0114 0021     		movs	r1, #0
- 2444 0116 1E20     		movs	r0, #30
- 2445 0118 FFF7FEFF 		bl	AD9102_WriteReg
- 2446              	.LVL274:
-2699:Src/main.c    **** 	}
- 2447              		.loc 1 2699 3 view .LVU777
- 2448 011c 0122     		movs	r2, #1
- 2449 011e 4FF40061 		mov	r1, #2048
- 2450 0122 0348     		ldr	r0, .L179+4
- 2451 0124 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2452              	.LVL275:
- 2453 0128 EEE7     		b	.L171
- 2454              	.L180:
- 2455 012a 00BF     		.align	2
- 2456              	.L179:
- 2457 012c 00000000 		.word	ad9102_example2_regval
- 2458 0130 000C0240 		.word	1073875968
- 2459              		.cfi_endproc
- 2460              	.LFE1217:
- 2462              		.section	.text.AD9102_Apply,"ax",%progbits
- 2463              		.align	1
- 2464              		.syntax unified
- 2465              		.thumb
-ARM GAS  /tmp/ccwR4KB7.s 			page 175
+ 2418              		.loc 1 2938 2 is_stmt 1 view .LVU768
+2938:Src/main.c    **** 	{
+ 2419              		.loc 1 2938 5 is_stmt 0 view .LVU769
+ 2420 0012 0129     		cmp	r1, #1
+ 2421 0014 02D8     		bhi	.L172
+2940:Src/main.c    **** 	}
+ 2422              		.loc 1 2940 11 view .LVU770
+ 2423 0016 0224     		movs	r4, #2
+ 2424 0018 03E0     		b	.L173
+ 2425              	.L181:
+2936:Src/main.c    **** 	}
+ 2426              		.loc 1 2936 11 view .LVU771
+ 2427 001a 1024     		movs	r4, #16
+ 2428              	.L172:
+ 2429              	.LVL264:
+2942:Src/main.c    **** 	{
+ 2430              		.loc 1 2942 2 is_stmt 1 view .LVU772
+2942:Src/main.c    **** 	{
+ 2431              		.loc 1 2942 5 is_stmt 0 view .LVU773
+ 2432 001c B4F5805F 		cmp	r4, #4096
+ 2433 0020 04D8     		bhi	.L183
+ 2434              	.LVL265:
+ 2435              	.L173:
+2946:Src/main.c    **** 	{
+ 2436              		.loc 1 2946 2 is_stmt 1 view .LVU774
+2946:Src/main.c    **** 	{
+ 2437              		.loc 1 2946 5 is_stmt 0 view .LVU775
+ 2438 0022 32B1     		cbz	r2, .L184
+2950:Src/main.c    **** 	{
+ 2439              		.loc 1 2950 2 is_stmt 1 view .LVU776
+2950:Src/main.c    **** 	{
+ 2440              		.loc 1 2950 5 is_stmt 0 view .LVU777
+ 2441 0024 0F2A     		cmp	r2, #15
+ 2442 0026 05D9     		bls	.L174
+2952:Src/main.c    **** 	}
+ 2443              		.loc 1 2952 8 view .LVU778
+ 2444 0028 0F22     		movs	r2, #15
+ 2445              	.LVL266:
+2952:Src/main.c    **** 	}
+ 2446              		.loc 1 2952 8 view .LVU779
+ 2447 002a 03E0     		b	.L174
+ 2448              	.LVL267:
+ 2449              	.L183:
+2944:Src/main.c    **** 	}
+ 2450              		.loc 1 2944 11 view .LVU780
+ 2451 002c 4FF48054 		mov	r4, #4096
+ 2452              	.LVL268:
+2944:Src/main.c    **** 	}
+ 2453              		.loc 1 2944 11 view .LVU781
+ 2454 0030 F7E7     		b	.L173
+ 2455              	.LVL269:
+ 2456              	.L184:
+2948:Src/main.c    **** 	}
+ 2457              		.loc 1 2948 8 view .LVU782
+ 2458 0032 0122     		movs	r2, #1
+ 2459              	.LVL270:
+ 2460              	.L174:
+ARM GAS  /tmp/ccEQxcUB.s 			page 180
 
 
- 2466              		.thumb_func
- 2468              	AD9102_Apply:
- 2469              	.LVL276:
- 2470              	.LFB1215:
-2531:Src/main.c    **** 	if (enable)
- 2471              		.loc 1 2531 1 view -0
- 2472              		.cfi_startproc
- 2473              		@ args = 4, pretend = 0, frame = 8
- 2474              		@ frame_needed = 0, uses_anonymous_args = 0
-2531:Src/main.c    **** 	if (enable)
- 2475              		.loc 1 2531 1 is_stmt 0 view .LVU779
- 2476 0000 30B5     		push	{r4, r5, lr}
- 2477              	.LCFI28:
- 2478              		.cfi_def_cfa_offset 12
- 2479              		.cfi_offset 4, -12
- 2480              		.cfi_offset 5, -8
- 2481              		.cfi_offset 14, -4
- 2482 0002 83B0     		sub	sp, sp, #12
- 2483              	.LCFI29:
- 2484              		.cfi_def_cfa_offset 24
-2532:Src/main.c    **** 	{
- 2485              		.loc 1 2532 2 is_stmt 1 view .LVU780
-2532:Src/main.c    **** 	{
- 2486              		.loc 1 2532 5 is_stmt 0 view .LVU781
- 2487 0004 0029     		cmp	r1, #0
- 2488 0006 4AD0     		beq	.L182
- 2489              	.LBB389:
-2534:Src/main.c    **** 		uint16_t pat_timebase;
- 2490              		.loc 1 2534 3 is_stmt 1 view .LVU782
-2535:Src/main.c    **** 
- 2491              		.loc 1 2535 3 view .LVU783
-2537:Src/main.c    **** 		{
- 2492              		.loc 1 2537 3 view .LVU784
-2537:Src/main.c    **** 		{
- 2493              		.loc 1 2537 6 is_stmt 0 view .LVU785
- 2494 0008 1AB1     		cbz	r2, .L187
-2541:Src/main.c    **** 		{
- 2495              		.loc 1 2541 3 is_stmt 1 view .LVU786
-2541:Src/main.c    **** 		{
- 2496              		.loc 1 2541 6 is_stmt 0 view .LVU787
- 2497 000a 3F2A     		cmp	r2, #63
- 2498 000c 02D9     		bls	.L183
-2543:Src/main.c    **** 		}
- 2499              		.loc 1 2543 13 view .LVU788
- 2500 000e 3F22     		movs	r2, #63
+2955:Src/main.c    **** 	{
+ 2461              		.loc 1 2955 2 is_stmt 1 view .LVU783
+2955:Src/main.c    **** 	{
+ 2462              		.loc 1 2955 5 is_stmt 0 view .LVU784
+ 2463 0034 B8F5005F 		cmp	r8, #8192
+ 2464 0038 01D3     		bcc	.L175
+2957:Src/main.c    **** 	}
+ 2465              		.loc 1 2957 13 view .LVU785
+ 2466 003a 41F6FF78 		movw	r8, #8191
+ 2467              	.L175:
+ 2468              	.LVL271:
+2960:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ 2469              		.loc 1 2960 2 is_stmt 1 view .LVU786
+2960:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ 2470              		.loc 1 2960 63 is_stmt 0 view .LVU787
+ 2471 003e 1502     		lsls	r5, r2, #8
+ 2472 0040 05F47065 		and	r5, r5, #3840
+2960:Src/main.c    **** 	                                   ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ 2473              		.loc 1 2960 11 view .LVU788
+ 2474 0044 45F01105 		orr	r5, r5, #17
+ 2475              	.LVL272:
+2963:Src/main.c    **** 	if (pat_period == 0u)
+ 2476              		.loc 1 2963 2 is_stmt 1 view .LVU789
+2963:Src/main.c    **** 	if (pat_period == 0u)
+ 2477              		.loc 1 2963 24 is_stmt 0 view .LVU790
+ 2478 0048 A146     		mov	r9, r4
+2963:Src/main.c    **** 	if (pat_period == 0u)
+ 2479              		.loc 1 2963 44 view .LVU791
+ 2480 004a 02F00F02 		and	r2, r2, #15
+ 2481              	.LVL273:
+2963:Src/main.c    **** 	if (pat_period == 0u)
+ 2482              		.loc 1 2963 11 view .LVU792
+ 2483 004e 04FB02F2 		mul	r2, r4, r2
+ 2484              	.LVL274:
+2964:Src/main.c    **** 	{
+ 2485              		.loc 1 2964 2 is_stmt 1 view .LVU793
+2964:Src/main.c    **** 	{
+ 2486              		.loc 1 2964 5 is_stmt 0 view .LVU794
+ 2487 0052 1AB1     		cbz	r2, .L176
+2968:Src/main.c    **** 	{
+ 2488              		.loc 1 2968 2 is_stmt 1 view .LVU795
+2968:Src/main.c    **** 	{
+ 2489              		.loc 1 2968 5 is_stmt 0 view .LVU796
+ 2490 0054 B2F5803F 		cmp	r2, #65536
+ 2491 0058 4ED2     		bcs	.L187
+ 2492 005a 9146     		mov	r9, r2
+ 2493              	.L176:
+ 2494              	.LVL275:
+2973:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
+ 2495              		.loc 1 2973 2 is_stmt 1 view .LVU797
+ 2496 005c 4221     		movs	r1, #66
+ 2497 005e 3748     		ldr	r0, .L189
+ 2498              	.LVL276:
+2973:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
+ 2499              		.loc 1 2973 2 is_stmt 0 view .LVU798
+ 2500 0060 FFF7FEFF 		bl	AD9102_WriteRegTable
  2501              	.LVL277:
-2543:Src/main.c    **** 		}
- 2502              		.loc 1 2543 13 view .LVU789
- 2503 0010 00E0     		b	.L183
- 2504              	.LVL278:
- 2505              	.L187:
-2539:Src/main.c    **** 		}
- 2506              		.loc 1 2539 13 view .LVU790
- 2507 0012 0122     		movs	r2, #1
- 2508              	.LVL279:
- 2509              	.L183:
-2545:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
-ARM GAS  /tmp/ccwR4KB7.s 			page 176
+ARM GAS  /tmp/ccEQxcUB.s 			page 181
 
 
- 2510              		.loc 1 2545 3 is_stmt 1 view .LVU791
-2546:Src/main.c    **** 		pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- 2511              		.loc 1 2546 25 is_stmt 0 view .LVU792
- 2512 0014 00F00300 		and	r0, r0, #3
- 2513              	.LVL280:
-2545:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
- 2514              		.loc 1 2545 60 view .LVU793
- 2515 0018 9200     		lsls	r2, r2, #2
- 2516              	.LVL281:
-2545:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
- 2517              		.loc 1 2545 60 view .LVU794
- 2518 001a D2B2     		uxtb	r2, r2
-2545:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
- 2519              		.loc 1 2545 11 view .LVU795
- 2520 001c 40EA0204 		orr	r4, r0, r2
- 2521              	.LVL282:
-2547:Src/main.c    **** 		                          ((pat_base & 0x0Fu) << 4) |
- 2522              		.loc 1 2547 3 is_stmt 1 view .LVU796
-2548:Src/main.c    **** 		                          (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
- 2523              		.loc 1 2548 49 is_stmt 0 view .LVU797
- 2524 0020 1B01     		lsls	r3, r3, #4
- 2525              	.LVL283:
-2548:Src/main.c    **** 		                          (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
- 2526              		.loc 1 2548 49 view .LVU798
- 2527 0022 03F0F003 		and	r3, r3, #240
-2547:Src/main.c    **** 		                          ((pat_base & 0x0Fu) << 4) |
- 2528              		.loc 1 2547 16 view .LVU799
- 2529 0026 40F20115 		movw	r5, #257
- 2530 002a 1D43     		orrs	r5, r5, r3
- 2531              	.LVL284:
-2551:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
- 2532              		.loc 1 2551 3 is_stmt 1 view .LVU800
- 2533 002c 43F21221 		movw	r1, #12818
- 2534              	.LVL285:
-2551:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
- 2535              		.loc 1 2551 3 is_stmt 0 view .LVU801
- 2536 0030 2720     		movs	r0, #39
- 2537 0032 FFF7FEFF 		bl	AD9102_WriteReg
- 2538              	.LVL286:
-2552:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
- 2539              		.loc 1 2552 3 is_stmt 1 view .LVU802
- 2540 0036 2146     		mov	r1, r4
- 2541 0038 3720     		movs	r0, #55
- 2542 003a FFF7FEFF 		bl	AD9102_WriteReg
- 2543              	.LVL287:
-2553:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
- 2544              		.loc 1 2553 3 view .LVU803
- 2545 003e 2946     		mov	r1, r5
- 2546 0040 2820     		movs	r0, #40
- 2547 0042 FFF7FEFF 		bl	AD9102_WriteReg
- 2548              	.LVL288:
-2554:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
- 2549              		.loc 1 2554 3 view .LVU804
- 2550 0046 BDF81810 		ldrh	r1, [sp, #24]
- 2551 004a 2920     		movs	r0, #41
- 2552 004c FFF7FEFF 		bl	AD9102_WriteReg
- 2553              	.LVL289:
-ARM GAS  /tmp/ccwR4KB7.s 			page 177
+2974:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
+ 2502              		.loc 1 2974 2 is_stmt 1 view .LVU799
+ 2503 0064 0021     		movs	r1, #0
+ 2504 0066 1E20     		movs	r0, #30
+ 2505 0068 FFF7FEFF 		bl	AD9102_WriteReg
+ 2506              	.LVL278:
+2975:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
+ 2507              		.loc 1 2975 2 view .LVU800
+ 2508 006c 43F23001 		movw	r1, #12336
+ 2509 0070 2720     		movs	r0, #39
+ 2510 0072 FFF7FEFF 		bl	AD9102_WriteReg
+ 2511              	.LVL279:
+2976:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
+ 2512              		.loc 1 2976 2 view .LVU801
+ 2513 0076 4FF40071 		mov	r1, #512
+ 2514 007a 3720     		movs	r0, #55
+ 2515 007c FFF7FEFF 		bl	AD9102_WriteReg
+ 2516              	.LVL280:
+2977:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
+ 2517              		.loc 1 2977 2 view .LVU802
+ 2518 0080 40F20111 		movw	r1, #257
+ 2519 0084 2B20     		movs	r0, #43
+ 2520 0086 FFF7FEFF 		bl	AD9102_WriteReg
+ 2521              	.LVL281:
+2978:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
+ 2522              		.loc 1 2978 2 view .LVU803
+ 2523 008a 2946     		mov	r1, r5
+ 2524 008c 2820     		movs	r0, #40
+ 2525 008e FFF7FEFF 		bl	AD9102_WriteReg
+ 2526              	.LVL282:
+2979:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
+ 2527              		.loc 1 2979 2 view .LVU804
+ 2528 0092 1FFA89F1 		uxth	r1, r9
+ 2529 0096 2920     		movs	r0, #41
+ 2530 0098 FFF7FEFF 		bl	AD9102_WriteReg
+ 2531              	.LVL283:
+2980:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
+ 2532              		.loc 1 2980 2 view .LVU805
+ 2533 009c 0021     		movs	r1, #0
+ 2534 009e 1F20     		movs	r0, #31
+ 2535 00a0 FFF7FEFF 		bl	AD9102_WriteReg
+ 2536              	.LVL284:
+2981:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
+ 2537              		.loc 1 2981 2 view .LVU806
+ 2538 00a4 0021     		movs	r1, #0
+ 2539 00a6 5C20     		movs	r0, #92
+ 2540 00a8 FFF7FEFF 		bl	AD9102_WriteReg
+ 2541              	.LVL285:
+2982:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
+ 2542              		.loc 1 2982 2 view .LVU807
+ 2543 00ac 0021     		movs	r1, #0
+ 2544 00ae 5D20     		movs	r0, #93
+ 2545 00b0 FFF7FEFF 		bl	AD9102_WriteReg
+ 2546              	.LVL286:
+2983:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+ 2547              		.loc 1 2983 2 view .LVU808
+2983:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+ARM GAS  /tmp/ccEQxcUB.s 			page 182
 
 
-2555:Src/main.c    **** 
- 2554              		.loc 1 2555 3 view .LVU805
- 2555 0050 0021     		movs	r1, #0
- 2556 0052 1F20     		movs	r0, #31
- 2557 0054 FFF7FEFF 		bl	AD9102_WriteReg
- 2558              	.LVL290:
-2559:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
- 2559              		.loc 1 2559 3 view .LVU806
- 2560 0058 0122     		movs	r2, #1
- 2561 005a 4FF40061 		mov	r1, #2048
- 2562 005e 1548     		ldr	r0, .L190
- 2563 0060 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2564              	.LVL291:
-2560:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2565              		.loc 1 2560 3 view .LVU807
- 2566 0064 0121     		movs	r1, #1
- 2567 0066 1E20     		movs	r0, #30
- 2568 0068 FFF7FEFF 		bl	AD9102_WriteReg
- 2569              	.LVL292:
-2561:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
- 2570              		.loc 1 2561 3 view .LVU808
- 2571 006c 0121     		movs	r1, #1
- 2572 006e 1D20     		movs	r0, #29
- 2573 0070 FFF7FEFF 		bl	AD9102_WriteReg
- 2574              	.LVL293:
-2562:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2575              		.loc 1 2562 3 view .LVU809
- 2576              	.LBB390:
-2562:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2577              		.loc 1 2562 8 view .LVU810
-2562:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2578              		.loc 1 2562 26 is_stmt 0 view .LVU811
- 2579 0074 0023     		movs	r3, #0
- 2580 0076 0193     		str	r3, [sp, #4]
-2562:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2581              		.loc 1 2562 3 view .LVU812
- 2582 0078 02E0     		b	.L184
- 2583              	.L185:
-2562:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2584              		.loc 1 2562 49 is_stmt 1 discriminator 3 view .LVU813
-2562:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2585              		.loc 1 2562 44 discriminator 3 view .LVU814
- 2586 007a 019B     		ldr	r3, [sp, #4]
- 2587 007c 0133     		adds	r3, r3, #1
- 2588 007e 0193     		str	r3, [sp, #4]
- 2589              	.L184:
-2562:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 2590              		.loc 1 2562 35 discriminator 1 view .LVU815
- 2591 0080 019B     		ldr	r3, [sp, #4]
- 2592 0082 B3F57A7F 		cmp	r3, #1000
- 2593 0086 F8D3     		bcc	.L185
- 2594              	.LBE390:
-2563:Src/main.c    **** 	}
- 2595              		.loc 1 2563 3 view .LVU816
- 2596 0088 0022     		movs	r2, #0
- 2597 008a 4FF40061 		mov	r1, #2048
- 2598 008e 0948     		ldr	r0, .L190
-ARM GAS  /tmp/ccwR4KB7.s 			page 178
+ 2548              		.loc 1 2983 60 is_stmt 0 view .LVU809
+ 2549 00b4 611E     		subs	r1, r4, #1
+ 2550 00b6 89B2     		uxth	r1, r1
+2983:Src/main.c    **** 	AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+ 2551              		.loc 1 2983 2 view .LVU810
+ 2552 00b8 0901     		lsls	r1, r1, #4
+ 2553 00ba 89B2     		uxth	r1, r1
+ 2554 00bc 5E20     		movs	r0, #94
+ 2555 00be FFF7FEFF 		bl	AD9102_WriteReg
+ 2556              	.LVL287:
+2984:Src/main.c    **** 
+ 2557              		.loc 1 2984 2 is_stmt 1 view .LVU811
+ 2558 00c2 0121     		movs	r1, #1
+ 2559 00c4 1D20     		movs	r0, #29
+ 2560 00c6 FFF7FEFF 		bl	AD9102_WriteReg
+ 2561              	.LVL288:
+2986:Src/main.c    **** 
+ 2562              		.loc 1 2986 2 view .LVU812
+ 2563 00ca 4246     		mov	r2, r8
+ 2564 00cc 3946     		mov	r1, r7
+ 2565 00ce 2046     		mov	r0, r4
+ 2566 00d0 FFF7FEFF 		bl	AD9102_LoadSramRamp
+ 2567              	.LVL289:
+2988:Src/main.c    **** 	{
+ 2568              		.loc 1 2988 2 view .LVU813
+2988:Src/main.c    **** 	{
+ 2569              		.loc 1 2988 5 is_stmt 0 view .LVU814
+ 2570 00d4 36B3     		cbz	r6, .L177
+2990:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
+ 2571              		.loc 1 2990 3 is_stmt 1 view .LVU815
+ 2572 00d6 0122     		movs	r2, #1
+ 2573 00d8 4FF40061 		mov	r1, #2048
+ 2574 00dc 1848     		ldr	r0, .L189+4
+ 2575 00de FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2576              	.LVL290:
+2991:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+ 2577              		.loc 1 2991 3 view .LVU816
+ 2578 00e2 0121     		movs	r1, #1
+ 2579 00e4 1E20     		movs	r0, #30
+ 2580 00e6 FFF7FEFF 		bl	AD9102_WriteReg
+ 2581              	.LVL291:
+2992:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
+ 2582              		.loc 1 2992 3 view .LVU817
+ 2583 00ea 0121     		movs	r1, #1
+ 2584 00ec 1D20     		movs	r0, #29
+ 2585 00ee FFF7FEFF 		bl	AD9102_WriteReg
+ 2586              	.LVL292:
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2587              		.loc 1 2993 3 view .LVU818
+ 2588              	.LBB417:
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2589              		.loc 1 2993 8 view .LVU819
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2590              		.loc 1 2993 26 is_stmt 0 view .LVU820
+ 2591 00f2 0023     		movs	r3, #0
+ 2592 00f4 0193     		str	r3, [sp, #4]
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ARM GAS  /tmp/ccEQxcUB.s 			page 183
 
 
- 2599 0090 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2600              	.LVL294:
- 2601              	.L186:
-2563:Src/main.c    **** 	}
- 2602              		.loc 1 2563 3 is_stmt 0 view .LVU817
- 2603              	.LBE389:
-2571:Src/main.c    **** }
- 2604              		.loc 1 2571 2 is_stmt 1 view .LVU818
-2571:Src/main.c    **** }
- 2605              		.loc 1 2571 9 is_stmt 0 view .LVU819
- 2606 0094 1E20     		movs	r0, #30
- 2607 0096 FFF7FEFF 		bl	AD9102_ReadReg
- 2608              	.LVL295:
-2572:Src/main.c    **** 
- 2609              		.loc 1 2572 1 view .LVU820
- 2610 009a 03B0     		add	sp, sp, #12
- 2611              	.LCFI30:
- 2612              		.cfi_remember_state
- 2613              		.cfi_def_cfa_offset 12
- 2614              		@ sp needed
- 2615 009c 30BD     		pop	{r4, r5, pc}
- 2616              	.LVL296:
- 2617              	.L182:
- 2618              	.LCFI31:
- 2619              		.cfi_restore_state
-2567:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 2620              		.loc 1 2567 3 is_stmt 1 view .LVU821
- 2621 009e 0021     		movs	r1, #0
- 2622              	.LVL297:
-2567:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 2623              		.loc 1 2567 3 is_stmt 0 view .LVU822
- 2624 00a0 1E20     		movs	r0, #30
- 2625              	.LVL298:
-2567:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 2626              		.loc 1 2567 3 view .LVU823
- 2627 00a2 FFF7FEFF 		bl	AD9102_WriteReg
- 2628              	.LVL299:
-2568:Src/main.c    **** 	}
- 2629              		.loc 1 2568 3 is_stmt 1 view .LVU824
- 2630 00a6 0122     		movs	r2, #1
- 2631 00a8 4FF40061 		mov	r1, #2048
- 2632 00ac 0148     		ldr	r0, .L190
- 2633 00ae FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2634              	.LVL300:
- 2635 00b2 EFE7     		b	.L186
- 2636              	.L191:
- 2637              		.align	2
- 2638              	.L190:
- 2639 00b4 000C0240 		.word	1073875968
- 2640              		.cfi_endproc
- 2641              	.LFE1215:
- 2643              		.section	.text.OUT_trigger,"ax",%progbits
- 2644              		.align	1
- 2645              		.syntax unified
- 2646              		.thumb
- 2647              		.thumb_func
- 2649              	OUT_trigger:
-ARM GAS  /tmp/ccwR4KB7.s 			page 179
+ 2593              		.loc 1 2993 3 view .LVU821
+ 2594 00f6 05E0     		b	.L178
+ 2595              	.LVL293:
+ 2596              	.L187:
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2597              		.loc 1 2993 3 view .LVU822
+ 2598              	.LBE417:
+2970:Src/main.c    **** 	}
+ 2599              		.loc 1 2970 14 view .LVU823
+ 2600 00f8 4FF6FF79 		movw	r9, #65535
+ 2601 00fc AEE7     		b	.L176
+ 2602              	.LVL294:
+ 2603              	.L179:
+ 2604              	.LBB418:
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2605              		.loc 1 2993 49 is_stmt 1 discriminator 3 view .LVU824
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2606              		.loc 1 2993 44 discriminator 3 view .LVU825
+ 2607 00fe 019B     		ldr	r3, [sp, #4]
+ 2608 0100 0133     		adds	r3, r3, #1
+ 2609 0102 0193     		str	r3, [sp, #4]
+ 2610              	.L178:
+2993:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2611              		.loc 1 2993 35 discriminator 1 view .LVU826
+ 2612 0104 019B     		ldr	r3, [sp, #4]
+ 2613 0106 B3F57A7F 		cmp	r3, #1000
+ 2614 010a F8D3     		bcc	.L179
+ 2615              	.LBE418:
+2994:Src/main.c    **** 	}
+ 2616              		.loc 1 2994 3 view .LVU827
+ 2617 010c 0022     		movs	r2, #0
+ 2618 010e 4FF40061 		mov	r1, #2048
+ 2619 0112 0B48     		ldr	r0, .L189+4
+ 2620 0114 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2621              	.LVL295:
+ 2622              	.L180:
+3002:Src/main.c    **** }
+ 2623              		.loc 1 3002 2 view .LVU828
+3002:Src/main.c    **** }
+ 2624              		.loc 1 3002 9 is_stmt 0 view .LVU829
+ 2625 0118 1E20     		movs	r0, #30
+ 2626 011a FFF7FEFF 		bl	AD9102_ReadReg
+ 2627              	.LVL296:
+3003:Src/main.c    **** 
+ 2628              		.loc 1 3003 1 view .LVU830
+ 2629 011e 03B0     		add	sp, sp, #12
+ 2630              	.LCFI26:
+ 2631              		.cfi_remember_state
+ 2632              		.cfi_def_cfa_offset 28
+ 2633              		@ sp needed
+ 2634 0120 BDE8F083 		pop	{r4, r5, r6, r7, r8, r9, pc}
+ 2635              	.LVL297:
+ 2636              	.L177:
+ 2637              	.LCFI27:
+ 2638              		.cfi_restore_state
+2998:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ 2639              		.loc 1 2998 3 is_stmt 1 view .LVU831
+ARM GAS  /tmp/ccEQxcUB.s 			page 184
 
 
- 2650              	.LVL301:
- 2651              	.LFB1210:
-2396:Src/main.c    **** 	switch (out_n)
- 2652              		.loc 1 2396 1 view -0
- 2653              		.cfi_startproc
- 2654              		@ args = 0, pretend = 0, frame = 0
- 2655              		@ frame_needed = 0, uses_anonymous_args = 0
-2396:Src/main.c    **** 	switch (out_n)
- 2656              		.loc 1 2396 1 is_stmt 0 view .LVU826
- 2657 0000 10B5     		push	{r4, lr}
- 2658              	.LCFI32:
- 2659              		.cfi_def_cfa_offset 8
- 2660              		.cfi_offset 4, -8
- 2661              		.cfi_offset 14, -4
-2397:Src/main.c    **** 	{
- 2662              		.loc 1 2397 2 is_stmt 1 view .LVU827
- 2663 0002 0928     		cmp	r0, #9
- 2664 0004 13D8     		bhi	.L192
- 2665 0006 DFE800F0 		tbb	[pc, r0]
- 2666              	.L195:
- 2667 000a 05       		.byte	(.L204-.L195)/2
- 2668 000b 13       		.byte	(.L203-.L195)/2
- 2669 000c 21       		.byte	(.L202-.L195)/2
- 2670 000d 2F       		.byte	(.L201-.L195)/2
- 2671 000e 3D       		.byte	(.L200-.L195)/2
- 2672 000f 4B       		.byte	(.L199-.L195)/2
- 2673 0010 59       		.byte	(.L198-.L195)/2
- 2674 0011 65       		.byte	(.L197-.L195)/2
- 2675 0012 71       		.byte	(.L196-.L195)/2
- 2676 0013 7D       		.byte	(.L194-.L195)/2
- 2677              		.p2align 1
- 2678              	.L204:
-2400:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
- 2679              		.loc 1 2400 3 view .LVU828
- 2680 0014 414C     		ldr	r4, .L207
- 2681 0016 0122     		movs	r2, #1
- 2682 0018 4FF48061 		mov	r1, #1024
- 2683 001c 2046     		mov	r0, r4
- 2684              	.LVL302:
-2400:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
- 2685              		.loc 1 2400 3 is_stmt 0 view .LVU829
- 2686 001e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2687              	.LVL303:
-2401:Src/main.c    **** 	break;
- 2688              		.loc 1 2401 3 is_stmt 1 view .LVU830
- 2689 0022 0022     		movs	r2, #0
- 2690 0024 4FF48061 		mov	r1, #1024
- 2691 0028 2046     		mov	r0, r4
- 2692 002a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2693              	.LVL304:
-2402:Src/main.c    **** 
- 2694              		.loc 1 2402 2 view .LVU831
- 2695              	.L192:
-2449:Src/main.c    **** 
- 2696              		.loc 1 2449 1 is_stmt 0 view .LVU832
- 2697 002e 10BD     		pop	{r4, pc}
- 2698              	.LVL305:
-ARM GAS  /tmp/ccwR4KB7.s 			page 180
+ 2640 0124 0021     		movs	r1, #0
+ 2641 0126 1E20     		movs	r0, #30
+ 2642 0128 FFF7FEFF 		bl	AD9102_WriteReg
+ 2643              	.LVL298:
+2999:Src/main.c    **** 	}
+ 2644              		.loc 1 2999 3 view .LVU832
+ 2645 012c 0122     		movs	r2, #1
+ 2646 012e 4FF40061 		mov	r1, #2048
+ 2647 0132 0348     		ldr	r0, .L189+4
+ 2648 0134 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2649              	.LVL299:
+ 2650 0138 EEE7     		b	.L180
+ 2651              	.L190:
+ 2652 013a 00BF     		.align	2
+ 2653              	.L189:
+ 2654 013c 00000000 		.word	ad9102_example2_regval
+ 2655 0140 000C0240 		.word	1073875968
+ 2656              		.cfi_endproc
+ 2657              	.LFE1222:
+ 2659              		.section	.text.AD9102_Apply,"ax",%progbits
+ 2660              		.align	1
+ 2661              		.syntax unified
+ 2662              		.thumb
+ 2663              		.thumb_func
+ 2665              	AD9102_Apply:
+ 2666              	.LVL300:
+ 2667              	.LFB1220:
+2801:Src/main.c    **** 	if (enable)
+ 2668              		.loc 1 2801 1 view -0
+ 2669              		.cfi_startproc
+ 2670              		@ args = 4, pretend = 0, frame = 8
+ 2671              		@ frame_needed = 0, uses_anonymous_args = 0
+2801:Src/main.c    **** 	if (enable)
+ 2672              		.loc 1 2801 1 is_stmt 0 view .LVU834
+ 2673 0000 30B5     		push	{r4, r5, lr}
+ 2674              	.LCFI28:
+ 2675              		.cfi_def_cfa_offset 12
+ 2676              		.cfi_offset 4, -12
+ 2677              		.cfi_offset 5, -8
+ 2678              		.cfi_offset 14, -4
+ 2679 0002 83B0     		sub	sp, sp, #12
+ 2680              	.LCFI29:
+ 2681              		.cfi_def_cfa_offset 24
+2802:Src/main.c    **** 	{
+ 2682              		.loc 1 2802 2 is_stmt 1 view .LVU835
+2802:Src/main.c    **** 	{
+ 2683              		.loc 1 2802 5 is_stmt 0 view .LVU836
+ 2684 0004 0029     		cmp	r1, #0
+ 2685 0006 4AD0     		beq	.L192
+ 2686              	.LBB419:
+2804:Src/main.c    **** 		uint16_t pat_timebase;
+ 2687              		.loc 1 2804 3 is_stmt 1 view .LVU837
+2805:Src/main.c    **** 
+ 2688              		.loc 1 2805 3 view .LVU838
+2807:Src/main.c    **** 		{
+ 2689              		.loc 1 2807 3 view .LVU839
+2807:Src/main.c    **** 		{
+ARM GAS  /tmp/ccEQxcUB.s 			page 185
 
 
- 2699              	.L203:
-2405:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
- 2700              		.loc 1 2405 3 is_stmt 1 view .LVU833
- 2701 0030 3A4C     		ldr	r4, .L207
- 2702 0032 0122     		movs	r2, #1
- 2703 0034 4FF40061 		mov	r1, #2048
- 2704 0038 2046     		mov	r0, r4
- 2705              	.LVL306:
-2405:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
- 2706              		.loc 1 2405 3 is_stmt 0 view .LVU834
- 2707 003a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2708              	.LVL307:
-2406:Src/main.c    **** 	break;
- 2709              		.loc 1 2406 3 is_stmt 1 view .LVU835
- 2710 003e 0022     		movs	r2, #0
- 2711 0040 4FF40061 		mov	r1, #2048
- 2712 0044 2046     		mov	r0, r4
- 2713 0046 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2714              	.LVL308:
-2407:Src/main.c    **** 
- 2715              		.loc 1 2407 2 view .LVU836
- 2716 004a F0E7     		b	.L192
- 2717              	.LVL309:
- 2718              	.L202:
-2410:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
- 2719              		.loc 1 2410 3 view .LVU837
- 2720 004c 334C     		ldr	r4, .L207
- 2721 004e 0122     		movs	r2, #1
- 2722 0050 4FF48051 		mov	r1, #4096
- 2723 0054 2046     		mov	r0, r4
- 2724              	.LVL310:
-2410:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
- 2725              		.loc 1 2410 3 is_stmt 0 view .LVU838
- 2726 0056 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2727              	.LVL311:
-2411:Src/main.c    **** 	break;
- 2728              		.loc 1 2411 3 is_stmt 1 view .LVU839
- 2729 005a 0022     		movs	r2, #0
- 2730 005c 4FF48051 		mov	r1, #4096
- 2731 0060 2046     		mov	r0, r4
- 2732 0062 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2733              	.LVL312:
-2412:Src/main.c    **** 
- 2734              		.loc 1 2412 2 view .LVU840
- 2735 0066 E2E7     		b	.L192
- 2736              	.LVL313:
- 2737              	.L201:
-2415:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
- 2738              		.loc 1 2415 3 view .LVU841
- 2739 0068 2C4C     		ldr	r4, .L207
- 2740 006a 0122     		movs	r2, #1
- 2741 006c 4FF40051 		mov	r1, #8192
- 2742 0070 2046     		mov	r0, r4
- 2743              	.LVL314:
-2415:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
- 2744              		.loc 1 2415 3 is_stmt 0 view .LVU842
- 2745 0072 FFF7FEFF 		bl	HAL_GPIO_WritePin
-ARM GAS  /tmp/ccwR4KB7.s 			page 181
+ 2690              		.loc 1 2807 6 is_stmt 0 view .LVU840
+ 2691 0008 1AB1     		cbz	r2, .L197
+2811:Src/main.c    **** 		{
+ 2692              		.loc 1 2811 3 is_stmt 1 view .LVU841
+2811:Src/main.c    **** 		{
+ 2693              		.loc 1 2811 6 is_stmt 0 view .LVU842
+ 2694 000a 3F2A     		cmp	r2, #63
+ 2695 000c 02D9     		bls	.L193
+2813:Src/main.c    **** 		}
+ 2696              		.loc 1 2813 13 view .LVU843
+ 2697 000e 3F22     		movs	r2, #63
+ 2698              	.LVL301:
+2813:Src/main.c    **** 		}
+ 2699              		.loc 1 2813 13 view .LVU844
+ 2700 0010 00E0     		b	.L193
+ 2701              	.LVL302:
+ 2702              	.L197:
+2809:Src/main.c    **** 		}
+ 2703              		.loc 1 2809 13 view .LVU845
+ 2704 0012 0122     		movs	r2, #1
+ 2705              	.LVL303:
+ 2706              	.L193:
+2815:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
+ 2707              		.loc 1 2815 3 is_stmt 1 view .LVU846
+2816:Src/main.c    **** 		pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
+ 2708              		.loc 1 2816 25 is_stmt 0 view .LVU847
+ 2709 0014 00F00300 		and	r0, r0, #3
+ 2710              	.LVL304:
+2815:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
+ 2711              		.loc 1 2815 60 view .LVU848
+ 2712 0018 9200     		lsls	r2, r2, #2
+ 2713              	.LVL305:
+2815:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
+ 2714              		.loc 1 2815 60 view .LVU849
+ 2715 001a D2B2     		uxtb	r2, r2
+2815:Src/main.c    **** 		                     ((uint16_t)(saw_type & 0x3u)));
+ 2716              		.loc 1 2815 11 view .LVU850
+ 2717 001c 40EA0204 		orr	r4, r0, r2
+ 2718              	.LVL306:
+2817:Src/main.c    **** 		                          ((pat_base & 0x0Fu) << 4) |
+ 2719              		.loc 1 2817 3 is_stmt 1 view .LVU851
+2818:Src/main.c    **** 		                          (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
+ 2720              		.loc 1 2818 49 is_stmt 0 view .LVU852
+ 2721 0020 1B01     		lsls	r3, r3, #4
+ 2722              	.LVL307:
+2818:Src/main.c    **** 		                          (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
+ 2723              		.loc 1 2818 49 view .LVU853
+ 2724 0022 03F0F003 		and	r3, r3, #240
+2817:Src/main.c    **** 		                          ((pat_base & 0x0Fu) << 4) |
+ 2725              		.loc 1 2817 16 view .LVU854
+ 2726 0026 40F20115 		movw	r5, #257
+ 2727 002a 1D43     		orrs	r5, r5, r3
+ 2728              	.LVL308:
+2821:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
+ 2729              		.loc 1 2821 3 is_stmt 1 view .LVU855
+ 2730 002c 43F21221 		movw	r1, #12818
+ 2731              	.LVL309:
+ARM GAS  /tmp/ccEQxcUB.s 			page 186
 
 
- 2746              	.LVL315:
-2416:Src/main.c    **** 	break;
- 2747              		.loc 1 2416 3 is_stmt 1 view .LVU843
- 2748 0076 0022     		movs	r2, #0
- 2749 0078 4FF40051 		mov	r1, #8192
- 2750 007c 2046     		mov	r0, r4
- 2751 007e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2752              	.LVL316:
-2417:Src/main.c    **** 
- 2753              		.loc 1 2417 2 view .LVU844
- 2754 0082 D4E7     		b	.L192
- 2755              	.LVL317:
- 2756              	.L200:
-2420:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
- 2757              		.loc 1 2420 3 view .LVU845
- 2758 0084 254C     		ldr	r4, .L207
- 2759 0086 0122     		movs	r2, #1
- 2760 0088 4FF48041 		mov	r1, #16384
- 2761 008c 2046     		mov	r0, r4
- 2762              	.LVL318:
-2420:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
- 2763              		.loc 1 2420 3 is_stmt 0 view .LVU846
- 2764 008e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2765              	.LVL319:
-2421:Src/main.c    **** 	break;
- 2766              		.loc 1 2421 3 is_stmt 1 view .LVU847
- 2767 0092 0022     		movs	r2, #0
- 2768 0094 4FF48041 		mov	r1, #16384
- 2769 0098 2046     		mov	r0, r4
- 2770 009a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2771              	.LVL320:
-2422:Src/main.c    **** 
- 2772              		.loc 1 2422 2 view .LVU848
- 2773 009e C6E7     		b	.L192
- 2774              	.LVL321:
- 2775              	.L199:
-2425:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
- 2776              		.loc 1 2425 3 view .LVU849
- 2777 00a0 1E4C     		ldr	r4, .L207
- 2778 00a2 0122     		movs	r2, #1
- 2779 00a4 4FF40041 		mov	r1, #32768
- 2780 00a8 2046     		mov	r0, r4
- 2781              	.LVL322:
-2425:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
- 2782              		.loc 1 2425 3 is_stmt 0 view .LVU850
- 2783 00aa FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2784              	.LVL323:
-2426:Src/main.c    **** 	break;
- 2785              		.loc 1 2426 3 is_stmt 1 view .LVU851
- 2786 00ae 0022     		movs	r2, #0
- 2787 00b0 4FF40041 		mov	r1, #32768
- 2788 00b4 2046     		mov	r0, r4
- 2789 00b6 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2790              	.LVL324:
-2427:Src/main.c    **** 
- 2791              		.loc 1 2427 2 view .LVU852
- 2792 00ba B8E7     		b	.L192
-ARM GAS  /tmp/ccwR4KB7.s 			page 182
+2821:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
+ 2732              		.loc 1 2821 3 is_stmt 0 view .LVU856
+ 2733 0030 2720     		movs	r0, #39
+ 2734 0032 FFF7FEFF 		bl	AD9102_WriteReg
+ 2735              	.LVL310:
+2822:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
+ 2736              		.loc 1 2822 3 is_stmt 1 view .LVU857
+ 2737 0036 2146     		mov	r1, r4
+ 2738 0038 3720     		movs	r0, #55
+ 2739 003a FFF7FEFF 		bl	AD9102_WriteReg
+ 2740              	.LVL311:
+2823:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
+ 2741              		.loc 1 2823 3 view .LVU858
+ 2742 003e 2946     		mov	r1, r5
+ 2743 0040 2820     		movs	r0, #40
+ 2744 0042 FFF7FEFF 		bl	AD9102_WriteReg
+ 2745              	.LVL312:
+2824:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
+ 2746              		.loc 1 2824 3 view .LVU859
+ 2747 0046 BDF81810 		ldrh	r1, [sp, #24]
+ 2748 004a 2920     		movs	r0, #41
+ 2749 004c FFF7FEFF 		bl	AD9102_WriteReg
+ 2750              	.LVL313:
+2825:Src/main.c    **** 
+ 2751              		.loc 1 2825 3 view .LVU860
+ 2752 0050 0021     		movs	r1, #0
+ 2753 0052 1F20     		movs	r0, #31
+ 2754 0054 FFF7FEFF 		bl	AD9102_WriteReg
+ 2755              	.LVL314:
+2829:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
+ 2756              		.loc 1 2829 3 view .LVU861
+ 2757 0058 0122     		movs	r2, #1
+ 2758 005a 4FF40061 		mov	r1, #2048
+ 2759 005e 1548     		ldr	r0, .L200
+ 2760 0060 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2761              	.LVL315:
+2830:Src/main.c    **** 		AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
+ 2762              		.loc 1 2830 3 view .LVU862
+ 2763 0064 0121     		movs	r1, #1
+ 2764 0066 1E20     		movs	r0, #30
+ 2765 0068 FFF7FEFF 		bl	AD9102_WriteReg
+ 2766              	.LVL316:
+2831:Src/main.c    **** 		for (volatile uint32_t d = 0; d < 1000; d++) {}
+ 2767              		.loc 1 2831 3 view .LVU863
+ 2768 006c 0121     		movs	r1, #1
+ 2769 006e 1D20     		movs	r0, #29
+ 2770 0070 FFF7FEFF 		bl	AD9102_WriteReg
+ 2771              	.LVL317:
+2832:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2772              		.loc 1 2832 3 view .LVU864
+ 2773              	.LBB420:
+2832:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2774              		.loc 1 2832 8 view .LVU865
+2832:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2775              		.loc 1 2832 26 is_stmt 0 view .LVU866
+ 2776 0074 0023     		movs	r3, #0
+ 2777 0076 0193     		str	r3, [sp, #4]
+ARM GAS  /tmp/ccEQxcUB.s 			page 187
 
 
- 2793              	.LVL325:
- 2794              	.L198:
-2430:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
- 2795              		.loc 1 2430 3 view .LVU853
- 2796 00bc 184C     		ldr	r4, .L207+4
- 2797 00be 0122     		movs	r2, #1
- 2798 00c0 1021     		movs	r1, #16
- 2799 00c2 2046     		mov	r0, r4
- 2800              	.LVL326:
-2430:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
- 2801              		.loc 1 2430 3 is_stmt 0 view .LVU854
- 2802 00c4 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2803              	.LVL327:
-2431:Src/main.c    **** 	break;
- 2804              		.loc 1 2431 3 is_stmt 1 view .LVU855
- 2805 00c8 0022     		movs	r2, #0
- 2806 00ca 1021     		movs	r1, #16
- 2807 00cc 2046     		mov	r0, r4
- 2808 00ce FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2809              	.LVL328:
-2432:Src/main.c    **** 
- 2810              		.loc 1 2432 2 view .LVU856
- 2811 00d2 ACE7     		b	.L192
- 2812              	.LVL329:
- 2813              	.L197:
-2435:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
- 2814              		.loc 1 2435 3 view .LVU857
- 2815 00d4 124C     		ldr	r4, .L207+4
- 2816 00d6 0122     		movs	r2, #1
- 2817 00d8 2021     		movs	r1, #32
- 2818 00da 2046     		mov	r0, r4
- 2819              	.LVL330:
-2435:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
- 2820              		.loc 1 2435 3 is_stmt 0 view .LVU858
- 2821 00dc FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2822              	.LVL331:
-2436:Src/main.c    **** 	break;
- 2823              		.loc 1 2436 3 is_stmt 1 view .LVU859
- 2824 00e0 0022     		movs	r2, #0
- 2825 00e2 2021     		movs	r1, #32
- 2826 00e4 2046     		mov	r0, r4
- 2827 00e6 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2828              	.LVL332:
-2437:Src/main.c    **** 
- 2829              		.loc 1 2437 2 view .LVU860
- 2830 00ea A0E7     		b	.L192
- 2831              	.LVL333:
- 2832              	.L196:
-2440:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
- 2833              		.loc 1 2440 3 view .LVU861
- 2834 00ec 0C4C     		ldr	r4, .L207+4
- 2835 00ee 0122     		movs	r2, #1
- 2836 00f0 4021     		movs	r1, #64
- 2837 00f2 2046     		mov	r0, r4
- 2838              	.LVL334:
-2440:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
- 2839              		.loc 1 2440 3 is_stmt 0 view .LVU862
-ARM GAS  /tmp/ccwR4KB7.s 			page 183
+2832:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2778              		.loc 1 2832 3 view .LVU867
+ 2779 0078 02E0     		b	.L194
+ 2780              	.L195:
+2832:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2781              		.loc 1 2832 49 is_stmt 1 discriminator 3 view .LVU868
+2832:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2782              		.loc 1 2832 44 discriminator 3 view .LVU869
+ 2783 007a 019B     		ldr	r3, [sp, #4]
+ 2784 007c 0133     		adds	r3, r3, #1
+ 2785 007e 0193     		str	r3, [sp, #4]
+ 2786              	.L194:
+2832:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+ 2787              		.loc 1 2832 35 discriminator 1 view .LVU870
+ 2788 0080 019B     		ldr	r3, [sp, #4]
+ 2789 0082 B3F57A7F 		cmp	r3, #1000
+ 2790 0086 F8D3     		bcc	.L195
+ 2791              	.LBE420:
+2833:Src/main.c    **** 	}
+ 2792              		.loc 1 2833 3 view .LVU871
+ 2793 0088 0022     		movs	r2, #0
+ 2794 008a 4FF40061 		mov	r1, #2048
+ 2795 008e 0948     		ldr	r0, .L200
+ 2796 0090 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2797              	.LVL318:
+ 2798              	.L196:
+2833:Src/main.c    **** 	}
+ 2799              		.loc 1 2833 3 is_stmt 0 view .LVU872
+ 2800              	.LBE419:
+2841:Src/main.c    **** }
+ 2801              		.loc 1 2841 2 is_stmt 1 view .LVU873
+2841:Src/main.c    **** }
+ 2802              		.loc 1 2841 9 is_stmt 0 view .LVU874
+ 2803 0094 1E20     		movs	r0, #30
+ 2804 0096 FFF7FEFF 		bl	AD9102_ReadReg
+ 2805              	.LVL319:
+2842:Src/main.c    **** 
+ 2806              		.loc 1 2842 1 view .LVU875
+ 2807 009a 03B0     		add	sp, sp, #12
+ 2808              	.LCFI30:
+ 2809              		.cfi_remember_state
+ 2810              		.cfi_def_cfa_offset 12
+ 2811              		@ sp needed
+ 2812 009c 30BD     		pop	{r4, r5, pc}
+ 2813              	.LVL320:
+ 2814              	.L192:
+ 2815              	.LCFI31:
+ 2816              		.cfi_restore_state
+2837:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ 2817              		.loc 1 2837 3 is_stmt 1 view .LVU876
+ 2818 009e 0021     		movs	r1, #0
+ 2819              	.LVL321:
+2837:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ 2820              		.loc 1 2837 3 is_stmt 0 view .LVU877
+ 2821 00a0 1E20     		movs	r0, #30
+ 2822              	.LVL322:
+2837:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ARM GAS  /tmp/ccEQxcUB.s 			page 188
 
 
- 2840 00f4 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2841              	.LVL335:
-2441:Src/main.c    **** 	break;
- 2842              		.loc 1 2441 3 is_stmt 1 view .LVU863
- 2843 00f8 0022     		movs	r2, #0
- 2844 00fa 4021     		movs	r1, #64
- 2845 00fc 2046     		mov	r0, r4
- 2846 00fe FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2847              	.LVL336:
-2442:Src/main.c    **** 
- 2848              		.loc 1 2442 2 view .LVU864
- 2849 0102 94E7     		b	.L192
- 2850              	.LVL337:
- 2851              	.L194:
-2445:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
- 2852              		.loc 1 2445 3 view .LVU865
- 2853 0104 064C     		ldr	r4, .L207+4
- 2854 0106 0122     		movs	r2, #1
- 2855 0108 8021     		movs	r1, #128
- 2856 010a 2046     		mov	r0, r4
- 2857              	.LVL338:
-2445:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
- 2858              		.loc 1 2445 3 is_stmt 0 view .LVU866
- 2859 010c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2860              	.LVL339:
-2446:Src/main.c    **** 	break;
- 2861              		.loc 1 2446 3 is_stmt 1 view .LVU867
- 2862 0110 0022     		movs	r2, #0
- 2863 0112 8021     		movs	r1, #128
- 2864 0114 2046     		mov	r0, r4
- 2865 0116 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2866              	.LVL340:
-2447:Src/main.c    **** 	}
- 2867              		.loc 1 2447 2 view .LVU868
-2449:Src/main.c    **** 
- 2868              		.loc 1 2449 1 is_stmt 0 view .LVU869
- 2869 011a 88E7     		b	.L192
- 2870              	.L208:
- 2871              		.align	2
- 2872              	.L207:
- 2873 011c 00180240 		.word	1073879040
- 2874 0120 00040240 		.word	1073873920
- 2875              		.cfi_endproc
- 2876              	.LFE1210:
- 2878              		.section	.text.MPhD_T,"ax",%progbits
- 2879              		.align	1
- 2880              		.syntax unified
- 2881              		.thumb
- 2882              		.thumb_func
- 2884              	MPhD_T:
- 2885              	.LVL341:
- 2886              	.LFB1221:
-2949:Src/main.c    **** 	uint16_t P;
- 2887              		.loc 1 2949 1 is_stmt 1 view -0
- 2888              		.cfi_startproc
- 2889              		@ args = 0, pretend = 0, frame = 0
- 2890              		@ frame_needed = 0, uses_anonymous_args = 0
-ARM GAS  /tmp/ccwR4KB7.s 			page 184
+ 2823              		.loc 1 2837 3 view .LVU878
+ 2824 00a2 FFF7FEFF 		bl	AD9102_WriteReg
+ 2825              	.LVL323:
+2838:Src/main.c    **** 	}
+ 2826              		.loc 1 2838 3 is_stmt 1 view .LVU879
+ 2827 00a6 0122     		movs	r2, #1
+ 2828 00a8 4FF40061 		mov	r1, #2048
+ 2829 00ac 0148     		ldr	r0, .L200
+ 2830 00ae FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2831              	.LVL324:
+ 2832 00b2 EFE7     		b	.L196
+ 2833              	.L201:
+ 2834              		.align	2
+ 2835              	.L200:
+ 2836 00b4 000C0240 		.word	1073875968
+ 2837              		.cfi_endproc
+ 2838              	.LFE1220:
+ 2840              		.section	.text.AD9833_WriteWord,"ax",%progbits
+ 2841              		.align	1
+ 2842              		.syntax unified
+ 2843              		.thumb
+ 2844              		.thumb_func
+ 2846              	AD9833_WriteWord:
+ 2847              	.LVL325:
+ 2848              	.LFB1214:
+2654:Src/main.c    **** 	uint32_t tmp32 = 0;
+ 2849              		.loc 1 2654 1 view -0
+ 2850              		.cfi_startproc
+ 2851              		@ args = 0, pretend = 0, frame = 0
+ 2852              		@ frame_needed = 0, uses_anonymous_args = 0
+2654:Src/main.c    **** 	uint32_t tmp32 = 0;
+ 2853              		.loc 1 2654 1 is_stmt 0 view .LVU881
+ 2854 0000 38B5     		push	{r3, r4, r5, lr}
+ 2855              	.LCFI32:
+ 2856              		.cfi_def_cfa_offset 16
+ 2857              		.cfi_offset 3, -16
+ 2858              		.cfi_offset 4, -12
+ 2859              		.cfi_offset 5, -8
+ 2860              		.cfi_offset 14, -4
+ 2861 0002 0446     		mov	r4, r0
+2655:Src/main.c    **** 
+ 2862              		.loc 1 2655 2 is_stmt 1 view .LVU882
+ 2863              	.LVL326:
+2657:Src/main.c    **** 
+ 2864              		.loc 1 2657 2 view .LVU883
+ 2865 0004 0021     		movs	r1, #0
+ 2866 0006 0220     		movs	r0, #2
+ 2867              	.LVL327:
+2657:Src/main.c    **** 
+ 2868              		.loc 1 2657 2 is_stmt 0 view .LVU884
+ 2869 0008 FFF7FEFF 		bl	SPI2_SetMode
+ 2870              	.LVL328:
+2659:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+ 2871              		.loc 1 2659 2 is_stmt 1 view .LVU885
+ 2872 000c 1E4D     		ldr	r5, .L210
+ 2873 000e 0122     		movs	r2, #1
+ 2874 0010 4FF48051 		mov	r1, #4096
+ARM GAS  /tmp/ccEQxcUB.s 			page 189
 
 
-2949:Src/main.c    **** 	uint16_t P;
- 2891              		.loc 1 2949 1 is_stmt 0 view .LVU871
- 2892 0000 38B5     		push	{r3, r4, r5, lr}
- 2893              	.LCFI33:
- 2894              		.cfi_def_cfa_offset 16
- 2895              		.cfi_offset 3, -16
- 2896              		.cfi_offset 4, -12
- 2897              		.cfi_offset 5, -8
- 2898              		.cfi_offset 14, -4
- 2899 0002 0446     		mov	r4, r0
-2950:Src/main.c    **** 	uint32_t tmp32;
- 2900              		.loc 1 2950 2 is_stmt 1 view .LVU872
-2951:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- 2901              		.loc 1 2951 2 view .LVU873
-2952:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- 2902              		.loc 1 2952 2 view .LVU874
- 2903 0004 0022     		movs	r2, #0
- 2904 0006 4FF48041 		mov	r1, #16384
- 2905 000a 8148     		ldr	r0, .L250
- 2906              	.LVL342:
-2952:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- 2907              		.loc 1 2952 2 is_stmt 0 view .LVU875
- 2908 000c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2909              	.LVL343:
-2953:Src/main.c    **** 	tmp32=0;
- 2910              		.loc 1 2953 2 is_stmt 1 view .LVU876
- 2911 0010 0022     		movs	r2, #0
- 2912 0012 4FF40071 		mov	r1, #512
- 2913 0016 7F48     		ldr	r0, .L250+4
- 2914 0018 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2915              	.LVL344:
-2954:Src/main.c    **** 	while(tmp32<500){tmp32++;}
- 2916              		.loc 1 2954 2 view .LVU877
-2955:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 2917              		.loc 1 2955 2 view .LVU878
-2954:Src/main.c    **** 	while(tmp32<500){tmp32++;}
- 2918              		.loc 1 2954 7 is_stmt 0 view .LVU879
- 2919 001c 0023     		movs	r3, #0
-2955:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 2920              		.loc 1 2955 7 view .LVU880
- 2921 001e 00E0     		b	.L210
- 2922              	.LVL345:
- 2923              	.L211:
-2955:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 2924              		.loc 1 2955 19 is_stmt 1 discriminator 2 view .LVU881
-2955:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 2925              		.loc 1 2955 24 is_stmt 0 discriminator 2 view .LVU882
- 2926 0020 0133     		adds	r3, r3, #1
- 2927              	.LVL346:
- 2928              	.L210:
-2955:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 2929              		.loc 1 2955 13 is_stmt 1 discriminator 1 view .LVU883
- 2930 0022 B3F5FA7F 		cmp	r3, #500
- 2931 0026 FBD3     		bcc	.L211
-2956:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 2932              		.loc 1 2956 2 view .LVU884
- 2933 0028 0122     		movs	r2, #1
-ARM GAS  /tmp/ccwR4KB7.s 			page 185
+ 2875 0014 2846     		mov	r0, r5
+ 2876 0016 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2877              	.LVL329:
+2660:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+ 2878              		.loc 1 2660 2 view .LVU886
+ 2879 001a 0122     		movs	r2, #1
+ 2880 001c 4FF48041 		mov	r1, #16384
+ 2881 0020 2846     		mov	r0, r5
+ 2882 0022 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2883              	.LVL330:
+2661:Src/main.c    **** 
+ 2884              		.loc 1 2661 2 view .LVU887
+ 2885 0026 05F50065 		add	r5, r5, #2048
+ 2886 002a 0122     		movs	r2, #1
+ 2887 002c 4FF48051 		mov	r1, #4096
+ 2888 0030 2846     		mov	r0, r5
+ 2889 0032 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2890              	.LVL331:
+2663:Src/main.c    **** 
+ 2891              		.loc 1 2663 2 view .LVU888
+ 2892 0036 0022     		movs	r2, #0
+ 2893 0038 4FF40051 		mov	r1, #8192
+ 2894 003c 2846     		mov	r0, r5
+ 2895 003e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2896              	.LVL332:
+2665:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, word);
+ 2897              		.loc 1 2665 2 view .LVU889
+2655:Src/main.c    **** 
+ 2898              		.loc 1 2655 11 is_stmt 0 view .LVU890
+ 2899 0042 0023     		movs	r3, #0
+ 2900              	.LVL333:
+ 2901              	.L204:
+2665:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, word);
+ 2902              		.loc 1 2665 63 is_stmt 1 discriminator 2 view .LVU891
+2665:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, word);
+ 2903              		.loc 1 2665 41 discriminator 2 view .LVU892
+ 2904              	.LBB421:
+ 2905              	.LBI421:
+ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 2906              		.loc 4 916 26 view .LVU893
+ 2907              	.LBB422:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 2908              		.loc 4 918 3 view .LVU894
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 2909              		.loc 4 918 12 is_stmt 0 view .LVU895
+ 2910 0044 114A     		ldr	r2, .L210+4
+ 2911 0046 9268     		ldr	r2, [r2, #8]
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 2912              		.loc 4 918 66 view .LVU896
+ 2913 0048 12F0020F 		tst	r2, #2
+ 2914 004c 05D1     		bne	.L203
+ 2915              	.LVL334:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 2916              		.loc 4 918 66 view .LVU897
+ 2917              	.LBE422:
+ 2918              	.LBE421:
+2665:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, word);
+ARM GAS  /tmp/ccEQxcUB.s 			page 190
 
 
- 2934 002a 4FF48041 		mov	r1, #16384
- 2935 002e 7848     		ldr	r0, .L250
- 2936 0030 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2937              	.LVL347:
-2957:Src/main.c    **** 	tmp32=0;
- 2938              		.loc 1 2957 2 view .LVU885
- 2939 0034 0122     		movs	r2, #1
- 2940 0036 4FF40071 		mov	r1, #512
- 2941 003a 7648     		ldr	r0, .L250+4
- 2942 003c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2943              	.LVL348:
-2958:Src/main.c    **** 	while(tmp32<500){tmp32++;}
- 2944              		.loc 1 2958 2 view .LVU886
-2959:Src/main.c    **** 	if (num==1)//MPD1
- 2945              		.loc 1 2959 2 view .LVU887
-2958:Src/main.c    **** 	while(tmp32<500){tmp32++;}
- 2946              		.loc 1 2958 7 is_stmt 0 view .LVU888
- 2947 0040 0023     		movs	r3, #0
-2959:Src/main.c    **** 	if (num==1)//MPD1
- 2948              		.loc 1 2959 7 view .LVU889
- 2949 0042 00E0     		b	.L212
- 2950              	.LVL349:
- 2951              	.L213:
-2959:Src/main.c    **** 	if (num==1)//MPD1
- 2952              		.loc 1 2959 19 is_stmt 1 discriminator 2 view .LVU890
-2959:Src/main.c    **** 	if (num==1)//MPD1
- 2953              		.loc 1 2959 24 is_stmt 0 discriminator 2 view .LVU891
- 2954 0044 0133     		adds	r3, r3, #1
- 2955              	.LVL350:
- 2956              	.L212:
-2959:Src/main.c    **** 	if (num==1)//MPD1
- 2957              		.loc 1 2959 13 is_stmt 1 discriminator 1 view .LVU892
- 2958 0046 B3F5FA7F 		cmp	r3, #500
- 2959 004a FBD3     		bcc	.L213
-2960:Src/main.c    **** 	{
- 2960              		.loc 1 2960 2 view .LVU893
- 2961 004c 631E     		subs	r3, r4, #1
- 2962              	.LVL351:
-2960:Src/main.c    **** 	{
- 2963              		.loc 1 2960 2 is_stmt 0 view .LVU894
- 2964 004e 032B     		cmp	r3, #3
- 2965 0050 39D8     		bhi	.L214
- 2966 0052 DFE803F0 		tbb	[pc, r3]
- 2967              	.L216:
- 2968 0056 02       		.byte	(.L219-.L216)/2
- 2969 0057 3A       		.byte	(.L218-.L216)/2
- 2970 0058 6F       		.byte	(.L217-.L216)/2
- 2971 0059 A6       		.byte	(.L215-.L216)/2
- 2972              		.p2align 1
- 2973              	.L219:
-2962:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
- 2974              		.loc 1 2962 3 is_stmt 1 view .LVU895
- 2975 005a 6D4C     		ldr	r4, .L250
- 2976              	.LVL352:
-2962:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
- 2977              		.loc 1 2962 3 is_stmt 0 view .LVU896
- 2978 005c 0122     		movs	r2, #1
-ARM GAS  /tmp/ccwR4KB7.s 			page 186
-
-
- 2979 005e 4FF40061 		mov	r1, #2048
- 2980 0062 2046     		mov	r0, r4
- 2981 0064 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2982              	.LVL353:
-2963:Src/main.c    **** 		tmp32=0;
- 2983              		.loc 1 2963 3 is_stmt 1 view .LVU897
- 2984 0068 0022     		movs	r2, #0
- 2985 006a 4FF48061 		mov	r1, #1024
- 2986 006e 2046     		mov	r0, r4
- 2987 0070 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 2988              	.LVL354:
-2964:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 2989              		.loc 1 2964 3 view .LVU898
-2965:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 2990              		.loc 1 2965 3 view .LVU899
-2964:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 2991              		.loc 1 2964 8 is_stmt 0 view .LVU900
- 2992 0074 0023     		movs	r3, #0
-2965:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 2993              		.loc 1 2965 8 view .LVU901
- 2994 0076 00E0     		b	.L220
- 2995              	.LVL355:
- 2996              	.L221:
-2965:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 2997              		.loc 1 2965 20 is_stmt 1 discriminator 2 view .LVU902
-2965:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 2998              		.loc 1 2965 25 is_stmt 0 discriminator 2 view .LVU903
- 2999 0078 0133     		adds	r3, r3, #1
- 3000              	.LVL356:
- 3001              	.L220:
-2965:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3002              		.loc 1 2965 14 is_stmt 1 discriminator 1 view .LVU904
- 3003 007a B3F5FA7F 		cmp	r3, #500
- 3004 007e FBD3     		bcc	.L221
-2967:Src/main.c    **** 		tmp32 = 0;
- 3005              		.loc 1 2967 3 view .LVU905
- 3006              	.LVL357:
- 3007              	.LBB391:
- 3008              	.LBI391:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3009              		.loc 4 358 22 view .LVU906
- 3010              	.LBB392:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3011              		.loc 4 360 3 view .LVU907
- 3012 0080 654A     		ldr	r2, .L250+8
- 3013 0082 1368     		ldr	r3, [r2]
- 3014              	.LVL358:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3015              		.loc 4 360 3 is_stmt 0 view .LVU908
- 3016 0084 43F04003 		orr	r3, r3, #64
- 3017 0088 1360     		str	r3, [r2]
- 3018              	.LVL359:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3019              		.loc 4 360 3 view .LVU909
- 3020              	.LBE392:
- 3021              	.LBE391:
-2968:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-ARM GAS  /tmp/ccwR4KB7.s 			page 187
-
-
- 3022              		.loc 1 2968 3 is_stmt 1 view .LVU910
-2969:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 3023              		.loc 1 2969 3 view .LVU911
-2968:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 3024              		.loc 1 2968 9 is_stmt 0 view .LVU912
- 3025 008a 0023     		movs	r3, #0
- 3026              	.LVL360:
- 3027              	.L222:
-2969:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 3028              		.loc 1 2969 43 is_stmt 1 discriminator 1 view .LVU913
- 3029              	.LBB393:
- 3030              	.LBI393:
+ 2919              		.loc 1 2665 50 discriminator 1 view .LVU898
+ 2920 004e 5A1C     		adds	r2, r3, #1
+ 2921              	.LVL335:
+2665:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, word);
+ 2922              		.loc 1 2665 41 discriminator 1 view .LVU899
+ 2923 0050 B3F57A7F 		cmp	r3, #1000
+ 2924 0054 01D2     		bcs	.L203
+2665:Src/main.c    **** 	LL_SPI_TransmitData16(SPI2, word);
+ 2925              		.loc 1 2665 50 discriminator 1 view .LVU900
+ 2926 0056 1346     		mov	r3, r2
+ 2927 0058 F4E7     		b	.L204
+ 2928              	.LVL336:
+ 2929              	.L203:
+2666:Src/main.c    **** 	tmp32 = 0;
+ 2930              		.loc 1 2666 2 is_stmt 1 view .LVU901
+ 2931              	.LBB423:
+ 2932              	.LBI423:
+1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 2933              		.loc 4 1373 22 view .LVU902
+ 2934              	.LBB424:
+1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
+ 2935              		.loc 4 1376 3 view .LVU903
+ 2936              		.loc 4 1377 3 view .LVU904
+ 2937              		.loc 4 1377 10 is_stmt 0 view .LVU905
+ 2938 005a 0C4B     		ldr	r3, .L210+4
+ 2939 005c 9C81     		strh	r4, [r3, #12]	@ movhi
+ 2940              	.LVL337:
+ 2941              		.loc 4 1377 10 view .LVU906
+ 2942              	.LBE424:
+ 2943              	.LBE423:
+2667:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 2944              		.loc 1 2667 2 is_stmt 1 view .LVU907
+2668:Src/main.c    **** 	(void) SPI2->DR;
+ 2945              		.loc 1 2668 2 view .LVU908
+2667:Src/main.c    **** 	while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
+ 2946              		.loc 1 2667 8 is_stmt 0 view .LVU909
+ 2947 005e 0023     		movs	r3, #0
+ 2948              	.LVL338:
+ 2949              	.L206:
+2668:Src/main.c    **** 	(void) SPI2->DR;
+ 2950              		.loc 1 2668 64 is_stmt 1 discriminator 2 view .LVU910
+2668:Src/main.c    **** 	(void) SPI2->DR;
+ 2951              		.loc 1 2668 42 discriminator 2 view .LVU911
+ 2952              	.LBB425:
+ 2953              	.LBI425:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3031              		.loc 4 905 26 view .LVU914
- 3032              	.LBB394:
+ 2954              		.loc 4 905 26 view .LVU912
+ 2955              	.LBB426:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3033              		.loc 4 907 3 view .LVU915
+ 2956              		.loc 4 907 3 view .LVU913
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3034              		.loc 4 907 12 is_stmt 0 view .LVU916
- 3035 008c 624A     		ldr	r2, .L250+8
- 3036 008e 9268     		ldr	r2, [r2, #8]
+ 2957              		.loc 4 907 12 is_stmt 0 view .LVU914
+ 2958 0060 0A4A     		ldr	r2, .L210+4
+ 2959 0062 9268     		ldr	r2, [r2, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3037              		.loc 4 907 68 view .LVU917
- 3038 0090 12F0010F 		tst	r2, #1
- 3039 0094 04D1     		bne	.L223
- 3040              	.LVL361:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3041              		.loc 4 907 68 view .LVU918
- 3042              	.LBE394:
- 3043              	.LBE393:
-2969:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 3044              		.loc 1 2969 43 discriminator 2 view .LVU919
- 3045 0096 B3F57A7F 		cmp	r3, #1000
- 3046 009a 01D8     		bhi	.L223
-2969:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 3047              		.loc 1 2969 62 is_stmt 1 discriminator 3 view .LVU920
-2969:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 3048              		.loc 1 2969 67 is_stmt 0 discriminator 3 view .LVU921
- 3049 009c 0133     		adds	r3, r3, #1
- 3050              	.LVL362:
-2969:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 3051              		.loc 1 2969 67 discriminator 3 view .LVU922
- 3052 009e F5E7     		b	.L222
- 3053              	.L223:
-2970:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3054              		.loc 1 2970 3 is_stmt 1 view .LVU923
- 3055              	.LVL363:
- 3056              	.LBB395:
- 3057              	.LBI395:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3058              		.loc 4 370 22 view .LVU924
- 3059              	.LBB396:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3060              		.loc 4 372 3 view .LVU925
- 3061 00a0 5D49     		ldr	r1, .L250+8
- 3062 00a2 0A68     		ldr	r2, [r1]
- 3063 00a4 22F04002 		bic	r2, r2, #64
-ARM GAS  /tmp/ccwR4KB7.s 			page 188
+ 2960              		.loc 4 907 68 view .LVU915
+ 2961 0064 12F0010F 		tst	r2, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 191
 
 
- 3064 00a8 0A60     		str	r2, [r1]
- 3065              	.LVL364:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3066              		.loc 4 372 3 is_stmt 0 view .LVU926
- 3067              	.LBE396:
- 3068              	.LBE395:
-2971:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3069              		.loc 1 2971 3 is_stmt 1 view .LVU927
- 3070              	.LBB398:
- 3071              	.LBB397:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3072              		.loc 4 373 1 is_stmt 0 view .LVU928
- 3073 00aa 00E0     		b	.L225
- 3074              	.L226:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3075              		.loc 4 373 1 view .LVU929
- 3076              	.LBE397:
- 3077              	.LBE398:
-2971:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3078              		.loc 1 2971 20 is_stmt 1 discriminator 2 view .LVU930
-2971:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3079              		.loc 1 2971 25 is_stmt 0 discriminator 2 view .LVU931
- 3080 00ac 0133     		adds	r3, r3, #1
- 3081              	.LVL365:
- 3082              	.L225:
-2971:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3083              		.loc 1 2971 14 is_stmt 1 discriminator 1 view .LVU932
- 3084 00ae B3F5FA7F 		cmp	r3, #500
- 3085 00b2 FBD3     		bcc	.L226
-2973:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
- 3086              		.loc 1 2973 3 view .LVU933
- 3087 00b4 0122     		movs	r2, #1
- 3088 00b6 4FF48061 		mov	r1, #1024
- 3089 00ba 5548     		ldr	r0, .L250
- 3090 00bc FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3091              	.LVL366:
-2974:Src/main.c    **** 	}
- 3092              		.loc 1 2974 3 view .LVU934
- 3093              	.LBB399:
- 3094              	.LBI399:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3095              		.loc 4 1344 26 view .LVU935
- 3096              	.LBB400:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3097              		.loc 4 1346 3 view .LVU936
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3098              		.loc 4 1346 21 is_stmt 0 view .LVU937
- 3099 00c0 554B     		ldr	r3, .L250+8
- 3100 00c2 DD68     		ldr	r5, [r3, #12]
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3101              		.loc 4 1346 10 view .LVU938
- 3102 00c4 ADB2     		uxth	r5, r5
- 3103              	.LVL367:
- 3104              	.L214:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3105              		.loc 4 1346 10 view .LVU939
- 3106              	.LBE400:
-ARM GAS  /tmp/ccwR4KB7.s 			page 189
+ 2962 0068 05D1     		bne	.L205
+ 2963              	.LVL339:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 2964              		.loc 4 907 68 view .LVU916
+ 2965              	.LBE426:
+ 2966              	.LBE425:
+2668:Src/main.c    **** 	(void) SPI2->DR;
+ 2967              		.loc 1 2668 51 discriminator 1 view .LVU917
+ 2968 006a 5A1C     		adds	r2, r3, #1
+ 2969              	.LVL340:
+2668:Src/main.c    **** 	(void) SPI2->DR;
+ 2970              		.loc 1 2668 42 discriminator 1 view .LVU918
+ 2971 006c B3F57A7F 		cmp	r3, #1000
+ 2972 0070 01D2     		bcs	.L205
+2668:Src/main.c    **** 	(void) SPI2->DR;
+ 2973              		.loc 1 2668 51 discriminator 1 view .LVU919
+ 2974 0072 1346     		mov	r3, r2
+ 2975 0074 F4E7     		b	.L206
+ 2976              	.LVL341:
+ 2977              	.L205:
+2669:Src/main.c    **** 
+ 2978              		.loc 1 2669 2 is_stmt 1 view .LVU920
+ 2979 0076 054B     		ldr	r3, .L210+4
+ 2980 0078 DB68     		ldr	r3, [r3, #12]
+2671:Src/main.c    **** }
+ 2981              		.loc 1 2671 2 view .LVU921
+ 2982 007a 0122     		movs	r2, #1
+ 2983 007c 4FF40051 		mov	r1, #8192
+ 2984 0080 0348     		ldr	r0, .L210+8
+ 2985 0082 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 2986              	.LVL342:
+2672:Src/main.c    **** 
+ 2987              		.loc 1 2672 1 is_stmt 0 view .LVU922
+ 2988 0086 38BD     		pop	{r3, r4, r5, pc}
+ 2989              	.LVL343:
+ 2990              	.L211:
+2672:Src/main.c    **** 
+ 2991              		.loc 1 2672 1 view .LVU923
+ 2992              		.align	2
+ 2993              	.L210:
+ 2994 0088 00040240 		.word	1073873920
+ 2995 008c 00380040 		.word	1073756160
+ 2996 0090 000C0240 		.word	1073875968
+ 2997              		.cfi_endproc
+ 2998              	.LFE1214:
+ 3000              		.section	.text.AD9833_Apply,"ax",%progbits
+ 3001              		.align	1
+ 3002              		.syntax unified
+ 3003              		.thumb
+ 3004              		.thumb_func
+ 3006              	AD9833_Apply:
+ 3007              	.LVL344:
+ 3008              	.LFB1215:
+2675:Src/main.c    **** 	uint16_t control = 0x2000u; // B28 = 1
+ 3009              		.loc 1 2675 1 is_stmt 1 view -0
+ 3010              		.cfi_startproc
+ 3011              		@ args = 0, pretend = 0, frame = 0
+ARM GAS  /tmp/ccEQxcUB.s 			page 192
 
 
- 3107              	.LBE399:
-3046:Src/main.c    **** }
- 3108              		.loc 1 3046 2 is_stmt 1 view .LVU940
-3047:Src/main.c    **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time
- 3109              		.loc 1 3047 1 is_stmt 0 view .LVU941
- 3110 00c6 2846     		mov	r0, r5
- 3111 00c8 38BD     		pop	{r3, r4, r5, pc}
- 3112              	.LVL368:
- 3113              	.L218:
-2978:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
- 3114              		.loc 1 2978 3 is_stmt 1 view .LVU942
- 3115 00ca 524C     		ldr	r4, .L250+4
- 3116 00cc 0122     		movs	r2, #1
- 3117 00ce 4FF48061 		mov	r1, #1024
- 3118 00d2 2046     		mov	r0, r4
- 3119 00d4 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3120              	.LVL369:
-2979:Src/main.c    **** 		tmp32=0;
- 3121              		.loc 1 2979 3 view .LVU943
- 3122 00d8 0022     		movs	r2, #0
- 3123 00da 4021     		movs	r1, #64
- 3124 00dc 2046     		mov	r0, r4
- 3125 00de FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3126              	.LVL370:
-2980:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3127              		.loc 1 2980 3 view .LVU944
-2981:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3128              		.loc 1 2981 3 view .LVU945
-2980:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3129              		.loc 1 2980 8 is_stmt 0 view .LVU946
- 3130 00e2 0023     		movs	r3, #0
-2981:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3131              		.loc 1 2981 8 view .LVU947
- 3132 00e4 00E0     		b	.L227
- 3133              	.LVL371:
- 3134              	.L228:
-2981:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3135              		.loc 1 2981 20 is_stmt 1 discriminator 2 view .LVU948
-2981:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3136              		.loc 1 2981 25 is_stmt 0 discriminator 2 view .LVU949
- 3137 00e6 0133     		adds	r3, r3, #1
- 3138              	.LVL372:
- 3139              	.L227:
-2981:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3140              		.loc 1 2981 14 is_stmt 1 discriminator 1 view .LVU950
- 3141 00e8 B3F5FA7F 		cmp	r3, #500
- 3142 00ec FBD3     		bcc	.L228
-2983:Src/main.c    **** 		tmp32 = 0;
- 3143              		.loc 1 2983 3 view .LVU951
- 3144              	.LVL373:
- 3145              	.LBB401:
- 3146              	.LBI401:
+ 3012              		@ frame_needed = 0, uses_anonymous_args = 0
+2675:Src/main.c    **** 	uint16_t control = 0x2000u; // B28 = 1
+ 3013              		.loc 1 2675 1 is_stmt 0 view .LVU925
+ 3014 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 3015              	.LCFI33:
+ 3016              		.cfi_def_cfa_offset 24
+ 3017              		.cfi_offset 4, -24
+ 3018              		.cfi_offset 5, -20
+ 3019              		.cfi_offset 6, -16
+ 3020              		.cfi_offset 7, -12
+ 3021              		.cfi_offset 8, -8
+ 3022              		.cfi_offset 14, -4
+ 3023 0004 0546     		mov	r5, r0
+2676:Src/main.c    **** 	if (triangle)
+ 3024              		.loc 1 2676 2 is_stmt 1 view .LVU926
+ 3025              	.LVL345:
+2677:Src/main.c    **** 	{
+ 3026              		.loc 1 2677 2 view .LVU927
+2677:Src/main.c    **** 	{
+ 3027              		.loc 1 2677 5 is_stmt 0 view .LVU928
+ 3028 0006 F9B9     		cbnz	r1, .L215
+2676:Src/main.c    **** 	if (triangle)
+ 3029              		.loc 1 2676 11 view .LVU929
+ 3030 0008 4FF40057 		mov	r7, #8192
+ 3031              	.L213:
+ 3032              	.LVL346:
+2681:Src/main.c    **** 
+ 3033              		.loc 1 2681 2 is_stmt 1 view .LVU930
+2681:Src/main.c    **** 
+ 3034              		.loc 1 2681 10 is_stmt 0 view .LVU931
+ 3035 000c 47F48078 		orr	r8, r7, #256
+ 3036              	.LVL347:
+2683:Src/main.c    **** 	uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB
+ 3037              		.loc 1 2683 2 is_stmt 1 view .LVU932
+2684:Src/main.c    **** 	uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
+ 3038              		.loc 1 2684 2 view .LVU933
+2684:Src/main.c    **** 	uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
+ 3039              		.loc 1 2684 49 is_stmt 0 view .LVU934
+ 3040 0010 C2F30D06 		ubfx	r6, r2, #0, #14
+2684:Src/main.c    **** 	uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
+ 3041              		.loc 1 2684 11 view .LVU935
+ 3042 0014 46F48046 		orr	r6, r6, #16384
+ 3043              	.LVL348:
+2685:Src/main.c    **** 
+ 3044              		.loc 1 2685 2 is_stmt 1 view .LVU936
+2685:Src/main.c    **** 
+ 3045              		.loc 1 2685 57 is_stmt 0 view .LVU937
+ 3046 0018 C2F38D32 		ubfx	r2, r2, #14, #14
+ 3047              	.LVL349:
+2685:Src/main.c    **** 
+ 3048              		.loc 1 2685 11 view .LVU938
+ 3049 001c 42F48044 		orr	r4, r2, #16384
+ 3050              	.LVL350:
+2687:Src/main.c    **** 	AD9833_WriteWord(lsw);
+ 3051              		.loc 1 2687 2 is_stmt 1 view .LVU939
+ 3052 0020 4046     		mov	r0, r8
+ 3053              	.LVL351:
+ARM GAS  /tmp/ccEQxcUB.s 			page 193
+
+
+2687:Src/main.c    **** 	AD9833_WriteWord(lsw);
+ 3054              		.loc 1 2687 2 is_stmt 0 view .LVU940
+ 3055 0022 FFF7FEFF 		bl	AD9833_WriteWord
+ 3056              	.LVL352:
+2688:Src/main.c    **** 	AD9833_WriteWord(msw);
+ 3057              		.loc 1 2688 2 is_stmt 1 view .LVU941
+ 3058 0026 3046     		mov	r0, r6
+ 3059 0028 FFF7FEFF 		bl	AD9833_WriteWord
+ 3060              	.LVL353:
+2689:Src/main.c    **** 	AD9833_WriteWord(0xC000u); // PHASE0 = 0
+ 3061              		.loc 1 2689 2 view .LVU942
+ 3062 002c 2046     		mov	r0, r4
+ 3063 002e FFF7FEFF 		bl	AD9833_WriteWord
+ 3064              	.LVL354:
+2690:Src/main.c    **** 
+ 3065              		.loc 1 2690 2 view .LVU943
+ 3066 0032 4FF44040 		mov	r0, #49152
+ 3067 0036 FFF7FEFF 		bl	AD9833_WriteWord
+ 3068              	.LVL355:
+2692:Src/main.c    **** 	{
+ 3069              		.loc 1 2692 2 view .LVU944
+2692:Src/main.c    **** 	{
+ 3070              		.loc 1 2692 5 is_stmt 0 view .LVU945
+ 3071 003a 05B9     		cbnz	r5, .L214
+2681:Src/main.c    **** 
+ 3072              		.loc 1 2681 10 view .LVU946
+ 3073 003c 4746     		mov	r7, r8
+ 3074              	.L214:
+ 3075              	.LVL356:
+2696:Src/main.c    **** }
+ 3076              		.loc 1 2696 2 is_stmt 1 view .LVU947
+ 3077 003e 3846     		mov	r0, r7
+ 3078 0040 FFF7FEFF 		bl	AD9833_WriteWord
+ 3079              	.LVL357:
+2697:Src/main.c    **** 
+ 3080              		.loc 1 2697 1 is_stmt 0 view .LVU948
+ 3081 0044 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 3082              	.LVL358:
+ 3083              	.L215:
+2679:Src/main.c    **** 	}
+ 3084              		.loc 1 2679 11 view .LVU949
+ 3085 0048 42F20207 		movw	r7, #8194
+ 3086 004c DEE7     		b	.L213
+ 3087              		.cfi_endproc
+ 3088              	.LFE1215:
+ 3090              		.section	.text.OUT_trigger,"ax",%progbits
+ 3091              		.align	1
+ 3092              		.syntax unified
+ 3093              		.thumb
+ 3094              		.thumb_func
+ 3096              	OUT_trigger:
+ 3097              	.LVL359:
+ 3098              	.LFB1211:
+2571:Src/main.c    **** 	switch (out_n)
+ 3099              		.loc 1 2571 1 is_stmt 1 view -0
+ 3100              		.cfi_startproc
+ 3101              		@ args = 0, pretend = 0, frame = 0
+ARM GAS  /tmp/ccEQxcUB.s 			page 194
+
+
+ 3102              		@ frame_needed = 0, uses_anonymous_args = 0
+2571:Src/main.c    **** 	switch (out_n)
+ 3103              		.loc 1 2571 1 is_stmt 0 view .LVU951
+ 3104 0000 10B5     		push	{r4, lr}
+ 3105              	.LCFI34:
+ 3106              		.cfi_def_cfa_offset 8
+ 3107              		.cfi_offset 4, -8
+ 3108              		.cfi_offset 14, -4
+2572:Src/main.c    **** 	{
+ 3109              		.loc 1 2572 2 is_stmt 1 view .LVU952
+ 3110 0002 0928     		cmp	r0, #9
+ 3111 0004 13D8     		bhi	.L217
+ 3112 0006 DFE800F0 		tbb	[pc, r0]
+ 3113              	.L220:
+ 3114 000a 05       		.byte	(.L229-.L220)/2
+ 3115 000b 13       		.byte	(.L228-.L220)/2
+ 3116 000c 21       		.byte	(.L227-.L220)/2
+ 3117 000d 2F       		.byte	(.L226-.L220)/2
+ 3118 000e 3D       		.byte	(.L225-.L220)/2
+ 3119 000f 4B       		.byte	(.L224-.L220)/2
+ 3120 0010 59       		.byte	(.L223-.L220)/2
+ 3121 0011 65       		.byte	(.L222-.L220)/2
+ 3122 0012 71       		.byte	(.L221-.L220)/2
+ 3123 0013 7D       		.byte	(.L219-.L220)/2
+ 3124              		.p2align 1
+ 3125              	.L229:
+2575:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
+ 3126              		.loc 1 2575 3 view .LVU953
+ 3127 0014 414C     		ldr	r4, .L232
+ 3128 0016 0122     		movs	r2, #1
+ 3129 0018 4FF48061 		mov	r1, #1024
+ 3130 001c 2046     		mov	r0, r4
+ 3131              	.LVL360:
+2575:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
+ 3132              		.loc 1 2575 3 is_stmt 0 view .LVU954
+ 3133 001e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3134              	.LVL361:
+2576:Src/main.c    **** 	break;
+ 3135              		.loc 1 2576 3 is_stmt 1 view .LVU955
+ 3136 0022 0022     		movs	r2, #0
+ 3137 0024 4FF48061 		mov	r1, #1024
+ 3138 0028 2046     		mov	r0, r4
+ 3139 002a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3140              	.LVL362:
+2577:Src/main.c    **** 
+ 3141              		.loc 1 2577 2 view .LVU956
+ 3142              	.L217:
+2624:Src/main.c    **** 
+ 3143              		.loc 1 2624 1 is_stmt 0 view .LVU957
+ 3144 002e 10BD     		pop	{r4, pc}
+ 3145              	.LVL363:
+ 3146              	.L228:
+2580:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
+ 3147              		.loc 1 2580 3 is_stmt 1 view .LVU958
+ 3148 0030 3A4C     		ldr	r4, .L232
+ 3149 0032 0122     		movs	r2, #1
+ 3150 0034 4FF40061 		mov	r1, #2048
+ARM GAS  /tmp/ccEQxcUB.s 			page 195
+
+
+ 3151 0038 2046     		mov	r0, r4
+ 3152              	.LVL364:
+2580:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
+ 3153              		.loc 1 2580 3 is_stmt 0 view .LVU959
+ 3154 003a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3155              	.LVL365:
+2581:Src/main.c    **** 	break;
+ 3156              		.loc 1 2581 3 is_stmt 1 view .LVU960
+ 3157 003e 0022     		movs	r2, #0
+ 3158 0040 4FF40061 		mov	r1, #2048
+ 3159 0044 2046     		mov	r0, r4
+ 3160 0046 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3161              	.LVL366:
+2582:Src/main.c    **** 
+ 3162              		.loc 1 2582 2 view .LVU961
+ 3163 004a F0E7     		b	.L217
+ 3164              	.LVL367:
+ 3165              	.L227:
+2585:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
+ 3166              		.loc 1 2585 3 view .LVU962
+ 3167 004c 334C     		ldr	r4, .L232
+ 3168 004e 0122     		movs	r2, #1
+ 3169 0050 4FF48051 		mov	r1, #4096
+ 3170 0054 2046     		mov	r0, r4
+ 3171              	.LVL368:
+2585:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
+ 3172              		.loc 1 2585 3 is_stmt 0 view .LVU963
+ 3173 0056 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3174              	.LVL369:
+2586:Src/main.c    **** 	break;
+ 3175              		.loc 1 2586 3 is_stmt 1 view .LVU964
+ 3176 005a 0022     		movs	r2, #0
+ 3177 005c 4FF48051 		mov	r1, #4096
+ 3178 0060 2046     		mov	r0, r4
+ 3179 0062 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3180              	.LVL370:
+2587:Src/main.c    **** 
+ 3181              		.loc 1 2587 2 view .LVU965
+ 3182 0066 E2E7     		b	.L217
+ 3183              	.LVL371:
+ 3184              	.L226:
+2590:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
+ 3185              		.loc 1 2590 3 view .LVU966
+ 3186 0068 2C4C     		ldr	r4, .L232
+ 3187 006a 0122     		movs	r2, #1
+ 3188 006c 4FF40051 		mov	r1, #8192
+ 3189 0070 2046     		mov	r0, r4
+ 3190              	.LVL372:
+2590:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
+ 3191              		.loc 1 2590 3 is_stmt 0 view .LVU967
+ 3192 0072 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3193              	.LVL373:
+2591:Src/main.c    **** 	break;
+ 3194              		.loc 1 2591 3 is_stmt 1 view .LVU968
+ 3195 0076 0022     		movs	r2, #0
+ 3196 0078 4FF40051 		mov	r1, #8192
+ 3197 007c 2046     		mov	r0, r4
+ARM GAS  /tmp/ccEQxcUB.s 			page 196
+
+
+ 3198 007e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3199              	.LVL374:
+2592:Src/main.c    **** 
+ 3200              		.loc 1 2592 2 view .LVU969
+ 3201 0082 D4E7     		b	.L217
+ 3202              	.LVL375:
+ 3203              	.L225:
+2595:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
+ 3204              		.loc 1 2595 3 view .LVU970
+ 3205 0084 254C     		ldr	r4, .L232
+ 3206 0086 0122     		movs	r2, #1
+ 3207 0088 4FF48041 		mov	r1, #16384
+ 3208 008c 2046     		mov	r0, r4
+ 3209              	.LVL376:
+2595:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
+ 3210              		.loc 1 2595 3 is_stmt 0 view .LVU971
+ 3211 008e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3212              	.LVL377:
+2596:Src/main.c    **** 	break;
+ 3213              		.loc 1 2596 3 is_stmt 1 view .LVU972
+ 3214 0092 0022     		movs	r2, #0
+ 3215 0094 4FF48041 		mov	r1, #16384
+ 3216 0098 2046     		mov	r0, r4
+ 3217 009a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3218              	.LVL378:
+2597:Src/main.c    **** 
+ 3219              		.loc 1 2597 2 view .LVU973
+ 3220 009e C6E7     		b	.L217
+ 3221              	.LVL379:
+ 3222              	.L224:
+2600:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
+ 3223              		.loc 1 2600 3 view .LVU974
+ 3224 00a0 1E4C     		ldr	r4, .L232
+ 3225 00a2 0122     		movs	r2, #1
+ 3226 00a4 4FF40041 		mov	r1, #32768
+ 3227 00a8 2046     		mov	r0, r4
+ 3228              	.LVL380:
+2600:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
+ 3229              		.loc 1 2600 3 is_stmt 0 view .LVU975
+ 3230 00aa FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3231              	.LVL381:
+2601:Src/main.c    **** 	break;
+ 3232              		.loc 1 2601 3 is_stmt 1 view .LVU976
+ 3233 00ae 0022     		movs	r2, #0
+ 3234 00b0 4FF40041 		mov	r1, #32768
+ 3235 00b4 2046     		mov	r0, r4
+ 3236 00b6 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3237              	.LVL382:
+2602:Src/main.c    **** 
+ 3238              		.loc 1 2602 2 view .LVU977
+ 3239 00ba B8E7     		b	.L217
+ 3240              	.LVL383:
+ 3241              	.L223:
+2605:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
+ 3242              		.loc 1 2605 3 view .LVU978
+ 3243 00bc 184C     		ldr	r4, .L232+4
+ 3244 00be 0122     		movs	r2, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 197
+
+
+ 3245 00c0 1021     		movs	r1, #16
+ 3246 00c2 2046     		mov	r0, r4
+ 3247              	.LVL384:
+2605:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
+ 3248              		.loc 1 2605 3 is_stmt 0 view .LVU979
+ 3249 00c4 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3250              	.LVL385:
+2606:Src/main.c    **** 	break;
+ 3251              		.loc 1 2606 3 is_stmt 1 view .LVU980
+ 3252 00c8 0022     		movs	r2, #0
+ 3253 00ca 1021     		movs	r1, #16
+ 3254 00cc 2046     		mov	r0, r4
+ 3255 00ce FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3256              	.LVL386:
+2607:Src/main.c    **** 
+ 3257              		.loc 1 2607 2 view .LVU981
+ 3258 00d2 ACE7     		b	.L217
+ 3259              	.LVL387:
+ 3260              	.L222:
+2610:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
+ 3261              		.loc 1 2610 3 view .LVU982
+ 3262 00d4 124C     		ldr	r4, .L232+4
+ 3263 00d6 0122     		movs	r2, #1
+ 3264 00d8 2021     		movs	r1, #32
+ 3265 00da 2046     		mov	r0, r4
+ 3266              	.LVL388:
+2610:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
+ 3267              		.loc 1 2610 3 is_stmt 0 view .LVU983
+ 3268 00dc FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3269              	.LVL389:
+2611:Src/main.c    **** 	break;
+ 3270              		.loc 1 2611 3 is_stmt 1 view .LVU984
+ 3271 00e0 0022     		movs	r2, #0
+ 3272 00e2 2021     		movs	r1, #32
+ 3273 00e4 2046     		mov	r0, r4
+ 3274 00e6 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3275              	.LVL390:
+2612:Src/main.c    **** 
+ 3276              		.loc 1 2612 2 view .LVU985
+ 3277 00ea A0E7     		b	.L217
+ 3278              	.LVL391:
+ 3279              	.L221:
+2615:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
+ 3280              		.loc 1 2615 3 view .LVU986
+ 3281 00ec 0C4C     		ldr	r4, .L232+4
+ 3282 00ee 0122     		movs	r2, #1
+ 3283 00f0 4021     		movs	r1, #64
+ 3284 00f2 2046     		mov	r0, r4
+ 3285              	.LVL392:
+2615:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
+ 3286              		.loc 1 2615 3 is_stmt 0 view .LVU987
+ 3287 00f4 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3288              	.LVL393:
+2616:Src/main.c    **** 	break;
+ 3289              		.loc 1 2616 3 is_stmt 1 view .LVU988
+ 3290 00f8 0022     		movs	r2, #0
+ 3291 00fa 4021     		movs	r1, #64
+ARM GAS  /tmp/ccEQxcUB.s 			page 198
+
+
+ 3292 00fc 2046     		mov	r0, r4
+ 3293 00fe FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3294              	.LVL394:
+2617:Src/main.c    **** 
+ 3295              		.loc 1 2617 2 view .LVU989
+ 3296 0102 94E7     		b	.L217
+ 3297              	.LVL395:
+ 3298              	.L219:
+2620:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
+ 3299              		.loc 1 2620 3 view .LVU990
+ 3300 0104 064C     		ldr	r4, .L232+4
+ 3301 0106 0122     		movs	r2, #1
+ 3302 0108 8021     		movs	r1, #128
+ 3303 010a 2046     		mov	r0, r4
+ 3304              	.LVL396:
+2620:Src/main.c    **** 		HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
+ 3305              		.loc 1 2620 3 is_stmt 0 view .LVU991
+ 3306 010c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3307              	.LVL397:
+2621:Src/main.c    **** 	break;
+ 3308              		.loc 1 2621 3 is_stmt 1 view .LVU992
+ 3309 0110 0022     		movs	r2, #0
+ 3310 0112 8021     		movs	r1, #128
+ 3311 0114 2046     		mov	r0, r4
+ 3312 0116 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3313              	.LVL398:
+2622:Src/main.c    **** 	}
+ 3314              		.loc 1 2622 2 view .LVU993
+2624:Src/main.c    **** 
+ 3315              		.loc 1 2624 1 is_stmt 0 view .LVU994
+ 3316 011a 88E7     		b	.L217
+ 3317              	.L233:
+ 3318              		.align	2
+ 3319              	.L232:
+ 3320 011c 00180240 		.word	1073879040
+ 3321 0120 00040240 		.word	1073873920
+ 3322              		.cfi_endproc
+ 3323              	.LFE1211:
+ 3325              		.section	.text.MPhD_T,"ax",%progbits
+ 3326              		.align	1
+ 3327              		.syntax unified
+ 3328              		.thumb
+ 3329              		.thumb_func
+ 3331              	MPhD_T:
+ 3332              	.LVL399:
+ 3333              	.LFB1226:
+3247:Src/main.c    **** 	uint16_t P;
+ 3334              		.loc 1 3247 1 is_stmt 1 view -0
+ 3335              		.cfi_startproc
+ 3336              		@ args = 0, pretend = 0, frame = 0
+ 3337              		@ frame_needed = 0, uses_anonymous_args = 0
+3247:Src/main.c    **** 	uint16_t P;
+ 3338              		.loc 1 3247 1 is_stmt 0 view .LVU996
+ 3339 0000 38B5     		push	{r3, r4, r5, lr}
+ 3340              	.LCFI35:
+ 3341              		.cfi_def_cfa_offset 16
+ 3342              		.cfi_offset 3, -16
+ARM GAS  /tmp/ccEQxcUB.s 			page 199
+
+
+ 3343              		.cfi_offset 4, -12
+ 3344              		.cfi_offset 5, -8
+ 3345              		.cfi_offset 14, -4
+ 3346 0002 0446     		mov	r4, r0
+3248:Src/main.c    **** 	uint32_t tmp32;
+ 3347              		.loc 1 3248 2 is_stmt 1 view .LVU997
+3249:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
+ 3348              		.loc 1 3249 2 view .LVU998
+3250:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
+ 3349              		.loc 1 3250 2 view .LVU999
+ 3350 0004 0022     		movs	r2, #0
+ 3351 0006 4FF48041 		mov	r1, #16384
+ 3352 000a 8148     		ldr	r0, .L275
+ 3353              	.LVL400:
+3250:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
+ 3354              		.loc 1 3250 2 is_stmt 0 view .LVU1000
+ 3355 000c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3356              	.LVL401:
+3251:Src/main.c    **** 	tmp32=0;
+ 3357              		.loc 1 3251 2 is_stmt 1 view .LVU1001
+ 3358 0010 0022     		movs	r2, #0
+ 3359 0012 4FF40071 		mov	r1, #512
+ 3360 0016 7F48     		ldr	r0, .L275+4
+ 3361 0018 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3362              	.LVL402:
+3252:Src/main.c    **** 	while(tmp32<500){tmp32++;}
+ 3363              		.loc 1 3252 2 view .LVU1002
+3253:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+ 3364              		.loc 1 3253 2 view .LVU1003
+3252:Src/main.c    **** 	while(tmp32<500){tmp32++;}
+ 3365              		.loc 1 3252 7 is_stmt 0 view .LVU1004
+ 3366 001c 0023     		movs	r3, #0
+3253:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+ 3367              		.loc 1 3253 7 view .LVU1005
+ 3368 001e 00E0     		b	.L235
+ 3369              	.LVL403:
+ 3370              	.L236:
+3253:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+ 3371              		.loc 1 3253 19 is_stmt 1 discriminator 2 view .LVU1006
+3253:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+ 3372              		.loc 1 3253 24 is_stmt 0 discriminator 2 view .LVU1007
+ 3373 0020 0133     		adds	r3, r3, #1
+ 3374              	.LVL404:
+ 3375              	.L235:
+3253:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+ 3376              		.loc 1 3253 13 is_stmt 1 discriminator 1 view .LVU1008
+ 3377 0022 B3F5FA7F 		cmp	r3, #500
+ 3378 0026 FBD3     		bcc	.L236
+3254:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
+ 3379              		.loc 1 3254 2 view .LVU1009
+ 3380 0028 0122     		movs	r2, #1
+ 3381 002a 4FF48041 		mov	r1, #16384
+ 3382 002e 7848     		ldr	r0, .L275
+ 3383 0030 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3384              	.LVL405:
+3255:Src/main.c    **** 	tmp32=0;
+ 3385              		.loc 1 3255 2 view .LVU1010
+ARM GAS  /tmp/ccEQxcUB.s 			page 200
+
+
+ 3386 0034 0122     		movs	r2, #1
+ 3387 0036 4FF40071 		mov	r1, #512
+ 3388 003a 7648     		ldr	r0, .L275+4
+ 3389 003c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3390              	.LVL406:
+3256:Src/main.c    **** 	while(tmp32<500){tmp32++;}
+ 3391              		.loc 1 3256 2 view .LVU1011
+3257:Src/main.c    **** 	if (num==1)//MPD1
+ 3392              		.loc 1 3257 2 view .LVU1012
+3256:Src/main.c    **** 	while(tmp32<500){tmp32++;}
+ 3393              		.loc 1 3256 7 is_stmt 0 view .LVU1013
+ 3394 0040 0023     		movs	r3, #0
+3257:Src/main.c    **** 	if (num==1)//MPD1
+ 3395              		.loc 1 3257 7 view .LVU1014
+ 3396 0042 00E0     		b	.L237
+ 3397              	.LVL407:
+ 3398              	.L238:
+3257:Src/main.c    **** 	if (num==1)//MPD1
+ 3399              		.loc 1 3257 19 is_stmt 1 discriminator 2 view .LVU1015
+3257:Src/main.c    **** 	if (num==1)//MPD1
+ 3400              		.loc 1 3257 24 is_stmt 0 discriminator 2 view .LVU1016
+ 3401 0044 0133     		adds	r3, r3, #1
+ 3402              	.LVL408:
+ 3403              	.L237:
+3257:Src/main.c    **** 	if (num==1)//MPD1
+ 3404              		.loc 1 3257 13 is_stmt 1 discriminator 1 view .LVU1017
+ 3405 0046 B3F5FA7F 		cmp	r3, #500
+ 3406 004a FBD3     		bcc	.L238
+3258:Src/main.c    **** 	{
+ 3407              		.loc 1 3258 2 view .LVU1018
+ 3408 004c 631E     		subs	r3, r4, #1
+ 3409              	.LVL409:
+3258:Src/main.c    **** 	{
+ 3410              		.loc 1 3258 2 is_stmt 0 view .LVU1019
+ 3411 004e 032B     		cmp	r3, #3
+ 3412 0050 39D8     		bhi	.L239
+ 3413 0052 DFE803F0 		tbb	[pc, r3]
+ 3414              	.L241:
+ 3415 0056 02       		.byte	(.L244-.L241)/2
+ 3416 0057 3A       		.byte	(.L243-.L241)/2
+ 3417 0058 6F       		.byte	(.L242-.L241)/2
+ 3418 0059 A6       		.byte	(.L240-.L241)/2
+ 3419              		.p2align 1
+ 3420              	.L244:
+3260:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
+ 3421              		.loc 1 3260 3 is_stmt 1 view .LVU1020
+ 3422 005a 6D4C     		ldr	r4, .L275
+ 3423              	.LVL410:
+3260:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
+ 3424              		.loc 1 3260 3 is_stmt 0 view .LVU1021
+ 3425 005c 0122     		movs	r2, #1
+ 3426 005e 4FF40061 		mov	r1, #2048
+ 3427 0062 2046     		mov	r0, r4
+ 3428 0064 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3429              	.LVL411:
+3261:Src/main.c    **** 		tmp32=0;
+ 3430              		.loc 1 3261 3 is_stmt 1 view .LVU1022
+ARM GAS  /tmp/ccEQxcUB.s 			page 201
+
+
+ 3431 0068 0022     		movs	r2, #0
+ 3432 006a 4FF48061 		mov	r1, #1024
+ 3433 006e 2046     		mov	r0, r4
+ 3434 0070 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3435              	.LVL412:
+3262:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3436              		.loc 1 3262 3 view .LVU1023
+3263:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3437              		.loc 1 3263 3 view .LVU1024
+3262:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3438              		.loc 1 3262 8 is_stmt 0 view .LVU1025
+ 3439 0074 0023     		movs	r3, #0
+3263:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3440              		.loc 1 3263 8 view .LVU1026
+ 3441 0076 00E0     		b	.L245
+ 3442              	.LVL413:
+ 3443              	.L246:
+3263:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3444              		.loc 1 3263 20 is_stmt 1 discriminator 2 view .LVU1027
+3263:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3445              		.loc 1 3263 25 is_stmt 0 discriminator 2 view .LVU1028
+ 3446 0078 0133     		adds	r3, r3, #1
+ 3447              	.LVL414:
+ 3448              	.L245:
+3263:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3449              		.loc 1 3263 14 is_stmt 1 discriminator 1 view .LVU1029
+ 3450 007a B3F5FA7F 		cmp	r3, #500
+ 3451 007e FBD3     		bcc	.L246
+3265:Src/main.c    **** 		tmp32 = 0;
+ 3452              		.loc 1 3265 3 view .LVU1030
+ 3453              	.LVL415:
+ 3454              	.LBB427:
+ 3455              	.LBI427:
  358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3147              		.loc 4 358 22 view .LVU952
- 3148              	.LBB402:
+ 3456              		.loc 4 358 22 view .LVU1031
+ 3457              	.LBB428:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3149              		.loc 4 360 3 view .LVU953
-ARM GAS  /tmp/ccwR4KB7.s 			page 190
+ 3458              		.loc 4 360 3 view .LVU1032
+ 3459 0080 654A     		ldr	r2, .L275+8
+ 3460 0082 1368     		ldr	r3, [r2]
+ 3461              	.LVL416:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3462              		.loc 4 360 3 is_stmt 0 view .LVU1033
+ 3463 0084 43F04003 		orr	r3, r3, #64
+ 3464 0088 1360     		str	r3, [r2]
+ 3465              	.LVL417:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3466              		.loc 4 360 3 view .LVU1034
+ 3467              	.LBE428:
+ 3468              	.LBE427:
+3266:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3469              		.loc 1 3266 3 is_stmt 1 view .LVU1035
+3267:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
+ 3470              		.loc 1 3267 3 view .LVU1036
+3266:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3471              		.loc 1 3266 9 is_stmt 0 view .LVU1037
+ 3472 008a 0023     		movs	r3, #0
+ARM GAS  /tmp/ccEQxcUB.s 			page 202
 
 
- 3150 00ee 4B4A     		ldr	r2, .L250+12
- 3151 00f0 1368     		ldr	r3, [r2]
- 3152              	.LVL374:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3153              		.loc 4 360 3 is_stmt 0 view .LVU954
- 3154 00f2 43F04003 		orr	r3, r3, #64
- 3155 00f6 1360     		str	r3, [r2]
- 3156              	.LVL375:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3157              		.loc 4 360 3 view .LVU955
- 3158              	.LBE402:
- 3159              	.LBE401:
-2984:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 3160              		.loc 1 2984 3 is_stmt 1 view .LVU956
-2985:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 3161              		.loc 1 2985 3 view .LVU957
-2984:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 3162              		.loc 1 2984 9 is_stmt 0 view .LVU958
- 3163 00f8 0023     		movs	r3, #0
- 3164              	.LVL376:
- 3165              	.L229:
-2985:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 3166              		.loc 1 2985 43 is_stmt 1 discriminator 1 view .LVU959
- 3167              	.LBB403:
- 3168              	.LBI403:
+ 3473              	.LVL418:
+ 3474              	.L247:
+3267:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
+ 3475              		.loc 1 3267 43 is_stmt 1 discriminator 1 view .LVU1038
+ 3476              	.LBB429:
+ 3477              	.LBI429:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3169              		.loc 4 905 26 view .LVU960
- 3170              	.LBB404:
+ 3478              		.loc 4 905 26 view .LVU1039
+ 3479              	.LBB430:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3171              		.loc 4 907 3 view .LVU961
+ 3480              		.loc 4 907 3 view .LVU1040
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3172              		.loc 4 907 12 is_stmt 0 view .LVU962
- 3173 00fa 484A     		ldr	r2, .L250+12
- 3174 00fc 9268     		ldr	r2, [r2, #8]
+ 3481              		.loc 4 907 12 is_stmt 0 view .LVU1041
+ 3482 008c 624A     		ldr	r2, .L275+8
+ 3483 008e 9268     		ldr	r2, [r2, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3175              		.loc 4 907 68 view .LVU963
- 3176 00fe 12F0010F 		tst	r2, #1
- 3177 0102 04D1     		bne	.L230
- 3178              	.LVL377:
+ 3484              		.loc 4 907 68 view .LVU1042
+ 3485 0090 12F0010F 		tst	r2, #1
+ 3486 0094 04D1     		bne	.L248
+ 3487              	.LVL419:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3179              		.loc 4 907 68 view .LVU964
- 3180              	.LBE404:
- 3181              	.LBE403:
-2985:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 3182              		.loc 1 2985 43 discriminator 2 view .LVU965
- 3183 0104 B3F57A7F 		cmp	r3, #1000
- 3184 0108 01D8     		bhi	.L230
-2985:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 3185              		.loc 1 2985 62 is_stmt 1 discriminator 3 view .LVU966
-2985:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 3186              		.loc 1 2985 67 is_stmt 0 discriminator 3 view .LVU967
- 3187 010a 0133     		adds	r3, r3, #1
- 3188              	.LVL378:
-2985:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 3189              		.loc 1 2985 67 discriminator 3 view .LVU968
- 3190 010c F5E7     		b	.L229
- 3191              	.L230:
-ARM GAS  /tmp/ccwR4KB7.s 			page 191
-
-
-2986:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3192              		.loc 1 2986 3 is_stmt 1 view .LVU969
- 3193              	.LVL379:
- 3194              	.LBB405:
- 3195              	.LBI405:
+ 3488              		.loc 4 907 68 view .LVU1043
+ 3489              	.LBE430:
+ 3490              	.LBE429:
+3267:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
+ 3491              		.loc 1 3267 43 discriminator 2 view .LVU1044
+ 3492 0096 B3F57A7F 		cmp	r3, #1000
+ 3493 009a 01D8     		bhi	.L248
+3267:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
+ 3494              		.loc 1 3267 62 is_stmt 1 discriminator 3 view .LVU1045
+3267:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
+ 3495              		.loc 1 3267 67 is_stmt 0 discriminator 3 view .LVU1046
+ 3496 009c 0133     		adds	r3, r3, #1
+ 3497              	.LVL420:
+3267:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
+ 3498              		.loc 1 3267 67 discriminator 3 view .LVU1047
+ 3499 009e F5E7     		b	.L247
+ 3500              	.L248:
+3268:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3501              		.loc 1 3268 3 is_stmt 1 view .LVU1048
+ 3502              	.LVL421:
+ 3503              	.LBB431:
+ 3504              	.LBI431:
  370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3196              		.loc 4 370 22 view .LVU970
- 3197              	.LBB406:
+ 3505              		.loc 4 370 22 view .LVU1049
+ 3506              	.LBB432:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3198              		.loc 4 372 3 view .LVU971
- 3199 010e 4349     		ldr	r1, .L250+12
- 3200 0110 0A68     		ldr	r2, [r1]
- 3201 0112 22F04002 		bic	r2, r2, #64
- 3202 0116 0A60     		str	r2, [r1]
- 3203              	.LVL380:
+ 3507              		.loc 4 372 3 view .LVU1050
+ 3508 00a0 5D49     		ldr	r1, .L275+8
+ 3509 00a2 0A68     		ldr	r2, [r1]
+ 3510 00a4 22F04002 		bic	r2, r2, #64
+ 3511 00a8 0A60     		str	r2, [r1]
+ 3512              	.LVL422:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3204              		.loc 4 372 3 is_stmt 0 view .LVU972
- 3205              	.LBE406:
- 3206              	.LBE405:
-2987:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3207              		.loc 1 2987 3 is_stmt 1 view .LVU973
- 3208              	.LBB408:
- 3209              	.LBB407:
+ 3513              		.loc 4 372 3 is_stmt 0 view .LVU1051
+ 3514              	.LBE432:
+ 3515              	.LBE431:
+ARM GAS  /tmp/ccEQxcUB.s 			page 203
+
+
+3269:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3516              		.loc 1 3269 3 is_stmt 1 view .LVU1052
+ 3517              	.LBB434:
+ 3518              	.LBB433:
  373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3210              		.loc 4 373 1 is_stmt 0 view .LVU974
- 3211 0118 00E0     		b	.L232
- 3212              	.L233:
+ 3519              		.loc 4 373 1 is_stmt 0 view .LVU1053
+ 3520 00aa 00E0     		b	.L250
+ 3521              	.L251:
  373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3213              		.loc 4 373 1 view .LVU975
- 3214              	.LBE407:
- 3215              	.LBE408:
-2987:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3216              		.loc 1 2987 20 is_stmt 1 discriminator 2 view .LVU976
-2987:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3217              		.loc 1 2987 25 is_stmt 0 discriminator 2 view .LVU977
- 3218 011a 0133     		adds	r3, r3, #1
- 3219              	.LVL381:
- 3220              	.L232:
-2987:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3221              		.loc 1 2987 14 is_stmt 1 discriminator 1 view .LVU978
- 3222 011c B3F5FA7F 		cmp	r3, #500
- 3223 0120 FBD3     		bcc	.L233
-2989:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
- 3224              		.loc 1 2989 3 view .LVU979
- 3225 0122 0122     		movs	r2, #1
- 3226 0124 4021     		movs	r1, #64
- 3227 0126 3B48     		ldr	r0, .L250+4
- 3228 0128 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3229              	.LVL382:
-2990:Src/main.c    **** 	}
- 3230              		.loc 1 2990 3 view .LVU980
- 3231              	.LBB409:
- 3232              	.LBI409:
+ 3522              		.loc 4 373 1 view .LVU1054
+ 3523              	.LBE433:
+ 3524              	.LBE434:
+3269:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3525              		.loc 1 3269 20 is_stmt 1 discriminator 2 view .LVU1055
+3269:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3526              		.loc 1 3269 25 is_stmt 0 discriminator 2 view .LVU1056
+ 3527 00ac 0133     		adds	r3, r3, #1
+ 3528              	.LVL423:
+ 3529              	.L250:
+3269:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3530              		.loc 1 3269 14 is_stmt 1 discriminator 1 view .LVU1057
+ 3531 00ae B3F5FA7F 		cmp	r3, #500
+ 3532 00b2 FBD3     		bcc	.L251
+3271:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
+ 3533              		.loc 1 3271 3 view .LVU1058
+ 3534 00b4 0122     		movs	r2, #1
+ 3535 00b6 4FF48061 		mov	r1, #1024
+ 3536 00ba 5548     		ldr	r0, .L275
+ 3537 00bc FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3538              	.LVL424:
+3272:Src/main.c    **** 	}
+ 3539              		.loc 1 3272 3 view .LVU1059
+ 3540              	.LBB435:
+ 3541              	.LBI435:
 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3233              		.loc 4 1344 26 view .LVU981
- 3234              	.LBB410:
+ 3542              		.loc 4 1344 26 view .LVU1060
+ 3543              	.LBB436:
 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 192
+ 3544              		.loc 4 1346 3 view .LVU1061
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3545              		.loc 4 1346 21 is_stmt 0 view .LVU1062
+ 3546 00c0 554B     		ldr	r3, .L275+8
+ 3547 00c2 DD68     		ldr	r5, [r3, #12]
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3548              		.loc 4 1346 10 view .LVU1063
+ 3549 00c4 ADB2     		uxth	r5, r5
+ 3550              	.LVL425:
+ 3551              	.L239:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3552              		.loc 4 1346 10 view .LVU1064
+ 3553              	.LBE436:
+ 3554              	.LBE435:
+3344:Src/main.c    **** }
+ 3555              		.loc 1 3344 2 is_stmt 1 view .LVU1065
+3345:Src/main.c    **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time
+ 3556              		.loc 1 3345 1 is_stmt 0 view .LVU1066
+ 3557 00c6 2846     		mov	r0, r5
+ARM GAS  /tmp/ccEQxcUB.s 			page 204
 
 
- 3235              		.loc 4 1346 3 view .LVU982
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3236              		.loc 4 1346 21 is_stmt 0 view .LVU983
- 3237 012c 3B4B     		ldr	r3, .L250+12
- 3238 012e DD68     		ldr	r5, [r3, #12]
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3239              		.loc 4 1346 10 view .LVU984
- 3240 0130 ADB2     		uxth	r5, r5
- 3241              	.LVL383:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3242              		.loc 4 1346 10 view .LVU985
- 3243              	.LBE410:
- 3244              	.LBE409:
- 3245 0132 C8E7     		b	.L214
- 3246              	.LVL384:
- 3247              	.L217:
-2994:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
- 3248              		.loc 1 2994 3 is_stmt 1 view .LVU986
- 3249 0134 364C     		ldr	r4, .L250
- 3250 0136 0122     		movs	r2, #1
- 3251 0138 4FF48061 		mov	r1, #1024
- 3252 013c 2046     		mov	r0, r4
- 3253 013e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3254              	.LVL385:
-2995:Src/main.c    **** 		tmp32=0;
- 3255              		.loc 1 2995 3 view .LVU987
- 3256 0142 0022     		movs	r2, #0
- 3257 0144 4FF40061 		mov	r1, #2048
- 3258 0148 2046     		mov	r0, r4
- 3259 014a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3260              	.LVL386:
-2996:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3261              		.loc 1 2996 3 view .LVU988
-2997:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3262              		.loc 1 2997 3 view .LVU989
-2996:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3263              		.loc 1 2996 8 is_stmt 0 view .LVU990
- 3264 014e 0023     		movs	r3, #0
-2997:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3265              		.loc 1 2997 8 view .LVU991
- 3266 0150 00E0     		b	.L234
- 3267              	.LVL387:
- 3268              	.L235:
-2997:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3269              		.loc 1 2997 20 is_stmt 1 discriminator 2 view .LVU992
-2997:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3270              		.loc 1 2997 25 is_stmt 0 discriminator 2 view .LVU993
- 3271 0152 0133     		adds	r3, r3, #1
- 3272              	.LVL388:
- 3273              	.L234:
-2997:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3274              		.loc 1 2997 14 is_stmt 1 discriminator 1 view .LVU994
- 3275 0154 B3F5FA7F 		cmp	r3, #500
- 3276 0158 FBD3     		bcc	.L235
-2999:Src/main.c    **** 		tmp32 = 0;
- 3277              		.loc 1 2999 3 view .LVU995
- 3278              	.LVL389:
-ARM GAS  /tmp/ccwR4KB7.s 			page 193
-
-
- 3279              	.LBB411:
- 3280              	.LBI411:
+ 3558 00c8 38BD     		pop	{r3, r4, r5, pc}
+ 3559              	.LVL426:
+ 3560              	.L243:
+3276:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
+ 3561              		.loc 1 3276 3 is_stmt 1 view .LVU1067
+ 3562 00ca 524C     		ldr	r4, .L275+4
+ 3563 00cc 0122     		movs	r2, #1
+ 3564 00ce 4FF48061 		mov	r1, #1024
+ 3565 00d2 2046     		mov	r0, r4
+ 3566 00d4 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3567              	.LVL427:
+3277:Src/main.c    **** 		tmp32=0;
+ 3568              		.loc 1 3277 3 view .LVU1068
+ 3569 00d8 0022     		movs	r2, #0
+ 3570 00da 4021     		movs	r1, #64
+ 3571 00dc 2046     		mov	r0, r4
+ 3572 00de FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3573              	.LVL428:
+3278:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3574              		.loc 1 3278 3 view .LVU1069
+3279:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3575              		.loc 1 3279 3 view .LVU1070
+3278:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3576              		.loc 1 3278 8 is_stmt 0 view .LVU1071
+ 3577 00e2 0023     		movs	r3, #0
+3279:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3578              		.loc 1 3279 8 view .LVU1072
+ 3579 00e4 00E0     		b	.L252
+ 3580              	.LVL429:
+ 3581              	.L253:
+3279:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3582              		.loc 1 3279 20 is_stmt 1 discriminator 2 view .LVU1073
+3279:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3583              		.loc 1 3279 25 is_stmt 0 discriminator 2 view .LVU1074
+ 3584 00e6 0133     		adds	r3, r3, #1
+ 3585              	.LVL430:
+ 3586              	.L252:
+3279:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3587              		.loc 1 3279 14 is_stmt 1 discriminator 1 view .LVU1075
+ 3588 00e8 B3F5FA7F 		cmp	r3, #500
+ 3589 00ec FBD3     		bcc	.L253
+3281:Src/main.c    **** 		tmp32 = 0;
+ 3590              		.loc 1 3281 3 view .LVU1076
+ 3591              	.LVL431:
+ 3592              	.LBB437:
+ 3593              	.LBI437:
  358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3281              		.loc 4 358 22 view .LVU996
- 3282              	.LBB412:
+ 3594              		.loc 4 358 22 view .LVU1077
+ 3595              	.LBB438:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3283              		.loc 4 360 3 view .LVU997
- 3284 015a 2F4A     		ldr	r2, .L250+8
- 3285 015c 1368     		ldr	r3, [r2]
- 3286              	.LVL390:
+ 3596              		.loc 4 360 3 view .LVU1078
+ 3597 00ee 4B4A     		ldr	r2, .L275+12
+ 3598 00f0 1368     		ldr	r3, [r2]
+ 3599              	.LVL432:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3287              		.loc 4 360 3 is_stmt 0 view .LVU998
- 3288 015e 43F04003 		orr	r3, r3, #64
- 3289 0162 1360     		str	r3, [r2]
- 3290              	.LVL391:
+ 3600              		.loc 4 360 3 is_stmt 0 view .LVU1079
+ 3601 00f2 43F04003 		orr	r3, r3, #64
+ARM GAS  /tmp/ccEQxcUB.s 			page 205
+
+
+ 3602 00f6 1360     		str	r3, [r2]
+ 3603              	.LVL433:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3291              		.loc 4 360 3 view .LVU999
- 3292              	.LBE412:
- 3293              	.LBE411:
-3000:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 3294              		.loc 1 3000 3 is_stmt 1 view .LVU1000
-3001:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 3295              		.loc 1 3001 3 view .LVU1001
-3000:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 3296              		.loc 1 3000 9 is_stmt 0 view .LVU1002
- 3297 0164 0023     		movs	r3, #0
- 3298              	.LVL392:
- 3299              	.L236:
-3001:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 3300              		.loc 1 3001 43 is_stmt 1 discriminator 1 view .LVU1003
- 3301              	.LBB413:
- 3302              	.LBI413:
+ 3604              		.loc 4 360 3 view .LVU1080
+ 3605              	.LBE438:
+ 3606              	.LBE437:
+3282:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3607              		.loc 1 3282 3 is_stmt 1 view .LVU1081
+3283:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
+ 3608              		.loc 1 3283 3 view .LVU1082
+3282:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3609              		.loc 1 3282 9 is_stmt 0 view .LVU1083
+ 3610 00f8 0023     		movs	r3, #0
+ 3611              	.LVL434:
+ 3612              	.L254:
+3283:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
+ 3613              		.loc 1 3283 43 is_stmt 1 discriminator 1 view .LVU1084
+ 3614              	.LBB439:
+ 3615              	.LBI439:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3303              		.loc 4 905 26 view .LVU1004
- 3304              	.LBB414:
+ 3616              		.loc 4 905 26 view .LVU1085
+ 3617              	.LBB440:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3305              		.loc 4 907 3 view .LVU1005
+ 3618              		.loc 4 907 3 view .LVU1086
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3306              		.loc 4 907 12 is_stmt 0 view .LVU1006
- 3307 0166 2C4A     		ldr	r2, .L250+8
- 3308 0168 9268     		ldr	r2, [r2, #8]
+ 3619              		.loc 4 907 12 is_stmt 0 view .LVU1087
+ 3620 00fa 484A     		ldr	r2, .L275+12
+ 3621 00fc 9268     		ldr	r2, [r2, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3309              		.loc 4 907 68 view .LVU1007
- 3310 016a 12F0010F 		tst	r2, #1
- 3311 016e 04D1     		bne	.L237
- 3312              	.LVL393:
+ 3622              		.loc 4 907 68 view .LVU1088
+ 3623 00fe 12F0010F 		tst	r2, #1
+ 3624 0102 04D1     		bne	.L255
+ 3625              	.LVL435:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3313              		.loc 4 907 68 view .LVU1008
- 3314              	.LBE414:
- 3315              	.LBE413:
-3001:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 3316              		.loc 1 3001 43 discriminator 2 view .LVU1009
- 3317 0170 B3F57A7F 		cmp	r3, #1000
- 3318 0174 01D8     		bhi	.L237
-3001:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 3319              		.loc 1 3001 62 is_stmt 1 discriminator 3 view .LVU1010
-3001:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
-ARM GAS  /tmp/ccwR4KB7.s 			page 194
-
-
- 3320              		.loc 1 3001 67 is_stmt 0 discriminator 3 view .LVU1011
- 3321 0176 0133     		adds	r3, r3, #1
- 3322              	.LVL394:
-3001:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 3323              		.loc 1 3001 67 discriminator 3 view .LVU1012
- 3324 0178 F5E7     		b	.L236
- 3325              	.L237:
-3002:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3326              		.loc 1 3002 3 is_stmt 1 view .LVU1013
- 3327              	.LVL395:
- 3328              	.LBB415:
- 3329              	.LBI415:
+ 3626              		.loc 4 907 68 view .LVU1089
+ 3627              	.LBE440:
+ 3628              	.LBE439:
+3283:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
+ 3629              		.loc 1 3283 43 discriminator 2 view .LVU1090
+ 3630 0104 B3F57A7F 		cmp	r3, #1000
+ 3631 0108 01D8     		bhi	.L255
+3283:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
+ 3632              		.loc 1 3283 62 is_stmt 1 discriminator 3 view .LVU1091
+3283:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
+ 3633              		.loc 1 3283 67 is_stmt 0 discriminator 3 view .LVU1092
+ 3634 010a 0133     		adds	r3, r3, #1
+ 3635              	.LVL436:
+3283:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
+ 3636              		.loc 1 3283 67 discriminator 3 view .LVU1093
+ 3637 010c F5E7     		b	.L254
+ 3638              	.L255:
+3284:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3639              		.loc 1 3284 3 is_stmt 1 view .LVU1094
+ 3640              	.LVL437:
+ 3641              	.LBB441:
+ 3642              	.LBI441:
  370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3330              		.loc 4 370 22 view .LVU1014
- 3331              	.LBB416:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3332              		.loc 4 372 3 view .LVU1015
- 3333 017a 2749     		ldr	r1, .L250+8
- 3334 017c 0A68     		ldr	r2, [r1]
- 3335 017e 22F04002 		bic	r2, r2, #64
- 3336 0182 0A60     		str	r2, [r1]
- 3337              	.LVL396:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3338              		.loc 4 372 3 is_stmt 0 view .LVU1016
- 3339              	.LBE416:
- 3340              	.LBE415:
-3003:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3341              		.loc 1 3003 3 is_stmt 1 view .LVU1017
- 3342              	.LBB418:
- 3343              	.LBB417:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3344              		.loc 4 373 1 is_stmt 0 view .LVU1018
- 3345 0184 00E0     		b	.L239
- 3346              	.L240:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3347              		.loc 4 373 1 view .LVU1019
- 3348              	.LBE417:
- 3349              	.LBE418:
-3003:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3350              		.loc 1 3003 20 is_stmt 1 discriminator 2 view .LVU1020
-3003:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3351              		.loc 1 3003 25 is_stmt 0 discriminator 2 view .LVU1021
- 3352 0186 0133     		adds	r3, r3, #1
- 3353              	.LVL397:
- 3354              	.L239:
-3003:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3355              		.loc 1 3003 14 is_stmt 1 discriminator 1 view .LVU1022
- 3356 0188 B3F5FA7F 		cmp	r3, #500
- 3357 018c FBD3     		bcc	.L240
-3005:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
- 3358              		.loc 1 3005 3 view .LVU1023
- 3359 018e 0122     		movs	r2, #1
- 3360 0190 4FF40061 		mov	r1, #2048
- 3361 0194 1E48     		ldr	r0, .L250
- 3362 0196 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3363              	.LVL398:
-3006:Src/main.c    **** 	}
-ARM GAS  /tmp/ccwR4KB7.s 			page 195
+ARM GAS  /tmp/ccEQxcUB.s 			page 206
 
 
- 3364              		.loc 1 3006 3 view .LVU1024
- 3365              	.LBB419:
- 3366              	.LBI419:
+ 3643              		.loc 4 370 22 view .LVU1095
+ 3644              	.LBB442:
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3645              		.loc 4 372 3 view .LVU1096
+ 3646 010e 4349     		ldr	r1, .L275+12
+ 3647 0110 0A68     		ldr	r2, [r1]
+ 3648 0112 22F04002 		bic	r2, r2, #64
+ 3649 0116 0A60     		str	r2, [r1]
+ 3650              	.LVL438:
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3651              		.loc 4 372 3 is_stmt 0 view .LVU1097
+ 3652              	.LBE442:
+ 3653              	.LBE441:
+3285:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3654              		.loc 1 3285 3 is_stmt 1 view .LVU1098
+ 3655              	.LBB444:
+ 3656              	.LBB443:
+ 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
+ 3657              		.loc 4 373 1 is_stmt 0 view .LVU1099
+ 3658 0118 00E0     		b	.L257
+ 3659              	.L258:
+ 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
+ 3660              		.loc 4 373 1 view .LVU1100
+ 3661              	.LBE443:
+ 3662              	.LBE444:
+3285:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3663              		.loc 1 3285 20 is_stmt 1 discriminator 2 view .LVU1101
+3285:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3664              		.loc 1 3285 25 is_stmt 0 discriminator 2 view .LVU1102
+ 3665 011a 0133     		adds	r3, r3, #1
+ 3666              	.LVL439:
+ 3667              	.L257:
+3285:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3668              		.loc 1 3285 14 is_stmt 1 discriminator 1 view .LVU1103
+ 3669 011c B3F5FA7F 		cmp	r3, #500
+ 3670 0120 FBD3     		bcc	.L258
+3287:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
+ 3671              		.loc 1 3287 3 view .LVU1104
+ 3672 0122 0122     		movs	r2, #1
+ 3673 0124 4021     		movs	r1, #64
+ 3674 0126 3B48     		ldr	r0, .L275+4
+ 3675 0128 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3676              	.LVL440:
+3288:Src/main.c    **** 	}
+ 3677              		.loc 1 3288 3 view .LVU1105
+ 3678              	.LBB445:
+ 3679              	.LBI445:
 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3367              		.loc 4 1344 26 view .LVU1025
- 3368              	.LBB420:
+ 3680              		.loc 4 1344 26 view .LVU1106
+ 3681              	.LBB446:
 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3369              		.loc 4 1346 3 view .LVU1026
+ 3682              		.loc 4 1346 3 view .LVU1107
 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3370              		.loc 4 1346 21 is_stmt 0 view .LVU1027
- 3371 019a 1F4B     		ldr	r3, .L250+8
- 3372 019c DD68     		ldr	r5, [r3, #12]
+ 3683              		.loc 4 1346 21 is_stmt 0 view .LVU1108
+ 3684 012c 3B4B     		ldr	r3, .L275+12
+ 3685 012e DD68     		ldr	r5, [r3, #12]
 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3373              		.loc 4 1346 10 view .LVU1028
- 3374 019e ADB2     		uxth	r5, r5
- 3375              	.LVL399:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3376              		.loc 4 1346 10 view .LVU1029
- 3377              	.LBE420:
- 3378              	.LBE419:
- 3379 01a0 91E7     		b	.L214
- 3380              	.LVL400:
- 3381              	.L215:
-3010:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
- 3382              		.loc 1 3010 3 is_stmt 1 view .LVU1030
- 3383 01a2 1C4C     		ldr	r4, .L250+4
- 3384 01a4 0122     		movs	r2, #1
- 3385 01a6 4021     		movs	r1, #64
- 3386 01a8 2046     		mov	r0, r4
- 3387 01aa FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3388              	.LVL401:
-3011:Src/main.c    **** 		tmp32=0;
- 3389              		.loc 1 3011 3 view .LVU1031
- 3390 01ae 0022     		movs	r2, #0
- 3391 01b0 4FF48061 		mov	r1, #1024
- 3392 01b4 2046     		mov	r0, r4
- 3393 01b6 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3394              	.LVL402:
-3012:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3395              		.loc 1 3012 3 view .LVU1032
-3013:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3396              		.loc 1 3013 3 view .LVU1033
-3012:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3397              		.loc 1 3012 8 is_stmt 0 view .LVU1034
- 3398 01ba 0023     		movs	r3, #0
-3013:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3399              		.loc 1 3013 8 view .LVU1035
- 3400 01bc 00E0     		b	.L241
- 3401              	.LVL403:
- 3402              	.L242:
-3013:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3403              		.loc 1 3013 20 is_stmt 1 discriminator 2 view .LVU1036
-3013:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3404              		.loc 1 3013 25 is_stmt 0 discriminator 2 view .LVU1037
- 3405 01be 0133     		adds	r3, r3, #1
- 3406              	.LVL404:
- 3407              	.L241:
-ARM GAS  /tmp/ccwR4KB7.s 			page 196
+ARM GAS  /tmp/ccEQxcUB.s 			page 207
 
 
-3013:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3408              		.loc 1 3013 14 is_stmt 1 discriminator 1 view .LVU1038
- 3409 01c0 B3F5FA7F 		cmp	r3, #500
- 3410 01c4 FBD3     		bcc	.L242
-3015:Src/main.c    **** 		tmp32 = 0;
- 3411              		.loc 1 3015 3 view .LVU1039
- 3412              	.LVL405:
- 3413              	.LBB421:
- 3414              	.LBI421:
+ 3686              		.loc 4 1346 10 view .LVU1109
+ 3687 0130 ADB2     		uxth	r5, r5
+ 3688              	.LVL441:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3689              		.loc 4 1346 10 view .LVU1110
+ 3690              	.LBE446:
+ 3691              	.LBE445:
+ 3692 0132 C8E7     		b	.L239
+ 3693              	.LVL442:
+ 3694              	.L242:
+3292:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
+ 3695              		.loc 1 3292 3 is_stmt 1 view .LVU1111
+ 3696 0134 364C     		ldr	r4, .L275
+ 3697 0136 0122     		movs	r2, #1
+ 3698 0138 4FF48061 		mov	r1, #1024
+ 3699 013c 2046     		mov	r0, r4
+ 3700 013e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3701              	.LVL443:
+3293:Src/main.c    **** 		tmp32=0;
+ 3702              		.loc 1 3293 3 view .LVU1112
+ 3703 0142 0022     		movs	r2, #0
+ 3704 0144 4FF40061 		mov	r1, #2048
+ 3705 0148 2046     		mov	r0, r4
+ 3706 014a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3707              	.LVL444:
+3294:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3708              		.loc 1 3294 3 view .LVU1113
+3295:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3709              		.loc 1 3295 3 view .LVU1114
+3294:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3710              		.loc 1 3294 8 is_stmt 0 view .LVU1115
+ 3711 014e 0023     		movs	r3, #0
+3295:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3712              		.loc 1 3295 8 view .LVU1116
+ 3713 0150 00E0     		b	.L259
+ 3714              	.LVL445:
+ 3715              	.L260:
+3295:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3716              		.loc 1 3295 20 is_stmt 1 discriminator 2 view .LVU1117
+3295:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3717              		.loc 1 3295 25 is_stmt 0 discriminator 2 view .LVU1118
+ 3718 0152 0133     		adds	r3, r3, #1
+ 3719              	.LVL446:
+ 3720              	.L259:
+3295:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3721              		.loc 1 3295 14 is_stmt 1 discriminator 1 view .LVU1119
+ 3722 0154 B3F5FA7F 		cmp	r3, #500
+ 3723 0158 FBD3     		bcc	.L260
+3297:Src/main.c    **** 		tmp32 = 0;
+ 3724              		.loc 1 3297 3 view .LVU1120
+ 3725              	.LVL447:
+ 3726              	.LBB447:
+ 3727              	.LBI447:
  358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3415              		.loc 4 358 22 view .LVU1040
- 3416              	.LBB422:
+ 3728              		.loc 4 358 22 view .LVU1121
+ 3729              	.LBB448:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3417              		.loc 4 360 3 view .LVU1041
- 3418 01c6 154A     		ldr	r2, .L250+12
- 3419 01c8 1368     		ldr	r3, [r2]
- 3420              	.LVL406:
+ARM GAS  /tmp/ccEQxcUB.s 			page 208
+
+
+ 3730              		.loc 4 360 3 view .LVU1122
+ 3731 015a 2F4A     		ldr	r2, .L275+8
+ 3732 015c 1368     		ldr	r3, [r2]
+ 3733              	.LVL448:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3421              		.loc 4 360 3 is_stmt 0 view .LVU1042
- 3422 01ca 43F04003 		orr	r3, r3, #64
- 3423 01ce 1360     		str	r3, [r2]
- 3424              	.LVL407:
+ 3734              		.loc 4 360 3 is_stmt 0 view .LVU1123
+ 3735 015e 43F04003 		orr	r3, r3, #64
+ 3736 0162 1360     		str	r3, [r2]
+ 3737              	.LVL449:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3425              		.loc 4 360 3 view .LVU1043
- 3426              	.LBE422:
- 3427              	.LBE421:
-3016:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 3428              		.loc 1 3016 3 is_stmt 1 view .LVU1044
-3017:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 3429              		.loc 1 3017 3 view .LVU1045
-3016:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 3430              		.loc 1 3016 9 is_stmt 0 view .LVU1046
- 3431 01d0 0023     		movs	r3, #0
- 3432              	.LVL408:
- 3433              	.L243:
-3017:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 3434              		.loc 1 3017 43 is_stmt 1 discriminator 1 view .LVU1047
- 3435              	.LBB423:
- 3436              	.LBI423:
+ 3738              		.loc 4 360 3 view .LVU1124
+ 3739              	.LBE448:
+ 3740              	.LBE447:
+3298:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3741              		.loc 1 3298 3 is_stmt 1 view .LVU1125
+3299:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
+ 3742              		.loc 1 3299 3 view .LVU1126
+3298:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3743              		.loc 1 3298 9 is_stmt 0 view .LVU1127
+ 3744 0164 0023     		movs	r3, #0
+ 3745              	.LVL450:
+ 3746              	.L261:
+3299:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
+ 3747              		.loc 1 3299 43 is_stmt 1 discriminator 1 view .LVU1128
+ 3748              	.LBB449:
+ 3749              	.LBI449:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3437              		.loc 4 905 26 view .LVU1048
- 3438              	.LBB424:
+ 3750              		.loc 4 905 26 view .LVU1129
+ 3751              	.LBB450:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3439              		.loc 4 907 3 view .LVU1049
+ 3752              		.loc 4 907 3 view .LVU1130
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3440              		.loc 4 907 12 is_stmt 0 view .LVU1050
- 3441 01d2 124A     		ldr	r2, .L250+12
- 3442 01d4 9268     		ldr	r2, [r2, #8]
+ 3753              		.loc 4 907 12 is_stmt 0 view .LVU1131
+ 3754 0166 2C4A     		ldr	r2, .L275+8
+ 3755 0168 9268     		ldr	r2, [r2, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3443              		.loc 4 907 68 view .LVU1051
- 3444 01d6 12F0010F 		tst	r2, #1
- 3445 01da 04D1     		bne	.L244
- 3446              	.LVL409:
+ 3756              		.loc 4 907 68 view .LVU1132
+ 3757 016a 12F0010F 		tst	r2, #1
+ 3758 016e 04D1     		bne	.L262
+ 3759              	.LVL451:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3447              		.loc 4 907 68 view .LVU1052
- 3448              	.LBE424:
- 3449              	.LBE423:
-ARM GAS  /tmp/ccwR4KB7.s 			page 197
+ 3760              		.loc 4 907 68 view .LVU1133
+ 3761              	.LBE450:
+ 3762              	.LBE449:
+3299:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
+ 3763              		.loc 1 3299 43 discriminator 2 view .LVU1134
+ 3764 0170 B3F57A7F 		cmp	r3, #1000
+ 3765 0174 01D8     		bhi	.L262
+3299:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
+ 3766              		.loc 1 3299 62 is_stmt 1 discriminator 3 view .LVU1135
+3299:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
+ 3767              		.loc 1 3299 67 is_stmt 0 discriminator 3 view .LVU1136
+ 3768 0176 0133     		adds	r3, r3, #1
+ 3769              	.LVL452:
+3299:Src/main.c    **** 		LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
+ 3770              		.loc 1 3299 67 discriminator 3 view .LVU1137
+ 3771 0178 F5E7     		b	.L261
+ARM GAS  /tmp/ccEQxcUB.s 			page 209
 
 
-3017:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 3450              		.loc 1 3017 43 discriminator 2 view .LVU1053
- 3451 01dc B3F57A7F 		cmp	r3, #1000
- 3452 01e0 01D8     		bhi	.L244
-3017:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 3453              		.loc 1 3017 62 is_stmt 1 discriminator 3 view .LVU1054
-3017:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 3454              		.loc 1 3017 67 is_stmt 0 discriminator 3 view .LVU1055
- 3455 01e2 0133     		adds	r3, r3, #1
- 3456              	.LVL410:
-3017:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 3457              		.loc 1 3017 67 discriminator 3 view .LVU1056
- 3458 01e4 F5E7     		b	.L243
- 3459              	.L244:
-3018:Src/main.c    **** 		while(tmp32<500){tmp32++;}
- 3460              		.loc 1 3018 3 is_stmt 1 view .LVU1057
- 3461              	.LVL411:
- 3462              	.LBB425:
- 3463              	.LBI425:
+ 3772              	.L262:
+3300:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3773              		.loc 1 3300 3 is_stmt 1 view .LVU1138
+ 3774              	.LVL453:
+ 3775              	.LBB451:
+ 3776              	.LBI451:
  370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3464              		.loc 4 370 22 view .LVU1058
- 3465              	.LBB426:
+ 3777              		.loc 4 370 22 view .LVU1139
+ 3778              	.LBB452:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3466              		.loc 4 372 3 view .LVU1059
- 3467 01e6 0D49     		ldr	r1, .L250+12
- 3468 01e8 0A68     		ldr	r2, [r1]
- 3469 01ea 22F04002 		bic	r2, r2, #64
- 3470 01ee 0A60     		str	r2, [r1]
- 3471              	.LVL412:
+ 3779              		.loc 4 372 3 view .LVU1140
+ 3780 017a 2749     		ldr	r1, .L275+8
+ 3781 017c 0A68     		ldr	r2, [r1]
+ 3782 017e 22F04002 		bic	r2, r2, #64
+ 3783 0182 0A60     		str	r2, [r1]
+ 3784              	.LVL454:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3472              		.loc 4 372 3 is_stmt 0 view .LVU1060
- 3473              	.LBE426:
- 3474              	.LBE425:
-3019:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3475              		.loc 1 3019 3 is_stmt 1 view .LVU1061
- 3476              	.LBB428:
- 3477              	.LBB427:
+ 3785              		.loc 4 372 3 is_stmt 0 view .LVU1141
+ 3786              	.LBE452:
+ 3787              	.LBE451:
+3301:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3788              		.loc 1 3301 3 is_stmt 1 view .LVU1142
+ 3789              	.LBB454:
+ 3790              	.LBB453:
  373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3478              		.loc 4 373 1 is_stmt 0 view .LVU1062
- 3479 01f0 00E0     		b	.L246
- 3480              	.L247:
+ 3791              		.loc 4 373 1 is_stmt 0 view .LVU1143
+ 3792 0184 00E0     		b	.L264
+ 3793              	.L265:
  373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
- 3481              		.loc 4 373 1 view .LVU1063
- 3482              	.LBE427:
- 3483              	.LBE428:
-3019:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3484              		.loc 1 3019 20 is_stmt 1 discriminator 2 view .LVU1064
-3019:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3485              		.loc 1 3019 25 is_stmt 0 discriminator 2 view .LVU1065
- 3486 01f2 0133     		adds	r3, r3, #1
- 3487              	.LVL413:
- 3488              	.L246:
-3019:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 3489              		.loc 1 3019 14 is_stmt 1 discriminator 1 view .LVU1066
- 3490 01f4 B3F5FA7F 		cmp	r3, #500
- 3491 01f8 FBD3     		bcc	.L247
-3021:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
-ARM GAS  /tmp/ccwR4KB7.s 			page 198
-
-
- 3492              		.loc 1 3021 3 view .LVU1067
- 3493 01fa 0122     		movs	r2, #1
- 3494 01fc 4FF48061 		mov	r1, #1024
- 3495 0200 0448     		ldr	r0, .L250+4
- 3496 0202 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3497              	.LVL414:
-3022:Src/main.c    **** 	}
- 3498              		.loc 1 3022 3 view .LVU1068
- 3499              	.LBB429:
- 3500              	.LBI429:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3501              		.loc 4 1344 26 view .LVU1069
- 3502              	.LBB430:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3503              		.loc 4 1346 3 view .LVU1070
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3504              		.loc 4 1346 21 is_stmt 0 view .LVU1071
- 3505 0206 054B     		ldr	r3, .L250+12
- 3506 0208 DD68     		ldr	r5, [r3, #12]
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3507              		.loc 4 1346 10 view .LVU1072
- 3508 020a ADB2     		uxth	r5, r5
- 3509              	.LVL415:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3510              		.loc 4 1346 10 view .LVU1073
- 3511 020c 5BE7     		b	.L214
- 3512              	.L251:
- 3513 020e 00BF     		.align	2
- 3514              	.L250:
- 3515 0210 00100240 		.word	1073876992
- 3516 0214 00140240 		.word	1073878016
- 3517 0218 00340140 		.word	1073820672
- 3518 021c 00500140 		.word	1073827840
- 3519              	.LBE430:
- 3520              	.LBE429:
- 3521              		.cfi_endproc
- 3522              	.LFE1221:
- 3524              		.section	.text.Stop_TIM10,"ax",%progbits
- 3525              		.align	1
- 3526              		.syntax unified
- 3527              		.thumb
- 3528              		.thumb_func
- 3530              	Stop_TIM10:
- 3531              	.LFB1232:
-3187:Src/main.c    **** uint8_t CheckChecksum(uint16_t *pbuff)
-3188:Src/main.c    **** {
-3189:Src/main.c    ****   uint16_t cl_ind;
-3190:Src/main.c    **** 
-3191:Src/main.c    ****   switch (UART_header)
-3192:Src/main.c    ****   {
-3193:Src/main.c    ****     case 0x7777:
-3194:Src/main.c    ****       cl_ind = TSK_16 - 2;
-3195:Src/main.c    ****     break;
-3196:Src/main.c    ****     case 0x1111:
-3197:Src/main.c    ****       cl_ind = CL_16 - 2;
-3198:Src/main.c    ****     break;
-3199:Src/main.c    ****     default:
-ARM GAS  /tmp/ccwR4KB7.s 			page 199
-
-
-3200:Src/main.c    ****       return 0;
-3201:Src/main.c    ****     break;
-3202:Src/main.c    ****   }
-3203:Src/main.c    **** 
-3204:Src/main.c    ****   CS_result = CalculateChecksum(pbuff, cl_ind);
-3205:Src/main.c    **** 
-3206:Src/main.c    ****   return ((CS_result == COMMAND[cl_ind]) ? 1 : 0);
-3207:Src/main.c    **** }
-3208:Src/main.c    **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
-3209:Src/main.c    **** {
-3210:Src/main.c    **** 	short  i;
-3211:Src/main.c    **** 	uint16_t cs = *pbuff;
-3212:Src/main.c    ****   
-3213:Src/main.c    ****  	for(i = 1; i < len; i++)
-3214:Src/main.c    **** 	{
-3215:Src/main.c    **** 		cs ^= *(pbuff+i);
-3216:Src/main.c    **** 	}
-3217:Src/main.c    **** 	return cs;
-3218:Src/main.c    **** }
-3219:Src/main.c    **** 
-3220:Src/main.c    **** /*int SD_Init(void)
-3221:Src/main.c    **** {
-3222:Src/main.c    **** 	int test=0;
-3223:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
-3224:Src/main.c    **** 	{
-3225:Src/main.c    **** 		test = Mount_SD("/");
-3226:Src/main.c    **** 		if (test == 0) //0 - suc
-3227:Src/main.c    **** 		{
-3228:Src/main.c    **** 			//Format_SD();
-3229:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
-3230:Src/main.c    **** 			//Create_File("FILE2.TXT");
-3231:Src/main.c    **** 			Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part 
-3232:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
-3233:Src/main.c    **** 			return test;
-3234:Src/main.c    **** 		}
-3235:Src/main.c    **** 		else
-3236:Src/main.c    **** 		{
-3237:Src/main.c    **** 			return 1;
-3238:Src/main.c    **** 		}
-3239:Src/main.c    **** 	}
-3240:Src/main.c    **** 	else
-3241:Src/main.c    **** 	{
-3242:Src/main.c    **** 		return 1;
-3243:Src/main.c    **** 	}
-3244:Src/main.c    **** }*/
-3245:Src/main.c    **** 
-3246:Src/main.c    **** int SD_SAVE(uint16_t *pbuff)
-3247:Src/main.c    **** {
-3248:Src/main.c    **** 	int test=0;
-3249:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
-3250:Src/main.c    **** 	{
-3251:Src/main.c    **** 		test = Mount_SD("/");
-3252:Src/main.c    **** 		if (test == 0) //0 - suc
-3253:Src/main.c    **** 		{
-3254:Src/main.c    **** 			//Format_SD();
-3255:Src/main.c    **** 			test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8);
-3256:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
-ARM GAS  /tmp/ccwR4KB7.s 			page 200
-
-
-3257:Src/main.c    **** 			return test;
-3258:Src/main.c    **** 		}
-3259:Src/main.c    **** 		else
-3260:Src/main.c    **** 		{
-3261:Src/main.c    **** 			return 1;
-3262:Src/main.c    **** 		}
-3263:Src/main.c    **** 	}
-3264:Src/main.c    **** 	else
-3265:Src/main.c    **** 	{
-3266:Src/main.c    **** 		return 1;
-3267:Src/main.c    **** 	}
-3268:Src/main.c    **** }
-3269:Src/main.c    **** 
-3270:Src/main.c    **** 
-3271:Src/main.c    **** 
-3272:Src/main.c    **** //uint32_t Get_Length(void)
-3273:Src/main.c    **** //{
-3274:Src/main.c    **** //	return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16);
-3275:Src/main.c    **** //}
-3276:Src/main.c    **** 
-3277:Src/main.c    **** int SD_READ(uint16_t *pbuff)
-3278:Src/main.c    **** {
-3279:Src/main.c    **** 	int test=0;
-3280:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
-3281:Src/main.c    **** 	{
-3282:Src/main.c    **** 		test = Mount_SD("/");
-3283:Src/main.c    **** 		if (test == 0) //0 - suc
-3284:Src/main.c    **** 		{
-3285:Src/main.c    **** 			//Format_SD();
-3286:Src/main.c    **** 			test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes
-3287:Src/main.c    **** 			fgoto+=DL_8;
-3288:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
-3289:Src/main.c    **** 			return test;
-3290:Src/main.c    **** 		}
-3291:Src/main.c    **** 		else
-3292:Src/main.c    **** 		{
-3293:Src/main.c    **** 			return 1;
-3294:Src/main.c    **** 		}
-3295:Src/main.c    **** 	}
-3296:Src/main.c    **** 	else
-3297:Src/main.c    **** 	{
-3298:Src/main.c    **** 		return 1;
-3299:Src/main.c    **** 	}
-3300:Src/main.c    **** 	
-3301:Src/main.c    **** /*	for (uint16_t j = 0; j < DL_16; j++)
-3302:Src/main.c    **** 	{
-3303:Src/main.c    **** 		*(pbuff+j) = SD_matr[SD_SLIDE][j];
+ 3794              		.loc 4 373 1 view .LVU1144
+ 3795              	.LBE453:
+ 3796              	.LBE454:
+3301:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3797              		.loc 1 3301 20 is_stmt 1 discriminator 2 view .LVU1145
+3301:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3798              		.loc 1 3301 25 is_stmt 0 discriminator 2 view .LVU1146
+ 3799 0186 0133     		adds	r3, r3, #1
+ 3800              	.LVL455:
+ 3801              	.L264:
+3301:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3802              		.loc 1 3301 14 is_stmt 1 discriminator 1 view .LVU1147
+ 3803 0188 B3F5FA7F 		cmp	r3, #500
+ 3804 018c FBD3     		bcc	.L265
+3303:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI4);
+ 3805              		.loc 1 3303 3 view .LVU1148
+ 3806 018e 0122     		movs	r2, #1
+ 3807 0190 4FF40061 		mov	r1, #2048
+ 3808 0194 1E48     		ldr	r0, .L275
+ 3809 0196 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3810              	.LVL456:
 3304:Src/main.c    **** 	}
-3305:Src/main.c    **** 	if (SD_SLIDE<Get_Length())
-3306:Src/main.c    **** 	{
-3307:Src/main.c    **** 		SD_SLIDE++;
-3308:Src/main.c    **** 		return 0x0000;
-3309:Src/main.c    **** 	}
-3310:Src/main.c    **** 	else
-3311:Src/main.c    **** 	{
-3312:Src/main.c    **** 		return 0x0001;
-3313:Src/main.c    **** 	}*/
-ARM GAS  /tmp/ccwR4KB7.s 			page 201
+ 3811              		.loc 1 3304 3 view .LVU1149
+ 3812              	.LBB455:
+ 3813              	.LBI455:
+1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 3814              		.loc 4 1344 26 view .LVU1150
+ 3815              	.LBB456:
+ARM GAS  /tmp/ccEQxcUB.s 			page 210
 
 
-3314:Src/main.c    **** }
-3315:Src/main.c    **** 
-3316:Src/main.c    **** int SD_REMOVE(void)
-3317:Src/main.c    **** {
-3318:Src/main.c    **** 	int test=0;
-3319:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
-3320:Src/main.c    **** 	{
-3321:Src/main.c    **** 		test = Mount_SD("/");
-3322:Src/main.c    **** 		if (test==FR_OK)
-3323:Src/main.c    **** 		{	
-3324:Src/main.c    **** 			test = Remove_File ("FILE1.TXT");
-3325:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
-3326:Src/main.c    **** 			//test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
-3327:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
-3328:Src/main.c    **** 			return test;
-3329:Src/main.c    **** 		}
-3330:Src/main.c    **** 		else
-3331:Src/main.c    **** 		{
-3332:Src/main.c    **** 			return 1;
-3333:Src/main.c    **** 		}
-3334:Src/main.c    **** 	}
-3335:Src/main.c    **** 	else
-3336:Src/main.c    **** 	{
-3337:Src/main.c    **** 		return 1;
-3338:Src/main.c    **** 	}
-3339:Src/main.c    **** }
-3340:Src/main.c    **** 
-3341:Src/main.c    **** //-------------------------------------------------------
-3342:Src/main.c    **** void USART_TX (uint8_t* dt, uint16_t sz)
-3343:Src/main.c    **** {
-3344:Src/main.c    ****   uint16_t ind = 0;
-3345:Src/main.c    ****   while (ind<sz)
-3346:Src/main.c    ****   {
-3347:Src/main.c    ****     while (!LL_USART_IsActiveFlag_TXE(USART1)) {}
-3348:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
-3349:Src/main.c    ****     ind++;
-3350:Src/main.c    ****   }
-3351:Src/main.c    **** }
-3352:Src/main.c    **** 
-3353:Src/main.c    **** void USART_TX_DMA (uint16_t sz)
-3354:Src/main.c    **** {
-3355:Src/main.c    **** 	while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter
-3356:Src/main.c    **** 	LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
-3357:Src/main.c    ****   LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz);
-3358:Src/main.c    ****   LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7);
-3359:Src/main.c    **** 	u_tx_flg = 1;//indicate that transfer begin
-3360:Src/main.c    **** }
-3361:Src/main.c    **** 
-3362:Src/main.c    **** static void Stop_TIM10(void)
-3363:Src/main.c    **** {
- 3532              		.loc 1 3363 1 is_stmt 1 view -0
- 3533              		.cfi_startproc
- 3534              		@ args = 0, pretend = 0, frame = 0
- 3535              		@ frame_needed = 0, uses_anonymous_args = 0
- 3536 0000 08B5     		push	{r3, lr}
- 3537              	.LCFI34:
- 3538              		.cfi_def_cfa_offset 8
-ARM GAS  /tmp/ccwR4KB7.s 			page 202
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3816              		.loc 4 1346 3 view .LVU1151
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3817              		.loc 4 1346 21 is_stmt 0 view .LVU1152
+ 3818 019a 1F4B     		ldr	r3, .L275+8
+ 3819 019c DD68     		ldr	r5, [r3, #12]
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3820              		.loc 4 1346 10 view .LVU1153
+ 3821 019e ADB2     		uxth	r5, r5
+ 3822              	.LVL457:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3823              		.loc 4 1346 10 view .LVU1154
+ 3824              	.LBE456:
+ 3825              	.LBE455:
+ 3826 01a0 91E7     		b	.L239
+ 3827              	.LVL458:
+ 3828              	.L240:
+3308:Src/main.c    **** 		HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
+ 3829              		.loc 1 3308 3 is_stmt 1 view .LVU1155
+ 3830 01a2 1C4C     		ldr	r4, .L275+4
+ 3831 01a4 0122     		movs	r2, #1
+ 3832 01a6 4021     		movs	r1, #64
+ 3833 01a8 2046     		mov	r0, r4
+ 3834 01aa FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3835              	.LVL459:
+3309:Src/main.c    **** 		tmp32=0;
+ 3836              		.loc 1 3309 3 view .LVU1156
+ 3837 01ae 0022     		movs	r2, #0
+ 3838 01b0 4FF48061 		mov	r1, #1024
+ 3839 01b4 2046     		mov	r0, r4
+ 3840 01b6 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3841              	.LVL460:
+3310:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3842              		.loc 1 3310 3 view .LVU1157
+3311:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3843              		.loc 1 3311 3 view .LVU1158
+3310:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3844              		.loc 1 3310 8 is_stmt 0 view .LVU1159
+ 3845 01ba 0023     		movs	r3, #0
+3311:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3846              		.loc 1 3311 8 view .LVU1160
+ 3847 01bc 00E0     		b	.L266
+ 3848              	.LVL461:
+ 3849              	.L267:
+3311:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3850              		.loc 1 3311 20 is_stmt 1 discriminator 2 view .LVU1161
+3311:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3851              		.loc 1 3311 25 is_stmt 0 discriminator 2 view .LVU1162
+ 3852 01be 0133     		adds	r3, r3, #1
+ 3853              	.LVL462:
+ 3854              	.L266:
+3311:Src/main.c    **** 		//LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
+ 3855              		.loc 1 3311 14 is_stmt 1 discriminator 1 view .LVU1163
+ 3856 01c0 B3F5FA7F 		cmp	r3, #500
+ 3857 01c4 FBD3     		bcc	.L267
+3313:Src/main.c    **** 		tmp32 = 0;
+ 3858              		.loc 1 3313 3 view .LVU1164
+ARM GAS  /tmp/ccEQxcUB.s 			page 211
 
 
- 3539              		.cfi_offset 3, -8
- 3540              		.cfi_offset 14, -4
-3364:Src/main.c    **** 	HAL_TIM_Base_Stop_IT(&htim10);
- 3541              		.loc 1 3364 2 view .LVU1075
- 3542 0002 0448     		ldr	r0, .L254
- 3543 0004 FFF7FEFF 		bl	HAL_TIM_Base_Stop_IT
- 3544              	.LVL416:
-3365:Src/main.c    **** 	TIM10_coflag = 0;
- 3545              		.loc 1 3365 2 view .LVU1076
- 3546              		.loc 1 3365 15 is_stmt 0 view .LVU1077
- 3547 0008 0023     		movs	r3, #0
- 3548 000a 034A     		ldr	r2, .L254+4
- 3549 000c 1370     		strb	r3, [r2]
-3366:Src/main.c    **** 	TO10 = 0;
- 3550              		.loc 1 3366 2 is_stmt 1 view .LVU1078
- 3551              		.loc 1 3366 7 is_stmt 0 view .LVU1079
- 3552 000e 034A     		ldr	r2, .L254+8
- 3553 0010 1360     		str	r3, [r2]
-3367:Src/main.c    **** }
- 3554              		.loc 1 3367 1 view .LVU1080
- 3555 0012 08BD     		pop	{r3, pc}
- 3556              	.L255:
- 3557              		.align	2
- 3558              	.L254:
- 3559 0014 00000000 		.word	htim10
- 3560 0018 00000000 		.word	TIM10_coflag
- 3561 001c 00000000 		.word	TO10
- 3562              		.cfi_endproc
- 3563              	.LFE1232:
- 3565              		.section	.text.MX_GPIO_Init,"ax",%progbits
- 3566              		.align	1
- 3567              		.syntax unified
- 3568              		.thumb
- 3569              		.thumb_func
- 3571              	MX_GPIO_Init:
- 3572              	.LFB1206:
-1899:Src/main.c    ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 3573              		.loc 1 1899 1 is_stmt 1 view -0
- 3574              		.cfi_startproc
- 3575              		@ args = 0, pretend = 0, frame = 56
- 3576              		@ frame_needed = 0, uses_anonymous_args = 0
- 3577 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
- 3578              	.LCFI35:
- 3579              		.cfi_def_cfa_offset 36
- 3580              		.cfi_offset 4, -36
- 3581              		.cfi_offset 5, -32
- 3582              		.cfi_offset 6, -28
- 3583              		.cfi_offset 7, -24
- 3584              		.cfi_offset 8, -20
- 3585              		.cfi_offset 9, -16
- 3586              		.cfi_offset 10, -12
- 3587              		.cfi_offset 11, -8
- 3588              		.cfi_offset 14, -4
- 3589 0004 8FB0     		sub	sp, sp, #60
- 3590              	.LCFI36:
- 3591              		.cfi_def_cfa_offset 96
-1900:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_1 */
-ARM GAS  /tmp/ccwR4KB7.s 			page 203
+ 3859              	.LVL463:
+ 3860              	.LBB457:
+ 3861              	.LBI457:
+ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 3862              		.loc 4 358 22 view .LVU1165
+ 3863              	.LBB458:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3864              		.loc 4 360 3 view .LVU1166
+ 3865 01c6 154A     		ldr	r2, .L275+12
+ 3866 01c8 1368     		ldr	r3, [r2]
+ 3867              	.LVL464:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3868              		.loc 4 360 3 is_stmt 0 view .LVU1167
+ 3869 01ca 43F04003 		orr	r3, r3, #64
+ 3870 01ce 1360     		str	r3, [r2]
+ 3871              	.LVL465:
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3872              		.loc 4 360 3 view .LVU1168
+ 3873              	.LBE458:
+ 3874              	.LBE457:
+3314:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3875              		.loc 1 3314 3 is_stmt 1 view .LVU1169
+3315:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
+ 3876              		.loc 1 3315 3 view .LVU1170
+3314:Src/main.c    **** 		while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
+ 3877              		.loc 1 3314 9 is_stmt 0 view .LVU1171
+ 3878 01d0 0023     		movs	r3, #0
+ 3879              	.LVL466:
+ 3880              	.L268:
+3315:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
+ 3881              		.loc 1 3315 43 is_stmt 1 discriminator 1 view .LVU1172
+ 3882              	.LBB459:
+ 3883              	.LBI459:
+ 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 3884              		.loc 4 905 26 view .LVU1173
+ 3885              	.LBB460:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3886              		.loc 4 907 3 view .LVU1174
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3887              		.loc 4 907 12 is_stmt 0 view .LVU1175
+ 3888 01d2 124A     		ldr	r2, .L275+12
+ 3889 01d4 9268     		ldr	r2, [r2, #8]
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3890              		.loc 4 907 68 view .LVU1176
+ 3891 01d6 12F0010F 		tst	r2, #1
+ 3892 01da 04D1     		bne	.L269
+ 3893              	.LVL467:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3894              		.loc 4 907 68 view .LVU1177
+ 3895              	.LBE460:
+ 3896              	.LBE459:
+3315:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
+ 3897              		.loc 1 3315 43 discriminator 2 view .LVU1178
+ 3898 01dc B3F57A7F 		cmp	r3, #1000
+ 3899 01e0 01D8     		bhi	.L269
+3315:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
+ 3900              		.loc 1 3315 62 is_stmt 1 discriminator 3 view .LVU1179
+ARM GAS  /tmp/ccEQxcUB.s 			page 212
 
 
- 3592              		.loc 1 1900 3 view .LVU1082
-1900:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_1 */
- 3593              		.loc 1 1900 20 is_stmt 0 view .LVU1083
- 3594 0006 0024     		movs	r4, #0
- 3595 0008 0994     		str	r4, [sp, #36]
- 3596 000a 0A94     		str	r4, [sp, #40]
- 3597 000c 0B94     		str	r4, [sp, #44]
- 3598 000e 0C94     		str	r4, [sp, #48]
- 3599 0010 0D94     		str	r4, [sp, #52]
-1905:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
- 3600              		.loc 1 1905 3 is_stmt 1 view .LVU1084
- 3601              	.LBB431:
-1905:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
- 3602              		.loc 1 1905 3 view .LVU1085
-1905:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
- 3603              		.loc 1 1905 3 view .LVU1086
- 3604 0012 8A4B     		ldr	r3, .L258
- 3605 0014 1A6B     		ldr	r2, [r3, #48]
- 3606 0016 42F02002 		orr	r2, r2, #32
- 3607 001a 1A63     		str	r2, [r3, #48]
-1905:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
- 3608              		.loc 1 1905 3 view .LVU1087
- 3609 001c 1A6B     		ldr	r2, [r3, #48]
- 3610 001e 02F02002 		and	r2, r2, #32
- 3611 0022 0192     		str	r2, [sp, #4]
-1905:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
- 3612              		.loc 1 1905 3 view .LVU1088
- 3613 0024 019A     		ldr	r2, [sp, #4]
- 3614              	.LBE431:
-1905:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
- 3615              		.loc 1 1905 3 view .LVU1089
-1906:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
- 3616              		.loc 1 1906 3 view .LVU1090
- 3617              	.LBB432:
-1906:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
- 3618              		.loc 1 1906 3 view .LVU1091
-1906:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
- 3619              		.loc 1 1906 3 view .LVU1092
- 3620 0026 1A6B     		ldr	r2, [r3, #48]
- 3621 0028 42F08002 		orr	r2, r2, #128
- 3622 002c 1A63     		str	r2, [r3, #48]
-1906:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
- 3623              		.loc 1 1906 3 view .LVU1093
- 3624 002e 1A6B     		ldr	r2, [r3, #48]
- 3625 0030 02F08002 		and	r2, r2, #128
- 3626 0034 0292     		str	r2, [sp, #8]
-1906:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
- 3627              		.loc 1 1906 3 view .LVU1094
- 3628 0036 029A     		ldr	r2, [sp, #8]
- 3629              	.LBE432:
-1906:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
- 3630              		.loc 1 1906 3 view .LVU1095
-1907:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
- 3631              		.loc 1 1907 3 view .LVU1096
- 3632              	.LBB433:
-1907:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
- 3633              		.loc 1 1907 3 view .LVU1097
-ARM GAS  /tmp/ccwR4KB7.s 			page 204
+3315:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
+ 3901              		.loc 1 3315 67 is_stmt 0 discriminator 3 view .LVU1180
+ 3902 01e2 0133     		adds	r3, r3, #1
+ 3903              	.LVL468:
+3315:Src/main.c    **** 		LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
+ 3904              		.loc 1 3315 67 discriminator 3 view .LVU1181
+ 3905 01e4 F5E7     		b	.L268
+ 3906              	.L269:
+3316:Src/main.c    **** 		while(tmp32<500){tmp32++;}
+ 3907              		.loc 1 3316 3 is_stmt 1 view .LVU1182
+ 3908              	.LVL469:
+ 3909              	.LBB461:
+ 3910              	.LBI461:
+ 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 3911              		.loc 4 370 22 view .LVU1183
+ 3912              	.LBB462:
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3913              		.loc 4 372 3 view .LVU1184
+ 3914 01e6 0D49     		ldr	r1, .L275+12
+ 3915 01e8 0A68     		ldr	r2, [r1]
+ 3916 01ea 22F04002 		bic	r2, r2, #64
+ 3917 01ee 0A60     		str	r2, [r1]
+ 3918              	.LVL470:
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3919              		.loc 4 372 3 is_stmt 0 view .LVU1185
+ 3920              	.LBE462:
+ 3921              	.LBE461:
+3317:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3922              		.loc 1 3317 3 is_stmt 1 view .LVU1186
+ 3923              	.LBB464:
+ 3924              	.LBB463:
+ 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
+ 3925              		.loc 4 373 1 is_stmt 0 view .LVU1187
+ 3926 01f0 00E0     		b	.L271
+ 3927              	.L272:
+ 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 
+ 3928              		.loc 4 373 1 view .LVU1188
+ 3929              	.LBE463:
+ 3930              	.LBE464:
+3317:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3931              		.loc 1 3317 20 is_stmt 1 discriminator 2 view .LVU1189
+3317:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3932              		.loc 1 3317 25 is_stmt 0 discriminator 2 view .LVU1190
+ 3933 01f2 0133     		adds	r3, r3, #1
+ 3934              	.LVL471:
+ 3935              	.L271:
+3317:Src/main.c    **** 		//HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
+ 3936              		.loc 1 3317 14 is_stmt 1 discriminator 1 view .LVU1191
+ 3937 01f4 B3F5FA7F 		cmp	r3, #500
+ 3938 01f8 FBD3     		bcc	.L272
+3319:Src/main.c    **** 		P = LL_SPI_ReceiveData16(SPI5);
+ 3939              		.loc 1 3319 3 view .LVU1192
+ 3940 01fa 0122     		movs	r2, #1
+ 3941 01fc 4FF48061 		mov	r1, #1024
+ 3942 0200 0448     		ldr	r0, .L275+4
+ 3943 0202 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 3944              	.LVL472:
+ARM GAS  /tmp/ccEQxcUB.s 			page 213
 
 
-1907:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
- 3634              		.loc 1 1907 3 view .LVU1098
- 3635 0038 1A6B     		ldr	r2, [r3, #48]
- 3636 003a 42F00402 		orr	r2, r2, #4
- 3637 003e 1A63     		str	r2, [r3, #48]
-1907:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
- 3638              		.loc 1 1907 3 view .LVU1099
- 3639 0040 1A6B     		ldr	r2, [r3, #48]
- 3640 0042 02F00402 		and	r2, r2, #4
- 3641 0046 0392     		str	r2, [sp, #12]
-1907:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
- 3642              		.loc 1 1907 3 view .LVU1100
- 3643 0048 039A     		ldr	r2, [sp, #12]
- 3644              	.LBE433:
-1907:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
- 3645              		.loc 1 1907 3 view .LVU1101
-1908:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
- 3646              		.loc 1 1908 3 view .LVU1102
- 3647              	.LBB434:
-1908:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
- 3648              		.loc 1 1908 3 view .LVU1103
-1908:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
- 3649              		.loc 1 1908 3 view .LVU1104
- 3650 004a 1A6B     		ldr	r2, [r3, #48]
- 3651 004c 42F00102 		orr	r2, r2, #1
- 3652 0050 1A63     		str	r2, [r3, #48]
-1908:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
- 3653              		.loc 1 1908 3 view .LVU1105
- 3654 0052 1A6B     		ldr	r2, [r3, #48]
- 3655 0054 02F00102 		and	r2, r2, #1
- 3656 0058 0492     		str	r2, [sp, #16]
-1908:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
- 3657              		.loc 1 1908 3 view .LVU1106
- 3658 005a 049A     		ldr	r2, [sp, #16]
- 3659              	.LBE434:
-1908:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
- 3660              		.loc 1 1908 3 view .LVU1107
-1909:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
- 3661              		.loc 1 1909 3 view .LVU1108
- 3662              	.LBB435:
-1909:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
- 3663              		.loc 1 1909 3 view .LVU1109
-1909:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
- 3664              		.loc 1 1909 3 view .LVU1110
- 3665 005c 1A6B     		ldr	r2, [r3, #48]
- 3666 005e 42F00202 		orr	r2, r2, #2
- 3667 0062 1A63     		str	r2, [r3, #48]
-1909:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
- 3668              		.loc 1 1909 3 view .LVU1111
- 3669 0064 1A6B     		ldr	r2, [r3, #48]
- 3670 0066 02F00202 		and	r2, r2, #2
- 3671 006a 0592     		str	r2, [sp, #20]
-1909:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
- 3672              		.loc 1 1909 3 view .LVU1112
- 3673 006c 059A     		ldr	r2, [sp, #20]
- 3674              	.LBE435:
-1909:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
-ARM GAS  /tmp/ccwR4KB7.s 			page 205
+3320:Src/main.c    **** 	}
+ 3945              		.loc 1 3320 3 view .LVU1193
+ 3946              	.LBB465:
+ 3947              	.LBI465:
+1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 3948              		.loc 4 1344 26 view .LVU1194
+ 3949              	.LBB466:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3950              		.loc 4 1346 3 view .LVU1195
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3951              		.loc 4 1346 21 is_stmt 0 view .LVU1196
+ 3952 0206 054B     		ldr	r3, .L275+12
+ 3953 0208 DD68     		ldr	r5, [r3, #12]
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3954              		.loc 4 1346 10 view .LVU1197
+ 3955 020a ADB2     		uxth	r5, r5
+ 3956              	.LVL473:
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 3957              		.loc 4 1346 10 view .LVU1198
+ 3958 020c 5BE7     		b	.L239
+ 3959              	.L276:
+ 3960 020e 00BF     		.align	2
+ 3961              	.L275:
+ 3962 0210 00100240 		.word	1073876992
+ 3963 0214 00140240 		.word	1073878016
+ 3964 0218 00340140 		.word	1073820672
+ 3965 021c 00500140 		.word	1073827840
+ 3966              	.LBE466:
+ 3967              	.LBE465:
+ 3968              		.cfi_endproc
+ 3969              	.LFE1226:
+ 3971              		.section	.text.Stop_TIM10,"ax",%progbits
+ 3972              		.align	1
+ 3973              		.syntax unified
+ 3974              		.thumb
+ 3975              		.thumb_func
+ 3977              	Stop_TIM10:
+ 3978              	.LFB1237:
+3485:Src/main.c    **** uint8_t CheckChecksum(uint16_t *pbuff)
+3486:Src/main.c    **** {
+3487:Src/main.c    ****   uint16_t cl_ind;
+3488:Src/main.c    **** 
+3489:Src/main.c    ****   switch (UART_header)
+3490:Src/main.c    ****   {
+3491:Src/main.c    ****     case 0x7777:
+3492:Src/main.c    ****       cl_ind = TSK_16 - 2;
+3493:Src/main.c    ****     break;
+3494:Src/main.c    ****     case 0x1111:
+3495:Src/main.c    ****       cl_ind = CL_16 - 2;
+3496:Src/main.c    ****     break;
+3497:Src/main.c    ****     default:
+3498:Src/main.c    ****       return 0;
+3499:Src/main.c    ****     break;
+3500:Src/main.c    ****   }
+3501:Src/main.c    **** 
+3502:Src/main.c    ****   CS_result = CalculateChecksum(pbuff, cl_ind);
+3503:Src/main.c    **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 214
 
 
- 3675              		.loc 1 1909 3 view .LVU1113
-1910:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
- 3676              		.loc 1 1910 3 view .LVU1114
- 3677              	.LBB436:
-1910:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
- 3678              		.loc 1 1910 3 view .LVU1115
-1910:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
- 3679              		.loc 1 1910 3 view .LVU1116
- 3680 006e 1A6B     		ldr	r2, [r3, #48]
- 3681 0070 42F01002 		orr	r2, r2, #16
- 3682 0074 1A63     		str	r2, [r3, #48]
-1910:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
- 3683              		.loc 1 1910 3 view .LVU1117
- 3684 0076 1A6B     		ldr	r2, [r3, #48]
- 3685 0078 02F01002 		and	r2, r2, #16
- 3686 007c 0692     		str	r2, [sp, #24]
-1910:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
- 3687              		.loc 1 1910 3 view .LVU1118
- 3688 007e 069A     		ldr	r2, [sp, #24]
- 3689              	.LBE436:
-1910:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
- 3690              		.loc 1 1910 3 view .LVU1119
-1911:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
- 3691              		.loc 1 1911 3 view .LVU1120
- 3692              	.LBB437:
-1911:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
- 3693              		.loc 1 1911 3 view .LVU1121
-1911:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
- 3694              		.loc 1 1911 3 view .LVU1122
- 3695 0080 1A6B     		ldr	r2, [r3, #48]
- 3696 0082 42F00802 		orr	r2, r2, #8
- 3697 0086 1A63     		str	r2, [r3, #48]
-1911:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
- 3698              		.loc 1 1911 3 view .LVU1123
- 3699 0088 1A6B     		ldr	r2, [r3, #48]
- 3700 008a 02F00802 		and	r2, r2, #8
- 3701 008e 0792     		str	r2, [sp, #28]
-1911:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
- 3702              		.loc 1 1911 3 view .LVU1124
- 3703 0090 079A     		ldr	r2, [sp, #28]
- 3704              	.LBE437:
-1911:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
- 3705              		.loc 1 1911 3 view .LVU1125
-1912:Src/main.c    **** 
- 3706              		.loc 1 1912 3 view .LVU1126
- 3707              	.LBB438:
-1912:Src/main.c    **** 
- 3708              		.loc 1 1912 3 view .LVU1127
-1912:Src/main.c    **** 
- 3709              		.loc 1 1912 3 view .LVU1128
- 3710 0092 1A6B     		ldr	r2, [r3, #48]
- 3711 0094 42F04002 		orr	r2, r2, #64
- 3712 0098 1A63     		str	r2, [r3, #48]
-1912:Src/main.c    **** 
- 3713              		.loc 1 1912 3 view .LVU1129
- 3714 009a 1B6B     		ldr	r3, [r3, #48]
- 3715 009c 03F04003 		and	r3, r3, #64
-ARM GAS  /tmp/ccwR4KB7.s 			page 206
+3504:Src/main.c    ****   return ((CS_result == COMMAND[cl_ind]) ? 1 : 0);
+3505:Src/main.c    **** }
+3506:Src/main.c    **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
+3507:Src/main.c    **** {
+3508:Src/main.c    **** 	short  i;
+3509:Src/main.c    **** 	uint16_t cs = *pbuff;
+3510:Src/main.c    ****   
+3511:Src/main.c    ****  	for(i = 1; i < len; i++)
+3512:Src/main.c    **** 	{
+3513:Src/main.c    **** 		cs ^= *(pbuff+i);
+3514:Src/main.c    **** 	}
+3515:Src/main.c    **** 	return cs;
+3516:Src/main.c    **** }
+3517:Src/main.c    **** 
+3518:Src/main.c    **** /*int SD_Init(void)
+3519:Src/main.c    **** {
+3520:Src/main.c    **** 	int test=0;
+3521:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
+3522:Src/main.c    **** 	{
+3523:Src/main.c    **** 		test = Mount_SD("/");
+3524:Src/main.c    **** 		if (test == 0) //0 - suc
+3525:Src/main.c    **** 		{
+3526:Src/main.c    **** 			//Format_SD();
+3527:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
+3528:Src/main.c    **** 			//Create_File("FILE2.TXT");
+3529:Src/main.c    **** 			Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part 
+3530:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+3531:Src/main.c    **** 			return test;
+3532:Src/main.c    **** 		}
+3533:Src/main.c    **** 		else
+3534:Src/main.c    **** 		{
+3535:Src/main.c    **** 			return 1;
+3536:Src/main.c    **** 		}
+3537:Src/main.c    **** 	}
+3538:Src/main.c    **** 	else
+3539:Src/main.c    **** 	{
+3540:Src/main.c    **** 		return 1;
+3541:Src/main.c    **** 	}
+3542:Src/main.c    **** }*/
+3543:Src/main.c    **** 
+3544:Src/main.c    **** int SD_SAVE(uint16_t *pbuff)
+3545:Src/main.c    **** {
+3546:Src/main.c    **** 	int test=0;
+3547:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
+3548:Src/main.c    **** 	{
+3549:Src/main.c    **** 		test = Mount_SD("/");
+3550:Src/main.c    **** 		if (test == 0) //0 - suc
+3551:Src/main.c    **** 		{
+3552:Src/main.c    **** 			//Format_SD();
+3553:Src/main.c    **** 			test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8);
+3554:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+3555:Src/main.c    **** 			return test;
+3556:Src/main.c    **** 		}
+3557:Src/main.c    **** 		else
+3558:Src/main.c    **** 		{
+3559:Src/main.c    **** 			return 1;
+3560:Src/main.c    **** 		}
+ARM GAS  /tmp/ccEQxcUB.s 			page 215
 
 
- 3716 00a0 0893     		str	r3, [sp, #32]
-1912:Src/main.c    **** 
- 3717              		.loc 1 1912 3 view .LVU1130
- 3718 00a2 089B     		ldr	r3, [sp, #32]
- 3719              	.LBE438:
-1912:Src/main.c    **** 
- 3720              		.loc 1 1912 3 view .LVU1131
-1915:Src/main.c    **** 
- 3721              		.loc 1 1915 3 view .LVU1132
- 3722 00a4 DFF8A491 		ldr	r9, .L258+16
- 3723 00a8 2246     		mov	r2, r4
- 3724 00aa 4FF4C861 		mov	r1, #1600
- 3725 00ae 4846     		mov	r0, r9
- 3726 00b0 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3727              	.LVL417:
-1918:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 3728              		.loc 1 1918 3 view .LVU1133
- 3729 00b4 DFF898A1 		ldr	r10, .L258+20
- 3730 00b8 2246     		mov	r2, r4
- 3731 00ba 3C21     		movs	r1, #60
- 3732 00bc 5046     		mov	r0, r10
- 3733 00be FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3734              	.LVL418:
-1919:Src/main.c    **** 
- 3735              		.loc 1 1919 3 view .LVU1134
- 3736 00c2 0122     		movs	r2, #1
- 3737 00c4 4021     		movs	r1, #64
- 3738 00c6 5046     		mov	r0, r10
- 3739 00c8 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3740              	.LVL419:
-1922:Src/main.c    **** 
- 3741              		.loc 1 1922 3 view .LVU1135
- 3742 00cc 5C4F     		ldr	r7, .L258+4
- 3743 00ce 2246     		mov	r2, r4
- 3744 00d0 4B21     		movs	r1, #75
- 3745 00d2 3846     		mov	r0, r7
- 3746 00d4 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3747              	.LVL420:
-1925:Src/main.c    **** 
- 3748              		.loc 1 1925 3 view .LVU1136
- 3749 00d8 0122     		movs	r2, #1
- 3750 00da 1021     		movs	r1, #16
- 3751 00dc 3846     		mov	r0, r7
- 3752 00de FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3753              	.LVL421:
-1928:Src/main.c    **** 
- 3754              		.loc 1 1928 3 view .LVU1137
- 3755 00e2 DFF87081 		ldr	r8, .L258+24
- 3756 00e6 2246     		mov	r2, r4
- 3757 00e8 4FF44061 		mov	r1, #3072
- 3758 00ec 4046     		mov	r0, r8
- 3759 00ee FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3760              	.LVL422:
-1931:Src/main.c    **** 
- 3761              		.loc 1 1931 3 view .LVU1138
- 3762 00f2 0122     		movs	r2, #1
- 3763 00f4 4FF48041 		mov	r1, #16384
-ARM GAS  /tmp/ccwR4KB7.s 			page 207
+3561:Src/main.c    **** 	}
+3562:Src/main.c    **** 	else
+3563:Src/main.c    **** 	{
+3564:Src/main.c    **** 		return 1;
+3565:Src/main.c    **** 	}
+3566:Src/main.c    **** }
+3567:Src/main.c    **** 
+3568:Src/main.c    **** 
+3569:Src/main.c    **** 
+3570:Src/main.c    **** //uint32_t Get_Length(void)
+3571:Src/main.c    **** //{
+3572:Src/main.c    **** //	return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16);
+3573:Src/main.c    **** //}
+3574:Src/main.c    **** 
+3575:Src/main.c    **** int SD_READ(uint16_t *pbuff)
+3576:Src/main.c    **** {
+3577:Src/main.c    **** 	int test=0;
+3578:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
+3579:Src/main.c    **** 	{
+3580:Src/main.c    **** 		test = Mount_SD("/");
+3581:Src/main.c    **** 		if (test == 0) //0 - suc
+3582:Src/main.c    **** 		{
+3583:Src/main.c    **** 			//Format_SD();
+3584:Src/main.c    **** 			test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes
+3585:Src/main.c    **** 			fgoto+=DL_8;
+3586:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+3587:Src/main.c    **** 			return test;
+3588:Src/main.c    **** 		}
+3589:Src/main.c    **** 		else
+3590:Src/main.c    **** 		{
+3591:Src/main.c    **** 			return 1;
+3592:Src/main.c    **** 		}
+3593:Src/main.c    **** 	}
+3594:Src/main.c    **** 	else
+3595:Src/main.c    **** 	{
+3596:Src/main.c    **** 		return 1;
+3597:Src/main.c    **** 	}
+3598:Src/main.c    **** 	
+3599:Src/main.c    **** /*	for (uint16_t j = 0; j < DL_16; j++)
+3600:Src/main.c    **** 	{
+3601:Src/main.c    **** 		*(pbuff+j) = SD_matr[SD_SLIDE][j];
+3602:Src/main.c    **** 	}
+3603:Src/main.c    **** 	if (SD_SLIDE<Get_Length())
+3604:Src/main.c    **** 	{
+3605:Src/main.c    **** 		SD_SLIDE++;
+3606:Src/main.c    **** 		return 0x0000;
+3607:Src/main.c    **** 	}
+3608:Src/main.c    **** 	else
+3609:Src/main.c    **** 	{
+3610:Src/main.c    **** 		return 0x0001;
+3611:Src/main.c    **** 	}*/
+3612:Src/main.c    **** }
+3613:Src/main.c    **** 
+3614:Src/main.c    **** int SD_REMOVE(void)
+3615:Src/main.c    **** {
+3616:Src/main.c    **** 	int test=0;
+3617:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
+ARM GAS  /tmp/ccEQxcUB.s 			page 216
 
 
- 3764 00f8 4046     		mov	r0, r8
- 3765 00fa FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3766              	.LVL423:
-1934:Src/main.c    ****                           |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
- 3767              		.loc 1 1934 3 view .LVU1139
- 3768 00fe DFF858B1 		ldr	fp, .L258+28
- 3769 0102 2246     		mov	r2, r4
- 3770 0104 4FF44F61 		mov	r1, #3312
- 3771 0108 5846     		mov	r0, fp
- 3772 010a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3773              	.LVL424:
-1938:Src/main.c    **** 
- 3774              		.loc 1 1938 3 view .LVU1140
- 3775 010e 0122     		movs	r2, #1
- 3776 0110 4FF48051 		mov	r1, #4096
- 3777 0114 5846     		mov	r0, fp
- 3778 0116 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3779              	.LVL425:
-1941:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 3780              		.loc 1 1941 3 view .LVU1141
- 3781 011a 4A4E     		ldr	r6, .L258+8
- 3782 011c 2246     		mov	r2, r4
- 3783 011e 4FF4C171 		mov	r1, #386
- 3784 0122 3046     		mov	r0, r6
- 3785 0124 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3786              	.LVL426:
-1942:Src/main.c    **** 
- 3787              		.loc 1 1942 3 view .LVU1142
- 3788 0128 0122     		movs	r2, #1
- 3789 012a 4FF40061 		mov	r1, #2048
- 3790 012e 3046     		mov	r0, r6
- 3791 0130 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3792              	.LVL427:
-1945:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET);
- 3793              		.loc 1 1945 3 view .LVU1143
- 3794 0134 2246     		mov	r2, r4
- 3795 0136 4FF47E41 		mov	r1, #65024
- 3796 013a 4348     		ldr	r0, .L258+12
- 3797 013c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 3798              	.LVL428:
-1949:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3799              		.loc 1 1949 3 view .LVU1144
-1949:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3800              		.loc 1 1949 23 is_stmt 0 view .LVU1145
- 3801 0140 1823     		movs	r3, #24
- 3802 0142 0993     		str	r3, [sp, #36]
-1950:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_PULLUP;
- 3803              		.loc 1 1950 3 is_stmt 1 view .LVU1146
-1950:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_PULLUP;
- 3804              		.loc 1 1950 24 is_stmt 0 view .LVU1147
- 3805 0144 0A94     		str	r4, [sp, #40]
-1951:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 3806              		.loc 1 1951 3 is_stmt 1 view .LVU1148
-1951:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 3807              		.loc 1 1951 24 is_stmt 0 view .LVU1149
- 3808 0146 0125     		movs	r5, #1
- 3809 0148 0B95     		str	r5, [sp, #44]
-ARM GAS  /tmp/ccwR4KB7.s 			page 208
+3618:Src/main.c    **** 	{
+3619:Src/main.c    **** 		test = Mount_SD("/");
+3620:Src/main.c    **** 		if (test==FR_OK)
+3621:Src/main.c    **** 		{	
+3622:Src/main.c    **** 			test = Remove_File ("FILE1.TXT");
+3623:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
+3624:Src/main.c    **** 			//test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
+3625:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+3626:Src/main.c    **** 			return test;
+3627:Src/main.c    **** 		}
+3628:Src/main.c    **** 		else
+3629:Src/main.c    **** 		{
+3630:Src/main.c    **** 			return 1;
+3631:Src/main.c    **** 		}
+3632:Src/main.c    **** 	}
+3633:Src/main.c    **** 	else
+3634:Src/main.c    **** 	{
+3635:Src/main.c    **** 		return 1;
+3636:Src/main.c    **** 	}
+3637:Src/main.c    **** }
+3638:Src/main.c    **** 
+3639:Src/main.c    **** //-------------------------------------------------------
+3640:Src/main.c    **** void USART_TX (uint8_t* dt, uint16_t sz)
+3641:Src/main.c    **** {
+3642:Src/main.c    ****   uint16_t ind = 0;
+3643:Src/main.c    ****   while (ind<sz)
+3644:Src/main.c    ****   {
+3645:Src/main.c    ****     while (!LL_USART_IsActiveFlag_TXE(USART1)) {}
+3646:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
+3647:Src/main.c    ****     ind++;
+3648:Src/main.c    ****   }
+3649:Src/main.c    **** }
+3650:Src/main.c    **** 
+3651:Src/main.c    **** void USART_TX_DMA (uint16_t sz)
+3652:Src/main.c    **** {
+3653:Src/main.c    **** 	while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter
+3654:Src/main.c    **** 	LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
+3655:Src/main.c    ****   LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz);
+3656:Src/main.c    ****   LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7);
+3657:Src/main.c    **** 	u_tx_flg = 1;//indicate that transfer begin
+3658:Src/main.c    **** }
+3659:Src/main.c    **** 
+3660:Src/main.c    **** static void Stop_TIM10(void)
+3661:Src/main.c    **** {
+ 3979              		.loc 1 3661 1 is_stmt 1 view -0
+ 3980              		.cfi_startproc
+ 3981              		@ args = 0, pretend = 0, frame = 0
+ 3982              		@ frame_needed = 0, uses_anonymous_args = 0
+ 3983 0000 08B5     		push	{r3, lr}
+ 3984              	.LCFI36:
+ 3985              		.cfi_def_cfa_offset 8
+ 3986              		.cfi_offset 3, -8
+ 3987              		.cfi_offset 14, -4
+3662:Src/main.c    **** 	HAL_TIM_Base_Stop_IT(&htim10);
+ 3988              		.loc 1 3662 2 view .LVU1200
+ 3989 0002 0448     		ldr	r0, .L279
+ 3990 0004 FFF7FEFF 		bl	HAL_TIM_Base_Stop_IT
+ARM GAS  /tmp/ccEQxcUB.s 			page 217
 
 
-1952:Src/main.c    **** 
- 3810              		.loc 1 1952 3 is_stmt 1 view .LVU1150
- 3811 014a 09A9     		add	r1, sp, #36
- 3812 014c 4846     		mov	r0, r9
- 3813 014e FFF7FEFF 		bl	HAL_GPIO_Init
- 3814              	.LVL429:
-1955:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3815              		.loc 1 1955 3 view .LVU1151
-1955:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3816              		.loc 1 1955 23 is_stmt 0 view .LVU1152
- 3817 0152 4FF4C863 		mov	r3, #1600
- 3818 0156 0993     		str	r3, [sp, #36]
-1956:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3819              		.loc 1 1956 3 is_stmt 1 view .LVU1153
-1956:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3820              		.loc 1 1956 24 is_stmt 0 view .LVU1154
- 3821 0158 0A95     		str	r5, [sp, #40]
-1957:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3822              		.loc 1 1957 3 is_stmt 1 view .LVU1155
-1957:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3823              		.loc 1 1957 24 is_stmt 0 view .LVU1156
- 3824 015a 0B94     		str	r4, [sp, #44]
-1958:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 3825              		.loc 1 1958 3 is_stmt 1 view .LVU1157
-1958:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 3826              		.loc 1 1958 25 is_stmt 0 view .LVU1158
- 3827 015c 0C94     		str	r4, [sp, #48]
-1959:Src/main.c    **** 
- 3828              		.loc 1 1959 3 is_stmt 1 view .LVU1159
- 3829 015e 09A9     		add	r1, sp, #36
- 3830 0160 4846     		mov	r0, r9
- 3831 0162 FFF7FEFF 		bl	HAL_GPIO_Init
- 3832              	.LVL430:
-1962:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3833              		.loc 1 1962 3 view .LVU1160
-1962:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3834              		.loc 1 1962 23 is_stmt 0 view .LVU1161
- 3835 0166 7423     		movs	r3, #116
- 3836 0168 0993     		str	r3, [sp, #36]
-1963:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3837              		.loc 1 1963 3 is_stmt 1 view .LVU1162
-1963:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3838              		.loc 1 1963 24 is_stmt 0 view .LVU1163
- 3839 016a 0A95     		str	r5, [sp, #40]
-1964:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3840              		.loc 1 1964 3 is_stmt 1 view .LVU1164
-1964:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3841              		.loc 1 1964 24 is_stmt 0 view .LVU1165
- 3842 016c 0B94     		str	r4, [sp, #44]
-1965:Src/main.c    ****   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 3843              		.loc 1 1965 3 is_stmt 1 view .LVU1166
-1965:Src/main.c    ****   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 3844              		.loc 1 1965 25 is_stmt 0 view .LVU1167
- 3845 016e 0C94     		str	r4, [sp, #48]
-1966:Src/main.c    **** 
- 3846              		.loc 1 1966 3 is_stmt 1 view .LVU1168
- 3847 0170 09A9     		add	r1, sp, #36
-ARM GAS  /tmp/ccwR4KB7.s 			page 209
-
-
- 3848 0172 5046     		mov	r0, r10
- 3849 0174 FFF7FEFF 		bl	HAL_GPIO_Init
- 3850              	.LVL431:
-1969:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3851              		.loc 1 1969 3 view .LVU1169
-1969:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3852              		.loc 1 1969 23 is_stmt 0 view .LVU1170
- 3853 0178 0823     		movs	r3, #8
- 3854 017a 0993     		str	r3, [sp, #36]
-1970:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3855              		.loc 1 1970 3 is_stmt 1 view .LVU1171
-1970:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3856              		.loc 1 1970 24 is_stmt 0 view .LVU1172
- 3857 017c 0A95     		str	r5, [sp, #40]
-1971:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 3858              		.loc 1 1971 3 is_stmt 1 view .LVU1173
-1971:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 3859              		.loc 1 1971 24 is_stmt 0 view .LVU1174
- 3860 017e 0B94     		str	r4, [sp, #44]
-1972:Src/main.c    ****   HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
- 3861              		.loc 1 1972 3 is_stmt 1 view .LVU1175
-1972:Src/main.c    ****   HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
- 3862              		.loc 1 1972 25 is_stmt 0 view .LVU1176
- 3863 0180 0323     		movs	r3, #3
- 3864 0182 0C93     		str	r3, [sp, #48]
-1973:Src/main.c    **** 
- 3865              		.loc 1 1973 3 is_stmt 1 view .LVU1177
- 3866 0184 09A9     		add	r1, sp, #36
- 3867 0186 5046     		mov	r0, r10
- 3868 0188 FFF7FEFF 		bl	HAL_GPIO_Init
- 3869              	.LVL432:
-1977:Src/main.c    ****                           |DAC_LD2_CS_Pin;
- 3870              		.loc 1 1977 3 view .LVU1178
-1977:Src/main.c    ****                           |DAC_LD2_CS_Pin;
- 3871              		.loc 1 1977 23 is_stmt 0 view .LVU1179
- 3872 018c 5B23     		movs	r3, #91
- 3873 018e 0993     		str	r3, [sp, #36]
-1979:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3874              		.loc 1 1979 3 is_stmt 1 view .LVU1180
-1979:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3875              		.loc 1 1979 24 is_stmt 0 view .LVU1181
- 3876 0190 0A95     		str	r5, [sp, #40]
-1980:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3877              		.loc 1 1980 3 is_stmt 1 view .LVU1182
-1980:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3878              		.loc 1 1980 24 is_stmt 0 view .LVU1183
- 3879 0192 0B94     		str	r4, [sp, #44]
-1981:Src/main.c    ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 3880              		.loc 1 1981 3 is_stmt 1 view .LVU1184
-1981:Src/main.c    ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 3881              		.loc 1 1981 25 is_stmt 0 view .LVU1185
- 3882 0194 0C94     		str	r4, [sp, #48]
-1982:Src/main.c    **** 
- 3883              		.loc 1 1982 3 is_stmt 1 view .LVU1186
- 3884 0196 09A9     		add	r1, sp, #36
- 3885 0198 3846     		mov	r0, r7
- 3886 019a FFF7FEFF 		bl	HAL_GPIO_Init
-ARM GAS  /tmp/ccwR4KB7.s 			page 210
-
-
- 3887              	.LVL433:
-1985:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3888              		.loc 1 1985 3 view .LVU1187
-1985:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3889              		.loc 1 1985 23 is_stmt 0 view .LVU1188
- 3890 019e 4FF4F043 		mov	r3, #30720
- 3891 01a2 0993     		str	r3, [sp, #36]
-1986:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3892              		.loc 1 1986 3 is_stmt 1 view .LVU1189
-1986:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3893              		.loc 1 1986 24 is_stmt 0 view .LVU1190
- 3894 01a4 0A94     		str	r4, [sp, #40]
-1987:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 3895              		.loc 1 1987 3 is_stmt 1 view .LVU1191
-1987:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 3896              		.loc 1 1987 24 is_stmt 0 view .LVU1192
- 3897 01a6 0B94     		str	r4, [sp, #44]
-1988:Src/main.c    **** 
- 3898              		.loc 1 1988 3 is_stmt 1 view .LVU1193
- 3899 01a8 09A9     		add	r1, sp, #36
- 3900 01aa 4846     		mov	r0, r9
- 3901 01ac FFF7FEFF 		bl	HAL_GPIO_Init
- 3902              	.LVL434:
-1991:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3903              		.loc 1 1991 3 view .LVU1194
-1991:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3904              		.loc 1 1991 23 is_stmt 0 view .LVU1195
- 3905 01b0 4FF44063 		mov	r3, #3072
- 3906 01b4 0993     		str	r3, [sp, #36]
-1992:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3907              		.loc 1 1992 3 is_stmt 1 view .LVU1196
-1992:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3908              		.loc 1 1992 24 is_stmt 0 view .LVU1197
- 3909 01b6 0A95     		str	r5, [sp, #40]
-1993:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3910              		.loc 1 1993 3 is_stmt 1 view .LVU1198
-1993:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3911              		.loc 1 1993 24 is_stmt 0 view .LVU1199
- 3912 01b8 0B94     		str	r4, [sp, #44]
-1994:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 3913              		.loc 1 1994 3 is_stmt 1 view .LVU1200
-1994:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 3914              		.loc 1 1994 25 is_stmt 0 view .LVU1201
- 3915 01ba 0C94     		str	r4, [sp, #48]
-1995:Src/main.c    **** 
- 3916              		.loc 1 1995 3 is_stmt 1 view .LVU1202
- 3917 01bc 09A9     		add	r1, sp, #36
- 3918 01be 4046     		mov	r0, r8
- 3919 01c0 FFF7FEFF 		bl	HAL_GPIO_Init
- 3920              	.LVL435:
-1998:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3921              		.loc 1 1998 3 view .LVU1203
-1998:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3922              		.loc 1 1998 23 is_stmt 0 view .LVU1204
- 3923 01c4 4FF48043 		mov	r3, #16384
- 3924 01c8 0993     		str	r3, [sp, #36]
-1999:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-ARM GAS  /tmp/ccwR4KB7.s 			page 211
-
-
- 3925              		.loc 1 1999 3 is_stmt 1 view .LVU1205
-1999:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3926              		.loc 1 1999 24 is_stmt 0 view .LVU1206
- 3927 01ca 0A95     		str	r5, [sp, #40]
-2000:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 3928              		.loc 1 2000 3 is_stmt 1 view .LVU1207
-2000:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 3929              		.loc 1 2000 24 is_stmt 0 view .LVU1208
- 3930 01cc 0B94     		str	r4, [sp, #44]
-2001:Src/main.c    ****   HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
- 3931              		.loc 1 2001 3 is_stmt 1 view .LVU1209
-2001:Src/main.c    ****   HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
- 3932              		.loc 1 2001 25 is_stmt 0 view .LVU1210
- 3933 01ce 0323     		movs	r3, #3
- 3934 01d0 0C93     		str	r3, [sp, #48]
-2002:Src/main.c    **** 
- 3935              		.loc 1 2002 3 is_stmt 1 view .LVU1211
- 3936 01d2 09A9     		add	r1, sp, #36
- 3937 01d4 4046     		mov	r0, r8
- 3938 01d6 FFF7FEFF 		bl	HAL_GPIO_Init
- 3939              	.LVL436:
-2006:Src/main.c    ****                           |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
- 3940              		.loc 1 2006 3 view .LVU1212
-2006:Src/main.c    ****                           |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
- 3941              		.loc 1 2006 23 is_stmt 0 view .LVU1213
- 3942 01da 41F6F043 		movw	r3, #7408
- 3943 01de 0993     		str	r3, [sp, #36]
-2008:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3944              		.loc 1 2008 3 is_stmt 1 view .LVU1214
-2008:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3945              		.loc 1 2008 24 is_stmt 0 view .LVU1215
- 3946 01e0 0A95     		str	r5, [sp, #40]
-2009:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3947              		.loc 1 2009 3 is_stmt 1 view .LVU1216
-2009:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3948              		.loc 1 2009 24 is_stmt 0 view .LVU1217
- 3949 01e2 0B94     		str	r4, [sp, #44]
-2010:Src/main.c    ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 3950              		.loc 1 2010 3 is_stmt 1 view .LVU1218
-2010:Src/main.c    ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 3951              		.loc 1 2010 25 is_stmt 0 view .LVU1219
- 3952 01e4 0C94     		str	r4, [sp, #48]
-2011:Src/main.c    **** 
- 3953              		.loc 1 2011 3 is_stmt 1 view .LVU1220
- 3954 01e6 09A9     		add	r1, sp, #36
- 3955 01e8 5846     		mov	r0, fp
- 3956 01ea FFF7FEFF 		bl	HAL_GPIO_Init
- 3957              	.LVL437:
-2014:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3958              		.loc 1 2014 3 view .LVU1221
-2014:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 3959              		.loc 1 2014 23 is_stmt 0 view .LVU1222
- 3960 01ee 40F68213 		movw	r3, #2434
- 3961 01f2 0993     		str	r3, [sp, #36]
-2015:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3962              		.loc 1 2015 3 is_stmt 1 view .LVU1223
-2015:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
-ARM GAS  /tmp/ccwR4KB7.s 			page 212
-
-
- 3963              		.loc 1 2015 24 is_stmt 0 view .LVU1224
- 3964 01f4 0A95     		str	r5, [sp, #40]
-2016:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3965              		.loc 1 2016 3 is_stmt 1 view .LVU1225
-2016:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 3966              		.loc 1 2016 24 is_stmt 0 view .LVU1226
- 3967 01f6 0B94     		str	r4, [sp, #44]
-2017:Src/main.c    ****   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 3968              		.loc 1 2017 3 is_stmt 1 view .LVU1227
-2017:Src/main.c    ****   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 3969              		.loc 1 2017 25 is_stmt 0 view .LVU1228
- 3970 01f8 0C94     		str	r4, [sp, #48]
-2018:Src/main.c    **** 
- 3971              		.loc 1 2018 3 is_stmt 1 view .LVU1229
- 3972 01fa 09A9     		add	r1, sp, #36
- 3973 01fc 3046     		mov	r0, r6
- 3974 01fe FFF7FEFF 		bl	HAL_GPIO_Init
- 3975              	.LVL438:
-2021:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3976              		.loc 1 2021 3 view .LVU1230
-2021:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3977              		.loc 1 2021 23 is_stmt 0 view .LVU1231
- 3978 0202 4FF48073 		mov	r3, #256
- 3979 0206 0993     		str	r3, [sp, #36]
-2022:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3980              		.loc 1 2022 3 is_stmt 1 view .LVU1232
-2022:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3981              		.loc 1 2022 24 is_stmt 0 view .LVU1233
- 3982 0208 0A94     		str	r4, [sp, #40]
-2023:Src/main.c    ****   HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
- 3983              		.loc 1 2023 3 is_stmt 1 view .LVU1234
-2023:Src/main.c    ****   HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
- 3984              		.loc 1 2023 24 is_stmt 0 view .LVU1235
- 3985 020a 0B94     		str	r4, [sp, #44]
-2024:Src/main.c    **** 
- 3986              		.loc 1 2024 3 is_stmt 1 view .LVU1236
- 3987 020c 09A9     		add	r1, sp, #36
- 3988 020e 3846     		mov	r0, r7
- 3989 0210 FFF7FEFF 		bl	HAL_GPIO_Init
- 3990              	.LVL439:
-2027:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3991              		.loc 1 2027 3 view .LVU1237
-2027:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 3992              		.loc 1 2027 23 is_stmt 0 view .LVU1238
- 3993 0214 0995     		str	r5, [sp, #36]
-2028:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3994              		.loc 1 2028 3 is_stmt 1 view .LVU1239
-2028:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 3995              		.loc 1 2028 24 is_stmt 0 view .LVU1240
- 3996 0216 0A94     		str	r4, [sp, #40]
-2029:Src/main.c    ****   HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
- 3997              		.loc 1 2029 3 is_stmt 1 view .LVU1241
-2029:Src/main.c    ****   HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
- 3998              		.loc 1 2029 24 is_stmt 0 view .LVU1242
- 3999 0218 0B94     		str	r4, [sp, #44]
-2030:Src/main.c    **** 
- 4000              		.loc 1 2030 3 is_stmt 1 view .LVU1243
-ARM GAS  /tmp/ccwR4KB7.s 			page 213
-
-
- 4001 021a 09A9     		add	r1, sp, #36
- 4002 021c 3046     		mov	r0, r6
- 4003 021e FFF7FEFF 		bl	HAL_GPIO_Init
- 4004              	.LVL440:
-2034:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
- 4005              		.loc 1 2034 3 view .LVU1244
-2034:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
- 4006              		.loc 1 2034 23 is_stmt 0 view .LVU1245
- 4007 0222 4FF47E43 		mov	r3, #65024
- 4008 0226 0993     		str	r3, [sp, #36]
-2036:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 4009              		.loc 1 2036 3 is_stmt 1 view .LVU1246
-2036:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 4010              		.loc 1 2036 24 is_stmt 0 view .LVU1247
- 4011 0228 0A95     		str	r5, [sp, #40]
-2037:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 4012              		.loc 1 2037 3 is_stmt 1 view .LVU1248
-2037:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 4013              		.loc 1 2037 24 is_stmt 0 view .LVU1249
- 4014 022a 0B94     		str	r4, [sp, #44]
-2038:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
- 4015              		.loc 1 2038 3 is_stmt 1 view .LVU1250
-2038:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
- 4016              		.loc 1 2038 25 is_stmt 0 view .LVU1251
- 4017 022c 0C94     		str	r4, [sp, #48]
-2039:Src/main.c    **** 
- 4018              		.loc 1 2039 3 is_stmt 1 view .LVU1252
- 4019 022e 09A9     		add	r1, sp, #36
- 4020 0230 0548     		ldr	r0, .L258+12
- 4021 0232 FFF7FEFF 		bl	HAL_GPIO_Init
- 4022              	.LVL441:
-2043:Src/main.c    **** 
- 4023              		.loc 1 2043 1 is_stmt 0 view .LVU1253
- 4024 0236 0FB0     		add	sp, sp, #60
+ 3991              	.LVL474:
+3663:Src/main.c    **** 	TIM10_coflag = 0;
+ 3992              		.loc 1 3663 2 view .LVU1201
+ 3993              		.loc 1 3663 15 is_stmt 0 view .LVU1202
+ 3994 0008 0023     		movs	r3, #0
+ 3995 000a 034A     		ldr	r2, .L279+4
+ 3996 000c 1370     		strb	r3, [r2]
+3664:Src/main.c    **** 	TO10 = 0;
+ 3997              		.loc 1 3664 2 is_stmt 1 view .LVU1203
+ 3998              		.loc 1 3664 7 is_stmt 0 view .LVU1204
+ 3999 000e 034A     		ldr	r2, .L279+8
+ 4000 0010 1360     		str	r3, [r2]
+3665:Src/main.c    **** }
+ 4001              		.loc 1 3665 1 view .LVU1205
+ 4002 0012 08BD     		pop	{r3, pc}
+ 4003              	.L280:
+ 4004              		.align	2
+ 4005              	.L279:
+ 4006 0014 00000000 		.word	htim10
+ 4007 0018 00000000 		.word	TIM10_coflag
+ 4008 001c 00000000 		.word	TO10
+ 4009              		.cfi_endproc
+ 4010              	.LFE1237:
+ 4012              		.section	.text.MX_GPIO_Init,"ax",%progbits
+ 4013              		.align	1
+ 4014              		.syntax unified
+ 4015              		.thumb
+ 4016              		.thumb_func
+ 4018              	MX_GPIO_Init:
+ 4019              	.LFB1207:
+2064:Src/main.c    ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 4020              		.loc 1 2064 1 is_stmt 1 view -0
+ 4021              		.cfi_startproc
+ 4022              		@ args = 0, pretend = 0, frame = 56
+ 4023              		@ frame_needed = 0, uses_anonymous_args = 0
+ 4024 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
  4025              	.LCFI37:
  4026              		.cfi_def_cfa_offset 36
- 4027              		@ sp needed
- 4028 0238 BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
- 4029              	.L259:
- 4030              		.align	2
- 4031              	.L258:
- 4032 023c 00380240 		.word	1073887232
- 4033 0240 00000240 		.word	1073872896
- 4034 0244 000C0240 		.word	1073875968
- 4035 0248 00180240 		.word	1073879040
- 4036 024c 00140240 		.word	1073878016
- 4037 0250 00080240 		.word	1073874944
- 4038 0254 00100240 		.word	1073876992
- 4039 0258 00040240 		.word	1073873920
- 4040              		.cfi_endproc
- 4041              	.LFE1206:
- 4043              		.section	.text.MX_SPI4_Init,"ax",%progbits
- 4044              		.align	1
- 4045              		.syntax unified
- 4046              		.thumb
- 4047              		.thumb_func
- 4049              	MX_SPI4_Init:
-ARM GAS  /tmp/ccwR4KB7.s 			page 214
+ 4027              		.cfi_offset 4, -36
+ 4028              		.cfi_offset 5, -32
+ 4029              		.cfi_offset 6, -28
+ 4030              		.cfi_offset 7, -24
+ 4031              		.cfi_offset 8, -20
+ 4032              		.cfi_offset 9, -16
+ 4033              		.cfi_offset 10, -12
+ 4034              		.cfi_offset 11, -8
+ 4035              		.cfi_offset 14, -4
+ 4036 0004 8FB0     		sub	sp, sp, #60
+ 4037              	.LCFI38:
+ 4038              		.cfi_def_cfa_offset 96
+2065:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_1 */
+ 4039              		.loc 1 2065 3 view .LVU1207
+2065:Src/main.c    ****   /* USER CODE BEGIN MX_GPIO_Init_1 */
+ 4040              		.loc 1 2065 20 is_stmt 0 view .LVU1208
+ 4041 0006 0024     		movs	r4, #0
+ 4042 0008 0994     		str	r4, [sp, #36]
+ 4043 000a 0A94     		str	r4, [sp, #40]
+ARM GAS  /tmp/ccEQxcUB.s 			page 218
 
 
- 4050              	.LFB1192:
-1229:Src/main.c    **** 
- 4051              		.loc 1 1229 1 is_stmt 1 view -0
- 4052              		.cfi_startproc
- 4053              		@ args = 0, pretend = 0, frame = 72
- 4054              		@ frame_needed = 0, uses_anonymous_args = 0
- 4055 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
- 4056              	.LCFI38:
- 4057              		.cfi_def_cfa_offset 24
- 4058              		.cfi_offset 4, -24
- 4059              		.cfi_offset 5, -20
- 4060              		.cfi_offset 6, -16
- 4061              		.cfi_offset 7, -12
- 4062              		.cfi_offset 8, -8
- 4063              		.cfi_offset 14, -4
- 4064 0004 92B0     		sub	sp, sp, #72
- 4065              	.LCFI39:
- 4066              		.cfi_def_cfa_offset 96
-1235:Src/main.c    **** 
- 4067              		.loc 1 1235 3 view .LVU1255
-1235:Src/main.c    **** 
- 4068              		.loc 1 1235 22 is_stmt 0 view .LVU1256
- 4069 0006 2822     		movs	r2, #40
- 4070 0008 0021     		movs	r1, #0
- 4071 000a 08A8     		add	r0, sp, #32
- 4072 000c FFF7FEFF 		bl	memset
- 4073              	.LVL442:
-1237:Src/main.c    **** 
- 4074              		.loc 1 1237 3 is_stmt 1 view .LVU1257
-1237:Src/main.c    **** 
- 4075              		.loc 1 1237 23 is_stmt 0 view .LVU1258
- 4076 0010 0024     		movs	r4, #0
- 4077 0012 0294     		str	r4, [sp, #8]
- 4078 0014 0394     		str	r4, [sp, #12]
- 4079 0016 0494     		str	r4, [sp, #16]
- 4080 0018 0594     		str	r4, [sp, #20]
- 4081 001a 0694     		str	r4, [sp, #24]
- 4082 001c 0794     		str	r4, [sp, #28]
-1240:Src/main.c    **** 
- 4083              		.loc 1 1240 3 is_stmt 1 view .LVU1259
- 4084              	.LVL443:
- 4085              	.LBB439:
- 4086              	.LBI439:
+ 4044 000c 0B94     		str	r4, [sp, #44]
+ 4045 000e 0C94     		str	r4, [sp, #48]
+ 4046 0010 0D94     		str	r4, [sp, #52]
+2070:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
+ 4047              		.loc 1 2070 3 is_stmt 1 view .LVU1209
+ 4048              	.LBB467:
+2070:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
+ 4049              		.loc 1 2070 3 view .LVU1210
+2070:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
+ 4050              		.loc 1 2070 3 view .LVU1211
+ 4051 0012 984B     		ldr	r3, .L283
+ 4052 0014 1A6B     		ldr	r2, [r3, #48]
+ 4053 0016 42F02002 		orr	r2, r2, #32
+ 4054 001a 1A63     		str	r2, [r3, #48]
+2070:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
+ 4055              		.loc 1 2070 3 view .LVU1212
+ 4056 001c 1A6B     		ldr	r2, [r3, #48]
+ 4057 001e 02F02002 		and	r2, r2, #32
+ 4058 0022 0192     		str	r2, [sp, #4]
+2070:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
+ 4059              		.loc 1 2070 3 view .LVU1213
+ 4060 0024 019A     		ldr	r2, [sp, #4]
+ 4061              	.LBE467:
+2070:Src/main.c    ****   __HAL_RCC_GPIOH_CLK_ENABLE();
+ 4062              		.loc 1 2070 3 view .LVU1214
+2071:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+ 4063              		.loc 1 2071 3 view .LVU1215
+ 4064              	.LBB468:
+2071:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+ 4065              		.loc 1 2071 3 view .LVU1216
+2071:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+ 4066              		.loc 1 2071 3 view .LVU1217
+ 4067 0026 1A6B     		ldr	r2, [r3, #48]
+ 4068 0028 42F08002 		orr	r2, r2, #128
+ 4069 002c 1A63     		str	r2, [r3, #48]
+2071:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+ 4070              		.loc 1 2071 3 view .LVU1218
+ 4071 002e 1A6B     		ldr	r2, [r3, #48]
+ 4072 0030 02F08002 		and	r2, r2, #128
+ 4073 0034 0292     		str	r2, [sp, #8]
+2071:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+ 4074              		.loc 1 2071 3 view .LVU1219
+ 4075 0036 029A     		ldr	r2, [sp, #8]
+ 4076              	.LBE468:
+2071:Src/main.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+ 4077              		.loc 1 2071 3 view .LVU1220
+2072:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+ 4078              		.loc 1 2072 3 view .LVU1221
+ 4079              	.LBB469:
+2072:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+ 4080              		.loc 1 2072 3 view .LVU1222
+2072:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+ 4081              		.loc 1 2072 3 view .LVU1223
+ 4082 0038 1A6B     		ldr	r2, [r3, #48]
+ 4083 003a 42F00402 		orr	r2, r2, #4
+ 4084 003e 1A63     		str	r2, [r3, #48]
+2072:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+ARM GAS  /tmp/ccEQxcUB.s 			page 219
+
+
+ 4085              		.loc 1 2072 3 view .LVU1224
+ 4086 0040 1A6B     		ldr	r2, [r3, #48]
+ 4087 0042 02F00402 		and	r2, r2, #4
+ 4088 0046 0392     		str	r2, [sp, #12]
+2072:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+ 4089              		.loc 1 2072 3 view .LVU1225
+ 4090 0048 039A     		ldr	r2, [sp, #12]
+ 4091              	.LBE469:
+2072:Src/main.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+ 4092              		.loc 1 2072 3 view .LVU1226
+2073:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+ 4093              		.loc 1 2073 3 view .LVU1227
+ 4094              	.LBB470:
+2073:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+ 4095              		.loc 1 2073 3 view .LVU1228
+2073:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+ 4096              		.loc 1 2073 3 view .LVU1229
+ 4097 004a 1A6B     		ldr	r2, [r3, #48]
+ 4098 004c 42F00102 		orr	r2, r2, #1
+ 4099 0050 1A63     		str	r2, [r3, #48]
+2073:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+ 4100              		.loc 1 2073 3 view .LVU1230
+ 4101 0052 1A6B     		ldr	r2, [r3, #48]
+ 4102 0054 02F00102 		and	r2, r2, #1
+ 4103 0058 0492     		str	r2, [sp, #16]
+2073:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+ 4104              		.loc 1 2073 3 view .LVU1231
+ 4105 005a 049A     		ldr	r2, [sp, #16]
+ 4106              	.LBE470:
+2073:Src/main.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+ 4107              		.loc 1 2073 3 view .LVU1232
+2074:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
+ 4108              		.loc 1 2074 3 view .LVU1233
+ 4109              	.LBB471:
+2074:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
+ 4110              		.loc 1 2074 3 view .LVU1234
+2074:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
+ 4111              		.loc 1 2074 3 view .LVU1235
+ 4112 005c 1A6B     		ldr	r2, [r3, #48]
+ 4113 005e 42F00202 		orr	r2, r2, #2
+ 4114 0062 1A63     		str	r2, [r3, #48]
+2074:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
+ 4115              		.loc 1 2074 3 view .LVU1236
+ 4116 0064 1A6B     		ldr	r2, [r3, #48]
+ 4117 0066 02F00202 		and	r2, r2, #2
+ 4118 006a 0592     		str	r2, [sp, #20]
+2074:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
+ 4119              		.loc 1 2074 3 view .LVU1237
+ 4120 006c 059A     		ldr	r2, [sp, #20]
+ 4121              	.LBE471:
+2074:Src/main.c    ****   __HAL_RCC_GPIOE_CLK_ENABLE();
+ 4122              		.loc 1 2074 3 view .LVU1238
+2075:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+ 4123              		.loc 1 2075 3 view .LVU1239
+ 4124              	.LBB472:
+2075:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+ 4125              		.loc 1 2075 3 view .LVU1240
+ARM GAS  /tmp/ccEQxcUB.s 			page 220
+
+
+2075:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+ 4126              		.loc 1 2075 3 view .LVU1241
+ 4127 006e 1A6B     		ldr	r2, [r3, #48]
+ 4128 0070 42F01002 		orr	r2, r2, #16
+ 4129 0074 1A63     		str	r2, [r3, #48]
+2075:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+ 4130              		.loc 1 2075 3 view .LVU1242
+ 4131 0076 1A6B     		ldr	r2, [r3, #48]
+ 4132 0078 02F01002 		and	r2, r2, #16
+ 4133 007c 0692     		str	r2, [sp, #24]
+2075:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+ 4134              		.loc 1 2075 3 view .LVU1243
+ 4135 007e 069A     		ldr	r2, [sp, #24]
+ 4136              	.LBE472:
+2075:Src/main.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+ 4137              		.loc 1 2075 3 view .LVU1244
+2076:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
+ 4138              		.loc 1 2076 3 view .LVU1245
+ 4139              	.LBB473:
+2076:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
+ 4140              		.loc 1 2076 3 view .LVU1246
+2076:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
+ 4141              		.loc 1 2076 3 view .LVU1247
+ 4142 0080 1A6B     		ldr	r2, [r3, #48]
+ 4143 0082 42F00802 		orr	r2, r2, #8
+ 4144 0086 1A63     		str	r2, [r3, #48]
+2076:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
+ 4145              		.loc 1 2076 3 view .LVU1248
+ 4146 0088 1A6B     		ldr	r2, [r3, #48]
+ 4147 008a 02F00802 		and	r2, r2, #8
+ 4148 008e 0792     		str	r2, [sp, #28]
+2076:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
+ 4149              		.loc 1 2076 3 view .LVU1249
+ 4150 0090 079A     		ldr	r2, [sp, #28]
+ 4151              	.LBE473:
+2076:Src/main.c    ****   __HAL_RCC_GPIOG_CLK_ENABLE();
+ 4152              		.loc 1 2076 3 view .LVU1250
+2077:Src/main.c    **** 
+ 4153              		.loc 1 2077 3 view .LVU1251
+ 4154              	.LBB474:
+2077:Src/main.c    **** 
+ 4155              		.loc 1 2077 3 view .LVU1252
+2077:Src/main.c    **** 
+ 4156              		.loc 1 2077 3 view .LVU1253
+ 4157 0092 1A6B     		ldr	r2, [r3, #48]
+ 4158 0094 42F04002 		orr	r2, r2, #64
+ 4159 0098 1A63     		str	r2, [r3, #48]
+2077:Src/main.c    **** 
+ 4160              		.loc 1 2077 3 view .LVU1254
+ 4161 009a 1B6B     		ldr	r3, [r3, #48]
+ 4162 009c 03F04003 		and	r3, r3, #64
+ 4163 00a0 0893     		str	r3, [sp, #32]
+2077:Src/main.c    **** 
+ 4164              		.loc 1 2077 3 view .LVU1255
+ 4165 00a2 089B     		ldr	r3, [sp, #32]
+ 4166              	.LBE474:
+2077:Src/main.c    **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 221
+
+
+ 4167              		.loc 1 2077 3 view .LVU1256
+2080:Src/main.c    **** 
+ 4168              		.loc 1 2080 3 view .LVU1257
+ 4169 00a4 DFF8DC91 		ldr	r9, .L283+16
+ 4170 00a8 2246     		mov	r2, r4
+ 4171 00aa 4FF4C861 		mov	r1, #1600
+ 4172 00ae 4846     		mov	r0, r9
+ 4173 00b0 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4174              	.LVL475:
+2083:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ 4175              		.loc 1 2083 3 view .LVU1258
+ 4176 00b4 DFF8D0A1 		ldr	r10, .L283+20
+ 4177 00b8 2246     		mov	r2, r4
+ 4178 00ba B821     		movs	r1, #184
+ 4179 00bc 5046     		mov	r0, r10
+ 4180 00be FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4181              	.LVL476:
+2084:Src/main.c    **** 
+ 4182              		.loc 1 2084 3 view .LVU1259
+ 4183 00c2 0122     		movs	r2, #1
+ 4184 00c4 4021     		movs	r1, #64
+ 4185 00c6 5046     		mov	r0, r10
+ 4186 00c8 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4187              	.LVL477:
+2087:Src/main.c    **** 
+ 4188              		.loc 1 2087 3 view .LVU1260
+ 4189 00cc DFF8BC81 		ldr	r8, .L283+24
+ 4190 00d0 2246     		mov	r2, r4
+ 4191 00d2 4B21     		movs	r1, #75
+ 4192 00d4 4046     		mov	r0, r8
+ 4193 00d6 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4194              	.LVL478:
+2090:Src/main.c    **** 
+ 4195              		.loc 1 2090 3 view .LVU1261
+ 4196 00da 0122     		movs	r2, #1
+ 4197 00dc 1021     		movs	r1, #16
+ 4198 00de 4046     		mov	r0, r8
+ 4199 00e0 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4200              	.LVL479:
+2093:Src/main.c    ****   HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET);
+ 4201              		.loc 1 2093 3 view .LVU1262
+ 4202 00e4 644F     		ldr	r7, .L283+4
+ 4203 00e6 2246     		mov	r2, r4
+ 4204 00e8 4FF44061 		mov	r1, #3072
+ 4205 00ec 3846     		mov	r0, r7
+ 4206 00ee FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4207              	.LVL480:
+2094:Src/main.c    **** 
+ 4208              		.loc 1 2094 3 view .LVU1263
+ 4209 00f2 0122     		movs	r2, #1
+ 4210 00f4 0C21     		movs	r1, #12
+ 4211 00f6 3846     		mov	r0, r7
+ 4212 00f8 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4213              	.LVL481:
+2097:Src/main.c    **** 
+ 4214              		.loc 1 2097 3 view .LVU1264
+ 4215 00fc 0122     		movs	r2, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 222
+
+
+ 4216 00fe 4FF48041 		mov	r1, #16384
+ 4217 0102 3846     		mov	r0, r7
+ 4218 0104 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4219              	.LVL482:
+2100:Src/main.c    ****                           |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
+ 4220              		.loc 1 2100 3 view .LVU1265
+ 4221 0108 DFF884B1 		ldr	fp, .L283+28
+ 4222 010c 2246     		mov	r2, r4
+ 4223 010e 4FF44F61 		mov	r1, #3312
+ 4224 0112 5846     		mov	r0, fp
+ 4225 0114 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4226              	.LVL483:
+2104:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ 4227              		.loc 1 2104 3 view .LVU1266
+ 4228 0118 584E     		ldr	r6, .L283+8
+ 4229 011a 0122     		movs	r2, #1
+ 4230 011c 4FF48051 		mov	r1, #4096
+ 4231 0120 3046     		mov	r0, r6
+ 4232 0122 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4233              	.LVL484:
+2105:Src/main.c    **** 
+ 4234              		.loc 1 2105 3 view .LVU1267
+ 4235 0126 0122     		movs	r2, #1
+ 4236 0128 4FF48051 		mov	r1, #4096
+ 4237 012c 5846     		mov	r0, fp
+ 4238 012e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4239              	.LVL485:
+2108:Src/main.c    ****   HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ 4240              		.loc 1 2108 3 view .LVU1268
+ 4241 0132 2246     		mov	r2, r4
+ 4242 0134 4FF4C171 		mov	r1, #386
+ 4243 0138 3046     		mov	r0, r6
+ 4244 013a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4245              	.LVL486:
+2109:Src/main.c    ****   HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
+ 4246              		.loc 1 2109 3 view .LVU1269
+ 4247 013e 0122     		movs	r2, #1
+ 4248 0140 4FF40061 		mov	r1, #2048
+ 4249 0144 3046     		mov	r0, r6
+ 4250 0146 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4251              	.LVL487:
+2110:Src/main.c    **** 
+ 4252              		.loc 1 2110 3 view .LVU1270
+ 4253 014a 0122     		movs	r2, #1
+ 4254 014c 4FF40051 		mov	r1, #8192
+ 4255 0150 3046     		mov	r0, r6
+ 4256 0152 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4257              	.LVL488:
+2113:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET);
+ 4258              		.loc 1 2113 3 view .LVU1271
+ 4259 0156 2246     		mov	r2, r4
+ 4260 0158 4FF47E41 		mov	r1, #65024
+ 4261 015c 4848     		ldr	r0, .L283+12
+ 4262 015e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 4263              	.LVL489:
+2117:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4264              		.loc 1 2117 3 view .LVU1272
+ARM GAS  /tmp/ccEQxcUB.s 			page 223
+
+
+2117:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4265              		.loc 1 2117 23 is_stmt 0 view .LVU1273
+ 4266 0162 1823     		movs	r3, #24
+ 4267 0164 0993     		str	r3, [sp, #36]
+2118:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 4268              		.loc 1 2118 3 is_stmt 1 view .LVU1274
+2118:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 4269              		.loc 1 2118 24 is_stmt 0 view .LVU1275
+ 4270 0166 0A94     		str	r4, [sp, #40]
+2119:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 4271              		.loc 1 2119 3 is_stmt 1 view .LVU1276
+2119:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 4272              		.loc 1 2119 24 is_stmt 0 view .LVU1277
+ 4273 0168 0125     		movs	r5, #1
+ 4274 016a 0B95     		str	r5, [sp, #44]
+2120:Src/main.c    **** 
+ 4275              		.loc 1 2120 3 is_stmt 1 view .LVU1278
+ 4276 016c 09A9     		add	r1, sp, #36
+ 4277 016e 4846     		mov	r0, r9
+ 4278 0170 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4279              	.LVL490:
+2123:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4280              		.loc 1 2123 3 view .LVU1279
+2123:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4281              		.loc 1 2123 23 is_stmt 0 view .LVU1280
+ 4282 0174 4FF4C863 		mov	r3, #1600
+ 4283 0178 0993     		str	r3, [sp, #36]
+2124:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4284              		.loc 1 2124 3 is_stmt 1 view .LVU1281
+2124:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4285              		.loc 1 2124 24 is_stmt 0 view .LVU1282
+ 4286 017a 0A95     		str	r5, [sp, #40]
+2125:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4287              		.loc 1 2125 3 is_stmt 1 view .LVU1283
+2125:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4288              		.loc 1 2125 24 is_stmt 0 view .LVU1284
+ 4289 017c 0B94     		str	r4, [sp, #44]
+2126:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 4290              		.loc 1 2126 3 is_stmt 1 view .LVU1285
+2126:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 4291              		.loc 1 2126 25 is_stmt 0 view .LVU1286
+ 4292 017e 0C94     		str	r4, [sp, #48]
+2127:Src/main.c    **** 
+ 4293              		.loc 1 2127 3 is_stmt 1 view .LVU1287
+ 4294 0180 09A9     		add	r1, sp, #36
+ 4295 0182 4846     		mov	r0, r9
+ 4296 0184 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4297              	.LVL491:
+2130:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4298              		.loc 1 2130 3 view .LVU1288
+2130:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4299              		.loc 1 2130 23 is_stmt 0 view .LVU1289
+ 4300 0188 F023     		movs	r3, #240
+ 4301 018a 0993     		str	r3, [sp, #36]
+2131:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4302              		.loc 1 2131 3 is_stmt 1 view .LVU1290
+2131:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ARM GAS  /tmp/ccEQxcUB.s 			page 224
+
+
+ 4303              		.loc 1 2131 24 is_stmt 0 view .LVU1291
+ 4304 018c 0A95     		str	r5, [sp, #40]
+2132:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4305              		.loc 1 2132 3 is_stmt 1 view .LVU1292
+2132:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4306              		.loc 1 2132 24 is_stmt 0 view .LVU1293
+ 4307 018e 0B94     		str	r4, [sp, #44]
+2133:Src/main.c    ****   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 4308              		.loc 1 2133 3 is_stmt 1 view .LVU1294
+2133:Src/main.c    ****   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 4309              		.loc 1 2133 25 is_stmt 0 view .LVU1295
+ 4310 0190 0C94     		str	r4, [sp, #48]
+2134:Src/main.c    **** 
+ 4311              		.loc 1 2134 3 is_stmt 1 view .LVU1296
+ 4312 0192 09A9     		add	r1, sp, #36
+ 4313 0194 5046     		mov	r0, r10
+ 4314 0196 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4315              	.LVL492:
+2137:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4316              		.loc 1 2137 3 view .LVU1297
+2137:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4317              		.loc 1 2137 23 is_stmt 0 view .LVU1298
+ 4318 019a 0823     		movs	r3, #8
+ 4319 019c 0993     		str	r3, [sp, #36]
+2138:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4320              		.loc 1 2138 3 is_stmt 1 view .LVU1299
+2138:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4321              		.loc 1 2138 24 is_stmt 0 view .LVU1300
+ 4322 019e 0A95     		str	r5, [sp, #40]
+2139:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 4323              		.loc 1 2139 3 is_stmt 1 view .LVU1301
+2139:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 4324              		.loc 1 2139 24 is_stmt 0 view .LVU1302
+ 4325 01a0 0B94     		str	r4, [sp, #44]
+2140:Src/main.c    ****   HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
+ 4326              		.loc 1 2140 3 is_stmt 1 view .LVU1303
+2140:Src/main.c    ****   HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
+ 4327              		.loc 1 2140 25 is_stmt 0 view .LVU1304
+ 4328 01a2 0323     		movs	r3, #3
+ 4329 01a4 0C93     		str	r3, [sp, #48]
+2141:Src/main.c    **** 
+ 4330              		.loc 1 2141 3 is_stmt 1 view .LVU1305
+ 4331 01a6 09A9     		add	r1, sp, #36
+ 4332 01a8 5046     		mov	r0, r10
+ 4333 01aa FFF7FEFF 		bl	HAL_GPIO_Init
+ 4334              	.LVL493:
+2145:Src/main.c    ****                           |DAC_LD2_CS_Pin;
+ 4335              		.loc 1 2145 3 view .LVU1306
+2145:Src/main.c    ****                           |DAC_LD2_CS_Pin;
+ 4336              		.loc 1 2145 23 is_stmt 0 view .LVU1307
+ 4337 01ae 5B23     		movs	r3, #91
+ 4338 01b0 0993     		str	r3, [sp, #36]
+2147:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4339              		.loc 1 2147 3 is_stmt 1 view .LVU1308
+2147:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4340              		.loc 1 2147 24 is_stmt 0 view .LVU1309
+ 4341 01b2 0A95     		str	r5, [sp, #40]
+ARM GAS  /tmp/ccEQxcUB.s 			page 225
+
+
+2148:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4342              		.loc 1 2148 3 is_stmt 1 view .LVU1310
+2148:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4343              		.loc 1 2148 24 is_stmt 0 view .LVU1311
+ 4344 01b4 0B94     		str	r4, [sp, #44]
+2149:Src/main.c    ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 4345              		.loc 1 2149 3 is_stmt 1 view .LVU1312
+2149:Src/main.c    ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 4346              		.loc 1 2149 25 is_stmt 0 view .LVU1313
+ 4347 01b6 0C94     		str	r4, [sp, #48]
+2150:Src/main.c    **** 
+ 4348              		.loc 1 2150 3 is_stmt 1 view .LVU1314
+ 4349 01b8 09A9     		add	r1, sp, #36
+ 4350 01ba 4046     		mov	r0, r8
+ 4351 01bc FFF7FEFF 		bl	HAL_GPIO_Init
+ 4352              	.LVL494:
+2153:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4353              		.loc 1 2153 3 view .LVU1315
+2153:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4354              		.loc 1 2153 23 is_stmt 0 view .LVU1316
+ 4355 01c0 4FF4F043 		mov	r3, #30720
+ 4356 01c4 0993     		str	r3, [sp, #36]
+2154:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4357              		.loc 1 2154 3 is_stmt 1 view .LVU1317
+2154:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4358              		.loc 1 2154 24 is_stmt 0 view .LVU1318
+ 4359 01c6 0A94     		str	r4, [sp, #40]
+2155:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 4360              		.loc 1 2155 3 is_stmt 1 view .LVU1319
+2155:Src/main.c    ****   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 4361              		.loc 1 2155 24 is_stmt 0 view .LVU1320
+ 4362 01c8 0B94     		str	r4, [sp, #44]
+2156:Src/main.c    **** 
+ 4363              		.loc 1 2156 3 is_stmt 1 view .LVU1321
+ 4364 01ca 09A9     		add	r1, sp, #36
+ 4365 01cc 4846     		mov	r0, r9
+ 4366 01ce FFF7FEFF 		bl	HAL_GPIO_Init
+ 4367              	.LVL495:
+2159:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4368              		.loc 1 2159 3 view .LVU1322
+2159:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4369              		.loc 1 2159 23 is_stmt 0 view .LVU1323
+ 4370 01d2 4FF44063 		mov	r3, #3072
+ 4371 01d6 0993     		str	r3, [sp, #36]
+2160:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4372              		.loc 1 2160 3 is_stmt 1 view .LVU1324
+2160:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4373              		.loc 1 2160 24 is_stmt 0 view .LVU1325
+ 4374 01d8 0A95     		str	r5, [sp, #40]
+2161:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4375              		.loc 1 2161 3 is_stmt 1 view .LVU1326
+2161:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4376              		.loc 1 2161 24 is_stmt 0 view .LVU1327
+ 4377 01da 0B94     		str	r4, [sp, #44]
+2162:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 4378              		.loc 1 2162 3 is_stmt 1 view .LVU1328
+2162:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ARM GAS  /tmp/ccEQxcUB.s 			page 226
+
+
+ 4379              		.loc 1 2162 25 is_stmt 0 view .LVU1329
+ 4380 01dc 0C94     		str	r4, [sp, #48]
+2163:Src/main.c    **** 
+ 4381              		.loc 1 2163 3 is_stmt 1 view .LVU1330
+ 4382 01de 09A9     		add	r1, sp, #36
+ 4383 01e0 3846     		mov	r0, r7
+ 4384 01e2 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4385              	.LVL496:
+2166:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+ 4386              		.loc 1 2166 3 view .LVU1331
+2166:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+ 4387              		.loc 1 2166 23 is_stmt 0 view .LVU1332
+ 4388 01e6 0C23     		movs	r3, #12
+ 4389 01e8 0993     		str	r3, [sp, #36]
+2167:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4390              		.loc 1 2167 3 is_stmt 1 view .LVU1333
+2167:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4391              		.loc 1 2167 24 is_stmt 0 view .LVU1334
+ 4392 01ea 1123     		movs	r3, #17
+ 4393 01ec 0A93     		str	r3, [sp, #40]
+2168:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4394              		.loc 1 2168 3 is_stmt 1 view .LVU1335
+2168:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4395              		.loc 1 2168 24 is_stmt 0 view .LVU1336
+ 4396 01ee 0B94     		str	r4, [sp, #44]
+2169:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 4397              		.loc 1 2169 3 is_stmt 1 view .LVU1337
+2169:Src/main.c    ****   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 4398              		.loc 1 2169 25 is_stmt 0 view .LVU1338
+ 4399 01f0 0C94     		str	r4, [sp, #48]
+2170:Src/main.c    **** 
+ 4400              		.loc 1 2170 3 is_stmt 1 view .LVU1339
+ 4401 01f2 09A9     		add	r1, sp, #36
+ 4402 01f4 3846     		mov	r0, r7
+ 4403 01f6 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4404              	.LVL497:
+2173:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4405              		.loc 1 2173 3 view .LVU1340
+2173:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4406              		.loc 1 2173 23 is_stmt 0 view .LVU1341
+ 4407 01fa 4FF48043 		mov	r3, #16384
+ 4408 01fe 0993     		str	r3, [sp, #36]
+2174:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4409              		.loc 1 2174 3 is_stmt 1 view .LVU1342
+2174:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4410              		.loc 1 2174 24 is_stmt 0 view .LVU1343
+ 4411 0200 0A95     		str	r5, [sp, #40]
+2175:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 4412              		.loc 1 2175 3 is_stmt 1 view .LVU1344
+2175:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 4413              		.loc 1 2175 24 is_stmt 0 view .LVU1345
+ 4414 0202 0B94     		str	r4, [sp, #44]
+2176:Src/main.c    ****   HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
+ 4415              		.loc 1 2176 3 is_stmt 1 view .LVU1346
+2176:Src/main.c    ****   HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
+ 4416              		.loc 1 2176 25 is_stmt 0 view .LVU1347
+ 4417 0204 0323     		movs	r3, #3
+ARM GAS  /tmp/ccEQxcUB.s 			page 227
+
+
+ 4418 0206 0C93     		str	r3, [sp, #48]
+2177:Src/main.c    **** 
+ 4419              		.loc 1 2177 3 is_stmt 1 view .LVU1348
+ 4420 0208 09A9     		add	r1, sp, #36
+ 4421 020a 3846     		mov	r0, r7
+ 4422 020c FFF7FEFF 		bl	HAL_GPIO_Init
+ 4423              	.LVL498:
+2181:Src/main.c    ****                           |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
+ 4424              		.loc 1 2181 3 view .LVU1349
+2181:Src/main.c    ****                           |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
+ 4425              		.loc 1 2181 23 is_stmt 0 view .LVU1350
+ 4426 0210 41F6F043 		movw	r3, #7408
+ 4427 0214 0993     		str	r3, [sp, #36]
+2183:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4428              		.loc 1 2183 3 is_stmt 1 view .LVU1351
+2183:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4429              		.loc 1 2183 24 is_stmt 0 view .LVU1352
+ 4430 0216 0A95     		str	r5, [sp, #40]
+2184:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4431              		.loc 1 2184 3 is_stmt 1 view .LVU1353
+2184:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4432              		.loc 1 2184 24 is_stmt 0 view .LVU1354
+ 4433 0218 0B94     		str	r4, [sp, #44]
+2185:Src/main.c    ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4434              		.loc 1 2185 3 is_stmt 1 view .LVU1355
+2185:Src/main.c    ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4435              		.loc 1 2185 25 is_stmt 0 view .LVU1356
+ 4436 021a 0C94     		str	r4, [sp, #48]
+2186:Src/main.c    **** 
+ 4437              		.loc 1 2186 3 is_stmt 1 view .LVU1357
+ 4438 021c 09A9     		add	r1, sp, #36
+ 4439 021e 5846     		mov	r0, fp
+ 4440 0220 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4441              	.LVL499:
+2189:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4442              		.loc 1 2189 3 view .LVU1358
+2189:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 4443              		.loc 1 2189 23 is_stmt 0 view .LVU1359
+ 4444 0224 43F68213 		movw	r3, #14722
+ 4445 0228 0993     		str	r3, [sp, #36]
+2190:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4446              		.loc 1 2190 3 is_stmt 1 view .LVU1360
+2190:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4447              		.loc 1 2190 24 is_stmt 0 view .LVU1361
+ 4448 022a 0A95     		str	r5, [sp, #40]
+2191:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4449              		.loc 1 2191 3 is_stmt 1 view .LVU1362
+2191:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4450              		.loc 1 2191 24 is_stmt 0 view .LVU1363
+ 4451 022c 0B94     		str	r4, [sp, #44]
+2192:Src/main.c    ****   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 4452              		.loc 1 2192 3 is_stmt 1 view .LVU1364
+2192:Src/main.c    ****   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 4453              		.loc 1 2192 25 is_stmt 0 view .LVU1365
+ 4454 022e 0C94     		str	r4, [sp, #48]
+2193:Src/main.c    **** 
+ 4455              		.loc 1 2193 3 is_stmt 1 view .LVU1366
+ARM GAS  /tmp/ccEQxcUB.s 			page 228
+
+
+ 4456 0230 09A9     		add	r1, sp, #36
+ 4457 0232 3046     		mov	r0, r6
+ 4458 0234 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4459              	.LVL500:
+2196:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4460              		.loc 1 2196 3 view .LVU1367
+2196:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4461              		.loc 1 2196 23 is_stmt 0 view .LVU1368
+ 4462 0238 4FF48073 		mov	r3, #256
+ 4463 023c 0993     		str	r3, [sp, #36]
+2197:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4464              		.loc 1 2197 3 is_stmt 1 view .LVU1369
+2197:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4465              		.loc 1 2197 24 is_stmt 0 view .LVU1370
+ 4466 023e 0A94     		str	r4, [sp, #40]
+2198:Src/main.c    ****   HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
+ 4467              		.loc 1 2198 3 is_stmt 1 view .LVU1371
+2198:Src/main.c    ****   HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
+ 4468              		.loc 1 2198 24 is_stmt 0 view .LVU1372
+ 4469 0240 0B94     		str	r4, [sp, #44]
+2199:Src/main.c    **** 
+ 4470              		.loc 1 2199 3 is_stmt 1 view .LVU1373
+ 4471 0242 09A9     		add	r1, sp, #36
+ 4472 0244 4046     		mov	r0, r8
+ 4473 0246 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4474              	.LVL501:
+2202:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4475              		.loc 1 2202 3 view .LVU1374
+2202:Src/main.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 4476              		.loc 1 2202 23 is_stmt 0 view .LVU1375
+ 4477 024a 0995     		str	r5, [sp, #36]
+2203:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4478              		.loc 1 2203 3 is_stmt 1 view .LVU1376
+2203:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4479              		.loc 1 2203 24 is_stmt 0 view .LVU1377
+ 4480 024c 0A94     		str	r4, [sp, #40]
+2204:Src/main.c    ****   HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
+ 4481              		.loc 1 2204 3 is_stmt 1 view .LVU1378
+2204:Src/main.c    ****   HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
+ 4482              		.loc 1 2204 24 is_stmt 0 view .LVU1379
+ 4483 024e 0B94     		str	r4, [sp, #44]
+2205:Src/main.c    **** 
+ 4484              		.loc 1 2205 3 is_stmt 1 view .LVU1380
+ 4485 0250 09A9     		add	r1, sp, #36
+ 4486 0252 3046     		mov	r0, r6
+ 4487 0254 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4488              	.LVL502:
+2209:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
+ 4489              		.loc 1 2209 3 view .LVU1381
+2209:Src/main.c    ****                           |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
+ 4490              		.loc 1 2209 23 is_stmt 0 view .LVU1382
+ 4491 0258 4FF47E43 		mov	r3, #65024
+ 4492 025c 0993     		str	r3, [sp, #36]
+2211:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4493              		.loc 1 2211 3 is_stmt 1 view .LVU1383
+2211:Src/main.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 4494              		.loc 1 2211 24 is_stmt 0 view .LVU1384
+ARM GAS  /tmp/ccEQxcUB.s 			page 229
+
+
+ 4495 025e 0A95     		str	r5, [sp, #40]
+2212:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4496              		.loc 1 2212 3 is_stmt 1 view .LVU1385
+2212:Src/main.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 4497              		.loc 1 2212 24 is_stmt 0 view .LVU1386
+ 4498 0260 0B94     		str	r4, [sp, #44]
+2213:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 4499              		.loc 1 2213 3 is_stmt 1 view .LVU1387
+2213:Src/main.c    ****   HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 4500              		.loc 1 2213 25 is_stmt 0 view .LVU1388
+ 4501 0262 0C94     		str	r4, [sp, #48]
+2214:Src/main.c    **** 
+ 4502              		.loc 1 2214 3 is_stmt 1 view .LVU1389
+ 4503 0264 09A9     		add	r1, sp, #36
+ 4504 0266 0648     		ldr	r0, .L283+12
+ 4505 0268 FFF7FEFF 		bl	HAL_GPIO_Init
+ 4506              	.LVL503:
+2218:Src/main.c    **** 
+ 4507              		.loc 1 2218 1 is_stmt 0 view .LVU1390
+ 4508 026c 0FB0     		add	sp, sp, #60
+ 4509              	.LCFI39:
+ 4510              		.cfi_def_cfa_offset 36
+ 4511              		@ sp needed
+ 4512 026e BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+ 4513              	.L284:
+ 4514 0272 00BF     		.align	2
+ 4515              	.L283:
+ 4516 0274 00380240 		.word	1073887232
+ 4517 0278 00100240 		.word	1073876992
+ 4518 027c 000C0240 		.word	1073875968
+ 4519 0280 00180240 		.word	1073879040
+ 4520 0284 00140240 		.word	1073878016
+ 4521 0288 00080240 		.word	1073874944
+ 4522 028c 00000240 		.word	1073872896
+ 4523 0290 00040240 		.word	1073873920
+ 4524              		.cfi_endproc
+ 4525              	.LFE1207:
+ 4527              		.section	.text.MX_SPI4_Init,"ax",%progbits
+ 4528              		.align	1
+ 4529              		.syntax unified
+ 4530              		.thumb
+ 4531              		.thumb_func
+ 4533              	MX_SPI4_Init:
+ 4534              	.LFB1192:
+1325:Src/main.c    **** 
+ 4535              		.loc 1 1325 1 is_stmt 1 view -0
+ 4536              		.cfi_startproc
+ 4537              		@ args = 0, pretend = 0, frame = 72
+ 4538              		@ frame_needed = 0, uses_anonymous_args = 0
+ 4539 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 4540              	.LCFI40:
+ 4541              		.cfi_def_cfa_offset 24
+ 4542              		.cfi_offset 4, -24
+ 4543              		.cfi_offset 5, -20
+ 4544              		.cfi_offset 6, -16
+ 4545              		.cfi_offset 7, -12
+ 4546              		.cfi_offset 8, -8
+ARM GAS  /tmp/ccEQxcUB.s 			page 230
+
+
+ 4547              		.cfi_offset 14, -4
+ 4548 0004 92B0     		sub	sp, sp, #72
+ 4549              	.LCFI41:
+ 4550              		.cfi_def_cfa_offset 96
+1331:Src/main.c    **** 
+ 4551              		.loc 1 1331 3 view .LVU1392
+1331:Src/main.c    **** 
+ 4552              		.loc 1 1331 22 is_stmt 0 view .LVU1393
+ 4553 0006 2822     		movs	r2, #40
+ 4554 0008 0021     		movs	r1, #0
+ 4555 000a 08A8     		add	r0, sp, #32
+ 4556 000c FFF7FEFF 		bl	memset
+ 4557              	.LVL504:
+1333:Src/main.c    **** 
+ 4558              		.loc 1 1333 3 is_stmt 1 view .LVU1394
+1333:Src/main.c    **** 
+ 4559              		.loc 1 1333 23 is_stmt 0 view .LVU1395
+ 4560 0010 0024     		movs	r4, #0
+ 4561 0012 0294     		str	r4, [sp, #8]
+ 4562 0014 0394     		str	r4, [sp, #12]
+ 4563 0016 0494     		str	r4, [sp, #16]
+ 4564 0018 0594     		str	r4, [sp, #20]
+ 4565 001a 0694     		str	r4, [sp, #24]
+ 4566 001c 0794     		str	r4, [sp, #28]
+1336:Src/main.c    **** 
+ 4567              		.loc 1 1336 3 is_stmt 1 view .LVU1396
+ 4568              	.LVL505:
+ 4569              	.LBB475:
+ 4570              	.LBI475:
  316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
  317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
  318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
@@ -12838,9 +13784,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOHEN            LL_AHB1_GRP1_IsEnabledClock\n
  328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOIEN            LL_AHB1_GRP1_IsEnabledClock\n
  329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOJEN            LL_AHB1_GRP1_IsEnabledClock\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 215
-
-
  330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOKEN            LL_AHB1_GRP1_IsEnabledClock\n
  331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      CRCEN              LL_AHB1_GRP1_IsEnabledClock\n
  332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      BKPSRAMEN          LL_AHB1_GRP1_IsEnabledClock\n
@@ -12855,6 +13798,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      OTGHSEN            LL_AHB1_GRP1_IsEnabledClock\n
  342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      OTGHSULPIENDEN     LL_AHB1_GRP1_IsEnabledClock
  343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
+ARM GAS  /tmp/ccEQxcUB.s 			page 231
+
+
  344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
  345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
  346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
@@ -12898,9 +13844,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOGEN            LL_AHB1_GRP1_DisableClock\n
  385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOHEN            LL_AHB1_GRP1_DisableClock\n
  386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOIEN            LL_AHB1_GRP1_DisableClock\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 216
-
-
  387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOJEN            LL_AHB1_GRP1_DisableClock\n
  388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      GPIOKEN            LL_AHB1_GRP1_DisableClock\n
  389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      CRCEN              LL_AHB1_GRP1_DisableClock\n
@@ -12915,6 +13858,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      ETHMACPTPEN        LL_AHB1_GRP1_DisableClock\n
  399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      OTGHSEN            LL_AHB1_GRP1_DisableClock\n
  400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1ENR      OTGHSULPIENDEN     LL_AHB1_GRP1_DisableClock
+ARM GAS  /tmp/ccEQxcUB.s 			page 232
+
+
  401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
  402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
  403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
@@ -12958,9 +13904,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     GPIOFRST      LL_AHB1_GRP1_ForceReset\n
  442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     GPIOGRST      LL_AHB1_GRP1_ForceReset\n
  443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     GPIOHRST      LL_AHB1_GRP1_ForceReset\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 217
-
-
  444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     GPIOIRST      LL_AHB1_GRP1_ForceReset\n
  445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     GPIOJRST      LL_AHB1_GRP1_ForceReset\n
  446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     GPIOKRST      LL_AHB1_GRP1_ForceReset\n
@@ -12975,6 +13918,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
  456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
  457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
+ARM GAS  /tmp/ccEQxcUB.s 			page 233
+
+
  458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
  459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
  460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
@@ -13018,9 +13964,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     ETHMACRST     LL_AHB1_GRP1_ReleaseReset\n
  499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1RSTR     OTGHSRST      LL_AHB1_GRP1_ReleaseReset
  500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
-ARM GAS  /tmp/ccwR4KB7.s 			page 218
-
-
  501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
  502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
  503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
@@ -13035,6 +13978,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
  513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
  514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+ARM GAS  /tmp/ccEQxcUB.s 			page 234
+
+
  515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
  516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
  517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
@@ -13078,9 +14024,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    OTGHSLPEN      LL_AHB1_GRP1_EnableClockLowPower\n
  556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    OTGHSULPILPEN  LL_AHB1_GRP1_EnableClockLowPower
  557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
-ARM GAS  /tmp/ccwR4KB7.s 			page 219
-
-
  558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
  559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
  560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
@@ -13095,6 +14038,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
  570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_AXI
  571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_FLITF
+ARM GAS  /tmp/ccEQxcUB.s 			page 235
+
+
  572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1
  573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2
  574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
@@ -13138,9 +14084,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    AXILPEN        LL_AHB1_GRP1_DisableClockLowPower\n
  613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    FLITFLPEN      LL_AHB1_GRP1_DisableClockLowPower\n
  614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    SRAM1LPEN      LL_AHB1_GRP1_DisableClockLowPower\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 220
-
-
  615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    SRAM2LPEN      LL_AHB1_GRP1_DisableClockLowPower\n
  616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    BKPSRAMLPEN    LL_AHB1_GRP1_DisableClockLowPower\n
  617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    DTCMRAMLPEN    LL_AHB1_GRP1_DisableClockLowPower\n
@@ -13155,6 +14098,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB1LPENR    OTGHSULPILPEN  LL_AHB1_GRP1_DisableClockLowPower
  627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
  628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
+ARM GAS  /tmp/ccEQxcUB.s 			page 236
+
+
  629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
  630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
  631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
@@ -13198,9 +14144,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @{
  670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   */
  671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 221
-
-
  672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
  673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @brief  Enable AHB2 peripherals clock.
  674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @rmtoll AHB2ENR      DCMIEN       LL_AHB2_GRP1_EnableClock\n
@@ -13215,6 +14158,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
  684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
  685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_AES  (*)
+ARM GAS  /tmp/ccEQxcUB.s 			page 237
+
+
  686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
  687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_RNG
  688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
@@ -13258,9 +14204,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
  727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
  728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 222
-
-
  729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @brief  Disable AHB2 peripherals clock.
  730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @rmtoll AHB2ENR      DCMIEN       LL_AHB2_GRP1_DisableClock\n
  731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2ENR      JPEGEN       LL_AHB2_GRP1_DisableClock\n
@@ -13275,6 +14218,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
  741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_AES  (*)
  742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ARM GAS  /tmp/ccEQxcUB.s 			page 238
+
+
  743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_RNG
  744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
  745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *
@@ -13318,9 +14264,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @rmtoll AHB2RSTR     DCMIRST      LL_AHB2_GRP1_ReleaseReset\n
  784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2RSTR     JPEGRST      LL_AHB2_GRP1_ReleaseReset\n
  785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2RSTR     CRYPRST      LL_AHB2_GRP1_ReleaseReset\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 223
-
-
  786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2RSTR     AESRST       LL_AHB2_GRP1_ReleaseReset\n
  787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2RSTR     HASHRST      LL_AHB2_GRP1_ReleaseReset\n
  788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2RSTR     RNGRST       LL_AHB2_GRP1_ReleaseReset\n
@@ -13335,6 +14278,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_RNG
  798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
  799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *
+ARM GAS  /tmp/ccEQxcUB.s 			page 239
+
+
  800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         (*) value not defined in all devices.
  801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @retval None
  802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
@@ -13378,9 +14324,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @rmtoll AHB2LPENR    DCMILPEN     LL_AHB2_GRP1_DisableClockLowPower\n
  841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2LPENR    JPEGLPEN     LL_AHB2_GRP1_DisableClockLowPower\n
  842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2LPENR    CRYPLPEN     LL_AHB2_GRP1_DisableClockLowPower\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 224
-
-
  843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2LPENR    AESLPEN      LL_AHB2_GRP1_DisableClockLowPower\n
  844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2LPENR    HASHLPEN     LL_AHB2_GRP1_DisableClockLowPower\n
  845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB2LPENR    RNGLPEN      LL_AHB2_GRP1_DisableClockLowPower\n
@@ -13395,6 +14338,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
  855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *
  856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         (*) value not defined in all devices.
+ARM GAS  /tmp/ccEQxcUB.s 			page 240
+
+
  857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @retval None
  858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
  859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs)
@@ -13438,9 +14384,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
  898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
  899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *
-ARM GAS  /tmp/ccwR4KB7.s 			page 225
-
-
  900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         (*) value not defined in all devices.
  901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @retval State of Periphs (1 or 0).
  902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
@@ -13455,6 +14398,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         AHB3ENR      QSPIEN        LL_AHB3_GRP1_DisableClock
  912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
  913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ARM GAS  /tmp/ccEQxcUB.s 			page 241
+
+
  914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
  915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *
  916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         (*) value not defined in all devices.
@@ -13498,9 +14444,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
  955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   CLEAR_BIT(RCC->AHB3RSTR, Periphs);
  956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 226
-
-
  957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
  958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
  959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @brief  Enable AHB3 peripheral clocks in low-power mode
@@ -13515,6 +14458,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
  969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs)
  970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 242
+
+
  971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   __IO uint32_t tmpreg;
  972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->AHB3LPENR, Periphs);
  973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
@@ -13558,9 +14504,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     TIM13EN       LL_APB1_GRP1_EnableClock\n
 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     TIM14EN       LL_APB1_GRP1_EnableClock\n
 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_EnableClock\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 227
-
-
 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     WWDGEN        LL_APB1_GRP1_EnableClock\n
 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     SPI2EN        LL_APB1_GRP1_EnableClock\n
 1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     SPI3EN        LL_APB1_GRP1_EnableClock\n
@@ -13575,6 +14518,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     I2C4EN        LL_APB1_GRP1_EnableClock\n
 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     CAN1EN        LL_APB1_GRP1_EnableClock\n
 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     CAN2EN        LL_APB1_GRP1_EnableClock\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 243
+
+
 1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     CAN3EN        LL_APB1_GRP1_EnableClock\n
 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     CECEN         LL_APB1_GRP1_EnableClock\n
 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_EnableClock\n
@@ -13618,9 +14564,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         (*) value not defined in all devices.
 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @retval None
 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-ARM GAS  /tmp/ccwR4KB7.s 			page 228
-
-
 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   __IO uint32_t tmpreg;
@@ -13635,6 +14578,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_IsEnabledClock\n
 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     TIM3EN        LL_APB1_GRP1_IsEnabledClock\n
 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     TIM4EN        LL_APB1_GRP1_IsEnabledClock\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 244
+
+
 1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     TIM5EN        LL_APB1_GRP1_IsEnabledClock\n
 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     TIM6EN        LL_APB1_GRP1_IsEnabledClock\n
 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     TIM7EN        LL_APB1_GRP1_IsEnabledClock\n
@@ -13678,9 +14624,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 
 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI3
 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-ARM GAS  /tmp/ccwR4KB7.s 			page 229
-
-
 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART3
 1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_UART4
@@ -13695,6 +14638,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CEC  (*)
 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+ARM GAS  /tmp/ccEQxcUB.s 			page 245
+
+
 1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_UART7
 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_UART8
 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
@@ -13738,9 +14684,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_DisableClock\n
 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     DACEN         LL_APB1_GRP1_DisableClock\n
 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     UART7EN       LL_APB1_GRP1_DisableClock\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 230
-
-
 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     UART8EN       LL_APB1_GRP1_DisableClock\n
 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1ENR     RTCEN         LL_APB1_GRP1_DisableClock
 1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
@@ -13755,6 +14698,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM14
 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+ARM GAS  /tmp/ccEQxcUB.s 			page 246
+
+
 1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 
 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI3
 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
@@ -13798,9 +14744,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ForceReset\n
 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ForceReset\n
 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ForceReset\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 231
-
-
 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     SPI3RST        LL_APB1_GRP1_ForceReset\n
 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     SPDIFRXRST     LL_APB1_GRP1_ForceReset\n
 1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     USART2RST      LL_APB1_GRP1_ForceReset\n
@@ -13815,6 +14758,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     CAN2RST        LL_APB1_GRP1_ForceReset\n
 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     CAN3RST        LL_APB1_GRP1_ForceReset\n
 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     CECRST         LL_APB1_GRP1_ForceReset\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 247
+
+
 1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     PWRRST         LL_APB1_GRP1_ForceReset\n
 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     DACRST         LL_APB1_GRP1_ForceReset\n
 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     UART7RST       LL_APB1_GRP1_ForceReset\n
@@ -13858,9 +14804,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1RSTR, Periphs);
 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 232
-
-
 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @brief  Release APB1 peripherals reset.
@@ -13875,6 +14818,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     TIM14RST       LL_APB1_GRP1_ReleaseReset\n
 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ReleaseReset\n
 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ReleaseReset\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 248
+
+
 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ReleaseReset\n
 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     SPI3RST        LL_APB1_GRP1_ReleaseReset\n
 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1RSTR     SPDIFRXRST     LL_APB1_GRP1_ReleaseReset\n
@@ -13918,9 +14864,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3
 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-ARM GAS  /tmp/ccwR4KB7.s 			page 233
-
-
 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
 1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CEC  (*)
@@ -13935,6 +14878,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   CLEAR_BIT(RCC->APB1RSTR, Periphs);
+ARM GAS  /tmp/ccEQxcUB.s 			page 249
+
+
 1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
@@ -13978,9 +14924,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6
 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7
 1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-ARM GAS  /tmp/ccwR4KB7.s 			page 234
-
-
 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM13
 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM14
 1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
@@ -13995,6 +14938,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2
 1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+ARM GAS  /tmp/ccEQxcUB.s 			page 250
+
+
 1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CAN1
 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
@@ -14038,9 +14984,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     USART3LPEN      LL_APB1_GRP1_DisableClockLowPower\n
 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     UART4LPEN       LL_APB1_GRP1_DisableClockLowPower\n
 1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     UART5LPEN       LL_APB1_GRP1_DisableClockLowPower\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 235
-
-
 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     I2C1LPEN        LL_APB1_GRP1_DisableClockLowPower\n
 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     I2C2LPEN        LL_APB1_GRP1_DisableClockLowPower\n
 1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     I2C3LPEN        LL_APB1_GRP1_DisableClockLowPower\n
@@ -14055,6 +14998,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     UART8LPEN       LL_APB1_GRP1_DisableClockLowPower\n
 1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB1LPENR     RTCLPEN         LL_APB1_GRP1_DisableClockLowPower
 1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
+ARM GAS  /tmp/ccEQxcUB.s 			page 251
+
+
 1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 
 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM4
@@ -14098,9 +15044,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @}
 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 236
-
-
 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 
 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2
 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @{
@@ -14115,6 +15058,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB2ENR     ADC1EN        LL_APB2_GRP1_EnableClock\n
 1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB2ENR     ADC2EN        LL_APB2_GRP1_EnableClock\n
 1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB2ENR     ADC3EN        LL_APB2_GRP1_EnableClock\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 252
+
+
 1541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB2ENR     SDMMC1EN      LL_APB2_GRP1_EnableClock\n
 1542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB2ENR     SDMMC2EN      LL_APB2_GRP1_EnableClock\n
 1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         APB2ENR     SPI1EN        LL_APB2_GRP1_EnableClock\n
@@ -14158,1394 +15104,1391 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_MDIO (*)
 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_OTGPHYC (*)
 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *
-ARM GAS  /tmp/ccwR4KB7.s 			page 237
-
-
 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   *         (*) value not defined in all devices.
 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   * @retval None
 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
- 4087              		.loc 3 1587 22 view .LVU1260
- 4088              	.LBB440:
+ 4571              		.loc 3 1587 22 view .LVU1397
+ 4572              	.LBB476:
 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   __IO uint32_t tmpreg;
- 4089              		.loc 3 1589 3 view .LVU1261
+ 4573              		.loc 3 1589 3 view .LVU1398
 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB2ENR, Periphs);
- 4090              		.loc 3 1590 3 view .LVU1262
- 4091 001e 2A4B     		ldr	r3, .L262
- 4092 0020 5A6C     		ldr	r2, [r3, #68]
- 4093 0022 42F40052 		orr	r2, r2, #8192
- 4094 0026 5A64     		str	r2, [r3, #68]
+ 4574              		.loc 3 1590 3 view .LVU1399
+ 4575 001e 2A4B     		ldr	r3, .L287
+ 4576 0020 5A6C     		ldr	r2, [r3, #68]
+ 4577 0022 42F40052 		orr	r2, r2, #8192
+ARM GAS  /tmp/ccEQxcUB.s 			page 253
+
+
+ 4578 0026 5A64     		str	r2, [r3, #68]
 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
- 4095              		.loc 3 1592 3 view .LVU1263
- 4096              		.loc 3 1592 12 is_stmt 0 view .LVU1264
- 4097 0028 5A6C     		ldr	r2, [r3, #68]
- 4098 002a 02F40052 		and	r2, r2, #8192
- 4099              		.loc 3 1592 10 view .LVU1265
- 4100 002e 0192     		str	r2, [sp, #4]
+ 4579              		.loc 3 1592 3 view .LVU1400
+ 4580              		.loc 3 1592 12 is_stmt 0 view .LVU1401
+ 4581 0028 5A6C     		ldr	r2, [r3, #68]
+ 4582 002a 02F40052 		and	r2, r2, #8192
+ 4583              		.loc 3 1592 10 view .LVU1402
+ 4584 002e 0192     		str	r2, [sp, #4]
 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4101              		.loc 3 1593 3 is_stmt 1 view .LVU1266
- 4102 0030 019A     		ldr	r2, [sp, #4]
- 4103              	.LVL444:
- 4104              		.loc 3 1593 3 is_stmt 0 view .LVU1267
- 4105              	.LBE440:
- 4106              	.LBE439:
-1242:Src/main.c    ****   /**SPI4 GPIO Configuration
- 4107              		.loc 1 1242 3 is_stmt 1 view .LVU1268
- 4108              	.LBB441:
- 4109              	.LBI441:
+ 4585              		.loc 3 1593 3 is_stmt 1 view .LVU1403
+ 4586 0030 019A     		ldr	r2, [sp, #4]
+ 4587              	.LVL506:
+ 4588              		.loc 3 1593 3 is_stmt 0 view .LVU1404
+ 4589              	.LBE476:
+ 4590              	.LBE475:
+1338:Src/main.c    ****   /**SPI4 GPIO Configuration
+ 4591              		.loc 1 1338 3 is_stmt 1 view .LVU1405
+ 4592              	.LBB477:
+ 4593              	.LBI477:
  309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4110              		.loc 3 309 22 view .LVU1269
- 4111              	.LBB442:
+ 4594              		.loc 3 309 22 view .LVU1406
+ 4595              	.LBB478:
  311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->AHB1ENR, Periphs);
- 4112              		.loc 3 311 3 view .LVU1270
+ 4596              		.loc 3 311 3 view .LVU1407
  312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4113              		.loc 3 312 3 view .LVU1271
- 4114 0032 1A6B     		ldr	r2, [r3, #48]
- 4115 0034 42F01002 		orr	r2, r2, #16
- 4116 0038 1A63     		str	r2, [r3, #48]
+ 4597              		.loc 3 312 3 view .LVU1408
+ 4598 0032 1A6B     		ldr	r2, [r3, #48]
+ 4599 0034 42F01002 		orr	r2, r2, #16
+ 4600 0038 1A63     		str	r2, [r3, #48]
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4117              		.loc 3 314 3 view .LVU1272
+ 4601              		.loc 3 314 3 view .LVU1409
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4118              		.loc 3 314 12 is_stmt 0 view .LVU1273
- 4119 003a 1B6B     		ldr	r3, [r3, #48]
- 4120 003c 03F01003 		and	r3, r3, #16
+ 4602              		.loc 3 314 12 is_stmt 0 view .LVU1410
+ 4603 003a 1B6B     		ldr	r3, [r3, #48]
+ 4604 003c 03F01003 		and	r3, r3, #16
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4121              		.loc 3 314 10 view .LVU1274
- 4122 0040 0093     		str	r3, [sp]
+ 4605              		.loc 3 314 10 view .LVU1411
+ 4606 0040 0093     		str	r3, [sp]
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4123              		.loc 3 315 3 is_stmt 1 view .LVU1275
- 4124 0042 009B     		ldr	r3, [sp]
- 4125              	.LVL445:
-ARM GAS  /tmp/ccwR4KB7.s 			page 238
+ 4607              		.loc 3 315 3 is_stmt 1 view .LVU1412
+ 4608 0042 009B     		ldr	r3, [sp]
+ 4609              	.LVL507:
+ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 4610              		.loc 3 315 3 is_stmt 0 view .LVU1413
+ 4611              	.LBE478:
+ 4612              	.LBE477:
+1343:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4613              		.loc 1 1343 3 is_stmt 1 view .LVU1414
+1343:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4614              		.loc 1 1343 23 is_stmt 0 view .LVU1415
+ 4615 0044 4FF48053 		mov	r3, #4096
+ 4616 0048 0293     		str	r3, [sp, #8]
+1344:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4617              		.loc 1 1344 3 is_stmt 1 view .LVU1416
+1344:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4618              		.loc 1 1344 24 is_stmt 0 view .LVU1417
+ARM GAS  /tmp/ccEQxcUB.s 			page 254
 
 
- 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4126              		.loc 3 315 3 is_stmt 0 view .LVU1276
- 4127              	.LBE442:
- 4128              	.LBE441:
-1247:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4129              		.loc 1 1247 3 is_stmt 1 view .LVU1277
-1247:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4130              		.loc 1 1247 23 is_stmt 0 view .LVU1278
- 4131 0044 4FF48053 		mov	r3, #4096
- 4132 0048 0293     		str	r3, [sp, #8]
-1248:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4133              		.loc 1 1248 3 is_stmt 1 view .LVU1279
-1248:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4134              		.loc 1 1248 24 is_stmt 0 view .LVU1280
- 4135 004a 0225     		movs	r5, #2
- 4136 004c 0395     		str	r5, [sp, #12]
-1249:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4137              		.loc 1 1249 3 is_stmt 1 view .LVU1281
-1249:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4138              		.loc 1 1249 25 is_stmt 0 view .LVU1282
- 4139 004e 4FF00308 		mov	r8, #3
- 4140 0052 CDF81080 		str	r8, [sp, #16]
-1250:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4141              		.loc 1 1250 3 is_stmt 1 view .LVU1283
-1251:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4142              		.loc 1 1251 3 view .LVU1284
-1252:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 4143              		.loc 1 1252 3 view .LVU1285
-1252:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 4144              		.loc 1 1252 29 is_stmt 0 view .LVU1286
- 4145 0056 0527     		movs	r7, #5
- 4146 0058 0797     		str	r7, [sp, #28]
+ 4619 004a 0225     		movs	r5, #2
+ 4620 004c 0395     		str	r5, [sp, #12]
+1345:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4621              		.loc 1 1345 3 is_stmt 1 view .LVU1418
+1345:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4622              		.loc 1 1345 25 is_stmt 0 view .LVU1419
+ 4623 004e 4FF00308 		mov	r8, #3
+ 4624 0052 CDF81080 		str	r8, [sp, #16]
+1346:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4625              		.loc 1 1346 3 is_stmt 1 view .LVU1420
+1347:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4626              		.loc 1 1347 3 view .LVU1421
+1348:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 4627              		.loc 1 1348 3 view .LVU1422
+1348:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 4628              		.loc 1 1348 29 is_stmt 0 view .LVU1423
+ 4629 0056 0527     		movs	r7, #5
+ 4630 0058 0797     		str	r7, [sp, #28]
+1349:Src/main.c    **** 
+ 4631              		.loc 1 1349 3 is_stmt 1 view .LVU1424
+ 4632 005a 1C4E     		ldr	r6, .L287+4
+ 4633 005c 02A9     		add	r1, sp, #8
+ 4634 005e 3046     		mov	r0, r6
+ 4635 0060 FFF7FEFF 		bl	LL_GPIO_Init
+ 4636              	.LVL508:
+1351:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4637              		.loc 1 1351 3 view .LVU1425
+1351:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4638              		.loc 1 1351 23 is_stmt 0 view .LVU1426
+ 4639 0064 4FF40053 		mov	r3, #8192
+ 4640 0068 0293     		str	r3, [sp, #8]
+1352:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4641              		.loc 1 1352 3 is_stmt 1 view .LVU1427
+1352:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4642              		.loc 1 1352 24 is_stmt 0 view .LVU1428
+ 4643 006a 0395     		str	r5, [sp, #12]
+1353:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4644              		.loc 1 1353 3 is_stmt 1 view .LVU1429
+1353:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4645              		.loc 1 1353 25 is_stmt 0 view .LVU1430
+ 4646 006c CDF81080 		str	r8, [sp, #16]
+1354:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4647              		.loc 1 1354 3 is_stmt 1 view .LVU1431
+1354:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4648              		.loc 1 1354 30 is_stmt 0 view .LVU1432
+ 4649 0070 0594     		str	r4, [sp, #20]
+1355:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4650              		.loc 1 1355 3 is_stmt 1 view .LVU1433
+1355:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4651              		.loc 1 1355 24 is_stmt 0 view .LVU1434
+ 4652 0072 0694     		str	r4, [sp, #24]
+1356:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 4653              		.loc 1 1356 3 is_stmt 1 view .LVU1435
+1356:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 4654              		.loc 1 1356 29 is_stmt 0 view .LVU1436
+ 4655 0074 0797     		str	r7, [sp, #28]
+1357:Src/main.c    **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 255
+
+
+ 4656              		.loc 1 1357 3 is_stmt 1 view .LVU1437
+ 4657 0076 02A9     		add	r1, sp, #8
+ 4658 0078 3046     		mov	r0, r6
+ 4659 007a FFF7FEFF 		bl	LL_GPIO_Init
+ 4660              	.LVL509:
+1363:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 4661              		.loc 1 1363 3 view .LVU1438
+1363:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 4662              		.loc 1 1363 36 is_stmt 0 view .LVU1439
+ 4663 007e 4FF48063 		mov	r3, #1024
+ 4664 0082 0893     		str	r3, [sp, #32]
+1364:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 4665              		.loc 1 1364 3 is_stmt 1 view .LVU1440
+1364:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 4666              		.loc 1 1364 23 is_stmt 0 view .LVU1441
+ 4667 0084 4FF48273 		mov	r3, #260
+ 4668 0088 0993     		str	r3, [sp, #36]
+1365:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 4669              		.loc 1 1365 3 is_stmt 1 view .LVU1442
+1365:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 4670              		.loc 1 1365 28 is_stmt 0 view .LVU1443
+ 4671 008a 4FF47063 		mov	r3, #3840
+ 4672 008e 0A93     		str	r3, [sp, #40]
+1366:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 4673              		.loc 1 1366 3 is_stmt 1 view .LVU1444
+1366:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 4674              		.loc 1 1366 32 is_stmt 0 view .LVU1445
+ 4675 0090 0B95     		str	r5, [sp, #44]
+1367:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 4676              		.loc 1 1367 3 is_stmt 1 view .LVU1446
+1367:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 4677              		.loc 1 1367 29 is_stmt 0 view .LVU1447
+ 4678 0092 0C94     		str	r4, [sp, #48]
+1368:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 4679              		.loc 1 1368 3 is_stmt 1 view .LVU1448
+1368:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 4680              		.loc 1 1368 22 is_stmt 0 view .LVU1449
+ 4681 0094 4FF40073 		mov	r3, #512
+ 4682 0098 0D93     		str	r3, [sp, #52]
+1369:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 4683              		.loc 1 1369 3 is_stmt 1 view .LVU1450
+1369:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 4684              		.loc 1 1369 27 is_stmt 0 view .LVU1451
+ 4685 009a 1823     		movs	r3, #24
+ 4686 009c 0E93     		str	r3, [sp, #56]
+1370:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 4687              		.loc 1 1370 3 is_stmt 1 view .LVU1452
+1370:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 4688              		.loc 1 1370 27 is_stmt 0 view .LVU1453
+ 4689 009e 0F94     		str	r4, [sp, #60]
+1371:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 4690              		.loc 1 1371 3 is_stmt 1 view .LVU1454
+1371:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 4691              		.loc 1 1371 33 is_stmt 0 view .LVU1455
+ 4692 00a0 1094     		str	r4, [sp, #64]
+1372:Src/main.c    ****   LL_SPI_Init(SPI4, &SPI_InitStruct);
+ 4693              		.loc 1 1372 3 is_stmt 1 view .LVU1456
+ARM GAS  /tmp/ccEQxcUB.s 			page 256
+
+
+1372:Src/main.c    ****   LL_SPI_Init(SPI4, &SPI_InitStruct);
+ 4694              		.loc 1 1372 26 is_stmt 0 view .LVU1457
+ 4695 00a2 0723     		movs	r3, #7
+ 4696 00a4 1193     		str	r3, [sp, #68]
+1373:Src/main.c    ****   LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
+ 4697              		.loc 1 1373 3 is_stmt 1 view .LVU1458
+ 4698 00a6 0A4C     		ldr	r4, .L287+8
+ 4699 00a8 08A9     		add	r1, sp, #32
+ 4700 00aa 2046     		mov	r0, r4
+ 4701 00ac FFF7FEFF 		bl	LL_SPI_Init
+ 4702              	.LVL510:
+1374:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI4);
+ 4703              		.loc 1 1374 3 view .LVU1459
+ 4704              	.LBB479:
+ 4705              	.LBI479:
+ 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 4706              		.loc 4 426 22 view .LVU1460
+ 4707              	.LBB480:
+ 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 4708              		.loc 4 428 3 view .LVU1461
+ 4709 00b0 6368     		ldr	r3, [r4, #4]
+ 4710 00b2 23F01003 		bic	r3, r3, #16
+ 4711 00b6 6360     		str	r3, [r4, #4]
+ 4712              	.LVL511:
+ 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 4713              		.loc 4 428 3 is_stmt 0 view .LVU1462
+ 4714              	.LBE480:
+ 4715              	.LBE479:
+1375:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 2 */
+ 4716              		.loc 1 1375 3 is_stmt 1 view .LVU1463
+ 4717              	.LBB481:
+ 4718              	.LBI481:
+ 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 4719              		.loc 4 874 22 view .LVU1464
+ 4720              	.LBB482:
+ 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 4721              		.loc 4 876 3 view .LVU1465
+ 4722 00b8 6368     		ldr	r3, [r4, #4]
+ 4723 00ba 23F00803 		bic	r3, r3, #8
+ 4724 00be 6360     		str	r3, [r4, #4]
+ 4725              	.LVL512:
+ 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 4726              		.loc 4 876 3 is_stmt 0 view .LVU1466
+ 4727              	.LBE482:
+ 4728              	.LBE481:
+1380:Src/main.c    **** 
+ 4729              		.loc 1 1380 1 view .LVU1467
+ 4730 00c0 12B0     		add	sp, sp, #72
+ 4731              	.LCFI42:
+ 4732              		.cfi_def_cfa_offset 24
+ 4733              		@ sp needed
+ 4734 00c2 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 4735              	.L288:
+ 4736 00c6 00BF     		.align	2
+ 4737              	.L287:
+ 4738 00c8 00380240 		.word	1073887232
+ 4739 00cc 00100240 		.word	1073876992
+ARM GAS  /tmp/ccEQxcUB.s 			page 257
+
+
+ 4740 00d0 00340140 		.word	1073820672
+ 4741              		.cfi_endproc
+ 4742              	.LFE1192:
+ 4744              		.section	.text.MX_SPI2_Init,"ax",%progbits
+ 4745              		.align	1
+ 4746              		.syntax unified
+ 4747              		.thumb
+ 4748              		.thumb_func
+ 4750              	MX_SPI2_Init:
+ 4751              	.LFB1191:
 1253:Src/main.c    **** 
- 4147              		.loc 1 1253 3 is_stmt 1 view .LVU1287
- 4148 005a 1C4E     		ldr	r6, .L262+4
- 4149 005c 02A9     		add	r1, sp, #8
- 4150 005e 3046     		mov	r0, r6
- 4151 0060 FFF7FEFF 		bl	LL_GPIO_Init
- 4152              	.LVL446:
-1255:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4153              		.loc 1 1255 3 view .LVU1288
-1255:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4154              		.loc 1 1255 23 is_stmt 0 view .LVU1289
- 4155 0064 4FF40053 		mov	r3, #8192
- 4156 0068 0293     		str	r3, [sp, #8]
-1256:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4157              		.loc 1 1256 3 is_stmt 1 view .LVU1290
-1256:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4158              		.loc 1 1256 24 is_stmt 0 view .LVU1291
- 4159 006a 0395     		str	r5, [sp, #12]
-1257:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4160              		.loc 1 1257 3 is_stmt 1 view .LVU1292
-1257:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4161              		.loc 1 1257 25 is_stmt 0 view .LVU1293
- 4162 006c CDF81080 		str	r8, [sp, #16]
-1258:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4163              		.loc 1 1258 3 is_stmt 1 view .LVU1294
-ARM GAS  /tmp/ccwR4KB7.s 			page 239
-
-
-1258:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4164              		.loc 1 1258 30 is_stmt 0 view .LVU1295
- 4165 0070 0594     		str	r4, [sp, #20]
-1259:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4166              		.loc 1 1259 3 is_stmt 1 view .LVU1296
-1259:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4167              		.loc 1 1259 24 is_stmt 0 view .LVU1297
- 4168 0072 0694     		str	r4, [sp, #24]
-1260:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 4169              		.loc 1 1260 3 is_stmt 1 view .LVU1298
-1260:Src/main.c    ****   LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 4170              		.loc 1 1260 29 is_stmt 0 view .LVU1299
- 4171 0074 0797     		str	r7, [sp, #28]
+ 4752              		.loc 1 1253 1 is_stmt 1 view -0
+ 4753              		.cfi_startproc
+ 4754              		@ args = 0, pretend = 0, frame = 72
+ 4755              		@ frame_needed = 0, uses_anonymous_args = 0
+ 4756 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 4757              	.LCFI43:
+ 4758              		.cfi_def_cfa_offset 24
+ 4759              		.cfi_offset 4, -24
+ 4760              		.cfi_offset 5, -20
+ 4761              		.cfi_offset 6, -16
+ 4762              		.cfi_offset 7, -12
+ 4763              		.cfi_offset 8, -8
+ 4764              		.cfi_offset 14, -4
+ 4765 0004 92B0     		sub	sp, sp, #72
+ 4766              	.LCFI44:
+ 4767              		.cfi_def_cfa_offset 96
+1259:Src/main.c    **** 
+ 4768              		.loc 1 1259 3 view .LVU1469
+1259:Src/main.c    **** 
+ 4769              		.loc 1 1259 22 is_stmt 0 view .LVU1470
+ 4770 0006 2822     		movs	r2, #40
+ 4771 0008 0021     		movs	r1, #0
+ 4772 000a 08A8     		add	r0, sp, #32
+ 4773 000c FFF7FEFF 		bl	memset
+ 4774              	.LVL513:
 1261:Src/main.c    **** 
- 4172              		.loc 1 1261 3 is_stmt 1 view .LVU1300
- 4173 0076 02A9     		add	r1, sp, #8
- 4174 0078 3046     		mov	r0, r6
- 4175 007a FFF7FEFF 		bl	LL_GPIO_Init
- 4176              	.LVL447:
-1267:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4177              		.loc 1 1267 3 view .LVU1301
-1267:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4178              		.loc 1 1267 36 is_stmt 0 view .LVU1302
- 4179 007e 4FF48063 		mov	r3, #1024
- 4180 0082 0893     		str	r3, [sp, #32]
-1268:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4181              		.loc 1 1268 3 is_stmt 1 view .LVU1303
-1268:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4182              		.loc 1 1268 23 is_stmt 0 view .LVU1304
- 4183 0084 4FF48273 		mov	r3, #260
- 4184 0088 0993     		str	r3, [sp, #36]
-1269:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 4185              		.loc 1 1269 3 is_stmt 1 view .LVU1305
-1269:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 4186              		.loc 1 1269 28 is_stmt 0 view .LVU1306
- 4187 008a 4FF47063 		mov	r3, #3840
- 4188 008e 0A93     		str	r3, [sp, #40]
-1270:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 4189              		.loc 1 1270 3 is_stmt 1 view .LVU1307
-1270:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 4190              		.loc 1 1270 32 is_stmt 0 view .LVU1308
- 4191 0090 0B95     		str	r5, [sp, #44]
-1271:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4192              		.loc 1 1271 3 is_stmt 1 view .LVU1309
-1271:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4193              		.loc 1 1271 29 is_stmt 0 view .LVU1310
- 4194 0092 0C94     		str	r4, [sp, #48]
-1272:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 4195              		.loc 1 1272 3 is_stmt 1 view .LVU1311
-1272:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 4196              		.loc 1 1272 22 is_stmt 0 view .LVU1312
- 4197 0094 4FF40073 		mov	r3, #512
- 4198 0098 0D93     		str	r3, [sp, #52]
-1273:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4199              		.loc 1 1273 3 is_stmt 1 view .LVU1313
-1273:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4200              		.loc 1 1273 27 is_stmt 0 view .LVU1314
-ARM GAS  /tmp/ccwR4KB7.s 			page 240
-
-
- 4201 009a 1823     		movs	r3, #24
- 4202 009c 0E93     		str	r3, [sp, #56]
-1274:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4203              		.loc 1 1274 3 is_stmt 1 view .LVU1315
-1274:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4204              		.loc 1 1274 27 is_stmt 0 view .LVU1316
- 4205 009e 0F94     		str	r4, [sp, #60]
-1275:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4206              		.loc 1 1275 3 is_stmt 1 view .LVU1317
-1275:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4207              		.loc 1 1275 33 is_stmt 0 view .LVU1318
- 4208 00a0 1094     		str	r4, [sp, #64]
-1276:Src/main.c    ****   LL_SPI_Init(SPI4, &SPI_InitStruct);
- 4209              		.loc 1 1276 3 is_stmt 1 view .LVU1319
-1276:Src/main.c    ****   LL_SPI_Init(SPI4, &SPI_InitStruct);
- 4210              		.loc 1 1276 26 is_stmt 0 view .LVU1320
- 4211 00a2 0723     		movs	r3, #7
- 4212 00a4 1193     		str	r3, [sp, #68]
-1277:Src/main.c    ****   LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
- 4213              		.loc 1 1277 3 is_stmt 1 view .LVU1321
- 4214 00a6 0A4C     		ldr	r4, .L262+8
- 4215 00a8 08A9     		add	r1, sp, #32
- 4216 00aa 2046     		mov	r0, r4
- 4217 00ac FFF7FEFF 		bl	LL_SPI_Init
- 4218              	.LVL448:
-1278:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI4);
- 4219              		.loc 1 1278 3 view .LVU1322
- 4220              	.LBB443:
- 4221              	.LBI443:
- 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4222              		.loc 4 426 22 view .LVU1323
- 4223              	.LBB444:
- 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4224              		.loc 4 428 3 view .LVU1324
- 4225 00b0 6368     		ldr	r3, [r4, #4]
- 4226 00b2 23F01003 		bic	r3, r3, #16
- 4227 00b6 6360     		str	r3, [r4, #4]
- 4228              	.LVL449:
- 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4229              		.loc 4 428 3 is_stmt 0 view .LVU1325
- 4230              	.LBE444:
- 4231              	.LBE443:
-1279:Src/main.c    ****   /* USER CODE BEGIN SPI4_Init 2 */
- 4232              		.loc 1 1279 3 is_stmt 1 view .LVU1326
- 4233              	.LBB445:
- 4234              	.LBI445:
- 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4235              		.loc 4 874 22 view .LVU1327
- 4236              	.LBB446:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4237              		.loc 4 876 3 view .LVU1328
- 4238 00b8 6368     		ldr	r3, [r4, #4]
- 4239 00ba 23F00803 		bic	r3, r3, #8
- 4240 00be 6360     		str	r3, [r4, #4]
- 4241              	.LVL450:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4242              		.loc 4 876 3 is_stmt 0 view .LVU1329
-ARM GAS  /tmp/ccwR4KB7.s 			page 241
-
-
- 4243              	.LBE446:
- 4244              	.LBE445:
-1284:Src/main.c    **** 
- 4245              		.loc 1 1284 1 view .LVU1330
- 4246 00c0 12B0     		add	sp, sp, #72
- 4247              	.LCFI40:
- 4248              		.cfi_def_cfa_offset 24
- 4249              		@ sp needed
- 4250 00c2 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
- 4251              	.L263:
- 4252 00c6 00BF     		.align	2
- 4253              	.L262:
- 4254 00c8 00380240 		.word	1073887232
- 4255 00cc 00100240 		.word	1073876992
- 4256 00d0 00340140 		.word	1073820672
- 4257              		.cfi_endproc
- 4258              	.LFE1192:
- 4260              		.section	.text.MX_SPI2_Init,"ax",%progbits
- 4261              		.align	1
- 4262              		.syntax unified
- 4263              		.thumb
- 4264              		.thumb_func
- 4266              	MX_SPI2_Init:
- 4267              	.LFB1191:
-1157:Src/main.c    **** 
- 4268              		.loc 1 1157 1 is_stmt 1 view -0
- 4269              		.cfi_startproc
- 4270              		@ args = 0, pretend = 0, frame = 72
- 4271              		@ frame_needed = 0, uses_anonymous_args = 0
- 4272 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
- 4273              	.LCFI41:
- 4274              		.cfi_def_cfa_offset 24
- 4275              		.cfi_offset 4, -24
- 4276              		.cfi_offset 5, -20
- 4277              		.cfi_offset 6, -16
- 4278              		.cfi_offset 7, -12
- 4279              		.cfi_offset 8, -8
- 4280              		.cfi_offset 14, -4
- 4281 0004 92B0     		sub	sp, sp, #72
- 4282              	.LCFI42:
- 4283              		.cfi_def_cfa_offset 96
-1163:Src/main.c    **** 
- 4284              		.loc 1 1163 3 view .LVU1332
-1163:Src/main.c    **** 
- 4285              		.loc 1 1163 22 is_stmt 0 view .LVU1333
- 4286 0006 2822     		movs	r2, #40
- 4287 0008 0021     		movs	r1, #0
- 4288 000a 08A8     		add	r0, sp, #32
- 4289 000c FFF7FEFF 		bl	memset
- 4290              	.LVL451:
-1165:Src/main.c    **** 
- 4291              		.loc 1 1165 3 is_stmt 1 view .LVU1334
-1165:Src/main.c    **** 
- 4292              		.loc 1 1165 23 is_stmt 0 view .LVU1335
- 4293 0010 0024     		movs	r4, #0
- 4294 0012 0294     		str	r4, [sp, #8]
- 4295 0014 0394     		str	r4, [sp, #12]
-ARM GAS  /tmp/ccwR4KB7.s 			page 242
-
-
- 4296 0016 0494     		str	r4, [sp, #16]
- 4297 0018 0594     		str	r4, [sp, #20]
- 4298 001a 0694     		str	r4, [sp, #24]
- 4299 001c 0794     		str	r4, [sp, #28]
-1168:Src/main.c    **** 
- 4300              		.loc 1 1168 3 is_stmt 1 view .LVU1336
- 4301              	.LVL452:
- 4302              	.LBB447:
- 4303              	.LBI447:
+ 4775              		.loc 1 1261 3 is_stmt 1 view .LVU1471
+1261:Src/main.c    **** 
+ 4776              		.loc 1 1261 23 is_stmt 0 view .LVU1472
+ 4777 0010 0024     		movs	r4, #0
+ 4778 0012 0294     		str	r4, [sp, #8]
+ 4779 0014 0394     		str	r4, [sp, #12]
+ 4780 0016 0494     		str	r4, [sp, #16]
+ 4781 0018 0594     		str	r4, [sp, #20]
+ 4782 001a 0694     		str	r4, [sp, #24]
+ 4783 001c 0794     		str	r4, [sp, #28]
+1264:Src/main.c    **** 
+ 4784              		.loc 1 1264 3 is_stmt 1 view .LVU1473
+ 4785              	.LVL514:
+ 4786              	.LBB483:
+ 4787              	.LBI483:
 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4304              		.loc 3 1071 22 view .LVU1337
- 4305              	.LBB448:
+ 4788              		.loc 3 1071 22 view .LVU1474
+ 4789              	.LBB484:
 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
- 4306              		.loc 3 1073 3 view .LVU1338
+ 4790              		.loc 3 1073 3 view .LVU1475
+ARM GAS  /tmp/ccEQxcUB.s 			page 258
+
+
 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4307              		.loc 3 1074 3 view .LVU1339
- 4308 001e 2F4B     		ldr	r3, .L266
- 4309 0020 1A6C     		ldr	r2, [r3, #64]
- 4310 0022 42F48042 		orr	r2, r2, #16384
- 4311 0026 1A64     		str	r2, [r3, #64]
+ 4791              		.loc 3 1074 3 view .LVU1476
+ 4792 001e 2F4B     		ldr	r3, .L291
+ 4793 0020 1A6C     		ldr	r2, [r3, #64]
+ 4794 0022 42F48042 		orr	r2, r2, #16384
+ 4795 0026 1A64     		str	r2, [r3, #64]
 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4312              		.loc 3 1076 3 view .LVU1340
+ 4796              		.loc 3 1076 3 view .LVU1477
 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4313              		.loc 3 1076 12 is_stmt 0 view .LVU1341
- 4314 0028 1A6C     		ldr	r2, [r3, #64]
- 4315 002a 02F48042 		and	r2, r2, #16384
+ 4797              		.loc 3 1076 12 is_stmt 0 view .LVU1478
+ 4798 0028 1A6C     		ldr	r2, [r3, #64]
+ 4799 002a 02F48042 		and	r2, r2, #16384
 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4316              		.loc 3 1076 10 view .LVU1342
- 4317 002e 0192     		str	r2, [sp, #4]
+ 4800              		.loc 3 1076 10 view .LVU1479
+ 4801 002e 0192     		str	r2, [sp, #4]
 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4318              		.loc 3 1077 3 is_stmt 1 view .LVU1343
- 4319 0030 019A     		ldr	r2, [sp, #4]
- 4320              	.LVL453:
+ 4802              		.loc 3 1077 3 is_stmt 1 view .LVU1480
+ 4803 0030 019A     		ldr	r2, [sp, #4]
+ 4804              	.LVL515:
 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4321              		.loc 3 1077 3 is_stmt 0 view .LVU1344
- 4322              	.LBE448:
- 4323              	.LBE447:
-1170:Src/main.c    ****   /**SPI2 GPIO Configuration
- 4324              		.loc 1 1170 3 is_stmt 1 view .LVU1345
- 4325              	.LBB449:
- 4326              	.LBI449:
+ 4805              		.loc 3 1077 3 is_stmt 0 view .LVU1481
+ 4806              	.LBE484:
+ 4807              	.LBE483:
+1266:Src/main.c    ****   /**SPI2 GPIO Configuration
+ 4808              		.loc 1 1266 3 is_stmt 1 view .LVU1482
+ 4809              	.LBB485:
+ 4810              	.LBI485:
  309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4327              		.loc 3 309 22 view .LVU1346
- 4328              	.LBB450:
+ 4811              		.loc 3 309 22 view .LVU1483
+ 4812              	.LBB486:
  311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->AHB1ENR, Periphs);
- 4329              		.loc 3 311 3 view .LVU1347
+ 4813              		.loc 3 311 3 view .LVU1484
  312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4330              		.loc 3 312 3 view .LVU1348
- 4331 0032 1A6B     		ldr	r2, [r3, #48]
- 4332 0034 42F00202 		orr	r2, r2, #2
- 4333 0038 1A63     		str	r2, [r3, #48]
+ 4814              		.loc 3 312 3 view .LVU1485
+ 4815 0032 1A6B     		ldr	r2, [r3, #48]
+ 4816 0034 42F00202 		orr	r2, r2, #2
+ 4817 0038 1A63     		str	r2, [r3, #48]
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4334              		.loc 3 314 3 view .LVU1349
+ 4818              		.loc 3 314 3 view .LVU1486
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4335              		.loc 3 314 12 is_stmt 0 view .LVU1350
- 4336 003a 1B6B     		ldr	r3, [r3, #48]
- 4337 003c 03F00203 		and	r3, r3, #2
-ARM GAS  /tmp/ccwR4KB7.s 			page 243
-
-
+ 4819              		.loc 3 314 12 is_stmt 0 view .LVU1487
+ 4820 003a 1B6B     		ldr	r3, [r3, #48]
+ 4821 003c 03F00203 		and	r3, r3, #2
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4338              		.loc 3 314 10 view .LVU1351
- 4339 0040 0093     		str	r3, [sp]
+ 4822              		.loc 3 314 10 view .LVU1488
+ 4823 0040 0093     		str	r3, [sp]
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4340              		.loc 3 315 3 is_stmt 1 view .LVU1352
- 4341 0042 009B     		ldr	r3, [sp]
- 4342              	.LVL454:
+ 4824              		.loc 3 315 3 is_stmt 1 view .LVU1489
+ 4825 0042 009B     		ldr	r3, [sp]
+ 4826              	.LVL516:
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4343              		.loc 3 315 3 is_stmt 0 view .LVU1353
- 4344              	.LBE450:
- 4345              	.LBE449:
-1176:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4346              		.loc 1 1176 3 is_stmt 1 view .LVU1354
-1176:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4347              		.loc 1 1176 23 is_stmt 0 view .LVU1355
- 4348 0044 4FF40053 		mov	r3, #8192
- 4349 0048 0293     		str	r3, [sp, #8]
-1177:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4350              		.loc 1 1177 3 is_stmt 1 view .LVU1356
-1177:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4351              		.loc 1 1177 24 is_stmt 0 view .LVU1357
- 4352 004a 4FF00208 		mov	r8, #2
- 4353 004e CDF80C80 		str	r8, [sp, #12]
-1178:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4354              		.loc 1 1178 3 is_stmt 1 view .LVU1358
-1178:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4355              		.loc 1 1178 25 is_stmt 0 view .LVU1359
- 4356 0052 0327     		movs	r7, #3
- 4357 0054 0497     		str	r7, [sp, #16]
-1179:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4358              		.loc 1 1179 3 is_stmt 1 view .LVU1360
-1180:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4359              		.loc 1 1180 3 view .LVU1361
-1181:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 4360              		.loc 1 1181 3 view .LVU1362
-1181:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 4361              		.loc 1 1181 29 is_stmt 0 view .LVU1363
- 4362 0056 0526     		movs	r6, #5
- 4363 0058 0796     		str	r6, [sp, #28]
-1182:Src/main.c    **** 
- 4364              		.loc 1 1182 3 is_stmt 1 view .LVU1364
- 4365 005a 214D     		ldr	r5, .L266+4
- 4366 005c 02A9     		add	r1, sp, #8
- 4367 005e 2846     		mov	r0, r5
- 4368 0060 FFF7FEFF 		bl	LL_GPIO_Init
- 4369              	.LVL455:
-1184:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4370              		.loc 1 1184 3 view .LVU1365
-1184:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4371              		.loc 1 1184 23 is_stmt 0 view .LVU1366
- 4372 0064 4FF48043 		mov	r3, #16384
- 4373 0068 0293     		str	r3, [sp, #8]
-1185:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4374              		.loc 1 1185 3 is_stmt 1 view .LVU1367
-1185:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4375              		.loc 1 1185 24 is_stmt 0 view .LVU1368
- 4376 006a CDF80C80 		str	r8, [sp, #12]
-ARM GAS  /tmp/ccwR4KB7.s 			page 244
+ 4827              		.loc 3 315 3 is_stmt 0 view .LVU1490
+ 4828              	.LBE486:
+ 4829              	.LBE485:
+1272:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4830              		.loc 1 1272 3 is_stmt 1 view .LVU1491
+1272:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ARM GAS  /tmp/ccEQxcUB.s 			page 259
 
 
-1186:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4377              		.loc 1 1186 3 is_stmt 1 view .LVU1369
-1186:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4378              		.loc 1 1186 25 is_stmt 0 view .LVU1370
- 4379 006e 0497     		str	r7, [sp, #16]
-1187:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4380              		.loc 1 1187 3 is_stmt 1 view .LVU1371
-1187:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4381              		.loc 1 1187 30 is_stmt 0 view .LVU1372
- 4382 0070 0594     		str	r4, [sp, #20]
-1188:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4383              		.loc 1 1188 3 is_stmt 1 view .LVU1373
-1188:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4384              		.loc 1 1188 24 is_stmt 0 view .LVU1374
- 4385 0072 0694     		str	r4, [sp, #24]
-1189:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 4386              		.loc 1 1189 3 is_stmt 1 view .LVU1375
-1189:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 4387              		.loc 1 1189 29 is_stmt 0 view .LVU1376
- 4388 0074 0796     		str	r6, [sp, #28]
-1190:Src/main.c    **** 
- 4389              		.loc 1 1190 3 is_stmt 1 view .LVU1377
- 4390 0076 02A9     		add	r1, sp, #8
- 4391 0078 2846     		mov	r0, r5
- 4392 007a FFF7FEFF 		bl	LL_GPIO_Init
- 4393              	.LVL456:
-1192:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4394              		.loc 1 1192 3 view .LVU1378
-1192:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4395              		.loc 1 1192 23 is_stmt 0 view .LVU1379
- 4396 007e 4FF40043 		mov	r3, #32768
- 4397 0082 0293     		str	r3, [sp, #8]
-1193:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4398              		.loc 1 1193 3 is_stmt 1 view .LVU1380
-1193:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4399              		.loc 1 1193 24 is_stmt 0 view .LVU1381
- 4400 0084 CDF80C80 		str	r8, [sp, #12]
-1194:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4401              		.loc 1 1194 3 is_stmt 1 view .LVU1382
-1194:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4402              		.loc 1 1194 25 is_stmt 0 view .LVU1383
- 4403 0088 0497     		str	r7, [sp, #16]
-1195:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4404              		.loc 1 1195 3 is_stmt 1 view .LVU1384
-1195:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4405              		.loc 1 1195 30 is_stmt 0 view .LVU1385
- 4406 008a 0594     		str	r4, [sp, #20]
-1196:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4407              		.loc 1 1196 3 is_stmt 1 view .LVU1386
-1196:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4408              		.loc 1 1196 24 is_stmt 0 view .LVU1387
- 4409 008c 0694     		str	r4, [sp, #24]
-1197:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 4410              		.loc 1 1197 3 is_stmt 1 view .LVU1388
-1197:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 4411              		.loc 1 1197 29 is_stmt 0 view .LVU1389
- 4412 008e 0796     		str	r6, [sp, #28]
-ARM GAS  /tmp/ccwR4KB7.s 			page 245
+ 4831              		.loc 1 1272 23 is_stmt 0 view .LVU1492
+ 4832 0044 4FF40053 		mov	r3, #8192
+ 4833 0048 0293     		str	r3, [sp, #8]
+1273:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4834              		.loc 1 1273 3 is_stmt 1 view .LVU1493
+1273:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4835              		.loc 1 1273 24 is_stmt 0 view .LVU1494
+ 4836 004a 4FF00208 		mov	r8, #2
+ 4837 004e CDF80C80 		str	r8, [sp, #12]
+1274:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4838              		.loc 1 1274 3 is_stmt 1 view .LVU1495
+1274:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4839              		.loc 1 1274 25 is_stmt 0 view .LVU1496
+ 4840 0052 0327     		movs	r7, #3
+ 4841 0054 0497     		str	r7, [sp, #16]
+1275:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4842              		.loc 1 1275 3 is_stmt 1 view .LVU1497
+1276:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4843              		.loc 1 1276 3 view .LVU1498
+1277:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4844              		.loc 1 1277 3 view .LVU1499
+1277:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4845              		.loc 1 1277 29 is_stmt 0 view .LVU1500
+ 4846 0056 0526     		movs	r6, #5
+ 4847 0058 0796     		str	r6, [sp, #28]
+1278:Src/main.c    **** 
+ 4848              		.loc 1 1278 3 is_stmt 1 view .LVU1501
+ 4849 005a 214D     		ldr	r5, .L291+4
+ 4850 005c 02A9     		add	r1, sp, #8
+ 4851 005e 2846     		mov	r0, r5
+ 4852 0060 FFF7FEFF 		bl	LL_GPIO_Init
+ 4853              	.LVL517:
+1280:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4854              		.loc 1 1280 3 view .LVU1502
+1280:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4855              		.loc 1 1280 23 is_stmt 0 view .LVU1503
+ 4856 0064 4FF48043 		mov	r3, #16384
+ 4857 0068 0293     		str	r3, [sp, #8]
+1281:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4858              		.loc 1 1281 3 is_stmt 1 view .LVU1504
+1281:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4859              		.loc 1 1281 24 is_stmt 0 view .LVU1505
+ 4860 006a CDF80C80 		str	r8, [sp, #12]
+1282:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4861              		.loc 1 1282 3 is_stmt 1 view .LVU1506
+1282:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4862              		.loc 1 1282 25 is_stmt 0 view .LVU1507
+ 4863 006e 0497     		str	r7, [sp, #16]
+1283:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4864              		.loc 1 1283 3 is_stmt 1 view .LVU1508
+1283:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4865              		.loc 1 1283 30 is_stmt 0 view .LVU1509
+ 4866 0070 0594     		str	r4, [sp, #20]
+1284:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4867              		.loc 1 1284 3 is_stmt 1 view .LVU1510
+1284:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4868              		.loc 1 1284 24 is_stmt 0 view .LVU1511
+ARM GAS  /tmp/ccEQxcUB.s 			page 260
 
 
-1198:Src/main.c    **** 
- 4413              		.loc 1 1198 3 is_stmt 1 view .LVU1390
- 4414 0090 02A9     		add	r1, sp, #8
- 4415 0092 2846     		mov	r0, r5
- 4416 0094 FFF7FEFF 		bl	LL_GPIO_Init
- 4417              	.LVL457:
-1204:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4418              		.loc 1 1204 3 view .LVU1391
-1204:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4419              		.loc 1 1204 36 is_stmt 0 view .LVU1392
- 4420 0098 0894     		str	r4, [sp, #32]
-1205:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4421              		.loc 1 1205 3 is_stmt 1 view .LVU1393
-1205:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4422              		.loc 1 1205 23 is_stmt 0 view .LVU1394
- 4423 009a 4FF48273 		mov	r3, #260
- 4424 009e 0993     		str	r3, [sp, #36]
-1206:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
- 4425              		.loc 1 1206 3 is_stmt 1 view .LVU1395
-1206:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
- 4426              		.loc 1 1206 28 is_stmt 0 view .LVU1396
- 4427 00a0 4FF47063 		mov	r3, #3840
- 4428 00a4 0A93     		str	r3, [sp, #40]
-1207:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 4429              		.loc 1 1207 3 is_stmt 1 view .LVU1397
-1207:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 4430              		.loc 1 1207 32 is_stmt 0 view .LVU1398
- 4431 00a6 0B94     		str	r4, [sp, #44]
-1208:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4432              		.loc 1 1208 3 is_stmt 1 view .LVU1399
-1208:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4433              		.loc 1 1208 29 is_stmt 0 view .LVU1400
- 4434 00a8 0C94     		str	r4, [sp, #48]
-1209:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
- 4435              		.loc 1 1209 3 is_stmt 1 view .LVU1401
-1209:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
- 4436              		.loc 1 1209 22 is_stmt 0 view .LVU1402
- 4437 00aa 4FF40073 		mov	r3, #512
- 4438 00ae 0D93     		str	r3, [sp, #52]
-1210:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4439              		.loc 1 1210 3 is_stmt 1 view .LVU1403
-1210:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4440              		.loc 1 1210 27 is_stmt 0 view .LVU1404
- 4441 00b0 1023     		movs	r3, #16
- 4442 00b2 0E93     		str	r3, [sp, #56]
-1211:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4443              		.loc 1 1211 3 is_stmt 1 view .LVU1405
-1211:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4444              		.loc 1 1211 27 is_stmt 0 view .LVU1406
- 4445 00b4 0F94     		str	r4, [sp, #60]
-1212:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4446              		.loc 1 1212 3 is_stmt 1 view .LVU1407
-1212:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4447              		.loc 1 1212 33 is_stmt 0 view .LVU1408
- 4448 00b6 1094     		str	r4, [sp, #64]
-1213:Src/main.c    ****   LL_SPI_Init(SPI2, &SPI_InitStruct);
- 4449              		.loc 1 1213 3 is_stmt 1 view .LVU1409
-ARM GAS  /tmp/ccwR4KB7.s 			page 246
+ 4869 0072 0694     		str	r4, [sp, #24]
+1285:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4870              		.loc 1 1285 3 is_stmt 1 view .LVU1512
+1285:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4871              		.loc 1 1285 29 is_stmt 0 view .LVU1513
+ 4872 0074 0796     		str	r6, [sp, #28]
+1286:Src/main.c    **** 
+ 4873              		.loc 1 1286 3 is_stmt 1 view .LVU1514
+ 4874 0076 02A9     		add	r1, sp, #8
+ 4875 0078 2846     		mov	r0, r5
+ 4876 007a FFF7FEFF 		bl	LL_GPIO_Init
+ 4877              	.LVL518:
+1288:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4878              		.loc 1 1288 3 view .LVU1515
+1288:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 4879              		.loc 1 1288 23 is_stmt 0 view .LVU1516
+ 4880 007e 4FF40043 		mov	r3, #32768
+ 4881 0082 0293     		str	r3, [sp, #8]
+1289:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4882              		.loc 1 1289 3 is_stmt 1 view .LVU1517
+1289:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 4883              		.loc 1 1289 24 is_stmt 0 view .LVU1518
+ 4884 0084 CDF80C80 		str	r8, [sp, #12]
+1290:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4885              		.loc 1 1290 3 is_stmt 1 view .LVU1519
+1290:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 4886              		.loc 1 1290 25 is_stmt 0 view .LVU1520
+ 4887 0088 0497     		str	r7, [sp, #16]
+1291:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4888              		.loc 1 1291 3 is_stmt 1 view .LVU1521
+1291:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 4889              		.loc 1 1291 30 is_stmt 0 view .LVU1522
+ 4890 008a 0594     		str	r4, [sp, #20]
+1292:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4891              		.loc 1 1292 3 is_stmt 1 view .LVU1523
+1292:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 4892              		.loc 1 1292 24 is_stmt 0 view .LVU1524
+ 4893 008c 0694     		str	r4, [sp, #24]
+1293:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4894              		.loc 1 1293 3 is_stmt 1 view .LVU1525
+1293:Src/main.c    ****   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 4895              		.loc 1 1293 29 is_stmt 0 view .LVU1526
+ 4896 008e 0796     		str	r6, [sp, #28]
+1294:Src/main.c    **** 
+ 4897              		.loc 1 1294 3 is_stmt 1 view .LVU1527
+ 4898 0090 02A9     		add	r1, sp, #8
+ 4899 0092 2846     		mov	r0, r5
+ 4900 0094 FFF7FEFF 		bl	LL_GPIO_Init
+ 4901              	.LVL519:
+1300:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 4902              		.loc 1 1300 3 view .LVU1528
+1300:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 4903              		.loc 1 1300 36 is_stmt 0 view .LVU1529
+ 4904 0098 0894     		str	r4, [sp, #32]
+1301:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 4905              		.loc 1 1301 3 is_stmt 1 view .LVU1530
+1301:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ARM GAS  /tmp/ccEQxcUB.s 			page 261
 
 
-1213:Src/main.c    ****   LL_SPI_Init(SPI2, &SPI_InitStruct);
- 4450              		.loc 1 1213 26 is_stmt 0 view .LVU1410
- 4451 00b8 0723     		movs	r3, #7
- 4452 00ba 1193     		str	r3, [sp, #68]
-1214:Src/main.c    ****   LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
- 4453              		.loc 1 1214 3 is_stmt 1 view .LVU1411
- 4454 00bc 094C     		ldr	r4, .L266+8
- 4455 00be 08A9     		add	r1, sp, #32
- 4456 00c0 2046     		mov	r0, r4
- 4457 00c2 FFF7FEFF 		bl	LL_SPI_Init
- 4458              	.LVL458:
-1215:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI2);
- 4459              		.loc 1 1215 3 view .LVU1412
- 4460              	.LBB451:
- 4461              	.LBI451:
+ 4906              		.loc 1 1301 23 is_stmt 0 view .LVU1531
+ 4907 009a 4FF48273 		mov	r3, #260
+ 4908 009e 0993     		str	r3, [sp, #36]
+1302:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
+ 4909              		.loc 1 1302 3 is_stmt 1 view .LVU1532
+1302:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
+ 4910              		.loc 1 1302 28 is_stmt 0 view .LVU1533
+ 4911 00a0 4FF47063 		mov	r3, #3840
+ 4912 00a4 0A93     		str	r3, [sp, #40]
+1303:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 4913              		.loc 1 1303 3 is_stmt 1 view .LVU1534
+1303:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 4914              		.loc 1 1303 32 is_stmt 0 view .LVU1535
+ 4915 00a6 0B94     		str	r4, [sp, #44]
+1304:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 4916              		.loc 1 1304 3 is_stmt 1 view .LVU1536
+1304:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 4917              		.loc 1 1304 29 is_stmt 0 view .LVU1537
+ 4918 00a8 0C94     		str	r4, [sp, #48]
+1305:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
+ 4919              		.loc 1 1305 3 is_stmt 1 view .LVU1538
+1305:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
+ 4920              		.loc 1 1305 22 is_stmt 0 view .LVU1539
+ 4921 00aa 4FF40073 		mov	r3, #512
+ 4922 00ae 0D93     		str	r3, [sp, #52]
+1306:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 4923              		.loc 1 1306 3 is_stmt 1 view .LVU1540
+1306:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 4924              		.loc 1 1306 27 is_stmt 0 view .LVU1541
+ 4925 00b0 1023     		movs	r3, #16
+ 4926 00b2 0E93     		str	r3, [sp, #56]
+1307:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 4927              		.loc 1 1307 3 is_stmt 1 view .LVU1542
+1307:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 4928              		.loc 1 1307 27 is_stmt 0 view .LVU1543
+ 4929 00b4 0F94     		str	r4, [sp, #60]
+1308:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 4930              		.loc 1 1308 3 is_stmt 1 view .LVU1544
+1308:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 4931              		.loc 1 1308 33 is_stmt 0 view .LVU1545
+ 4932 00b6 1094     		str	r4, [sp, #64]
+1309:Src/main.c    ****   LL_SPI_Init(SPI2, &SPI_InitStruct);
+ 4933              		.loc 1 1309 3 is_stmt 1 view .LVU1546
+1309:Src/main.c    ****   LL_SPI_Init(SPI2, &SPI_InitStruct);
+ 4934              		.loc 1 1309 26 is_stmt 0 view .LVU1547
+ 4935 00b8 0723     		movs	r3, #7
+ 4936 00ba 1193     		str	r3, [sp, #68]
+1310:Src/main.c    ****   LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
+ 4937              		.loc 1 1310 3 is_stmt 1 view .LVU1548
+ 4938 00bc 094C     		ldr	r4, .L291+8
+ 4939 00be 08A9     		add	r1, sp, #32
+ 4940 00c0 2046     		mov	r0, r4
+ 4941 00c2 FFF7FEFF 		bl	LL_SPI_Init
+ 4942              	.LVL520:
+1311:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI2);
+ 4943              		.loc 1 1311 3 view .LVU1549
+ 4944              	.LBB487:
+ARM GAS  /tmp/ccEQxcUB.s 			page 262
+
+
+ 4945              	.LBI487:
  426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4462              		.loc 4 426 22 view .LVU1413
- 4463              	.LBB452:
+ 4946              		.loc 4 426 22 view .LVU1550
+ 4947              	.LBB488:
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4464              		.loc 4 428 3 view .LVU1414
- 4465 00c6 6368     		ldr	r3, [r4, #4]
- 4466 00c8 23F01003 		bic	r3, r3, #16
- 4467 00cc 6360     		str	r3, [r4, #4]
- 4468              	.LVL459:
+ 4948              		.loc 4 428 3 view .LVU1551
+ 4949 00c6 6368     		ldr	r3, [r4, #4]
+ 4950 00c8 23F01003 		bic	r3, r3, #16
+ 4951 00cc 6360     		str	r3, [r4, #4]
+ 4952              	.LVL521:
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4469              		.loc 4 428 3 is_stmt 0 view .LVU1415
- 4470              	.LBE452:
- 4471              	.LBE451:
-1216:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 2 */
- 4472              		.loc 1 1216 3 is_stmt 1 view .LVU1416
- 4473              	.LBB453:
- 4474              	.LBI453:
+ 4953              		.loc 4 428 3 is_stmt 0 view .LVU1552
+ 4954              	.LBE488:
+ 4955              	.LBE487:
+1312:Src/main.c    ****   /* USER CODE BEGIN SPI2_Init 2 */
+ 4956              		.loc 1 1312 3 is_stmt 1 view .LVU1553
+ 4957              	.LBB489:
+ 4958              	.LBI489:
  874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4475              		.loc 4 874 22 view .LVU1417
- 4476              	.LBB454:
+ 4959              		.loc 4 874 22 view .LVU1554
+ 4960              	.LBB490:
  876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4477              		.loc 4 876 3 view .LVU1418
- 4478 00ce 6368     		ldr	r3, [r4, #4]
- 4479 00d0 23F00803 		bic	r3, r3, #8
- 4480 00d4 6360     		str	r3, [r4, #4]
- 4481              	.LVL460:
+ 4961              		.loc 4 876 3 view .LVU1555
+ 4962 00ce 6368     		ldr	r3, [r4, #4]
+ 4963 00d0 23F00803 		bic	r3, r3, #8
+ 4964 00d4 6360     		str	r3, [r4, #4]
+ 4965              	.LVL522:
  876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4482              		.loc 4 876 3 is_stmt 0 view .LVU1419
- 4483              	.LBE454:
- 4484              	.LBE453:
-1221:Src/main.c    **** 
- 4485              		.loc 1 1221 1 view .LVU1420
- 4486 00d6 12B0     		add	sp, sp, #72
- 4487              	.LCFI43:
- 4488              		.cfi_def_cfa_offset 24
- 4489              		@ sp needed
- 4490 00d8 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
- 4491              	.L267:
- 4492              		.align	2
- 4493              	.L266:
- 4494 00dc 00380240 		.word	1073887232
- 4495 00e0 00040240 		.word	1073873920
-ARM GAS  /tmp/ccwR4KB7.s 			page 247
+ 4966              		.loc 4 876 3 is_stmt 0 view .LVU1556
+ 4967              	.LBE490:
+ 4968              	.LBE489:
+1317:Src/main.c    **** 
+ 4969              		.loc 1 1317 1 view .LVU1557
+ 4970 00d6 12B0     		add	sp, sp, #72
+ 4971              	.LCFI45:
+ 4972              		.cfi_def_cfa_offset 24
+ 4973              		@ sp needed
+ 4974 00d8 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 4975              	.L292:
+ 4976              		.align	2
+ 4977              	.L291:
+ 4978 00dc 00380240 		.word	1073887232
+ 4979 00e0 00040240 		.word	1073873920
+ 4980 00e4 00380040 		.word	1073756160
+ 4981              		.cfi_endproc
+ 4982              	.LFE1191:
+ 4984              		.section	.text.MX_SPI5_Init,"ax",%progbits
+ 4985              		.align	1
+ 4986              		.syntax unified
+ 4987              		.thumb
+ 4988              		.thumb_func
+ 4990              	MX_SPI5_Init:
+ 4991              	.LFB1193:
+1388:Src/main.c    **** 
+ 4992              		.loc 1 1388 1 is_stmt 1 view -0
+ 4993              		.cfi_startproc
+ 4994              		@ args = 0, pretend = 0, frame = 72
+ARM GAS  /tmp/ccEQxcUB.s 			page 263
 
 
- 4496 00e4 00380040 		.word	1073756160
- 4497              		.cfi_endproc
- 4498              	.LFE1191:
- 4500              		.section	.text.MX_SPI5_Init,"ax",%progbits
- 4501              		.align	1
- 4502              		.syntax unified
- 4503              		.thumb
- 4504              		.thumb_func
- 4506              	MX_SPI5_Init:
- 4507              	.LFB1193:
-1292:Src/main.c    **** 
- 4508              		.loc 1 1292 1 is_stmt 1 view -0
- 4509              		.cfi_startproc
- 4510              		@ args = 0, pretend = 0, frame = 72
- 4511              		@ frame_needed = 0, uses_anonymous_args = 0
- 4512 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
- 4513              	.LCFI44:
- 4514              		.cfi_def_cfa_offset 24
- 4515              		.cfi_offset 4, -24
- 4516              		.cfi_offset 5, -20
- 4517              		.cfi_offset 6, -16
- 4518              		.cfi_offset 7, -12
- 4519              		.cfi_offset 8, -8
- 4520              		.cfi_offset 14, -4
- 4521 0004 92B0     		sub	sp, sp, #72
- 4522              	.LCFI45:
- 4523              		.cfi_def_cfa_offset 96
-1298:Src/main.c    **** 
- 4524              		.loc 1 1298 3 view .LVU1422
-1298:Src/main.c    **** 
- 4525              		.loc 1 1298 22 is_stmt 0 view .LVU1423
- 4526 0006 2822     		movs	r2, #40
- 4527 0008 0021     		movs	r1, #0
- 4528 000a 08A8     		add	r0, sp, #32
- 4529 000c FFF7FEFF 		bl	memset
- 4530              	.LVL461:
-1300:Src/main.c    **** 
- 4531              		.loc 1 1300 3 is_stmt 1 view .LVU1424
-1300:Src/main.c    **** 
- 4532              		.loc 1 1300 23 is_stmt 0 view .LVU1425
- 4533 0010 0024     		movs	r4, #0
- 4534 0012 0294     		str	r4, [sp, #8]
- 4535 0014 0394     		str	r4, [sp, #12]
- 4536 0016 0494     		str	r4, [sp, #16]
- 4537 0018 0594     		str	r4, [sp, #20]
- 4538 001a 0694     		str	r4, [sp, #24]
- 4539 001c 0794     		str	r4, [sp, #28]
-1303:Src/main.c    **** 
- 4540              		.loc 1 1303 3 is_stmt 1 view .LVU1426
- 4541              	.LVL462:
- 4542              	.LBB455:
- 4543              	.LBI455:
+ 4995              		@ frame_needed = 0, uses_anonymous_args = 0
+ 4996 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 4997              	.LCFI46:
+ 4998              		.cfi_def_cfa_offset 24
+ 4999              		.cfi_offset 4, -24
+ 5000              		.cfi_offset 5, -20
+ 5001              		.cfi_offset 6, -16
+ 5002              		.cfi_offset 7, -12
+ 5003              		.cfi_offset 8, -8
+ 5004              		.cfi_offset 14, -4
+ 5005 0004 92B0     		sub	sp, sp, #72
+ 5006              	.LCFI47:
+ 5007              		.cfi_def_cfa_offset 96
+1394:Src/main.c    **** 
+ 5008              		.loc 1 1394 3 view .LVU1559
+1394:Src/main.c    **** 
+ 5009              		.loc 1 1394 22 is_stmt 0 view .LVU1560
+ 5010 0006 2822     		movs	r2, #40
+ 5011 0008 0021     		movs	r1, #0
+ 5012 000a 08A8     		add	r0, sp, #32
+ 5013 000c FFF7FEFF 		bl	memset
+ 5014              	.LVL523:
+1396:Src/main.c    **** 
+ 5015              		.loc 1 1396 3 is_stmt 1 view .LVU1561
+1396:Src/main.c    **** 
+ 5016              		.loc 1 1396 23 is_stmt 0 view .LVU1562
+ 5017 0010 0024     		movs	r4, #0
+ 5018 0012 0294     		str	r4, [sp, #8]
+ 5019 0014 0394     		str	r4, [sp, #12]
+ 5020 0016 0494     		str	r4, [sp, #16]
+ 5021 0018 0594     		str	r4, [sp, #20]
+ 5022 001a 0694     		str	r4, [sp, #24]
+ 5023 001c 0794     		str	r4, [sp, #28]
+1399:Src/main.c    **** 
+ 5024              		.loc 1 1399 3 is_stmt 1 view .LVU1563
+ 5025              	.LVL524:
+ 5026              	.LBB491:
+ 5027              	.LBI491:
 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4544              		.loc 3 1587 22 view .LVU1427
- 4545              	.LBB456:
+ 5028              		.loc 3 1587 22 view .LVU1564
+ 5029              	.LBB492:
 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB2ENR, Periphs);
- 4546              		.loc 3 1589 3 view .LVU1428
-ARM GAS  /tmp/ccwR4KB7.s 			page 248
-
-
+ 5030              		.loc 3 1589 3 view .LVU1565
 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4547              		.loc 3 1590 3 view .LVU1429
- 4548 001e 294B     		ldr	r3, .L270
- 4549 0020 5A6C     		ldr	r2, [r3, #68]
- 4550 0022 42F48012 		orr	r2, r2, #1048576
- 4551 0026 5A64     		str	r2, [r3, #68]
+ 5031              		.loc 3 1590 3 view .LVU1566
+ 5032 001e 294B     		ldr	r3, .L295
+ 5033 0020 5A6C     		ldr	r2, [r3, #68]
+ 5034 0022 42F48012 		orr	r2, r2, #1048576
+ 5035 0026 5A64     		str	r2, [r3, #68]
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4552              		.loc 3 1592 3 view .LVU1430
+ 5036              		.loc 3 1592 3 view .LVU1567
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4553              		.loc 3 1592 12 is_stmt 0 view .LVU1431
- 4554 0028 5A6C     		ldr	r2, [r3, #68]
- 4555 002a 02F48012 		and	r2, r2, #1048576
+ 5037              		.loc 3 1592 12 is_stmt 0 view .LVU1568
+ 5038 0028 5A6C     		ldr	r2, [r3, #68]
+ 5039 002a 02F48012 		and	r2, r2, #1048576
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4556              		.loc 3 1592 10 view .LVU1432
- 4557 002e 0192     		str	r2, [sp, #4]
- 4558              		.loc 3 1593 3 is_stmt 1 view .LVU1433
- 4559 0030 019A     		ldr	r2, [sp, #4]
- 4560              	.LVL463:
- 4561              		.loc 3 1593 3 is_stmt 0 view .LVU1434
- 4562              	.LBE456:
- 4563              	.LBE455:
-1305:Src/main.c    ****   /**SPI5 GPIO Configuration
- 4564              		.loc 1 1305 3 is_stmt 1 view .LVU1435
- 4565              	.LBB457:
- 4566              	.LBI457:
+ 5040              		.loc 3 1592 10 view .LVU1569
+ARM GAS  /tmp/ccEQxcUB.s 			page 264
+
+
+ 5041 002e 0192     		str	r2, [sp, #4]
+ 5042              		.loc 3 1593 3 is_stmt 1 view .LVU1570
+ 5043 0030 019A     		ldr	r2, [sp, #4]
+ 5044              	.LVL525:
+ 5045              		.loc 3 1593 3 is_stmt 0 view .LVU1571
+ 5046              	.LBE492:
+ 5047              	.LBE491:
+1401:Src/main.c    ****   /**SPI5 GPIO Configuration
+ 5048              		.loc 1 1401 3 is_stmt 1 view .LVU1572
+ 5049              	.LBB493:
+ 5050              	.LBI493:
  309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4567              		.loc 3 309 22 view .LVU1436
- 4568              	.LBB458:
+ 5051              		.loc 3 309 22 view .LVU1573
+ 5052              	.LBB494:
  311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->AHB1ENR, Periphs);
- 4569              		.loc 3 311 3 view .LVU1437
+ 5053              		.loc 3 311 3 view .LVU1574
  312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4570              		.loc 3 312 3 view .LVU1438
- 4571 0032 1A6B     		ldr	r2, [r3, #48]
- 4572 0034 42F02002 		orr	r2, r2, #32
- 4573 0038 1A63     		str	r2, [r3, #48]
+ 5054              		.loc 3 312 3 view .LVU1575
+ 5055 0032 1A6B     		ldr	r2, [r3, #48]
+ 5056 0034 42F02002 		orr	r2, r2, #32
+ 5057 0038 1A63     		str	r2, [r3, #48]
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4574              		.loc 3 314 3 view .LVU1439
+ 5058              		.loc 3 314 3 view .LVU1576
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4575              		.loc 3 314 12 is_stmt 0 view .LVU1440
- 4576 003a 1B6B     		ldr	r3, [r3, #48]
- 4577 003c 03F02003 		and	r3, r3, #32
+ 5059              		.loc 3 314 12 is_stmt 0 view .LVU1577
+ 5060 003a 1B6B     		ldr	r3, [r3, #48]
+ 5061 003c 03F02003 		and	r3, r3, #32
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4578              		.loc 3 314 10 view .LVU1441
- 4579 0040 0093     		str	r3, [sp]
+ 5062              		.loc 3 314 10 view .LVU1578
+ 5063 0040 0093     		str	r3, [sp]
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4580              		.loc 3 315 3 is_stmt 1 view .LVU1442
- 4581 0042 009B     		ldr	r3, [sp]
- 4582              	.LVL464:
+ 5064              		.loc 3 315 3 is_stmt 1 view .LVU1579
+ 5065 0042 009B     		ldr	r3, [sp]
+ 5066              	.LVL526:
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4583              		.loc 3 315 3 is_stmt 0 view .LVU1443
- 4584              	.LBE458:
- 4585              	.LBE457:
-1310:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4586              		.loc 1 1310 3 is_stmt 1 view .LVU1444
-1310:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4587              		.loc 1 1310 23 is_stmt 0 view .LVU1445
- 4588 0044 8023     		movs	r3, #128
-ARM GAS  /tmp/ccwR4KB7.s 			page 249
+ 5067              		.loc 3 315 3 is_stmt 0 view .LVU1580
+ 5068              	.LBE494:
+ 5069              	.LBE493:
+1406:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5070              		.loc 1 1406 3 is_stmt 1 view .LVU1581
+1406:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5071              		.loc 1 1406 23 is_stmt 0 view .LVU1582
+ 5072 0044 8023     		movs	r3, #128
+ 5073 0046 0293     		str	r3, [sp, #8]
+1407:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5074              		.loc 1 1407 3 is_stmt 1 view .LVU1583
+1407:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5075              		.loc 1 1407 24 is_stmt 0 view .LVU1584
+ 5076 0048 0225     		movs	r5, #2
+ 5077 004a 0395     		str	r5, [sp, #12]
+1408:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5078              		.loc 1 1408 3 is_stmt 1 view .LVU1585
+1408:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5079              		.loc 1 1408 25 is_stmt 0 view .LVU1586
+ 5080 004c 4FF00308 		mov	r8, #3
+ 5081 0050 CDF81080 		str	r8, [sp, #16]
+1409:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ARM GAS  /tmp/ccEQxcUB.s 			page 265
 
 
- 4589 0046 0293     		str	r3, [sp, #8]
-1311:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4590              		.loc 1 1311 3 is_stmt 1 view .LVU1446
-1311:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4591              		.loc 1 1311 24 is_stmt 0 view .LVU1447
- 4592 0048 0225     		movs	r5, #2
- 4593 004a 0395     		str	r5, [sp, #12]
-1312:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4594              		.loc 1 1312 3 is_stmt 1 view .LVU1448
-1312:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4595              		.loc 1 1312 25 is_stmt 0 view .LVU1449
- 4596 004c 4FF00308 		mov	r8, #3
- 4597 0050 CDF81080 		str	r8, [sp, #16]
-1313:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4598              		.loc 1 1313 3 is_stmt 1 view .LVU1450
-1314:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4599              		.loc 1 1314 3 view .LVU1451
-1315:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 4600              		.loc 1 1315 3 view .LVU1452
-1315:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 4601              		.loc 1 1315 29 is_stmt 0 view .LVU1453
- 4602 0054 0527     		movs	r7, #5
- 4603 0056 0797     		str	r7, [sp, #28]
-1316:Src/main.c    **** 
- 4604              		.loc 1 1316 3 is_stmt 1 view .LVU1454
- 4605 0058 1B4E     		ldr	r6, .L270+4
- 4606 005a 02A9     		add	r1, sp, #8
- 4607 005c 3046     		mov	r0, r6
- 4608 005e FFF7FEFF 		bl	LL_GPIO_Init
- 4609              	.LVL465:
-1318:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4610              		.loc 1 1318 3 view .LVU1455
-1318:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4611              		.loc 1 1318 23 is_stmt 0 view .LVU1456
- 4612 0062 4FF48073 		mov	r3, #256
- 4613 0066 0293     		str	r3, [sp, #8]
-1319:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4614              		.loc 1 1319 3 is_stmt 1 view .LVU1457
-1319:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4615              		.loc 1 1319 24 is_stmt 0 view .LVU1458
- 4616 0068 0395     		str	r5, [sp, #12]
-1320:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4617              		.loc 1 1320 3 is_stmt 1 view .LVU1459
-1320:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4618              		.loc 1 1320 25 is_stmt 0 view .LVU1460
- 4619 006a CDF81080 		str	r8, [sp, #16]
-1321:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4620              		.loc 1 1321 3 is_stmt 1 view .LVU1461
-1321:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4621              		.loc 1 1321 30 is_stmt 0 view .LVU1462
- 4622 006e 0594     		str	r4, [sp, #20]
-1322:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4623              		.loc 1 1322 3 is_stmt 1 view .LVU1463
-1322:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 4624              		.loc 1 1322 24 is_stmt 0 view .LVU1464
- 4625 0070 0694     		str	r4, [sp, #24]
-1323:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-ARM GAS  /tmp/ccwR4KB7.s 			page 250
+ 5082              		.loc 1 1409 3 is_stmt 1 view .LVU1587
+1410:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 5083              		.loc 1 1410 3 view .LVU1588
+1411:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 5084              		.loc 1 1411 3 view .LVU1589
+1411:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 5085              		.loc 1 1411 29 is_stmt 0 view .LVU1590
+ 5086 0054 0527     		movs	r7, #5
+ 5087 0056 0797     		str	r7, [sp, #28]
+1412:Src/main.c    **** 
+ 5088              		.loc 1 1412 3 is_stmt 1 view .LVU1591
+ 5089 0058 1B4E     		ldr	r6, .L295+4
+ 5090 005a 02A9     		add	r1, sp, #8
+ 5091 005c 3046     		mov	r0, r6
+ 5092 005e FFF7FEFF 		bl	LL_GPIO_Init
+ 5093              	.LVL527:
+1414:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5094              		.loc 1 1414 3 view .LVU1592
+1414:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5095              		.loc 1 1414 23 is_stmt 0 view .LVU1593
+ 5096 0062 4FF48073 		mov	r3, #256
+ 5097 0066 0293     		str	r3, [sp, #8]
+1415:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5098              		.loc 1 1415 3 is_stmt 1 view .LVU1594
+1415:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5099              		.loc 1 1415 24 is_stmt 0 view .LVU1595
+ 5100 0068 0395     		str	r5, [sp, #12]
+1416:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5101              		.loc 1 1416 3 is_stmt 1 view .LVU1596
+1416:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5102              		.loc 1 1416 25 is_stmt 0 view .LVU1597
+ 5103 006a CDF81080 		str	r8, [sp, #16]
+1417:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 5104              		.loc 1 1417 3 is_stmt 1 view .LVU1598
+1417:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 5105              		.loc 1 1417 30 is_stmt 0 view .LVU1599
+ 5106 006e 0594     		str	r4, [sp, #20]
+1418:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 5107              		.loc 1 1418 3 is_stmt 1 view .LVU1600
+1418:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 5108              		.loc 1 1418 24 is_stmt 0 view .LVU1601
+ 5109 0070 0694     		str	r4, [sp, #24]
+1419:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 5110              		.loc 1 1419 3 is_stmt 1 view .LVU1602
+1419:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 5111              		.loc 1 1419 29 is_stmt 0 view .LVU1603
+ 5112 0072 0797     		str	r7, [sp, #28]
+1420:Src/main.c    **** 
+ 5113              		.loc 1 1420 3 is_stmt 1 view .LVU1604
+ 5114 0074 02A9     		add	r1, sp, #8
+ 5115 0076 3046     		mov	r0, r6
+ 5116 0078 FFF7FEFF 		bl	LL_GPIO_Init
+ 5117              	.LVL528:
+1426:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 5118              		.loc 1 1426 3 view .LVU1605
+1426:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 5119              		.loc 1 1426 36 is_stmt 0 view .LVU1606
+ARM GAS  /tmp/ccEQxcUB.s 			page 266
 
 
- 4626              		.loc 1 1323 3 is_stmt 1 view .LVU1465
-1323:Src/main.c    ****   LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 4627              		.loc 1 1323 29 is_stmt 0 view .LVU1466
- 4628 0072 0797     		str	r7, [sp, #28]
-1324:Src/main.c    **** 
- 4629              		.loc 1 1324 3 is_stmt 1 view .LVU1467
- 4630 0074 02A9     		add	r1, sp, #8
- 4631 0076 3046     		mov	r0, r6
- 4632 0078 FFF7FEFF 		bl	LL_GPIO_Init
- 4633              	.LVL466:
-1330:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4634              		.loc 1 1330 3 view .LVU1468
-1330:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4635              		.loc 1 1330 36 is_stmt 0 view .LVU1469
- 4636 007c 4FF48063 		mov	r3, #1024
- 4637 0080 0893     		str	r3, [sp, #32]
-1331:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4638              		.loc 1 1331 3 is_stmt 1 view .LVU1470
-1331:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4639              		.loc 1 1331 23 is_stmt 0 view .LVU1471
- 4640 0082 4FF48273 		mov	r3, #260
- 4641 0086 0993     		str	r3, [sp, #36]
-1332:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 4642              		.loc 1 1332 3 is_stmt 1 view .LVU1472
-1332:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 4643              		.loc 1 1332 28 is_stmt 0 view .LVU1473
- 4644 0088 4FF47063 		mov	r3, #3840
- 4645 008c 0A93     		str	r3, [sp, #40]
-1333:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 4646              		.loc 1 1333 3 is_stmt 1 view .LVU1474
-1333:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 4647              		.loc 1 1333 32 is_stmt 0 view .LVU1475
- 4648 008e 0B95     		str	r5, [sp, #44]
-1334:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4649              		.loc 1 1334 3 is_stmt 1 view .LVU1476
-1334:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4650              		.loc 1 1334 29 is_stmt 0 view .LVU1477
- 4651 0090 0C94     		str	r4, [sp, #48]
-1335:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 4652              		.loc 1 1335 3 is_stmt 1 view .LVU1478
-1335:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 4653              		.loc 1 1335 22 is_stmt 0 view .LVU1479
- 4654 0092 4FF40073 		mov	r3, #512
- 4655 0096 0D93     		str	r3, [sp, #52]
-1336:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4656              		.loc 1 1336 3 is_stmt 1 view .LVU1480
-1336:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4657              		.loc 1 1336 27 is_stmt 0 view .LVU1481
- 4658 0098 1823     		movs	r3, #24
- 4659 009a 0E93     		str	r3, [sp, #56]
-1337:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4660              		.loc 1 1337 3 is_stmt 1 view .LVU1482
-1337:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4661              		.loc 1 1337 27 is_stmt 0 view .LVU1483
- 4662 009c 0F94     		str	r4, [sp, #60]
-1338:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4663              		.loc 1 1338 3 is_stmt 1 view .LVU1484
-ARM GAS  /tmp/ccwR4KB7.s 			page 251
+ 5120 007c 4FF48063 		mov	r3, #1024
+ 5121 0080 0893     		str	r3, [sp, #32]
+1427:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 5122              		.loc 1 1427 3 is_stmt 1 view .LVU1607
+1427:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 5123              		.loc 1 1427 23 is_stmt 0 view .LVU1608
+ 5124 0082 4FF48273 		mov	r3, #260
+ 5125 0086 0993     		str	r3, [sp, #36]
+1428:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 5126              		.loc 1 1428 3 is_stmt 1 view .LVU1609
+1428:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 5127              		.loc 1 1428 28 is_stmt 0 view .LVU1610
+ 5128 0088 4FF47063 		mov	r3, #3840
+ 5129 008c 0A93     		str	r3, [sp, #40]
+1429:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 5130              		.loc 1 1429 3 is_stmt 1 view .LVU1611
+1429:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 5131              		.loc 1 1429 32 is_stmt 0 view .LVU1612
+ 5132 008e 0B95     		str	r5, [sp, #44]
+1430:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 5133              		.loc 1 1430 3 is_stmt 1 view .LVU1613
+1430:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 5134              		.loc 1 1430 29 is_stmt 0 view .LVU1614
+ 5135 0090 0C94     		str	r4, [sp, #48]
+1431:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 5136              		.loc 1 1431 3 is_stmt 1 view .LVU1615
+1431:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 5137              		.loc 1 1431 22 is_stmt 0 view .LVU1616
+ 5138 0092 4FF40073 		mov	r3, #512
+ 5139 0096 0D93     		str	r3, [sp, #52]
+1432:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 5140              		.loc 1 1432 3 is_stmt 1 view .LVU1617
+1432:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 5141              		.loc 1 1432 27 is_stmt 0 view .LVU1618
+ 5142 0098 1823     		movs	r3, #24
+ 5143 009a 0E93     		str	r3, [sp, #56]
+1433:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 5144              		.loc 1 1433 3 is_stmt 1 view .LVU1619
+1433:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 5145              		.loc 1 1433 27 is_stmt 0 view .LVU1620
+ 5146 009c 0F94     		str	r4, [sp, #60]
+1434:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 5147              		.loc 1 1434 3 is_stmt 1 view .LVU1621
+1434:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 5148              		.loc 1 1434 33 is_stmt 0 view .LVU1622
+ 5149 009e 1094     		str	r4, [sp, #64]
+1435:Src/main.c    ****   LL_SPI_Init(SPI5, &SPI_InitStruct);
+ 5150              		.loc 1 1435 3 is_stmt 1 view .LVU1623
+1435:Src/main.c    ****   LL_SPI_Init(SPI5, &SPI_InitStruct);
+ 5151              		.loc 1 1435 26 is_stmt 0 view .LVU1624
+ 5152 00a0 0723     		movs	r3, #7
+ 5153 00a2 1193     		str	r3, [sp, #68]
+1436:Src/main.c    ****   LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
+ 5154              		.loc 1 1436 3 is_stmt 1 view .LVU1625
+ 5155 00a4 094C     		ldr	r4, .L295+8
+ 5156 00a6 08A9     		add	r1, sp, #32
+ 5157 00a8 2046     		mov	r0, r4
+ARM GAS  /tmp/ccEQxcUB.s 			page 267
 
 
-1338:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4664              		.loc 1 1338 33 is_stmt 0 view .LVU1485
- 4665 009e 1094     		str	r4, [sp, #64]
-1339:Src/main.c    ****   LL_SPI_Init(SPI5, &SPI_InitStruct);
- 4666              		.loc 1 1339 3 is_stmt 1 view .LVU1486
-1339:Src/main.c    ****   LL_SPI_Init(SPI5, &SPI_InitStruct);
- 4667              		.loc 1 1339 26 is_stmt 0 view .LVU1487
- 4668 00a0 0723     		movs	r3, #7
- 4669 00a2 1193     		str	r3, [sp, #68]
-1340:Src/main.c    ****   LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
- 4670              		.loc 1 1340 3 is_stmt 1 view .LVU1488
- 4671 00a4 094C     		ldr	r4, .L270+8
- 4672 00a6 08A9     		add	r1, sp, #32
- 4673 00a8 2046     		mov	r0, r4
- 4674 00aa FFF7FEFF 		bl	LL_SPI_Init
- 4675              	.LVL467:
-1341:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI5);
- 4676              		.loc 1 1341 3 view .LVU1489
- 4677              	.LBB459:
- 4678              	.LBI459:
+ 5158 00aa FFF7FEFF 		bl	LL_SPI_Init
+ 5159              	.LVL529:
+1437:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI5);
+ 5160              		.loc 1 1437 3 view .LVU1626
+ 5161              	.LBB495:
+ 5162              	.LBI495:
  426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4679              		.loc 4 426 22 view .LVU1490
- 4680              	.LBB460:
+ 5163              		.loc 4 426 22 view .LVU1627
+ 5164              	.LBB496:
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4681              		.loc 4 428 3 view .LVU1491
- 4682 00ae 6368     		ldr	r3, [r4, #4]
- 4683 00b0 23F01003 		bic	r3, r3, #16
- 4684 00b4 6360     		str	r3, [r4, #4]
- 4685              	.LVL468:
+ 5165              		.loc 4 428 3 view .LVU1628
+ 5166 00ae 6368     		ldr	r3, [r4, #4]
+ 5167 00b0 23F01003 		bic	r3, r3, #16
+ 5168 00b4 6360     		str	r3, [r4, #4]
+ 5169              	.LVL530:
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4686              		.loc 4 428 3 is_stmt 0 view .LVU1492
- 4687              	.LBE460:
- 4688              	.LBE459:
-1342:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 2 */
- 4689              		.loc 1 1342 3 is_stmt 1 view .LVU1493
- 4690              	.LBB461:
- 4691              	.LBI461:
+ 5170              		.loc 4 428 3 is_stmt 0 view .LVU1629
+ 5171              	.LBE496:
+ 5172              	.LBE495:
+1438:Src/main.c    ****   /* USER CODE BEGIN SPI5_Init 2 */
+ 5173              		.loc 1 1438 3 is_stmt 1 view .LVU1630
+ 5174              	.LBB497:
+ 5175              	.LBI497:
  874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4692              		.loc 4 874 22 view .LVU1494
- 4693              	.LBB462:
+ 5176              		.loc 4 874 22 view .LVU1631
+ 5177              	.LBB498:
  876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4694              		.loc 4 876 3 view .LVU1495
- 4695 00b6 6368     		ldr	r3, [r4, #4]
- 4696 00b8 23F00803 		bic	r3, r3, #8
- 4697 00bc 6360     		str	r3, [r4, #4]
- 4698              	.LVL469:
+ 5178              		.loc 4 876 3 view .LVU1632
+ 5179 00b6 6368     		ldr	r3, [r4, #4]
+ 5180 00b8 23F00803 		bic	r3, r3, #8
+ 5181 00bc 6360     		str	r3, [r4, #4]
+ 5182              	.LVL531:
  876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4699              		.loc 4 876 3 is_stmt 0 view .LVU1496
- 4700              	.LBE462:
- 4701              	.LBE461:
-1347:Src/main.c    **** 
- 4702              		.loc 1 1347 1 view .LVU1497
- 4703 00be 12B0     		add	sp, sp, #72
- 4704              	.LCFI46:
- 4705              		.cfi_def_cfa_offset 24
- 4706              		@ sp needed
- 4707 00c0 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
-ARM GAS  /tmp/ccwR4KB7.s 			page 252
-
-
- 4708              	.L271:
- 4709              		.align	2
- 4710              	.L270:
- 4711 00c4 00380240 		.word	1073887232
- 4712 00c8 00140240 		.word	1073878016
- 4713 00cc 00500140 		.word	1073827840
- 4714              		.cfi_endproc
- 4715              	.LFE1193:
- 4717              		.section	.text.MX_SPI6_Init,"ax",%progbits
- 4718              		.align	1
- 4719              		.syntax unified
- 4720              		.thumb
- 4721              		.thumb_func
- 4723              	MX_SPI6_Init:
- 4724              	.LFB1194:
-1355:Src/main.c    **** 
- 4725              		.loc 1 1355 1 is_stmt 1 view -0
- 4726              		.cfi_startproc
- 4727              		@ args = 0, pretend = 0, frame = 72
- 4728              		@ frame_needed = 0, uses_anonymous_args = 0
- 4729 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
- 4730              	.LCFI47:
- 4731              		.cfi_def_cfa_offset 24
- 4732              		.cfi_offset 4, -24
- 4733              		.cfi_offset 5, -20
- 4734              		.cfi_offset 6, -16
- 4735              		.cfi_offset 7, -12
- 4736              		.cfi_offset 8, -8
- 4737              		.cfi_offset 14, -4
- 4738 0004 92B0     		sub	sp, sp, #72
- 4739              	.LCFI48:
- 4740              		.cfi_def_cfa_offset 96
-1361:Src/main.c    **** 
- 4741              		.loc 1 1361 3 view .LVU1499
-1361:Src/main.c    **** 
- 4742              		.loc 1 1361 22 is_stmt 0 view .LVU1500
- 4743 0006 2822     		movs	r2, #40
- 4744 0008 0021     		movs	r1, #0
- 4745 000a 08A8     		add	r0, sp, #32
- 4746 000c FFF7FEFF 		bl	memset
- 4747              	.LVL470:
-1363:Src/main.c    **** 
- 4748              		.loc 1 1363 3 is_stmt 1 view .LVU1501
-1363:Src/main.c    **** 
- 4749              		.loc 1 1363 23 is_stmt 0 view .LVU1502
- 4750 0010 0024     		movs	r4, #0
- 4751 0012 0294     		str	r4, [sp, #8]
- 4752 0014 0394     		str	r4, [sp, #12]
- 4753 0016 0494     		str	r4, [sp, #16]
- 4754 0018 0594     		str	r4, [sp, #20]
- 4755 001a 0694     		str	r4, [sp, #24]
- 4756 001c 0794     		str	r4, [sp, #28]
-1366:Src/main.c    **** 
- 4757              		.loc 1 1366 3 is_stmt 1 view .LVU1503
- 4758              	.LVL471:
- 4759              	.LBB463:
- 4760              	.LBI463:
-ARM GAS  /tmp/ccwR4KB7.s 			page 253
+ 5183              		.loc 4 876 3 is_stmt 0 view .LVU1633
+ 5184              	.LBE498:
+ 5185              	.LBE497:
+1443:Src/main.c    **** 
+ 5186              		.loc 1 1443 1 view .LVU1634
+ 5187 00be 12B0     		add	sp, sp, #72
+ 5188              	.LCFI48:
+ 5189              		.cfi_def_cfa_offset 24
+ 5190              		@ sp needed
+ 5191 00c0 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 5192              	.L296:
+ 5193              		.align	2
+ 5194              	.L295:
+ 5195 00c4 00380240 		.word	1073887232
+ 5196 00c8 00140240 		.word	1073878016
+ 5197 00cc 00500140 		.word	1073827840
+ 5198              		.cfi_endproc
+ 5199              	.LFE1193:
+ 5201              		.section	.text.MX_SPI6_Init,"ax",%progbits
+ 5202              		.align	1
+ 5203              		.syntax unified
+ 5204              		.thumb
+ 5205              		.thumb_func
+ 5207              	MX_SPI6_Init:
+ARM GAS  /tmp/ccEQxcUB.s 			page 268
 
 
+ 5208              	.LFB1194:
+1451:Src/main.c    **** 
+ 5209              		.loc 1 1451 1 is_stmt 1 view -0
+ 5210              		.cfi_startproc
+ 5211              		@ args = 0, pretend = 0, frame = 72
+ 5212              		@ frame_needed = 0, uses_anonymous_args = 0
+ 5213 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 5214              	.LCFI49:
+ 5215              		.cfi_def_cfa_offset 24
+ 5216              		.cfi_offset 4, -24
+ 5217              		.cfi_offset 5, -20
+ 5218              		.cfi_offset 6, -16
+ 5219              		.cfi_offset 7, -12
+ 5220              		.cfi_offset 8, -8
+ 5221              		.cfi_offset 14, -4
+ 5222 0004 92B0     		sub	sp, sp, #72
+ 5223              	.LCFI50:
+ 5224              		.cfi_def_cfa_offset 96
+1457:Src/main.c    **** 
+ 5225              		.loc 1 1457 3 view .LVU1636
+1457:Src/main.c    **** 
+ 5226              		.loc 1 1457 22 is_stmt 0 view .LVU1637
+ 5227 0006 2822     		movs	r2, #40
+ 5228 0008 0021     		movs	r1, #0
+ 5229 000a 08A8     		add	r0, sp, #32
+ 5230 000c FFF7FEFF 		bl	memset
+ 5231              	.LVL532:
+1459:Src/main.c    **** 
+ 5232              		.loc 1 1459 3 is_stmt 1 view .LVU1638
+1459:Src/main.c    **** 
+ 5233              		.loc 1 1459 23 is_stmt 0 view .LVU1639
+ 5234 0010 0024     		movs	r4, #0
+ 5235 0012 0294     		str	r4, [sp, #8]
+ 5236 0014 0394     		str	r4, [sp, #12]
+ 5237 0016 0494     		str	r4, [sp, #16]
+ 5238 0018 0594     		str	r4, [sp, #20]
+ 5239 001a 0694     		str	r4, [sp, #24]
+ 5240 001c 0794     		str	r4, [sp, #28]
+1462:Src/main.c    **** 
+ 5241              		.loc 1 1462 3 is_stmt 1 view .LVU1640
+ 5242              	.LVL533:
+ 5243              	.LBB499:
+ 5244              	.LBI499:
 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4761              		.loc 3 1587 22 view .LVU1504
- 4762              	.LBB464:
+ 5245              		.loc 3 1587 22 view .LVU1641
+ 5246              	.LBB500:
 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB2ENR, Periphs);
- 4763              		.loc 3 1589 3 view .LVU1505
+ 5247              		.loc 3 1589 3 view .LVU1642
 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4764              		.loc 3 1590 3 view .LVU1506
- 4765 001e 294B     		ldr	r3, .L274
- 4766 0020 5A6C     		ldr	r2, [r3, #68]
- 4767 0022 42F40012 		orr	r2, r2, #2097152
- 4768 0026 5A64     		str	r2, [r3, #68]
+ 5248              		.loc 3 1590 3 view .LVU1643
+ 5249 001e 294B     		ldr	r3, .L299
+ 5250 0020 5A6C     		ldr	r2, [r3, #68]
+ 5251 0022 42F40012 		orr	r2, r2, #2097152
+ 5252 0026 5A64     		str	r2, [r3, #68]
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4769              		.loc 3 1592 3 view .LVU1507
+ 5253              		.loc 3 1592 3 view .LVU1644
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4770              		.loc 3 1592 12 is_stmt 0 view .LVU1508
- 4771 0028 5A6C     		ldr	r2, [r3, #68]
- 4772 002a 02F40012 		and	r2, r2, #2097152
+ARM GAS  /tmp/ccEQxcUB.s 			page 269
+
+
+ 5254              		.loc 3 1592 12 is_stmt 0 view .LVU1645
+ 5255 0028 5A6C     		ldr	r2, [r3, #68]
+ 5256 002a 02F40012 		and	r2, r2, #2097152
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4773              		.loc 3 1592 10 view .LVU1509
- 4774 002e 0192     		str	r2, [sp, #4]
- 4775              		.loc 3 1593 3 is_stmt 1 view .LVU1510
- 4776 0030 019A     		ldr	r2, [sp, #4]
- 4777              	.LVL472:
- 4778              		.loc 3 1593 3 is_stmt 0 view .LVU1511
- 4779              	.LBE464:
- 4780              	.LBE463:
-1368:Src/main.c    ****   /**SPI6 GPIO Configuration
- 4781              		.loc 1 1368 3 is_stmt 1 view .LVU1512
- 4782              	.LBB465:
- 4783              	.LBI465:
+ 5257              		.loc 3 1592 10 view .LVU1646
+ 5258 002e 0192     		str	r2, [sp, #4]
+ 5259              		.loc 3 1593 3 is_stmt 1 view .LVU1647
+ 5260 0030 019A     		ldr	r2, [sp, #4]
+ 5261              	.LVL534:
+ 5262              		.loc 3 1593 3 is_stmt 0 view .LVU1648
+ 5263              	.LBE500:
+ 5264              	.LBE499:
+1464:Src/main.c    ****   /**SPI6 GPIO Configuration
+ 5265              		.loc 1 1464 3 is_stmt 1 view .LVU1649
+ 5266              	.LBB501:
+ 5267              	.LBI501:
  309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4784              		.loc 3 309 22 view .LVU1513
- 4785              	.LBB466:
+ 5268              		.loc 3 309 22 view .LVU1650
+ 5269              	.LBB502:
  311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->AHB1ENR, Periphs);
- 4786              		.loc 3 311 3 view .LVU1514
+ 5270              		.loc 3 311 3 view .LVU1651
  312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4787              		.loc 3 312 3 view .LVU1515
- 4788 0032 1A6B     		ldr	r2, [r3, #48]
- 4789 0034 42F00102 		orr	r2, r2, #1
- 4790 0038 1A63     		str	r2, [r3, #48]
+ 5271              		.loc 3 312 3 view .LVU1652
+ 5272 0032 1A6B     		ldr	r2, [r3, #48]
+ 5273 0034 42F00102 		orr	r2, r2, #1
+ 5274 0038 1A63     		str	r2, [r3, #48]
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4791              		.loc 3 314 3 view .LVU1516
+ 5275              		.loc 3 314 3 view .LVU1653
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4792              		.loc 3 314 12 is_stmt 0 view .LVU1517
- 4793 003a 1B6B     		ldr	r3, [r3, #48]
- 4794 003c 03F00103 		and	r3, r3, #1
+ 5276              		.loc 3 314 12 is_stmt 0 view .LVU1654
+ 5277 003a 1B6B     		ldr	r3, [r3, #48]
+ 5278 003c 03F00103 		and	r3, r3, #1
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4795              		.loc 3 314 10 view .LVU1518
- 4796 0040 0093     		str	r3, [sp]
+ 5279              		.loc 3 314 10 view .LVU1655
+ 5280 0040 0093     		str	r3, [sp]
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4797              		.loc 3 315 3 is_stmt 1 view .LVU1519
- 4798 0042 009B     		ldr	r3, [sp]
- 4799              	.LVL473:
+ 5281              		.loc 3 315 3 is_stmt 1 view .LVU1656
+ 5282 0042 009B     		ldr	r3, [sp]
+ 5283              	.LVL535:
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4800              		.loc 3 315 3 is_stmt 0 view .LVU1520
- 4801              	.LBE466:
- 4802              	.LBE465:
-ARM GAS  /tmp/ccwR4KB7.s 			page 254
+ 5284              		.loc 3 315 3 is_stmt 0 view .LVU1657
+ 5285              	.LBE502:
+ 5286              	.LBE501:
+1469:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5287              		.loc 1 1469 3 is_stmt 1 view .LVU1658
+1469:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5288              		.loc 1 1469 23 is_stmt 0 view .LVU1659
+ 5289 0044 2023     		movs	r3, #32
+ 5290 0046 0293     		str	r3, [sp, #8]
+1470:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5291              		.loc 1 1470 3 is_stmt 1 view .LVU1660
+1470:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5292              		.loc 1 1470 24 is_stmt 0 view .LVU1661
+ 5293 0048 0225     		movs	r5, #2
+ 5294 004a 0395     		str	r5, [sp, #12]
+1471:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5295              		.loc 1 1471 3 is_stmt 1 view .LVU1662
+ARM GAS  /tmp/ccEQxcUB.s 			page 270
 
 
-1373:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4803              		.loc 1 1373 3 is_stmt 1 view .LVU1521
-1373:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4804              		.loc 1 1373 23 is_stmt 0 view .LVU1522
- 4805 0044 2023     		movs	r3, #32
- 4806 0046 0293     		str	r3, [sp, #8]
-1374:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4807              		.loc 1 1374 3 is_stmt 1 view .LVU1523
-1374:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4808              		.loc 1 1374 24 is_stmt 0 view .LVU1524
- 4809 0048 0225     		movs	r5, #2
- 4810 004a 0395     		str	r5, [sp, #12]
-1375:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4811              		.loc 1 1375 3 is_stmt 1 view .LVU1525
-1375:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4812              		.loc 1 1375 25 is_stmt 0 view .LVU1526
- 4813 004c 4FF00308 		mov	r8, #3
- 4814 0050 CDF81080 		str	r8, [sp, #16]
-1376:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4815              		.loc 1 1376 3 is_stmt 1 view .LVU1527
-1377:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- 4816              		.loc 1 1377 3 view .LVU1528
-1378:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 4817              		.loc 1 1378 3 view .LVU1529
-1378:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 4818              		.loc 1 1378 29 is_stmt 0 view .LVU1530
- 4819 0054 0827     		movs	r7, #8
- 4820 0056 0797     		str	r7, [sp, #28]
-1379:Src/main.c    **** 
- 4821              		.loc 1 1379 3 is_stmt 1 view .LVU1531
- 4822 0058 1B4E     		ldr	r6, .L274+4
- 4823 005a 0DEB0701 		add	r1, sp, r7
- 4824 005e 3046     		mov	r0, r6
- 4825 0060 FFF7FEFF 		bl	LL_GPIO_Init
- 4826              	.LVL474:
-1381:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4827              		.loc 1 1381 3 view .LVU1532
-1381:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 4828              		.loc 1 1381 23 is_stmt 0 view .LVU1533
- 4829 0064 8023     		movs	r3, #128
- 4830 0066 0293     		str	r3, [sp, #8]
-1382:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4831              		.loc 1 1382 3 is_stmt 1 view .LVU1534
-1382:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 4832              		.loc 1 1382 24 is_stmt 0 view .LVU1535
- 4833 0068 0395     		str	r5, [sp, #12]
-1383:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4834              		.loc 1 1383 3 is_stmt 1 view .LVU1536
-1383:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 4835              		.loc 1 1383 25 is_stmt 0 view .LVU1537
- 4836 006a CDF81080 		str	r8, [sp, #16]
-1384:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4837              		.loc 1 1384 3 is_stmt 1 view .LVU1538
-1384:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 4838              		.loc 1 1384 30 is_stmt 0 view .LVU1539
- 4839 006e 0594     		str	r4, [sp, #20]
-1385:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
-ARM GAS  /tmp/ccwR4KB7.s 			page 255
+1471:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5296              		.loc 1 1471 25 is_stmt 0 view .LVU1663
+ 5297 004c 4FF00308 		mov	r8, #3
+ 5298 0050 CDF81080 		str	r8, [sp, #16]
+1472:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 5299              		.loc 1 1472 3 is_stmt 1 view .LVU1664
+1473:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 5300              		.loc 1 1473 3 view .LVU1665
+1474:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 5301              		.loc 1 1474 3 view .LVU1666
+1474:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 5302              		.loc 1 1474 29 is_stmt 0 view .LVU1667
+ 5303 0054 0827     		movs	r7, #8
+ 5304 0056 0797     		str	r7, [sp, #28]
+1475:Src/main.c    **** 
+ 5305              		.loc 1 1475 3 is_stmt 1 view .LVU1668
+ 5306 0058 1B4E     		ldr	r6, .L299+4
+ 5307 005a 0DEB0701 		add	r1, sp, r7
+ 5308 005e 3046     		mov	r0, r6
+ 5309 0060 FFF7FEFF 		bl	LL_GPIO_Init
+ 5310              	.LVL536:
+1477:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5311              		.loc 1 1477 3 view .LVU1669
+1477:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 5312              		.loc 1 1477 23 is_stmt 0 view .LVU1670
+ 5313 0064 8023     		movs	r3, #128
+ 5314 0066 0293     		str	r3, [sp, #8]
+1478:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5315              		.loc 1 1478 3 is_stmt 1 view .LVU1671
+1478:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 5316              		.loc 1 1478 24 is_stmt 0 view .LVU1672
+ 5317 0068 0395     		str	r5, [sp, #12]
+1479:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5318              		.loc 1 1479 3 is_stmt 1 view .LVU1673
+1479:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 5319              		.loc 1 1479 25 is_stmt 0 view .LVU1674
+ 5320 006a CDF81080 		str	r8, [sp, #16]
+1480:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 5321              		.loc 1 1480 3 is_stmt 1 view .LVU1675
+1480:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 5322              		.loc 1 1480 30 is_stmt 0 view .LVU1676
+ 5323 006e 0594     		str	r4, [sp, #20]
+1481:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 5324              		.loc 1 1481 3 is_stmt 1 view .LVU1677
+1481:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 5325              		.loc 1 1481 24 is_stmt 0 view .LVU1678
+ 5326 0070 0694     		str	r4, [sp, #24]
+1482:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 5327              		.loc 1 1482 3 is_stmt 1 view .LVU1679
+1482:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 5328              		.loc 1 1482 29 is_stmt 0 view .LVU1680
+ 5329 0072 0797     		str	r7, [sp, #28]
+1483:Src/main.c    **** 
+ 5330              		.loc 1 1483 3 is_stmt 1 view .LVU1681
+ 5331 0074 0DEB0701 		add	r1, sp, r7
+ 5332 0078 3046     		mov	r0, r6
+ 5333 007a FFF7FEFF 		bl	LL_GPIO_Init
+ARM GAS  /tmp/ccEQxcUB.s 			page 271
 
 
- 4840              		.loc 1 1385 3 is_stmt 1 view .LVU1540
-1385:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- 4841              		.loc 1 1385 24 is_stmt 0 view .LVU1541
- 4842 0070 0694     		str	r4, [sp, #24]
-1386:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 4843              		.loc 1 1386 3 is_stmt 1 view .LVU1542
-1386:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 4844              		.loc 1 1386 29 is_stmt 0 view .LVU1543
- 4845 0072 0797     		str	r7, [sp, #28]
-1387:Src/main.c    **** 
- 4846              		.loc 1 1387 3 is_stmt 1 view .LVU1544
- 4847 0074 0DEB0701 		add	r1, sp, r7
- 4848 0078 3046     		mov	r0, r6
- 4849 007a FFF7FEFF 		bl	LL_GPIO_Init
- 4850              	.LVL475:
-1393:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4851              		.loc 1 1393 3 view .LVU1545
-1393:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 4852              		.loc 1 1393 36 is_stmt 0 view .LVU1546
- 4853 007e 0894     		str	r4, [sp, #32]
-1394:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4854              		.loc 1 1394 3 is_stmt 1 view .LVU1547
-1394:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 4855              		.loc 1 1394 23 is_stmt 0 view .LVU1548
- 4856 0080 4FF48273 		mov	r3, #260
- 4857 0084 0993     		str	r3, [sp, #36]
-1395:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 4858              		.loc 1 1395 3 is_stmt 1 view .LVU1549
-1395:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 4859              		.loc 1 1395 28 is_stmt 0 view .LVU1550
- 4860 0086 4FF47063 		mov	r3, #3840
- 4861 008a 0A93     		str	r3, [sp, #40]
-1396:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
- 4862              		.loc 1 1396 3 is_stmt 1 view .LVU1551
-1396:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
- 4863              		.loc 1 1396 32 is_stmt 0 view .LVU1552
- 4864 008c 0B95     		str	r5, [sp, #44]
-1397:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4865              		.loc 1 1397 3 is_stmt 1 view .LVU1553
-1397:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 4866              		.loc 1 1397 29 is_stmt 0 view .LVU1554
- 4867 008e 0123     		movs	r3, #1
- 4868 0090 0C93     		str	r3, [sp, #48]
-1398:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 4869              		.loc 1 1398 3 is_stmt 1 view .LVU1555
-1398:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 4870              		.loc 1 1398 22 is_stmt 0 view .LVU1556
- 4871 0092 4FF40073 		mov	r3, #512
- 4872 0096 0D93     		str	r3, [sp, #52]
-1399:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4873              		.loc 1 1399 3 is_stmt 1 view .LVU1557
-1399:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 4874              		.loc 1 1399 27 is_stmt 0 view .LVU1558
- 4875 0098 1823     		movs	r3, #24
- 4876 009a 0E93     		str	r3, [sp, #56]
-1400:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4877              		.loc 1 1400 3 is_stmt 1 view .LVU1559
-ARM GAS  /tmp/ccwR4KB7.s 			page 256
+ 5334              	.LVL537:
+1489:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 5335              		.loc 1 1489 3 view .LVU1682
+1489:Src/main.c    ****   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 5336              		.loc 1 1489 36 is_stmt 0 view .LVU1683
+ 5337 007e 0894     		str	r4, [sp, #32]
+1490:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 5338              		.loc 1 1490 3 is_stmt 1 view .LVU1684
+1490:Src/main.c    ****   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 5339              		.loc 1 1490 23 is_stmt 0 view .LVU1685
+ 5340 0080 4FF48273 		mov	r3, #260
+ 5341 0084 0993     		str	r3, [sp, #36]
+1491:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 5342              		.loc 1 1491 3 is_stmt 1 view .LVU1686
+1491:Src/main.c    ****   SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 5343              		.loc 1 1491 28 is_stmt 0 view .LVU1687
+ 5344 0086 4FF47063 		mov	r3, #3840
+ 5345 008a 0A93     		str	r3, [sp, #40]
+1492:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
+ 5346              		.loc 1 1492 3 is_stmt 1 view .LVU1688
+1492:Src/main.c    ****   SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
+ 5347              		.loc 1 1492 32 is_stmt 0 view .LVU1689
+ 5348 008c 0B95     		str	r5, [sp, #44]
+1493:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 5349              		.loc 1 1493 3 is_stmt 1 view .LVU1690
+1493:Src/main.c    ****   SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 5350              		.loc 1 1493 29 is_stmt 0 view .LVU1691
+ 5351 008e 0123     		movs	r3, #1
+ 5352 0090 0C93     		str	r3, [sp, #48]
+1494:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 5353              		.loc 1 1494 3 is_stmt 1 view .LVU1692
+1494:Src/main.c    ****   SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 5354              		.loc 1 1494 22 is_stmt 0 view .LVU1693
+ 5355 0092 4FF40073 		mov	r3, #512
+ 5356 0096 0D93     		str	r3, [sp, #52]
+1495:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 5357              		.loc 1 1495 3 is_stmt 1 view .LVU1694
+1495:Src/main.c    ****   SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 5358              		.loc 1 1495 27 is_stmt 0 view .LVU1695
+ 5359 0098 1823     		movs	r3, #24
+ 5360 009a 0E93     		str	r3, [sp, #56]
+1496:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 5361              		.loc 1 1496 3 is_stmt 1 view .LVU1696
+1496:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 5362              		.loc 1 1496 27 is_stmt 0 view .LVU1697
+ 5363 009c 0F94     		str	r4, [sp, #60]
+1497:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 5364              		.loc 1 1497 3 is_stmt 1 view .LVU1698
+1497:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
+ 5365              		.loc 1 1497 33 is_stmt 0 view .LVU1699
+ 5366 009e 1094     		str	r4, [sp, #64]
+1498:Src/main.c    ****   LL_SPI_Init(SPI6, &SPI_InitStruct);
+ 5367              		.loc 1 1498 3 is_stmt 1 view .LVU1700
+1498:Src/main.c    ****   LL_SPI_Init(SPI6, &SPI_InitStruct);
+ 5368              		.loc 1 1498 26 is_stmt 0 view .LVU1701
+ 5369 00a0 0723     		movs	r3, #7
+ 5370 00a2 1193     		str	r3, [sp, #68]
+ARM GAS  /tmp/ccEQxcUB.s 			page 272
 
 
-1400:Src/main.c    ****   SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 4878              		.loc 1 1400 27 is_stmt 0 view .LVU1560
- 4879 009c 0F94     		str	r4, [sp, #60]
-1401:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4880              		.loc 1 1401 3 is_stmt 1 view .LVU1561
-1401:Src/main.c    ****   SPI_InitStruct.CRCPoly = 7;
- 4881              		.loc 1 1401 33 is_stmt 0 view .LVU1562
- 4882 009e 1094     		str	r4, [sp, #64]
-1402:Src/main.c    ****   LL_SPI_Init(SPI6, &SPI_InitStruct);
- 4883              		.loc 1 1402 3 is_stmt 1 view .LVU1563
-1402:Src/main.c    ****   LL_SPI_Init(SPI6, &SPI_InitStruct);
- 4884              		.loc 1 1402 26 is_stmt 0 view .LVU1564
- 4885 00a0 0723     		movs	r3, #7
- 4886 00a2 1193     		str	r3, [sp, #68]
-1403:Src/main.c    ****   LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
- 4887              		.loc 1 1403 3 is_stmt 1 view .LVU1565
- 4888 00a4 094C     		ldr	r4, .L274+8
- 4889 00a6 08A9     		add	r1, sp, #32
- 4890 00a8 2046     		mov	r0, r4
- 4891 00aa FFF7FEFF 		bl	LL_SPI_Init
- 4892              	.LVL476:
-1404:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI6);
- 4893              		.loc 1 1404 3 view .LVU1566
- 4894              	.LBB467:
- 4895              	.LBI467:
+1499:Src/main.c    ****   LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
+ 5371              		.loc 1 1499 3 is_stmt 1 view .LVU1702
+ 5372 00a4 094C     		ldr	r4, .L299+8
+ 5373 00a6 08A9     		add	r1, sp, #32
+ 5374 00a8 2046     		mov	r0, r4
+ 5375 00aa FFF7FEFF 		bl	LL_SPI_Init
+ 5376              	.LVL538:
+1500:Src/main.c    ****   LL_SPI_DisableNSSPulseMgt(SPI6);
+ 5377              		.loc 1 1500 3 view .LVU1703
+ 5378              	.LBB503:
+ 5379              	.LBI503:
  426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4896              		.loc 4 426 22 view .LVU1567
- 4897              	.LBB468:
+ 5380              		.loc 4 426 22 view .LVU1704
+ 5381              	.LBB504:
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4898              		.loc 4 428 3 view .LVU1568
- 4899 00ae 6368     		ldr	r3, [r4, #4]
- 4900 00b0 23F01003 		bic	r3, r3, #16
- 4901 00b4 6360     		str	r3, [r4, #4]
- 4902              	.LVL477:
+ 5382              		.loc 4 428 3 view .LVU1705
+ 5383 00ae 6368     		ldr	r3, [r4, #4]
+ 5384 00b0 23F01003 		bic	r3, r3, #16
+ 5385 00b4 6360     		str	r3, [r4, #4]
+ 5386              	.LVL539:
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4903              		.loc 4 428 3 is_stmt 0 view .LVU1569
- 4904              	.LBE468:
- 4905              	.LBE467:
-1405:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 2 */
- 4906              		.loc 1 1405 3 is_stmt 1 view .LVU1570
- 4907              	.LBB469:
- 4908              	.LBI469:
+ 5387              		.loc 4 428 3 is_stmt 0 view .LVU1706
+ 5388              	.LBE504:
+ 5389              	.LBE503:
+1501:Src/main.c    ****   /* USER CODE BEGIN SPI6_Init 2 */
+ 5390              		.loc 1 1501 3 is_stmt 1 view .LVU1707
+ 5391              	.LBB505:
+ 5392              	.LBI505:
  874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4909              		.loc 4 874 22 view .LVU1571
- 4910              	.LBB470:
+ 5393              		.loc 4 874 22 view .LVU1708
+ 5394              	.LBB506:
  876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4911              		.loc 4 876 3 view .LVU1572
- 4912 00b6 6368     		ldr	r3, [r4, #4]
- 4913 00b8 23F00803 		bic	r3, r3, #8
- 4914 00bc 6360     		str	r3, [r4, #4]
- 4915              	.LVL478:
+ 5395              		.loc 4 876 3 view .LVU1709
+ 5396 00b6 6368     		ldr	r3, [r4, #4]
+ 5397 00b8 23F00803 		bic	r3, r3, #8
+ 5398 00bc 6360     		str	r3, [r4, #4]
+ 5399              	.LVL540:
  876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4916              		.loc 4 876 3 is_stmt 0 view .LVU1573
- 4917              	.LBE470:
- 4918              	.LBE469:
-1410:Src/main.c    **** 
- 4919              		.loc 1 1410 1 view .LVU1574
-ARM GAS  /tmp/ccwR4KB7.s 			page 257
+ 5400              		.loc 4 876 3 is_stmt 0 view .LVU1710
+ 5401              	.LBE506:
+ 5402              	.LBE505:
+1506:Src/main.c    **** 
+ 5403              		.loc 1 1506 1 view .LVU1711
+ 5404 00be 12B0     		add	sp, sp, #72
+ 5405              	.LCFI51:
+ 5406              		.cfi_def_cfa_offset 24
+ 5407              		@ sp needed
+ 5408 00c0 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 5409              	.L300:
+ 5410              		.align	2
+ 5411              	.L299:
+ 5412 00c4 00380240 		.word	1073887232
+ 5413 00c8 00000240 		.word	1073872896
+ 5414 00cc 00540140 		.word	1073828864
+ 5415              		.cfi_endproc
+ 5416              	.LFE1194:
+ 5418              		.section	.text.MX_TIM2_Init,"ax",%progbits
+ARM GAS  /tmp/ccEQxcUB.s 			page 273
 
 
- 4920 00be 12B0     		add	sp, sp, #72
- 4921              	.LCFI49:
- 4922              		.cfi_def_cfa_offset 24
- 4923              		@ sp needed
- 4924 00c0 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
- 4925              	.L275:
- 4926              		.align	2
- 4927              	.L274:
- 4928 00c4 00380240 		.word	1073887232
- 4929 00c8 00000240 		.word	1073872896
- 4930 00cc 00540140 		.word	1073828864
- 4931              		.cfi_endproc
- 4932              	.LFE1194:
- 4934              		.section	.text.MX_TIM2_Init,"ax",%progbits
- 4935              		.align	1
- 4936              		.syntax unified
- 4937              		.thumb
- 4938              		.thumb_func
- 4940              	MX_TIM2_Init:
- 4941              	.LFB1195:
-1418:Src/main.c    **** 
- 4942              		.loc 1 1418 1 is_stmt 1 view -0
- 4943              		.cfi_startproc
- 4944              		@ args = 0, pretend = 0, frame = 24
- 4945              		@ frame_needed = 0, uses_anonymous_args = 0
- 4946 0000 10B5     		push	{r4, lr}
- 4947              	.LCFI50:
- 4948              		.cfi_def_cfa_offset 8
- 4949              		.cfi_offset 4, -8
- 4950              		.cfi_offset 14, -4
- 4951 0002 86B0     		sub	sp, sp, #24
- 4952              	.LCFI51:
- 4953              		.cfi_def_cfa_offset 32
-1424:Src/main.c    **** 
- 4954              		.loc 1 1424 3 view .LVU1576
-1424:Src/main.c    **** 
- 4955              		.loc 1 1424 22 is_stmt 0 view .LVU1577
- 4956 0004 0024     		movs	r4, #0
- 4957 0006 0194     		str	r4, [sp, #4]
- 4958 0008 0294     		str	r4, [sp, #8]
- 4959 000a 0394     		str	r4, [sp, #12]
- 4960 000c 0494     		str	r4, [sp, #16]
- 4961 000e 0594     		str	r4, [sp, #20]
-1427:Src/main.c    **** 
- 4962              		.loc 1 1427 3 is_stmt 1 view .LVU1578
- 4963              	.LVL479:
- 4964              	.LBB471:
- 4965              	.LBI471:
+ 5419              		.align	1
+ 5420              		.syntax unified
+ 5421              		.thumb
+ 5422              		.thumb_func
+ 5424              	MX_TIM2_Init:
+ 5425              	.LFB1195:
+1514:Src/main.c    **** 
+ 5426              		.loc 1 1514 1 is_stmt 1 view -0
+ 5427              		.cfi_startproc
+ 5428              		@ args = 0, pretend = 0, frame = 24
+ 5429              		@ frame_needed = 0, uses_anonymous_args = 0
+ 5430 0000 10B5     		push	{r4, lr}
+ 5431              	.LCFI52:
+ 5432              		.cfi_def_cfa_offset 8
+ 5433              		.cfi_offset 4, -8
+ 5434              		.cfi_offset 14, -4
+ 5435 0002 86B0     		sub	sp, sp, #24
+ 5436              	.LCFI53:
+ 5437              		.cfi_def_cfa_offset 32
+1520:Src/main.c    **** 
+ 5438              		.loc 1 1520 3 view .LVU1713
+1520:Src/main.c    **** 
+ 5439              		.loc 1 1520 22 is_stmt 0 view .LVU1714
+ 5440 0004 0024     		movs	r4, #0
+ 5441 0006 0194     		str	r4, [sp, #4]
+ 5442 0008 0294     		str	r4, [sp, #8]
+ 5443 000a 0394     		str	r4, [sp, #12]
+ 5444 000c 0494     		str	r4, [sp, #16]
+ 5445 000e 0594     		str	r4, [sp, #20]
+1523:Src/main.c    **** 
+ 5446              		.loc 1 1523 3 is_stmt 1 view .LVU1715
+ 5447              	.LVL541:
+ 5448              	.LBB507:
+ 5449              	.LBI507:
 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 4966              		.loc 3 1071 22 view .LVU1579
- 4967              	.LBB472:
+ 5450              		.loc 3 1071 22 view .LVU1716
+ 5451              	.LBB508:
 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
- 4968              		.loc 3 1073 3 view .LVU1580
+ 5452              		.loc 3 1073 3 view .LVU1717
 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 4969              		.loc 3 1074 3 view .LVU1581
- 4970 0010 1D4B     		ldr	r3, .L278
- 4971 0012 1A6C     		ldr	r2, [r3, #64]
-ARM GAS  /tmp/ccwR4KB7.s 			page 258
+ 5453              		.loc 3 1074 3 view .LVU1718
+ 5454 0010 1D4B     		ldr	r3, .L303
+ 5455 0012 1A6C     		ldr	r2, [r3, #64]
+ 5456 0014 42F00102 		orr	r2, r2, #1
+ 5457 0018 1A64     		str	r2, [r3, #64]
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5458              		.loc 3 1076 3 view .LVU1719
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5459              		.loc 3 1076 12 is_stmt 0 view .LVU1720
+ 5460 001a 1B6C     		ldr	r3, [r3, #64]
+ 5461 001c 03F00103 		and	r3, r3, #1
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5462              		.loc 3 1076 10 view .LVU1721
+ 5463 0020 0093     		str	r3, [sp]
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 5464              		.loc 3 1077 3 is_stmt 1 view .LVU1722
+ 5465 0022 009B     		ldr	r3, [sp]
+ARM GAS  /tmp/ccEQxcUB.s 			page 274
 
 
- 4972 0014 42F00102 		orr	r2, r2, #1
- 4973 0018 1A64     		str	r2, [r3, #64]
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4974              		.loc 3 1076 3 view .LVU1582
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4975              		.loc 3 1076 12 is_stmt 0 view .LVU1583
- 4976 001a 1B6C     		ldr	r3, [r3, #64]
- 4977 001c 03F00103 		and	r3, r3, #1
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 4978              		.loc 3 1076 10 view .LVU1584
- 4979 0020 0093     		str	r3, [sp]
+ 5466              	.LVL542:
 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4980              		.loc 3 1077 3 is_stmt 1 view .LVU1585
- 4981 0022 009B     		ldr	r3, [sp]
- 4982              	.LVL480:
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 4983              		.loc 3 1077 3 is_stmt 0 view .LVU1586
- 4984              	.LBE472:
- 4985              	.LBE471:
-1430:Src/main.c    ****   NVIC_EnableIRQ(TIM2_IRQn);
- 4986              		.loc 1 1430 3 is_stmt 1 view .LVU1587
- 4987              	.LBB473:
- 4988              	.LBI473:
+ 5467              		.loc 3 1077 3 is_stmt 0 view .LVU1723
+ 5468              	.LBE508:
+ 5469              	.LBE507:
+1526:Src/main.c    ****   NVIC_EnableIRQ(TIM2_IRQn);
+ 5470              		.loc 1 1526 3 is_stmt 1 view .LVU1724
+ 5471              	.LBB509:
+ 5472              	.LBI509:
 1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 4989              		.loc 2 1884 26 view .LVU1588
- 4990              	.LBB474:
+ 5473              		.loc 2 1884 26 view .LVU1725
+ 5474              	.LBB510:
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 4991              		.loc 2 1886 3 view .LVU1589
+ 5475              		.loc 2 1886 3 view .LVU1726
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 4992              		.loc 2 1886 26 is_stmt 0 view .LVU1590
- 4993 0024 194B     		ldr	r3, .L278+4
- 4994 0026 D868     		ldr	r0, [r3, #12]
- 4995              	.LBE474:
- 4996              	.LBE473:
-1430:Src/main.c    ****   NVIC_EnableIRQ(TIM2_IRQn);
- 4997              		.loc 1 1430 3 discriminator 1 view .LVU1591
- 4998 0028 2246     		mov	r2, r4
- 4999 002a 2146     		mov	r1, r4
- 5000 002c C0F30220 		ubfx	r0, r0, #8, #3
- 5001 0030 FFF7FEFF 		bl	NVIC_EncodePriority
- 5002              	.LVL481:
- 5003              	.LBB475:
- 5004              	.LBI475:
+ 5476              		.loc 2 1886 26 is_stmt 0 view .LVU1727
+ 5477 0024 194B     		ldr	r3, .L303+4
+ 5478 0026 D868     		ldr	r0, [r3, #12]
+ 5479              	.LBE510:
+ 5480              	.LBE509:
+1526:Src/main.c    ****   NVIC_EnableIRQ(TIM2_IRQn);
+ 5481              		.loc 1 1526 3 discriminator 1 view .LVU1728
+ 5482 0028 2246     		mov	r2, r4
+ 5483 002a 2146     		mov	r1, r4
+ 5484 002c C0F30220 		ubfx	r0, r0, #8, #3
+ 5485 0030 FFF7FEFF 		bl	NVIC_EncodePriority
+ 5486              	.LVL543:
+ 5487              	.LBB511:
+ 5488              	.LBI511:
 2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 5005              		.loc 2 2024 22 is_stmt 1 view .LVU1592
- 5006              	.LBB476:
+ 5489              		.loc 2 2024 22 is_stmt 1 view .LVU1729
+ 5490              	.LBB512:
 2026:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5007              		.loc 2 2026 3 view .LVU1593
+ 5491              		.loc 2 2026 3 view .LVU1730
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5008              		.loc 2 2028 5 view .LVU1594
+ 5492              		.loc 2 2028 5 view .LVU1731
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5009              		.loc 2 2028 49 is_stmt 0 view .LVU1595
- 5010 0034 0001     		lsls	r0, r0, #4
- 5011              	.LVL482:
+ 5493              		.loc 2 2028 49 is_stmt 0 view .LVU1732
+ 5494 0034 0001     		lsls	r0, r0, #4
+ 5495              	.LVL544:
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5012              		.loc 2 2028 49 view .LVU1596
- 5013 0036 C0B2     		uxtb	r0, r0
-ARM GAS  /tmp/ccwR4KB7.s 			page 259
-
-
+ 5496              		.loc 2 2028 49 view .LVU1733
+ 5497 0036 C0B2     		uxtb	r0, r0
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5014              		.loc 2 2028 47 view .LVU1597
- 5015 0038 154B     		ldr	r3, .L278+8
- 5016 003a 83F81C03 		strb	r0, [r3, #796]
- 5017              	.LVL483:
+ 5498              		.loc 2 2028 47 view .LVU1734
+ 5499 0038 154B     		ldr	r3, .L303+8
+ 5500 003a 83F81C03 		strb	r0, [r3, #796]
+ 5501              	.LVL545:
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5018              		.loc 2 2028 47 view .LVU1598
- 5019              	.LBE476:
- 5020              	.LBE475:
-1431:Src/main.c    **** 
- 5021              		.loc 1 1431 3 is_stmt 1 view .LVU1599
- 5022              	.LBB477:
- 5023              	.LBI477:
+ 5502              		.loc 2 2028 47 view .LVU1735
+ 5503              	.LBE512:
+ 5504              	.LBE511:
+1527:Src/main.c    **** 
+ 5505              		.loc 1 1527 3 is_stmt 1 view .LVU1736
+ 5506              	.LBB513:
+ 5507              	.LBI513:
 1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 5024              		.loc 2 1896 22 view .LVU1600
- 5025              	.LBB478:
+ARM GAS  /tmp/ccEQxcUB.s 			page 275
+
+
+ 5508              		.loc 2 1896 22 view .LVU1737
+ 5509              	.LBB514:
 1898:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5026              		.loc 2 1898 3 view .LVU1601
+ 5510              		.loc 2 1898 3 view .LVU1738
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5027              		.loc 2 1900 5 view .LVU1602
+ 5511              		.loc 2 1900 5 view .LVU1739
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5028              		.loc 2 1900 43 is_stmt 0 view .LVU1603
- 5029 003e 4FF08052 		mov	r2, #268435456
- 5030 0042 1A60     		str	r2, [r3]
- 5031              	.LVL484:
+ 5512              		.loc 2 1900 43 is_stmt 0 view .LVU1740
+ 5513 003e 4FF08052 		mov	r2, #268435456
+ 5514 0042 1A60     		str	r2, [r3]
+ 5515              	.LVL546:
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5032              		.loc 2 1900 43 view .LVU1604
- 5033              	.LBE478:
- 5034              	.LBE477:
-1436:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5035              		.loc 1 1436 3 is_stmt 1 view .LVU1605
-1436:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5036              		.loc 1 1436 28 is_stmt 0 view .LVU1606
- 5037 0044 4FF47A73 		mov	r3, #1000
- 5038 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
-1437:Src/main.c    ****   TIM_InitStruct.Autoreload = 840000;
- 5039              		.loc 1 1437 3 is_stmt 1 view .LVU1607
-1437:Src/main.c    ****   TIM_InitStruct.Autoreload = 840000;
- 5040              		.loc 1 1437 30 is_stmt 0 view .LVU1608
- 5041 004c 0294     		str	r4, [sp, #8]
-1438:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 5042              		.loc 1 1438 3 is_stmt 1 view .LVU1609
-1438:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 5043              		.loc 1 1438 29 is_stmt 0 view .LVU1610
- 5044 004e 114B     		ldr	r3, .L278+12
- 5045 0050 0393     		str	r3, [sp, #12]
-1439:Src/main.c    ****   LL_TIM_Init(TIM2, &TIM_InitStruct);
- 5046              		.loc 1 1439 3 is_stmt 1 view .LVU1611
-1439:Src/main.c    ****   LL_TIM_Init(TIM2, &TIM_InitStruct);
- 5047              		.loc 1 1439 32 is_stmt 0 view .LVU1612
- 5048 0052 0494     		str	r4, [sp, #16]
-1440:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM2);
- 5049              		.loc 1 1440 3 is_stmt 1 view .LVU1613
- 5050 0054 01A9     		add	r1, sp, #4
- 5051 0056 4FF08040 		mov	r0, #1073741824
- 5052 005a FFF7FEFF 		bl	LL_TIM_Init
- 5053              	.LVL485:
-ARM GAS  /tmp/ccwR4KB7.s 			page 260
-
-
-1441:Src/main.c    ****   LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
- 5054              		.loc 1 1441 3 view .LVU1614
- 5055              	.LBB479:
- 5056              	.LBI479:
- 5057              		.file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
+ 5516              		.loc 2 1900 43 view .LVU1741
+ 5517              	.LBE514:
+ 5518              	.LBE513:
+1532:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 5519              		.loc 1 1532 3 is_stmt 1 view .LVU1742
+1532:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 5520              		.loc 1 1532 28 is_stmt 0 view .LVU1743
+ 5521 0044 4FF47A73 		mov	r3, #1000
+ 5522 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
+1533:Src/main.c    ****   TIM_InitStruct.Autoreload = 840000;
+ 5523              		.loc 1 1533 3 is_stmt 1 view .LVU1744
+1533:Src/main.c    ****   TIM_InitStruct.Autoreload = 840000;
+ 5524              		.loc 1 1533 30 is_stmt 0 view .LVU1745
+ 5525 004c 0294     		str	r4, [sp, #8]
+1534:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 5526              		.loc 1 1534 3 is_stmt 1 view .LVU1746
+1534:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 5527              		.loc 1 1534 29 is_stmt 0 view .LVU1747
+ 5528 004e 114B     		ldr	r3, .L303+12
+ 5529 0050 0393     		str	r3, [sp, #12]
+1535:Src/main.c    ****   LL_TIM_Init(TIM2, &TIM_InitStruct);
+ 5530              		.loc 1 1535 3 is_stmt 1 view .LVU1748
+1535:Src/main.c    ****   LL_TIM_Init(TIM2, &TIM_InitStruct);
+ 5531              		.loc 1 1535 32 is_stmt 0 view .LVU1749
+ 5532 0052 0494     		str	r4, [sp, #16]
+1536:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM2);
+ 5533              		.loc 1 1536 3 is_stmt 1 view .LVU1750
+ 5534 0054 01A9     		add	r1, sp, #4
+ 5535 0056 4FF08040 		mov	r0, #1073741824
+ 5536 005a FFF7FEFF 		bl	LL_TIM_Init
+ 5537              	.LVL547:
+1537:Src/main.c    ****   LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
+ 5538              		.loc 1 1537 3 view .LVU1751
+ 5539              	.LBB515:
+ 5540              	.LBI515:
+ 5541              		.file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
    1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
    2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   ******************************************************************************
    3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @file    stm32f7xx_ll_tim.h
@@ -15555,6 +16498,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
    7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @attention
    8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *
    9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * Copyright (c) 2017 STMicroelectronics.
+ARM GAS  /tmp/ccEQxcUB.s 			page 276
+
+
   10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * All rights reserved.
   11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *
   12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * This software is licensed under terms that can be found in the LICENSE file
@@ -15598,9 +16544,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x00U,   /* 3: TIMx_CH2N */
   51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x04U,   /* 4: TIMx_CH3  */
   52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x04U,   /* 5: TIMx_CH3N */
-ARM GAS  /tmp/ccwR4KB7.s 			page 261
-
-
   53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x04U,   /* 6: TIMx_CH4  */
   54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x3CU,   /* 7: TIMx_CH5  */
   55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x3CU    /* 8: TIMx_CH6  */
@@ -15615,6 +16558,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0U,            /* 4: OC3M, OC3FE, OC3PE */
   65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0U,            /* 5: - NA */
   66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   8U,            /* 6: OC4M, OC4FE, OC4PE */
+ARM GAS  /tmp/ccEQxcUB.s 			page 277
+
+
   67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0U,            /* 7: OC5M, OC5FE, OC5PE */
   68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   8U             /* 8: OC6M, OC6FE, OC6PE */
   69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
@@ -15658,9 +16604,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   10U            /* 8: OIS6 */
  108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
  109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 262
-
-
  110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
  111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -15675,6 +16618,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Generic bit definitions for TIMx_AF1 register */
  123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_AF1_BKINP        TIM1_AF1_BKINP       /*!< BRK BKIN input polarity */
+ARM GAS  /tmp/ccEQxcUB.s 			page 278
+
+
  124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */
  125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Remap mask definitions */
@@ -15718,9 +16664,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
  165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval none
  166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 263
-
-
  167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
  168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
  169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****    ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
@@ -15735,6 +16678,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __TIMCLK__ timer input clock frequency (in Hz).
  179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __CKD__ This parameter can be one of the following values:
  180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+ARM GAS  /tmp/ccEQxcUB.s 			page 279
+
+
  181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
  182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
  183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval none
@@ -15778,9 +16724,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    be a number between 0x0000 and 0xFFFFFFFF.
  222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    This feature can be modified afterwards using unitary function
-ARM GAS  /tmp/ccwR4KB7.s 			page 264
-
-
  224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    @ref LL_TIM_SetAutoReload().*/
  225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t ClockDivision;     /*!< Specifies the clock division.
@@ -15795,6 +16738,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    This means in PWM mode that (N+1) corresponds to:
  236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       - the number of PWM periods in edge-aligned mode
  237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       - the number of half PWM period in center-aligned mode
+ARM GAS  /tmp/ccEQxcUB.s 			page 280
+
+
  238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    GP timers: this parameter must be a number between Min_Data = 0x
  239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    Max_Data = 0xFF.
  240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    Advanced timers: this parameter must be a number between Min_Dat
@@ -15838,9 +16784,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                This feature can be modified afterwards using unitary function
  280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                @ref LL_TIM_OC_SetPolarity().*/
-ARM GAS  /tmp/ccwR4KB7.s 			page 265
-
-
  281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t OCNPolarity;   /*!< Specifies the complementary output polarity.
  283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
@@ -15855,6 +16798,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                This feature can be modified afterwards using unitary function
  293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                @ref LL_TIM_OC_SetIdleState().*/
  294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 281
+
+
  295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t OCNIdleState;  /*!< Specifies the TIM Output Compare pin state during Idle state.
  296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
  297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -15898,9 +16844,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  TIM Encoder interface configuration structure definition.
  337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 266
-
-
  338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
  339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
  340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t EncoderMode;     /*!< Specifies the encoder resolution (x2 or x4).
@@ -15915,6 +16858,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                  This feature can be modified afterwards using unitary function
  350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                  @ref LL_TIM_IC_SetPolarity().*/
  351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 282
+
+
  352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t IC1ActiveInput;  /*!< Specifies the TI1 input source
  353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                  This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
  354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -15958,9 +16904,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                  @ref LL_TIM_IC_SetFilter().*/
  393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_ENCODER_InitTypeDef;
-ARM GAS  /tmp/ccwR4KB7.s 			page 267
-
-
  395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  TIM Hall sensor interface configuration structure definition.
@@ -15975,6 +16918,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                     @ref LL_TIM_IC_SetPolarity().*/
  407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t IC1Prescaler;       /*!< Specifies the TI1 input prescaler value.
+ARM GAS  /tmp/ccEQxcUB.s 			page 283
+
+
  409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                     Prescaler must be set to get a maximum counter period longer th
  410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                     time interval between 2 consecutive changes on the Hall inputs.
  411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                     This parameter can be a value of @ref TIM_LL_EC_ICPSC.
@@ -16018,9 +16964,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       This feature can be modified afterwards using unitary functio
  450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @ref LL_TIM_SetOffStates()
  451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 268
-
-
  452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @note This bit-field cannot be modified as long as LOCK level
  453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       programmed. */
  454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -16035,6 +16978,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       This parameter can be a number between Min_Data = 0x00 and Ma
  464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       This feature can be modified afterwards using unitary functio
+ARM GAS  /tmp/ccEQxcUB.s 			page 284
+
+
  466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @ref LL_TIM_OC_SetDeadTime()
  467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @note This bit-field can not be modified as long as LOCK leve
@@ -16078,9 +17024,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t Break2Polarity;        /*!< Specifies the TIM Break2 Input pin polarity.
  508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       This parameter can be a value of @ref TIM_LL_EC_BREAK2_POLARI
-ARM GAS  /tmp/ccwR4KB7.s 			page 269
-
-
  509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       This feature can be modified afterwards using unitary functio
  511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @ref LL_TIM_ConfigBRK2()
@@ -16095,6 +17038,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @ref LL_TIM_ConfigBRK2()
  521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @note This bit-field can not be modified as long as LOCK leve
+ARM GAS  /tmp/ccEQxcUB.s 			page 285
+
+
  523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       programmed. */
  524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t AutomaticOutput;      /*!< Specifies whether the TIM Automatic Output feature is enabled
@@ -16138,9 +17084,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4OF                        TIM_SR_CC4OF         /*!< Capture/Compare 4 overcapt
  564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_SBIF                         TIM_SR_SBIF          /*!< System Break interrupt fla
  565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 270
-
-
  566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
  567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -16155,6 +17098,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable
+ARM GAS  /tmp/ccEQxcUB.s 			page 286
+
+
  580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
  581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_DISABLE            0x00000000U              /*!< Break2 function disabled */
@@ -16198,9 +17144,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
  621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 271
-
-
  623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
  624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
  625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -16215,6 +17158,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_UP                  0x00000000U          /*!< Counter used as upcounter 
  636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_DOWN                TIM_CR1_DIR          /*!< Counter used as downcounte
+ARM GAS  /tmp/ccEQxcUB.s 			page 287
+
+
  637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_DOWN         TIM_CR1_CMS_0        /*!< The counter counts up and 
  638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP           TIM_CR1_CMS_1        /*!< The counter counts up and 
  639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN      TIM_CR1_CMS          /*!< The counter counts up and 
@@ -16258,9 +17204,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
  679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 272
-
-
  680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level
  682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
@@ -16275,6 +17218,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CHANNEL Channel
  693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
+ARM GAS  /tmp/ccEQxcUB.s 			page 288
+
+
  694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1                     TIM_CCER_CC1E     /*!< Timer input/output channel 1 
  696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1N                    TIM_CCER_CC1NE    /*!< Timer complementary output ch
@@ -16318,9 +17264,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_TOGGLE                   (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)               
  735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_INACTIVE          TIM_CCMR1_OC1M_2                                    
  736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_ACTIVE            (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)               
-ARM GAS  /tmp/ccwR4KB7.s 			page 273
-
-
  737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM1                     (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)               
  738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM2                     (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1
  739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM1              TIM_CCMR1_OC1M_3                                    
@@ -16335,6 +17278,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
  750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
+ARM GAS  /tmp/ccEQxcUB.s 			page 289
+
+
  751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_HIGH                 0x00000000U                 /*!< OCxactive high*/
  753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_LOW                  TIM_CCER_CC1P               /*!< OCxactive low*/
@@ -16378,9 +17324,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV1                      0x00000000U                    /*!< No prescaler, ca
  792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV2                      (TIM_CCMR1_IC1PSC_0 << 16U)    /*!< Capture is done 
  793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV4                      (TIM_CCMR1_IC1PSC_1 << 16U)    /*!< Capture is done 
-ARM GAS  /tmp/ccwR4KB7.s 			page 274
-
-
  794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV8                      (TIM_CCMR1_IC1PSC << 16U)      /*!< Capture is done 
  795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
@@ -16395,6 +17338,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N8              ((TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U)      
  806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV2_N6              (TIM_CCMR1_IC1F_2 << 16U)                           
  807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV2_N8              ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U)      
+ARM GAS  /tmp/ccEQxcUB.s 			page 290
+
+
  808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N6              ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U)      
  809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N8              ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC
  810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV8_N6              (TIM_CCMR1_IC1F_3 << 16U)                           
@@ -16438,9 +17384,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
  850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 275
-
-
  851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO Trigger Output
  853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
@@ -16455,6 +17398,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC4REF                     (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!<
  863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
+ARM GAS  /tmp/ccEQxcUB.s 			page 291
+
+
  865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO2 Trigger Output 2
@@ -16498,9 +17444,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR0                         0x00000000U                                         
  906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR1                         TIM_SMCR_TS_0                                       
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR2                         TIM_SMCR_TS_1                                       
-ARM GAS  /tmp/ccwR4KB7.s 			page 276
-
-
  908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR3                         (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)                     
  909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1F_ED                      TIM_SMCR_TS_2                                       
  910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1FP1                       (TIM_SMCR_TS_2 | TIM_SMCR_TS_0)                     
@@ -16515,6 +17458,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_POLARITY_NONINVERTED        0x00000000U             /*!< ETR is non-inverted, ac
  921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_POLARITY_INVERTED           TIM_SMCR_ETP            /*!< ETR is inverted, active
+ARM GAS  /tmp/ccEQxcUB.s 			page 292
+
+
  922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
  924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -16558,9 +17504,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
  963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_POLARITY_LOW              0x00000000U               /*!< Break input BRK is ac
-ARM GAS  /tmp/ccwR4KB7.s 			page 277
-
-
  965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_POLARITY_HIGH             TIM_BDTR_BKP              /*!< Break input BRK is ac
  966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
  967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
@@ -16575,6 +17518,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N8           0x00030000U   /*!< fSAMPLING=fCK_INT, N=8 */
  977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV2_N6           0x00040000U   /*!< fSAMPLING=fDTS/2, N=6 */
  978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV2_N8           0x00050000U   /*!< fSAMPLING=fDTS/2, N=8 */
+ARM GAS  /tmp/ccEQxcUB.s 			page 293
+
+
  979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N6           0x00060000U   /*!< fSAMPLING=fDTS/4, N=6 */
  980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N8           0x00070000U   /*!< fSAMPLING=fDTS/4, N=8 */
  981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV8_N6           0x00080000U   /*!< fSAMPLING=fDTS/8, N=6 */
@@ -16618,9 +17564,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N6         0x00E00000U   /*!< fSAMPLING=fDTS/32, N=6 */
 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N8         0x00F00000U   /*!< fSAMPLING=fDTS/32, N=8 */
 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 278
-
-
 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -16635,6 +17578,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OSSR OSSR
 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
+ARM GAS  /tmp/ccEQxcUB.s 			page 294
+
+
 1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_DISABLE                    0x00000000U             /*!< When inactive, OCx/OCxN
 1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_ENABLE                     TIM_BDTR_OSSR           /*!< When inactive, OC/OCN o
@@ -16678,9 +17624,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR2           TIM_DCR_DBA_0                                       
 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_SMCR          TIM_DCR_DBA_1                                       
 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_DIER          (TIM_DCR_DBA_1 |  TIM_DCR_DBA_0)                    
-ARM GAS  /tmp/ccwR4KB7.s 			page 279
-
-
 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_SR            TIM_DCR_DBA_2                                       
 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_EGR           (TIM_DCR_DBA_2 | TIM_DCR_DBA_0)                     
 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR1         (TIM_DCR_DBA_2 | TIM_DCR_DBA_1)                     
@@ -16695,6 +17638,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR3          (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM
 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR4          TIM_DCR_DBA_4                                       
 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_BDTR          (TIM_DCR_DBA_4 | TIM_DCR_DBA_0)                     
+ARM GAS  /tmp/ccEQxcUB.s 			page 295
+
+
 1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_OR            (TIM_DCR_DBA_4 | TIM_DCR_DBA_2)                     
 1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR3         (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0)     
 1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR5          (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1)     
@@ -16738,9 +17684,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO    TIM2_OR_RMP_MASK                           /*!< TIM2_ITR1
 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_ETH_PTP      (TIM2_OR_ITR1_RMP_0 | TIM2_OR_RMP_MASK)    /*!< TIM2_ITR1
-ARM GAS  /tmp/ccwR4KB7.s 			page 280
-
-
 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF   (TIM2_OR_ITR1_RMP_1 | TIM2_OR_RMP_MASK)    /*!< TIM2_ITR1
 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF   (TIM2_OR_ITR1_RMP | TIM2_OR_RMP_MASK)      /*!< TIM2_ITR1
 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -16755,6 +17698,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_LSE         (TIM5_OR_TI4_RMP_1 | TIM5_OR_RMP_MASK)       /*!< TIM5 chan
 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_RTC         (TIM5_OR_TI4_RMP | TIM5_OR_RMP_MASK)         /*!< TIM5 chan
 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 296
+
+
 1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
 1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -16798,9 +17744,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Register value
 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
-ARM GAS  /tmp/ccwR4KB7.s 			page 281
-
-
 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -16815,6 +17758,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GETFLAG_UIFCPY(__CNT__)  \
 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)
+ARM GAS  /tmp/ccEQxcUB.s 			page 297
+
+
 1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested de
@@ -16858,9 +17804,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __PSC__ prescaler
 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __FREQ__ output signal frequency (in Hz)
 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval  Auto-reload value  (between Min_Data=0 and Max_Data=65535)
-ARM GAS  /tmp/ccwR4KB7.s 			page 282
-
-
 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))
@@ -16875,6 +17818,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Compare value  (between Min_Data=0 and Max_Data=65535)
 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__)  \
+ARM GAS  /tmp/ccEQxcUB.s 			page 298
+
+
 1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
 1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****               / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
 1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -16918,9 +17864,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration
 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 283
-
-
 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Enable timer counter.
 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR1          CEN           LL_TIM_EnableCounter
@@ -16935,6 +17878,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Disable timer counter.
 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR1          CEN           LL_TIM_DisableCounter
+ARM GAS  /tmp/ccEQxcUB.s 			page 299
+
+
 1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -16978,9 +17924,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicates whether update event generation is enabled.
-ARM GAS  /tmp/ccwR4KB7.s 			page 284
-
-
 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR1          UDIS          LL_TIM_IsEnabledUpdateEvent
 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Inverted state of bit (0 or 1).
@@ -16995,6 +17938,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       generate an update interrupt or DMA request if enabled:
 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *        - Counter overflow/underflow
+ARM GAS  /tmp/ccEQxcUB.s 			page 300
+
+
 1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *        - Setting the UG bit
 1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *        - Update generation through the slave mode controller
 1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
@@ -17038,9 +17984,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 285
-
-
 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Get actual one pulse mode.
 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR1          OPM           LL_TIM_GetOnePulseMode
@@ -17055,6 +17998,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 301
+
+
 1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the timer counter counting mode.
 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       check whether or not the counter mode selection feature is supported
@@ -17098,9 +18044,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t counter_mode;
 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));
-ARM GAS  /tmp/ccwR4KB7.s 			page 286
-
-
 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   if (counter_mode == 0U)
 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   {
@@ -17115,6 +18058,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR1          ARPE          LL_TIM_EnableARRPreload
 1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 302
+
+
 1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
 1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -17128,23 +18074,23 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
- 5058              		.loc 5 1504 22 view .LVU1615
- 5059              	.LBB480:
+ 5542              		.loc 5 1504 22 view .LVU1752
+ 5543              	.LBB516:
 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
- 5060              		.loc 5 1506 3 view .LVU1616
- 5061 005e 4FF08043 		mov	r3, #1073741824
- 5062 0062 1A68     		ldr	r2, [r3]
- 5063 0064 22F08002 		bic	r2, r2, #128
- 5064 0068 1A60     		str	r2, [r3]
- 5065              	.LVL486:
- 5066              		.loc 5 1506 3 is_stmt 0 view .LVU1617
- 5067              	.LBE480:
- 5068              	.LBE479:
-1442:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
- 5069              		.loc 1 1442 3 is_stmt 1 view .LVU1618
- 5070              	.LBB481:
- 5071              	.LBI481:
+ 5544              		.loc 5 1506 3 view .LVU1753
+ 5545 005e 4FF08043 		mov	r3, #1073741824
+ 5546 0062 1A68     		ldr	r2, [r3]
+ 5547 0064 22F08002 		bic	r2, r2, #128
+ 5548 0068 1A60     		str	r2, [r3]
+ 5549              	.LVL548:
+ 5550              		.loc 5 1506 3 is_stmt 0 view .LVU1754
+ 5551              	.LBE516:
+ 5552              	.LBE515:
+1538:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
+ 5553              		.loc 1 1538 3 is_stmt 1 view .LVU1755
+ 5554              	.LBB517:
+ 5555              	.LBI517:
 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -17158,9 +18104,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 287
-
-
 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the division ratio between the timer clock  and the sampling clock used by the dead
 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         (when supported) and the digital filters.
@@ -17175,6 +18118,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 303
+
+
 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
@@ -17218,9 +18164,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance supports a 32 bits counter.
 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CNT          CNT           LL_TIM_GetCounter
 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 288
-
-
 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)
@@ -17235,6 +18178,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Returned value can be one of the following values:
 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_COUNTERDIRECTION_UP
 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
+ARM GAS  /tmp/ccEQxcUB.s 			page 304
+
+
 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)
 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -17278,9 +18224,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  AutoReload between Min_Data=0 and Max_Data=65535
 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
-ARM GAS  /tmp/ccwR4KB7.s 			page 289
-
-
 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -17295,6 +18238,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Auto-reload value
 1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 305
+
+
 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)
 1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (uint32_t)(READ_REG(TIMx->ARR));
@@ -17338,9 +18284,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)
 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 290
-
-
 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -17355,6 +18298,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 306
+
+
 1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicate whether update interrupt flag (UIF) copy is set.
 1707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  Counter Counter value
@@ -17398,9 +18344,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 291
-
-
 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -17415,6 +18358,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);
 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 307
+
+
 1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
 1764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
@@ -17458,9 +18404,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 292
-
-
 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the lock level to freeze the
 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         configuration of several capture/compare parameters.
@@ -17475,6 +18418,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_LOCKLEVEL_3
 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 308
+
+
 1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)
 1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 1821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
@@ -17518,9 +18464,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC3E          LL_TIM_CC_DisableChannel\n
 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC3NE         LL_TIM_CC_DisableChannel\n
 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC4E          LL_TIM_CC_DisableChannel\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 293
-
-
 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC5E          LL_TIM_CC_DisableChannel\n
 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC6E          LL_TIM_CC_DisableChannel
 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
@@ -17535,6 +18478,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH5
 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
 1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 309
+
+
 1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
 1878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -17578,9 +18524,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 294
-
-
 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Configure an output channel.
 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCMR1        CC1S          LL_TIM_OC_ConfigOutput\n
 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR1        CC2S          LL_TIM_OC_ConfigOutput\n
@@ -17595,6 +18538,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC5P          LL_TIM_OC_ConfigOutput\n
 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC6P          LL_TIM_OC_ConfigOutput\n
 1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CR2          OIS1          LL_TIM_OC_ConfigOutput\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 310
+
+
 1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CR2          OIS2          LL_TIM_OC_ConfigOutput\n
 1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CR2          OIS3          LL_TIM_OC_ConfigOutput\n
 1935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CR2          OIS4          LL_TIM_OC_ConfigOutput\n
@@ -17638,9 +18584,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1
 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
-ARM GAS  /tmp/ccwR4KB7.s 			page 295
-
-
 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH5
 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
@@ -17655,6 +18598,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_PWM2
 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
 1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
+ARM GAS  /tmp/ccEQxcUB.s 			page 311
+
+
 1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
 1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
 1992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
@@ -17698,9 +18644,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
-ARM GAS  /tmp/ccwR4KB7.s 			page 296
-
-
 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)
@@ -17715,6 +18658,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCER         CC1P          LL_TIM_OC_SetPolarity\n
 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC1NP         LL_TIM_OC_SetPolarity\n
 2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2P          LL_TIM_OC_SetPolarity\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 312
+
+
 2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2NP         LL_TIM_OC_SetPolarity\n
 2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC3P          LL_TIM_OC_SetPolarity\n
 2049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC3NP         LL_TIM_OC_SetPolarity\n
@@ -17758,9 +18704,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  Channel This parameter can be one of the following values:
 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1
 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1N
-ARM GAS  /tmp/ccwR4KB7.s 			page 297
-
-
 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2N
 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
@@ -17775,6 +18718,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+ARM GAS  /tmp/ccEQxcUB.s 			page 313
+
+
 2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChan
 2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -17818,9 +18764,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Get the IDLE state of an output channel
 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR2         OIS1          LL_TIM_OC_GetIdleState\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 298
-
-
 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CR2         OIS2N         LL_TIM_OC_GetIdleState\n
 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CR2         OIS2          LL_TIM_OC_GetIdleState\n
 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CR2         OIS2N         LL_TIM_OC_GetIdleState\n
@@ -17835,6 +18778,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1N
 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2N
+ARM GAS  /tmp/ccEQxcUB.s 			page 314
+
+
 2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
 2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3N
 2163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
@@ -17878,9 +18824,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 299
-
-
 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Disable fast mode for the output channel.
 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCMR1        OC1FE          LL_TIM_OC_DisableFast\n
 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR1        OC2FE          LL_TIM_OC_DisableFast\n
@@ -17895,6 +18838,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
 2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH5
+ARM GAS  /tmp/ccEQxcUB.s 			page 315
+
+
 2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
 2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 2220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -17938,9 +18884,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR1        OC2PE          LL_TIM_OC_EnablePreload\n
 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR2        OC3PE          LL_TIM_OC_EnablePreload\n
 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR2        OC4PE          LL_TIM_OC_EnablePreload\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 300
-
-
 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR3        OC5PE          LL_TIM_OC_EnablePreload\n
 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR3        OC6PE          LL_TIM_OC_EnablePreload
 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
@@ -17955,6 +18898,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
 2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 316
+
+
 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
@@ -17998,9 +18944,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1
 2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
-ARM GAS  /tmp/ccwR4KB7.s 			page 301
-
-
 2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH5
 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
@@ -18015,6 +18958,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 317
+
+
 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Enable clearing the output channel on an external event.
 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note This function can only be used in Output compare and PWM modes. It does not work in Force
 2334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
@@ -18058,9 +19004,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
 2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
-ARM GAS  /tmp/ccwR4KB7.s 			page 302
-
-
 2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH5
 2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
 2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
@@ -18075,6 +19018,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicates clearing the output channel on an external event is enabled for the output ch
 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note This function enables clearing the output channel on an external event.
+ARM GAS  /tmp/ccEQxcUB.s 			page 318
+
+
 2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note This function can only be used in Output compare and PWM modes. It does not work in Force
 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
 2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       or not a timer instance can clear the OCxREF signal on an external event.
@@ -18118,9 +19064,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
 2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 303
-
-
 2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set compare value for output channel 1 (TIMx_CCR1).
 2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
@@ -18135,6 +19078,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 319
+
+
 2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   WRITE_REG(TIMx->CCR1, CompareValue);
 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -18178,9 +19124,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
 2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance supports a 32 bits counter.
 2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
-ARM GAS  /tmp/ccwR4KB7.s 			page 304
-
-
 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       output channel 4 is supported by a timer instance.
 2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCR4         CCR4          LL_TIM_OC_SetCompareCH4
 2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
@@ -18195,6 +19138,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set compare value for output channel 5 (TIMx_CCR5).
 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
+ARM GAS  /tmp/ccEQxcUB.s 			page 320
+
+
 2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       output channel 5 is supported by a timer instance.
 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCR5         CCR5          LL_TIM_OC_SetCompareCH5
 2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
@@ -18238,9 +19184,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Get compare value (TIMx_CCR2) set for  output channel 2.
-ARM GAS  /tmp/ccwR4KB7.s 			page 305
-
-
 2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
 2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
 2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance supports a 32 bits counter.
@@ -18255,6 +19198,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (uint32_t)(READ_REG(TIMx->CCR2));
 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 321
+
+
 2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Get compare value (TIMx_CCR3) set for  output channel 3.
 2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
@@ -18298,9 +19244,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)
 2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));
-ARM GAS  /tmp/ccwR4KB7.s 			page 306
-
-
 2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -18315,6 +19258,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (uint32_t)(READ_REG(TIMx->CCR6));
 2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 322
+
+
 2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Select on which reference signal the OC5REF is combined to.
@@ -18358,9 +19304,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR2        IC4PSC        LL_TIM_IC_Config\n
 2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR2        IC4F          LL_TIM_IC_Config\n
 2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC1P          LL_TIM_IC_Config\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 307
-
-
 2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC1NP         LL_TIM_IC_Config\n
 2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2P          LL_TIM_IC_Config\n
 2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2NP         LL_TIM_IC_Config\n
@@ -18375,6 +19318,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
 2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  Configuration This parameter must be a combination of all the following values:
+ARM GAS  /tmp/ccEQxcUB.s 			page 323
+
+
 2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_
 2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
 2676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
@@ -18418,9 +19364,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 308
-
-
 2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Get the current active input.
 2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCMR1        CC1S          LL_TIM_IC_GetActiveInput\n
 2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR1        CC2S          LL_TIM_IC_GetActiveInput\n
@@ -18435,6 +19378,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Returned value can be one of the following values:
 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
 2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
+ARM GAS  /tmp/ccEQxcUB.s 			page 324
+
+
 2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_ACTIVEINPUT_TRC
 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)
@@ -18478,9 +19424,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR2        IC4PSC        LL_TIM_IC_GetPrescaler
 2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  Channel This parameter can be one of the following values:
-ARM GAS  /tmp/ccwR4KB7.s 			page 309
-
-
 2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1
 2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
@@ -18495,6 +19438,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
 2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+ARM GAS  /tmp/ccEQxcUB.s 			page 325
+
+
 2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iCha
 2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -18538,9 +19484,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Get the input filter duration.
-ARM GAS  /tmp/ccwR4KB7.s 			page 310
-
-
 2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCMR1        IC1F          LL_TIM_IC_GetFilter\n
 2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR1        IC2F          LL_TIM_IC_GetFilter\n
 2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCMR2        IC3F          LL_TIM_IC_GetFilter\n
@@ -18555,6 +19498,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV1
 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
 2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
+ARM GAS  /tmp/ccEQxcUB.s 			page 326
+
+
 2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
 2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
 2847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
@@ -18598,9 +19544,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
 2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 311
-
-
 2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity
 2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
@@ -18615,6 +19558,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2P          LL_TIM_IC_GetPolarity\n
 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2NP         LL_TIM_IC_GetPolarity\n
 2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC3P          LL_TIM_IC_GetPolarity\n
+ARM GAS  /tmp/ccEQxcUB.s 			page 327
+
+
 2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC3NP         LL_TIM_IC_GetPolarity\n
 2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC4P          LL_TIM_IC_GetPolarity\n
 2904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC4NP         LL_TIM_IC_GetPolarity
@@ -18658,9 +19604,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
-ARM GAS  /tmp/ccwR4KB7.s 			page 312
-
-
 2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
 2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -18675,6 +19618,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
 2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 328
+
+
 2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
 2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -18718,9 +19664,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
 3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       input channel 3 is supported by a timer instance.
 3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCR3         CCR3          LL_TIM_IC_GetCaptureCH3
-ARM GAS  /tmp/ccwR4KB7.s 			page 313
-
-
 3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
 3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -18735,6 +19678,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance supports a 32 bits counter.
 3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
+ARM GAS  /tmp/ccEQxcUB.s 			page 329
+
+
 3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       input channel 4 is supported by a timer instance.
 3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCR4         CCR4          LL_TIM_IC_GetCaptureCH4
 3018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
@@ -18778,9 +19724,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
 3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 314
-
-
 3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicate whether external clock mode 2 is enabled.
@@ -18795,6 +19738,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 330
+
+
 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the clock source of the counter clock.
 3075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note when selected clock source is external clock mode 1, the timer input
@@ -18815,32 +19761,29 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
- 5072              		.loc 5 3092 22 view .LVU1619
- 5073              	.LBB482:
+ 5556              		.loc 5 3092 22 view .LVU1756
+ 5557              	.LBB518:
 3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
- 5074              		.loc 5 3094 3 view .LVU1620
- 5075 006a 9968     		ldr	r1, [r3, #8]
- 5076 006c 0A4A     		ldr	r2, .L278+16
- 5077 006e 0A40     		ands	r2, r2, r1
- 5078 0070 9A60     		str	r2, [r3, #8]
- 5079              	.LVL487:
- 5080              		.loc 5 3094 3 is_stmt 0 view .LVU1621
- 5081              	.LBE482:
- 5082              	.LBE481:
-1443:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM2);
- 5083              		.loc 1 1443 3 is_stmt 1 view .LVU1622
- 5084              	.LBB483:
- 5085              	.LBI483:
+ 5558              		.loc 5 3094 3 view .LVU1757
+ 5559 006a 9968     		ldr	r1, [r3, #8]
+ 5560 006c 0A4A     		ldr	r2, .L303+16
+ 5561 006e 0A40     		ands	r2, r2, r1
+ 5562 0070 9A60     		str	r2, [r3, #8]
+ 5563              	.LVL549:
+ 5564              		.loc 5 3094 3 is_stmt 0 view .LVU1758
+ 5565              	.LBE518:
+ 5566              	.LBE517:
+1539:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM2);
+ 5567              		.loc 1 1539 3 is_stmt 1 view .LVU1759
+ 5568              	.LBB519:
+ 5569              	.LBI519:
 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the encoder interface mode.
 3099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
 3100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance supports the encoder mode.
-ARM GAS  /tmp/ccwR4KB7.s 			page 315
-
-
 3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SMCR         SMS           LL_TIM_SetEncoderMode
 3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  EncoderMode This parameter can be one of the following values:
@@ -18855,6 +19798,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 331
+
+
 3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
 3116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -18879,28 +19825,25 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
- 5086              		.loc 5 3138 22 view .LVU1623
- 5087              	.LBB484:
+ 5570              		.loc 5 3138 22 view .LVU1760
+ 5571              	.LBB520:
 3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
- 5088              		.loc 5 3140 3 view .LVU1624
- 5089 0072 5A68     		ldr	r2, [r3, #4]
- 5090 0074 22F07002 		bic	r2, r2, #112
- 5091 0078 5A60     		str	r2, [r3, #4]
- 5092              	.LVL488:
- 5093              		.loc 5 3140 3 is_stmt 0 view .LVU1625
- 5094              	.LBE484:
- 5095              	.LBE483:
-1444:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 2 */
- 5096              		.loc 1 1444 3 is_stmt 1 view .LVU1626
- 5097              	.LBB485:
- 5098              	.LBI485:
+ 5572              		.loc 5 3140 3 view .LVU1761
+ 5573 0072 5A68     		ldr	r2, [r3, #4]
+ 5574 0074 22F07002 		bic	r2, r2, #112
+ 5575 0078 5A60     		str	r2, [r3, #4]
+ 5576              	.LVL550:
+ 5577              		.loc 5 3140 3 is_stmt 0 view .LVU1762
+ 5578              	.LBE520:
+ 5579              	.LBE519:
+1540:Src/main.c    ****   /* USER CODE BEGIN TIM2_Init 2 */
+ 5580              		.loc 1 1540 3 is_stmt 1 view .LVU1763
+ 5581              	.LBB521:
+ 5582              	.LBI521:
 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 316
-
-
 3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the trigger output 2 (TRGO2) used for ADC synchronization .
 3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check
 3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance can be used for ADC synchronization.
@@ -18915,6 +19858,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TRGO2_OC2
 3156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TRGO2_OC3
 3157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TRGO2_OC4
+ARM GAS  /tmp/ccEQxcUB.s 			page 332
+
+
 3158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TRGO2_OC5
 3159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TRGO2_OC6
 3160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TRGO2_OC4_RISINGFALLING
@@ -18958,9 +19904,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TriggerInput This parameter can be one of the following values:
 3199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TS_ITR0
 3200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TS_ITR1
-ARM GAS  /tmp/ccwR4KB7.s 			page 317
-
-
 3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TS_ITR2
 3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TS_ITR3
 3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TS_TI1F_ED
@@ -18975,6 +19918,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 333
+
+
 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Enable the Master/Slave mode.
 3216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
 3217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       a timer instance can operate as a slave timer.
@@ -18996,1055 +19942,1052 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
- 5099              		.loc 5 3235 22 view .LVU1627
- 5100              	.LBB486:
+ 5583              		.loc 5 3235 22 view .LVU1764
+ 5584              	.LBB522:
 3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
- 5101              		.loc 5 3237 3 view .LVU1628
- 5102 007a 9A68     		ldr	r2, [r3, #8]
- 5103 007c 22F08002 		bic	r2, r2, #128
- 5104 0080 9A60     		str	r2, [r3, #8]
- 5105              	.LVL489:
- 5106              		.loc 5 3237 3 is_stmt 0 view .LVU1629
- 5107              	.LBE486:
- 5108              	.LBE485:
-1449:Src/main.c    **** 
- 5109              		.loc 1 1449 1 view .LVU1630
- 5110 0082 06B0     		add	sp, sp, #24
- 5111              	.LCFI52:
- 5112              		.cfi_def_cfa_offset 8
- 5113              		@ sp needed
- 5114 0084 10BD     		pop	{r4, pc}
- 5115              	.L279:
- 5116 0086 00BF     		.align	2
- 5117              	.L278:
-ARM GAS  /tmp/ccwR4KB7.s 			page 318
+ 5585              		.loc 5 3237 3 view .LVU1765
+ 5586 007a 9A68     		ldr	r2, [r3, #8]
+ 5587 007c 22F08002 		bic	r2, r2, #128
+ 5588 0080 9A60     		str	r2, [r3, #8]
+ 5589              	.LVL551:
+ 5590              		.loc 5 3237 3 is_stmt 0 view .LVU1766
+ 5591              	.LBE522:
+ 5592              	.LBE521:
+1545:Src/main.c    **** 
+ 5593              		.loc 1 1545 1 view .LVU1767
+ 5594 0082 06B0     		add	sp, sp, #24
+ 5595              	.LCFI54:
+ 5596              		.cfi_def_cfa_offset 8
+ 5597              		@ sp needed
+ 5598 0084 10BD     		pop	{r4, pc}
+ 5599              	.L304:
+ 5600 0086 00BF     		.align	2
+ 5601              	.L303:
+ 5602 0088 00380240 		.word	1073887232
+ 5603 008c 00ED00E0 		.word	-536810240
+ 5604 0090 00E100E0 		.word	-536813312
+ 5605 0094 40D10C00 		.word	840000
+ 5606 0098 F8BFFEFF 		.word	-81928
+ 5607              		.cfi_endproc
+ 5608              	.LFE1195:
+ 5610              		.section	.text.MX_TIM5_Init,"ax",%progbits
+ 5611              		.align	1
+ 5612              		.syntax unified
+ 5613              		.thumb
+ 5614              		.thumb_func
+ 5616              	MX_TIM5_Init:
+ 5617              	.LFB1197:
+ARM GAS  /tmp/ccEQxcUB.s 			page 334
 
 
- 5118 0088 00380240 		.word	1073887232
- 5119 008c 00ED00E0 		.word	-536810240
- 5120 0090 00E100E0 		.word	-536813312
- 5121 0094 40D10C00 		.word	840000
- 5122 0098 F8BFFEFF 		.word	-81928
- 5123              		.cfi_endproc
- 5124              	.LFE1195:
- 5126              		.section	.text.MX_TIM5_Init,"ax",%progbits
- 5127              		.align	1
- 5128              		.syntax unified
- 5129              		.thumb
- 5130              		.thumb_func
- 5132              	MX_TIM5_Init:
- 5133              	.LFB1197:
-1516:Src/main.c    **** 
- 5134              		.loc 1 1516 1 is_stmt 1 view -0
- 5135              		.cfi_startproc
- 5136              		@ args = 0, pretend = 0, frame = 24
- 5137              		@ frame_needed = 0, uses_anonymous_args = 0
- 5138 0000 10B5     		push	{r4, lr}
- 5139              	.LCFI53:
- 5140              		.cfi_def_cfa_offset 8
- 5141              		.cfi_offset 4, -8
- 5142              		.cfi_offset 14, -4
- 5143 0002 86B0     		sub	sp, sp, #24
- 5144              	.LCFI54:
- 5145              		.cfi_def_cfa_offset 32
-1522:Src/main.c    **** 
- 5146              		.loc 1 1522 3 view .LVU1632
-1522:Src/main.c    **** 
- 5147              		.loc 1 1522 22 is_stmt 0 view .LVU1633
- 5148 0004 0024     		movs	r4, #0
- 5149 0006 0194     		str	r4, [sp, #4]
- 5150 0008 0294     		str	r4, [sp, #8]
- 5151 000a 0394     		str	r4, [sp, #12]
- 5152 000c 0494     		str	r4, [sp, #16]
- 5153 000e 0594     		str	r4, [sp, #20]
-1525:Src/main.c    **** 
- 5154              		.loc 1 1525 3 is_stmt 1 view .LVU1634
- 5155              	.LVL490:
- 5156              	.LBB487:
- 5157              	.LBI487:
-1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5158              		.loc 3 1071 22 view .LVU1635
- 5159              	.LBB488:
-1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
- 5160              		.loc 3 1073 3 view .LVU1636
-1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 5161              		.loc 3 1074 3 view .LVU1637
- 5162 0010 1C4B     		ldr	r3, .L282
- 5163 0012 1A6C     		ldr	r2, [r3, #64]
- 5164 0014 42F00802 		orr	r2, r2, #8
- 5165 0018 1A64     		str	r2, [r3, #64]
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5166              		.loc 3 1076 3 view .LVU1638
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5167              		.loc 3 1076 12 is_stmt 0 view .LVU1639
-ARM GAS  /tmp/ccwR4KB7.s 			page 319
-
-
- 5168 001a 1B6C     		ldr	r3, [r3, #64]
- 5169 001c 03F00803 		and	r3, r3, #8
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5170              		.loc 3 1076 10 view .LVU1640
- 5171 0020 0093     		str	r3, [sp]
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5172              		.loc 3 1077 3 is_stmt 1 view .LVU1641
- 5173 0022 009B     		ldr	r3, [sp]
- 5174              	.LVL491:
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5175              		.loc 3 1077 3 is_stmt 0 view .LVU1642
- 5176              	.LBE488:
- 5177              	.LBE487:
-1528:Src/main.c    ****   NVIC_EnableIRQ(TIM5_IRQn);
- 5178              		.loc 1 1528 3 is_stmt 1 view .LVU1643
- 5179              	.LBB489:
- 5180              	.LBI489:
-1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 5181              		.loc 2 1884 26 view .LVU1644
- 5182              	.LBB490:
-1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 5183              		.loc 2 1886 3 view .LVU1645
-1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 5184              		.loc 2 1886 26 is_stmt 0 view .LVU1646
- 5185 0024 184B     		ldr	r3, .L282+4
- 5186 0026 D868     		ldr	r0, [r3, #12]
- 5187              	.LBE490:
- 5188              	.LBE489:
-1528:Src/main.c    ****   NVIC_EnableIRQ(TIM5_IRQn);
- 5189              		.loc 1 1528 3 discriminator 1 view .LVU1647
- 5190 0028 2246     		mov	r2, r4
- 5191 002a 2146     		mov	r1, r4
- 5192 002c C0F30220 		ubfx	r0, r0, #8, #3
- 5193 0030 FFF7FEFF 		bl	NVIC_EncodePriority
- 5194              	.LVL492:
- 5195              	.LBB491:
- 5196              	.LBI491:
-2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 5197              		.loc 2 2024 22 is_stmt 1 view .LVU1648
- 5198              	.LBB492:
-2026:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5199              		.loc 2 2026 3 view .LVU1649
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5200              		.loc 2 2028 5 view .LVU1650
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5201              		.loc 2 2028 49 is_stmt 0 view .LVU1651
- 5202 0034 0001     		lsls	r0, r0, #4
- 5203              	.LVL493:
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5204              		.loc 2 2028 49 view .LVU1652
- 5205 0036 C0B2     		uxtb	r0, r0
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5206              		.loc 2 2028 47 view .LVU1653
- 5207 0038 144B     		ldr	r3, .L282+8
- 5208 003a 83F83203 		strb	r0, [r3, #818]
- 5209              	.LVL494:
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
-ARM GAS  /tmp/ccwR4KB7.s 			page 320
-
-
- 5210              		.loc 2 2028 47 view .LVU1654
- 5211              	.LBE492:
- 5212              	.LBE491:
-1529:Src/main.c    **** 
- 5213              		.loc 1 1529 3 is_stmt 1 view .LVU1655
- 5214              	.LBB493:
- 5215              	.LBI493:
-1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 5216              		.loc 2 1896 22 view .LVU1656
- 5217              	.LBB494:
-1898:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5218              		.loc 2 1898 3 view .LVU1657
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5219              		.loc 2 1900 5 view .LVU1658
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5220              		.loc 2 1900 43 is_stmt 0 view .LVU1659
- 5221 003e 4FF48022 		mov	r2, #262144
- 5222 0042 5A60     		str	r2, [r3, #4]
- 5223              	.LVL495:
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5224              		.loc 2 1900 43 view .LVU1660
- 5225              	.LBE494:
- 5226              	.LBE493:
-1534:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5227              		.loc 1 1534 3 is_stmt 1 view .LVU1661
-1534:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5228              		.loc 1 1534 28 is_stmt 0 view .LVU1662
- 5229 0044 42F21073 		movw	r3, #10000
- 5230 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
-1535:Src/main.c    ****   TIM_InitStruct.Autoreload = 560;
- 5231              		.loc 1 1535 3 is_stmt 1 view .LVU1663
-1535:Src/main.c    ****   TIM_InitStruct.Autoreload = 560;
- 5232              		.loc 1 1535 30 is_stmt 0 view .LVU1664
- 5233 004c 0294     		str	r4, [sp, #8]
-1536:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 5234              		.loc 1 1536 3 is_stmt 1 view .LVU1665
-1536:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 5235              		.loc 1 1536 29 is_stmt 0 view .LVU1666
- 5236 004e 4FF40C73 		mov	r3, #560
- 5237 0052 0393     		str	r3, [sp, #12]
-1537:Src/main.c    ****   LL_TIM_Init(TIM5, &TIM_InitStruct);
- 5238              		.loc 1 1537 3 is_stmt 1 view .LVU1667
-1537:Src/main.c    ****   LL_TIM_Init(TIM5, &TIM_InitStruct);
- 5239              		.loc 1 1537 32 is_stmt 0 view .LVU1668
- 5240 0054 0494     		str	r4, [sp, #16]
-1538:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM5);
- 5241              		.loc 1 1538 3 is_stmt 1 view .LVU1669
- 5242 0056 0E4C     		ldr	r4, .L282+12
- 5243 0058 01A9     		add	r1, sp, #4
- 5244 005a 2046     		mov	r0, r4
- 5245 005c FFF7FEFF 		bl	LL_TIM_Init
- 5246              	.LVL496:
-1539:Src/main.c    ****   LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
- 5247              		.loc 1 1539 3 view .LVU1670
- 5248              	.LBB495:
- 5249              	.LBI495:
-1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 321
-
-
- 5250              		.loc 5 1504 22 view .LVU1671
- 5251              	.LBB496:
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5252              		.loc 5 1506 3 view .LVU1672
- 5253 0060 2368     		ldr	r3, [r4]
- 5254 0062 23F08003 		bic	r3, r3, #128
- 5255 0066 2360     		str	r3, [r4]
- 5256              	.LVL497:
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5257              		.loc 5 1506 3 is_stmt 0 view .LVU1673
- 5258              	.LBE496:
- 5259              	.LBE495:
-1540:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
- 5260              		.loc 1 1540 3 is_stmt 1 view .LVU1674
- 5261              	.LBB497:
- 5262              	.LBI497:
-3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5263              		.loc 5 3092 22 view .LVU1675
- 5264              	.LBB498:
-3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5265              		.loc 5 3094 3 view .LVU1676
- 5266 0068 A268     		ldr	r2, [r4, #8]
- 5267 006a 0A4B     		ldr	r3, .L282+16
- 5268 006c 1340     		ands	r3, r3, r2
- 5269 006e A360     		str	r3, [r4, #8]
- 5270              	.LVL498:
-3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5271              		.loc 5 3094 3 is_stmt 0 view .LVU1677
- 5272              	.LBE498:
- 5273              	.LBE497:
-1541:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM5);
- 5274              		.loc 1 1541 3 is_stmt 1 view .LVU1678
- 5275              	.LBB499:
- 5276              	.LBI499:
-3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5277              		.loc 5 3138 22 view .LVU1679
- 5278              	.LBB500:
-3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5279              		.loc 5 3140 3 view .LVU1680
- 5280 0070 6368     		ldr	r3, [r4, #4]
- 5281 0072 23F07003 		bic	r3, r3, #112
- 5282 0076 6360     		str	r3, [r4, #4]
- 5283              	.LVL499:
-3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5284              		.loc 5 3140 3 is_stmt 0 view .LVU1681
- 5285              	.LBE500:
- 5286              	.LBE499:
-1542:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 2 */
- 5287              		.loc 1 1542 3 is_stmt 1 view .LVU1682
- 5288              	.LBB501:
- 5289              	.LBI501:
-3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5290              		.loc 5 3235 22 view .LVU1683
- 5291              	.LBB502:
- 5292              		.loc 5 3237 3 view .LVU1684
- 5293 0078 A368     		ldr	r3, [r4, #8]
- 5294 007a 23F08003 		bic	r3, r3, #128
-ARM GAS  /tmp/ccwR4KB7.s 			page 322
-
-
- 5295 007e A360     		str	r3, [r4, #8]
- 5296              	.LVL500:
- 5297              		.loc 5 3237 3 is_stmt 0 view .LVU1685
- 5298              	.LBE502:
- 5299              	.LBE501:
-1547:Src/main.c    **** 
- 5300              		.loc 1 1547 1 view .LVU1686
- 5301 0080 06B0     		add	sp, sp, #24
- 5302              	.LCFI55:
- 5303              		.cfi_def_cfa_offset 8
- 5304              		@ sp needed
- 5305 0082 10BD     		pop	{r4, pc}
- 5306              	.L283:
- 5307              		.align	2
- 5308              	.L282:
- 5309 0084 00380240 		.word	1073887232
- 5310 0088 00ED00E0 		.word	-536810240
- 5311 008c 00E100E0 		.word	-536813312
- 5312 0090 000C0040 		.word	1073744896
- 5313 0094 F8BFFEFF 		.word	-81928
- 5314              		.cfi_endproc
- 5315              	.LFE1197:
- 5317              		.section	.text.MX_TIM7_Init,"ax",%progbits
- 5318              		.align	1
- 5319              		.syntax unified
- 5320              		.thumb
- 5321              		.thumb_func
- 5323              	MX_TIM7_Init:
- 5324              	.LFB1199:
-1592:Src/main.c    **** 
- 5325              		.loc 1 1592 1 is_stmt 1 view -0
- 5326              		.cfi_startproc
- 5327              		@ args = 0, pretend = 0, frame = 24
- 5328              		@ frame_needed = 0, uses_anonymous_args = 0
- 5329 0000 10B5     		push	{r4, lr}
- 5330              	.LCFI56:
- 5331              		.cfi_def_cfa_offset 8
- 5332              		.cfi_offset 4, -8
- 5333              		.cfi_offset 14, -4
- 5334 0002 86B0     		sub	sp, sp, #24
- 5335              	.LCFI57:
- 5336              		.cfi_def_cfa_offset 32
-1598:Src/main.c    **** 
- 5337              		.loc 1 1598 3 view .LVU1688
-1598:Src/main.c    **** 
- 5338              		.loc 1 1598 22 is_stmt 0 view .LVU1689
- 5339 0004 0024     		movs	r4, #0
- 5340 0006 0194     		str	r4, [sp, #4]
- 5341 0008 0294     		str	r4, [sp, #8]
- 5342 000a 0394     		str	r4, [sp, #12]
- 5343 000c 0494     		str	r4, [sp, #16]
- 5344 000e 0594     		str	r4, [sp, #20]
-1601:Src/main.c    **** 
- 5345              		.loc 1 1601 3 is_stmt 1 view .LVU1690
- 5346              	.LVL501:
- 5347              	.LBB503:
- 5348              	.LBI503:
-ARM GAS  /tmp/ccwR4KB7.s 			page 323
-
-
-1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5349              		.loc 3 1071 22 view .LVU1691
- 5350              	.LBB504:
-1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
- 5351              		.loc 3 1073 3 view .LVU1692
-1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 5352              		.loc 3 1074 3 view .LVU1693
- 5353 0010 1A4B     		ldr	r3, .L286
- 5354 0012 1A6C     		ldr	r2, [r3, #64]
- 5355 0014 42F02002 		orr	r2, r2, #32
- 5356 0018 1A64     		str	r2, [r3, #64]
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5357              		.loc 3 1076 3 view .LVU1694
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5358              		.loc 3 1076 12 is_stmt 0 view .LVU1695
- 5359 001a 1B6C     		ldr	r3, [r3, #64]
- 5360 001c 03F02003 		and	r3, r3, #32
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5361              		.loc 3 1076 10 view .LVU1696
- 5362 0020 0093     		str	r3, [sp]
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5363              		.loc 3 1077 3 is_stmt 1 view .LVU1697
- 5364 0022 009B     		ldr	r3, [sp]
- 5365              	.LVL502:
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5366              		.loc 3 1077 3 is_stmt 0 view .LVU1698
- 5367              	.LBE504:
- 5368              	.LBE503:
-1604:Src/main.c    ****   NVIC_EnableIRQ(TIM7_IRQn);
- 5369              		.loc 1 1604 3 is_stmt 1 view .LVU1699
- 5370              	.LBB505:
- 5371              	.LBI505:
-1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 5372              		.loc 2 1884 26 view .LVU1700
- 5373              	.LBB506:
-1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 5374              		.loc 2 1886 3 view .LVU1701
-1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 5375              		.loc 2 1886 26 is_stmt 0 view .LVU1702
- 5376 0024 164B     		ldr	r3, .L286+4
- 5377 0026 D868     		ldr	r0, [r3, #12]
- 5378              	.LBE506:
- 5379              	.LBE505:
-1604:Src/main.c    ****   NVIC_EnableIRQ(TIM7_IRQn);
- 5380              		.loc 1 1604 3 discriminator 1 view .LVU1703
- 5381 0028 2246     		mov	r2, r4
- 5382 002a 2146     		mov	r1, r4
- 5383 002c C0F30220 		ubfx	r0, r0, #8, #3
- 5384 0030 FFF7FEFF 		bl	NVIC_EncodePriority
- 5385              	.LVL503:
- 5386              	.LBB507:
- 5387              	.LBI507:
-2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 5388              		.loc 2 2024 22 is_stmt 1 view .LVU1704
- 5389              	.LBB508:
-2026:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5390              		.loc 2 2026 3 view .LVU1705
-ARM GAS  /tmp/ccwR4KB7.s 			page 324
-
-
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5391              		.loc 2 2028 5 view .LVU1706
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5392              		.loc 2 2028 49 is_stmt 0 view .LVU1707
- 5393 0034 0001     		lsls	r0, r0, #4
- 5394              	.LVL504:
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5395              		.loc 2 2028 49 view .LVU1708
- 5396 0036 C0B2     		uxtb	r0, r0
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5397              		.loc 2 2028 47 view .LVU1709
- 5398 0038 124B     		ldr	r3, .L286+8
- 5399 003a 83F83703 		strb	r0, [r3, #823]
- 5400              	.LVL505:
-2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5401              		.loc 2 2028 47 view .LVU1710
- 5402              	.LBE508:
- 5403              	.LBE507:
-1605:Src/main.c    **** 
- 5404              		.loc 1 1605 3 is_stmt 1 view .LVU1711
- 5405              	.LBB509:
- 5406              	.LBI509:
-1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 5407              		.loc 2 1896 22 view .LVU1712
- 5408              	.LBB510:
-1898:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5409              		.loc 2 1898 3 view .LVU1713
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5410              		.loc 2 1900 5 view .LVU1714
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5411              		.loc 2 1900 43 is_stmt 0 view .LVU1715
- 5412 003e 4FF40002 		mov	r2, #8388608
- 5413 0042 5A60     		str	r2, [r3, #4]
- 5414              	.LVL506:
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5415              		.loc 2 1900 43 view .LVU1716
- 5416              	.LBE510:
- 5417              	.LBE509:
-1610:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5418              		.loc 1 1610 3 is_stmt 1 view .LVU1717
-1610:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5419              		.loc 1 1610 28 is_stmt 0 view .LVU1718
- 5420 0044 40F29733 		movw	r3, #919
- 5421 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
-1611:Src/main.c    ****   TIM_InitStruct.Autoreload = 99;
- 5422              		.loc 1 1611 3 is_stmt 1 view .LVU1719
-1611:Src/main.c    ****   TIM_InitStruct.Autoreload = 99;
- 5423              		.loc 1 1611 30 is_stmt 0 view .LVU1720
- 5424 004c 0294     		str	r4, [sp, #8]
-1612:Src/main.c    ****   LL_TIM_Init(TIM7, &TIM_InitStruct);
- 5425              		.loc 1 1612 3 is_stmt 1 view .LVU1721
-1612:Src/main.c    ****   LL_TIM_Init(TIM7, &TIM_InitStruct);
- 5426              		.loc 1 1612 29 is_stmt 0 view .LVU1722
- 5427 004e 6323     		movs	r3, #99
- 5428 0050 0393     		str	r3, [sp, #12]
-1613:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM7);
- 5429              		.loc 1 1613 3 is_stmt 1 view .LVU1723
-ARM GAS  /tmp/ccwR4KB7.s 			page 325
-
-
- 5430 0052 0D4C     		ldr	r4, .L286+12
- 5431 0054 01A9     		add	r1, sp, #4
- 5432 0056 2046     		mov	r0, r4
- 5433 0058 FFF7FEFF 		bl	LL_TIM_Init
- 5434              	.LVL507:
-1614:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
- 5435              		.loc 1 1614 3 view .LVU1724
- 5436              	.LBB511:
- 5437              	.LBI511:
-1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5438              		.loc 5 1504 22 view .LVU1725
- 5439              	.LBB512:
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5440              		.loc 5 1506 3 view .LVU1726
- 5441 005c 2368     		ldr	r3, [r4]
- 5442 005e 23F08003 		bic	r3, r3, #128
- 5443 0062 2360     		str	r3, [r4]
- 5444              	.LVL508:
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5445              		.loc 5 1506 3 is_stmt 0 view .LVU1727
- 5446              	.LBE512:
- 5447              	.LBE511:
-1615:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM7);
- 5448              		.loc 1 1615 3 is_stmt 1 view .LVU1728
- 5449              	.LBB513:
- 5450              	.LBI513:
-3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5451              		.loc 5 3138 22 view .LVU1729
- 5452              	.LBB514:
-3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5453              		.loc 5 3140 3 view .LVU1730
- 5454 0064 6368     		ldr	r3, [r4, #4]
- 5455 0066 23F07003 		bic	r3, r3, #112
- 5456 006a 43F01003 		orr	r3, r3, #16
- 5457 006e 6360     		str	r3, [r4, #4]
- 5458              	.LVL509:
-3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5459              		.loc 5 3140 3 is_stmt 0 view .LVU1731
- 5460              	.LBE514:
- 5461              	.LBE513:
-1616:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 2 */
- 5462              		.loc 1 1616 3 is_stmt 1 view .LVU1732
- 5463              	.LBB515:
- 5464              	.LBI515:
-3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5465              		.loc 5 3235 22 view .LVU1733
- 5466              	.LBB516:
- 5467              		.loc 5 3237 3 view .LVU1734
- 5468 0070 A368     		ldr	r3, [r4, #8]
- 5469 0072 23F08003 		bic	r3, r3, #128
- 5470 0076 A360     		str	r3, [r4, #8]
- 5471              	.LVL510:
- 5472              		.loc 5 3237 3 is_stmt 0 view .LVU1735
- 5473              	.LBE516:
- 5474              	.LBE515:
+1612:Src/main.c    **** 
+ 5618              		.loc 1 1612 1 is_stmt 1 view -0
+ 5619              		.cfi_startproc
+ 5620              		@ args = 0, pretend = 0, frame = 24
+ 5621              		@ frame_needed = 0, uses_anonymous_args = 0
+ 5622 0000 10B5     		push	{r4, lr}
+ 5623              	.LCFI55:
+ 5624              		.cfi_def_cfa_offset 8
+ 5625              		.cfi_offset 4, -8
+ 5626              		.cfi_offset 14, -4
+ 5627 0002 86B0     		sub	sp, sp, #24
+ 5628              	.LCFI56:
+ 5629              		.cfi_def_cfa_offset 32
+1618:Src/main.c    **** 
+ 5630              		.loc 1 1618 3 view .LVU1769
+1618:Src/main.c    **** 
+ 5631              		.loc 1 1618 22 is_stmt 0 view .LVU1770
+ 5632 0004 0024     		movs	r4, #0
+ 5633 0006 0194     		str	r4, [sp, #4]
+ 5634 0008 0294     		str	r4, [sp, #8]
+ 5635 000a 0394     		str	r4, [sp, #12]
+ 5636 000c 0494     		str	r4, [sp, #16]
+ 5637 000e 0594     		str	r4, [sp, #20]
 1621:Src/main.c    **** 
- 5475              		.loc 1 1621 1 view .LVU1736
-ARM GAS  /tmp/ccwR4KB7.s 			page 326
-
-
- 5476 0078 06B0     		add	sp, sp, #24
- 5477              	.LCFI58:
- 5478              		.cfi_def_cfa_offset 8
- 5479              		@ sp needed
- 5480 007a 10BD     		pop	{r4, pc}
- 5481              	.L287:
- 5482              		.align	2
- 5483              	.L286:
- 5484 007c 00380240 		.word	1073887232
- 5485 0080 00ED00E0 		.word	-536810240
- 5486 0084 00E100E0 		.word	-536813312
- 5487 0088 00140040 		.word	1073746944
- 5488              		.cfi_endproc
- 5489              	.LFE1199:
- 5491              		.section	.text.MX_TIM6_Init,"ax",%progbits
- 5492              		.align	1
- 5493              		.syntax unified
- 5494              		.thumb
- 5495              		.thumb_func
- 5497              	MX_TIM6_Init:
- 5498              	.LFB1198:
-1555:Src/main.c    **** 
- 5499              		.loc 1 1555 1 is_stmt 1 view -0
- 5500              		.cfi_startproc
- 5501              		@ args = 0, pretend = 0, frame = 24
- 5502              		@ frame_needed = 0, uses_anonymous_args = 0
- 5503 0000 10B5     		push	{r4, lr}
- 5504              	.LCFI59:
- 5505              		.cfi_def_cfa_offset 8
- 5506              		.cfi_offset 4, -8
- 5507              		.cfi_offset 14, -4
- 5508 0002 86B0     		sub	sp, sp, #24
- 5509              	.LCFI60:
- 5510              		.cfi_def_cfa_offset 32
-1561:Src/main.c    **** 
- 5511              		.loc 1 1561 3 view .LVU1738
-1561:Src/main.c    **** 
- 5512              		.loc 1 1561 22 is_stmt 0 view .LVU1739
- 5513 0004 0024     		movs	r4, #0
- 5514 0006 0194     		str	r4, [sp, #4]
- 5515 0008 0294     		str	r4, [sp, #8]
- 5516 000a 0394     		str	r4, [sp, #12]
- 5517 000c 0494     		str	r4, [sp, #16]
- 5518 000e 0594     		str	r4, [sp, #20]
-1564:Src/main.c    **** 
- 5519              		.loc 1 1564 3 is_stmt 1 view .LVU1740
- 5520              	.LVL511:
- 5521              	.LBB517:
- 5522              	.LBI517:
+ 5638              		.loc 1 1621 3 is_stmt 1 view .LVU1771
+ 5639              	.LVL552:
+ 5640              	.LBB523:
+ 5641              	.LBI523:
 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5523              		.loc 3 1071 22 view .LVU1741
- 5524              	.LBB518:
+ 5642              		.loc 3 1071 22 view .LVU1772
+ 5643              	.LBB524:
 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
- 5525              		.loc 3 1073 3 view .LVU1742
+ 5644              		.loc 3 1073 3 view .LVU1773
 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 5526              		.loc 3 1074 3 view .LVU1743
- 5527 0010 1A4B     		ldr	r3, .L290
-ARM GAS  /tmp/ccwR4KB7.s 			page 327
+ 5645              		.loc 3 1074 3 view .LVU1774
+ 5646 0010 1C4B     		ldr	r3, .L307
+ 5647 0012 1A6C     		ldr	r2, [r3, #64]
+ 5648 0014 42F00802 		orr	r2, r2, #8
+ 5649 0018 1A64     		str	r2, [r3, #64]
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5650              		.loc 3 1076 3 view .LVU1775
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5651              		.loc 3 1076 12 is_stmt 0 view .LVU1776
+ 5652 001a 1B6C     		ldr	r3, [r3, #64]
+ 5653 001c 03F00803 		and	r3, r3, #8
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5654              		.loc 3 1076 10 view .LVU1777
+ 5655 0020 0093     		str	r3, [sp]
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 5656              		.loc 3 1077 3 is_stmt 1 view .LVU1778
+ 5657 0022 009B     		ldr	r3, [sp]
+ 5658              	.LVL553:
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 5659              		.loc 3 1077 3 is_stmt 0 view .LVU1779
+ 5660              	.LBE524:
+ 5661              	.LBE523:
+1624:Src/main.c    ****   NVIC_EnableIRQ(TIM5_IRQn);
+ARM GAS  /tmp/ccEQxcUB.s 			page 335
 
 
- 5528 0012 1A6C     		ldr	r2, [r3, #64]
- 5529 0014 42F01002 		orr	r2, r2, #16
- 5530 0018 1A64     		str	r2, [r3, #64]
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5531              		.loc 3 1076 3 view .LVU1744
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5532              		.loc 3 1076 12 is_stmt 0 view .LVU1745
- 5533 001a 1B6C     		ldr	r3, [r3, #64]
- 5534 001c 03F01003 		and	r3, r3, #16
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 5535              		.loc 3 1076 10 view .LVU1746
- 5536 0020 0093     		str	r3, [sp]
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5537              		.loc 3 1077 3 is_stmt 1 view .LVU1747
- 5538 0022 009B     		ldr	r3, [sp]
- 5539              	.LVL512:
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5540              		.loc 3 1077 3 is_stmt 0 view .LVU1748
- 5541              	.LBE518:
- 5542              	.LBE517:
-1567:Src/main.c    ****   NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 5543              		.loc 1 1567 3 is_stmt 1 view .LVU1749
- 5544              	.LBB519:
- 5545              	.LBI519:
+ 5662              		.loc 1 1624 3 is_stmt 1 view .LVU1780
+ 5663              	.LBB525:
+ 5664              	.LBI525:
 1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 5546              		.loc 2 1884 26 view .LVU1750
- 5547              	.LBB520:
+ 5665              		.loc 2 1884 26 view .LVU1781
+ 5666              	.LBB526:
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 5548              		.loc 2 1886 3 view .LVU1751
+ 5667              		.loc 2 1886 3 view .LVU1782
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 5549              		.loc 2 1886 26 is_stmt 0 view .LVU1752
- 5550 0024 164B     		ldr	r3, .L290+4
- 5551 0026 D868     		ldr	r0, [r3, #12]
- 5552              	.LBE520:
- 5553              	.LBE519:
-1567:Src/main.c    ****   NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 5554              		.loc 1 1567 3 discriminator 1 view .LVU1753
- 5555 0028 2246     		mov	r2, r4
- 5556 002a 2146     		mov	r1, r4
- 5557 002c C0F30220 		ubfx	r0, r0, #8, #3
- 5558 0030 FFF7FEFF 		bl	NVIC_EncodePriority
- 5559              	.LVL513:
- 5560              	.LBB521:
- 5561              	.LBI521:
+ 5668              		.loc 2 1886 26 is_stmt 0 view .LVU1783
+ 5669 0024 184B     		ldr	r3, .L307+4
+ 5670 0026 D868     		ldr	r0, [r3, #12]
+ 5671              	.LBE526:
+ 5672              	.LBE525:
+1624:Src/main.c    ****   NVIC_EnableIRQ(TIM5_IRQn);
+ 5673              		.loc 1 1624 3 discriminator 1 view .LVU1784
+ 5674 0028 2246     		mov	r2, r4
+ 5675 002a 2146     		mov	r1, r4
+ 5676 002c C0F30220 		ubfx	r0, r0, #8, #3
+ 5677 0030 FFF7FEFF 		bl	NVIC_EncodePriority
+ 5678              	.LVL554:
+ 5679              	.LBB527:
+ 5680              	.LBI527:
 2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 5562              		.loc 2 2024 22 is_stmt 1 view .LVU1754
- 5563              	.LBB522:
+ 5681              		.loc 2 2024 22 is_stmt 1 view .LVU1785
+ 5682              	.LBB528:
 2026:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5564              		.loc 2 2026 3 view .LVU1755
+ 5683              		.loc 2 2026 3 view .LVU1786
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5565              		.loc 2 2028 5 view .LVU1756
+ 5684              		.loc 2 2028 5 view .LVU1787
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5566              		.loc 2 2028 49 is_stmt 0 view .LVU1757
- 5567 0034 0001     		lsls	r0, r0, #4
- 5568              	.LVL514:
+ 5685              		.loc 2 2028 49 is_stmt 0 view .LVU1788
+ 5686 0034 0001     		lsls	r0, r0, #4
+ 5687              	.LVL555:
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5569              		.loc 2 2028 49 view .LVU1758
-ARM GAS  /tmp/ccwR4KB7.s 			page 328
-
-
- 5570 0036 C0B2     		uxtb	r0, r0
+ 5688              		.loc 2 2028 49 view .LVU1789
+ 5689 0036 C0B2     		uxtb	r0, r0
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5571              		.loc 2 2028 47 view .LVU1759
- 5572 0038 124B     		ldr	r3, .L290+8
- 5573 003a 83F83603 		strb	r0, [r3, #822]
- 5574              	.LVL515:
+ 5690              		.loc 2 2028 47 view .LVU1790
+ 5691 0038 144B     		ldr	r3, .L307+8
+ 5692 003a 83F83203 		strb	r0, [r3, #818]
+ 5693              	.LVL556:
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5575              		.loc 2 2028 47 view .LVU1760
- 5576              	.LBE522:
- 5577              	.LBE521:
-1568:Src/main.c    **** 
- 5578              		.loc 1 1568 3 is_stmt 1 view .LVU1761
- 5579              	.LBB523:
- 5580              	.LBI523:
+ 5694              		.loc 2 2028 47 view .LVU1791
+ 5695              	.LBE528:
+ 5696              	.LBE527:
+1625:Src/main.c    **** 
+ 5697              		.loc 1 1625 3 is_stmt 1 view .LVU1792
+ 5698              	.LBB529:
+ 5699              	.LBI529:
 1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 5581              		.loc 2 1896 22 view .LVU1762
- 5582              	.LBB524:
+ 5700              		.loc 2 1896 22 view .LVU1793
+ 5701              	.LBB530:
 1898:Drivers/CMSIS/Include/core_cm7.h ****   {
- 5583              		.loc 2 1898 3 view .LVU1763
+ 5702              		.loc 2 1898 3 view .LVU1794
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5584              		.loc 2 1900 5 view .LVU1764
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5585              		.loc 2 1900 43 is_stmt 0 view .LVU1765
- 5586 003e 4FF48002 		mov	r2, #4194304
- 5587 0042 5A60     		str	r2, [r3, #4]
- 5588              	.LVL516:
-1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 5589              		.loc 2 1900 43 view .LVU1766
- 5590              	.LBE524:
- 5591              	.LBE523:
-1573:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5592              		.loc 1 1573 3 is_stmt 1 view .LVU1767
-1573:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 5593              		.loc 1 1573 28 is_stmt 0 view .LVU1768
- 5594 0044 4BF2AF33 		movw	r3, #45999
- 5595 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
-1574:Src/main.c    ****   TIM_InitStruct.Autoreload = 19;
- 5596              		.loc 1 1574 3 is_stmt 1 view .LVU1769
-1574:Src/main.c    ****   TIM_InitStruct.Autoreload = 19;
- 5597              		.loc 1 1574 30 is_stmt 0 view .LVU1770
- 5598 004c 0294     		str	r4, [sp, #8]
-1575:Src/main.c    ****   LL_TIM_Init(TIM6, &TIM_InitStruct);
- 5599              		.loc 1 1575 3 is_stmt 1 view .LVU1771
-1575:Src/main.c    ****   LL_TIM_Init(TIM6, &TIM_InitStruct);
- 5600              		.loc 1 1575 29 is_stmt 0 view .LVU1772
- 5601 004e 1323     		movs	r3, #19
- 5602 0050 0393     		str	r3, [sp, #12]
-1576:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM6);
- 5603              		.loc 1 1576 3 is_stmt 1 view .LVU1773
- 5604 0052 0D4C     		ldr	r4, .L290+12
- 5605 0054 01A9     		add	r1, sp, #4
- 5606 0056 2046     		mov	r0, r4
- 5607 0058 FFF7FEFF 		bl	LL_TIM_Init
- 5608              	.LVL517:
-1577:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
- 5609              		.loc 1 1577 3 view .LVU1774
- 5610              	.LBB525:
-ARM GAS  /tmp/ccwR4KB7.s 			page 329
+ 5703              		.loc 2 1900 5 view .LVU1795
+ARM GAS  /tmp/ccEQxcUB.s 			page 336
 
 
- 5611              	.LBI525:
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5704              		.loc 2 1900 43 is_stmt 0 view .LVU1796
+ 5705 003e 4FF48022 		mov	r2, #262144
+ 5706 0042 5A60     		str	r2, [r3, #4]
+ 5707              	.LVL557:
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5708              		.loc 2 1900 43 view .LVU1797
+ 5709              	.LBE530:
+ 5710              	.LBE529:
+1630:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 5711              		.loc 1 1630 3 is_stmt 1 view .LVU1798
+1630:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 5712              		.loc 1 1630 28 is_stmt 0 view .LVU1799
+ 5713 0044 42F21073 		movw	r3, #10000
+ 5714 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
+1631:Src/main.c    ****   TIM_InitStruct.Autoreload = 560;
+ 5715              		.loc 1 1631 3 is_stmt 1 view .LVU1800
+1631:Src/main.c    ****   TIM_InitStruct.Autoreload = 560;
+ 5716              		.loc 1 1631 30 is_stmt 0 view .LVU1801
+ 5717 004c 0294     		str	r4, [sp, #8]
+1632:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 5718              		.loc 1 1632 3 is_stmt 1 view .LVU1802
+1632:Src/main.c    ****   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 5719              		.loc 1 1632 29 is_stmt 0 view .LVU1803
+ 5720 004e 4FF40C73 		mov	r3, #560
+ 5721 0052 0393     		str	r3, [sp, #12]
+1633:Src/main.c    ****   LL_TIM_Init(TIM5, &TIM_InitStruct);
+ 5722              		.loc 1 1633 3 is_stmt 1 view .LVU1804
+1633:Src/main.c    ****   LL_TIM_Init(TIM5, &TIM_InitStruct);
+ 5723              		.loc 1 1633 32 is_stmt 0 view .LVU1805
+ 5724 0054 0494     		str	r4, [sp, #16]
+1634:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM5);
+ 5725              		.loc 1 1634 3 is_stmt 1 view .LVU1806
+ 5726 0056 0E4C     		ldr	r4, .L307+12
+ 5727 0058 01A9     		add	r1, sp, #4
+ 5728 005a 2046     		mov	r0, r4
+ 5729 005c FFF7FEFF 		bl	LL_TIM_Init
+ 5730              	.LVL558:
+1635:Src/main.c    ****   LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
+ 5731              		.loc 1 1635 3 view .LVU1807
+ 5732              	.LBB531:
+ 5733              	.LBI531:
 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5612              		.loc 5 1504 22 view .LVU1775
- 5613              	.LBB526:
+ 5734              		.loc 5 1504 22 view .LVU1808
+ 5735              	.LBB532:
 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5614              		.loc 5 1506 3 view .LVU1776
- 5615 005c 2368     		ldr	r3, [r4]
- 5616 005e 23F08003 		bic	r3, r3, #128
- 5617 0062 2360     		str	r3, [r4]
- 5618              	.LVL518:
+ 5736              		.loc 5 1506 3 view .LVU1809
+ 5737 0060 2368     		ldr	r3, [r4]
+ 5738 0062 23F08003 		bic	r3, r3, #128
+ 5739 0066 2360     		str	r3, [r4]
+ 5740              	.LVL559:
 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5619              		.loc 5 1506 3 is_stmt 0 view .LVU1777
- 5620              	.LBE526:
- 5621              	.LBE525:
-1578:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM6);
- 5622              		.loc 1 1578 3 is_stmt 1 view .LVU1778
- 5623              	.LBB527:
- 5624              	.LBI527:
+ 5741              		.loc 5 1506 3 is_stmt 0 view .LVU1810
+ 5742              	.LBE532:
+ 5743              	.LBE531:
+1636:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
+ 5744              		.loc 1 1636 3 is_stmt 1 view .LVU1811
+ARM GAS  /tmp/ccEQxcUB.s 			page 337
+
+
+ 5745              	.LBB533:
+ 5746              	.LBI533:
+3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 5747              		.loc 5 3092 22 view .LVU1812
+ 5748              	.LBB534:
+3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 5749              		.loc 5 3094 3 view .LVU1813
+ 5750 0068 A268     		ldr	r2, [r4, #8]
+ 5751 006a 0A4B     		ldr	r3, .L307+16
+ 5752 006c 1340     		ands	r3, r3, r2
+ 5753 006e A360     		str	r3, [r4, #8]
+ 5754              	.LVL560:
+3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 5755              		.loc 5 3094 3 is_stmt 0 view .LVU1814
+ 5756              	.LBE534:
+ 5757              	.LBE533:
+1637:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM5);
+ 5758              		.loc 1 1637 3 is_stmt 1 view .LVU1815
+ 5759              	.LBB535:
+ 5760              	.LBI535:
 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5625              		.loc 5 3138 22 view .LVU1779
- 5626              	.LBB528:
+ 5761              		.loc 5 3138 22 view .LVU1816
+ 5762              	.LBB536:
 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5627              		.loc 5 3140 3 view .LVU1780
- 5628 0064 6368     		ldr	r3, [r4, #4]
- 5629 0066 23F07003 		bic	r3, r3, #112
- 5630 006a 43F01003 		orr	r3, r3, #16
- 5631 006e 6360     		str	r3, [r4, #4]
- 5632              	.LVL519:
+ 5763              		.loc 5 3140 3 view .LVU1817
+ 5764 0070 6368     		ldr	r3, [r4, #4]
+ 5765 0072 23F07003 		bic	r3, r3, #112
+ 5766 0076 6360     		str	r3, [r4, #4]
+ 5767              	.LVL561:
 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5633              		.loc 5 3140 3 is_stmt 0 view .LVU1781
- 5634              	.LBE528:
- 5635              	.LBE527:
-1579:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 2 */
- 5636              		.loc 1 1579 3 is_stmt 1 view .LVU1782
- 5637              	.LBB529:
- 5638              	.LBI529:
+ 5768              		.loc 5 3140 3 is_stmt 0 view .LVU1818
+ 5769              	.LBE536:
+ 5770              	.LBE535:
+1638:Src/main.c    ****   /* USER CODE BEGIN TIM5_Init 2 */
+ 5771              		.loc 1 1638 3 is_stmt 1 view .LVU1819
+ 5772              	.LBB537:
+ 5773              	.LBI537:
 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5639              		.loc 5 3235 22 view .LVU1783
- 5640              	.LBB530:
- 5641              		.loc 5 3237 3 view .LVU1784
- 5642 0070 A368     		ldr	r3, [r4, #8]
- 5643 0072 23F08003 		bic	r3, r3, #128
- 5644 0076 A360     		str	r3, [r4, #8]
- 5645              	.LVL520:
- 5646              		.loc 5 3237 3 is_stmt 0 view .LVU1785
- 5647              	.LBE530:
- 5648              	.LBE529:
-1584:Src/main.c    **** 
- 5649              		.loc 1 1584 1 view .LVU1786
- 5650 0078 06B0     		add	sp, sp, #24
- 5651              	.LCFI61:
- 5652              		.cfi_def_cfa_offset 8
- 5653              		@ sp needed
- 5654 007a 10BD     		pop	{r4, pc}
- 5655              	.L291:
- 5656              		.align	2
- 5657              	.L290:
-ARM GAS  /tmp/ccwR4KB7.s 			page 330
+ 5774              		.loc 5 3235 22 view .LVU1820
+ 5775              	.LBB538:
+ 5776              		.loc 5 3237 3 view .LVU1821
+ 5777 0078 A368     		ldr	r3, [r4, #8]
+ 5778 007a 23F08003 		bic	r3, r3, #128
+ 5779 007e A360     		str	r3, [r4, #8]
+ 5780              	.LVL562:
+ 5781              		.loc 5 3237 3 is_stmt 0 view .LVU1822
+ 5782              	.LBE538:
+ 5783              	.LBE537:
+1643:Src/main.c    **** 
+ 5784              		.loc 1 1643 1 view .LVU1823
+ 5785 0080 06B0     		add	sp, sp, #24
+ 5786              	.LCFI57:
+ 5787              		.cfi_def_cfa_offset 8
+ 5788              		@ sp needed
+ 5789 0082 10BD     		pop	{r4, pc}
+ 5790              	.L308:
+ 5791              		.align	2
+ARM GAS  /tmp/ccEQxcUB.s 			page 338
 
 
- 5658 007c 00380240 		.word	1073887232
- 5659 0080 00ED00E0 		.word	-536810240
- 5660 0084 00E100E0 		.word	-536813312
- 5661 0088 00100040 		.word	1073745920
- 5662              		.cfi_endproc
- 5663              	.LFE1198:
- 5665              		.section	.rodata.Init_params.str1.4,"aMS",%progbits,1
- 5666              		.align	2
- 5667              	.LC0:
- 5668 0000 2F00     		.ascii	"/\000"
- 5669 0002 0000     		.align	2
- 5670              	.LC1:
- 5671 0004 434F4D4D 		.ascii	"COMMAND.TXT\000"
- 5671      414E442E 
- 5671      54585400 
- 5672              		.section	.text.Init_params,"ax",%progbits
- 5673              		.align	1
- 5674              		.syntax unified
- 5675              		.thumb
- 5676              		.thumb_func
- 5678              	Init_params:
- 5679              	.LFB1207:
-2054:Src/main.c    **** 	TO6 = 0;
- 5680              		.loc 1 2054 1 is_stmt 1 view -0
- 5681              		.cfi_startproc
- 5682              		@ args = 0, pretend = 0, frame = 0
- 5683              		@ frame_needed = 0, uses_anonymous_args = 0
- 5684 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
- 5685              	.LCFI62:
- 5686              		.cfi_def_cfa_offset 24
- 5687              		.cfi_offset 4, -24
- 5688              		.cfi_offset 5, -20
- 5689              		.cfi_offset 6, -16
- 5690              		.cfi_offset 7, -12
- 5691              		.cfi_offset 8, -8
- 5692              		.cfi_offset 14, -4
-2055:Src/main.c    **** 	TO7 = 0;
- 5693              		.loc 1 2055 2 view .LVU1788
-2055:Src/main.c    **** 	TO7 = 0;
- 5694              		.loc 1 2055 6 is_stmt 0 view .LVU1789
- 5695 0004 0023     		movs	r3, #0
- 5696 0006 9F4A     		ldr	r2, .L304
- 5697 0008 1360     		str	r3, [r2]
-2056:Src/main.c    **** 	TO7_before = 0;
- 5698              		.loc 1 2056 2 is_stmt 1 view .LVU1790
-2056:Src/main.c    **** 	TO7_before = 0;
- 5699              		.loc 1 2056 6 is_stmt 0 view .LVU1791
- 5700 000a 9F4A     		ldr	r2, .L304+4
- 5701 000c 1360     		str	r3, [r2]
-2057:Src/main.c    **** 	TO6_before = 0;
- 5702              		.loc 1 2057 2 is_stmt 1 view .LVU1792
-2057:Src/main.c    **** 	TO6_before = 0;
- 5703              		.loc 1 2057 13 is_stmt 0 view .LVU1793
- 5704 000e 9F4A     		ldr	r2, .L304+8
- 5705 0010 1360     		str	r3, [r2]
-2058:Src/main.c    **** 	TO6_uart = 0;
- 5706              		.loc 1 2058 2 is_stmt 1 view .LVU1794
-ARM GAS  /tmp/ccwR4KB7.s 			page 331
+ 5792              	.L307:
+ 5793 0084 00380240 		.word	1073887232
+ 5794 0088 00ED00E0 		.word	-536810240
+ 5795 008c 00E100E0 		.word	-536813312
+ 5796 0090 000C0040 		.word	1073744896
+ 5797 0094 F8BFFEFF 		.word	-81928
+ 5798              		.cfi_endproc
+ 5799              	.LFE1197:
+ 5801              		.section	.text.MX_TIM7_Init,"ax",%progbits
+ 5802              		.align	1
+ 5803              		.syntax unified
+ 5804              		.thumb
+ 5805              		.thumb_func
+ 5807              	MX_TIM7_Init:
+ 5808              	.LFB1199:
+1688:Src/main.c    **** 
+ 5809              		.loc 1 1688 1 is_stmt 1 view -0
+ 5810              		.cfi_startproc
+ 5811              		@ args = 0, pretend = 0, frame = 24
+ 5812              		@ frame_needed = 0, uses_anonymous_args = 0
+ 5813 0000 10B5     		push	{r4, lr}
+ 5814              	.LCFI58:
+ 5815              		.cfi_def_cfa_offset 8
+ 5816              		.cfi_offset 4, -8
+ 5817              		.cfi_offset 14, -4
+ 5818 0002 86B0     		sub	sp, sp, #24
+ 5819              	.LCFI59:
+ 5820              		.cfi_def_cfa_offset 32
+1694:Src/main.c    **** 
+ 5821              		.loc 1 1694 3 view .LVU1825
+1694:Src/main.c    **** 
+ 5822              		.loc 1 1694 22 is_stmt 0 view .LVU1826
+ 5823 0004 0024     		movs	r4, #0
+ 5824 0006 0194     		str	r4, [sp, #4]
+ 5825 0008 0294     		str	r4, [sp, #8]
+ 5826 000a 0394     		str	r4, [sp, #12]
+ 5827 000c 0494     		str	r4, [sp, #16]
+ 5828 000e 0594     		str	r4, [sp, #20]
+1697:Src/main.c    **** 
+ 5829              		.loc 1 1697 3 is_stmt 1 view .LVU1827
+ 5830              	.LVL563:
+ 5831              	.LBB539:
+ 5832              	.LBI539:
+1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 5833              		.loc 3 1071 22 view .LVU1828
+ 5834              	.LBB540:
+1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
+ 5835              		.loc 3 1073 3 view .LVU1829
+1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
+ 5836              		.loc 3 1074 3 view .LVU1830
+ 5837 0010 1A4B     		ldr	r3, .L311
+ 5838 0012 1A6C     		ldr	r2, [r3, #64]
+ 5839 0014 42F02002 		orr	r2, r2, #32
+ 5840 0018 1A64     		str	r2, [r3, #64]
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5841              		.loc 3 1076 3 view .LVU1831
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ARM GAS  /tmp/ccEQxcUB.s 			page 339
 
 
-2058:Src/main.c    **** 	TO6_uart = 0;
- 5707              		.loc 1 2058 13 is_stmt 0 view .LVU1795
- 5708 0012 9F4A     		ldr	r2, .L304+12
- 5709 0014 1360     		str	r3, [r2]
-2059:Src/main.c    **** 	flg_tmt = 0;
- 5710              		.loc 1 2059 2 is_stmt 1 view .LVU1796
-2059:Src/main.c    **** 	flg_tmt = 0;
- 5711              		.loc 1 2059 11 is_stmt 0 view .LVU1797
- 5712 0016 9F4A     		ldr	r2, .L304+16
- 5713 0018 1360     		str	r3, [r2]
-2060:Src/main.c    **** 	UART_rec_incr = 0;
- 5714              		.loc 1 2060 2 is_stmt 1 view .LVU1798
-2060:Src/main.c    **** 	UART_rec_incr = 0;
- 5715              		.loc 1 2060 10 is_stmt 0 view .LVU1799
- 5716 001a 9F4A     		ldr	r2, .L304+20
- 5717 001c 1370     		strb	r3, [r2]
-2061:Src/main.c    **** 	fgoto = 0;
- 5718              		.loc 1 2061 2 is_stmt 1 view .LVU1800
-2061:Src/main.c    **** 	fgoto = 0;
- 5719              		.loc 1 2061 16 is_stmt 0 view .LVU1801
- 5720 001e 9F4A     		ldr	r2, .L304+24
- 5721 0020 1380     		strh	r3, [r2]	@ movhi
-2062:Src/main.c    **** 	sizeoffile = 0;
- 5722              		.loc 1 2062 2 is_stmt 1 view .LVU1802
-2062:Src/main.c    **** 	sizeoffile = 0;
- 5723              		.loc 1 2062 8 is_stmt 0 view .LVU1803
- 5724 0022 9F4A     		ldr	r2, .L304+28
- 5725 0024 1360     		str	r3, [r2]
-2063:Src/main.c    **** 	u_tx_flg = 0;
- 5726              		.loc 1 2063 2 is_stmt 1 view .LVU1804
-2063:Src/main.c    **** 	u_tx_flg = 0;
- 5727              		.loc 1 2063 13 is_stmt 0 view .LVU1805
- 5728 0026 9F4A     		ldr	r2, .L304+32
- 5729 0028 1360     		str	r3, [r2]
-2064:Src/main.c    **** 	u_rx_flg = 0;
- 5730              		.loc 1 2064 2 is_stmt 1 view .LVU1806
-2064:Src/main.c    **** 	u_rx_flg = 0;
- 5731              		.loc 1 2064 11 is_stmt 0 view .LVU1807
- 5732 002a 9F4A     		ldr	r2, .L304+36
- 5733 002c 1370     		strb	r3, [r2]
-2065:Src/main.c    **** 	//State_Data[0]=0;
- 5734              		.loc 1 2065 2 is_stmt 1 view .LVU1808
-2065:Src/main.c    **** 	//State_Data[0]=0;
- 5735              		.loc 1 2065 11 is_stmt 0 view .LVU1809
- 5736 002e 9F4A     		ldr	r2, .L304+40
- 5737 0030 1370     		strb	r3, [r2]
-2068:Src/main.c    **** 	{
- 5738              		.loc 1 2068 2 is_stmt 1 view .LVU1810
- 5739              	.LBB531:
-2068:Src/main.c    **** 	{
- 5740              		.loc 1 2068 7 view .LVU1811
- 5741              	.LVL521:
-2068:Src/main.c    **** 	{
- 5742              		.loc 1 2068 2 is_stmt 0 view .LVU1812
- 5743 0032 05E0     		b	.L293
- 5744              	.LVL522:
- 5745              	.L294:
-ARM GAS  /tmp/ccwR4KB7.s 			page 332
+ 5842              		.loc 3 1076 12 is_stmt 0 view .LVU1832
+ 5843 001a 1B6C     		ldr	r3, [r3, #64]
+ 5844 001c 03F02003 		and	r3, r3, #32
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 5845              		.loc 3 1076 10 view .LVU1833
+ 5846 0020 0093     		str	r3, [sp]
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 5847              		.loc 3 1077 3 is_stmt 1 view .LVU1834
+ 5848 0022 009B     		ldr	r3, [sp]
+ 5849              	.LVL564:
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 5850              		.loc 3 1077 3 is_stmt 0 view .LVU1835
+ 5851              	.LBE540:
+ 5852              	.LBE539:
+1700:Src/main.c    ****   NVIC_EnableIRQ(TIM7_IRQn);
+ 5853              		.loc 1 1700 3 is_stmt 1 view .LVU1836
+ 5854              	.LBB541:
+ 5855              	.LBI541:
+1884:Drivers/CMSIS/Include/core_cm7.h **** {
+ 5856              		.loc 2 1884 26 view .LVU1837
+ 5857              	.LBB542:
+1886:Drivers/CMSIS/Include/core_cm7.h **** }
+ 5858              		.loc 2 1886 3 view .LVU1838
+1886:Drivers/CMSIS/Include/core_cm7.h **** }
+ 5859              		.loc 2 1886 26 is_stmt 0 view .LVU1839
+ 5860 0024 164B     		ldr	r3, .L311+4
+ 5861 0026 D868     		ldr	r0, [r3, #12]
+ 5862              	.LBE542:
+ 5863              	.LBE541:
+1700:Src/main.c    ****   NVIC_EnableIRQ(TIM7_IRQn);
+ 5864              		.loc 1 1700 3 discriminator 1 view .LVU1840
+ 5865 0028 2246     		mov	r2, r4
+ 5866 002a 2146     		mov	r1, r4
+ 5867 002c C0F30220 		ubfx	r0, r0, #8, #3
+ 5868 0030 FFF7FEFF 		bl	NVIC_EncodePriority
+ 5869              	.LVL565:
+ 5870              	.LBB543:
+ 5871              	.LBI543:
+2024:Drivers/CMSIS/Include/core_cm7.h **** {
+ 5872              		.loc 2 2024 22 is_stmt 1 view .LVU1841
+ 5873              	.LBB544:
+2026:Drivers/CMSIS/Include/core_cm7.h ****   {
+ 5874              		.loc 2 2026 3 view .LVU1842
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5875              		.loc 2 2028 5 view .LVU1843
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5876              		.loc 2 2028 49 is_stmt 0 view .LVU1844
+ 5877 0034 0001     		lsls	r0, r0, #4
+ 5878              	.LVL566:
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5879              		.loc 2 2028 49 view .LVU1845
+ 5880 0036 C0B2     		uxtb	r0, r0
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5881              		.loc 2 2028 47 view .LVU1846
+ 5882 0038 124B     		ldr	r3, .L311+8
+ 5883 003a 83F83703 		strb	r0, [r3, #823]
+ 5884              	.LVL567:
+ARM GAS  /tmp/ccEQxcUB.s 			page 340
 
 
-2070:Src/main.c    **** 	}
- 5746              		.loc 1 2070 3 is_stmt 1 view .LVU1813
-2070:Src/main.c    **** 	}
- 5747              		.loc 1 2070 16 is_stmt 0 view .LVU1814
- 5748 0034 9E4A     		ldr	r2, .L304+44
- 5749 0036 0021     		movs	r1, #0
- 5750 0038 22F81310 		strh	r1, [r2, r3, lsl #1]	@ movhi
-2068:Src/main.c    **** 	{
- 5751              		.loc 1 2068 31 is_stmt 1 discriminator 3 view .LVU1815
- 5752 003c 0133     		adds	r3, r3, #1
- 5753              	.LVL523:
-2068:Src/main.c    **** 	{
- 5754              		.loc 1 2068 31 is_stmt 0 discriminator 3 view .LVU1816
- 5755 003e 9BB2     		uxth	r3, r3
- 5756              	.LVL524:
- 5757              	.L293:
-2068:Src/main.c    **** 	{
- 5758              		.loc 1 2068 22 is_stmt 1 discriminator 1 view .LVU1817
- 5759 0040 0E2B     		cmp	r3, #14
- 5760 0042 F7D9     		bls	.L294
- 5761              	.LBE531:
-2072:Src/main.c    **** 	
- 5762              		.loc 1 2072 2 view .LVU1818
-2072:Src/main.c    **** 	
- 5763              		.loc 1 2072 14 is_stmt 0 view .LVU1819
- 5764 0044 9A4B     		ldr	r3, .L304+44
- 5765              	.LVL525:
-2072:Src/main.c    **** 	
- 5766              		.loc 1 2072 14 view .LVU1820
- 5767 0046 41F21112 		movw	r2, #4369
- 5768 004a 1A80     		strh	r2, [r3]	@ movhi
-2075:Src/main.c    **** 	Def_setup.LD1_EN = 0;
- 5769              		.loc 1 2075 2 is_stmt 1 view .LVU1821
-2075:Src/main.c    **** 	Def_setup.LD1_EN = 0;
- 5770              		.loc 1 2075 21 is_stmt 0 view .LVU1822
- 5771 004c 994B     		ldr	r3, .L304+48
- 5772 004e 0022     		movs	r2, #0
- 5773 0050 DA81     		strh	r2, [r3, #14]	@ movhi
-2076:Src/main.c    **** 	Def_setup.LD2_EN = 0;
- 5774              		.loc 1 2076 2 is_stmt 1 view .LVU1823
-2076:Src/main.c    **** 	Def_setup.LD2_EN = 0;
- 5775              		.loc 1 2076 19 is_stmt 0 view .LVU1824
- 5776 0052 DA70     		strb	r2, [r3, #3]
-2077:Src/main.c    **** 	Def_setup.MES_ID = 0;
- 5777              		.loc 1 2077 2 is_stmt 1 view .LVU1825
-2077:Src/main.c    **** 	Def_setup.MES_ID = 0;
- 5778              		.loc 1 2077 19 is_stmt 0 view .LVU1826
- 5779 0054 1A71     		strb	r2, [r3, #4]
-2078:Src/main.c    **** 	Def_setup.PI1_RD = 0;
- 5780              		.loc 1 2078 2 is_stmt 1 view .LVU1827
-2078:Src/main.c    **** 	Def_setup.PI1_RD = 0;
- 5781              		.loc 1 2078 19 is_stmt 0 view .LVU1828
- 5782 0056 1A82     		strh	r2, [r3, #16]	@ movhi
-2079:Src/main.c    **** 	Def_setup.PI2_RD = 0;
- 5783              		.loc 1 2079 2 is_stmt 1 view .LVU1829
-2079:Src/main.c    **** 	Def_setup.PI2_RD = 0;
- 5784              		.loc 1 2079 19 is_stmt 0 view .LVU1830
-ARM GAS  /tmp/ccwR4KB7.s 			page 333
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5885              		.loc 2 2028 47 view .LVU1847
+ 5886              	.LBE544:
+ 5887              	.LBE543:
+1701:Src/main.c    **** 
+ 5888              		.loc 1 1701 3 is_stmt 1 view .LVU1848
+ 5889              	.LBB545:
+ 5890              	.LBI545:
+1896:Drivers/CMSIS/Include/core_cm7.h **** {
+ 5891              		.loc 2 1896 22 view .LVU1849
+ 5892              	.LBB546:
+1898:Drivers/CMSIS/Include/core_cm7.h ****   {
+ 5893              		.loc 2 1898 3 view .LVU1850
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5894              		.loc 2 1900 5 view .LVU1851
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5895              		.loc 2 1900 43 is_stmt 0 view .LVU1852
+ 5896 003e 4FF40002 		mov	r2, #8388608
+ 5897 0042 5A60     		str	r2, [r3, #4]
+ 5898              	.LVL568:
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 5899              		.loc 2 1900 43 view .LVU1853
+ 5900              	.LBE546:
+ 5901              	.LBE545:
+1706:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 5902              		.loc 1 1706 3 is_stmt 1 view .LVU1854
+1706:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 5903              		.loc 1 1706 28 is_stmt 0 view .LVU1855
+ 5904 0044 40F29733 		movw	r3, #919
+ 5905 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
+1707:Src/main.c    ****   TIM_InitStruct.Autoreload = 99;
+ 5906              		.loc 1 1707 3 is_stmt 1 view .LVU1856
+1707:Src/main.c    ****   TIM_InitStruct.Autoreload = 99;
+ 5907              		.loc 1 1707 30 is_stmt 0 view .LVU1857
+ 5908 004c 0294     		str	r4, [sp, #8]
+1708:Src/main.c    ****   LL_TIM_Init(TIM7, &TIM_InitStruct);
+ 5909              		.loc 1 1708 3 is_stmt 1 view .LVU1858
+1708:Src/main.c    ****   LL_TIM_Init(TIM7, &TIM_InitStruct);
+ 5910              		.loc 1 1708 29 is_stmt 0 view .LVU1859
+ 5911 004e 6323     		movs	r3, #99
+ 5912 0050 0393     		str	r3, [sp, #12]
+1709:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM7);
+ 5913              		.loc 1 1709 3 is_stmt 1 view .LVU1860
+ 5914 0052 0D4C     		ldr	r4, .L311+12
+ 5915 0054 01A9     		add	r1, sp, #4
+ 5916 0056 2046     		mov	r0, r4
+ 5917 0058 FFF7FEFF 		bl	LL_TIM_Init
+ 5918              	.LVL569:
+1710:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
+ 5919              		.loc 1 1710 3 view .LVU1861
+ 5920              	.LBB547:
+ 5921              	.LBI547:
+1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 5922              		.loc 5 1504 22 view .LVU1862
+ 5923              	.LBB548:
+1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 5924              		.loc 5 1506 3 view .LVU1863
+ARM GAS  /tmp/ccEQxcUB.s 			page 341
 
 
- 5785 0058 1A73     		strb	r2, [r3, #12]
-2080:Src/main.c    **** 	Def_setup.REF1_EN = 0;
- 5786              		.loc 1 2080 2 is_stmt 1 view .LVU1831
-2080:Src/main.c    **** 	Def_setup.REF1_EN = 0;
- 5787              		.loc 1 2080 19 is_stmt 0 view .LVU1832
- 5788 005a 5A73     		strb	r2, [r3, #13]
-2081:Src/main.c    **** 	Def_setup.REF2_EN = 0;
- 5789              		.loc 1 2081 2 is_stmt 1 view .LVU1833
-2081:Src/main.c    **** 	Def_setup.REF2_EN = 0;
- 5790              		.loc 1 2081 20 is_stmt 0 view .LVU1834
- 5791 005c 5A71     		strb	r2, [r3, #5]
-2082:Src/main.c    **** 	Def_setup.SD_EN = 0;
- 5792              		.loc 1 2082 2 is_stmt 1 view .LVU1835
-2082:Src/main.c    **** 	Def_setup.SD_EN = 0;
- 5793              		.loc 1 2082 20 is_stmt 0 view .LVU1836
- 5794 005e 9A71     		strb	r2, [r3, #6]
-2083:Src/main.c    **** 	Def_setup.TEC1_EN = 0;
- 5795              		.loc 1 2083 2 is_stmt 1 view .LVU1837
-2083:Src/main.c    **** 	Def_setup.TEC1_EN = 0;
- 5796              		.loc 1 2083 18 is_stmt 0 view .LVU1838
- 5797 0060 DA72     		strb	r2, [r3, #11]
-2084:Src/main.c    **** 	Def_setup.TEC2_EN = 0;
- 5798              		.loc 1 2084 2 is_stmt 1 view .LVU1839
-2084:Src/main.c    **** 	Def_setup.TEC2_EN = 0;
- 5799              		.loc 1 2084 20 is_stmt 0 view .LVU1840
- 5800 0062 DA71     		strb	r2, [r3, #7]
-2085:Src/main.c    **** 	Def_setup.TS1_EN = 0;
- 5801              		.loc 1 2085 2 is_stmt 1 view .LVU1841
-2085:Src/main.c    **** 	Def_setup.TS1_EN = 0;
- 5802              		.loc 1 2085 20 is_stmt 0 view .LVU1842
- 5803 0064 1A72     		strb	r2, [r3, #8]
-2086:Src/main.c    **** 	Def_setup.TS2_EN = 0;
- 5804              		.loc 1 2086 2 is_stmt 1 view .LVU1843
-2086:Src/main.c    **** 	Def_setup.TS2_EN = 0;
- 5805              		.loc 1 2086 19 is_stmt 0 view .LVU1844
- 5806 0066 5A72     		strb	r2, [r3, #9]
-2087:Src/main.c    **** 	Def_setup.U5V1_EN = 0;
- 5807              		.loc 1 2087 2 is_stmt 1 view .LVU1845
-2087:Src/main.c    **** 	Def_setup.U5V1_EN = 0;
- 5808              		.loc 1 2087 19 is_stmt 0 view .LVU1846
- 5809 0068 9A72     		strb	r2, [r3, #10]
-2088:Src/main.c    **** 	Def_setup.U5V2_EN = 0;
- 5810              		.loc 1 2088 2 is_stmt 1 view .LVU1847
-2088:Src/main.c    **** 	Def_setup.U5V2_EN = 0;
- 5811              		.loc 1 2088 20 is_stmt 0 view .LVU1848
- 5812 006a 5A70     		strb	r2, [r3, #1]
-2089:Src/main.c    **** 	Def_setup.WORK_EN = 0;
- 5813              		.loc 1 2089 2 is_stmt 1 view .LVU1849
-2089:Src/main.c    **** 	Def_setup.WORK_EN = 0;
- 5814              		.loc 1 2089 20 is_stmt 0 view .LVU1850
- 5815 006c 9A70     		strb	r2, [r3, #2]
-2090:Src/main.c    **** 	
- 5816              		.loc 1 2090 2 is_stmt 1 view .LVU1851
-2090:Src/main.c    **** 	
- 5817              		.loc 1 2090 20 is_stmt 0 view .LVU1852
- 5818 006e 1A70     		strb	r2, [r3]
-2092:Src/main.c    **** 	LD2_def_setup.LD_TEMP = 0;
-ARM GAS  /tmp/ccwR4KB7.s 			page 334
+ 5925 005c 2368     		ldr	r3, [r4]
+ 5926 005e 23F08003 		bic	r3, r3, #128
+ 5927 0062 2360     		str	r3, [r4]
+ 5928              	.LVL570:
+1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 5929              		.loc 5 1506 3 is_stmt 0 view .LVU1864
+ 5930              	.LBE548:
+ 5931              	.LBE547:
+1711:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM7);
+ 5932              		.loc 1 1711 3 is_stmt 1 view .LVU1865
+ 5933              	.LBB549:
+ 5934              	.LBI549:
+3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 5935              		.loc 5 3138 22 view .LVU1866
+ 5936              	.LBB550:
+3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 5937              		.loc 5 3140 3 view .LVU1867
+ 5938 0064 6368     		ldr	r3, [r4, #4]
+ 5939 0066 23F07003 		bic	r3, r3, #112
+ 5940 006a 43F01003 		orr	r3, r3, #16
+ 5941 006e 6360     		str	r3, [r4, #4]
+ 5942              	.LVL571:
+3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 5943              		.loc 5 3140 3 is_stmt 0 view .LVU1868
+ 5944              	.LBE550:
+ 5945              	.LBE549:
+1712:Src/main.c    ****   /* USER CODE BEGIN TIM7_Init 2 */
+ 5946              		.loc 1 1712 3 is_stmt 1 view .LVU1869
+ 5947              	.LBB551:
+ 5948              	.LBI551:
+3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 5949              		.loc 5 3235 22 view .LVU1870
+ 5950              	.LBB552:
+ 5951              		.loc 5 3237 3 view .LVU1871
+ 5952 0070 A368     		ldr	r3, [r4, #8]
+ 5953 0072 23F08003 		bic	r3, r3, #128
+ 5954 0076 A360     		str	r3, [r4, #8]
+ 5955              	.LVL572:
+ 5956              		.loc 5 3237 3 is_stmt 0 view .LVU1872
+ 5957              	.LBE552:
+ 5958              	.LBE551:
+1717:Src/main.c    **** 
+ 5959              		.loc 1 1717 1 view .LVU1873
+ 5960 0078 06B0     		add	sp, sp, #24
+ 5961              	.LCFI60:
+ 5962              		.cfi_def_cfa_offset 8
+ 5963              		@ sp needed
+ 5964 007a 10BD     		pop	{r4, pc}
+ 5965              	.L312:
+ 5966              		.align	2
+ 5967              	.L311:
+ 5968 007c 00380240 		.word	1073887232
+ 5969 0080 00ED00E0 		.word	-536810240
+ 5970 0084 00E100E0 		.word	-536813312
+ 5971 0088 00140040 		.word	1073746944
+ 5972              		.cfi_endproc
+ 5973              	.LFE1199:
+ARM GAS  /tmp/ccEQxcUB.s 			page 342
 
 
- 5819              		.loc 1 2092 2 is_stmt 1 view .LVU1853
-2092:Src/main.c    **** 	LD2_def_setup.LD_TEMP = 0;
- 5820              		.loc 1 2092 24 is_stmt 0 view .LVU1854
- 5821 0070 914D     		ldr	r5, .L304+52
- 5822 0072 2A80     		strh	r2, [r5]	@ movhi
-2093:Src/main.c    **** 	LD1_def_setup.P_coef_temp = 0;
- 5823              		.loc 1 2093 2 is_stmt 1 view .LVU1855
-2093:Src/main.c    **** 	LD1_def_setup.P_coef_temp = 0;
- 5824              		.loc 1 2093 24 is_stmt 0 view .LVU1856
- 5825 0074 914C     		ldr	r4, .L304+56
- 5826 0076 2280     		strh	r2, [r4]	@ movhi
-2094:Src/main.c    **** 	LD2_def_setup.P_coef_temp = 0;
- 5827              		.loc 1 2094 2 is_stmt 1 view .LVU1857
-2094:Src/main.c    **** 	LD2_def_setup.P_coef_temp = 0;
- 5828              		.loc 1 2094 28 is_stmt 0 view .LVU1858
- 5829 0078 0022     		movs	r2, #0
- 5830 007a 6A60     		str	r2, [r5, #4]	@ float
-2095:Src/main.c    **** 	LD1_def_setup.I_coef_temp = 0;
- 5831              		.loc 1 2095 2 is_stmt 1 view .LVU1859
-2095:Src/main.c    **** 	LD1_def_setup.I_coef_temp = 0;
- 5832              		.loc 1 2095 28 is_stmt 0 view .LVU1860
- 5833 007c 6260     		str	r2, [r4, #4]	@ float
-2096:Src/main.c    **** 	LD2_def_setup.I_coef_temp = 0;
- 5834              		.loc 1 2096 2 is_stmt 1 view .LVU1861
-2096:Src/main.c    **** 	LD2_def_setup.I_coef_temp = 0;
- 5835              		.loc 1 2096 28 is_stmt 0 view .LVU1862
- 5836 007e AA60     		str	r2, [r5, #8]	@ float
-2097:Src/main.c    **** 	
- 5837              		.loc 1 2097 2 is_stmt 1 view .LVU1863
-2097:Src/main.c    **** 	
- 5838              		.loc 1 2097 28 is_stmt 0 view .LVU1864
- 5839 0080 A260     		str	r2, [r4, #8]	@ float
-2100:Src/main.c    **** 	LD1_curr_setup = LD1_def_setup;
- 5840              		.loc 1 2100 2 is_stmt 1 view .LVU1865
-2100:Src/main.c    **** 	LD1_curr_setup = LD1_def_setup;
- 5841              		.loc 1 2100 13 is_stmt 0 view .LVU1866
- 5842 0082 8F4E     		ldr	r6, .L304+60
- 5843 0084 9C46     		mov	ip, r3
- 5844 0086 BCE80F00 		ldmia	ip!, {r0, r1, r2, r3}
- 5845 008a 0FC6     		stmia	r6!, {r0, r1, r2, r3}
- 5846 008c DCF80030 		ldr	r3, [ip]
- 5847 0090 3380     		strh	r3, [r6]	@ movhi
-2101:Src/main.c    **** 	LD2_curr_setup = LD2_def_setup;
- 5848              		.loc 1 2101 2 is_stmt 1 view .LVU1867
-2101:Src/main.c    **** 	LD2_curr_setup = LD2_def_setup;
- 5849              		.loc 1 2101 17 is_stmt 0 view .LVU1868
- 5850 0092 8C4E     		ldr	r6, .L304+64
- 5851 0094 95E80F00 		ldm	r5, {r0, r1, r2, r3}
- 5852 0098 86E80F00 		stm	r6, {r0, r1, r2, r3}
-2102:Src/main.c    **** 	
- 5853              		.loc 1 2102 2 is_stmt 1 view .LVU1869
-2102:Src/main.c    **** 	
- 5854              		.loc 1 2102 17 is_stmt 0 view .LVU1870
- 5855 009c 8A4D     		ldr	r5, .L304+68
- 5856 009e 94E80F00 		ldm	r4, {r0, r1, r2, r3}
- 5857 00a2 85E80F00 		stm	r5, {r0, r1, r2, r3}
-2107:Src/main.c    **** 	LL_TIM_EnableCounter(TIM6);
-ARM GAS  /tmp/ccwR4KB7.s 			page 335
+ 5975              		.section	.text.MX_TIM6_Init,"ax",%progbits
+ 5976              		.align	1
+ 5977              		.syntax unified
+ 5978              		.thumb
+ 5979              		.thumb_func
+ 5981              	MX_TIM6_Init:
+ 5982              	.LFB1198:
+1651:Src/main.c    **** 
+ 5983              		.loc 1 1651 1 is_stmt 1 view -0
+ 5984              		.cfi_startproc
+ 5985              		@ args = 0, pretend = 0, frame = 24
+ 5986              		@ frame_needed = 0, uses_anonymous_args = 0
+ 5987 0000 10B5     		push	{r4, lr}
+ 5988              	.LCFI61:
+ 5989              		.cfi_def_cfa_offset 8
+ 5990              		.cfi_offset 4, -8
+ 5991              		.cfi_offset 14, -4
+ 5992 0002 86B0     		sub	sp, sp, #24
+ 5993              	.LCFI62:
+ 5994              		.cfi_def_cfa_offset 32
+1657:Src/main.c    **** 
+ 5995              		.loc 1 1657 3 view .LVU1875
+1657:Src/main.c    **** 
+ 5996              		.loc 1 1657 22 is_stmt 0 view .LVU1876
+ 5997 0004 0024     		movs	r4, #0
+ 5998 0006 0194     		str	r4, [sp, #4]
+ 5999 0008 0294     		str	r4, [sp, #8]
+ 6000 000a 0394     		str	r4, [sp, #12]
+ 6001 000c 0494     		str	r4, [sp, #16]
+ 6002 000e 0594     		str	r4, [sp, #20]
+1660:Src/main.c    **** 
+ 6003              		.loc 1 1660 3 is_stmt 1 view .LVU1877
+ 6004              	.LVL573:
+ 6005              	.LBB553:
+ 6006              	.LBI553:
+1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 6007              		.loc 3 1071 22 view .LVU1878
+ 6008              	.LBB554:
+1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
+ 6009              		.loc 3 1073 3 view .LVU1879
+1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
+ 6010              		.loc 3 1074 3 view .LVU1880
+ 6011 0010 1A4B     		ldr	r3, .L315
+ 6012 0012 1A6C     		ldr	r2, [r3, #64]
+ 6013 0014 42F01002 		orr	r2, r2, #16
+ 6014 0018 1A64     		str	r2, [r3, #64]
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 6015              		.loc 3 1076 3 view .LVU1881
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 6016              		.loc 3 1076 12 is_stmt 0 view .LVU1882
+ 6017 001a 1B6C     		ldr	r3, [r3, #64]
+ 6018 001c 03F01003 		and	r3, r3, #16
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
+ 6019              		.loc 3 1076 10 view .LVU1883
+ 6020 0020 0093     		str	r3, [sp]
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 6021              		.loc 3 1077 3 is_stmt 1 view .LVU1884
+ARM GAS  /tmp/ccEQxcUB.s 			page 343
 
 
- 5858              		.loc 1 2107 2 is_stmt 1 view .LVU1871
- 5859              	.LVL526:
- 5860              	.LBB532:
- 5861              	.LBI532:
+ 6022 0022 009B     		ldr	r3, [sp]
+ 6023              	.LVL574:
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 6024              		.loc 3 1077 3 is_stmt 0 view .LVU1885
+ 6025              	.LBE554:
+ 6026              	.LBE553:
+1663:Src/main.c    ****   NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 6027              		.loc 1 1663 3 is_stmt 1 view .LVU1886
+ 6028              	.LBB555:
+ 6029              	.LBI555:
+1884:Drivers/CMSIS/Include/core_cm7.h **** {
+ 6030              		.loc 2 1884 26 view .LVU1887
+ 6031              	.LBB556:
+1886:Drivers/CMSIS/Include/core_cm7.h **** }
+ 6032              		.loc 2 1886 3 view .LVU1888
+1886:Drivers/CMSIS/Include/core_cm7.h **** }
+ 6033              		.loc 2 1886 26 is_stmt 0 view .LVU1889
+ 6034 0024 164B     		ldr	r3, .L315+4
+ 6035 0026 D868     		ldr	r0, [r3, #12]
+ 6036              	.LBE556:
+ 6037              	.LBE555:
+1663:Src/main.c    ****   NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 6038              		.loc 1 1663 3 discriminator 1 view .LVU1890
+ 6039 0028 2246     		mov	r2, r4
+ 6040 002a 2146     		mov	r1, r4
+ 6041 002c C0F30220 		ubfx	r0, r0, #8, #3
+ 6042 0030 FFF7FEFF 		bl	NVIC_EncodePriority
+ 6043              	.LVL575:
+ 6044              	.LBB557:
+ 6045              	.LBI557:
+2024:Drivers/CMSIS/Include/core_cm7.h **** {
+ 6046              		.loc 2 2024 22 is_stmt 1 view .LVU1891
+ 6047              	.LBB558:
+2026:Drivers/CMSIS/Include/core_cm7.h ****   {
+ 6048              		.loc 2 2026 3 view .LVU1892
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6049              		.loc 2 2028 5 view .LVU1893
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6050              		.loc 2 2028 49 is_stmt 0 view .LVU1894
+ 6051 0034 0001     		lsls	r0, r0, #4
+ 6052              	.LVL576:
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6053              		.loc 2 2028 49 view .LVU1895
+ 6054 0036 C0B2     		uxtb	r0, r0
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6055              		.loc 2 2028 47 view .LVU1896
+ 6056 0038 124B     		ldr	r3, .L315+8
+ 6057 003a 83F83603 		strb	r0, [r3, #822]
+ 6058              	.LVL577:
+2028:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6059              		.loc 2 2028 47 view .LVU1897
+ 6060              	.LBE558:
+ 6061              	.LBE557:
+1664:Src/main.c    **** 
+ 6062              		.loc 1 1664 3 is_stmt 1 view .LVU1898
+ 6063              	.LBB559:
+ 6064              	.LBI559:
+ARM GAS  /tmp/ccEQxcUB.s 			page 344
+
+
+1896:Drivers/CMSIS/Include/core_cm7.h **** {
+ 6065              		.loc 2 1896 22 view .LVU1899
+ 6066              	.LBB560:
+1898:Drivers/CMSIS/Include/core_cm7.h ****   {
+ 6067              		.loc 2 1898 3 view .LVU1900
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6068              		.loc 2 1900 5 view .LVU1901
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6069              		.loc 2 1900 43 is_stmt 0 view .LVU1902
+ 6070 003e 4FF48002 		mov	r2, #4194304
+ 6071 0042 5A60     		str	r2, [r3, #4]
+ 6072              	.LVL578:
+1900:Drivers/CMSIS/Include/core_cm7.h ****   }
+ 6073              		.loc 2 1900 43 view .LVU1903
+ 6074              	.LBE560:
+ 6075              	.LBE559:
+1669:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 6076              		.loc 1 1669 3 is_stmt 1 view .LVU1904
+1669:Src/main.c    ****   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 6077              		.loc 1 1669 28 is_stmt 0 view .LVU1905
+ 6078 0044 4BF2AF33 		movw	r3, #45999
+ 6079 0048 ADF80430 		strh	r3, [sp, #4]	@ movhi
+1670:Src/main.c    ****   TIM_InitStruct.Autoreload = 19;
+ 6080              		.loc 1 1670 3 is_stmt 1 view .LVU1906
+1670:Src/main.c    ****   TIM_InitStruct.Autoreload = 19;
+ 6081              		.loc 1 1670 30 is_stmt 0 view .LVU1907
+ 6082 004c 0294     		str	r4, [sp, #8]
+1671:Src/main.c    ****   LL_TIM_Init(TIM6, &TIM_InitStruct);
+ 6083              		.loc 1 1671 3 is_stmt 1 view .LVU1908
+1671:Src/main.c    ****   LL_TIM_Init(TIM6, &TIM_InitStruct);
+ 6084              		.loc 1 1671 29 is_stmt 0 view .LVU1909
+ 6085 004e 1323     		movs	r3, #19
+ 6086 0050 0393     		str	r3, [sp, #12]
+1672:Src/main.c    ****   LL_TIM_DisableARRPreload(TIM6);
+ 6087              		.loc 1 1672 3 is_stmt 1 view .LVU1910
+ 6088 0052 0D4C     		ldr	r4, .L315+12
+ 6089 0054 01A9     		add	r1, sp, #4
+ 6090 0056 2046     		mov	r0, r4
+ 6091 0058 FFF7FEFF 		bl	LL_TIM_Init
+ 6092              	.LVL579:
+1673:Src/main.c    ****   LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
+ 6093              		.loc 1 1673 3 view .LVU1911
+ 6094              	.LBB561:
+ 6095              	.LBI561:
+1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 6096              		.loc 5 1504 22 view .LVU1912
+ 6097              	.LBB562:
+1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 6098              		.loc 5 1506 3 view .LVU1913
+ 6099 005c 2368     		ldr	r3, [r4]
+ 6100 005e 23F08003 		bic	r3, r3, #128
+ 6101 0062 2360     		str	r3, [r4]
+ 6102              	.LVL580:
+1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 6103              		.loc 5 1506 3 is_stmt 0 view .LVU1914
+ 6104              	.LBE562:
+ 6105              	.LBE561:
+ARM GAS  /tmp/ccEQxcUB.s 			page 345
+
+
+1674:Src/main.c    ****   LL_TIM_DisableMasterSlaveMode(TIM6);
+ 6106              		.loc 1 1674 3 is_stmt 1 view .LVU1915
+ 6107              	.LBB563:
+ 6108              	.LBI563:
+3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 6109              		.loc 5 3138 22 view .LVU1916
+ 6110              	.LBB564:
+3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 6111              		.loc 5 3140 3 view .LVU1917
+ 6112 0064 6368     		ldr	r3, [r4, #4]
+ 6113 0066 23F07003 		bic	r3, r3, #112
+ 6114 006a 43F01003 		orr	r3, r3, #16
+ 6115 006e 6360     		str	r3, [r4, #4]
+ 6116              	.LVL581:
+3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 6117              		.loc 5 3140 3 is_stmt 0 view .LVU1918
+ 6118              	.LBE564:
+ 6119              	.LBE563:
+1675:Src/main.c    ****   /* USER CODE BEGIN TIM6_Init 2 */
+ 6120              		.loc 1 1675 3 is_stmt 1 view .LVU1919
+ 6121              	.LBB565:
+ 6122              	.LBI565:
+3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 6123              		.loc 5 3235 22 view .LVU1920
+ 6124              	.LBB566:
+ 6125              		.loc 5 3237 3 view .LVU1921
+ 6126 0070 A368     		ldr	r3, [r4, #8]
+ 6127 0072 23F08003 		bic	r3, r3, #128
+ 6128 0076 A360     		str	r3, [r4, #8]
+ 6129              	.LVL582:
+ 6130              		.loc 5 3237 3 is_stmt 0 view .LVU1922
+ 6131              	.LBE566:
+ 6132              	.LBE565:
+1680:Src/main.c    **** 
+ 6133              		.loc 1 1680 1 view .LVU1923
+ 6134 0078 06B0     		add	sp, sp, #24
+ 6135              	.LCFI63:
+ 6136              		.cfi_def_cfa_offset 8
+ 6137              		@ sp needed
+ 6138 007a 10BD     		pop	{r4, pc}
+ 6139              	.L316:
+ 6140              		.align	2
+ 6141              	.L315:
+ 6142 007c 00380240 		.word	1073887232
+ 6143 0080 00ED00E0 		.word	-536810240
+ 6144 0084 00E100E0 		.word	-536813312
+ 6145 0088 00100040 		.word	1073745920
+ 6146              		.cfi_endproc
+ 6147              	.LFE1198:
+ 6149              		.section	.rodata.Init_params.str1.4,"aMS",%progbits,1
+ 6150              		.align	2
+ 6151              	.LC0:
+ 6152 0000 2F00     		.ascii	"/\000"
+ 6153 0002 0000     		.align	2
+ 6154              	.LC1:
+ 6155 0004 434F4D4D 		.ascii	"COMMAND.TXT\000"
+ 6155      414E442E 
+ARM GAS  /tmp/ccEQxcUB.s 			page 346
+
+
+ 6155      54585400 
+ 6156              		.section	.text.Init_params,"ax",%progbits
+ 6157              		.align	1
+ 6158              		.syntax unified
+ 6159              		.thumb
+ 6160              		.thumb_func
+ 6162              	Init_params:
+ 6163              	.LFB1208:
+2229:Src/main.c    **** 	TO6 = 0;
+ 6164              		.loc 1 2229 1 is_stmt 1 view -0
+ 6165              		.cfi_startproc
+ 6166              		@ args = 0, pretend = 0, frame = 0
+ 6167              		@ frame_needed = 0, uses_anonymous_args = 0
+ 6168 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 6169              	.LCFI64:
+ 6170              		.cfi_def_cfa_offset 24
+ 6171              		.cfi_offset 4, -24
+ 6172              		.cfi_offset 5, -20
+ 6173              		.cfi_offset 6, -16
+ 6174              		.cfi_offset 7, -12
+ 6175              		.cfi_offset 8, -8
+ 6176              		.cfi_offset 14, -4
+2230:Src/main.c    **** 	TO7 = 0;
+ 6177              		.loc 1 2230 2 view .LVU1925
+2230:Src/main.c    **** 	TO7 = 0;
+ 6178              		.loc 1 2230 6 is_stmt 0 view .LVU1926
+ 6179 0004 0023     		movs	r3, #0
+ 6180 0006 9F4A     		ldr	r2, .L329
+ 6181 0008 1360     		str	r3, [r2]
+2231:Src/main.c    **** 	TO7_before = 0;
+ 6182              		.loc 1 2231 2 is_stmt 1 view .LVU1927
+2231:Src/main.c    **** 	TO7_before = 0;
+ 6183              		.loc 1 2231 6 is_stmt 0 view .LVU1928
+ 6184 000a 9F4A     		ldr	r2, .L329+4
+ 6185 000c 1360     		str	r3, [r2]
+2232:Src/main.c    **** 	TO6_before = 0;
+ 6186              		.loc 1 2232 2 is_stmt 1 view .LVU1929
+2232:Src/main.c    **** 	TO6_before = 0;
+ 6187              		.loc 1 2232 13 is_stmt 0 view .LVU1930
+ 6188 000e 9F4A     		ldr	r2, .L329+8
+ 6189 0010 1360     		str	r3, [r2]
+2233:Src/main.c    **** 	TO6_uart = 0;
+ 6190              		.loc 1 2233 2 is_stmt 1 view .LVU1931
+2233:Src/main.c    **** 	TO6_uart = 0;
+ 6191              		.loc 1 2233 13 is_stmt 0 view .LVU1932
+ 6192 0012 9F4A     		ldr	r2, .L329+12
+ 6193 0014 1360     		str	r3, [r2]
+2234:Src/main.c    **** 	flg_tmt = 0;
+ 6194              		.loc 1 2234 2 is_stmt 1 view .LVU1933
+2234:Src/main.c    **** 	flg_tmt = 0;
+ 6195              		.loc 1 2234 11 is_stmt 0 view .LVU1934
+ 6196 0016 9F4A     		ldr	r2, .L329+16
+ 6197 0018 1360     		str	r3, [r2]
+2235:Src/main.c    **** 	UART_rec_incr = 0;
+ 6198              		.loc 1 2235 2 is_stmt 1 view .LVU1935
+2235:Src/main.c    **** 	UART_rec_incr = 0;
+ 6199              		.loc 1 2235 10 is_stmt 0 view .LVU1936
+ARM GAS  /tmp/ccEQxcUB.s 			page 347
+
+
+ 6200 001a 9F4A     		ldr	r2, .L329+20
+ 6201 001c 1370     		strb	r3, [r2]
+2236:Src/main.c    **** 	fgoto = 0;
+ 6202              		.loc 1 2236 2 is_stmt 1 view .LVU1937
+2236:Src/main.c    **** 	fgoto = 0;
+ 6203              		.loc 1 2236 16 is_stmt 0 view .LVU1938
+ 6204 001e 9F4A     		ldr	r2, .L329+24
+ 6205 0020 1380     		strh	r3, [r2]	@ movhi
+2237:Src/main.c    **** 	sizeoffile = 0;
+ 6206              		.loc 1 2237 2 is_stmt 1 view .LVU1939
+2237:Src/main.c    **** 	sizeoffile = 0;
+ 6207              		.loc 1 2237 8 is_stmt 0 view .LVU1940
+ 6208 0022 9F4A     		ldr	r2, .L329+28
+ 6209 0024 1360     		str	r3, [r2]
+2238:Src/main.c    **** 	u_tx_flg = 0;
+ 6210              		.loc 1 2238 2 is_stmt 1 view .LVU1941
+2238:Src/main.c    **** 	u_tx_flg = 0;
+ 6211              		.loc 1 2238 13 is_stmt 0 view .LVU1942
+ 6212 0026 9F4A     		ldr	r2, .L329+32
+ 6213 0028 1360     		str	r3, [r2]
+2239:Src/main.c    **** 	u_rx_flg = 0;
+ 6214              		.loc 1 2239 2 is_stmt 1 view .LVU1943
+2239:Src/main.c    **** 	u_rx_flg = 0;
+ 6215              		.loc 1 2239 11 is_stmt 0 view .LVU1944
+ 6216 002a 9F4A     		ldr	r2, .L329+36
+ 6217 002c 1370     		strb	r3, [r2]
+2240:Src/main.c    **** 	//State_Data[0]=0;
+ 6218              		.loc 1 2240 2 is_stmt 1 view .LVU1945
+2240:Src/main.c    **** 	//State_Data[0]=0;
+ 6219              		.loc 1 2240 11 is_stmt 0 view .LVU1946
+ 6220 002e 9F4A     		ldr	r2, .L329+40
+ 6221 0030 1370     		strb	r3, [r2]
+2243:Src/main.c    **** 	{
+ 6222              		.loc 1 2243 2 is_stmt 1 view .LVU1947
+ 6223              	.LBB567:
+2243:Src/main.c    **** 	{
+ 6224              		.loc 1 2243 7 view .LVU1948
+ 6225              	.LVL583:
+2243:Src/main.c    **** 	{
+ 6226              		.loc 1 2243 2 is_stmt 0 view .LVU1949
+ 6227 0032 05E0     		b	.L318
+ 6228              	.LVL584:
+ 6229              	.L319:
+2245:Src/main.c    **** 	}
+ 6230              		.loc 1 2245 3 is_stmt 1 view .LVU1950
+2245:Src/main.c    **** 	}
+ 6231              		.loc 1 2245 16 is_stmt 0 view .LVU1951
+ 6232 0034 9E4A     		ldr	r2, .L329+44
+ 6233 0036 0021     		movs	r1, #0
+ 6234 0038 22F81310 		strh	r1, [r2, r3, lsl #1]	@ movhi
+2243:Src/main.c    **** 	{
+ 6235              		.loc 1 2243 31 is_stmt 1 discriminator 3 view .LVU1952
+ 6236 003c 0133     		adds	r3, r3, #1
+ 6237              	.LVL585:
+2243:Src/main.c    **** 	{
+ 6238              		.loc 1 2243 31 is_stmt 0 discriminator 3 view .LVU1953
+ 6239 003e 9BB2     		uxth	r3, r3
+ARM GAS  /tmp/ccEQxcUB.s 			page 348
+
+
+ 6240              	.LVL586:
+ 6241              	.L318:
+2243:Src/main.c    **** 	{
+ 6242              		.loc 1 2243 22 is_stmt 1 discriminator 1 view .LVU1954
+ 6243 0040 0E2B     		cmp	r3, #14
+ 6244 0042 F7D9     		bls	.L319
+ 6245              	.LBE567:
+2247:Src/main.c    **** 	
+ 6246              		.loc 1 2247 2 view .LVU1955
+2247:Src/main.c    **** 	
+ 6247              		.loc 1 2247 14 is_stmt 0 view .LVU1956
+ 6248 0044 9A4B     		ldr	r3, .L329+44
+ 6249              	.LVL587:
+2247:Src/main.c    **** 	
+ 6250              		.loc 1 2247 14 view .LVU1957
+ 6251 0046 41F21112 		movw	r2, #4369
+ 6252 004a 1A80     		strh	r2, [r3]	@ movhi
+2250:Src/main.c    **** 	Def_setup.LD1_EN = 0;
+ 6253              		.loc 1 2250 2 is_stmt 1 view .LVU1958
+2250:Src/main.c    **** 	Def_setup.LD1_EN = 0;
+ 6254              		.loc 1 2250 21 is_stmt 0 view .LVU1959
+ 6255 004c 994B     		ldr	r3, .L329+48
+ 6256 004e 0022     		movs	r2, #0
+ 6257 0050 DA81     		strh	r2, [r3, #14]	@ movhi
+2251:Src/main.c    **** 	Def_setup.LD2_EN = 0;
+ 6258              		.loc 1 2251 2 is_stmt 1 view .LVU1960
+2251:Src/main.c    **** 	Def_setup.LD2_EN = 0;
+ 6259              		.loc 1 2251 19 is_stmt 0 view .LVU1961
+ 6260 0052 DA70     		strb	r2, [r3, #3]
+2252:Src/main.c    **** 	Def_setup.MES_ID = 0;
+ 6261              		.loc 1 2252 2 is_stmt 1 view .LVU1962
+2252:Src/main.c    **** 	Def_setup.MES_ID = 0;
+ 6262              		.loc 1 2252 19 is_stmt 0 view .LVU1963
+ 6263 0054 1A71     		strb	r2, [r3, #4]
+2253:Src/main.c    **** 	Def_setup.PI1_RD = 0;
+ 6264              		.loc 1 2253 2 is_stmt 1 view .LVU1964
+2253:Src/main.c    **** 	Def_setup.PI1_RD = 0;
+ 6265              		.loc 1 2253 19 is_stmt 0 view .LVU1965
+ 6266 0056 1A82     		strh	r2, [r3, #16]	@ movhi
+2254:Src/main.c    **** 	Def_setup.PI2_RD = 0;
+ 6267              		.loc 1 2254 2 is_stmt 1 view .LVU1966
+2254:Src/main.c    **** 	Def_setup.PI2_RD = 0;
+ 6268              		.loc 1 2254 19 is_stmt 0 view .LVU1967
+ 6269 0058 1A73     		strb	r2, [r3, #12]
+2255:Src/main.c    **** 	Def_setup.REF1_EN = 0;
+ 6270              		.loc 1 2255 2 is_stmt 1 view .LVU1968
+2255:Src/main.c    **** 	Def_setup.REF1_EN = 0;
+ 6271              		.loc 1 2255 19 is_stmt 0 view .LVU1969
+ 6272 005a 5A73     		strb	r2, [r3, #13]
+2256:Src/main.c    **** 	Def_setup.REF2_EN = 0;
+ 6273              		.loc 1 2256 2 is_stmt 1 view .LVU1970
+2256:Src/main.c    **** 	Def_setup.REF2_EN = 0;
+ 6274              		.loc 1 2256 20 is_stmt 0 view .LVU1971
+ 6275 005c 5A71     		strb	r2, [r3, #5]
+2257:Src/main.c    **** 	Def_setup.SD_EN = 0;
+ 6276              		.loc 1 2257 2 is_stmt 1 view .LVU1972
+2257:Src/main.c    **** 	Def_setup.SD_EN = 0;
+ARM GAS  /tmp/ccEQxcUB.s 			page 349
+
+
+ 6277              		.loc 1 2257 20 is_stmt 0 view .LVU1973
+ 6278 005e 9A71     		strb	r2, [r3, #6]
+2258:Src/main.c    **** 	Def_setup.TEC1_EN = 0;
+ 6279              		.loc 1 2258 2 is_stmt 1 view .LVU1974
+2258:Src/main.c    **** 	Def_setup.TEC1_EN = 0;
+ 6280              		.loc 1 2258 18 is_stmt 0 view .LVU1975
+ 6281 0060 DA72     		strb	r2, [r3, #11]
+2259:Src/main.c    **** 	Def_setup.TEC2_EN = 0;
+ 6282              		.loc 1 2259 2 is_stmt 1 view .LVU1976
+2259:Src/main.c    **** 	Def_setup.TEC2_EN = 0;
+ 6283              		.loc 1 2259 20 is_stmt 0 view .LVU1977
+ 6284 0062 DA71     		strb	r2, [r3, #7]
+2260:Src/main.c    **** 	Def_setup.TS1_EN = 0;
+ 6285              		.loc 1 2260 2 is_stmt 1 view .LVU1978
+2260:Src/main.c    **** 	Def_setup.TS1_EN = 0;
+ 6286              		.loc 1 2260 20 is_stmt 0 view .LVU1979
+ 6287 0064 1A72     		strb	r2, [r3, #8]
+2261:Src/main.c    **** 	Def_setup.TS2_EN = 0;
+ 6288              		.loc 1 2261 2 is_stmt 1 view .LVU1980
+2261:Src/main.c    **** 	Def_setup.TS2_EN = 0;
+ 6289              		.loc 1 2261 19 is_stmt 0 view .LVU1981
+ 6290 0066 5A72     		strb	r2, [r3, #9]
+2262:Src/main.c    **** 	Def_setup.U5V1_EN = 0;
+ 6291              		.loc 1 2262 2 is_stmt 1 view .LVU1982
+2262:Src/main.c    **** 	Def_setup.U5V1_EN = 0;
+ 6292              		.loc 1 2262 19 is_stmt 0 view .LVU1983
+ 6293 0068 9A72     		strb	r2, [r3, #10]
+2263:Src/main.c    **** 	Def_setup.U5V2_EN = 0;
+ 6294              		.loc 1 2263 2 is_stmt 1 view .LVU1984
+2263:Src/main.c    **** 	Def_setup.U5V2_EN = 0;
+ 6295              		.loc 1 2263 20 is_stmt 0 view .LVU1985
+ 6296 006a 5A70     		strb	r2, [r3, #1]
+2264:Src/main.c    **** 	Def_setup.WORK_EN = 0;
+ 6297              		.loc 1 2264 2 is_stmt 1 view .LVU1986
+2264:Src/main.c    **** 	Def_setup.WORK_EN = 0;
+ 6298              		.loc 1 2264 20 is_stmt 0 view .LVU1987
+ 6299 006c 9A70     		strb	r2, [r3, #2]
+2265:Src/main.c    **** 	
+ 6300              		.loc 1 2265 2 is_stmt 1 view .LVU1988
+2265:Src/main.c    **** 	
+ 6301              		.loc 1 2265 20 is_stmt 0 view .LVU1989
+ 6302 006e 1A70     		strb	r2, [r3]
+2267:Src/main.c    **** 	LD2_def_setup.LD_TEMP = 0;
+ 6303              		.loc 1 2267 2 is_stmt 1 view .LVU1990
+2267:Src/main.c    **** 	LD2_def_setup.LD_TEMP = 0;
+ 6304              		.loc 1 2267 24 is_stmt 0 view .LVU1991
+ 6305 0070 914D     		ldr	r5, .L329+52
+ 6306 0072 2A80     		strh	r2, [r5]	@ movhi
+2268:Src/main.c    **** 	LD1_def_setup.P_coef_temp = 0;
+ 6307              		.loc 1 2268 2 is_stmt 1 view .LVU1992
+2268:Src/main.c    **** 	LD1_def_setup.P_coef_temp = 0;
+ 6308              		.loc 1 2268 24 is_stmt 0 view .LVU1993
+ 6309 0074 914C     		ldr	r4, .L329+56
+ 6310 0076 2280     		strh	r2, [r4]	@ movhi
+2269:Src/main.c    **** 	LD2_def_setup.P_coef_temp = 0;
+ 6311              		.loc 1 2269 2 is_stmt 1 view .LVU1994
+2269:Src/main.c    **** 	LD2_def_setup.P_coef_temp = 0;
+ARM GAS  /tmp/ccEQxcUB.s 			page 350
+
+
+ 6312              		.loc 1 2269 28 is_stmt 0 view .LVU1995
+ 6313 0078 0022     		movs	r2, #0
+ 6314 007a 6A60     		str	r2, [r5, #4]	@ float
+2270:Src/main.c    **** 	LD1_def_setup.I_coef_temp = 0;
+ 6315              		.loc 1 2270 2 is_stmt 1 view .LVU1996
+2270:Src/main.c    **** 	LD1_def_setup.I_coef_temp = 0;
+ 6316              		.loc 1 2270 28 is_stmt 0 view .LVU1997
+ 6317 007c 6260     		str	r2, [r4, #4]	@ float
+2271:Src/main.c    **** 	LD2_def_setup.I_coef_temp = 0;
+ 6318              		.loc 1 2271 2 is_stmt 1 view .LVU1998
+2271:Src/main.c    **** 	LD2_def_setup.I_coef_temp = 0;
+ 6319              		.loc 1 2271 28 is_stmt 0 view .LVU1999
+ 6320 007e AA60     		str	r2, [r5, #8]	@ float
+2272:Src/main.c    **** 	
+ 6321              		.loc 1 2272 2 is_stmt 1 view .LVU2000
+2272:Src/main.c    **** 	
+ 6322              		.loc 1 2272 28 is_stmt 0 view .LVU2001
+ 6323 0080 A260     		str	r2, [r4, #8]	@ float
+2275:Src/main.c    **** 	LD1_curr_setup = LD1_def_setup;
+ 6324              		.loc 1 2275 2 is_stmt 1 view .LVU2002
+2275:Src/main.c    **** 	LD1_curr_setup = LD1_def_setup;
+ 6325              		.loc 1 2275 13 is_stmt 0 view .LVU2003
+ 6326 0082 8F4E     		ldr	r6, .L329+60
+ 6327 0084 9C46     		mov	ip, r3
+ 6328 0086 BCE80F00 		ldmia	ip!, {r0, r1, r2, r3}
+ 6329 008a 0FC6     		stmia	r6!, {r0, r1, r2, r3}
+ 6330 008c DCF80030 		ldr	r3, [ip]
+ 6331 0090 3380     		strh	r3, [r6]	@ movhi
+2276:Src/main.c    **** 	LD2_curr_setup = LD2_def_setup;
+ 6332              		.loc 1 2276 2 is_stmt 1 view .LVU2004
+2276:Src/main.c    **** 	LD2_curr_setup = LD2_def_setup;
+ 6333              		.loc 1 2276 17 is_stmt 0 view .LVU2005
+ 6334 0092 8C4E     		ldr	r6, .L329+64
+ 6335 0094 95E80F00 		ldm	r5, {r0, r1, r2, r3}
+ 6336 0098 86E80F00 		stm	r6, {r0, r1, r2, r3}
+2277:Src/main.c    **** 	
+ 6337              		.loc 1 2277 2 is_stmt 1 view .LVU2006
+2277:Src/main.c    **** 	
+ 6338              		.loc 1 2277 17 is_stmt 0 view .LVU2007
+ 6339 009c 8A4D     		ldr	r5, .L329+68
+ 6340 009e 94E80F00 		ldm	r4, {r0, r1, r2, r3}
+ 6341 00a2 85E80F00 		stm	r5, {r0, r1, r2, r3}
+2282:Src/main.c    **** 	LL_TIM_EnableCounter(TIM6);
+ 6342              		.loc 1 2282 2 is_stmt 1 view .LVU2008
+ 6343              	.LVL588:
+ 6344              	.LBB568:
+ 6345              	.LBI568:
 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -20055,6 +20998,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
 3247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 351
+
+
 3248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)
 3249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
@@ -20098,9 +21044,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale
 3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       uint32_t ETRFilter)
 3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 336
-
-
 3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | 
 3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -20115,6 +21058,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Enable the break function.
 3303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
 3304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       a timer instance provides a break input.
+ARM GAS  /tmp/ccEQxcUB.s 			page 352
+
+
 3305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll BDTR         BKE           LL_TIM_EnableBRK
 3306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
@@ -20158,9 +21104,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8
 3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6
 3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8
-ARM GAS  /tmp/ccwR4KB7.s 			page 337
-
-
 3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5
 3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6
 3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8
@@ -20175,6 +21118,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter);
 3360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 353
+
+
 3362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Enable the break 2 function.
 3364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
@@ -20218,9 +21164,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8
 3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6
 3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8
-ARM GAS  /tmp/ccwR4KB7.s 			page 338
-
-
 3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6
 3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8
 3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6
@@ -20235,6 +21178,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F
 3418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 354
+
+
 3419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter);
 3420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -20278,9 +21224,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll BDTR         AOE           LL_TIM_DisableAutomaticOutput
 3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
-ARM GAS  /tmp/ccwR4KB7.s 			page 339
-
-
 3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
 3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -20295,6 +21238,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
 3475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 355
+
+
 3476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)
 3477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
@@ -20338,9 +21284,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
 3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 340
-
-
 3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)
 3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
@@ -20355,6 +21298,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         AF1          BKDFBKE        LL_TIM_EnableBreakInputSource\n
 3531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         AF2          BK2INE         LL_TIM_EnableBreakInputSource\n
 3532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         AF2          BK2DFBKE       LL_TIM_EnableBreakInputSource
+ARM GAS  /tmp/ccEQxcUB.s 			page 356
+
+
 3533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  BreakInput This parameter can be one of the following values:
 3535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_INPUT_BKIN
@@ -20398,9 +21344,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
 3574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       or not a timer instance allows for break input selection.
 3575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll AF1          BKINP          LL_TIM_SetBreakInputSourcePolarity\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 341
-
-
 3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         AF1          BKDFBKP        LL_TIM_SetBreakInputSourcePolarity\n
 3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         AF2          BK2INP         LL_TIM_SetBreakInputSourcePolarity\n
 3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         AF2          BK2DFBKP       LL_TIM_SetBreakInputSourcePolarity
@@ -20415,6 +21358,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BKIN_POLARITY_LOW
 3588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BKIN_POLARITY_HIGH
 3589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 357
+
+
 3590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin
 3592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                                         uint32_t Polarity)
@@ -20458,9 +21404,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
 3631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_BASEADDR_OR
 3632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
-ARM GAS  /tmp/ccwR4KB7.s 			page 342
-
-
 3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
 3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
 3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_BASEADDR_AF1  (*)
@@ -20475,6 +21418,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
 3645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
 3646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
+ARM GAS  /tmp/ccEQxcUB.s 			page 358
+
+
 3647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
 3648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
 3649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
@@ -20518,9 +21464,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            ITR1_RMP can be one of the following values
 3688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
 3689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM2_ITR1_RMP_ETH_PTP
-ARM GAS  /tmp/ccwR4KB7.s 			page 343
-
-
 3690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
 3691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF
 3692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *
@@ -20535,6 +21478,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *
 3702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM11_TI1_RMP_GPIO
 3703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM11_TI1_RMP_SPDIFRX
+ARM GAS  /tmp/ccEQxcUB.s 			page 359
+
+
 3704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM11_TI1_RMP_HSE
 3705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM11_TI1_RMP_MCO1
 3706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *
@@ -20578,9 +21524,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Clear the Capture/Compare 1 interrupt flag (CC1F).
 3745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SR           CC1IF         LL_TIM_ClearFlag_CC1
 3746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 344
-
-
 3747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 3748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
@@ -20595,6 +21538,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
 3759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 360
+
+
 3761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);
 3763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -20638,9 +21584,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
 3803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 345
-
-
 3804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)
 3805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);
@@ -20655,6 +21598,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
 3816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
+ARM GAS  /tmp/ccEQxcUB.s 			page 361
+
+
 3818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -20698,9 +21644,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)
 3860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 346
-
-
 3861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));
 3862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -20715,6 +21658,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);
 3873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 362
+
+
 3875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Clear the commutation interrupt flag (COMIF).
 3877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SR           COMIF         LL_TIM_ClearFlag_COM
@@ -20758,9 +21704,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);
 3917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 347
-
-
 3918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Clear the break interrupt flag (BIF).
@@ -20775,6 +21718,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicate whether break interrupt flag (BIF) is set (break interrupt is pending).
+ARM GAS  /tmp/ccEQxcUB.s 			page 363
+
+
 3932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SR           BIF           LL_TIM_IsActiveFlag_BRK
 3933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
@@ -20818,9 +21764,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 3973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 348
-
-
 3975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set
 3976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         (Capture/Compare 1 interrupt is pending).
 3977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SR           CC1OF         LL_TIM_IsActiveFlag_CC1OVR
@@ -20835,6 +21778,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
 3988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SR           CC2OF         LL_TIM_ClearFlag_CC2OVR
+ARM GAS  /tmp/ccEQxcUB.s 			page 364
+
+
 3989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 3991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -20878,9 +21824,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 4029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);
 4030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 4031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 349
-
-
 4032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 4033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
 4034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SR           CC4OF         LL_TIM_ClearFlag_CC4OVR
@@ -20895,6 +21838,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 4043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 4044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set
 4045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         (Capture/Compare 4 over-capture interrupt is pending).
+ARM GAS  /tmp/ccEQxcUB.s 			page 365
+
+
 4046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll SR           CC4OF         LL_TIM_IsActiveFlag_CC4OVR
 4047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 4048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
@@ -20938,83 +21884,83 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 4086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll DIER         UIE           LL_TIM_EnableIT_UPDATE
 4087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 4088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
-ARM GAS  /tmp/ccwR4KB7.s 			page 350
-
-
 4089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
- 5862              		.loc 5 4090 22 view .LVU1872
- 5863              	.LBB533:
+ 6346              		.loc 5 4090 22 view .LVU2009
+ 6347              	.LBB569:
 4091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 4092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   SET_BIT(TIMx->DIER, TIM_DIER_UIE);
- 5864              		.loc 5 4092 3 view .LVU1873
- 5865 00a6 894B     		ldr	r3, .L304+72
- 5866 00a8 DA68     		ldr	r2, [r3, #12]
- 5867 00aa 42F00102 		orr	r2, r2, #1
- 5868 00ae DA60     		str	r2, [r3, #12]
- 5869              	.LVL527:
- 5870              		.loc 5 4092 3 is_stmt 0 view .LVU1874
- 5871              	.LBE533:
- 5872              	.LBE532:
-2108:Src/main.c    **** 	LL_TIM_EnableIT_UPDATE(TIM7);
- 5873              		.loc 1 2108 2 is_stmt 1 view .LVU1875
- 5874              	.LBB534:
- 5875              	.LBI534:
+ 6348              		.loc 5 4092 3 view .LVU2010
+ 6349 00a6 894B     		ldr	r3, .L329+72
+ 6350 00a8 DA68     		ldr	r2, [r3, #12]
+ 6351 00aa 42F00102 		orr	r2, r2, #1
+ 6352 00ae DA60     		str	r2, [r3, #12]
+ 6353              	.LVL589:
+ 6354              		.loc 5 4092 3 is_stmt 0 view .LVU2011
+ 6355              	.LBE569:
+ARM GAS  /tmp/ccEQxcUB.s 			page 366
+
+
+ 6356              	.LBE568:
+2283:Src/main.c    **** 	LL_TIM_EnableIT_UPDATE(TIM7);
+ 6357              		.loc 1 2283 2 is_stmt 1 view .LVU2012
+ 6358              	.LBB570:
+ 6359              	.LBI570:
 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5876              		.loc 5 1313 22 view .LVU1876
- 5877              	.LBB535:
+ 6360              		.loc 5 1313 22 view .LVU2013
+ 6361              	.LBB571:
 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5878              		.loc 5 1315 3 view .LVU1877
- 5879 00b0 1A68     		ldr	r2, [r3]
- 5880 00b2 42F00102 		orr	r2, r2, #1
- 5881 00b6 1A60     		str	r2, [r3]
- 5882              	.LVL528:
+ 6362              		.loc 5 1315 3 view .LVU2014
+ 6363 00b0 1A68     		ldr	r2, [r3]
+ 6364 00b2 42F00102 		orr	r2, r2, #1
+ 6365 00b6 1A60     		str	r2, [r3]
+ 6366              	.LVL590:
 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5883              		.loc 5 1315 3 is_stmt 0 view .LVU1878
- 5884              	.LBE535:
- 5885              	.LBE534:
-2109:Src/main.c    **** 	LL_TIM_EnableCounter(TIM7);
- 5886              		.loc 1 2109 2 is_stmt 1 view .LVU1879
- 5887              	.LBB536:
- 5888              	.LBI536:
+ 6367              		.loc 5 1315 3 is_stmt 0 view .LVU2015
+ 6368              	.LBE571:
+ 6369              	.LBE570:
+2284:Src/main.c    **** 	LL_TIM_EnableCounter(TIM7);
+ 6370              		.loc 1 2284 2 is_stmt 1 view .LVU2016
+ 6371              	.LBB572:
+ 6372              	.LBI572:
 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5889              		.loc 5 4090 22 view .LVU1880
- 5890              	.LBB537:
- 5891              		.loc 5 4092 3 view .LVU1881
- 5892 00b8 03F58063 		add	r3, r3, #1024
- 5893 00bc DA68     		ldr	r2, [r3, #12]
- 5894 00be 42F00102 		orr	r2, r2, #1
- 5895 00c2 DA60     		str	r2, [r3, #12]
- 5896              	.LVL529:
- 5897              		.loc 5 4092 3 is_stmt 0 view .LVU1882
- 5898              	.LBE537:
- 5899              	.LBE536:
-2110:Src/main.c    **** 	//HAL_TIM_Base_Start_IT(&htim6);
- 5900              		.loc 1 2110 2 is_stmt 1 view .LVU1883
- 5901              	.LBB538:
- 5902              	.LBI538:
+ 6373              		.loc 5 4090 22 view .LVU2017
+ 6374              	.LBB573:
+ 6375              		.loc 5 4092 3 view .LVU2018
+ 6376 00b8 03F58063 		add	r3, r3, #1024
+ 6377 00bc DA68     		ldr	r2, [r3, #12]
+ 6378 00be 42F00102 		orr	r2, r2, #1
+ 6379 00c2 DA60     		str	r2, [r3, #12]
+ 6380              	.LVL591:
+ 6381              		.loc 5 4092 3 is_stmt 0 view .LVU2019
+ 6382              	.LBE573:
+ 6383              	.LBE572:
+2285:Src/main.c    **** 	//HAL_TIM_Base_Start_IT(&htim6);
+ 6384              		.loc 1 2285 2 is_stmt 1 view .LVU2020
+ 6385              	.LBB574:
+ 6386              	.LBI574:
 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 5903              		.loc 5 1313 22 view .LVU1884
- 5904              	.LBB539:
+ 6387              		.loc 5 1313 22 view .LVU2021
+ 6388              	.LBB575:
 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5905              		.loc 5 1315 3 view .LVU1885
-ARM GAS  /tmp/ccwR4KB7.s 			page 351
-
-
- 5906 00c4 1A68     		ldr	r2, [r3]
- 5907 00c6 42F00102 		orr	r2, r2, #1
- 5908 00ca 1A60     		str	r2, [r3]
- 5909              	.LVL530:
+ 6389              		.loc 5 1315 3 view .LVU2022
+ 6390 00c4 1A68     		ldr	r2, [r3]
+ 6391 00c6 42F00102 		orr	r2, r2, #1
+ 6392 00ca 1A60     		str	r2, [r3]
+ 6393              	.LVL592:
 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 5910              		.loc 5 1315 3 is_stmt 0 view .LVU1886
- 5911              	.LBE539:
- 5912              	.LBE538:
-2117:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
- 5913              		.loc 1 2117 3 is_stmt 1 view .LVU1887
- 5914              	.LBB540:
- 5915              	.LBI540:
- 5916              		.file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
+ 6394              		.loc 5 1315 3 is_stmt 0 view .LVU2023
+ 6395              	.LBE575:
+ 6396              	.LBE574:
+2292:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
+ 6397              		.loc 1 2292 3 is_stmt 1 view .LVU2024
+ 6398              	.LBB576:
+ 6399              	.LBI576:
+ 6400              		.file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
    1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 367
+
+
    2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   ******************************************************************************
    3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @file    stm32f7xx_ll_dma.h
    4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @author  MCD Application Team
@@ -21058,9 +22004,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Private_Variables DMA Private Variables
   43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
   44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 352
-
-
   45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Array used to get the DMA stream register offset versus stream index LL_DMA_STREAM_x */
   46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** static const uint8_t STREAM_OFFSET_TAB[] =
   47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -21075,6 +22018,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** };
   57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
   58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 368
+
+
   59:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
   60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
   61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -21118,9 +22064,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This parameter can be a value of @ref DMA_LL_EC_MODE
  100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         @note The circular buffer mode cannot be used if the memory
  101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                               data transfer direction is configured on the selected
-ARM GAS  /tmp/ccwR4KB7.s 			page 353
-
-
  102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This feature can be modified afterwards using unitary funct
  104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -21135,6 +22078,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This parameter can be a value of @ref DMA_LL_EC_MEMORY
  114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This feature can be modified afterwards using unitary funct
+ARM GAS  /tmp/ccEQxcUB.s 			page 369
+
+
  116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data
  118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         in case of memory to memory transfer direction.
@@ -21178,9 +22124,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This feature can be modified afterwards using unitary funct
  157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   uint32_t MemBurst;               /*!< Specifies the Burst transfer configuration for the memory t
-ARM GAS  /tmp/ccwR4KB7.s 			page 354
-
-
  159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         It specifies the amount of data to be transferred in a sing
  160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         transaction.
  161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This parameter can be a value of @ref DMA_LL_EC_MBURST 
@@ -21195,6 +22138,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         @note The burst mode is possible only if the address Increm
  171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This feature can be modified afterwards using unitary funct
+ARM GAS  /tmp/ccEQxcUB.s 			page 370
+
+
  173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } LL_DMA_InitTypeDef;
  175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -21238,9 +22184,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_NORMAL                0x00000000U               /*!< Normal Mode               
  214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_CIRCULAR              DMA_SxCR_CIRC             /*!< Circular Mode             
  215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_PFCTRL                DMA_SxCR_PFCTRL           /*!< Peripheral flow control mo
-ARM GAS  /tmp/ccwR4KB7.s 			page 355
-
-
  216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -21255,6 +22198,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PERIPH PERIPH
+ARM GAS  /tmp/ccEQxcUB.s 			page 371
+
+
  230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
  231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PERIPH_NOINCREMENT         0x00000000U               /*!< Peripheral increment mode 
@@ -21298,9 +22244,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_PSIZE           0x00000000U               /*!< Peripheral increment offse
  271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_FIXEDTO4        DMA_SxCR_PINCOS           /*!< Peripheral increment offse
  272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 356
-
-
  273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -21315,6 +22258,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 372
+
+
  287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CHANNEL CHANNEL
  288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
  289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -21358,9 +22304,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC4                DMA_SxCR_PBURST_0                       /*!< Peripheral b
  328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC8                DMA_SxCR_PBURST_1                       /*!< Peripheral b
  329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC16               (DMA_SxCR_PBURST_0 | DMA_SxCR_PBURST_1) /*!< Peripheral b
-ARM GAS  /tmp/ccwR4KB7.s 			page 357
-
-
  330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -21375,6 +22318,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */  
  342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_FIFOSTATUS_0 FIFOSTATUS 0
+ARM GAS  /tmp/ccEQxcUB.s 			page 373
+
+
  344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
  345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_0_25            0x00000000U                             /*!< 0 < fifo_lev
@@ -21418,9 +22364,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
  386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
-ARM GAS  /tmp/ccwR4KB7.s 			page 358
-
-
  387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Write a value in DMA register
@@ -21435,6 +22378,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Read a value in DMA register
  399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  __INSTANCE__ DMA Instance
  400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  __REG__ Register to be read
+ARM GAS  /tmp/ccEQxcUB.s 			page 374
+
+
  401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Register value
  402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
@@ -21478,9 +22424,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy
  443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  __DMA_INSTANCE__ DMAx
-ARM GAS  /tmp/ccwR4KB7.s 			page 359
-
-
  444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  __STREAM__ LL_DMA_STREAM_y
  445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval DMAx_Streamy
  446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -21495,6 +22438,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM
  456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM
  457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM
+ARM GAS  /tmp/ccEQxcUB.s 			page 375
+
+
  458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM
  459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM
  460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM
@@ -21538,9 +22484,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA
  500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 360
-
-
  501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Disable DMA stream.
@@ -21555,26 +22498,29 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
  513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
  514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
+ARM GAS  /tmp/ccEQxcUB.s 			page 376
+
+
  515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
  516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableStream(DMA_TypeDef *DMAx, uint32_t Stream)
- 5917              		.loc 6 517 22 view .LVU1888
- 5918              	.LBB541:
+ 6401              		.loc 6 517 22 view .LVU2025
+ 6402              	.LBB577:
  518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
- 5919              		.loc 6 519 3 view .LVU1889
- 5920 00cc 03F51433 		add	r3, r3, #151552
- 5921 00d0 D3F8B820 		ldr	r2, [r3, #184]
- 5922 00d4 22F00102 		bic	r2, r2, #1
- 5923 00d8 C3F8B820 		str	r2, [r3, #184]
- 5924              	.LVL531:
- 5925              		.loc 6 519 3 is_stmt 0 view .LVU1890
- 5926              	.LBE541:
- 5927              	.LBE540:
-2118:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
- 5928              		.loc 1 2118 3 is_stmt 1 view .LVU1891
- 5929              	.LBB542:
- 5930              	.LBI542:
+ 6403              		.loc 6 519 3 view .LVU2026
+ 6404 00cc 03F51433 		add	r3, r3, #151552
+ 6405 00d0 D3F8B820 		ldr	r2, [r3, #184]
+ 6406 00d4 22F00102 		bic	r2, r2, #1
+ 6407 00d8 C3F8B820 		str	r2, [r3, #184]
+ 6408              	.LVL593:
+ 6409              		.loc 6 519 3 is_stmt 0 view .LVU2027
+ 6410              	.LBE577:
+ 6411              	.LBE576:
+2293:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
+ 6412              		.loc 1 2293 3 is_stmt 1 view .LVU2028
+ 6413              	.LBB578:
+ 6414              	.LBI578:
  520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
  521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -21598,9 +22544,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
  541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 361
-
-
  543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Configure all parameters linked to DMA transfer.
  544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          DIR           LL_DMA_ConfigTransfer\n
  545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         CR          CIRC          LL_DMA_ConfigTransfer\n
@@ -21615,6 +22558,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
  555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
  556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
+ARM GAS  /tmp/ccEQxcUB.s 			page 377
+
+
  557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
  559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
@@ -21658,9 +22604,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t  
  599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 362
-
-
  600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
  601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
  602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -21675,6 +22618,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
  613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
+ARM GAS  /tmp/ccEQxcUB.s 			page 378
+
+
  614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
  615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
  616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
@@ -21718,9 +22664,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         CR          PFCTRL         LL_DMA_GetMode
  655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
  656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
-ARM GAS  /tmp/ccwR4KB7.s 			page 363
-
-
  657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
  658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
  659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
@@ -21735,6 +22678,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MODE_PFCTRL
  669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Stream)
+ARM GAS  /tmp/ccEQxcUB.s 			page 379
+
+
  671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
  673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -21778,9 +22724,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
  712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PERIPH_NOINCREMENT
  713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PERIPH_INCREMENT
-ARM GAS  /tmp/ccwR4KB7.s 			page 364
-
-
  714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream)
  716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -21795,6 +22738,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
  726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
  727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
+ARM GAS  /tmp/ccEQxcUB.s 			page 380
+
+
  728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
  730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
@@ -21838,9 +22784,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
  769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
  770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
-ARM GAS  /tmp/ccwR4KB7.s 			page 365
-
-
  771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
  772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
  773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
@@ -21855,6 +22798,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
  783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t  Size)
+ARM GAS  /tmp/ccEQxcUB.s 			page 381
+
+
  785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
  787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -21898,9 +22844,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Size This parameter can be one of the following values:
  826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MDATAALIGN_BYTE
  827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MDATAALIGN_HALFWORD
-ARM GAS  /tmp/ccwR4KB7.s 			page 366
-
-
  828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MDATAALIGN_WORD
  829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
  830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -21915,6 +22858,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
  840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
  841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
+ARM GAS  /tmp/ccEQxcUB.s 			page 382
+
+
  842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
  843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
  844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
@@ -21958,9 +22904,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Peripheral increment offset size.
  884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          PINCOS           LL_DMA_GetIncOffsetSize
-ARM GAS  /tmp/ccwR4KB7.s 			page 367
-
-
  885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
  886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
  887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
@@ -21975,6 +22918,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_OFFSETSIZE_PSIZE
  897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4
  898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 383
+
+
  899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetIncOffsetSize(DMA_TypeDef *DMAx, uint32_t Stream)
  900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
@@ -22018,9 +22964,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
  940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
  941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
-ARM GAS  /tmp/ccwR4KB7.s 			page 368
-
-
  942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
  943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PRIORITY_LOW
  944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PRIORITY_MEDIUM
@@ -22035,6 +22978,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Set Number of data to transfer.
  955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll NDTR          NDT           LL_DMA_SetDataLength
+ARM GAS  /tmp/ccEQxcUB.s 			page 384
+
+
  956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @note   This action has no effect if
  957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         stream is enabled.
  958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -22078,9 +23024,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
  997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 369
-
-
  999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Select Channel number associated to the Stream.
 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          CHSEL           LL_DMA_SetChannelSelection
 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -22095,6 +23038,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Channel This parameter can be one of the following values:
 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_0
+ARM GAS  /tmp/ccEQxcUB.s 			page 385
+
+
 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_1
 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_2
 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_3
@@ -22138,9 +23084,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_2
 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_3
 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_4
-ARM GAS  /tmp/ccwR4KB7.s 			page 370
-
-
 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_5
 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_6
 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_7
@@ -22155,6 +23098,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *
 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         (*) value not defined in all devices.
 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 386
+
+
 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream)
 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
@@ -22198,9 +23144,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
-ARM GAS  /tmp/ccwR4KB7.s 			page 371
-
-
 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MBURST_SINGLE
 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MBURST_INC4
@@ -22215,6 +23158,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Set  Peripheral burst transfer configuration.
 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          PBURST           LL_DMA_SetPeriphBurstxfer
+ARM GAS  /tmp/ccEQxcUB.s 			page 387
+
+
 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
@@ -22258,9 +23204,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream)
 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 372
-
-
 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -22275,6 +23218,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
+ARM GAS  /tmp/ccEQxcUB.s 			page 388
+
+
 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param CurrentMemory This parameter can be one of the following values:
@@ -22318,9 +23264,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
-ARM GAS  /tmp/ccwR4KB7.s 			page 373
-
-
 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
@@ -22335,6 +23278,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Disable the double buffer mode.
 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          DBM           LL_DMA_DisableDoubleBufferMode 
+ARM GAS  /tmp/ccEQxcUB.s 			page 389
+
+
 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
@@ -22378,9 +23324,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 374
-
-
 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Disable Fifo mode.
 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll FCR          DMDIS          LL_DMA_DisableFifoMode
@@ -22395,6 +23338,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 390
+
+
 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream)
 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -22438,9 +23384,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
-ARM GAS  /tmp/ccwR4KB7.s 			page 375
-
-
 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -22455,6 +23398,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
+ARM GAS  /tmp/ccEQxcUB.s 			page 391
+
+
 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
@@ -22498,9 +23444,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ConfigFifo(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t FifoMode, uint3
-ARM GAS  /tmp/ccwR4KB7.s 			page 376
-
-
 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 
 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -22515,6 +23458,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
+ARM GAS  /tmp/ccEQxcUB.s 			page 392
+
+
 1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
@@ -22558,9 +23504,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
-ARM GAS  /tmp/ccwR4KB7.s 			page 377
-
-
 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  MemoryAddress Between 0 to 0xFFFFFFFF
 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
@@ -22575,6 +23518,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll PAR        PA         LL_DMA_SetPeriphAddress
 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO
 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @note   This API must not be called when the DMA channel is enabled.
+ARM GAS  /tmp/ccEQxcUB.s 			page 393
+
+
 1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
@@ -22618,9 +23564,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Get the Peripheral address.
 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll PAR        PA         LL_DMA_GetPeriphAddress
 1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO
-ARM GAS  /tmp/ccwR4KB7.s 			page 378
-
-
 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
@@ -22635,6 +23578,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream)
 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 394
+
+
 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))
 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -22678,9 +23624,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  MemoryAddress Between 0 to 0xFFFFFFFF
 1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
-ARM GAS  /tmp/ccwR4KB7.s 			page 379
-
-
 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd
 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   {
@@ -22695,6 +23638,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
+ARM GAS  /tmp/ccEQxcUB.s 			page 395
+
+
 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
@@ -22738,9 +23684,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
-ARM GAS  /tmp/ccwR4KB7.s 			page 380
-
-
 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
@@ -22755,6 +23698,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Memory 1 address (used in case of Double buffer mode).
+ARM GAS  /tmp/ccEQxcUB.s 			page 396
+
+
 1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll M1AR        M1A         LL_DMA_GetMemory1Address
 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
@@ -22798,9 +23744,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 381
-
-
 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1));
@@ -22815,6 +23758,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF2)==(DMA_LISR_HTIF2));
+ARM GAS  /tmp/ccEQxcUB.s 			page 397
+
+
 1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -22858,9 +23804,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
 1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 382
-
-
 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF6)==(DMA_HISR_HTIF6));
 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -22875,6 +23818,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF7)==(DMA_HISR_HTIF7));
 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 398
+
+
 1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 0 transfer complete flag.
 1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  TCIF0    LL_DMA_IsActiveFlag_TC0
@@ -22918,9 +23864,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF3)==(DMA_LISR_TCIF3));
 1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 383
-
-
 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 4 transfer complete flag.
@@ -22935,6 +23878,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 5 transfer complete flag.
+ARM GAS  /tmp/ccEQxcUB.s 			page 399
+
+
 1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  TCIF0    LL_DMA_IsActiveFlag_TC5
 1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
@@ -22978,9 +23924,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 384
-
-
 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 1 transfer error flag.
 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  TEIF1    LL_DMA_IsActiveFlag_TE1
 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -22995,6 +23938,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 2 transfer error flag.
 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  TEIF2    LL_DMA_IsActiveFlag_TE2
 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 400
+
+
 1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
@@ -23038,9 +23984,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 6 transfer error flag.
 1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  TEIF6    LL_DMA_IsActiveFlag_TE6
-ARM GAS  /tmp/ccwR4KB7.s 			page 385
-
-
 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -23055,6 +23998,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 401
+
+
 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
 1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF7)==(DMA_HISR_TEIF7));
@@ -23098,9 +24044,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  DMEIF3    LL_DMA_IsActiveFlag_DME3
 1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
-ARM GAS  /tmp/ccwR4KB7.s 			page 386
-
-
 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx)
 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -23115,6 +24058,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME4(DMA_TypeDef *DMAx)
 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 402
+
+
 1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF4)==(DMA_HISR_DMEIF4));
 1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -23158,9 +24104,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE0(DMA_TypeDef *DMAx)
-ARM GAS  /tmp/ccwR4KB7.s 			page 387
-
-
 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0));
 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -23175,6 +24118,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF1)==(DMA_LISR_FEIF1));
 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 403
+
+
 2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 2 FIFO error flag.
@@ -23218,9 +24164,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE5(DMA_TypeDef *DMAx)
 2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF5)==(DMA_HISR_FEIF5));
-ARM GAS  /tmp/ccwR4KB7.s 			page 388
-
-
 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -23235,6 +24178,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 404
+
+
 2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 7 FIFO error flag.
 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  FEIF7    LL_DMA_IsActiveFlag_FE7
 2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -23278,9 +24224,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2);
 2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 389
-
-
 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 3 half transfer flag.
 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LIFCR  CHTIF3    LL_DMA_ClearFlag_HT3
@@ -23295,6 +24238,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 4 half transfer flag.
 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HIFCR  CHTIF4    LL_DMA_ClearFlag_HT4
+ARM GAS  /tmp/ccEQxcUB.s 			page 405
+
+
 2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -23338,9 +24284,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 0 transfer complete flag.
-ARM GAS  /tmp/ccwR4KB7.s 			page 390
-
-
 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LIFCR  CTCIF0    LL_DMA_ClearFlag_TC0
 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
@@ -23355,6 +24298,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LIFCR  CTCIF1    LL_DMA_ClearFlag_TC1
 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 406
+
+
 2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
 2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -23398,9 +24344,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 5 transfer complete flag.
 2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HIFCR  CTCIF5    LL_DMA_ClearFlag_TC5
 2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 391
-
-
 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
@@ -23415,6 +24358,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 407
+
+
 2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF6);
 2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -23426,21 +24372,21 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
- 5931              		.loc 6 2277 22 view .LVU1892
- 5932              	.LBB543:
+ 6415              		.loc 6 2277 22 view .LVU2029
+ 6416              	.LBB579:
 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7);
- 5933              		.loc 6 2279 3 view .LVU1893
- 5934 00dc 4FF00062 		mov	r2, #134217728
- 5935 00e0 DA60     		str	r2, [r3, #12]
- 5936              	.LVL532:
- 5937              		.loc 6 2279 3 is_stmt 0 view .LVU1894
- 5938              	.LBE543:
- 5939              	.LBE542:
-2119:Src/main.c    ****   LL_USART_EnableDMAReq_TX(USART1);
- 5940              		.loc 1 2119 3 is_stmt 1 view .LVU1895
- 5941              	.LBB544:
- 5942              	.LBI544:
+ 6417              		.loc 6 2279 3 view .LVU2030
+ 6418 00dc 4FF00062 		mov	r2, #134217728
+ 6419 00e0 DA60     		str	r2, [r3, #12]
+ 6420              	.LVL594:
+ 6421              		.loc 6 2279 3 is_stmt 0 view .LVU2031
+ 6422              	.LBE579:
+ 6423              	.LBE578:
+2294:Src/main.c    ****   LL_USART_EnableDMAReq_TX(USART1);
+ 6424              		.loc 1 2294 3 is_stmt 1 view .LVU2032
+ 6425              	.LBB580:
+ 6426              	.LBI580:
 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -23458,9 +24404,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 1 transfer error flag.
 2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LIFCR  CTEIF1    LL_DMA_ClearFlag_TE1
 2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 392
-
-
 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
@@ -23475,6 +24418,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 408
+
+
 2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF2);
 2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -23518,9 +24464,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 393
-
-
 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
 2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF6);
@@ -23533,22 +24476,25 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
- 5943              		.loc 6 2365 22 view .LVU1896
- 5944              	.LBB545:
+ 6427              		.loc 6 2365 22 view .LVU2033
+ 6428              	.LBB581:
+ARM GAS  /tmp/ccEQxcUB.s 			page 409
+
+
 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7);
- 5945              		.loc 6 2367 3 view .LVU1897
- 5946 00e2 4FF00072 		mov	r2, #33554432
- 5947 00e6 DA60     		str	r2, [r3, #12]
- 5948              	.LVL533:
- 5949              		.loc 6 2367 3 is_stmt 0 view .LVU1898
- 5950              	.LBE545:
- 5951              	.LBE544:
-2120:Src/main.c    ****   LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7);
- 5952              		.loc 1 2120 3 is_stmt 1 view .LVU1899
- 5953              	.LBB546:
- 5954              	.LBI546:
- 5955              		.file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h"
+ 6429              		.loc 6 2367 3 view .LVU2034
+ 6430 00e2 4FF00072 		mov	r2, #33554432
+ 6431 00e6 DA60     		str	r2, [r3, #12]
+ 6432              	.LVL595:
+ 6433              		.loc 6 2367 3 is_stmt 0 view .LVU2035
+ 6434              	.LBE581:
+ 6435              	.LBE580:
+2295:Src/main.c    ****   LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7);
+ 6436              		.loc 1 2295 3 is_stmt 1 view .LVU2036
+ 6437              	.LBB582:
+ 6438              	.LBI582:
+ 6439              		.file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h"
    1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
    2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ******************************************************************************
    3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @file    stm32f7xx_ll_usart.h
@@ -23578,9 +24524,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Includes ------------------------------------------------------------------*/
   28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #include "stm32f7xx.h"
   29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 394
-
-
   30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @addtogroup STM32F7xx_LL_Driver
   31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
   32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -23595,6 +24538,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private types -------------------------------------------------------------*/
   42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private variables ---------------------------------------------------------*/
   43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 410
+
+
   44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private constants ---------------------------------------------------------*/
   45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Private_Constants USART Private Constants
   46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
@@ -23638,9 +24584,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   uint32_t StopBits;                  /*!< Specifies the number of stop bits transmitted.
   85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_STOPBI
   86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 395
-
-
   87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary
   88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            function @ref LL_USART_SetStopBitsLength().*/
   89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -23655,6 +24598,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
   99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary
  100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            function @ref LL_USART_SetTransferDirection().*/
+ARM GAS  /tmp/ccEQxcUB.s 			page 411
+
+
  101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   uint32_t HardwareFlowControl;       /*!< Specifies whether the hardware flow control mode is enab
  103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_HWCONT
@@ -23698,9 +24644,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   uint32_t LastBitClockPulse;         /*!< Specifies whether the clock pulse corresponding to the l
  143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            data bit (MSB) has to be output on the SCLK pin in synch
-ARM GAS  /tmp/ccwR4KB7.s 			page 396
-
-
  144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_LASTCL
  145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            USART HW configuration can be modified afterwards using 
@@ -23715,6 +24658,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USE_FULL_LL_DRIVER */
  156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported constants --------------------------------------------------------*/
+ARM GAS  /tmp/ccEQxcUB.s 			page 412
+
+
  158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Constants USART Exported Constants
  159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
  160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -23758,9 +24704,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RXNE                       USART_ISR_RXNE                /*!< Read data regist
  199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TC                         USART_ISR_TC                  /*!< Transmission com
  200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TXE                        USART_ISR_TXE                 /*!< Transmit data re
-ARM GAS  /tmp/ccwR4KB7.s 			page 397
-
-
  201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_LBDF                       USART_ISR_LBDF                /*!< LIN break detect
  202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTSIF                      USART_ISR_CTSIF               /*!< CTS interrupt fl
  203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTS                        USART_ISR_CTS                 /*!< CTS flag */
@@ -23775,6 +24718,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
  213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
  214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_WUF                        USART_ISR_WUF                 /*!< Wakeup from Stop
+ARM GAS  /tmp/ccEQxcUB.s 			page 413
+
+
  215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
  216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
  217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TEACK                      USART_ISR_TEACK               /*!< Transmit enable 
@@ -23818,9 +24764,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_DIRECTION Communication Direction
  256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
  257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 398
-
-
  258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_NONE                 0x00000000U                        /*!< Transmitter
  259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_RX                   USART_CR1_RE                       /*!< Transmitter
  260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX                   USART_CR1_TE                       /*!< Transmitter
@@ -23835,6 +24778,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_NONE                    0x00000000U                          /*!< Parity co
  270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_EVEN                    USART_CR1_PCE                        /*!< Parity co
  271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_ODD                     (USART_CR1_PCE | USART_CR1_PS)       /*!< Parity co
+ARM GAS  /tmp/ccEQxcUB.s 			page 414
+
+
  272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
  274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -23878,9 +24824,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
  313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /*USE_FULL_LL_DRIVER*/
-ARM GAS  /tmp/ccwR4KB7.s 			page 399
-
-
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
  317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
@@ -23895,6 +24838,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
  327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PHASE_1EDGE                    0x00000000U           /*!< The first clock transiti
+ARM GAS  /tmp/ccEQxcUB.s 			page 415
+
+
  329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PHASE_2EDGE                    USART_CR2_CPHA        /*!< The second clock transit
  330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
@@ -23938,9 +24884,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
  370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 400
-
-
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
  373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
  374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -23955,6 +24898,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_POSITIVE          0x00000000U           /*!< Logical data from the da
  385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_NEGATIVE          USART_CR2_DATAINV     /*!< Logical data from the da
+ARM GAS  /tmp/ccEQxcUB.s 			page 416
+
+
  386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
  388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -23998,9 +24944,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
  428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 401
-
-
  429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
  431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUS)
@@ -24015,6 +24958,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUS */
+ARM GAS  /tmp/ccEQxcUB.s 			page 417
+
+
  443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
  444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
  445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
@@ -24058,9 +25004,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported macro ------------------------------------------------------------*/
  485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Macros USART Exported Macros
-ARM GAS  /tmp/ccwR4KB7.s 			page 402
-
-
  486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
  487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -24075,6 +25018,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  __VALUE__ Value to be written in the register
  498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
  499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 418
+
+
  500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VAL
  501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -24118,9 +25064,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
  542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 403
-
-
  543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported functions --------------------------------------------------------*/
  545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -24135,6 +25078,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  USART Enable
  556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          UE            LL_USART_Enable
+ARM GAS  /tmp/ccEQxcUB.s 			page 419
+
+
  557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
  558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
  559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -24178,9 +25124,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          UESM          LL_USART_EnableInStopMode
  598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
  599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
-ARM GAS  /tmp/ccwR4KB7.s 			page 404
-
-
  600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
  602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -24195,6 +25138,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          UESM          LL_USART_DisableInStopMode
  612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
  613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 420
+
+
  614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
  616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -24238,9 +25184,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
  655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM);
  656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 405
-
-
  657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Indicate if USART clock is enabled in STOP Mode
@@ -24255,6 +25198,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_UCESM */
  670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM*/
+ARM GAS  /tmp/ccEQxcUB.s 			page 421
+
+
  671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Receiver Enable (Receiver is enabled and begins searching for a start bit)
  673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          RE            LL_USART_EnableDirectionRx
@@ -24298,9 +25244,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
  712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
  713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 406
-
-
  714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Configure simultaneously enabled/disabled states
@@ -24315,6 +25258,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_TX_RX
  726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
  727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 422
+
+
  728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirectio
  729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
  730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
@@ -24358,9 +25304,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Return Parity configuration (enabled/disabled and parity mode if enabled)
  770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          PS            LL_USART_GetParity\n
-ARM GAS  /tmp/ccwR4KB7.s 			page 407
-
-
  771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         CR1          PCE           LL_USART_GetParity
  772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
  773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
@@ -24375,6 +25318,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Set Receiver Wake Up method from Mute mode.
+ARM GAS  /tmp/ccEQxcUB.s 			page 423
+
+
  785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          WAKE          LL_USART_SetWakeUpMethod
  786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
  787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  Method This parameter can be one of the following values:
@@ -24418,9 +25364,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Return Word length (i.e. nb of data bits, excluding start and stop bits)
-ARM GAS  /tmp/ccwR4KB7.s 			page 408
-
-
  828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          M0            LL_USART_GetDataWidth\n
  829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         CR1          M1            LL_USART_GetDataWidth
  830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -24435,6 +25378,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
  840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 424
+
+
  842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Allow switch between Mute Mode and Active mode
  843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          MME           LL_USART_EnableMuteMode
  844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -24478,9 +25424,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
  884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 409
-
-
  885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
  886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
  887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -24495,6 +25438,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx)
  897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
  898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
+ARM GAS  /tmp/ccEQxcUB.s 			page 425
+
+
  899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
  900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -24538,9 +25484,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  ClockPhase This parameter can be one of the following values:
  940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_1EDGE
  941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_2EDGE
-ARM GAS  /tmp/ccwR4KB7.s 			page 410
-
-
  942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
  943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
@@ -24555,6 +25498,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          CPHA          LL_USART_GetClockPhase
  954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
  955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
+ARM GAS  /tmp/ccEQxcUB.s 			page 426
+
+
  956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_1EDGE
  957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_2EDGE
  958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -24598,9 +25544,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Configure Clock signal format (Phase Polarity and choice about output of last bit clock
  997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
  998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
-ARM GAS  /tmp/ccwR4KB7.s 			page 411
-
-
  999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Call of this function is equivalent to following function call sequence :
 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
@@ -24615,6 +25558,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  Polarity This parameter can be one of the following values:
 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_LOW
 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_HIGH
+ARM GAS  /tmp/ccEQxcUB.s 			page 427
+
+
 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  LBCPOutput This parameter can be one of the following values:
 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
@@ -24658,9 +25604,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          CLKEN         LL_USART_IsEnabledSCLKOutput
 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
-ARM GAS  /tmp/ccwR4KB7.s 			page 412
-
-
 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx)
 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -24675,6 +25618,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_0_5
 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1
 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1_5
+ARM GAS  /tmp/ccEQxcUB.s 			page 428
+
+
 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_2
 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -24718,9 +25664,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_NONE
 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_EVEN
 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_ODD
-ARM GAS  /tmp/ccwR4KB7.s 			page 413
-
-
 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  StopBits This parameter can be one of the following values:
 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_0_5
 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1
@@ -24735,6 +25678,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 429
+
+
 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Configure TX/RX pins swapping setting.
 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          SWAP          LL_USART_SetTXRXSwap
@@ -24778,9 +25724,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Retrieve RX pin active level logic configuration
-ARM GAS  /tmp/ccwR4KB7.s 			page 414
-
-
 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          RXINV         LL_USART_GetRXPinLevel
 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
@@ -24795,6 +25738,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Configure TX pin active level logic
 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          TXINV         LL_USART_SetTXPinLevel
+ARM GAS  /tmp/ccEQxcUB.s 			page 430
+
+
 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  PinInvMethod This parameter can be one of the following values:
 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
@@ -24838,9 +25784,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Retrieve Binary data configuration
 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          DATAINV       LL_USART_GetBinaryDataLogic
-ARM GAS  /tmp/ccwR4KB7.s 			page 415
-
-
 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
@@ -24855,6 +25798,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Configure transfer bit order (either Less or Most Significant Bit First)
 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   MSB First means data is transmitted/received with the MSB first, following the start bi
 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         LSB First means data is transmitted/received with data bit 0 first, following the start
+ARM GAS  /tmp/ccEQxcUB.s 			page 431
+
+
 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          MSBFIRST      LL_USART_SetTransferBitOrder
 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  BitOrder This parameter can be one of the following values:
@@ -24898,9 +25844,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable Auto Baud-Rate Detection
 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or 
-ARM GAS  /tmp/ccwR4KB7.s 			page 416
-
-
 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Auto Baud Rate detection feature is supported by the USARTx instance.
 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          ABREN         LL_USART_DisableAutoBaudRate
 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -24915,6 +25858,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Indicate if Auto Baud-Rate Detection mechanism is enabled
 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or 
 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Auto Baud Rate detection feature is supported by the USARTx instance.
+ARM GAS  /tmp/ccEQxcUB.s 			page 432
+
+
 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          ABREN         LL_USART_IsEnabledAutoBaud
 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
@@ -24958,9 +25904,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 417
-
-
 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable Receiver Timeout
@@ -24975,6 +25918,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable Receiver Timeout
+ARM GAS  /tmp/ccEQxcUB.s 			page 433
+
+
 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          RTOEN         LL_USART_DisableRxTimeout
 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
@@ -25018,9 +25964,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  NodeAddress 4 or 7 bit Address of the USART node.
 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 418
-
-
 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_
 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
@@ -25035,6 +25978,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          ADD           LL_USART_GetNodeAddress
 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 434
+
+
 1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(const USART_TypeDef *USARTx)
@@ -25078,9 +26024,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 419
-
-
 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -25095,6 +26038,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_CTSE);
+ARM GAS  /tmp/ccEQxcUB.s 			page 435
+
+
 1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -25138,9 +26084,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_NONE
-ARM GAS  /tmp/ccwR4KB7.s 			page 420
-
-
 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_RTS
 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_CTS
 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_RTS_CTS
@@ -25155,6 +26098,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          ONEBIT        LL_USART_EnableOneBitSamp
 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
+ARM GAS  /tmp/ccEQxcUB.s 			page 436
+
+
 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -25198,9 +26144,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable Overrun detection
 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          OVRDIS        LL_USART_DisableOverrunDetect
 1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 421
-
-
 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
@@ -25215,6 +26158,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(const USART_TypeDef *USARTx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 437
+
+
 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -25258,9 +26204,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Configure USART BRR register for achieving expected Baud Rate value.
-ARM GAS  /tmp/ccwR4KB7.s 			page 422
-
-
 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Compute and set USARTDIV value in BRR Register (full BRR content)
 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Peripheral clock and Baud rate values provided as function parameters should be valid
@@ -25275,6 +26218,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  BaudRate Baud Rate
 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 438
+
+
 1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverS
 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                           uint32_t BaudRate)
 1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -25318,9 +26264,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   {
 1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****     /* Do not perform a division by 0 */
 1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   }
-ARM GAS  /tmp/ccwR4KB7.s 			page 423
-
-
 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   else if (OverSampling == LL_USART_OVERSAMPLING_8)
 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   {
 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****     usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
@@ -25335,6 +26278,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****     {
 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****       brrresult = PeriphClk / usartdiv;
 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****     }
+ARM GAS  /tmp/ccEQxcUB.s 			page 439
+
+
 1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   }
 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return (brrresult);
 1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -25378,9 +26324,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Get Block Length value in reception
 1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll RTOR         BLEN          LL_USART_GetBlockLength
 1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 424
-
-
 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Value between Min_Data=0x00 and Max_Data=0xFF
 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx)
@@ -25395,6 +26338,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 440
+
+
 1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable IrDA mode
@@ -25438,9 +26384,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Configure IrDA Power Mode (Normal or Low Power)
 1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-ARM GAS  /tmp/ccwR4KB7.s 			page 425
-
-
 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         IrDA feature is supported by the USARTx instance.
 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          IRLP          LL_USART_SetIrdaPowerMode
 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -25455,6 +26398,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 441
+
+
 1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Retrieve IrDA Power Mode configuration (Normal or Low Power)
 1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
 1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         IrDA feature is supported by the USARTx instance.
@@ -25498,9 +26444,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
 1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 426
-
-
 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -25515,6 +26458,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Smartcard feature is supported by the USARTx instance.
 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          NACK          LL_USART_EnableSmartcardNACK
 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 442
+
+
 1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
@@ -25558,9 +26504,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
 1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 427
-
-
 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_SCEN);
 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -25575,6 +26518,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
+ARM GAS  /tmp/ccEQxcUB.s 			page 443
+
+
 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -25618,9 +26564,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Smartcard Auto-Retry Count value (Value between Min_Data=0 and Max_Data=7)
 1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(const USART_TypeDef *USARTx)
-ARM GAS  /tmp/ccwR4KB7.s 			page 428
-
-
 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);
 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -25635,6 +26578,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  PrescalerValue Value between Min_Data=0 and Max_Data=31
 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 444
+
+
 1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
 1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue);
@@ -25678,9 +26624,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
 2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 429
-
-
 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx)
 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
@@ -25695,6 +26638,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 445
+
+
 2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable Single Wire Half-Duplex mode
 2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
 2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Half-Duplex mode is supported by the USARTx instance.
@@ -25738,9 +26684,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
-ARM GAS  /tmp/ccwR4KB7.s 			page 430
-
-
 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -25755,6 +26698,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_LINBREAK_DETECT_11B
 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 446
+
+
 2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
@@ -25798,9 +26744,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
 2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 431
-
-
 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -25815,6 +26758,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx)
 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL);
+ARM GAS  /tmp/ccEQxcUB.s 			page 447
+
+
 2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -25858,9 +26804,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Driver Enable feature is supported by the USARTx instance.
 2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          DEAT          LL_USART_SetDEAssertionTime
 2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 432
-
-
 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  Time Value between Min_Data=0 and Max_Data=31
 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -25875,6 +26818,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Driver Enable feature is supported by the USARTx instance.
 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          DEAT          LL_USART_GetDEAssertionTime
 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 448
+
+
 2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(const USART_TypeDef *USARTx)
@@ -25918,9 +26864,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(const USART_TypeDef *USARTx)
 2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 433
-
-
 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -25935,6 +26878,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_DE_POLARITY_LOW
 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 449
+
+
 2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
@@ -25978,9 +26924,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
 2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
 2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Other remaining configurations items related to Asynchronous Mode
-ARM GAS  /tmp/ccwR4KB7.s 			page 434
-
-
 2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         (as Baud Rate, Word length, Parity, ...) should be set using
 2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         dedicated functions
 2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          LINEN         LL_USART_ConfigAsyncMode\n
@@ -25995,6 +26938,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   /* In Asynchronous mode, the following bits must be kept cleared:
 2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   - LINEN, CLKEN bits in the USART_CR2 register,
+ARM GAS  /tmp/ccEQxcUB.s 			page 450
+
+
 2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   - SCEN, IREN and HDSEL bits in the USART_CR3 register.
 2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
@@ -26038,9 +26984,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   /* set the UART/USART in Synchronous mode */
 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
-ARM GAS  /tmp/ccwR4KB7.s 			page 435
-
-
 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -26055,6 +26998,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         LIN feature is supported by the USARTx instance.
 2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Call of this function is equivalent to following function call sequence :
 2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
+ARM GAS  /tmp/ccEQxcUB.s 			page 451
+
+
 2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
@@ -26098,9 +27044,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
 2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
 2423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-ARM GAS  /tmp/ccwR4KB7.s 			page 436
-
-
 2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
 2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
 2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Other remaining configurations items related to Half Duplex Mode
@@ -26115,6 +27058,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 452
+
+
 2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   /* In Half Duplex mode, the following bits must be kept cleared:
 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   - LINEN and CLKEN bits in the USART_CR2 register,
@@ -26158,9 +27104,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
 2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   /* In Smartcard mode, the following bits must be kept cleared:
-ARM GAS  /tmp/ccwR4KB7.s 			page 437
-
-
 2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   - LINEN bit in the USART_CR2 register,
 2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   - IREN and HDSEL bits in the USART_CR3 register.
 2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -26175,6 +27118,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Perform basic configuration of USART for enabling use in Irda Mode
+ARM GAS  /tmp/ccEQxcUB.s 			page 453
+
+
 2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   In IRDA mode, the following bits must be kept cleared:
 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           - LINEN bit in the USART_CR2 register,
 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           - STOP and CLKEN bits in the USART_CR2 register,
@@ -26218,9 +27164,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Perform basic configuration of USART for enabling use in Multi processor Mode
 2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         (several USARTs connected in a network, one of the USARTs can be the master,
 2537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         its TX output connected to the RX inputs of the other slaves USARTs).
-ARM GAS  /tmp/ccwR4KB7.s 			page 438
-
-
 2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   In MultiProcessor mode, the following bits must be kept cleared:
 2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           - LINEN bit in the USART_CR2 register,
 2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           - CLKEN bit in the USART_CR2 register,
@@ -26235,6 +27178,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
 2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Other remaining configurations items related to Multi processor Mode
 2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         (as Baud Rate, Wake Up Method, Node address, ...) should be set using
+ARM GAS  /tmp/ccEQxcUB.s 			page 454
+
+
 2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         dedicated functions
 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          LINEN         LL_USART_ConfigMultiProcessMode\n
 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         CR2          CLKEN         LL_USART_ConfigMultiProcessMode\n
@@ -26278,9 +27224,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ISR          FE            LL_USART_IsActiveFlag_FE
 2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
-ARM GAS  /tmp/ccwR4KB7.s 			page 439
-
-
 2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx)
 2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -26295,6 +27238,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx)
 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 455
+
+
 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -26338,9 +27284,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 2650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx)
-ARM GAS  /tmp/ccwR4KB7.s 			page 440
-
-
 2652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
 2654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -26355,6 +27298,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
 2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 456
+
+
 2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART LIN Break Detection Flag is set or not
@@ -26398,9 +27344,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART Receiver Time Out Flag is set or not
 2708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ISR          RTOF          LL_USART_IsActiveFlag_RTO
-ARM GAS  /tmp/ccwR4KB7.s 			page 441
-
-
 2709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 2711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -26415,6 +27358,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Smartcard feature is supported by the USARTx instance.
 2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ISR          EOBF          LL_USART_IsActiveFlag_EOB
 2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 457
+
+
 2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(const USART_TypeDef *USARTx)
@@ -26458,9 +27404,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
 2765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 442
-
-
 2766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART Character Match Flag is set or not
@@ -26475,6 +27418,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART Send Break Flag is set or not
+ARM GAS  /tmp/ccEQxcUB.s 			page 458
+
+
 2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ISR          SBKF          LL_USART_IsActiveFlag_SBK
 2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
@@ -26518,9 +27464,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 2822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 443
-
-
 2823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx)
 2824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
@@ -26535,6 +27478,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(const USART_TypeDef *USARTx)
 2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 459
+
+
 2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
 2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -26578,9 +27524,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Clear Noise Error detected Flag
 2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ICR          NCF           LL_USART_ClearFlag_NE
-ARM GAS  /tmp/ccwR4KB7.s 			page 444
-
-
 2880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -26595,6 +27538,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 460
+
+
 2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
 2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
@@ -26638,9 +27584,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Clear LIN Break Detection Flag
-ARM GAS  /tmp/ccwR4KB7.s 			page 445
-
-
 2937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
 2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         LIN feature is supported by the USARTx instance.
 2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ICR          LBDCF         LL_USART_ClearFlag_LBD
@@ -26655,6 +27598,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Clear CTS Interrupt Flag
 2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ARM GAS  /tmp/ccEQxcUB.s 			page 461
+
+
 2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
 2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ICR          CTSCF         LL_USART_ClearFlag_nCTS
 2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -26698,9 +27644,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
 2992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
-ARM GAS  /tmp/ccwR4KB7.s 			page 446
-
-
 2994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
@@ -26715,6 +27658,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx)
 3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 462
+
+
 3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   WRITE_REG(USARTx->ICR, USART_ICR_WUCF);
 3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -26758,9 +27704,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
 3050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 447
-
-
 3051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE);
 3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -26775,6 +27718,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
 3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 463
+
+
 3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable Parity Error Interrupt
 3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          PEIE          LL_USART_EnableIT_PE
@@ -26818,9 +27764,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
 3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 448
-
-
 3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE);
 3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -26835,6 +27778,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
 3120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
+ARM GAS  /tmp/ccEQxcUB.s 			page 464
+
+
 3122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -26878,9 +27824,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx)
 3163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);
-ARM GAS  /tmp/ccwR4KB7.s 			page 449
-
-
 3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
@@ -26895,6 +27838,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 3177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 3178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 465
+
+
 3179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx)
 3180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
@@ -26938,9 +27884,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable TX Empty Interrupt
 3220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          TXEIE         LL_USART_DisableIT_TXE
 3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 450
-
-
 3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
@@ -26955,6 +27898,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 466
+
+
 3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -26998,9 +27944,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable LIN Break Detection Interrupt
 3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
 3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         LIN feature is supported by the USARTx instance.
-ARM GAS  /tmp/ccwR4KB7.s 			page 451
-
-
 3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          LBDIE         LL_USART_DisableIT_LBD
 3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
@@ -27015,6 +27958,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a fram
 3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
 3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           0: Interrupt is inhibited
+ARM GAS  /tmp/ccEQxcUB.s 			page 467
+
+
 3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
 3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          EIE           LL_USART_DisableIT_ERROR
 3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -27058,9 +28004,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
 3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
 3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 452
-
-
 3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable Smartcard Transmission Complete Before Guard Time Interrupt
 3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
 3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Smartcard feature is supported by the USARTx instance.
@@ -27075,6 +28018,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
 3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 468
+
+
 3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART IDLE Interrupt  source is enabled or disabled.
 3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          IDLEIE        LL_USART_IsEnabledIT_IDLE
 3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -27118,9 +28064,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1U : 0U);
 3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 453
-
-
 3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART Parity Error Interrupt is enabled or disabled.
 3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          PEIE          LL_USART_IsEnabledIT_PE
@@ -27135,6 +28078,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART Character Match Interrupt is enabled or disabled.
 3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          CMIE          LL_USART_IsEnabledIT_CM
+ARM GAS  /tmp/ccEQxcUB.s 			page 469
+
+
 3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -27178,9 +28124,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx)
 3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL);
-ARM GAS  /tmp/ccwR4KB7.s 			page 454
-
-
 3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -27195,6 +28138,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 470
+
+
 3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART CTS Interrupt is enabled or disabled.
 3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
 3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
@@ -27238,9 +28184,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);
 3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 455
-
-
 3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
 3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -27255,6 +28198,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable DMA Mode for reception
 3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          DMAR          LL_USART_EnableDMAReq_RX
 3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
+ARM GAS  /tmp/ccEQxcUB.s 			page 471
+
+
 3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
@@ -27291,21 +28237,18 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
- 5956              		.loc 7 3556 22 view .LVU1900
- 5957              	.L295:
+ 6440              		.loc 7 3556 22 view .LVU2037
+ 6441              	.L320:
 3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);
- 5958              		.loc 7 3558 3 discriminator 1 view .LVU1901
- 5959              	.LBB547:
- 5960              		.loc 7 3558 3 discriminator 1 view .LVU1902
-ARM GAS  /tmp/ccwR4KB7.s 			page 456
-
-
- 5961              		.loc 7 3558 3 discriminator 1 view .LVU1903
- 5962              		.loc 7 3558 3 discriminator 1 view .LVU1904
- 5963              	.LBB548:
- 5964              	.LBI548:
- 5965              		.file 8 "Drivers/CMSIS/Include/cmsis_gcc.h"
+ 6442              		.loc 7 3558 3 discriminator 1 view .LVU2038
+ 6443              	.LBB583:
+ 6444              		.loc 7 3558 3 discriminator 1 view .LVU2039
+ 6445              		.loc 7 3558 3 discriminator 1 view .LVU2040
+ 6446              		.loc 7 3558 3 discriminator 1 view .LVU2041
+ 6447              	.LBB584:
+ 6448              	.LBI584:
+ 6449              		.file 8 "Drivers/CMSIS/Include/cmsis_gcc.h"
    1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
    2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
    3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
@@ -27315,6 +28258,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
    7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
    8:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
    9:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
+ARM GAS  /tmp/ccEQxcUB.s 			page 472
+
+
   10:Drivers/CMSIS/Include/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
   11:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
   12:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
@@ -27358,9 +28304,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   50:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
   51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif                                           
   52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __NO_RETURN
-ARM GAS  /tmp/ccwR4KB7.s 			page 457
-
-
   53:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
   54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
   55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __USED
@@ -27375,6 +28318,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
   64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
   65:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
   66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ARM GAS  /tmp/ccEQxcUB.s 			page 473
+
+
   67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_UNION
   68:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
   69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -27418,9 +28364,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  107:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  108:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
  109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
-ARM GAS  /tmp/ccwR4KB7.s 			page 458
-
-
  110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ALIGNED
  111:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
  112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -27435,6 +28378,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  121:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
  122:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  123:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 474
+
+
  124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  125:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
  126:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
@@ -27478,9 +28424,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  164:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               non-secure Control Register value
  165:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
-ARM GAS  /tmp/ccwR4KB7.s 			page 459
-
-
  167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  168:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  169:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -27495,6 +28438,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  178:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Writes the given value to the Control Register.
  179:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
  180:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ARM GAS  /tmp/ccEQxcUB.s 			page 475
+
+
  181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
  182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  183:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
@@ -27538,9 +28484,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  221:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  222:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  223:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-ARM GAS  /tmp/ccwR4KB7.s 			page 460
-
-
  224:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
  225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  226:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -27555,6 +28498,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  235:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  236:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  237:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+ARM GAS  /tmp/ccEQxcUB.s 			page 476
+
+
  238:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
  239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  240:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -27598,9 +28544,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  279:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
  280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 461
-
-
  281:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  282:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
@@ -27615,6 +28558,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  294:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 477
+
+
  295:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  297:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
@@ -27658,9 +28604,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  335:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  336:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-ARM GAS  /tmp/ccwR4KB7.s 			page 462
-
-
  338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  339:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer (non-secure)
  340:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -27675,6 +28618,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  349:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 478
+
+
  352:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Stack Pointer (non-secure)
  353:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
  354:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               SP Register value
@@ -27718,9 +28664,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  393:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Priority Mask (non-secure)
  394:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
-ARM GAS  /tmp/ccwR4KB7.s 			page 463
-
-
  395:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Priority Mask value
  396:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
@@ -27735,6 +28678,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  406:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  408:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Priority Mask
+ARM GAS  /tmp/ccEQxcUB.s 			page 479
+
+
  409:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Priority Mask Register.
  410:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
  411:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
@@ -27778,9 +28724,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  449:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
  451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 464
-
-
  452:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid f" : : : "memory");
  453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  454:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -27795,6 +28738,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  463:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  464:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  465:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+ARM GAS  /tmp/ccEQxcUB.s 			page 480
+
+
  466:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
  467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  468:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -27838,9 +28784,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  508:Drivers/CMSIS/Include/cmsis_gcc.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 465
-
-
  509:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  511:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Base Priority with condition
@@ -27855,6 +28798,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  520:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  521:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ARM GAS  /tmp/ccEQxcUB.s 			page 481
+
+
  523:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Fault Mask
  524:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Fault Mask register.
  525:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Fault Mask register value
@@ -27898,9 +28844,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  565:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Fault Mask (non-secure)
-ARM GAS  /tmp/ccwR4KB7.s 			page 466
-
-
  566:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Fault Mask register when in secure state.
  567:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    faultMask  Fault Mask value to set
  568:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
@@ -27915,6 +28858,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  577:Drivers/CMSIS/Include/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
  578:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  579:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 482
+
+
  580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
  581:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
  582:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -27958,9 +28904,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  620:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  621:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
  622:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
-ARM GAS  /tmp/ccwR4KB7.s 			page 467
-
-
  623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -27975,6 +28918,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  634:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
  635:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
  636:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ARM GAS  /tmp/ccEQxcUB.s 			page 483
+
+
  637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
  638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
@@ -28018,9 +28964,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  677:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSPLIM Register value
  678:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
-ARM GAS  /tmp/ccwR4KB7.s 			page 468
-
-
  680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
  682:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
@@ -28035,6 +28978,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  691:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  692:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+ARM GAS  /tmp/ccEQxcUB.s 			page 484
+
+
  694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  695:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer Limit (non-secure)
  696:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -28078,9 +29024,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  735:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  736:Drivers/CMSIS/Include/cmsis_gcc.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 469
-
-
  737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
  738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  739:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer Limit (non-secure)
@@ -28095,6 +29038,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
  749:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
  750:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)MainStackPtrLimit;
+ARM GAS  /tmp/ccEQxcUB.s 			page 485
+
+
  751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
  752:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
  753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -28138,9 +29084,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  791:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
  793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 470
-
-
  794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
  795:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
  796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
@@ -28155,6 +29098,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  805:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)fpscr;
  806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ARM GAS  /tmp/ccEQxcUB.s 			page 486
+
+
  808:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  809:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
@@ -28198,9 +29144,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  848:Drivers/CMSIS/Include/cmsis_gcc.h ****            a low-power state until one of a number of events occurs.
  849:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE()                             __ASM volatile ("wfe")
-ARM GAS  /tmp/ccwR4KB7.s 			page 471
-
-
  851:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  852:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -28215,6 +29158,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  862:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Instruction Synchronization Barrier flushes the pipeline in the processor,
  863:Drivers/CMSIS/Include/cmsis_gcc.h ****            so that all instructions following the ISB are fetched from cache or memory,
  864:Drivers/CMSIS/Include/cmsis_gcc.h ****            after the instruction has been completed.
+ARM GAS  /tmp/ccEQxcUB.s 			page 487
+
+
  865:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
  867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -28258,9 +29204,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  905:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  906:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  907:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-ARM GAS  /tmp/ccwR4KB7.s 			page 472
-
-
  908:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
  909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -28275,6 +29218,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
  920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  921:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
+ARM GAS  /tmp/ccEQxcUB.s 			page 488
+
+
  922:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  923:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
  924:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
@@ -28318,9 +29264,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  963:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  964:Drivers/CMSIS/Include/cmsis_gcc.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 473
-
-
  965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  966:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Breakpoint
  967:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Causes the processor to enter Debug state.
@@ -28335,6 +29278,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
  976:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse bit order of value
  977:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the bit order of the given value.
  978:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
+ARM GAS  /tmp/ccEQxcUB.s 			page 489
+
+
  979:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
  980:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
@@ -28378,9 +29324,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1019:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   LDR Exclusive (8 bit)
 1020:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Executes a exclusive LDR instruction for 8 bit value.
 1021:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ptr  Pointer to data
-ARM GAS  /tmp/ccwR4KB7.s 			page 474
-
-
 1022:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return             value of type uint8_t at (*ptr)
 1023:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
@@ -28395,6 +29338,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1033:Drivers/CMSIS/Include/cmsis_gcc.h ****     */
 1034:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ARM GAS  /tmp/ccEQxcUB.s 			page 490
+
+
 1036:Drivers/CMSIS/Include/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -28428,37 +29374,37 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1066:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 1067:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
- 5966              		.loc 8 1068 31 view .LVU1905
- 5967              	.LBB549:
+ 6450              		.loc 8 1068 31 view .LVU2042
+ 6451              	.LBB585:
 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 1070:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t result;
- 5968              		.loc 8 1070 5 view .LVU1906
+ 6452              		.loc 8 1070 5 view .LVU2043
 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 5969              		.loc 8 1072 4 view .LVU1907
- 5970 00e8 794A     		ldr	r2, .L304+76
- 5971 00ea 02F10803 		add	r3, r2, #8
-ARM GAS  /tmp/ccwR4KB7.s 			page 475
-
-
- 5972              		.syntax unified
- 5973              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 5974 00ee 53E8003F 		ldrex r3, [r3]
- 5975              	@ 0 "" 2
- 5976              	.LVL534:
+ 6453              		.loc 8 1072 4 view .LVU2044
+ 6454 00e8 794A     		ldr	r2, .L329+76
+ 6455 00ea 02F10803 		add	r3, r2, #8
+ 6456              		.syntax unified
+ 6457              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 6458 00ee 53E8003F 		ldrex r3, [r3]
+ 6459              	@ 0 "" 2
+ 6460              	.LVL596:
 1073:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 5977              		.loc 8 1073 4 view .LVU1908
- 5978              		.loc 8 1073 4 is_stmt 0 view .LVU1909
- 5979              		.thumb
- 5980              		.syntax unified
- 5981              	.LBE549:
- 5982              	.LBE548:
- 5983              		.loc 7 3558 3 discriminator 1 view .LVU1910
- 5984 00f2 43F08003 		orr	r3, r3, #128
- 5985              	.LVL535:
- 5986              		.loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU1911
- 5987              	.LBB550:
- 5988              	.LBI550:
+ 6461              		.loc 8 1073 4 view .LVU2045
+ 6462              		.loc 8 1073 4 is_stmt 0 view .LVU2046
+ 6463              		.thumb
+ 6464              		.syntax unified
+ 6465              	.LBE585:
+ 6466              	.LBE584:
+ 6467              		.loc 7 3558 3 discriminator 1 view .LVU2047
+ 6468 00f2 43F08003 		orr	r3, r3, #128
+ARM GAS  /tmp/ccEQxcUB.s 			page 491
+
+
+ 6469              	.LVL597:
+ 6470              		.loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU2048
+ 6471              	.LBB586:
+ 6472              	.LBI586:
 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -28498,9 +29444,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1110:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 1112:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   STR Exclusive (32 bit)
-ARM GAS  /tmp/ccwR4KB7.s 			page 476
-
-
 1113:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 32 bit values.
 1114:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]  value  Value to store
 1115:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
@@ -28508,39 +29451,42 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 1117:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return          1  Function failed
 1118:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
- 5989              		.loc 8 1119 31 view .LVU1912
- 5990              	.LBB551:
+ 6473              		.loc 8 1119 31 view .LVU2049
+ 6474              	.LBB587:
 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 1121:Drivers/CMSIS/Include/cmsis_gcc.h ****    uint32_t result;
- 5991              		.loc 8 1121 4 view .LVU1913
+ 6475              		.loc 8 1121 4 view .LVU2050
 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1123:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 5992              		.loc 8 1123 4 view .LVU1914
- 5993 00f6 0832     		adds	r2, r2, #8
- 5994              		.syntax unified
- 5995              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 5996 00f8 42E80031 		strex r1, r3, [r2]
- 5997              	@ 0 "" 2
- 5998              	.LVL536:
+ARM GAS  /tmp/ccEQxcUB.s 			page 492
+
+
+ 6476              		.loc 8 1123 4 view .LVU2051
+ 6477 00f6 0832     		adds	r2, r2, #8
+ 6478              		.syntax unified
+ 6479              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 6480 00f8 42E80031 		strex r1, r3, [r2]
+ 6481              	@ 0 "" 2
+ 6482              	.LVL598:
 1124:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 5999              		.loc 8 1124 4 view .LVU1915
- 6000              		.loc 8 1124 4 is_stmt 0 view .LVU1916
- 6001              		.thumb
- 6002              		.syntax unified
- 6003              	.LBE551:
- 6004              	.LBE550:
- 6005              		.loc 7 3558 3 discriminator 1 view .LVU1917
- 6006 00fc 0029     		cmp	r1, #0
- 6007 00fe F3D1     		bne	.L295
- 6008              	.LBE547:
- 6009              		.loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU1918
- 6010              	.LVL537:
- 6011              		.loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU1919
- 6012              	.LBE546:
-2121:Src/main.c    ****   LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7);
- 6013              		.loc 1 2121 3 is_stmt 1 view .LVU1920
- 6014              	.LBB552:
- 6015              	.LBI552:
+ 6483              		.loc 8 1124 4 view .LVU2052
+ 6484              		.loc 8 1124 4 is_stmt 0 view .LVU2053
+ 6485              		.thumb
+ 6486              		.syntax unified
+ 6487              	.LBE587:
+ 6488              	.LBE586:
+ 6489              		.loc 7 3558 3 discriminator 1 view .LVU2054
+ 6490 00fc 0029     		cmp	r1, #0
+ 6491 00fe F3D1     		bne	.L320
+ 6492              	.LBE583:
+ 6493              		.loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU2055
+ 6494              	.LVL599:
+ 6495              		.loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU2056
+ 6496              	.LBE582:
+2296:Src/main.c    ****   LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7);
+ 6497              		.loc 1 2296 3 is_stmt 1 view .LVU2057
+ 6498              	.LBB588:
+ 6499              	.LBI588:
 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -28558,9 +29504,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 1 direct mode error flag.
 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LIFCR  CDMEIF1    LL_DMA_ClearFlag_DME1
 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
-ARM GAS  /tmp/ccwR4KB7.s 			page 477
-
-
 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME1(DMA_TypeDef *DMAx)
@@ -28575,6 +29518,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME2(DMA_TypeDef *DMAx)
+ARM GAS  /tmp/ccEQxcUB.s 			page 493
+
+
 2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF2);
 2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -28618,9 +29564,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
-ARM GAS  /tmp/ccwR4KB7.s 			page 478
-
-
 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME6(DMA_TypeDef *DMAx)
 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF6);
@@ -28635,6 +29578,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME7(DMA_TypeDef *DMAx)
 2454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF7);
+ARM GAS  /tmp/ccEQxcUB.s 			page 494
+
+
 2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -28678,9 +29624,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE3(DMA_TypeDef *DMAx)
 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 479
-
-
 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF3);
 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -28695,6 +29638,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF4);
 2511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 495
+
+
 2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 5 FIFO error flag.
 2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HIFCR  CFEIF5    LL_DMA_ClearFlag_FE5
@@ -28738,9 +29684,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Enable Half transfer interrupt.
-ARM GAS  /tmp/ccwR4KB7.s 			page 480
-
-
 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR        HTIE         LL_DMA_EnableIT_HT
 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
@@ -28755,6 +29698,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Stream)
+ARM GAS  /tmp/ccEQxcUB.s 			page 496
+
+
 2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA
 2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -28795,2924 +29741,3073 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream)
- 6016              		.loc 6 2609 22 view .LVU1921
- 6017              	.LBB553:
+ 6500              		.loc 6 2609 22 view .LVU2058
+ 6501              	.LBB589:
 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 481
-
-
 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA
- 6018              		.loc 6 2611 3 view .LVU1922
- 6019 0100 744B     		ldr	r3, .L304+80
- 6020 0102 D3F8B820 		ldr	r2, [r3, #184]
- 6021 0106 42F01002 		orr	r2, r2, #16
- 6022 010a C3F8B820 		str	r2, [r3, #184]
- 6023              	.LVL538:
- 6024              		.loc 6 2611 3 is_stmt 0 view .LVU1923
- 6025              	.LBE553:
- 6026              	.LBE552:
-2122:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
- 6027              		.loc 1 2122 3 is_stmt 1 view .LVU1924
- 6028              	.LBB554:
- 6029              	.LBI554:
+ 6502              		.loc 6 2611 3 view .LVU2059
+ 6503 0100 744B     		ldr	r3, .L329+80
+ 6504 0102 D3F8B820 		ldr	r2, [r3, #184]
+ 6505 0106 42F01002 		orr	r2, r2, #16
+ 6506 010a C3F8B820 		str	r2, [r3, #184]
+ 6507              	.LVL600:
+ 6508              		.loc 6 2611 3 is_stmt 0 view .LVU2060
+ 6509              	.LBE589:
+ 6510              	.LBE588:
+2297:Src/main.c    ****   LL_DMA_ClearFlag_TC7(DMA2);
+ 6511              		.loc 1 2297 3 is_stmt 1 view .LVU2061
+ 6512              	.LBB590:
+ 6513              	.LBI590:
+ARM GAS  /tmp/ccEQxcUB.s 			page 497
+
+
 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 6030              		.loc 6 2589 22 view .LVU1925
- 6031              	.LBB555:
+ 6514              		.loc 6 2589 22 view .LVU2062
+ 6515              	.LBB591:
 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6032              		.loc 6 2591 3 view .LVU1926
- 6033 010e D3F8B820 		ldr	r2, [r3, #184]
- 6034 0112 42F00402 		orr	r2, r2, #4
- 6035 0116 C3F8B820 		str	r2, [r3, #184]
- 6036              	.LVL539:
+ 6516              		.loc 6 2591 3 view .LVU2063
+ 6517 010e D3F8B820 		ldr	r2, [r3, #184]
+ 6518 0112 42F00402 		orr	r2, r2, #4
+ 6519 0116 C3F8B820 		str	r2, [r3, #184]
+ 6520              	.LVL601:
 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6037              		.loc 6 2591 3 is_stmt 0 view .LVU1927
- 6038              	.LBE555:
- 6039              	.LBE554:
-2123:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
- 6040              		.loc 1 2123 3 is_stmt 1 view .LVU1928
- 6041              	.LBB556:
- 6042              	.LBI556:
+ 6521              		.loc 6 2591 3 is_stmt 0 view .LVU2064
+ 6522              	.LBE591:
+ 6523              	.LBE590:
+2298:Src/main.c    ****   LL_DMA_ClearFlag_TE7(DMA2);
+ 6524              		.loc 1 2298 3 is_stmt 1 view .LVU2065
+ 6525              	.LBB592:
+ 6526              	.LBI592:
 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 6043              		.loc 6 2277 22 view .LVU1929
- 6044              	.LBB557:
+ 6527              		.loc 6 2277 22 view .LVU2066
+ 6528              	.LBB593:
 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6045              		.loc 6 2279 3 view .LVU1930
- 6046 011a 4FF00062 		mov	r2, #134217728
- 6047 011e DA60     		str	r2, [r3, #12]
- 6048              	.LVL540:
+ 6529              		.loc 6 2279 3 view .LVU2067
+ 6530 011a 4FF00062 		mov	r2, #134217728
+ 6531 011e DA60     		str	r2, [r3, #12]
+ 6532              	.LVL602:
 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6049              		.loc 6 2279 3 is_stmt 0 view .LVU1931
- 6050              	.LBE557:
- 6051              	.LBE556:
-2124:Src/main.c    ****   LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART
- 6052              		.loc 1 2124 3 is_stmt 1 view .LVU1932
- 6053              	.LBB558:
- 6054              	.LBI558:
+ 6533              		.loc 6 2279 3 is_stmt 0 view .LVU2068
+ 6534              	.LBE593:
+ 6535              	.LBE592:
+2299:Src/main.c    ****   LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART
+ 6536              		.loc 1 2299 3 is_stmt 1 view .LVU2069
+ 6537              	.LBB594:
+ 6538              	.LBI594:
 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 6055              		.loc 6 2365 22 view .LVU1933
- 6056              	.LBB559:
+ 6539              		.loc 6 2365 22 view .LVU2070
+ 6540              	.LBB595:
 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6057              		.loc 6 2367 3 view .LVU1934
- 6058 0120 4FF00072 		mov	r2, #33554432
- 6059 0124 DA60     		str	r2, [r3, #12]
- 6060              	.LVL541:
+ 6541              		.loc 6 2367 3 view .LVU2071
+ 6542 0120 4FF00072 		mov	r2, #33554432
+ 6543 0124 DA60     		str	r2, [r3, #12]
+ 6544              	.LVL603:
 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6061              		.loc 6 2367 3 is_stmt 0 view .LVU1935
-ARM GAS  /tmp/ccwR4KB7.s 			page 482
-
-
- 6062              	.LBE559:
- 6063              	.LBE558:
-2125:Src/main.c    **** 	
- 6064              		.loc 1 2125 3 is_stmt 1 view .LVU1936
- 6065 0126 6C4A     		ldr	r2, .L304+84
- 6066              	.LVL542:
- 6067              	.LBB560:
- 6068              	.LBI560:
+ 6545              		.loc 6 2367 3 is_stmt 0 view .LVU2072
+ 6546              	.LBE595:
+ 6547              	.LBE594:
+2300:Src/main.c    **** 	
+ 6548              		.loc 1 2300 3 is_stmt 1 view .LVU2073
+ 6549 0126 6C4A     		ldr	r2, .L329+84
+ 6550              	.LVL604:
+ 6551              	.LBB596:
+ 6552              	.LBI596:
  621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 6069              		.loc 6 621 26 view .LVU1937
- 6070              	.LBB561:
+ 6553              		.loc 6 621 26 view .LVU2074
+ 6554              	.LBB597:
  623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6071              		.loc 6 623 3 view .LVU1938
+ 6555              		.loc 6 623 3 view .LVU2075
  623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6072              		.loc 6 623 11 is_stmt 0 view .LVU1939
- 6073 0128 D3F8B830 		ldr	r3, [r3, #184]
- 6074 012c 03F0C003 		and	r3, r3, #192
- 6075              	.LVL543:
+ARM GAS  /tmp/ccEQxcUB.s 			page 498
+
+
+ 6556              		.loc 6 623 11 is_stmt 0 view .LVU2076
+ 6557 0128 D3F8B830 		ldr	r3, [r3, #184]
+ 6558 012c 03F0C003 		and	r3, r3, #192
+ 6559              	.LVL605:
  623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 6076              		.loc 6 623 11 view .LVU1940
- 6077              	.LBE561:
- 6078              	.LBE560:
- 6079              	.LBB562:
- 6080              	.LBI562:
+ 6560              		.loc 6 623 11 view .LVU2077
+ 6561              	.LBE597:
+ 6562              	.LBE596:
+ 6563              	.LBB598:
+ 6564              	.LBI598:
 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 6081              		.loc 6 1425 22 is_stmt 1 view .LVU1941
- 6082              	.LBB563:
+ 6565              		.loc 6 1425 22 is_stmt 1 view .LVU2078
+ 6566              	.LBB599:
 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   {
- 6083              		.loc 6 1428 3 view .LVU1942
+ 6567              		.loc 6 1428 3 view .LVU2079
 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   {
- 6084              		.loc 6 1428 6 is_stmt 0 view .LVU1943
- 6085 0130 402B     		cmp	r3, #64
- 6086 0132 7DD0     		beq	.L301
+ 6568              		.loc 6 1428 6 is_stmt 0 view .LVU2080
+ 6569 0130 402B     		cmp	r3, #64
+ 6570 0132 7DD0     		beq	.L326
 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****     WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
- 6087              		.loc 6 1436 5 is_stmt 1 view .LVU1944
- 6088 0134 674B     		ldr	r3, .L304+80
- 6089              	.LVL544:
+ 6571              		.loc 6 1436 5 is_stmt 1 view .LVU2081
+ 6572 0134 674B     		ldr	r3, .L329+80
+ 6573              	.LVL606:
 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****     WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
- 6090              		.loc 6 1436 5 is_stmt 0 view .LVU1945
- 6091 0136 C3F8C020 		str	r2, [r3, #192]
+ 6574              		.loc 6 1436 5 is_stmt 0 view .LVU2082
+ 6575 0136 C3F8C020 		str	r2, [r3, #192]
 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   }
- 6092              		.loc 6 1437 5 is_stmt 1 view .LVU1946
- 6093 013a 684A     		ldr	r2, .L304+88
- 6094 013c C3F8C420 		str	r2, [r3, #196]
- 6095              	.L297:
- 6096              	.LVL545:
+ 6576              		.loc 6 1437 5 is_stmt 1 view .LVU2083
+ 6577 013a 684A     		ldr	r2, .L329+88
+ 6578 013c C3F8C420 		str	r2, [r3, #196]
+ 6579              	.L322:
+ 6580              	.LVL607:
 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   }
- 6097              		.loc 6 1437 5 is_stmt 0 view .LVU1947
- 6098              	.LBE563:
- 6099              	.LBE562:
-2130:Src/main.c    **** 	SD_SLIDE = 0;
- 6100              		.loc 1 2130 2 is_stmt 1 view .LVU1948
-2130:Src/main.c    **** 	SD_SLIDE = 0;
- 6101              		.loc 1 2130 10 is_stmt 0 view .LVU1949
- 6102 0140 0024     		movs	r4, #0
- 6103 0142 674B     		ldr	r3, .L304+92
- 6104 0144 1C60     		str	r4, [r3]
-ARM GAS  /tmp/ccwR4KB7.s 			page 483
+ 6581              		.loc 6 1437 5 is_stmt 0 view .LVU2084
+ 6582              	.LBE599:
+ 6583              	.LBE598:
+2305:Src/main.c    **** 	SD_SLIDE = 0;
+ 6584              		.loc 1 2305 2 is_stmt 1 view .LVU2085
+2305:Src/main.c    **** 	SD_SLIDE = 0;
+ 6585              		.loc 1 2305 10 is_stmt 0 view .LVU2086
+ 6586 0140 0024     		movs	r4, #0
+ 6587 0142 674B     		ldr	r3, .L329+92
+ 6588 0144 1C60     		str	r4, [r3]
+2306:Src/main.c    **** 	//Reset all periphery
+ 6589              		.loc 1 2306 2 is_stmt 1 view .LVU2087
+2306:Src/main.c    **** 	//Reset all periphery
+ 6590              		.loc 1 2306 11 is_stmt 0 view .LVU2088
+ 6591 0146 674B     		ldr	r3, .L329+96
+ 6592 0148 1C60     		str	r4, [r3]
+2308:Src/main.c    **** 	HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
+ 6593              		.loc 1 2308 2 is_stmt 1 view .LVU2089
+ 6594 014a 674E     		ldr	r6, .L329+100
+ 6595 014c 2246     		mov	r2, r4
+ 6596 014e 0821     		movs	r1, #8
+ 6597 0150 3046     		mov	r0, r6
+ 6598 0152 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6599              	.LVL608:
+ARM GAS  /tmp/ccEQxcUB.s 			page 499
 
 
-2131:Src/main.c    **** 	//Reset all periphery
- 6105              		.loc 1 2131 2 is_stmt 1 view .LVU1950
-2131:Src/main.c    **** 	//Reset all periphery
- 6106              		.loc 1 2131 11 is_stmt 0 view .LVU1951
- 6107 0146 674B     		ldr	r3, .L304+96
- 6108 0148 1C60     		str	r4, [r3]
-2133:Src/main.c    **** 	HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
- 6109              		.loc 1 2133 2 is_stmt 1 view .LVU1952
- 6110 014a 674F     		ldr	r7, .L304+100
- 6111 014c 2246     		mov	r2, r4
- 6112 014e 0821     		movs	r1, #8
- 6113 0150 3846     		mov	r0, r7
- 6114 0152 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6115              	.LVL546:
-2134:Src/main.c    **** 	HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
- 6116              		.loc 1 2134 2 view .LVU1953
- 6117 0156 2246     		mov	r2, r4
- 6118 0158 0421     		movs	r1, #4
- 6119 015a 3846     		mov	r0, r7
- 6120 015c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6121              	.LVL547:
-2135:Src/main.c    **** 	HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
- 6122              		.loc 1 2135 2 view .LVU1954
- 6123 0160 DFF8A881 		ldr	r8, .L304+136
- 6124 0164 2246     		mov	r2, r4
- 6125 0166 4FF48071 		mov	r1, #256
- 6126 016a 4046     		mov	r0, r8
- 6127 016c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6128              	.LVL548:
-2136:Src/main.c    **** 	HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
- 6129              		.loc 1 2136 2 view .LVU1955
- 6130 0170 2246     		mov	r2, r4
- 6131 0172 1021     		movs	r1, #16
- 6132 0174 3846     		mov	r0, r7
- 6133 0176 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6134              	.LVL549:
-2137:Src/main.c    **** 	HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
- 6135              		.loc 1 2137 2 view .LVU1956
- 6136 017a 5C4E     		ldr	r6, .L304+104
- 6137 017c 2246     		mov	r2, r4
- 6138 017e 4FF48061 		mov	r1, #1024
- 6139 0182 3046     		mov	r0, r6
- 6140 0184 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6141              	.LVL550:
-2138:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
- 6142              		.loc 1 2138 2 view .LVU1957
- 6143 0188 594D     		ldr	r5, .L304+108
- 6144 018a 2246     		mov	r2, r4
- 6145 018c 0821     		movs	r1, #8
- 6146 018e 2846     		mov	r0, r5
- 6147 0190 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6148              	.LVL551:
-2139:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
- 6149              		.loc 1 2139 2 view .LVU1958
- 6150 0194 2246     		mov	r2, r4
- 6151 0196 0121     		movs	r1, #1
- 6152 0198 2846     		mov	r0, r5
-ARM GAS  /tmp/ccwR4KB7.s 			page 484
+2309:Src/main.c    **** 	HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
+ 6600              		.loc 1 2309 2 view .LVU2090
+ 6601 0156 2246     		mov	r2, r4
+ 6602 0158 8021     		movs	r1, #128
+ 6603 015a 3046     		mov	r0, r6
+ 6604 015c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6605              	.LVL609:
+2310:Src/main.c    **** 	HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
+ 6606              		.loc 1 2310 2 view .LVU2091
+ 6607 0160 624F     		ldr	r7, .L329+104
+ 6608 0162 2246     		mov	r2, r4
+ 6609 0164 4FF48071 		mov	r1, #256
+ 6610 0168 3846     		mov	r0, r7
+ 6611 016a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6612              	.LVL610:
+2311:Src/main.c    **** 	HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
+ 6613              		.loc 1 2311 2 view .LVU2092
+ 6614 016e 2246     		mov	r2, r4
+ 6615 0170 1021     		movs	r1, #16
+ 6616 0172 3046     		mov	r0, r6
+ 6617 0174 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6618              	.LVL611:
+2312:Src/main.c    **** 	HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
+ 6619              		.loc 1 2312 2 view .LVU2093
+ 6620 0178 DFF89081 		ldr	r8, .L329+136
+ 6621 017c 2246     		mov	r2, r4
+ 6622 017e 4FF48061 		mov	r1, #1024
+ 6623 0182 4046     		mov	r0, r8
+ 6624 0184 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6625              	.LVL612:
+2313:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
+ 6626              		.loc 1 2313 2 view .LVU2094
+ 6627 0188 594D     		ldr	r5, .L329+108
+ 6628 018a 2246     		mov	r2, r4
+ 6629 018c 0821     		movs	r1, #8
+ 6630 018e 2846     		mov	r0, r5
+ 6631 0190 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6632              	.LVL613:
+2314:Src/main.c    **** 	HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
+ 6633              		.loc 1 2314 2 view .LVU2095
+ 6634 0194 2246     		mov	r2, r4
+ 6635 0196 0121     		movs	r1, #1
+ 6636 0198 2846     		mov	r0, r5
+ 6637 019a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6638              	.LVL614:
+2315:Src/main.c    **** 	HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
+ 6639              		.loc 1 2315 2 view .LVU2096
+ 6640 019e 2246     		mov	r2, r4
+ 6641 01a0 0221     		movs	r1, #2
+ 6642 01a2 2846     		mov	r0, r5
+ 6643 01a4 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6644              	.LVL615:
+2316:Src/main.c    **** 	HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
+ 6645              		.loc 1 2316 2 view .LVU2097
+ 6646 01a8 2246     		mov	r2, r4
+ 6647 01aa 4FF40061 		mov	r1, #2048
+ 6648 01ae 4046     		mov	r0, r8
+ARM GAS  /tmp/ccEQxcUB.s 			page 500
 
 
- 6153 019a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6154              	.LVL552:
-2140:Src/main.c    **** 	HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
- 6155              		.loc 1 2140 2 view .LVU1959
- 6156 019e 2246     		mov	r2, r4
- 6157 01a0 0221     		movs	r1, #2
- 6158 01a2 2846     		mov	r0, r5
- 6159 01a4 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6160              	.LVL553:
-2141:Src/main.c    **** 	HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
- 6161              		.loc 1 2141 2 view .LVU1960
- 6162 01a8 2246     		mov	r2, r4
- 6163 01aa 4FF40061 		mov	r1, #2048
- 6164 01ae 3046     		mov	r0, r6
- 6165 01b0 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6166              	.LVL554:
-2142:Src/main.c    **** //	for (uint16_t i = 0; i < SD_Length; i++)
- 6167              		.loc 1 2142 2 view .LVU1961
- 6168 01b4 2246     		mov	r2, r4
- 6169 01b6 2021     		movs	r1, #32
- 6170 01b8 3846     		mov	r0, r7
- 6171 01ba FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6172              	.LVL555:
-2152:Src/main.c    **** 	HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC
- 6173              		.loc 1 2152 2 view .LVU1962
- 6174 01be 07F50067 		add	r7, r7, #2048
- 6175 01c2 0122     		movs	r2, #1
- 6176 01c4 4FF48061 		mov	r1, #1024
- 6177 01c8 3846     		mov	r0, r7
- 6178 01ca FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6179              	.LVL556:
-2153:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
- 6180              		.loc 1 2153 2 view .LVU1963
- 6181 01ce 494C     		ldr	r4, .L304+112
- 6182 01d0 0122     		movs	r2, #1
- 6183 01d2 4021     		movs	r1, #64
- 6184 01d4 2046     		mov	r0, r4
- 6185 01d6 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6186              	.LVL557:
-2154:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
- 6187              		.loc 1 2154 2 view .LVU1964
- 6188 01da 0122     		movs	r2, #1
- 6189 01dc 4FF48041 		mov	r1, #16384
- 6190 01e0 3846     		mov	r0, r7
- 6191 01e2 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6192              	.LVL558:
-2155:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
- 6193              		.loc 1 2155 2 view .LVU1965
- 6194 01e6 0122     		movs	r2, #1
- 6195 01e8 4FF48041 		mov	r1, #16384
- 6196 01ec 2046     		mov	r0, r4
- 6197 01ee FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6198              	.LVL559:
-2156:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
- 6199              		.loc 1 2156 2 view .LVU1966
- 6200 01f2 0122     		movs	r2, #1
- 6201 01f4 4FF48041 		mov	r1, #16384
-ARM GAS  /tmp/ccwR4KB7.s 			page 485
-
-
- 6202 01f8 3046     		mov	r0, r6
- 6203 01fa FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6204              	.LVL560:
-2157:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 
- 6205              		.loc 1 2157 2 view .LVU1967
- 6206 01fe 0122     		movs	r2, #1
- 6207 0200 4021     		movs	r1, #64
- 6208 0202 2846     		mov	r0, r5
- 6209 0204 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6210              	.LVL561:
-2158:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 
- 6211              		.loc 1 2158 2 view .LVU1968
- 6212 0208 0122     		movs	r2, #1
- 6213 020a 4FF48051 		mov	r1, #4096
- 6214 020e 3046     		mov	r0, r6
- 6215 0210 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6216              	.LVL562:
-2159:Src/main.c    **** 	
- 6217              		.loc 1 2159 2 view .LVU1969
- 6218 0214 0122     		movs	r2, #1
- 6219 0216 1021     		movs	r1, #16
- 6220 0218 2846     		mov	r0, r5
- 6221 021a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6222              	.LVL563:
-2163:Src/main.c    **** 	{
- 6223              		.loc 1 2163 2 view .LVU1970
-2163:Src/main.c    **** 	{
- 6224              		.loc 1 2163 6 is_stmt 0 view .LVU1971
- 6225 021e 0121     		movs	r1, #1
- 6226 0220 4046     		mov	r0, r8
- 6227 0222 FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 6228              	.LVL564:
-2163:Src/main.c    **** 	{
- 6229              		.loc 1 2163 5 discriminator 1 view .LVU1972
- 6230 0226 50B1     		cbz	r0, .L302
- 6231              	.L298:
-2194:Src/main.c    **** }
- 6232              		.loc 1 2194 2 is_stmt 1 view .LVU1973
- 6233 0228 FFF7FEFF 		bl	AD9102_Init
- 6234              	.LVL565:
-2195:Src/main.c    **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
- 6235              		.loc 1 2195 1 is_stmt 0 view .LVU1974
- 6236 022c BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
- 6237              	.LVL566:
- 6238              	.L301:
- 6239              	.LBB565:
- 6240              	.LBB564:
-1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****     WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
- 6241              		.loc 6 1430 5 is_stmt 1 view .LVU1975
- 6242 0230 284B     		ldr	r3, .L304+80
- 6243              	.LVL567:
-1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****     WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
- 6244              		.loc 6 1430 5 is_stmt 0 view .LVU1976
- 6245 0232 C3F8C420 		str	r2, [r3, #196]
-1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   }
- 6246              		.loc 6 1431 5 is_stmt 1 view .LVU1977
- 6247 0236 294A     		ldr	r2, .L304+88
-ARM GAS  /tmp/ccwR4KB7.s 			page 486
-
-
- 6248 0238 C3F8C020 		str	r2, [r3, #192]
- 6249 023c 80E7     		b	.L297
- 6250              	.LVL568:
- 6251              	.L302:
-1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   }
- 6252              		.loc 6 1431 5 is_stmt 0 view .LVU1978
- 6253              	.LBE564:
- 6254              	.LBE565:
-2166:Src/main.c    **** 		{
- 6255              		.loc 1 2166 3 is_stmt 1 view .LVU1979
-2166:Src/main.c    **** 		{
- 6256              		.loc 1 2166 7 is_stmt 0 view .LVU1980
- 6257 023e 4FF48071 		mov	r1, #256
- 6258 0242 2846     		mov	r0, r5
- 6259 0244 FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 6260              	.LVL569:
-2166:Src/main.c    **** 		{
- 6261              		.loc 1 2166 6 discriminator 1 view .LVU1981
- 6262 0248 0028     		cmp	r0, #0
- 6263 024a EDD1     		bne	.L298
-2169:Src/main.c    **** 			if (test == 0) //0 - suc
- 6264              		.loc 1 2169 4 is_stmt 1 view .LVU1982
-2169:Src/main.c    **** 			if (test == 0) //0 - suc
- 6265              		.loc 1 2169 11 is_stmt 0 view .LVU1983
- 6266 024c 2A48     		ldr	r0, .L304+116
- 6267 024e FFF7FEFF 		bl	Mount_SD
- 6268              	.LVL570:
-2169:Src/main.c    **** 			if (test == 0) //0 - suc
- 6269              		.loc 1 2169 9 discriminator 1 view .LVU1984
- 6270 0252 2A4B     		ldr	r3, .L304+120
- 6271 0254 1860     		str	r0, [r3]
-2170:Src/main.c    **** 			{
- 6272              		.loc 1 2170 4 is_stmt 1 view .LVU1985
-2170:Src/main.c    **** 			{
- 6273              		.loc 1 2170 7 is_stmt 0 view .LVU1986
- 6274 0256 18B1     		cbz	r0, .L303
- 6275              	.L299:
-2182:Src/main.c    **** 		}
- 6276              		.loc 1 2182 4 is_stmt 1 view .LVU1987
-2182:Src/main.c    **** 		}
- 6277              		.loc 1 2182 14 is_stmt 0 view .LVU1988
- 6278 0258 294B     		ldr	r3, .L304+124
- 6279 025a 0122     		movs	r2, #1
- 6280 025c 1A70     		strb	r2, [r3]
- 6281 025e E3E7     		b	.L298
- 6282              	.L303:
-2173:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
- 6283              		.loc 1 2173 5 is_stmt 1 view .LVU1989
-2173:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
- 6284              		.loc 1 2173 12 is_stmt 0 view .LVU1990
- 6285 0260 1E23     		movs	r3, #30
- 6286 0262 1A46     		mov	r2, r3
- 6287 0264 2749     		ldr	r1, .L304+128
- 6288 0266 2848     		ldr	r0, .L304+132
- 6289 0268 FFF7FEFF 		bl	Seek_Read_File
- 6290              	.LVL571:
-2173:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
-ARM GAS  /tmp/ccwR4KB7.s 			page 487
-
-
- 6291              		.loc 1 2173 10 discriminator 1 view .LVU1991
- 6292 026c 234C     		ldr	r4, .L304+120
- 6293 026e 2060     		str	r0, [r4]
-2174:Src/main.c    **** 				UART_rec_incr = 0;
- 6294              		.loc 1 2174 5 is_stmt 1 view .LVU1992
-2174:Src/main.c    **** 				UART_rec_incr = 0;
- 6295              		.loc 1 2174 12 is_stmt 0 view .LVU1993
- 6296 0270 2148     		ldr	r0, .L304+116
- 6297 0272 FFF7FEFF 		bl	Unmount_SD
- 6298              	.LVL572:
-2174:Src/main.c    **** 				UART_rec_incr = 0;
- 6299              		.loc 1 2174 10 discriminator 1 view .LVU1994
- 6300 0276 2060     		str	r0, [r4]
-2175:Src/main.c    **** 				flg_tmt = 0;//Reset the timeout flag
- 6301              		.loc 1 2175 5 is_stmt 1 view .LVU1995
-2175:Src/main.c    **** 				flg_tmt = 0;//Reset the timeout flag
- 6302              		.loc 1 2175 19 is_stmt 0 view .LVU1996
- 6303 0278 0023     		movs	r3, #0
- 6304 027a 084A     		ldr	r2, .L304+24
- 6305 027c 1380     		strh	r3, [r2]	@ movhi
-2176:Src/main.c    **** 			}
- 6306              		.loc 1 2176 5 is_stmt 1 view .LVU1997
-2176:Src/main.c    **** 			}
- 6307              		.loc 1 2176 13 is_stmt 0 view .LVU1998
- 6308 027e 064A     		ldr	r2, .L304+20
- 6309 0280 1370     		strb	r3, [r2]
- 6310 0282 E9E7     		b	.L299
- 6311              	.L305:
- 6312              		.align	2
- 6313              	.L304:
- 6314 0284 00000000 		.word	TO6
- 6315 0288 00000000 		.word	TO7
- 6316 028c 00000000 		.word	TO7_before
- 6317 0290 00000000 		.word	TO6_before
- 6318 0294 00000000 		.word	TO6_uart
- 6319 0298 00000000 		.word	flg_tmt
- 6320 029c 00000000 		.word	UART_rec_incr
- 6321 02a0 00000000 		.word	fgoto
- 6322 02a4 00000000 		.word	sizeoffile
- 6323 02a8 00000000 		.word	u_tx_flg
- 6324 02ac 00000000 		.word	u_rx_flg
- 6325 02b0 00000000 		.word	Long_Data
- 6326 02b4 00000000 		.word	Def_setup
- 6327 02b8 00000000 		.word	LD1_def_setup
- 6328 02bc 00000000 		.word	LD2_def_setup
- 6329 02c0 00000000 		.word	Curr_setup
- 6330 02c4 00000000 		.word	LD1_curr_setup
- 6331 02c8 00000000 		.word	LD2_curr_setup
- 6332 02cc 00100040 		.word	1073745920
- 6333 02d0 00100140 		.word	1073811456
- 6334 02d4 00640240 		.word	1073898496
- 6335 02d8 00000000 		.word	UART_DATA
- 6336 02dc 28100140 		.word	1073811496
- 6337 02e0 00000000 		.word	SD_SEEK
- 6338 02e4 00000000 		.word	SD_SLIDE
- 6339 02e8 00080240 		.word	1073874944
- 6340 02ec 00040240 		.word	1073873920
-ARM GAS  /tmp/ccwR4KB7.s 			page 488
-
-
- 6341 02f0 00000240 		.word	1073872896
- 6342 02f4 00140240 		.word	1073878016
- 6343 02f8 00000000 		.word	.LC0
- 6344 02fc 00000000 		.word	test
- 6345 0300 00000000 		.word	CPU_state
- 6346 0304 00000000 		.word	COMMAND
- 6347 0308 04000000 		.word	.LC1
- 6348 030c 000C0240 		.word	1073875968
- 6349              		.cfi_endproc
- 6350              	.LFE1207:
- 6352              		.section	.text.Get_ADC,"ax",%progbits
- 6353              		.align	1
- 6354              		.syntax unified
- 6355              		.thumb
- 6356              		.thumb_func
- 6358              	Get_ADC:
- 6359              	.LVL573:
- 6360              	.LFB1222:
-3064:Src/main.c    **** 	uint16_t OUT;
- 6361              		.loc 1 3064 1 is_stmt 1 view -0
- 6362              		.cfi_startproc
- 6363              		@ args = 0, pretend = 0, frame = 0
- 6364              		@ frame_needed = 0, uses_anonymous_args = 0
-3064:Src/main.c    **** 	uint16_t OUT;
- 6365              		.loc 1 3064 1 is_stmt 0 view .LVU2000
- 6366 0000 10B5     		push	{r4, lr}
- 6367              	.LCFI63:
- 6368              		.cfi_def_cfa_offset 8
- 6369              		.cfi_offset 4, -8
- 6370              		.cfi_offset 14, -4
- 6371 0002 0024     		movs	r4, #0
-3065:Src/main.c    **** 	switch (num)
- 6372              		.loc 1 3065 2 is_stmt 1 view .LVU2001
-3066:Src/main.c    **** 		{
- 6373              		.loc 1 3066 2 view .LVU2002
- 6374 0004 0528     		cmp	r0, #5
- 6375 0006 2CD8     		bhi	.L315
- 6376 0008 DFE800F0 		tbb	[pc, r0]
- 6377              	.L309:
- 6378 000c 03       		.byte	(.L314-.L309)/2
- 6379 000d 08       		.byte	(.L313-.L309)/2
- 6380 000e 12       		.byte	(.L312-.L309)/2
- 6381 000f 17       		.byte	(.L311-.L309)/2
- 6382 0010 1C       		.byte	(.L310-.L309)/2
- 6383 0011 26       		.byte	(.L308-.L309)/2
- 6384              		.p2align 1
- 6385              	.L314:
-3069:Src/main.c    **** 			break;
- 6386              		.loc 1 3069 5 view .LVU2003
- 6387 0012 1548     		ldr	r0, .L317
- 6388              	.LVL574:
-3069:Src/main.c    **** 			break;
- 6389              		.loc 1 3069 5 is_stmt 0 view .LVU2004
- 6390 0014 FFF7FEFF 		bl	HAL_ADC_Start
- 6391              	.LVL575:
-3070:Src/main.c    **** 			case 1:
- 6392              		.loc 1 3070 4 is_stmt 1 view .LVU2005
-ARM GAS  /tmp/ccwR4KB7.s 			page 489
-
-
- 6393 0018 2046     		mov	r0, r4
- 6394              	.L307:
- 6395              	.LVL576:
-3089:Src/main.c    **** }
- 6396              		.loc 1 3089 2 view .LVU2006
-3090:Src/main.c    **** 
- 6397              		.loc 1 3090 1 is_stmt 0 view .LVU2007
- 6398 001a 10BD     		pop	{r4, pc}
- 6399              	.LVL577:
- 6400              	.L313:
-3072:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
- 6401              		.loc 1 3072 5 is_stmt 1 view .LVU2008
- 6402 001c 124C     		ldr	r4, .L317
- 6403 001e 6421     		movs	r1, #100
- 6404 0020 2046     		mov	r0, r4
- 6405              	.LVL578:
-3072:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
- 6406              		.loc 1 3072 5 is_stmt 0 view .LVU2009
- 6407 0022 FFF7FEFF 		bl	HAL_ADC_PollForConversion
- 6408              	.LVL579:
-3073:Src/main.c    **** 			break;
- 6409              		.loc 1 3073 9 is_stmt 1 view .LVU2010
-3073:Src/main.c    **** 			break;
- 6410              		.loc 1 3073 15 is_stmt 0 view .LVU2011
- 6411 0026 2046     		mov	r0, r4
- 6412 0028 FFF7FEFF 		bl	HAL_ADC_GetValue
- 6413              	.LVL580:
-3073:Src/main.c    **** 			break;
- 6414              		.loc 1 3073 13 discriminator 1 view .LVU2012
- 6415 002c 80B2     		uxth	r0, r0
- 6416              	.LVL581:
-3074:Src/main.c    **** 			case 2:
- 6417              		.loc 1 3074 4 is_stmt 1 view .LVU2013
- 6418 002e F4E7     		b	.L307
- 6419              	.LVL582:
- 6420              	.L312:
-3076:Src/main.c    **** 			break;
- 6421              		.loc 1 3076 5 view .LVU2014
- 6422 0030 0D48     		ldr	r0, .L317
- 6423              	.LVL583:
-3076:Src/main.c    **** 			break;
- 6424              		.loc 1 3076 5 is_stmt 0 view .LVU2015
- 6425 0032 FFF7FEFF 		bl	HAL_ADC_Stop
- 6426              	.LVL584:
-3077:Src/main.c    **** 			case 3:
- 6427              		.loc 1 3077 4 is_stmt 1 view .LVU2016
- 6428 0036 2046     		mov	r0, r4
- 6429 0038 EFE7     		b	.L307
- 6430              	.LVL585:
- 6431              	.L311:
-3079:Src/main.c    **** 			break;
- 6432              		.loc 1 3079 5 view .LVU2017
- 6433 003a 0C48     		ldr	r0, .L317+4
- 6434              	.LVL586:
-3079:Src/main.c    **** 			break;
- 6435              		.loc 1 3079 5 is_stmt 0 view .LVU2018
- 6436 003c FFF7FEFF 		bl	HAL_ADC_Start
-ARM GAS  /tmp/ccwR4KB7.s 			page 490
-
-
- 6437              	.LVL587:
-3080:Src/main.c    **** 			case 4:
- 6438              		.loc 1 3080 4 is_stmt 1 view .LVU2019
- 6439 0040 2046     		mov	r0, r4
- 6440 0042 EAE7     		b	.L307
- 6441              	.LVL588:
- 6442              	.L310:
-3082:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
- 6443              		.loc 1 3082 5 view .LVU2020
- 6444 0044 094C     		ldr	r4, .L317+4
- 6445 0046 6421     		movs	r1, #100
- 6446 0048 2046     		mov	r0, r4
- 6447              	.LVL589:
-3082:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
- 6448              		.loc 1 3082 5 is_stmt 0 view .LVU2021
- 6449 004a FFF7FEFF 		bl	HAL_ADC_PollForConversion
- 6450              	.LVL590:
-3083:Src/main.c    **** 			break;
- 6451              		.loc 1 3083 9 is_stmt 1 view .LVU2022
-3083:Src/main.c    **** 			break;
- 6452              		.loc 1 3083 15 is_stmt 0 view .LVU2023
- 6453 004e 2046     		mov	r0, r4
- 6454 0050 FFF7FEFF 		bl	HAL_ADC_GetValue
- 6455              	.LVL591:
-3083:Src/main.c    **** 			break;
- 6456              		.loc 1 3083 13 discriminator 1 view .LVU2024
- 6457 0054 80B2     		uxth	r0, r0
- 6458              	.LVL592:
-3084:Src/main.c    **** 			case 5:
- 6459              		.loc 1 3084 4 is_stmt 1 view .LVU2025
- 6460 0056 E0E7     		b	.L307
- 6461              	.LVL593:
- 6462              	.L308:
-3086:Src/main.c    **** 			break;
- 6463              		.loc 1 3086 9 view .LVU2026
- 6464 0058 0448     		ldr	r0, .L317+4
- 6465              	.LVL594:
-3086:Src/main.c    **** 			break;
- 6466              		.loc 1 3086 9 is_stmt 0 view .LVU2027
- 6467 005a FFF7FEFF 		bl	HAL_ADC_Stop
- 6468              	.LVL595:
-3087:Src/main.c    **** 		}
- 6469              		.loc 1 3087 4 is_stmt 1 view .LVU2028
- 6470 005e 2046     		mov	r0, r4
- 6471 0060 DBE7     		b	.L307
- 6472              	.LVL596:
- 6473              	.L315:
-3066:Src/main.c    **** 		{
- 6474              		.loc 1 3066 2 is_stmt 0 view .LVU2029
- 6475 0062 2046     		mov	r0, r4
- 6476              	.LVL597:
-3066:Src/main.c    **** 		{
- 6477              		.loc 1 3066 2 view .LVU2030
- 6478 0064 D9E7     		b	.L307
- 6479              	.L318:
- 6480 0066 00BF     		.align	2
- 6481              	.L317:
-ARM GAS  /tmp/ccwR4KB7.s 			page 491
-
-
- 6482 0068 00000000 		.word	hadc1
- 6483 006c 00000000 		.word	hadc3
- 6484              		.cfi_endproc
- 6485              	.LFE1222:
- 6487              		.section	.text.Set_LTEC,"ax",%progbits
- 6488              		.align	1
- 6489              		.global	Set_LTEC
- 6490              		.syntax unified
- 6491              		.thumb
- 6492              		.thumb_func
- 6494              	Set_LTEC:
- 6495              	.LVL598:
- 6496              	.LFB1220:
-2884:Src/main.c    **** 	uint32_t tmp32;
- 6497              		.loc 1 2884 1 is_stmt 1 view -0
- 6498              		.cfi_startproc
- 6499              		@ args = 0, pretend = 0, frame = 0
- 6500              		@ frame_needed = 0, uses_anonymous_args = 0
-2885:Src/main.c    **** 
- 6501              		.loc 1 2885 2 view .LVU2032
-2889:Src/main.c    **** 	{
- 6502              		.loc 1 2889 2 view .LVU2033
-2889:Src/main.c    **** 	{
- 6503              		.loc 1 2889 5 is_stmt 0 view .LVU2034
- 6504 0000 0328     		cmp	r0, #3
- 6505 0002 18BF     		it	ne
- 6506 0004 0128     		cmpne	r0, #1
- 6507 0006 00F0A380 		beq	.L353
-2884:Src/main.c    **** 	uint32_t tmp32;
- 6508              		.loc 1 2884 1 view .LVU2035
- 6509 000a 38B5     		push	{r3, r4, r5, lr}
- 6510              	.LCFI64:
- 6511              		.cfi_def_cfa_offset 16
- 6512              		.cfi_offset 3, -16
- 6513              		.cfi_offset 4, -12
- 6514              		.cfi_offset 5, -8
- 6515              		.cfi_offset 14, -4
- 6516 000c 0C46     		mov	r4, r1
-2895:Src/main.c    **** 	{
- 6517              		.loc 1 2895 2 is_stmt 1 view .LVU2036
- 6518 000e 0138     		subs	r0, r0, #1
- 6519              	.LVL599:
-2895:Src/main.c    **** 	{
- 6520              		.loc 1 2895 2 is_stmt 0 view .LVU2037
- 6521 0010 0328     		cmp	r0, #3
- 6522 0012 23D8     		bhi	.L321
- 6523 0014 DFE800F0 		tbb	[pc, r0]
- 6524              	.L323:
- 6525 0018 02       		.byte	(.L326-.L323)/2
- 6526 0019 3B       		.byte	(.L325-.L323)/2
- 6527 001a 5B       		.byte	(.L324-.L323)/2
- 6528 001b 7C       		.byte	(.L322-.L323)/2
- 6529              		.p2align 1
- 6530              	.L326:
-2898:Src/main.c    **** 			//tmp32=0;
- 6531              		.loc 1 2898 4 is_stmt 1 view .LVU2038
- 6532 001c 0022     		movs	r2, #0
-ARM GAS  /tmp/ccwR4KB7.s 			page 492
-
-
- 6533 001e 4FF48041 		mov	r1, #16384
- 6534              	.LVL600:
-2898:Src/main.c    **** 			//tmp32=0;
- 6535              		.loc 1 2898 4 is_stmt 0 view .LVU2039
- 6536 0022 4C48     		ldr	r0, .L356
- 6537              	.LVL601:
-2898:Src/main.c    **** 			//tmp32=0;
- 6538              		.loc 1 2898 4 view .LVU2040
- 6539 0024 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6540              	.LVL602:
-2901:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6541              		.loc 1 2901 4 is_stmt 1 view .LVU2041
-2902:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6542              		.loc 1 2902 4 view .LVU2042
-2901:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6543              		.loc 1 2901 10 is_stmt 0 view .LVU2043
- 6544 0028 0022     		movs	r2, #0
- 6545              	.LVL603:
- 6546              	.L327:
-2902:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6547              		.loc 1 2902 42 is_stmt 1 discriminator 1 view .LVU2044
- 6548              	.LBB566:
- 6549              	.LBI566:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6550              		.loc 4 916 26 view .LVU2045
- 6551              	.LBB567:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6552              		.loc 4 918 3 view .LVU2046
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6553              		.loc 4 918 12 is_stmt 0 view .LVU2047
- 6554 002a 4B4B     		ldr	r3, .L356+4
- 6555 002c 9B68     		ldr	r3, [r3, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6556              		.loc 4 918 66 view .LVU2048
- 6557 002e 13F0020F 		tst	r3, #2
- 6558 0032 04D1     		bne	.L328
- 6559              	.LVL604:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6560              		.loc 4 918 66 view .LVU2049
- 6561              	.LBE567:
- 6562              	.LBE566:
-2902:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6563              		.loc 1 2902 42 discriminator 2 view .LVU2050
- 6564 0034 B2F5FA7F 		cmp	r2, #500
- 6565 0038 01D8     		bhi	.L328
-2902:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6566              		.loc 1 2902 59 is_stmt 1 discriminator 3 view .LVU2051
-2902:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6567              		.loc 1 2902 64 is_stmt 0 discriminator 3 view .LVU2052
- 6568 003a 0132     		adds	r2, r2, #1
- 6569              	.LVL605:
-2902:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6570              		.loc 1 2902 64 discriminator 3 view .LVU2053
- 6571 003c F5E7     		b	.L327
- 6572              	.L328:
-2903:Src/main.c    **** 			tmp32 = 0;
- 6573              		.loc 1 2903 4 is_stmt 1 view .LVU2054
-ARM GAS  /tmp/ccwR4KB7.s 			page 493
-
-
- 6574              	.LVL606:
- 6575              	.LBB568:
- 6576              	.LBI568:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6577              		.loc 4 1373 22 view .LVU2055
- 6578              	.LBB569:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
- 6579              		.loc 4 1376 3 view .LVU2056
- 6580              		.loc 4 1377 3 view .LVU2057
- 6581              		.loc 4 1377 10 is_stmt 0 view .LVU2058
- 6582 003e 464B     		ldr	r3, .L356+4
- 6583 0040 9C81     		strh	r4, [r3, #12]	@ movhi
- 6584              	.LVL607:
- 6585              		.loc 4 1377 10 view .LVU2059
- 6586              	.LBE569:
- 6587              	.LBE568:
-2904:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6588              		.loc 1 2904 4 is_stmt 1 view .LVU2060
-2905:Src/main.c    **** 			(void) SPI2->DR;
- 6589              		.loc 1 2905 4 view .LVU2061
-2904:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6590              		.loc 1 2904 10 is_stmt 0 view .LVU2062
- 6591 0042 0022     		movs	r2, #0
- 6592              	.LVL608:
- 6593              	.L330:
-2905:Src/main.c    **** 			(void) SPI2->DR;
- 6594              		.loc 1 2905 43 is_stmt 1 discriminator 1 view .LVU2063
- 6595              	.LBB570:
- 6596              	.LBI570:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6597              		.loc 4 905 26 view .LVU2064
- 6598              	.LBB571:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6599              		.loc 4 907 3 view .LVU2065
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6600              		.loc 4 907 12 is_stmt 0 view .LVU2066
- 6601 0044 444B     		ldr	r3, .L356+4
- 6602 0046 9B68     		ldr	r3, [r3, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6603              		.loc 4 907 68 view .LVU2067
- 6604 0048 13F0010F 		tst	r3, #1
- 6605 004c 04D1     		bne	.L331
- 6606              	.LVL609:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6607              		.loc 4 907 68 view .LVU2068
- 6608              	.LBE571:
- 6609              	.LBE570:
-2905:Src/main.c    **** 			(void) SPI2->DR;
- 6610              		.loc 1 2905 43 discriminator 2 view .LVU2069
- 6611 004e B2F5FA7F 		cmp	r2, #500
- 6612 0052 01D8     		bhi	.L331
-2905:Src/main.c    **** 			(void) SPI2->DR;
- 6613              		.loc 1 2905 60 is_stmt 1 discriminator 3 view .LVU2070
-2905:Src/main.c    **** 			(void) SPI2->DR;
- 6614              		.loc 1 2905 65 is_stmt 0 discriminator 3 view .LVU2071
- 6615 0054 0132     		adds	r2, r2, #1
- 6616              	.LVL610:
-ARM GAS  /tmp/ccwR4KB7.s 			page 494
-
-
-2905:Src/main.c    **** 			(void) SPI2->DR;
- 6617              		.loc 1 2905 65 discriminator 3 view .LVU2072
- 6618 0056 F5E7     		b	.L330
- 6619              	.L331:
-2906:Src/main.c    **** 		break;
- 6620              		.loc 1 2906 4 is_stmt 1 view .LVU2073
- 6621 0058 3F4B     		ldr	r3, .L356+4
- 6622 005a DB68     		ldr	r3, [r3, #12]
-2907:Src/main.c    **** 		case 2:
- 6623              		.loc 1 2907 3 view .LVU2074
- 6624              	.LVL611:
- 6625              	.L321:
-2943:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
- 6626              		.loc 1 2943 2 view .LVU2075
- 6627 005c 3D4D     		ldr	r5, .L356
- 6628 005e 0122     		movs	r2, #1
- 6629 0060 4FF48041 		mov	r1, #16384
- 6630 0064 2846     		mov	r0, r5
- 6631 0066 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6632              	.LVL612:
-2944:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
- 6633              		.loc 1 2944 2 view .LVU2076
- 6634 006a 3C4C     		ldr	r4, .L356+8
- 6635              	.LVL613:
-2944:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
- 6636              		.loc 1 2944 2 is_stmt 0 view .LVU2077
- 6637 006c 0122     		movs	r2, #1
- 6638 006e 4021     		movs	r1, #64
- 6639 0070 2046     		mov	r0, r4
- 6640 0072 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6641              	.LVL614:
-2945:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
- 6642              		.loc 1 2945 2 is_stmt 1 view .LVU2078
- 6643 0076 0122     		movs	r2, #1
- 6644 0078 4FF48051 		mov	r1, #4096
- 6645 007c 2846     		mov	r0, r5
- 6646 007e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6647              	.LVL615:
-2946:Src/main.c    **** }
- 6648              		.loc 1 2946 2 view .LVU2079
- 6649 0082 0122     		movs	r2, #1
- 6650 0084 1021     		movs	r1, #16
- 6651 0086 2046     		mov	r0, r4
- 6652 0088 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6653              	.LVL616:
-2947:Src/main.c    **** static uint16_t MPhD_T(uint8_t num)
- 6654              		.loc 1 2947 1 is_stmt 0 view .LVU2080
- 6655 008c 38BD     		pop	{r3, r4, r5, pc}
+ 6649 01b0 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6650              	.LVL616:
+2317:Src/main.c    **** //	for (uint16_t i = 0; i < SD_Length; i++)
+ 6651              		.loc 1 2317 2 view .LVU2098
+ 6652 01b4 2246     		mov	r2, r4
+ 6653 01b6 2021     		movs	r1, #32
+ 6654 01b8 3046     		mov	r0, r6
+ 6655 01ba FFF7FEFF 		bl	HAL_GPIO_WritePin
  6656              	.LVL617:
- 6657              	.L325:
-2910:Src/main.c    **** 			//tmp32=0;
- 6658              		.loc 1 2910 4 is_stmt 1 view .LVU2081
- 6659 008e 0022     		movs	r2, #0
- 6660 0090 4021     		movs	r1, #64
- 6661              	.LVL618:
-2910:Src/main.c    **** 			//tmp32=0;
- 6662              		.loc 1 2910 4 is_stmt 0 view .LVU2082
-ARM GAS  /tmp/ccwR4KB7.s 			page 495
+2327:Src/main.c    **** 	HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC
+ 6657              		.loc 1 2327 2 view .LVU2099
+ 6658 01be 06F50066 		add	r6, r6, #2048
+ 6659 01c2 0122     		movs	r2, #1
+ 6660 01c4 4FF48061 		mov	r1, #1024
+ 6661 01c8 3046     		mov	r0, r6
+ 6662 01ca FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6663              	.LVL618:
+2328:Src/main.c    **** 	HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
+ 6664              		.loc 1 2328 2 view .LVU2100
+ 6665 01ce 494C     		ldr	r4, .L329+112
+ 6666 01d0 0122     		movs	r2, #1
+ 6667 01d2 4021     		movs	r1, #64
+ 6668 01d4 2046     		mov	r0, r4
+ 6669 01d6 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6670              	.LVL619:
+2329:Src/main.c    **** 	HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
+ 6671              		.loc 1 2329 2 view .LVU2101
+ 6672 01da 0122     		movs	r2, #1
+ 6673 01dc 4FF48041 		mov	r1, #16384
+ 6674 01e0 3046     		mov	r0, r6
+ 6675 01e2 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6676              	.LVL620:
+2330:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
+ 6677              		.loc 1 2330 2 view .LVU2102
+ 6678 01e6 0122     		movs	r2, #1
+ 6679 01e8 4FF48041 		mov	r1, #16384
+ 6680 01ec 2046     		mov	r0, r4
+ 6681 01ee FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6682              	.LVL621:
+2331:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
+ 6683              		.loc 1 2331 2 view .LVU2103
+ 6684 01f2 0122     		movs	r2, #1
+ 6685 01f4 4FF48041 		mov	r1, #16384
+ 6686 01f8 4046     		mov	r0, r8
+ 6687 01fa FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6688              	.LVL622:
+2332:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 
+ 6689              		.loc 1 2332 2 view .LVU2104
+ 6690 01fe 0122     		movs	r2, #1
+ 6691 0200 4021     		movs	r1, #64
+ 6692 0202 2846     		mov	r0, r5
+ 6693 0204 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6694              	.LVL623:
+2333:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 
+ 6695              		.loc 1 2333 2 view .LVU2105
+ 6696 0208 0122     		movs	r2, #1
+ 6697 020a 4FF48051 		mov	r1, #4096
+ARM GAS  /tmp/ccEQxcUB.s 			page 501
 
 
- 6663 0092 3248     		ldr	r0, .L356+8
- 6664 0094 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6665              	.LVL619:
-2913:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6666              		.loc 1 2913 4 is_stmt 1 view .LVU2083
-2914:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6667              		.loc 1 2914 4 view .LVU2084
-2913:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6668              		.loc 1 2913 10 is_stmt 0 view .LVU2085
- 6669 0098 0022     		movs	r2, #0
- 6670              	.LVL620:
- 6671              	.L333:
-2914:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6672              		.loc 1 2914 42 is_stmt 1 discriminator 1 view .LVU2086
- 6673              	.LBB572:
- 6674              	.LBI572:
+ 6698 020e 3846     		mov	r0, r7
+ 6699 0210 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6700              	.LVL624:
+2334:Src/main.c    **** 	
+ 6701              		.loc 1 2334 2 view .LVU2106
+ 6702 0214 0122     		movs	r2, #1
+ 6703 0216 1021     		movs	r1, #16
+ 6704 0218 2846     		mov	r0, r5
+ 6705 021a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6706              	.LVL625:
+2338:Src/main.c    **** 	{
+ 6707              		.loc 1 2338 2 view .LVU2107
+2338:Src/main.c    **** 	{
+ 6708              		.loc 1 2338 6 is_stmt 0 view .LVU2108
+ 6709 021e 0121     		movs	r1, #1
+ 6710 0220 3846     		mov	r0, r7
+ 6711 0222 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 6712              	.LVL626:
+2338:Src/main.c    **** 	{
+ 6713              		.loc 1 2338 5 discriminator 1 view .LVU2109
+ 6714 0226 50B1     		cbz	r0, .L327
+ 6715              	.L323:
+2369:Src/main.c    **** }
+ 6716              		.loc 1 2369 2 is_stmt 1 view .LVU2110
+ 6717 0228 FFF7FEFF 		bl	AD9102_Init
+ 6718              	.LVL627:
+2370:Src/main.c    **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
+ 6719              		.loc 1 2370 1 is_stmt 0 view .LVU2111
+ 6720 022c BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 6721              	.LVL628:
+ 6722              	.L326:
+ 6723              	.LBB601:
+ 6724              	.LBB600:
+1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****     WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
+ 6725              		.loc 6 1430 5 is_stmt 1 view .LVU2112
+ 6726 0230 284B     		ldr	r3, .L329+80
+ 6727              	.LVL629:
+1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****     WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
+ 6728              		.loc 6 1430 5 is_stmt 0 view .LVU2113
+ 6729 0232 C3F8C420 		str	r2, [r3, #196]
+1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   }
+ 6730              		.loc 6 1431 5 is_stmt 1 view .LVU2114
+ 6731 0236 294A     		ldr	r2, .L329+88
+ 6732 0238 C3F8C020 		str	r2, [r3, #192]
+ 6733 023c 80E7     		b	.L322
+ 6734              	.LVL630:
+ 6735              	.L327:
+1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   }
+ 6736              		.loc 6 1431 5 is_stmt 0 view .LVU2115
+ 6737              	.LBE600:
+ 6738              	.LBE601:
+2341:Src/main.c    **** 		{
+ 6739              		.loc 1 2341 3 is_stmt 1 view .LVU2116
+2341:Src/main.c    **** 		{
+ 6740              		.loc 1 2341 7 is_stmt 0 view .LVU2117
+ 6741 023e 4FF48071 		mov	r1, #256
+ 6742 0242 2846     		mov	r0, r5
+ARM GAS  /tmp/ccEQxcUB.s 			page 502
+
+
+ 6743 0244 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 6744              	.LVL631:
+2341:Src/main.c    **** 		{
+ 6745              		.loc 1 2341 6 discriminator 1 view .LVU2118
+ 6746 0248 0028     		cmp	r0, #0
+ 6747 024a EDD1     		bne	.L323
+2344:Src/main.c    **** 			if (test == 0) //0 - suc
+ 6748              		.loc 1 2344 4 is_stmt 1 view .LVU2119
+2344:Src/main.c    **** 			if (test == 0) //0 - suc
+ 6749              		.loc 1 2344 11 is_stmt 0 view .LVU2120
+ 6750 024c 2A48     		ldr	r0, .L329+116
+ 6751 024e FFF7FEFF 		bl	Mount_SD
+ 6752              	.LVL632:
+2344:Src/main.c    **** 			if (test == 0) //0 - suc
+ 6753              		.loc 1 2344 9 discriminator 1 view .LVU2121
+ 6754 0252 2A4B     		ldr	r3, .L329+120
+ 6755 0254 1860     		str	r0, [r3]
+2345:Src/main.c    **** 			{
+ 6756              		.loc 1 2345 4 is_stmt 1 view .LVU2122
+2345:Src/main.c    **** 			{
+ 6757              		.loc 1 2345 7 is_stmt 0 view .LVU2123
+ 6758 0256 18B1     		cbz	r0, .L328
+ 6759              	.L324:
+2357:Src/main.c    **** 		}
+ 6760              		.loc 1 2357 4 is_stmt 1 view .LVU2124
+2357:Src/main.c    **** 		}
+ 6761              		.loc 1 2357 14 is_stmt 0 view .LVU2125
+ 6762 0258 294B     		ldr	r3, .L329+124
+ 6763 025a 0122     		movs	r2, #1
+ 6764 025c 1A70     		strb	r2, [r3]
+ 6765 025e E3E7     		b	.L323
+ 6766              	.L328:
+2348:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
+ 6767              		.loc 1 2348 5 is_stmt 1 view .LVU2126
+2348:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
+ 6768              		.loc 1 2348 12 is_stmt 0 view .LVU2127
+ 6769 0260 1E23     		movs	r3, #30
+ 6770 0262 1A46     		mov	r2, r3
+ 6771 0264 2749     		ldr	r1, .L329+128
+ 6772 0266 2848     		ldr	r0, .L329+132
+ 6773 0268 FFF7FEFF 		bl	Seek_Read_File
+ 6774              	.LVL633:
+2348:Src/main.c    **** 				test = Unmount_SD("/"); // 0 - succ
+ 6775              		.loc 1 2348 10 discriminator 1 view .LVU2128
+ 6776 026c 234C     		ldr	r4, .L329+120
+ 6777 026e 2060     		str	r0, [r4]
+2349:Src/main.c    **** 				UART_rec_incr = 0;
+ 6778              		.loc 1 2349 5 is_stmt 1 view .LVU2129
+2349:Src/main.c    **** 				UART_rec_incr = 0;
+ 6779              		.loc 1 2349 12 is_stmt 0 view .LVU2130
+ 6780 0270 2148     		ldr	r0, .L329+116
+ 6781 0272 FFF7FEFF 		bl	Unmount_SD
+ 6782              	.LVL634:
+2349:Src/main.c    **** 				UART_rec_incr = 0;
+ 6783              		.loc 1 2349 10 discriminator 1 view .LVU2131
+ 6784 0276 2060     		str	r0, [r4]
+2350:Src/main.c    **** 				flg_tmt = 0;//Reset the timeout flag
+ARM GAS  /tmp/ccEQxcUB.s 			page 503
+
+
+ 6785              		.loc 1 2350 5 is_stmt 1 view .LVU2132
+2350:Src/main.c    **** 				flg_tmt = 0;//Reset the timeout flag
+ 6786              		.loc 1 2350 19 is_stmt 0 view .LVU2133
+ 6787 0278 0023     		movs	r3, #0
+ 6788 027a 084A     		ldr	r2, .L329+24
+ 6789 027c 1380     		strh	r3, [r2]	@ movhi
+2351:Src/main.c    **** 			}
+ 6790              		.loc 1 2351 5 is_stmt 1 view .LVU2134
+2351:Src/main.c    **** 			}
+ 6791              		.loc 1 2351 13 is_stmt 0 view .LVU2135
+ 6792 027e 064A     		ldr	r2, .L329+20
+ 6793 0280 1370     		strb	r3, [r2]
+ 6794 0282 E9E7     		b	.L324
+ 6795              	.L330:
+ 6796              		.align	2
+ 6797              	.L329:
+ 6798 0284 00000000 		.word	TO6
+ 6799 0288 00000000 		.word	TO7
+ 6800 028c 00000000 		.word	TO7_before
+ 6801 0290 00000000 		.word	TO6_before
+ 6802 0294 00000000 		.word	TO6_uart
+ 6803 0298 00000000 		.word	flg_tmt
+ 6804 029c 00000000 		.word	UART_rec_incr
+ 6805 02a0 00000000 		.word	fgoto
+ 6806 02a4 00000000 		.word	sizeoffile
+ 6807 02a8 00000000 		.word	u_tx_flg
+ 6808 02ac 00000000 		.word	u_rx_flg
+ 6809 02b0 00000000 		.word	Long_Data
+ 6810 02b4 00000000 		.word	Def_setup
+ 6811 02b8 00000000 		.word	LD1_def_setup
+ 6812 02bc 00000000 		.word	LD2_def_setup
+ 6813 02c0 00000000 		.word	Curr_setup
+ 6814 02c4 00000000 		.word	LD1_curr_setup
+ 6815 02c8 00000000 		.word	LD2_curr_setup
+ 6816 02cc 00100040 		.word	1073745920
+ 6817 02d0 00100140 		.word	1073811456
+ 6818 02d4 00640240 		.word	1073898496
+ 6819 02d8 00000000 		.word	UART_DATA
+ 6820 02dc 28100140 		.word	1073811496
+ 6821 02e0 00000000 		.word	SD_SEEK
+ 6822 02e4 00000000 		.word	SD_SLIDE
+ 6823 02e8 00080240 		.word	1073874944
+ 6824 02ec 000C0240 		.word	1073875968
+ 6825 02f0 00000240 		.word	1073872896
+ 6826 02f4 00140240 		.word	1073878016
+ 6827 02f8 00000000 		.word	.LC0
+ 6828 02fc 00000000 		.word	test
+ 6829 0300 00000000 		.word	CPU_state
+ 6830 0304 00000000 		.word	COMMAND
+ 6831 0308 04000000 		.word	.LC1
+ 6832 030c 00040240 		.word	1073873920
+ 6833              		.cfi_endproc
+ 6834              	.LFE1208:
+ 6836              		.section	.text.DS1809_Pulse,"ax",%progbits
+ 6837              		.align	1
+ 6838              		.syntax unified
+ 6839              		.thumb
+ARM GAS  /tmp/ccEQxcUB.s 			page 504
+
+
+ 6840              		.thumb_func
+ 6842              	DS1809_Pulse:
+ 6843              	.LVL635:
+ 6844              	.LFB1216:
+2700:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
+ 6845              		.loc 1 2700 1 is_stmt 1 view -0
+ 6846              		.cfi_startproc
+ 6847              		@ args = 0, pretend = 0, frame = 0
+ 6848              		@ frame_needed = 0, uses_anonymous_args = 0
+2700:Src/main.c    **** 	for (uint16_t i = 0; i < count; i++)
+ 6849              		.loc 1 2700 1 is_stmt 0 view .LVU2137
+ 6850 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 6851              	.LCFI65:
+ 6852              		.cfi_def_cfa_offset 24
+ 6853              		.cfi_offset 4, -24
+ 6854              		.cfi_offset 5, -20
+ 6855              		.cfi_offset 6, -16
+ 6856              		.cfi_offset 7, -12
+ 6857              		.cfi_offset 8, -8
+ 6858              		.cfi_offset 14, -4
+ 6859 0004 0746     		mov	r7, r0
+ 6860 0006 0E46     		mov	r6, r1
+ 6861 0008 9046     		mov	r8, r2
+ 6862 000a 1D46     		mov	r5, r3
+2701:Src/main.c    **** 	{
+ 6863              		.loc 1 2701 2 is_stmt 1 view .LVU2138
+ 6864              	.LBB602:
+2701:Src/main.c    **** 	{
+ 6865              		.loc 1 2701 7 view .LVU2139
+ 6866              	.LVL636:
+2701:Src/main.c    **** 	{
+ 6867              		.loc 1 2701 16 is_stmt 0 view .LVU2140
+ 6868 000c 0024     		movs	r4, #0
+2701:Src/main.c    **** 	{
+ 6869              		.loc 1 2701 2 view .LVU2141
+ 6870 000e 16E0     		b	.L332
+ 6871              	.LVL637:
+ 6872              	.L340:
+2705:Src/main.c    **** 		}
+ 6873              		.loc 1 2705 4 is_stmt 1 view .LVU2142
+ 6874 0010 0022     		movs	r2, #0
+ 6875 0012 0421     		movs	r1, #4
+ 6876 0014 1448     		ldr	r0, .L343
+ 6877 0016 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6878              	.LVL638:
+ 6879 001a 14E0     		b	.L333
+ 6880              	.L341:
+2709:Src/main.c    **** 		}
+ 6881              		.loc 1 2709 4 view .LVU2143
+ 6882 001c 0022     		movs	r2, #0
+ 6883 001e 0821     		movs	r1, #8
+ 6884 0020 1148     		ldr	r0, .L343
+ 6885 0022 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6886              	.LVL639:
+ 6887 0026 10E0     		b	.L334
+ 6888              	.L342:
+2714:Src/main.c    **** 		}
+ARM GAS  /tmp/ccEQxcUB.s 			page 505
+
+
+ 6889              		.loc 1 2714 4 view .LVU2144
+ 6890 0028 0122     		movs	r2, #1
+ 6891 002a 0421     		movs	r1, #4
+ 6892 002c 0E48     		ldr	r0, .L343
+ 6893 002e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6894              	.LVL640:
+ 6895 0032 0FE0     		b	.L335
+ 6896              	.L336:
+2720:Src/main.c    **** 	}
+ 6897              		.loc 1 2720 3 view .LVU2145
+ 6898 0034 2846     		mov	r0, r5
+ 6899 0036 FFF7FEFF 		bl	HAL_Delay
+ 6900              	.LVL641:
+2701:Src/main.c    **** 	{
+ 6901              		.loc 1 2701 35 discriminator 2 view .LVU2146
+ 6902 003a 0134     		adds	r4, r4, #1
+ 6903              	.LVL642:
+2701:Src/main.c    **** 	{
+ 6904              		.loc 1 2701 35 is_stmt 0 discriminator 2 view .LVU2147
+ 6905 003c A4B2     		uxth	r4, r4
+ 6906              	.LVL643:
+ 6907              	.L332:
+2701:Src/main.c    **** 	{
+ 6908              		.loc 1 2701 25 is_stmt 1 discriminator 1 view .LVU2148
+ 6909 003e 4445     		cmp	r4, r8
+ 6910 0040 10D2     		bcs	.L339
+2703:Src/main.c    **** 		{
+ 6911              		.loc 1 2703 3 view .LVU2149
+2703:Src/main.c    **** 		{
+ 6912              		.loc 1 2703 6 is_stmt 0 view .LVU2150
+ 6913 0042 002F     		cmp	r7, #0
+ 6914 0044 E4D1     		bne	.L340
+ 6915              	.L333:
+2707:Src/main.c    **** 		{
+ 6916              		.loc 1 2707 3 is_stmt 1 view .LVU2151
+2707:Src/main.c    **** 		{
+ 6917              		.loc 1 2707 6 is_stmt 0 view .LVU2152
+ 6918 0046 002E     		cmp	r6, #0
+ 6919 0048 E8D1     		bne	.L341
+ 6920              	.L334:
+2711:Src/main.c    **** 		if (uc)
+ 6921              		.loc 1 2711 3 is_stmt 1 view .LVU2153
+ 6922 004a 2846     		mov	r0, r5
+ 6923 004c FFF7FEFF 		bl	HAL_Delay
+ 6924              	.LVL644:
+2712:Src/main.c    **** 		{
+ 6925              		.loc 1 2712 3 view .LVU2154
+2712:Src/main.c    **** 		{
+ 6926              		.loc 1 2712 6 is_stmt 0 view .LVU2155
+ 6927 0050 002F     		cmp	r7, #0
+ 6928 0052 E9D1     		bne	.L342
+ 6929              	.L335:
+2716:Src/main.c    **** 		{
+ 6930              		.loc 1 2716 3 is_stmt 1 view .LVU2156
+2716:Src/main.c    **** 		{
+ 6931              		.loc 1 2716 6 is_stmt 0 view .LVU2157
+ 6932 0054 002E     		cmp	r6, #0
+ARM GAS  /tmp/ccEQxcUB.s 			page 506
+
+
+ 6933 0056 EDD0     		beq	.L336
+2718:Src/main.c    **** 		}
+ 6934              		.loc 1 2718 4 is_stmt 1 view .LVU2158
+ 6935 0058 0122     		movs	r2, #1
+ 6936 005a 0821     		movs	r1, #8
+ 6937 005c 0248     		ldr	r0, .L343
+ 6938 005e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 6939              	.LVL645:
+ 6940 0062 E7E7     		b	.L336
+ 6941              	.L339:
+2718:Src/main.c    **** 		}
+ 6942              		.loc 1 2718 4 is_stmt 0 view .LVU2159
+ 6943              	.LBE602:
+2722:Src/main.c    **** 
+ 6944              		.loc 1 2722 1 view .LVU2160
+ 6945 0064 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 6946              	.LVL646:
+ 6947              	.L344:
+2722:Src/main.c    **** 
+ 6948              		.loc 1 2722 1 view .LVU2161
+ 6949              		.align	2
+ 6950              	.L343:
+ 6951 0068 00100240 		.word	1073876992
+ 6952              		.cfi_endproc
+ 6953              	.LFE1216:
+ 6955              		.section	.text.Get_ADC,"ax",%progbits
+ 6956              		.align	1
+ 6957              		.syntax unified
+ 6958              		.thumb
+ 6959              		.thumb_func
+ 6961              	Get_ADC:
+ 6962              	.LVL647:
+ 6963              	.LFB1227:
+3362:Src/main.c    **** 	uint16_t OUT;
+ 6964              		.loc 1 3362 1 is_stmt 1 view -0
+ 6965              		.cfi_startproc
+ 6966              		@ args = 0, pretend = 0, frame = 0
+ 6967              		@ frame_needed = 0, uses_anonymous_args = 0
+3362:Src/main.c    **** 	uint16_t OUT;
+ 6968              		.loc 1 3362 1 is_stmt 0 view .LVU2163
+ 6969 0000 10B5     		push	{r4, lr}
+ 6970              	.LCFI66:
+ 6971              		.cfi_def_cfa_offset 8
+ 6972              		.cfi_offset 4, -8
+ 6973              		.cfi_offset 14, -4
+ 6974 0002 0024     		movs	r4, #0
+3363:Src/main.c    **** 	switch (num)
+ 6975              		.loc 1 3363 2 is_stmt 1 view .LVU2164
+3364:Src/main.c    **** 		{
+ 6976              		.loc 1 3364 2 view .LVU2165
+ 6977 0004 0528     		cmp	r0, #5
+ 6978 0006 2CD8     		bhi	.L354
+ 6979 0008 DFE800F0 		tbb	[pc, r0]
+ 6980              	.L348:
+ 6981 000c 03       		.byte	(.L353-.L348)/2
+ 6982 000d 08       		.byte	(.L352-.L348)/2
+ 6983 000e 12       		.byte	(.L351-.L348)/2
+ARM GAS  /tmp/ccEQxcUB.s 			page 507
+
+
+ 6984 000f 17       		.byte	(.L350-.L348)/2
+ 6985 0010 1C       		.byte	(.L349-.L348)/2
+ 6986 0011 26       		.byte	(.L347-.L348)/2
+ 6987              		.p2align 1
+ 6988              	.L353:
+3367:Src/main.c    **** 			break;
+ 6989              		.loc 1 3367 5 view .LVU2166
+ 6990 0012 1548     		ldr	r0, .L356
+ 6991              	.LVL648:
+3367:Src/main.c    **** 			break;
+ 6992              		.loc 1 3367 5 is_stmt 0 view .LVU2167
+ 6993 0014 FFF7FEFF 		bl	HAL_ADC_Start
+ 6994              	.LVL649:
+3368:Src/main.c    **** 			case 1:
+ 6995              		.loc 1 3368 4 is_stmt 1 view .LVU2168
+ 6996 0018 2046     		mov	r0, r4
+ 6997              	.L346:
+ 6998              	.LVL650:
+3387:Src/main.c    **** }
+ 6999              		.loc 1 3387 2 view .LVU2169
+3388:Src/main.c    **** 
+ 7000              		.loc 1 3388 1 is_stmt 0 view .LVU2170
+ 7001 001a 10BD     		pop	{r4, pc}
+ 7002              	.LVL651:
+ 7003              	.L352:
+3370:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
+ 7004              		.loc 1 3370 5 is_stmt 1 view .LVU2171
+ 7005 001c 124C     		ldr	r4, .L356
+ 7006 001e 6421     		movs	r1, #100
+ 7007 0020 2046     		mov	r0, r4
+ 7008              	.LVL652:
+3370:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
+ 7009              		.loc 1 3370 5 is_stmt 0 view .LVU2172
+ 7010 0022 FFF7FEFF 		bl	HAL_ADC_PollForConversion
+ 7011              	.LVL653:
+3371:Src/main.c    **** 			break;
+ 7012              		.loc 1 3371 9 is_stmt 1 view .LVU2173
+3371:Src/main.c    **** 			break;
+ 7013              		.loc 1 3371 15 is_stmt 0 view .LVU2174
+ 7014 0026 2046     		mov	r0, r4
+ 7015 0028 FFF7FEFF 		bl	HAL_ADC_GetValue
+ 7016              	.LVL654:
+3371:Src/main.c    **** 			break;
+ 7017              		.loc 1 3371 13 discriminator 1 view .LVU2175
+ 7018 002c 80B2     		uxth	r0, r0
+ 7019              	.LVL655:
+3372:Src/main.c    **** 			case 2:
+ 7020              		.loc 1 3372 4 is_stmt 1 view .LVU2176
+ 7021 002e F4E7     		b	.L346
+ 7022              	.LVL656:
+ 7023              	.L351:
+3374:Src/main.c    **** 			break;
+ 7024              		.loc 1 3374 5 view .LVU2177
+ 7025 0030 0D48     		ldr	r0, .L356
+ 7026              	.LVL657:
+3374:Src/main.c    **** 			break;
+ 7027              		.loc 1 3374 5 is_stmt 0 view .LVU2178
+ARM GAS  /tmp/ccEQxcUB.s 			page 508
+
+
+ 7028 0032 FFF7FEFF 		bl	HAL_ADC_Stop
+ 7029              	.LVL658:
+3375:Src/main.c    **** 			case 3:
+ 7030              		.loc 1 3375 4 is_stmt 1 view .LVU2179
+ 7031 0036 2046     		mov	r0, r4
+ 7032 0038 EFE7     		b	.L346
+ 7033              	.LVL659:
+ 7034              	.L350:
+3377:Src/main.c    **** 			break;
+ 7035              		.loc 1 3377 5 view .LVU2180
+ 7036 003a 0C48     		ldr	r0, .L356+4
+ 7037              	.LVL660:
+3377:Src/main.c    **** 			break;
+ 7038              		.loc 1 3377 5 is_stmt 0 view .LVU2181
+ 7039 003c FFF7FEFF 		bl	HAL_ADC_Start
+ 7040              	.LVL661:
+3378:Src/main.c    **** 			case 4:
+ 7041              		.loc 1 3378 4 is_stmt 1 view .LVU2182
+ 7042 0040 2046     		mov	r0, r4
+ 7043 0042 EAE7     		b	.L346
+ 7044              	.LVL662:
+ 7045              	.L349:
+3380:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
+ 7046              		.loc 1 3380 5 view .LVU2183
+ 7047 0044 094C     		ldr	r4, .L356+4
+ 7048 0046 6421     		movs	r1, #100
+ 7049 0048 2046     		mov	r0, r4
+ 7050              	.LVL663:
+3380:Src/main.c    ****         OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
+ 7051              		.loc 1 3380 5 is_stmt 0 view .LVU2184
+ 7052 004a FFF7FEFF 		bl	HAL_ADC_PollForConversion
+ 7053              	.LVL664:
+3381:Src/main.c    **** 			break;
+ 7054              		.loc 1 3381 9 is_stmt 1 view .LVU2185
+3381:Src/main.c    **** 			break;
+ 7055              		.loc 1 3381 15 is_stmt 0 view .LVU2186
+ 7056 004e 2046     		mov	r0, r4
+ 7057 0050 FFF7FEFF 		bl	HAL_ADC_GetValue
+ 7058              	.LVL665:
+3381:Src/main.c    **** 			break;
+ 7059              		.loc 1 3381 13 discriminator 1 view .LVU2187
+ 7060 0054 80B2     		uxth	r0, r0
+ 7061              	.LVL666:
+3382:Src/main.c    **** 			case 5:
+ 7062              		.loc 1 3382 4 is_stmt 1 view .LVU2188
+ 7063 0056 E0E7     		b	.L346
+ 7064              	.LVL667:
+ 7065              	.L347:
+3384:Src/main.c    **** 			break;
+ 7066              		.loc 1 3384 9 view .LVU2189
+ 7067 0058 0448     		ldr	r0, .L356+4
+ 7068              	.LVL668:
+3384:Src/main.c    **** 			break;
+ 7069              		.loc 1 3384 9 is_stmt 0 view .LVU2190
+ 7070 005a FFF7FEFF 		bl	HAL_ADC_Stop
+ 7071              	.LVL669:
+3385:Src/main.c    **** 		}
+ARM GAS  /tmp/ccEQxcUB.s 			page 509
+
+
+ 7072              		.loc 1 3385 4 is_stmt 1 view .LVU2191
+ 7073 005e 2046     		mov	r0, r4
+ 7074 0060 DBE7     		b	.L346
+ 7075              	.LVL670:
+ 7076              	.L354:
+3364:Src/main.c    **** 		{
+ 7077              		.loc 1 3364 2 is_stmt 0 view .LVU2192
+ 7078 0062 2046     		mov	r0, r4
+ 7079              	.LVL671:
+3364:Src/main.c    **** 		{
+ 7080              		.loc 1 3364 2 view .LVU2193
+ 7081 0064 D9E7     		b	.L346
+ 7082              	.L357:
+ 7083 0066 00BF     		.align	2
+ 7084              	.L356:
+ 7085 0068 00000000 		.word	hadc1
+ 7086 006c 00000000 		.word	hadc3
+ 7087              		.cfi_endproc
+ 7088              	.LFE1227:
+ 7090              		.section	.text.Set_LTEC,"ax",%progbits
+ 7091              		.align	1
+ 7092              		.global	Set_LTEC
+ 7093              		.syntax unified
+ 7094              		.thumb
+ 7095              		.thumb_func
+ 7097              	Set_LTEC:
+ 7098              	.LVL672:
+ 7099              	.LFB1225:
+3184:Src/main.c    **** 	uint32_t tmp32;
+ 7100              		.loc 1 3184 1 is_stmt 1 view -0
+ 7101              		.cfi_startproc
+ 7102              		@ args = 0, pretend = 0, frame = 0
+ 7103              		@ frame_needed = 0, uses_anonymous_args = 0
+3184:Src/main.c    **** 	uint32_t tmp32;
+ 7104              		.loc 1 3184 1 is_stmt 0 view .LVU2195
+ 7105 0000 38B5     		push	{r3, r4, r5, lr}
+ 7106              	.LCFI67:
+ 7107              		.cfi_def_cfa_offset 16
+ 7108              		.cfi_offset 3, -16
+ 7109              		.cfi_offset 4, -12
+ 7110              		.cfi_offset 5, -8
+ 7111              		.cfi_offset 14, -4
+ 7112 0002 0446     		mov	r4, r0
+ 7113 0004 0D46     		mov	r5, r1
+3185:Src/main.c    **** 
+ 7114              		.loc 1 3185 2 is_stmt 1 view .LVU2196
+3187:Src/main.c    **** 	{
+ 7115              		.loc 1 3187 2 view .LVU2197
+3187:Src/main.c    **** 	{
+ 7116              		.loc 1 3187 5 is_stmt 0 view .LVU2198
+ 7117 0006 0328     		cmp	r0, #3
+ 7118 0008 18BF     		it	ne
+ 7119 000a 0128     		cmpne	r0, #1
+ 7120 000c 06D0     		beq	.L392
+ 7121              	.LVL673:
+ 7122              	.L359:
+3193:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 510
+
+
+ 7123              		.loc 1 3193 2 is_stmt 1 view .LVU2199
+ 7124 000e 013C     		subs	r4, r4, #1
+ 7125              	.LVL674:
+3193:Src/main.c    **** 	{
+ 7126              		.loc 1 3193 2 is_stmt 0 view .LVU2200
+ 7127 0010 032C     		cmp	r4, #3
+ 7128 0012 2ED8     		bhi	.L360
+ 7129 0014 DFE804F0 		tbb	[pc, r4]
+ 7130              	.L362:
+ 7131 0018 0D       		.byte	(.L365-.L362)/2
+ 7132 0019 45       		.byte	(.L364-.L362)/2
+ 7133 001a 65       		.byte	(.L363-.L362)/2
+ 7134 001b 86       		.byte	(.L361-.L362)/2
+ 7135              	.LVL675:
+ 7136              		.p2align 1
+ 7137              	.L392:
+3189:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ 7138              		.loc 1 3189 3 is_stmt 1 view .LVU2201
+ 7139 001c 0121     		movs	r1, #1
+ 7140              	.LVL676:
+3189:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ 7141              		.loc 1 3189 3 is_stmt 0 view .LVU2202
+ 7142 001e 0220     		movs	r0, #2
+ 7143              	.LVL677:
+3189:Src/main.c    **** 		HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ 7144              		.loc 1 3189 3 view .LVU2203
+ 7145 0020 FFF7FEFF 		bl	SPI2_SetMode
+ 7146              	.LVL678:
+3190:Src/main.c    **** 	}
+ 7147              		.loc 1 3190 3 is_stmt 1 view .LVU2204
+ 7148 0024 0122     		movs	r2, #1
+ 7149 0026 4FF48051 		mov	r1, #4096
+ 7150 002a 4E48     		ldr	r0, .L393
+ 7151 002c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7152              	.LVL679:
+ 7153 0030 EDE7     		b	.L359
+ 7154              	.LVL680:
+ 7155              	.L365:
+3196:Src/main.c    **** 			//tmp32=0;
+ 7156              		.loc 1 3196 4 view .LVU2205
+ 7157 0032 0022     		movs	r2, #0
+ 7158 0034 4FF48041 		mov	r1, #16384
+ 7159 0038 4A48     		ldr	r0, .L393
+ 7160 003a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7161              	.LVL681:
+3199:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7162              		.loc 1 3199 4 view .LVU2206
+3200:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7163              		.loc 1 3200 4 view .LVU2207
+3199:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7164              		.loc 1 3199 10 is_stmt 0 view .LVU2208
+ 7165 003e 0022     		movs	r2, #0
+ 7166              	.LVL682:
+ 7167              	.L366:
+3200:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7168              		.loc 1 3200 42 is_stmt 1 discriminator 1 view .LVU2209
+ 7169              	.LBB603:
+ARM GAS  /tmp/ccEQxcUB.s 			page 511
+
+
+ 7170              	.LBI603:
  916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6675              		.loc 4 916 26 view .LVU2087
- 6676              	.LBB573:
+ 7171              		.loc 4 916 26 view .LVU2210
+ 7172              	.LBB604:
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6677              		.loc 4 918 3 view .LVU2088
+ 7173              		.loc 4 918 3 view .LVU2211
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6678              		.loc 4 918 12 is_stmt 0 view .LVU2089
- 6679 009a 314B     		ldr	r3, .L356+12
- 6680 009c 9B68     		ldr	r3, [r3, #8]
+ 7174              		.loc 4 918 12 is_stmt 0 view .LVU2212
+ 7175 0040 494B     		ldr	r3, .L393+4
+ 7176 0042 9B68     		ldr	r3, [r3, #8]
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6681              		.loc 4 918 66 view .LVU2090
- 6682 009e 13F0020F 		tst	r3, #2
- 6683 00a2 04D1     		bne	.L334
- 6684              	.LVL621:
+ 7177              		.loc 4 918 66 view .LVU2213
+ 7178 0044 13F0020F 		tst	r3, #2
+ 7179 0048 04D1     		bne	.L367
+ 7180              	.LVL683:
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6685              		.loc 4 918 66 view .LVU2091
- 6686              	.LBE573:
- 6687              	.LBE572:
-2914:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6688              		.loc 1 2914 42 discriminator 2 view .LVU2092
- 6689 00a4 B2F5FA7F 		cmp	r2, #500
- 6690 00a8 01D8     		bhi	.L334
-2914:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6691              		.loc 1 2914 59 is_stmt 1 discriminator 3 view .LVU2093
-2914:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6692              		.loc 1 2914 64 is_stmt 0 discriminator 3 view .LVU2094
- 6693 00aa 0132     		adds	r2, r2, #1
- 6694              	.LVL622:
-2914:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6695              		.loc 1 2914 64 discriminator 3 view .LVU2095
- 6696 00ac F5E7     		b	.L333
- 6697              	.L334:
-2915:Src/main.c    **** 			tmp32 = 0;
- 6698              		.loc 1 2915 4 is_stmt 1 view .LVU2096
- 6699              	.LVL623:
- 6700              	.LBB574:
- 6701              	.LBI574:
+ 7181              		.loc 4 918 66 view .LVU2214
+ 7182              	.LBE604:
+ 7183              	.LBE603:
+3200:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7184              		.loc 1 3200 42 discriminator 2 view .LVU2215
+ 7185 004a B2F5FA7F 		cmp	r2, #500
+ 7186 004e 01D8     		bhi	.L367
+3200:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7187              		.loc 1 3200 59 is_stmt 1 discriminator 3 view .LVU2216
+3200:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7188              		.loc 1 3200 64 is_stmt 0 discriminator 3 view .LVU2217
+ 7189 0050 0132     		adds	r2, r2, #1
+ 7190              	.LVL684:
+3200:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7191              		.loc 1 3200 64 discriminator 3 view .LVU2218
+ 7192 0052 F5E7     		b	.L366
+ 7193              	.L367:
+3201:Src/main.c    **** 			tmp32 = 0;
+ 7194              		.loc 1 3201 4 is_stmt 1 view .LVU2219
+ 7195              	.LVL685:
+ 7196              	.LBB605:
+ 7197              	.LBI605:
 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6702              		.loc 4 1373 22 view .LVU2097
- 6703              	.LBB575:
+ 7198              		.loc 4 1373 22 view .LVU2220
+ 7199              	.LBB606:
 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
-ARM GAS  /tmp/ccwR4KB7.s 			page 496
+ 7200              		.loc 4 1376 3 view .LVU2221
+ 7201              		.loc 4 1377 3 view .LVU2222
+ 7202              		.loc 4 1377 10 is_stmt 0 view .LVU2223
+ 7203 0054 444B     		ldr	r3, .L393+4
+ 7204 0056 9D81     		strh	r5, [r3, #12]	@ movhi
+ 7205              	.LVL686:
+ 7206              		.loc 4 1377 10 view .LVU2224
+ 7207              	.LBE606:
+ 7208              	.LBE605:
+3202:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7209              		.loc 1 3202 4 is_stmt 1 view .LVU2225
+3203:Src/main.c    **** 			(void) SPI2->DR;
+ 7210              		.loc 1 3203 4 view .LVU2226
+3202:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7211              		.loc 1 3202 10 is_stmt 0 view .LVU2227
+ARM GAS  /tmp/ccEQxcUB.s 			page 512
 
 
- 6704              		.loc 4 1376 3 view .LVU2098
- 6705              		.loc 4 1377 3 view .LVU2099
- 6706              		.loc 4 1377 10 is_stmt 0 view .LVU2100
- 6707 00ae 2C4B     		ldr	r3, .L356+12
- 6708 00b0 9C81     		strh	r4, [r3, #12]	@ movhi
- 6709              	.LVL624:
- 6710              		.loc 4 1377 10 view .LVU2101
- 6711              	.LBE575:
- 6712              	.LBE574:
-2916:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6713              		.loc 1 2916 4 is_stmt 1 view .LVU2102
-2917:Src/main.c    **** 			(void) SPI6->DR;
- 6714              		.loc 1 2917 4 view .LVU2103
-2916:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6715              		.loc 1 2916 10 is_stmt 0 view .LVU2104
- 6716 00b2 0022     		movs	r2, #0
- 6717              	.LVL625:
- 6718              	.L336:
-2917:Src/main.c    **** 			(void) SPI6->DR;
- 6719              		.loc 1 2917 43 is_stmt 1 discriminator 1 view .LVU2105
- 6720              	.LBB576:
- 6721              	.LBI576:
+ 7212 0058 0022     		movs	r2, #0
+ 7213              	.LVL687:
+ 7214              	.L369:
+3203:Src/main.c    **** 			(void) SPI2->DR;
+ 7215              		.loc 1 3203 43 is_stmt 1 discriminator 1 view .LVU2228
+ 7216              	.LBB607:
+ 7217              	.LBI607:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6722              		.loc 4 905 26 view .LVU2106
- 6723              	.LBB577:
+ 7218              		.loc 4 905 26 view .LVU2229
+ 7219              	.LBB608:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6724              		.loc 4 907 3 view .LVU2107
+ 7220              		.loc 4 907 3 view .LVU2230
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6725              		.loc 4 907 12 is_stmt 0 view .LVU2108
- 6726 00b4 2A4B     		ldr	r3, .L356+12
- 6727 00b6 9B68     		ldr	r3, [r3, #8]
+ 7221              		.loc 4 907 12 is_stmt 0 view .LVU2231
+ 7222 005a 434B     		ldr	r3, .L393+4
+ 7223 005c 9B68     		ldr	r3, [r3, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6728              		.loc 4 907 68 view .LVU2109
- 6729 00b8 13F0010F 		tst	r3, #1
- 6730 00bc 04D1     		bne	.L337
- 6731              	.LVL626:
+ 7224              		.loc 4 907 68 view .LVU2232
+ 7225 005e 13F0010F 		tst	r3, #1
+ 7226 0062 04D1     		bne	.L370
+ 7227              	.LVL688:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6732              		.loc 4 907 68 view .LVU2110
- 6733              	.LBE577:
- 6734              	.LBE576:
-2917:Src/main.c    **** 			(void) SPI6->DR;
- 6735              		.loc 1 2917 43 discriminator 2 view .LVU2111
- 6736 00be B2F5FA7F 		cmp	r2, #500
- 6737 00c2 01D8     		bhi	.L337
-2917:Src/main.c    **** 			(void) SPI6->DR;
- 6738              		.loc 1 2917 60 is_stmt 1 discriminator 3 view .LVU2112
-2917:Src/main.c    **** 			(void) SPI6->DR;
- 6739              		.loc 1 2917 65 is_stmt 0 discriminator 3 view .LVU2113
- 6740 00c4 0132     		adds	r2, r2, #1
- 6741              	.LVL627:
-2917:Src/main.c    **** 			(void) SPI6->DR;
- 6742              		.loc 1 2917 65 discriminator 3 view .LVU2114
- 6743 00c6 F5E7     		b	.L336
- 6744              	.L337:
-2918:Src/main.c    **** 		break;
- 6745              		.loc 1 2918 4 is_stmt 1 view .LVU2115
- 6746 00c8 254B     		ldr	r3, .L356+12
-ARM GAS  /tmp/ccwR4KB7.s 			page 497
+ 7228              		.loc 4 907 68 view .LVU2233
+ 7229              	.LBE608:
+ 7230              	.LBE607:
+3203:Src/main.c    **** 			(void) SPI2->DR;
+ 7231              		.loc 1 3203 43 discriminator 2 view .LVU2234
+ 7232 0064 B2F5FA7F 		cmp	r2, #500
+ 7233 0068 01D8     		bhi	.L370
+3203:Src/main.c    **** 			(void) SPI2->DR;
+ 7234              		.loc 1 3203 60 is_stmt 1 discriminator 3 view .LVU2235
+3203:Src/main.c    **** 			(void) SPI2->DR;
+ 7235              		.loc 1 3203 65 is_stmt 0 discriminator 3 view .LVU2236
+ 7236 006a 0132     		adds	r2, r2, #1
+ 7237              	.LVL689:
+3203:Src/main.c    **** 			(void) SPI2->DR;
+ 7238              		.loc 1 3203 65 discriminator 3 view .LVU2237
+ 7239 006c F5E7     		b	.L369
+ 7240              	.L370:
+3204:Src/main.c    **** 		break;
+ 7241              		.loc 1 3204 4 is_stmt 1 view .LVU2238
+ 7242 006e 3E4B     		ldr	r3, .L393+4
+ 7243 0070 DB68     		ldr	r3, [r3, #12]
+3205:Src/main.c    **** 		case 2:
+ 7244              		.loc 1 3205 3 view .LVU2239
+ 7245              	.LVL690:
+ 7246              	.L360:
+3241:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
+ 7247              		.loc 1 3241 2 view .LVU2240
+ 7248 0072 0122     		movs	r2, #1
+ 7249 0074 4FF48041 		mov	r1, #16384
+ 7250 0078 3A48     		ldr	r0, .L393
+ 7251 007a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7252              	.LVL691:
+3242:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
+ 7253              		.loc 1 3242 2 view .LVU2241
+ 7254 007e 3B4C     		ldr	r4, .L393+8
+ARM GAS  /tmp/ccEQxcUB.s 			page 513
 
 
- 6747 00ca DB68     		ldr	r3, [r3, #12]
-2919:Src/main.c    **** 		case 3:
- 6748              		.loc 1 2919 3 view .LVU2116
- 6749 00cc C6E7     		b	.L321
- 6750              	.LVL628:
- 6751              	.L324:
-2921:Src/main.c    **** 			//tmp32=0;
- 6752              		.loc 1 2921 4 view .LVU2117
- 6753 00ce 0022     		movs	r2, #0
- 6754 00d0 4FF48051 		mov	r1, #4096
- 6755              	.LVL629:
-2921:Src/main.c    **** 			//tmp32=0;
- 6756              		.loc 1 2921 4 is_stmt 0 view .LVU2118
- 6757 00d4 1F48     		ldr	r0, .L356
- 6758 00d6 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6759              	.LVL630:
-2924:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6760              		.loc 1 2924 4 is_stmt 1 view .LVU2119
-2925:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6761              		.loc 1 2925 4 view .LVU2120
-2924:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6762              		.loc 1 2924 10 is_stmt 0 view .LVU2121
- 6763 00da 0022     		movs	r2, #0
- 6764              	.LVL631:
- 6765              	.L339:
-2925:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6766              		.loc 1 2925 42 is_stmt 1 discriminator 1 view .LVU2122
- 6767              	.LBB578:
- 6768              	.LBI578:
+ 7255              	.LVL692:
+3242:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
+ 7256              		.loc 1 3242 2 is_stmt 0 view .LVU2242
+ 7257 0080 0122     		movs	r2, #1
+ 7258 0082 4021     		movs	r1, #64
+ 7259 0084 2046     		mov	r0, r4
+ 7260 0086 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7261              	.LVL693:
+3243:Src/main.c    **** 	HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
+ 7262              		.loc 1 3243 2 is_stmt 1 view .LVU2243
+ 7263 008a 0122     		movs	r2, #1
+ 7264 008c 4FF48051 		mov	r1, #4096
+ 7265 0090 3748     		ldr	r0, .L393+12
+ 7266 0092 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7267              	.LVL694:
+3244:Src/main.c    **** }
+ 7268              		.loc 1 3244 2 view .LVU2244
+ 7269 0096 0122     		movs	r2, #1
+ 7270 0098 1021     		movs	r1, #16
+ 7271 009a 2046     		mov	r0, r4
+ 7272 009c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7273              	.LVL695:
+3245:Src/main.c    **** static uint16_t MPhD_T(uint8_t num)
+ 7274              		.loc 1 3245 1 is_stmt 0 view .LVU2245
+ 7275 00a0 38BD     		pop	{r3, r4, r5, pc}
+ 7276              	.LVL696:
+ 7277              	.L364:
+3208:Src/main.c    **** 			//tmp32=0;
+ 7278              		.loc 1 3208 4 is_stmt 1 view .LVU2246
+ 7279 00a2 0022     		movs	r2, #0
+ 7280 00a4 4021     		movs	r1, #64
+ 7281 00a6 3148     		ldr	r0, .L393+8
+ 7282 00a8 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7283              	.LVL697:
+3211:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7284              		.loc 1 3211 4 view .LVU2247
+3212:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7285              		.loc 1 3212 4 view .LVU2248
+3211:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7286              		.loc 1 3211 10 is_stmt 0 view .LVU2249
+ 7287 00ac 0022     		movs	r2, #0
+ 7288              	.LVL698:
+ 7289              	.L372:
+3212:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7290              		.loc 1 3212 42 is_stmt 1 discriminator 1 view .LVU2250
+ 7291              	.LBB609:
+ 7292              	.LBI609:
  916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6769              		.loc 4 916 26 view .LVU2123
- 6770              	.LBB579:
+ 7293              		.loc 4 916 26 view .LVU2251
+ 7294              	.LBB610:
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6771              		.loc 4 918 3 view .LVU2124
+ 7295              		.loc 4 918 3 view .LVU2252
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6772              		.loc 4 918 12 is_stmt 0 view .LVU2125
- 6773 00dc 1E4B     		ldr	r3, .L356+4
- 6774 00de 9B68     		ldr	r3, [r3, #8]
+ 7296              		.loc 4 918 12 is_stmt 0 view .LVU2253
+ 7297 00ae 314B     		ldr	r3, .L393+16
+ 7298 00b0 9B68     		ldr	r3, [r3, #8]
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6775              		.loc 4 918 66 view .LVU2126
- 6776 00e0 13F0020F 		tst	r3, #2
- 6777 00e4 04D1     		bne	.L340
- 6778              	.LVL632:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6779              		.loc 4 918 66 view .LVU2127
- 6780              	.LBE579:
- 6781              	.LBE578:
-2925:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6782              		.loc 1 2925 42 discriminator 2 view .LVU2128
- 6783 00e6 B2F5FA7F 		cmp	r2, #500
- 6784 00ea 01D8     		bhi	.L340
-2925:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6785              		.loc 1 2925 59 is_stmt 1 discriminator 3 view .LVU2129
-2925:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6786              		.loc 1 2925 64 is_stmt 0 discriminator 3 view .LVU2130
- 6787 00ec 0132     		adds	r2, r2, #1
- 6788              	.LVL633:
-ARM GAS  /tmp/ccwR4KB7.s 			page 498
+ARM GAS  /tmp/ccEQxcUB.s 			page 514
 
 
-2925:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 6789              		.loc 1 2925 64 discriminator 3 view .LVU2131
- 6790 00ee F5E7     		b	.L339
- 6791              	.L340:
-2926:Src/main.c    **** 			tmp32 = 0;
- 6792              		.loc 1 2926 4 is_stmt 1 view .LVU2132
- 6793              	.LVL634:
- 6794              	.LBB580:
- 6795              	.LBI580:
+ 7299              		.loc 4 918 66 view .LVU2254
+ 7300 00b2 13F0020F 		tst	r3, #2
+ 7301 00b6 04D1     		bne	.L373
+ 7302              	.LVL699:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7303              		.loc 4 918 66 view .LVU2255
+ 7304              	.LBE610:
+ 7305              	.LBE609:
+3212:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7306              		.loc 1 3212 42 discriminator 2 view .LVU2256
+ 7307 00b8 B2F5FA7F 		cmp	r2, #500
+ 7308 00bc 01D8     		bhi	.L373
+3212:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7309              		.loc 1 3212 59 is_stmt 1 discriminator 3 view .LVU2257
+3212:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7310              		.loc 1 3212 64 is_stmt 0 discriminator 3 view .LVU2258
+ 7311 00be 0132     		adds	r2, r2, #1
+ 7312              	.LVL700:
+3212:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7313              		.loc 1 3212 64 discriminator 3 view .LVU2259
+ 7314 00c0 F5E7     		b	.L372
+ 7315              	.L373:
+3213:Src/main.c    **** 			tmp32 = 0;
+ 7316              		.loc 1 3213 4 is_stmt 1 view .LVU2260
+ 7317              	.LVL701:
+ 7318              	.LBB611:
+ 7319              	.LBI611:
 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6796              		.loc 4 1373 22 view .LVU2133
- 6797              	.LBB581:
+ 7320              		.loc 4 1373 22 view .LVU2261
+ 7321              	.LBB612:
 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
- 6798              		.loc 4 1376 3 view .LVU2134
- 6799              		.loc 4 1377 3 view .LVU2135
- 6800              		.loc 4 1377 10 is_stmt 0 view .LVU2136
- 6801 00f0 194B     		ldr	r3, .L356+4
- 6802 00f2 9C81     		strh	r4, [r3, #12]	@ movhi
- 6803              	.LVL635:
- 6804              		.loc 4 1377 10 view .LVU2137
- 6805              	.LBE581:
- 6806              	.LBE580:
-2927:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6807              		.loc 1 2927 4 is_stmt 1 view .LVU2138
-2928:Src/main.c    **** 			(void) SPI2->DR;
- 6808              		.loc 1 2928 4 view .LVU2139
-2927:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6809              		.loc 1 2927 10 is_stmt 0 view .LVU2140
- 6810 00f4 0022     		movs	r2, #0
- 6811              	.LVL636:
- 6812              	.L342:
-2928:Src/main.c    **** 			(void) SPI2->DR;
- 6813              		.loc 1 2928 43 is_stmt 1 discriminator 1 view .LVU2141
- 6814              	.LBB582:
- 6815              	.LBI582:
+ 7322              		.loc 4 1376 3 view .LVU2262
+ 7323              		.loc 4 1377 3 view .LVU2263
+ 7324              		.loc 4 1377 10 is_stmt 0 view .LVU2264
+ 7325 00c2 2C4B     		ldr	r3, .L393+16
+ 7326 00c4 9D81     		strh	r5, [r3, #12]	@ movhi
+ 7327              	.LVL702:
+ 7328              		.loc 4 1377 10 view .LVU2265
+ 7329              	.LBE612:
+ 7330              	.LBE611:
+3214:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7331              		.loc 1 3214 4 is_stmt 1 view .LVU2266
+3215:Src/main.c    **** 			(void) SPI6->DR;
+ 7332              		.loc 1 3215 4 view .LVU2267
+3214:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7333              		.loc 1 3214 10 is_stmt 0 view .LVU2268
+ 7334 00c6 0022     		movs	r2, #0
+ 7335              	.LVL703:
+ 7336              	.L375:
+3215:Src/main.c    **** 			(void) SPI6->DR;
+ 7337              		.loc 1 3215 43 is_stmt 1 discriminator 1 view .LVU2269
+ 7338              	.LBB613:
+ 7339              	.LBI613:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6816              		.loc 4 905 26 view .LVU2142
- 6817              	.LBB583:
+ 7340              		.loc 4 905 26 view .LVU2270
+ 7341              	.LBB614:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6818              		.loc 4 907 3 view .LVU2143
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6819              		.loc 4 907 12 is_stmt 0 view .LVU2144
- 6820 00f6 184B     		ldr	r3, .L356+4
- 6821 00f8 9B68     		ldr	r3, [r3, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6822              		.loc 4 907 68 view .LVU2145
- 6823 00fa 13F0010F 		tst	r3, #1
- 6824 00fe 04D1     		bne	.L343
- 6825              	.LVL637:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6826              		.loc 4 907 68 view .LVU2146
- 6827              	.LBE583:
- 6828              	.LBE582:
-2928:Src/main.c    **** 			(void) SPI2->DR;
- 6829              		.loc 1 2928 43 discriminator 2 view .LVU2147
- 6830 0100 B2F5FA7F 		cmp	r2, #500
- 6831 0104 01D8     		bhi	.L343
-ARM GAS  /tmp/ccwR4KB7.s 			page 499
+ARM GAS  /tmp/ccEQxcUB.s 			page 515
+
+
+ 7342              		.loc 4 907 3 view .LVU2271
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7343              		.loc 4 907 12 is_stmt 0 view .LVU2272
+ 7344 00c8 2A4B     		ldr	r3, .L393+16
+ 7345 00ca 9B68     		ldr	r3, [r3, #8]
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7346              		.loc 4 907 68 view .LVU2273
+ 7347 00cc 13F0010F 		tst	r3, #1
+ 7348 00d0 04D1     		bne	.L376
+ 7349              	.LVL704:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7350              		.loc 4 907 68 view .LVU2274
+ 7351              	.LBE614:
+ 7352              	.LBE613:
+3215:Src/main.c    **** 			(void) SPI6->DR;
+ 7353              		.loc 1 3215 43 discriminator 2 view .LVU2275
+ 7354 00d2 B2F5FA7F 		cmp	r2, #500
+ 7355 00d6 01D8     		bhi	.L376
+3215:Src/main.c    **** 			(void) SPI6->DR;
+ 7356              		.loc 1 3215 60 is_stmt 1 discriminator 3 view .LVU2276
+3215:Src/main.c    **** 			(void) SPI6->DR;
+ 7357              		.loc 1 3215 65 is_stmt 0 discriminator 3 view .LVU2277
+ 7358 00d8 0132     		adds	r2, r2, #1
+ 7359              	.LVL705:
+3215:Src/main.c    **** 			(void) SPI6->DR;
+ 7360              		.loc 1 3215 65 discriminator 3 view .LVU2278
+ 7361 00da F5E7     		b	.L375
+ 7362              	.L376:
+3216:Src/main.c    **** 		break;
+ 7363              		.loc 1 3216 4 is_stmt 1 view .LVU2279
+ 7364 00dc 254B     		ldr	r3, .L393+16
+ 7365 00de DB68     		ldr	r3, [r3, #12]
+3217:Src/main.c    **** 		case 3:
+ 7366              		.loc 1 3217 3 view .LVU2280
+ 7367 00e0 C7E7     		b	.L360
+ 7368              	.LVL706:
+ 7369              	.L363:
+3219:Src/main.c    **** 			//tmp32=0;
+ 7370              		.loc 1 3219 4 view .LVU2281
+ 7371 00e2 0022     		movs	r2, #0
+ 7372 00e4 4FF48051 		mov	r1, #4096
+ 7373 00e8 2148     		ldr	r0, .L393+12
+ 7374 00ea FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7375              	.LVL707:
+3222:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7376              		.loc 1 3222 4 view .LVU2282
+3223:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7377              		.loc 1 3223 4 view .LVU2283
+3222:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7378              		.loc 1 3222 10 is_stmt 0 view .LVU2284
+ 7379 00ee 0022     		movs	r2, #0
+ 7380              	.LVL708:
+ 7381              	.L378:
+3223:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7382              		.loc 1 3223 42 is_stmt 1 discriminator 1 view .LVU2285
+ 7383              	.LBB615:
+ 7384              	.LBI615:
+ARM GAS  /tmp/ccEQxcUB.s 			page 516
 
 
-2928:Src/main.c    **** 			(void) SPI2->DR;
- 6832              		.loc 1 2928 60 is_stmt 1 discriminator 3 view .LVU2148
-2928:Src/main.c    **** 			(void) SPI2->DR;
- 6833              		.loc 1 2928 65 is_stmt 0 discriminator 3 view .LVU2149
- 6834 0106 0132     		adds	r2, r2, #1
- 6835              	.LVL638:
-2928:Src/main.c    **** 			(void) SPI2->DR;
- 6836              		.loc 1 2928 65 discriminator 3 view .LVU2150
- 6837 0108 F5E7     		b	.L342
- 6838              	.L343:
-2929:Src/main.c    **** 		break;
- 6839              		.loc 1 2929 4 is_stmt 1 view .LVU2151
- 6840 010a 134B     		ldr	r3, .L356+4
- 6841 010c DB68     		ldr	r3, [r3, #12]
-2930:Src/main.c    **** 		case 4:
- 6842              		.loc 1 2930 3 view .LVU2152
- 6843 010e A5E7     		b	.L321
- 6844              	.LVL639:
- 6845              	.L322:
-2932:Src/main.c    **** 			//tmp32=0;
- 6846              		.loc 1 2932 4 view .LVU2153
- 6847 0110 0022     		movs	r2, #0
- 6848 0112 1021     		movs	r1, #16
- 6849              	.LVL640:
-2932:Src/main.c    **** 			//tmp32=0;
- 6850              		.loc 1 2932 4 is_stmt 0 view .LVU2154
- 6851 0114 1148     		ldr	r0, .L356+8
- 6852 0116 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 6853              	.LVL641:
-2935:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6854              		.loc 1 2935 4 is_stmt 1 view .LVU2155
-2936:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6855              		.loc 1 2936 4 view .LVU2156
-2935:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 6856              		.loc 1 2935 10 is_stmt 0 view .LVU2157
- 6857 011a 0022     		movs	r2, #0
- 6858              	.LVL642:
- 6859              	.L345:
-2936:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6860              		.loc 1 2936 42 is_stmt 1 discriminator 1 view .LVU2158
- 6861              	.LBB584:
- 6862              	.LBI584:
  916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6863              		.loc 4 916 26 view .LVU2159
- 6864              	.LBB585:
+ 7385              		.loc 4 916 26 view .LVU2286
+ 7386              	.LBB616:
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6865              		.loc 4 918 3 view .LVU2160
+ 7387              		.loc 4 918 3 view .LVU2287
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6866              		.loc 4 918 12 is_stmt 0 view .LVU2161
- 6867 011c 104B     		ldr	r3, .L356+12
- 6868 011e 9B68     		ldr	r3, [r3, #8]
+ 7388              		.loc 4 918 12 is_stmt 0 view .LVU2288
+ 7389 00f0 1D4B     		ldr	r3, .L393+4
+ 7390 00f2 9B68     		ldr	r3, [r3, #8]
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6869              		.loc 4 918 66 view .LVU2162
- 6870 0120 13F0020F 		tst	r3, #2
- 6871 0124 04D1     		bne	.L346
- 6872              	.LVL643:
+ 7391              		.loc 4 918 66 view .LVU2289
+ 7392 00f4 13F0020F 		tst	r3, #2
+ 7393 00f8 04D1     		bne	.L379
+ 7394              	.LVL709:
  918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 500
-
-
- 6873              		.loc 4 918 66 view .LVU2163
- 6874              	.LBE585:
- 6875              	.LBE584:
-2936:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6876              		.loc 1 2936 42 discriminator 2 view .LVU2164
- 6877 0126 B2F5FA7F 		cmp	r2, #500
- 6878 012a 01D8     		bhi	.L346
-2936:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6879              		.loc 1 2936 59 is_stmt 1 discriminator 3 view .LVU2165
-2936:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6880              		.loc 1 2936 64 is_stmt 0 discriminator 3 view .LVU2166
- 6881 012c 0132     		adds	r2, r2, #1
- 6882              	.LVL644:
-2936:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 6883              		.loc 1 2936 64 discriminator 3 view .LVU2167
- 6884 012e F5E7     		b	.L345
- 6885              	.L346:
-2937:Src/main.c    **** 			tmp32 = 0;
- 6886              		.loc 1 2937 4 is_stmt 1 view .LVU2168
- 6887              	.LVL645:
- 6888              	.LBB586:
- 6889              	.LBI586:
+ 7395              		.loc 4 918 66 view .LVU2290
+ 7396              	.LBE616:
+ 7397              	.LBE615:
+3223:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7398              		.loc 1 3223 42 discriminator 2 view .LVU2291
+ 7399 00fa B2F5FA7F 		cmp	r2, #500
+ 7400 00fe 01D8     		bhi	.L379
+3223:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7401              		.loc 1 3223 59 is_stmt 1 discriminator 3 view .LVU2292
+3223:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7402              		.loc 1 3223 64 is_stmt 0 discriminator 3 view .LVU2293
+ 7403 0100 0132     		adds	r2, r2, #1
+ 7404              	.LVL710:
+3223:Src/main.c    **** 			LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
+ 7405              		.loc 1 3223 64 discriminator 3 view .LVU2294
+ 7406 0102 F5E7     		b	.L378
+ 7407              	.L379:
+3224:Src/main.c    **** 			tmp32 = 0;
+ 7408              		.loc 1 3224 4 is_stmt 1 view .LVU2295
+ 7409              	.LVL711:
+ 7410              	.LBB617:
+ 7411              	.LBI617:
 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6890              		.loc 4 1373 22 view .LVU2169
- 6891              	.LBB587:
+ 7412              		.loc 4 1373 22 view .LVU2296
+ 7413              	.LBB618:
 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
- 6892              		.loc 4 1376 3 view .LVU2170
- 6893              		.loc 4 1377 3 view .LVU2171
- 6894              		.loc 4 1377 10 is_stmt 0 view .LVU2172
- 6895 0130 0B4B     		ldr	r3, .L356+12
- 6896 0132 9C81     		strh	r4, [r3, #12]	@ movhi
- 6897              	.LVL646:
- 6898              		.loc 4 1377 10 view .LVU2173
- 6899              	.LBE587:
- 6900              	.LBE586:
-2938:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6901              		.loc 1 2938 4 is_stmt 1 view .LVU2174
-2939:Src/main.c    **** 			(void) SPI6->DR;
- 6902              		.loc 1 2939 4 view .LVU2175
-2938:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 6903              		.loc 1 2938 10 is_stmt 0 view .LVU2176
- 6904 0134 0022     		movs	r2, #0
- 6905              	.LVL647:
- 6906              	.L348:
-2939:Src/main.c    **** 			(void) SPI6->DR;
- 6907              		.loc 1 2939 43 is_stmt 1 discriminator 1 view .LVU2177
- 6908              	.LBB588:
- 6909              	.LBI588:
+ 7414              		.loc 4 1376 3 view .LVU2297
+ 7415              		.loc 4 1377 3 view .LVU2298
+ 7416              		.loc 4 1377 10 is_stmt 0 view .LVU2299
+ 7417 0104 184B     		ldr	r3, .L393+4
+ 7418 0106 9D81     		strh	r5, [r3, #12]	@ movhi
+ 7419              	.LVL712:
+ 7420              		.loc 4 1377 10 view .LVU2300
+ 7421              	.LBE618:
+ 7422              	.LBE617:
+3225:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7423              		.loc 1 3225 4 is_stmt 1 view .LVU2301
+3226:Src/main.c    **** 			(void) SPI2->DR;
+ 7424              		.loc 1 3226 4 view .LVU2302
+3225:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7425              		.loc 1 3225 10 is_stmt 0 view .LVU2303
+ 7426 0108 0022     		movs	r2, #0
+ARM GAS  /tmp/ccEQxcUB.s 			page 517
+
+
+ 7427              	.LVL713:
+ 7428              	.L381:
+3226:Src/main.c    **** 			(void) SPI2->DR;
+ 7429              		.loc 1 3226 43 is_stmt 1 discriminator 1 view .LVU2304
+ 7430              	.LBB619:
+ 7431              	.LBI619:
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6910              		.loc 4 905 26 view .LVU2178
- 6911              	.LBB589:
+ 7432              		.loc 4 905 26 view .LVU2305
+ 7433              	.LBB620:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6912              		.loc 4 907 3 view .LVU2179
+ 7434              		.loc 4 907 3 view .LVU2306
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6913              		.loc 4 907 12 is_stmt 0 view .LVU2180
- 6914 0136 0A4B     		ldr	r3, .L356+12
- 6915 0138 9B68     		ldr	r3, [r3, #8]
-ARM GAS  /tmp/ccwR4KB7.s 			page 501
-
-
+ 7435              		.loc 4 907 12 is_stmt 0 view .LVU2307
+ 7436 010a 174B     		ldr	r3, .L393+4
+ 7437 010c 9B68     		ldr	r3, [r3, #8]
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6916              		.loc 4 907 68 view .LVU2181
- 6917 013a 13F0010F 		tst	r3, #1
- 6918 013e 04D1     		bne	.L349
- 6919              	.LVL648:
+ 7438              		.loc 4 907 68 view .LVU2308
+ 7439 010e 13F0010F 		tst	r3, #1
+ 7440 0112 04D1     		bne	.L382
+ 7441              	.LVL714:
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6920              		.loc 4 907 68 view .LVU2182
- 6921              	.LBE589:
- 6922              	.LBE588:
-2939:Src/main.c    **** 			(void) SPI6->DR;
- 6923              		.loc 1 2939 43 discriminator 2 view .LVU2183
- 6924 0140 B2F5FA7F 		cmp	r2, #500
- 6925 0144 01D8     		bhi	.L349
-2939:Src/main.c    **** 			(void) SPI6->DR;
- 6926              		.loc 1 2939 60 is_stmt 1 discriminator 3 view .LVU2184
-2939:Src/main.c    **** 			(void) SPI6->DR;
- 6927              		.loc 1 2939 65 is_stmt 0 discriminator 3 view .LVU2185
- 6928 0146 0132     		adds	r2, r2, #1
- 6929              	.LVL649:
-2939:Src/main.c    **** 			(void) SPI6->DR;
- 6930              		.loc 1 2939 65 discriminator 3 view .LVU2186
- 6931 0148 F5E7     		b	.L348
- 6932              	.L349:
-2940:Src/main.c    **** 		break;
- 6933              		.loc 1 2940 4 is_stmt 1 view .LVU2187
- 6934 014a 054B     		ldr	r3, .L356+12
- 6935 014c DB68     		ldr	r3, [r3, #12]
-2941:Src/main.c    **** 	}
- 6936              		.loc 1 2941 3 view .LVU2188
- 6937 014e 85E7     		b	.L321
- 6938              	.LVL650:
- 6939              	.L353:
- 6940              	.LCFI65:
- 6941              		.cfi_def_cfa_offset 0
- 6942              		.cfi_restore 3
- 6943              		.cfi_restore 4
- 6944              		.cfi_restore 5
- 6945              		.cfi_restore 14
-2941:Src/main.c    **** 	}
- 6946              		.loc 1 2941 3 is_stmt 0 view .LVU2189
- 6947 0150 7047     		bx	lr
- 6948              	.L357:
- 6949 0152 00BF     		.align	2
- 6950              	.L356:
- 6951 0154 00040240 		.word	1073873920
- 6952 0158 00380040 		.word	1073756160
- 6953 015c 00000240 		.word	1073872896
- 6954 0160 00540140 		.word	1073828864
- 6955              		.cfi_endproc
- 6956              	.LFE1220:
- 6958              		.section	.text.Decode_uart,"ax",%progbits
- 6959              		.align	1
- 6960              		.syntax unified
- 6961              		.thumb
- 6962              		.thumb_func
- 6964              	Decode_uart:
- 6965              	.LVL651:
-ARM GAS  /tmp/ccwR4KB7.s 			page 502
+ 7442              		.loc 4 907 68 view .LVU2309
+ 7443              	.LBE620:
+ 7444              	.LBE619:
+3226:Src/main.c    **** 			(void) SPI2->DR;
+ 7445              		.loc 1 3226 43 discriminator 2 view .LVU2310
+ 7446 0114 B2F5FA7F 		cmp	r2, #500
+ 7447 0118 01D8     		bhi	.L382
+3226:Src/main.c    **** 			(void) SPI2->DR;
+ 7448              		.loc 1 3226 60 is_stmt 1 discriminator 3 view .LVU2311
+3226:Src/main.c    **** 			(void) SPI2->DR;
+ 7449              		.loc 1 3226 65 is_stmt 0 discriminator 3 view .LVU2312
+ 7450 011a 0132     		adds	r2, r2, #1
+ 7451              	.LVL715:
+3226:Src/main.c    **** 			(void) SPI2->DR;
+ 7452              		.loc 1 3226 65 discriminator 3 view .LVU2313
+ 7453 011c F5E7     		b	.L381
+ 7454              	.L382:
+3227:Src/main.c    **** 		break;
+ 7455              		.loc 1 3227 4 is_stmt 1 view .LVU2314
+ 7456 011e 124B     		ldr	r3, .L393+4
+ 7457 0120 DB68     		ldr	r3, [r3, #12]
+3228:Src/main.c    **** 		case 4:
+ 7458              		.loc 1 3228 3 view .LVU2315
+ 7459 0122 A6E7     		b	.L360
+ 7460              	.LVL716:
+ 7461              	.L361:
+3230:Src/main.c    **** 			//tmp32=0;
+ 7462              		.loc 1 3230 4 view .LVU2316
+ 7463 0124 0022     		movs	r2, #0
+ 7464 0126 1021     		movs	r1, #16
+ 7465 0128 1048     		ldr	r0, .L393+8
+ 7466 012a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7467              	.LVL717:
+3233:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7468              		.loc 1 3233 4 view .LVU2317
+3234:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ARM GAS  /tmp/ccEQxcUB.s 			page 518
 
 
- 6966              	.LFB1208:
-2197:Src/main.c    **** //	uint8_t *temp1;
- 6967              		.loc 1 2197 1 is_stmt 1 view -0
- 6968              		.cfi_startproc
- 6969              		@ args = 0, pretend = 0, frame = 0
- 6970              		@ frame_needed = 0, uses_anonymous_args = 0
-2197:Src/main.c    **** //	uint8_t *temp1;
- 6971              		.loc 1 2197 1 is_stmt 0 view .LVU2191
- 6972 0000 2DE9F843 		push	{r3, r4, r5, r6, r7, r8, r9, lr}
- 6973              	.LCFI66:
- 6974              		.cfi_def_cfa_offset 32
- 6975              		.cfi_offset 3, -32
- 6976              		.cfi_offset 4, -28
- 6977              		.cfi_offset 5, -24
- 6978              		.cfi_offset 6, -20
- 6979              		.cfi_offset 7, -16
- 6980              		.cfi_offset 8, -12
- 6981              		.cfi_offset 9, -8
- 6982              		.cfi_offset 14, -4
- 6983 0004 0546     		mov	r5, r0
- 6984 0006 0F46     		mov	r7, r1
- 6985 0008 1646     		mov	r6, r2
- 6986 000a 1C46     		mov	r4, r3
-2199:Src/main.c    **** 	
- 6987              		.loc 1 2199 2 is_stmt 1 view .LVU2192
-2204:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- 6988              		.loc 1 2204 2 view .LVU2193
-2204:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- 6989              		.loc 1 2204 6 is_stmt 0 view .LVU2194
- 6990 000c AF4B     		ldr	r3, .L382
- 6991              	.LVL652:
-2204:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- 6992              		.loc 1 2204 6 view .LVU2195
- 6993 000e 0022     		movs	r2, #0
- 6994              	.LVL653:
-2204:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- 6995              		.loc 1 2204 6 view .LVU2196
- 6996 0010 1A60     		str	r2, [r3]
-2205:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 6997              		.loc 1 2205 2 is_stmt 1 view .LVU2197
-2205:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 6998              		.loc 1 2205 7 is_stmt 0 view .LVU2198
- 6999 0012 0121     		movs	r1, #1
- 7000              	.LVL654:
-2205:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 7001              		.loc 1 2205 7 view .LVU2199
- 7002 0014 AE48     		ldr	r0, .L382+4
- 7003              	.LVL655:
-2205:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 7004              		.loc 1 2205 7 view .LVU2200
- 7005 0016 FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 7006              	.LVL656:
-2205:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 7007              		.loc 1 2205 5 discriminator 1 view .LVU2201
- 7008 001a 0028     		cmp	r0, #0
- 7009 001c 00F0D280 		beq	.L379
- 7010              	.L359:
-ARM GAS  /tmp/ccwR4KB7.s 			page 503
+ 7469              		.loc 1 3234 4 view .LVU2318
+3233:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
+ 7470              		.loc 1 3233 10 is_stmt 0 view .LVU2319
+ 7471 012e 0022     		movs	r2, #0
+ 7472              	.LVL718:
+ 7473              	.L384:
+3234:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7474              		.loc 1 3234 42 is_stmt 1 discriminator 1 view .LVU2320
+ 7475              	.LBB621:
+ 7476              	.LBI621:
+ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 7477              		.loc 4 916 26 view .LVU2321
+ 7478              	.LBB622:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7479              		.loc 4 918 3 view .LVU2322
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7480              		.loc 4 918 12 is_stmt 0 view .LVU2323
+ 7481 0130 104B     		ldr	r3, .L393+16
+ 7482 0132 9B68     		ldr	r3, [r3, #8]
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7483              		.loc 4 918 66 view .LVU2324
+ 7484 0134 13F0020F 		tst	r3, #2
+ 7485 0138 04D1     		bne	.L385
+ 7486              	.LVL719:
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7487              		.loc 4 918 66 view .LVU2325
+ 7488              	.LBE622:
+ 7489              	.LBE621:
+3234:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7490              		.loc 1 3234 42 discriminator 2 view .LVU2326
+ 7491 013a B2F5FA7F 		cmp	r2, #500
+ 7492 013e 01D8     		bhi	.L385
+3234:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7493              		.loc 1 3234 59 is_stmt 1 discriminator 3 view .LVU2327
+3234:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7494              		.loc 1 3234 64 is_stmt 0 discriminator 3 view .LVU2328
+ 7495 0140 0132     		adds	r2, r2, #1
+ 7496              	.LVL720:
+3234:Src/main.c    **** 			LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
+ 7497              		.loc 1 3234 64 discriminator 3 view .LVU2329
+ 7498 0142 F5E7     		b	.L384
+ 7499              	.L385:
+3235:Src/main.c    **** 			tmp32 = 0;
+ 7500              		.loc 1 3235 4 is_stmt 1 view .LVU2330
+ 7501              	.LVL721:
+ 7502              	.LBB623:
+ 7503              	.LBI623:
+1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 7504              		.loc 4 1373 22 view .LVU2331
+ 7505              	.LBB624:
+1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****   *spidr = TxData;
+ 7506              		.loc 4 1376 3 view .LVU2332
+ 7507              		.loc 4 1377 3 view .LVU2333
+ 7508              		.loc 4 1377 10 is_stmt 0 view .LVU2334
+ 7509 0144 0B4B     		ldr	r3, .L393+16
+ 7510 0146 9D81     		strh	r5, [r3, #12]	@ movhi
+ 7511              	.LVL722:
+ARM GAS  /tmp/ccEQxcUB.s 			page 519
 
 
-2220:Src/main.c    **** 	Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- 7011              		.loc 1 2220 2 is_stmt 1 view .LVU2202
- 7012              	.LVL657:
-2221:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 7013              		.loc 1 2221 2 view .LVU2203
-2221:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 7014              		.loc 1 2221 36 is_stmt 0 view .LVU2204
- 7015 0020 2B88     		ldrh	r3, [r5]
-2221:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 7016              		.loc 1 2221 48 view .LVU2205
- 7017 0022 03F00103 		and	r3, r3, #1
-2221:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 7018              		.loc 1 2221 22 view .LVU2206
- 7019 0026 2370     		strb	r3, [r4]
-2222:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 7020              		.loc 1 2222 2 is_stmt 1 view .LVU2207
-2222:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 7021              		.loc 1 2222 36 is_stmt 0 view .LVU2208
- 7022 0028 2B88     		ldrh	r3, [r5]
-2222:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 7023              		.loc 1 2222 48 view .LVU2209
- 7024 002a C3F34003 		ubfx	r3, r3, #1, #1
-2222:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 7025              		.loc 1 2222 22 view .LVU2210
- 7026 002e 6370     		strb	r3, [r4, #1]
-2223:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 7027              		.loc 1 2223 2 is_stmt 1 view .LVU2211
-2223:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 7028              		.loc 1 2223 36 is_stmt 0 view .LVU2212
- 7029 0030 2B88     		ldrh	r3, [r5]
-2223:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 7030              		.loc 1 2223 48 view .LVU2213
- 7031 0032 C3F38003 		ubfx	r3, r3, #2, #1
-2223:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 7032              		.loc 1 2223 22 view .LVU2214
- 7033 0036 A370     		strb	r3, [r4, #2]
-2224:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 7034              		.loc 1 2224 2 is_stmt 1 view .LVU2215
-2224:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 7035              		.loc 1 2224 35 is_stmt 0 view .LVU2216
- 7036 0038 2B88     		ldrh	r3, [r5]
-2224:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 7037              		.loc 1 2224 47 view .LVU2217
- 7038 003a C3F3C003 		ubfx	r3, r3, #3, #1
-2224:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 7039              		.loc 1 2224 21 view .LVU2218
- 7040 003e E370     		strb	r3, [r4, #3]
-2225:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 7041              		.loc 1 2225 2 is_stmt 1 view .LVU2219
-2225:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 7042              		.loc 1 2225 35 is_stmt 0 view .LVU2220
- 7043 0040 2B88     		ldrh	r3, [r5]
-2225:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 7044              		.loc 1 2225 47 view .LVU2221
- 7045 0042 C3F30013 		ubfx	r3, r3, #4, #1
-2225:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 7046              		.loc 1 2225 21 view .LVU2222
-ARM GAS  /tmp/ccwR4KB7.s 			page 504
+ 7512              		.loc 4 1377 10 view .LVU2335
+ 7513              	.LBE624:
+ 7514              	.LBE623:
+3236:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7515              		.loc 1 3236 4 is_stmt 1 view .LVU2336
+3237:Src/main.c    **** 			(void) SPI6->DR;
+ 7516              		.loc 1 3237 4 view .LVU2337
+3236:Src/main.c    **** 			while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
+ 7517              		.loc 1 3236 10 is_stmt 0 view .LVU2338
+ 7518 0148 0022     		movs	r2, #0
+ 7519              	.LVL723:
+ 7520              	.L387:
+3237:Src/main.c    **** 			(void) SPI6->DR;
+ 7521              		.loc 1 3237 43 is_stmt 1 discriminator 1 view .LVU2339
+ 7522              	.LBB625:
+ 7523              	.LBI625:
+ 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
+ 7524              		.loc 4 905 26 view .LVU2340
+ 7525              	.LBB626:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7526              		.loc 4 907 3 view .LVU2341
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7527              		.loc 4 907 12 is_stmt 0 view .LVU2342
+ 7528 014a 0A4B     		ldr	r3, .L393+16
+ 7529 014c 9B68     		ldr	r3, [r3, #8]
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7530              		.loc 4 907 68 view .LVU2343
+ 7531 014e 13F0010F 		tst	r3, #1
+ 7532 0152 04D1     		bne	.L388
+ 7533              	.LVL724:
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ 7534              		.loc 4 907 68 view .LVU2344
+ 7535              	.LBE626:
+ 7536              	.LBE625:
+3237:Src/main.c    **** 			(void) SPI6->DR;
+ 7537              		.loc 1 3237 43 discriminator 2 view .LVU2345
+ 7538 0154 B2F5FA7F 		cmp	r2, #500
+ 7539 0158 01D8     		bhi	.L388
+3237:Src/main.c    **** 			(void) SPI6->DR;
+ 7540              		.loc 1 3237 60 is_stmt 1 discriminator 3 view .LVU2346
+3237:Src/main.c    **** 			(void) SPI6->DR;
+ 7541              		.loc 1 3237 65 is_stmt 0 discriminator 3 view .LVU2347
+ 7542 015a 0132     		adds	r2, r2, #1
+ 7543              	.LVL725:
+3237:Src/main.c    **** 			(void) SPI6->DR;
+ 7544              		.loc 1 3237 65 discriminator 3 view .LVU2348
+ 7545 015c F5E7     		b	.L387
+ 7546              	.L388:
+3238:Src/main.c    **** 		break;
+ 7547              		.loc 1 3238 4 is_stmt 1 view .LVU2349
+ 7548 015e 054B     		ldr	r3, .L393+16
+ 7549 0160 DB68     		ldr	r3, [r3, #12]
+3239:Src/main.c    **** 	}
+ 7550              		.loc 1 3239 3 view .LVU2350
+ 7551 0162 86E7     		b	.L360
+ 7552              	.L394:
+ 7553              		.align	2
+ARM GAS  /tmp/ccEQxcUB.s 			page 520
 
 
- 7047 0046 2371     		strb	r3, [r4, #4]
-2226:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 7048              		.loc 1 2226 2 is_stmt 1 view .LVU2223
-2226:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 7049              		.loc 1 2226 36 is_stmt 0 view .LVU2224
- 7050 0048 2B88     		ldrh	r3, [r5]
-2226:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 7051              		.loc 1 2226 48 view .LVU2225
- 7052 004a C3F34013 		ubfx	r3, r3, #5, #1
-2226:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 7053              		.loc 1 2226 22 view .LVU2226
- 7054 004e 6371     		strb	r3, [r4, #5]
-2227:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 7055              		.loc 1 2227 2 is_stmt 1 view .LVU2227
-2227:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 7056              		.loc 1 2227 36 is_stmt 0 view .LVU2228
- 7057 0050 2B88     		ldrh	r3, [r5]
-2227:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 7058              		.loc 1 2227 48 view .LVU2229
- 7059 0052 C3F38013 		ubfx	r3, r3, #6, #1
-2227:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 7060              		.loc 1 2227 22 view .LVU2230
- 7061 0056 A371     		strb	r3, [r4, #6]
-2228:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 7062              		.loc 1 2228 2 is_stmt 1 view .LVU2231
-2228:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 7063              		.loc 1 2228 36 is_stmt 0 view .LVU2232
- 7064 0058 2B88     		ldrh	r3, [r5]
-2228:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 7065              		.loc 1 2228 48 view .LVU2233
- 7066 005a C3F3C013 		ubfx	r3, r3, #7, #1
-2228:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 7067              		.loc 1 2228 22 view .LVU2234
- 7068 005e E371     		strb	r3, [r4, #7]
-2229:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 7069              		.loc 1 2229 2 is_stmt 1 view .LVU2235
-2229:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 7070              		.loc 1 2229 36 is_stmt 0 view .LVU2236
- 7071 0060 2B88     		ldrh	r3, [r5]
-2229:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 7072              		.loc 1 2229 48 view .LVU2237
- 7073 0062 C3F30023 		ubfx	r3, r3, #8, #1
-2229:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 7074              		.loc 1 2229 22 view .LVU2238
- 7075 0066 2372     		strb	r3, [r4, #8]
-2230:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 7076              		.loc 1 2230 2 is_stmt 1 view .LVU2239
-2230:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 7077              		.loc 1 2230 35 is_stmt 0 view .LVU2240
- 7078 0068 2B88     		ldrh	r3, [r5]
-2230:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 7079              		.loc 1 2230 47 view .LVU2241
- 7080 006a C3F34023 		ubfx	r3, r3, #9, #1
-2230:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 7081              		.loc 1 2230 21 view .LVU2242
- 7082 006e 6372     		strb	r3, [r4, #9]
-2231:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
-ARM GAS  /tmp/ccwR4KB7.s 			page 505
+ 7554              	.L393:
+ 7555 0164 00040240 		.word	1073873920
+ 7556 0168 00380040 		.word	1073756160
+ 7557 016c 00000240 		.word	1073872896
+ 7558 0170 000C0240 		.word	1073875968
+ 7559 0174 00540140 		.word	1073828864
+ 7560              		.cfi_endproc
+ 7561              	.LFE1225:
+ 7563              		.section	.text.Decode_uart,"ax",%progbits
+ 7564              		.align	1
+ 7565              		.syntax unified
+ 7566              		.thumb
+ 7567              		.thumb_func
+ 7569              	Decode_uart:
+ 7570              	.LVL726:
+ 7571              	.LFB1209:
+2372:Src/main.c    **** //	uint8_t *temp1;
+ 7572              		.loc 1 2372 1 view -0
+ 7573              		.cfi_startproc
+ 7574              		@ args = 0, pretend = 0, frame = 0
+ 7575              		@ frame_needed = 0, uses_anonymous_args = 0
+2372:Src/main.c    **** //	uint8_t *temp1;
+ 7576              		.loc 1 2372 1 is_stmt 0 view .LVU2352
+ 7577 0000 2DE9F843 		push	{r3, r4, r5, r6, r7, r8, r9, lr}
+ 7578              	.LCFI68:
+ 7579              		.cfi_def_cfa_offset 32
+ 7580              		.cfi_offset 3, -32
+ 7581              		.cfi_offset 4, -28
+ 7582              		.cfi_offset 5, -24
+ 7583              		.cfi_offset 6, -20
+ 7584              		.cfi_offset 7, -16
+ 7585              		.cfi_offset 8, -12
+ 7586              		.cfi_offset 9, -8
+ 7587              		.cfi_offset 14, -4
+ 7588 0004 0546     		mov	r5, r0
+ 7589 0006 0F46     		mov	r7, r1
+ 7590 0008 1646     		mov	r6, r2
+ 7591 000a 1C46     		mov	r4, r3
+2374:Src/main.c    **** 	
+ 7592              		.loc 1 2374 2 is_stmt 1 view .LVU2353
+2379:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
+ 7593              		.loc 1 2379 2 view .LVU2354
+2379:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
+ 7594              		.loc 1 2379 6 is_stmt 0 view .LVU2355
+ 7595 000c AF4B     		ldr	r3, .L419
+ 7596              	.LVL727:
+2379:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
+ 7597              		.loc 1 2379 6 view .LVU2356
+ 7598 000e 0022     		movs	r2, #0
+ 7599              	.LVL728:
+2379:Src/main.c    **** 	if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
+ 7600              		.loc 1 2379 6 view .LVU2357
+ 7601 0010 1A60     		str	r2, [r3]
+2380:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
+ 7602              		.loc 1 2380 2 is_stmt 1 view .LVU2358
+2380:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
+ 7603              		.loc 1 2380 7 is_stmt 0 view .LVU2359
+ARM GAS  /tmp/ccEQxcUB.s 			page 521
 
 
- 7083              		.loc 1 2231 2 is_stmt 1 view .LVU2243
-2231:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 7084              		.loc 1 2231 35 is_stmt 0 view .LVU2244
- 7085 0070 2B88     		ldrh	r3, [r5]
-2231:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 7086              		.loc 1 2231 48 view .LVU2245
- 7087 0072 C3F38023 		ubfx	r3, r3, #10, #1
-2231:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 7088              		.loc 1 2231 21 view .LVU2246
- 7089 0076 A372     		strb	r3, [r4, #10]
-2232:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 7090              		.loc 1 2232 2 is_stmt 1 view .LVU2247
-2232:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 7091              		.loc 1 2232 34 is_stmt 0 view .LVU2248
- 7092 0078 2B88     		ldrh	r3, [r5]
-2232:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 7093              		.loc 1 2232 47 view .LVU2249
- 7094 007a C3F3C023 		ubfx	r3, r3, #11, #1
-2232:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 7095              		.loc 1 2232 20 view .LVU2250
- 7096 007e E372     		strb	r3, [r4, #11]
-2233:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 7097              		.loc 1 2233 2 is_stmt 1 view .LVU2251
-2233:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 7098              		.loc 1 2233 35 is_stmt 0 view .LVU2252
- 7099 0080 2B88     		ldrh	r3, [r5]
-2233:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 7100              		.loc 1 2233 48 view .LVU2253
- 7101 0082 C3F30033 		ubfx	r3, r3, #12, #1
-2233:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 7102              		.loc 1 2233 21 view .LVU2254
- 7103 0086 2373     		strb	r3, [r4, #12]
-2234:Src/main.c    **** 	
- 7104              		.loc 1 2234 2 is_stmt 1 view .LVU2255
-2234:Src/main.c    **** 	
- 7105              		.loc 1 2234 35 is_stmt 0 view .LVU2256
- 7106 0088 2B88     		ldrh	r3, [r5]
-2234:Src/main.c    **** 	
- 7107              		.loc 1 2234 48 view .LVU2257
- 7108 008a C3F34033 		ubfx	r3, r3, #13, #1
-2234:Src/main.c    **** 	
- 7109              		.loc 1 2234 21 view .LVU2258
- 7110 008e 6373     		strb	r3, [r4, #13]
-2236:Src/main.c    **** 	LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- 7111              		.loc 1 2236 2 is_stmt 1 view .LVU2259
- 7112              	.LVL658:
-2237:Src/main.c    **** 	temp2++;
- 7113              		.loc 1 2237 2 view .LVU2260
-2237:Src/main.c    **** 	temp2++;
- 7114              		.loc 1 2237 28 is_stmt 0 view .LVU2261
- 7115 0090 6B88     		ldrh	r3, [r5, #2]
-2237:Src/main.c    **** 	temp2++;
- 7116              		.loc 1 2237 26 view .LVU2262
- 7117 0092 3B80     		strh	r3, [r7]	@ movhi
-2238:Src/main.c    **** 	LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- 7118              		.loc 1 2238 2 is_stmt 1 view .LVU2263
- 7119              	.LVL659:
-ARM GAS  /tmp/ccwR4KB7.s 			page 506
+ 7604 0012 0121     		movs	r1, #1
+ 7605              	.LVL729:
+2380:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
+ 7606              		.loc 1 2380 7 view .LVU2360
+ 7607 0014 AE48     		ldr	r0, .L419+4
+ 7608              	.LVL730:
+2380:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
+ 7609              		.loc 1 2380 7 view .LVU2361
+ 7610 0016 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 7611              	.LVL731:
+2380:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
+ 7612              		.loc 1 2380 5 discriminator 1 view .LVU2362
+ 7613 001a 0028     		cmp	r0, #0
+ 7614 001c 00F0D280 		beq	.L416
+ 7615              	.L396:
+2395:Src/main.c    **** 	Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
+ 7616              		.loc 1 2395 2 is_stmt 1 view .LVU2363
+ 7617              	.LVL732:
+2396:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
+ 7618              		.loc 1 2396 2 view .LVU2364
+2396:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
+ 7619              		.loc 1 2396 36 is_stmt 0 view .LVU2365
+ 7620 0020 2B88     		ldrh	r3, [r5]
+2396:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
+ 7621              		.loc 1 2396 48 view .LVU2366
+ 7622 0022 03F00103 		and	r3, r3, #1
+2396:Src/main.c    **** 	Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
+ 7623              		.loc 1 2396 22 view .LVU2367
+ 7624 0026 2370     		strb	r3, [r4]
+2397:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
+ 7625              		.loc 1 2397 2 is_stmt 1 view .LVU2368
+2397:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
+ 7626              		.loc 1 2397 36 is_stmt 0 view .LVU2369
+ 7627 0028 2B88     		ldrh	r3, [r5]
+2397:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
+ 7628              		.loc 1 2397 48 view .LVU2370
+ 7629 002a C3F34003 		ubfx	r3, r3, #1, #1
+2397:Src/main.c    **** 	Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
+ 7630              		.loc 1 2397 22 view .LVU2371
+ 7631 002e 6370     		strb	r3, [r4, #1]
+2398:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
+ 7632              		.loc 1 2398 2 is_stmt 1 view .LVU2372
+2398:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
+ 7633              		.loc 1 2398 36 is_stmt 0 view .LVU2373
+ 7634 0030 2B88     		ldrh	r3, [r5]
+2398:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
+ 7635              		.loc 1 2398 48 view .LVU2374
+ 7636 0032 C3F38003 		ubfx	r3, r3, #2, #1
+2398:Src/main.c    **** 	Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
+ 7637              		.loc 1 2398 22 view .LVU2375
+ 7638 0036 A370     		strb	r3, [r4, #2]
+2399:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
+ 7639              		.loc 1 2399 2 is_stmt 1 view .LVU2376
+2399:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
+ 7640              		.loc 1 2399 35 is_stmt 0 view .LVU2377
+ 7641 0038 2B88     		ldrh	r3, [r5]
+2399:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
+ARM GAS  /tmp/ccEQxcUB.s 			page 522
 
 
-2239:Src/main.c    **** 	temp2++;
- 7120              		.loc 1 2239 2 view .LVU2264
-2239:Src/main.c    **** 	temp2++;
- 7121              		.loc 1 2239 28 is_stmt 0 view .LVU2265
- 7122 0094 AB88     		ldrh	r3, [r5, #4]
-2239:Src/main.c    **** 	temp2++;
- 7123              		.loc 1 2239 26 view .LVU2266
- 7124 0096 3380     		strh	r3, [r6]	@ movhi
-2240:Src/main.c    **** 	temp2++;
- 7125              		.loc 1 2240 2 is_stmt 1 view .LVU2267
- 7126              	.LVL660:
-2241:Src/main.c    **** 	temp2++;
- 7127              		.loc 1 2241 2 view .LVU2268
-2242:Src/main.c    **** 	Curr_setup->AVERAGES = (uint16_t)(*temp2);
- 7128              		.loc 1 2242 2 view .LVU2269
-2243:Src/main.c    **** 	temp2++;
- 7129              		.loc 1 2243 2 view .LVU2270
-2243:Src/main.c    **** 	temp2++;
- 7130              		.loc 1 2243 25 is_stmt 0 view .LVU2271
- 7131 0098 6B89     		ldrh	r3, [r5, #10]
-2243:Src/main.c    **** 	temp2++;
- 7132              		.loc 1 2243 23 view .LVU2272
- 7133 009a E381     		strh	r3, [r4, #14]	@ movhi
-2244:Src/main.c    **** 	LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 7134              		.loc 1 2244 2 is_stmt 1 view .LVU2273
- 7135              	.LVL661:
-2245:Src/main.c    **** 	temp2++;
- 7136              		.loc 1 2245 2 view .LVU2274
-2245:Src/main.c    **** 	temp2++;
- 7137              		.loc 1 2245 51 is_stmt 0 view .LVU2275
- 7138 009c AB89     		ldrh	r3, [r5, #12]
- 7139 009e 07EE903A 		vmov	s15, r3	@ int
-2245:Src/main.c    **** 	temp2++;
- 7140              		.loc 1 2245 32 view .LVU2276
- 7141 00a2 F8EE677A 		vcvt.f32.u32	s15, s15
-2245:Src/main.c    **** 	temp2++;
- 7142              		.loc 1 2245 59 view .LVU2277
- 7143 00a6 9FED8B7A 		vldr.32	s14, .L382+8
- 7144 00aa 67EE877A 		vmul.f32	s15, s15, s14
-2245:Src/main.c    **** 	temp2++;
- 7145              		.loc 1 2245 30 view .LVU2278
- 7146 00ae C7ED017A 		vstr.32	s15, [r7, #4]
-2246:Src/main.c    **** 	LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 7147              		.loc 1 2246 2 is_stmt 1 view .LVU2279
- 7148              	.LVL662:
-2247:Src/main.c    **** 	temp2++;
- 7149              		.loc 1 2247 2 view .LVU2280
-2247:Src/main.c    **** 	temp2++;
- 7150              		.loc 1 2247 51 is_stmt 0 view .LVU2281
- 7151 00b2 EB89     		ldrh	r3, [r5, #14]
- 7152 00b4 07EE903A 		vmov	s15, r3	@ int
-2247:Src/main.c    **** 	temp2++;
- 7153              		.loc 1 2247 32 view .LVU2282
- 7154 00b8 F8EE677A 		vcvt.f32.u32	s15, s15
-2247:Src/main.c    **** 	temp2++;
- 7155              		.loc 1 2247 59 view .LVU2283
- 7156 00bc 67EE877A 		vmul.f32	s15, s15, s14
-ARM GAS  /tmp/ccwR4KB7.s 			page 507
+ 7642              		.loc 1 2399 47 view .LVU2378
+ 7643 003a C3F3C003 		ubfx	r3, r3, #3, #1
+2399:Src/main.c    **** 	Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
+ 7644              		.loc 1 2399 21 view .LVU2379
+ 7645 003e E370     		strb	r3, [r4, #3]
+2400:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
+ 7646              		.loc 1 2400 2 is_stmt 1 view .LVU2380
+2400:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
+ 7647              		.loc 1 2400 35 is_stmt 0 view .LVU2381
+ 7648 0040 2B88     		ldrh	r3, [r5]
+2400:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
+ 7649              		.loc 1 2400 47 view .LVU2382
+ 7650 0042 C3F30013 		ubfx	r3, r3, #4, #1
+2400:Src/main.c    **** 	Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
+ 7651              		.loc 1 2400 21 view .LVU2383
+ 7652 0046 2371     		strb	r3, [r4, #4]
+2401:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
+ 7653              		.loc 1 2401 2 is_stmt 1 view .LVU2384
+2401:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
+ 7654              		.loc 1 2401 36 is_stmt 0 view .LVU2385
+ 7655 0048 2B88     		ldrh	r3, [r5]
+2401:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
+ 7656              		.loc 1 2401 48 view .LVU2386
+ 7657 004a C3F34013 		ubfx	r3, r3, #5, #1
+2401:Src/main.c    **** 	Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
+ 7658              		.loc 1 2401 22 view .LVU2387
+ 7659 004e 6371     		strb	r3, [r4, #5]
+2402:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
+ 7660              		.loc 1 2402 2 is_stmt 1 view .LVU2388
+2402:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
+ 7661              		.loc 1 2402 36 is_stmt 0 view .LVU2389
+ 7662 0050 2B88     		ldrh	r3, [r5]
+2402:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
+ 7663              		.loc 1 2402 48 view .LVU2390
+ 7664 0052 C3F38013 		ubfx	r3, r3, #6, #1
+2402:Src/main.c    **** 	Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
+ 7665              		.loc 1 2402 22 view .LVU2391
+ 7666 0056 A371     		strb	r3, [r4, #6]
+2403:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
+ 7667              		.loc 1 2403 2 is_stmt 1 view .LVU2392
+2403:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
+ 7668              		.loc 1 2403 36 is_stmt 0 view .LVU2393
+ 7669 0058 2B88     		ldrh	r3, [r5]
+2403:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
+ 7670              		.loc 1 2403 48 view .LVU2394
+ 7671 005a C3F3C013 		ubfx	r3, r3, #7, #1
+2403:Src/main.c    **** 	Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
+ 7672              		.loc 1 2403 22 view .LVU2395
+ 7673 005e E371     		strb	r3, [r4, #7]
+2404:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
+ 7674              		.loc 1 2404 2 is_stmt 1 view .LVU2396
+2404:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
+ 7675              		.loc 1 2404 36 is_stmt 0 view .LVU2397
+ 7676 0060 2B88     		ldrh	r3, [r5]
+2404:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
+ 7677              		.loc 1 2404 48 view .LVU2398
+ 7678 0062 C3F30023 		ubfx	r3, r3, #8, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 523
 
 
-2247:Src/main.c    **** 	temp2++;
- 7157              		.loc 1 2247 30 view .LVU2284
- 7158 00c0 C7ED027A 		vstr.32	s15, [r7, #8]
-2248:Src/main.c    **** 	LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 7159              		.loc 1 2248 2 is_stmt 1 view .LVU2285
- 7160              	.LVL663:
-2249:Src/main.c    **** 	temp2++;
- 7161              		.loc 1 2249 2 view .LVU2286
-2249:Src/main.c    **** 	temp2++;
- 7162              		.loc 1 2249 51 is_stmt 0 view .LVU2287
- 7163 00c4 2B8A     		ldrh	r3, [r5, #16]
- 7164 00c6 07EE903A 		vmov	s15, r3	@ int
-2249:Src/main.c    **** 	temp2++;
- 7165              		.loc 1 2249 32 view .LVU2288
- 7166 00ca F8EE677A 		vcvt.f32.u32	s15, s15
-2249:Src/main.c    **** 	temp2++;
- 7167              		.loc 1 2249 59 view .LVU2289
- 7168 00ce 67EE877A 		vmul.f32	s15, s15, s14
-2249:Src/main.c    **** 	temp2++;
- 7169              		.loc 1 2249 30 view .LVU2290
- 7170 00d2 C6ED017A 		vstr.32	s15, [r6, #4]
-2250:Src/main.c    **** 	LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 7171              		.loc 1 2250 2 is_stmt 1 view .LVU2291
- 7172              	.LVL664:
-2251:Src/main.c    **** 	temp2++;
- 7173              		.loc 1 2251 2 view .LVU2292
-2251:Src/main.c    **** 	temp2++;
- 7174              		.loc 1 2251 51 is_stmt 0 view .LVU2293
- 7175 00d6 6B8A     		ldrh	r3, [r5, #18]
- 7176 00d8 07EE903A 		vmov	s15, r3	@ int
-2251:Src/main.c    **** 	temp2++;
- 7177              		.loc 1 2251 32 view .LVU2294
- 7178 00dc F8EE677A 		vcvt.f32.u32	s15, s15
-2251:Src/main.c    **** 	temp2++;
- 7179              		.loc 1 2251 59 view .LVU2295
- 7180 00e0 67EE877A 		vmul.f32	s15, s15, s14
-2251:Src/main.c    **** 	temp2++;
- 7181              		.loc 1 2251 30 view .LVU2296
- 7182 00e4 C6ED027A 		vstr.32	s15, [r6, #8]
-2252:Src/main.c    **** 	Long_Data[13] = (uint16_t)(*temp2);//Message ID
- 7183              		.loc 1 2252 2 is_stmt 1 view .LVU2297
- 7184              	.LVL665:
-2253:Src/main.c    **** 	temp2++;
- 7185              		.loc 1 2253 2 view .LVU2298
-2253:Src/main.c    **** 	temp2++;
- 7186              		.loc 1 2253 18 is_stmt 0 view .LVU2299
- 7187 00e8 AA8A     		ldrh	r2, [r5, #20]
-2253:Src/main.c    **** 	temp2++;
- 7188              		.loc 1 2253 16 view .LVU2300
- 7189 00ea 7B4B     		ldr	r3, .L382+12
- 7190 00ec 5A83     		strh	r2, [r3, #26]	@ movhi
-2254:Src/main.c    **** 	LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
- 7191              		.loc 1 2254 2 is_stmt 1 view .LVU2301
- 7192              	.LVL666:
-2255:Src/main.c    **** 	temp2++;
- 7193              		.loc 1 2255 2 view .LVU2302
-2255:Src/main.c    **** 	temp2++;
-ARM GAS  /tmp/ccwR4KB7.s 			page 508
+2404:Src/main.c    **** 	Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
+ 7679              		.loc 1 2404 22 view .LVU2399
+ 7680 0066 2372     		strb	r3, [r4, #8]
+2405:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
+ 7681              		.loc 1 2405 2 is_stmt 1 view .LVU2400
+2405:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
+ 7682              		.loc 1 2405 35 is_stmt 0 view .LVU2401
+ 7683 0068 2B88     		ldrh	r3, [r5]
+2405:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
+ 7684              		.loc 1 2405 47 view .LVU2402
+ 7685 006a C3F34023 		ubfx	r3, r3, #9, #1
+2405:Src/main.c    **** 	Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
+ 7686              		.loc 1 2405 21 view .LVU2403
+ 7687 006e 6372     		strb	r3, [r4, #9]
+2406:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
+ 7688              		.loc 1 2406 2 is_stmt 1 view .LVU2404
+2406:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
+ 7689              		.loc 1 2406 35 is_stmt 0 view .LVU2405
+ 7690 0070 2B88     		ldrh	r3, [r5]
+2406:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
+ 7691              		.loc 1 2406 48 view .LVU2406
+ 7692 0072 C3F38023 		ubfx	r3, r3, #10, #1
+2406:Src/main.c    **** 	Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
+ 7693              		.loc 1 2406 21 view .LVU2407
+ 7694 0076 A372     		strb	r3, [r4, #10]
+2407:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
+ 7695              		.loc 1 2407 2 is_stmt 1 view .LVU2408
+2407:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
+ 7696              		.loc 1 2407 34 is_stmt 0 view .LVU2409
+ 7697 0078 2B88     		ldrh	r3, [r5]
+2407:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
+ 7698              		.loc 1 2407 47 view .LVU2410
+ 7699 007a C3F3C023 		ubfx	r3, r3, #11, #1
+2407:Src/main.c    **** 	Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
+ 7700              		.loc 1 2407 20 view .LVU2411
+ 7701 007e E372     		strb	r3, [r4, #11]
+2408:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
+ 7702              		.loc 1 2408 2 is_stmt 1 view .LVU2412
+2408:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
+ 7703              		.loc 1 2408 35 is_stmt 0 view .LVU2413
+ 7704 0080 2B88     		ldrh	r3, [r5]
+2408:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
+ 7705              		.loc 1 2408 48 view .LVU2414
+ 7706 0082 C3F30033 		ubfx	r3, r3, #12, #1
+2408:Src/main.c    **** 	Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
+ 7707              		.loc 1 2408 21 view .LVU2415
+ 7708 0086 2373     		strb	r3, [r4, #12]
+2409:Src/main.c    **** 	
+ 7709              		.loc 1 2409 2 is_stmt 1 view .LVU2416
+2409:Src/main.c    **** 	
+ 7710              		.loc 1 2409 35 is_stmt 0 view .LVU2417
+ 7711 0088 2B88     		ldrh	r3, [r5]
+2409:Src/main.c    **** 	
+ 7712              		.loc 1 2409 48 view .LVU2418
+ 7713 008a C3F34033 		ubfx	r3, r3, #13, #1
+2409:Src/main.c    **** 	
+ 7714              		.loc 1 2409 21 view .LVU2419
+ARM GAS  /tmp/ccEQxcUB.s 			page 524
 
 
- 7194              		.loc 1 2255 28 is_stmt 0 view .LVU2303
- 7195 00ee EB8A     		ldrh	r3, [r5, #22]
-2255:Src/main.c    **** 	temp2++;
- 7196              		.loc 1 2255 26 view .LVU2304
- 7197 00f0 BB81     		strh	r3, [r7, #12]	@ movhi
-2256:Src/main.c    **** 	LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
- 7198              		.loc 1 2256 2 is_stmt 1 view .LVU2305
- 7199              	.LVL667:
-2257:Src/main.c    **** 	temp2++;
- 7200              		.loc 1 2257 2 view .LVU2306
-2257:Src/main.c    **** 	temp2++;
- 7201              		.loc 1 2257 28 is_stmt 0 view .LVU2307
- 7202 00f2 2B8B     		ldrh	r3, [r5, #24]
-2257:Src/main.c    **** 	temp2++;
- 7203              		.loc 1 2257 26 view .LVU2308
- 7204 00f4 B381     		strh	r3, [r6, #12]	@ movhi
-2258:Src/main.c    **** 	
- 7205              		.loc 1 2258 2 is_stmt 1 view .LVU2309
- 7206              	.LVL668:
-2260:Src/main.c    **** 	{
- 7207              		.loc 1 2260 2 view .LVU2310
-2260:Src/main.c    **** 	{
- 7208              		.loc 1 2260 16 is_stmt 0 view .LVU2311
- 7209 00f6 6378     		ldrb	r3, [r4, #1]	@ zero_extendqisi2
-2260:Src/main.c    **** 	{
- 7210              		.loc 1 2260 5 view .LVU2312
- 7211 00f8 002B     		cmp	r3, #0
- 7212 00fa 00F09580 		beq	.L360
-2262:Src/main.c    **** 	}
- 7213              		.loc 1 2262 3 is_stmt 1 view .LVU2313
- 7214 00fe 0122     		movs	r2, #1
- 7215 0100 0821     		movs	r1, #8
- 7216 0102 7648     		ldr	r0, .L382+16
- 7217 0104 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7218              	.LVL669:
- 7219              	.L361:
-2269:Src/main.c    **** 	{
- 7220              		.loc 1 2269 2 view .LVU2314
-2269:Src/main.c    **** 	{
- 7221              		.loc 1 2269 16 is_stmt 0 view .LVU2315
- 7222 0108 A378     		ldrb	r3, [r4, #2]	@ zero_extendqisi2
-2269:Src/main.c    **** 	{
- 7223              		.loc 1 2269 5 view .LVU2316
- 7224 010a 002B     		cmp	r3, #0
- 7225 010c 00F09280 		beq	.L362
-2271:Src/main.c    **** 	}
- 7226              		.loc 1 2271 3 is_stmt 1 view .LVU2317
- 7227 0110 0122     		movs	r2, #1
- 7228 0112 0421     		movs	r1, #4
- 7229 0114 7148     		ldr	r0, .L382+16
- 7230 0116 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7231              	.LVL670:
- 7232              	.L363:
-2278:Src/main.c    **** 	{
- 7233              		.loc 1 2278 2 view .LVU2318
-2278:Src/main.c    **** 	{
- 7234              		.loc 1 2278 16 is_stmt 0 view .LVU2319
-ARM GAS  /tmp/ccwR4KB7.s 			page 509
+ 7715 008e 6373     		strb	r3, [r4, #13]
+2411:Src/main.c    **** 	LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
+ 7716              		.loc 1 2411 2 is_stmt 1 view .LVU2420
+ 7717              	.LVL733:
+2412:Src/main.c    **** 	temp2++;
+ 7718              		.loc 1 2412 2 view .LVU2421
+2412:Src/main.c    **** 	temp2++;
+ 7719              		.loc 1 2412 28 is_stmt 0 view .LVU2422
+ 7720 0090 6B88     		ldrh	r3, [r5, #2]
+2412:Src/main.c    **** 	temp2++;
+ 7721              		.loc 1 2412 26 view .LVU2423
+ 7722 0092 3B80     		strh	r3, [r7]	@ movhi
+2413:Src/main.c    **** 	LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
+ 7723              		.loc 1 2413 2 is_stmt 1 view .LVU2424
+ 7724              	.LVL734:
+2414:Src/main.c    **** 	temp2++;
+ 7725              		.loc 1 2414 2 view .LVU2425
+2414:Src/main.c    **** 	temp2++;
+ 7726              		.loc 1 2414 28 is_stmt 0 view .LVU2426
+ 7727 0094 AB88     		ldrh	r3, [r5, #4]
+2414:Src/main.c    **** 	temp2++;
+ 7728              		.loc 1 2414 26 view .LVU2427
+ 7729 0096 3380     		strh	r3, [r6]	@ movhi
+2415:Src/main.c    **** 	temp2++;
+ 7730              		.loc 1 2415 2 is_stmt 1 view .LVU2428
+ 7731              	.LVL735:
+2416:Src/main.c    **** 	temp2++;
+ 7732              		.loc 1 2416 2 view .LVU2429
+2417:Src/main.c    **** 	Curr_setup->AVERAGES = (uint16_t)(*temp2);
+ 7733              		.loc 1 2417 2 view .LVU2430
+2418:Src/main.c    **** 	temp2++;
+ 7734              		.loc 1 2418 2 view .LVU2431
+2418:Src/main.c    **** 	temp2++;
+ 7735              		.loc 1 2418 25 is_stmt 0 view .LVU2432
+ 7736 0098 6B89     		ldrh	r3, [r5, #10]
+2418:Src/main.c    **** 	temp2++;
+ 7737              		.loc 1 2418 23 view .LVU2433
+ 7738 009a E381     		strh	r3, [r4, #14]	@ movhi
+2419:Src/main.c    **** 	LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+ 7739              		.loc 1 2419 2 is_stmt 1 view .LVU2434
+ 7740              	.LVL736:
+2420:Src/main.c    **** 	temp2++;
+ 7741              		.loc 1 2420 2 view .LVU2435
+2420:Src/main.c    **** 	temp2++;
+ 7742              		.loc 1 2420 51 is_stmt 0 view .LVU2436
+ 7743 009c AB89     		ldrh	r3, [r5, #12]
+ 7744 009e 07EE903A 		vmov	s15, r3	@ int
+2420:Src/main.c    **** 	temp2++;
+ 7745              		.loc 1 2420 32 view .LVU2437
+ 7746 00a2 F8EE677A 		vcvt.f32.u32	s15, s15
+2420:Src/main.c    **** 	temp2++;
+ 7747              		.loc 1 2420 59 view .LVU2438
+ 7748 00a6 9FED8B7A 		vldr.32	s14, .L419+8
+ 7749 00aa 67EE877A 		vmul.f32	s15, s15, s14
+2420:Src/main.c    **** 	temp2++;
+ 7750              		.loc 1 2420 30 view .LVU2439
+ 7751 00ae C7ED017A 		vstr.32	s15, [r7, #4]
+ARM GAS  /tmp/ccEQxcUB.s 			page 525
 
 
- 7235 011a E378     		ldrb	r3, [r4, #3]	@ zero_extendqisi2
-2278:Src/main.c    **** 	{
- 7236              		.loc 1 2278 5 view .LVU2320
- 7237 011c 002B     		cmp	r3, #0
- 7238 011e 00F08F80 		beq	.L364
-2280:Src/main.c    **** 		//LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
- 7239              		.loc 1 2280 3 is_stmt 1 view .LVU2321
- 7240 0122 0122     		movs	r2, #1
- 7241 0124 4FF48071 		mov	r1, #256
- 7242 0128 6948     		ldr	r0, .L382+4
- 7243 012a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7244              	.LVL671:
- 7245              	.L365:
-2289:Src/main.c    **** 	{
- 7246              		.loc 1 2289 2 view .LVU2322
-2289:Src/main.c    **** 	{
- 7247              		.loc 1 2289 16 is_stmt 0 view .LVU2323
- 7248 012e 2379     		ldrb	r3, [r4, #4]	@ zero_extendqisi2
-2289:Src/main.c    **** 	{
- 7249              		.loc 1 2289 5 view .LVU2324
- 7250 0130 002B     		cmp	r3, #0
- 7251 0132 00F08C80 		beq	.L366
-2291:Src/main.c    **** 		//LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
- 7252              		.loc 1 2291 3 is_stmt 1 view .LVU2325
- 7253 0136 0122     		movs	r2, #1
- 7254 0138 1021     		movs	r1, #16
- 7255 013a 6848     		ldr	r0, .L382+16
- 7256 013c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7257              	.LVL672:
- 7258              	.L367:
-2300:Src/main.c    **** 	{
- 7259              		.loc 1 2300 2 view .LVU2326
-2300:Src/main.c    **** 	{
- 7260              		.loc 1 2300 16 is_stmt 0 view .LVU2327
- 7261 0140 6379     		ldrb	r3, [r4, #5]	@ zero_extendqisi2
-2300:Src/main.c    **** 	{
- 7262              		.loc 1 2300 5 view .LVU2328
- 7263 0142 002B     		cmp	r3, #0
- 7264 0144 00F08980 		beq	.L368
-2302:Src/main.c    **** 	}
- 7265              		.loc 1 2302 3 is_stmt 1 view .LVU2329
- 7266 0148 0122     		movs	r2, #1
- 7267 014a 4FF48061 		mov	r1, #1024
- 7268 014e 6448     		ldr	r0, .L382+20
- 7269 0150 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7270              	.LVL673:
- 7271              	.L369:
-2309:Src/main.c    **** 	{
- 7272              		.loc 1 2309 2 view .LVU2330
-2309:Src/main.c    **** 	{
- 7273              		.loc 1 2309 16 is_stmt 0 view .LVU2331
- 7274 0154 A379     		ldrb	r3, [r4, #6]	@ zero_extendqisi2
-2309:Src/main.c    **** 	{
- 7275              		.loc 1 2309 5 view .LVU2332
- 7276 0156 002B     		cmp	r3, #0
- 7277 0158 00F08680 		beq	.L370
-2311:Src/main.c    **** 	}
-ARM GAS  /tmp/ccwR4KB7.s 			page 510
+2421:Src/main.c    **** 	LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+ 7752              		.loc 1 2421 2 is_stmt 1 view .LVU2440
+ 7753              	.LVL737:
+2422:Src/main.c    **** 	temp2++;
+ 7754              		.loc 1 2422 2 view .LVU2441
+2422:Src/main.c    **** 	temp2++;
+ 7755              		.loc 1 2422 51 is_stmt 0 view .LVU2442
+ 7756 00b2 EB89     		ldrh	r3, [r5, #14]
+ 7757 00b4 07EE903A 		vmov	s15, r3	@ int
+2422:Src/main.c    **** 	temp2++;
+ 7758              		.loc 1 2422 32 view .LVU2443
+ 7759 00b8 F8EE677A 		vcvt.f32.u32	s15, s15
+2422:Src/main.c    **** 	temp2++;
+ 7760              		.loc 1 2422 59 view .LVU2444
+ 7761 00bc 67EE877A 		vmul.f32	s15, s15, s14
+2422:Src/main.c    **** 	temp2++;
+ 7762              		.loc 1 2422 30 view .LVU2445
+ 7763 00c0 C7ED027A 		vstr.32	s15, [r7, #8]
+2423:Src/main.c    **** 	LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+ 7764              		.loc 1 2423 2 is_stmt 1 view .LVU2446
+ 7765              	.LVL738:
+2424:Src/main.c    **** 	temp2++;
+ 7766              		.loc 1 2424 2 view .LVU2447
+2424:Src/main.c    **** 	temp2++;
+ 7767              		.loc 1 2424 51 is_stmt 0 view .LVU2448
+ 7768 00c4 2B8A     		ldrh	r3, [r5, #16]
+ 7769 00c6 07EE903A 		vmov	s15, r3	@ int
+2424:Src/main.c    **** 	temp2++;
+ 7770              		.loc 1 2424 32 view .LVU2449
+ 7771 00ca F8EE677A 		vcvt.f32.u32	s15, s15
+2424:Src/main.c    **** 	temp2++;
+ 7772              		.loc 1 2424 59 view .LVU2450
+ 7773 00ce 67EE877A 		vmul.f32	s15, s15, s14
+2424:Src/main.c    **** 	temp2++;
+ 7774              		.loc 1 2424 30 view .LVU2451
+ 7775 00d2 C6ED017A 		vstr.32	s15, [r6, #4]
+2425:Src/main.c    **** 	LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
+ 7776              		.loc 1 2425 2 is_stmt 1 view .LVU2452
+ 7777              	.LVL739:
+2426:Src/main.c    **** 	temp2++;
+ 7778              		.loc 1 2426 2 view .LVU2453
+2426:Src/main.c    **** 	temp2++;
+ 7779              		.loc 1 2426 51 is_stmt 0 view .LVU2454
+ 7780 00d6 6B8A     		ldrh	r3, [r5, #18]
+ 7781 00d8 07EE903A 		vmov	s15, r3	@ int
+2426:Src/main.c    **** 	temp2++;
+ 7782              		.loc 1 2426 32 view .LVU2455
+ 7783 00dc F8EE677A 		vcvt.f32.u32	s15, s15
+2426:Src/main.c    **** 	temp2++;
+ 7784              		.loc 1 2426 59 view .LVU2456
+ 7785 00e0 67EE877A 		vmul.f32	s15, s15, s14
+2426:Src/main.c    **** 	temp2++;
+ 7786              		.loc 1 2426 30 view .LVU2457
+ 7787 00e4 C6ED027A 		vstr.32	s15, [r6, #8]
+2427:Src/main.c    **** 	Long_Data[13] = (uint16_t)(*temp2);//Message ID
+ 7788              		.loc 1 2427 2 is_stmt 1 view .LVU2458
+ 7789              	.LVL740:
+ARM GAS  /tmp/ccEQxcUB.s 			page 526
 
 
- 7278              		.loc 1 2311 3 is_stmt 1 view .LVU2333
- 7279 015c 0122     		movs	r2, #1
- 7280 015e 0821     		movs	r1, #8
- 7281 0160 6048     		ldr	r0, .L382+24
- 7282 0162 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7283              	.LVL674:
- 7284              	.L371:
-2318:Src/main.c    **** 	{
- 7285              		.loc 1 2318 2 view .LVU2334
-2318:Src/main.c    **** 	{
- 7286              		.loc 1 2318 17 is_stmt 0 view .LVU2335
- 7287 0166 637A     		ldrb	r3, [r4, #9]	@ zero_extendqisi2
-2318:Src/main.c    **** 	{
- 7288              		.loc 1 2318 5 view .LVU2336
- 7289 0168 1BB1     		cbz	r3, .L372
-2318:Src/main.c    **** 	{
- 7290              		.loc 1 2318 39 discriminator 1 view .LVU2337
- 7291 016a E379     		ldrb	r3, [r4, #7]	@ zero_extendqisi2
-2318:Src/main.c    **** 	{
- 7292              		.loc 1 2318 26 discriminator 1 view .LVU2338
- 7293 016c 002B     		cmp	r3, #0
- 7294 016e 40F08180 		bne	.L380
- 7295              	.L372:
-2327:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);		
- 7296              		.loc 1 2327 3 is_stmt 1 view .LVU2339
- 7297 0172 0022     		movs	r2, #0
- 7298 0174 0121     		movs	r1, #1
- 7299 0176 5B48     		ldr	r0, .L382+24
- 7300 0178 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7301              	.LVL675:
-2328:Src/main.c    **** 	}
- 7302              		.loc 1 2328 3 view .LVU2340
- 7303 017c 0022     		movs	r2, #0
- 7304 017e 4FF40061 		mov	r1, #2048
- 7305 0182 5748     		ldr	r0, .L382+20
- 7306 0184 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7307              	.LVL676:
- 7308              	.L373:
-2331:Src/main.c    **** 	{
- 7309              		.loc 1 2331 2 view .LVU2341
-2331:Src/main.c    **** 	{
- 7310              		.loc 1 2331 17 is_stmt 0 view .LVU2342
- 7311 0188 A37A     		ldrb	r3, [r4, #10]	@ zero_extendqisi2
-2331:Src/main.c    **** 	{
- 7312              		.loc 1 2331 5 view .LVU2343
- 7313 018a 1BB1     		cbz	r3, .L374
-2331:Src/main.c    **** 	{
- 7314              		.loc 1 2331 39 discriminator 1 view .LVU2344
- 7315 018c 237A     		ldrb	r3, [r4, #8]	@ zero_extendqisi2
-2331:Src/main.c    **** 	{
- 7316              		.loc 1 2331 26 discriminator 1 view .LVU2345
- 7317 018e 002B     		cmp	r3, #0
- 7318 0190 40F08680 		bne	.L381
- 7319              	.L374:
-2340:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);		
- 7320              		.loc 1 2340 3 is_stmt 1 view .LVU2346
- 7321 0194 0022     		movs	r2, #0
-ARM GAS  /tmp/ccwR4KB7.s 			page 511
+2428:Src/main.c    **** 	temp2++;
+ 7790              		.loc 1 2428 2 view .LVU2459
+2428:Src/main.c    **** 	temp2++;
+ 7791              		.loc 1 2428 18 is_stmt 0 view .LVU2460
+ 7792 00e8 AA8A     		ldrh	r2, [r5, #20]
+2428:Src/main.c    **** 	temp2++;
+ 7793              		.loc 1 2428 16 view .LVU2461
+ 7794 00ea 7B4B     		ldr	r3, .L419+12
+ 7795 00ec 5A83     		strh	r2, [r3, #26]	@ movhi
+2429:Src/main.c    **** 	LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
+ 7796              		.loc 1 2429 2 is_stmt 1 view .LVU2462
+ 7797              	.LVL741:
+2430:Src/main.c    **** 	temp2++;
+ 7798              		.loc 1 2430 2 view .LVU2463
+2430:Src/main.c    **** 	temp2++;
+ 7799              		.loc 1 2430 28 is_stmt 0 view .LVU2464
+ 7800 00ee EB8A     		ldrh	r3, [r5, #22]
+2430:Src/main.c    **** 	temp2++;
+ 7801              		.loc 1 2430 26 view .LVU2465
+ 7802 00f0 BB81     		strh	r3, [r7, #12]	@ movhi
+2431:Src/main.c    **** 	LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
+ 7803              		.loc 1 2431 2 is_stmt 1 view .LVU2466
+ 7804              	.LVL742:
+2432:Src/main.c    **** 	temp2++;
+ 7805              		.loc 1 2432 2 view .LVU2467
+2432:Src/main.c    **** 	temp2++;
+ 7806              		.loc 1 2432 28 is_stmt 0 view .LVU2468
+ 7807 00f2 2B8B     		ldrh	r3, [r5, #24]
+2432:Src/main.c    **** 	temp2++;
+ 7808              		.loc 1 2432 26 view .LVU2469
+ 7809 00f4 B381     		strh	r3, [r6, #12]	@ movhi
+2433:Src/main.c    **** 	
+ 7810              		.loc 1 2433 2 is_stmt 1 view .LVU2470
+ 7811              	.LVL743:
+2435:Src/main.c    **** 	{
+ 7812              		.loc 1 2435 2 view .LVU2471
+2435:Src/main.c    **** 	{
+ 7813              		.loc 1 2435 16 is_stmt 0 view .LVU2472
+ 7814 00f6 6378     		ldrb	r3, [r4, #1]	@ zero_extendqisi2
+2435:Src/main.c    **** 	{
+ 7815              		.loc 1 2435 5 view .LVU2473
+ 7816 00f8 002B     		cmp	r3, #0
+ 7817 00fa 00F09580 		beq	.L397
+2437:Src/main.c    **** 	}
+ 7818              		.loc 1 2437 3 is_stmt 1 view .LVU2474
+ 7819 00fe 0122     		movs	r2, #1
+ 7820 0100 0821     		movs	r1, #8
+ 7821 0102 7648     		ldr	r0, .L419+16
+ 7822 0104 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7823              	.LVL744:
+ 7824              	.L398:
+2444:Src/main.c    **** 	{
+ 7825              		.loc 1 2444 2 view .LVU2475
+2444:Src/main.c    **** 	{
+ 7826              		.loc 1 2444 16 is_stmt 0 view .LVU2476
+ 7827 0108 A378     		ldrb	r3, [r4, #2]	@ zero_extendqisi2
+2444:Src/main.c    **** 	{
+ARM GAS  /tmp/ccEQxcUB.s 			page 527
 
 
- 7322 0196 0221     		movs	r1, #2
- 7323 0198 5248     		ldr	r0, .L382+24
- 7324 019a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7325              	.LVL677:
-2341:Src/main.c    **** 	}
- 7326              		.loc 1 2341 3 view .LVU2347
- 7327 019e 0022     		movs	r2, #0
- 7328 01a0 2021     		movs	r1, #32
- 7329 01a2 4E48     		ldr	r0, .L382+16
- 7330 01a4 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7331              	.LVL678:
- 7332              	.L375:
-2344:Src/main.c    **** 	{
- 7333              		.loc 1 2344 2 view .LVU2348
-2344:Src/main.c    **** 	{
- 7334              		.loc 1 2344 16 is_stmt 0 view .LVU2349
- 7335 01a8 237B     		ldrb	r3, [r4, #12]	@ zero_extendqisi2
-2344:Src/main.c    **** 	{
- 7336              		.loc 1 2344 5 view .LVU2350
- 7337 01aa 1BB9     		cbnz	r3, .L376
-2346:Src/main.c    **** 		LD1_curr_setup->I_coef_temp = 0.01;
- 7338              		.loc 1 2346 3 is_stmt 1 view .LVU2351
-2346:Src/main.c    **** 		LD1_curr_setup->I_coef_temp = 0.01;
- 7339              		.loc 1 2346 31 is_stmt 0 view .LVU2352
- 7340 01ac 4E4B     		ldr	r3, .L382+28
- 7341 01ae 7B60     		str	r3, [r7, #4]	@ float
-2347:Src/main.c    **** 	}
- 7342              		.loc 1 2347 3 is_stmt 1 view .LVU2353
-2347:Src/main.c    **** 	}
- 7343              		.loc 1 2347 31 is_stmt 0 view .LVU2354
- 7344 01b0 4E4B     		ldr	r3, .L382+32
- 7345 01b2 BB60     		str	r3, [r7, #8]	@ float
- 7346              	.L376:
-2350:Src/main.c    **** 	{
- 7347              		.loc 1 2350 2 is_stmt 1 view .LVU2355
-2350:Src/main.c    **** 	{
- 7348              		.loc 1 2350 16 is_stmt 0 view .LVU2356
- 7349 01b4 637B     		ldrb	r3, [r4, #13]	@ zero_extendqisi2
-2350:Src/main.c    **** 	{
- 7350              		.loc 1 2350 5 view .LVU2357
- 7351 01b6 1BB9     		cbnz	r3, .L358
-2352:Src/main.c    **** 		LD2_curr_setup->I_coef_temp = 0.01;
- 7352              		.loc 1 2352 3 is_stmt 1 view .LVU2358
-2352:Src/main.c    **** 		LD2_curr_setup->I_coef_temp = 0.01;
- 7353              		.loc 1 2352 31 is_stmt 0 view .LVU2359
- 7354 01b8 4B4B     		ldr	r3, .L382+28
- 7355 01ba 7360     		str	r3, [r6, #4]	@ float
-2353:Src/main.c    **** 	}
- 7356              		.loc 1 2353 3 is_stmt 1 view .LVU2360
-2353:Src/main.c    **** 	}
- 7357              		.loc 1 2353 31 is_stmt 0 view .LVU2361
- 7358 01bc 4B4B     		ldr	r3, .L382+32
- 7359 01be B360     		str	r3, [r6, #8]	@ float
- 7360              	.L358:
-2355:Src/main.c    **** 
- 7361              		.loc 1 2355 1 view .LVU2362
- 7362 01c0 BDE8F883 		pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-ARM GAS  /tmp/ccwR4KB7.s 			page 512
+ 7828              		.loc 1 2444 5 view .LVU2477
+ 7829 010a 002B     		cmp	r3, #0
+ 7830 010c 00F09280 		beq	.L399
+2446:Src/main.c    **** 	}
+ 7831              		.loc 1 2446 3 is_stmt 1 view .LVU2478
+ 7832 0110 0122     		movs	r2, #1
+ 7833 0112 8021     		movs	r1, #128
+ 7834 0114 7148     		ldr	r0, .L419+16
+ 7835 0116 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7836              	.LVL745:
+ 7837              	.L400:
+2453:Src/main.c    **** 	{
+ 7838              		.loc 1 2453 2 view .LVU2479
+2453:Src/main.c    **** 	{
+ 7839              		.loc 1 2453 16 is_stmt 0 view .LVU2480
+ 7840 011a E378     		ldrb	r3, [r4, #3]	@ zero_extendqisi2
+2453:Src/main.c    **** 	{
+ 7841              		.loc 1 2453 5 view .LVU2481
+ 7842 011c 002B     		cmp	r3, #0
+ 7843 011e 00F08F80 		beq	.L401
+2455:Src/main.c    **** 		//LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
+ 7844              		.loc 1 2455 3 is_stmt 1 view .LVU2482
+ 7845 0122 0122     		movs	r2, #1
+ 7846 0124 4FF48071 		mov	r1, #256
+ 7847 0128 6948     		ldr	r0, .L419+4
+ 7848 012a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7849              	.LVL746:
+ 7850              	.L402:
+2464:Src/main.c    **** 	{
+ 7851              		.loc 1 2464 2 view .LVU2483
+2464:Src/main.c    **** 	{
+ 7852              		.loc 1 2464 16 is_stmt 0 view .LVU2484
+ 7853 012e 2379     		ldrb	r3, [r4, #4]	@ zero_extendqisi2
+2464:Src/main.c    **** 	{
+ 7854              		.loc 1 2464 5 view .LVU2485
+ 7855 0130 002B     		cmp	r3, #0
+ 7856 0132 00F08C80 		beq	.L403
+2466:Src/main.c    **** 		//LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
+ 7857              		.loc 1 2466 3 is_stmt 1 view .LVU2486
+ 7858 0136 0122     		movs	r2, #1
+ 7859 0138 1021     		movs	r1, #16
+ 7860 013a 6848     		ldr	r0, .L419+16
+ 7861 013c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7862              	.LVL747:
+ 7863              	.L404:
+2475:Src/main.c    **** 	{
+ 7864              		.loc 1 2475 2 view .LVU2487
+2475:Src/main.c    **** 	{
+ 7865              		.loc 1 2475 16 is_stmt 0 view .LVU2488
+ 7866 0140 6379     		ldrb	r3, [r4, #5]	@ zero_extendqisi2
+2475:Src/main.c    **** 	{
+ 7867              		.loc 1 2475 5 view .LVU2489
+ 7868 0142 002B     		cmp	r3, #0
+ 7869 0144 00F08980 		beq	.L405
+2477:Src/main.c    **** 	}
+ 7870              		.loc 1 2477 3 is_stmt 1 view .LVU2490
+ 7871 0148 0122     		movs	r2, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 528
 
 
- 7363              	.LVL679:
- 7364              	.L379:
-2206:Src/main.c    **** 	{
- 7365              		.loc 1 2206 6 view .LVU2363
- 7366 01c4 4FF48071 		mov	r1, #256
- 7367 01c8 4648     		ldr	r0, .L382+24
- 7368 01ca FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 7369              	.LVL680:
-2205:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 7370              		.loc 1 2205 78 discriminator 1 view .LVU2364
- 7371 01ce 0128     		cmp	r0, #1
- 7372 01d0 7FF426AF 		bne	.L359
-2208:Src/main.c    **** 		if (test == 0) //0 - suc
- 7373              		.loc 1 2208 3 is_stmt 1 view .LVU2365
-2208:Src/main.c    **** 		if (test == 0) //0 - suc
- 7374              		.loc 1 2208 10 is_stmt 0 view .LVU2366
- 7375 01d4 4648     		ldr	r0, .L382+36
- 7376 01d6 FFF7FEFF 		bl	Mount_SD
- 7377              	.LVL681:
-2208:Src/main.c    **** 		if (test == 0) //0 - suc
- 7378              		.loc 1 2208 8 discriminator 1 view .LVU2367
- 7379 01da 3C4B     		ldr	r3, .L382
- 7380 01dc 1860     		str	r0, [r3]
-2209:Src/main.c    **** 		{
- 7381              		.loc 1 2209 3 is_stmt 1 view .LVU2368
-2209:Src/main.c    **** 		{
- 7382              		.loc 1 2209 6 is_stmt 0 view .LVU2369
- 7383 01de 0028     		cmp	r0, #0
- 7384 01e0 7FF41EAF 		bne	.L359
-2212:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
- 7385              		.loc 1 2212 4 is_stmt 1 view .LVU2370
-2212:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
- 7386              		.loc 1 2212 11 is_stmt 0 view .LVU2371
- 7387 01e4 DFF80C91 		ldr	r9, .L382+40
- 7388 01e8 4846     		mov	r0, r9
- 7389 01ea FFF7FEFF 		bl	Remove_File
- 7390              	.LVL682:
-2212:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
- 7391              		.loc 1 2212 9 discriminator 1 view .LVU2372
- 7392 01ee DFF8DC80 		ldr	r8, .L382
- 7393 01f2 C8F80000 		str	r0, [r8]
-2213:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 7394              		.loc 1 2213 4 is_stmt 1 view .LVU2373
-2213:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 7395              		.loc 1 2213 11 is_stmt 0 view .LVU2374
- 7396 01f6 4846     		mov	r0, r9
- 7397 01f8 FFF7FEFF 		bl	Create_File
- 7398              	.LVL683:
-2213:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 7399              		.loc 1 2213 9 discriminator 1 view .LVU2375
- 7400 01fc C8F80000 		str	r0, [r8]
-2214:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 7401              		.loc 1 2214 4 is_stmt 1 view .LVU2376
-2214:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 7402              		.loc 1 2214 11 is_stmt 0 view .LVU2377
- 7403 0200 1E22     		movs	r2, #30
- 7404 0202 2946     		mov	r1, r5
-ARM GAS  /tmp/ccwR4KB7.s 			page 513
+ 7872 014a 4FF48061 		mov	r1, #1024
+ 7873 014e 6448     		ldr	r0, .L419+20
+ 7874 0150 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7875              	.LVL748:
+ 7876              	.L406:
+2484:Src/main.c    **** 	{
+ 7877              		.loc 1 2484 2 view .LVU2491
+2484:Src/main.c    **** 	{
+ 7878              		.loc 1 2484 16 is_stmt 0 view .LVU2492
+ 7879 0154 A379     		ldrb	r3, [r4, #6]	@ zero_extendqisi2
+2484:Src/main.c    **** 	{
+ 7880              		.loc 1 2484 5 view .LVU2493
+ 7881 0156 002B     		cmp	r3, #0
+ 7882 0158 00F08680 		beq	.L407
+2486:Src/main.c    **** 	}
+ 7883              		.loc 1 2486 3 is_stmt 1 view .LVU2494
+ 7884 015c 0122     		movs	r2, #1
+ 7885 015e 0821     		movs	r1, #8
+ 7886 0160 6048     		ldr	r0, .L419+24
+ 7887 0162 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7888              	.LVL749:
+ 7889              	.L408:
+2493:Src/main.c    **** 	{
+ 7890              		.loc 1 2493 2 view .LVU2495
+2493:Src/main.c    **** 	{
+ 7891              		.loc 1 2493 17 is_stmt 0 view .LVU2496
+ 7892 0166 637A     		ldrb	r3, [r4, #9]	@ zero_extendqisi2
+2493:Src/main.c    **** 	{
+ 7893              		.loc 1 2493 5 view .LVU2497
+ 7894 0168 1BB1     		cbz	r3, .L409
+2493:Src/main.c    **** 	{
+ 7895              		.loc 1 2493 39 discriminator 1 view .LVU2498
+ 7896 016a E379     		ldrb	r3, [r4, #7]	@ zero_extendqisi2
+2493:Src/main.c    **** 	{
+ 7897              		.loc 1 2493 26 discriminator 1 view .LVU2499
+ 7898 016c 002B     		cmp	r3, #0
+ 7899 016e 40F08180 		bne	.L417
+ 7900              	.L409:
+2502:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);		
+ 7901              		.loc 1 2502 3 is_stmt 1 view .LVU2500
+ 7902 0172 0022     		movs	r2, #0
+ 7903 0174 0121     		movs	r1, #1
+ 7904 0176 5B48     		ldr	r0, .L419+24
+ 7905 0178 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7906              	.LVL750:
+2503:Src/main.c    **** 	}
+ 7907              		.loc 1 2503 3 view .LVU2501
+ 7908 017c 0022     		movs	r2, #0
+ 7909 017e 4FF40061 		mov	r1, #2048
+ 7910 0182 5748     		ldr	r0, .L419+20
+ 7911 0184 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7912              	.LVL751:
+ 7913              	.L410:
+2506:Src/main.c    **** 	{
+ 7914              		.loc 1 2506 2 view .LVU2502
+2506:Src/main.c    **** 	{
+ 7915              		.loc 1 2506 17 is_stmt 0 view .LVU2503
+ARM GAS  /tmp/ccEQxcUB.s 			page 529
 
 
- 7405 0204 4846     		mov	r0, r9
- 7406 0206 FFF7FEFF 		bl	Write_File_byte
- 7407              	.LVL684:
-2214:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 7408              		.loc 1 2214 9 discriminator 1 view .LVU2378
- 7409 020a C8F80000 		str	r0, [r8]
-2215:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
- 7410              		.loc 1 2215 4 is_stmt 1 view .LVU2379
-2215:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
- 7411              		.loc 1 2215 11 is_stmt 0 view .LVU2380
- 7412 020e 1E22     		movs	r2, #30
- 7413 0210 2946     		mov	r1, r5
- 7414 0212 4846     		mov	r0, r9
- 7415 0214 FFF7FEFF 		bl	Update_File_byte
- 7416              	.LVL685:
-2215:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
- 7417              		.loc 1 2215 9 discriminator 1 view .LVU2381
- 7418 0218 C8F80000 		str	r0, [r8]
-2216:Src/main.c    **** 		}
- 7419              		.loc 1 2216 4 is_stmt 1 view .LVU2382
-2216:Src/main.c    **** 		}
- 7420              		.loc 1 2216 11 is_stmt 0 view .LVU2383
- 7421 021c 3448     		ldr	r0, .L382+36
- 7422 021e FFF7FEFF 		bl	Unmount_SD
- 7423              	.LVL686:
-2216:Src/main.c    **** 		}
- 7424              		.loc 1 2216 9 discriminator 1 view .LVU2384
- 7425 0222 C8F80000 		str	r0, [r8]
- 7426 0226 FBE6     		b	.L359
- 7427              	.LVL687:
- 7428              	.L360:
-2266:Src/main.c    **** 	}
- 7429              		.loc 1 2266 3 is_stmt 1 view .LVU2385
- 7430 0228 0022     		movs	r2, #0
- 7431 022a 0821     		movs	r1, #8
- 7432 022c 2B48     		ldr	r0, .L382+16
- 7433 022e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7434              	.LVL688:
- 7435 0232 69E7     		b	.L361
- 7436              	.L362:
-2275:Src/main.c    **** 	}
- 7437              		.loc 1 2275 3 view .LVU2386
- 7438 0234 0022     		movs	r2, #0
- 7439 0236 0421     		movs	r1, #4
- 7440 0238 2848     		ldr	r0, .L382+16
- 7441 023a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7442              	.LVL689:
- 7443 023e 6CE7     		b	.L363
- 7444              	.L364:
-2285:Src/main.c    **** 		//LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
- 7445              		.loc 1 2285 3 view .LVU2387
- 7446 0240 0022     		movs	r2, #0
- 7447 0242 4FF48071 		mov	r1, #256
- 7448 0246 2248     		ldr	r0, .L382+4
- 7449 0248 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7450              	.LVL690:
- 7451 024c 6FE7     		b	.L365
-ARM GAS  /tmp/ccwR4KB7.s 			page 514
+ 7916 0188 A37A     		ldrb	r3, [r4, #10]	@ zero_extendqisi2
+2506:Src/main.c    **** 	{
+ 7917              		.loc 1 2506 5 view .LVU2504
+ 7918 018a 1BB1     		cbz	r3, .L411
+2506:Src/main.c    **** 	{
+ 7919              		.loc 1 2506 39 discriminator 1 view .LVU2505
+ 7920 018c 237A     		ldrb	r3, [r4, #8]	@ zero_extendqisi2
+2506:Src/main.c    **** 	{
+ 7921              		.loc 1 2506 26 discriminator 1 view .LVU2506
+ 7922 018e 002B     		cmp	r3, #0
+ 7923 0190 40F08680 		bne	.L418
+ 7924              	.L411:
+2515:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);		
+ 7925              		.loc 1 2515 3 is_stmt 1 view .LVU2507
+ 7926 0194 0022     		movs	r2, #0
+ 7927 0196 0221     		movs	r1, #2
+ 7928 0198 5248     		ldr	r0, .L419+24
+ 7929 019a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7930              	.LVL752:
+2516:Src/main.c    **** 	}
+ 7931              		.loc 1 2516 3 view .LVU2508
+ 7932 019e 0022     		movs	r2, #0
+ 7933 01a0 2021     		movs	r1, #32
+ 7934 01a2 4E48     		ldr	r0, .L419+16
+ 7935 01a4 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 7936              	.LVL753:
+ 7937              	.L412:
+2519:Src/main.c    **** 	{
+ 7938              		.loc 1 2519 2 view .LVU2509
+2519:Src/main.c    **** 	{
+ 7939              		.loc 1 2519 16 is_stmt 0 view .LVU2510
+ 7940 01a8 237B     		ldrb	r3, [r4, #12]	@ zero_extendqisi2
+2519:Src/main.c    **** 	{
+ 7941              		.loc 1 2519 5 view .LVU2511
+ 7942 01aa 1BB9     		cbnz	r3, .L413
+2521:Src/main.c    **** 		LD1_curr_setup->I_coef_temp = 0.01;
+ 7943              		.loc 1 2521 3 is_stmt 1 view .LVU2512
+2521:Src/main.c    **** 		LD1_curr_setup->I_coef_temp = 0.01;
+ 7944              		.loc 1 2521 31 is_stmt 0 view .LVU2513
+ 7945 01ac 4E4B     		ldr	r3, .L419+28
+ 7946 01ae 7B60     		str	r3, [r7, #4]	@ float
+2522:Src/main.c    **** 	}
+ 7947              		.loc 1 2522 3 is_stmt 1 view .LVU2514
+2522:Src/main.c    **** 	}
+ 7948              		.loc 1 2522 31 is_stmt 0 view .LVU2515
+ 7949 01b0 4E4B     		ldr	r3, .L419+32
+ 7950 01b2 BB60     		str	r3, [r7, #8]	@ float
+ 7951              	.L413:
+2525:Src/main.c    **** 	{
+ 7952              		.loc 1 2525 2 is_stmt 1 view .LVU2516
+2525:Src/main.c    **** 	{
+ 7953              		.loc 1 2525 16 is_stmt 0 view .LVU2517
+ 7954 01b4 637B     		ldrb	r3, [r4, #13]	@ zero_extendqisi2
+2525:Src/main.c    **** 	{
+ 7955              		.loc 1 2525 5 view .LVU2518
+ 7956 01b6 1BB9     		cbnz	r3, .L395
+2527:Src/main.c    **** 		LD2_curr_setup->I_coef_temp = 0.01;
+ARM GAS  /tmp/ccEQxcUB.s 			page 530
 
 
- 7452              	.L366:
-2296:Src/main.c    **** 		//LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
- 7453              		.loc 1 2296 3 view .LVU2388
- 7454 024e 0022     		movs	r2, #0
- 7455 0250 1021     		movs	r1, #16
- 7456 0252 2248     		ldr	r0, .L382+16
- 7457 0254 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7458              	.LVL691:
- 7459 0258 72E7     		b	.L367
- 7460              	.L368:
-2306:Src/main.c    **** 	}
- 7461              		.loc 1 2306 3 view .LVU2389
- 7462 025a 0022     		movs	r2, #0
- 7463 025c 4FF48061 		mov	r1, #1024
- 7464 0260 1F48     		ldr	r0, .L382+20
- 7465 0262 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7466              	.LVL692:
- 7467 0266 75E7     		b	.L369
- 7468              	.L370:
-2315:Src/main.c    **** 	}
- 7469              		.loc 1 2315 3 view .LVU2390
- 7470 0268 0022     		movs	r2, #0
- 7471 026a 0821     		movs	r1, #8
- 7472 026c 1D48     		ldr	r0, .L382+24
- 7473 026e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7474              	.LVL693:
- 7475 0272 78E7     		b	.L371
- 7476              	.L380:
-2320:Src/main.c    **** 		Set_LTEC(3,32767);
- 7477              		.loc 1 2320 3 view .LVU2391
- 7478 0274 47F6FF71 		movw	r1, #32767
- 7479 0278 0320     		movs	r0, #3
- 7480 027a FFF7FEFF 		bl	Set_LTEC
- 7481              	.LVL694:
-2321:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
- 7482              		.loc 1 2321 3 view .LVU2392
- 7483 027e 47F6FF71 		movw	r1, #32767
- 7484 0282 0320     		movs	r0, #3
- 7485 0284 FFF7FEFF 		bl	Set_LTEC
- 7486              	.LVL695:
-2322:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
- 7487              		.loc 1 2322 3 view .LVU2393
- 7488 0288 0122     		movs	r2, #1
- 7489 028a 4FF40061 		mov	r1, #2048
- 7490 028e 1448     		ldr	r0, .L382+20
- 7491 0290 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7492              	.LVL696:
-2323:Src/main.c    **** 	}
- 7493              		.loc 1 2323 3 view .LVU2394
- 7494 0294 0122     		movs	r2, #1
- 7495 0296 1146     		mov	r1, r2
- 7496 0298 1248     		ldr	r0, .L382+24
- 7497 029a FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7498              	.LVL697:
- 7499 029e 73E7     		b	.L373
- 7500              	.L381:
-2333:Src/main.c    **** 		Set_LTEC(4,32767);
-ARM GAS  /tmp/ccwR4KB7.s 			page 515
+ 7957              		.loc 1 2527 3 is_stmt 1 view .LVU2519
+2527:Src/main.c    **** 		LD2_curr_setup->I_coef_temp = 0.01;
+ 7958              		.loc 1 2527 31 is_stmt 0 view .LVU2520
+ 7959 01b8 4B4B     		ldr	r3, .L419+28
+ 7960 01ba 7360     		str	r3, [r6, #4]	@ float
+2528:Src/main.c    **** 	}
+ 7961              		.loc 1 2528 3 is_stmt 1 view .LVU2521
+2528:Src/main.c    **** 	}
+ 7962              		.loc 1 2528 31 is_stmt 0 view .LVU2522
+ 7963 01bc 4B4B     		ldr	r3, .L419+32
+ 7964 01be B360     		str	r3, [r6, #8]	@ float
+ 7965              	.L395:
+2530:Src/main.c    **** 
+ 7966              		.loc 1 2530 1 view .LVU2523
+ 7967 01c0 BDE8F883 		pop	{r3, r4, r5, r6, r7, r8, r9, pc}
+ 7968              	.LVL754:
+ 7969              	.L416:
+2381:Src/main.c    **** 	{
+ 7970              		.loc 1 2381 6 view .LVU2524
+ 7971 01c4 4FF48071 		mov	r1, #256
+ 7972 01c8 4648     		ldr	r0, .L419+24
+ 7973 01ca FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 7974              	.LVL755:
+2380:Src/main.c    **** 		  (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
+ 7975              		.loc 1 2380 78 discriminator 1 view .LVU2525
+ 7976 01ce 0128     		cmp	r0, #1
+ 7977 01d0 7FF426AF 		bne	.L396
+2383:Src/main.c    **** 		if (test == 0) //0 - suc
+ 7978              		.loc 1 2383 3 is_stmt 1 view .LVU2526
+2383:Src/main.c    **** 		if (test == 0) //0 - suc
+ 7979              		.loc 1 2383 10 is_stmt 0 view .LVU2527
+ 7980 01d4 4648     		ldr	r0, .L419+36
+ 7981 01d6 FFF7FEFF 		bl	Mount_SD
+ 7982              	.LVL756:
+2383:Src/main.c    **** 		if (test == 0) //0 - suc
+ 7983              		.loc 1 2383 8 discriminator 1 view .LVU2528
+ 7984 01da 3C4B     		ldr	r3, .L419
+ 7985 01dc 1860     		str	r0, [r3]
+2384:Src/main.c    **** 		{
+ 7986              		.loc 1 2384 3 is_stmt 1 view .LVU2529
+2384:Src/main.c    **** 		{
+ 7987              		.loc 1 2384 6 is_stmt 0 view .LVU2530
+ 7988 01de 0028     		cmp	r0, #0
+ 7989 01e0 7FF41EAF 		bne	.L396
+2387:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
+ 7990              		.loc 1 2387 4 is_stmt 1 view .LVU2531
+2387:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
+ 7991              		.loc 1 2387 11 is_stmt 0 view .LVU2532
+ 7992 01e4 DFF80C91 		ldr	r9, .L419+40
+ 7993 01e8 4846     		mov	r0, r9
+ 7994 01ea FFF7FEFF 		bl	Remove_File
+ 7995              	.LVL757:
+2387:Src/main.c    **** 			test = Create_File("COMMAND.TXT"); // 0 -succ
+ 7996              		.loc 1 2387 9 discriminator 1 view .LVU2533
+ 7997 01ee DFF8DC80 		ldr	r8, .L419
+ 7998 01f2 C8F80000 		str	r0, [r8]
+2388:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+ARM GAS  /tmp/ccEQxcUB.s 			page 531
 
 
- 7501              		.loc 1 2333 3 view .LVU2395
- 7502 02a0 47F6FF71 		movw	r1, #32767
- 7503 02a4 0420     		movs	r0, #4
- 7504 02a6 FFF7FEFF 		bl	Set_LTEC
- 7505              	.LVL698:
-2334:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
- 7506              		.loc 1 2334 3 view .LVU2396
- 7507 02aa 47F6FF71 		movw	r1, #32767
- 7508 02ae 0420     		movs	r0, #4
- 7509 02b0 FFF7FEFF 		bl	Set_LTEC
- 7510              	.LVL699:
-2335:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
- 7511              		.loc 1 2335 3 view .LVU2397
- 7512 02b4 0122     		movs	r2, #1
- 7513 02b6 2021     		movs	r1, #32
- 7514 02b8 0848     		ldr	r0, .L382+16
- 7515 02ba FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7516              	.LVL700:
-2336:Src/main.c    **** 	}
- 7517              		.loc 1 2336 3 view .LVU2398
- 7518 02be 0122     		movs	r2, #1
- 7519 02c0 0221     		movs	r1, #2
- 7520 02c2 0848     		ldr	r0, .L382+24
- 7521 02c4 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 7522              	.LVL701:
- 7523 02c8 6EE7     		b	.L375
- 7524              	.L383:
- 7525 02ca 00BF     		.align	2
- 7526              	.L382:
- 7527 02cc 00000000 		.word	test
- 7528 02d0 000C0240 		.word	1073875968
- 7529 02d4 0000803B 		.word	998244352
- 7530 02d8 00000000 		.word	Long_Data
- 7531 02dc 00080240 		.word	1073874944
- 7532 02e0 00040240 		.word	1073873920
- 7533 02e4 00000240 		.word	1073872896
- 7534 02e8 00002041 		.word	1092616192
- 7535 02ec 0AD7233C 		.word	1008981770
- 7536 02f0 00000000 		.word	.LC0
- 7537 02f4 04000000 		.word	.LC1
- 7538              		.cfi_endproc
- 7539              	.LFE1208:
- 7541              		.section	.text.Advanced_Controller_Temp,"ax",%progbits
- 7542              		.align	1
- 7543              		.global	Advanced_Controller_Temp
- 7544              		.syntax unified
- 7545              		.thumb
- 7546              		.thumb_func
- 7548              	Advanced_Controller_Temp:
- 7549              	.LVL702:
- 7550              	.LFB1223:
-3093:Src/main.c    **** 	// Main idea:
- 7551              		.loc 1 3093 1 view -0
- 7552              		.cfi_startproc
- 7553              		@ args = 0, pretend = 0, frame = 0
- 7554              		@ frame_needed = 0, uses_anonymous_args = 0
- 7555              		@ link register save eliminated.
-ARM GAS  /tmp/ccwR4KB7.s 			page 516
+ 7999              		.loc 1 2388 4 is_stmt 1 view .LVU2534
+2388:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+ 8000              		.loc 1 2388 11 is_stmt 0 view .LVU2535
+ 8001 01f6 4846     		mov	r0, r9
+ 8002 01f8 FFF7FEFF 		bl	Create_File
+ 8003              	.LVL758:
+2388:Src/main.c    **** 			test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+ 8004              		.loc 1 2388 9 discriminator 1 view .LVU2536
+ 8005 01fc C8F80000 		str	r0, [r8]
+2389:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+ 8006              		.loc 1 2389 4 is_stmt 1 view .LVU2537
+2389:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+ 8007              		.loc 1 2389 11 is_stmt 0 view .LVU2538
+ 8008 0200 1E22     		movs	r2, #30
+ 8009 0202 2946     		mov	r1, r5
+ 8010 0204 4846     		mov	r0, r9
+ 8011 0206 FFF7FEFF 		bl	Write_File_byte
+ 8012              	.LVL759:
+2389:Src/main.c    **** 			test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
+ 8013              		.loc 1 2389 9 discriminator 1 view .LVU2539
+ 8014 020a C8F80000 		str	r0, [r8]
+2390:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8015              		.loc 1 2390 4 is_stmt 1 view .LVU2540
+2390:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8016              		.loc 1 2390 11 is_stmt 0 view .LVU2541
+ 8017 020e 1E22     		movs	r2, #30
+ 8018 0210 2946     		mov	r1, r5
+ 8019 0212 4846     		mov	r0, r9
+ 8020 0214 FFF7FEFF 		bl	Update_File_byte
+ 8021              	.LVL760:
+2390:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8022              		.loc 1 2390 9 discriminator 1 view .LVU2542
+ 8023 0218 C8F80000 		str	r0, [r8]
+2391:Src/main.c    **** 		}
+ 8024              		.loc 1 2391 4 is_stmt 1 view .LVU2543
+2391:Src/main.c    **** 		}
+ 8025              		.loc 1 2391 11 is_stmt 0 view .LVU2544
+ 8026 021c 3448     		ldr	r0, .L419+36
+ 8027 021e FFF7FEFF 		bl	Unmount_SD
+ 8028              	.LVL761:
+2391:Src/main.c    **** 		}
+ 8029              		.loc 1 2391 9 discriminator 1 view .LVU2545
+ 8030 0222 C8F80000 		str	r0, [r8]
+ 8031 0226 FBE6     		b	.L396
+ 8032              	.LVL762:
+ 8033              	.L397:
+2441:Src/main.c    **** 	}
+ 8034              		.loc 1 2441 3 is_stmt 1 view .LVU2546
+ 8035 0228 0022     		movs	r2, #0
+ 8036 022a 0821     		movs	r1, #8
+ 8037 022c 2B48     		ldr	r0, .L419+16
+ 8038 022e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8039              	.LVL763:
+ 8040 0232 69E7     		b	.L398
+ 8041              	.L399:
+2450:Src/main.c    **** 	}
+ 8042              		.loc 1 2450 3 view .LVU2547
+ARM GAS  /tmp/ccEQxcUB.s 			page 532
 
 
-3093:Src/main.c    **** 	// Main idea:
- 7556              		.loc 1 3093 1 is_stmt 0 view .LVU2400
- 7557 0000 30B4     		push	{r4, r5}
- 7558              	.LCFI67:
- 7559              		.cfi_def_cfa_offset 8
- 7560              		.cfi_offset 4, -8
- 7561              		.cfi_offset 5, -4
-3111:Src/main.c    **** 	float P_coef_current;//, I_coef_current;
- 7562              		.loc 1 3111 2 is_stmt 1 view .LVU2401
-3112:Src/main.c    **** 	float e_integral;
- 7563              		.loc 1 3112 2 view .LVU2402
-3113:Src/main.c    **** 	int x_output;
- 7564              		.loc 1 3113 2 view .LVU2403
-3114:Src/main.c    **** 
- 7565              		.loc 1 3114 2 view .LVU2404
-3116:Src/main.c    **** 
- 7566              		.loc 1 3116 2 view .LVU2405
-3116:Src/main.c    **** 
- 7567              		.loc 1 3116 28 is_stmt 0 view .LVU2406
- 7568 0002 0B88     		ldrh	r3, [r1]
-3116:Src/main.c    **** 
- 7569              		.loc 1 3116 65 view .LVU2407
- 7570 0004 0488     		ldrh	r4, [r0]
-3116:Src/main.c    **** 
- 7571              		.loc 1 3116 8 view .LVU2408
- 7572 0006 1B1B     		subs	r3, r3, r4
- 7573              	.LVL703:
-3118:Src/main.c    **** 
- 7574              		.loc 1 3118 2 is_stmt 1 view .LVU2409
-3118:Src/main.c    **** 
- 7575              		.loc 1 3118 13 is_stmt 0 view .LVU2410
- 7576 0008 D1ED017A 		vldr.32	s15, [r1, #4]
- 7577              	.LVL704:
-3120:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 7578              		.loc 1 3120 2 is_stmt 1 view .LVU2411
-3120:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 7579              		.loc 1 3120 20 is_stmt 0 view .LVU2412
- 7580 000c 03F6B73C 		addw	ip, r3, #2999
-3120:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 7581              		.loc 1 3120 4 view .LVU2413
- 7582 0010 41F26E74 		movw	r4, #5998
- 7583 0014 A445     		cmp	ip, r4
- 7584 0016 18D8     		bhi	.L385
-3121:Src/main.c    **** 	}
- 7585              		.loc 1 3121 3 is_stmt 1 view .LVU2414
-3121:Src/main.c    **** 	}
- 7586              		.loc 1 3121 31 is_stmt 0 view .LVU2415
- 7587 0018 90ED027A 		vldr.32	s14, [r0, #8]
-3121:Src/main.c    **** 	}
- 7588              		.loc 1 3121 47 view .LVU2416
- 7589 001c 06EE903A 		vmov	s13, r3	@ int
- 7590 0020 F8EEE66A 		vcvt.f32.s32	s13, s13
-3121:Src/main.c    **** 	}
- 7591              		.loc 1 3121 45 view .LVU2417
- 7592 0024 27EE267A 		vmul.f32	s14, s14, s13
-3121:Src/main.c    **** 	}
- 7593              		.loc 1 3121 76 view .LVU2418
-ARM GAS  /tmp/ccwR4KB7.s 			page 517
+ 8043 0234 0022     		movs	r2, #0
+ 8044 0236 8021     		movs	r1, #128
+ 8045 0238 2848     		ldr	r0, .L419+16
+ 8046 023a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8047              	.LVL764:
+ 8048 023e 6CE7     		b	.L400
+ 8049              	.L401:
+2460:Src/main.c    **** 		//LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
+ 8050              		.loc 1 2460 3 view .LVU2548
+ 8051 0240 0022     		movs	r2, #0
+ 8052 0242 4FF48071 		mov	r1, #256
+ 8053 0246 2248     		ldr	r0, .L419+4
+ 8054 0248 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8055              	.LVL765:
+ 8056 024c 6FE7     		b	.L402
+ 8057              	.L403:
+2471:Src/main.c    **** 		//LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
+ 8058              		.loc 1 2471 3 view .LVU2549
+ 8059 024e 0022     		movs	r2, #0
+ 8060 0250 1021     		movs	r1, #16
+ 8061 0252 2248     		ldr	r0, .L419+16
+ 8062 0254 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8063              	.LVL766:
+ 8064 0258 72E7     		b	.L404
+ 8065              	.L405:
+2481:Src/main.c    **** 	}
+ 8066              		.loc 1 2481 3 view .LVU2550
+ 8067 025a 0022     		movs	r2, #0
+ 8068 025c 4FF48061 		mov	r1, #1024
+ 8069 0260 1F48     		ldr	r0, .L419+20
+ 8070 0262 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8071              	.LVL767:
+ 8072 0266 75E7     		b	.L406
+ 8073              	.L407:
+2490:Src/main.c    **** 	}
+ 8074              		.loc 1 2490 3 view .LVU2551
+ 8075 0268 0022     		movs	r2, #0
+ 8076 026a 0821     		movs	r1, #8
+ 8077 026c 1D48     		ldr	r0, .L419+24
+ 8078 026e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8079              	.LVL768:
+ 8080 0272 78E7     		b	.L408
+ 8081              	.L417:
+2495:Src/main.c    **** 		Set_LTEC(3,32767);
+ 8082              		.loc 1 2495 3 view .LVU2552
+ 8083 0274 47F6FF71 		movw	r1, #32767
+ 8084 0278 0320     		movs	r0, #3
+ 8085 027a FFF7FEFF 		bl	Set_LTEC
+ 8086              	.LVL769:
+2496:Src/main.c    **** 		HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
+ 8087              		.loc 1 2496 3 view .LVU2553
+ 8088 027e 47F6FF71 		movw	r1, #32767
+ 8089 0282 0320     		movs	r0, #3
+ 8090 0284 FFF7FEFF 		bl	Set_LTEC
+ 8091              	.LVL770:
+2497:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
+ 8092              		.loc 1 2497 3 view .LVU2554
+ARM GAS  /tmp/ccEQxcUB.s 			page 533
 
 
- 7594 0028 284C     		ldr	r4, .L395
- 7595 002a 2468     		ldr	r4, [r4]
- 7596 002c 284D     		ldr	r5, .L395+4
- 7597 002e 2D68     		ldr	r5, [r5]
- 7598 0030 641B     		subs	r4, r4, r5
-3121:Src/main.c    **** 	}
- 7599              		.loc 1 3121 64 view .LVU2419
- 7600 0032 06EE904A 		vmov	s13, r4	@ int
- 7601 0036 F8EE666A 		vcvt.f32.u32	s13, s13
-3121:Src/main.c    **** 	}
- 7602              		.loc 1 3121 62 view .LVU2420
- 7603 003a 27EE267A 		vmul.f32	s14, s14, s13
-3121:Src/main.c    **** 	}
- 7604              		.loc 1 3121 87 view .LVU2421
- 7605 003e 9FED256A 		vldr.32	s12, .L395+8
- 7606 0042 C7EE066A 		vdiv.f32	s13, s14, s12
-3121:Src/main.c    **** 	}
- 7607              		.loc 1 3121 14 view .LVU2422
- 7608 0046 77EEA67A 		vadd.f32	s15, s15, s13
- 7609              	.LVL705:
- 7610              	.L385:
-3123:Src/main.c    **** 
- 7611              		.loc 1 3123 2 is_stmt 1 view .LVU2423
-3123:Src/main.c    **** 
- 7612              		.loc 1 3123 17 is_stmt 0 view .LVU2424
- 7613 004a D0ED016A 		vldr.32	s13, [r0, #4]
- 7614              	.LVL706:
-3125:Src/main.c    **** 			e_integral = 32000;
- 7615              		.loc 1 3125 2 is_stmt 1 view .LVU2425
-3125:Src/main.c    **** 			e_integral = 32000;
- 7616              		.loc 1 3125 5 is_stmt 0 view .LVU2426
- 7617 004e 9FED227A 		vldr.32	s14, .L395+12
- 7618 0052 F4EEC77A 		vcmpe.f32	s15, s14
- 7619 0056 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
- 7620 005a 09DC     		bgt	.L389
-3128:Src/main.c    **** 			e_integral = -32000;
- 7621              		.loc 1 3128 7 is_stmt 1 view .LVU2427
-3128:Src/main.c    **** 			e_integral = -32000;
- 7622              		.loc 1 3128 10 is_stmt 0 view .LVU2428
- 7623 005c 9FED1F7A 		vldr.32	s14, .L395+16
- 7624 0060 F4EEC77A 		vcmpe.f32	s15, s14
- 7625 0064 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
- 7626 0068 04D5     		bpl	.L386
-3129:Src/main.c    **** 	}
- 7627              		.loc 1 3129 15 view .LVU2429
- 7628 006a DFED1C7A 		vldr.32	s15, .L395+16
- 7629              	.LVL707:
-3129:Src/main.c    **** 	}
- 7630              		.loc 1 3129 15 view .LVU2430
- 7631 006e 01E0     		b	.L386
- 7632              	.LVL708:
- 7633              	.L389:
-3126:Src/main.c    **** 	}
- 7634              		.loc 1 3126 15 view .LVU2431
- 7635 0070 DFED197A 		vldr.32	s15, .L395+12
- 7636              	.LVL709:
- 7637              	.L386:
-ARM GAS  /tmp/ccwR4KB7.s 			page 518
+ 8093 0288 0122     		movs	r2, #1
+ 8094 028a 4FF40061 		mov	r1, #2048
+ 8095 028e 1448     		ldr	r0, .L419+20
+ 8096 0290 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8097              	.LVL771:
+2498:Src/main.c    **** 	}
+ 8098              		.loc 1 2498 3 view .LVU2555
+ 8099 0294 0122     		movs	r2, #1
+ 8100 0296 1146     		mov	r1, r2
+ 8101 0298 1248     		ldr	r0, .L419+24
+ 8102 029a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8103              	.LVL772:
+ 8104 029e 73E7     		b	.L410
+ 8105              	.L418:
+2508:Src/main.c    **** 		Set_LTEC(4,32767);
+ 8106              		.loc 1 2508 3 view .LVU2556
+ 8107 02a0 47F6FF71 		movw	r1, #32767
+ 8108 02a4 0420     		movs	r0, #4
+ 8109 02a6 FFF7FEFF 		bl	Set_LTEC
+ 8110              	.LVL773:
+2509:Src/main.c    **** 		HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
+ 8111              		.loc 1 2509 3 view .LVU2557
+ 8112 02aa 47F6FF71 		movw	r1, #32767
+ 8113 02ae 0420     		movs	r0, #4
+ 8114 02b0 FFF7FEFF 		bl	Set_LTEC
+ 8115              	.LVL774:
+2510:Src/main.c    **** 		HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
+ 8116              		.loc 1 2510 3 view .LVU2558
+ 8117 02b4 0122     		movs	r2, #1
+ 8118 02b6 2021     		movs	r1, #32
+ 8119 02b8 0848     		ldr	r0, .L419+16
+ 8120 02ba FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8121              	.LVL775:
+2511:Src/main.c    **** 	}
+ 8122              		.loc 1 2511 3 view .LVU2559
+ 8123 02be 0122     		movs	r2, #1
+ 8124 02c0 0221     		movs	r1, #2
+ 8125 02c2 0848     		ldr	r0, .L419+24
+ 8126 02c4 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 8127              	.LVL776:
+ 8128 02c8 6EE7     		b	.L412
+ 8129              	.L420:
+ 8130 02ca 00BF     		.align	2
+ 8131              	.L419:
+ 8132 02cc 00000000 		.word	test
+ 8133 02d0 000C0240 		.word	1073875968
+ 8134 02d4 0000803B 		.word	998244352
+ 8135 02d8 00000000 		.word	Long_Data
+ 8136 02dc 00080240 		.word	1073874944
+ 8137 02e0 00040240 		.word	1073873920
+ 8138 02e4 00000240 		.word	1073872896
+ 8139 02e8 00002041 		.word	1092616192
+ 8140 02ec 0AD7233C 		.word	1008981770
+ 8141 02f0 00000000 		.word	.LC0
+ 8142 02f4 04000000 		.word	.LC1
+ 8143              		.cfi_endproc
+ 8144              	.LFE1209:
+ARM GAS  /tmp/ccEQxcUB.s 			page 534
 
 
-3131:Src/main.c    **** 
- 7638              		.loc 1 3131 2 is_stmt 1 view .LVU2432
-3131:Src/main.c    **** 
- 7639              		.loc 1 3131 26 is_stmt 0 view .LVU2433
- 7640 0074 C1ED017A 		vstr.32	s15, [r1, #4]
-3133:Src/main.c    **** 
- 7641              		.loc 1 3133 2 is_stmt 1 view .LVU2434
-3133:Src/main.c    **** 
- 7642              		.loc 1 3133 36 is_stmt 0 view .LVU2435
- 7643 0078 07EE103A 		vmov	s14, r3	@ int
- 7644 007c B8EEC77A 		vcvt.f32.s32	s14, s14
- 7645 0080 27EE267A 		vmul.f32	s14, s14, s13
-3133:Src/main.c    **** 
- 7646              		.loc 1 3133 19 view .LVU2436
- 7647 0084 DFED166A 		vldr.32	s13, .L395+20
- 7648              	.LVL710:
-3133:Src/main.c    **** 
- 7649              		.loc 1 3133 19 view .LVU2437
- 7650 0088 37EE267A 		vadd.f32	s14, s14, s13
-3133:Src/main.c    **** 
- 7651              		.loc 1 3133 46 view .LVU2438
- 7652 008c FDEEE77A 		vcvt.s32.f32	s15, s15
- 7653              	.LVL711:
-3133:Src/main.c    **** 
- 7654              		.loc 1 3133 44 view .LVU2439
- 7655 0090 F8EEE77A 		vcvt.f32.s32	s15, s15
- 7656 0094 77EE877A 		vadd.f32	s15, s15, s14
-3133:Src/main.c    **** 
- 7657              		.loc 1 3133 11 view .LVU2440
- 7658 0098 FDEEE77A 		vcvt.s32.f32	s15, s15
- 7659 009c 17EE900A 		vmov	r0, s15	@ int
- 7660              	.LVL712:
-3135:Src/main.c    **** 		x_output = 8800;
- 7661              		.loc 1 3135 2 is_stmt 1 view .LVU2441
-3135:Src/main.c    **** 		x_output = 8800;
- 7662              		.loc 1 3135 4 is_stmt 0 view .LVU2442
- 7663 00a0 B0F57A7F 		cmp	r0, #1000
- 7664 00a4 06DB     		blt	.L391
-3138:Src/main.c    **** 		x_output = 56800;
- 7665              		.loc 1 3138 7 is_stmt 1 view .LVU2443
-3138:Src/main.c    **** 		x_output = 56800;
- 7666              		.loc 1 3138 9 is_stmt 0 view .LVU2444
- 7667 00a6 4DF6E053 		movw	r3, #56800
- 7668              	.LVL713:
-3138:Src/main.c    **** 		x_output = 56800;
- 7669              		.loc 1 3138 9 view .LVU2445
- 7670 00aa 9842     		cmp	r0, r3
- 7671 00ac 04DD     		ble	.L387
-3139:Src/main.c    **** 	}
- 7672              		.loc 1 3139 12 view .LVU2446
- 7673 00ae 4DF6E050 		movw	r0, #56800
- 7674              	.LVL714:
-3139:Src/main.c    **** 	}
- 7675              		.loc 1 3139 12 view .LVU2447
- 7676 00b2 01E0     		b	.L387
- 7677              	.LVL715:
- 7678              	.L391:
-ARM GAS  /tmp/ccwR4KB7.s 			page 519
+ 8146              		.section	.text.Advanced_Controller_Temp,"ax",%progbits
+ 8147              		.align	1
+ 8148              		.global	Advanced_Controller_Temp
+ 8149              		.syntax unified
+ 8150              		.thumb
+ 8151              		.thumb_func
+ 8153              	Advanced_Controller_Temp:
+ 8154              	.LVL777:
+ 8155              	.LFB1228:
+3391:Src/main.c    **** 	// Main idea:
+ 8156              		.loc 1 3391 1 view -0
+ 8157              		.cfi_startproc
+ 8158              		@ args = 0, pretend = 0, frame = 0
+ 8159              		@ frame_needed = 0, uses_anonymous_args = 0
+ 8160              		@ link register save eliminated.
+3391:Src/main.c    **** 	// Main idea:
+ 8161              		.loc 1 3391 1 is_stmt 0 view .LVU2561
+ 8162 0000 30B4     		push	{r4, r5}
+ 8163              	.LCFI69:
+ 8164              		.cfi_def_cfa_offset 8
+ 8165              		.cfi_offset 4, -8
+ 8166              		.cfi_offset 5, -4
+3409:Src/main.c    **** 	float P_coef_current;//, I_coef_current;
+ 8167              		.loc 1 3409 2 is_stmt 1 view .LVU2562
+3410:Src/main.c    **** 	float e_integral;
+ 8168              		.loc 1 3410 2 view .LVU2563
+3411:Src/main.c    **** 	int x_output;
+ 8169              		.loc 1 3411 2 view .LVU2564
+3412:Src/main.c    **** 
+ 8170              		.loc 1 3412 2 view .LVU2565
+3414:Src/main.c    **** 
+ 8171              		.loc 1 3414 2 view .LVU2566
+3414:Src/main.c    **** 
+ 8172              		.loc 1 3414 28 is_stmt 0 view .LVU2567
+ 8173 0002 0B88     		ldrh	r3, [r1]
+3414:Src/main.c    **** 
+ 8174              		.loc 1 3414 65 view .LVU2568
+ 8175 0004 0488     		ldrh	r4, [r0]
+3414:Src/main.c    **** 
+ 8176              		.loc 1 3414 8 view .LVU2569
+ 8177 0006 1B1B     		subs	r3, r3, r4
+ 8178              	.LVL778:
+3416:Src/main.c    **** 
+ 8179              		.loc 1 3416 2 is_stmt 1 view .LVU2570
+3416:Src/main.c    **** 
+ 8180              		.loc 1 3416 13 is_stmt 0 view .LVU2571
+ 8181 0008 D1ED017A 		vldr.32	s15, [r1, #4]
+ 8182              	.LVL779:
+3418:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
+ 8183              		.loc 1 3418 2 is_stmt 1 view .LVU2572
+3418:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
+ 8184              		.loc 1 3418 20 is_stmt 0 view .LVU2573
+ 8185 000c 03F6B73C 		addw	ip, r3, #2999
+3418:Src/main.c    **** 		e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
+ 8186              		.loc 1 3418 4 view .LVU2574
+ 8187 0010 41F26E74 		movw	r4, #5998
+ 8188 0014 A445     		cmp	ip, r4
+ARM GAS  /tmp/ccEQxcUB.s 			page 535
 
 
-3136:Src/main.c    **** 	}
- 7679              		.loc 1 3136 12 view .LVU2448
- 7680 00b4 42F26020 		movw	r0, #8800
- 7681              	.LVL716:
- 7682              	.L387:
-3142:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
- 7683              		.loc 1 3142 2 is_stmt 1 view .LVU2449
-3142:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
- 7684              		.loc 1 3142 5 is_stmt 0 view .LVU2450
- 7685 00b8 022A     		cmp	r2, #2
- 7686 00ba 02D0     		beq	.L394
- 7687              	.LVL717:
- 7688              	.L388:
-3145:Src/main.c    **** }
- 7689              		.loc 1 3145 2 is_stmt 1 view .LVU2451
-3146:Src/main.c    **** 
- 7690              		.loc 1 3146 1 is_stmt 0 view .LVU2452
- 7691 00bc 80B2     		uxth	r0, r0
- 7692              	.LVL718:
-3146:Src/main.c    **** 
- 7693              		.loc 1 3146 1 view .LVU2453
- 7694 00be 30BC     		pop	{r4, r5}
- 7695              	.LCFI68:
- 7696              		.cfi_remember_state
- 7697              		.cfi_restore 5
- 7698              		.cfi_restore 4
- 7699              		.cfi_def_cfa_offset 0
- 7700 00c0 7047     		bx	lr
- 7701              	.LVL719:
- 7702              	.L394:
- 7703              	.LCFI69:
- 7704              		.cfi_restore_state
-3143:Src/main.c    **** 
- 7705              		.loc 1 3143 3 is_stmt 1 view .LVU2454
-3143:Src/main.c    **** 
- 7706              		.loc 1 3143 11 is_stmt 0 view .LVU2455
- 7707 00c2 024B     		ldr	r3, .L395
- 7708 00c4 1A68     		ldr	r2, [r3]
- 7709              	.LVL720:
-3143:Src/main.c    **** 
- 7710              		.loc 1 3143 11 view .LVU2456
- 7711 00c6 024B     		ldr	r3, .L395+4
- 7712 00c8 1A60     		str	r2, [r3]
- 7713 00ca F7E7     		b	.L388
- 7714              	.L396:
- 7715              		.align	2
- 7716              	.L395:
- 7717 00cc 00000000 		.word	TO7
- 7718 00d0 00000000 		.word	TO7_PID
- 7719 00d4 0000C842 		.word	1120403456
- 7720 00d8 0000FA46 		.word	1190789120
- 7721 00dc 0000FAC6 		.word	-956694528
- 7722 00e0 00000047 		.word	1191182336
- 7723              		.cfi_endproc
- 7724              	.LFE1223:
- 7726              		.section	.text.CalculateChecksum,"ax",%progbits
- 7727              		.align	1
-ARM GAS  /tmp/ccwR4KB7.s 			page 520
+ 8189 0016 18D8     		bhi	.L422
+3419:Src/main.c    **** 	}
+ 8190              		.loc 1 3419 3 is_stmt 1 view .LVU2575
+3419:Src/main.c    **** 	}
+ 8191              		.loc 1 3419 31 is_stmt 0 view .LVU2576
+ 8192 0018 90ED027A 		vldr.32	s14, [r0, #8]
+3419:Src/main.c    **** 	}
+ 8193              		.loc 1 3419 47 view .LVU2577
+ 8194 001c 06EE903A 		vmov	s13, r3	@ int
+ 8195 0020 F8EEE66A 		vcvt.f32.s32	s13, s13
+3419:Src/main.c    **** 	}
+ 8196              		.loc 1 3419 45 view .LVU2578
+ 8197 0024 27EE267A 		vmul.f32	s14, s14, s13
+3419:Src/main.c    **** 	}
+ 8198              		.loc 1 3419 76 view .LVU2579
+ 8199 0028 284C     		ldr	r4, .L432
+ 8200 002a 2468     		ldr	r4, [r4]
+ 8201 002c 284D     		ldr	r5, .L432+4
+ 8202 002e 2D68     		ldr	r5, [r5]
+ 8203 0030 641B     		subs	r4, r4, r5
+3419:Src/main.c    **** 	}
+ 8204              		.loc 1 3419 64 view .LVU2580
+ 8205 0032 06EE904A 		vmov	s13, r4	@ int
+ 8206 0036 F8EE666A 		vcvt.f32.u32	s13, s13
+3419:Src/main.c    **** 	}
+ 8207              		.loc 1 3419 62 view .LVU2581
+ 8208 003a 27EE267A 		vmul.f32	s14, s14, s13
+3419:Src/main.c    **** 	}
+ 8209              		.loc 1 3419 87 view .LVU2582
+ 8210 003e 9FED256A 		vldr.32	s12, .L432+8
+ 8211 0042 C7EE066A 		vdiv.f32	s13, s14, s12
+3419:Src/main.c    **** 	}
+ 8212              		.loc 1 3419 14 view .LVU2583
+ 8213 0046 77EEA67A 		vadd.f32	s15, s15, s13
+ 8214              	.LVL780:
+ 8215              	.L422:
+3421:Src/main.c    **** 
+ 8216              		.loc 1 3421 2 is_stmt 1 view .LVU2584
+3421:Src/main.c    **** 
+ 8217              		.loc 1 3421 17 is_stmt 0 view .LVU2585
+ 8218 004a D0ED016A 		vldr.32	s13, [r0, #4]
+ 8219              	.LVL781:
+3423:Src/main.c    **** 			e_integral = 32000;
+ 8220              		.loc 1 3423 2 is_stmt 1 view .LVU2586
+3423:Src/main.c    **** 			e_integral = 32000;
+ 8221              		.loc 1 3423 5 is_stmt 0 view .LVU2587
+ 8222 004e 9FED227A 		vldr.32	s14, .L432+12
+ 8223 0052 F4EEC77A 		vcmpe.f32	s15, s14
+ 8224 0056 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ 8225 005a 09DC     		bgt	.L426
+3426:Src/main.c    **** 			e_integral = -32000;
+ 8226              		.loc 1 3426 7 is_stmt 1 view .LVU2588
+3426:Src/main.c    **** 			e_integral = -32000;
+ 8227              		.loc 1 3426 10 is_stmt 0 view .LVU2589
+ 8228 005c 9FED1F7A 		vldr.32	s14, .L432+16
+ 8229 0060 F4EEC77A 		vcmpe.f32	s15, s14
+ 8230 0064 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ARM GAS  /tmp/ccEQxcUB.s 			page 536
 
 
- 7728              		.global	CalculateChecksum
- 7729              		.syntax unified
- 7730              		.thumb
- 7731              		.thumb_func
- 7733              	CalculateChecksum:
- 7734              	.LVL721:
- 7735              	.LFB1226:
-3209:Src/main.c    **** 	short  i;
- 7736              		.loc 1 3209 1 is_stmt 1 view -0
- 7737              		.cfi_startproc
- 7738              		@ args = 0, pretend = 0, frame = 0
- 7739              		@ frame_needed = 0, uses_anonymous_args = 0
- 7740              		@ link register save eliminated.
-3209:Src/main.c    **** 	short  i;
- 7741              		.loc 1 3209 1 is_stmt 0 view .LVU2458
- 7742 0000 8446     		mov	ip, r0
-3210:Src/main.c    **** 	uint16_t cs = *pbuff;
- 7743              		.loc 1 3210 2 is_stmt 1 view .LVU2459
-3211:Src/main.c    ****   
- 7744              		.loc 1 3211 2 view .LVU2460
-3211:Src/main.c    ****   
- 7745              		.loc 1 3211 11 is_stmt 0 view .LVU2461
- 7746 0002 0088     		ldrh	r0, [r0]
- 7747              	.LVL722:
-3213:Src/main.c    **** 	{
- 7748              		.loc 1 3213 3 is_stmt 1 view .LVU2462
-3213:Src/main.c    **** 	{
- 7749              		.loc 1 3213 9 is_stmt 0 view .LVU2463
- 7750 0004 0123     		movs	r3, #1
-3213:Src/main.c    **** 	{
- 7751              		.loc 1 3213 3 view .LVU2464
- 7752 0006 04E0     		b	.L398
- 7753              	.LVL723:
- 7754              	.L399:
-3215:Src/main.c    **** 	}
- 7755              		.loc 1 3215 3 is_stmt 1 view .LVU2465
-3215:Src/main.c    **** 	}
- 7756              		.loc 1 3215 9 is_stmt 0 view .LVU2466
- 7757 0008 3CF81320 		ldrh	r2, [ip, r3, lsl #1]
-3215:Src/main.c    **** 	}
- 7758              		.loc 1 3215 6 view .LVU2467
- 7759 000c 5040     		eors	r0, r0, r2
- 7760              	.LVL724:
-3213:Src/main.c    **** 	{
- 7761              		.loc 1 3213 24 is_stmt 1 discriminator 3 view .LVU2468
- 7762 000e 0133     		adds	r3, r3, #1
- 7763              	.LVL725:
-3213:Src/main.c    **** 	{
- 7764              		.loc 1 3213 24 is_stmt 0 discriminator 3 view .LVU2469
- 7765 0010 1BB2     		sxth	r3, r3
- 7766              	.LVL726:
- 7767              	.L398:
-3213:Src/main.c    **** 	{
- 7768              		.loc 1 3213 16 is_stmt 1 discriminator 1 view .LVU2470
- 7769 0012 8B42     		cmp	r3, r1
- 7770 0014 F8DB     		blt	.L399
-3217:Src/main.c    **** }
-ARM GAS  /tmp/ccwR4KB7.s 			page 521
+ 8231 0068 04D5     		bpl	.L423
+3427:Src/main.c    **** 	}
+ 8232              		.loc 1 3427 15 view .LVU2590
+ 8233 006a DFED1C7A 		vldr.32	s15, .L432+16
+ 8234              	.LVL782:
+3427:Src/main.c    **** 	}
+ 8235              		.loc 1 3427 15 view .LVU2591
+ 8236 006e 01E0     		b	.L423
+ 8237              	.LVL783:
+ 8238              	.L426:
+3424:Src/main.c    **** 	}
+ 8239              		.loc 1 3424 15 view .LVU2592
+ 8240 0070 DFED197A 		vldr.32	s15, .L432+12
+ 8241              	.LVL784:
+ 8242              	.L423:
+3429:Src/main.c    **** 
+ 8243              		.loc 1 3429 2 is_stmt 1 view .LVU2593
+3429:Src/main.c    **** 
+ 8244              		.loc 1 3429 26 is_stmt 0 view .LVU2594
+ 8245 0074 C1ED017A 		vstr.32	s15, [r1, #4]
+3431:Src/main.c    **** 
+ 8246              		.loc 1 3431 2 is_stmt 1 view .LVU2595
+3431:Src/main.c    **** 
+ 8247              		.loc 1 3431 36 is_stmt 0 view .LVU2596
+ 8248 0078 07EE103A 		vmov	s14, r3	@ int
+ 8249 007c B8EEC77A 		vcvt.f32.s32	s14, s14
+ 8250 0080 27EE267A 		vmul.f32	s14, s14, s13
+3431:Src/main.c    **** 
+ 8251              		.loc 1 3431 19 view .LVU2597
+ 8252 0084 DFED166A 		vldr.32	s13, .L432+20
+ 8253              	.LVL785:
+3431:Src/main.c    **** 
+ 8254              		.loc 1 3431 19 view .LVU2598
+ 8255 0088 37EE267A 		vadd.f32	s14, s14, s13
+3431:Src/main.c    **** 
+ 8256              		.loc 1 3431 46 view .LVU2599
+ 8257 008c FDEEE77A 		vcvt.s32.f32	s15, s15
+ 8258              	.LVL786:
+3431:Src/main.c    **** 
+ 8259              		.loc 1 3431 44 view .LVU2600
+ 8260 0090 F8EEE77A 		vcvt.f32.s32	s15, s15
+ 8261 0094 77EE877A 		vadd.f32	s15, s15, s14
+3431:Src/main.c    **** 
+ 8262              		.loc 1 3431 11 view .LVU2601
+ 8263 0098 FDEEE77A 		vcvt.s32.f32	s15, s15
+ 8264 009c 17EE900A 		vmov	r0, s15	@ int
+ 8265              	.LVL787:
+3433:Src/main.c    **** 		x_output = 8800;
+ 8266              		.loc 1 3433 2 is_stmt 1 view .LVU2602
+3433:Src/main.c    **** 		x_output = 8800;
+ 8267              		.loc 1 3433 4 is_stmt 0 view .LVU2603
+ 8268 00a0 B0F57A7F 		cmp	r0, #1000
+ 8269 00a4 06DB     		blt	.L428
+3436:Src/main.c    **** 		x_output = 56800;
+ 8270              		.loc 1 3436 7 is_stmt 1 view .LVU2604
+3436:Src/main.c    **** 		x_output = 56800;
+ 8271              		.loc 1 3436 9 is_stmt 0 view .LVU2605
+ARM GAS  /tmp/ccEQxcUB.s 			page 537
 
 
- 7771              		.loc 1 3217 2 view .LVU2471
-3218:Src/main.c    **** 
- 7772              		.loc 1 3218 1 is_stmt 0 view .LVU2472
- 7773 0016 7047     		bx	lr
- 7774              		.cfi_endproc
- 7775              	.LFE1226:
- 7777              		.section	.text.CheckChecksum,"ax",%progbits
- 7778              		.align	1
- 7779              		.global	CheckChecksum
- 7780              		.syntax unified
- 7781              		.thumb
- 7782              		.thumb_func
- 7784              	CheckChecksum:
- 7785              	.LVL727:
- 7786              	.LFB1225:
-3188:Src/main.c    ****   uint16_t cl_ind;
- 7787              		.loc 1 3188 1 is_stmt 1 view -0
- 7788              		.cfi_startproc
- 7789              		@ args = 0, pretend = 0, frame = 0
- 7790              		@ frame_needed = 0, uses_anonymous_args = 0
-3188:Src/main.c    ****   uint16_t cl_ind;
- 7791              		.loc 1 3188 1 is_stmt 0 view .LVU2474
- 7792 0000 10B5     		push	{r4, lr}
- 7793              	.LCFI70:
- 7794              		.cfi_def_cfa_offset 8
- 7795              		.cfi_offset 4, -8
- 7796              		.cfi_offset 14, -4
-3189:Src/main.c    **** 
- 7797              		.loc 1 3189 3 is_stmt 1 view .LVU2475
-3191:Src/main.c    ****   {
- 7798              		.loc 1 3191 3 view .LVU2476
- 7799 0002 0E4B     		ldr	r3, .L406
- 7800 0004 1B88     		ldrh	r3, [r3]
- 7801 0006 41F21112 		movw	r2, #4369
- 7802 000a 9342     		cmp	r3, r2
- 7803 000c 05D0     		beq	.L403
- 7804 000e 47F27772 		movw	r2, #30583
- 7805 0012 9342     		cmp	r3, r2
- 7806 0014 0FD1     		bne	.L404
- 7807 0016 0E24     		movs	r4, #14
- 7808 0018 00E0     		b	.L401
- 7809              	.L403:
-3197:Src/main.c    ****     break;
- 7810              		.loc 1 3197 14 is_stmt 0 view .LVU2477
- 7811 001a 0D24     		movs	r4, #13
- 7812              	.L401:
- 7813              	.LVL728:
-3201:Src/main.c    ****   }
- 7814              		.loc 1 3201 5 is_stmt 1 view .LVU2478
-3204:Src/main.c    **** 
- 7815              		.loc 1 3204 3 view .LVU2479
-3204:Src/main.c    **** 
- 7816              		.loc 1 3204 15 is_stmt 0 view .LVU2480
- 7817 001c 2146     		mov	r1, r4
- 7818 001e FFF7FEFF 		bl	CalculateChecksum
- 7819              	.LVL729:
-3204:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 522
+ 8272 00a6 4DF6E053 		movw	r3, #56800
+ 8273              	.LVL788:
+3436:Src/main.c    **** 		x_output = 56800;
+ 8274              		.loc 1 3436 9 view .LVU2606
+ 8275 00aa 9842     		cmp	r0, r3
+ 8276 00ac 04DD     		ble	.L424
+3437:Src/main.c    **** 	}
+ 8277              		.loc 1 3437 12 view .LVU2607
+ 8278 00ae 4DF6E050 		movw	r0, #56800
+ 8279              	.LVL789:
+3437:Src/main.c    **** 	}
+ 8280              		.loc 1 3437 12 view .LVU2608
+ 8281 00b2 01E0     		b	.L424
+ 8282              	.LVL790:
+ 8283              	.L428:
+3434:Src/main.c    **** 	}
+ 8284              		.loc 1 3434 12 view .LVU2609
+ 8285 00b4 42F26020 		movw	r0, #8800
+ 8286              	.LVL791:
+ 8287              	.L424:
+3440:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
+ 8288              		.loc 1 3440 2 is_stmt 1 view .LVU2610
+3440:Src/main.c    **** 		TO7_PID = TO7;//Save current time only on 2nd laser
+ 8289              		.loc 1 3440 5 is_stmt 0 view .LVU2611
+ 8290 00b8 022A     		cmp	r2, #2
+ 8291 00ba 02D0     		beq	.L431
+ 8292              	.LVL792:
+ 8293              	.L425:
+3443:Src/main.c    **** }
+ 8294              		.loc 1 3443 2 is_stmt 1 view .LVU2612
+3444:Src/main.c    **** 
+ 8295              		.loc 1 3444 1 is_stmt 0 view .LVU2613
+ 8296 00bc 80B2     		uxth	r0, r0
+ 8297              	.LVL793:
+3444:Src/main.c    **** 
+ 8298              		.loc 1 3444 1 view .LVU2614
+ 8299 00be 30BC     		pop	{r4, r5}
+ 8300              	.LCFI70:
+ 8301              		.cfi_remember_state
+ 8302              		.cfi_restore 5
+ 8303              		.cfi_restore 4
+ 8304              		.cfi_def_cfa_offset 0
+ 8305 00c0 7047     		bx	lr
+ 8306              	.LVL794:
+ 8307              	.L431:
+ 8308              	.LCFI71:
+ 8309              		.cfi_restore_state
+3441:Src/main.c    **** 
+ 8310              		.loc 1 3441 3 is_stmt 1 view .LVU2615
+3441:Src/main.c    **** 
+ 8311              		.loc 1 3441 11 is_stmt 0 view .LVU2616
+ 8312 00c2 024B     		ldr	r3, .L432
+ 8313 00c4 1A68     		ldr	r2, [r3]
+ 8314              	.LVL795:
+3441:Src/main.c    **** 
+ 8315              		.loc 1 3441 11 view .LVU2617
+ 8316 00c6 024B     		ldr	r3, .L432+4
+ARM GAS  /tmp/ccEQxcUB.s 			page 538
 
 
- 7820              		.loc 1 3204 13 discriminator 1 view .LVU2481
- 7821 0022 074B     		ldr	r3, .L406+4
- 7822 0024 1880     		strh	r0, [r3]	@ movhi
-3206:Src/main.c    **** }
- 7823              		.loc 1 3206 3 is_stmt 1 view .LVU2482
-3206:Src/main.c    **** }
- 7824              		.loc 1 3206 32 is_stmt 0 view .LVU2483
- 7825 0026 074B     		ldr	r3, .L406+8
- 7826 0028 33F81430 		ldrh	r3, [r3, r4, lsl #1]
-3206:Src/main.c    **** }
- 7827              		.loc 1 3206 46 view .LVU2484
- 7828 002c 9842     		cmp	r0, r3
- 7829 002e 14BF     		ite	ne
- 7830 0030 0020     		movne	r0, #0
- 7831 0032 0120     		moveq	r0, #1
- 7832              	.LVL730:
- 7833              	.L402:
-3207:Src/main.c    **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
- 7834              		.loc 1 3207 1 view .LVU2485
- 7835 0034 10BD     		pop	{r4, pc}
- 7836              	.LVL731:
- 7837              	.L404:
-3191:Src/main.c    ****   {
- 7838              		.loc 1 3191 3 view .LVU2486
- 7839 0036 0020     		movs	r0, #0
- 7840              	.LVL732:
-3191:Src/main.c    ****   {
- 7841              		.loc 1 3191 3 view .LVU2487
- 7842 0038 FCE7     		b	.L402
- 7843              	.L407:
- 7844 003a 00BF     		.align	2
- 7845              	.L406:
- 7846 003c 00000000 		.word	UART_header
- 7847 0040 00000000 		.word	CS_result
- 7848 0044 00000000 		.word	COMMAND
- 7849              		.cfi_endproc
- 7850              	.LFE1225:
- 7852              		.section	.rodata.SD_SAVE.str1.4,"aMS",%progbits,1
- 7853              		.align	2
- 7854              	.LC2:
- 7855 0000 46494C45 		.ascii	"FILE1.TXT\000"
- 7855      312E5458 
- 7855      5400
- 7856              		.section	.text.SD_SAVE,"ax",%progbits
- 7857              		.align	1
- 7858              		.global	SD_SAVE
- 7859              		.syntax unified
- 7860              		.thumb
- 7861              		.thumb_func
- 7863              	SD_SAVE:
- 7864              	.LVL733:
- 7865              	.LFB1227:
-3247:Src/main.c    **** 	int test=0;
- 7866              		.loc 1 3247 1 is_stmt 1 view -0
- 7867              		.cfi_startproc
- 7868              		@ args = 0, pretend = 0, frame = 0
- 7869              		@ frame_needed = 0, uses_anonymous_args = 0
-ARM GAS  /tmp/ccwR4KB7.s 			page 523
+ 8317 00c8 1A60     		str	r2, [r3]
+ 8318 00ca F7E7     		b	.L425
+ 8319              	.L433:
+ 8320              		.align	2
+ 8321              	.L432:
+ 8322 00cc 00000000 		.word	TO7
+ 8323 00d0 00000000 		.word	TO7_PID
+ 8324 00d4 0000C842 		.word	1120403456
+ 8325 00d8 0000FA46 		.word	1190789120
+ 8326 00dc 0000FAC6 		.word	-956694528
+ 8327 00e0 00000047 		.word	1191182336
+ 8328              		.cfi_endproc
+ 8329              	.LFE1228:
+ 8331              		.section	.text.CalculateChecksum,"ax",%progbits
+ 8332              		.align	1
+ 8333              		.global	CalculateChecksum
+ 8334              		.syntax unified
+ 8335              		.thumb
+ 8336              		.thumb_func
+ 8338              	CalculateChecksum:
+ 8339              	.LVL796:
+ 8340              	.LFB1231:
+3507:Src/main.c    **** 	short  i;
+ 8341              		.loc 1 3507 1 is_stmt 1 view -0
+ 8342              		.cfi_startproc
+ 8343              		@ args = 0, pretend = 0, frame = 0
+ 8344              		@ frame_needed = 0, uses_anonymous_args = 0
+ 8345              		@ link register save eliminated.
+3507:Src/main.c    **** 	short  i;
+ 8346              		.loc 1 3507 1 is_stmt 0 view .LVU2619
+ 8347 0000 8446     		mov	ip, r0
+3508:Src/main.c    **** 	uint16_t cs = *pbuff;
+ 8348              		.loc 1 3508 2 is_stmt 1 view .LVU2620
+3509:Src/main.c    ****   
+ 8349              		.loc 1 3509 2 view .LVU2621
+3509:Src/main.c    ****   
+ 8350              		.loc 1 3509 11 is_stmt 0 view .LVU2622
+ 8351 0002 0088     		ldrh	r0, [r0]
+ 8352              	.LVL797:
+3511:Src/main.c    **** 	{
+ 8353              		.loc 1 3511 3 is_stmt 1 view .LVU2623
+3511:Src/main.c    **** 	{
+ 8354              		.loc 1 3511 9 is_stmt 0 view .LVU2624
+ 8355 0004 0123     		movs	r3, #1
+3511:Src/main.c    **** 	{
+ 8356              		.loc 1 3511 3 view .LVU2625
+ 8357 0006 04E0     		b	.L435
+ 8358              	.LVL798:
+ 8359              	.L436:
+3513:Src/main.c    **** 	}
+ 8360              		.loc 1 3513 3 is_stmt 1 view .LVU2626
+3513:Src/main.c    **** 	}
+ 8361              		.loc 1 3513 9 is_stmt 0 view .LVU2627
+ 8362 0008 3CF81320 		ldrh	r2, [ip, r3, lsl #1]
+3513:Src/main.c    **** 	}
+ 8363              		.loc 1 3513 6 view .LVU2628
+ 8364 000c 5040     		eors	r0, r0, r2
+ARM GAS  /tmp/ccEQxcUB.s 			page 539
 
 
-3247:Src/main.c    **** 	int test=0;
- 7870              		.loc 1 3247 1 is_stmt 0 view .LVU2489
- 7871 0000 10B5     		push	{r4, lr}
- 7872              	.LCFI71:
- 7873              		.cfi_def_cfa_offset 8
- 7874              		.cfi_offset 4, -8
- 7875              		.cfi_offset 14, -4
- 7876 0002 0446     		mov	r4, r0
-3248:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- 7877              		.loc 1 3248 2 is_stmt 1 view .LVU2490
- 7878              	.LVL734:
-3249:Src/main.c    **** 	{
- 7879              		.loc 1 3249 2 view .LVU2491
-3249:Src/main.c    **** 	{
- 7880              		.loc 1 3249 6 is_stmt 0 view .LVU2492
- 7881 0004 0121     		movs	r1, #1
- 7882 0006 0A48     		ldr	r0, .L415
- 7883              	.LVL735:
-3249:Src/main.c    **** 	{
- 7884              		.loc 1 3249 6 view .LVU2493
- 7885 0008 FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 7886              	.LVL736:
-3249:Src/main.c    **** 	{
- 7887              		.loc 1 3249 5 discriminator 1 view .LVU2494
- 7888 000c 08B1     		cbz	r0, .L413
-3266:Src/main.c    **** 	}
- 7889              		.loc 1 3266 10 view .LVU2495
- 7890 000e 0120     		movs	r0, #1
- 7891              	.LVL737:
- 7892              	.L408:
-3268:Src/main.c    **** 
- 7893              		.loc 1 3268 1 view .LVU2496
- 7894 0010 10BD     		pop	{r4, pc}
- 7895              	.LVL738:
- 7896              	.L413:
-3251:Src/main.c    **** 		if (test == 0) //0 - suc
- 7897              		.loc 1 3251 3 is_stmt 1 view .LVU2497
-3251:Src/main.c    **** 		if (test == 0) //0 - suc
- 7898              		.loc 1 3251 10 is_stmt 0 view .LVU2498
- 7899 0012 0848     		ldr	r0, .L415+4
- 7900 0014 FFF7FEFF 		bl	Mount_SD
- 7901              	.LVL739:
-3252:Src/main.c    **** 		{
- 7902              		.loc 1 3252 3 is_stmt 1 view .LVU2499
-3252:Src/main.c    **** 		{
- 7903              		.loc 1 3252 6 is_stmt 0 view .LVU2500
- 7904 0018 08B1     		cbz	r0, .L414
-3261:Src/main.c    **** 		}
- 7905              		.loc 1 3261 11 view .LVU2501
- 7906 001a 0120     		movs	r0, #1
- 7907              	.LVL740:
-3261:Src/main.c    **** 		}
- 7908              		.loc 1 3261 11 view .LVU2502
- 7909 001c F8E7     		b	.L408
- 7910              	.LVL741:
- 7911              	.L414:
-3255:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
-ARM GAS  /tmp/ccwR4KB7.s 			page 524
+ 8365              	.LVL799:
+3511:Src/main.c    **** 	{
+ 8366              		.loc 1 3511 24 is_stmt 1 discriminator 3 view .LVU2629
+ 8367 000e 0133     		adds	r3, r3, #1
+ 8368              	.LVL800:
+3511:Src/main.c    **** 	{
+ 8369              		.loc 1 3511 24 is_stmt 0 discriminator 3 view .LVU2630
+ 8370 0010 1BB2     		sxth	r3, r3
+ 8371              	.LVL801:
+ 8372              	.L435:
+3511:Src/main.c    **** 	{
+ 8373              		.loc 1 3511 16 is_stmt 1 discriminator 1 view .LVU2631
+ 8374 0012 8B42     		cmp	r3, r1
+ 8375 0014 F8DB     		blt	.L436
+3515:Src/main.c    **** }
+ 8376              		.loc 1 3515 2 view .LVU2632
+3516:Src/main.c    **** 
+ 8377              		.loc 1 3516 1 is_stmt 0 view .LVU2633
+ 8378 0016 7047     		bx	lr
+ 8379              		.cfi_endproc
+ 8380              	.LFE1231:
+ 8382              		.section	.text.CheckChecksum,"ax",%progbits
+ 8383              		.align	1
+ 8384              		.global	CheckChecksum
+ 8385              		.syntax unified
+ 8386              		.thumb
+ 8387              		.thumb_func
+ 8389              	CheckChecksum:
+ 8390              	.LVL802:
+ 8391              	.LFB1230:
+3486:Src/main.c    ****   uint16_t cl_ind;
+ 8392              		.loc 1 3486 1 is_stmt 1 view -0
+ 8393              		.cfi_startproc
+ 8394              		@ args = 0, pretend = 0, frame = 0
+ 8395              		@ frame_needed = 0, uses_anonymous_args = 0
+3486:Src/main.c    ****   uint16_t cl_ind;
+ 8396              		.loc 1 3486 1 is_stmt 0 view .LVU2635
+ 8397 0000 10B5     		push	{r4, lr}
+ 8398              	.LCFI72:
+ 8399              		.cfi_def_cfa_offset 8
+ 8400              		.cfi_offset 4, -8
+ 8401              		.cfi_offset 14, -4
+3487:Src/main.c    **** 
+ 8402              		.loc 1 3487 3 is_stmt 1 view .LVU2636
+3489:Src/main.c    ****   {
+ 8403              		.loc 1 3489 3 view .LVU2637
+ 8404 0002 0E4B     		ldr	r3, .L443
+ 8405 0004 1B88     		ldrh	r3, [r3]
+ 8406 0006 41F21112 		movw	r2, #4369
+ 8407 000a 9342     		cmp	r3, r2
+ 8408 000c 05D0     		beq	.L440
+ 8409 000e 47F27772 		movw	r2, #30583
+ 8410 0012 9342     		cmp	r3, r2
+ 8411 0014 0FD1     		bne	.L441
+ 8412 0016 0E24     		movs	r4, #14
+ 8413 0018 00E0     		b	.L438
+ 8414              	.L440:
+ARM GAS  /tmp/ccEQxcUB.s 			page 540
 
 
- 7912              		.loc 1 3255 4 is_stmt 1 view .LVU2503
-3255:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
- 7913              		.loc 1 3255 11 is_stmt 0 view .LVU2504
- 7914 001e 1E22     		movs	r2, #30
- 7915 0020 2146     		mov	r1, r4
- 7916 0022 0548     		ldr	r0, .L415+8
- 7917              	.LVL742:
-3255:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
- 7918              		.loc 1 3255 11 view .LVU2505
- 7919 0024 FFF7FEFF 		bl	Update_File_byte
- 7920              	.LVL743:
-3256:Src/main.c    **** 			return test;
- 7921              		.loc 1 3256 4 is_stmt 1 view .LVU2506
-3256:Src/main.c    **** 			return test;
- 7922              		.loc 1 3256 11 is_stmt 0 view .LVU2507
- 7923 0028 0248     		ldr	r0, .L415+4
- 7924 002a FFF7FEFF 		bl	Unmount_SD
- 7925              	.LVL744:
-3257:Src/main.c    **** 		}
- 7926              		.loc 1 3257 4 is_stmt 1 view .LVU2508
-3257:Src/main.c    **** 		}
- 7927              		.loc 1 3257 11 is_stmt 0 view .LVU2509
- 7928 002e EFE7     		b	.L408
- 7929              	.L416:
- 7930              		.align	2
- 7931              	.L415:
- 7932 0030 000C0240 		.word	1073875968
- 7933 0034 00000000 		.word	.LC0
- 7934 0038 00000000 		.word	.LC2
- 7935              		.cfi_endproc
- 7936              	.LFE1227:
- 7938              		.section	.text.SD_READ,"ax",%progbits
- 7939              		.align	1
- 7940              		.global	SD_READ
- 7941              		.syntax unified
- 7942              		.thumb
- 7943              		.thumb_func
- 7945              	SD_READ:
- 7946              	.LVL745:
- 7947              	.LFB1228:
-3278:Src/main.c    **** 	int test=0;
- 7948              		.loc 1 3278 1 is_stmt 1 view -0
- 7949              		.cfi_startproc
- 7950              		@ args = 0, pretend = 0, frame = 0
- 7951              		@ frame_needed = 0, uses_anonymous_args = 0
-3278:Src/main.c    **** 	int test=0;
- 7952              		.loc 1 3278 1 is_stmt 0 view .LVU2511
- 7953 0000 38B5     		push	{r3, r4, r5, lr}
- 7954              	.LCFI72:
- 7955              		.cfi_def_cfa_offset 16
- 7956              		.cfi_offset 3, -16
- 7957              		.cfi_offset 4, -12
- 7958              		.cfi_offset 5, -8
- 7959              		.cfi_offset 14, -4
- 7960 0002 0446     		mov	r4, r0
-3279:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- 7961              		.loc 1 3279 2 is_stmt 1 view .LVU2512
-ARM GAS  /tmp/ccwR4KB7.s 			page 525
+3495:Src/main.c    ****     break;
+ 8415              		.loc 1 3495 14 is_stmt 0 view .LVU2638
+ 8416 001a 0D24     		movs	r4, #13
+ 8417              	.L438:
+ 8418              	.LVL803:
+3499:Src/main.c    ****   }
+ 8419              		.loc 1 3499 5 is_stmt 1 view .LVU2639
+3502:Src/main.c    **** 
+ 8420              		.loc 1 3502 3 view .LVU2640
+3502:Src/main.c    **** 
+ 8421              		.loc 1 3502 15 is_stmt 0 view .LVU2641
+ 8422 001c 2146     		mov	r1, r4
+ 8423 001e FFF7FEFF 		bl	CalculateChecksum
+ 8424              	.LVL804:
+3502:Src/main.c    **** 
+ 8425              		.loc 1 3502 13 discriminator 1 view .LVU2642
+ 8426 0022 074B     		ldr	r3, .L443+4
+ 8427 0024 1880     		strh	r0, [r3]	@ movhi
+3504:Src/main.c    **** }
+ 8428              		.loc 1 3504 3 is_stmt 1 view .LVU2643
+3504:Src/main.c    **** }
+ 8429              		.loc 1 3504 32 is_stmt 0 view .LVU2644
+ 8430 0026 074B     		ldr	r3, .L443+8
+ 8431 0028 33F81430 		ldrh	r3, [r3, r4, lsl #1]
+3504:Src/main.c    **** }
+ 8432              		.loc 1 3504 46 view .LVU2645
+ 8433 002c 9842     		cmp	r0, r3
+ 8434 002e 14BF     		ite	ne
+ 8435 0030 0020     		movne	r0, #0
+ 8436 0032 0120     		moveq	r0, #1
+ 8437              	.LVL805:
+ 8438              	.L439:
+3505:Src/main.c    **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
+ 8439              		.loc 1 3505 1 view .LVU2646
+ 8440 0034 10BD     		pop	{r4, pc}
+ 8441              	.LVL806:
+ 8442              	.L441:
+3489:Src/main.c    ****   {
+ 8443              		.loc 1 3489 3 view .LVU2647
+ 8444 0036 0020     		movs	r0, #0
+ 8445              	.LVL807:
+3489:Src/main.c    ****   {
+ 8446              		.loc 1 3489 3 view .LVU2648
+ 8447 0038 FCE7     		b	.L439
+ 8448              	.L444:
+ 8449 003a 00BF     		.align	2
+ 8450              	.L443:
+ 8451 003c 00000000 		.word	UART_header
+ 8452 0040 00000000 		.word	CS_result
+ 8453 0044 00000000 		.word	COMMAND
+ 8454              		.cfi_endproc
+ 8455              	.LFE1230:
+ 8457              		.section	.rodata.SD_SAVE.str1.4,"aMS",%progbits,1
+ 8458              		.align	2
+ 8459              	.LC2:
+ 8460 0000 46494C45 		.ascii	"FILE1.TXT\000"
+ 8460      312E5458 
+ARM GAS  /tmp/ccEQxcUB.s 			page 541
 
 
- 7962              	.LVL746:
-3280:Src/main.c    **** 	{
- 7963              		.loc 1 3280 2 view .LVU2513
-3280:Src/main.c    **** 	{
- 7964              		.loc 1 3280 6 is_stmt 0 view .LVU2514
- 7965 0004 0121     		movs	r1, #1
- 7966 0006 0D48     		ldr	r0, .L424
- 7967              	.LVL747:
-3280:Src/main.c    **** 	{
- 7968              		.loc 1 3280 6 view .LVU2515
- 7969 0008 FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 7970              	.LVL748:
-3280:Src/main.c    **** 	{
- 7971              		.loc 1 3280 5 discriminator 1 view .LVU2516
- 7972 000c 08B1     		cbz	r0, .L422
-3298:Src/main.c    **** 	}
- 7973              		.loc 1 3298 10 view .LVU2517
- 7974 000e 0120     		movs	r0, #1
- 7975              	.LVL749:
- 7976              	.L417:
-3314:Src/main.c    **** 
- 7977              		.loc 1 3314 1 view .LVU2518
- 7978 0010 38BD     		pop	{r3, r4, r5, pc}
- 7979              	.LVL750:
- 7980              	.L422:
-3282:Src/main.c    **** 		if (test == 0) //0 - suc
- 7981              		.loc 1 3282 3 is_stmt 1 view .LVU2519
-3282:Src/main.c    **** 		if (test == 0) //0 - suc
- 7982              		.loc 1 3282 10 is_stmt 0 view .LVU2520
- 7983 0012 0B48     		ldr	r0, .L424+4
- 7984 0014 FFF7FEFF 		bl	Mount_SD
- 7985              	.LVL751:
-3283:Src/main.c    **** 		{
- 7986              		.loc 1 3283 3 is_stmt 1 view .LVU2521
-3283:Src/main.c    **** 		{
- 7987              		.loc 1 3283 6 is_stmt 0 view .LVU2522
- 7988 0018 08B1     		cbz	r0, .L423
-3293:Src/main.c    **** 		}
- 7989              		.loc 1 3293 11 view .LVU2523
- 7990 001a 0120     		movs	r0, #1
- 7991              	.LVL752:
-3293:Src/main.c    **** 		}
- 7992              		.loc 1 3293 11 view .LVU2524
- 7993 001c F8E7     		b	.L417
- 7994              	.LVL753:
- 7995              	.L423:
-3286:Src/main.c    **** 			fgoto+=DL_8;
- 7996              		.loc 1 3286 4 is_stmt 1 view .LVU2525
-3286:Src/main.c    **** 			fgoto+=DL_8;
- 7997              		.loc 1 3286 11 is_stmt 0 view .LVU2526
- 7998 001e 094D     		ldr	r5, .L424+8
- 7999 0020 2B68     		ldr	r3, [r5]
- 8000 0022 1E22     		movs	r2, #30
- 8001 0024 2146     		mov	r1, r4
- 8002 0026 0848     		ldr	r0, .L424+12
- 8003              	.LVL754:
-3286:Src/main.c    **** 			fgoto+=DL_8;
-ARM GAS  /tmp/ccwR4KB7.s 			page 526
+ 8460      5400
+ 8461              		.section	.text.SD_SAVE,"ax",%progbits
+ 8462              		.align	1
+ 8463              		.global	SD_SAVE
+ 8464              		.syntax unified
+ 8465              		.thumb
+ 8466              		.thumb_func
+ 8468              	SD_SAVE:
+ 8469              	.LVL808:
+ 8470              	.LFB1232:
+3545:Src/main.c    **** 	int test=0;
+ 8471              		.loc 1 3545 1 is_stmt 1 view -0
+ 8472              		.cfi_startproc
+ 8473              		@ args = 0, pretend = 0, frame = 0
+ 8474              		@ frame_needed = 0, uses_anonymous_args = 0
+3545:Src/main.c    **** 	int test=0;
+ 8475              		.loc 1 3545 1 is_stmt 0 view .LVU2650
+ 8476 0000 10B5     		push	{r4, lr}
+ 8477              	.LCFI73:
+ 8478              		.cfi_def_cfa_offset 8
+ 8479              		.cfi_offset 4, -8
+ 8480              		.cfi_offset 14, -4
+ 8481 0002 0446     		mov	r4, r0
+3546:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
+ 8482              		.loc 1 3546 2 is_stmt 1 view .LVU2651
+ 8483              	.LVL809:
+3547:Src/main.c    **** 	{
+ 8484              		.loc 1 3547 2 view .LVU2652
+3547:Src/main.c    **** 	{
+ 8485              		.loc 1 3547 6 is_stmt 0 view .LVU2653
+ 8486 0004 0121     		movs	r1, #1
+ 8487 0006 0A48     		ldr	r0, .L452
+ 8488              	.LVL810:
+3547:Src/main.c    **** 	{
+ 8489              		.loc 1 3547 6 view .LVU2654
+ 8490 0008 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 8491              	.LVL811:
+3547:Src/main.c    **** 	{
+ 8492              		.loc 1 3547 5 discriminator 1 view .LVU2655
+ 8493 000c 08B1     		cbz	r0, .L450
+3564:Src/main.c    **** 	}
+ 8494              		.loc 1 3564 10 view .LVU2656
+ 8495 000e 0120     		movs	r0, #1
+ 8496              	.LVL812:
+ 8497              	.L445:
+3566:Src/main.c    **** 
+ 8498              		.loc 1 3566 1 view .LVU2657
+ 8499 0010 10BD     		pop	{r4, pc}
+ 8500              	.LVL813:
+ 8501              	.L450:
+3549:Src/main.c    **** 		if (test == 0) //0 - suc
+ 8502              		.loc 1 3549 3 is_stmt 1 view .LVU2658
+3549:Src/main.c    **** 		if (test == 0) //0 - suc
+ 8503              		.loc 1 3549 10 is_stmt 0 view .LVU2659
+ 8504 0012 0848     		ldr	r0, .L452+4
+ 8505 0014 FFF7FEFF 		bl	Mount_SD
+ 8506              	.LVL814:
+ARM GAS  /tmp/ccEQxcUB.s 			page 542
 
 
- 8004              		.loc 1 3286 11 view .LVU2527
- 8005 0028 FFF7FEFF 		bl	Seek_Read_File
- 8006              	.LVL755:
-3287:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
- 8007              		.loc 1 3287 4 is_stmt 1 view .LVU2528
-3287:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
- 8008              		.loc 1 3287 9 is_stmt 0 view .LVU2529
- 8009 002c 2B68     		ldr	r3, [r5]
- 8010 002e 1E33     		adds	r3, r3, #30
- 8011 0030 2B60     		str	r3, [r5]
-3288:Src/main.c    **** 			return test;
- 8012              		.loc 1 3288 4 is_stmt 1 view .LVU2530
-3288:Src/main.c    **** 			return test;
- 8013              		.loc 1 3288 11 is_stmt 0 view .LVU2531
- 8014 0032 0348     		ldr	r0, .L424+4
- 8015 0034 FFF7FEFF 		bl	Unmount_SD
- 8016              	.LVL756:
-3289:Src/main.c    **** 		}
- 8017              		.loc 1 3289 4 is_stmt 1 view .LVU2532
-3289:Src/main.c    **** 		}
- 8018              		.loc 1 3289 11 is_stmt 0 view .LVU2533
- 8019 0038 EAE7     		b	.L417
- 8020              	.L425:
- 8021 003a 00BF     		.align	2
- 8022              	.L424:
- 8023 003c 000C0240 		.word	1073875968
- 8024 0040 00000000 		.word	.LC0
- 8025 0044 00000000 		.word	fgoto
- 8026 0048 00000000 		.word	.LC2
- 8027              		.cfi_endproc
- 8028              	.LFE1228:
- 8030              		.section	.text.SD_REMOVE,"ax",%progbits
- 8031              		.align	1
- 8032              		.global	SD_REMOVE
- 8033              		.syntax unified
- 8034              		.thumb
- 8035              		.thumb_func
- 8037              	SD_REMOVE:
- 8038              	.LFB1229:
-3317:Src/main.c    **** 	int test=0;
- 8039              		.loc 1 3317 1 is_stmt 1 view -0
- 8040              		.cfi_startproc
- 8041              		@ args = 0, pretend = 0, frame = 0
- 8042              		@ frame_needed = 0, uses_anonymous_args = 0
- 8043 0000 10B5     		push	{r4, lr}
- 8044              	.LCFI73:
- 8045              		.cfi_def_cfa_offset 8
- 8046              		.cfi_offset 4, -8
- 8047              		.cfi_offset 14, -4
-3318:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- 8048              		.loc 1 3318 2 view .LVU2535
- 8049              	.LVL757:
-3319:Src/main.c    **** 	{
- 8050              		.loc 1 3319 2 view .LVU2536
-3319:Src/main.c    **** 	{
- 8051              		.loc 1 3319 6 is_stmt 0 view .LVU2537
- 8052 0002 0121     		movs	r1, #1
-ARM GAS  /tmp/ccwR4KB7.s 			page 527
+3550:Src/main.c    **** 		{
+ 8507              		.loc 1 3550 3 is_stmt 1 view .LVU2660
+3550:Src/main.c    **** 		{
+ 8508              		.loc 1 3550 6 is_stmt 0 view .LVU2661
+ 8509 0018 08B1     		cbz	r0, .L451
+3559:Src/main.c    **** 		}
+ 8510              		.loc 1 3559 11 view .LVU2662
+ 8511 001a 0120     		movs	r0, #1
+ 8512              	.LVL815:
+3559:Src/main.c    **** 		}
+ 8513              		.loc 1 3559 11 view .LVU2663
+ 8514 001c F8E7     		b	.L445
+ 8515              	.LVL816:
+ 8516              	.L451:
+3553:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8517              		.loc 1 3553 4 is_stmt 1 view .LVU2664
+3553:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8518              		.loc 1 3553 11 is_stmt 0 view .LVU2665
+ 8519 001e 1E22     		movs	r2, #30
+ 8520 0020 2146     		mov	r1, r4
+ 8521 0022 0548     		ldr	r0, .L452+8
+ 8522              	.LVL817:
+3553:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8523              		.loc 1 3553 11 view .LVU2666
+ 8524 0024 FFF7FEFF 		bl	Update_File_byte
+ 8525              	.LVL818:
+3554:Src/main.c    **** 			return test;
+ 8526              		.loc 1 3554 4 is_stmt 1 view .LVU2667
+3554:Src/main.c    **** 			return test;
+ 8527              		.loc 1 3554 11 is_stmt 0 view .LVU2668
+ 8528 0028 0248     		ldr	r0, .L452+4
+ 8529 002a FFF7FEFF 		bl	Unmount_SD
+ 8530              	.LVL819:
+3555:Src/main.c    **** 		}
+ 8531              		.loc 1 3555 4 is_stmt 1 view .LVU2669
+3555:Src/main.c    **** 		}
+ 8532              		.loc 1 3555 11 is_stmt 0 view .LVU2670
+ 8533 002e EFE7     		b	.L445
+ 8534              	.L453:
+ 8535              		.align	2
+ 8536              	.L452:
+ 8537 0030 000C0240 		.word	1073875968
+ 8538 0034 00000000 		.word	.LC0
+ 8539 0038 00000000 		.word	.LC2
+ 8540              		.cfi_endproc
+ 8541              	.LFE1232:
+ 8543              		.section	.text.SD_READ,"ax",%progbits
+ 8544              		.align	1
+ 8545              		.global	SD_READ
+ 8546              		.syntax unified
+ 8547              		.thumb
+ 8548              		.thumb_func
+ 8550              	SD_READ:
+ 8551              	.LVL820:
+ 8552              	.LFB1233:
+3576:Src/main.c    **** 	int test=0;
+ 8553              		.loc 1 3576 1 is_stmt 1 view -0
+ARM GAS  /tmp/ccEQxcUB.s 			page 543
 
 
- 8053 0004 0B48     		ldr	r0, .L433
- 8054 0006 FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 8055              	.LVL758:
-3319:Src/main.c    **** 	{
- 8056              		.loc 1 3319 5 discriminator 1 view .LVU2538
- 8057 000a 08B1     		cbz	r0, .L431
-3337:Src/main.c    **** 	}
- 8058              		.loc 1 3337 10 view .LVU2539
- 8059 000c 0120     		movs	r0, #1
- 8060              	.LVL759:
- 8061              	.L426:
-3339:Src/main.c    **** 
- 8062              		.loc 1 3339 1 view .LVU2540
- 8063 000e 10BD     		pop	{r4, pc}
- 8064              	.LVL760:
- 8065              	.L431:
-3321:Src/main.c    **** 		if (test==FR_OK)
- 8066              		.loc 1 3321 3 is_stmt 1 view .LVU2541
-3321:Src/main.c    **** 		if (test==FR_OK)
- 8067              		.loc 1 3321 10 is_stmt 0 view .LVU2542
- 8068 0010 0948     		ldr	r0, .L433+4
- 8069 0012 FFF7FEFF 		bl	Mount_SD
- 8070              	.LVL761:
-3322:Src/main.c    **** 		{	
- 8071              		.loc 1 3322 3 is_stmt 1 view .LVU2543
-3322:Src/main.c    **** 		{	
- 8072              		.loc 1 3322 6 is_stmt 0 view .LVU2544
- 8073 0016 08B1     		cbz	r0, .L432
-3332:Src/main.c    **** 		}
- 8074              		.loc 1 3332 11 view .LVU2545
- 8075 0018 0120     		movs	r0, #1
- 8076              	.LVL762:
-3332:Src/main.c    **** 		}
- 8077              		.loc 1 3332 11 view .LVU2546
- 8078 001a F8E7     		b	.L426
- 8079              	.LVL763:
- 8080              	.L432:
-3324:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
- 8081              		.loc 1 3324 4 is_stmt 1 view .LVU2547
-3324:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
- 8082              		.loc 1 3324 11 is_stmt 0 view .LVU2548
- 8083 001c 074C     		ldr	r4, .L433+8
- 8084 001e 2046     		mov	r0, r4
- 8085              	.LVL764:
-3324:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
- 8086              		.loc 1 3324 11 view .LVU2549
- 8087 0020 FFF7FEFF 		bl	Remove_File
- 8088              	.LVL765:
-3325:Src/main.c    **** 			//test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
- 8089              		.loc 1 3325 4 is_stmt 1 view .LVU2550
-3325:Src/main.c    **** 			//test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
- 8090              		.loc 1 3325 11 is_stmt 0 view .LVU2551
- 8091 0024 2046     		mov	r0, r4
- 8092 0026 FFF7FEFF 		bl	Create_File
- 8093              	.LVL766:
-3327:Src/main.c    **** 			return test;
- 8094              		.loc 1 3327 4 is_stmt 1 view .LVU2552
-ARM GAS  /tmp/ccwR4KB7.s 			page 528
+ 8554              		.cfi_startproc
+ 8555              		@ args = 0, pretend = 0, frame = 0
+ 8556              		@ frame_needed = 0, uses_anonymous_args = 0
+3576:Src/main.c    **** 	int test=0;
+ 8557              		.loc 1 3576 1 is_stmt 0 view .LVU2672
+ 8558 0000 38B5     		push	{r3, r4, r5, lr}
+ 8559              	.LCFI74:
+ 8560              		.cfi_def_cfa_offset 16
+ 8561              		.cfi_offset 3, -16
+ 8562              		.cfi_offset 4, -12
+ 8563              		.cfi_offset 5, -8
+ 8564              		.cfi_offset 14, -4
+ 8565 0002 0446     		mov	r4, r0
+3577:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
+ 8566              		.loc 1 3577 2 is_stmt 1 view .LVU2673
+ 8567              	.LVL821:
+3578:Src/main.c    **** 	{
+ 8568              		.loc 1 3578 2 view .LVU2674
+3578:Src/main.c    **** 	{
+ 8569              		.loc 1 3578 6 is_stmt 0 view .LVU2675
+ 8570 0004 0121     		movs	r1, #1
+ 8571 0006 0D48     		ldr	r0, .L461
+ 8572              	.LVL822:
+3578:Src/main.c    **** 	{
+ 8573              		.loc 1 3578 6 view .LVU2676
+ 8574 0008 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 8575              	.LVL823:
+3578:Src/main.c    **** 	{
+ 8576              		.loc 1 3578 5 discriminator 1 view .LVU2677
+ 8577 000c 08B1     		cbz	r0, .L459
+3596:Src/main.c    **** 	}
+ 8578              		.loc 1 3596 10 view .LVU2678
+ 8579 000e 0120     		movs	r0, #1
+ 8580              	.LVL824:
+ 8581              	.L454:
+3612:Src/main.c    **** 
+ 8582              		.loc 1 3612 1 view .LVU2679
+ 8583 0010 38BD     		pop	{r3, r4, r5, pc}
+ 8584              	.LVL825:
+ 8585              	.L459:
+3580:Src/main.c    **** 		if (test == 0) //0 - suc
+ 8586              		.loc 1 3580 3 is_stmt 1 view .LVU2680
+3580:Src/main.c    **** 		if (test == 0) //0 - suc
+ 8587              		.loc 1 3580 10 is_stmt 0 view .LVU2681
+ 8588 0012 0B48     		ldr	r0, .L461+4
+ 8589 0014 FFF7FEFF 		bl	Mount_SD
+ 8590              	.LVL826:
+3581:Src/main.c    **** 		{
+ 8591              		.loc 1 3581 3 is_stmt 1 view .LVU2682
+3581:Src/main.c    **** 		{
+ 8592              		.loc 1 3581 6 is_stmt 0 view .LVU2683
+ 8593 0018 08B1     		cbz	r0, .L460
+3591:Src/main.c    **** 		}
+ 8594              		.loc 1 3591 11 view .LVU2684
+ 8595 001a 0120     		movs	r0, #1
+ 8596              	.LVL827:
+3591:Src/main.c    **** 		}
+ARM GAS  /tmp/ccEQxcUB.s 			page 544
 
 
-3327:Src/main.c    **** 			return test;
- 8095              		.loc 1 3327 11 is_stmt 0 view .LVU2553
- 8096 002a 0348     		ldr	r0, .L433+4
- 8097 002c FFF7FEFF 		bl	Unmount_SD
- 8098              	.LVL767:
-3328:Src/main.c    **** 		}
- 8099              		.loc 1 3328 4 is_stmt 1 view .LVU2554
-3328:Src/main.c    **** 		}
- 8100              		.loc 1 3328 11 is_stmt 0 view .LVU2555
- 8101 0030 EDE7     		b	.L426
- 8102              	.L434:
- 8103 0032 00BF     		.align	2
- 8104              	.L433:
- 8105 0034 000C0240 		.word	1073875968
- 8106 0038 00000000 		.word	.LC0
- 8107 003c 00000000 		.word	.LC2
- 8108              		.cfi_endproc
- 8109              	.LFE1229:
- 8111              		.section	.text.USART_TX,"ax",%progbits
- 8112              		.align	1
- 8113              		.global	USART_TX
- 8114              		.syntax unified
- 8115              		.thumb
- 8116              		.thumb_func
- 8118              	USART_TX:
- 8119              	.LVL768:
- 8120              	.LFB1230:
-3343:Src/main.c    ****   uint16_t ind = 0;
- 8121              		.loc 1 3343 1 is_stmt 1 view -0
- 8122              		.cfi_startproc
- 8123              		@ args = 0, pretend = 0, frame = 0
- 8124              		@ frame_needed = 0, uses_anonymous_args = 0
- 8125              		@ link register save eliminated.
-3343:Src/main.c    ****   uint16_t ind = 0;
- 8126              		.loc 1 3343 1 is_stmt 0 view .LVU2557
- 8127 0000 8C46     		mov	ip, r1
-3344:Src/main.c    ****   while (ind<sz)
- 8128              		.loc 1 3344 3 is_stmt 1 view .LVU2558
- 8129              	.LVL769:
-3345:Src/main.c    ****   {
- 8130              		.loc 1 3345 3 view .LVU2559
-3344:Src/main.c    ****   while (ind<sz)
- 8131              		.loc 1 3344 12 is_stmt 0 view .LVU2560
- 8132 0002 0022     		movs	r2, #0
-3345:Src/main.c    ****   {
- 8133              		.loc 1 3345 9 view .LVU2561
- 8134 0004 0CE0     		b	.L436
- 8135              	.LVL770:
- 8136              	.L437:
-3347:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
- 8137              		.loc 1 3347 12 discriminator 1 view .LVU2562
- 8138 0006 33B9     		cbnz	r3, .L439
- 8139              	.L438:
-3347:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
- 8140              		.loc 1 3347 49 is_stmt 1 discriminator 1 view .LVU2563
-3347:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
- 8141              		.loc 1 3347 12 discriminator 1 view .LVU2564
-ARM GAS  /tmp/ccwR4KB7.s 			page 529
+ 8597              		.loc 1 3591 11 view .LVU2685
+ 8598 001c F8E7     		b	.L454
+ 8599              	.LVL828:
+ 8600              	.L460:
+3584:Src/main.c    **** 			fgoto+=DL_8;
+ 8601              		.loc 1 3584 4 is_stmt 1 view .LVU2686
+3584:Src/main.c    **** 			fgoto+=DL_8;
+ 8602              		.loc 1 3584 11 is_stmt 0 view .LVU2687
+ 8603 001e 094D     		ldr	r5, .L461+8
+ 8604 0020 2B68     		ldr	r3, [r5]
+ 8605 0022 1E22     		movs	r2, #30
+ 8606 0024 2146     		mov	r1, r4
+ 8607 0026 0848     		ldr	r0, .L461+12
+ 8608              	.LVL829:
+3584:Src/main.c    **** 			fgoto+=DL_8;
+ 8609              		.loc 1 3584 11 view .LVU2688
+ 8610 0028 FFF7FEFF 		bl	Seek_Read_File
+ 8611              	.LVL830:
+3585:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8612              		.loc 1 3585 4 is_stmt 1 view .LVU2689
+3585:Src/main.c    **** 			test = Unmount_SD("/"); // 0 - succ
+ 8613              		.loc 1 3585 9 is_stmt 0 view .LVU2690
+ 8614 002c 2B68     		ldr	r3, [r5]
+ 8615 002e 1E33     		adds	r3, r3, #30
+ 8616 0030 2B60     		str	r3, [r5]
+3586:Src/main.c    **** 			return test;
+ 8617              		.loc 1 3586 4 is_stmt 1 view .LVU2691
+3586:Src/main.c    **** 			return test;
+ 8618              		.loc 1 3586 11 is_stmt 0 view .LVU2692
+ 8619 0032 0348     		ldr	r0, .L461+4
+ 8620 0034 FFF7FEFF 		bl	Unmount_SD
+ 8621              	.LVL831:
+3587:Src/main.c    **** 		}
+ 8622              		.loc 1 3587 4 is_stmt 1 view .LVU2693
+3587:Src/main.c    **** 		}
+ 8623              		.loc 1 3587 11 is_stmt 0 view .LVU2694
+ 8624 0038 EAE7     		b	.L454
+ 8625              	.L462:
+ 8626 003a 00BF     		.align	2
+ 8627              	.L461:
+ 8628 003c 000C0240 		.word	1073875968
+ 8629 0040 00000000 		.word	.LC0
+ 8630 0044 00000000 		.word	fgoto
+ 8631 0048 00000000 		.word	.LC2
+ 8632              		.cfi_endproc
+ 8633              	.LFE1233:
+ 8635              		.section	.text.SD_REMOVE,"ax",%progbits
+ 8636              		.align	1
+ 8637              		.global	SD_REMOVE
+ 8638              		.syntax unified
+ 8639              		.thumb
+ 8640              		.thumb_func
+ 8642              	SD_REMOVE:
+ 8643              	.LFB1234:
+3615:Src/main.c    **** 	int test=0;
+ 8644              		.loc 1 3615 1 is_stmt 1 view -0
+ 8645              		.cfi_startproc
+ARM GAS  /tmp/ccEQxcUB.s 			page 545
 
 
- 8142              	.LVL771:
- 8143              	.LBB590:
- 8144              	.LBI590:
+ 8646              		@ args = 0, pretend = 0, frame = 0
+ 8647              		@ frame_needed = 0, uses_anonymous_args = 0
+ 8648 0000 10B5     		push	{r4, lr}
+ 8649              	.LCFI75:
+ 8650              		.cfi_def_cfa_offset 8
+ 8651              		.cfi_offset 4, -8
+ 8652              		.cfi_offset 14, -4
+3616:Src/main.c    **** 	if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
+ 8653              		.loc 1 3616 2 view .LVU2696
+ 8654              	.LVL832:
+3617:Src/main.c    **** 	{
+ 8655              		.loc 1 3617 2 view .LVU2697
+3617:Src/main.c    **** 	{
+ 8656              		.loc 1 3617 6 is_stmt 0 view .LVU2698
+ 8657 0002 0121     		movs	r1, #1
+ 8658 0004 0B48     		ldr	r0, .L470
+ 8659 0006 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 8660              	.LVL833:
+3617:Src/main.c    **** 	{
+ 8661              		.loc 1 3617 5 discriminator 1 view .LVU2699
+ 8662 000a 08B1     		cbz	r0, .L468
+3635:Src/main.c    **** 	}
+ 8663              		.loc 1 3635 10 view .LVU2700
+ 8664 000c 0120     		movs	r0, #1
+ 8665              	.LVL834:
+ 8666              	.L463:
+3637:Src/main.c    **** 
+ 8667              		.loc 1 3637 1 view .LVU2701
+ 8668 000e 10BD     		pop	{r4, pc}
+ 8669              	.LVL835:
+ 8670              	.L468:
+3619:Src/main.c    **** 		if (test==FR_OK)
+ 8671              		.loc 1 3619 3 is_stmt 1 view .LVU2702
+3619:Src/main.c    **** 		if (test==FR_OK)
+ 8672              		.loc 1 3619 10 is_stmt 0 view .LVU2703
+ 8673 0010 0948     		ldr	r0, .L470+4
+ 8674 0012 FFF7FEFF 		bl	Mount_SD
+ 8675              	.LVL836:
+3620:Src/main.c    **** 		{	
+ 8676              		.loc 1 3620 3 is_stmt 1 view .LVU2704
+3620:Src/main.c    **** 		{	
+ 8677              		.loc 1 3620 6 is_stmt 0 view .LVU2705
+ 8678 0016 08B1     		cbz	r0, .L469
+3630:Src/main.c    **** 		}
+ 8679              		.loc 1 3630 11 view .LVU2706
+ 8680 0018 0120     		movs	r0, #1
+ 8681              	.LVL837:
+3630:Src/main.c    **** 		}
+ 8682              		.loc 1 3630 11 view .LVU2707
+ 8683 001a F8E7     		b	.L463
+ 8684              	.LVL838:
+ 8685              	.L469:
+3622:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
+ 8686              		.loc 1 3622 4 is_stmt 1 view .LVU2708
+3622:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
+ 8687              		.loc 1 3622 11 is_stmt 0 view .LVU2709
+ 8688 001c 074C     		ldr	r4, .L470+8
+ARM GAS  /tmp/ccEQxcUB.s 			page 546
+
+
+ 8689 001e 2046     		mov	r0, r4
+ 8690              	.LVL839:
+3622:Src/main.c    **** 			test = Create_File("FILE1.TXT"); // 0 -suc
+ 8691              		.loc 1 3622 11 view .LVU2710
+ 8692 0020 FFF7FEFF 		bl	Remove_File
+ 8693              	.LVL840:
+3623:Src/main.c    **** 			//test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
+ 8694              		.loc 1 3623 4 is_stmt 1 view .LVU2711
+3623:Src/main.c    **** 			//test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
+ 8695              		.loc 1 3623 11 is_stmt 0 view .LVU2712
+ 8696 0024 2046     		mov	r0, r4
+ 8697 0026 FFF7FEFF 		bl	Create_File
+ 8698              	.LVL841:
+3625:Src/main.c    **** 			return test;
+ 8699              		.loc 1 3625 4 is_stmt 1 view .LVU2713
+3625:Src/main.c    **** 			return test;
+ 8700              		.loc 1 3625 11 is_stmt 0 view .LVU2714
+ 8701 002a 0348     		ldr	r0, .L470+4
+ 8702 002c FFF7FEFF 		bl	Unmount_SD
+ 8703              	.LVL842:
+3626:Src/main.c    **** 		}
+ 8704              		.loc 1 3626 4 is_stmt 1 view .LVU2715
+3626:Src/main.c    **** 		}
+ 8705              		.loc 1 3626 11 is_stmt 0 view .LVU2716
+ 8706 0030 EDE7     		b	.L463
+ 8707              	.L471:
+ 8708 0032 00BF     		.align	2
+ 8709              	.L470:
+ 8710 0034 000C0240 		.word	1073875968
+ 8711 0038 00000000 		.word	.LC0
+ 8712 003c 00000000 		.word	.LC2
+ 8713              		.cfi_endproc
+ 8714              	.LFE1234:
+ 8716              		.section	.text.USART_TX,"ax",%progbits
+ 8717              		.align	1
+ 8718              		.global	USART_TX
+ 8719              		.syntax unified
+ 8720              		.thumb
+ 8721              		.thumb_func
+ 8723              	USART_TX:
+ 8724              	.LVL843:
+ 8725              	.LFB1235:
+3641:Src/main.c    ****   uint16_t ind = 0;
+ 8726              		.loc 1 3641 1 is_stmt 1 view -0
+ 8727              		.cfi_startproc
+ 8728              		@ args = 0, pretend = 0, frame = 0
+ 8729              		@ frame_needed = 0, uses_anonymous_args = 0
+ 8730              		@ link register save eliminated.
+3641:Src/main.c    ****   uint16_t ind = 0;
+ 8731              		.loc 1 3641 1 is_stmt 0 view .LVU2718
+ 8732 0000 8C46     		mov	ip, r1
+3642:Src/main.c    ****   while (ind<sz)
+ 8733              		.loc 1 3642 3 is_stmt 1 view .LVU2719
+ 8734              	.LVL844:
+3643:Src/main.c    ****   {
+ 8735              		.loc 1 3643 3 view .LVU2720
+3642:Src/main.c    ****   while (ind<sz)
+ARM GAS  /tmp/ccEQxcUB.s 			page 547
+
+
+ 8736              		.loc 1 3642 12 is_stmt 0 view .LVU2721
+ 8737 0002 0022     		movs	r2, #0
+3643:Src/main.c    ****   {
+ 8738              		.loc 1 3643 9 view .LVU2722
+ 8739 0004 0CE0     		b	.L473
+ 8740              	.LVL845:
+ 8741              	.L474:
+3645:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
+ 8742              		.loc 1 3645 12 discriminator 1 view .LVU2723
+ 8743 0006 33B9     		cbnz	r3, .L476
+ 8744              	.L475:
+3645:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
+ 8745              		.loc 1 3645 49 is_stmt 1 discriminator 1 view .LVU2724
+3645:Src/main.c    ****     LL_USART_TransmitData8(USART1,*(uint8_t*)(dt+ind));
+ 8746              		.loc 1 3645 12 discriminator 1 view .LVU2725
+ 8747              	.LVL846:
+ 8748              	.LBB627:
+ 8749              	.LBI627:
 2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 8145              		.loc 7 2662 26 view .LVU2565
- 8146              	.LBB591:
+ 8750              		.loc 7 2662 26 view .LVU2726
+ 8751              	.LBB628:
 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 8147              		.loc 7 2664 3 view .LVU2566
+ 8752              		.loc 7 2664 3 view .LVU2727
 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 8148              		.loc 7 2664 12 is_stmt 0 view .LVU2567
- 8149 0008 074B     		ldr	r3, .L440
- 8150 000a DB69     		ldr	r3, [r3, #28]
+ 8753              		.loc 7 2664 12 is_stmt 0 view .LVU2728
+ 8754 0008 074B     		ldr	r3, .L477
+ 8755 000a DB69     		ldr	r3, [r3, #28]
 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 8151              		.loc 7 2664 75 view .LVU2568
- 8152 000c 13F08003 		ands	r3, r3, #128
- 8153 0010 F9D0     		beq	.L437
+ 8756              		.loc 7 2664 75 view .LVU2729
+ 8757 000c 13F08003 		ands	r3, r3, #128
+ 8758 0010 F9D0     		beq	.L474
 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 8154              		.loc 7 2664 75 discriminator 1 view .LVU2569
- 8155 0012 0123     		movs	r3, #1
- 8156 0014 F7E7     		b	.L437
- 8157              	.LVL772:
- 8158              	.L439:
+ 8759              		.loc 7 2664 75 discriminator 1 view .LVU2730
+ 8760 0012 0123     		movs	r3, #1
+ 8761 0014 F7E7     		b	.L474
+ 8762              	.LVL847:
+ 8763              	.L476:
 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 8159              		.loc 7 2664 75 discriminator 1 view .LVU2570
- 8160              	.LBE591:
- 8161              	.LBE590:
-3348:Src/main.c    ****     ind++;
- 8162              		.loc 1 3348 5 is_stmt 1 view .LVU2571
- 8163 0016 815C     		ldrb	r1, [r0, r2]	@ zero_extendqisi2
- 8164              	.LVL773:
- 8165              	.LBB592:
- 8166              	.LBI592:
+ 8764              		.loc 7 2664 75 discriminator 1 view .LVU2731
+ 8765              	.LBE628:
+ 8766              	.LBE627:
+3646:Src/main.c    ****     ind++;
+ 8767              		.loc 1 3646 5 is_stmt 1 view .LVU2732
+ 8768 0016 815C     		ldrb	r1, [r0, r2]	@ zero_extendqisi2
+ 8769              	.LVL848:
+ 8770              	.LBB629:
+ 8771              	.LBI629:
 3559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -31723,6 +32818,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
 3568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ARM GAS  /tmp/ccEQxcUB.s 			page 548
+
+
 3569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
 3570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -31738,9 +32836,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-ARM GAS  /tmp/ccwR4KB7.s 			page 530
-
-
 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable DMA Disabling on Reception Error
 3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          DDRE          LL_USART_EnableDMADeactOnRxErr
 3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -31783,6 +32878,9 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_DMA_REG_DATA_RECEIVE
 3624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Address of data register
 3625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
+ARM GAS  /tmp/ccEQxcUB.s 			page 549
+
+
 3626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx, uint32_t Direction)
 3627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   uint32_t data_reg_addr;
@@ -31798,9 +32896,6 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****     data_reg_addr = (uint32_t) &(USARTx->RDR);
 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   }
 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 531
-
-
 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return data_reg_addr;
 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -31842,6305 +32937,6960 @@ ARM GAS  /tmp/ccwR4KB7.s 			page 1
 3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
- 8167              		.loc 7 3681 22 view .LVU2572
- 8168              	.LBB593:
+ 8772              		.loc 7 3681 22 view .LVU2733
+ARM GAS  /tmp/ccEQxcUB.s 			page 550
+
+
+ 8773              	.LBB630:
 3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   USARTx->TDR = Value;
- 8169              		.loc 7 3683 3 view .LVU2573
- 8170              		.loc 7 3683 15 is_stmt 0 view .LVU2574
- 8171 0018 034B     		ldr	r3, .L440
- 8172 001a 9962     		str	r1, [r3, #40]
- 8173              	.LVL774:
- 8174              		.loc 7 3683 15 view .LVU2575
- 8175              	.LBE593:
- 8176              	.LBE592:
-3349:Src/main.c    ****   }
- 8177              		.loc 1 3349 5 is_stmt 1 view .LVU2576
-3349:Src/main.c    ****   }
- 8178              		.loc 1 3349 8 is_stmt 0 view .LVU2577
-ARM GAS  /tmp/ccwR4KB7.s 			page 532
+ 8774              		.loc 7 3683 3 view .LVU2734
+ 8775              		.loc 7 3683 15 is_stmt 0 view .LVU2735
+ 8776 0018 034B     		ldr	r3, .L477
+ 8777 001a 9962     		str	r1, [r3, #40]
+ 8778              	.LVL849:
+ 8779              		.loc 7 3683 15 view .LVU2736
+ 8780              	.LBE630:
+ 8781              	.LBE629:
+3647:Src/main.c    ****   }
+ 8782              		.loc 1 3647 5 is_stmt 1 view .LVU2737
+3647:Src/main.c    ****   }
+ 8783              		.loc 1 3647 8 is_stmt 0 view .LVU2738
+ 8784 001c 0132     		adds	r2, r2, #1
+ 8785              	.LVL850:
+3647:Src/main.c    ****   }
+ 8786              		.loc 1 3647 8 view .LVU2739
+ 8787 001e 92B2     		uxth	r2, r2
+ 8788              	.LVL851:
+ 8789              	.L473:
+3643:Src/main.c    ****   {
+ 8790              		.loc 1 3643 13 is_stmt 1 view .LVU2740
+ 8791 0020 6245     		cmp	r2, ip
+ 8792 0022 F1D3     		bcc	.L475
+3649:Src/main.c    **** 
+ 8793              		.loc 1 3649 1 is_stmt 0 view .LVU2741
+ 8794 0024 7047     		bx	lr
+ 8795              	.L478:
+ 8796 0026 00BF     		.align	2
+ 8797              	.L477:
+ 8798 0028 00100140 		.word	1073811456
+ 8799              		.cfi_endproc
+ 8800              	.LFE1235:
+ 8802              		.section	.text.USART_TX_DMA,"ax",%progbits
+ 8803              		.align	1
+ 8804              		.global	USART_TX_DMA
+ 8805              		.syntax unified
+ 8806              		.thumb
+ 8807              		.thumb_func
+ 8809              	USART_TX_DMA:
+ 8810              	.LFB1236:
+3652:Src/main.c    **** 	while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter
+ 8811              		.loc 1 3652 1 is_stmt 1 view -0
+ 8812              		.cfi_startproc
+ 8813              		@ args = 0, pretend = 0, frame = 0
+ 8814              		@ frame_needed = 0, uses_anonymous_args = 0
+ 8815              		@ link register save eliminated.
+ 8816              	.LVL852:
+ 8817              	.L480:
+3653:Src/main.c    **** 	LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
+ 8818              		.loc 1 3653 20 discriminator 1 view .LVU2743
+3653:Src/main.c    **** 	LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
+ 8819              		.loc 1 3653 9 discriminator 1 view .LVU2744
+ 8820 0000 0D4B     		ldr	r3, .L481
+ 8821 0002 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ARM GAS  /tmp/ccEQxcUB.s 			page 551
 
 
- 8179 001c 0132     		adds	r2, r2, #1
- 8180              	.LVL775:
-3349:Src/main.c    ****   }
- 8181              		.loc 1 3349 8 view .LVU2578
- 8182 001e 92B2     		uxth	r2, r2
- 8183              	.LVL776:
- 8184              	.L436:
-3345:Src/main.c    ****   {
- 8185              		.loc 1 3345 13 is_stmt 1 view .LVU2579
- 8186 0020 6245     		cmp	r2, ip
- 8187 0022 F1D3     		bcc	.L438
-3351:Src/main.c    **** 
- 8188              		.loc 1 3351 1 is_stmt 0 view .LVU2580
- 8189 0024 7047     		bx	lr
- 8190              	.L441:
- 8191 0026 00BF     		.align	2
- 8192              	.L440:
- 8193 0028 00100140 		.word	1073811456
- 8194              		.cfi_endproc
- 8195              	.LFE1230:
- 8197              		.section	.text.USART_TX_DMA,"ax",%progbits
- 8198              		.align	1
- 8199              		.global	USART_TX_DMA
- 8200              		.syntax unified
- 8201              		.thumb
- 8202              		.thumb_func
- 8204              	USART_TX_DMA:
- 8205              	.LFB1231:
-3354:Src/main.c    **** 	while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter
- 8206              		.loc 1 3354 1 is_stmt 1 view -0
- 8207              		.cfi_startproc
- 8208              		@ args = 0, pretend = 0, frame = 0
- 8209              		@ frame_needed = 0, uses_anonymous_args = 0
- 8210              		@ link register save eliminated.
- 8211              	.LVL777:
- 8212              	.L443:
-3355:Src/main.c    **** 	LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
- 8213              		.loc 1 3355 20 discriminator 1 view .LVU2582
-3355:Src/main.c    **** 	LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
- 8214              		.loc 1 3355 9 discriminator 1 view .LVU2583
- 8215 0000 0D4B     		ldr	r3, .L444
- 8216 0002 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 8217 0004 002B     		cmp	r3, #0
- 8218 0006 FBD1     		bne	.L443
-3356:Src/main.c    ****   LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz);
- 8219              		.loc 1 3356 2 view .LVU2584
- 8220              	.LVL778:
- 8221              	.LBB594:
- 8222              	.LBI594:
+ 8822 0004 002B     		cmp	r3, #0
+ 8823 0006 FBD1     		bne	.L480
+3654:Src/main.c    ****   LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz);
+ 8824              		.loc 1 3654 2 view .LVU2745
+ 8825              	.LVL853:
+ 8826              	.LBB631:
+ 8827              	.LBI631:
  517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8223              		.loc 6 517 22 view .LVU2585
- 8224              	.LBB595:
+ 8828              		.loc 6 517 22 view .LVU2746
+ 8829              	.LBB632:
  519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8225              		.loc 6 519 3 view .LVU2586
- 8226 0008 0C4B     		ldr	r3, .L444+4
- 8227 000a D3F8B820 		ldr	r2, [r3, #184]
- 8228 000e 22F00102 		bic	r2, r2, #1
-ARM GAS  /tmp/ccwR4KB7.s 			page 533
-
-
- 8229 0012 C3F8B820 		str	r2, [r3, #184]
- 8230              	.LVL779:
+ 8830              		.loc 6 519 3 view .LVU2747
+ 8831 0008 0C4B     		ldr	r3, .L481+4
+ 8832 000a D3F8B820 		ldr	r2, [r3, #184]
+ 8833 000e 22F00102 		bic	r2, r2, #1
+ 8834 0012 C3F8B820 		str	r2, [r3, #184]
+ 8835              	.LVL854:
  519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8231              		.loc 6 519 3 is_stmt 0 view .LVU2587
- 8232              	.LBE595:
- 8233              	.LBE594:
-3357:Src/main.c    ****   LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7);
- 8234              		.loc 1 3357 3 is_stmt 1 view .LVU2588
- 8235              	.LBB596:
- 8236              	.LBI596:
+ 8836              		.loc 6 519 3 is_stmt 0 view .LVU2748
+ 8837              	.LBE632:
+ 8838              	.LBE631:
+3655:Src/main.c    ****   LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7);
+ 8839              		.loc 1 3655 3 is_stmt 1 view .LVU2749
+ 8840              	.LBB633:
+ 8841              	.LBI633:
  971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8237              		.loc 6 971 22 view .LVU2589
- 8238              	.LBB597:
+ 8842              		.loc 6 971 22 view .LVU2750
+ 8843              	.LBB634:
  973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8239              		.loc 6 973 3 view .LVU2590
- 8240 0016 D3F8BC20 		ldr	r2, [r3, #188]
- 8241 001a 6FF30F02 		bfc	r2, #0, #16
- 8242 001e 1043     		orrs	r0, r0, r2
- 8243              	.LVL780:
+ 8844              		.loc 6 973 3 view .LVU2751
+ 8845 0016 D3F8BC20 		ldr	r2, [r3, #188]
+ 8846 001a 6FF30F02 		bfc	r2, #0, #16
+ 8847 001e 1043     		orrs	r0, r0, r2
+ 8848              	.LVL855:
  973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8244              		.loc 6 973 3 is_stmt 0 view .LVU2591
- 8245 0020 C3F8BC00 		str	r0, [r3, #188]
- 8246              	.LVL781:
+ 8849              		.loc 6 973 3 is_stmt 0 view .LVU2752
+ 8850 0020 C3F8BC00 		str	r0, [r3, #188]
+ 8851              	.LVL856:
  973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8247              		.loc 6 973 3 view .LVU2592
- 8248              	.LBE597:
- 8249              	.LBE596:
-3358:Src/main.c    **** 	u_tx_flg = 1;//indicate that transfer begin
- 8250              		.loc 1 3358 3 is_stmt 1 view .LVU2593
- 8251              	.LBB598:
- 8252              	.LBI598:
+ 8852              		.loc 6 973 3 view .LVU2753
+ 8853              	.LBE634:
+ 8854              	.LBE633:
+3656:Src/main.c    **** 	u_tx_flg = 1;//indicate that transfer begin
+ 8855              		.loc 1 3656 3 is_stmt 1 view .LVU2754
+ 8856              	.LBB635:
+ 8857              	.LBI635:
  497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8253              		.loc 6 497 22 view .LVU2594
- 8254              	.LBB599:
+ 8858              		.loc 6 497 22 view .LVU2755
+ 8859              	.LBB636:
  499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8255              		.loc 6 499 3 view .LVU2595
- 8256 0024 D3F8B820 		ldr	r2, [r3, #184]
- 8257 0028 42F00102 		orr	r2, r2, #1
- 8258 002c C3F8B820 		str	r2, [r3, #184]
- 8259              	.LVL782:
+ 8860              		.loc 6 499 3 view .LVU2756
+ 8861 0024 D3F8B820 		ldr	r2, [r3, #184]
+ 8862 0028 42F00102 		orr	r2, r2, #1
+ 8863 002c C3F8B820 		str	r2, [r3, #184]
+ 8864              	.LVL857:
  499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8260              		.loc 6 499 3 is_stmt 0 view .LVU2596
- 8261              	.LBE599:
- 8262              	.LBE598:
-3359:Src/main.c    **** }
- 8263              		.loc 1 3359 2 is_stmt 1 view .LVU2597
-3359:Src/main.c    **** }
- 8264              		.loc 1 3359 11 is_stmt 0 view .LVU2598
- 8265 0030 014B     		ldr	r3, .L444
- 8266 0032 0122     		movs	r2, #1
- 8267 0034 1A70     		strb	r2, [r3]
-3360:Src/main.c    **** 
- 8268              		.loc 1 3360 1 view .LVU2599
- 8269 0036 7047     		bx	lr
- 8270              	.L445:
- 8271              		.align	2
- 8272              	.L444:
-ARM GAS  /tmp/ccwR4KB7.s 			page 534
+ 8865              		.loc 6 499 3 is_stmt 0 view .LVU2757
+ARM GAS  /tmp/ccEQxcUB.s 			page 552
 
 
- 8273 0038 00000000 		.word	u_tx_flg
- 8274 003c 00640240 		.word	1073898496
- 8275              		.cfi_endproc
- 8276              	.LFE1231:
- 8278              		.section	.text.Error_Handler,"ax",%progbits
- 8279              		.align	1
- 8280              		.global	Error_Handler
- 8281              		.syntax unified
- 8282              		.thumb
- 8283              		.thumb_func
- 8285              	Error_Handler:
- 8286              	.LFB1233:
-3368:Src/main.c    **** //-------------------------------------------------------
-3369:Src/main.c    **** /* USER CODE END 4 */
-3370:Src/main.c    **** 
-3371:Src/main.c    **** /**
-3372:Src/main.c    ****   * @brief  This function is executed in case of error occurrence.
-3373:Src/main.c    ****   * @retval None
-3374:Src/main.c    ****   */
-3375:Src/main.c    **** void Error_Handler(void)
-3376:Src/main.c    **** {
- 8287              		.loc 1 3376 1 is_stmt 1 view -0
- 8288              		.cfi_startproc
- 8289              		@ Volatile: function does not return.
- 8290              		@ args = 0, pretend = 0, frame = 0
- 8291              		@ frame_needed = 0, uses_anonymous_args = 0
- 8292              		@ link register save eliminated.
-3377:Src/main.c    ****   /* USER CODE BEGIN Error_Handler_Debug */
-3378:Src/main.c    ****   /* User can add his own implementation to report the HAL error return state */
-3379:Src/main.c    ****   __disable_irq();
- 8293              		.loc 1 3379 3 view .LVU2601
- 8294              	.LBB600:
- 8295              	.LBI600:
+ 8866              	.LBE636:
+ 8867              	.LBE635:
+3657:Src/main.c    **** }
+ 8868              		.loc 1 3657 2 is_stmt 1 view .LVU2758
+3657:Src/main.c    **** }
+ 8869              		.loc 1 3657 11 is_stmt 0 view .LVU2759
+ 8870 0030 014B     		ldr	r3, .L481
+ 8871 0032 0122     		movs	r2, #1
+ 8872 0034 1A70     		strb	r2, [r3]
+3658:Src/main.c    **** 
+ 8873              		.loc 1 3658 1 view .LVU2760
+ 8874 0036 7047     		bx	lr
+ 8875              	.L482:
+ 8876              		.align	2
+ 8877              	.L481:
+ 8878 0038 00000000 		.word	u_tx_flg
+ 8879 003c 00640240 		.word	1073898496
+ 8880              		.cfi_endproc
+ 8881              	.LFE1236:
+ 8883              		.section	.text.Error_Handler,"ax",%progbits
+ 8884              		.align	1
+ 8885              		.global	Error_Handler
+ 8886              		.syntax unified
+ 8887              		.thumb
+ 8888              		.thumb_func
+ 8890              	Error_Handler:
+ 8891              	.LFB1238:
+3666:Src/main.c    **** //-------------------------------------------------------
+3667:Src/main.c    **** /* USER CODE END 4 */
+3668:Src/main.c    **** 
+3669:Src/main.c    **** /**
+3670:Src/main.c    ****   * @brief  This function is executed in case of error occurrence.
+3671:Src/main.c    ****   * @retval None
+3672:Src/main.c    ****   */
+3673:Src/main.c    **** void Error_Handler(void)
+3674:Src/main.c    **** {
+ 8892              		.loc 1 3674 1 is_stmt 1 view -0
+ 8893              		.cfi_startproc
+ 8894              		@ Volatile: function does not return.
+ 8895              		@ args = 0, pretend = 0, frame = 0
+ 8896              		@ frame_needed = 0, uses_anonymous_args = 0
+ 8897              		@ link register save eliminated.
+3675:Src/main.c    ****   /* USER CODE BEGIN Error_Handler_Debug */
+3676:Src/main.c    ****   /* User can add his own implementation to report the HAL error return state */
+3677:Src/main.c    ****   __disable_irq();
+ 8898              		.loc 1 3677 3 view .LVU2762
+ 8899              	.LBB637:
+ 8900              	.LBI637:
  140:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 8296              		.loc 8 140 27 view .LVU2602
- 8297              	.LBB601:
+ 8901              		.loc 8 140 27 view .LVU2763
+ 8902              	.LBB638:
  142:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 8298              		.loc 8 142 3 view .LVU2603
- 8299              		.syntax unified
- 8300              	@ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 8301 0000 72B6     		cpsid i
- 8302              	@ 0 "" 2
- 8303              		.thumb
- 8304              		.syntax unified
- 8305              	.L447:
- 8306              	.LBE601:
- 8307              	.LBE600:
-3380:Src/main.c    ****   while (1)
- 8308              		.loc 1 3380 3 view .LVU2604
-3381:Src/main.c    ****   {
-3382:Src/main.c    ****   }
- 8309              		.loc 1 3382 3 view .LVU2605
-3380:Src/main.c    ****   while (1)
- 8310              		.loc 1 3380 9 view .LVU2606
- 8311 0002 FEE7     		b	.L447
- 8312              		.cfi_endproc
- 8313              	.LFE1233:
-ARM GAS  /tmp/ccwR4KB7.s 			page 535
+ 8903              		.loc 8 142 3 view .LVU2764
+ 8904              		.syntax unified
+ 8905              	@ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 8906 0000 72B6     		cpsid i
+ 8907              	@ 0 "" 2
+ARM GAS  /tmp/ccEQxcUB.s 			page 553
 
 
- 8315              		.section	.text.MX_ADC1_Init,"ax",%progbits
- 8316              		.align	1
- 8317              		.syntax unified
- 8318              		.thumb
- 8319              		.thumb_func
- 8321              	MX_ADC1_Init:
- 8322              	.LFB1188:
- 989:Src/main.c    **** 
- 8323              		.loc 1 989 1 view -0
- 8324              		.cfi_startproc
- 8325              		@ args = 0, pretend = 0, frame = 16
- 8326              		@ frame_needed = 0, uses_anonymous_args = 0
- 8327 0000 00B5     		push	{lr}
- 8328              	.LCFI74:
- 8329              		.cfi_def_cfa_offset 4
- 8330              		.cfi_offset 14, -4
- 8331 0002 85B0     		sub	sp, sp, #20
- 8332              	.LCFI75:
- 8333              		.cfi_def_cfa_offset 24
- 995:Src/main.c    **** 
- 8334              		.loc 1 995 3 view .LVU2608
- 995:Src/main.c    **** 
- 8335              		.loc 1 995 26 is_stmt 0 view .LVU2609
- 8336 0004 0023     		movs	r3, #0
- 8337 0006 0093     		str	r3, [sp]
- 8338 0008 0193     		str	r3, [sp, #4]
- 8339 000a 0293     		str	r3, [sp, #8]
- 8340 000c 0393     		str	r3, [sp, #12]
-1003:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 8341              		.loc 1 1003 3 is_stmt 1 view .LVU2610
-1003:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 8342              		.loc 1 1003 18 is_stmt 0 view .LVU2611
- 8343 000e 2B48     		ldr	r0, .L462
- 8344 0010 2B4A     		ldr	r2, .L462+4
- 8345 0012 0260     		str	r2, [r0]
-1004:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
- 8346              		.loc 1 1004 3 is_stmt 1 view .LVU2612
-1004:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
- 8347              		.loc 1 1004 29 is_stmt 0 view .LVU2613
- 8348 0014 4FF44032 		mov	r2, #196608
- 8349 0018 4260     		str	r2, [r0, #4]
-1005:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
- 8350              		.loc 1 1005 3 is_stmt 1 view .LVU2614
-1005:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
- 8351              		.loc 1 1005 25 is_stmt 0 view .LVU2615
- 8352 001a 8360     		str	r3, [r0, #8]
-1006:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
- 8353              		.loc 1 1006 3 is_stmt 1 view .LVU2616
-1006:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
- 8354              		.loc 1 1006 27 is_stmt 0 view .LVU2617
- 8355 001c 0122     		movs	r2, #1
- 8356 001e 0261     		str	r2, [r0, #16]
-1007:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
- 8357              		.loc 1 1007 3 is_stmt 1 view .LVU2618
-1007:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
- 8358              		.loc 1 1007 33 is_stmt 0 view .LVU2619
- 8359 0020 8361     		str	r3, [r0, #24]
-ARM GAS  /tmp/ccwR4KB7.s 			page 536
+ 8908              		.thumb
+ 8909              		.syntax unified
+ 8910              	.L484:
+ 8911              	.LBE638:
+ 8912              	.LBE637:
+3678:Src/main.c    ****   while (1)
+ 8913              		.loc 1 3678 3 view .LVU2765
+3679:Src/main.c    ****   {
+3680:Src/main.c    ****   }
+ 8914              		.loc 1 3680 3 view .LVU2766
+3678:Src/main.c    ****   while (1)
+ 8915              		.loc 1 3678 9 view .LVU2767
+ 8916 0002 FEE7     		b	.L484
+ 8917              		.cfi_endproc
+ 8918              	.LFE1238:
+ 8920              		.section	.text.MX_ADC1_Init,"ax",%progbits
+ 8921              		.align	1
+ 8922              		.syntax unified
+ 8923              		.thumb
+ 8924              		.thumb_func
+ 8926              	MX_ADC1_Init:
+ 8927              	.LFB1188:
+1085:Src/main.c    **** 
+ 8928              		.loc 1 1085 1 view -0
+ 8929              		.cfi_startproc
+ 8930              		@ args = 0, pretend = 0, frame = 16
+ 8931              		@ frame_needed = 0, uses_anonymous_args = 0
+ 8932 0000 00B5     		push	{lr}
+ 8933              	.LCFI76:
+ 8934              		.cfi_def_cfa_offset 4
+ 8935              		.cfi_offset 14, -4
+ 8936 0002 85B0     		sub	sp, sp, #20
+ 8937              	.LCFI77:
+ 8938              		.cfi_def_cfa_offset 24
+1091:Src/main.c    **** 
+ 8939              		.loc 1 1091 3 view .LVU2769
+1091:Src/main.c    **** 
+ 8940              		.loc 1 1091 26 is_stmt 0 view .LVU2770
+ 8941 0004 0023     		movs	r3, #0
+ 8942 0006 0093     		str	r3, [sp]
+ 8943 0008 0193     		str	r3, [sp, #4]
+ 8944 000a 0293     		str	r3, [sp, #8]
+ 8945 000c 0393     		str	r3, [sp, #12]
+1099:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 8946              		.loc 1 1099 3 is_stmt 1 view .LVU2771
+1099:Src/main.c    ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 8947              		.loc 1 1099 18 is_stmt 0 view .LVU2772
+ 8948 000e 2B48     		ldr	r0, .L499
+ 8949 0010 2B4A     		ldr	r2, .L499+4
+ 8950 0012 0260     		str	r2, [r0]
+1100:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ 8951              		.loc 1 1100 3 is_stmt 1 view .LVU2773
+1100:Src/main.c    ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ 8952              		.loc 1 1100 29 is_stmt 0 view .LVU2774
+ 8953 0014 4FF44032 		mov	r2, #196608
+ 8954 0018 4260     		str	r2, [r0, #4]
+1101:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+ARM GAS  /tmp/ccEQxcUB.s 			page 554
 
 
-1008:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 8360              		.loc 1 1008 3 is_stmt 1 view .LVU2620
-1008:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 8361              		.loc 1 1008 36 is_stmt 0 view .LVU2621
- 8362 0022 80F82030 		strb	r3, [r0, #32]
-1009:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 8363              		.loc 1 1009 3 is_stmt 1 view .LVU2622
-1009:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 8364              		.loc 1 1009 35 is_stmt 0 view .LVU2623
- 8365 0026 C362     		str	r3, [r0, #44]
-1010:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 8366              		.loc 1 1010 3 is_stmt 1 view .LVU2624
-1010:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 8367              		.loc 1 1010 31 is_stmt 0 view .LVU2625
- 8368 0028 2649     		ldr	r1, .L462+8
- 8369 002a 8162     		str	r1, [r0, #40]
-1011:Src/main.c    ****   hadc1.Init.NbrOfConversion = 5;
- 8370              		.loc 1 1011 3 is_stmt 1 view .LVU2626
-1011:Src/main.c    ****   hadc1.Init.NbrOfConversion = 5;
- 8371              		.loc 1 1011 24 is_stmt 0 view .LVU2627
- 8372 002c C360     		str	r3, [r0, #12]
-1012:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
- 8373              		.loc 1 1012 3 is_stmt 1 view .LVU2628
-1012:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
- 8374              		.loc 1 1012 30 is_stmt 0 view .LVU2629
- 8375 002e 0521     		movs	r1, #5
- 8376 0030 C161     		str	r1, [r0, #28]
-1013:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 8377              		.loc 1 1013 3 is_stmt 1 view .LVU2630
-1013:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 8378              		.loc 1 1013 36 is_stmt 0 view .LVU2631
- 8379 0032 80F83030 		strb	r3, [r0, #48]
-1014:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
- 8380              		.loc 1 1014 3 is_stmt 1 view .LVU2632
-1014:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
- 8381              		.loc 1 1014 27 is_stmt 0 view .LVU2633
- 8382 0036 4261     		str	r2, [r0, #20]
-1015:Src/main.c    ****   {
- 8383              		.loc 1 1015 3 is_stmt 1 view .LVU2634
-1015:Src/main.c    ****   {
- 8384              		.loc 1 1015 7 is_stmt 0 view .LVU2635
- 8385 0038 FFF7FEFF 		bl	HAL_ADC_Init
- 8386              	.LVL783:
-1015:Src/main.c    ****   {
- 8387              		.loc 1 1015 6 discriminator 1 view .LVU2636
- 8388 003c 0028     		cmp	r0, #0
- 8389 003e 31D1     		bne	.L456
-1022:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
- 8390              		.loc 1 1022 3 is_stmt 1 view .LVU2637
-1022:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
- 8391              		.loc 1 1022 19 is_stmt 0 view .LVU2638
- 8392 0040 0923     		movs	r3, #9
- 8393 0042 0093     		str	r3, [sp]
-1023:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 8394              		.loc 1 1023 3 is_stmt 1 view .LVU2639
-1023:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 8395              		.loc 1 1023 16 is_stmt 0 view .LVU2640
-ARM GAS  /tmp/ccwR4KB7.s 			page 537
+ 8955              		.loc 1 1101 3 is_stmt 1 view .LVU2775
+1101:Src/main.c    ****   hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+ 8956              		.loc 1 1101 25 is_stmt 0 view .LVU2776
+ 8957 001a 8360     		str	r3, [r0, #8]
+1102:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
+ 8958              		.loc 1 1102 3 is_stmt 1 view .LVU2777
+1102:Src/main.c    ****   hadc1.Init.ContinuousConvMode = DISABLE;
+ 8959              		.loc 1 1102 27 is_stmt 0 view .LVU2778
+ 8960 001c 0122     		movs	r2, #1
+ 8961 001e 0261     		str	r2, [r0, #16]
+1103:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
+ 8962              		.loc 1 1103 3 is_stmt 1 view .LVU2779
+1103:Src/main.c    ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
+ 8963              		.loc 1 1103 33 is_stmt 0 view .LVU2780
+ 8964 0020 8361     		str	r3, [r0, #24]
+1104:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 8965              		.loc 1 1104 3 is_stmt 1 view .LVU2781
+1104:Src/main.c    ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 8966              		.loc 1 1104 36 is_stmt 0 view .LVU2782
+ 8967 0022 80F82030 		strb	r3, [r0, #32]
+1105:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 8968              		.loc 1 1105 3 is_stmt 1 view .LVU2783
+1105:Src/main.c    ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 8969              		.loc 1 1105 35 is_stmt 0 view .LVU2784
+ 8970 0026 C362     		str	r3, [r0, #44]
+1106:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 8971              		.loc 1 1106 3 is_stmt 1 view .LVU2785
+1106:Src/main.c    ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 8972              		.loc 1 1106 31 is_stmt 0 view .LVU2786
+ 8973 0028 2649     		ldr	r1, .L499+8
+ 8974 002a 8162     		str	r1, [r0, #40]
+1107:Src/main.c    ****   hadc1.Init.NbrOfConversion = 5;
+ 8975              		.loc 1 1107 3 is_stmt 1 view .LVU2787
+1107:Src/main.c    ****   hadc1.Init.NbrOfConversion = 5;
+ 8976              		.loc 1 1107 24 is_stmt 0 view .LVU2788
+ 8977 002c C360     		str	r3, [r0, #12]
+1108:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
+ 8978              		.loc 1 1108 3 is_stmt 1 view .LVU2789
+1108:Src/main.c    ****   hadc1.Init.DMAContinuousRequests = DISABLE;
+ 8979              		.loc 1 1108 30 is_stmt 0 view .LVU2790
+ 8980 002e 0521     		movs	r1, #5
+ 8981 0030 C161     		str	r1, [r0, #28]
+1109:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 8982              		.loc 1 1109 3 is_stmt 1 view .LVU2791
+1109:Src/main.c    ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 8983              		.loc 1 1109 36 is_stmt 0 view .LVU2792
+ 8984 0032 80F83030 		strb	r3, [r0, #48]
+1110:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ 8985              		.loc 1 1110 3 is_stmt 1 view .LVU2793
+1110:Src/main.c    ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ 8986              		.loc 1 1110 27 is_stmt 0 view .LVU2794
+ 8987 0036 4261     		str	r2, [r0, #20]
+1111:Src/main.c    ****   {
+ 8988              		.loc 1 1111 3 is_stmt 1 view .LVU2795
+1111:Src/main.c    ****   {
+ 8989              		.loc 1 1111 7 is_stmt 0 view .LVU2796
+ 8990 0038 FFF7FEFF 		bl	HAL_ADC_Init
+ARM GAS  /tmp/ccEQxcUB.s 			page 555
 
 
- 8396 0044 0123     		movs	r3, #1
- 8397 0046 0193     		str	r3, [sp, #4]
-1024:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8398              		.loc 1 1024 3 is_stmt 1 view .LVU2641
-1024:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8399              		.loc 1 1024 24 is_stmt 0 view .LVU2642
- 8400 0048 0723     		movs	r3, #7
- 8401 004a 0293     		str	r3, [sp, #8]
-1025:Src/main.c    ****   {
- 8402              		.loc 1 1025 3 is_stmt 1 view .LVU2643
-1025:Src/main.c    ****   {
- 8403              		.loc 1 1025 7 is_stmt 0 view .LVU2644
- 8404 004c 6946     		mov	r1, sp
- 8405 004e 1B48     		ldr	r0, .L462
- 8406 0050 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
- 8407              	.LVL784:
-1025:Src/main.c    ****   {
- 8408              		.loc 1 1025 6 discriminator 1 view .LVU2645
- 8409 0054 40BB     		cbnz	r0, .L457
-1032:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
- 8410              		.loc 1 1032 3 is_stmt 1 view .LVU2646
-1032:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
- 8411              		.loc 1 1032 19 is_stmt 0 view .LVU2647
- 8412 0056 0823     		movs	r3, #8
- 8413 0058 0093     		str	r3, [sp]
-1033:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8414              		.loc 1 1033 3 is_stmt 1 view .LVU2648
-1033:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8415              		.loc 1 1033 16 is_stmt 0 view .LVU2649
- 8416 005a 0223     		movs	r3, #2
- 8417 005c 0193     		str	r3, [sp, #4]
-1034:Src/main.c    ****   {
- 8418              		.loc 1 1034 3 is_stmt 1 view .LVU2650
-1034:Src/main.c    ****   {
- 8419              		.loc 1 1034 7 is_stmt 0 view .LVU2651
- 8420 005e 6946     		mov	r1, sp
- 8421 0060 1648     		ldr	r0, .L462
- 8422 0062 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
- 8423              	.LVL785:
-1034:Src/main.c    ****   {
- 8424              		.loc 1 1034 6 discriminator 1 view .LVU2652
- 8425 0066 08BB     		cbnz	r0, .L458
-1041:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
- 8426              		.loc 1 1041 3 is_stmt 1 view .LVU2653
-1041:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
- 8427              		.loc 1 1041 19 is_stmt 0 view .LVU2654
- 8428 0068 0223     		movs	r3, #2
- 8429 006a 0093     		str	r3, [sp]
-1042:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8430              		.loc 1 1042 3 is_stmt 1 view .LVU2655
-1042:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8431              		.loc 1 1042 16 is_stmt 0 view .LVU2656
- 8432 006c 0323     		movs	r3, #3
- 8433 006e 0193     		str	r3, [sp, #4]
-1043:Src/main.c    ****   {
- 8434              		.loc 1 1043 3 is_stmt 1 view .LVU2657
-1043:Src/main.c    ****   {
-ARM GAS  /tmp/ccwR4KB7.s 			page 538
+ 8991              	.LVL858:
+1111:Src/main.c    ****   {
+ 8992              		.loc 1 1111 6 discriminator 1 view .LVU2797
+ 8993 003c 0028     		cmp	r0, #0
+ 8994 003e 31D1     		bne	.L493
+1118:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
+ 8995              		.loc 1 1118 3 is_stmt 1 view .LVU2798
+1118:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
+ 8996              		.loc 1 1118 19 is_stmt 0 view .LVU2799
+ 8997 0040 0923     		movs	r3, #9
+ 8998 0042 0093     		str	r3, [sp]
+1119:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 8999              		.loc 1 1119 3 is_stmt 1 view .LVU2800
+1119:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 9000              		.loc 1 1119 16 is_stmt 0 view .LVU2801
+ 9001 0044 0123     		movs	r3, #1
+ 9002 0046 0193     		str	r3, [sp, #4]
+1120:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9003              		.loc 1 1120 3 is_stmt 1 view .LVU2802
+1120:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9004              		.loc 1 1120 24 is_stmt 0 view .LVU2803
+ 9005 0048 0723     		movs	r3, #7
+ 9006 004a 0293     		str	r3, [sp, #8]
+1121:Src/main.c    ****   {
+ 9007              		.loc 1 1121 3 is_stmt 1 view .LVU2804
+1121:Src/main.c    ****   {
+ 9008              		.loc 1 1121 7 is_stmt 0 view .LVU2805
+ 9009 004c 6946     		mov	r1, sp
+ 9010 004e 1B48     		ldr	r0, .L499
+ 9011 0050 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
+ 9012              	.LVL859:
+1121:Src/main.c    ****   {
+ 9013              		.loc 1 1121 6 discriminator 1 view .LVU2806
+ 9014 0054 40BB     		cbnz	r0, .L494
+1128:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
+ 9015              		.loc 1 1128 3 is_stmt 1 view .LVU2807
+1128:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_2;
+ 9016              		.loc 1 1128 19 is_stmt 0 view .LVU2808
+ 9017 0056 0823     		movs	r3, #8
+ 9018 0058 0093     		str	r3, [sp]
+1129:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9019              		.loc 1 1129 3 is_stmt 1 view .LVU2809
+1129:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9020              		.loc 1 1129 16 is_stmt 0 view .LVU2810
+ 9021 005a 0223     		movs	r3, #2
+ 9022 005c 0193     		str	r3, [sp, #4]
+1130:Src/main.c    ****   {
+ 9023              		.loc 1 1130 3 is_stmt 1 view .LVU2811
+1130:Src/main.c    ****   {
+ 9024              		.loc 1 1130 7 is_stmt 0 view .LVU2812
+ 9025 005e 6946     		mov	r1, sp
+ 9026 0060 1648     		ldr	r0, .L499
+ 9027 0062 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
+ 9028              	.LVL860:
+1130:Src/main.c    ****   {
+ 9029              		.loc 1 1130 6 discriminator 1 view .LVU2813
+ 9030 0066 08BB     		cbnz	r0, .L495
+ARM GAS  /tmp/ccEQxcUB.s 			page 556
 
 
- 8435              		.loc 1 1043 7 is_stmt 0 view .LVU2658
- 8436 0070 6946     		mov	r1, sp
- 8437 0072 1248     		ldr	r0, .L462
- 8438 0074 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
- 8439              	.LVL786:
-1043:Src/main.c    ****   {
- 8440              		.loc 1 1043 6 discriminator 1 view .LVU2659
- 8441 0078 D0B9     		cbnz	r0, .L459
-1050:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
- 8442              		.loc 1 1050 3 is_stmt 1 view .LVU2660
-1050:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
- 8443              		.loc 1 1050 19 is_stmt 0 view .LVU2661
- 8444 007a 0A23     		movs	r3, #10
- 8445 007c 0093     		str	r3, [sp]
-1051:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8446              		.loc 1 1051 3 is_stmt 1 view .LVU2662
-1051:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8447              		.loc 1 1051 16 is_stmt 0 view .LVU2663
- 8448 007e 0423     		movs	r3, #4
- 8449 0080 0193     		str	r3, [sp, #4]
-1052:Src/main.c    ****   {
- 8450              		.loc 1 1052 3 is_stmt 1 view .LVU2664
-1052:Src/main.c    ****   {
- 8451              		.loc 1 1052 7 is_stmt 0 view .LVU2665
- 8452 0082 6946     		mov	r1, sp
- 8453 0084 0D48     		ldr	r0, .L462
- 8454 0086 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
- 8455              	.LVL787:
-1052:Src/main.c    ****   {
- 8456              		.loc 1 1052 6 discriminator 1 view .LVU2666
- 8457 008a 98B9     		cbnz	r0, .L460
-1059:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_5;
- 8458              		.loc 1 1059 3 is_stmt 1 view .LVU2667
-1059:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_5;
- 8459              		.loc 1 1059 19 is_stmt 0 view .LVU2668
- 8460 008c 0B23     		movs	r3, #11
- 8461 008e 0093     		str	r3, [sp]
-1060:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8462              		.loc 1 1060 3 is_stmt 1 view .LVU2669
-1060:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8463              		.loc 1 1060 16 is_stmt 0 view .LVU2670
- 8464 0090 0523     		movs	r3, #5
- 8465 0092 0193     		str	r3, [sp, #4]
-1061:Src/main.c    ****   {
- 8466              		.loc 1 1061 3 is_stmt 1 view .LVU2671
-1061:Src/main.c    ****   {
- 8467              		.loc 1 1061 7 is_stmt 0 view .LVU2672
- 8468 0094 6946     		mov	r1, sp
- 8469 0096 0948     		ldr	r0, .L462
- 8470 0098 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
- 8471              	.LVL788:
-1061:Src/main.c    ****   {
- 8472              		.loc 1 1061 6 discriminator 1 view .LVU2673
- 8473 009c 60B9     		cbnz	r0, .L461
-1069:Src/main.c    **** 
- 8474              		.loc 1 1069 1 view .LVU2674
- 8475 009e 05B0     		add	sp, sp, #20
-ARM GAS  /tmp/ccwR4KB7.s 			page 539
+1137:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
+ 9031              		.loc 1 1137 3 is_stmt 1 view .LVU2814
+1137:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_3;
+ 9032              		.loc 1 1137 19 is_stmt 0 view .LVU2815
+ 9033 0068 0223     		movs	r3, #2
+ 9034 006a 0093     		str	r3, [sp]
+1138:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9035              		.loc 1 1138 3 is_stmt 1 view .LVU2816
+1138:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9036              		.loc 1 1138 16 is_stmt 0 view .LVU2817
+ 9037 006c 0323     		movs	r3, #3
+ 9038 006e 0193     		str	r3, [sp, #4]
+1139:Src/main.c    ****   {
+ 9039              		.loc 1 1139 3 is_stmt 1 view .LVU2818
+1139:Src/main.c    ****   {
+ 9040              		.loc 1 1139 7 is_stmt 0 view .LVU2819
+ 9041 0070 6946     		mov	r1, sp
+ 9042 0072 1248     		ldr	r0, .L499
+ 9043 0074 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
+ 9044              	.LVL861:
+1139:Src/main.c    ****   {
+ 9045              		.loc 1 1139 6 discriminator 1 view .LVU2820
+ 9046 0078 D0B9     		cbnz	r0, .L496
+1146:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
+ 9047              		.loc 1 1146 3 is_stmt 1 view .LVU2821
+1146:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_4;
+ 9048              		.loc 1 1146 19 is_stmt 0 view .LVU2822
+ 9049 007a 0A23     		movs	r3, #10
+ 9050 007c 0093     		str	r3, [sp]
+1147:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9051              		.loc 1 1147 3 is_stmt 1 view .LVU2823
+1147:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9052              		.loc 1 1147 16 is_stmt 0 view .LVU2824
+ 9053 007e 0423     		movs	r3, #4
+ 9054 0080 0193     		str	r3, [sp, #4]
+1148:Src/main.c    ****   {
+ 9055              		.loc 1 1148 3 is_stmt 1 view .LVU2825
+1148:Src/main.c    ****   {
+ 9056              		.loc 1 1148 7 is_stmt 0 view .LVU2826
+ 9057 0082 6946     		mov	r1, sp
+ 9058 0084 0D48     		ldr	r0, .L499
+ 9059 0086 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
+ 9060              	.LVL862:
+1148:Src/main.c    ****   {
+ 9061              		.loc 1 1148 6 discriminator 1 view .LVU2827
+ 9062 008a 98B9     		cbnz	r0, .L497
+1155:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_5;
+ 9063              		.loc 1 1155 3 is_stmt 1 view .LVU2828
+1155:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_5;
+ 9064              		.loc 1 1155 19 is_stmt 0 view .LVU2829
+ 9065 008c 0B23     		movs	r3, #11
+ 9066 008e 0093     		str	r3, [sp]
+1156:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9067              		.loc 1 1156 3 is_stmt 1 view .LVU2830
+1156:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 9068              		.loc 1 1156 16 is_stmt 0 view .LVU2831
+ 9069 0090 0523     		movs	r3, #5
+ARM GAS  /tmp/ccEQxcUB.s 			page 557
 
 
- 8476              	.LCFI76:
- 8477              		.cfi_remember_state
- 8478              		.cfi_def_cfa_offset 4
- 8479              		@ sp needed
- 8480 00a0 5DF804FB 		ldr	pc, [sp], #4
- 8481              	.L456:
- 8482              	.LCFI77:
- 8483              		.cfi_restore_state
-1017:Src/main.c    ****   }
- 8484              		.loc 1 1017 5 is_stmt 1 view .LVU2675
- 8485 00a4 FFF7FEFF 		bl	Error_Handler
- 8486              	.LVL789:
- 8487              	.L457:
-1027:Src/main.c    ****   }
- 8488              		.loc 1 1027 5 view .LVU2676
- 8489 00a8 FFF7FEFF 		bl	Error_Handler
- 8490              	.LVL790:
- 8491              	.L458:
-1036:Src/main.c    ****   }
- 8492              		.loc 1 1036 5 view .LVU2677
- 8493 00ac FFF7FEFF 		bl	Error_Handler
- 8494              	.LVL791:
- 8495              	.L459:
-1045:Src/main.c    ****   }
- 8496              		.loc 1 1045 5 view .LVU2678
- 8497 00b0 FFF7FEFF 		bl	Error_Handler
- 8498              	.LVL792:
- 8499              	.L460:
-1054:Src/main.c    ****   }
- 8500              		.loc 1 1054 5 view .LVU2679
- 8501 00b4 FFF7FEFF 		bl	Error_Handler
- 8502              	.LVL793:
- 8503              	.L461:
-1063:Src/main.c    ****   }
- 8504              		.loc 1 1063 5 view .LVU2680
- 8505 00b8 FFF7FEFF 		bl	Error_Handler
- 8506              	.LVL794:
- 8507              	.L463:
- 8508              		.align	2
- 8509              	.L462:
- 8510 00bc 00000000 		.word	hadc1
- 8511 00c0 00200140 		.word	1073815552
- 8512 00c4 0100000F 		.word	251658241
- 8513              		.cfi_endproc
- 8514              	.LFE1188:
- 8516              		.section	.text.MX_ADC3_Init,"ax",%progbits
- 8517              		.align	1
- 8518              		.syntax unified
- 8519              		.thumb
- 8520              		.thumb_func
- 8522              	MX_ADC3_Init:
- 8523              	.LFB1189:
-1077:Src/main.c    **** 
- 8524              		.loc 1 1077 1 view -0
- 8525              		.cfi_startproc
- 8526              		@ args = 0, pretend = 0, frame = 16
- 8527              		@ frame_needed = 0, uses_anonymous_args = 0
-ARM GAS  /tmp/ccwR4KB7.s 			page 540
+ 9070 0092 0193     		str	r3, [sp, #4]
+1157:Src/main.c    ****   {
+ 9071              		.loc 1 1157 3 is_stmt 1 view .LVU2832
+1157:Src/main.c    ****   {
+ 9072              		.loc 1 1157 7 is_stmt 0 view .LVU2833
+ 9073 0094 6946     		mov	r1, sp
+ 9074 0096 0948     		ldr	r0, .L499
+ 9075 0098 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
+ 9076              	.LVL863:
+1157:Src/main.c    ****   {
+ 9077              		.loc 1 1157 6 discriminator 1 view .LVU2834
+ 9078 009c 60B9     		cbnz	r0, .L498
+1165:Src/main.c    **** 
+ 9079              		.loc 1 1165 1 view .LVU2835
+ 9080 009e 05B0     		add	sp, sp, #20
+ 9081              	.LCFI78:
+ 9082              		.cfi_remember_state
+ 9083              		.cfi_def_cfa_offset 4
+ 9084              		@ sp needed
+ 9085 00a0 5DF804FB 		ldr	pc, [sp], #4
+ 9086              	.L493:
+ 9087              	.LCFI79:
+ 9088              		.cfi_restore_state
+1113:Src/main.c    ****   }
+ 9089              		.loc 1 1113 5 is_stmt 1 view .LVU2836
+ 9090 00a4 FFF7FEFF 		bl	Error_Handler
+ 9091              	.LVL864:
+ 9092              	.L494:
+1123:Src/main.c    ****   }
+ 9093              		.loc 1 1123 5 view .LVU2837
+ 9094 00a8 FFF7FEFF 		bl	Error_Handler
+ 9095              	.LVL865:
+ 9096              	.L495:
+1132:Src/main.c    ****   }
+ 9097              		.loc 1 1132 5 view .LVU2838
+ 9098 00ac FFF7FEFF 		bl	Error_Handler
+ 9099              	.LVL866:
+ 9100              	.L496:
+1141:Src/main.c    ****   }
+ 9101              		.loc 1 1141 5 view .LVU2839
+ 9102 00b0 FFF7FEFF 		bl	Error_Handler
+ 9103              	.LVL867:
+ 9104              	.L497:
+1150:Src/main.c    ****   }
+ 9105              		.loc 1 1150 5 view .LVU2840
+ 9106 00b4 FFF7FEFF 		bl	Error_Handler
+ 9107              	.LVL868:
+ 9108              	.L498:
+1159:Src/main.c    ****   }
+ 9109              		.loc 1 1159 5 view .LVU2841
+ 9110 00b8 FFF7FEFF 		bl	Error_Handler
+ 9111              	.LVL869:
+ 9112              	.L500:
+ 9113              		.align	2
+ 9114              	.L499:
+ 9115 00bc 00000000 		.word	hadc1
+ 9116 00c0 00200140 		.word	1073815552
+ARM GAS  /tmp/ccEQxcUB.s 			page 558
 
 
- 8528 0000 00B5     		push	{lr}
- 8529              	.LCFI78:
- 8530              		.cfi_def_cfa_offset 4
- 8531              		.cfi_offset 14, -4
- 8532 0002 85B0     		sub	sp, sp, #20
- 8533              	.LCFI79:
- 8534              		.cfi_def_cfa_offset 24
-1083:Src/main.c    **** 
- 8535              		.loc 1 1083 3 view .LVU2682
-1083:Src/main.c    **** 
- 8536              		.loc 1 1083 26 is_stmt 0 view .LVU2683
- 8537 0004 0023     		movs	r3, #0
- 8538 0006 0093     		str	r3, [sp]
- 8539 0008 0193     		str	r3, [sp, #4]
- 8540 000a 0293     		str	r3, [sp, #8]
- 8541 000c 0393     		str	r3, [sp, #12]
-1091:Src/main.c    ****   hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 8542              		.loc 1 1091 3 is_stmt 1 view .LVU2684
-1091:Src/main.c    ****   hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 8543              		.loc 1 1091 18 is_stmt 0 view .LVU2685
- 8544 000e 1448     		ldr	r0, .L470
- 8545 0010 144A     		ldr	r2, .L470+4
- 8546 0012 0260     		str	r2, [r0]
-1092:Src/main.c    ****   hadc3.Init.Resolution = ADC_RESOLUTION_12B;
- 8547              		.loc 1 1092 3 is_stmt 1 view .LVU2686
-1092:Src/main.c    ****   hadc3.Init.Resolution = ADC_RESOLUTION_12B;
- 8548              		.loc 1 1092 29 is_stmt 0 view .LVU2687
- 8549 0014 4FF44032 		mov	r2, #196608
- 8550 0018 4260     		str	r2, [r0, #4]
-1093:Src/main.c    ****   hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
- 8551              		.loc 1 1093 3 is_stmt 1 view .LVU2688
-1093:Src/main.c    ****   hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
- 8552              		.loc 1 1093 25 is_stmt 0 view .LVU2689
- 8553 001a 8360     		str	r3, [r0, #8]
-1094:Src/main.c    ****   hadc3.Init.ContinuousConvMode = DISABLE;
- 8554              		.loc 1 1094 3 is_stmt 1 view .LVU2690
-1094:Src/main.c    ****   hadc3.Init.ContinuousConvMode = DISABLE;
- 8555              		.loc 1 1094 27 is_stmt 0 view .LVU2691
- 8556 001c 0361     		str	r3, [r0, #16]
-1095:Src/main.c    ****   hadc3.Init.DiscontinuousConvMode = DISABLE;
- 8557              		.loc 1 1095 3 is_stmt 1 view .LVU2692
-1095:Src/main.c    ****   hadc3.Init.DiscontinuousConvMode = DISABLE;
- 8558              		.loc 1 1095 33 is_stmt 0 view .LVU2693
- 8559 001e 8361     		str	r3, [r0, #24]
-1096:Src/main.c    ****   hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 8560              		.loc 1 1096 3 is_stmt 1 view .LVU2694
-1096:Src/main.c    ****   hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 8561              		.loc 1 1096 36 is_stmt 0 view .LVU2695
- 8562 0020 80F82030 		strb	r3, [r0, #32]
-1097:Src/main.c    ****   hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 8563              		.loc 1 1097 3 is_stmt 1 view .LVU2696
-1097:Src/main.c    ****   hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 8564              		.loc 1 1097 35 is_stmt 0 view .LVU2697
- 8565 0024 C362     		str	r3, [r0, #44]
-1098:Src/main.c    ****   hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 8566              		.loc 1 1098 3 is_stmt 1 view .LVU2698
-1098:Src/main.c    ****   hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-ARM GAS  /tmp/ccwR4KB7.s 			page 541
+ 9117 00c4 0100000F 		.word	251658241
+ 9118              		.cfi_endproc
+ 9119              	.LFE1188:
+ 9121              		.section	.text.MX_ADC3_Init,"ax",%progbits
+ 9122              		.align	1
+ 9123              		.syntax unified
+ 9124              		.thumb
+ 9125              		.thumb_func
+ 9127              	MX_ADC3_Init:
+ 9128              	.LFB1189:
+1173:Src/main.c    **** 
+ 9129              		.loc 1 1173 1 view -0
+ 9130              		.cfi_startproc
+ 9131              		@ args = 0, pretend = 0, frame = 16
+ 9132              		@ frame_needed = 0, uses_anonymous_args = 0
+ 9133 0000 00B5     		push	{lr}
+ 9134              	.LCFI80:
+ 9135              		.cfi_def_cfa_offset 4
+ 9136              		.cfi_offset 14, -4
+ 9137 0002 85B0     		sub	sp, sp, #20
+ 9138              	.LCFI81:
+ 9139              		.cfi_def_cfa_offset 24
+1179:Src/main.c    **** 
+ 9140              		.loc 1 1179 3 view .LVU2843
+1179:Src/main.c    **** 
+ 9141              		.loc 1 1179 26 is_stmt 0 view .LVU2844
+ 9142 0004 0023     		movs	r3, #0
+ 9143 0006 0093     		str	r3, [sp]
+ 9144 0008 0193     		str	r3, [sp, #4]
+ 9145 000a 0293     		str	r3, [sp, #8]
+ 9146 000c 0393     		str	r3, [sp, #12]
+1187:Src/main.c    ****   hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 9147              		.loc 1 1187 3 is_stmt 1 view .LVU2845
+1187:Src/main.c    ****   hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 9148              		.loc 1 1187 18 is_stmt 0 view .LVU2846
+ 9149 000e 1448     		ldr	r0, .L507
+ 9150 0010 144A     		ldr	r2, .L507+4
+ 9151 0012 0260     		str	r2, [r0]
+1188:Src/main.c    ****   hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ 9152              		.loc 1 1188 3 is_stmt 1 view .LVU2847
+1188:Src/main.c    ****   hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ 9153              		.loc 1 1188 29 is_stmt 0 view .LVU2848
+ 9154 0014 4FF44032 		mov	r2, #196608
+ 9155 0018 4260     		str	r2, [r0, #4]
+1189:Src/main.c    ****   hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ 9156              		.loc 1 1189 3 is_stmt 1 view .LVU2849
+1189:Src/main.c    ****   hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ 9157              		.loc 1 1189 25 is_stmt 0 view .LVU2850
+ 9158 001a 8360     		str	r3, [r0, #8]
+1190:Src/main.c    ****   hadc3.Init.ContinuousConvMode = DISABLE;
+ 9159              		.loc 1 1190 3 is_stmt 1 view .LVU2851
+1190:Src/main.c    ****   hadc3.Init.ContinuousConvMode = DISABLE;
+ 9160              		.loc 1 1190 27 is_stmt 0 view .LVU2852
+ 9161 001c 0361     		str	r3, [r0, #16]
+1191:Src/main.c    ****   hadc3.Init.DiscontinuousConvMode = DISABLE;
+ 9162              		.loc 1 1191 3 is_stmt 1 view .LVU2853
+1191:Src/main.c    ****   hadc3.Init.DiscontinuousConvMode = DISABLE;
+ARM GAS  /tmp/ccEQxcUB.s 			page 559
 
 
- 8567              		.loc 1 1098 31 is_stmt 0 view .LVU2699
- 8568 0026 104A     		ldr	r2, .L470+8
- 8569 0028 8262     		str	r2, [r0, #40]
-1099:Src/main.c    ****   hadc3.Init.NbrOfConversion = 1;
- 8570              		.loc 1 1099 3 is_stmt 1 view .LVU2700
-1099:Src/main.c    ****   hadc3.Init.NbrOfConversion = 1;
- 8571              		.loc 1 1099 24 is_stmt 0 view .LVU2701
- 8572 002a C360     		str	r3, [r0, #12]
-1100:Src/main.c    ****   hadc3.Init.DMAContinuousRequests = DISABLE;
- 8573              		.loc 1 1100 3 is_stmt 1 view .LVU2702
-1100:Src/main.c    ****   hadc3.Init.DMAContinuousRequests = DISABLE;
- 8574              		.loc 1 1100 30 is_stmt 0 view .LVU2703
- 8575 002c 0122     		movs	r2, #1
- 8576 002e C261     		str	r2, [r0, #28]
-1101:Src/main.c    ****   hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 8577              		.loc 1 1101 3 is_stmt 1 view .LVU2704
-1101:Src/main.c    ****   hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 8578              		.loc 1 1101 36 is_stmt 0 view .LVU2705
- 8579 0030 80F83030 		strb	r3, [r0, #48]
-1102:Src/main.c    ****   if (HAL_ADC_Init(&hadc3) != HAL_OK)
- 8580              		.loc 1 1102 3 is_stmt 1 view .LVU2706
-1102:Src/main.c    ****   if (HAL_ADC_Init(&hadc3) != HAL_OK)
- 8581              		.loc 1 1102 27 is_stmt 0 view .LVU2707
- 8582 0034 4261     		str	r2, [r0, #20]
-1103:Src/main.c    ****   {
- 8583              		.loc 1 1103 3 is_stmt 1 view .LVU2708
-1103:Src/main.c    ****   {
- 8584              		.loc 1 1103 7 is_stmt 0 view .LVU2709
- 8585 0036 FFF7FEFF 		bl	HAL_ADC_Init
- 8586              	.LVL795:
-1103:Src/main.c    ****   {
- 8587              		.loc 1 1103 6 discriminator 1 view .LVU2710
- 8588 003a 68B9     		cbnz	r0, .L468
-1110:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
- 8589              		.loc 1 1110 3 is_stmt 1 view .LVU2711
-1110:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
- 8590              		.loc 1 1110 19 is_stmt 0 view .LVU2712
- 8591 003c 0F23     		movs	r3, #15
- 8592 003e 0093     		str	r3, [sp]
-1111:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 8593              		.loc 1 1111 3 is_stmt 1 view .LVU2713
-1111:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 8594              		.loc 1 1111 16 is_stmt 0 view .LVU2714
- 8595 0040 0123     		movs	r3, #1
- 8596 0042 0193     		str	r3, [sp, #4]
-1112:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8597              		.loc 1 1112 3 is_stmt 1 view .LVU2715
-1112:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8598              		.loc 1 1112 24 is_stmt 0 view .LVU2716
- 8599 0044 0723     		movs	r3, #7
- 8600 0046 0293     		str	r3, [sp, #8]
-1113:Src/main.c    ****   {
- 8601              		.loc 1 1113 3 is_stmt 1 view .LVU2717
-1113:Src/main.c    ****   {
- 8602              		.loc 1 1113 7 is_stmt 0 view .LVU2718
- 8603 0048 6946     		mov	r1, sp
- 8604 004a 0548     		ldr	r0, .L470
-ARM GAS  /tmp/ccwR4KB7.s 			page 542
+ 9163              		.loc 1 1191 33 is_stmt 0 view .LVU2854
+ 9164 001e 8361     		str	r3, [r0, #24]
+1192:Src/main.c    ****   hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 9165              		.loc 1 1192 3 is_stmt 1 view .LVU2855
+1192:Src/main.c    ****   hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 9166              		.loc 1 1192 36 is_stmt 0 view .LVU2856
+ 9167 0020 80F82030 		strb	r3, [r0, #32]
+1193:Src/main.c    ****   hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 9168              		.loc 1 1193 3 is_stmt 1 view .LVU2857
+1193:Src/main.c    ****   hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 9169              		.loc 1 1193 35 is_stmt 0 view .LVU2858
+ 9170 0024 C362     		str	r3, [r0, #44]
+1194:Src/main.c    ****   hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 9171              		.loc 1 1194 3 is_stmt 1 view .LVU2859
+1194:Src/main.c    ****   hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 9172              		.loc 1 1194 31 is_stmt 0 view .LVU2860
+ 9173 0026 104A     		ldr	r2, .L507+8
+ 9174 0028 8262     		str	r2, [r0, #40]
+1195:Src/main.c    ****   hadc3.Init.NbrOfConversion = 1;
+ 9175              		.loc 1 1195 3 is_stmt 1 view .LVU2861
+1195:Src/main.c    ****   hadc3.Init.NbrOfConversion = 1;
+ 9176              		.loc 1 1195 24 is_stmt 0 view .LVU2862
+ 9177 002a C360     		str	r3, [r0, #12]
+1196:Src/main.c    ****   hadc3.Init.DMAContinuousRequests = DISABLE;
+ 9178              		.loc 1 1196 3 is_stmt 1 view .LVU2863
+1196:Src/main.c    ****   hadc3.Init.DMAContinuousRequests = DISABLE;
+ 9179              		.loc 1 1196 30 is_stmt 0 view .LVU2864
+ 9180 002c 0122     		movs	r2, #1
+ 9181 002e C261     		str	r2, [r0, #28]
+1197:Src/main.c    ****   hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 9182              		.loc 1 1197 3 is_stmt 1 view .LVU2865
+1197:Src/main.c    ****   hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 9183              		.loc 1 1197 36 is_stmt 0 view .LVU2866
+ 9184 0030 80F83030 		strb	r3, [r0, #48]
+1198:Src/main.c    ****   if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ 9185              		.loc 1 1198 3 is_stmt 1 view .LVU2867
+1198:Src/main.c    ****   if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ 9186              		.loc 1 1198 27 is_stmt 0 view .LVU2868
+ 9187 0034 4261     		str	r2, [r0, #20]
+1199:Src/main.c    ****   {
+ 9188              		.loc 1 1199 3 is_stmt 1 view .LVU2869
+1199:Src/main.c    ****   {
+ 9189              		.loc 1 1199 7 is_stmt 0 view .LVU2870
+ 9190 0036 FFF7FEFF 		bl	HAL_ADC_Init
+ 9191              	.LVL870:
+1199:Src/main.c    ****   {
+ 9192              		.loc 1 1199 6 discriminator 1 view .LVU2871
+ 9193 003a 68B9     		cbnz	r0, .L505
+1206:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
+ 9194              		.loc 1 1206 3 is_stmt 1 view .LVU2872
+1206:Src/main.c    ****   sConfig.Rank = ADC_REGULAR_RANK_1;
+ 9195              		.loc 1 1206 19 is_stmt 0 view .LVU2873
+ 9196 003c 0F23     		movs	r3, #15
+ 9197 003e 0093     		str	r3, [sp]
+1207:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 9198              		.loc 1 1207 3 is_stmt 1 view .LVU2874
+1207:Src/main.c    ****   sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ARM GAS  /tmp/ccEQxcUB.s 			page 560
 
 
- 8605 004c FFF7FEFF 		bl	HAL_ADC_ConfigChannel
- 8606              	.LVL796:
-1113:Src/main.c    ****   {
- 8607              		.loc 1 1113 6 discriminator 1 view .LVU2719
- 8608 0050 20B9     		cbnz	r0, .L469
-1121:Src/main.c    **** 
- 8609              		.loc 1 1121 1 view .LVU2720
- 8610 0052 05B0     		add	sp, sp, #20
- 8611              	.LCFI80:
- 8612              		.cfi_remember_state
- 8613              		.cfi_def_cfa_offset 4
- 8614              		@ sp needed
- 8615 0054 5DF804FB 		ldr	pc, [sp], #4
- 8616              	.L468:
- 8617              	.LCFI81:
- 8618              		.cfi_restore_state
-1105:Src/main.c    ****   }
- 8619              		.loc 1 1105 5 is_stmt 1 view .LVU2721
- 8620 0058 FFF7FEFF 		bl	Error_Handler
- 8621              	.LVL797:
- 8622              	.L469:
-1115:Src/main.c    ****   }
- 8623              		.loc 1 1115 5 view .LVU2722
- 8624 005c FFF7FEFF 		bl	Error_Handler
- 8625              	.LVL798:
- 8626              	.L471:
- 8627              		.align	2
- 8628              	.L470:
- 8629 0060 00000000 		.word	hadc3
- 8630 0064 00220140 		.word	1073816064
- 8631 0068 0100000F 		.word	251658241
- 8632              		.cfi_endproc
- 8633              	.LFE1189:
- 8635              		.section	.text.MX_USART1_UART_Init,"ax",%progbits
- 8636              		.align	1
- 8637              		.syntax unified
- 8638              		.thumb
- 8639              		.thumb_func
- 8641              	MX_USART1_UART_Init:
- 8642              	.LFB1204:
-1788:Src/main.c    **** 
- 8643              		.loc 1 1788 1 view -0
- 8644              		.cfi_startproc
- 8645              		@ args = 0, pretend = 0, frame = 208
- 8646              		@ frame_needed = 0, uses_anonymous_args = 0
- 8647 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
- 8648              	.LCFI82:
- 8649              		.cfi_def_cfa_offset 24
- 8650              		.cfi_offset 4, -24
- 8651              		.cfi_offset 5, -20
- 8652              		.cfi_offset 6, -16
- 8653              		.cfi_offset 7, -12
- 8654              		.cfi_offset 8, -8
- 8655              		.cfi_offset 14, -4
- 8656 0004 B4B0     		sub	sp, sp, #208
- 8657              	.LCFI83:
- 8658              		.cfi_def_cfa_offset 232
-ARM GAS  /tmp/ccwR4KB7.s 			page 543
+ 9199              		.loc 1 1207 16 is_stmt 0 view .LVU2875
+ 9200 0040 0123     		movs	r3, #1
+ 9201 0042 0193     		str	r3, [sp, #4]
+1208:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ 9202              		.loc 1 1208 3 is_stmt 1 view .LVU2876
+1208:Src/main.c    ****   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ 9203              		.loc 1 1208 24 is_stmt 0 view .LVU2877
+ 9204 0044 0723     		movs	r3, #7
+ 9205 0046 0293     		str	r3, [sp, #8]
+1209:Src/main.c    ****   {
+ 9206              		.loc 1 1209 3 is_stmt 1 view .LVU2878
+1209:Src/main.c    ****   {
+ 9207              		.loc 1 1209 7 is_stmt 0 view .LVU2879
+ 9208 0048 6946     		mov	r1, sp
+ 9209 004a 0548     		ldr	r0, .L507
+ 9210 004c FFF7FEFF 		bl	HAL_ADC_ConfigChannel
+ 9211              	.LVL871:
+1209:Src/main.c    ****   {
+ 9212              		.loc 1 1209 6 discriminator 1 view .LVU2880
+ 9213 0050 20B9     		cbnz	r0, .L506
+1217:Src/main.c    **** 
+ 9214              		.loc 1 1217 1 view .LVU2881
+ 9215 0052 05B0     		add	sp, sp, #20
+ 9216              	.LCFI82:
+ 9217              		.cfi_remember_state
+ 9218              		.cfi_def_cfa_offset 4
+ 9219              		@ sp needed
+ 9220 0054 5DF804FB 		ldr	pc, [sp], #4
+ 9221              	.L505:
+ 9222              	.LCFI83:
+ 9223              		.cfi_restore_state
+1201:Src/main.c    ****   }
+ 9224              		.loc 1 1201 5 is_stmt 1 view .LVU2882
+ 9225 0058 FFF7FEFF 		bl	Error_Handler
+ 9226              	.LVL872:
+ 9227              	.L506:
+1211:Src/main.c    ****   }
+ 9228              		.loc 1 1211 5 view .LVU2883
+ 9229 005c FFF7FEFF 		bl	Error_Handler
+ 9230              	.LVL873:
+ 9231              	.L508:
+ 9232              		.align	2
+ 9233              	.L507:
+ 9234 0060 00000000 		.word	hadc3
+ 9235 0064 00220140 		.word	1073816064
+ 9236 0068 0100000F 		.word	251658241
+ 9237              		.cfi_endproc
+ 9238              	.LFE1189:
+ 9240              		.section	.text.MX_USART1_UART_Init,"ax",%progbits
+ 9241              		.align	1
+ 9242              		.syntax unified
+ 9243              		.thumb
+ 9244              		.thumb_func
+ 9246              	MX_USART1_UART_Init:
+ 9247              	.LFB1205:
+1953:Src/main.c    **** 
+ 9248              		.loc 1 1953 1 view -0
+ARM GAS  /tmp/ccEQxcUB.s 			page 561
 
 
-1794:Src/main.c    **** 
- 8659              		.loc 1 1794 3 view .LVU2724
-1794:Src/main.c    **** 
- 8660              		.loc 1 1794 24 is_stmt 0 view .LVU2725
- 8661 0006 0021     		movs	r1, #0
- 8662 0008 2D91     		str	r1, [sp, #180]
- 8663 000a 2E91     		str	r1, [sp, #184]
- 8664 000c 2F91     		str	r1, [sp, #188]
- 8665 000e 3091     		str	r1, [sp, #192]
- 8666 0010 3191     		str	r1, [sp, #196]
- 8667 0012 3291     		str	r1, [sp, #200]
- 8668 0014 3391     		str	r1, [sp, #204]
-1796:Src/main.c    ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 8669              		.loc 1 1796 3 is_stmt 1 view .LVU2726
-1796:Src/main.c    ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 8670              		.loc 1 1796 23 is_stmt 0 view .LVU2727
- 8671 0016 2791     		str	r1, [sp, #156]
- 8672 0018 2891     		str	r1, [sp, #160]
- 8673 001a 2991     		str	r1, [sp, #164]
- 8674 001c 2A91     		str	r1, [sp, #168]
- 8675 001e 2B91     		str	r1, [sp, #172]
- 8676 0020 2C91     		str	r1, [sp, #176]
-1797:Src/main.c    **** 
- 8677              		.loc 1 1797 3 is_stmt 1 view .LVU2728
-1797:Src/main.c    **** 
- 8678              		.loc 1 1797 28 is_stmt 0 view .LVU2729
- 8679 0022 9022     		movs	r2, #144
- 8680 0024 03A8     		add	r0, sp, #12
- 8681 0026 FFF7FEFF 		bl	memset
- 8682              	.LVL799:
-1801:Src/main.c    ****   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
- 8683              		.loc 1 1801 3 is_stmt 1 view .LVU2730
-1801:Src/main.c    ****   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
- 8684              		.loc 1 1801 44 is_stmt 0 view .LVU2731
- 8685 002a 4023     		movs	r3, #64
- 8686 002c 0393     		str	r3, [sp, #12]
-1802:Src/main.c    ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 8687              		.loc 1 1802 3 is_stmt 1 view .LVU2732
-1803:Src/main.c    ****   {
- 8688              		.loc 1 1803 3 view .LVU2733
-1803:Src/main.c    ****   {
- 8689              		.loc 1 1803 7 is_stmt 0 view .LVU2734
- 8690 002e 03A8     		add	r0, sp, #12
- 8691 0030 FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
- 8692              	.LVL800:
-1803:Src/main.c    ****   {
- 8693              		.loc 1 1803 6 discriminator 1 view .LVU2735
- 8694 0034 0028     		cmp	r0, #0
- 8695 0036 40F09E80 		bne	.L475
-1809:Src/main.c    **** 
- 8696              		.loc 1 1809 3 is_stmt 1 view .LVU2736
- 8697              	.LVL801:
- 8698              	.LBB602:
- 8699              	.LBI602:
+ 9249              		.cfi_startproc
+ 9250              		@ args = 0, pretend = 0, frame = 208
+ 9251              		@ frame_needed = 0, uses_anonymous_args = 0
+ 9252 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
+ 9253              	.LCFI84:
+ 9254              		.cfi_def_cfa_offset 24
+ 9255              		.cfi_offset 4, -24
+ 9256              		.cfi_offset 5, -20
+ 9257              		.cfi_offset 6, -16
+ 9258              		.cfi_offset 7, -12
+ 9259              		.cfi_offset 8, -8
+ 9260              		.cfi_offset 14, -4
+ 9261 0004 B4B0     		sub	sp, sp, #208
+ 9262              	.LCFI85:
+ 9263              		.cfi_def_cfa_offset 232
+1959:Src/main.c    **** 
+ 9264              		.loc 1 1959 3 view .LVU2885
+1959:Src/main.c    **** 
+ 9265              		.loc 1 1959 24 is_stmt 0 view .LVU2886
+ 9266 0006 0021     		movs	r1, #0
+ 9267 0008 2D91     		str	r1, [sp, #180]
+ 9268 000a 2E91     		str	r1, [sp, #184]
+ 9269 000c 2F91     		str	r1, [sp, #188]
+ 9270 000e 3091     		str	r1, [sp, #192]
+ 9271 0010 3191     		str	r1, [sp, #196]
+ 9272 0012 3291     		str	r1, [sp, #200]
+ 9273 0014 3391     		str	r1, [sp, #204]
+1961:Src/main.c    ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 9274              		.loc 1 1961 3 is_stmt 1 view .LVU2887
+1961:Src/main.c    ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 9275              		.loc 1 1961 23 is_stmt 0 view .LVU2888
+ 9276 0016 2791     		str	r1, [sp, #156]
+ 9277 0018 2891     		str	r1, [sp, #160]
+ 9278 001a 2991     		str	r1, [sp, #164]
+ 9279 001c 2A91     		str	r1, [sp, #168]
+ 9280 001e 2B91     		str	r1, [sp, #172]
+ 9281 0020 2C91     		str	r1, [sp, #176]
+1962:Src/main.c    **** 
+ 9282              		.loc 1 1962 3 is_stmt 1 view .LVU2889
+1962:Src/main.c    **** 
+ 9283              		.loc 1 1962 28 is_stmt 0 view .LVU2890
+ 9284 0022 9022     		movs	r2, #144
+ 9285 0024 03A8     		add	r0, sp, #12
+ 9286 0026 FFF7FEFF 		bl	memset
+ 9287              	.LVL874:
+1966:Src/main.c    ****   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ 9288              		.loc 1 1966 3 is_stmt 1 view .LVU2891
+1966:Src/main.c    ****   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ 9289              		.loc 1 1966 44 is_stmt 0 view .LVU2892
+ 9290 002a 4023     		movs	r3, #64
+ 9291 002c 0393     		str	r3, [sp, #12]
+1967:Src/main.c    ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 9292              		.loc 1 1967 3 is_stmt 1 view .LVU2893
+1968:Src/main.c    ****   {
+ 9293              		.loc 1 1968 3 view .LVU2894
+1968:Src/main.c    ****   {
+ 9294              		.loc 1 1968 7 is_stmt 0 view .LVU2895
+ARM GAS  /tmp/ccEQxcUB.s 			page 562
+
+
+ 9295 002e 03A8     		add	r0, sp, #12
+ 9296 0030 FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
+ 9297              	.LVL875:
+1968:Src/main.c    ****   {
+ 9298              		.loc 1 1968 6 discriminator 1 view .LVU2896
+ 9299 0034 0028     		cmp	r0, #0
+ 9300 0036 40F09E80 		bne	.L512
+1974:Src/main.c    **** 
+ 9301              		.loc 1 1974 3 is_stmt 1 view .LVU2897
+ 9302              	.LVL876:
+ 9303              	.LBB639:
+ 9304              	.LBI639:
 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 8700              		.loc 3 1587 22 view .LVU2737
- 8701              	.LBB603:
-ARM GAS  /tmp/ccwR4KB7.s 			page 544
-
-
+ 9305              		.loc 3 1587 22 view .LVU2898
+ 9306              	.LBB640:
 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->APB2ENR, Periphs);
- 8702              		.loc 3 1589 3 view .LVU2738
+ 9307              		.loc 3 1589 3 view .LVU2899
 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 8703              		.loc 3 1590 3 view .LVU2739
- 8704 003a 504B     		ldr	r3, .L476
- 8705 003c 5A6C     		ldr	r2, [r3, #68]
- 8706 003e 42F01002 		orr	r2, r2, #16
- 8707 0042 5A64     		str	r2, [r3, #68]
+ 9308              		.loc 3 1590 3 view .LVU2900
+ 9309 003a 504B     		ldr	r3, .L513
+ 9310 003c 5A6C     		ldr	r2, [r3, #68]
+ 9311 003e 42F01002 		orr	r2, r2, #16
+ 9312 0042 5A64     		str	r2, [r3, #68]
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 8708              		.loc 3 1592 3 view .LVU2740
+ 9313              		.loc 3 1592 3 view .LVU2901
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 8709              		.loc 3 1592 12 is_stmt 0 view .LVU2741
- 8710 0044 5A6C     		ldr	r2, [r3, #68]
- 8711 0046 02F01002 		and	r2, r2, #16
+ 9314              		.loc 3 1592 12 is_stmt 0 view .LVU2902
+ 9315 0044 5A6C     		ldr	r2, [r3, #68]
+ 9316 0046 02F01002 		and	r2, r2, #16
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 8712              		.loc 3 1592 10 view .LVU2742
- 8713 004a 0292     		str	r2, [sp, #8]
- 8714              		.loc 3 1593 3 is_stmt 1 view .LVU2743
- 8715 004c 029A     		ldr	r2, [sp, #8]
- 8716              	.LVL802:
- 8717              		.loc 3 1593 3 is_stmt 0 view .LVU2744
- 8718              	.LBE603:
- 8719              	.LBE602:
-1811:Src/main.c    ****   /**USART1 GPIO Configuration
- 8720              		.loc 1 1811 3 is_stmt 1 view .LVU2745
- 8721              	.LBB604:
- 8722              	.LBI604:
+ 9317              		.loc 3 1592 10 view .LVU2903
+ 9318 004a 0292     		str	r2, [sp, #8]
+ 9319              		.loc 3 1593 3 is_stmt 1 view .LVU2904
+ 9320 004c 029A     		ldr	r2, [sp, #8]
+ 9321              	.LVL877:
+ 9322              		.loc 3 1593 3 is_stmt 0 view .LVU2905
+ 9323              	.LBE640:
+ 9324              	.LBE639:
+1976:Src/main.c    ****   /**USART1 GPIO Configuration
+ 9325              		.loc 1 1976 3 is_stmt 1 view .LVU2906
+ 9326              	.LBB641:
+ 9327              	.LBI641:
  309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 8723              		.loc 3 309 22 view .LVU2746
- 8724              	.LBB605:
+ 9328              		.loc 3 309 22 view .LVU2907
+ 9329              	.LBB642:
  311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   SET_BIT(RCC->AHB1ENR, Periphs);
- 8725              		.loc 3 311 3 view .LVU2747
+ 9330              		.loc 3 311 3 view .LVU2908
  312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
- 8726              		.loc 3 312 3 view .LVU2748
- 8727 004e 1A6B     		ldr	r2, [r3, #48]
- 8728 0050 42F00102 		orr	r2, r2, #1
- 8729 0054 1A63     		str	r2, [r3, #48]
+ 9331              		.loc 3 312 3 view .LVU2909
+ 9332 004e 1A6B     		ldr	r2, [r3, #48]
+ 9333 0050 42F00102 		orr	r2, r2, #1
+ 9334 0054 1A63     		str	r2, [r3, #48]
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 8730              		.loc 3 314 3 view .LVU2749
+ 9335              		.loc 3 314 3 view .LVU2910
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 8731              		.loc 3 314 12 is_stmt 0 view .LVU2750
- 8732 0056 1B6B     		ldr	r3, [r3, #48]
- 8733 0058 03F00103 		and	r3, r3, #1
+ 9336              		.loc 3 314 12 is_stmt 0 view .LVU2911
+ 9337 0056 1B6B     		ldr	r3, [r3, #48]
+ARM GAS  /tmp/ccEQxcUB.s 			page 563
+
+
+ 9338 0058 03F00103 		and	r3, r3, #1
  314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****   (void)tmpreg;
- 8734              		.loc 3 314 10 view .LVU2751
- 8735 005c 0193     		str	r3, [sp, #4]
+ 9339              		.loc 3 314 10 view .LVU2912
+ 9340 005c 0193     		str	r3, [sp, #4]
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 8736              		.loc 3 315 3 is_stmt 1 view .LVU2752
- 8737 005e 019B     		ldr	r3, [sp, #4]
- 8738              	.LVL803:
+ 9341              		.loc 3 315 3 is_stmt 1 view .LVU2913
+ 9342 005e 019B     		ldr	r3, [sp, #4]
+ 9343              	.LVL878:
  315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 8739              		.loc 3 315 3 is_stmt 0 view .LVU2753
- 8740              	.LBE605:
- 8741              	.LBE604:
-1816:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8742              		.loc 1 1816 3 is_stmt 1 view .LVU2754
-1816:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-ARM GAS  /tmp/ccwR4KB7.s 			page 545
+ 9344              		.loc 3 315 3 is_stmt 0 view .LVU2914
+ 9345              	.LBE642:
+ 9346              	.LBE641:
+1981:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 9347              		.loc 1 1981 3 is_stmt 1 view .LVU2915
+1981:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 9348              		.loc 1 1981 23 is_stmt 0 view .LVU2916
+ 9349 0060 4FF40073 		mov	r3, #512
+ 9350 0064 2793     		str	r3, [sp, #156]
+1982:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 9351              		.loc 1 1982 3 is_stmt 1 view .LVU2917
+1982:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 9352              		.loc 1 1982 24 is_stmt 0 view .LVU2918
+ 9353 0066 4FF00208 		mov	r8, #2
+ 9354 006a CDF8A080 		str	r8, [sp, #160]
+1983:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 9355              		.loc 1 1983 3 is_stmt 1 view .LVU2919
+1983:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 9356              		.loc 1 1983 25 is_stmt 0 view .LVU2920
+ 9357 006e 0327     		movs	r7, #3
+ 9358 0070 2997     		str	r7, [sp, #164]
+1984:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 9359              		.loc 1 1984 3 is_stmt 1 view .LVU2921
+1984:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 9360              		.loc 1 1984 30 is_stmt 0 view .LVU2922
+ 9361 0072 0024     		movs	r4, #0
+ 9362 0074 2A94     		str	r4, [sp, #168]
+1985:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 9363              		.loc 1 1985 3 is_stmt 1 view .LVU2923
+1985:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 9364              		.loc 1 1985 24 is_stmt 0 view .LVU2924
+ 9365 0076 2B94     		str	r4, [sp, #172]
+1986:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 9366              		.loc 1 1986 3 is_stmt 1 view .LVU2925
+1986:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 9367              		.loc 1 1986 29 is_stmt 0 view .LVU2926
+ 9368 0078 0726     		movs	r6, #7
+ 9369 007a 2C96     		str	r6, [sp, #176]
+1987:Src/main.c    **** 
+ 9370              		.loc 1 1987 3 is_stmt 1 view .LVU2927
+ 9371 007c 404D     		ldr	r5, .L513+4
+ 9372 007e 27A9     		add	r1, sp, #156
+ 9373 0080 2846     		mov	r0, r5
+ 9374 0082 FFF7FEFF 		bl	LL_GPIO_Init
+ 9375              	.LVL879:
+1989:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 9376              		.loc 1 1989 3 view .LVU2928
+1989:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ARM GAS  /tmp/ccEQxcUB.s 			page 564
 
 
- 8743              		.loc 1 1816 23 is_stmt 0 view .LVU2755
- 8744 0060 4FF40073 		mov	r3, #512
- 8745 0064 2793     		str	r3, [sp, #156]
-1817:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8746              		.loc 1 1817 3 is_stmt 1 view .LVU2756
-1817:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8747              		.loc 1 1817 24 is_stmt 0 view .LVU2757
- 8748 0066 4FF00208 		mov	r8, #2
- 8749 006a CDF8A080 		str	r8, [sp, #160]
-1818:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8750              		.loc 1 1818 3 is_stmt 1 view .LVU2758
-1818:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8751              		.loc 1 1818 25 is_stmt 0 view .LVU2759
- 8752 006e 0327     		movs	r7, #3
- 8753 0070 2997     		str	r7, [sp, #164]
-1819:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8754              		.loc 1 1819 3 is_stmt 1 view .LVU2760
-1819:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8755              		.loc 1 1819 30 is_stmt 0 view .LVU2761
- 8756 0072 0024     		movs	r4, #0
- 8757 0074 2A94     		str	r4, [sp, #168]
-1820:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 8758              		.loc 1 1820 3 is_stmt 1 view .LVU2762
-1820:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 8759              		.loc 1 1820 24 is_stmt 0 view .LVU2763
- 8760 0076 2B94     		str	r4, [sp, #172]
-1821:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8761              		.loc 1 1821 3 is_stmt 1 view .LVU2764
-1821:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8762              		.loc 1 1821 29 is_stmt 0 view .LVU2765
- 8763 0078 0726     		movs	r6, #7
- 8764 007a 2C96     		str	r6, [sp, #176]
-1822:Src/main.c    **** 
- 8765              		.loc 1 1822 3 is_stmt 1 view .LVU2766
- 8766 007c 404D     		ldr	r5, .L476+4
- 8767 007e 27A9     		add	r1, sp, #156
- 8768 0080 2846     		mov	r0, r5
- 8769 0082 FFF7FEFF 		bl	LL_GPIO_Init
- 8770              	.LVL804:
-1824:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8771              		.loc 1 1824 3 view .LVU2767
-1824:Src/main.c    ****   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8772              		.loc 1 1824 23 is_stmt 0 view .LVU2768
- 8773 0086 4FF48063 		mov	r3, #1024
- 8774 008a 2793     		str	r3, [sp, #156]
-1825:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8775              		.loc 1 1825 3 is_stmt 1 view .LVU2769
-1825:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8776              		.loc 1 1825 24 is_stmt 0 view .LVU2770
- 8777 008c CDF8A080 		str	r8, [sp, #160]
-1826:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8778              		.loc 1 1826 3 is_stmt 1 view .LVU2771
-1826:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8779              		.loc 1 1826 25 is_stmt 0 view .LVU2772
- 8780 0090 2997     		str	r7, [sp, #164]
-1827:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8781              		.loc 1 1827 3 is_stmt 1 view .LVU2773
-ARM GAS  /tmp/ccwR4KB7.s 			page 546
-
-
-1827:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8782              		.loc 1 1827 30 is_stmt 0 view .LVU2774
- 8783 0092 2A94     		str	r4, [sp, #168]
-1828:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 8784              		.loc 1 1828 3 is_stmt 1 view .LVU2775
-1828:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 8785              		.loc 1 1828 24 is_stmt 0 view .LVU2776
- 8786 0094 2B94     		str	r4, [sp, #172]
-1829:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8787              		.loc 1 1829 3 is_stmt 1 view .LVU2777
-1829:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8788              		.loc 1 1829 29 is_stmt 0 view .LVU2778
- 8789 0096 2C96     		str	r6, [sp, #176]
-1830:Src/main.c    **** 
- 8790              		.loc 1 1830 3 is_stmt 1 view .LVU2779
- 8791 0098 27A9     		add	r1, sp, #156
- 8792 009a 2846     		mov	r0, r5
- 8793 009c FFF7FEFF 		bl	LL_GPIO_Init
- 8794              	.LVL805:
-1835:Src/main.c    **** 
- 8795              		.loc 1 1835 3 view .LVU2780
- 8796              	.LBB606:
- 8797              	.LBI606:
+ 9377              		.loc 1 1989 23 is_stmt 0 view .LVU2929
+ 9378 0086 4FF48063 		mov	r3, #1024
+ 9379 008a 2793     		str	r3, [sp, #156]
+1990:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 9380              		.loc 1 1990 3 is_stmt 1 view .LVU2930
+1990:Src/main.c    ****   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 9381              		.loc 1 1990 24 is_stmt 0 view .LVU2931
+ 9382 008c CDF8A080 		str	r8, [sp, #160]
+1991:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 9383              		.loc 1 1991 3 is_stmt 1 view .LVU2932
+1991:Src/main.c    ****   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 9384              		.loc 1 1991 25 is_stmt 0 view .LVU2933
+ 9385 0090 2997     		str	r7, [sp, #164]
+1992:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 9386              		.loc 1 1992 3 is_stmt 1 view .LVU2934
+1992:Src/main.c    ****   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 9387              		.loc 1 1992 30 is_stmt 0 view .LVU2935
+ 9388 0092 2A94     		str	r4, [sp, #168]
+1993:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 9389              		.loc 1 1993 3 is_stmt 1 view .LVU2936
+1993:Src/main.c    ****   GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 9390              		.loc 1 1993 24 is_stmt 0 view .LVU2937
+ 9391 0094 2B94     		str	r4, [sp, #172]
+1994:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 9392              		.loc 1 1994 3 is_stmt 1 view .LVU2938
+1994:Src/main.c    ****   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 9393              		.loc 1 1994 29 is_stmt 0 view .LVU2939
+ 9394 0096 2C96     		str	r6, [sp, #176]
+1995:Src/main.c    **** 
+ 9395              		.loc 1 1995 3 is_stmt 1 view .LVU2940
+ 9396 0098 27A9     		add	r1, sp, #156
+ 9397 009a 2846     		mov	r0, r5
+ 9398 009c FFF7FEFF 		bl	LL_GPIO_Init
+ 9399              	.LVL880:
+2000:Src/main.c    **** 
+ 9400              		.loc 1 2000 3 view .LVU2941
+ 9401              	.LBB643:
+ 9402              	.LBI643:
 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8798              		.loc 6 1032 22 view .LVU2781
- 8799              	.LBB607:
+ 9403              		.loc 6 1032 22 view .LVU2942
+ 9404              	.LBB644:
 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8800              		.loc 6 1034 3 view .LVU2782
- 8801 00a0 384B     		ldr	r3, .L476+8
- 8802 00a2 D3F8B820 		ldr	r2, [r3, #184]
- 8803 00a6 22F0F052 		bic	r2, r2, #503316480
- 8804 00aa 42F00062 		orr	r2, r2, #134217728
- 8805 00ae C3F8B820 		str	r2, [r3, #184]
- 8806              	.LVL806:
+ 9405              		.loc 6 1034 3 view .LVU2943
+ 9406 00a0 384B     		ldr	r3, .L513+8
+ 9407 00a2 D3F8B820 		ldr	r2, [r3, #184]
+ 9408 00a6 22F0F052 		bic	r2, r2, #503316480
+ 9409 00aa 42F00062 		orr	r2, r2, #134217728
+ 9410 00ae C3F8B820 		str	r2, [r3, #184]
+ 9411              	.LVL881:
 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8807              		.loc 6 1034 3 is_stmt 0 view .LVU2783
- 8808              	.LBE607:
- 8809              	.LBE606:
-1837:Src/main.c    **** 
- 8810              		.loc 1 1837 3 is_stmt 1 view .LVU2784
- 8811              	.LBB608:
- 8812              	.LBI608:
+ 9412              		.loc 6 1034 3 is_stmt 0 view .LVU2944
+ 9413              	.LBE644:
+ 9414              	.LBE643:
+2002:Src/main.c    **** 
+ 9415              		.loc 1 2002 3 is_stmt 1 view .LVU2945
+ 9416              	.LBB645:
+ 9417              	.LBI645:
+ARM GAS  /tmp/ccEQxcUB.s 			page 565
+
+
  598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8813              		.loc 6 598 22 view .LVU2785
- 8814              	.LBB609:
+ 9418              		.loc 6 598 22 view .LVU2946
+ 9419              	.LBB646:
  600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8815              		.loc 6 600 3 view .LVU2786
- 8816 00b2 D3F8B820 		ldr	r2, [r3, #184]
- 8817 00b6 22F0C002 		bic	r2, r2, #192
- 8818 00ba 42F04002 		orr	r2, r2, #64
- 8819 00be C3F8B820 		str	r2, [r3, #184]
- 8820              	.LVL807:
+ 9420              		.loc 6 600 3 view .LVU2947
+ 9421 00b2 D3F8B820 		ldr	r2, [r3, #184]
+ 9422 00b6 22F0C002 		bic	r2, r2, #192
+ 9423 00ba 42F04002 		orr	r2, r2, #64
+ 9424 00be C3F8B820 		str	r2, [r3, #184]
+ 9425              	.LVL882:
  600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8821              		.loc 6 600 3 is_stmt 0 view .LVU2787
- 8822              	.LBE609:
- 8823              	.LBE608:
-1839:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 547
-
-
- 8824              		.loc 1 1839 3 is_stmt 1 view .LVU2788
- 8825              	.LBB610:
- 8826              	.LBI610:
+ 9426              		.loc 6 600 3 is_stmt 0 view .LVU2948
+ 9427              	.LBE646:
+ 9428              	.LBE645:
+2004:Src/main.c    **** 
+ 9429              		.loc 1 2004 3 is_stmt 1 view .LVU2949
+ 9430              	.LBB647:
+ 9431              	.LBI647:
  924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8827              		.loc 6 924 22 view .LVU2789
- 8828              	.LBB611:
+ 9432              		.loc 6 924 22 view .LVU2950
+ 9433              	.LBB648:
  926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8829              		.loc 6 926 3 view .LVU2790
- 8830 00c2 D3F8B820 		ldr	r2, [r3, #184]
- 8831 00c6 42F44032 		orr	r2, r2, #196608
- 8832 00ca C3F8B820 		str	r2, [r3, #184]
- 8833              	.LVL808:
+ 9434              		.loc 6 926 3 view .LVU2951
+ 9435 00c2 D3F8B820 		ldr	r2, [r3, #184]
+ 9436 00c6 42F44032 		orr	r2, r2, #196608
+ 9437 00ca C3F8B820 		str	r2, [r3, #184]
+ 9438              	.LVL883:
  926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8834              		.loc 6 926 3 is_stmt 0 view .LVU2791
- 8835              	.LBE611:
- 8836              	.LBE610:
-1841:Src/main.c    **** 
- 8837              		.loc 1 1841 3 is_stmt 1 view .LVU2792
- 8838              	.LBB612:
- 8839              	.LBI612:
+ 9439              		.loc 6 926 3 is_stmt 0 view .LVU2952
+ 9440              	.LBE648:
+ 9441              	.LBE647:
+2006:Src/main.c    **** 
+ 9442              		.loc 1 2006 3 is_stmt 1 view .LVU2953
+ 9443              	.LBB649:
+ 9444              	.LBI649:
  646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8840              		.loc 6 646 22 view .LVU2793
- 8841              	.LBB613:
+ 9445              		.loc 6 646 22 view .LVU2954
+ 9446              	.LBB650:
  648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8842              		.loc 6 648 3 view .LVU2794
- 8843 00ce D3F8B820 		ldr	r2, [r3, #184]
- 8844 00d2 22F49072 		bic	r2, r2, #288
- 8845 00d6 C3F8B820 		str	r2, [r3, #184]
- 8846              	.LVL809:
+ 9447              		.loc 6 648 3 view .LVU2955
+ 9448 00ce D3F8B820 		ldr	r2, [r3, #184]
+ 9449 00d2 22F49072 		bic	r2, r2, #288
+ 9450 00d6 C3F8B820 		str	r2, [r3, #184]
+ 9451              	.LVL884:
  648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8847              		.loc 6 648 3 is_stmt 0 view .LVU2795
- 8848              	.LBE613:
- 8849              	.LBE612:
-1843:Src/main.c    **** 
- 8850              		.loc 1 1843 3 is_stmt 1 view .LVU2796
- 8851              	.LBB614:
- 8852              	.LBI614:
+ 9452              		.loc 6 648 3 is_stmt 0 view .LVU2956
+ 9453              	.LBE650:
+ 9454              	.LBE649:
+2008:Src/main.c    **** 
+ 9455              		.loc 1 2008 3 is_stmt 1 view .LVU2957
+ 9456              	.LBB651:
+ 9457              	.LBI651:
  693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8853              		.loc 6 693 22 view .LVU2797
- 8854              	.LBB615:
+ 9458              		.loc 6 693 22 view .LVU2958
+ 9459              	.LBB652:
  695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8855              		.loc 6 695 3 view .LVU2798
- 8856 00da D3F8B820 		ldr	r2, [r3, #184]
- 8857 00de 22F40072 		bic	r2, r2, #512
- 8858 00e2 C3F8B820 		str	r2, [r3, #184]
- 8859              	.LVL810:
+ 9460              		.loc 6 695 3 view .LVU2959
+ARM GAS  /tmp/ccEQxcUB.s 			page 566
+
+
+ 9461 00da D3F8B820 		ldr	r2, [r3, #184]
+ 9462 00de 22F40072 		bic	r2, r2, #512
+ 9463 00e2 C3F8B820 		str	r2, [r3, #184]
+ 9464              	.LVL885:
  695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8860              		.loc 6 695 3 is_stmt 0 view .LVU2799
- 8861              	.LBE615:
- 8862              	.LBE614:
-1845:Src/main.c    **** 
- 8863              		.loc 1 1845 3 is_stmt 1 view .LVU2800
- 8864              	.LBB616:
- 8865              	.LBI616:
+ 9465              		.loc 6 695 3 is_stmt 0 view .LVU2960
+ 9466              	.LBE652:
+ 9467              	.LBE651:
+2010:Src/main.c    **** 
+ 9468              		.loc 1 2010 3 is_stmt 1 view .LVU2961
+ 9469              	.LBB653:
+ 9470              	.LBI653:
  738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8866              		.loc 6 738 22 view .LVU2801
- 8867              	.LBB617:
-ARM GAS  /tmp/ccwR4KB7.s 			page 548
-
-
+ 9471              		.loc 6 738 22 view .LVU2962
+ 9472              	.LBB654:
  740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8868              		.loc 6 740 3 view .LVU2802
- 8869 00e6 D3F8B820 		ldr	r2, [r3, #184]
- 8870 00ea 42F48062 		orr	r2, r2, #1024
- 8871 00ee C3F8B820 		str	r2, [r3, #184]
- 8872              	.LVL811:
+ 9473              		.loc 6 740 3 view .LVU2963
+ 9474 00e6 D3F8B820 		ldr	r2, [r3, #184]
+ 9475 00ea 42F48062 		orr	r2, r2, #1024
+ 9476 00ee C3F8B820 		str	r2, [r3, #184]
+ 9477              	.LVL886:
  740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8873              		.loc 6 740 3 is_stmt 0 view .LVU2803
- 8874              	.LBE617:
- 8875              	.LBE616:
-1847:Src/main.c    **** 
- 8876              		.loc 1 1847 3 is_stmt 1 view .LVU2804
- 8877              	.LBB618:
- 8878              	.LBI618:
+ 9478              		.loc 6 740 3 is_stmt 0 view .LVU2964
+ 9479              	.LBE654:
+ 9480              	.LBE653:
+2012:Src/main.c    **** 
+ 9481              		.loc 1 2012 3 is_stmt 1 view .LVU2965
+ 9482              	.LBB655:
+ 9483              	.LBI655:
  784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8879              		.loc 6 784 22 view .LVU2805
- 8880              	.LBB619:
+ 9484              		.loc 6 784 22 view .LVU2966
+ 9485              	.LBB656:
  786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8881              		.loc 6 786 3 view .LVU2806
- 8882 00f2 D3F8B820 		ldr	r2, [r3, #184]
- 8883 00f6 22F4C052 		bic	r2, r2, #6144
- 8884 00fa C3F8B820 		str	r2, [r3, #184]
- 8885              	.LVL812:
+ 9486              		.loc 6 786 3 view .LVU2967
+ 9487 00f2 D3F8B820 		ldr	r2, [r3, #184]
+ 9488 00f6 22F4C052 		bic	r2, r2, #6144
+ 9489 00fa C3F8B820 		str	r2, [r3, #184]
+ 9490              	.LVL887:
  786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8886              		.loc 6 786 3 is_stmt 0 view .LVU2807
- 8887              	.LBE619:
- 8888              	.LBE618:
-1849:Src/main.c    **** 
- 8889              		.loc 1 1849 3 is_stmt 1 view .LVU2808
- 8890              	.LBB620:
- 8891              	.LBI620:
+ 9491              		.loc 6 786 3 is_stmt 0 view .LVU2968
+ 9492              	.LBE656:
+ 9493              	.LBE655:
+2014:Src/main.c    **** 
+ 9494              		.loc 1 2014 3 is_stmt 1 view .LVU2969
+ 9495              	.LBB657:
+ 9496              	.LBI657:
  831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8892              		.loc 6 831 22 view .LVU2809
- 8893              	.LBB621:
+ 9497              		.loc 6 831 22 view .LVU2970
+ 9498              	.LBB658:
  833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8894              		.loc 6 833 3 view .LVU2810
- 8895 00fe D3F8B820 		ldr	r2, [r3, #184]
- 8896 0102 22F4C042 		bic	r2, r2, #24576
- 8897 0106 C3F8B820 		str	r2, [r3, #184]
- 8898              	.LVL813:
+ 9499              		.loc 6 833 3 view .LVU2971
+ 9500 00fe D3F8B820 		ldr	r2, [r3, #184]
+ 9501 0102 22F4C042 		bic	r2, r2, #24576
+ 9502 0106 C3F8B820 		str	r2, [r3, #184]
+ 9503              	.LVL888:
  833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8899              		.loc 6 833 3 is_stmt 0 view .LVU2811
- 8900              	.LBE621:
- 8901              	.LBE620:
-1851:Src/main.c    **** 
- 8902              		.loc 1 1851 3 is_stmt 1 view .LVU2812
- 8903              	.LBB622:
- 8904              	.LBI622:
+ 9504              		.loc 6 833 3 is_stmt 0 view .LVU2972
+ARM GAS  /tmp/ccEQxcUB.s 			page 567
+
+
+ 9505              	.LBE658:
+ 9506              	.LBE657:
+2016:Src/main.c    **** 
+ 9507              		.loc 1 2016 3 is_stmt 1 view .LVU2973
+ 9508              	.LBB659:
+ 9509              	.LBI659:
 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 8905              		.loc 6 1299 22 view .LVU2813
- 8906              	.LBB623:
+ 9510              		.loc 6 1299 22 view .LVU2974
+ 9511              	.LBB660:
 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8907              		.loc 6 1301 3 view .LVU2814
- 8908 010a D3F8CC20 		ldr	r2, [r3, #204]
- 8909 010e 22F00402 		bic	r2, r2, #4
- 8910 0112 C3F8CC20 		str	r2, [r3, #204]
- 8911              	.LVL814:
-ARM GAS  /tmp/ccwR4KB7.s 			page 549
-
-
+ 9512              		.loc 6 1301 3 view .LVU2975
+ 9513 010a D3F8CC20 		ldr	r2, [r3, #204]
+ 9514 010e 22F00402 		bic	r2, r2, #4
+ 9515 0112 C3F8CC20 		str	r2, [r3, #204]
+ 9516              	.LVL889:
 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 8912              		.loc 6 1301 3 is_stmt 0 view .LVU2815
- 8913              	.LBE623:
- 8914              	.LBE622:
-1854:Src/main.c    ****   NVIC_EnableIRQ(USART1_IRQn);
- 8915              		.loc 1 1854 3 is_stmt 1 view .LVU2816
- 8916              	.LBB624:
- 8917              	.LBI624:
+ 9517              		.loc 6 1301 3 is_stmt 0 view .LVU2976
+ 9518              	.LBE660:
+ 9519              	.LBE659:
+2019:Src/main.c    ****   NVIC_EnableIRQ(USART1_IRQn);
+ 9520              		.loc 1 2019 3 is_stmt 1 view .LVU2977
+ 9521              	.LBB661:
+ 9522              	.LBI661:
 1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 8918              		.loc 2 1884 26 view .LVU2817
- 8919              	.LBB625:
+ 9523              		.loc 2 1884 26 view .LVU2978
+ 9524              	.LBB662:
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 8920              		.loc 2 1886 3 view .LVU2818
+ 9525              		.loc 2 1886 3 view .LVU2979
 1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 8921              		.loc 2 1886 26 is_stmt 0 view .LVU2819
- 8922 0116 1C4B     		ldr	r3, .L476+12
- 8923 0118 D868     		ldr	r0, [r3, #12]
- 8924              	.LBE625:
- 8925              	.LBE624:
-1854:Src/main.c    ****   NVIC_EnableIRQ(USART1_IRQn);
- 8926              		.loc 1 1854 3 discriminator 1 view .LVU2820
- 8927 011a 2246     		mov	r2, r4
- 8928 011c 2146     		mov	r1, r4
- 8929 011e C0F30220 		ubfx	r0, r0, #8, #3
- 8930 0122 FFF7FEFF 		bl	NVIC_EncodePriority
- 8931              	.LVL815:
- 8932              	.LBB626:
- 8933              	.LBI626:
+ 9526              		.loc 2 1886 26 is_stmt 0 view .LVU2980
+ 9527 0116 1C4B     		ldr	r3, .L513+12
+ 9528 0118 D868     		ldr	r0, [r3, #12]
+ 9529              	.LBE662:
+ 9530              	.LBE661:
+2019:Src/main.c    ****   NVIC_EnableIRQ(USART1_IRQn);
+ 9531              		.loc 1 2019 3 discriminator 1 view .LVU2981
+ 9532 011a 2246     		mov	r2, r4
+ 9533 011c 2146     		mov	r1, r4
+ 9534 011e C0F30220 		ubfx	r0, r0, #8, #3
+ 9535 0122 FFF7FEFF 		bl	NVIC_EncodePriority
+ 9536              	.LVL890:
+ 9537              	.LBB663:
+ 9538              	.LBI663:
 2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 8934              		.loc 2 2024 22 is_stmt 1 view .LVU2821
- 8935              	.LBB627:
+ 9539              		.loc 2 2024 22 is_stmt 1 view .LVU2982
+ 9540              	.LBB664:
 2026:Drivers/CMSIS/Include/core_cm7.h ****   {
- 8936              		.loc 2 2026 3 view .LVU2822
+ 9541              		.loc 2 2026 3 view .LVU2983
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8937              		.loc 2 2028 5 view .LVU2823
+ 9542              		.loc 2 2028 5 view .LVU2984
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8938              		.loc 2 2028 49 is_stmt 0 view .LVU2824
- 8939 0126 0001     		lsls	r0, r0, #4
- 8940              	.LVL816:
+ 9543              		.loc 2 2028 49 is_stmt 0 view .LVU2985
+ 9544 0126 0001     		lsls	r0, r0, #4
+ 9545              	.LVL891:
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8941              		.loc 2 2028 49 view .LVU2825
- 8942 0128 C0B2     		uxtb	r0, r0
+ 9546              		.loc 2 2028 49 view .LVU2986
+ 9547 0128 C0B2     		uxtb	r0, r0
+ARM GAS  /tmp/ccEQxcUB.s 			page 568
+
+
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8943              		.loc 2 2028 47 view .LVU2826
- 8944 012a 184B     		ldr	r3, .L476+16
- 8945 012c 83F82503 		strb	r0, [r3, #805]
- 8946              	.LVL817:
+ 9548              		.loc 2 2028 47 view .LVU2987
+ 9549 012a 184B     		ldr	r3, .L513+16
+ 9550 012c 83F82503 		strb	r0, [r3, #805]
+ 9551              	.LVL892:
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8947              		.loc 2 2028 47 view .LVU2827
- 8948              	.LBE627:
- 8949              	.LBE626:
-1855:Src/main.c    **** 
- 8950              		.loc 1 1855 3 is_stmt 1 view .LVU2828
- 8951              	.LBB628:
- 8952              	.LBI628:
+ 9552              		.loc 2 2028 47 view .LVU2988
+ 9553              	.LBE664:
+ 9554              	.LBE663:
+2020:Src/main.c    **** 
+ 9555              		.loc 1 2020 3 is_stmt 1 view .LVU2989
+ 9556              	.LBB665:
+ 9557              	.LBI665:
 1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 8953              		.loc 2 1896 22 view .LVU2829
-ARM GAS  /tmp/ccwR4KB7.s 			page 550
-
-
- 8954              	.LBB629:
+ 9558              		.loc 2 1896 22 view .LVU2990
+ 9559              	.LBB666:
 1898:Drivers/CMSIS/Include/core_cm7.h ****   {
- 8955              		.loc 2 1898 3 view .LVU2830
+ 9560              		.loc 2 1898 3 view .LVU2991
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8956              		.loc 2 1900 5 view .LVU2831
+ 9561              		.loc 2 1900 5 view .LVU2992
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8957              		.loc 2 1900 43 is_stmt 0 view .LVU2832
- 8958 0130 2022     		movs	r2, #32
- 8959 0132 5A60     		str	r2, [r3, #4]
- 8960              	.LVL818:
+ 9562              		.loc 2 1900 43 is_stmt 0 view .LVU2993
+ 9563 0130 2022     		movs	r2, #32
+ 9564 0132 5A60     		str	r2, [r3, #4]
+ 9565              	.LVL893:
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 8961              		.loc 2 1900 43 view .LVU2833
- 8962              	.LBE629:
- 8963              	.LBE628:
-1860:Src/main.c    ****   USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
- 8964              		.loc 1 1860 3 is_stmt 1 view .LVU2834
-1860:Src/main.c    ****   USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
- 8965              		.loc 1 1860 29 is_stmt 0 view .LVU2835
- 8966 0134 4FF4E133 		mov	r3, #115200
- 8967 0138 2D93     		str	r3, [sp, #180]
-1861:Src/main.c    ****   USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
- 8968              		.loc 1 1861 3 is_stmt 1 view .LVU2836
-1861:Src/main.c    ****   USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
- 8969              		.loc 1 1861 30 is_stmt 0 view .LVU2837
- 8970 013a 2E94     		str	r4, [sp, #184]
-1862:Src/main.c    ****   USART_InitStruct.Parity = LL_USART_PARITY_NONE;
- 8971              		.loc 1 1862 3 is_stmt 1 view .LVU2838
-1862:Src/main.c    ****   USART_InitStruct.Parity = LL_USART_PARITY_NONE;
- 8972              		.loc 1 1862 29 is_stmt 0 view .LVU2839
- 8973 013c 2F94     		str	r4, [sp, #188]
-1863:Src/main.c    ****   USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
- 8974              		.loc 1 1863 3 is_stmt 1 view .LVU2840
-1863:Src/main.c    ****   USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
- 8975              		.loc 1 1863 27 is_stmt 0 view .LVU2841
- 8976 013e 3094     		str	r4, [sp, #192]
-1864:Src/main.c    ****   USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
- 8977              		.loc 1 1864 3 is_stmt 1 view .LVU2842
-1864:Src/main.c    ****   USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
- 8978              		.loc 1 1864 38 is_stmt 0 view .LVU2843
- 8979 0140 0C23     		movs	r3, #12
- 8980 0142 3193     		str	r3, [sp, #196]
-1865:Src/main.c    ****   USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
- 8981              		.loc 1 1865 3 is_stmt 1 view .LVU2844
-1865:Src/main.c    ****   USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
- 8982              		.loc 1 1865 40 is_stmt 0 view .LVU2845
- 8983 0144 3294     		str	r4, [sp, #200]
-1866:Src/main.c    ****   LL_USART_Init(USART1, &USART_InitStruct);
- 8984              		.loc 1 1866 3 is_stmt 1 view .LVU2846
-1866:Src/main.c    ****   LL_USART_Init(USART1, &USART_InitStruct);
- 8985              		.loc 1 1866 33 is_stmt 0 view .LVU2847
- 8986 0146 3394     		str	r4, [sp, #204]
-1867:Src/main.c    ****   LL_USART_ConfigAsyncMode(USART1);
- 8987              		.loc 1 1867 3 is_stmt 1 view .LVU2848
- 8988 0148 04F18044 		add	r4, r4, #1073741824
- 8989 014c 04F58834 		add	r4, r4, #69632
- 8990 0150 2DA9     		add	r1, sp, #180
- 8991 0152 2046     		mov	r0, r4
-ARM GAS  /tmp/ccwR4KB7.s 			page 551
+ 9566              		.loc 2 1900 43 view .LVU2994
+ 9567              	.LBE666:
+ 9568              	.LBE665:
+2025:Src/main.c    ****   USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+ 9569              		.loc 1 2025 3 is_stmt 1 view .LVU2995
+2025:Src/main.c    ****   USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+ 9570              		.loc 1 2025 29 is_stmt 0 view .LVU2996
+ 9571 0134 4FF4E133 		mov	r3, #115200
+ 9572 0138 2D93     		str	r3, [sp, #180]
+2026:Src/main.c    ****   USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ 9573              		.loc 1 2026 3 is_stmt 1 view .LVU2997
+2026:Src/main.c    ****   USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ 9574              		.loc 1 2026 30 is_stmt 0 view .LVU2998
+ 9575 013a 2E94     		str	r4, [sp, #184]
+2027:Src/main.c    ****   USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+ 9576              		.loc 1 2027 3 is_stmt 1 view .LVU2999
+2027:Src/main.c    ****   USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+ 9577              		.loc 1 2027 29 is_stmt 0 view .LVU3000
+ 9578 013c 2F94     		str	r4, [sp, #188]
+2028:Src/main.c    ****   USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ 9579              		.loc 1 2028 3 is_stmt 1 view .LVU3001
+2028:Src/main.c    ****   USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ 9580              		.loc 1 2028 27 is_stmt 0 view .LVU3002
+ 9581 013e 3094     		str	r4, [sp, #192]
+2029:Src/main.c    ****   USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ 9582              		.loc 1 2029 3 is_stmt 1 view .LVU3003
+2029:Src/main.c    ****   USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ 9583              		.loc 1 2029 38 is_stmt 0 view .LVU3004
+ 9584 0140 0C23     		movs	r3, #12
+ 9585 0142 3193     		str	r3, [sp, #196]
+2030:Src/main.c    ****   USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ARM GAS  /tmp/ccEQxcUB.s 			page 569
 
 
- 8992 0154 FFF7FEFF 		bl	LL_USART_Init
- 8993              	.LVL819:
-1868:Src/main.c    ****   LL_USART_Enable(USART1);
- 8994              		.loc 1 1868 3 view .LVU2849
- 8995              	.LBB630:
- 8996              	.LBI630:
+ 9586              		.loc 1 2030 3 is_stmt 1 view .LVU3005
+2030:Src/main.c    ****   USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ 9587              		.loc 1 2030 40 is_stmt 0 view .LVU3006
+ 9588 0144 3294     		str	r4, [sp, #200]
+2031:Src/main.c    ****   LL_USART_Init(USART1, &USART_InitStruct);
+ 9589              		.loc 1 2031 3 is_stmt 1 view .LVU3007
+2031:Src/main.c    ****   LL_USART_Init(USART1, &USART_InitStruct);
+ 9590              		.loc 1 2031 33 is_stmt 0 view .LVU3008
+ 9591 0146 3394     		str	r4, [sp, #204]
+2032:Src/main.c    ****   LL_USART_ConfigAsyncMode(USART1);
+ 9592              		.loc 1 2032 3 is_stmt 1 view .LVU3009
+ 9593 0148 04F18044 		add	r4, r4, #1073741824
+ 9594 014c 04F58834 		add	r4, r4, #69632
+ 9595 0150 2DA9     		add	r1, sp, #180
+ 9596 0152 2046     		mov	r0, r4
+ 9597 0154 FFF7FEFF 		bl	LL_USART_Init
+ 9598              	.LVL894:
+2033:Src/main.c    ****   LL_USART_Enable(USART1);
+ 9599              		.loc 1 2033 3 view .LVU3010
+ 9600              	.LBB667:
+ 9601              	.LBI667:
 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 8997              		.loc 7 2320 22 view .LVU2850
- 8998              	.LBB631:
+ 9602              		.loc 7 2320 22 view .LVU3011
+ 9603              	.LBB668:
 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
- 8999              		.loc 7 2326 3 view .LVU2851
- 9000 0158 6368     		ldr	r3, [r4, #4]
- 9001 015a 23F49043 		bic	r3, r3, #18432
- 9002 015e 6360     		str	r3, [r4, #4]
+ 9604              		.loc 7 2326 3 view .LVU3012
+ 9605 0158 6368     		ldr	r3, [r4, #4]
+ 9606 015a 23F49043 		bic	r3, r3, #18432
+ 9607 015e 6360     		str	r3, [r4, #4]
 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9003              		.loc 7 2327 3 view .LVU2852
- 9004 0160 A368     		ldr	r3, [r4, #8]
- 9005 0162 23F02A03 		bic	r3, r3, #42
- 9006 0166 A360     		str	r3, [r4, #8]
- 9007              	.LVL820:
+ 9608              		.loc 7 2327 3 view .LVU3013
+ 9609 0160 A368     		ldr	r3, [r4, #8]
+ 9610 0162 23F02A03 		bic	r3, r3, #42
+ 9611 0166 A360     		str	r3, [r4, #8]
+ 9612              	.LVL895:
 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9008              		.loc 7 2327 3 is_stmt 0 view .LVU2853
- 9009              	.LBE631:
- 9010              	.LBE630:
-1869:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 2 */
- 9011              		.loc 1 1869 3 is_stmt 1 view .LVU2854
- 9012              	.LBB632:
- 9013              	.LBI632:
+ 9613              		.loc 7 2327 3 is_stmt 0 view .LVU3014
+ 9614              	.LBE668:
+ 9615              	.LBE667:
+2034:Src/main.c    ****   /* USER CODE BEGIN USART1_Init 2 */
+ 9616              		.loc 1 2034 3 is_stmt 1 view .LVU3015
+ 9617              	.LBB669:
+ 9618              	.LBI669:
  560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 9014              		.loc 7 560 22 view .LVU2855
- 9015              	.LBB633:
+ 9619              		.loc 7 560 22 view .LVU3016
+ 9620              	.LBB670:
  562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9016              		.loc 7 562 3 view .LVU2856
- 9017 0168 2368     		ldr	r3, [r4]
- 9018 016a 43F00103 		orr	r3, r3, #1
- 9019 016e 2360     		str	r3, [r4]
- 9020              	.LVL821:
+ 9621              		.loc 7 562 3 view .LVU3017
+ 9622 0168 2368     		ldr	r3, [r4]
+ 9623 016a 43F00103 		orr	r3, r3, #1
+ 9624 016e 2360     		str	r3, [r4]
+ 9625              	.LVL896:
  562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9021              		.loc 7 562 3 is_stmt 0 view .LVU2857
- 9022              	.LBE633:
- 9023              	.LBE632:
-1874:Src/main.c    **** 
- 9024              		.loc 1 1874 1 view .LVU2858
- 9025 0170 34B0     		add	sp, sp, #208
- 9026              	.LCFI84:
- 9027              		.cfi_remember_state
- 9028              		.cfi_def_cfa_offset 24
- 9029              		@ sp needed
- 9030 0172 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
- 9031              	.L475:
- 9032              	.LCFI85:
- 9033              		.cfi_restore_state
-1805:Src/main.c    ****   }
- 9034              		.loc 1 1805 5 is_stmt 1 view .LVU2859
- 9035 0176 FFF7FEFF 		bl	Error_Handler
- 9036              	.LVL822:
- 9037              	.L477:
-ARM GAS  /tmp/ccwR4KB7.s 			page 552
+ 9626              		.loc 7 562 3 is_stmt 0 view .LVU3018
+ 9627              	.LBE670:
+ 9628              	.LBE669:
+2039:Src/main.c    **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 570
 
 
- 9038 017a 00BF     		.align	2
- 9039              	.L476:
- 9040 017c 00380240 		.word	1073887232
- 9041 0180 00000240 		.word	1073872896
- 9042 0184 00640240 		.word	1073898496
- 9043 0188 00ED00E0 		.word	-536810240
- 9044 018c 00E100E0 		.word	-536813312
- 9045              		.cfi_endproc
- 9046              	.LFE1204:
- 9048              		.section	.text.MX_TIM10_Init,"ax",%progbits
- 9049              		.align	1
- 9050              		.syntax unified
- 9051              		.thumb
- 9052              		.thumb_func
- 9054              	MX_TIM10_Init:
- 9055              	.LFB1201:
-1676:Src/main.c    **** 
- 9056              		.loc 1 1676 1 view -0
- 9057              		.cfi_startproc
- 9058              		@ args = 0, pretend = 0, frame = 0
- 9059              		@ frame_needed = 0, uses_anonymous_args = 0
- 9060 0000 08B5     		push	{r3, lr}
- 9061              	.LCFI86:
- 9062              		.cfi_def_cfa_offset 8
- 9063              		.cfi_offset 3, -8
- 9064              		.cfi_offset 14, -4
-1685:Src/main.c    ****   htim10.Init.Prescaler = 183;
- 9065              		.loc 1 1685 3 view .LVU2861
-1685:Src/main.c    ****   htim10.Init.Prescaler = 183;
- 9066              		.loc 1 1685 19 is_stmt 0 view .LVU2862
- 9067 0002 0848     		ldr	r0, .L482
- 9068 0004 084B     		ldr	r3, .L482+4
- 9069 0006 0360     		str	r3, [r0]
-1686:Src/main.c    ****   htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9070              		.loc 1 1686 3 is_stmt 1 view .LVU2863
-1686:Src/main.c    ****   htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9071              		.loc 1 1686 25 is_stmt 0 view .LVU2864
- 9072 0008 B723     		movs	r3, #183
- 9073 000a 4360     		str	r3, [r0, #4]
-1687:Src/main.c    ****   htim10.Init.Period = 9;
- 9074              		.loc 1 1687 3 is_stmt 1 view .LVU2865
-1687:Src/main.c    ****   htim10.Init.Period = 9;
- 9075              		.loc 1 1687 27 is_stmt 0 view .LVU2866
- 9076 000c 0023     		movs	r3, #0
- 9077 000e 8360     		str	r3, [r0, #8]
-1688:Src/main.c    ****   htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9078              		.loc 1 1688 3 is_stmt 1 view .LVU2867
-1688:Src/main.c    ****   htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9079              		.loc 1 1688 22 is_stmt 0 view .LVU2868
- 9080 0010 0922     		movs	r2, #9
- 9081 0012 C260     		str	r2, [r0, #12]
-1689:Src/main.c    ****   htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 9082              		.loc 1 1689 3 is_stmt 1 view .LVU2869
-1689:Src/main.c    ****   htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 9083              		.loc 1 1689 29 is_stmt 0 view .LVU2870
- 9084 0014 0361     		str	r3, [r0, #16]
-1690:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
-ARM GAS  /tmp/ccwR4KB7.s 			page 553
+ 9629              		.loc 1 2039 1 view .LVU3019
+ 9630 0170 34B0     		add	sp, sp, #208
+ 9631              	.LCFI86:
+ 9632              		.cfi_remember_state
+ 9633              		.cfi_def_cfa_offset 24
+ 9634              		@ sp needed
+ 9635 0172 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
+ 9636              	.L512:
+ 9637              	.LCFI87:
+ 9638              		.cfi_restore_state
+1970:Src/main.c    ****   }
+ 9639              		.loc 1 1970 5 is_stmt 1 view .LVU3020
+ 9640 0176 FFF7FEFF 		bl	Error_Handler
+ 9641              	.LVL897:
+ 9642              	.L514:
+ 9643 017a 00BF     		.align	2
+ 9644              	.L513:
+ 9645 017c 00380240 		.word	1073887232
+ 9646 0180 00000240 		.word	1073872896
+ 9647 0184 00640240 		.word	1073898496
+ 9648 0188 00ED00E0 		.word	-536810240
+ 9649 018c 00E100E0 		.word	-536813312
+ 9650              		.cfi_endproc
+ 9651              	.LFE1205:
+ 9653              		.section	.text.MX_TIM10_Init,"ax",%progbits
+ 9654              		.align	1
+ 9655              		.syntax unified
+ 9656              		.thumb
+ 9657              		.thumb_func
+ 9659              	MX_TIM10_Init:
+ 9660              	.LFB1201:
+1772:Src/main.c    **** 
+ 9661              		.loc 1 1772 1 view -0
+ 9662              		.cfi_startproc
+ 9663              		@ args = 0, pretend = 0, frame = 0
+ 9664              		@ frame_needed = 0, uses_anonymous_args = 0
+ 9665 0000 08B5     		push	{r3, lr}
+ 9666              	.LCFI88:
+ 9667              		.cfi_def_cfa_offset 8
+ 9668              		.cfi_offset 3, -8
+ 9669              		.cfi_offset 14, -4
+1781:Src/main.c    ****   htim10.Init.Prescaler = 183;
+ 9670              		.loc 1 1781 3 view .LVU3022
+1781:Src/main.c    ****   htim10.Init.Prescaler = 183;
+ 9671              		.loc 1 1781 19 is_stmt 0 view .LVU3023
+ 9672 0002 0848     		ldr	r0, .L519
+ 9673 0004 084B     		ldr	r3, .L519+4
+ 9674 0006 0360     		str	r3, [r0]
+1782:Src/main.c    ****   htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 9675              		.loc 1 1782 3 is_stmt 1 view .LVU3024
+1782:Src/main.c    ****   htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 9676              		.loc 1 1782 25 is_stmt 0 view .LVU3025
+ 9677 0008 B723     		movs	r3, #183
+ 9678 000a 4360     		str	r3, [r0, #4]
+1783:Src/main.c    ****   htim10.Init.Period = 9;
+ 9679              		.loc 1 1783 3 is_stmt 1 view .LVU3026
+1783:Src/main.c    ****   htim10.Init.Period = 9;
+ARM GAS  /tmp/ccEQxcUB.s 			page 571
 
 
- 9085              		.loc 1 1690 3 is_stmt 1 view .LVU2871
-1690:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
- 9086              		.loc 1 1690 33 is_stmt 0 view .LVU2872
- 9087 0016 8361     		str	r3, [r0, #24]
-1691:Src/main.c    ****   {
- 9088              		.loc 1 1691 3 is_stmt 1 view .LVU2873
-1691:Src/main.c    ****   {
- 9089              		.loc 1 1691 7 is_stmt 0 view .LVU2874
- 9090 0018 FFF7FEFF 		bl	HAL_TIM_Base_Init
- 9091              	.LVL823:
-1691:Src/main.c    ****   {
- 9092              		.loc 1 1691 6 discriminator 1 view .LVU2875
- 9093 001c 00B9     		cbnz	r0, .L481
-1699:Src/main.c    **** 
- 9094              		.loc 1 1699 1 view .LVU2876
- 9095 001e 08BD     		pop	{r3, pc}
- 9096              	.L481:
-1693:Src/main.c    ****   }
- 9097              		.loc 1 1693 5 is_stmt 1 view .LVU2877
- 9098 0020 FFF7FEFF 		bl	Error_Handler
- 9099              	.LVL824:
- 9100              	.L483:
- 9101              		.align	2
- 9102              	.L482:
- 9103 0024 00000000 		.word	htim10
- 9104 0028 00440140 		.word	1073824768
- 9105              		.cfi_endproc
- 9106              	.LFE1201:
- 9108              		.section	.text.MX_UART8_Init,"ax",%progbits
- 9109              		.align	1
- 9110              		.syntax unified
- 9111              		.thumb
- 9112              		.thumb_func
- 9114              	MX_UART8_Init:
- 9115              	.LFB1203:
-1753:Src/main.c    **** 
- 9116              		.loc 1 1753 1 view -0
- 9117              		.cfi_startproc
- 9118              		@ args = 0, pretend = 0, frame = 0
- 9119              		@ frame_needed = 0, uses_anonymous_args = 0
- 9120 0000 08B5     		push	{r3, lr}
- 9121              	.LCFI87:
- 9122              		.cfi_def_cfa_offset 8
- 9123              		.cfi_offset 3, -8
- 9124              		.cfi_offset 14, -4
-1762:Src/main.c    ****   huart8.Init.BaudRate = 115200;
- 9125              		.loc 1 1762 3 view .LVU2879
-1762:Src/main.c    ****   huart8.Init.BaudRate = 115200;
- 9126              		.loc 1 1762 19 is_stmt 0 view .LVU2880
- 9127 0002 0B48     		ldr	r0, .L488
- 9128 0004 0B4B     		ldr	r3, .L488+4
- 9129 0006 0360     		str	r3, [r0]
-1763:Src/main.c    ****   huart8.Init.WordLength = UART_WORDLENGTH_8B;
- 9130              		.loc 1 1763 3 is_stmt 1 view .LVU2881
-1763:Src/main.c    ****   huart8.Init.WordLength = UART_WORDLENGTH_8B;
- 9131              		.loc 1 1763 24 is_stmt 0 view .LVU2882
- 9132 0008 4FF4E133 		mov	r3, #115200
-ARM GAS  /tmp/ccwR4KB7.s 			page 554
+ 9680              		.loc 1 1783 27 is_stmt 0 view .LVU3027
+ 9681 000c 0023     		movs	r3, #0
+ 9682 000e 8360     		str	r3, [r0, #8]
+1784:Src/main.c    ****   htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 9683              		.loc 1 1784 3 is_stmt 1 view .LVU3028
+1784:Src/main.c    ****   htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 9684              		.loc 1 1784 22 is_stmt 0 view .LVU3029
+ 9685 0010 0922     		movs	r2, #9
+ 9686 0012 C260     		str	r2, [r0, #12]
+1785:Src/main.c    ****   htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 9687              		.loc 1 1785 3 is_stmt 1 view .LVU3030
+1785:Src/main.c    ****   htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 9688              		.loc 1 1785 29 is_stmt 0 view .LVU3031
+ 9689 0014 0361     		str	r3, [r0, #16]
+1786:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
+ 9690              		.loc 1 1786 3 is_stmt 1 view .LVU3032
+1786:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
+ 9691              		.loc 1 1786 33 is_stmt 0 view .LVU3033
+ 9692 0016 8361     		str	r3, [r0, #24]
+1787:Src/main.c    ****   {
+ 9693              		.loc 1 1787 3 is_stmt 1 view .LVU3034
+1787:Src/main.c    ****   {
+ 9694              		.loc 1 1787 7 is_stmt 0 view .LVU3035
+ 9695 0018 FFF7FEFF 		bl	HAL_TIM_Base_Init
+ 9696              	.LVL898:
+1787:Src/main.c    ****   {
+ 9697              		.loc 1 1787 6 discriminator 1 view .LVU3036
+ 9698 001c 00B9     		cbnz	r0, .L518
+1795:Src/main.c    **** 
+ 9699              		.loc 1 1795 1 view .LVU3037
+ 9700 001e 08BD     		pop	{r3, pc}
+ 9701              	.L518:
+1789:Src/main.c    ****   }
+ 9702              		.loc 1 1789 5 is_stmt 1 view .LVU3038
+ 9703 0020 FFF7FEFF 		bl	Error_Handler
+ 9704              	.LVL899:
+ 9705              	.L520:
+ 9706              		.align	2
+ 9707              	.L519:
+ 9708 0024 00000000 		.word	htim10
+ 9709 0028 00440140 		.word	1073824768
+ 9710              		.cfi_endproc
+ 9711              	.LFE1201:
+ 9713              		.section	.text.MX_UART8_Init,"ax",%progbits
+ 9714              		.align	1
+ 9715              		.syntax unified
+ 9716              		.thumb
+ 9717              		.thumb_func
+ 9719              	MX_UART8_Init:
+ 9720              	.LFB1204:
+1918:Src/main.c    **** 
+ 9721              		.loc 1 1918 1 view -0
+ 9722              		.cfi_startproc
+ 9723              		@ args = 0, pretend = 0, frame = 0
+ 9724              		@ frame_needed = 0, uses_anonymous_args = 0
+ 9725 0000 08B5     		push	{r3, lr}
+ 9726              	.LCFI89:
+ARM GAS  /tmp/ccEQxcUB.s 			page 572
 
 
- 9133 000c 4360     		str	r3, [r0, #4]
-1764:Src/main.c    ****   huart8.Init.StopBits = UART_STOPBITS_1;
- 9134              		.loc 1 1764 3 is_stmt 1 view .LVU2883
-1764:Src/main.c    ****   huart8.Init.StopBits = UART_STOPBITS_1;
- 9135              		.loc 1 1764 26 is_stmt 0 view .LVU2884
- 9136 000e 0023     		movs	r3, #0
- 9137 0010 8360     		str	r3, [r0, #8]
-1765:Src/main.c    ****   huart8.Init.Parity = UART_PARITY_NONE;
- 9138              		.loc 1 1765 3 is_stmt 1 view .LVU2885
-1765:Src/main.c    ****   huart8.Init.Parity = UART_PARITY_NONE;
- 9139              		.loc 1 1765 24 is_stmt 0 view .LVU2886
- 9140 0012 C360     		str	r3, [r0, #12]
-1766:Src/main.c    ****   huart8.Init.Mode = UART_MODE_TX_RX;
- 9141              		.loc 1 1766 3 is_stmt 1 view .LVU2887
-1766:Src/main.c    ****   huart8.Init.Mode = UART_MODE_TX_RX;
- 9142              		.loc 1 1766 22 is_stmt 0 view .LVU2888
- 9143 0014 0361     		str	r3, [r0, #16]
-1767:Src/main.c    ****   huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 9144              		.loc 1 1767 3 is_stmt 1 view .LVU2889
-1767:Src/main.c    ****   huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 9145              		.loc 1 1767 20 is_stmt 0 view .LVU2890
- 9146 0016 0C22     		movs	r2, #12
- 9147 0018 4261     		str	r2, [r0, #20]
-1768:Src/main.c    ****   huart8.Init.OverSampling = UART_OVERSAMPLING_16;
- 9148              		.loc 1 1768 3 is_stmt 1 view .LVU2891
-1768:Src/main.c    ****   huart8.Init.OverSampling = UART_OVERSAMPLING_16;
- 9149              		.loc 1 1768 25 is_stmt 0 view .LVU2892
- 9150 001a 8361     		str	r3, [r0, #24]
-1769:Src/main.c    ****   huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 9151              		.loc 1 1769 3 is_stmt 1 view .LVU2893
-1769:Src/main.c    ****   huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 9152              		.loc 1 1769 28 is_stmt 0 view .LVU2894
- 9153 001c C361     		str	r3, [r0, #28]
-1770:Src/main.c    ****   huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 9154              		.loc 1 1770 3 is_stmt 1 view .LVU2895
-1770:Src/main.c    ****   huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 9155              		.loc 1 1770 30 is_stmt 0 view .LVU2896
- 9156 001e 0362     		str	r3, [r0, #32]
-1771:Src/main.c    ****   if (HAL_UART_Init(&huart8) != HAL_OK)
- 9157              		.loc 1 1771 3 is_stmt 1 view .LVU2897
-1771:Src/main.c    ****   if (HAL_UART_Init(&huart8) != HAL_OK)
- 9158              		.loc 1 1771 38 is_stmt 0 view .LVU2898
- 9159 0020 4362     		str	r3, [r0, #36]
-1772:Src/main.c    ****   {
- 9160              		.loc 1 1772 3 is_stmt 1 view .LVU2899
-1772:Src/main.c    ****   {
- 9161              		.loc 1 1772 7 is_stmt 0 view .LVU2900
- 9162 0022 FFF7FEFF 		bl	HAL_UART_Init
- 9163              	.LVL825:
-1772:Src/main.c    ****   {
- 9164              		.loc 1 1772 6 discriminator 1 view .LVU2901
- 9165 0026 00B9     		cbnz	r0, .L487
-1780:Src/main.c    **** 
- 9166              		.loc 1 1780 1 view .LVU2902
- 9167 0028 08BD     		pop	{r3, pc}
- 9168              	.L487:
-1774:Src/main.c    ****   }
-ARM GAS  /tmp/ccwR4KB7.s 			page 555
+ 9727              		.cfi_def_cfa_offset 8
+ 9728              		.cfi_offset 3, -8
+ 9729              		.cfi_offset 14, -4
+1927:Src/main.c    ****   huart8.Init.BaudRate = 115200;
+ 9730              		.loc 1 1927 3 view .LVU3040
+1927:Src/main.c    ****   huart8.Init.BaudRate = 115200;
+ 9731              		.loc 1 1927 19 is_stmt 0 view .LVU3041
+ 9732 0002 0B48     		ldr	r0, .L525
+ 9733 0004 0B4B     		ldr	r3, .L525+4
+ 9734 0006 0360     		str	r3, [r0]
+1928:Src/main.c    ****   huart8.Init.WordLength = UART_WORDLENGTH_8B;
+ 9735              		.loc 1 1928 3 is_stmt 1 view .LVU3042
+1928:Src/main.c    ****   huart8.Init.WordLength = UART_WORDLENGTH_8B;
+ 9736              		.loc 1 1928 24 is_stmt 0 view .LVU3043
+ 9737 0008 4FF4E133 		mov	r3, #115200
+ 9738 000c 4360     		str	r3, [r0, #4]
+1929:Src/main.c    ****   huart8.Init.StopBits = UART_STOPBITS_1;
+ 9739              		.loc 1 1929 3 is_stmt 1 view .LVU3044
+1929:Src/main.c    ****   huart8.Init.StopBits = UART_STOPBITS_1;
+ 9740              		.loc 1 1929 26 is_stmt 0 view .LVU3045
+ 9741 000e 0023     		movs	r3, #0
+ 9742 0010 8360     		str	r3, [r0, #8]
+1930:Src/main.c    ****   huart8.Init.Parity = UART_PARITY_NONE;
+ 9743              		.loc 1 1930 3 is_stmt 1 view .LVU3046
+1930:Src/main.c    ****   huart8.Init.Parity = UART_PARITY_NONE;
+ 9744              		.loc 1 1930 24 is_stmt 0 view .LVU3047
+ 9745 0012 C360     		str	r3, [r0, #12]
+1931:Src/main.c    ****   huart8.Init.Mode = UART_MODE_TX_RX;
+ 9746              		.loc 1 1931 3 is_stmt 1 view .LVU3048
+1931:Src/main.c    ****   huart8.Init.Mode = UART_MODE_TX_RX;
+ 9747              		.loc 1 1931 22 is_stmt 0 view .LVU3049
+ 9748 0014 0361     		str	r3, [r0, #16]
+1932:Src/main.c    ****   huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 9749              		.loc 1 1932 3 is_stmt 1 view .LVU3050
+1932:Src/main.c    ****   huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 9750              		.loc 1 1932 20 is_stmt 0 view .LVU3051
+ 9751 0016 0C22     		movs	r2, #12
+ 9752 0018 4261     		str	r2, [r0, #20]
+1933:Src/main.c    ****   huart8.Init.OverSampling = UART_OVERSAMPLING_16;
+ 9753              		.loc 1 1933 3 is_stmt 1 view .LVU3052
+1933:Src/main.c    ****   huart8.Init.OverSampling = UART_OVERSAMPLING_16;
+ 9754              		.loc 1 1933 25 is_stmt 0 view .LVU3053
+ 9755 001a 8361     		str	r3, [r0, #24]
+1934:Src/main.c    ****   huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 9756              		.loc 1 1934 3 is_stmt 1 view .LVU3054
+1934:Src/main.c    ****   huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 9757              		.loc 1 1934 28 is_stmt 0 view .LVU3055
+ 9758 001c C361     		str	r3, [r0, #28]
+1935:Src/main.c    ****   huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 9759              		.loc 1 1935 3 is_stmt 1 view .LVU3056
+1935:Src/main.c    ****   huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 9760              		.loc 1 1935 30 is_stmt 0 view .LVU3057
+ 9761 001e 0362     		str	r3, [r0, #32]
+1936:Src/main.c    ****   if (HAL_UART_Init(&huart8) != HAL_OK)
+ 9762              		.loc 1 1936 3 is_stmt 1 view .LVU3058
+1936:Src/main.c    ****   if (HAL_UART_Init(&huart8) != HAL_OK)
+ 9763              		.loc 1 1936 38 is_stmt 0 view .LVU3059
+ARM GAS  /tmp/ccEQxcUB.s 			page 573
 
 
- 9169              		.loc 1 1774 5 is_stmt 1 view .LVU2903
- 9170 002a FFF7FEFF 		bl	Error_Handler
- 9171              	.LVL826:
- 9172              	.L489:
- 9173 002e 00BF     		.align	2
- 9174              	.L488:
- 9175 0030 00000000 		.word	huart8
- 9176 0034 007C0040 		.word	1073773568
- 9177              		.cfi_endproc
- 9178              	.LFE1203:
- 9180              		.section	.text.MX_TIM8_Init,"ax",%progbits
- 9181              		.align	1
- 9182              		.syntax unified
- 9183              		.thumb
- 9184              		.thumb_func
- 9186              	MX_TIM8_Init:
- 9187              	.LFB1200:
-1629:Src/main.c    **** 
- 9188              		.loc 1 1629 1 view -0
- 9189              		.cfi_startproc
- 9190              		@ args = 0, pretend = 0, frame = 32
- 9191              		@ frame_needed = 0, uses_anonymous_args = 0
- 9192 0000 00B5     		push	{lr}
- 9193              	.LCFI88:
- 9194              		.cfi_def_cfa_offset 4
- 9195              		.cfi_offset 14, -4
- 9196 0002 89B0     		sub	sp, sp, #36
- 9197              	.LCFI89:
- 9198              		.cfi_def_cfa_offset 40
-1635:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
- 9199              		.loc 1 1635 3 view .LVU2905
-1635:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
- 9200              		.loc 1 1635 26 is_stmt 0 view .LVU2906
- 9201 0004 0023     		movs	r3, #0
- 9202 0006 0493     		str	r3, [sp, #16]
- 9203 0008 0593     		str	r3, [sp, #20]
- 9204 000a 0693     		str	r3, [sp, #24]
- 9205 000c 0793     		str	r3, [sp, #28]
-1636:Src/main.c    **** 
- 9206              		.loc 1 1636 3 is_stmt 1 view .LVU2907
-1636:Src/main.c    **** 
- 9207              		.loc 1 1636 27 is_stmt 0 view .LVU2908
- 9208 000e 0193     		str	r3, [sp, #4]
- 9209 0010 0293     		str	r3, [sp, #8]
- 9210 0012 0393     		str	r3, [sp, #12]
-1641:Src/main.c    ****   htim8.Init.Prescaler = 0;
- 9211              		.loc 1 1641 3 is_stmt 1 view .LVU2909
-1641:Src/main.c    ****   htim8.Init.Prescaler = 0;
- 9212              		.loc 1 1641 18 is_stmt 0 view .LVU2910
- 9213 0014 1348     		ldr	r0, .L498
- 9214 0016 144A     		ldr	r2, .L498+4
- 9215 0018 0260     		str	r2, [r0]
-1642:Src/main.c    ****   htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9216              		.loc 1 1642 3 is_stmt 1 view .LVU2911
-1642:Src/main.c    ****   htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9217              		.loc 1 1642 24 is_stmt 0 view .LVU2912
- 9218 001a 4360     		str	r3, [r0, #4]
-ARM GAS  /tmp/ccwR4KB7.s 			page 556
+ 9764 0020 4362     		str	r3, [r0, #36]
+1937:Src/main.c    ****   {
+ 9765              		.loc 1 1937 3 is_stmt 1 view .LVU3060
+1937:Src/main.c    ****   {
+ 9766              		.loc 1 1937 7 is_stmt 0 view .LVU3061
+ 9767 0022 FFF7FEFF 		bl	HAL_UART_Init
+ 9768              	.LVL900:
+1937:Src/main.c    ****   {
+ 9769              		.loc 1 1937 6 discriminator 1 view .LVU3062
+ 9770 0026 00B9     		cbnz	r0, .L524
+1945:Src/main.c    **** 
+ 9771              		.loc 1 1945 1 view .LVU3063
+ 9772 0028 08BD     		pop	{r3, pc}
+ 9773              	.L524:
+1939:Src/main.c    ****   }
+ 9774              		.loc 1 1939 5 is_stmt 1 view .LVU3064
+ 9775 002a FFF7FEFF 		bl	Error_Handler
+ 9776              	.LVL901:
+ 9777              	.L526:
+ 9778 002e 00BF     		.align	2
+ 9779              	.L525:
+ 9780 0030 00000000 		.word	huart8
+ 9781 0034 007C0040 		.word	1073773568
+ 9782              		.cfi_endproc
+ 9783              	.LFE1204:
+ 9785              		.section	.text.MX_TIM8_Init,"ax",%progbits
+ 9786              		.align	1
+ 9787              		.syntax unified
+ 9788              		.thumb
+ 9789              		.thumb_func
+ 9791              	MX_TIM8_Init:
+ 9792              	.LFB1200:
+1725:Src/main.c    **** 
+ 9793              		.loc 1 1725 1 view -0
+ 9794              		.cfi_startproc
+ 9795              		@ args = 0, pretend = 0, frame = 32
+ 9796              		@ frame_needed = 0, uses_anonymous_args = 0
+ 9797 0000 00B5     		push	{lr}
+ 9798              	.LCFI90:
+ 9799              		.cfi_def_cfa_offset 4
+ 9800              		.cfi_offset 14, -4
+ 9801 0002 89B0     		sub	sp, sp, #36
+ 9802              	.LCFI91:
+ 9803              		.cfi_def_cfa_offset 40
+1731:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 9804              		.loc 1 1731 3 view .LVU3066
+1731:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 9805              		.loc 1 1731 26 is_stmt 0 view .LVU3067
+ 9806 0004 0023     		movs	r3, #0
+ 9807 0006 0493     		str	r3, [sp, #16]
+ 9808 0008 0593     		str	r3, [sp, #20]
+ 9809 000a 0693     		str	r3, [sp, #24]
+ 9810 000c 0793     		str	r3, [sp, #28]
+1732:Src/main.c    **** 
+ 9811              		.loc 1 1732 3 is_stmt 1 view .LVU3068
+1732:Src/main.c    **** 
+ 9812              		.loc 1 1732 27 is_stmt 0 view .LVU3069
+ARM GAS  /tmp/ccEQxcUB.s 			page 574
 
 
-1643:Src/main.c    ****   htim8.Init.Period = 91;
- 9219              		.loc 1 1643 3 is_stmt 1 view .LVU2913
-1643:Src/main.c    ****   htim8.Init.Period = 91;
- 9220              		.loc 1 1643 26 is_stmt 0 view .LVU2914
- 9221 001c 8360     		str	r3, [r0, #8]
-1644:Src/main.c    ****   htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9222              		.loc 1 1644 3 is_stmt 1 view .LVU2915
-1644:Src/main.c    ****   htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9223              		.loc 1 1644 21 is_stmt 0 view .LVU2916
- 9224 001e 5B22     		movs	r2, #91
- 9225 0020 C260     		str	r2, [r0, #12]
-1645:Src/main.c    ****   htim8.Init.RepetitionCounter = 0;
- 9226              		.loc 1 1645 3 is_stmt 1 view .LVU2917
-1645:Src/main.c    ****   htim8.Init.RepetitionCounter = 0;
- 9227              		.loc 1 1645 28 is_stmt 0 view .LVU2918
- 9228 0022 0361     		str	r3, [r0, #16]
-1646:Src/main.c    ****   htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 9229              		.loc 1 1646 3 is_stmt 1 view .LVU2919
-1646:Src/main.c    ****   htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 9230              		.loc 1 1646 32 is_stmt 0 view .LVU2920
- 9231 0024 4361     		str	r3, [r0, #20]
-1647:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- 9232              		.loc 1 1647 3 is_stmt 1 view .LVU2921
-1647:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- 9233              		.loc 1 1647 32 is_stmt 0 view .LVU2922
- 9234 0026 8361     		str	r3, [r0, #24]
-1648:Src/main.c    ****   {
- 9235              		.loc 1 1648 3 is_stmt 1 view .LVU2923
-1648:Src/main.c    ****   {
- 9236              		.loc 1 1648 7 is_stmt 0 view .LVU2924
- 9237 0028 FFF7FEFF 		bl	HAL_TIM_Base_Init
- 9238              	.LVL827:
-1648:Src/main.c    ****   {
- 9239              		.loc 1 1648 6 discriminator 1 view .LVU2925
- 9240 002c 98B9     		cbnz	r0, .L495
-1652:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- 9241              		.loc 1 1652 3 is_stmt 1 view .LVU2926
-1652:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- 9242              		.loc 1 1652 34 is_stmt 0 view .LVU2927
- 9243 002e 4FF48053 		mov	r3, #4096
- 9244 0032 0493     		str	r3, [sp, #16]
-1653:Src/main.c    ****   {
- 9245              		.loc 1 1653 3 is_stmt 1 view .LVU2928
-1653:Src/main.c    ****   {
- 9246              		.loc 1 1653 7 is_stmt 0 view .LVU2929
- 9247 0034 04A9     		add	r1, sp, #16
- 9248 0036 0B48     		ldr	r0, .L498
- 9249 0038 FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
- 9250              	.LVL828:
-1653:Src/main.c    ****   {
- 9251              		.loc 1 1653 6 discriminator 1 view .LVU2930
- 9252 003c 68B9     		cbnz	r0, .L496
-1657:Src/main.c    ****   sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 9253              		.loc 1 1657 3 is_stmt 1 view .LVU2931
-1657:Src/main.c    ****   sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 9254              		.loc 1 1657 37 is_stmt 0 view .LVU2932
- 9255 003e 0023     		movs	r3, #0
-ARM GAS  /tmp/ccwR4KB7.s 			page 557
+ 9813 000e 0193     		str	r3, [sp, #4]
+ 9814 0010 0293     		str	r3, [sp, #8]
+ 9815 0012 0393     		str	r3, [sp, #12]
+1737:Src/main.c    ****   htim8.Init.Prescaler = 0;
+ 9816              		.loc 1 1737 3 is_stmt 1 view .LVU3070
+1737:Src/main.c    ****   htim8.Init.Prescaler = 0;
+ 9817              		.loc 1 1737 18 is_stmt 0 view .LVU3071
+ 9818 0014 1348     		ldr	r0, .L535
+ 9819 0016 144A     		ldr	r2, .L535+4
+ 9820 0018 0260     		str	r2, [r0]
+1738:Src/main.c    ****   htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 9821              		.loc 1 1738 3 is_stmt 1 view .LVU3072
+1738:Src/main.c    ****   htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 9822              		.loc 1 1738 24 is_stmt 0 view .LVU3073
+ 9823 001a 4360     		str	r3, [r0, #4]
+1739:Src/main.c    ****   htim8.Init.Period = 91;
+ 9824              		.loc 1 1739 3 is_stmt 1 view .LVU3074
+1739:Src/main.c    ****   htim8.Init.Period = 91;
+ 9825              		.loc 1 1739 26 is_stmt 0 view .LVU3075
+ 9826 001c 8360     		str	r3, [r0, #8]
+1740:Src/main.c    ****   htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 9827              		.loc 1 1740 3 is_stmt 1 view .LVU3076
+1740:Src/main.c    ****   htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 9828              		.loc 1 1740 21 is_stmt 0 view .LVU3077
+ 9829 001e 5B22     		movs	r2, #91
+ 9830 0020 C260     		str	r2, [r0, #12]
+1741:Src/main.c    ****   htim8.Init.RepetitionCounter = 0;
+ 9831              		.loc 1 1741 3 is_stmt 1 view .LVU3078
+1741:Src/main.c    ****   htim8.Init.RepetitionCounter = 0;
+ 9832              		.loc 1 1741 28 is_stmt 0 view .LVU3079
+ 9833 0022 0361     		str	r3, [r0, #16]
+1742:Src/main.c    ****   htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 9834              		.loc 1 1742 3 is_stmt 1 view .LVU3080
+1742:Src/main.c    ****   htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 9835              		.loc 1 1742 32 is_stmt 0 view .LVU3081
+ 9836 0024 4361     		str	r3, [r0, #20]
+1743:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
+ 9837              		.loc 1 1743 3 is_stmt 1 view .LVU3082
+1743:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
+ 9838              		.loc 1 1743 32 is_stmt 0 view .LVU3083
+ 9839 0026 8361     		str	r3, [r0, #24]
+1744:Src/main.c    ****   {
+ 9840              		.loc 1 1744 3 is_stmt 1 view .LVU3084
+1744:Src/main.c    ****   {
+ 9841              		.loc 1 1744 7 is_stmt 0 view .LVU3085
+ 9842 0028 FFF7FEFF 		bl	HAL_TIM_Base_Init
+ 9843              	.LVL902:
+1744:Src/main.c    ****   {
+ 9844              		.loc 1 1744 6 discriminator 1 view .LVU3086
+ 9845 002c 98B9     		cbnz	r0, .L532
+1748:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
+ 9846              		.loc 1 1748 3 is_stmt 1 view .LVU3087
+1748:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
+ 9847              		.loc 1 1748 34 is_stmt 0 view .LVU3088
+ 9848 002e 4FF48053 		mov	r3, #4096
+ 9849 0032 0493     		str	r3, [sp, #16]
+1749:Src/main.c    ****   {
+ARM GAS  /tmp/ccEQxcUB.s 			page 575
 
 
- 9256 0040 0193     		str	r3, [sp, #4]
-1658:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 9257              		.loc 1 1658 3 is_stmt 1 view .LVU2933
-1658:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 9258              		.loc 1 1658 38 is_stmt 0 view .LVU2934
- 9259 0042 0293     		str	r3, [sp, #8]
-1659:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- 9260              		.loc 1 1659 3 is_stmt 1 view .LVU2935
-1659:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- 9261              		.loc 1 1659 33 is_stmt 0 view .LVU2936
- 9262 0044 0393     		str	r3, [sp, #12]
-1660:Src/main.c    ****   {
- 9263              		.loc 1 1660 3 is_stmt 1 view .LVU2937
-1660:Src/main.c    ****   {
- 9264              		.loc 1 1660 7 is_stmt 0 view .LVU2938
- 9265 0046 01A9     		add	r1, sp, #4
- 9266 0048 0648     		ldr	r0, .L498
- 9267 004a FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
- 9268              	.LVL829:
-1660:Src/main.c    ****   {
- 9269              		.loc 1 1660 6 discriminator 1 view .LVU2939
- 9270 004e 30B9     		cbnz	r0, .L497
-1668:Src/main.c    **** 
- 9271              		.loc 1 1668 1 view .LVU2940
- 9272 0050 09B0     		add	sp, sp, #36
- 9273              	.LCFI90:
- 9274              		.cfi_remember_state
- 9275              		.cfi_def_cfa_offset 4
- 9276              		@ sp needed
- 9277 0052 5DF804FB 		ldr	pc, [sp], #4
- 9278              	.L495:
- 9279              	.LCFI91:
- 9280              		.cfi_restore_state
-1650:Src/main.c    ****   }
- 9281              		.loc 1 1650 5 is_stmt 1 view .LVU2941
- 9282 0056 FFF7FEFF 		bl	Error_Handler
- 9283              	.LVL830:
- 9284              	.L496:
-1655:Src/main.c    ****   }
- 9285              		.loc 1 1655 5 view .LVU2942
- 9286 005a FFF7FEFF 		bl	Error_Handler
- 9287              	.LVL831:
- 9288              	.L497:
-1662:Src/main.c    ****   }
- 9289              		.loc 1 1662 5 view .LVU2943
- 9290 005e FFF7FEFF 		bl	Error_Handler
- 9291              	.LVL832:
- 9292              	.L499:
- 9293 0062 00BF     		.align	2
- 9294              	.L498:
- 9295 0064 00000000 		.word	htim8
- 9296 0068 00040140 		.word	1073808384
- 9297              		.cfi_endproc
- 9298              	.LFE1200:
- 9300              		.section	.text.MX_TIM11_Init,"ax",%progbits
- 9301              		.align	1
- 9302              		.syntax unified
-ARM GAS  /tmp/ccwR4KB7.s 			page 558
+ 9850              		.loc 1 1749 3 is_stmt 1 view .LVU3089
+1749:Src/main.c    ****   {
+ 9851              		.loc 1 1749 7 is_stmt 0 view .LVU3090
+ 9852 0034 04A9     		add	r1, sp, #16
+ 9853 0036 0B48     		ldr	r0, .L535
+ 9854 0038 FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
+ 9855              	.LVL903:
+1749:Src/main.c    ****   {
+ 9856              		.loc 1 1749 6 discriminator 1 view .LVU3091
+ 9857 003c 68B9     		cbnz	r0, .L533
+1753:Src/main.c    ****   sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+ 9858              		.loc 1 1753 3 is_stmt 1 view .LVU3092
+1753:Src/main.c    ****   sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+ 9859              		.loc 1 1753 37 is_stmt 0 view .LVU3093
+ 9860 003e 0023     		movs	r3, #0
+ 9861 0040 0193     		str	r3, [sp, #4]
+1754:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 9862              		.loc 1 1754 3 is_stmt 1 view .LVU3094
+1754:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 9863              		.loc 1 1754 38 is_stmt 0 view .LVU3095
+ 9864 0042 0293     		str	r3, [sp, #8]
+1755:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
+ 9865              		.loc 1 1755 3 is_stmt 1 view .LVU3096
+1755:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
+ 9866              		.loc 1 1755 33 is_stmt 0 view .LVU3097
+ 9867 0044 0393     		str	r3, [sp, #12]
+1756:Src/main.c    ****   {
+ 9868              		.loc 1 1756 3 is_stmt 1 view .LVU3098
+1756:Src/main.c    ****   {
+ 9869              		.loc 1 1756 7 is_stmt 0 view .LVU3099
+ 9870 0046 01A9     		add	r1, sp, #4
+ 9871 0048 0648     		ldr	r0, .L535
+ 9872 004a FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
+ 9873              	.LVL904:
+1756:Src/main.c    ****   {
+ 9874              		.loc 1 1756 6 discriminator 1 view .LVU3100
+ 9875 004e 30B9     		cbnz	r0, .L534
+1764:Src/main.c    **** 
+ 9876              		.loc 1 1764 1 view .LVU3101
+ 9877 0050 09B0     		add	sp, sp, #36
+ 9878              	.LCFI92:
+ 9879              		.cfi_remember_state
+ 9880              		.cfi_def_cfa_offset 4
+ 9881              		@ sp needed
+ 9882 0052 5DF804FB 		ldr	pc, [sp], #4
+ 9883              	.L532:
+ 9884              	.LCFI93:
+ 9885              		.cfi_restore_state
+1746:Src/main.c    ****   }
+ 9886              		.loc 1 1746 5 is_stmt 1 view .LVU3102
+ 9887 0056 FFF7FEFF 		bl	Error_Handler
+ 9888              	.LVL905:
+ 9889              	.L533:
+1751:Src/main.c    ****   }
+ 9890              		.loc 1 1751 5 view .LVU3103
+ 9891 005a FFF7FEFF 		bl	Error_Handler
+ 9892              	.LVL906:
+ARM GAS  /tmp/ccEQxcUB.s 			page 576
 
 
- 9303              		.thumb
- 9304              		.thumb_func
- 9306              	MX_TIM11_Init:
- 9307              	.LFB1202:
-1707:Src/main.c    **** 
- 9308              		.loc 1 1707 1 view -0
- 9309              		.cfi_startproc
- 9310              		@ args = 0, pretend = 0, frame = 32
- 9311              		@ frame_needed = 0, uses_anonymous_args = 0
- 9312 0000 00B5     		push	{lr}
- 9313              	.LCFI92:
- 9314              		.cfi_def_cfa_offset 4
- 9315              		.cfi_offset 14, -4
- 9316 0002 89B0     		sub	sp, sp, #36
- 9317              	.LCFI93:
- 9318              		.cfi_def_cfa_offset 40
-1713:Src/main.c    **** 
- 9319              		.loc 1 1713 3 view .LVU2945
-1713:Src/main.c    **** 
- 9320              		.loc 1 1713 22 is_stmt 0 view .LVU2946
- 9321 0004 0023     		movs	r3, #0
- 9322 0006 0193     		str	r3, [sp, #4]
- 9323 0008 0293     		str	r3, [sp, #8]
- 9324 000a 0393     		str	r3, [sp, #12]
- 9325 000c 0493     		str	r3, [sp, #16]
- 9326 000e 0593     		str	r3, [sp, #20]
- 9327 0010 0693     		str	r3, [sp, #24]
- 9328 0012 0793     		str	r3, [sp, #28]
-1718:Src/main.c    ****   htim11.Init.Prescaler = 1;
- 9329              		.loc 1 1718 3 is_stmt 1 view .LVU2947
-1718:Src/main.c    ****   htim11.Init.Prescaler = 1;
- 9330              		.loc 1 1718 19 is_stmt 0 view .LVU2948
- 9331 0014 1448     		ldr	r0, .L508
- 9332 0016 154A     		ldr	r2, .L508+4
- 9333 0018 0260     		str	r2, [r0]
-1719:Src/main.c    ****   htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9334              		.loc 1 1719 3 is_stmt 1 view .LVU2949
-1719:Src/main.c    ****   htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9335              		.loc 1 1719 25 is_stmt 0 view .LVU2950
- 9336 001a 0122     		movs	r2, #1
- 9337 001c 4260     		str	r2, [r0, #4]
-1720:Src/main.c    ****   htim11.Init.Period = 91;
- 9338              		.loc 1 1720 3 is_stmt 1 view .LVU2951
-1720:Src/main.c    ****   htim11.Init.Period = 91;
- 9339              		.loc 1 1720 27 is_stmt 0 view .LVU2952
- 9340 001e 8360     		str	r3, [r0, #8]
-1721:Src/main.c    ****   htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9341              		.loc 1 1721 3 is_stmt 1 view .LVU2953
-1721:Src/main.c    ****   htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9342              		.loc 1 1721 22 is_stmt 0 view .LVU2954
- 9343 0020 5B22     		movs	r2, #91
- 9344 0022 C260     		str	r2, [r0, #12]
-1722:Src/main.c    ****   htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 9345              		.loc 1 1722 3 is_stmt 1 view .LVU2955
-1722:Src/main.c    ****   htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 9346              		.loc 1 1722 29 is_stmt 0 view .LVU2956
- 9347 0024 0361     		str	r3, [r0, #16]
-ARM GAS  /tmp/ccwR4KB7.s 			page 559
+ 9893              	.L534:
+1758:Src/main.c    ****   }
+ 9894              		.loc 1 1758 5 view .LVU3104
+ 9895 005e FFF7FEFF 		bl	Error_Handler
+ 9896              	.LVL907:
+ 9897              	.L536:
+ 9898 0062 00BF     		.align	2
+ 9899              	.L535:
+ 9900 0064 00000000 		.word	htim8
+ 9901 0068 00040140 		.word	1073808384
+ 9902              		.cfi_endproc
+ 9903              	.LFE1200:
+ 9905              		.section	.text.MX_TIM11_Init,"ax",%progbits
+ 9906              		.align	1
+ 9907              		.syntax unified
+ 9908              		.thumb
+ 9909              		.thumb_func
+ 9911              	MX_TIM11_Init:
+ 9912              	.LFB1202:
+1803:Src/main.c    **** 
+ 9913              		.loc 1 1803 1 view -0
+ 9914              		.cfi_startproc
+ 9915              		@ args = 0, pretend = 0, frame = 32
+ 9916              		@ frame_needed = 0, uses_anonymous_args = 0
+ 9917 0000 00B5     		push	{lr}
+ 9918              	.LCFI94:
+ 9919              		.cfi_def_cfa_offset 4
+ 9920              		.cfi_offset 14, -4
+ 9921 0002 89B0     		sub	sp, sp, #36
+ 9922              	.LCFI95:
+ 9923              		.cfi_def_cfa_offset 40
+1809:Src/main.c    **** 
+ 9924              		.loc 1 1809 3 view .LVU3106
+1809:Src/main.c    **** 
+ 9925              		.loc 1 1809 22 is_stmt 0 view .LVU3107
+ 9926 0004 0023     		movs	r3, #0
+ 9927 0006 0193     		str	r3, [sp, #4]
+ 9928 0008 0293     		str	r3, [sp, #8]
+ 9929 000a 0393     		str	r3, [sp, #12]
+ 9930 000c 0493     		str	r3, [sp, #16]
+ 9931 000e 0593     		str	r3, [sp, #20]
+ 9932 0010 0693     		str	r3, [sp, #24]
+ 9933 0012 0793     		str	r3, [sp, #28]
+1814:Src/main.c    ****   htim11.Init.Prescaler = 1;
+ 9934              		.loc 1 1814 3 is_stmt 1 view .LVU3108
+1814:Src/main.c    ****   htim11.Init.Prescaler = 1;
+ 9935              		.loc 1 1814 19 is_stmt 0 view .LVU3109
+ 9936 0014 1448     		ldr	r0, .L545
+ 9937 0016 154A     		ldr	r2, .L545+4
+ 9938 0018 0260     		str	r2, [r0]
+1815:Src/main.c    ****   htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 9939              		.loc 1 1815 3 is_stmt 1 view .LVU3110
+1815:Src/main.c    ****   htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 9940              		.loc 1 1815 25 is_stmt 0 view .LVU3111
+ 9941 001a 0122     		movs	r2, #1
+ 9942 001c 4260     		str	r2, [r0, #4]
+1816:Src/main.c    ****   htim11.Init.Period = 91;
+ARM GAS  /tmp/ccEQxcUB.s 			page 577
 
 
-1723:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
- 9348              		.loc 1 1723 3 is_stmt 1 view .LVU2957
-1723:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
- 9349              		.loc 1 1723 33 is_stmt 0 view .LVU2958
- 9350 0026 8023     		movs	r3, #128
- 9351 0028 8361     		str	r3, [r0, #24]
-1724:Src/main.c    ****   {
- 9352              		.loc 1 1724 3 is_stmt 1 view .LVU2959
-1724:Src/main.c    ****   {
- 9353              		.loc 1 1724 7 is_stmt 0 view .LVU2960
- 9354 002a FFF7FEFF 		bl	HAL_TIM_Base_Init
- 9355              	.LVL833:
-1724:Src/main.c    ****   {
- 9356              		.loc 1 1724 6 discriminator 1 view .LVU2961
- 9357 002e A8B9     		cbnz	r0, .L505
-1728:Src/main.c    ****   {
- 9358              		.loc 1 1728 3 is_stmt 1 view .LVU2962
-1728:Src/main.c    ****   {
- 9359              		.loc 1 1728 7 is_stmt 0 view .LVU2963
- 9360 0030 0D48     		ldr	r0, .L508
- 9361 0032 FFF7FEFF 		bl	HAL_TIM_PWM_Init
- 9362              	.LVL834:
-1728:Src/main.c    ****   {
- 9363              		.loc 1 1728 6 discriminator 1 view .LVU2964
- 9364 0036 98B9     		cbnz	r0, .L506
-1732:Src/main.c    ****   sConfigOC.Pulse = 91;
- 9365              		.loc 1 1732 3 is_stmt 1 view .LVU2965
-1732:Src/main.c    ****   sConfigOC.Pulse = 91;
- 9366              		.loc 1 1732 20 is_stmt 0 view .LVU2966
- 9367 0038 6023     		movs	r3, #96
- 9368 003a 0193     		str	r3, [sp, #4]
-1733:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 9369              		.loc 1 1733 3 is_stmt 1 view .LVU2967
-1733:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 9370              		.loc 1 1733 19 is_stmt 0 view .LVU2968
- 9371 003c 5B23     		movs	r3, #91
- 9372 003e 0293     		str	r3, [sp, #8]
-1734:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 9373              		.loc 1 1734 3 is_stmt 1 view .LVU2969
-1734:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 9374              		.loc 1 1734 24 is_stmt 0 view .LVU2970
- 9375 0040 0022     		movs	r2, #0
- 9376 0042 0392     		str	r2, [sp, #12]
-1735:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 9377              		.loc 1 1735 3 is_stmt 1 view .LVU2971
-1735:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 9378              		.loc 1 1735 24 is_stmt 0 view .LVU2972
- 9379 0044 0592     		str	r2, [sp, #20]
-1736:Src/main.c    ****   {
- 9380              		.loc 1 1736 3 is_stmt 1 view .LVU2973
-1736:Src/main.c    ****   {
- 9381              		.loc 1 1736 7 is_stmt 0 view .LVU2974
- 9382 0046 01A9     		add	r1, sp, #4
- 9383 0048 0748     		ldr	r0, .L508
- 9384 004a FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
- 9385              	.LVL835:
-1736:Src/main.c    ****   {
-ARM GAS  /tmp/ccwR4KB7.s 			page 560
+ 9943              		.loc 1 1816 3 is_stmt 1 view .LVU3112
+1816:Src/main.c    ****   htim11.Init.Period = 91;
+ 9944              		.loc 1 1816 27 is_stmt 0 view .LVU3113
+ 9945 001e 8360     		str	r3, [r0, #8]
+1817:Src/main.c    ****   htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 9946              		.loc 1 1817 3 is_stmt 1 view .LVU3114
+1817:Src/main.c    ****   htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 9947              		.loc 1 1817 22 is_stmt 0 view .LVU3115
+ 9948 0020 5B22     		movs	r2, #91
+ 9949 0022 C260     		str	r2, [r0, #12]
+1818:Src/main.c    ****   htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
+ 9950              		.loc 1 1818 3 is_stmt 1 view .LVU3116
+1818:Src/main.c    ****   htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
+ 9951              		.loc 1 1818 29 is_stmt 0 view .LVU3117
+ 9952 0024 0361     		str	r3, [r0, #16]
+1819:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
+ 9953              		.loc 1 1819 3 is_stmt 1 view .LVU3118
+1819:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
+ 9954              		.loc 1 1819 33 is_stmt 0 view .LVU3119
+ 9955 0026 8023     		movs	r3, #128
+ 9956 0028 8361     		str	r3, [r0, #24]
+1820:Src/main.c    ****   {
+ 9957              		.loc 1 1820 3 is_stmt 1 view .LVU3120
+1820:Src/main.c    ****   {
+ 9958              		.loc 1 1820 7 is_stmt 0 view .LVU3121
+ 9959 002a FFF7FEFF 		bl	HAL_TIM_Base_Init
+ 9960              	.LVL908:
+1820:Src/main.c    ****   {
+ 9961              		.loc 1 1820 6 discriminator 1 view .LVU3122
+ 9962 002e A8B9     		cbnz	r0, .L542
+1824:Src/main.c    ****   {
+ 9963              		.loc 1 1824 3 is_stmt 1 view .LVU3123
+1824:Src/main.c    ****   {
+ 9964              		.loc 1 1824 7 is_stmt 0 view .LVU3124
+ 9965 0030 0D48     		ldr	r0, .L545
+ 9966 0032 FFF7FEFF 		bl	HAL_TIM_PWM_Init
+ 9967              	.LVL909:
+1824:Src/main.c    ****   {
+ 9968              		.loc 1 1824 6 discriminator 1 view .LVU3125
+ 9969 0036 98B9     		cbnz	r0, .L543
+1828:Src/main.c    ****   sConfigOC.Pulse = 91;
+ 9970              		.loc 1 1828 3 is_stmt 1 view .LVU3126
+1828:Src/main.c    ****   sConfigOC.Pulse = 91;
+ 9971              		.loc 1 1828 20 is_stmt 0 view .LVU3127
+ 9972 0038 6023     		movs	r3, #96
+ 9973 003a 0193     		str	r3, [sp, #4]
+1829:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 9974              		.loc 1 1829 3 is_stmt 1 view .LVU3128
+1829:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 9975              		.loc 1 1829 19 is_stmt 0 view .LVU3129
+ 9976 003c 5B23     		movs	r3, #91
+ 9977 003e 0293     		str	r3, [sp, #8]
+1830:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 9978              		.loc 1 1830 3 is_stmt 1 view .LVU3130
+1830:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 9979              		.loc 1 1830 24 is_stmt 0 view .LVU3131
+ 9980 0040 0022     		movs	r2, #0
+ARM GAS  /tmp/ccEQxcUB.s 			page 578
 
 
- 9386              		.loc 1 1736 6 discriminator 1 view .LVU2975
- 9387 004e 48B9     		cbnz	r0, .L507
-1743:Src/main.c    **** 
- 9388              		.loc 1 1743 3 is_stmt 1 view .LVU2976
- 9389 0050 0548     		ldr	r0, .L508
- 9390 0052 FFF7FEFF 		bl	HAL_TIM_MspPostInit
- 9391              	.LVL836:
-1745:Src/main.c    **** 
- 9392              		.loc 1 1745 1 is_stmt 0 view .LVU2977
- 9393 0056 09B0     		add	sp, sp, #36
- 9394              	.LCFI94:
- 9395              		.cfi_remember_state
- 9396              		.cfi_def_cfa_offset 4
- 9397              		@ sp needed
- 9398 0058 5DF804FB 		ldr	pc, [sp], #4
- 9399              	.L505:
- 9400              	.LCFI95:
- 9401              		.cfi_restore_state
-1726:Src/main.c    ****   }
- 9402              		.loc 1 1726 5 is_stmt 1 view .LVU2978
- 9403 005c FFF7FEFF 		bl	Error_Handler
- 9404              	.LVL837:
- 9405              	.L506:
-1730:Src/main.c    ****   }
- 9406              		.loc 1 1730 5 view .LVU2979
- 9407 0060 FFF7FEFF 		bl	Error_Handler
- 9408              	.LVL838:
- 9409              	.L507:
-1738:Src/main.c    ****   }
- 9410              		.loc 1 1738 5 view .LVU2980
- 9411 0064 FFF7FEFF 		bl	Error_Handler
- 9412              	.LVL839:
- 9413              	.L509:
- 9414              		.align	2
- 9415              	.L508:
- 9416 0068 00000000 		.word	htim11
- 9417 006c 00480140 		.word	1073825792
- 9418              		.cfi_endproc
- 9419              	.LFE1202:
- 9421              		.section	.text.MX_TIM4_Init,"ax",%progbits
- 9422              		.align	1
- 9423              		.syntax unified
- 9424              		.thumb
- 9425              		.thumb_func
- 9427              	MX_TIM4_Init:
- 9428              	.LFB1196:
-1457:Src/main.c    **** 
- 9429              		.loc 1 1457 1 view -0
- 9430              		.cfi_startproc
- 9431              		@ args = 0, pretend = 0, frame = 56
- 9432              		@ frame_needed = 0, uses_anonymous_args = 0
- 9433 0000 00B5     		push	{lr}
- 9434              	.LCFI96:
- 9435              		.cfi_def_cfa_offset 4
- 9436              		.cfi_offset 14, -4
- 9437 0002 8FB0     		sub	sp, sp, #60
- 9438              	.LCFI97:
-ARM GAS  /tmp/ccwR4KB7.s 			page 561
-
-
- 9439              		.cfi_def_cfa_offset 64
-1463:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
- 9440              		.loc 1 1463 3 view .LVU2982
-1463:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
- 9441              		.loc 1 1463 26 is_stmt 0 view .LVU2983
- 9442 0004 0023     		movs	r3, #0
- 9443 0006 0A93     		str	r3, [sp, #40]
- 9444 0008 0B93     		str	r3, [sp, #44]
- 9445 000a 0C93     		str	r3, [sp, #48]
- 9446 000c 0D93     		str	r3, [sp, #52]
-1464:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
- 9447              		.loc 1 1464 3 is_stmt 1 view .LVU2984
-1464:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
- 9448              		.loc 1 1464 27 is_stmt 0 view .LVU2985
- 9449 000e 0793     		str	r3, [sp, #28]
- 9450 0010 0893     		str	r3, [sp, #32]
- 9451 0012 0993     		str	r3, [sp, #36]
-1465:Src/main.c    **** 
- 9452              		.loc 1 1465 3 is_stmt 1 view .LVU2986
-1465:Src/main.c    **** 
- 9453              		.loc 1 1465 22 is_stmt 0 view .LVU2987
- 9454 0014 0093     		str	r3, [sp]
- 9455 0016 0193     		str	r3, [sp, #4]
- 9456 0018 0293     		str	r3, [sp, #8]
- 9457 001a 0393     		str	r3, [sp, #12]
- 9458 001c 0493     		str	r3, [sp, #16]
- 9459 001e 0593     		str	r3, [sp, #20]
- 9460 0020 0693     		str	r3, [sp, #24]
-1470:Src/main.c    ****   htim4.Init.Prescaler = 0;
- 9461              		.loc 1 1470 3 is_stmt 1 view .LVU2988
-1470:Src/main.c    ****   htim4.Init.Prescaler = 0;
- 9462              		.loc 1 1470 18 is_stmt 0 view .LVU2989
- 9463 0022 1E48     		ldr	r0, .L522
- 9464 0024 1E4A     		ldr	r2, .L522+4
- 9465 0026 0260     		str	r2, [r0]
-1471:Src/main.c    ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9466              		.loc 1 1471 3 is_stmt 1 view .LVU2990
-1471:Src/main.c    ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 9467              		.loc 1 1471 24 is_stmt 0 view .LVU2991
- 9468 0028 4360     		str	r3, [r0, #4]
-1472:Src/main.c    ****   htim4.Init.Period = 45;
- 9469              		.loc 1 1472 3 is_stmt 1 view .LVU2992
-1472:Src/main.c    ****   htim4.Init.Period = 45;
- 9470              		.loc 1 1472 26 is_stmt 0 view .LVU2993
- 9471 002a 8360     		str	r3, [r0, #8]
-1473:Src/main.c    ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9472              		.loc 1 1473 3 is_stmt 1 view .LVU2994
-1473:Src/main.c    ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 9473              		.loc 1 1473 21 is_stmt 0 view .LVU2995
- 9474 002c 2D22     		movs	r2, #45
- 9475 002e C260     		str	r2, [r0, #12]
-1474:Src/main.c    ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 9476              		.loc 1 1474 3 is_stmt 1 view .LVU2996
-1474:Src/main.c    ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 9477              		.loc 1 1474 28 is_stmt 0 view .LVU2997
- 9478 0030 0361     		str	r3, [r0, #16]
-1475:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
-ARM GAS  /tmp/ccwR4KB7.s 			page 562
-
-
- 9479              		.loc 1 1475 3 is_stmt 1 view .LVU2998
-1475:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
- 9480              		.loc 1 1475 32 is_stmt 0 view .LVU2999
- 9481 0032 8361     		str	r3, [r0, #24]
-1476:Src/main.c    ****   {
- 9482              		.loc 1 1476 3 is_stmt 1 view .LVU3000
-1476:Src/main.c    ****   {
- 9483              		.loc 1 1476 7 is_stmt 0 view .LVU3001
- 9484 0034 FFF7FEFF 		bl	HAL_TIM_Base_Init
- 9485              	.LVL840:
-1476:Src/main.c    ****   {
- 9486              		.loc 1 1476 6 discriminator 1 view .LVU3002
- 9487 0038 30BB     		cbnz	r0, .L517
-1480:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
- 9488              		.loc 1 1480 3 is_stmt 1 view .LVU3003
-1480:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
- 9489              		.loc 1 1480 34 is_stmt 0 view .LVU3004
- 9490 003a 4FF48053 		mov	r3, #4096
- 9491 003e 0A93     		str	r3, [sp, #40]
-1481:Src/main.c    ****   {
- 9492              		.loc 1 1481 3 is_stmt 1 view .LVU3005
-1481:Src/main.c    ****   {
- 9493              		.loc 1 1481 7 is_stmt 0 view .LVU3006
- 9494 0040 0AA9     		add	r1, sp, #40
- 9495 0042 1648     		ldr	r0, .L522
- 9496 0044 FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
- 9497              	.LVL841:
-1481:Src/main.c    ****   {
- 9498              		.loc 1 1481 6 discriminator 1 view .LVU3007
- 9499 0048 00BB     		cbnz	r0, .L518
-1485:Src/main.c    ****   {
- 9500              		.loc 1 1485 3 is_stmt 1 view .LVU3008
-1485:Src/main.c    ****   {
- 9501              		.loc 1 1485 7 is_stmt 0 view .LVU3009
- 9502 004a 1448     		ldr	r0, .L522
- 9503 004c FFF7FEFF 		bl	HAL_TIM_PWM_Init
- 9504              	.LVL842:
-1485:Src/main.c    ****   {
- 9505              		.loc 1 1485 6 discriminator 1 view .LVU3010
- 9506 0050 F0B9     		cbnz	r0, .L519
-1489:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 9507              		.loc 1 1489 3 is_stmt 1 view .LVU3011
-1489:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 9508              		.loc 1 1489 37 is_stmt 0 view .LVU3012
- 9509 0052 0023     		movs	r3, #0
- 9510 0054 0793     		str	r3, [sp, #28]
-1490:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- 9511              		.loc 1 1490 3 is_stmt 1 view .LVU3013
-1490:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- 9512              		.loc 1 1490 33 is_stmt 0 view .LVU3014
- 9513 0056 0993     		str	r3, [sp, #36]
-1491:Src/main.c    ****   {
- 9514              		.loc 1 1491 3 is_stmt 1 view .LVU3015
-1491:Src/main.c    ****   {
- 9515              		.loc 1 1491 7 is_stmt 0 view .LVU3016
- 9516 0058 07A9     		add	r1, sp, #28
- 9517 005a 1048     		ldr	r0, .L522
-ARM GAS  /tmp/ccwR4KB7.s 			page 563
-
-
- 9518 005c FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
- 9519              	.LVL843:
-1491:Src/main.c    ****   {
- 9520              		.loc 1 1491 6 discriminator 1 view .LVU3017
- 9521 0060 C0B9     		cbnz	r0, .L520
-1495:Src/main.c    ****   sConfigOC.Pulse = 22;
- 9522              		.loc 1 1495 3 is_stmt 1 view .LVU3018
-1495:Src/main.c    ****   sConfigOC.Pulse = 22;
- 9523              		.loc 1 1495 20 is_stmt 0 view .LVU3019
- 9524 0062 6023     		movs	r3, #96
- 9525 0064 0093     		str	r3, [sp]
-1496:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 9526              		.loc 1 1496 3 is_stmt 1 view .LVU3020
-1496:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 9527              		.loc 1 1496 19 is_stmt 0 view .LVU3021
- 9528 0066 1623     		movs	r3, #22
- 9529 0068 0193     		str	r3, [sp, #4]
-1497:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 9530              		.loc 1 1497 3 is_stmt 1 view .LVU3022
-1497:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 9531              		.loc 1 1497 24 is_stmt 0 view .LVU3023
- 9532 006a 0023     		movs	r3, #0
- 9533 006c 0293     		str	r3, [sp, #8]
-1498:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- 9534              		.loc 1 1498 3 is_stmt 1 view .LVU3024
-1498:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- 9535              		.loc 1 1498 24 is_stmt 0 view .LVU3025
- 9536 006e 0493     		str	r3, [sp, #16]
-1499:Src/main.c    ****   {
- 9537              		.loc 1 1499 3 is_stmt 1 view .LVU3026
-1499:Src/main.c    ****   {
- 9538              		.loc 1 1499 7 is_stmt 0 view .LVU3027
- 9539 0070 0822     		movs	r2, #8
- 9540 0072 6946     		mov	r1, sp
- 9541 0074 0948     		ldr	r0, .L522
- 9542 0076 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
- 9543              	.LVL844:
-1499:Src/main.c    ****   {
- 9544              		.loc 1 1499 6 discriminator 1 view .LVU3028
- 9545 007a 68B9     		cbnz	r0, .L521
-1506:Src/main.c    **** 
- 9546              		.loc 1 1506 3 is_stmt 1 view .LVU3029
- 9547 007c 0748     		ldr	r0, .L522
- 9548 007e FFF7FEFF 		bl	HAL_TIM_MspPostInit
- 9549              	.LVL845:
-1508:Src/main.c    **** 
- 9550              		.loc 1 1508 1 is_stmt 0 view .LVU3030
- 9551 0082 0FB0     		add	sp, sp, #60
- 9552              	.LCFI98:
- 9553              		.cfi_remember_state
- 9554              		.cfi_def_cfa_offset 4
- 9555              		@ sp needed
- 9556 0084 5DF804FB 		ldr	pc, [sp], #4
- 9557              	.L517:
- 9558              	.LCFI99:
- 9559              		.cfi_restore_state
-1478:Src/main.c    ****   }
-ARM GAS  /tmp/ccwR4KB7.s 			page 564
-
-
- 9560              		.loc 1 1478 5 is_stmt 1 view .LVU3031
- 9561 0088 FFF7FEFF 		bl	Error_Handler
- 9562              	.LVL846:
- 9563              	.L518:
-1483:Src/main.c    ****   }
- 9564              		.loc 1 1483 5 view .LVU3032
- 9565 008c FFF7FEFF 		bl	Error_Handler
- 9566              	.LVL847:
- 9567              	.L519:
-1487:Src/main.c    ****   }
- 9568              		.loc 1 1487 5 view .LVU3033
- 9569 0090 FFF7FEFF 		bl	Error_Handler
- 9570              	.LVL848:
- 9571              	.L520:
-1493:Src/main.c    ****   }
- 9572              		.loc 1 1493 5 view .LVU3034
- 9573 0094 FFF7FEFF 		bl	Error_Handler
- 9574              	.LVL849:
- 9575              	.L521:
-1501:Src/main.c    ****   }
- 9576              		.loc 1 1501 5 view .LVU3035
- 9577 0098 FFF7FEFF 		bl	Error_Handler
- 9578              	.LVL850:
- 9579              	.L523:
- 9580              		.align	2
- 9581              	.L522:
- 9582 009c 00000000 		.word	htim4
- 9583 00a0 00080040 		.word	1073743872
- 9584              		.cfi_endproc
- 9585              	.LFE1196:
- 9587              		.section	.text.SystemClock_Config,"ax",%progbits
- 9588              		.align	1
- 9589              		.global	SystemClock_Config
- 9590              		.syntax unified
- 9591              		.thumb
- 9592              		.thumb_func
- 9594              	SystemClock_Config:
- 9595              	.LFB1187:
- 935:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 9596              		.loc 1 935 1 view -0
- 9597              		.cfi_startproc
- 9598              		@ args = 0, pretend = 0, frame = 80
- 9599              		@ frame_needed = 0, uses_anonymous_args = 0
- 9600 0000 00B5     		push	{lr}
- 9601              	.LCFI100:
- 9602              		.cfi_def_cfa_offset 4
- 9603              		.cfi_offset 14, -4
- 9604 0002 95B0     		sub	sp, sp, #84
- 9605              	.LCFI101:
- 9606              		.cfi_def_cfa_offset 88
- 936:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 9607              		.loc 1 936 3 view .LVU3037
- 936:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 9608              		.loc 1 936 22 is_stmt 0 view .LVU3038
- 9609 0004 3422     		movs	r2, #52
- 9610 0006 0021     		movs	r1, #0
- 9611 0008 07A8     		add	r0, sp, #28
-ARM GAS  /tmp/ccwR4KB7.s 			page 565
-
-
- 9612 000a FFF7FEFF 		bl	memset
- 9613              	.LVL851:
- 937:Src/main.c    **** 
- 9614              		.loc 1 937 3 is_stmt 1 view .LVU3039
- 937:Src/main.c    **** 
- 9615              		.loc 1 937 22 is_stmt 0 view .LVU3040
- 9616 000e 0023     		movs	r3, #0
- 9617 0010 0293     		str	r3, [sp, #8]
- 9618 0012 0393     		str	r3, [sp, #12]
- 9619 0014 0493     		str	r3, [sp, #16]
- 9620 0016 0593     		str	r3, [sp, #20]
- 9621 0018 0693     		str	r3, [sp, #24]
- 941:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 9622              		.loc 1 941 3 is_stmt 1 view .LVU3041
- 9623              	.LBB634:
- 941:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 9624              		.loc 1 941 3 view .LVU3042
- 941:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 9625              		.loc 1 941 3 view .LVU3043
- 9626 001a 244B     		ldr	r3, .L532
- 9627 001c 1A6C     		ldr	r2, [r3, #64]
- 9628 001e 42F08052 		orr	r2, r2, #268435456
- 9629 0022 1A64     		str	r2, [r3, #64]
- 941:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 9630              		.loc 1 941 3 view .LVU3044
- 9631 0024 1B6C     		ldr	r3, [r3, #64]
- 9632 0026 03F08053 		and	r3, r3, #268435456
- 9633 002a 0093     		str	r3, [sp]
- 941:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 9634              		.loc 1 941 3 view .LVU3045
- 9635 002c 009B     		ldr	r3, [sp]
- 9636              	.LBE634:
- 941:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 9637              		.loc 1 941 3 view .LVU3046
- 942:Src/main.c    **** 
- 9638              		.loc 1 942 3 view .LVU3047
- 9639              	.LBB635:
- 942:Src/main.c    **** 
- 9640              		.loc 1 942 3 view .LVU3048
- 942:Src/main.c    **** 
- 9641              		.loc 1 942 3 view .LVU3049
- 9642 002e 204B     		ldr	r3, .L532+4
- 9643 0030 1A68     		ldr	r2, [r3]
- 9644 0032 42F44042 		orr	r2, r2, #49152
- 9645 0036 1A60     		str	r2, [r3]
- 942:Src/main.c    **** 
- 9646              		.loc 1 942 3 view .LVU3050
- 9647 0038 1B68     		ldr	r3, [r3]
- 9648 003a 03F44043 		and	r3, r3, #49152
- 9649 003e 0193     		str	r3, [sp, #4]
- 942:Src/main.c    **** 
- 9650              		.loc 1 942 3 view .LVU3051
- 9651 0040 019B     		ldr	r3, [sp, #4]
- 9652              	.LBE635:
- 942:Src/main.c    **** 
- 9653              		.loc 1 942 3 view .LVU3052
- 947:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-ARM GAS  /tmp/ccwR4KB7.s 			page 566
-
-
- 9654              		.loc 1 947 3 view .LVU3053
- 947:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 9655              		.loc 1 947 36 is_stmt 0 view .LVU3054
- 9656 0042 0123     		movs	r3, #1
- 9657 0044 0793     		str	r3, [sp, #28]
- 948:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 9658              		.loc 1 948 3 is_stmt 1 view .LVU3055
- 948:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 9659              		.loc 1 948 30 is_stmt 0 view .LVU3056
- 9660 0046 4FF48033 		mov	r3, #65536
- 9661 004a 0893     		str	r3, [sp, #32]
- 949:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 9662              		.loc 1 949 3 is_stmt 1 view .LVU3057
- 949:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 9663              		.loc 1 949 34 is_stmt 0 view .LVU3058
- 9664 004c 0223     		movs	r3, #2
- 9665 004e 0D93     		str	r3, [sp, #52]
- 950:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = 25;
- 9666              		.loc 1 950 3 is_stmt 1 view .LVU3059
- 950:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = 25;
- 9667              		.loc 1 950 35 is_stmt 0 view .LVU3060
- 9668 0050 4FF48002 		mov	r2, #4194304
- 9669 0054 0E92     		str	r2, [sp, #56]
- 951:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 368;
- 9670              		.loc 1 951 3 is_stmt 1 view .LVU3061
- 951:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 368;
- 9671              		.loc 1 951 30 is_stmt 0 view .LVU3062
- 9672 0056 1922     		movs	r2, #25
- 9673 0058 0F92     		str	r2, [sp, #60]
- 952:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 9674              		.loc 1 952 3 is_stmt 1 view .LVU3063
- 952:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 9675              		.loc 1 952 30 is_stmt 0 view .LVU3064
- 9676 005a 4FF4B872 		mov	r2, #368
- 9677 005e 1092     		str	r2, [sp, #64]
- 953:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = 8;
- 9678              		.loc 1 953 3 is_stmt 1 view .LVU3065
- 953:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = 8;
- 9679              		.loc 1 953 30 is_stmt 0 view .LVU3066
- 9680 0060 1193     		str	r3, [sp, #68]
- 954:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = 2;
- 9681              		.loc 1 954 3 is_stmt 1 view .LVU3067
- 954:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = 2;
- 9682              		.loc 1 954 30 is_stmt 0 view .LVU3068
- 9683 0062 0822     		movs	r2, #8
- 9684 0064 1292     		str	r2, [sp, #72]
- 955:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 9685              		.loc 1 955 3 is_stmt 1 view .LVU3069
- 955:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 9686              		.loc 1 955 30 is_stmt 0 view .LVU3070
- 9687 0066 1393     		str	r3, [sp, #76]
- 956:Src/main.c    ****   {
- 9688              		.loc 1 956 3 is_stmt 1 view .LVU3071
- 956:Src/main.c    ****   {
- 9689              		.loc 1 956 7 is_stmt 0 view .LVU3072
- 9690 0068 07A8     		add	r0, sp, #28
- 9691 006a FFF7FEFF 		bl	HAL_RCC_OscConfig
-ARM GAS  /tmp/ccwR4KB7.s 			page 567
-
-
- 9692              	.LVL852:
- 956:Src/main.c    ****   {
- 9693              		.loc 1 956 6 discriminator 1 view .LVU3073
- 9694 006e B0B9     		cbnz	r0, .L529
- 963:Src/main.c    ****   {
- 9695              		.loc 1 963 3 is_stmt 1 view .LVU3074
- 963:Src/main.c    ****   {
- 9696              		.loc 1 963 7 is_stmt 0 view .LVU3075
- 9697 0070 FFF7FEFF 		bl	HAL_PWREx_EnableOverDrive
- 9698              	.LVL853:
- 963:Src/main.c    ****   {
- 9699              		.loc 1 963 6 discriminator 1 view .LVU3076
- 9700 0074 A8B9     		cbnz	r0, .L530
- 970:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- 9701              		.loc 1 970 3 is_stmt 1 view .LVU3077
- 970:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- 9702              		.loc 1 970 31 is_stmt 0 view .LVU3078
- 9703 0076 0F23     		movs	r3, #15
- 9704 0078 0293     		str	r3, [sp, #8]
- 972:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 9705              		.loc 1 972 3 is_stmt 1 view .LVU3079
- 972:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 9706              		.loc 1 972 34 is_stmt 0 view .LVU3080
- 9707 007a 0223     		movs	r3, #2
- 9708 007c 0393     		str	r3, [sp, #12]
- 973:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 9709              		.loc 1 973 3 is_stmt 1 view .LVU3081
- 973:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 9710              		.loc 1 973 35 is_stmt 0 view .LVU3082
- 9711 007e 0023     		movs	r3, #0
- 9712 0080 0493     		str	r3, [sp, #16]
- 974:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 9713              		.loc 1 974 3 is_stmt 1 view .LVU3083
- 974:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 9714              		.loc 1 974 36 is_stmt 0 view .LVU3084
- 9715 0082 4FF4A053 		mov	r3, #5120
- 9716 0086 0593     		str	r3, [sp, #20]
- 975:Src/main.c    **** 
- 9717              		.loc 1 975 3 is_stmt 1 view .LVU3085
- 975:Src/main.c    **** 
- 9718              		.loc 1 975 36 is_stmt 0 view .LVU3086
- 9719 0088 4FF48053 		mov	r3, #4096
- 9720 008c 0693     		str	r3, [sp, #24]
- 977:Src/main.c    ****   {
- 9721              		.loc 1 977 3 is_stmt 1 view .LVU3087
- 977:Src/main.c    ****   {
- 9722              		.loc 1 977 7 is_stmt 0 view .LVU3088
- 9723 008e 0621     		movs	r1, #6
- 9724 0090 02A8     		add	r0, sp, #8
- 9725 0092 FFF7FEFF 		bl	HAL_RCC_ClockConfig
- 9726              	.LVL854:
- 977:Src/main.c    ****   {
- 9727              		.loc 1 977 6 discriminator 1 view .LVU3089
- 9728 0096 30B9     		cbnz	r0, .L531
- 981:Src/main.c    **** 
- 9729              		.loc 1 981 1 view .LVU3090
- 9730 0098 15B0     		add	sp, sp, #84
-ARM GAS  /tmp/ccwR4KB7.s 			page 568
-
-
- 9731              	.LCFI102:
- 9732              		.cfi_remember_state
- 9733              		.cfi_def_cfa_offset 4
- 9734              		@ sp needed
- 9735 009a 5DF804FB 		ldr	pc, [sp], #4
- 9736              	.L529:
- 9737              	.LCFI103:
- 9738              		.cfi_restore_state
- 958:Src/main.c    ****   }
- 9739              		.loc 1 958 5 is_stmt 1 view .LVU3091
- 9740 009e FFF7FEFF 		bl	Error_Handler
- 9741              	.LVL855:
- 9742              	.L530:
- 965:Src/main.c    ****   }
- 9743              		.loc 1 965 5 view .LVU3092
- 9744 00a2 FFF7FEFF 		bl	Error_Handler
- 9745              	.LVL856:
- 9746              	.L531:
- 979:Src/main.c    ****   }
- 9747              		.loc 1 979 5 view .LVU3093
- 9748 00a6 FFF7FEFF 		bl	Error_Handler
- 9749              	.LVL857:
- 9750              	.L533:
- 9751 00aa 00BF     		.align	2
- 9752              	.L532:
- 9753 00ac 00380240 		.word	1073887232
- 9754 00b0 00700040 		.word	1073770496
- 9755              		.cfi_endproc
- 9756              	.LFE1187:
- 9758              		.section	.text.main,"ax",%progbits
- 9759              		.align	1
- 9760              		.global	main
- 9761              		.syntax unified
- 9762              		.thumb
- 9763              		.thumb_func
- 9765              	main:
- 9766              	.LFB1186:
- 236:Src/main.c    **** 
- 9767              		.loc 1 236 1 view -0
- 9768              		.cfi_startproc
- 9769              		@ args = 0, pretend = 0, frame = 8
- 9770              		@ frame_needed = 0, uses_anonymous_args = 0
- 9771 0000 2DE9F043 		push	{r4, r5, r6, r7, r8, r9, lr}
- 9772              	.LCFI104:
- 9773              		.cfi_def_cfa_offset 28
- 9774              		.cfi_offset 4, -28
- 9775              		.cfi_offset 5, -24
- 9776              		.cfi_offset 6, -20
- 9777              		.cfi_offset 7, -16
- 9778              		.cfi_offset 8, -12
- 9779              		.cfi_offset 9, -8
- 9780              		.cfi_offset 14, -4
- 9781 0004 85B0     		sub	sp, sp, #20
- 9782              	.LCFI105:
- 9783              		.cfi_def_cfa_offset 48
- 239:Src/main.c    ****   /* USER CODE END 1 */
- 9784              		.loc 1 239 2 view .LVU3095
-ARM GAS  /tmp/ccwR4KB7.s 			page 569
-
-
- 245:Src/main.c    **** 
- 9785              		.loc 1 245 3 view .LVU3096
- 9786 0006 FFF7FEFF 		bl	HAL_Init
- 9787              	.LVL858:
- 252:Src/main.c    **** 
- 9788              		.loc 1 252 3 view .LVU3097
- 9789 000a FFF7FEFF 		bl	SystemClock_Config
- 9790              	.LVL859:
- 259:Src/main.c    ****   MX_DMA_Init();
- 9791              		.loc 1 259 3 view .LVU3098
- 9792 000e FFF7FEFF 		bl	MX_GPIO_Init
- 9793              	.LVL860:
- 260:Src/main.c    ****   MX_SPI4_Init();
- 9794              		.loc 1 260 3 view .LVU3099
- 9795 0012 FFF7FEFF 		bl	MX_DMA_Init
- 9796              	.LVL861:
- 261:Src/main.c    ****   MX_FATFS_Init();
- 9797              		.loc 1 261 3 view .LVU3100
- 9798 0016 FFF7FEFF 		bl	MX_SPI4_Init
- 9799              	.LVL862:
- 262:Src/main.c    ****   MX_TIM2_Init();
- 9800              		.loc 1 262 3 view .LVU3101
- 9801 001a FFF7FEFF 		bl	MX_FATFS_Init
- 9802              	.LVL863:
- 263:Src/main.c    ****   MX_TIM5_Init();
- 9803              		.loc 1 263 3 view .LVU3102
- 9804 001e FFF7FEFF 		bl	MX_TIM2_Init
- 9805              	.LVL864:
- 264:Src/main.c    ****   MX_ADC1_Init();
- 9806              		.loc 1 264 3 view .LVU3103
- 9807 0022 FFF7FEFF 		bl	MX_TIM5_Init
- 9808              	.LVL865:
- 265:Src/main.c    ****   MX_ADC3_Init();
- 9809              		.loc 1 265 3 view .LVU3104
- 9810 0026 FFF7FEFF 		bl	MX_ADC1_Init
- 9811              	.LVL866:
- 266:Src/main.c    ****   MX_SPI2_Init();
- 9812              		.loc 1 266 3 view .LVU3105
- 9813 002a FFF7FEFF 		bl	MX_ADC3_Init
- 9814              	.LVL867:
- 267:Src/main.c    ****   MX_SPI5_Init();
- 9815              		.loc 1 267 3 view .LVU3106
- 9816 002e FFF7FEFF 		bl	MX_SPI2_Init
- 9817              	.LVL868:
- 268:Src/main.c    ****   MX_SPI6_Init();
- 9818              		.loc 1 268 3 view .LVU3107
- 9819 0032 FFF7FEFF 		bl	MX_SPI5_Init
- 9820              	.LVL869:
- 269:Src/main.c    ****   MX_USART1_UART_Init();
- 9821              		.loc 1 269 3 view .LVU3108
- 9822 0036 FFF7FEFF 		bl	MX_SPI6_Init
- 9823              	.LVL870:
- 270:Src/main.c    ****   MX_SDMMC1_SD_Init();
- 9824              		.loc 1 270 3 view .LVU3109
- 9825 003a FFF7FEFF 		bl	MX_USART1_UART_Init
- 9826              	.LVL871:
- 271:Src/main.c    ****   MX_TIM7_Init();
-ARM GAS  /tmp/ccwR4KB7.s 			page 570
-
-
- 9827              		.loc 1 271 3 view .LVU3110
- 9828 003e FFF7FEFF 		bl	MX_SDMMC1_SD_Init
- 9829              	.LVL872:
- 272:Src/main.c    ****   MX_TIM6_Init();
- 9830              		.loc 1 272 3 view .LVU3111
- 9831 0042 FFF7FEFF 		bl	MX_TIM7_Init
- 9832              	.LVL873:
- 273:Src/main.c    ****   MX_TIM10_Init();
- 9833              		.loc 1 273 3 view .LVU3112
- 9834 0046 FFF7FEFF 		bl	MX_TIM6_Init
- 9835              	.LVL874:
- 274:Src/main.c    ****   MX_UART8_Init();
- 9836              		.loc 1 274 3 view .LVU3113
- 9837 004a FFF7FEFF 		bl	MX_TIM10_Init
- 9838              	.LVL875:
- 275:Src/main.c    ****   MX_TIM8_Init();
- 9839              		.loc 1 275 3 view .LVU3114
- 9840 004e FFF7FEFF 		bl	MX_UART8_Init
- 9841              	.LVL876:
- 276:Src/main.c    ****   MX_TIM11_Init();
- 9842              		.loc 1 276 3 view .LVU3115
- 9843 0052 FFF7FEFF 		bl	MX_TIM8_Init
- 9844              	.LVL877:
- 277:Src/main.c    ****   MX_TIM4_Init();
- 9845              		.loc 1 277 3 view .LVU3116
- 9846 0056 FFF7FEFF 		bl	MX_TIM11_Init
- 9847              	.LVL878:
- 278:Src/main.c    ****   /* USER CODE BEGIN 2 */
- 9848              		.loc 1 278 3 view .LVU3117
- 9849 005a FFF7FEFF 		bl	MX_TIM4_Init
- 9850              	.LVL879:
- 280:Src/main.c    **** 	//HAL_TIM_Base_Start(&htim11);
- 9851              		.loc 1 280 2 view .LVU3118
- 9852 005e FFF7FEFF 		bl	Init_params
- 9853              	.LVL880:
- 291:Src/main.c    **** 
- 9854              		.loc 1 291 2 view .LVU3119
- 291:Src/main.c    **** 
- 9855              		.loc 1 291 14 is_stmt 0 view .LVU3120
- 9856 0062 854A     		ldr	r2, .L612
- 9857 0064 3523     		movs	r3, #53
- 9858 0066 D362     		str	r3, [r2, #44]
- 293:Src/main.c    **** 
- 9859              		.loc 1 293 2 is_stmt 1 view .LVU3121
- 293:Src/main.c    **** 
- 9860              		.loc 1 293 23 is_stmt 0 view .LVU3122
- 9861 0068 D36A     		ldr	r3, [r2, #44]
- 293:Src/main.c    **** 
- 9862              		.loc 1 293 30 view .LVU3123
- 9863 006a 0133     		adds	r3, r3, #1
- 293:Src/main.c    **** 
- 9864              		.loc 1 293 33 view .LVU3124
- 9865 006c 5B08     		lsrs	r3, r3, #1
- 293:Src/main.c    **** 
- 9866              		.loc 1 293 36 view .LVU3125
- 9867 006e 013B     		subs	r3, r3, #1
- 293:Src/main.c    **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 571
-
-
- 9868              		.loc 1 293 15 view .LVU3126
- 9869 0070 D363     		str	r3, [r2, #60]
- 298:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 9870              		.loc 1 298 2 is_stmt 1 view .LVU3127
- 298:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 9871              		.loc 1 298 23 is_stmt 0 view .LVU3128
- 9872 0072 D36A     		ldr	r3, [r2, #44]
- 298:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 9873              		.loc 1 298 36 view .LVU3129
- 9874 0074 9B00     		lsls	r3, r3, #2
- 9875 0076 0333     		adds	r3, r3, #3
- 298:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 9876              		.loc 1 298 15 view .LVU3130
- 9877 0078 02F5A032 		add	r2, r2, #81920
- 9878 007c D362     		str	r3, [r2, #44]
- 299:Src/main.c    **** 
- 9879              		.loc 1 299 2 is_stmt 1 view .LVU3131
- 299:Src/main.c    **** 
- 9880              		.loc 1 299 25 is_stmt 0 view .LVU3132
- 9881 007e D36A     		ldr	r3, [r2, #44]
- 299:Src/main.c    **** 
- 9882              		.loc 1 299 32 view .LVU3133
- 9883 0080 0133     		adds	r3, r3, #1
- 299:Src/main.c    **** 
- 9884              		.loc 1 299 35 view .LVU3134
- 9885 0082 5B08     		lsrs	r3, r3, #1
- 299:Src/main.c    **** 
- 9886              		.loc 1 299 38 view .LVU3135
- 9887 0084 013B     		subs	r3, r3, #1
- 299:Src/main.c    **** 
- 9888              		.loc 1 299 16 view .LVU3136
- 9889 0086 5363     		str	r3, [r2, #52]
- 9890 0088 4CE0     		b	.L535
- 9891              	.L602:
- 313:Src/main.c    **** 		{
- 9892              		.loc 1 313 85 discriminator 1 view .LVU3137
- 9893 008a 7C4B     		ldr	r3, .L612+4
- 9894 008c 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 313:Src/main.c    **** 		{
- 9895              		.loc 1 313 73 discriminator 1 view .LVU3138
- 9896 008e 002B     		cmp	r3, #0
- 9897 0090 4FD1     		bne	.L536
- 9898              	.L537:
- 9899              	.LBB636:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9900              		.loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3139
- 9901              	.LBB637:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9902              		.loc 7 3073 3 discriminator 1 view .LVU3140
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9903              		.loc 7 3073 3 discriminator 1 view .LVU3141
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9904              		.loc 7 3073 3 discriminator 1 view .LVU3142
- 9905              	.LVL881:
- 9906              	.LBB638:
- 9907              	.LBI638:
-1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-ARM GAS  /tmp/ccwR4KB7.s 			page 572
-
-
- 9908              		.loc 8 1068 31 view .LVU3143
- 9909              	.LBB639:
-1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 
- 9910              		.loc 8 1070 5 view .LVU3144
-1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 9911              		.loc 8 1072 4 view .LVU3145
- 9912 0092 7B4A     		ldr	r2, .L612+8
- 9913              		.syntax unified
- 9914              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 9915 0094 52E8003F 		ldrex r3, [r2]
- 9916              	@ 0 "" 2
- 9917              	.LVL882:
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 9918              		.loc 8 1073 4 view .LVU3146
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 9919              		.loc 8 1073 4 is_stmt 0 view .LVU3147
- 9920              		.thumb
- 9921              		.syntax unified
- 9922              	.LBE639:
- 9923              	.LBE638:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9924              		.loc 7 3073 3 discriminator 1 view .LVU3148
- 9925 0098 43F48073 		orr	r3, r3, #256
- 9926              	.LVL883:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9927              		.loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3149
- 9928              	.LBB640:
- 9929              	.LBI640:
-1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 9930              		.loc 8 1119 31 view .LVU3150
- 9931              	.LBB641:
-1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
- 9932              		.loc 8 1121 4 view .LVU3151
-1123:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 9933              		.loc 8 1123 4 view .LVU3152
- 9934              		.syntax unified
- 9935              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 9936 009c 42E80031 		strex r1, r3, [r2]
- 9937              	@ 0 "" 2
- 9938              	.LVL884:
- 9939              		.loc 8 1124 4 view .LVU3153
- 9940              		.loc 8 1124 4 is_stmt 0 view .LVU3154
- 9941              		.thumb
- 9942              		.syntax unified
- 9943              	.LBE641:
- 9944              	.LBE640:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9945              		.loc 7 3073 3 discriminator 1 view .LVU3155
- 9946 00a0 0029     		cmp	r1, #0
- 9947 00a2 F6D1     		bne	.L537
- 9948              	.LVL885:
- 9949              	.L538:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9950              		.loc 7 3073 3 discriminator 1 view .LVU3156
- 9951              	.LBE637:
- 9952              	.LBE636:
- 9953              	.LBB642:
-ARM GAS  /tmp/ccwR4KB7.s 			page 573
-
-
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9954              		.loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3157
- 9955              	.LBB643:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9956              		.loc 7 3040 3 discriminator 1 view .LVU3158
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9957              		.loc 7 3040 3 discriminator 1 view .LVU3159
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9958              		.loc 7 3040 3 discriminator 1 view .LVU3160
- 9959              	.LBB644:
- 9960              	.LBI644:
-1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 9961              		.loc 8 1068 31 view .LVU3161
- 9962              	.LBB645:
-1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 
- 9963              		.loc 8 1070 5 view .LVU3162
-1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 9964              		.loc 8 1072 4 view .LVU3163
- 9965 00a4 764A     		ldr	r2, .L612+8
- 9966              		.syntax unified
- 9967              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 9968 00a6 52E8003F 		ldrex r3, [r2]
- 9969              	@ 0 "" 2
- 9970              	.LVL886:
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 9971              		.loc 8 1073 4 view .LVU3164
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 9972              		.loc 8 1073 4 is_stmt 0 view .LVU3165
- 9973              		.thumb
- 9974              		.syntax unified
- 9975              	.LBE645:
- 9976              	.LBE644:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9977              		.loc 7 3040 3 discriminator 1 view .LVU3166
- 9978 00aa 43F02003 		orr	r3, r3, #32
- 9979              	.LVL887:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9980              		.loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3167
- 9981              	.LBB646:
- 9982              	.LBI646:
-1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 9983              		.loc 8 1119 31 view .LVU3168
- 9984              	.LBB647:
-1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
- 9985              		.loc 8 1121 4 view .LVU3169
-1123:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 9986              		.loc 8 1123 4 view .LVU3170
- 9987              		.syntax unified
- 9988              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 9989 00ae 42E80031 		strex r1, r3, [r2]
- 9990              	@ 0 "" 2
- 9991              	.LVL888:
- 9992              		.loc 8 1124 4 view .LVU3171
- 9993              		.loc 8 1124 4 is_stmt 0 view .LVU3172
- 9994              		.thumb
- 9995              		.syntax unified
- 9996              	.LBE647:
-ARM GAS  /tmp/ccwR4KB7.s 			page 574
-
-
- 9997              	.LBE646:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 9998              		.loc 7 3040 3 discriminator 1 view .LVU3173
- 9999 00b2 0029     		cmp	r1, #0
- 10000 00b4 F6D1     		bne	.L538
- 10001              	.LVL889:
- 10002              	.L539:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10003              		.loc 7 3040 3 discriminator 1 view .LVU3174
- 10004              	.LBE643:
- 10005              	.LBE642:
- 10006              	.LBB648:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10007              		.loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3175
- 10008              	.LBB649:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10009              		.loc 7 3136 3 discriminator 1 view .LVU3176
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10010              		.loc 7 3136 3 discriminator 1 view .LVU3177
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10011              		.loc 7 3136 3 discriminator 1 view .LVU3178
- 10012              	.LBB650:
- 10013              	.LBI650:
-1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 10014              		.loc 8 1068 31 view .LVU3179
- 10015              	.LBB651:
-1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 
- 10016              		.loc 8 1070 5 view .LVU3180
-1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 10017              		.loc 8 1072 4 view .LVU3181
- 10018 00b6 724A     		ldr	r2, .L612+8
- 10019 00b8 02F10803 		add	r3, r2, #8
- 10020              		.syntax unified
- 10021              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 10022 00bc 53E8003F 		ldrex r3, [r3]
- 10023              	@ 0 "" 2
- 10024              	.LVL890:
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 10025              		.loc 8 1073 4 view .LVU3182
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 10026              		.loc 8 1073 4 is_stmt 0 view .LVU3183
- 10027              		.thumb
+ 9981 0042 0392     		str	r2, [sp, #12]
+1831:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 9982              		.loc 1 1831 3 is_stmt 1 view .LVU3132
+1831:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 9983              		.loc 1 1831 24 is_stmt 0 view .LVU3133
+ 9984 0044 0592     		str	r2, [sp, #20]
+1832:Src/main.c    ****   {
+ 9985              		.loc 1 1832 3 is_stmt 1 view .LVU3134
+1832:Src/main.c    ****   {
+ 9986              		.loc 1 1832 7 is_stmt 0 view .LVU3135
+ 9987 0046 01A9     		add	r1, sp, #4
+ 9988 0048 0748     		ldr	r0, .L545
+ 9989 004a FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
+ 9990              	.LVL910:
+1832:Src/main.c    ****   {
+ 9991              		.loc 1 1832 6 discriminator 1 view .LVU3136
+ 9992 004e 48B9     		cbnz	r0, .L544
+1839:Src/main.c    **** 
+ 9993              		.loc 1 1839 3 is_stmt 1 view .LVU3137
+ 9994 0050 0548     		ldr	r0, .L545
+ 9995 0052 FFF7FEFF 		bl	HAL_TIM_MspPostInit
+ 9996              	.LVL911:
+1841:Src/main.c    **** 
+ 9997              		.loc 1 1841 1 is_stmt 0 view .LVU3138
+ 9998 0056 09B0     		add	sp, sp, #36
+ 9999              	.LCFI96:
+ 10000              		.cfi_remember_state
+ 10001              		.cfi_def_cfa_offset 4
+ 10002              		@ sp needed
+ 10003 0058 5DF804FB 		ldr	pc, [sp], #4
+ 10004              	.L542:
+ 10005              	.LCFI97:
+ 10006              		.cfi_restore_state
+1822:Src/main.c    ****   }
+ 10007              		.loc 1 1822 5 is_stmt 1 view .LVU3139
+ 10008 005c FFF7FEFF 		bl	Error_Handler
+ 10009              	.LVL912:
+ 10010              	.L543:
+1826:Src/main.c    ****   }
+ 10011              		.loc 1 1826 5 view .LVU3140
+ 10012 0060 FFF7FEFF 		bl	Error_Handler
+ 10013              	.LVL913:
+ 10014              	.L544:
+1834:Src/main.c    ****   }
+ 10015              		.loc 1 1834 5 view .LVU3141
+ 10016 0064 FFF7FEFF 		bl	Error_Handler
+ 10017              	.LVL914:
+ 10018              	.L546:
+ 10019              		.align	2
+ 10020              	.L545:
+ 10021 0068 00000000 		.word	htim11
+ 10022 006c 00480140 		.word	1073825792
+ 10023              		.cfi_endproc
+ 10024              	.LFE1202:
+ 10026              		.section	.text.MX_TIM4_Init,"ax",%progbits
+ 10027              		.align	1
  10028              		.syntax unified
- 10029              	.LBE651:
- 10030              	.LBE650:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10031              		.loc 7 3136 3 discriminator 1 view .LVU3184
- 10032 00c0 43F00103 		orr	r3, r3, #1
- 10033              	.LVL891:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10034              		.loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3185
- 10035              	.LBB652:
- 10036              	.LBI652:
+ARM GAS  /tmp/ccEQxcUB.s 			page 579
+
+
+ 10029              		.thumb
+ 10030              		.thumb_func
+ 10032              	MX_TIM4_Init:
+ 10033              	.LFB1196:
+1553:Src/main.c    **** 
+ 10034              		.loc 1 1553 1 view -0
+ 10035              		.cfi_startproc
+ 10036              		@ args = 0, pretend = 0, frame = 56
+ 10037              		@ frame_needed = 0, uses_anonymous_args = 0
+ 10038 0000 00B5     		push	{lr}
+ 10039              	.LCFI98:
+ 10040              		.cfi_def_cfa_offset 4
+ 10041              		.cfi_offset 14, -4
+ 10042 0002 8FB0     		sub	sp, sp, #60
+ 10043              	.LCFI99:
+ 10044              		.cfi_def_cfa_offset 64
+1559:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 10045              		.loc 1 1559 3 view .LVU3143
+1559:Src/main.c    ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 10046              		.loc 1 1559 26 is_stmt 0 view .LVU3144
+ 10047 0004 0023     		movs	r3, #0
+ 10048 0006 0A93     		str	r3, [sp, #40]
+ 10049 0008 0B93     		str	r3, [sp, #44]
+ 10050 000a 0C93     		str	r3, [sp, #48]
+ 10051 000c 0D93     		str	r3, [sp, #52]
+1560:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
+ 10052              		.loc 1 1560 3 is_stmt 1 view .LVU3145
+1560:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
+ 10053              		.loc 1 1560 27 is_stmt 0 view .LVU3146
+ 10054 000e 0793     		str	r3, [sp, #28]
+ 10055 0010 0893     		str	r3, [sp, #32]
+ 10056 0012 0993     		str	r3, [sp, #36]
+1561:Src/main.c    **** 
+ 10057              		.loc 1 1561 3 is_stmt 1 view .LVU3147
+1561:Src/main.c    **** 
+ 10058              		.loc 1 1561 22 is_stmt 0 view .LVU3148
+ 10059 0014 0093     		str	r3, [sp]
+ 10060 0016 0193     		str	r3, [sp, #4]
+ 10061 0018 0293     		str	r3, [sp, #8]
+ 10062 001a 0393     		str	r3, [sp, #12]
+ 10063 001c 0493     		str	r3, [sp, #16]
+ 10064 001e 0593     		str	r3, [sp, #20]
+ 10065 0020 0693     		str	r3, [sp, #24]
+1566:Src/main.c    ****   htim4.Init.Prescaler = 0;
+ 10066              		.loc 1 1566 3 is_stmt 1 view .LVU3149
+1566:Src/main.c    ****   htim4.Init.Prescaler = 0;
+ 10067              		.loc 1 1566 18 is_stmt 0 view .LVU3150
+ 10068 0022 1E48     		ldr	r0, .L559
+ 10069 0024 1E4A     		ldr	r2, .L559+4
+ 10070 0026 0260     		str	r2, [r0]
+1567:Src/main.c    ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 10071              		.loc 1 1567 3 is_stmt 1 view .LVU3151
+1567:Src/main.c    ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 10072              		.loc 1 1567 24 is_stmt 0 view .LVU3152
+ 10073 0028 4360     		str	r3, [r0, #4]
+1568:Src/main.c    ****   htim4.Init.Period = 45;
+ 10074              		.loc 1 1568 3 is_stmt 1 view .LVU3153
+ARM GAS  /tmp/ccEQxcUB.s 			page 580
+
+
+1568:Src/main.c    ****   htim4.Init.Period = 45;
+ 10075              		.loc 1 1568 26 is_stmt 0 view .LVU3154
+ 10076 002a 8360     		str	r3, [r0, #8]
+1569:Src/main.c    ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 10077              		.loc 1 1569 3 is_stmt 1 view .LVU3155
+1569:Src/main.c    ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 10078              		.loc 1 1569 21 is_stmt 0 view .LVU3156
+ 10079 002c 2D22     		movs	r2, #45
+ 10080 002e C260     		str	r2, [r0, #12]
+1570:Src/main.c    ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 10081              		.loc 1 1570 3 is_stmt 1 view .LVU3157
+1570:Src/main.c    ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 10082              		.loc 1 1570 28 is_stmt 0 view .LVU3158
+ 10083 0030 0361     		str	r3, [r0, #16]
+1571:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+ 10084              		.loc 1 1571 3 is_stmt 1 view .LVU3159
+1571:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+ 10085              		.loc 1 1571 32 is_stmt 0 view .LVU3160
+ 10086 0032 8361     		str	r3, [r0, #24]
+1572:Src/main.c    ****   {
+ 10087              		.loc 1 1572 3 is_stmt 1 view .LVU3161
+1572:Src/main.c    ****   {
+ 10088              		.loc 1 1572 7 is_stmt 0 view .LVU3162
+ 10089 0034 FFF7FEFF 		bl	HAL_TIM_Base_Init
+ 10090              	.LVL915:
+1572:Src/main.c    ****   {
+ 10091              		.loc 1 1572 6 discriminator 1 view .LVU3163
+ 10092 0038 30BB     		cbnz	r0, .L554
+1576:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+ 10093              		.loc 1 1576 3 is_stmt 1 view .LVU3164
+1576:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+ 10094              		.loc 1 1576 34 is_stmt 0 view .LVU3165
+ 10095 003a 4FF48053 		mov	r3, #4096
+ 10096 003e 0A93     		str	r3, [sp, #40]
+1577:Src/main.c    ****   {
+ 10097              		.loc 1 1577 3 is_stmt 1 view .LVU3166
+1577:Src/main.c    ****   {
+ 10098              		.loc 1 1577 7 is_stmt 0 view .LVU3167
+ 10099 0040 0AA9     		add	r1, sp, #40
+ 10100 0042 1648     		ldr	r0, .L559
+ 10101 0044 FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
+ 10102              	.LVL916:
+1577:Src/main.c    ****   {
+ 10103              		.loc 1 1577 6 discriminator 1 view .LVU3168
+ 10104 0048 00BB     		cbnz	r0, .L555
+1581:Src/main.c    ****   {
+ 10105              		.loc 1 1581 3 is_stmt 1 view .LVU3169
+1581:Src/main.c    ****   {
+ 10106              		.loc 1 1581 7 is_stmt 0 view .LVU3170
+ 10107 004a 1448     		ldr	r0, .L559
+ 10108 004c FFF7FEFF 		bl	HAL_TIM_PWM_Init
+ 10109              	.LVL917:
+1581:Src/main.c    ****   {
+ 10110              		.loc 1 1581 6 discriminator 1 view .LVU3171
+ 10111 0050 F0B9     		cbnz	r0, .L556
+1585:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 10112              		.loc 1 1585 3 is_stmt 1 view .LVU3172
+ARM GAS  /tmp/ccEQxcUB.s 			page 581
+
+
+1585:Src/main.c    ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 10113              		.loc 1 1585 37 is_stmt 0 view .LVU3173
+ 10114 0052 0023     		movs	r3, #0
+ 10115 0054 0793     		str	r3, [sp, #28]
+1586:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+ 10116              		.loc 1 1586 3 is_stmt 1 view .LVU3174
+1586:Src/main.c    ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+ 10117              		.loc 1 1586 33 is_stmt 0 view .LVU3175
+ 10118 0056 0993     		str	r3, [sp, #36]
+1587:Src/main.c    ****   {
+ 10119              		.loc 1 1587 3 is_stmt 1 view .LVU3176
+1587:Src/main.c    ****   {
+ 10120              		.loc 1 1587 7 is_stmt 0 view .LVU3177
+ 10121 0058 07A9     		add	r1, sp, #28
+ 10122 005a 1048     		ldr	r0, .L559
+ 10123 005c FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
+ 10124              	.LVL918:
+1587:Src/main.c    ****   {
+ 10125              		.loc 1 1587 6 discriminator 1 view .LVU3178
+ 10126 0060 C0B9     		cbnz	r0, .L557
+1591:Src/main.c    ****   sConfigOC.Pulse = 22;
+ 10127              		.loc 1 1591 3 is_stmt 1 view .LVU3179
+1591:Src/main.c    ****   sConfigOC.Pulse = 22;
+ 10128              		.loc 1 1591 20 is_stmt 0 view .LVU3180
+ 10129 0062 6023     		movs	r3, #96
+ 10130 0064 0093     		str	r3, [sp]
+1592:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 10131              		.loc 1 1592 3 is_stmt 1 view .LVU3181
+1592:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 10132              		.loc 1 1592 19 is_stmt 0 view .LVU3182
+ 10133 0066 1623     		movs	r3, #22
+ 10134 0068 0193     		str	r3, [sp, #4]
+1593:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 10135              		.loc 1 1593 3 is_stmt 1 view .LVU3183
+1593:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 10136              		.loc 1 1593 24 is_stmt 0 view .LVU3184
+ 10137 006a 0023     		movs	r3, #0
+ 10138 006c 0293     		str	r3, [sp, #8]
+1594:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+ 10139              		.loc 1 1594 3 is_stmt 1 view .LVU3185
+1594:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+ 10140              		.loc 1 1594 24 is_stmt 0 view .LVU3186
+ 10141 006e 0493     		str	r3, [sp, #16]
+1595:Src/main.c    ****   {
+ 10142              		.loc 1 1595 3 is_stmt 1 view .LVU3187
+1595:Src/main.c    ****   {
+ 10143              		.loc 1 1595 7 is_stmt 0 view .LVU3188
+ 10144 0070 0822     		movs	r2, #8
+ 10145 0072 6946     		mov	r1, sp
+ 10146 0074 0948     		ldr	r0, .L559
+ 10147 0076 FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
+ 10148              	.LVL919:
+1595:Src/main.c    ****   {
+ 10149              		.loc 1 1595 6 discriminator 1 view .LVU3189
+ 10150 007a 68B9     		cbnz	r0, .L558
+1602:Src/main.c    **** 
+ 10151              		.loc 1 1602 3 is_stmt 1 view .LVU3190
+ARM GAS  /tmp/ccEQxcUB.s 			page 582
+
+
+ 10152 007c 0748     		ldr	r0, .L559
+ 10153 007e FFF7FEFF 		bl	HAL_TIM_MspPostInit
+ 10154              	.LVL920:
+1604:Src/main.c    **** 
+ 10155              		.loc 1 1604 1 is_stmt 0 view .LVU3191
+ 10156 0082 0FB0     		add	sp, sp, #60
+ 10157              	.LCFI100:
+ 10158              		.cfi_remember_state
+ 10159              		.cfi_def_cfa_offset 4
+ 10160              		@ sp needed
+ 10161 0084 5DF804FB 		ldr	pc, [sp], #4
+ 10162              	.L554:
+ 10163              	.LCFI101:
+ 10164              		.cfi_restore_state
+1574:Src/main.c    ****   }
+ 10165              		.loc 1 1574 5 is_stmt 1 view .LVU3192
+ 10166 0088 FFF7FEFF 		bl	Error_Handler
+ 10167              	.LVL921:
+ 10168              	.L555:
+1579:Src/main.c    ****   }
+ 10169              		.loc 1 1579 5 view .LVU3193
+ 10170 008c FFF7FEFF 		bl	Error_Handler
+ 10171              	.LVL922:
+ 10172              	.L556:
+1583:Src/main.c    ****   }
+ 10173              		.loc 1 1583 5 view .LVU3194
+ 10174 0090 FFF7FEFF 		bl	Error_Handler
+ 10175              	.LVL923:
+ 10176              	.L557:
+1589:Src/main.c    ****   }
+ 10177              		.loc 1 1589 5 view .LVU3195
+ 10178 0094 FFF7FEFF 		bl	Error_Handler
+ 10179              	.LVL924:
+ 10180              	.L558:
+1597:Src/main.c    ****   }
+ 10181              		.loc 1 1597 5 view .LVU3196
+ 10182 0098 FFF7FEFF 		bl	Error_Handler
+ 10183              	.LVL925:
+ 10184              	.L560:
+ 10185              		.align	2
+ 10186              	.L559:
+ 10187 009c 00000000 		.word	htim4
+ 10188 00a0 00080040 		.word	1073743872
+ 10189              		.cfi_endproc
+ 10190              	.LFE1196:
+ 10192              		.section	.text.MX_TIM1_Init,"ax",%progbits
+ 10193              		.align	1
+ 10194              		.syntax unified
+ 10195              		.thumb
+ 10196              		.thumb_func
+ 10198              	MX_TIM1_Init:
+ 10199              	.LFB1203:
+1849:Src/main.c    **** 
+ 10200              		.loc 1 1849 1 view -0
+ 10201              		.cfi_startproc
+ 10202              		@ args = 0, pretend = 0, frame = 88
+ 10203              		@ frame_needed = 0, uses_anonymous_args = 0
+ARM GAS  /tmp/ccEQxcUB.s 			page 583
+
+
+ 10204 0000 10B5     		push	{r4, lr}
+ 10205              	.LCFI102:
+ 10206              		.cfi_def_cfa_offset 8
+ 10207              		.cfi_offset 4, -8
+ 10208              		.cfi_offset 14, -4
+ 10209 0002 96B0     		sub	sp, sp, #88
+ 10210              	.LCFI103:
+ 10211              		.cfi_def_cfa_offset 96
+1855:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
+ 10212              		.loc 1 1855 3 view .LVU3198
+1855:Src/main.c    ****   TIM_OC_InitTypeDef sConfigOC = {0};
+ 10213              		.loc 1 1855 26 is_stmt 0 view .LVU3199
+ 10214 0004 0024     		movs	r4, #0
+ 10215 0006 1294     		str	r4, [sp, #72]
+ 10216 0008 1394     		str	r4, [sp, #76]
+ 10217 000a 1494     		str	r4, [sp, #80]
+ 10218 000c 1594     		str	r4, [sp, #84]
+1856:Src/main.c    ****   TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+ 10219              		.loc 1 1856 3 is_stmt 1 view .LVU3200
+1856:Src/main.c    ****   TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+ 10220              		.loc 1 1856 22 is_stmt 0 view .LVU3201
+ 10221 000e 0B94     		str	r4, [sp, #44]
+ 10222 0010 0C94     		str	r4, [sp, #48]
+ 10223 0012 0D94     		str	r4, [sp, #52]
+ 10224 0014 0E94     		str	r4, [sp, #56]
+ 10225 0016 0F94     		str	r4, [sp, #60]
+ 10226 0018 1094     		str	r4, [sp, #64]
+ 10227 001a 1194     		str	r4, [sp, #68]
+1857:Src/main.c    **** 
+ 10228              		.loc 1 1857 3 is_stmt 1 view .LVU3202
+1857:Src/main.c    **** 
+ 10229              		.loc 1 1857 34 is_stmt 0 view .LVU3203
+ 10230 001c 2C22     		movs	r2, #44
+ 10231 001e 2146     		mov	r1, r4
+ 10232 0020 6846     		mov	r0, sp
+ 10233 0022 FFF7FEFF 		bl	memset
+ 10234              	.LVL926:
+1862:Src/main.c    ****   htim1.Init.Prescaler = 0;
+ 10235              		.loc 1 1862 3 is_stmt 1 view .LVU3204
+1862:Src/main.c    ****   htim1.Init.Prescaler = 0;
+ 10236              		.loc 1 1862 18 is_stmt 0 view .LVU3205
+ 10237 0026 2548     		ldr	r0, .L573
+ 10238 0028 254B     		ldr	r3, .L573+4
+ 10239 002a 0360     		str	r3, [r0]
+1863:Src/main.c    ****   htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 10240              		.loc 1 1863 3 is_stmt 1 view .LVU3206
+1863:Src/main.c    ****   htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 10241              		.loc 1 1863 24 is_stmt 0 view .LVU3207
+ 10242 002c 4460     		str	r4, [r0, #4]
+1864:Src/main.c    ****   htim1.Init.Period = 8;
+ 10243              		.loc 1 1864 3 is_stmt 1 view .LVU3208
+1864:Src/main.c    ****   htim1.Init.Period = 8;
+ 10244              		.loc 1 1864 26 is_stmt 0 view .LVU3209
+ 10245 002e 8460     		str	r4, [r0, #8]
+1865:Src/main.c    ****   htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 10246              		.loc 1 1865 3 is_stmt 1 view .LVU3210
+1865:Src/main.c    ****   htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ARM GAS  /tmp/ccEQxcUB.s 			page 584
+
+
+ 10247              		.loc 1 1865 21 is_stmt 0 view .LVU3211
+ 10248 0030 0823     		movs	r3, #8
+ 10249 0032 C360     		str	r3, [r0, #12]
+1866:Src/main.c    ****   htim1.Init.RepetitionCounter = 0;
+ 10250              		.loc 1 1866 3 is_stmt 1 view .LVU3212
+1866:Src/main.c    ****   htim1.Init.RepetitionCounter = 0;
+ 10251              		.loc 1 1866 28 is_stmt 0 view .LVU3213
+ 10252 0034 0461     		str	r4, [r0, #16]
+1867:Src/main.c    ****   htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 10253              		.loc 1 1867 3 is_stmt 1 view .LVU3214
+1867:Src/main.c    ****   htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 10254              		.loc 1 1867 32 is_stmt 0 view .LVU3215
+ 10255 0036 4461     		str	r4, [r0, #20]
+1868:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ 10256              		.loc 1 1868 3 is_stmt 1 view .LVU3216
+1868:Src/main.c    ****   if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ 10257              		.loc 1 1868 32 is_stmt 0 view .LVU3217
+ 10258 0038 8461     		str	r4, [r0, #24]
+1869:Src/main.c    ****   {
+ 10259              		.loc 1 1869 3 is_stmt 1 view .LVU3218
+1869:Src/main.c    ****   {
+ 10260              		.loc 1 1869 7 is_stmt 0 view .LVU3219
+ 10261 003a FFF7FEFF 		bl	HAL_TIM_Base_Init
+ 10262              	.LVL927:
+1869:Src/main.c    ****   {
+ 10263              		.loc 1 1869 6 discriminator 1 view .LVU3220
+ 10264 003e 0028     		cmp	r0, #0
+ 10265 0040 32D1     		bne	.L568
+1873:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ 10266              		.loc 1 1873 3 is_stmt 1 view .LVU3221
+1873:Src/main.c    ****   if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ 10267              		.loc 1 1873 34 is_stmt 0 view .LVU3222
+ 10268 0042 4FF48053 		mov	r3, #4096
+ 10269 0046 1293     		str	r3, [sp, #72]
+1874:Src/main.c    ****   {
+ 10270              		.loc 1 1874 3 is_stmt 1 view .LVU3223
+1874:Src/main.c    ****   {
+ 10271              		.loc 1 1874 7 is_stmt 0 view .LVU3224
+ 10272 0048 12A9     		add	r1, sp, #72
+ 10273 004a 1C48     		ldr	r0, .L573
+ 10274 004c FFF7FEFF 		bl	HAL_TIM_ConfigClockSource
+ 10275              	.LVL928:
+1874:Src/main.c    ****   {
+ 10276              		.loc 1 1874 6 discriminator 1 view .LVU3225
+ 10277 0050 0028     		cmp	r0, #0
+ 10278 0052 2BD1     		bne	.L569
+1878:Src/main.c    ****   {
+ 10279              		.loc 1 1878 3 is_stmt 1 view .LVU3226
+1878:Src/main.c    ****   {
+ 10280              		.loc 1 1878 7 is_stmt 0 view .LVU3227
+ 10281 0054 1948     		ldr	r0, .L573
+ 10282 0056 FFF7FEFF 		bl	HAL_TIM_PWM_Init
+ 10283              	.LVL929:
+1878:Src/main.c    ****   {
+ 10284              		.loc 1 1878 6 discriminator 1 view .LVU3228
+ 10285 005a 48BB     		cbnz	r0, .L570
+1882:Src/main.c    ****   sConfigOC.Pulse = 4;
+ARM GAS  /tmp/ccEQxcUB.s 			page 585
+
+
+ 10286              		.loc 1 1882 3 is_stmt 1 view .LVU3229
+1882:Src/main.c    ****   sConfigOC.Pulse = 4;
+ 10287              		.loc 1 1882 20 is_stmt 0 view .LVU3230
+ 10288 005c 6023     		movs	r3, #96
+ 10289 005e 0B93     		str	r3, [sp, #44]
+1883:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 10290              		.loc 1 1883 3 is_stmt 1 view .LVU3231
+1883:Src/main.c    ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 10291              		.loc 1 1883 19 is_stmt 0 view .LVU3232
+ 10292 0060 0423     		movs	r3, #4
+ 10293 0062 0C93     		str	r3, [sp, #48]
+1884:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 10294              		.loc 1 1884 3 is_stmt 1 view .LVU3233
+1884:Src/main.c    ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 10295              		.loc 1 1884 24 is_stmt 0 view .LVU3234
+ 10296 0064 0022     		movs	r2, #0
+ 10297 0066 0D92     		str	r2, [sp, #52]
+1885:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 10298              		.loc 1 1885 3 is_stmt 1 view .LVU3235
+1885:Src/main.c    ****   if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 10299              		.loc 1 1885 24 is_stmt 0 view .LVU3236
+ 10300 0068 0F92     		str	r2, [sp, #60]
+1886:Src/main.c    ****   {
+ 10301              		.loc 1 1886 3 is_stmt 1 view .LVU3237
+1886:Src/main.c    ****   {
+ 10302              		.loc 1 1886 7 is_stmt 0 view .LVU3238
+ 10303 006a 0BA9     		add	r1, sp, #44
+ 10304 006c 1348     		ldr	r0, .L573
+ 10305 006e FFF7FEFF 		bl	HAL_TIM_PWM_ConfigChannel
+ 10306              	.LVL930:
+1886:Src/main.c    ****   {
+ 10307              		.loc 1 1886 6 discriminator 1 view .LVU3239
+ 10308 0072 F8B9     		cbnz	r0, .L571
+1890:Src/main.c    ****   sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+ 10309              		.loc 1 1890 3 is_stmt 1 view .LVU3240
+1890:Src/main.c    ****   sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+ 10310              		.loc 1 1890 40 is_stmt 0 view .LVU3241
+ 10311 0074 0023     		movs	r3, #0
+ 10312 0076 0093     		str	r3, [sp]
+1891:Src/main.c    ****   sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+ 10313              		.loc 1 1891 3 is_stmt 1 view .LVU3242
+1891:Src/main.c    ****   sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+ 10314              		.loc 1 1891 41 is_stmt 0 view .LVU3243
+ 10315 0078 0193     		str	r3, [sp, #4]
+1892:Src/main.c    ****   sBreakDeadTimeConfig.DeadTime = 0;
+ 10316              		.loc 1 1892 3 is_stmt 1 view .LVU3244
+1892:Src/main.c    ****   sBreakDeadTimeConfig.DeadTime = 0;
+ 10317              		.loc 1 1892 34 is_stmt 0 view .LVU3245
+ 10318 007a 0293     		str	r3, [sp, #8]
+1893:Src/main.c    ****   sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+ 10319              		.loc 1 1893 3 is_stmt 1 view .LVU3246
+1893:Src/main.c    ****   sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+ 10320              		.loc 1 1893 33 is_stmt 0 view .LVU3247
+ 10321 007c 0393     		str	r3, [sp, #12]
+1894:Src/main.c    ****   sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+ 10322              		.loc 1 1894 3 is_stmt 1 view .LVU3248
+1894:Src/main.c    ****   sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+ARM GAS  /tmp/ccEQxcUB.s 			page 586
+
+
+ 10323              		.loc 1 1894 35 is_stmt 0 view .LVU3249
+ 10324 007e 0493     		str	r3, [sp, #16]
+1895:Src/main.c    ****   sBreakDeadTimeConfig.BreakFilter = 0;
+ 10325              		.loc 1 1895 3 is_stmt 1 view .LVU3250
+1895:Src/main.c    ****   sBreakDeadTimeConfig.BreakFilter = 0;
+ 10326              		.loc 1 1895 38 is_stmt 0 view .LVU3251
+ 10327 0080 4FF40052 		mov	r2, #8192
+ 10328 0084 0592     		str	r2, [sp, #20]
+1896:Src/main.c    ****   sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+ 10329              		.loc 1 1896 3 is_stmt 1 view .LVU3252
+1896:Src/main.c    ****   sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+ 10330              		.loc 1 1896 36 is_stmt 0 view .LVU3253
+ 10331 0086 0693     		str	r3, [sp, #24]
+1897:Src/main.c    ****   sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+ 10332              		.loc 1 1897 3 is_stmt 1 view .LVU3254
+1897:Src/main.c    ****   sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+ 10333              		.loc 1 1897 36 is_stmt 0 view .LVU3255
+ 10334 0088 0793     		str	r3, [sp, #28]
+1898:Src/main.c    ****   sBreakDeadTimeConfig.Break2Filter = 0;
+ 10335              		.loc 1 1898 3 is_stmt 1 view .LVU3256
+1898:Src/main.c    ****   sBreakDeadTimeConfig.Break2Filter = 0;
+ 10336              		.loc 1 1898 39 is_stmt 0 view .LVU3257
+ 10337 008a 4FF00072 		mov	r2, #33554432
+ 10338 008e 0892     		str	r2, [sp, #32]
+1899:Src/main.c    ****   sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+ 10339              		.loc 1 1899 3 is_stmt 1 view .LVU3258
+1899:Src/main.c    ****   sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+ 10340              		.loc 1 1899 37 is_stmt 0 view .LVU3259
+ 10341 0090 0993     		str	r3, [sp, #36]
+1900:Src/main.c    ****   if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+ 10342              		.loc 1 1900 3 is_stmt 1 view .LVU3260
+1900:Src/main.c    ****   if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+ 10343              		.loc 1 1900 40 is_stmt 0 view .LVU3261
+ 10344 0092 0A93     		str	r3, [sp, #40]
+1901:Src/main.c    ****   {
+ 10345              		.loc 1 1901 3 is_stmt 1 view .LVU3262
+1901:Src/main.c    ****   {
+ 10346              		.loc 1 1901 7 is_stmt 0 view .LVU3263
+ 10347 0094 6946     		mov	r1, sp
+ 10348 0096 0948     		ldr	r0, .L573
+ 10349 0098 FFF7FEFF 		bl	HAL_TIMEx_ConfigBreakDeadTime
+ 10350              	.LVL931:
+1901:Src/main.c    ****   {
+ 10351              		.loc 1 1901 6 discriminator 1 view .LVU3264
+ 10352 009c 60B9     		cbnz	r0, .L572
+1908:Src/main.c    **** 
+ 10353              		.loc 1 1908 3 is_stmt 1 view .LVU3265
+ 10354 009e 0748     		ldr	r0, .L573
+ 10355 00a0 FFF7FEFF 		bl	HAL_TIM_MspPostInit
+ 10356              	.LVL932:
+1910:Src/main.c    **** 
+ 10357              		.loc 1 1910 1 is_stmt 0 view .LVU3266
+ 10358 00a4 16B0     		add	sp, sp, #88
+ 10359              	.LCFI104:
+ 10360              		.cfi_remember_state
+ 10361              		.cfi_def_cfa_offset 8
+ 10362              		@ sp needed
+ARM GAS  /tmp/ccEQxcUB.s 			page 587
+
+
+ 10363 00a6 10BD     		pop	{r4, pc}
+ 10364              	.L568:
+ 10365              	.LCFI105:
+ 10366              		.cfi_restore_state
+1871:Src/main.c    ****   }
+ 10367              		.loc 1 1871 5 is_stmt 1 view .LVU3267
+ 10368 00a8 FFF7FEFF 		bl	Error_Handler
+ 10369              	.LVL933:
+ 10370              	.L569:
+1876:Src/main.c    ****   }
+ 10371              		.loc 1 1876 5 view .LVU3268
+ 10372 00ac FFF7FEFF 		bl	Error_Handler
+ 10373              	.LVL934:
+ 10374              	.L570:
+1880:Src/main.c    ****   }
+ 10375              		.loc 1 1880 5 view .LVU3269
+ 10376 00b0 FFF7FEFF 		bl	Error_Handler
+ 10377              	.LVL935:
+ 10378              	.L571:
+1888:Src/main.c    ****   }
+ 10379              		.loc 1 1888 5 view .LVU3270
+ 10380 00b4 FFF7FEFF 		bl	Error_Handler
+ 10381              	.LVL936:
+ 10382              	.L572:
+1903:Src/main.c    ****   }
+ 10383              		.loc 1 1903 5 view .LVU3271
+ 10384 00b8 FFF7FEFF 		bl	Error_Handler
+ 10385              	.LVL937:
+ 10386              	.L574:
+ 10387              		.align	2
+ 10388              	.L573:
+ 10389 00bc 00000000 		.word	htim1
+ 10390 00c0 00000140 		.word	1073807360
+ 10391              		.cfi_endproc
+ 10392              	.LFE1203:
+ 10394              		.section	.text.SystemClock_Config,"ax",%progbits
+ 10395              		.align	1
+ 10396              		.global	SystemClock_Config
+ 10397              		.syntax unified
+ 10398              		.thumb
+ 10399              		.thumb_func
+ 10401              	SystemClock_Config:
+ 10402              	.LFB1187:
+1031:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 10403              		.loc 1 1031 1 view -0
+ 10404              		.cfi_startproc
+ 10405              		@ args = 0, pretend = 0, frame = 80
+ 10406              		@ frame_needed = 0, uses_anonymous_args = 0
+ 10407 0000 00B5     		push	{lr}
+ 10408              	.LCFI106:
+ 10409              		.cfi_def_cfa_offset 4
+ 10410              		.cfi_offset 14, -4
+ 10411 0002 95B0     		sub	sp, sp, #84
+ 10412              	.LCFI107:
+ 10413              		.cfi_def_cfa_offset 88
+1032:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 10414              		.loc 1 1032 3 view .LVU3273
+ARM GAS  /tmp/ccEQxcUB.s 			page 588
+
+
+1032:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 10415              		.loc 1 1032 22 is_stmt 0 view .LVU3274
+ 10416 0004 3422     		movs	r2, #52
+ 10417 0006 0021     		movs	r1, #0
+ 10418 0008 07A8     		add	r0, sp, #28
+ 10419 000a FFF7FEFF 		bl	memset
+ 10420              	.LVL938:
+1033:Src/main.c    **** 
+ 10421              		.loc 1 1033 3 is_stmt 1 view .LVU3275
+1033:Src/main.c    **** 
+ 10422              		.loc 1 1033 22 is_stmt 0 view .LVU3276
+ 10423 000e 0023     		movs	r3, #0
+ 10424 0010 0293     		str	r3, [sp, #8]
+ 10425 0012 0393     		str	r3, [sp, #12]
+ 10426 0014 0493     		str	r3, [sp, #16]
+ 10427 0016 0593     		str	r3, [sp, #20]
+ 10428 0018 0693     		str	r3, [sp, #24]
+1037:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 10429              		.loc 1 1037 3 is_stmt 1 view .LVU3277
+ 10430              	.LBB671:
+1037:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 10431              		.loc 1 1037 3 view .LVU3278
+1037:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 10432              		.loc 1 1037 3 view .LVU3279
+ 10433 001a 244B     		ldr	r3, .L583
+ 10434 001c 1A6C     		ldr	r2, [r3, #64]
+ 10435 001e 42F08052 		orr	r2, r2, #268435456
+ 10436 0022 1A64     		str	r2, [r3, #64]
+1037:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 10437              		.loc 1 1037 3 view .LVU3280
+ 10438 0024 1B6C     		ldr	r3, [r3, #64]
+ 10439 0026 03F08053 		and	r3, r3, #268435456
+ 10440 002a 0093     		str	r3, [sp]
+1037:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 10441              		.loc 1 1037 3 view .LVU3281
+ 10442 002c 009B     		ldr	r3, [sp]
+ 10443              	.LBE671:
+1037:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 10444              		.loc 1 1037 3 view .LVU3282
+1038:Src/main.c    **** 
+ 10445              		.loc 1 1038 3 view .LVU3283
+ 10446              	.LBB672:
+1038:Src/main.c    **** 
+ 10447              		.loc 1 1038 3 view .LVU3284
+1038:Src/main.c    **** 
+ 10448              		.loc 1 1038 3 view .LVU3285
+ 10449 002e 204B     		ldr	r3, .L583+4
+ 10450 0030 1A68     		ldr	r2, [r3]
+ 10451 0032 42F44042 		orr	r2, r2, #49152
+ 10452 0036 1A60     		str	r2, [r3]
+1038:Src/main.c    **** 
+ 10453              		.loc 1 1038 3 view .LVU3286
+ 10454 0038 1B68     		ldr	r3, [r3]
+ 10455 003a 03F44043 		and	r3, r3, #49152
+ 10456 003e 0193     		str	r3, [sp, #4]
+1038:Src/main.c    **** 
+ 10457              		.loc 1 1038 3 view .LVU3287
+ARM GAS  /tmp/ccEQxcUB.s 			page 589
+
+
+ 10458 0040 019B     		ldr	r3, [sp, #4]
+ 10459              	.LBE672:
+1038:Src/main.c    **** 
+ 10460              		.loc 1 1038 3 view .LVU3288
+1043:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 10461              		.loc 1 1043 3 view .LVU3289
+1043:Src/main.c    ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 10462              		.loc 1 1043 36 is_stmt 0 view .LVU3290
+ 10463 0042 0123     		movs	r3, #1
+ 10464 0044 0793     		str	r3, [sp, #28]
+1044:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 10465              		.loc 1 1044 3 is_stmt 1 view .LVU3291
+1044:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 10466              		.loc 1 1044 30 is_stmt 0 view .LVU3292
+ 10467 0046 4FF48033 		mov	r3, #65536
+ 10468 004a 0893     		str	r3, [sp, #32]
+1045:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 10469              		.loc 1 1045 3 is_stmt 1 view .LVU3293
+1045:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 10470              		.loc 1 1045 34 is_stmt 0 view .LVU3294
+ 10471 004c 0223     		movs	r3, #2
+ 10472 004e 0D93     		str	r3, [sp, #52]
+1046:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = 25;
+ 10473              		.loc 1 1046 3 is_stmt 1 view .LVU3295
+1046:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = 25;
+ 10474              		.loc 1 1046 35 is_stmt 0 view .LVU3296
+ 10475 0050 4FF48002 		mov	r2, #4194304
+ 10476 0054 0E92     		str	r2, [sp, #56]
+1047:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 368;
+ 10477              		.loc 1 1047 3 is_stmt 1 view .LVU3297
+1047:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 368;
+ 10478              		.loc 1 1047 30 is_stmt 0 view .LVU3298
+ 10479 0056 1922     		movs	r2, #25
+ 10480 0058 0F92     		str	r2, [sp, #60]
+1048:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 10481              		.loc 1 1048 3 is_stmt 1 view .LVU3299
+1048:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 10482              		.loc 1 1048 30 is_stmt 0 view .LVU3300
+ 10483 005a 4FF4B872 		mov	r2, #368
+ 10484 005e 1092     		str	r2, [sp, #64]
+1049:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = 8;
+ 10485              		.loc 1 1049 3 is_stmt 1 view .LVU3301
+1049:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = 8;
+ 10486              		.loc 1 1049 30 is_stmt 0 view .LVU3302
+ 10487 0060 1193     		str	r3, [sp, #68]
+1050:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = 2;
+ 10488              		.loc 1 1050 3 is_stmt 1 view .LVU3303
+1050:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLR = 2;
+ 10489              		.loc 1 1050 30 is_stmt 0 view .LVU3304
+ 10490 0062 0822     		movs	r2, #8
+ 10491 0064 1292     		str	r2, [sp, #72]
+1051:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 10492              		.loc 1 1051 3 is_stmt 1 view .LVU3305
+1051:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 10493              		.loc 1 1051 30 is_stmt 0 view .LVU3306
+ 10494 0066 1393     		str	r3, [sp, #76]
+1052:Src/main.c    ****   {
+ARM GAS  /tmp/ccEQxcUB.s 			page 590
+
+
+ 10495              		.loc 1 1052 3 is_stmt 1 view .LVU3307
+1052:Src/main.c    ****   {
+ 10496              		.loc 1 1052 7 is_stmt 0 view .LVU3308
+ 10497 0068 07A8     		add	r0, sp, #28
+ 10498 006a FFF7FEFF 		bl	HAL_RCC_OscConfig
+ 10499              	.LVL939:
+1052:Src/main.c    ****   {
+ 10500              		.loc 1 1052 6 discriminator 1 view .LVU3309
+ 10501 006e B0B9     		cbnz	r0, .L580
+1059:Src/main.c    ****   {
+ 10502              		.loc 1 1059 3 is_stmt 1 view .LVU3310
+1059:Src/main.c    ****   {
+ 10503              		.loc 1 1059 7 is_stmt 0 view .LVU3311
+ 10504 0070 FFF7FEFF 		bl	HAL_PWREx_EnableOverDrive
+ 10505              	.LVL940:
+1059:Src/main.c    ****   {
+ 10506              		.loc 1 1059 6 discriminator 1 view .LVU3312
+ 10507 0074 A8B9     		cbnz	r0, .L581
+1066:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ 10508              		.loc 1 1066 3 is_stmt 1 view .LVU3313
+1066:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ 10509              		.loc 1 1066 31 is_stmt 0 view .LVU3314
+ 10510 0076 0F23     		movs	r3, #15
+ 10511 0078 0293     		str	r3, [sp, #8]
+1068:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 10512              		.loc 1 1068 3 is_stmt 1 view .LVU3315
+1068:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 10513              		.loc 1 1068 34 is_stmt 0 view .LVU3316
+ 10514 007a 0223     		movs	r3, #2
+ 10515 007c 0393     		str	r3, [sp, #12]
+1069:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ 10516              		.loc 1 1069 3 is_stmt 1 view .LVU3317
+1069:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ 10517              		.loc 1 1069 35 is_stmt 0 view .LVU3318
+ 10518 007e 0023     		movs	r3, #0
+ 10519 0080 0493     		str	r3, [sp, #16]
+1070:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ 10520              		.loc 1 1070 3 is_stmt 1 view .LVU3319
+1070:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ 10521              		.loc 1 1070 36 is_stmt 0 view .LVU3320
+ 10522 0082 4FF4A053 		mov	r3, #5120
+ 10523 0086 0593     		str	r3, [sp, #20]
+1071:Src/main.c    **** 
+ 10524              		.loc 1 1071 3 is_stmt 1 view .LVU3321
+1071:Src/main.c    **** 
+ 10525              		.loc 1 1071 36 is_stmt 0 view .LVU3322
+ 10526 0088 4FF48053 		mov	r3, #4096
+ 10527 008c 0693     		str	r3, [sp, #24]
+1073:Src/main.c    ****   {
+ 10528              		.loc 1 1073 3 is_stmt 1 view .LVU3323
+1073:Src/main.c    ****   {
+ 10529              		.loc 1 1073 7 is_stmt 0 view .LVU3324
+ 10530 008e 0621     		movs	r1, #6
+ 10531 0090 02A8     		add	r0, sp, #8
+ 10532 0092 FFF7FEFF 		bl	HAL_RCC_ClockConfig
+ 10533              	.LVL941:
+1073:Src/main.c    ****   {
+ARM GAS  /tmp/ccEQxcUB.s 			page 591
+
+
+ 10534              		.loc 1 1073 6 discriminator 1 view .LVU3325
+ 10535 0096 30B9     		cbnz	r0, .L582
+1077:Src/main.c    **** 
+ 10536              		.loc 1 1077 1 view .LVU3326
+ 10537 0098 15B0     		add	sp, sp, #84
+ 10538              	.LCFI108:
+ 10539              		.cfi_remember_state
+ 10540              		.cfi_def_cfa_offset 4
+ 10541              		@ sp needed
+ 10542 009a 5DF804FB 		ldr	pc, [sp], #4
+ 10543              	.L580:
+ 10544              	.LCFI109:
+ 10545              		.cfi_restore_state
+1054:Src/main.c    ****   }
+ 10546              		.loc 1 1054 5 is_stmt 1 view .LVU3327
+ 10547 009e FFF7FEFF 		bl	Error_Handler
+ 10548              	.LVL942:
+ 10549              	.L581:
+1061:Src/main.c    ****   }
+ 10550              		.loc 1 1061 5 view .LVU3328
+ 10551 00a2 FFF7FEFF 		bl	Error_Handler
+ 10552              	.LVL943:
+ 10553              	.L582:
+1075:Src/main.c    ****   }
+ 10554              		.loc 1 1075 5 view .LVU3329
+ 10555 00a6 FFF7FEFF 		bl	Error_Handler
+ 10556              	.LVL944:
+ 10557              	.L584:
+ 10558 00aa 00BF     		.align	2
+ 10559              	.L583:
+ 10560 00ac 00380240 		.word	1073887232
+ 10561 00b0 00700040 		.word	1073770496
+ 10562              		.cfi_endproc
+ 10563              	.LFE1187:
+ 10565              		.section	.text.main,"ax",%progbits
+ 10566              		.align	1
+ 10567              		.global	main
+ 10568              		.syntax unified
+ 10569              		.thumb
+ 10570              		.thumb_func
+ 10572              	main:
+ 10573              	.LFB1186:
+ 250:Src/main.c    **** 
+ 10574              		.loc 1 250 1 view -0
+ 10575              		.cfi_startproc
+ 10576              		@ args = 0, pretend = 0, frame = 8
+ 10577              		@ frame_needed = 0, uses_anonymous_args = 0
+ 10578 0000 2DE9F043 		push	{r4, r5, r6, r7, r8, r9, lr}
+ 10579              	.LCFI110:
+ 10580              		.cfi_def_cfa_offset 28
+ 10581              		.cfi_offset 4, -28
+ 10582              		.cfi_offset 5, -24
+ 10583              		.cfi_offset 6, -20
+ 10584              		.cfi_offset 7, -16
+ 10585              		.cfi_offset 8, -12
+ 10586              		.cfi_offset 9, -8
+ 10587              		.cfi_offset 14, -4
+ARM GAS  /tmp/ccEQxcUB.s 			page 592
+
+
+ 10588 0004 85B0     		sub	sp, sp, #20
+ 10589              	.LCFI111:
+ 10590              		.cfi_def_cfa_offset 48
+ 253:Src/main.c    ****   /* USER CODE END 1 */
+ 10591              		.loc 1 253 2 view .LVU3331
+ 259:Src/main.c    **** 
+ 10592              		.loc 1 259 3 view .LVU3332
+ 10593 0006 FFF7FEFF 		bl	HAL_Init
+ 10594              	.LVL945:
+ 266:Src/main.c    **** 
+ 10595              		.loc 1 266 3 view .LVU3333
+ 10596 000a FFF7FEFF 		bl	SystemClock_Config
+ 10597              	.LVL946:
+ 273:Src/main.c    ****   MX_DMA_Init();
+ 10598              		.loc 1 273 3 view .LVU3334
+ 10599 000e FFF7FEFF 		bl	MX_GPIO_Init
+ 10600              	.LVL947:
+ 274:Src/main.c    ****   MX_SPI4_Init();
+ 10601              		.loc 1 274 3 view .LVU3335
+ 10602 0012 FFF7FEFF 		bl	MX_DMA_Init
+ 10603              	.LVL948:
+ 275:Src/main.c    ****   MX_FATFS_Init();
+ 10604              		.loc 1 275 3 view .LVU3336
+ 10605 0016 FFF7FEFF 		bl	MX_SPI4_Init
+ 10606              	.LVL949:
+ 276:Src/main.c    ****   MX_TIM2_Init();
+ 10607              		.loc 1 276 3 view .LVU3337
+ 10608 001a FFF7FEFF 		bl	MX_FATFS_Init
+ 10609              	.LVL950:
+ 277:Src/main.c    ****   MX_TIM5_Init();
+ 10610              		.loc 1 277 3 view .LVU3338
+ 10611 001e FFF7FEFF 		bl	MX_TIM2_Init
+ 10612              	.LVL951:
+ 278:Src/main.c    ****   MX_ADC1_Init();
+ 10613              		.loc 1 278 3 view .LVU3339
+ 10614 0022 FFF7FEFF 		bl	MX_TIM5_Init
+ 10615              	.LVL952:
+ 279:Src/main.c    ****   MX_ADC3_Init();
+ 10616              		.loc 1 279 3 view .LVU3340
+ 10617 0026 FFF7FEFF 		bl	MX_ADC1_Init
+ 10618              	.LVL953:
+ 280:Src/main.c    ****   MX_SPI2_Init();
+ 10619              		.loc 1 280 3 view .LVU3341
+ 10620 002a FFF7FEFF 		bl	MX_ADC3_Init
+ 10621              	.LVL954:
+ 281:Src/main.c    ****   MX_SPI5_Init();
+ 10622              		.loc 1 281 3 view .LVU3342
+ 10623 002e FFF7FEFF 		bl	MX_SPI2_Init
+ 10624              	.LVL955:
+ 282:Src/main.c    ****   MX_SPI6_Init();
+ 10625              		.loc 1 282 3 view .LVU3343
+ 10626 0032 FFF7FEFF 		bl	MX_SPI5_Init
+ 10627              	.LVL956:
+ 283:Src/main.c    ****   MX_USART1_UART_Init();
+ 10628              		.loc 1 283 3 view .LVU3344
+ 10629 0036 FFF7FEFF 		bl	MX_SPI6_Init
+ 10630              	.LVL957:
+ARM GAS  /tmp/ccEQxcUB.s 			page 593
+
+
+ 284:Src/main.c    ****   MX_SDMMC1_SD_Init();
+ 10631              		.loc 1 284 3 view .LVU3345
+ 10632 003a FFF7FEFF 		bl	MX_USART1_UART_Init
+ 10633              	.LVL958:
+ 285:Src/main.c    ****   MX_TIM7_Init();
+ 10634              		.loc 1 285 3 view .LVU3346
+ 10635 003e FFF7FEFF 		bl	MX_SDMMC1_SD_Init
+ 10636              	.LVL959:
+ 286:Src/main.c    ****   MX_TIM6_Init();
+ 10637              		.loc 1 286 3 view .LVU3347
+ 10638 0042 FFF7FEFF 		bl	MX_TIM7_Init
+ 10639              	.LVL960:
+ 287:Src/main.c    ****   MX_TIM10_Init();
+ 10640              		.loc 1 287 3 view .LVU3348
+ 10641 0046 FFF7FEFF 		bl	MX_TIM6_Init
+ 10642              	.LVL961:
+ 288:Src/main.c    ****   MX_UART8_Init();
+ 10643              		.loc 1 288 3 view .LVU3349
+ 10644 004a FFF7FEFF 		bl	MX_TIM10_Init
+ 10645              	.LVL962:
+ 289:Src/main.c    ****   MX_TIM8_Init();
+ 10646              		.loc 1 289 3 view .LVU3350
+ 10647 004e FFF7FEFF 		bl	MX_UART8_Init
+ 10648              	.LVL963:
+ 290:Src/main.c    ****   MX_TIM11_Init();
+ 10649              		.loc 1 290 3 view .LVU3351
+ 10650 0052 FFF7FEFF 		bl	MX_TIM8_Init
+ 10651              	.LVL964:
+ 291:Src/main.c    ****   MX_TIM4_Init();
+ 10652              		.loc 1 291 3 view .LVU3352
+ 10653 0056 FFF7FEFF 		bl	MX_TIM11_Init
+ 10654              	.LVL965:
+ 292:Src/main.c    ****   MX_TIM1_Init();
+ 10655              		.loc 1 292 3 view .LVU3353
+ 10656 005a FFF7FEFF 		bl	MX_TIM4_Init
+ 10657              	.LVL966:
+ 293:Src/main.c    ****   /* USER CODE BEGIN 2 */
+ 10658              		.loc 1 293 3 view .LVU3354
+ 10659 005e FFF7FEFF 		bl	MX_TIM1_Init
+ 10660              	.LVL967:
+ 295:Src/main.c    **** 	//HAL_TIM_Base_Start(&htim11);
+ 10661              		.loc 1 295 2 view .LVU3355
+ 10662 0062 FFF7FEFF 		bl	Init_params
+ 10663              	.LVL968:
+ 306:Src/main.c    **** 
+ 10664              		.loc 1 306 2 view .LVU3356
+ 306:Src/main.c    **** 
+ 10665              		.loc 1 306 14 is_stmt 0 view .LVU3357
+ 10666 0066 894A     		ldr	r2, .L679
+ 10667 0068 3523     		movs	r3, #53
+ 10668 006a D362     		str	r3, [r2, #44]
+ 308:Src/main.c    **** 
+ 10669              		.loc 1 308 2 is_stmt 1 view .LVU3358
+ 308:Src/main.c    **** 
+ 10670              		.loc 1 308 23 is_stmt 0 view .LVU3359
+ 10671 006c D36A     		ldr	r3, [r2, #44]
+ 308:Src/main.c    **** 
+ARM GAS  /tmp/ccEQxcUB.s 			page 594
+
+
+ 10672              		.loc 1 308 30 view .LVU3360
+ 10673 006e 0133     		adds	r3, r3, #1
+ 308:Src/main.c    **** 
+ 10674              		.loc 1 308 33 view .LVU3361
+ 10675 0070 5B08     		lsrs	r3, r3, #1
+ 308:Src/main.c    **** 
+ 10676              		.loc 1 308 36 view .LVU3362
+ 10677 0072 013B     		subs	r3, r3, #1
+ 308:Src/main.c    **** 
+ 10678              		.loc 1 308 15 view .LVU3363
+ 10679 0074 D363     		str	r3, [r2, #60]
+ 313:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+ 10680              		.loc 1 313 2 is_stmt 1 view .LVU3364
+ 313:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+ 10681              		.loc 1 313 23 is_stmt 0 view .LVU3365
+ 10682 0076 D36A     		ldr	r3, [r2, #44]
+ 313:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+ 10683              		.loc 1 313 36 view .LVU3366
+ 10684 0078 9B00     		lsls	r3, r3, #2
+ 10685 007a 0333     		adds	r3, r3, #3
+ 313:Src/main.c    **** 	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+ 10686              		.loc 1 313 15 view .LVU3367
+ 10687 007c 02F5A032 		add	r2, r2, #81920
+ 10688 0080 D362     		str	r3, [r2, #44]
+ 314:Src/main.c    **** 
+ 10689              		.loc 1 314 2 is_stmt 1 view .LVU3368
+ 314:Src/main.c    **** 
+ 10690              		.loc 1 314 25 is_stmt 0 view .LVU3369
+ 10691 0082 D36A     		ldr	r3, [r2, #44]
+ 314:Src/main.c    **** 
+ 10692              		.loc 1 314 32 view .LVU3370
+ 10693 0084 0133     		adds	r3, r3, #1
+ 314:Src/main.c    **** 
+ 10694              		.loc 1 314 35 view .LVU3371
+ 10695 0086 5B08     		lsrs	r3, r3, #1
+ 314:Src/main.c    **** 
+ 10696              		.loc 1 314 38 view .LVU3372
+ 10697 0088 013B     		subs	r3, r3, #1
+ 314:Src/main.c    **** 
+ 10698              		.loc 1 314 16 view .LVU3373
+ 10699 008a 5363     		str	r3, [r2, #52]
+ 318:Src/main.c    **** 
+ 10700              		.loc 1 318 2 is_stmt 1 view .LVU3374
+ 10701 008c 0021     		movs	r1, #0
+ 10702 008e 8048     		ldr	r0, .L679+4
+ 10703 0090 FFF7FEFF 		bl	HAL_TIM_PWM_Start
+ 10704              	.LVL969:
+ 10705 0094 4CE0     		b	.L586
+ 10706              	.L668:
+ 332:Src/main.c    **** 		{
+ 10707              		.loc 1 332 85 is_stmt 0 discriminator 1 view .LVU3375
+ 10708 0096 7F4B     		ldr	r3, .L679+8
+ 10709 0098 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ 332:Src/main.c    **** 		{
+ 10710              		.loc 1 332 73 discriminator 1 view .LVU3376
+ 10711 009a 002B     		cmp	r3, #0
+ 10712 009c 4FD1     		bne	.L587
+ARM GAS  /tmp/ccEQxcUB.s 			page 595
+
+
+ 10713              	.L588:
+ 10714              	.LBB673:
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10715              		.loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3377
+ 10716              	.LBB674:
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10717              		.loc 7 3073 3 discriminator 1 view .LVU3378
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10718              		.loc 7 3073 3 discriminator 1 view .LVU3379
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10719              		.loc 7 3073 3 discriminator 1 view .LVU3380
+ 10720              	.LVL970:
+ 10721              	.LBB675:
+ 10722              	.LBI675:
+1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 10723              		.loc 8 1068 31 view .LVU3381
+ 10724              	.LBB676:
+1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 10725              		.loc 8 1070 5 view .LVU3382
+1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
+ 10726              		.loc 8 1072 4 view .LVU3383
+ 10727 009e 7E4A     		ldr	r2, .L679+12
+ 10728              		.syntax unified
+ 10729              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 10730 00a0 52E8003F 		ldrex r3, [r2]
+ 10731              	@ 0 "" 2
+ 10732              	.LVL971:
+1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 10733              		.loc 8 1073 4 view .LVU3384
+1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 10734              		.loc 8 1073 4 is_stmt 0 view .LVU3385
+ 10735              		.thumb
+ 10736              		.syntax unified
+ 10737              	.LBE676:
+ 10738              	.LBE675:
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10739              		.loc 7 3073 3 discriminator 1 view .LVU3386
+ 10740 00a4 43F48073 		orr	r3, r3, #256
+ 10741              	.LVL972:
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10742              		.loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3387
+ 10743              	.LBB677:
+ 10744              	.LBI677:
 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 10037              		.loc 8 1119 31 view .LVU3186
- 10038              	.LBB653:
+ 10745              		.loc 8 1119 31 view .LVU3388
+ 10746              	.LBB678:
 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
-ARM GAS  /tmp/ccwR4KB7.s 			page 575
-
-
- 10039              		.loc 8 1121 4 view .LVU3187
+ 10747              		.loc 8 1121 4 view .LVU3389
 1123:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 10040              		.loc 8 1123 4 view .LVU3188
- 10041 00c4 0832     		adds	r2, r2, #8
- 10042              		.syntax unified
- 10043              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 10044 00c6 42E80031 		strex r1, r3, [r2]
- 10045              	@ 0 "" 2
- 10046              	.LVL892:
- 10047              		.loc 8 1124 4 view .LVU3189
- 10048              		.loc 8 1124 4 is_stmt 0 view .LVU3190
- 10049              		.thumb
- 10050              		.syntax unified
- 10051              	.LBE653:
- 10052              	.LBE652:
+ 10748              		.loc 8 1123 4 view .LVU3390
+ 10749              		.syntax unified
+ 10750              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 10751 00a8 42E80031 		strex r1, r3, [r2]
+ 10752              	@ 0 "" 2
+ 10753              	.LVL973:
+ 10754              		.loc 8 1124 4 view .LVU3391
+ 10755              		.loc 8 1124 4 is_stmt 0 view .LVU3392
+ARM GAS  /tmp/ccEQxcUB.s 			page 596
+
+
+ 10756              		.thumb
+ 10757              		.syntax unified
+ 10758              	.LBE678:
+ 10759              	.LBE677:
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10760              		.loc 7 3073 3 discriminator 1 view .LVU3393
+ 10761 00ac 0029     		cmp	r1, #0
+ 10762 00ae F6D1     		bne	.L588
+ 10763              	.LVL974:
+ 10764              	.L589:
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10765              		.loc 7 3073 3 discriminator 1 view .LVU3394
+ 10766              	.LBE674:
+ 10767              	.LBE673:
+ 10768              	.LBB679:
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10769              		.loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3395
+ 10770              	.LBB680:
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10771              		.loc 7 3040 3 discriminator 1 view .LVU3396
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10772              		.loc 7 3040 3 discriminator 1 view .LVU3397
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10773              		.loc 7 3040 3 discriminator 1 view .LVU3398
+ 10774              	.LBB681:
+ 10775              	.LBI681:
+1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 10776              		.loc 8 1068 31 view .LVU3399
+ 10777              	.LBB682:
+1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 10778              		.loc 8 1070 5 view .LVU3400
+1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
+ 10779              		.loc 8 1072 4 view .LVU3401
+ 10780 00b0 794A     		ldr	r2, .L679+12
+ 10781              		.syntax unified
+ 10782              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 10783 00b2 52E8003F 		ldrex r3, [r2]
+ 10784              	@ 0 "" 2
+ 10785              	.LVL975:
+1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 10786              		.loc 8 1073 4 view .LVU3402
+1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 10787              		.loc 8 1073 4 is_stmt 0 view .LVU3403
+ 10788              		.thumb
+ 10789              		.syntax unified
+ 10790              	.LBE682:
+ 10791              	.LBE681:
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10792              		.loc 7 3040 3 discriminator 1 view .LVU3404
+ 10793 00b6 43F02003 		orr	r3, r3, #32
+ 10794              	.LVL976:
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10795              		.loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3405
+ 10796              	.LBB683:
+ 10797              	.LBI683:
+1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 10798              		.loc 8 1119 31 view .LVU3406
+ARM GAS  /tmp/ccEQxcUB.s 			page 597
+
+
+ 10799              	.LBB684:
+1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 10800              		.loc 8 1121 4 view .LVU3407
+1123:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
+ 10801              		.loc 8 1123 4 view .LVU3408
+ 10802              		.syntax unified
+ 10803              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 10804 00ba 42E80031 		strex r1, r3, [r2]
+ 10805              	@ 0 "" 2
+ 10806              	.LVL977:
+ 10807              		.loc 8 1124 4 view .LVU3409
+ 10808              		.loc 8 1124 4 is_stmt 0 view .LVU3410
+ 10809              		.thumb
+ 10810              		.syntax unified
+ 10811              	.LBE684:
+ 10812              	.LBE683:
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10813              		.loc 7 3040 3 discriminator 1 view .LVU3411
+ 10814 00be 0029     		cmp	r1, #0
+ 10815 00c0 F6D1     		bne	.L589
+ 10816              	.LVL978:
+ 10817              	.L590:
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10818              		.loc 7 3040 3 discriminator 1 view .LVU3412
+ 10819              	.LBE680:
+ 10820              	.LBE679:
+ 10821              	.LBB685:
 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10053              		.loc 7 3136 3 discriminator 1 view .LVU3191
- 10054 00ca 0029     		cmp	r1, #0
- 10055 00cc F3D1     		bne	.L539
- 10056              	.LBE649:
+ 10822              		.loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3413
+ 10823              	.LBB686:
 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10057              		.loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3192
- 10058              	.LVL893:
+ 10824              		.loc 7 3136 3 discriminator 1 view .LVU3414
 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10059              		.loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3193
- 10060              	.LBE648:
- 319:Src/main.c    **** 			NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
- 10061              		.loc 1 319 4 is_stmt 1 view .LVU3194
- 10062              	.LBB654:
- 10063              	.LBI654:
+ 10825              		.loc 7 3136 3 discriminator 1 view .LVU3415
+3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10826              		.loc 7 3136 3 discriminator 1 view .LVU3416
+ 10827              	.LBB687:
+ 10828              	.LBI687:
+1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 10829              		.loc 8 1068 31 view .LVU3417
+ 10830              	.LBB688:
+1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 10831              		.loc 8 1070 5 view .LVU3418
+1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
+ 10832              		.loc 8 1072 4 view .LVU3419
+ 10833 00c2 754A     		ldr	r2, .L679+12
+ 10834 00c4 02F10803 		add	r3, r2, #8
+ 10835              		.syntax unified
+ 10836              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 10837 00c8 53E8003F 		ldrex r3, [r3]
+ 10838              	@ 0 "" 2
+ 10839              	.LVL979:
+1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 10840              		.loc 8 1073 4 view .LVU3420
+1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 10841              		.loc 8 1073 4 is_stmt 0 view .LVU3421
+ 10842              		.thumb
+ARM GAS  /tmp/ccEQxcUB.s 			page 598
+
+
+ 10843              		.syntax unified
+ 10844              	.LBE688:
+ 10845              	.LBE687:
+3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10846              		.loc 7 3136 3 discriminator 1 view .LVU3422
+ 10847 00cc 43F00103 		orr	r3, r3, #1
+ 10848              	.LVL980:
+3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10849              		.loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3423
+ 10850              	.LBB689:
+ 10851              	.LBI689:
+1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 10852              		.loc 8 1119 31 view .LVU3424
+ 10853              	.LBB690:
+1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 10854              		.loc 8 1121 4 view .LVU3425
+1123:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
+ 10855              		.loc 8 1123 4 view .LVU3426
+ 10856 00d0 0832     		adds	r2, r2, #8
+ 10857              		.syntax unified
+ 10858              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 10859 00d2 42E80031 		strex r1, r3, [r2]
+ 10860              	@ 0 "" 2
+ 10861              	.LVL981:
+ 10862              		.loc 8 1124 4 view .LVU3427
+ 10863              		.loc 8 1124 4 is_stmt 0 view .LVU3428
+ 10864              		.thumb
+ 10865              		.syntax unified
+ 10866              	.LBE690:
+ 10867              	.LBE689:
+3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10868              		.loc 7 3136 3 discriminator 1 view .LVU3429
+ 10869 00d6 0029     		cmp	r1, #0
+ 10870 00d8 F3D1     		bne	.L590
+ 10871              	.LBE686:
+3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10872              		.loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3430
+ 10873              	.LVL982:
+3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 10874              		.loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3431
+ 10875              	.LBE685:
+ 338:Src/main.c    **** 			NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
+ 10876              		.loc 1 338 4 is_stmt 1 view .LVU3432
+ 10877              	.LBB691:
+ 10878              	.LBI691:
 2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 10064              		.loc 2 2024 22 view .LVU3195
- 10065              	.LBB655:
+ 10879              		.loc 2 2024 22 view .LVU3433
+ 10880              	.LBB692:
 2026:Drivers/CMSIS/Include/core_cm7.h ****   {
- 10066              		.loc 2 2026 3 view .LVU3196
+ 10881              		.loc 2 2026 3 view .LVU3434
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 10067              		.loc 2 2028 5 view .LVU3197
+ 10882              		.loc 2 2028 5 view .LVU3435
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 10068              		.loc 2 2028 47 is_stmt 0 view .LVU3198
- 10069 00ce 6D4B     		ldr	r3, .L612+12
- 10070 00d0 0022     		movs	r2, #0
- 10071 00d2 83F82523 		strb	r2, [r3, #805]
- 10072              	.LVL894:
+ 10883              		.loc 2 2028 47 is_stmt 0 view .LVU3436
+ 10884 00da 704B     		ldr	r3, .L679+16
+ 10885 00dc 0022     		movs	r2, #0
+ 10886 00de 83F82523 		strb	r2, [r3, #805]
+ARM GAS  /tmp/ccEQxcUB.s 			page 599
+
+
+ 10887              	.LVL983:
 2028:Drivers/CMSIS/Include/core_cm7.h ****   }
- 10073              		.loc 2 2028 47 view .LVU3199
- 10074              	.LBE655:
- 10075              	.LBE654:
- 320:Src/main.c    **** 			u_rx_flg = 1;
- 10076              		.loc 1 320 4 is_stmt 1 view .LVU3200
- 10077              	.LBB656:
- 10078              	.LBI656:
+ 10888              		.loc 2 2028 47 view .LVU3437
+ 10889              	.LBE692:
+ 10890              	.LBE691:
+ 339:Src/main.c    **** 			u_rx_flg = 1;
+ 10891              		.loc 1 339 4 is_stmt 1 view .LVU3438
+ 10892              	.LBB693:
+ 10893              	.LBI693:
 1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 10079              		.loc 2 1896 22 view .LVU3201
- 10080              	.LBB657:
+ 10894              		.loc 2 1896 22 view .LVU3439
+ 10895              	.LBB694:
 1898:Drivers/CMSIS/Include/core_cm7.h ****   {
- 10081              		.loc 2 1898 3 view .LVU3202
+ 10896              		.loc 2 1898 3 view .LVU3440
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
-ARM GAS  /tmp/ccwR4KB7.s 			page 576
-
-
- 10082              		.loc 2 1900 5 view .LVU3203
+ 10897              		.loc 2 1900 5 view .LVU3441
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 10083              		.loc 2 1900 43 is_stmt 0 view .LVU3204
- 10084 00d6 2022     		movs	r2, #32
- 10085 00d8 5A60     		str	r2, [r3, #4]
- 10086              	.LVL895:
+ 10898              		.loc 2 1900 43 is_stmt 0 view .LVU3442
+ 10899 00e2 2022     		movs	r2, #32
+ 10900 00e4 5A60     		str	r2, [r3, #4]
+ 10901              	.LVL984:
 1900:Drivers/CMSIS/Include/core_cm7.h ****   }
- 10087              		.loc 2 1900 43 view .LVU3205
- 10088              	.LBE657:
- 10089              	.LBE656:
- 321:Src/main.c    **** 		}
- 10090              		.loc 1 321 4 is_stmt 1 view .LVU3206
- 321:Src/main.c    **** 		}
- 10091              		.loc 1 321 13 is_stmt 0 view .LVU3207
- 10092 00da 684B     		ldr	r3, .L612+4
- 10093 00dc 0122     		movs	r2, #1
- 10094 00de 1A70     		strb	r2, [r3]
- 10095 00e0 27E0     		b	.L536
- 10096              	.L552:
- 331:Src/main.c    **** 					task.current_param = task.min_param;
- 10097              		.loc 1 331 6 is_stmt 1 view .LVU3208
- 331:Src/main.c    **** 					task.current_param = task.min_param;
- 10098              		.loc 1 331 20 is_stmt 0 view .LVU3209
- 10099 00e2 694B     		ldr	r3, .L612+16
- 10100 00e4 0022     		movs	r2, #0
- 10101 00e6 1A70     		strb	r2, [r3]
- 332:Src/main.c    **** 					Stop_TIM10();
- 10102              		.loc 1 332 6 is_stmt 1 view .LVU3210
- 332:Src/main.c    **** 					Stop_TIM10();
- 10103              		.loc 1 332 31 is_stmt 0 view .LVU3211
- 10104 00e8 684B     		ldr	r3, .L612+20
- 10105 00ea 5A68     		ldr	r2, [r3, #4]	@ float
- 332:Src/main.c    **** 					Stop_TIM10();
- 10106              		.loc 1 332 25 view .LVU3212
- 10107 00ec 1A61     		str	r2, [r3, #16]	@ float
- 333:Src/main.c    **** 				break;
- 10108              		.loc 1 333 6 is_stmt 1 view .LVU3213
- 10109 00ee FFF7FEFF 		bl	Stop_TIM10
- 10110              	.LVL896:
- 334:Src/main.c    **** 				case DECODE_ENABLE://1 - Decode rec. message
- 10111              		.loc 1 334 5 view .LVU3214
- 10112              	.L540:
- 874:Src/main.c    **** 		{
- 10113              		.loc 1 874 3 view .LVU3215
- 10114 00f2 674B     		ldr	r3, .L612+24
- 10115 00f4 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 10116 00f6 022B     		cmp	r3, #2
- 10117 00f8 00F08184 		beq	.L587
- 10118 00fc 032B     		cmp	r3, #3
- 10119 00fe 00F0B484 		beq	.L598
- 10120 0102 012B     		cmp	r3, #1
- 10121 0104 09D1     		bne	.L589
- 877:Src/main.c    **** 				//HAL_UART_Transmit(&huart1, State_Data, 2, 10);
- 10122              		.loc 1 877 5 view .LVU3216
- 10123 0106 634C     		ldr	r4, .L612+28
- 10124 0108 0221     		movs	r1, #2
- 10125 010a 2046     		mov	r0, r4
-ARM GAS  /tmp/ccwR4KB7.s 			page 577
+ 10902              		.loc 2 1900 43 view .LVU3443
+ 10903              	.LBE694:
+ 10904              	.LBE693:
+ 340:Src/main.c    **** 		}
+ 10905              		.loc 1 340 4 is_stmt 1 view .LVU3444
+ 340:Src/main.c    **** 		}
+ 10906              		.loc 1 340 13 is_stmt 0 view .LVU3445
+ 10907 00e6 6B4B     		ldr	r3, .L679+8
+ 10908 00e8 0122     		movs	r2, #1
+ 10909 00ea 1A70     		strb	r2, [r3]
+ 10910 00ec 27E0     		b	.L587
+ 10911              	.L605:
+ 350:Src/main.c    **** 					task.current_param = task.min_param;
+ 10912              		.loc 1 350 6 is_stmt 1 view .LVU3446
+ 350:Src/main.c    **** 					task.current_param = task.min_param;
+ 10913              		.loc 1 350 20 is_stmt 0 view .LVU3447
+ 10914 00ee 6C4B     		ldr	r3, .L679+20
+ 10915 00f0 0022     		movs	r2, #0
+ 10916 00f2 1A70     		strb	r2, [r3]
+ 351:Src/main.c    **** 					Stop_TIM10();
+ 10917              		.loc 1 351 6 is_stmt 1 view .LVU3448
+ 351:Src/main.c    **** 					Stop_TIM10();
+ 10918              		.loc 1 351 31 is_stmt 0 view .LVU3449
+ 10919 00f4 6B4B     		ldr	r3, .L679+24
+ 10920 00f6 5A68     		ldr	r2, [r3, #4]	@ float
+ 351:Src/main.c    **** 					Stop_TIM10();
+ 10921              		.loc 1 351 25 view .LVU3450
+ 10922 00f8 1A61     		str	r2, [r3, #16]	@ float
+ 352:Src/main.c    **** 				break;
+ 10923              		.loc 1 352 6 is_stmt 1 view .LVU3451
+ 10924 00fa FFF7FEFF 		bl	Stop_TIM10
+ 10925              	.LVL985:
+ 353:Src/main.c    **** 				case DECODE_ENABLE://1 - Decode rec. message
+ 10926              		.loc 1 353 5 view .LVU3452
+ 10927              	.L591:
+ARM GAS  /tmp/ccEQxcUB.s 			page 600
 
 
- 10126 010c FFF7FEFF 		bl	USART_TX
- 10127              	.LVL897:
- 879:Src/main.c    **** 				State_Data[1]=0;//All OK!
- 10128              		.loc 1 879 5 view .LVU3217
- 879:Src/main.c    **** 				State_Data[1]=0;//All OK!
- 10129              		.loc 1 879 18 is_stmt 0 view .LVU3218
- 10130 0110 0023     		movs	r3, #0
- 10131 0112 2370     		strb	r3, [r4]
- 880:Src/main.c    **** 				UART_transmission_request = NO_MESS;
- 10132              		.loc 1 880 5 is_stmt 1 view .LVU3219
- 880:Src/main.c    **** 				UART_transmission_request = NO_MESS;
- 10133              		.loc 1 880 18 is_stmt 0 view .LVU3220
- 10134 0114 6370     		strb	r3, [r4, #1]
- 881:Src/main.c    **** 			break;
- 10135              		.loc 1 881 5 is_stmt 1 view .LVU3221
- 881:Src/main.c    **** 			break;
- 10136              		.loc 1 881 31 is_stmt 0 view .LVU3222
- 10137 0116 5E4A     		ldr	r2, .L612+24
- 10138 0118 1370     		strb	r3, [r2]
- 882:Src/main.c    **** 			case MESS_02://Transmith packet
- 10139              		.loc 1 882 4 is_stmt 1 view .LVU3223
- 10140              	.L589:
- 916:Src/main.c    **** 		{
- 10141              		.loc 1 916 5 view .LVU3224
- 916:Src/main.c    **** 		{
- 10142              		.loc 1 916 17 is_stmt 0 view .LVU3225
- 10143 011a 5F4B     		ldr	r3, .L612+32
- 10144 011c 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 916:Src/main.c    **** 		{
- 10145              		.loc 1 916 8 view .LVU3226
- 10146 011e 012B     		cmp	r3, #1
- 10147 0120 00F0A584 		beq	.L601
- 10148              	.L535:
- 311:Src/main.c    ****   {
- 10149              		.loc 1 311 3 is_stmt 1 view .LVU3227
- 313:Src/main.c    **** 		{
- 10150              		.loc 1 313 3 view .LVU3228
- 313:Src/main.c    **** 		{
- 10151              		.loc 1 313 8 is_stmt 0 view .LVU3229
- 10152 0124 4FF48071 		mov	r1, #256
- 10153 0128 5C48     		ldr	r0, .L612+36
- 10154 012a FFF7FEFF 		bl	HAL_GPIO_ReadPin
- 10155              	.LVL898:
- 313:Src/main.c    **** 		{
- 10156              		.loc 1 313 6 discriminator 1 view .LVU3230
- 10157 012e 0128     		cmp	r0, #1
- 10158 0130 ABD0     		beq	.L602
- 10159              	.L536:
- 328:Src/main.c    **** 			{
- 10160              		.loc 1 328 4 is_stmt 1 view .LVU3231
- 10161 0132 5B4B     		ldr	r3, .L612+40
- 10162 0134 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 10163 0136 0A2B     		cmp	r3, #10
- 10164 0138 DBD8     		bhi	.L540
- 10165 013a 01A2     		adr	r2, .L542
- 10166 013c 52F823F0 		ldr	pc, [r2, r3, lsl #2]
- 10167              		.p2align 2
-ARM GAS  /tmp/ccwR4KB7.s 			page 578
+ 970:Src/main.c    **** 		{
+ 10928              		.loc 1 970 3 view .LVU3453
+ 10929 00fe 6A4B     		ldr	r3, .L679+28
+ 10930 0100 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ 10931 0102 022B     		cmp	r3, #2
+ 10932 0104 00F0F384 		beq	.L648
+ 10933 0108 032B     		cmp	r3, #3
+ 10934 010a 00F02685 		beq	.L664
+ 10935 010e 012B     		cmp	r3, #1
+ 10936 0110 09D1     		bne	.L650
+ 973:Src/main.c    **** 				//HAL_UART_Transmit(&huart1, State_Data, 2, 10);
+ 10937              		.loc 1 973 5 view .LVU3454
+ 10938 0112 664C     		ldr	r4, .L679+32
+ 10939 0114 0221     		movs	r1, #2
+ 10940 0116 2046     		mov	r0, r4
+ 10941 0118 FFF7FEFF 		bl	USART_TX
+ 10942              	.LVL986:
+ 975:Src/main.c    **** 				State_Data[1]=0;//All OK!
+ 10943              		.loc 1 975 5 view .LVU3455
+ 975:Src/main.c    **** 				State_Data[1]=0;//All OK!
+ 10944              		.loc 1 975 18 is_stmt 0 view .LVU3456
+ 10945 011c 0023     		movs	r3, #0
+ 10946 011e 2370     		strb	r3, [r4]
+ 976:Src/main.c    **** 				UART_transmission_request = NO_MESS;
+ 10947              		.loc 1 976 5 is_stmt 1 view .LVU3457
+ 976:Src/main.c    **** 				UART_transmission_request = NO_MESS;
+ 10948              		.loc 1 976 18 is_stmt 0 view .LVU3458
+ 10949 0120 6370     		strb	r3, [r4, #1]
+ 977:Src/main.c    **** 			break;
+ 10950              		.loc 1 977 5 is_stmt 1 view .LVU3459
+ 977:Src/main.c    **** 			break;
+ 10951              		.loc 1 977 31 is_stmt 0 view .LVU3460
+ 10952 0122 614A     		ldr	r2, .L679+28
+ 10953 0124 1370     		strb	r3, [r2]
+ 978:Src/main.c    **** 			case MESS_02://Transmith packet
+ 10954              		.loc 1 978 4 is_stmt 1 view .LVU3461
+ 10955              	.L650:
+1012:Src/main.c    **** 		{
+ 10956              		.loc 1 1012 5 view .LVU3462
+1012:Src/main.c    **** 		{
+ 10957              		.loc 1 1012 17 is_stmt 0 view .LVU3463
+ 10958 0126 624B     		ldr	r3, .L679+36
+ 10959 0128 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+1012:Src/main.c    **** 		{
+ 10960              		.loc 1 1012 8 view .LVU3464
+ 10961 012a 012B     		cmp	r3, #1
+ 10962 012c 00F01785 		beq	.L667
+ 10963              	.L586:
+ 330:Src/main.c    ****   {
+ 10964              		.loc 1 330 3 is_stmt 1 view .LVU3465
+ 332:Src/main.c    **** 		{
+ 10965              		.loc 1 332 3 view .LVU3466
+ 332:Src/main.c    **** 		{
+ 10966              		.loc 1 332 8 is_stmt 0 view .LVU3467
+ 10967 0130 4FF48071 		mov	r1, #256
+ 10968 0134 5F48     		ldr	r0, .L679+40
+ 10969 0136 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ARM GAS  /tmp/ccEQxcUB.s 			page 601
 
 
- 10168              	.L542:
- 10169 0140 E3000000 		.word	.L552+1
- 10170 0144 6D010000 		.word	.L551+1
- 10171 0148 D7010000 		.word	.L550+1
- 10172 014c 0D020000 		.word	.L549+1
- 10173 0150 3D020000 		.word	.L548+1
- 10174 0154 4D020000 		.word	.L547+1
- 10175 0158 69020000 		.word	.L546+1
- 10176 015c CD020000 		.word	.L545+1
- 10177 0160 F9040000 		.word	.L544+1
- 10178 0164 8D050000 		.word	.L543+1
- 10179 0168 21040000 		.word	.L541+1
- 10180              		.p2align 1
- 10181              	.L551:
- 336:Src/main.c    **** 					if (CheckChecksum(COMMAND))
- 10182              		.loc 1 336 6 view .LVU3232
- 336:Src/main.c    **** 					if (CheckChecksum(COMMAND))
- 10183              		.loc 1 336 18 is_stmt 0 view .LVU3233
- 10184 016c 4D4C     		ldr	r4, .L612+44
- 10185 016e 0D21     		movs	r1, #13
- 10186 0170 2046     		mov	r0, r4
- 10187 0172 FFF7FEFF 		bl	CalculateChecksum
- 10188              	.LVL899:
- 336:Src/main.c    **** 					if (CheckChecksum(COMMAND))
- 10189              		.loc 1 336 16 discriminator 1 view .LVU3234
- 10190 0176 4C4B     		ldr	r3, .L612+48
- 10191 0178 1880     		strh	r0, [r3]	@ movhi
- 337:Src/main.c    **** 					{
- 10192              		.loc 1 337 6 is_stmt 1 view .LVU3235
- 337:Src/main.c    **** 					{
- 10193              		.loc 1 337 10 is_stmt 0 view .LVU3236
- 10194 017a 2046     		mov	r0, r4
- 10195 017c FFF7FEFF 		bl	CheckChecksum
- 10196              	.LVL900:
- 337:Src/main.c    **** 					{
- 10197              		.loc 1 337 9 discriminator 1 view .LVU3237
- 10198 0180 70B9     		cbnz	r0, .L603
- 350:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 10199              		.loc 1 350 7 is_stmt 1 view .LVU3238
- 350:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 10200              		.loc 1 350 17 is_stmt 0 view .LVU3239
- 10201 0182 444A     		ldr	r2, .L612+28
- 10202 0184 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
- 350:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 10203              		.loc 1 350 21 view .LVU3240
- 10204 0186 43F00403 		orr	r3, r3, #4
- 10205 018a 1370     		strb	r3, [r2]
- 351:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
- 10206              		.loc 1 351 7 is_stmt 1 view .LVU3241
- 351:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
- 10207              		.loc 1 351 17 is_stmt 0 view .LVU3242
- 10208 018c 444B     		ldr	r3, .L612+40
- 10209 018e 0222     		movs	r2, #2
- 10210 0190 1A70     		strb	r2, [r3]
- 352:Src/main.c    **** 					}
- 10211              		.loc 1 352 7 is_stmt 1 view .LVU3243
- 352:Src/main.c    **** 					}
-ARM GAS  /tmp/ccwR4KB7.s 			page 579
+ 10970              	.LVL987:
+ 332:Src/main.c    **** 		{
+ 10971              		.loc 1 332 6 discriminator 1 view .LVU3468
+ 10972 013a 0128     		cmp	r0, #1
+ 10973 013c ABD0     		beq	.L668
+ 10974              	.L587:
+ 347:Src/main.c    **** 			{
+ 10975              		.loc 1 347 4 is_stmt 1 view .LVU3469
+ 10976 013e 5E4B     		ldr	r3, .L679+44
+ 10977 0140 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ 10978 0142 0C2B     		cmp	r3, #12
+ 10979 0144 DBD8     		bhi	.L591
+ 10980 0146 01A2     		adr	r2, .L593
+ 10981 0148 52F823F0 		ldr	pc, [r2, r3, lsl #2]
+ 10982              		.p2align 2
+ 10983              	.L593:
+ 10984 014c EF000000 		.word	.L605+1
+ 10985 0150 81010000 		.word	.L604+1
+ 10986 0154 EB010000 		.word	.L603+1
+ 10987 0158 21020000 		.word	.L602+1
+ 10988 015c 51020000 		.word	.L601+1
+ 10989 0160 61020000 		.word	.L600+1
+ 10990 0164 7D020000 		.word	.L599+1
+ 10991 0168 E5020000 		.word	.L598+1
+ 10992 016c 1B060000 		.word	.L597+1
+ 10993 0170 61060000 		.word	.L596+1
+ 10994 0174 39040000 		.word	.L595+1
+ 10995 0178 15050000 		.word	.L594+1
+ 10996 017c 65050000 		.word	.L592+1
+ 10997              		.p2align 1
+ 10998              	.L604:
+ 355:Src/main.c    **** 					if (CheckChecksum(COMMAND))
+ 10999              		.loc 1 355 6 view .LVU3470
+ 355:Src/main.c    **** 					if (CheckChecksum(COMMAND))
+ 11000              		.loc 1 355 18 is_stmt 0 view .LVU3471
+ 11001 0180 4E4C     		ldr	r4, .L679+48
+ 11002 0182 0D21     		movs	r1, #13
+ 11003 0184 2046     		mov	r0, r4
+ 11004 0186 FFF7FEFF 		bl	CalculateChecksum
+ 11005              	.LVL988:
+ 355:Src/main.c    **** 					if (CheckChecksum(COMMAND))
+ 11006              		.loc 1 355 16 discriminator 1 view .LVU3472
+ 11007 018a 4D4B     		ldr	r3, .L679+52
+ 11008 018c 1880     		strh	r0, [r3]	@ movhi
+ 356:Src/main.c    **** 					{
+ 11009              		.loc 1 356 6 is_stmt 1 view .LVU3473
+ 356:Src/main.c    **** 					{
+ 11010              		.loc 1 356 10 is_stmt 0 view .LVU3474
+ 11011 018e 2046     		mov	r0, r4
+ 11012 0190 FFF7FEFF 		bl	CheckChecksum
+ 11013              	.LVL989:
+ 356:Src/main.c    **** 					{
+ 11014              		.loc 1 356 9 discriminator 1 view .LVU3475
+ 11015 0194 70B9     		cbnz	r0, .L669
+ 369:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ 11016              		.loc 1 369 7 is_stmt 1 view .LVU3476
+ 369:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ARM GAS  /tmp/ccEQxcUB.s 			page 602
 
 
- 10212              		.loc 1 352 21 is_stmt 0 view .LVU3244
- 10213 0192 3D4B     		ldr	r3, .L612+16
- 10214 0194 0022     		movs	r2, #0
- 10215 0196 1A70     		strb	r2, [r3]
- 10216              	.L554:
- 354:Src/main.c    **** 				break;
- 10217              		.loc 1 354 6 is_stmt 1 view .LVU3245
- 354:Src/main.c    **** 				break;
- 10218              		.loc 1 354 32 is_stmt 0 view .LVU3246
- 10219 0198 3D4B     		ldr	r3, .L612+24
- 10220 019a 0122     		movs	r2, #1
- 10221 019c 1A70     		strb	r2, [r3]
- 355:Src/main.c    **** 				case DEFAULT_ENABLE://2 - Go to HALT
- 10222              		.loc 1 355 5 is_stmt 1 view .LVU3247
- 10223 019e A8E7     		b	.L540
- 10224              	.L603:
- 339:Src/main.c    **** 						LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
- 10225              		.loc 1 339 7 view .LVU3248
- 10226              	.LVL901:
- 10227              	.LBB658:
- 10228              	.LBI658:
+ 11017              		.loc 1 369 17 is_stmt 0 view .LVU3477
+ 11018 0196 454A     		ldr	r2, .L679+32
+ 11019 0198 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 369:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ 11020              		.loc 1 369 21 view .LVU3478
+ 11021 019a 43F00403 		orr	r3, r3, #4
+ 11022 019e 1370     		strb	r3, [r2]
+ 370:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
+ 11023              		.loc 1 370 7 is_stmt 1 view .LVU3479
+ 370:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
+ 11024              		.loc 1 370 17 is_stmt 0 view .LVU3480
+ 11025 01a0 454B     		ldr	r3, .L679+44
+ 11026 01a2 0222     		movs	r2, #2
+ 11027 01a4 1A70     		strb	r2, [r3]
+ 371:Src/main.c    **** 					}
+ 11028              		.loc 1 371 7 is_stmt 1 view .LVU3481
+ 371:Src/main.c    **** 					}
+ 11029              		.loc 1 371 21 is_stmt 0 view .LVU3482
+ 11030 01a6 3E4B     		ldr	r3, .L679+20
+ 11031 01a8 0022     		movs	r2, #0
+ 11032 01aa 1A70     		strb	r2, [r3]
+ 11033              	.L607:
+ 373:Src/main.c    **** 				break;
+ 11034              		.loc 1 373 6 is_stmt 1 view .LVU3483
+ 373:Src/main.c    **** 				break;
+ 11035              		.loc 1 373 32 is_stmt 0 view .LVU3484
+ 11036 01ac 3E4B     		ldr	r3, .L679+28
+ 11037 01ae 0122     		movs	r2, #1
+ 11038 01b0 1A70     		strb	r2, [r3]
+ 374:Src/main.c    **** 				case DEFAULT_ENABLE://2 - Go to HALT
+ 11039              		.loc 1 374 5 is_stmt 1 view .LVU3485
+ 11040 01b2 A4E7     		b	.L591
+ 11041              	.L669:
+ 358:Src/main.c    **** 						LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
+ 11042              		.loc 1 358 7 view .LVU3486
+ 11043              	.LVL990:
+ 11044              	.LBB695:
+ 11045              	.LBI695:
  358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 10229              		.loc 4 358 22 view .LVU3249
- 10230              	.LBB659:
+ 11046              		.loc 4 358 22 view .LVU3487
+ 11047              	.LBB696:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10231              		.loc 4 360 3 view .LVU3250
- 10232 01a0 424A     		ldr	r2, .L612+52
- 10233 01a2 1368     		ldr	r3, [r2]
- 10234 01a4 43F04003 		orr	r3, r3, #64
- 10235 01a8 1360     		str	r3, [r2]
- 10236              	.LVL902:
+ 11048              		.loc 4 360 3 view .LVU3488
+ 11049 01b4 434A     		ldr	r2, .L679+56
+ 11050 01b6 1368     		ldr	r3, [r2]
+ 11051 01b8 43F04003 		orr	r3, r3, #64
+ 11052 01bc 1360     		str	r3, [r2]
+ 11053              	.LVL991:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10237              		.loc 4 360 3 is_stmt 0 view .LVU3251
- 10238              	.LBE659:
- 10239              	.LBE658:
- 340:Src/main.c    **** 						Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- 10240              		.loc 1 340 7 is_stmt 1 view .LVU3252
- 10241              	.LBB660:
- 10242              	.LBI660:
+ 11054              		.loc 4 360 3 is_stmt 0 view .LVU3489
+ 11055              	.LBE696:
+ 11056              	.LBE695:
+ 359:Src/main.c    **** 						Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
+ 11057              		.loc 1 359 7 is_stmt 1 view .LVU3490
+ 11058              	.LBB697:
+ 11059              	.LBI697:
  358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 10243              		.loc 4 358 22 view .LVU3253
- 10244              	.LBB661:
+ARM GAS  /tmp/ccEQxcUB.s 			page 603
+
+
+ 11060              		.loc 4 358 22 view .LVU3491
+ 11061              	.LBB698:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10245              		.loc 4 360 3 view .LVU3254
- 10246 01aa 02F58E32 		add	r2, r2, #72704
- 10247 01ae 1368     		ldr	r3, [r2]
- 10248 01b0 43F04003 		orr	r3, r3, #64
- 10249 01b4 1360     		str	r3, [r2]
- 10250              	.LVL903:
+ 11062              		.loc 4 360 3 view .LVU3492
+ 11063 01be 02F58E32 		add	r2, r2, #72704
+ 11064 01c2 1368     		ldr	r3, [r2]
+ 11065 01c4 43F04003 		orr	r3, r3, #64
+ 11066 01c8 1360     		str	r3, [r2]
+ 11067              	.LVL992:
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10251              		.loc 4 360 3 is_stmt 0 view .LVU3255
- 10252              	.LBE661:
- 10253              	.LBE660:
- 341:Src/main.c    **** 						TO6_before = TO6;
- 10254              		.loc 1 341 7 is_stmt 1 view .LVU3256
- 10255 01b6 3E4B     		ldr	r3, .L612+56
- 10256 01b8 3E4A     		ldr	r2, .L612+60
-ARM GAS  /tmp/ccwR4KB7.s 			page 580
+ 11068              		.loc 4 360 3 is_stmt 0 view .LVU3493
+ 11069              	.LBE698:
+ 11070              	.LBE697:
+ 360:Src/main.c    **** 						TO6_before = TO6;
+ 11071              		.loc 1 360 7 is_stmt 1 view .LVU3494
+ 11072 01ca 3F4B     		ldr	r3, .L679+60
+ 11073 01cc 3F4A     		ldr	r2, .L679+64
+ 11074 01ce 4049     		ldr	r1, .L679+68
+ 11075 01d0 2046     		mov	r0, r4
+ 11076 01d2 FFF7FEFF 		bl	Decode_uart
+ 11077              	.LVL993:
+ 361:Src/main.c    **** 						//LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
+ 11078              		.loc 1 361 7 view .LVU3495
+ 361:Src/main.c    **** 						//LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
+ 11079              		.loc 1 361 18 is_stmt 0 view .LVU3496
+ 11080 01d6 3F4B     		ldr	r3, .L679+72
+ 11081 01d8 1A68     		ldr	r2, [r3]
+ 11082 01da 3F4B     		ldr	r3, .L679+76
+ 11083 01dc 1A60     		str	r2, [r3]
+ 364:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
+ 11084              		.loc 1 364 7 is_stmt 1 view .LVU3497
+ 364:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
+ 11085              		.loc 1 364 17 is_stmt 0 view .LVU3498
+ 11086 01de 0723     		movs	r3, #7
+ 11087 01e0 354A     		ldr	r2, .L679+44
+ 11088 01e2 1370     		strb	r3, [r2]
+ 365:Src/main.c    **** 					}
+ 11089              		.loc 1 365 7 is_stmt 1 view .LVU3499
+ 365:Src/main.c    **** 					}
+ 11090              		.loc 1 365 21 is_stmt 0 view .LVU3500
+ 11091 01e4 2E4A     		ldr	r2, .L679+20
+ 11092 01e6 1370     		strb	r3, [r2]
+ 11093 01e8 E0E7     		b	.L607
+ 11094              	.L603:
+ 377:Src/main.c    **** 					Stop_TIM10();
+ 11095              		.loc 1 377 6 is_stmt 1 view .LVU3501
+ 377:Src/main.c    **** 					Stop_TIM10();
+ 11096              		.loc 1 377 31 is_stmt 0 view .LVU3502
+ 11097 01ea 2E4B     		ldr	r3, .L679+24
+ 11098 01ec 5A68     		ldr	r2, [r3, #4]	@ float
+ 377:Src/main.c    **** 					Stop_TIM10();
+ 11099              		.loc 1 377 25 view .LVU3503
+ 11100 01ee 1A61     		str	r2, [r3, #16]	@ float
+ 378:Src/main.c    **** 					Init_params();
+ 11101              		.loc 1 378 6 is_stmt 1 view .LVU3504
+ 11102 01f0 FFF7FEFF 		bl	Stop_TIM10
+ 11103              	.LVL994:
+ARM GAS  /tmp/ccEQxcUB.s 			page 604
 
 
- 10257 01ba 3F49     		ldr	r1, .L612+64
- 10258 01bc 2046     		mov	r0, r4
- 10259 01be FFF7FEFF 		bl	Decode_uart
- 10260              	.LVL904:
- 342:Src/main.c    **** 						//LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- 10261              		.loc 1 342 7 view .LVU3257
- 342:Src/main.c    **** 						//LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- 10262              		.loc 1 342 18 is_stmt 0 view .LVU3258
- 10263 01c2 3E4B     		ldr	r3, .L612+68
- 10264 01c4 1A68     		ldr	r2, [r3]
- 10265 01c6 3E4B     		ldr	r3, .L612+72
- 10266 01c8 1A60     		str	r2, [r3]
- 345:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
- 10267              		.loc 1 345 7 is_stmt 1 view .LVU3259
- 345:Src/main.c    **** 						CPU_state_old = WORK_ENABLE;//Save main current cycle
- 10268              		.loc 1 345 17 is_stmt 0 view .LVU3260
- 10269 01ca 0723     		movs	r3, #7
- 10270 01cc 344A     		ldr	r2, .L612+40
- 10271 01ce 1370     		strb	r3, [r2]
- 346:Src/main.c    **** 					}
- 10272              		.loc 1 346 7 is_stmt 1 view .LVU3261
- 346:Src/main.c    **** 					}
- 10273              		.loc 1 346 21 is_stmt 0 view .LVU3262
- 10274 01d0 2D4A     		ldr	r2, .L612+16
- 10275 01d2 1370     		strb	r3, [r2]
- 10276 01d4 E0E7     		b	.L554
- 10277              	.L550:
- 358:Src/main.c    **** 					Stop_TIM10();
- 10278              		.loc 1 358 6 is_stmt 1 view .LVU3263
- 358:Src/main.c    **** 					Stop_TIM10();
- 10279              		.loc 1 358 31 is_stmt 0 view .LVU3264
- 10280 01d6 2D4B     		ldr	r3, .L612+20
- 10281 01d8 5A68     		ldr	r2, [r3, #4]	@ float
- 358:Src/main.c    **** 					Stop_TIM10();
- 10282              		.loc 1 358 25 view .LVU3265
- 10283 01da 1A61     		str	r2, [r3, #16]	@ float
- 359:Src/main.c    **** 					Init_params();
- 10284              		.loc 1 359 6 is_stmt 1 view .LVU3266
- 10285 01dc FFF7FEFF 		bl	Stop_TIM10
- 10286              	.LVL905:
- 360:Src/main.c    **** 					LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
- 10287              		.loc 1 360 6 view .LVU3267
- 10288 01e0 FFF7FEFF 		bl	Init_params
- 10289              	.LVL906:
- 361:Src/main.c    **** 					LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
- 10290              		.loc 1 361 6 view .LVU3268
- 10291              	.LBB662:
- 10292              	.LBI662:
+ 379:Src/main.c    **** 					LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
+ 11104              		.loc 1 379 6 view .LVU3505
+ 11105 01f4 FFF7FEFF 		bl	Init_params
+ 11106              	.LVL995:
+ 380:Src/main.c    **** 					LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
+ 11107              		.loc 1 380 6 view .LVU3506
+ 11108              	.LBB699:
+ 11109              	.LBI699:
  370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 10293              		.loc 4 370 22 view .LVU3269
- 10294              	.LBB663:
+ 11110              		.loc 4 370 22 view .LVU3507
+ 11111              	.LBB700:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10295              		.loc 4 372 3 view .LVU3270
- 10296 01e4 314A     		ldr	r2, .L612+52
- 10297 01e6 1368     		ldr	r3, [r2]
- 10298 01e8 23F04003 		bic	r3, r3, #64
- 10299 01ec 1360     		str	r3, [r2]
-ARM GAS  /tmp/ccwR4KB7.s 			page 581
-
-
- 10300              	.LVL907:
+ 11112              		.loc 4 372 3 view .LVU3508
+ 11113 01f8 324A     		ldr	r2, .L679+56
+ 11114 01fa 1368     		ldr	r3, [r2]
+ 11115 01fc 23F04003 		bic	r3, r3, #64
+ 11116 0200 1360     		str	r3, [r2]
+ 11117              	.LVL996:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10301              		.loc 4 372 3 is_stmt 0 view .LVU3271
- 10302              	.LBE663:
- 10303              	.LBE662:
- 362:Src/main.c    **** 					CPU_state = HALT;
- 10304              		.loc 1 362 6 is_stmt 1 view .LVU3272
- 10305              	.LBB664:
- 10306              	.LBI664:
+ 11118              		.loc 4 372 3 is_stmt 0 view .LVU3509
+ 11119              	.LBE700:
+ 11120              	.LBE699:
+ 381:Src/main.c    **** 					CPU_state = HALT;
+ 11121              		.loc 1 381 6 is_stmt 1 view .LVU3510
+ 11122              	.LBB701:
+ 11123              	.LBI701:
  370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 10307              		.loc 4 370 22 view .LVU3273
- 10308              	.LBB665:
+ 11124              		.loc 4 370 22 view .LVU3511
+ 11125              	.LBB702:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10309              		.loc 4 372 3 view .LVU3274
- 10310 01ee 02F58E32 		add	r2, r2, #72704
- 10311 01f2 1368     		ldr	r3, [r2]
- 10312 01f4 23F04003 		bic	r3, r3, #64
- 10313 01f8 1360     		str	r3, [r2]
- 10314              	.LVL908:
+ 11126              		.loc 4 372 3 view .LVU3512
+ 11127 0202 02F58E32 		add	r2, r2, #72704
+ 11128 0206 1368     		ldr	r3, [r2]
+ 11129 0208 23F04003 		bic	r3, r3, #64
+ 11130 020c 1360     		str	r3, [r2]
+ 11131              	.LVL997:
  372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 10315              		.loc 4 372 3 is_stmt 0 view .LVU3275
- 10316              	.LBE665:
- 10317              	.LBE664:
- 363:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
- 10318              		.loc 1 363 6 is_stmt 1 view .LVU3276
- 363:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
- 10319              		.loc 1 363 16 is_stmt 0 view .LVU3277
- 10320 01fa 0023     		movs	r3, #0
- 10321 01fc 284A     		ldr	r2, .L612+40
- 10322 01fe 1370     		strb	r3, [r2]
- 364:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 10323              		.loc 1 364 6 is_stmt 1 view .LVU3278
- 364:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 10324              		.loc 1 364 20 is_stmt 0 view .LVU3279
- 10325 0200 214A     		ldr	r2, .L612+16
- 10326 0202 1370     		strb	r3, [r2]
- 365:Src/main.c    **** 				break;
- 10327              		.loc 1 365 6 is_stmt 1 view .LVU3280
- 365:Src/main.c    **** 				break;
- 10328              		.loc 1 365 32 is_stmt 0 view .LVU3281
- 10329 0204 224B     		ldr	r3, .L612+24
- 10330 0206 0122     		movs	r2, #1
- 10331 0208 1A70     		strb	r2, [r3]
- 366:Src/main.c    **** 				case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
- 10332              		.loc 1 366 5 is_stmt 1 view .LVU3282
- 10333 020a 72E7     		b	.L540
- 10334              	.L549:
- 368:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
- 10335              		.loc 1 368 6 view .LVU3283
- 368:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
- 10336              		.loc 1 368 15 is_stmt 0 view .LVU3284
- 10337 020c 2D48     		ldr	r0, .L612+76
- 10338 020e FFF7FEFF 		bl	SD_READ
- 10339              	.LVL909:
- 368:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
- 10340              		.loc 1 368 13 discriminator 1 view .LVU3285
- 10341 0212 82B2     		uxth	r2, r0
-ARM GAS  /tmp/ccwR4KB7.s 			page 582
+ 11132              		.loc 4 372 3 is_stmt 0 view .LVU3513
+ 11133              	.LBE702:
+ 11134              	.LBE701:
+ 382:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
+ 11135              		.loc 1 382 6 is_stmt 1 view .LVU3514
+ 382:Src/main.c    **** 					CPU_state_old = HALT;//Save main current cycle
+ 11136              		.loc 1 382 16 is_stmt 0 view .LVU3515
+ 11137 020e 0023     		movs	r3, #0
+ 11138 0210 294A     		ldr	r2, .L679+44
+ 11139 0212 1370     		strb	r3, [r2]
+ 383:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 11140              		.loc 1 383 6 is_stmt 1 view .LVU3516
+ 383:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 11141              		.loc 1 383 20 is_stmt 0 view .LVU3517
+ 11142 0214 224A     		ldr	r2, .L679+20
+ 11143 0216 1370     		strb	r3, [r2]
+ 384:Src/main.c    **** 				break;
+ 11144              		.loc 1 384 6 is_stmt 1 view .LVU3518
+ 384:Src/main.c    **** 				break;
+ 11145              		.loc 1 384 32 is_stmt 0 view .LVU3519
+ARM GAS  /tmp/ccEQxcUB.s 			page 605
 
 
- 10342 0214 2C4B     		ldr	r3, .L612+80
- 10343 0216 1A80     		strh	r2, [r3]	@ movhi
- 369:Src/main.c    **** 					if (temp16==0)
- 10344              		.loc 1 369 6 is_stmt 1 view .LVU3286
- 369:Src/main.c    **** 					if (temp16==0)
- 10345              		.loc 1 369 16 is_stmt 0 view .LVU3287
- 10346 0218 1E49     		ldr	r1, .L612+28
- 10347 021a 0B78     		ldrb	r3, [r1]	@ zero_extendqisi2
- 369:Src/main.c    **** 					if (temp16==0)
- 10348              		.loc 1 369 19 view .LVU3288
- 10349 021c 0343     		orrs	r3, r3, r0
- 10350 021e 0B70     		strb	r3, [r1]
- 370:Src/main.c    **** 					{	
- 10351              		.loc 1 370 6 is_stmt 1 view .LVU3289
- 370:Src/main.c    **** 					{	
- 10352              		.loc 1 370 9 is_stmt 0 view .LVU3290
- 10353 0220 42B9     		cbnz	r2, .L555
- 372:Src/main.c    **** 					}
- 10354              		.loc 1 372 7 is_stmt 1 view .LVU3291
- 372:Src/main.c    **** 					}
- 10355              		.loc 1 372 33 is_stmt 0 view .LVU3292
- 10356 0222 1B4B     		ldr	r3, .L612+24
- 10357 0224 0322     		movs	r2, #3
- 10358 0226 1A70     		strb	r2, [r3]
- 10359              	.L556:
- 378:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 10360              		.loc 1 378 6 is_stmt 1 view .LVU3293
- 378:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 10361              		.loc 1 378 20 is_stmt 0 view .LVU3294
- 10362 0228 0023     		movs	r3, #0
- 10363 022a 174A     		ldr	r2, .L612+16
- 10364 022c 1370     		strb	r3, [r2]
- 379:Src/main.c    **** 				break;
- 10365              		.loc 1 379 6 is_stmt 1 view .LVU3295
- 379:Src/main.c    **** 				break;
- 10366              		.loc 1 379 16 is_stmt 0 view .LVU3296
- 10367 022e 1C4A     		ldr	r2, .L612+40
- 10368 0230 1370     		strb	r3, [r2]
- 380:Src/main.c    **** 				case TRANS_ENABLE://4 - Transmith current packet
- 10369              		.loc 1 380 5 is_stmt 1 view .LVU3297
- 10370 0232 5EE7     		b	.L540
- 10371              	.L555:
- 376:Src/main.c    **** 					}
- 10372              		.loc 1 376 7 view .LVU3298
- 376:Src/main.c    **** 					}
- 10373              		.loc 1 376 33 is_stmt 0 view .LVU3299
- 10374 0234 164B     		ldr	r3, .L612+24
- 10375 0236 0122     		movs	r2, #1
- 10376 0238 1A70     		strb	r2, [r3]
- 10377 023a F5E7     		b	.L556
- 10378              	.L548:
- 382:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 10379              		.loc 1 382 6 is_stmt 1 view .LVU3300
- 382:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 10380              		.loc 1 382 32 is_stmt 0 view .LVU3301
- 10381 023c 144B     		ldr	r3, .L612+24
- 10382 023e 0222     		movs	r2, #2
-ARM GAS  /tmp/ccwR4KB7.s 			page 583
+ 11146 0218 234B     		ldr	r3, .L679+28
+ 11147 021a 0122     		movs	r2, #1
+ 11148 021c 1A70     		strb	r2, [r3]
+ 385:Src/main.c    **** 				case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
+ 11149              		.loc 1 385 5 is_stmt 1 view .LVU3520
+ 11150 021e 6EE7     		b	.L591
+ 11151              	.L602:
+ 387:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
+ 11152              		.loc 1 387 6 view .LVU3521
+ 387:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
+ 11153              		.loc 1 387 15 is_stmt 0 view .LVU3522
+ 11154 0220 2E48     		ldr	r0, .L679+80
+ 11155 0222 FFF7FEFF 		bl	SD_READ
+ 11156              	.LVL998:
+ 387:Src/main.c    **** 					State_Data[0]|=temp16&0xff;
+ 11157              		.loc 1 387 13 discriminator 1 view .LVU3523
+ 11158 0226 82B2     		uxth	r2, r0
+ 11159 0228 2D4B     		ldr	r3, .L679+84
+ 11160 022a 1A80     		strh	r2, [r3]	@ movhi
+ 388:Src/main.c    **** 					if (temp16==0)
+ 11161              		.loc 1 388 6 is_stmt 1 view .LVU3524
+ 388:Src/main.c    **** 					if (temp16==0)
+ 11162              		.loc 1 388 16 is_stmt 0 view .LVU3525
+ 11163 022c 1F49     		ldr	r1, .L679+32
+ 11164 022e 0B78     		ldrb	r3, [r1]	@ zero_extendqisi2
+ 388:Src/main.c    **** 					if (temp16==0)
+ 11165              		.loc 1 388 19 view .LVU3526
+ 11166 0230 0343     		orrs	r3, r3, r0
+ 11167 0232 0B70     		strb	r3, [r1]
+ 389:Src/main.c    **** 					{	
+ 11168              		.loc 1 389 6 is_stmt 1 view .LVU3527
+ 389:Src/main.c    **** 					{	
+ 11169              		.loc 1 389 9 is_stmt 0 view .LVU3528
+ 11170 0234 42B9     		cbnz	r2, .L608
+ 391:Src/main.c    **** 					}
+ 11171              		.loc 1 391 7 is_stmt 1 view .LVU3529
+ 391:Src/main.c    **** 					}
+ 11172              		.loc 1 391 33 is_stmt 0 view .LVU3530
+ 11173 0236 1C4B     		ldr	r3, .L679+28
+ 11174 0238 0322     		movs	r2, #3
+ 11175 023a 1A70     		strb	r2, [r3]
+ 11176              	.L609:
+ 397:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 11177              		.loc 1 397 6 is_stmt 1 view .LVU3531
+ 397:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 11178              		.loc 1 397 20 is_stmt 0 view .LVU3532
+ 11179 023c 0023     		movs	r3, #0
+ 11180 023e 184A     		ldr	r2, .L679+20
+ 11181 0240 1370     		strb	r3, [r2]
+ 398:Src/main.c    **** 				break;
+ 11182              		.loc 1 398 6 is_stmt 1 view .LVU3533
+ 398:Src/main.c    **** 				break;
+ 11183              		.loc 1 398 16 is_stmt 0 view .LVU3534
+ 11184 0242 1D4A     		ldr	r2, .L679+44
+ 11185 0244 1370     		strb	r3, [r2]
+ 399:Src/main.c    **** 				case TRANS_ENABLE://4 - Transmith current packet
+ 11186              		.loc 1 399 5 is_stmt 1 view .LVU3535
+ARM GAS  /tmp/ccEQxcUB.s 			page 606
 
 
- 10383 0240 1A70     		strb	r2, [r3]
- 383:Src/main.c    **** 				break;
- 10384              		.loc 1 383 6 is_stmt 1 view .LVU3302
- 383:Src/main.c    **** 				break;
- 10385              		.loc 1 383 16 is_stmt 0 view .LVU3303
- 10386 0242 114B     		ldr	r3, .L612+16
- 10387 0244 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
- 10388 0246 164B     		ldr	r3, .L612+40
- 10389 0248 1A70     		strb	r2, [r3]
- 384:Src/main.c    **** 				case REMOVE_FILE://5 - Remove file from SD
- 10390              		.loc 1 384 5 is_stmt 1 view .LVU3304
- 10391 024a 52E7     		b	.L540
- 10392              	.L547:
- 386:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 10393              		.loc 1 386 6 view .LVU3305
- 386:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 10394              		.loc 1 386 21 is_stmt 0 view .LVU3306
- 10395 024c FFF7FEFF 		bl	SD_REMOVE
- 10396              	.LVL910:
- 386:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 10397              		.loc 1 386 16 discriminator 1 view .LVU3307
- 10398 0250 104A     		ldr	r2, .L612+28
- 10399 0252 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
- 386:Src/main.c    **** 					UART_transmission_request = MESS_01;
- 10400              		.loc 1 386 19 discriminator 1 view .LVU3308
- 10401 0254 0343     		orrs	r3, r3, r0
- 10402 0256 1370     		strb	r3, [r2]
- 387:Src/main.c    **** 					CPU_state = CPU_state_old;
- 10403              		.loc 1 387 6 is_stmt 1 view .LVU3309
- 387:Src/main.c    **** 					CPU_state = CPU_state_old;
- 10404              		.loc 1 387 32 is_stmt 0 view .LVU3310
- 10405 0258 0D4B     		ldr	r3, .L612+24
- 10406 025a 0122     		movs	r2, #1
- 10407 025c 1A70     		strb	r2, [r3]
- 388:Src/main.c    **** 				break;
- 10408              		.loc 1 388 6 is_stmt 1 view .LVU3311
- 388:Src/main.c    **** 				break;
- 10409              		.loc 1 388 16 is_stmt 0 view .LVU3312
- 10410 025e 0A4B     		ldr	r3, .L612+16
- 10411 0260 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
- 10412 0262 0F4B     		ldr	r3, .L612+40
- 10413 0264 1A70     		strb	r2, [r3]
- 389:Src/main.c    **** 				case STATE://6 - Transmith state message
- 10414              		.loc 1 389 5 is_stmt 1 view .LVU3313
- 10415 0266 44E7     		b	.L540
- 10416              	.L546:
- 391:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 10417              		.loc 1 391 6 view .LVU3314
- 391:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
- 10418              		.loc 1 391 32 is_stmt 0 view .LVU3315
- 10419 0268 094B     		ldr	r3, .L612+24
- 10420 026a 0122     		movs	r2, #1
- 10421 026c 1A70     		strb	r2, [r3]
- 392:Src/main.c    **** 				break;
- 10422              		.loc 1 392 6 is_stmt 1 view .LVU3316
- 392:Src/main.c    **** 				break;
- 10423              		.loc 1 392 16 is_stmt 0 view .LVU3317
-ARM GAS  /tmp/ccwR4KB7.s 			page 584
+ 11187 0246 5AE7     		b	.L591
+ 11188              	.L608:
+ 395:Src/main.c    **** 					}
+ 11189              		.loc 1 395 7 view .LVU3536
+ 395:Src/main.c    **** 					}
+ 11190              		.loc 1 395 33 is_stmt 0 view .LVU3537
+ 11191 0248 174B     		ldr	r3, .L679+28
+ 11192 024a 0122     		movs	r2, #1
+ 11193 024c 1A70     		strb	r2, [r3]
+ 11194 024e F5E7     		b	.L609
+ 11195              	.L601:
+ 401:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 11196              		.loc 1 401 6 is_stmt 1 view .LVU3538
+ 401:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 11197              		.loc 1 401 32 is_stmt 0 view .LVU3539
+ 11198 0250 154B     		ldr	r3, .L679+28
+ 11199 0252 0222     		movs	r2, #2
+ 11200 0254 1A70     		strb	r2, [r3]
+ 402:Src/main.c    **** 				break;
+ 11201              		.loc 1 402 6 is_stmt 1 view .LVU3540
+ 402:Src/main.c    **** 				break;
+ 11202              		.loc 1 402 16 is_stmt 0 view .LVU3541
+ 11203 0256 124B     		ldr	r3, .L679+20
+ 11204 0258 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
+ 11205 025a 174B     		ldr	r3, .L679+44
+ 11206 025c 1A70     		strb	r2, [r3]
+ 403:Src/main.c    **** 				case REMOVE_FILE://5 - Remove file from SD
+ 11207              		.loc 1 403 5 is_stmt 1 view .LVU3542
+ 11208 025e 4EE7     		b	.L591
+ 11209              	.L600:
+ 405:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 11210              		.loc 1 405 6 view .LVU3543
+ 405:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 11211              		.loc 1 405 21 is_stmt 0 view .LVU3544
+ 11212 0260 FFF7FEFF 		bl	SD_REMOVE
+ 11213              	.LVL999:
+ 405:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 11214              		.loc 1 405 16 discriminator 1 view .LVU3545
+ 11215 0264 114A     		ldr	r2, .L679+32
+ 11216 0266 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 405:Src/main.c    **** 					UART_transmission_request = MESS_01;
+ 11217              		.loc 1 405 19 discriminator 1 view .LVU3546
+ 11218 0268 0343     		orrs	r3, r3, r0
+ 11219 026a 1370     		strb	r3, [r2]
+ 406:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11220              		.loc 1 406 6 is_stmt 1 view .LVU3547
+ 406:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11221              		.loc 1 406 32 is_stmt 0 view .LVU3548
+ 11222 026c 0E4B     		ldr	r3, .L679+28
+ 11223 026e 0122     		movs	r2, #1
+ 11224 0270 1A70     		strb	r2, [r3]
+ 407:Src/main.c    **** 				break;
+ 11225              		.loc 1 407 6 is_stmt 1 view .LVU3549
+ 407:Src/main.c    **** 				break;
+ 11226              		.loc 1 407 16 is_stmt 0 view .LVU3550
+ 11227 0272 0B4B     		ldr	r3, .L679+20
+ 11228 0274 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
+ARM GAS  /tmp/ccEQxcUB.s 			page 607
 
 
- 10424 026e 064B     		ldr	r3, .L612+16
- 10425 0270 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
- 10426 0272 0B4B     		ldr	r3, .L612+40
- 10427 0274 1A70     		strb	r2, [r3]
- 393:Src/main.c    **** 				case WORK_ENABLE://7 - Main work cycle
- 10428              		.loc 1 393 5 is_stmt 1 view .LVU3318
- 10429 0276 3CE7     		b	.L540
- 10430              	.L613:
- 10431              		.align	2
- 10432              	.L612:
- 10433 0278 00080040 		.word	1073743872
- 10434 027c 00000000 		.word	u_rx_flg
- 10435 0280 00100140 		.word	1073811456
- 10436 0284 00E100E0 		.word	-536813312
- 10437 0288 00000000 		.word	CPU_state_old
- 10438 028c 00000000 		.word	task
- 10439 0290 00000000 		.word	UART_transmission_request
- 10440 0294 00000000 		.word	State_Data
- 10441 0298 00000000 		.word	flg_tmt
- 10442 029c 00000240 		.word	1073872896
- 10443 02a0 00000000 		.word	CPU_state
- 10444 02a4 00000000 		.word	COMMAND
- 10445 02a8 00000000 		.word	CS_result
- 10446 02ac 00380040 		.word	1073756160
- 10447 02b0 00000000 		.word	Curr_setup
- 10448 02b4 00000000 		.word	LD2_curr_setup
- 10449 02b8 00000000 		.word	LD1_curr_setup
- 10450 02bc 00000000 		.word	TO6
- 10451 02c0 00000000 		.word	TO6_before
- 10452 02c4 00000000 		.word	Long_Data
- 10453 02c8 00000000 		.word	temp16
- 10454              	.L545:
- 395:Src/main.c    **** 					Stop_TIM10();
- 10455              		.loc 1 395 6 view .LVU3319
- 395:Src/main.c    **** 					Stop_TIM10();
- 10456              		.loc 1 395 31 is_stmt 0 view .LVU3320
- 10457 02cc 9C4B     		ldr	r3, .L614
- 10458 02ce 5A68     		ldr	r2, [r3, #4]	@ float
- 395:Src/main.c    **** 					Stop_TIM10();
- 10459              		.loc 1 395 25 view .LVU3321
- 10460 02d0 1A61     		str	r2, [r3, #16]	@ float
- 396:Src/main.c    **** 					if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
- 10461              		.loc 1 396 6 is_stmt 1 view .LVU3322
- 10462 02d2 FFF7FEFF 		bl	Stop_TIM10
- 10463              	.LVL911:
- 397:Src/main.c    **** 					{
- 10464              		.loc 1 397 6 view .LVU3323
- 397:Src/main.c    **** 					{
- 10465              		.loc 1 397 13 is_stmt 0 view .LVU3324
- 10466 02d6 9B4B     		ldr	r3, .L614+4
- 10467 02d8 1B68     		ldr	r3, [r3]
- 10468 02da 9B4A     		ldr	r2, .L614+8
- 10469 02dc 1268     		ldr	r2, [r2]
- 397:Src/main.c    **** 					{
- 10470              		.loc 1 397 9 view .LVU3325
- 10471 02de 9342     		cmp	r3, r2
- 10472 02e0 7FF607AF 		bls	.L540
-ARM GAS  /tmp/ccwR4KB7.s 			page 585
+ 11229 0276 104B     		ldr	r3, .L679+44
+ 11230 0278 1A70     		strb	r2, [r3]
+ 408:Src/main.c    **** 				case STATE://6 - Transmith state message
+ 11231              		.loc 1 408 5 is_stmt 1 view .LVU3551
+ 11232 027a 40E7     		b	.L591
+ 11233              	.L599:
+ 410:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 11234              		.loc 1 410 6 view .LVU3552
+ 410:Src/main.c    **** 					CPU_state = CPU_state_old;//Return to main current cycle
+ 11235              		.loc 1 410 32 is_stmt 0 view .LVU3553
+ 11236 027c 0A4B     		ldr	r3, .L679+28
+ 11237 027e 0122     		movs	r2, #1
+ 11238 0280 1A70     		strb	r2, [r3]
+ 411:Src/main.c    **** 				break;
+ 11239              		.loc 1 411 6 is_stmt 1 view .LVU3554
+ 411:Src/main.c    **** 				break;
+ 11240              		.loc 1 411 16 is_stmt 0 view .LVU3555
+ 11241 0282 074B     		ldr	r3, .L679+20
+ 11242 0284 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
+ 11243 0286 0C4B     		ldr	r3, .L679+44
+ 11244 0288 1A70     		strb	r2, [r3]
+ 412:Src/main.c    **** 				case WORK_ENABLE://7 - Main work cycle
+ 11245              		.loc 1 412 5 is_stmt 1 view .LVU3556
+ 11246 028a 38E7     		b	.L591
+ 11247              	.L680:
+ 11248              		.align	2
+ 11249              	.L679:
+ 11250 028c 00080040 		.word	1073743872
+ 11251 0290 00000000 		.word	htim1
+ 11252 0294 00000000 		.word	u_rx_flg
+ 11253 0298 00100140 		.word	1073811456
+ 11254 029c 00E100E0 		.word	-536813312
+ 11255 02a0 00000000 		.word	CPU_state_old
+ 11256 02a4 00000000 		.word	task
+ 11257 02a8 00000000 		.word	UART_transmission_request
+ 11258 02ac 00000000 		.word	State_Data
+ 11259 02b0 00000000 		.word	flg_tmt
+ 11260 02b4 00000240 		.word	1073872896
+ 11261 02b8 00000000 		.word	CPU_state
+ 11262 02bc 00000000 		.word	COMMAND
+ 11263 02c0 00000000 		.word	CS_result
+ 11264 02c4 00380040 		.word	1073756160
+ 11265 02c8 00000000 		.word	Curr_setup
+ 11266 02cc 00000000 		.word	LD2_curr_setup
+ 11267 02d0 00000000 		.word	LD1_curr_setup
+ 11268 02d4 00000000 		.word	TO6
+ 11269 02d8 00000000 		.word	TO6_before
+ 11270 02dc 00000000 		.word	Long_Data
+ 11271 02e0 00000000 		.word	temp16
+ 11272              	.L598:
+ 414:Src/main.c    **** 					Stop_TIM10();
+ 11273              		.loc 1 414 6 view .LVU3557
+ 414:Src/main.c    **** 					Stop_TIM10();
+ 11274              		.loc 1 414 31 is_stmt 0 view .LVU3558
+ 11275 02e4 B24B     		ldr	r3, .L681
+ 11276 02e6 5A68     		ldr	r2, [r3, #4]	@ float
+ 414:Src/main.c    **** 					Stop_TIM10();
+ARM GAS  /tmp/ccEQxcUB.s 			page 608
 
 
- 399:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 10473              		.loc 1 399 7 is_stmt 1 view .LVU3326
- 399:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 10474              		.loc 1 399 18 is_stmt 0 view .LVU3327
- 10475 02e4 984A     		ldr	r2, .L614+8
- 10476 02e6 1360     		str	r3, [r2]
- 400:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 10477              		.loc 1 400 7 is_stmt 1 view .LVU3328
- 400:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 10478              		.loc 1 400 25 is_stmt 0 view .LVU3329
- 10479 02e8 0120     		movs	r0, #1
- 10480 02ea FFF7FEFF 		bl	MPhD_T
- 10481              	.LVL912:
- 400:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 10482              		.loc 1 400 23 discriminator 1 view .LVU3330
- 10483 02ee 974F     		ldr	r7, .L614+12
- 10484 02f0 3881     		strh	r0, [r7, #8]	@ movhi
- 401:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 10485              		.loc 1 401 7 is_stmt 1 view .LVU3331
- 401:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 10486              		.loc 1 401 25 is_stmt 0 view .LVU3332
- 10487 02f2 0120     		movs	r0, #1
- 10488 02f4 FFF7FEFF 		bl	MPhD_T
- 10489              	.LVL913:
- 401:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 10490              		.loc 1 401 23 discriminator 1 view .LVU3333
- 10491 02f8 3881     		strh	r0, [r7, #8]	@ movhi
- 402:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 10492              		.loc 1 402 7 is_stmt 1 view .LVU3334
- 402:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 10493              		.loc 1 402 25 is_stmt 0 view .LVU3335
- 10494 02fa 0220     		movs	r0, #2
- 10495 02fc FFF7FEFF 		bl	MPhD_T
- 10496              	.LVL914:
- 402:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 10497              		.loc 1 402 23 discriminator 1 view .LVU3336
- 10498 0300 934E     		ldr	r6, .L614+16
- 10499 0302 3081     		strh	r0, [r6, #8]	@ movhi
- 403:Src/main.c    **** 						
- 10500              		.loc 1 403 7 is_stmt 1 view .LVU3337
- 403:Src/main.c    **** 						
- 10501              		.loc 1 403 25 is_stmt 0 view .LVU3338
- 10502 0304 0220     		movs	r0, #2
- 10503 0306 FFF7FEFF 		bl	MPhD_T
- 10504              	.LVL915:
- 403:Src/main.c    **** 						
- 10505              		.loc 1 403 23 discriminator 1 view .LVU3339
- 10506 030a 3081     		strh	r0, [r6, #8]	@ movhi
- 406:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(3);
- 10507              		.loc 1 406 7 is_stmt 1 view .LVU3340
- 406:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(3);
- 10508              		.loc 1 406 14 is_stmt 0 view .LVU3341
- 10509 030c 0320     		movs	r0, #3
- 10510 030e FFF7FEFF 		bl	MPhD_T
- 10511              	.LVL916:
- 407:Src/main.c    **** 						(void) MPhD_T(4);
- 10512              		.loc 1 407 7 is_stmt 1 view .LVU3342
-ARM GAS  /tmp/ccwR4KB7.s 			page 586
+ 11277              		.loc 1 414 25 view .LVU3559
+ 11278 02e8 1A61     		str	r2, [r3, #16]	@ float
+ 415:Src/main.c    **** 					if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
+ 11279              		.loc 1 415 6 is_stmt 1 view .LVU3560
+ 11280 02ea FFF7FEFF 		bl	Stop_TIM10
+ 11281              	.LVL1000:
+ 416:Src/main.c    **** 					{
+ 11282              		.loc 1 416 6 view .LVU3561
+ 416:Src/main.c    **** 					{
+ 11283              		.loc 1 416 13 is_stmt 0 view .LVU3562
+ 11284 02ee B14B     		ldr	r3, .L681+4
+ 11285 02f0 1B68     		ldr	r3, [r3]
+ 11286 02f2 B14A     		ldr	r2, .L681+8
+ 11287 02f4 1268     		ldr	r2, [r2]
+ 416:Src/main.c    **** 					{
+ 11288              		.loc 1 416 9 view .LVU3563
+ 11289 02f6 9342     		cmp	r3, r2
+ 11290 02f8 7FF601AF 		bls	.L591
+ 418:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 11291              		.loc 1 418 7 is_stmt 1 view .LVU3564
+ 418:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 11292              		.loc 1 418 18 is_stmt 0 view .LVU3565
+ 11293 02fc AE4A     		ldr	r2, .L681+8
+ 11294 02fe 1360     		str	r3, [r2]
+ 419:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 11295              		.loc 1 419 7 is_stmt 1 view .LVU3566
+ 419:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 11296              		.loc 1 419 25 is_stmt 0 view .LVU3567
+ 11297 0300 0120     		movs	r0, #1
+ 11298 0302 FFF7FEFF 		bl	MPhD_T
+ 11299              	.LVL1001:
+ 419:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 11300              		.loc 1 419 23 discriminator 1 view .LVU3568
+ 11301 0306 AD4F     		ldr	r7, .L681+12
+ 11302 0308 3881     		strh	r0, [r7, #8]	@ movhi
+ 420:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 11303              		.loc 1 420 7 is_stmt 1 view .LVU3569
+ 420:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 11304              		.loc 1 420 25 is_stmt 0 view .LVU3570
+ 11305 030a 0120     		movs	r0, #1
+ 11306 030c FFF7FEFF 		bl	MPhD_T
+ 11307              	.LVL1002:
+ 420:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 11308              		.loc 1 420 23 discriminator 1 view .LVU3571
+ 11309 0310 3881     		strh	r0, [r7, #8]	@ movhi
+ 421:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 11310              		.loc 1 421 7 is_stmt 1 view .LVU3572
+ 421:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 11311              		.loc 1 421 25 is_stmt 0 view .LVU3573
+ 11312 0312 0220     		movs	r0, #2
+ 11313 0314 FFF7FEFF 		bl	MPhD_T
+ 11314              	.LVL1003:
+ 421:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 11315              		.loc 1 421 23 discriminator 1 view .LVU3574
+ 11316 0318 A94E     		ldr	r6, .L681+16
+ 11317 031a 3081     		strh	r0, [r6, #8]	@ movhi
+ 422:Src/main.c    **** 						
+ARM GAS  /tmp/ccEQxcUB.s 			page 609
 
 
- 407:Src/main.c    **** 						(void) MPhD_T(4);
- 10513              		.loc 1 407 32 is_stmt 0 view .LVU3343
- 10514 0312 0320     		movs	r0, #3
- 10515 0314 FFF7FEFF 		bl	MPhD_T
- 10516              	.LVL917:
- 407:Src/main.c    **** 						(void) MPhD_T(4);
- 10517              		.loc 1 407 30 discriminator 1 view .LVU3344
- 10518 0318 3880     		strh	r0, [r7]	@ movhi
- 408:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(4);
- 10519              		.loc 1 408 7 is_stmt 1 view .LVU3345
- 408:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(4);
- 10520              		.loc 1 408 14 is_stmt 0 view .LVU3346
- 10521 031a 0420     		movs	r0, #4
- 10522 031c FFF7FEFF 		bl	MPhD_T
- 10523              	.LVL918:
- 409:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 10524              		.loc 1 409 7 is_stmt 1 view .LVU3347
- 409:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 10525              		.loc 1 409 32 is_stmt 0 view .LVU3348
- 10526 0320 0420     		movs	r0, #4
- 10527 0322 FFF7FEFF 		bl	MPhD_T
- 10528              	.LVL919:
- 409:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 10529              		.loc 1 409 30 discriminator 1 view .LVU3349
- 10530 0326 3080     		strh	r0, [r6]	@ movhi
- 410:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
- 10531              		.loc 1 410 7 is_stmt 1 view .LVU3350
- 410:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
- 10532              		.loc 1 410 14 is_stmt 0 view .LVU3351
- 10533 0328 DFF85882 		ldr	r8, .L614+68
- 10534 032c 0122     		movs	r2, #1
- 10535 032e 3946     		mov	r1, r7
- 10536 0330 4046     		mov	r0, r8
- 10537 0332 FFF7FEFF 		bl	PID_Controller_Temp
- 10538              	.LVL920:
- 10539 0336 0146     		mov	r1, r0
- 410:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
- 10540              		.loc 1 410 13 discriminator 1 view .LVU3352
- 10541 0338 864D     		ldr	r5, .L614+20
- 10542 033a 2880     		strh	r0, [r5]	@ movhi
- 411:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 10543              		.loc 1 411 7 is_stmt 1 view .LVU3353
- 10544 033c 0320     		movs	r0, #3
- 10545 033e FFF7FEFF 		bl	Set_LTEC
- 10546              	.LVL921:
- 412:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
- 10547              		.loc 1 412 7 view .LVU3354
- 412:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
- 10548              		.loc 1 412 14 is_stmt 0 view .LVU3355
- 10549 0342 DFF83C92 		ldr	r9, .L614+64
- 10550 0346 0222     		movs	r2, #2
- 10551 0348 3146     		mov	r1, r6
- 10552 034a 4846     		mov	r0, r9
- 10553 034c FFF7FEFF 		bl	PID_Controller_Temp
- 10554              	.LVL922:
- 10555 0350 0146     		mov	r1, r0
- 412:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
-ARM GAS  /tmp/ccwR4KB7.s 			page 587
+ 11318              		.loc 1 422 7 is_stmt 1 view .LVU3575
+ 422:Src/main.c    **** 						
+ 11319              		.loc 1 422 25 is_stmt 0 view .LVU3576
+ 11320 031c 0220     		movs	r0, #2
+ 11321 031e FFF7FEFF 		bl	MPhD_T
+ 11322              	.LVL1004:
+ 422:Src/main.c    **** 						
+ 11323              		.loc 1 422 23 discriminator 1 view .LVU3577
+ 11324 0322 3081     		strh	r0, [r6, #8]	@ movhi
+ 425:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(3);
+ 11325              		.loc 1 425 7 is_stmt 1 view .LVU3578
+ 425:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(3);
+ 11326              		.loc 1 425 14 is_stmt 0 view .LVU3579
+ 11327 0324 0320     		movs	r0, #3
+ 11328 0326 FFF7FEFF 		bl	MPhD_T
+ 11329              	.LVL1005:
+ 426:Src/main.c    **** 						(void) MPhD_T(4);
+ 11330              		.loc 1 426 7 is_stmt 1 view .LVU3580
+ 426:Src/main.c    **** 						(void) MPhD_T(4);
+ 11331              		.loc 1 426 32 is_stmt 0 view .LVU3581
+ 11332 032a 0320     		movs	r0, #3
+ 11333 032c FFF7FEFF 		bl	MPhD_T
+ 11334              	.LVL1006:
+ 426:Src/main.c    **** 						(void) MPhD_T(4);
+ 11335              		.loc 1 426 30 discriminator 1 view .LVU3582
+ 11336 0330 3880     		strh	r0, [r7]	@ movhi
+ 427:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(4);
+ 11337              		.loc 1 427 7 is_stmt 1 view .LVU3583
+ 427:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(4);
+ 11338              		.loc 1 427 14 is_stmt 0 view .LVU3584
+ 11339 0332 0420     		movs	r0, #4
+ 11340 0334 FFF7FEFF 		bl	MPhD_T
+ 11341              	.LVL1007:
+ 428:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 11342              		.loc 1 428 7 is_stmt 1 view .LVU3585
+ 428:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 11343              		.loc 1 428 32 is_stmt 0 view .LVU3586
+ 11344 0338 0420     		movs	r0, #4
+ 11345 033a FFF7FEFF 		bl	MPhD_T
+ 11346              	.LVL1008:
+ 428:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 11347              		.loc 1 428 30 discriminator 1 view .LVU3587
+ 11348 033e 3080     		strh	r0, [r6]	@ movhi
+ 429:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
+ 11349              		.loc 1 429 7 is_stmt 1 view .LVU3588
+ 429:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
+ 11350              		.loc 1 429 14 is_stmt 0 view .LVU3589
+ 11351 0340 DFF8AC82 		ldr	r8, .L681+64
+ 11352 0344 0122     		movs	r2, #1
+ 11353 0346 3946     		mov	r1, r7
+ 11354 0348 4046     		mov	r0, r8
+ 11355 034a FFF7FEFF 		bl	PID_Controller_Temp
+ 11356              	.LVL1009:
+ 11357 034e 0146     		mov	r1, r0
+ 429:Src/main.c    **** 						Set_LTEC(3, temp16);//Drive Laser TEC 1
+ 11358              		.loc 1 429 13 discriminator 1 view .LVU3590
+ 11359 0350 9C4D     		ldr	r5, .L681+20
+ARM GAS  /tmp/ccEQxcUB.s 			page 610
 
 
- 10556              		.loc 1 412 13 discriminator 1 view .LVU3356
- 10557 0352 2880     		strh	r0, [r5]	@ movhi
- 413:Src/main.c    **** 						
- 10558              		.loc 1 413 7 is_stmt 1 view .LVU3357
- 10559 0354 0420     		movs	r0, #4
- 10560 0356 FFF7FEFF 		bl	Set_LTEC
- 10561              	.LVL923:
- 415:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 10562              		.loc 1 415 7 view .LVU3358
- 415:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 10563              		.loc 1 415 31 is_stmt 0 view .LVU3359
- 10564 035a 3B89     		ldrh	r3, [r7, #8]
- 415:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 10565              		.loc 1 415 20 view .LVU3360
- 10566 035c 7E4C     		ldr	r4, .L614+24
- 10567 035e 6380     		strh	r3, [r4, #2]	@ movhi
- 416:Src/main.c    **** 
- 10568              		.loc 1 416 7 is_stmt 1 view .LVU3361
- 416:Src/main.c    **** 
- 10569              		.loc 1 416 31 is_stmt 0 view .LVU3362
- 10570 0360 3389     		ldrh	r3, [r6, #8]
- 416:Src/main.c    **** 
- 10571              		.loc 1 416 20 view .LVU3363
- 10572 0362 A380     		strh	r3, [r4, #4]	@ movhi
- 418:Src/main.c    **** 						Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
- 10573              		.loc 1 418 7 is_stmt 1 view .LVU3364
- 10574 0364 B8F80C10 		ldrh	r1, [r8, #12]
- 10575 0368 0120     		movs	r0, #1
- 10576 036a FFF7FEFF 		bl	Set_LTEC
- 10577              	.LVL924:
- 419:Src/main.c    **** 
- 10578              		.loc 1 419 7 view .LVU3365
- 10579 036e B9F80C10 		ldrh	r1, [r9, #12]
- 10580 0372 0220     		movs	r0, #2
- 10581 0374 FFF7FEFF 		bl	Set_LTEC
- 10582              	.LVL925:
- 423:Src/main.c    **** 						temp16 = Get_ADC(1);
- 10583              		.loc 1 423 7 view .LVU3366
- 423:Src/main.c    **** 						temp16 = Get_ADC(1);
- 10584              		.loc 1 423 16 is_stmt 0 view .LVU3367
- 10585 0378 0020     		movs	r0, #0
- 10586 037a FFF7FEFF 		bl	Get_ADC
- 10587              	.LVL926:
- 423:Src/main.c    **** 						temp16 = Get_ADC(1);
- 10588              		.loc 1 423 14 discriminator 1 view .LVU3368
- 10589 037e 2880     		strh	r0, [r5]	@ movhi
- 424:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 10590              		.loc 1 424 7 is_stmt 1 view .LVU3369
- 424:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 10591              		.loc 1 424 16 is_stmt 0 view .LVU3370
- 10592 0380 0120     		movs	r0, #1
- 10593 0382 FFF7FEFF 		bl	Get_ADC
- 10594              	.LVL927:
- 424:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 10595              		.loc 1 424 14 discriminator 1 view .LVU3371
- 10596 0386 2880     		strh	r0, [r5]	@ movhi
- 425:Src/main.c    **** 						
-ARM GAS  /tmp/ccwR4KB7.s 			page 588
+ 11360 0352 2880     		strh	r0, [r5]	@ movhi
+ 430:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 11361              		.loc 1 430 7 is_stmt 1 view .LVU3591
+ 11362 0354 0320     		movs	r0, #3
+ 11363 0356 FFF7FEFF 		bl	Set_LTEC
+ 11364              	.LVL1010:
+ 431:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
+ 11365              		.loc 1 431 7 view .LVU3592
+ 431:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
+ 11366              		.loc 1 431 14 is_stmt 0 view .LVU3593
+ 11367 035a DFF89892 		ldr	r9, .L681+68
+ 11368 035e 0222     		movs	r2, #2
+ 11369 0360 3146     		mov	r1, r6
+ 11370 0362 4846     		mov	r0, r9
+ 11371 0364 FFF7FEFF 		bl	PID_Controller_Temp
+ 11372              	.LVL1011:
+ 11373 0368 0146     		mov	r1, r0
+ 431:Src/main.c    **** 						Set_LTEC(4, temp16);//Drive Laser TEC 2
+ 11374              		.loc 1 431 13 discriminator 1 view .LVU3594
+ 11375 036a 2880     		strh	r0, [r5]	@ movhi
+ 432:Src/main.c    **** 						
+ 11376              		.loc 1 432 7 is_stmt 1 view .LVU3595
+ 11377 036c 0420     		movs	r0, #4
+ 11378 036e FFF7FEFF 		bl	Set_LTEC
+ 11379              	.LVL1012:
+ 434:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ 11380              		.loc 1 434 7 view .LVU3596
+ 434:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ 11381              		.loc 1 434 31 is_stmt 0 view .LVU3597
+ 11382 0372 3B89     		ldrh	r3, [r7, #8]
+ 434:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ 11383              		.loc 1 434 20 view .LVU3598
+ 11384 0374 944C     		ldr	r4, .L681+24
+ 11385 0376 6380     		strh	r3, [r4, #2]	@ movhi
+ 435:Src/main.c    **** 
+ 11386              		.loc 1 435 7 is_stmt 1 view .LVU3599
+ 435:Src/main.c    **** 
+ 11387              		.loc 1 435 31 is_stmt 0 view .LVU3600
+ 11388 0378 3389     		ldrh	r3, [r6, #8]
+ 435:Src/main.c    **** 
+ 11389              		.loc 1 435 20 view .LVU3601
+ 11390 037a A380     		strh	r3, [r4, #4]	@ movhi
+ 437:Src/main.c    **** 						Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
+ 11391              		.loc 1 437 7 is_stmt 1 view .LVU3602
+ 11392 037c B8F80C10 		ldrh	r1, [r8, #12]
+ 11393 0380 0120     		movs	r0, #1
+ 11394 0382 FFF7FEFF 		bl	Set_LTEC
+ 11395              	.LVL1013:
+ 438:Src/main.c    **** 
+ 11396              		.loc 1 438 7 view .LVU3603
+ 11397 0386 B9F80C10 		ldrh	r1, [r9, #12]
+ 11398 038a 0220     		movs	r0, #2
+ 11399 038c FFF7FEFF 		bl	Set_LTEC
+ 11400              	.LVL1014:
+ 442:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 11401              		.loc 1 442 7 view .LVU3604
+ 442:Src/main.c    **** 						temp16 = Get_ADC(1);
+ARM GAS  /tmp/ccEQxcUB.s 			page 611
 
 
- 10597              		.loc 1 425 7 is_stmt 1 view .LVU3372
- 425:Src/main.c    **** 						
- 10598              		.loc 1 425 20 is_stmt 0 view .LVU3373
- 10599 0388 E081     		strh	r0, [r4, #14]	@ movhi
- 428:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- 10600              		.loc 1 428 7 is_stmt 1 view .LVU3374
- 428:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- 10601              		.loc 1 428 16 is_stmt 0 view .LVU3375
- 10602 038a 0120     		movs	r0, #1
- 10603 038c FFF7FEFF 		bl	Get_ADC
- 10604              	.LVL928:
- 428:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- 10605              		.loc 1 428 14 discriminator 1 view .LVU3376
- 10606 0390 2880     		strh	r0, [r5]	@ movhi
- 429:Src/main.c    **** 						
- 10607              		.loc 1 429 7 is_stmt 1 view .LVU3377
- 429:Src/main.c    **** 						
- 10608              		.loc 1 429 20 is_stmt 0 view .LVU3378
- 10609 0392 2082     		strh	r0, [r4, #16]	@ movhi
- 432:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 10610              		.loc 1 432 7 is_stmt 1 view .LVU3379
- 432:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 10611              		.loc 1 432 16 is_stmt 0 view .LVU3380
- 10612 0394 0120     		movs	r0, #1
- 10613 0396 FFF7FEFF 		bl	Get_ADC
- 10614              	.LVL929:
- 432:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 10615              		.loc 1 432 14 discriminator 1 view .LVU3381
- 10616 039a 2880     		strh	r0, [r5]	@ movhi
- 433:Src/main.c    **** 						
- 10617              		.loc 1 433 7 is_stmt 1 view .LVU3382
- 433:Src/main.c    **** 						
- 10618              		.loc 1 433 20 is_stmt 0 view .LVU3383
- 10619 039c 6082     		strh	r0, [r4, #18]	@ movhi
- 436:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 10620              		.loc 1 436 7 is_stmt 1 view .LVU3384
- 436:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 10621              		.loc 1 436 16 is_stmt 0 view .LVU3385
- 10622 039e 0120     		movs	r0, #1
- 10623 03a0 FFF7FEFF 		bl	Get_ADC
- 10624              	.LVL930:
- 436:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 10625              		.loc 1 436 14 discriminator 1 view .LVU3386
- 10626 03a4 2880     		strh	r0, [r5]	@ movhi
- 437:Src/main.c    **** 						
- 10627              		.loc 1 437 7 is_stmt 1 view .LVU3387
- 437:Src/main.c    **** 						
- 10628              		.loc 1 437 21 is_stmt 0 view .LVU3388
- 10629 03a6 A082     		strh	r0, [r4, #20]	@ movhi
- 440:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- 10630              		.loc 1 440 7 is_stmt 1 view .LVU3389
- 440:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- 10631              		.loc 1 440 16 is_stmt 0 view .LVU3390
- 10632 03a8 0120     		movs	r0, #1
- 10633 03aa FFF7FEFF 		bl	Get_ADC
- 10634              	.LVL931:
- 440:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
-ARM GAS  /tmp/ccwR4KB7.s 			page 589
+ 11402              		.loc 1 442 16 is_stmt 0 view .LVU3605
+ 11403 0390 0020     		movs	r0, #0
+ 11404 0392 FFF7FEFF 		bl	Get_ADC
+ 11405              	.LVL1015:
+ 442:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 11406              		.loc 1 442 14 discriminator 1 view .LVU3606
+ 11407 0396 2880     		strh	r0, [r5]	@ movhi
+ 443:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
+ 11408              		.loc 1 443 7 is_stmt 1 view .LVU3607
+ 443:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
+ 11409              		.loc 1 443 16 is_stmt 0 view .LVU3608
+ 11410 0398 0120     		movs	r0, #1
+ 11411 039a FFF7FEFF 		bl	Get_ADC
+ 11412              	.LVL1016:
+ 443:Src/main.c    **** 						Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
+ 11413              		.loc 1 443 14 discriminator 1 view .LVU3609
+ 11414 039e 2880     		strh	r0, [r5]	@ movhi
+ 444:Src/main.c    **** 						
+ 11415              		.loc 1 444 7 is_stmt 1 view .LVU3610
+ 444:Src/main.c    **** 						
+ 11416              		.loc 1 444 20 is_stmt 0 view .LVU3611
+ 11417 03a0 E081     		strh	r0, [r4, #14]	@ movhi
+ 447:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
+ 11418              		.loc 1 447 7 is_stmt 1 view .LVU3612
+ 447:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
+ 11419              		.loc 1 447 16 is_stmt 0 view .LVU3613
+ 11420 03a2 0120     		movs	r0, #1
+ 11421 03a4 FFF7FEFF 		bl	Get_ADC
+ 11422              	.LVL1017:
+ 447:Src/main.c    **** 						Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
+ 11423              		.loc 1 447 14 discriminator 1 view .LVU3614
+ 11424 03a8 2880     		strh	r0, [r5]	@ movhi
+ 448:Src/main.c    **** 						
+ 11425              		.loc 1 448 7 is_stmt 1 view .LVU3615
+ 448:Src/main.c    **** 						
+ 11426              		.loc 1 448 20 is_stmt 0 view .LVU3616
+ 11427 03aa 2082     		strh	r0, [r4, #16]	@ movhi
+ 451:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
+ 11428              		.loc 1 451 7 is_stmt 1 view .LVU3617
+ 451:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
+ 11429              		.loc 1 451 16 is_stmt 0 view .LVU3618
+ 11430 03ac 0120     		movs	r0, #1
+ 11431 03ae FFF7FEFF 		bl	Get_ADC
+ 11432              	.LVL1018:
+ 451:Src/main.c    **** 						Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
+ 11433              		.loc 1 451 14 discriminator 1 view .LVU3619
+ 11434 03b2 2880     		strh	r0, [r5]	@ movhi
+ 452:Src/main.c    **** 						
+ 11435              		.loc 1 452 7 is_stmt 1 view .LVU3620
+ 452:Src/main.c    **** 						
+ 11436              		.loc 1 452 20 is_stmt 0 view .LVU3621
+ 11437 03b4 6082     		strh	r0, [r4, #18]	@ movhi
+ 455:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
+ 11438              		.loc 1 455 7 is_stmt 1 view .LVU3622
+ 455:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
+ 11439              		.loc 1 455 16 is_stmt 0 view .LVU3623
+ 11440 03b6 0120     		movs	r0, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 612
 
 
- 10635              		.loc 1 440 14 discriminator 1 view .LVU3391
- 10636 03ae 2880     		strh	r0, [r5]	@ movhi
- 441:Src/main.c    **** 						temp16 = Get_ADC(2);
- 10637              		.loc 1 441 7 is_stmt 1 view .LVU3392
- 441:Src/main.c    **** 						temp16 = Get_ADC(2);
- 10638              		.loc 1 441 21 is_stmt 0 view .LVU3393
- 10639 03b0 E082     		strh	r0, [r4, #22]	@ movhi
- 442:Src/main.c    **** 						
- 10640              		.loc 1 442 7 is_stmt 1 view .LVU3394
- 442:Src/main.c    **** 						
- 10641              		.loc 1 442 16 is_stmt 0 view .LVU3395
- 10642 03b2 0220     		movs	r0, #2
- 10643 03b4 FFF7FEFF 		bl	Get_ADC
- 10644              	.LVL932:
- 442:Src/main.c    **** 						
- 10645              		.loc 1 442 14 discriminator 1 view .LVU3396
- 10646 03b8 2880     		strh	r0, [r5]	@ movhi
- 445:Src/main.c    **** 						temp16 = Get_ADC(4);
- 10647              		.loc 1 445 7 is_stmt 1 view .LVU3397
- 445:Src/main.c    **** 						temp16 = Get_ADC(4);
- 10648              		.loc 1 445 16 is_stmt 0 view .LVU3398
- 10649 03ba 0320     		movs	r0, #3
- 10650 03bc FFF7FEFF 		bl	Get_ADC
- 10651              	.LVL933:
- 445:Src/main.c    **** 						temp16 = Get_ADC(4);
- 10652              		.loc 1 445 14 discriminator 1 view .LVU3399
- 10653 03c0 2880     		strh	r0, [r5]	@ movhi
- 446:Src/main.c    **** 						Long_Data[12] = temp16;
- 10654              		.loc 1 446 7 is_stmt 1 view .LVU3400
- 446:Src/main.c    **** 						Long_Data[12] = temp16;
- 10655              		.loc 1 446 16 is_stmt 0 view .LVU3401
- 10656 03c2 0420     		movs	r0, #4
- 10657 03c4 FFF7FEFF 		bl	Get_ADC
- 10658              	.LVL934:
- 446:Src/main.c    **** 						Long_Data[12] = temp16;
- 10659              		.loc 1 446 14 discriminator 1 view .LVU3402
- 10660 03c8 2880     		strh	r0, [r5]	@ movhi
- 447:Src/main.c    **** 						temp16 = Get_ADC(5);
- 10661              		.loc 1 447 7 is_stmt 1 view .LVU3403
- 447:Src/main.c    **** 						temp16 = Get_ADC(5);
- 10662              		.loc 1 447 21 is_stmt 0 view .LVU3404
- 10663 03ca 2083     		strh	r0, [r4, #24]	@ movhi
- 448:Src/main.c    **** 													
- 10664              		.loc 1 448 7 is_stmt 1 view .LVU3405
- 448:Src/main.c    **** 													
- 10665              		.loc 1 448 16 is_stmt 0 view .LVU3406
- 10666 03cc 0520     		movs	r0, #5
- 10667 03ce FFF7FEFF 		bl	Get_ADC
- 10668              	.LVL935:
- 448:Src/main.c    **** 													
- 10669              		.loc 1 448 14 discriminator 1 view .LVU3407
- 10670 03d2 2880     		strh	r0, [r5]	@ movhi
- 451:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
- 10671              		.loc 1 451 7 is_stmt 1 view .LVU3408
- 451:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
- 10672              		.loc 1 451 16 is_stmt 0 view .LVU3409
- 10673 03d4 614B     		ldr	r3, .L614+28
-ARM GAS  /tmp/ccwR4KB7.s 			page 590
-
-
- 10674 03d6 1B68     		ldr	r3, [r3]
- 10675 03d8 614A     		ldr	r2, .L614+32
- 10676 03da 1360     		str	r3, [r2]
- 452:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
- 10677              		.loc 1 452 7 is_stmt 1 view .LVU3410
- 452:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
- 10678              		.loc 1 452 20 is_stmt 0 view .LVU3411
- 10679 03dc E380     		strh	r3, [r4, #6]	@ movhi
- 453:Src/main.c    **** 						
- 10680              		.loc 1 453 7 is_stmt 1 view .LVU3412
- 453:Src/main.c    **** 						
- 10681              		.loc 1 453 31 is_stmt 0 view .LVU3413
- 10682 03de 1B0C     		lsrs	r3, r3, #16
- 453:Src/main.c    **** 						
- 10683              		.loc 1 453 20 view .LVU3414
- 10684 03e0 2381     		strh	r3, [r4, #8]	@ movhi
+ 11441 03b8 FFF7FEFF 		bl	Get_ADC
+ 11442              	.LVL1019:
+ 455:Src/main.c    **** 						Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
+ 11443              		.loc 1 455 14 discriminator 1 view .LVU3624
+ 11444 03bc 2880     		strh	r0, [r5]	@ movhi
  456:Src/main.c    **** 						
- 10685              		.loc 1 456 7 is_stmt 1 view .LVU3415
+ 11445              		.loc 1 456 7 is_stmt 1 view .LVU3625
  456:Src/main.c    **** 						
- 10686              		.loc 1 456 31 is_stmt 0 view .LVU3416
- 10687 03e2 3B88     		ldrh	r3, [r7]
- 456:Src/main.c    **** 						
- 10688              		.loc 1 456 20 view .LVU3417
- 10689 03e4 6381     		strh	r3, [r4, #10]	@ movhi
- 459:Src/main.c    **** 
- 10690              		.loc 1 459 7 is_stmt 1 view .LVU3418
- 459:Src/main.c    **** 
- 10691              		.loc 1 459 31 is_stmt 0 view .LVU3419
- 10692 03e6 3388     		ldrh	r3, [r6]
- 459:Src/main.c    **** 
- 10693              		.loc 1 459 20 view .LVU3420
- 10694 03e8 A381     		strh	r3, [r4, #12]	@ movhi
- 461:Src/main.c    **** 						{
- 10695              		.loc 1 461 7 is_stmt 1 view .LVU3421
- 461:Src/main.c    **** 						{
- 10696              		.loc 1 461 21 is_stmt 0 view .LVU3422
- 10697 03ea 5E4B     		ldr	r3, .L614+36
- 10698 03ec DB7A     		ldrb	r3, [r3, #11]	@ zero_extendqisi2
- 461:Src/main.c    **** 						{
- 10699              		.loc 1 461 10 view .LVU3423
- 10700 03ee 012B     		cmp	r3, #1
- 10701 03f0 03D0     		beq	.L604
- 10702              	.L557:
- 468:Src/main.c    **** 						}
- 10703              		.loc 1 468 7 is_stmt 1 view .LVU3424
- 468:Src/main.c    **** 						}
- 10704              		.loc 1 468 21 is_stmt 0 view .LVU3425
- 10705 03f2 5D4B     		ldr	r3, .L614+40
- 10706 03f4 0722     		movs	r2, #7
- 10707 03f6 1A70     		strb	r2, [r3]
- 10708 03f8 7BE6     		b	.L540
- 10709              	.L604:
- 463:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
- 10710              		.loc 1 463 8 is_stmt 1 view .LVU3426
- 463:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
- 10711              		.loc 1 463 20 is_stmt 0 view .LVU3427
- 10712 03fa 0234     		adds	r4, r4, #2
-ARM GAS  /tmp/ccwR4KB7.s 			page 591
-
-
- 10713 03fc 0D21     		movs	r1, #13
- 10714 03fe 2046     		mov	r0, r4
- 10715 0400 FFF7FEFF 		bl	CalculateChecksum
- 10716              	.LVL936:
- 10717 0404 0346     		mov	r3, r0
- 463:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
- 10718              		.loc 1 463 18 discriminator 1 view .LVU3428
- 10719 0406 594A     		ldr	r2, .L614+44
- 10720 0408 1080     		strh	r0, [r2]	@ movhi
- 464:Src/main.c    **** 							temp16 = SD_SAVE(&Long_Data[0]);
- 10721              		.loc 1 464 8 is_stmt 1 view .LVU3429
- 464:Src/main.c    **** 							temp16 = SD_SAVE(&Long_Data[0]);
- 10722              		.loc 1 464 27 is_stmt 0 view .LVU3430
- 10723 040a A01E     		subs	r0, r4, #2
- 10724 040c 8383     		strh	r3, [r0, #28]	@ movhi
- 465:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
- 10725              		.loc 1 465 8 is_stmt 1 view .LVU3431
- 465:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
- 10726              		.loc 1 465 17 is_stmt 0 view .LVU3432
- 10727 040e FFF7FEFF 		bl	SD_SAVE
- 10728              	.LVL937:
- 10729 0412 0346     		mov	r3, r0
- 465:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
- 10730              		.loc 1 465 15 discriminator 1 view .LVU3433
- 10731 0414 2880     		strh	r0, [r5]	@ movhi
- 466:Src/main.c    **** 						}
- 10732              		.loc 1 466 8 is_stmt 1 view .LVU3434
- 466:Src/main.c    **** 						}
- 10733              		.loc 1 466 18 is_stmt 0 view .LVU3435
- 10734 0416 5649     		ldr	r1, .L614+48
- 10735 0418 0A78     		ldrb	r2, [r1]	@ zero_extendqisi2
- 466:Src/main.c    **** 						}
- 10736              		.loc 1 466 21 view .LVU3436
- 10737 041a 1343     		orrs	r3, r3, r2
- 10738 041c 0B70     		strb	r3, [r1]
- 10739 041e E8E7     		b	.L557
- 10740              	.L541:
- 472:Src/main.c    **** 					{
- 10741              		.loc 1 472 6 is_stmt 1 view .LVU3437
- 472:Src/main.c    **** 					{
- 10742              		.loc 1 472 10 is_stmt 0 view .LVU3438
- 10743 0420 544C     		ldr	r4, .L614+52
- 10744 0422 0321     		movs	r1, #3
- 10745 0424 2046     		mov	r0, r4
- 10746 0426 FFF7FEFF 		bl	CalculateChecksum
- 10747              	.LVL938:
- 472:Src/main.c    **** 					{
- 10748              		.loc 1 472 69 discriminator 1 view .LVU3439
- 10749 042a E388     		ldrh	r3, [r4, #6]
- 472:Src/main.c    **** 					{
- 10750              		.loc 1 472 9 discriminator 1 view .LVU3440
- 10751 042c 9842     		cmp	r0, r3
- 10752 042e 0CD0     		beq	.L605
- 531:Src/main.c    **** 					}
- 10753              		.loc 1 531 7 is_stmt 1 view .LVU3441
- 531:Src/main.c    **** 					}
- 10754              		.loc 1 531 17 is_stmt 0 view .LVU3442
-ARM GAS  /tmp/ccwR4KB7.s 			page 592
-
-
- 10755 0430 4F4A     		ldr	r2, .L614+48
- 10756 0432 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
- 531:Src/main.c    **** 					}
- 10757              		.loc 1 531 21 view .LVU3443
- 10758 0434 43F00403 		orr	r3, r3, #4
- 10759 0438 1370     		strb	r3, [r2]
- 10760              	.L560:
- 533:Src/main.c    **** 					CPU_state = CPU_state_old;
- 10761              		.loc 1 533 6 is_stmt 1 view .LVU3444
- 533:Src/main.c    **** 					CPU_state = CPU_state_old;
- 10762              		.loc 1 533 32 is_stmt 0 view .LVU3445
- 10763 043a 4F4B     		ldr	r3, .L614+56
- 10764 043c 0122     		movs	r2, #1
- 10765 043e 1A70     		strb	r2, [r3]
- 534:Src/main.c    **** 				break;
- 10766              		.loc 1 534 6 is_stmt 1 view .LVU3446
- 534:Src/main.c    **** 				break;
- 10767              		.loc 1 534 16 is_stmt 0 view .LVU3447
- 10768 0440 494B     		ldr	r3, .L614+40
- 10769 0442 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
- 10770 0444 4D4B     		ldr	r3, .L614+60
- 10771 0446 1A70     		strb	r2, [r3]
- 535:Src/main.c    **** 				case DECODE_TASK:
- 10772              		.loc 1 535 5 is_stmt 1 view .LVU3448
- 10773 0448 53E6     		b	.L540
- 10774              	.L605:
- 10775              	.LBB666:
- 474:Src/main.c    **** 						uint16_t param0 = COMMAND[1];
- 10776              		.loc 1 474 7 view .LVU3449
- 474:Src/main.c    **** 						uint16_t param0 = COMMAND[1];
- 10777              		.loc 1 474 16 is_stmt 0 view .LVU3450
- 10778 044a 2388     		ldrh	r3, [r4]
- 10779              	.LVL939:
- 475:Src/main.c    **** 						uint16_t param1 = COMMAND[2];
- 10780              		.loc 1 475 7 is_stmt 1 view .LVU3451
- 475:Src/main.c    **** 						uint16_t param1 = COMMAND[2];
- 10781              		.loc 1 475 16 is_stmt 0 view .LVU3452
- 10782 044c 6588     		ldrh	r5, [r4, #2]
- 10783              	.LVL940:
- 476:Src/main.c    **** 						uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
- 10784              		.loc 1 476 7 is_stmt 1 view .LVU3453
- 476:Src/main.c    **** 						uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
- 10785              		.loc 1 476 16 is_stmt 0 view .LVU3454
- 10786 044e A488     		ldrh	r4, [r4, #4]
- 10787              	.LVL941:
- 477:Src/main.c    **** 						uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
- 10788              		.loc 1 477 7 is_stmt 1 view .LVU3455
- 477:Src/main.c    **** 						uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
- 10789              		.loc 1 477 15 is_stmt 0 view .LVU3456
- 10790 0450 03F00107 		and	r7, r3, #1
- 10791              	.LVL942:
- 478:Src/main.c    **** 						uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
- 10792              		.loc 1 478 7 is_stmt 1 view .LVU3457
- 478:Src/main.c    **** 						uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
- 10793              		.loc 1 478 15 is_stmt 0 view .LVU3458
- 10794 0454 C3F34006 		ubfx	r6, r3, #1, #1
- 10795              	.LVL943:
-ARM GAS  /tmp/ccwR4KB7.s 			page 593
-
-
- 479:Src/main.c    **** 
- 10796              		.loc 1 479 7 is_stmt 1 view .LVU3459
- 481:Src/main.c    **** 						{
- 10797              		.loc 1 481 7 view .LVU3460
- 481:Src/main.c    **** 						{
- 10798              		.loc 1 481 10 is_stmt 0 view .LVU3461
- 10799 0458 13F0040F 		tst	r3, #4
- 10800 045c 10D1     		bne	.L606
- 10801              	.LBB667:
- 494:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 10802              		.loc 1 494 8 is_stmt 1 view .LVU3462
- 494:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 10803              		.loc 1 494 16 is_stmt 0 view .LVU3463
- 10804 045e 06B1     		cbz	r6, .L561
- 494:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 10805              		.loc 1 494 16 discriminator 1 view .LVU3464
- 10806 0460 0226     		movs	r6, #2
- 10807              	.LVL944:
- 10808              	.L561:
- 495:Src/main.c    **** 							uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
- 10809              		.loc 1 495 8 is_stmt 1 view .LVU3465
- 495:Src/main.c    **** 							uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
- 10810              		.loc 1 495 16 is_stmt 0 view .LVU3466
- 10811 0462 5FFA85F8 		uxtb	r8, r5
- 10812              	.LVL945:
- 496:Src/main.c    **** 							uint16_t pat_period = param1;
- 10813              		.loc 1 496 8 is_stmt 1 view .LVU3467
- 496:Src/main.c    **** 							uint16_t pat_period = param1;
- 10814              		.loc 1 496 16 is_stmt 0 view .LVU3468
- 10815 0466 C5F30329 		ubfx	r9, r5, #8, #4
- 10816              	.LVL946:
- 497:Src/main.c    **** 
- 10817              		.loc 1 497 8 is_stmt 1 view .LVU3469
- 499:Src/main.c    **** 							{
- 10818              		.loc 1 499 8 view .LVU3470
- 499:Src/main.c    **** 							{
- 10819              		.loc 1 499 11 is_stmt 0 view .LVU3471
- 10820 046a 2543     		orrs	r5, r5, r4
- 10821              	.LVL947:
- 499:Src/main.c    **** 							{
- 10822              		.loc 1 499 11 view .LVU3472
- 10823 046c 25D0     		beq	.L594
- 507:Src/main.c    **** 								{
- 10824              		.loc 1 507 9 is_stmt 1 view .LVU3473
- 507:Src/main.c    **** 								{
- 10825              		.loc 1 507 12 is_stmt 0 view .LVU3474
- 10826 046e B8F1000F 		cmp	r8, #0
- 10827 0472 1CD0     		beq	.L595
- 511:Src/main.c    **** 								{
- 10828              		.loc 1 511 14 is_stmt 1 view .LVU3475
- 511:Src/main.c    **** 								{
- 10829              		.loc 1 511 17 is_stmt 0 view .LVU3476
- 10830 0474 B8F13F0F 		cmp	r8, #63
- 10831 0478 1BD9     		bls	.L563
- 513:Src/main.c    **** 								}
- 10832              		.loc 1 513 19 view .LVU3477
- 10833 047a 4FF03F08 		mov	r8, #63
-ARM GAS  /tmp/ccwR4KB7.s 			page 594
-
-
- 10834              	.LVL948:
- 513:Src/main.c    **** 								}
- 10835              		.loc 1 513 19 view .LVU3478
- 10836 047e 18E0     		b	.L563
- 10837              	.LVL949:
- 10838              	.L606:
- 513:Src/main.c    **** 								}
- 10839              		.loc 1 513 19 view .LVU3479
- 10840              	.LBE667:
- 10841              	.LBB668:
- 483:Src/main.c    **** 							uint8_t hold = (uint8_t)(param1 & 0x0Fu);
- 10842              		.loc 1 483 8 is_stmt 1 view .LVU3480
- 484:Src/main.c    **** 							uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle);
- 10843              		.loc 1 484 8 view .LVU3481
- 484:Src/main.c    **** 							uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle);
- 10844              		.loc 1 484 16 is_stmt 0 view .LVU3482
- 10845 0480 04F00F04 		and	r4, r4, #15
- 10846              	.LVL950:
- 485:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 10847              		.loc 1 485 8 is_stmt 1 view .LVU3483
- 485:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 10848              		.loc 1 485 30 is_stmt 0 view .LVU3484
- 10849 0484 3346     		mov	r3, r6
- 10850              	.LVL951:
- 485:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 10851              		.loc 1 485 30 view .LVU3485
- 10852 0486 2246     		mov	r2, r4
- 10853 0488 2946     		mov	r1, r5
- 10854 048a 3846     		mov	r0, r7
- 10855 048c FFF7FEFF 		bl	AD9102_ApplySram
- 10856              	.LVL952:
- 486:Src/main.c    **** 							if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
- 10857              		.loc 1 486 8 is_stmt 1 view .LVU3486
- 486:Src/main.c    **** 							if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
- 10858              		.loc 1 486 22 is_stmt 0 view .LVU3487
- 10859 0490 374B     		ldr	r3, .L614+48
- 10860 0492 5870     		strb	r0, [r3, #1]
- 487:Src/main.c    **** 							{
- 10861              		.loc 1 487 8 is_stmt 1 view .LVU3488
- 487:Src/main.c    **** 							{
- 10862              		.loc 1 487 12 is_stmt 0 view .LVU3489
- 10863 0494 2346     		mov	r3, r4
- 10864 0496 2A46     		mov	r2, r5
- 10865 0498 3946     		mov	r1, r7
- 10866 049a FFF7FEFF 		bl	AD9102_CheckFlagsSram
- 10867              	.LVL953:
- 487:Src/main.c    **** 							{
- 10868              		.loc 1 487 11 discriminator 1 view .LVU3490
- 10869 049e 0028     		cmp	r0, #0
- 10870 04a0 CBD0     		beq	.L560
- 489:Src/main.c    **** 							}
- 10871              		.loc 1 489 9 is_stmt 1 view .LVU3491
- 489:Src/main.c    **** 							}
- 10872              		.loc 1 489 19 is_stmt 0 view .LVU3492
- 10873 04a2 334A     		ldr	r2, .L614+48
- 10874 04a4 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
- 489:Src/main.c    **** 							}
-ARM GAS  /tmp/ccwR4KB7.s 			page 595
-
-
- 10875              		.loc 1 489 23 view .LVU3493
- 10876 04a6 63F07F03 		orn	r3, r3, #127
- 10877 04aa 1370     		strb	r3, [r2]
- 10878 04ac C5E7     		b	.L560
- 10879              	.LVL954:
- 10880              	.L595:
- 489:Src/main.c    **** 							}
- 10881              		.loc 1 489 23 view .LVU3494
- 10882              	.LBE668:
- 10883              	.LBB669:
- 509:Src/main.c    **** 								}
- 10884              		.loc 1 509 19 view .LVU3495
- 10885 04ae 4FF00108 		mov	r8, #1
- 10886              	.LVL955:
- 10887              	.L563:
- 515:Src/main.c    **** 								{
- 10888              		.loc 1 515 9 is_stmt 1 view .LVU3496
- 515:Src/main.c    **** 								{
- 10889              		.loc 1 515 12 is_stmt 0 view .LVU3497
- 10890 04b2 44B9     		cbnz	r4, .L562
- 517:Src/main.c    **** 								}
- 10891              		.loc 1 517 21 view .LVU3498
- 10892 04b4 4FF6FF74 		movw	r4, #65535
- 10893              	.LVL956:
- 517:Src/main.c    **** 								}
- 10894              		.loc 1 517 21 view .LVU3499
- 10895 04b8 05E0     		b	.L562
- 10896              	.LVL957:
- 10897              	.L594:
- 503:Src/main.c    **** 							}
- 10898              		.loc 1 503 20 view .LVU3500
- 10899 04ba 4FF6FF74 		movw	r4, #65535
- 10900              	.LVL958:
- 502:Src/main.c    **** 								pat_period = AD9102_PAT_PERIOD_DEFAULT;
- 10901              		.loc 1 502 18 view .LVU3501
- 10902 04be 4FF00209 		mov	r9, #2
- 10903              	.LVL959:
- 501:Src/main.c    **** 								pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
- 10904              		.loc 1 501 18 view .LVU3502
- 10905 04c2 4FF00108 		mov	r8, #1
- 10906              	.LVL960:
- 10907              	.L562:
- 521:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 10908              		.loc 1 521 8 is_stmt 1 view .LVU3503
- 521:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 10909              		.loc 1 521 30 is_stmt 0 view .LVU3504
- 10910 04c6 0094     		str	r4, [sp]
- 10911 04c8 4B46     		mov	r3, r9
- 10912              	.LVL961:
- 521:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 10913              		.loc 1 521 30 view .LVU3505
- 10914 04ca 4246     		mov	r2, r8
- 10915 04cc 3946     		mov	r1, r7
- 10916 04ce 3046     		mov	r0, r6
- 10917 04d0 FFF7FEFF 		bl	AD9102_Apply
- 10918              	.LVL962:
- 522:Src/main.c    **** 							if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
-ARM GAS  /tmp/ccwR4KB7.s 			page 596
-
-
- 10919              		.loc 1 522 8 is_stmt 1 view .LVU3506
- 522:Src/main.c    **** 							if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
- 10920              		.loc 1 522 22 is_stmt 0 view .LVU3507
- 10921 04d4 264B     		ldr	r3, .L614+48
- 10922 04d6 5870     		strb	r0, [r3, #1]
- 523:Src/main.c    **** 							{
- 10923              		.loc 1 523 8 is_stmt 1 view .LVU3508
- 523:Src/main.c    **** 							{
- 10924              		.loc 1 523 12 is_stmt 0 view .LVU3509
- 10925 04d8 0194     		str	r4, [sp, #4]
- 10926 04da CDF80090 		str	r9, [sp]
- 10927 04de 4346     		mov	r3, r8
- 10928 04e0 3246     		mov	r2, r6
- 10929 04e2 3946     		mov	r1, r7
- 10930 04e4 FFF7FEFF 		bl	AD9102_CheckFlags
- 10931              	.LVL963:
- 523:Src/main.c    **** 							{
- 10932              		.loc 1 523 11 discriminator 1 view .LVU3510
- 10933 04e8 0028     		cmp	r0, #0
- 10934 04ea A6D0     		beq	.L560
- 525:Src/main.c    **** 							}
- 10935              		.loc 1 525 9 is_stmt 1 view .LVU3511
- 525:Src/main.c    **** 							}
- 10936              		.loc 1 525 19 is_stmt 0 view .LVU3512
- 10937 04ec 204A     		ldr	r2, .L614+48
- 10938 04ee 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
- 525:Src/main.c    **** 							}
- 10939              		.loc 1 525 23 view .LVU3513
- 10940 04f0 63F07F03 		orn	r3, r3, #127
- 10941 04f4 1370     		strb	r3, [r2]
- 10942 04f6 A0E7     		b	.L560
- 10943              	.LVL964:
- 10944              	.L544:
- 525:Src/main.c    **** 							}
- 10945              		.loc 1 525 23 view .LVU3514
- 10946              	.LBE669:
- 10947              	.LBE666:
- 537:Src/main.c    **** 					{
- 10948              		.loc 1 537 6 is_stmt 1 view .LVU3515
- 537:Src/main.c    **** 					{
- 10949              		.loc 1 537 10 is_stmt 0 view .LVU3516
- 10950 04f8 1E48     		ldr	r0, .L614+52
- 10951 04fa FFF7FEFF 		bl	CheckChecksum
- 10952              	.LVL965:
- 537:Src/main.c    **** 					{
- 10953              		.loc 1 537 9 discriminator 1 view .LVU3517
- 10954 04fe 70B9     		cbnz	r0, .L607
- 546:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 10955              		.loc 1 546 7 is_stmt 1 view .LVU3518
- 546:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 10956              		.loc 1 546 17 is_stmt 0 view .LVU3519
- 10957 0500 1B4A     		ldr	r2, .L614+48
- 10958 0502 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
- 546:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
- 10959              		.loc 1 546 21 view .LVU3520
- 10960 0504 43F00403 		orr	r3, r3, #4
- 10961 0508 1370     		strb	r3, [r2]
-ARM GAS  /tmp/ccwR4KB7.s 			page 597
-
-
- 547:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
- 10962              		.loc 1 547 7 is_stmt 1 view .LVU3521
- 547:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
- 10963              		.loc 1 547 17 is_stmt 0 view .LVU3522
- 10964 050a 1C4B     		ldr	r3, .L614+60
- 10965 050c 0222     		movs	r2, #2
- 10966 050e 1A70     		strb	r2, [r3]
- 548:Src/main.c    **** 					}
- 10967              		.loc 1 548 7 is_stmt 1 view .LVU3523
- 548:Src/main.c    **** 					}
- 10968              		.loc 1 548 21 is_stmt 0 view .LVU3524
- 10969 0510 154B     		ldr	r3, .L614+40
- 10970 0512 0022     		movs	r2, #0
- 10971 0514 1A70     		strb	r2, [r3]
- 10972              	.L565:
- 550:Src/main.c    **** 				break;
- 10973              		.loc 1 550 6 is_stmt 1 view .LVU3525
- 550:Src/main.c    **** 				break;
- 10974              		.loc 1 550 32 is_stmt 0 view .LVU3526
- 10975 0516 184B     		ldr	r3, .L614+56
- 10976 0518 0122     		movs	r2, #1
- 10977 051a 1A70     		strb	r2, [r3]
- 551:Src/main.c    **** 				case RUN_TASK:
- 10978              		.loc 1 551 5 is_stmt 1 view .LVU3527
- 10979 051c E9E5     		b	.L540
- 10980              	.L607:
- 539:Src/main.c    **** 						TO6_before = TO6;
- 10981              		.loc 1 539 7 view .LVU3528
- 10982 051e 114B     		ldr	r3, .L614+36
- 10983 0520 174A     		ldr	r2, .L614+64
- 10984 0522 1849     		ldr	r1, .L614+68
- 10985 0524 1348     		ldr	r0, .L614+52
- 10986 0526 FFF7FEFF 		bl	Decode_task
- 10987              	.LVL966:
- 540:Src/main.c    **** 						CPU_state = RUN_TASK;
- 10988              		.loc 1 540 7 view .LVU3529
- 540:Src/main.c    **** 						CPU_state = RUN_TASK;
- 10989              		.loc 1 540 18 is_stmt 0 view .LVU3530
- 10990 052a 0C4B     		ldr	r3, .L614+28
- 10991 052c 1A68     		ldr	r2, [r3]
- 10992 052e 164B     		ldr	r3, .L614+72
- 10993 0530 1A60     		str	r2, [r3]
- 541:Src/main.c    **** 						CPU_state_old = RUN_TASK;//Save main current cycle
- 10994              		.loc 1 541 7 is_stmt 1 view .LVU3531
- 541:Src/main.c    **** 						CPU_state_old = RUN_TASK;//Save main current cycle
- 10995              		.loc 1 541 17 is_stmt 0 view .LVU3532
- 10996 0532 0923     		movs	r3, #9
- 10997 0534 114A     		ldr	r2, .L614+60
- 10998 0536 1370     		strb	r3, [r2]
- 542:Src/main.c    **** 					}
- 10999              		.loc 1 542 7 is_stmt 1 view .LVU3533
- 542:Src/main.c    **** 					}
- 11000              		.loc 1 542 21 is_stmt 0 view .LVU3534
- 11001 0538 0B4A     		ldr	r2, .L614+40
- 11002 053a 1370     		strb	r3, [r2]
- 11003 053c EBE7     		b	.L565
- 11004              	.L615:
-ARM GAS  /tmp/ccwR4KB7.s 			page 598
-
-
- 11005 053e 00BF     		.align	2
- 11006              	.L614:
- 11007 0540 00000000 		.word	task
- 11008 0544 00000000 		.word	TO7
- 11009 0548 00000000 		.word	TO7_before
- 11010 054c 00000000 		.word	LD1_param
- 11011 0550 00000000 		.word	LD2_param
- 11012 0554 00000000 		.word	temp16
- 11013 0558 00000000 		.word	Long_Data
- 11014 055c 00000000 		.word	TO6
- 11015 0560 00000000 		.word	TO6_stop
- 11016 0564 00000000 		.word	Curr_setup
- 11017 0568 00000000 		.word	CPU_state_old
- 11018 056c 00000000 		.word	CS_result
- 11019 0570 00000000 		.word	State_Data
- 11020 0574 00000000 		.word	COMMAND
- 11021 0578 00000000 		.word	UART_transmission_request
- 11022 057c 00000000 		.word	CPU_state
- 11023 0580 00000000 		.word	LD2_curr_setup
- 11024 0584 00000000 		.word	LD1_curr_setup
- 11025 0588 00000000 		.word	TO6_before
- 11026              	.L543:
- 553:Src/main.c    **** 					{
- 11027              		.loc 1 553 6 is_stmt 1 view .LVU3535
- 553:Src/main.c    **** 					{
- 11028              		.loc 1 553 18 is_stmt 0 view .LVU3536
- 11029 058c 864B     		ldr	r3, .L616
- 11030 058e 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 11031 0590 012B     		cmp	r3, #1
- 11032 0592 23D0     		beq	.L566
- 11033 0594 022B     		cmp	r3, #2
- 11034 0596 00F03181 		beq	.L567
- 11035              	.L568:
- 808:Src/main.c    **** 					{
- 11036              		.loc 1 808 6 is_stmt 1 view .LVU3537
- 808:Src/main.c    **** 					{
- 11037              		.loc 1 808 13 is_stmt 0 view .LVU3538
- 11038 059a 844B     		ldr	r3, .L616+4
- 11039 059c 1B68     		ldr	r3, [r3]
- 11040 059e 844A     		ldr	r2, .L616+8
- 11041 05a0 1268     		ldr	r2, [r2]
- 808:Src/main.c    **** 					{
- 11042              		.loc 1 808 9 view .LVU3539
- 11043 05a2 9342     		cmp	r3, r2
- 11044 05a4 00F2D881 		bhi	.L608
- 11045              	.L585:
- 860:Src/main.c    **** 					
- 11046              		.loc 1 860 13 is_stmt 1 discriminator 1 view .LVU3540
- 11047 05a8 824B     		ldr	r3, .L616+12
- 11048 05aa 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 11049 05ac 002B     		cmp	r3, #0
- 11050 05ae FBD0     		beq	.L585
- 862:Src/main.c    **** 					
- 11051              		.loc 1 862 6 view .LVU3541
- 11052 05b0 FFF7FEFF 		bl	Stop_TIM10
- 11053              	.LVL967:
- 864:Src/main.c    **** 					{
-ARM GAS  /tmp/ccwR4KB7.s 			page 599
-
-
- 11054              		.loc 1 864 6 view .LVU3542
- 864:Src/main.c    **** 					{
- 11055              		.loc 1 864 14 is_stmt 0 view .LVU3543
- 11056 05b4 7C4B     		ldr	r3, .L616
- 11057 05b6 DB8A     		ldrh	r3, [r3, #22]
- 864:Src/main.c    **** 					{
- 11058              		.loc 1 864 9 view .LVU3544
- 11059 05b8 032B     		cmp	r3, #3
- 11060 05ba 0BD9     		bls	.L586
- 866:Src/main.c    **** 						TO10_counter = task.dt / 10;
- 11061              		.loc 1 866 7 is_stmt 1 view .LVU3545
- 866:Src/main.c    **** 						TO10_counter = task.dt / 10;
- 11062              		.loc 1 866 26 is_stmt 0 view .LVU3546
- 11063 05bc 7E4B     		ldr	r3, .L616+16
- 11064 05be 1A68     		ldr	r2, [r3]
- 11065 05c0 7E4B     		ldr	r3, .L616+20
- 11066 05c2 DA60     		str	r2, [r3, #12]
- 867:Src/main.c    **** 					}
- 11067              		.loc 1 867 7 is_stmt 1 view .LVU3547
- 867:Src/main.c    **** 					}
- 11068              		.loc 1 867 26 is_stmt 0 view .LVU3548
- 11069 05c4 784B     		ldr	r3, .L616
- 11070 05c6 1B7D     		ldrb	r3, [r3, #20]	@ zero_extendqisi2
- 867:Src/main.c    **** 					}
- 11071              		.loc 1 867 30 view .LVU3549
- 11072 05c8 7D4A     		ldr	r2, .L616+24
- 11073 05ca A2FB0323 		umull	r2, r3, r2, r3
- 11074 05ce DB08     		lsrs	r3, r3, #3
- 867:Src/main.c    **** 					}
- 11075              		.loc 1 867 20 view .LVU3550
- 11076 05d0 7C4A     		ldr	r2, .L616+28
- 11077 05d2 1360     		str	r3, [r2]
- 11078              	.L586:
- 870:Src/main.c    ****         break;
- 11079              		.loc 1 870 6 is_stmt 1 view .LVU3551
- 870:Src/main.c    ****         break;
- 11080              		.loc 1 870 20 is_stmt 0 view .LVU3552
- 11081 05d4 7C4B     		ldr	r3, .L616+32
- 11082 05d6 0922     		movs	r2, #9
- 11083 05d8 1A70     		strb	r2, [r3]
- 871:Src/main.c    **** 			}
- 11084              		.loc 1 871 9 is_stmt 1 view .LVU3553
- 11085 05da 8AE5     		b	.L540
- 11086              	.L566:
- 11087              	.LBB670:
- 575:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 11088              		.loc 1 575 7 view .LVU3554
- 575:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 11089              		.loc 1 575 38 is_stmt 0 view .LVU3555
- 11090 05dc 724B     		ldr	r3, .L616
- 11091 05de D3ED077A 		vldr.32	s15, [r3, #28]
- 575:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 11092              		.loc 1 575 7 view .LVU3556
- 11093 05e2 FCEEE77A 		vcvt.u32.f32	s15, s15
- 11094 05e6 17EE903A 		vmov	r3, s15	@ int
- 11095 05ea 99B2     		uxth	r1, r3
- 11096 05ec 0220     		movs	r0, #2
-ARM GAS  /tmp/ccwR4KB7.s 			page 600
-
-
- 11097 05ee FFF7FEFF 		bl	Set_LTEC
- 11098              	.LVL968:
- 576:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 11099              		.loc 1 576 7 is_stmt 1 view .LVU3557
- 576:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 11100              		.loc 1 576 14 is_stmt 0 view .LVU3558
- 11101 05f2 0320     		movs	r0, #3
- 11102 05f4 FFF7FEFF 		bl	MPhD_T
- 11103              	.LVL969:
- 577:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 11104              		.loc 1 577 7 is_stmt 1 view .LVU3559
- 577:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 11105              		.loc 1 577 32 is_stmt 0 view .LVU3560
- 11106 05f8 0320     		movs	r0, #3
- 11107 05fa FFF7FEFF 		bl	MPhD_T
- 11108              	.LVL970:
- 577:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 11109              		.loc 1 577 30 discriminator 1 view .LVU3561
- 11110 05fe 734C     		ldr	r4, .L616+36
- 11111 0600 2080     		strh	r0, [r4]	@ movhi
- 578:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 11112              		.loc 1 578 7 is_stmt 1 view .LVU3562
- 578:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 11113              		.loc 1 578 14 is_stmt 0 view .LVU3563
- 11114 0602 0420     		movs	r0, #4
- 11115 0604 FFF7FEFF 		bl	MPhD_T
- 11116              	.LVL971:
- 579:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11117              		.loc 1 579 7 is_stmt 1 view .LVU3564
- 579:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11118              		.loc 1 579 32 is_stmt 0 view .LVU3565
- 11119 0608 0420     		movs	r0, #4
- 11120 060a FFF7FEFF 		bl	MPhD_T
- 11121              	.LVL972:
- 579:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11122              		.loc 1 579 30 discriminator 1 view .LVU3566
- 11123 060e 704D     		ldr	r5, .L616+40
- 11124 0610 2880     		strh	r0, [r5]	@ movhi
- 580:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 11125              		.loc 1 580 7 is_stmt 1 view .LVU3567
- 580:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 11126              		.loc 1 580 14 is_stmt 0 view .LVU3568
- 11127 0612 0122     		movs	r2, #1
- 11128 0614 2146     		mov	r1, r4
- 11129 0616 6F48     		ldr	r0, .L616+44
- 11130 0618 FFF7FEFF 		bl	PID_Controller_Temp
- 11131              	.LVL973:
- 11132 061c 0146     		mov	r1, r0
- 580:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 11133              		.loc 1 580 13 discriminator 1 view .LVU3569
- 11134 061e 6E4C     		ldr	r4, .L616+48
- 11135 0620 2080     		strh	r0, [r4]	@ movhi
- 581:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 11136              		.loc 1 581 7 is_stmt 1 view .LVU3570
- 11137 0622 0320     		movs	r0, #3
- 11138 0624 FFF7FEFF 		bl	Set_LTEC
- 11139              	.LVL974:
-ARM GAS  /tmp/ccwR4KB7.s 			page 601
-
-
- 582:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 11140              		.loc 1 582 7 view .LVU3571
- 582:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 11141              		.loc 1 582 14 is_stmt 0 view .LVU3572
- 11142 0628 0222     		movs	r2, #2
- 11143 062a 2946     		mov	r1, r5
- 11144 062c 6B48     		ldr	r0, .L616+52
- 11145 062e FFF7FEFF 		bl	PID_Controller_Temp
- 11146              	.LVL975:
- 11147 0632 0146     		mov	r1, r0
- 582:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 11148              		.loc 1 582 13 discriminator 1 view .LVU3573
- 11149 0634 2080     		strh	r0, [r4]	@ movhi
- 583:Src/main.c    **** 
- 11150              		.loc 1 583 7 is_stmt 1 view .LVU3574
- 11151 0636 0420     		movs	r0, #4
- 11152 0638 FFF7FEFF 		bl	Set_LTEC
- 11153              	.LVL976:
- 586:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11154              		.loc 1 586 7 view .LVU3575
- 11155 063c 684C     		ldr	r4, .L616+56
- 11156 063e 0122     		movs	r2, #1
- 11157 0640 8021     		movs	r1, #128
- 11158 0642 2046     		mov	r0, r4
- 11159 0644 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 11160              	.LVL977:
- 587:Src/main.c    **** 		
- 11161              		.loc 1 587 7 view .LVU3576
- 11162 0648 0022     		movs	r2, #0
- 11163 064a 8021     		movs	r1, #128
- 11164 064c 2046     		mov	r0, r4
- 11165 064e FFF7FEFF 		bl	HAL_GPIO_WritePin
- 11166              	.LVL978:
- 589:Src/main.c    **** 						if (st != HAL_OK)
- 11167              		.loc 1 589 7 view .LVU3577
- 589:Src/main.c    **** 						if (st != HAL_OK)
- 11168              		.loc 1 589 12 is_stmt 0 view .LVU3578
- 11169 0652 5A48     		ldr	r0, .L616+20
- 11170 0654 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
- 11171              	.LVL979:
- 590:Src/main.c    **** 							while(1);
- 11172              		.loc 1 590 7 is_stmt 1 view .LVU3579
- 590:Src/main.c    **** 							while(1);
- 11173              		.loc 1 590 10 is_stmt 0 view .LVU3580
- 11174 0658 0028     		cmp	r0, #0
- 11175 065a 75D1     		bne	.L570
- 593:Src/main.c    **** 						uint16_t trigger_counter = 0;
- 11176              		.loc 1 593 7 is_stmt 1 view .LVU3581
- 11177              	.LVL980:
- 594:Src/main.c    **** 						uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
- 11178              		.loc 1 594 7 view .LVU3582
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11179              		.loc 1 595 7 view .LVU3583
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11180              		.loc 1 595 47 is_stmt 0 view .LVU3584
- 11181 065c 524B     		ldr	r3, .L616
- 11182 065e 93ED027A 		vldr.32	s14, [r3, #8]
-ARM GAS  /tmp/ccwR4KB7.s 			page 602
-
-
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11183              		.loc 1 595 64 view .LVU3585
- 11184 0662 D3ED047A 		vldr.32	s15, [r3, #16]
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11185              		.loc 1 595 58 view .LVU3586
- 11186 0666 37EE677A 		vsub.f32	s14, s14, s15
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11187              		.loc 1 595 84 view .LVU3587
- 11188 066a D3ED036A 		vldr.32	s13, [r3, #12]
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11189              		.loc 1 595 79 view .LVU3588
- 11190 066e C7EE267A 		vdiv.f32	s15, s14, s13
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11191              		.loc 1 595 97 view .LVU3589
- 11192 0672 B2EE047A 		vmov.f32	s14, #1.0e+1
- 11193 0676 67EE877A 		vmul.f32	s15, s15, s14
- 595:Src/main.c    **** 						uint16_t task_sheduler = 0;
- 11194              		.loc 1 595 31 view .LVU3590
- 11195 067a FCEEE77A 		vcvt.u32.f32	s15, s15
- 11196 067e CDED037A 		vstr.32	s15, [sp, #12]	@ int
- 11197 0682 9DF80C60 		ldrb	r6, [sp, #12]	@ zero_extendqisi2
- 11198              	.LVL981:
- 596:Src/main.c    **** 
- 11199              		.loc 1 596 7 is_stmt 1 view .LVU3591
- 600:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- 11200              		.loc 1 600 7 view .LVU3592
- 11201 0686 DFF86891 		ldr	r9, .L616+72
- 11202 068a 0021     		movs	r1, #0
- 11203 068c 4846     		mov	r0, r9
- 11204              	.LVL982:
- 600:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- 11205              		.loc 1 600 7 is_stmt 0 view .LVU3593
- 11206 068e FFF7FEFF 		bl	HAL_TIM_PWM_Stop
- 11207              	.LVL983:
- 601:Src/main.c    **** 						TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 11208              		.loc 1 601 7 is_stmt 1 view .LVU3594
- 11209 0692 DFF86081 		ldr	r8, .L616+76
- 11210 0696 0821     		movs	r1, #8
- 11211 0698 4046     		mov	r0, r8
- 11212 069a FFF7FEFF 		bl	HAL_TIM_PWM_Stop
- 11213              	.LVL984:
- 602:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 11214              		.loc 1 602 7 view .LVU3595
- 602:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 11215              		.loc 1 602 13 is_stmt 0 view .LVU3596
- 11216 069e 514F     		ldr	r7, .L616+60
- 11217 06a0 3B68     		ldr	r3, [r7]
- 602:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 11218              		.loc 1 602 20 view .LVU3597
- 11219 06a2 23F00803 		bic	r3, r3, #8
- 11220 06a6 3B60     		str	r3, [r7]
- 603:Src/main.c    **** 
- 11221              		.loc 1 603 7 is_stmt 1 view .LVU3598
- 603:Src/main.c    **** 
- 11222              		.loc 1 603 12 is_stmt 0 view .LVU3599
- 11223 06a8 4F4D     		ldr	r5, .L616+64
- 11224 06aa 2B68     		ldr	r3, [r5]
-ARM GAS  /tmp/ccwR4KB7.s 			page 603
-
-
- 603:Src/main.c    **** 
- 11225              		.loc 1 603 19 view .LVU3600
- 11226 06ac 23F00803 		bic	r3, r3, #8
- 11227 06b0 2B60     		str	r3, [r5]
- 607:Src/main.c    **** 						TIM4 -> CNT = 0;
- 11228              		.loc 1 607 7 is_stmt 1 view .LVU3601
- 607:Src/main.c    **** 						TIM4 -> CNT = 0;
- 11229              		.loc 1 607 20 is_stmt 0 view .LVU3602
- 11230 06b2 0024     		movs	r4, #0
- 11231 06b4 7C62     		str	r4, [r7, #36]
- 608:Src/main.c    **** 
- 11232              		.loc 1 608 7 is_stmt 1 view .LVU3603
- 608:Src/main.c    **** 
- 11233              		.loc 1 608 19 is_stmt 0 view .LVU3604
- 11234 06b6 6C62     		str	r4, [r5, #36]
- 610:Src/main.c    **** 						HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock
- 11235              		.loc 1 610 7 is_stmt 1 view .LVU3605
- 11236 06b8 2146     		mov	r1, r4
- 11237 06ba 4846     		mov	r0, r9
- 11238 06bc FFF7FEFF 		bl	HAL_TIM_PWM_Start
- 11239              	.LVL985:
- 611:Src/main.c    **** 						//TIM4 -> CNT = 0;
- 11240              		.loc 1 611 7 view .LVU3606
- 11241 06c0 0821     		movs	r1, #8
- 11242 06c2 4046     		mov	r0, r8
- 11243 06c4 FFF7FEFF 		bl	HAL_TIM_PWM_Start
- 11244              	.LVL986:
- 614:Src/main.c    **** 						TIM11 -> CNT = 0;
- 11245              		.loc 1 614 7 view .LVU3607
- 614:Src/main.c    **** 						TIM11 -> CNT = 0;
- 11246              		.loc 1 614 26 is_stmt 0 view .LVU3608
- 11247 06c8 EB6A     		ldr	r3, [r5, #44]
- 614:Src/main.c    **** 						TIM11 -> CNT = 0;
- 11248              		.loc 1 614 33 view .LVU3609
- 11249 06ca 143B     		subs	r3, r3, #20
- 614:Src/main.c    **** 						TIM11 -> CNT = 0;
- 11250              		.loc 1 614 19 view .LVU3610
- 11251 06cc 6B62     		str	r3, [r5, #36]
- 615:Src/main.c    **** 
- 11252              		.loc 1 615 7 is_stmt 1 view .LVU3611
- 615:Src/main.c    **** 
- 11253              		.loc 1 615 20 is_stmt 0 view .LVU3612
- 11254 06ce 7C62     		str	r4, [r7, #36]
- 618:Src/main.c    **** 						{
- 11255              		.loc 1 618 7 is_stmt 1 view .LVU3613
- 594:Src/main.c    **** 						uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
- 11256              		.loc 1 594 16 is_stmt 0 view .LVU3614
- 11257 06d0 2546     		mov	r5, r4
- 11258              	.LVL987:
- 11259              	.L572:
- 618:Src/main.c    **** 						{
- 11260              		.loc 1 618 33 is_stmt 1 view .LVU3615
- 618:Src/main.c    **** 						{
- 11261              		.loc 1 618 18 is_stmt 0 view .LVU3616
- 11262 06d2 354B     		ldr	r3, .L616
- 11263 06d4 D3ED047A 		vldr.32	s15, [r3, #16]
- 618:Src/main.c    **** 						{
-ARM GAS  /tmp/ccwR4KB7.s 			page 604
-
-
- 11264              		.loc 1 618 39 view .LVU3617
- 11265 06d8 93ED027A 		vldr.32	s14, [r3, #8]
- 618:Src/main.c    **** 						{
- 11266              		.loc 1 618 33 view .LVU3618
- 11267 06dc F4EEC77A 		vcmpe.f32	s15, s14
- 11268 06e0 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
- 11269 06e4 37D5     		bpl	.L609
- 620:Src/main.c    **** 							{
- 11270              		.loc 1 620 8 is_stmt 1 view .LVU3619
- 620:Src/main.c    **** 							{
- 11271              		.loc 1 620 12 is_stmt 0 view .LVU3620
- 11272 06e6 334B     		ldr	r3, .L616+12
- 11273 06e8 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 620:Src/main.c    **** 							{
- 11274              		.loc 1 620 11 view .LVU3621
- 11275 06ea 002B     		cmp	r3, #0
- 11276 06ec F1D0     		beq	.L572
- 622:Src/main.c    **** 								//TIM11 -> CNT = 0; // to link modulator phase
- 11277              		.loc 1 622 9 is_stmt 1 view .LVU3622
- 11278 06ee FCEEE77A 		vcvt.u32.f32	s15, s15
- 11279 06f2 17EE903A 		vmov	r3, s15	@ int
- 11280 06f6 99B2     		uxth	r1, r3
- 11281 06f8 0120     		movs	r0, #1
- 11282 06fa FFF7FEFF 		bl	Set_LTEC
- 11283              	.LVL988:
- 625:Src/main.c    **** 								TO10 = 0;
- 11284              		.loc 1 625 9 view .LVU3623
- 625:Src/main.c    **** 								TO10 = 0;
- 11285              		.loc 1 625 13 is_stmt 0 view .LVU3624
- 11286 06fe 2A4B     		ldr	r3, .L616
- 11287 0700 D3ED047A 		vldr.32	s15, [r3, #16]
- 625:Src/main.c    **** 								TO10 = 0;
- 11288              		.loc 1 625 35 view .LVU3625
- 11289 0704 93ED037A 		vldr.32	s14, [r3, #12]
- 625:Src/main.c    **** 								TO10 = 0;
- 11290              		.loc 1 625 28 view .LVU3626
- 11291 0708 77EE877A 		vadd.f32	s15, s15, s14
- 11292 070c C3ED047A 		vstr.32	s15, [r3, #16]
- 626:Src/main.c    **** 								TIM10_coflag = 0;
- 11293              		.loc 1 626 9 is_stmt 1 view .LVU3627
- 626:Src/main.c    **** 								TIM10_coflag = 0;
- 11294              		.loc 1 626 14 is_stmt 0 view .LVU3628
- 11295 0710 0027     		movs	r7, #0
- 11296 0712 364B     		ldr	r3, .L616+68
- 11297 0714 1F60     		str	r7, [r3]
- 627:Src/main.c    **** 								
- 11298              		.loc 1 627 9 is_stmt 1 view .LVU3629
- 627:Src/main.c    **** 								
- 11299              		.loc 1 627 22 is_stmt 0 view .LVU3630
- 11300 0716 274B     		ldr	r3, .L616+12
- 11301 0718 1F70     		strb	r7, [r3]
- 629:Src/main.c    **** 								HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
- 11302              		.loc 1 629 9 is_stmt 1 view .LVU3631
- 11303 071a DFF8DC80 		ldr	r8, .L616+80
- 11304 071e 0122     		movs	r2, #1
- 11305 0720 4FF40071 		mov	r1, #512
- 11306 0724 4046     		mov	r0, r8
-ARM GAS  /tmp/ccwR4KB7.s 			page 605
-
-
- 11307 0726 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 11308              	.LVL989:
- 630:Src/main.c    **** //*
- 11309              		.loc 1 630 9 view .LVU3632
- 11310 072a 3A46     		mov	r2, r7
- 11311 072c 4FF40071 		mov	r1, #512
- 11312 0730 4046     		mov	r0, r8
- 11313 0732 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 11314              	.LVL990:
- 632:Src/main.c    **** 									OUT_trigger(trigger_counter);
- 11315              		.loc 1 632 9 view .LVU3633
- 632:Src/main.c    **** 									OUT_trigger(trigger_counter);
- 11316              		.loc 1 632 41 is_stmt 0 view .LVU3634
- 11317 0736 B4FBF6F3 		udiv	r3, r4, r6
- 11318 073a 06FB1343 		mls	r3, r6, r3, r4
- 11319 073e 9BB2     		uxth	r3, r3
- 632:Src/main.c    **** 									OUT_trigger(trigger_counter);
- 11320              		.loc 1 632 12 view .LVU3635
- 11321 0740 1BB1     		cbz	r3, .L610
- 11322              	.L573:
- 636:Src/main.c    **** //*/
- 11323              		.loc 1 636 9 is_stmt 1 view .LVU3636
- 11324 0742 0134     		adds	r4, r4, #1
- 11325              	.LVL991:
- 636:Src/main.c    **** //*/
- 11326              		.loc 1 636 9 is_stmt 0 view .LVU3637
- 11327 0744 A4B2     		uxth	r4, r4
- 11328              	.LVL992:
- 636:Src/main.c    **** //*/
- 11329              		.loc 1 636 9 view .LVU3638
- 11330 0746 C4E7     		b	.L572
- 11331              	.LVL993:
- 11332              	.L570:
- 591:Src/main.c    **** 
- 11333              		.loc 1 591 8 is_stmt 1 view .LVU3639
- 591:Src/main.c    **** 
- 11334              		.loc 1 591 13 view .LVU3640
- 11335 0748 FEE7     		b	.L570
- 11336              	.LVL994:
- 11337              	.L610:
- 633:Src/main.c    **** 									++trigger_counter;
- 11338              		.loc 1 633 10 view .LVU3641
- 11339 074a E8B2     		uxtb	r0, r5
- 11340 074c FFF7FEFF 		bl	OUT_trigger
- 11341              	.LVL995:
- 634:Src/main.c    **** 								}
- 11342              		.loc 1 634 10 view .LVU3642
- 11343 0750 0135     		adds	r5, r5, #1
- 11344              	.LVL996:
- 634:Src/main.c    **** 								}
- 11345              		.loc 1 634 10 is_stmt 0 view .LVU3643
- 11346 0752 ADB2     		uxth	r5, r5
- 11347              	.LVL997:
- 634:Src/main.c    **** 								}
- 11348              		.loc 1 634 10 view .LVU3644
- 11349 0754 F5E7     		b	.L573
- 11350              	.L609:
-ARM GAS  /tmp/ccwR4KB7.s 			page 606
-
-
- 661:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 11351              		.loc 1 661 7 is_stmt 1 view .LVU3645
- 661:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 11352              		.loc 1 661 13 is_stmt 0 view .LVU3646
- 11353 0756 234A     		ldr	r2, .L616+60
- 11354 0758 D368     		ldr	r3, [r2, #12]
- 661:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 11355              		.loc 1 661 21 view .LVU3647
- 11356 075a 43F00103 		orr	r3, r3, #1
- 11357 075e D360     		str	r3, [r2, #12]
- 671:Src/main.c    **** 
- 11358              		.loc 1 671 7 is_stmt 1 view .LVU3648
- 11359 0760 FFF7FEFF 		bl	Stop_TIM10
- 11360              	.LVL998:
- 673:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 11361              		.loc 1 673 7 view .LVU3649
- 673:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 11362              		.loc 1 673 32 is_stmt 0 view .LVU3650
- 11363 0764 104C     		ldr	r4, .L616
- 11364              	.LVL999:
- 673:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 11365              		.loc 1 673 32 view .LVU3651
- 11366 0766 D4ED017A 		vldr.32	s15, [r4, #4]
- 673:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 11367              		.loc 1 673 26 view .LVU3652
- 11368 076a C4ED047A 		vstr.32	s15, [r4, #16]
- 674:Src/main.c    **** 						if (task.tau > 3)
- 11369              		.loc 1 674 7 is_stmt 1 view .LVU3653
- 11370 076e FCEEE77A 		vcvt.u32.f32	s15, s15
- 11371 0772 17EE903A 		vmov	r3, s15	@ int
- 11372 0776 99B2     		uxth	r1, r3
- 11373 0778 0120     		movs	r0, #1
- 11374 077a FFF7FEFF 		bl	Set_LTEC
- 11375              	.LVL1000:
- 675:Src/main.c    **** 						{
- 11376              		.loc 1 675 7 view .LVU3654
- 675:Src/main.c    **** 						{
- 11377              		.loc 1 675 15 is_stmt 0 view .LVU3655
- 11378 077e E38A     		ldrh	r3, [r4, #22]
- 675:Src/main.c    **** 						{
- 11379              		.loc 1 675 10 view .LVU3656
- 11380 0780 032B     		cmp	r3, #3
- 11381 0782 0CD9     		bls	.L575
- 677:Src/main.c    **** 							htim10.Init.Period = 9999;
- 11382              		.loc 1 677 8 is_stmt 1 view .LVU3657
- 677:Src/main.c    **** 							htim10.Init.Period = 9999;
- 11383              		.loc 1 677 34 is_stmt 0 view .LVU3658
- 11384 0784 0D4A     		ldr	r2, .L616+20
- 11385 0786 D068     		ldr	r0, [r2, #12]
- 677:Src/main.c    **** 							htim10.Init.Period = 9999;
- 11386              		.loc 1 677 21 view .LVU3659
- 11387 0788 0B49     		ldr	r1, .L616+16
- 11388 078a 0860     		str	r0, [r1]
- 678:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
- 11389              		.loc 1 678 8 is_stmt 1 view .LVU3660
- 678:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
- 11390              		.loc 1 678 27 is_stmt 0 view .LVU3661
-ARM GAS  /tmp/ccwR4KB7.s 			page 607
-
-
- 11391 078c 42F20F71 		movw	r1, #9999
- 11392 0790 D160     		str	r1, [r2, #12]
- 679:Src/main.c    **** 						}
- 11393              		.loc 1 679 8 is_stmt 1 view .LVU3662
- 679:Src/main.c    **** 						}
- 11394              		.loc 1 679 33 is_stmt 0 view .LVU3663
- 11395 0792 013B     		subs	r3, r3, #1
- 679:Src/main.c    **** 						}
- 11396              		.loc 1 679 38 view .LVU3664
- 11397 0794 6422     		movs	r2, #100
- 11398 0796 02FB03F3 		mul	r3, r2, r3
- 679:Src/main.c    **** 						}
- 11399              		.loc 1 679 21 view .LVU3665
- 11400 079a 0A4A     		ldr	r2, .L616+28
- 11401 079c 1360     		str	r3, [r2]
- 11402              	.L575:
- 681:Src/main.c    **** 					break;
- 11403              		.loc 1 681 7 is_stmt 1 view .LVU3666
- 11404 079e 0748     		ldr	r0, .L616+20
- 11405 07a0 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
- 11406              	.LVL1001:
- 682:Src/main.c    **** 					case TT_CHANGE_CURR_2:
- 11407              		.loc 1 682 6 view .LVU3667
- 11408 07a4 F9E6     		b	.L568
- 11409              	.L617:
- 11410 07a6 00BF     		.align	2
- 11411              	.L616:
- 11412 07a8 00000000 		.word	task
- 11413 07ac 00000000 		.word	TO7
- 11414 07b0 00000000 		.word	TO7_before
- 11415 07b4 00000000 		.word	TIM10_coflag
- 11416 07b8 00000000 		.word	TIM10_period
- 11417 07bc 00000000 		.word	htim10
- 11418 07c0 CDCCCCCC 		.word	-858993459
- 11419 07c4 00000000 		.word	TO10_counter
- 11420 07c8 00000000 		.word	CPU_state_old
- 11421 07cc 00000000 		.word	LD1_param
- 11422 07d0 00000000 		.word	LD2_param
- 11423 07d4 00000000 		.word	LD1_curr_setup
- 11424 07d8 00000000 		.word	temp16
- 11425 07dc 00000000 		.word	LD2_curr_setup
- 11426 07e0 000C0240 		.word	1073875968
- 11427 07e4 00480140 		.word	1073825792
- 11428 07e8 00080040 		.word	1073743872
- 11429 07ec 00000000 		.word	TO10
- 11430 07f0 00000000 		.word	htim11
- 11431 07f4 00000000 		.word	htim4
- 11432 07f8 00180240 		.word	1073879040
- 11433              	.LVL1002:
- 11434              	.L567:
- 686:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 11435              		.loc 1 686 7 view .LVU3668
- 686:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
- 11436              		.loc 1 686 38 is_stmt 0 view .LVU3669
- 11437 07fc A74B     		ldr	r3, .L618
- 11438 07fe D3ED077A 		vldr.32	s15, [r3, #28]
- 686:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
-ARM GAS  /tmp/ccwR4KB7.s 			page 608
-
-
- 11439              		.loc 1 686 7 view .LVU3670
- 11440 0802 FCEEE77A 		vcvt.u32.f32	s15, s15
- 11441 0806 17EE903A 		vmov	r3, s15	@ int
- 11442 080a 99B2     		uxth	r1, r3
- 11443 080c 0120     		movs	r0, #1
- 11444 080e FFF7FEFF 		bl	Set_LTEC
- 11445              	.LVL1003:
- 687:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 11446              		.loc 1 687 7 is_stmt 1 view .LVU3671
- 687:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 11447              		.loc 1 687 14 is_stmt 0 view .LVU3672
- 11448 0812 0320     		movs	r0, #3
- 11449 0814 FFF7FEFF 		bl	MPhD_T
- 11450              	.LVL1004:
- 688:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 11451              		.loc 1 688 7 is_stmt 1 view .LVU3673
- 688:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 11452              		.loc 1 688 32 is_stmt 0 view .LVU3674
- 11453 0818 0320     		movs	r0, #3
- 11454 081a FFF7FEFF 		bl	MPhD_T
- 11455              	.LVL1005:
- 688:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
- 11456              		.loc 1 688 30 discriminator 1 view .LVU3675
- 11457 081e A04C     		ldr	r4, .L618+4
- 11458 0820 2080     		strh	r0, [r4]	@ movhi
- 689:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 11459              		.loc 1 689 7 is_stmt 1 view .LVU3676
- 689:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 11460              		.loc 1 689 14 is_stmt 0 view .LVU3677
- 11461 0822 0420     		movs	r0, #4
- 11462 0824 FFF7FEFF 		bl	MPhD_T
- 11463              	.LVL1006:
- 690:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11464              		.loc 1 690 7 is_stmt 1 view .LVU3678
- 690:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11465              		.loc 1 690 32 is_stmt 0 view .LVU3679
- 11466 0828 0420     		movs	r0, #4
- 11467 082a FFF7FEFF 		bl	MPhD_T
- 11468              	.LVL1007:
- 690:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11469              		.loc 1 690 30 discriminator 1 view .LVU3680
- 11470 082e 9D4D     		ldr	r5, .L618+8
- 11471 0830 2880     		strh	r0, [r5]	@ movhi
- 691:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 11472              		.loc 1 691 7 is_stmt 1 view .LVU3681
- 691:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 11473              		.loc 1 691 14 is_stmt 0 view .LVU3682
- 11474 0832 0122     		movs	r2, #1
- 11475 0834 2146     		mov	r1, r4
- 11476 0836 9C48     		ldr	r0, .L618+12
- 11477 0838 FFF7FEFF 		bl	PID_Controller_Temp
- 11478              	.LVL1008:
- 11479 083c 0146     		mov	r1, r0
- 691:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 11480              		.loc 1 691 13 discriminator 1 view .LVU3683
- 11481 083e 9B4C     		ldr	r4, .L618+16
- 11482 0840 2080     		strh	r0, [r4]	@ movhi
-ARM GAS  /tmp/ccwR4KB7.s 			page 609
-
-
- 692:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 11483              		.loc 1 692 7 is_stmt 1 view .LVU3684
- 11484 0842 0320     		movs	r0, #3
- 11485 0844 FFF7FEFF 		bl	Set_LTEC
- 11486              	.LVL1009:
- 693:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 11487              		.loc 1 693 7 view .LVU3685
- 693:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 11488              		.loc 1 693 14 is_stmt 0 view .LVU3686
- 11489 0848 0222     		movs	r2, #2
- 11490 084a 2946     		mov	r1, r5
- 11491 084c 9848     		ldr	r0, .L618+20
- 11492 084e FFF7FEFF 		bl	PID_Controller_Temp
- 11493              	.LVL1010:
- 11494 0852 0146     		mov	r1, r0
- 693:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 11495              		.loc 1 693 13 discriminator 1 view .LVU3687
- 11496 0854 2080     		strh	r0, [r4]	@ movhi
- 694:Src/main.c    **** 
- 11497              		.loc 1 694 7 is_stmt 1 view .LVU3688
- 11498 0856 0420     		movs	r0, #4
- 11499 0858 FFF7FEFF 		bl	Set_LTEC
- 11500              	.LVL1011:
- 696:Src/main.c    **** 						LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
- 11501              		.loc 1 696 7 view .LVU3689
- 696:Src/main.c    **** 						LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
- 11502              		.loc 1 696 28 is_stmt 0 view .LVU3690
- 11503 085c 954B     		ldr	r3, .L618+24
- 11504 085e 0222     		movs	r2, #2
- 11505 0860 1A70     		strb	r2, [r3]
- 697:Src/main.c    **** 						//LD_blinker.param = task.current_param;
- 11506              		.loc 1 697 7 is_stmt 1 view .LVU3691
- 697:Src/main.c    **** 						//LD_blinker.param = task.current_param;
- 11507              		.loc 1 697 24 is_stmt 0 view .LVU3692
- 11508 0862 0022     		movs	r2, #0
- 11509 0864 9A72     		strb	r2, [r3, #10]
- 699:Src/main.c    **** 						LD_blinker.param = 1000; // LD2 current (in unspecified units)
- 11510              		.loc 1 699 7 is_stmt 1 view .LVU3693
- 699:Src/main.c    **** 						LD_blinker.param = 1000; // LD2 current (in unspecified units)
- 11511              		.loc 1 699 24 is_stmt 0 view .LVU3694
- 11512 0866 1A81     		strh	r2, [r3, #8]	@ movhi
- 700:Src/main.c    **** 						LD_blinker.signal_port = OUT_9_GPIO_Port;
- 11513              		.loc 1 700 7 is_stmt 1 view .LVU3695
- 700:Src/main.c    **** 						LD_blinker.signal_port = OUT_9_GPIO_Port;
- 11514              		.loc 1 700 24 is_stmt 0 view .LVU3696
- 11515 0868 4FF47A72 		mov	r2, #1000
- 11516 086c 1A81     		strh	r2, [r3, #8]	@ movhi
- 701:Src/main.c    **** 						LD_blinker.signal_pin = OUT_9_Pin;
- 11517              		.loc 1 701 7 is_stmt 1 view .LVU3697
- 701:Src/main.c    **** 						LD_blinker.signal_pin = OUT_9_Pin;
- 11518              		.loc 1 701 30 is_stmt 0 view .LVU3698
- 11519 086e 924A     		ldr	r2, .L618+28
- 11520 0870 5A60     		str	r2, [r3, #4]
- 702:Src/main.c    **** 
- 11521              		.loc 1 702 7 is_stmt 1 view .LVU3699
- 702:Src/main.c    **** 
- 11522              		.loc 1 702 29 is_stmt 0 view .LVU3700
-ARM GAS  /tmp/ccwR4KB7.s 			page 610
-
-
- 11523 0872 8022     		movs	r2, #128
- 11524 0874 5A80     		strh	r2, [r3, #2]	@ movhi
- 704:Src/main.c    **** 											//When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
- 11525              		.loc 1 704 7 is_stmt 1 view .LVU3701
- 704:Src/main.c    **** 											//When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
- 11526              		.loc 1 704 17 is_stmt 0 view .LVU3702
- 11527 0876 914B     		ldr	r3, .L618+32
- 11528 0878 42F21072 		movw	r2, #10000
- 11529 087c DA62     		str	r2, [r3, #44]
- 706:Src/main.c    **** 						if (st != HAL_OK)
- 11530              		.loc 1 706 7 is_stmt 1 view .LVU3703
- 706:Src/main.c    **** 						if (st != HAL_OK)
- 11531              		.loc 1 706 12 is_stmt 0 view .LVU3704
- 11532 087e 9048     		ldr	r0, .L618+36
- 11533 0880 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
- 11534              	.LVL1012:
- 707:Src/main.c    **** 							while(1);
- 11535              		.loc 1 707 7 is_stmt 1 view .LVU3705
- 707:Src/main.c    **** 							while(1);
- 11536              		.loc 1 707 10 is_stmt 0 view .LVU3706
- 11537 0884 78BB     		cbnz	r0, .L577
- 712:Src/main.c    **** 						uint32_t i = 10000; while (--i){}
- 11538              		.loc 1 712 7 is_stmt 1 view .LVU3707
- 11539 0886 0122     		movs	r2, #1
- 11540 0888 8021     		movs	r1, #128
- 11541 088a 8E48     		ldr	r0, .L618+40
- 11542              	.LVL1013:
- 712:Src/main.c    **** 						uint32_t i = 10000; while (--i){}
- 11543              		.loc 1 712 7 is_stmt 0 view .LVU3708
- 11544 088c FFF7FEFF 		bl	HAL_GPIO_WritePin
- 11545              	.LVL1014:
- 713:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11546              		.loc 1 713 7 is_stmt 1 view .LVU3709
- 713:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11547              		.loc 1 713 27 view .LVU3710
- 713:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11548              		.loc 1 713 16 is_stmt 0 view .LVU3711
- 11549 0890 42F21073 		movw	r3, #10000
- 11550              	.LVL1015:
- 11551              	.L578:
- 713:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11552              		.loc 1 713 39 is_stmt 1 discriminator 2 view .LVU3712
- 713:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11553              		.loc 1 713 34 discriminator 2 view .LVU3713
- 713:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11554              		.loc 1 713 34 is_stmt 0 discriminator 2 view .LVU3714
- 11555 0894 013B     		subs	r3, r3, #1
- 11556              	.LVL1016:
- 713:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 11557              		.loc 1 713 34 discriminator 2 view .LVU3715
- 11558 0896 FDD1     		bne	.L578
- 714:Src/main.c    **** 						LD_blinker.state = 2;
- 11559              		.loc 1 714 7 is_stmt 1 view .LVU3716
- 11560 0898 0022     		movs	r2, #0
- 11561 089a 8021     		movs	r1, #128
- 11562 089c 8948     		ldr	r0, .L618+40
- 11563 089e FFF7FEFF 		bl	HAL_GPIO_WritePin
-ARM GAS  /tmp/ccwR4KB7.s 			page 611
-
-
- 11564              	.LVL1017:
- 715:Src/main.c    **** 
- 11565              		.loc 1 715 7 view .LVU3717
- 715:Src/main.c    **** 
- 11566              		.loc 1 715 24 is_stmt 0 view .LVU3718
- 11567 08a2 844B     		ldr	r3, .L618+24
- 11568 08a4 0222     		movs	r2, #2
- 11569 08a6 9A72     		strb	r2, [r3, #10]
- 717:Src/main.c    **** 						if (st != HAL_OK)
- 11570              		.loc 1 717 7 is_stmt 1 view .LVU3719
- 717:Src/main.c    **** 						if (st != HAL_OK)
- 11571              		.loc 1 717 12 is_stmt 0 view .LVU3720
- 11572 08a8 8748     		ldr	r0, .L618+44
- 11573 08aa FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
- 11574              	.LVL1018:
- 718:Src/main.c    **** 							while(1);
- 11575              		.loc 1 718 7 is_stmt 1 view .LVU3721
- 718:Src/main.c    **** 							while(1);
- 11576              		.loc 1 718 10 is_stmt 0 view .LVU3722
- 11577 08ae D8B9     		cbnz	r0, .L580
- 11578              	.L581:
- 720:Src/main.c    **** 						{
- 11579              		.loc 1 720 33 is_stmt 1 view .LVU3723
- 720:Src/main.c    **** 						{
- 11580              		.loc 1 720 18 is_stmt 0 view .LVU3724
- 11581 08b0 7A4B     		ldr	r3, .L618
- 11582 08b2 D3ED047A 		vldr.32	s15, [r3, #16]
- 720:Src/main.c    **** 						{
- 11583              		.loc 1 720 39 view .LVU3725
- 11584 08b6 93ED027A 		vldr.32	s14, [r3, #8]
- 720:Src/main.c    **** 						{
- 11585              		.loc 1 720 33 view .LVU3726
- 11586 08ba F4EEC77A 		vcmpe.f32	s15, s14
- 11587 08be F1EE10FA 		vmrs	APSR_nzcv, FPSCR
- 11588 08c2 12D5     		bpl	.L611
- 722:Src/main.c    **** 							{
- 11589              		.loc 1 722 8 is_stmt 1 view .LVU3727
- 722:Src/main.c    **** 							{
- 11590              		.loc 1 722 12 is_stmt 0 view .LVU3728
- 11591 08c4 814B     		ldr	r3, .L618+48
- 11592 08c6 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
- 722:Src/main.c    **** 							{
- 11593              		.loc 1 722 11 view .LVU3729
- 11594 08c8 002B     		cmp	r3, #0
- 11595 08ca F1D0     		beq	.L581
- 727:Src/main.c    **** 								TO10 = 0;
- 11596              		.loc 1 727 9 is_stmt 1 view .LVU3730
- 727:Src/main.c    **** 								TO10 = 0;
- 11597              		.loc 1 727 35 is_stmt 0 view .LVU3731
- 11598 08cc 734B     		ldr	r3, .L618
- 11599 08ce 93ED037A 		vldr.32	s14, [r3, #12]
- 727:Src/main.c    **** 								TO10 = 0;
- 11600              		.loc 1 727 28 view .LVU3732
- 11601 08d2 77EE277A 		vadd.f32	s15, s14, s15
- 11602 08d6 C3ED047A 		vstr.32	s15, [r3, #16]
- 728:Src/main.c    **** 								TIM10_coflag = 0;
- 11603              		.loc 1 728 9 is_stmt 1 view .LVU3733
-ARM GAS  /tmp/ccwR4KB7.s 			page 612
-
-
- 728:Src/main.c    **** 								TIM10_coflag = 0;
- 11604              		.loc 1 728 14 is_stmt 0 view .LVU3734
- 11605 08da 0023     		movs	r3, #0
- 11606 08dc 7C4A     		ldr	r2, .L618+52
- 11607 08de 1360     		str	r3, [r2]
- 729:Src/main.c    **** 
- 11608              		.loc 1 729 9 is_stmt 1 view .LVU3735
- 729:Src/main.c    **** 
- 11609              		.loc 1 729 22 is_stmt 0 view .LVU3736
- 11610 08e0 7A4A     		ldr	r2, .L618+48
- 11611 08e2 1370     		strb	r3, [r2]
- 11612 08e4 E4E7     		b	.L581
- 11613              	.LVL1019:
- 11614              	.L577:
- 708:Src/main.c    **** //						*/
- 11615              		.loc 1 708 8 is_stmt 1 view .LVU3737
- 708:Src/main.c    **** //						*/
- 11616              		.loc 1 708 13 view .LVU3738
- 11617 08e6 FEE7     		b	.L577
- 11618              	.LVL1020:
- 11619              	.L580:
- 719:Src/main.c    **** 						while (task.current_param < task.max_param)
- 11620              		.loc 1 719 8 view .LVU3739
- 719:Src/main.c    **** 						while (task.current_param < task.max_param)
- 11621              		.loc 1 719 13 view .LVU3740
- 11622 08e8 FEE7     		b	.L580
- 11623              	.L611:
- 734:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 11624              		.loc 1 734 7 view .LVU3741
- 11625 08ea 7748     		ldr	r0, .L618+44
- 11626              	.LVL1021:
- 734:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 11627              		.loc 1 734 7 is_stmt 0 view .LVU3742
- 11628 08ec FFF7FEFF 		bl	HAL_TIM_Base_Stop
- 11629              	.LVL1022:
- 735:Src/main.c    **** 
- 11630              		.loc 1 735 7 is_stmt 1 view .LVU3743
- 11631 08f0 744C     		ldr	r4, .L618+40
- 11632 08f2 0122     		movs	r2, #1
- 11633 08f4 8021     		movs	r1, #128
- 11634 08f6 2046     		mov	r0, r4
- 11635 08f8 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 11636              	.LVL1023:
- 737:Src/main.c    **** 
- 11637              		.loc 1 737 7 view .LVU3744
- 11638 08fc 0022     		movs	r2, #0
- 11639 08fe 8021     		movs	r1, #128
- 11640 0900 2046     		mov	r0, r4
- 11641 0902 FFF7FEFF 		bl	HAL_GPIO_WritePin
- 11642              	.LVL1024:
- 739:Src/main.c    **** 						TIM8->CNT = 0;
- 11643              		.loc 1 739 7 view .LVU3745
- 11644 0906 6E48     		ldr	r0, .L618+36
- 11645 0908 FFF7FEFF 		bl	HAL_TIM_Base_Stop_IT
- 11646              	.LVL1025:
- 740:Src/main.c    **** 
- 11647              		.loc 1 740 7 view .LVU3746
-ARM GAS  /tmp/ccwR4KB7.s 			page 613
-
-
- 740:Src/main.c    **** 
- 11648              		.loc 1 740 17 is_stmt 0 view .LVU3747
- 11649 090c 6B4B     		ldr	r3, .L618+32
- 11650 090e 0022     		movs	r2, #0
- 11651 0910 5A62     		str	r2, [r3, #36]
- 742:Src/main.c    **** 						task.current_param = task.min_param;
- 11652              		.loc 1 742 7 is_stmt 1 view .LVU3748
- 11653 0912 FFF7FEFF 		bl	Stop_TIM10
- 11654              	.LVL1026:
- 743:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 11655              		.loc 1 743 7 view .LVU3749
- 743:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 11656              		.loc 1 743 32 is_stmt 0 view .LVU3750
- 11657 0916 614C     		ldr	r4, .L618
- 11658 0918 D4ED017A 		vldr.32	s15, [r4, #4]
- 743:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 11659              		.loc 1 743 26 view .LVU3751
- 11660 091c C4ED047A 		vstr.32	s15, [r4, #16]
- 744:Src/main.c    **** 						if (task.tau > 3)
- 11661              		.loc 1 744 7 is_stmt 1 view .LVU3752
- 11662 0920 FCEEE77A 		vcvt.u32.f32	s15, s15
- 11663 0924 17EE903A 		vmov	r3, s15	@ int
- 11664 0928 99B2     		uxth	r1, r3
- 11665 092a 0220     		movs	r0, #2
- 11666 092c FFF7FEFF 		bl	Set_LTEC
- 11667              	.LVL1027:
- 745:Src/main.c    **** 						{
- 11668              		.loc 1 745 7 view .LVU3753
- 745:Src/main.c    **** 						{
- 11669              		.loc 1 745 15 is_stmt 0 view .LVU3754
- 11670 0930 E38A     		ldrh	r3, [r4, #22]
- 745:Src/main.c    **** 						{
- 11671              		.loc 1 745 10 view .LVU3755
- 11672 0932 032B     		cmp	r3, #3
- 11673 0934 0CD9     		bls	.L583
- 747:Src/main.c    **** 							htim10.Init.Period = 9999;
- 11674              		.loc 1 747 8 is_stmt 1 view .LVU3756
- 747:Src/main.c    **** 							htim10.Init.Period = 9999;
- 11675              		.loc 1 747 34 is_stmt 0 view .LVU3757
- 11676 0936 644A     		ldr	r2, .L618+44
- 11677 0938 D068     		ldr	r0, [r2, #12]
- 747:Src/main.c    **** 							htim10.Init.Period = 9999;
- 11678              		.loc 1 747 21 view .LVU3758
- 11679 093a 6649     		ldr	r1, .L618+56
- 11680 093c 0860     		str	r0, [r1]
- 748:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
- 11681              		.loc 1 748 8 is_stmt 1 view .LVU3759
- 748:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
- 11682              		.loc 1 748 27 is_stmt 0 view .LVU3760
- 11683 093e 42F20F71 		movw	r1, #9999
- 11684 0942 D160     		str	r1, [r2, #12]
- 749:Src/main.c    **** 						}
- 11685              		.loc 1 749 8 is_stmt 1 view .LVU3761
- 749:Src/main.c    **** 						}
- 11686              		.loc 1 749 33 is_stmt 0 view .LVU3762
- 11687 0944 013B     		subs	r3, r3, #1
- 749:Src/main.c    **** 						}
-ARM GAS  /tmp/ccwR4KB7.s 			page 614
-
-
- 11688              		.loc 1 749 38 view .LVU3763
- 11689 0946 6422     		movs	r2, #100
- 11690 0948 02FB03F3 		mul	r3, r2, r3
- 749:Src/main.c    **** 						}
- 11691              		.loc 1 749 21 view .LVU3764
- 11692 094c 624A     		ldr	r2, .L618+60
- 11693 094e 1360     		str	r3, [r2]
- 11694              	.L583:
- 751:Src/main.c    **** 
- 11695              		.loc 1 751 7 is_stmt 1 view .LVU3765
- 11696 0950 5D48     		ldr	r0, .L618+44
- 11697 0952 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
- 11698              	.LVL1028:
- 799:Src/main.c    **** 					case TT_CHANGE_TEMP_1:
- 11699              		.loc 1 799 6 view .LVU3766
- 11700 0956 20E6     		b	.L568
- 11701              	.LVL1029:
- 11702              	.L608:
- 799:Src/main.c    **** 					case TT_CHANGE_TEMP_1:
- 11703              		.loc 1 799 6 is_stmt 0 view .LVU3767
- 11704              	.LBE670:
- 810:Src/main.c    **** 						
- 11705              		.loc 1 810 7 is_stmt 1 view .LVU3768
- 810:Src/main.c    **** 						
- 11706              		.loc 1 810 18 is_stmt 0 view .LVU3769
- 11707 0958 604A     		ldr	r2, .L618+64
- 11708 095a 1360     		str	r3, [r2]
- 812:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11709              		.loc 1 812 7 is_stmt 1 view .LVU3770
- 812:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11710              		.loc 1 812 25 is_stmt 0 view .LVU3771
- 11711 095c 0120     		movs	r0, #1
- 11712 095e FFF7FEFF 		bl	MPhD_T
- 11713              	.LVL1030:
- 812:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11714              		.loc 1 812 23 discriminator 1 view .LVU3772
- 11715 0962 4F4E     		ldr	r6, .L618+4
- 11716 0964 3081     		strh	r0, [r6, #8]	@ movhi
- 813:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11717              		.loc 1 813 7 is_stmt 1 view .LVU3773
- 813:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11718              		.loc 1 813 25 is_stmt 0 view .LVU3774
- 11719 0966 0120     		movs	r0, #1
- 11720 0968 FFF7FEFF 		bl	MPhD_T
- 11721              	.LVL1031:
- 813:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11722              		.loc 1 813 23 discriminator 1 view .LVU3775
- 11723 096c 3081     		strh	r0, [r6, #8]	@ movhi
- 814:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11724              		.loc 1 814 7 is_stmt 1 view .LVU3776
- 814:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11725              		.loc 1 814 25 is_stmt 0 view .LVU3777
- 11726 096e 0220     		movs	r0, #2
- 11727 0970 FFF7FEFF 		bl	MPhD_T
- 11728              	.LVL1032:
- 814:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11729              		.loc 1 814 23 discriminator 1 view .LVU3778
-ARM GAS  /tmp/ccwR4KB7.s 			page 615
-
-
- 11730 0974 4B4F     		ldr	r7, .L618+8
- 11731 0976 3881     		strh	r0, [r7, #8]	@ movhi
- 815:Src/main.c    **** 						
- 11732              		.loc 1 815 7 is_stmt 1 view .LVU3779
- 815:Src/main.c    **** 						
- 11733              		.loc 1 815 25 is_stmt 0 view .LVU3780
- 11734 0978 0220     		movs	r0, #2
- 11735 097a FFF7FEFF 		bl	MPhD_T
- 11736              	.LVL1033:
- 815:Src/main.c    **** 						
- 11737              		.loc 1 815 23 discriminator 1 view .LVU3781
- 11738 097e 3881     		strh	r0, [r7, #8]	@ movhi
- 817:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 11739              		.loc 1 817 7 is_stmt 1 view .LVU3782
- 817:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 11740              		.loc 1 817 31 is_stmt 0 view .LVU3783
- 11741 0980 3389     		ldrh	r3, [r6, #8]
- 817:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 11742              		.loc 1 817 20 view .LVU3784
- 11743 0982 574C     		ldr	r4, .L618+68
- 11744 0984 6380     		strh	r3, [r4, #2]	@ movhi
- 818:Src/main.c    **** 	
- 11745              		.loc 1 818 7 is_stmt 1 view .LVU3785
- 818:Src/main.c    **** 	
- 11746              		.loc 1 818 20 is_stmt 0 view .LVU3786
- 11747 0986 A080     		strh	r0, [r4, #4]	@ movhi
- 822:Src/main.c    **** 						temp16 = Get_ADC(1);
- 11748              		.loc 1 822 7 is_stmt 1 view .LVU3787
- 822:Src/main.c    **** 						temp16 = Get_ADC(1);
- 11749              		.loc 1 822 16 is_stmt 0 view .LVU3788
- 11750 0988 0020     		movs	r0, #0
- 11751 098a FFF7FEFF 		bl	Get_ADC
- 11752              	.LVL1034:
- 822:Src/main.c    **** 						temp16 = Get_ADC(1);
- 11753              		.loc 1 822 14 discriminator 1 view .LVU3789
- 11754 098e 474D     		ldr	r5, .L618+16
- 11755 0990 2880     		strh	r0, [r5]	@ movhi
- 823:Src/main.c    **** 						Long_Data[7] = temp16;
- 11756              		.loc 1 823 7 is_stmt 1 view .LVU3790
- 823:Src/main.c    **** 						Long_Data[7] = temp16;
- 11757              		.loc 1 823 16 is_stmt 0 view .LVU3791
- 11758 0992 0120     		movs	r0, #1
- 11759 0994 FFF7FEFF 		bl	Get_ADC
- 11760              	.LVL1035:
- 823:Src/main.c    **** 						Long_Data[7] = temp16;
- 11761              		.loc 1 823 14 discriminator 1 view .LVU3792
- 11762 0998 2880     		strh	r0, [r5]	@ movhi
- 824:Src/main.c    **** 						
- 11763              		.loc 1 824 7 is_stmt 1 view .LVU3793
- 824:Src/main.c    **** 						
- 11764              		.loc 1 824 20 is_stmt 0 view .LVU3794
- 11765 099a E081     		strh	r0, [r4, #14]	@ movhi
- 827:Src/main.c    **** 						Long_Data[8] = temp16;
- 11766              		.loc 1 827 7 is_stmt 1 view .LVU3795
- 827:Src/main.c    **** 						Long_Data[8] = temp16;
- 11767              		.loc 1 827 16 is_stmt 0 view .LVU3796
- 11768 099c 0120     		movs	r0, #1
-ARM GAS  /tmp/ccwR4KB7.s 			page 616
-
-
- 11769 099e FFF7FEFF 		bl	Get_ADC
- 11770              	.LVL1036:
- 827:Src/main.c    **** 						Long_Data[8] = temp16;
- 11771              		.loc 1 827 14 discriminator 1 view .LVU3797
- 11772 09a2 2880     		strh	r0, [r5]	@ movhi
- 828:Src/main.c    **** 						
- 11773              		.loc 1 828 7 is_stmt 1 view .LVU3798
- 828:Src/main.c    **** 						
- 11774              		.loc 1 828 20 is_stmt 0 view .LVU3799
- 11775 09a4 2082     		strh	r0, [r4, #16]	@ movhi
- 831:Src/main.c    **** 						Long_Data[9] = temp16;
- 11776              		.loc 1 831 7 is_stmt 1 view .LVU3800
- 831:Src/main.c    **** 						Long_Data[9] = temp16;
- 11777              		.loc 1 831 16 is_stmt 0 view .LVU3801
- 11778 09a6 0120     		movs	r0, #1
- 11779 09a8 FFF7FEFF 		bl	Get_ADC
- 11780              	.LVL1037:
- 831:Src/main.c    **** 						Long_Data[9] = temp16;
- 11781              		.loc 1 831 14 discriminator 1 view .LVU3802
- 11782 09ac 2880     		strh	r0, [r5]	@ movhi
- 832:Src/main.c    **** 						
- 11783              		.loc 1 832 7 is_stmt 1 view .LVU3803
- 832:Src/main.c    **** 						
- 11784              		.loc 1 832 20 is_stmt 0 view .LVU3804
- 11785 09ae 6082     		strh	r0, [r4, #18]	@ movhi
- 835:Src/main.c    **** 						Long_Data[10] = temp16;
- 11786              		.loc 1 835 7 is_stmt 1 view .LVU3805
- 835:Src/main.c    **** 						Long_Data[10] = temp16;
- 11787              		.loc 1 835 16 is_stmt 0 view .LVU3806
- 11788 09b0 0120     		movs	r0, #1
- 11789 09b2 FFF7FEFF 		bl	Get_ADC
- 11790              	.LVL1038:
- 835:Src/main.c    **** 						Long_Data[10] = temp16;
- 11791              		.loc 1 835 14 discriminator 1 view .LVU3807
- 11792 09b6 2880     		strh	r0, [r5]	@ movhi
- 836:Src/main.c    **** 						
- 11793              		.loc 1 836 7 is_stmt 1 view .LVU3808
- 836:Src/main.c    **** 						
- 11794              		.loc 1 836 21 is_stmt 0 view .LVU3809
- 11795 09b8 A082     		strh	r0, [r4, #20]	@ movhi
- 839:Src/main.c    **** 						Long_Data[11] = temp16;
- 11796              		.loc 1 839 7 is_stmt 1 view .LVU3810
- 839:Src/main.c    **** 						Long_Data[11] = temp16;
- 11797              		.loc 1 839 16 is_stmt 0 view .LVU3811
- 11798 09ba 0120     		movs	r0, #1
- 11799 09bc FFF7FEFF 		bl	Get_ADC
- 11800              	.LVL1039:
- 839:Src/main.c    **** 						Long_Data[11] = temp16;
- 11801              		.loc 1 839 14 discriminator 1 view .LVU3812
- 11802 09c0 2880     		strh	r0, [r5]	@ movhi
- 840:Src/main.c    **** 						temp16 = Get_ADC(2);
- 11803              		.loc 1 840 7 is_stmt 1 view .LVU3813
- 840:Src/main.c    **** 						temp16 = Get_ADC(2);
- 11804              		.loc 1 840 21 is_stmt 0 view .LVU3814
- 11805 09c2 E082     		strh	r0, [r4, #22]	@ movhi
- 841:Src/main.c    **** 						
- 11806              		.loc 1 841 7 is_stmt 1 view .LVU3815
-ARM GAS  /tmp/ccwR4KB7.s 			page 617
-
-
- 841:Src/main.c    **** 						
- 11807              		.loc 1 841 16 is_stmt 0 view .LVU3816
- 11808 09c4 0220     		movs	r0, #2
- 11809 09c6 FFF7FEFF 		bl	Get_ADC
- 11810              	.LVL1040:
- 841:Src/main.c    **** 						
- 11811              		.loc 1 841 14 discriminator 1 view .LVU3817
- 11812 09ca 2880     		strh	r0, [r5]	@ movhi
- 844:Src/main.c    **** 						temp16 = Get_ADC(4);
- 11813              		.loc 1 844 7 is_stmt 1 view .LVU3818
- 844:Src/main.c    **** 						temp16 = Get_ADC(4);
- 11814              		.loc 1 844 16 is_stmt 0 view .LVU3819
- 11815 09cc 0320     		movs	r0, #3
- 11816 09ce FFF7FEFF 		bl	Get_ADC
- 11817              	.LVL1041:
- 844:Src/main.c    **** 						temp16 = Get_ADC(4);
- 11818              		.loc 1 844 14 discriminator 1 view .LVU3820
- 11819 09d2 2880     		strh	r0, [r5]	@ movhi
- 845:Src/main.c    **** 						Long_Data[12] = temp16;
- 11820              		.loc 1 845 7 is_stmt 1 view .LVU3821
- 845:Src/main.c    **** 						Long_Data[12] = temp16;
- 11821              		.loc 1 845 16 is_stmt 0 view .LVU3822
- 11822 09d4 0420     		movs	r0, #4
- 11823 09d6 FFF7FEFF 		bl	Get_ADC
- 11824              	.LVL1042:
- 845:Src/main.c    **** 						Long_Data[12] = temp16;
- 11825              		.loc 1 845 14 discriminator 1 view .LVU3823
- 11826 09da 2880     		strh	r0, [r5]	@ movhi
- 846:Src/main.c    **** 						temp16 = Get_ADC(5);
- 11827              		.loc 1 846 7 is_stmt 1 view .LVU3824
- 846:Src/main.c    **** 						temp16 = Get_ADC(5);
- 11828              		.loc 1 846 21 is_stmt 0 view .LVU3825
- 11829 09dc 2083     		strh	r0, [r4, #24]	@ movhi
- 847:Src/main.c    **** 													
- 11830              		.loc 1 847 7 is_stmt 1 view .LVU3826
- 847:Src/main.c    **** 													
- 11831              		.loc 1 847 16 is_stmt 0 view .LVU3827
- 11832 09de 0520     		movs	r0, #5
- 11833 09e0 FFF7FEFF 		bl	Get_ADC
- 11834              	.LVL1043:
- 847:Src/main.c    **** 													
- 11835              		.loc 1 847 14 discriminator 1 view .LVU3828
- 11836 09e4 2880     		strh	r0, [r5]	@ movhi
- 850:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
- 11837              		.loc 1 850 7 is_stmt 1 view .LVU3829
- 850:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
- 11838              		.loc 1 850 16 is_stmt 0 view .LVU3830
- 11839 09e6 3F4B     		ldr	r3, .L618+72
- 11840 09e8 1B68     		ldr	r3, [r3]
- 11841 09ea 3F4A     		ldr	r2, .L618+76
- 11842 09ec 1360     		str	r3, [r2]
- 851:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
- 11843              		.loc 1 851 7 is_stmt 1 view .LVU3831
- 851:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
- 11844              		.loc 1 851 20 is_stmt 0 view .LVU3832
- 11845 09ee E380     		strh	r3, [r4, #6]	@ movhi
- 852:Src/main.c    **** 						
-ARM GAS  /tmp/ccwR4KB7.s 			page 618
-
-
- 11846              		.loc 1 852 7 is_stmt 1 view .LVU3833
- 852:Src/main.c    **** 						
- 11847              		.loc 1 852 31 is_stmt 0 view .LVU3834
- 11848 09f0 1B0C     		lsrs	r3, r3, #16
- 852:Src/main.c    **** 						
- 11849              		.loc 1 852 20 view .LVU3835
- 11850 09f2 2381     		strh	r3, [r4, #8]	@ movhi
- 855:Src/main.c    **** 						
- 11851              		.loc 1 855 7 is_stmt 1 view .LVU3836
- 855:Src/main.c    **** 						
- 11852              		.loc 1 855 31 is_stmt 0 view .LVU3837
- 11853 09f4 3388     		ldrh	r3, [r6]
- 855:Src/main.c    **** 						
- 11854              		.loc 1 855 20 view .LVU3838
- 11855 09f6 6381     		strh	r3, [r4, #10]	@ movhi
- 858:Src/main.c    **** 					}
- 11856              		.loc 1 858 7 is_stmt 1 view .LVU3839
- 858:Src/main.c    **** 					}
- 11857              		.loc 1 858 31 is_stmt 0 view .LVU3840
- 11858 09f8 3B88     		ldrh	r3, [r7]
- 858:Src/main.c    **** 					}
- 11859              		.loc 1 858 20 view .LVU3841
- 11860 09fa A381     		strh	r3, [r4, #12]	@ movhi
- 11861 09fc D4E5     		b	.L585
- 11862              	.L587:
- 886:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
- 11863              		.loc 1 886 5 is_stmt 1 view .LVU3842
- 886:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
- 11864              		.loc 1 886 17 is_stmt 0 view .LVU3843
- 11865 09fe 3B4C     		ldr	r4, .L618+80
- 11866 0a00 0D21     		movs	r1, #13
- 11867 0a02 2046     		mov	r0, r4
- 11868 0a04 FFF7FEFF 		bl	CalculateChecksum
- 11869              	.LVL1044:
- 886:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
- 11870              		.loc 1 886 15 discriminator 1 view .LVU3844
- 11871 0a08 394B     		ldr	r3, .L618+84
- 11872 0a0a 1880     		strh	r0, [r3]	@ movhi
- 887:Src/main.c    **** 				
- 11873              		.loc 1 887 5 is_stmt 1 view .LVU3845
- 887:Src/main.c    **** 				
- 11874              		.loc 1 887 24 is_stmt 0 view .LVU3846
- 11875 0a0c 6083     		strh	r0, [r4, #26]	@ movhi
- 889:Src/main.c    **** 				{
- 11876              		.loc 1 889 5 is_stmt 1 view .LVU3847
- 11877              	.LBB671:
- 889:Src/main.c    **** 				{
- 11878              		.loc 1 889 10 view .LVU3848
- 11879              	.LVL1045:
- 889:Src/main.c    **** 				{
- 11880              		.loc 1 889 19 is_stmt 0 view .LVU3849
- 11881 0a0e 0023     		movs	r3, #0
- 889:Src/main.c    **** 				{
- 11882              		.loc 1 889 5 view .LVU3850
- 11883 0a10 0BE0     		b	.L590
- 11884              	.LVL1046:
- 11885              	.L591:
-ARM GAS  /tmp/ccwR4KB7.s 			page 619
-
-
- 891:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 11886              		.loc 1 891 6 is_stmt 1 view .LVU3851
- 891:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 11887              		.loc 1 891 33 is_stmt 0 view .LVU3852
- 11888 0a12 334A     		ldr	r2, .L618+68
- 11889 0a14 32F81320 		ldrh	r2, [r2, r3, lsl #1]
- 891:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 11890              		.loc 1 891 17 view .LVU3853
- 11891 0a18 5900     		lsls	r1, r3, #1
- 891:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 11892              		.loc 1 891 21 view .LVU3854
- 11893 0a1a 3648     		ldr	r0, .L618+88
- 11894 0a1c 00F81320 		strb	r2, [r0, r3, lsl #1]
- 892:Src/main.c    **** 				}
- 11895              		.loc 1 892 6 is_stmt 1 view .LVU3855
- 892:Src/main.c    **** 				}
- 11896              		.loc 1 892 19 is_stmt 0 view .LVU3856
- 11897 0a20 0131     		adds	r1, r1, #1
- 892:Src/main.c    **** 				}
- 11898              		.loc 1 892 23 view .LVU3857
- 11899 0a22 120A     		lsrs	r2, r2, #8
- 11900 0a24 4254     		strb	r2, [r0, r1]
- 889:Src/main.c    **** 				{
- 11901              		.loc 1 889 38 is_stmt 1 discriminator 3 view .LVU3858
- 11902 0a26 0133     		adds	r3, r3, #1
- 11903              	.LVL1047:
- 889:Src/main.c    **** 				{
- 11904              		.loc 1 889 38 is_stmt 0 discriminator 3 view .LVU3859
- 11905 0a28 9BB2     		uxth	r3, r3
- 11906              	.LVL1048:
- 11907              	.L590:
- 889:Src/main.c    **** 				{
- 11908              		.loc 1 889 28 is_stmt 1 discriminator 1 view .LVU3860
- 11909 0a2a 0E2B     		cmp	r3, #14
- 11910 0a2c F1D9     		bls	.L591
- 11911              	.LBE671:
- 899:Src/main.c    **** 				UART_transmission_request = NO_MESS;
- 11912              		.loc 1 899 5 view .LVU3861
- 11913 0a2e 1E20     		movs	r0, #30
- 11914 0a30 FFF7FEFF 		bl	USART_TX_DMA
- 11915              	.LVL1049:
- 900:Src/main.c    **** 			break;
- 11916              		.loc 1 900 5 view .LVU3862
- 900:Src/main.c    **** 			break;
- 11917              		.loc 1 900 31 is_stmt 0 view .LVU3863
- 11918 0a34 304B     		ldr	r3, .L618+92
- 11919 0a36 0022     		movs	r2, #0
- 11920 0a38 1A70     		strb	r2, [r3]
- 901:Src/main.c    **** 			case MESS_03://Transmith saved packet
- 11921              		.loc 1 901 4 is_stmt 1 view .LVU3864
- 11922 0a3a FFF76EBB 		b	.L589
- 11923              	.LVL1050:
- 11924              	.L592:
- 11925              	.LBB672:
- 905:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 11926              		.loc 1 905 6 view .LVU3865
- 905:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
-ARM GAS  /tmp/ccwR4KB7.s 			page 620
-
-
- 11927              		.loc 1 905 33 is_stmt 0 view .LVU3866
- 11928 0a3e 284A     		ldr	r2, .L618+68
- 11929 0a40 32F81320 		ldrh	r2, [r2, r3, lsl #1]
- 905:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 11930              		.loc 1 905 17 view .LVU3867
- 11931 0a44 5900     		lsls	r1, r3, #1
- 905:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 11932              		.loc 1 905 21 view .LVU3868
- 11933 0a46 2B48     		ldr	r0, .L618+88
- 11934 0a48 00F81320 		strb	r2, [r0, r3, lsl #1]
- 906:Src/main.c    **** 				}
- 11935              		.loc 1 906 6 is_stmt 1 view .LVU3869
- 906:Src/main.c    **** 				}
- 11936              		.loc 1 906 19 is_stmt 0 view .LVU3870
- 11937 0a4c 0131     		adds	r1, r1, #1
- 906:Src/main.c    **** 				}
- 11938              		.loc 1 906 23 view .LVU3871
- 11939 0a4e 120A     		lsrs	r2, r2, #8
- 11940 0a50 4254     		strb	r2, [r0, r1]
- 903:Src/main.c    **** 				{
- 11941              		.loc 1 903 38 is_stmt 1 discriminator 3 view .LVU3872
- 11942 0a52 0133     		adds	r3, r3, #1
- 11943              	.LVL1051:
- 903:Src/main.c    **** 				{
- 11944              		.loc 1 903 38 is_stmt 0 discriminator 3 view .LVU3873
- 11945 0a54 9BB2     		uxth	r3, r3
- 11946              	.LVL1052:
- 11947              	.L588:
- 903:Src/main.c    **** 				{
- 11948              		.loc 1 903 28 is_stmt 1 discriminator 1 view .LVU3874
- 11949 0a56 0E2B     		cmp	r3, #14
- 11950 0a58 F1D9     		bls	.L592
- 11951              	.LBE672:
- 912:Src/main.c    **** 				UART_transmission_request = NO_MESS;
- 11952              		.loc 1 912 5 view .LVU3875
- 11953 0a5a 1E20     		movs	r0, #30
- 11954 0a5c FFF7FEFF 		bl	USART_TX_DMA
- 11955              	.LVL1053:
- 913:Src/main.c    **** 			break;			
- 11956              		.loc 1 913 5 view .LVU3876
- 913:Src/main.c    **** 			break;			
- 11957              		.loc 1 913 31 is_stmt 0 view .LVU3877
- 11958 0a60 254B     		ldr	r3, .L618+92
- 11959 0a62 0022     		movs	r2, #0
- 11960 0a64 1A70     		strb	r2, [r3]
- 914:Src/main.c    **** 		}
- 11961              		.loc 1 914 4 is_stmt 1 view .LVU3878
- 11962 0a66 FFF758BB 		b	.L589
- 11963              	.LVL1054:
- 11964              	.L598:
- 874:Src/main.c    **** 		{
- 11965              		.loc 1 874 3 is_stmt 0 view .LVU3879
- 11966 0a6a 0023     		movs	r3, #0
- 11967 0a6c F3E7     		b	.L588
- 11968              	.L601:
- 916:Src/main.c    **** 		{
- 11969              		.loc 1 916 28 discriminator 1 view .LVU3880
-ARM GAS  /tmp/ccwR4KB7.s 			page 621
-
-
- 11970 0a6e 1D4B     		ldr	r3, .L618+72
- 11971 0a70 1B68     		ldr	r3, [r3]
- 11972 0a72 224A     		ldr	r2, .L618+96
- 11973 0a74 1268     		ldr	r2, [r2]
- 11974 0a76 9B1A     		subs	r3, r3, r2
- 916:Src/main.c    **** 		{
- 11975              		.loc 1 916 21 discriminator 1 view .LVU3881
- 11976 0a78 642B     		cmp	r3, #100
- 11977 0a7a 7FF653AB 		bls	.L535
- 918:Src/main.c    **** 			State_Data[0] |= UART_ERR;//timeout error!
- 11978              		.loc 1 918 4 is_stmt 1 view .LVU3882
- 918:Src/main.c    **** 			State_Data[0] |= UART_ERR;//timeout error!
- 11979              		.loc 1 918 18 is_stmt 0 view .LVU3883
- 11980 0a7e 0022     		movs	r2, #0
- 11981 0a80 1F4B     		ldr	r3, .L618+100
- 11982 0a82 1A80     		strh	r2, [r3]	@ movhi
- 919:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
- 11983              		.loc 1 919 4 is_stmt 1 view .LVU3884
- 919:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
- 11984              		.loc 1 919 14 is_stmt 0 view .LVU3885
- 11985 0a84 1F49     		ldr	r1, .L618+104
- 11986 0a86 0B78     		ldrb	r3, [r1]	@ zero_extendqisi2
- 919:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
- 11987              		.loc 1 919 18 view .LVU3886
- 11988 0a88 43F00203 		orr	r3, r3, #2
- 11989 0a8c 0B70     		strb	r3, [r1]
- 920:Src/main.c    **** 			flg_tmt = 0;//Reset timeout flag
- 11990              		.loc 1 920 4 is_stmt 1 view .LVU3887
- 920:Src/main.c    **** 			flg_tmt = 0;//Reset timeout flag
- 11991              		.loc 1 920 30 is_stmt 0 view .LVU3888
- 11992 0a8e 1A4B     		ldr	r3, .L618+92
- 11993 0a90 0121     		movs	r1, #1
- 11994 0a92 1970     		strb	r1, [r3]
- 921:Src/main.c    **** 		}
- 11995              		.loc 1 921 4 is_stmt 1 view .LVU3889
- 921:Src/main.c    **** 		}
- 11996              		.loc 1 921 12 is_stmt 0 view .LVU3890
- 11997 0a94 1C4B     		ldr	r3, .L618+108
- 11998 0a96 1A70     		strb	r2, [r3]
- 11999 0a98 FFF744BB 		b	.L535
- 12000              	.L619:
- 12001              		.align	2
- 12002              	.L618:
- 12003 0a9c 00000000 		.word	task
- 12004 0aa0 00000000 		.word	LD1_param
- 12005 0aa4 00000000 		.word	LD2_param
- 12006 0aa8 00000000 		.word	LD1_curr_setup
- 12007 0aac 00000000 		.word	temp16
- 12008 0ab0 00000000 		.word	LD2_curr_setup
- 12009 0ab4 00000000 		.word	LD_blinker
- 12010 0ab8 00040240 		.word	1073873920
- 12011 0abc 00040140 		.word	1073808384
- 12012 0ac0 00000000 		.word	htim8
- 12013 0ac4 000C0240 		.word	1073875968
- 12014 0ac8 00000000 		.word	htim10
- 12015 0acc 00000000 		.word	TIM10_coflag
- 12016 0ad0 00000000 		.word	TO10
-ARM GAS  /tmp/ccwR4KB7.s 			page 622
-
-
- 12017 0ad4 00000000 		.word	TIM10_period
- 12018 0ad8 00000000 		.word	TO10_counter
- 12019 0adc 00000000 		.word	TO7_before
- 12020 0ae0 00000000 		.word	Long_Data
- 12021 0ae4 00000000 		.word	TO6
- 12022 0ae8 00000000 		.word	TO6_stop
- 12023 0aec 02000000 		.word	Long_Data+2
- 12024 0af0 00000000 		.word	CS_result
- 12025 0af4 00000000 		.word	UART_DATA
- 12026 0af8 00000000 		.word	UART_transmission_request
- 12027 0afc 00000000 		.word	TO6_uart
- 12028 0b00 00000000 		.word	UART_rec_incr
- 12029 0b04 00000000 		.word	State_Data
- 12030 0b08 00000000 		.word	flg_tmt
- 12031              		.cfi_endproc
- 12032              	.LFE1186:
- 12034              		.section	.rodata.ad9102_example2_regval,"a"
- 12035              		.align	2
- 12038              	ad9102_example2_regval:
- 12039 0000 0000     		.short	0
- 12040 0002 000E     		.short	3584
- 12041 0004 0000     		.short	0
- 12042 0006 0000     		.short	0
- 12043 0008 0000     		.short	0
- 12044 000a 0000     		.short	0
- 12045 000c 0000     		.short	0
- 12046 000e 0040     		.short	16384
- 12047 0010 0000     		.short	0
- 12048 0012 0000     		.short	0
- 12049 0014 0000     		.short	0
- 12050 0016 0000     		.short	0
- 12051 0018 001F     		.short	7936
- 12052 001a 0000     		.short	0
- 12053 001c 0000     		.short	0
- 12054 001e 0000     		.short	0
- 12055 0020 0E00     		.short	14
- 12056 0022 0000     		.short	0
- 12057 0024 0000     		.short	0
- 12058 0026 0000     		.short	0
- 12059 0028 0000     		.short	0
- 12060 002a 0000     		.short	0
- 12061 002c 3030     		.short	12336
- 12062 002e 1101     		.short	273
- 12063 0030 FFFF     		.short	-1
- 12064 0032 0000     		.short	0
- 12065 0034 0101     		.short	257
- 12066 0036 0300     		.short	3
- 12067 0038 0000     		.short	0
- 12068 003a 0000     		.short	0
- 12069 003c 0000     		.short	0
- 12070 003e 0000     		.short	0
- 12071 0040 0000     		.short	0
- 12072 0042 0000     		.short	0
- 12073 0044 0000     		.short	0
- 12074 0046 0000     		.short	0
- 12075 0048 0040     		.short	16384
- 12076 004a 0000     		.short	0
-ARM GAS  /tmp/ccwR4KB7.s 			page 623
-
-
- 12077 004c 0002     		.short	512
- 12078 004e 0000     		.short	0
- 12079 0050 0000     		.short	0
- 12080 0052 0000     		.short	0
- 12081 0054 0000     		.short	0
- 12082 0056 0000     		.short	0
- 12083 0058 0000     		.short	0
- 12084 005a 0000     		.short	0
- 12085 005c 0000     		.short	0
- 12086 005e 0000     		.short	0
- 12087 0060 0000     		.short	0
- 12088 0062 0000     		.short	0
- 12089 0064 0000     		.short	0
- 12090 0066 0000     		.short	0
- 12091 0068 0000     		.short	0
- 12092 006a 0000     		.short	0
- 12093 006c 0000     		.short	0
- 12094 006e 0000     		.short	0
- 12095 0070 0000     		.short	0
- 12096 0072 0000     		.short	0
- 12097 0074 0000     		.short	0
- 12098 0076 0000     		.short	0
- 12099 0078 A00F     		.short	4000
- 12100 007a 0000     		.short	0
- 12101 007c F03F     		.short	16368
- 12102 007e 0001     		.short	256
- 12103 0080 0100     		.short	1
- 12104 0082 0100     		.short	1
- 12105              		.section	.rodata.ad9102_example4_regval,"a"
- 12106              		.align	2
- 12109              	ad9102_example4_regval:
- 12110 0000 0000     		.short	0
- 12111 0002 0000     		.short	0
- 12112 0004 0000     		.short	0
- 12113 0006 0000     		.short	0
- 12114 0008 0000     		.short	0
- 12115 000a 0000     		.short	0
- 12116 000c 0000     		.short	0
- 12117 000e 0040     		.short	16384
- 12118 0010 0000     		.short	0
- 12119 0012 0000     		.short	0
- 12120 0014 0000     		.short	0
- 12121 0016 0000     		.short	0
- 12122 0018 001F     		.short	7936
- 12123 001a 0000     		.short	0
- 12124 001c 0000     		.short	0
- 12125 001e 0000     		.short	0
- 12126 0020 0E00     		.short	14
- 12127 0022 0000     		.short	0
- 12128 0024 0000     		.short	0
- 12129 0026 0000     		.short	0
- 12130 0028 0000     		.short	0
- 12131 002a 0000     		.short	0
- 12132 002c 1232     		.short	12818
- 12133 002e 2101     		.short	289
- 12134 0030 FFFF     		.short	-1
- 12135 0032 0000     		.short	0
-ARM GAS  /tmp/ccwR4KB7.s 			page 624
-
-
- 12136 0034 0101     		.short	257
- 12137 0036 0300     		.short	3
- 12138 0038 0000     		.short	0
- 12139 003a 0000     		.short	0
- 12140 003c 0000     		.short	0
- 12141 003e 0000     		.short	0
- 12142 0040 0000     		.short	0
- 12143 0042 0000     		.short	0
- 12144 0044 0000     		.short	0
- 12145 0046 0000     		.short	0
- 12146 0048 0040     		.short	16384
- 12147 004a 0000     		.short	0
- 12148 004c 0606     		.short	1542
- 12149 004e 9919     		.short	6553
- 12150 0050 009A     		.short	-26112
- 12151 0052 0000     		.short	0
- 12152 0054 0000     		.short	0
- 12153 0056 0000     		.short	0
- 12154 0058 0000     		.short	0
- 12155 005a 0000     		.short	0
- 12156 005c 0000     		.short	0
- 12157 005e 0000     		.short	0
- 12158 0060 A00F     		.short	4000
- 12159 0062 0000     		.short	0
- 12160 0064 0000     		.short	0
- 12161 0066 0000     		.short	0
- 12162 0068 0000     		.short	0
- 12163 006a 0000     		.short	0
- 12164 006c 0000     		.short	0
- 12165 006e 0000     		.short	0
- 12166 0070 0000     		.short	0
- 12167 0072 0000     		.short	0
- 12168 0074 0000     		.short	0
- 12169 0076 0000     		.short	0
- 12170 0078 0000     		.short	0
- 12171 007a 0000     		.short	0
- 12172 007c 0000     		.short	0
- 12173 007e FF16     		.short	5887
- 12174 0080 0100     		.short	1
- 12175 0082 0100     		.short	1
- 12176              		.section	.rodata.ad9102_reg_addr,"a"
- 12177              		.align	2
- 12180              	ad9102_reg_addr:
- 12181 0000 0000     		.short	0
- 12182 0002 0100     		.short	1
- 12183 0004 0200     		.short	2
- 12184 0006 0300     		.short	3
- 12185 0008 0400     		.short	4
- 12186 000a 0500     		.short	5
- 12187 000c 0600     		.short	6
- 12188 000e 0700     		.short	7
- 12189 0010 0800     		.short	8
- 12190 0012 0900     		.short	9
- 12191 0014 0A00     		.short	10
- 12192 0016 0B00     		.short	11
- 12193 0018 0C00     		.short	12
- 12194 001a 0D00     		.short	13
-ARM GAS  /tmp/ccwR4KB7.s 			page 625
-
-
- 12195 001c 0E00     		.short	14
- 12196 001e 1F00     		.short	31
- 12197 0020 2000     		.short	32
- 12198 0022 2200     		.short	34
- 12199 0024 2300     		.short	35
- 12200 0026 2400     		.short	36
- 12201 0028 2500     		.short	37
- 12202 002a 2600     		.short	38
- 12203 002c 2700     		.short	39
- 12204 002e 2800     		.short	40
- 12205 0030 2900     		.short	41
- 12206 0032 2A00     		.short	42
- 12207 0034 2B00     		.short	43
- 12208 0036 2C00     		.short	44
- 12209 0038 2D00     		.short	45
- 12210 003a 2E00     		.short	46
- 12211 003c 2F00     		.short	47
- 12212 003e 3000     		.short	48
- 12213 0040 3100     		.short	49
- 12214 0042 3200     		.short	50
- 12215 0044 3300     		.short	51
- 12216 0046 3400     		.short	52
- 12217 0048 3500     		.short	53
- 12218 004a 3600     		.short	54
- 12219 004c 3700     		.short	55
- 12220 004e 3E00     		.short	62
- 12221 0050 3F00     		.short	63
- 12222 0052 4000     		.short	64
- 12223 0054 4100     		.short	65
- 12224 0056 4200     		.short	66
- 12225 0058 4300     		.short	67
- 12226 005a 4400     		.short	68
- 12227 005c 4500     		.short	69
- 12228 005e 4700     		.short	71
- 12229 0060 5000     		.short	80
- 12230 0062 5100     		.short	81
- 12231 0064 5200     		.short	82
- 12232 0066 5300     		.short	83
- 12233 0068 5400     		.short	84
- 12234 006a 5500     		.short	85
- 12235 006c 5600     		.short	86
- 12236 006e 5700     		.short	87
- 12237 0070 5800     		.short	88
- 12238 0072 5900     		.short	89
- 12239 0074 5A00     		.short	90
- 12240 0076 5B00     		.short	91
- 12241 0078 5C00     		.short	92
- 12242 007a 5D00     		.short	93
- 12243 007c 5E00     		.short	94
- 12244 007e 5F00     		.short	95
- 12245 0080 1E00     		.short	30
- 12246 0082 1D00     		.short	29
- 12247              		.global	task
- 12248              		.section	.bss.task,"aw",%nobits
- 12249              		.align	2
- 12252              	task:
- 12253 0000 00000000 		.space	52
-ARM GAS  /tmp/ccwR4KB7.s 			page 626
-
-
- 12253      00000000 
- 12253      00000000 
- 12253      00000000 
- 12253      00000000 
- 12254              		.global	LD_blinker
- 12255              		.section	.bss.LD_blinker,"aw",%nobits
- 12256              		.align	2
- 12259              	LD_blinker:
- 12260 0000 00000000 		.space	12
- 12260      00000000 
- 12260      00000000 
- 12261              		.global	LD2_param
- 12262              		.section	.bss.LD2_param,"aw",%nobits
- 12263              		.align	2
- 12266              	LD2_param:
- 12267 0000 00000000 		.space	12
- 12267      00000000 
- 12267      00000000 
- 12268              		.global	LD1_param
- 12269              		.section	.bss.LD1_param,"aw",%nobits
- 12270              		.align	2
- 12273              	LD1_param:
- 12274 0000 00000000 		.space	12
- 12274      00000000 
- 12274      00000000 
- 12275              		.global	Def_setup
- 12276              		.section	.bss.Def_setup,"aw",%nobits
- 12277              		.align	2
- 12280              	Def_setup:
- 12281 0000 00000000 		.space	18
- 12281      00000000 
- 12281      00000000 
- 12281      00000000 
- 12281      0000
- 12282              		.global	Curr_setup
- 12283              		.section	.bss.Curr_setup,"aw",%nobits
- 12284              		.align	2
- 12287              	Curr_setup:
- 12288 0000 00000000 		.space	18
- 12288      00000000 
- 12288      00000000 
- 12288      00000000 
- 12288      0000
- 12289              		.global	LD2_def_setup
- 12290              		.section	.bss.LD2_def_setup,"aw",%nobits
- 12291              		.align	2
- 12294              	LD2_def_setup:
- 12295 0000 00000000 		.space	16
- 12295      00000000 
- 12295      00000000 
- 12295      00000000 
- 12296              		.global	LD1_def_setup
- 12297              		.section	.bss.LD1_def_setup,"aw",%nobits
- 12298              		.align	2
- 12301              	LD1_def_setup:
- 12302 0000 00000000 		.space	16
- 12302      00000000 
-ARM GAS  /tmp/ccwR4KB7.s 			page 627
-
-
- 12302      00000000 
- 12302      00000000 
- 12303              		.global	LD2_curr_setup
- 12304              		.section	.bss.LD2_curr_setup,"aw",%nobits
- 12305              		.align	2
- 12308              	LD2_curr_setup:
- 12309 0000 00000000 		.space	16
- 12309      00000000 
- 12309      00000000 
- 12309      00000000 
- 12310              		.global	LD1_curr_setup
- 12311              		.section	.bss.LD1_curr_setup,"aw",%nobits
- 12312              		.align	2
- 12315              	LD1_curr_setup:
- 12316 0000 00000000 		.space	16
- 12316      00000000 
- 12316      00000000 
- 12316      00000000 
- 12317              		.global	sizeoffile
- 12318              		.section	.bss.sizeoffile,"aw",%nobits
- 12319              		.align	2
- 12322              	sizeoffile:
- 12323 0000 00000000 		.space	4
- 12324              		.global	fgoto
- 12325              		.section	.bss.fgoto,"aw",%nobits
- 12326              		.align	2
- 12329              	fgoto:
- 12330 0000 00000000 		.space	4
- 12331              		.global	test
- 12332              		.section	.bss.test,"aw",%nobits
- 12333              		.align	2
- 12336              	test:
- 12337 0000 00000000 		.space	4
- 12338              		.global	fresult
- 12339              		.section	.bss.fresult,"aw",%nobits
- 12342              	fresult:
- 12343 0000 00       		.space	1
- 12344              		.global	COMMAND
- 12345              		.section	.bss.COMMAND,"aw",%nobits
- 12346              		.align	2
- 12349              	COMMAND:
- 12350 0000 00000000 		.space	30
- 12350      00000000 
- 12350      00000000 
- 12350      00000000 
- 12350      00000000 
- 12351              		.global	Long_Data
- 12352              		.section	.bss.Long_Data,"aw",%nobits
- 12353              		.align	2
- 12356              	Long_Data:
- 12357 0000 00000000 		.space	30
- 12357      00000000 
- 12357      00000000 
- 12357      00000000 
- 12357      00000000 
- 12358              		.global	temp16
- 12359              		.section	.bss.temp16,"aw",%nobits
-ARM GAS  /tmp/ccwR4KB7.s 			page 628
-
-
- 12360              		.align	1
- 12363              	temp16:
- 12364 0000 0000     		.space	2
- 12365              		.global	CS_result
- 12366              		.section	.bss.CS_result,"aw",%nobits
- 12367              		.align	1
- 12370              	CS_result:
- 12371 0000 0000     		.space	2
- 12372              		.global	UART_header
- 12373              		.section	.bss.UART_header,"aw",%nobits
- 12374              		.align	1
- 12377              	UART_header:
- 12378 0000 0000     		.space	2
- 12379              		.global	UART_rec_incr
- 12380              		.section	.bss.UART_rec_incr,"aw",%nobits
- 12381              		.align	1
- 12384              	UART_rec_incr:
- 12385 0000 0000     		.space	2
- 12386              		.global	TIM10_coflag
- 12387              		.section	.bss.TIM10_coflag,"aw",%nobits
- 12390              	TIM10_coflag:
- 12391 0000 00       		.space	1
- 12392              		.global	u_rx_flg
- 12393              		.section	.bss.u_rx_flg,"aw",%nobits
- 12396              	u_rx_flg:
- 12397 0000 00       		.space	1
- 12398              		.global	u_tx_flg
- 12399              		.section	.bss.u_tx_flg,"aw",%nobits
- 12402              	u_tx_flg:
- 12403 0000 00       		.space	1
- 12404              		.global	flg_tmt
- 12405              		.section	.bss.flg_tmt,"aw",%nobits
- 12408              	flg_tmt:
- 12409 0000 00       		.space	1
- 12410              		.global	UART_DATA
- 12411              		.section	.bss.UART_DATA,"aw",%nobits
- 12412              		.align	2
- 12415              	UART_DATA:
- 12416 0000 00000000 		.space	30
- 12416      00000000 
- 12416      00000000 
- 12416      00000000 
- 12416      00000000 
- 12417              		.global	State_Data
- 12418              		.section	.bss.State_Data,"aw",%nobits
- 12419              		.align	2
- 12422              	State_Data:
- 12423 0000 0000     		.space	2
- 12424              		.global	UART_transmission_request
- 12425              		.section	.bss.UART_transmission_request,"aw",%nobits
- 12428              	UART_transmission_request:
- 12429 0000 00       		.space	1
- 12430              		.global	CPU_state_old
- 12431              		.section	.bss.CPU_state_old,"aw",%nobits
- 12434              	CPU_state_old:
- 12435 0000 00       		.space	1
- 12436              		.global	CPU_state
-ARM GAS  /tmp/ccwR4KB7.s 			page 629
-
-
- 12437              		.section	.bss.CPU_state,"aw",%nobits
- 12440              	CPU_state:
- 12441 0000 00       		.space	1
- 12442              		.global	uart_buf
- 12443              		.section	.bss.uart_buf,"aw",%nobits
- 12446              	uart_buf:
- 12447 0000 00       		.space	1
- 12448              		.global	TIM10_period
- 12449              		.section	.bss.TIM10_period,"aw",%nobits
- 12450              		.align	2
- 12453              	TIM10_period:
- 12454 0000 00000000 		.space	4
- 12455              		.global	TO10_counter
- 12456              		.section	.bss.TO10_counter,"aw",%nobits
- 12457              		.align	2
- 12460              	TO10_counter:
- 12461 0000 00000000 		.space	4
- 12462              		.global	TO10
- 12463              		.section	.bss.TO10,"aw",%nobits
- 12464              		.align	2
- 12467              	TO10:
- 12468 0000 00000000 		.space	4
- 12469              		.global	TO7_PID
- 12470              		.section	.bss.TO7_PID,"aw",%nobits
- 12471              		.align	2
- 12474              	TO7_PID:
- 12475 0000 00000000 		.space	4
- 12476              		.global	TO7_before
- 12477              		.section	.bss.TO7_before,"aw",%nobits
- 12478              		.align	2
- 12481              	TO7_before:
- 12482 0000 00000000 		.space	4
- 12483              		.global	TO7
- 12484              		.section	.bss.TO7,"aw",%nobits
- 12485              		.align	2
- 12488              	TO7:
- 12489 0000 00000000 		.space	4
- 12490              		.global	temp32
- 12491              		.section	.bss.temp32,"aw",%nobits
- 12492              		.align	2
- 12495              	temp32:
- 12496 0000 00000000 		.space	4
- 12497              		.global	SD_SLIDE
- 12498              		.section	.bss.SD_SLIDE,"aw",%nobits
- 12499              		.align	2
- 12502              	SD_SLIDE:
- 12503 0000 00000000 		.space	4
- 12504              		.global	SD_SEEK
- 12505              		.section	.bss.SD_SEEK,"aw",%nobits
- 12506              		.align	2
- 12509              	SD_SEEK:
- 12510 0000 00000000 		.space	4
- 12511              		.global	TO6_uart
- 12512              		.section	.bss.TO6_uart,"aw",%nobits
- 12513              		.align	2
- 12516              	TO6_uart:
- 12517 0000 00000000 		.space	4
-ARM GAS  /tmp/ccwR4KB7.s 			page 630
-
-
- 12518              		.global	TO6_stop
- 12519              		.section	.bss.TO6_stop,"aw",%nobits
- 12520              		.align	2
- 12523              	TO6_stop:
- 12524 0000 00000000 		.space	4
- 12525              		.global	TO6_before
- 12526              		.section	.bss.TO6_before,"aw",%nobits
- 12527              		.align	2
- 12530              	TO6_before:
- 12531 0000 00000000 		.space	4
- 12532              		.global	TO6
- 12533              		.section	.bss.TO6,"aw",%nobits
- 12534              		.align	2
- 12537              	TO6:
- 12538 0000 00000000 		.space	4
- 12539              		.global	huart8
- 12540              		.section	.bss.huart8,"aw",%nobits
- 12541              		.align	2
- 12544              	huart8:
- 12545 0000 00000000 		.space	136
- 12545      00000000 
- 12545      00000000 
- 12545      00000000 
- 12545      00000000 
- 12546              		.global	htim11
- 12547              		.section	.bss.htim11,"aw",%nobits
- 12548              		.align	2
- 12551              	htim11:
- 12552 0000 00000000 		.space	76
- 12552      00000000 
- 12552      00000000 
- 12552      00000000 
- 12552      00000000 
- 12553              		.global	htim10
- 12554              		.section	.bss.htim10,"aw",%nobits
- 12555              		.align	2
- 12558              	htim10:
- 12559 0000 00000000 		.space	76
- 12559      00000000 
- 12559      00000000 
- 12559      00000000 
- 12559      00000000 
- 12560              		.global	htim8
- 12561              		.section	.bss.htim8,"aw",%nobits
- 12562              		.align	2
- 12565              	htim8:
- 12566 0000 00000000 		.space	76
- 12566      00000000 
- 12566      00000000 
- 12566      00000000 
- 12566      00000000 
- 12567              		.global	htim4
- 12568              		.section	.bss.htim4,"aw",%nobits
- 12569              		.align	2
- 12572              	htim4:
- 12573 0000 00000000 		.space	76
- 12573      00000000 
-ARM GAS  /tmp/ccwR4KB7.s 			page 631
-
-
- 12573      00000000 
- 12573      00000000 
- 12573      00000000 
- 12574              		.global	hsd1
- 12575              		.section	.bss.hsd1,"aw",%nobits
- 12576              		.align	2
- 12579              	hsd1:
- 12580 0000 00000000 		.space	132
- 12580      00000000 
- 12580      00000000 
- 12580      00000000 
- 12580      00000000 
- 12581              		.global	hadc3
- 12582              		.section	.bss.hadc3,"aw",%nobits
- 12583              		.align	2
- 12586              	hadc3:
- 12587 0000 00000000 		.space	72
- 12587      00000000 
- 12587      00000000 
- 12587      00000000 
- 12587      00000000 
- 12588              		.global	hadc1
- 12589              		.section	.bss.hadc1,"aw",%nobits
- 12590              		.align	2
- 12593              	hadc1:
- 12594 0000 00000000 		.space	72
- 12594      00000000 
- 12594      00000000 
- 12594      00000000 
- 12594      00000000 
- 12595              		.text
- 12596              	.Letext0:
- 12597              		.file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
- 12598              		.file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 12599              		.file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- 12600              		.file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
- 12601              		.file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
- 12602              		.file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h"
- 12603              		.file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
- 12604              		.file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
- 12605              		.file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
- 12606              		.file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
- 12607              		.file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
- 12608              		.file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
- 12609              		.file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
- 12610              		.file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- 12611              		.file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h"
- 12612              		.file 24 "Inc/main.h"
- 12613              		.file 25 "Middlewares/Third_Party/FatFs/src/ff.h"
- 12614              		.file 26 "Inc/File_Handling.h"
- 12615              		.file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h"
- 12616              		.file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h"
- 12617              		.file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- 12618              		.file 30 "Inc/fatfs.h"
- 12619              		.file 31 "<built-in>"
-ARM GAS  /tmp/ccwR4KB7.s 			page 632
+ 11446              		.loc 1 456 21 is_stmt 0 view .LVU3626
+ 11447 03be A082     		strh	r0, [r4, #20]	@ movhi
+ 459:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
+ 11448              		.loc 1 459 7 is_stmt 1 view .LVU3627
+ 459:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
+ 11449              		.loc 1 459 16 is_stmt 0 view .LVU3628
+ 11450 03c0 0120     		movs	r0, #1
+ 11451 03c2 FFF7FEFF 		bl	Get_ADC
+ 11452              	.LVL1020:
+ 459:Src/main.c    **** 						Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
+ 11453              		.loc 1 459 14 discriminator 1 view .LVU3629
+ 11454 03c6 2880     		strh	r0, [r5]	@ movhi
+ 460:Src/main.c    **** 						temp16 = Get_ADC(2);
+ 11455              		.loc 1 460 7 is_stmt 1 view .LVU3630
+ 460:Src/main.c    **** 						temp16 = Get_ADC(2);
+ 11456              		.loc 1 460 21 is_stmt 0 view .LVU3631
+ 11457 03c8 E082     		strh	r0, [r4, #22]	@ movhi
+ 461:Src/main.c    **** 						
+ 11458              		.loc 1 461 7 is_stmt 1 view .LVU3632
+ 461:Src/main.c    **** 						
+ 11459              		.loc 1 461 16 is_stmt 0 view .LVU3633
+ 11460 03ca 0220     		movs	r0, #2
+ 11461 03cc FFF7FEFF 		bl	Get_ADC
+ 11462              	.LVL1021:
+ 461:Src/main.c    **** 						
+ 11463              		.loc 1 461 14 discriminator 1 view .LVU3634
+ 11464 03d0 2880     		strh	r0, [r5]	@ movhi
+ 464:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 11465              		.loc 1 464 7 is_stmt 1 view .LVU3635
+ 464:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 11466              		.loc 1 464 16 is_stmt 0 view .LVU3636
+ 11467 03d2 0320     		movs	r0, #3
+ 11468 03d4 FFF7FEFF 		bl	Get_ADC
+ 11469              	.LVL1022:
+ 464:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 11470              		.loc 1 464 14 discriminator 1 view .LVU3637
+ 11471 03d8 2880     		strh	r0, [r5]	@ movhi
+ 465:Src/main.c    **** 						Long_Data[12] = temp16;
+ 11472              		.loc 1 465 7 is_stmt 1 view .LVU3638
+ 465:Src/main.c    **** 						Long_Data[12] = temp16;
+ 11473              		.loc 1 465 16 is_stmt 0 view .LVU3639
+ 11474 03da 0420     		movs	r0, #4
+ 11475 03dc FFF7FEFF 		bl	Get_ADC
+ 11476              	.LVL1023:
+ 465:Src/main.c    **** 						Long_Data[12] = temp16;
+ 11477              		.loc 1 465 14 discriminator 1 view .LVU3640
+ 11478 03e0 2880     		strh	r0, [r5]	@ movhi
+ 466:Src/main.c    **** 						temp16 = Get_ADC(5);
+ 11479              		.loc 1 466 7 is_stmt 1 view .LVU3641
+ARM GAS  /tmp/ccEQxcUB.s 			page 613
+
+
+ 466:Src/main.c    **** 						temp16 = Get_ADC(5);
+ 11480              		.loc 1 466 21 is_stmt 0 view .LVU3642
+ 11481 03e2 2083     		strh	r0, [r4, #24]	@ movhi
+ 467:Src/main.c    **** 													
+ 11482              		.loc 1 467 7 is_stmt 1 view .LVU3643
+ 467:Src/main.c    **** 													
+ 11483              		.loc 1 467 16 is_stmt 0 view .LVU3644
+ 11484 03e4 0520     		movs	r0, #5
+ 11485 03e6 FFF7FEFF 		bl	Get_ADC
+ 11486              	.LVL1024:
+ 467:Src/main.c    **** 													
+ 11487              		.loc 1 467 14 discriminator 1 view .LVU3645
+ 11488 03ea 2880     		strh	r0, [r5]	@ movhi
+ 470:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
+ 11489              		.loc 1 470 7 is_stmt 1 view .LVU3646
+ 470:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
+ 11490              		.loc 1 470 16 is_stmt 0 view .LVU3647
+ 11491 03ec 774B     		ldr	r3, .L681+28
+ 11492 03ee 1B68     		ldr	r3, [r3]
+ 11493 03f0 774A     		ldr	r2, .L681+32
+ 11494 03f2 1360     		str	r3, [r2]
+ 471:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
+ 11495              		.loc 1 471 7 is_stmt 1 view .LVU3648
+ 471:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
+ 11496              		.loc 1 471 20 is_stmt 0 view .LVU3649
+ 11497 03f4 E380     		strh	r3, [r4, #6]	@ movhi
+ 472:Src/main.c    **** 						
+ 11498              		.loc 1 472 7 is_stmt 1 view .LVU3650
+ 472:Src/main.c    **** 						
+ 11499              		.loc 1 472 31 is_stmt 0 view .LVU3651
+ 11500 03f6 1B0C     		lsrs	r3, r3, #16
+ 472:Src/main.c    **** 						
+ 11501              		.loc 1 472 20 view .LVU3652
+ 11502 03f8 2381     		strh	r3, [r4, #8]	@ movhi
+ 475:Src/main.c    **** 						
+ 11503              		.loc 1 475 7 is_stmt 1 view .LVU3653
+ 475:Src/main.c    **** 						
+ 11504              		.loc 1 475 31 is_stmt 0 view .LVU3654
+ 11505 03fa 3B88     		ldrh	r3, [r7]
+ 475:Src/main.c    **** 						
+ 11506              		.loc 1 475 20 view .LVU3655
+ 11507 03fc 6381     		strh	r3, [r4, #10]	@ movhi
+ 478:Src/main.c    **** 
+ 11508              		.loc 1 478 7 is_stmt 1 view .LVU3656
+ 478:Src/main.c    **** 
+ 11509              		.loc 1 478 31 is_stmt 0 view .LVU3657
+ 11510 03fe 3388     		ldrh	r3, [r6]
+ 478:Src/main.c    **** 
+ 11511              		.loc 1 478 20 view .LVU3658
+ 11512 0400 A381     		strh	r3, [r4, #12]	@ movhi
+ 480:Src/main.c    **** 						{
+ 11513              		.loc 1 480 7 is_stmt 1 view .LVU3659
+ 480:Src/main.c    **** 						{
+ 11514              		.loc 1 480 21 is_stmt 0 view .LVU3660
+ 11515 0402 744B     		ldr	r3, .L681+36
+ 11516 0404 DB7A     		ldrb	r3, [r3, #11]	@ zero_extendqisi2
+ 480:Src/main.c    **** 						{
+ARM GAS  /tmp/ccEQxcUB.s 			page 614
+
+
+ 11517              		.loc 1 480 10 view .LVU3661
+ 11518 0406 012B     		cmp	r3, #1
+ 11519 0408 03D0     		beq	.L670
+ 11520              	.L610:
+ 487:Src/main.c    **** 						}
+ 11521              		.loc 1 487 7 is_stmt 1 view .LVU3662
+ 487:Src/main.c    **** 						}
+ 11522              		.loc 1 487 21 is_stmt 0 view .LVU3663
+ 11523 040a 734B     		ldr	r3, .L681+40
+ 11524 040c 0722     		movs	r2, #7
+ 11525 040e 1A70     		strb	r2, [r3]
+ 11526 0410 75E6     		b	.L591
+ 11527              	.L670:
+ 482:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
+ 11528              		.loc 1 482 8 is_stmt 1 view .LVU3664
+ 482:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
+ 11529              		.loc 1 482 20 is_stmt 0 view .LVU3665
+ 11530 0412 0234     		adds	r4, r4, #2
+ 11531 0414 0D21     		movs	r1, #13
+ 11532 0416 2046     		mov	r0, r4
+ 11533 0418 FFF7FEFF 		bl	CalculateChecksum
+ 11534              	.LVL1025:
+ 11535 041c 0346     		mov	r3, r0
+ 482:Src/main.c    **** 							Long_Data[DL_16-1] = CS_result;
+ 11536              		.loc 1 482 18 discriminator 1 view .LVU3666
+ 11537 041e 6F4A     		ldr	r2, .L681+44
+ 11538 0420 1080     		strh	r0, [r2]	@ movhi
+ 483:Src/main.c    **** 							temp16 = SD_SAVE(&Long_Data[0]);
+ 11539              		.loc 1 483 8 is_stmt 1 view .LVU3667
+ 483:Src/main.c    **** 							temp16 = SD_SAVE(&Long_Data[0]);
+ 11540              		.loc 1 483 27 is_stmt 0 view .LVU3668
+ 11541 0422 A01E     		subs	r0, r4, #2
+ 11542 0424 8383     		strh	r3, [r0, #28]	@ movhi
+ 484:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
+ 11543              		.loc 1 484 8 is_stmt 1 view .LVU3669
+ 484:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
+ 11544              		.loc 1 484 17 is_stmt 0 view .LVU3670
+ 11545 0426 FFF7FEFF 		bl	SD_SAVE
+ 11546              	.LVL1026:
+ 11547 042a 0346     		mov	r3, r0
+ 484:Src/main.c    **** 							State_Data[0]|=temp16&0xff;
+ 11548              		.loc 1 484 15 discriminator 1 view .LVU3671
+ 11549 042c 2880     		strh	r0, [r5]	@ movhi
+ 485:Src/main.c    **** 						}
+ 11550              		.loc 1 485 8 is_stmt 1 view .LVU3672
+ 485:Src/main.c    **** 						}
+ 11551              		.loc 1 485 18 is_stmt 0 view .LVU3673
+ 11552 042e 6C49     		ldr	r1, .L681+48
+ 11553 0430 0A78     		ldrb	r2, [r1]	@ zero_extendqisi2
+ 485:Src/main.c    **** 						}
+ 11554              		.loc 1 485 21 view .LVU3674
+ 11555 0432 1343     		orrs	r3, r3, r2
+ 11556 0434 0B70     		strb	r3, [r1]
+ 11557 0436 E8E7     		b	.L610
+ 11558              	.L595:
+ 491:Src/main.c    **** 					{
+ 11559              		.loc 1 491 6 is_stmt 1 view .LVU3675
+ARM GAS  /tmp/ccEQxcUB.s 			page 615
+
+
+ 491:Src/main.c    **** 					{
+ 11560              		.loc 1 491 10 is_stmt 0 view .LVU3676
+ 11561 0438 6A4C     		ldr	r4, .L681+52
+ 11562 043a 0321     		movs	r1, #3
+ 11563 043c 2046     		mov	r0, r4
+ 11564 043e FFF7FEFF 		bl	CalculateChecksum
+ 11565              	.LVL1027:
+ 491:Src/main.c    **** 					{
+ 11566              		.loc 1 491 69 discriminator 1 view .LVU3677
+ 11567 0442 E388     		ldrh	r3, [r4, #6]
+ 491:Src/main.c    **** 					{
+ 11568              		.loc 1 491 9 discriminator 1 view .LVU3678
+ 11569 0444 9842     		cmp	r0, r3
+ 11570 0446 0CD0     		beq	.L671
+ 566:Src/main.c    **** 					}
+ 11571              		.loc 1 566 7 is_stmt 1 view .LVU3679
+ 566:Src/main.c    **** 					}
+ 11572              		.loc 1 566 17 is_stmt 0 view .LVU3680
+ 11573 0448 654A     		ldr	r2, .L681+48
+ 11574 044a 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 566:Src/main.c    **** 					}
+ 11575              		.loc 1 566 21 view .LVU3681
+ 11576 044c 43F00403 		orr	r3, r3, #4
+ 11577 0450 1370     		strb	r3, [r2]
+ 11578              	.L614:
+ 568:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11579              		.loc 1 568 6 is_stmt 1 view .LVU3682
+ 568:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11580              		.loc 1 568 32 is_stmt 0 view .LVU3683
+ 11581 0452 654B     		ldr	r3, .L681+56
+ 11582 0454 0122     		movs	r2, #1
+ 11583 0456 1A70     		strb	r2, [r3]
+ 569:Src/main.c    **** 				break;
+ 11584              		.loc 1 569 6 is_stmt 1 view .LVU3684
+ 569:Src/main.c    **** 				break;
+ 11585              		.loc 1 569 16 is_stmt 0 view .LVU3685
+ 11586 0458 5F4B     		ldr	r3, .L681+40
+ 11587 045a 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
+ 11588 045c 634B     		ldr	r3, .L681+60
+ 11589 045e 1A70     		strb	r2, [r3]
+ 570:Src/main.c    **** 				case AD9833_CMD://11 - Configure AD9833 triangle output
+ 11590              		.loc 1 570 5 is_stmt 1 view .LVU3686
+ 11591 0460 4DE6     		b	.L591
+ 11592              	.L671:
+ 11593              	.LBB703:
+ 493:Src/main.c    **** 						uint16_t param0 = COMMAND[1];
+ 11594              		.loc 1 493 7 view .LVU3687
+ 493:Src/main.c    **** 						uint16_t param0 = COMMAND[1];
+ 11595              		.loc 1 493 16 is_stmt 0 view .LVU3688
+ 11596 0462 2388     		ldrh	r3, [r4]
+ 11597              	.LVL1028:
+ 494:Src/main.c    **** 						uint16_t param1 = COMMAND[2];
+ 11598              		.loc 1 494 7 is_stmt 1 view .LVU3689
+ 494:Src/main.c    **** 						uint16_t param1 = COMMAND[2];
+ 11599              		.loc 1 494 16 is_stmt 0 view .LVU3690
+ 11600 0464 6188     		ldrh	r1, [r4, #2]
+ 11601              	.LVL1029:
+ARM GAS  /tmp/ccEQxcUB.s 			page 616
+
+
+ 495:Src/main.c    **** 						uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
+ 11602              		.loc 1 495 7 is_stmt 1 view .LVU3691
+ 495:Src/main.c    **** 						uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
+ 11603              		.loc 1 495 16 is_stmt 0 view .LVU3692
+ 11604 0466 A488     		ldrh	r4, [r4, #4]
+ 11605              	.LVL1030:
+ 496:Src/main.c    **** 						uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
+ 11606              		.loc 1 496 7 is_stmt 1 view .LVU3693
+ 496:Src/main.c    **** 						uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
+ 11607              		.loc 1 496 15 is_stmt 0 view .LVU3694
+ 11608 0468 03F00106 		and	r6, r3, #1
+ 11609              	.LVL1031:
+ 497:Src/main.c    **** 						uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
+ 11610              		.loc 1 497 7 is_stmt 1 view .LVU3695
+ 497:Src/main.c    **** 						uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
+ 11611              		.loc 1 497 15 is_stmt 0 view .LVU3696
+ 11612 046c C3F34005 		ubfx	r5, r3, #1, #1
+ 11613              	.LVL1032:
+ 498:Src/main.c    **** 
+ 11614              		.loc 1 498 7 is_stmt 1 view .LVU3697
+ 500:Src/main.c    **** 						{
+ 11615              		.loc 1 500 7 view .LVU3698
+ 500:Src/main.c    **** 						{
+ 11616              		.loc 1 500 10 is_stmt 0 view .LVU3699
+ 11617 0470 13F0040F 		tst	r3, #4
+ 11618 0474 1FD0     		beq	.L612
+ 11619              	.LBB704:
+ 502:Src/main.c    **** 							uint16_t samples;
+ 11620              		.loc 1 502 8 is_stmt 1 view .LVU3700
+ 11621              	.LVL1033:
+ 503:Src/main.c    **** 							uint8_t hold;
+ 11622              		.loc 1 503 8 view .LVU3701
+ 504:Src/main.c    **** 							uint16_t amplitude;
+ 11623              		.loc 1 504 8 view .LVU3702
+ 505:Src/main.c    **** 
+ 11624              		.loc 1 505 8 view .LVU3703
+ 507:Src/main.c    **** 							{
+ 11625              		.loc 1 507 8 view .LVU3704
+ 507:Src/main.c    **** 							{
+ 11626              		.loc 1 507 11 is_stmt 0 view .LVU3705
+ 11627 0476 13F0080F 		tst	r3, #8
+ 11628 047a 05D1     		bne	.L655
+ 515:Src/main.c    **** 								hold = (uint8_t)(param1 & 0x0Fu);
+ 11629              		.loc 1 515 9 is_stmt 1 view .LVU3706
+ 11630              	.LVL1034:
+ 516:Src/main.c    **** 								amplitude = AD9102_SRAM_AMP_DEFAULT;
+ 11631              		.loc 1 516 9 view .LVU3707
+ 516:Src/main.c    **** 								amplitude = AD9102_SRAM_AMP_DEFAULT;
+ 11632              		.loc 1 516 14 is_stmt 0 view .LVU3708
+ 11633 047c 04F00F07 		and	r7, r4, #15
+ 11634              	.LVL1035:
+ 517:Src/main.c    **** 							}
+ 11635              		.loc 1 517 9 is_stmt 1 view .LVU3709
+ 515:Src/main.c    **** 								hold = (uint8_t)(param1 & 0x0Fu);
+ 11636              		.loc 1 515 17 is_stmt 0 view .LVU3710
+ 11637 0480 0C46     		mov	r4, r1
+ 11638              	.LVL1036:
+ARM GAS  /tmp/ccEQxcUB.s 			page 617
+
+
+ 517:Src/main.c    **** 							}
+ 11639              		.loc 1 517 19 view .LVU3711
+ 11640 0482 41F6FF71 		movw	r1, #8191
+ 11641              	.LVL1037:
+ 517:Src/main.c    **** 							}
+ 11642              		.loc 1 517 19 view .LVU3712
+ 11643 0486 00E0     		b	.L613
+ 11644              	.LVL1038:
+ 11645              	.L655:
+ 511:Src/main.c    **** 							}
+ 11646              		.loc 1 511 14 view .LVU3713
+ 11647 0488 0127     		movs	r7, #1
+ 11648              	.LVL1039:
+ 11649              	.L613:
+ 520:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 11650              		.loc 1 520 8 is_stmt 1 view .LVU3714
+ 520:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 11651              		.loc 1 520 30 is_stmt 0 view .LVU3715
+ 11652 048a 0091     		str	r1, [sp]
+ 11653 048c 2B46     		mov	r3, r5
+ 11654              	.LVL1040:
+ 520:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 11655              		.loc 1 520 30 view .LVU3716
+ 11656 048e 3A46     		mov	r2, r7
+ 11657 0490 2146     		mov	r1, r4
+ 11658              	.LVL1041:
+ 520:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 11659              		.loc 1 520 30 view .LVU3717
+ 11660 0492 3046     		mov	r0, r6
+ 11661 0494 FFF7FEFF 		bl	AD9102_ApplySram
+ 11662              	.LVL1042:
+ 521:Src/main.c    **** 							if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
+ 11663              		.loc 1 521 8 is_stmt 1 view .LVU3718
+ 521:Src/main.c    **** 							if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
+ 11664              		.loc 1 521 22 is_stmt 0 view .LVU3719
+ 11665 0498 514B     		ldr	r3, .L681+48
+ 11666 049a 5870     		strb	r0, [r3, #1]
+ 522:Src/main.c    **** 							{
+ 11667              		.loc 1 522 8 is_stmt 1 view .LVU3720
+ 522:Src/main.c    **** 							{
+ 11668              		.loc 1 522 12 is_stmt 0 view .LVU3721
+ 11669 049c 3B46     		mov	r3, r7
+ 11670 049e 2246     		mov	r2, r4
+ 11671 04a0 3146     		mov	r1, r6
+ 11672 04a2 FFF7FEFF 		bl	AD9102_CheckFlagsSram
+ 11673              	.LVL1043:
+ 522:Src/main.c    **** 							{
+ 11674              		.loc 1 522 11 discriminator 1 view .LVU3722
+ 11675 04a6 0028     		cmp	r0, #0
+ 11676 04a8 D3D0     		beq	.L614
+ 524:Src/main.c    **** 							}
+ 11677              		.loc 1 524 9 is_stmt 1 view .LVU3723
+ 524:Src/main.c    **** 							}
+ 11678              		.loc 1 524 19 is_stmt 0 view .LVU3724
+ 11679 04aa 4D4A     		ldr	r2, .L681+48
+ 11680 04ac 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 524:Src/main.c    **** 							}
+ARM GAS  /tmp/ccEQxcUB.s 			page 618
+
+
+ 11681              		.loc 1 524 23 view .LVU3725
+ 11682 04ae 63F07F03 		orn	r3, r3, #127
+ 11683 04b2 1370     		strb	r3, [r2]
+ 11684 04b4 CDE7     		b	.L614
+ 11685              	.LVL1044:
+ 11686              	.L612:
+ 524:Src/main.c    **** 							}
+ 11687              		.loc 1 524 23 view .LVU3726
+ 11688              	.LBE704:
+ 11689              	.LBB705:
+ 529:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
+ 11690              		.loc 1 529 8 is_stmt 1 view .LVU3727
+ 529:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
+ 11691              		.loc 1 529 16 is_stmt 0 view .LVU3728
+ 11692 04b6 05B1     		cbz	r5, .L615
+ 529:Src/main.c    **** 							uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
+ 11693              		.loc 1 529 16 discriminator 1 view .LVU3729
+ 11694 04b8 0225     		movs	r5, #2
+ 11695              	.LVL1045:
+ 11696              	.L615:
+ 530:Src/main.c    **** 							uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
+ 11697              		.loc 1 530 8 is_stmt 1 view .LVU3730
+ 530:Src/main.c    **** 							uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
+ 11698              		.loc 1 530 16 is_stmt 0 view .LVU3731
+ 11699 04ba CFB2     		uxtb	r7, r1
+ 11700              	.LVL1046:
+ 531:Src/main.c    **** 							uint16_t pat_period = param1;
+ 11701              		.loc 1 531 8 is_stmt 1 view .LVU3732
+ 531:Src/main.c    **** 							uint16_t pat_period = param1;
+ 11702              		.loc 1 531 16 is_stmt 0 view .LVU3733
+ 11703 04bc C1F30328 		ubfx	r8, r1, #8, #4
+ 11704              	.LVL1047:
+ 532:Src/main.c    **** 
+ 11705              		.loc 1 532 8 is_stmt 1 view .LVU3734
+ 534:Src/main.c    **** 							{
+ 11706              		.loc 1 534 8 view .LVU3735
+ 534:Src/main.c    **** 							{
+ 11707              		.loc 1 534 11 is_stmt 0 view .LVU3736
+ 11708 04c0 2143     		orrs	r1, r1, r4
+ 11709              	.LVL1048:
+ 534:Src/main.c    **** 							{
+ 11710              		.loc 1 534 11 view .LVU3737
+ 11711 04c2 09D0     		beq	.L656
+ 542:Src/main.c    **** 								{
+ 11712              		.loc 1 542 9 is_stmt 1 view .LVU3738
+ 542:Src/main.c    **** 								{
+ 11713              		.loc 1 542 12 is_stmt 0 view .LVU3739
+ 11714 04c4 1FB1     		cbz	r7, .L657
+ 546:Src/main.c    **** 								{
+ 11715              		.loc 1 546 14 is_stmt 1 view .LVU3740
+ 546:Src/main.c    **** 								{
+ 11716              		.loc 1 546 17 is_stmt 0 view .LVU3741
+ 11717 04c6 3F2F     		cmp	r7, #63
+ 11718 04c8 02D9     		bls	.L617
+ 548:Src/main.c    **** 								}
+ 11719              		.loc 1 548 19 view .LVU3742
+ 11720 04ca 3F27     		movs	r7, #63
+ARM GAS  /tmp/ccEQxcUB.s 			page 619
+
+
+ 11721              	.LVL1049:
+ 548:Src/main.c    **** 								}
+ 11722              		.loc 1 548 19 view .LVU3743
+ 11723 04cc 00E0     		b	.L617
+ 11724              	.LVL1050:
+ 11725              	.L657:
+ 544:Src/main.c    **** 								}
+ 11726              		.loc 1 544 19 view .LVU3744
+ 11727 04ce 0127     		movs	r7, #1
+ 11728              	.LVL1051:
+ 11729              	.L617:
+ 550:Src/main.c    **** 								{
+ 11730              		.loc 1 550 9 is_stmt 1 view .LVU3745
+ 550:Src/main.c    **** 								{
+ 11731              		.loc 1 550 12 is_stmt 0 view .LVU3746
+ 11732 04d0 3CB9     		cbnz	r4, .L616
+ 552:Src/main.c    **** 								}
+ 11733              		.loc 1 552 21 view .LVU3747
+ 11734 04d2 4FF6FF74 		movw	r4, #65535
+ 11735              	.LVL1052:
+ 552:Src/main.c    **** 								}
+ 11736              		.loc 1 552 21 view .LVU3748
+ 11737 04d6 04E0     		b	.L616
+ 11738              	.LVL1053:
+ 11739              	.L656:
+ 538:Src/main.c    **** 							}
+ 11740              		.loc 1 538 20 view .LVU3749
+ 11741 04d8 4FF6FF74 		movw	r4, #65535
+ 11742              	.LVL1054:
+ 537:Src/main.c    **** 								pat_period = AD9102_PAT_PERIOD_DEFAULT;
+ 11743              		.loc 1 537 18 view .LVU3750
+ 11744 04dc 4FF00208 		mov	r8, #2
+ 11745              	.LVL1055:
+ 536:Src/main.c    **** 								pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
+ 11746              		.loc 1 536 18 view .LVU3751
+ 11747 04e0 0127     		movs	r7, #1
+ 11748              	.LVL1056:
+ 11749              	.L616:
+ 556:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 11750              		.loc 1 556 8 is_stmt 1 view .LVU3752
+ 556:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 11751              		.loc 1 556 30 is_stmt 0 view .LVU3753
+ 11752 04e2 0094     		str	r4, [sp]
+ 11753 04e4 4346     		mov	r3, r8
+ 11754              	.LVL1057:
+ 556:Src/main.c    **** 							State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
+ 11755              		.loc 1 556 30 view .LVU3754
+ 11756 04e6 3A46     		mov	r2, r7
+ 11757 04e8 3146     		mov	r1, r6
+ 11758 04ea 2846     		mov	r0, r5
+ 11759 04ec FFF7FEFF 		bl	AD9102_Apply
+ 11760              	.LVL1058:
+ 557:Src/main.c    **** 							if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
+ 11761              		.loc 1 557 8 is_stmt 1 view .LVU3755
+ 557:Src/main.c    **** 							if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
+ 11762              		.loc 1 557 22 is_stmt 0 view .LVU3756
+ 11763 04f0 3B4B     		ldr	r3, .L681+48
+ARM GAS  /tmp/ccEQxcUB.s 			page 620
+
+
+ 11764 04f2 5870     		strb	r0, [r3, #1]
+ 558:Src/main.c    **** 							{
+ 11765              		.loc 1 558 8 is_stmt 1 view .LVU3757
+ 558:Src/main.c    **** 							{
+ 11766              		.loc 1 558 12 is_stmt 0 view .LVU3758
+ 11767 04f4 0194     		str	r4, [sp, #4]
+ 11768 04f6 CDF80080 		str	r8, [sp]
+ 11769 04fa 3B46     		mov	r3, r7
+ 11770 04fc 2A46     		mov	r2, r5
+ 11771 04fe 3146     		mov	r1, r6
+ 11772 0500 FFF7FEFF 		bl	AD9102_CheckFlags
+ 11773              	.LVL1059:
+ 558:Src/main.c    **** 							{
+ 11774              		.loc 1 558 11 discriminator 1 view .LVU3759
+ 11775 0504 0028     		cmp	r0, #0
+ 11776 0506 A4D0     		beq	.L614
+ 560:Src/main.c    **** 							}
+ 11777              		.loc 1 560 9 is_stmt 1 view .LVU3760
+ 560:Src/main.c    **** 							}
+ 11778              		.loc 1 560 19 is_stmt 0 view .LVU3761
+ 11779 0508 354A     		ldr	r2, .L681+48
+ 11780 050a 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 560:Src/main.c    **** 							}
+ 11781              		.loc 1 560 23 view .LVU3762
+ 11782 050c 63F07F03 		orn	r3, r3, #127
+ 11783 0510 1370     		strb	r3, [r2]
+ 11784 0512 9EE7     		b	.L614
+ 11785              	.LVL1060:
+ 11786              	.L594:
+ 560:Src/main.c    **** 							}
+ 11787              		.loc 1 560 23 view .LVU3763
+ 11788              	.LBE705:
+ 11789              	.LBE703:
+ 572:Src/main.c    **** 					if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
+ 11790              		.loc 1 572 6 is_stmt 1 view .LVU3764
+ 572:Src/main.c    **** 					if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
+ 11791              		.loc 1 572 20 is_stmt 0 view .LVU3765
+ 11792 0514 324B     		ldr	r3, .L681+48
+ 11793 0516 0022     		movs	r2, #0
+ 11794 0518 5A70     		strb	r2, [r3, #1]
+ 573:Src/main.c    **** 					{
+ 11795              		.loc 1 573 6 is_stmt 1 view .LVU3766
+ 573:Src/main.c    **** 					{
+ 11796              		.loc 1 573 10 is_stmt 0 view .LVU3767
+ 11797 051a 324C     		ldr	r4, .L681+52
+ 11798 051c 0321     		movs	r1, #3
+ 11799 051e 2046     		mov	r0, r4
+ 11800 0520 FFF7FEFF 		bl	CalculateChecksum
+ 11801              	.LVL1061:
+ 573:Src/main.c    **** 					{
+ 11802              		.loc 1 573 69 discriminator 1 view .LVU3768
+ 11803 0524 E388     		ldrh	r3, [r4, #6]
+ 573:Src/main.c    **** 					{
+ 11804              		.loc 1 573 9 discriminator 1 view .LVU3769
+ 11805 0526 9842     		cmp	r0, r3
+ 11806 0528 0CD0     		beq	.L672
+ 586:Src/main.c    **** 					}
+ARM GAS  /tmp/ccEQxcUB.s 			page 621
+
+
+ 11807              		.loc 1 586 7 is_stmt 1 view .LVU3770
+ 586:Src/main.c    **** 					}
+ 11808              		.loc 1 586 17 is_stmt 0 view .LVU3771
+ 11809 052a 2D4A     		ldr	r2, .L681+48
+ 11810 052c 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 586:Src/main.c    **** 					}
+ 11811              		.loc 1 586 21 view .LVU3772
+ 11812 052e 43F00403 		orr	r3, r3, #4
+ 11813 0532 1370     		strb	r3, [r2]
+ 11814              	.L619:
+ 588:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11815              		.loc 1 588 6 is_stmt 1 view .LVU3773
+ 588:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11816              		.loc 1 588 32 is_stmt 0 view .LVU3774
+ 11817 0534 2C4B     		ldr	r3, .L681+56
+ 11818 0536 0122     		movs	r2, #1
+ 11819 0538 1A70     		strb	r2, [r3]
+ 589:Src/main.c    **** 				break;
+ 11820              		.loc 1 589 6 is_stmt 1 view .LVU3775
+ 589:Src/main.c    **** 				break;
+ 11821              		.loc 1 589 16 is_stmt 0 view .LVU3776
+ 11822 053a 274B     		ldr	r3, .L681+40
+ 11823 053c 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
+ 11824 053e 2B4B     		ldr	r3, .L681+60
+ 11825 0540 1A70     		strb	r2, [r3]
+ 590:Src/main.c    **** 				case DS1809_CMD://12 - Pulse DS1809 UC/DC controls
+ 11826              		.loc 1 590 5 is_stmt 1 view .LVU3777
+ 11827 0542 DCE5     		b	.L591
+ 11828              	.L672:
+ 11829              	.LBB706:
+ 575:Src/main.c    **** 						uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
+ 11830              		.loc 1 575 7 view .LVU3778
+ 575:Src/main.c    **** 						uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
+ 11831              		.loc 1 575 16 is_stmt 0 view .LVU3779
+ 11832 0544 2088     		ldrh	r0, [r4]
+ 11833              	.LVL1062:
+ 576:Src/main.c    **** 						uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
+ 11834              		.loc 1 576 7 is_stmt 1 view .LVU3780
+ 576:Src/main.c    **** 						uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
+ 11835              		.loc 1 576 40 is_stmt 0 view .LVU3781
+ 11836 0546 6388     		ldrh	r3, [r4, #2]
+ 576:Src/main.c    **** 						uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
+ 11837              		.loc 1 576 16 view .LVU3782
+ 11838 0548 C3F30D03 		ubfx	r3, r3, #0, #14
+ 11839              	.LVL1063:
+ 577:Src/main.c    **** 						uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
+ 11840              		.loc 1 577 7 is_stmt 1 view .LVU3783
+ 577:Src/main.c    **** 						uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
+ 11841              		.loc 1 577 40 is_stmt 0 view .LVU3784
+ 11842 054c A288     		ldrh	r2, [r4, #4]
+ 577:Src/main.c    **** 						uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
+ 11843              		.loc 1 577 16 view .LVU3785
+ 11844 054e C2F30D02 		ubfx	r2, r2, #0, #14
+ 11845              	.LVL1064:
+ 578:Src/main.c    **** 						uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u;
+ 11846              		.loc 1 578 7 is_stmt 1 view .LVU3786
+ 579:Src/main.c    **** 						uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
+ARM GAS  /tmp/ccEQxcUB.s 			page 622
+
+
+ 11847              		.loc 1 579 7 view .LVU3787
+ 580:Src/main.c    **** 
+ 11848              		.loc 1 580 7 view .LVU3788
+ 582:Src/main.c    **** 					}
+ 11849              		.loc 1 582 7 view .LVU3789
+ 11850 0552 43EA8232 		orr	r2, r3, r2, lsl #14
+ 11851              	.LVL1065:
+ 582:Src/main.c    **** 					}
+ 11852              		.loc 1 582 7 is_stmt 0 view .LVU3790
+ 11853 0556 C0F34001 		ubfx	r1, r0, #1, #1
+ 11854 055a 00F00100 		and	r0, r0, #1
+ 11855              	.LVL1066:
+ 582:Src/main.c    **** 					}
+ 11856              		.loc 1 582 7 view .LVU3791
+ 11857 055e FFF7FEFF 		bl	AD9833_Apply
+ 11858              	.LVL1067:
+ 582:Src/main.c    **** 					}
+ 11859              		.loc 1 582 7 view .LVU3792
+ 11860              	.LBE706:
+ 11861 0562 E7E7     		b	.L619
+ 11862              	.LVL1068:
+ 11863              	.L592:
+ 592:Src/main.c    **** 					{
+ 11864              		.loc 1 592 6 is_stmt 1 view .LVU3793
+ 592:Src/main.c    **** 					{
+ 11865              		.loc 1 592 10 is_stmt 0 view .LVU3794
+ 11866 0564 1F4C     		ldr	r4, .L681+52
+ 11867 0566 0321     		movs	r1, #3
+ 11868 0568 2046     		mov	r0, r4
+ 11869 056a FFF7FEFF 		bl	CalculateChecksum
+ 11870              	.LVL1069:
+ 592:Src/main.c    **** 					{
+ 11871              		.loc 1 592 69 discriminator 1 view .LVU3795
+ 11872 056e E388     		ldrh	r3, [r4, #6]
+ 592:Src/main.c    **** 					{
+ 11873              		.loc 1 592 9 discriminator 1 view .LVU3796
+ 11874 0570 9842     		cmp	r0, r3
+ 11875 0572 0CD0     		beq	.L673
+ 627:Src/main.c    **** 					}
+ 11876              		.loc 1 627 7 is_stmt 1 view .LVU3797
+ 627:Src/main.c    **** 					}
+ 11877              		.loc 1 627 17 is_stmt 0 view .LVU3798
+ 11878 0574 1A4A     		ldr	r2, .L681+48
+ 11879 0576 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 627:Src/main.c    **** 					}
+ 11880              		.loc 1 627 21 view .LVU3799
+ 11881 0578 43F00403 		orr	r3, r3, #4
+ 11882 057c 1370     		strb	r3, [r2]
+ 11883              	.L622:
+ 629:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11884              		.loc 1 629 6 is_stmt 1 view .LVU3800
+ 629:Src/main.c    **** 					CPU_state = CPU_state_old;
+ 11885              		.loc 1 629 32 is_stmt 0 view .LVU3801
+ 11886 057e 1A4B     		ldr	r3, .L681+56
+ 11887 0580 0122     		movs	r2, #1
+ 11888 0582 1A70     		strb	r2, [r3]
+ 630:Src/main.c    **** 				break;
+ARM GAS  /tmp/ccEQxcUB.s 			page 623
+
+
+ 11889              		.loc 1 630 6 is_stmt 1 view .LVU3802
+ 630:Src/main.c    **** 				break;
+ 11890              		.loc 1 630 16 is_stmt 0 view .LVU3803
+ 11891 0584 144B     		ldr	r3, .L681+40
+ 11892 0586 1A78     		ldrb	r2, [r3]	@ zero_extendqisi2
+ 11893 0588 184B     		ldr	r3, .L681+60
+ 11894 058a 1A70     		strb	r2, [r3]
+ 631:Src/main.c    **** 				case DECODE_TASK:
+ 11895              		.loc 1 631 5 is_stmt 1 view .LVU3804
+ 11896 058c B7E5     		b	.L591
+ 11897              	.L673:
+ 11898              	.LBB707:
+ 594:Src/main.c    **** 						uint16_t count = COMMAND[1];
+ 11899              		.loc 1 594 7 view .LVU3805
+ 594:Src/main.c    **** 						uint16_t count = COMMAND[1];
+ 11900              		.loc 1 594 16 is_stmt 0 view .LVU3806
+ 11901 058e 2346     		mov	r3, r4
+ 11902 0590 2488     		ldrh	r4, [r4]
+ 11903              	.LVL1070:
+ 595:Src/main.c    **** 						uint16_t pulse_ms = COMMAND[2];
+ 11904              		.loc 1 595 7 is_stmt 1 view .LVU3807
+ 595:Src/main.c    **** 						uint16_t pulse_ms = COMMAND[2];
+ 11905              		.loc 1 595 16 is_stmt 0 view .LVU3808
+ 11906 0592 5A88     		ldrh	r2, [r3, #2]
+ 11907              	.LVL1071:
+ 596:Src/main.c    **** 						uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
+ 11908              		.loc 1 596 7 is_stmt 1 view .LVU3809
+ 596:Src/main.c    **** 						uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
+ 11909              		.loc 1 596 16 is_stmt 0 view .LVU3810
+ 11910 0594 9B88     		ldrh	r3, [r3, #4]
+ 11911              	.LVL1072:
+ 597:Src/main.c    **** 						uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u;
+ 11912              		.loc 1 597 7 is_stmt 1 view .LVU3811
+ 598:Src/main.c    **** 
+ 11913              		.loc 1 598 7 view .LVU3812
+ 598:Src/main.c    **** 
+ 11914              		.loc 1 598 15 is_stmt 0 view .LVU3813
+ 11915 0596 C4F34001 		ubfx	r1, r4, #1, #1
+ 11916              	.LVL1073:
+ 600:Src/main.c    **** 						{
+ 11917              		.loc 1 600 7 is_stmt 1 view .LVU3814
+ 600:Src/main.c    **** 						{
+ 11918              		.loc 1 600 11 is_stmt 0 view .LVU3815
+ 11919 059a 04F00100 		and	r0, r4, #1
+ 600:Src/main.c    **** 						{
+ 11920              		.loc 1 600 10 view .LVU3816
+ 11921 059e 0C42     		tst	r4, r1
+ 11922 05a0 2AD0     		beq	.L621
+ 602:Src/main.c    **** 						}
+ 11923              		.loc 1 602 8 is_stmt 1 view .LVU3817
+ 602:Src/main.c    **** 						}
+ 11924              		.loc 1 602 18 is_stmt 0 view .LVU3818
+ 11925 05a2 0F4A     		ldr	r2, .L681+48
+ 11926              	.LVL1074:
+ 602:Src/main.c    **** 						}
+ 11927              		.loc 1 602 18 view .LVU3819
+ 11928 05a4 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ARM GAS  /tmp/ccEQxcUB.s 			page 624
+
+
+ 11929              	.LVL1075:
+ 602:Src/main.c    **** 						}
+ 11930              		.loc 1 602 22 view .LVU3820
+ 11931 05a6 43F00403 		orr	r3, r3, #4
+ 11932 05aa 1370     		strb	r3, [r2]
+ 11933 05ac E7E7     		b	.L622
+ 11934              	.L682:
+ 11935 05ae 00BF     		.align	2
+ 11936              	.L681:
+ 11937 05b0 00000000 		.word	task
+ 11938 05b4 00000000 		.word	TO7
+ 11939 05b8 00000000 		.word	TO7_before
+ 11940 05bc 00000000 		.word	LD1_param
+ 11941 05c0 00000000 		.word	LD2_param
+ 11942 05c4 00000000 		.word	temp16
+ 11943 05c8 00000000 		.word	Long_Data
+ 11944 05cc 00000000 		.word	TO6
+ 11945 05d0 00000000 		.word	TO6_stop
+ 11946 05d4 00000000 		.word	Curr_setup
+ 11947 05d8 00000000 		.word	CPU_state_old
+ 11948 05dc 00000000 		.word	CS_result
+ 11949 05e0 00000000 		.word	State_Data
+ 11950 05e4 00000000 		.word	COMMAND
+ 11951 05e8 00000000 		.word	UART_transmission_request
+ 11952 05ec 00000000 		.word	CPU_state
+ 11953 05f0 00000000 		.word	LD1_curr_setup
+ 11954 05f4 00000000 		.word	LD2_curr_setup
+ 11955              	.LVL1076:
+ 11956              	.L621:
+ 606:Src/main.c    **** 							{
+ 11957              		.loc 1 606 8 is_stmt 1 view .LVU3821
+ 606:Src/main.c    **** 							{
+ 11958              		.loc 1 606 11 is_stmt 0 view .LVU3822
+ 11959 05f8 1AB1     		cbz	r2, .L660
+ 610:Src/main.c    **** 							{
+ 11960              		.loc 1 610 8 is_stmt 1 view .LVU3823
+ 610:Src/main.c    **** 							{
+ 11961              		.loc 1 610 11 is_stmt 0 view .LVU3824
+ 11962 05fa 402A     		cmp	r2, #64
+ 11963 05fc 02D9     		bls	.L623
+ 612:Src/main.c    **** 							}
+ 11964              		.loc 1 612 15 view .LVU3825
+ 11965 05fe 4022     		movs	r2, #64
+ 11966              	.LVL1077:
+ 612:Src/main.c    **** 							}
+ 11967              		.loc 1 612 15 view .LVU3826
+ 11968 0600 00E0     		b	.L623
+ 11969              	.LVL1078:
+ 11970              	.L660:
+ 608:Src/main.c    **** 							}
+ 11971              		.loc 1 608 15 view .LVU3827
+ 11972 0602 0122     		movs	r2, #1
+ 11973              	.LVL1079:
+ 11974              	.L623:
+ 614:Src/main.c    **** 							{
+ 11975              		.loc 1 614 8 is_stmt 1 view .LVU3828
+ 614:Src/main.c    **** 							{
+ARM GAS  /tmp/ccEQxcUB.s 			page 625
+
+
+ 11976              		.loc 1 614 11 is_stmt 0 view .LVU3829
+ 11977 0604 2BB1     		cbz	r3, .L662
+ 618:Src/main.c    **** 							{
+ 11978              		.loc 1 618 8 is_stmt 1 view .LVU3830
+ 618:Src/main.c    **** 							{
+ 11979              		.loc 1 618 11 is_stmt 0 view .LVU3831
+ 11980 0606 B3F5FA7F 		cmp	r3, #500
+ 11981 060a 03D9     		bls	.L624
+ 620:Src/main.c    **** 							}
+ 11982              		.loc 1 620 18 view .LVU3832
+ 11983 060c 4FF4FA73 		mov	r3, #500
+ 11984              	.LVL1080:
+ 620:Src/main.c    **** 							}
+ 11985              		.loc 1 620 18 view .LVU3833
+ 11986 0610 00E0     		b	.L624
+ 11987              	.LVL1081:
+ 11988              	.L662:
+ 616:Src/main.c    **** 							}
+ 11989              		.loc 1 616 18 view .LVU3834
+ 11990 0612 0223     		movs	r3, #2
+ 11991              	.LVL1082:
+ 11992              	.L624:
+ 622:Src/main.c    **** 						}
+ 11993              		.loc 1 622 8 is_stmt 1 view .LVU3835
+ 11994 0614 FFF7FEFF 		bl	DS1809_Pulse
+ 11995              	.LVL1083:
+ 622:Src/main.c    **** 						}
+ 11996              		.loc 1 622 8 is_stmt 0 view .LVU3836
+ 11997 0618 B1E7     		b	.L622
+ 11998              	.LVL1084:
+ 11999              	.L597:
+ 622:Src/main.c    **** 						}
+ 12000              		.loc 1 622 8 view .LVU3837
+ 12001              	.LBE707:
+ 633:Src/main.c    **** 					{
+ 12002              		.loc 1 633 6 is_stmt 1 view .LVU3838
+ 633:Src/main.c    **** 					{
+ 12003              		.loc 1 633 10 is_stmt 0 view .LVU3839
+ 12004 061a 9848     		ldr	r0, .L683
+ 12005 061c FFF7FEFF 		bl	CheckChecksum
+ 12006              	.LVL1085:
+ 633:Src/main.c    **** 					{
+ 12007              		.loc 1 633 9 discriminator 1 view .LVU3840
+ 12008 0620 70B9     		cbnz	r0, .L674
+ 642:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ 12009              		.loc 1 642 7 is_stmt 1 view .LVU3841
+ 642:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ 12010              		.loc 1 642 17 is_stmt 0 view .LVU3842
+ 12011 0622 974A     		ldr	r2, .L683+4
+ 12012 0624 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 642:Src/main.c    **** 						CPU_state = DEFAULT_ENABLE;
+ 12013              		.loc 1 642 21 view .LVU3843
+ 12014 0626 43F00403 		orr	r3, r3, #4
+ 12015 062a 1370     		strb	r3, [r2]
+ 643:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
+ 12016              		.loc 1 643 7 is_stmt 1 view .LVU3844
+ 643:Src/main.c    **** 						CPU_state_old = HALT;//Save main current cycle
+ARM GAS  /tmp/ccEQxcUB.s 			page 626
+
+
+ 12017              		.loc 1 643 17 is_stmt 0 view .LVU3845
+ 12018 062c 954B     		ldr	r3, .L683+8
+ 12019 062e 0222     		movs	r2, #2
+ 12020 0630 1A70     		strb	r2, [r3]
+ 644:Src/main.c    **** 					}
+ 12021              		.loc 1 644 7 is_stmt 1 view .LVU3846
+ 644:Src/main.c    **** 					}
+ 12022              		.loc 1 644 21 is_stmt 0 view .LVU3847
+ 12023 0632 954B     		ldr	r3, .L683+12
+ 12024 0634 0022     		movs	r2, #0
+ 12025 0636 1A70     		strb	r2, [r3]
+ 12026              	.L626:
+ 646:Src/main.c    **** 				break;
+ 12027              		.loc 1 646 6 is_stmt 1 view .LVU3848
+ 646:Src/main.c    **** 				break;
+ 12028              		.loc 1 646 32 is_stmt 0 view .LVU3849
+ 12029 0638 944B     		ldr	r3, .L683+16
+ 12030 063a 0122     		movs	r2, #1
+ 12031 063c 1A70     		strb	r2, [r3]
+ 647:Src/main.c    **** 				case RUN_TASK:
+ 12032              		.loc 1 647 5 is_stmt 1 view .LVU3850
+ 12033 063e 5EE5     		b	.L591
+ 12034              	.L674:
+ 635:Src/main.c    **** 						TO6_before = TO6;
+ 12035              		.loc 1 635 7 view .LVU3851
+ 12036 0640 934B     		ldr	r3, .L683+20
+ 12037 0642 944A     		ldr	r2, .L683+24
+ 12038 0644 9449     		ldr	r1, .L683+28
+ 12039 0646 8D48     		ldr	r0, .L683
+ 12040 0648 FFF7FEFF 		bl	Decode_task
+ 12041              	.LVL1086:
+ 636:Src/main.c    **** 						CPU_state = RUN_TASK;
+ 12042              		.loc 1 636 7 view .LVU3852
+ 636:Src/main.c    **** 						CPU_state = RUN_TASK;
+ 12043              		.loc 1 636 18 is_stmt 0 view .LVU3853
+ 12044 064c 934B     		ldr	r3, .L683+32
+ 12045 064e 1A68     		ldr	r2, [r3]
+ 12046 0650 934B     		ldr	r3, .L683+36
+ 12047 0652 1A60     		str	r2, [r3]
+ 637:Src/main.c    **** 						CPU_state_old = RUN_TASK;//Save main current cycle
+ 12048              		.loc 1 637 7 is_stmt 1 view .LVU3854
+ 637:Src/main.c    **** 						CPU_state_old = RUN_TASK;//Save main current cycle
+ 12049              		.loc 1 637 17 is_stmt 0 view .LVU3855
+ 12050 0654 0923     		movs	r3, #9
+ 12051 0656 8B4A     		ldr	r2, .L683+8
+ 12052 0658 1370     		strb	r3, [r2]
+ 638:Src/main.c    **** 					}
+ 12053              		.loc 1 638 7 is_stmt 1 view .LVU3856
+ 638:Src/main.c    **** 					}
+ 12054              		.loc 1 638 21 is_stmt 0 view .LVU3857
+ 12055 065a 8B4A     		ldr	r2, .L683+12
+ 12056 065c 1370     		strb	r3, [r2]
+ 12057 065e EBE7     		b	.L626
+ 12058              	.L596:
+ 649:Src/main.c    **** 					{
+ 12059              		.loc 1 649 6 is_stmt 1 view .LVU3858
+ 649:Src/main.c    **** 					{
+ARM GAS  /tmp/ccEQxcUB.s 			page 627
+
+
+ 12060              		.loc 1 649 18 is_stmt 0 view .LVU3859
+ 12061 0660 904B     		ldr	r3, .L683+40
+ 12062 0662 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ 12063 0664 012B     		cmp	r3, #1
+ 12064 0666 23D0     		beq	.L627
+ 12065 0668 022B     		cmp	r3, #2
+ 12066 066a 00F03F81 		beq	.L628
+ 12067              	.L629:
+ 904:Src/main.c    **** 					{
+ 12068              		.loc 1 904 6 is_stmt 1 view .LVU3860
+ 904:Src/main.c    **** 					{
+ 12069              		.loc 1 904 13 is_stmt 0 view .LVU3861
+ 12070 066e 8E4B     		ldr	r3, .L683+44
+ 12071 0670 1B68     		ldr	r3, [r3]
+ 12072 0672 8E4A     		ldr	r2, .L683+48
+ 12073 0674 1268     		ldr	r2, [r2]
+ 904:Src/main.c    **** 					{
+ 12074              		.loc 1 904 9 view .LVU3862
+ 12075 0676 9342     		cmp	r3, r2
+ 12076 0678 00F2E681 		bhi	.L675
+ 12077              	.L646:
+ 956:Src/main.c    **** 					
+ 12078              		.loc 1 956 13 is_stmt 1 discriminator 1 view .LVU3863
+ 12079 067c 8C4B     		ldr	r3, .L683+52
+ 12080 067e 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ 12081 0680 002B     		cmp	r3, #0
+ 12082 0682 FBD0     		beq	.L646
+ 958:Src/main.c    **** 					
+ 12083              		.loc 1 958 6 view .LVU3864
+ 12084 0684 FFF7FEFF 		bl	Stop_TIM10
+ 12085              	.LVL1087:
+ 960:Src/main.c    **** 					{
+ 12086              		.loc 1 960 6 view .LVU3865
+ 960:Src/main.c    **** 					{
+ 12087              		.loc 1 960 14 is_stmt 0 view .LVU3866
+ 12088 0688 864B     		ldr	r3, .L683+40
+ 12089 068a DB8A     		ldrh	r3, [r3, #22]
+ 960:Src/main.c    **** 					{
+ 12090              		.loc 1 960 9 view .LVU3867
+ 12091 068c 032B     		cmp	r3, #3
+ 12092 068e 0BD9     		bls	.L647
+ 962:Src/main.c    **** 						TO10_counter = task.dt / 10;
+ 12093              		.loc 1 962 7 is_stmt 1 view .LVU3868
+ 962:Src/main.c    **** 						TO10_counter = task.dt / 10;
+ 12094              		.loc 1 962 26 is_stmt 0 view .LVU3869
+ 12095 0690 884B     		ldr	r3, .L683+56
+ 12096 0692 1A68     		ldr	r2, [r3]
+ 12097 0694 884B     		ldr	r3, .L683+60
+ 12098 0696 DA60     		str	r2, [r3, #12]
+ 963:Src/main.c    **** 					}
+ 12099              		.loc 1 963 7 is_stmt 1 view .LVU3870
+ 963:Src/main.c    **** 					}
+ 12100              		.loc 1 963 26 is_stmt 0 view .LVU3871
+ 12101 0698 824B     		ldr	r3, .L683+40
+ 12102 069a 1B7D     		ldrb	r3, [r3, #20]	@ zero_extendqisi2
+ 963:Src/main.c    **** 					}
+ 12103              		.loc 1 963 30 view .LVU3872
+ARM GAS  /tmp/ccEQxcUB.s 			page 628
+
+
+ 12104 069c 874A     		ldr	r2, .L683+64
+ 12105 069e A2FB0323 		umull	r2, r3, r2, r3
+ 12106 06a2 DB08     		lsrs	r3, r3, #3
+ 963:Src/main.c    **** 					}
+ 12107              		.loc 1 963 20 view .LVU3873
+ 12108 06a4 864A     		ldr	r2, .L683+68
+ 12109 06a6 1360     		str	r3, [r2]
+ 12110              	.L647:
+ 966:Src/main.c    ****         break;
+ 12111              		.loc 1 966 6 is_stmt 1 view .LVU3874
+ 966:Src/main.c    ****         break;
+ 12112              		.loc 1 966 20 is_stmt 0 view .LVU3875
+ 12113 06a8 774B     		ldr	r3, .L683+12
+ 12114 06aa 0922     		movs	r2, #9
+ 12115 06ac 1A70     		strb	r2, [r3]
+ 967:Src/main.c    **** 			}
+ 12116              		.loc 1 967 9 is_stmt 1 view .LVU3876
+ 12117 06ae 26E5     		b	.L591
+ 12118              	.L627:
+ 12119              	.LBB708:
+ 671:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 12120              		.loc 1 671 7 view .LVU3877
+ 671:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 12121              		.loc 1 671 38 is_stmt 0 view .LVU3878
+ 12122 06b0 7C4B     		ldr	r3, .L683+40
+ 12123 06b2 D3ED077A 		vldr.32	s15, [r3, #28]
+ 671:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 12124              		.loc 1 671 7 view .LVU3879
+ 12125 06b6 FCEEE77A 		vcvt.u32.f32	s15, s15
+ 12126 06ba 17EE903A 		vmov	r3, s15	@ int
+ 12127 06be 99B2     		uxth	r1, r3
+ 12128 06c0 0220     		movs	r0, #2
+ 12129 06c2 FFF7FEFF 		bl	Set_LTEC
+ 12130              	.LVL1088:
+ 672:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 12131              		.loc 1 672 7 is_stmt 1 view .LVU3880
+ 672:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 12132              		.loc 1 672 14 is_stmt 0 view .LVU3881
+ 12133 06c6 0320     		movs	r0, #3
+ 12134 06c8 FFF7FEFF 		bl	MPhD_T
+ 12135              	.LVL1089:
+ 673:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 12136              		.loc 1 673 7 is_stmt 1 view .LVU3882
+ 673:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 12137              		.loc 1 673 32 is_stmt 0 view .LVU3883
+ 12138 06cc 0320     		movs	r0, #3
+ 12139 06ce FFF7FEFF 		bl	MPhD_T
+ 12140              	.LVL1090:
+ 673:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 12141              		.loc 1 673 30 discriminator 1 view .LVU3884
+ 12142 06d2 7C4C     		ldr	r4, .L683+72
+ 12143 06d4 2080     		strh	r0, [r4]	@ movhi
+ 674:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 12144              		.loc 1 674 7 is_stmt 1 view .LVU3885
+ 674:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 12145              		.loc 1 674 14 is_stmt 0 view .LVU3886
+ 12146 06d6 0420     		movs	r0, #4
+ARM GAS  /tmp/ccEQxcUB.s 			page 629
+
+
+ 12147 06d8 FFF7FEFF 		bl	MPhD_T
+ 12148              	.LVL1091:
+ 675:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 12149              		.loc 1 675 7 is_stmt 1 view .LVU3887
+ 675:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 12150              		.loc 1 675 32 is_stmt 0 view .LVU3888
+ 12151 06dc 0420     		movs	r0, #4
+ 12152 06de FFF7FEFF 		bl	MPhD_T
+ 12153              	.LVL1092:
+ 675:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 12154              		.loc 1 675 30 discriminator 1 view .LVU3889
+ 12155 06e2 794D     		ldr	r5, .L683+76
+ 12156 06e4 2880     		strh	r0, [r5]	@ movhi
+ 676:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 12157              		.loc 1 676 7 is_stmt 1 view .LVU3890
+ 676:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 12158              		.loc 1 676 14 is_stmt 0 view .LVU3891
+ 12159 06e6 0122     		movs	r2, #1
+ 12160 06e8 2146     		mov	r1, r4
+ 12161 06ea 6B48     		ldr	r0, .L683+28
+ 12162 06ec FFF7FEFF 		bl	PID_Controller_Temp
+ 12163              	.LVL1093:
+ 12164 06f0 0146     		mov	r1, r0
+ 676:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 12165              		.loc 1 676 13 discriminator 1 view .LVU3892
+ 12166 06f2 764C     		ldr	r4, .L683+80
+ 12167 06f4 2080     		strh	r0, [r4]	@ movhi
+ 677:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 12168              		.loc 1 677 7 is_stmt 1 view .LVU3893
+ 12169 06f6 0320     		movs	r0, #3
+ 12170 06f8 FFF7FEFF 		bl	Set_LTEC
+ 12171              	.LVL1094:
+ 678:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 12172              		.loc 1 678 7 view .LVU3894
+ 678:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 12173              		.loc 1 678 14 is_stmt 0 view .LVU3895
+ 12174 06fc 0222     		movs	r2, #2
+ 12175 06fe 2946     		mov	r1, r5
+ 12176 0700 6448     		ldr	r0, .L683+24
+ 12177 0702 FFF7FEFF 		bl	PID_Controller_Temp
+ 12178              	.LVL1095:
+ 12179 0706 0146     		mov	r1, r0
+ 678:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 12180              		.loc 1 678 13 discriminator 1 view .LVU3896
+ 12181 0708 2080     		strh	r0, [r4]	@ movhi
+ 679:Src/main.c    **** 
+ 12182              		.loc 1 679 7 is_stmt 1 view .LVU3897
+ 12183 070a 0420     		movs	r0, #4
+ 12184 070c FFF7FEFF 		bl	Set_LTEC
+ 12185              	.LVL1096:
+ 682:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12186              		.loc 1 682 7 view .LVU3898
+ 12187 0710 6F4C     		ldr	r4, .L683+84
+ 12188 0712 0122     		movs	r2, #1
+ 12189 0714 8021     		movs	r1, #128
+ 12190 0716 2046     		mov	r0, r4
+ 12191 0718 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ARM GAS  /tmp/ccEQxcUB.s 			page 630
+
+
+ 12192              	.LVL1097:
+ 683:Src/main.c    **** 		
+ 12193              		.loc 1 683 7 view .LVU3899
+ 12194 071c 0022     		movs	r2, #0
+ 12195 071e 8021     		movs	r1, #128
+ 12196 0720 2046     		mov	r0, r4
+ 12197 0722 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 12198              	.LVL1098:
+ 685:Src/main.c    **** 						if (st != HAL_OK)
+ 12199              		.loc 1 685 7 view .LVU3900
+ 685:Src/main.c    **** 						if (st != HAL_OK)
+ 12200              		.loc 1 685 12 is_stmt 0 view .LVU3901
+ 12201 0726 6448     		ldr	r0, .L683+60
+ 12202 0728 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
+ 12203              	.LVL1099:
+ 686:Src/main.c    **** 							while(1);
+ 12204              		.loc 1 686 7 is_stmt 1 view .LVU3902
+ 686:Src/main.c    **** 							while(1);
+ 12205              		.loc 1 686 10 is_stmt 0 view .LVU3903
+ 12206 072c 0028     		cmp	r0, #0
+ 12207 072e 75D1     		bne	.L631
+ 689:Src/main.c    **** 						uint16_t trigger_counter = 0;
+ 12208              		.loc 1 689 7 is_stmt 1 view .LVU3904
+ 12209              	.LVL1100:
+ 690:Src/main.c    **** 						uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
+ 12210              		.loc 1 690 7 view .LVU3905
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12211              		.loc 1 691 7 view .LVU3906
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12212              		.loc 1 691 47 is_stmt 0 view .LVU3907
+ 12213 0730 5C4B     		ldr	r3, .L683+40
+ 12214 0732 93ED027A 		vldr.32	s14, [r3, #8]
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12215              		.loc 1 691 64 view .LVU3908
+ 12216 0736 D3ED047A 		vldr.32	s15, [r3, #16]
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12217              		.loc 1 691 58 view .LVU3909
+ 12218 073a 37EE677A 		vsub.f32	s14, s14, s15
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12219              		.loc 1 691 84 view .LVU3910
+ 12220 073e D3ED036A 		vldr.32	s13, [r3, #12]
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12221              		.loc 1 691 79 view .LVU3911
+ 12222 0742 C7EE267A 		vdiv.f32	s15, s14, s13
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12223              		.loc 1 691 97 view .LVU3912
+ 12224 0746 B2EE047A 		vmov.f32	s14, #1.0e+1
+ 12225 074a 67EE877A 		vmul.f32	s15, s15, s14
+ 691:Src/main.c    **** 						uint16_t task_sheduler = 0;
+ 12226              		.loc 1 691 31 view .LVU3913
+ 12227 074e FCEEE77A 		vcvt.u32.f32	s15, s15
+ 12228 0752 CDED037A 		vstr.32	s15, [sp, #12]	@ int
+ 12229 0756 9DF80C60 		ldrb	r6, [sp, #12]	@ zero_extendqisi2
+ 12230              	.LVL1101:
+ 692:Src/main.c    **** 
+ 12231              		.loc 1 692 7 is_stmt 1 view .LVU3914
+ 696:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
+ARM GAS  /tmp/ccEQxcUB.s 			page 631
+
+
+ 12232              		.loc 1 696 7 view .LVU3915
+ 12233 075a DFF88491 		ldr	r9, .L683+100
+ 12234 075e 0021     		movs	r1, #0
+ 12235 0760 4846     		mov	r0, r9
+ 12236              	.LVL1102:
+ 696:Src/main.c    **** 						HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
+ 12237              		.loc 1 696 7 is_stmt 0 view .LVU3916
+ 12238 0762 FFF7FEFF 		bl	HAL_TIM_PWM_Stop
+ 12239              	.LVL1103:
+ 697:Src/main.c    **** 						TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode
+ 12240              		.loc 1 697 7 is_stmt 1 view .LVU3917
+ 12241 0766 DFF87C81 		ldr	r8, .L683+104
+ 12242 076a 0821     		movs	r1, #8
+ 12243 076c 4046     		mov	r0, r8
+ 12244 076e FFF7FEFF 		bl	HAL_TIM_PWM_Stop
+ 12245              	.LVL1104:
+ 698:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
+ 12246              		.loc 1 698 7 view .LVU3918
+ 698:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
+ 12247              		.loc 1 698 13 is_stmt 0 view .LVU3919
+ 12248 0772 584F     		ldr	r7, .L683+88
+ 12249 0774 3B68     		ldr	r3, [r7]
+ 698:Src/main.c    **** 						TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
+ 12250              		.loc 1 698 20 view .LVU3920
+ 12251 0776 23F00803 		bic	r3, r3, #8
+ 12252 077a 3B60     		str	r3, [r7]
+ 699:Src/main.c    **** 
+ 12253              		.loc 1 699 7 is_stmt 1 view .LVU3921
+ 699:Src/main.c    **** 
+ 12254              		.loc 1 699 12 is_stmt 0 view .LVU3922
+ 12255 077c 564D     		ldr	r5, .L683+92
+ 12256 077e 2B68     		ldr	r3, [r5]
+ 699:Src/main.c    **** 
+ 12257              		.loc 1 699 19 view .LVU3923
+ 12258 0780 23F00803 		bic	r3, r3, #8
+ 12259 0784 2B60     		str	r3, [r5]
+ 703:Src/main.c    **** 						TIM4 -> CNT = 0;
+ 12260              		.loc 1 703 7 is_stmt 1 view .LVU3924
+ 703:Src/main.c    **** 						TIM4 -> CNT = 0;
+ 12261              		.loc 1 703 20 is_stmt 0 view .LVU3925
+ 12262 0786 0024     		movs	r4, #0
+ 12263 0788 7C62     		str	r4, [r7, #36]
+ 704:Src/main.c    **** 
+ 12264              		.loc 1 704 7 is_stmt 1 view .LVU3926
+ 704:Src/main.c    **** 
+ 12265              		.loc 1 704 19 is_stmt 0 view .LVU3927
+ 12266 078a 6C62     		str	r4, [r5, #36]
+ 706:Src/main.c    **** 						HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock
+ 12267              		.loc 1 706 7 is_stmt 1 view .LVU3928
+ 12268 078c 2146     		mov	r1, r4
+ 12269 078e 4846     		mov	r0, r9
+ 12270 0790 FFF7FEFF 		bl	HAL_TIM_PWM_Start
+ 12271              	.LVL1105:
+ 707:Src/main.c    **** 						//TIM4 -> CNT = 0;
+ 12272              		.loc 1 707 7 view .LVU3929
+ 12273 0794 0821     		movs	r1, #8
+ 12274 0796 4046     		mov	r0, r8
+ARM GAS  /tmp/ccEQxcUB.s 			page 632
+
+
+ 12275 0798 FFF7FEFF 		bl	HAL_TIM_PWM_Start
+ 12276              	.LVL1106:
+ 710:Src/main.c    **** 						TIM11 -> CNT = 0;
+ 12277              		.loc 1 710 7 view .LVU3930
+ 710:Src/main.c    **** 						TIM11 -> CNT = 0;
+ 12278              		.loc 1 710 26 is_stmt 0 view .LVU3931
+ 12279 079c EB6A     		ldr	r3, [r5, #44]
+ 710:Src/main.c    **** 						TIM11 -> CNT = 0;
+ 12280              		.loc 1 710 33 view .LVU3932
+ 12281 079e 143B     		subs	r3, r3, #20
+ 710:Src/main.c    **** 						TIM11 -> CNT = 0;
+ 12282              		.loc 1 710 19 view .LVU3933
+ 12283 07a0 6B62     		str	r3, [r5, #36]
+ 711:Src/main.c    **** 
+ 12284              		.loc 1 711 7 is_stmt 1 view .LVU3934
+ 711:Src/main.c    **** 
+ 12285              		.loc 1 711 20 is_stmt 0 view .LVU3935
+ 12286 07a2 7C62     		str	r4, [r7, #36]
+ 714:Src/main.c    **** 						{
+ 12287              		.loc 1 714 7 is_stmt 1 view .LVU3936
+ 690:Src/main.c    **** 						uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
+ 12288              		.loc 1 690 16 is_stmt 0 view .LVU3937
+ 12289 07a4 2546     		mov	r5, r4
+ 12290              	.LVL1107:
+ 12291              	.L633:
+ 714:Src/main.c    **** 						{
+ 12292              		.loc 1 714 33 is_stmt 1 view .LVU3938
+ 714:Src/main.c    **** 						{
+ 12293              		.loc 1 714 18 is_stmt 0 view .LVU3939
+ 12294 07a6 3F4B     		ldr	r3, .L683+40
+ 12295 07a8 D3ED047A 		vldr.32	s15, [r3, #16]
+ 714:Src/main.c    **** 						{
+ 12296              		.loc 1 714 39 view .LVU3940
+ 12297 07ac 93ED027A 		vldr.32	s14, [r3, #8]
+ 714:Src/main.c    **** 						{
+ 12298              		.loc 1 714 33 view .LVU3941
+ 12299 07b0 F4EEC77A 		vcmpe.f32	s15, s14
+ 12300 07b4 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ 12301 07b8 37D5     		bpl	.L676
+ 716:Src/main.c    **** 							{
+ 12302              		.loc 1 716 8 is_stmt 1 view .LVU3942
+ 716:Src/main.c    **** 							{
+ 12303              		.loc 1 716 12 is_stmt 0 view .LVU3943
+ 12304 07ba 3D4B     		ldr	r3, .L683+52
+ 12305 07bc 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ 716:Src/main.c    **** 							{
+ 12306              		.loc 1 716 11 view .LVU3944
+ 12307 07be 002B     		cmp	r3, #0
+ 12308 07c0 F1D0     		beq	.L633
+ 718:Src/main.c    **** 								//TIM11 -> CNT = 0; // to link modulator phase
+ 12309              		.loc 1 718 9 is_stmt 1 view .LVU3945
+ 12310 07c2 FCEEE77A 		vcvt.u32.f32	s15, s15
+ 12311 07c6 17EE903A 		vmov	r3, s15	@ int
+ 12312 07ca 99B2     		uxth	r1, r3
+ 12313 07cc 0120     		movs	r0, #1
+ 12314 07ce FFF7FEFF 		bl	Set_LTEC
+ 12315              	.LVL1108:
+ARM GAS  /tmp/ccEQxcUB.s 			page 633
+
+
+ 721:Src/main.c    **** 								TO10 = 0;
+ 12316              		.loc 1 721 9 view .LVU3946
+ 721:Src/main.c    **** 								TO10 = 0;
+ 12317              		.loc 1 721 13 is_stmt 0 view .LVU3947
+ 12318 07d2 344B     		ldr	r3, .L683+40
+ 12319 07d4 D3ED047A 		vldr.32	s15, [r3, #16]
+ 721:Src/main.c    **** 								TO10 = 0;
+ 12320              		.loc 1 721 35 view .LVU3948
+ 12321 07d8 93ED037A 		vldr.32	s14, [r3, #12]
+ 721:Src/main.c    **** 								TO10 = 0;
+ 12322              		.loc 1 721 28 view .LVU3949
+ 12323 07dc 77EE877A 		vadd.f32	s15, s15, s14
+ 12324 07e0 C3ED047A 		vstr.32	s15, [r3, #16]
+ 722:Src/main.c    **** 								TIM10_coflag = 0;
+ 12325              		.loc 1 722 9 is_stmt 1 view .LVU3950
+ 722:Src/main.c    **** 								TIM10_coflag = 0;
+ 12326              		.loc 1 722 14 is_stmt 0 view .LVU3951
+ 12327 07e4 0027     		movs	r7, #0
+ 12328 07e6 3D4B     		ldr	r3, .L683+96
+ 12329 07e8 1F60     		str	r7, [r3]
+ 723:Src/main.c    **** 								
+ 12330              		.loc 1 723 9 is_stmt 1 view .LVU3952
+ 723:Src/main.c    **** 								
+ 12331              		.loc 1 723 22 is_stmt 0 view .LVU3953
+ 12332 07ea 314B     		ldr	r3, .L683+52
+ 12333 07ec 1F70     		strb	r7, [r3]
+ 725:Src/main.c    **** 								HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
+ 12334              		.loc 1 725 9 is_stmt 1 view .LVU3954
+ 12335 07ee DFF8F880 		ldr	r8, .L683+108
+ 12336 07f2 0122     		movs	r2, #1
+ 12337 07f4 4FF40071 		mov	r1, #512
+ 12338 07f8 4046     		mov	r0, r8
+ 12339 07fa FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 12340              	.LVL1109:
+ 726:Src/main.c    **** //*
+ 12341              		.loc 1 726 9 view .LVU3955
+ 12342 07fe 3A46     		mov	r2, r7
+ 12343 0800 4FF40071 		mov	r1, #512
+ 12344 0804 4046     		mov	r0, r8
+ 12345 0806 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 12346              	.LVL1110:
+ 728:Src/main.c    **** 									OUT_trigger(trigger_counter);
+ 12347              		.loc 1 728 9 view .LVU3956
+ 728:Src/main.c    **** 									OUT_trigger(trigger_counter);
+ 12348              		.loc 1 728 41 is_stmt 0 view .LVU3957
+ 12349 080a B4FBF6F3 		udiv	r3, r4, r6
+ 12350 080e 06FB1343 		mls	r3, r6, r3, r4
+ 12351 0812 9BB2     		uxth	r3, r3
+ 728:Src/main.c    **** 									OUT_trigger(trigger_counter);
+ 12352              		.loc 1 728 12 view .LVU3958
+ 12353 0814 1BB1     		cbz	r3, .L677
+ 12354              	.L634:
+ 732:Src/main.c    **** //*/
+ 12355              		.loc 1 732 9 is_stmt 1 view .LVU3959
+ 12356 0816 0134     		adds	r4, r4, #1
+ 12357              	.LVL1111:
+ 732:Src/main.c    **** //*/
+ARM GAS  /tmp/ccEQxcUB.s 			page 634
+
+
+ 12358              		.loc 1 732 9 is_stmt 0 view .LVU3960
+ 12359 0818 A4B2     		uxth	r4, r4
+ 12360              	.LVL1112:
+ 732:Src/main.c    **** //*/
+ 12361              		.loc 1 732 9 view .LVU3961
+ 12362 081a C4E7     		b	.L633
+ 12363              	.LVL1113:
+ 12364              	.L631:
+ 687:Src/main.c    **** 
+ 12365              		.loc 1 687 8 is_stmt 1 view .LVU3962
+ 687:Src/main.c    **** 
+ 12366              		.loc 1 687 13 view .LVU3963
+ 12367 081c FEE7     		b	.L631
+ 12368              	.LVL1114:
+ 12369              	.L677:
+ 729:Src/main.c    **** 									++trigger_counter;
+ 12370              		.loc 1 729 10 view .LVU3964
+ 12371 081e E8B2     		uxtb	r0, r5
+ 12372 0820 FFF7FEFF 		bl	OUT_trigger
+ 12373              	.LVL1115:
+ 730:Src/main.c    **** 								}
+ 12374              		.loc 1 730 10 view .LVU3965
+ 12375 0824 0135     		adds	r5, r5, #1
+ 12376              	.LVL1116:
+ 730:Src/main.c    **** 								}
+ 12377              		.loc 1 730 10 is_stmt 0 view .LVU3966
+ 12378 0826 ADB2     		uxth	r5, r5
+ 12379              	.LVL1117:
+ 730:Src/main.c    **** 								}
+ 12380              		.loc 1 730 10 view .LVU3967
+ 12381 0828 F5E7     		b	.L634
+ 12382              	.L676:
+ 757:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
+ 12383              		.loc 1 757 7 is_stmt 1 view .LVU3968
+ 757:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
+ 12384              		.loc 1 757 13 is_stmt 0 view .LVU3969
+ 12385 082a 2A4A     		ldr	r2, .L683+88
+ 12386 082c D368     		ldr	r3, [r2, #12]
+ 757:Src/main.c    **** 						//TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
+ 12387              		.loc 1 757 21 view .LVU3970
+ 12388 082e 43F00103 		orr	r3, r3, #1
+ 12389 0832 D360     		str	r3, [r2, #12]
+ 767:Src/main.c    **** 
+ 12390              		.loc 1 767 7 is_stmt 1 view .LVU3971
+ 12391 0834 FFF7FEFF 		bl	Stop_TIM10
+ 12392              	.LVL1118:
+ 769:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
+ 12393              		.loc 1 769 7 view .LVU3972
+ 769:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
+ 12394              		.loc 1 769 32 is_stmt 0 view .LVU3973
+ 12395 0838 1A4C     		ldr	r4, .L683+40
+ 12396              	.LVL1119:
+ 769:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
+ 12397              		.loc 1 769 32 view .LVU3974
+ 12398 083a D4ED017A 		vldr.32	s15, [r4, #4]
+ 769:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
+ 12399              		.loc 1 769 26 view .LVU3975
+ARM GAS  /tmp/ccEQxcUB.s 			page 635
+
+
+ 12400 083e C4ED047A 		vstr.32	s15, [r4, #16]
+ 770:Src/main.c    **** 						if (task.tau > 3)
+ 12401              		.loc 1 770 7 is_stmt 1 view .LVU3976
+ 12402 0842 FCEEE77A 		vcvt.u32.f32	s15, s15
+ 12403 0846 17EE903A 		vmov	r3, s15	@ int
+ 12404 084a 99B2     		uxth	r1, r3
+ 12405 084c 0120     		movs	r0, #1
+ 12406 084e FFF7FEFF 		bl	Set_LTEC
+ 12407              	.LVL1120:
+ 771:Src/main.c    **** 						{
+ 12408              		.loc 1 771 7 view .LVU3977
+ 771:Src/main.c    **** 						{
+ 12409              		.loc 1 771 15 is_stmt 0 view .LVU3978
+ 12410 0852 E38A     		ldrh	r3, [r4, #22]
+ 771:Src/main.c    **** 						{
+ 12411              		.loc 1 771 10 view .LVU3979
+ 12412 0854 032B     		cmp	r3, #3
+ 12413 0856 0CD9     		bls	.L636
+ 773:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 12414              		.loc 1 773 8 is_stmt 1 view .LVU3980
+ 773:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 12415              		.loc 1 773 34 is_stmt 0 view .LVU3981
+ 12416 0858 174A     		ldr	r2, .L683+60
+ 12417 085a D068     		ldr	r0, [r2, #12]
+ 773:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 12418              		.loc 1 773 21 view .LVU3982
+ 12419 085c 1549     		ldr	r1, .L683+56
+ 12420 085e 0860     		str	r0, [r1]
+ 774:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
+ 12421              		.loc 1 774 8 is_stmt 1 view .LVU3983
+ 774:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
+ 12422              		.loc 1 774 27 is_stmt 0 view .LVU3984
+ 12423 0860 42F20F71 		movw	r1, #9999
+ 12424 0864 D160     		str	r1, [r2, #12]
+ 775:Src/main.c    **** 						}
+ 12425              		.loc 1 775 8 is_stmt 1 view .LVU3985
+ 775:Src/main.c    **** 						}
+ 12426              		.loc 1 775 33 is_stmt 0 view .LVU3986
+ 12427 0866 013B     		subs	r3, r3, #1
+ 775:Src/main.c    **** 						}
+ 12428              		.loc 1 775 38 view .LVU3987
+ 12429 0868 6422     		movs	r2, #100
+ 12430 086a 02FB03F3 		mul	r3, r2, r3
+ 775:Src/main.c    **** 						}
+ 12431              		.loc 1 775 21 view .LVU3988
+ 12432 086e 144A     		ldr	r2, .L683+68
+ 12433 0870 1360     		str	r3, [r2]
+ 12434              	.L636:
+ 777:Src/main.c    **** 					break;
+ 12435              		.loc 1 777 7 is_stmt 1 view .LVU3989
+ 12436 0872 1148     		ldr	r0, .L683+60
+ 12437 0874 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
+ 12438              	.LVL1121:
+ 778:Src/main.c    **** 					case TT_CHANGE_CURR_2:
+ 12439              		.loc 1 778 6 view .LVU3990
+ 12440 0878 F9E6     		b	.L629
+ 12441              	.L684:
+ARM GAS  /tmp/ccEQxcUB.s 			page 636
+
+
+ 12442 087a 00BF     		.align	2
+ 12443              	.L683:
+ 12444 087c 00000000 		.word	COMMAND
+ 12445 0880 00000000 		.word	State_Data
+ 12446 0884 00000000 		.word	CPU_state
+ 12447 0888 00000000 		.word	CPU_state_old
+ 12448 088c 00000000 		.word	UART_transmission_request
+ 12449 0890 00000000 		.word	Curr_setup
+ 12450 0894 00000000 		.word	LD2_curr_setup
+ 12451 0898 00000000 		.word	LD1_curr_setup
+ 12452 089c 00000000 		.word	TO6
+ 12453 08a0 00000000 		.word	TO6_before
+ 12454 08a4 00000000 		.word	task
+ 12455 08a8 00000000 		.word	TO7
+ 12456 08ac 00000000 		.word	TO7_before
+ 12457 08b0 00000000 		.word	TIM10_coflag
+ 12458 08b4 00000000 		.word	TIM10_period
+ 12459 08b8 00000000 		.word	htim10
+ 12460 08bc CDCCCCCC 		.word	-858993459
+ 12461 08c0 00000000 		.word	TO10_counter
+ 12462 08c4 00000000 		.word	LD1_param
+ 12463 08c8 00000000 		.word	LD2_param
+ 12464 08cc 00000000 		.word	temp16
+ 12465 08d0 000C0240 		.word	1073875968
+ 12466 08d4 00480140 		.word	1073825792
+ 12467 08d8 00080040 		.word	1073743872
+ 12468 08dc 00000000 		.word	TO10
+ 12469 08e0 00000000 		.word	htim11
+ 12470 08e4 00000000 		.word	htim4
+ 12471 08e8 00180240 		.word	1073879040
+ 12472              	.LVL1122:
+ 12473              	.L628:
+ 782:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 12474              		.loc 1 782 7 view .LVU3991
+ 782:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 12475              		.loc 1 782 38 is_stmt 0 view .LVU3992
+ 12476 08ec A74B     		ldr	r3, .L685
+ 12477 08ee D3ED077A 		vldr.32	s15, [r3, #28]
+ 782:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_1);
+ 12478              		.loc 1 782 7 view .LVU3993
+ 12479 08f2 FCEEE77A 		vcvt.u32.f32	s15, s15
+ 12480 08f6 17EE903A 		vmov	r3, s15	@ int
+ 12481 08fa 99B2     		uxth	r1, r3
+ 12482 08fc 0120     		movs	r0, #1
+ 12483 08fe FFF7FEFF 		bl	Set_LTEC
+ 12484              	.LVL1123:
+ 783:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 12485              		.loc 1 783 7 is_stmt 1 view .LVU3994
+ 783:Src/main.c    **** 						LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
+ 12486              		.loc 1 783 14 is_stmt 0 view .LVU3995
+ 12487 0902 0320     		movs	r0, #3
+ 12488 0904 FFF7FEFF 		bl	MPhD_T
+ 12489              	.LVL1124:
+ 784:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 12490              		.loc 1 784 7 is_stmt 1 view .LVU3996
+ 784:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 12491              		.loc 1 784 32 is_stmt 0 view .LVU3997
+ARM GAS  /tmp/ccEQxcUB.s 			page 637
+
+
+ 12492 0908 0320     		movs	r0, #3
+ 12493 090a FFF7FEFF 		bl	MPhD_T
+ 12494              	.LVL1125:
+ 784:Src/main.c    **** 						(void) MPhD_T(TT_CHANGE_TEMP_2);
+ 12495              		.loc 1 784 30 discriminator 1 view .LVU3998
+ 12496 090e A04C     		ldr	r4, .L685+4
+ 12497 0910 2080     		strh	r0, [r4]	@ movhi
+ 785:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 12498              		.loc 1 785 7 is_stmt 1 view .LVU3999
+ 785:Src/main.c    **** 						LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
+ 12499              		.loc 1 785 14 is_stmt 0 view .LVU4000
+ 12500 0912 0420     		movs	r0, #4
+ 12501 0914 FFF7FEFF 		bl	MPhD_T
+ 12502              	.LVL1126:
+ 786:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 12503              		.loc 1 786 7 is_stmt 1 view .LVU4001
+ 786:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 12504              		.loc 1 786 32 is_stmt 0 view .LVU4002
+ 12505 0918 0420     		movs	r0, #4
+ 12506 091a FFF7FEFF 		bl	MPhD_T
+ 12507              	.LVL1127:
+ 786:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
+ 12508              		.loc 1 786 30 discriminator 1 view .LVU4003
+ 12509 091e 9D4D     		ldr	r5, .L685+8
+ 12510 0920 2880     		strh	r0, [r5]	@ movhi
+ 787:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 12511              		.loc 1 787 7 is_stmt 1 view .LVU4004
+ 787:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 12512              		.loc 1 787 14 is_stmt 0 view .LVU4005
+ 12513 0922 0122     		movs	r2, #1
+ 12514 0924 2146     		mov	r1, r4
+ 12515 0926 9C48     		ldr	r0, .L685+12
+ 12516 0928 FFF7FEFF 		bl	PID_Controller_Temp
+ 12517              	.LVL1128:
+ 12518 092c 0146     		mov	r1, r0
+ 787:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
+ 12519              		.loc 1 787 13 discriminator 1 view .LVU4006
+ 12520 092e 9B4C     		ldr	r4, .L685+16
+ 12521 0930 2080     		strh	r0, [r4]	@ movhi
+ 788:Src/main.c    **** 						temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
+ 12522              		.loc 1 788 7 is_stmt 1 view .LVU4007
+ 12523 0932 0320     		movs	r0, #3
+ 12524 0934 FFF7FEFF 		bl	Set_LTEC
+ 12525              	.LVL1129:
+ 789:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 12526              		.loc 1 789 7 view .LVU4008
+ 789:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 12527              		.loc 1 789 14 is_stmt 0 view .LVU4009
+ 12528 0938 0222     		movs	r2, #2
+ 12529 093a 2946     		mov	r1, r5
+ 12530 093c 9848     		ldr	r0, .L685+20
+ 12531 093e FFF7FEFF 		bl	PID_Controller_Temp
+ 12532              	.LVL1130:
+ 12533 0942 0146     		mov	r1, r0
+ 789:Src/main.c    **** 						Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
+ 12534              		.loc 1 789 13 discriminator 1 view .LVU4010
+ 12535 0944 2080     		strh	r0, [r4]	@ movhi
+ARM GAS  /tmp/ccEQxcUB.s 			page 638
+
+
+ 790:Src/main.c    **** 
+ 12536              		.loc 1 790 7 is_stmt 1 view .LVU4011
+ 12537 0946 0420     		movs	r0, #4
+ 12538 0948 FFF7FEFF 		bl	Set_LTEC
+ 12539              	.LVL1131:
+ 792:Src/main.c    **** 						LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
+ 12540              		.loc 1 792 7 view .LVU4012
+ 792:Src/main.c    **** 						LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
+ 12541              		.loc 1 792 28 is_stmt 0 view .LVU4013
+ 12542 094c 954B     		ldr	r3, .L685+24
+ 12543 094e 0222     		movs	r2, #2
+ 12544 0950 1A70     		strb	r2, [r3]
+ 793:Src/main.c    **** 						//LD_blinker.param = task.current_param;
+ 12545              		.loc 1 793 7 is_stmt 1 view .LVU4014
+ 793:Src/main.c    **** 						//LD_blinker.param = task.current_param;
+ 12546              		.loc 1 793 24 is_stmt 0 view .LVU4015
+ 12547 0952 0022     		movs	r2, #0
+ 12548 0954 9A72     		strb	r2, [r3, #10]
+ 795:Src/main.c    **** 						LD_blinker.param = 1000; // LD2 current (in unspecified units)
+ 12549              		.loc 1 795 7 is_stmt 1 view .LVU4016
+ 795:Src/main.c    **** 						LD_blinker.param = 1000; // LD2 current (in unspecified units)
+ 12550              		.loc 1 795 24 is_stmt 0 view .LVU4017
+ 12551 0956 1A81     		strh	r2, [r3, #8]	@ movhi
+ 796:Src/main.c    **** 						LD_blinker.signal_port = OUT_9_GPIO_Port;
+ 12552              		.loc 1 796 7 is_stmt 1 view .LVU4018
+ 796:Src/main.c    **** 						LD_blinker.signal_port = OUT_9_GPIO_Port;
+ 12553              		.loc 1 796 24 is_stmt 0 view .LVU4019
+ 12554 0958 4FF47A72 		mov	r2, #1000
+ 12555 095c 1A81     		strh	r2, [r3, #8]	@ movhi
+ 797:Src/main.c    **** 						LD_blinker.signal_pin = OUT_9_Pin;
+ 12556              		.loc 1 797 7 is_stmt 1 view .LVU4020
+ 797:Src/main.c    **** 						LD_blinker.signal_pin = OUT_9_Pin;
+ 12557              		.loc 1 797 30 is_stmt 0 view .LVU4021
+ 12558 095e 924A     		ldr	r2, .L685+28
+ 12559 0960 5A60     		str	r2, [r3, #4]
+ 798:Src/main.c    **** 
+ 12560              		.loc 1 798 7 is_stmt 1 view .LVU4022
+ 798:Src/main.c    **** 
+ 12561              		.loc 1 798 29 is_stmt 0 view .LVU4023
+ 12562 0962 8022     		movs	r2, #128
+ 12563 0964 5A80     		strh	r2, [r3, #2]	@ movhi
+ 800:Src/main.c    **** 											//When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
+ 12564              		.loc 1 800 7 is_stmt 1 view .LVU4024
+ 800:Src/main.c    **** 											//When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
+ 12565              		.loc 1 800 17 is_stmt 0 view .LVU4025
+ 12566 0966 914B     		ldr	r3, .L685+32
+ 12567 0968 42F21072 		movw	r2, #10000
+ 12568 096c DA62     		str	r2, [r3, #44]
+ 802:Src/main.c    **** 						if (st != HAL_OK)
+ 12569              		.loc 1 802 7 is_stmt 1 view .LVU4026
+ 802:Src/main.c    **** 						if (st != HAL_OK)
+ 12570              		.loc 1 802 12 is_stmt 0 view .LVU4027
+ 12571 096e 9048     		ldr	r0, .L685+36
+ 12572 0970 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
+ 12573              	.LVL1132:
+ 803:Src/main.c    **** 							while(1);
+ 12574              		.loc 1 803 7 is_stmt 1 view .LVU4028
+ARM GAS  /tmp/ccEQxcUB.s 			page 639
+
+
+ 803:Src/main.c    **** 							while(1);
+ 12575              		.loc 1 803 10 is_stmt 0 view .LVU4029
+ 12576 0974 78BB     		cbnz	r0, .L638
+ 808:Src/main.c    **** 						uint32_t i = 10000; while (--i){}
+ 12577              		.loc 1 808 7 is_stmt 1 view .LVU4030
+ 12578 0976 0122     		movs	r2, #1
+ 12579 0978 8021     		movs	r1, #128
+ 12580 097a 8E48     		ldr	r0, .L685+40
+ 12581              	.LVL1133:
+ 808:Src/main.c    **** 						uint32_t i = 10000; while (--i){}
+ 12582              		.loc 1 808 7 is_stmt 0 view .LVU4031
+ 12583 097c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 12584              	.LVL1134:
+ 809:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12585              		.loc 1 809 7 is_stmt 1 view .LVU4032
+ 809:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12586              		.loc 1 809 27 view .LVU4033
+ 809:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12587              		.loc 1 809 16 is_stmt 0 view .LVU4034
+ 12588 0980 42F21073 		movw	r3, #10000
+ 12589              	.LVL1135:
+ 12590              	.L639:
+ 809:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12591              		.loc 1 809 39 is_stmt 1 discriminator 2 view .LVU4035
+ 809:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12592              		.loc 1 809 34 discriminator 2 view .LVU4036
+ 809:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12593              		.loc 1 809 34 is_stmt 0 discriminator 2 view .LVU4037
+ 12594 0984 013B     		subs	r3, r3, #1
+ 12595              	.LVL1136:
+ 809:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
+ 12596              		.loc 1 809 34 discriminator 2 view .LVU4038
+ 12597 0986 FDD1     		bne	.L639
+ 810:Src/main.c    **** 						LD_blinker.state = 2;
+ 12598              		.loc 1 810 7 is_stmt 1 view .LVU4039
+ 12599 0988 0022     		movs	r2, #0
+ 12600 098a 8021     		movs	r1, #128
+ 12601 098c 8948     		ldr	r0, .L685+40
+ 12602 098e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 12603              	.LVL1137:
+ 811:Src/main.c    **** 
+ 12604              		.loc 1 811 7 view .LVU4040
+ 811:Src/main.c    **** 
+ 12605              		.loc 1 811 24 is_stmt 0 view .LVU4041
+ 12606 0992 844B     		ldr	r3, .L685+24
+ 12607 0994 0222     		movs	r2, #2
+ 12608 0996 9A72     		strb	r2, [r3, #10]
+ 813:Src/main.c    **** 						if (st != HAL_OK)
+ 12609              		.loc 1 813 7 is_stmt 1 view .LVU4042
+ 813:Src/main.c    **** 						if (st != HAL_OK)
+ 12610              		.loc 1 813 12 is_stmt 0 view .LVU4043
+ 12611 0998 8748     		ldr	r0, .L685+44
+ 12612 099a FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
+ 12613              	.LVL1138:
+ 814:Src/main.c    **** 							while(1);
+ 12614              		.loc 1 814 7 is_stmt 1 view .LVU4044
+ 814:Src/main.c    **** 							while(1);
+ARM GAS  /tmp/ccEQxcUB.s 			page 640
+
+
+ 12615              		.loc 1 814 10 is_stmt 0 view .LVU4045
+ 12616 099e D8B9     		cbnz	r0, .L641
+ 12617              	.L642:
+ 816:Src/main.c    **** 						{
+ 12618              		.loc 1 816 33 is_stmt 1 view .LVU4046
+ 816:Src/main.c    **** 						{
+ 12619              		.loc 1 816 18 is_stmt 0 view .LVU4047
+ 12620 09a0 7A4B     		ldr	r3, .L685
+ 12621 09a2 D3ED047A 		vldr.32	s15, [r3, #16]
+ 816:Src/main.c    **** 						{
+ 12622              		.loc 1 816 39 view .LVU4048
+ 12623 09a6 93ED027A 		vldr.32	s14, [r3, #8]
+ 816:Src/main.c    **** 						{
+ 12624              		.loc 1 816 33 view .LVU4049
+ 12625 09aa F4EEC77A 		vcmpe.f32	s15, s14
+ 12626 09ae F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ 12627 09b2 12D5     		bpl	.L678
+ 818:Src/main.c    **** 							{
+ 12628              		.loc 1 818 8 is_stmt 1 view .LVU4050
+ 818:Src/main.c    **** 							{
+ 12629              		.loc 1 818 12 is_stmt 0 view .LVU4051
+ 12630 09b4 814B     		ldr	r3, .L685+48
+ 12631 09b6 1B78     		ldrb	r3, [r3]	@ zero_extendqisi2
+ 818:Src/main.c    **** 							{
+ 12632              		.loc 1 818 11 view .LVU4052
+ 12633 09b8 002B     		cmp	r3, #0
+ 12634 09ba F1D0     		beq	.L642
+ 823:Src/main.c    **** 								TO10 = 0;
+ 12635              		.loc 1 823 9 is_stmt 1 view .LVU4053
+ 823:Src/main.c    **** 								TO10 = 0;
+ 12636              		.loc 1 823 35 is_stmt 0 view .LVU4054
+ 12637 09bc 734B     		ldr	r3, .L685
+ 12638 09be 93ED037A 		vldr.32	s14, [r3, #12]
+ 823:Src/main.c    **** 								TO10 = 0;
+ 12639              		.loc 1 823 28 view .LVU4055
+ 12640 09c2 77EE277A 		vadd.f32	s15, s14, s15
+ 12641 09c6 C3ED047A 		vstr.32	s15, [r3, #16]
+ 824:Src/main.c    **** 								TIM10_coflag = 0;
+ 12642              		.loc 1 824 9 is_stmt 1 view .LVU4056
+ 824:Src/main.c    **** 								TIM10_coflag = 0;
+ 12643              		.loc 1 824 14 is_stmt 0 view .LVU4057
+ 12644 09ca 0023     		movs	r3, #0
+ 12645 09cc 7C4A     		ldr	r2, .L685+52
+ 12646 09ce 1360     		str	r3, [r2]
+ 825:Src/main.c    **** 
+ 12647              		.loc 1 825 9 is_stmt 1 view .LVU4058
+ 825:Src/main.c    **** 
+ 12648              		.loc 1 825 22 is_stmt 0 view .LVU4059
+ 12649 09d0 7A4A     		ldr	r2, .L685+48
+ 12650 09d2 1370     		strb	r3, [r2]
+ 12651 09d4 E4E7     		b	.L642
+ 12652              	.LVL1139:
+ 12653              	.L638:
+ 804:Src/main.c    **** //						*/
+ 12654              		.loc 1 804 8 is_stmt 1 view .LVU4060
+ 804:Src/main.c    **** //						*/
+ 12655              		.loc 1 804 13 view .LVU4061
+ARM GAS  /tmp/ccEQxcUB.s 			page 641
+
+
+ 12656 09d6 FEE7     		b	.L638
+ 12657              	.LVL1140:
+ 12658              	.L641:
+ 815:Src/main.c    **** 						while (task.current_param < task.max_param)
+ 12659              		.loc 1 815 8 view .LVU4062
+ 815:Src/main.c    **** 						while (task.current_param < task.max_param)
+ 12660              		.loc 1 815 13 view .LVU4063
+ 12661 09d8 FEE7     		b	.L641
+ 12662              	.L678:
+ 830:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
+ 12663              		.loc 1 830 7 view .LVU4064
+ 12664 09da 7748     		ldr	r0, .L685+44
+ 12665              	.LVL1141:
+ 830:Src/main.c    **** 						HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
+ 12666              		.loc 1 830 7 is_stmt 0 view .LVU4065
+ 12667 09dc FFF7FEFF 		bl	HAL_TIM_Base_Stop
+ 12668              	.LVL1142:
+ 831:Src/main.c    **** 
+ 12669              		.loc 1 831 7 is_stmt 1 view .LVU4066
+ 12670 09e0 744C     		ldr	r4, .L685+40
+ 12671 09e2 0122     		movs	r2, #1
+ 12672 09e4 8021     		movs	r1, #128
+ 12673 09e6 2046     		mov	r0, r4
+ 12674 09e8 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 12675              	.LVL1143:
+ 833:Src/main.c    **** 
+ 12676              		.loc 1 833 7 view .LVU4067
+ 12677 09ec 0022     		movs	r2, #0
+ 12678 09ee 8021     		movs	r1, #128
+ 12679 09f0 2046     		mov	r0, r4
+ 12680 09f2 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 12681              	.LVL1144:
+ 835:Src/main.c    **** 						TIM8->CNT = 0;
+ 12682              		.loc 1 835 7 view .LVU4068
+ 12683 09f6 6E48     		ldr	r0, .L685+36
+ 12684 09f8 FFF7FEFF 		bl	HAL_TIM_Base_Stop_IT
+ 12685              	.LVL1145:
+ 836:Src/main.c    **** 
+ 12686              		.loc 1 836 7 view .LVU4069
+ 836:Src/main.c    **** 
+ 12687              		.loc 1 836 17 is_stmt 0 view .LVU4070
+ 12688 09fc 6B4B     		ldr	r3, .L685+32
+ 12689 09fe 0022     		movs	r2, #0
+ 12690 0a00 5A62     		str	r2, [r3, #36]
+ 838:Src/main.c    **** 						task.current_param = task.min_param;
+ 12691              		.loc 1 838 7 is_stmt 1 view .LVU4071
+ 12692 0a02 FFF7FEFF 		bl	Stop_TIM10
+ 12693              	.LVL1146:
+ 839:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
+ 12694              		.loc 1 839 7 view .LVU4072
+ 839:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
+ 12695              		.loc 1 839 32 is_stmt 0 view .LVU4073
+ 12696 0a06 614C     		ldr	r4, .L685
+ 12697 0a08 D4ED017A 		vldr.32	s15, [r4, #4]
+ 839:Src/main.c    **** 						Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
+ 12698              		.loc 1 839 26 view .LVU4074
+ 12699 0a0c C4ED047A 		vstr.32	s15, [r4, #16]
+ARM GAS  /tmp/ccEQxcUB.s 			page 642
+
+
+ 840:Src/main.c    **** 						if (task.tau > 3)
+ 12700              		.loc 1 840 7 is_stmt 1 view .LVU4075
+ 12701 0a10 FCEEE77A 		vcvt.u32.f32	s15, s15
+ 12702 0a14 17EE903A 		vmov	r3, s15	@ int
+ 12703 0a18 99B2     		uxth	r1, r3
+ 12704 0a1a 0220     		movs	r0, #2
+ 12705 0a1c FFF7FEFF 		bl	Set_LTEC
+ 12706              	.LVL1147:
+ 841:Src/main.c    **** 						{
+ 12707              		.loc 1 841 7 view .LVU4076
+ 841:Src/main.c    **** 						{
+ 12708              		.loc 1 841 15 is_stmt 0 view .LVU4077
+ 12709 0a20 E38A     		ldrh	r3, [r4, #22]
+ 841:Src/main.c    **** 						{
+ 12710              		.loc 1 841 10 view .LVU4078
+ 12711 0a22 032B     		cmp	r3, #3
+ 12712 0a24 0CD9     		bls	.L644
+ 843:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 12713              		.loc 1 843 8 is_stmt 1 view .LVU4079
+ 843:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 12714              		.loc 1 843 34 is_stmt 0 view .LVU4080
+ 12715 0a26 644A     		ldr	r2, .L685+44
+ 12716 0a28 D068     		ldr	r0, [r2, #12]
+ 843:Src/main.c    **** 							htim10.Init.Period = 9999;
+ 12717              		.loc 1 843 21 view .LVU4081
+ 12718 0a2a 6649     		ldr	r1, .L685+56
+ 12719 0a2c 0860     		str	r0, [r1]
+ 844:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
+ 12720              		.loc 1 844 8 is_stmt 1 view .LVU4082
+ 844:Src/main.c    **** 							TO10_counter = (task.tau - 1) * 100;
+ 12721              		.loc 1 844 27 is_stmt 0 view .LVU4083
+ 12722 0a2e 42F20F71 		movw	r1, #9999
+ 12723 0a32 D160     		str	r1, [r2, #12]
+ 845:Src/main.c    **** 						}
+ 12724              		.loc 1 845 8 is_stmt 1 view .LVU4084
+ 845:Src/main.c    **** 						}
+ 12725              		.loc 1 845 33 is_stmt 0 view .LVU4085
+ 12726 0a34 013B     		subs	r3, r3, #1
+ 845:Src/main.c    **** 						}
+ 12727              		.loc 1 845 38 view .LVU4086
+ 12728 0a36 6422     		movs	r2, #100
+ 12729 0a38 02FB03F3 		mul	r3, r2, r3
+ 845:Src/main.c    **** 						}
+ 12730              		.loc 1 845 21 view .LVU4087
+ 12731 0a3c 624A     		ldr	r2, .L685+60
+ 12732 0a3e 1360     		str	r3, [r2]
+ 12733              	.L644:
+ 847:Src/main.c    **** 
+ 12734              		.loc 1 847 7 is_stmt 1 view .LVU4088
+ 12735 0a40 5D48     		ldr	r0, .L685+44
+ 12736 0a42 FFF7FEFF 		bl	HAL_TIM_Base_Start_IT
+ 12737              	.LVL1148:
+ 895:Src/main.c    **** 					case TT_CHANGE_TEMP_1:
+ 12738              		.loc 1 895 6 view .LVU4089
+ 12739 0a46 12E6     		b	.L629
+ 12740              	.LVL1149:
+ 12741              	.L675:
+ARM GAS  /tmp/ccEQxcUB.s 			page 643
+
+
+ 895:Src/main.c    **** 					case TT_CHANGE_TEMP_1:
+ 12742              		.loc 1 895 6 is_stmt 0 view .LVU4090
+ 12743              	.LBE708:
+ 906:Src/main.c    **** 						
+ 12744              		.loc 1 906 7 is_stmt 1 view .LVU4091
+ 906:Src/main.c    **** 						
+ 12745              		.loc 1 906 18 is_stmt 0 view .LVU4092
+ 12746 0a48 604A     		ldr	r2, .L685+64
+ 12747 0a4a 1360     		str	r3, [r2]
+ 908:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 12748              		.loc 1 908 7 is_stmt 1 view .LVU4093
+ 908:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 12749              		.loc 1 908 25 is_stmt 0 view .LVU4094
+ 12750 0a4c 0120     		movs	r0, #1
+ 12751 0a4e FFF7FEFF 		bl	MPhD_T
+ 12752              	.LVL1150:
+ 908:Src/main.c    **** 						LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
+ 12753              		.loc 1 908 23 discriminator 1 view .LVU4095
+ 12754 0a52 4F4E     		ldr	r6, .L685+4
+ 12755 0a54 3081     		strh	r0, [r6, #8]	@ movhi
+ 909:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 12756              		.loc 1 909 7 is_stmt 1 view .LVU4096
+ 909:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 12757              		.loc 1 909 25 is_stmt 0 view .LVU4097
+ 12758 0a56 0120     		movs	r0, #1
+ 12759 0a58 FFF7FEFF 		bl	MPhD_T
+ 12760              	.LVL1151:
+ 909:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 12761              		.loc 1 909 23 discriminator 1 view .LVU4098
+ 12762 0a5c 3081     		strh	r0, [r6, #8]	@ movhi
+ 910:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 12763              		.loc 1 910 7 is_stmt 1 view .LVU4099
+ 910:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 12764              		.loc 1 910 25 is_stmt 0 view .LVU4100
+ 12765 0a5e 0220     		movs	r0, #2
+ 12766 0a60 FFF7FEFF 		bl	MPhD_T
+ 12767              	.LVL1152:
+ 910:Src/main.c    **** 						LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
+ 12768              		.loc 1 910 23 discriminator 1 view .LVU4101
+ 12769 0a64 4B4F     		ldr	r7, .L685+8
+ 12770 0a66 3881     		strh	r0, [r7, #8]	@ movhi
+ 911:Src/main.c    **** 						
+ 12771              		.loc 1 911 7 is_stmt 1 view .LVU4102
+ 911:Src/main.c    **** 						
+ 12772              		.loc 1 911 25 is_stmt 0 view .LVU4103
+ 12773 0a68 0220     		movs	r0, #2
+ 12774 0a6a FFF7FEFF 		bl	MPhD_T
+ 12775              	.LVL1153:
+ 911:Src/main.c    **** 						
+ 12776              		.loc 1 911 23 discriminator 1 view .LVU4104
+ 12777 0a6e 3881     		strh	r0, [r7, #8]	@ movhi
+ 913:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ 12778              		.loc 1 913 7 is_stmt 1 view .LVU4105
+ 913:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ 12779              		.loc 1 913 31 is_stmt 0 view .LVU4106
+ 12780 0a70 3389     		ldrh	r3, [r6, #8]
+ 913:Src/main.c    **** 						Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
+ARM GAS  /tmp/ccEQxcUB.s 			page 644
+
+
+ 12781              		.loc 1 913 20 view .LVU4107
+ 12782 0a72 574C     		ldr	r4, .L685+68
+ 12783 0a74 6380     		strh	r3, [r4, #2]	@ movhi
+ 914:Src/main.c    **** 	
+ 12784              		.loc 1 914 7 is_stmt 1 view .LVU4108
+ 914:Src/main.c    **** 	
+ 12785              		.loc 1 914 20 is_stmt 0 view .LVU4109
+ 12786 0a76 A080     		strh	r0, [r4, #4]	@ movhi
+ 918:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 12787              		.loc 1 918 7 is_stmt 1 view .LVU4110
+ 918:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 12788              		.loc 1 918 16 is_stmt 0 view .LVU4111
+ 12789 0a78 0020     		movs	r0, #0
+ 12790 0a7a FFF7FEFF 		bl	Get_ADC
+ 12791              	.LVL1154:
+ 918:Src/main.c    **** 						temp16 = Get_ADC(1);
+ 12792              		.loc 1 918 14 discriminator 1 view .LVU4112
+ 12793 0a7e 474D     		ldr	r5, .L685+16
+ 12794 0a80 2880     		strh	r0, [r5]	@ movhi
+ 919:Src/main.c    **** 						Long_Data[7] = temp16;
+ 12795              		.loc 1 919 7 is_stmt 1 view .LVU4113
+ 919:Src/main.c    **** 						Long_Data[7] = temp16;
+ 12796              		.loc 1 919 16 is_stmt 0 view .LVU4114
+ 12797 0a82 0120     		movs	r0, #1
+ 12798 0a84 FFF7FEFF 		bl	Get_ADC
+ 12799              	.LVL1155:
+ 919:Src/main.c    **** 						Long_Data[7] = temp16;
+ 12800              		.loc 1 919 14 discriminator 1 view .LVU4115
+ 12801 0a88 2880     		strh	r0, [r5]	@ movhi
+ 920:Src/main.c    **** 						
+ 12802              		.loc 1 920 7 is_stmt 1 view .LVU4116
+ 920:Src/main.c    **** 						
+ 12803              		.loc 1 920 20 is_stmt 0 view .LVU4117
+ 12804 0a8a E081     		strh	r0, [r4, #14]	@ movhi
+ 923:Src/main.c    **** 						Long_Data[8] = temp16;
+ 12805              		.loc 1 923 7 is_stmt 1 view .LVU4118
+ 923:Src/main.c    **** 						Long_Data[8] = temp16;
+ 12806              		.loc 1 923 16 is_stmt 0 view .LVU4119
+ 12807 0a8c 0120     		movs	r0, #1
+ 12808 0a8e FFF7FEFF 		bl	Get_ADC
+ 12809              	.LVL1156:
+ 923:Src/main.c    **** 						Long_Data[8] = temp16;
+ 12810              		.loc 1 923 14 discriminator 1 view .LVU4120
+ 12811 0a92 2880     		strh	r0, [r5]	@ movhi
+ 924:Src/main.c    **** 						
+ 12812              		.loc 1 924 7 is_stmt 1 view .LVU4121
+ 924:Src/main.c    **** 						
+ 12813              		.loc 1 924 20 is_stmt 0 view .LVU4122
+ 12814 0a94 2082     		strh	r0, [r4, #16]	@ movhi
+ 927:Src/main.c    **** 						Long_Data[9] = temp16;
+ 12815              		.loc 1 927 7 is_stmt 1 view .LVU4123
+ 927:Src/main.c    **** 						Long_Data[9] = temp16;
+ 12816              		.loc 1 927 16 is_stmt 0 view .LVU4124
+ 12817 0a96 0120     		movs	r0, #1
+ 12818 0a98 FFF7FEFF 		bl	Get_ADC
+ 12819              	.LVL1157:
+ 927:Src/main.c    **** 						Long_Data[9] = temp16;
+ARM GAS  /tmp/ccEQxcUB.s 			page 645
+
+
+ 12820              		.loc 1 927 14 discriminator 1 view .LVU4125
+ 12821 0a9c 2880     		strh	r0, [r5]	@ movhi
+ 928:Src/main.c    **** 						
+ 12822              		.loc 1 928 7 is_stmt 1 view .LVU4126
+ 928:Src/main.c    **** 						
+ 12823              		.loc 1 928 20 is_stmt 0 view .LVU4127
+ 12824 0a9e 6082     		strh	r0, [r4, #18]	@ movhi
+ 931:Src/main.c    **** 						Long_Data[10] = temp16;
+ 12825              		.loc 1 931 7 is_stmt 1 view .LVU4128
+ 931:Src/main.c    **** 						Long_Data[10] = temp16;
+ 12826              		.loc 1 931 16 is_stmt 0 view .LVU4129
+ 12827 0aa0 0120     		movs	r0, #1
+ 12828 0aa2 FFF7FEFF 		bl	Get_ADC
+ 12829              	.LVL1158:
+ 931:Src/main.c    **** 						Long_Data[10] = temp16;
+ 12830              		.loc 1 931 14 discriminator 1 view .LVU4130
+ 12831 0aa6 2880     		strh	r0, [r5]	@ movhi
+ 932:Src/main.c    **** 						
+ 12832              		.loc 1 932 7 is_stmt 1 view .LVU4131
+ 932:Src/main.c    **** 						
+ 12833              		.loc 1 932 21 is_stmt 0 view .LVU4132
+ 12834 0aa8 A082     		strh	r0, [r4, #20]	@ movhi
+ 935:Src/main.c    **** 						Long_Data[11] = temp16;
+ 12835              		.loc 1 935 7 is_stmt 1 view .LVU4133
+ 935:Src/main.c    **** 						Long_Data[11] = temp16;
+ 12836              		.loc 1 935 16 is_stmt 0 view .LVU4134
+ 12837 0aaa 0120     		movs	r0, #1
+ 12838 0aac FFF7FEFF 		bl	Get_ADC
+ 12839              	.LVL1159:
+ 935:Src/main.c    **** 						Long_Data[11] = temp16;
+ 12840              		.loc 1 935 14 discriminator 1 view .LVU4135
+ 12841 0ab0 2880     		strh	r0, [r5]	@ movhi
+ 936:Src/main.c    **** 						temp16 = Get_ADC(2);
+ 12842              		.loc 1 936 7 is_stmt 1 view .LVU4136
+ 936:Src/main.c    **** 						temp16 = Get_ADC(2);
+ 12843              		.loc 1 936 21 is_stmt 0 view .LVU4137
+ 12844 0ab2 E082     		strh	r0, [r4, #22]	@ movhi
+ 937:Src/main.c    **** 						
+ 12845              		.loc 1 937 7 is_stmt 1 view .LVU4138
+ 937:Src/main.c    **** 						
+ 12846              		.loc 1 937 16 is_stmt 0 view .LVU4139
+ 12847 0ab4 0220     		movs	r0, #2
+ 12848 0ab6 FFF7FEFF 		bl	Get_ADC
+ 12849              	.LVL1160:
+ 937:Src/main.c    **** 						
+ 12850              		.loc 1 937 14 discriminator 1 view .LVU4140
+ 12851 0aba 2880     		strh	r0, [r5]	@ movhi
+ 940:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 12852              		.loc 1 940 7 is_stmt 1 view .LVU4141
+ 940:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 12853              		.loc 1 940 16 is_stmt 0 view .LVU4142
+ 12854 0abc 0320     		movs	r0, #3
+ 12855 0abe FFF7FEFF 		bl	Get_ADC
+ 12856              	.LVL1161:
+ 940:Src/main.c    **** 						temp16 = Get_ADC(4);
+ 12857              		.loc 1 940 14 discriminator 1 view .LVU4143
+ 12858 0ac2 2880     		strh	r0, [r5]	@ movhi
+ARM GAS  /tmp/ccEQxcUB.s 			page 646
+
+
+ 941:Src/main.c    **** 						Long_Data[12] = temp16;
+ 12859              		.loc 1 941 7 is_stmt 1 view .LVU4144
+ 941:Src/main.c    **** 						Long_Data[12] = temp16;
+ 12860              		.loc 1 941 16 is_stmt 0 view .LVU4145
+ 12861 0ac4 0420     		movs	r0, #4
+ 12862 0ac6 FFF7FEFF 		bl	Get_ADC
+ 12863              	.LVL1162:
+ 941:Src/main.c    **** 						Long_Data[12] = temp16;
+ 12864              		.loc 1 941 14 discriminator 1 view .LVU4146
+ 12865 0aca 2880     		strh	r0, [r5]	@ movhi
+ 942:Src/main.c    **** 						temp16 = Get_ADC(5);
+ 12866              		.loc 1 942 7 is_stmt 1 view .LVU4147
+ 942:Src/main.c    **** 						temp16 = Get_ADC(5);
+ 12867              		.loc 1 942 21 is_stmt 0 view .LVU4148
+ 12868 0acc 2083     		strh	r0, [r4, #24]	@ movhi
+ 943:Src/main.c    **** 													
+ 12869              		.loc 1 943 7 is_stmt 1 view .LVU4149
+ 943:Src/main.c    **** 													
+ 12870              		.loc 1 943 16 is_stmt 0 view .LVU4150
+ 12871 0ace 0520     		movs	r0, #5
+ 12872 0ad0 FFF7FEFF 		bl	Get_ADC
+ 12873              	.LVL1163:
+ 943:Src/main.c    **** 													
+ 12874              		.loc 1 943 14 discriminator 1 view .LVU4151
+ 12875 0ad4 2880     		strh	r0, [r5]	@ movhi
+ 946:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
+ 12876              		.loc 1 946 7 is_stmt 1 view .LVU4152
+ 946:Src/main.c    **** 						Long_Data[3] = (TO6_stop)&0xffff;
+ 12877              		.loc 1 946 16 is_stmt 0 view .LVU4153
+ 12878 0ad6 3F4B     		ldr	r3, .L685+72
+ 12879 0ad8 1B68     		ldr	r3, [r3]
+ 12880 0ada 3F4A     		ldr	r2, .L685+76
+ 12881 0adc 1360     		str	r3, [r2]
+ 947:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
+ 12882              		.loc 1 947 7 is_stmt 1 view .LVU4154
+ 947:Src/main.c    **** 						Long_Data[4] = (TO6_stop>>16)&0xffff;
+ 12883              		.loc 1 947 20 is_stmt 0 view .LVU4155
+ 12884 0ade E380     		strh	r3, [r4, #6]	@ movhi
+ 948:Src/main.c    **** 						
+ 12885              		.loc 1 948 7 is_stmt 1 view .LVU4156
+ 948:Src/main.c    **** 						
+ 12886              		.loc 1 948 31 is_stmt 0 view .LVU4157
+ 12887 0ae0 1B0C     		lsrs	r3, r3, #16
+ 948:Src/main.c    **** 						
+ 12888              		.loc 1 948 20 view .LVU4158
+ 12889 0ae2 2381     		strh	r3, [r4, #8]	@ movhi
+ 951:Src/main.c    **** 						
+ 12890              		.loc 1 951 7 is_stmt 1 view .LVU4159
+ 951:Src/main.c    **** 						
+ 12891              		.loc 1 951 31 is_stmt 0 view .LVU4160
+ 12892 0ae4 3388     		ldrh	r3, [r6]
+ 951:Src/main.c    **** 						
+ 12893              		.loc 1 951 20 view .LVU4161
+ 12894 0ae6 6381     		strh	r3, [r4, #10]	@ movhi
+ 954:Src/main.c    **** 					}
+ 12895              		.loc 1 954 7 is_stmt 1 view .LVU4162
+ 954:Src/main.c    **** 					}
+ARM GAS  /tmp/ccEQxcUB.s 			page 647
+
+
+ 12896              		.loc 1 954 31 is_stmt 0 view .LVU4163
+ 12897 0ae8 3B88     		ldrh	r3, [r7]
+ 954:Src/main.c    **** 					}
+ 12898              		.loc 1 954 20 view .LVU4164
+ 12899 0aea A381     		strh	r3, [r4, #12]	@ movhi
+ 12900 0aec C6E5     		b	.L646
+ 12901              	.L648:
+ 982:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
+ 12902              		.loc 1 982 5 is_stmt 1 view .LVU4165
+ 982:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
+ 12903              		.loc 1 982 17 is_stmt 0 view .LVU4166
+ 12904 0aee 3B4C     		ldr	r4, .L685+80
+ 12905 0af0 0D21     		movs	r1, #13
+ 12906 0af2 2046     		mov	r0, r4
+ 12907 0af4 FFF7FEFF 		bl	CalculateChecksum
+ 12908              	.LVL1164:
+ 982:Src/main.c    **** 				Long_Data[DL_16-1] = CS_result;
+ 12909              		.loc 1 982 15 discriminator 1 view .LVU4167
+ 12910 0af8 394B     		ldr	r3, .L685+84
+ 12911 0afa 1880     		strh	r0, [r3]	@ movhi
+ 983:Src/main.c    **** 				
+ 12912              		.loc 1 983 5 is_stmt 1 view .LVU4168
+ 983:Src/main.c    **** 				
+ 12913              		.loc 1 983 24 is_stmt 0 view .LVU4169
+ 12914 0afc 6083     		strh	r0, [r4, #26]	@ movhi
+ 985:Src/main.c    **** 				{
+ 12915              		.loc 1 985 5 is_stmt 1 view .LVU4170
+ 12916              	.LBB709:
+ 985:Src/main.c    **** 				{
+ 12917              		.loc 1 985 10 view .LVU4171
+ 12918              	.LVL1165:
+ 985:Src/main.c    **** 				{
+ 12919              		.loc 1 985 19 is_stmt 0 view .LVU4172
+ 12920 0afe 0023     		movs	r3, #0
+ 985:Src/main.c    **** 				{
+ 12921              		.loc 1 985 5 view .LVU4173
+ 12922 0b00 0BE0     		b	.L651
+ 12923              	.LVL1166:
+ 12924              	.L652:
+ 987:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12925              		.loc 1 987 6 is_stmt 1 view .LVU4174
+ 987:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12926              		.loc 1 987 33 is_stmt 0 view .LVU4175
+ 12927 0b02 334A     		ldr	r2, .L685+68
+ 12928 0b04 32F81320 		ldrh	r2, [r2, r3, lsl #1]
+ 987:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12929              		.loc 1 987 17 view .LVU4176
+ 12930 0b08 5900     		lsls	r1, r3, #1
+ 987:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12931              		.loc 1 987 21 view .LVU4177
+ 12932 0b0a 3648     		ldr	r0, .L685+88
+ 12933 0b0c 00F81320 		strb	r2, [r0, r3, lsl #1]
+ 988:Src/main.c    **** 				}
+ 12934              		.loc 1 988 6 is_stmt 1 view .LVU4178
+ 988:Src/main.c    **** 				}
+ 12935              		.loc 1 988 19 is_stmt 0 view .LVU4179
+ 12936 0b10 0131     		adds	r1, r1, #1
+ARM GAS  /tmp/ccEQxcUB.s 			page 648
+
+
+ 988:Src/main.c    **** 				}
+ 12937              		.loc 1 988 23 view .LVU4180
+ 12938 0b12 120A     		lsrs	r2, r2, #8
+ 12939 0b14 4254     		strb	r2, [r0, r1]
+ 985:Src/main.c    **** 				{
+ 12940              		.loc 1 985 38 is_stmt 1 discriminator 3 view .LVU4181
+ 12941 0b16 0133     		adds	r3, r3, #1
+ 12942              	.LVL1167:
+ 985:Src/main.c    **** 				{
+ 12943              		.loc 1 985 38 is_stmt 0 discriminator 3 view .LVU4182
+ 12944 0b18 9BB2     		uxth	r3, r3
+ 12945              	.LVL1168:
+ 12946              	.L651:
+ 985:Src/main.c    **** 				{
+ 12947              		.loc 1 985 28 is_stmt 1 discriminator 1 view .LVU4183
+ 12948 0b1a 0E2B     		cmp	r3, #14
+ 12949 0b1c F1D9     		bls	.L652
+ 12950              	.LBE709:
+ 995:Src/main.c    **** 				UART_transmission_request = NO_MESS;
+ 12951              		.loc 1 995 5 view .LVU4184
+ 12952 0b1e 1E20     		movs	r0, #30
+ 12953 0b20 FFF7FEFF 		bl	USART_TX_DMA
+ 12954              	.LVL1169:
+ 996:Src/main.c    **** 			break;
+ 12955              		.loc 1 996 5 view .LVU4185
+ 996:Src/main.c    **** 			break;
+ 12956              		.loc 1 996 31 is_stmt 0 view .LVU4186
+ 12957 0b24 304B     		ldr	r3, .L685+92
+ 12958 0b26 0022     		movs	r2, #0
+ 12959 0b28 1A70     		strb	r2, [r3]
+ 997:Src/main.c    **** 			case MESS_03://Transmith saved packet
+ 12960              		.loc 1 997 4 is_stmt 1 view .LVU4187
+ 12961 0b2a FFF7FCBA 		b	.L650
+ 12962              	.LVL1170:
+ 12963              	.L653:
+ 12964              	.LBB710:
+1001:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12965              		.loc 1 1001 6 view .LVU4188
+1001:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12966              		.loc 1 1001 33 is_stmt 0 view .LVU4189
+ 12967 0b2e 284A     		ldr	r2, .L685+68
+ 12968 0b30 32F81320 		ldrh	r2, [r2, r3, lsl #1]
+1001:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12969              		.loc 1 1001 17 view .LVU4190
+ 12970 0b34 5900     		lsls	r1, r3, #1
+1001:Src/main.c    **** 					UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
+ 12971              		.loc 1 1001 21 view .LVU4191
+ 12972 0b36 2B48     		ldr	r0, .L685+88
+ 12973 0b38 00F81320 		strb	r2, [r0, r3, lsl #1]
+1002:Src/main.c    **** 				}
+ 12974              		.loc 1 1002 6 is_stmt 1 view .LVU4192
+1002:Src/main.c    **** 				}
+ 12975              		.loc 1 1002 19 is_stmt 0 view .LVU4193
+ 12976 0b3c 0131     		adds	r1, r1, #1
+1002:Src/main.c    **** 				}
+ 12977              		.loc 1 1002 23 view .LVU4194
+ 12978 0b3e 120A     		lsrs	r2, r2, #8
+ARM GAS  /tmp/ccEQxcUB.s 			page 649
+
+
+ 12979 0b40 4254     		strb	r2, [r0, r1]
+ 999:Src/main.c    **** 				{
+ 12980              		.loc 1 999 38 is_stmt 1 discriminator 3 view .LVU4195
+ 12981 0b42 0133     		adds	r3, r3, #1
+ 12982              	.LVL1171:
+ 999:Src/main.c    **** 				{
+ 12983              		.loc 1 999 38 is_stmt 0 discriminator 3 view .LVU4196
+ 12984 0b44 9BB2     		uxth	r3, r3
+ 12985              	.LVL1172:
+ 12986              	.L649:
+ 999:Src/main.c    **** 				{
+ 12987              		.loc 1 999 28 is_stmt 1 discriminator 1 view .LVU4197
+ 12988 0b46 0E2B     		cmp	r3, #14
+ 12989 0b48 F1D9     		bls	.L653
+ 12990              	.LBE710:
+1008:Src/main.c    **** 				UART_transmission_request = NO_MESS;
+ 12991              		.loc 1 1008 5 view .LVU4198
+ 12992 0b4a 1E20     		movs	r0, #30
+ 12993 0b4c FFF7FEFF 		bl	USART_TX_DMA
+ 12994              	.LVL1173:
+1009:Src/main.c    **** 			break;			
+ 12995              		.loc 1 1009 5 view .LVU4199
+1009:Src/main.c    **** 			break;			
+ 12996              		.loc 1 1009 31 is_stmt 0 view .LVU4200
+ 12997 0b50 254B     		ldr	r3, .L685+92
+ 12998 0b52 0022     		movs	r2, #0
+ 12999 0b54 1A70     		strb	r2, [r3]
+1010:Src/main.c    **** 		}
+ 13000              		.loc 1 1010 4 is_stmt 1 view .LVU4201
+ 13001 0b56 FFF7E6BA 		b	.L650
+ 13002              	.LVL1174:
+ 13003              	.L664:
+ 970:Src/main.c    **** 		{
+ 13004              		.loc 1 970 3 is_stmt 0 view .LVU4202
+ 13005 0b5a 0023     		movs	r3, #0
+ 13006 0b5c F3E7     		b	.L649
+ 13007              	.L667:
+1012:Src/main.c    **** 		{
+ 13008              		.loc 1 1012 28 discriminator 1 view .LVU4203
+ 13009 0b5e 1D4B     		ldr	r3, .L685+72
+ 13010 0b60 1B68     		ldr	r3, [r3]
+ 13011 0b62 224A     		ldr	r2, .L685+96
+ 13012 0b64 1268     		ldr	r2, [r2]
+ 13013 0b66 9B1A     		subs	r3, r3, r2
+1012:Src/main.c    **** 		{
+ 13014              		.loc 1 1012 21 discriminator 1 view .LVU4204
+ 13015 0b68 642B     		cmp	r3, #100
+ 13016 0b6a 7FF6E1AA 		bls	.L586
+1014:Src/main.c    **** 			State_Data[0] |= UART_ERR;//timeout error!
+ 13017              		.loc 1 1014 4 is_stmt 1 view .LVU4205
+1014:Src/main.c    **** 			State_Data[0] |= UART_ERR;//timeout error!
+ 13018              		.loc 1 1014 18 is_stmt 0 view .LVU4206
+ 13019 0b6e 0022     		movs	r2, #0
+ 13020 0b70 1F4B     		ldr	r3, .L685+100
+ 13021 0b72 1A80     		strh	r2, [r3]	@ movhi
+1015:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
+ 13022              		.loc 1 1015 4 is_stmt 1 view .LVU4207
+ARM GAS  /tmp/ccEQxcUB.s 			page 650
+
+
+1015:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
+ 13023              		.loc 1 1015 14 is_stmt 0 view .LVU4208
+ 13024 0b74 1F49     		ldr	r1, .L685+104
+ 13025 0b76 0B78     		ldrb	r3, [r1]	@ zero_extendqisi2
+1015:Src/main.c    **** 			UART_transmission_request = MESS_01;//Send status
+ 13026              		.loc 1 1015 18 view .LVU4209
+ 13027 0b78 43F00203 		orr	r3, r3, #2
+ 13028 0b7c 0B70     		strb	r3, [r1]
+1016:Src/main.c    **** 			flg_tmt = 0;//Reset timeout flag
+ 13029              		.loc 1 1016 4 is_stmt 1 view .LVU4210
+1016:Src/main.c    **** 			flg_tmt = 0;//Reset timeout flag
+ 13030              		.loc 1 1016 30 is_stmt 0 view .LVU4211
+ 13031 0b7e 1A4B     		ldr	r3, .L685+92
+ 13032 0b80 0121     		movs	r1, #1
+ 13033 0b82 1970     		strb	r1, [r3]
+1017:Src/main.c    **** 		}
+ 13034              		.loc 1 1017 4 is_stmt 1 view .LVU4212
+1017:Src/main.c    **** 		}
+ 13035              		.loc 1 1017 12 is_stmt 0 view .LVU4213
+ 13036 0b84 1C4B     		ldr	r3, .L685+108
+ 13037 0b86 1A70     		strb	r2, [r3]
+ 13038 0b88 FFF7D2BA 		b	.L586
+ 13039              	.L686:
+ 13040              		.align	2
+ 13041              	.L685:
+ 13042 0b8c 00000000 		.word	task
+ 13043 0b90 00000000 		.word	LD1_param
+ 13044 0b94 00000000 		.word	LD2_param
+ 13045 0b98 00000000 		.word	LD1_curr_setup
+ 13046 0b9c 00000000 		.word	temp16
+ 13047 0ba0 00000000 		.word	LD2_curr_setup
+ 13048 0ba4 00000000 		.word	LD_blinker
+ 13049 0ba8 00040240 		.word	1073873920
+ 13050 0bac 00040140 		.word	1073808384
+ 13051 0bb0 00000000 		.word	htim8
+ 13052 0bb4 000C0240 		.word	1073875968
+ 13053 0bb8 00000000 		.word	htim10
+ 13054 0bbc 00000000 		.word	TIM10_coflag
+ 13055 0bc0 00000000 		.word	TO10
+ 13056 0bc4 00000000 		.word	TIM10_period
+ 13057 0bc8 00000000 		.word	TO10_counter
+ 13058 0bcc 00000000 		.word	TO7_before
+ 13059 0bd0 00000000 		.word	Long_Data
+ 13060 0bd4 00000000 		.word	TO6
+ 13061 0bd8 00000000 		.word	TO6_stop
+ 13062 0bdc 02000000 		.word	Long_Data+2
+ 13063 0be0 00000000 		.word	CS_result
+ 13064 0be4 00000000 		.word	UART_DATA
+ 13065 0be8 00000000 		.word	UART_transmission_request
+ 13066 0bec 00000000 		.word	TO6_uart
+ 13067 0bf0 00000000 		.word	UART_rec_incr
+ 13068 0bf4 00000000 		.word	State_Data
+ 13069 0bf8 00000000 		.word	flg_tmt
+ 13070              		.cfi_endproc
+ 13071              	.LFE1186:
+ 13073              		.section	.rodata.ad9102_example2_regval,"a"
+ 13074              		.align	2
+ARM GAS  /tmp/ccEQxcUB.s 			page 651
+
+
+ 13077              	ad9102_example2_regval:
+ 13078 0000 0000     		.short	0
+ 13079 0002 000E     		.short	3584
+ 13080 0004 0000     		.short	0
+ 13081 0006 0000     		.short	0
+ 13082 0008 0000     		.short	0
+ 13083 000a 0000     		.short	0
+ 13084 000c 0000     		.short	0
+ 13085 000e 0040     		.short	16384
+ 13086 0010 0000     		.short	0
+ 13087 0012 0000     		.short	0
+ 13088 0014 0000     		.short	0
+ 13089 0016 0000     		.short	0
+ 13090 0018 001F     		.short	7936
+ 13091 001a 0000     		.short	0
+ 13092 001c 0000     		.short	0
+ 13093 001e 0000     		.short	0
+ 13094 0020 0E00     		.short	14
+ 13095 0022 0000     		.short	0
+ 13096 0024 0000     		.short	0
+ 13097 0026 0000     		.short	0
+ 13098 0028 0000     		.short	0
+ 13099 002a 0000     		.short	0
+ 13100 002c 3030     		.short	12336
+ 13101 002e 1101     		.short	273
+ 13102 0030 FFFF     		.short	-1
+ 13103 0032 0000     		.short	0
+ 13104 0034 0101     		.short	257
+ 13105 0036 0300     		.short	3
+ 13106 0038 0000     		.short	0
+ 13107 003a 0000     		.short	0
+ 13108 003c 0000     		.short	0
+ 13109 003e 0000     		.short	0
+ 13110 0040 0000     		.short	0
+ 13111 0042 0000     		.short	0
+ 13112 0044 0000     		.short	0
+ 13113 0046 0000     		.short	0
+ 13114 0048 0040     		.short	16384
+ 13115 004a 0000     		.short	0
+ 13116 004c 0002     		.short	512
+ 13117 004e 0000     		.short	0
+ 13118 0050 0000     		.short	0
+ 13119 0052 0000     		.short	0
+ 13120 0054 0000     		.short	0
+ 13121 0056 0000     		.short	0
+ 13122 0058 0000     		.short	0
+ 13123 005a 0000     		.short	0
+ 13124 005c 0000     		.short	0
+ 13125 005e 0000     		.short	0
+ 13126 0060 0000     		.short	0
+ 13127 0062 0000     		.short	0
+ 13128 0064 0000     		.short	0
+ 13129 0066 0000     		.short	0
+ 13130 0068 0000     		.short	0
+ 13131 006a 0000     		.short	0
+ 13132 006c 0000     		.short	0
+ 13133 006e 0000     		.short	0
+ARM GAS  /tmp/ccEQxcUB.s 			page 652
+
+
+ 13134 0070 0000     		.short	0
+ 13135 0072 0000     		.short	0
+ 13136 0074 0000     		.short	0
+ 13137 0076 0000     		.short	0
+ 13138 0078 A00F     		.short	4000
+ 13139 007a 0000     		.short	0
+ 13140 007c F03F     		.short	16368
+ 13141 007e 0001     		.short	256
+ 13142 0080 0100     		.short	1
+ 13143 0082 0100     		.short	1
+ 13144              		.section	.rodata.ad9102_example4_regval,"a"
+ 13145              		.align	2
+ 13148              	ad9102_example4_regval:
+ 13149 0000 0000     		.short	0
+ 13150 0002 0000     		.short	0
+ 13151 0004 0000     		.short	0
+ 13152 0006 0000     		.short	0
+ 13153 0008 0000     		.short	0
+ 13154 000a 0000     		.short	0
+ 13155 000c 0000     		.short	0
+ 13156 000e 0040     		.short	16384
+ 13157 0010 0000     		.short	0
+ 13158 0012 0000     		.short	0
+ 13159 0014 0000     		.short	0
+ 13160 0016 0000     		.short	0
+ 13161 0018 001F     		.short	7936
+ 13162 001a 0000     		.short	0
+ 13163 001c 0000     		.short	0
+ 13164 001e 0000     		.short	0
+ 13165 0020 0E00     		.short	14
+ 13166 0022 0000     		.short	0
+ 13167 0024 0000     		.short	0
+ 13168 0026 0000     		.short	0
+ 13169 0028 0000     		.short	0
+ 13170 002a 0000     		.short	0
+ 13171 002c 1232     		.short	12818
+ 13172 002e 2101     		.short	289
+ 13173 0030 FFFF     		.short	-1
+ 13174 0032 0000     		.short	0
+ 13175 0034 0101     		.short	257
+ 13176 0036 0300     		.short	3
+ 13177 0038 0000     		.short	0
+ 13178 003a 0000     		.short	0
+ 13179 003c 0000     		.short	0
+ 13180 003e 0000     		.short	0
+ 13181 0040 0000     		.short	0
+ 13182 0042 0000     		.short	0
+ 13183 0044 0000     		.short	0
+ 13184 0046 0000     		.short	0
+ 13185 0048 0040     		.short	16384
+ 13186 004a 0000     		.short	0
+ 13187 004c 0606     		.short	1542
+ 13188 004e 9919     		.short	6553
+ 13189 0050 009A     		.short	-26112
+ 13190 0052 0000     		.short	0
+ 13191 0054 0000     		.short	0
+ 13192 0056 0000     		.short	0
+ARM GAS  /tmp/ccEQxcUB.s 			page 653
+
+
+ 13193 0058 0000     		.short	0
+ 13194 005a 0000     		.short	0
+ 13195 005c 0000     		.short	0
+ 13196 005e 0000     		.short	0
+ 13197 0060 A00F     		.short	4000
+ 13198 0062 0000     		.short	0
+ 13199 0064 0000     		.short	0
+ 13200 0066 0000     		.short	0
+ 13201 0068 0000     		.short	0
+ 13202 006a 0000     		.short	0
+ 13203 006c 0000     		.short	0
+ 13204 006e 0000     		.short	0
+ 13205 0070 0000     		.short	0
+ 13206 0072 0000     		.short	0
+ 13207 0074 0000     		.short	0
+ 13208 0076 0000     		.short	0
+ 13209 0078 0000     		.short	0
+ 13210 007a 0000     		.short	0
+ 13211 007c 0000     		.short	0
+ 13212 007e FF16     		.short	5887
+ 13213 0080 0100     		.short	1
+ 13214 0082 0100     		.short	1
+ 13215              		.section	.rodata.ad9102_reg_addr,"a"
+ 13216              		.align	2
+ 13219              	ad9102_reg_addr:
+ 13220 0000 0000     		.short	0
+ 13221 0002 0100     		.short	1
+ 13222 0004 0200     		.short	2
+ 13223 0006 0300     		.short	3
+ 13224 0008 0400     		.short	4
+ 13225 000a 0500     		.short	5
+ 13226 000c 0600     		.short	6
+ 13227 000e 0700     		.short	7
+ 13228 0010 0800     		.short	8
+ 13229 0012 0900     		.short	9
+ 13230 0014 0A00     		.short	10
+ 13231 0016 0B00     		.short	11
+ 13232 0018 0C00     		.short	12
+ 13233 001a 0D00     		.short	13
+ 13234 001c 0E00     		.short	14
+ 13235 001e 1F00     		.short	31
+ 13236 0020 2000     		.short	32
+ 13237 0022 2200     		.short	34
+ 13238 0024 2300     		.short	35
+ 13239 0026 2400     		.short	36
+ 13240 0028 2500     		.short	37
+ 13241 002a 2600     		.short	38
+ 13242 002c 2700     		.short	39
+ 13243 002e 2800     		.short	40
+ 13244 0030 2900     		.short	41
+ 13245 0032 2A00     		.short	42
+ 13246 0034 2B00     		.short	43
+ 13247 0036 2C00     		.short	44
+ 13248 0038 2D00     		.short	45
+ 13249 003a 2E00     		.short	46
+ 13250 003c 2F00     		.short	47
+ 13251 003e 3000     		.short	48
+ARM GAS  /tmp/ccEQxcUB.s 			page 654
+
+
+ 13252 0040 3100     		.short	49
+ 13253 0042 3200     		.short	50
+ 13254 0044 3300     		.short	51
+ 13255 0046 3400     		.short	52
+ 13256 0048 3500     		.short	53
+ 13257 004a 3600     		.short	54
+ 13258 004c 3700     		.short	55
+ 13259 004e 3E00     		.short	62
+ 13260 0050 3F00     		.short	63
+ 13261 0052 4000     		.short	64
+ 13262 0054 4100     		.short	65
+ 13263 0056 4200     		.short	66
+ 13264 0058 4300     		.short	67
+ 13265 005a 4400     		.short	68
+ 13266 005c 4500     		.short	69
+ 13267 005e 4700     		.short	71
+ 13268 0060 5000     		.short	80
+ 13269 0062 5100     		.short	81
+ 13270 0064 5200     		.short	82
+ 13271 0066 5300     		.short	83
+ 13272 0068 5400     		.short	84
+ 13273 006a 5500     		.short	85
+ 13274 006c 5600     		.short	86
+ 13275 006e 5700     		.short	87
+ 13276 0070 5800     		.short	88
+ 13277 0072 5900     		.short	89
+ 13278 0074 5A00     		.short	90
+ 13279 0076 5B00     		.short	91
+ 13280 0078 5C00     		.short	92
+ 13281 007a 5D00     		.short	93
+ 13282 007c 5E00     		.short	94
+ 13283 007e 5F00     		.short	95
+ 13284 0080 1E00     		.short	30
+ 13285 0082 1D00     		.short	29
+ 13286              		.global	task
+ 13287              		.section	.bss.task,"aw",%nobits
+ 13288              		.align	2
+ 13291              	task:
+ 13292 0000 00000000 		.space	52
+ 13292      00000000 
+ 13292      00000000 
+ 13292      00000000 
+ 13292      00000000 
+ 13293              		.global	LD_blinker
+ 13294              		.section	.bss.LD_blinker,"aw",%nobits
+ 13295              		.align	2
+ 13298              	LD_blinker:
+ 13299 0000 00000000 		.space	12
+ 13299      00000000 
+ 13299      00000000 
+ 13300              		.global	LD2_param
+ 13301              		.section	.bss.LD2_param,"aw",%nobits
+ 13302              		.align	2
+ 13305              	LD2_param:
+ 13306 0000 00000000 		.space	12
+ 13306      00000000 
+ 13306      00000000 
+ARM GAS  /tmp/ccEQxcUB.s 			page 655
+
+
+ 13307              		.global	LD1_param
+ 13308              		.section	.bss.LD1_param,"aw",%nobits
+ 13309              		.align	2
+ 13312              	LD1_param:
+ 13313 0000 00000000 		.space	12
+ 13313      00000000 
+ 13313      00000000 
+ 13314              		.global	Def_setup
+ 13315              		.section	.bss.Def_setup,"aw",%nobits
+ 13316              		.align	2
+ 13319              	Def_setup:
+ 13320 0000 00000000 		.space	18
+ 13320      00000000 
+ 13320      00000000 
+ 13320      00000000 
+ 13320      0000
+ 13321              		.global	Curr_setup
+ 13322              		.section	.bss.Curr_setup,"aw",%nobits
+ 13323              		.align	2
+ 13326              	Curr_setup:
+ 13327 0000 00000000 		.space	18
+ 13327      00000000 
+ 13327      00000000 
+ 13327      00000000 
+ 13327      0000
+ 13328              		.global	LD2_def_setup
+ 13329              		.section	.bss.LD2_def_setup,"aw",%nobits
+ 13330              		.align	2
+ 13333              	LD2_def_setup:
+ 13334 0000 00000000 		.space	16
+ 13334      00000000 
+ 13334      00000000 
+ 13334      00000000 
+ 13335              		.global	LD1_def_setup
+ 13336              		.section	.bss.LD1_def_setup,"aw",%nobits
+ 13337              		.align	2
+ 13340              	LD1_def_setup:
+ 13341 0000 00000000 		.space	16
+ 13341      00000000 
+ 13341      00000000 
+ 13341      00000000 
+ 13342              		.global	LD2_curr_setup
+ 13343              		.section	.bss.LD2_curr_setup,"aw",%nobits
+ 13344              		.align	2
+ 13347              	LD2_curr_setup:
+ 13348 0000 00000000 		.space	16
+ 13348      00000000 
+ 13348      00000000 
+ 13348      00000000 
+ 13349              		.global	LD1_curr_setup
+ 13350              		.section	.bss.LD1_curr_setup,"aw",%nobits
+ 13351              		.align	2
+ 13354              	LD1_curr_setup:
+ 13355 0000 00000000 		.space	16
+ 13355      00000000 
+ 13355      00000000 
+ 13355      00000000 
+ARM GAS  /tmp/ccEQxcUB.s 			page 656
+
+
+ 13356              		.global	sizeoffile
+ 13357              		.section	.bss.sizeoffile,"aw",%nobits
+ 13358              		.align	2
+ 13361              	sizeoffile:
+ 13362 0000 00000000 		.space	4
+ 13363              		.global	fgoto
+ 13364              		.section	.bss.fgoto,"aw",%nobits
+ 13365              		.align	2
+ 13368              	fgoto:
+ 13369 0000 00000000 		.space	4
+ 13370              		.global	test
+ 13371              		.section	.bss.test,"aw",%nobits
+ 13372              		.align	2
+ 13375              	test:
+ 13376 0000 00000000 		.space	4
+ 13377              		.global	fresult
+ 13378              		.section	.bss.fresult,"aw",%nobits
+ 13381              	fresult:
+ 13382 0000 00       		.space	1
+ 13383              		.global	COMMAND
+ 13384              		.section	.bss.COMMAND,"aw",%nobits
+ 13385              		.align	2
+ 13388              	COMMAND:
+ 13389 0000 00000000 		.space	30
+ 13389      00000000 
+ 13389      00000000 
+ 13389      00000000 
+ 13389      00000000 
+ 13390              		.global	Long_Data
+ 13391              		.section	.bss.Long_Data,"aw",%nobits
+ 13392              		.align	2
+ 13395              	Long_Data:
+ 13396 0000 00000000 		.space	30
+ 13396      00000000 
+ 13396      00000000 
+ 13396      00000000 
+ 13396      00000000 
+ 13397              		.global	temp16
+ 13398              		.section	.bss.temp16,"aw",%nobits
+ 13399              		.align	1
+ 13402              	temp16:
+ 13403 0000 0000     		.space	2
+ 13404              		.global	CS_result
+ 13405              		.section	.bss.CS_result,"aw",%nobits
+ 13406              		.align	1
+ 13409              	CS_result:
+ 13410 0000 0000     		.space	2
+ 13411              		.global	UART_header
+ 13412              		.section	.bss.UART_header,"aw",%nobits
+ 13413              		.align	1
+ 13416              	UART_header:
+ 13417 0000 0000     		.space	2
+ 13418              		.global	UART_rec_incr
+ 13419              		.section	.bss.UART_rec_incr,"aw",%nobits
+ 13420              		.align	1
+ 13423              	UART_rec_incr:
+ 13424 0000 0000     		.space	2
+ARM GAS  /tmp/ccEQxcUB.s 			page 657
+
+
+ 13425              		.global	TIM10_coflag
+ 13426              		.section	.bss.TIM10_coflag,"aw",%nobits
+ 13429              	TIM10_coflag:
+ 13430 0000 00       		.space	1
+ 13431              		.global	u_rx_flg
+ 13432              		.section	.bss.u_rx_flg,"aw",%nobits
+ 13435              	u_rx_flg:
+ 13436 0000 00       		.space	1
+ 13437              		.global	u_tx_flg
+ 13438              		.section	.bss.u_tx_flg,"aw",%nobits
+ 13441              	u_tx_flg:
+ 13442 0000 00       		.space	1
+ 13443              		.global	flg_tmt
+ 13444              		.section	.bss.flg_tmt,"aw",%nobits
+ 13447              	flg_tmt:
+ 13448 0000 00       		.space	1
+ 13449              		.global	UART_DATA
+ 13450              		.section	.bss.UART_DATA,"aw",%nobits
+ 13451              		.align	2
+ 13454              	UART_DATA:
+ 13455 0000 00000000 		.space	30
+ 13455      00000000 
+ 13455      00000000 
+ 13455      00000000 
+ 13455      00000000 
+ 13456              		.global	State_Data
+ 13457              		.section	.bss.State_Data,"aw",%nobits
+ 13458              		.align	2
+ 13461              	State_Data:
+ 13462 0000 0000     		.space	2
+ 13463              		.global	UART_transmission_request
+ 13464              		.section	.bss.UART_transmission_request,"aw",%nobits
+ 13467              	UART_transmission_request:
+ 13468 0000 00       		.space	1
+ 13469              		.global	CPU_state_old
+ 13470              		.section	.bss.CPU_state_old,"aw",%nobits
+ 13473              	CPU_state_old:
+ 13474 0000 00       		.space	1
+ 13475              		.global	CPU_state
+ 13476              		.section	.bss.CPU_state,"aw",%nobits
+ 13479              	CPU_state:
+ 13480 0000 00       		.space	1
+ 13481              		.global	uart_buf
+ 13482              		.section	.bss.uart_buf,"aw",%nobits
+ 13485              	uart_buf:
+ 13486 0000 00       		.space	1
+ 13487              		.global	TIM10_period
+ 13488              		.section	.bss.TIM10_period,"aw",%nobits
+ 13489              		.align	2
+ 13492              	TIM10_period:
+ 13493 0000 00000000 		.space	4
+ 13494              		.global	TO10_counter
+ 13495              		.section	.bss.TO10_counter,"aw",%nobits
+ 13496              		.align	2
+ 13499              	TO10_counter:
+ 13500 0000 00000000 		.space	4
+ 13501              		.global	TO10
+ARM GAS  /tmp/ccEQxcUB.s 			page 658
+
+
+ 13502              		.section	.bss.TO10,"aw",%nobits
+ 13503              		.align	2
+ 13506              	TO10:
+ 13507 0000 00000000 		.space	4
+ 13508              		.global	TO7_PID
+ 13509              		.section	.bss.TO7_PID,"aw",%nobits
+ 13510              		.align	2
+ 13513              	TO7_PID:
+ 13514 0000 00000000 		.space	4
+ 13515              		.global	TO7_before
+ 13516              		.section	.bss.TO7_before,"aw",%nobits
+ 13517              		.align	2
+ 13520              	TO7_before:
+ 13521 0000 00000000 		.space	4
+ 13522              		.global	TO7
+ 13523              		.section	.bss.TO7,"aw",%nobits
+ 13524              		.align	2
+ 13527              	TO7:
+ 13528 0000 00000000 		.space	4
+ 13529              		.global	temp32
+ 13530              		.section	.bss.temp32,"aw",%nobits
+ 13531              		.align	2
+ 13534              	temp32:
+ 13535 0000 00000000 		.space	4
+ 13536              		.global	SD_SLIDE
+ 13537              		.section	.bss.SD_SLIDE,"aw",%nobits
+ 13538              		.align	2
+ 13541              	SD_SLIDE:
+ 13542 0000 00000000 		.space	4
+ 13543              		.global	SD_SEEK
+ 13544              		.section	.bss.SD_SEEK,"aw",%nobits
+ 13545              		.align	2
+ 13548              	SD_SEEK:
+ 13549 0000 00000000 		.space	4
+ 13550              		.global	TO6_uart
+ 13551              		.section	.bss.TO6_uart,"aw",%nobits
+ 13552              		.align	2
+ 13555              	TO6_uart:
+ 13556 0000 00000000 		.space	4
+ 13557              		.global	TO6_stop
+ 13558              		.section	.bss.TO6_stop,"aw",%nobits
+ 13559              		.align	2
+ 13562              	TO6_stop:
+ 13563 0000 00000000 		.space	4
+ 13564              		.global	TO6_before
+ 13565              		.section	.bss.TO6_before,"aw",%nobits
+ 13566              		.align	2
+ 13569              	TO6_before:
+ 13570 0000 00000000 		.space	4
+ 13571              		.global	TO6
+ 13572              		.section	.bss.TO6,"aw",%nobits
+ 13573              		.align	2
+ 13576              	TO6:
+ 13577 0000 00000000 		.space	4
+ 13578              		.global	huart8
+ 13579              		.section	.bss.huart8,"aw",%nobits
+ 13580              		.align	2
+ARM GAS  /tmp/ccEQxcUB.s 			page 659
+
+
+ 13583              	huart8:
+ 13584 0000 00000000 		.space	136
+ 13584      00000000 
+ 13584      00000000 
+ 13584      00000000 
+ 13584      00000000 
+ 13585              		.global	htim11
+ 13586              		.section	.bss.htim11,"aw",%nobits
+ 13587              		.align	2
+ 13590              	htim11:
+ 13591 0000 00000000 		.space	76
+ 13591      00000000 
+ 13591      00000000 
+ 13591      00000000 
+ 13591      00000000 
+ 13592              		.global	htim10
+ 13593              		.section	.bss.htim10,"aw",%nobits
+ 13594              		.align	2
+ 13597              	htim10:
+ 13598 0000 00000000 		.space	76
+ 13598      00000000 
+ 13598      00000000 
+ 13598      00000000 
+ 13598      00000000 
+ 13599              		.global	htim1
+ 13600              		.section	.bss.htim1,"aw",%nobits
+ 13601              		.align	2
+ 13604              	htim1:
+ 13605 0000 00000000 		.space	76
+ 13605      00000000 
+ 13605      00000000 
+ 13605      00000000 
+ 13605      00000000 
+ 13606              		.global	htim8
+ 13607              		.section	.bss.htim8,"aw",%nobits
+ 13608              		.align	2
+ 13611              	htim8:
+ 13612 0000 00000000 		.space	76
+ 13612      00000000 
+ 13612      00000000 
+ 13612      00000000 
+ 13612      00000000 
+ 13613              		.global	htim4
+ 13614              		.section	.bss.htim4,"aw",%nobits
+ 13615              		.align	2
+ 13618              	htim4:
+ 13619 0000 00000000 		.space	76
+ 13619      00000000 
+ 13619      00000000 
+ 13619      00000000 
+ 13619      00000000 
+ 13620              		.global	hsd1
+ 13621              		.section	.bss.hsd1,"aw",%nobits
+ 13622              		.align	2
+ 13625              	hsd1:
+ 13626 0000 00000000 		.space	132
+ 13626      00000000 
+ARM GAS  /tmp/ccEQxcUB.s 			page 660
+
+
+ 13626      00000000 
+ 13626      00000000 
+ 13626      00000000 
+ 13627              		.global	hadc3
+ 13628              		.section	.bss.hadc3,"aw",%nobits
+ 13629              		.align	2
+ 13632              	hadc3:
+ 13633 0000 00000000 		.space	72
+ 13633      00000000 
+ 13633      00000000 
+ 13633      00000000 
+ 13633      00000000 
+ 13634              		.global	hadc1
+ 13635              		.section	.bss.hadc1,"aw",%nobits
+ 13636              		.align	2
+ 13639              	hadc1:
+ 13640 0000 00000000 		.space	72
+ 13640      00000000 
+ 13640      00000000 
+ 13640      00000000 
+ 13640      00000000 
+ 13641              		.text
+ 13642              	.Letext0:
+ 13643              		.file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
+ 13644              		.file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
+ 13645              		.file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
+ 13646              		.file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
+ 13647              		.file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
+ 13648              		.file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h"
+ 13649              		.file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
+ 13650              		.file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
+ 13651              		.file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
+ 13652              		.file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
+ 13653              		.file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
+ 13654              		.file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
+ 13655              		.file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
+ 13656              		.file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
+ 13657              		.file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h"
+ 13658              		.file 24 "Inc/main.h"
+ 13659              		.file 25 "Middlewares/Third_Party/FatFs/src/ff.h"
+ 13660              		.file 26 "Inc/File_Handling.h"
+ 13661              		.file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h"
+ 13662              		.file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
+ 13663              		.file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h"
+ 13664              		.file 30 "Inc/fatfs.h"
+ 13665              		.file 31 "<built-in>"
+ARM GAS  /tmp/ccEQxcUB.s 			page 661
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 main.c
-     /tmp/ccwR4KB7.s:20     .text.NVIC_EncodePriority:00000000 $t
-     /tmp/ccwR4KB7.s:25     .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
-     /tmp/ccwR4KB7.s:88     .text.MX_SDMMC1_SD_Init:00000000 $t
-     /tmp/ccwR4KB7.s:93     .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init
-     /tmp/ccwR4KB7.s:131    .text.MX_SDMMC1_SD_Init:0000001c $d
-     /tmp/ccwR4KB7.s:12579  .bss.hsd1:00000000 hsd1
-     /tmp/ccwR4KB7.s:137    .text.MX_DMA_Init:00000000 $t
-     /tmp/ccwR4KB7.s:142    .text.MX_DMA_Init:00000000 MX_DMA_Init
-     /tmp/ccwR4KB7.s:238    .text.MX_DMA_Init:0000003c $d
-     /tmp/ccwR4KB7.s:245    .text.Decode_task:00000000 $t
-     /tmp/ccwR4KB7.s:250    .text.Decode_task:00000000 Decode_task
-     /tmp/ccwR4KB7.s:527    .text.Decode_task:00000150 $d
-     /tmp/ccwR4KB7.s:12252  .bss.task:00000000 task
-     /tmp/ccwR4KB7.s:12460  .bss.TO10_counter:00000000 TO10_counter
-     /tmp/ccwR4KB7.s:537    .text.PID_Controller_Temp:00000000 $t
-     /tmp/ccwR4KB7.s:542    .text.PID_Controller_Temp:00000000 PID_Controller_Temp
-     /tmp/ccwR4KB7.s:711    .text.PID_Controller_Temp:000000cc $d
-     /tmp/ccwR4KB7.s:12488  .bss.TO7:00000000 TO7
-     /tmp/ccwR4KB7.s:12474  .bss.TO7_PID:00000000 TO7_PID
-     /tmp/ccwR4KB7.s:721    .text.AD9102_WriteReg:00000000 $t
-     /tmp/ccwR4KB7.s:726    .text.AD9102_WriteReg:00000000 AD9102_WriteReg
-     /tmp/ccwR4KB7.s:973    .text.AD9102_WriteReg:000000a8 $d
-     /tmp/ccwR4KB7.s:979    .text.AD9102_WriteRegTable:00000000 $t
-     /tmp/ccwR4KB7.s:984    .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable
-     /tmp/ccwR4KB7.s:1035   .text.AD9102_WriteRegTable:00000024 $d
-     /tmp/ccwR4KB7.s:12180  .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr
-     /tmp/ccwR4KB7.s:1040   .text.AD9102_LoadSramRamp:00000000 $t
-     /tmp/ccwR4KB7.s:1045   .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp
-     /tmp/ccwR4KB7.s:1296   .text.AD9102_LoadSramRamp:000000c0 $d
-     /tmp/ccwR4KB7.s:1301   .text.AD9102_Init:00000000 $t
-     /tmp/ccwR4KB7.s:1306   .text.AD9102_Init:00000000 AD9102_Init
-     /tmp/ccwR4KB7.s:1387   .text.AD9102_Init:00000064 $d
-     /tmp/ccwR4KB7.s:12109  .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval
-     /tmp/ccwR4KB7.s:1395   .text.AD9102_ReadReg:00000000 $t
-     /tmp/ccwR4KB7.s:1400   .text.AD9102_ReadReg:00000000 AD9102_ReadReg
-     /tmp/ccwR4KB7.s:1655   .text.AD9102_ReadReg:000000a8 $d
-     /tmp/ccwR4KB7.s:1661   .text.AD9102_CheckFlagsSram:00000000 $t
-     /tmp/ccwR4KB7.s:1666   .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram
-     /tmp/ccwR4KB7.s:1964   .text.AD9102_CheckFlags:00000000 $t
-     /tmp/ccwR4KB7.s:1969   .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags
-     /tmp/ccwR4KB7.s:2199   .text.AD9102_ApplySram:00000000 $t
-     /tmp/ccwR4KB7.s:2204   .text.AD9102_ApplySram:00000000 AD9102_ApplySram
-     /tmp/ccwR4KB7.s:2457   .text.AD9102_ApplySram:0000012c $d
-     /tmp/ccwR4KB7.s:12038  .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval
-     /tmp/ccwR4KB7.s:2463   .text.AD9102_Apply:00000000 $t
-     /tmp/ccwR4KB7.s:2468   .text.AD9102_Apply:00000000 AD9102_Apply
-     /tmp/ccwR4KB7.s:2639   .text.AD9102_Apply:000000b4 $d
-     /tmp/ccwR4KB7.s:2644   .text.OUT_trigger:00000000 $t
-     /tmp/ccwR4KB7.s:2649   .text.OUT_trigger:00000000 OUT_trigger
-     /tmp/ccwR4KB7.s:2667   .text.OUT_trigger:0000000a $d
-     /tmp/ccwR4KB7.s:2677   .text.OUT_trigger:00000014 $t
-     /tmp/ccwR4KB7.s:2873   .text.OUT_trigger:0000011c $d
-     /tmp/ccwR4KB7.s:2879   .text.MPhD_T:00000000 $t
-     /tmp/ccwR4KB7.s:2884   .text.MPhD_T:00000000 MPhD_T
-     /tmp/ccwR4KB7.s:2968   .text.MPhD_T:00000056 $d
-ARM GAS  /tmp/ccwR4KB7.s 			page 633
+     /tmp/ccEQxcUB.s:20     .text.NVIC_EncodePriority:00000000 $t
+     /tmp/ccEQxcUB.s:25     .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
+     /tmp/ccEQxcUB.s:88     .text.MX_SDMMC1_SD_Init:00000000 $t
+     /tmp/ccEQxcUB.s:93     .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init
+     /tmp/ccEQxcUB.s:131    .text.MX_SDMMC1_SD_Init:0000001c $d
+     /tmp/ccEQxcUB.s:13625  .bss.hsd1:00000000 hsd1
+     /tmp/ccEQxcUB.s:137    .text.MX_DMA_Init:00000000 $t
+     /tmp/ccEQxcUB.s:142    .text.MX_DMA_Init:00000000 MX_DMA_Init
+     /tmp/ccEQxcUB.s:238    .text.MX_DMA_Init:0000003c $d
+     /tmp/ccEQxcUB.s:245    .text.Decode_task:00000000 $t
+     /tmp/ccEQxcUB.s:250    .text.Decode_task:00000000 Decode_task
+     /tmp/ccEQxcUB.s:527    .text.Decode_task:00000150 $d
+     /tmp/ccEQxcUB.s:13291  .bss.task:00000000 task
+     /tmp/ccEQxcUB.s:13499  .bss.TO10_counter:00000000 TO10_counter
+     /tmp/ccEQxcUB.s:537    .text.SPI2_SetMode:00000000 $t
+     /tmp/ccEQxcUB.s:542    .text.SPI2_SetMode:00000000 SPI2_SetMode
+     /tmp/ccEQxcUB.s:650    .text.SPI2_SetMode:00000040 $d
+     /tmp/ccEQxcUB.s:655    .text.PID_Controller_Temp:00000000 $t
+     /tmp/ccEQxcUB.s:660    .text.PID_Controller_Temp:00000000 PID_Controller_Temp
+     /tmp/ccEQxcUB.s:829    .text.PID_Controller_Temp:000000cc $d
+     /tmp/ccEQxcUB.s:13527  .bss.TO7:00000000 TO7
+     /tmp/ccEQxcUB.s:13513  .bss.TO7_PID:00000000 TO7_PID
+     /tmp/ccEQxcUB.s:839    .text.AD9102_WriteReg:00000000 $t
+     /tmp/ccEQxcUB.s:844    .text.AD9102_WriteReg:00000000 AD9102_WriteReg
+     /tmp/ccEQxcUB.s:1107   .text.AD9102_WriteReg:000000c8 $d
+     /tmp/ccEQxcUB.s:1114   .text.AD9102_WriteRegTable:00000000 $t
+     /tmp/ccEQxcUB.s:1119   .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable
+     /tmp/ccEQxcUB.s:1170   .text.AD9102_WriteRegTable:00000024 $d
+     /tmp/ccEQxcUB.s:13219  .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr
+     /tmp/ccEQxcUB.s:1175   .text.AD9102_LoadSramRamp:00000000 $t
+     /tmp/ccEQxcUB.s:1180   .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp
+     /tmp/ccEQxcUB.s:1464   .text.AD9102_LoadSramRamp:000000d4 $d
+     /tmp/ccEQxcUB.s:1469   .text.AD9102_Init:00000000 $t
+     /tmp/ccEQxcUB.s:1474   .text.AD9102_Init:00000000 AD9102_Init
+     /tmp/ccEQxcUB.s:1555   .text.AD9102_Init:00000064 $d
+     /tmp/ccEQxcUB.s:13148  .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval
+     /tmp/ccEQxcUB.s:1563   .text.AD9102_ReadReg:00000000 $t
+     /tmp/ccEQxcUB.s:1568   .text.AD9102_ReadReg:00000000 AD9102_ReadReg
+     /tmp/ccEQxcUB.s:1840   .text.AD9102_ReadReg:000000c8 $d
+     /tmp/ccEQxcUB.s:1847   .text.AD9102_CheckFlagsSram:00000000 $t
+     /tmp/ccEQxcUB.s:1852   .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram
+     /tmp/ccEQxcUB.s:2150   .text.AD9102_CheckFlags:00000000 $t
+     /tmp/ccEQxcUB.s:2155   .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags
+     /tmp/ccEQxcUB.s:2385   .text.AD9102_ApplySram:00000000 $t
+     /tmp/ccEQxcUB.s:2390   .text.AD9102_ApplySram:00000000 AD9102_ApplySram
+     /tmp/ccEQxcUB.s:2654   .text.AD9102_ApplySram:0000013c $d
+     /tmp/ccEQxcUB.s:13077  .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval
+     /tmp/ccEQxcUB.s:2660   .text.AD9102_Apply:00000000 $t
+     /tmp/ccEQxcUB.s:2665   .text.AD9102_Apply:00000000 AD9102_Apply
+     /tmp/ccEQxcUB.s:2836   .text.AD9102_Apply:000000b4 $d
+     /tmp/ccEQxcUB.s:2841   .text.AD9833_WriteWord:00000000 $t
+     /tmp/ccEQxcUB.s:2846   .text.AD9833_WriteWord:00000000 AD9833_WriteWord
+     /tmp/ccEQxcUB.s:2994   .text.AD9833_WriteWord:00000088 $d
+     /tmp/ccEQxcUB.s:3001   .text.AD9833_Apply:00000000 $t
+     /tmp/ccEQxcUB.s:3006   .text.AD9833_Apply:00000000 AD9833_Apply
+ARM GAS  /tmp/ccEQxcUB.s 			page 662
 
 
-     /tmp/ccwR4KB7.s:2972   .text.MPhD_T:0000005a $t
-     /tmp/ccwR4KB7.s:3515   .text.MPhD_T:00000210 $d
-     /tmp/ccwR4KB7.s:3525   .text.Stop_TIM10:00000000 $t
-     /tmp/ccwR4KB7.s:3530   .text.Stop_TIM10:00000000 Stop_TIM10
-     /tmp/ccwR4KB7.s:3559   .text.Stop_TIM10:00000014 $d
-     /tmp/ccwR4KB7.s:12558  .bss.htim10:00000000 htim10
-     /tmp/ccwR4KB7.s:12390  .bss.TIM10_coflag:00000000 TIM10_coflag
-     /tmp/ccwR4KB7.s:12467  .bss.TO10:00000000 TO10
-     /tmp/ccwR4KB7.s:3566   .text.MX_GPIO_Init:00000000 $t
-     /tmp/ccwR4KB7.s:3571   .text.MX_GPIO_Init:00000000 MX_GPIO_Init
-     /tmp/ccwR4KB7.s:4032   .text.MX_GPIO_Init:0000023c $d
-     /tmp/ccwR4KB7.s:4044   .text.MX_SPI4_Init:00000000 $t
-     /tmp/ccwR4KB7.s:4049   .text.MX_SPI4_Init:00000000 MX_SPI4_Init
-     /tmp/ccwR4KB7.s:4254   .text.MX_SPI4_Init:000000c8 $d
-     /tmp/ccwR4KB7.s:4261   .text.MX_SPI2_Init:00000000 $t
-     /tmp/ccwR4KB7.s:4266   .text.MX_SPI2_Init:00000000 MX_SPI2_Init
-     /tmp/ccwR4KB7.s:4494   .text.MX_SPI2_Init:000000dc $d
-     /tmp/ccwR4KB7.s:4501   .text.MX_SPI5_Init:00000000 $t
-     /tmp/ccwR4KB7.s:4506   .text.MX_SPI5_Init:00000000 MX_SPI5_Init
-     /tmp/ccwR4KB7.s:4711   .text.MX_SPI5_Init:000000c4 $d
-     /tmp/ccwR4KB7.s:4718   .text.MX_SPI6_Init:00000000 $t
-     /tmp/ccwR4KB7.s:4723   .text.MX_SPI6_Init:00000000 MX_SPI6_Init
-     /tmp/ccwR4KB7.s:4928   .text.MX_SPI6_Init:000000c4 $d
-     /tmp/ccwR4KB7.s:4935   .text.MX_TIM2_Init:00000000 $t
-     /tmp/ccwR4KB7.s:4940   .text.MX_TIM2_Init:00000000 MX_TIM2_Init
-     /tmp/ccwR4KB7.s:5118   .text.MX_TIM2_Init:00000088 $d
-     /tmp/ccwR4KB7.s:5127   .text.MX_TIM5_Init:00000000 $t
-     /tmp/ccwR4KB7.s:5132   .text.MX_TIM5_Init:00000000 MX_TIM5_Init
-     /tmp/ccwR4KB7.s:5309   .text.MX_TIM5_Init:00000084 $d
-     /tmp/ccwR4KB7.s:5318   .text.MX_TIM7_Init:00000000 $t
-     /tmp/ccwR4KB7.s:5323   .text.MX_TIM7_Init:00000000 MX_TIM7_Init
-     /tmp/ccwR4KB7.s:5484   .text.MX_TIM7_Init:0000007c $d
-     /tmp/ccwR4KB7.s:5492   .text.MX_TIM6_Init:00000000 $t
-     /tmp/ccwR4KB7.s:5497   .text.MX_TIM6_Init:00000000 MX_TIM6_Init
-     /tmp/ccwR4KB7.s:5658   .text.MX_TIM6_Init:0000007c $d
-     /tmp/ccwR4KB7.s:5666   .rodata.Init_params.str1.4:00000000 $d
-     /tmp/ccwR4KB7.s:5673   .text.Init_params:00000000 $t
-     /tmp/ccwR4KB7.s:5678   .text.Init_params:00000000 Init_params
-     /tmp/ccwR4KB7.s:6314   .text.Init_params:00000284 $d
-     /tmp/ccwR4KB7.s:12537  .bss.TO6:00000000 TO6
-     /tmp/ccwR4KB7.s:12481  .bss.TO7_before:00000000 TO7_before
-     /tmp/ccwR4KB7.s:12530  .bss.TO6_before:00000000 TO6_before
-     /tmp/ccwR4KB7.s:12516  .bss.TO6_uart:00000000 TO6_uart
-     /tmp/ccwR4KB7.s:12408  .bss.flg_tmt:00000000 flg_tmt
-     /tmp/ccwR4KB7.s:12384  .bss.UART_rec_incr:00000000 UART_rec_incr
-     /tmp/ccwR4KB7.s:12329  .bss.fgoto:00000000 fgoto
-     /tmp/ccwR4KB7.s:12322  .bss.sizeoffile:00000000 sizeoffile
-     /tmp/ccwR4KB7.s:12402  .bss.u_tx_flg:00000000 u_tx_flg
-     /tmp/ccwR4KB7.s:12396  .bss.u_rx_flg:00000000 u_rx_flg
-     /tmp/ccwR4KB7.s:12356  .bss.Long_Data:00000000 Long_Data
-     /tmp/ccwR4KB7.s:12280  .bss.Def_setup:00000000 Def_setup
-     /tmp/ccwR4KB7.s:12301  .bss.LD1_def_setup:00000000 LD1_def_setup
-     /tmp/ccwR4KB7.s:12294  .bss.LD2_def_setup:00000000 LD2_def_setup
-     /tmp/ccwR4KB7.s:12287  .bss.Curr_setup:00000000 Curr_setup
-     /tmp/ccwR4KB7.s:12315  .bss.LD1_curr_setup:00000000 LD1_curr_setup
-     /tmp/ccwR4KB7.s:12308  .bss.LD2_curr_setup:00000000 LD2_curr_setup
-     /tmp/ccwR4KB7.s:12415  .bss.UART_DATA:00000000 UART_DATA
-ARM GAS  /tmp/ccwR4KB7.s 			page 634
+     /tmp/ccEQxcUB.s:3091   .text.OUT_trigger:00000000 $t
+     /tmp/ccEQxcUB.s:3096   .text.OUT_trigger:00000000 OUT_trigger
+     /tmp/ccEQxcUB.s:3114   .text.OUT_trigger:0000000a $d
+     /tmp/ccEQxcUB.s:3124   .text.OUT_trigger:00000014 $t
+     /tmp/ccEQxcUB.s:3320   .text.OUT_trigger:0000011c $d
+     /tmp/ccEQxcUB.s:3326   .text.MPhD_T:00000000 $t
+     /tmp/ccEQxcUB.s:3331   .text.MPhD_T:00000000 MPhD_T
+     /tmp/ccEQxcUB.s:3415   .text.MPhD_T:00000056 $d
+     /tmp/ccEQxcUB.s:3419   .text.MPhD_T:0000005a $t
+     /tmp/ccEQxcUB.s:3962   .text.MPhD_T:00000210 $d
+     /tmp/ccEQxcUB.s:3972   .text.Stop_TIM10:00000000 $t
+     /tmp/ccEQxcUB.s:3977   .text.Stop_TIM10:00000000 Stop_TIM10
+     /tmp/ccEQxcUB.s:4006   .text.Stop_TIM10:00000014 $d
+     /tmp/ccEQxcUB.s:13597  .bss.htim10:00000000 htim10
+     /tmp/ccEQxcUB.s:13429  .bss.TIM10_coflag:00000000 TIM10_coflag
+     /tmp/ccEQxcUB.s:13506  .bss.TO10:00000000 TO10
+     /tmp/ccEQxcUB.s:4013   .text.MX_GPIO_Init:00000000 $t
+     /tmp/ccEQxcUB.s:4018   .text.MX_GPIO_Init:00000000 MX_GPIO_Init
+     /tmp/ccEQxcUB.s:4516   .text.MX_GPIO_Init:00000274 $d
+     /tmp/ccEQxcUB.s:4528   .text.MX_SPI4_Init:00000000 $t
+     /tmp/ccEQxcUB.s:4533   .text.MX_SPI4_Init:00000000 MX_SPI4_Init
+     /tmp/ccEQxcUB.s:4738   .text.MX_SPI4_Init:000000c8 $d
+     /tmp/ccEQxcUB.s:4745   .text.MX_SPI2_Init:00000000 $t
+     /tmp/ccEQxcUB.s:4750   .text.MX_SPI2_Init:00000000 MX_SPI2_Init
+     /tmp/ccEQxcUB.s:4978   .text.MX_SPI2_Init:000000dc $d
+     /tmp/ccEQxcUB.s:4985   .text.MX_SPI5_Init:00000000 $t
+     /tmp/ccEQxcUB.s:4990   .text.MX_SPI5_Init:00000000 MX_SPI5_Init
+     /tmp/ccEQxcUB.s:5195   .text.MX_SPI5_Init:000000c4 $d
+     /tmp/ccEQxcUB.s:5202   .text.MX_SPI6_Init:00000000 $t
+     /tmp/ccEQxcUB.s:5207   .text.MX_SPI6_Init:00000000 MX_SPI6_Init
+     /tmp/ccEQxcUB.s:5412   .text.MX_SPI6_Init:000000c4 $d
+     /tmp/ccEQxcUB.s:5419   .text.MX_TIM2_Init:00000000 $t
+     /tmp/ccEQxcUB.s:5424   .text.MX_TIM2_Init:00000000 MX_TIM2_Init
+     /tmp/ccEQxcUB.s:5602   .text.MX_TIM2_Init:00000088 $d
+     /tmp/ccEQxcUB.s:5611   .text.MX_TIM5_Init:00000000 $t
+     /tmp/ccEQxcUB.s:5616   .text.MX_TIM5_Init:00000000 MX_TIM5_Init
+     /tmp/ccEQxcUB.s:5793   .text.MX_TIM5_Init:00000084 $d
+     /tmp/ccEQxcUB.s:5802   .text.MX_TIM7_Init:00000000 $t
+     /tmp/ccEQxcUB.s:5807   .text.MX_TIM7_Init:00000000 MX_TIM7_Init
+     /tmp/ccEQxcUB.s:5968   .text.MX_TIM7_Init:0000007c $d
+     /tmp/ccEQxcUB.s:5976   .text.MX_TIM6_Init:00000000 $t
+     /tmp/ccEQxcUB.s:5981   .text.MX_TIM6_Init:00000000 MX_TIM6_Init
+     /tmp/ccEQxcUB.s:6142   .text.MX_TIM6_Init:0000007c $d
+     /tmp/ccEQxcUB.s:6150   .rodata.Init_params.str1.4:00000000 $d
+     /tmp/ccEQxcUB.s:6157   .text.Init_params:00000000 $t
+     /tmp/ccEQxcUB.s:6162   .text.Init_params:00000000 Init_params
+     /tmp/ccEQxcUB.s:6798   .text.Init_params:00000284 $d
+     /tmp/ccEQxcUB.s:13576  .bss.TO6:00000000 TO6
+     /tmp/ccEQxcUB.s:13520  .bss.TO7_before:00000000 TO7_before
+     /tmp/ccEQxcUB.s:13569  .bss.TO6_before:00000000 TO6_before
+     /tmp/ccEQxcUB.s:13555  .bss.TO6_uart:00000000 TO6_uart
+     /tmp/ccEQxcUB.s:13447  .bss.flg_tmt:00000000 flg_tmt
+     /tmp/ccEQxcUB.s:13423  .bss.UART_rec_incr:00000000 UART_rec_incr
+     /tmp/ccEQxcUB.s:13368  .bss.fgoto:00000000 fgoto
+     /tmp/ccEQxcUB.s:13361  .bss.sizeoffile:00000000 sizeoffile
+     /tmp/ccEQxcUB.s:13441  .bss.u_tx_flg:00000000 u_tx_flg
+     /tmp/ccEQxcUB.s:13435  .bss.u_rx_flg:00000000 u_rx_flg
+ARM GAS  /tmp/ccEQxcUB.s 			page 663
 
 
-     /tmp/ccwR4KB7.s:12509  .bss.SD_SEEK:00000000 SD_SEEK
-     /tmp/ccwR4KB7.s:12502  .bss.SD_SLIDE:00000000 SD_SLIDE
-     /tmp/ccwR4KB7.s:12336  .bss.test:00000000 test
-     /tmp/ccwR4KB7.s:12440  .bss.CPU_state:00000000 CPU_state
-     /tmp/ccwR4KB7.s:12349  .bss.COMMAND:00000000 COMMAND
-     /tmp/ccwR4KB7.s:6353   .text.Get_ADC:00000000 $t
-     /tmp/ccwR4KB7.s:6358   .text.Get_ADC:00000000 Get_ADC
-     /tmp/ccwR4KB7.s:6378   .text.Get_ADC:0000000c $d
-     /tmp/ccwR4KB7.s:6384   .text.Get_ADC:00000012 $t
-     /tmp/ccwR4KB7.s:6482   .text.Get_ADC:00000068 $d
-     /tmp/ccwR4KB7.s:12593  .bss.hadc1:00000000 hadc1
-     /tmp/ccwR4KB7.s:12586  .bss.hadc3:00000000 hadc3
-     /tmp/ccwR4KB7.s:6488   .text.Set_LTEC:00000000 $t
-     /tmp/ccwR4KB7.s:6494   .text.Set_LTEC:00000000 Set_LTEC
-     /tmp/ccwR4KB7.s:6525   .text.Set_LTEC:00000018 $d
-     /tmp/ccwR4KB7.s:6529   .text.Set_LTEC:0000001c $t
-     /tmp/ccwR4KB7.s:6951   .text.Set_LTEC:00000154 $d
-     /tmp/ccwR4KB7.s:6959   .text.Decode_uart:00000000 $t
-     /tmp/ccwR4KB7.s:6964   .text.Decode_uart:00000000 Decode_uart
-     /tmp/ccwR4KB7.s:7527   .text.Decode_uart:000002cc $d
-     /tmp/ccwR4KB7.s:7542   .text.Advanced_Controller_Temp:00000000 $t
-     /tmp/ccwR4KB7.s:7548   .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp
-     /tmp/ccwR4KB7.s:7717   .text.Advanced_Controller_Temp:000000cc $d
-     /tmp/ccwR4KB7.s:7727   .text.CalculateChecksum:00000000 $t
-     /tmp/ccwR4KB7.s:7733   .text.CalculateChecksum:00000000 CalculateChecksum
-     /tmp/ccwR4KB7.s:7778   .text.CheckChecksum:00000000 $t
-     /tmp/ccwR4KB7.s:7784   .text.CheckChecksum:00000000 CheckChecksum
-     /tmp/ccwR4KB7.s:7846   .text.CheckChecksum:0000003c $d
-     /tmp/ccwR4KB7.s:12377  .bss.UART_header:00000000 UART_header
-     /tmp/ccwR4KB7.s:12370  .bss.CS_result:00000000 CS_result
-     /tmp/ccwR4KB7.s:7853   .rodata.SD_SAVE.str1.4:00000000 $d
-     /tmp/ccwR4KB7.s:7857   .text.SD_SAVE:00000000 $t
-     /tmp/ccwR4KB7.s:7863   .text.SD_SAVE:00000000 SD_SAVE
-     /tmp/ccwR4KB7.s:7932   .text.SD_SAVE:00000030 $d
-     /tmp/ccwR4KB7.s:7939   .text.SD_READ:00000000 $t
-     /tmp/ccwR4KB7.s:7945   .text.SD_READ:00000000 SD_READ
-     /tmp/ccwR4KB7.s:8023   .text.SD_READ:0000003c $d
-     /tmp/ccwR4KB7.s:8031   .text.SD_REMOVE:00000000 $t
-     /tmp/ccwR4KB7.s:8037   .text.SD_REMOVE:00000000 SD_REMOVE
-     /tmp/ccwR4KB7.s:8105   .text.SD_REMOVE:00000034 $d
-     /tmp/ccwR4KB7.s:8112   .text.USART_TX:00000000 $t
-     /tmp/ccwR4KB7.s:8118   .text.USART_TX:00000000 USART_TX
-     /tmp/ccwR4KB7.s:8193   .text.USART_TX:00000028 $d
-     /tmp/ccwR4KB7.s:8198   .text.USART_TX_DMA:00000000 $t
-     /tmp/ccwR4KB7.s:8204   .text.USART_TX_DMA:00000000 USART_TX_DMA
-     /tmp/ccwR4KB7.s:8273   .text.USART_TX_DMA:00000038 $d
-     /tmp/ccwR4KB7.s:8279   .text.Error_Handler:00000000 $t
-     /tmp/ccwR4KB7.s:8285   .text.Error_Handler:00000000 Error_Handler
-     /tmp/ccwR4KB7.s:8316   .text.MX_ADC1_Init:00000000 $t
-     /tmp/ccwR4KB7.s:8321   .text.MX_ADC1_Init:00000000 MX_ADC1_Init
-     /tmp/ccwR4KB7.s:8510   .text.MX_ADC1_Init:000000bc $d
-     /tmp/ccwR4KB7.s:8517   .text.MX_ADC3_Init:00000000 $t
-     /tmp/ccwR4KB7.s:8522   .text.MX_ADC3_Init:00000000 MX_ADC3_Init
-     /tmp/ccwR4KB7.s:8629   .text.MX_ADC3_Init:00000060 $d
-     /tmp/ccwR4KB7.s:8636   .text.MX_USART1_UART_Init:00000000 $t
-     /tmp/ccwR4KB7.s:8641   .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
-     /tmp/ccwR4KB7.s:9040   .text.MX_USART1_UART_Init:0000017c $d
-ARM GAS  /tmp/ccwR4KB7.s 			page 635
+     /tmp/ccEQxcUB.s:13395  .bss.Long_Data:00000000 Long_Data
+     /tmp/ccEQxcUB.s:13319  .bss.Def_setup:00000000 Def_setup
+     /tmp/ccEQxcUB.s:13340  .bss.LD1_def_setup:00000000 LD1_def_setup
+     /tmp/ccEQxcUB.s:13333  .bss.LD2_def_setup:00000000 LD2_def_setup
+     /tmp/ccEQxcUB.s:13326  .bss.Curr_setup:00000000 Curr_setup
+     /tmp/ccEQxcUB.s:13354  .bss.LD1_curr_setup:00000000 LD1_curr_setup
+     /tmp/ccEQxcUB.s:13347  .bss.LD2_curr_setup:00000000 LD2_curr_setup
+     /tmp/ccEQxcUB.s:13454  .bss.UART_DATA:00000000 UART_DATA
+     /tmp/ccEQxcUB.s:13548  .bss.SD_SEEK:00000000 SD_SEEK
+     /tmp/ccEQxcUB.s:13541  .bss.SD_SLIDE:00000000 SD_SLIDE
+     /tmp/ccEQxcUB.s:13375  .bss.test:00000000 test
+     /tmp/ccEQxcUB.s:13479  .bss.CPU_state:00000000 CPU_state
+     /tmp/ccEQxcUB.s:13388  .bss.COMMAND:00000000 COMMAND
+     /tmp/ccEQxcUB.s:6837   .text.DS1809_Pulse:00000000 $t
+     /tmp/ccEQxcUB.s:6842   .text.DS1809_Pulse:00000000 DS1809_Pulse
+     /tmp/ccEQxcUB.s:6951   .text.DS1809_Pulse:00000068 $d
+     /tmp/ccEQxcUB.s:6956   .text.Get_ADC:00000000 $t
+     /tmp/ccEQxcUB.s:6961   .text.Get_ADC:00000000 Get_ADC
+     /tmp/ccEQxcUB.s:6981   .text.Get_ADC:0000000c $d
+     /tmp/ccEQxcUB.s:6987   .text.Get_ADC:00000012 $t
+     /tmp/ccEQxcUB.s:7085   .text.Get_ADC:00000068 $d
+     /tmp/ccEQxcUB.s:13639  .bss.hadc1:00000000 hadc1
+     /tmp/ccEQxcUB.s:13632  .bss.hadc3:00000000 hadc3
+     /tmp/ccEQxcUB.s:7091   .text.Set_LTEC:00000000 $t
+     /tmp/ccEQxcUB.s:7097   .text.Set_LTEC:00000000 Set_LTEC
+     /tmp/ccEQxcUB.s:7131   .text.Set_LTEC:00000018 $d
+     /tmp/ccEQxcUB.s:7136   .text.Set_LTEC:0000001c $t
+     /tmp/ccEQxcUB.s:7555   .text.Set_LTEC:00000164 $d
+     /tmp/ccEQxcUB.s:7564   .text.Decode_uart:00000000 $t
+     /tmp/ccEQxcUB.s:7569   .text.Decode_uart:00000000 Decode_uart
+     /tmp/ccEQxcUB.s:8132   .text.Decode_uart:000002cc $d
+     /tmp/ccEQxcUB.s:8147   .text.Advanced_Controller_Temp:00000000 $t
+     /tmp/ccEQxcUB.s:8153   .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp
+     /tmp/ccEQxcUB.s:8322   .text.Advanced_Controller_Temp:000000cc $d
+     /tmp/ccEQxcUB.s:8332   .text.CalculateChecksum:00000000 $t
+     /tmp/ccEQxcUB.s:8338   .text.CalculateChecksum:00000000 CalculateChecksum
+     /tmp/ccEQxcUB.s:8383   .text.CheckChecksum:00000000 $t
+     /tmp/ccEQxcUB.s:8389   .text.CheckChecksum:00000000 CheckChecksum
+     /tmp/ccEQxcUB.s:8451   .text.CheckChecksum:0000003c $d
+     /tmp/ccEQxcUB.s:13416  .bss.UART_header:00000000 UART_header
+     /tmp/ccEQxcUB.s:13409  .bss.CS_result:00000000 CS_result
+     /tmp/ccEQxcUB.s:8458   .rodata.SD_SAVE.str1.4:00000000 $d
+     /tmp/ccEQxcUB.s:8462   .text.SD_SAVE:00000000 $t
+     /tmp/ccEQxcUB.s:8468   .text.SD_SAVE:00000000 SD_SAVE
+     /tmp/ccEQxcUB.s:8537   .text.SD_SAVE:00000030 $d
+     /tmp/ccEQxcUB.s:8544   .text.SD_READ:00000000 $t
+     /tmp/ccEQxcUB.s:8550   .text.SD_READ:00000000 SD_READ
+     /tmp/ccEQxcUB.s:8628   .text.SD_READ:0000003c $d
+     /tmp/ccEQxcUB.s:8636   .text.SD_REMOVE:00000000 $t
+     /tmp/ccEQxcUB.s:8642   .text.SD_REMOVE:00000000 SD_REMOVE
+     /tmp/ccEQxcUB.s:8710   .text.SD_REMOVE:00000034 $d
+     /tmp/ccEQxcUB.s:8717   .text.USART_TX:00000000 $t
+     /tmp/ccEQxcUB.s:8723   .text.USART_TX:00000000 USART_TX
+     /tmp/ccEQxcUB.s:8798   .text.USART_TX:00000028 $d
+     /tmp/ccEQxcUB.s:8803   .text.USART_TX_DMA:00000000 $t
+     /tmp/ccEQxcUB.s:8809   .text.USART_TX_DMA:00000000 USART_TX_DMA
+     /tmp/ccEQxcUB.s:8878   .text.USART_TX_DMA:00000038 $d
+ARM GAS  /tmp/ccEQxcUB.s 			page 664
 
 
-     /tmp/ccwR4KB7.s:9049   .text.MX_TIM10_Init:00000000 $t
-     /tmp/ccwR4KB7.s:9054   .text.MX_TIM10_Init:00000000 MX_TIM10_Init
-     /tmp/ccwR4KB7.s:9103   .text.MX_TIM10_Init:00000024 $d
-     /tmp/ccwR4KB7.s:9109   .text.MX_UART8_Init:00000000 $t
-     /tmp/ccwR4KB7.s:9114   .text.MX_UART8_Init:00000000 MX_UART8_Init
-     /tmp/ccwR4KB7.s:9175   .text.MX_UART8_Init:00000030 $d
-     /tmp/ccwR4KB7.s:12544  .bss.huart8:00000000 huart8
-     /tmp/ccwR4KB7.s:9181   .text.MX_TIM8_Init:00000000 $t
-     /tmp/ccwR4KB7.s:9186   .text.MX_TIM8_Init:00000000 MX_TIM8_Init
-     /tmp/ccwR4KB7.s:9295   .text.MX_TIM8_Init:00000064 $d
-     /tmp/ccwR4KB7.s:12565  .bss.htim8:00000000 htim8
-     /tmp/ccwR4KB7.s:9301   .text.MX_TIM11_Init:00000000 $t
-     /tmp/ccwR4KB7.s:9306   .text.MX_TIM11_Init:00000000 MX_TIM11_Init
-     /tmp/ccwR4KB7.s:9416   .text.MX_TIM11_Init:00000068 $d
-     /tmp/ccwR4KB7.s:12551  .bss.htim11:00000000 htim11
-     /tmp/ccwR4KB7.s:9422   .text.MX_TIM4_Init:00000000 $t
-     /tmp/ccwR4KB7.s:9427   .text.MX_TIM4_Init:00000000 MX_TIM4_Init
-     /tmp/ccwR4KB7.s:9582   .text.MX_TIM4_Init:0000009c $d
-     /tmp/ccwR4KB7.s:12572  .bss.htim4:00000000 htim4
-     /tmp/ccwR4KB7.s:9588   .text.SystemClock_Config:00000000 $t
-     /tmp/ccwR4KB7.s:9594   .text.SystemClock_Config:00000000 SystemClock_Config
-     /tmp/ccwR4KB7.s:9753   .text.SystemClock_Config:000000ac $d
-     /tmp/ccwR4KB7.s:9759   .text.main:00000000 $t
-     /tmp/ccwR4KB7.s:9765   .text.main:00000000 main
-     /tmp/ccwR4KB7.s:10169  .text.main:00000140 $d
-     /tmp/ccwR4KB7.s:10180  .text.main:0000016c $t
-     /tmp/ccwR4KB7.s:10433  .text.main:00000278 $d
-     /tmp/ccwR4KB7.s:12434  .bss.CPU_state_old:00000000 CPU_state_old
-     /tmp/ccwR4KB7.s:12428  .bss.UART_transmission_request:00000000 UART_transmission_request
-     /tmp/ccwR4KB7.s:12422  .bss.State_Data:00000000 State_Data
-     /tmp/ccwR4KB7.s:12363  .bss.temp16:00000000 temp16
-     /tmp/ccwR4KB7.s:10457  .text.main:000002cc $t
-     /tmp/ccwR4KB7.s:11007  .text.main:00000540 $d
-     /tmp/ccwR4KB7.s:12273  .bss.LD1_param:00000000 LD1_param
-     /tmp/ccwR4KB7.s:12266  .bss.LD2_param:00000000 LD2_param
-     /tmp/ccwR4KB7.s:12523  .bss.TO6_stop:00000000 TO6_stop
-     /tmp/ccwR4KB7.s:11029  .text.main:0000058c $t
-     /tmp/ccwR4KB7.s:11412  .text.main:000007a8 $d
-     /tmp/ccwR4KB7.s:12453  .bss.TIM10_period:00000000 TIM10_period
-     /tmp/ccwR4KB7.s:11437  .text.main:000007fc $t
-     /tmp/ccwR4KB7.s:12003  .text.main:00000a9c $d
-     /tmp/ccwR4KB7.s:12259  .bss.LD_blinker:00000000 LD_blinker
-     /tmp/ccwR4KB7.s:12035  .rodata.ad9102_example2_regval:00000000 $d
-     /tmp/ccwR4KB7.s:12106  .rodata.ad9102_example4_regval:00000000 $d
-     /tmp/ccwR4KB7.s:12177  .rodata.ad9102_reg_addr:00000000 $d
-     /tmp/ccwR4KB7.s:12249  .bss.task:00000000 $d
-     /tmp/ccwR4KB7.s:12256  .bss.LD_blinker:00000000 $d
-     /tmp/ccwR4KB7.s:12263  .bss.LD2_param:00000000 $d
-     /tmp/ccwR4KB7.s:12270  .bss.LD1_param:00000000 $d
-     /tmp/ccwR4KB7.s:12277  .bss.Def_setup:00000000 $d
-     /tmp/ccwR4KB7.s:12284  .bss.Curr_setup:00000000 $d
-     /tmp/ccwR4KB7.s:12291  .bss.LD2_def_setup:00000000 $d
-     /tmp/ccwR4KB7.s:12298  .bss.LD1_def_setup:00000000 $d
-     /tmp/ccwR4KB7.s:12305  .bss.LD2_curr_setup:00000000 $d
-     /tmp/ccwR4KB7.s:12312  .bss.LD1_curr_setup:00000000 $d
-     /tmp/ccwR4KB7.s:12319  .bss.sizeoffile:00000000 $d
-     /tmp/ccwR4KB7.s:12326  .bss.fgoto:00000000 $d
-ARM GAS  /tmp/ccwR4KB7.s 			page 636
+     /tmp/ccEQxcUB.s:8884   .text.Error_Handler:00000000 $t
+     /tmp/ccEQxcUB.s:8890   .text.Error_Handler:00000000 Error_Handler
+     /tmp/ccEQxcUB.s:8921   .text.MX_ADC1_Init:00000000 $t
+     /tmp/ccEQxcUB.s:8926   .text.MX_ADC1_Init:00000000 MX_ADC1_Init
+     /tmp/ccEQxcUB.s:9115   .text.MX_ADC1_Init:000000bc $d
+     /tmp/ccEQxcUB.s:9122   .text.MX_ADC3_Init:00000000 $t
+     /tmp/ccEQxcUB.s:9127   .text.MX_ADC3_Init:00000000 MX_ADC3_Init
+     /tmp/ccEQxcUB.s:9234   .text.MX_ADC3_Init:00000060 $d
+     /tmp/ccEQxcUB.s:9241   .text.MX_USART1_UART_Init:00000000 $t
+     /tmp/ccEQxcUB.s:9246   .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
+     /tmp/ccEQxcUB.s:9645   .text.MX_USART1_UART_Init:0000017c $d
+     /tmp/ccEQxcUB.s:9654   .text.MX_TIM10_Init:00000000 $t
+     /tmp/ccEQxcUB.s:9659   .text.MX_TIM10_Init:00000000 MX_TIM10_Init
+     /tmp/ccEQxcUB.s:9708   .text.MX_TIM10_Init:00000024 $d
+     /tmp/ccEQxcUB.s:9714   .text.MX_UART8_Init:00000000 $t
+     /tmp/ccEQxcUB.s:9719   .text.MX_UART8_Init:00000000 MX_UART8_Init
+     /tmp/ccEQxcUB.s:9780   .text.MX_UART8_Init:00000030 $d
+     /tmp/ccEQxcUB.s:13583  .bss.huart8:00000000 huart8
+     /tmp/ccEQxcUB.s:9786   .text.MX_TIM8_Init:00000000 $t
+     /tmp/ccEQxcUB.s:9791   .text.MX_TIM8_Init:00000000 MX_TIM8_Init
+     /tmp/ccEQxcUB.s:9900   .text.MX_TIM8_Init:00000064 $d
+     /tmp/ccEQxcUB.s:13611  .bss.htim8:00000000 htim8
+     /tmp/ccEQxcUB.s:9906   .text.MX_TIM11_Init:00000000 $t
+     /tmp/ccEQxcUB.s:9911   .text.MX_TIM11_Init:00000000 MX_TIM11_Init
+     /tmp/ccEQxcUB.s:10021  .text.MX_TIM11_Init:00000068 $d
+     /tmp/ccEQxcUB.s:13590  .bss.htim11:00000000 htim11
+     /tmp/ccEQxcUB.s:10027  .text.MX_TIM4_Init:00000000 $t
+     /tmp/ccEQxcUB.s:10032  .text.MX_TIM4_Init:00000000 MX_TIM4_Init
+     /tmp/ccEQxcUB.s:10187  .text.MX_TIM4_Init:0000009c $d
+     /tmp/ccEQxcUB.s:13618  .bss.htim4:00000000 htim4
+     /tmp/ccEQxcUB.s:10193  .text.MX_TIM1_Init:00000000 $t
+     /tmp/ccEQxcUB.s:10198  .text.MX_TIM1_Init:00000000 MX_TIM1_Init
+     /tmp/ccEQxcUB.s:10389  .text.MX_TIM1_Init:000000bc $d
+     /tmp/ccEQxcUB.s:13604  .bss.htim1:00000000 htim1
+     /tmp/ccEQxcUB.s:10395  .text.SystemClock_Config:00000000 $t
+     /tmp/ccEQxcUB.s:10401  .text.SystemClock_Config:00000000 SystemClock_Config
+     /tmp/ccEQxcUB.s:10560  .text.SystemClock_Config:000000ac $d
+     /tmp/ccEQxcUB.s:10566  .text.main:00000000 $t
+     /tmp/ccEQxcUB.s:10572  .text.main:00000000 main
+     /tmp/ccEQxcUB.s:10984  .text.main:0000014c $d
+     /tmp/ccEQxcUB.s:10997  .text.main:00000180 $t
+     /tmp/ccEQxcUB.s:11250  .text.main:0000028c $d
+     /tmp/ccEQxcUB.s:13473  .bss.CPU_state_old:00000000 CPU_state_old
+     /tmp/ccEQxcUB.s:13467  .bss.UART_transmission_request:00000000 UART_transmission_request
+     /tmp/ccEQxcUB.s:13461  .bss.State_Data:00000000 State_Data
+     /tmp/ccEQxcUB.s:13402  .bss.temp16:00000000 temp16
+     /tmp/ccEQxcUB.s:11275  .text.main:000002e4 $t
+     /tmp/ccEQxcUB.s:11937  .text.main:000005b0 $d
+     /tmp/ccEQxcUB.s:13312  .bss.LD1_param:00000000 LD1_param
+     /tmp/ccEQxcUB.s:13305  .bss.LD2_param:00000000 LD2_param
+     /tmp/ccEQxcUB.s:13562  .bss.TO6_stop:00000000 TO6_stop
+     /tmp/ccEQxcUB.s:11959  .text.main:000005f8 $t
+     /tmp/ccEQxcUB.s:12444  .text.main:0000087c $d
+     /tmp/ccEQxcUB.s:13492  .bss.TIM10_period:00000000 TIM10_period
+     /tmp/ccEQxcUB.s:12476  .text.main:000008ec $t
+     /tmp/ccEQxcUB.s:13042  .text.main:00000b8c $d
+     /tmp/ccEQxcUB.s:13298  .bss.LD_blinker:00000000 LD_blinker
+ARM GAS  /tmp/ccEQxcUB.s 			page 665
 
 
-     /tmp/ccwR4KB7.s:12333  .bss.test:00000000 $d
-     /tmp/ccwR4KB7.s:12342  .bss.fresult:00000000 fresult
-     /tmp/ccwR4KB7.s:12343  .bss.fresult:00000000 $d
-     /tmp/ccwR4KB7.s:12346  .bss.COMMAND:00000000 $d
-     /tmp/ccwR4KB7.s:12353  .bss.Long_Data:00000000 $d
-     /tmp/ccwR4KB7.s:12360  .bss.temp16:00000000 $d
-     /tmp/ccwR4KB7.s:12367  .bss.CS_result:00000000 $d
-     /tmp/ccwR4KB7.s:12374  .bss.UART_header:00000000 $d
-     /tmp/ccwR4KB7.s:12381  .bss.UART_rec_incr:00000000 $d
-     /tmp/ccwR4KB7.s:12391  .bss.TIM10_coflag:00000000 $d
-     /tmp/ccwR4KB7.s:12397  .bss.u_rx_flg:00000000 $d
-     /tmp/ccwR4KB7.s:12403  .bss.u_tx_flg:00000000 $d
-     /tmp/ccwR4KB7.s:12409  .bss.flg_tmt:00000000 $d
-     /tmp/ccwR4KB7.s:12412  .bss.UART_DATA:00000000 $d
-     /tmp/ccwR4KB7.s:12419  .bss.State_Data:00000000 $d
-     /tmp/ccwR4KB7.s:12429  .bss.UART_transmission_request:00000000 $d
-     /tmp/ccwR4KB7.s:12435  .bss.CPU_state_old:00000000 $d
-     /tmp/ccwR4KB7.s:12441  .bss.CPU_state:00000000 $d
-     /tmp/ccwR4KB7.s:12446  .bss.uart_buf:00000000 uart_buf
-     /tmp/ccwR4KB7.s:12447  .bss.uart_buf:00000000 $d
-     /tmp/ccwR4KB7.s:12450  .bss.TIM10_period:00000000 $d
-     /tmp/ccwR4KB7.s:12457  .bss.TO10_counter:00000000 $d
-     /tmp/ccwR4KB7.s:12464  .bss.TO10:00000000 $d
-     /tmp/ccwR4KB7.s:12471  .bss.TO7_PID:00000000 $d
-     /tmp/ccwR4KB7.s:12478  .bss.TO7_before:00000000 $d
-     /tmp/ccwR4KB7.s:12485  .bss.TO7:00000000 $d
-     /tmp/ccwR4KB7.s:12495  .bss.temp32:00000000 temp32
-     /tmp/ccwR4KB7.s:12492  .bss.temp32:00000000 $d
-     /tmp/ccwR4KB7.s:12499  .bss.SD_SLIDE:00000000 $d
-     /tmp/ccwR4KB7.s:12506  .bss.SD_SEEK:00000000 $d
-     /tmp/ccwR4KB7.s:12513  .bss.TO6_uart:00000000 $d
-     /tmp/ccwR4KB7.s:12520  .bss.TO6_stop:00000000 $d
-     /tmp/ccwR4KB7.s:12527  .bss.TO6_before:00000000 $d
-     /tmp/ccwR4KB7.s:12534  .bss.TO6:00000000 $d
-     /tmp/ccwR4KB7.s:12541  .bss.huart8:00000000 $d
-     /tmp/ccwR4KB7.s:12548  .bss.htim11:00000000 $d
-     /tmp/ccwR4KB7.s:12555  .bss.htim10:00000000 $d
-     /tmp/ccwR4KB7.s:12562  .bss.htim8:00000000 $d
-     /tmp/ccwR4KB7.s:12569  .bss.htim4:00000000 $d
-     /tmp/ccwR4KB7.s:12576  .bss.hsd1:00000000 $d
-     /tmp/ccwR4KB7.s:12583  .bss.hadc3:00000000 $d
-     /tmp/ccwR4KB7.s:12590  .bss.hadc1:00000000 $d
+     /tmp/ccEQxcUB.s:13074  .rodata.ad9102_example2_regval:00000000 $d
+     /tmp/ccEQxcUB.s:13145  .rodata.ad9102_example4_regval:00000000 $d
+     /tmp/ccEQxcUB.s:13216  .rodata.ad9102_reg_addr:00000000 $d
+     /tmp/ccEQxcUB.s:13288  .bss.task:00000000 $d
+     /tmp/ccEQxcUB.s:13295  .bss.LD_blinker:00000000 $d
+     /tmp/ccEQxcUB.s:13302  .bss.LD2_param:00000000 $d
+     /tmp/ccEQxcUB.s:13309  .bss.LD1_param:00000000 $d
+     /tmp/ccEQxcUB.s:13316  .bss.Def_setup:00000000 $d
+     /tmp/ccEQxcUB.s:13323  .bss.Curr_setup:00000000 $d
+     /tmp/ccEQxcUB.s:13330  .bss.LD2_def_setup:00000000 $d
+     /tmp/ccEQxcUB.s:13337  .bss.LD1_def_setup:00000000 $d
+     /tmp/ccEQxcUB.s:13344  .bss.LD2_curr_setup:00000000 $d
+     /tmp/ccEQxcUB.s:13351  .bss.LD1_curr_setup:00000000 $d
+     /tmp/ccEQxcUB.s:13358  .bss.sizeoffile:00000000 $d
+     /tmp/ccEQxcUB.s:13365  .bss.fgoto:00000000 $d
+     /tmp/ccEQxcUB.s:13372  .bss.test:00000000 $d
+     /tmp/ccEQxcUB.s:13381  .bss.fresult:00000000 fresult
+     /tmp/ccEQxcUB.s:13382  .bss.fresult:00000000 $d
+     /tmp/ccEQxcUB.s:13385  .bss.COMMAND:00000000 $d
+     /tmp/ccEQxcUB.s:13392  .bss.Long_Data:00000000 $d
+     /tmp/ccEQxcUB.s:13399  .bss.temp16:00000000 $d
+     /tmp/ccEQxcUB.s:13406  .bss.CS_result:00000000 $d
+     /tmp/ccEQxcUB.s:13413  .bss.UART_header:00000000 $d
+     /tmp/ccEQxcUB.s:13420  .bss.UART_rec_incr:00000000 $d
+     /tmp/ccEQxcUB.s:13430  .bss.TIM10_coflag:00000000 $d
+     /tmp/ccEQxcUB.s:13436  .bss.u_rx_flg:00000000 $d
+     /tmp/ccEQxcUB.s:13442  .bss.u_tx_flg:00000000 $d
+     /tmp/ccEQxcUB.s:13448  .bss.flg_tmt:00000000 $d
+     /tmp/ccEQxcUB.s:13451  .bss.UART_DATA:00000000 $d
+     /tmp/ccEQxcUB.s:13458  .bss.State_Data:00000000 $d
+     /tmp/ccEQxcUB.s:13468  .bss.UART_transmission_request:00000000 $d
+     /tmp/ccEQxcUB.s:13474  .bss.CPU_state_old:00000000 $d
+     /tmp/ccEQxcUB.s:13480  .bss.CPU_state:00000000 $d
+     /tmp/ccEQxcUB.s:13485  .bss.uart_buf:00000000 uart_buf
+     /tmp/ccEQxcUB.s:13486  .bss.uart_buf:00000000 $d
+     /tmp/ccEQxcUB.s:13489  .bss.TIM10_period:00000000 $d
+     /tmp/ccEQxcUB.s:13496  .bss.TO10_counter:00000000 $d
+     /tmp/ccEQxcUB.s:13503  .bss.TO10:00000000 $d
+     /tmp/ccEQxcUB.s:13510  .bss.TO7_PID:00000000 $d
+     /tmp/ccEQxcUB.s:13517  .bss.TO7_before:00000000 $d
+     /tmp/ccEQxcUB.s:13524  .bss.TO7:00000000 $d
+     /tmp/ccEQxcUB.s:13534  .bss.temp32:00000000 temp32
+     /tmp/ccEQxcUB.s:13531  .bss.temp32:00000000 $d
+     /tmp/ccEQxcUB.s:13538  .bss.SD_SLIDE:00000000 $d
+     /tmp/ccEQxcUB.s:13545  .bss.SD_SEEK:00000000 $d
+     /tmp/ccEQxcUB.s:13552  .bss.TO6_uart:00000000 $d
+     /tmp/ccEQxcUB.s:13559  .bss.TO6_stop:00000000 $d
+     /tmp/ccEQxcUB.s:13566  .bss.TO6_before:00000000 $d
+     /tmp/ccEQxcUB.s:13573  .bss.TO6:00000000 $d
+     /tmp/ccEQxcUB.s:13580  .bss.huart8:00000000 $d
+     /tmp/ccEQxcUB.s:13587  .bss.htim11:00000000 $d
+     /tmp/ccEQxcUB.s:13594  .bss.htim10:00000000 $d
+     /tmp/ccEQxcUB.s:13601  .bss.htim1:00000000 $d
+     /tmp/ccEQxcUB.s:13608  .bss.htim8:00000000 $d
+     /tmp/ccEQxcUB.s:13615  .bss.htim4:00000000 $d
+     /tmp/ccEQxcUB.s:13622  .bss.hsd1:00000000 $d
+     /tmp/ccEQxcUB.s:13629  .bss.hadc3:00000000 $d
+ARM GAS  /tmp/ccEQxcUB.s 			page 666
+
+
+     /tmp/ccEQxcUB.s:13636  .bss.hadc1:00000000 $d
 
 UNDEFINED SYMBOLS
 HAL_GPIO_WritePin
@@ -38154,11 +39904,9 @@ HAL_GPIO_ReadPin
 Mount_SD
 Seek_Read_File
 Unmount_SD
+HAL_Delay
 HAL_ADC_Start
 HAL_ADC_PollForConversion
-ARM GAS  /tmp/ccwR4KB7.s 			page 637
-
-
 HAL_ADC_GetValue
 HAL_ADC_Stop
 Remove_File
@@ -38176,12 +39924,13 @@ HAL_TIMEx_MasterConfigSynchronization
 HAL_TIM_PWM_Init
 HAL_TIM_PWM_ConfigChannel
 HAL_TIM_MspPostInit
+HAL_TIMEx_ConfigBreakDeadTime
 HAL_RCC_OscConfig
 HAL_PWREx_EnableOverDrive
 HAL_RCC_ClockConfig
 HAL_Init
 MX_FATFS_Init
+HAL_TIM_PWM_Start
 HAL_TIM_Base_Start_IT
 HAL_TIM_PWM_Stop
-HAL_TIM_PWM_Start
 HAL_TIM_Base_Stop
diff --git a/build/main.o b/build/main.o
index 7b53f962411cc337e77755a7c8197d393918a404..73ed151d13b36ea465ba5c79eefa472cea117fcb 100644
GIT binary patch
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diff --git a/build/sd_diskio.lst b/build/sd_diskio.lst
index 57c3ba7..981d0bc 100644
--- a/build/sd_diskio.lst
+++ b/build/sd_diskio.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/cc8X4L5w.s 			page 1
+ARM GAS  /tmp/ccx8I3an.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
   29:Src/sd_diskio.c **** #include "sd_diskio.h"
   30:Src/sd_diskio.c **** 
   31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/
-ARM GAS  /tmp/cc8X4L5w.s 			page 2
+ARM GAS  /tmp/ccx8I3an.s 			page 2
 
 
   32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/
@@ -118,7 +118,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
   86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */
   87:Src/sd_diskio.c **** 
   88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/
-ARM GAS  /tmp/cc8X4L5w.s 			page 3
+ARM GAS  /tmp/ccx8I3an.s 			page 3
 
 
   89:Src/sd_diskio.c **** 
@@ -178,7 +178,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
   71              		.global	SD_initialize
   72              		.syntax unified
   73              		.thumb
-ARM GAS  /tmp/cc8X4L5w.s 			page 4
+ARM GAS  /tmp/ccx8I3an.s 			page 4
 
 
   74              		.thumb_func
@@ -238,7 +238,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  106              		.loc 1 123 1 view .LVU21
  107 0014 10BD     		pop	{r4, pc}
  108              	.LVL4:
-ARM GAS  /tmp/cc8X4L5w.s 			page 5
+ARM GAS  /tmp/ccx8I3an.s 			page 5
 
 
  109              	.L9:
@@ -298,7 +298,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  152              		.cfi_endproc
  153              	.LFE1185:
  155              		.section	.text.SD_read,"ax",%progbits
-ARM GAS  /tmp/cc8X4L5w.s 			page 6
+ARM GAS  /tmp/ccx8I3an.s 			page 6
 
 
  156              		.align	1
@@ -358,7 +358,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  193              	.L16:
  152:Src/sd_diskio.c ****                        (uint32_t) (sector),
  153:Src/sd_diskio.c ****                        count, SD_TIMEOUT) == MSD_OK)
-ARM GAS  /tmp/cc8X4L5w.s 			page 7
+ARM GAS  /tmp/ccx8I3an.s 			page 7
 
 
  154:Src/sd_diskio.c ****   {
@@ -418,7 +418,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  173:Src/sd_diskio.c ****   * @param  count: Number of sectors to write (1..128)
  174:Src/sd_diskio.c ****   * @retval DRESULT: Operation result
  175:Src/sd_diskio.c ****   */
-ARM GAS  /tmp/cc8X4L5w.s 			page 8
+ARM GAS  /tmp/ccx8I3an.s 			page 8
 
 
  176:Src/sd_diskio.c **** #if _USE_WRITE == 1
@@ -478,7 +478,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  264 001a FAD1     		bne	.L21
  265              	.L20:
  266              	.LVL24:
-ARM GAS  /tmp/cc8X4L5w.s 			page 9
+ARM GAS  /tmp/ccx8I3an.s 			page 9
 
 
  190:Src/sd_diskio.c ****     res = RES_OK;
@@ -538,7 +538,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  302              		.cfi_def_cfa_offset 48
  210:Src/sd_diskio.c ****   DRESULT res = RES_ERROR;
  303              		.loc 1 210 3 is_stmt 1 view .LVU64
-ARM GAS  /tmp/cc8X4L5w.s 			page 10
+ARM GAS  /tmp/ccx8I3an.s 			page 10
 
 
  304              	.LVL27:
@@ -598,7 +598,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  341 002a 0DE0     		b	.L25
  342              	.LVL31:
  343              	.L28:
-ARM GAS  /tmp/cc8X4L5w.s 			page 11
+ARM GAS  /tmp/ccx8I3an.s 			page 11
 
 
  228:Src/sd_diskio.c **** 
@@ -658,7 +658,7 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  245:Src/sd_diskio.c ****   }
  246:Src/sd_diskio.c **** 
  247:Src/sd_diskio.c ****   return res;
-ARM GAS  /tmp/cc8X4L5w.s 			page 12
+ARM GAS  /tmp/ccx8I3an.s 			page 12
 
 
  248:Src/sd_diskio.c **** }
@@ -708,31 +708,31 @@ ARM GAS  /tmp/cc8X4L5w.s 			page 1
  427              		.file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
  428              		.file 10 "Inc/bsp_driver_sd.h"
  429              		.file 11 "Inc/sd_diskio.h"
-ARM GAS  /tmp/cc8X4L5w.s 			page 13
+ARM GAS  /tmp/ccx8I3an.s 			page 13
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 sd_diskio.c
-     /tmp/cc8X4L5w.s:20     .text.SD_CheckStatus:00000000 $t
-     /tmp/cc8X4L5w.s:25     .text.SD_CheckStatus:00000000 SD_CheckStatus
-     /tmp/cc8X4L5w.s:65     .text.SD_CheckStatus:00000020 $d
-     /tmp/cc8X4L5w.s:416    .data.Stat:00000000 Stat
-     /tmp/cc8X4L5w.s:70     .text.SD_initialize:00000000 $t
-     /tmp/cc8X4L5w.s:76     .text.SD_initialize:00000000 SD_initialize
-     /tmp/cc8X4L5w.s:122    .text.SD_initialize:00000024 $d
-     /tmp/cc8X4L5w.s:127    .text.SD_status:00000000 $t
-     /tmp/cc8X4L5w.s:133    .text.SD_status:00000000 SD_status
-     /tmp/cc8X4L5w.s:156    .text.SD_read:00000000 $t
-     /tmp/cc8X4L5w.s:162    .text.SD_read:00000000 SD_read
-     /tmp/cc8X4L5w.s:218    .text.SD_write:00000000 $t
-     /tmp/cc8X4L5w.s:224    .text.SD_write:00000000 SD_write
-     /tmp/cc8X4L5w.s:280    .text.SD_ioctl:00000000 $t
-     /tmp/cc8X4L5w.s:286    .text.SD_ioctl:00000000 SD_ioctl
-     /tmp/cc8X4L5w.s:320    .text.SD_ioctl:00000018 $d
-     /tmp/cc8X4L5w.s:324    .text.SD_ioctl:0000001c $t
-     /tmp/cc8X4L5w.s:398    .text.SD_ioctl:00000054 $d
-     /tmp/cc8X4L5w.s:407    .rodata.SD_Driver:00000000 SD_Driver
-     /tmp/cc8X4L5w.s:404    .rodata.SD_Driver:00000000 $d
+     /tmp/ccx8I3an.s:20     .text.SD_CheckStatus:00000000 $t
+     /tmp/ccx8I3an.s:25     .text.SD_CheckStatus:00000000 SD_CheckStatus
+     /tmp/ccx8I3an.s:65     .text.SD_CheckStatus:00000020 $d
+     /tmp/ccx8I3an.s:416    .data.Stat:00000000 Stat
+     /tmp/ccx8I3an.s:70     .text.SD_initialize:00000000 $t
+     /tmp/ccx8I3an.s:76     .text.SD_initialize:00000000 SD_initialize
+     /tmp/ccx8I3an.s:122    .text.SD_initialize:00000024 $d
+     /tmp/ccx8I3an.s:127    .text.SD_status:00000000 $t
+     /tmp/ccx8I3an.s:133    .text.SD_status:00000000 SD_status
+     /tmp/ccx8I3an.s:156    .text.SD_read:00000000 $t
+     /tmp/ccx8I3an.s:162    .text.SD_read:00000000 SD_read
+     /tmp/ccx8I3an.s:218    .text.SD_write:00000000 $t
+     /tmp/ccx8I3an.s:224    .text.SD_write:00000000 SD_write
+     /tmp/ccx8I3an.s:280    .text.SD_ioctl:00000000 $t
+     /tmp/ccx8I3an.s:286    .text.SD_ioctl:00000000 SD_ioctl
+     /tmp/ccx8I3an.s:320    .text.SD_ioctl:00000018 $d
+     /tmp/ccx8I3an.s:324    .text.SD_ioctl:0000001c $t
+     /tmp/ccx8I3an.s:398    .text.SD_ioctl:00000054 $d
+     /tmp/ccx8I3an.s:407    .rodata.SD_Driver:00000000 SD_Driver
+     /tmp/ccx8I3an.s:404    .rodata.SD_Driver:00000000 $d
 
 UNDEFINED SYMBOLS
 BSP_SD_GetCardState
diff --git a/build/stm32f7xx_hal_msp.lst b/build/stm32f7xx_hal_msp.lst
index 1973483..a67dc67 100644
--- a/build/stm32f7xx_hal_msp.lst
+++ b/build/stm32f7xx_hal_msp.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccehMqBJ.s 			page 1
+ARM GAS  /tmp/ccEjAJiv.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
   29:Src/stm32f7xx_hal_msp.c **** 
   30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */
   31:Src/stm32f7xx_hal_msp.c **** 
-ARM GAS  /tmp/ccehMqBJ.s 			page 2
+ARM GAS  /tmp/ccEjAJiv.s 			page 2
 
 
   32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
@@ -118,7 +118,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
   41 0004 1A6C     		ldr	r2, [r3, #64]
   42 0006 42F08052 		orr	r2, r2, #268435456
   43 000a 1A64     		str	r2, [r3, #64]
-ARM GAS  /tmp/ccehMqBJ.s 			page 3
+ARM GAS  /tmp/ccEjAJiv.s 			page 3
 
 
   44              		.loc 1 72 3 view .LVU4
@@ -178,7 +178,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
   83:Src/stm32f7xx_hal_msp.c ****   * @brief ADC MSP Initialization
   84:Src/stm32f7xx_hal_msp.c ****   * This function configures the hardware resources used in this example
   85:Src/stm32f7xx_hal_msp.c ****   * @param hadc: ADC handle pointer
-ARM GAS  /tmp/ccehMqBJ.s 			page 4
+ARM GAS  /tmp/ccEjAJiv.s 			page 4
 
 
   86:Src/stm32f7xx_hal_msp.c ****   * @retval None
@@ -238,7 +238,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  111:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
  112:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  113:Src/stm32f7xx_hal_msp.c **** 
-ARM GAS  /tmp/ccehMqBJ.s 			page 5
+ARM GAS  /tmp/ccEjAJiv.s 			page 5
 
 
  114:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_2;
@@ -298,7 +298,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  130              		.cfi_def_cfa_offset 12
  131              		@ sp needed
  132 0020 30BD     		pop	{r4, r5, pc}
-ARM GAS  /tmp/ccehMqBJ.s 			page 6
+ARM GAS  /tmp/ccEjAJiv.s 			page 6
 
 
  133              	.LVL2:
@@ -358,7 +358,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  172 0048 1A6B     		ldr	r2, [r3, #48]
  173 004a 42F00102 		orr	r2, r2, #1
  174 004e 1A63     		str	r2, [r3, #48]
-ARM GAS  /tmp/ccehMqBJ.s 			page 7
+ARM GAS  /tmp/ccEjAJiv.s 			page 7
 
 
  100:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
@@ -418,7 +418,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  114:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
  213              		.loc 1 114 5 is_stmt 1 view .LVU55
  114:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-ARM GAS  /tmp/ccehMqBJ.s 			page 8
+ARM GAS  /tmp/ccEjAJiv.s 			page 8
 
 
  214              		.loc 1 114 25 is_stmt 0 view .LVU56
@@ -478,7 +478,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  254              	.LVL9:
  255              	.L10:
  137:Src/stm32f7xx_hal_msp.c **** 
-ARM GAS  /tmp/ccehMqBJ.s 			page 9
+ARM GAS  /tmp/ccEjAJiv.s 			page 9
 
 
  256              		.loc 1 137 5 view .LVU71
@@ -538,7 +538,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  145:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
  295              		.loc 1 145 5 is_stmt 1 view .LVU87
  146:Src/stm32f7xx_hal_msp.c **** 
-ARM GAS  /tmp/ccehMqBJ.s 			page 10
+ARM GAS  /tmp/ccEjAJiv.s 			page 10
 
 
  296              		.loc 1 146 5 view .LVU88
@@ -598,7 +598,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  340              		@ args = 0, pretend = 0, frame = 0
  341              		@ frame_needed = 0, uses_anonymous_args = 0
  342              		.loc 1 165 1 is_stmt 0 view .LVU94
-ARM GAS  /tmp/ccehMqBJ.s 			page 11
+ARM GAS  /tmp/ccEjAJiv.s 			page 11
 
 
  343 0000 08B5     		push	{r3, lr}
@@ -658,7 +658,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  201:Src/stm32f7xx_hal_msp.c ****   {
  202:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN ADC3_MspDeInit 0 */
  203:Src/stm32f7xx_hal_msp.c **** 
-ARM GAS  /tmp/ccehMqBJ.s 			page 12
+ARM GAS  /tmp/ccEjAJiv.s 			page 12
 
 
  204:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END ADC3_MspDeInit 0 */
@@ -718,7 +718,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  387              	.LVL20:
  388 0036 EBE7     		b	.L13
  389              	.LVL21:
-ARM GAS  /tmp/ccehMqBJ.s 			page 13
+ARM GAS  /tmp/ccEjAJiv.s 			page 13
 
 
  390              	.L18:
@@ -778,7 +778,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  434              		.cfi_def_cfa_offset 20
  435              		.cfi_offset 4, -20
  436              		.cfi_offset 5, -16
-ARM GAS  /tmp/ccehMqBJ.s 			page 14
+ARM GAS  /tmp/ccEjAJiv.s 			page 14
 
 
  437              		.cfi_offset 6, -12
@@ -838,7 +838,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  259:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOD_CLK_ENABLE();
  260:Src/stm32f7xx_hal_msp.c ****     /**SDMMC1 GPIO Configuration
  261:Src/stm32f7xx_hal_msp.c ****     PC8     ------> SDMMC1_D0
-ARM GAS  /tmp/ccehMqBJ.s 			page 15
+ARM GAS  /tmp/ccEjAJiv.s 			page 15
 
 
  262:Src/stm32f7xx_hal_msp.c ****     PC9     ------> SDMMC1_D1
@@ -898,7 +898,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  489 002e FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
  490              	.LVL29:
  250:Src/stm32f7xx_hal_msp.c ****     {
-ARM GAS  /tmp/ccehMqBJ.s 			page 16
+ARM GAS  /tmp/ccEjAJiv.s 			page 16
 
 
  491              		.loc 1 250 8 discriminator 1 view .LVU127
@@ -958,7 +958,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  530 005c 1A6B     		ldr	r2, [r3, #48]
  531 005e 42F00802 		orr	r2, r2, #8
  532 0062 1A63     		str	r2, [r3, #48]
-ARM GAS  /tmp/ccehMqBJ.s 			page 17
+ARM GAS  /tmp/ccEjAJiv.s 			page 17
 
 
  259:Src/stm32f7xx_hal_msp.c ****     /**SDMMC1 GPIO Configuration
@@ -1018,7 +1018,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  570 008c 0423     		movs	r3, #4
  571 008e 2793     		str	r3, [sp, #156]
  277:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
-ARM GAS  /tmp/ccehMqBJ.s 			page 18
+ARM GAS  /tmp/ccEjAJiv.s 			page 18
 
 
  572              		.loc 1 277 5 is_stmt 1 view .LVU160
@@ -1078,7 +1078,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  292:Src/stm32f7xx_hal_msp.c ****   * @brief SD MSP De-Initialization
  293:Src/stm32f7xx_hal_msp.c ****   * This function freeze the hardware resources used in this example
  294:Src/stm32f7xx_hal_msp.c ****   * @param hsd: SD handle pointer
-ARM GAS  /tmp/ccehMqBJ.s 			page 19
+ARM GAS  /tmp/ccEjAJiv.s 			page 19
 
 
  295:Src/stm32f7xx_hal_msp.c ****   * @retval None
@@ -1138,7 +1138,7 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  305:Src/stm32f7xx_hal_msp.c **** 
  640              		.loc 1 305 5 is_stmt 1 view .LVU177
  641 000c 084A     		ldr	r2, .L33+4
-ARM GAS  /tmp/ccehMqBJ.s 			page 20
+ARM GAS  /tmp/ccEjAJiv.s 			page 20
 
 
  642 000e 536C     		ldr	r3, [r2, #68]
@@ -1190,27 +1190,27 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  334:Src/stm32f7xx_hal_msp.c **** {
  679              		.loc 1 334 1 is_stmt 1 view -0
  680              		.cfi_startproc
- 681              		@ args = 0, pretend = 0, frame = 16
+ 681              		@ args = 0, pretend = 0, frame = 24
  682              		@ frame_needed = 0, uses_anonymous_args = 0
  683              		.loc 1 334 1 is_stmt 0 view .LVU183
  684 0000 00B5     		push	{lr}
  685              	.LCFI12:
  686              		.cfi_def_cfa_offset 4
  687              		.cfi_offset 14, -4
- 688 0002 85B0     		sub	sp, sp, #20
-ARM GAS  /tmp/ccehMqBJ.s 			page 21
+ 688 0002 87B0     		sub	sp, sp, #28
+ARM GAS  /tmp/ccEjAJiv.s 			page 21
 
 
  689              	.LCFI13:
- 690              		.cfi_def_cfa_offset 24
+ 690              		.cfi_def_cfa_offset 32
  335:Src/stm32f7xx_hal_msp.c ****   if(htim_base->Instance==TIM4)
  691              		.loc 1 335 3 is_stmt 1 view .LVU184
  692              		.loc 1 335 15 is_stmt 0 view .LVU185
  693 0004 0368     		ldr	r3, [r0]
  694              		.loc 1 335 5 view .LVU186
- 695 0006 294A     		ldr	r2, .L45
+ 695 0006 304A     		ldr	r2, .L46
  696 0008 9342     		cmp	r3, r2
- 697 000a 0BD0     		beq	.L41
+ 697 000a 1ED0     		beq	.L42
  336:Src/stm32f7xx_hal_msp.c ****   {
  337:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspInit 0 */
  338:Src/stm32f7xx_hal_msp.c **** 
@@ -1221,1036 +1221,1183 @@ ARM GAS  /tmp/ccehMqBJ.s 			page 1
  343:Src/stm32f7xx_hal_msp.c **** 
  344:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspInit 1 */
  345:Src/stm32f7xx_hal_msp.c ****   }
- 346:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM8)
+ 346:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM1)
  698              		.loc 1 346 8 is_stmt 1 view .LVU187
  699              		.loc 1 346 10 is_stmt 0 view .LVU188
- 700 000c 284A     		ldr	r2, .L45+4
+ 700 000c 2F4A     		ldr	r2, .L46+4
  701 000e 9342     		cmp	r3, r2
- 702 0010 13D0     		beq	.L42
+ 702 0010 28D0     		beq	.L43
  347:Src/stm32f7xx_hal_msp.c ****   {
- 348:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspInit 0 */
+ 348:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 0 */
  349:Src/stm32f7xx_hal_msp.c **** 
- 350:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspInit 0 */
+ 350:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM1_MspInit 0 */
  351:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
- 352:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM8_CLK_ENABLE();
- 353:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
- 354:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
- 355:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
- 356:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspInit 1 */
- 357:Src/stm32f7xx_hal_msp.c **** 
- 358:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspInit 1 */
- 359:Src/stm32f7xx_hal_msp.c ****   }
- 360:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM10)
- 703              		.loc 1 360 8 is_stmt 1 view .LVU189
- 704              		.loc 1 360 10 is_stmt 0 view .LVU190
- 705 0012 284A     		ldr	r2, .L45+8
+ 352:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM1_CLK_ENABLE();
+ 353:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 1 */
+ 354:Src/stm32f7xx_hal_msp.c **** 
+ 355:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM1_MspInit 1 */
+ 356:Src/stm32f7xx_hal_msp.c ****   }
+ 357:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM8)
+ 703              		.loc 1 357 8 is_stmt 1 view .LVU189
+ 704              		.loc 1 357 10 is_stmt 0 view .LVU190
+ 705 0012 2F4A     		ldr	r2, .L46+8
  706 0014 9342     		cmp	r3, r2
- 707 0016 23D0     		beq	.L43
- 361:Src/stm32f7xx_hal_msp.c ****   {
- 362:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspInit 0 */
- 363:Src/stm32f7xx_hal_msp.c **** 
- 364:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspInit 0 */
- 365:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
- 366:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM10_CLK_ENABLE();
- 367:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
- 368:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
- 369:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
- 370:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspInit 1 */
- 371:Src/stm32f7xx_hal_msp.c **** 
- 372:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspInit 1 */
-ARM GAS  /tmp/ccehMqBJ.s 			page 22
+ 707 0016 30D0     		beq	.L44
+ 358:Src/stm32f7xx_hal_msp.c ****   {
+ 359:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspInit 0 */
+ 360:Src/stm32f7xx_hal_msp.c **** 
+ 361:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspInit 0 */
+ 362:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
+ 363:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM8_CLK_ENABLE();
+ 364:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
+ 365:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
+ 366:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
+ 367:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspInit 1 */
+ 368:Src/stm32f7xx_hal_msp.c **** 
+ 369:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspInit 1 */
+ 370:Src/stm32f7xx_hal_msp.c ****   }
+ 371:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM10)
+ 708              		.loc 1 371 8 is_stmt 1 view .LVU191
+ARM GAS  /tmp/ccEjAJiv.s 			page 22
 
 
- 373:Src/stm32f7xx_hal_msp.c ****   }
- 374:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM11)
- 708              		.loc 1 374 8 is_stmt 1 view .LVU191
- 709              		.loc 1 374 10 is_stmt 0 view .LVU192
- 710 0018 274A     		ldr	r2, .L45+12
+ 709              		.loc 1 371 10 is_stmt 0 view .LVU192
+ 710 0018 2E4A     		ldr	r2, .L46+12
  711 001a 9342     		cmp	r3, r2
- 712 001c 33D0     		beq	.L44
- 713              	.LVL42:
- 714              	.L35:
- 375:Src/stm32f7xx_hal_msp.c ****   {
- 376:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspInit 0 */
- 377:Src/stm32f7xx_hal_msp.c **** 
- 378:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspInit 0 */
- 379:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
- 380:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM11_CLK_ENABLE();
- 381:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
- 382:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, 0, 0);
- 383:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
- 384:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspInit 1 */
- 385:Src/stm32f7xx_hal_msp.c **** 
- 386:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspInit 1 */
- 387:Src/stm32f7xx_hal_msp.c ****   }
+ 712 001c 40D0     		beq	.L45
+ 372:Src/stm32f7xx_hal_msp.c ****   {
+ 373:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspInit 0 */
+ 374:Src/stm32f7xx_hal_msp.c **** 
+ 375:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspInit 0 */
+ 376:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
+ 377:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM10_CLK_ENABLE();
+ 378:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
+ 379:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
+ 380:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
+ 381:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspInit 1 */
+ 382:Src/stm32f7xx_hal_msp.c **** 
+ 383:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspInit 1 */
+ 384:Src/stm32f7xx_hal_msp.c ****   }
+ 385:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM11)
+ 713              		.loc 1 385 8 is_stmt 1 view .LVU193
+ 714              		.loc 1 385 10 is_stmt 0 view .LVU194
+ 715 001e 2E4A     		ldr	r2, .L46+16
+ 716 0020 9342     		cmp	r3, r2
+ 717 0022 1CD1     		bne	.L35
+ 386:Src/stm32f7xx_hal_msp.c ****   {
+ 387:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspInit 0 */
  388:Src/stm32f7xx_hal_msp.c **** 
- 389:Src/stm32f7xx_hal_msp.c **** }
- 715              		.loc 1 389 1 view .LVU193
- 716 001e 05B0     		add	sp, sp, #20
- 717              	.LCFI14:
- 718              		.cfi_remember_state
- 719              		.cfi_def_cfa_offset 4
- 720              		@ sp needed
- 721 0020 5DF804FB 		ldr	pc, [sp], #4
- 722              	.LVL43:
- 723              	.L41:
- 724              	.LCFI15:
- 725              		.cfi_restore_state
+ 389:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspInit 0 */
+ 390:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
+ 391:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM11_CLK_ENABLE();
+ 718              		.loc 1 391 5 is_stmt 1 view .LVU195
+ 719              	.LBB13:
+ 720              		.loc 1 391 5 view .LVU196
+ 721              		.loc 1 391 5 view .LVU197
+ 722 0024 2D4B     		ldr	r3, .L46+20
+ 723 0026 5A6C     		ldr	r2, [r3, #68]
+ 724 0028 42F48022 		orr	r2, r2, #262144
+ 725 002c 5A64     		str	r2, [r3, #68]
+ 726              		.loc 1 391 5 view .LVU198
+ 727 002e 5B6C     		ldr	r3, [r3, #68]
+ 728 0030 03F48023 		and	r3, r3, #262144
+ 729 0034 0593     		str	r3, [sp, #20]
+ 730              		.loc 1 391 5 view .LVU199
+ 731 0036 059B     		ldr	r3, [sp, #20]
+ 732              	.LBE13:
+ 733              		.loc 1 391 5 view .LVU200
+ 392:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
+ 393:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, 0, 0);
+ 734              		.loc 1 393 5 view .LVU201
+ 735 0038 0022     		movs	r2, #0
+ 736 003a 1146     		mov	r1, r2
+ 737 003c 1A20     		movs	r0, #26
+ 738              	.LVL42:
+ 739              		.loc 1 393 5 is_stmt 0 view .LVU202
+ 740 003e FFF7FEFF 		bl	HAL_NVIC_SetPriority
+ 741              	.LVL43:
+ 394:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
+ 742              		.loc 1 394 5 is_stmt 1 view .LVU203
+ARM GAS  /tmp/ccEjAJiv.s 			page 23
+
+
+ 743 0042 1A20     		movs	r0, #26
+ 744 0044 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
+ 745              	.LVL44:
+ 395:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspInit 1 */
+ 396:Src/stm32f7xx_hal_msp.c **** 
+ 397:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspInit 1 */
+ 398:Src/stm32f7xx_hal_msp.c ****   }
+ 399:Src/stm32f7xx_hal_msp.c **** 
+ 400:Src/stm32f7xx_hal_msp.c **** }
+ 746              		.loc 1 400 1 is_stmt 0 view .LVU204
+ 747 0048 09E0     		b	.L35
+ 748              	.LVL45:
+ 749              	.L42:
  341:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspInit 1 */
- 726              		.loc 1 341 5 is_stmt 1 view .LVU194
- 727              	.LBB13:
+ 750              		.loc 1 341 5 is_stmt 1 view .LVU205
+ 751              	.LBB14:
  341:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspInit 1 */
- 728              		.loc 1 341 5 view .LVU195
+ 752              		.loc 1 341 5 view .LVU206
  341:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspInit 1 */
- 729              		.loc 1 341 5 view .LVU196
- 730 0024 254B     		ldr	r3, .L45+16
- 731 0026 1A6C     		ldr	r2, [r3, #64]
- 732 0028 42F00402 		orr	r2, r2, #4
- 733 002c 1A64     		str	r2, [r3, #64]
+ 753              		.loc 1 341 5 view .LVU207
+ 754 004a 244B     		ldr	r3, .L46+20
+ 755 004c 1A6C     		ldr	r2, [r3, #64]
+ 756 004e 42F00402 		orr	r2, r2, #4
+ 757 0052 1A64     		str	r2, [r3, #64]
  341:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspInit 1 */
- 734              		.loc 1 341 5 view .LVU197
- 735 002e 1B6C     		ldr	r3, [r3, #64]
- 736 0030 03F00403 		and	r3, r3, #4
- 737 0034 0093     		str	r3, [sp]
+ 758              		.loc 1 341 5 view .LVU208
+ 759 0054 1B6C     		ldr	r3, [r3, #64]
+ 760 0056 03F00403 		and	r3, r3, #4
+ 761 005a 0193     		str	r3, [sp, #4]
  341:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspInit 1 */
- 738              		.loc 1 341 5 view .LVU198
- 739 0036 009B     		ldr	r3, [sp]
- 740              	.LBE13:
+ 762              		.loc 1 341 5 view .LVU209
+ 763 005c 019B     		ldr	r3, [sp, #4]
+ 764              	.LBE14:
  341:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspInit 1 */
- 741              		.loc 1 341 5 view .LVU199
-ARM GAS  /tmp/ccehMqBJ.s 			page 23
+ 765              		.loc 1 341 5 view .LVU210
+ 766              	.LVL46:
+ 767              	.L35:
+ 768              		.loc 1 400 1 is_stmt 0 view .LVU211
+ 769 005e 07B0     		add	sp, sp, #28
+ 770              	.LCFI14:
+ 771              		.cfi_remember_state
+ 772              		.cfi_def_cfa_offset 4
+ 773              		@ sp needed
+ 774 0060 5DF804FB 		ldr	pc, [sp], #4
+ 775              	.LVL47:
+ 776              	.L43:
+ 777              	.LCFI15:
+ 778              		.cfi_restore_state
+ 352:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 1 */
+ 779              		.loc 1 352 5 is_stmt 1 view .LVU212
+ 780              	.LBB15:
+ 352:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 1 */
+ 781              		.loc 1 352 5 view .LVU213
+ 352:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 1 */
+ 782              		.loc 1 352 5 view .LVU214
+ 783 0064 1D4B     		ldr	r3, .L46+20
+ 784 0066 5A6C     		ldr	r2, [r3, #68]
+ARM GAS  /tmp/ccEjAJiv.s 			page 24
 
 
- 742 0038 F1E7     		b	.L35
- 743              	.L42:
- 352:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
- 744              		.loc 1 352 5 view .LVU200
- 745              	.LBB14:
- 352:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
- 746              		.loc 1 352 5 view .LVU201
- 352:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
- 747              		.loc 1 352 5 view .LVU202
- 748 003a 204B     		ldr	r3, .L45+16
- 749 003c 5A6C     		ldr	r2, [r3, #68]
- 750 003e 42F00202 		orr	r2, r2, #2
- 751 0042 5A64     		str	r2, [r3, #68]
- 352:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
- 752              		.loc 1 352 5 view .LVU203
- 753 0044 5B6C     		ldr	r3, [r3, #68]
- 754 0046 03F00203 		and	r3, r3, #2
- 755 004a 0193     		str	r3, [sp, #4]
- 352:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
- 756              		.loc 1 352 5 view .LVU204
- 757 004c 019B     		ldr	r3, [sp, #4]
- 758              	.LBE14:
- 352:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
- 759              		.loc 1 352 5 view .LVU205
- 354:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
- 760              		.loc 1 354 5 view .LVU206
- 761 004e 0022     		movs	r2, #0
- 762 0050 1146     		mov	r1, r2
- 763 0052 2C20     		movs	r0, #44
- 764              	.LVL44:
- 354:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
- 765              		.loc 1 354 5 is_stmt 0 view .LVU207
- 766 0054 FFF7FEFF 		bl	HAL_NVIC_SetPriority
- 767              	.LVL45:
- 355:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspInit 1 */
- 768              		.loc 1 355 5 is_stmt 1 view .LVU208
- 769 0058 2C20     		movs	r0, #44
- 770 005a FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
- 771              	.LVL46:
- 772 005e DEE7     		b	.L35
- 773              	.LVL47:
- 774              	.L43:
- 366:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
- 775              		.loc 1 366 5 view .LVU209
- 776              	.LBB15:
- 366:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
- 777              		.loc 1 366 5 view .LVU210
- 366:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
- 778              		.loc 1 366 5 view .LVU211
- 779 0060 164B     		ldr	r3, .L45+16
- 780 0062 5A6C     		ldr	r2, [r3, #68]
- 781 0064 42F40032 		orr	r2, r2, #131072
- 782 0068 5A64     		str	r2, [r3, #68]
- 366:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
- 783              		.loc 1 366 5 view .LVU212
- 784 006a 5B6C     		ldr	r3, [r3, #68]
- 785 006c 03F40033 		and	r3, r3, #131072
-ARM GAS  /tmp/ccehMqBJ.s 			page 24
+ 785 0068 42F00102 		orr	r2, r2, #1
+ 786 006c 5A64     		str	r2, [r3, #68]
+ 352:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 1 */
+ 787              		.loc 1 352 5 view .LVU215
+ 788 006e 5B6C     		ldr	r3, [r3, #68]
+ 789 0070 03F00103 		and	r3, r3, #1
+ 790 0074 0293     		str	r3, [sp, #8]
+ 352:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 1 */
+ 791              		.loc 1 352 5 view .LVU216
+ 792 0076 029B     		ldr	r3, [sp, #8]
+ 793              	.LBE15:
+ 352:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspInit 1 */
+ 794              		.loc 1 352 5 view .LVU217
+ 795 0078 F1E7     		b	.L35
+ 796              	.L44:
+ 363:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
+ 797              		.loc 1 363 5 view .LVU218
+ 798              	.LBB16:
+ 363:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
+ 799              		.loc 1 363 5 view .LVU219
+ 363:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
+ 800              		.loc 1 363 5 view .LVU220
+ 801 007a 184B     		ldr	r3, .L46+20
+ 802 007c 5A6C     		ldr	r2, [r3, #68]
+ 803 007e 42F00202 		orr	r2, r2, #2
+ 804 0082 5A64     		str	r2, [r3, #68]
+ 363:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
+ 805              		.loc 1 363 5 view .LVU221
+ 806 0084 5B6C     		ldr	r3, [r3, #68]
+ 807 0086 03F00203 		and	r3, r3, #2
+ 808 008a 0393     		str	r3, [sp, #12]
+ 363:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
+ 809              		.loc 1 363 5 view .LVU222
+ 810 008c 039B     		ldr	r3, [sp, #12]
+ 811              	.LBE16:
+ 363:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt Init */
+ 812              		.loc 1 363 5 view .LVU223
+ 365:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
+ 813              		.loc 1 365 5 view .LVU224
+ 814 008e 0022     		movs	r2, #0
+ 815 0090 1146     		mov	r1, r2
+ 816 0092 2C20     		movs	r0, #44
+ 817              	.LVL48:
+ 365:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
+ 818              		.loc 1 365 5 is_stmt 0 view .LVU225
+ 819 0094 FFF7FEFF 		bl	HAL_NVIC_SetPriority
+ 820              	.LVL49:
+ 366:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspInit 1 */
+ 821              		.loc 1 366 5 is_stmt 1 view .LVU226
+ 822 0098 2C20     		movs	r0, #44
+ 823 009a FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
+ 824              	.LVL50:
+ 825 009e DEE7     		b	.L35
+ 826              	.LVL51:
+ 827              	.L45:
+ 377:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
+ 828              		.loc 1 377 5 view .LVU227
+ARM GAS  /tmp/ccEjAJiv.s 			page 25
 
 
- 786 0070 0293     		str	r3, [sp, #8]
- 366:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
- 787              		.loc 1 366 5 view .LVU213
- 788 0072 029B     		ldr	r3, [sp, #8]
- 789              	.LBE15:
- 366:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
- 790              		.loc 1 366 5 view .LVU214
- 368:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
- 791              		.loc 1 368 5 view .LVU215
- 792 0074 0022     		movs	r2, #0
- 793 0076 1146     		mov	r1, r2
- 794 0078 1920     		movs	r0, #25
- 795              	.LVL48:
- 368:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
- 796              		.loc 1 368 5 is_stmt 0 view .LVU216
- 797 007a FFF7FEFF 		bl	HAL_NVIC_SetPriority
- 798              	.LVL49:
- 369:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspInit 1 */
- 799              		.loc 1 369 5 is_stmt 1 view .LVU217
- 800 007e 1920     		movs	r0, #25
- 801 0080 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
- 802              	.LVL50:
- 803 0084 CBE7     		b	.L35
- 804              	.LVL51:
- 805              	.L44:
- 380:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
- 806              		.loc 1 380 5 view .LVU218
- 807              	.LBB16:
- 380:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
- 808              		.loc 1 380 5 view .LVU219
- 380:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
- 809              		.loc 1 380 5 view .LVU220
- 810 0086 0D4B     		ldr	r3, .L45+16
- 811 0088 5A6C     		ldr	r2, [r3, #68]
- 812 008a 42F48022 		orr	r2, r2, #262144
- 813 008e 5A64     		str	r2, [r3, #68]
- 380:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
- 814              		.loc 1 380 5 view .LVU221
- 815 0090 5B6C     		ldr	r3, [r3, #68]
- 816 0092 03F48023 		and	r3, r3, #262144
- 817 0096 0393     		str	r3, [sp, #12]
- 380:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
- 818              		.loc 1 380 5 view .LVU222
- 819 0098 039B     		ldr	r3, [sp, #12]
- 820              	.LBE16:
- 380:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt Init */
- 821              		.loc 1 380 5 view .LVU223
- 382:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
- 822              		.loc 1 382 5 view .LVU224
- 823 009a 0022     		movs	r2, #0
- 824 009c 1146     		mov	r1, r2
- 825 009e 1A20     		movs	r0, #26
- 826              	.LVL52:
- 382:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
- 827              		.loc 1 382 5 is_stmt 0 view .LVU225
- 828 00a0 FFF7FEFF 		bl	HAL_NVIC_SetPriority
- 829              	.LVL53:
-ARM GAS  /tmp/ccehMqBJ.s 			page 25
+ 829              	.LBB17:
+ 377:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
+ 830              		.loc 1 377 5 view .LVU228
+ 377:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
+ 831              		.loc 1 377 5 view .LVU229
+ 832 00a0 0E4B     		ldr	r3, .L46+20
+ 833 00a2 5A6C     		ldr	r2, [r3, #68]
+ 834 00a4 42F40032 		orr	r2, r2, #131072
+ 835 00a8 5A64     		str	r2, [r3, #68]
+ 377:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
+ 836              		.loc 1 377 5 view .LVU230
+ 837 00aa 5B6C     		ldr	r3, [r3, #68]
+ 838 00ac 03F40033 		and	r3, r3, #131072
+ 839 00b0 0493     		str	r3, [sp, #16]
+ 377:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
+ 840              		.loc 1 377 5 view .LVU231
+ 841 00b2 049B     		ldr	r3, [sp, #16]
+ 842              	.LBE17:
+ 377:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt Init */
+ 843              		.loc 1 377 5 view .LVU232
+ 379:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
+ 844              		.loc 1 379 5 view .LVU233
+ 845 00b4 0022     		movs	r2, #0
+ 846 00b6 1146     		mov	r1, r2
+ 847 00b8 1920     		movs	r0, #25
+ 848              	.LVL52:
+ 379:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
+ 849              		.loc 1 379 5 is_stmt 0 view .LVU234
+ 850 00ba FFF7FEFF 		bl	HAL_NVIC_SetPriority
+ 851              	.LVL53:
+ 380:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspInit 1 */
+ 852              		.loc 1 380 5 is_stmt 1 view .LVU235
+ 853 00be 1920     		movs	r0, #25
+ 854 00c0 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
+ 855              	.LVL54:
+ 856 00c4 CBE7     		b	.L35
+ 857              	.L47:
+ 858 00c6 00BF     		.align	2
+ 859              	.L46:
+ 860 00c8 00080040 		.word	1073743872
+ 861 00cc 00000140 		.word	1073807360
+ 862 00d0 00040140 		.word	1073808384
+ 863 00d4 00440140 		.word	1073824768
+ 864 00d8 00480140 		.word	1073825792
+ 865 00dc 00380240 		.word	1073887232
+ 866              		.cfi_endproc
+ 867              	.LFE1188:
+ 869              		.section	.text.HAL_TIM_MspPostInit,"ax",%progbits
+ 870              		.align	1
+ 871              		.global	HAL_TIM_MspPostInit
+ 872              		.syntax unified
+ 873              		.thumb
+ 874              		.thumb_func
+ 876              	HAL_TIM_MspPostInit:
+ 877              	.LVL55:
+ 878              	.LFB1189:
+ 401:Src/stm32f7xx_hal_msp.c **** 
+ARM GAS  /tmp/ccEjAJiv.s 			page 26
 
 
- 383:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspInit 1 */
- 830              		.loc 1 383 5 is_stmt 1 view .LVU226
- 831 00a4 1A20     		movs	r0, #26
- 832 00a6 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
- 833              	.LVL54:
- 834              		.loc 1 389 1 is_stmt 0 view .LVU227
- 835 00aa B8E7     		b	.L35
- 836              	.L46:
- 837              		.align	2
- 838              	.L45:
- 839 00ac 00080040 		.word	1073743872
- 840 00b0 00040140 		.word	1073808384
- 841 00b4 00440140 		.word	1073824768
- 842 00b8 00480140 		.word	1073825792
- 843 00bc 00380240 		.word	1073887232
- 844              		.cfi_endproc
- 845              	.LFE1188:
- 847              		.section	.text.HAL_TIM_MspPostInit,"ax",%progbits
- 848              		.align	1
- 849              		.global	HAL_TIM_MspPostInit
- 850              		.syntax unified
- 851              		.thumb
- 852              		.thumb_func
- 854              	HAL_TIM_MspPostInit:
- 855              	.LVL55:
- 856              	.LFB1189:
- 390:Src/stm32f7xx_hal_msp.c **** 
- 391:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
- 392:Src/stm32f7xx_hal_msp.c **** {
- 857              		.loc 1 392 1 is_stmt 1 view -0
- 858              		.cfi_startproc
- 859              		@ args = 0, pretend = 0, frame = 32
- 860              		@ frame_needed = 0, uses_anonymous_args = 0
- 861              		.loc 1 392 1 is_stmt 0 view .LVU229
- 862 0000 00B5     		push	{lr}
- 863              	.LCFI16:
- 864              		.cfi_def_cfa_offset 4
- 865              		.cfi_offset 14, -4
- 866 0002 89B0     		sub	sp, sp, #36
- 867              	.LCFI17:
- 868              		.cfi_def_cfa_offset 40
- 393:Src/stm32f7xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 869              		.loc 1 393 3 is_stmt 1 view .LVU230
- 870              		.loc 1 393 20 is_stmt 0 view .LVU231
- 871 0004 0023     		movs	r3, #0
- 872 0006 0393     		str	r3, [sp, #12]
- 873 0008 0493     		str	r3, [sp, #16]
- 874 000a 0593     		str	r3, [sp, #20]
- 875 000c 0693     		str	r3, [sp, #24]
- 876 000e 0793     		str	r3, [sp, #28]
- 394:Src/stm32f7xx_hal_msp.c ****   if(htim->Instance==TIM4)
- 877              		.loc 1 394 3 is_stmt 1 view .LVU232
- 878              		.loc 1 394 10 is_stmt 0 view .LVU233
- 879 0010 0368     		ldr	r3, [r0]
- 880              		.loc 1 394 5 view .LVU234
- 881 0012 1A4A     		ldr	r2, .L53
- 882 0014 9342     		cmp	r3, r2
-ARM GAS  /tmp/ccehMqBJ.s 			page 26
+ 402:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+ 403:Src/stm32f7xx_hal_msp.c **** {
+ 879              		.loc 1 403 1 view -0
+ 880              		.cfi_startproc
+ 881              		@ args = 0, pretend = 0, frame = 32
+ 882              		@ frame_needed = 0, uses_anonymous_args = 0
+ 883              		.loc 1 403 1 is_stmt 0 view .LVU237
+ 884 0000 00B5     		push	{lr}
+ 885              	.LCFI16:
+ 886              		.cfi_def_cfa_offset 4
+ 887              		.cfi_offset 14, -4
+ 888 0002 89B0     		sub	sp, sp, #36
+ 889              	.LCFI17:
+ 890              		.cfi_def_cfa_offset 40
+ 404:Src/stm32f7xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 891              		.loc 1 404 3 is_stmt 1 view .LVU238
+ 892              		.loc 1 404 20 is_stmt 0 view .LVU239
+ 893 0004 0023     		movs	r3, #0
+ 894 0006 0393     		str	r3, [sp, #12]
+ 895 0008 0493     		str	r3, [sp, #16]
+ 896 000a 0593     		str	r3, [sp, #20]
+ 897 000c 0693     		str	r3, [sp, #24]
+ 898 000e 0793     		str	r3, [sp, #28]
+ 405:Src/stm32f7xx_hal_msp.c ****   if(htim->Instance==TIM4)
+ 899              		.loc 1 405 3 is_stmt 1 view .LVU240
+ 900              		.loc 1 405 10 is_stmt 0 view .LVU241
+ 901 0010 0368     		ldr	r3, [r0]
+ 902              		.loc 1 405 5 view .LVU242
+ 903 0012 274A     		ldr	r2, .L56
+ 904 0014 9342     		cmp	r3, r2
+ 905 0016 08D0     		beq	.L53
+ 406:Src/stm32f7xx_hal_msp.c ****   {
+ 407:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspPostInit 0 */
+ 408:Src/stm32f7xx_hal_msp.c **** 
+ 409:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspPostInit 0 */
+ 410:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
+ 411:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
+ 412:Src/stm32f7xx_hal_msp.c ****     PB8     ------> TIM4_CH3
+ 413:Src/stm32f7xx_hal_msp.c ****     */
+ 414:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_8;
+ 415:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 416:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 417:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 418:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
+ 419:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 420:Src/stm32f7xx_hal_msp.c **** 
+ 421:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspPostInit 1 */
+ 422:Src/stm32f7xx_hal_msp.c **** 
+ 423:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspPostInit 1 */
+ 424:Src/stm32f7xx_hal_msp.c ****   }
+ 425:Src/stm32f7xx_hal_msp.c ****   else if(htim->Instance==TIM1)
+ 906              		.loc 1 425 8 is_stmt 1 view .LVU243
+ 907              		.loc 1 425 10 is_stmt 0 view .LVU244
+ 908 0018 264A     		ldr	r2, .L56+4
+ 909 001a 9342     		cmp	r3, r2
+ 910 001c 1AD0     		beq	.L54
+ 426:Src/stm32f7xx_hal_msp.c ****   {
+ARM GAS  /tmp/ccEjAJiv.s 			page 27
 
 
- 883 0016 05D0     		beq	.L51
- 395:Src/stm32f7xx_hal_msp.c ****   {
- 396:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspPostInit 0 */
- 397:Src/stm32f7xx_hal_msp.c **** 
- 398:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspPostInit 0 */
- 399:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
- 400:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
- 401:Src/stm32f7xx_hal_msp.c ****     PB8     ------> TIM4_CH3
- 402:Src/stm32f7xx_hal_msp.c ****     */
- 403:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_8;
- 404:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 405:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 406:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 407:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
- 408:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 409:Src/stm32f7xx_hal_msp.c **** 
- 410:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspPostInit 1 */
- 411:Src/stm32f7xx_hal_msp.c **** 
- 412:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspPostInit 1 */
- 413:Src/stm32f7xx_hal_msp.c ****   }
- 414:Src/stm32f7xx_hal_msp.c ****   else if(htim->Instance==TIM11)
- 884              		.loc 1 414 8 is_stmt 1 view .LVU235
- 885              		.loc 1 414 10 is_stmt 0 view .LVU236
- 886 0018 194A     		ldr	r2, .L53+4
- 887 001a 9342     		cmp	r3, r2
- 888 001c 17D0     		beq	.L52
- 889              	.LVL56:
- 890              	.L47:
- 415:Src/stm32f7xx_hal_msp.c ****   {
- 416:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspPostInit 0 */
- 417:Src/stm32f7xx_hal_msp.c **** 
- 418:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspPostInit 0 */
- 419:Src/stm32f7xx_hal_msp.c **** 
- 420:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
- 421:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
- 422:Src/stm32f7xx_hal_msp.c ****     PB9     ------> TIM11_CH1
- 423:Src/stm32f7xx_hal_msp.c ****     */
- 424:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_9;
- 425:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 426:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 427:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 428:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
- 429:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 427:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspPostInit 0 */
+ 428:Src/stm32f7xx_hal_msp.c **** 
+ 429:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM1_MspPostInit 0 */
  430:Src/stm32f7xx_hal_msp.c **** 
- 431:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspPostInit 1 */
- 432:Src/stm32f7xx_hal_msp.c **** 
- 433:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspPostInit 1 */
- 434:Src/stm32f7xx_hal_msp.c ****   }
- 435:Src/stm32f7xx_hal_msp.c **** 
- 436:Src/stm32f7xx_hal_msp.c **** }
- 891              		.loc 1 436 1 view .LVU237
- 892 001e 09B0     		add	sp, sp, #36
- 893              	.LCFI18:
- 894              		.cfi_remember_state
- 895              		.cfi_def_cfa_offset 4
- 896              		@ sp needed
- 897 0020 5DF804FB 		ldr	pc, [sp], #4
-ARM GAS  /tmp/ccehMqBJ.s 			page 27
-
-
- 898              	.LVL57:
- 899              	.L51:
- 900              	.LCFI19:
- 901              		.cfi_restore_state
- 399:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
- 902              		.loc 1 399 5 is_stmt 1 view .LVU238
- 903              	.LBB17:
- 399:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
- 904              		.loc 1 399 5 view .LVU239
- 399:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
- 905              		.loc 1 399 5 view .LVU240
- 906 0024 174B     		ldr	r3, .L53+8
- 907 0026 1A6B     		ldr	r2, [r3, #48]
- 908 0028 42F00202 		orr	r2, r2, #2
- 909 002c 1A63     		str	r2, [r3, #48]
- 399:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
- 910              		.loc 1 399 5 view .LVU241
- 911 002e 1B6B     		ldr	r3, [r3, #48]
- 912 0030 03F00203 		and	r3, r3, #2
- 913 0034 0193     		str	r3, [sp, #4]
- 399:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
- 914              		.loc 1 399 5 view .LVU242
- 915 0036 019B     		ldr	r3, [sp, #4]
- 916              	.LBE17:
- 399:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
- 917              		.loc 1 399 5 view .LVU243
- 403:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 918              		.loc 1 403 5 view .LVU244
- 403:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 919              		.loc 1 403 25 is_stmt 0 view .LVU245
- 920 0038 4FF48073 		mov	r3, #256
- 921 003c 0393     		str	r3, [sp, #12]
- 404:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 922              		.loc 1 404 5 is_stmt 1 view .LVU246
- 404:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 923              		.loc 1 404 26 is_stmt 0 view .LVU247
- 924 003e 0223     		movs	r3, #2
- 925 0040 0493     		str	r3, [sp, #16]
- 405:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 926              		.loc 1 405 5 is_stmt 1 view .LVU248
- 406:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
- 927              		.loc 1 406 5 view .LVU249
- 407:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 928              		.loc 1 407 5 view .LVU250
- 407:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 929              		.loc 1 407 31 is_stmt 0 view .LVU251
- 930 0042 0793     		str	r3, [sp, #28]
- 408:Src/stm32f7xx_hal_msp.c **** 
- 931              		.loc 1 408 5 is_stmt 1 view .LVU252
- 932 0044 03A9     		add	r1, sp, #12
- 933 0046 1048     		ldr	r0, .L53+12
- 934              	.LVL58:
- 408:Src/stm32f7xx_hal_msp.c **** 
- 935              		.loc 1 408 5 is_stmt 0 view .LVU253
- 936 0048 FFF7FEFF 		bl	HAL_GPIO_Init
- 937              	.LVL59:
- 938 004c E7E7     		b	.L47
-ARM GAS  /tmp/ccehMqBJ.s 			page 28
-
-
- 939              	.LVL60:
- 940              	.L52:
- 420:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
- 941              		.loc 1 420 5 is_stmt 1 view .LVU254
- 942              	.LBB18:
- 420:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
- 943              		.loc 1 420 5 view .LVU255
- 420:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
- 944              		.loc 1 420 5 view .LVU256
- 945 004e 0D4B     		ldr	r3, .L53+8
- 946 0050 1A6B     		ldr	r2, [r3, #48]
- 947 0052 42F00202 		orr	r2, r2, #2
- 948 0056 1A63     		str	r2, [r3, #48]
- 420:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
- 949              		.loc 1 420 5 view .LVU257
- 950 0058 1B6B     		ldr	r3, [r3, #48]
- 951 005a 03F00203 		and	r3, r3, #2
- 952 005e 0293     		str	r3, [sp, #8]
- 420:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
- 953              		.loc 1 420 5 view .LVU258
- 954 0060 029B     		ldr	r3, [sp, #8]
- 955              	.LBE18:
- 420:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
- 956              		.loc 1 420 5 view .LVU259
- 424:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 957              		.loc 1 424 5 view .LVU260
- 424:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 958              		.loc 1 424 25 is_stmt 0 view .LVU261
- 959 0062 4FF40073 		mov	r3, #512
- 960 0066 0393     		str	r3, [sp, #12]
- 425:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 961              		.loc 1 425 5 is_stmt 1 view .LVU262
- 425:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 962              		.loc 1 425 26 is_stmt 0 view .LVU263
- 963 0068 0223     		movs	r3, #2
- 964 006a 0493     		str	r3, [sp, #16]
- 426:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 965              		.loc 1 426 5 is_stmt 1 view .LVU264
- 427:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
- 966              		.loc 1 427 5 view .LVU265
- 428:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 967              		.loc 1 428 5 view .LVU266
- 428:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 968              		.loc 1 428 31 is_stmt 0 view .LVU267
- 969 006c 0323     		movs	r3, #3
- 970 006e 0793     		str	r3, [sp, #28]
- 429:Src/stm32f7xx_hal_msp.c **** 
- 971              		.loc 1 429 5 is_stmt 1 view .LVU268
- 972 0070 03A9     		add	r1, sp, #12
- 973 0072 0548     		ldr	r0, .L53+12
- 974              	.LVL61:
- 429:Src/stm32f7xx_hal_msp.c **** 
- 975              		.loc 1 429 5 is_stmt 0 view .LVU269
- 976 0074 FFF7FEFF 		bl	HAL_GPIO_Init
- 977              	.LVL62:
- 978              		.loc 1 436 1 view .LVU270
- 979 0078 D1E7     		b	.L47
-ARM GAS  /tmp/ccehMqBJ.s 			page 29
-
-
- 980              	.L54:
- 981 007a 00BF     		.align	2
- 982              	.L53:
- 983 007c 00080040 		.word	1073743872
- 984 0080 00480140 		.word	1073825792
- 985 0084 00380240 		.word	1073887232
- 986 0088 00040240 		.word	1073873920
- 987              		.cfi_endproc
- 988              	.LFE1189:
- 990              		.section	.text.HAL_TIM_Base_MspDeInit,"ax",%progbits
- 991              		.align	1
- 992              		.global	HAL_TIM_Base_MspDeInit
- 993              		.syntax unified
- 994              		.thumb
- 995              		.thumb_func
- 997              	HAL_TIM_Base_MspDeInit:
- 998              	.LVL63:
- 999              	.LFB1190:
- 437:Src/stm32f7xx_hal_msp.c **** /**
- 438:Src/stm32f7xx_hal_msp.c ****   * @brief TIM_Base MSP De-Initialization
- 439:Src/stm32f7xx_hal_msp.c ****   * This function freeze the hardware resources used in this example
- 440:Src/stm32f7xx_hal_msp.c ****   * @param htim_base: TIM_Base handle pointer
- 441:Src/stm32f7xx_hal_msp.c ****   * @retval None
- 442:Src/stm32f7xx_hal_msp.c ****   */
- 443:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
- 444:Src/stm32f7xx_hal_msp.c **** {
- 1000              		.loc 1 444 1 is_stmt 1 view -0
- 1001              		.cfi_startproc
- 1002              		@ args = 0, pretend = 0, frame = 0
- 1003              		@ frame_needed = 0, uses_anonymous_args = 0
- 1004              		.loc 1 444 1 is_stmt 0 view .LVU272
- 1005 0000 08B5     		push	{r3, lr}
- 1006              	.LCFI20:
- 1007              		.cfi_def_cfa_offset 8
- 1008              		.cfi_offset 3, -8
- 1009              		.cfi_offset 14, -4
- 445:Src/stm32f7xx_hal_msp.c ****   if(htim_base->Instance==TIM4)
- 1010              		.loc 1 445 3 is_stmt 1 view .LVU273
- 1011              		.loc 1 445 15 is_stmt 0 view .LVU274
- 1012 0002 0368     		ldr	r3, [r0]
- 1013              		.loc 1 445 5 view .LVU275
- 1014 0004 184A     		ldr	r2, .L65
- 1015 0006 9342     		cmp	r3, r2
- 1016 0008 09D0     		beq	.L61
- 446:Src/stm32f7xx_hal_msp.c ****   {
- 447:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspDeInit 0 */
- 448:Src/stm32f7xx_hal_msp.c **** 
- 449:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspDeInit 0 */
- 450:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
- 451:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM4_CLK_DISABLE();
- 452:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspDeInit 1 */
- 453:Src/stm32f7xx_hal_msp.c **** 
- 454:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspDeInit 1 */
- 455:Src/stm32f7xx_hal_msp.c ****   }
- 456:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM8)
- 1017              		.loc 1 456 8 is_stmt 1 view .LVU276
- 1018              		.loc 1 456 10 is_stmt 0 view .LVU277
-ARM GAS  /tmp/ccehMqBJ.s 			page 30
-
-
- 1019 000a 184A     		ldr	r2, .L65+4
- 1020 000c 9342     		cmp	r3, r2
- 1021 000e 0DD0     		beq	.L62
- 457:Src/stm32f7xx_hal_msp.c ****   {
- 458:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 0 */
- 459:Src/stm32f7xx_hal_msp.c **** 
- 460:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspDeInit 0 */
- 461:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
- 462:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM8_CLK_DISABLE();
- 463:Src/stm32f7xx_hal_msp.c **** 
- 464:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt DeInit */
- 465:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn);
- 466:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 1 */
- 467:Src/stm32f7xx_hal_msp.c **** 
- 468:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspDeInit 1 */
- 469:Src/stm32f7xx_hal_msp.c ****   }
- 470:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM10)
- 1022              		.loc 1 470 8 is_stmt 1 view .LVU278
- 1023              		.loc 1 470 10 is_stmt 0 view .LVU279
- 1024 0010 174A     		ldr	r2, .L65+8
- 1025 0012 9342     		cmp	r3, r2
- 1026 0014 14D0     		beq	.L63
- 471:Src/stm32f7xx_hal_msp.c ****   {
- 472:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 0 */
- 473:Src/stm32f7xx_hal_msp.c **** 
- 474:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspDeInit 0 */
- 475:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
- 476:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM10_CLK_DISABLE();
- 477:Src/stm32f7xx_hal_msp.c **** 
- 478:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt DeInit */
- 479:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn);
- 480:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 1 */
- 481:Src/stm32f7xx_hal_msp.c **** 
- 482:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspDeInit 1 */
- 483:Src/stm32f7xx_hal_msp.c ****   }
- 484:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM11)
- 1027              		.loc 1 484 8 is_stmt 1 view .LVU280
- 1028              		.loc 1 484 10 is_stmt 0 view .LVU281
- 1029 0016 174A     		ldr	r2, .L65+12
- 1030 0018 9342     		cmp	r3, r2
- 1031 001a 1BD0     		beq	.L64
- 1032              	.LVL64:
- 1033              	.L55:
- 485:Src/stm32f7xx_hal_msp.c ****   {
- 486:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspDeInit 0 */
- 487:Src/stm32f7xx_hal_msp.c **** 
- 488:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspDeInit 0 */
- 489:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
- 490:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM11_CLK_DISABLE();
- 491:Src/stm32f7xx_hal_msp.c **** 
- 492:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt DeInit */
- 493:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM11_IRQn);
- 494:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspDeInit 1 */
- 495:Src/stm32f7xx_hal_msp.c **** 
- 496:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspDeInit 1 */
- 497:Src/stm32f7xx_hal_msp.c ****   }
- 498:Src/stm32f7xx_hal_msp.c **** 
-ARM GAS  /tmp/ccehMqBJ.s 			page 31
-
-
- 499:Src/stm32f7xx_hal_msp.c **** }
- 1034              		.loc 1 499 1 view .LVU282
- 1035 001c 08BD     		pop	{r3, pc}
- 1036              	.LVL65:
- 1037              	.L61:
- 451:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspDeInit 1 */
- 1038              		.loc 1 451 5 is_stmt 1 view .LVU283
- 1039 001e 02F50C32 		add	r2, r2, #143360
- 1040 0022 136C     		ldr	r3, [r2, #64]
- 1041 0024 23F00403 		bic	r3, r3, #4
- 1042 0028 1364     		str	r3, [r2, #64]
- 1043 002a F7E7     		b	.L55
- 1044              	.L62:
+ 431:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOE_CLK_ENABLE();
+ 432:Src/stm32f7xx_hal_msp.c ****     /**TIM1 GPIO Configuration
+ 433:Src/stm32f7xx_hal_msp.c ****     PE9     ------> TIM1_CH1
+ 434:Src/stm32f7xx_hal_msp.c ****     */
+ 435:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_9;
+ 436:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 437:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 438:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 439:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
+ 440:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 441:Src/stm32f7xx_hal_msp.c **** 
+ 442:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspPostInit 1 */
+ 443:Src/stm32f7xx_hal_msp.c **** 
+ 444:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM1_MspPostInit 1 */
+ 445:Src/stm32f7xx_hal_msp.c ****   }
+ 446:Src/stm32f7xx_hal_msp.c ****   else if(htim->Instance==TIM11)
+ 911              		.loc 1 446 8 is_stmt 1 view .LVU245
+ 912              		.loc 1 446 10 is_stmt 0 view .LVU246
+ 913 001e 264A     		ldr	r2, .L56+8
+ 914 0020 9342     		cmp	r3, r2
+ 915 0022 2FD0     		beq	.L55
+ 916              	.LVL56:
+ 917              	.L48:
+ 447:Src/stm32f7xx_hal_msp.c ****   {
+ 448:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspPostInit 0 */
+ 449:Src/stm32f7xx_hal_msp.c **** 
+ 450:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspPostInit 0 */
+ 451:Src/stm32f7xx_hal_msp.c **** 
+ 452:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
+ 453:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
+ 454:Src/stm32f7xx_hal_msp.c ****     PB9     ------> TIM11_CH1
+ 455:Src/stm32f7xx_hal_msp.c ****     */
+ 456:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_9;
+ 457:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 458:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 459:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 460:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
+ 461:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  462:Src/stm32f7xx_hal_msp.c **** 
- 1045              		.loc 1 462 5 view .LVU284
- 1046 002c 02F59A32 		add	r2, r2, #78848
- 1047 0030 536C     		ldr	r3, [r2, #68]
- 1048 0032 23F00203 		bic	r3, r3, #2
- 1049 0036 5364     		str	r3, [r2, #68]
- 465:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 1 */
- 1050              		.loc 1 465 5 view .LVU285
- 1051 0038 2C20     		movs	r0, #44
- 1052              	.LVL66:
- 465:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 1 */
- 1053              		.loc 1 465 5 is_stmt 0 view .LVU286
- 1054 003a FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
- 1055              	.LVL67:
- 1056 003e EDE7     		b	.L55
- 1057              	.LVL68:
- 1058              	.L63:
- 476:Src/stm32f7xx_hal_msp.c **** 
- 1059              		.loc 1 476 5 is_stmt 1 view .LVU287
- 1060 0040 02F57442 		add	r2, r2, #62464
- 1061 0044 536C     		ldr	r3, [r2, #68]
- 1062 0046 23F40033 		bic	r3, r3, #131072
- 1063 004a 5364     		str	r3, [r2, #68]
- 479:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 1 */
- 1064              		.loc 1 479 5 view .LVU288
- 1065 004c 1920     		movs	r0, #25
- 1066              	.LVL69:
- 479:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 1 */
- 1067              		.loc 1 479 5 is_stmt 0 view .LVU289
- 1068 004e FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
- 1069              	.LVL70:
- 1070 0052 E3E7     		b	.L55
- 1071              	.LVL71:
- 1072              	.L64:
- 490:Src/stm32f7xx_hal_msp.c **** 
- 1073              		.loc 1 490 5 is_stmt 1 view .LVU290
- 1074 0054 02F57042 		add	r2, r2, #61440
- 1075 0058 536C     		ldr	r3, [r2, #68]
- 1076 005a 23F48023 		bic	r3, r3, #262144
- 1077 005e 5364     		str	r3, [r2, #68]
- 493:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspDeInit 1 */
- 1078              		.loc 1 493 5 view .LVU291
- 1079 0060 1A20     		movs	r0, #26
- 1080              	.LVL72:
-ARM GAS  /tmp/ccehMqBJ.s 			page 32
+ 463:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspPostInit 1 */
+ 464:Src/stm32f7xx_hal_msp.c **** 
+ 465:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspPostInit 1 */
+ 466:Src/stm32f7xx_hal_msp.c ****   }
+ 467:Src/stm32f7xx_hal_msp.c **** 
+ 468:Src/stm32f7xx_hal_msp.c **** }
+ 918              		.loc 1 468 1 view .LVU247
+ 919 0024 09B0     		add	sp, sp, #36
+ 920              	.LCFI18:
+ 921              		.cfi_remember_state
+ 922              		.cfi_def_cfa_offset 4
+ 923              		@ sp needed
+ 924 0026 5DF804FB 		ldr	pc, [sp], #4
+ 925              	.LVL57:
+ARM GAS  /tmp/ccEjAJiv.s 			page 28
 
 
- 493:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspDeInit 1 */
- 1081              		.loc 1 493 5 is_stmt 0 view .LVU292
- 1082 0062 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
- 1083              	.LVL73:
- 1084              		.loc 1 499 1 view .LVU293
- 1085 0066 D9E7     		b	.L55
- 1086              	.L66:
- 1087              		.align	2
- 1088              	.L65:
- 1089 0068 00080040 		.word	1073743872
- 1090 006c 00040140 		.word	1073808384
- 1091 0070 00440140 		.word	1073824768
- 1092 0074 00480140 		.word	1073825792
- 1093              		.cfi_endproc
- 1094              	.LFE1190:
- 1096              		.section	.text.HAL_UART_MspInit,"ax",%progbits
- 1097              		.align	1
- 1098              		.global	HAL_UART_MspInit
- 1099              		.syntax unified
- 1100              		.thumb
- 1101              		.thumb_func
- 1103              	HAL_UART_MspInit:
- 1104              	.LVL74:
- 1105              	.LFB1191:
- 500:Src/stm32f7xx_hal_msp.c **** 
- 501:Src/stm32f7xx_hal_msp.c **** /**
- 502:Src/stm32f7xx_hal_msp.c ****   * @brief UART MSP Initialization
- 503:Src/stm32f7xx_hal_msp.c ****   * This function configures the hardware resources used in this example
- 504:Src/stm32f7xx_hal_msp.c ****   * @param huart: UART handle pointer
- 505:Src/stm32f7xx_hal_msp.c ****   * @retval None
- 506:Src/stm32f7xx_hal_msp.c ****   */
- 507:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
- 508:Src/stm32f7xx_hal_msp.c **** {
- 1106              		.loc 1 508 1 is_stmt 1 view -0
- 1107              		.cfi_startproc
- 1108              		@ args = 0, pretend = 0, frame = 176
- 1109              		@ frame_needed = 0, uses_anonymous_args = 0
- 1110              		.loc 1 508 1 is_stmt 0 view .LVU295
- 1111 0000 10B5     		push	{r4, lr}
- 1112              	.LCFI21:
- 1113              		.cfi_def_cfa_offset 8
- 1114              		.cfi_offset 4, -8
- 1115              		.cfi_offset 14, -4
- 1116 0002 ACB0     		sub	sp, sp, #176
- 1117              	.LCFI22:
- 1118              		.cfi_def_cfa_offset 184
- 1119 0004 0446     		mov	r4, r0
- 509:Src/stm32f7xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 1120              		.loc 1 509 3 is_stmt 1 view .LVU296
- 1121              		.loc 1 509 20 is_stmt 0 view .LVU297
- 1122 0006 0021     		movs	r1, #0
- 1123 0008 2791     		str	r1, [sp, #156]
- 1124 000a 2891     		str	r1, [sp, #160]
- 1125 000c 2991     		str	r1, [sp, #164]
- 1126 000e 2A91     		str	r1, [sp, #168]
- 1127 0010 2B91     		str	r1, [sp, #172]
- 510:Src/stm32f7xx_hal_msp.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-ARM GAS  /tmp/ccehMqBJ.s 			page 33
+ 926              	.L53:
+ 927              	.LCFI19:
+ 928              		.cfi_restore_state
+ 410:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
+ 929              		.loc 1 410 5 is_stmt 1 view .LVU248
+ 930              	.LBB18:
+ 410:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
+ 931              		.loc 1 410 5 view .LVU249
+ 410:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
+ 932              		.loc 1 410 5 view .LVU250
+ 933 002a 244B     		ldr	r3, .L56+12
+ 934 002c 1A6B     		ldr	r2, [r3, #48]
+ 935 002e 42F00202 		orr	r2, r2, #2
+ 936 0032 1A63     		str	r2, [r3, #48]
+ 410:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
+ 937              		.loc 1 410 5 view .LVU251
+ 938 0034 1B6B     		ldr	r3, [r3, #48]
+ 939 0036 03F00203 		and	r3, r3, #2
+ 940 003a 0093     		str	r3, [sp]
+ 410:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
+ 941              		.loc 1 410 5 view .LVU252
+ 942 003c 009B     		ldr	r3, [sp]
+ 943              	.LBE18:
+ 410:Src/stm32f7xx_hal_msp.c ****     /**TIM4 GPIO Configuration
+ 944              		.loc 1 410 5 view .LVU253
+ 414:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 945              		.loc 1 414 5 view .LVU254
+ 414:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 946              		.loc 1 414 25 is_stmt 0 view .LVU255
+ 947 003e 4FF48073 		mov	r3, #256
+ 948 0042 0393     		str	r3, [sp, #12]
+ 415:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 949              		.loc 1 415 5 is_stmt 1 view .LVU256
+ 415:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 950              		.loc 1 415 26 is_stmt 0 view .LVU257
+ 951 0044 0223     		movs	r3, #2
+ 952 0046 0493     		str	r3, [sp, #16]
+ 416:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 953              		.loc 1 416 5 is_stmt 1 view .LVU258
+ 417:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
+ 954              		.loc 1 417 5 view .LVU259
+ 418:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 955              		.loc 1 418 5 view .LVU260
+ 418:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 956              		.loc 1 418 31 is_stmt 0 view .LVU261
+ 957 0048 0793     		str	r3, [sp, #28]
+ 419:Src/stm32f7xx_hal_msp.c **** 
+ 958              		.loc 1 419 5 is_stmt 1 view .LVU262
+ 959 004a 03A9     		add	r1, sp, #12
+ 960 004c 1C48     		ldr	r0, .L56+16
+ 961              	.LVL58:
+ 419:Src/stm32f7xx_hal_msp.c **** 
+ 962              		.loc 1 419 5 is_stmt 0 view .LVU263
+ 963 004e FFF7FEFF 		bl	HAL_GPIO_Init
+ 964              	.LVL59:
+ 965 0052 E7E7     		b	.L48
+ 966              	.LVL60:
+ARM GAS  /tmp/ccEjAJiv.s 			page 29
 
 
- 1128              		.loc 1 510 3 is_stmt 1 view .LVU298
- 1129              		.loc 1 510 28 is_stmt 0 view .LVU299
- 1130 0012 9022     		movs	r2, #144
- 1131 0014 03A8     		add	r0, sp, #12
- 1132              	.LVL75:
- 1133              		.loc 1 510 28 view .LVU300
- 1134 0016 FFF7FEFF 		bl	memset
- 1135              	.LVL76:
- 511:Src/stm32f7xx_hal_msp.c ****   if(huart->Instance==UART8)
- 1136              		.loc 1 511 3 is_stmt 1 view .LVU301
- 1137              		.loc 1 511 11 is_stmt 0 view .LVU302
- 1138 001a 2268     		ldr	r2, [r4]
- 1139              		.loc 1 511 5 view .LVU303
- 1140 001c 174B     		ldr	r3, .L73
- 1141 001e 9A42     		cmp	r2, r3
- 1142 0020 01D0     		beq	.L71
- 1143              	.L67:
- 512:Src/stm32f7xx_hal_msp.c ****   {
- 513:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspInit 0 */
- 514:Src/stm32f7xx_hal_msp.c **** 
- 515:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspInit 0 */
+ 967              	.L54:
+ 431:Src/stm32f7xx_hal_msp.c ****     /**TIM1 GPIO Configuration
+ 968              		.loc 1 431 5 is_stmt 1 view .LVU264
+ 969              	.LBB19:
+ 431:Src/stm32f7xx_hal_msp.c ****     /**TIM1 GPIO Configuration
+ 970              		.loc 1 431 5 view .LVU265
+ 431:Src/stm32f7xx_hal_msp.c ****     /**TIM1 GPIO Configuration
+ 971              		.loc 1 431 5 view .LVU266
+ 972 0054 194B     		ldr	r3, .L56+12
+ 973 0056 1A6B     		ldr	r2, [r3, #48]
+ 974 0058 42F01002 		orr	r2, r2, #16
+ 975 005c 1A63     		str	r2, [r3, #48]
+ 431:Src/stm32f7xx_hal_msp.c ****     /**TIM1 GPIO Configuration
+ 976              		.loc 1 431 5 view .LVU267
+ 977 005e 1B6B     		ldr	r3, [r3, #48]
+ 978 0060 03F01003 		and	r3, r3, #16
+ 979 0064 0193     		str	r3, [sp, #4]
+ 431:Src/stm32f7xx_hal_msp.c ****     /**TIM1 GPIO Configuration
+ 980              		.loc 1 431 5 view .LVU268
+ 981 0066 019B     		ldr	r3, [sp, #4]
+ 982              	.LBE19:
+ 431:Src/stm32f7xx_hal_msp.c ****     /**TIM1 GPIO Configuration
+ 983              		.loc 1 431 5 view .LVU269
+ 435:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 984              		.loc 1 435 5 view .LVU270
+ 435:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 985              		.loc 1 435 25 is_stmt 0 view .LVU271
+ 986 0068 4FF40073 		mov	r3, #512
+ 987 006c 0393     		str	r3, [sp, #12]
+ 436:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 988              		.loc 1 436 5 is_stmt 1 view .LVU272
+ 436:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 989              		.loc 1 436 26 is_stmt 0 view .LVU273
+ 990 006e 0223     		movs	r3, #2
+ 991 0070 0493     		str	r3, [sp, #16]
+ 437:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 992              		.loc 1 437 5 is_stmt 1 view .LVU274
+ 438:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
+ 993              		.loc 1 438 5 view .LVU275
+ 438:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
+ 994              		.loc 1 438 27 is_stmt 0 view .LVU276
+ 995 0072 0323     		movs	r3, #3
+ 996 0074 0693     		str	r3, [sp, #24]
+ 439:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 997              		.loc 1 439 5 is_stmt 1 view .LVU277
+ 439:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 998              		.loc 1 439 31 is_stmt 0 view .LVU278
+ 999 0076 0123     		movs	r3, #1
+ 1000 0078 0793     		str	r3, [sp, #28]
+ 440:Src/stm32f7xx_hal_msp.c **** 
+ 1001              		.loc 1 440 5 is_stmt 1 view .LVU279
+ 1002 007a 03A9     		add	r1, sp, #12
+ 1003 007c 1148     		ldr	r0, .L56+20
+ 1004              	.LVL61:
+ 440:Src/stm32f7xx_hal_msp.c **** 
+ 1005              		.loc 1 440 5 is_stmt 0 view .LVU280
+ 1006 007e FFF7FEFF 		bl	HAL_GPIO_Init
+ARM GAS  /tmp/ccEjAJiv.s 			page 30
+
+
+ 1007              	.LVL62:
+ 1008 0082 CFE7     		b	.L48
+ 1009              	.LVL63:
+ 1010              	.L55:
+ 452:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
+ 1011              		.loc 1 452 5 is_stmt 1 view .LVU281
+ 1012              	.LBB20:
+ 452:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
+ 1013              		.loc 1 452 5 view .LVU282
+ 452:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
+ 1014              		.loc 1 452 5 view .LVU283
+ 1015 0084 0D4B     		ldr	r3, .L56+12
+ 1016 0086 1A6B     		ldr	r2, [r3, #48]
+ 1017 0088 42F00202 		orr	r2, r2, #2
+ 1018 008c 1A63     		str	r2, [r3, #48]
+ 452:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
+ 1019              		.loc 1 452 5 view .LVU284
+ 1020 008e 1B6B     		ldr	r3, [r3, #48]
+ 1021 0090 03F00203 		and	r3, r3, #2
+ 1022 0094 0293     		str	r3, [sp, #8]
+ 452:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
+ 1023              		.loc 1 452 5 view .LVU285
+ 1024 0096 029B     		ldr	r3, [sp, #8]
+ 1025              	.LBE20:
+ 452:Src/stm32f7xx_hal_msp.c ****     /**TIM11 GPIO Configuration
+ 1026              		.loc 1 452 5 view .LVU286
+ 456:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 1027              		.loc 1 456 5 view .LVU287
+ 456:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 1028              		.loc 1 456 25 is_stmt 0 view .LVU288
+ 1029 0098 4FF40073 		mov	r3, #512
+ 1030 009c 0393     		str	r3, [sp, #12]
+ 457:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 1031              		.loc 1 457 5 is_stmt 1 view .LVU289
+ 457:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 1032              		.loc 1 457 26 is_stmt 0 view .LVU290
+ 1033 009e 0223     		movs	r3, #2
+ 1034 00a0 0493     		str	r3, [sp, #16]
+ 458:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 1035              		.loc 1 458 5 is_stmt 1 view .LVU291
+ 459:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
+ 1036              		.loc 1 459 5 view .LVU292
+ 460:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1037              		.loc 1 460 5 view .LVU293
+ 460:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1038              		.loc 1 460 31 is_stmt 0 view .LVU294
+ 1039 00a2 0323     		movs	r3, #3
+ 1040 00a4 0793     		str	r3, [sp, #28]
+ 461:Src/stm32f7xx_hal_msp.c **** 
+ 1041              		.loc 1 461 5 is_stmt 1 view .LVU295
+ 1042 00a6 03A9     		add	r1, sp, #12
+ 1043 00a8 0548     		ldr	r0, .L56+16
+ 1044              	.LVL64:
+ 461:Src/stm32f7xx_hal_msp.c **** 
+ 1045              		.loc 1 461 5 is_stmt 0 view .LVU296
+ 1046 00aa FFF7FEFF 		bl	HAL_GPIO_Init
+ 1047              	.LVL65:
+ARM GAS  /tmp/ccEjAJiv.s 			page 31
+
+
+ 1048              		.loc 1 468 1 view .LVU297
+ 1049 00ae B9E7     		b	.L48
+ 1050              	.L57:
+ 1051              		.align	2
+ 1052              	.L56:
+ 1053 00b0 00080040 		.word	1073743872
+ 1054 00b4 00000140 		.word	1073807360
+ 1055 00b8 00480140 		.word	1073825792
+ 1056 00bc 00380240 		.word	1073887232
+ 1057 00c0 00040240 		.word	1073873920
+ 1058 00c4 00100240 		.word	1073876992
+ 1059              		.cfi_endproc
+ 1060              	.LFE1189:
+ 1062              		.section	.text.HAL_TIM_Base_MspDeInit,"ax",%progbits
+ 1063              		.align	1
+ 1064              		.global	HAL_TIM_Base_MspDeInit
+ 1065              		.syntax unified
+ 1066              		.thumb
+ 1067              		.thumb_func
+ 1069              	HAL_TIM_Base_MspDeInit:
+ 1070              	.LVL66:
+ 1071              	.LFB1190:
+ 469:Src/stm32f7xx_hal_msp.c **** /**
+ 470:Src/stm32f7xx_hal_msp.c ****   * @brief TIM_Base MSP De-Initialization
+ 471:Src/stm32f7xx_hal_msp.c ****   * This function freeze the hardware resources used in this example
+ 472:Src/stm32f7xx_hal_msp.c ****   * @param htim_base: TIM_Base handle pointer
+ 473:Src/stm32f7xx_hal_msp.c ****   * @retval None
+ 474:Src/stm32f7xx_hal_msp.c ****   */
+ 475:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+ 476:Src/stm32f7xx_hal_msp.c **** {
+ 1072              		.loc 1 476 1 is_stmt 1 view -0
+ 1073              		.cfi_startproc
+ 1074              		@ args = 0, pretend = 0, frame = 0
+ 1075              		@ frame_needed = 0, uses_anonymous_args = 0
+ 1076              		.loc 1 476 1 is_stmt 0 view .LVU299
+ 1077 0000 08B5     		push	{r3, lr}
+ 1078              	.LCFI20:
+ 1079              		.cfi_def_cfa_offset 8
+ 1080              		.cfi_offset 3, -8
+ 1081              		.cfi_offset 14, -4
+ 477:Src/stm32f7xx_hal_msp.c ****   if(htim_base->Instance==TIM4)
+ 1082              		.loc 1 477 3 is_stmt 1 view .LVU300
+ 1083              		.loc 1 477 15 is_stmt 0 view .LVU301
+ 1084 0002 0368     		ldr	r3, [r0]
+ 1085              		.loc 1 477 5 view .LVU302
+ 1086 0004 1D4A     		ldr	r2, .L69
+ 1087 0006 9342     		cmp	r3, r2
+ 1088 0008 15D0     		beq	.L65
+ 478:Src/stm32f7xx_hal_msp.c ****   {
+ 479:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspDeInit 0 */
+ 480:Src/stm32f7xx_hal_msp.c **** 
+ 481:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspDeInit 0 */
+ 482:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
+ 483:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM4_CLK_DISABLE();
+ 484:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspDeInit 1 */
+ 485:Src/stm32f7xx_hal_msp.c **** 
+ 486:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM4_MspDeInit 1 */
+ARM GAS  /tmp/ccEjAJiv.s 			page 32
+
+
+ 487:Src/stm32f7xx_hal_msp.c ****   }
+ 488:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM1)
+ 1089              		.loc 1 488 8 is_stmt 1 view .LVU303
+ 1090              		.loc 1 488 10 is_stmt 0 view .LVU304
+ 1091 000a 1D4A     		ldr	r2, .L69+4
+ 1092 000c 9342     		cmp	r3, r2
+ 1093 000e 19D0     		beq	.L66
+ 489:Src/stm32f7xx_hal_msp.c ****   {
+ 490:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspDeInit 0 */
+ 491:Src/stm32f7xx_hal_msp.c **** 
+ 492:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM1_MspDeInit 0 */
+ 493:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
+ 494:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM1_CLK_DISABLE();
+ 495:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspDeInit 1 */
+ 496:Src/stm32f7xx_hal_msp.c **** 
+ 497:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM1_MspDeInit 1 */
+ 498:Src/stm32f7xx_hal_msp.c ****   }
+ 499:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM8)
+ 1094              		.loc 1 499 8 is_stmt 1 view .LVU305
+ 1095              		.loc 1 499 10 is_stmt 0 view .LVU306
+ 1096 0010 1C4A     		ldr	r2, .L69+8
+ 1097 0012 9342     		cmp	r3, r2
+ 1098 0014 1DD0     		beq	.L67
+ 500:Src/stm32f7xx_hal_msp.c ****   {
+ 501:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 0 */
+ 502:Src/stm32f7xx_hal_msp.c **** 
+ 503:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspDeInit 0 */
+ 504:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
+ 505:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM8_CLK_DISABLE();
+ 506:Src/stm32f7xx_hal_msp.c **** 
+ 507:Src/stm32f7xx_hal_msp.c ****     /* TIM8 interrupt DeInit */
+ 508:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn);
+ 509:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 1 */
+ 510:Src/stm32f7xx_hal_msp.c **** 
+ 511:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM8_MspDeInit 1 */
+ 512:Src/stm32f7xx_hal_msp.c ****   }
+ 513:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM10)
+ 1099              		.loc 1 513 8 is_stmt 1 view .LVU307
+ 1100              		.loc 1 513 10 is_stmt 0 view .LVU308
+ 1101 0016 1C4A     		ldr	r2, .L69+12
+ 1102 0018 9342     		cmp	r3, r2
+ 1103 001a 24D0     		beq	.L68
+ 514:Src/stm32f7xx_hal_msp.c ****   {
+ 515:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 0 */
  516:Src/stm32f7xx_hal_msp.c **** 
- 517:Src/stm32f7xx_hal_msp.c ****   /** Initializes the peripherals clock
- 518:Src/stm32f7xx_hal_msp.c ****   */
- 519:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
- 520:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
- 521:Src/stm32f7xx_hal_msp.c ****     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 522:Src/stm32f7xx_hal_msp.c ****     {
- 523:Src/stm32f7xx_hal_msp.c ****       Error_Handler();
- 524:Src/stm32f7xx_hal_msp.c ****     }
- 525:Src/stm32f7xx_hal_msp.c **** 
- 526:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
- 527:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_UART8_CLK_ENABLE();
- 528:Src/stm32f7xx_hal_msp.c **** 
- 529:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOE_CLK_ENABLE();
- 530:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 531:Src/stm32f7xx_hal_msp.c ****     PE0     ------> UART8_RX
- 532:Src/stm32f7xx_hal_msp.c ****     PE1     ------> UART8_TX
- 533:Src/stm32f7xx_hal_msp.c ****     */
- 534:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
- 535:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 536:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 537:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 538:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
- 539:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 540:Src/stm32f7xx_hal_msp.c **** 
- 541:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspInit 1 */
- 542:Src/stm32f7xx_hal_msp.c **** 
- 543:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspInit 1 */
- 544:Src/stm32f7xx_hal_msp.c **** 
- 545:Src/stm32f7xx_hal_msp.c ****   }
- 546:Src/stm32f7xx_hal_msp.c **** 
- 547:Src/stm32f7xx_hal_msp.c **** }
- 1144              		.loc 1 547 1 view .LVU304
- 1145 0022 2CB0     		add	sp, sp, #176
- 1146              	.LCFI23:
- 1147              		.cfi_remember_state
-ARM GAS  /tmp/ccehMqBJ.s 			page 34
+ 517:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspDeInit 0 */
+ 518:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
+ 519:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM10_CLK_DISABLE();
+ 520:Src/stm32f7xx_hal_msp.c **** 
+ 521:Src/stm32f7xx_hal_msp.c ****     /* TIM10 interrupt DeInit */
+ 522:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn);
+ 523:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 1 */
+ 524:Src/stm32f7xx_hal_msp.c **** 
+ 525:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM10_MspDeInit 1 */
+ 526:Src/stm32f7xx_hal_msp.c ****   }
+ 527:Src/stm32f7xx_hal_msp.c ****   else if(htim_base->Instance==TIM11)
+ 1104              		.loc 1 527 8 is_stmt 1 view .LVU309
+ARM GAS  /tmp/ccEjAJiv.s 			page 33
 
 
- 1148              		.cfi_def_cfa_offset 8
- 1149              		@ sp needed
- 1150 0024 10BD     		pop	{r4, pc}
- 1151              	.LVL77:
- 1152              	.L71:
- 1153              	.LCFI24:
- 1154              		.cfi_restore_state
- 519:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
- 1155              		.loc 1 519 5 is_stmt 1 view .LVU305
- 519:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
- 1156              		.loc 1 519 46 is_stmt 0 view .LVU306
- 1157 0026 4FF40053 		mov	r3, #8192
- 1158 002a 0393     		str	r3, [sp, #12]
- 520:Src/stm32f7xx_hal_msp.c ****     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 1159              		.loc 1 520 5 is_stmt 1 view .LVU307
- 521:Src/stm32f7xx_hal_msp.c ****     {
- 1160              		.loc 1 521 5 view .LVU308
- 521:Src/stm32f7xx_hal_msp.c ****     {
- 1161              		.loc 1 521 9 is_stmt 0 view .LVU309
- 1162 002c 03A8     		add	r0, sp, #12
- 1163 002e FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
- 1164              	.LVL78:
- 521:Src/stm32f7xx_hal_msp.c ****     {
- 1165              		.loc 1 521 8 discriminator 1 view .LVU310
- 1166 0032 00BB     		cbnz	r0, .L72
- 1167              	.L69:
- 527:Src/stm32f7xx_hal_msp.c **** 
- 1168              		.loc 1 527 5 is_stmt 1 view .LVU311
- 1169              	.LBB19:
- 527:Src/stm32f7xx_hal_msp.c **** 
- 1170              		.loc 1 527 5 view .LVU312
- 527:Src/stm32f7xx_hal_msp.c **** 
- 1171              		.loc 1 527 5 view .LVU313
- 1172 0034 124B     		ldr	r3, .L73+4
- 1173 0036 1A6C     		ldr	r2, [r3, #64]
- 1174 0038 42F00042 		orr	r2, r2, #-2147483648
- 1175 003c 1A64     		str	r2, [r3, #64]
- 527:Src/stm32f7xx_hal_msp.c **** 
- 1176              		.loc 1 527 5 view .LVU314
- 1177 003e 1A6C     		ldr	r2, [r3, #64]
- 1178 0040 02F00042 		and	r2, r2, #-2147483648
- 1179 0044 0192     		str	r2, [sp, #4]
- 527:Src/stm32f7xx_hal_msp.c **** 
- 1180              		.loc 1 527 5 view .LVU315
- 1181 0046 019A     		ldr	r2, [sp, #4]
- 1182              	.LBE19:
- 527:Src/stm32f7xx_hal_msp.c **** 
- 1183              		.loc 1 527 5 view .LVU316
- 529:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 1184              		.loc 1 529 5 view .LVU317
- 1185              	.LBB20:
- 529:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 1186              		.loc 1 529 5 view .LVU318
- 529:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 1187              		.loc 1 529 5 view .LVU319
- 1188 0048 1A6B     		ldr	r2, [r3, #48]
- 1189 004a 42F01002 		orr	r2, r2, #16
-ARM GAS  /tmp/ccehMqBJ.s 			page 35
+ 1105              		.loc 1 527 10 is_stmt 0 view .LVU310
+ 1106 001c 1B4A     		ldr	r2, .L69+16
+ 1107 001e 9342     		cmp	r3, r2
+ 1108 0020 0FD1     		bne	.L58
+ 528:Src/stm32f7xx_hal_msp.c ****   {
+ 529:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspDeInit 0 */
+ 530:Src/stm32f7xx_hal_msp.c **** 
+ 531:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspDeInit 0 */
+ 532:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
+ 533:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_TIM11_CLK_DISABLE();
+ 1109              		.loc 1 533 5 is_stmt 1 view .LVU311
+ 1110 0022 02F57042 		add	r2, r2, #61440
+ 1111 0026 536C     		ldr	r3, [r2, #68]
+ 1112 0028 23F48023 		bic	r3, r3, #262144
+ 1113 002c 5364     		str	r3, [r2, #68]
+ 534:Src/stm32f7xx_hal_msp.c **** 
+ 535:Src/stm32f7xx_hal_msp.c ****     /* TIM11 interrupt DeInit */
+ 536:Src/stm32f7xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM11_IRQn);
+ 1114              		.loc 1 536 5 view .LVU312
+ 1115 002e 1A20     		movs	r0, #26
+ 1116              	.LVL67:
+ 1117              		.loc 1 536 5 is_stmt 0 view .LVU313
+ 1118 0030 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
+ 1119              	.LVL68:
+ 537:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM11_MspDeInit 1 */
+ 538:Src/stm32f7xx_hal_msp.c **** 
+ 539:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END TIM11_MspDeInit 1 */
+ 540:Src/stm32f7xx_hal_msp.c ****   }
+ 541:Src/stm32f7xx_hal_msp.c **** 
+ 542:Src/stm32f7xx_hal_msp.c **** }
+ 1120              		.loc 1 542 1 view .LVU314
+ 1121 0034 05E0     		b	.L58
+ 1122              	.LVL69:
+ 1123              	.L65:
+ 483:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM4_MspDeInit 1 */
+ 1124              		.loc 1 483 5 is_stmt 1 view .LVU315
+ 1125 0036 02F50C32 		add	r2, r2, #143360
+ 1126 003a 136C     		ldr	r3, [r2, #64]
+ 1127 003c 23F00403 		bic	r3, r3, #4
+ 1128 0040 1364     		str	r3, [r2, #64]
+ 1129              	.LVL70:
+ 1130              	.L58:
+ 1131              		.loc 1 542 1 is_stmt 0 view .LVU316
+ 1132 0042 08BD     		pop	{r3, pc}
+ 1133              	.LVL71:
+ 1134              	.L66:
+ 494:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM1_MspDeInit 1 */
+ 1135              		.loc 1 494 5 is_stmt 1 view .LVU317
+ 1136 0044 02F59C32 		add	r2, r2, #79872
+ 1137 0048 536C     		ldr	r3, [r2, #68]
+ 1138 004a 23F00103 		bic	r3, r3, #1
+ 1139 004e 5364     		str	r3, [r2, #68]
+ 1140 0050 F7E7     		b	.L58
+ 1141              	.L67:
+ 505:Src/stm32f7xx_hal_msp.c **** 
+ 1142              		.loc 1 505 5 view .LVU318
+ 1143 0052 02F59A32 		add	r2, r2, #78848
+ARM GAS  /tmp/ccEjAJiv.s 			page 34
 
 
- 1190 004e 1A63     		str	r2, [r3, #48]
- 529:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 1191              		.loc 1 529 5 view .LVU320
- 1192 0050 1B6B     		ldr	r3, [r3, #48]
- 1193 0052 03F01003 		and	r3, r3, #16
- 1194 0056 0293     		str	r3, [sp, #8]
- 529:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 1195              		.loc 1 529 5 view .LVU321
- 1196 0058 029B     		ldr	r3, [sp, #8]
- 1197              	.LBE20:
- 529:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 1198              		.loc 1 529 5 view .LVU322
- 534:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 1199              		.loc 1 534 5 view .LVU323
- 534:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 1200              		.loc 1 534 25 is_stmt 0 view .LVU324
- 1201 005a 0323     		movs	r3, #3
- 1202 005c 2793     		str	r3, [sp, #156]
- 535:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 1203              		.loc 1 535 5 is_stmt 1 view .LVU325
- 535:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 1204              		.loc 1 535 26 is_stmt 0 view .LVU326
- 1205 005e 0222     		movs	r2, #2
- 1206 0060 2892     		str	r2, [sp, #160]
- 536:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 1207              		.loc 1 536 5 is_stmt 1 view .LVU327
- 536:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 1208              		.loc 1 536 26 is_stmt 0 view .LVU328
- 1209 0062 0022     		movs	r2, #0
- 1210 0064 2992     		str	r2, [sp, #164]
- 537:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
- 1211              		.loc 1 537 5 is_stmt 1 view .LVU329
- 537:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
- 1212              		.loc 1 537 27 is_stmt 0 view .LVU330
- 1213 0066 2A93     		str	r3, [sp, #168]
- 538:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 1214              		.loc 1 538 5 is_stmt 1 view .LVU331
- 538:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 1215              		.loc 1 538 31 is_stmt 0 view .LVU332
- 1216 0068 0823     		movs	r3, #8
- 1217 006a 2B93     		str	r3, [sp, #172]
- 539:Src/stm32f7xx_hal_msp.c **** 
- 1218              		.loc 1 539 5 is_stmt 1 view .LVU333
- 1219 006c 27A9     		add	r1, sp, #156
- 1220 006e 0548     		ldr	r0, .L73+8
- 1221 0070 FFF7FEFF 		bl	HAL_GPIO_Init
- 1222              	.LVL79:
- 1223              		.loc 1 547 1 is_stmt 0 view .LVU334
- 1224 0074 D5E7     		b	.L67
- 1225              	.L72:
- 523:Src/stm32f7xx_hal_msp.c ****     }
- 1226              		.loc 1 523 7 is_stmt 1 view .LVU335
- 1227 0076 FFF7FEFF 		bl	Error_Handler
- 1228              	.LVL80:
- 1229 007a DBE7     		b	.L69
- 1230              	.L74:
- 1231              		.align	2
-ARM GAS  /tmp/ccehMqBJ.s 			page 36
+ 1144 0056 536C     		ldr	r3, [r2, #68]
+ 1145 0058 23F00203 		bic	r3, r3, #2
+ 1146 005c 5364     		str	r3, [r2, #68]
+ 508:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 1 */
+ 1147              		.loc 1 508 5 view .LVU319
+ 1148 005e 2C20     		movs	r0, #44
+ 1149              	.LVL72:
+ 508:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM8_MspDeInit 1 */
+ 1150              		.loc 1 508 5 is_stmt 0 view .LVU320
+ 1151 0060 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
+ 1152              	.LVL73:
+ 1153 0064 EDE7     		b	.L58
+ 1154              	.LVL74:
+ 1155              	.L68:
+ 519:Src/stm32f7xx_hal_msp.c **** 
+ 1156              		.loc 1 519 5 is_stmt 1 view .LVU321
+ 1157 0066 02F57442 		add	r2, r2, #62464
+ 1158 006a 536C     		ldr	r3, [r2, #68]
+ 1159 006c 23F40033 		bic	r3, r3, #131072
+ 1160 0070 5364     		str	r3, [r2, #68]
+ 522:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 1 */
+ 1161              		.loc 1 522 5 view .LVU322
+ 1162 0072 1920     		movs	r0, #25
+ 1163              	.LVL75:
+ 522:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN TIM10_MspDeInit 1 */
+ 1164              		.loc 1 522 5 is_stmt 0 view .LVU323
+ 1165 0074 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
+ 1166              	.LVL76:
+ 1167 0078 E3E7     		b	.L58
+ 1168              	.L70:
+ 1169 007a 00BF     		.align	2
+ 1170              	.L69:
+ 1171 007c 00080040 		.word	1073743872
+ 1172 0080 00000140 		.word	1073807360
+ 1173 0084 00040140 		.word	1073808384
+ 1174 0088 00440140 		.word	1073824768
+ 1175 008c 00480140 		.word	1073825792
+ 1176              		.cfi_endproc
+ 1177              	.LFE1190:
+ 1179              		.section	.text.HAL_UART_MspInit,"ax",%progbits
+ 1180              		.align	1
+ 1181              		.global	HAL_UART_MspInit
+ 1182              		.syntax unified
+ 1183              		.thumb
+ 1184              		.thumb_func
+ 1186              	HAL_UART_MspInit:
+ 1187              	.LVL77:
+ 1188              	.LFB1191:
+ 543:Src/stm32f7xx_hal_msp.c **** 
+ 544:Src/stm32f7xx_hal_msp.c **** /**
+ 545:Src/stm32f7xx_hal_msp.c ****   * @brief UART MSP Initialization
+ 546:Src/stm32f7xx_hal_msp.c ****   * This function configures the hardware resources used in this example
+ 547:Src/stm32f7xx_hal_msp.c ****   * @param huart: UART handle pointer
+ 548:Src/stm32f7xx_hal_msp.c ****   * @retval None
+ 549:Src/stm32f7xx_hal_msp.c ****   */
+ 550:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+ 551:Src/stm32f7xx_hal_msp.c **** {
+ARM GAS  /tmp/ccEjAJiv.s 			page 35
 
 
- 1232              	.L73:
- 1233 007c 007C0040 		.word	1073773568
- 1234 0080 00380240 		.word	1073887232
- 1235 0084 00100240 		.word	1073876992
- 1236              		.cfi_endproc
- 1237              	.LFE1191:
- 1239              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
- 1240              		.align	1
- 1241              		.global	HAL_UART_MspDeInit
- 1242              		.syntax unified
- 1243              		.thumb
- 1244              		.thumb_func
- 1246              	HAL_UART_MspDeInit:
+ 1189              		.loc 1 551 1 is_stmt 1 view -0
+ 1190              		.cfi_startproc
+ 1191              		@ args = 0, pretend = 0, frame = 176
+ 1192              		@ frame_needed = 0, uses_anonymous_args = 0
+ 1193              		.loc 1 551 1 is_stmt 0 view .LVU325
+ 1194 0000 10B5     		push	{r4, lr}
+ 1195              	.LCFI21:
+ 1196              		.cfi_def_cfa_offset 8
+ 1197              		.cfi_offset 4, -8
+ 1198              		.cfi_offset 14, -4
+ 1199 0002 ACB0     		sub	sp, sp, #176
+ 1200              	.LCFI22:
+ 1201              		.cfi_def_cfa_offset 184
+ 1202 0004 0446     		mov	r4, r0
+ 552:Src/stm32f7xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 1203              		.loc 1 552 3 is_stmt 1 view .LVU326
+ 1204              		.loc 1 552 20 is_stmt 0 view .LVU327
+ 1205 0006 0021     		movs	r1, #0
+ 1206 0008 2791     		str	r1, [sp, #156]
+ 1207 000a 2891     		str	r1, [sp, #160]
+ 1208 000c 2991     		str	r1, [sp, #164]
+ 1209 000e 2A91     		str	r1, [sp, #168]
+ 1210 0010 2B91     		str	r1, [sp, #172]
+ 553:Src/stm32f7xx_hal_msp.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 1211              		.loc 1 553 3 is_stmt 1 view .LVU328
+ 1212              		.loc 1 553 28 is_stmt 0 view .LVU329
+ 1213 0012 9022     		movs	r2, #144
+ 1214 0014 03A8     		add	r0, sp, #12
+ 1215              	.LVL78:
+ 1216              		.loc 1 553 28 view .LVU330
+ 1217 0016 FFF7FEFF 		bl	memset
+ 1218              	.LVL79:
+ 554:Src/stm32f7xx_hal_msp.c ****   if(huart->Instance==UART8)
+ 1219              		.loc 1 554 3 is_stmt 1 view .LVU331
+ 1220              		.loc 1 554 11 is_stmt 0 view .LVU332
+ 1221 001a 2268     		ldr	r2, [r4]
+ 1222              		.loc 1 554 5 view .LVU333
+ 1223 001c 174B     		ldr	r3, .L77
+ 1224 001e 9A42     		cmp	r2, r3
+ 1225 0020 01D0     		beq	.L75
+ 1226              	.L71:
+ 555:Src/stm32f7xx_hal_msp.c ****   {
+ 556:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspInit 0 */
+ 557:Src/stm32f7xx_hal_msp.c **** 
+ 558:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspInit 0 */
+ 559:Src/stm32f7xx_hal_msp.c **** 
+ 560:Src/stm32f7xx_hal_msp.c ****   /** Initializes the peripherals clock
+ 561:Src/stm32f7xx_hal_msp.c ****   */
+ 562:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
+ 563:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
+ 564:Src/stm32f7xx_hal_msp.c ****     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 565:Src/stm32f7xx_hal_msp.c ****     {
+ 566:Src/stm32f7xx_hal_msp.c ****       Error_Handler();
+ 567:Src/stm32f7xx_hal_msp.c ****     }
+ 568:Src/stm32f7xx_hal_msp.c **** 
+ 569:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock enable */
+ 570:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_UART8_CLK_ENABLE();
+ARM GAS  /tmp/ccEjAJiv.s 			page 36
+
+
+ 571:Src/stm32f7xx_hal_msp.c **** 
+ 572:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_GPIOE_CLK_ENABLE();
+ 573:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 574:Src/stm32f7xx_hal_msp.c ****     PE0     ------> UART8_RX
+ 575:Src/stm32f7xx_hal_msp.c ****     PE1     ------> UART8_TX
+ 576:Src/stm32f7xx_hal_msp.c ****     */
+ 577:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
+ 578:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 579:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 580:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 581:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
+ 582:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 583:Src/stm32f7xx_hal_msp.c **** 
+ 584:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspInit 1 */
+ 585:Src/stm32f7xx_hal_msp.c **** 
+ 586:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspInit 1 */
+ 587:Src/stm32f7xx_hal_msp.c **** 
+ 588:Src/stm32f7xx_hal_msp.c ****   }
+ 589:Src/stm32f7xx_hal_msp.c **** 
+ 590:Src/stm32f7xx_hal_msp.c **** }
+ 1227              		.loc 1 590 1 view .LVU334
+ 1228 0022 2CB0     		add	sp, sp, #176
+ 1229              	.LCFI23:
+ 1230              		.cfi_remember_state
+ 1231              		.cfi_def_cfa_offset 8
+ 1232              		@ sp needed
+ 1233 0024 10BD     		pop	{r4, pc}
+ 1234              	.LVL80:
+ 1235              	.L75:
+ 1236              	.LCFI24:
+ 1237              		.cfi_restore_state
+ 562:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
+ 1238              		.loc 1 562 5 is_stmt 1 view .LVU335
+ 562:Src/stm32f7xx_hal_msp.c ****     PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
+ 1239              		.loc 1 562 46 is_stmt 0 view .LVU336
+ 1240 0026 4FF40053 		mov	r3, #8192
+ 1241 002a 0393     		str	r3, [sp, #12]
+ 563:Src/stm32f7xx_hal_msp.c ****     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 1242              		.loc 1 563 5 is_stmt 1 view .LVU337
+ 564:Src/stm32f7xx_hal_msp.c ****     {
+ 1243              		.loc 1 564 5 view .LVU338
+ 564:Src/stm32f7xx_hal_msp.c ****     {
+ 1244              		.loc 1 564 9 is_stmt 0 view .LVU339
+ 1245 002c 03A8     		add	r0, sp, #12
+ 1246 002e FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
  1247              	.LVL81:
- 1248              	.LFB1192:
- 548:Src/stm32f7xx_hal_msp.c **** 
- 549:Src/stm32f7xx_hal_msp.c **** /**
- 550:Src/stm32f7xx_hal_msp.c ****   * @brief UART MSP De-Initialization
- 551:Src/stm32f7xx_hal_msp.c ****   * This function freeze the hardware resources used in this example
- 552:Src/stm32f7xx_hal_msp.c ****   * @param huart: UART handle pointer
- 553:Src/stm32f7xx_hal_msp.c ****   * @retval None
- 554:Src/stm32f7xx_hal_msp.c ****   */
- 555:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
- 556:Src/stm32f7xx_hal_msp.c **** {
- 1249              		.loc 1 556 1 view -0
- 1250              		.cfi_startproc
- 1251              		@ args = 0, pretend = 0, frame = 0
- 1252              		@ frame_needed = 0, uses_anonymous_args = 0
- 1253              		.loc 1 556 1 is_stmt 0 view .LVU337
- 1254 0000 08B5     		push	{r3, lr}
- 1255              	.LCFI25:
- 1256              		.cfi_def_cfa_offset 8
- 1257              		.cfi_offset 3, -8
- 1258              		.cfi_offset 14, -4
- 557:Src/stm32f7xx_hal_msp.c ****   if(huart->Instance==UART8)
- 1259              		.loc 1 557 3 is_stmt 1 view .LVU338
- 1260              		.loc 1 557 11 is_stmt 0 view .LVU339
- 1261 0002 0268     		ldr	r2, [r0]
- 1262              		.loc 1 557 5 view .LVU340
- 1263 0004 064B     		ldr	r3, .L79
- 1264 0006 9A42     		cmp	r2, r3
- 1265 0008 00D0     		beq	.L78
- 1266              	.LVL82:
- 1267              	.L75:
- 558:Src/stm32f7xx_hal_msp.c ****   {
- 559:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspDeInit 0 */
- 560:Src/stm32f7xx_hal_msp.c **** 
- 561:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspDeInit 0 */
- 562:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
- 563:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_UART8_CLK_DISABLE();
- 564:Src/stm32f7xx_hal_msp.c **** 
- 565:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
- 566:Src/stm32f7xx_hal_msp.c ****     PE0     ------> UART8_RX
- 567:Src/stm32f7xx_hal_msp.c ****     PE1     ------> UART8_TX
- 568:Src/stm32f7xx_hal_msp.c ****     */
- 569:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1);
+ 564:Src/stm32f7xx_hal_msp.c ****     {
+ 1248              		.loc 1 564 8 discriminator 1 view .LVU340
+ 1249 0032 00BB     		cbnz	r0, .L76
+ 1250              	.L73:
  570:Src/stm32f7xx_hal_msp.c **** 
-ARM GAS  /tmp/ccehMqBJ.s 			page 37
+ 1251              		.loc 1 570 5 is_stmt 1 view .LVU341
+ 1252              	.LBB21:
+ 570:Src/stm32f7xx_hal_msp.c **** 
+ 1253              		.loc 1 570 5 view .LVU342
+ 570:Src/stm32f7xx_hal_msp.c **** 
+ 1254              		.loc 1 570 5 view .LVU343
+ARM GAS  /tmp/ccEjAJiv.s 			page 37
 
 
- 571:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspDeInit 1 */
- 572:Src/stm32f7xx_hal_msp.c **** 
- 573:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspDeInit 1 */
- 574:Src/stm32f7xx_hal_msp.c ****   }
- 575:Src/stm32f7xx_hal_msp.c **** 
- 576:Src/stm32f7xx_hal_msp.c **** }
- 1268              		.loc 1 576 1 view .LVU341
- 1269 000a 08BD     		pop	{r3, pc}
- 1270              	.LVL83:
- 1271              	.L78:
- 563:Src/stm32f7xx_hal_msp.c **** 
- 1272              		.loc 1 563 5 is_stmt 1 view .LVU342
- 1273 000c 054A     		ldr	r2, .L79+4
- 1274 000e 136C     		ldr	r3, [r2, #64]
- 1275 0010 23F00043 		bic	r3, r3, #-2147483648
- 1276 0014 1364     		str	r3, [r2, #64]
- 569:Src/stm32f7xx_hal_msp.c **** 
- 1277              		.loc 1 569 5 view .LVU343
- 1278 0016 0321     		movs	r1, #3
- 1279 0018 0348     		ldr	r0, .L79+8
- 1280              	.LVL84:
- 569:Src/stm32f7xx_hal_msp.c **** 
- 1281              		.loc 1 569 5 is_stmt 0 view .LVU344
- 1282 001a FFF7FEFF 		bl	HAL_GPIO_DeInit
- 1283              	.LVL85:
- 1284              		.loc 1 576 1 view .LVU345
- 1285 001e F4E7     		b	.L75
- 1286              	.L80:
- 1287              		.align	2
- 1288              	.L79:
- 1289 0020 007C0040 		.word	1073773568
- 1290 0024 00380240 		.word	1073887232
- 1291 0028 00100240 		.word	1073876992
- 1292              		.cfi_endproc
- 1293              	.LFE1192:
- 1295              		.text
- 1296              	.Letext0:
- 1297              		.file 2 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
- 1298              		.file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 1299              		.file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- 1300              		.file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
- 1301              		.file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
- 1302              		.file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
- 1303              		.file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
- 1304              		.file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
- 1305              		.file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
- 1306              		.file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
- 1307              		.file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
- 1308              		.file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
- 1309              		.file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
- 1310              		.file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
- 1311              		.file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- 1312              		.file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
- 1313              		.file 18 "Inc/main.h"
- 1314              		.file 19 "<built-in>"
-ARM GAS  /tmp/ccehMqBJ.s 			page 38
+ 1255 0034 124B     		ldr	r3, .L77+4
+ 1256 0036 1A6C     		ldr	r2, [r3, #64]
+ 1257 0038 42F00042 		orr	r2, r2, #-2147483648
+ 1258 003c 1A64     		str	r2, [r3, #64]
+ 570:Src/stm32f7xx_hal_msp.c **** 
+ 1259              		.loc 1 570 5 view .LVU344
+ 1260 003e 1A6C     		ldr	r2, [r3, #64]
+ 1261 0040 02F00042 		and	r2, r2, #-2147483648
+ 1262 0044 0192     		str	r2, [sp, #4]
+ 570:Src/stm32f7xx_hal_msp.c **** 
+ 1263              		.loc 1 570 5 view .LVU345
+ 1264 0046 019A     		ldr	r2, [sp, #4]
+ 1265              	.LBE21:
+ 570:Src/stm32f7xx_hal_msp.c **** 
+ 1266              		.loc 1 570 5 view .LVU346
+ 572:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 1267              		.loc 1 572 5 view .LVU347
+ 1268              	.LBB22:
+ 572:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 1269              		.loc 1 572 5 view .LVU348
+ 572:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 1270              		.loc 1 572 5 view .LVU349
+ 1271 0048 1A6B     		ldr	r2, [r3, #48]
+ 1272 004a 42F01002 		orr	r2, r2, #16
+ 1273 004e 1A63     		str	r2, [r3, #48]
+ 572:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 1274              		.loc 1 572 5 view .LVU350
+ 1275 0050 1B6B     		ldr	r3, [r3, #48]
+ 1276 0052 03F01003 		and	r3, r3, #16
+ 1277 0056 0293     		str	r3, [sp, #8]
+ 572:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 1278              		.loc 1 572 5 view .LVU351
+ 1279 0058 029B     		ldr	r3, [sp, #8]
+ 1280              	.LBE22:
+ 572:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 1281              		.loc 1 572 5 view .LVU352
+ 577:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 1282              		.loc 1 577 5 view .LVU353
+ 577:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 1283              		.loc 1 577 25 is_stmt 0 view .LVU354
+ 1284 005a 0323     		movs	r3, #3
+ 1285 005c 2793     		str	r3, [sp, #156]
+ 578:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 1286              		.loc 1 578 5 is_stmt 1 view .LVU355
+ 578:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 1287              		.loc 1 578 26 is_stmt 0 view .LVU356
+ 1288 005e 0222     		movs	r2, #2
+ 1289 0060 2892     		str	r2, [sp, #160]
+ 579:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 1290              		.loc 1 579 5 is_stmt 1 view .LVU357
+ 579:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 1291              		.loc 1 579 26 is_stmt 0 view .LVU358
+ 1292 0062 0022     		movs	r2, #0
+ 1293 0064 2992     		str	r2, [sp, #164]
+ 580:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
+ 1294              		.loc 1 580 5 is_stmt 1 view .LVU359
+ 580:Src/stm32f7xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
+ARM GAS  /tmp/ccEjAJiv.s 			page 38
+
+
+ 1295              		.loc 1 580 27 is_stmt 0 view .LVU360
+ 1296 0066 2A93     		str	r3, [sp, #168]
+ 581:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 1297              		.loc 1 581 5 is_stmt 1 view .LVU361
+ 581:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 1298              		.loc 1 581 31 is_stmt 0 view .LVU362
+ 1299 0068 0823     		movs	r3, #8
+ 1300 006a 2B93     		str	r3, [sp, #172]
+ 582:Src/stm32f7xx_hal_msp.c **** 
+ 1301              		.loc 1 582 5 is_stmt 1 view .LVU363
+ 1302 006c 27A9     		add	r1, sp, #156
+ 1303 006e 0548     		ldr	r0, .L77+8
+ 1304 0070 FFF7FEFF 		bl	HAL_GPIO_Init
+ 1305              	.LVL82:
+ 1306              		.loc 1 590 1 is_stmt 0 view .LVU364
+ 1307 0074 D5E7     		b	.L71
+ 1308              	.L76:
+ 566:Src/stm32f7xx_hal_msp.c ****     }
+ 1309              		.loc 1 566 7 is_stmt 1 view .LVU365
+ 1310 0076 FFF7FEFF 		bl	Error_Handler
+ 1311              	.LVL83:
+ 1312 007a DBE7     		b	.L73
+ 1313              	.L78:
+ 1314              		.align	2
+ 1315              	.L77:
+ 1316 007c 007C0040 		.word	1073773568
+ 1317 0080 00380240 		.word	1073887232
+ 1318 0084 00100240 		.word	1073876992
+ 1319              		.cfi_endproc
+ 1320              	.LFE1191:
+ 1322              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
+ 1323              		.align	1
+ 1324              		.global	HAL_UART_MspDeInit
+ 1325              		.syntax unified
+ 1326              		.thumb
+ 1327              		.thumb_func
+ 1329              	HAL_UART_MspDeInit:
+ 1330              	.LVL84:
+ 1331              	.LFB1192:
+ 591:Src/stm32f7xx_hal_msp.c **** 
+ 592:Src/stm32f7xx_hal_msp.c **** /**
+ 593:Src/stm32f7xx_hal_msp.c ****   * @brief UART MSP De-Initialization
+ 594:Src/stm32f7xx_hal_msp.c ****   * This function freeze the hardware resources used in this example
+ 595:Src/stm32f7xx_hal_msp.c ****   * @param huart: UART handle pointer
+ 596:Src/stm32f7xx_hal_msp.c ****   * @retval None
+ 597:Src/stm32f7xx_hal_msp.c ****   */
+ 598:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+ 599:Src/stm32f7xx_hal_msp.c **** {
+ 1332              		.loc 1 599 1 view -0
+ 1333              		.cfi_startproc
+ 1334              		@ args = 0, pretend = 0, frame = 0
+ 1335              		@ frame_needed = 0, uses_anonymous_args = 0
+ 1336              		.loc 1 599 1 is_stmt 0 view .LVU367
+ 1337 0000 08B5     		push	{r3, lr}
+ 1338              	.LCFI25:
+ 1339              		.cfi_def_cfa_offset 8
+ 1340              		.cfi_offset 3, -8
+ARM GAS  /tmp/ccEjAJiv.s 			page 39
+
+
+ 1341              		.cfi_offset 14, -4
+ 600:Src/stm32f7xx_hal_msp.c ****   if(huart->Instance==UART8)
+ 1342              		.loc 1 600 3 is_stmt 1 view .LVU368
+ 1343              		.loc 1 600 11 is_stmt 0 view .LVU369
+ 1344 0002 0268     		ldr	r2, [r0]
+ 1345              		.loc 1 600 5 view .LVU370
+ 1346 0004 064B     		ldr	r3, .L83
+ 1347 0006 9A42     		cmp	r2, r3
+ 1348 0008 00D0     		beq	.L82
+ 1349              	.LVL85:
+ 1350              	.L79:
+ 601:Src/stm32f7xx_hal_msp.c ****   {
+ 602:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspDeInit 0 */
+ 603:Src/stm32f7xx_hal_msp.c **** 
+ 604:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspDeInit 0 */
+ 605:Src/stm32f7xx_hal_msp.c ****     /* Peripheral clock disable */
+ 606:Src/stm32f7xx_hal_msp.c ****     __HAL_RCC_UART8_CLK_DISABLE();
+ 607:Src/stm32f7xx_hal_msp.c **** 
+ 608:Src/stm32f7xx_hal_msp.c ****     /**UART8 GPIO Configuration
+ 609:Src/stm32f7xx_hal_msp.c ****     PE0     ------> UART8_RX
+ 610:Src/stm32f7xx_hal_msp.c ****     PE1     ------> UART8_TX
+ 611:Src/stm32f7xx_hal_msp.c ****     */
+ 612:Src/stm32f7xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1);
+ 613:Src/stm32f7xx_hal_msp.c **** 
+ 614:Src/stm32f7xx_hal_msp.c ****     /* USER CODE BEGIN UART8_MspDeInit 1 */
+ 615:Src/stm32f7xx_hal_msp.c **** 
+ 616:Src/stm32f7xx_hal_msp.c ****     /* USER CODE END UART8_MspDeInit 1 */
+ 617:Src/stm32f7xx_hal_msp.c ****   }
+ 618:Src/stm32f7xx_hal_msp.c **** 
+ 619:Src/stm32f7xx_hal_msp.c **** }
+ 1351              		.loc 1 619 1 view .LVU371
+ 1352 000a 08BD     		pop	{r3, pc}
+ 1353              	.LVL86:
+ 1354              	.L82:
+ 606:Src/stm32f7xx_hal_msp.c **** 
+ 1355              		.loc 1 606 5 is_stmt 1 view .LVU372
+ 1356 000c 054A     		ldr	r2, .L83+4
+ 1357 000e 136C     		ldr	r3, [r2, #64]
+ 1358 0010 23F00043 		bic	r3, r3, #-2147483648
+ 1359 0014 1364     		str	r3, [r2, #64]
+ 612:Src/stm32f7xx_hal_msp.c **** 
+ 1360              		.loc 1 612 5 view .LVU373
+ 1361 0016 0321     		movs	r1, #3
+ 1362 0018 0348     		ldr	r0, .L83+8
+ 1363              	.LVL87:
+ 612:Src/stm32f7xx_hal_msp.c **** 
+ 1364              		.loc 1 612 5 is_stmt 0 view .LVU374
+ 1365 001a FFF7FEFF 		bl	HAL_GPIO_DeInit
+ 1366              	.LVL88:
+ 1367              		.loc 1 619 1 view .LVU375
+ 1368 001e F4E7     		b	.L79
+ 1369              	.L84:
+ 1370              		.align	2
+ 1371              	.L83:
+ 1372 0020 007C0040 		.word	1073773568
+ 1373 0024 00380240 		.word	1073887232
+ 1374 0028 00100240 		.word	1073876992
+ARM GAS  /tmp/ccEjAJiv.s 			page 40
+
+
+ 1375              		.cfi_endproc
+ 1376              	.LFE1192:
+ 1378              		.text
+ 1379              	.Letext0:
+ 1380              		.file 2 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
+ 1381              		.file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
+ 1382              		.file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
+ 1383              		.file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
+ 1384              		.file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
+ 1385              		.file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
+ 1386              		.file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
+ 1387              		.file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
+ 1388              		.file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
+ 1389              		.file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
+ 1390              		.file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
+ 1391              		.file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
+ 1392              		.file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
+ 1393              		.file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
+ 1394              		.file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
+ 1395              		.file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
+ 1396              		.file 18 "Inc/main.h"
+ 1397              		.file 19 "<built-in>"
+ARM GAS  /tmp/ccEjAJiv.s 			page 41
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 stm32f7xx_hal_msp.c
-     /tmp/ccehMqBJ.s:20     .text.HAL_MspInit:00000000 $t
-     /tmp/ccehMqBJ.s:26     .text.HAL_MspInit:00000000 HAL_MspInit
-     /tmp/ccehMqBJ.s:76     .text.HAL_MspInit:0000002c $d
-     /tmp/ccehMqBJ.s:81     .text.HAL_ADC_MspInit:00000000 $t
-     /tmp/ccehMqBJ.s:87     .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
-     /tmp/ccehMqBJ.s:318    .text.HAL_ADC_MspInit:000000f4 $d
-     /tmp/ccehMqBJ.s:329    .text.HAL_ADC_MspDeInit:00000000 $t
-     /tmp/ccehMqBJ.s:335    .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
-     /tmp/ccehMqBJ.s:408    .text.HAL_ADC_MspDeInit:00000050 $d
-     /tmp/ccehMqBJ.s:418    .text.HAL_SD_MspInit:00000000 $t
-     /tmp/ccehMqBJ.s:424    .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
-     /tmp/ccehMqBJ.s:600    .text.HAL_SD_MspInit:000000a8 $d
-     /tmp/ccehMqBJ.s:608    .text.HAL_SD_MspDeInit:00000000 $t
-     /tmp/ccehMqBJ.s:614    .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
-     /tmp/ccehMqBJ.s:662    .text.HAL_SD_MspDeInit:0000002c $d
-     /tmp/ccehMqBJ.s:670    .text.HAL_TIM_Base_MspInit:00000000 $t
-     /tmp/ccehMqBJ.s:676    .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
-     /tmp/ccehMqBJ.s:839    .text.HAL_TIM_Base_MspInit:000000ac $d
-     /tmp/ccehMqBJ.s:848    .text.HAL_TIM_MspPostInit:00000000 $t
-     /tmp/ccehMqBJ.s:854    .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
-     /tmp/ccehMqBJ.s:983    .text.HAL_TIM_MspPostInit:0000007c $d
-     /tmp/ccehMqBJ.s:991    .text.HAL_TIM_Base_MspDeInit:00000000 $t
-     /tmp/ccehMqBJ.s:997    .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
-     /tmp/ccehMqBJ.s:1089   .text.HAL_TIM_Base_MspDeInit:00000068 $d
-     /tmp/ccehMqBJ.s:1097   .text.HAL_UART_MspInit:00000000 $t
-     /tmp/ccehMqBJ.s:1103   .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
-     /tmp/ccehMqBJ.s:1233   .text.HAL_UART_MspInit:0000007c $d
-     /tmp/ccehMqBJ.s:1240   .text.HAL_UART_MspDeInit:00000000 $t
-     /tmp/ccehMqBJ.s:1246   .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
-     /tmp/ccehMqBJ.s:1289   .text.HAL_UART_MspDeInit:00000020 $d
+     /tmp/ccEjAJiv.s:20     .text.HAL_MspInit:00000000 $t
+     /tmp/ccEjAJiv.s:26     .text.HAL_MspInit:00000000 HAL_MspInit
+     /tmp/ccEjAJiv.s:76     .text.HAL_MspInit:0000002c $d
+     /tmp/ccEjAJiv.s:81     .text.HAL_ADC_MspInit:00000000 $t
+     /tmp/ccEjAJiv.s:87     .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
+     /tmp/ccEjAJiv.s:318    .text.HAL_ADC_MspInit:000000f4 $d
+     /tmp/ccEjAJiv.s:329    .text.HAL_ADC_MspDeInit:00000000 $t
+     /tmp/ccEjAJiv.s:335    .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
+     /tmp/ccEjAJiv.s:408    .text.HAL_ADC_MspDeInit:00000050 $d
+     /tmp/ccEjAJiv.s:418    .text.HAL_SD_MspInit:00000000 $t
+     /tmp/ccEjAJiv.s:424    .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
+     /tmp/ccEjAJiv.s:600    .text.HAL_SD_MspInit:000000a8 $d
+     /tmp/ccEjAJiv.s:608    .text.HAL_SD_MspDeInit:00000000 $t
+     /tmp/ccEjAJiv.s:614    .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
+     /tmp/ccEjAJiv.s:662    .text.HAL_SD_MspDeInit:0000002c $d
+     /tmp/ccEjAJiv.s:670    .text.HAL_TIM_Base_MspInit:00000000 $t
+     /tmp/ccEjAJiv.s:676    .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
+     /tmp/ccEjAJiv.s:860    .text.HAL_TIM_Base_MspInit:000000c8 $d
+     /tmp/ccEjAJiv.s:870    .text.HAL_TIM_MspPostInit:00000000 $t
+     /tmp/ccEjAJiv.s:876    .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
+     /tmp/ccEjAJiv.s:1053   .text.HAL_TIM_MspPostInit:000000b0 $d
+     /tmp/ccEjAJiv.s:1063   .text.HAL_TIM_Base_MspDeInit:00000000 $t
+     /tmp/ccEjAJiv.s:1069   .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
+     /tmp/ccEjAJiv.s:1171   .text.HAL_TIM_Base_MspDeInit:0000007c $d
+     /tmp/ccEjAJiv.s:1180   .text.HAL_UART_MspInit:00000000 $t
+     /tmp/ccEjAJiv.s:1186   .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
+     /tmp/ccEjAJiv.s:1316   .text.HAL_UART_MspInit:0000007c $d
+     /tmp/ccEjAJiv.s:1323   .text.HAL_UART_MspDeInit:00000000 $t
+     /tmp/ccEjAJiv.s:1329   .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
+     /tmp/ccEjAJiv.s:1372   .text.HAL_UART_MspDeInit:00000020 $d
 
 UNDEFINED SYMBOLS
 HAL_GPIO_Init
diff --git a/build/stm32f7xx_hal_msp.o b/build/stm32f7xx_hal_msp.o
index f0c305bf160ddbb480cf7465617a461745947333..c8ac0032096d384af0e25609f99e016fd88db83e 100644
GIT binary patch
delta 4930
zcmZvf3vg7`8OP5#cki-b2*HF$lFhQa_hvWYk%WLeQ%C~k5iB4<#1N56262d1ON@{Q
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zQIg-#FXY^i_6*HH@@iX()WKAS*zwMs!-j0qpXX)jf(Lwe6_8ho`3#;>KXJ*pEOM_D
zToKQ*UFyn=>EDytUPgtY87rvtj%K@t3ds!WanzU~zZoSObC~?~LUj-G6#P2$fZtC8
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zzE-yROtQ`IkL}lB&t>Kdu@2;|$Tpv{e)Ju?46KR2c<am**{CnywJDYppj}G8+@qPf
zbo5}~4mN<lgx<oWY3>5|Ftdd?2>lrBKY*_@sr_m29VYejiEGEic?kc3V9@Ue2lN3`
zm=q9#oek!}KNa>g@J9G=gIxzc0=@vg>M%xMZ*W{>Qb%7h2hy(z*u|t7rUhLN1+$pc
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zPc}FSyalWQW5gJDyonvOyMF;b#-tHH$s~Oj>^<O%OltpU@DosmU4NKKal@HDA@aaN
zCgm-HJ~K>r8g|TqFdxG0ObT2MR>R)_dp-Ct{7=Gu8r%*4%dn4te}w;S*#8X2+>Y8H
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z*bF`gJ`e5#4}h<MC&1I-8z5hp`4nCNFM(G)IL6&@7<5v&VG@`E4h8)nU$(j355Vc*
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zmo4$<Yhs2<tI&}(bJfBMT}!B`&?gB`Rp`NMhs!oyver`jD)frA5%U1;fK$48t!2Jn
zA;eI9m}+Y%cauI#jXEo|w=SZ5rp_ZIEzyhWB6K%ztc$9VOZ4u#i1#S<Kh@T6)rHNm
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z=VHhC4LPgt*U1eLGcbm30(xSDrIKp((uRmSKT&Taj4RjsNnTb?e`2*<ld3;$NKuuw
rx{I9K7Yb46Br0l5QGZ>i=Qc*nql@Vun|`h_Rc|5ZH?{hi#=-vsnzlJ3

delta 4482
zcmai%4Nz3q701tgZy(`95QOrvP~6?O?y_P4AqqC60y>EiMG<2Fi9sbPMntE6p?s{P
zRca+xJhmnpqh^eWO09OSO{-CyI?;}42d2>`)lp*`scp<?)mqD_J!jv6l9|kOXYT#o
zbN=_9d*0rA_uc*LBXy)#ZE|St<%eB|H2>N|daZ9F7DaTWQ5_qs%`PvsbGnQ}Fa6ur
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z3)#V5cOgeZE!Zn5*o*26>U^#zGT3dE%j&ku)KL$1vj@9b^#?r=3b<1@pSDwSMpqKm
z30+~q6cdW=^Eny&+~oOv$xOMsYO#)*X~QQ_-xocB)9S$-TlzEIJ#dm@6~F{l0C`#g
z*tCMsU+T4q6fvxe>&UJIs^fxna#!ew+Py*9v2`Xrd@P=^r6*|j78RA%nRi#2Wi?iI
zp9Qn)wVl$gnSm3AN>S<9>9kXQ(fO3tt1!lu<n2}I&!zx;002j*xU?hy^-#s(U;wSX
z#`R?^*^d;Kx>D3&taqix#%RVI9YAmIY5}*M#(ZkxPFI!xm<my3K?9WwRMf6-0}NFf
zwT`JQHdy}`Demu5Rh$gaOirhos)ddK_cZZsvV7`!aJ(um>Y^qB#M$0V07zA*!YE{`
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zEkI~+0rYSf3XU{Vv3J-A`&y3Tb^@dYqx{3mLH<O}b6Ds}R|{}~Csnm!n<rH};J^+~
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z;N}e1pgC3t1_jN?aX6@@L30|@ZMAJoUPbm}cSGVt4ozVhtPKpyHh+O6Gx!t^l-cI9
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z_|J;{u|+?e7vZ`He;3{nzm0xMc><Skw6IM0s&I{P3zHJq!HfaeEqs?r4{}U+GDttb
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zzeDVgg`W!_36q`HL>?yf&tTH#%odJjQo;qI7mGbbIGyO{0gKo{Y!kjO{2h}5cQZo)
z&I><dQsBRc{*~DO6y6tqh|3xmE{tVTJbtTiJg<wc58TKSp+JQ3!pY))N$lCe*Tlb4
z>=t3G__vC^UARa5N5t+He&wR|=L90?#lajdd`4I)TrT_}lb&D`(*W2ae1l2f$U9>1
z75<z_{ZEShTj5#pUksDR6*I7L;YZ5P*GN8&mxW&lZwMa<9|~=n)jw32C`=LZ+mPdV
zg?v-w(=<+4ESzG|4=;*irf{zCd%}gn#X`Pha=@*^w}tNre<3_7{7`sG*eyICBrV4!
zaa<MN65bW|3Lgvk2FJ%YS!fEqLcYtfK2A7MSR$My<i8o3pE}MH#{wZ=?)W^f7q$z3
zBHSU|E!;0WC_F0sjgaq!9Pgs=n(#W&&%#Y{+!iXEHNX%K5=ILhLbs6bi+r4Og=2-|
zgnV^meXj5|VZDuyBMB|ySS?&Hd|kLhxLf$XutUf<Og>F#g<Zl=gqMU@g*SvZZE_s%
ziQ|EgZ>Jp4E_4cq2}cRX2n&Sch0}%Q!k2|}g?xGB<Lq}xqgA*;h{COb$fcPo=^W=p
zr)nCz?Er_F^pC43@WL{`uAMH&3oA-ATLpSnmT2w@Tt=8wfgi0Lt~&AdN>i(<!1zXw
zv58i=4GSAhqpboU8s||fg<>~gd!wnnRe?tvJ=zu<UM3u=z>p@7O2H?ayxJ!fIHSoE
zGJ)p3ZsO`DmvM;#q~X3MQ)S@qo4m%Ebb$BpL6d3N>gkq;&Sul79|=&4-P2>SsySM#
zS&a3~9^(Qz%Y)7iavoodC&-zRO>cg@(M*{x!KfCGwmlC=6aH3;vsyexH2r_h!^10L
u@vW9<tz!uuB<F-Odi4YYeM!!yGJHhNx)%XvV5vVA^Zn7<q@`HmkN+>CXWQ5S

diff --git a/build/stm32f7xx_it.lst b/build/stm32f7xx_it.lst
index 94f5d85..d045abb 100644
--- a/build/stm32f7xx_it.lst
+++ b/build/stm32f7xx_it.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccdl7gEi.s 			page 1
+ARM GAS  /tmp/cczi2eQD.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   29:Src/stm32f7xx_it.c **** 
   30:Src/stm32f7xx_it.c **** /* USER CODE END TD */
   31:Src/stm32f7xx_it.c **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 2
+ARM GAS  /tmp/cczi2eQD.s 			page 2
 
 
   32:Src/stm32f7xx_it.c **** /* Private define ------------------------------------------------------------*/
@@ -118,7 +118,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   33              		@ link register save eliminated.
   34              	.L2:
   81:Src/stm32f7xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-ARM GAS  /tmp/ccdl7gEi.s 			page 3
+ARM GAS  /tmp/cczi2eQD.s 			page 3
 
 
   82:Src/stm32f7xx_it.c **** 
@@ -178,7 +178,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   68              		.syntax unified
   69              		.thumb
   70              		.thumb_func
-ARM GAS  /tmp/ccdl7gEi.s 			page 4
+ARM GAS  /tmp/cczi2eQD.s 			page 4
 
 
   72              	MemManage_Handler:
@@ -238,7 +238,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  127:Src/stm32f7xx_it.c **** 
  128:Src/stm32f7xx_it.c ****   /* USER CODE END BusFault_IRQn 0 */
  129:Src/stm32f7xx_it.c ****   while (1)
-ARM GAS  /tmp/ccdl7gEi.s 			page 5
+ARM GAS  /tmp/cczi2eQD.s 			page 5
 
 
  104              		.loc 1 129 3 view .LVU13
@@ -298,7 +298,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  141              	SVC_Handler:
  142              	.LFB1188:
  149:Src/stm32f7xx_it.c **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 6
+ARM GAS  /tmp/cczi2eQD.s 			page 6
 
 
  150:Src/stm32f7xx_it.c **** 
@@ -358,7 +358,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  174              		.global	PendSV_Handler
  175              		.syntax unified
  176              		.thumb
-ARM GAS  /tmp/ccdl7gEi.s 			page 7
+ARM GAS  /tmp/cczi2eQD.s 			page 7
 
 
  177              		.thumb_func
@@ -418,7 +418,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  211              	.LVL0:
  199:Src/stm32f7xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 1 */
  200:Src/stm32f7xx_it.c **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 8
+ARM GAS  /tmp/cczi2eQD.s 			page 8
 
 
  201:Src/stm32f7xx_it.c ****   /* USER CODE END SysTick_IRQn 1 */
@@ -478,7 +478,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  244 000e 08BD     		pop	{r3, pc}
  245              	.L19:
  246              		.align	2
-ARM GAS  /tmp/ccdl7gEi.s 			page 9
+ARM GAS  /tmp/cczi2eQD.s 			page 9
 
 
  247              	.L18:
@@ -538,7 +538,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  239:Src/stm32f7xx_it.c ****   /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */
  240:Src/stm32f7xx_it.c **** 
  241:Src/stm32f7xx_it.c ****   /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
-ARM GAS  /tmp/ccdl7gEi.s 			page 10
+ARM GAS  /tmp/cczi2eQD.s 			page 10
 
 
  242:Src/stm32f7xx_it.c **** }
@@ -598,7 +598,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  333              		.loc 1 251 2 is_stmt 1 view .LVU47
  334              		.loc 1 251 7 is_stmt 0 view .LVU48
  335 000c 0749     		ldr	r1, .L28+4
-ARM GAS  /tmp/ccdl7gEi.s 			page 11
+ARM GAS  /tmp/cczi2eQD.s 			page 11
 
 
  336 000e 0A68     		ldr	r2, [r1]
@@ -658,7 +658,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  269:Src/stm32f7xx_it.c **** 
  270:Src/stm32f7xx_it.c ****   /* USER CODE END TIM2_IRQn 1 */
  271:Src/stm32f7xx_it.c **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 12
+ARM GAS  /tmp/cczi2eQD.s 			page 12
 
 
  375              		.loc 1 271 1 view .LVU56
@@ -718,7 +718,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  314:Src/stm32f7xx_it.c ****         //UART_transmission_busy = 0;
  315:Src/stm32f7xx_it.c ****       }
  316:Src/stm32f7xx_it.c ****     }
-ARM GAS  /tmp/ccdl7gEi.s 			page 13
+ARM GAS  /tmp/cczi2eQD.s 			page 13
 
 
  317:Src/stm32f7xx_it.c ****   }
@@ -778,7 +778,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  411              	.LVL5:
  349:Src/stm32f7xx_it.c **** 			HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_RESET);
  412              		.loc 1 349 4 view .LVU62
-ARM GAS  /tmp/ccdl7gEi.s 			page 14
+ARM GAS  /tmp/cczi2eQD.s 			page 14
 
 
  413 0016 0C4C     		ldr	r4, .L36
@@ -838,7 +838,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  452              	.L36:
  453 0048 00000000 		.word	LD_blinker
  454 004c 00000000 		.word	htim8
-ARM GAS  /tmp/ccdl7gEi.s 			page 15
+ARM GAS  /tmp/cczi2eQD.s 			page 15
 
 
  455              		.cfi_endproc
@@ -898,7 +898,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  494              		.cfi_offset 14, -4
  379:Src/stm32f7xx_it.c ****   /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
  380:Src/stm32f7xx_it.c **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 16
+ARM GAS  /tmp/cczi2eQD.s 			page 16
 
 
  381:Src/stm32f7xx_it.c ****   /* USER CODE END TIM6_DAC_IRQn 0 */
@@ -958,7 +958,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x00U,   /* 0: TIMx_CH1  */
   48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x00U,   /* 1: TIMx_CH1N */
   49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x00U,   /* 2: TIMx_CH2  */
-ARM GAS  /tmp/ccdl7gEi.s 			page 17
+ARM GAS  /tmp/cczi2eQD.s 			page 17
 
 
   50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   0x00U,   /* 3: TIMx_CH2N */
@@ -1018,7 +1018,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   5U,            /* 5: OIS3N */
  105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   6U,            /* 6: OIS4 */
  106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   8U,            /* 7: OIS5 */
-ARM GAS  /tmp/ccdl7gEi.s 			page 18
+ARM GAS  /tmp/cczi2eQD.s 			page 18
 
 
  107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   10U            /* 8: OIS6 */
@@ -1078,7 +1078,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3N
  162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
  163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH5
-ARM GAS  /tmp/ccdl7gEi.s 			page 19
+ARM GAS  /tmp/cczi2eQD.s 			page 19
 
 
  164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
@@ -1138,7 +1138,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    Auto-Reload Register at the next update event.
  219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    This parameter must be a number between Min_Data=0x0000 and Max_
  220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    Some timer instances may support 32 bits counters. In that case 
-ARM GAS  /tmp/ccdl7gEi.s 			page 20
+ARM GAS  /tmp/cczi2eQD.s 			page 20
 
 
  221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                    be a number between 0x0000 and 0xFFFFFFFF.
@@ -1198,7 +1198,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t OCPolarity;    /*!< Specifies the output polarity.
  277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
-ARM GAS  /tmp/ccdl7gEi.s 			page 21
+ARM GAS  /tmp/cczi2eQD.s 			page 21
 
 
  278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -1258,7 +1258,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_IC_InitTypeDef;
  333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 22
+ARM GAS  /tmp/cczi2eQD.s 			page 22
 
 
  335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -1318,7 +1318,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                  This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
  390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                  This feature can be modified afterwards using unitary function
-ARM GAS  /tmp/ccdl7gEi.s 			page 23
+ARM GAS  /tmp/cczi2eQD.s 			page 23
 
 
  392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                  @ref LL_TIM_IC_SetFilter().*/
@@ -1378,7 +1378,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t OSSIState;            /*!< Specifies the Off-State used in Idle state.
  447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       This parameter can be a value of @ref TIM_LL_EC_OSSI
  448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 24
+ARM GAS  /tmp/cczi2eQD.s 			page 24
 
 
  449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       This feature can be modified afterwards using unitary functio
@@ -1438,7 +1438,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       @note This bit-field can not be modified as long as LOCK leve
  505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****                                       programmed. */
-ARM GAS  /tmp/ccdl7gEi.s 			page 25
+ARM GAS  /tmp/cczi2eQD.s 			page 25
 
 
  506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -1498,7 +1498,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1OF                        TIM_SR_CC1OF         /*!< Capture/Compare 1 overcapt
  561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2OF                        TIM_SR_CC2OF         /*!< Capture/Compare 2 overcapt
  562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3OF                        TIM_SR_CC3OF         /*!< Capture/Compare 3 overcapt
-ARM GAS  /tmp/ccdl7gEi.s 			page 26
+ARM GAS  /tmp/cczi2eQD.s 			page 26
 
 
  563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4OF                        TIM_SR_CC4OF         /*!< Capture/Compare 4 overcapt
@@ -1558,7 +1558,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_REGULAR            0x00000000U          /*!< Counter overflow/underflow
  618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_COUNTER            TIM_CR1_URS          /*!< Only counter overflow/unde
  619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 27
+ARM GAS  /tmp/cczi2eQD.s 			page 27
 
 
  620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @}
@@ -1618,7 +1618,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
  675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_CC                 0x00000000U          /*!< CCx DMA request sent when 
  676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_UPDATE             TIM_CR2_CCDS         /*!< CCx DMA requests sent when
-ARM GAS  /tmp/ccdl7gEi.s 			page 28
+ARM GAS  /tmp/cczi2eQD.s 			page 28
 
 
  677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -1678,7 +1678,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FROZEN                   0x00000000U                                         
  732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ACTIVE                   TIM_CCMR1_OC1M_0                                    
  733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_INACTIVE                 TIM_CCMR1_OC1M_1                                    
-ARM GAS  /tmp/ccdl7gEi.s 			page 29
+ARM GAS  /tmp/cczi2eQD.s 			page 29
 
 
  734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_TOGGLE                   (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)               
@@ -1738,7 +1738,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler
  789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
  790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 30
+ARM GAS  /tmp/cczi2eQD.s 			page 30
 
 
  791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV1                      0x00000000U                    /*!< No prescaler, ca
@@ -1798,7 +1798,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X2_TI1                     TIM_SMCR_SMS_0                               
  846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X2_TI2                     TIM_SMCR_SMS_1                               
  847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X4_TI12                   (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)             
-ARM GAS  /tmp/ccdl7gEi.s 			page 31
+ARM GAS  /tmp/cczi2eQD.s 			page 31
 
 
  848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -1858,7 +1858,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TS Trigger Selection
  903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
  904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 32
+ARM GAS  /tmp/cczi2eQD.s 			page 32
 
 
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR0                         0x00000000U                                         
@@ -1918,7 +1918,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
  961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_POLARITY break polarity
-ARM GAS  /tmp/ccdl7gEi.s 			page 33
+ARM GAS  /tmp/cczi2eQD.s 			page 33
 
 
  962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
@@ -1978,7 +1978,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV16_N6         0x00B00000U   /*!< fSAMPLING=fDTS/16, N=6 */
 1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV16_N8         0x00C00000U   /*!< fSAMPLING=fDTS/16, N=8 */
 1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N5         0x00D00000U   /*!< fSAMPLING=fDTS/32, N=5 */
-ARM GAS  /tmp/ccdl7gEi.s 			page 34
+ARM GAS  /tmp/cczi2eQD.s 			page 34
 
 
 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N6         0x00E00000U   /*!< fSAMPLING=fDTS/32, N=6 */
@@ -2038,7 +2038,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR1           0x00000000U                                         
-ARM GAS  /tmp/ccdl7gEi.s 			page 35
+ARM GAS  /tmp/cczi2eQD.s 			page 35
 
 
 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR2           TIM_DCR_DBA_0                                       
@@ -2098,7 +2098,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TIM2_ITR1_RMP_TIM8  TIM2 Internal Trigger1 Remap TIM8
 1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
-ARM GAS  /tmp/ccdl7gEi.s 			page 36
+ARM GAS  /tmp/cczi2eQD.s 			page 36
 
 
 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
@@ -2158,7 +2158,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Read a value in TIM register.
 1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __INSTANCE__ TIM Instance
 1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __REG__ Register to be read
-ARM GAS  /tmp/ccdl7gEi.s 			page 37
+ARM GAS  /tmp/cczi2eQD.s 			page 37
 
 
 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Register value
@@ -2218,7 +2218,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  HELPER macro calculating the auto-reload value to achieve the required output signal fr
 1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
 1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __TIMCLK__ timer input clock frequency (in Hz)
-ARM GAS  /tmp/ccdl7gEi.s 			page 38
+ARM GAS  /tmp/cczi2eQD.s 			page 38
 
 
 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  __PSC__ prescaler
@@ -2278,7 +2278,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
 1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 39
+ARM GAS  /tmp/cczi2eQD.s 			page 39
 
 
 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration
@@ -2338,7 +2338,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
 1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 40
+ARM GAS  /tmp/cczi2eQD.s 			page 40
 
 
 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -2398,7 +2398,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
 1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 41
+ARM GAS  /tmp/cczi2eQD.s 			page 41
 
 
 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
@@ -2458,7 +2458,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)
 1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 42
+ARM GAS  /tmp/cczi2eQD.s 			page 42
 
 
 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t counter_mode;
@@ -2518,7 +2518,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
 1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
-ARM GAS  /tmp/ccdl7gEi.s 			page 43
+ARM GAS  /tmp/cczi2eQD.s 			page 43
 
 
 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
@@ -2578,7 +2578,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR1          DIR           LL_TIM_GetDirection
 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Returned value can be one of the following values:
-ARM GAS  /tmp/ccdl7gEi.s 			page 44
+ARM GAS  /tmp/cczi2eQD.s 			page 44
 
 
 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_COUNTERDIRECTION_UP
@@ -2638,7 +2638,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
 1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance supports a 32 bits counter.
 1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
-ARM GAS  /tmp/ccdl7gEi.s 			page 45
+ARM GAS  /tmp/cczi2eQD.s 			page 45
 
 
 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Auto-reload value
@@ -2698,7 +2698,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
 1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
-ARM GAS  /tmp/ccdl7gEi.s 			page 46
+ARM GAS  /tmp/cczi2eQD.s 			page 46
 
 
 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -2758,7 +2758,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)
 1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);
-ARM GAS  /tmp/ccdl7gEi.s 			page 47
+ARM GAS  /tmp/cczi2eQD.s 			page 47
 
 
 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -2818,7 +2818,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_LOCKLEVEL_1
 1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_LOCKLEVEL_2
 1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_LOCKLEVEL_3
-ARM GAS  /tmp/ccdl7gEi.s 			page 48
+ARM GAS  /tmp/cczi2eQD.s 			page 48
 
 
 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
@@ -2878,7 +2878,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3N
 1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
 1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH5
-ARM GAS  /tmp/ccdl7gEi.s 			page 49
+ARM GAS  /tmp/cczi2eQD.s 			page 49
 
 
 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
@@ -2938,7 +2938,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC3P          LL_TIM_OC_ConfigOutput\n
 1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC4P          LL_TIM_OC_ConfigOutput\n
 1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC5P          LL_TIM_OC_ConfigOutput\n
-ARM GAS  /tmp/ccdl7gEi.s 			page 50
+ARM GAS  /tmp/cczi2eQD.s 			page 50
 
 
 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC6P          LL_TIM_OC_ConfigOutput\n
@@ -2998,7 +2998,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
 1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_PWM1
 1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_PWM2
-ARM GAS  /tmp/ccdl7gEi.s 			page 51
+ARM GAS  /tmp/cczi2eQD.s 			page 51
 
 
 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
@@ -3058,7 +3058,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set the polarity of an output channel.
 2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCER         CC1P          LL_TIM_OC_SetPolarity\n
-ARM GAS  /tmp/ccdl7gEi.s 			page 52
+ARM GAS  /tmp/cczi2eQD.s 			page 52
 
 
 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC1NP         LL_TIM_OC_SetPolarity\n
@@ -3118,7 +3118,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_OCPOLARITY_LOW
 2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
-ARM GAS  /tmp/ccdl7gEi.s 			page 53
+ARM GAS  /tmp/cczi2eQD.s 			page 53
 
 
 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -3178,7 +3178,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  Channel This parameter can be one of the following values:
 2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1
 2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1N
-ARM GAS  /tmp/ccdl7gEi.s 			page 54
+ARM GAS  /tmp/cczi2eQD.s 			page 54
 
 
 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
@@ -3238,7 +3238,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1
 2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
-ARM GAS  /tmp/ccdl7gEi.s 			page 55
+ARM GAS  /tmp/cczi2eQD.s 			page 55
 
 
 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
@@ -3298,7 +3298,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH6
 2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 56
+ARM GAS  /tmp/cczi2eQD.s 			page 56
 
 
 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
@@ -3358,7 +3358,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 57
+ARM GAS  /tmp/cczi2eQD.s 			page 57
 
 
 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
@@ -3418,7 +3418,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 58
+ARM GAS  /tmp/cczi2eQD.s 			page 58
 
 
 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicates clearing the output channel on an external event is enabled for the output ch
@@ -3478,7 +3478,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  CompareValue between Min_Data=0 and Max_Data=65535
 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 59
+ARM GAS  /tmp/cczi2eQD.s 			page 59
 
 
 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
@@ -3538,7 +3538,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 60
+ARM GAS  /tmp/cczi2eQD.s 			page 60
 
 
 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Set compare value for output channel 5 (TIMx_CCR5).
@@ -3598,7 +3598,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (uint32_t)(READ_REG(TIMx->CCR2));
-ARM GAS  /tmp/ccdl7gEi.s 			page 61
+ARM GAS  /tmp/cczi2eQD.s 			page 61
 
 
 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -3658,7 +3658,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)
 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 62
+ARM GAS  /tmp/cczi2eQD.s 			page 62
 
 
 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return (uint32_t)(READ_REG(TIMx->CCR6));
@@ -3718,7 +3718,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH1
 2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH2
 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
-ARM GAS  /tmp/ccdl7gEi.s 			page 63
+ARM GAS  /tmp/cczi2eQD.s 			page 63
 
 
 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
@@ -3778,7 +3778,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH3
 2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Returned value can be one of the following values:
-ARM GAS  /tmp/ccdl7gEi.s 			page 64
+ARM GAS  /tmp/cczi2eQD.s 			page 64
 
 
 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
@@ -3838,7 +3838,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)
 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 65
+ARM GAS  /tmp/cczi2eQD.s 			page 65
 
 
 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
@@ -3898,7 +3898,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_CHANNEL_CH4
 2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval Returned value can be one of the following values:
 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV1
-ARM GAS  /tmp/ccdl7gEi.s 			page 66
+ARM GAS  /tmp/cczi2eQD.s 			page 66
 
 
 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
@@ -3958,7 +3958,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CCER         CC1P          LL_TIM_IC_GetPolarity\n
 2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC1NP         LL_TIM_IC_GetPolarity\n
 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2P          LL_TIM_IC_GetPolarity\n
-ARM GAS  /tmp/ccdl7gEi.s 			page 67
+ARM GAS  /tmp/cczi2eQD.s 			page 67
 
 
 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         CCER         CC2NP         LL_TIM_IC_GetPolarity\n
@@ -4018,7 +4018,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval State of bit (1 or 0).
 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 68
+ARM GAS  /tmp/cczi2eQD.s 			page 68
 
 
 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
@@ -4078,7 +4078,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Get captured value for input channel 4.
 3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-ARM GAS  /tmp/ccdl7gEi.s 			page 69
+ARM GAS  /tmp/cczi2eQD.s 			page 69
 
 
 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *       whether or not a timer instance supports a 32 bits counter.
@@ -4138,7 +4138,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
 3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
-ARM GAS  /tmp/ccdl7gEi.s 			page 70
+ARM GAS  /tmp/cczi2eQD.s 			page 70
 
 
 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -4198,7 +4198,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @rmtoll CR2          MMS           LL_TIM_SetTriggerOutput
 3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TIMx Timer instance
 3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  TimerSynchronization This parameter can be one of the following values:
-ARM GAS  /tmp/ccdl7gEi.s 			page 71
+ARM GAS  /tmp/cczi2eQD.s 			page 71
 
 
 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_TRGO_RESET
@@ -4258,7 +4258,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_SLAVEMODE_GATED
 3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_SLAVEMODE_TRIGGER
 3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER
-ARM GAS  /tmp/ccdl7gEi.s 			page 72
+ARM GAS  /tmp/cczi2eQD.s 			page 72
 
 
 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
@@ -4318,7 +4318,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief Indicates whether the Master/Slave mode is enabled.
-ARM GAS  /tmp/ccdl7gEi.s 			page 73
+ARM GAS  /tmp/cczi2eQD.s 			page 73
 
 
 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
@@ -4378,7 +4378,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration
-ARM GAS  /tmp/ccdl7gEi.s 			page 74
+ARM GAS  /tmp/cczi2eQD.s 			page 74
 
 
 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @{
@@ -4438,7 +4438,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @retval None
 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 75
+ARM GAS  /tmp/cczi2eQD.s 			page 75
 
 
 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity,
@@ -4498,7 +4498,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
-ARM GAS  /tmp/ccdl7gEi.s 			page 76
+ARM GAS  /tmp/cczi2eQD.s 			page 76
 
 
 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6
@@ -4558,7 +4558,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 
 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Indicate whether automatic output is enabled.
-ARM GAS  /tmp/ccdl7gEi.s 			page 77
+ARM GAS  /tmp/cczi2eQD.s 			page 77
 
 
 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
@@ -4618,7 +4618,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @brief  Enable the signals connected to the designated timer break input.
-ARM GAS  /tmp/ccdl7gEi.s 			page 78
+ARM GAS  /tmp/cczi2eQD.s 			page 78
 
 
 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
@@ -4678,7 +4678,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_INPUT_BKIN
 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BREAK_INPUT_BKIN2
 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  Source This parameter can be one of the following values:
-ARM GAS  /tmp/ccdl7gEi.s 			page 79
+ARM GAS  /tmp/cczi2eQD.s 			page 79
 
 
 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_BKIN_SOURCE_BKIN
@@ -4738,7 +4738,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   * @param  DMABurstLength This parameter can be one of the following values:
 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
-ARM GAS  /tmp/ccdl7gEi.s 			page 80
+ARM GAS  /tmp/cczi2eQD.s 			page 80
 
 
 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *         @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
@@ -4798,7 +4798,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO
 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM5_TI4_RMP_LSI
 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM5_TI4_RMP_LSE
-ARM GAS  /tmp/ccdl7gEi.s 			page 81
+ARM GAS  /tmp/cczi2eQD.s 			page 81
 
 
 3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****   *            @arg @ref LL_TIM_TIM5_TI4_RMP_RTC
@@ -4858,7 +4858,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  511              	.LBE59:
  512              	.LBE58:
  384:Src/stm32f7xx_it.c ****   {
-ARM GAS  /tmp/ccdl7gEi.s 			page 82
+ARM GAS  /tmp/cczi2eQD.s 			page 82
 
 
  385:Src/stm32f7xx_it.c ****     LL_TIM_ClearFlag_UPDATE(TIM6);
@@ -4918,7 +4918,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  393:Src/stm32f7xx_it.c **** 
  394:Src/stm32f7xx_it.c **** /**
  395:Src/stm32f7xx_it.c ****   * @brief This function handles TIM7 global interrupt.
-ARM GAS  /tmp/ccdl7gEi.s 			page 83
+ARM GAS  /tmp/cczi2eQD.s 			page 83
 
 
  396:Src/stm32f7xx_it.c ****   */
@@ -4978,7 +4978,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  597 0016 0133     		adds	r3, r3, #1
  598 0018 1360     		str	r3, [r2]
  599              	.L44:
-ARM GAS  /tmp/ccdl7gEi.s 			page 84
+ARM GAS  /tmp/cczi2eQD.s 			page 84
 
 
  407:Src/stm32f7xx_it.c ****     //1 ms or 1000 Hz
@@ -5038,7 +5038,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  626              		.cfi_def_cfa_offset 4
  627              		.cfi_offset 4, -4
  437:Src/stm32f7xx_it.c ****     uart_buf = LL_USART_ReceiveData8(USART1);
-ARM GAS  /tmp/ccdl7gEi.s 			page 85
+ARM GAS  /tmp/cczi2eQD.s 			page 85
 
 
  628              		.loc 1 437 5 view .LVU105
@@ -5098,7 +5098,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
   51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private macros ------------------------------------------------------------*/
   52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER)
-ARM GAS  /tmp/ccdl7gEi.s 			page 86
+ARM GAS  /tmp/cczi2eQD.s 			page 86
 
 
   53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Private_Macros USART Private Macros
@@ -5158,7 +5158,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   uint32_t OverSampling;              /*!< Specifies whether USART oversampling mode is 16 or 8.
  109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_OVERSA
-ARM GAS  /tmp/ccdl7gEi.s 			page 87
+ARM GAS  /tmp/cczi2eQD.s 			page 87
 
 
  110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -5218,7 +5218,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
  165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_PECF                       USART_ICR_PECF                /*!< Parity error cle
-ARM GAS  /tmp/ccdl7gEi.s 			page 88
+ARM GAS  /tmp/cczi2eQD.s 			page 88
 
 
  167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_FECF                       USART_ICR_FECF                /*!< Framing error cl
@@ -5278,7 +5278,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
  222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TCBGT                      USART_ISR_TCBGT               /*!< Transmission com
  223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
-ARM GAS  /tmp/ccdl7gEi.s 			page 89
+ARM GAS  /tmp/cczi2eQD.s 			page 89
 
 
  224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -5338,7 +5338,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_IDLELINE                0x00000000U           /*!<  USART wake up from Mute
  280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ADDRESSMARK             USART_CR1_WAKE        /*!<  USART wake up from Mute
-ARM GAS  /tmp/ccdl7gEi.s 			page 90
+ARM GAS  /tmp/cczi2eQD.s 			page 90
 
 
  281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -5398,7 +5398,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
  336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_LOW                   0x00000000U           /*!< Steady low value on SCLK
-ARM GAS  /tmp/ccdl7gEi.s 			page 91
+ARM GAS  /tmp/cczi2eQD.s 			page 91
 
 
  338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_HIGH                  USART_CR2_CPOL        /*!< Steady high value on SCL
@@ -5458,7 +5458,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_LSBFIRST              0x00000000U           /*!< data is transmitted/rece
  394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_MSBFIRST              USART_CR2_MSBFIRST    /*!< data is transmitted/rece
-ARM GAS  /tmp/ccdl7gEi.s 			page 92
+ARM GAS  /tmp/cczi2eQD.s 			page 92
 
 
  395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -5518,7 +5518,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
  451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 93
+ARM GAS  /tmp/cczi2eQD.s 			page 93
 
 
  452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -5578,7 +5578,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval Register value
  507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-ARM GAS  /tmp/ccdl7gEi.s 			page 94
+ARM GAS  /tmp/cczi2eQD.s 			page 94
 
 
  509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -5638,7 +5638,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
  564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 95
+ARM GAS  /tmp/cczi2eQD.s 			page 95
 
 
  566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  USART Disable (all USART prescalers and outputs are disabled)
@@ -5698,7 +5698,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
  621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not)
  622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-ARM GAS  /tmp/ccdl7gEi.s 			page 96
+ARM GAS  /tmp/cczi2eQD.s 			page 96
 
 
  623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Wake-up from Stop mode feature is supported by the USARTx instance.
@@ -5758,7 +5758,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
  678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
  679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE);
-ARM GAS  /tmp/ccdl7gEi.s 			page 97
+ARM GAS  /tmp/cczi2eQD.s 			page 97
 
 
  680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -5818,7 +5818,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Return enabled/disabled states of Transmitter and Receiver
  735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          RE            LL_USART_GetTransferDirection\n
  736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         CR1          TE            LL_USART_GetTransferDirection
-ARM GAS  /tmp/ccdl7gEi.s 			page 98
+ARM GAS  /tmp/cczi2eQD.s 			page 98
 
 
  737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -5878,7 +5878,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
  792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
  793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 99
+ARM GAS  /tmp/cczi2eQD.s 			page 99
 
 
  794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
@@ -5938,7 +5938,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
  849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME);
  850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 100
+ARM GAS  /tmp/cczi2eQD.s 			page 100
 
 
  851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -5998,7 +5998,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          LBCL          LL_USART_SetLastClkPulseOutput
  906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
  907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  LastBitClockPulse This parameter can be one of the following values:
-ARM GAS  /tmp/ccdl7gEi.s 			page 101
+ARM GAS  /tmp/cczi2eQD.s 			page 101
 
 
  908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
@@ -6058,7 +6058,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
  963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
  964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 102
+ARM GAS  /tmp/cczi2eQD.s 			page 102
 
 
  965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Select the polarity of the clock output on the SCLK pin in synchronous mode
@@ -6118,7 +6118,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCP
 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 103
+ARM GAS  /tmp/cczi2eQD.s 			page 103
 
 
 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -6178,7 +6178,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 104
+ARM GAS  /tmp/cczi2eQD.s 			page 104
 
 
 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Retrieve the length of the stop bits
@@ -6238,7 +6238,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_TXRX_SWAPPED
 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 105
+ARM GAS  /tmp/cczi2eQD.s 			page 105
 
 
 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
@@ -6298,7 +6298,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
-ARM GAS  /tmp/ccdl7gEi.s 			page 106
+ARM GAS  /tmp/cczi2eQD.s 			page 106
 
 
 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -6358,7 +6358,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 107
+ARM GAS  /tmp/cczi2eQD.s 			page 107
 
 
 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
@@ -6418,7 +6418,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL);
 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 108
+ARM GAS  /tmp/cczi2eQD.s 			page 108
 
 
 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -6478,7 +6478,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 109
+ARM GAS  /tmp/cczi2eQD.s 			page 109
 
 
 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -6538,7 +6538,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
-ARM GAS  /tmp/ccdl7gEi.s 			page 110
+ARM GAS  /tmp/cczi2eQD.s 			page 110
 
 
 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          ADDM7         LL_USART_GetNodeAddressLen
@@ -6598,7 +6598,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          CTSE          LL_USART_DisableCTSHWFlowCtrl
 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
-ARM GAS  /tmp/ccdl7gEi.s 			page 111
+ARM GAS  /tmp/cczi2eQD.s 			page 111
 
 
 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -6658,7 +6658,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable One bit sampling method
 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          ONEBIT        LL_USART_DisableOneBitSamp
-ARM GAS  /tmp/ccdl7gEi.s 			page 112
+ARM GAS  /tmp/cczi2eQD.s 			page 112
 
 
 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -6718,7 +6718,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-ARM GAS  /tmp/ccdl7gEi.s 			page 113
+ARM GAS  /tmp/cczi2eQD.s 			page 113
 
 
 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Wake-up from Stop mode feature is supported by the USARTx instance.
@@ -6778,7 +6778,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   if (OverSampling == LL_USART_OVERSAMPLING_8)
 1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   {
 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****     usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
-ARM GAS  /tmp/ccdl7gEi.s 			page 114
+ARM GAS  /tmp/cczi2eQD.s 			page 114
 
 
 1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****     brrtemp = usartdiv & 0xFFF0U;
@@ -6838,7 +6838,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll RTOR         RTO           LL_USART_SetRxTimeout
 1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
-ARM GAS  /tmp/ccdl7gEi.s 			page 115
+ARM GAS  /tmp/cczi2eQD.s 			page 115
 
 
 1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
@@ -6898,7 +6898,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 116
+ARM GAS  /tmp/cczi2eQD.s 			page 116
 
 
 1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
@@ -6958,7 +6958,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_IRDA_POWER_NORMAL
 1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_2EDGE
 1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 117
+ARM GAS  /tmp/cczi2eQD.s 			page 117
 
 
 1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx)
@@ -7018,7 +7018,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable Smartcard NACK transmission
-ARM GAS  /tmp/ccdl7gEi.s 			page 118
+ARM GAS  /tmp/cczi2eQD.s 			page 118
 
 
 1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
@@ -7078,7 +7078,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          SCEN          LL_USART_IsEnabledSmartcard
 1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
-ARM GAS  /tmp/ccdl7gEi.s 			page 119
+ARM GAS  /tmp/cczi2eQD.s 			page 119
 
 
 1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -7138,7 +7138,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Return Smartcard prescaler value, used for dividing the USART clock
 1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         source to provide the SMARTCARD Clock (5 bits value)
 1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-ARM GAS  /tmp/ccdl7gEi.s 			page 120
+ARM GAS  /tmp/cczi2eQD.s 			page 120
 
 
 1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Smartcard feature is supported by the USARTx instance.
@@ -7198,7 +7198,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
 2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 121
+ARM GAS  /tmp/cczi2eQD.s 			page 121
 
 
 2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
@@ -7258,7 +7258,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Return LIN Break Detection Length
 2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
 2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         LIN feature is supported by the USARTx instance.
-ARM GAS  /tmp/ccdl7gEi.s 			page 122
+ARM GAS  /tmp/cczi2eQD.s 			page 122
 
 
 2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          LBDL          LL_USART_GetLINBrkDetectionLen
@@ -7318,7 +7318,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
 2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @{
 2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 123
+ARM GAS  /tmp/cczi2eQD.s 			page 123
 
 
 2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -7378,7 +7378,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable Driver Enable (DE) Mode
-ARM GAS  /tmp/ccdl7gEi.s 			page 124
+ARM GAS  /tmp/cczi2eQD.s 			page 124
 
 
 2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
@@ -7438,7 +7438,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Return Driver Enable Polarity
 2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         Driver Enable feature is supported by the USARTx instance.
-ARM GAS  /tmp/ccdl7gEi.s 			page 125
+ARM GAS  /tmp/cczi2eQD.s 			page 125
 
 
 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          DEP           LL_USART_GetDESignalPolarity
@@ -7498,7 +7498,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Perform basic configuration of USART for enabling use in Synchronous Mode
 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   In Synchronous mode, the following bits must be kept cleared:
-ARM GAS  /tmp/ccdl7gEi.s 			page 126
+ARM GAS  /tmp/cczi2eQD.s 			page 126
 
 
 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           - LINEN bit in the USART_CR2 register,
@@ -7558,7 +7558,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         dedicated functions
 2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR2          CLKEN         LL_USART_ConfigLINMode\n
-ARM GAS  /tmp/ccdl7gEi.s 			page 127
+ARM GAS  /tmp/cczi2eQD.s 			page 127
 
 
 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         CR2          STOP          LL_USART_ConfigLINMode\n
@@ -7618,7 +7618,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   /* set the UART/USART in Half Duplex mode */
 2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
-ARM GAS  /tmp/ccdl7gEi.s 			page 128
+ARM GAS  /tmp/cczi2eQD.s 			page 128
 
 
 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -7678,7 +7678,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         IrDA feature is supported by the USARTx instance.
 2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Call of this function is equivalent to following function call sequence :
-ARM GAS  /tmp/ccdl7gEi.s 			page 129
+ARM GAS  /tmp/cczi2eQD.s 			page 129
 
 
 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -7738,7 +7738,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
 2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 130
+ARM GAS  /tmp/cczi2eQD.s 			page 130
 
 
 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
@@ -7798,7 +7798,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 131
+ARM GAS  /tmp/cczi2eQD.s 			page 131
 
 
 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx)
@@ -7858,7 +7858,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 132
+ARM GAS  /tmp/cczi2eQD.s 			page 132
 
 
 2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx)
@@ -7918,7 +7918,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART Auto-Baud Rate Error Flag is set or not
-ARM GAS  /tmp/ccdl7gEi.s 			page 133
+ARM GAS  /tmp/cczi2eQD.s 			page 133
 
 
 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @note   Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or 
@@ -7978,7 +7978,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
 2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 134
+ARM GAS  /tmp/cczi2eQD.s 			page 134
 
 
 2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8038,7 +8038,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not
 2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ISR          TCBGT         LL_USART_IsActiveFlag_TCBGT
-ARM GAS  /tmp/ccdl7gEi.s 			page 135
+ARM GAS  /tmp/cczi2eQD.s 			page 135
 
 
 2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -8098,7 +8098,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Clear IDLE line detected Flag
 2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll ICR          IDLECF        LL_USART_ClearFlag_IDLE
 2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
-ARM GAS  /tmp/ccdl7gEi.s 			page 136
+ARM GAS  /tmp/cczi2eQD.s 			page 136
 
 
 2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
@@ -8158,7 +8158,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
 2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 137
+ARM GAS  /tmp/cczi2eQD.s 			page 137
 
 
 2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -8218,7 +8218,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @}
 3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 138
+ARM GAS  /tmp/cczi2eQD.s 			page 138
 
 
 3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_IT_Management IT_Management
@@ -8278,7 +8278,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
 3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE);
-ARM GAS  /tmp/ccdl7gEi.s 			page 139
+ARM GAS  /tmp/cczi2eQD.s 			page 139
 
 
 3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -8338,7 +8338,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           0: Interrupt is inhibited
 3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   *           1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
 3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          EIE           LL_USART_EnableIT_ERROR
-ARM GAS  /tmp/ccdl7gEi.s 			page 140
+ARM GAS  /tmp/cczi2eQD.s 			page 140
 
 
 3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -8398,7 +8398,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable IDLE Interrupt
 3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          IDLEIE        LL_USART_DisableIT_IDLE
-ARM GAS  /tmp/ccdl7gEi.s 			page 141
+ARM GAS  /tmp/cczi2eQD.s 			page 141
 
 
 3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
@@ -8458,7 +8458,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR1          CMIE          LL_USART_DisableIT_CM
 3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
 3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
-ARM GAS  /tmp/ccdl7gEi.s 			page 142
+ARM GAS  /tmp/cczi2eQD.s 			page 142
 
 
 3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
@@ -8518,7 +8518,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
 3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 143
+ARM GAS  /tmp/cczi2eQD.s 			page 143
 
 
 3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -8578,7 +8578,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
 3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
 3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 144
+ARM GAS  /tmp/cczi2eQD.s 			page 144
 
 
 3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
@@ -8638,7 +8638,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 145
+ARM GAS  /tmp/cczi2eQD.s 			page 145
 
 
 3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Check if the USART Receiver Timeout Interrupt is enabled or disabled.
@@ -8698,7 +8698,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   */
 3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx)
 3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 146
+ARM GAS  /tmp/cczi2eQD.s 			page 146
 
 
 3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
@@ -8758,7 +8758,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
 3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
 3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Disable DMA Mode for reception
-ARM GAS  /tmp/ccdl7gEi.s 			page 147
+ARM GAS  /tmp/cczi2eQD.s 			page 147
 
 
 3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          DMAR          LL_USART_DisableDMAReq_RX
@@ -8818,7 +8818,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @brief  Enable DMA Disabling on Reception Error
 3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @rmtoll CR3          DDRE          LL_USART_EnableDMADeactOnRxErr
 3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @param  USARTx USART Instance
-ARM GAS  /tmp/ccdl7gEi.s 			page 148
+ARM GAS  /tmp/cczi2eQD.s 			page 148
 
 
 3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   * @retval None
@@ -8878,7 +8878,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return data_reg_addr;
 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 149
+ARM GAS  /tmp/cczi2eQD.s 			page 149
 
 
 3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8902,7 +8902,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****   return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU);
  635              		.loc 3 3660 3 view .LVU107
  636              		.loc 3 3660 20 is_stmt 0 view .LVU108
- 637 0002 9B4B     		ldr	r3, .L89
+ 637 0002 994B     		ldr	r3, .L100
  638 0004 5A6A     		ldr	r2, [r3, #36]
  639              		.loc 3 3660 10 view .LVU109
  640 0006 D2B2     		uxtb	r2, r2
@@ -8911,51 +8911,51 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  643              	.LBE67:
  644              	.LBE66:
  645              		.loc 1 437 14 discriminator 1 view .LVU111
- 646 0008 9A4B     		ldr	r3, .L89+4
+ 646 0008 984B     		ldr	r3, .L100+4
  647 000a 1A70     		strb	r2, [r3]
  438:Src/stm32f7xx_it.c ****     switch (UART_rec_incr)
  648              		.loc 1 438 5 is_stmt 1 view .LVU112
- 649 000c 9A4B     		ldr	r3, .L89+8
+ 649 000c 984B     		ldr	r3, .L100+8
  650 000e 1B88     		ldrh	r3, [r3]
  651 0010 1F2B     		cmp	r3, #31
- 652 0012 00F26481 		bhi	.L49
+ 652 0012 00F2B381 		bhi	.L49
  653 0016 DFE813F0 		tbh	[pc, r3, lsl #1]
  654              	.L51:
  655 001a 2000     		.2byte	(.L55-.L51)/2
  656 001c 2F00     		.2byte	(.L54-.L51)/2
- 657 001e 6201     		.2byte	(.L49-.L51)/2
- 658 0020 6201     		.2byte	(.L49-.L51)/2
- 659 0022 6201     		.2byte	(.L49-.L51)/2
- 660 0024 6201     		.2byte	(.L49-.L51)/2
- 661 0026 6201     		.2byte	(.L49-.L51)/2
- 662 0028 6201     		.2byte	(.L49-.L51)/2
- 663 002a 6201     		.2byte	(.L49-.L51)/2
- 664 002c 9E00     		.2byte	(.L53-.L51)/2
- 665 002e 6201     		.2byte	(.L49-.L51)/2
- 666 0030 6201     		.2byte	(.L49-.L51)/2
- 667 0032 6201     		.2byte	(.L49-.L51)/2
- 668 0034 6201     		.2byte	(.L49-.L51)/2
- 669 0036 6201     		.2byte	(.L49-.L51)/2
- 670 0038 6201     		.2byte	(.L49-.L51)/2
- 671 003a 6201     		.2byte	(.L49-.L51)/2
-ARM GAS  /tmp/ccdl7gEi.s 			page 150
+ 657 001e B101     		.2byte	(.L49-.L51)/2
+ 658 0020 B101     		.2byte	(.L49-.L51)/2
+ 659 0022 B101     		.2byte	(.L49-.L51)/2
+ 660 0024 B101     		.2byte	(.L49-.L51)/2
+ 661 0026 B101     		.2byte	(.L49-.L51)/2
+ 662 0028 B101     		.2byte	(.L49-.L51)/2
+ 663 002a B101     		.2byte	(.L49-.L51)/2
+ 664 002c AF00     		.2byte	(.L53-.L51)/2
+ 665 002e B101     		.2byte	(.L49-.L51)/2
+ 666 0030 B101     		.2byte	(.L49-.L51)/2
+ 667 0032 B101     		.2byte	(.L49-.L51)/2
+ 668 0034 B101     		.2byte	(.L49-.L51)/2
+ 669 0036 B101     		.2byte	(.L49-.L51)/2
+ 670 0038 B101     		.2byte	(.L49-.L51)/2
+ 671 003a B101     		.2byte	(.L49-.L51)/2
+ARM GAS  /tmp/cczi2eQD.s 			page 150
 
 
- 672 003c 6201     		.2byte	(.L49-.L51)/2
- 673 003e 6201     		.2byte	(.L49-.L51)/2
- 674 0040 6201     		.2byte	(.L49-.L51)/2
- 675 0042 6201     		.2byte	(.L49-.L51)/2
- 676 0044 6201     		.2byte	(.L49-.L51)/2
- 677 0046 6201     		.2byte	(.L49-.L51)/2
- 678 0048 6201     		.2byte	(.L49-.L51)/2
- 679 004a 6201     		.2byte	(.L49-.L51)/2
- 680 004c 6201     		.2byte	(.L49-.L51)/2
- 681 004e 6201     		.2byte	(.L49-.L51)/2
- 682 0050 6201     		.2byte	(.L49-.L51)/2
- 683 0052 6201     		.2byte	(.L49-.L51)/2
- 684 0054 D800     		.2byte	(.L52-.L51)/2
- 685 0056 6201     		.2byte	(.L49-.L51)/2
- 686 0058 1201     		.2byte	(.L50-.L51)/2
+ 672 003c B101     		.2byte	(.L49-.L51)/2
+ 673 003e B101     		.2byte	(.L49-.L51)/2
+ 674 0040 B101     		.2byte	(.L49-.L51)/2
+ 675 0042 B101     		.2byte	(.L49-.L51)/2
+ 676 0044 B101     		.2byte	(.L49-.L51)/2
+ 677 0046 B101     		.2byte	(.L49-.L51)/2
+ 678 0048 B101     		.2byte	(.L49-.L51)/2
+ 679 004a B101     		.2byte	(.L49-.L51)/2
+ 680 004c B101     		.2byte	(.L49-.L51)/2
+ 681 004e B101     		.2byte	(.L49-.L51)/2
+ 682 0050 B101     		.2byte	(.L49-.L51)/2
+ 683 0052 B101     		.2byte	(.L49-.L51)/2
+ 684 0054 3D01     		.2byte	(.L52-.L51)/2
+ 685 0056 B101     		.2byte	(.L49-.L51)/2
+ 686 0058 7701     		.2byte	(.L50-.L51)/2
  687              		.p2align 1
  688              	.L55:
  439:Src/stm32f7xx_it.c ****     {
@@ -8963,26 +8963,26 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  441:Src/stm32f7xx_it.c ****         TO6_uart = TO6;//Save the time of start rec. command
  689              		.loc 1 441 9 view .LVU113
  690              		.loc 1 441 18 is_stmt 0 view .LVU114
- 691 005a 8849     		ldr	r1, .L89+12
+ 691 005a 8649     		ldr	r1, .L100+12
  692 005c 0868     		ldr	r0, [r1]
- 693 005e 8849     		ldr	r1, .L89+16
+ 693 005e 8649     		ldr	r1, .L100+16
  694 0060 0860     		str	r0, [r1]
  442:Src/stm32f7xx_it.c ****         flg_tmt = 1;//Set the timeout flag
  695              		.loc 1 442 9 is_stmt 1 view .LVU115
  696              		.loc 1 442 17 is_stmt 0 view .LVU116
- 697 0062 8849     		ldr	r1, .L89+20
+ 697 0062 8649     		ldr	r1, .L100+20
  698 0064 0120     		movs	r0, #1
  699 0066 0870     		strb	r0, [r1]
  443:Src/stm32f7xx_it.c ****         UART_header = uart_buf;
  700              		.loc 1 443 9 is_stmt 1 view .LVU117
  701              		.loc 1 443 21 is_stmt 0 view .LVU118
- 702 0068 8749     		ldr	r1, .L89+24
+ 702 0068 8549     		ldr	r1, .L100+24
  703 006a 0A80     		strh	r2, [r1]	@ movhi
  444:Src/stm32f7xx_it.c ****         UART_rec_incr++;
  704              		.loc 1 444 9 is_stmt 1 view .LVU119
  705              		.loc 1 444 22 is_stmt 0 view .LVU120
  706 006c 0344     		add	r3, r3, r0
- 707 006e 824A     		ldr	r2, .L89+8
+ 707 006e 804A     		ldr	r2, .L100+8
  708 0070 1380     		strh	r3, [r2]	@ movhi
  445:Src/stm32f7xx_it.c ****     break;
  709              		.loc 1 445 5 is_stmt 1 view .LVU121
@@ -8998,7 +8998,7 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  454:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
  455:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
  456:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;
-ARM GAS  /tmp/ccdl7gEi.s 			page 151
+ARM GAS  /tmp/cczi2eQD.s 			page 151
 
 
  457:Src/stm32f7xx_it.c ****         break;
@@ -9028,99 +9028,125 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  481:Src/stm32f7xx_it.c ****         case AD9102_CMD_HEADER: // AD9102 command
  482:Src/stm32f7xx_it.c ****             UART_rec_incr = 2;//timeout flag is still setting!
  483:Src/stm32f7xx_it.c ****         break;
- 484:Src/stm32f7xx_it.c ****         default: //error decoding header
- 485:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 486:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 487:Src/stm32f7xx_it.c ****             //UART_transmission_request = MESS_01;
- 488:Src/stm32f7xx_it.c ****             //CPU_state = HALT;
- 489:Src/stm32f7xx_it.c ****             State_Data[0] |= UART_ERR;
- 490:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 491:Src/stm32f7xx_it.c ****         break;
- 492:Src/stm32f7xx_it.c ****         }
- 493:Src/stm32f7xx_it.c ****     break;
- 494:Src/stm32f7xx_it.c **** 
- 495:Src/stm32f7xx_it.c ****     case (AD9102_CMD_8 - 1):
- 496:Src/stm32f7xx_it.c ****         if (UART_header == AD9102_CMD_HEADER)
- 497:Src/stm32f7xx_it.c ****         {
- 498:Src/stm32f7xx_it.c ****             if ((UART_rec_incr & 0x0001) > 0)
- 499:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 500:Src/stm32f7xx_it.c ****             else
- 501:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 502:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
- 503:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 504:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 505:Src/stm32f7xx_it.c ****         }
- 506:Src/stm32f7xx_it.c ****         else
- 507:Src/stm32f7xx_it.c ****         {
- 508:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
- 509:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 510:Src/stm32f7xx_it.c ****             else
- 511:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 512:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 513:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
-ARM GAS  /tmp/ccdl7gEi.s 			page 152
+ 484:Src/stm32f7xx_it.c ****         case AD9833_CMD_HEADER: // AD9833 command
+ 485:Src/stm32f7xx_it.c ****             UART_rec_incr = 2;//timeout flag is still setting!
+ 486:Src/stm32f7xx_it.c ****         break;
+ 487:Src/stm32f7xx_it.c ****         case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command
+ 488:Src/stm32f7xx_it.c ****             UART_rec_incr = 2;//timeout flag is still setting!
+ 489:Src/stm32f7xx_it.c ****         break;
+ 490:Src/stm32f7xx_it.c ****         default: //error decoding header
+ 491:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 492:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 493:Src/stm32f7xx_it.c ****             //UART_transmission_request = MESS_01;
+ 494:Src/stm32f7xx_it.c ****             //CPU_state = HALT;
+ 495:Src/stm32f7xx_it.c ****             State_Data[0] |= UART_ERR;
+ 496:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
+ 497:Src/stm32f7xx_it.c ****         break;
+ 498:Src/stm32f7xx_it.c ****         }
+ 499:Src/stm32f7xx_it.c ****     break;
+ 500:Src/stm32f7xx_it.c **** 
+ 501:Src/stm32f7xx_it.c ****     case (AD9102_CMD_8 - 1):
+ 502:Src/stm32f7xx_it.c ****         if (UART_header == AD9102_CMD_HEADER)
+ 503:Src/stm32f7xx_it.c ****         {
+ 504:Src/stm32f7xx_it.c ****             if ((UART_rec_incr & 0x0001) > 0)
+ 505:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 506:Src/stm32f7xx_it.c ****             else
+ 507:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
+ 508:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
+ 509:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 510:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 511:Src/stm32f7xx_it.c ****         }
+ 512:Src/stm32f7xx_it.c ****         else if (UART_header == AD9833_CMD_HEADER)
+ 513:Src/stm32f7xx_it.c ****         {
+ARM GAS  /tmp/cczi2eQD.s 			page 152
 
 
- 514:Src/stm32f7xx_it.c ****         }
- 515:Src/stm32f7xx_it.c ****     break;
- 516:Src/stm32f7xx_it.c **** 
- 517:Src/stm32f7xx_it.c ****     case (CL_8 - 1):
- 518:Src/stm32f7xx_it.c ****         if (UART_header == 0x1111)
- 519:Src/stm32f7xx_it.c ****         {
- 520:Src/stm32f7xx_it.c ****             if ((UART_rec_incr & 0x0001) > 0)
- 521:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 522:Src/stm32f7xx_it.c ****             else
- 523:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 524:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
- 525:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 526:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 527:Src/stm32f7xx_it.c ****         }
- 528:Src/stm32f7xx_it.c ****         else
- 529:Src/stm32f7xx_it.c ****         {
- 530:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
- 531:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 532:Src/stm32f7xx_it.c ****             else
- 533:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 534:Src/stm32f7xx_it.c ****            UART_rec_incr++;
- 535:Src/stm32f7xx_it.c ****            UART_transmission_request = NO_MESS;
- 536:Src/stm32f7xx_it.c ****         }
- 537:Src/stm32f7xx_it.c ****     break;
- 538:Src/stm32f7xx_it.c ****     case (TSK_8 - 1):
- 539:Src/stm32f7xx_it.c ****         if (UART_header == 0x7777)
- 540:Src/stm32f7xx_it.c ****         {
- 541:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
- 542:Src/stm32f7xx_it.c ****     	          COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 543:Src/stm32f7xx_it.c ****     	      else
- 544:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 545:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
- 546:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 547:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 548:Src/stm32f7xx_it.c ****         }
- 549:Src/stm32f7xx_it.c ****         else
- 550:Src/stm32f7xx_it.c ****         {
- 551:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
- 552:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 553:Src/stm32f7xx_it.c ****             else
- 554:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 555:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 556:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
- 557:Src/stm32f7xx_it.c ****         }
- 558:Src/stm32f7xx_it.c ****     break;
- 559:Src/stm32f7xx_it.c ****     default:
- 560:Src/stm32f7xx_it.c ****         if ((UART_rec_incr&0x0001)>0)
- 561:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 562:Src/stm32f7xx_it.c ****         else
- 563:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 564:Src/stm32f7xx_it.c ****         UART_rec_incr++;
- 565:Src/stm32f7xx_it.c ****         UART_transmission_request = NO_MESS;
- 566:Src/stm32f7xx_it.c ****     break;
- 567:Src/stm32f7xx_it.c ****     }
- 568:Src/stm32f7xx_it.c **** //    HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
- 569:Src/stm32f7xx_it.c **** }
- 711              		.loc 1 569 1 is_stmt 0 view .LVU122
-ARM GAS  /tmp/ccdl7gEi.s 			page 153
+ 514:Src/stm32f7xx_it.c ****             if ((UART_rec_incr & 0x0001) > 0)
+ 515:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 516:Src/stm32f7xx_it.c ****             else
+ 517:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
+ 518:Src/stm32f7xx_it.c ****             CPU_state = AD9833_CMD;
+ 519:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 520:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 521:Src/stm32f7xx_it.c ****         }
+ 522:Src/stm32f7xx_it.c ****         else if (UART_header == DS1809_CMD_HEADER)
+ 523:Src/stm32f7xx_it.c ****         {
+ 524:Src/stm32f7xx_it.c ****             if ((UART_rec_incr & 0x0001) > 0)
+ 525:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 526:Src/stm32f7xx_it.c ****             else
+ 527:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
+ 528:Src/stm32f7xx_it.c ****             CPU_state = DS1809_CMD;
+ 529:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 530:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 531:Src/stm32f7xx_it.c ****         }
+ 532:Src/stm32f7xx_it.c ****         else
+ 533:Src/stm32f7xx_it.c ****         {
+ 534:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
+ 535:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 536:Src/stm32f7xx_it.c ****             else
+ 537:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
+ 538:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 539:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
+ 540:Src/stm32f7xx_it.c ****         }
+ 541:Src/stm32f7xx_it.c ****     break;
+ 542:Src/stm32f7xx_it.c **** 
+ 543:Src/stm32f7xx_it.c ****     case (CL_8 - 1):
+ 544:Src/stm32f7xx_it.c ****         if (UART_header == 0x1111)
+ 545:Src/stm32f7xx_it.c ****         {
+ 546:Src/stm32f7xx_it.c ****             if ((UART_rec_incr & 0x0001) > 0)
+ 547:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 548:Src/stm32f7xx_it.c ****             else
+ 549:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
+ 550:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
+ 551:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 552:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 553:Src/stm32f7xx_it.c ****         }
+ 554:Src/stm32f7xx_it.c ****         else
+ 555:Src/stm32f7xx_it.c ****         {
+ 556:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
+ 557:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 558:Src/stm32f7xx_it.c ****             else
+ 559:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
+ 560:Src/stm32f7xx_it.c ****            UART_rec_incr++;
+ 561:Src/stm32f7xx_it.c ****            UART_transmission_request = NO_MESS;
+ 562:Src/stm32f7xx_it.c ****         }
+ 563:Src/stm32f7xx_it.c ****     break;
+ 564:Src/stm32f7xx_it.c ****     case (TSK_8 - 1):
+ 565:Src/stm32f7xx_it.c ****         if (UART_header == 0x7777)
+ 566:Src/stm32f7xx_it.c ****         {
+ 567:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
+ 568:Src/stm32f7xx_it.c ****     	          COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 569:Src/stm32f7xx_it.c ****     	      else
+ 570:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
+ARM GAS  /tmp/cczi2eQD.s 			page 153
 
 
+ 571:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
+ 572:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 573:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 574:Src/stm32f7xx_it.c ****         }
+ 575:Src/stm32f7xx_it.c ****         else
+ 576:Src/stm32f7xx_it.c ****         {
+ 577:Src/stm32f7xx_it.c ****             if ((UART_rec_incr&0x0001)>0)
+ 578:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 579:Src/stm32f7xx_it.c ****             else
+ 580:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
+ 581:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 582:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
+ 583:Src/stm32f7xx_it.c ****         }
+ 584:Src/stm32f7xx_it.c ****     break;
+ 585:Src/stm32f7xx_it.c ****     default:
+ 586:Src/stm32f7xx_it.c ****         if ((UART_rec_incr&0x0001)>0)
+ 587:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 588:Src/stm32f7xx_it.c ****         else
+ 589:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
+ 590:Src/stm32f7xx_it.c ****         UART_rec_incr++;
+ 591:Src/stm32f7xx_it.c ****         UART_transmission_request = NO_MESS;
+ 592:Src/stm32f7xx_it.c ****     break;
+ 593:Src/stm32f7xx_it.c ****     }
+ 594:Src/stm32f7xx_it.c **** //    HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
+ 595:Src/stm32f7xx_it.c **** }
+ 711              		.loc 1 595 1 is_stmt 0 view .LVU122
  712 0072 5DF8044B 		ldr	r4, [sp], #4
  713              	.LCFI7:
  714              		.cfi_remember_state
@@ -9134,929 +9160,1092 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  721              		.loc 1 447 9 is_stmt 1 view .LVU123
  447:Src/stm32f7xx_it.c ****         switch (UART_header)
  722              		.loc 1 447 21 is_stmt 0 view .LVU124
- 723 0078 8349     		ldr	r1, .L89+24
+ 723 0078 8149     		ldr	r1, .L100+24
  724 007a 0B88     		ldrh	r3, [r1]
  725 007c 03EB0223 		add	r3, r3, r2, lsl #8
  726 0080 9BB2     		uxth	r3, r3
  727 0082 0B80     		strh	r3, [r1]	@ movhi
  448:Src/stm32f7xx_it.c ****         {
  728              		.loc 1 448 9 is_stmt 1 view .LVU125
- 729 0084 45F25552 		movw	r2, #21845
+ 729 0084 46F26662 		movw	r2, #26214
  730 0088 9342     		cmp	r3, r2
- 731 008a 45D0     		beq	.L57
- 732 008c 22D8     		bhi	.L58
+ 731 008a 56D0     		beq	.L57
+ 732 008c 26D8     		bhi	.L58
  733 008e 43F23332 		movw	r2, #13107
  734 0092 9342     		cmp	r3, r2
- 735 0094 37D0     		beq	.L59
+ 735 0094 3FD0     		beq	.L59
  736 0096 10D8     		bhi	.L60
  737 0098 41F21112 		movw	r2, #4369
  738 009c 9342     		cmp	r3, r2
- 739 009e 2ED0     		beq	.L61
+ 739 009e 36D0     		beq	.L61
+ARM GAS  /tmp/cczi2eQD.s 			page 154
+
+
  740 00a0 42F22222 		movw	r2, #8738
  741 00a4 9342     		cmp	r3, r2
- 742 00a6 48D1     		bne	.L63
+ 742 00a6 59D1     		bne	.L63
  454:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
  743              		.loc 1 454 13 view .LVU126
  454:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
  744              		.loc 1 454 27 is_stmt 0 view .LVU127
  745 00a8 0023     		movs	r3, #0
- 746 00aa 734A     		ldr	r2, .L89+8
+ 746 00aa 714A     		ldr	r2, .L100+8
  747 00ac 1380     		strh	r3, [r2]	@ movhi
  455:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;
  748              		.loc 1 455 13 is_stmt 1 view .LVU128
  455:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;
  749              		.loc 1 455 21 is_stmt 0 view .LVU129
- 750 00ae 754A     		ldr	r2, .L89+20
+ 750 00ae 734A     		ldr	r2, .L100+20
  751 00b0 1370     		strb	r3, [r2]
  456:Src/stm32f7xx_it.c ****         break;
  752              		.loc 1 456 13 is_stmt 1 view .LVU130
  456:Src/stm32f7xx_it.c ****         break;
  753              		.loc 1 456 23 is_stmt 0 view .LVU131
- 754 00b2 764B     		ldr	r3, .L89+28
+ 754 00b2 744B     		ldr	r3, .L100+28
  755 00b4 0222     		movs	r2, #2
  756 00b6 1A70     		strb	r2, [r3]
  457:Src/stm32f7xx_it.c ****         case 0x3333: //Transmith saved DATA
  757              		.loc 1 457 9 is_stmt 1 view .LVU132
  758 00b8 DBE7     		b	.L48
-ARM GAS  /tmp/ccdl7gEi.s 			page 154
-
-
  759              	.L60:
  760 00ba 44F24442 		movw	r2, #17476
  761 00be 9342     		cmp	r3, r2
- 762 00c0 3BD1     		bne	.L63
- 464:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 763              		.loc 1 464 13 view .LVU133
- 464:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 764              		.loc 1 464 27 is_stmt 0 view .LVU134
- 765 00c2 0023     		movs	r3, #0
- 766 00c4 6C4A     		ldr	r2, .L89+8
- 767 00c6 1380     		strh	r3, [r2]	@ movhi
- 465:Src/stm32f7xx_it.c ****             CPU_state = TRANS_ENABLE;
- 768              		.loc 1 465 13 is_stmt 1 view .LVU135
- 465:Src/stm32f7xx_it.c ****             CPU_state = TRANS_ENABLE;
- 769              		.loc 1 465 21 is_stmt 0 view .LVU136
- 770 00c8 6E4A     		ldr	r2, .L89+20
- 771 00ca 1370     		strb	r3, [r2]
- 466:Src/stm32f7xx_it.c ****         break;
- 772              		.loc 1 466 13 is_stmt 1 view .LVU137
- 466:Src/stm32f7xx_it.c ****         break;
- 773              		.loc 1 466 23 is_stmt 0 view .LVU138
- 774 00cc 6F4B     		ldr	r3, .L89+28
- 775 00ce 0422     		movs	r2, #4
- 776 00d0 1A70     		strb	r2, [r3]
- 467:Src/stm32f7xx_it.c ****         case 0x5555: //Erase saved DATA
- 777              		.loc 1 467 9 is_stmt 1 view .LVU139
- 778 00d2 CEE7     		b	.L48
- 779              	.L58:
- 780 00d4 47F27772 		movw	r2, #30583
- 781 00d8 9342     		cmp	r3, r2
- 782 00da 26D0     		beq	.L65
- 783 00dc 48F68802 		movw	r2, #34952
+ 762 00c0 32D0     		beq	.L64
+ 763 00c2 45F25552 		movw	r2, #21845
+ 764 00c6 9342     		cmp	r3, r2
+ 765 00c8 48D1     		bne	.L63
+ 469:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 766              		.loc 1 469 13 view .LVU133
+ 469:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 767              		.loc 1 469 27 is_stmt 0 view .LVU134
+ 768 00ca 0023     		movs	r3, #0
+ 769 00cc 684A     		ldr	r2, .L100+8
+ 770 00ce 1380     		strh	r3, [r2]	@ movhi
+ 470:Src/stm32f7xx_it.c ****             CPU_state = REMOVE_FILE;
+ 771              		.loc 1 470 13 is_stmt 1 view .LVU135
+ 470:Src/stm32f7xx_it.c ****             CPU_state = REMOVE_FILE;
+ 772              		.loc 1 470 21 is_stmt 0 view .LVU136
+ 773 00d0 6A4A     		ldr	r2, .L100+20
+ 774 00d2 1370     		strb	r3, [r2]
+ 471:Src/stm32f7xx_it.c ****         break;
+ 775              		.loc 1 471 13 is_stmt 1 view .LVU137
+ 471:Src/stm32f7xx_it.c ****         break;
+ 776              		.loc 1 471 23 is_stmt 0 view .LVU138
+ 777 00d4 6B4B     		ldr	r3, .L100+28
+ 778 00d6 0522     		movs	r2, #5
+ 779 00d8 1A70     		strb	r2, [r3]
+ 472:Src/stm32f7xx_it.c ****         case 0x6666: //Request state
+ 780              		.loc 1 472 9 is_stmt 1 view .LVU139
+ 781 00da CAE7     		b	.L48
+ 782              	.L58:
+ARM GAS  /tmp/cczi2eQD.s 			page 155
+
+
+ 783 00dc 49F69912 		movw	r2, #39321
  784 00e0 9342     		cmp	r3, r2
- 785 00e2 26D0     		beq	.L66
- 786 00e4 46F26662 		movw	r2, #26214
- 787 00e8 9342     		cmp	r3, r2
- 788 00ea 26D1     		bne	.L63
+ 785 00e2 37D0     		beq	.L66
+ 786 00e4 0BD8     		bhi	.L67
+ 787 00e6 47F27772 		movw	r2, #30583
+ 788 00ea 9342     		cmp	r3, r2
+ 789 00ec 2ED0     		beq	.L68
+ 790 00ee 48F68802 		movw	r2, #34952
+ 791 00f2 9342     		cmp	r3, r2
+ 792 00f4 32D1     		bne	.L63
+ 482:Src/stm32f7xx_it.c ****         break;
+ 793              		.loc 1 482 13 view .LVU140
+ 482:Src/stm32f7xx_it.c ****         break;
+ 794              		.loc 1 482 27 is_stmt 0 view .LVU141
+ 795 00f6 5E4B     		ldr	r3, .L100+8
+ 796 00f8 0222     		movs	r2, #2
+ 797 00fa 1A80     		strh	r2, [r3]	@ movhi
+ 483:Src/stm32f7xx_it.c ****         case AD9833_CMD_HEADER: // AD9833 command
+ 798              		.loc 1 483 9 is_stmt 1 view .LVU142
+ 799 00fc B9E7     		b	.L48
+ 800              	.L67:
+ 801 00fe 4AF6AA22 		movw	r2, #43690
+ 802 0102 9342     		cmp	r3, r2
+ 803 0104 2AD1     		bne	.L63
+ 488:Src/stm32f7xx_it.c ****         break;
+ 804              		.loc 1 488 13 view .LVU143
+ 488:Src/stm32f7xx_it.c ****         break;
+ 805              		.loc 1 488 27 is_stmt 0 view .LVU144
+ 806 0106 5A4B     		ldr	r3, .L100+8
+ 807 0108 0222     		movs	r2, #2
+ 808 010a 1A80     		strh	r2, [r3]	@ movhi
+ 489:Src/stm32f7xx_it.c ****         default: //error decoding header
+ 809              		.loc 1 489 9 is_stmt 1 view .LVU145
+ 810 010c B1E7     		b	.L48
+ 811              	.L61:
+ 451:Src/stm32f7xx_it.c ****         break;
+ 812              		.loc 1 451 13 view .LVU146
+ 451:Src/stm32f7xx_it.c ****         break;
+ 813              		.loc 1 451 27 is_stmt 0 view .LVU147
+ 814 010e 584B     		ldr	r3, .L100+8
+ 815 0110 0222     		movs	r2, #2
+ 816 0112 1A80     		strh	r2, [r3]	@ movhi
+ 452:Src/stm32f7xx_it.c ****         case 0x2222: //Back to default
+ 817              		.loc 1 452 9 is_stmt 1 view .LVU148
+ 818 0114 ADE7     		b	.L48
+ 819              	.L59:
+ 459:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 820              		.loc 1 459 13 view .LVU149
+ 459:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 821              		.loc 1 459 27 is_stmt 0 view .LVU150
+ 822 0116 0023     		movs	r3, #0
+ 823 0118 554A     		ldr	r2, .L100+8
+ 824 011a 1380     		strh	r3, [r2]	@ movhi
+ 460:Src/stm32f7xx_it.c ****             CPU_state = TRANS_S_ENABLE;
+ 825              		.loc 1 460 13 is_stmt 1 view .LVU151
+ 460:Src/stm32f7xx_it.c ****             CPU_state = TRANS_S_ENABLE;
+ 826              		.loc 1 460 21 is_stmt 0 view .LVU152
+ARM GAS  /tmp/cczi2eQD.s 			page 156
+
+
+ 827 011c 574A     		ldr	r2, .L100+20
+ 828 011e 1370     		strb	r3, [r2]
+ 461:Src/stm32f7xx_it.c ****         break;
+ 829              		.loc 1 461 13 is_stmt 1 view .LVU153
+ 461:Src/stm32f7xx_it.c ****         break;
+ 830              		.loc 1 461 23 is_stmt 0 view .LVU154
+ 831 0120 584B     		ldr	r3, .L100+28
+ 832 0122 0322     		movs	r2, #3
+ 833 0124 1A70     		strb	r2, [r3]
+ 462:Src/stm32f7xx_it.c ****         case 0x4444: //Received packet
+ 834              		.loc 1 462 9 is_stmt 1 view .LVU155
+ 835 0126 A4E7     		b	.L48
+ 836              	.L64:
+ 464:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 837              		.loc 1 464 13 view .LVU156
+ 464:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 838              		.loc 1 464 27 is_stmt 0 view .LVU157
+ 839 0128 0023     		movs	r3, #0
+ 840 012a 514A     		ldr	r2, .L100+8
+ 841 012c 1380     		strh	r3, [r2]	@ movhi
+ 465:Src/stm32f7xx_it.c ****             CPU_state = TRANS_ENABLE;
+ 842              		.loc 1 465 13 is_stmt 1 view .LVU158
+ 465:Src/stm32f7xx_it.c ****             CPU_state = TRANS_ENABLE;
+ 843              		.loc 1 465 21 is_stmt 0 view .LVU159
+ 844 012e 534A     		ldr	r2, .L100+20
+ 845 0130 1370     		strb	r3, [r2]
+ 466:Src/stm32f7xx_it.c ****         break;
+ 846              		.loc 1 466 13 is_stmt 1 view .LVU160
+ 466:Src/stm32f7xx_it.c ****         break;
+ 847              		.loc 1 466 23 is_stmt 0 view .LVU161
+ 848 0132 544B     		ldr	r3, .L100+28
+ 849 0134 0422     		movs	r2, #4
+ 850 0136 1A70     		strb	r2, [r3]
+ 467:Src/stm32f7xx_it.c ****         case 0x5555: //Erase saved DATA
+ 851              		.loc 1 467 9 is_stmt 1 view .LVU162
+ 852 0138 9BE7     		b	.L48
+ 853              	.L57:
  474:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 789              		.loc 1 474 13 view .LVU140
+ 854              		.loc 1 474 13 view .LVU163
  474:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 790              		.loc 1 474 27 is_stmt 0 view .LVU141
- 791 00ec 0023     		movs	r3, #0
- 792 00ee 624A     		ldr	r2, .L89+8
- 793 00f0 1380     		strh	r3, [r2]	@ movhi
+ 855              		.loc 1 474 27 is_stmt 0 view .LVU164
+ 856 013a 0023     		movs	r3, #0
+ 857 013c 4C4A     		ldr	r2, .L100+8
+ 858 013e 1380     		strh	r3, [r2]	@ movhi
  475:Src/stm32f7xx_it.c ****             CPU_state = STATE;
- 794              		.loc 1 475 13 is_stmt 1 view .LVU142
+ 859              		.loc 1 475 13 is_stmt 1 view .LVU165
  475:Src/stm32f7xx_it.c ****             CPU_state = STATE;
- 795              		.loc 1 475 21 is_stmt 0 view .LVU143
- 796 00f2 644A     		ldr	r2, .L89+20
- 797 00f4 1370     		strb	r3, [r2]
+ 860              		.loc 1 475 21 is_stmt 0 view .LVU166
+ 861 0140 4E4A     		ldr	r2, .L100+20
+ 862 0142 1370     		strb	r3, [r2]
  476:Src/stm32f7xx_it.c ****         break;
- 798              		.loc 1 476 13 is_stmt 1 view .LVU144
+ 863              		.loc 1 476 13 is_stmt 1 view .LVU167
  476:Src/stm32f7xx_it.c ****         break;
- 799              		.loc 1 476 23 is_stmt 0 view .LVU145
- 800 00f6 654B     		ldr	r3, .L89+28
- 801 00f8 0622     		movs	r2, #6
- 802 00fa 1A70     		strb	r2, [r3]
-ARM GAS  /tmp/ccdl7gEi.s 			page 155
+ 864              		.loc 1 476 23 is_stmt 0 view .LVU168
+ 865 0144 4F4B     		ldr	r3, .L100+28
+ 866 0146 0622     		movs	r2, #6
+ 867 0148 1A70     		strb	r2, [r3]
+ARM GAS  /tmp/cczi2eQD.s 			page 157
 
 
  477:Src/stm32f7xx_it.c ****         case 0x7777:
- 803              		.loc 1 477 9 is_stmt 1 view .LVU146
- 804 00fc B9E7     		b	.L48
- 805              	.L61:
- 451:Src/stm32f7xx_it.c ****         break;
- 806              		.loc 1 451 13 view .LVU147
- 451:Src/stm32f7xx_it.c ****         break;
- 807              		.loc 1 451 27 is_stmt 0 view .LVU148
- 808 00fe 5E4B     		ldr	r3, .L89+8
- 809 0100 0222     		movs	r2, #2
- 810 0102 1A80     		strh	r2, [r3]	@ movhi
- 452:Src/stm32f7xx_it.c ****         case 0x2222: //Back to default
- 811              		.loc 1 452 9 is_stmt 1 view .LVU149
- 812 0104 B5E7     		b	.L48
- 813              	.L59:
- 459:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 814              		.loc 1 459 13 view .LVU150
- 459:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 815              		.loc 1 459 27 is_stmt 0 view .LVU151
- 816 0106 0023     		movs	r3, #0
- 817 0108 5B4A     		ldr	r2, .L89+8
- 818 010a 1380     		strh	r3, [r2]	@ movhi
- 460:Src/stm32f7xx_it.c ****             CPU_state = TRANS_S_ENABLE;
- 819              		.loc 1 460 13 is_stmt 1 view .LVU152
- 460:Src/stm32f7xx_it.c ****             CPU_state = TRANS_S_ENABLE;
- 820              		.loc 1 460 21 is_stmt 0 view .LVU153
- 821 010c 5D4A     		ldr	r2, .L89+20
- 822 010e 1370     		strb	r3, [r2]
- 461:Src/stm32f7xx_it.c ****         break;
- 823              		.loc 1 461 13 is_stmt 1 view .LVU154
- 461:Src/stm32f7xx_it.c ****         break;
- 824              		.loc 1 461 23 is_stmt 0 view .LVU155
- 825 0110 5E4B     		ldr	r3, .L89+28
- 826 0112 0322     		movs	r2, #3
- 827 0114 1A70     		strb	r2, [r3]
- 462:Src/stm32f7xx_it.c ****         case 0x4444: //Received packet
- 828              		.loc 1 462 9 is_stmt 1 view .LVU156
- 829 0116 ACE7     		b	.L48
- 830              	.L57:
- 469:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 831              		.loc 1 469 13 view .LVU157
- 469:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 832              		.loc 1 469 27 is_stmt 0 view .LVU158
- 833 0118 0023     		movs	r3, #0
- 834 011a 574A     		ldr	r2, .L89+8
- 835 011c 1380     		strh	r3, [r2]	@ movhi
- 470:Src/stm32f7xx_it.c ****             CPU_state = REMOVE_FILE;
- 836              		.loc 1 470 13 is_stmt 1 view .LVU159
- 470:Src/stm32f7xx_it.c ****             CPU_state = REMOVE_FILE;
- 837              		.loc 1 470 21 is_stmt 0 view .LVU160
- 838 011e 594A     		ldr	r2, .L89+20
- 839 0120 1370     		strb	r3, [r2]
- 471:Src/stm32f7xx_it.c ****         break;
- 840              		.loc 1 471 13 is_stmt 1 view .LVU161
- 471:Src/stm32f7xx_it.c ****         break;
- 841              		.loc 1 471 23 is_stmt 0 view .LVU162
- 842 0122 5A4B     		ldr	r3, .L89+28
-ARM GAS  /tmp/ccdl7gEi.s 			page 156
-
-
- 843 0124 0522     		movs	r2, #5
- 844 0126 1A70     		strb	r2, [r3]
- 472:Src/stm32f7xx_it.c ****         case 0x6666: //Request state
- 845              		.loc 1 472 9 is_stmt 1 view .LVU163
- 846 0128 A3E7     		b	.L48
- 847              	.L65:
+ 868              		.loc 1 477 9 is_stmt 1 view .LVU169
+ 869 014a 92E7     		b	.L48
+ 870              	.L68:
  479:Src/stm32f7xx_it.c ****             break;
- 848              		.loc 1 479 13 view .LVU164
+ 871              		.loc 1 479 13 view .LVU170
  479:Src/stm32f7xx_it.c ****             break;
- 849              		.loc 1 479 27 is_stmt 0 view .LVU165
- 850 012a 534B     		ldr	r3, .L89+8
- 851 012c 0222     		movs	r2, #2
- 852 012e 1A80     		strh	r2, [r3]	@ movhi
+ 872              		.loc 1 479 27 is_stmt 0 view .LVU171
+ 873 014c 484B     		ldr	r3, .L100+8
+ 874 014e 0222     		movs	r2, #2
+ 875 0150 1A80     		strh	r2, [r3]	@ movhi
  480:Src/stm32f7xx_it.c ****         case AD9102_CMD_HEADER: // AD9102 command
- 853              		.loc 1 480 13 is_stmt 1 view .LVU166
- 854 0130 9FE7     		b	.L48
- 855              	.L66:
- 482:Src/stm32f7xx_it.c ****         break;
- 856              		.loc 1 482 13 view .LVU167
- 482:Src/stm32f7xx_it.c ****         break;
- 857              		.loc 1 482 27 is_stmt 0 view .LVU168
- 858 0132 514B     		ldr	r3, .L89+8
- 859 0134 0222     		movs	r2, #2
- 860 0136 1A80     		strh	r2, [r3]	@ movhi
- 483:Src/stm32f7xx_it.c ****         default: //error decoding header
- 861              		.loc 1 483 9 is_stmt 1 view .LVU169
- 862 0138 9BE7     		b	.L48
- 863              	.L63:
- 485:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 864              		.loc 1 485 13 view .LVU170
- 485:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 865              		.loc 1 485 27 is_stmt 0 view .LVU171
- 866 013a 0023     		movs	r3, #0
- 867 013c 4E4A     		ldr	r2, .L89+8
- 868 013e 1380     		strh	r3, [r2]	@ movhi
- 486:Src/stm32f7xx_it.c ****             //UART_transmission_request = MESS_01;
- 869              		.loc 1 486 13 is_stmt 1 view .LVU172
- 486:Src/stm32f7xx_it.c ****             //UART_transmission_request = MESS_01;
- 870              		.loc 1 486 21 is_stmt 0 view .LVU173
- 871 0140 504A     		ldr	r2, .L89+20
- 872 0142 1370     		strb	r3, [r2]
- 489:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 873              		.loc 1 489 13 is_stmt 1 view .LVU174
- 489:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 874              		.loc 1 489 23 is_stmt 0 view .LVU175
- 875 0144 524A     		ldr	r2, .L89+32
- 876 0146 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
- 489:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 877              		.loc 1 489 27 view .LVU176
- 878 0148 43F00203 		orr	r3, r3, #2
- 879 014c 1370     		strb	r3, [r2]
- 490:Src/stm32f7xx_it.c ****         break;
- 880              		.loc 1 490 13 is_stmt 1 view .LVU177
- 490:Src/stm32f7xx_it.c ****         break;
- 881              		.loc 1 490 23 is_stmt 0 view .LVU178
- 882 014e 4F4B     		ldr	r3, .L89+28
- 883 0150 0222     		movs	r2, #2
-ARM GAS  /tmp/ccdl7gEi.s 			page 157
+ 876              		.loc 1 480 13 is_stmt 1 view .LVU172
+ 877 0152 8EE7     		b	.L48
+ 878              	.L66:
+ 485:Src/stm32f7xx_it.c ****         break;
+ 879              		.loc 1 485 13 view .LVU173
+ 485:Src/stm32f7xx_it.c ****         break;
+ 880              		.loc 1 485 27 is_stmt 0 view .LVU174
+ 881 0154 464B     		ldr	r3, .L100+8
+ 882 0156 0222     		movs	r2, #2
+ 883 0158 1A80     		strh	r2, [r3]	@ movhi
+ 486:Src/stm32f7xx_it.c ****         case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command
+ 884              		.loc 1 486 9 is_stmt 1 view .LVU175
+ 885 015a 8AE7     		b	.L48
+ 886              	.L63:
+ 491:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 887              		.loc 1 491 13 view .LVU176
+ 491:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 888              		.loc 1 491 27 is_stmt 0 view .LVU177
+ 889 015c 0023     		movs	r3, #0
+ 890 015e 444A     		ldr	r2, .L100+8
+ 891 0160 1380     		strh	r3, [r2]	@ movhi
+ 492:Src/stm32f7xx_it.c ****             //UART_transmission_request = MESS_01;
+ 892              		.loc 1 492 13 is_stmt 1 view .LVU178
+ 492:Src/stm32f7xx_it.c ****             //UART_transmission_request = MESS_01;
+ 893              		.loc 1 492 21 is_stmt 0 view .LVU179
+ 894 0162 464A     		ldr	r2, .L100+20
+ 895 0164 1370     		strb	r3, [r2]
+ 495:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
+ 896              		.loc 1 495 13 is_stmt 1 view .LVU180
+ 495:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
+ 897              		.loc 1 495 23 is_stmt 0 view .LVU181
+ 898 0166 484A     		ldr	r2, .L100+32
+ 899 0168 1378     		ldrb	r3, [r2]	@ zero_extendqisi2
+ 495:Src/stm32f7xx_it.c ****             CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
+ 900              		.loc 1 495 27 view .LVU182
+ 901 016a 43F00203 		orr	r3, r3, #2
+ 902 016e 1370     		strb	r3, [r2]
+ 496:Src/stm32f7xx_it.c ****         break;
+ 903              		.loc 1 496 13 is_stmt 1 view .LVU183
+ 496:Src/stm32f7xx_it.c ****         break;
+ 904              		.loc 1 496 23 is_stmt 0 view .LVU184
+ 905 0170 444B     		ldr	r3, .L100+28
+ 906 0172 0222     		movs	r2, #2
+ 907 0174 1A70     		strb	r2, [r3]
+ 497:Src/stm32f7xx_it.c ****         }
+ARM GAS  /tmp/cczi2eQD.s 			page 158
 
 
- 884 0152 1A70     		strb	r2, [r3]
- 491:Src/stm32f7xx_it.c ****         }
- 885              		.loc 1 491 9 is_stmt 1 view .LVU179
- 886 0154 8DE7     		b	.L48
- 887              	.L53:
- 496:Src/stm32f7xx_it.c ****         {
- 888              		.loc 1 496 9 view .LVU180
- 496:Src/stm32f7xx_it.c ****         {
- 889              		.loc 1 496 25 is_stmt 0 view .LVU181
- 890 0156 4C49     		ldr	r1, .L89+24
- 891 0158 0888     		ldrh	r0, [r1]
- 496:Src/stm32f7xx_it.c ****         {
- 892              		.loc 1 496 12 view .LVU182
- 893 015a 48F68801 		movw	r1, #34952
- 894 015e 8842     		cmp	r0, r1
- 895 0160 12D0     		beq	.L86
- 508:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 896              		.loc 1 508 13 is_stmt 1 view .LVU183
- 508:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 897              		.loc 1 508 16 is_stmt 0 view .LVU184
- 898 0162 13F0010F 		tst	r3, #1
- 899 0166 2AD0     		beq	.L71
- 509:Src/stm32f7xx_it.c ****             else
- 900              		.loc 1 509 17 is_stmt 1 view .LVU185
- 509:Src/stm32f7xx_it.c ****             else
- 901              		.loc 1 509 24 is_stmt 0 view .LVU186
- 902 0168 5908     		lsrs	r1, r3, #1
- 903 016a 0139     		subs	r1, r1, #1
- 904 016c 494C     		ldr	r4, .L89+36
- 905 016e 34F81100 		ldrh	r0, [r4, r1, lsl #1]
- 509:Src/stm32f7xx_it.c ****             else
- 906              		.loc 1 509 47 view .LVU187
- 907 0172 00EB0222 		add	r2, r0, r2, lsl #8
- 908 0176 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
- 909              	.L72:
- 512:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
- 910              		.loc 1 512 13 is_stmt 1 view .LVU188
- 512:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
- 911              		.loc 1 512 26 is_stmt 0 view .LVU189
- 912 017a 0133     		adds	r3, r3, #1
- 913 017c 3E4A     		ldr	r2, .L89+8
- 914 017e 1380     		strh	r3, [r2]	@ movhi
- 513:Src/stm32f7xx_it.c ****         }
- 915              		.loc 1 513 13 is_stmt 1 view .LVU190
- 513:Src/stm32f7xx_it.c ****         }
- 916              		.loc 1 513 39 is_stmt 0 view .LVU191
- 917 0180 454B     		ldr	r3, .L89+40
- 918 0182 0022     		movs	r2, #0
- 919 0184 1A70     		strb	r2, [r3]
- 920 0186 74E7     		b	.L48
- 921              	.L86:
- 498:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 922              		.loc 1 498 13 is_stmt 1 view .LVU192
- 498:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 923              		.loc 1 498 16 is_stmt 0 view .LVU193
- 924 0188 13F0010F 		tst	r3, #1
- 925 018c 11D0     		beq	.L69
-ARM GAS  /tmp/ccdl7gEi.s 			page 158
+ 908              		.loc 1 497 9 is_stmt 1 view .LVU185
+ 909 0176 7CE7     		b	.L48
+ 910              	.L53:
+ 502:Src/stm32f7xx_it.c ****         {
+ 911              		.loc 1 502 9 view .LVU186
+ 502:Src/stm32f7xx_it.c ****         {
+ 912              		.loc 1 502 25 is_stmt 0 view .LVU187
+ 913 0178 4149     		ldr	r1, .L100+24
+ 914 017a 0988     		ldrh	r1, [r1]
+ 502:Src/stm32f7xx_it.c ****         {
+ 915              		.loc 1 502 12 view .LVU188
+ 916 017c 48F68800 		movw	r0, #34952
+ 917 0180 8142     		cmp	r1, r0
+ 918 0182 1AD0     		beq	.L95
+ 512:Src/stm32f7xx_it.c ****         {
+ 919              		.loc 1 512 14 is_stmt 1 view .LVU189
+ 512:Src/stm32f7xx_it.c ****         {
+ 920              		.loc 1 512 17 is_stmt 0 view .LVU190
+ 921 0184 49F69910 		movw	r0, #39321
+ 922 0188 8142     		cmp	r1, r0
+ 923 018a 31D0     		beq	.L96
+ 522:Src/stm32f7xx_it.c ****         {
+ 924              		.loc 1 522 14 is_stmt 1 view .LVU191
+ 522:Src/stm32f7xx_it.c ****         {
+ 925              		.loc 1 522 17 is_stmt 0 view .LVU192
+ 926 018c 4AF6AA20 		movw	r0, #43690
+ 927 0190 8142     		cmp	r1, r0
+ 928 0192 48D0     		beq	.L97
+ 534:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 929              		.loc 1 534 13 is_stmt 1 view .LVU193
+ 534:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 930              		.loc 1 534 16 is_stmt 0 view .LVU194
+ 931 0194 13F0010F 		tst	r3, #1
+ 932 0198 60D0     		beq	.L80
+ 535:Src/stm32f7xx_it.c ****             else
+ 933              		.loc 1 535 17 is_stmt 1 view .LVU195
+ 535:Src/stm32f7xx_it.c ****             else
+ 934              		.loc 1 535 24 is_stmt 0 view .LVU196
+ 935 019a 5908     		lsrs	r1, r3, #1
+ 936 019c 0139     		subs	r1, r1, #1
+ 937 019e 3B4C     		ldr	r4, .L100+36
+ 938 01a0 34F81100 		ldrh	r0, [r4, r1, lsl #1]
+ 535:Src/stm32f7xx_it.c ****             else
+ 939              		.loc 1 535 47 view .LVU197
+ 940 01a4 00EB0222 		add	r2, r0, r2, lsl #8
+ 941 01a8 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
+ 942              	.L81:
+ 538:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
+ 943              		.loc 1 538 13 is_stmt 1 view .LVU198
+ 538:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
+ 944              		.loc 1 538 26 is_stmt 0 view .LVU199
+ 945 01ac 0133     		adds	r3, r3, #1
+ 946 01ae 304A     		ldr	r2, .L100+8
+ 947 01b0 1380     		strh	r3, [r2]	@ movhi
+ 539:Src/stm32f7xx_it.c ****         }
+ 948              		.loc 1 539 13 is_stmt 1 view .LVU200
+ 539:Src/stm32f7xx_it.c ****         }
+ARM GAS  /tmp/cczi2eQD.s 			page 159
 
 
- 499:Src/stm32f7xx_it.c ****             else
- 926              		.loc 1 499 17 is_stmt 1 view .LVU194
- 499:Src/stm32f7xx_it.c ****             else
- 927              		.loc 1 499 24 is_stmt 0 view .LVU195
- 928 018e 5B08     		lsrs	r3, r3, #1
- 929 0190 013B     		subs	r3, r3, #1
- 930 0192 4048     		ldr	r0, .L89+36
- 931 0194 30F81310 		ldrh	r1, [r0, r3, lsl #1]
- 499:Src/stm32f7xx_it.c ****             else
- 932              		.loc 1 499 51 view .LVU196
- 933 0198 01EB0222 		add	r2, r1, r2, lsl #8
- 934 019c 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
- 935              	.L70:
- 502:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 936              		.loc 1 502 13 is_stmt 1 view .LVU197
- 502:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 937              		.loc 1 502 23 is_stmt 0 view .LVU198
- 938 01a0 3A4B     		ldr	r3, .L89+28
- 939 01a2 0A22     		movs	r2, #10
- 940 01a4 1A70     		strb	r2, [r3]
- 503:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 941              		.loc 1 503 13 is_stmt 1 view .LVU199
- 503:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 942              		.loc 1 503 27 is_stmt 0 view .LVU200
- 943 01a6 0023     		movs	r3, #0
- 944 01a8 334A     		ldr	r2, .L89+8
- 945 01aa 1380     		strh	r3, [r2]	@ movhi
- 504:Src/stm32f7xx_it.c ****         }
- 946              		.loc 1 504 13 is_stmt 1 view .LVU201
- 504:Src/stm32f7xx_it.c ****         }
- 947              		.loc 1 504 21 is_stmt 0 view .LVU202
- 948 01ac 354A     		ldr	r2, .L89+20
- 949 01ae 1370     		strb	r3, [r2]
- 950 01b0 5FE7     		b	.L48
- 951              	.L69:
- 501:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
- 952              		.loc 1 501 17 is_stmt 1 view .LVU203
- 501:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
- 953              		.loc 1 501 40 is_stmt 0 view .LVU204
- 954 01b2 5B08     		lsrs	r3, r3, #1
- 501:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
- 955              		.loc 1 501 46 view .LVU205
- 956 01b4 013B     		subs	r3, r3, #1
- 501:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
- 957              		.loc 1 501 51 view .LVU206
- 958 01b6 3749     		ldr	r1, .L89+36
- 959 01b8 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
- 960 01bc F0E7     		b	.L70
- 961              	.L71:
- 511:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 962              		.loc 1 511 17 is_stmt 1 view .LVU207
- 511:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 963              		.loc 1 511 39 is_stmt 0 view .LVU208
- 964 01be 5908     		lsrs	r1, r3, #1
- 511:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 965              		.loc 1 511 43 view .LVU209
- 966 01c0 0139     		subs	r1, r1, #1
-ARM GAS  /tmp/ccdl7gEi.s 			page 159
+ 949              		.loc 1 539 39 is_stmt 0 view .LVU201
+ 950 01b2 374B     		ldr	r3, .L100+40
+ 951 01b4 0022     		movs	r2, #0
+ 952 01b6 1A70     		strb	r2, [r3]
+ 953 01b8 5BE7     		b	.L48
+ 954              	.L95:
+ 504:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 955              		.loc 1 504 13 is_stmt 1 view .LVU202
+ 504:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 956              		.loc 1 504 16 is_stmt 0 view .LVU203
+ 957 01ba 13F0010F 		tst	r3, #1
+ 958 01be 11D0     		beq	.L72
+ 505:Src/stm32f7xx_it.c ****             else
+ 959              		.loc 1 505 17 is_stmt 1 view .LVU204
+ 505:Src/stm32f7xx_it.c ****             else
+ 960              		.loc 1 505 24 is_stmt 0 view .LVU205
+ 961 01c0 5B08     		lsrs	r3, r3, #1
+ 962 01c2 013B     		subs	r3, r3, #1
+ 963 01c4 3148     		ldr	r0, .L100+36
+ 964 01c6 30F81310 		ldrh	r1, [r0, r3, lsl #1]
+ 505:Src/stm32f7xx_it.c ****             else
+ 965              		.loc 1 505 51 view .LVU206
+ 966 01ca 01EB0222 		add	r2, r1, r2, lsl #8
+ 967 01ce 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
+ 968              	.L73:
+ 508:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 969              		.loc 1 508 13 is_stmt 1 view .LVU207
+ 508:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 970              		.loc 1 508 23 is_stmt 0 view .LVU208
+ 971 01d2 2C4B     		ldr	r3, .L100+28
+ 972 01d4 0A22     		movs	r2, #10
+ 973 01d6 1A70     		strb	r2, [r3]
+ 509:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 974              		.loc 1 509 13 is_stmt 1 view .LVU209
+ 509:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 975              		.loc 1 509 27 is_stmt 0 view .LVU210
+ 976 01d8 0023     		movs	r3, #0
+ 977 01da 254A     		ldr	r2, .L100+8
+ 978 01dc 1380     		strh	r3, [r2]	@ movhi
+ 510:Src/stm32f7xx_it.c ****         }
+ 979              		.loc 1 510 13 is_stmt 1 view .LVU211
+ 510:Src/stm32f7xx_it.c ****         }
+ 980              		.loc 1 510 21 is_stmt 0 view .LVU212
+ 981 01de 274A     		ldr	r2, .L100+20
+ 982 01e0 1370     		strb	r3, [r2]
+ 983 01e2 46E7     		b	.L48
+ 984              	.L72:
+ 507:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
+ 985              		.loc 1 507 17 is_stmt 1 view .LVU213
+ 507:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
+ 986              		.loc 1 507 40 is_stmt 0 view .LVU214
+ 987 01e4 5B08     		lsrs	r3, r3, #1
+ 507:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
+ 988              		.loc 1 507 46 view .LVU215
+ 989 01e6 013B     		subs	r3, r3, #1
+ 507:Src/stm32f7xx_it.c ****             CPU_state = AD9102_CMD;
+ 990              		.loc 1 507 51 view .LVU216
+ARM GAS  /tmp/cczi2eQD.s 			page 160
 
 
- 511:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 967              		.loc 1 511 47 view .LVU210
- 968 01c2 3448     		ldr	r0, .L89+36
- 969 01c4 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
- 970 01c8 D7E7     		b	.L72
- 971              	.L52:
- 518:Src/stm32f7xx_it.c ****         {
- 972              		.loc 1 518 9 is_stmt 1 view .LVU211
- 518:Src/stm32f7xx_it.c ****         {
- 973              		.loc 1 518 25 is_stmt 0 view .LVU212
- 974 01ca 2F49     		ldr	r1, .L89+24
- 975 01cc 0888     		ldrh	r0, [r1]
- 518:Src/stm32f7xx_it.c ****         {
- 976              		.loc 1 518 12 view .LVU213
- 977 01ce 41F21111 		movw	r1, #4369
- 978 01d2 8842     		cmp	r0, r1
- 979 01d4 12D0     		beq	.L87
- 530:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 980              		.loc 1 530 13 is_stmt 1 view .LVU214
- 530:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 981              		.loc 1 530 16 is_stmt 0 view .LVU215
- 982 01d6 13F0010F 		tst	r3, #1
- 983 01da 2AD0     		beq	.L76
- 531:Src/stm32f7xx_it.c ****             else
- 984              		.loc 1 531 17 is_stmt 1 view .LVU216
- 531:Src/stm32f7xx_it.c ****             else
- 985              		.loc 1 531 24 is_stmt 0 view .LVU217
- 986 01dc 5908     		lsrs	r1, r3, #1
- 987 01de 0139     		subs	r1, r1, #1
- 988 01e0 2C4C     		ldr	r4, .L89+36
- 989 01e2 34F81100 		ldrh	r0, [r4, r1, lsl #1]
- 531:Src/stm32f7xx_it.c ****             else
- 990              		.loc 1 531 47 view .LVU218
- 991 01e6 00EB0222 		add	r2, r0, r2, lsl #8
- 992 01ea 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
- 993              	.L77:
- 534:Src/stm32f7xx_it.c ****            UART_transmission_request = NO_MESS;
- 994              		.loc 1 534 12 is_stmt 1 view .LVU219
- 534:Src/stm32f7xx_it.c ****            UART_transmission_request = NO_MESS;
- 995              		.loc 1 534 25 is_stmt 0 view .LVU220
- 996 01ee 0133     		adds	r3, r3, #1
- 997 01f0 214A     		ldr	r2, .L89+8
- 998 01f2 1380     		strh	r3, [r2]	@ movhi
- 535:Src/stm32f7xx_it.c ****         }
- 999              		.loc 1 535 12 is_stmt 1 view .LVU221
- 535:Src/stm32f7xx_it.c ****         }
- 1000              		.loc 1 535 38 is_stmt 0 view .LVU222
- 1001 01f4 284B     		ldr	r3, .L89+40
- 1002 01f6 0022     		movs	r2, #0
- 1003 01f8 1A70     		strb	r2, [r3]
- 1004 01fa 3AE7     		b	.L48
- 1005              	.L87:
- 520:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1006              		.loc 1 520 13 is_stmt 1 view .LVU223
- 520:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1007              		.loc 1 520 16 is_stmt 0 view .LVU224
- 1008 01fc 13F0010F 		tst	r3, #1
-ARM GAS  /tmp/ccdl7gEi.s 			page 160
+ 991 01e8 2849     		ldr	r1, .L100+36
+ 992 01ea 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
+ 993 01ee F0E7     		b	.L73
+ 994              	.L96:
+ 514:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 995              		.loc 1 514 13 is_stmt 1 view .LVU217
+ 514:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 996              		.loc 1 514 16 is_stmt 0 view .LVU218
+ 997 01f0 13F0010F 		tst	r3, #1
+ 998 01f4 11D0     		beq	.L75
+ 515:Src/stm32f7xx_it.c ****             else
+ 999              		.loc 1 515 17 is_stmt 1 view .LVU219
+ 515:Src/stm32f7xx_it.c ****             else
+ 1000              		.loc 1 515 24 is_stmt 0 view .LVU220
+ 1001 01f6 5B08     		lsrs	r3, r3, #1
+ 1002 01f8 013B     		subs	r3, r3, #1
+ 1003 01fa 2448     		ldr	r0, .L100+36
+ 1004 01fc 30F81310 		ldrh	r1, [r0, r3, lsl #1]
+ 515:Src/stm32f7xx_it.c ****             else
+ 1005              		.loc 1 515 51 view .LVU221
+ 1006 0200 01EB0222 		add	r2, r1, r2, lsl #8
+ 1007 0204 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
+ 1008              	.L76:
+ 518:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1009              		.loc 1 518 13 is_stmt 1 view .LVU222
+ 518:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1010              		.loc 1 518 23 is_stmt 0 view .LVU223
+ 1011 0208 1E4B     		ldr	r3, .L100+28
+ 1012 020a 0B22     		movs	r2, #11
+ 1013 020c 1A70     		strb	r2, [r3]
+ 519:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1014              		.loc 1 519 13 is_stmt 1 view .LVU224
+ 519:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1015              		.loc 1 519 27 is_stmt 0 view .LVU225
+ 1016 020e 0023     		movs	r3, #0
+ 1017 0210 174A     		ldr	r2, .L100+8
+ 1018 0212 1380     		strh	r3, [r2]	@ movhi
+ 520:Src/stm32f7xx_it.c ****         }
+ 1019              		.loc 1 520 13 is_stmt 1 view .LVU226
+ 520:Src/stm32f7xx_it.c ****         }
+ 1020              		.loc 1 520 21 is_stmt 0 view .LVU227
+ 1021 0214 194A     		ldr	r2, .L100+20
+ 1022 0216 1370     		strb	r3, [r2]
+ 1023 0218 2BE7     		b	.L48
+ 1024              	.L75:
+ 517:Src/stm32f7xx_it.c ****             CPU_state = AD9833_CMD;
+ 1025              		.loc 1 517 17 is_stmt 1 view .LVU228
+ 517:Src/stm32f7xx_it.c ****             CPU_state = AD9833_CMD;
+ 1026              		.loc 1 517 40 is_stmt 0 view .LVU229
+ 1027 021a 5B08     		lsrs	r3, r3, #1
+ 517:Src/stm32f7xx_it.c ****             CPU_state = AD9833_CMD;
+ 1028              		.loc 1 517 46 view .LVU230
+ 1029 021c 013B     		subs	r3, r3, #1
+ 517:Src/stm32f7xx_it.c ****             CPU_state = AD9833_CMD;
+ 1030              		.loc 1 517 51 view .LVU231
+ 1031 021e 1B49     		ldr	r1, .L100+36
+ 1032 0220 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
+ARM GAS  /tmp/cczi2eQD.s 			page 161
 
 
- 1009 0200 11D0     		beq	.L74
- 521:Src/stm32f7xx_it.c ****             else
- 1010              		.loc 1 521 17 is_stmt 1 view .LVU225
- 521:Src/stm32f7xx_it.c ****             else
- 1011              		.loc 1 521 24 is_stmt 0 view .LVU226
- 1012 0202 5B08     		lsrs	r3, r3, #1
- 1013 0204 013B     		subs	r3, r3, #1
- 1014 0206 2348     		ldr	r0, .L89+36
- 1015 0208 30F81310 		ldrh	r1, [r0, r3, lsl #1]
- 521:Src/stm32f7xx_it.c ****             else
- 1016              		.loc 1 521 51 view .LVU227
- 1017 020c 01EB0222 		add	r2, r1, r2, lsl #8
- 1018 0210 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
- 1019              	.L75:
- 524:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 1020              		.loc 1 524 13 is_stmt 1 view .LVU228
- 524:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 1021              		.loc 1 524 23 is_stmt 0 view .LVU229
- 1022 0214 1D4B     		ldr	r3, .L89+28
- 1023 0216 0122     		movs	r2, #1
- 1024 0218 1A70     		strb	r2, [r3]
- 525:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 1025              		.loc 1 525 13 is_stmt 1 view .LVU230
- 525:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 1026              		.loc 1 525 27 is_stmt 0 view .LVU231
- 1027 021a 0023     		movs	r3, #0
- 1028 021c 164A     		ldr	r2, .L89+8
- 1029 021e 1380     		strh	r3, [r2]	@ movhi
- 526:Src/stm32f7xx_it.c ****         }
- 1030              		.loc 1 526 13 is_stmt 1 view .LVU232
- 526:Src/stm32f7xx_it.c ****         }
- 1031              		.loc 1 526 21 is_stmt 0 view .LVU233
- 1032 0220 184A     		ldr	r2, .L89+20
- 1033 0222 1370     		strb	r3, [r2]
- 1034 0224 25E7     		b	.L48
- 1035              	.L74:
- 523:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
- 1036              		.loc 1 523 17 is_stmt 1 view .LVU234
- 523:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
- 1037              		.loc 1 523 40 is_stmt 0 view .LVU235
- 1038 0226 5B08     		lsrs	r3, r3, #1
- 523:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
- 1039              		.loc 1 523 46 view .LVU236
- 1040 0228 013B     		subs	r3, r3, #1
- 523:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
- 1041              		.loc 1 523 51 view .LVU237
- 1042 022a 1A49     		ldr	r1, .L89+36
- 1043 022c 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
- 1044 0230 F0E7     		b	.L75
- 1045              	.L76:
- 533:Src/stm32f7xx_it.c ****            UART_rec_incr++;
- 1046              		.loc 1 533 17 is_stmt 1 view .LVU238
- 533:Src/stm32f7xx_it.c ****            UART_rec_incr++;
- 1047              		.loc 1 533 39 is_stmt 0 view .LVU239
- 1048 0232 5908     		lsrs	r1, r3, #1
- 533:Src/stm32f7xx_it.c ****            UART_rec_incr++;
- 1049              		.loc 1 533 43 view .LVU240
-ARM GAS  /tmp/ccdl7gEi.s 			page 161
+ 1033 0224 F0E7     		b	.L76
+ 1034              	.L97:
+ 524:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 1035              		.loc 1 524 13 is_stmt 1 view .LVU232
+ 524:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 1036              		.loc 1 524 16 is_stmt 0 view .LVU233
+ 1037 0226 13F0010F 		tst	r3, #1
+ 1038 022a 11D0     		beq	.L78
+ 525:Src/stm32f7xx_it.c ****             else
+ 1039              		.loc 1 525 17 is_stmt 1 view .LVU234
+ 525:Src/stm32f7xx_it.c ****             else
+ 1040              		.loc 1 525 24 is_stmt 0 view .LVU235
+ 1041 022c 5B08     		lsrs	r3, r3, #1
+ 1042 022e 013B     		subs	r3, r3, #1
+ 1043 0230 1648     		ldr	r0, .L100+36
+ 1044 0232 30F81310 		ldrh	r1, [r0, r3, lsl #1]
+ 525:Src/stm32f7xx_it.c ****             else
+ 1045              		.loc 1 525 51 view .LVU236
+ 1046 0236 01EB0222 		add	r2, r1, r2, lsl #8
+ 1047 023a 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
+ 1048              	.L79:
+ 528:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1049              		.loc 1 528 13 is_stmt 1 view .LVU237
+ 528:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1050              		.loc 1 528 23 is_stmt 0 view .LVU238
+ 1051 023e 114B     		ldr	r3, .L100+28
+ 1052 0240 0C22     		movs	r2, #12
+ 1053 0242 1A70     		strb	r2, [r3]
+ 529:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1054              		.loc 1 529 13 is_stmt 1 view .LVU239
+ 529:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1055              		.loc 1 529 27 is_stmt 0 view .LVU240
+ 1056 0244 0023     		movs	r3, #0
+ 1057 0246 0A4A     		ldr	r2, .L100+8
+ 1058 0248 1380     		strh	r3, [r2]	@ movhi
+ 530:Src/stm32f7xx_it.c ****         }
+ 1059              		.loc 1 530 13 is_stmt 1 view .LVU241
+ 530:Src/stm32f7xx_it.c ****         }
+ 1060              		.loc 1 530 21 is_stmt 0 view .LVU242
+ 1061 024a 0C4A     		ldr	r2, .L100+20
+ 1062 024c 1370     		strb	r3, [r2]
+ 1063 024e 10E7     		b	.L48
+ 1064              	.L78:
+ 527:Src/stm32f7xx_it.c ****             CPU_state = DS1809_CMD;
+ 1065              		.loc 1 527 17 is_stmt 1 view .LVU243
+ 527:Src/stm32f7xx_it.c ****             CPU_state = DS1809_CMD;
+ 1066              		.loc 1 527 40 is_stmt 0 view .LVU244
+ 1067 0250 5B08     		lsrs	r3, r3, #1
+ 527:Src/stm32f7xx_it.c ****             CPU_state = DS1809_CMD;
+ 1068              		.loc 1 527 46 view .LVU245
+ 1069 0252 013B     		subs	r3, r3, #1
+ 527:Src/stm32f7xx_it.c ****             CPU_state = DS1809_CMD;
+ 1070              		.loc 1 527 51 view .LVU246
+ 1071 0254 0D49     		ldr	r1, .L100+36
+ 1072 0256 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
+ 1073 025a F0E7     		b	.L79
+ 1074              	.L80:
+ARM GAS  /tmp/cczi2eQD.s 			page 162
 
 
- 1050 0234 0139     		subs	r1, r1, #1
- 533:Src/stm32f7xx_it.c ****            UART_rec_incr++;
- 1051              		.loc 1 533 47 view .LVU241
- 1052 0236 1748     		ldr	r0, .L89+36
- 1053 0238 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
- 1054 023c D7E7     		b	.L77
- 1055              	.L50:
- 539:Src/stm32f7xx_it.c ****         {
- 1056              		.loc 1 539 9 is_stmt 1 view .LVU242
- 539:Src/stm32f7xx_it.c ****         {
- 1057              		.loc 1 539 25 is_stmt 0 view .LVU243
- 1058 023e 1249     		ldr	r1, .L89+24
- 1059 0240 0888     		ldrh	r0, [r1]
- 539:Src/stm32f7xx_it.c ****         {
- 1060              		.loc 1 539 12 view .LVU244
- 1061 0242 47F27771 		movw	r1, #30583
- 1062 0246 8842     		cmp	r0, r1
- 1063 0248 28D0     		beq	.L88
- 551:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1064              		.loc 1 551 13 is_stmt 1 view .LVU245
- 551:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1065              		.loc 1 551 16 is_stmt 0 view .LVU246
- 1066 024a 13F0010F 		tst	r3, #1
- 1067 024e 40D0     		beq	.L81
- 552:Src/stm32f7xx_it.c ****             else
- 1068              		.loc 1 552 17 is_stmt 1 view .LVU247
- 552:Src/stm32f7xx_it.c ****             else
- 1069              		.loc 1 552 24 is_stmt 0 view .LVU248
- 1070 0250 5908     		lsrs	r1, r3, #1
- 1071 0252 0139     		subs	r1, r1, #1
- 1072 0254 0F4C     		ldr	r4, .L89+36
- 1073 0256 34F81100 		ldrh	r0, [r4, r1, lsl #1]
- 552:Src/stm32f7xx_it.c ****             else
- 1074              		.loc 1 552 47 view .LVU249
- 1075 025a 00EB0222 		add	r2, r0, r2, lsl #8
- 1076 025e 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
- 1077              	.L82:
- 555:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
- 1078              		.loc 1 555 13 is_stmt 1 view .LVU250
- 555:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
- 1079              		.loc 1 555 26 is_stmt 0 view .LVU251
- 1080 0262 0133     		adds	r3, r3, #1
- 1081 0264 044A     		ldr	r2, .L89+8
- 1082 0266 1380     		strh	r3, [r2]	@ movhi
- 556:Src/stm32f7xx_it.c ****         }
- 1083              		.loc 1 556 13 is_stmt 1 view .LVU252
- 556:Src/stm32f7xx_it.c ****         }
- 1084              		.loc 1 556 39 is_stmt 0 view .LVU253
- 1085 0268 0B4B     		ldr	r3, .L89+40
- 1086 026a 0022     		movs	r2, #0
- 1087 026c 1A70     		strb	r2, [r3]
- 1088 026e 00E7     		b	.L48
- 1089              	.L90:
- 1090              		.align	2
- 1091              	.L89:
- 1092 0270 00100140 		.word	1073811456
- 1093 0274 00000000 		.word	uart_buf
-ARM GAS  /tmp/ccdl7gEi.s 			page 162
+ 537:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1075              		.loc 1 537 17 is_stmt 1 view .LVU247
+ 537:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1076              		.loc 1 537 39 is_stmt 0 view .LVU248
+ 1077 025c 5908     		lsrs	r1, r3, #1
+ 537:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1078              		.loc 1 537 43 view .LVU249
+ 1079 025e 0139     		subs	r1, r1, #1
+ 537:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1080              		.loc 1 537 47 view .LVU250
+ 1081 0260 0A48     		ldr	r0, .L100+36
+ 1082 0262 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
+ 1083 0266 A1E7     		b	.L81
+ 1084              	.L101:
+ 1085              		.align	2
+ 1086              	.L100:
+ 1087 0268 00100140 		.word	1073811456
+ 1088 026c 00000000 		.word	uart_buf
+ 1089 0270 00000000 		.word	UART_rec_incr
+ 1090 0274 00000000 		.word	TO6
+ 1091 0278 00000000 		.word	TO6_uart
+ 1092 027c 00000000 		.word	flg_tmt
+ 1093 0280 00000000 		.word	UART_header
+ 1094 0284 00000000 		.word	CPU_state
+ 1095 0288 00000000 		.word	State_Data
+ 1096 028c 00000000 		.word	COMMAND
+ 1097 0290 00000000 		.word	UART_transmission_request
+ 1098              	.L52:
+ 544:Src/stm32f7xx_it.c ****         {
+ 1099              		.loc 1 544 9 is_stmt 1 view .LVU251
+ 544:Src/stm32f7xx_it.c ****         {
+ 1100              		.loc 1 544 25 is_stmt 0 view .LVU252
+ 1101 0294 4649     		ldr	r1, .L102
+ 1102 0296 0888     		ldrh	r0, [r1]
+ 544:Src/stm32f7xx_it.c ****         {
+ 1103              		.loc 1 544 12 view .LVU253
+ 1104 0298 41F21111 		movw	r1, #4369
+ 1105 029c 8842     		cmp	r0, r1
+ 1106 029e 12D0     		beq	.L98
+ 556:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1107              		.loc 1 556 13 is_stmt 1 view .LVU254
+ 556:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1108              		.loc 1 556 16 is_stmt 0 view .LVU255
+ 1109 02a0 13F0010F 		tst	r3, #1
+ 1110 02a4 2AD0     		beq	.L85
+ 557:Src/stm32f7xx_it.c ****             else
+ 1111              		.loc 1 557 17 is_stmt 1 view .LVU256
+ 557:Src/stm32f7xx_it.c ****             else
+ 1112              		.loc 1 557 24 is_stmt 0 view .LVU257
+ 1113 02a6 5908     		lsrs	r1, r3, #1
+ 1114 02a8 0139     		subs	r1, r1, #1
+ 1115 02aa 424C     		ldr	r4, .L102+4
+ 1116 02ac 34F81100 		ldrh	r0, [r4, r1, lsl #1]
+ 557:Src/stm32f7xx_it.c ****             else
+ 1117              		.loc 1 557 47 view .LVU258
+ 1118 02b0 00EB0222 		add	r2, r0, r2, lsl #8
+ 1119 02b4 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
+ARM GAS  /tmp/cczi2eQD.s 			page 163
 
 
- 1094 0278 00000000 		.word	UART_rec_incr
- 1095 027c 00000000 		.word	TO6
- 1096 0280 00000000 		.word	TO6_uart
- 1097 0284 00000000 		.word	flg_tmt
- 1098 0288 00000000 		.word	UART_header
- 1099 028c 00000000 		.word	CPU_state
- 1100 0290 00000000 		.word	State_Data
- 1101 0294 00000000 		.word	COMMAND
- 1102 0298 00000000 		.word	UART_transmission_request
- 1103              	.L88:
- 541:Src/stm32f7xx_it.c ****     	          COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1104              		.loc 1 541 13 is_stmt 1 view .LVU254
- 541:Src/stm32f7xx_it.c ****     	          COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1105              		.loc 1 541 16 is_stmt 0 view .LVU255
- 1106 029c 13F0010F 		tst	r3, #1
- 1107 02a0 11D0     		beq	.L79
- 542:Src/stm32f7xx_it.c ****     	      else
- 1108              		.loc 1 542 16 is_stmt 1 view .LVU256
- 542:Src/stm32f7xx_it.c ****     	      else
- 1109              		.loc 1 542 23 is_stmt 0 view .LVU257
- 1110 02a2 5B08     		lsrs	r3, r3, #1
- 1111 02a4 013B     		subs	r3, r3, #1
- 1112 02a6 1A48     		ldr	r0, .L91
- 1113 02a8 30F81310 		ldrh	r1, [r0, r3, lsl #1]
- 542:Src/stm32f7xx_it.c ****     	      else
- 1114              		.loc 1 542 46 view .LVU258
- 1115 02ac 01EB0222 		add	r2, r1, r2, lsl #8
- 1116 02b0 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
- 1117              	.L80:
- 545:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 1118              		.loc 1 545 13 is_stmt 1 view .LVU259
- 545:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
- 1119              		.loc 1 545 23 is_stmt 0 view .LVU260
- 1120 02b4 174B     		ldr	r3, .L91+4
- 1121 02b6 0822     		movs	r2, #8
- 1122 02b8 1A70     		strb	r2, [r3]
- 546:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 1123              		.loc 1 546 13 is_stmt 1 view .LVU261
- 546:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
- 1124              		.loc 1 546 27 is_stmt 0 view .LVU262
- 1125 02ba 0023     		movs	r3, #0
- 1126 02bc 164A     		ldr	r2, .L91+8
- 1127 02be 1380     		strh	r3, [r2]	@ movhi
- 547:Src/stm32f7xx_it.c ****         }
- 1128              		.loc 1 547 13 is_stmt 1 view .LVU263
- 547:Src/stm32f7xx_it.c ****         }
- 1129              		.loc 1 547 21 is_stmt 0 view .LVU264
- 1130 02c0 164A     		ldr	r2, .L91+12
- 1131 02c2 1370     		strb	r3, [r2]
- 1132 02c4 D5E6     		b	.L48
- 1133              	.L79:
- 544:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
- 1134              		.loc 1 544 17 is_stmt 1 view .LVU265
- 544:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
- 1135              		.loc 1 544 39 is_stmt 0 view .LVU266
- 1136 02c6 5B08     		lsrs	r3, r3, #1
- 544:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
-ARM GAS  /tmp/ccdl7gEi.s 			page 163
+ 1120              	.L86:
+ 560:Src/stm32f7xx_it.c ****            UART_transmission_request = NO_MESS;
+ 1121              		.loc 1 560 12 is_stmt 1 view .LVU259
+ 560:Src/stm32f7xx_it.c ****            UART_transmission_request = NO_MESS;
+ 1122              		.loc 1 560 25 is_stmt 0 view .LVU260
+ 1123 02b8 0133     		adds	r3, r3, #1
+ 1124 02ba 3F4A     		ldr	r2, .L102+8
+ 1125 02bc 1380     		strh	r3, [r2]	@ movhi
+ 561:Src/stm32f7xx_it.c ****         }
+ 1126              		.loc 1 561 12 is_stmt 1 view .LVU261
+ 561:Src/stm32f7xx_it.c ****         }
+ 1127              		.loc 1 561 38 is_stmt 0 view .LVU262
+ 1128 02be 3F4B     		ldr	r3, .L102+12
+ 1129 02c0 0022     		movs	r2, #0
+ 1130 02c2 1A70     		strb	r2, [r3]
+ 1131 02c4 D5E6     		b	.L48
+ 1132              	.L98:
+ 546:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 1133              		.loc 1 546 13 is_stmt 1 view .LVU263
+ 546:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
+ 1134              		.loc 1 546 16 is_stmt 0 view .LVU264
+ 1135 02c6 13F0010F 		tst	r3, #1
+ 1136 02ca 11D0     		beq	.L83
+ 547:Src/stm32f7xx_it.c ****             else
+ 1137              		.loc 1 547 17 is_stmt 1 view .LVU265
+ 547:Src/stm32f7xx_it.c ****             else
+ 1138              		.loc 1 547 24 is_stmt 0 view .LVU266
+ 1139 02cc 5B08     		lsrs	r3, r3, #1
+ 1140 02ce 013B     		subs	r3, r3, #1
+ 1141 02d0 3848     		ldr	r0, .L102+4
+ 1142 02d2 30F81310 		ldrh	r1, [r0, r3, lsl #1]
+ 547:Src/stm32f7xx_it.c ****             else
+ 1143              		.loc 1 547 51 view .LVU267
+ 1144 02d6 01EB0222 		add	r2, r1, r2, lsl #8
+ 1145 02da 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
+ 1146              	.L84:
+ 550:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1147              		.loc 1 550 13 is_stmt 1 view .LVU268
+ 550:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1148              		.loc 1 550 23 is_stmt 0 view .LVU269
+ 1149 02de 384B     		ldr	r3, .L102+16
+ 1150 02e0 0122     		movs	r2, #1
+ 1151 02e2 1A70     		strb	r2, [r3]
+ 551:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1152              		.loc 1 551 13 is_stmt 1 view .LVU270
+ 551:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1153              		.loc 1 551 27 is_stmt 0 view .LVU271
+ 1154 02e4 0023     		movs	r3, #0
+ 1155 02e6 344A     		ldr	r2, .L102+8
+ 1156 02e8 1380     		strh	r3, [r2]	@ movhi
+ 552:Src/stm32f7xx_it.c ****         }
+ 1157              		.loc 1 552 13 is_stmt 1 view .LVU272
+ 552:Src/stm32f7xx_it.c ****         }
+ 1158              		.loc 1 552 21 is_stmt 0 view .LVU273
+ 1159 02ea 364A     		ldr	r2, .L102+20
+ 1160 02ec 1370     		strb	r3, [r2]
+ 1161 02ee C0E6     		b	.L48
+ARM GAS  /tmp/cczi2eQD.s 			page 164
 
 
- 1137              		.loc 1 544 43 view .LVU267
- 1138 02c8 013B     		subs	r3, r3, #1
- 544:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
- 1139              		.loc 1 544 47 view .LVU268
- 1140 02ca 1149     		ldr	r1, .L91
- 1141 02cc 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
- 1142 02d0 F0E7     		b	.L80
- 1143              	.L81:
- 554:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 1144              		.loc 1 554 17 is_stmt 1 view .LVU269
- 554:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 1145              		.loc 1 554 39 is_stmt 0 view .LVU270
- 1146 02d2 5908     		lsrs	r1, r3, #1
- 554:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 1147              		.loc 1 554 43 view .LVU271
- 1148 02d4 0139     		subs	r1, r1, #1
- 554:Src/stm32f7xx_it.c ****             UART_rec_incr++;
- 1149              		.loc 1 554 47 view .LVU272
- 1150 02d6 0E48     		ldr	r0, .L91
- 1151 02d8 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
- 1152 02dc C1E7     		b	.L82
- 1153              	.L49:
- 560:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1154              		.loc 1 560 9 is_stmt 1 view .LVU273
- 560:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1155              		.loc 1 560 12 is_stmt 0 view .LVU274
- 1156 02de 13F0010F 		tst	r3, #1
- 1157 02e2 0FD0     		beq	.L83
- 561:Src/stm32f7xx_it.c ****         else
- 1158              		.loc 1 561 13 is_stmt 1 view .LVU275
- 561:Src/stm32f7xx_it.c ****         else
- 1159              		.loc 1 561 20 is_stmt 0 view .LVU276
- 1160 02e4 5908     		lsrs	r1, r3, #1
- 1161 02e6 0139     		subs	r1, r1, #1
- 1162 02e8 094C     		ldr	r4, .L91
- 1163 02ea 34F81100 		ldrh	r0, [r4, r1, lsl #1]
- 561:Src/stm32f7xx_it.c ****         else
- 1164              		.loc 1 561 43 view .LVU277
- 1165 02ee 00EB0222 		add	r2, r0, r2, lsl #8
- 1166 02f2 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
- 1167              	.L84:
- 564:Src/stm32f7xx_it.c ****         UART_transmission_request = NO_MESS;
- 1168              		.loc 1 564 9 is_stmt 1 view .LVU278
- 564:Src/stm32f7xx_it.c ****         UART_transmission_request = NO_MESS;
- 1169              		.loc 1 564 22 is_stmt 0 view .LVU279
- 1170 02f6 0133     		adds	r3, r3, #1
- 1171 02f8 074A     		ldr	r2, .L91+8
- 1172 02fa 1380     		strh	r3, [r2]	@ movhi
- 565:Src/stm32f7xx_it.c ****     break;
- 1173              		.loc 1 565 9 is_stmt 1 view .LVU280
- 565:Src/stm32f7xx_it.c ****     break;
- 1174              		.loc 1 565 35 is_stmt 0 view .LVU281
- 1175 02fc 084B     		ldr	r3, .L91+16
- 1176 02fe 0022     		movs	r2, #0
- 1177 0300 1A70     		strb	r2, [r3]
- 566:Src/stm32f7xx_it.c ****     }
- 1178              		.loc 1 566 5 is_stmt 1 view .LVU282
-ARM GAS  /tmp/ccdl7gEi.s 			page 164
+ 1162              	.L83:
+ 549:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
+ 1163              		.loc 1 549 17 is_stmt 1 view .LVU274
+ 549:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
+ 1164              		.loc 1 549 40 is_stmt 0 view .LVU275
+ 1165 02f0 5B08     		lsrs	r3, r3, #1
+ 549:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
+ 1166              		.loc 1 549 46 view .LVU276
+ 1167 02f2 013B     		subs	r3, r3, #1
+ 549:Src/stm32f7xx_it.c ****             CPU_state = DECODE_ENABLE;
+ 1168              		.loc 1 549 51 view .LVU277
+ 1169 02f4 2F49     		ldr	r1, .L102+4
+ 1170 02f6 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
+ 1171 02fa F0E7     		b	.L84
+ 1172              	.L85:
+ 559:Src/stm32f7xx_it.c ****            UART_rec_incr++;
+ 1173              		.loc 1 559 17 is_stmt 1 view .LVU278
+ 559:Src/stm32f7xx_it.c ****            UART_rec_incr++;
+ 1174              		.loc 1 559 39 is_stmt 0 view .LVU279
+ 1175 02fc 5908     		lsrs	r1, r3, #1
+ 559:Src/stm32f7xx_it.c ****            UART_rec_incr++;
+ 1176              		.loc 1 559 43 view .LVU280
+ 1177 02fe 0139     		subs	r1, r1, #1
+ 559:Src/stm32f7xx_it.c ****            UART_rec_incr++;
+ 1178              		.loc 1 559 47 view .LVU281
+ 1179 0300 2C48     		ldr	r0, .L102+4
+ 1180 0302 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
+ 1181 0306 D7E7     		b	.L86
+ 1182              	.L50:
+ 565:Src/stm32f7xx_it.c ****         {
+ 1183              		.loc 1 565 9 is_stmt 1 view .LVU282
+ 565:Src/stm32f7xx_it.c ****         {
+ 1184              		.loc 1 565 25 is_stmt 0 view .LVU283
+ 1185 0308 2949     		ldr	r1, .L102
+ 1186 030a 0888     		ldrh	r0, [r1]
+ 565:Src/stm32f7xx_it.c ****         {
+ 1187              		.loc 1 565 12 view .LVU284
+ 1188 030c 47F27771 		movw	r1, #30583
+ 1189 0310 8842     		cmp	r0, r1
+ 1190 0312 12D0     		beq	.L99
+ 577:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1191              		.loc 1 577 13 is_stmt 1 view .LVU285
+ 577:Src/stm32f7xx_it.c ****                 COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1192              		.loc 1 577 16 is_stmt 0 view .LVU286
+ 1193 0314 13F0010F 		tst	r3, #1
+ 1194 0318 2AD0     		beq	.L90
+ 578:Src/stm32f7xx_it.c ****             else
+ 1195              		.loc 1 578 17 is_stmt 1 view .LVU287
+ 578:Src/stm32f7xx_it.c ****             else
+ 1196              		.loc 1 578 24 is_stmt 0 view .LVU288
+ 1197 031a 5908     		lsrs	r1, r3, #1
+ 1198 031c 0139     		subs	r1, r1, #1
+ 1199 031e 254C     		ldr	r4, .L102+4
+ 1200 0320 34F81100 		ldrh	r0, [r4, r1, lsl #1]
+ 578:Src/stm32f7xx_it.c ****             else
+ 1201              		.loc 1 578 47 view .LVU289
+ 1202 0324 00EB0222 		add	r2, r0, r2, lsl #8
+ARM GAS  /tmp/cczi2eQD.s 			page 165
 
 
- 1179              		.loc 1 569 1 is_stmt 0 view .LVU283
- 1180 0302 B6E6     		b	.L48
- 1181              	.L83:
- 563:Src/stm32f7xx_it.c ****         UART_rec_incr++;
- 1182              		.loc 1 563 13 is_stmt 1 view .LVU284
- 563:Src/stm32f7xx_it.c ****         UART_rec_incr++;
- 1183              		.loc 1 563 35 is_stmt 0 view .LVU285
- 1184 0304 5908     		lsrs	r1, r3, #1
- 563:Src/stm32f7xx_it.c ****         UART_rec_incr++;
- 1185              		.loc 1 563 39 view .LVU286
- 1186 0306 0139     		subs	r1, r1, #1
- 563:Src/stm32f7xx_it.c ****         UART_rec_incr++;
- 1187              		.loc 1 563 43 view .LVU287
- 1188 0308 0148     		ldr	r0, .L91
- 1189 030a 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
- 1190 030e F2E7     		b	.L84
- 1191              	.L92:
- 1192              		.align	2
- 1193              	.L91:
- 1194 0310 00000000 		.word	COMMAND
- 1195 0314 00000000 		.word	CPU_state
- 1196 0318 00000000 		.word	UART_rec_incr
- 1197 031c 00000000 		.word	flg_tmt
- 1198 0320 00000000 		.word	UART_transmission_request
- 1199              		.cfi_endproc
- 1200              	.LFE1202:
- 1202              		.section	.text.USART1_IRQHandler,"ax",%progbits
- 1203              		.align	1
- 1204              		.global	USART1_IRQHandler
- 1205              		.syntax unified
- 1206              		.thumb
- 1207              		.thumb_func
- 1209              	USART1_IRQHandler:
- 1210              	.LFB1196:
+ 1203 0328 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
+ 1204              	.L91:
+ 581:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
+ 1205              		.loc 1 581 13 is_stmt 1 view .LVU290
+ 581:Src/stm32f7xx_it.c ****             UART_transmission_request = NO_MESS;
+ 1206              		.loc 1 581 26 is_stmt 0 view .LVU291
+ 1207 032c 0133     		adds	r3, r3, #1
+ 1208 032e 224A     		ldr	r2, .L102+8
+ 1209 0330 1380     		strh	r3, [r2]	@ movhi
+ 582:Src/stm32f7xx_it.c ****         }
+ 1210              		.loc 1 582 13 is_stmt 1 view .LVU292
+ 582:Src/stm32f7xx_it.c ****         }
+ 1211              		.loc 1 582 39 is_stmt 0 view .LVU293
+ 1212 0332 224B     		ldr	r3, .L102+12
+ 1213 0334 0022     		movs	r2, #0
+ 1214 0336 1A70     		strb	r2, [r3]
+ 1215 0338 9BE6     		b	.L48
+ 1216              	.L99:
+ 567:Src/stm32f7xx_it.c ****     	          COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1217              		.loc 1 567 13 is_stmt 1 view .LVU294
+ 567:Src/stm32f7xx_it.c ****     	          COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1218              		.loc 1 567 16 is_stmt 0 view .LVU295
+ 1219 033a 13F0010F 		tst	r3, #1
+ 1220 033e 11D0     		beq	.L88
+ 568:Src/stm32f7xx_it.c ****     	      else
+ 1221              		.loc 1 568 16 is_stmt 1 view .LVU296
+ 568:Src/stm32f7xx_it.c ****     	      else
+ 1222              		.loc 1 568 23 is_stmt 0 view .LVU297
+ 1223 0340 5B08     		lsrs	r3, r3, #1
+ 1224 0342 013B     		subs	r3, r3, #1
+ 1225 0344 1B48     		ldr	r0, .L102+4
+ 1226 0346 30F81310 		ldrh	r1, [r0, r3, lsl #1]
+ 568:Src/stm32f7xx_it.c ****     	      else
+ 1227              		.loc 1 568 46 view .LVU298
+ 1228 034a 01EB0222 		add	r2, r1, r2, lsl #8
+ 1229 034e 20F81320 		strh	r2, [r0, r3, lsl #1]	@ movhi
+ 1230              	.L89:
+ 571:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1231              		.loc 1 571 13 is_stmt 1 view .LVU299
+ 571:Src/stm32f7xx_it.c ****             UART_rec_incr = 0;
+ 1232              		.loc 1 571 23 is_stmt 0 view .LVU300
+ 1233 0352 1B4B     		ldr	r3, .L102+16
+ 1234 0354 0822     		movs	r2, #8
+ 1235 0356 1A70     		strb	r2, [r3]
+ 572:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1236              		.loc 1 572 13 is_stmt 1 view .LVU301
+ 572:Src/stm32f7xx_it.c ****             flg_tmt = 0;//Reset the timeout flag
+ 1237              		.loc 1 572 27 is_stmt 0 view .LVU302
+ 1238 0358 0023     		movs	r3, #0
+ 1239 035a 174A     		ldr	r2, .L102+8
+ 1240 035c 1380     		strh	r3, [r2]	@ movhi
+ 573:Src/stm32f7xx_it.c ****         }
+ 1241              		.loc 1 573 13 is_stmt 1 view .LVU303
+ 573:Src/stm32f7xx_it.c ****         }
+ 1242              		.loc 1 573 21 is_stmt 0 view .LVU304
+ 1243 035e 194A     		ldr	r2, .L102+20
+ 1244 0360 1370     		strb	r3, [r2]
+ARM GAS  /tmp/cczi2eQD.s 			page 166
+
+
+ 1245 0362 86E6     		b	.L48
+ 1246              	.L88:
+ 570:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
+ 1247              		.loc 1 570 17 is_stmt 1 view .LVU305
+ 570:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
+ 1248              		.loc 1 570 39 is_stmt 0 view .LVU306
+ 1249 0364 5B08     		lsrs	r3, r3, #1
+ 570:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
+ 1250              		.loc 1 570 43 view .LVU307
+ 1251 0366 013B     		subs	r3, r3, #1
+ 570:Src/stm32f7xx_it.c ****             CPU_state = DECODE_TASK;
+ 1252              		.loc 1 570 47 view .LVU308
+ 1253 0368 1249     		ldr	r1, .L102+4
+ 1254 036a 21F81320 		strh	r2, [r1, r3, lsl #1]	@ movhi
+ 1255 036e F0E7     		b	.L89
+ 1256              	.L90:
+ 580:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1257              		.loc 1 580 17 is_stmt 1 view .LVU309
+ 580:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1258              		.loc 1 580 39 is_stmt 0 view .LVU310
+ 1259 0370 5908     		lsrs	r1, r3, #1
+ 580:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1260              		.loc 1 580 43 view .LVU311
+ 1261 0372 0139     		subs	r1, r1, #1
+ 580:Src/stm32f7xx_it.c ****             UART_rec_incr++;
+ 1262              		.loc 1 580 47 view .LVU312
+ 1263 0374 0F48     		ldr	r0, .L102+4
+ 1264 0376 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
+ 1265 037a D7E7     		b	.L91
+ 1266              	.L49:
+ 586:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1267              		.loc 1 586 9 is_stmt 1 view .LVU313
+ 586:Src/stm32f7xx_it.c ****             COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
+ 1268              		.loc 1 586 12 is_stmt 0 view .LVU314
+ 1269 037c 13F0010F 		tst	r3, #1
+ 1270 0380 0FD0     		beq	.L92
+ 587:Src/stm32f7xx_it.c ****         else
+ 1271              		.loc 1 587 13 is_stmt 1 view .LVU315
+ 587:Src/stm32f7xx_it.c ****         else
+ 1272              		.loc 1 587 20 is_stmt 0 view .LVU316
+ 1273 0382 5908     		lsrs	r1, r3, #1
+ 1274 0384 0139     		subs	r1, r1, #1
+ 1275 0386 0B4C     		ldr	r4, .L102+4
+ 1276 0388 34F81100 		ldrh	r0, [r4, r1, lsl #1]
+ 587:Src/stm32f7xx_it.c ****         else
+ 1277              		.loc 1 587 43 view .LVU317
+ 1278 038c 00EB0222 		add	r2, r0, r2, lsl #8
+ 1279 0390 24F81120 		strh	r2, [r4, r1, lsl #1]	@ movhi
+ 1280              	.L93:
+ 590:Src/stm32f7xx_it.c ****         UART_transmission_request = NO_MESS;
+ 1281              		.loc 1 590 9 is_stmt 1 view .LVU318
+ 590:Src/stm32f7xx_it.c ****         UART_transmission_request = NO_MESS;
+ 1282              		.loc 1 590 22 is_stmt 0 view .LVU319
+ 1283 0394 0133     		adds	r3, r3, #1
+ 1284 0396 084A     		ldr	r2, .L102+8
+ 1285 0398 1380     		strh	r3, [r2]	@ movhi
+ 591:Src/stm32f7xx_it.c ****     break;
+ARM GAS  /tmp/cczi2eQD.s 			page 167
+
+
+ 1286              		.loc 1 591 9 is_stmt 1 view .LVU320
+ 591:Src/stm32f7xx_it.c ****     break;
+ 1287              		.loc 1 591 35 is_stmt 0 view .LVU321
+ 1288 039a 084B     		ldr	r3, .L102+12
+ 1289 039c 0022     		movs	r2, #0
+ 1290 039e 1A70     		strb	r2, [r3]
+ 592:Src/stm32f7xx_it.c ****     }
+ 1291              		.loc 1 592 5 is_stmt 1 view .LVU322
+ 1292              		.loc 1 595 1 is_stmt 0 view .LVU323
+ 1293 03a0 67E6     		b	.L48
+ 1294              	.L92:
+ 589:Src/stm32f7xx_it.c ****         UART_rec_incr++;
+ 1295              		.loc 1 589 13 is_stmt 1 view .LVU324
+ 589:Src/stm32f7xx_it.c ****         UART_rec_incr++;
+ 1296              		.loc 1 589 35 is_stmt 0 view .LVU325
+ 1297 03a2 5908     		lsrs	r1, r3, #1
+ 589:Src/stm32f7xx_it.c ****         UART_rec_incr++;
+ 1298              		.loc 1 589 39 view .LVU326
+ 1299 03a4 0139     		subs	r1, r1, #1
+ 589:Src/stm32f7xx_it.c ****         UART_rec_incr++;
+ 1300              		.loc 1 589 43 view .LVU327
+ 1301 03a6 0348     		ldr	r0, .L102+4
+ 1302 03a8 20F81120 		strh	r2, [r0, r1, lsl #1]	@ movhi
+ 1303 03ac F2E7     		b	.L93
+ 1304              	.L103:
+ 1305 03ae 00BF     		.align	2
+ 1306              	.L102:
+ 1307 03b0 00000000 		.word	UART_header
+ 1308 03b4 00000000 		.word	COMMAND
+ 1309 03b8 00000000 		.word	UART_rec_incr
+ 1310 03bc 00000000 		.word	UART_transmission_request
+ 1311 03c0 00000000 		.word	CPU_state
+ 1312 03c4 00000000 		.word	flg_tmt
+ 1313              		.cfi_endproc
+ 1314              	.LFE1202:
+ 1316              		.section	.text.USART1_IRQHandler,"ax",%progbits
+ 1317              		.align	1
+ 1318              		.global	USART1_IRQHandler
+ 1319              		.syntax unified
+ 1320              		.thumb
+ 1321              		.thumb_func
+ 1323              	USART1_IRQHandler:
+ 1324              	.LFB1196:
  277:Src/stm32f7xx_it.c ****   /* USER CODE BEGIN USART1_IRQn 0 */
- 1211              		.loc 1 277 1 is_stmt 1 view -0
- 1212              		.cfi_startproc
- 1213              		@ args = 0, pretend = 0, frame = 8
- 1214              		@ frame_needed = 0, uses_anonymous_args = 0
- 1215 0000 00B5     		push	{lr}
- 1216              	.LCFI9:
- 1217              		.cfi_def_cfa_offset 4
- 1218              		.cfi_offset 14, -4
- 1219 0002 83B0     		sub	sp, sp, #12
- 1220              	.LCFI10:
- 1221              		.cfi_def_cfa_offset 16
+ 1325              		.loc 1 277 1 is_stmt 1 view -0
+ 1326              		.cfi_startproc
+ 1327              		@ args = 0, pretend = 0, frame = 8
+ 1328              		@ frame_needed = 0, uses_anonymous_args = 0
+ 1329 0000 00B5     		push	{lr}
+ 1330              	.LCFI9:
+ 1331              		.cfi_def_cfa_offset 4
+ 1332              		.cfi_offset 14, -4
+ 1333 0002 83B0     		sub	sp, sp, #12
+ 1334              	.LCFI10:
+ 1335              		.cfi_def_cfa_offset 16
  279:Src/stm32f7xx_it.c ****   if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
- 1222              		.loc 1 279 3 view .LVU289
+ 1336              		.loc 1 279 3 view .LVU329
+ARM GAS  /tmp/cczi2eQD.s 			page 168
+
+
  280:Src/stm32f7xx_it.c ****   {
- 1223              		.loc 1 280 3 view .LVU290
- 1224              	.LVL19:
- 1225              	.LBB68:
- 1226              	.LBI68:
+ 1337              		.loc 1 280 3 view .LVU330
+ 1338              	.LVL19:
+ 1339              	.LBB68:
+ 1340              	.LBI68:
 2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1227              		.loc 3 2640 26 view .LVU291
- 1228              	.LBB69:
+ 1341              		.loc 3 2640 26 view .LVU331
+ 1342              	.LBB69:
 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 165
-
-
- 1229              		.loc 3 2642 3 view .LVU292
+ 1343              		.loc 3 2642 3 view .LVU332
 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1230              		.loc 3 2642 12 is_stmt 0 view .LVU293
- 1231 0004 304B     		ldr	r3, .L109
- 1232 0006 DB69     		ldr	r3, [r3, #28]
+ 1344              		.loc 3 2642 12 is_stmt 0 view .LVU333
+ 1345 0004 304B     		ldr	r3, .L120
+ 1346 0006 DB69     		ldr	r3, [r3, #28]
 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1233              		.loc 3 2642 77 view .LVU294
- 1234 0008 13F0200F 		tst	r3, #32
- 1235 000c 07D0     		beq	.L94
- 1236              	.LVL20:
+ 1347              		.loc 3 2642 77 view .LVU334
+ 1348 0008 13F0200F 		tst	r3, #32
+ 1349 000c 07D0     		beq	.L105
+ 1350              	.LVL20:
 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1237              		.loc 3 2642 77 view .LVU295
- 1238              	.LBE69:
- 1239              	.LBE68:
- 1240              	.LBB70:
- 1241              	.LBI70:
+ 1351              		.loc 3 2642 77 view .LVU335
+ 1352              	.LBE69:
+ 1353              	.LBE68:
+ 1354              	.LBB70:
+ 1355              	.LBI70:
 3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1242              		.loc 3 3366 26 is_stmt 1 view .LVU296
- 1243              	.LBB71:
+ 1356              		.loc 3 3366 26 is_stmt 1 view .LVU336
+ 1357              	.LBB71:
 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1244              		.loc 3 3368 3 view .LVU297
+ 1358              		.loc 3 3368 3 view .LVU337
 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1245              		.loc 3 3368 12 is_stmt 0 view .LVU298
- 1246 000e 2E4B     		ldr	r3, .L109
- 1247 0010 1B68     		ldr	r3, [r3]
+ 1359              		.loc 3 3368 12 is_stmt 0 view .LVU338
+ 1360 000e 2E4B     		ldr	r3, .L120
+ 1361 0010 1B68     		ldr	r3, [r3]
 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1248              		.loc 3 3368 80 view .LVU299
- 1249 0012 13F0200F 		tst	r3, #32
- 1250 0016 02D0     		beq	.L94
- 1251              	.LVL21:
+ 1362              		.loc 3 3368 80 view .LVU339
+ 1363 0012 13F0200F 		tst	r3, #32
+ 1364 0016 02D0     		beq	.L105
+ 1365              	.LVL21:
 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1252              		.loc 3 3368 80 view .LVU300
- 1253              	.LBE71:
- 1254              	.LBE70:
+ 1366              		.loc 3 3368 80 view .LVU340
+ 1367              	.LBE71:
+ 1368              	.LBE70:
  282:Src/stm32f7xx_it.c ****   }
- 1255              		.loc 1 282 5 is_stmt 1 view .LVU301
- 1256 0018 FFF7FEFF 		bl	UART_RxCpltCallback
- 1257              	.LVL22:
- 1258 001c 33E0     		b	.L93
- 1259              	.L94:
+ 1369              		.loc 1 282 5 is_stmt 1 view .LVU341
+ 1370 0018 FFF7FEFF 		bl	UART_RxCpltCallback
+ 1371              	.LVL22:
+ 1372 001c 33E0     		b	.L104
+ 1373              	.L105:
  286:Src/stm32f7xx_it.c ****     {
- 1260              		.loc 1 286 5 view .LVU302
- 1261              	.LVL23:
- 1262              	.LBB72:
- 1263              	.LBI72:
+ 1374              		.loc 1 286 5 view .LVU342
+ 1375              	.LVL23:
+ 1376              	.LBB72:
+ 1377              	.LBI72:
 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1264              		.loc 3 2618 26 view .LVU303
- 1265              	.LBB73:
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1266              		.loc 3 2620 3 view .LVU304
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1267              		.loc 3 2620 12 is_stmt 0 view .LVU305
- 1268 001e 2A4B     		ldr	r3, .L109
- 1269 0020 DB69     		ldr	r3, [r3, #28]
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1270              		.loc 3 2620 75 view .LVU306
- 1271 0022 13F0080F 		tst	r3, #8
-ARM GAS  /tmp/ccdl7gEi.s 			page 166
+ 1378              		.loc 3 2618 26 view .LVU343
+ 1379              	.LBB73:
+ARM GAS  /tmp/cczi2eQD.s 			page 169
 
 
- 1272 0026 25D1     		bne	.L96
- 1273              	.LVL24:
 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1274              		.loc 3 2620 75 view .LVU307
- 1275              	.LBE73:
- 1276              	.LBE72:
+ 1380              		.loc 3 2620 3 view .LVU344
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 1381              		.loc 3 2620 12 is_stmt 0 view .LVU345
+ 1382 001e 2A4B     		ldr	r3, .L120
+ 1383 0020 DB69     		ldr	r3, [r3, #28]
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 1384              		.loc 3 2620 75 view .LVU346
+ 1385 0022 13F0080F 		tst	r3, #8
+ 1386 0026 25D1     		bne	.L107
+ 1387              	.LVL24:
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 1388              		.loc 3 2620 75 view .LVU347
+ 1389              	.LBE73:
+ 1390              	.LBE72:
  291:Src/stm32f7xx_it.c ****     {
- 1277              		.loc 1 291 10 is_stmt 1 view .LVU308
- 1278              	.LBB74:
- 1279              	.LBI74:
+ 1391              		.loc 1 291 10 is_stmt 1 view .LVU348
+ 1392              	.LBB74:
+ 1393              	.LBI74:
 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1280              		.loc 3 2596 26 view .LVU309
- 1281              	.LBB75:
+ 1394              		.loc 3 2596 26 view .LVU349
+ 1395              	.LBB75:
 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1282              		.loc 3 2598 3 view .LVU310
+ 1396              		.loc 3 2598 3 view .LVU350
 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1283              		.loc 3 2598 12 is_stmt 0 view .LVU311
- 1284 0028 274B     		ldr	r3, .L109
- 1285 002a DB69     		ldr	r3, [r3, #28]
+ 1397              		.loc 3 2598 12 is_stmt 0 view .LVU351
+ 1398 0028 274B     		ldr	r3, .L120
+ 1399 002a DB69     		ldr	r3, [r3, #28]
 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1286              		.loc 3 2598 73 view .LVU312
- 1287 002c 13F0020F 		tst	r3, #2
- 1288 0030 2CD1     		bne	.L97
- 1289              	.LVL25:
+ 1400              		.loc 3 2598 73 view .LVU352
+ 1401 002c 13F0020F 		tst	r3, #2
+ 1402 0030 2CD1     		bne	.L108
+ 1403              	.LVL25:
 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1290              		.loc 3 2598 73 view .LVU313
- 1291              	.LBE75:
- 1292              	.LBE74:
+ 1404              		.loc 3 2598 73 view .LVU353
+ 1405              	.LBE75:
+ 1406              	.LBE74:
  296:Src/stm32f7xx_it.c ****     {
- 1293              		.loc 1 296 10 is_stmt 1 view .LVU314
- 1294              	.LBB76:
- 1295              	.LBI76:
+ 1407              		.loc 1 296 10 is_stmt 1 view .LVU354
+ 1408              	.LBB76:
+ 1409              	.LBI76:
 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1296              		.loc 3 2607 26 view .LVU315
- 1297              	.LBB77:
+ 1410              		.loc 3 2607 26 view .LVU355
+ 1411              	.LBB77:
 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1298              		.loc 3 2609 3 view .LVU316
+ 1412              		.loc 3 2609 3 view .LVU356
 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1299              		.loc 3 2609 12 is_stmt 0 view .LVU317
- 1300 0032 254B     		ldr	r3, .L109
- 1301 0034 DB69     		ldr	r3, [r3, #28]
+ 1413              		.loc 3 2609 12 is_stmt 0 view .LVU357
+ 1414 0032 254B     		ldr	r3, .L120
+ 1415 0034 DB69     		ldr	r3, [r3, #28]
 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1302              		.loc 3 2609 73 view .LVU318
- 1303 0036 13F0040F 		tst	r3, #4
- 1304 003a 31D1     		bne	.L99
- 1305              	.LVL26:
+ 1416              		.loc 3 2609 73 view .LVU358
+ 1417 0036 13F0040F 		tst	r3, #4
+ 1418 003a 31D1     		bne	.L110
+ 1419              	.LVL26:
 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1306              		.loc 3 2609 73 view .LVU319
- 1307              	.LBE77:
- 1308              	.LBE76:
+ 1420              		.loc 3 2609 73 view .LVU359
+ARM GAS  /tmp/cczi2eQD.s 			page 170
+
+
+ 1421              	.LBE77:
+ 1422              	.LBE76:
  301:Src/stm32f7xx_it.c ****     {
- 1309              		.loc 1 301 10 is_stmt 1 view .LVU320
- 1310              	.LBB78:
- 1311              	.LBI78:
+ 1423              		.loc 1 301 10 is_stmt 1 view .LVU360
+ 1424              	.LBB78:
+ 1425              	.LBI78:
 2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1312              		.loc 3 2585 26 view .LVU321
- 1313              	.LBB79:
-ARM GAS  /tmp/ccdl7gEi.s 			page 167
-
-
+ 1426              		.loc 3 2585 26 view .LVU361
+ 1427              	.LBB79:
 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1314              		.loc 3 2587 3 view .LVU322
+ 1428              		.loc 3 2587 3 view .LVU362
 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1315              		.loc 3 2587 12 is_stmt 0 view .LVU323
- 1316 003c 224B     		ldr	r3, .L109
- 1317 003e DB69     		ldr	r3, [r3, #28]
+ 1429              		.loc 3 2587 12 is_stmt 0 view .LVU363
+ 1430 003c 224B     		ldr	r3, .L120
+ 1431 003e DB69     		ldr	r3, [r3, #28]
 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1318              		.loc 3 2587 73 view .LVU324
- 1319 0040 13F0010F 		tst	r3, #1
- 1320 0044 36D1     		bne	.L101
- 1321              	.LVL27:
+ 1432              		.loc 3 2587 73 view .LVU364
+ 1433 0040 13F0010F 		tst	r3, #1
+ 1434 0044 36D1     		bne	.L112
+ 1435              	.LVL27:
 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1322              		.loc 3 2587 73 view .LVU325
- 1323              	.LBE79:
- 1324              	.LBE78:
+ 1436              		.loc 3 2587 73 view .LVU365
+ 1437              	.LBE79:
+ 1438              	.LBE78:
  308:Src/stm32f7xx_it.c ****       {		
- 1325              		.loc 1 308 7 is_stmt 1 view .LVU326
- 1326              	.LBB80:
- 1327              	.LBI80:
+ 1439              		.loc 1 308 7 is_stmt 1 view .LVU366
+ 1440              	.LBB80:
+ 1441              	.LBI80:
 2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1328              		.loc 3 2651 26 view .LVU327
- 1329              	.LBB81:
+ 1442              		.loc 3 2651 26 view .LVU367
+ 1443              	.LBB81:
 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1330              		.loc 3 2653 3 view .LVU328
+ 1444              		.loc 3 2653 3 view .LVU368
 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1331              		.loc 3 2653 12 is_stmt 0 view .LVU329
- 1332 0046 214B     		ldr	r3, .L109+4
- 1333 0048 DB69     		ldr	r3, [r3, #28]
+ 1445              		.loc 3 2653 12 is_stmt 0 view .LVU369
+ 1446 0046 214B     		ldr	r3, .L120+4
+ 1447 0048 DB69     		ldr	r3, [r3, #28]
 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1334              		.loc 3 2653 73 view .LVU330
- 1335 004a 13F0400F 		tst	r3, #64
- 1336 004e 1AD0     		beq	.L93
- 1337              	.LVL28:
+ 1448              		.loc 3 2653 73 view .LVU370
+ 1449 004a 13F0400F 		tst	r3, #64
+ 1450 004e 1AD0     		beq	.L104
+ 1451              	.LVL28:
 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1338              		.loc 3 2653 73 view .LVU331
- 1339              	.LBE81:
- 1340              	.LBE80:
- 1341              	.LBB82:
- 1342              	.LBI82:
+ 1452              		.loc 3 2653 73 view .LVU371
+ 1453              	.LBE81:
+ 1454              	.LBE80:
+ 1455              	.LBB82:
+ 1456              	.LBI82:
 3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1343              		.loc 3 3377 26 is_stmt 1 view .LVU332
- 1344              	.LBB83:
+ 1457              		.loc 3 3377 26 is_stmt 1 view .LVU372
+ 1458              	.LBB83:
 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1345              		.loc 3 3379 3 view .LVU333
+ 1459              		.loc 3 3379 3 view .LVU373
 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1346              		.loc 3 3379 12 is_stmt 0 view .LVU334
- 1347 0050 1E4B     		ldr	r3, .L109+4
- 1348 0052 1B68     		ldr	r3, [r3]
-3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1349              		.loc 3 3379 77 view .LVU335
- 1350 0054 13F0400F 		tst	r3, #64
- 1351 0058 15D0     		beq	.L93
- 1352              	.LVL29:
-3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1353              		.loc 3 3379 77 view .LVU336
- 1354              	.LBE83:
- 1355              	.LBE82:
-ARM GAS  /tmp/ccdl7gEi.s 			page 168
+ 1460              		.loc 3 3379 12 is_stmt 0 view .LVU374
+ 1461 0050 1E4B     		ldr	r3, .L120+4
+ 1462 0052 1B68     		ldr	r3, [r3]
+ARM GAS  /tmp/cczi2eQD.s 			page 171
 
 
+3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 1463              		.loc 3 3379 77 view .LVU375
+ 1464 0054 13F0400F 		tst	r3, #64
+ 1465 0058 15D0     		beq	.L104
+ 1466              	.LVL29:
+3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 1467              		.loc 3 3379 77 view .LVU376
+ 1468              	.LBE83:
+ 1469              	.LBE82:
  310:Src/stm32f7xx_it.c ****         //test_counter += 1;
- 1356              		.loc 1 310 9 is_stmt 1 view .LVU337
- 1357              	.LBB84:
- 1358              	.LBI84:
+ 1470              		.loc 1 310 9 is_stmt 1 view .LVU377
+ 1471              	.LBB84:
+ 1472              	.LBI84:
 2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1359              		.loc 3 2916 22 view .LVU338
- 1360              	.LBB85:
+ 1473              		.loc 3 2916 22 view .LVU378
+ 1474              	.LBB85:
 2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1361              		.loc 3 2918 3 view .LVU339
- 1362 005a 1B4B     		ldr	r3, .L109
- 1363 005c 4022     		movs	r2, #64
- 1364 005e 1A62     		str	r2, [r3, #32]
- 1365              	.LVL30:
+ 1475              		.loc 3 2918 3 view .LVU379
+ 1476 005a 1B4B     		ldr	r3, .L120
+ 1477 005c 4022     		movs	r2, #64
+ 1478 005e 1A62     		str	r2, [r3, #32]
+ 1479              	.LVL30:
 2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1366              		.loc 3 2918 3 is_stmt 0 view .LVU340
- 1367              	.LBE85:
- 1368              	.LBE84:
+ 1480              		.loc 3 2918 3 is_stmt 0 view .LVU380
+ 1481              	.LBE85:
+ 1482              	.LBE84:
  313:Src/stm32f7xx_it.c ****         //UART_transmission_busy = 0;
- 1369              		.loc 1 313 9 is_stmt 1 view .LVU341
- 1370              	.LBB86:
- 1371              	.LBI86:
+ 1483              		.loc 1 313 9 is_stmt 1 view .LVU381
+ 1484              	.LBB86:
+ 1485              	.LBI86:
 3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1372              		.loc 3 3213 22 view .LVU342
- 1373              	.L104:
+ 1486              		.loc 3 3213 22 view .LVU382
+ 1487              	.L115:
 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1374              		.loc 3 3215 3 discriminator 1 view .LVU343
- 1375              	.LBB87:
+ 1488              		.loc 3 3215 3 discriminator 1 view .LVU383
+ 1489              	.LBB87:
 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1376              		.loc 3 3215 3 discriminator 1 view .LVU344
+ 1490              		.loc 3 3215 3 discriminator 1 view .LVU384
 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1377              		.loc 3 3215 3 discriminator 1 view .LVU345
+ 1491              		.loc 3 3215 3 discriminator 1 view .LVU385
 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1378              		.loc 3 3215 3 discriminator 1 view .LVU346
- 1379              	.LBB88:
- 1380              	.LBI88:
- 1381              		.file 4 "Drivers/CMSIS/Include/cmsis_gcc.h"
+ 1492              		.loc 3 3215 3 discriminator 1 view .LVU386
+ 1493              	.LBB88:
+ 1494              	.LBI88:
+ 1495              		.file 4 "Drivers/CMSIS/Include/cmsis_gcc.h"
    1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
    2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
    3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
@@ -10069,6 +10258,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   10:Drivers/CMSIS/Include/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
   11:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
   12:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
+ARM GAS  /tmp/cczi2eQD.s 			page 172
+
+
   13:Drivers/CMSIS/Include/cmsis_gcc.h ****  * not use this file except in compliance with the License.
   14:Drivers/CMSIS/Include/cmsis_gcc.h ****  * You may obtain a copy of the License at
   15:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
@@ -10078,9 +10270,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   19:Drivers/CMSIS/Include/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
   20:Drivers/CMSIS/Include/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   21:Drivers/CMSIS/Include/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
-ARM GAS  /tmp/ccdl7gEi.s 			page 169
-
-
   22:Drivers/CMSIS/Include/cmsis_gcc.h ****  * limitations under the License.
   23:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
   24:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -10129,6 +10318,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_UNION
   68:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
   69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ARM GAS  /tmp/cczi2eQD.s 			page 173
+
+
   70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
   71:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
   72:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
@@ -10138,9 +10330,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   76:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
   77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
   78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
-ARM GAS  /tmp/ccdl7gEi.s 			page 170
-
-
   79:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
   80:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
   81:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
@@ -10189,6 +10378,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  125:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
  126:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+ARM GAS  /tmp/cczi2eQD.s 			page 174
+
+
  127:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
  128:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
@@ -10198,9 +10390,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  133:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  134:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 171
-
-
  136:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
  137:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
  138:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
@@ -10249,6 +10438,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
  182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  183:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+ARM GAS  /tmp/cczi2eQD.s 			page 175
+
+
  184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  185:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  186:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -10258,9 +10450,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  190:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Writes the given value to the non-secure Control Register when in secure state.
  191:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
  192:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
-ARM GAS  /tmp/ccdl7gEi.s 			page 172
-
-
  193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
  194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  195:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
@@ -10309,6 +10498,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  238:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
  239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  240:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ARM GAS  /tmp/cczi2eQD.s 			page 176
+
+
  241:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  243:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer
@@ -10318,9 +10510,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
  248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  249:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
-ARM GAS  /tmp/ccdl7gEi.s 			page 173
-
-
  250:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  251:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp"  : "=r" (result) );
  252:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
@@ -10369,6 +10558,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  295:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  297:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
+ARM GAS  /tmp/cczi2eQD.s 			page 177
+
+
  298:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer (MSP).
  299:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSP Register value
  300:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
@@ -10378,9 +10570,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  304:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  305:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp" : "=r" (result) );
  306:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
-ARM GAS  /tmp/ccdl7gEi.s 			page 174
-
-
  307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  308:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  309:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -10429,6 +10618,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  352:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Stack Pointer (non-secure)
  353:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
  354:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               SP Register value
+ARM GAS  /tmp/cczi2eQD.s 			page 178
+
+
  355:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
  357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -10438,9 +10630,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  361:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
  362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  363:Drivers/CMSIS/Include/cmsis_gcc.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 175
-
-
  364:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  366:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Stack Pointer (non-secure)
@@ -10489,6 +10678,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  409:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Priority Mask Register.
  410:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
  411:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ARM GAS  /tmp/cczi2eQD.s 			page 179
+
+
  412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
  413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  414:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
@@ -10498,9 +10690,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  420:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Priority Mask (non-secure)
-ARM GAS  /tmp/ccdl7gEi.s 			page 176
-
-
  421:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
  422:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
  423:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
@@ -10549,6 +10738,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  466:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
  467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  468:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ARM GAS  /tmp/cczi2eQD.s 			page 180
+
+
  469:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -10558,9 +10750,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  475:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
  477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 177
-
-
  478:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  479:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  480:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
@@ -10609,6 +10798,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  523:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Fault Mask
  524:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Fault Mask register.
  525:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Fault Mask register value
+ARM GAS  /tmp/cczi2eQD.s 			page 181
+
+
  526:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
  528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -10618,9 +10810,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  532:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
  533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  534:Drivers/CMSIS/Include/cmsis_gcc.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 178
-
-
  535:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -10669,6 +10858,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
  581:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
  582:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ARM GAS  /tmp/cczi2eQD.s 			page 182
+
+
  583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  584:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer Limit
  585:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -10678,9 +10870,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  589:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
  590:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSPLIM Register value
  591:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
-ARM GAS  /tmp/ccdl7gEi.s 			page 179
-
-
  592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
  593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
@@ -10729,6 +10918,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
  638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+ARM GAS  /tmp/cczi2eQD.s 			page 183
+
+
  640:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
  641:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure PSPLIM is RAZ/WI
  642:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)ProcStackPtrLimit;
@@ -10738,9 +10930,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  647:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  648:Drivers/CMSIS/Include/cmsis_gcc.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 180
-
-
  649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
  650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  651:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
@@ -10789,6 +10978,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  695:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer Limit (non-secure)
  696:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ARM GAS  /tmp/cczi2eQD.s 			page 184
+
+
  697:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always.
  698:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  699:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
@@ -10798,9 +10990,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
  705:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
-ARM GAS  /tmp/ccdl7gEi.s 			page 181
-
-
  706:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
  707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
  708:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
@@ -10849,6 +11038,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
  752:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
  753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ARM GAS  /tmp/cczi2eQD.s 			page 185
+
+
  754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  756:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -10858,9 +11050,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  760:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  762:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get FPSCR
-ARM GAS  /tmp/ccdl7gEi.s 			page 182
-
-
  763:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Floating Point Status/Control register.
  764:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Floating Point Status/Control register value
  765:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
@@ -10909,6 +11098,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  808:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  809:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
+ARM GAS  /tmp/cczi2eQD.s 			page 186
+
+
  811:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  812:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ##########################  Core Instruction Access  ######################### */
@@ -10918,9 +11110,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  818:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
-ARM GAS  /tmp/ccdl7gEi.s 			page 183
-
-
  820:Drivers/CMSIS/Include/cmsis_gcc.h ****  * For thumb1, use low register (r0-r7), specified by constraint "l"
  821:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Otherwise, use general registers, specified by constraint "r" */
  822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
@@ -10969,6 +11158,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  865:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
  867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ARM GAS  /tmp/cczi2eQD.s 			page 187
+
+
  868:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("isb 0xF":::"memory");
  869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  870:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -10978,9 +11170,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  874:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Acts as a special kind of Data Memory Barrier.
  875:Drivers/CMSIS/Include/cmsis_gcc.h ****            It completes when all explicit memory accesses before this instruction complete.
  876:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
-ARM GAS  /tmp/ccdl7gEi.s 			page 184
-
-
  877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
  878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  879:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("dsb 0xF":::"memory");
@@ -11029,6 +11218,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  922:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  923:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
  924:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
+ARM GAS  /tmp/cczi2eQD.s 			page 188
+
+
  925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  926:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  927:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -11038,9 +11230,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  931:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
  932:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
  933:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
-ARM GAS  /tmp/ccdl7gEi.s 			page 185
-
-
  934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
  935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
@@ -11089,6 +11278,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  979:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
  980:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
+ARM GAS  /tmp/cczi2eQD.s 			page 189
+
+
  982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  983:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
  984:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -11098,9 +11290,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  988:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
  989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
  990:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-ARM GAS  /tmp/ccdl7gEi.s 			page 186
-
-
  991:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  992:Drivers/CMSIS/Include/cmsis_gcc.h ****   result = value;                      /* r will be reversed bits of v; first get LSB of v */
  993:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (value >>= 1U; value != 0U; value >>= 1U)
@@ -11149,6 +11338,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1036:Drivers/CMSIS/Include/cmsis_gcc.h ****    return ((uint8_t) result);    /* Add explicit type cast here */
 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ARM GAS  /tmp/cczi2eQD.s 			page 190
+
+
 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 1041:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   LDR Exclusive (16 bit)
@@ -11158,9 +11350,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1045:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 187
-
-
 1048:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t result;
 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
@@ -11182,35 +11371,38 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1066:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return        value of type uint32_t at (*ptr)
 1067:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
- 1382              		.loc 4 1068 31 view .LVU347
- 1383              	.LBB89:
+ 1496              		.loc 4 1068 31 view .LVU387
+ 1497              	.LBB89:
 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 1070:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t result;
- 1384              		.loc 4 1070 5 view .LVU348
+ 1498              		.loc 4 1070 5 view .LVU388
 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1072:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 1385              		.loc 4 1072 4 view .LVU349
- 1386 0060 194A     		ldr	r2, .L109
- 1387              		.syntax unified
- 1388              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 1389 0062 52E8003F 		ldrex r3, [r2]
- 1390              	@ 0 "" 2
- 1391              	.LVL31:
+ 1499              		.loc 4 1072 4 view .LVU389
+ 1500 0060 194A     		ldr	r2, .L120
+ 1501              		.syntax unified
+ 1502              	@ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 1503 0062 52E8003F 		ldrex r3, [r2]
+ 1504              	@ 0 "" 2
+ 1505              	.LVL31:
 1073:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 1392              		.loc 4 1073 4 view .LVU350
- 1393              		.loc 4 1073 4 is_stmt 0 view .LVU351
- 1394              		.thumb
- 1395              		.syntax unified
- 1396              	.LBE89:
- 1397              	.LBE88:
+ 1506              		.loc 4 1073 4 view .LVU390
+ 1507              		.loc 4 1073 4 is_stmt 0 view .LVU391
+ 1508              		.thumb
+ 1509              		.syntax unified
+ 1510              	.LBE89:
+ 1511              	.LBE88:
 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1398              		.loc 3 3215 3 discriminator 1 view .LVU352
- 1399 0066 23F04003 		bic	r3, r3, #64
- 1400              	.LVL32:
+ 1512              		.loc 3 3215 3 discriminator 1 view .LVU392
+ 1513 0066 23F04003 		bic	r3, r3, #64
+ 1514              	.LVL32:
 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1401              		.loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU353
- 1402              	.LBB90:
- 1403              	.LBI90:
+ 1515              		.loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU393
+ARM GAS  /tmp/cczi2eQD.s 			page 191
+
+
+ 1516              	.LBB90:
+ 1517              	.LBI90:
 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** 
@@ -11218,9 +11410,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1078:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   STR Exclusive (8 bit)
 1079:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Executes a exclusive STR instruction for 8 bit values.
 1080:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]  value  Value to store
-ARM GAS  /tmp/ccdl7gEi.s 			page 188
-
-
 1081:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ptr  Pointer to location
 1082:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return          0  Function succeeded
 1083:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return          1  Function failed
@@ -11260,180 +11449,180 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1117:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return          1  Function failed
 1118:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
- 1404              		.loc 4 1119 31 view .LVU354
- 1405              	.LBB91:
+ 1518              		.loc 4 1119 31 view .LVU394
+ 1519              	.LBB91:
 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 1121:Drivers/CMSIS/Include/cmsis_gcc.h ****    uint32_t result;
- 1406              		.loc 4 1121 4 view .LVU355
+ 1520              		.loc 4 1121 4 view .LVU395
 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 1123:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 1407              		.loc 4 1123 4 view .LVU356
- 1408              		.syntax unified
- 1409              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 1410 006a 42E80031 		strex r1, r3, [r2]
- 1411              	@ 0 "" 2
- 1412              	.LVL33:
+ 1521              		.loc 4 1123 4 view .LVU396
+ 1522              		.syntax unified
+ARM GAS  /tmp/cczi2eQD.s 			page 192
+
+
+ 1523              	@ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 1524 006a 42E80031 		strex r1, r3, [r2]
+ 1525              	@ 0 "" 2
+ 1526              	.LVL33:
 1124:Drivers/CMSIS/Include/cmsis_gcc.h ****    return(result);
- 1413              		.loc 4 1124 4 view .LVU357
- 1414              		.loc 4 1124 4 is_stmt 0 view .LVU358
- 1415              		.thumb
- 1416              		.syntax unified
-ARM GAS  /tmp/ccdl7gEi.s 			page 189
-
-
- 1417              	.LBE91:
- 1418              	.LBE90:
-3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1419              		.loc 3 3215 3 discriminator 1 view .LVU359
- 1420 006e 0029     		cmp	r1, #0
- 1421 0070 F6D1     		bne	.L104
- 1422 0072 08E0     		b	.L93
- 1423              	.LVL34:
- 1424              	.L96:
-3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1425              		.loc 3 3215 3 discriminator 1 view .LVU360
- 1426              	.LBE87:
- 1427              	.LBE86:
- 289:Src/stm32f7xx_it.c ****     }
- 1428              		.loc 1 289 7 is_stmt 1 view .LVU361
- 1429              	.LBB92:
- 1430              	.LBI92:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1431              		.loc 3 3658 25 view .LVU362
- 1432              	.LBB93:
- 1433              		.loc 3 3660 3 view .LVU363
- 1434              		.loc 3 3660 20 is_stmt 0 view .LVU364
- 1435 0074 144B     		ldr	r3, .L109
- 1436 0076 5B6A     		ldr	r3, [r3, #36]
- 1437              	.LVL35:
- 1438              		.loc 3 3660 20 view .LVU365
- 1439              	.LBE93:
- 1440              	.LBE92:
- 289:Src/stm32f7xx_it.c ****     }
- 1441              		.loc 1 289 11 discriminator 1 view .LVU366
- 1442 0078 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
- 1443 007c 52FA83F3 		uxtab	r3, r2, r3
- 1444 0080 DBB2     		uxtb	r3, r3
- 1445 0082 8DF80730 		strb	r3, [sp, #7]
- 1446              	.L93:
- 323:Src/stm32f7xx_it.c **** 
- 1447              		.loc 1 323 1 view .LVU367
- 1448 0086 03B0     		add	sp, sp, #12
- 1449              	.LCFI11:
- 1450              		.cfi_remember_state
- 1451              		.cfi_def_cfa_offset 4
- 1452              		@ sp needed
- 1453 0088 5DF804FB 		ldr	pc, [sp], #4
- 1454              	.LVL36:
- 1455              	.L97:
- 1456              	.LCFI12:
- 1457              		.cfi_restore_state
- 294:Src/stm32f7xx_it.c ****     }
- 1458              		.loc 1 294 7 is_stmt 1 view .LVU368
- 1459              	.LBB94:
- 1460              	.LBI94:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1461              		.loc 3 3658 25 view .LVU369
- 1462              	.LBB95:
- 1463              		.loc 3 3660 3 view .LVU370
- 1464              		.loc 3 3660 20 is_stmt 0 view .LVU371
- 1465 008c 0E4B     		ldr	r3, .L109
-ARM GAS  /tmp/ccdl7gEi.s 			page 190
-
-
- 1466 008e 5B6A     		ldr	r3, [r3, #36]
- 1467              	.LVL37:
- 1468              		.loc 3 3660 20 view .LVU372
- 1469              	.LBE95:
- 1470              	.LBE94:
- 294:Src/stm32f7xx_it.c ****     }
- 1471              		.loc 1 294 11 discriminator 1 view .LVU373
- 1472 0090 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
- 1473 0094 52FA83F3 		uxtab	r3, r2, r3
- 1474 0098 DBB2     		uxtb	r3, r3
- 1475 009a 8DF80730 		strb	r3, [sp, #7]
- 1476 009e F2E7     		b	.L93
- 1477              	.LVL38:
- 1478              	.L99:
- 299:Src/stm32f7xx_it.c ****     }
- 1479              		.loc 1 299 7 is_stmt 1 view .LVU374
- 1480              	.LBB96:
- 1481              	.LBI96:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1482              		.loc 3 3658 25 view .LVU375
- 1483              	.LBB97:
- 1484              		.loc 3 3660 3 view .LVU376
- 1485              		.loc 3 3660 20 is_stmt 0 view .LVU377
- 1486 00a0 094B     		ldr	r3, .L109
- 1487 00a2 5B6A     		ldr	r3, [r3, #36]
- 1488              	.LVL39:
- 1489              		.loc 3 3660 20 view .LVU378
- 1490              	.LBE97:
- 1491              	.LBE96:
- 299:Src/stm32f7xx_it.c ****     }
- 1492              		.loc 1 299 11 discriminator 1 view .LVU379
- 1493 00a4 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
- 1494 00a8 52FA83F3 		uxtab	r3, r2, r3
- 1495 00ac DBB2     		uxtb	r3, r3
- 1496 00ae 8DF80730 		strb	r3, [sp, #7]
- 1497 00b2 E8E7     		b	.L93
- 1498              	.LVL40:
- 1499              	.L101:
- 304:Src/stm32f7xx_it.c ****     }
- 1500              		.loc 1 304 7 is_stmt 1 view .LVU380
- 1501              	.LBB98:
- 1502              	.LBI98:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1503              		.loc 3 3658 25 view .LVU381
- 1504              	.LBB99:
- 1505              		.loc 3 3660 3 view .LVU382
- 1506              		.loc 3 3660 20 is_stmt 0 view .LVU383
- 1507 00b4 044B     		ldr	r3, .L109
- 1508 00b6 5B6A     		ldr	r3, [r3, #36]
- 1509              	.LVL41:
- 1510              		.loc 3 3660 20 view .LVU384
- 1511              	.LBE99:
- 1512              	.LBE98:
- 304:Src/stm32f7xx_it.c ****     }
- 1513              		.loc 1 304 11 discriminator 1 view .LVU385
- 1514 00b8 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
- 1515 00bc 52FA83F3 		uxtab	r3, r2, r3
-ARM GAS  /tmp/ccdl7gEi.s 			page 191
-
-
- 1516 00c0 DBB2     		uxtb	r3, r3
- 1517 00c2 8DF80730 		strb	r3, [sp, #7]
- 1518 00c6 DEE7     		b	.L93
- 1519              	.L110:
- 1520              		.align	2
- 1521              	.L109:
- 1522 00c8 00100140 		.word	1073811456
- 1523 00cc 00140140 		.word	1073812480
- 1524              		.cfi_endproc
- 1525              	.LFE1196:
- 1527              		.section	.text.DMA2_Stream7_TransferComplete,"ax",%progbits
- 1528              		.align	1
- 1529              		.global	DMA2_Stream7_TransferComplete
+ 1527              		.loc 4 1124 4 view .LVU397
+ 1528              		.loc 4 1124 4 is_stmt 0 view .LVU398
+ 1529              		.thumb
  1530              		.syntax unified
- 1531              		.thumb
- 1532              		.thumb_func
- 1534              	DMA2_Stream7_TransferComplete:
- 1535              	.LFB1203:
- 570:Src/stm32f7xx_it.c **** 
- 571:Src/stm32f7xx_it.c **** //-----------------------------------------------
- 572:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void)
- 573:Src/stm32f7xx_it.c **** {
- 1536              		.loc 1 573 1 is_stmt 1 view -0
- 1537              		.cfi_startproc
- 1538              		@ args = 0, pretend = 0, frame = 0
- 1539              		@ frame_needed = 0, uses_anonymous_args = 0
- 1540              		@ link register save eliminated.
- 574:Src/stm32f7xx_it.c ****   LL_DMA_ClearFlag_TC7(DMA2);
- 1541              		.loc 1 574 3 view .LVU387
- 1542              	.LVL42:
- 1543              	.LBB100:
- 1544              	.LBI100:
- 1545              		.file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
+ 1531              	.LBE91:
+ 1532              	.LBE90:
+3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 1533              		.loc 3 3215 3 discriminator 1 view .LVU399
+ 1534 006e 0029     		cmp	r1, #0
+ 1535 0070 F6D1     		bne	.L115
+ 1536 0072 08E0     		b	.L104
+ 1537              	.LVL34:
+ 1538              	.L107:
+3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 1539              		.loc 3 3215 3 discriminator 1 view .LVU400
+ 1540              	.LBE87:
+ 1541              	.LBE86:
+ 289:Src/stm32f7xx_it.c ****     }
+ 1542              		.loc 1 289 7 is_stmt 1 view .LVU401
+ 1543              	.LBB92:
+ 1544              	.LBI92:
+3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 1545              		.loc 3 3658 25 view .LVU402
+ 1546              	.LBB93:
+ 1547              		.loc 3 3660 3 view .LVU403
+ 1548              		.loc 3 3660 20 is_stmt 0 view .LVU404
+ 1549 0074 144B     		ldr	r3, .L120
+ 1550 0076 5B6A     		ldr	r3, [r3, #36]
+ 1551              	.LVL35:
+ 1552              		.loc 3 3660 20 view .LVU405
+ 1553              	.LBE93:
+ 1554              	.LBE92:
+ 289:Src/stm32f7xx_it.c ****     }
+ 1555              		.loc 1 289 11 discriminator 1 view .LVU406
+ 1556 0078 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
+ 1557 007c 52FA83F3 		uxtab	r3, r2, r3
+ 1558 0080 DBB2     		uxtb	r3, r3
+ 1559 0082 8DF80730 		strb	r3, [sp, #7]
+ 1560              	.L104:
+ 323:Src/stm32f7xx_it.c **** 
+ 1561              		.loc 1 323 1 view .LVU407
+ 1562 0086 03B0     		add	sp, sp, #12
+ 1563              	.LCFI11:
+ 1564              		.cfi_remember_state
+ 1565              		.cfi_def_cfa_offset 4
+ 1566              		@ sp needed
+ 1567 0088 5DF804FB 		ldr	pc, [sp], #4
+ 1568              	.LVL36:
+ 1569              	.L108:
+ 1570              	.LCFI12:
+ 1571              		.cfi_restore_state
+ 294:Src/stm32f7xx_it.c ****     }
+ARM GAS  /tmp/cczi2eQD.s 			page 193
+
+
+ 1572              		.loc 1 294 7 is_stmt 1 view .LVU408
+ 1573              	.LBB94:
+ 1574              	.LBI94:
+3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 1575              		.loc 3 3658 25 view .LVU409
+ 1576              	.LBB95:
+ 1577              		.loc 3 3660 3 view .LVU410
+ 1578              		.loc 3 3660 20 is_stmt 0 view .LVU411
+ 1579 008c 0E4B     		ldr	r3, .L120
+ 1580 008e 5B6A     		ldr	r3, [r3, #36]
+ 1581              	.LVL37:
+ 1582              		.loc 3 3660 20 view .LVU412
+ 1583              	.LBE95:
+ 1584              	.LBE94:
+ 294:Src/stm32f7xx_it.c ****     }
+ 1585              		.loc 1 294 11 discriminator 1 view .LVU413
+ 1586 0090 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
+ 1587 0094 52FA83F3 		uxtab	r3, r2, r3
+ 1588 0098 DBB2     		uxtb	r3, r3
+ 1589 009a 8DF80730 		strb	r3, [sp, #7]
+ 1590 009e F2E7     		b	.L104
+ 1591              	.LVL38:
+ 1592              	.L110:
+ 299:Src/stm32f7xx_it.c ****     }
+ 1593              		.loc 1 299 7 is_stmt 1 view .LVU414
+ 1594              	.LBB96:
+ 1595              	.LBI96:
+3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 1596              		.loc 3 3658 25 view .LVU415
+ 1597              	.LBB97:
+ 1598              		.loc 3 3660 3 view .LVU416
+ 1599              		.loc 3 3660 20 is_stmt 0 view .LVU417
+ 1600 00a0 094B     		ldr	r3, .L120
+ 1601 00a2 5B6A     		ldr	r3, [r3, #36]
+ 1602              	.LVL39:
+ 1603              		.loc 3 3660 20 view .LVU418
+ 1604              	.LBE97:
+ 1605              	.LBE96:
+ 299:Src/stm32f7xx_it.c ****     }
+ 1606              		.loc 1 299 11 discriminator 1 view .LVU419
+ 1607 00a4 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
+ 1608 00a8 52FA83F3 		uxtab	r3, r2, r3
+ 1609 00ac DBB2     		uxtb	r3, r3
+ 1610 00ae 8DF80730 		strb	r3, [sp, #7]
+ 1611 00b2 E8E7     		b	.L104
+ 1612              	.LVL40:
+ 1613              	.L112:
+ 304:Src/stm32f7xx_it.c ****     }
+ 1614              		.loc 1 304 7 is_stmt 1 view .LVU420
+ 1615              	.LBB98:
+ 1616              	.LBI98:
+3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 1617              		.loc 3 3658 25 view .LVU421
+ 1618              	.LBB99:
+ 1619              		.loc 3 3660 3 view .LVU422
+ 1620              		.loc 3 3660 20 is_stmt 0 view .LVU423
+ 1621 00b4 044B     		ldr	r3, .L120
+ARM GAS  /tmp/cczi2eQD.s 			page 194
+
+
+ 1622 00b6 5B6A     		ldr	r3, [r3, #36]
+ 1623              	.LVL41:
+ 1624              		.loc 3 3660 20 view .LVU424
+ 1625              	.LBE99:
+ 1626              	.LBE98:
+ 304:Src/stm32f7xx_it.c ****     }
+ 1627              		.loc 1 304 11 discriminator 1 view .LVU425
+ 1628 00b8 9DF80720 		ldrb	r2, [sp, #7]	@ zero_extendqisi2
+ 1629 00bc 52FA83F3 		uxtab	r3, r2, r3
+ 1630 00c0 DBB2     		uxtb	r3, r3
+ 1631 00c2 8DF80730 		strb	r3, [sp, #7]
+ 1632 00c6 DEE7     		b	.L104
+ 1633              	.L121:
+ 1634              		.align	2
+ 1635              	.L120:
+ 1636 00c8 00100140 		.word	1073811456
+ 1637 00cc 00140140 		.word	1073812480
+ 1638              		.cfi_endproc
+ 1639              	.LFE1196:
+ 1641              		.section	.text.DMA2_Stream7_TransferComplete,"ax",%progbits
+ 1642              		.align	1
+ 1643              		.global	DMA2_Stream7_TransferComplete
+ 1644              		.syntax unified
+ 1645              		.thumb
+ 1646              		.thumb_func
+ 1648              	DMA2_Stream7_TransferComplete:
+ 1649              	.LFB1203:
+ 596:Src/stm32f7xx_it.c **** 
+ 597:Src/stm32f7xx_it.c **** //-----------------------------------------------
+ 598:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void)
+ 599:Src/stm32f7xx_it.c **** {
+ 1650              		.loc 1 599 1 is_stmt 1 view -0
+ 1651              		.cfi_startproc
+ 1652              		@ args = 0, pretend = 0, frame = 0
+ 1653              		@ frame_needed = 0, uses_anonymous_args = 0
+ 1654              		@ link register save eliminated.
+ 600:Src/stm32f7xx_it.c ****   LL_DMA_ClearFlag_TC7(DMA2);
+ 1655              		.loc 1 600 3 view .LVU427
+ 1656              	.LVL42:
+ 1657              	.LBB100:
+ 1658              	.LBI100:
+ 1659              		.file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
    1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
    2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   ******************************************************************************
    3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @file    stm32f7xx_ll_dma.h
@@ -11449,6 +11638,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   13:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * the root directory of this software component.
   14:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * If no LICENSE file comes with this software, it is provided AS-IS.
   15:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *
+ARM GAS  /tmp/cczi2eQD.s 			page 195
+
+
   16:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   ******************************************************************************
   17:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
   18:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -11458,9 +11650,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
   23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifdef __cplusplus
   24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** extern "C" {
-ARM GAS  /tmp/ccdl7gEi.s 			page 192
-
-
   25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif
   26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
   27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Includes ------------------------------------------------------------------*/
@@ -11509,6 +11698,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   70:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
   71:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
   72:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
+ARM GAS  /tmp/cczi2eQD.s 			page 196
+
+
   73:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
   74:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Private macros ------------------------------------------------------------*/
   75:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported types ------------------------------------------------------------*/
@@ -11518,9 +11710,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
   79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
   80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** typedef struct
   81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 193
-
-
   82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   uint32_t PeriphOrM2MSrcAddress;  /*!< Specifies the peripheral base address for DMA transfer
   83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         or as Source base address in case of memory to memory trans
   84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -11569,6 +11758,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This feature can be modified afterwards using unitary funct
  128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   uint32_t NbData;                 /*!< Specifies the number of data to transfer, in data unit.
+ARM GAS  /tmp/cczi2eQD.s 			page 197
+
+
  130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         The data unit is equal to the source buffer configuration s
  131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         or MemorySize parameters depending in the transfer directio
  132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This parameter must be a value between Min_Data = 0 and Max
@@ -11578,9 +11770,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   uint32_t Channel;                /*!< Specifies the peripheral channel.
  137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This parameter can be a value of @ref DMA_LL_EC_CHANNEL
  138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 194
-
-
  139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****                                         This feature can be modified afterwards using unitary funct
  140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   uint32_t Priority;               /*!< Specifies the channel priority level.
@@ -11629,6 +11818,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_STREAM STREAM
  185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
  186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/cczi2eQD.s 			page 198
+
+
  187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_0                   0x00000000U
  188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_1                   0x00000001U
  189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_2                   0x00000002U
@@ -11638,9 +11830,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_6                   0x00000006U
  194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_7                   0x00000007U
  195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_ALL                 0xFFFF0000U
-ARM GAS  /tmp/ccdl7gEi.s 			page 195
-
-
  196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -11689,6 +11878,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MEMORY_NOINCREMENT         0x00000000U               /*!< Memory increment mode Disa
  242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MEMORY_INCREMENT           DMA_SxCR_MINC             /*!< Memory increment mode Enab
  243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ARM GAS  /tmp/cczi2eQD.s 			page 199
+
+
  244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -11698,9 +11890,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_BYTE            0x00000000U               /*!< Peripheral data alignment 
  251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_HALFWORD        DMA_SxCR_PSIZE_0          /*!< Peripheral data alignment 
  252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_WORD            DMA_SxCR_PSIZE_1          /*!< Peripheral data alignment 
-ARM GAS  /tmp/ccdl7gEi.s 			page 196
-
-
  253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -11749,6 +11938,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined(DMA_CHANNEL_SELECTION_8_15)
  299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_8                  DMA_SxCR_CHSEL_3                                         
  300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_9                  (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_0)                    
+ARM GAS  /tmp/cczi2eQD.s 			page 200
+
+
  301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_10                 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1)                    
  302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_11                 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) 
  303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_12                 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2)                    
@@ -11758,9 +11950,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /* DMA_CHANNEL_SELECTION_8_15 */
  308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
-ARM GAS  /tmp/ccdl7gEi.s 			page 197
-
-
  310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MBURST MBURST
@@ -11809,6 +11998,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_FIFOTHRESHOLD FIFOTHRESHOLD
  357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
+ARM GAS  /tmp/cczi2eQD.s 			page 201
+
+
  358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_1_4          0x00000000U                             /*!< FIFO thresho
  360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_1_2          DMA_SxFCR_FTH_0                         /*!< FIFO thresho
@@ -11818,9 +12010,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****     
-ARM GAS  /tmp/ccdl7gEi.s 			page 198
-
-
  367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CURRENTTARGETMEM CURRENTTARGETMEM
  368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
  369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -11869,6 +12058,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Convert DMAx_Streamy into DMAx
  413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  __STREAM_INSTANCE__ DMAx_Streamy
  414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval DMAx
+ARM GAS  /tmp/cczi2eQD.s 			page 202
+
+
  415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_INSTANCE(__STREAM_INSTANCE__)   \
  417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__STREAM_INSTANCE__) > ((uint32_t)DMA1_Stream7)) ?  DMA2 : DMA1)
@@ -11878,9 +12070,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  __STREAM_INSTANCE__ DMAx_Streamy
  422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval LL_DMA_CHANNEL_y
  423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 199
-
-
  424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_STREAM(__STREAM_INSTANCE__)   \
  425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream0)) ? LL_DMA_STREAM_0 : \
  426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream0)) ? LL_DMA_STREAM_0 : \
@@ -11929,6 +12118,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @}
  471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/cczi2eQD.s 			page 203
+
+
  472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported functions --------------------------------------------------------*/
@@ -11938,9 +12130,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_Configuration Configuration
  480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @{
-ARM GAS  /tmp/ccdl7gEi.s 			page 200
-
-
  481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Enable DMA stream.
@@ -11989,6 +12178,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
  527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
  528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
+ARM GAS  /tmp/cczi2eQD.s 			page 204
+
+
  529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
  530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
@@ -11998,9 +12190,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
  536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsEnabledStream(DMA_TypeDef *DMAx, uint32_t Stream)
-ARM GAS  /tmp/ccdl7gEi.s 			page 201
-
-
  538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
  540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -12049,6 +12238,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
  584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
  585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
+ARM GAS  /tmp/cczi2eQD.s 			page 205
+
+
  586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
  587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
@@ -12058,9 +12250,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Direction This parameter can be one of the following values:
  593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
  594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
-ARM GAS  /tmp/ccdl7gEi.s 			page 202
-
-
  595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
  596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
  597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -12109,6 +12298,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Mode This parameter can be one of the following values:
  641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MODE_NORMAL
  642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MODE_CIRCULAR
+ARM GAS  /tmp/cczi2eQD.s 			page 206
+
+
  643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MODE_PFCTRL
  644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
  645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -12118,9 +12310,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
  650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 203
-
-
  652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get DMA mode normal, circular or peripheral flow control.
  653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          CIRC           LL_DMA_GetMode\n
  654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         CR          PFCTRL         LL_DMA_GetMode
@@ -12169,6 +12358,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Peripheral increment mode.
+ARM GAS  /tmp/cczi2eQD.s 			page 207
+
+
  700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          PINC           LL_DMA_GetPeriphIncMode
  701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
  702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
@@ -12178,9 +12370,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
  708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
-ARM GAS  /tmp/ccdl7gEi.s 			page 204
-
-
  709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
  710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
  711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
@@ -12229,6 +12418,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
  755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
  756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
+ARM GAS  /tmp/cczi2eQD.s 			page 208
+
+
  757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MEMORY_NOINCREMENT
  758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_MEMORY_INCREMENT
  759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -12238,9 +12430,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
  764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 205
-
-
  766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Set Peripheral size.
  767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          PSIZE           LL_DMA_SetPeriphSize
  768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -12289,6 +12478,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Set Memory size.
+ARM GAS  /tmp/cczi2eQD.s 			page 209
+
+
  814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          MSIZE           LL_DMA_SetMemorySize
  815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
  816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
@@ -12298,9 +12490,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
  822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
-ARM GAS  /tmp/ccdl7gEi.s 			page 206
-
-
  823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
  824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
  825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Size This parameter can be one of the following values:
@@ -12349,6 +12538,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
  869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
  870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
+ARM GAS  /tmp/cczi2eQD.s 			page 210
+
+
  871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
  872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  OffsetSize This parameter can be one of the following values:
  873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_OFFSETSIZE_PSIZE
@@ -12358,9 +12550,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetIncOffsetSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t OffsetSiz
  878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
-ARM GAS  /tmp/ccdl7gEi.s 			page 207
-
-
  880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
  881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -12409,6 +12598,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
  927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ARM GAS  /tmp/cczi2eQD.s 			page 211
+
+
  928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
  929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
  930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream priority level.
@@ -12418,9 +12610,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
  935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
  936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
-ARM GAS  /tmp/ccdl7gEi.s 			page 208
-
-
  937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
  939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
@@ -12469,6 +12658,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
  983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
  984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
+ARM GAS  /tmp/cczi2eQD.s 			page 212
+
+
  985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
  986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
  987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
@@ -12478,9 +12670,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
  991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Between 0 to 0xFFFFFFFF
  992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
  993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef* DMAx, uint32_t Stream)
-ARM GAS  /tmp/ccdl7gEi.s 			page 209
-
-
  994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
  995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
  996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -12529,6 +12718,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          CHSEL           LL_DMA_GetChannelSelection
 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
+ARM GAS  /tmp/cczi2eQD.s 			page 213
+
+
 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
 1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
@@ -12538,9 +12730,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
 1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
-ARM GAS  /tmp/ccdl7gEi.s 			page 210
-
-
 1051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_0
 1052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_1
 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CHANNEL_2
@@ -12589,6 +12778,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ARM GAS  /tmp/cczi2eQD.s 			page 214
+
+
 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Memory burst transfer configuration.
@@ -12598,9 +12790,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
 1107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
-ARM GAS  /tmp/ccdl7gEi.s 			page 211
-
-
 1108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
@@ -12649,6 +12838,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
+ARM GAS  /tmp/cczi2eQD.s 			page 215
+
+
 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
@@ -12658,9 +12850,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
 1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PBURST_SINGLE
 1164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PBURST_INC4
-ARM GAS  /tmp/ccdl7gEi.s 			page 212
-
-
 1165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PBURST_INC8
 1166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_PBURST_INC16
 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -12709,6 +12898,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CURRENTTARGETMEM0
 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_CURRENTTARGETMEM1
 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/cczi2eQD.s 			page 216
+
+
 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetCurrentTargetMem(DMA_TypeDef *DMAx, uint32_t Stream)
 1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
@@ -12718,9 +12910,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Enable the double buffer mode.
 1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll CR          DBM           LL_DMA_EnableDoubleBufferMode
 1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
-ARM GAS  /tmp/ccdl7gEi.s 			page 213
-
-
 1222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
@@ -12769,6 +12958,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
+ARM GAS  /tmp/cczi2eQD.s 			page 217
+
+
 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Returned value can be one of the following values:
 1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOSTATUS_0_25
@@ -12778,9 +12970,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOSTATUS_EMPTY
 1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOSTATUS_FULL
 1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 214
-
-
 1279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetFIFOStatus(DMA_TypeDef *DMAx, uint32_t Stream)
 1280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
@@ -12829,6 +13018,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Select FIFO threshold.
 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll FCR         FTH          LL_DMA_SetFIFOThreshold
+ARM GAS  /tmp/cczi2eQD.s 			page 218
+
+
 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
@@ -12838,9 +13030,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
 1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
-ARM GAS  /tmp/ccdl7gEi.s 			page 215
-
-
 1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Threshold This parameter can be one of the following values:
 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
@@ -12889,6 +13078,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
+ARM GAS  /tmp/cczi2eQD.s 			page 219
+
+
 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
 1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
@@ -12898,9 +13090,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  FifoThreshold This parameter can be one of the following values:
 1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
 1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
-ARM GAS  /tmp/ccdl7gEi.s 			page 216
-
-
 1393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
 1394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
@@ -12949,6 +13138,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   }
 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
+ARM GAS  /tmp/cczi2eQD.s 			page 220
+
+
 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Set the Memory address.
 1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll M0AR        M0A         LL_DMA_SetMemoryAddress
@@ -12958,9 +13150,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
-ARM GAS  /tmp/ccdl7gEi.s 			page 217
-
-
 1450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
@@ -13009,6 +13198,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
+ARM GAS  /tmp/cczi2eQD.s 			page 221
+
+
 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
 1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
@@ -13018,9 +13210,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 218
-
-
 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Get the Peripheral address.
@@ -13069,6 +13258,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief  Set the Memory to Memory Destination address.
 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll M0AR        M0A         LL_DMA_SetM2MDstAddress
+ARM GAS  /tmp/cczi2eQD.s 			page 222
+
+
 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @note   This API must not be called when the DMA channel is enabled.
 1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -13078,9 +13270,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_2
 1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_3
 1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_4
-ARM GAS  /tmp/ccdl7gEi.s 			page 219
-
-
 1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_5
 1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_6
 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
@@ -13129,6 +13318,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_7
 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval Between 0 to 0xFFFFFFFF
 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/cczi2eQD.s 			page 223
+
+
 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream)
 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****  return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->
@@ -13138,9 +13330,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Set Memory 1 address (used in case of Double buffer mode).
 1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll M1AR        M1A         LL_DMA_SetMemory1Address
 1620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
-ARM GAS  /tmp/ccdl7gEi.s 			page 220
-
-
 1621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  Stream This parameter can be one of the following values:
 1622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_0
 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   *         @arg @ref LL_DMA_STREAM_1
@@ -13189,6 +13378,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 0 half transfer flag.
 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  HTIF0    LL_DMA_IsActiveFlag_HT0
+ARM GAS  /tmp/cczi2eQD.s 			page 224
+
+
 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -13198,9 +13390,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-ARM GAS  /tmp/ccdl7gEi.s 			page 221
-
-
 1678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 1 half transfer flag.
 1679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  HTIF1    LL_DMA_IsActiveFlag_HT1
 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -13249,6 +13438,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  HTIF0    LL_DMA_IsActiveFlag_HT5
 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
+ARM GAS  /tmp/cczi2eQD.s 			page 225
+
+
 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
 1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -13258,9 +13450,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 6 half transfer flag.
 1734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  HTIF6    LL_DMA_IsActiveFlag_HT6
-ARM GAS  /tmp/ccdl7gEi.s 			page 222
-
-
 1735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
@@ -13309,6 +13498,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
+ARM GAS  /tmp/cczi2eQD.s 			page 226
+
+
 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF2)==(DMA_LISR_TCIF2));
 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -13318,9 +13510,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  TCIF3    LL_DMA_IsActiveFlag_TC3
 1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
-ARM GAS  /tmp/ccdl7gEi.s 			page 223
-
-
 1792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -13369,6 +13558,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7));
+ARM GAS  /tmp/cczi2eQD.s 			page 227
+
+
 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13378,9 +13570,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 1848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE0(DMA_TypeDef *DMAx)
-ARM GAS  /tmp/ccdl7gEi.s 			page 224
-
-
 1849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF0)==(DMA_LISR_TEIF0));
 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -13429,6 +13618,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF4)==(DMA_HISR_TEIF4));
 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
+ARM GAS  /tmp/cczi2eQD.s 			page 228
+
+
 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 5 transfer error flag.
 1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  TEIF0    LL_DMA_IsActiveFlag_TE5
@@ -13438,9 +13630,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
 1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 1905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF5)==(DMA_HISR_TEIF5));
-ARM GAS  /tmp/ccdl7gEi.s 			page 225
-
-
 1906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13489,6 +13678,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 2 direct mode error flag.
+ARM GAS  /tmp/cczi2eQD.s 			page 229
+
+
 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  DMEIF2    LL_DMA_IsActiveFlag_DME2
 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
@@ -13498,9 +13690,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF2)==(DMA_LISR_DMEIF2));
 1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
-ARM GAS  /tmp/ccdl7gEi.s 			page 226
-
-
 1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 3 direct mode error flag.
 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  DMEIF3    LL_DMA_IsActiveFlag_DME3
@@ -13549,6 +13738,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 7 direct mode error flag.
 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  DMEIF7    LL_DMA_IsActiveFlag_DME7
 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
+ARM GAS  /tmp/cczi2eQD.s 			page 230
+
+
 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME7(DMA_TypeDef *DMAx)
@@ -13558,9 +13750,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 0 FIFO error flag.
-ARM GAS  /tmp/ccdl7gEi.s 			page 227
-
-
 2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll LISR  FEIF0    LL_DMA_IsActiveFlag_FE0
 2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
@@ -13609,6 +13798,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
+ARM GAS  /tmp/cczi2eQD.s 			page 231
+
+
 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE4(DMA_TypeDef *DMAx)
 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF4)==(DMA_HISR_FEIF4));
@@ -13618,9 +13810,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Get Stream 5 FIFO error flag.
 2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HISR  FEIF0    LL_DMA_IsActiveFlag_FE5
 2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
-ARM GAS  /tmp/ccdl7gEi.s 			page 228
-
-
 2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval State of bit (1 or 0).
 2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE5(DMA_TypeDef *DMAx)
@@ -13669,6 +13858,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ARM GAS  /tmp/cczi2eQD.s 			page 232
+
+
 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1);
 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -13678,9 +13870,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
-ARM GAS  /tmp/ccdl7gEi.s 			page 229
-
-
 2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
 2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2);
@@ -13729,6 +13918,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6);
 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ARM GAS  /tmp/cczi2eQD.s 			page 233
+
+
 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 7 half transfer flag.
@@ -13738,9 +13930,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
 2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-ARM GAS  /tmp/ccdl7gEi.s 			page 230
-
-
 2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7);
 2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
@@ -13789,6 +13978,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ARM GAS  /tmp/cczi2eQD.s 			page 234
+
+
 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 4 transfer complete flag.
 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HIFCR  CTCIF4    LL_DMA_ClearFlag_TC4
 2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
@@ -13798,9 +13990,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4);
 2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-ARM GAS  /tmp/ccdl7gEi.s 			page 231
-
-
 2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @brief Clear Stream 5 transfer complete flag.
@@ -13831,102 +14020,102 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
- 1546              		.loc 5 2277 22 view .LVU388
- 1547              	.LBB101:
+ 1660              		.loc 5 2277 22 view .LVU428
+ 1661              	.LBB101:
 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7);
- 1548              		.loc 5 2279 3 view .LVU389
- 1549 0000 024B     		ldr	r3, .L112
- 1550 0002 4FF00062 		mov	r2, #134217728
- 1551 0006 DA60     		str	r2, [r3, #12]
- 1552              	.LVL43:
- 1553              		.loc 5 2279 3 is_stmt 0 view .LVU390
- 1554              	.LBE101:
- 1555              	.LBE100:
- 575:Src/stm32f7xx_it.c **** }
- 1556              		.loc 1 575 1 view .LVU391
- 1557 0008 7047     		bx	lr
- 1558              	.L113:
- 1559 000a 00BF     		.align	2
- 1560              	.L112:
- 1561 000c 00640240 		.word	1073898496
- 1562              		.cfi_endproc
- 1563              	.LFE1203:
- 1565              		.section	.text.DMA2_Stream7_IRQHandler,"ax",%progbits
- 1566              		.align	1
- 1567              		.global	DMA2_Stream7_IRQHandler
- 1568              		.syntax unified
- 1569              		.thumb
- 1570              		.thumb_func
-ARM GAS  /tmp/ccdl7gEi.s 			page 232
+ 1662              		.loc 5 2279 3 view .LVU429
+ 1663 0000 024B     		ldr	r3, .L123
+ 1664 0002 4FF00062 		mov	r2, #134217728
+ 1665 0006 DA60     		str	r2, [r3, #12]
+ 1666              	.LVL43:
+ 1667              		.loc 5 2279 3 is_stmt 0 view .LVU430
+ 1668              	.LBE101:
+ 1669              	.LBE100:
+ 601:Src/stm32f7xx_it.c **** }
+ 1670              		.loc 1 601 1 view .LVU431
+ 1671 0008 7047     		bx	lr
+ 1672              	.L124:
+ 1673 000a 00BF     		.align	2
+ 1674              	.L123:
+ARM GAS  /tmp/cczi2eQD.s 			page 235
 
 
- 1572              	DMA2_Stream7_IRQHandler:
- 1573              	.LFB1201:
+ 1675 000c 00640240 		.word	1073898496
+ 1676              		.cfi_endproc
+ 1677              	.LFE1203:
+ 1679              		.section	.text.DMA2_Stream7_IRQHandler,"ax",%progbits
+ 1680              		.align	1
+ 1681              		.global	DMA2_Stream7_IRQHandler
+ 1682              		.syntax unified
+ 1683              		.thumb
+ 1684              		.thumb_func
+ 1686              	DMA2_Stream7_IRQHandler:
+ 1687              	.LFB1201:
  417:Src/stm32f7xx_it.c ****   /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
- 1574              		.loc 1 417 1 is_stmt 1 view -0
- 1575              		.cfi_startproc
- 1576              		@ args = 0, pretend = 0, frame = 0
- 1577              		@ frame_needed = 0, uses_anonymous_args = 0
- 1578 0000 08B5     		push	{r3, lr}
- 1579              	.LCFI13:
- 1580              		.cfi_def_cfa_offset 8
- 1581              		.cfi_offset 3, -8
- 1582              		.cfi_offset 14, -4
+ 1688              		.loc 1 417 1 is_stmt 1 view -0
+ 1689              		.cfi_startproc
+ 1690              		@ args = 0, pretend = 0, frame = 0
+ 1691              		@ frame_needed = 0, uses_anonymous_args = 0
+ 1692 0000 08B5     		push	{r3, lr}
+ 1693              	.LCFI13:
+ 1694              		.cfi_def_cfa_offset 8
+ 1695              		.cfi_offset 3, -8
+ 1696              		.cfi_offset 14, -4
  419:Src/stm32f7xx_it.c ****   {
- 1583              		.loc 1 419 3 view .LVU393
- 1584              	.LVL44:
- 1585              	.LBB102:
- 1586              	.LBI102:
+ 1697              		.loc 1 419 3 view .LVU433
+ 1698              	.LVL44:
+ 1699              	.LBB102:
+ 1700              	.LBI102:
 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 1587              		.loc 5 1837 26 view .LVU394
- 1588              	.LBB103:
+ 1701              		.loc 5 1837 26 view .LVU434
+ 1702              	.LBB103:
 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
- 1589              		.loc 5 1839 3 view .LVU395
+ 1703              		.loc 5 1839 3 view .LVU435
 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
- 1590              		.loc 5 1839 11 is_stmt 0 view .LVU396
- 1591 0002 0A4B     		ldr	r3, .L119
- 1592 0004 5B68     		ldr	r3, [r3, #4]
- 1593              	.LVL45:
+ 1704              		.loc 5 1839 11 is_stmt 0 view .LVU436
+ 1705 0002 0A4B     		ldr	r3, .L130
+ 1706 0004 5B68     		ldr	r3, [r3, #4]
+ 1707              	.LVL45:
 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
- 1594              		.loc 5 1839 11 view .LVU397
- 1595              	.LBE103:
- 1596              	.LBE102:
+ 1708              		.loc 5 1839 11 view .LVU437
+ 1709              	.LBE103:
+ 1710              	.LBE102:
  419:Src/stm32f7xx_it.c ****   {
- 1597              		.loc 1 419 5 discriminator 1 view .LVU398
- 1598 0006 13F0006F 		tst	r3, #134217728
- 1599 000a 09D1     		bne	.L118
+ 1711              		.loc 1 419 5 discriminator 1 view .LVU438
+ 1712 0006 13F0006F 		tst	r3, #134217728
+ 1713 000a 09D1     		bne	.L129
  424:Src/stm32f7xx_it.c ****   {
- 1600              		.loc 1 424 8 is_stmt 1 view .LVU399
- 1601              	.LVL46:
- 1602              	.LBB104:
- 1603              	.LBI104:
+ 1714              		.loc 1 424 8 is_stmt 1 view .LVU439
+ 1715              	.LVL46:
+ 1716              	.LBB104:
+ 1717              	.LBI104:
 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 1604              		.loc 5 1925 26 view .LVU400
- 1605              	.LBB105:
+ 1718              		.loc 5 1925 26 view .LVU440
+ 1719              	.LBB105:
 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
- 1606              		.loc 5 1927 3 view .LVU401
+ 1720              		.loc 5 1927 3 view .LVU441
 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
- 1607              		.loc 5 1927 11 is_stmt 0 view .LVU402
- 1608 000c 074B     		ldr	r3, .L119
- 1609 000e 5B68     		ldr	r3, [r3, #4]
- 1610              	.LVL47:
+ 1721              		.loc 5 1927 11 is_stmt 0 view .LVU442
+ 1722 000c 074B     		ldr	r3, .L130
+ARM GAS  /tmp/cczi2eQD.s 			page 236
+
+
+ 1723 000e 5B68     		ldr	r3, [r3, #4]
+ 1724              	.LVL47:
 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 
- 1611              		.loc 5 1927 11 view .LVU403
- 1612              	.LBE105:
- 1613              	.LBE104:
+ 1725              		.loc 5 1927 11 view .LVU443
+ 1726              	.LBE105:
+ 1727              	.LBE104:
  424:Src/stm32f7xx_it.c ****   {
- 1614              		.loc 1 424 10 discriminator 1 view .LVU404
- 1615 0010 13F0007F 		tst	r3, #33554432
-ARM GAS  /tmp/ccdl7gEi.s 			page 233
-
-
- 1616 0014 03D0     		beq	.L114
+ 1728              		.loc 1 424 10 discriminator 1 view .LVU444
+ 1729 0010 13F0007F 		tst	r3, #33554432
+ 1730 0014 03D0     		beq	.L125
  426:Src/stm32f7xx_it.c ****   }
- 1617              		.loc 1 426 5 is_stmt 1 view .LVU405
- 1618              	.LVL48:
- 1619              	.LBB106:
- 1620              	.LBI106:
+ 1731              		.loc 1 426 5 is_stmt 1 view .LVU445
+ 1732              	.LVL48:
+ 1733              	.LBB106:
+ 1734              	.LBI106:
 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 
 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13969,6 +14158,9 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
+ARM GAS  /tmp/cczi2eQD.s 			page 237
+
+
 2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF3);
 2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -13978,9 +14170,6 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @rmtoll HIFCR  CTEIF4    LL_DMA_ClearFlag_TE4
 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @param  DMAx DMAx Instance
 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
-ARM GAS  /tmp/ccdl7gEi.s 			page 234
-
-
 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -14016,122 +14205,122 @@ ARM GAS  /tmp/ccdl7gEi.s 			page 1
 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   * @retval None
 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   */
 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
- 1621              		.loc 5 2365 22 view .LVU406
- 1622              	.LBB107:
+ 1735              		.loc 5 2365 22 view .LVU446
+ 1736              	.LBB107:
 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****   WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7);
- 1623              		.loc 5 2367 3 view .LVU407
- 1624 0016 054B     		ldr	r3, .L119
- 1625 0018 4FF00072 		mov	r2, #33554432
- 1626 001c DA60     		str	r2, [r3, #12]
- 1627              	.LVL49:
- 1628              	.L114:
- 1629              		.loc 5 2367 3 is_stmt 0 view .LVU408
- 1630              	.LBE107:
- 1631              	.LBE106:
+ 1737              		.loc 5 2367 3 view .LVU447
+ 1738 0016 054B     		ldr	r3, .L130
+ 1739 0018 4FF00072 		mov	r2, #33554432
+ 1740 001c DA60     		str	r2, [r3, #12]
+ 1741              	.LVL49:
+ 1742              	.L125:
+ 1743              		.loc 5 2367 3 is_stmt 0 view .LVU448
+ 1744              	.LBE107:
+ 1745              	.LBE106:
+ARM GAS  /tmp/cczi2eQD.s 			page 238
+
+
  432:Src/stm32f7xx_it.c **** 
- 1632              		.loc 1 432 1 view .LVU409
- 1633 001e 08BD     		pop	{r3, pc}
- 1634              	.L118:
+ 1746              		.loc 1 432 1 view .LVU449
+ 1747 001e 08BD     		pop	{r3, pc}
+ 1748              	.L129:
  421:Src/stm32f7xx_it.c ****     u_tx_flg = 0;//indicate that transfer compete
- 1635              		.loc 1 421 5 is_stmt 1 view .LVU410
- 1636 0020 FFF7FEFF 		bl	DMA2_Stream7_TransferComplete
- 1637              	.LVL50:
+ 1749              		.loc 1 421 5 is_stmt 1 view .LVU450
+ 1750 0020 FFF7FEFF 		bl	DMA2_Stream7_TransferComplete
+ 1751              	.LVL50:
  422:Src/stm32f7xx_it.c ****   }
-ARM GAS  /tmp/ccdl7gEi.s 			page 235
-
-
- 1638              		.loc 1 422 5 view .LVU411
+ 1752              		.loc 1 422 5 view .LVU451
  422:Src/stm32f7xx_it.c ****   }
- 1639              		.loc 1 422 14 is_stmt 0 view .LVU412
- 1640 0024 024B     		ldr	r3, .L119+4
- 1641 0026 0022     		movs	r2, #0
- 1642 0028 1A70     		strb	r2, [r3]
- 1643 002a F8E7     		b	.L114
- 1644              	.L120:
- 1645              		.align	2
- 1646              	.L119:
- 1647 002c 00640240 		.word	1073898496
- 1648 0030 00000000 		.word	u_tx_flg
- 1649              		.cfi_endproc
- 1650              	.LFE1201:
- 1652              		.text
- 1653              	.Letext0:
- 1654              		.file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 1655              		.file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
- 1656              		.file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- 1657              		.file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
- 1658              		.file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
- 1659              		.file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
- 1660              		.file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
- 1661              		.file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
- 1662              		.file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- 1663              		.file 15 "Inc/main.h"
- 1664              		.file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
-ARM GAS  /tmp/ccdl7gEi.s 			page 236
+ 1753              		.loc 1 422 14 is_stmt 0 view .LVU452
+ 1754 0024 024B     		ldr	r3, .L130+4
+ 1755 0026 0022     		movs	r2, #0
+ 1756 0028 1A70     		strb	r2, [r3]
+ 1757 002a F8E7     		b	.L125
+ 1758              	.L131:
+ 1759              		.align	2
+ 1760              	.L130:
+ 1761 002c 00640240 		.word	1073898496
+ 1762 0030 00000000 		.word	u_tx_flg
+ 1763              		.cfi_endproc
+ 1764              	.LFE1201:
+ 1766              		.text
+ 1767              	.Letext0:
+ 1768              		.file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
+ 1769              		.file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
+ 1770              		.file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
+ 1771              		.file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
+ 1772              		.file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
+ 1773              		.file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
+ 1774              		.file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
+ 1775              		.file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
+ 1776              		.file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
+ 1777              		.file 15 "Inc/main.h"
+ 1778              		.file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
+ARM GAS  /tmp/cczi2eQD.s 			page 239
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 stm32f7xx_it.c
-     /tmp/ccdl7gEi.s:20     .text.NMI_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:26     .text.NMI_Handler:00000000 NMI_Handler
-     /tmp/ccdl7gEi.s:43     .text.HardFault_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:49     .text.HardFault_Handler:00000000 HardFault_Handler
-     /tmp/ccdl7gEi.s:66     .text.MemManage_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:72     .text.MemManage_Handler:00000000 MemManage_Handler
-     /tmp/ccdl7gEi.s:89     .text.BusFault_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:95     .text.BusFault_Handler:00000000 BusFault_Handler
-     /tmp/ccdl7gEi.s:112    .text.UsageFault_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:118    .text.UsageFault_Handler:00000000 UsageFault_Handler
-     /tmp/ccdl7gEi.s:135    .text.SVC_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:141    .text.SVC_Handler:00000000 SVC_Handler
-     /tmp/ccdl7gEi.s:154    .text.DebugMon_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:160    .text.DebugMon_Handler:00000000 DebugMon_Handler
-     /tmp/ccdl7gEi.s:173    .text.PendSV_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:179    .text.PendSV_Handler:00000000 PendSV_Handler
-     /tmp/ccdl7gEi.s:192    .text.SysTick_Handler:00000000 $t
-     /tmp/ccdl7gEi.s:198    .text.SysTick_Handler:00000000 SysTick_Handler
-     /tmp/ccdl7gEi.s:218    .text.ADC_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:224    .text.ADC_IRQHandler:00000000 ADC_IRQHandler
-     /tmp/ccdl7gEi.s:248    .text.ADC_IRQHandler:00000010 $d
-     /tmp/ccdl7gEi.s:254    .text.TIM1_UP_TIM10_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:260    .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler
-     /tmp/ccdl7gEi.s:301    .text.TIM1_UP_TIM10_IRQHandler:00000024 $d
-     /tmp/ccdl7gEi.s:309    .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:315    .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler
-     /tmp/ccdl7gEi.s:355    .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d
-     /tmp/ccdl7gEi.s:362    .text.TIM2_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:368    .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler
-     /tmp/ccdl7gEi.s:381    .text.TIM8_UP_TIM13_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:387    .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler
-     /tmp/ccdl7gEi.s:453    .text.TIM8_UP_TIM13_IRQHandler:00000048 $d
-     /tmp/ccdl7gEi.s:459    .text.TIM5_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:465    .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler
-     /tmp/ccdl7gEi.s:478    .text.TIM6_DAC_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:484    .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler
-     /tmp/ccdl7gEi.s:543    .text.TIM6_DAC_IRQHandler:00000028 $d
-     /tmp/ccdl7gEi.s:550    .text.TIM7_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:556    .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler
-     /tmp/ccdl7gEi.s:605    .text.TIM7_IRQHandler:0000001c $d
-     /tmp/ccdl7gEi.s:611    .text.UART_RxCpltCallback:00000000 $t
-     /tmp/ccdl7gEi.s:617    .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback
-     /tmp/ccdl7gEi.s:655    .text.UART_RxCpltCallback:0000001a $d
-     /tmp/ccdl7gEi.s:687    .text.UART_RxCpltCallback:0000005a $t
-     /tmp/ccdl7gEi.s:1092   .text.UART_RxCpltCallback:00000270 $d
-     /tmp/ccdl7gEi.s:1106   .text.UART_RxCpltCallback:0000029c $t
-     /tmp/ccdl7gEi.s:1194   .text.UART_RxCpltCallback:00000310 $d
-     /tmp/ccdl7gEi.s:1203   .text.USART1_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:1209   .text.USART1_IRQHandler:00000000 USART1_IRQHandler
-     /tmp/ccdl7gEi.s:1522   .text.USART1_IRQHandler:000000c8 $d
-     /tmp/ccdl7gEi.s:1528   .text.DMA2_Stream7_TransferComplete:00000000 $t
-     /tmp/ccdl7gEi.s:1534   .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete
-     /tmp/ccdl7gEi.s:1561   .text.DMA2_Stream7_TransferComplete:0000000c $d
-     /tmp/ccdl7gEi.s:1566   .text.DMA2_Stream7_IRQHandler:00000000 $t
-     /tmp/ccdl7gEi.s:1572   .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler
-ARM GAS  /tmp/ccdl7gEi.s 			page 237
+     /tmp/cczi2eQD.s:20     .text.NMI_Handler:00000000 $t
+     /tmp/cczi2eQD.s:26     .text.NMI_Handler:00000000 NMI_Handler
+     /tmp/cczi2eQD.s:43     .text.HardFault_Handler:00000000 $t
+     /tmp/cczi2eQD.s:49     .text.HardFault_Handler:00000000 HardFault_Handler
+     /tmp/cczi2eQD.s:66     .text.MemManage_Handler:00000000 $t
+     /tmp/cczi2eQD.s:72     .text.MemManage_Handler:00000000 MemManage_Handler
+     /tmp/cczi2eQD.s:89     .text.BusFault_Handler:00000000 $t
+     /tmp/cczi2eQD.s:95     .text.BusFault_Handler:00000000 BusFault_Handler
+     /tmp/cczi2eQD.s:112    .text.UsageFault_Handler:00000000 $t
+     /tmp/cczi2eQD.s:118    .text.UsageFault_Handler:00000000 UsageFault_Handler
+     /tmp/cczi2eQD.s:135    .text.SVC_Handler:00000000 $t
+     /tmp/cczi2eQD.s:141    .text.SVC_Handler:00000000 SVC_Handler
+     /tmp/cczi2eQD.s:154    .text.DebugMon_Handler:00000000 $t
+     /tmp/cczi2eQD.s:160    .text.DebugMon_Handler:00000000 DebugMon_Handler
+     /tmp/cczi2eQD.s:173    .text.PendSV_Handler:00000000 $t
+     /tmp/cczi2eQD.s:179    .text.PendSV_Handler:00000000 PendSV_Handler
+     /tmp/cczi2eQD.s:192    .text.SysTick_Handler:00000000 $t
+     /tmp/cczi2eQD.s:198    .text.SysTick_Handler:00000000 SysTick_Handler
+     /tmp/cczi2eQD.s:218    .text.ADC_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:224    .text.ADC_IRQHandler:00000000 ADC_IRQHandler
+     /tmp/cczi2eQD.s:248    .text.ADC_IRQHandler:00000010 $d
+     /tmp/cczi2eQD.s:254    .text.TIM1_UP_TIM10_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:260    .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler
+     /tmp/cczi2eQD.s:301    .text.TIM1_UP_TIM10_IRQHandler:00000024 $d
+     /tmp/cczi2eQD.s:309    .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:315    .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler
+     /tmp/cczi2eQD.s:355    .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d
+     /tmp/cczi2eQD.s:362    .text.TIM2_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:368    .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler
+     /tmp/cczi2eQD.s:381    .text.TIM8_UP_TIM13_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:387    .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler
+     /tmp/cczi2eQD.s:453    .text.TIM8_UP_TIM13_IRQHandler:00000048 $d
+     /tmp/cczi2eQD.s:459    .text.TIM5_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:465    .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler
+     /tmp/cczi2eQD.s:478    .text.TIM6_DAC_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:484    .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler
+     /tmp/cczi2eQD.s:543    .text.TIM6_DAC_IRQHandler:00000028 $d
+     /tmp/cczi2eQD.s:550    .text.TIM7_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:556    .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler
+     /tmp/cczi2eQD.s:605    .text.TIM7_IRQHandler:0000001c $d
+     /tmp/cczi2eQD.s:611    .text.UART_RxCpltCallback:00000000 $t
+     /tmp/cczi2eQD.s:617    .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback
+     /tmp/cczi2eQD.s:655    .text.UART_RxCpltCallback:0000001a $d
+     /tmp/cczi2eQD.s:687    .text.UART_RxCpltCallback:0000005a $t
+     /tmp/cczi2eQD.s:1087   .text.UART_RxCpltCallback:00000268 $d
+     /tmp/cczi2eQD.s:1101   .text.UART_RxCpltCallback:00000294 $t
+     /tmp/cczi2eQD.s:1307   .text.UART_RxCpltCallback:000003b0 $d
+     /tmp/cczi2eQD.s:1317   .text.USART1_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:1323   .text.USART1_IRQHandler:00000000 USART1_IRQHandler
+     /tmp/cczi2eQD.s:1636   .text.USART1_IRQHandler:000000c8 $d
+     /tmp/cczi2eQD.s:1642   .text.DMA2_Stream7_TransferComplete:00000000 $t
+     /tmp/cczi2eQD.s:1648   .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete
+     /tmp/cczi2eQD.s:1675   .text.DMA2_Stream7_TransferComplete:0000000c $d
+     /tmp/cczi2eQD.s:1680   .text.DMA2_Stream7_IRQHandler:00000000 $t
+     /tmp/cczi2eQD.s:1686   .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler
+ARM GAS  /tmp/cczi2eQD.s 			page 240
 
 
-     /tmp/ccdl7gEi.s:1647   .text.DMA2_Stream7_IRQHandler:0000002c $d
+     /tmp/cczi2eQD.s:1761   .text.DMA2_Stream7_IRQHandler:0000002c $d
 
 UNDEFINED SYMBOLS
 HAL_IncTick
diff --git a/build/stm32f7xx_it.o b/build/stm32f7xx_it.o
index 3b20d02c63f4efb8a81a86a1fd044d3cd2d7ff78..ecc1e232e2a1df4eda49e15cc02fa06c36b13e7a 100644
GIT binary patch
delta 6202
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diff --git a/build/syscall.lst b/build/syscall.lst
index 723cae3..a935167 100644
--- a/build/syscall.lst
+++ b/build/syscall.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccd6fn4Z.s 			page 1
+ARM GAS  /tmp/ccgATpUY.s 			page 1
 
 
    1              		.cpu cortex-m7
@@ -24,7 +24,7 @@ ARM GAS  /tmp/ccd6fn4Z.s 			page 1
   21              		.file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
   22              		.file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
   23              		.file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
-ARM GAS  /tmp/ccd6fn4Z.s 			page 2
+ARM GAS  /tmp/ccgATpUY.s 			page 2
 
 
 DEFINED SYMBOLS