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ChTheo/E502_ADC_BFfirmware
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d446e010f8b70f9cbf9e38ec6fd86430135b30a2
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Theodor Chikin d446e010f8 implemented transparent mode and simplest AVG mode: no average, identical to transparent
2025-07-22 17:45:22 +03:00
build/release
implemented transparent mode and simplest AVG mode: no average, identical to transparent
2025-07-22 17:45:22 +03:00
gcc
git init of an empty project
2025-06-27 15:12:44 +03:00
src
implemented transparent mode and simplest AVG mode: no average, identical to transparent
2025-07-22 17:45:22 +03:00
vdsp
working processing and transferring data to PC via TX_buff. TX_buff is still limited in size because it is located in a small L1, not in SDRAM
2025-07-17 19:08:56 +03:00
makefile
Have been trying to force LARGE array allocation in SDRAM. Due to a bug somewhere in compiler or configuration, arrays defined in l502_user_process.c with '#include l502_sdram_noinit.h' or '__attribute__((section('.sdram_noinit')))' directives (that should allocate array in SDRAM) wrongly allocates in MEM_L1_DATA_A and overfills it. Workaround: define large arrays with these directives in l502_streams.c and include them via 'extern'.
2025-07-18 17:48:29 +03:00
Description
software for the BlackFin DSP inside E502 ADC module for RadioPhotonic generator
4 MiB
Languages
C 72%
Makefile 24.3%
Assembly 3.7%
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