module axil_cdc_wrapper #(
    parameter int ADDR_WIDTH = 32
    parameter int DATA_WIDTH = 32,
)(
    input wire s_clk,
    input wire s_rst,
    axi4l_if.slave  s_axi,

    input wire m_clk,
    input wire m_rst,
    axi4l_if.master m_axi
);

    localparam int STRB_WIDTH = (DATA_WIDTH/8);
    wire [ADDR_WIDTH-1:0]  cdc_s_axil_awaddr;
    wire [2:0]             cdc_s_axil_awprot;
    wire                   cdc_s_axil_awvalid;
    wire                   cdc_s_axil_awready;
    wire [DATA_WIDTH-1:0]  cdc_s_axil_wdata;
    wire [STRB_WIDTH-1:0]  cdc_s_axil_wstrb;
    wire                   cdc_s_axil_wvalid;
    wire                   cdc_s_axil_wready;
    wire [1:0]             cdc_s_axil_bresp;
    wire                   cdc_s_axil_bvalid;
    wire                   cdc_s_axil_bready;
    wire [ADDR_WIDTH-1:0]  cdc_s_axil_araddr;
    wire [2:0]             cdc_s_axil_arprot;
    wire                   cdc_s_axil_arvalid;
    wire                   cdc_s_axil_arready;
    wire [DATA_WIDTH-1:0]  cdc_s_axil_rdata;
    wire [1:0]             cdc_s_axil_rresp;
    wire                   cdc_s_axil_rvalid;
    wire                   cdc_s_axil_rready;
    wire [ADDR_WIDTH-1:0]  cdc_m_axil_awaddr;
    wire [2:0]             cdc_m_axil_awprot;
    wire                   cdc_m_axil_awvalid;
    wire                   cdc_m_axil_awready;
    wire [DATA_WIDTH-1:0]  cdc_m_axil_wdata;
    wire [STRB_WIDTH-1:0]  cdc_m_axil_wstrb;
    wire                   cdc_m_axil_wvalid;
    wire                   cdc_m_axil_wready;
    wire [1:0]             cdc_m_axil_bresp;
    wire                   cdc_m_axil_bvalid;
    wire                   cdc_m_axil_bready;
    wire [ADDR_WIDTH-1:0]  cdc_m_axil_araddr;
    wire [2:0]             cdc_m_axil_arprot;
    wire                   cdc_m_axil_arvalid;
    wire                   cdc_m_axil_arready;
    wire [DATA_WIDTH-1:0]  cdc_m_axil_rdata;
    wire [1:0]             cdc_m_axil_rresp;
    wire                   cdc_m_axil_rvalid;
    wire                   cdc_m_axil_rready;

    axi4l_if_to_flat #(
        .ADDR_W (ADDR_WIDTH),
        .DATA_W (DATA_WIDTH)
    ) i_axi4l_if_to_flat (
        .s_axil (s_axi),
        .m_axil_awaddr  (cdc_m_axil_awaddr),
        .m_axil_awprot  (cdc_m_axil_awprot),
        .m_axil_awuser  (cdc_m_axil_awuser),
        .m_axil_awvalid (cdc_m_axil_awvalid),
        .m_axil_awready (cdc_m_axil_awready),
        .m_axil_wdata   (cdc_m_axil_wdata),
        .m_axil_wstrb   (cdc_m_axil_wstrb),
        .m_axil_wuser   (cdc_m_axil_wuser),
        .m_axil_wvalid  (cdc_m_axil_wvalid),
        .m_axil_wready  (cdc_m_axil_wready),
        .m_axil_bresp   (cdc_m_axil_bresp),
        .m_axil_buser   (cdc_m_axil_buser),
        .m_axil_bvalid  (cdc_m_axil_bvalid),
        .m_axil_bready  (cdc_m_axil_bready),
        .m_axil_araddr  (cdc_m_axil_araddr),
        .m_axil_arprot  (cdc_m_axil_arprot),
        .m_axil_aruser  (cdc_m_axil_aruser),
        .m_axil_arvalid (cdc_m_axil_arvalid),
        .m_axil_arready (cdc_m_axil_arready),
        .m_axil_rdata   (cdc_m_axil_rdata),
        .m_axil_rresp   (cdc_m_axil_rresp),
        .m_axil_ruser   (cdc_m_axil_ruser),
        .m_axil_rvalid  (cdc_m_axil_rvalid),
        .m_axil_rready  (cdc_m_axil_rready)
    );

    axil_cdc #(
        .ADDR_WIDTH (ADDR_WIDTH)
        .DATA_WIDTH (DATA_WIDTH),
    ) i_axil_cdc (
        .s_clk          (s_clk),
        .s_rst          (s_rst),
        .s_axil_awaddr  (cdc_m_axil_awaddr),
        .s_axil_awprot  (cdc_m_axil_awprot),
        .s_axil_awvalid (cdc_m_axil_awvalid),
        .s_axil_awready (cdc_m_axil_awready),
        .s_axil_wdata   (cdc_m_axil_wdata),
        .s_axil_wstrb   (cdc_m_axil_wstrb),
        .s_axil_wvalid  (cdc_m_axil_wvalid),
        .s_axil_wready  (cdc_m_axil_wready),
        .s_axil_bresp   (cdc_m_axil_bresp),
        .s_axil_bvalid  (cdc_m_axil_bvalid),
        .s_axil_bready  (cdc_m_axil_bready),
        .s_axil_araddr  (cdc_m_axil_araddr),
        .s_axil_arprot  (cdc_m_axil_arprot),
        .s_axil_arvalid (cdc_m_axil_arvalid),
        .s_axil_arready (cdc_m_axil_arready),
        .s_axil_rdata   (cdc_m_axil_rdata),
        .s_axil_rresp   (cdc_m_axil_rresp),
        .s_axil_rvalid  (cdc_m_axil_rvalid),
        .s_axil_rready  (cdc_m_axil_rready),

        .m_clk          (m_clk),
        .m_rst          (m_rst),
        .m_axil_awaddr  (cdc_s_axil_awaddr),
        .m_axil_awprot  (cdc_s_axil_awprot),
        .m_axil_awvalid (cdc_s_axil_awvalid),
        .m_axil_awready (cdc_s_axil_awready),
        .m_axil_wdata   (cdc_s_axil_wdata),
        .m_axil_wstrb   (cdc_s_axil_wstrb),
        .m_axil_wvalid  (cdc_s_axil_wvalid),
        .m_axil_wready  (cdc_s_axil_wready),
        .m_axil_bresp   (cdc_s_axil_bresp),
        .m_axil_bvalid  (cdc_s_axil_bvalid),
        .m_axil_bready  (cdc_s_axil_bready),
        .m_axil_araddr  (cdc_s_axil_araddr),
        .m_axil_arprot  (cdc_s_axil_arprot),
        .m_axil_arvalid (cdc_s_axil_arvalid),
        .m_axil_arready (cdc_s_axil_arready),
        .m_axil_rdata   (cdc_s_axil_rdata),
        .m_axil_rresp   (cdc_s_axil_rresp),
        .m_axil_rvalid  (cdc_s_axil_rvalid),
        .m_axil_rready  (cdc_s_axil_rready)
    );

    axi4l_flat_to_if #(
        .ADDR_W (ADDR_WIDTH),
        .DATA_W (DATA_WIDTH)
    ) i_axi4l_flat_to_if (
        .s_axil_awaddr  (cdc_s_axil_awaddr),
        .s_axil_awprot  (cdc_s_axil_awprot),
        .s_axil_awuser  (cdc_s_axil_awuser),
        .s_axil_awvalid (cdc_s_axil_awvalid),
        .s_axil_awready (cdc_s_axil_awready),
        .s_axil_wdata   (cdc_s_axil_wdata),
        .s_axil_wstrb   (cdc_s_axil_wstrb),
        .s_axil_wuser   (cdc_s_axil_wuser),
        .s_axil_wvalid  (cdc_s_axil_wvalid),
        .s_axil_wready  (cdc_s_axil_wready),
        .s_axil_bresp   (cdc_s_axil_bresp),
        .s_axil_buser   (cdc_s_axil_buser),
        .s_axil_bvalid  (cdc_s_axil_bvalid),
        .s_axil_bready  (cdc_s_axil_bready),
        .s_axil_araddr  (cdc_s_axil_araddr),
        .s_axil_arprot  (cdc_s_axil_arprot),
        .s_axil_aruser  (cdc_s_axil_aruser),
        .s_axil_arvalid (cdc_s_axil_arvalid),
        .s_axil_arready (cdc_s_axil_arready),
        .s_axil_rdata   (cdc_s_axil_rdata),
        .s_axil_rresp   (cdc_s_axil_rresp),
        .s_axil_ruser   (cdc_s_axil_ruser),
        .s_axil_rvalid  (cdc_s_axil_rvalid),
        .s_axil_rready  (cdc_s_axil_rready),
        .m_axil (m_axil)
    );

endmodule