# Minimal cocotb + cocotbext-axi test for compact AXI interface loopback.
# Run:
#   make SIM=verilator
# or:
#   make SIM=questa

TOPLEVEL_LANG = verilog
SIM ?= verilator

PWD := $(shell pwd)

RTL_DIR = $(PWD)/../../rtl

VERILOG_SOURCES += $(RTL_DIR)/axi_pkg.sv
VERILOG_SOURCES += $(RTL_DIR)/axi_if.sv
VERILOG_SOURCES += $(RTL_DIR)/axi4_flat_to_if.sv
VERILOG_SOURCES += $(RTL_DIR)/axi4_if_to_flat.sv
VERILOG_SOURCES += $(PWD)/tb_axi4_loopback.sv
VERILOG_SOURCES += $(PWD)/axi4_loopback.sv

TOPLEVEL = tb_axi4_loopback
MODULE = test_axi4_loopback


ifeq ($(SIM),verilator)
    EXTRA_ARGS += --trace --trace-structs
    EXTRA_ARGS += -I$(PWD)/rtl
    COMPILE_ARGS += -Wno-fatal
    COMPILE_ARGS += -I$(PWD)/rtl
endif

include $(shell cocotb-config --makefiles)/Makefile.sim
