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reflectometer_fpga_project/.gitignore
2026-04-17 14:50:23 +03:00

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**build**
# vivado project exclude
**.hw
**.ip_user_files
**.cache
**.gen
**.runs
**.sim
**.srcs
*.jou
*.log
*.rpt
*.dcp
*.xpr
.Xil
xvlog.pb
*vivado_pid*
# some generated files (they annoy me)
update_config.tcl
create_project.tcl
gen_ip.tcl
defines.v
run_sim.tcl
*.bit
*.xsa
*.ltx
*.bin