`timescale 1ns / 1ps module sampler_tb; localparam DATA_WIDTH = 12; localparam PACK_FACTOR = 1; localparam PROCESS_MODE = 0; localparam CLK_PERIOD = 15.3846; logic clk; logic rst; logic [DATA_WIDTH-1:0] data_in; logic out_of_range; logic [31:0] smp_num; logic done; logic request; logic [DATA_WIDTH*PACK_FACTOR-1:0] m_axis_tdata; logic m_axis_tvalid; int received_count; sampler #( .DATA_WIDTH (DATA_WIDTH), .PACK_FACTOR (PACK_FACTOR), .PROCESS_MODE(PROCESS_MODE) ) dut ( .clk_in (clk), .rst (rst), .data_in (data_in), .out_of_range (out_of_range), .smp_num (smp_num), .done (done), .m_axis_tdata (m_axis_tdata), .m_axis_tvalid(m_axis_tvalid), .request (request) ); // ===================================================== // CLOCK // ===================================================== initial begin clk = 0; forever #(CLK_PERIOD/2) clk = ~clk; end // ===================================================== // RESET // ===================================================== initial begin rst = 1; data_in = 0; out_of_range = 0; done = 0; smp_num = 0; repeat(5) @(posedge clk); rst = 0; end // ===================================================== // OUTPUT COUNTER // ===================================================== always @(posedge clk) begin if (m_axis_tvalid) received_count++; end // ===================================================== // FEED DATA // ===================================================== task automatic feed_data_stream( input int num_words, input bit random_data, input bit random_out_of_range ); logic [DATA_WIDTH-1:0] value; bit oor; begin value = 1; for (int i = 0; i < num_words; i++) begin if (random_data) value = $urandom_range(1, (1<