# Register indexes from axi4l_reg_map_controller_pkg.sv
REG_CONTROL = 0
REG_STATUS = 1
REG_DAC_WIDTH = 2
REG_DAC_PERIOD = 3
REG_DAC_PULSE_NUM = 4
REG_DAC_PULSE_HEIGHT = 5
REG_ADC_PERIOD = 6
REG_WINDOW_SIZE = 7
REG_ERROR = 8
REG_DESC_READ_ADDR = 9
REG_DESC_READ_LEN = 10
REG_DESC_READ_CONFIG = 11
REG_READ_STATUS = 12
REG_DESC_WRITE_ADDR = 13
REG_DESC_WRITE_LEN_AND_TAG = 14
REG_STATUS_WRITE_LEN = 15
REG_STATUS_WRITE_CONFIG = 16


# REG_CONTROL pulse bits
CTRL_START = 1 << 0
CTRL_RST_SOFT = 1 << 1
CTRL_CFG_BUS_VALID = 1 << 2
CTRL_SEND_DESC_READ = 1 << 3
CTRL_SEND_DESC_WRITE = 1 << 4
CTRL_TAKE_STATUS_READ = 1 << 5
CTRL_TAKE_STATUS_WRITE = 1 << 6

# REG_STATUS bits
STATUS_BUSY                 = 1 << 0
STATUS_PROCESSING_DONE      = 1 << 1

STATUS_DESC_READ_BUSY       = 1 << 2
STATUS_DESC_WRITE_BUSY      = 1 << 3
STATUS_STATUS_READ_BUSY     = 1 << 4
STATUS_STATUS_WRITE_BUSY    = 1 << 5

STATUS_DESC_READ_HS         = 1 << 6
STATUS_DESC_WRITE_HS        = 1 << 7
STATUS_STATUS_READ_HS       = 1 << 8
STATUS_STATUS_WRITE_HS      = 1 << 9

# PARAMETERS for accumulator reference model

DAC_DATA_WIDTH = 14
ADC_DATA_WIDTH = 12
PACK_FACTOR = 1
PROCESS_MODE = 0
ZERO_LEVEL = 8192
ACCUM_WIDTH = 32
N_MAX = 4096
PACKET_SIZE = 1024
RD_FIFO_WIDTH = 32