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3
Commits
| Author | SHA1 | Date | |
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735bc6518d | ||
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e354cb2742 | ||
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7c7cd451b8 |
@@ -86,15 +86,15 @@
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Система работает в нескольких тактовых доменах:
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Система работает в нескольких тактовых доменах:
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- Ethernet RX (`gmii_rx_clk`)
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- Ethernet RX (`clk_axis_control`)
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- Ethernet TX (`gmii_tx_clk`)
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- Ethernet TX (`clk_axis_accumulator`)
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- DAC (`dac_clk`)
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- DAC (`clk_generator`)
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- ADC (`adc_clk`)
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- ADC (`clk_sampler`)
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Для корректной синхронизации между DAC и ADC используются специальные CDC-регистры для сигналов:
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Для корректной синхронизации между DAC и ADC используются специальные CDC-регистры для сигналов:
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- `sample_req`
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- `done`
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- `sample_done`
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- `request`
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Это обеспечивает безопасную передачу handshake-сигналов между тактовыми доменами.
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Это обеспечивает безопасную передачу handshake-сигналов между тактовыми доменами.
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@@ -110,8 +110,8 @@
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Типовые значения:
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Типовые значения:
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- `8192` — середина диапазона ЦАП
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- `8192` — середина диапазона ЦАП (0V)
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- `0` — нулевой уровень
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- `0` — нулевой уровень (-5V)
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### ADC_DATA_WIDTH
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### ADC_DATA_WIDTH
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Ширина входных данных, получаемых с АЦП.
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Ширина входных данных, получаемых с АЦП.
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@@ -143,3 +143,5 @@
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```make all``` - собрать все до битстрима
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```make all``` - собрать все до битстрима
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```make vivado``` - открыть проект в Vivado
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```make vivado``` - открыть проект в Vivado
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```make sim``` - симуляция и верификация проекта
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@@ -2,6 +2,25 @@
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`include "interfaces.svh"
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`include "interfaces.svh"
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// `define DEBUG
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`define MEASURE_CLK(clk, period) \
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begin \
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realtime t1, t2; \
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@(posedge clk); \
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t1 = $realtime; \
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@(posedge clk); \
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t2 = $realtime; \
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period = t2 - t1; \
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end
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`define ERR_CHECK \
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total_tests++; \
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if (result_flag) begin \
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total_failed_tests++; \
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$error("Test #%0d failed. Err code: %0d", total_tests, result_flag); \
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end \
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module reflectometer_tb;
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module reflectometer_tb;
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//------------------------------------------------------------
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//------------------------------------------------------------
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// Параметры
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// Параметры
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@@ -17,6 +36,10 @@ module reflectometer_tb;
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localparam PACKET_SIZE = 1024; // bytes per UDP packet
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localparam PACKET_SIZE = 1024; // bytes per UDP packet
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localparam int REQUEST_TIMEOUT = 3 * PACKET_SIZE; // timeout for packet receiving from accumulator
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localparam int REQUEST_TIMEOUT = 3 * PACKET_SIZE; // timeout for packet receiving from accumulator
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localparam int TEST_NUM = 100; // number of random tests
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localparam real PEARSON_THRESHOLD = 0.99;
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localparam real NRMSE_THRESHOLD = 0.1;
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localparam ZERO_LEVEL = LOGIC_ZERO_LEVEL; // "logic" VS "voltage"
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localparam ZERO_LEVEL = LOGIC_ZERO_LEVEL; // "logic" VS "voltage"
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@@ -26,7 +49,8 @@ module reflectometer_tb;
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//------------------------------------------------------------
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//------------------------------------------------------------
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// Глобальные перменные
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// Глобальные перменные
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//------------------------------------------------------------
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//------------------------------------------------------------
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int unsigned WINDOW_SIZE = 65; // fixed subwindow size to average by time
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realtime CLK_ADC_PERIOD;
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realtime CLK_DAC_PERIOD;
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//------------------------------------------------------------
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//------------------------------------------------------------
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// Тактовые сигналы и сброс
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// Тактовые сигналы и сброс
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@@ -38,7 +62,7 @@ module reflectometer_tb;
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//------------------------------------------------------------
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//------------------------------------------------------------
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// Управление и конфиг DUT
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// Управление и конфиг DUT
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//------------------------------------------------------------
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//------------------------------------------------------------
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logic [31:0] window_size;
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logic [31:0] window_size_port;
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// AXI-S интерфейс для управления
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// AXI-S интерфейс для управления
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axis_if axis_control_if (
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axis_if axis_control_if (
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.clk(clk_eth_phy),
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.clk(clk_eth_phy),
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@@ -139,7 +163,7 @@ module reflectometer_tb;
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// Control AXI-S bus
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// Control AXI-S bus
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.clk_axis_control(clk_eth_phy), // GMII PHY TX clock
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.clk_axis_control(clk_eth_phy), // GMII PHY TX clock
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.axis_control(axis_control_if.slave),
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.axis_control(axis_control_if.slave),
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.window_size(window_size), // direct signal crutch (old controller)
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.window_size(window_size_port), // direct signal crutch (old controller)
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// RTL-MAC handshake
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// RTL-MAC handshake
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.request_ready(request_ready),
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.request_ready(request_ready),
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@@ -155,7 +179,6 @@ module reflectometer_tb;
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.adc_data(adc_data),
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.adc_data(adc_data),
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.adc_otr(adc_otr)
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.adc_otr(adc_otr)
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);
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);
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assign window_size = WINDOW_SIZE;
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//------------------------------------------------------------
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//------------------------------------------------------------
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// Тактовые сигналы
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// Тактовые сигналы
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@@ -197,7 +220,7 @@ module reflectometer_tb;
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// Ахтунг, 14-битный ЦАП захардкожен
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// Ахтунг, 14-битный ЦАП захардкожен
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if (DAC_DATA_WIDTH != 14)
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if (DAC_DATA_WIDTH != 14)
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$display("[WARNING] -dut_send_system_config- Default pulse height (DAC bitwidth) is equal to 14. Be aware, controller packet structure is coded for 14 bits");
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$warning("[WARNING] -dut_send_system_config- Default pulse height (DAC bitwidth) is equal to 14. Be aware, controller packet structure is coded for 14 bits");
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tx_packet = '{
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tx_packet = '{
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8'h88, // Команда
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8'h88, // Команда
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@@ -210,25 +233,26 @@ module reflectometer_tb;
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vif.master_send(tx_packet);
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vif.master_send(tx_packet);
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// TODO remove for new controller
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// TODO remove for new controller
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WINDOW_SIZE = window_size;
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window_size_port = window_size;
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endtask
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endtask
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// Таски сбора статистики
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// Таски сбора статистики
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task automatic dut_read_output(
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task automatic dut_read_output(
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virtual axis_if#(8).tb vif,
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virtual axis_if#(8).tb vif,
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input int sample_num,
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input int sample_num,
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input int window_size,
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input bit randomize_recv_delays,
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input bit randomize_recv_delays,
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output int output_data[]
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output int output_data[]
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);
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);
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logic [7:0] rx_packet[];
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logic [7:0] rx_packet[];
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logic [ACCUM_WIDTH-1:0] data_packet[];
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logic [ACCUM_WIDTH-1:0] data_packet[];
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int numbers_per_packet = PACKET_SIZE/(ACCUM_WIDTH/8);
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int numbers_per_packet = PACKET_SIZE/(ACCUM_WIDTH/8);
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int packet_num = $ceil(real'(sample_num / WINDOW_SIZE) / real'(numbers_per_packet));
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int packet_num = $ceil(real'(sample_num / window_size) / real'(numbers_per_packet));
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int timeout_flag = 0;
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int timeout_flag = 0;
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int packet_counter = 0;
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int packet_counter = 0;
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if (sample_num % WINDOW_SIZE) begin
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if (sample_num % window_size) begin
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$display("[ERROR] -dut_read_output- Sample_num must be multiple of WINDOW_SIZE: %0d %% %0d = %0d", sample_num, WINDOW_SIZE, sample_num % WINDOW_SIZE);
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$error("-dut_read_output- Sample_num must be multiple of window_size: %0d %% %0d = %0d", sample_num, window_size, sample_num % window_size);
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$finish;
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$finish;
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end
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end
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@@ -256,7 +280,7 @@ module reflectometer_tb;
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// packet recv loop
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// packet recv loop
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forever begin
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forever begin
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if (packet_counter > packet_num) begin
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if (packet_counter > packet_num) begin
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$display("[ERROR] -dut_read_output- Packet overflow detected. Number of data packets exceeds expected amount of packets");
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$error("-dut_read_output- Packet overflow detected. Number of data packets exceeds expected amount of packets");
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$finish;
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$finish;
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end
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end
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@@ -278,12 +302,12 @@ module reflectometer_tb;
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disable receive_packet_timeout;
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disable receive_packet_timeout;
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if (timeout_flag) begin
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if (timeout_flag) begin
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$display("[ERROR] -dut_read_output- Timeout detected when receiving packet");
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$error("-dut_read_output- Timeout detected when receiving packet");
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$finish;
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$finish;
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end
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end
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if (rx_packet.size() != PACKET_SIZE) begin
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if (rx_packet.size() != PACKET_SIZE) begin
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$display("[ERROR] -dut_read_output- Wrong packet size received: %0d bytes received, %0d bytes expected", rx_packet.size(), PACKET_SIZE);
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$error("-dut_read_output- Wrong packet size received: %0d bytes received, %0d bytes expected", rx_packet.size(), PACKET_SIZE);
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$finish;
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$finish;
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end
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end
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@@ -308,25 +332,323 @@ module reflectometer_tb;
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disable packet_counter_proc;
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disable packet_counter_proc;
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if (packet_counter != packet_num) begin
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if (packet_counter != packet_num) begin
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$display("[ERROR] -dut_read_output- Wrong number of packets received: %0d received, %0d expected", packet_counter, packet_num);
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$error("-dut_read_output- Wrong number of packets received: %0d received, %0d expected", packet_counter, packet_num);
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$finish;
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$finish;
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end
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end
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wait(processing_done == 0);
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endtask
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endtask
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//------------------------------------------------------------
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// Функции и таски для верификации сигналов
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//------------------------------------------------------------
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// Таска генерации идеального тестового сигнала
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task automatic reference_signal(
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input int pulse_width,
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input int pulse_height,
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input int pulse_period_adc,
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input int window_size,
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output real result[]
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);
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/*
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Globals:
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ADC and DAC clock periods,
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Virtual ADC and DAC voltage steps
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Task developed with assumption that first discrete values of DAC and ADC
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are syncrhonized at t==0 and started simultaneously.
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Gains and biases of virtual ADC & DAC are default and ranges are [-5V;5V].
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Bitwidths may be altered.
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Returned result[] array is an array of sums of voltage potentials in discrete time points.
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Discrete samples summed over a time window.
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result[time] = (voltage)
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*/
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int sample_num = pulse_period_adc / window_size; // total averaged output samples from accumulator
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real current_signal_sample, partial_sum;
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real ref_signal_active_voltage = virtual_dac.code_to_voltage(pulse_height);
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real ref_signal_zero_voltage = virtual_dac.code_to_voltage(ZERO_LEVEL);
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if (pulse_period_adc % window_size) begin
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$error("-reference_signal- pulse_period_adc must be multiple of window_size: %0d %% %0d = %0d", pulse_period_adc, window_size, pulse_period_adc % window_size);
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$finish;
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end
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result = new[sample_num];
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partial_sum = 0;
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for (int i = 0; i < pulse_period_adc; i++) begin
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// var i in ADC timespace
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// i == 0 is a t0 of pulse generation and sampling
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current_signal_sample = (i*CLK_ADC_PERIOD <= pulse_width*CLK_DAC_PERIOD) ? ref_signal_active_voltage : ref_signal_zero_voltage;
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partial_sum += current_signal_sample;
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if (i % window_size == (window_size-1)) begin
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result[i / window_size] = partial_sum;
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partial_sum = 0;
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end
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end
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endtask
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// Функция проверки размеров выборок
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function automatic void check_size(
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input real a[],
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input real b[]
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|
);
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if (a.size() != b.size())
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$fatal(1, "Array size mismatch: %0d != %0d",
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|
a.size(), b.size());
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|
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|
if (a.size() == 0)
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$error(1, "Empty array");
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|
endfunction
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|
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|
// Среднее по выборке
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function automatic real array_mean(
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|
input real a[]
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|
);
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|
real sum = 0.0;
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|
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||||||
|
foreach (a[i])
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|
sum += a[i];
|
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|
|
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|
return sum / a.size();
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|
endfunction
|
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|
|
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|
// MSE двух выборок
|
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|
function automatic real calc_mse(
|
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|
input real a[],
|
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|
input real b[]
|
||||||
|
);
|
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|
real sum = 0.0;
|
||||||
|
|
||||||
|
check_size(a, b);
|
||||||
|
|
||||||
|
foreach (a[i]) begin
|
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|
real err;
|
||||||
|
err = a[i] - b[i];
|
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|
sum += err * err;
|
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|
end
|
||||||
|
|
||||||
|
return sum / a.size();
|
||||||
|
endfunction
|
||||||
|
|
||||||
|
// NRMSE двух выборок (нормирование RMSE)
|
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|
function automatic real calc_nrmse(
|
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|
input real a[],
|
||||||
|
input real b[]
|
||||||
|
);
|
||||||
|
const real EPS = 1e-12;
|
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|
real mse, ms = 0;
|
||||||
|
|
||||||
|
mse = calc_mse(a, b);
|
||||||
|
|
||||||
|
foreach (a[i]) begin
|
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|
ms += a[i] * a[i];
|
||||||
|
end
|
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|
ms /= a.size();
|
||||||
|
|
||||||
|
return $sqrt(mse / (ms + EPS));
|
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|
endfunction
|
||||||
|
|
||||||
|
// Функция модуля
|
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|
function automatic real abs_f(input real x);
|
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|
return (x < 0.0) ? -x : x;
|
||||||
|
endfunction
|
||||||
|
|
||||||
|
// Максимальная абсолютная ошибка
|
||||||
|
function automatic real calc_max_error(
|
||||||
|
input real a[],
|
||||||
|
input real b[]
|
||||||
|
);
|
||||||
|
real max_err = 0.0;
|
||||||
|
|
||||||
|
check_size(a, b);
|
||||||
|
|
||||||
|
foreach (a[i]) begin
|
||||||
|
real err;
|
||||||
|
|
||||||
|
err = abs_f(a[i] - b[i]);
|
||||||
|
|
||||||
|
if (err > max_err)
|
||||||
|
max_err = err;
|
||||||
|
end
|
||||||
|
|
||||||
|
return max_err;
|
||||||
|
endfunction
|
||||||
|
|
||||||
|
// Коэффициент корреляции Пирсона
|
||||||
|
function automatic real calc_pearson(
|
||||||
|
input real a[],
|
||||||
|
input real b[]
|
||||||
|
);
|
||||||
|
real mean_a;
|
||||||
|
real mean_b;
|
||||||
|
real numerator = 0.0;
|
||||||
|
real denom_a = 0.0;
|
||||||
|
real denom_b = 0.0;
|
||||||
|
|
||||||
|
check_size(a, b);
|
||||||
|
|
||||||
|
mean_a = array_mean(a);
|
||||||
|
mean_b = array_mean(b);
|
||||||
|
|
||||||
|
foreach (a[i]) begin
|
||||||
|
real da;
|
||||||
|
real db;
|
||||||
|
|
||||||
|
da = a[i] - mean_a;
|
||||||
|
db = b[i] - mean_b;
|
||||||
|
|
||||||
|
numerator += da * db;
|
||||||
|
denom_a += da * da;
|
||||||
|
denom_b += db * db;
|
||||||
|
end
|
||||||
|
|
||||||
|
if ((denom_a == 0.0) || (denom_b == 0.0))
|
||||||
|
return 0.0;
|
||||||
|
|
||||||
|
return numerator / $sqrt(denom_a * denom_b);
|
||||||
|
endfunction
|
||||||
|
|
||||||
|
// Вспомогательная функция для вывода массива
|
||||||
|
function automatic void display_array_f(input real a[]);
|
||||||
|
$write("\t");
|
||||||
|
foreach(a[i])
|
||||||
|
$write("%f ", a[i]);
|
||||||
|
$write("\n");
|
||||||
|
endfunction
|
||||||
|
|
||||||
|
// Вспомогательная функция для вывода массива
|
||||||
|
function automatic void display_array(input int a[]);
|
||||||
|
$write("\t");
|
||||||
|
foreach(a[i])
|
||||||
|
$write("%0d ", a[i]);
|
||||||
|
$write("\n");
|
||||||
|
endfunction
|
||||||
|
|
||||||
// Основная таска типового теста
|
// Основная таска типового теста
|
||||||
// todo
|
task automatic run_test_case(
|
||||||
|
virtual axis_if#(8).tb ctrl_vif,
|
||||||
|
virtual axis_if#(8).tb accum_vif,
|
||||||
|
input int pulse_width,
|
||||||
|
input int pulse_period,
|
||||||
|
input int pulse_num,
|
||||||
|
input int pulse_height,
|
||||||
|
input int pulse_period_adc,
|
||||||
|
input int window_size,
|
||||||
|
input bit rand_recv_delays,
|
||||||
|
input bit use_reset,
|
||||||
|
output int result
|
||||||
|
);
|
||||||
|
int output_data[]; // raw accum values
|
||||||
|
real output_signal_v[]; // accum values after voltage conversion
|
||||||
|
real reference_signal_v[]; // reference signal voltage values
|
||||||
|
real nrmse, pearson, max_err; // error and correlation metrics
|
||||||
|
|
||||||
|
if (use_reset) begin
|
||||||
|
dut_soft_reset(ctrl_vif);
|
||||||
|
#100;
|
||||||
|
end
|
||||||
|
|
||||||
|
dut_send_system_config(
|
||||||
|
.vif(ctrl_vif),
|
||||||
|
.pulse_width(pulse_width),
|
||||||
|
.pulse_period(pulse_period),
|
||||||
|
.pulse_num(pulse_num),
|
||||||
|
.pulse_height(pulse_height),
|
||||||
|
.pulse_period_adc(pulse_period_adc),
|
||||||
|
.window_size(window_size)
|
||||||
|
);
|
||||||
|
#100;
|
||||||
|
|
||||||
|
dut_start(ctrl_vif);
|
||||||
|
|
||||||
|
dut_read_output(
|
||||||
|
.vif(accum_vif),
|
||||||
|
.sample_num(pulse_period_adc),
|
||||||
|
.window_size(window_size),
|
||||||
|
.randomize_recv_delays(rand_recv_delays),
|
||||||
|
.output_data(output_data)
|
||||||
|
);
|
||||||
|
// actual size of payload is pulse_period_adc / window_size
|
||||||
|
output_signal_v = new[pulse_period_adc / window_size];
|
||||||
|
|
||||||
|
`ifdef DEBUG
|
||||||
|
$display("[TB] Output data stream");
|
||||||
|
display_array(output_data);
|
||||||
|
`endif
|
||||||
|
|
||||||
|
// voltage conversion
|
||||||
|
begin
|
||||||
|
// zero level for partial sum
|
||||||
|
real zero_level_bias = window_size * virtual_adc.ZERO_CODE;
|
||||||
|
// common voltage multiplier for step & amplifier
|
||||||
|
real voltage_multiplier = virtual_adc.VOLTAGE_STEP / virtual_adc.VOLTAGE_GAIN;
|
||||||
|
// array conversion
|
||||||
|
foreach (output_signal_v[i]) begin
|
||||||
|
real average_code_per_pulse = real'(output_data[i]) / pulse_num;
|
||||||
|
output_signal_v[i] = (average_code_per_pulse - zero_level_bias) * voltage_multiplier;
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
|
reference_signal(
|
||||||
|
.pulse_width(pulse_width),
|
||||||
|
.pulse_height(pulse_height),
|
||||||
|
.pulse_period_adc(pulse_period_adc),
|
||||||
|
.window_size(window_size),
|
||||||
|
.result(reference_signal_v)
|
||||||
|
);
|
||||||
|
|
||||||
|
`ifdef DEBUG
|
||||||
|
$display("[TB] Output signal");
|
||||||
|
display_array_f(output_signal_v);
|
||||||
|
$display("[TB] Reference signal");
|
||||||
|
display_array_f(reference_signal_v);
|
||||||
|
`endif
|
||||||
|
|
||||||
|
nrmse = calc_nrmse(output_signal_v, reference_signal_v);
|
||||||
|
pearson = calc_pearson(output_signal_v, reference_signal_v);
|
||||||
|
max_err = calc_max_error(output_signal_v, reference_signal_v);
|
||||||
|
|
||||||
|
`ifdef DEBUG
|
||||||
|
$display("[TB] Metrics:\n\tNRMSE = %0.4f\t|\tPearson = %0.4f\t|\tMax error = %0.4f", nrmse, pearson, max_err);
|
||||||
|
`endif
|
||||||
|
|
||||||
|
// check metrics
|
||||||
|
result = 0;
|
||||||
|
// if (pearson < PEARSON_THRESHOLD)
|
||||||
|
// result += 1;
|
||||||
|
if (nrmse > NRMSE_THRESHOLD)
|
||||||
|
result += 2;
|
||||||
|
/*
|
||||||
|
Max error not used in evaluation because of fast pulse edge falling
|
||||||
|
resulting in plain difference between active signal level and zero level
|
||||||
|
For ex.: zero_level = 0x00 = -5V. pulse_height = 2^14-1 = 0x3fff = 5V
|
||||||
|
In some cases like jitter this may cause max error = 5 - (-5) = 10(V)
|
||||||
|
This cases are hardly traceble, thus max error not used in eval.
|
||||||
|
|
||||||
|
Pearson not used in evaluation because it only shows correlation of changing signals. Tests broke on static signals.
|
||||||
|
|
||||||
|
Pearson and max err remain in test for info.
|
||||||
|
*/
|
||||||
|
endtask
|
||||||
|
|
||||||
//------------------------------------------------------------
|
//------------------------------------------------------------
|
||||||
// ОСНОВНОЙ ПРОЦЕСС ТЕСТИРОВАНИЯ
|
// ОСНОВНОЙ ПРОЦЕСС ТЕСТИРОВАНИЯ
|
||||||
//------------------------------------------------------------
|
//------------------------------------------------------------
|
||||||
initial begin
|
initial begin
|
||||||
int output_data[];
|
int result_flag;
|
||||||
|
int total_failed_tests = 0, total_tests = 0;
|
||||||
|
|
||||||
automatic virtual axis_if.tb control_vif = axis_control_if.tb;
|
automatic virtual axis_if.tb control_vif = axis_control_if.tb;
|
||||||
automatic virtual axis_if.tb accumulator_vif = axis_accumulator_if.tb;
|
automatic virtual axis_if.tb accumulator_vif = axis_accumulator_if.tb;
|
||||||
|
|
||||||
$display("[TB] DUT initializaton");
|
$info("[TB] DUT initializaton");
|
||||||
// Инициализация
|
// Инициализация
|
||||||
request_ready = 0;
|
request_ready = 0;
|
||||||
rst_n = 0;
|
rst_n = 0;
|
||||||
@@ -334,39 +656,138 @@ module reflectometer_tb;
|
|||||||
rst_n = 1;
|
rst_n = 1;
|
||||||
wait(mmcm_locked === 1'b1);
|
wait(mmcm_locked === 1'b1);
|
||||||
#150;
|
#150;
|
||||||
$display("[TB] MMCM locked");
|
$info("[TB] MMCM locked");
|
||||||
|
|
||||||
dut_soft_reset(control_vif);
|
// Meause periods because actual values hardcoded in IP
|
||||||
#100;
|
fork
|
||||||
|
`MEASURE_CLK(DUT.clk_sampler, CLK_ADC_PERIOD);
|
||||||
|
`MEASURE_CLK(DUT.clk_generator, CLK_DAC_PERIOD);
|
||||||
|
join
|
||||||
|
$info("[TB] ADC & DAC clock periods measured: ADC_period = %0.3f, DAC_period = %0.3f", CLK_ADC_PERIOD, CLK_DAC_PERIOD);
|
||||||
|
|
||||||
// Тесты
|
// Тесты
|
||||||
$display("[TB] Tests start");
|
$info("[TB] Tests start");
|
||||||
dut_send_system_config(
|
$info("[TB] Simple test run");
|
||||||
.vif(control_vif),
|
run_test_case(
|
||||||
.pulse_width(32'd123),
|
.ctrl_vif(control_vif),
|
||||||
.pulse_period(32'd5000),
|
.accum_vif(accumulator_vif),
|
||||||
.pulse_num(16'd1),
|
.pulse_width(4000),
|
||||||
.pulse_height(14'd15000), // 0V
|
.pulse_period(10000),
|
||||||
.pulse_period_adc(32'd2600),
|
.pulse_num(5),
|
||||||
.window_size(1)
|
.pulse_height(12000),
|
||||||
|
.pulse_period_adc(6000),
|
||||||
|
.window_size(10),
|
||||||
|
.rand_recv_delays(1),
|
||||||
|
.use_reset(1),
|
||||||
|
.result(result_flag)
|
||||||
);
|
);
|
||||||
#100;
|
`ERR_CHECK
|
||||||
dut_start(control_vif);
|
|
||||||
|
|
||||||
dut_read_output(
|
$info("[TB] Random test run");
|
||||||
.vif(accumulator_vif),
|
for (int i = 0; i < TEST_NUM; i++) begin
|
||||||
.sample_num(2600),
|
int pulse_width, pulse_period, pulse_num, pulse_height, pulse_period_adc, window_size;
|
||||||
.randomize_recv_delays(0),
|
bit rand_recv_delays, use_reset;
|
||||||
.output_data(output_data)
|
|
||||||
|
// Генерируемые параметры
|
||||||
|
pulse_period = $urandom_range(500, 5000);
|
||||||
|
pulse_width = $urandom_range(50, pulse_period);
|
||||||
|
pulse_num = $urandom_range(1, 10);
|
||||||
|
pulse_height = $urandom_range(0, 2**DAC_DATA_WIDTH-1);
|
||||||
|
window_size = $urandom_range(1, 11);
|
||||||
|
pulse_period_adc = $urandom_range(50, N_MAX-1) * window_size;
|
||||||
|
rand_recv_delays = 1;
|
||||||
|
use_reset = 1; // ($urandom_range(0, 10) >= 9);
|
||||||
|
|
||||||
|
$display("Test #%0d", total_tests);
|
||||||
|
`ifdef DEBUG
|
||||||
|
$display("Parameters:\n\tpulse_width=%0d\n\tpulse_period=%0d\n\tpulse_num=%0d\n\tpulse_height=%0d\n\tpulse_period_adc=%0d\n\twindow_size=%0d\n\trand_recv_delays=%0d\n\tuse_reset=%0d",
|
||||||
|
pulse_width, pulse_period, pulse_num, pulse_height, pulse_period_adc, window_size, rand_recv_delays, use_reset);
|
||||||
|
`endif
|
||||||
|
|
||||||
|
run_test_case(
|
||||||
|
.ctrl_vif(control_vif),
|
||||||
|
.accum_vif(accumulator_vif),
|
||||||
|
.pulse_width(pulse_width),
|
||||||
|
.pulse_period(pulse_period),
|
||||||
|
.pulse_num(pulse_num),
|
||||||
|
.pulse_height(pulse_height),
|
||||||
|
.pulse_period_adc(pulse_period_adc),
|
||||||
|
.window_size(window_size),
|
||||||
|
.rand_recv_delays(rand_recv_delays),
|
||||||
|
.use_reset(use_reset),
|
||||||
|
.result(result_flag)
|
||||||
);
|
);
|
||||||
#1000;
|
|
||||||
|
|
||||||
$display("Received %0d numbers", output_data.size());
|
`ERR_CHECK
|
||||||
for (int i = 0; i < output_data.size(); i++) begin
|
if (result_flag) begin
|
||||||
$write("%0d ", output_data[i]);
|
$display("Parameters:\n\tpulse_width=%0d\n\tpulse_period=%0d\n\tpulse_num=%0d\n\tpulse_height=%0d\n\tpulse_period_adc=%0d\n\twindow_size=%0d\n\trand_recv_delays=%0d\n\tuse_reset=%0d",
|
||||||
|
pulse_width, pulse_period, pulse_num, pulse_height, pulse_period_adc, window_size, rand_recv_delays, use_reset);
|
||||||
|
end
|
||||||
end
|
end
|
||||||
$display("");
|
|
||||||
|
|
||||||
|
$info("[TB] Corner case test run");
|
||||||
|
run_test_case(
|
||||||
|
.ctrl_vif(control_vif),
|
||||||
|
.accum_vif(accumulator_vif),
|
||||||
|
.pulse_width(0),
|
||||||
|
.pulse_period(1000),
|
||||||
|
.pulse_num(5),
|
||||||
|
.pulse_height(12000),
|
||||||
|
.pulse_period_adc(600),
|
||||||
|
.window_size(10),
|
||||||
|
.rand_recv_delays(0),
|
||||||
|
.use_reset(1),
|
||||||
|
.result(result_flag)
|
||||||
|
);
|
||||||
|
`ERR_CHECK
|
||||||
|
|
||||||
|
run_test_case(
|
||||||
|
.ctrl_vif(control_vif),
|
||||||
|
.accum_vif(accumulator_vif),
|
||||||
|
.pulse_width(1000),
|
||||||
|
.pulse_period(1000),
|
||||||
|
.pulse_num(5),
|
||||||
|
.pulse_height(12000),
|
||||||
|
.pulse_period_adc(600),
|
||||||
|
.window_size(10),
|
||||||
|
.rand_recv_delays(0),
|
||||||
|
.use_reset(1),
|
||||||
|
.result(result_flag)
|
||||||
|
);
|
||||||
|
`ERR_CHECK
|
||||||
|
|
||||||
|
run_test_case(
|
||||||
|
.ctrl_vif(control_vif),
|
||||||
|
.accum_vif(accumulator_vif),
|
||||||
|
.pulse_width(500),
|
||||||
|
.pulse_period(1000),
|
||||||
|
.pulse_num(5),
|
||||||
|
.pulse_height(2**(DAC_DATA_WIDTH-1)),
|
||||||
|
.pulse_period_adc(600),
|
||||||
|
.window_size(10),
|
||||||
|
.rand_recv_delays(0),
|
||||||
|
.use_reset(1),
|
||||||
|
.result(result_flag)
|
||||||
|
);
|
||||||
|
`ERR_CHECK
|
||||||
|
|
||||||
|
run_test_case(
|
||||||
|
.ctrl_vif(control_vif),
|
||||||
|
.accum_vif(accumulator_vif),
|
||||||
|
.pulse_width(500),
|
||||||
|
.pulse_period(1000),
|
||||||
|
.pulse_num(5),
|
||||||
|
.pulse_height(15000),
|
||||||
|
.pulse_period_adc(10),
|
||||||
|
.window_size(1),
|
||||||
|
.rand_recv_delays(0),
|
||||||
|
.use_reset(1),
|
||||||
|
.result(result_flag)
|
||||||
|
);
|
||||||
|
`ERR_CHECK
|
||||||
|
|
||||||
|
$display("[TB] Tests done. [%0d/%0d] tests passed, %0d failed", total_tests - total_failed_tests, total_tests, total_failed_tests);
|
||||||
|
if (!total_failed_tests)
|
||||||
$display("[TB] ALL PASSED");
|
$display("[TB] ALL PASSED");
|
||||||
$finish;
|
$finish;
|
||||||
end
|
end
|
||||||
|
|||||||
Reference in New Issue
Block a user