diff --git a/constraints/ax7a035b.xdc b/constraints/ax7a035b.xdc
index cc95540..eab5c62 100644
--- a/constraints/ax7a035b.xdc
+++ b/constraints/ax7a035b.xdc
@@ -58,67 +58,40 @@ set_property SLEW FAST [get_ports rgmii_txctl]
 set_property SLEW FAST [get_ports {rgmii_txd[*]}]
 create_clock -period 8.000 [get_ports rgmii_rxc]
 
-# === ADC an9238 (J11 header) ===
-set_property PACKAGE_PIN G21 [get_ports ch2_clk]
-set_property PACKAGE_PIN G22 [get_ports ch2_data[0]]
-set_property PACKAGE_PIN C22 [get_ports ch2_data[1]]
-set_property PACKAGE_PIN B22 [get_ports ch2_data[2]]
-set_property PACKAGE_PIN F19 [get_ports ch2_data[3]]
-set_property PACKAGE_PIN F20 [get_ports ch2_data[4]]
-set_property PACKAGE_PIN D20 [get_ports ch2_data[5]]
-set_property PACKAGE_PIN C20 [get_ports ch2_data[6]]
-set_property PACKAGE_PIN A18 [get_ports ch2_data[7]]
-set_property PACKAGE_PIN A19 [get_ports ch2_data[8]]
-set_property PACKAGE_PIN B20 [get_ports ch2_data[9]]
-set_property PACKAGE_PIN A20 [get_ports ch2_data[10]]
-set_property PACKAGE_PIN F18 [get_ports ch2_data[11]]
-set_property PACKAGE_PIN E18 [get_ports ch2_otr]
-set_property PACKAGE_PIN C18 [get_ports ch1_data[1]]
-set_property PACKAGE_PIN C19 [get_ports ch1_data[0]]
-set_property PACKAGE_PIN B17 [get_ports ch1_data[3]]
-set_property PACKAGE_PIN B18 [get_ports ch1_data[2]]
-set_property PACKAGE_PIN D17 [get_ports ch1_data[5]]
-set_property PACKAGE_PIN C17 [get_ports ch1_data[4]]
-set_property PACKAGE_PIN A15 [get_ports ch1_data[7]]
-set_property PACKAGE_PIN A16 [get_ports ch1_data[6]]
-set_property PACKAGE_PIN B15 [get_ports ch1_data[9]]
-set_property PACKAGE_PIN B16 [get_ports ch1_data[8]]
-set_property PACKAGE_PIN A13 [get_ports ch1_data[11]]
-set_property PACKAGE_PIN A14 [get_ports ch1_data[10]]
-set_property PACKAGE_PIN E16 [get_ports ch1_clk]
-set_property PACKAGE_PIN D16 [get_ports ch1_otr]
-
-set_property IOSTANDARD LVCMOS33 [get_ports ch2_clk]
-set_property IOSTANDARD LVCMOS33 [get_ports {ch2_data[*]}]
-set_property IOSTANDARD LVCMOS33 [get_ports ch2_otr]
-set_property IOSTANDARD LVCMOS33 [get_ports {ch1_data[*]}]
-set_property IOSTANDARD LVCMOS33 [get_ports ch1_clk]
-set_property IOSTANDARD LVCMOS33 [get_ports ch1_otr]
-
-set_property SLEW FAST [get_ports {ch2_clk ch1_clk}]
-
-# === DAC an9767 (J13 header) ===
-set_property PACKAGE_PIN AA9 [get_ports p2_clk]
-set_property PACKAGE_PIN AB10 [get_ports p2_wrt]
-set_property PACKAGE_PIN U16 [get_ports p2_data[13]]
-set_property PACKAGE_PIN T16 [get_ports p2_data[12]]
-set_property PACKAGE_PIN AA13 [get_ports p2_data[11]]
-set_property PACKAGE_PIN AB13 [get_ports p2_data[10]]
-set_property PACKAGE_PIN AB11 [get_ports p2_data[9]]
-set_property PACKAGE_PIN AB12 [get_ports p2_data[8]]
-set_property PACKAGE_PIN Y13 [get_ports p2_data[7]]
-set_property PACKAGE_PIN AA14 [get_ports p2_data[6]]
-set_property PACKAGE_PIN W14 [get_ports p2_data[5]]
-set_property PACKAGE_PIN Y14 [get_ports p2_data[4]]
-set_property PACKAGE_PIN Y16 [get_ports p2_data[3]]
-set_property PACKAGE_PIN AA16 [get_ports p2_data[2]]
-set_property PACKAGE_PIN AB16 [get_ports p2_data[1]]
-set_property PACKAGE_PIN AB17 [get_ports p2_data[0]]
-
+# === DAC (J11 header) ===
 set_property IOSTANDARD LVCMOS33 [get_ports p2_clk]
 set_property IOSTANDARD LVCMOS33 [get_ports p2_wrt]
-set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[*]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[13]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[12]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[11]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[10]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[9]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[8]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[7]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[6]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[5]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[4]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[2]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[0]}]
 
-set_property SLEW FAST [get_ports {p2_clk}]
+set_property SLEW FAST [get_ports p2_clk]
 
+set_property PACKAGE_PIN C18 [get_ports p2_clk]
+set_property PACKAGE_PIN C19 [get_ports p2_wrt]
+set_property PACKAGE_PIN B17 [get_ports {p2_data[13]}]
+set_property PACKAGE_PIN B18 [get_ports {p2_data[12]}]
+set_property PACKAGE_PIN D17 [get_ports {p2_data[11]}]
+set_property PACKAGE_PIN C17 [get_ports {p2_data[10]}]
+set_property PACKAGE_PIN A15 [get_ports {p2_data[9]}]
+set_property PACKAGE_PIN A16 [get_ports {p2_data[8]}]
+set_property PACKAGE_PIN B15 [get_ports {p2_data[7]}]
+set_property PACKAGE_PIN B16 [get_ports {p2_data[6]}]
+set_property PACKAGE_PIN A13 [get_ports {p2_data[5]}]
+set_property PACKAGE_PIN A14 [get_ports {p2_data[4]}]
+set_property PACKAGE_PIN E16 [get_ports {p2_data[3]}]
+set_property PACKAGE_PIN D16 [get_ports {p2_data[2]}]
+set_property PACKAGE_PIN C14 [get_ports {p2_data[1]}]
+set_property PACKAGE_PIN C15 [get_ports {p2_data[0]}]