baulin.fa/reflectometer_fpga_project
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upd: DUT fully working. TB tests WIP

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Zer0Nu11
2026-07-16 22:45:21 +03:00
parent 71b825ef2c
commit ef65dd1a97
1 changed files with 30 additions and 8 deletions
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38
designs/reflectometer_base/reflectometer_tb.sv
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@ -17,7 +17,7 @@ module reflectometer_tb;
localparam WINDOW_SIZE = 65; // fixed subwindow size to average by time localparam WINDOW_SIZE = 65; // fixed subwindow size to average by time
localparam PACKET_SIZE = 1024; // bytes per UDP packet localparam PACKET_SIZE = 1024; // bytes per UDP packet
localparam ZERO_LEVEL = LOGIC_ZERO_LEVEL; // "logic" VS "true" localparam ZERO_LEVEL = VOLTAGE_ZERO_LEVEL; // "logic" VS "true"
localparam CLK_ETH_PHY_PERIOD = 8.000; // 125 MHz localparam CLK_ETH_PHY_PERIOD = 8.000; // 125 MHz
localparam CLK_REF_PERIOD = 5.000; // 200 MHz localparam CLK_REF_PERIOD = 5.000; // 200 MHz
@ -59,8 +59,8 @@ module reflectometer_tb;
wire [DAC_DATA_WIDTH-1:0] dac_data; wire [DAC_DATA_WIDTH-1:0] dac_data;
// ADC интерфейс // ADC интерфейс
wire clk_adc; wire clk_adc;
wire adc_otr = 1'b0; wire adc_otr;
wire [ADC_DATA_WIDTH-1:0] adc_data = '0; wire [ADC_DATA_WIDTH-1:0] adc_data;
// Интерфейс хендшейка с MAC-PHY // Интерфейс хендшейка с MAC-PHY
wire send_request; wire send_request;
logic request_ready = 1'b0; logic request_ready = 1'b0;
@ -189,6 +189,7 @@ module reflectometer_tb;
// ОСНОВНОЙ ПРОЦЕСС ТЕСТИРОВАНИЯ // ОСНОВНОЙ ПРОЦЕСС ТЕСТИРОВАНИЯ
//------------------------------------------------------------ //------------------------------------------------------------
initial begin initial begin
logic [7:0] rx_packet[];
automatic virtual axis_if.tb control_vif = axis_control_if.tb; automatic virtual axis_if.tb control_vif = axis_control_if.tb;
automatic virtual axis_if.tb accumulator_vif = axis_accumulator_if.tb; automatic virtual axis_if.tb accumulator_vif = axis_accumulator_if.tb;
@ -199,22 +200,43 @@ module reflectometer_tb;
#100; #100;
rst_n = 1; rst_n = 1;
wait(mmcm_locked === 1'b1); wait(mmcm_locked === 1'b1);
#10; #150;
$display("[TB] MMCM locked"); $display("[TB] MMCM locked");
dut_soft_reset(control_vif); dut_soft_reset(control_vif);
#100; #100;
dut_send_system_config( dut_send_system_config(
.vif(control_vif), .vif(control_vif),
.pulse_width(32'd350), .pulse_width(32'd12345),
.pulse_period(32'd1250), .pulse_period(32'd50000),
.pulse_num(16'd10), .pulse_num(16'd10),
.pulse_height(14'd14000), // 0V .pulse_height(14'd16000), // 0V
.pulse_period_adc(32'd650) .pulse_period_adc(32'd26000)
); );
#100; #100;
dut_start(control_vif); dut_start(control_vif);
#1000;
request_ready = 1'b1;
accumulator_vif.slave_recv(rx_packet);
$display("receive %0d bytes", rx_packet.size());
for (int i = 0; i < rx_packet.size(); i+=4) begin
$write("%0d ", {rx_packet[i], rx_packet[i+1], rx_packet[i+2], rx_packet[i+3]});
end
$display("");
#1000;
request_ready = 1'b1;
accumulator_vif.slave_recv(rx_packet);
$display("receive %0d bytes", rx_packet.size());
for (int i = 0; i < rx_packet.size(); i+=4) begin
$write("%0d ", {rx_packet[i], rx_packet[i+1], rx_packet[i+2], rx_packet[i+3]});
end
$display("");
// wait();
// #100000;
// #93000;
// rst_n = 0;
#10000
$display("[TB] ALL PASSED"); $display("[TB] ALL PASSED");
$finish; $finish;
end end