tests: update testbench for controller reg map

2026-07-14 16:34:35 +03:00
parent 984461afc0
commit e467700368
3 changed files with 150 additions and 19 deletions
--- a/rtl/controller/src/axi4l_reg_map_controller.sv
+++ b/rtl/controller/src/axi4l_reg_map_controller.sv
@ -51,7 +51,7 @@ module axi4l_reg_map_controller #(
  input  logic        busy_i,
  input  logic [7:0]  error_code_i
 );
-  import axi4l_reg_map_example_pkg::*;
+  import axi4l_reg_map_controller_pkg::*;
  localparam int unsigned N_REGS = AXI4L_REG_MAP_EXAMPLE_N_REGS;

  logic [N_REGS-1:0][31:0] reg_i;