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chore: update constraints to debug ADC + simple DAC

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Phil
2026-04-28 16:58:36 +03:00
parent b7409534ed
commit d68c22211d
1 changed files with 74 additions and 33 deletions
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107
constraints/ax7a035b.xdc
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@ -59,39 +59,80 @@ set_property SLEW FAST [get_ports {rgmii_txd[*]}]
create_clock -period 8.000 [get_ports rgmii_rxc]
# === DAC (J11 header) ===
set_property IOSTANDARD LVCMOS33 [get_ports p2_clk]
set_property IOSTANDARD LVCMOS33 [get_ports p2_wrt]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[13]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[12]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[11]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[10]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[9]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[8]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[0]}]
#set_property IOSTANDARD LVCMOS33 [get_ports p2_clk]
#set_property IOSTANDARD LVCMOS33 [get_ports p2_wrt]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[13]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[12]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[11]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[10]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[9]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[8]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[7]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[6]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[5]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[4]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[3]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[2]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[1]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {p2_data[0]}]
set_property SLEW FAST [get_ports p2_clk]
#set_property SLEW FAST [get_ports p2_clk]
set_property PACKAGE_PIN C18 [get_ports p2_clk]
set_property PACKAGE_PIN C19 [get_ports p2_wrt]
set_property PACKAGE_PIN B17 [get_ports {p2_data[13]}]
set_property PACKAGE_PIN B18 [get_ports {p2_data[12]}]
set_property PACKAGE_PIN D17 [get_ports {p2_data[11]}]
set_property PACKAGE_PIN C17 [get_ports {p2_data[10]}]
set_property PACKAGE_PIN A15 [get_ports {p2_data[9]}]
set_property PACKAGE_PIN A16 [get_ports {p2_data[8]}]
set_property PACKAGE_PIN B15 [get_ports {p2_data[7]}]
set_property PACKAGE_PIN B16 [get_ports {p2_data[6]}]
set_property PACKAGE_PIN A13 [get_ports {p2_data[5]}]
set_property PACKAGE_PIN A14 [get_ports {p2_data[4]}]
set_property PACKAGE_PIN E16 [get_ports {p2_data[3]}]
set_property PACKAGE_PIN D16 [get_ports {p2_data[2]}]
set_property PACKAGE_PIN C14 [get_ports {p2_data[1]}]
set_property PACKAGE_PIN C15 [get_ports {p2_data[0]}]
#set_property PACKAGE_PIN C18 [get_ports p2_clk]
#set_property PACKAGE_PIN C19 [get_ports p2_wrt]
#set_property PACKAGE_PIN B17 [get_ports {p2_data[13]}]
#set_property PACKAGE_PIN B18 [get_ports {p2_data[12]}]
#set_property PACKAGE_PIN D17 [get_ports {p2_data[11]}]
#set_property PACKAGE_PIN C17 [get_ports {p2_data[10]}]
#set_property PACKAGE_PIN A15 [get_ports {p2_data[9]}]
#set_property PACKAGE_PIN A16 [get_ports {p2_data[8]}]
#set_property PACKAGE_PIN B15 [get_ports {p2_data[7]}]
#set_property PACKAGE_PIN B16 [get_ports {p2_data[6]}]
#set_property PACKAGE_PIN A13 [get_ports {p2_data[5]}]
#set_property PACKAGE_PIN A14 [get_ports {p2_data[4]}]
#set_property PACKAGE_PIN E16 [get_ports {p2_data[3]}]
#set_property PACKAGE_PIN D16 [get_ports {p2_data[2]}]
#set_property PACKAGE_PIN C14 [get_ports {p2_data[1]}]
#set_property PACKAGE_PIN C15 [get_ports {p2_data[0]}]
# === ADC an9238 (J11 header) ===
set_property PACKAGE_PIN G21 [get_ports ch2_clk]
set_property PACKAGE_PIN G22 [get_ports ch2_data[0]]
set_property PACKAGE_PIN C22 [get_ports ch2_data[1]]
set_property PACKAGE_PIN B22 [get_ports ch2_data[2]]
set_property PACKAGE_PIN F19 [get_ports ch2_data[3]]
set_property PACKAGE_PIN F20 [get_ports ch2_data[4]]
set_property PACKAGE_PIN D20 [get_ports ch2_data[5]]
set_property PACKAGE_PIN C20 [get_ports ch2_data[6]]
set_property PACKAGE_PIN A18 [get_ports ch2_data[7]]
set_property PACKAGE_PIN A19 [get_ports ch2_data[8]]
set_property PACKAGE_PIN B20 [get_ports ch2_data[9]]
set_property PACKAGE_PIN A20 [get_ports ch2_data[10]]
set_property PACKAGE_PIN F18 [get_ports ch2_data[11]]
set_property PACKAGE_PIN E18 [get_ports ch2_otr]
set_property PACKAGE_PIN C18 [get_ports ch1_data[1]]
set_property PACKAGE_PIN C19 [get_ports ch1_data[0]]
set_property PACKAGE_PIN B17 [get_ports ch1_data[3]]
set_property PACKAGE_PIN B18 [get_ports ch1_data[2]]
set_property PACKAGE_PIN D17 [get_ports ch1_data[5]]
set_property PACKAGE_PIN C17 [get_ports ch1_data[4]]
set_property PACKAGE_PIN A15 [get_ports ch1_data[7]]
set_property PACKAGE_PIN A16 [get_ports ch1_data[6]]
set_property PACKAGE_PIN B15 [get_ports ch1_data[9]]
set_property PACKAGE_PIN B16 [get_ports ch1_data[8]]
set_property PACKAGE_PIN A13 [get_ports ch1_data[11]]
set_property PACKAGE_PIN A14 [get_ports ch1_data[10]]
set_property PACKAGE_PIN E16 [get_ports ch1_clk]
set_property PACKAGE_PIN D16 [get_ports ch1_otr]
set_property IOSTANDARD LVCMOS33 [get_ports ch2_clk]
set_property IOSTANDARD LVCMOS33 [get_ports {ch2_data[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports ch2_otr]
set_property IOSTANDARD LVCMOS33 [get_ports {ch1_data[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports ch1_clk]
set_property IOSTANDARD LVCMOS33 [get_ports ch1_otr]
# 1 bit DAC)))
set_property PACKAGE_PIN E17 [get_ports debug_dac]
set_property IOSTANDARD LVCMOS33 [get_ports debug_dac]