From b9c75b823fba741f201e95e91284a428efaba0fd Mon Sep 17 00:00:00 2001 From: Phil Date: Fri, 17 Apr 2026 14:42:20 +0300 Subject: [PATCH] fix: generator wrt signal incorrect clocking --- rtl/generator/src/generator.sv | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/rtl/generator/src/generator.sv b/rtl/generator/src/generator.sv index cbb7109..902ad22 100644 --- a/rtl/generator/src/generator.sv +++ b/rtl/generator/src/generator.sv @@ -92,8 +92,12 @@ module generator end end end + + OBUF OBUF_pulse_clk ( + .I(clk_in), + .O(pulse) + ); assign pulse_height_out = pulse_height_out_reg; - assign pulse = pulse_reg; endmodule