From 691e69693a21f787fe317ff52d2df9de19270fe4 Mon Sep 17 00:00:00 2001
From: Phil <fabaulin_2@edu.hse.ru>
Date: Tue, 14 Jul 2026 16:48:45 +0300
Subject: [PATCH] infra: update makefile for cocotb

---
 rtl/controller/tests/Makefile | 80 +++++++++++++++--------------------
 1 file changed, 34 insertions(+), 46 deletions(-)

diff --git a/rtl/controller/tests/Makefile b/rtl/controller/tests/Makefile
index b30048a..e3af5e4 100644
--- a/rtl/controller/tests/Makefile
+++ b/rtl/controller/tests/Makefile
@@ -1,52 +1,40 @@
-# SPDX-License-Identifier: MIT
-#
-# Copyright (c) 2025 FPGA Ninja, LLC
-#
-# Authors:
-# - Alex Forencich
-#
+TOPLEVEL_LANG = verilog
+SIM ?= verilator
 
-# FPGA settings
-FPGA_PART = xc7a35tfgg484-1
-FPGA_TOP = control
-FPGA_ARCH = artix7
+PWD := $(shell pwd)
 
-RTL_DIR = ../src
+RTL_DIR = $(PWD)/../src
+LIBS_DIR = $(PWD)/../../../external/rtl_libs
+
+VERILOG_SOURCES += $(LIBS_DIR)/axi/rtl/axi_pkg.sv
+VERILOG_SOURCES += $(LIBS_DIR)/axi/rtl/axi_if.sv
+VERILOG_SOURCES += $(LIBS_DIR)/axi/rtl/axi4l_flat_to_if.sv
+VERILOG_SOURCES += $(LIBS_DIR)/axi/rtl/axi4l_if_to_flat.sv
+VERILOG_SOURCES += $(LIBS_DIR)/axi/axi_reg/axi4l_reg_map.sv
+VERILOG_SOURCES += $(RTL_DIR)/controller.sv
+VERILOG_SOURCES += $(RTL_DIR)/dma_controller.sv
+VERILOG_SOURCES += $(RTL_DIR)/shaper_axis_desc.sv
+VERILOG_SOURCES += $(RTL_DIR)/shaper_axis_status.sv
+VERILOG_SOURCES += $(RTL_DIR)/controller_wrapper_axil.sv
+VERILOG_SOURCES += $(RTL_DIR)/axi4l_reg_map_controller_pkg.sv
+VERILOG_SOURCES += $(RTL_DIR)/axi4l_reg_map_controller.sv
+VERILOG_SOURCES += $(PWD)/tb_controller_wrapper_axil.sv
+
+TOPLEVEL = tb_controller_wrapper_axil
+MODULE = test_controller
 
 
-include ../../../scripts/vivado.mk
-
-SYN_FILES += $(sort $(shell find ../src -type f \( -name '*.v' -o -name '*.sv' \)))
-
-XCI_FILES = $(sort $(shell find ../src -type f -name '*.xci'))
-
-XDC_FILES += ../../../constraints/ax7a035b.xdc
-XDC_FILES += test_timing.xdc
-
-SYN_FILES += controller_tb.sv
-SIM_TOP = control_tb
+ifeq ($(SIM),verilator)
+    EXTRA_ARGS += --trace --trace-structs
+    EXTRA_ARGS += -I$(LIBS_DIR)/axi/rtl/
+    COMPILE_ARGS += -Wno-fatal
+    COMPILE_ARGS += -I$(LIBS_DIR)/axi/rtl/
+    EXTRA_ARGS += --trace
+    EXTRA_ARGS += --trace-structs
+    EXTRA_ARGS += --public-flat-rw
+    EXTRA_ARGS += -Wno-fatal
+    EXTRA_ARGS += --timing
+endif
 
 
-program: $(PROJECT).bit
-	echo "open_hw_manager" > program.tcl
-	echo "connect_hw_server" >> program.tcl
-	echo "open_hw_target" >> program.tcl
-	echo "current_hw_device [lindex [get_hw_devices] 0]" >> program.tcl
-	echo "refresh_hw_device -update_hw_probes false [current_hw_device]" >> program.tcl
-	echo "set_property PROGRAM.FILE {$(PROJECT).bit} [current_hw_device]" >> program.tcl
-	echo "program_hw_devices [current_hw_device]" >> program.tcl
-	echo "exit" >> program.tcl
-	vivado -nojournal -nolog -mode batch -source program.tcl
-
-$(PROJECT).mcs $(PROJECT).prm: $(PROJECT).bit
-	echo "write_cfgmem -force -format mcs -size 16 -interface SPIx4 -loadbit {up 0x0000000 $*.bit} -checksum -file $*.mcs" > generate_mcs.tcl
-	echo "exit" >> generate_mcs.tcl
-	vivado -nojournal -nolog -mode batch -source generate_mcs.tcl
-	mkdir -p rev
-	COUNT=100; \
-	while [ -e rev/$*_rev$$COUNT.bit ]; \
-	do COUNT=$$((COUNT+1)); done; \
-	COUNT=$$((COUNT-1)); \
-	for x in .mcs .prm; \
-	do cp $*$$x rev/$*_rev$$COUNT$$x; \
-	echo "Output: rev/$*_rev$$COUNT$$x"; done;
+include $(shell cocotb-config --makefiles)/Makefile.sim