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little axis desc status correction

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otroubi
2026-07-14 19:07:32 +03:00
parent 8aefa4f3f6
commit 606d1d7f1c
1 changed files with 7 additions and 4 deletions
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11
rtl/controller/src/controller_wrapper_axil.sv
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@ -159,18 +159,21 @@ parameter int unsigned WRITE_STATUS_WIDTH = LEN_WIDTH + TAG_WIDTH + AXIS_ID_WIDT
// CONTROLLER DMA
logic [READ_DESC_WIDTH-1:0] desc_read_cmd;
logic [READ_DESC_WIDTH-1:0] desc_read_cmd, desc_read_cmd_out;
assign desc_read_cmd = { desc_read_config[TAG_WIDTH+AXIS_ID_WIDTH+AXIS_DEST_WIDTH+AXIS_USER_WIDTH-1:0], desc_read_len[LEN_WIDTH-1:0], desc_read_addr[AXI_ADDR_WIDTH-1:0]};
logic [WRITE_DESC_WIDTH-1:0] desc_write_cmd;
logic [WRITE_DESC_WIDTH-1:0] desc_write_cmd, desc_write_cmd_out;
assign desc_write_cmd = {desc_write_len_and_tag[LEN_WIDTH+TAG_WIDTH-1:0],desc_write_addr[AXI_ADDR_WIDTH-1:0]};
logic [READ_STATUS_WIDTH-1:0] status_read_cmd;
logic [READ_STATUS_WIDTH-1:0] status_read_cmd, status_read_cmd_in;
assign status_read_cmd = status_read[READ_STATUS_WIDTH-1:0];
logic [WRITE_STATUS_WIDTH-1:0] status_write_cmd;
logic [WRITE_STATUS_WIDTH-1:0] status_write_cmd, status_write_cmd_in;
assign status_write_cmd = {status_write_config[TAG_WIDTH+AXIS_ID_WIDTH+AXIS_DEST_WIDTH+AXIS_USER_WIDTH+3:0], status_write_len[LEN_WIDTH-1:0]};
logic ready_desc_read, ready_desc_write, ready_status_read, ready_status_write;
logic valid_desc_read, valid_desc_write, valid_status_read, valid_status_write;
dma_controller
#(
.READ_DESC_WIDTH(READ_DESC_WIDTH),