From 57570bea00737e46bfcc204fb93d2ea95ef42bfd Mon Sep 17 00:00:00 2001
From: otroubi <ilianovadasha@gmail.com>
Date: Wed, 6 May 2026 14:41:15 +0300
Subject: [PATCH] rtl: debug synchronizer project constraints

---
 designs/adc_dac_synchoronizer/debug.xdc | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 designs/adc_dac_synchoronizer/debug.xdc

diff --git a/designs/adc_dac_synchoronizer/debug.xdc b/designs/adc_dac_synchoronizer/debug.xdc
new file mode 100644
index 0000000..0dd108b
--- /dev/null
+++ b/designs/adc_dac_synchoronizer/debug.xdc
@@ -0,0 +1,10 @@
+# Primary clocks
+create_clock -name eth_clk -period 8.000  [get_ports dac_clk_in]
+create_clock -name acc_clk -period 15.385  [get_ports adc_clk_in]
+
+
+# Asynchronous clock groups
+
+set_clock_groups -name ASYNC_ETH_ACC -asynchronous \
+    -group [get_clocks eth_clk] \
+    -group [get_clocks acc_clk]
\ No newline at end of file