upd: sampler & TB complete
This commit is contained in:
@ -1,12 +1,17 @@
|
||||
`timescale 1ns / 1ps
|
||||
|
||||
module sampler_tb;
|
||||
|
||||
localparam DATA_WIDTH = 12;
|
||||
localparam PACK_FACTOR = 7;
|
||||
localparam PROCESS_MODE = 0;
|
||||
localparam CLK_PERIOD = 15.3846;
|
||||
localparam OTR_OFFSET = 0;
|
||||
module sampler_tb #(
|
||||
// Параметры тестбенча
|
||||
parameter int DATA_WIDTH = 12, // bitwidth of sampled data. Equal to ADC bitwidth
|
||||
parameter int PACK_FACTOR = 1, // packing of several numbers in one axi-stream tdata transaction
|
||||
parameter bit PROCESS_MODE = 0, // signed (1) / unsigned (0)
|
||||
parameter real CLK_PERIOD = 15.3846,
|
||||
parameter int OTR_OFFSET = 0 // Out of Range offset number clipping
|
||||
);
|
||||
// Вычислимые константы
|
||||
// Диапазон значений семплера
|
||||
localparam int MIN_VALUE = PROCESS_MODE ? -2**(DATA_WIDTH-1) : 0;
|
||||
localparam int MAX_VALUE = PROCESS_MODE ? 2**(DATA_WIDTH-1)-1 : (2**DATA_WIDTH)-1;
|
||||
|
||||
logic clk;
|
||||
logic rst_dut;
|
||||
@ -84,6 +89,7 @@ module sampler_tb;
|
||||
logic [DATA_WIDTH-1:0] input_values[$];
|
||||
logic [DATA_WIDTH-1:0] output_values[$];
|
||||
bit flag;
|
||||
int tmp_input_val, tmp_output_val;
|
||||
|
||||
// Startup sequence
|
||||
rst_gen <= 1;
|
||||
@ -125,32 +131,41 @@ module sampler_tb;
|
||||
// Pop last input value. Signal is ahead of tdata for 1 cycle
|
||||
input_values.pop_back();
|
||||
|
||||
// check data
|
||||
if (input_values.size() != output_values.size()) begin
|
||||
// check data length correct
|
||||
if ((input_values.size() - (input_values.size() % PACK_FACTOR)) != output_values.size()) begin
|
||||
$display("[ERROR] -run_test_case- Input queue size don't equal to output queue size: %0d vs %0d", input_values.size(), output_values.size());
|
||||
$finish;
|
||||
end
|
||||
flag = 0;
|
||||
for (int i = 0; i < input_values.size(); i++) begin
|
||||
$write(" %0d", input_values[i]);
|
||||
if (input_values[i] != output_values[i])
|
||||
for (int i = 0; i < output_values.size(); i++) begin
|
||||
// clip value for OTR
|
||||
tmp_input_val = int'(input_values[i]) + MIN_VALUE;
|
||||
tmp_output_val = PROCESS_MODE ?
|
||||
int'($signed({output_values[i][DATA_WIDTH-1], output_values[i]})) :
|
||||
int'(output_values[i]);
|
||||
|
||||
if ((tmp_input_val < MIN_VALUE + OTR_OFFSET) ||
|
||||
(tmp_input_val > MAX_VALUE - OTR_OFFSET)) begin
|
||||
// need clipping
|
||||
tmp_input_val = ((tmp_input_val - MIN_VALUE) < 2**(DATA_WIDTH-1)) ?
|
||||
MIN_VALUE : MAX_VALUE;
|
||||
end
|
||||
|
||||
if (tmp_input_val != tmp_output_val)
|
||||
flag = 1;
|
||||
end
|
||||
$write("\n");
|
||||
for (int i = 0; i < input_values.size(); i++) begin
|
||||
$write(" %0d", output_values[i]);
|
||||
// $display("Total: %0d", output_values.size());
|
||||
if (flag) begin
|
||||
$display("[ERROR] -run_test_case- Sampled data not correct and not equal to generated signal.");
|
||||
$finish;
|
||||
end
|
||||
$write("\n");
|
||||
$display("Total: %0d", output_values.size());
|
||||
if (flag) $display("FUCK");
|
||||
else $display("SUCKASS");
|
||||
|
||||
endtask
|
||||
|
||||
// =====================================================
|
||||
// MAIN
|
||||
// =====================================================
|
||||
initial begin
|
||||
int random_number;
|
||||
|
||||
$display("\n=== BASIC TEST ===");
|
||||
|
||||
@ -161,11 +176,19 @@ module sampler_tb;
|
||||
rst_dut = 0;
|
||||
repeat(2) @(posedge clk);
|
||||
|
||||
$display("basic test #1");
|
||||
run_test_case(10);
|
||||
run_test_case(100);
|
||||
|
||||
run_test_case(10000);
|
||||
$display("basic test #2");
|
||||
run_test_case(0);
|
||||
|
||||
$display("\n=== RANDOM STRESS TEST ===");
|
||||
// todo
|
||||
for (int i = 0; i < 10; i++) begin
|
||||
$display("Random test #%0d", i);
|
||||
random_number = $urandom_range(0, 3 * 2**(DATA_WIDTH)); // up to 1.5 triangle waves
|
||||
run_test_case(random_number);
|
||||
end
|
||||
|
||||
$display("\n=== TEST FINISHED ===");
|
||||
$finish;
|
||||
|
||||
Reference in New Issue
Block a user