baulin.fa/reflectometer_fpga_project
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infra: make default sim longer

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Phil
2026-04-21 19:46:51 +03:00
parent 21785aaac7
commit 4eb937e13f
1 changed files with 2 additions and 0 deletions
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scripts/vivado.mk
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@ -180,6 +180,8 @@ sim: $(PROJECT).xpr gen_ip
echo "update_compile_order -fileset sources_1" >> run_sim.tcl echo "update_compile_order -fileset sources_1" >> run_sim.tcl
echo "update_compile_order -fileset sim_1" >> run_sim.tcl echo "update_compile_order -fileset sim_1" >> run_sim.tcl
echo "launch_simulation" >> run_sim.tcl echo "launch_simulation" >> run_sim.tcl
echo "run 1000 us" >> run_sim.tcl
echo "quit" >> run_sim.tcl
vivado -mode batch -source run_sim.tcl vivado -mode batch -source run_sim.tcl
simclean: simclean: