transferring new controller design

2026-07-28 12:51:05 +03:00
parent c21c9d2ab5
commit 32076b19f7
10 changed files with 1132 additions and 0 deletions
@@ -0,0 +1,59 @@
+module shaper_axis_status #(
+    parameter int unsigned DATA_WIDTH = 128
+)(
+    input  logic                  clk,
+    input  logic                  rst_n,
+
+    input  logic [DATA_WIDTH-1:0] data_in,
+    input  logic                  take,
+    input  logic                  valid,
+    output logic                  ready,
+
+    output logic                  busy,
+    output logic                  handshake,
+    output logic [DATA_WIDTH-1:0] data_out
+);
+
+typedef enum logic [0:0] {
+    IDLE,
+    WAIT_TAKE
+} wr_state;
+
+wr_state state;
+
+logic [31:0] data_reg;
+
+always @(posedge clk) begin
+    if (!rst_n) begin
+        state      <= IDLE;
+        ready      <= 1'b0;
+        busy       <= 1'b0;
+        handshake  <= 1'b0;
+        data_out   <= '0;
+        data_reg   <= '0;
+    end else begin
+        case (state) 
+        IDLE: begin
+                ready <= 1'b1;
+                if (valid) begin
+                    busy <= 1'b0;
+                    data_reg <= data_in;
+                    handshake <= 1'b1;
+                     state <= WAIT_TAKE;
+                end
+              end
+        WAIT_TAKE: begin
+                        if (take) begin
+                            data_out <= data_reg;
+                            ready <= 1'b0;
+                            handshake <= 1'b0;
+                            busy <= 1'b1;
+                            state <= IDLE;
+                        end
+                    end
+        endcase
+    end
+end
+
+
+endmodule