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rtl: add udp ram data count signal logic

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Phil
2026-04-10 15:35:26 +03:00
parent 879c4d49b2
commit 26c627c988
3 changed files with 15 additions and 12 deletions
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10
rtl/ethernet-udp/src/eth/mac/mac_top.v
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@ -1,8 +1,6 @@
//////////////////////////////////////////////////////////////////////////////////////
//Module Name : mac_top
//Description :
//
//////////////////////////////////////////////////////////////////////////////////////
// Top module for base ethernet operations
// inheireted from Alinx
`timescale 1 ns/1 ns
module mac_top
(
@ -37,6 +35,7 @@ module mac_top
input [10:0] udp_rec_ram_read_addr,
output [15:0] udp_rec_data_length,
output udp_rec_data_valid,
output [11:0] udp_ram_data_count,
output arp_found,
output mac_not_exist
@ -81,6 +80,7 @@ mac_tx_top mac_tx0
.arp_rec_source_ip_addr (arp_rec_source_ip_addr ),
.arp_rec_source_mac_addr (arp_rec_source_mac_addr ),
.arp_request_req (arp_request_req ),
.udp_ram_data_count (udp_ram_data_count ),
.ram_wr_data (ram_wr_data) ,