From 0be4f351521b08870cd08df0a3eb79896ed810ac Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=D0=A4=D0=B8=D0=BB=D0=B8=D0=BF=D0=BF=20=D0=91=D0=B0=D1=83?=
 =?UTF-8?q?=D0=BB=D0=B8=D0=BD?= <baulin.fa@mipt.ru>
Date: Wed, 25 Mar 2026 16:28:35 +0300
Subject: [PATCH] infra: add verilog-ethernet as a submodule

---
 .gitmodules               | 3 +++
 external/verilog-ethernet | 1 +
 2 files changed, 4 insertions(+)
 create mode 100644 .gitmodules
 create mode 160000 external/verilog-ethernet

diff --git a/.gitmodules b/.gitmodules
new file mode 100644
index 0000000..4945f78
--- /dev/null
+++ b/.gitmodules
@@ -0,0 +1,3 @@
+[submodule "external/verilog-ethernet"]
+	path = external/verilog-ethernet
+	url = https://github.com/alexforencich/verilog-ethernet.git
diff --git a/external/verilog-ethernet b/external/verilog-ethernet
new file mode 160000
index 0000000..77320a9
--- /dev/null
+++ b/external/verilog-ethernet
@@ -0,0 +1 @@
+Subproject commit 77320a9471d19c7dd383914bc049e02d9f4f1ffb