fix: encoding issues, generator explicit default state
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@ -27,6 +27,14 @@ module generator
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logic enable, synced;
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initial begin
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cnt_pulse_period = '0;
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cnt_pulse_num = '0;
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enable = 0;
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synced = 0;
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dac_out = ZERO_LEVEL;
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end
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always @(posedge clk_dac) begin
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if (rst) begin
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pulse_height_reg <= ZERO_LEVEL;
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