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test: add full testbenches for accum

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Phil
2026-04-28 11:57:13 +03:00
parent 91eaf6c4f8
commit 002f0cace5
4 changed files with 622 additions and 2 deletions
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5
rtl/accum/tests/Makefile
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@ -8,7 +8,7 @@
# FPGA settings
FPGA_PART = xc7a35tfgg484-1
FPGA_TOP = accum
FPGA_TOP = accumulator_top
FPGA_ARCH = artix7
RTL_DIR = ../src
@ -24,7 +24,8 @@ XDC_FILES += ../../../constraints/ax7a035b.xdc
XDC_FILES += test_timing.xdc
SYN_FILES += out_axis_fifo_tb.sv
SIM_TOP = control_tb
SYN_FILE += accum_full_tb.sv
SIM_TOP = tb_accumulator_top
program: $(PROJECT).bit