This commit is contained in:
awe
2026-04-20 18:01:14 +03:00
parent fe9b0f6165
commit 00dc0e21b7

View File

@ -518,6 +518,10 @@ TickMs tick_count_ms() {
#endif #endif
} }
TickMs elapsed_ms(TickMs now, TickMs start) {
return (now >= start) ? (now - start) : 0U;
}
#ifdef _WIN32 #ifdef _WIN32
volatile LONG g_console_stop_requested = 0; volatile LONG g_console_stop_requested = 0;
@ -766,7 +770,7 @@ int run(const Config& cfg) {
current_step.clear(); current_step.clear();
}; };
auto finalize_lchm = [&](const char* close_reason) { auto finalize_lchm = [&](const char* close_reason, TickMs now) {
finalize_current_step(); finalize_current_step();
if (current.clocks != (current.di2_high_clocks + current.di2_low_clocks)) { if (current.clocks != (current.di2_high_clocks + current.di2_low_clocks)) {
@ -814,7 +818,7 @@ int run(const Config& cfg) {
<< ", di2_low_clocks=" << step.count.di2_low_clocks << ", di2_low_clocks=" << step.count.di2_low_clocks
<< "\n"; << "\n";
} }
last_lchm_complete = tick_count_ms(); last_lchm_complete = now;
} }
current.clear(); current.clear();
current_step.clear(); current_step.clear();
@ -841,8 +845,8 @@ int run(const Config& cfg) {
} }
message << "Check DI_SYN2 wiring, common DGND, and signal level around 0/3.3 V. " message << "Check DI_SYN2 wiring, common DGND, and signal level around 0/3.3 V. "
<< "Progress: last DIN activity " << (now - last_din_activity) << "Progress: last DIN activity " << elapsed_ms(now, last_din_activity)
<< " ms ago, last DI_SYN2 edge " << (now - last_gate_edge) << " ms ago."; << " ms ago, last DI_SYN2 edge " << elapsed_ms(now, last_gate_edge) << " ms ago.";
fail(message.str()); fail(message.str());
}; };
@ -863,11 +867,11 @@ int run(const Config& cfg) {
const TickMs now = tick_count_ms(); const TickMs now = tick_count_ms();
if (recvd == 0) { if (recvd == 0) {
if ((now - last_stream_activity) >= cfg.clock_wait_ms) { if (elapsed_ms(now, last_stream_activity) >= cfg.clock_wait_ms) {
fail("Timeout waiting for DIN stream data in internal clock mode. " fail("Timeout waiting for DIN stream data in internal clock mode. "
"Check device state and DIN stream configuration."); "Check device state and DIN stream configuration.");
} }
if ((now - last_lchm_complete) >= cfg.lchm_wait_ms) { if (elapsed_ms(now, last_lchm_complete) >= cfg.lchm_wait_ms) {
fail_waiting_for_lchm(now); fail_waiting_for_lchm(now);
} }
continue; continue;
@ -924,7 +928,7 @@ int run(const Config& cfg) {
} }
if (in_lchm && last_gate && !gate) { if (in_lchm && last_gate && !gate) {
finalize_lchm("di_syn2_fall"); finalize_lchm("di_syn2_fall", now);
in_lchm = false; in_lchm = false;
} }
@ -940,13 +944,14 @@ int run(const Config& cfg) {
last_gate = gate; last_gate = gate;
} }
if ((stats.count < cfg.windows) && ((now - last_lchm_complete) >= cfg.lchm_wait_ms)) { const TickMs now_after_block = tick_count_ms();
fail_waiting_for_lchm(now); if ((stats.count < cfg.windows) && (elapsed_ms(now_after_block, last_lchm_complete) >= cfg.lchm_wait_ms)) {
fail_waiting_for_lchm(now_after_block);
} }
} }
if (console_stop_requested() && in_lchm) { if (console_stop_requested() && in_lchm) {
finalize_lchm("user_stop"); finalize_lchm("user_stop", tick_count_ms());
} }
expect_ok(api, api.StreamsStop(device.hnd), "Stop streams"); expect_ok(api, api.StreamsStop(device.hnd), "Stop streams");