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RadioPhotonic_PCB_software/build/stm32f7xx_hal_msp.lst
2026-02-18 16:04:34 +03:00

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ARM GAS /tmp/ccR0YjlF.s page 1
1 .cpu cortex-m7
2 .arch armv7e-m
3 .fpu fpv5-d16
4 .eabi_attribute 28, 1
5 .eabi_attribute 20, 1
6 .eabi_attribute 21, 1
7 .eabi_attribute 23, 3
8 .eabi_attribute 24, 1
9 .eabi_attribute 25, 1
10 .eabi_attribute 26, 1
11 .eabi_attribute 30, 1
12 .eabi_attribute 34, 1
13 .eabi_attribute 18, 4
14 .file "stm32f7xx_hal_msp.c"
15 .text
16 .Ltext0:
17 .cfi_sections .debug_frame
18 .file 1 "Src/stm32f7xx_hal_msp.c"
19 .section .text.HAL_MspInit,"ax",%progbits
20 .align 1
21 .global HAL_MspInit
22 .syntax unified
23 .thumb
24 .thumb_func
26 HAL_MspInit:
27 .LFB1183:
1:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Header */
2:Src/stm32f7xx_hal_msp.c **** /**
3:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
4:Src/stm32f7xx_hal_msp.c **** * @file stm32f7xx_hal_msp.c
5:Src/stm32f7xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
6:Src/stm32f7xx_hal_msp.c **** * and de-Initialization codes.
7:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
8:Src/stm32f7xx_hal_msp.c **** * @attention
9:Src/stm32f7xx_hal_msp.c **** *
10:Src/stm32f7xx_hal_msp.c **** * Copyright (c) 2023 STMicroelectronics.
11:Src/stm32f7xx_hal_msp.c **** * All rights reserved.
12:Src/stm32f7xx_hal_msp.c **** *
13:Src/stm32f7xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file
14:Src/stm32f7xx_hal_msp.c **** * in the root directory of this software component.
15:Src/stm32f7xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
16:Src/stm32f7xx_hal_msp.c **** *
17:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
18:Src/stm32f7xx_hal_msp.c **** */
19:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Header */
20:Src/stm32f7xx_hal_msp.c ****
21:Src/stm32f7xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
22:Src/stm32f7xx_hal_msp.c **** #include "main.h"
23:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Includes */
24:Src/stm32f7xx_hal_msp.c ****
25:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Includes */
26:Src/stm32f7xx_hal_msp.c ****
27:Src/stm32f7xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
28:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TD */
29:Src/stm32f7xx_hal_msp.c ****
30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */
31:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/ccR0YjlF.s page 2
32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
33:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Define */
34:Src/stm32f7xx_hal_msp.c ****
35:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Define */
36:Src/stm32f7xx_hal_msp.c ****
37:Src/stm32f7xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
38:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Macro */
39:Src/stm32f7xx_hal_msp.c ****
40:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Macro */
41:Src/stm32f7xx_hal_msp.c ****
42:Src/stm32f7xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
43:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN PV */
44:Src/stm32f7xx_hal_msp.c ****
45:Src/stm32f7xx_hal_msp.c **** /* USER CODE END PV */
46:Src/stm32f7xx_hal_msp.c ****
47:Src/stm32f7xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
48:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN PFP */
49:Src/stm32f7xx_hal_msp.c ****
50:Src/stm32f7xx_hal_msp.c **** /* USER CODE END PFP */
51:Src/stm32f7xx_hal_msp.c ****
52:Src/stm32f7xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
53:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
54:Src/stm32f7xx_hal_msp.c ****
55:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
56:Src/stm32f7xx_hal_msp.c ****
57:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN 0 */
58:Src/stm32f7xx_hal_msp.c ****
59:Src/stm32f7xx_hal_msp.c **** /* USER CODE END 0 */
60:Src/stm32f7xx_hal_msp.c ****
61:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
62:Src/stm32f7xx_hal_msp.c **** /**
63:Src/stm32f7xx_hal_msp.c **** * Initializes the Global MSP.
64:Src/stm32f7xx_hal_msp.c **** */
65:Src/stm32f7xx_hal_msp.c **** void HAL_MspInit(void)
66:Src/stm32f7xx_hal_msp.c **** {
28 .loc 1 66 1 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 8
31 @ frame_needed = 0, uses_anonymous_args = 0
32 @ link register save eliminated.
33 0000 82B0 sub sp, sp, #8
34 .LCFI0:
35 .cfi_def_cfa_offset 8
67:Src/stm32f7xx_hal_msp.c ****
68:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
69:Src/stm32f7xx_hal_msp.c ****
70:Src/stm32f7xx_hal_msp.c **** /* USER CODE END MspInit 0 */
71:Src/stm32f7xx_hal_msp.c ****
72:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
36 .loc 1 72 3 view .LVU1
37 .LBB2:
38 .loc 1 72 3 view .LVU2
39 .loc 1 72 3 view .LVU3
40 0002 0A4B ldr r3, .L3
41 0004 1A6C ldr r2, [r3, #64]
42 0006 42F08052 orr r2, r2, #268435456
43 000a 1A64 str r2, [r3, #64]
ARM GAS /tmp/ccR0YjlF.s page 3
44 .loc 1 72 3 view .LVU4
45 000c 1A6C ldr r2, [r3, #64]
46 000e 02F08052 and r2, r2, #268435456
47 0012 0092 str r2, [sp]
48 .loc 1 72 3 view .LVU5
49 0014 009A ldr r2, [sp]
50 .LBE2:
51 .loc 1 72 3 view .LVU6
73:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
52 .loc 1 73 3 view .LVU7
53 .LBB3:
54 .loc 1 73 3 view .LVU8
55 .loc 1 73 3 view .LVU9
56 0016 5A6C ldr r2, [r3, #68]
57 0018 42F48042 orr r2, r2, #16384
58 001c 5A64 str r2, [r3, #68]
59 .loc 1 73 3 view .LVU10
60 001e 5B6C ldr r3, [r3, #68]
61 0020 03F48043 and r3, r3, #16384
62 0024 0193 str r3, [sp, #4]
63 .loc 1 73 3 view .LVU11
64 0026 019B ldr r3, [sp, #4]
65 .LBE3:
66 .loc 1 73 3 view .LVU12
74:Src/stm32f7xx_hal_msp.c ****
75:Src/stm32f7xx_hal_msp.c **** /* System interrupt init*/
76:Src/stm32f7xx_hal_msp.c ****
77:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
78:Src/stm32f7xx_hal_msp.c ****
79:Src/stm32f7xx_hal_msp.c **** /* USER CODE END MspInit 1 */
80:Src/stm32f7xx_hal_msp.c **** }
67 .loc 1 80 1 is_stmt 0 view .LVU13
68 0028 02B0 add sp, sp, #8
69 .LCFI1:
70 .cfi_def_cfa_offset 0
71 @ sp needed
72 002a 7047 bx lr
73 .L4:
74 .align 2
75 .L3:
76 002c 00380240 .word 1073887232
77 .cfi_endproc
78 .LFE1183:
80 .section .text.HAL_ADC_MspInit,"ax",%progbits
81 .align 1
82 .global HAL_ADC_MspInit
83 .syntax unified
84 .thumb
85 .thumb_func
87 HAL_ADC_MspInit:
88 .LVL0:
89 .LFB1184:
81:Src/stm32f7xx_hal_msp.c ****
82:Src/stm32f7xx_hal_msp.c **** /**
83:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization
84:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
85:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
ARM GAS /tmp/ccR0YjlF.s page 4
86:Src/stm32f7xx_hal_msp.c **** * @retval None
87:Src/stm32f7xx_hal_msp.c **** */
88:Src/stm32f7xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
89:Src/stm32f7xx_hal_msp.c **** {
90 .loc 1 89 1 is_stmt 1 view -0
91 .cfi_startproc
92 @ args = 0, pretend = 0, frame = 48
93 @ frame_needed = 0, uses_anonymous_args = 0
94 .loc 1 89 1 is_stmt 0 view .LVU15
95 0000 30B5 push {r4, r5, lr}
96 .LCFI2:
97 .cfi_def_cfa_offset 12
98 .cfi_offset 4, -12
99 .cfi_offset 5, -8
100 .cfi_offset 14, -4
101 0002 8DB0 sub sp, sp, #52
102 .LCFI3:
103 .cfi_def_cfa_offset 64
90:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
104 .loc 1 90 3 is_stmt 1 view .LVU16
105 .loc 1 90 20 is_stmt 0 view .LVU17
106 0004 0023 movs r3, #0
107 0006 0793 str r3, [sp, #28]
108 0008 0893 str r3, [sp, #32]
109 000a 0993 str r3, [sp, #36]
110 000c 0A93 str r3, [sp, #40]
111 000e 0B93 str r3, [sp, #44]
91:Src/stm32f7xx_hal_msp.c **** if(hadc->Instance==ADC1)
112 .loc 1 91 3 is_stmt 1 view .LVU18
113 .loc 1 91 10 is_stmt 0 view .LVU19
114 0010 0368 ldr r3, [r0]
115 .loc 1 91 5 view .LVU20
116 0012 384A ldr r2, .L11
117 0014 9342 cmp r3, r2
118 0016 04D0 beq .L9
92:Src/stm32f7xx_hal_msp.c **** {
93:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
94:Src/stm32f7xx_hal_msp.c ****
95:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */
96:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
97:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE();
98:Src/stm32f7xx_hal_msp.c ****
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
102:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
103:Src/stm32f7xx_hal_msp.c **** PC0 ------> ADC1_IN10
104:Src/stm32f7xx_hal_msp.c **** PC1 ------> ADC1_IN11
105:Src/stm32f7xx_hal_msp.c **** PA2 ------> ADC1_IN2
106:Src/stm32f7xx_hal_msp.c **** PB0 ------> ADC1_IN8
107:Src/stm32f7xx_hal_msp.c **** PB1 ------> ADC1_IN9
108:Src/stm32f7xx_hal_msp.c **** */
109:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
110:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
113:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/ccR0YjlF.s page 5
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
115:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
116:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
117:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
118:Src/stm32f7xx_hal_msp.c ****
119:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
120:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
121:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
122:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
123:Src/stm32f7xx_hal_msp.c ****
124:Src/stm32f7xx_hal_msp.c **** /* ADC1 interrupt Init */
125:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
126:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
127:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
128:Src/stm32f7xx_hal_msp.c ****
129:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
130:Src/stm32f7xx_hal_msp.c **** }
131:Src/stm32f7xx_hal_msp.c **** else if(hadc->Instance==ADC3)
119 .loc 1 131 8 is_stmt 1 view .LVU21
120 .loc 1 131 10 is_stmt 0 view .LVU22
121 0018 374A ldr r2, .L11+4
122 001a 9342 cmp r3, r2
123 001c 46D0 beq .L10
124 .LVL1:
125 .L5:
132:Src/stm32f7xx_hal_msp.c **** {
133:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 0 */
134:Src/stm32f7xx_hal_msp.c ****
135:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspInit 0 */
136:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
137:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC3_CLK_ENABLE();
138:Src/stm32f7xx_hal_msp.c ****
139:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
140:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
141:Src/stm32f7xx_hal_msp.c **** PF5 ------> ADC3_IN15
142:Src/stm32f7xx_hal_msp.c **** */
143:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_5;
144:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
145:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
146:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
147:Src/stm32f7xx_hal_msp.c ****
148:Src/stm32f7xx_hal_msp.c **** /* ADC3 interrupt Init */
149:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
150:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
151:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 1 */
152:Src/stm32f7xx_hal_msp.c ****
153:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspInit 1 */
154:Src/stm32f7xx_hal_msp.c **** }
155:Src/stm32f7xx_hal_msp.c ****
156:Src/stm32f7xx_hal_msp.c **** }
126 .loc 1 156 1 view .LVU23
127 001e 0DB0 add sp, sp, #52
128 .LCFI4:
129 .cfi_remember_state
130 .cfi_def_cfa_offset 12
131 @ sp needed
132 0020 30BD pop {r4, r5, pc}
ARM GAS /tmp/ccR0YjlF.s page 6
133 .LVL2:
134 .L9:
135 .LCFI5:
136 .cfi_restore_state
97:Src/stm32f7xx_hal_msp.c ****
137 .loc 1 97 5 is_stmt 1 view .LVU24
138 .LBB4:
97:Src/stm32f7xx_hal_msp.c ****
139 .loc 1 97 5 view .LVU25
97:Src/stm32f7xx_hal_msp.c ****
140 .loc 1 97 5 view .LVU26
141 0022 364B ldr r3, .L11+8
142 0024 5A6C ldr r2, [r3, #68]
143 0026 42F48072 orr r2, r2, #256
144 002a 5A64 str r2, [r3, #68]
97:Src/stm32f7xx_hal_msp.c ****
145 .loc 1 97 5 view .LVU27
146 002c 5A6C ldr r2, [r3, #68]
147 002e 02F48072 and r2, r2, #256
148 0032 0192 str r2, [sp, #4]
97:Src/stm32f7xx_hal_msp.c ****
149 .loc 1 97 5 view .LVU28
150 0034 019A ldr r2, [sp, #4]
151 .LBE4:
97:Src/stm32f7xx_hal_msp.c ****
152 .loc 1 97 5 view .LVU29
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
153 .loc 1 99 5 view .LVU30
154 .LBB5:
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
155 .loc 1 99 5 view .LVU31
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
156 .loc 1 99 5 view .LVU32
157 0036 1A6B ldr r2, [r3, #48]
158 0038 42F00402 orr r2, r2, #4
159 003c 1A63 str r2, [r3, #48]
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
160 .loc 1 99 5 view .LVU33
161 003e 1A6B ldr r2, [r3, #48]
162 0040 02F00402 and r2, r2, #4
163 0044 0292 str r2, [sp, #8]
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
164 .loc 1 99 5 view .LVU34
165 0046 029A ldr r2, [sp, #8]
166 .LBE5:
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
167 .loc 1 99 5 view .LVU35
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
168 .loc 1 100 5 view .LVU36
169 .LBB6:
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
170 .loc 1 100 5 view .LVU37
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
171 .loc 1 100 5 view .LVU38
172 0048 1A6B ldr r2, [r3, #48]
173 004a 42F00102 orr r2, r2, #1
174 004e 1A63 str r2, [r3, #48]
ARM GAS /tmp/ccR0YjlF.s page 7
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
175 .loc 1 100 5 view .LVU39
176 0050 1A6B ldr r2, [r3, #48]
177 0052 02F00102 and r2, r2, #1
178 0056 0392 str r2, [sp, #12]
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
179 .loc 1 100 5 view .LVU40
180 0058 039A ldr r2, [sp, #12]
181 .LBE6:
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
182 .loc 1 100 5 view .LVU41
101:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
183 .loc 1 101 5 view .LVU42
184 .LBB7:
101:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
185 .loc 1 101 5 view .LVU43
101:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
186 .loc 1 101 5 view .LVU44
187 005a 1A6B ldr r2, [r3, #48]
188 005c 42F00202 orr r2, r2, #2
189 0060 1A63 str r2, [r3, #48]
101:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
190 .loc 1 101 5 view .LVU45
191 0062 1B6B ldr r3, [r3, #48]
192 0064 03F00203 and r3, r3, #2
193 0068 0493 str r3, [sp, #16]
101:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
194 .loc 1 101 5 view .LVU46
195 006a 049B ldr r3, [sp, #16]
196 .LBE7:
101:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
197 .loc 1 101 5 view .LVU47
109:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
198 .loc 1 109 5 view .LVU48
109:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
199 .loc 1 109 25 is_stmt 0 view .LVU49
200 006c 0324 movs r4, #3
201 006e 0794 str r4, [sp, #28]
110:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
202 .loc 1 110 5 is_stmt 1 view .LVU50
110:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
203 .loc 1 110 26 is_stmt 0 view .LVU51
204 0070 0894 str r4, [sp, #32]
111:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
205 .loc 1 111 5 is_stmt 1 view .LVU52
112:Src/stm32f7xx_hal_msp.c ****
206 .loc 1 112 5 view .LVU53
207 0072 07A9 add r1, sp, #28
208 0074 2248 ldr r0, .L11+12
209 .LVL3:
112:Src/stm32f7xx_hal_msp.c ****
210 .loc 1 112 5 is_stmt 0 view .LVU54
211 0076 FFF7FEFF bl HAL_GPIO_Init
212 .LVL4:
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
213 .loc 1 114 5 is_stmt 1 view .LVU55
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
ARM GAS /tmp/ccR0YjlF.s page 8
214 .loc 1 114 25 is_stmt 0 view .LVU56
215 007a 0423 movs r3, #4
216 007c 0793 str r3, [sp, #28]
115:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
217 .loc 1 115 5 is_stmt 1 view .LVU57
115:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
218 .loc 1 115 26 is_stmt 0 view .LVU58
219 007e 0894 str r4, [sp, #32]
116:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
220 .loc 1 116 5 is_stmt 1 view .LVU59
116:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
221 .loc 1 116 26 is_stmt 0 view .LVU60
222 0080 0025 movs r5, #0
223 0082 0995 str r5, [sp, #36]
117:Src/stm32f7xx_hal_msp.c ****
224 .loc 1 117 5 is_stmt 1 view .LVU61
225 0084 07A9 add r1, sp, #28
226 0086 1F48 ldr r0, .L11+16
227 0088 FFF7FEFF bl HAL_GPIO_Init
228 .LVL5:
119:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
229 .loc 1 119 5 view .LVU62
119:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
230 .loc 1 119 25 is_stmt 0 view .LVU63
231 008c 0794 str r4, [sp, #28]
120:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
232 .loc 1 120 5 is_stmt 1 view .LVU64
120:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
233 .loc 1 120 26 is_stmt 0 view .LVU65
234 008e 0894 str r4, [sp, #32]
121:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
235 .loc 1 121 5 is_stmt 1 view .LVU66
121:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
236 .loc 1 121 26 is_stmt 0 view .LVU67
237 0090 0995 str r5, [sp, #36]
122:Src/stm32f7xx_hal_msp.c ****
238 .loc 1 122 5 is_stmt 1 view .LVU68
239 0092 07A9 add r1, sp, #28
240 0094 1C48 ldr r0, .L11+20
241 0096 FFF7FEFF bl HAL_GPIO_Init
242 .LVL6:
125:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
243 .loc 1 125 5 view .LVU69
244 009a 2A46 mov r2, r5
245 009c 2946 mov r1, r5
246 009e 1220 movs r0, #18
247 00a0 FFF7FEFF bl HAL_NVIC_SetPriority
248 .LVL7:
126:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
249 .loc 1 126 5 view .LVU70
250 00a4 1220 movs r0, #18
251 00a6 FFF7FEFF bl HAL_NVIC_EnableIRQ
252 .LVL8:
253 00aa B8E7 b .L5
254 .LVL9:
255 .L10:
137:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/ccR0YjlF.s page 9
256 .loc 1 137 5 view .LVU71
257 .LBB8:
137:Src/stm32f7xx_hal_msp.c ****
258 .loc 1 137 5 view .LVU72
137:Src/stm32f7xx_hal_msp.c ****
259 .loc 1 137 5 view .LVU73
260 00ac 134B ldr r3, .L11+8
261 00ae 5A6C ldr r2, [r3, #68]
262 00b0 42F48062 orr r2, r2, #1024
263 00b4 5A64 str r2, [r3, #68]
137:Src/stm32f7xx_hal_msp.c ****
264 .loc 1 137 5 view .LVU74
265 00b6 5A6C ldr r2, [r3, #68]
266 00b8 02F48062 and r2, r2, #1024
267 00bc 0592 str r2, [sp, #20]
137:Src/stm32f7xx_hal_msp.c ****
268 .loc 1 137 5 view .LVU75
269 00be 059A ldr r2, [sp, #20]
270 .LBE8:
137:Src/stm32f7xx_hal_msp.c ****
271 .loc 1 137 5 view .LVU76
139:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
272 .loc 1 139 5 view .LVU77
273 .LBB9:
139:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
274 .loc 1 139 5 view .LVU78
139:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
275 .loc 1 139 5 view .LVU79
276 00c0 1A6B ldr r2, [r3, #48]
277 00c2 42F02002 orr r2, r2, #32
278 00c6 1A63 str r2, [r3, #48]
139:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
279 .loc 1 139 5 view .LVU80
280 00c8 1B6B ldr r3, [r3, #48]
281 00ca 03F02003 and r3, r3, #32
282 00ce 0693 str r3, [sp, #24]
139:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
283 .loc 1 139 5 view .LVU81
284 00d0 069B ldr r3, [sp, #24]
285 .LBE9:
139:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
286 .loc 1 139 5 view .LVU82
143:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
287 .loc 1 143 5 view .LVU83
143:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
288 .loc 1 143 25 is_stmt 0 view .LVU84
289 00d2 2023 movs r3, #32
290 00d4 0793 str r3, [sp, #28]
144:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
291 .loc 1 144 5 is_stmt 1 view .LVU85
144:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
292 .loc 1 144 26 is_stmt 0 view .LVU86
293 00d6 0323 movs r3, #3
294 00d8 0893 str r3, [sp, #32]
145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
295 .loc 1 145 5 is_stmt 1 view .LVU87
146:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/ccR0YjlF.s page 10
296 .loc 1 146 5 view .LVU88
297 00da 07A9 add r1, sp, #28
298 00dc 0B48 ldr r0, .L11+24
299 .LVL10:
146:Src/stm32f7xx_hal_msp.c ****
300 .loc 1 146 5 is_stmt 0 view .LVU89
301 00de FFF7FEFF bl HAL_GPIO_Init
302 .LVL11:
149:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
303 .loc 1 149 5 is_stmt 1 view .LVU90
304 00e2 0022 movs r2, #0
305 00e4 1146 mov r1, r2
306 00e6 1220 movs r0, #18
307 00e8 FFF7FEFF bl HAL_NVIC_SetPriority
308 .LVL12:
150:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 1 */
309 .loc 1 150 5 view .LVU91
310 00ec 1220 movs r0, #18
311 00ee FFF7FEFF bl HAL_NVIC_EnableIRQ
312 .LVL13:
313 .loc 1 156 1 is_stmt 0 view .LVU92
314 00f2 94E7 b .L5
315 .L12:
316 .align 2
317 .L11:
318 00f4 00200140 .word 1073815552
319 00f8 00220140 .word 1073816064
320 00fc 00380240 .word 1073887232
321 0100 00080240 .word 1073874944
322 0104 00000240 .word 1073872896
323 0108 00040240 .word 1073873920
324 010c 00140240 .word 1073878016
325 .cfi_endproc
326 .LFE1184:
328 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
329 .align 1
330 .global HAL_ADC_MspDeInit
331 .syntax unified
332 .thumb
333 .thumb_func
335 HAL_ADC_MspDeInit:
336 .LVL14:
337 .LFB1185:
157:Src/stm32f7xx_hal_msp.c ****
158:Src/stm32f7xx_hal_msp.c **** /**
159:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP De-Initialization
160:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
161:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
162:Src/stm32f7xx_hal_msp.c **** * @retval None
163:Src/stm32f7xx_hal_msp.c **** */
164:Src/stm32f7xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
165:Src/stm32f7xx_hal_msp.c **** {
338 .loc 1 165 1 is_stmt 1 view -0
339 .cfi_startproc
340 @ args = 0, pretend = 0, frame = 0
341 @ frame_needed = 0, uses_anonymous_args = 0
342 .loc 1 165 1 is_stmt 0 view .LVU94
ARM GAS /tmp/ccR0YjlF.s page 11
343 0000 08B5 push {r3, lr}
344 .LCFI6:
345 .cfi_def_cfa_offset 8
346 .cfi_offset 3, -8
347 .cfi_offset 14, -4
166:Src/stm32f7xx_hal_msp.c **** if(hadc->Instance==ADC1)
348 .loc 1 166 3 is_stmt 1 view .LVU95
349 .loc 1 166 10 is_stmt 0 view .LVU96
350 0002 0368 ldr r3, [r0]
351 .loc 1 166 5 view .LVU97
352 0004 124A ldr r2, .L19
353 0006 9342 cmp r3, r2
354 0008 03D0 beq .L17
167:Src/stm32f7xx_hal_msp.c **** {
168:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
169:Src/stm32f7xx_hal_msp.c ****
170:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
171:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
172:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE();
173:Src/stm32f7xx_hal_msp.c ****
174:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
175:Src/stm32f7xx_hal_msp.c **** PC0 ------> ADC1_IN10
176:Src/stm32f7xx_hal_msp.c **** PC1 ------> ADC1_IN11
177:Src/stm32f7xx_hal_msp.c **** PA2 ------> ADC1_IN2
178:Src/stm32f7xx_hal_msp.c **** PB0 ------> ADC1_IN8
179:Src/stm32f7xx_hal_msp.c **** PB1 ------> ADC1_IN9
180:Src/stm32f7xx_hal_msp.c **** */
181:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1);
182:Src/stm32f7xx_hal_msp.c ****
183:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2);
184:Src/stm32f7xx_hal_msp.c ****
185:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
186:Src/stm32f7xx_hal_msp.c ****
187:Src/stm32f7xx_hal_msp.c **** /* ADC1 interrupt DeInit */
188:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1:ADC_IRQn disable */
189:Src/stm32f7xx_hal_msp.c **** /**
190:Src/stm32f7xx_hal_msp.c **** * Uncomment the line below to disable the "ADC_IRQn" interrupt
191:Src/stm32f7xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
192:Src/stm32f7xx_hal_msp.c **** */
193:Src/stm32f7xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC_IRQn); */
194:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1:ADC_IRQn disable */
195:Src/stm32f7xx_hal_msp.c ****
196:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
197:Src/stm32f7xx_hal_msp.c ****
198:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
199:Src/stm32f7xx_hal_msp.c **** }
200:Src/stm32f7xx_hal_msp.c **** else if(hadc->Instance==ADC3)
355 .loc 1 200 8 is_stmt 1 view .LVU98
356 .loc 1 200 10 is_stmt 0 view .LVU99
357 000a 124A ldr r2, .L19+4
358 000c 9342 cmp r3, r2
359 000e 13D0 beq .L18
360 .LVL15:
361 .L13:
201:Src/stm32f7xx_hal_msp.c **** {
202:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */
203:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/ccR0YjlF.s page 12
204:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */
205:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
206:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC3_CLK_DISABLE();
207:Src/stm32f7xx_hal_msp.c ****
208:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
209:Src/stm32f7xx_hal_msp.c **** PF5 ------> ADC3_IN15
210:Src/stm32f7xx_hal_msp.c **** */
211:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOF, GPIO_PIN_5);
212:Src/stm32f7xx_hal_msp.c ****
213:Src/stm32f7xx_hal_msp.c **** /* ADC3 interrupt DeInit */
214:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3:ADC_IRQn disable */
215:Src/stm32f7xx_hal_msp.c **** /**
216:Src/stm32f7xx_hal_msp.c **** * Uncomment the line below to disable the "ADC_IRQn" interrupt
217:Src/stm32f7xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
218:Src/stm32f7xx_hal_msp.c **** */
219:Src/stm32f7xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC_IRQn); */
220:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3:ADC_IRQn disable */
221:Src/stm32f7xx_hal_msp.c ****
222:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 1 */
223:Src/stm32f7xx_hal_msp.c ****
224:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 1 */
225:Src/stm32f7xx_hal_msp.c **** }
226:Src/stm32f7xx_hal_msp.c ****
227:Src/stm32f7xx_hal_msp.c **** }
362 .loc 1 227 1 view .LVU100
363 0010 08BD pop {r3, pc}
364 .LVL16:
365 .L17:
172:Src/stm32f7xx_hal_msp.c ****
366 .loc 1 172 5 is_stmt 1 view .LVU101
367 0012 02F58C32 add r2, r2, #71680
368 0016 536C ldr r3, [r2, #68]
369 0018 23F48073 bic r3, r3, #256
370 001c 5364 str r3, [r2, #68]
181:Src/stm32f7xx_hal_msp.c ****
371 .loc 1 181 5 view .LVU102
372 001e 0321 movs r1, #3
373 0020 0D48 ldr r0, .L19+8
374 .LVL17:
181:Src/stm32f7xx_hal_msp.c ****
375 .loc 1 181 5 is_stmt 0 view .LVU103
376 0022 FFF7FEFF bl HAL_GPIO_DeInit
377 .LVL18:
183:Src/stm32f7xx_hal_msp.c ****
378 .loc 1 183 5 is_stmt 1 view .LVU104
379 0026 0421 movs r1, #4
380 0028 0C48 ldr r0, .L19+12
381 002a FFF7FEFF bl HAL_GPIO_DeInit
382 .LVL19:
185:Src/stm32f7xx_hal_msp.c ****
383 .loc 1 185 5 view .LVU105
384 002e 0321 movs r1, #3
385 0030 0B48 ldr r0, .L19+16
386 0032 FFF7FEFF bl HAL_GPIO_DeInit
387 .LVL20:
388 0036 EBE7 b .L13
389 .LVL21:
ARM GAS /tmp/ccR0YjlF.s page 13
390 .L18:
206:Src/stm32f7xx_hal_msp.c ****
391 .loc 1 206 5 view .LVU106
392 0038 02F58B32 add r2, r2, #71168
393 003c 536C ldr r3, [r2, #68]
394 003e 23F48063 bic r3, r3, #1024
395 0042 5364 str r3, [r2, #68]
211:Src/stm32f7xx_hal_msp.c ****
396 .loc 1 211 5 view .LVU107
397 0044 2021 movs r1, #32
398 0046 0748 ldr r0, .L19+20
399 .LVL22:
211:Src/stm32f7xx_hal_msp.c ****
400 .loc 1 211 5 is_stmt 0 view .LVU108
401 0048 FFF7FEFF bl HAL_GPIO_DeInit
402 .LVL23:
403 .loc 1 227 1 view .LVU109
404 004c E0E7 b .L13
405 .L20:
406 004e 00BF .align 2
407 .L19:
408 0050 00200140 .word 1073815552
409 0054 00220140 .word 1073816064
410 0058 00080240 .word 1073874944
411 005c 00000240 .word 1073872896
412 0060 00040240 .word 1073873920
413 0064 00140240 .word 1073878016
414 .cfi_endproc
415 .LFE1185:
417 .section .text.HAL_SD_MspInit,"ax",%progbits
418 .align 1
419 .global HAL_SD_MspInit
420 .syntax unified
421 .thumb
422 .thumb_func
424 HAL_SD_MspInit:
425 .LVL24:
426 .LFB1186:
228:Src/stm32f7xx_hal_msp.c ****
229:Src/stm32f7xx_hal_msp.c **** /**
230:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP Initialization
231:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
232:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
233:Src/stm32f7xx_hal_msp.c **** * @retval None
234:Src/stm32f7xx_hal_msp.c **** */
235:Src/stm32f7xx_hal_msp.c **** void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
236:Src/stm32f7xx_hal_msp.c **** {
427 .loc 1 236 1 is_stmt 1 view -0
428 .cfi_startproc
429 @ args = 0, pretend = 0, frame = 176
430 @ frame_needed = 0, uses_anonymous_args = 0
431 .loc 1 236 1 is_stmt 0 view .LVU111
432 0000 F0B5 push {r4, r5, r6, r7, lr}
433 .LCFI7:
434 .cfi_def_cfa_offset 20
435 .cfi_offset 4, -20
436 .cfi_offset 5, -16
ARM GAS /tmp/ccR0YjlF.s page 14
437 .cfi_offset 6, -12
438 .cfi_offset 7, -8
439 .cfi_offset 14, -4
440 0002 ADB0 sub sp, sp, #180
441 .LCFI8:
442 .cfi_def_cfa_offset 200
443 0004 0446 mov r4, r0
237:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
444 .loc 1 237 3 is_stmt 1 view .LVU112
445 .loc 1 237 20 is_stmt 0 view .LVU113
446 0006 0021 movs r1, #0
447 0008 2791 str r1, [sp, #156]
448 000a 2891 str r1, [sp, #160]
449 000c 2991 str r1, [sp, #164]
450 000e 2A91 str r1, [sp, #168]
451 0010 2B91 str r1, [sp, #172]
238:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
452 .loc 1 238 3 is_stmt 1 view .LVU114
453 .loc 1 238 28 is_stmt 0 view .LVU115
454 0012 9022 movs r2, #144
455 0014 03A8 add r0, sp, #12
456 .LVL25:
457 .loc 1 238 28 view .LVU116
458 0016 FFF7FEFF bl memset
459 .LVL26:
239:Src/stm32f7xx_hal_msp.c **** if(hsd->Instance==SDMMC1)
460 .loc 1 239 3 is_stmt 1 view .LVU117
461 .loc 1 239 9 is_stmt 0 view .LVU118
462 001a 2268 ldr r2, [r4]
463 .loc 1 239 5 view .LVU119
464 001c 224B ldr r3, .L27
465 001e 9A42 cmp r2, r3
466 0020 01D0 beq .L25
467 .LVL27:
468 .L21:
240:Src/stm32f7xx_hal_msp.c **** {
241:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspInit 0 */
242:Src/stm32f7xx_hal_msp.c ****
243:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspInit 0 */
244:Src/stm32f7xx_hal_msp.c ****
245:Src/stm32f7xx_hal_msp.c **** /** Initializes the peripherals clock
246:Src/stm32f7xx_hal_msp.c **** */
247:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
248:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
249:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
250:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
251:Src/stm32f7xx_hal_msp.c **** {
252:Src/stm32f7xx_hal_msp.c **** Error_Handler();
253:Src/stm32f7xx_hal_msp.c **** }
254:Src/stm32f7xx_hal_msp.c ****
255:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
256:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SDMMC1_CLK_ENABLE();
257:Src/stm32f7xx_hal_msp.c ****
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
261:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
ARM GAS /tmp/ccR0YjlF.s page 15
262:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
263:Src/stm32f7xx_hal_msp.c **** PC10 ------> SDMMC1_D2
264:Src/stm32f7xx_hal_msp.c **** PC11 ------> SDMMC1_D3
265:Src/stm32f7xx_hal_msp.c **** PC12 ------> SDMMC1_CK
266:Src/stm32f7xx_hal_msp.c **** PD2 ------> SDMMC1_CMD
267:Src/stm32f7xx_hal_msp.c **** */
268:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
269:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
270:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
272:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
273:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
274:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
275:Src/stm32f7xx_hal_msp.c ****
276:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
279:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
280:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
281:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
282:Src/stm32f7xx_hal_msp.c ****
283:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspInit 1 */
284:Src/stm32f7xx_hal_msp.c ****
285:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspInit 1 */
286:Src/stm32f7xx_hal_msp.c ****
287:Src/stm32f7xx_hal_msp.c **** }
288:Src/stm32f7xx_hal_msp.c ****
289:Src/stm32f7xx_hal_msp.c **** }
469 .loc 1 289 1 view .LVU120
470 0022 2DB0 add sp, sp, #180
471 .LCFI9:
472 .cfi_remember_state
473 .cfi_def_cfa_offset 20
474 @ sp needed
475 0024 F0BD pop {r4, r5, r6, r7, pc}
476 .LVL28:
477 .L25:
478 .LCFI10:
479 .cfi_restore_state
247:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
480 .loc 1 247 5 is_stmt 1 view .LVU121
247:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
481 .loc 1 247 46 is_stmt 0 view .LVU122
482 0026 4FF42003 mov r3, #10485760
483 002a 0393 str r3, [sp, #12]
248:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
484 .loc 1 248 5 is_stmt 1 view .LVU123
249:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
485 .loc 1 249 5 view .LVU124
250:Src/stm32f7xx_hal_msp.c **** {
486 .loc 1 250 5 view .LVU125
250:Src/stm32f7xx_hal_msp.c **** {
487 .loc 1 250 9 is_stmt 0 view .LVU126
488 002c 03A8 add r0, sp, #12
489 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
490 .LVL29:
250:Src/stm32f7xx_hal_msp.c **** {
ARM GAS /tmp/ccR0YjlF.s page 16
491 .loc 1 250 8 discriminator 1 view .LVU127
492 0032 0028 cmp r0, #0
493 0034 35D1 bne .L26
494 .L23:
256:Src/stm32f7xx_hal_msp.c ****
495 .loc 1 256 5 is_stmt 1 view .LVU128
496 .LBB10:
256:Src/stm32f7xx_hal_msp.c ****
497 .loc 1 256 5 view .LVU129
256:Src/stm32f7xx_hal_msp.c ****
498 .loc 1 256 5 view .LVU130
499 0036 1D4B ldr r3, .L27+4
500 0038 5A6C ldr r2, [r3, #68]
501 003a 42F40062 orr r2, r2, #2048
502 003e 5A64 str r2, [r3, #68]
256:Src/stm32f7xx_hal_msp.c ****
503 .loc 1 256 5 view .LVU131
504 0040 5A6C ldr r2, [r3, #68]
505 0042 02F40062 and r2, r2, #2048
506 0046 0092 str r2, [sp]
256:Src/stm32f7xx_hal_msp.c ****
507 .loc 1 256 5 view .LVU132
508 0048 009A ldr r2, [sp]
509 .LBE10:
256:Src/stm32f7xx_hal_msp.c ****
510 .loc 1 256 5 view .LVU133
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
511 .loc 1 258 5 view .LVU134
512 .LBB11:
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
513 .loc 1 258 5 view .LVU135
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
514 .loc 1 258 5 view .LVU136
515 004a 1A6B ldr r2, [r3, #48]
516 004c 42F00402 orr r2, r2, #4
517 0050 1A63 str r2, [r3, #48]
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
518 .loc 1 258 5 view .LVU137
519 0052 1A6B ldr r2, [r3, #48]
520 0054 02F00402 and r2, r2, #4
521 0058 0192 str r2, [sp, #4]
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
522 .loc 1 258 5 view .LVU138
523 005a 019A ldr r2, [sp, #4]
524 .LBE11:
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
525 .loc 1 258 5 view .LVU139
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
526 .loc 1 259 5 view .LVU140
527 .LBB12:
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
528 .loc 1 259 5 view .LVU141
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
529 .loc 1 259 5 view .LVU142
530 005c 1A6B ldr r2, [r3, #48]
531 005e 42F00802 orr r2, r2, #8
532 0062 1A63 str r2, [r3, #48]
ARM GAS /tmp/ccR0YjlF.s page 17
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
533 .loc 1 259 5 view .LVU143
534 0064 1B6B ldr r3, [r3, #48]
535 0066 03F00803 and r3, r3, #8
536 006a 0293 str r3, [sp, #8]
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
537 .loc 1 259 5 view .LVU144
538 006c 029B ldr r3, [sp, #8]
539 .LBE12:
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
540 .loc 1 259 5 view .LVU145
268:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
541 .loc 1 268 5 view .LVU146
268:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
542 .loc 1 268 25 is_stmt 0 view .LVU147
543 006e 4FF4F853 mov r3, #7936
544 0072 2793 str r3, [sp, #156]
270:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
545 .loc 1 270 5 is_stmt 1 view .LVU148
270:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
546 .loc 1 270 26 is_stmt 0 view .LVU149
547 0074 0227 movs r7, #2
548 0076 2897 str r7, [sp, #160]
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
549 .loc 1 271 5 is_stmt 1 view .LVU150
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
550 .loc 1 271 26 is_stmt 0 view .LVU151
551 0078 0026 movs r6, #0
552 007a 2996 str r6, [sp, #164]
272:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
553 .loc 1 272 5 is_stmt 1 view .LVU152
272:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
554 .loc 1 272 27 is_stmt 0 view .LVU153
555 007c 0325 movs r5, #3
556 007e 2A95 str r5, [sp, #168]
273:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
557 .loc 1 273 5 is_stmt 1 view .LVU154
273:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
558 .loc 1 273 31 is_stmt 0 view .LVU155
559 0080 0C24 movs r4, #12
560 .LVL30:
273:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
561 .loc 1 273 31 view .LVU156
562 0082 2B94 str r4, [sp, #172]
274:Src/stm32f7xx_hal_msp.c ****
563 .loc 1 274 5 is_stmt 1 view .LVU157
564 0084 27A9 add r1, sp, #156
565 0086 0A48 ldr r0, .L27+8
566 0088 FFF7FEFF bl HAL_GPIO_Init
567 .LVL31:
276:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
568 .loc 1 276 5 view .LVU158
276:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
569 .loc 1 276 25 is_stmt 0 view .LVU159
570 008c 0423 movs r3, #4
571 008e 2793 str r3, [sp, #156]
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
ARM GAS /tmp/ccR0YjlF.s page 18
572 .loc 1 277 5 is_stmt 1 view .LVU160
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
573 .loc 1 277 26 is_stmt 0 view .LVU161
574 0090 2897 str r7, [sp, #160]
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
575 .loc 1 278 5 is_stmt 1 view .LVU162
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
576 .loc 1 278 26 is_stmt 0 view .LVU163
577 0092 2996 str r6, [sp, #164]
279:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
578 .loc 1 279 5 is_stmt 1 view .LVU164
279:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
579 .loc 1 279 27 is_stmt 0 view .LVU165
580 0094 2A95 str r5, [sp, #168]
280:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
581 .loc 1 280 5 is_stmt 1 view .LVU166
280:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
582 .loc 1 280 31 is_stmt 0 view .LVU167
583 0096 2B94 str r4, [sp, #172]
281:Src/stm32f7xx_hal_msp.c ****
584 .loc 1 281 5 is_stmt 1 view .LVU168
585 0098 27A9 add r1, sp, #156
586 009a 0648 ldr r0, .L27+12
587 009c FFF7FEFF bl HAL_GPIO_Init
588 .LVL32:
589 .loc 1 289 1 is_stmt 0 view .LVU169
590 00a0 BFE7 b .L21
591 .LVL33:
592 .L26:
252:Src/stm32f7xx_hal_msp.c **** }
593 .loc 1 252 7 is_stmt 1 view .LVU170
594 00a2 FFF7FEFF bl Error_Handler
595 .LVL34:
596 00a6 C6E7 b .L23
597 .L28:
598 .align 2
599 .L27:
600 00a8 002C0140 .word 1073818624
601 00ac 00380240 .word 1073887232
602 00b0 00080240 .word 1073874944
603 00b4 000C0240 .word 1073875968
604 .cfi_endproc
605 .LFE1186:
607 .section .text.HAL_SD_MspDeInit,"ax",%progbits
608 .align 1
609 .global HAL_SD_MspDeInit
610 .syntax unified
611 .thumb
612 .thumb_func
614 HAL_SD_MspDeInit:
615 .LVL35:
616 .LFB1187:
290:Src/stm32f7xx_hal_msp.c ****
291:Src/stm32f7xx_hal_msp.c **** /**
292:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization
293:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
294:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
ARM GAS /tmp/ccR0YjlF.s page 19
295:Src/stm32f7xx_hal_msp.c **** * @retval None
296:Src/stm32f7xx_hal_msp.c **** */
297:Src/stm32f7xx_hal_msp.c **** void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
298:Src/stm32f7xx_hal_msp.c **** {
617 .loc 1 298 1 view -0
618 .cfi_startproc
619 @ args = 0, pretend = 0, frame = 0
620 @ frame_needed = 0, uses_anonymous_args = 0
621 .loc 1 298 1 is_stmt 0 view .LVU172
622 0000 08B5 push {r3, lr}
623 .LCFI11:
624 .cfi_def_cfa_offset 8
625 .cfi_offset 3, -8
626 .cfi_offset 14, -4
299:Src/stm32f7xx_hal_msp.c **** if(hsd->Instance==SDMMC1)
627 .loc 1 299 3 is_stmt 1 view .LVU173
628 .loc 1 299 9 is_stmt 0 view .LVU174
629 0002 0268 ldr r2, [r0]
630 .loc 1 299 5 view .LVU175
631 0004 094B ldr r3, .L33
632 0006 9A42 cmp r2, r3
633 0008 00D0 beq .L32
634 .LVL36:
635 .L29:
300:Src/stm32f7xx_hal_msp.c **** {
301:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspDeInit 0 */
302:Src/stm32f7xx_hal_msp.c ****
303:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspDeInit 0 */
304:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
305:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SDMMC1_CLK_DISABLE();
306:Src/stm32f7xx_hal_msp.c ****
307:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
308:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
309:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
310:Src/stm32f7xx_hal_msp.c **** PC10 ------> SDMMC1_D2
311:Src/stm32f7xx_hal_msp.c **** PC11 ------> SDMMC1_D3
312:Src/stm32f7xx_hal_msp.c **** PC12 ------> SDMMC1_CK
313:Src/stm32f7xx_hal_msp.c **** PD2 ------> SDMMC1_CMD
314:Src/stm32f7xx_hal_msp.c **** */
315:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
316:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
317:Src/stm32f7xx_hal_msp.c ****
318:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
319:Src/stm32f7xx_hal_msp.c ****
320:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspDeInit 1 */
321:Src/stm32f7xx_hal_msp.c ****
322:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspDeInit 1 */
323:Src/stm32f7xx_hal_msp.c **** }
324:Src/stm32f7xx_hal_msp.c ****
325:Src/stm32f7xx_hal_msp.c **** }
636 .loc 1 325 1 view .LVU176
637 000a 08BD pop {r3, pc}
638 .LVL37:
639 .L32:
305:Src/stm32f7xx_hal_msp.c ****
640 .loc 1 305 5 is_stmt 1 view .LVU177
641 000c 084A ldr r2, .L33+4
ARM GAS /tmp/ccR0YjlF.s page 20
642 000e 536C ldr r3, [r2, #68]
643 0010 23F40063 bic r3, r3, #2048
644 0014 5364 str r3, [r2, #68]
315:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
645 .loc 1 315 5 view .LVU178
646 0016 4FF4F851 mov r1, #7936
647 001a 0648 ldr r0, .L33+8
648 .LVL38:
315:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
649 .loc 1 315 5 is_stmt 0 view .LVU179
650 001c FFF7FEFF bl HAL_GPIO_DeInit
651 .LVL39:
318:Src/stm32f7xx_hal_msp.c ****
652 .loc 1 318 5 is_stmt 1 view .LVU180
653 0020 0421 movs r1, #4
654 0022 0548 ldr r0, .L33+12
655 0024 FFF7FEFF bl HAL_GPIO_DeInit
656 .LVL40:
657 .loc 1 325 1 is_stmt 0 view .LVU181
658 0028 EFE7 b .L29
659 .L34:
660 002a 00BF .align 2
661 .L33:
662 002c 002C0140 .word 1073818624
663 0030 00380240 .word 1073887232
664 0034 00080240 .word 1073874944
665 0038 000C0240 .word 1073875968
666 .cfi_endproc
667 .LFE1187:
669 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits
670 .align 1
671 .global HAL_TIM_Base_MspInit
672 .syntax unified
673 .thumb
674 .thumb_func
676 HAL_TIM_Base_MspInit:
677 .LVL41:
678 .LFB1188:
326:Src/stm32f7xx_hal_msp.c ****
327:Src/stm32f7xx_hal_msp.c **** /**
328:Src/stm32f7xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
329:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
330:Src/stm32f7xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
331:Src/stm32f7xx_hal_msp.c **** * @retval None
332:Src/stm32f7xx_hal_msp.c **** */
333:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
334:Src/stm32f7xx_hal_msp.c **** {
679 .loc 1 334 1 is_stmt 1 view -0
680 .cfi_startproc
681 @ args = 0, pretend = 0, frame = 24
682 @ frame_needed = 0, uses_anonymous_args = 0
683 .loc 1 334 1 is_stmt 0 view .LVU183
684 0000 00B5 push {lr}
685 .LCFI12:
686 .cfi_def_cfa_offset 4
687 .cfi_offset 14, -4
688 0002 87B0 sub sp, sp, #28
ARM GAS /tmp/ccR0YjlF.s page 21
689 .LCFI13:
690 .cfi_def_cfa_offset 32
335:Src/stm32f7xx_hal_msp.c **** if(htim_base->Instance==TIM4)
691 .loc 1 335 3 is_stmt 1 view .LVU184
692 .loc 1 335 15 is_stmt 0 view .LVU185
693 0004 0368 ldr r3, [r0]
694 .loc 1 335 5 view .LVU186
695 0006 304A ldr r2, .L46
696 0008 9342 cmp r3, r2
697 000a 1ED0 beq .L42
336:Src/stm32f7xx_hal_msp.c **** {
337:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 0 */
338:Src/stm32f7xx_hal_msp.c ****
339:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspInit 0 */
340:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
341:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM4_CLK_ENABLE();
342:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
343:Src/stm32f7xx_hal_msp.c ****
344:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspInit 1 */
345:Src/stm32f7xx_hal_msp.c **** }
346:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM1)
698 .loc 1 346 8 is_stmt 1 view .LVU187
699 .loc 1 346 10 is_stmt 0 view .LVU188
700 000c 2F4A ldr r2, .L46+4
701 000e 9342 cmp r3, r2
702 0010 28D0 beq .L43
347:Src/stm32f7xx_hal_msp.c **** {
348:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 0 */
349:Src/stm32f7xx_hal_msp.c ****
350:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 0 */
351:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
352:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_ENABLE();
353:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */
354:Src/stm32f7xx_hal_msp.c ****
355:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 1 */
356:Src/stm32f7xx_hal_msp.c **** }
357:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM8)
703 .loc 1 357 8 is_stmt 1 view .LVU189
704 .loc 1 357 10 is_stmt 0 view .LVU190
705 0012 2F4A ldr r2, .L46+8
706 0014 9342 cmp r3, r2
707 0016 30D0 beq .L44
358:Src/stm32f7xx_hal_msp.c **** {
359:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 0 */
360:Src/stm32f7xx_hal_msp.c ****
361:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 0 */
362:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
363:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_ENABLE();
364:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
365:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
366:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
367:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
368:Src/stm32f7xx_hal_msp.c ****
369:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 1 */
370:Src/stm32f7xx_hal_msp.c **** }
371:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM10)
708 .loc 1 371 8 is_stmt 1 view .LVU191
ARM GAS /tmp/ccR0YjlF.s page 22
709 .loc 1 371 10 is_stmt 0 view .LVU192
710 0018 2E4A ldr r2, .L46+12
711 001a 9342 cmp r3, r2
712 001c 40D0 beq .L45
372:Src/stm32f7xx_hal_msp.c **** {
373:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 0 */
374:Src/stm32f7xx_hal_msp.c ****
375:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 0 */
376:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
377:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM10_CLK_ENABLE();
378:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
379:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
380:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
381:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */
382:Src/stm32f7xx_hal_msp.c ****
383:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 1 */
384:Src/stm32f7xx_hal_msp.c **** }
385:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM11)
713 .loc 1 385 8 is_stmt 1 view .LVU193
714 .loc 1 385 10 is_stmt 0 view .LVU194
715 001e 2E4A ldr r2, .L46+16
716 0020 9342 cmp r3, r2
717 0022 1CD1 bne .L35
386:Src/stm32f7xx_hal_msp.c **** {
387:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 0 */
388:Src/stm32f7xx_hal_msp.c ****
389:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspInit 0 */
390:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
391:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM11_CLK_ENABLE();
718 .loc 1 391 5 is_stmt 1 view .LVU195
719 .LBB13:
720 .loc 1 391 5 view .LVU196
721 .loc 1 391 5 view .LVU197
722 0024 2D4B ldr r3, .L46+20
723 0026 5A6C ldr r2, [r3, #68]
724 0028 42F48022 orr r2, r2, #262144
725 002c 5A64 str r2, [r3, #68]
726 .loc 1 391 5 view .LVU198
727 002e 5B6C ldr r3, [r3, #68]
728 0030 03F48023 and r3, r3, #262144
729 0034 0593 str r3, [sp, #20]
730 .loc 1 391 5 view .LVU199
731 0036 059B ldr r3, [sp, #20]
732 .LBE13:
733 .loc 1 391 5 view .LVU200
392:Src/stm32f7xx_hal_msp.c **** /* TIM11 interrupt Init */
393:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, 0, 0);
734 .loc 1 393 5 view .LVU201
735 0038 0022 movs r2, #0
736 003a 1146 mov r1, r2
737 003c 1A20 movs r0, #26
738 .LVL42:
739 .loc 1 393 5 is_stmt 0 view .LVU202
740 003e FFF7FEFF bl HAL_NVIC_SetPriority
741 .LVL43:
394:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
742 .loc 1 394 5 is_stmt 1 view .LVU203
ARM GAS /tmp/ccR0YjlF.s page 23
743 0042 1A20 movs r0, #26
744 0044 FFF7FEFF bl HAL_NVIC_EnableIRQ
745 .LVL44:
395:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
396:Src/stm32f7xx_hal_msp.c ****
397:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspInit 1 */
398:Src/stm32f7xx_hal_msp.c **** }
399:Src/stm32f7xx_hal_msp.c ****
400:Src/stm32f7xx_hal_msp.c **** }
746 .loc 1 400 1 is_stmt 0 view .LVU204
747 0048 09E0 b .L35
748 .LVL45:
749 .L42:
341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
750 .loc 1 341 5 is_stmt 1 view .LVU205
751 .LBB14:
341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
752 .loc 1 341 5 view .LVU206
341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
753 .loc 1 341 5 view .LVU207
754 004a 244B ldr r3, .L46+20
755 004c 1A6C ldr r2, [r3, #64]
756 004e 42F00402 orr r2, r2, #4
757 0052 1A64 str r2, [r3, #64]
341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
758 .loc 1 341 5 view .LVU208
759 0054 1B6C ldr r3, [r3, #64]
760 0056 03F00403 and r3, r3, #4
761 005a 0193 str r3, [sp, #4]
341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
762 .loc 1 341 5 view .LVU209
763 005c 019B ldr r3, [sp, #4]
764 .LBE14:
341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
765 .loc 1 341 5 view .LVU210
766 .LVL46:
767 .L35:
768 .loc 1 400 1 is_stmt 0 view .LVU211
769 005e 07B0 add sp, sp, #28
770 .LCFI14:
771 .cfi_remember_state
772 .cfi_def_cfa_offset 4
773 @ sp needed
774 0060 5DF804FB ldr pc, [sp], #4
775 .LVL47:
776 .L43:
777 .LCFI15:
778 .cfi_restore_state
352:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */
779 .loc 1 352 5 is_stmt 1 view .LVU212
780 .LBB15:
352:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */
781 .loc 1 352 5 view .LVU213
352:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */
782 .loc 1 352 5 view .LVU214
783 0064 1D4B ldr r3, .L46+20
784 0066 5A6C ldr r2, [r3, #68]
ARM GAS /tmp/ccR0YjlF.s page 24
785 0068 42F00102 orr r2, r2, #1
786 006c 5A64 str r2, [r3, #68]
352:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */
787 .loc 1 352 5 view .LVU215
788 006e 5B6C ldr r3, [r3, #68]
789 0070 03F00103 and r3, r3, #1
790 0074 0293 str r3, [sp, #8]
352:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */
791 .loc 1 352 5 view .LVU216
792 0076 029B ldr r3, [sp, #8]
793 .LBE15:
352:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */
794 .loc 1 352 5 view .LVU217
795 0078 F1E7 b .L35
796 .L44:
363:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
797 .loc 1 363 5 view .LVU218
798 .LBB16:
363:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
799 .loc 1 363 5 view .LVU219
363:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
800 .loc 1 363 5 view .LVU220
801 007a 184B ldr r3, .L46+20
802 007c 5A6C ldr r2, [r3, #68]
803 007e 42F00202 orr r2, r2, #2
804 0082 5A64 str r2, [r3, #68]
363:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
805 .loc 1 363 5 view .LVU221
806 0084 5B6C ldr r3, [r3, #68]
807 0086 03F00203 and r3, r3, #2
808 008a 0393 str r3, [sp, #12]
363:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
809 .loc 1 363 5 view .LVU222
810 008c 039B ldr r3, [sp, #12]
811 .LBE16:
363:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
812 .loc 1 363 5 view .LVU223
365:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
813 .loc 1 365 5 view .LVU224
814 008e 0022 movs r2, #0
815 0090 1146 mov r1, r2
816 0092 2C20 movs r0, #44
817 .LVL48:
365:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
818 .loc 1 365 5 is_stmt 0 view .LVU225
819 0094 FFF7FEFF bl HAL_NVIC_SetPriority
820 .LVL49:
366:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
821 .loc 1 366 5 is_stmt 1 view .LVU226
822 0098 2C20 movs r0, #44
823 009a FFF7FEFF bl HAL_NVIC_EnableIRQ
824 .LVL50:
825 009e DEE7 b .L35
826 .LVL51:
827 .L45:
377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
828 .loc 1 377 5 view .LVU227
ARM GAS /tmp/ccR0YjlF.s page 25
829 .LBB17:
377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
830 .loc 1 377 5 view .LVU228
377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
831 .loc 1 377 5 view .LVU229
832 00a0 0E4B ldr r3, .L46+20
833 00a2 5A6C ldr r2, [r3, #68]
834 00a4 42F40032 orr r2, r2, #131072
835 00a8 5A64 str r2, [r3, #68]
377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
836 .loc 1 377 5 view .LVU230
837 00aa 5B6C ldr r3, [r3, #68]
838 00ac 03F40033 and r3, r3, #131072
839 00b0 0493 str r3, [sp, #16]
377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
840 .loc 1 377 5 view .LVU231
841 00b2 049B ldr r3, [sp, #16]
842 .LBE17:
377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
843 .loc 1 377 5 view .LVU232
379:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
844 .loc 1 379 5 view .LVU233
845 00b4 0022 movs r2, #0
846 00b6 1146 mov r1, r2
847 00b8 1920 movs r0, #25
848 .LVL52:
379:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
849 .loc 1 379 5 is_stmt 0 view .LVU234
850 00ba FFF7FEFF bl HAL_NVIC_SetPriority
851 .LVL53:
380:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */
852 .loc 1 380 5 is_stmt 1 view .LVU235
853 00be 1920 movs r0, #25
854 00c0 FFF7FEFF bl HAL_NVIC_EnableIRQ
855 .LVL54:
856 00c4 CBE7 b .L35
857 .L47:
858 00c6 00BF .align 2
859 .L46:
860 00c8 00080040 .word 1073743872
861 00cc 00000140 .word 1073807360
862 00d0 00040140 .word 1073808384
863 00d4 00440140 .word 1073824768
864 00d8 00480140 .word 1073825792
865 00dc 00380240 .word 1073887232
866 .cfi_endproc
867 .LFE1188:
869 .section .text.HAL_TIM_MspPostInit,"ax",%progbits
870 .align 1
871 .global HAL_TIM_MspPostInit
872 .syntax unified
873 .thumb
874 .thumb_func
876 HAL_TIM_MspPostInit:
877 .LVL55:
878 .LFB1189:
401:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/ccR0YjlF.s page 26
402:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
403:Src/stm32f7xx_hal_msp.c **** {
879 .loc 1 403 1 view -0
880 .cfi_startproc
881 @ args = 0, pretend = 0, frame = 32
882 @ frame_needed = 0, uses_anonymous_args = 0
883 .loc 1 403 1 is_stmt 0 view .LVU237
884 0000 00B5 push {lr}
885 .LCFI16:
886 .cfi_def_cfa_offset 4
887 .cfi_offset 14, -4
888 0002 89B0 sub sp, sp, #36
889 .LCFI17:
890 .cfi_def_cfa_offset 40
404:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
891 .loc 1 404 3 is_stmt 1 view .LVU238
892 .loc 1 404 20 is_stmt 0 view .LVU239
893 0004 0023 movs r3, #0
894 0006 0393 str r3, [sp, #12]
895 0008 0493 str r3, [sp, #16]
896 000a 0593 str r3, [sp, #20]
897 000c 0693 str r3, [sp, #24]
898 000e 0793 str r3, [sp, #28]
405:Src/stm32f7xx_hal_msp.c **** if(htim->Instance==TIM4)
899 .loc 1 405 3 is_stmt 1 view .LVU240
900 .loc 1 405 10 is_stmt 0 view .LVU241
901 0010 0368 ldr r3, [r0]
902 .loc 1 405 5 view .LVU242
903 0012 274A ldr r2, .L56
904 0014 9342 cmp r3, r2
905 0016 08D0 beq .L53
406:Src/stm32f7xx_hal_msp.c **** {
407:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspPostInit 0 */
408:Src/stm32f7xx_hal_msp.c ****
409:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspPostInit 0 */
410:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
411:Src/stm32f7xx_hal_msp.c **** /**TIM4 GPIO Configuration
412:Src/stm32f7xx_hal_msp.c **** PB8 ------> TIM4_CH3
413:Src/stm32f7xx_hal_msp.c **** */
414:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_8;
415:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
416:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
417:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
418:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
419:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
420:Src/stm32f7xx_hal_msp.c ****
421:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspPostInit 1 */
422:Src/stm32f7xx_hal_msp.c ****
423:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspPostInit 1 */
424:Src/stm32f7xx_hal_msp.c **** }
425:Src/stm32f7xx_hal_msp.c **** else if(htim->Instance==TIM1)
906 .loc 1 425 8 is_stmt 1 view .LVU243
907 .loc 1 425 10 is_stmt 0 view .LVU244
908 0018 264A ldr r2, .L56+4
909 001a 9342 cmp r3, r2
910 001c 1AD0 beq .L54
426:Src/stm32f7xx_hal_msp.c **** {
ARM GAS /tmp/ccR0YjlF.s page 27
427:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 0 */
428:Src/stm32f7xx_hal_msp.c ****
429:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM1_MspPostInit 0 */
430:Src/stm32f7xx_hal_msp.c ****
431:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOE_CLK_ENABLE();
432:Src/stm32f7xx_hal_msp.c **** /**TIM1 GPIO Configuration
433:Src/stm32f7xx_hal_msp.c **** PE9 ------> TIM1_CH1
434:Src/stm32f7xx_hal_msp.c **** */
435:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9;
436:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
437:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
438:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
439:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
440:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
441:Src/stm32f7xx_hal_msp.c ****
442:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 1 */
443:Src/stm32f7xx_hal_msp.c ****
444:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM1_MspPostInit 1 */
445:Src/stm32f7xx_hal_msp.c **** }
446:Src/stm32f7xx_hal_msp.c **** else if(htim->Instance==TIM11)
911 .loc 1 446 8 is_stmt 1 view .LVU245
912 .loc 1 446 10 is_stmt 0 view .LVU246
913 001e 264A ldr r2, .L56+8
914 0020 9342 cmp r3, r2
915 0022 2FD0 beq .L55
916 .LVL56:
917 .L48:
447:Src/stm32f7xx_hal_msp.c **** {
448:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspPostInit 0 */
449:Src/stm32f7xx_hal_msp.c ****
450:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspPostInit 0 */
451:Src/stm32f7xx_hal_msp.c ****
452:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
453:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
454:Src/stm32f7xx_hal_msp.c **** PB9 ------> TIM11_CH1
455:Src/stm32f7xx_hal_msp.c **** */
456:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9;
457:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
458:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
459:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
460:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
461:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
462:Src/stm32f7xx_hal_msp.c ****
463:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspPostInit 1 */
464:Src/stm32f7xx_hal_msp.c ****
465:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspPostInit 1 */
466:Src/stm32f7xx_hal_msp.c **** }
467:Src/stm32f7xx_hal_msp.c ****
468:Src/stm32f7xx_hal_msp.c **** }
918 .loc 1 468 1 view .LVU247
919 0024 09B0 add sp, sp, #36
920 .LCFI18:
921 .cfi_remember_state
922 .cfi_def_cfa_offset 4
923 @ sp needed
924 0026 5DF804FB ldr pc, [sp], #4
925 .LVL57:
ARM GAS /tmp/ccR0YjlF.s page 28
926 .L53:
927 .LCFI19:
928 .cfi_restore_state
410:Src/stm32f7xx_hal_msp.c **** /**TIM4 GPIO Configuration
929 .loc 1 410 5 is_stmt 1 view .LVU248
930 .LBB18:
410:Src/stm32f7xx_hal_msp.c **** /**TIM4 GPIO Configuration
931 .loc 1 410 5 view .LVU249
410:Src/stm32f7xx_hal_msp.c **** /**TIM4 GPIO Configuration
932 .loc 1 410 5 view .LVU250
933 002a 244B ldr r3, .L56+12
934 002c 1A6B ldr r2, [r3, #48]
935 002e 42F00202 orr r2, r2, #2
936 0032 1A63 str r2, [r3, #48]
410:Src/stm32f7xx_hal_msp.c **** /**TIM4 GPIO Configuration
937 .loc 1 410 5 view .LVU251
938 0034 1B6B ldr r3, [r3, #48]
939 0036 03F00203 and r3, r3, #2
940 003a 0093 str r3, [sp]
410:Src/stm32f7xx_hal_msp.c **** /**TIM4 GPIO Configuration
941 .loc 1 410 5 view .LVU252
942 003c 009B ldr r3, [sp]
943 .LBE18:
410:Src/stm32f7xx_hal_msp.c **** /**TIM4 GPIO Configuration
944 .loc 1 410 5 view .LVU253
414:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
945 .loc 1 414 5 view .LVU254
414:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
946 .loc 1 414 25 is_stmt 0 view .LVU255
947 003e 4FF48073 mov r3, #256
948 0042 0393 str r3, [sp, #12]
415:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
949 .loc 1 415 5 is_stmt 1 view .LVU256
415:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
950 .loc 1 415 26 is_stmt 0 view .LVU257
951 0044 0223 movs r3, #2
952 0046 0493 str r3, [sp, #16]
416:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
953 .loc 1 416 5 is_stmt 1 view .LVU258
417:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
954 .loc 1 417 5 view .LVU259
418:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
955 .loc 1 418 5 view .LVU260
418:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
956 .loc 1 418 31 is_stmt 0 view .LVU261
957 0048 0793 str r3, [sp, #28]
419:Src/stm32f7xx_hal_msp.c ****
958 .loc 1 419 5 is_stmt 1 view .LVU262
959 004a 03A9 add r1, sp, #12
960 004c 1C48 ldr r0, .L56+16
961 .LVL58:
419:Src/stm32f7xx_hal_msp.c ****
962 .loc 1 419 5 is_stmt 0 view .LVU263
963 004e FFF7FEFF bl HAL_GPIO_Init
964 .LVL59:
965 0052 E7E7 b .L48
966 .LVL60:
ARM GAS /tmp/ccR0YjlF.s page 29
967 .L54:
431:Src/stm32f7xx_hal_msp.c **** /**TIM1 GPIO Configuration
968 .loc 1 431 5 is_stmt 1 view .LVU264
969 .LBB19:
431:Src/stm32f7xx_hal_msp.c **** /**TIM1 GPIO Configuration
970 .loc 1 431 5 view .LVU265
431:Src/stm32f7xx_hal_msp.c **** /**TIM1 GPIO Configuration
971 .loc 1 431 5 view .LVU266
972 0054 194B ldr r3, .L56+12
973 0056 1A6B ldr r2, [r3, #48]
974 0058 42F01002 orr r2, r2, #16
975 005c 1A63 str r2, [r3, #48]
431:Src/stm32f7xx_hal_msp.c **** /**TIM1 GPIO Configuration
976 .loc 1 431 5 view .LVU267
977 005e 1B6B ldr r3, [r3, #48]
978 0060 03F01003 and r3, r3, #16
979 0064 0193 str r3, [sp, #4]
431:Src/stm32f7xx_hal_msp.c **** /**TIM1 GPIO Configuration
980 .loc 1 431 5 view .LVU268
981 0066 019B ldr r3, [sp, #4]
982 .LBE19:
431:Src/stm32f7xx_hal_msp.c **** /**TIM1 GPIO Configuration
983 .loc 1 431 5 view .LVU269
435:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
984 .loc 1 435 5 view .LVU270
435:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
985 .loc 1 435 25 is_stmt 0 view .LVU271
986 0068 4FF40073 mov r3, #512
987 006c 0393 str r3, [sp, #12]
436:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
988 .loc 1 436 5 is_stmt 1 view .LVU272
436:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
989 .loc 1 436 26 is_stmt 0 view .LVU273
990 006e 0223 movs r3, #2
991 0070 0493 str r3, [sp, #16]
437:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
992 .loc 1 437 5 is_stmt 1 view .LVU274
438:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
993 .loc 1 438 5 view .LVU275
438:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
994 .loc 1 438 27 is_stmt 0 view .LVU276
995 0072 0323 movs r3, #3
996 0074 0693 str r3, [sp, #24]
439:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
997 .loc 1 439 5 is_stmt 1 view .LVU277
439:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
998 .loc 1 439 31 is_stmt 0 view .LVU278
999 0076 0123 movs r3, #1
1000 0078 0793 str r3, [sp, #28]
440:Src/stm32f7xx_hal_msp.c ****
1001 .loc 1 440 5 is_stmt 1 view .LVU279
1002 007a 03A9 add r1, sp, #12
1003 007c 1148 ldr r0, .L56+20
1004 .LVL61:
440:Src/stm32f7xx_hal_msp.c ****
1005 .loc 1 440 5 is_stmt 0 view .LVU280
1006 007e FFF7FEFF bl HAL_GPIO_Init
ARM GAS /tmp/ccR0YjlF.s page 30
1007 .LVL62:
1008 0082 CFE7 b .L48
1009 .LVL63:
1010 .L55:
452:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
1011 .loc 1 452 5 is_stmt 1 view .LVU281
1012 .LBB20:
452:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
1013 .loc 1 452 5 view .LVU282
452:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
1014 .loc 1 452 5 view .LVU283
1015 0084 0D4B ldr r3, .L56+12
1016 0086 1A6B ldr r2, [r3, #48]
1017 0088 42F00202 orr r2, r2, #2
1018 008c 1A63 str r2, [r3, #48]
452:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
1019 .loc 1 452 5 view .LVU284
1020 008e 1B6B ldr r3, [r3, #48]
1021 0090 03F00203 and r3, r3, #2
1022 0094 0293 str r3, [sp, #8]
452:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
1023 .loc 1 452 5 view .LVU285
1024 0096 029B ldr r3, [sp, #8]
1025 .LBE20:
452:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
1026 .loc 1 452 5 view .LVU286
456:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1027 .loc 1 456 5 view .LVU287
456:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1028 .loc 1 456 25 is_stmt 0 view .LVU288
1029 0098 4FF40073 mov r3, #512
1030 009c 0393 str r3, [sp, #12]
457:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1031 .loc 1 457 5 is_stmt 1 view .LVU289
457:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1032 .loc 1 457 26 is_stmt 0 view .LVU290
1033 009e 0223 movs r3, #2
1034 00a0 0493 str r3, [sp, #16]
458:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
1035 .loc 1 458 5 is_stmt 1 view .LVU291
459:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
1036 .loc 1 459 5 view .LVU292
460:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1037 .loc 1 460 5 view .LVU293
460:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1038 .loc 1 460 31 is_stmt 0 view .LVU294
1039 00a2 0323 movs r3, #3
1040 00a4 0793 str r3, [sp, #28]
461:Src/stm32f7xx_hal_msp.c ****
1041 .loc 1 461 5 is_stmt 1 view .LVU295
1042 00a6 03A9 add r1, sp, #12
1043 00a8 0548 ldr r0, .L56+16
1044 .LVL64:
461:Src/stm32f7xx_hal_msp.c ****
1045 .loc 1 461 5 is_stmt 0 view .LVU296
1046 00aa FFF7FEFF bl HAL_GPIO_Init
1047 .LVL65:
ARM GAS /tmp/ccR0YjlF.s page 31
1048 .loc 1 468 1 view .LVU297
1049 00ae B9E7 b .L48
1050 .L57:
1051 .align 2
1052 .L56:
1053 00b0 00080040 .word 1073743872
1054 00b4 00000140 .word 1073807360
1055 00b8 00480140 .word 1073825792
1056 00bc 00380240 .word 1073887232
1057 00c0 00040240 .word 1073873920
1058 00c4 00100240 .word 1073876992
1059 .cfi_endproc
1060 .LFE1189:
1062 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
1063 .align 1
1064 .global HAL_TIM_Base_MspDeInit
1065 .syntax unified
1066 .thumb
1067 .thumb_func
1069 HAL_TIM_Base_MspDeInit:
1070 .LVL66:
1071 .LFB1190:
469:Src/stm32f7xx_hal_msp.c **** /**
470:Src/stm32f7xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
471:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
472:Src/stm32f7xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
473:Src/stm32f7xx_hal_msp.c **** * @retval None
474:Src/stm32f7xx_hal_msp.c **** */
475:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
476:Src/stm32f7xx_hal_msp.c **** {
1072 .loc 1 476 1 is_stmt 1 view -0
1073 .cfi_startproc
1074 @ args = 0, pretend = 0, frame = 0
1075 @ frame_needed = 0, uses_anonymous_args = 0
1076 .loc 1 476 1 is_stmt 0 view .LVU299
1077 0000 08B5 push {r3, lr}
1078 .LCFI20:
1079 .cfi_def_cfa_offset 8
1080 .cfi_offset 3, -8
1081 .cfi_offset 14, -4
477:Src/stm32f7xx_hal_msp.c **** if(htim_base->Instance==TIM4)
1082 .loc 1 477 3 is_stmt 1 view .LVU300
1083 .loc 1 477 15 is_stmt 0 view .LVU301
1084 0002 0368 ldr r3, [r0]
1085 .loc 1 477 5 view .LVU302
1086 0004 1D4A ldr r2, .L69
1087 0006 9342 cmp r3, r2
1088 0008 15D0 beq .L65
478:Src/stm32f7xx_hal_msp.c **** {
479:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 0 */
480:Src/stm32f7xx_hal_msp.c ****
481:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspDeInit 0 */
482:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
483:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM4_CLK_DISABLE();
484:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */
485:Src/stm32f7xx_hal_msp.c ****
486:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspDeInit 1 */
ARM GAS /tmp/ccR0YjlF.s page 32
487:Src/stm32f7xx_hal_msp.c **** }
488:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM1)
1089 .loc 1 488 8 is_stmt 1 view .LVU303
1090 .loc 1 488 10 is_stmt 0 view .LVU304
1091 000a 1D4A ldr r2, .L69+4
1092 000c 9342 cmp r3, r2
1093 000e 19D0 beq .L66
489:Src/stm32f7xx_hal_msp.c **** {
490:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 0 */
491:Src/stm32f7xx_hal_msp.c ****
492:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 0 */
493:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
494:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_DISABLE();
495:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */
496:Src/stm32f7xx_hal_msp.c ****
497:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 1 */
498:Src/stm32f7xx_hal_msp.c **** }
499:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM8)
1094 .loc 1 499 8 is_stmt 1 view .LVU305
1095 .loc 1 499 10 is_stmt 0 view .LVU306
1096 0010 1C4A ldr r2, .L69+8
1097 0012 9342 cmp r3, r2
1098 0014 1DD0 beq .L67
500:Src/stm32f7xx_hal_msp.c **** {
501:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 0 */
502:Src/stm32f7xx_hal_msp.c ****
503:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 0 */
504:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
505:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_DISABLE();
506:Src/stm32f7xx_hal_msp.c ****
507:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt DeInit */
508:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn);
509:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
510:Src/stm32f7xx_hal_msp.c ****
511:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 1 */
512:Src/stm32f7xx_hal_msp.c **** }
513:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM10)
1099 .loc 1 513 8 is_stmt 1 view .LVU307
1100 .loc 1 513 10 is_stmt 0 view .LVU308
1101 0016 1C4A ldr r2, .L69+12
1102 0018 9342 cmp r3, r2
1103 001a 24D0 beq .L68
514:Src/stm32f7xx_hal_msp.c **** {
515:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 0 */
516:Src/stm32f7xx_hal_msp.c ****
517:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspDeInit 0 */
518:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
519:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM10_CLK_DISABLE();
520:Src/stm32f7xx_hal_msp.c ****
521:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt DeInit */
522:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn);
523:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
524:Src/stm32f7xx_hal_msp.c ****
525:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspDeInit 1 */
526:Src/stm32f7xx_hal_msp.c **** }
527:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM11)
1104 .loc 1 527 8 is_stmt 1 view .LVU309
ARM GAS /tmp/ccR0YjlF.s page 33
1105 .loc 1 527 10 is_stmt 0 view .LVU310
1106 001c 1B4A ldr r2, .L69+16
1107 001e 9342 cmp r3, r2
1108 0020 0FD1 bne .L58
528:Src/stm32f7xx_hal_msp.c **** {
529:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 0 */
530:Src/stm32f7xx_hal_msp.c ****
531:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspDeInit 0 */
532:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
533:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM11_CLK_DISABLE();
1109 .loc 1 533 5 is_stmt 1 view .LVU311
1110 0022 02F57042 add r2, r2, #61440
1111 0026 536C ldr r3, [r2, #68]
1112 0028 23F48023 bic r3, r3, #262144
1113 002c 5364 str r3, [r2, #68]
534:Src/stm32f7xx_hal_msp.c ****
535:Src/stm32f7xx_hal_msp.c **** /* TIM11 interrupt DeInit */
536:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM11_IRQn);
1114 .loc 1 536 5 view .LVU312
1115 002e 1A20 movs r0, #26
1116 .LVL67:
1117 .loc 1 536 5 is_stmt 0 view .LVU313
1118 0030 FFF7FEFF bl HAL_NVIC_DisableIRQ
1119 .LVL68:
537:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 1 */
538:Src/stm32f7xx_hal_msp.c ****
539:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspDeInit 1 */
540:Src/stm32f7xx_hal_msp.c **** }
541:Src/stm32f7xx_hal_msp.c ****
542:Src/stm32f7xx_hal_msp.c **** }
1120 .loc 1 542 1 view .LVU314
1121 0034 05E0 b .L58
1122 .LVL69:
1123 .L65:
483:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */
1124 .loc 1 483 5 is_stmt 1 view .LVU315
1125 0036 02F50C32 add r2, r2, #143360
1126 003a 136C ldr r3, [r2, #64]
1127 003c 23F00403 bic r3, r3, #4
1128 0040 1364 str r3, [r2, #64]
1129 .LVL70:
1130 .L58:
1131 .loc 1 542 1 is_stmt 0 view .LVU316
1132 0042 08BD pop {r3, pc}
1133 .LVL71:
1134 .L66:
494:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */
1135 .loc 1 494 5 is_stmt 1 view .LVU317
1136 0044 02F59C32 add r2, r2, #79872
1137 0048 536C ldr r3, [r2, #68]
1138 004a 23F00103 bic r3, r3, #1
1139 004e 5364 str r3, [r2, #68]
1140 0050 F7E7 b .L58
1141 .L67:
505:Src/stm32f7xx_hal_msp.c ****
1142 .loc 1 505 5 view .LVU318
1143 0052 02F59A32 add r2, r2, #78848
ARM GAS /tmp/ccR0YjlF.s page 34
1144 0056 536C ldr r3, [r2, #68]
1145 0058 23F00203 bic r3, r3, #2
1146 005c 5364 str r3, [r2, #68]
508:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
1147 .loc 1 508 5 view .LVU319
1148 005e 2C20 movs r0, #44
1149 .LVL72:
508:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
1150 .loc 1 508 5 is_stmt 0 view .LVU320
1151 0060 FFF7FEFF bl HAL_NVIC_DisableIRQ
1152 .LVL73:
1153 0064 EDE7 b .L58
1154 .LVL74:
1155 .L68:
519:Src/stm32f7xx_hal_msp.c ****
1156 .loc 1 519 5 is_stmt 1 view .LVU321
1157 0066 02F57442 add r2, r2, #62464
1158 006a 536C ldr r3, [r2, #68]
1159 006c 23F40033 bic r3, r3, #131072
1160 0070 5364 str r3, [r2, #68]
522:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
1161 .loc 1 522 5 view .LVU322
1162 0072 1920 movs r0, #25
1163 .LVL75:
522:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
1164 .loc 1 522 5 is_stmt 0 view .LVU323
1165 0074 FFF7FEFF bl HAL_NVIC_DisableIRQ
1166 .LVL76:
1167 0078 E3E7 b .L58
1168 .L70:
1169 007a 00BF .align 2
1170 .L69:
1171 007c 00080040 .word 1073743872
1172 0080 00000140 .word 1073807360
1173 0084 00040140 .word 1073808384
1174 0088 00440140 .word 1073824768
1175 008c 00480140 .word 1073825792
1176 .cfi_endproc
1177 .LFE1190:
1179 .section .text.HAL_UART_MspInit,"ax",%progbits
1180 .align 1
1181 .global HAL_UART_MspInit
1182 .syntax unified
1183 .thumb
1184 .thumb_func
1186 HAL_UART_MspInit:
1187 .LVL77:
1188 .LFB1191:
543:Src/stm32f7xx_hal_msp.c ****
544:Src/stm32f7xx_hal_msp.c **** /**
545:Src/stm32f7xx_hal_msp.c **** * @brief UART MSP Initialization
546:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
547:Src/stm32f7xx_hal_msp.c **** * @param huart: UART handle pointer
548:Src/stm32f7xx_hal_msp.c **** * @retval None
549:Src/stm32f7xx_hal_msp.c **** */
550:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
551:Src/stm32f7xx_hal_msp.c **** {
ARM GAS /tmp/ccR0YjlF.s page 35
1189 .loc 1 551 1 is_stmt 1 view -0
1190 .cfi_startproc
1191 @ args = 0, pretend = 0, frame = 176
1192 @ frame_needed = 0, uses_anonymous_args = 0
1193 .loc 1 551 1 is_stmt 0 view .LVU325
1194 0000 10B5 push {r4, lr}
1195 .LCFI21:
1196 .cfi_def_cfa_offset 8
1197 .cfi_offset 4, -8
1198 .cfi_offset 14, -4
1199 0002 ACB0 sub sp, sp, #176
1200 .LCFI22:
1201 .cfi_def_cfa_offset 184
1202 0004 0446 mov r4, r0
552:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
1203 .loc 1 552 3 is_stmt 1 view .LVU326
1204 .loc 1 552 20 is_stmt 0 view .LVU327
1205 0006 0021 movs r1, #0
1206 0008 2791 str r1, [sp, #156]
1207 000a 2891 str r1, [sp, #160]
1208 000c 2991 str r1, [sp, #164]
1209 000e 2A91 str r1, [sp, #168]
1210 0010 2B91 str r1, [sp, #172]
553:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
1211 .loc 1 553 3 is_stmt 1 view .LVU328
1212 .loc 1 553 28 is_stmt 0 view .LVU329
1213 0012 9022 movs r2, #144
1214 0014 03A8 add r0, sp, #12
1215 .LVL78:
1216 .loc 1 553 28 view .LVU330
1217 0016 FFF7FEFF bl memset
1218 .LVL79:
554:Src/stm32f7xx_hal_msp.c **** if(huart->Instance==UART8)
1219 .loc 1 554 3 is_stmt 1 view .LVU331
1220 .loc 1 554 11 is_stmt 0 view .LVU332
1221 001a 2268 ldr r2, [r4]
1222 .loc 1 554 5 view .LVU333
1223 001c 174B ldr r3, .L77
1224 001e 9A42 cmp r2, r3
1225 0020 01D0 beq .L75
1226 .L71:
555:Src/stm32f7xx_hal_msp.c **** {
556:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspInit 0 */
557:Src/stm32f7xx_hal_msp.c ****
558:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspInit 0 */
559:Src/stm32f7xx_hal_msp.c ****
560:Src/stm32f7xx_hal_msp.c **** /** Initializes the peripherals clock
561:Src/stm32f7xx_hal_msp.c **** */
562:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
563:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
564:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
565:Src/stm32f7xx_hal_msp.c **** {
566:Src/stm32f7xx_hal_msp.c **** Error_Handler();
567:Src/stm32f7xx_hal_msp.c **** }
568:Src/stm32f7xx_hal_msp.c ****
569:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
570:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_UART8_CLK_ENABLE();
ARM GAS /tmp/ccR0YjlF.s page 36
571:Src/stm32f7xx_hal_msp.c ****
572:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOE_CLK_ENABLE();
573:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
574:Src/stm32f7xx_hal_msp.c **** PE0 ------> UART8_RX
575:Src/stm32f7xx_hal_msp.c **** PE1 ------> UART8_TX
576:Src/stm32f7xx_hal_msp.c **** */
577:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
578:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
579:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
581:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
582:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
583:Src/stm32f7xx_hal_msp.c ****
584:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspInit 1 */
585:Src/stm32f7xx_hal_msp.c ****
586:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspInit 1 */
587:Src/stm32f7xx_hal_msp.c ****
588:Src/stm32f7xx_hal_msp.c **** }
589:Src/stm32f7xx_hal_msp.c ****
590:Src/stm32f7xx_hal_msp.c **** }
1227 .loc 1 590 1 view .LVU334
1228 0022 2CB0 add sp, sp, #176
1229 .LCFI23:
1230 .cfi_remember_state
1231 .cfi_def_cfa_offset 8
1232 @ sp needed
1233 0024 10BD pop {r4, pc}
1234 .LVL80:
1235 .L75:
1236 .LCFI24:
1237 .cfi_restore_state
562:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
1238 .loc 1 562 5 is_stmt 1 view .LVU335
562:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
1239 .loc 1 562 46 is_stmt 0 view .LVU336
1240 0026 4FF40053 mov r3, #8192
1241 002a 0393 str r3, [sp, #12]
563:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
1242 .loc 1 563 5 is_stmt 1 view .LVU337
564:Src/stm32f7xx_hal_msp.c **** {
1243 .loc 1 564 5 view .LVU338
564:Src/stm32f7xx_hal_msp.c **** {
1244 .loc 1 564 9 is_stmt 0 view .LVU339
1245 002c 03A8 add r0, sp, #12
1246 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
1247 .LVL81:
564:Src/stm32f7xx_hal_msp.c **** {
1248 .loc 1 564 8 discriminator 1 view .LVU340
1249 0032 00BB cbnz r0, .L76
1250 .L73:
570:Src/stm32f7xx_hal_msp.c ****
1251 .loc 1 570 5 is_stmt 1 view .LVU341
1252 .LBB21:
570:Src/stm32f7xx_hal_msp.c ****
1253 .loc 1 570 5 view .LVU342
570:Src/stm32f7xx_hal_msp.c ****
1254 .loc 1 570 5 view .LVU343
ARM GAS /tmp/ccR0YjlF.s page 37
1255 0034 124B ldr r3, .L77+4
1256 0036 1A6C ldr r2, [r3, #64]
1257 0038 42F00042 orr r2, r2, #-2147483648
1258 003c 1A64 str r2, [r3, #64]
570:Src/stm32f7xx_hal_msp.c ****
1259 .loc 1 570 5 view .LVU344
1260 003e 1A6C ldr r2, [r3, #64]
1261 0040 02F00042 and r2, r2, #-2147483648
1262 0044 0192 str r2, [sp, #4]
570:Src/stm32f7xx_hal_msp.c ****
1263 .loc 1 570 5 view .LVU345
1264 0046 019A ldr r2, [sp, #4]
1265 .LBE21:
570:Src/stm32f7xx_hal_msp.c ****
1266 .loc 1 570 5 view .LVU346
572:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1267 .loc 1 572 5 view .LVU347
1268 .LBB22:
572:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1269 .loc 1 572 5 view .LVU348
572:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1270 .loc 1 572 5 view .LVU349
1271 0048 1A6B ldr r2, [r3, #48]
1272 004a 42F01002 orr r2, r2, #16
1273 004e 1A63 str r2, [r3, #48]
572:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1274 .loc 1 572 5 view .LVU350
1275 0050 1B6B ldr r3, [r3, #48]
1276 0052 03F01003 and r3, r3, #16
1277 0056 0293 str r3, [sp, #8]
572:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1278 .loc 1 572 5 view .LVU351
1279 0058 029B ldr r3, [sp, #8]
1280 .LBE22:
572:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1281 .loc 1 572 5 view .LVU352
577:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1282 .loc 1 577 5 view .LVU353
577:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1283 .loc 1 577 25 is_stmt 0 view .LVU354
1284 005a 0323 movs r3, #3
1285 005c 2793 str r3, [sp, #156]
578:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1286 .loc 1 578 5 is_stmt 1 view .LVU355
578:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1287 .loc 1 578 26 is_stmt 0 view .LVU356
1288 005e 0222 movs r2, #2
1289 0060 2892 str r2, [sp, #160]
579:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
1290 .loc 1 579 5 is_stmt 1 view .LVU357
579:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
1291 .loc 1 579 26 is_stmt 0 view .LVU358
1292 0062 0022 movs r2, #0
1293 0064 2992 str r2, [sp, #164]
580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
1294 .loc 1 580 5 is_stmt 1 view .LVU359
580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
ARM GAS /tmp/ccR0YjlF.s page 38
1295 .loc 1 580 27 is_stmt 0 view .LVU360
1296 0066 2A93 str r3, [sp, #168]
581:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
1297 .loc 1 581 5 is_stmt 1 view .LVU361
581:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
1298 .loc 1 581 31 is_stmt 0 view .LVU362
1299 0068 0823 movs r3, #8
1300 006a 2B93 str r3, [sp, #172]
582:Src/stm32f7xx_hal_msp.c ****
1301 .loc 1 582 5 is_stmt 1 view .LVU363
1302 006c 27A9 add r1, sp, #156
1303 006e 0548 ldr r0, .L77+8
1304 0070 FFF7FEFF bl HAL_GPIO_Init
1305 .LVL82:
1306 .loc 1 590 1 is_stmt 0 view .LVU364
1307 0074 D5E7 b .L71
1308 .L76:
566:Src/stm32f7xx_hal_msp.c **** }
1309 .loc 1 566 7 is_stmt 1 view .LVU365
1310 0076 FFF7FEFF bl Error_Handler
1311 .LVL83:
1312 007a DBE7 b .L73
1313 .L78:
1314 .align 2
1315 .L77:
1316 007c 007C0040 .word 1073773568
1317 0080 00380240 .word 1073887232
1318 0084 00100240 .word 1073876992
1319 .cfi_endproc
1320 .LFE1191:
1322 .section .text.HAL_UART_MspDeInit,"ax",%progbits
1323 .align 1
1324 .global HAL_UART_MspDeInit
1325 .syntax unified
1326 .thumb
1327 .thumb_func
1329 HAL_UART_MspDeInit:
1330 .LVL84:
1331 .LFB1192:
591:Src/stm32f7xx_hal_msp.c ****
592:Src/stm32f7xx_hal_msp.c **** /**
593:Src/stm32f7xx_hal_msp.c **** * @brief UART MSP De-Initialization
594:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
595:Src/stm32f7xx_hal_msp.c **** * @param huart: UART handle pointer
596:Src/stm32f7xx_hal_msp.c **** * @retval None
597:Src/stm32f7xx_hal_msp.c **** */
598:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
599:Src/stm32f7xx_hal_msp.c **** {
1332 .loc 1 599 1 view -0
1333 .cfi_startproc
1334 @ args = 0, pretend = 0, frame = 0
1335 @ frame_needed = 0, uses_anonymous_args = 0
1336 .loc 1 599 1 is_stmt 0 view .LVU367
1337 0000 08B5 push {r3, lr}
1338 .LCFI25:
1339 .cfi_def_cfa_offset 8
1340 .cfi_offset 3, -8
ARM GAS /tmp/ccR0YjlF.s page 39
1341 .cfi_offset 14, -4
600:Src/stm32f7xx_hal_msp.c **** if(huart->Instance==UART8)
1342 .loc 1 600 3 is_stmt 1 view .LVU368
1343 .loc 1 600 11 is_stmt 0 view .LVU369
1344 0002 0268 ldr r2, [r0]
1345 .loc 1 600 5 view .LVU370
1346 0004 064B ldr r3, .L83
1347 0006 9A42 cmp r2, r3
1348 0008 00D0 beq .L82
1349 .LVL85:
1350 .L79:
601:Src/stm32f7xx_hal_msp.c **** {
602:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspDeInit 0 */
603:Src/stm32f7xx_hal_msp.c ****
604:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspDeInit 0 */
605:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
606:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_UART8_CLK_DISABLE();
607:Src/stm32f7xx_hal_msp.c ****
608:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
609:Src/stm32f7xx_hal_msp.c **** PE0 ------> UART8_RX
610:Src/stm32f7xx_hal_msp.c **** PE1 ------> UART8_TX
611:Src/stm32f7xx_hal_msp.c **** */
612:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1);
613:Src/stm32f7xx_hal_msp.c ****
614:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspDeInit 1 */
615:Src/stm32f7xx_hal_msp.c ****
616:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspDeInit 1 */
617:Src/stm32f7xx_hal_msp.c **** }
618:Src/stm32f7xx_hal_msp.c ****
619:Src/stm32f7xx_hal_msp.c **** }
1351 .loc 1 619 1 view .LVU371
1352 000a 08BD pop {r3, pc}
1353 .LVL86:
1354 .L82:
606:Src/stm32f7xx_hal_msp.c ****
1355 .loc 1 606 5 is_stmt 1 view .LVU372
1356 000c 054A ldr r2, .L83+4
1357 000e 136C ldr r3, [r2, #64]
1358 0010 23F00043 bic r3, r3, #-2147483648
1359 0014 1364 str r3, [r2, #64]
612:Src/stm32f7xx_hal_msp.c ****
1360 .loc 1 612 5 view .LVU373
1361 0016 0321 movs r1, #3
1362 0018 0348 ldr r0, .L83+8
1363 .LVL87:
612:Src/stm32f7xx_hal_msp.c ****
1364 .loc 1 612 5 is_stmt 0 view .LVU374
1365 001a FFF7FEFF bl HAL_GPIO_DeInit
1366 .LVL88:
1367 .loc 1 619 1 view .LVU375
1368 001e F4E7 b .L79
1369 .L84:
1370 .align 2
1371 .L83:
1372 0020 007C0040 .word 1073773568
1373 0024 00380240 .word 1073887232
1374 0028 00100240 .word 1073876992
ARM GAS /tmp/ccR0YjlF.s page 40
1375 .cfi_endproc
1376 .LFE1192:
1378 .text
1379 .Letext0:
1380 .file 2 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
1381 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
1382 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
1383 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
1384 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
1385 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
1386 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
1387 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
1388 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
1389 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
1390 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
1391 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
1392 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
1393 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
1394 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
1395 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
1396 .file 18 "Inc/main.h"
1397 .file 19 "<built-in>"
ARM GAS /tmp/ccR0YjlF.s page 41
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_msp.c
/tmp/ccR0YjlF.s:20 .text.HAL_MspInit:00000000 $t
/tmp/ccR0YjlF.s:26 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/ccR0YjlF.s:76 .text.HAL_MspInit:0000002c $d
/tmp/ccR0YjlF.s:81 .text.HAL_ADC_MspInit:00000000 $t
/tmp/ccR0YjlF.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
/tmp/ccR0YjlF.s:318 .text.HAL_ADC_MspInit:000000f4 $d
/tmp/ccR0YjlF.s:329 .text.HAL_ADC_MspDeInit:00000000 $t
/tmp/ccR0YjlF.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
/tmp/ccR0YjlF.s:408 .text.HAL_ADC_MspDeInit:00000050 $d
/tmp/ccR0YjlF.s:418 .text.HAL_SD_MspInit:00000000 $t
/tmp/ccR0YjlF.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
/tmp/ccR0YjlF.s:600 .text.HAL_SD_MspInit:000000a8 $d
/tmp/ccR0YjlF.s:608 .text.HAL_SD_MspDeInit:00000000 $t
/tmp/ccR0YjlF.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
/tmp/ccR0YjlF.s:662 .text.HAL_SD_MspDeInit:0000002c $d
/tmp/ccR0YjlF.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t
/tmp/ccR0YjlF.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
/tmp/ccR0YjlF.s:860 .text.HAL_TIM_Base_MspInit:000000c8 $d
/tmp/ccR0YjlF.s:870 .text.HAL_TIM_MspPostInit:00000000 $t
/tmp/ccR0YjlF.s:876 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
/tmp/ccR0YjlF.s:1053 .text.HAL_TIM_MspPostInit:000000b0 $d
/tmp/ccR0YjlF.s:1063 .text.HAL_TIM_Base_MspDeInit:00000000 $t
/tmp/ccR0YjlF.s:1069 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
/tmp/ccR0YjlF.s:1171 .text.HAL_TIM_Base_MspDeInit:0000007c $d
/tmp/ccR0YjlF.s:1180 .text.HAL_UART_MspInit:00000000 $t
/tmp/ccR0YjlF.s:1186 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
/tmp/ccR0YjlF.s:1316 .text.HAL_UART_MspInit:0000007c $d
/tmp/ccR0YjlF.s:1323 .text.HAL_UART_MspDeInit:00000000 $t
/tmp/ccR0YjlF.s:1329 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
/tmp/ccR0YjlF.s:1372 .text.HAL_UART_MspDeInit:00000020 $d
UNDEFINED SYMBOLS
HAL_GPIO_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
HAL_GPIO_DeInit
memset
HAL_RCCEx_PeriphCLKConfig
Error_Handler
HAL_NVIC_DisableIRQ