1422 lines
64 KiB
Plaintext
1422 lines
64 KiB
Plaintext
ARM GAS /tmp/ccROgBlG.s page 1
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1 .cpu cortex-m7
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2 .eabi_attribute 28, 1
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3 .eabi_attribute 20, 1
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4 .eabi_attribute 21, 1
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5 .eabi_attribute 23, 3
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6 .eabi_attribute 24, 1
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7 .eabi_attribute 25, 1
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8 .eabi_attribute 26, 1
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9 .eabi_attribute 30, 1
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10 .eabi_attribute 34, 1
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11 .eabi_attribute 18, 4
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12 .file "stm32f7xx_hal_msp.c"
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13 .text
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14 .Ltext0:
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15 .cfi_sections .debug_frame
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16 .section .text.HAL_MspInit,"ax",%progbits
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17 .align 1
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18 .global HAL_MspInit
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19 .arch armv7e-m
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20 .syntax unified
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21 .thumb
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22 .thumb_func
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23 .fpu fpv5-d16
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25 HAL_MspInit:
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26 .LFB1183:
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27 .file 1 "Src/stm32f7xx_hal_msp.c"
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1:Src/stm32f7xx_hal_msp.c ****
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2:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Header */
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3:Src/stm32f7xx_hal_msp.c **** /**
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4:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
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5:Src/stm32f7xx_hal_msp.c **** * @file stm32f7xx_hal_msp.c
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6:Src/stm32f7xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
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7:Src/stm32f7xx_hal_msp.c **** * and de-Initialization codes.
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8:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
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9:Src/stm32f7xx_hal_msp.c **** * @attention
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10:Src/stm32f7xx_hal_msp.c **** *
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11:Src/stm32f7xx_hal_msp.c **** * Copyright (c) 2023 STMicroelectronics.
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12:Src/stm32f7xx_hal_msp.c **** * All rights reserved.
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13:Src/stm32f7xx_hal_msp.c **** *
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14:Src/stm32f7xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file
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15:Src/stm32f7xx_hal_msp.c **** * in the root directory of this software component.
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16:Src/stm32f7xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
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17:Src/stm32f7xx_hal_msp.c **** *
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18:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
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19:Src/stm32f7xx_hal_msp.c **** */
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20:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Header */
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21:Src/stm32f7xx_hal_msp.c ****
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22:Src/stm32f7xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
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23:Src/stm32f7xx_hal_msp.c **** #include "main.h"
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24:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Includes */
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25:Src/stm32f7xx_hal_msp.c ****
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26:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Includes */
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27:Src/stm32f7xx_hal_msp.c ****
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28:Src/stm32f7xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
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29:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TD */
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30:Src/stm32f7xx_hal_msp.c ****
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31:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */
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ARM GAS /tmp/ccROgBlG.s page 2
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32:Src/stm32f7xx_hal_msp.c ****
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33:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
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34:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Define */
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35:Src/stm32f7xx_hal_msp.c ****
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36:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Define */
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37:Src/stm32f7xx_hal_msp.c ****
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38:Src/stm32f7xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
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39:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Macro */
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40:Src/stm32f7xx_hal_msp.c ****
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41:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Macro */
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42:Src/stm32f7xx_hal_msp.c ****
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43:Src/stm32f7xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
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44:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN PV */
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45:Src/stm32f7xx_hal_msp.c ****
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46:Src/stm32f7xx_hal_msp.c **** /* USER CODE END PV */
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47:Src/stm32f7xx_hal_msp.c ****
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48:Src/stm32f7xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
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49:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN PFP */
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50:Src/stm32f7xx_hal_msp.c ****
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51:Src/stm32f7xx_hal_msp.c **** /* USER CODE END PFP */
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52:Src/stm32f7xx_hal_msp.c ****
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53:Src/stm32f7xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
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54:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
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55:Src/stm32f7xx_hal_msp.c ****
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56:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
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57:Src/stm32f7xx_hal_msp.c ****
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58:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN 0 */
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59:Src/stm32f7xx_hal_msp.c ****
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60:Src/stm32f7xx_hal_msp.c **** /* USER CODE END 0 */
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61:Src/stm32f7xx_hal_msp.c **** /**
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62:Src/stm32f7xx_hal_msp.c **** * Initializes the Global MSP.
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63:Src/stm32f7xx_hal_msp.c **** */
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64:Src/stm32f7xx_hal_msp.c **** void HAL_MspInit(void)
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65:Src/stm32f7xx_hal_msp.c **** {
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28 .loc 1 65 1 view -0
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29 .cfi_startproc
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30 @ args = 0, pretend = 0, frame = 8
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31 @ frame_needed = 0, uses_anonymous_args = 0
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32 @ link register save eliminated.
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33 0000 82B0 sub sp, sp, #8
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34 .LCFI0:
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35 .cfi_def_cfa_offset 8
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66:Src/stm32f7xx_hal_msp.c ****
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67:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
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68:Src/stm32f7xx_hal_msp.c ****
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69:Src/stm32f7xx_hal_msp.c **** /* USER CODE END MspInit 0 */
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70:Src/stm32f7xx_hal_msp.c ****
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71:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
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36 .loc 1 71 3 view .LVU1
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37 .LBB2:
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38 .loc 1 71 3 view .LVU2
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39 .loc 1 71 3 view .LVU3
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40 0002 0A4B ldr r3, .L3
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41 0004 1A6C ldr r2, [r3, #64]
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42 0006 42F08052 orr r2, r2, #268435456
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43 000a 1A64 str r2, [r3, #64]
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44 .loc 1 71 3 view .LVU4
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ARM GAS /tmp/ccROgBlG.s page 3
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45 000c 1A6C ldr r2, [r3, #64]
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46 000e 02F08052 and r2, r2, #268435456
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47 0012 0092 str r2, [sp]
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48 .loc 1 71 3 view .LVU5
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49 0014 009A ldr r2, [sp]
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50 .LBE2:
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51 .loc 1 71 3 view .LVU6
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72:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
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52 .loc 1 72 3 view .LVU7
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53 .LBB3:
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54 .loc 1 72 3 view .LVU8
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55 .loc 1 72 3 view .LVU9
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56 0016 5A6C ldr r2, [r3, #68]
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57 0018 42F48042 orr r2, r2, #16384
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58 001c 5A64 str r2, [r3, #68]
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59 .loc 1 72 3 view .LVU10
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60 001e 5B6C ldr r3, [r3, #68]
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61 0020 03F48043 and r3, r3, #16384
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62 0024 0193 str r3, [sp, #4]
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63 .loc 1 72 3 view .LVU11
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64 0026 019B ldr r3, [sp, #4]
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65 .LBE3:
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66 .loc 1 72 3 view .LVU12
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73:Src/stm32f7xx_hal_msp.c ****
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74:Src/stm32f7xx_hal_msp.c **** /* System interrupt init*/
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75:Src/stm32f7xx_hal_msp.c ****
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76:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
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77:Src/stm32f7xx_hal_msp.c ****
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78:Src/stm32f7xx_hal_msp.c **** /* USER CODE END MspInit 1 */
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79:Src/stm32f7xx_hal_msp.c **** }
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67 .loc 1 79 1 is_stmt 0 view .LVU13
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68 0028 02B0 add sp, sp, #8
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69 .LCFI1:
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70 .cfi_def_cfa_offset 0
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71 @ sp needed
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72 002a 7047 bx lr
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73 .L4:
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74 .align 2
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75 .L3:
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76 002c 00380240 .word 1073887232
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77 .cfi_endproc
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78 .LFE1183:
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80 .section .text.HAL_ADC_MspInit,"ax",%progbits
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81 .align 1
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82 .global HAL_ADC_MspInit
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83 .syntax unified
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84 .thumb
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85 .thumb_func
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86 .fpu fpv5-d16
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88 HAL_ADC_MspInit:
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89 .LVL0:
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90 .LFB1184:
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80:Src/stm32f7xx_hal_msp.c ****
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81:Src/stm32f7xx_hal_msp.c **** /**
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82:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization
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83:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
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84:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
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ARM GAS /tmp/ccROgBlG.s page 4
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85:Src/stm32f7xx_hal_msp.c **** * @retval None
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86:Src/stm32f7xx_hal_msp.c **** */
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87:Src/stm32f7xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
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88:Src/stm32f7xx_hal_msp.c **** {
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91 .loc 1 88 1 is_stmt 1 view -0
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92 .cfi_startproc
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93 @ args = 0, pretend = 0, frame = 48
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94 @ frame_needed = 0, uses_anonymous_args = 0
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95 .loc 1 88 1 is_stmt 0 view .LVU15
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96 0000 30B5 push {r4, r5, lr}
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97 .LCFI2:
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98 .cfi_def_cfa_offset 12
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99 .cfi_offset 4, -12
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100 .cfi_offset 5, -8
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101 .cfi_offset 14, -4
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102 0002 8DB0 sub sp, sp, #52
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103 .LCFI3:
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104 .cfi_def_cfa_offset 64
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89:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
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105 .loc 1 89 3 is_stmt 1 view .LVU16
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106 .loc 1 89 20 is_stmt 0 view .LVU17
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107 0004 0023 movs r3, #0
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108 0006 0793 str r3, [sp, #28]
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109 0008 0893 str r3, [sp, #32]
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110 000a 0993 str r3, [sp, #36]
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111 000c 0A93 str r3, [sp, #40]
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112 000e 0B93 str r3, [sp, #44]
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90:Src/stm32f7xx_hal_msp.c **** if(hadc->Instance==ADC1)
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113 .loc 1 90 3 is_stmt 1 view .LVU18
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114 .loc 1 90 10 is_stmt 0 view .LVU19
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115 0010 0368 ldr r3, [r0]
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116 .loc 1 90 5 view .LVU20
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117 0012 384A ldr r2, .L11
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118 0014 9342 cmp r3, r2
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119 0016 04D0 beq .L9
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91:Src/stm32f7xx_hal_msp.c **** {
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92:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
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93:Src/stm32f7xx_hal_msp.c ****
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94:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */
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95:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
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96:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE();
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97:Src/stm32f7xx_hal_msp.c ****
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98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
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99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
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100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
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101:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
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102:Src/stm32f7xx_hal_msp.c **** PC0 ------> ADC1_IN10
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103:Src/stm32f7xx_hal_msp.c **** PC1 ------> ADC1_IN11
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104:Src/stm32f7xx_hal_msp.c **** PA2 ------> ADC1_IN2
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105:Src/stm32f7xx_hal_msp.c **** PB0 ------> ADC1_IN8
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106:Src/stm32f7xx_hal_msp.c **** PB1 ------> ADC1_IN9
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107:Src/stm32f7xx_hal_msp.c **** */
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108:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
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109:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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110:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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111:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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112:Src/stm32f7xx_hal_msp.c ****
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ARM GAS /tmp/ccROgBlG.s page 5
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113:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
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114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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115:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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116:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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117:Src/stm32f7xx_hal_msp.c ****
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118:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
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119:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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120:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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121:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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122:Src/stm32f7xx_hal_msp.c ****
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123:Src/stm32f7xx_hal_msp.c **** /* ADC1 interrupt Init */
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124:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
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125:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
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126:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
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127:Src/stm32f7xx_hal_msp.c ****
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128:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
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129:Src/stm32f7xx_hal_msp.c **** }
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130:Src/stm32f7xx_hal_msp.c **** else if(hadc->Instance==ADC3)
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120 .loc 1 130 8 is_stmt 1 view .LVU21
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121 .loc 1 130 10 is_stmt 0 view .LVU22
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122 0018 374A ldr r2, .L11+4
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123 001a 9342 cmp r3, r2
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124 001c 46D0 beq .L10
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125 .LVL1:
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126 .L5:
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131:Src/stm32f7xx_hal_msp.c **** {
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132:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 0 */
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133:Src/stm32f7xx_hal_msp.c ****
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134:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspInit 0 */
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135:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
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136:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC3_CLK_ENABLE();
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137:Src/stm32f7xx_hal_msp.c ****
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138:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
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139:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
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140:Src/stm32f7xx_hal_msp.c **** PF5 ------> ADC3_IN15
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141:Src/stm32f7xx_hal_msp.c **** */
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142:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_5;
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143:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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144:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
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146:Src/stm32f7xx_hal_msp.c ****
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147:Src/stm32f7xx_hal_msp.c **** /* ADC3 interrupt Init */
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148:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
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149:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
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150:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 1 */
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151:Src/stm32f7xx_hal_msp.c ****
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152:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspInit 1 */
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153:Src/stm32f7xx_hal_msp.c **** }
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154:Src/stm32f7xx_hal_msp.c ****
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155:Src/stm32f7xx_hal_msp.c **** }
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127 .loc 1 155 1 view .LVU23
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128 001e 0DB0 add sp, sp, #52
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129 .LCFI4:
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130 .cfi_remember_state
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131 .cfi_def_cfa_offset 12
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132 @ sp needed
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133 0020 30BD pop {r4, r5, pc}
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ARM GAS /tmp/ccROgBlG.s page 6
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134 .LVL2:
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135 .L9:
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136 .LCFI5:
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137 .cfi_restore_state
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96:Src/stm32f7xx_hal_msp.c ****
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138 .loc 1 96 5 is_stmt 1 view .LVU24
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139 .LBB4:
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96:Src/stm32f7xx_hal_msp.c ****
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140 .loc 1 96 5 view .LVU25
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96:Src/stm32f7xx_hal_msp.c ****
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141 .loc 1 96 5 view .LVU26
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142 0022 364B ldr r3, .L11+8
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143 0024 5A6C ldr r2, [r3, #68]
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144 0026 42F48072 orr r2, r2, #256
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145 002a 5A64 str r2, [r3, #68]
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96:Src/stm32f7xx_hal_msp.c ****
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146 .loc 1 96 5 view .LVU27
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147 002c 5A6C ldr r2, [r3, #68]
|
||
148 002e 02F48072 and r2, r2, #256
|
||
149 0032 0192 str r2, [sp, #4]
|
||
96:Src/stm32f7xx_hal_msp.c ****
|
||
150 .loc 1 96 5 view .LVU28
|
||
151 0034 019A ldr r2, [sp, #4]
|
||
152 .LBE4:
|
||
96:Src/stm32f7xx_hal_msp.c ****
|
||
153 .loc 1 96 5 view .LVU29
|
||
98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
154 .loc 1 98 5 view .LVU30
|
||
155 .LBB5:
|
||
98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
156 .loc 1 98 5 view .LVU31
|
||
98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
157 .loc 1 98 5 view .LVU32
|
||
158 0036 1A6B ldr r2, [r3, #48]
|
||
159 0038 42F00402 orr r2, r2, #4
|
||
160 003c 1A63 str r2, [r3, #48]
|
||
98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
161 .loc 1 98 5 view .LVU33
|
||
162 003e 1A6B ldr r2, [r3, #48]
|
||
163 0040 02F00402 and r2, r2, #4
|
||
164 0044 0292 str r2, [sp, #8]
|
||
98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
165 .loc 1 98 5 view .LVU34
|
||
166 0046 029A ldr r2, [sp, #8]
|
||
167 .LBE5:
|
||
98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||
168 .loc 1 98 5 view .LVU35
|
||
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
|
||
169 .loc 1 99 5 view .LVU36
|
||
170 .LBB6:
|
||
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
|
||
171 .loc 1 99 5 view .LVU37
|
||
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
|
||
172 .loc 1 99 5 view .LVU38
|
||
173 0048 1A6B ldr r2, [r3, #48]
|
||
174 004a 42F00102 orr r2, r2, #1
|
||
175 004e 1A63 str r2, [r3, #48]
|
||
ARM GAS /tmp/ccROgBlG.s page 7
|
||
|
||
|
||
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
|
||
176 .loc 1 99 5 view .LVU39
|
||
177 0050 1A6B ldr r2, [r3, #48]
|
||
178 0052 02F00102 and r2, r2, #1
|
||
179 0056 0392 str r2, [sp, #12]
|
||
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
|
||
180 .loc 1 99 5 view .LVU40
|
||
181 0058 039A ldr r2, [sp, #12]
|
||
182 .LBE6:
|
||
99:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
|
||
183 .loc 1 99 5 view .LVU41
|
||
100:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||
184 .loc 1 100 5 view .LVU42
|
||
185 .LBB7:
|
||
100:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||
186 .loc 1 100 5 view .LVU43
|
||
100:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||
187 .loc 1 100 5 view .LVU44
|
||
188 005a 1A6B ldr r2, [r3, #48]
|
||
189 005c 42F00202 orr r2, r2, #2
|
||
190 0060 1A63 str r2, [r3, #48]
|
||
100:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||
191 .loc 1 100 5 view .LVU45
|
||
192 0062 1B6B ldr r3, [r3, #48]
|
||
193 0064 03F00203 and r3, r3, #2
|
||
194 0068 0493 str r3, [sp, #16]
|
||
100:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||
195 .loc 1 100 5 view .LVU46
|
||
196 006a 049B ldr r3, [sp, #16]
|
||
197 .LBE7:
|
||
100:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||
198 .loc 1 100 5 view .LVU47
|
||
108:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
199 .loc 1 108 5 view .LVU48
|
||
108:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
200 .loc 1 108 25 is_stmt 0 view .LVU49
|
||
201 006c 0324 movs r4, #3
|
||
202 006e 0794 str r4, [sp, #28]
|
||
109:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
203 .loc 1 109 5 is_stmt 1 view .LVU50
|
||
109:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
204 .loc 1 109 26 is_stmt 0 view .LVU51
|
||
205 0070 0894 str r4, [sp, #32]
|
||
110:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||
206 .loc 1 110 5 is_stmt 1 view .LVU52
|
||
111:Src/stm32f7xx_hal_msp.c ****
|
||
207 .loc 1 111 5 view .LVU53
|
||
208 0072 07A9 add r1, sp, #28
|
||
209 0074 2248 ldr r0, .L11+12
|
||
210 .LVL3:
|
||
111:Src/stm32f7xx_hal_msp.c ****
|
||
211 .loc 1 111 5 is_stmt 0 view .LVU54
|
||
212 0076 FFF7FEFF bl HAL_GPIO_Init
|
||
213 .LVL4:
|
||
113:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
214 .loc 1 113 5 is_stmt 1 view .LVU55
|
||
113:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
ARM GAS /tmp/ccROgBlG.s page 8
|
||
|
||
|
||
215 .loc 1 113 25 is_stmt 0 view .LVU56
|
||
216 007a 0423 movs r3, #4
|
||
217 007c 0793 str r3, [sp, #28]
|
||
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
218 .loc 1 114 5 is_stmt 1 view .LVU57
|
||
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
219 .loc 1 114 26 is_stmt 0 view .LVU58
|
||
220 007e 0894 str r4, [sp, #32]
|
||
115:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||
221 .loc 1 115 5 is_stmt 1 view .LVU59
|
||
115:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||
222 .loc 1 115 26 is_stmt 0 view .LVU60
|
||
223 0080 0025 movs r5, #0
|
||
224 0082 0995 str r5, [sp, #36]
|
||
116:Src/stm32f7xx_hal_msp.c ****
|
||
225 .loc 1 116 5 is_stmt 1 view .LVU61
|
||
226 0084 07A9 add r1, sp, #28
|
||
227 0086 1F48 ldr r0, .L11+16
|
||
228 0088 FFF7FEFF bl HAL_GPIO_Init
|
||
229 .LVL5:
|
||
118:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
230 .loc 1 118 5 view .LVU62
|
||
118:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
231 .loc 1 118 25 is_stmt 0 view .LVU63
|
||
232 008c 0794 str r4, [sp, #28]
|
||
119:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
233 .loc 1 119 5 is_stmt 1 view .LVU64
|
||
119:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
234 .loc 1 119 26 is_stmt 0 view .LVU65
|
||
235 008e 0894 str r4, [sp, #32]
|
||
120:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
236 .loc 1 120 5 is_stmt 1 view .LVU66
|
||
120:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
237 .loc 1 120 26 is_stmt 0 view .LVU67
|
||
238 0090 0995 str r5, [sp, #36]
|
||
121:Src/stm32f7xx_hal_msp.c ****
|
||
239 .loc 1 121 5 is_stmt 1 view .LVU68
|
||
240 0092 07A9 add r1, sp, #28
|
||
241 0094 1C48 ldr r0, .L11+20
|
||
242 0096 FFF7FEFF bl HAL_GPIO_Init
|
||
243 .LVL6:
|
||
124:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
|
||
244 .loc 1 124 5 view .LVU69
|
||
245 009a 2A46 mov r2, r5
|
||
246 009c 2946 mov r1, r5
|
||
247 009e 1220 movs r0, #18
|
||
248 00a0 FFF7FEFF bl HAL_NVIC_SetPriority
|
||
249 .LVL7:
|
||
125:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
|
||
250 .loc 1 125 5 view .LVU70
|
||
251 00a4 1220 movs r0, #18
|
||
252 00a6 FFF7FEFF bl HAL_NVIC_EnableIRQ
|
||
253 .LVL8:
|
||
254 00aa B8E7 b .L5
|
||
255 .LVL9:
|
||
256 .L10:
|
||
136:Src/stm32f7xx_hal_msp.c ****
|
||
ARM GAS /tmp/ccROgBlG.s page 9
|
||
|
||
|
||
257 .loc 1 136 5 view .LVU71
|
||
258 .LBB8:
|
||
136:Src/stm32f7xx_hal_msp.c ****
|
||
259 .loc 1 136 5 view .LVU72
|
||
136:Src/stm32f7xx_hal_msp.c ****
|
||
260 .loc 1 136 5 view .LVU73
|
||
261 00ac 134B ldr r3, .L11+8
|
||
262 00ae 5A6C ldr r2, [r3, #68]
|
||
263 00b0 42F48062 orr r2, r2, #1024
|
||
264 00b4 5A64 str r2, [r3, #68]
|
||
136:Src/stm32f7xx_hal_msp.c ****
|
||
265 .loc 1 136 5 view .LVU74
|
||
266 00b6 5A6C ldr r2, [r3, #68]
|
||
267 00b8 02F48062 and r2, r2, #1024
|
||
268 00bc 0592 str r2, [sp, #20]
|
||
136:Src/stm32f7xx_hal_msp.c ****
|
||
269 .loc 1 136 5 view .LVU75
|
||
270 00be 059A ldr r2, [sp, #20]
|
||
271 .LBE8:
|
||
136:Src/stm32f7xx_hal_msp.c ****
|
||
272 .loc 1 136 5 view .LVU76
|
||
138:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
|
||
273 .loc 1 138 5 view .LVU77
|
||
274 .LBB9:
|
||
138:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
|
||
275 .loc 1 138 5 view .LVU78
|
||
138:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
|
||
276 .loc 1 138 5 view .LVU79
|
||
277 00c0 1A6B ldr r2, [r3, #48]
|
||
278 00c2 42F02002 orr r2, r2, #32
|
||
279 00c6 1A63 str r2, [r3, #48]
|
||
138:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
|
||
280 .loc 1 138 5 view .LVU80
|
||
281 00c8 1B6B ldr r3, [r3, #48]
|
||
282 00ca 03F02003 and r3, r3, #32
|
||
283 00ce 0693 str r3, [sp, #24]
|
||
138:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
|
||
284 .loc 1 138 5 view .LVU81
|
||
285 00d0 069B ldr r3, [sp, #24]
|
||
286 .LBE9:
|
||
138:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
|
||
287 .loc 1 138 5 view .LVU82
|
||
142:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
288 .loc 1 142 5 view .LVU83
|
||
142:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||
289 .loc 1 142 25 is_stmt 0 view .LVU84
|
||
290 00d2 2023 movs r3, #32
|
||
291 00d4 0793 str r3, [sp, #28]
|
||
143:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
292 .loc 1 143 5 is_stmt 1 view .LVU85
|
||
143:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
293 .loc 1 143 26 is_stmt 0 view .LVU86
|
||
294 00d6 0323 movs r3, #3
|
||
295 00d8 0893 str r3, [sp, #32]
|
||
144:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||
296 .loc 1 144 5 is_stmt 1 view .LVU87
|
||
145:Src/stm32f7xx_hal_msp.c ****
|
||
ARM GAS /tmp/ccROgBlG.s page 10
|
||
|
||
|
||
297 .loc 1 145 5 view .LVU88
|
||
298 00da 07A9 add r1, sp, #28
|
||
299 00dc 0B48 ldr r0, .L11+24
|
||
300 .LVL10:
|
||
145:Src/stm32f7xx_hal_msp.c ****
|
||
301 .loc 1 145 5 is_stmt 0 view .LVU89
|
||
302 00de FFF7FEFF bl HAL_GPIO_Init
|
||
303 .LVL11:
|
||
148:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
|
||
304 .loc 1 148 5 is_stmt 1 view .LVU90
|
||
305 00e2 0022 movs r2, #0
|
||
306 00e4 1146 mov r1, r2
|
||
307 00e6 1220 movs r0, #18
|
||
308 00e8 FFF7FEFF bl HAL_NVIC_SetPriority
|
||
309 .LVL12:
|
||
149:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 1 */
|
||
310 .loc 1 149 5 view .LVU91
|
||
311 00ec 1220 movs r0, #18
|
||
312 00ee FFF7FEFF bl HAL_NVIC_EnableIRQ
|
||
313 .LVL13:
|
||
314 .loc 1 155 1 is_stmt 0 view .LVU92
|
||
315 00f2 94E7 b .L5
|
||
316 .L12:
|
||
317 .align 2
|
||
318 .L11:
|
||
319 00f4 00200140 .word 1073815552
|
||
320 00f8 00220140 .word 1073816064
|
||
321 00fc 00380240 .word 1073887232
|
||
322 0100 00080240 .word 1073874944
|
||
323 0104 00000240 .word 1073872896
|
||
324 0108 00040240 .word 1073873920
|
||
325 010c 00140240 .word 1073878016
|
||
326 .cfi_endproc
|
||
327 .LFE1184:
|
||
329 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
|
||
330 .align 1
|
||
331 .global HAL_ADC_MspDeInit
|
||
332 .syntax unified
|
||
333 .thumb
|
||
334 .thumb_func
|
||
335 .fpu fpv5-d16
|
||
337 HAL_ADC_MspDeInit:
|
||
338 .LVL14:
|
||
339 .LFB1185:
|
||
156:Src/stm32f7xx_hal_msp.c ****
|
||
157:Src/stm32f7xx_hal_msp.c **** /**
|
||
158:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP De-Initialization
|
||
159:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
|
||
160:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
|
||
161:Src/stm32f7xx_hal_msp.c **** * @retval None
|
||
162:Src/stm32f7xx_hal_msp.c **** */
|
||
163:Src/stm32f7xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||
164:Src/stm32f7xx_hal_msp.c **** {
|
||
340 .loc 1 164 1 is_stmt 1 view -0
|
||
341 .cfi_startproc
|
||
342 @ args = 0, pretend = 0, frame = 0
|
||
343 @ frame_needed = 0, uses_anonymous_args = 0
|
||
ARM GAS /tmp/ccROgBlG.s page 11
|
||
|
||
|
||
344 .loc 1 164 1 is_stmt 0 view .LVU94
|
||
345 0000 08B5 push {r3, lr}
|
||
346 .LCFI6:
|
||
347 .cfi_def_cfa_offset 8
|
||
348 .cfi_offset 3, -8
|
||
349 .cfi_offset 14, -4
|
||
165:Src/stm32f7xx_hal_msp.c **** if(hadc->Instance==ADC1)
|
||
350 .loc 1 165 3 is_stmt 1 view .LVU95
|
||
351 .loc 1 165 10 is_stmt 0 view .LVU96
|
||
352 0002 0368 ldr r3, [r0]
|
||
353 .loc 1 165 5 view .LVU97
|
||
354 0004 124A ldr r2, .L19
|
||
355 0006 9342 cmp r3, r2
|
||
356 0008 03D0 beq .L17
|
||
166:Src/stm32f7xx_hal_msp.c **** {
|
||
167:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
|
||
168:Src/stm32f7xx_hal_msp.c ****
|
||
169:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
|
||
170:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
|
||
171:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE();
|
||
172:Src/stm32f7xx_hal_msp.c ****
|
||
173:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||
174:Src/stm32f7xx_hal_msp.c **** PC0 ------> ADC1_IN10
|
||
175:Src/stm32f7xx_hal_msp.c **** PC1 ------> ADC1_IN11
|
||
176:Src/stm32f7xx_hal_msp.c **** PA2 ------> ADC1_IN2
|
||
177:Src/stm32f7xx_hal_msp.c **** PB0 ------> ADC1_IN8
|
||
178:Src/stm32f7xx_hal_msp.c **** PB1 ------> ADC1_IN9
|
||
179:Src/stm32f7xx_hal_msp.c **** */
|
||
180:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1);
|
||
181:Src/stm32f7xx_hal_msp.c ****
|
||
182:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2);
|
||
183:Src/stm32f7xx_hal_msp.c ****
|
||
184:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
|
||
185:Src/stm32f7xx_hal_msp.c ****
|
||
186:Src/stm32f7xx_hal_msp.c **** /* ADC1 interrupt DeInit */
|
||
187:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1:ADC_IRQn disable */
|
||
188:Src/stm32f7xx_hal_msp.c **** /**
|
||
189:Src/stm32f7xx_hal_msp.c **** * Uncomment the line below to disable the "ADC_IRQn" interrupt
|
||
190:Src/stm32f7xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
|
||
191:Src/stm32f7xx_hal_msp.c **** */
|
||
192:Src/stm32f7xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC_IRQn); */
|
||
193:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1:ADC_IRQn disable */
|
||
194:Src/stm32f7xx_hal_msp.c ****
|
||
195:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||
196:Src/stm32f7xx_hal_msp.c ****
|
||
197:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
|
||
198:Src/stm32f7xx_hal_msp.c **** }
|
||
199:Src/stm32f7xx_hal_msp.c **** else if(hadc->Instance==ADC3)
|
||
357 .loc 1 199 8 is_stmt 1 view .LVU98
|
||
358 .loc 1 199 10 is_stmt 0 view .LVU99
|
||
359 000a 124A ldr r2, .L19+4
|
||
360 000c 9342 cmp r3, r2
|
||
361 000e 13D0 beq .L18
|
||
362 .LVL15:
|
||
363 .L13:
|
||
200:Src/stm32f7xx_hal_msp.c **** {
|
||
201:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */
|
||
ARM GAS /tmp/ccROgBlG.s page 12
|
||
|
||
|
||
202:Src/stm32f7xx_hal_msp.c ****
|
||
203:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */
|
||
204:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
|
||
205:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC3_CLK_DISABLE();
|
||
206:Src/stm32f7xx_hal_msp.c ****
|
||
207:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
|
||
208:Src/stm32f7xx_hal_msp.c **** PF5 ------> ADC3_IN15
|
||
209:Src/stm32f7xx_hal_msp.c **** */
|
||
210:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOF, GPIO_PIN_5);
|
||
211:Src/stm32f7xx_hal_msp.c ****
|
||
212:Src/stm32f7xx_hal_msp.c **** /* ADC3 interrupt DeInit */
|
||
213:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3:ADC_IRQn disable */
|
||
214:Src/stm32f7xx_hal_msp.c **** /**
|
||
215:Src/stm32f7xx_hal_msp.c **** * Uncomment the line below to disable the "ADC_IRQn" interrupt
|
||
216:Src/stm32f7xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
|
||
217:Src/stm32f7xx_hal_msp.c **** */
|
||
218:Src/stm32f7xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC_IRQn); */
|
||
219:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3:ADC_IRQn disable */
|
||
220:Src/stm32f7xx_hal_msp.c ****
|
||
221:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 1 */
|
||
222:Src/stm32f7xx_hal_msp.c ****
|
||
223:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 1 */
|
||
224:Src/stm32f7xx_hal_msp.c **** }
|
||
225:Src/stm32f7xx_hal_msp.c ****
|
||
226:Src/stm32f7xx_hal_msp.c **** }
|
||
364 .loc 1 226 1 view .LVU100
|
||
365 0010 08BD pop {r3, pc}
|
||
366 .LVL16:
|
||
367 .L17:
|
||
171:Src/stm32f7xx_hal_msp.c ****
|
||
368 .loc 1 171 5 is_stmt 1 view .LVU101
|
||
369 0012 02F58C32 add r2, r2, #71680
|
||
370 0016 536C ldr r3, [r2, #68]
|
||
371 0018 23F48073 bic r3, r3, #256
|
||
372 001c 5364 str r3, [r2, #68]
|
||
180:Src/stm32f7xx_hal_msp.c ****
|
||
373 .loc 1 180 5 view .LVU102
|
||
374 001e 0321 movs r1, #3
|
||
375 0020 0D48 ldr r0, .L19+8
|
||
376 .LVL17:
|
||
180:Src/stm32f7xx_hal_msp.c ****
|
||
377 .loc 1 180 5 is_stmt 0 view .LVU103
|
||
378 0022 FFF7FEFF bl HAL_GPIO_DeInit
|
||
379 .LVL18:
|
||
182:Src/stm32f7xx_hal_msp.c ****
|
||
380 .loc 1 182 5 is_stmt 1 view .LVU104
|
||
381 0026 0421 movs r1, #4
|
||
382 0028 0C48 ldr r0, .L19+12
|
||
383 002a FFF7FEFF bl HAL_GPIO_DeInit
|
||
384 .LVL19:
|
||
184:Src/stm32f7xx_hal_msp.c ****
|
||
385 .loc 1 184 5 view .LVU105
|
||
386 002e 0321 movs r1, #3
|
||
387 0030 0B48 ldr r0, .L19+16
|
||
388 0032 FFF7FEFF bl HAL_GPIO_DeInit
|
||
389 .LVL20:
|
||
390 0036 EBE7 b .L13
|
||
ARM GAS /tmp/ccROgBlG.s page 13
|
||
|
||
|
||
391 .LVL21:
|
||
392 .L18:
|
||
205:Src/stm32f7xx_hal_msp.c ****
|
||
393 .loc 1 205 5 view .LVU106
|
||
394 0038 02F58B32 add r2, r2, #71168
|
||
395 003c 536C ldr r3, [r2, #68]
|
||
396 003e 23F48063 bic r3, r3, #1024
|
||
397 0042 5364 str r3, [r2, #68]
|
||
210:Src/stm32f7xx_hal_msp.c ****
|
||
398 .loc 1 210 5 view .LVU107
|
||
399 0044 2021 movs r1, #32
|
||
400 0046 0748 ldr r0, .L19+20
|
||
401 .LVL22:
|
||
210:Src/stm32f7xx_hal_msp.c ****
|
||
402 .loc 1 210 5 is_stmt 0 view .LVU108
|
||
403 0048 FFF7FEFF bl HAL_GPIO_DeInit
|
||
404 .LVL23:
|
||
405 .loc 1 226 1 view .LVU109
|
||
406 004c E0E7 b .L13
|
||
407 .L20:
|
||
408 004e 00BF .align 2
|
||
409 .L19:
|
||
410 0050 00200140 .word 1073815552
|
||
411 0054 00220140 .word 1073816064
|
||
412 0058 00080240 .word 1073874944
|
||
413 005c 00000240 .word 1073872896
|
||
414 0060 00040240 .word 1073873920
|
||
415 0064 00140240 .word 1073878016
|
||
416 .cfi_endproc
|
||
417 .LFE1185:
|
||
419 .section .text.HAL_SD_MspInit,"ax",%progbits
|
||
420 .align 1
|
||
421 .global HAL_SD_MspInit
|
||
422 .syntax unified
|
||
423 .thumb
|
||
424 .thumb_func
|
||
425 .fpu fpv5-d16
|
||
427 HAL_SD_MspInit:
|
||
428 .LVL24:
|
||
429 .LFB1186:
|
||
227:Src/stm32f7xx_hal_msp.c ****
|
||
228:Src/stm32f7xx_hal_msp.c **** /**
|
||
229:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP Initialization
|
||
230:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
|
||
231:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
|
||
232:Src/stm32f7xx_hal_msp.c **** * @retval None
|
||
233:Src/stm32f7xx_hal_msp.c **** */
|
||
234:Src/stm32f7xx_hal_msp.c **** void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
|
||
235:Src/stm32f7xx_hal_msp.c **** {
|
||
430 .loc 1 235 1 is_stmt 1 view -0
|
||
431 .cfi_startproc
|
||
432 @ args = 0, pretend = 0, frame = 176
|
||
433 @ frame_needed = 0, uses_anonymous_args = 0
|
||
434 .loc 1 235 1 is_stmt 0 view .LVU111
|
||
435 0000 F0B5 push {r4, r5, r6, r7, lr}
|
||
436 .LCFI7:
|
||
437 .cfi_def_cfa_offset 20
|
||
ARM GAS /tmp/ccROgBlG.s page 14
|
||
|
||
|
||
438 .cfi_offset 4, -20
|
||
439 .cfi_offset 5, -16
|
||
440 .cfi_offset 6, -12
|
||
441 .cfi_offset 7, -8
|
||
442 .cfi_offset 14, -4
|
||
443 0002 ADB0 sub sp, sp, #180
|
||
444 .LCFI8:
|
||
445 .cfi_def_cfa_offset 200
|
||
446 0004 0446 mov r4, r0
|
||
236:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
447 .loc 1 236 3 is_stmt 1 view .LVU112
|
||
448 .loc 1 236 20 is_stmt 0 view .LVU113
|
||
449 0006 0021 movs r1, #0
|
||
450 0008 2791 str r1, [sp, #156]
|
||
451 000a 2891 str r1, [sp, #160]
|
||
452 000c 2991 str r1, [sp, #164]
|
||
453 000e 2A91 str r1, [sp, #168]
|
||
454 0010 2B91 str r1, [sp, #172]
|
||
237:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||
455 .loc 1 237 3 is_stmt 1 view .LVU114
|
||
456 .loc 1 237 28 is_stmt 0 view .LVU115
|
||
457 0012 9022 movs r2, #144
|
||
458 0014 03A8 add r0, sp, #12
|
||
459 .LVL25:
|
||
460 .loc 1 237 28 view .LVU116
|
||
461 0016 FFF7FEFF bl memset
|
||
462 .LVL26:
|
||
238:Src/stm32f7xx_hal_msp.c **** if(hsd->Instance==SDMMC1)
|
||
463 .loc 1 238 3 is_stmt 1 view .LVU117
|
||
464 .loc 1 238 9 is_stmt 0 view .LVU118
|
||
465 001a 2268 ldr r2, [r4]
|
||
466 .loc 1 238 5 view .LVU119
|
||
467 001c 224B ldr r3, .L27
|
||
468 001e 9A42 cmp r2, r3
|
||
469 0020 01D0 beq .L25
|
||
470 .LVL27:
|
||
471 .L21:
|
||
239:Src/stm32f7xx_hal_msp.c **** {
|
||
240:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspInit 0 */
|
||
241:Src/stm32f7xx_hal_msp.c ****
|
||
242:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspInit 0 */
|
||
243:Src/stm32f7xx_hal_msp.c ****
|
||
244:Src/stm32f7xx_hal_msp.c **** /** Initializes the peripherals clock
|
||
245:Src/stm32f7xx_hal_msp.c **** */
|
||
246:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
|
||
247:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
|
||
248:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
|
||
249:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||
250:Src/stm32f7xx_hal_msp.c **** {
|
||
251:Src/stm32f7xx_hal_msp.c **** Error_Handler();
|
||
252:Src/stm32f7xx_hal_msp.c **** }
|
||
253:Src/stm32f7xx_hal_msp.c ****
|
||
254:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
|
||
255:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SDMMC1_CLK_ENABLE();
|
||
256:Src/stm32f7xx_hal_msp.c ****
|
||
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
|
||
258:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
|
||
ARM GAS /tmp/ccROgBlG.s page 15
|
||
|
||
|
||
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
260:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
|
||
261:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
|
||
262:Src/stm32f7xx_hal_msp.c **** PC10 ------> SDMMC1_D2
|
||
263:Src/stm32f7xx_hal_msp.c **** PC11 ------> SDMMC1_D3
|
||
264:Src/stm32f7xx_hal_msp.c **** PC12 ------> SDMMC1_CK
|
||
265:Src/stm32f7xx_hal_msp.c **** PD2 ------> SDMMC1_CMD
|
||
266:Src/stm32f7xx_hal_msp.c **** */
|
||
267:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||
268:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
|
||
269:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
270:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||
272:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||
273:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||
274:Src/stm32f7xx_hal_msp.c ****
|
||
275:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||
276:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||
279:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||
280:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
281:Src/stm32f7xx_hal_msp.c ****
|
||
282:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspInit 1 */
|
||
283:Src/stm32f7xx_hal_msp.c ****
|
||
284:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspInit 1 */
|
||
285:Src/stm32f7xx_hal_msp.c ****
|
||
286:Src/stm32f7xx_hal_msp.c **** }
|
||
287:Src/stm32f7xx_hal_msp.c ****
|
||
288:Src/stm32f7xx_hal_msp.c **** }
|
||
472 .loc 1 288 1 view .LVU120
|
||
473 0022 2DB0 add sp, sp, #180
|
||
474 .LCFI9:
|
||
475 .cfi_remember_state
|
||
476 .cfi_def_cfa_offset 20
|
||
477 @ sp needed
|
||
478 0024 F0BD pop {r4, r5, r6, r7, pc}
|
||
479 .LVL28:
|
||
480 .L25:
|
||
481 .LCFI10:
|
||
482 .cfi_restore_state
|
||
246:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
|
||
483 .loc 1 246 5 is_stmt 1 view .LVU121
|
||
246:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
|
||
484 .loc 1 246 46 is_stmt 0 view .LVU122
|
||
485 0026 4FF42003 mov r3, #10485760
|
||
486 002a 0393 str r3, [sp, #12]
|
||
247:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
|
||
487 .loc 1 247 5 is_stmt 1 view .LVU123
|
||
248:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||
488 .loc 1 248 5 view .LVU124
|
||
249:Src/stm32f7xx_hal_msp.c **** {
|
||
489 .loc 1 249 5 view .LVU125
|
||
249:Src/stm32f7xx_hal_msp.c **** {
|
||
490 .loc 1 249 9 is_stmt 0 view .LVU126
|
||
491 002c 03A8 add r0, sp, #12
|
||
492 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
|
||
ARM GAS /tmp/ccROgBlG.s page 16
|
||
|
||
|
||
493 .LVL29:
|
||
249:Src/stm32f7xx_hal_msp.c **** {
|
||
494 .loc 1 249 8 view .LVU127
|
||
495 0032 0028 cmp r0, #0
|
||
496 0034 35D1 bne .L26
|
||
497 .L23:
|
||
255:Src/stm32f7xx_hal_msp.c ****
|
||
498 .loc 1 255 5 is_stmt 1 view .LVU128
|
||
499 .LBB10:
|
||
255:Src/stm32f7xx_hal_msp.c ****
|
||
500 .loc 1 255 5 view .LVU129
|
||
255:Src/stm32f7xx_hal_msp.c ****
|
||
501 .loc 1 255 5 view .LVU130
|
||
502 0036 1D4B ldr r3, .L27+4
|
||
503 0038 5A6C ldr r2, [r3, #68]
|
||
504 003a 42F40062 orr r2, r2, #2048
|
||
505 003e 5A64 str r2, [r3, #68]
|
||
255:Src/stm32f7xx_hal_msp.c ****
|
||
506 .loc 1 255 5 view .LVU131
|
||
507 0040 5A6C ldr r2, [r3, #68]
|
||
508 0042 02F40062 and r2, r2, #2048
|
||
509 0046 0092 str r2, [sp]
|
||
255:Src/stm32f7xx_hal_msp.c ****
|
||
510 .loc 1 255 5 view .LVU132
|
||
511 0048 009A ldr r2, [sp]
|
||
512 .LBE10:
|
||
255:Src/stm32f7xx_hal_msp.c ****
|
||
513 .loc 1 255 5 view .LVU133
|
||
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
|
||
514 .loc 1 257 5 view .LVU134
|
||
515 .LBB11:
|
||
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
|
||
516 .loc 1 257 5 view .LVU135
|
||
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
|
||
517 .loc 1 257 5 view .LVU136
|
||
518 004a 1A6B ldr r2, [r3, #48]
|
||
519 004c 42F00402 orr r2, r2, #4
|
||
520 0050 1A63 str r2, [r3, #48]
|
||
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
|
||
521 .loc 1 257 5 view .LVU137
|
||
522 0052 1A6B ldr r2, [r3, #48]
|
||
523 0054 02F00402 and r2, r2, #4
|
||
524 0058 0192 str r2, [sp, #4]
|
||
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
|
||
525 .loc 1 257 5 view .LVU138
|
||
526 005a 019A ldr r2, [sp, #4]
|
||
527 .LBE11:
|
||
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
|
||
528 .loc 1 257 5 view .LVU139
|
||
258:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
529 .loc 1 258 5 view .LVU140
|
||
530 .LBB12:
|
||
258:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
531 .loc 1 258 5 view .LVU141
|
||
258:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
532 .loc 1 258 5 view .LVU142
|
||
533 005c 1A6B ldr r2, [r3, #48]
|
||
ARM GAS /tmp/ccROgBlG.s page 17
|
||
|
||
|
||
534 005e 42F00802 orr r2, r2, #8
|
||
535 0062 1A63 str r2, [r3, #48]
|
||
258:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
536 .loc 1 258 5 view .LVU143
|
||
537 0064 1B6B ldr r3, [r3, #48]
|
||
538 0066 03F00803 and r3, r3, #8
|
||
539 006a 0293 str r3, [sp, #8]
|
||
258:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
540 .loc 1 258 5 view .LVU144
|
||
541 006c 029B ldr r3, [sp, #8]
|
||
542 .LBE12:
|
||
258:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
543 .loc 1 258 5 view .LVU145
|
||
267:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
|
||
544 .loc 1 267 5 view .LVU146
|
||
267:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
|
||
545 .loc 1 267 25 is_stmt 0 view .LVU147
|
||
546 006e 4FF4F853 mov r3, #7936
|
||
547 0072 2793 str r3, [sp, #156]
|
||
269:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
548 .loc 1 269 5 is_stmt 1 view .LVU148
|
||
269:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
549 .loc 1 269 26 is_stmt 0 view .LVU149
|
||
550 0074 0227 movs r7, #2
|
||
551 0076 2897 str r7, [sp, #160]
|
||
270:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||
552 .loc 1 270 5 is_stmt 1 view .LVU150
|
||
270:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||
553 .loc 1 270 26 is_stmt 0 view .LVU151
|
||
554 0078 0026 movs r6, #0
|
||
555 007a 2996 str r6, [sp, #164]
|
||
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||
556 .loc 1 271 5 is_stmt 1 view .LVU152
|
||
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||
557 .loc 1 271 27 is_stmt 0 view .LVU153
|
||
558 007c 0325 movs r5, #3
|
||
559 007e 2A95 str r5, [sp, #168]
|
||
272:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||
560 .loc 1 272 5 is_stmt 1 view .LVU154
|
||
272:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||
561 .loc 1 272 31 is_stmt 0 view .LVU155
|
||
562 0080 0C24 movs r4, #12
|
||
563 .LVL30:
|
||
272:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||
564 .loc 1 272 31 view .LVU156
|
||
565 0082 2B94 str r4, [sp, #172]
|
||
273:Src/stm32f7xx_hal_msp.c ****
|
||
566 .loc 1 273 5 is_stmt 1 view .LVU157
|
||
567 0084 27A9 add r1, sp, #156
|
||
568 0086 0A48 ldr r0, .L27+8
|
||
569 0088 FFF7FEFF bl HAL_GPIO_Init
|
||
570 .LVL31:
|
||
275:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
571 .loc 1 275 5 view .LVU158
|
||
275:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
572 .loc 1 275 25 is_stmt 0 view .LVU159
|
||
573 008c 0423 movs r3, #4
|
||
ARM GAS /tmp/ccROgBlG.s page 18
|
||
|
||
|
||
574 008e 2793 str r3, [sp, #156]
|
||
276:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
575 .loc 1 276 5 is_stmt 1 view .LVU160
|
||
276:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
576 .loc 1 276 26 is_stmt 0 view .LVU161
|
||
577 0090 2897 str r7, [sp, #160]
|
||
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||
578 .loc 1 277 5 is_stmt 1 view .LVU162
|
||
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||
579 .loc 1 277 26 is_stmt 0 view .LVU163
|
||
580 0092 2996 str r6, [sp, #164]
|
||
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||
581 .loc 1 278 5 is_stmt 1 view .LVU164
|
||
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||
582 .loc 1 278 27 is_stmt 0 view .LVU165
|
||
583 0094 2A95 str r5, [sp, #168]
|
||
279:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
584 .loc 1 279 5 is_stmt 1 view .LVU166
|
||
279:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
585 .loc 1 279 31 is_stmt 0 view .LVU167
|
||
586 0096 2B94 str r4, [sp, #172]
|
||
280:Src/stm32f7xx_hal_msp.c ****
|
||
587 .loc 1 280 5 is_stmt 1 view .LVU168
|
||
588 0098 27A9 add r1, sp, #156
|
||
589 009a 0648 ldr r0, .L27+12
|
||
590 009c FFF7FEFF bl HAL_GPIO_Init
|
||
591 .LVL32:
|
||
592 .loc 1 288 1 is_stmt 0 view .LVU169
|
||
593 00a0 BFE7 b .L21
|
||
594 .LVL33:
|
||
595 .L26:
|
||
251:Src/stm32f7xx_hal_msp.c **** }
|
||
596 .loc 1 251 7 is_stmt 1 view .LVU170
|
||
597 00a2 FFF7FEFF bl Error_Handler
|
||
598 .LVL34:
|
||
599 00a6 C6E7 b .L23
|
||
600 .L28:
|
||
601 .align 2
|
||
602 .L27:
|
||
603 00a8 002C0140 .word 1073818624
|
||
604 00ac 00380240 .word 1073887232
|
||
605 00b0 00080240 .word 1073874944
|
||
606 00b4 000C0240 .word 1073875968
|
||
607 .cfi_endproc
|
||
608 .LFE1186:
|
||
610 .section .text.HAL_SD_MspDeInit,"ax",%progbits
|
||
611 .align 1
|
||
612 .global HAL_SD_MspDeInit
|
||
613 .syntax unified
|
||
614 .thumb
|
||
615 .thumb_func
|
||
616 .fpu fpv5-d16
|
||
618 HAL_SD_MspDeInit:
|
||
619 .LVL35:
|
||
620 .LFB1187:
|
||
289:Src/stm32f7xx_hal_msp.c ****
|
||
290:Src/stm32f7xx_hal_msp.c **** /**
|
||
ARM GAS /tmp/ccROgBlG.s page 19
|
||
|
||
|
||
291:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization
|
||
292:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
|
||
293:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
|
||
294:Src/stm32f7xx_hal_msp.c **** * @retval None
|
||
295:Src/stm32f7xx_hal_msp.c **** */
|
||
296:Src/stm32f7xx_hal_msp.c **** void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
|
||
297:Src/stm32f7xx_hal_msp.c **** {
|
||
621 .loc 1 297 1 view -0
|
||
622 .cfi_startproc
|
||
623 @ args = 0, pretend = 0, frame = 0
|
||
624 @ frame_needed = 0, uses_anonymous_args = 0
|
||
625 .loc 1 297 1 is_stmt 0 view .LVU172
|
||
626 0000 08B5 push {r3, lr}
|
||
627 .LCFI11:
|
||
628 .cfi_def_cfa_offset 8
|
||
629 .cfi_offset 3, -8
|
||
630 .cfi_offset 14, -4
|
||
298:Src/stm32f7xx_hal_msp.c **** if(hsd->Instance==SDMMC1)
|
||
631 .loc 1 298 3 is_stmt 1 view .LVU173
|
||
632 .loc 1 298 9 is_stmt 0 view .LVU174
|
||
633 0002 0268 ldr r2, [r0]
|
||
634 .loc 1 298 5 view .LVU175
|
||
635 0004 094B ldr r3, .L33
|
||
636 0006 9A42 cmp r2, r3
|
||
637 0008 00D0 beq .L32
|
||
638 .LVL36:
|
||
639 .L29:
|
||
299:Src/stm32f7xx_hal_msp.c **** {
|
||
300:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspDeInit 0 */
|
||
301:Src/stm32f7xx_hal_msp.c ****
|
||
302:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspDeInit 0 */
|
||
303:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
|
||
304:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SDMMC1_CLK_DISABLE();
|
||
305:Src/stm32f7xx_hal_msp.c ****
|
||
306:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
|
||
307:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
|
||
308:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
|
||
309:Src/stm32f7xx_hal_msp.c **** PC10 ------> SDMMC1_D2
|
||
310:Src/stm32f7xx_hal_msp.c **** PC11 ------> SDMMC1_D3
|
||
311:Src/stm32f7xx_hal_msp.c **** PC12 ------> SDMMC1_CK
|
||
312:Src/stm32f7xx_hal_msp.c **** PD2 ------> SDMMC1_CMD
|
||
313:Src/stm32f7xx_hal_msp.c **** */
|
||
314:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||
315:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
|
||
316:Src/stm32f7xx_hal_msp.c ****
|
||
317:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
|
||
318:Src/stm32f7xx_hal_msp.c ****
|
||
319:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspDeInit 1 */
|
||
320:Src/stm32f7xx_hal_msp.c ****
|
||
321:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspDeInit 1 */
|
||
322:Src/stm32f7xx_hal_msp.c **** }
|
||
323:Src/stm32f7xx_hal_msp.c ****
|
||
324:Src/stm32f7xx_hal_msp.c **** }
|
||
640 .loc 1 324 1 view .LVU176
|
||
641 000a 08BD pop {r3, pc}
|
||
642 .LVL37:
|
||
643 .L32:
|
||
ARM GAS /tmp/ccROgBlG.s page 20
|
||
|
||
|
||
304:Src/stm32f7xx_hal_msp.c ****
|
||
644 .loc 1 304 5 is_stmt 1 view .LVU177
|
||
645 000c 084A ldr r2, .L33+4
|
||
646 000e 536C ldr r3, [r2, #68]
|
||
647 0010 23F40063 bic r3, r3, #2048
|
||
648 0014 5364 str r3, [r2, #68]
|
||
314:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
|
||
649 .loc 1 314 5 view .LVU178
|
||
650 0016 4FF4F851 mov r1, #7936
|
||
651 001a 0648 ldr r0, .L33+8
|
||
652 .LVL38:
|
||
314:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
|
||
653 .loc 1 314 5 is_stmt 0 view .LVU179
|
||
654 001c FFF7FEFF bl HAL_GPIO_DeInit
|
||
655 .LVL39:
|
||
317:Src/stm32f7xx_hal_msp.c ****
|
||
656 .loc 1 317 5 is_stmt 1 view .LVU180
|
||
657 0020 0421 movs r1, #4
|
||
658 0022 0548 ldr r0, .L33+12
|
||
659 0024 FFF7FEFF bl HAL_GPIO_DeInit
|
||
660 .LVL40:
|
||
661 .loc 1 324 1 is_stmt 0 view .LVU181
|
||
662 0028 EFE7 b .L29
|
||
663 .L34:
|
||
664 002a 00BF .align 2
|
||
665 .L33:
|
||
666 002c 002C0140 .word 1073818624
|
||
667 0030 00380240 .word 1073887232
|
||
668 0034 00080240 .word 1073874944
|
||
669 0038 000C0240 .word 1073875968
|
||
670 .cfi_endproc
|
||
671 .LFE1187:
|
||
673 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits
|
||
674 .align 1
|
||
675 .global HAL_TIM_Base_MspInit
|
||
676 .syntax unified
|
||
677 .thumb
|
||
678 .thumb_func
|
||
679 .fpu fpv5-d16
|
||
681 HAL_TIM_Base_MspInit:
|
||
682 .LVL41:
|
||
683 .LFB1188:
|
||
325:Src/stm32f7xx_hal_msp.c ****
|
||
326:Src/stm32f7xx_hal_msp.c **** /**
|
||
327:Src/stm32f7xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
|
||
328:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
|
||
329:Src/stm32f7xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
|
||
330:Src/stm32f7xx_hal_msp.c **** * @retval None
|
||
331:Src/stm32f7xx_hal_msp.c **** */
|
||
332:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||
333:Src/stm32f7xx_hal_msp.c **** {
|
||
684 .loc 1 333 1 is_stmt 1 view -0
|
||
685 .cfi_startproc
|
||
686 @ args = 0, pretend = 0, frame = 8
|
||
687 @ frame_needed = 0, uses_anonymous_args = 0
|
||
334:Src/stm32f7xx_hal_msp.c **** if(htim_base->Instance==TIM10)
|
||
688 .loc 1 334 3 view .LVU183
|
||
ARM GAS /tmp/ccROgBlG.s page 21
|
||
|
||
|
||
689 .loc 1 334 15 is_stmt 0 view .LVU184
|
||
690 0000 0268 ldr r2, [r0]
|
||
691 .loc 1 334 5 view .LVU185
|
||
692 0002 0E4B ldr r3, .L42
|
||
693 0004 9A42 cmp r2, r3
|
||
694 0006 00D0 beq .L41
|
||
695 0008 7047 bx lr
|
||
696 .L41:
|
||
333:Src/stm32f7xx_hal_msp.c **** if(htim_base->Instance==TIM10)
|
||
697 .loc 1 333 1 view .LVU186
|
||
698 000a 00B5 push {lr}
|
||
699 .LCFI12:
|
||
700 .cfi_def_cfa_offset 4
|
||
701 .cfi_offset 14, -4
|
||
702 000c 83B0 sub sp, sp, #12
|
||
703 .LCFI13:
|
||
704 .cfi_def_cfa_offset 16
|
||
335:Src/stm32f7xx_hal_msp.c **** {
|
||
336:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 0 */
|
||
337:Src/stm32f7xx_hal_msp.c ****
|
||
338:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 0 */
|
||
339:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
|
||
340:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM10_CLK_ENABLE();
|
||
705 .loc 1 340 5 is_stmt 1 view .LVU187
|
||
706 .LBB13:
|
||
707 .loc 1 340 5 view .LVU188
|
||
708 .loc 1 340 5 view .LVU189
|
||
709 000e 03F57443 add r3, r3, #62464
|
||
710 0012 5A6C ldr r2, [r3, #68]
|
||
711 0014 42F40032 orr r2, r2, #131072
|
||
712 0018 5A64 str r2, [r3, #68]
|
||
713 .loc 1 340 5 view .LVU190
|
||
714 001a 5B6C ldr r3, [r3, #68]
|
||
715 001c 03F40033 and r3, r3, #131072
|
||
716 0020 0193 str r3, [sp, #4]
|
||
717 .loc 1 340 5 view .LVU191
|
||
718 0022 019B ldr r3, [sp, #4]
|
||
719 .LBE13:
|
||
720 .loc 1 340 5 view .LVU192
|
||
341:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
|
||
342:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
|
||
721 .loc 1 342 5 view .LVU193
|
||
722 0024 0022 movs r2, #0
|
||
723 0026 1146 mov r1, r2
|
||
724 0028 1920 movs r0, #25
|
||
725 .LVL42:
|
||
726 .loc 1 342 5 is_stmt 0 view .LVU194
|
||
727 002a FFF7FEFF bl HAL_NVIC_SetPriority
|
||
728 .LVL43:
|
||
343:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
|
||
729 .loc 1 343 5 is_stmt 1 view .LVU195
|
||
730 002e 1920 movs r0, #25
|
||
731 0030 FFF7FEFF bl HAL_NVIC_EnableIRQ
|
||
732 .LVL44:
|
||
344:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */
|
||
345:Src/stm32f7xx_hal_msp.c ****
|
||
346:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 1 */
|
||
ARM GAS /tmp/ccROgBlG.s page 22
|
||
|
||
|
||
347:Src/stm32f7xx_hal_msp.c ****
|
||
348:Src/stm32f7xx_hal_msp.c **** }
|
||
349:Src/stm32f7xx_hal_msp.c ****
|
||
350:Src/stm32f7xx_hal_msp.c **** }
|
||
733 .loc 1 350 1 is_stmt 0 view .LVU196
|
||
734 0034 03B0 add sp, sp, #12
|
||
735 .LCFI14:
|
||
736 .cfi_def_cfa_offset 4
|
||
737 @ sp needed
|
||
738 0036 5DF804FB ldr pc, [sp], #4
|
||
739 .L43:
|
||
740 003a 00BF .align 2
|
||
741 .L42:
|
||
742 003c 00440140 .word 1073824768
|
||
743 .cfi_endproc
|
||
744 .LFE1188:
|
||
746 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
|
||
747 .align 1
|
||
748 .global HAL_TIM_Base_MspDeInit
|
||
749 .syntax unified
|
||
750 .thumb
|
||
751 .thumb_func
|
||
752 .fpu fpv5-d16
|
||
754 HAL_TIM_Base_MspDeInit:
|
||
755 .LVL45:
|
||
756 .LFB1189:
|
||
351:Src/stm32f7xx_hal_msp.c ****
|
||
352:Src/stm32f7xx_hal_msp.c **** /**
|
||
353:Src/stm32f7xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
|
||
354:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
|
||
355:Src/stm32f7xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
|
||
356:Src/stm32f7xx_hal_msp.c **** * @retval None
|
||
357:Src/stm32f7xx_hal_msp.c **** */
|
||
358:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||
359:Src/stm32f7xx_hal_msp.c **** {
|
||
757 .loc 1 359 1 is_stmt 1 view -0
|
||
758 .cfi_startproc
|
||
759 @ args = 0, pretend = 0, frame = 0
|
||
760 @ frame_needed = 0, uses_anonymous_args = 0
|
||
761 .loc 1 359 1 is_stmt 0 view .LVU198
|
||
762 0000 08B5 push {r3, lr}
|
||
763 .LCFI15:
|
||
764 .cfi_def_cfa_offset 8
|
||
765 .cfi_offset 3, -8
|
||
766 .cfi_offset 14, -4
|
||
360:Src/stm32f7xx_hal_msp.c **** if(htim_base->Instance==TIM10)
|
||
767 .loc 1 360 3 is_stmt 1 view .LVU199
|
||
768 .loc 1 360 15 is_stmt 0 view .LVU200
|
||
769 0002 0268 ldr r2, [r0]
|
||
770 .loc 1 360 5 view .LVU201
|
||
771 0004 064B ldr r3, .L48
|
||
772 0006 9A42 cmp r2, r3
|
||
773 0008 00D0 beq .L47
|
||
774 .LVL46:
|
||
775 .L44:
|
||
361:Src/stm32f7xx_hal_msp.c **** {
|
||
362:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 0 */
|
||
ARM GAS /tmp/ccROgBlG.s page 23
|
||
|
||
|
||
363:Src/stm32f7xx_hal_msp.c ****
|
||
364:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspDeInit 0 */
|
||
365:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
|
||
366:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM10_CLK_DISABLE();
|
||
367:Src/stm32f7xx_hal_msp.c ****
|
||
368:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt DeInit */
|
||
369:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn);
|
||
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
|
||
371:Src/stm32f7xx_hal_msp.c ****
|
||
372:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspDeInit 1 */
|
||
373:Src/stm32f7xx_hal_msp.c **** }
|
||
374:Src/stm32f7xx_hal_msp.c ****
|
||
375:Src/stm32f7xx_hal_msp.c **** }
|
||
776 .loc 1 375 1 view .LVU202
|
||
777 000a 08BD pop {r3, pc}
|
||
778 .LVL47:
|
||
779 .L47:
|
||
366:Src/stm32f7xx_hal_msp.c ****
|
||
780 .loc 1 366 5 is_stmt 1 view .LVU203
|
||
781 000c 054A ldr r2, .L48+4
|
||
782 000e 536C ldr r3, [r2, #68]
|
||
783 0010 23F40033 bic r3, r3, #131072
|
||
784 0014 5364 str r3, [r2, #68]
|
||
369:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
|
||
785 .loc 1 369 5 view .LVU204
|
||
786 0016 1920 movs r0, #25
|
||
787 .LVL48:
|
||
369:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
|
||
788 .loc 1 369 5 is_stmt 0 view .LVU205
|
||
789 0018 FFF7FEFF bl HAL_NVIC_DisableIRQ
|
||
790 .LVL49:
|
||
791 .loc 1 375 1 view .LVU206
|
||
792 001c F5E7 b .L44
|
||
793 .L49:
|
||
794 001e 00BF .align 2
|
||
795 .L48:
|
||
796 0020 00440140 .word 1073824768
|
||
797 0024 00380240 .word 1073887232
|
||
798 .cfi_endproc
|
||
799 .LFE1189:
|
||
801 .text
|
||
802 .Letext0:
|
||
803 .file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h"
|
||
804 .file 3 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
|
||
805 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
|
||
806 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
|
||
807 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
|
||
808 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
|
||
809 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
|
||
810 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
|
||
811 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
|
||
812 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
|
||
813 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
|
||
814 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
|
||
815 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
|
||
816 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
|
||
817 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
|
||
ARM GAS /tmp/ccROgBlG.s page 24
|
||
|
||
|
||
818 .file 17 "Inc/main.h"
|
||
819 .file 18 "<built-in>"
|
||
ARM GAS /tmp/ccROgBlG.s page 25
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:0000000000000000 stm32f7xx_hal_msp.c
|
||
/tmp/ccROgBlG.s:17 .text.HAL_MspInit:0000000000000000 $t
|
||
/tmp/ccROgBlG.s:25 .text.HAL_MspInit:0000000000000000 HAL_MspInit
|
||
/tmp/ccROgBlG.s:76 .text.HAL_MspInit:000000000000002c $d
|
||
/tmp/ccROgBlG.s:81 .text.HAL_ADC_MspInit:0000000000000000 $t
|
||
/tmp/ccROgBlG.s:88 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit
|
||
/tmp/ccROgBlG.s:319 .text.HAL_ADC_MspInit:00000000000000f4 $d
|
||
/tmp/ccROgBlG.s:330 .text.HAL_ADC_MspDeInit:0000000000000000 $t
|
||
/tmp/ccROgBlG.s:337 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit
|
||
/tmp/ccROgBlG.s:410 .text.HAL_ADC_MspDeInit:0000000000000050 $d
|
||
/tmp/ccROgBlG.s:420 .text.HAL_SD_MspInit:0000000000000000 $t
|
||
/tmp/ccROgBlG.s:427 .text.HAL_SD_MspInit:0000000000000000 HAL_SD_MspInit
|
||
/tmp/ccROgBlG.s:603 .text.HAL_SD_MspInit:00000000000000a8 $d
|
||
/tmp/ccROgBlG.s:611 .text.HAL_SD_MspDeInit:0000000000000000 $t
|
||
/tmp/ccROgBlG.s:618 .text.HAL_SD_MspDeInit:0000000000000000 HAL_SD_MspDeInit
|
||
/tmp/ccROgBlG.s:666 .text.HAL_SD_MspDeInit:000000000000002c $d
|
||
/tmp/ccROgBlG.s:674 .text.HAL_TIM_Base_MspInit:0000000000000000 $t
|
||
/tmp/ccROgBlG.s:681 .text.HAL_TIM_Base_MspInit:0000000000000000 HAL_TIM_Base_MspInit
|
||
/tmp/ccROgBlG.s:742 .text.HAL_TIM_Base_MspInit:000000000000003c $d
|
||
/tmp/ccROgBlG.s:747 .text.HAL_TIM_Base_MspDeInit:0000000000000000 $t
|
||
/tmp/ccROgBlG.s:754 .text.HAL_TIM_Base_MspDeInit:0000000000000000 HAL_TIM_Base_MspDeInit
|
||
/tmp/ccROgBlG.s:796 .text.HAL_TIM_Base_MspDeInit:0000000000000020 $d
|
||
|
||
UNDEFINED SYMBOLS
|
||
HAL_GPIO_Init
|
||
HAL_NVIC_SetPriority
|
||
HAL_NVIC_EnableIRQ
|
||
HAL_GPIO_DeInit
|
||
memset
|
||
HAL_RCCEx_PeriphCLKConfig
|
||
Error_Handler
|
||
HAL_NVIC_DisableIRQ
|