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b02e3a35b73acf87c0d9a851bdb961b4df5d7083
RadioPhotonic_PCB_software/build/stm32f7xx_hal_msp.lst
feda b02e3a35b7 solved laser current setup timing issue
2025-03-04 11:43:09 +03:00

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ARM GAS /tmp/ccspVlUR.s page 1
1 .cpu cortex-m7
2 .eabi_attribute 28, 1
3 .eabi_attribute 20, 1
4 .eabi_attribute 21, 1
5 .eabi_attribute 23, 3
6 .eabi_attribute 24, 1
7 .eabi_attribute 25, 1
8 .eabi_attribute 26, 1
9 .eabi_attribute 30, 1
10 .eabi_attribute 34, 1
11 .eabi_attribute 18, 4
12 .file "stm32f7xx_hal_msp.c"
13 .text
14 .Ltext0:
15 .cfi_sections .debug_frame
16 .section .text.HAL_MspInit,"ax",%progbits
17 .align 1
18 .global HAL_MspInit
19 .arch armv7e-m
20 .syntax unified
21 .thumb
22 .thumb_func
23 .fpu fpv5-d16
25 HAL_MspInit:
26 .LFB1183:
27 .file 1 "Src/stm32f7xx_hal_msp.c"
1:Src/stm32f7xx_hal_msp.c ****
2:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Header */
3:Src/stm32f7xx_hal_msp.c **** /**
4:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
5:Src/stm32f7xx_hal_msp.c **** * @file stm32f7xx_hal_msp.c
6:Src/stm32f7xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
7:Src/stm32f7xx_hal_msp.c **** * and de-Initialization codes.
8:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
9:Src/stm32f7xx_hal_msp.c **** * @attention
10:Src/stm32f7xx_hal_msp.c **** *
11:Src/stm32f7xx_hal_msp.c **** * Copyright (c) 2023 STMicroelectronics.
12:Src/stm32f7xx_hal_msp.c **** * All rights reserved.
13:Src/stm32f7xx_hal_msp.c **** *
14:Src/stm32f7xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file
15:Src/stm32f7xx_hal_msp.c **** * in the root directory of this software component.
16:Src/stm32f7xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
17:Src/stm32f7xx_hal_msp.c **** *
18:Src/stm32f7xx_hal_msp.c **** ******************************************************************************
19:Src/stm32f7xx_hal_msp.c **** */
20:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Header */
21:Src/stm32f7xx_hal_msp.c ****
22:Src/stm32f7xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
23:Src/stm32f7xx_hal_msp.c **** #include "main.h"
24:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Includes */
25:Src/stm32f7xx_hal_msp.c ****
26:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Includes */
27:Src/stm32f7xx_hal_msp.c ****
28:Src/stm32f7xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
29:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TD */
30:Src/stm32f7xx_hal_msp.c ****
31:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */
ARM GAS /tmp/ccspVlUR.s page 2
32:Src/stm32f7xx_hal_msp.c ****
33:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
34:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Define */
35:Src/stm32f7xx_hal_msp.c ****
36:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Define */
37:Src/stm32f7xx_hal_msp.c ****
38:Src/stm32f7xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
39:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN Macro */
40:Src/stm32f7xx_hal_msp.c ****
41:Src/stm32f7xx_hal_msp.c **** /* USER CODE END Macro */
42:Src/stm32f7xx_hal_msp.c ****
43:Src/stm32f7xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
44:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN PV */
45:Src/stm32f7xx_hal_msp.c ****
46:Src/stm32f7xx_hal_msp.c **** /* USER CODE END PV */
47:Src/stm32f7xx_hal_msp.c ****
48:Src/stm32f7xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
49:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN PFP */
50:Src/stm32f7xx_hal_msp.c ****
51:Src/stm32f7xx_hal_msp.c **** /* USER CODE END PFP */
52:Src/stm32f7xx_hal_msp.c ****
53:Src/stm32f7xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
54:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
55:Src/stm32f7xx_hal_msp.c ****
56:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
57:Src/stm32f7xx_hal_msp.c ****
58:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN 0 */
59:Src/stm32f7xx_hal_msp.c ****
60:Src/stm32f7xx_hal_msp.c **** /* USER CODE END 0 */
61:Src/stm32f7xx_hal_msp.c ****
62:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
63:Src/stm32f7xx_hal_msp.c **** /**
64:Src/stm32f7xx_hal_msp.c **** * Initializes the Global MSP.
65:Src/stm32f7xx_hal_msp.c **** */
66:Src/stm32f7xx_hal_msp.c **** void HAL_MspInit(void)
67:Src/stm32f7xx_hal_msp.c **** {
28 .loc 1 67 1 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 8
31 @ frame_needed = 0, uses_anonymous_args = 0
32 @ link register save eliminated.
33 0000 82B0 sub sp, sp, #8
34 .LCFI0:
35 .cfi_def_cfa_offset 8
68:Src/stm32f7xx_hal_msp.c ****
69:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
70:Src/stm32f7xx_hal_msp.c ****
71:Src/stm32f7xx_hal_msp.c **** /* USER CODE END MspInit 0 */
72:Src/stm32f7xx_hal_msp.c ****
73:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
36 .loc 1 73 3 view .LVU1
37 .LBB2:
38 .loc 1 73 3 view .LVU2
39 .loc 1 73 3 view .LVU3
40 0002 0A4B ldr r3, .L3
41 0004 1A6C ldr r2, [r3, #64]
42 0006 42F08052 orr r2, r2, #268435456
ARM GAS /tmp/ccspVlUR.s page 3
43 000a 1A64 str r2, [r3, #64]
44 .loc 1 73 3 view .LVU4
45 000c 1A6C ldr r2, [r3, #64]
46 000e 02F08052 and r2, r2, #268435456
47 0012 0092 str r2, [sp]
48 .loc 1 73 3 view .LVU5
49 0014 009A ldr r2, [sp]
50 .LBE2:
51 .loc 1 73 3 view .LVU6
74:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
52 .loc 1 74 3 view .LVU7
53 .LBB3:
54 .loc 1 74 3 view .LVU8
55 .loc 1 74 3 view .LVU9
56 0016 5A6C ldr r2, [r3, #68]
57 0018 42F48042 orr r2, r2, #16384
58 001c 5A64 str r2, [r3, #68]
59 .loc 1 74 3 view .LVU10
60 001e 5B6C ldr r3, [r3, #68]
61 0020 03F48043 and r3, r3, #16384
62 0024 0193 str r3, [sp, #4]
63 .loc 1 74 3 view .LVU11
64 0026 019B ldr r3, [sp, #4]
65 .LBE3:
66 .loc 1 74 3 view .LVU12
75:Src/stm32f7xx_hal_msp.c ****
76:Src/stm32f7xx_hal_msp.c **** /* System interrupt init*/
77:Src/stm32f7xx_hal_msp.c ****
78:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
79:Src/stm32f7xx_hal_msp.c ****
80:Src/stm32f7xx_hal_msp.c **** /* USER CODE END MspInit 1 */
81:Src/stm32f7xx_hal_msp.c **** }
67 .loc 1 81 1 is_stmt 0 view .LVU13
68 0028 02B0 add sp, sp, #8
69 .LCFI1:
70 .cfi_def_cfa_offset 0
71 @ sp needed
72 002a 7047 bx lr
73 .L4:
74 .align 2
75 .L3:
76 002c 00380240 .word 1073887232
77 .cfi_endproc
78 .LFE1183:
80 .section .text.HAL_ADC_MspInit,"ax",%progbits
81 .align 1
82 .global HAL_ADC_MspInit
83 .syntax unified
84 .thumb
85 .thumb_func
86 .fpu fpv5-d16
88 HAL_ADC_MspInit:
89 .LVL0:
90 .LFB1184:
82:Src/stm32f7xx_hal_msp.c ****
83:Src/stm32f7xx_hal_msp.c **** /**
84:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization
ARM GAS /tmp/ccspVlUR.s page 4
85:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
86:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
87:Src/stm32f7xx_hal_msp.c **** * @retval None
88:Src/stm32f7xx_hal_msp.c **** */
89:Src/stm32f7xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
90:Src/stm32f7xx_hal_msp.c **** {
91 .loc 1 90 1 is_stmt 1 view -0
92 .cfi_startproc
93 @ args = 0, pretend = 0, frame = 48
94 @ frame_needed = 0, uses_anonymous_args = 0
95 .loc 1 90 1 is_stmt 0 view .LVU15
96 0000 30B5 push {r4, r5, lr}
97 .LCFI2:
98 .cfi_def_cfa_offset 12
99 .cfi_offset 4, -12
100 .cfi_offset 5, -8
101 .cfi_offset 14, -4
102 0002 8DB0 sub sp, sp, #52
103 .LCFI3:
104 .cfi_def_cfa_offset 64
91:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
105 .loc 1 91 3 is_stmt 1 view .LVU16
106 .loc 1 91 20 is_stmt 0 view .LVU17
107 0004 0023 movs r3, #0
108 0006 0793 str r3, [sp, #28]
109 0008 0893 str r3, [sp, #32]
110 000a 0993 str r3, [sp, #36]
111 000c 0A93 str r3, [sp, #40]
112 000e 0B93 str r3, [sp, #44]
92:Src/stm32f7xx_hal_msp.c **** if(hadc->Instance==ADC1)
113 .loc 1 92 3 is_stmt 1 view .LVU18
114 .loc 1 92 10 is_stmt 0 view .LVU19
115 0010 0368 ldr r3, [r0]
116 .loc 1 92 5 view .LVU20
117 0012 384A ldr r2, .L11
118 0014 9342 cmp r3, r2
119 0016 04D0 beq .L9
93:Src/stm32f7xx_hal_msp.c **** {
94:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
95:Src/stm32f7xx_hal_msp.c ****
96:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */
97:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
98:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE();
99:Src/stm32f7xx_hal_msp.c ****
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
102:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
103:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
104:Src/stm32f7xx_hal_msp.c **** PC0 ------> ADC1_IN10
105:Src/stm32f7xx_hal_msp.c **** PC1 ------> ADC1_IN11
106:Src/stm32f7xx_hal_msp.c **** PA2 ------> ADC1_IN2
107:Src/stm32f7xx_hal_msp.c **** PB0 ------> ADC1_IN8
108:Src/stm32f7xx_hal_msp.c **** PB1 ------> ADC1_IN9
109:Src/stm32f7xx_hal_msp.c **** */
110:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
112:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
ARM GAS /tmp/ccspVlUR.s page 5
113:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
114:Src/stm32f7xx_hal_msp.c ****
115:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
116:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
117:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
118:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
119:Src/stm32f7xx_hal_msp.c ****
120:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
121:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
122:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
123:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
124:Src/stm32f7xx_hal_msp.c ****
125:Src/stm32f7xx_hal_msp.c **** /* ADC1 interrupt Init */
126:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
127:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
128:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
129:Src/stm32f7xx_hal_msp.c ****
130:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
131:Src/stm32f7xx_hal_msp.c **** }
132:Src/stm32f7xx_hal_msp.c **** else if(hadc->Instance==ADC3)
120 .loc 1 132 8 is_stmt 1 view .LVU21
121 .loc 1 132 10 is_stmt 0 view .LVU22
122 0018 374A ldr r2, .L11+4
123 001a 9342 cmp r3, r2
124 001c 46D0 beq .L10
125 .LVL1:
126 .L5:
133:Src/stm32f7xx_hal_msp.c **** {
134:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 0 */
135:Src/stm32f7xx_hal_msp.c ****
136:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspInit 0 */
137:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
138:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC3_CLK_ENABLE();
139:Src/stm32f7xx_hal_msp.c ****
140:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
141:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
142:Src/stm32f7xx_hal_msp.c **** PF5 ------> ADC3_IN15
143:Src/stm32f7xx_hal_msp.c **** */
144:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_5;
145:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
146:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
147:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
148:Src/stm32f7xx_hal_msp.c ****
149:Src/stm32f7xx_hal_msp.c **** /* ADC3 interrupt Init */
150:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
151:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
152:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 1 */
153:Src/stm32f7xx_hal_msp.c ****
154:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspInit 1 */
155:Src/stm32f7xx_hal_msp.c **** }
156:Src/stm32f7xx_hal_msp.c ****
157:Src/stm32f7xx_hal_msp.c **** }
127 .loc 1 157 1 view .LVU23
128 001e 0DB0 add sp, sp, #52
129 .LCFI4:
130 .cfi_remember_state
131 .cfi_def_cfa_offset 12
ARM GAS /tmp/ccspVlUR.s page 6
132 @ sp needed
133 0020 30BD pop {r4, r5, pc}
134 .LVL2:
135 .L9:
136 .LCFI5:
137 .cfi_restore_state
98:Src/stm32f7xx_hal_msp.c ****
138 .loc 1 98 5 is_stmt 1 view .LVU24
139 .LBB4:
98:Src/stm32f7xx_hal_msp.c ****
140 .loc 1 98 5 view .LVU25
98:Src/stm32f7xx_hal_msp.c ****
141 .loc 1 98 5 view .LVU26
142 0022 364B ldr r3, .L11+8
143 0024 5A6C ldr r2, [r3, #68]
144 0026 42F48072 orr r2, r2, #256
145 002a 5A64 str r2, [r3, #68]
98:Src/stm32f7xx_hal_msp.c ****
146 .loc 1 98 5 view .LVU27
147 002c 5A6C ldr r2, [r3, #68]
148 002e 02F48072 and r2, r2, #256
149 0032 0192 str r2, [sp, #4]
98:Src/stm32f7xx_hal_msp.c ****
150 .loc 1 98 5 view .LVU28
151 0034 019A ldr r2, [sp, #4]
152 .LBE4:
98:Src/stm32f7xx_hal_msp.c ****
153 .loc 1 98 5 view .LVU29
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
154 .loc 1 100 5 view .LVU30
155 .LBB5:
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
156 .loc 1 100 5 view .LVU31
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
157 .loc 1 100 5 view .LVU32
158 0036 1A6B ldr r2, [r3, #48]
159 0038 42F00402 orr r2, r2, #4
160 003c 1A63 str r2, [r3, #48]
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
161 .loc 1 100 5 view .LVU33
162 003e 1A6B ldr r2, [r3, #48]
163 0040 02F00402 and r2, r2, #4
164 0044 0292 str r2, [sp, #8]
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
165 .loc 1 100 5 view .LVU34
166 0046 029A ldr r2, [sp, #8]
167 .LBE5:
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
168 .loc 1 100 5 view .LVU35
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
169 .loc 1 101 5 view .LVU36
170 .LBB6:
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
171 .loc 1 101 5 view .LVU37
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
172 .loc 1 101 5 view .LVU38
173 0048 1A6B ldr r2, [r3, #48]
ARM GAS /tmp/ccspVlUR.s page 7
174 004a 42F00102 orr r2, r2, #1
175 004e 1A63 str r2, [r3, #48]
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
176 .loc 1 101 5 view .LVU39
177 0050 1A6B ldr r2, [r3, #48]
178 0052 02F00102 and r2, r2, #1
179 0056 0392 str r2, [sp, #12]
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
180 .loc 1 101 5 view .LVU40
181 0058 039A ldr r2, [sp, #12]
182 .LBE6:
101:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
183 .loc 1 101 5 view .LVU41
102:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
184 .loc 1 102 5 view .LVU42
185 .LBB7:
102:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
186 .loc 1 102 5 view .LVU43
102:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
187 .loc 1 102 5 view .LVU44
188 005a 1A6B ldr r2, [r3, #48]
189 005c 42F00202 orr r2, r2, #2
190 0060 1A63 str r2, [r3, #48]
102:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
191 .loc 1 102 5 view .LVU45
192 0062 1B6B ldr r3, [r3, #48]
193 0064 03F00203 and r3, r3, #2
194 0068 0493 str r3, [sp, #16]
102:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
195 .loc 1 102 5 view .LVU46
196 006a 049B ldr r3, [sp, #16]
197 .LBE7:
102:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
198 .loc 1 102 5 view .LVU47
110:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
199 .loc 1 110 5 view .LVU48
110:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
200 .loc 1 110 25 is_stmt 0 view .LVU49
201 006c 0324 movs r4, #3
202 006e 0794 str r4, [sp, #28]
111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
203 .loc 1 111 5 is_stmt 1 view .LVU50
111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
204 .loc 1 111 26 is_stmt 0 view .LVU51
205 0070 0894 str r4, [sp, #32]
112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
206 .loc 1 112 5 is_stmt 1 view .LVU52
113:Src/stm32f7xx_hal_msp.c ****
207 .loc 1 113 5 view .LVU53
208 0072 07A9 add r1, sp, #28
209 0074 2248 ldr r0, .L11+12
210 .LVL3:
113:Src/stm32f7xx_hal_msp.c ****
211 .loc 1 113 5 is_stmt 0 view .LVU54
212 0076 FFF7FEFF bl HAL_GPIO_Init
213 .LVL4:
115:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
ARM GAS /tmp/ccspVlUR.s page 8
214 .loc 1 115 5 is_stmt 1 view .LVU55
115:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
215 .loc 1 115 25 is_stmt 0 view .LVU56
216 007a 0423 movs r3, #4
217 007c 0793 str r3, [sp, #28]
116:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
218 .loc 1 116 5 is_stmt 1 view .LVU57
116:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
219 .loc 1 116 26 is_stmt 0 view .LVU58
220 007e 0894 str r4, [sp, #32]
117:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
221 .loc 1 117 5 is_stmt 1 view .LVU59
117:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
222 .loc 1 117 26 is_stmt 0 view .LVU60
223 0080 0025 movs r5, #0
224 0082 0995 str r5, [sp, #36]
118:Src/stm32f7xx_hal_msp.c ****
225 .loc 1 118 5 is_stmt 1 view .LVU61
226 0084 07A9 add r1, sp, #28
227 0086 1F48 ldr r0, .L11+16
228 0088 FFF7FEFF bl HAL_GPIO_Init
229 .LVL5:
120:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
230 .loc 1 120 5 view .LVU62
120:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
231 .loc 1 120 25 is_stmt 0 view .LVU63
232 008c 0794 str r4, [sp, #28]
121:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
233 .loc 1 121 5 is_stmt 1 view .LVU64
121:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
234 .loc 1 121 26 is_stmt 0 view .LVU65
235 008e 0894 str r4, [sp, #32]
122:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
236 .loc 1 122 5 is_stmt 1 view .LVU66
122:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
237 .loc 1 122 26 is_stmt 0 view .LVU67
238 0090 0995 str r5, [sp, #36]
123:Src/stm32f7xx_hal_msp.c ****
239 .loc 1 123 5 is_stmt 1 view .LVU68
240 0092 07A9 add r1, sp, #28
241 0094 1C48 ldr r0, .L11+20
242 0096 FFF7FEFF bl HAL_GPIO_Init
243 .LVL6:
126:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
244 .loc 1 126 5 view .LVU69
245 009a 2A46 mov r2, r5
246 009c 2946 mov r1, r5
247 009e 1220 movs r0, #18
248 00a0 FFF7FEFF bl HAL_NVIC_SetPriority
249 .LVL7:
127:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
250 .loc 1 127 5 view .LVU70
251 00a4 1220 movs r0, #18
252 00a6 FFF7FEFF bl HAL_NVIC_EnableIRQ
253 .LVL8:
254 00aa B8E7 b .L5
255 .LVL9:
ARM GAS /tmp/ccspVlUR.s page 9
256 .L10:
138:Src/stm32f7xx_hal_msp.c ****
257 .loc 1 138 5 view .LVU71
258 .LBB8:
138:Src/stm32f7xx_hal_msp.c ****
259 .loc 1 138 5 view .LVU72
138:Src/stm32f7xx_hal_msp.c ****
260 .loc 1 138 5 view .LVU73
261 00ac 134B ldr r3, .L11+8
262 00ae 5A6C ldr r2, [r3, #68]
263 00b0 42F48062 orr r2, r2, #1024
264 00b4 5A64 str r2, [r3, #68]
138:Src/stm32f7xx_hal_msp.c ****
265 .loc 1 138 5 view .LVU74
266 00b6 5A6C ldr r2, [r3, #68]
267 00b8 02F48062 and r2, r2, #1024
268 00bc 0592 str r2, [sp, #20]
138:Src/stm32f7xx_hal_msp.c ****
269 .loc 1 138 5 view .LVU75
270 00be 059A ldr r2, [sp, #20]
271 .LBE8:
138:Src/stm32f7xx_hal_msp.c ****
272 .loc 1 138 5 view .LVU76
140:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
273 .loc 1 140 5 view .LVU77
274 .LBB9:
140:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
275 .loc 1 140 5 view .LVU78
140:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
276 .loc 1 140 5 view .LVU79
277 00c0 1A6B ldr r2, [r3, #48]
278 00c2 42F02002 orr r2, r2, #32
279 00c6 1A63 str r2, [r3, #48]
140:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
280 .loc 1 140 5 view .LVU80
281 00c8 1B6B ldr r3, [r3, #48]
282 00ca 03F02003 and r3, r3, #32
283 00ce 0693 str r3, [sp, #24]
140:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
284 .loc 1 140 5 view .LVU81
285 00d0 069B ldr r3, [sp, #24]
286 .LBE9:
140:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
287 .loc 1 140 5 view .LVU82
144:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
288 .loc 1 144 5 view .LVU83
144:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
289 .loc 1 144 25 is_stmt 0 view .LVU84
290 00d2 2023 movs r3, #32
291 00d4 0793 str r3, [sp, #28]
145:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
292 .loc 1 145 5 is_stmt 1 view .LVU85
145:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
293 .loc 1 145 26 is_stmt 0 view .LVU86
294 00d6 0323 movs r3, #3
295 00d8 0893 str r3, [sp, #32]
146:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
ARM GAS /tmp/ccspVlUR.s page 10
296 .loc 1 146 5 is_stmt 1 view .LVU87
147:Src/stm32f7xx_hal_msp.c ****
297 .loc 1 147 5 view .LVU88
298 00da 07A9 add r1, sp, #28
299 00dc 0B48 ldr r0, .L11+24
300 .LVL10:
147:Src/stm32f7xx_hal_msp.c ****
301 .loc 1 147 5 is_stmt 0 view .LVU89
302 00de FFF7FEFF bl HAL_GPIO_Init
303 .LVL11:
150:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(ADC_IRQn);
304 .loc 1 150 5 is_stmt 1 view .LVU90
305 00e2 0022 movs r2, #0
306 00e4 1146 mov r1, r2
307 00e6 1220 movs r0, #18
308 00e8 FFF7FEFF bl HAL_NVIC_SetPriority
309 .LVL12:
151:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspInit 1 */
310 .loc 1 151 5 view .LVU91
311 00ec 1220 movs r0, #18
312 00ee FFF7FEFF bl HAL_NVIC_EnableIRQ
313 .LVL13:
314 .loc 1 157 1 is_stmt 0 view .LVU92
315 00f2 94E7 b .L5
316 .L12:
317 .align 2
318 .L11:
319 00f4 00200140 .word 1073815552
320 00f8 00220140 .word 1073816064
321 00fc 00380240 .word 1073887232
322 0100 00080240 .word 1073874944
323 0104 00000240 .word 1073872896
324 0108 00040240 .word 1073873920
325 010c 00140240 .word 1073878016
326 .cfi_endproc
327 .LFE1184:
329 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
330 .align 1
331 .global HAL_ADC_MspDeInit
332 .syntax unified
333 .thumb
334 .thumb_func
335 .fpu fpv5-d16
337 HAL_ADC_MspDeInit:
338 .LVL14:
339 .LFB1185:
158:Src/stm32f7xx_hal_msp.c ****
159:Src/stm32f7xx_hal_msp.c **** /**
160:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP De-Initialization
161:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
162:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
163:Src/stm32f7xx_hal_msp.c **** * @retval None
164:Src/stm32f7xx_hal_msp.c **** */
165:Src/stm32f7xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
166:Src/stm32f7xx_hal_msp.c **** {
340 .loc 1 166 1 is_stmt 1 view -0
341 .cfi_startproc
ARM GAS /tmp/ccspVlUR.s page 11
342 @ args = 0, pretend = 0, frame = 0
343 @ frame_needed = 0, uses_anonymous_args = 0
344 .loc 1 166 1 is_stmt 0 view .LVU94
345 0000 08B5 push {r3, lr}
346 .LCFI6:
347 .cfi_def_cfa_offset 8
348 .cfi_offset 3, -8
349 .cfi_offset 14, -4
167:Src/stm32f7xx_hal_msp.c **** if(hadc->Instance==ADC1)
350 .loc 1 167 3 is_stmt 1 view .LVU95
351 .loc 1 167 10 is_stmt 0 view .LVU96
352 0002 0368 ldr r3, [r0]
353 .loc 1 167 5 view .LVU97
354 0004 124A ldr r2, .L19
355 0006 9342 cmp r3, r2
356 0008 03D0 beq .L17
168:Src/stm32f7xx_hal_msp.c **** {
169:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
170:Src/stm32f7xx_hal_msp.c ****
171:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
172:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
173:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE();
174:Src/stm32f7xx_hal_msp.c ****
175:Src/stm32f7xx_hal_msp.c **** /**ADC1 GPIO Configuration
176:Src/stm32f7xx_hal_msp.c **** PC0 ------> ADC1_IN10
177:Src/stm32f7xx_hal_msp.c **** PC1 ------> ADC1_IN11
178:Src/stm32f7xx_hal_msp.c **** PA2 ------> ADC1_IN2
179:Src/stm32f7xx_hal_msp.c **** PB0 ------> ADC1_IN8
180:Src/stm32f7xx_hal_msp.c **** PB1 ------> ADC1_IN9
181:Src/stm32f7xx_hal_msp.c **** */
182:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1);
183:Src/stm32f7xx_hal_msp.c ****
184:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2);
185:Src/stm32f7xx_hal_msp.c ****
186:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
187:Src/stm32f7xx_hal_msp.c ****
188:Src/stm32f7xx_hal_msp.c **** /* ADC1 interrupt DeInit */
189:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1:ADC_IRQn disable */
190:Src/stm32f7xx_hal_msp.c **** /**
191:Src/stm32f7xx_hal_msp.c **** * Uncomment the line below to disable the "ADC_IRQn" interrupt
192:Src/stm32f7xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
193:Src/stm32f7xx_hal_msp.c **** */
194:Src/stm32f7xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC_IRQn); */
195:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1:ADC_IRQn disable */
196:Src/stm32f7xx_hal_msp.c ****
197:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
198:Src/stm32f7xx_hal_msp.c ****
199:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
200:Src/stm32f7xx_hal_msp.c **** }
201:Src/stm32f7xx_hal_msp.c **** else if(hadc->Instance==ADC3)
357 .loc 1 201 8 is_stmt 1 view .LVU98
358 .loc 1 201 10 is_stmt 0 view .LVU99
359 000a 124A ldr r2, .L19+4
360 000c 9342 cmp r3, r2
361 000e 13D0 beq .L18
362 .LVL15:
363 .L13:
ARM GAS /tmp/ccspVlUR.s page 12
202:Src/stm32f7xx_hal_msp.c **** {
203:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */
204:Src/stm32f7xx_hal_msp.c ****
205:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */
206:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
207:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_ADC3_CLK_DISABLE();
208:Src/stm32f7xx_hal_msp.c ****
209:Src/stm32f7xx_hal_msp.c **** /**ADC3 GPIO Configuration
210:Src/stm32f7xx_hal_msp.c **** PF5 ------> ADC3_IN15
211:Src/stm32f7xx_hal_msp.c **** */
212:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOF, GPIO_PIN_5);
213:Src/stm32f7xx_hal_msp.c ****
214:Src/stm32f7xx_hal_msp.c **** /* ADC3 interrupt DeInit */
215:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3:ADC_IRQn disable */
216:Src/stm32f7xx_hal_msp.c **** /**
217:Src/stm32f7xx_hal_msp.c **** * Uncomment the line below to disable the "ADC_IRQn" interrupt
218:Src/stm32f7xx_hal_msp.c **** * Be aware, disabling shared interrupt may affect other IPs
219:Src/stm32f7xx_hal_msp.c **** */
220:Src/stm32f7xx_hal_msp.c **** /* HAL_NVIC_DisableIRQ(ADC_IRQn); */
221:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3:ADC_IRQn disable */
222:Src/stm32f7xx_hal_msp.c ****
223:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 1 */
224:Src/stm32f7xx_hal_msp.c ****
225:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 1 */
226:Src/stm32f7xx_hal_msp.c **** }
227:Src/stm32f7xx_hal_msp.c ****
228:Src/stm32f7xx_hal_msp.c **** }
364 .loc 1 228 1 view .LVU100
365 0010 08BD pop {r3, pc}
366 .LVL16:
367 .L17:
173:Src/stm32f7xx_hal_msp.c ****
368 .loc 1 173 5 is_stmt 1 view .LVU101
369 0012 02F58C32 add r2, r2, #71680
370 0016 536C ldr r3, [r2, #68]
371 0018 23F48073 bic r3, r3, #256
372 001c 5364 str r3, [r2, #68]
182:Src/stm32f7xx_hal_msp.c ****
373 .loc 1 182 5 view .LVU102
374 001e 0321 movs r1, #3
375 0020 0D48 ldr r0, .L19+8
376 .LVL17:
182:Src/stm32f7xx_hal_msp.c ****
377 .loc 1 182 5 is_stmt 0 view .LVU103
378 0022 FFF7FEFF bl HAL_GPIO_DeInit
379 .LVL18:
184:Src/stm32f7xx_hal_msp.c ****
380 .loc 1 184 5 is_stmt 1 view .LVU104
381 0026 0421 movs r1, #4
382 0028 0C48 ldr r0, .L19+12
383 002a FFF7FEFF bl HAL_GPIO_DeInit
384 .LVL19:
186:Src/stm32f7xx_hal_msp.c ****
385 .loc 1 186 5 view .LVU105
386 002e 0321 movs r1, #3
387 0030 0B48 ldr r0, .L19+16
388 0032 FFF7FEFF bl HAL_GPIO_DeInit
ARM GAS /tmp/ccspVlUR.s page 13
389 .LVL20:
390 0036 EBE7 b .L13
391 .LVL21:
392 .L18:
207:Src/stm32f7xx_hal_msp.c ****
393 .loc 1 207 5 view .LVU106
394 0038 02F58B32 add r2, r2, #71168
395 003c 536C ldr r3, [r2, #68]
396 003e 23F48063 bic r3, r3, #1024
397 0042 5364 str r3, [r2, #68]
212:Src/stm32f7xx_hal_msp.c ****
398 .loc 1 212 5 view .LVU107
399 0044 2021 movs r1, #32
400 0046 0748 ldr r0, .L19+20
401 .LVL22:
212:Src/stm32f7xx_hal_msp.c ****
402 .loc 1 212 5 is_stmt 0 view .LVU108
403 0048 FFF7FEFF bl HAL_GPIO_DeInit
404 .LVL23:
405 .loc 1 228 1 view .LVU109
406 004c E0E7 b .L13
407 .L20:
408 004e 00BF .align 2
409 .L19:
410 0050 00200140 .word 1073815552
411 0054 00220140 .word 1073816064
412 0058 00080240 .word 1073874944
413 005c 00000240 .word 1073872896
414 0060 00040240 .word 1073873920
415 0064 00140240 .word 1073878016
416 .cfi_endproc
417 .LFE1185:
419 .section .text.HAL_SD_MspInit,"ax",%progbits
420 .align 1
421 .global HAL_SD_MspInit
422 .syntax unified
423 .thumb
424 .thumb_func
425 .fpu fpv5-d16
427 HAL_SD_MspInit:
428 .LVL24:
429 .LFB1186:
229:Src/stm32f7xx_hal_msp.c ****
230:Src/stm32f7xx_hal_msp.c **** /**
231:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP Initialization
232:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
233:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
234:Src/stm32f7xx_hal_msp.c **** * @retval None
235:Src/stm32f7xx_hal_msp.c **** */
236:Src/stm32f7xx_hal_msp.c **** void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
237:Src/stm32f7xx_hal_msp.c **** {
430 .loc 1 237 1 is_stmt 1 view -0
431 .cfi_startproc
432 @ args = 0, pretend = 0, frame = 176
433 @ frame_needed = 0, uses_anonymous_args = 0
434 .loc 1 237 1 is_stmt 0 view .LVU111
435 0000 F0B5 push {r4, r5, r6, r7, lr}
ARM GAS /tmp/ccspVlUR.s page 14
436 .LCFI7:
437 .cfi_def_cfa_offset 20
438 .cfi_offset 4, -20
439 .cfi_offset 5, -16
440 .cfi_offset 6, -12
441 .cfi_offset 7, -8
442 .cfi_offset 14, -4
443 0002 ADB0 sub sp, sp, #180
444 .LCFI8:
445 .cfi_def_cfa_offset 200
446 0004 0446 mov r4, r0
238:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
447 .loc 1 238 3 is_stmt 1 view .LVU112
448 .loc 1 238 20 is_stmt 0 view .LVU113
449 0006 0021 movs r1, #0
450 0008 2791 str r1, [sp, #156]
451 000a 2891 str r1, [sp, #160]
452 000c 2991 str r1, [sp, #164]
453 000e 2A91 str r1, [sp, #168]
454 0010 2B91 str r1, [sp, #172]
239:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
455 .loc 1 239 3 is_stmt 1 view .LVU114
456 .loc 1 239 28 is_stmt 0 view .LVU115
457 0012 9022 movs r2, #144
458 0014 03A8 add r0, sp, #12
459 .LVL25:
460 .loc 1 239 28 view .LVU116
461 0016 FFF7FEFF bl memset
462 .LVL26:
240:Src/stm32f7xx_hal_msp.c **** if(hsd->Instance==SDMMC1)
463 .loc 1 240 3 is_stmt 1 view .LVU117
464 .loc 1 240 9 is_stmt 0 view .LVU118
465 001a 2268 ldr r2, [r4]
466 .loc 1 240 5 view .LVU119
467 001c 224B ldr r3, .L27
468 001e 9A42 cmp r2, r3
469 0020 01D0 beq .L25
470 .LVL27:
471 .L21:
241:Src/stm32f7xx_hal_msp.c **** {
242:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspInit 0 */
243:Src/stm32f7xx_hal_msp.c ****
244:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspInit 0 */
245:Src/stm32f7xx_hal_msp.c ****
246:Src/stm32f7xx_hal_msp.c **** /** Initializes the peripherals clock
247:Src/stm32f7xx_hal_msp.c **** */
248:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
249:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
250:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
251:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
252:Src/stm32f7xx_hal_msp.c **** {
253:Src/stm32f7xx_hal_msp.c **** Error_Handler();
254:Src/stm32f7xx_hal_msp.c **** }
255:Src/stm32f7xx_hal_msp.c ****
256:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
257:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SDMMC1_CLK_ENABLE();
258:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/ccspVlUR.s page 15
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
260:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
261:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
262:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
263:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
264:Src/stm32f7xx_hal_msp.c **** PC10 ------> SDMMC1_D2
265:Src/stm32f7xx_hal_msp.c **** PC11 ------> SDMMC1_D3
266:Src/stm32f7xx_hal_msp.c **** PC12 ------> SDMMC1_CK
267:Src/stm32f7xx_hal_msp.c **** PD2 ------> SDMMC1_CMD
268:Src/stm32f7xx_hal_msp.c **** */
269:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
270:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
272:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
273:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
274:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
275:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
276:Src/stm32f7xx_hal_msp.c ****
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
279:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
280:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
281:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
282:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
283:Src/stm32f7xx_hal_msp.c ****
284:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspInit 1 */
285:Src/stm32f7xx_hal_msp.c ****
286:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspInit 1 */
287:Src/stm32f7xx_hal_msp.c ****
288:Src/stm32f7xx_hal_msp.c **** }
289:Src/stm32f7xx_hal_msp.c ****
290:Src/stm32f7xx_hal_msp.c **** }
472 .loc 1 290 1 view .LVU120
473 0022 2DB0 add sp, sp, #180
474 .LCFI9:
475 .cfi_remember_state
476 .cfi_def_cfa_offset 20
477 @ sp needed
478 0024 F0BD pop {r4, r5, r6, r7, pc}
479 .LVL28:
480 .L25:
481 .LCFI10:
482 .cfi_restore_state
248:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
483 .loc 1 248 5 is_stmt 1 view .LVU121
248:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
484 .loc 1 248 46 is_stmt 0 view .LVU122
485 0026 4FF42003 mov r3, #10485760
486 002a 0393 str r3, [sp, #12]
249:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
487 .loc 1 249 5 is_stmt 1 view .LVU123
250:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
488 .loc 1 250 5 view .LVU124
251:Src/stm32f7xx_hal_msp.c **** {
489 .loc 1 251 5 view .LVU125
251:Src/stm32f7xx_hal_msp.c **** {
490 .loc 1 251 9 is_stmt 0 view .LVU126
ARM GAS /tmp/ccspVlUR.s page 16
491 002c 03A8 add r0, sp, #12
492 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
493 .LVL29:
251:Src/stm32f7xx_hal_msp.c **** {
494 .loc 1 251 8 view .LVU127
495 0032 0028 cmp r0, #0
496 0034 35D1 bne .L26
497 .L23:
257:Src/stm32f7xx_hal_msp.c ****
498 .loc 1 257 5 is_stmt 1 view .LVU128
499 .LBB10:
257:Src/stm32f7xx_hal_msp.c ****
500 .loc 1 257 5 view .LVU129
257:Src/stm32f7xx_hal_msp.c ****
501 .loc 1 257 5 view .LVU130
502 0036 1D4B ldr r3, .L27+4
503 0038 5A6C ldr r2, [r3, #68]
504 003a 42F40062 orr r2, r2, #2048
505 003e 5A64 str r2, [r3, #68]
257:Src/stm32f7xx_hal_msp.c ****
506 .loc 1 257 5 view .LVU131
507 0040 5A6C ldr r2, [r3, #68]
508 0042 02F40062 and r2, r2, #2048
509 0046 0092 str r2, [sp]
257:Src/stm32f7xx_hal_msp.c ****
510 .loc 1 257 5 view .LVU132
511 0048 009A ldr r2, [sp]
512 .LBE10:
257:Src/stm32f7xx_hal_msp.c ****
513 .loc 1 257 5 view .LVU133
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
514 .loc 1 259 5 view .LVU134
515 .LBB11:
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
516 .loc 1 259 5 view .LVU135
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
517 .loc 1 259 5 view .LVU136
518 004a 1A6B ldr r2, [r3, #48]
519 004c 42F00402 orr r2, r2, #4
520 0050 1A63 str r2, [r3, #48]
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
521 .loc 1 259 5 view .LVU137
522 0052 1A6B ldr r2, [r3, #48]
523 0054 02F00402 and r2, r2, #4
524 0058 0192 str r2, [sp, #4]
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
525 .loc 1 259 5 view .LVU138
526 005a 019A ldr r2, [sp, #4]
527 .LBE11:
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
528 .loc 1 259 5 view .LVU139
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
529 .loc 1 260 5 view .LVU140
530 .LBB12:
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
531 .loc 1 260 5 view .LVU141
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
ARM GAS /tmp/ccspVlUR.s page 17
532 .loc 1 260 5 view .LVU142
533 005c 1A6B ldr r2, [r3, #48]
534 005e 42F00802 orr r2, r2, #8
535 0062 1A63 str r2, [r3, #48]
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
536 .loc 1 260 5 view .LVU143
537 0064 1B6B ldr r3, [r3, #48]
538 0066 03F00803 and r3, r3, #8
539 006a 0293 str r3, [sp, #8]
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
540 .loc 1 260 5 view .LVU144
541 006c 029B ldr r3, [sp, #8]
542 .LBE12:
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
543 .loc 1 260 5 view .LVU145
269:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
544 .loc 1 269 5 view .LVU146
269:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12;
545 .loc 1 269 25 is_stmt 0 view .LVU147
546 006e 4FF4F853 mov r3, #7936
547 0072 2793 str r3, [sp, #156]
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
548 .loc 1 271 5 is_stmt 1 view .LVU148
271:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
549 .loc 1 271 26 is_stmt 0 view .LVU149
550 0074 0227 movs r7, #2
551 0076 2897 str r7, [sp, #160]
272:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
552 .loc 1 272 5 is_stmt 1 view .LVU150
272:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
553 .loc 1 272 26 is_stmt 0 view .LVU151
554 0078 0026 movs r6, #0
555 007a 2996 str r6, [sp, #164]
273:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
556 .loc 1 273 5 is_stmt 1 view .LVU152
273:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
557 .loc 1 273 27 is_stmt 0 view .LVU153
558 007c 0325 movs r5, #3
559 007e 2A95 str r5, [sp, #168]
274:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
560 .loc 1 274 5 is_stmt 1 view .LVU154
274:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
561 .loc 1 274 31 is_stmt 0 view .LVU155
562 0080 0C24 movs r4, #12
563 .LVL30:
274:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
564 .loc 1 274 31 view .LVU156
565 0082 2B94 str r4, [sp, #172]
275:Src/stm32f7xx_hal_msp.c ****
566 .loc 1 275 5 is_stmt 1 view .LVU157
567 0084 27A9 add r1, sp, #156
568 0086 0A48 ldr r0, .L27+8
569 0088 FFF7FEFF bl HAL_GPIO_Init
570 .LVL31:
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
571 .loc 1 277 5 view .LVU158
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
ARM GAS /tmp/ccspVlUR.s page 18
572 .loc 1 277 25 is_stmt 0 view .LVU159
573 008c 0423 movs r3, #4
574 008e 2793 str r3, [sp, #156]
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
575 .loc 1 278 5 is_stmt 1 view .LVU160
278:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
576 .loc 1 278 26 is_stmt 0 view .LVU161
577 0090 2897 str r7, [sp, #160]
279:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
578 .loc 1 279 5 is_stmt 1 view .LVU162
279:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
579 .loc 1 279 26 is_stmt 0 view .LVU163
580 0092 2996 str r6, [sp, #164]
280:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
581 .loc 1 280 5 is_stmt 1 view .LVU164
280:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
582 .loc 1 280 27 is_stmt 0 view .LVU165
583 0094 2A95 str r5, [sp, #168]
281:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
584 .loc 1 281 5 is_stmt 1 view .LVU166
281:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
585 .loc 1 281 31 is_stmt 0 view .LVU167
586 0096 2B94 str r4, [sp, #172]
282:Src/stm32f7xx_hal_msp.c ****
587 .loc 1 282 5 is_stmt 1 view .LVU168
588 0098 27A9 add r1, sp, #156
589 009a 0648 ldr r0, .L27+12
590 009c FFF7FEFF bl HAL_GPIO_Init
591 .LVL32:
592 .loc 1 290 1 is_stmt 0 view .LVU169
593 00a0 BFE7 b .L21
594 .LVL33:
595 .L26:
253:Src/stm32f7xx_hal_msp.c **** }
596 .loc 1 253 7 is_stmt 1 view .LVU170
597 00a2 FFF7FEFF bl Error_Handler
598 .LVL34:
599 00a6 C6E7 b .L23
600 .L28:
601 .align 2
602 .L27:
603 00a8 002C0140 .word 1073818624
604 00ac 00380240 .word 1073887232
605 00b0 00080240 .word 1073874944
606 00b4 000C0240 .word 1073875968
607 .cfi_endproc
608 .LFE1186:
610 .section .text.HAL_SD_MspDeInit,"ax",%progbits
611 .align 1
612 .global HAL_SD_MspDeInit
613 .syntax unified
614 .thumb
615 .thumb_func
616 .fpu fpv5-d16
618 HAL_SD_MspDeInit:
619 .LVL35:
620 .LFB1187:
ARM GAS /tmp/ccspVlUR.s page 19
291:Src/stm32f7xx_hal_msp.c ****
292:Src/stm32f7xx_hal_msp.c **** /**
293:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization
294:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
295:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
296:Src/stm32f7xx_hal_msp.c **** * @retval None
297:Src/stm32f7xx_hal_msp.c **** */
298:Src/stm32f7xx_hal_msp.c **** void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
299:Src/stm32f7xx_hal_msp.c **** {
621 .loc 1 299 1 view -0
622 .cfi_startproc
623 @ args = 0, pretend = 0, frame = 0
624 @ frame_needed = 0, uses_anonymous_args = 0
625 .loc 1 299 1 is_stmt 0 view .LVU172
626 0000 08B5 push {r3, lr}
627 .LCFI11:
628 .cfi_def_cfa_offset 8
629 .cfi_offset 3, -8
630 .cfi_offset 14, -4
300:Src/stm32f7xx_hal_msp.c **** if(hsd->Instance==SDMMC1)
631 .loc 1 300 3 is_stmt 1 view .LVU173
632 .loc 1 300 9 is_stmt 0 view .LVU174
633 0002 0268 ldr r2, [r0]
634 .loc 1 300 5 view .LVU175
635 0004 094B ldr r3, .L33
636 0006 9A42 cmp r2, r3
637 0008 00D0 beq .L32
638 .LVL36:
639 .L29:
301:Src/stm32f7xx_hal_msp.c **** {
302:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspDeInit 0 */
303:Src/stm32f7xx_hal_msp.c ****
304:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspDeInit 0 */
305:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
306:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_SDMMC1_CLK_DISABLE();
307:Src/stm32f7xx_hal_msp.c ****
308:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
309:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
310:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
311:Src/stm32f7xx_hal_msp.c **** PC10 ------> SDMMC1_D2
312:Src/stm32f7xx_hal_msp.c **** PC11 ------> SDMMC1_D3
313:Src/stm32f7xx_hal_msp.c **** PC12 ------> SDMMC1_CK
314:Src/stm32f7xx_hal_msp.c **** PD2 ------> SDMMC1_CMD
315:Src/stm32f7xx_hal_msp.c **** */
316:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
317:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
318:Src/stm32f7xx_hal_msp.c ****
319:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
320:Src/stm32f7xx_hal_msp.c ****
321:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN SDMMC1_MspDeInit 1 */
322:Src/stm32f7xx_hal_msp.c ****
323:Src/stm32f7xx_hal_msp.c **** /* USER CODE END SDMMC1_MspDeInit 1 */
324:Src/stm32f7xx_hal_msp.c **** }
325:Src/stm32f7xx_hal_msp.c ****
326:Src/stm32f7xx_hal_msp.c **** }
640 .loc 1 326 1 view .LVU176
641 000a 08BD pop {r3, pc}
ARM GAS /tmp/ccspVlUR.s page 20
642 .LVL37:
643 .L32:
306:Src/stm32f7xx_hal_msp.c ****
644 .loc 1 306 5 is_stmt 1 view .LVU177
645 000c 084A ldr r2, .L33+4
646 000e 536C ldr r3, [r2, #68]
647 0010 23F40063 bic r3, r3, #2048
648 0014 5364 str r3, [r2, #68]
316:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
649 .loc 1 316 5 view .LVU178
650 0016 4FF4F851 mov r1, #7936
651 001a 0648 ldr r0, .L33+8
652 .LVL38:
316:Src/stm32f7xx_hal_msp.c **** |GPIO_PIN_12);
653 .loc 1 316 5 is_stmt 0 view .LVU179
654 001c FFF7FEFF bl HAL_GPIO_DeInit
655 .LVL39:
319:Src/stm32f7xx_hal_msp.c ****
656 .loc 1 319 5 is_stmt 1 view .LVU180
657 0020 0421 movs r1, #4
658 0022 0548 ldr r0, .L33+12
659 0024 FFF7FEFF bl HAL_GPIO_DeInit
660 .LVL40:
661 .loc 1 326 1 is_stmt 0 view .LVU181
662 0028 EFE7 b .L29
663 .L34:
664 002a 00BF .align 2
665 .L33:
666 002c 002C0140 .word 1073818624
667 0030 00380240 .word 1073887232
668 0034 00080240 .word 1073874944
669 0038 000C0240 .word 1073875968
670 .cfi_endproc
671 .LFE1187:
673 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits
674 .align 1
675 .global HAL_TIM_Base_MspInit
676 .syntax unified
677 .thumb
678 .thumb_func
679 .fpu fpv5-d16
681 HAL_TIM_Base_MspInit:
682 .LVL41:
683 .LFB1188:
327:Src/stm32f7xx_hal_msp.c ****
328:Src/stm32f7xx_hal_msp.c **** /**
329:Src/stm32f7xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
330:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
331:Src/stm32f7xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
332:Src/stm32f7xx_hal_msp.c **** * @retval None
333:Src/stm32f7xx_hal_msp.c **** */
334:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
335:Src/stm32f7xx_hal_msp.c **** {
684 .loc 1 335 1 is_stmt 1 view -0
685 .cfi_startproc
686 @ args = 0, pretend = 0, frame = 16
687 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccspVlUR.s page 21
688 .loc 1 335 1 is_stmt 0 view .LVU183
689 0000 00B5 push {lr}
690 .LCFI12:
691 .cfi_def_cfa_offset 4
692 .cfi_offset 14, -4
693 0002 85B0 sub sp, sp, #20
694 .LCFI13:
695 .cfi_def_cfa_offset 24
336:Src/stm32f7xx_hal_msp.c **** if(htim_base->Instance==TIM8)
696 .loc 1 336 3 is_stmt 1 view .LVU184
697 .loc 1 336 15 is_stmt 0 view .LVU185
698 0004 0368 ldr r3, [r0]
699 .loc 1 336 5 view .LVU186
700 0006 1E4A ldr r2, .L43
701 0008 9342 cmp r3, r2
702 000a 08D0 beq .L40
337:Src/stm32f7xx_hal_msp.c **** {
338:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 0 */
339:Src/stm32f7xx_hal_msp.c ****
340:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 0 */
341:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
342:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_ENABLE();
343:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
344:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
345:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
346:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
347:Src/stm32f7xx_hal_msp.c ****
348:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 1 */
349:Src/stm32f7xx_hal_msp.c **** }
350:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM10)
703 .loc 1 350 8 is_stmt 1 view .LVU187
704 .loc 1 350 10 is_stmt 0 view .LVU188
705 000c 1D4A ldr r2, .L43+4
706 000e 9342 cmp r3, r2
707 0010 18D0 beq .L41
351:Src/stm32f7xx_hal_msp.c **** {
352:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 0 */
353:Src/stm32f7xx_hal_msp.c ****
354:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 0 */
355:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
356:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM10_CLK_ENABLE();
357:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
358:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
359:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
360:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */
361:Src/stm32f7xx_hal_msp.c ****
362:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 1 */
363:Src/stm32f7xx_hal_msp.c **** }
364:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM11)
708 .loc 1 364 8 is_stmt 1 view .LVU189
709 .loc 1 364 10 is_stmt 0 view .LVU190
710 0012 1D4A ldr r2, .L43+8
711 0014 9342 cmp r3, r2
712 0016 28D0 beq .L42
713 .LVL42:
714 .L35:
365:Src/stm32f7xx_hal_msp.c **** {
ARM GAS /tmp/ccspVlUR.s page 22
366:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 0 */
367:Src/stm32f7xx_hal_msp.c ****
368:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspInit 0 */
369:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
370:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM11_CLK_ENABLE();
371:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
372:Src/stm32f7xx_hal_msp.c ****
373:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspInit 1 */
374:Src/stm32f7xx_hal_msp.c **** }
375:Src/stm32f7xx_hal_msp.c ****
376:Src/stm32f7xx_hal_msp.c **** }
715 .loc 1 376 1 view .LVU191
716 0018 05B0 add sp, sp, #20
717 .LCFI14:
718 .cfi_remember_state
719 .cfi_def_cfa_offset 4
720 @ sp needed
721 001a 5DF804FB ldr pc, [sp], #4
722 .LVL43:
723 .L40:
724 .LCFI15:
725 .cfi_restore_state
342:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
726 .loc 1 342 5 is_stmt 1 view .LVU192
727 .LBB13:
342:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
728 .loc 1 342 5 view .LVU193
342:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
729 .loc 1 342 5 view .LVU194
730 001e 1B4B ldr r3, .L43+12
731 0020 5A6C ldr r2, [r3, #68]
732 0022 42F00202 orr r2, r2, #2
733 0026 5A64 str r2, [r3, #68]
342:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
734 .loc 1 342 5 view .LVU195
735 0028 5B6C ldr r3, [r3, #68]
736 002a 03F00203 and r3, r3, #2
737 002e 0193 str r3, [sp, #4]
342:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
738 .loc 1 342 5 view .LVU196
739 0030 019B ldr r3, [sp, #4]
740 .LBE13:
342:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt Init */
741 .loc 1 342 5 view .LVU197
344:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
742 .loc 1 344 5 view .LVU198
743 0032 0022 movs r2, #0
744 0034 1146 mov r1, r2
745 0036 2C20 movs r0, #44
746 .LVL44:
344:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
747 .loc 1 344 5 is_stmt 0 view .LVU199
748 0038 FFF7FEFF bl HAL_NVIC_SetPriority
749 .LVL45:
345:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
750 .loc 1 345 5 is_stmt 1 view .LVU200
751 003c 2C20 movs r0, #44
ARM GAS /tmp/ccspVlUR.s page 23
752 003e FFF7FEFF bl HAL_NVIC_EnableIRQ
753 .LVL46:
754 0042 E9E7 b .L35
755 .LVL47:
756 .L41:
356:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
757 .loc 1 356 5 view .LVU201
758 .LBB14:
356:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
759 .loc 1 356 5 view .LVU202
356:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
760 .loc 1 356 5 view .LVU203
761 0044 114B ldr r3, .L43+12
762 0046 5A6C ldr r2, [r3, #68]
763 0048 42F40032 orr r2, r2, #131072
764 004c 5A64 str r2, [r3, #68]
356:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
765 .loc 1 356 5 view .LVU204
766 004e 5B6C ldr r3, [r3, #68]
767 0050 03F40033 and r3, r3, #131072
768 0054 0293 str r3, [sp, #8]
356:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
769 .loc 1 356 5 view .LVU205
770 0056 029B ldr r3, [sp, #8]
771 .LBE14:
356:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
772 .loc 1 356 5 view .LVU206
358:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
773 .loc 1 358 5 view .LVU207
774 0058 0022 movs r2, #0
775 005a 1146 mov r1, r2
776 005c 1920 movs r0, #25
777 .LVL48:
358:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
778 .loc 1 358 5 is_stmt 0 view .LVU208
779 005e FFF7FEFF bl HAL_NVIC_SetPriority
780 .LVL49:
359:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */
781 .loc 1 359 5 is_stmt 1 view .LVU209
782 0062 1920 movs r0, #25
783 0064 FFF7FEFF bl HAL_NVIC_EnableIRQ
784 .LVL50:
785 0068 D6E7 b .L35
786 .LVL51:
787 .L42:
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
788 .loc 1 370 5 view .LVU210
789 .LBB15:
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
790 .loc 1 370 5 view .LVU211
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
791 .loc 1 370 5 view .LVU212
792 006a 084B ldr r3, .L43+12
793 006c 5A6C ldr r2, [r3, #68]
794 006e 42F48022 orr r2, r2, #262144
795 0072 5A64 str r2, [r3, #68]
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
ARM GAS /tmp/ccspVlUR.s page 24
796 .loc 1 370 5 view .LVU213
797 0074 5B6C ldr r3, [r3, #68]
798 0076 03F48023 and r3, r3, #262144
799 007a 0393 str r3, [sp, #12]
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
800 .loc 1 370 5 view .LVU214
801 007c 039B ldr r3, [sp, #12]
802 .LBE15:
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
803 .loc 1 370 5 view .LVU215
804 .loc 1 376 1 is_stmt 0 view .LVU216
805 007e CBE7 b .L35
806 .L44:
807 .align 2
808 .L43:
809 0080 00040140 .word 1073808384
810 0084 00440140 .word 1073824768
811 0088 00480140 .word 1073825792
812 008c 00380240 .word 1073887232
813 .cfi_endproc
814 .LFE1188:
816 .section .text.HAL_TIM_MspPostInit,"ax",%progbits
817 .align 1
818 .global HAL_TIM_MspPostInit
819 .syntax unified
820 .thumb
821 .thumb_func
822 .fpu fpv5-d16
824 HAL_TIM_MspPostInit:
825 .LVL52:
826 .LFB1189:
377:Src/stm32f7xx_hal_msp.c ****
378:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
379:Src/stm32f7xx_hal_msp.c **** {
827 .loc 1 379 1 is_stmt 1 view -0
828 .cfi_startproc
829 @ args = 0, pretend = 0, frame = 24
830 @ frame_needed = 0, uses_anonymous_args = 0
831 .loc 1 379 1 is_stmt 0 view .LVU218
832 0000 00B5 push {lr}
833 .LCFI16:
834 .cfi_def_cfa_offset 4
835 .cfi_offset 14, -4
836 0002 87B0 sub sp, sp, #28
837 .LCFI17:
838 .cfi_def_cfa_offset 32
380:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
839 .loc 1 380 3 is_stmt 1 view .LVU219
840 .loc 1 380 20 is_stmt 0 view .LVU220
841 0004 0023 movs r3, #0
842 0006 0193 str r3, [sp, #4]
843 0008 0293 str r3, [sp, #8]
844 000a 0393 str r3, [sp, #12]
845 000c 0493 str r3, [sp, #16]
846 000e 0593 str r3, [sp, #20]
381:Src/stm32f7xx_hal_msp.c **** if(htim->Instance==TIM11)
847 .loc 1 381 3 is_stmt 1 view .LVU221
ARM GAS /tmp/ccspVlUR.s page 25
848 .loc 1 381 10 is_stmt 0 view .LVU222
849 0010 0268 ldr r2, [r0]
850 .loc 1 381 5 view .LVU223
851 0012 0E4B ldr r3, .L49
852 0014 9A42 cmp r2, r3
853 0016 02D0 beq .L48
854 .LVL53:
855 .L45:
382:Src/stm32f7xx_hal_msp.c **** {
383:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspPostInit 0 */
384:Src/stm32f7xx_hal_msp.c ****
385:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspPostInit 0 */
386:Src/stm32f7xx_hal_msp.c ****
387:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
388:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
389:Src/stm32f7xx_hal_msp.c **** PB9 ------> TIM11_CH1
390:Src/stm32f7xx_hal_msp.c **** */
391:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9;
392:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
393:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
394:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
395:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
396:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
397:Src/stm32f7xx_hal_msp.c ****
398:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspPostInit 1 */
399:Src/stm32f7xx_hal_msp.c ****
400:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspPostInit 1 */
401:Src/stm32f7xx_hal_msp.c **** }
402:Src/stm32f7xx_hal_msp.c ****
403:Src/stm32f7xx_hal_msp.c **** }
856 .loc 1 403 1 view .LVU224
857 0018 07B0 add sp, sp, #28
858 .LCFI18:
859 .cfi_remember_state
860 .cfi_def_cfa_offset 4
861 @ sp needed
862 001a 5DF804FB ldr pc, [sp], #4
863 .LVL54:
864 .L48:
865 .LCFI19:
866 .cfi_restore_state
387:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
867 .loc 1 387 5 is_stmt 1 view .LVU225
868 .LBB16:
387:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
869 .loc 1 387 5 view .LVU226
387:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
870 .loc 1 387 5 view .LVU227
871 001e 03F57043 add r3, r3, #61440
872 0022 1A6B ldr r2, [r3, #48]
873 0024 42F00202 orr r2, r2, #2
874 0028 1A63 str r2, [r3, #48]
387:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
875 .loc 1 387 5 view .LVU228
876 002a 1B6B ldr r3, [r3, #48]
877 002c 03F00203 and r3, r3, #2
878 0030 0093 str r3, [sp]
ARM GAS /tmp/ccspVlUR.s page 26
387:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
879 .loc 1 387 5 view .LVU229
880 0032 009B ldr r3, [sp]
881 .LBE16:
387:Src/stm32f7xx_hal_msp.c **** /**TIM11 GPIO Configuration
882 .loc 1 387 5 view .LVU230
391:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
883 .loc 1 391 5 view .LVU231
391:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
884 .loc 1 391 25 is_stmt 0 view .LVU232
885 0034 4FF40073 mov r3, #512
886 0038 0193 str r3, [sp, #4]
392:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
887 .loc 1 392 5 is_stmt 1 view .LVU233
392:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
888 .loc 1 392 26 is_stmt 0 view .LVU234
889 003a 0223 movs r3, #2
890 003c 0293 str r3, [sp, #8]
393:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
891 .loc 1 393 5 is_stmt 1 view .LVU235
394:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
892 .loc 1 394 5 view .LVU236
395:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
893 .loc 1 395 5 view .LVU237
395:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
894 .loc 1 395 31 is_stmt 0 view .LVU238
895 003e 0323 movs r3, #3
896 0040 0593 str r3, [sp, #20]
396:Src/stm32f7xx_hal_msp.c ****
897 .loc 1 396 5 is_stmt 1 view .LVU239
898 0042 01A9 add r1, sp, #4
899 0044 0248 ldr r0, .L49+4
900 .LVL55:
396:Src/stm32f7xx_hal_msp.c ****
901 .loc 1 396 5 is_stmt 0 view .LVU240
902 0046 FFF7FEFF bl HAL_GPIO_Init
903 .LVL56:
904 .loc 1 403 1 view .LVU241
905 004a E5E7 b .L45
906 .L50:
907 .align 2
908 .L49:
909 004c 00480140 .word 1073825792
910 0050 00040240 .word 1073873920
911 .cfi_endproc
912 .LFE1189:
914 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
915 .align 1
916 .global HAL_TIM_Base_MspDeInit
917 .syntax unified
918 .thumb
919 .thumb_func
920 .fpu fpv5-d16
922 HAL_TIM_Base_MspDeInit:
923 .LVL57:
924 .LFB1190:
404:Src/stm32f7xx_hal_msp.c **** /**
ARM GAS /tmp/ccspVlUR.s page 27
405:Src/stm32f7xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
406:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
407:Src/stm32f7xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
408:Src/stm32f7xx_hal_msp.c **** * @retval None
409:Src/stm32f7xx_hal_msp.c **** */
410:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
411:Src/stm32f7xx_hal_msp.c **** {
925 .loc 1 411 1 is_stmt 1 view -0
926 .cfi_startproc
927 @ args = 0, pretend = 0, frame = 0
928 @ frame_needed = 0, uses_anonymous_args = 0
929 .loc 1 411 1 is_stmt 0 view .LVU243
930 0000 08B5 push {r3, lr}
931 .LCFI20:
932 .cfi_def_cfa_offset 8
933 .cfi_offset 3, -8
934 .cfi_offset 14, -4
412:Src/stm32f7xx_hal_msp.c **** if(htim_base->Instance==TIM8)
935 .loc 1 412 3 is_stmt 1 view .LVU244
936 .loc 1 412 15 is_stmt 0 view .LVU245
937 0002 0368 ldr r3, [r0]
938 .loc 1 412 5 view .LVU246
939 0004 124A ldr r2, .L59
940 0006 9342 cmp r3, r2
941 0008 06D0 beq .L56
413:Src/stm32f7xx_hal_msp.c **** {
414:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 0 */
415:Src/stm32f7xx_hal_msp.c ****
416:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 0 */
417:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
418:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_DISABLE();
419:Src/stm32f7xx_hal_msp.c ****
420:Src/stm32f7xx_hal_msp.c **** /* TIM8 interrupt DeInit */
421:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn);
422:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
423:Src/stm32f7xx_hal_msp.c ****
424:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 1 */
425:Src/stm32f7xx_hal_msp.c **** }
426:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM10)
942 .loc 1 426 8 is_stmt 1 view .LVU247
943 .loc 1 426 10 is_stmt 0 view .LVU248
944 000a 124A ldr r2, .L59+4
945 000c 9342 cmp r3, r2
946 000e 0DD0 beq .L57
427:Src/stm32f7xx_hal_msp.c **** {
428:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 0 */
429:Src/stm32f7xx_hal_msp.c ****
430:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspDeInit 0 */
431:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
432:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM10_CLK_DISABLE();
433:Src/stm32f7xx_hal_msp.c ****
434:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt DeInit */
435:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn);
436:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
437:Src/stm32f7xx_hal_msp.c ****
438:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspDeInit 1 */
439:Src/stm32f7xx_hal_msp.c **** }
ARM GAS /tmp/ccspVlUR.s page 28
440:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM11)
947 .loc 1 440 8 is_stmt 1 view .LVU249
948 .loc 1 440 10 is_stmt 0 view .LVU250
949 0010 114A ldr r2, .L59+8
950 0012 9342 cmp r3, r2
951 0014 14D0 beq .L58
952 .LVL58:
953 .L51:
441:Src/stm32f7xx_hal_msp.c **** {
442:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 0 */
443:Src/stm32f7xx_hal_msp.c ****
444:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspDeInit 0 */
445:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
446:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_TIM11_CLK_DISABLE();
447:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 1 */
448:Src/stm32f7xx_hal_msp.c ****
449:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspDeInit 1 */
450:Src/stm32f7xx_hal_msp.c **** }
451:Src/stm32f7xx_hal_msp.c ****
452:Src/stm32f7xx_hal_msp.c **** }
954 .loc 1 452 1 view .LVU251
955 0016 08BD pop {r3, pc}
956 .LVL59:
957 .L56:
418:Src/stm32f7xx_hal_msp.c ****
958 .loc 1 418 5 is_stmt 1 view .LVU252
959 0018 02F59A32 add r2, r2, #78848
960 001c 536C ldr r3, [r2, #68]
961 001e 23F00203 bic r3, r3, #2
962 0022 5364 str r3, [r2, #68]
421:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
963 .loc 1 421 5 view .LVU253
964 0024 2C20 movs r0, #44
965 .LVL60:
421:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
966 .loc 1 421 5 is_stmt 0 view .LVU254
967 0026 FFF7FEFF bl HAL_NVIC_DisableIRQ
968 .LVL61:
969 002a F4E7 b .L51
970 .LVL62:
971 .L57:
432:Src/stm32f7xx_hal_msp.c ****
972 .loc 1 432 5 is_stmt 1 view .LVU255
973 002c 02F57442 add r2, r2, #62464
974 0030 536C ldr r3, [r2, #68]
975 0032 23F40033 bic r3, r3, #131072
976 0036 5364 str r3, [r2, #68]
435:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
977 .loc 1 435 5 view .LVU256
978 0038 1920 movs r0, #25
979 .LVL63:
435:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspDeInit 1 */
980 .loc 1 435 5 is_stmt 0 view .LVU257
981 003a FFF7FEFF bl HAL_NVIC_DisableIRQ
982 .LVL64:
983 003e EAE7 b .L51
984 .LVL65:
ARM GAS /tmp/ccspVlUR.s page 29
985 .L58:
446:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 1 */
986 .loc 1 446 5 is_stmt 1 view .LVU258
987 0040 02F57042 add r2, r2, #61440
988 0044 536C ldr r3, [r2, #68]
989 0046 23F48023 bic r3, r3, #262144
990 004a 5364 str r3, [r2, #68]
991 .loc 1 452 1 is_stmt 0 view .LVU259
992 004c E3E7 b .L51
993 .L60:
994 004e 00BF .align 2
995 .L59:
996 0050 00040140 .word 1073808384
997 0054 00440140 .word 1073824768
998 0058 00480140 .word 1073825792
999 .cfi_endproc
1000 .LFE1190:
1002 .section .text.HAL_UART_MspInit,"ax",%progbits
1003 .align 1
1004 .global HAL_UART_MspInit
1005 .syntax unified
1006 .thumb
1007 .thumb_func
1008 .fpu fpv5-d16
1010 HAL_UART_MspInit:
1011 .LVL66:
1012 .LFB1191:
453:Src/stm32f7xx_hal_msp.c ****
454:Src/stm32f7xx_hal_msp.c **** /**
455:Src/stm32f7xx_hal_msp.c **** * @brief UART MSP Initialization
456:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
457:Src/stm32f7xx_hal_msp.c **** * @param huart: UART handle pointer
458:Src/stm32f7xx_hal_msp.c **** * @retval None
459:Src/stm32f7xx_hal_msp.c **** */
460:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
461:Src/stm32f7xx_hal_msp.c **** {
1013 .loc 1 461 1 is_stmt 1 view -0
1014 .cfi_startproc
1015 @ args = 0, pretend = 0, frame = 176
1016 @ frame_needed = 0, uses_anonymous_args = 0
1017 .loc 1 461 1 is_stmt 0 view .LVU261
1018 0000 10B5 push {r4, lr}
1019 .LCFI21:
1020 .cfi_def_cfa_offset 8
1021 .cfi_offset 4, -8
1022 .cfi_offset 14, -4
1023 0002 ACB0 sub sp, sp, #176
1024 .LCFI22:
1025 .cfi_def_cfa_offset 184
1026 0004 0446 mov r4, r0
462:Src/stm32f7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
1027 .loc 1 462 3 is_stmt 1 view .LVU262
1028 .loc 1 462 20 is_stmt 0 view .LVU263
1029 0006 0021 movs r1, #0
1030 0008 2791 str r1, [sp, #156]
1031 000a 2891 str r1, [sp, #160]
1032 000c 2991 str r1, [sp, #164]
ARM GAS /tmp/ccspVlUR.s page 30
1033 000e 2A91 str r1, [sp, #168]
1034 0010 2B91 str r1, [sp, #172]
463:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
1035 .loc 1 463 3 is_stmt 1 view .LVU264
1036 .loc 1 463 28 is_stmt 0 view .LVU265
1037 0012 9022 movs r2, #144
1038 0014 03A8 add r0, sp, #12
1039 .LVL67:
1040 .loc 1 463 28 view .LVU266
1041 0016 FFF7FEFF bl memset
1042 .LVL68:
464:Src/stm32f7xx_hal_msp.c **** if(huart->Instance==UART8)
1043 .loc 1 464 3 is_stmt 1 view .LVU267
1044 .loc 1 464 11 is_stmt 0 view .LVU268
1045 001a 2268 ldr r2, [r4]
1046 .loc 1 464 5 view .LVU269
1047 001c 174B ldr r3, .L67
1048 001e 9A42 cmp r2, r3
1049 0020 01D0 beq .L65
1050 .L61:
465:Src/stm32f7xx_hal_msp.c **** {
466:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspInit 0 */
467:Src/stm32f7xx_hal_msp.c ****
468:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspInit 0 */
469:Src/stm32f7xx_hal_msp.c ****
470:Src/stm32f7xx_hal_msp.c **** /** Initializes the peripherals clock
471:Src/stm32f7xx_hal_msp.c **** */
472:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
473:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
474:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
475:Src/stm32f7xx_hal_msp.c **** {
476:Src/stm32f7xx_hal_msp.c **** Error_Handler();
477:Src/stm32f7xx_hal_msp.c **** }
478:Src/stm32f7xx_hal_msp.c ****
479:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
480:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_UART8_CLK_ENABLE();
481:Src/stm32f7xx_hal_msp.c ****
482:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOE_CLK_ENABLE();
483:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
484:Src/stm32f7xx_hal_msp.c **** PE0 ------> UART8_RX
485:Src/stm32f7xx_hal_msp.c **** PE1 ------> UART8_TX
486:Src/stm32f7xx_hal_msp.c **** */
487:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
488:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
489:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
490:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
491:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
492:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
493:Src/stm32f7xx_hal_msp.c ****
494:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspInit 1 */
495:Src/stm32f7xx_hal_msp.c ****
496:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspInit 1 */
497:Src/stm32f7xx_hal_msp.c ****
498:Src/stm32f7xx_hal_msp.c **** }
499:Src/stm32f7xx_hal_msp.c ****
500:Src/stm32f7xx_hal_msp.c **** }
1051 .loc 1 500 1 view .LVU270
ARM GAS /tmp/ccspVlUR.s page 31
1052 0022 2CB0 add sp, sp, #176
1053 .LCFI23:
1054 .cfi_remember_state
1055 .cfi_def_cfa_offset 8
1056 @ sp needed
1057 0024 10BD pop {r4, pc}
1058 .LVL69:
1059 .L65:
1060 .LCFI24:
1061 .cfi_restore_state
472:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
1062 .loc 1 472 5 is_stmt 1 view .LVU271
472:Src/stm32f7xx_hal_msp.c **** PeriphClkInitStruct.Uart8ClockSelection = RCC_UART8CLKSOURCE_PCLK1;
1063 .loc 1 472 46 is_stmt 0 view .LVU272
1064 0026 4FF40053 mov r3, #8192
1065 002a 0393 str r3, [sp, #12]
473:Src/stm32f7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
1066 .loc 1 473 5 is_stmt 1 view .LVU273
474:Src/stm32f7xx_hal_msp.c **** {
1067 .loc 1 474 5 view .LVU274
474:Src/stm32f7xx_hal_msp.c **** {
1068 .loc 1 474 9 is_stmt 0 view .LVU275
1069 002c 03A8 add r0, sp, #12
1070 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
1071 .LVL70:
474:Src/stm32f7xx_hal_msp.c **** {
1072 .loc 1 474 8 view .LVU276
1073 0032 00BB cbnz r0, .L66
1074 .L63:
480:Src/stm32f7xx_hal_msp.c ****
1075 .loc 1 480 5 is_stmt 1 view .LVU277
1076 .LBB17:
480:Src/stm32f7xx_hal_msp.c ****
1077 .loc 1 480 5 view .LVU278
480:Src/stm32f7xx_hal_msp.c ****
1078 .loc 1 480 5 view .LVU279
1079 0034 124B ldr r3, .L67+4
1080 0036 1A6C ldr r2, [r3, #64]
1081 0038 42F00042 orr r2, r2, #-2147483648
1082 003c 1A64 str r2, [r3, #64]
480:Src/stm32f7xx_hal_msp.c ****
1083 .loc 1 480 5 view .LVU280
1084 003e 1A6C ldr r2, [r3, #64]
1085 0040 02F00042 and r2, r2, #-2147483648
1086 0044 0192 str r2, [sp, #4]
480:Src/stm32f7xx_hal_msp.c ****
1087 .loc 1 480 5 view .LVU281
1088 0046 019A ldr r2, [sp, #4]
1089 .LBE17:
480:Src/stm32f7xx_hal_msp.c ****
1090 .loc 1 480 5 view .LVU282
482:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1091 .loc 1 482 5 view .LVU283
1092 .LBB18:
482:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1093 .loc 1 482 5 view .LVU284
482:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
ARM GAS /tmp/ccspVlUR.s page 32
1094 .loc 1 482 5 view .LVU285
1095 0048 1A6B ldr r2, [r3, #48]
1096 004a 42F01002 orr r2, r2, #16
1097 004e 1A63 str r2, [r3, #48]
482:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1098 .loc 1 482 5 view .LVU286
1099 0050 1B6B ldr r3, [r3, #48]
1100 0052 03F01003 and r3, r3, #16
1101 0056 0293 str r3, [sp, #8]
482:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1102 .loc 1 482 5 view .LVU287
1103 0058 029B ldr r3, [sp, #8]
1104 .LBE18:
482:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
1105 .loc 1 482 5 view .LVU288
487:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1106 .loc 1 487 5 view .LVU289
487:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1107 .loc 1 487 25 is_stmt 0 view .LVU290
1108 005a 0323 movs r3, #3
1109 005c 2793 str r3, [sp, #156]
488:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1110 .loc 1 488 5 is_stmt 1 view .LVU291
488:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1111 .loc 1 488 26 is_stmt 0 view .LVU292
1112 005e 0222 movs r2, #2
1113 0060 2892 str r2, [sp, #160]
489:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
1114 .loc 1 489 5 is_stmt 1 view .LVU293
489:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
1115 .loc 1 489 26 is_stmt 0 view .LVU294
1116 0062 0022 movs r2, #0
1117 0064 2992 str r2, [sp, #164]
490:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
1118 .loc 1 490 5 is_stmt 1 view .LVU295
490:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
1119 .loc 1 490 27 is_stmt 0 view .LVU296
1120 0066 2A93 str r3, [sp, #168]
491:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
1121 .loc 1 491 5 is_stmt 1 view .LVU297
491:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
1122 .loc 1 491 31 is_stmt 0 view .LVU298
1123 0068 0823 movs r3, #8
1124 006a 2B93 str r3, [sp, #172]
492:Src/stm32f7xx_hal_msp.c ****
1125 .loc 1 492 5 is_stmt 1 view .LVU299
1126 006c 27A9 add r1, sp, #156
1127 006e 0548 ldr r0, .L67+8
1128 0070 FFF7FEFF bl HAL_GPIO_Init
1129 .LVL71:
1130 .loc 1 500 1 is_stmt 0 view .LVU300
1131 0074 D5E7 b .L61
1132 .L66:
476:Src/stm32f7xx_hal_msp.c **** }
1133 .loc 1 476 7 is_stmt 1 view .LVU301
1134 0076 FFF7FEFF bl Error_Handler
1135 .LVL72:
ARM GAS /tmp/ccspVlUR.s page 33
1136 007a DBE7 b .L63
1137 .L68:
1138 .align 2
1139 .L67:
1140 007c 007C0040 .word 1073773568
1141 0080 00380240 .word 1073887232
1142 0084 00100240 .word 1073876992
1143 .cfi_endproc
1144 .LFE1191:
1146 .section .text.HAL_UART_MspDeInit,"ax",%progbits
1147 .align 1
1148 .global HAL_UART_MspDeInit
1149 .syntax unified
1150 .thumb
1151 .thumb_func
1152 .fpu fpv5-d16
1154 HAL_UART_MspDeInit:
1155 .LVL73:
1156 .LFB1192:
501:Src/stm32f7xx_hal_msp.c ****
502:Src/stm32f7xx_hal_msp.c **** /**
503:Src/stm32f7xx_hal_msp.c **** * @brief UART MSP De-Initialization
504:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
505:Src/stm32f7xx_hal_msp.c **** * @param huart: UART handle pointer
506:Src/stm32f7xx_hal_msp.c **** * @retval None
507:Src/stm32f7xx_hal_msp.c **** */
508:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
509:Src/stm32f7xx_hal_msp.c **** {
1157 .loc 1 509 1 view -0
1158 .cfi_startproc
1159 @ args = 0, pretend = 0, frame = 0
1160 @ frame_needed = 0, uses_anonymous_args = 0
1161 .loc 1 509 1 is_stmt 0 view .LVU303
1162 0000 08B5 push {r3, lr}
1163 .LCFI25:
1164 .cfi_def_cfa_offset 8
1165 .cfi_offset 3, -8
1166 .cfi_offset 14, -4
510:Src/stm32f7xx_hal_msp.c **** if(huart->Instance==UART8)
1167 .loc 1 510 3 is_stmt 1 view .LVU304
1168 .loc 1 510 11 is_stmt 0 view .LVU305
1169 0002 0268 ldr r2, [r0]
1170 .loc 1 510 5 view .LVU306
1171 0004 064B ldr r3, .L73
1172 0006 9A42 cmp r2, r3
1173 0008 00D0 beq .L72
1174 .LVL74:
1175 .L69:
511:Src/stm32f7xx_hal_msp.c **** {
512:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspDeInit 0 */
513:Src/stm32f7xx_hal_msp.c ****
514:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspDeInit 0 */
515:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock disable */
516:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_UART8_CLK_DISABLE();
517:Src/stm32f7xx_hal_msp.c ****
518:Src/stm32f7xx_hal_msp.c **** /**UART8 GPIO Configuration
519:Src/stm32f7xx_hal_msp.c **** PE0 ------> UART8_RX
ARM GAS /tmp/ccspVlUR.s page 34
520:Src/stm32f7xx_hal_msp.c **** PE1 ------> UART8_TX
521:Src/stm32f7xx_hal_msp.c **** */
522:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1);
523:Src/stm32f7xx_hal_msp.c ****
524:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspDeInit 1 */
525:Src/stm32f7xx_hal_msp.c ****
526:Src/stm32f7xx_hal_msp.c **** /* USER CODE END UART8_MspDeInit 1 */
527:Src/stm32f7xx_hal_msp.c **** }
528:Src/stm32f7xx_hal_msp.c ****
529:Src/stm32f7xx_hal_msp.c **** }
1176 .loc 1 529 1 view .LVU307
1177 000a 08BD pop {r3, pc}
1178 .LVL75:
1179 .L72:
516:Src/stm32f7xx_hal_msp.c ****
1180 .loc 1 516 5 is_stmt 1 view .LVU308
1181 000c 054A ldr r2, .L73+4
1182 000e 136C ldr r3, [r2, #64]
1183 0010 23F00043 bic r3, r3, #-2147483648
1184 0014 1364 str r3, [r2, #64]
522:Src/stm32f7xx_hal_msp.c ****
1185 .loc 1 522 5 view .LVU309
1186 0016 0321 movs r1, #3
1187 0018 0348 ldr r0, .L73+8
1188 .LVL76:
522:Src/stm32f7xx_hal_msp.c ****
1189 .loc 1 522 5 is_stmt 0 view .LVU310
1190 001a FFF7FEFF bl HAL_GPIO_DeInit
1191 .LVL77:
1192 .loc 1 529 1 view .LVU311
1193 001e F4E7 b .L69
1194 .L74:
1195 .align 2
1196 .L73:
1197 0020 007C0040 .word 1073773568
1198 0024 00380240 .word 1073887232
1199 0028 00100240 .word 1073876992
1200 .cfi_endproc
1201 .LFE1192:
1203 .text
1204 .Letext0:
1205 .file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h"
1206 .file 3 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
1207 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
1208 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
1209 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
1210 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
1211 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
1212 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
1213 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
1214 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
1215 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
1216 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
1217 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
1218 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
1219 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
1220 .file 17 "Inc/main.h"
ARM GAS /tmp/ccspVlUR.s page 35
1221 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
1222 .file 19 "<built-in>"
ARM GAS /tmp/ccspVlUR.s page 36
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f7xx_hal_msp.c
/tmp/ccspVlUR.s:17 .text.HAL_MspInit:0000000000000000 $t
/tmp/ccspVlUR.s:25 .text.HAL_MspInit:0000000000000000 HAL_MspInit
/tmp/ccspVlUR.s:76 .text.HAL_MspInit:000000000000002c $d
/tmp/ccspVlUR.s:81 .text.HAL_ADC_MspInit:0000000000000000 $t
/tmp/ccspVlUR.s:88 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit
/tmp/ccspVlUR.s:319 .text.HAL_ADC_MspInit:00000000000000f4 $d
/tmp/ccspVlUR.s:330 .text.HAL_ADC_MspDeInit:0000000000000000 $t
/tmp/ccspVlUR.s:337 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit
/tmp/ccspVlUR.s:410 .text.HAL_ADC_MspDeInit:0000000000000050 $d
/tmp/ccspVlUR.s:420 .text.HAL_SD_MspInit:0000000000000000 $t
/tmp/ccspVlUR.s:427 .text.HAL_SD_MspInit:0000000000000000 HAL_SD_MspInit
/tmp/ccspVlUR.s:603 .text.HAL_SD_MspInit:00000000000000a8 $d
/tmp/ccspVlUR.s:611 .text.HAL_SD_MspDeInit:0000000000000000 $t
/tmp/ccspVlUR.s:618 .text.HAL_SD_MspDeInit:0000000000000000 HAL_SD_MspDeInit
/tmp/ccspVlUR.s:666 .text.HAL_SD_MspDeInit:000000000000002c $d
/tmp/ccspVlUR.s:674 .text.HAL_TIM_Base_MspInit:0000000000000000 $t
/tmp/ccspVlUR.s:681 .text.HAL_TIM_Base_MspInit:0000000000000000 HAL_TIM_Base_MspInit
/tmp/ccspVlUR.s:809 .text.HAL_TIM_Base_MspInit:0000000000000080 $d
/tmp/ccspVlUR.s:817 .text.HAL_TIM_MspPostInit:0000000000000000 $t
/tmp/ccspVlUR.s:824 .text.HAL_TIM_MspPostInit:0000000000000000 HAL_TIM_MspPostInit
/tmp/ccspVlUR.s:909 .text.HAL_TIM_MspPostInit:000000000000004c $d
/tmp/ccspVlUR.s:915 .text.HAL_TIM_Base_MspDeInit:0000000000000000 $t
/tmp/ccspVlUR.s:922 .text.HAL_TIM_Base_MspDeInit:0000000000000000 HAL_TIM_Base_MspDeInit
/tmp/ccspVlUR.s:996 .text.HAL_TIM_Base_MspDeInit:0000000000000050 $d
/tmp/ccspVlUR.s:1003 .text.HAL_UART_MspInit:0000000000000000 $t
/tmp/ccspVlUR.s:1010 .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit
/tmp/ccspVlUR.s:1140 .text.HAL_UART_MspInit:000000000000007c $d
/tmp/ccspVlUR.s:1147 .text.HAL_UART_MspDeInit:0000000000000000 $t
/tmp/ccspVlUR.s:1154 .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit
/tmp/ccspVlUR.s:1197 .text.HAL_UART_MspDeInit:0000000000000020 $d
UNDEFINED SYMBOLS
HAL_GPIO_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
HAL_GPIO_DeInit
memset
HAL_RCCEx_PeriphCLKConfig
Error_Handler
HAL_NVIC_DisableIRQ
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