Ayzen 7442f4dd3a added sram saw

2026-02-03 19:29:57 +03:00

..

bsp_driver_sd.c

initial software commit

2025-03-03 15:53:11 +03:00

fatfs_platform.c

initial software commit

2025-03-03 15:53:11 +03:00

fatfs.c

initial software commit

2025-03-03 15:53:11 +03:00

File_Handling.c

initial software commit

2025-03-03 15:53:11 +03:00

main.c

added sram saw

2026-02-03 19:29:57 +03:00

main.c_backup

applied last changes from version without git

2025-03-03 16:06:13 +03:00

sd_diskio.c

initial software commit

2025-03-03 15:53:11 +03:00

stm32f7xx_hal_msp.c

partially solved issue with random modulator and ADC clock stopping at the end of ЛЧМ. Done: when we want to stop clocks -- enable IRQ on sloewr clock (TIM11). In IRQ switches TIM4, TIM11 to one-pulse mode, disables IRQ. When we starting these timers th next time -- we resets their counters, one-pulse mode disables.

2025-04-15 21:29:24 +03:00

stm32f7xx_it.c

saw AD9102 done

2026-02-03 18:57:12 +03:00

stm32f7xx_it.c_backup

applied last changes from version without git

2025-03-03 16:06:13 +03:00

syscalls.c

initial software commit

2025-03-03 15:53:11 +03:00

sysmem.c

initial software commit

2025-03-03 15:53:11 +03:00

system_stm32f7xx.c

initial software commit

2025-03-03 15:53:11 +03:00