ChTheo/RadioPhotonic_PCB_software
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RadioPhotonic_PCB_software/build/stm32f7xx_hal_pwr_ex.lst
feda 2d2912a771 initial software commit
2025-03-03 15:53:11 +03:00

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ARM GAS /tmp/cc97GYnP.s page 1
1 .cpu cortex-m7
2 .eabi_attribute 28, 1
3 .eabi_attribute 20, 1
4 .eabi_attribute 21, 1
5 .eabi_attribute 23, 3
6 .eabi_attribute 24, 1
7 .eabi_attribute 25, 1
8 .eabi_attribute 26, 1
9 .eabi_attribute 30, 1
10 .eabi_attribute 34, 1
11 .eabi_attribute 18, 4
12 .file "stm32f7xx_hal_pwr_ex.c"
13 .text
14 .Ltext0:
15 .cfi_sections .debug_frame
16 .section .text.HAL_PWREx_EnableBkUpReg,"ax",%progbits
17 .align 1
18 .global HAL_PWREx_EnableBkUpReg
19 .arch armv7e-m
20 .syntax unified
21 .thumb
22 .thumb_func
23 .fpu fpv5-d16
25 HAL_PWREx_EnableBkUpReg:
26 .LFB141:
27 .file 1 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c"
1:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
2:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ******************************************************************************
3:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @file stm32f7xx_hal_pwr_ex.c
4:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @author MCD Application Team
5:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver.
6:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * functionalities of PWR extension peripheral:
8:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * + Peripheral Extended features functions
9:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
10:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ******************************************************************************
11:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @attention
12:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
13:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * Copyright (c) 2017 STMicroelectronics.
14:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * All rights reserved.
15:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
16:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file
17:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * in the root directory of this software component.
18:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
19:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
20:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ******************************************************************************
21:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
22:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
23:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/
24:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #include "stm32f7xx_hal.h"
25:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
26:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @addtogroup STM32F7xx_HAL_Driver
27:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{
28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief PWR HAL module driver
ARM GAS /tmp/cc97GYnP.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{
33:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
34:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
35:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED
36:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
37:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/
38:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/
39:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @addtogroup PWREx_Private_Constants
40:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{
41:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
42:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000
43:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000
44:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_BKPREG_TIMEOUT_VALUE 1000
45:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_VOSRDY_TIMEOUT_VALUE 1000
46:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
47:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @}
48:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
49:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
50:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/
51:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/
52:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/
53:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private functions ---------------------------------------------------------*/
54:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
55:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{
56:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
57:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
58:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
59:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Peripheral Extended features functions
60:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
61:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** @verbatim
62:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
63:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ===============================================================================
64:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ##### Peripheral extended features functions #####
65:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ===============================================================================
66:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
67:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *** Main and Backup Regulators configuration ***
68:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ================================================
69:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** [..]
70:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
71:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
72:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** retained even in Standby or VBAT mode when the low power backup regulator
73:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** is enabled. It can be considered as an internal EEPROM when VBAT is
74:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** always present. You can use the HAL_PWREx_EnableBkUpReg() function to
75:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** enable the low power backup regulator.
76:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
77:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
78:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to
79:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** save battery life.
80:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
81:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read
82:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** protected to prevent confidential data, such as cryptographic private
83:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** key, from being accessed. The backup SRAM can be erased only through
84:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the Flash interface when a protection level change from level 1 to
85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** level 0 is requested.
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** -@- Refer to the description of Read protection (RDP) in the Flash
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** programming manual.
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
ARM GAS /tmp/cc97GYnP.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The main internal regulator can be configured to have a tradeoff between
90:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** performance and power consumption when the device does not operate at
91:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
92:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** macro which configure VOS bit in PWR_CR register
93:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
94:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** Refer to the product datasheets for more details.
95:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
96:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *** FLASH Power Down configuration ****
97:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** =======================================
98:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** [..]
99:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) By setting the FPDS bit in the PWR_CR register by using the
100:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** down mode when the device enters Stop mode. When the Flash memory
102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** is in power down mode, an additional startup delay is incurred when
103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** waking up from Stop mode.
104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *** Over-Drive and Under-Drive configuration ****
106:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** =================================================
107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** [..]
108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) In Run mode: the main regulator has 2 operating modes available:
109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Normal mode: The CPU and core logic operate at maximum frequency at a given
110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** voltage scaling (scale 1, scale 2 or scale 3)
111:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** higher frequency than the normal mode for a given voltage scaling (scale 1,
113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function
114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mod
115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the sequence described in Reference manual.
116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
117:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) In Stop mode: the main regulator or low power regulator supplies a low power
118:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** voltage to the 1.2V domain, thus preserving the content of registers
119:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** and internal SRAM. 2 operating modes are available:
120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is used in Scale 3 or
122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** low voltage mode.
123:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is
124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is in low voltage mode.
125:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
126:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** @endverbatim
127:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{
128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables the Backup Regulator.
132:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status
133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
28 .loc 1 135 1 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 0
31 @ frame_needed = 0, uses_anonymous_args = 0
32 0000 10B5 push {r4, lr}
33 .LCFI0:
34 .cfi_def_cfa_offset 8
35 .cfi_offset 4, -8
36 .cfi_offset 14, -4
136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0;
ARM GAS /tmp/cc97GYnP.s page 4
37 .loc 1 136 3 view .LVU1
38 .LVL0:
137:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Backup regulator */
139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 |= PWR_CSR1_BRE;
39 .loc 1 139 3 view .LVU2
40 .loc 1 139 13 is_stmt 0 view .LVU3
41 0002 0D4B ldr r3, .L8
42 0004 5A68 ldr r2, [r3, #4]
43 0006 42F40072 orr r2, r2, #512
44 000a 5A60 str r2, [r3, #4]
140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Workaround for the following hardware bug: */
142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Id 19: PWR : No STANDBY wake-up when Back-up RAM enabled (ref. Errata Sheet p23) */
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 |= PWR_CSR1_EIWUP;
45 .loc 1 143 3 is_stmt 1 view .LVU4
46 .loc 1 143 13 is_stmt 0 view .LVU5
47 000c 5A68 ldr r2, [r3, #4]
48 000e 42F48072 orr r2, r2, #256
49 0012 5A60 str r2, [r3, #4]
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
50 .loc 1 146 3 is_stmt 1 view .LVU6
51 .loc 1 146 15 is_stmt 0 view .LVU7
52 0014 FFF7FEFF bl HAL_GetTick
53 .LVL1:
54 0018 0446 mov r4, r0
55 .LVL2:
147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
148:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */
149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
56 .loc 1 149 3 is_stmt 1 view .LVU8
57 .L2:
58 .loc 1 149 8 view .LVU9
59 .loc 1 149 9 is_stmt 0 view .LVU10
60 001a 074B ldr r3, .L8
61 001c 5B68 ldr r3, [r3, #4]
62 .loc 1 149 8 view .LVU11
63 001e 13F0080F tst r3, #8
64 0022 07D1 bne .L7
150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
65 .loc 1 151 5 is_stmt 1 view .LVU12
66 .loc 1 151 9 is_stmt 0 view .LVU13
67 0024 FFF7FEFF bl HAL_GetTick
68 .LVL3:
69 .loc 1 151 23 view .LVU14
70 0028 001B subs r0, r0, r4
71 .loc 1 151 7 view .LVU15
72 002a B0F57A7F cmp r0, #1000
73 002e F4D9 bls .L2
152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
74 .loc 1 153 14 view .LVU16
75 0030 0320 movs r0, #3
76 0032 00E0 b .L3
ARM GAS /tmp/cc97GYnP.s page 5
77 .L7:
154:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
156:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK;
78 .loc 1 156 10 view .LVU17
79 0034 0020 movs r0, #0
80 .L3:
157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
81 .loc 1 157 1 view .LVU18
82 0036 10BD pop {r4, pc}
83 .LVL4:
84 .L9:
85 .loc 1 157 1 view .LVU19
86 .align 2
87 .L8:
88 0038 00700040 .word 1073770496
89 .cfi_endproc
90 .LFE141:
92 .section .text.HAL_PWREx_DisableBkUpReg,"ax",%progbits
93 .align 1
94 .global HAL_PWREx_DisableBkUpReg
95 .syntax unified
96 .thumb
97 .thumb_func
98 .fpu fpv5-d16
100 HAL_PWREx_DisableBkUpReg:
101 .LFB142:
158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables the Backup Regulator.
161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status
162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
163:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
102 .loc 1 164 1 is_stmt 1 view -0
103 .cfi_startproc
104 @ args = 0, pretend = 0, frame = 0
105 @ frame_needed = 0, uses_anonymous_args = 0
106 0000 10B5 push {r4, lr}
107 .LCFI1:
108 .cfi_def_cfa_offset 8
109 .cfi_offset 4, -8
110 .cfi_offset 14, -4
165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0;
111 .loc 1 165 3 view .LVU21
112 .LVL5:
166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable Backup regulator */
168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 &= (uint32_t)~((uint32_t)PWR_CSR1_BRE);
113 .loc 1 168 3 view .LVU22
114 .loc 1 168 13 is_stmt 0 view .LVU23
115 0002 0D4B ldr r3, .L17
116 0004 5A68 ldr r2, [r3, #4]
117 0006 22F40072 bic r2, r2, #512
118 000a 5A60 str r2, [r3, #4]
169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Workaround for the following hardware bug: */
ARM GAS /tmp/cc97GYnP.s page 6
171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Id 19: PWR : No STANDBY wake-up when Back-up RAM enabled (ref. Errata Sheet p23) */
172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 |= PWR_CSR1_EIWUP;
119 .loc 1 172 3 is_stmt 1 view .LVU24
120 .loc 1 172 13 is_stmt 0 view .LVU25
121 000c 5A68 ldr r2, [r3, #4]
122 000e 42F48072 orr r2, r2, #256
123 0012 5A60 str r2, [r3, #4]
173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
124 .loc 1 175 3 is_stmt 1 view .LVU26
125 .loc 1 175 15 is_stmt 0 view .LVU27
126 0014 FFF7FEFF bl HAL_GetTick
127 .LVL6:
128 0018 0446 mov r4, r0
129 .LVL7:
176:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
177:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */
178:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
130 .loc 1 178 3 is_stmt 1 view .LVU28
131 .L11:
132 .loc 1 178 8 view .LVU29
133 .loc 1 178 9 is_stmt 0 view .LVU30
134 001a 074B ldr r3, .L17
135 001c 5B68 ldr r3, [r3, #4]
136 .loc 1 178 8 view .LVU31
137 001e 13F0080F tst r3, #8
138 0022 07D0 beq .L16
179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
139 .loc 1 180 5 is_stmt 1 view .LVU32
140 .loc 1 180 9 is_stmt 0 view .LVU33
141 0024 FFF7FEFF bl HAL_GetTick
142 .LVL8:
143 .loc 1 180 23 view .LVU34
144 0028 001B subs r0, r0, r4
145 .loc 1 180 7 view .LVU35
146 002a B0F57A7F cmp r0, #1000
147 002e F4D9 bls .L11
181:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
182:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
148 .loc 1 182 14 view .LVU36
149 0030 0320 movs r0, #3
150 0032 00E0 b .L12
151 .L16:
183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
184:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK;
152 .loc 1 185 10 view .LVU37
153 0034 0020 movs r0, #0
154 .L12:
186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
155 .loc 1 186 1 view .LVU38
156 0036 10BD pop {r4, pc}
157 .LVL9:
158 .L18:
159 .loc 1 186 1 view .LVU39
ARM GAS /tmp/cc97GYnP.s page 7
160 .align 2
161 .L17:
162 0038 00700040 .word 1073770496
163 .cfi_endproc
164 .LFE142:
166 .section .text.HAL_PWREx_EnableFlashPowerDown,"ax",%progbits
167 .align 1
168 .global HAL_PWREx_EnableFlashPowerDown
169 .syntax unified
170 .thumb
171 .thumb_func
172 .fpu fpv5-d16
174 HAL_PWREx_EnableFlashPowerDown:
175 .LFB143:
187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
189:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables the Flash Power Down in Stop mode.
190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_EnableFlashPowerDown(void)
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
176 .loc 1 193 1 is_stmt 1 view -0
177 .cfi_startproc
178 @ args = 0, pretend = 0, frame = 0
179 @ frame_needed = 0, uses_anonymous_args = 0
180 @ link register save eliminated.
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Flash Power Down */
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 |= PWR_CR1_FPDS;
181 .loc 1 195 3 view .LVU41
182 .loc 1 195 12 is_stmt 0 view .LVU42
183 0000 024A ldr r2, .L20
184 0002 1368 ldr r3, [r2]
185 0004 43F40073 orr r3, r3, #512
186 0008 1360 str r3, [r2]
196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
187 .loc 1 196 1 view .LVU43
188 000a 7047 bx lr
189 .L21:
190 .align 2
191 .L20:
192 000c 00700040 .word 1073770496
193 .cfi_endproc
194 .LFE143:
196 .section .text.HAL_PWREx_DisableFlashPowerDown,"ax",%progbits
197 .align 1
198 .global HAL_PWREx_DisableFlashPowerDown
199 .syntax unified
200 .thumb
201 .thumb_func
202 .fpu fpv5-d16
204 HAL_PWREx_DisableFlashPowerDown:
205 .LFB144:
197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables the Flash Power Down in Stop mode.
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
ARM GAS /tmp/cc97GYnP.s page 8
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_DisableFlashPowerDown(void)
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
206 .loc 1 203 1 is_stmt 1 view -0
207 .cfi_startproc
208 @ args = 0, pretend = 0, frame = 0
209 @ frame_needed = 0, uses_anonymous_args = 0
210 @ link register save eliminated.
204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the Flash Power Down */
205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_FPDS);
211 .loc 1 205 3 view .LVU45
212 .loc 1 205 12 is_stmt 0 view .LVU46
213 0000 024A ldr r2, .L23
214 0002 1368 ldr r3, [r2]
215 0004 23F40073 bic r3, r3, #512
216 0008 1360 str r3, [r2]
206:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
217 .loc 1 206 1 view .LVU47
218 000a 7047 bx lr
219 .L24:
220 .align 2
221 .L23:
222 000c 00700040 .word 1073770496
223 .cfi_endproc
224 .LFE144:
226 .section .text.HAL_PWREx_EnableMainRegulatorLowVoltage,"ax",%progbits
227 .align 1
228 .global HAL_PWREx_EnableMainRegulatorLowVoltage
229 .syntax unified
230 .thumb
231 .thumb_func
232 .fpu fpv5-d16
234 HAL_PWREx_EnableMainRegulatorLowVoltage:
235 .LFB145:
207:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables Main Regulator low voltage mode.
210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_EnableMainRegulatorLowVoltage(void)
213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
236 .loc 1 213 1 is_stmt 1 view -0
237 .cfi_startproc
238 @ args = 0, pretend = 0, frame = 0
239 @ frame_needed = 0, uses_anonymous_args = 0
240 @ link register save eliminated.
214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Main regulator low voltage */
215:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 |= PWR_CR1_MRUDS;
241 .loc 1 215 3 view .LVU49
242 .loc 1 215 12 is_stmt 0 view .LVU50
243 0000 024A ldr r2, .L26
244 0002 1368 ldr r3, [r2]
245 0004 43F40063 orr r3, r3, #2048
246 0008 1360 str r3, [r2]
216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
247 .loc 1 216 1 view .LVU51
248 000a 7047 bx lr
249 .L27:
ARM GAS /tmp/cc97GYnP.s page 9
250 .align 2
251 .L26:
252 000c 00700040 .word 1073770496
253 .cfi_endproc
254 .LFE145:
256 .section .text.HAL_PWREx_DisableMainRegulatorLowVoltage,"ax",%progbits
257 .align 1
258 .global HAL_PWREx_DisableMainRegulatorLowVoltage
259 .syntax unified
260 .thumb
261 .thumb_func
262 .fpu fpv5-d16
264 HAL_PWREx_DisableMainRegulatorLowVoltage:
265 .LFB146:
217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables Main Regulator low voltage mode.
220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_DisableMainRegulatorLowVoltage(void)
223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
266 .loc 1 223 1 is_stmt 1 view -0
267 .cfi_startproc
268 @ args = 0, pretend = 0, frame = 0
269 @ frame_needed = 0, uses_anonymous_args = 0
270 @ link register save eliminated.
224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable Main regulator low voltage */
225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_MRUDS);
271 .loc 1 225 3 view .LVU53
272 .loc 1 225 12 is_stmt 0 view .LVU54
273 0000 024A ldr r2, .L29
274 0002 1368 ldr r3, [r2]
275 0004 23F40063 bic r3, r3, #2048
276 0008 1360 str r3, [r2]
226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
277 .loc 1 226 1 view .LVU55
278 000a 7047 bx lr
279 .L30:
280 .align 2
281 .L29:
282 000c 00700040 .word 1073770496
283 .cfi_endproc
284 .LFE146:
286 .section .text.HAL_PWREx_EnableLowRegulatorLowVoltage,"ax",%progbits
287 .align 1
288 .global HAL_PWREx_EnableLowRegulatorLowVoltage
289 .syntax unified
290 .thumb
291 .thumb_func
292 .fpu fpv5-d16
294 HAL_PWREx_EnableLowRegulatorLowVoltage:
295 .LFB147:
227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables Low Power Regulator low voltage mode.
230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
ARM GAS /tmp/cc97GYnP.s page 10
232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_EnableLowRegulatorLowVoltage(void)
233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
296 .loc 1 233 1 is_stmt 1 view -0
297 .cfi_startproc
298 @ args = 0, pretend = 0, frame = 0
299 @ frame_needed = 0, uses_anonymous_args = 0
300 @ link register save eliminated.
234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable low power regulator */
235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 |= PWR_CR1_LPUDS;
301 .loc 1 235 3 view .LVU57
302 .loc 1 235 12 is_stmt 0 view .LVU58
303 0000 024A ldr r2, .L32
304 0002 1368 ldr r3, [r2]
305 0004 43F48063 orr r3, r3, #1024
306 0008 1360 str r3, [r2]
236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
307 .loc 1 236 1 view .LVU59
308 000a 7047 bx lr
309 .L33:
310 .align 2
311 .L32:
312 000c 00700040 .word 1073770496
313 .cfi_endproc
314 .LFE147:
316 .section .text.HAL_PWREx_DisableLowRegulatorLowVoltage,"ax",%progbits
317 .align 1
318 .global HAL_PWREx_DisableLowRegulatorLowVoltage
319 .syntax unified
320 .thumb
321 .thumb_func
322 .fpu fpv5-d16
324 HAL_PWREx_DisableLowRegulatorLowVoltage:
325 .LFB148:
237:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables Low Power Regulator low voltage mode.
240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_DisableLowRegulatorLowVoltage(void)
243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
326 .loc 1 243 1 is_stmt 1 view -0
327 .cfi_startproc
328 @ args = 0, pretend = 0, frame = 0
329 @ frame_needed = 0, uses_anonymous_args = 0
330 @ link register save eliminated.
244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable low power regulator */
245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_LPUDS);
331 .loc 1 245 3 view .LVU61
332 .loc 1 245 12 is_stmt 0 view .LVU62
333 0000 024A ldr r2, .L35
334 0002 1368 ldr r3, [r2]
335 0004 23F48063 bic r3, r3, #1024
336 0008 1360 str r3, [r2]
246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
337 .loc 1 246 1 view .LVU63
338 000a 7047 bx lr
339 .L36:
ARM GAS /tmp/cc97GYnP.s page 11
340 .align 2
341 .L35:
342 000c 00700040 .word 1073770496
343 .cfi_endproc
344 .LFE148:
346 .section .text.HAL_PWREx_EnableOverDrive,"ax",%progbits
347 .align 1
348 .global HAL_PWREx_EnableOverDrive
349 .syntax unified
350 .thumb
351 .thumb_func
352 .fpu fpv5-d16
354 HAL_PWREx_EnableOverDrive:
355 .LFB149:
247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Activates the Over-Drive mode.
250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode allows the CPU and the core logic to operate at a higher frequency
251:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note It is recommended to enter or exit Over-drive mode when the application is not running
253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * critical tasks and when the system clock source is either HSI or HSE.
254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * During the Over-drive switch activation, no peripheral clocks should be enabled.
255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * The peripheral clocks must be enabled once the Over-drive mode is activated.
256:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
356 .loc 1 259 1 is_stmt 1 view -0
357 .cfi_startproc
358 @ args = 0, pretend = 0, frame = 8
359 @ frame_needed = 0, uses_anonymous_args = 0
360 0000 10B5 push {r4, lr}
361 .LCFI2:
362 .cfi_def_cfa_offset 8
363 .cfi_offset 4, -8
364 .cfi_offset 14, -4
365 0002 82B0 sub sp, sp, #8
366 .LCFI3:
367 .cfi_def_cfa_offset 16
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0;
368 .loc 1 260 3 view .LVU65
369 .LVL10:
261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
370 .loc 1 262 3 view .LVU66
371 .LBB2:
372 .loc 1 262 3 view .LVU67
373 .loc 1 262 3 view .LVU68
374 0004 1B4B ldr r3, .L48
375 0006 1A6C ldr r2, [r3, #64]
376 0008 42F08052 orr r2, r2, #268435456
377 000c 1A64 str r2, [r3, #64]
378 .loc 1 262 3 view .LVU69
379 000e 1B6C ldr r3, [r3, #64]
380 0010 03F08053 and r3, r3, #268435456
381 0014 0193 str r3, [sp, #4]
382 .loc 1 262 3 view .LVU70
ARM GAS /tmp/cc97GYnP.s page 12
383 0016 019B ldr r3, [sp, #4]
384 .LBE2:
385 .loc 1 262 3 view .LVU71
263:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Over-drive to extend the clock frequency to 216 MHz */
265:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVE_ENABLE();
386 .loc 1 265 3 view .LVU72
387 0018 174A ldr r2, .L48+4
388 001a 1368 ldr r3, [r2]
389 001c 43F48033 orr r3, r3, #65536
390 0020 1360 str r3, [r2]
266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
391 .loc 1 268 3 view .LVU73
392 .loc 1 268 15 is_stmt 0 view .LVU74
393 0022 FFF7FEFF bl HAL_GetTick
394 .LVL11:
395 0026 0446 mov r4, r0
396 .LVL12:
269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
397 .loc 1 270 3 is_stmt 1 view .LVU75
398 .L38:
399 .loc 1 270 8 view .LVU76
400 .loc 1 270 10 is_stmt 0 view .LVU77
401 0028 134B ldr r3, .L48+4
402 002a 5B68 ldr r3, [r3, #4]
403 .loc 1 270 8 view .LVU78
404 002c 13F4803F tst r3, #65536
405 0030 08D1 bne .L46
271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
406 .loc 1 272 5 is_stmt 1 view .LVU79
407 .loc 1 272 9 is_stmt 0 view .LVU80
408 0032 FFF7FEFF bl HAL_GetTick
409 .LVL13:
410 .loc 1 272 23 view .LVU81
411 0036 001B subs r0, r0, r4
412 .loc 1 272 7 view .LVU82
413 0038 B0F57A7F cmp r0, #1000
414 003c F4D9 bls .L38
273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
415 .loc 1 274 14 view .LVU83
416 003e 0320 movs r0, #3
417 .L39:
275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Over-drive switch */
279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVESWITCHING_ENABLE();
280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
ARM GAS /tmp/cc97GYnP.s page 13
285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK;
292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
418 .loc 1 292 1 view .LVU84
419 0040 02B0 add sp, sp, #8
420 .LCFI4:
421 .cfi_remember_state
422 .cfi_def_cfa_offset 8
423 @ sp needed
424 0042 10BD pop {r4, pc}
425 .LVL14:
426 .L46:
427 .LCFI5:
428 .cfi_restore_state
279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
429 .loc 1 279 3 is_stmt 1 view .LVU85
430 0044 0C4A ldr r2, .L48+4
431 0046 1368 ldr r3, [r2]
432 0048 43F40033 orr r3, r3, #131072
433 004c 1360 str r3, [r2]
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
434 .loc 1 282 3 view .LVU86
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
435 .loc 1 282 15 is_stmt 0 view .LVU87
436 004e FFF7FEFF bl HAL_GetTick
437 .LVL15:
438 0052 0446 mov r4, r0
439 .LVL16:
284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
440 .loc 1 284 3 is_stmt 1 view .LVU88
441 .L41:
284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
442 .loc 1 284 8 view .LVU89
284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
443 .loc 1 284 10 is_stmt 0 view .LVU90
444 0054 084B ldr r3, .L48+4
445 0056 5B68 ldr r3, [r3, #4]
284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
446 .loc 1 284 8 view .LVU91
447 0058 13F4003F tst r3, #131072
448 005c 07D1 bne .L47
286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
449 .loc 1 286 5 is_stmt 1 view .LVU92
286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
450 .loc 1 286 9 is_stmt 0 view .LVU93
451 005e FFF7FEFF bl HAL_GetTick
452 .LVL17:
286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
453 .loc 1 286 23 view .LVU94
454 0062 001B subs r0, r0, r4
286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
455 .loc 1 286 7 view .LVU95
ARM GAS /tmp/cc97GYnP.s page 14
456 0064 B0F57A7F cmp r0, #1000
457 0068 F4D9 bls .L41
288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
458 .loc 1 288 14 view .LVU96
459 006a 0320 movs r0, #3
460 006c E8E7 b .L39
461 .L47:
291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
462 .loc 1 291 10 view .LVU97
463 006e 0020 movs r0, #0
464 0070 E6E7 b .L39
465 .L49:
466 0072 00BF .align 2
467 .L48:
468 0074 00380240 .word 1073887232
469 0078 00700040 .word 1073770496
470 .cfi_endproc
471 .LFE149:
473 .section .text.HAL_PWREx_DisableOverDrive,"ax",%progbits
474 .align 1
475 .global HAL_PWREx_DisableOverDrive
476 .syntax unified
477 .thumb
478 .thumb_func
479 .fpu fpv5-d16
481 HAL_PWREx_DisableOverDrive:
482 .LFB150:
293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Deactivates the Over-Drive mode.
296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode allows the CPU and the core logic to operate at a higher frequency
297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note It is recommended to enter or exit Over-drive mode when the application is not running
299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * critical tasks and when the system clock source is either HSI or HSE.
300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * During the Over-drive switch activation, no peripheral clocks should be enabled.
301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * The peripheral clocks must be enabled once the Over-drive mode is activated.
302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status
303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void)
305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
483 .loc 1 305 1 is_stmt 1 view -0
484 .cfi_startproc
485 @ args = 0, pretend = 0, frame = 8
486 @ frame_needed = 0, uses_anonymous_args = 0
487 0000 10B5 push {r4, lr}
488 .LCFI6:
489 .cfi_def_cfa_offset 8
490 .cfi_offset 4, -8
491 .cfi_offset 14, -4
492 0002 82B0 sub sp, sp, #8
493 .LCFI7:
494 .cfi_def_cfa_offset 16
306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0;
495 .loc 1 306 3 view .LVU99
496 .LVL18:
307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
ARM GAS /tmp/cc97GYnP.s page 15
497 .loc 1 308 3 view .LVU100
498 .LBB3:
499 .loc 1 308 3 view .LVU101
500 .loc 1 308 3 view .LVU102
501 0004 1B4B ldr r3, .L61
502 0006 1A6C ldr r2, [r3, #64]
503 0008 42F08052 orr r2, r2, #268435456
504 000c 1A64 str r2, [r3, #64]
505 .loc 1 308 3 view .LVU103
506 000e 1B6C ldr r3, [r3, #64]
507 0010 03F08053 and r3, r3, #268435456
508 0014 0193 str r3, [sp, #4]
509 .loc 1 308 3 view .LVU104
510 0016 019B ldr r3, [sp, #4]
511 .LBE3:
512 .loc 1 308 3 view .LVU105
309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the Over-drive switch */
311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVESWITCHING_DISABLE();
513 .loc 1 311 3 view .LVU106
514 0018 174A ldr r2, .L61+4
515 001a 1368 ldr r3, [r2]
516 001c 23F40033 bic r3, r3, #131072
517 0020 1360 str r3, [r2]
312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
518 .loc 1 314 3 view .LVU107
519 .loc 1 314 15 is_stmt 0 view .LVU108
520 0022 FFF7FEFF bl HAL_GetTick
521 .LVL19:
522 0026 0446 mov r4, r0
523 .LVL20:
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
524 .loc 1 316 3 is_stmt 1 view .LVU109
525 .L51:
526 .loc 1 316 8 view .LVU110
527 .loc 1 316 9 is_stmt 0 view .LVU111
528 0028 134B ldr r3, .L61+4
529 002a 5B68 ldr r3, [r3, #4]
530 .loc 1 316 8 view .LVU112
531 002c 13F4003F tst r3, #131072
532 0030 08D0 beq .L59
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
533 .loc 1 318 5 is_stmt 1 view .LVU113
534 .loc 1 318 9 is_stmt 0 view .LVU114
535 0032 FFF7FEFF bl HAL_GetTick
536 .LVL21:
537 .loc 1 318 23 view .LVU115
538 0036 001B subs r0, r0, r4
539 .loc 1 318 7 view .LVU116
540 0038 B0F57A7F cmp r0, #1000
541 003c F4D9 bls .L51
319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
ARM GAS /tmp/cc97GYnP.s page 16
542 .loc 1 320 14 view .LVU117
543 003e 0320 movs r0, #3
544 .L52:
321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
323:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
324:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the Over-drive */
325:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVE_DISABLE();
326:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
329:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK;
339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
545 .loc 1 339 1 view .LVU118
546 0040 02B0 add sp, sp, #8
547 .LCFI8:
548 .cfi_remember_state
549 .cfi_def_cfa_offset 8
550 @ sp needed
551 0042 10BD pop {r4, pc}
552 .LVL22:
553 .L59:
554 .LCFI9:
555 .cfi_restore_state
325:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
556 .loc 1 325 3 is_stmt 1 view .LVU119
557 0044 0C4A ldr r2, .L61+4
558 0046 1368 ldr r3, [r2]
559 0048 23F48033 bic r3, r3, #65536
560 004c 1360 str r3, [r2]
328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
561 .loc 1 328 3 view .LVU120
328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
562 .loc 1 328 15 is_stmt 0 view .LVU121
563 004e FFF7FEFF bl HAL_GetTick
564 .LVL23:
565 0052 0446 mov r4, r0
566 .LVL24:
330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
567 .loc 1 330 3 is_stmt 1 view .LVU122
568 .L54:
330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
569 .loc 1 330 8 view .LVU123
330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
570 .loc 1 330 9 is_stmt 0 view .LVU124
571 0054 084B ldr r3, .L61+4
572 0056 5B68 ldr r3, [r3, #4]
330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
ARM GAS /tmp/cc97GYnP.s page 17
573 .loc 1 330 8 view .LVU125
574 0058 13F4803F tst r3, #65536
575 005c 07D0 beq .L60
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
576 .loc 1 332 5 is_stmt 1 view .LVU126
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
577 .loc 1 332 9 is_stmt 0 view .LVU127
578 005e FFF7FEFF bl HAL_GetTick
579 .LVL25:
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
580 .loc 1 332 23 view .LVU128
581 0062 001B subs r0, r0, r4
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
582 .loc 1 332 7 view .LVU129
583 0064 B0F57A7F cmp r0, #1000
584 0068 F4D9 bls .L54
334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
585 .loc 1 334 14 view .LVU130
586 006a 0320 movs r0, #3
587 006c E8E7 b .L52
588 .L60:
338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
589 .loc 1 338 10 view .LVU131
590 006e 0020 movs r0, #0
591 0070 E6E7 b .L52
592 .L62:
593 0072 00BF .align 2
594 .L61:
595 0074 00380240 .word 1073887232
596 0078 00700040 .word 1073770496
597 .cfi_endproc
598 .LFE150:
600 .section .text.HAL_PWREx_EnterUnderDriveSTOPMode,"ax",%progbits
601 .align 1
602 .global HAL_PWREx_EnterUnderDriveSTOPMode
603 .syntax unified
604 .thumb
605 .thumb_func
606 .fpu fpv5-d16
608 HAL_PWREx_EnterUnderDriveSTOPMode:
609 .LVL26:
610 .LFB151:
340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enters in Under-Drive STOP mode.
343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode can be selected only when the Under-Drive is already active
345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode is enabled only with STOP low power mode.
347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * mode is only available when the main regulator or the low power regulator
349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * is in low voltage mode
350:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note If the Under-drive mode was enabled, it is automatically disabled after
352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * exiting Stop mode.
353:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * When the voltage regulator operates in Under-drive mode, an additional
354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * startup delay is induced when waking up from Stop mode.
ARM GAS /tmp/cc97GYnP.s page 18
355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode.
357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock.
360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When the voltage regulator operates in low power mode, an additional
362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * startup delay is incurred when waking up from Stop mode.
363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * By keeping the internal regulator ON during Stop mode, the consumption
364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * is higher although the startup time is reduced.
365:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param Regulator specifies the regulator state in STOP mode.
367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode
369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * and Flash memory in power-down when the device is in Stop under-drive mode
370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * and Flash memory in power-down when the device is in Stop under-drive mode
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction
375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction
376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
377:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
379:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
611 .loc 1 379 1 is_stmt 1 view -0
612 .cfi_startproc
613 @ args = 0, pretend = 0, frame = 8
614 @ frame_needed = 0, uses_anonymous_args = 0
615 .loc 1 379 1 is_stmt 0 view .LVU133
616 0000 70B5 push {r4, r5, r6, lr}
617 .LCFI10:
618 .cfi_def_cfa_offset 16
619 .cfi_offset 4, -16
620 .cfi_offset 5, -12
621 .cfi_offset 6, -8
622 .cfi_offset 14, -4
623 0002 82B0 sub sp, sp, #8
624 .LCFI11:
625 .cfi_def_cfa_offset 24
626 0004 0646 mov r6, r0
627 0006 0D46 mov r5, r1
380:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tempreg = 0;
628 .loc 1 380 3 is_stmt 1 view .LVU134
629 .LVL27:
381:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0;
630 .loc 1 381 3 view .LVU135
382:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Check the parameters */
384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator));
631 .loc 1 384 3 view .LVU136
385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
632 .loc 1 385 3 view .LVU137
386:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Power ctrl clock */
388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
633 .loc 1 388 3 view .LVU138
ARM GAS /tmp/cc97GYnP.s page 19
634 .LBB4:
635 .loc 1 388 3 view .LVU139
636 .loc 1 388 3 view .LVU140
637 0008 1E4B ldr r3, .L73
638 000a 1A6C ldr r2, [r3, #64]
639 000c 42F08052 orr r2, r2, #268435456
640 0010 1A64 str r2, [r3, #64]
641 .loc 1 388 3 view .LVU141
642 0012 1B6C ldr r3, [r3, #64]
643 0014 03F08053 and r3, r3, #268435456
644 0018 0193 str r3, [sp, #4]
645 .loc 1 388 3 view .LVU142
646 001a 019B ldr r3, [sp, #4]
647 .LBE4:
648 .loc 1 388 3 view .LVU143
389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Under-drive Mode ---------------------------------------------*/
390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Clear Under-drive flag */
391:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_CLEAR_ODRUDR_FLAG();
649 .loc 1 391 3 view .LVU144
650 001c 1A4B ldr r3, .L73+4
651 001e 5968 ldr r1, [r3, #4]
652 .LVL28:
653 .loc 1 391 3 is_stmt 0 view .LVU145
654 0020 1A4A ldr r2, .L73+8
655 0022 0A43 orrs r2, r2, r1
656 0024 5A60 str r2, [r3, #4]
392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Under-drive */
394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_UNDERDRIVE_ENABLE();
657 .loc 1 394 3 is_stmt 1 view .LVU146
658 0026 1A68 ldr r2, [r3]
659 0028 42F44022 orr r2, r2, #786432
660 002c 1A60 str r2, [r3]
395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
661 .loc 1 397 3 view .LVU147
662 .loc 1 397 15 is_stmt 0 view .LVU148
663 002e FFF7FEFF bl HAL_GetTick
664 .LVL29:
665 .loc 1 397 15 view .LVU149
666 0032 0446 mov r4, r0
667 .LVL30:
398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait for UnderDrive mode is ready */
400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY))
668 .loc 1 400 3 is_stmt 1 view .LVU150
669 .L64:
670 .loc 1 400 8 view .LVU151
671 .loc 1 400 9 is_stmt 0 view .LVU152
672 0034 144B ldr r3, .L73+4
673 0036 5B68 ldr r3, [r3, #4]
674 0038 03F44023 and r3, r3, #786432
675 .loc 1 400 8 view .LVU153
676 003c B3F5402F cmp r3, #786432
677 0040 07D1 bne .L71
401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
ARM GAS /tmp/cc97GYnP.s page 20
402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_UDERDRIVE_TIMEOUT_VALUE)
678 .loc 1 402 5 is_stmt 1 view .LVU154
679 .loc 1 402 9 is_stmt 0 view .LVU155
680 0042 FFF7FEFF bl HAL_GetTick
681 .LVL31:
682 .loc 1 402 23 view .LVU156
683 0046 001B subs r0, r0, r4
684 .loc 1 402 7 view .LVU157
685 0048 B0F57A7F cmp r0, #1000
686 004c F2D9 bls .L64
403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
687 .loc 1 404 14 view .LVU158
688 004e 0320 movs r0, #3
689 0050 13E0 b .L65
690 .L71:
405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
406:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
407:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Select the regulator state in STOP mode ---------------------------------*/
409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tempreg = PWR->CR1;
691 .loc 1 409 3 is_stmt 1 view .LVU159
692 .loc 1 409 11 is_stmt 0 view .LVU160
693 0052 0D4A ldr r2, .L73+4
694 0054 1168 ldr r1, [r2]
695 .LVL32:
410:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */
411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tempreg &= (uint32_t)~(PWR_CR1_PDDS | PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_MRUDS);
696 .loc 1 411 3 is_stmt 1 view .LVU161
697 .loc 1 411 11 is_stmt 0 view .LVU162
698 0056 0E4B ldr r3, .L73+12
699 0058 0B40 ands r3, r3, r1
700 .LVL33:
412:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */
414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tempreg |= Regulator;
701 .loc 1 414 3 is_stmt 1 view .LVU163
702 .loc 1 414 11 is_stmt 0 view .LVU164
703 005a 3343 orrs r3, r3, r6
704 .LVL34:
415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Store the new value */
417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 = tempreg;
705 .loc 1 417 3 is_stmt 1 view .LVU165
706 .loc 1 417 12 is_stmt 0 view .LVU166
707 005c 1360 str r3, [r2]
418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */
420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
708 .loc 1 420 3 is_stmt 1 view .LVU167
709 .loc 1 420 12 is_stmt 0 view .LVU168
710 005e 0D4A ldr r2, .L73+16
711 0060 1369 ldr r3, [r2, #16]
712 .LVL35:
713 .loc 1 420 12 view .LVU169
714 0062 43F00403 orr r3, r3, #4
715 0066 1361 str r3, [r2, #16]
ARM GAS /tmp/cc97GYnP.s page 21
716 .LVL36:
421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Select STOP mode entry --------------------------------------------------*/
423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if(STOPEntry == PWR_SLEEPENTRY_WFI)
717 .loc 1 423 3 is_stmt 1 view .LVU170
718 .loc 1 423 5 is_stmt 0 view .LVU171
719 0068 012D cmp r5, #1
720 006a 08D0 beq .L72
424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */
426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __WFI();
427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** else
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Request Wait For Event */
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __WFE();
721 .loc 1 431 5 is_stmt 1 view .LVU172
722 .syntax unified
723 @ 431 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c" 1
724 006c 20BF wfe
725 @ 0 "" 2
726 .thumb
727 .syntax unified
728 .L68:
432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
433:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */
434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
729 .loc 1 434 3 view .LVU173
730 .loc 1 434 12 is_stmt 0 view .LVU174
731 006e 094A ldr r2, .L73+16
732 0070 1369 ldr r3, [r2, #16]
733 0072 23F00403 bic r3, r3, #4
734 0076 1361 str r3, [r2, #16]
435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK;
735 .loc 1 436 3 is_stmt 1 view .LVU175
736 .loc 1 436 10 is_stmt 0 view .LVU176
737 0078 0020 movs r0, #0
738 .LVL37:
739 .L65:
437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
740 .loc 1 437 1 view .LVU177
741 007a 02B0 add sp, sp, #8
742 .LCFI12:
743 .cfi_remember_state
744 .cfi_def_cfa_offset 16
745 @ sp needed
746 007c 70BD pop {r4, r5, r6, pc}
747 .LVL38:
748 .L72:
749 .LCFI13:
750 .cfi_restore_state
426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
751 .loc 1 426 5 is_stmt 1 view .LVU178
752 .syntax unified
753 @ 426 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c" 1
754 007e 30BF wfi
ARM GAS /tmp/cc97GYnP.s page 22
755 @ 0 "" 2
756 .thumb
757 .syntax unified
758 0080 F5E7 b .L68
759 .L74:
760 0082 00BF .align 2
761 .L73:
762 0084 00380240 .word 1073887232
763 0088 00700040 .word 1073770496
764 008c 00010C00 .word 786688
765 0090 FCF3FFFF .word -3076
766 0094 00ED00E0 .word -536810240
767 .cfi_endproc
768 .LFE151:
770 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits
771 .align 1
772 .global HAL_PWREx_GetVoltageRange
773 .syntax unified
774 .thumb
775 .thumb_func
776 .fpu fpv5-d16
778 HAL_PWREx_GetVoltageRange:
779 .LFB152:
438:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
439:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Returns Voltage Scaling Range.
441:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1, PWR_REGULATOR_VOLTAGE_SCALE2 or
442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * PWR_REGULATOR_VOLTAGE_SCALE3)PWR_REGULATOR_VOLTAGE_SCALE1
443:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void)
445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
780 .loc 1 445 1 view -0
781 .cfi_startproc
782 @ args = 0, pretend = 0, frame = 0
783 @ frame_needed = 0, uses_anonymous_args = 0
784 @ link register save eliminated.
446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return (PWR->CR1 & PWR_CR1_VOS);
785 .loc 1 446 3 view .LVU180
786 .loc 1 446 15 is_stmt 0 view .LVU181
787 0000 024B ldr r3, .L76
788 0002 1868 ldr r0, [r3]
447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
789 .loc 1 447 1 view .LVU182
790 0004 00F44040 and r0, r0, #49152
791 0008 7047 bx lr
792 .L77:
793 000a 00BF .align 2
794 .L76:
795 000c 00700040 .word 1073770496
796 .cfi_endproc
797 .LFE152:
799 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits
800 .align 1
801 .global HAL_PWREx_ControlVoltageScaling
802 .syntax unified
803 .thumb
804 .thumb_func
ARM GAS /tmp/cc97GYnP.s page 23
805 .fpu fpv5-d16
807 HAL_PWREx_ControlVoltageScaling:
808 .LVL39:
809 .LFB153:
448:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage.
451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve
452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption.
453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * typical output voltage at 1.4 V,
456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * system frequency up to 216 MHz.
457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
458:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * typical output voltage at 1.2 V,
459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * system frequency up to 180 MHz.
460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 2 mode,
461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * typical output voltage at 1.00 V,
462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * system frequency up to 151 MHz.
463:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note To update the system clock frequency(SYSCLK):
464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig().
465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Call the HAL_RCC_OscConfig() to configure the PLL.
466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale.
467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Set the new system clock frequency using the HAL_RCC_ClockConfig().
468:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note The scale can be modified only when the HSI or HSE clock source is selected
469:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * as system clock source, otherwise the API returns HAL_ERROR.
470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits
471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * value in the PWR_CR1 register are not taken in account.
472:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale
473:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note The new voltage scale is active only when the PLL is ON.
474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL Status
475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */
476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
810 .loc 1 477 1 is_stmt 1 view -0
811 .cfi_startproc
812 @ args = 0, pretend = 0, frame = 8
813 @ frame_needed = 0, uses_anonymous_args = 0
814 .loc 1 477 1 is_stmt 0 view .LVU184
815 0000 30B5 push {r4, r5, lr}
816 .LCFI14:
817 .cfi_def_cfa_offset 12
818 .cfi_offset 4, -12
819 .cfi_offset 5, -8
820 .cfi_offset 14, -4
821 0002 83B0 sub sp, sp, #12
822 .LCFI15:
823 .cfi_def_cfa_offset 24
478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0;
824 .loc 1 478 3 is_stmt 1 view .LVU185
825 .LVL40:
479:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** assert_param(IS_PWR_REGULATOR_VOLTAGE(VoltageScaling));
826 .loc 1 480 3 view .LVU186
481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Power ctrl clock */
483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
ARM GAS /tmp/cc97GYnP.s page 24
827 .loc 1 483 3 view .LVU187
828 .LBB5:
829 .loc 1 483 3 view .LVU188
830 .loc 1 483 3 view .LVU189
831 0004 2C4B ldr r3, .L94
832 0006 1A6C ldr r2, [r3, #64]
833 0008 42F08052 orr r2, r2, #268435456
834 000c 1A64 str r2, [r3, #64]
835 .loc 1 483 3 view .LVU190
836 000e 1A6C ldr r2, [r3, #64]
837 0010 02F08052 and r2, r2, #268435456
838 0014 0092 str r2, [sp]
839 .loc 1 483 3 view .LVU191
840 0016 009A ldr r2, [sp]
841 .LBE5:
842 .loc 1 483 3 view .LVU192
484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Check if the PLL is used as system clock or not */
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
843 .loc 1 486 3 view .LVU193
844 .loc 1 486 6 is_stmt 0 view .LVU194
845 0018 9B68 ldr r3, [r3, #8]
846 001a 03F00C03 and r3, r3, #12
847 .loc 1 486 5 view .LVU195
848 001e 082B cmp r3, #8
849 0020 46D0 beq .L86
850 0022 0546 mov r5, r0
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the main PLL */
489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PLL_DISABLE();
851 .loc 1 489 5 is_stmt 1 view .LVU196
852 0024 244A ldr r2, .L94
853 0026 1368 ldr r3, [r2]
854 0028 23F08073 bic r3, r3, #16777216
855 002c 1360 str r3, [r2]
490:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get Start Tick */
492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
856 .loc 1 492 5 view .LVU197
857 .loc 1 492 17 is_stmt 0 view .LVU198
858 002e FFF7FEFF bl HAL_GetTick
859 .LVL41:
860 .loc 1 492 17 view .LVU199
861 0032 0446 mov r4, r0
862 .LVL42:
493:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till PLL is disabled */
494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
863 .loc 1 494 5 is_stmt 1 view .LVU200
864 .L80:
865 .loc 1 494 10 view .LVU201
866 .loc 1 494 11 is_stmt 0 view .LVU202
867 0034 204B ldr r3, .L94
868 0036 1B68 ldr r3, [r3]
869 .loc 1 494 10 view .LVU203
870 0038 13F0007F tst r3, #33554432
871 003c 06D0 beq .L91
495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
ARM GAS /tmp/cc97GYnP.s page 25
496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
872 .loc 1 496 7 is_stmt 1 view .LVU204
873 .loc 1 496 11 is_stmt 0 view .LVU205
874 003e FFF7FEFF bl HAL_GetTick
875 .LVL43:
876 .loc 1 496 25 view .LVU206
877 0042 031B subs r3, r0, r4
878 .loc 1 496 9 view .LVU207
879 0044 022B cmp r3, #2
880 0046 F5D9 bls .L80
497:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
498:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
881 .loc 1 498 16 view .LVU208
882 0048 0320 movs r0, #3
883 004a 32E0 b .L79
884 .L91:
499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Set Range */
503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
885 .loc 1 503 5 is_stmt 1 view .LVU209
886 .LBB6:
887 .loc 1 503 5 view .LVU210
888 .loc 1 503 5 view .LVU211
889 004c 1B4A ldr r2, .L94+4
890 004e 1368 ldr r3, [r2]
891 0050 23F44043 bic r3, r3, #49152
892 0054 1D43 orrs r5, r5, r3
893 .LVL44:
894 .loc 1 503 5 is_stmt 0 view .LVU212
895 0056 1560 str r5, [r2]
896 .loc 1 503 5 is_stmt 1 view .LVU213
897 0058 1368 ldr r3, [r2]
898 005a 03F44043 and r3, r3, #49152
899 005e 0193 str r3, [sp, #4]
900 .loc 1 503 5 view .LVU214
901 0060 019B ldr r3, [sp, #4]
902 .LBE6:
903 .loc 1 503 5 view .LVU215
504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
505:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the main PLL */
506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PLL_ENABLE();
904 .loc 1 506 5 view .LVU216
905 0062 02F5E432 add r2, r2, #116736
906 0066 1368 ldr r3, [r2]
907 0068 43F08073 orr r3, r3, #16777216
908 006c 1360 str r3, [r2]
507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get Start Tick */
509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
909 .loc 1 509 5 view .LVU217
910 .loc 1 509 17 is_stmt 0 view .LVU218
911 006e FFF7FEFF bl HAL_GetTick
912 .LVL45:
913 0072 0446 mov r4, r0
914 .LVL46:
ARM GAS /tmp/cc97GYnP.s page 26
510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till PLL is ready */
511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
915 .loc 1 511 5 is_stmt 1 view .LVU219
916 .L82:
917 .loc 1 511 10 view .LVU220
918 .loc 1 511 11 is_stmt 0 view .LVU221
919 0074 104B ldr r3, .L94
920 0076 1B68 ldr r3, [r3]
921 .loc 1 511 10 view .LVU222
922 0078 13F0007F tst r3, #33554432
923 007c 06D1 bne .L92
512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
924 .loc 1 513 7 is_stmt 1 view .LVU223
925 .loc 1 513 11 is_stmt 0 view .LVU224
926 007e FFF7FEFF bl HAL_GetTick
927 .LVL47:
928 .loc 1 513 25 view .LVU225
929 0082 001B subs r0, r0, r4
930 .loc 1 513 9 view .LVU226
931 0084 0228 cmp r0, #2
932 0086 F5D9 bls .L82
514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
933 .loc 1 515 16 view .LVU227
934 0088 0320 movs r0, #3
935 008a 12E0 b .L79
936 .L92:
516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get Start Tick */
520:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
937 .loc 1 520 5 is_stmt 1 view .LVU228
938 .loc 1 520 17 is_stmt 0 view .LVU229
939 008c FFF7FEFF bl HAL_GetTick
940 .LVL48:
941 0090 0446 mov r4, r0
942 .LVL49:
521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
943 .loc 1 521 5 is_stmt 1 view .LVU230
944 .L84:
945 .loc 1 521 10 view .LVU231
946 .loc 1 521 12 is_stmt 0 view .LVU232
947 0092 0A4B ldr r3, .L94+4
948 0094 5B68 ldr r3, [r3, #4]
949 .loc 1 521 10 view .LVU233
950 0096 13F4804F tst r3, #16384
951 009a 07D1 bne .L93
522:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
523:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
952 .loc 1 523 7 is_stmt 1 view .LVU234
953 .loc 1 523 11 is_stmt 0 view .LVU235
954 009c FFF7FEFF bl HAL_GetTick
955 .LVL50:
956 .loc 1 523 25 view .LVU236
957 00a0 001B subs r0, r0, r4
ARM GAS /tmp/cc97GYnP.s page 27
958 .loc 1 523 9 view .LVU237
959 00a2 B0F57A7F cmp r0, #1000
960 00a6 F4D9 bls .L84
524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
961 .loc 1 525 16 view .LVU238
962 00a8 0320 movs r0, #3
963 00aa 02E0 b .L79
964 .L93:
526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** else
530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_ERROR;
532:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK;
965 .loc 1 533 10 view .LVU239
966 00ac 0020 movs r0, #0
967 00ae 00E0 b .L79
968 .LVL51:
969 .L86:
531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
970 .loc 1 531 12 view .LVU240
971 00b0 0120 movs r0, #1
972 .LVL52:
973 .L79:
534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
974 .loc 1 534 1 view .LVU241
975 00b2 03B0 add sp, sp, #12
976 .LCFI16:
977 .cfi_def_cfa_offset 12
978 @ sp needed
979 00b4 30BD pop {r4, r5, pc}
980 .L95:
981 00b6 00BF .align 2
982 .L94:
983 00b8 00380240 .word 1073887232
984 00bc 00700040 .word 1073770496
985 .cfi_endproc
986 .LFE153:
988 .text
989 .Letext0:
990 .file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h"
991 .file 3 "Drivers/CMSIS/Include/core_cm7.h"
992 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
993 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
994 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
995 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
ARM GAS /tmp/cc97GYnP.s page 28
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f7xx_hal_pwr_ex.c
/tmp/cc97GYnP.s:17 .text.HAL_PWREx_EnableBkUpReg:0000000000000000 $t
/tmp/cc97GYnP.s:25 .text.HAL_PWREx_EnableBkUpReg:0000000000000000 HAL_PWREx_EnableBkUpReg
/tmp/cc97GYnP.s:88 .text.HAL_PWREx_EnableBkUpReg:0000000000000038 $d
/tmp/cc97GYnP.s:93 .text.HAL_PWREx_DisableBkUpReg:0000000000000000 $t
/tmp/cc97GYnP.s:100 .text.HAL_PWREx_DisableBkUpReg:0000000000000000 HAL_PWREx_DisableBkUpReg
/tmp/cc97GYnP.s:162 .text.HAL_PWREx_DisableBkUpReg:0000000000000038 $d
/tmp/cc97GYnP.s:167 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 $t
/tmp/cc97GYnP.s:174 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 HAL_PWREx_EnableFlashPowerDown
/tmp/cc97GYnP.s:192 .text.HAL_PWREx_EnableFlashPowerDown:000000000000000c $d
/tmp/cc97GYnP.s:197 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 $t
/tmp/cc97GYnP.s:204 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 HAL_PWREx_DisableFlashPowerDown
/tmp/cc97GYnP.s:222 .text.HAL_PWREx_DisableFlashPowerDown:000000000000000c $d
/tmp/cc97GYnP.s:227 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:0000000000000000 $t
/tmp/cc97GYnP.s:234 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:0000000000000000 HAL_PWREx_EnableMainRegulatorLowVoltage
/tmp/cc97GYnP.s:252 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:000000000000000c $d
/tmp/cc97GYnP.s:257 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:0000000000000000 $t
/tmp/cc97GYnP.s:264 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:0000000000000000 HAL_PWREx_DisableMainRegulatorLowVoltage
/tmp/cc97GYnP.s:282 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:000000000000000c $d
/tmp/cc97GYnP.s:287 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:0000000000000000 $t
/tmp/cc97GYnP.s:294 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:0000000000000000 HAL_PWREx_EnableLowRegulatorLowVoltage
/tmp/cc97GYnP.s:312 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:000000000000000c $d
/tmp/cc97GYnP.s:317 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:0000000000000000 $t
/tmp/cc97GYnP.s:324 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:0000000000000000 HAL_PWREx_DisableLowRegulatorLowVoltage
/tmp/cc97GYnP.s:342 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:000000000000000c $d
/tmp/cc97GYnP.s:347 .text.HAL_PWREx_EnableOverDrive:0000000000000000 $t
/tmp/cc97GYnP.s:354 .text.HAL_PWREx_EnableOverDrive:0000000000000000 HAL_PWREx_EnableOverDrive
/tmp/cc97GYnP.s:468 .text.HAL_PWREx_EnableOverDrive:0000000000000074 $d
/tmp/cc97GYnP.s:474 .text.HAL_PWREx_DisableOverDrive:0000000000000000 $t
/tmp/cc97GYnP.s:481 .text.HAL_PWREx_DisableOverDrive:0000000000000000 HAL_PWREx_DisableOverDrive
/tmp/cc97GYnP.s:595 .text.HAL_PWREx_DisableOverDrive:0000000000000074 $d
/tmp/cc97GYnP.s:601 .text.HAL_PWREx_EnterUnderDriveSTOPMode:0000000000000000 $t
/tmp/cc97GYnP.s:608 .text.HAL_PWREx_EnterUnderDriveSTOPMode:0000000000000000 HAL_PWREx_EnterUnderDriveSTOPMode
/tmp/cc97GYnP.s:762 .text.HAL_PWREx_EnterUnderDriveSTOPMode:0000000000000084 $d
/tmp/cc97GYnP.s:771 .text.HAL_PWREx_GetVoltageRange:0000000000000000 $t
/tmp/cc97GYnP.s:778 .text.HAL_PWREx_GetVoltageRange:0000000000000000 HAL_PWREx_GetVoltageRange
/tmp/cc97GYnP.s:795 .text.HAL_PWREx_GetVoltageRange:000000000000000c $d
/tmp/cc97GYnP.s:800 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 $t
/tmp/cc97GYnP.s:807 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 HAL_PWREx_ControlVoltageScaling
/tmp/cc97GYnP.s:983 .text.HAL_PWREx_ControlVoltageScaling:00000000000000b8 $d
UNDEFINED SYMBOLS
HAL_GetTick
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