ARM GAS /tmp/cc5GTpRB.s page 1 1 .cpu cortex-m7 2 .eabi_attribute 28, 1 3 .eabi_attribute 20, 1 4 .eabi_attribute 21, 1 5 .eabi_attribute 23, 3 6 .eabi_attribute 24, 1 7 .eabi_attribute 25, 1 8 .eabi_attribute 26, 1 9 .eabi_attribute 30, 1 10 .eabi_attribute 34, 1 11 .eabi_attribute 18, 4 12 .file "stm32f7xx_hal_flash_ex.c" 13 .text 14 .Ltext0: 15 .cfi_sections .debug_frame 16 .section .text.FLASH_MassErase,"ax",%progbits 17 .align 1 18 .arch armv7e-m 19 .syntax unified 20 .thumb 21 .thumb_func 22 .fpu fpv5-d16 24 FLASH_MassErase: 25 .LVL0: 26 .LFB145: 27 .file 1 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c" 1:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 2:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @file stm32f7xx_hal_flash_ex.c 4:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @author MCD Application Team 5:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver. 6:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * functionalities of the FLASH extension peripheral: 8:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * + Extended programming operations functions 9:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 10:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @verbatim 11:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ============================================================================== 12:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ##### Flash Extension features ##### 13:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ============================================================================== 14:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 15:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** [..] Comparing to other previous devices, the FLASH interface for STM32F76xx/STM32F77xx 16:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** devices contains the following additional features 17:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 18:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write 19:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** capability (RWW) 20:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (+) Dual bank memory organization 21:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (+) Dual boot mode 22:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 23:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ##### How to use this driver ##### 24:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ============================================================================== 25:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory 26:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** of all STM32F7xx devices. It includes 27:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (#) FLASH Memory Erase functions: 28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_FLASH_Lock() functions 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) Erase function: Erase sector, erase all sectors 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) There are two modes of erase : ARM GAS /tmp/cc5GTpRB.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (+++) Polling Mode using HAL_FLASHEx_Erase() 33:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() 34:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 35:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to : 36:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) Set/Reset the write protection 37:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) Set the Read protection Level 38:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) Set the BOR level 39:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) Program the user Option Bytes 40:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 41:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @endverbatim 42:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ****************************************************************************** 43:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @attention 44:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 45:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * Copyright (c) 2017 STMicroelectronics. 46:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * All rights reserved. 47:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 48:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in 49:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the root directory of this software component. 50:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 51:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ****************************************************************************** 52:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 53:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 54:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/ 55:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #include "stm32f7xx_hal.h" 56:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 57:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** @addtogroup STM32F7xx_HAL_Driver 58:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{ 59:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 60:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 61:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx 62:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver 63:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{ 64:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 65:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 66:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED 67:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 68:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/ 69:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/ 70:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Constants 71:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{ 72:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 73:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #define SECTOR_MASK 0xFFFFFF07U 74:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #define FLASH_TIMEOUT_VALUE 50000U/* 50 s */ 75:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 76:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @} 77:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 78:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 79:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/ 80:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/ 81:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Variables 82:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{ 83:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 84:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash; 85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @} 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ARM GAS /tmp/cc5GTpRB.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/ 90:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions 91:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{ 92:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 93:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Option bytes control */ 94:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector); 95:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector); 96:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level); 97:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level); 98:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BootAddressConfig(uint32_t BootOption, uint32_t Address); 99:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetUser(void); 100:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void); 101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetRDP(void); 102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetBOR(void); 103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetBootAddress(uint32_t BootOption); 104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR_nDBANK) 106:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks); 107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t 108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t Iwdgstdby, uint32_t NDBank, uint32_t NDBoot) 109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static void FLASH_MassErase(uint8_t VoltageRange); 111:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t 112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR_nDBANK */ 113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR2_PCROP) 115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_PCROP_Config(uint32_t PCROPSector); 116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_PCROP_RDP_Config(uint32_t Pcrop_Rdp); 117:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetPCROP(void); 118:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetPCROPRDP(void); 119:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR2_PCROP */ 120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); 122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 123:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @} 124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 125:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 126:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Exported functions --------------------------------------------------------*/ 127:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions 128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{ 129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions 132:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Extended IO operation functions 133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @verbatim 135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** =============================================================================== 136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ##### Extended programming operation functions ##### 137:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** =============================================================================== 138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** [..] 139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** This subsection provides a set of functions allowing to manage the Extension FLASH 140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** programming operations Operations. 141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @endverbatim 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{ 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** ARM GAS /tmp/cc5GTpRB.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory sectors 147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that 148:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * contains the configuration information for the erasing. 149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param[out] SectorError pointer to variable that 151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * contains the configuration information on faulty sector in case of error 152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the sectors have been correctly erased) 153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 154:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 156:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) 157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; 159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t index = 0; 160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Process Locked */ 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); 163:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); 166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status == HAL_OK) 171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Initialization of SectorError variable*/ 173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** *SectorError = 0xFFFFFFFFU; 174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 176:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 177:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Mass erase to be done*/ 178:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR_nDBANK) 179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); 180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 181:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_MassErase((uint8_t) pEraseInit->VoltageRange); 182:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR_nDBANK */ 183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 184:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* if the erase operation is completed, disable the MER Bit */ 188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= (~FLASH_MER_BIT); 189:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Erase by sector by sector to be done*/ 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++ 197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange); 199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ARM GAS /tmp/cc5GTpRB.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the SER Bit and SNB Bits */ 204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB)); 205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 206:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status != HAL_OK) 207:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty sector*/ 209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** *SectorError = index; 210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** break; 211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 215:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Process Unlocked */ 217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); 218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enable 224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that 225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * contains the configuration information for the erasing. 226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Process Locked */ 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); 235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 237:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); 238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Enable End of FLASH Operation interrupt */ 240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP); 241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Enable Error source interrupt */ 243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR); 244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Clear pending flags (if any) */ 246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\ 247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_ERSERR); 248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 251:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Mass erase to be done*/ 252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; 253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR_nDBANK) 254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); 255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 256:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_MassErase((uint8_t) pEraseInit->VoltageRange); 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR_nDBANK */ 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else ARM GAS /tmp/cc5GTpRB.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Erase by sector to be done*/ 262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 263:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); 265:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE; 267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.NbSectorsToErase = pEraseInit->NbSectors; 268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.Sector = pEraseInit->Sector; 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; 270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Erase 1st sector and wait for IT*/ 272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange); 273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Program option bytes 280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that 281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * contains the configuration information for the programming. 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; 288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Process Locked */ 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); 291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); 294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Write protection configuration */ 296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) 297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState)); 299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(pOBInit->WRPState == OB_WRPSTATE_ENABLE) 300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Enable of Write protection on the selected Sector*/ 302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_EnableWRP(pOBInit->WRPSector); 303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Disable of Write protection on the selected Sector*/ 307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_DisableWRP(pOBInit->WRPSector); 308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Read protection configuration */ 312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) 313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ARM GAS /tmp/cc5GTpRB.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* USER configuration */ 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) 319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR_nDBANK) 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_WWDG_SW, 322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_SW, 323:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_STOP_NO_RST, 324:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_STDBY_NO_RST, 325:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_STOP_ACTIVE, 326:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_STDBY_ACTIVE, 327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_NDBANK_SINGLE_BANK, 328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_DUAL_BOOT_DISABLE); 329:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_WWDG_SW, 331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_SW, 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_STOP_NO_RST, 333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_STDBY_NO_RST, 334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_STOP_ACTIVE, 335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_STDBY_ACTIVE); 336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR_nDBANK */ 337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* BOR Level configuration */ 340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR) 341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel); 343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Boot 0 Address configuration */ 346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_BOOTADDR_0) == OPTIONBYTE_BOOTADDR_0) 347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_BootAddressConfig(OPTIONBYTE_BOOTADDR_0, pOBInit->BootAddr0); 349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 350:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Boot 1 Address configuration */ 352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_BOOTADDR_1) == OPTIONBYTE_BOOTADDR_1) 353:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_BootAddressConfig(OPTIONBYTE_BOOTADDR_1, pOBInit->BootAddr1); 355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR2_PCROP) 358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* PCROP configuration */ 359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP) 360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_PCROP_Config(pOBInit->PCROPSector); 362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* PCROP_RDP configuration */ 365:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_PCROP_RDP) == OPTIONBYTE_PCROP_RDP) 366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_PCROP_RDP_Config(pOBInit->PCROPRdp); 368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR2_PCROP */ 370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Process Unlocked */ 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ARM GAS /tmp/cc5GTpRB.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 377:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Get the Option byte configuration 379:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that 380:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * contains the configuration information for the programming. 381:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 382:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval None 383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) 385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 386:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ 387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1; 388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get WRP*/ 390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->WRPSector = FLASH_OB_GetWRP(); 391:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get RDP Level*/ 393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP(); 394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get USER*/ 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser(); 397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get BOR Level*/ 399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->BORLevel = FLASH_OB_GetBOR(); 400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get Boot Address when Boot pin = 0 */ 402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->BootAddr0 = FLASH_OB_GetBootAddress(OPTIONBYTE_BOOTADDR_0); 403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get Boot Address when Boot pin = 1 */ 405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->BootAddr1 = FLASH_OB_GetBootAddress(OPTIONBYTE_BOOTADDR_1); 406:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 407:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR2_PCROP) 408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get PCROP Sectors */ 409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->PCROPSector = FLASH_OB_GetPCROP(); 410:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Get PCROP_RDP Value */ 412:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->PCROPRdp = FLASH_OB_GetPCROPRDP(); 413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR2_PCROP */ 414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @} 417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR_nDBANK) 420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory sectors 422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param VoltageRange The device voltage range which defines the erase parallelism. 423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by byte (8-bit) 426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, 427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by half word (16-bit) 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by word (32-bit) 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, ARM GAS /tmp/cc5GTpRB.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by double word (64-bit) 432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Banks Banks to be erased 433:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_BANK_1: Bank1 to be erased 435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_BANK_2: Bank2 to be erased 436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased 437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 438:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 439:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks) 441:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 28 .loc 1 441 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 0 31 @ frame_needed = 0, uses_anonymous_args = 0 32 @ link register save eliminated. 442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 443:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange)); 33 .loc 1 443 3 view .LVU1 444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_FLASH_BANK(Banks)); 34 .loc 1 444 3 view .LVU2 445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* if the previous operation is completed, proceed to erase all sectors */ 447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= CR_PSIZE_MASK; 35 .loc 1 447 3 view .LVU3 36 .loc 1 447 13 is_stmt 0 view .LVU4 37 0000 114A ldr r2, .L7 38 0002 1369 ldr r3, [r2, #16] 39 0004 23F44073 bic r3, r3, #768 40 0008 1361 str r3, [r2, #16] 448:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(Banks == FLASH_BANK_BOTH) 41 .loc 1 448 3 is_stmt 1 view .LVU5 42 .loc 1 448 5 is_stmt 0 view .LVU6 43 000a 0329 cmp r1, #3 44 000c 10D0 beq .L5 449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* bank1 & bank2 will be erased*/ 451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_MER_BIT; 452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else if(Banks == FLASH_BANK_2) 45 .loc 1 453 8 is_stmt 1 view .LVU7 46 .loc 1 453 10 is_stmt 0 view .LVU8 47 000e 0229 cmp r1, #2 48 0010 14D0 beq .L6 454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Only bank2 will be erased*/ 456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_MER2; 457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 458:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Only bank1 will be erased*/ 461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_MER1; 49 .loc 1 461 5 is_stmt 1 view .LVU9 50 .loc 1 461 15 is_stmt 0 view .LVU10 51 0012 0D4A ldr r2, .L7 52 0014 1369 ldr r3, [r2, #16] 53 0016 43F00403 orr r3, r3, #4 ARM GAS /tmp/cc5GTpRB.s page 10 54 001a 1361 str r3, [r2, #16] 55 .LVL1: 56 .L3: 462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 463:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8); 57 .loc 1 463 3 is_stmt 1 view .LVU11 58 .loc 1 463 13 is_stmt 0 view .LVU12 59 001c 0A4A ldr r2, .L7 60 001e 1369 ldr r3, [r2, #16] 61 0020 43EA0020 orr r0, r3, r0, lsl #8 62 .LVL2: 63 .loc 1 463 13 view .LVU13 64 0024 40F48030 orr r0, r0, #65536 65 0028 1061 str r0, [r2, #16] 464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Data synchronous Barrier (DSB) Just after the write operation 465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** This will force the CPU to respect the sequence of instruction (no optimization).*/ 466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __DSB(); 66 .loc 1 466 3 is_stmt 1 view .LVU14 67 .LBB6: 68 .LBI6: 69 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) ARM GAS /tmp/cc5GTpRB.s page 11 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc5GTpRB.s page 12 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/cc5GTpRB.s page 13 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS /tmp/cc5GTpRB.s page 14 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS /tmp/cc5GTpRB.s page 15 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS /tmp/cc5GTpRB.s page 16 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 359:Drivers/CMSIS/Include/cmsis_gcc.h **** 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask ARM GAS /tmp/cc5GTpRB.s page 17 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 385:Drivers/CMSIS/Include/cmsis_gcc.h **** 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } 389:Drivers/CMSIS/Include/cmsis_gcc.h **** 390:Drivers/CMSIS/Include/cmsis_gcc.h **** 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ ARM GAS /tmp/cc5GTpRB.s page 18 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/cc5GTpRB.s page 19 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 530:Drivers/CMSIS/Include/cmsis_gcc.h **** 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc5GTpRB.s page 20 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } 561:Drivers/CMSIS/Include/cmsis_gcc.h **** 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } 604:Drivers/CMSIS/Include/cmsis_gcc.h **** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/cc5GTpRB.s page 21 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 627:Drivers/CMSIS/Include/cmsis_gcc.h **** 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else ARM GAS /tmp/cc5GTpRB.s page 22 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 675:Drivers/CMSIS/Include/cmsis_gcc.h **** 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. ARM GAS /tmp/cc5GTpRB.s page 23 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc5GTpRB.s page 24 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 786:Drivers/CMSIS/Include/cmsis_gcc.h **** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. ARM GAS /tmp/cc5GTpRB.s page 25 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 843:Drivers/CMSIS/Include/cmsis_gcc.h **** 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 871:Drivers/CMSIS/Include/cmsis_gcc.h **** 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 70 .loc 2 877 27 view .LVU15 71 .LBB7: 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 72 .loc 2 879 3 view .LVU16 73 .syntax unified 74 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 75 002a BFF34F8F dsb 0xF 76 @ 0 "" 2 77 .thumb 78 .syntax unified 79 .LBE7: 80 .LBE6: 467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } ARM GAS /tmp/cc5GTpRB.s page 26 81 .loc 1 467 1 is_stmt 0 view .LVU17 82 002e 7047 bx lr 83 .LVL3: 84 .L5: 451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 85 .loc 1 451 5 is_stmt 1 view .LVU18 451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 86 .loc 1 451 15 is_stmt 0 view .LVU19 87 0030 1169 ldr r1, [r2, #16] 88 .LVL4: 451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 89 .loc 1 451 15 view .LVU20 90 0032 48F20403 movw r3, #32772 91 0036 0B43 orrs r3, r3, r1 92 0038 1361 str r3, [r2, #16] 93 003a EFE7 b .L3 94 .LVL5: 95 .L6: 456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 96 .loc 1 456 5 is_stmt 1 view .LVU21 456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 97 .loc 1 456 15 is_stmt 0 view .LVU22 98 003c 024A ldr r2, .L7 99 003e 1369 ldr r3, [r2, #16] 100 0040 43F40043 orr r3, r3, #32768 101 0044 1361 str r3, [r2, #16] 102 0046 E9E7 b .L3 103 .L8: 104 .align 2 105 .L7: 106 0048 003C0240 .word 1073888256 107 .cfi_endproc 108 .LFE145: 110 .section .text.FLASH_OB_GetWRP,"ax",%progbits 111 .align 1 112 .syntax unified 113 .thumb 114 .thumb_func 115 .fpu fpv5-d16 117 FLASH_OB_GetWRP: 118 .LFB147: 468:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 469:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory sector 471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Sector FLASH sector to erase 472:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series 473:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param VoltageRange The device voltage range which defines the erase parallelism. 474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by byte (8-bit) 477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, 478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by half word (16-bit) 479:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, 480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by word (32-bit) 481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by double word (64-bit) 483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * ARM GAS /tmp/cc5GTpRB.s page 27 484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval None 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t tmp_psize = 0; 489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 490:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_FLASH_SECTOR(Sector)); 492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange)); 493:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(VoltageRange == FLASH_VOLTAGE_RANGE_1) 495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_BYTE; 497:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 498:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) 499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_HALF_WORD; 501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) 503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_WORD; 505:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_DOUBLE_WORD; 509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */ 512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(Sector > FLASH_SECTOR_11) 513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** Sector += 4; 515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the sector */ 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= CR_PSIZE_MASK; 519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= tmp_psize; 520:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); 521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos); 522:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT; 523:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Data synchronous Barrier (DSB) Just after the write operation 525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** This will force the CPU to respect the sequence of instruction (no optimization).*/ 526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __DSB(); 527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value. 531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t FLASH Write Protection Option Bytes value 532:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) 534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 119 .loc 1 534 1 is_stmt 1 view -0 120 .cfi_startproc 121 @ args = 0, pretend = 0, frame = 0 122 @ frame_needed = 0, uses_anonymous_args = 0 123 @ link register save eliminated. 535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ ARM GAS /tmp/cc5GTpRB.s page 28 536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return ((uint32_t)(FLASH->OPTCR & 0x0FFF0000)); 124 .loc 1 536 3 view .LVU24 125 .loc 1 536 27 is_stmt 0 view .LVU25 126 0000 024B ldr r3, .L10 127 0002 5B69 ldr r3, [r3, #20] 537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 128 .loc 1 537 1 view .LVU26 129 0004 0248 ldr r0, .L10+4 130 0006 1840 ands r0, r0, r3 131 0008 7047 bx lr 132 .L11: 133 000a 00BF .align 2 134 .L10: 135 000c 003C0240 .word 1073888256 136 0010 0000FF0F .word 268369920 137 .cfi_endproc 138 .LFE147: 140 .section .text.FLASH_OB_GetUser,"ax",%progbits 141 .align 1 142 .syntax unified 143 .thumb 144 .thumb_func 145 .fpu fpv5-d16 147 FLASH_OB_GetUser: 148 .LFB149: 538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. 541:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Wwdg Selects the IWDG mode 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_WWDG_SW: Software WWDG selected 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_WWDG_HW: Hardware WWDG selected 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdg Selects the WWDG mode 546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 547:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_SW: Software IWDG selected 548:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_HW: Hardware IWDG selected 549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Stop Reset event when entering STOP mode. 550:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 551:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STOP_NO_RST: No reset generated when entering in STOP 552:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STOP_RST: Reset generated when entering in STOP 553:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Stdby Reset event when entering Standby mode. 554:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 555:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY 556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_RST: Reset generated when entering in STANDBY 557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdgstop Independent watchdog counter freeze in Stop mode. 558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP 560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP 561:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdgstdby Independent watchdog counter freeze in standby mode. 562:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY 564:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY 565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param NDBank Flash Single Bank mode enabled. 566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 567:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_NDBANK_SINGLE_BANK: enable 256 bits mode (Flash is a single bank) 568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_NDBANK_DUAL_BANK: disable 256 bits mode (Flash is a dual bank in 128 bits mo 569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param NDBoot Flash Dual boot mode disable. ARM GAS /tmp/cc5GTpRB.s page 29 570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_DUAL_BOOT_DISABLE: Disable Dual Boot 572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_DUAL_BOOT_ENABLE: Enable Dual Boot 573:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 574:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 575:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 576:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t 577:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t Iwdgstdby, uint32_t NDBank, uint32_t NDBoot) 578:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 579:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t useroptionmask = 0x00; 580:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t useroptionvalue = 0x00; 581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 582:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_WWDG_SOURCE(Wwdg)); 586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE(Iwdg)); 587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE(Stop)); 588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE(Stdby)); 589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop)); 590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby)); 591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_NDBANK(NDBank)); 592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_NDBOOT(NDBoot)); 593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status == HAL_OK) 598:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** useroptionmask = (FLASH_OPTCR_WWDG_SW | FLASH_OPTCR_IWDG_SW | FLASH_OPTCR_nRST_STOP | \ 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY | \ 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_OPTCR_nDBOOT | FLASH_OPTCR_nDBANK); 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** useroptionvalue = (Iwdg | Wwdg | Stop | Stdby | Iwdgstop | Iwdgstdby | NDBoot | NDBank); 604:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 605:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Update User Option Byte */ 606:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** MODIFY_REG(FLASH->OPTCR, useroptionmask, useroptionvalue); 607:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 610:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 611:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 612:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. 614:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t FLASH User Option Bytes values: WWDG_SW(Bit4), IWDG_SW(Bit5), nRST_STOP(Bit6), 615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * nRST_STDBY(Bit7), nDBOOT(Bit28), nDBANK(Bit29), IWDG_STDBY(Bit30) and IWDG_STOP(Bit31). 616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetUser(void) 618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 149 .loc 1 618 1 is_stmt 1 view -0 150 .cfi_startproc 151 @ args = 0, pretend = 0, frame = 0 152 @ frame_needed = 0, uses_anonymous_args = 0 153 @ link register save eliminated. 619:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Return the User Option Byte */ 620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return ((uint32_t)(FLASH->OPTCR & 0xF00000F0U)); 154 .loc 1 620 3 view .LVU28 ARM GAS /tmp/cc5GTpRB.s page 30 155 .loc 1 620 27 is_stmt 0 view .LVU29 156 0000 024B ldr r3, .L13 157 0002 5B69 ldr r3, [r3, #20] 621:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 158 .loc 1 621 1 view .LVU30 159 0004 0248 ldr r0, .L13+4 160 0006 1840 ands r0, r0, r3 161 0008 7047 bx lr 162 .L14: 163 000a 00BF .align 2 164 .L13: 165 000c 003C0240 .word 1073888256 166 0010 F00000F0 .word -268435216 167 .cfi_endproc 168 .LFE149: 170 .section .text.FLASH_OB_BOR_LevelConfig,"ax",%progbits 171 .align 1 172 .syntax unified 173 .thumb 174 .thumb_func 175 .fpu fpv5-d16 177 FLASH_OB_BOR_LevelConfig: 178 .LVL6: 179 .LFB153: 622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory sectors 626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param VoltageRange The device voltage range which defines the erase parallelism. 627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 629:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by byte (8-bit) 630:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, 631:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by half word (16-bit) 632:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, 633:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by word (32-bit) 634:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, 635:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by double word (64-bit) 636:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 637:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 638:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 639:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static void FLASH_MassErase(uint8_t VoltageRange) 640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange)); 643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* if the previous operation is completed, proceed to erase all sectors */ 645:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= CR_PSIZE_MASK; 646:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_MER; 647:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8); 648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Data synchronous Barrier (DSB) Just after the write operation 649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** This will force the CPU to respect the sequence of instruction (no optimization).*/ 650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __DSB(); 651:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 653:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory sector ARM GAS /tmp/cc5GTpRB.s page 31 655:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Sector FLASH sector to erase 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param VoltageRange The device voltage range which defines the erase parallelism. 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 660:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by byte (8-bit) 661:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, 662:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by half word (16-bit) 663:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, 664:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by word (32-bit) 665:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External 666:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by double word (64-bit) 667:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 668:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval None 669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 670:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) 671:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t tmp_psize = 0; 673:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_FLASH_SECTOR(Sector)); 676:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange)); 677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 678:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(VoltageRange == FLASH_VOLTAGE_RANGE_1) 679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_BYTE; 681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) 683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_HALF_WORD; 685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 686:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) 687:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_WORD; 689:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 690:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 691:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** tmp_psize = FLASH_PSIZE_DOUBLE_WORD; 693:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 694:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the sector */ 696:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= CR_PSIZE_MASK; 697:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= tmp_psize; 698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= SECTOR_MASK; 699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos); 700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT; 701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Data synchronous Barrier (DSB) Just after the write operation 703:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** This will force the CPU to respect the sequence of instruction (no optimization).*/ 704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __DSB(); 705:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 706:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 708:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value. 709:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t FLASH Write Protection Option Bytes value 710:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 711:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) ARM GAS /tmp/cc5GTpRB.s page 32 712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return ((uint32_t)(FLASH->OPTCR & 0x00FF0000)); 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. 719:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Wwdg Selects the IWDG mode 720:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 721:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_WWDG_SW: Software WWDG selected 722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_WWDG_HW: Hardware WWDG selected 723:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdg Selects the WWDG mode 724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 725:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_SW: Software IWDG selected 726:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_HW: Hardware IWDG selected 727:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Stop Reset event when entering STOP mode. 728:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 729:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STOP_NO_RST: No reset generated when entering in STOP 730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STOP_RST: Reset generated when entering in STOP 731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Stdby Reset event when entering Standby mode. 732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 733:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY 734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_RST: Reset generated when entering in STANDBY 735:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdgstop Independent watchdog counter freeze in Stop mode. 736:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 737:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP 738:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP 739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdgstdby Independent watchdog counter freeze in standby mode. 740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY 742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY 743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 745:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t 746:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 747:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t useroptionmask = 0x00; 748:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t useroptionvalue = 0x00; 749:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 750:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 751:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 752:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 753:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_WWDG_SOURCE(Wwdg)); 754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE(Iwdg)); 755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE(Stop)); 756:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE(Stdby)); 757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop)); 758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby)); 759:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 761:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 763:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status == HAL_OK) 764:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 765:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** useroptionmask = (FLASH_OPTCR_WWDG_SW | FLASH_OPTCR_IWDG_SW | FLASH_OPTCR_nRST_STOP | \ 766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY); 767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** useroptionvalue = (Iwdg | Wwdg | Stop | Stdby | Iwdgstop | Iwdgstdby); ARM GAS /tmp/cc5GTpRB.s page 33 769:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Update User Option Byte */ 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** MODIFY_REG(FLASH->OPTCR, useroptionmask, useroptionvalue); 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 775:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 776:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 777:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 778:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 779:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. 780:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t FLASH User Option Bytes values: WWDG_SW(Bit4), IWDG_SW(Bit5), nRST_STOP(Bit6), 781:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * nRST_STDBY(Bit7), IWDG_STDBY(Bit30) and IWDG_STOP(Bit31). 782:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 783:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetUser(void) 784:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 785:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Return the User Option Byte */ 786:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return ((uint32_t)(FLASH->OPTCR & 0xC00000F0U)); 787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 788:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR_nDBANK */ 789:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 790:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 791:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Enable the write protection of the desired bank1 or bank2 sectors 792:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), 794:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * it is not possible to program or erase the flash sector i if CortexM7 795:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param WRPSector specifies the sector(s) to be write protected. 798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx 800:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for S 801:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * or a value between OB_WRP_DB_SECTOR_0 and OB_WRP_DB_SECTOR_23 (in Dual Bank mode f 802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_WRP_SECTOR_All 803:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 804:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL FLASH State 805:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 806:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector) 807:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 810:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 811:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_WRP_SECTOR(WRPSector)); 812:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 816:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status == HAL_OK) 817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Write protection enabled on sectors */ 819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->OPTCR &= (~WRPSector); 820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 822:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** ARM GAS /tmp/cc5GTpRB.s page 34 826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Disable the write protection of the desired bank1 or bank 2 sectors 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * it is not possible to program or erase the flash sector i if CortexM4 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 832:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param WRPSector specifies the sector(s) to be write protected. 833:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 834:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx 835:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for S 836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * or a value between OB_WRP_DB_SECTOR_0 and OB_WRP_DB_SECTOR_23 (in Dual Bank mode f 837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_WRP_Sector_All 838:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 839:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 840:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 841:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 842:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector) 843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 846:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 847:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_WRP_SECTOR(WRPSector)); 848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 849:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 852:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status == HAL_OK) 853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Write protection disabled on sectors */ 855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->OPTCR |= (WRPSector); 856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 858:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 861:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Set the read protection level. 863:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Level specifies the read protection level. 864:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 865:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_RDP_LEVEL_0: No protection 866:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_RDP_LEVEL_1: Read protection of the memory 867:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_RDP_LEVEL_2: Full chip protection 868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 870:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 871:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 873:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level) 874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 877:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 878:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_RDP_LEVEL(Level)); 879:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 880:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ARM GAS /tmp/cc5GTpRB.s page 35 883:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status == HAL_OK) 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level; 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 889:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 890:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 891:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 892:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Set the BOR Level. 893:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Level specifies the Option Bytes BOR Reset Level. 894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 895:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V 896:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V 897:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V 898:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V 899:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 901:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level) 902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 180 .loc 1 902 1 is_stmt 1 view -0 181 .cfi_startproc 182 @ args = 0, pretend = 0, frame = 0 183 @ frame_needed = 0, uses_anonymous_args = 0 184 @ link register save eliminated. 903:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 904:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_BOR_LEVEL(Level)); 185 .loc 1 904 3 view .LVU32 905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 906:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Set the BOR Level */ 907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** MODIFY_REG(FLASH->OPTCR, FLASH_OPTCR_BOR_LEV, Level); 186 .loc 1 907 3 view .LVU33 187 0000 034A ldr r2, .L16 188 0002 5369 ldr r3, [r2, #20] 189 0004 23F00C03 bic r3, r3, #12 190 0008 1843 orrs r0, r0, r3 191 .LVL7: 192 .loc 1 907 3 is_stmt 0 view .LVU34 193 000a 5061 str r0, [r2, #20] 908:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 909:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return HAL_OK; 194 .loc 1 909 3 is_stmt 1 view .LVU35 910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 195 .loc 1 911 1 is_stmt 0 view .LVU36 196 000c 0020 movs r0, #0 197 000e 7047 bx lr 198 .L17: 199 .align 2 200 .L16: 201 0010 003C0240 .word 1073888256 202 .cfi_endproc 203 .LFE153: 205 .section .text.FLASH_OB_GetRDP,"ax",%progbits 206 .align 1 207 .syntax unified 208 .thumb ARM GAS /tmp/cc5GTpRB.s page 36 209 .thumb_func 210 .fpu fpv5-d16 212 FLASH_OB_GetRDP: 213 .LFB155: 912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 914:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Configure Boot base address. 915:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 916:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param BootOption specifies Boot base address depending from Boot pin = 0 or pin = 1 917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 918:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0 919:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1 920:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Address specifies Boot base address 921:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 922:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000) 923:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000) 924:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000) 925:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000) 926:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000) 927:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000) 928:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000) 929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status 931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 932:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BootAddressConfig(uint32_t BootOption, uint32_t Address) 933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 935:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT_ADDRESS(Address)); 938:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(status == HAL_OK) 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(BootOption == OPTIONBYTE_BOOTADDR_0) 945:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD0, Address); 947:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 948:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 950:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD1, (Address << 16)); 951:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 952:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 953:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; 955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 956:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level. 959:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval FlagStatus FLASH ReadOut Protection Status: 960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 961:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_RDP_LEVEL_0: No protection 962:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_RDP_LEVEL_1: Read protection of the memory 963:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_RDP_LEVEL_2: Full chip protection 964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ ARM GAS /tmp/cc5GTpRB.s page 37 965:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetRDP(void) 966:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 214 .loc 1 966 1 is_stmt 1 view -0 215 .cfi_startproc 216 @ args = 0, pretend = 0, frame = 0 217 @ frame_needed = 0, uses_anonymous_args = 0 218 @ link register save eliminated. 967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint8_t readstatus = OB_RDP_LEVEL_0; 219 .loc 1 967 3 view .LVU38 220 .LVL8: 968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS)) == OB_RDP_LEVEL_0) 221 .loc 1 969 3 view .LVU39 222 .loc 1 969 8 is_stmt 0 view .LVU40 223 0000 054B ldr r3, .L21 224 0002 587D ldrb r0, [r3, #21] @ zero_extendqisi2 225 0004 C0B2 uxtb r0, r0 226 .loc 1 969 6 view .LVU41 227 0006 AA28 cmp r0, #170 228 0008 04D0 beq .L19 970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** readstatus = OB_RDP_LEVEL_0; 972:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 973:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS)) == OB_RDP_LEVEL_2) 229 .loc 1 973 8 is_stmt 1 view .LVU42 230 .loc 1 973 13 is_stmt 0 view .LVU43 231 000a 587D ldrb r0, [r3, #21] @ zero_extendqisi2 232 000c C0B2 uxtb r0, r0 233 .loc 1 973 11 view .LVU44 234 000e CC28 cmp r0, #204 235 0010 00D0 beq .L19 974:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 975:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** readstatus = OB_RDP_LEVEL_2; 976:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 977:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 978:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 979:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** readstatus = OB_RDP_LEVEL_1; 236 .loc 1 979 16 view .LVU45 237 0012 5520 movs r0, #85 238 .L19: 239 .LVL9: 980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 981:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 982:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return readstatus; 240 .loc 1 982 3 is_stmt 1 view .LVU46 983:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 241 .loc 1 983 1 is_stmt 0 view .LVU47 242 0014 7047 bx lr 243 .L22: 244 0016 00BF .align 2 245 .L21: 246 0018 003C0240 .word 1073888256 247 .cfi_endproc 248 .LFE155: 250 .section .text.FLASH_OB_GetBOR,"ax",%progbits 251 .align 1 252 .syntax unified ARM GAS /tmp/cc5GTpRB.s page 38 253 .thumb 254 .thumb_func 255 .fpu fpv5-d16 257 FLASH_OB_GetBOR: 258 .LFB156: 984:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 985:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 986:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Returns the FLASH BOR level. 987:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t The FLASH BOR level: 988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V 989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V 990:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V 991:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V 992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetBOR(void) 994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 259 .loc 1 994 1 is_stmt 1 view -0 260 .cfi_startproc 261 @ args = 0, pretend = 0, frame = 0 262 @ frame_needed = 0, uses_anonymous_args = 0 263 @ link register save eliminated. 995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Return the FLASH BOR level */ 996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return ((uint32_t)(FLASH->OPTCR & 0x0C)); 264 .loc 1 996 3 view .LVU49 265 .loc 1 996 27 is_stmt 0 view .LVU50 266 0000 024B ldr r3, .L24 267 0002 5869 ldr r0, [r3, #20] 997:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 268 .loc 1 997 1 view .LVU51 269 0004 00F00C00 and r0, r0, #12 270 0008 7047 bx lr 271 .L25: 272 000a 00BF .align 2 273 .L24: 274 000c 003C0240 .word 1073888256 275 .cfi_endproc 276 .LFE156: 278 .section .text.FLASH_OB_GetBootAddress,"ax",%progbits 279 .align 1 280 .syntax unified 281 .thumb 282 .thumb_func 283 .fpu fpv5-d16 285 FLASH_OB_GetBootAddress: 286 .LVL10: 287 .LFB157: 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Configure Boot base address. 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 1002:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param BootOption specifies Boot base address depending from Boot pin = 0 or pin = 1 1003:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: 1004:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0 1005:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1 1006:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 1007:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t Boot Base Address: 1008:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000) ARM GAS /tmp/cc5GTpRB.s page 39 1009:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000) 1010:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000) 1011:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000) 1012:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000) 1013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000) 1014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * - OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000) 1015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ 1016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetBootAddress(uint32_t BootOption) 1017:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 288 .loc 1 1017 1 is_stmt 1 view -0 289 .cfi_startproc 290 @ args = 0, pretend = 0, frame = 0 291 @ frame_needed = 0, uses_anonymous_args = 0 292 @ link register save eliminated. 1018:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t Address = 0; 293 .loc 1 1018 3 view .LVU53 1019:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Return the Boot base Address */ 1021:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(BootOption == OPTIONBYTE_BOOTADDR_0) 294 .loc 1 1021 3 view .LVU54 295 .loc 1 1021 5 is_stmt 0 view .LVU55 296 0000 1028 cmp r0, #16 297 0002 03D0 beq .L29 1022:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** Address = FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD0; 1024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else 1026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** Address = ((FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD1) >> 16); 298 .loc 1 1027 3 is_stmt 1 view .LVU56 299 .loc 1 1027 20 is_stmt 0 view .LVU57 300 0004 034B ldr r3, .L30 301 0006 9869 ldr r0, [r3, #24] 302 .LVL11: 303 .loc 1 1027 55 view .LVU58 304 0008 000C lsrs r0, r0, #16 305 .LVL12: 1028:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1029:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1030:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return Address; 306 .loc 1 1030 3 is_stmt 1 view .LVU59 1031:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 307 .loc 1 1031 1 is_stmt 0 view .LVU60 308 000a 7047 bx lr 309 .LVL13: 310 .L29: 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 311 .loc 1 1023 5 is_stmt 1 view .LVU61 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 312 .loc 1 1023 20 is_stmt 0 view .LVU62 313 000c 014B ldr r3, .L30 314 000e 9869 ldr r0, [r3, #24] 315 .LVL14: 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 316 .loc 1 1023 13 view .LVU63 317 0010 80B2 uxth r0, r0 318 .LVL15: ARM GAS /tmp/cc5GTpRB.s page 40 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 319 .loc 1 1023 13 view .LVU64 320 0012 7047 bx lr 321 .L31: 322 .align 2 323 .L30: 324 0014 003C0240 .word 1073888256 325 .cfi_endproc 326 .LFE157: 328 .section .text.FLASH_OB_EnableWRP,"ax",%progbits 329 .align 1 330 .syntax unified 331 .thumb 332 .thumb_func 333 .fpu fpv5-d16 335 FLASH_OB_EnableWRP: 336 .LVL16: 337 .LFB150: 807:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 338 .loc 1 807 1 is_stmt 1 view -0 339 .cfi_startproc 340 @ args = 0, pretend = 0, frame = 0 341 @ frame_needed = 0, uses_anonymous_args = 0 807:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 342 .loc 1 807 1 is_stmt 0 view .LVU66 343 0000 10B5 push {r4, lr} 344 .LCFI0: 345 .cfi_def_cfa_offset 8 346 .cfi_offset 4, -8 347 .cfi_offset 14, -4 348 0002 0446 mov r4, r0 808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 349 .loc 1 808 3 is_stmt 1 view .LVU67 350 .LVL17: 811:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 351 .loc 1 811 3 view .LVU68 814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 352 .loc 1 814 3 view .LVU69 814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 353 .loc 1 814 12 is_stmt 0 view .LVU70 354 0004 4CF25030 movw r0, #50000 355 .LVL18: 814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 356 .loc 1 814 12 view .LVU71 357 0008 FFF7FEFF bl FLASH_WaitForLastOperation 358 .LVL19: 816:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 359 .loc 1 816 3 is_stmt 1 view .LVU72 816:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 360 .loc 1 816 5 is_stmt 0 view .LVU73 361 000c 20B9 cbnz r0, .L33 819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 362 .loc 1 819 5 is_stmt 1 view .LVU74 819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 363 .loc 1 819 18 is_stmt 0 view .LVU75 364 000e 034A ldr r2, .L35 365 0010 5369 ldr r3, [r2, #20] ARM GAS /tmp/cc5GTpRB.s page 41 366 0012 23EA0404 bic r4, r3, r4 367 .LVL20: 819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 368 .loc 1 819 18 view .LVU76 369 0016 5461 str r4, [r2, #20] 370 .L33: 822:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 371 .loc 1 822 3 is_stmt 1 view .LVU77 823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 372 .loc 1 823 1 is_stmt 0 view .LVU78 373 0018 10BD pop {r4, pc} 374 .L36: 375 001a 00BF .align 2 376 .L35: 377 001c 003C0240 .word 1073888256 378 .cfi_endproc 379 .LFE150: 381 .section .text.FLASH_OB_DisableWRP,"ax",%progbits 382 .align 1 383 .syntax unified 384 .thumb 385 .thumb_func 386 .fpu fpv5-d16 388 FLASH_OB_DisableWRP: 389 .LVL21: 390 .LFB151: 843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 391 .loc 1 843 1 is_stmt 1 view -0 392 .cfi_startproc 393 @ args = 0, pretend = 0, frame = 0 394 @ frame_needed = 0, uses_anonymous_args = 0 843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 395 .loc 1 843 1 is_stmt 0 view .LVU80 396 0000 10B5 push {r4, lr} 397 .LCFI1: 398 .cfi_def_cfa_offset 8 399 .cfi_offset 4, -8 400 .cfi_offset 14, -4 401 0002 0446 mov r4, r0 844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 402 .loc 1 844 3 is_stmt 1 view .LVU81 403 .LVL22: 847:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 404 .loc 1 847 3 view .LVU82 850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 405 .loc 1 850 3 view .LVU83 850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 406 .loc 1 850 12 is_stmt 0 view .LVU84 407 0004 4CF25030 movw r0, #50000 408 .LVL23: 850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 409 .loc 1 850 12 view .LVU85 410 0008 FFF7FEFF bl FLASH_WaitForLastOperation 411 .LVL24: 852:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 412 .loc 1 852 3 is_stmt 1 view .LVU86 852:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { ARM GAS /tmp/cc5GTpRB.s page 42 413 .loc 1 852 5 is_stmt 0 view .LVU87 414 000c 18B9 cbnz r0, .L38 855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 415 .loc 1 855 5 is_stmt 1 view .LVU88 855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 416 .loc 1 855 18 is_stmt 0 view .LVU89 417 000e 024A ldr r2, .L40 418 0010 5369 ldr r3, [r2, #20] 419 0012 1C43 orrs r4, r4, r3 420 .LVL25: 855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 421 .loc 1 855 18 view .LVU90 422 0014 5461 str r4, [r2, #20] 423 .L38: 858:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 424 .loc 1 858 3 is_stmt 1 view .LVU91 859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 425 .loc 1 859 1 is_stmt 0 view .LVU92 426 0016 10BD pop {r4, pc} 427 .L41: 428 .align 2 429 .L40: 430 0018 003C0240 .word 1073888256 431 .cfi_endproc 432 .LFE151: 434 .section .text.FLASH_OB_RDP_LevelConfig,"ax",%progbits 435 .align 1 436 .syntax unified 437 .thumb 438 .thumb_func 439 .fpu fpv5-d16 441 FLASH_OB_RDP_LevelConfig: 442 .LVL26: 443 .LFB152: 874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 444 .loc 1 874 1 is_stmt 1 view -0 445 .cfi_startproc 446 @ args = 0, pretend = 0, frame = 0 447 @ frame_needed = 0, uses_anonymous_args = 0 874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 448 .loc 1 874 1 is_stmt 0 view .LVU94 449 0000 10B5 push {r4, lr} 450 .LCFI2: 451 .cfi_def_cfa_offset 8 452 .cfi_offset 4, -8 453 .cfi_offset 14, -4 454 0002 0446 mov r4, r0 875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 455 .loc 1 875 3 is_stmt 1 view .LVU95 456 .LVL27: 878:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 457 .loc 1 878 3 view .LVU96 881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 458 .loc 1 881 3 view .LVU97 881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 459 .loc 1 881 12 is_stmt 0 view .LVU98 460 0004 4CF25030 movw r0, #50000 ARM GAS /tmp/cc5GTpRB.s page 43 461 .LVL28: 881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 462 .loc 1 881 12 view .LVU99 463 0008 FFF7FEFF bl FLASH_WaitForLastOperation 464 .LVL29: 883:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 465 .loc 1 883 3 is_stmt 1 view .LVU100 883:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 466 .loc 1 883 5 is_stmt 0 view .LVU101 467 000c 08B9 cbnz r0, .L43 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 468 .loc 1 885 5 is_stmt 1 view .LVU102 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 469 .loc 1 885 41 is_stmt 0 view .LVU103 470 000e 014B ldr r3, .L45 471 0010 5C75 strb r4, [r3, #21] 472 .L43: 888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 473 .loc 1 888 3 is_stmt 1 view .LVU104 889:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 474 .loc 1 889 1 is_stmt 0 view .LVU105 475 0012 10BD pop {r4, pc} 476 .L46: 477 .align 2 478 .L45: 479 0014 003C0240 .word 1073888256 480 .cfi_endproc 481 .LFE152: 483 .section .text.FLASH_OB_UserConfig,"ax",%progbits 484 .align 1 485 .syntax unified 486 .thumb 487 .thumb_func 488 .fpu fpv5-d16 490 FLASH_OB_UserConfig: 491 .LVL30: 492 .LFB148: 578:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t useroptionmask = 0x00; 493 .loc 1 578 1 is_stmt 1 view -0 494 .cfi_startproc 495 @ args = 16, pretend = 0, frame = 0 496 @ frame_needed = 0, uses_anonymous_args = 0 578:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t useroptionmask = 0x00; 497 .loc 1 578 1 is_stmt 0 view .LVU107 498 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 499 .LCFI3: 500 .cfi_def_cfa_offset 24 501 .cfi_offset 3, -24 502 .cfi_offset 4, -20 503 .cfi_offset 5, -16 504 .cfi_offset 6, -12 505 .cfi_offset 7, -8 506 .cfi_offset 14, -4 507 0002 0746 mov r7, r0 508 0004 0C46 mov r4, r1 509 0006 1646 mov r6, r2 510 0008 1D46 mov r5, r3 ARM GAS /tmp/cc5GTpRB.s page 44 579:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t useroptionvalue = 0x00; 511 .loc 1 579 3 is_stmt 1 view .LVU108 512 .LVL31: 580:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 513 .loc 1 580 3 view .LVU109 582:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 514 .loc 1 582 3 view .LVU110 585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE(Iwdg)); 515 .loc 1 585 3 view .LVU111 586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE(Stop)); 516 .loc 1 586 3 view .LVU112 587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE(Stdby)); 517 .loc 1 587 3 view .LVU113 588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop)); 518 .loc 1 588 3 view .LVU114 589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby)); 519 .loc 1 589 3 view .LVU115 590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_NDBANK(NDBank)); 520 .loc 1 590 3 view .LVU116 591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_NDBOOT(NDBoot)); 521 .loc 1 591 3 view .LVU117 592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 522 .loc 1 592 3 view .LVU118 595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 523 .loc 1 595 3 view .LVU119 595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 524 .loc 1 595 12 is_stmt 0 view .LVU120 525 000a 4CF25030 movw r0, #50000 526 .LVL32: 595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 527 .loc 1 595 12 view .LVU121 528 000e FFF7FEFF bl FLASH_WaitForLastOperation 529 .LVL33: 597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 530 .loc 1 597 3 is_stmt 1 view .LVU122 597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 531 .loc 1 597 5 is_stmt 0 view .LVU123 532 0012 90B9 cbnz r0, .L48 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY | \ 533 .loc 1 599 5 is_stmt 1 view .LVU124 534 .LVL34: 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 535 .loc 1 603 5 view .LVU125 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 536 .loc 1 603 29 is_stmt 0 view .LVU126 537 0014 44EA0701 orr r1, r4, r7 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 538 .loc 1 603 36 view .LVU127 539 0018 3143 orrs r1, r1, r6 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 540 .loc 1 603 43 view .LVU128 541 001a 41EA0503 orr r3, r1, r5 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 542 .loc 1 603 51 view .LVU129 543 001e 069C ldr r4, [sp, #24] 544 .LVL35: 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ARM GAS /tmp/cc5GTpRB.s page 45 545 .loc 1 603 51 view .LVU130 546 0020 2343 orrs r3, r3, r4 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 547 .loc 1 603 62 view .LVU131 548 0022 079A ldr r2, [sp, #28] 549 0024 1343 orrs r3, r3, r2 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 550 .loc 1 603 74 view .LVU132 551 0026 099A ldr r2, [sp, #36] 552 0028 1343 orrs r3, r3, r2 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 553 .loc 1 603 21 view .LVU133 554 002a 089A ldr r2, [sp, #32] 555 002c 1343 orrs r3, r3, r2 556 .LVL36: 606:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 557 .loc 1 606 5 is_stmt 1 view .LVU134 558 002e 0349 ldr r1, .L50 559 0030 4C69 ldr r4, [r1, #20] 560 0032 034A ldr r2, .L50+4 561 0034 2240 ands r2, r2, r4 562 0036 1343 orrs r3, r3, r2 563 .LVL37: 606:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 564 .loc 1 606 5 is_stmt 0 view .LVU135 565 0038 4B61 str r3, [r1, #20] 566 .LVL38: 567 .L48: 609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 568 .loc 1 609 3 is_stmt 1 view .LVU136 610:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 569 .loc 1 610 1 is_stmt 0 view .LVU137 570 003a F8BD pop {r3, r4, r5, r6, r7, pc} 571 .LVL39: 572 .L51: 610:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 573 .loc 1 610 1 view .LVU138 574 .align 2 575 .L50: 576 003c 003C0240 .word 1073888256 577 0040 0FFFFF0F .word 268435215 578 .cfi_endproc 579 .LFE148: 581 .section .text.FLASH_OB_BootAddressConfig,"ax",%progbits 582 .align 1 583 .syntax unified 584 .thumb 585 .thumb_func 586 .fpu fpv5-d16 588 FLASH_OB_BootAddressConfig: 589 .LVL40: 590 .LFB154: 933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 591 .loc 1 933 1 is_stmt 1 view -0 592 .cfi_startproc 593 @ args = 0, pretend = 0, frame = 0 594 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/cc5GTpRB.s page 46 933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 595 .loc 1 933 1 is_stmt 0 view .LVU140 596 0000 38B5 push {r3, r4, r5, lr} 597 .LCFI4: 598 .cfi_def_cfa_offset 16 599 .cfi_offset 3, -16 600 .cfi_offset 4, -12 601 .cfi_offset 5, -8 602 .cfi_offset 14, -4 603 0002 0446 mov r4, r0 604 0004 0D46 mov r5, r1 934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 605 .loc 1 934 3 is_stmt 1 view .LVU141 606 .LVL41: 937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 607 .loc 1 937 3 view .LVU142 940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 608 .loc 1 940 3 view .LVU143 940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 609 .loc 1 940 12 is_stmt 0 view .LVU144 610 0006 4CF25030 movw r0, #50000 611 .LVL42: 940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 612 .loc 1 940 12 view .LVU145 613 000a FFF7FEFF bl FLASH_WaitForLastOperation 614 .LVL43: 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 615 .loc 1 942 3 is_stmt 1 view .LVU146 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 616 .loc 1 942 5 is_stmt 0 view .LVU147 617 000e 38B9 cbnz r0, .L53 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 618 .loc 1 944 5 is_stmt 1 view .LVU148 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 619 .loc 1 944 7 is_stmt 0 view .LVU149 620 0010 102C cmp r4, #16 621 0012 06D0 beq .L56 950:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 622 .loc 1 950 7 is_stmt 1 view .LVU150 623 0014 064B ldr r3, .L57 624 0016 9969 ldr r1, [r3, #24] 625 0018 89B2 uxth r1, r1 626 001a 41EA0541 orr r1, r1, r5, lsl #16 627 001e 9961 str r1, [r3, #24] 628 .L53: 954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 629 .loc 1 954 3 view .LVU151 955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 630 .loc 1 955 1 is_stmt 0 view .LVU152 631 0020 38BD pop {r3, r4, r5, pc} 632 .LVL44: 633 .L56: 946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 634 .loc 1 946 7 is_stmt 1 view .LVU153 635 0022 034B ldr r3, .L57 636 0024 9A69 ldr r2, [r3, #24] 637 0026 0349 ldr r1, .L57+4 ARM GAS /tmp/cc5GTpRB.s page 47 638 0028 1140 ands r1, r1, r2 639 002a 2943 orrs r1, r1, r5 640 002c 9961 str r1, [r3, #24] 641 002e F7E7 b .L53 642 .L58: 643 .align 2 644 .L57: 645 0030 003C0240 .word 1073888256 646 0034 0000FFFF .word -65536 647 .cfi_endproc 648 .LFE154: 650 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits 651 .align 1 652 .global HAL_FLASHEx_OBProgram 653 .syntax unified 654 .thumb 655 .thumb_func 656 .fpu fpv5-d16 658 HAL_FLASHEx_OBProgram: 659 .LVL45: 660 .LFB143: 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; 661 .loc 1 286 1 view -0 662 .cfi_startproc 663 @ args = 0, pretend = 0, frame = 0 664 @ frame_needed = 0, uses_anonymous_args = 0 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 665 .loc 1 287 3 view .LVU155 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 666 .loc 1 290 3 view .LVU156 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 667 .loc 1 290 3 view .LVU157 668 0000 2F4B ldr r3, .L80 669 0002 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 670 0004 012B cmp r3, #1 671 0006 58D0 beq .L68 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; 672 .loc 1 286 1 is_stmt 0 discriminator 2 view .LVU158 673 0008 10B5 push {r4, lr} 674 .LCFI5: 675 .cfi_def_cfa_offset 8 676 .cfi_offset 4, -8 677 .cfi_offset 14, -4 678 000a 84B0 sub sp, sp, #16 679 .LCFI6: 680 .cfi_def_cfa_offset 24 681 000c 0446 mov r4, r0 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 682 .loc 1 290 3 is_stmt 1 discriminator 2 view .LVU159 683 000e 2C4B ldr r3, .L80 684 0010 0122 movs r2, #1 685 0012 1A75 strb r2, [r3, #20] 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 686 .loc 1 290 3 discriminator 2 view .LVU160 293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 687 .loc 1 293 3 discriminator 2 view .LVU161 296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { ARM GAS /tmp/cc5GTpRB.s page 48 688 .loc 1 296 3 discriminator 2 view .LVU162 296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 689 .loc 1 296 14 is_stmt 0 discriminator 2 view .LVU163 690 0014 0368 ldr r3, [r0] 296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 691 .loc 1 296 5 discriminator 2 view .LVU164 692 0016 13F0010F tst r3, #1 693 001a 0AD0 beq .L69 298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** if(pOBInit->WRPState == OB_WRPSTATE_ENABLE) 694 .loc 1 298 5 is_stmt 1 view .LVU165 299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 695 .loc 1 299 5 view .LVU166 299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 696 .loc 1 299 15 is_stmt 0 view .LVU167 697 001c 4368 ldr r3, [r0, #4] 299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 698 .loc 1 299 7 view .LVU168 699 001e 9342 cmp r3, r2 700 0020 03D0 beq .L74 307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 701 .loc 1 307 7 is_stmt 1 view .LVU169 307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 702 .loc 1 307 16 is_stmt 0 view .LVU170 703 0022 8068 ldr r0, [r0, #8] 704 .LVL46: 307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 705 .loc 1 307 16 view .LVU171 706 0024 FFF7FEFF bl FLASH_OB_DisableWRP 707 .LVL47: 307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 708 .loc 1 307 16 view .LVU172 709 0028 04E0 b .L61 710 .LVL48: 711 .L74: 302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 712 .loc 1 302 7 is_stmt 1 view .LVU173 302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 713 .loc 1 302 16 is_stmt 0 view .LVU174 714 002a 8068 ldr r0, [r0, #8] 715 .LVL49: 302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 716 .loc 1 302 16 view .LVU175 717 002c FFF7FEFF bl FLASH_OB_EnableWRP 718 .LVL50: 302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 719 .loc 1 302 16 view .LVU176 720 0030 00E0 b .L61 721 .LVL51: 722 .L69: 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 723 .loc 1 287 21 view .LVU177 724 0032 0120 movs r0, #1 725 .LVL52: 726 .L61: 312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 727 .loc 1 312 3 is_stmt 1 view .LVU178 312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { ARM GAS /tmp/cc5GTpRB.s page 49 728 .loc 1 312 14 is_stmt 0 view .LVU179 729 0034 2368 ldr r3, [r4] 312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 730 .loc 1 312 5 view .LVU180 731 0036 13F0020F tst r3, #2 732 003a 14D1 bne .L75 733 .L63: 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 734 .loc 1 318 3 is_stmt 1 view .LVU181 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 735 .loc 1 318 14 is_stmt 0 view .LVU182 736 003c 2368 ldr r3, [r4] 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 737 .loc 1 318 5 view .LVU183 738 003e 13F0040F tst r3, #4 739 0042 14D1 bne .L76 740 .L64: 340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 741 .loc 1 340 3 is_stmt 1 view .LVU184 340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 742 .loc 1 340 14 is_stmt 0 view .LVU185 743 0044 2368 ldr r3, [r4] 340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 744 .loc 1 340 5 view .LVU186 745 0046 13F0080F tst r3, #8 746 004a 28D1 bne .L77 747 .L65: 346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 748 .loc 1 346 3 is_stmt 1 view .LVU187 346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 749 .loc 1 346 14 is_stmt 0 view .LVU188 750 004c 2368 ldr r3, [r4] 346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 751 .loc 1 346 5 view .LVU189 752 004e 13F0100F tst r3, #16 753 0052 28D1 bne .L78 754 .L66: 352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 755 .loc 1 352 3 is_stmt 1 view .LVU190 352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 756 .loc 1 352 14 is_stmt 0 view .LVU191 757 0054 2368 ldr r3, [r4] 352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 758 .loc 1 352 5 view .LVU192 759 0056 13F0200F tst r3, #32 760 005a 29D1 bne .L79 761 .L67: 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 762 .loc 1 372 3 is_stmt 1 view .LVU193 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 763 .loc 1 372 3 view .LVU194 764 005c 184B ldr r3, .L80 765 005e 0022 movs r2, #0 766 0060 1A75 strb r2, [r3, #20] 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 767 .loc 1 372 3 view .LVU195 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } ARM GAS /tmp/cc5GTpRB.s page 50 768 .loc 1 374 3 view .LVU196 375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 769 .loc 1 375 1 is_stmt 0 view .LVU197 770 0062 04B0 add sp, sp, #16 771 .LCFI7: 772 .cfi_remember_state 773 .cfi_def_cfa_offset 8 774 @ sp needed 775 0064 10BD pop {r4, pc} 776 .LVL53: 777 .L75: 778 .LCFI8: 779 .cfi_restore_state 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 780 .loc 1 314 5 is_stmt 1 view .LVU198 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 781 .loc 1 314 14 is_stmt 0 view .LVU199 782 0066 207B ldrb r0, [r4, #12] @ zero_extendqisi2 783 .LVL54: 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 784 .loc 1 314 14 view .LVU200 785 0068 FFF7FEFF bl FLASH_OB_RDP_LevelConfig 786 .LVL55: 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 787 .loc 1 314 14 view .LVU201 788 006c E6E7 b .L63 789 .L76: 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_SW, 790 .loc 1 321 5 is_stmt 1 view .LVU202 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_SW, 791 .loc 1 321 41 is_stmt 0 view .LVU203 792 006e 6069 ldr r0, [r4, #20] 793 .LVL56: 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_SW, 794 .loc 1 321 14 view .LVU204 795 0070 00F08053 and r3, r0, #268435456 796 0074 0393 str r3, [sp, #12] 797 0076 00F00053 and r3, r0, #536870912 798 007a 0293 str r3, [sp, #8] 799 007c 00F08043 and r3, r0, #1073741824 800 0080 0193 str r3, [sp, #4] 801 0082 00F00043 and r3, r0, #-2147483648 802 0086 0093 str r3, [sp] 803 0088 00F08003 and r3, r0, #128 804 008c 00F04002 and r2, r0, #64 805 0090 00F02001 and r1, r0, #32 806 0094 00F01000 and r0, r0, #16 807 0098 FFF7FEFF bl FLASH_OB_UserConfig 808 .LVL57: 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_IWDG_SW, 809 .loc 1 321 14 view .LVU205 810 009c D2E7 b .L64 811 .L77: 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 812 .loc 1 342 5 is_stmt 1 view .LVU206 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 813 .loc 1 342 14 is_stmt 0 view .LVU207 ARM GAS /tmp/cc5GTpRB.s page 51 814 009e 207C ldrb r0, [r4, #16] @ zero_extendqisi2 815 .LVL58: 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 816 .loc 1 342 14 view .LVU208 817 00a0 FFF7FEFF bl FLASH_OB_BOR_LevelConfig 818 .LVL59: 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 819 .loc 1 342 14 view .LVU209 820 00a4 D2E7 b .L65 821 .L78: 348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 822 .loc 1 348 5 is_stmt 1 view .LVU210 348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 823 .loc 1 348 14 is_stmt 0 view .LVU211 824 00a6 A169 ldr r1, [r4, #24] 825 00a8 1020 movs r0, #16 826 .LVL60: 348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 827 .loc 1 348 14 view .LVU212 828 00aa FFF7FEFF bl FLASH_OB_BootAddressConfig 829 .LVL61: 348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 830 .loc 1 348 14 view .LVU213 831 00ae D1E7 b .L66 832 .L79: 354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 833 .loc 1 354 5 is_stmt 1 view .LVU214 354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 834 .loc 1 354 14 is_stmt 0 view .LVU215 835 00b0 E169 ldr r1, [r4, #28] 836 00b2 2020 movs r0, #32 837 .LVL62: 354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 838 .loc 1 354 14 view .LVU216 839 00b4 FFF7FEFF bl FLASH_OB_BootAddressConfig 840 .LVL63: 354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 841 .loc 1 354 14 view .LVU217 842 00b8 D0E7 b .L67 843 .LVL64: 844 .L68: 845 .LCFI9: 846 .cfi_def_cfa_offset 0 847 .cfi_restore 4 848 .cfi_restore 14 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 849 .loc 1 290 3 view .LVU218 850 00ba 0220 movs r0, #2 851 .LVL65: 375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 852 .loc 1 375 1 view .LVU219 853 00bc 7047 bx lr 854 .L81: 855 00be 00BF .align 2 856 .L80: 857 00c0 00000000 .word pFlash 858 .cfi_endproc ARM GAS /tmp/cc5GTpRB.s page 52 859 .LFE143: 861 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits 862 .align 1 863 .global HAL_FLASHEx_OBGetConfig 864 .syntax unified 865 .thumb 866 .thumb_func 867 .fpu fpv5-d16 869 HAL_FLASHEx_OBGetConfig: 870 .LVL66: 871 .LFB144: 385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ 872 .loc 1 385 1 is_stmt 1 view -0 873 .cfi_startproc 874 @ args = 0, pretend = 0, frame = 0 875 @ frame_needed = 0, uses_anonymous_args = 0 385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ 876 .loc 1 385 1 is_stmt 0 view .LVU221 877 0000 10B5 push {r4, lr} 878 .LCFI10: 879 .cfi_def_cfa_offset 8 880 .cfi_offset 4, -8 881 .cfi_offset 14, -4 882 0002 0446 mov r4, r0 386:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1; 883 .loc 1 386 3 is_stmt 1 view .LVU222 386:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1; 884 .loc 1 386 23 is_stmt 0 view .LVU223 885 0004 3F23 movs r3, #63 886 0006 0360 str r3, [r0] 390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 887 .loc 1 390 3 is_stmt 1 view .LVU224 390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 888 .loc 1 390 24 is_stmt 0 view .LVU225 889 0008 FFF7FEFF bl FLASH_OB_GetWRP 890 .LVL67: 390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 891 .loc 1 390 22 view .LVU226 892 000c A060 str r0, [r4, #8] 393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 893 .loc 1 393 3 is_stmt 1 view .LVU227 393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 894 .loc 1 393 23 is_stmt 0 view .LVU228 895 000e FFF7FEFF bl FLASH_OB_GetRDP 896 .LVL68: 393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 897 .loc 1 393 21 view .LVU229 898 0012 E060 str r0, [r4, #12] 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 899 .loc 1 396 3 is_stmt 1 view .LVU230 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 900 .loc 1 396 25 is_stmt 0 view .LVU231 901 0014 FFF7FEFF bl FLASH_OB_GetUser 902 .LVL69: 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 903 .loc 1 396 23 view .LVU232 904 0018 6061 str r0, [r4, #20] ARM GAS /tmp/cc5GTpRB.s page 53 399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 905 .loc 1 399 3 is_stmt 1 view .LVU233 399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 906 .loc 1 399 23 is_stmt 0 view .LVU234 907 001a FFF7FEFF bl FLASH_OB_GetBOR 908 .LVL70: 399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 909 .loc 1 399 21 view .LVU235 910 001e 2061 str r0, [r4, #16] 402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 911 .loc 1 402 3 is_stmt 1 view .LVU236 402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 912 .loc 1 402 24 is_stmt 0 view .LVU237 913 0020 1020 movs r0, #16 914 0022 FFF7FEFF bl FLASH_OB_GetBootAddress 915 .LVL71: 402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 916 .loc 1 402 22 view .LVU238 917 0026 A061 str r0, [r4, #24] 405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 918 .loc 1 405 3 is_stmt 1 view .LVU239 405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 919 .loc 1 405 24 is_stmt 0 view .LVU240 920 0028 2020 movs r0, #32 921 002a FFF7FEFF bl FLASH_OB_GetBootAddress 922 .LVL72: 405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 923 .loc 1 405 22 view .LVU241 924 002e E061 str r0, [r4, #28] 414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 925 .loc 1 414 1 view .LVU242 926 0030 10BD pop {r4, pc} 414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 927 .loc 1 414 1 view .LVU243 928 .cfi_endproc 929 .LFE144: 931 .section .text.FLASH_Erase_Sector,"ax",%progbits 932 .align 1 933 .global FLASH_Erase_Sector 934 .syntax unified 935 .thumb 936 .thumb_func 937 .fpu fpv5-d16 939 FLASH_Erase_Sector: 940 .LVL73: 941 .LFB146: 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t tmp_psize = 0; 942 .loc 1 487 1 is_stmt 1 view -0 943 .cfi_startproc 944 @ args = 0, pretend = 0, frame = 0 945 @ frame_needed = 0, uses_anonymous_args = 0 946 @ link register save eliminated. 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 947 .loc 1 488 3 view .LVU245 491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange)); 948 .loc 1 491 3 view .LVU246 492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** ARM GAS /tmp/cc5GTpRB.s page 54 949 .loc 1 492 3 view .LVU247 494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 950 .loc 1 494 3 view .LVU248 494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 951 .loc 1 494 5 is_stmt 0 view .LVU249 952 0000 49B1 cbz r1, .L87 498:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 953 .loc 1 498 8 is_stmt 1 view .LVU250 498:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 954 .loc 1 498 10 is_stmt 0 view .LVU251 955 0002 0129 cmp r1, #1 956 0004 26D0 beq .L88 502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 957 .loc 1 502 8 is_stmt 1 view .LVU252 502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 958 .loc 1 502 10 is_stmt 0 view .LVU253 959 0006 0229 cmp r1, #2 960 0008 02D0 beq .L90 508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 961 .loc 1 508 15 view .LVU254 962 000a 4FF4407C mov ip, #768 963 000e 04E0 b .L85 964 .L90: 504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 965 .loc 1 504 15 view .LVU255 966 0010 4FF4007C mov ip, #512 967 0014 01E0 b .L85 968 .L87: 496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 969 .loc 1 496 16 view .LVU256 970 0016 4FF0000C mov ip, #0 971 .L85: 972 .LVL74: 512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 973 .loc 1 512 3 is_stmt 1 view .LVU257 512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 974 .loc 1 512 5 is_stmt 0 view .LVU258 975 001a 0B28 cmp r0, #11 976 001c 00D9 bls .L86 514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 977 .loc 1 514 5 is_stmt 1 view .LVU259 514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 978 .loc 1 514 12 is_stmt 0 view .LVU260 979 001e 0430 adds r0, r0, #4 980 .LVL75: 981 .L86: 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= tmp_psize; 982 .loc 1 518 3 is_stmt 1 view .LVU261 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= tmp_psize; 983 .loc 1 518 13 is_stmt 0 view .LVU262 984 0020 0E4B ldr r3, .L91 985 0022 1969 ldr r1, [r3, #16] 986 .LVL76: 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= tmp_psize; 987 .loc 1 518 13 view .LVU263 988 0024 21F44071 bic r1, r1, #768 989 0028 1961 str r1, [r3, #16] ARM GAS /tmp/cc5GTpRB.s page 55 519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); 990 .loc 1 519 3 is_stmt 1 view .LVU264 519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); 991 .loc 1 519 13 is_stmt 0 view .LVU265 992 002a 1A69 ldr r2, [r3, #16] 993 002c 42EA0C02 orr r2, r2, ip 994 0030 1A61 str r2, [r3, #16] 520:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos); 995 .loc 1 520 3 is_stmt 1 view .LVU266 996 0032 1A69 ldr r2, [r3, #16] 997 0034 22F0F802 bic r2, r2, #248 998 0038 1A61 str r2, [r3, #16] 521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT; 999 .loc 1 521 3 view .LVU267 521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT; 1000 .loc 1 521 13 is_stmt 0 view .LVU268 1001 003a 1A69 ldr r2, [r3, #16] 1002 003c 42EAC000 orr r0, r2, r0, lsl #3 1003 .LVL77: 521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT; 1004 .loc 1 521 13 view .LVU269 1005 0040 40F00200 orr r0, r0, #2 1006 0044 1861 str r0, [r3, #16] 522:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1007 .loc 1 522 3 is_stmt 1 view .LVU270 522:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1008 .loc 1 522 13 is_stmt 0 view .LVU271 1009 0046 1A69 ldr r2, [r3, #16] 1010 0048 42F48032 orr r2, r2, #65536 1011 004c 1A61 str r2, [r3, #16] 526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1012 .loc 1 526 3 is_stmt 1 view .LVU272 1013 .LBB8: 1014 .LBI8: 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1015 .loc 2 877 27 view .LVU273 1016 .LBB9: 1017 .loc 2 879 3 view .LVU274 1018 .syntax unified 1019 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1020 004e BFF34F8F dsb 0xF 1021 @ 0 "" 2 1022 .thumb 1023 .syntax unified 1024 .LBE9: 1025 .LBE8: 527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1026 .loc 1 527 1 is_stmt 0 view .LVU275 1027 0052 7047 bx lr 1028 .LVL78: 1029 .L88: 500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1030 .loc 1 500 15 view .LVU276 1031 0054 4FF4807C mov ip, #256 1032 0058 DFE7 b .L85 1033 .L92: 1034 005a 00BF .align 2 ARM GAS /tmp/cc5GTpRB.s page 56 1035 .L91: 1036 005c 003C0240 .word 1073888256 1037 .cfi_endproc 1038 .LFE146: 1040 .section .text.HAL_FLASHEx_Erase,"ax",%progbits 1041 .align 1 1042 .global HAL_FLASHEx_Erase 1043 .syntax unified 1044 .thumb 1045 .thumb_func 1046 .fpu fpv5-d16 1048 HAL_FLASHEx_Erase: 1049 .LVL79: 1050 .LFB141: 157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; 1051 .loc 1 157 1 is_stmt 1 view -0 1052 .cfi_startproc 1053 @ args = 0, pretend = 0, frame = 0 1054 @ frame_needed = 0, uses_anonymous_args = 0 158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** uint32_t index = 0; 1055 .loc 1 158 3 view .LVU278 159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1056 .loc 1 159 3 view .LVU279 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1057 .loc 1 162 3 view .LVU280 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1058 .loc 1 162 3 view .LVU281 1059 0000 224B ldr r3, .L107 1060 0002 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 1061 0004 012B cmp r3, #1 1062 0006 3DD0 beq .L100 157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; 1063 .loc 1 157 1 is_stmt 0 discriminator 2 view .LVU282 1064 0008 70B5 push {r4, r5, r6, lr} 1065 .LCFI11: 1066 .cfi_def_cfa_offset 16 1067 .cfi_offset 4, -16 1068 .cfi_offset 5, -12 1069 .cfi_offset 6, -8 1070 .cfi_offset 14, -4 1071 000a 0446 mov r4, r0 1072 000c 0E46 mov r6, r1 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1073 .loc 1 162 3 is_stmt 1 discriminator 2 view .LVU283 1074 000e 1F4B ldr r3, .L107 1075 0010 0122 movs r2, #1 1076 0012 1A75 strb r2, [r3, #20] 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1077 .loc 1 162 3 discriminator 2 view .LVU284 165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1078 .loc 1 165 3 discriminator 2 view .LVU285 168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1079 .loc 1 168 3 discriminator 2 view .LVU286 168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1080 .loc 1 168 12 is_stmt 0 discriminator 2 view .LVU287 1081 0014 4CF25030 movw r0, #50000 1082 .LVL80: ARM GAS /tmp/cc5GTpRB.s page 57 168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1083 .loc 1 168 12 discriminator 2 view .LVU288 1084 0018 FFF7FEFF bl FLASH_WaitForLastOperation 1085 .LVL81: 170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1086 .loc 1 170 3 is_stmt 1 discriminator 2 view .LVU289 170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1087 .loc 1 170 5 is_stmt 0 discriminator 2 view .LVU290 1088 001c 0146 mov r1, r0 1089 001e 60BB cbnz r0, .L95 173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1090 .loc 1 173 5 is_stmt 1 view .LVU291 173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1091 .loc 1 173 18 is_stmt 0 view .LVU292 1092 0020 4FF0FF33 mov r3, #-1 1093 0024 3360 str r3, [r6] 175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1094 .loc 1 175 5 is_stmt 1 view .LVU293 175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1095 .loc 1 175 18 is_stmt 0 view .LVU294 1096 0026 2368 ldr r3, [r4] 175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1097 .loc 1 175 7 view .LVU295 1098 0028 012B cmp r3, #1 1099 002a 16D0 beq .L105 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1100 .loc 1 193 7 is_stmt 1 view .LVU296 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1101 .loc 1 196 7 view .LVU297 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1102 .loc 1 196 17 is_stmt 0 view .LVU298 1103 002c A568 ldr r5, [r4, #8] 1104 .LVL82: 1105 .L97: 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1106 .loc 1 196 39 is_stmt 1 discriminator 1 view .LVU299 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1107 .loc 1 196 58 is_stmt 0 discriminator 1 view .LVU300 1108 002e E368 ldr r3, [r4, #12] 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1109 .loc 1 196 82 discriminator 1 view .LVU301 1110 0030 A268 ldr r2, [r4, #8] 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1111 .loc 1 196 70 discriminator 1 view .LVU302 1112 0032 1344 add r3, r3, r2 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1113 .loc 1 196 7 discriminator 1 view .LVU303 1114 0034 AB42 cmp r3, r5 1115 0036 20D9 bls .L95 198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1116 .loc 1 198 9 is_stmt 1 view .LVU304 1117 0038 217C ldrb r1, [r4, #16] @ zero_extendqisi2 1118 .LVL83: 198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1119 .loc 1 198 9 is_stmt 0 view .LVU305 1120 003a 2846 mov r0, r5 1121 003c FFF7FEFF bl FLASH_Erase_Sector ARM GAS /tmp/cc5GTpRB.s page 58 1122 .LVL84: 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1123 .loc 1 201 9 is_stmt 1 view .LVU306 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1124 .loc 1 201 18 is_stmt 0 view .LVU307 1125 0040 4CF25030 movw r0, #50000 1126 0044 FFF7FEFF bl FLASH_WaitForLastOperation 1127 .LVL85: 204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1128 .loc 1 204 9 is_stmt 1 view .LVU308 1129 0048 114A ldr r2, .L107+4 1130 004a 1369 ldr r3, [r2, #16] 1131 004c 23F0FA03 bic r3, r3, #250 1132 0050 1361 str r3, [r2, #16] 206:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1133 .loc 1 206 9 view .LVU309 206:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1134 .loc 1 206 11 is_stmt 0 view .LVU310 1135 0052 0146 mov r1, r0 1136 0054 80B9 cbnz r0, .L106 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1137 .loc 1 196 93 is_stmt 1 discriminator 2 view .LVU311 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1138 .loc 1 196 98 is_stmt 0 discriminator 2 view .LVU312 1139 0056 0135 adds r5, r5, #1 1140 .LVL86: 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1141 .loc 1 196 98 discriminator 2 view .LVU313 1142 0058 E9E7 b .L97 1143 .LVL87: 1144 .L105: 179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 1145 .loc 1 179 7 is_stmt 1 view .LVU314 1146 005a 6168 ldr r1, [r4, #4] 1147 005c 207C ldrb r0, [r4, #16] @ zero_extendqisi2 1148 .LVL88: 179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 1149 .loc 1 179 7 is_stmt 0 view .LVU315 1150 005e FFF7FEFF bl FLASH_MassErase 1151 .LVL89: 185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1152 .loc 1 185 7 is_stmt 1 view .LVU316 185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1153 .loc 1 185 16 is_stmt 0 view .LVU317 1154 0062 4CF25030 movw r0, #50000 1155 0066 FFF7FEFF bl FLASH_WaitForLastOperation 1156 .LVL90: 1157 006a 0146 mov r1, r0 1158 .LVL91: 188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1159 .loc 1 188 7 is_stmt 1 view .LVU318 188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1160 .loc 1 188 17 is_stmt 0 view .LVU319 1161 006c 084A ldr r2, .L107+4 1162 006e 1069 ldr r0, [r2, #16] 1163 0070 084B ldr r3, .L107+8 1164 0072 0340 ands r3, r3, r0 ARM GAS /tmp/cc5GTpRB.s page 59 1165 0074 1361 str r3, [r2, #16] 1166 0076 00E0 b .L95 1167 .LVL92: 1168 .L106: 209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** break; 1169 .loc 1 209 11 is_stmt 1 view .LVU320 209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** break; 1170 .loc 1 209 24 is_stmt 0 view .LVU321 1171 0078 3560 str r5, [r6] 210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1172 .loc 1 210 11 is_stmt 1 view .LVU322 1173 .LVL93: 1174 .L95: 217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1175 .loc 1 217 3 view .LVU323 217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1176 .loc 1 217 3 view .LVU324 1177 007a 044B ldr r3, .L107 1178 007c 0022 movs r2, #0 1179 007e 1A75 strb r2, [r3, #20] 217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1180 .loc 1 217 3 view .LVU325 219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1181 .loc 1 219 3 view .LVU326 220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1182 .loc 1 220 1 is_stmt 0 view .LVU327 1183 0080 0846 mov r0, r1 1184 0082 70BD pop {r4, r5, r6, pc} 1185 .LVL94: 1186 .L100: 1187 .LCFI12: 1188 .cfi_def_cfa_offset 0 1189 .cfi_restore 4 1190 .cfi_restore 5 1191 .cfi_restore 6 1192 .cfi_restore 14 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1193 .loc 1 162 3 view .LVU328 1194 0084 0221 movs r1, #2 1195 .LVL95: 220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1196 .loc 1 220 1 view .LVU329 1197 0086 0846 mov r0, r1 1198 .LVL96: 220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1199 .loc 1 220 1 view .LVU330 1200 0088 7047 bx lr 1201 .L108: 1202 008a 00BF .align 2 1203 .L107: 1204 008c 00000000 .word pFlash 1205 0090 003C0240 .word 1073888256 1206 0094 FB7FFFFF .word -32773 1207 .cfi_endproc 1208 .LFE141: 1210 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits 1211 .align 1 ARM GAS /tmp/cc5GTpRB.s page 60 1212 .global HAL_FLASHEx_Erase_IT 1213 .syntax unified 1214 .thumb 1215 .thumb_func 1216 .fpu fpv5-d16 1218 HAL_FLASHEx_Erase_IT: 1219 .LVL97: 1220 .LFB142: 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 1221 .loc 1 230 1 is_stmt 1 view -0 1222 .cfi_startproc 1223 @ args = 0, pretend = 0, frame = 0 1224 @ frame_needed = 0, uses_anonymous_args = 0 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; 1225 .loc 1 230 1 is_stmt 0 view .LVU332 1226 0000 08B5 push {r3, lr} 1227 .LCFI13: 1228 .cfi_def_cfa_offset 8 1229 .cfi_offset 3, -8 1230 .cfi_offset 14, -4 231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1231 .loc 1 231 3 is_stmt 1 view .LVU333 1232 .LVL98: 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1233 .loc 1 234 3 view .LVU334 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1234 .loc 1 234 3 view .LVU335 1235 0002 174B ldr r3, .L115 1236 0004 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 1237 0006 012B cmp r3, #1 1238 0008 27D0 beq .L112 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1239 .loc 1 234 3 discriminator 2 view .LVU336 1240 000a 154B ldr r3, .L115 1241 000c 0122 movs r2, #1 1242 000e 1A75 strb r2, [r3, #20] 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1243 .loc 1 234 3 discriminator 2 view .LVU337 237:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1244 .loc 1 237 3 discriminator 2 view .LVU338 240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1245 .loc 1 240 3 discriminator 2 view .LVU339 1246 0010 144B ldr r3, .L115+4 1247 0012 1A69 ldr r2, [r3, #16] 1248 0014 42F08072 orr r2, r2, #16777216 1249 0018 1A61 str r2, [r3, #16] 243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1250 .loc 1 243 3 discriminator 2 view .LVU340 1251 001a 1A69 ldr r2, [r3, #16] 1252 001c 42F00072 orr r2, r2, #33554432 1253 0020 1A61 str r2, [r3, #16] 246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_ERSERR); 1254 .loc 1 246 3 discriminator 2 view .LVU341 1255 0022 F322 movs r2, #243 1256 0024 DA60 str r2, [r3, #12] 249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1257 .loc 1 249 3 discriminator 2 view .LVU342 ARM GAS /tmp/cc5GTpRB.s page 61 249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1258 .loc 1 249 16 is_stmt 0 discriminator 2 view .LVU343 1259 0026 0368 ldr r3, [r0] 249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1260 .loc 1 249 5 discriminator 2 view .LVU344 1261 0028 012B cmp r3, #1 1262 002a 0DD0 beq .L114 264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1263 .loc 1 264 5 is_stmt 1 view .LVU345 266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.NbSectorsToErase = pEraseInit->NbSectors; 1264 .loc 1 266 5 view .LVU346 266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.NbSectorsToErase = pEraseInit->NbSectors; 1265 .loc 1 266 29 is_stmt 0 view .LVU347 1266 002c 0C4B ldr r3, .L115 1267 002e 0122 movs r2, #1 1268 0030 1A70 strb r2, [r3] 267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.Sector = pEraseInit->Sector; 1269 .loc 1 267 5 is_stmt 1 view .LVU348 267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.Sector = pEraseInit->Sector; 1270 .loc 1 267 41 is_stmt 0 view .LVU349 1271 0032 C268 ldr r2, [r0, #12] 267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.Sector = pEraseInit->Sector; 1272 .loc 1 267 29 view .LVU350 1273 0034 5A60 str r2, [r3, #4] 268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; 1274 .loc 1 268 5 is_stmt 1 view .LVU351 268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; 1275 .loc 1 268 31 is_stmt 0 view .LVU352 1276 0036 8268 ldr r2, [r0, #8] 268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; 1277 .loc 1 268 19 view .LVU353 1278 0038 DA60 str r2, [r3, #12] 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1279 .loc 1 269 5 is_stmt 1 view .LVU354 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1280 .loc 1 269 30 is_stmt 0 view .LVU355 1281 003a 017C ldrb r1, [r0, #16] @ zero_extendqisi2 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1282 .loc 1 269 28 view .LVU356 1283 003c 1972 strb r1, [r3, #8] 272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1284 .loc 1 272 5 is_stmt 1 view .LVU357 1285 003e 8068 ldr r0, [r0, #8] 1286 .LVL99: 272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1287 .loc 1 272 5 is_stmt 0 view .LVU358 1288 0040 FFF7FEFF bl FLASH_Erase_Sector 1289 .LVL100: 275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1290 .loc 1 275 10 view .LVU359 1291 0044 0020 movs r0, #0 1292 .L110: 276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1293 .loc 1 276 1 view .LVU360 1294 0046 08BD pop {r3, pc} 1295 .LVL101: 1296 .L114: ARM GAS /tmp/cc5GTpRB.s page 62 252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR_nDBANK) 1297 .loc 1 252 5 is_stmt 1 view .LVU361 252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #if defined (FLASH_OPTCR_nDBANK) 1298 .loc 1 252 29 is_stmt 0 view .LVU362 1299 0048 054B ldr r3, .L115 1300 004a 0222 movs r2, #2 1301 004c 1A70 strb r2, [r3] 254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 1302 .loc 1 254 5 is_stmt 1 view .LVU363 1303 004e 4168 ldr r1, [r0, #4] 1304 0050 007C ldrb r0, [r0, #16] @ zero_extendqisi2 1305 .LVL102: 254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #else 1306 .loc 1 254 5 is_stmt 0 view .LVU364 1307 0052 FFF7FEFF bl FLASH_MassErase 1308 .LVL103: 275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 1309 .loc 1 275 10 view .LVU365 1310 0056 0020 movs r0, #0 1311 0058 F5E7 b .L110 1312 .LVL104: 1313 .L112: 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1314 .loc 1 234 3 view .LVU366 1315 005a 0220 movs r0, #2 1316 .LVL105: 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1317 .loc 1 234 3 view .LVU367 1318 005c F3E7 b .L110 1319 .L116: 1320 005e 00BF .align 2 1321 .L115: 1322 0060 00000000 .word pFlash 1323 0064 003C0240 .word 1073888256 1324 .cfi_endproc 1325 .LFE142: 1327 .text 1328 .Letext0: 1329 .file 3 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h" 1330 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 1331 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 1332 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h" 1333 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h" ARM GAS /tmp/cc5GTpRB.s page 63 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f7xx_hal_flash_ex.c /tmp/cc5GTpRB.s:17 .text.FLASH_MassErase:0000000000000000 $t /tmp/cc5GTpRB.s:24 .text.FLASH_MassErase:0000000000000000 FLASH_MassErase /tmp/cc5GTpRB.s:106 .text.FLASH_MassErase:0000000000000048 $d /tmp/cc5GTpRB.s:111 .text.FLASH_OB_GetWRP:0000000000000000 $t /tmp/cc5GTpRB.s:117 .text.FLASH_OB_GetWRP:0000000000000000 FLASH_OB_GetWRP /tmp/cc5GTpRB.s:135 .text.FLASH_OB_GetWRP:000000000000000c $d /tmp/cc5GTpRB.s:141 .text.FLASH_OB_GetUser:0000000000000000 $t /tmp/cc5GTpRB.s:147 .text.FLASH_OB_GetUser:0000000000000000 FLASH_OB_GetUser /tmp/cc5GTpRB.s:165 .text.FLASH_OB_GetUser:000000000000000c $d /tmp/cc5GTpRB.s:171 .text.FLASH_OB_BOR_LevelConfig:0000000000000000 $t /tmp/cc5GTpRB.s:177 .text.FLASH_OB_BOR_LevelConfig:0000000000000000 FLASH_OB_BOR_LevelConfig /tmp/cc5GTpRB.s:201 .text.FLASH_OB_BOR_LevelConfig:0000000000000010 $d /tmp/cc5GTpRB.s:206 .text.FLASH_OB_GetRDP:0000000000000000 $t /tmp/cc5GTpRB.s:212 .text.FLASH_OB_GetRDP:0000000000000000 FLASH_OB_GetRDP /tmp/cc5GTpRB.s:246 .text.FLASH_OB_GetRDP:0000000000000018 $d /tmp/cc5GTpRB.s:251 .text.FLASH_OB_GetBOR:0000000000000000 $t /tmp/cc5GTpRB.s:257 .text.FLASH_OB_GetBOR:0000000000000000 FLASH_OB_GetBOR /tmp/cc5GTpRB.s:274 .text.FLASH_OB_GetBOR:000000000000000c $d /tmp/cc5GTpRB.s:279 .text.FLASH_OB_GetBootAddress:0000000000000000 $t /tmp/cc5GTpRB.s:285 .text.FLASH_OB_GetBootAddress:0000000000000000 FLASH_OB_GetBootAddress /tmp/cc5GTpRB.s:324 .text.FLASH_OB_GetBootAddress:0000000000000014 $d /tmp/cc5GTpRB.s:329 .text.FLASH_OB_EnableWRP:0000000000000000 $t /tmp/cc5GTpRB.s:335 .text.FLASH_OB_EnableWRP:0000000000000000 FLASH_OB_EnableWRP /tmp/cc5GTpRB.s:377 .text.FLASH_OB_EnableWRP:000000000000001c $d /tmp/cc5GTpRB.s:382 .text.FLASH_OB_DisableWRP:0000000000000000 $t /tmp/cc5GTpRB.s:388 .text.FLASH_OB_DisableWRP:0000000000000000 FLASH_OB_DisableWRP /tmp/cc5GTpRB.s:430 .text.FLASH_OB_DisableWRP:0000000000000018 $d /tmp/cc5GTpRB.s:435 .text.FLASH_OB_RDP_LevelConfig:0000000000000000 $t /tmp/cc5GTpRB.s:441 .text.FLASH_OB_RDP_LevelConfig:0000000000000000 FLASH_OB_RDP_LevelConfig /tmp/cc5GTpRB.s:479 .text.FLASH_OB_RDP_LevelConfig:0000000000000014 $d /tmp/cc5GTpRB.s:484 .text.FLASH_OB_UserConfig:0000000000000000 $t /tmp/cc5GTpRB.s:490 .text.FLASH_OB_UserConfig:0000000000000000 FLASH_OB_UserConfig /tmp/cc5GTpRB.s:576 .text.FLASH_OB_UserConfig:000000000000003c $d /tmp/cc5GTpRB.s:582 .text.FLASH_OB_BootAddressConfig:0000000000000000 $t /tmp/cc5GTpRB.s:588 .text.FLASH_OB_BootAddressConfig:0000000000000000 FLASH_OB_BootAddressConfig /tmp/cc5GTpRB.s:645 .text.FLASH_OB_BootAddressConfig:0000000000000030 $d /tmp/cc5GTpRB.s:651 .text.HAL_FLASHEx_OBProgram:0000000000000000 $t /tmp/cc5GTpRB.s:658 .text.HAL_FLASHEx_OBProgram:0000000000000000 HAL_FLASHEx_OBProgram /tmp/cc5GTpRB.s:857 .text.HAL_FLASHEx_OBProgram:00000000000000c0 $d /tmp/cc5GTpRB.s:862 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 $t /tmp/cc5GTpRB.s:869 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 HAL_FLASHEx_OBGetConfig /tmp/cc5GTpRB.s:932 .text.FLASH_Erase_Sector:0000000000000000 $t /tmp/cc5GTpRB.s:939 .text.FLASH_Erase_Sector:0000000000000000 FLASH_Erase_Sector /tmp/cc5GTpRB.s:1036 .text.FLASH_Erase_Sector:000000000000005c $d /tmp/cc5GTpRB.s:1041 .text.HAL_FLASHEx_Erase:0000000000000000 $t /tmp/cc5GTpRB.s:1048 .text.HAL_FLASHEx_Erase:0000000000000000 HAL_FLASHEx_Erase /tmp/cc5GTpRB.s:1204 .text.HAL_FLASHEx_Erase:000000000000008c $d /tmp/cc5GTpRB.s:1211 .text.HAL_FLASHEx_Erase_IT:0000000000000000 $t /tmp/cc5GTpRB.s:1218 .text.HAL_FLASHEx_Erase_IT:0000000000000000 HAL_FLASHEx_Erase_IT /tmp/cc5GTpRB.s:1322 .text.HAL_FLASHEx_Erase_IT:0000000000000060 $d UNDEFINED SYMBOLS FLASH_WaitForLastOperation pFlash