ARM GAS /tmp/ccuaURzG.s page 1 1 .cpu cortex-m7 2 .arch armv7e-m 3 .fpu fpv5-d16 4 .eabi_attribute 28, 1 5 .eabi_attribute 20, 1 6 .eabi_attribute 21, 1 7 .eabi_attribute 23, 3 8 .eabi_attribute 24, 1 9 .eabi_attribute 25, 1 10 .eabi_attribute 26, 1 11 .eabi_attribute 30, 1 12 .eabi_attribute 34, 1 13 .eabi_attribute 18, 4 14 .file "stm32f7xx_hal_pwr_ex.c" 15 .text 16 .Ltext0: 17 .cfi_sections .debug_frame 18 .file 1 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c" 19 .section .text.HAL_PWREx_EnableBkUpReg,"ax",%progbits 20 .align 1 21 .global HAL_PWREx_EnableBkUpReg 22 .syntax unified 23 .thumb 24 .thumb_func 26 HAL_PWREx_EnableBkUpReg: 27 .LFB141: 1:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 2:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @file stm32f7xx_hal_pwr_ex.c 4:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @author MCD Application Team 5:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. 6:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * functionalities of PWR extension peripheral: 8:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * + Peripheral Extended features functions 9:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 10:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ****************************************************************************** 11:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @attention 12:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 13:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * Copyright (c) 2017 STMicroelectronics. 14:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * All rights reserved. 15:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 16:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file 17:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * in the root directory of this software component. 18:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 19:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 20:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ****************************************************************************** 21:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 22:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 23:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ 24:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #include "stm32f7xx_hal.h" 25:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 26:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @addtogroup STM32F7xx_HAL_Driver 27:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{ 28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief PWR HAL module driver ARM GAS /tmp/ccuaURzG.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{ 33:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 34:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 35:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED 36:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 37:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ 38:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ 39:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @addtogroup PWREx_Private_Constants 40:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{ 41:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 42:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000 43:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000 44:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_BKPREG_TIMEOUT_VALUE 1000 45:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** #define PWR_VOSRDY_TIMEOUT_VALUE 1000 46:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 47:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @} 48:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 49:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 50:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ 51:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ 52:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ 53:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Private functions ---------------------------------------------------------*/ 54:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions 55:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{ 56:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 57:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 58:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions 59:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Peripheral Extended features functions 60:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 61:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** @verbatim 62:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 63:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** =============================================================================== 64:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ##### Peripheral extended features functions ##### 65:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** =============================================================================== 66:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 67:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *** Main and Backup Regulators configuration *** 68:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ================================================ 69:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** [..] 70:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from 71:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is 72:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** retained even in Standby or VBAT mode when the low power backup regulator 73:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** is enabled. It can be considered as an internal EEPROM when VBAT is 74:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** always present. You can use the HAL_PWREx_EnableBkUpReg() function to 75:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** enable the low power backup regulator. 76:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 77:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD) 78:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to 79:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** save battery life. 80:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 81:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read 82:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** protected to prevent confidential data, such as cryptographic private 83:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** key, from being accessed. The backup SRAM can be erased only through 84:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the Flash interface when a protection level change from level 1 to 85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** level 0 is requested. 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** -@- Refer to the description of Read protection (RDP) in the Flash 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** programming manual. 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ARM GAS /tmp/ccuaURzG.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The main internal regulator can be configured to have a tradeoff between 90:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** performance and power consumption when the device does not operate at 91:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() 92:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** macro which configure VOS bit in PWR_CR register 93:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 94:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** Refer to the product datasheets for more details. 95:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 96:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *** FLASH Power Down configuration **** 97:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ======================================= 98:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** [..] 99:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) By setting the FPDS bit in the PWR_CR register by using the 100:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power 101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** down mode when the device enters Stop mode. When the Flash memory 102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** is in power down mode, an additional startup delay is incurred when 103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** waking up from Stop mode. 104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *** Over-Drive and Under-Drive configuration **** 106:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ================================================= 107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** [..] 108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) In Run mode: the main regulator has 2 operating modes available: 109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Normal mode: The CPU and core logic operate at maximum frequency at a given 110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** voltage scaling (scale 1, scale 2 or scale 3) 111:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a 112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** higher frequency than the normal mode for a given voltage scaling (scale 1, 113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function 114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mod 115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** the sequence described in Reference manual. 116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 117:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) In Stop mode: the main regulator or low power regulator supplies a low power 118:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** voltage to the 1.2V domain, thus preserving the content of registers 119:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** and internal SRAM. 2 operating modes are available: 120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only 121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is used in Scale 3 or 122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** low voltage mode. 123:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is 124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is in low voltage mode. 125:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 126:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** @endverbatim 127:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{ 128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables the Backup Regulator. 132:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status 133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void) 135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 28 .loc 1 135 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 0 31 @ frame_needed = 0, uses_anonymous_args = 0 32 0000 10B5 push {r4, lr} 33 .LCFI0: 34 .cfi_def_cfa_offset 8 35 .cfi_offset 4, -8 36 .cfi_offset 14, -4 136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0; ARM GAS /tmp/ccuaURzG.s page 4 37 .loc 1 136 3 view .LVU1 38 .LVL0: 137:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Backup regulator */ 139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 |= PWR_CSR1_BRE; 39 .loc 1 139 3 view .LVU2 40 .loc 1 139 6 is_stmt 0 view .LVU3 41 0002 0D4B ldr r3, .L8 42 0004 5A68 ldr r2, [r3, #4] 43 .loc 1 139 13 view .LVU4 44 0006 42F40072 orr r2, r2, #512 45 000a 5A60 str r2, [r3, #4] 140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Workaround for the following hardware bug: */ 142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Id 19: PWR : No STANDBY wake-up when Back-up RAM enabled (ref. Errata Sheet p23) */ 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 |= PWR_CSR1_EIWUP; 46 .loc 1 143 3 is_stmt 1 view .LVU5 47 .loc 1 143 6 is_stmt 0 view .LVU6 48 000c 5A68 ldr r2, [r3, #4] 49 .loc 1 143 13 view .LVU7 50 000e 42F48072 orr r2, r2, #256 51 0012 5A60 str r2, [r3, #4] 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 52 .loc 1 146 3 is_stmt 1 view .LVU8 53 .loc 1 146 15 is_stmt 0 view .LVU9 54 0014 FFF7FEFF bl HAL_GetTick 55 .LVL1: 56 0018 0446 mov r4, r0 57 .LVL2: 147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 148:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */ 149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET) 58 .loc 1 149 3 is_stmt 1 view .LVU10 59 .L2: 60 .loc 1 149 42 view .LVU11 61 .loc 1 149 9 is_stmt 0 view .LVU12 62 001a 074B ldr r3, .L8 63 001c 5B68 ldr r3, [r3, #4] 64 .loc 1 149 42 view .LVU13 65 001e 13F0080F tst r3, #8 66 0022 07D1 bne .L7 150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) 67 .loc 1 151 5 is_stmt 1 view .LVU14 68 .loc 1 151 9 is_stmt 0 view .LVU15 69 0024 FFF7FEFF bl HAL_GetTick 70 .LVL3: 71 .loc 1 151 23 discriminator 1 view .LVU16 72 0028 001B subs r0, r0, r4 73 .loc 1 151 7 discriminator 1 view .LVU17 74 002a B0F57A7F cmp r0, #1000 75 002e F4D9 bls .L2 152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 76 .loc 1 153 14 view .LVU18 ARM GAS /tmp/ccuaURzG.s page 5 77 0030 0320 movs r0, #3 78 0032 00E0 b .L3 79 .L7: 154:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 156:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK; 80 .loc 1 156 10 view .LVU19 81 0034 0020 movs r0, #0 82 .L3: 157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 83 .loc 1 157 1 view .LVU20 84 0036 10BD pop {r4, pc} 85 .LVL4: 86 .L9: 87 .loc 1 157 1 view .LVU21 88 .align 2 89 .L8: 90 0038 00700040 .word 1073770496 91 .cfi_endproc 92 .LFE141: 94 .section .text.HAL_PWREx_DisableBkUpReg,"ax",%progbits 95 .align 1 96 .global HAL_PWREx_DisableBkUpReg 97 .syntax unified 98 .thumb 99 .thumb_func 101 HAL_PWREx_DisableBkUpReg: 102 .LFB142: 158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables the Backup Regulator. 161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 163:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void) 164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 103 .loc 1 164 1 is_stmt 1 view -0 104 .cfi_startproc 105 @ args = 0, pretend = 0, frame = 0 106 @ frame_needed = 0, uses_anonymous_args = 0 107 0000 10B5 push {r4, lr} 108 .LCFI1: 109 .cfi_def_cfa_offset 8 110 .cfi_offset 4, -8 111 .cfi_offset 14, -4 165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0; 112 .loc 1 165 3 view .LVU23 113 .LVL5: 166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable Backup regulator */ 168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 &= (uint32_t)~((uint32_t)PWR_CSR1_BRE); 114 .loc 1 168 3 view .LVU24 115 .loc 1 168 6 is_stmt 0 view .LVU25 116 0002 0D4B ldr r3, .L17 117 0004 5A68 ldr r2, [r3, #4] 118 .loc 1 168 13 view .LVU26 119 0006 22F40072 bic r2, r2, #512 120 000a 5A60 str r2, [r3, #4] ARM GAS /tmp/ccuaURzG.s page 6 169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Workaround for the following hardware bug: */ 171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Id 19: PWR : No STANDBY wake-up when Back-up RAM enabled (ref. Errata Sheet p23) */ 172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CSR1 |= PWR_CSR1_EIWUP; 121 .loc 1 172 3 is_stmt 1 view .LVU27 122 .loc 1 172 6 is_stmt 0 view .LVU28 123 000c 5A68 ldr r2, [r3, #4] 124 .loc 1 172 13 view .LVU29 125 000e 42F48072 orr r2, r2, #256 126 0012 5A60 str r2, [r3, #4] 173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 127 .loc 1 175 3 is_stmt 1 view .LVU30 128 .loc 1 175 15 is_stmt 0 view .LVU31 129 0014 FFF7FEFF bl HAL_GetTick 130 .LVL6: 131 0018 0446 mov r4, r0 132 .LVL7: 176:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 177:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */ 178:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET) 133 .loc 1 178 3 is_stmt 1 view .LVU32 134 .L11: 135 .loc 1 178 42 view .LVU33 136 .loc 1 178 9 is_stmt 0 view .LVU34 137 001a 074B ldr r3, .L17 138 001c 5B68 ldr r3, [r3, #4] 139 .loc 1 178 42 view .LVU35 140 001e 13F0080F tst r3, #8 141 0022 07D0 beq .L16 179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) 142 .loc 1 180 5 is_stmt 1 view .LVU36 143 .loc 1 180 9 is_stmt 0 view .LVU37 144 0024 FFF7FEFF bl HAL_GetTick 145 .LVL8: 146 .loc 1 180 23 discriminator 1 view .LVU38 147 0028 001B subs r0, r0, r4 148 .loc 1 180 7 discriminator 1 view .LVU39 149 002a B0F57A7F cmp r0, #1000 150 002e F4D9 bls .L11 181:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 182:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 151 .loc 1 182 14 view .LVU40 152 0030 0320 movs r0, #3 153 0032 00E0 b .L12 154 .L16: 183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 184:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK; 155 .loc 1 185 10 view .LVU41 156 0034 0020 movs r0, #0 157 .L12: 186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 158 .loc 1 186 1 view .LVU42 159 0036 10BD pop {r4, pc} ARM GAS /tmp/ccuaURzG.s page 7 160 .LVL9: 161 .L18: 162 .loc 1 186 1 view .LVU43 163 .align 2 164 .L17: 165 0038 00700040 .word 1073770496 166 .cfi_endproc 167 .LFE142: 169 .section .text.HAL_PWREx_EnableFlashPowerDown,"ax",%progbits 170 .align 1 171 .global HAL_PWREx_EnableFlashPowerDown 172 .syntax unified 173 .thumb 174 .thumb_func 176 HAL_PWREx_EnableFlashPowerDown: 177 .LFB143: 187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 189:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables the Flash Power Down in Stop mode. 190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_EnableFlashPowerDown(void) 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 178 .loc 1 193 1 is_stmt 1 view -0 179 .cfi_startproc 180 @ args = 0, pretend = 0, frame = 0 181 @ frame_needed = 0, uses_anonymous_args = 0 182 @ link register save eliminated. 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Flash Power Down */ 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 |= PWR_CR1_FPDS; 183 .loc 1 195 3 view .LVU45 184 .loc 1 195 6 is_stmt 0 view .LVU46 185 0000 024A ldr r2, .L20 186 0002 1368 ldr r3, [r2] 187 .loc 1 195 12 view .LVU47 188 0004 43F40073 orr r3, r3, #512 189 0008 1360 str r3, [r2] 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 190 .loc 1 196 1 view .LVU48 191 000a 7047 bx lr 192 .L21: 193 .align 2 194 .L20: 195 000c 00700040 .word 1073770496 196 .cfi_endproc 197 .LFE143: 199 .section .text.HAL_PWREx_DisableFlashPowerDown,"ax",%progbits 200 .align 1 201 .global HAL_PWREx_DisableFlashPowerDown 202 .syntax unified 203 .thumb 204 .thumb_func 206 HAL_PWREx_DisableFlashPowerDown: 207 .LFB144: 197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables the Flash Power Down in Stop mode. ARM GAS /tmp/ccuaURzG.s page 8 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_DisableFlashPowerDown(void) 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 208 .loc 1 203 1 is_stmt 1 view -0 209 .cfi_startproc 210 @ args = 0, pretend = 0, frame = 0 211 @ frame_needed = 0, uses_anonymous_args = 0 212 @ link register save eliminated. 204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the Flash Power Down */ 205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_FPDS); 213 .loc 1 205 3 view .LVU50 214 .loc 1 205 6 is_stmt 0 view .LVU51 215 0000 024A ldr r2, .L23 216 0002 1368 ldr r3, [r2] 217 .loc 1 205 12 view .LVU52 218 0004 23F40073 bic r3, r3, #512 219 0008 1360 str r3, [r2] 206:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 220 .loc 1 206 1 view .LVU53 221 000a 7047 bx lr 222 .L24: 223 .align 2 224 .L23: 225 000c 00700040 .word 1073770496 226 .cfi_endproc 227 .LFE144: 229 .section .text.HAL_PWREx_EnableMainRegulatorLowVoltage,"ax",%progbits 230 .align 1 231 .global HAL_PWREx_EnableMainRegulatorLowVoltage 232 .syntax unified 233 .thumb 234 .thumb_func 236 HAL_PWREx_EnableMainRegulatorLowVoltage: 237 .LFB145: 207:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables Main Regulator low voltage mode. 210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None 211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_EnableMainRegulatorLowVoltage(void) 213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 238 .loc 1 213 1 is_stmt 1 view -0 239 .cfi_startproc 240 @ args = 0, pretend = 0, frame = 0 241 @ frame_needed = 0, uses_anonymous_args = 0 242 @ link register save eliminated. 214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Main regulator low voltage */ 215:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 |= PWR_CR1_MRUDS; 243 .loc 1 215 3 view .LVU55 244 .loc 1 215 6 is_stmt 0 view .LVU56 245 0000 024A ldr r2, .L26 246 0002 1368 ldr r3, [r2] 247 .loc 1 215 12 view .LVU57 248 0004 43F40063 orr r3, r3, #2048 249 0008 1360 str r3, [r2] 216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } ARM GAS /tmp/ccuaURzG.s page 9 250 .loc 1 216 1 view .LVU58 251 000a 7047 bx lr 252 .L27: 253 .align 2 254 .L26: 255 000c 00700040 .word 1073770496 256 .cfi_endproc 257 .LFE145: 259 .section .text.HAL_PWREx_DisableMainRegulatorLowVoltage,"ax",%progbits 260 .align 1 261 .global HAL_PWREx_DisableMainRegulatorLowVoltage 262 .syntax unified 263 .thumb 264 .thumb_func 266 HAL_PWREx_DisableMainRegulatorLowVoltage: 267 .LFB146: 217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables Main Regulator low voltage mode. 220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None 221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_DisableMainRegulatorLowVoltage(void) 223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 268 .loc 1 223 1 is_stmt 1 view -0 269 .cfi_startproc 270 @ args = 0, pretend = 0, frame = 0 271 @ frame_needed = 0, uses_anonymous_args = 0 272 @ link register save eliminated. 224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable Main regulator low voltage */ 225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_MRUDS); 273 .loc 1 225 3 view .LVU60 274 .loc 1 225 6 is_stmt 0 view .LVU61 275 0000 024A ldr r2, .L29 276 0002 1368 ldr r3, [r2] 277 .loc 1 225 12 view .LVU62 278 0004 23F40063 bic r3, r3, #2048 279 0008 1360 str r3, [r2] 226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 280 .loc 1 226 1 view .LVU63 281 000a 7047 bx lr 282 .L30: 283 .align 2 284 .L29: 285 000c 00700040 .word 1073770496 286 .cfi_endproc 287 .LFE146: 289 .section .text.HAL_PWREx_EnableLowRegulatorLowVoltage,"ax",%progbits 290 .align 1 291 .global HAL_PWREx_EnableLowRegulatorLowVoltage 292 .syntax unified 293 .thumb 294 .thumb_func 296 HAL_PWREx_EnableLowRegulatorLowVoltage: 297 .LFB147: 227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables Low Power Regulator low voltage mode. ARM GAS /tmp/ccuaURzG.s page 10 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None 231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_EnableLowRegulatorLowVoltage(void) 233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 298 .loc 1 233 1 is_stmt 1 view -0 299 .cfi_startproc 300 @ args = 0, pretend = 0, frame = 0 301 @ frame_needed = 0, uses_anonymous_args = 0 302 @ link register save eliminated. 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable low power regulator */ 235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 |= PWR_CR1_LPUDS; 303 .loc 1 235 3 view .LVU65 304 .loc 1 235 6 is_stmt 0 view .LVU66 305 0000 024A ldr r2, .L32 306 0002 1368 ldr r3, [r2] 307 .loc 1 235 12 view .LVU67 308 0004 43F48063 orr r3, r3, #1024 309 0008 1360 str r3, [r2] 236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 310 .loc 1 236 1 view .LVU68 311 000a 7047 bx lr 312 .L33: 313 .align 2 314 .L32: 315 000c 00700040 .word 1073770496 316 .cfi_endproc 317 .LFE147: 319 .section .text.HAL_PWREx_DisableLowRegulatorLowVoltage,"ax",%progbits 320 .align 1 321 .global HAL_PWREx_DisableLowRegulatorLowVoltage 322 .syntax unified 323 .thumb 324 .thumb_func 326 HAL_PWREx_DisableLowRegulatorLowVoltage: 327 .LFB148: 237:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables Low Power Regulator low voltage mode. 240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None 241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** void HAL_PWREx_DisableLowRegulatorLowVoltage(void) 243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 328 .loc 1 243 1 is_stmt 1 view -0 329 .cfi_startproc 330 @ args = 0, pretend = 0, frame = 0 331 @ frame_needed = 0, uses_anonymous_args = 0 332 @ link register save eliminated. 244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable low power regulator */ 245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_LPUDS); 333 .loc 1 245 3 view .LVU70 334 .loc 1 245 6 is_stmt 0 view .LVU71 335 0000 024A ldr r2, .L35 336 0002 1368 ldr r3, [r2] 337 .loc 1 245 12 view .LVU72 338 0004 23F48063 bic r3, r3, #1024 339 0008 1360 str r3, [r2] 246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } ARM GAS /tmp/ccuaURzG.s page 11 340 .loc 1 246 1 view .LVU73 341 000a 7047 bx lr 342 .L36: 343 .align 2 344 .L35: 345 000c 00700040 .word 1073770496 346 .cfi_endproc 347 .LFE148: 349 .section .text.HAL_PWREx_EnableOverDrive,"ax",%progbits 350 .align 1 351 .global HAL_PWREx_EnableOverDrive 352 .syntax unified 353 .thumb 354 .thumb_func 356 HAL_PWREx_EnableOverDrive: 357 .LFB149: 247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Activates the Over-Drive mode. 250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode allows the CPU and the core logic to operate at a higher frequency 251:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). 252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note It is recommended to enter or exit Over-drive mode when the application is not running 253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * critical tasks and when the system clock source is either HSI or HSE. 254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * During the Over-drive switch activation, no peripheral clocks should be enabled. 255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * The peripheral clocks must be enabled once the Over-drive mode is activated. 256:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void) 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 358 .loc 1 259 1 is_stmt 1 view -0 359 .cfi_startproc 360 @ args = 0, pretend = 0, frame = 8 361 @ frame_needed = 0, uses_anonymous_args = 0 362 0000 10B5 push {r4, lr} 363 .LCFI2: 364 .cfi_def_cfa_offset 8 365 .cfi_offset 4, -8 366 .cfi_offset 14, -4 367 0002 82B0 sub sp, sp, #8 368 .LCFI3: 369 .cfi_def_cfa_offset 16 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0; 370 .loc 1 260 3 view .LVU75 371 .LVL10: 261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 372 .loc 1 262 3 view .LVU76 373 .LBB2: 374 .loc 1 262 3 view .LVU77 375 .loc 1 262 3 view .LVU78 376 0004 1B4B ldr r3, .L48 377 0006 1A6C ldr r2, [r3, #64] 378 0008 42F08052 orr r2, r2, #268435456 379 000c 1A64 str r2, [r3, #64] 380 .loc 1 262 3 view .LVU79 381 000e 1B6C ldr r3, [r3, #64] 382 0010 03F08053 and r3, r3, #268435456 ARM GAS /tmp/ccuaURzG.s page 12 383 0014 0193 str r3, [sp, #4] 384 .loc 1 262 3 view .LVU80 385 0016 019B ldr r3, [sp, #4] 386 .LBE2: 387 .loc 1 262 3 view .LVU81 263:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Over-drive to extend the clock frequency to 216 MHz */ 265:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVE_ENABLE(); 388 .loc 1 265 3 view .LVU82 389 0018 174A ldr r2, .L48+4 390 001a 1368 ldr r3, [r2] 391 001c 43F48033 orr r3, r3, #65536 392 0020 1360 str r3, [r2] 266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 393 .loc 1 268 3 view .LVU83 394 .loc 1 268 15 is_stmt 0 view .LVU84 395 0022 FFF7FEFF bl HAL_GetTick 396 .LVL11: 397 0026 0446 mov r4, r0 398 .LVL12: 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 399 .loc 1 270 3 is_stmt 1 view .LVU85 400 .L38: 401 .loc 1 270 9 view .LVU86 402 .loc 1 270 10 is_stmt 0 view .LVU87 403 0028 134B ldr r3, .L48+4 404 002a 5B68 ldr r3, [r3, #4] 405 .loc 1 270 9 view .LVU88 406 002c 13F4803F tst r3, #65536 407 0030 08D1 bne .L46 271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 408 .loc 1 272 5 is_stmt 1 view .LVU89 409 .loc 1 272 9 is_stmt 0 view .LVU90 410 0032 FFF7FEFF bl HAL_GetTick 411 .LVL13: 412 .loc 1 272 23 discriminator 1 view .LVU91 413 0036 001B subs r0, r0, r4 414 .loc 1 272 7 discriminator 1 view .LVU92 415 0038 B0F57A7F cmp r0, #1000 416 003c F4D9 bls .L38 273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 417 .loc 1 274 14 view .LVU93 418 003e 0320 movs r0, #3 419 .L39: 275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Over-drive switch */ 279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); 280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); ARM GAS /tmp/ccuaURzG.s page 13 283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK; 292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 420 .loc 1 292 1 view .LVU94 421 0040 02B0 add sp, sp, #8 422 .LCFI4: 423 .cfi_remember_state 424 .cfi_def_cfa_offset 8 425 @ sp needed 426 0042 10BD pop {r4, pc} 427 .LVL14: 428 .L46: 429 .LCFI5: 430 .cfi_restore_state 279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 431 .loc 1 279 3 is_stmt 1 view .LVU95 432 0044 0C4A ldr r2, .L48+4 433 0046 1368 ldr r3, [r2] 434 0048 43F40033 orr r3, r3, #131072 435 004c 1360 str r3, [r2] 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 436 .loc 1 282 3 view .LVU96 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 437 .loc 1 282 15 is_stmt 0 view .LVU97 438 004e FFF7FEFF bl HAL_GetTick 439 .LVL15: 440 0052 0446 mov r4, r0 441 .LVL16: 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 442 .loc 1 284 3 is_stmt 1 view .LVU98 443 .L41: 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 444 .loc 1 284 9 view .LVU99 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 445 .loc 1 284 10 is_stmt 0 view .LVU100 446 0054 084B ldr r3, .L48+4 447 0056 5B68 ldr r3, [r3, #4] 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 448 .loc 1 284 9 view .LVU101 449 0058 13F4003F tst r3, #131072 450 005c 07D1 bne .L47 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 451 .loc 1 286 5 is_stmt 1 view .LVU102 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 452 .loc 1 286 9 is_stmt 0 view .LVU103 453 005e FFF7FEFF bl HAL_GetTick 454 .LVL17: 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 455 .loc 1 286 23 discriminator 1 view .LVU104 456 0062 001B subs r0, r0, r4 ARM GAS /tmp/ccuaURzG.s page 14 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 457 .loc 1 286 7 discriminator 1 view .LVU105 458 0064 B0F57A7F cmp r0, #1000 459 0068 F4D9 bls .L41 288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 460 .loc 1 288 14 view .LVU106 461 006a 0320 movs r0, #3 462 006c E8E7 b .L39 463 .L47: 291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 464 .loc 1 291 10 view .LVU107 465 006e 0020 movs r0, #0 466 0070 E6E7 b .L39 467 .L49: 468 0072 00BF .align 2 469 .L48: 470 0074 00380240 .word 1073887232 471 0078 00700040 .word 1073770496 472 .cfi_endproc 473 .LFE149: 475 .section .text.HAL_PWREx_DisableOverDrive,"ax",%progbits 476 .align 1 477 .global HAL_PWREx_DisableOverDrive 478 .syntax unified 479 .thumb 480 .thumb_func 482 HAL_PWREx_DisableOverDrive: 483 .LFB150: 293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Deactivates the Over-Drive mode. 296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode allows the CPU and the core logic to operate at a higher frequency 297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). 298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note It is recommended to enter or exit Over-drive mode when the application is not running 299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * critical tasks and when the system clock source is either HSI or HSE. 300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * During the Over-drive switch activation, no peripheral clocks should be enabled. 301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * The peripheral clocks must be enabled once the Over-drive mode is activated. 302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL status 303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void) 305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 484 .loc 1 305 1 is_stmt 1 view -0 485 .cfi_startproc 486 @ args = 0, pretend = 0, frame = 8 487 @ frame_needed = 0, uses_anonymous_args = 0 488 0000 10B5 push {r4, lr} 489 .LCFI6: 490 .cfi_def_cfa_offset 8 491 .cfi_offset 4, -8 492 .cfi_offset 14, -4 493 0002 82B0 sub sp, sp, #8 494 .LCFI7: 495 .cfi_def_cfa_offset 16 306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0; 496 .loc 1 306 3 view .LVU109 497 .LVL18: 307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** ARM GAS /tmp/ccuaURzG.s page 15 308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 498 .loc 1 308 3 view .LVU110 499 .LBB3: 500 .loc 1 308 3 view .LVU111 501 .loc 1 308 3 view .LVU112 502 0004 1B4B ldr r3, .L61 503 0006 1A6C ldr r2, [r3, #64] 504 0008 42F08052 orr r2, r2, #268435456 505 000c 1A64 str r2, [r3, #64] 506 .loc 1 308 3 view .LVU113 507 000e 1B6C ldr r3, [r3, #64] 508 0010 03F08053 and r3, r3, #268435456 509 0014 0193 str r3, [sp, #4] 510 .loc 1 308 3 view .LVU114 511 0016 019B ldr r3, [sp, #4] 512 .LBE3: 513 .loc 1 308 3 view .LVU115 309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the Over-drive switch */ 311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVESWITCHING_DISABLE(); 514 .loc 1 311 3 view .LVU116 515 0018 174A ldr r2, .L61+4 516 001a 1368 ldr r3, [r2] 517 001c 23F40033 bic r3, r3, #131072 518 0020 1360 str r3, [r2] 312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 519 .loc 1 314 3 view .LVU117 520 .loc 1 314 15 is_stmt 0 view .LVU118 521 0022 FFF7FEFF bl HAL_GetTick 522 .LVL19: 523 0026 0446 mov r4, r0 524 .LVL20: 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 525 .loc 1 316 3 is_stmt 1 view .LVU119 526 .L51: 527 .loc 1 316 9 view .LVU120 528 0028 134B ldr r3, .L61+4 529 002a 5B68 ldr r3, [r3, #4] 530 002c 13F4003F tst r3, #131072 531 0030 08D0 beq .L59 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 532 .loc 1 318 5 view .LVU121 533 .loc 1 318 9 is_stmt 0 view .LVU122 534 0032 FFF7FEFF bl HAL_GetTick 535 .LVL21: 536 .loc 1 318 23 discriminator 1 view .LVU123 537 0036 001B subs r0, r0, r4 538 .loc 1 318 7 discriminator 1 view .LVU124 539 0038 B0F57A7F cmp r0, #1000 540 003c F4D9 bls .L51 319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 541 .loc 1 320 14 view .LVU125 ARM GAS /tmp/ccuaURzG.s page 16 542 003e 0320 movs r0, #3 543 .L52: 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 323:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 324:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the Over-drive */ 325:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVE_DISABLE(); 326:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 329:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK; 339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 544 .loc 1 339 1 view .LVU126 545 0040 02B0 add sp, sp, #8 546 .LCFI8: 547 .cfi_remember_state 548 .cfi_def_cfa_offset 8 549 @ sp needed 550 0042 10BD pop {r4, pc} 551 .LVL22: 552 .L59: 553 .LCFI9: 554 .cfi_restore_state 325:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 555 .loc 1 325 3 is_stmt 1 view .LVU127 556 0044 0C4A ldr r2, .L61+4 557 0046 1368 ldr r3, [r2] 558 0048 23F48033 bic r3, r3, #65536 559 004c 1360 str r3, [r2] 328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 560 .loc 1 328 3 view .LVU128 328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 561 .loc 1 328 15 is_stmt 0 view .LVU129 562 004e FFF7FEFF bl HAL_GetTick 563 .LVL23: 564 0052 0446 mov r4, r0 565 .LVL24: 330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 566 .loc 1 330 3 is_stmt 1 view .LVU130 567 .L54: 330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 568 .loc 1 330 9 view .LVU131 569 0054 084B ldr r3, .L61+4 570 0056 5B68 ldr r3, [r3, #4] 571 0058 13F4803F tst r3, #65536 572 005c 07D0 beq .L60 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 573 .loc 1 332 5 view .LVU132 ARM GAS /tmp/ccuaURzG.s page 17 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 574 .loc 1 332 9 is_stmt 0 view .LVU133 575 005e FFF7FEFF bl HAL_GetTick 576 .LVL25: 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 577 .loc 1 332 23 discriminator 1 view .LVU134 578 0062 001B subs r0, r0, r4 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 579 .loc 1 332 7 discriminator 1 view .LVU135 580 0064 B0F57A7F cmp r0, #1000 581 0068 F4D9 bls .L54 334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 582 .loc 1 334 14 view .LVU136 583 006a 0320 movs r0, #3 584 006c E8E7 b .L52 585 .L60: 338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 586 .loc 1 338 10 view .LVU137 587 006e 0020 movs r0, #0 588 0070 E6E7 b .L52 589 .L62: 590 0072 00BF .align 2 591 .L61: 592 0074 00380240 .word 1073887232 593 0078 00700040 .word 1073770496 594 .cfi_endproc 595 .LFE150: 597 .section .text.HAL_PWREx_EnterUnderDriveSTOPMode,"ax",%progbits 598 .align 1 599 .global HAL_PWREx_EnterUnderDriveSTOPMode 600 .syntax unified 601 .thumb 602 .thumb_func 604 HAL_PWREx_EnterUnderDriveSTOPMode: 605 .LVL26: 606 .LFB151: 340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enters in Under-Drive STOP mode. 343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode can be selected only when the Under-Drive is already active 345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This mode is enabled only with STOP low power mode. 347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * In this mode, the 1.2V domain is preserved in reduced leakage mode. This 348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * mode is only available when the main regulator or the low power regulator 349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * is in low voltage mode 350:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note If the Under-drive mode was enabled, it is automatically disabled after 352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * exiting Stop mode. 353:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * When the voltage regulator operates in Under-drive mode, an additional 354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * startup delay is induced when waking up from Stop mode. 355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. 357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, 359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock. 360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * ARM GAS /tmp/ccuaURzG.s page 18 361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When the voltage regulator operates in low power mode, an additional 362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * startup delay is incurred when waking up from Stop mode. 363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * By keeping the internal regulator ON during Stop mode, the consumption 364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * is higher although the startup time is reduced. 365:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * 366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param Regulator specifies the regulator state in STOP mode. 367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode 369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * and Flash memory in power-down when the device is in Stop under-drive mode 370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * and Flash memory in power-down when the device is in Stop under-drive mode 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction. 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction 375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction 376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None 377:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry) 379:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 607 .loc 1 379 1 is_stmt 1 view -0 608 .cfi_startproc 609 @ args = 0, pretend = 0, frame = 8 610 @ frame_needed = 0, uses_anonymous_args = 0 611 .loc 1 379 1 is_stmt 0 view .LVU139 612 0000 70B5 push {r4, r5, r6, lr} 613 .LCFI10: 614 .cfi_def_cfa_offset 16 615 .cfi_offset 4, -16 616 .cfi_offset 5, -12 617 .cfi_offset 6, -8 618 .cfi_offset 14, -4 619 0002 82B0 sub sp, sp, #8 620 .LCFI11: 621 .cfi_def_cfa_offset 24 622 0004 0646 mov r6, r0 623 0006 0D46 mov r5, r1 380:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tempreg = 0; 624 .loc 1 380 3 is_stmt 1 view .LVU140 625 .LVL27: 381:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0; 626 .loc 1 381 3 view .LVU141 382:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Check the parameters */ 384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator)); 627 .loc 1 384 3 view .LVU142 385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); 628 .loc 1 385 3 view .LVU143 386:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Power ctrl clock */ 388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 629 .loc 1 388 3 view .LVU144 630 .LBB4: 631 .loc 1 388 3 view .LVU145 632 .loc 1 388 3 view .LVU146 633 0008 1E4B ldr r3, .L73 634 000a 1A6C ldr r2, [r3, #64] 635 000c 42F08052 orr r2, r2, #268435456 ARM GAS /tmp/ccuaURzG.s page 19 636 0010 1A64 str r2, [r3, #64] 637 .loc 1 388 3 view .LVU147 638 0012 1B6C ldr r3, [r3, #64] 639 0014 03F08053 and r3, r3, #268435456 640 0018 0193 str r3, [sp, #4] 641 .loc 1 388 3 view .LVU148 642 001a 019B ldr r3, [sp, #4] 643 .LBE4: 644 .loc 1 388 3 view .LVU149 389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Under-drive Mode ---------------------------------------------*/ 390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Clear Under-drive flag */ 391:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_CLEAR_ODRUDR_FLAG(); 645 .loc 1 391 3 view .LVU150 646 001c 1A4B ldr r3, .L73+4 647 001e 5968 ldr r1, [r3, #4] 648 .LVL28: 649 .loc 1 391 3 is_stmt 0 view .LVU151 650 0020 1A4A ldr r2, .L73+8 651 0022 0A43 orrs r2, r2, r1 652 0024 5A60 str r2, [r3, #4] 392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the Under-drive */ 394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_UNDERDRIVE_ENABLE(); 653 .loc 1 394 3 is_stmt 1 view .LVU152 654 0026 1A68 ldr r2, [r3] 655 0028 42F44022 orr r2, r2, #786432 656 002c 1A60 str r2, [r3] 395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 657 .loc 1 397 3 view .LVU153 658 .loc 1 397 15 is_stmt 0 view .LVU154 659 002e FFF7FEFF bl HAL_GetTick 660 .LVL29: 661 .loc 1 397 15 view .LVU155 662 0032 0446 mov r4, r0 663 .LVL30: 398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait for UnderDrive mode is ready */ 400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY)) 664 .loc 1 400 3 is_stmt 1 view .LVU156 665 .L64: 666 .loc 1 400 9 view .LVU157 667 0034 144B ldr r3, .L73+4 668 0036 5B68 ldr r3, [r3, #4] 669 0038 03F44023 and r3, r3, #786432 670 003c B3F5402F cmp r3, #786432 671 0040 07D1 bne .L71 401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_UDERDRIVE_TIMEOUT_VALUE) 672 .loc 1 402 5 view .LVU158 673 .loc 1 402 9 is_stmt 0 view .LVU159 674 0042 FFF7FEFF bl HAL_GetTick 675 .LVL31: 676 .loc 1 402 23 discriminator 1 view .LVU160 677 0046 001B subs r0, r0, r4 678 .loc 1 402 7 discriminator 1 view .LVU161 ARM GAS /tmp/ccuaURzG.s page 20 679 0048 B0F57A7F cmp r0, #1000 680 004c F2D9 bls .L64 403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 681 .loc 1 404 14 view .LVU162 682 004e 0320 movs r0, #3 683 0050 13E0 b .L65 684 .L71: 405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 406:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 407:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Select the regulator state in STOP mode ---------------------------------*/ 409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tempreg = PWR->CR1; 685 .loc 1 409 3 is_stmt 1 view .LVU163 686 .loc 1 409 11 is_stmt 0 view .LVU164 687 0052 0D4A ldr r2, .L73+4 688 0054 1168 ldr r1, [r2] 689 .LVL32: 410:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */ 411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tempreg &= (uint32_t)~(PWR_CR1_PDDS | PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_MRUDS); 690 .loc 1 411 3 is_stmt 1 view .LVU165 691 .loc 1 411 11 is_stmt 0 view .LVU166 692 0056 0E4B ldr r3, .L73+12 693 0058 0B40 ands r3, r3, r1 694 .LVL33: 412:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */ 414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tempreg |= Regulator; 695 .loc 1 414 3 is_stmt 1 view .LVU167 696 .loc 1 414 11 is_stmt 0 view .LVU168 697 005a 3343 orrs r3, r3, r6 698 .LVL34: 415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Store the new value */ 417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** PWR->CR1 = tempreg; 699 .loc 1 417 3 is_stmt 1 view .LVU169 700 .loc 1 417 12 is_stmt 0 view .LVU170 701 005c 1360 str r3, [r2] 418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ 420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; 702 .loc 1 420 3 is_stmt 1 view .LVU171 703 .loc 1 420 6 is_stmt 0 view .LVU172 704 005e 0D4A ldr r2, .L73+16 705 0060 1369 ldr r3, [r2, #16] 706 .LVL35: 707 .loc 1 420 12 view .LVU173 708 0062 43F00403 orr r3, r3, #4 709 0066 1361 str r3, [r2, #16] 710 .LVL36: 421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Select STOP mode entry --------------------------------------------------*/ 423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if(STOPEntry == PWR_SLEEPENTRY_WFI) 711 .loc 1 423 3 is_stmt 1 view .LVU174 712 .loc 1 423 5 is_stmt 0 view .LVU175 713 0068 012D cmp r5, #1 714 006a 08D0 beq .L72 ARM GAS /tmp/ccuaURzG.s page 21 424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */ 426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __WFI(); 427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** else 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Request Wait For Event */ 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __WFE(); 715 .loc 1 431 5 is_stmt 1 view .LVU176 716 .syntax unified 717 @ 431 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c" 1 718 006c 20BF wfe 719 @ 0 "" 2 720 .thumb 721 .syntax unified 722 .L68: 432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 433:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ 434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); 723 .loc 1 434 3 view .LVU177 724 .loc 1 434 6 is_stmt 0 view .LVU178 725 006e 094A ldr r2, .L73+16 726 0070 1369 ldr r3, [r2, #16] 727 .loc 1 434 12 view .LVU179 728 0072 23F00403 bic r3, r3, #4 729 0076 1361 str r3, [r2, #16] 435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK; 730 .loc 1 436 3 is_stmt 1 view .LVU180 731 .loc 1 436 10 is_stmt 0 view .LVU181 732 0078 0020 movs r0, #0 733 .LVL37: 734 .L65: 437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 735 .loc 1 437 1 view .LVU182 736 007a 02B0 add sp, sp, #8 737 .LCFI12: 738 .cfi_remember_state 739 .cfi_def_cfa_offset 16 740 @ sp needed 741 007c 70BD pop {r4, r5, r6, pc} 742 .LVL38: 743 .L72: 744 .LCFI13: 745 .cfi_restore_state 426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 746 .loc 1 426 5 is_stmt 1 view .LVU183 747 .syntax unified 748 @ 426 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c" 1 749 007e 30BF wfi 750 @ 0 "" 2 751 .thumb 752 .syntax unified 753 0080 F5E7 b .L68 754 .L74: 755 0082 00BF .align 2 756 .L73: ARM GAS /tmp/ccuaURzG.s page 22 757 0084 00380240 .word 1073887232 758 0088 00700040 .word 1073770496 759 008c 00010C00 .word 786688 760 0090 FCF3FFFF .word -3076 761 0094 00ED00E0 .word -536810240 762 .cfi_endproc 763 .LFE151: 765 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits 766 .align 1 767 .global HAL_PWREx_GetVoltageRange 768 .syntax unified 769 .thumb 770 .thumb_func 772 HAL_PWREx_GetVoltageRange: 773 .LFB152: 438:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 439:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Returns Voltage Scaling Range. 441:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1, PWR_REGULATOR_VOLTAGE_SCALE2 or 442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * PWR_REGULATOR_VOLTAGE_SCALE3)PWR_REGULATOR_VOLTAGE_SCALE1 443:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void) 445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 774 .loc 1 445 1 view -0 775 .cfi_startproc 776 @ args = 0, pretend = 0, frame = 0 777 @ frame_needed = 0, uses_anonymous_args = 0 778 @ link register save eliminated. 446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return (PWR->CR1 & PWR_CR1_VOS); 779 .loc 1 446 3 view .LVU185 780 .loc 1 446 15 is_stmt 0 view .LVU186 781 0000 024B ldr r3, .L76 782 0002 1868 ldr r0, [r3] 447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 783 .loc 1 447 1 view .LVU187 784 0004 00F44040 and r0, r0, #49152 785 0008 7047 bx lr 786 .L77: 787 000a 00BF .align 2 788 .L76: 789 000c 00700040 .word 1073770496 790 .cfi_endproc 791 .LFE152: 793 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits 794 .align 1 795 .global HAL_PWREx_ControlVoltageScaling 796 .syntax unified 797 .thumb 798 .thumb_func 800 HAL_PWREx_ControlVoltageScaling: 801 .LVL39: 802 .LFB153: 448:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage. 451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve 452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption. ARM GAS /tmp/ccuaURzG.s page 23 453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, 455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * typical output voltage at 1.4 V, 456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * system frequency up to 216 MHz. 457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, 458:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * typical output voltage at 1.2 V, 459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * system frequency up to 180 MHz. 460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 2 mode, 461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * typical output voltage at 1.00 V, 462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * system frequency up to 151 MHz. 463:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note To update the system clock frequency(SYSCLK): 464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig(). 465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Call the HAL_RCC_OscConfig() to configure the PLL. 466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale. 467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - Set the new system clock frequency using the HAL_RCC_ClockConfig(). 468:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note The scale can be modified only when the HSI or HSE clock source is selected 469:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * as system clock source, otherwise the API returns HAL_ERROR. 470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits 471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * value in the PWR_CR1 register are not taken in account. 472:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 473:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note The new voltage scale is active only when the PLL is ON. 474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval HAL Status 475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** */ 476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) 477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 803 .loc 1 477 1 is_stmt 1 view -0 804 .cfi_startproc 805 @ args = 0, pretend = 0, frame = 8 806 @ frame_needed = 0, uses_anonymous_args = 0 807 .loc 1 477 1 is_stmt 0 view .LVU189 808 0000 30B5 push {r4, r5, lr} 809 .LCFI14: 810 .cfi_def_cfa_offset 12 811 .cfi_offset 4, -12 812 .cfi_offset 5, -8 813 .cfi_offset 14, -4 814 0002 83B0 sub sp, sp, #12 815 .LCFI15: 816 .cfi_def_cfa_offset 24 478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0; 817 .loc 1 478 3 is_stmt 1 view .LVU190 818 .LVL40: 479:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** assert_param(IS_PWR_REGULATOR_VOLTAGE(VoltageScaling)); 819 .loc 1 480 3 view .LVU191 481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable Power ctrl clock */ 483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 820 .loc 1 483 3 view .LVU192 821 .LBB5: 822 .loc 1 483 3 view .LVU193 823 .loc 1 483 3 view .LVU194 824 0004 2C4B ldr r3, .L94 825 0006 1A6C ldr r2, [r3, #64] 826 0008 42F08052 orr r2, r2, #268435456 827 000c 1A64 str r2, [r3, #64] 828 .loc 1 483 3 view .LVU195 ARM GAS /tmp/ccuaURzG.s page 24 829 000e 1A6C ldr r2, [r3, #64] 830 0010 02F08052 and r2, r2, #268435456 831 0014 0092 str r2, [sp] 832 .loc 1 483 3 view .LVU196 833 0016 009A ldr r2, [sp] 834 .LBE5: 835 .loc 1 483 3 view .LVU197 484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Check if the PLL is used as system clock or not */ 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 836 .loc 1 486 3 view .LVU198 837 .loc 1 486 6 is_stmt 0 view .LVU199 838 0018 9B68 ldr r3, [r3, #8] 839 001a 03F00C03 and r3, r3, #12 840 .loc 1 486 5 view .LVU200 841 001e 082B cmp r3, #8 842 0020 46D0 beq .L86 843 0022 0546 mov r5, r0 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Disable the main PLL */ 489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PLL_DISABLE(); 844 .loc 1 489 5 is_stmt 1 view .LVU201 845 0024 244A ldr r2, .L94 846 0026 1368 ldr r3, [r2] 847 0028 23F08073 bic r3, r3, #16777216 848 002c 1360 str r3, [r2] 490:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get Start Tick */ 492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 849 .loc 1 492 5 view .LVU202 850 .loc 1 492 17 is_stmt 0 view .LVU203 851 002e FFF7FEFF bl HAL_GetTick 852 .LVL41: 853 .loc 1 492 17 view .LVU204 854 0032 0446 mov r4, r0 855 .LVL42: 493:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till PLL is disabled */ 494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 856 .loc 1 494 5 is_stmt 1 view .LVU205 857 .L80: 858 .loc 1 494 47 view .LVU206 859 .loc 1 494 11 is_stmt 0 view .LVU207 860 0034 204B ldr r3, .L94 861 0036 1B68 ldr r3, [r3] 862 .loc 1 494 47 view .LVU208 863 0038 13F0007F tst r3, #33554432 864 003c 06D0 beq .L91 495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 865 .loc 1 496 7 is_stmt 1 view .LVU209 866 .loc 1 496 11 is_stmt 0 view .LVU210 867 003e FFF7FEFF bl HAL_GetTick 868 .LVL43: 869 .loc 1 496 25 discriminator 1 view .LVU211 870 0042 031B subs r3, r0, r4 871 .loc 1 496 9 discriminator 1 view .LVU212 872 0044 022B cmp r3, #2 ARM GAS /tmp/ccuaURzG.s page 25 873 0046 F5D9 bls .L80 497:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 498:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 874 .loc 1 498 16 view .LVU213 875 0048 0320 movs r0, #3 876 004a 32E0 b .L79 877 .L91: 499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Set Range */ 503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); 878 .loc 1 503 5 is_stmt 1 view .LVU214 879 .LBB6: 880 .loc 1 503 5 view .LVU215 881 .loc 1 503 5 view .LVU216 882 004c 1B4A ldr r2, .L94+4 883 004e 1368 ldr r3, [r2] 884 0050 23F44043 bic r3, r3, #49152 885 0054 2B43 orrs r3, r3, r5 886 0056 1360 str r3, [r2] 887 .loc 1 503 5 view .LVU217 888 0058 1368 ldr r3, [r2] 889 005a 03F44043 and r3, r3, #49152 890 005e 0193 str r3, [sp, #4] 891 .loc 1 503 5 view .LVU218 892 0060 019B ldr r3, [sp, #4] 893 .LBE6: 894 .loc 1 503 5 view .LVU219 504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 505:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Enable the main PLL */ 506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PLL_ENABLE(); 895 .loc 1 506 5 view .LVU220 896 0062 02F5E432 add r2, r2, #116736 897 0066 1368 ldr r3, [r2] 898 0068 43F08073 orr r3, r3, #16777216 899 006c 1360 str r3, [r2] 507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get Start Tick */ 509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 900 .loc 1 509 5 view .LVU221 901 .loc 1 509 17 is_stmt 0 view .LVU222 902 006e FFF7FEFF bl HAL_GetTick 903 .LVL44: 904 0072 0446 mov r4, r0 905 .LVL45: 510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Wait till PLL is ready */ 511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 906 .loc 1 511 5 is_stmt 1 view .LVU223 907 .L82: 908 .loc 1 511 47 view .LVU224 909 .loc 1 511 11 is_stmt 0 view .LVU225 910 0074 104B ldr r3, .L94 911 0076 1B68 ldr r3, [r3] 912 .loc 1 511 47 view .LVU226 913 0078 13F0007F tst r3, #33554432 914 007c 06D1 bne .L92 ARM GAS /tmp/ccuaURzG.s page 26 512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 915 .loc 1 513 7 is_stmt 1 view .LVU227 916 .loc 1 513 11 is_stmt 0 view .LVU228 917 007e FFF7FEFF bl HAL_GetTick 918 .LVL46: 919 .loc 1 513 25 discriminator 1 view .LVU229 920 0082 001B subs r0, r0, r4 921 .loc 1 513 9 discriminator 1 view .LVU230 922 0084 0228 cmp r0, #2 923 0086 F5D9 bls .L82 514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 924 .loc 1 515 16 view .LVU231 925 0088 0320 movs r0, #3 926 008a 12E0 b .L79 927 .L92: 516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get Start Tick */ 520:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 928 .loc 1 520 5 is_stmt 1 view .LVU232 929 .loc 1 520 17 is_stmt 0 view .LVU233 930 008c FFF7FEFF bl HAL_GetTick 931 .LVL47: 932 0090 0446 mov r4, r0 933 .LVL48: 521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) 934 .loc 1 521 5 is_stmt 1 view .LVU234 935 .L84: 936 .loc 1 521 48 view .LVU235 937 .loc 1 521 12 is_stmt 0 view .LVU236 938 0092 0A4B ldr r3, .L94+4 939 0094 5B68 ldr r3, [r3, #4] 940 .loc 1 521 48 view .LVU237 941 0096 13F4804F tst r3, #16384 942 009a 07D1 bne .L93 522:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 523:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) 943 .loc 1 523 7 is_stmt 1 view .LVU238 944 .loc 1 523 11 is_stmt 0 view .LVU239 945 009c FFF7FEFF bl HAL_GetTick 946 .LVL49: 947 .loc 1 523 25 discriminator 1 view .LVU240 948 00a0 001B subs r0, r0, r4 949 .loc 1 523 9 discriminator 1 view .LVU241 950 00a2 B0F57A7F cmp r0, #1000 951 00a6 F4D9 bls .L84 524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 952 .loc 1 525 16 view .LVU242 953 00a8 0320 movs r0, #3 954 00aa 02E0 b .L79 955 .L93: 526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } ARM GAS /tmp/ccuaURzG.s page 27 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** else 530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_ERROR; 532:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_OK; 956 .loc 1 533 10 view .LVU243 957 00ac 0020 movs r0, #0 958 00ae 00E0 b .L79 959 .LVL50: 960 .L86: 531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 961 .loc 1 531 12 view .LVU244 962 00b0 0120 movs r0, #1 963 .LVL51: 964 .L79: 534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 965 .loc 1 534 1 view .LVU245 966 00b2 03B0 add sp, sp, #12 967 .LCFI16: 968 .cfi_def_cfa_offset 12 969 @ sp needed 970 00b4 30BD pop {r4, r5, pc} 971 .L95: 972 00b6 00BF .align 2 973 .L94: 974 00b8 00380240 .word 1073887232 975 00bc 00700040 .word 1073770496 976 .cfi_endproc 977 .LFE153: 979 .text 980 .Letext0: 981 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 982 .file 3 "Drivers/CMSIS/Include/core_cm7.h" 983 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 984 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" 985 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 986 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" ARM GAS /tmp/ccuaURzG.s page 28 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_pwr_ex.c /tmp/ccuaURzG.s:20 .text.HAL_PWREx_EnableBkUpReg:00000000 $t /tmp/ccuaURzG.s:26 .text.HAL_PWREx_EnableBkUpReg:00000000 HAL_PWREx_EnableBkUpReg /tmp/ccuaURzG.s:90 .text.HAL_PWREx_EnableBkUpReg:00000038 $d /tmp/ccuaURzG.s:95 .text.HAL_PWREx_DisableBkUpReg:00000000 $t /tmp/ccuaURzG.s:101 .text.HAL_PWREx_DisableBkUpReg:00000000 HAL_PWREx_DisableBkUpReg /tmp/ccuaURzG.s:165 .text.HAL_PWREx_DisableBkUpReg:00000038 $d /tmp/ccuaURzG.s:170 .text.HAL_PWREx_EnableFlashPowerDown:00000000 $t /tmp/ccuaURzG.s:176 .text.HAL_PWREx_EnableFlashPowerDown:00000000 HAL_PWREx_EnableFlashPowerDown /tmp/ccuaURzG.s:195 .text.HAL_PWREx_EnableFlashPowerDown:0000000c $d /tmp/ccuaURzG.s:200 .text.HAL_PWREx_DisableFlashPowerDown:00000000 $t /tmp/ccuaURzG.s:206 .text.HAL_PWREx_DisableFlashPowerDown:00000000 HAL_PWREx_DisableFlashPowerDown /tmp/ccuaURzG.s:225 .text.HAL_PWREx_DisableFlashPowerDown:0000000c $d /tmp/ccuaURzG.s:230 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 $t /tmp/ccuaURzG.s:236 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 HAL_PWREx_EnableMainRegulatorLowVoltage /tmp/ccuaURzG.s:255 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:0000000c $d /tmp/ccuaURzG.s:260 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 $t /tmp/ccuaURzG.s:266 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 HAL_PWREx_DisableMainRegulatorLowVoltage /tmp/ccuaURzG.s:285 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:0000000c $d /tmp/ccuaURzG.s:290 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 $t /tmp/ccuaURzG.s:296 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 HAL_PWREx_EnableLowRegulatorLowVoltage /tmp/ccuaURzG.s:315 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:0000000c $d /tmp/ccuaURzG.s:320 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 $t /tmp/ccuaURzG.s:326 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 HAL_PWREx_DisableLowRegulatorLowVoltage /tmp/ccuaURzG.s:345 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:0000000c $d /tmp/ccuaURzG.s:350 .text.HAL_PWREx_EnableOverDrive:00000000 $t /tmp/ccuaURzG.s:356 .text.HAL_PWREx_EnableOverDrive:00000000 HAL_PWREx_EnableOverDrive /tmp/ccuaURzG.s:470 .text.HAL_PWREx_EnableOverDrive:00000074 $d /tmp/ccuaURzG.s:476 .text.HAL_PWREx_DisableOverDrive:00000000 $t /tmp/ccuaURzG.s:482 .text.HAL_PWREx_DisableOverDrive:00000000 HAL_PWREx_DisableOverDrive /tmp/ccuaURzG.s:592 .text.HAL_PWREx_DisableOverDrive:00000074 $d /tmp/ccuaURzG.s:598 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 $t /tmp/ccuaURzG.s:604 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 HAL_PWREx_EnterUnderDriveSTOPMode /tmp/ccuaURzG.s:757 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000084 $d /tmp/ccuaURzG.s:766 .text.HAL_PWREx_GetVoltageRange:00000000 $t /tmp/ccuaURzG.s:772 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange /tmp/ccuaURzG.s:789 .text.HAL_PWREx_GetVoltageRange:0000000c $d /tmp/ccuaURzG.s:794 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t /tmp/ccuaURzG.s:800 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling /tmp/ccuaURzG.s:974 .text.HAL_PWREx_ControlVoltageScaling:000000b8 $d UNDEFINED SYMBOLS HAL_GetTick