Now ADC clock freq is equal to Mach_Zander clock. ADC samples on rising and falling edges

Src/main.c

@@ -181,14 +181,26 @@ int main(void)
 	//TIM4 -> ARR = 60; // for 1.5 MHz
 	//TIM4 -> ARR = 91; // for 1 MHz
 	//TIM4 -> ARR = 45; // for 2 MHz
-	TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears.
+//	TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears.
+	TIM4 -> ARR = 100; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears.
 
 	TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
 
 
+	//for E502_ADC
+
 	//Mach-Zander clock (should be half of ADC clock freq)
-	TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1;
-	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+	//TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1;
+	//TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
+
+
+	// for stm_ADC
+
+	//Mach-Zander clock equal to ADC clock (adc triggers on rising and falling edges)
+	TIM11 -> ARR = TIM4 -> ARR;
+	TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; //duty 50%
+
+
 
 	/*
   if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){
@@ -398,6 +410,14 @@ int main(void)
 						//TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
 
 
+						//for stm_ADC
+						//TIM4 -- ADC clock. Rising edge -- for SYNC_DETector_ON
+						//TIM4 -- ADC clock. Falling edge -- for SYNC_DETector_OFF
+
+						//TIM4 freq is equal to TIM11
+						//TIM4 phase should be adjustable to get correct sampling moment
+
+
 
 						Set_LTEC(TT_CHANGE_CURR_2, task.curr);
 						(void) MPhD_T(TT_CHANGE_TEMP_1);