From db80907a0b2daaf2b31e1d230dbb81c25b0cc75d Mon Sep 17 00:00:00 2001 From: Ayzen Date: Wed, 18 Feb 2026 16:04:34 +0300 Subject: [PATCH] added dac support --- For_stm32.ioc | 15 +- Inc/main.h | 8 +- Src/main.c | 77 +- Src/stm32f7xx_it.c | 13 + build/File_Handling.lst | 262 +- build/For_stm32.bin | Bin 48356 -> 48676 bytes build/For_stm32.elf | Bin 757124 -> 758568 bytes build/For_stm32.hex | 5430 ++--- build/For_stm32.map | 2118 +- build/diskio.lst | 52 +- build/fatfs.lst | 34 +- build/ff.lst | 1070 +- build/ff_gen_drv.lst | 48 +- build/main.lst | 43574 +++++++++++++++++----------------- build/main.o | Bin 175860 -> 178364 bytes build/sd_diskio.lst | 66 +- build/stm32f7xx_hal_msp.lst | 142 +- build/stm32f7xx_it.lst | 3713 +-- build/stm32f7xx_it.o | Bin 28808 -> 28972 bytes build/syscall.lst | 4 +- 20 files changed, 28584 insertions(+), 28042 deletions(-) diff --git a/For_stm32.ioc b/For_stm32.ioc index e5cc3ee..c780cc4 100644 --- a/For_stm32.ioc +++ b/For_stm32.ioc @@ -170,8 +170,9 @@ Mcu.Pin82=PD12 Mcu.Pin83=PD13 Mcu.Pin84=PE2 Mcu.Pin85=PE3 +Mcu.Pin86=PE8 Mcu.Pin9=PH1/OSC_OUT -Mcu.PinsNb=86 +Mcu.PinsNb=87 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F767ZITx @@ -219,11 +220,10 @@ PA3.GPIOParameters=GPIO_Label PA3.GPIO_Label=REF2_ON PA3.Locked=true PA3.Signal=GPIO_Output -PA4.GPIOParameters=PinState,GPIO_Label -PA4.GPIO_Label=DAC_TEC2_CS +PA4.GPIOParameters=GPIO_Label +PA4.GPIO_Label=PA4_DAC_OUT PA4.Locked=true -PA4.PinState=GPIO_PIN_SET -PA4.Signal=GPIO_Output +PA4.Signal=DACx_OUT1 PA5.Locked=true PA5.Mode=TX_Only_Simplex_Unidirect_Master PA5.Signal=SPI6_SCK @@ -363,6 +363,11 @@ PE3.GPIO_Label=DS1809_DC PE3.Locked=true PE3.PinState=GPIO_PIN_SET PE3.Signal=GPIO_Output +PE8.GPIOParameters=PinState,GPIO_Label +PE8.GPIO_Label=DAC_TEC2_CS +PE8.Locked=true +PE8.PinState=GPIO_PIN_SET +PE8.Signal=GPIO_Output PE10.GPIOParameters=GPIO_Label PE10.GPIO_Label=ADC_MPD1_CS PE10.Locked=true diff --git a/Inc/main.h b/Inc/main.h index cce46c1..c8fe526 100644 --- a/Inc/main.h +++ b/Inc/main.h @@ -95,8 +95,8 @@ void Set_LTEC(uint8_t, uint16_t); #define TECEN2_GPIO_Port GPIOA #define REF2_ON_Pin GPIO_PIN_3 #define REF2_ON_GPIO_Port GPIOA -#define DAC_TEC2_CS_Pin GPIO_PIN_4 -#define DAC_TEC2_CS_GPIO_Port GPIOA +#define DAC_TEC2_CS_Pin GPIO_PIN_8 +#define DAC_TEC2_CS_GPIO_Port GPIOE #define DAC_LD2_CS_Pin GPIO_PIN_6 #define DAC_LD2_CS_GPIO_Port GPIOA #define LD2_EN_Pin GPIO_PIN_4 @@ -190,6 +190,7 @@ void Set_LTEC(uint8_t, uint16_t); #define AD9102_CMD 10 #define AD9833_CMD 11 #define DS1809_CMD 12 + #define STM32_DAC_CMD 13 #define SD_ERR 0x01 #define UART_ERR 0x02 @@ -215,6 +216,9 @@ void Set_LTEC(uint8_t, uint16_t); #define DS1809_CMD_HEADER 0xAAAA #define DS1809_CMD_8 10 // total bytes including header #define DS1809_CMD_WORDS 4 // data words (flags, count, pulse_ms, checksum) + #define STM32_DAC_CMD_HEADER 0xBBBB + #define STM32_DAC_CMD_8 10 // total bytes including header + #define STM32_DAC_CMD_WORDS 4 // data words (flags, dac_code, reserved, checksum) #define AD9102_ON_SPI2 1 diff --git a/Src/main.c b/Src/main.c index 9d8cf61..8e238d2 100644 --- a/Src/main.c +++ b/Src/main.c @@ -103,6 +103,8 @@ #define DS1809_FLAG_UC 0x0001u #define DS1809_FLAG_DC 0x0002u #define DS1809_PULSE_MS_DEFAULT 2u +#define STM32_DAC_FLAG_ENABLE 0x0001u +#define STM32_DAC_CODE_MAX 4095u /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ @@ -224,7 +226,9 @@ static void SPI2_SetMode(uint32_t polarity, uint32_t phase); static void AD9833_WriteWord(uint16_t word); static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word); static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms); -uint8_t CheckChecksum(uint16_t *pbuff); +static void PA4_DAC_Init(void); +static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable); +uint8_t CheckChecksum(uint16_t *pbuff); uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); //int SD_Init(void); int SD_SAVE(uint16_t *pbuff); @@ -291,6 +295,7 @@ int main(void) MX_TIM11_Init(); MX_TIM4_Init(); MX_TIM1_Init(); + PA4_DAC_Init(); /* USER CODE BEGIN 2 */ Init_params(); //HAL_TIM_Base_Start(&htim11); @@ -629,7 +634,22 @@ int main(void) UART_transmission_request = MESS_01; CPU_state = CPU_state_old; break; - case DECODE_TASK: + case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4) + if (CalculateChecksum(COMMAND, STM32_DAC_CMD_WORDS - 1) == COMMAND[STM32_DAC_CMD_WORDS - 1]) + { + uint16_t flags = COMMAND[0]; + uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu); + uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; + PA4_DAC_Set(dac_code, enable); + } + else + { + State_Data[0] |= UART_DECODE_ERR; + } + UART_transmission_request = MESS_01; + CPU_state = CPU_state_old; + break; + case DECODE_TASK: if (CheckChecksum(COMMAND)) { Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); @@ -2140,10 +2160,8 @@ static void MX_GPIO_Init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin - DAC_LD2_CS_Pin */ - GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin - |DAC_LD2_CS_Pin; + /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_LD2_CS_Pin */ + GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; @@ -2155,8 +2173,8 @@ static void MX_GPIO_Init(void) GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ - GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; + /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin DAC_TEC2_CS_Pin */ + GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin|DAC_TEC2_CS_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; @@ -2329,9 +2347,10 @@ static void Init_params(void) HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 - HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 DAC - HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 DAC + HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 DAC + HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 DAC + PA4_DAC_Set(0u, 0u); //------------------------------------------------------------------------------------------------------------------ //test = 11; @@ -2696,6 +2715,42 @@ static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word) AD9833_WriteWord(control); } +static void PA4_DAC_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + __HAL_RCC_DAC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + + GPIO_InitStruct.Pin = GPIO_PIN_4; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + // Keep channel disabled until a dedicated serial command enables it. + DAC->CR &= ~(DAC_CR_EN1 | DAC_CR_TEN1 | DAC_CR_DMAEN1); + DAC->DHR12R1 = 0u; +} + +static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable) +{ + if (dac_code > STM32_DAC_CODE_MAX) + { + dac_code = STM32_DAC_CODE_MAX; + } + + DAC->DHR12R1 = dac_code; + + if (enable) + { + DAC->CR |= DAC_CR_EN1; + } + else + { + DAC->CR &= ~DAC_CR_EN1; + } +} + static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms) { for (uint16_t i = 0; i < count; i++) diff --git a/Src/stm32f7xx_it.c b/Src/stm32f7xx_it.c index 3a7b5fc..6c91121 100644 --- a/Src/stm32f7xx_it.c +++ b/Src/stm32f7xx_it.c @@ -487,6 +487,9 @@ void UART_RxCpltCallback(void) case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command UART_rec_incr = 2;//timeout flag is still setting! break; + case STM32_DAC_CMD_HEADER: // STM32 internal DAC command + UART_rec_incr = 2;//timeout flag is still setting! + break; default: //error decoding header UART_rec_incr = 0; flg_tmt = 0;//Reset the timeout flag @@ -529,6 +532,16 @@ void UART_RxCpltCallback(void) UART_rec_incr = 0; flg_tmt = 0;//Reset the timeout flag } + else if (UART_header == STM32_DAC_CMD_HEADER) + { + if ((UART_rec_incr & 0x0001) > 0) + COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + else + COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + CPU_state = STM32_DAC_CMD; + UART_rec_incr = 0; + flg_tmt = 0;//Reset the timeout flag + } else { if ((UART_rec_incr&0x0001)>0) diff --git a/build/File_Handling.lst b/build/File_Handling.lst index 0e4e51f..4d089ec 100644 --- a/build/File_Handling.lst +++ b/build/File_Handling.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc6OCjXR.s page 1 +ARM GAS /tmp/ccwVm8tx.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 28:Src/File_Handling.c **** 29:Src/File_Handling.c **** 30:Src/File_Handling.c **** void Send_Uart (char *string) - ARM GAS /tmp/cc6OCjXR.s page 2 + ARM GAS /tmp/ccwVm8tx.s page 2 31:Src/File_Handling.c **** { @@ -118,7 +118,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 75 0012 0120 movs r0, #1 76 .L2: 41:Src/File_Handling.c **** else return 0; - ARM GAS /tmp/cc6OCjXR.s page 3 + ARM GAS /tmp/ccwVm8tx.s page 3 42:Src/File_Handling.c **** } @@ -178,7 +178,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n"); 126 .loc 1 48 9 view .LVU21 127 0012 0120 movs r0, #1 - ARM GAS /tmp/cc6OCjXR.s page 4 + ARM GAS /tmp/ccwVm8tx.s page 4 128 .L8: @@ -238,7 +238,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 171 .LCFI2: 172 .cfi_def_cfa_offset 16 173 .cfi_offset 4, -16 - ARM GAS /tmp/cc6OCjXR.s page 5 + ARM GAS /tmp/ccwVm8tx.s page 5 174 .cfi_offset 5, -12 @@ -298,7 +298,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char)); 70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname); 71:Src/File_Handling.c **** Send_Uart(buf); - ARM GAS /tmp/cc6OCjXR.s page 6 + ARM GAS /tmp/ccwVm8tx.s page 6 72:Src/File_Handling.c **** free(buf); @@ -358,7 +358,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 247 .loc 1 65 46 discriminator 1 view .LVU49 248 004c 1D4B ldr r3, .L21+12 249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2 - ARM GAS /tmp/cc6OCjXR.s page 7 + ARM GAS /tmp/ccwVm8tx.s page 7 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */ @@ -418,7 +418,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 290 0082 FFF7FEFF bl strlen 291 .LVL24: 292 0086 0546 mov r5, r0 - ARM GAS /tmp/cc6OCjXR.s page 8 + ARM GAS /tmp/ccwVm8tx.s page 8 293 .LVL25: @@ -478,7 +478,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 331 .loc 1 91 1 is_stmt 0 view .LVU76 332 00b0 014B ldr r3, .L21 333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2 - ARM GAS /tmp/cc6OCjXR.s page 9 + ARM GAS /tmp/ccwVm8tx.s page 9 334 00b4 0CB0 add sp, sp, #48 @@ -538,7 +538,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 384 .LVL33: 385 000a 0446 mov r4, r0 386 .LVL34: - ARM GAS /tmp/cc6OCjXR.s page 10 + ARM GAS /tmp/ccwVm8tx.s page 10 98:Src/File_Handling.c **** sprintf (path, "%s","/"); @@ -598,7 +598,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 420 002e 6846 mov r0, sp 421 0030 FFF7FEFF bl f_readdir 422 .LVL38: - ARM GAS /tmp/cc6OCjXR.s page 11 + ARM GAS /tmp/ccwVm8tx.s page 11 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */ @@ -658,7 +658,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 461 .L26: 116:Src/File_Handling.c **** } 117:Src/File_Handling.c **** } - ARM GAS /tmp/cc6OCjXR.s page 12 + ARM GAS /tmp/ccwVm8tx.s page 12 118:Src/File_Handling.c **** f_closedir(&dir); @@ -718,7 +718,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 507 .loc 1 128 1 is_stmt 0 view .LVU117 508 0000 70B5 push {r4, r5, r6, lr} 509 .LCFI8: - ARM GAS /tmp/cc6OCjXR.s page 13 + ARM GAS /tmp/ccwVm8tx.s page 13 510 .cfi_def_cfa_offset 16 @@ -778,7 +778,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 153:Src/File_Handling.c **** 154:Src/File_Handling.c **** else 155:Src/File_Handling.c **** { - ARM GAS /tmp/cc6OCjXR.s page 14 + ARM GAS /tmp/ccwVm8tx.s page 14 156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw); @@ -838,7 +838,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 150:Src/File_Handling.c **** return fresult; 559 .loc 1 150 10 view .LVU136 151:Src/File_Handling.c **** } - ARM GAS /tmp/cc6OCjXR.s page 15 + ARM GAS /tmp/ccwVm8tx.s page 15 560 .loc 1 151 10 view .LVU137 @@ -898,7 +898,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 182:Src/File_Handling.c **** } 598 .loc 1 182 13 is_stmt 0 view .LVU154 599 004a C0B2 uxtb r0, r0 - ARM GAS /tmp/cc6OCjXR.s page 16 + ARM GAS /tmp/ccwVm8tx.s page 16 600 004c E2E7 b .L34 @@ -958,7 +958,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 649 .loc 1 191 5 is_stmt 0 view .LVU162 650 0012 08B1 cbz r0, .L40 651 .LBB6: - ARM GAS /tmp/cc6OCjXR.s page 17 + ARM GAS /tmp/ccwVm8tx.s page 17 192:Src/File_Handling.c **** { @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 237:Src/File_Handling.c **** //Send_Uart(buf); 238:Src/File_Handling.c **** free(buf); 239:Src/File_Handling.c **** } - ARM GAS /tmp/cc6OCjXR.s page 18 + ARM GAS /tmp/ccwVm8tx.s page 18 240:Src/File_Handling.c **** } @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 215:Src/File_Handling.c **** if (fresult != FR_OK) 699 .loc 1 215 15 discriminator 1 view .LVU181 700 003c 2070 strb r0, [r4] - ARM GAS /tmp/cc6OCjXR.s page 19 + ARM GAS /tmp/ccwVm8tx.s page 19 216:Src/File_Handling.c **** { @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000" 737 52212121 737 204E6F2E - ARM GAS /tmp/cc6OCjXR.s page 20 + ARM GAS /tmp/ccwVm8tx.s page 20 737 20256420 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 777 000e B8B9 cbnz r0, .L54 778 .LBB8: 250:Src/File_Handling.c **** { - ARM GAS /tmp/cc6OCjXR.s page 21 + ARM GAS /tmp/ccwVm8tx.s page 21 251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 814 003a 2B4B ldr r3, .L55+4 815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2 816 003e 0CE0 b .L48 - ARM GAS /tmp/cc6OCjXR.s page 22 + ARM GAS /tmp/ccwVm8tx.s page 22 817 .LVL70: @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 285:Src/File_Handling.c **** 286:Src/File_Handling.c **** else 287:Src/File_Handling.c **** { - ARM GAS /tmp/cc6OCjXR.s page 23 + ARM GAS /tmp/ccwVm8tx.s page 23 288:Src/File_Handling.c **** Send_Uart(buffer); @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 277:Src/File_Handling.c **** { 873 .loc 1 277 3 is_stmt 1 view .LVU228 277:Src/File_Handling.c **** { - ARM GAS /tmp/cc6OCjXR.s page 24 + ARM GAS /tmp/ccwVm8tx.s page 24 874 .loc 1 277 6 is_stmt 0 view .LVU229 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 916 00a0 FFF7FEFF bl free 917 .LVL88: 292:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/cc6OCjXR.s page 25 + ARM GAS /tmp/ccwVm8tx.s page 25 918 .loc 1 292 4 view .LVU242 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 961 .LVL97: 303:Src/File_Handling.c **** Send_Uart(buf); 962 .loc 1 303 5 is_stmt 1 view .LVU254 - ARM GAS /tmp/cc6OCjXR.s page 26 + ARM GAS /tmp/ccwVm8tx.s page 26 963 00d4 2246 mov r2, r4 @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1010 .LCFI11: 1011 .cfi_def_cfa_offset 24 1012 .cfi_offset 4, -24 - ARM GAS /tmp/cc6OCjXR.s page 27 + ARM GAS /tmp/ccwVm8tx.s page 27 1013 .cfi_offset 5, -20 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name); 334:Src/File_Handling.c **** //Send_Uart(buf); - ARM GAS /tmp/cc6OCjXR.s page 28 + ARM GAS /tmp/ccwVm8tx.s page 28 335:Src/File_Handling.c **** free(buf); @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1086 .LBE15: 1087 .LBB16: 318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name); - ARM GAS /tmp/cc6OCjXR.s page 29 + ARM GAS /tmp/ccwVm8tx.s page 29 1088 .loc 1 318 3 is_stmt 1 view .LVU282 @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 376:Src/File_Handling.c **** 377:Src/File_Handling.c **** /* Close file */ 378:Src/File_Handling.c **** fresult = f_close(&fil); - ARM GAS /tmp/cc6OCjXR.s page 30 + ARM GAS /tmp/ccwVm8tx.s page 30 379:Src/File_Handling.c **** if (fresult != FR_OK) @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1141 .loc 1 336 14 view .LVU296 1142 .LBE17: 353:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/cc6OCjXR.s page 31 + ARM GAS /tmp/ccwVm8tx.s page 31 1143 .loc 1 353 3 is_stmt 1 view .LVU297 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1180 00b6 BA70 strb r2, [r7, #2] 374:Src/File_Handling.c **** } 1181 .loc 1 374 5 is_stmt 1 view .LVU315 - ARM GAS /tmp/cc6OCjXR.s page 32 + ARM GAS /tmp/ccwVm8tx.s page 32 374:Src/File_Handling.c **** } @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1222 .loc 1 394 13 is_stmt 0 view .LVU329 1223 00e2 0F4B ldr r3, .L70+4 1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2 - ARM GAS /tmp/cc6OCjXR.s page 33 + ARM GAS /tmp/ccwVm8tx.s page 33 1225 00e6 C2E7 b .L59 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1271 011c 00000000 .word fno 1272 0120 00000000 .word fresult 1273 0124 00000000 .word fil - ARM GAS /tmp/cc6OCjXR.s page 34 + ARM GAS /tmp/ccwVm8tx.s page 34 1274 0128 00000000 .word .LC10 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1320 .loc 1 406 3 view .LVU346 407:Src/File_Handling.c **** return fresult; 1321 .loc 1 407 6 view .LVU347 - ARM GAS /tmp/cc6OCjXR.s page 35 + ARM GAS /tmp/ccwVm8tx.s page 35 1322 .loc 1 407 13 is_stmt 0 view .LVU348 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1336 .LVL141: 411:Src/File_Handling.c **** if (fresult != FR_OK) 1337 .loc 1 411 11 discriminator 1 view .LVU352 - ARM GAS /tmp/cc6OCjXR.s page 36 + ARM GAS /tmp/ccwVm8tx.s page 36 1338 001e 074B ldr r3, .L77+4 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1376 .LFE1195: 1378 .section .text.Update_File,"ax",%progbits 1379 .align 1 - ARM GAS /tmp/cc6OCjXR.s page 37 + ARM GAS /tmp/ccwVm8tx.s page 37 1380 .global Update_File @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1423 .loc 1 457 13 view .LVU381 1424 .LBE23: 458:Src/File_Handling.c **** } - ARM GAS /tmp/cc6OCjXR.s page 38 + ARM GAS /tmp/ccwVm8tx.s page 38 459:Src/File_Handling.c **** @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1428 .L80: 463:Src/File_Handling.c **** if (fresult != FR_OK) 1429 .loc 1 463 6 is_stmt 1 view .LVU383 - ARM GAS /tmp/cc6OCjXR.s page 39 + ARM GAS /tmp/ccwVm8tx.s page 39 463:Src/File_Handling.c **** if (fresult != FR_OK) @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name); 1470 .loc 1 485 7 view .LVU398 488:Src/File_Handling.c **** } - ARM GAS /tmp/cc6OCjXR.s page 40 + ARM GAS /tmp/ccwVm8tx.s page 40 1471 .loc 1 488 7 view .LVU399 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1506 .section .text.Remove_File,"ax",%progbits 1507 .align 1 1508 .global Remove_File - ARM GAS /tmp/cc6OCjXR.s page 41 + ARM GAS /tmp/ccwVm8tx.s page 41 1509 .syntax unified @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1547 0018 164B ldr r3, .L93+4 1548 001a 1870 strb r0, [r3] 527:Src/File_Handling.c **** if (fresult == FR_OK) - ARM GAS /tmp/cc6OCjXR.s page 42 + ARM GAS /tmp/ccwVm8tx.s page 42 1549 .loc 1 527 3 is_stmt 1 view .LVU418 @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1584 .loc 1 517 15 is_stmt 0 view .LVU430 1585 003a 6420 movs r0, #100 1586 003c FFF7FEFF bl malloc - ARM GAS /tmp/cc6OCjXR.s page 43 + ARM GAS /tmp/ccwVm8tx.s page 43 1587 .LVL161: @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1630 .align 2 1631 .L93: 1632 0070 00000000 .word fno - ARM GAS /tmp/cc6OCjXR.s page 44 + ARM GAS /tmp/ccwVm8tx.s page 44 1633 0074 00000000 .word fresult @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1677 000a 1870 strb r0, [r3] 549:Src/File_Handling.c **** if (fresult == FR_OK) 1678 .loc 1 549 5 is_stmt 1 view .LVU447 - ARM GAS /tmp/cc6OCjXR.s page 45 + ARM GAS /tmp/ccwVm8tx.s page 45 1679 .loc 1 549 8 is_stmt 0 view .LVU448 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1716 .LVL177: 1717 0032 0646 mov r6, r0 1718 .LVL178: - ARM GAS /tmp/cc6OCjXR.s page 46 + ARM GAS /tmp/ccwVm8tx.s page 46 559:Src/File_Handling.c **** Send_Uart(buf); @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1761 .cfi_startproc 1762 @ args = 0, pretend = 0, frame = 0 1763 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/cc6OCjXR.s page 47 + ARM GAS /tmp/ccwVm8tx.s page 47 1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr} @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1813 .LVL183: 573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total); 1814 .loc 1 573 5 is_stmt 1 view .LVU475 - ARM GAS /tmp/cc6OCjXR.s page 48 + ARM GAS /tmp/ccwVm8tx.s page 48 1815 0046 2246 mov r2, r4 @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1861 .cfi_restore 80 1862 .cfi_restore 81 1863 .cfi_def_cfa_offset 24 - ARM GAS /tmp/cc6OCjXR.s page 49 + ARM GAS /tmp/ccwVm8tx.s page 49 1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc} @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1915 000e 104B ldr r3, .L110+4 1916 0010 1870 strb r0, [r3] 587:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/cc6OCjXR.s page 50 + ARM GAS /tmp/ccwVm8tx.s page 50 1917 .loc 1 587 2 is_stmt 1 view .LVU497 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 629:Src/File_Handling.c **** if (fresult != FR_OK) 630:Src/File_Handling.c **** { 631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); - ARM GAS /tmp/cc6OCjXR.s page 51 + ARM GAS /tmp/ccwVm8tx.s page 51 632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name); @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 1959 002e 0A4B ldr r3, .L110+12 1960 0030 3246 mov r2, r6 1961 0032 2946 mov r1, r5 - ARM GAS /tmp/cc6OCjXR.s page 52 + ARM GAS /tmp/ccwVm8tx.s page 52 1962 0034 3846 mov r0, r7 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 2005 .LVL200: 2006 .LFB1201: 646:Src/File_Handling.c **** - ARM GAS /tmp/cc6OCjXR.s page 53 + ARM GAS /tmp/ccwVm8tx.s page 53 647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize) @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 661:Src/File_Handling.c **** { 662:Src/File_Handling.c **** /* Create a file with read write access and open it */ 663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE); - ARM GAS /tmp/cc6OCjXR.s page 54 + ARM GAS /tmp/ccwVm8tx.s page 54 664:Src/File_Handling.c **** if (fresult != FR_OK) @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 2053 0018 3222 movs r2, #50 2054 001a 2146 mov r1, r4 2055 001c 0D48 ldr r0, .L117+8 - ARM GAS /tmp/cc6OCjXR.s page 55 + ARM GAS /tmp/ccwVm8tx.s page 55 2056 001e FFF7FEFF bl f_open @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 2094 .LVL208: 692:Src/File_Handling.c **** if (fresult != FR_OK) 2095 .loc 1 692 14 discriminator 1 view .LVU561 - ARM GAS /tmp/cc6OCjXR.s page 56 + ARM GAS /tmp/ccwVm8tx.s page 56 2096 0044 2070 strb r0, [r4] @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc6OCjXR.s page 1 2158 .align 2 2161 fno: 2162 0000 00000000 .space 24 - ARM GAS /tmp/cc6OCjXR.s page 57 + ARM GAS /tmp/ccwVm8tx.s page 57 2162 00000000 @@ -3396,86 +3396,86 @@ ARM GAS /tmp/cc6OCjXR.s page 1 2187 .file 10 "/usr/include/newlib/stdio.h" 2188 .file 11 "/usr/include/newlib/stdlib.h" 2189 .file 12 "" - ARM GAS /tmp/cc6OCjXR.s page 58 + ARM GAS /tmp/ccwVm8tx.s page 58 DEFINED SYMBOLS *ABS*:00000000 File_Handling.c - /tmp/cc6OCjXR.s:20 .text.Send_Uart:00000000 $t - /tmp/cc6OCjXR.s:26 .text.Send_Uart:00000000 Send_Uart - /tmp/cc6OCjXR.s:40 .text.Mount_SD:00000000 $t - /tmp/cc6OCjXR.s:46 .text.Mount_SD:00000000 Mount_SD - /tmp/cc6OCjXR.s:86 .text.Mount_SD:0000001c $d - /tmp/cc6OCjXR.s:2175 .bss.fs:00000000 fs - /tmp/cc6OCjXR.s:92 .text.Unmount_SD:00000000 $t - /tmp/cc6OCjXR.s:98 .text.Unmount_SD:00000000 Unmount_SD - /tmp/cc6OCjXR.s:138 .text.Unmount_SD:0000001c $d - /tmp/cc6OCjXR.s:143 .rodata.Scan_SD.str1.4:00000000 $d - /tmp/cc6OCjXR.s:156 .text.Scan_SD:00000000 $t - /tmp/cc6OCjXR.s:162 .text.Scan_SD:00000000 Scan_SD - /tmp/cc6OCjXR.s:344 .text.Scan_SD:000000b8 $d - /tmp/cc6OCjXR.s:2161 .bss.fno:00000000 fno - /tmp/cc6OCjXR.s:355 .rodata.Format_SD.str1.4:00000000 $d - /tmp/cc6OCjXR.s:359 .text.Format_SD:00000000 $t - /tmp/cc6OCjXR.s:365 .text.Format_SD:00000000 Format_SD - /tmp/cc6OCjXR.s:485 .text.Format_SD:00000078 $d - /tmp/cc6OCjXR.s:494 .text.Write_File:00000000 $t - /tmp/cc6OCjXR.s:500 .text.Write_File:00000000 Write_File - /tmp/cc6OCjXR.s:604 .text.Write_File:00000050 $d - /tmp/cc6OCjXR.s:2168 .bss.fil:00000000 fil - /tmp/cc6OCjXR.s:2147 .bss.bw:00000000 bw - /tmp/cc6OCjXR.s:612 .text.Write_File_byte:00000000 $t - /tmp/cc6OCjXR.s:618 .text.Write_File_byte:00000000 Write_File_byte - /tmp/cc6OCjXR.s:721 .text.Write_File_byte:0000004c $d - /tmp/cc6OCjXR.s:729 .rodata.Read_File.str1.4:00000000 $d - /tmp/cc6OCjXR.s:745 .text.Read_File:00000000 $t - /tmp/cc6OCjXR.s:751 .text.Read_File:00000000 Read_File - /tmp/cc6OCjXR.s:976 .text.Read_File:000000e4 $d - /tmp/cc6OCjXR.s:2154 .bss.br:00000000 br - /tmp/cc6OCjXR.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d - /tmp/cc6OCjXR.s:995 .text.Seek_Read_File:00000000 $t - /tmp/cc6OCjXR.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File - /tmp/cc6OCjXR.s:1271 .text.Seek_Read_File:0000011c $d - /tmp/cc6OCjXR.s:1287 .text.Create_File:00000000 $t - /tmp/cc6OCjXR.s:1293 .text.Create_File:00000000 Create_File - /tmp/cc6OCjXR.s:1372 .text.Create_File:00000038 $d - /tmp/cc6OCjXR.s:1379 .text.Update_File:00000000 $t - /tmp/cc6OCjXR.s:1385 .text.Update_File:00000000 Update_File - /tmp/cc6OCjXR.s:1489 .text.Update_File:00000050 $d - /tmp/cc6OCjXR.s:1497 .rodata.Remove_File.str1.4:00000000 $d - /tmp/cc6OCjXR.s:1507 .text.Remove_File:00000000 $t - /tmp/cc6OCjXR.s:1513 .text.Remove_File:00000000 Remove_File - /tmp/cc6OCjXR.s:1632 .text.Remove_File:00000070 $d - /tmp/cc6OCjXR.s:1642 .rodata.Create_Dir.str1.4:00000000 $d - /tmp/cc6OCjXR.s:1649 .text.Create_Dir:00000000 $t - /tmp/cc6OCjXR.s:1655 .text.Create_Dir:00000000 Create_Dir - /tmp/cc6OCjXR.s:1734 .text.Create_Dir:00000048 $d - /tmp/cc6OCjXR.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d - /tmp/cc6OCjXR.s:1752 .text.Check_SD_Space:00000000 $t - /tmp/cc6OCjXR.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space - /tmp/cc6OCjXR.s:1870 .text.Check_SD_Space:00000094 $d - /tmp/cc6OCjXR.s:2140 .bss.pfs:00000000 pfs - /tmp/cc6OCjXR.s:2133 .bss.fre_clust:00000000 fre_clust - ARM GAS /tmp/cc6OCjXR.s page 59 + /tmp/ccwVm8tx.s:20 .text.Send_Uart:00000000 $t + /tmp/ccwVm8tx.s:26 .text.Send_Uart:00000000 Send_Uart + /tmp/ccwVm8tx.s:40 .text.Mount_SD:00000000 $t + /tmp/ccwVm8tx.s:46 .text.Mount_SD:00000000 Mount_SD + /tmp/ccwVm8tx.s:86 .text.Mount_SD:0000001c $d + /tmp/ccwVm8tx.s:2175 .bss.fs:00000000 fs + /tmp/ccwVm8tx.s:92 .text.Unmount_SD:00000000 $t + /tmp/ccwVm8tx.s:98 .text.Unmount_SD:00000000 Unmount_SD + /tmp/ccwVm8tx.s:138 .text.Unmount_SD:0000001c $d + /tmp/ccwVm8tx.s:143 .rodata.Scan_SD.str1.4:00000000 $d + /tmp/ccwVm8tx.s:156 .text.Scan_SD:00000000 $t + /tmp/ccwVm8tx.s:162 .text.Scan_SD:00000000 Scan_SD + /tmp/ccwVm8tx.s:344 .text.Scan_SD:000000b8 $d + /tmp/ccwVm8tx.s:2161 .bss.fno:00000000 fno + /tmp/ccwVm8tx.s:355 .rodata.Format_SD.str1.4:00000000 $d + /tmp/ccwVm8tx.s:359 .text.Format_SD:00000000 $t + /tmp/ccwVm8tx.s:365 .text.Format_SD:00000000 Format_SD + /tmp/ccwVm8tx.s:485 .text.Format_SD:00000078 $d + /tmp/ccwVm8tx.s:494 .text.Write_File:00000000 $t + /tmp/ccwVm8tx.s:500 .text.Write_File:00000000 Write_File + /tmp/ccwVm8tx.s:604 .text.Write_File:00000050 $d + /tmp/ccwVm8tx.s:2168 .bss.fil:00000000 fil + /tmp/ccwVm8tx.s:2147 .bss.bw:00000000 bw + /tmp/ccwVm8tx.s:612 .text.Write_File_byte:00000000 $t + /tmp/ccwVm8tx.s:618 .text.Write_File_byte:00000000 Write_File_byte + /tmp/ccwVm8tx.s:721 .text.Write_File_byte:0000004c $d + /tmp/ccwVm8tx.s:729 .rodata.Read_File.str1.4:00000000 $d + /tmp/ccwVm8tx.s:745 .text.Read_File:00000000 $t + /tmp/ccwVm8tx.s:751 .text.Read_File:00000000 Read_File + /tmp/ccwVm8tx.s:976 .text.Read_File:000000e4 $d + /tmp/ccwVm8tx.s:2154 .bss.br:00000000 br + /tmp/ccwVm8tx.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d + /tmp/ccwVm8tx.s:995 .text.Seek_Read_File:00000000 $t + /tmp/ccwVm8tx.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File + /tmp/ccwVm8tx.s:1271 .text.Seek_Read_File:0000011c $d + /tmp/ccwVm8tx.s:1287 .text.Create_File:00000000 $t + /tmp/ccwVm8tx.s:1293 .text.Create_File:00000000 Create_File + /tmp/ccwVm8tx.s:1372 .text.Create_File:00000038 $d + /tmp/ccwVm8tx.s:1379 .text.Update_File:00000000 $t + /tmp/ccwVm8tx.s:1385 .text.Update_File:00000000 Update_File + /tmp/ccwVm8tx.s:1489 .text.Update_File:00000050 $d + /tmp/ccwVm8tx.s:1497 .rodata.Remove_File.str1.4:00000000 $d + /tmp/ccwVm8tx.s:1507 .text.Remove_File:00000000 $t + /tmp/ccwVm8tx.s:1513 .text.Remove_File:00000000 Remove_File + /tmp/ccwVm8tx.s:1632 .text.Remove_File:00000070 $d + /tmp/ccwVm8tx.s:1642 .rodata.Create_Dir.str1.4:00000000 $d + /tmp/ccwVm8tx.s:1649 .text.Create_Dir:00000000 $t + /tmp/ccwVm8tx.s:1655 .text.Create_Dir:00000000 Create_Dir + /tmp/ccwVm8tx.s:1734 .text.Create_Dir:00000048 $d + /tmp/ccwVm8tx.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d + /tmp/ccwVm8tx.s:1752 .text.Check_SD_Space:00000000 $t + /tmp/ccwVm8tx.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space + /tmp/ccwVm8tx.s:1870 .text.Check_SD_Space:00000094 $d + /tmp/ccwVm8tx.s:2140 .bss.pfs:00000000 pfs + /tmp/ccwVm8tx.s:2133 .bss.fre_clust:00000000 fre_clust + ARM GAS /tmp/ccwVm8tx.s page 59 - /tmp/cc6OCjXR.s:2126 .bss.total:00000000 total - /tmp/cc6OCjXR.s:2119 .bss.free_space:00000000 free_space - /tmp/cc6OCjXR.s:1881 .text.Update_File_float:00000000 $t - /tmp/cc6OCjXR.s:1887 .text.Update_File_float:00000000 Update_File_float - /tmp/cc6OCjXR.s:1990 .text.Update_File_float:0000004c $d - /tmp/cc6OCjXR.s:1998 .text.Update_File_byte:00000000 $t - /tmp/cc6OCjXR.s:2004 .text.Update_File_byte:00000000 Update_File_byte - /tmp/cc6OCjXR.s:2107 .text.Update_File_byte:0000004c $d - /tmp/cc6OCjXR.s:2116 .bss.free_space:00000000 $d - /tmp/cc6OCjXR.s:2123 .bss.total:00000000 $d - /tmp/cc6OCjXR.s:2130 .bss.fre_clust:00000000 $d - /tmp/cc6OCjXR.s:2137 .bss.pfs:00000000 $d - /tmp/cc6OCjXR.s:2144 .bss.bw:00000000 $d - /tmp/cc6OCjXR.s:2151 .bss.br:00000000 $d - /tmp/cc6OCjXR.s:2158 .bss.fno:00000000 $d - /tmp/cc6OCjXR.s:2165 .bss.fil:00000000 $d - /tmp/cc6OCjXR.s:2172 .bss.fs:00000000 $d + /tmp/ccwVm8tx.s:2126 .bss.total:00000000 total + /tmp/ccwVm8tx.s:2119 .bss.free_space:00000000 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a/build/For_stm32.map b/build/For_stm32.map index 20702d4..fc482f6 100644 --- a/build/For_stm32.map +++ b/build/For_stm32.map @@ -2078,7 +2078,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x08000000 g_pfnVectors 0x080001f8 . = ALIGN (0x4) -.text 0x08000200 0xb690 +.text 0x08000200 0xb7d0 0x08000200 . = ALIGN (0x4) *(.text) .text 0x08000200 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o @@ -2143,976 +2143,980 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x080014e8 0x168 build/main.o .text.SPI2_SetMode 0x08001650 0x44 build/main.o + .text.PA4_DAC_Set + 0x08001694 0x2c build/main.o .text.PID_Controller_Temp - 0x08001694 0xe4 build/main.o + 0x080016c0 0xe4 build/main.o .text.AD9102_WriteReg - 0x08001778 0xd4 build/main.o + 0x080017a4 0xd4 build/main.o .text.AD9102_WriteRegTable - 0x0800184c 0x28 build/main.o + 0x08001878 0x28 build/main.o .text.AD9102_LoadSramRamp - 0x08001874 0xd8 build/main.o + 0x080018a0 0xd8 build/main.o .text.AD9102_Init - 0x0800194c 0x74 build/main.o + 0x08001978 0x74 build/main.o .text.AD9102_ReadReg - 0x080019c0 0xd4 build/main.o + 0x080019ec 0xd4 build/main.o .text.AD9102_CheckFlagsSram - 0x08001a94 0x112 build/main.o + 0x08001ac0 0x112 build/main.o .text.AD9102_CheckFlags - 0x08001ba6 0xd8 build/main.o - *fill* 0x08001c7e 0x2 + 0x08001bd2 0xd8 build/main.o + *fill* 0x08001caa 0x2 .text.AD9102_ApplySram - 0x08001c80 0x144 build/main.o + 0x08001cac 0x144 build/main.o .text.AD9102_Apply - 0x08001dc4 0xb8 build/main.o + 0x08001df0 0xb8 build/main.o .text.AD9833_WriteWord - 0x08001e7c 0x94 build/main.o + 0x08001ea8 0x94 build/main.o .text.AD9833_Apply - 0x08001f10 0x4e build/main.o - *fill* 0x08001f5e 0x2 + 0x08001f3c 0x4e build/main.o + *fill* 0x08001f8a 0x2 .text.OUT_trigger - 0x08001f60 0x124 build/main.o - .text.MPhD_T 0x08002084 0x220 build/main.o + 0x08001f8c 0x124 build/main.o + .text.MPhD_T 0x080020b0 0x220 build/main.o .text.Stop_TIM10 - 0x080022a4 0x20 build/main.o + 0x080022d0 0x20 build/main.o .text.MX_GPIO_Init - 0x080022c4 0x294 build/main.o + 0x080022f0 0x294 build/main.o + .text.PA4_DAC_Init + 0x08002584 0x68 build/main.o .text.MX_SPI4_Init - 0x08002558 0xd4 build/main.o + 0x080025ec 0xd4 build/main.o .text.MX_SPI2_Init - 0x0800262c 0xe8 build/main.o + 0x080026c0 0xe8 build/main.o .text.MX_SPI5_Init - 0x08002714 0xd0 build/main.o + 0x080027a8 0xd0 build/main.o .text.MX_SPI6_Init - 0x080027e4 0xd0 build/main.o + 0x08002878 0xd0 build/main.o .text.MX_TIM2_Init - 0x080028b4 0x9c build/main.o + 0x08002948 0x9c build/main.o .text.MX_TIM5_Init - 0x08002950 0x98 build/main.o + 0x080029e4 0x98 build/main.o .text.MX_TIM7_Init - 0x080029e8 0x8c build/main.o + 0x08002a7c 0x8c build/main.o .text.MX_TIM6_Init - 0x08002a74 0x8c build/main.o + 0x08002b08 0x8c build/main.o .text.Init_params - 0x08002b00 0x310 build/main.o + 0x08002b94 0x320 build/main.o .text.DS1809_Pulse - 0x08002e10 0x6c build/main.o - .text.Get_ADC 0x08002e7c 0x70 build/main.o + 0x08002eb4 0x6c build/main.o + .text.Get_ADC 0x08002f20 0x70 build/main.o .text.Set_LTEC - 0x08002eec 0x178 build/main.o - 0x08002eec Set_LTEC + 0x08002f90 0x180 build/main.o + 0x08002f90 Set_LTEC .text.Decode_uart - 0x08003064 0x2f8 build/main.o + 0x08003110 0x2f8 build/main.o .text.CalculateChecksum - 0x0800335c 0x18 build/main.o - 0x0800335c CalculateChecksum + 0x08003408 0x18 build/main.o + 0x08003408 CalculateChecksum .text.CheckChecksum - 0x08003374 0x48 build/main.o - 0x08003374 CheckChecksum - .text.SD_SAVE 0x080033bc 0x3c build/main.o - 0x080033bc SD_SAVE - .text.SD_READ 0x080033f8 0x4c build/main.o - 0x080033f8 SD_READ + 0x08003420 0x48 build/main.o + 0x08003420 CheckChecksum + .text.SD_SAVE 0x08003468 0x3c build/main.o + 0x08003468 SD_SAVE + .text.SD_READ 0x080034a4 0x4c build/main.o + 0x080034a4 SD_READ .text.SD_REMOVE - 0x08003444 0x40 build/main.o - 0x08003444 SD_REMOVE + 0x080034f0 0x40 build/main.o + 0x080034f0 SD_REMOVE .text.USART_TX - 0x08003484 0x2c build/main.o - 0x08003484 USART_TX + 0x08003530 0x2c build/main.o + 0x08003530 USART_TX .text.USART_TX_DMA - 0x080034b0 0x40 build/main.o - 0x080034b0 USART_TX_DMA + 0x0800355c 0x40 build/main.o + 0x0800355c USART_TX_DMA .text.Error_Handler - 0x080034f0 0x4 build/main.o - 0x080034f0 Error_Handler + 0x0800359c 0x4 build/main.o + 0x0800359c Error_Handler .text.MX_ADC1_Init - 0x080034f4 0xc8 build/main.o + 0x080035a0 0xc8 build/main.o .text.MX_ADC3_Init - 0x080035bc 0x6c build/main.o + 0x08003668 0x6c build/main.o .text.MX_USART1_UART_Init - 0x08003628 0x190 build/main.o + 0x080036d4 0x190 build/main.o .text.MX_TIM10_Init - 0x080037b8 0x2c build/main.o + 0x08003864 0x2c build/main.o .text.MX_UART8_Init - 0x080037e4 0x38 build/main.o + 0x08003890 0x38 build/main.o .text.MX_TIM8_Init - 0x0800381c 0x6c build/main.o + 0x080038c8 0x6c build/main.o .text.MX_TIM11_Init - 0x08003888 0x70 build/main.o + 0x08003934 0x70 build/main.o .text.MX_TIM4_Init - 0x080038f8 0xa4 build/main.o + 0x080039a4 0xa4 build/main.o .text.MX_TIM1_Init - 0x0800399c 0xc4 build/main.o + 0x08003a48 0xc4 build/main.o .text.SystemClock_Config - 0x08003a60 0xb4 build/main.o - 0x08003a60 SystemClock_Config - .text.main 0x08003b14 0xbfc build/main.o - 0x08003b14 main + 0x08003b0c 0xb4 build/main.o + 0x08003b0c SystemClock_Config + .text.main 0x08003bc0 0xc40 build/main.o + 0x08003bc0 main .text.BSP_SD_ReadBlocks - 0x08004710 0x20 build/bsp_driver_sd.o - 0x08004710 BSP_SD_ReadBlocks + 0x08004800 0x20 build/bsp_driver_sd.o + 0x08004800 BSP_SD_ReadBlocks .text.BSP_SD_WriteBlocks - 0x08004730 0x20 build/bsp_driver_sd.o - 0x08004730 BSP_SD_WriteBlocks + 0x08004820 0x20 build/bsp_driver_sd.o + 0x08004820 BSP_SD_WriteBlocks .text.BSP_SD_GetCardState - 0x08004750 0x14 build/bsp_driver_sd.o - 0x08004750 BSP_SD_GetCardState + 0x08004840 0x14 build/bsp_driver_sd.o + 0x08004840 BSP_SD_GetCardState .text.BSP_SD_GetCardInfo - 0x08004764 0x10 build/bsp_driver_sd.o - 0x08004764 BSP_SD_GetCardInfo + 0x08004854 0x10 build/bsp_driver_sd.o + 0x08004854 BSP_SD_GetCardInfo .text.BSP_SD_IsDetected - 0x08004774 0x20 build/bsp_driver_sd.o - 0x08004774 BSP_SD_IsDetected + 0x08004864 0x20 build/bsp_driver_sd.o + 0x08004864 BSP_SD_IsDetected .text.BSP_SD_Init - 0x08004794 0x34 build/bsp_driver_sd.o - 0x08004794 BSP_SD_Init + 0x08004884 0x34 build/bsp_driver_sd.o + 0x08004884 BSP_SD_Init .text.SD_CheckStatus - 0x080047c8 0x24 build/sd_diskio.o + 0x080048b8 0x24 build/sd_diskio.o .text.SD_initialize - 0x080047ec 0x28 build/sd_diskio.o - 0x080047ec SD_initialize + 0x080048dc 0x28 build/sd_diskio.o + 0x080048dc SD_initialize .text.SD_status - 0x08004814 0x8 build/sd_diskio.o - 0x08004814 SD_status - .text.SD_read 0x0800481c 0x24 build/sd_diskio.o - 0x0800481c SD_read + 0x08004904 0x8 build/sd_diskio.o + 0x08004904 SD_status + .text.SD_read 0x0800490c 0x24 build/sd_diskio.o + 0x0800490c SD_read .text.SD_write - 0x08004840 0x24 build/sd_diskio.o - 0x08004840 SD_write + 0x08004930 0x24 build/sd_diskio.o + 0x08004930 SD_write .text.SD_ioctl - 0x08004864 0x58 build/sd_diskio.o - 0x08004864 SD_ioctl + 0x08004954 0x58 build/sd_diskio.o + 0x08004954 SD_ioctl .text.MX_FATFS_Init - 0x080048bc 0x1c build/fatfs.o - 0x080048bc MX_FATFS_Init + 0x080049ac 0x1c build/fatfs.o + 0x080049ac MX_FATFS_Init .text.get_fattime - 0x080048d8 0x4 build/fatfs.o - 0x080048d8 get_fattime + 0x080049c8 0x4 build/fatfs.o + 0x080049c8 get_fattime .text.BSP_PlatformIsDetected - 0x080048dc 0x18 build/fatfs_platform.o - 0x080048dc BSP_PlatformIsDetected + 0x080049cc 0x18 build/fatfs_platform.o + 0x080049cc BSP_PlatformIsDetected .text.NMI_Handler - 0x080048f4 0x2 build/stm32f7xx_it.o - 0x080048f4 NMI_Handler + 0x080049e4 0x2 build/stm32f7xx_it.o + 0x080049e4 NMI_Handler .text.HardFault_Handler - 0x080048f6 0x2 build/stm32f7xx_it.o - 0x080048f6 HardFault_Handler + 0x080049e6 0x2 build/stm32f7xx_it.o + 0x080049e6 HardFault_Handler .text.MemManage_Handler - 0x080048f8 0x2 build/stm32f7xx_it.o - 0x080048f8 MemManage_Handler + 0x080049e8 0x2 build/stm32f7xx_it.o + 0x080049e8 MemManage_Handler .text.BusFault_Handler - 0x080048fa 0x2 build/stm32f7xx_it.o - 0x080048fa BusFault_Handler + 0x080049ea 0x2 build/stm32f7xx_it.o + 0x080049ea BusFault_Handler .text.UsageFault_Handler - 0x080048fc 0x2 build/stm32f7xx_it.o - 0x080048fc UsageFault_Handler + 0x080049ec 0x2 build/stm32f7xx_it.o + 0x080049ec UsageFault_Handler .text.SVC_Handler - 0x080048fe 0x2 build/stm32f7xx_it.o - 0x080048fe SVC_Handler + 0x080049ee 0x2 build/stm32f7xx_it.o + 0x080049ee SVC_Handler .text.DebugMon_Handler - 0x08004900 0x2 build/stm32f7xx_it.o - 0x08004900 DebugMon_Handler + 0x080049f0 0x2 build/stm32f7xx_it.o + 0x080049f0 DebugMon_Handler .text.PendSV_Handler - 0x08004902 0x2 build/stm32f7xx_it.o - 0x08004902 PendSV_Handler + 0x080049f2 0x2 build/stm32f7xx_it.o + 0x080049f2 PendSV_Handler .text.SysTick_Handler - 0x08004904 0x8 build/stm32f7xx_it.o - 0x08004904 SysTick_Handler + 0x080049f4 0x8 build/stm32f7xx_it.o + 0x080049f4 SysTick_Handler .text.ADC_IRQHandler - 0x0800490c 0x18 build/stm32f7xx_it.o - 0x0800490c ADC_IRQHandler + 0x080049fc 0x18 build/stm32f7xx_it.o + 0x080049fc ADC_IRQHandler .text.TIM1_UP_TIM10_IRQHandler - 0x08004924 0x34 build/stm32f7xx_it.o - 0x08004924 TIM1_UP_TIM10_IRQHandler + 0x08004a14 0x34 build/stm32f7xx_it.o + 0x08004a14 TIM1_UP_TIM10_IRQHandler .text.TIM1_TRG_COM_TIM11_IRQHandler - 0x08004958 0x34 build/stm32f7xx_it.o - 0x08004958 TIM1_TRG_COM_TIM11_IRQHandler + 0x08004a48 0x34 build/stm32f7xx_it.o + 0x08004a48 TIM1_TRG_COM_TIM11_IRQHandler .text.TIM2_IRQHandler - 0x0800498c 0x2 build/stm32f7xx_it.o - 0x0800498c TIM2_IRQHandler - *fill* 0x0800498e 0x2 + 0x08004a7c 0x2 build/stm32f7xx_it.o + 0x08004a7c TIM2_IRQHandler + *fill* 0x08004a7e 0x2 .text.TIM8_UP_TIM13_IRQHandler - 0x08004990 0x50 build/stm32f7xx_it.o - 0x08004990 TIM8_UP_TIM13_IRQHandler + 0x08004a80 0x50 build/stm32f7xx_it.o + 0x08004a80 TIM8_UP_TIM13_IRQHandler .text.TIM5_IRQHandler - 0x080049e0 0x2 build/stm32f7xx_it.o - 0x080049e0 TIM5_IRQHandler - *fill* 0x080049e2 0x2 + 0x08004ad0 0x2 build/stm32f7xx_it.o + 0x08004ad0 TIM5_IRQHandler + *fill* 0x08004ad2 0x2 .text.TIM6_DAC_IRQHandler - 0x080049e4 0x34 build/stm32f7xx_it.o - 0x080049e4 TIM6_DAC_IRQHandler + 0x08004ad4 0x34 build/stm32f7xx_it.o + 0x08004ad4 TIM6_DAC_IRQHandler .text.TIM7_IRQHandler - 0x08004a18 0x24 build/stm32f7xx_it.o - 0x08004a18 TIM7_IRQHandler + 0x08004b08 0x24 build/stm32f7xx_it.o + 0x08004b08 TIM7_IRQHandler .text.UART_RxCpltCallback - 0x08004a3c 0x3c8 build/stm32f7xx_it.o - 0x08004a3c UART_RxCpltCallback + 0x08004b2c 0x418 build/stm32f7xx_it.o + 0x08004b2c UART_RxCpltCallback .text.USART1_IRQHandler - 0x08004e04 0xd0 build/stm32f7xx_it.o - 0x08004e04 USART1_IRQHandler + 0x08004f44 0xd0 build/stm32f7xx_it.o + 0x08004f44 USART1_IRQHandler .text.DMA2_Stream7_TransferComplete - 0x08004ed4 0x10 build/stm32f7xx_it.o - 0x08004ed4 DMA2_Stream7_TransferComplete + 0x08005014 0x10 build/stm32f7xx_it.o + 0x08005014 DMA2_Stream7_TransferComplete .text.DMA2_Stream7_IRQHandler - 0x08004ee4 0x34 build/stm32f7xx_it.o - 0x08004ee4 DMA2_Stream7_IRQHandler + 0x08005024 0x34 build/stm32f7xx_it.o + 0x08005024 DMA2_Stream7_IRQHandler .text.HAL_MspInit - 0x08004f18 0x30 build/stm32f7xx_hal_msp.o - 0x08004f18 HAL_MspInit + 0x08005058 0x30 build/stm32f7xx_hal_msp.o + 0x08005058 HAL_MspInit .text.HAL_ADC_MspInit - 0x08004f48 0x110 build/stm32f7xx_hal_msp.o - 0x08004f48 HAL_ADC_MspInit + 0x08005088 0x110 build/stm32f7xx_hal_msp.o + 0x08005088 HAL_ADC_MspInit .text.HAL_SD_MspInit - 0x08005058 0xb8 build/stm32f7xx_hal_msp.o - 0x08005058 HAL_SD_MspInit + 0x08005198 0xb8 build/stm32f7xx_hal_msp.o + 0x08005198 HAL_SD_MspInit .text.HAL_TIM_Base_MspInit - 0x08005110 0xe0 build/stm32f7xx_hal_msp.o - 0x08005110 HAL_TIM_Base_MspInit + 0x08005250 0xe0 build/stm32f7xx_hal_msp.o + 0x08005250 HAL_TIM_Base_MspInit .text.HAL_TIM_MspPostInit - 0x080051f0 0xc8 build/stm32f7xx_hal_msp.o - 0x080051f0 HAL_TIM_MspPostInit + 0x08005330 0xc8 build/stm32f7xx_hal_msp.o + 0x08005330 HAL_TIM_MspPostInit .text.HAL_UART_MspInit - 0x080052b8 0x88 build/stm32f7xx_hal_msp.o - 0x080052b8 HAL_UART_MspInit + 0x080053f8 0x88 build/stm32f7xx_hal_msp.o + 0x080053f8 HAL_UART_MspInit .text.ADC_Init - 0x08005340 0x134 build/stm32f7xx_hal_adc.o + 0x08005480 0x134 build/stm32f7xx_hal_adc.o .text.HAL_ADC_Init - 0x08005474 0x58 build/stm32f7xx_hal_adc.o - 0x08005474 HAL_ADC_Init + 0x080055b4 0x58 build/stm32f7xx_hal_adc.o + 0x080055b4 HAL_ADC_Init .text.HAL_ADC_Start - 0x080054cc 0x134 build/stm32f7xx_hal_adc.o - 0x080054cc HAL_ADC_Start + 0x0800560c 0x134 build/stm32f7xx_hal_adc.o + 0x0800560c HAL_ADC_Start .text.HAL_ADC_Stop - 0x08005600 0x40 build/stm32f7xx_hal_adc.o - 0x08005600 HAL_ADC_Stop + 0x08005740 0x40 build/stm32f7xx_hal_adc.o + 0x08005740 HAL_ADC_Stop .text.HAL_ADC_PollForConversion - 0x08005640 0xc2 build/stm32f7xx_hal_adc.o - 0x08005640 HAL_ADC_PollForConversion + 0x08005780 0xc2 build/stm32f7xx_hal_adc.o + 0x08005780 HAL_ADC_PollForConversion .text.HAL_ADC_GetValue - 0x08005702 0x6 build/stm32f7xx_hal_adc.o - 0x08005702 HAL_ADC_GetValue + 0x08005842 0x6 build/stm32f7xx_hal_adc.o + 0x08005842 HAL_ADC_GetValue .text.HAL_ADC_ConvCpltCallback - 0x08005708 0x2 build/stm32f7xx_hal_adc.o - 0x08005708 HAL_ADC_ConvCpltCallback + 0x08005848 0x2 build/stm32f7xx_hal_adc.o + 0x08005848 HAL_ADC_ConvCpltCallback .text.HAL_ADC_LevelOutOfWindowCallback - 0x0800570a 0x2 build/stm32f7xx_hal_adc.o - 0x0800570a HAL_ADC_LevelOutOfWindowCallback + 0x0800584a 0x2 build/stm32f7xx_hal_adc.o + 0x0800584a HAL_ADC_LevelOutOfWindowCallback .text.HAL_ADC_ErrorCallback - 0x0800570c 0x2 build/stm32f7xx_hal_adc.o - 0x0800570c HAL_ADC_ErrorCallback + 0x0800584c 0x2 build/stm32f7xx_hal_adc.o + 0x0800584c HAL_ADC_ErrorCallback .text.HAL_ADC_IRQHandler - 0x0800570e 0x136 build/stm32f7xx_hal_adc.o - 0x0800570e HAL_ADC_IRQHandler + 0x0800584e 0x136 build/stm32f7xx_hal_adc.o + 0x0800584e HAL_ADC_IRQHandler .text.HAL_ADC_ConfigChannel - 0x08005844 0x1e4 build/stm32f7xx_hal_adc.o - 0x08005844 HAL_ADC_ConfigChannel + 0x08005984 0x1e4 build/stm32f7xx_hal_adc.o + 0x08005984 HAL_ADC_ConfigChannel .text.HAL_ADCEx_InjectedConvCpltCallback - 0x08005a28 0x2 build/stm32f7xx_hal_adc_ex.o - 0x08005a28 HAL_ADCEx_InjectedConvCpltCallback - *fill* 0x08005a2a 0x2 + 0x08005b68 0x2 build/stm32f7xx_hal_adc_ex.o + 0x08005b68 HAL_ADCEx_InjectedConvCpltCallback + *fill* 0x08005b6a 0x2 .text.HAL_RCC_OscConfig - 0x08005a2c 0x444 build/stm32f7xx_hal_rcc.o - 0x08005a2c HAL_RCC_OscConfig + 0x08005b6c 0x444 build/stm32f7xx_hal_rcc.o + 0x08005b6c HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x08005e70 0xa8 build/stm32f7xx_hal_rcc.o - 0x08005e70 HAL_RCC_GetSysClockFreq + 0x08005fb0 0xa8 build/stm32f7xx_hal_rcc.o + 0x08005fb0 HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x08005f18 0x16c build/stm32f7xx_hal_rcc.o - 0x08005f18 HAL_RCC_ClockConfig + 0x08006058 0x16c build/stm32f7xx_hal_rcc.o + 0x08006058 HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x08006084 0xc build/stm32f7xx_hal_rcc.o - 0x08006084 HAL_RCC_GetHCLKFreq + 0x080061c4 0xc build/stm32f7xx_hal_rcc.o + 0x080061c4 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08006090 0x20 build/stm32f7xx_hal_rcc.o - 0x08006090 HAL_RCC_GetPCLK1Freq + 0x080061d0 0x20 build/stm32f7xx_hal_rcc.o + 0x080061d0 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x080060b0 0x20 build/stm32f7xx_hal_rcc.o - 0x080060b0 HAL_RCC_GetPCLK2Freq + 0x080061f0 0x20 build/stm32f7xx_hal_rcc.o + 0x080061f0 HAL_RCC_GetPCLK2Freq .text.HAL_RCCEx_PeriphCLKConfig - 0x080060d0 0x600 build/stm32f7xx_hal_rcc_ex.o - 0x080060d0 HAL_RCCEx_PeriphCLKConfig + 0x08006210 0x600 build/stm32f7xx_hal_rcc_ex.o + 0x08006210 HAL_RCCEx_PeriphCLKConfig .text.HAL_GPIO_Init - 0x080066d0 0x204 build/stm32f7xx_hal_gpio.o - 0x080066d0 HAL_GPIO_Init + 0x08006810 0x204 build/stm32f7xx_hal_gpio.o + 0x08006810 HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x080068d4 0xe build/stm32f7xx_hal_gpio.o - 0x080068d4 HAL_GPIO_ReadPin + 0x08006a14 0xe build/stm32f7xx_hal_gpio.o + 0x08006a14 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x080068e2 0xc build/stm32f7xx_hal_gpio.o - 0x080068e2 HAL_GPIO_WritePin + 0x08006a22 0xc build/stm32f7xx_hal_gpio.o + 0x08006a22 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x080068ee 0x12 build/stm32f7xx_hal_gpio.o - 0x080068ee HAL_GPIO_TogglePin + 0x08006a2e 0x12 build/stm32f7xx_hal_gpio.o + 0x08006a2e HAL_GPIO_TogglePin .text.HAL_PWREx_EnableOverDrive - 0x08006900 0x7c build/stm32f7xx_hal_pwr_ex.o - 0x08006900 HAL_PWREx_EnableOverDrive + 0x08006a40 0x7c build/stm32f7xx_hal_pwr_ex.o + 0x08006a40 HAL_PWREx_EnableOverDrive .text.__NVIC_SetPriority - 0x0800697c 0x24 build/stm32f7xx_hal_cortex.o + 0x08006abc 0x24 build/stm32f7xx_hal_cortex.o .text.NVIC_EncodePriority - 0x080069a0 0x3e build/stm32f7xx_hal_cortex.o - *fill* 0x080069de 0x2 + 0x08006ae0 0x3e build/stm32f7xx_hal_cortex.o + *fill* 0x08006b1e 0x2 .text.HAL_NVIC_SetPriorityGrouping - 0x080069e0 0x24 build/stm32f7xx_hal_cortex.o - 0x080069e0 HAL_NVIC_SetPriorityGrouping + 0x08006b20 0x24 build/stm32f7xx_hal_cortex.o + 0x08006b20 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08006a04 0x20 build/stm32f7xx_hal_cortex.o - 0x08006a04 HAL_NVIC_SetPriority + 0x08006b44 0x20 build/stm32f7xx_hal_cortex.o + 0x08006b44 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08006a24 0x1c build/stm32f7xx_hal_cortex.o - 0x08006a24 HAL_NVIC_EnableIRQ + 0x08006b64 0x1c build/stm32f7xx_hal_cortex.o + 0x08006b64 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08006a40 0x28 build/stm32f7xx_hal_cortex.o - 0x08006a40 HAL_SYSTICK_Config + 0x08006b80 0x28 build/stm32f7xx_hal_cortex.o + 0x08006b80 HAL_SYSTICK_Config .text.HAL_InitTick - 0x08006a68 0x4c build/stm32f7xx_hal.o - 0x08006a68 HAL_InitTick + 0x08006ba8 0x4c build/stm32f7xx_hal.o + 0x08006ba8 HAL_InitTick .text.HAL_Init - 0x08006ab4 0x16 build/stm32f7xx_hal.o - 0x08006ab4 HAL_Init - *fill* 0x08006aca 0x2 + 0x08006bf4 0x16 build/stm32f7xx_hal.o + 0x08006bf4 HAL_Init + *fill* 0x08006c0a 0x2 .text.HAL_IncTick - 0x08006acc 0x18 build/stm32f7xx_hal.o - 0x08006acc HAL_IncTick + 0x08006c0c 0x18 build/stm32f7xx_hal.o + 0x08006c0c HAL_IncTick .text.HAL_GetTick - 0x08006ae4 0xc build/stm32f7xx_hal.o - 0x08006ae4 HAL_GetTick + 0x08006c24 0xc build/stm32f7xx_hal.o + 0x08006c24 HAL_GetTick .text.HAL_Delay - 0x08006af0 0x28 build/stm32f7xx_hal.o - 0x08006af0 HAL_Delay + 0x08006c30 0x28 build/stm32f7xx_hal.o + 0x08006c30 HAL_Delay .text.RCC_GetHCLKClockFreq - 0x08006b18 0x18 build/stm32f7xx_ll_rcc.o - 0x08006b18 RCC_GetHCLKClockFreq + 0x08006c58 0x18 build/stm32f7xx_ll_rcc.o + 0x08006c58 RCC_GetHCLKClockFreq .text.RCC_GetPCLK1ClockFreq - 0x08006b30 0x18 build/stm32f7xx_ll_rcc.o - 0x08006b30 RCC_GetPCLK1ClockFreq + 0x08006c70 0x18 build/stm32f7xx_ll_rcc.o + 0x08006c70 RCC_GetPCLK1ClockFreq .text.RCC_GetPCLK2ClockFreq - 0x08006b48 0x18 build/stm32f7xx_ll_rcc.o - 0x08006b48 RCC_GetPCLK2ClockFreq + 0x08006c88 0x18 build/stm32f7xx_ll_rcc.o + 0x08006c88 RCC_GetPCLK2ClockFreq .text.RCC_PLL_GetFreqDomain_SYS - 0x08006b60 0x44 build/stm32f7xx_ll_rcc.o - 0x08006b60 RCC_PLL_GetFreqDomain_SYS + 0x08006ca0 0x44 build/stm32f7xx_ll_rcc.o + 0x08006ca0 RCC_PLL_GetFreqDomain_SYS .text.RCC_GetSystemClockFreq - 0x08006ba4 0x2c build/stm32f7xx_ll_rcc.o - 0x08006ba4 RCC_GetSystemClockFreq + 0x08006ce4 0x2c build/stm32f7xx_ll_rcc.o + 0x08006ce4 RCC_GetSystemClockFreq .text.LL_RCC_GetUSARTClockFreq - 0x08006bd0 0x178 build/stm32f7xx_ll_rcc.o - 0x08006bd0 LL_RCC_GetUSARTClockFreq + 0x08006d10 0x178 build/stm32f7xx_ll_rcc.o + 0x08006d10 LL_RCC_GetUSARTClockFreq .text.LL_RCC_GetUARTClockFreq - 0x08006d48 0x180 build/stm32f7xx_ll_rcc.o - 0x08006d48 LL_RCC_GetUARTClockFreq + 0x08006e88 0x180 build/stm32f7xx_ll_rcc.o + 0x08006e88 LL_RCC_GetUARTClockFreq .text.LL_GPIO_SetPinSpeed - 0x08006ec8 0x30 build/stm32f7xx_ll_gpio.o + 0x08007008 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinPull - 0x08006ef8 0x30 build/stm32f7xx_ll_gpio.o + 0x08007038 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_0_7 - 0x08006f28 0x30 build/stm32f7xx_ll_gpio.o + 0x08007068 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_8_15 - 0x08006f58 0x32 build/stm32f7xx_ll_gpio.o + 0x08007098 0x32 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinMode - 0x08006f8a 0x30 build/stm32f7xx_ll_gpio.o + 0x080070ca 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_Init - 0x08006fba 0x8a build/stm32f7xx_ll_gpio.o - 0x08006fba LL_GPIO_Init + 0x080070fa 0x8a build/stm32f7xx_ll_gpio.o + 0x080070fa LL_GPIO_Init .text.SDMMC_GetCmdError - 0x08007044 0x38 build/stm32f7xx_ll_sdmmc.o + 0x08007184 0x38 build/stm32f7xx_ll_sdmmc.o .text.SDMMC_Init - 0x0800707c 0x34 build/stm32f7xx_ll_sdmmc.o - 0x0800707c SDMMC_Init + 0x080071bc 0x34 build/stm32f7xx_ll_sdmmc.o + 0x080071bc SDMMC_Init .text.SDMMC_ReadFIFO - 0x080070b0 0x6 build/stm32f7xx_ll_sdmmc.o - 0x080070b0 SDMMC_ReadFIFO + 0x080071f0 0x6 build/stm32f7xx_ll_sdmmc.o + 0x080071f0 SDMMC_ReadFIFO .text.SDMMC_WriteFIFO - 0x080070b6 0xa build/stm32f7xx_ll_sdmmc.o - 0x080070b6 SDMMC_WriteFIFO + 0x080071f6 0xa build/stm32f7xx_ll_sdmmc.o + 0x080071f6 SDMMC_WriteFIFO .text.SDMMC_PowerState_ON - 0x080070c0 0x8 build/stm32f7xx_ll_sdmmc.o - 0x080070c0 SDMMC_PowerState_ON + 0x08007200 0x8 build/stm32f7xx_ll_sdmmc.o + 0x08007200 SDMMC_PowerState_ON .text.SDMMC_GetPowerState - 0x080070c8 0x8 build/stm32f7xx_ll_sdmmc.o - 0x080070c8 SDMMC_GetPowerState + 0x08007208 0x8 build/stm32f7xx_ll_sdmmc.o + 0x08007208 SDMMC_GetPowerState .text.SDMMC_SendCommand - 0x080070d0 0x20 build/stm32f7xx_ll_sdmmc.o - 0x080070d0 SDMMC_SendCommand + 0x08007210 0x20 build/stm32f7xx_ll_sdmmc.o + 0x08007210 SDMMC_SendCommand .text.SDMMC_GetCommandResponse - 0x080070f0 0x6 build/stm32f7xx_ll_sdmmc.o - 0x080070f0 SDMMC_GetCommandResponse + 0x08007230 0x6 build/stm32f7xx_ll_sdmmc.o + 0x08007230 SDMMC_GetCommandResponse .text.SDMMC_GetResponse - 0x080070f6 0x6 build/stm32f7xx_ll_sdmmc.o - 0x080070f6 SDMMC_GetResponse + 0x08007236 0x6 build/stm32f7xx_ll_sdmmc.o + 0x08007236 SDMMC_GetResponse .text.SDMMC_ConfigData - 0x080070fc 0x24 build/stm32f7xx_ll_sdmmc.o - 0x080070fc SDMMC_ConfigData + 0x0800723c 0x24 build/stm32f7xx_ll_sdmmc.o + 0x0800723c SDMMC_ConfigData .text.SDMMC_CmdGoIdleState - 0x08007120 0x26 build/stm32f7xx_ll_sdmmc.o - 0x08007120 SDMMC_CmdGoIdleState - *fill* 0x08007146 0x2 + 0x08007260 0x26 build/stm32f7xx_ll_sdmmc.o + 0x08007260 SDMMC_CmdGoIdleState + *fill* 0x08007286 0x2 .text.SDMMC_GetCmdResp1 - 0x08007148 0x154 build/stm32f7xx_ll_sdmmc.o - 0x08007148 SDMMC_GetCmdResp1 + 0x08007288 0x154 build/stm32f7xx_ll_sdmmc.o + 0x08007288 SDMMC_GetCmdResp1 .text.SDMMC_CmdBlockLength - 0x0800729c 0x30 build/stm32f7xx_ll_sdmmc.o - 0x0800729c SDMMC_CmdBlockLength + 0x080073dc 0x30 build/stm32f7xx_ll_sdmmc.o + 0x080073dc SDMMC_CmdBlockLength .text.SDMMC_CmdReadSingleBlock - 0x080072cc 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080072cc SDMMC_CmdReadSingleBlock + 0x0800740c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x0800740c SDMMC_CmdReadSingleBlock .text.SDMMC_CmdReadMultiBlock - 0x080072fc 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080072fc SDMMC_CmdReadMultiBlock + 0x0800743c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x0800743c SDMMC_CmdReadMultiBlock .text.SDMMC_CmdWriteSingleBlock - 0x0800732c 0x30 build/stm32f7xx_ll_sdmmc.o - 0x0800732c SDMMC_CmdWriteSingleBlock + 0x0800746c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x0800746c SDMMC_CmdWriteSingleBlock .text.SDMMC_CmdWriteMultiBlock - 0x0800735c 0x30 build/stm32f7xx_ll_sdmmc.o - 0x0800735c SDMMC_CmdWriteMultiBlock + 0x0800749c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x0800749c SDMMC_CmdWriteMultiBlock .text.SDMMC_CmdStopTransfer - 0x0800738c 0x34 build/stm32f7xx_ll_sdmmc.o - 0x0800738c SDMMC_CmdStopTransfer + 0x080074cc 0x34 build/stm32f7xx_ll_sdmmc.o + 0x080074cc SDMMC_CmdStopTransfer .text.SDMMC_CmdSelDesel - 0x080073c0 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080073c0 SDMMC_CmdSelDesel + 0x08007500 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08007500 SDMMC_CmdSelDesel .text.SDMMC_CmdAppCommand - 0x080073f0 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080073f0 SDMMC_CmdAppCommand + 0x08007530 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08007530 SDMMC_CmdAppCommand .text.SDMMC_CmdBusWidth - 0x08007420 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08007420 SDMMC_CmdBusWidth + 0x08007560 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08007560 SDMMC_CmdBusWidth .text.SDMMC_CmdSendSCR - 0x08007450 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08007450 SDMMC_CmdSendSCR + 0x08007590 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08007590 SDMMC_CmdSendSCR .text.SDMMC_CmdSendStatus - 0x08007480 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08007480 SDMMC_CmdSendStatus + 0x080075c0 0x30 build/stm32f7xx_ll_sdmmc.o + 0x080075c0 SDMMC_CmdSendStatus .text.SDMMC_GetCmdResp2 - 0x080074b0 0x5c build/stm32f7xx_ll_sdmmc.o - 0x080074b0 SDMMC_GetCmdResp2 + 0x080075f0 0x5c build/stm32f7xx_ll_sdmmc.o + 0x080075f0 SDMMC_GetCmdResp2 .text.SDMMC_CmdSendCID - 0x0800750c 0x2a build/stm32f7xx_ll_sdmmc.o - 0x0800750c SDMMC_CmdSendCID + 0x0800764c 0x2a build/stm32f7xx_ll_sdmmc.o + 0x0800764c SDMMC_CmdSendCID .text.SDMMC_CmdSendCSD - 0x08007536 0x2a build/stm32f7xx_ll_sdmmc.o - 0x08007536 SDMMC_CmdSendCSD + 0x08007676 0x2a build/stm32f7xx_ll_sdmmc.o + 0x08007676 SDMMC_CmdSendCSD .text.SDMMC_GetCmdResp3 - 0x08007560 0x4c build/stm32f7xx_ll_sdmmc.o - 0x08007560 SDMMC_GetCmdResp3 + 0x080076a0 0x4c build/stm32f7xx_ll_sdmmc.o + 0x080076a0 SDMMC_GetCmdResp3 .text.SDMMC_CmdAppOperCommand - 0x080075ac 0x34 build/stm32f7xx_ll_sdmmc.o - 0x080075ac SDMMC_CmdAppOperCommand + 0x080076ec 0x34 build/stm32f7xx_ll_sdmmc.o + 0x080076ec SDMMC_CmdAppOperCommand .text.SDMMC_GetCmdResp6 - 0x080075e0 0xa0 build/stm32f7xx_ll_sdmmc.o - 0x080075e0 SDMMC_GetCmdResp6 + 0x08007720 0xa0 build/stm32f7xx_ll_sdmmc.o + 0x08007720 SDMMC_GetCmdResp6 .text.SDMMC_CmdSetRelAdd - 0x08007680 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08007680 SDMMC_CmdSetRelAdd + 0x080077c0 0x30 build/stm32f7xx_ll_sdmmc.o + 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HAL_TIM_Base_Init .text.HAL_TIM_PWM_Init - 0x08008964 0x60 build/stm32f7xx_hal_tim.o - 0x08008964 HAL_TIM_PWM_Init + 0x08008aa4 0x60 build/stm32f7xx_hal_tim.o + 0x08008aa4 HAL_TIM_PWM_Init .text.TIM_OC2_SetConfig - 0x080089c4 0x70 build/stm32f7xx_hal_tim.o - 0x080089c4 TIM_OC2_SetConfig + 0x08008b04 0x70 build/stm32f7xx_hal_tim.o + 0x08008b04 TIM_OC2_SetConfig .text.HAL_TIM_PWM_ConfigChannel - 0x08008a34 0x13a build/stm32f7xx_hal_tim.o - 0x08008a34 HAL_TIM_PWM_ConfigChannel + 0x08008b74 0x13a build/stm32f7xx_hal_tim.o + 0x08008b74 HAL_TIM_PWM_ConfigChannel .text.TIM_ETR_SetConfig - 0x08008b6e 0x1a build/stm32f7xx_hal_tim.o - 0x08008b6e TIM_ETR_SetConfig + 0x08008cae 0x1a build/stm32f7xx_hal_tim.o + 0x08008cae TIM_ETR_SetConfig .text.HAL_TIM_ConfigClockSource - 0x08008b88 0x100 build/stm32f7xx_hal_tim.o - 0x08008b88 HAL_TIM_ConfigClockSource + 0x08008cc8 0x100 build/stm32f7xx_hal_tim.o + 0x08008cc8 HAL_TIM_ConfigClockSource .text.TIM_CCxChannelCmd - 0x08008c88 0x1e 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build/ff.o .text.clear_lock - 0x080097c8 0x3c build/ff.o + 0x08009908 0x3c build/ff.o .text.clust2sect - 0x08009804 0x18 build/ff.o + 0x08009944 0x18 build/ff.o .text.clmt_clust - 0x0800981c 0x26 build/ff.o + 0x0800995c 0x26 build/ff.o .text.ld_clust - 0x08009842 0x26 build/ff.o + 0x08009982 0x26 build/ff.o .text.st_clust - 0x08009868 0x26 build/ff.o + 0x080099a8 0x26 build/ff.o .text.get_fileinfo - 0x0800988e 0x6a build/ff.o + 0x080099ce 0x6a build/ff.o .text.create_name - 0x080098f8 0xd0 build/ff.o + 0x08009a38 0xd0 build/ff.o .text.get_ldnumber - 0x080099c8 0x48 build/ff.o + 0x08009b08 0x48 build/ff.o .text.validate - 0x08009a10 0x46 build/ff.o + 0x08009b50 0x46 build/ff.o .text.sync_window - 0x08009a56 0x54 build/ff.o + 0x08009b96 0x54 build/ff.o .text.move_window - 0x08009aaa 0x36 build/ff.o + 0x08009bea 0x36 build/ff.o .text.check_fs - 0x08009ae0 0x78 build/ff.o + 0x08009c20 0x78 build/ff.o .text.find_volume - 0x08009b58 0x34c build/ff.o - .text.put_fat 0x08009ea4 0x136 build/ff.o - .text.get_fat 0x08009fda 0xfc build/ff.o - .text.dir_sdi 0x0800a0d6 0xc0 build/ff.o + 0x08009c98 0x34c build/ff.o + .text.put_fat 0x08009fe4 0x136 build/ff.o + .text.get_fat 0x0800a11a 0xfc build/ff.o + .text.dir_sdi 0x0800a216 0xc0 build/ff.o .text.create_chain - 0x0800a196 0xd6 build/ff.o + 0x0800a2d6 0xd6 build/ff.o .text.remove_chain - 0x0800a26c 0x7e build/ff.o + 0x0800a3ac 0x7e build/ff.o .text.dir_remove - 0x0800a2ea 0x1c build/ff.o + 0x0800a42a 0x1c build/ff.o .text.dir_next - 0x0800a306 0x118 build/ff.o + 0x0800a446 0x118 build/ff.o .text.dir_find - 0x0800a41e 0x5a build/ff.o + 0x0800a55e 0x5a build/ff.o .text.follow_path - 0x0800a478 0x92 build/ff.o + 0x0800a5b8 0x92 build/ff.o .text.dir_alloc - 0x0800a50a 0x4e build/ff.o + 0x0800a64a 0x4e build/ff.o .text.dir_register - 0x0800a558 0x3e build/ff.o + 0x0800a698 0x3e build/ff.o .text.dir_read - 0x0800a596 0x5e build/ff.o - .text.sync_fs 0x0800a5f4 0x88 build/ff.o - .text.f_mount 0x0800a67c 0x60 build/ff.o - 0x0800a67c f_mount - .text.f_open 0x0800a6dc 0x232 build/ff.o - 0x0800a6dc f_open - .text.f_read 0x0800a90e 0x1d8 build/ff.o - 0x0800a90e f_read - .text.f_write 0x0800aae6 0x210 build/ff.o - 0x0800aae6 f_write - .text.f_sync 0x0800acf6 0x98 build/ff.o - 0x0800acf6 f_sync - .text.f_close 0x0800ad8e 0x2a build/ff.o - 0x0800ad8e f_close - .text.f_lseek 0x0800adb8 0x2a6 build/ff.o - 0x0800adb8 f_lseek - .text.f_stat 0x0800b05e 0x44 build/ff.o - 0x0800b05e f_stat + 0x0800a6d6 0x5e build/ff.o + .text.sync_fs 0x0800a734 0x88 build/ff.o + .text.f_mount 0x0800a7bc 0x60 build/ff.o + 0x0800a7bc f_mount + .text.f_open 0x0800a81c 0x232 build/ff.o + 0x0800a81c f_open + .text.f_read 0x0800aa4e 0x1d8 build/ff.o + 0x0800aa4e f_read + .text.f_write 0x0800ac26 0x210 build/ff.o + 0x0800ac26 f_write + .text.f_sync 0x0800ae36 0x98 build/ff.o + 0x0800ae36 f_sync + .text.f_close 0x0800aece 0x2a build/ff.o + 0x0800aece f_close + .text.f_lseek 0x0800aef8 0x2a6 build/ff.o + 0x0800aef8 f_lseek + .text.f_stat 0x0800b19e 0x44 build/ff.o + 0x0800b19e f_stat .text.f_unlink - 0x0800b0a2 0xc4 build/ff.o - 0x0800b0a2 f_unlink - *fill* 0x0800b166 0x2 + 0x0800b1e2 0xc4 build/ff.o + 0x0800b1e2 f_unlink + *fill* 0x0800b2a6 0x2 .text.FATFS_LinkDriverEx - 0x0800b168 0x54 build/ff_gen_drv.o - 0x0800b168 FATFS_LinkDriverEx + 0x0800b2a8 0x54 build/ff_gen_drv.o + 0x0800b2a8 FATFS_LinkDriverEx .text.FATFS_LinkDriver - 0x0800b1bc 0xa build/ff_gen_drv.o - 0x0800b1bc FATFS_LinkDriver - *fill* 0x0800b1c6 0x2 - .text._sbrk 0x0800b1c8 0x48 build/sysmem.o - 0x0800b1c8 _sbrk + 0x0800b2fc 0xa build/ff_gen_drv.o + 0x0800b2fc FATFS_LinkDriver + *fill* 0x0800b306 0x2 + .text._sbrk 0x0800b308 0x48 build/sysmem.o + 0x0800b308 _sbrk .text.UART_EndRxTransfer - 0x0800b210 0x52 build/stm32f7xx_hal_uart.o - *fill* 0x0800b262 0x2 + 0x0800b350 0x52 build/stm32f7xx_hal_uart.o + *fill* 0x0800b3a2 0x2 .text.UART_SetConfig - 0x0800b264 0x328 build/stm32f7xx_hal_uart.o - 0x0800b264 UART_SetConfig + 0x0800b3a4 0x328 build/stm32f7xx_hal_uart.o + 0x0800b3a4 UART_SetConfig .text.UART_AdvFeatureConfig - 0x0800b58c 0xca build/stm32f7xx_hal_uart.o - 0x0800b58c UART_AdvFeatureConfig + 0x0800b6cc 0xca build/stm32f7xx_hal_uart.o + 0x0800b6cc UART_AdvFeatureConfig .text.UART_WaitOnFlagUntilTimeout - 0x0800b656 0xa6 build/stm32f7xx_hal_uart.o - 0x0800b656 UART_WaitOnFlagUntilTimeout + 0x0800b796 0xa6 build/stm32f7xx_hal_uart.o + 0x0800b796 UART_WaitOnFlagUntilTimeout .text.UART_CheckIdleState - 0x0800b6fc 0xc6 build/stm32f7xx_hal_uart.o - 0x0800b6fc UART_CheckIdleState + 0x0800b83c 0xc6 build/stm32f7xx_hal_uart.o + 0x0800b83c UART_CheckIdleState .text.HAL_UART_Init - 0x0800b7c2 0x62 build/stm32f7xx_hal_uart.o - 0x0800b7c2 HAL_UART_Init + 0x0800b902 0x62 build/stm32f7xx_hal_uart.o + 0x0800b902 HAL_UART_Init .text.Reset_Handler - 0x0800b824 0x50 build/startup_stm32f767xx.o - 0x0800b824 Reset_Handler + 0x0800b964 0x50 build/startup_stm32f767xx.o + 0x0800b964 Reset_Handler .text.Default_Handler - 0x0800b874 0x2 build/startup_stm32f767xx.o - 0x0800b874 RTC_Alarm_IRQHandler - 0x0800b874 EXTI2_IRQHandler - 0x0800b874 TIM8_CC_IRQHandler - 0x0800b874 UART8_IRQHandler - 0x0800b874 SPI4_IRQHandler - 0x0800b874 TIM1_CC_IRQHandler - 0x0800b874 DMA2_Stream5_IRQHandler - 0x0800b874 JPEG_IRQHandler - 0x0800b874 DMA1_Stream5_IRQHandler - 0x0800b874 CAN3_RX1_IRQHandler - 0x0800b874 PVD_IRQHandler - 0x0800b874 TAMP_STAMP_IRQHandler - 0x0800b874 CAN2_RX1_IRQHandler - 0x0800b874 EXTI3_IRQHandler - 0x0800b874 TIM8_TRG_COM_TIM14_IRQHandler - 0x0800b874 DFSDM1_FLT1_IRQHandler - 0x0800b874 I2C3_ER_IRQHandler - 0x0800b874 DFSDM1_FLT2_IRQHandler - 0x0800b874 EXTI0_IRQHandler - 0x0800b874 I2C2_EV_IRQHandler - 0x0800b874 DMA1_Stream2_IRQHandler - 0x0800b874 CAN1_RX0_IRQHandler - 0x0800b874 FPU_IRQHandler - 0x0800b874 OTG_HS_WKUP_IRQHandler - 0x0800b874 CAN3_SCE_IRQHandler - 0x0800b874 LTDC_ER_IRQHandler - 0x0800b874 CAN2_SCE_IRQHandler - 0x0800b874 DMA2_Stream2_IRQHandler - 0x0800b874 SPI1_IRQHandler - 0x0800b874 TIM1_BRK_TIM9_IRQHandler - 0x0800b874 DCMI_IRQHandler - 0x0800b874 CAN2_RX0_IRQHandler - 0x0800b874 DMA2_Stream3_IRQHandler - 0x0800b874 SAI2_IRQHandler - 0x0800b874 DFSDM1_FLT3_IRQHandler - 0x0800b874 USART6_IRQHandler - 0x0800b874 CAN3_RX0_IRQHandler - 0x0800b874 USART3_IRQHandler - 0x0800b874 CAN1_RX1_IRQHandler - 0x0800b874 UART5_IRQHandler - 0x0800b874 DMA2_Stream0_IRQHandler - 0x0800b874 TIM4_IRQHandler - 0x0800b874 QUADSPI_IRQHandler - 0x0800b874 I2C1_EV_IRQHandler - 0x0800b874 DMA1_Stream6_IRQHandler - 0x0800b874 DMA1_Stream1_IRQHandler - 0x0800b874 UART4_IRQHandler - 0x0800b874 TIM3_IRQHandler - 0x0800b874 RCC_IRQHandler - 0x0800b874 TIM8_BRK_TIM12_IRQHandler - 0x0800b874 Default_Handler - 0x0800b874 CEC_IRQHandler - 0x0800b874 EXTI15_10_IRQHandler - 0x0800b874 DMA1_Stream7_IRQHandler - 0x0800b874 SPI5_IRQHandler - 0x0800b874 SDMMC1_IRQHandler - 0x0800b874 CAN2_TX_IRQHandler - 0x0800b874 I2C3_EV_IRQHandler - 0x0800b874 EXTI9_5_IRQHandler - 0x0800b874 RTC_WKUP_IRQHandler - 0x0800b874 LTDC_IRQHandler - 0x0800b874 ETH_WKUP_IRQHandler - 0x0800b874 SPDIF_RX_IRQHandler - 0x0800b874 SPI2_IRQHandler - 0x0800b874 OTG_HS_EP1_IN_IRQHandler - 0x0800b874 DMA1_Stream0_IRQHandler - 0x0800b874 CAN1_TX_IRQHandler - 0x0800b874 EXTI4_IRQHandler - 0x0800b874 RNG_IRQHandler - 0x0800b874 ETH_IRQHandler - 0x0800b874 OTG_HS_EP1_OUT_IRQHandler - 0x0800b874 WWDG_IRQHandler - 0x0800b874 SPI6_IRQHandler - 0x0800b874 MDIOS_IRQHandler - 0x0800b874 I2C4_EV_IRQHandler - 0x0800b874 CAN3_TX_IRQHandler - 0x0800b874 OTG_FS_WKUP_IRQHandler - 0x0800b874 OTG_HS_IRQHandler - 0x0800b874 DMA2D_IRQHandler - 0x0800b874 EXTI1_IRQHandler - 0x0800b874 SDMMC2_IRQHandler - 0x0800b874 UART7_IRQHandler - 0x0800b874 USART2_IRQHandler - 0x0800b874 DFSDM1_FLT0_IRQHandler - 0x0800b874 I2C2_ER_IRQHandler - 0x0800b874 DMA2_Stream1_IRQHandler - 0x0800b874 CAN1_SCE_IRQHandler - 0x0800b874 FLASH_IRQHandler - 0x0800b874 DMA2_Stream4_IRQHandler - 0x0800b874 OTG_FS_IRQHandler - 0x0800b874 SPI3_IRQHandler - 0x0800b874 DMA1_Stream4_IRQHandler - 0x0800b874 I2C1_ER_IRQHandler - 0x0800b874 FMC_IRQHandler - 0x0800b874 LPTIM1_IRQHandler - 0x0800b874 I2C4_ER_IRQHandler - 0x0800b874 DMA2_Stream6_IRQHandler - 0x0800b874 SAI1_IRQHandler - 0x0800b874 DMA1_Stream3_IRQHandler + 0x0800b9b4 0x2 build/startup_stm32f767xx.o + 0x0800b9b4 RTC_Alarm_IRQHandler + 0x0800b9b4 EXTI2_IRQHandler + 0x0800b9b4 TIM8_CC_IRQHandler + 0x0800b9b4 UART8_IRQHandler + 0x0800b9b4 SPI4_IRQHandler + 0x0800b9b4 TIM1_CC_IRQHandler + 0x0800b9b4 DMA2_Stream5_IRQHandler + 0x0800b9b4 JPEG_IRQHandler + 0x0800b9b4 DMA1_Stream5_IRQHandler + 0x0800b9b4 CAN3_RX1_IRQHandler + 0x0800b9b4 PVD_IRQHandler + 0x0800b9b4 TAMP_STAMP_IRQHandler + 0x0800b9b4 CAN2_RX1_IRQHandler + 0x0800b9b4 EXTI3_IRQHandler + 0x0800b9b4 TIM8_TRG_COM_TIM14_IRQHandler + 0x0800b9b4 DFSDM1_FLT1_IRQHandler + 0x0800b9b4 I2C3_ER_IRQHandler + 0x0800b9b4 DFSDM1_FLT2_IRQHandler + 0x0800b9b4 EXTI0_IRQHandler + 0x0800b9b4 I2C2_EV_IRQHandler + 0x0800b9b4 DMA1_Stream2_IRQHandler + 0x0800b9b4 CAN1_RX0_IRQHandler + 0x0800b9b4 FPU_IRQHandler + 0x0800b9b4 OTG_HS_WKUP_IRQHandler + 0x0800b9b4 CAN3_SCE_IRQHandler + 0x0800b9b4 LTDC_ER_IRQHandler + 0x0800b9b4 CAN2_SCE_IRQHandler + 0x0800b9b4 DMA2_Stream2_IRQHandler + 0x0800b9b4 SPI1_IRQHandler + 0x0800b9b4 TIM1_BRK_TIM9_IRQHandler + 0x0800b9b4 DCMI_IRQHandler + 0x0800b9b4 CAN2_RX0_IRQHandler + 0x0800b9b4 DMA2_Stream3_IRQHandler + 0x0800b9b4 SAI2_IRQHandler + 0x0800b9b4 DFSDM1_FLT3_IRQHandler + 0x0800b9b4 USART6_IRQHandler + 0x0800b9b4 CAN3_RX0_IRQHandler + 0x0800b9b4 USART3_IRQHandler + 0x0800b9b4 CAN1_RX1_IRQHandler + 0x0800b9b4 UART5_IRQHandler + 0x0800b9b4 DMA2_Stream0_IRQHandler + 0x0800b9b4 TIM4_IRQHandler + 0x0800b9b4 QUADSPI_IRQHandler + 0x0800b9b4 I2C1_EV_IRQHandler + 0x0800b9b4 DMA1_Stream6_IRQHandler + 0x0800b9b4 DMA1_Stream1_IRQHandler + 0x0800b9b4 UART4_IRQHandler + 0x0800b9b4 TIM3_IRQHandler + 0x0800b9b4 RCC_IRQHandler + 0x0800b9b4 TIM8_BRK_TIM12_IRQHandler + 0x0800b9b4 Default_Handler + 0x0800b9b4 CEC_IRQHandler + 0x0800b9b4 EXTI15_10_IRQHandler + 0x0800b9b4 DMA1_Stream7_IRQHandler + 0x0800b9b4 SPI5_IRQHandler + 0x0800b9b4 SDMMC1_IRQHandler + 0x0800b9b4 CAN2_TX_IRQHandler + 0x0800b9b4 I2C3_EV_IRQHandler + 0x0800b9b4 EXTI9_5_IRQHandler + 0x0800b9b4 RTC_WKUP_IRQHandler + 0x0800b9b4 LTDC_IRQHandler + 0x0800b9b4 ETH_WKUP_IRQHandler + 0x0800b9b4 SPDIF_RX_IRQHandler + 0x0800b9b4 SPI2_IRQHandler + 0x0800b9b4 OTG_HS_EP1_IN_IRQHandler + 0x0800b9b4 DMA1_Stream0_IRQHandler + 0x0800b9b4 CAN1_TX_IRQHandler + 0x0800b9b4 EXTI4_IRQHandler + 0x0800b9b4 RNG_IRQHandler + 0x0800b9b4 ETH_IRQHandler + 0x0800b9b4 OTG_HS_EP1_OUT_IRQHandler + 0x0800b9b4 WWDG_IRQHandler + 0x0800b9b4 SPI6_IRQHandler + 0x0800b9b4 MDIOS_IRQHandler + 0x0800b9b4 I2C4_EV_IRQHandler + 0x0800b9b4 CAN3_TX_IRQHandler + 0x0800b9b4 OTG_FS_WKUP_IRQHandler + 0x0800b9b4 OTG_HS_IRQHandler + 0x0800b9b4 DMA2D_IRQHandler + 0x0800b9b4 EXTI1_IRQHandler + 0x0800b9b4 SDMMC2_IRQHandler + 0x0800b9b4 UART7_IRQHandler + 0x0800b9b4 USART2_IRQHandler + 0x0800b9b4 DFSDM1_FLT0_IRQHandler + 0x0800b9b4 I2C2_ER_IRQHandler + 0x0800b9b4 DMA2_Stream1_IRQHandler + 0x0800b9b4 CAN1_SCE_IRQHandler + 0x0800b9b4 FLASH_IRQHandler + 0x0800b9b4 DMA2_Stream4_IRQHandler + 0x0800b9b4 OTG_FS_IRQHandler + 0x0800b9b4 SPI3_IRQHandler + 0x0800b9b4 DMA1_Stream4_IRQHandler + 0x0800b9b4 I2C1_ER_IRQHandler + 0x0800b9b4 FMC_IRQHandler + 0x0800b9b4 LPTIM1_IRQHandler + 0x0800b9b4 I2C4_ER_IRQHandler + 0x0800b9b4 DMA2_Stream6_IRQHandler + 0x0800b9b4 SAI1_IRQHandler + 0x0800b9b4 DMA1_Stream3_IRQHandler *(.glue_7) - .glue_7 0x0800b876 0x0 linker stubs + .glue_7 0x0800b9b6 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0800b876 0x0 linker stubs + .glue_7t 0x0800b9b6 0x0 linker stubs *(.eh_frame) - *fill* 0x0800b876 0x2 - .eh_frame 0x0800b878 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + *fill* 0x0800b9b6 0x2 + .eh_frame 0x0800b9b8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o *(.init) - .init 0x0800b878 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800b878 _init - .init 0x0800b87c 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + .init 0x0800b9b8 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800b9b8 _init + .init 0x0800b9bc 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o *(.fini) - .fini 0x0800b884 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800b884 _fini - .fini 0x0800b888 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o - 0x0800b890 . = ALIGN (0x4) - 0x0800b890 _etext = . + .fini 0x0800b9c4 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800b9c4 _fini + .fini 0x0800b9c8 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + 0x0800b9d0 . = ALIGN (0x4) + 0x0800b9d0 _etext = . -.vfp11_veneer 0x0800b890 0x0 - .vfp11_veneer 0x0800b890 0x0 linker stubs +.vfp11_veneer 0x0800b9d0 0x0 + .vfp11_veneer 0x0800b9d0 0x0 linker stubs -.v4_bx 0x0800b890 0x0 - .v4_bx 0x0800b890 0x0 linker stubs +.v4_bx 0x0800b9d0 0x0 + .v4_bx 0x0800b9d0 0x0 linker stubs -.iplt 0x0800b890 0x0 - .iplt 0x0800b890 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.iplt 0x0800b9d0 0x0 + .iplt 0x0800b9d0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.rodata 0x0800b890 0x3e8 - 0x0800b890 . = ALIGN (0x4) +.rodata 0x0800b9d0 0x3e8 + 0x0800b9d0 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.Init_params.str1.4 - 0x0800b890 0x1ad build/main.o + 0x0800b9d0 0x1ad build/main.o 0x10 (size before relaxing) .rodata.SD_SAVE.str1.4 - 0x0800ba3d 0xa build/main.o - *fill* 0x0800ba3d 0x3 + 0x0800bb7d 0xa build/main.o + *fill* 0x0800bb7d 0x3 .rodata.ad9102_example2_regval - 0x0800ba40 0x84 build/main.o + 0x0800bb80 0x84 build/main.o .rodata.ad9102_example4_regval - 0x0800bac4 0x84 build/main.o + 0x0800bc04 0x84 build/main.o .rodata.ad9102_reg_addr - 0x0800bb48 0x84 build/main.o + 0x0800bc88 0x84 build/main.o .rodata.SD_Driver - 0x0800bbcc 0x14 build/sd_diskio.o - 0x0800bbcc SD_Driver + 0x0800bd0c 0x14 build/sd_diskio.o + 0x0800bd0c SD_Driver .rodata.APBPrescTable - 0x0800bbe0 0x8 build/system_stm32f7xx.o - 0x0800bbe0 APBPrescTable + 0x0800bd20 0x8 build/system_stm32f7xx.o + 0x0800bd20 APBPrescTable .rodata.AHBPrescTable - 0x0800bbe8 0x10 build/system_stm32f7xx.o - 0x0800bbe8 AHBPrescTable + 0x0800bd28 0x10 build/system_stm32f7xx.o + 0x0800bd28 AHBPrescTable .rodata.Read_File.str1.4 - 0x0800bbf8 0xbb build/File_Handling.o + 0x0800bd38 0xbb build/File_Handling.o .rodata.Seek_Read_File.str1.4 - 0x0800bbf8 0x27 build/File_Handling.o + 0x0800bd38 0x27 build/File_Handling.o .rodata.Remove_File.str1.4 - 0x0800bbf8 0x64 build/File_Handling.o + 0x0800bd38 0x64 build/File_Handling.o .rodata.create_name.str1.4 - 0x0800bbf8 0xf build/ff.o - .rodata.ExCvt 0x0800bbf8 0x80 build/ff.o + 0x0800bd38 0xf build/ff.o + .rodata.ExCvt 0x0800bd38 0x80 build/ff.o .rodata.str1.4 - 0x0800bc78 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) + 0x0800bdb8 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) .rodata.str1.4 - 0x0800bc78 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) - 0x0800bcb4 . = ALIGN (0x4) + 0x0800bdb8 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) + 0x0800bdf4 . = ALIGN (0x4) .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x0800bc78 0x8 - 0x0800bc78 __exidx_start = . +.ARM 0x0800bdb8 0x8 + 0x0800bdb8 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0800bc78 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) - .ARM.exidx 0x0800bc80 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) + .ARM.exidx 0x0800bdb8 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) + .ARM.exidx 0x0800bdc0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) 0x8 (size before relaxing) - .ARM.exidx 0x0800bc80 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) + .ARM.exidx 0x0800bdc0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) 0x8 (size before relaxing) - 0x0800bc80 __exidx_end = . + 0x0800bdc0 __exidx_end = . -.rel.dyn 0x0800bc80 0x0 - .rel.iplt 0x0800bc80 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.rel.dyn 0x0800bdc0 0x0 + .rel.iplt 0x0800bdc0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.preinit_array 0x0800bc80 0x0 - 0x0800bc80 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0800bdc0 0x0 + 0x0800bdc0 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0800bc80 PROVIDE (__preinit_array_end = .) + 0x0800bdc0 PROVIDE (__preinit_array_end = .) -.init_array 0x0800bc80 0x4 - 0x0800bc80 PROVIDE (__init_array_start = .) +.init_array 0x0800bdc0 0x4 + 0x0800bdc0 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0800bc80 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800bc84 PROVIDE (__init_array_end = .) + .init_array 0x0800bdc0 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800bdc4 PROVIDE (__init_array_end = .) -.fini_array 0x0800bc84 0x4 - 0x0800bc84 PROVIDE (__fini_array_start = .) +.fini_array 0x0800bdc4 0x4 + 0x0800bdc4 PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0800bc84 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800bc88 PROVIDE (__fini_array_end = .) - 0x0800bc88 _sidata = LOADADDR (.data) + .fini_array 0x0800bdc4 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800bdc8 PROVIDE (__fini_array_end = .) + 0x0800bdc8 _sidata = LOADADDR (.data) -.data 0x20000000 0x5c load address 0x0800bc88 +.data 0x20000000 0x5c load address 0x0800bdc8 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -3135,17 +3139,17 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x2000005c _edata = . .tm_clone_table - 0x2000005c 0x0 load address 0x0800bce4 + 0x2000005c 0x0 load address 0x0800be24 .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o -.igot.plt 0x2000005c 0x0 load address 0x0800bce4 +.igot.plt 0x2000005c 0x0 load address 0x0800be24 .igot.plt 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o 0x2000005c . = ALIGN (0x4) -.bss 0x2000005c 0x26b8 load address 0x0800bce4 +.bss 0x2000005c 0x26b8 load address 0x0800be24 0x2000005c _sbss = . 0x2000005c __bss_start__ = _sbss *(.bss) @@ -3323,7 +3327,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x20002714 __bss_end__ = _ebss ._user_heap_stack - 0x20002714 0x6004 load address 0x0800bce4 + 0x20002714 0x6004 load address 0x0800be24 0x20002718 . = ALIGN (0x8) *fill* 0x20002714 0x4 [!provide] PROVIDE (end = .) @@ -3517,458 +3521,458 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o -.debug_info 0x00000000 0x3c64e - .debug_info 0x00000000 0x9fee build/main.o - .debug_info 0x00009fee 0xe39 build/bsp_driver_sd.o - .debug_info 0x0000ae27 0x74a build/sd_diskio.o - .debug_info 0x0000b571 0x65a build/fatfs.o - .debug_info 0x0000bbcb 0x1f0 build/fatfs_platform.o - .debug_info 0x0000bdbb 0x1927 build/stm32f7xx_it.o - .debug_info 0x0000d6e2 0x243f build/stm32f7xx_hal_msp.o - .debug_info 0x0000fb21 0xfb5 build/stm32f7xx_hal_adc.o - .debug_info 0x00010ad6 0xd39 build/stm32f7xx_hal_adc_ex.o - .debug_info 0x0001180f 0xd0b build/stm32f7xx_hal_rcc.o - .debug_info 0x0001251a 0x96b build/stm32f7xx_hal_rcc_ex.o - .debug_info 0x00012e85 0x867 build/stm32f7xx_hal_gpio.o - .debug_info 0x000136ec 0xb00 build/stm32f7xx_hal_pwr_ex.o - .debug_info 0x000141ec 0x145b build/stm32f7xx_hal_cortex.o - .debug_info 0x00015647 0xc0b build/stm32f7xx_hal.o - .debug_info 0x00016252 0x1d6b build/stm32f7xx_ll_rcc.o - .debug_info 0x00017fbd 0xda5 build/stm32f7xx_ll_gpio.o - .debug_info 0x00018d62 0x1ad6 build/stm32f7xx_ll_sdmmc.o - .debug_info 0x0001a838 0x2a28 build/stm32f7xx_hal_sd.o - .debug_info 0x0001d260 0xb14 build/stm32f7xx_ll_spi.o - .debug_info 0x0001dd74 0x42a3 build/stm32f7xx_hal_tim.o - .debug_info 0x00022017 0x2009 build/stm32f7xx_hal_tim_ex.o - .debug_info 0x00024020 0x19f0 build/stm32f7xx_ll_tim.o - .debug_info 0x00025a10 0xc07 build/stm32f7xx_ll_usart.o - .debug_info 0x00026617 0x7ea build/system_stm32f7xx.o - .debug_info 0x00026e01 0x1ef6 build/File_Handling.o - .debug_info 0x00028cf7 0x5f7 build/diskio.o - .debug_info 0x000292ee 0x47f5 build/ff.o - .debug_info 0x0002dae3 0x525 build/ff_gen_drv.o - .debug_info 0x0002e008 0x174 build/sysmem.o - .debug_info 0x0002e17c 0x54ac build/stm32f7xx_hal_uart.o - .debug_info 0x00033628 0x30 build/startup_stm32f767xx.o - .debug_info 0x00033658 0x87b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) - .debug_info 0x00033ed3 0x70b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o) - .debug_info 0x000345de 0x1092 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) - 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0x00037343 0x33 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) - .debug_info 0x00037376 0x796 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o) - .debug_info 0x00037b0c 0x8cd /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o) - .debug_info 0x000383d9 0xdd7 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) - .debug_info 0x000391b0 0x71c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o) - .debug_info 0x000398cc 0x778 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o) - .debug_info 0x0003a044 0x78a /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o) - .debug_info 0x0003a7ce 0xe8c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) - .debug_info 0x0003b65a 0x89f /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o) - .debug_info 0x0003bef9 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_info 0x0003bf1d 0x6f5 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) - .debug_info 0x0003c612 0x3c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o) +.debug_info 0x00000000 0x3c8a7 + .debug_info 0x00000000 0xa247 build/main.o + .debug_info 0x0000a247 0xe39 build/bsp_driver_sd.o + .debug_info 0x0000b080 0x74a build/sd_diskio.o + .debug_info 0x0000b7ca 0x65a build/fatfs.o + .debug_info 0x0000be24 0x1f0 build/fatfs_platform.o + .debug_info 0x0000c014 0x1927 build/stm32f7xx_it.o + .debug_info 0x0000d93b 0x243f build/stm32f7xx_hal_msp.o + .debug_info 0x0000fd7a 0xfb5 build/stm32f7xx_hal_adc.o + .debug_info 0x00010d2f 0xd39 build/stm32f7xx_hal_adc_ex.o + .debug_info 0x00011a68 0xd0b build/stm32f7xx_hal_rcc.o + .debug_info 0x00012773 0x96b build/stm32f7xx_hal_rcc_ex.o + .debug_info 0x000130de 0x867 build/stm32f7xx_hal_gpio.o + .debug_info 0x00013945 0xb00 build/stm32f7xx_hal_pwr_ex.o + .debug_info 0x00014445 0x145b build/stm32f7xx_hal_cortex.o + .debug_info 0x000158a0 0xc0b build/stm32f7xx_hal.o + .debug_info 0x000164ab 0x1d6b build/stm32f7xx_ll_rcc.o + .debug_info 0x00018216 0xda5 build/stm32f7xx_ll_gpio.o + .debug_info 0x00018fbb 0x1ad6 build/stm32f7xx_ll_sdmmc.o + .debug_info 0x0001aa91 0x2a28 build/stm32f7xx_hal_sd.o + .debug_info 0x0001d4b9 0xb14 build/stm32f7xx_ll_spi.o + .debug_info 0x0001dfcd 0x42a3 build/stm32f7xx_hal_tim.o + .debug_info 0x00022270 0x2009 build/stm32f7xx_hal_tim_ex.o + .debug_info 0x00024279 0x19f0 build/stm32f7xx_ll_tim.o + .debug_info 0x00025c69 0xc07 build/stm32f7xx_ll_usart.o + .debug_info 0x00026870 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100644 --- a/build/diskio.lst +++ b/build/diskio.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccdXV1P2.s page 1 +ARM GAS /tmp/ccVyLLz5.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccdXV1P2.s page 1 28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/ 29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/ 30:Middlewares/Third_Party/FatFs/src/diskio.c **** - ARM GAS /tmp/ccdXV1P2.s page 2 + ARM GAS /tmp/ccVyLLz5.s page 2 31:Middlewares/Third_Party/FatFs/src/diskio.c **** /** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccdXV1P2.s page 1 71 disk_initialize: 72 .LVL3: 73 .LFB1184: - ARM GAS /tmp/ccdXV1P2.s page 3 + ARM GAS /tmp/ccVyLLz5.s page 3 45:Middlewares/Third_Party/FatFs/src/diskio.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccdXV1P2.s page 1 62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat; 111 .loc 1 62 3 is_stmt 1 view .LVU23 63:Middlewares/Third_Party/FatFs/src/diskio.c **** } - ARM GAS /tmp/ccdXV1P2.s page 4 + ARM GAS /tmp/ccVyLLz5.s page 4 112 .loc 1 63 1 is_stmt 0 view .LVU24 @@ -238,7 +238,7 @@ ARM GAS /tmp/ccdXV1P2.s page 1 80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res; 150 .loc 1 80 3 is_stmt 1 view .LVU29 81:Middlewares/Third_Party/FatFs/src/diskio.c **** - ARM GAS /tmp/ccdXV1P2.s page 5 + ARM GAS /tmp/ccVyLLz5.s page 5 82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count); @@ -298,7 +298,7 @@ ARM GAS /tmp/ccdXV1P2.s page 1 187 @ args = 0, pretend = 0, frame = 0 188 @ frame_needed = 0, uses_anonymous_args = 0 189 .loc 1 101 1 is_stmt 0 view .LVU38 - ARM GAS /tmp/ccdXV1P2.s page 6 + ARM GAS /tmp/ccVyLLz5.s page 6 190 0000 38B5 push {r3, r4, r5, lr} @@ -358,7 +358,7 @@ ARM GAS /tmp/ccdXV1P2.s page 1 116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1 117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl ( 118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */ - ARM GAS /tmp/ccdXV1P2.s page 7 + ARM GAS /tmp/ccVyLLz5.s page 7 119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */ @@ -418,7 +418,7 @@ ARM GAS /tmp/ccdXV1P2.s page 1 131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC 132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None 133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD - ARM GAS /tmp/ccdXV1P2.s page 8 + ARM GAS /tmp/ccVyLLz5.s page 8 134:Middlewares/Third_Party/FatFs/src/diskio.c **** */ @@ -446,28 +446,28 @@ ARM GAS /tmp/ccdXV1P2.s page 1 294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" - ARM GAS /tmp/ccdXV1P2.s page 9 + ARM GAS /tmp/ccVyLLz5.s page 9 DEFINED SYMBOLS *ABS*:00000000 diskio.c - /tmp/ccdXV1P2.s:20 .text.disk_status:00000000 $t - /tmp/ccdXV1P2.s:26 .text.disk_status:00000000 disk_status - /tmp/ccdXV1P2.s:60 .text.disk_status:00000014 $d - /tmp/ccdXV1P2.s:65 .text.disk_initialize:00000000 $t - /tmp/ccdXV1P2.s:71 .text.disk_initialize:00000000 disk_initialize - /tmp/ccdXV1P2.s:124 .text.disk_initialize:00000024 $d - /tmp/ccdXV1P2.s:129 .text.disk_read:00000000 $t - /tmp/ccdXV1P2.s:135 .text.disk_read:00000000 disk_read - /tmp/ccdXV1P2.s:171 .text.disk_read:00000014 $d - /tmp/ccdXV1P2.s:176 .text.disk_write:00000000 $t - /tmp/ccdXV1P2.s:182 .text.disk_write:00000000 disk_write - /tmp/ccdXV1P2.s:218 .text.disk_write:00000014 $d - /tmp/ccdXV1P2.s:223 .text.disk_ioctl:00000000 $t - /tmp/ccdXV1P2.s:229 .text.disk_ioctl:00000000 disk_ioctl - /tmp/ccdXV1P2.s:263 .text.disk_ioctl:00000014 $d - /tmp/ccdXV1P2.s:268 .text.get_fattime:00000000 $t - /tmp/ccdXV1P2.s:274 .text.get_fattime:00000000 get_fattime + /tmp/ccVyLLz5.s:20 .text.disk_status:00000000 $t + /tmp/ccVyLLz5.s:26 .text.disk_status:00000000 disk_status + /tmp/ccVyLLz5.s:60 .text.disk_status:00000014 $d + /tmp/ccVyLLz5.s:65 .text.disk_initialize:00000000 $t + /tmp/ccVyLLz5.s:71 .text.disk_initialize:00000000 disk_initialize + /tmp/ccVyLLz5.s:124 .text.disk_initialize:00000024 $d + /tmp/ccVyLLz5.s:129 .text.disk_read:00000000 $t + /tmp/ccVyLLz5.s:135 .text.disk_read:00000000 disk_read + /tmp/ccVyLLz5.s:171 .text.disk_read:00000014 $d + /tmp/ccVyLLz5.s:176 .text.disk_write:00000000 $t + /tmp/ccVyLLz5.s:182 .text.disk_write:00000000 disk_write + /tmp/ccVyLLz5.s:218 .text.disk_write:00000014 $d + /tmp/ccVyLLz5.s:223 .text.disk_ioctl:00000000 $t + /tmp/ccVyLLz5.s:229 .text.disk_ioctl:00000000 disk_ioctl + /tmp/ccVyLLz5.s:263 .text.disk_ioctl:00000014 $d + /tmp/ccVyLLz5.s:268 .text.get_fattime:00000000 $t + /tmp/ccVyLLz5.s:274 .text.get_fattime:00000000 get_fattime UNDEFINED SYMBOLS disk diff --git a/build/fatfs.lst b/build/fatfs.lst index c2e0b27..6e2c9d4 100644 --- a/build/fatfs.lst +++ b/build/fatfs.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccXTUOPr.s page 1 +ARM GAS /tmp/ccQUezj8.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccXTUOPr.s page 1 29:Src/fatfs.c **** 30:Src/fatfs.c **** void MX_FATFS_Init(void) 31:Src/fatfs.c **** { - ARM GAS /tmp/ccXTUOPr.s page 2 + ARM GAS /tmp/ccQUezj8.s page 2 28 .loc 1 31 1 view -0 @@ -118,7 +118,7 @@ ARM GAS /tmp/ccXTUOPr.s page 1 69 @ frame_needed = 0, uses_anonymous_args = 0 70 @ link register save eliminated. 47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */ - ARM GAS /tmp/ccXTUOPr.s page 3 + ARM GAS /tmp/ccQUezj8.s page 3 48:Src/fatfs.c **** return 0; @@ -169,24 +169,24 @@ ARM GAS /tmp/ccXTUOPr.s page 1 114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 115 .file 10 "Inc/sd_diskio.h" 116 .file 11 "Inc/fatfs.h" - ARM GAS /tmp/ccXTUOPr.s page 4 + ARM GAS /tmp/ccQUezj8.s page 4 DEFINED SYMBOLS *ABS*:00000000 fatfs.c - /tmp/ccXTUOPr.s:20 .text.MX_FATFS_Init:00000000 $t - /tmp/ccXTUOPr.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init - /tmp/ccXTUOPr.s:51 .text.MX_FATFS_Init:00000010 $d - /tmp/ccXTUOPr.s:97 .bss.SDPath:00000000 SDPath - /tmp/ccXTUOPr.s:103 .bss.retSD:00000000 retSD - /tmp/ccXTUOPr.s:58 .text.get_fattime:00000000 $t - /tmp/ccXTUOPr.s:64 .text.get_fattime:00000000 get_fattime - /tmp/ccXTUOPr.s:83 .bss.SDFile:00000000 SDFile - /tmp/ccXTUOPr.s:80 .bss.SDFile:00000000 $d - /tmp/ccXTUOPr.s:90 .bss.SDFatFS:00000000 SDFatFS - /tmp/ccXTUOPr.s:87 .bss.SDFatFS:00000000 $d - /tmp/ccXTUOPr.s:94 .bss.SDPath:00000000 $d - /tmp/ccXTUOPr.s:104 .bss.retSD:00000000 $d + /tmp/ccQUezj8.s:20 .text.MX_FATFS_Init:00000000 $t + /tmp/ccQUezj8.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init + /tmp/ccQUezj8.s:51 .text.MX_FATFS_Init:00000010 $d + /tmp/ccQUezj8.s:97 .bss.SDPath:00000000 SDPath + /tmp/ccQUezj8.s:103 .bss.retSD:00000000 retSD + /tmp/ccQUezj8.s:58 .text.get_fattime:00000000 $t + /tmp/ccQUezj8.s:64 .text.get_fattime:00000000 get_fattime + /tmp/ccQUezj8.s:83 .bss.SDFile:00000000 SDFile + /tmp/ccQUezj8.s:80 .bss.SDFile:00000000 $d + /tmp/ccQUezj8.s:90 .bss.SDFatFS:00000000 SDFatFS + /tmp/ccQUezj8.s:87 .bss.SDFatFS:00000000 $d + /tmp/ccQUezj8.s:94 .bss.SDPath:00000000 $d + /tmp/ccQUezj8.s:104 .bss.retSD:00000000 $d UNDEFINED SYMBOLS FATFS_LinkDriver diff --git a/build/ff.lst b/build/ff.lst index b18a9b2..9f7a5b6 100644 --- a/build/ff.lst +++ b/build/ff.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cczbjqIl.s page 1 +ARM GAS /tmp/ccQCFK4e.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 29:Middlewares/Third_Party/FatFs/src/ff.c **** ---------------------------------------------------------------------------*/ 30:Middlewares/Third_Party/FatFs/src/ff.c **** 31:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FATFS != 68300 /* Revision ID */ - ARM GAS /tmp/cczbjqIl.s page 2 + ARM GAS /tmp/ccQCFK4e.s page 2 32:Middlewares/Third_Party/FatFs/src/ff.c **** #error Wrong include file (ff.h). @@ -118,7 +118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 86:Middlewares/Third_Party/FatFs/src/ff.c **** #define _DF1S 0 87:Middlewares/Third_Party/FatFs/src/ff.c **** #define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ 88:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - ARM GAS /tmp/cczbjqIl.s page 3 + ARM GAS /tmp/ccQCFK4e.s page 3 89:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ @@ -178,7 +178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 143:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \ 144:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \ 145:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \ - ARM GAS /tmp/cczbjqIl.s page 4 + ARM GAS /tmp/ccQCFK4e.s page 4 146:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ @@ -238,7 +238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 200:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ 201:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ 202:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - ARM GAS /tmp/cczbjqIl.s page 5 + ARM GAS /tmp/ccQCFK4e.s page 5 203:Middlewares/Third_Party/FatFs/src/ff.c **** 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ @@ -298,7 +298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 257:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \ 258:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \ 259:Middlewares/Third_Party/FatFs/src/ff.c **** 0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF} - ARM GAS /tmp/cczbjqIl.s page 6 + ARM GAS /tmp/ccQCFK4e.s page 6 260:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 314:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LOSS 0x01 /* Out of 8.3 format */ 315:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LFN 0x02 /* Force to create LFN entry */ 316:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LAST 0x04 /* Last segment */ - ARM GAS /tmp/cczbjqIl.s page 7 + ARM GAS /tmp/ccQCFK4e.s page 7 317:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_BODY 0x08 /* Lower case flag (body) */ @@ -418,7 +418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 371:Middlewares/Third_Party/FatFs/src/ff.c **** #define BS_BootCode32 90 /* FAT32: Boot code (420-byte) */ 372:Middlewares/Third_Party/FatFs/src/ff.c **** 373:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_ZeroedEx 11 /* exFAT: MBZ field (53-byte) */ - ARM GAS /tmp/cczbjqIl.s page 8 + ARM GAS /tmp/ccQCFK4e.s page 8 374:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_VolOfsEx 64 /* exFAT: Volume offset from top of the drive [sector] (QWORD) */ @@ -478,7 +478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 428:Middlewares/Third_Party/FatFs/src/ff.c **** #define XDIR_FileSize 56 /* exFAT: File/Directory size (QWORD) */ 429:Middlewares/Third_Party/FatFs/src/ff.c **** 430:Middlewares/Third_Party/FatFs/src/ff.c **** #define SZDIRE 32 /* Size of a directory entry */ - ARM GAS /tmp/cczbjqIl.s page 9 + ARM GAS /tmp/ccQCFK4e.s page 9 431:Middlewares/Third_Party/FatFs/src/ff.c **** #define DDEM 0xE5 /* Deleted directory entry mark set to DIR_Name[0] */ @@ -538,7 +538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 485:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS == _MIN_SS 486:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((UINT)_MAX_SS) /* Fixed sector size */ 487:Middlewares/Third_Party/FatFs/src/ff.c **** #else - ARM GAS /tmp/cczbjqIl.s page 10 + ARM GAS /tmp/ccQCFK4e.s page 10 488:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((fs)->ssize) /* Variable sector size */ @@ -598,7 +598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 542:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 543:Middlewares/Third_Party/FatFs/src/ff.c **** 544:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 0 /* Non-LFN configuration */ - ARM GAS /tmp/cczbjqIl.s page 11 + ARM GAS /tmp/ccQCFK4e.s page 11 545:Middlewares/Third_Party/FatFs/src/ff.c **** #define DEF_NAMBUF @@ -658,7 +658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 599:Middlewares/Third_Party/FatFs/src/ff.c **** 600:Middlewares/Third_Party/FatFs/src/ff.c **** 601:Middlewares/Third_Party/FatFs/src/ff.c **** /*-------------------------------------------------------------------------- - ARM GAS /tmp/cczbjqIl.s page 12 + ARM GAS /tmp/ccQCFK4e.s page 12 602:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 61 .cfi_startproc 62 @ args = 0, pretend = 0, frame = 0 63 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/cczbjqIl.s page 13 + ARM GAS /tmp/ccQCFK4e.s page 13 64 @ link register save eliminated. @@ -778,7 +778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 641:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[6]; 642:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[5]; 643:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[4]; - ARM GAS /tmp/cczbjqIl.s page 14 + ARM GAS /tmp/ccQCFK4e.s page 14 644:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[3]; @@ -838,7 +838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 140 0000 0170 strb r1, [r0] 141 .loc 1 663 22 is_stmt 1 view .LVU35 142 .LVL13: - ARM GAS /tmp/cczbjqIl.s page 15 + ARM GAS /tmp/ccQCFK4e.s page 15 664:Middlewares/Third_Party/FatFs/src/ff.c **** *ptr++ = (BYTE)val; val >>= 8; @@ -898,7 +898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 686:Middlewares/Third_Party/FatFs/src/ff.c **** 687:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 688:Middlewares/Third_Party/FatFs/src/ff.c **** /* String functions */ - ARM GAS /tmp/cczbjqIl.s page 16 + ARM GAS /tmp/ccQCFK4e.s page 16 689:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ @@ -958,7 +958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 219 mem_set: 220 .LFB1188: 703:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 17 + ARM GAS /tmp/ccQCFK4e.s page 17 704:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill memory block */ @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 718:Middlewares/Third_Party/FatFs/src/ff.c **** int r = 0; 263 .loc 1 718 2 view .LVU72 264 .L12: - ARM GAS /tmp/cczbjqIl.s page 18 + ARM GAS /tmp/ccQCFK4e.s page 18 719:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 309 .loc 1 730 2 is_stmt 1 view .LVU85 310 .loc 1 730 8 is_stmt 0 view .LVU86 311 0002 00E0 b .L14 - ARM GAS /tmp/cczbjqIl.s page 19 + ARM GAS /tmp/ccQCFK4e.s page 19 312 .LVL33: @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 756:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) { 757:Middlewares/Third_Party/FatFs/src/ff.c **** ff_rel_grant(fs->sobj); 758:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 20 + ARM GAS /tmp/ccQCFK4e.s page 20 759:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 369 000e 0133 adds r3, r3, #1 370 .LVL39: 371 .L18: - ARM GAS /tmp/cczbjqIl.s page 21 + ARM GAS /tmp/ccQCFK4e.s page 21 779:Middlewares/Third_Party/FatFs/src/ff.c **** if (Files[i].fs) { /* Existing entry */ @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 410 0040 022B cmp r3, #2 411 0042 0BD0 beq .L30 789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec - ARM GAS /tmp/cczbjqIl.s page 22 + ARM GAS /tmp/ccQCFK4e.s page 22 790:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 455 .loc 1 789 35 discriminator 2 view .LVU131 456 006c 1220 movs r0, #18 457 .LVL46: - ARM GAS /tmp/cczbjqIl.s page 23 + ARM GAS /tmp/ccQCFK4e.s page 23 789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 501 .LVL52: 502 .L37: 503 .loc 1 802 44 is_stmt 1 discriminator 4 view .LVU142 - ARM GAS /tmp/cczbjqIl.s page 24 + ARM GAS /tmp/ccQCFK4e.s page 24 504 0004 0130 adds r0, r0, #1 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 550 0000 70B4 push {r4, r5, r6} 551 .LCFI3: 552 .cfi_def_cfa_offset 12 - ARM GAS /tmp/cczbjqIl.s page 25 + ARM GAS /tmp/ccQCFK4e.s page 25 553 .cfi_offset 4, -12 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 598 0030 9442 cmp r4, r2 599 0032 E8D1 bne .L42 600 .L43: - ARM GAS /tmp/cczbjqIl.s page 26 + ARM GAS /tmp/ccQCFK4e.s page 26 820:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 636 .LVL63: 823:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ; 637 .loc 1 823 45 is_stmt 0 discriminator 4 view .LVU180 - ARM GAS /tmp/cczbjqIl.s page 27 + ARM GAS /tmp/ccQCFK4e.s page 27 638 005a F7E7 b .L45 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 680 0088 01EB0311 add r1, r1, r3, lsl #4 681 008c 8A81 strh r2, [r1, #12] @ movhi 834:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 28 + ARM GAS /tmp/ccQCFK4e.s page 28 835:Middlewares/Third_Party/FatFs/src/ff.c **** return i + 1; @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 726 @ args = 0, pretend = 0, frame = 0 727 @ frame_needed = 0, uses_anonymous_args = 0 728 @ link register save eliminated. - ARM GAS /tmp/cczbjqIl.s page 29 + ARM GAS /tmp/ccQCFK4e.s page 29 844:Middlewares/Third_Party/FatFs/src/ff.c **** WORD n; @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 772 0026 33B9 cbnz r3, .L65 773 .L62: 774 .LVL74: - ARM GAS /tmp/cczbjqIl.s page 30 + ARM GAS /tmp/ccQCFK4e.s page 30 775 .loc 1 853 15 is_stmt 1 discriminator 1 view .LVU224 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 817 @ args = 0, pretend = 0, frame = 0 818 @ frame_needed = 0, uses_anonymous_args = 0 819 @ link register save eliminated. - ARM GAS /tmp/cczbjqIl.s page 31 + ARM GAS /tmp/ccQCFK4e.s page 31 867:Middlewares/Third_Party/FatFs/src/ff.c **** UINT i; @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 860 .loc 1 870 38 is_stmt 0 discriminator 1 view .LVU245 861 001c 1A01 lsls r2, r3, #4 862 001e 0024 movs r4, #0 - ARM GAS /tmp/cczbjqIl.s page 32 + ARM GAS /tmp/ccQCFK4e.s page 32 863 0020 8C50 str r4, [r1, r2] @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 884:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs /* File system object */ 885:Middlewares/Third_Party/FatFs/src/ff.c **** ) 886:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cczbjqIl.s page 33 + ARM GAS /tmp/ccQCFK4e.s page 33 887:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect; @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 941:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 942:Middlewares/Third_Party/FatFs/src/ff.c **** 943:Middlewares/Third_Party/FatFs/src/ff.c **** static - ARM GAS /tmp/cczbjqIl.s page 34 + ARM GAS /tmp/ccQCFK4e.s page 34 944:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT sync_fs ( /* FR_OK:succeeded, !=0:error */ @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 989:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */ 911 .loc 1 989 2 is_stmt 1 view .LVU255 912 .loc 1 989 16 is_stmt 0 view .LVU256 - ARM GAS /tmp/cczbjqIl.s page 35 + ARM GAS /tmp/ccQCFK4e.s page 35 913 0002 8369 ldr r3, [r0, #24] @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1011:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */ 1012:Middlewares/Third_Party/FatFs/src/ff.c **** val = 1; /* Internal error */ 1013:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 36 + ARM GAS /tmp/ccQCFK4e.s page 36 1014:Middlewares/Third_Party/FatFs/src/ff.c **** } else { @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1068:Middlewares/Third_Party/FatFs/src/ff.c **** 1069:Middlewares/Third_Party/FatFs/src/ff.c **** return val; 1070:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 37 + ARM GAS /tmp/ccQCFK4e.s page 37 1071:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1125:Middlewares/Third_Party/FatFs/src/ff.c **** break; 1126:Middlewares/Third_Party/FatFs/src/ff.c **** } 1127:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 38 + ARM GAS /tmp/ccQCFK4e.s page 38 1128:Middlewares/Third_Party/FatFs/src/ff.c **** return res; @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1182:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/ 1183:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set/Clear a block of allocation bitmap */ 1184:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/ - ARM GAS /tmp/cczbjqIl.s page 39 + ARM GAS /tmp/ccQCFK4e.s page 39 1185:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1239:Middlewares/Third_Party/FatFs/src/ff.c **** 1240:Middlewares/Third_Party/FatFs/src/ff.c **** 1241:Middlewares/Third_Party/FatFs/src/ff.c **** /*---------------------------------------------*/ - ARM GAS /tmp/cczbjqIl.s page 40 + ARM GAS /tmp/ccQCFK4e.s page 40 1242:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill the last fragment of the FAT chain */ @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1296:Middlewares/Third_Party/FatFs/src/ff.c **** do { 1297:Middlewares/Third_Party/FatFs/src/ff.c **** nxt = get_fat(obj, clst); /* Get cluster status */ 1298:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 0) break; /* Empty cluster? */ - ARM GAS /tmp/cczbjqIl.s page 41 + ARM GAS /tmp/ccQCFK4e.s page 41 1299:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 1) return FR_INT_ERR; /* Internal error? */ @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1353:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD clst /* Cluster# to stretch, 0:Create a new chain */ 1354:Middlewares/Third_Party/FatFs/src/ff.c **** ) 1355:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cczbjqIl.s page 42 + ARM GAS /tmp/ccQCFK4e.s page 42 1356:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD cs, ncl, scl; @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1410:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ 1411:Middlewares/Third_Party/FatFs/src/ff.c **** } 1412:Middlewares/Third_Party/FatFs/src/ff.c **** res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */ - ARM GAS /tmp/cczbjqIl.s page 43 + ARM GAS /tmp/ccQCFK4e.s page 43 1413:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) { @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 963 .loc 1 1450 2 is_stmt 1 view .LVU272 964 .loc 1 1450 21 is_stmt 0 view .LVU273 965 0006 9089 ldrh r0, [r2, #12] - ARM GAS /tmp/cczbjqIl.s page 44 + ARM GAS /tmp/ccQCFK4e.s page 44 966 .LVL92: @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1005 .LVL100: 1006 .loc 1 1457 12 view .LVU292 1007 0022 0844 add r0, r0, r1 - ARM GAS /tmp/cczbjqIl.s page 45 + ARM GAS /tmp/ccQCFK4e.s page 45 1008 .L86: @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1499:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz; 1500:Middlewares/Third_Party/FatFs/src/ff.c **** } 1501:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = clust2sect(fs, clst); - ARM GAS /tmp/cczbjqIl.s page 46 + ARM GAS /tmp/ccQCFK4e.s page 46 1502:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1556:Middlewares/Third_Party/FatFs/src/ff.c **** if (_FS_EXFAT) dp->obj.stat |= 4; /* The directory needs to be updated */ 1557:Middlewares/Third_Party/FatFs/src/ff.c **** if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */ 1558:Middlewares/Third_Party/FatFs/src/ff.c **** mem_set(fs->win, 0, SS(fs)); /* Clear window buffer */ - ARM GAS /tmp/cczbjqIl.s page 47 + ARM GAS /tmp/ccQCFK4e.s page 47 1559:Middlewares/Third_Party/FatFs/src/ff.c **** for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill t @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1613:Middlewares/Third_Party/FatFs/src/ff.c **** } 1614:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_next(dp, 1); 1615:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK); /* Next entry with table stretch enabled */ - ARM GAS /tmp/cczbjqIl.s page 48 + ARM GAS /tmp/ccQCFK4e.s page 48 1616:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1052 .L91: 1641:Middlewares/Third_Party/FatFs/src/ff.c **** cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16; 1642:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 49 + ARM GAS /tmp/ccQCFK4e.s page 49 1643:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1090 .LCFI11: 1091 .cfi_def_cfa_offset 16 1092 .cfi_offset 4, -16 - ARM GAS /tmp/cczbjqIl.s page 50 + ARM GAS /tmp/ccQCFK4e.s page 50 1093 .cfi_offset 5, -12 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1666:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/ 1667:Middlewares/Third_Party/FatFs/src/ff.c **** /* FAT-LFN: LFN handling */ 1668:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/ - ARM GAS /tmp/cczbjqIl.s page 51 + ARM GAS /tmp/ccQCFK4e.s page 51 1669:Middlewares/Third_Party/FatFs/src/ff.c **** static @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1723:Middlewares/Third_Party/FatFs/src/ff.c **** 1724:Middlewares/Third_Party/FatFs/src/ff.c **** i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13; /* Offset in the LFN buffer */ 1725:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 52 + ARM GAS /tmp/ccQCFK4e.s page 52 1726:Middlewares/Third_Party/FatFs/src/ff.c **** for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */ @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1780:Middlewares/Third_Party/FatFs/src/ff.c **** 1781:Middlewares/Third_Party/FatFs/src/ff.c **** 1782:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 53 + ARM GAS /tmp/ccQCFK4e.s page 53 1783:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 && !_FS_READONLY @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1837:Middlewares/Third_Party/FatFs/src/ff.c **** } 1838:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_LFN != 0 && !_FS_READONLY */ 1839:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 54 + ARM GAS /tmp/ccQCFK4e.s page 54 1840:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1894:Middlewares/Third_Party/FatFs/src/ff.c **** const WCHAR* name /* File name to be calculated */ 1895:Middlewares/Third_Party/FatFs/src/ff.c **** ) 1896:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cczbjqIl.s page 55 + ARM GAS /tmp/ccQCFK4e.s page 55 1897:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR chr; @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1951:Middlewares/Third_Party/FatFs/src/ff.c **** if ((si % SZDIRE) == 0) si += 2; /* Skip entry type field */ 1952:Middlewares/Third_Party/FatFs/src/ff.c **** w = ff_convert(ld_word(dirb + si), 0); /* Get a character and Unicode -> OEM */ 1953:Middlewares/Third_Party/FatFs/src/ff.c **** if (_DF1S && w >= 0x100) { /* Is it a double byte char? (always false at SBCS cfg) */ - ARM GAS /tmp/cczbjqIl.s page 56 + ARM GAS /tmp/ccQCFK4e.s page 56 1954:Middlewares/Third_Party/FatFs/src/ff.c **** fno->fname[di++] = (char)(w >> 8); /* Put 1st byte of the DBC */ @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2008:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res; 2009:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(dp->obj.fs, dp->sect); 2010:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res; - ARM GAS /tmp/cczbjqIl.s page 57 + ARM GAS /tmp/ccQCFK4e.s page 57 2011:Middlewares/Third_Party/FatFs/src/ff.c **** if (dp->dir[XDIR_Type] != 0xC1) return FR_INT_ERR; @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2065:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(dirb + XDIR_SetSum, xdir_sum(dirb)); 2066:Middlewares/Third_Party/FatFs/src/ff.c **** nent = dirb[XDIR_NumSec] + 1; 2067:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 58 + ARM GAS /tmp/ccQCFK4e.s page 58 2068:Middlewares/Third_Party/FatFs/src/ff.c **** /* Store the set of directory to the volume */ @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2122:Middlewares/Third_Party/FatFs/src/ff.c **** 2123:Middlewares/Third_Party/FatFs/src/ff.c **** 2124:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 59 + ARM GAS /tmp/ccQCFK4e.s page 59 2125:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 1 || _FS_RPATH >= 2 || _USE_LABEL || _FS_EXFAT @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2179:Middlewares/Third_Party/FatFs/src/ff.c **** ord = (c == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0 2180:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* An SFN entry is found */ 2181:Middlewares/Third_Party/FatFs/src/ff.c **** if (ord || sum != sum_sfn(dp->dir)) { /* Is there a valid LFN? */ - ARM GAS /tmp/cczbjqIl.s page 60 + ARM GAS /tmp/ccQCFK4e.s page 60 2182:Middlewares/Third_Party/FatFs/src/ff.c **** dp->blk_ofs = 0xFFFFFFFF; /* It has no LFN. */ @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2236:Middlewares/Third_Party/FatFs/src/ff.c **** if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break; 2237:Middlewares/Third_Party/FatFs/src/ff.c **** } 2238:Middlewares/Third_Party/FatFs/src/ff.c **** if (nc == 0 && !fs->lfnbuf[ni]) break; /* Name matched? */ - ARM GAS /tmp/cczbjqIl.s page 61 + ARM GAS /tmp/ccQCFK4e.s page 61 2239:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2293:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp /* Target directory with object name to be created */ 2294:Middlewares/Third_Party/FatFs/src/ff.c **** ) 2295:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cczbjqIl.s page 62 + ARM GAS /tmp/ccQCFK4e.s page 62 2296:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT res; @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2350:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_alloc(dp, nent); /* Allocate entries */ 2351:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && --nent) { /* Set LFN entry if needed */ 2352:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(dp, dp->dptr - nent * SZDIRE); - ARM GAS /tmp/cczbjqIl.s page 63 + ARM GAS /tmp/ccQCFK4e.s page 63 2353:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2407:Middlewares/Third_Party/FatFs/src/ff.c **** do { 2408:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect); 2409:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; - ARM GAS /tmp/cczbjqIl.s page 64 + ARM GAS /tmp/ccQCFK4e.s page 64 2410:Middlewares/Third_Party/FatFs/src/ff.c **** /* Mark an entry 'deleted' */ @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1151 .loc 1 2450 2 view .LVU325 2451:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm; 1152 .loc 1 2451 2 view .LVU326 - ARM GAS /tmp/cczbjqIl.s page 65 + ARM GAS /tmp/ccQCFK4e.s page 65 2452:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2495:Middlewares/Third_Party/FatFs/src/ff.c **** } 2496:Middlewares/Third_Party/FatFs/src/ff.c **** #if _LFN_UNICODE 2497:Middlewares/Third_Party/FatFs/src/ff.c **** if (IsDBCS1(c) && i != 8 && i != 11 && IsDBCS2(dp->dir[i])) { - ARM GAS /tmp/cczbjqIl.s page 66 + ARM GAS /tmp/ccQCFK4e.s page 66 2498:Middlewares/Third_Party/FatFs/src/ff.c **** c = c << 8 | dp->dir[i++]; @@ -3958,7 +3958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1189 .loc 1 2520 11 is_stmt 1 view .LVU340 1190 0022 0A2B cmp r3, #10 1191 0024 0ED8 bhi .L109 - ARM GAS /tmp/cczbjqIl.s page 67 + ARM GAS /tmp/ccQCFK4e.s page 67 2521:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == ' ') continue; /* Skip padding spaces */ @@ -4018,7 +4018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1231 .loc 1 2527 16 view .LVU356 1232 0046 0023 movs r3, #0 1233 .LVL127: - ARM GAS /tmp/cczbjqIl.s page 68 + ARM GAS /tmp/ccQCFK4e.s page 68 1234 .loc 1 2527 16 view .LVU357 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1279 .align 1 1280 .syntax unified 1281 .thumb - ARM GAS /tmp/cczbjqIl.s page 69 + ARM GAS /tmp/ccQCFK4e.s page 69 1282 .thumb_func @@ -4138,7 +4138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2585:Middlewares/Third_Party/FatFs/src/ff.c **** if (!*pat && inf) return 1; /* (short circuit) */ 2586:Middlewares/Third_Party/FatFs/src/ff.c **** 2587:Middlewares/Third_Party/FatFs/src/ff.c **** do { - ARM GAS /tmp/cczbjqIl.s page 70 + ARM GAS /tmp/ccQCFK4e.s page 70 2588:Middlewares/Third_Party/FatFs/src/ff.c **** pp = pat; np = nam; /* Top of pattern and name to match */ @@ -4198,7 +4198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1306 0006 8A46 mov r10, r1 2623:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 /* LFN configuration */ 2624:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE b, cf; - ARM GAS /tmp/cczbjqIl.s page 71 + ARM GAS /tmp/ccQCFK4e.s page 71 2625:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR w, *lfn; @@ -4258,7 +4258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2679:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) { 2680:Middlewares/Third_Party/FatFs/src/ff.c **** w = lfn[si++]; /* Get an LFN character */ 2681:Middlewares/Third_Party/FatFs/src/ff.c **** if (!w) break; /* Break on end of the LFN */ - ARM GAS /tmp/cczbjqIl.s page 72 + ARM GAS /tmp/ccQCFK4e.s page 72 2682:Middlewares/Third_Party/FatFs/src/ff.c **** if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */ @@ -4318,7 +4318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2736:Middlewares/Third_Party/FatFs/src/ff.c **** dp->fn[NSFLAG] = cf; /* SFN is created */ 2737:Middlewares/Third_Party/FatFs/src/ff.c **** 2738:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK; - ARM GAS /tmp/cczbjqIl.s page 73 + ARM GAS /tmp/ccQCFK4e.s page 73 2739:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -4378,7 +4378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2761:Middlewares/Third_Party/FatFs/src/ff.c **** } 2762:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 2763:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) { - ARM GAS /tmp/cczbjqIl.s page 74 + ARM GAS /tmp/ccQCFK4e.s page 74 2764:Middlewares/Third_Party/FatFs/src/ff.c **** c = (BYTE)p[si++]; @@ -4438,7 +4438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1360 .loc 1 2796 2 is_stmt 1 view .LVU400 1361 .loc 1 2796 5 is_stmt 0 view .LVU401 1362 0036 002D cmp r5, #0 - ARM GAS /tmp/cczbjqIl.s page 75 + ARM GAS /tmp/ccQCFK4e.s page 75 1363 0038 44D0 beq .L125 @@ -4498,7 +4498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2791:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[i++] = c; 1404 .loc 1 2791 7 view .LVU419 1405 0066 192B cmp r3, #25 - ARM GAS /tmp/cczbjqIl.s page 76 + ARM GAS /tmp/ccQCFK4e.s page 76 1406 0068 01D8 bhi .L120 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1444 .loc 1 2770 3 is_stmt 1 view .LVU435 2770:Middlewares/Third_Party/FatFs/src/ff.c **** if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Over size or invalid dot */ 1445 .loc 1 2770 6 is_stmt 0 view .LVU436 - ARM GAS /tmp/cczbjqIl.s page 77 + ARM GAS /tmp/ccQCFK4e.s page 77 1446 0088 2E2C cmp r4, #46 @@ -4618,7 +4618,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2798:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */ 1487 .loc 1 2798 29 is_stmt 0 discriminator 1 view .LVU450 1488 00ae 0523 movs r3, #5 - ARM GAS /tmp/cczbjqIl.s page 78 + ARM GAS /tmp/ccQCFK4e.s page 78 1489 00b0 89F82430 strb r3, [r9, #36] @@ -4678,7 +4678,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2813:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ 2814:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp, /* Directory object to return last directory and found object */ 2815:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path /* Full-path string to find a file or directory */ - ARM GAS /tmp/cczbjqIl.s page 79 + ARM GAS /tmp/ccQCFK4e.s page 79 2816:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -4738,7 +4738,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2870:Middlewares/Third_Party/FatFs/src/ff.c **** break; 2871:Middlewares/Third_Party/FatFs/src/ff.c **** } 2872:Middlewares/Third_Party/FatFs/src/ff.c **** if (ns & NS_LAST) break; /* Last segment matched. Function completed. */ - ARM GAS /tmp/cczbjqIl.s page 80 + ARM GAS /tmp/ccQCFK4e.s page 80 2873:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get into the sub-directory */ @@ -4798,7 +4798,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2916:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 2917:Middlewares/Third_Party/FatFs/src/ff.c **** 2918:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 81 + ARM GAS /tmp/ccQCFK4e.s page 81 2919:Middlewares/Third_Party/FatFs/src/ff.c **** if (*path) { /* If the pointer is not a null */ @@ -4858,7 +4858,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2940:Middlewares/Third_Party/FatFs/src/ff.c **** if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */ 2941:Middlewares/Third_Party/FatFs/src/ff.c **** vol = (int)i; 2942:Middlewares/Third_Party/FatFs/src/ff.c **** *path = tt; - ARM GAS /tmp/cczbjqIl.s page 82 + ARM GAS /tmp/ccQCFK4e.s page 82 2943:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -4918,7 +4918,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2927:Middlewares/Third_Party/FatFs/src/ff.c **** } 1603 .loc 1 2927 12 is_stmt 0 view .LVU485 1604 0036 0132 adds r2, r2, #1 - ARM GAS /tmp/cczbjqIl.s page 83 + ARM GAS /tmp/ccQCFK4e.s page 83 1605 .LVL172: @@ -4978,7 +4978,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2975:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90 2976:Middlewares/Third_Party/FatFs/src/ff.c **** if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0; /* Check "FAT" string * 2977:Middlewares/Third_Party/FatFs/src/ff.c **** if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0; /* Check "FAT3" string */ - ARM GAS /tmp/cczbjqIl.s page 84 + ARM GAS /tmp/ccQCFK4e.s page 84 2978:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5038,7 +5038,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3032:Middlewares/Third_Party/FatFs/src/ff.c **** /* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */ 3033:Middlewares/Third_Party/FatFs/src/ff.c **** 3034:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fs_type = 0; /* Clear the file system object */ - ARM GAS /tmp/cczbjqIl.s page 85 + ARM GAS /tmp/ccQCFK4e.s page 85 3035:Middlewares/Third_Party/FatFs/src/ff.c **** fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */ @@ -5098,7 +5098,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3089:Middlewares/Third_Party/FatFs/src/ff.c **** fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */ 3090:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */ 3091:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 86 + ARM GAS /tmp/ccQCFK4e.s page 86 3092:Middlewares/Third_Party/FatFs/src/ff.c **** nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */ @@ -5158,7 +5158,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3146:Middlewares/Third_Party/FatFs/src/ff.c **** 3147:Middlewares/Third_Party/FatFs/src/ff.c **** /* Boundaries and Limits */ 3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->n_fatent = nclst + 2; /* Number of FAT entries */ - ARM GAS /tmp/cczbjqIl.s page 87 + ARM GAS /tmp/ccQCFK4e.s page 87 3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */ @@ -5218,7 +5218,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3203:Middlewares/Third_Party/FatFs/src/ff.c **** clear_lock(fs); 3204:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3205:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK; - ARM GAS /tmp/cczbjqIl.s page 88 + ARM GAS /tmp/ccQCFK4e.s page 88 3206:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5278,7 +5278,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3260:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_mount ( 3261:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/ 3262:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path, /* Logical drive number to be mounted/unmounted */ - ARM GAS /tmp/cczbjqIl.s page 89 + ARM GAS /tmp/ccQCFK4e.s page 89 3263:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */ @@ -5338,7 +5338,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3317:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 3318:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dw, cl, bcs, clst, sc; 3319:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs; - ARM GAS /tmp/cczbjqIl.s page 90 + ARM GAS /tmp/ccQCFK4e.s page 90 3320:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -5398,7 +5398,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3374:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_CrtTime, dw); /* Set created time */ 3375:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_CrtTime10] = 0; 3376:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_ModTime, dw); /* Set modified time */ - ARM GAS /tmp/cczbjqIl.s page 91 + ARM GAS /tmp/ccQCFK4e.s page 91 3377:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_ModTime10] = 0; @@ -5458,7 +5458,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3431:Middlewares/Third_Party/FatFs/src/ff.c **** } 3432:Middlewares/Third_Party/FatFs/src/ff.c **** #else /* R/O configuration */ 3433:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/cczbjqIl.s page 92 + ARM GAS /tmp/ccQCFK4e.s page 92 3434:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */ @@ -5518,7 +5518,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3488:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR; 3489:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3490:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 93 + ARM GAS /tmp/ccQCFK4e.s page 93 3491:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5578,7 +5578,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3545:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3546:Middlewares/Third_Party/FatFs/src/ff.c **** { 3547:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */ - ARM GAS /tmp/cczbjqIl.s page 94 + ARM GAS /tmp/ccQCFK4e.s page 94 3548:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5638,7 +5638,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3602:Middlewares/Third_Party/FatFs/src/ff.c **** 3603:Middlewares/Third_Party/FatFs/src/ff.c **** 3604:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 95 + ARM GAS /tmp/ccQCFK4e.s page 95 3605:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -5698,7 +5698,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3659:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */ 3660:Middlewares/Third_Party/FatFs/src/ff.c **** } 3661:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_TINY - ARM GAS /tmp/cczbjqIl.s page 96 + ARM GAS /tmp/ccQCFK4e.s page 96 3662:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back s @@ -5758,7 +5758,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3716:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_DIRTY; 3717:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3718:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 97 + ARM GAS /tmp/ccQCFK4e.s page 97 3719:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -5818,7 +5818,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3773:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_AccTime, 0); 3774:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj); /* Restore it to the directory */ 3775:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/cczbjqIl.s page 98 + ARM GAS /tmp/ccQCFK4e.s page 98 3776:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); @@ -5878,7 +5878,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3830:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3831:Middlewares/Third_Party/FatFs/src/ff.c **** { 3832:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.fs = 0; /* Invalidate file object */ - ARM GAS /tmp/cczbjqIl.s page 99 + ARM GAS /tmp/ccQCFK4e.s page 99 3833:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5938,7 +5938,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3887:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT 3888:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) { 3889:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_scl = dj.obj.c_scl; - ARM GAS /tmp/cczbjqIl.s page 100 + ARM GAS /tmp/ccQCFK4e.s page 100 3890:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_size = dj.obj.c_size; @@ -5998,7 +5998,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3944:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = fs->cdir; /* Start to follow upper directory from current directory */ 3945:Middlewares/Third_Party/FatFs/src/ff.c **** while ((ccl = dj.obj.sclust) != 0) { /* Repeat while current directory is a sub-directory */ 3946:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(&dj, 1 * SZDIRE); /* Get parent directory */ - ARM GAS /tmp/cczbjqIl.s page 101 + ARM GAS /tmp/ccQCFK4e.s page 101 3947:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -6058,7 +6058,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4001:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_lseek ( 4002:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */ 4003:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs /* File pointer from top of file */ - ARM GAS /tmp/cczbjqIl.s page 102 + ARM GAS /tmp/ccQCFK4e.s page 102 4004:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -6118,7 +6118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4058:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ 4059:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY 4060:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY - ARM GAS /tmp/cczbjqIl.s page 103 + ARM GAS /tmp/ccQCFK4e.s page 103 4061:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ @@ -6178,7 +6178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4115:Middlewares/Third_Party/FatFs/src/ff.c **** ofs = 0; break; 4116:Middlewares/Third_Party/FatFs/src/ff.c **** } 4117:Middlewares/Third_Party/FatFs/src/ff.c **** } else - ARM GAS /tmp/cczbjqIl.s page 104 + ARM GAS /tmp/ccQCFK4e.s page 104 4118:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -6238,7 +6238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4172:Middlewares/Third_Party/FatFs/src/ff.c **** 4173:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dp) return FR_INVALID_OBJECT; 4174:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 105 + ARM GAS /tmp/ccQCFK4e.s page 105 4175:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */ @@ -6298,7 +6298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4229:Middlewares/Third_Party/FatFs/src/ff.c **** /* Close Directory */ 4230:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 4231:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 106 + ARM GAS /tmp/ccQCFK4e.s page 106 4232:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_closedir ( @@ -6358,7 +6358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4286:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory now */ 4287:Middlewares/Third_Party/FatFs/src/ff.c **** } 4288:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF(); - ARM GAS /tmp/cczbjqIl.s page 107 + ARM GAS /tmp/ccQCFK4e.s page 107 4289:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -6418,7 +6418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4343:Middlewares/Third_Party/FatFs/src/ff.c **** 4344:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_FIND */ 4345:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 108 + ARM GAS /tmp/ccQCFK4e.s page 108 4346:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6478,7 +6478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4400:Middlewares/Third_Party/FatFs/src/ff.c **** 4401:Middlewares/Third_Party/FatFs/src/ff.c **** 4402:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */ - ARM GAS /tmp/cczbjqIl.s page 109 + ARM GAS /tmp/ccQCFK4e.s page 109 4403:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&path, &fs, 0); @@ -6538,7 +6538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4457:Middlewares/Third_Party/FatFs/src/ff.c **** } 4458:Middlewares/Third_Party/FatFs/src/ff.c **** } 4459:Middlewares/Third_Party/FatFs/src/ff.c **** *nclst = nfree; /* Return the free clusters */ - ARM GAS /tmp/cczbjqIl.s page 110 + ARM GAS /tmp/ccQCFK4e.s page 110 4460:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst = nfree; /* Now free_clst is valid */ @@ -6598,7 +6598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4514:Middlewares/Third_Party/FatFs/src/ff.c **** 4515:Middlewares/Third_Party/FatFs/src/ff.c **** LEAVE_FF(fs, res); 4516:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 111 + ARM GAS /tmp/ccQCFK4e.s page 111 4517:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6658,7 +6658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4571:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.obj.attr & AM_DIR) { /* Is it a sub-directory? */ 4572:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_RPATH != 0 4573:Middlewares/Third_Party/FatFs/src/ff.c **** if (dclst == fs->cdir) { /* Is it the current directory? */ - ARM GAS /tmp/cczbjqIl.s page 112 + ARM GAS /tmp/ccQCFK4e.s page 112 4574:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED; @@ -6718,7 +6718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4628:Middlewares/Third_Party/FatFs/src/ff.c **** UINT n; 4629:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dsc, dcl, pcl, tm; 4630:Middlewares/Third_Party/FatFs/src/ff.c **** DEF_NAMBUF - ARM GAS /tmp/cczbjqIl.s page 113 + ARM GAS /tmp/ccQCFK4e.s page 113 4631:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6778,7 +6778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4685:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_GenFlags] = 3; /* Initialize the object flag (contiguous) */ 4686:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_Attr] = AM_DIR; /* Attribute */ 4687:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj); - ARM GAS /tmp/cczbjqIl.s page 114 + ARM GAS /tmp/ccQCFK4e.s page 114 4688:Middlewares/Third_Party/FatFs/src/ff.c **** } else @@ -6838,7 +6838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4742:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { /* Object to be renamed is found */ 4743:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT 4744:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) { /* At exFAT */ - ARM GAS /tmp/cczbjqIl.s page 115 + ARM GAS /tmp/ccQCFK4e.s page 115 4745:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE nf, nn; @@ -6898,7 +6898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4799:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { 4800:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_remove(&djo); /* Remove old entry */ 4801:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/cczbjqIl.s page 116 + ARM GAS /tmp/ccQCFK4e.s page 116 4802:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); @@ -6958,7 +6958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4856:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); 4857:Middlewares/Third_Party/FatFs/src/ff.c **** } 4858:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 117 + ARM GAS /tmp/ccQCFK4e.s page 117 4859:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF(); @@ -7018,7 +7018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4913:Middlewares/Third_Party/FatFs/src/ff.c **** 4914:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LABEL 4915:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ - ARM GAS /tmp/cczbjqIl.s page 118 + ARM GAS /tmp/ccQCFK4e.s page 118 4916:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get Volume Label */ @@ -7078,7 +7078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4970:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 4971:Middlewares/Third_Party/FatFs/src/ff.c **** } while (di < 11); 4972:Middlewares/Third_Party/FatFs/src/ff.c **** do { /* Truncate trailing spaces */ - ARM GAS /tmp/cczbjqIl.s page 119 + ARM GAS /tmp/ccQCFK4e.s page 119 4973:Middlewares/Third_Party/FatFs/src/ff.c **** label[di] = 0; @@ -7138,7 +7138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5027:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&label, &fs, FA_WRITE); 5028:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) LEAVE_FF(fs, res); 5029:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.fs = fs; - ARM GAS /tmp/cczbjqIl.s page 120 + ARM GAS /tmp/ccQCFK4e.s page 120 5030:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -7198,7 +7198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5084:Middlewares/Third_Party/FatFs/src/ff.c **** } 5085:Middlewares/Third_Party/FatFs/src/ff.c **** 5086:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set volume label */ - ARM GAS /tmp/cczbjqIl.s page 121 + ARM GAS /tmp/ccQCFK4e.s page 121 5087:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = 0; /* Open root directory */ @@ -7258,7 +7258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5141:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */ 5142:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t fsz, /* File size to be expanded to */ 5143:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Operation mode 0:Find and prepare or 1:Find and allocate */ - ARM GAS /tmp/cczbjqIl.s page 122 + ARM GAS /tmp/ccQCFK4e.s page 122 5144:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -7318,7 +7318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5198:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Set it as suggested point for next allocation */ 5199:Middlewares/Third_Party/FatFs/src/ff.c **** lclst = scl - 1; 5200:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 123 + ARM GAS /tmp/ccQCFK4e.s page 123 5201:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7378,7 +7378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5255:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */ 5256:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ 5257:Middlewares/Third_Party/FatFs/src/ff.c **** if (csect == 0) { /* On the cluster boundary? */ - ARM GAS /tmp/cczbjqIl.s page 124 + ARM GAS /tmp/ccQCFK4e.s page 124 5258:Middlewares/Third_Party/FatFs/src/ff.c **** clst = (fp->fptr == 0) ? /* On the top of the file? */ @@ -7438,7 +7438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5312:Middlewares/Third_Party/FatFs/src/ff.c **** static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0}; /* Cluster size boundary for FAT32 volume (12 5313:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE fmt, sys, *buf, *pte, pdrv, part; 5314:Middlewares/Third_Party/FatFs/src/ff.c **** WORD ss; - ARM GAS /tmp/cczbjqIl.s page 125 + ARM GAS /tmp/ccQCFK4e.s page 125 5315:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD szb_buf, sz_buf, sz_blk, n_clst, pau, sect, nsect, n; @@ -7498,7 +7498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5369:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 128) return FR_MKFS_ABORTED; /* Check if volume size is >=128s */ 5370:Middlewares/Third_Party/FatFs/src/ff.c **** 5371:Middlewares/Third_Party/FatFs/src/ff.c **** /* Pre-determine the FAT type */ - ARM GAS /tmp/cczbjqIl.s page 126 + ARM GAS /tmp/ccQCFK4e.s page 126 5372:Middlewares/Third_Party/FatFs/src/ff.c **** do { @@ -7558,7 +7558,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5426:Middlewares/Third_Party/FatFs/src/ff.c **** si++; break; /* Store the up-case char if exist */ 5427:Middlewares/Third_Party/FatFs/src/ff.c **** } 5428:Middlewares/Third_Party/FatFs/src/ff.c **** for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ; /* Get r - ARM GAS /tmp/cczbjqIl.s page 127 + ARM GAS /tmp/ccQCFK4e.s page 127 5429:Middlewares/Third_Party/FatFs/src/ff.c **** if (j >= 128) { @@ -7618,7 +7618,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5483:Middlewares/Third_Party/FatFs/src/ff.c **** n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */ 5484:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect, n) != RES_OK) return FR_DISK_ERR; 5485:Middlewares/Third_Party/FatFs/src/ff.c **** sect += n; nsect -= n; - ARM GAS /tmp/cczbjqIl.s page 128 + ARM GAS /tmp/ccQCFK4e.s page 128 5486:Middlewares/Third_Party/FatFs/src/ff.c **** } while (nsect); @@ -7678,7 +7678,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5540:Middlewares/Third_Party/FatFs/src/ff.c **** for ( ; j < 11; j++) { 5541:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */ 5542:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect++, 1) != RES_OK) return FR_DISK_ERR; - ARM GAS /tmp/cczbjqIl.s page 129 + ARM GAS /tmp/ccQCFK4e.s page 129 5543:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7738,7 +7738,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5597:Middlewares/Third_Party/FatFs/src/ff.c **** if (!au && (au = pau / 2) != 0) continue; /* Adjust cluster size and retry */ 5598:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 5599:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 130 + ARM GAS /tmp/ccQCFK4e.s page 130 5600:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7798,7 +7798,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */ 5655:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ 5656:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */ - ARM GAS /tmp/cczbjqIl.s page 131 + ARM GAS /tmp/ccQCFK4e.s page 131 5657:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_BootSig] = 0x29; /* Extended boot signature */ @@ -7858,7 +7858,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5711:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 5712:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol >= 0x10000) { 5713:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x06; /* FAT12/16 (>=64KS) */ - ARM GAS /tmp/cczbjqIl.s page 132 + ARM GAS /tmp/ccQCFK4e.s page 132 5714:Middlewares/Third_Party/FatFs/src/ff.c **** } else { @@ -7918,7 +7918,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5768:Middlewares/Third_Party/FatFs/src/ff.c **** 5769:Middlewares/Third_Party/FatFs/src/ff.c **** 5770:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(pdrv); - ARM GAS /tmp/cczbjqIl.s page 133 + ARM GAS /tmp/ccQCFK4e.s page 133 5771:Middlewares/Third_Party/FatFs/src/ff.c **** if (stat & STA_NOINIT) return FR_NOT_READY; @@ -7978,7 +7978,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5825:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_STRFUNC 5826:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 5827:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get a string from the file */ - ARM GAS /tmp/cczbjqIl.s page 134 + ARM GAS /tmp/ccQCFK4e.s page 134 5828:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ @@ -8038,7 +8038,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5882:Middlewares/Third_Party/FatFs/src/ff.c **** } 5883:Middlewares/Third_Party/FatFs/src/ff.c **** c = ff_convert(c, 1); /* OEM -> Unicode */ 5884:Middlewares/Third_Party/FatFs/src/ff.c **** if (!c) c = '?'; - ARM GAS /tmp/cczbjqIl.s page 135 + ARM GAS /tmp/ccQCFK4e.s page 135 5885:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -8098,7 +8098,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5939:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xC0 | c >> 6); 5940:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* 16-bit */ 5941:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xE0 | c >> 12); - ARM GAS /tmp/cczbjqIl.s page 136 + ARM GAS /tmp/ccQCFK4e.s page 136 5942:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0x80 | (c >> 6 & 0x3F)); @@ -8158,7 +8158,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1640 @ link register save eliminated. 5992:Middlewares/Third_Party/FatFs/src/ff.c **** pb->fp = fp; 1641 .loc 1 5992 2 view .LVU493 - ARM GAS /tmp/cczbjqIl.s page 137 + ARM GAS /tmp/ccQCFK4e.s page 137 1642 .loc 1 5992 9 is_stmt 0 view .LVU494 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1688 000c 1A78 ldrb r2, [r3] @ zero_extendqisi2 3224:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_REENTRANT 1689 .loc 1 3224 21 discriminator 2 view .LVU507 - ARM GAS /tmp/cczbjqIl.s page 138 + ARM GAS /tmp/ccQCFK4e.s page 138 1690 000e A2B1 cbz r2, .L151 @@ -8278,7 +8278,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3241:Middlewares/Third_Party/FatFs/src/ff.c **** return res; 1729 .loc 1 3241 33 discriminator 1 view .LVU523 1730 002e F5E7 b .L148 - ARM GAS /tmp/cczbjqIl.s page 139 + ARM GAS /tmp/ccQCFK4e.s page 139 1731 .LVL188: @@ -8338,7 +8338,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1776 .LVL197: 1777 .LFB1196: 886:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect; - ARM GAS /tmp/cczbjqIl.s page 140 + ARM GAS /tmp/ccQCFK4e.s page 140 1778 .loc 1 886 1 is_stmt 1 view -0 @@ -8398,7 +8398,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 894:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DISK_ERR; 1818 .loc 1 894 7 view .LVU550 1819 0016 0123 movs r3, #1 - ARM GAS /tmp/cczbjqIl.s page 141 + ARM GAS /tmp/ccQCFK4e.s page 141 1820 0018 3A46 mov r2, r7 @@ -8458,7 +8458,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1858 003c 0123 movs r3, #1 1859 003e 3A46 mov r2, r7 1860 0040 4146 mov r1, r8 - ARM GAS /tmp/cczbjqIl.s page 142 + ARM GAS /tmp/ccQCFK4e.s page 142 1861 0042 6078 ldrb r0, [r4, #1] @ zero_extendqisi2 @@ -8518,7 +8518,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1907 .loc 1 920 5 view .LVU576 1908 0004 8B42 cmp r3, r1 1909 0006 02D1 bne .L169 - ARM GAS /tmp/cczbjqIl.s page 143 + ARM GAS /tmp/ccQCFK4e.s page 143 917:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -8578,7 +8578,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1950 .L165: 929:Middlewares/Third_Party/FatFs/src/ff.c **** } 1951 .loc 1 929 4 is_stmt 1 view .LVU591 - ARM GAS /tmp/cczbjqIl.s page 144 + ARM GAS /tmp/ccQCFK4e.s page 144 929:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -8638,7 +8638,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1996 .loc 1 2973 6 is_stmt 0 view .LVU603 1997 0016 04F23220 addw r0, r4, #562 1998 001a FFF7FEFF bl ld_word - ARM GAS /tmp/cczbjqIl.s page 145 + ARM GAS /tmp/ccQCFK4e.s page 145 1999 .LVL220: @@ -8698,7 +8698,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2039 005a 9842 cmp r0, r3 2040 005c 04D0 beq .L171 2982:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 146 + ARM GAS /tmp/ccQCFK4e.s page 146 2041 .loc 1 2982 9 view .LVU618 @@ -8758,7 +8758,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2091 .cfi_offset 14, -4 2092 0004 87B0 sub sp, sp, #28 2093 .LCFI19: - ARM GAS /tmp/cczbjqIl.s page 147 + ARM GAS /tmp/ccQCFK4e.s page 147 2094 .cfi_def_cfa_offset 64 @@ -8818,7 +8818,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2128 0024 2C60 str r4, [r5] 3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */ 2129 .loc 1 3020 2 is_stmt 1 view .LVU645 - ARM GAS /tmp/cczbjqIl.s page 148 + ARM GAS /tmp/ccQCFK4e.s page 148 3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */ @@ -8878,7 +8878,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2167 .loc 1 3035 2 is_stmt 1 view .LVU662 3035:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(fs->drv); /* Initialize the physical drive */ 2168 .loc 1 3035 12 is_stmt 0 view .LVU663 - ARM GAS /tmp/cczbjqIl.s page 149 + ARM GAS /tmp/ccQCFK4e.s page 149 2169 0050 F8B2 uxtb r0, r7 @@ -8938,7 +8938,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2207 0086 B3F5606F cmp r3, #3584 2208 008a 00F23981 bhi .L202 3045:Middlewares/Third_Party/FatFs/src/ff.c **** #endif - ARM GAS /tmp/cczbjqIl.s page 150 + ARM GAS /tmp/ccQCFK4e.s page 150 2209 .loc 1 3045 64 discriminator 2 view .LVU680 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2248 .LVL239: 3116:Middlewares/Third_Party/FatFs/src/ff.c **** 2249 .loc 1 3116 44 discriminator 1 view .LVU696 - ARM GAS /tmp/cczbjqIl.s page 151 + ARM GAS /tmp/ccQCFK4e.s page 151 2250 00bc B4F80C80 ldrh r8, [r4, #12] @@ -9058,7 +9058,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2287 .loc 1 3123 6 view .LVU713 2288 00e8 012B cmp r3, #1 2289 00ea 00F21181 bhi .L210 - ARM GAS /tmp/cczbjqIl.s page 152 + ARM GAS /tmp/ccQCFK4e.s page 152 3124:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -9118,7 +9118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3132:Middlewares/Third_Party/FatFs/src/ff.c **** if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32); 2328 .loc 1 3132 11 is_stmt 0 view .LVU730 2329 0130 04F14700 add r0, r4, #71 - ARM GAS /tmp/cczbjqIl.s page 153 + ARM GAS /tmp/ccQCFK4e.s page 153 2330 0134 FFF7FEFF bl ld_word @@ -9178,7 +9178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2368 .loc 1 3140 6 is_stmt 0 view .LVU746 2369 0160 019A ldr r2, [sp, #4] 2370 0162 9A42 cmp r2, r3 - ARM GAS /tmp/cczbjqIl.s page 154 + ARM GAS /tmp/ccQCFK4e.s page 154 2371 0164 C0F0E680 bcc .L215 @@ -9238,7 +9238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2411 .L183: 3052:Middlewares/Third_Party/FatFs/src/ff.c **** pt = fs->win + (MBR_Table + i * SZ_PTE); 2412 .loc 1 3052 17 discriminator 1 view .LVU761 - ARM GAS /tmp/cczbjqIl.s page 155 + ARM GAS /tmp/ccQCFK4e.s page 155 2413 0198 032E cmp r6, #3 @@ -9298,7 +9298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2452 01bc 0AE0 b .L188 2453 .LVL268: 2454 .L226: - ARM GAS /tmp/cczbjqIl.s page 156 + ARM GAS /tmp/ccQCFK4e.s page 156 3060:Middlewares/Third_Party/FatFs/src/ff.c **** } while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4); @@ -9358,7 +9358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */ 2496 .loc 1 3148 16 view .LVU790 2497 01ee C4F81890 str r9, [r4, #24] - ARM GAS /tmp/cczbjqIl.s page 157 + ARM GAS /tmp/ccQCFK4e.s page 157 3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fatbase = bsect + nrsv; /* FAT start sector */ @@ -9418,7 +9418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2533 021a 09F00103 and r3, r9, #1 3161:Middlewares/Third_Party/FatFs/src/ff.c **** } 2534 .loc 1 3161 22 discriminator 2 view .LVU810 - ARM GAS /tmp/cczbjqIl.s page 158 + ARM GAS /tmp/ccQCFK4e.s page 158 2535 021e 03EB5203 add r3, r3, r2, lsr #1 @@ -9478,7 +9478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3192:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 1 2573 .loc 1 3192 9 view .LVU827 2574 024e 1380 strh r3, [r2] @ movhi - ARM GAS /tmp/cczbjqIl.s page 159 + ARM GAS /tmp/ccQCFK4e.s page 159 2575 0250 E380 strh r3, [r4, #6] @ movhi @@ -9538,7 +9538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2614 .LVL285: 3156:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 2615 .loc 1 3156 11 view .LVU843 - ARM GAS /tmp/cczbjqIl.s page 160 + ARM GAS /tmp/ccQCFK4e.s page 160 2616 0280 CFE7 b .L193 @@ -9598,7 +9598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2658 02be 9842 cmp r0, r3 2659 02c0 BFD1 bne .L195 3177:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cczbjqIl.s page 161 + ARM GAS /tmp/ccQCFK4e.s page 161 2660 .loc 1 3177 8 view .LVU856 @@ -9658,7 +9658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3015:Middlewares/Third_Party/FatFs/src/ff.c **** 2704 .loc 1 3015 18 discriminator 1 view .LVU867 2705 02f2 F9E7 b .L180 - ARM GAS /tmp/cczbjqIl.s page 162 + ARM GAS /tmp/ccQCFK4e.s page 162 2706 .LVL299: @@ -9718,7 +9718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3127:Middlewares/Third_Party/FatFs/src/ff.c **** 2752 .loc 1 3127 63 discriminator 3 view .LVU876 2753 0324 0D25 movs r5, #13 - ARM GAS /tmp/cczbjqIl.s page 163 + ARM GAS /tmp/ccQCFK4e.s page 163 2754 0326 DFE7 b .L180 @@ -9778,7 +9778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2799 .LFE1219: 2801 .section .text.put_fat,"ax",%progbits 2802 .align 1 - ARM GAS /tmp/cczbjqIl.s page 164 + ARM GAS /tmp/ccQCFK4e.s page 164 2803 .syntax unified @@ -9838,7 +9838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2846 001a 022B cmp r3, #2 2847 001c 49D0 beq .L234 2848 001e 032B cmp r3, #3 - ARM GAS /tmp/cczbjqIl.s page 165 + ARM GAS /tmp/ccQCFK4e.s page 165 2849 0020 60D0 beq .L235 @@ -9898,7 +9898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2887 .loc 1 1098 4 is_stmt 1 view .LVU913 1098:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 2888 .loc 1 1098 7 is_stmt 0 view .LVU914 - ARM GAS /tmp/cczbjqIl.s page 166 + ARM GAS /tmp/ccQCFK4e.s page 166 2889 0052 15F00105 ands r5, r5, #1 @@ -9958,7 +9958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2927 0084 A389 ldrh r3, [r4, #12] 1102:Middlewares/Third_Party/FatFs/src/ff.c **** *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); 2928 .loc 1 1102 21 view .LVU931 - ARM GAS /tmp/cczbjqIl.s page 167 + ARM GAS /tmp/ccQCFK4e.s page 167 2929 0086 B9FBF3F2 udiv r2, r9, r3 @@ -10018,7 +10018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; 2969 .loc 1 1108 56 view .LVU946 2970 00b6 5B08 lsrs r3, r3, #1 - ARM GAS /tmp/cczbjqIl.s page 168 + ARM GAS /tmp/ccQCFK4e.s page 168 1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -10078,7 +10078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; 3010 .loc 1 1118 49 view .LVU962 3011 00e6 8389 ldrh r3, [r0, #12] - ARM GAS /tmp/cczbjqIl.s page 169 + ARM GAS /tmp/ccQCFK4e.s page 169 1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -10138,7 +10138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3050 0118 3943 orrs r1, r1, r7 3051 .LVL340: 1123:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/cczbjqIl.s page 170 + ARM GAS /tmp/ccQCFK4e.s page 170 3052 .loc 1 1123 4 is_stmt 0 view .LVU979 @@ -10198,7 +10198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3098 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 3099 .LCFI23: 3100 .cfi_def_cfa_offset 24 - ARM GAS /tmp/cczbjqIl.s page 171 + ARM GAS /tmp/ccQCFK4e.s page 171 3101 .cfi_offset 3, -24 @@ -10258,7 +10258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3140 .LVL349: 1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)]; 3141 .loc 1 1020 4 is_stmt 1 view .LVU1005 - ARM GAS /tmp/cczbjqIl.s page 172 + ARM GAS /tmp/ccQCFK4e.s page 172 1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)]; @@ -10318,7 +10318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3180 .loc 1 1022 8 view .LVU1021 3181 0052 1944 add r1, r1, r3 3182 0054 2846 mov r0, r5 - ARM GAS /tmp/cczbjqIl.s page 173 + ARM GAS /tmp/ccQCFK4e.s page 173 3183 0056 FFF7FEFF bl move_window @@ -10378,7 +10378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs)); 3223 .loc 1 1028 47 view .LVU1036 3224 0084 AB89 ldrh r3, [r5, #12] - ARM GAS /tmp/cczbjqIl.s page 174 + ARM GAS /tmp/ccQCFK4e.s page 174 1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs)); @@ -10438,7 +10438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3263 .loc 1 1033 54 view .LVU1052 3264 00b2 9B08 lsrs r3, r3, #2 1033:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF; - ARM GAS /tmp/cczbjqIl.s page 175 + ARM GAS /tmp/ccQCFK4e.s page 175 3265 .loc 1 1033 44 view .LVU1053 @@ -10498,7 +10498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1012:Middlewares/Third_Party/FatFs/src/ff.c **** 3306 .loc 1 1012 7 view .LVU1067 3307 00e2 0120 movs r0, #1 - ARM GAS /tmp/cczbjqIl.s page 176 + ARM GAS /tmp/ccQCFK4e.s page 176 3308 .LVL377: @@ -10558,7 +10558,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3354 .cfi_offset 4, -24 3355 .cfi_offset 5, -20 3356 .cfi_offset 6, -16 - ARM GAS /tmp/cczbjqIl.s page 177 + ARM GAS /tmp/ccQCFK4e.s page 177 3357 .cfi_offset 7, -12 @@ -10618,7 +10618,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3394 .L261: 1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ 3395 .loc 1 1489 2 view .LVU1095 - ARM GAS /tmp/cczbjqIl.s page 178 + ARM GAS /tmp/ccQCFK4e.s page 178 1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ @@ -10678,7 +10678,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3431 0052 B8F80C20 ldrh r2, [r8, #12] 1506:Middlewares/Third_Party/FatFs/src/ff.c **** 3432 .loc 1 1506 27 view .LVU1115 - ARM GAS /tmp/cczbjqIl.s page 179 + ARM GAS /tmp/ccQCFK4e.s page 179 3433 0056 B6FBF2F1 udiv r1, r6, r2 @@ -10738,7 +10738,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3471 .loc 1 1498 7 is_stmt 0 view .LVU1131 3472 0086 0128 cmp r0, #1 3473 0088 14D9 bls .L269 - ARM GAS /tmp/cczbjqIl.s page 180 + ARM GAS /tmp/ccQCFK4e.s page 180 1498:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz; @@ -10798,7 +10798,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3515 .LVL399: 1490:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = fs->dirbase; 3516 .loc 1 1490 45 discriminator 1 view .LVU1145 - ARM GAS /tmp/cczbjqIl.s page 181 + ARM GAS /tmp/ccQCFK4e.s page 181 3517 00ae F9E7 b .L259 @@ -10858,7 +10858,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3564 .cfi_offset 4, -24 3565 .cfi_offset 5, -20 3566 .cfi_offset 6, -16 - ARM GAS /tmp/cczbjqIl.s page 182 + ARM GAS /tmp/ccQCFK4e.s page 182 3567 .cfi_offset 7, -12 @@ -10918,7 +10918,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1366:Middlewares/Third_Party/FatFs/src/ff.c **** if (cs < 2) return 1; /* Invalid FAT value */ 3605 .loc 1 1366 8 view .LVU1171 3606 0026 0346 mov r3, r0 - ARM GAS /tmp/cczbjqIl.s page 183 + ARM GAS /tmp/ccQCFK4e.s page 183 3607 .LVL413: @@ -10978,7 +10978,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3646 004e 78B1 cbz r0, .L279 1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ 3647 .loc 1 1409 4 is_stmt 1 view .LVU1187 - ARM GAS /tmp/cczbjqIl.s page 184 + ARM GAS /tmp/ccQCFK4e.s page 184 1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ @@ -11038,7 +11038,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1412:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) { 3687 .loc 1 1412 9 view .LVU1203 3688 0078 FFF7FEFF bl put_fat - ARM GAS /tmp/cczbjqIl.s page 185 + ARM GAS /tmp/ccQCFK4e.s page 185 3689 .LVL423: @@ -11098,7 +11098,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 3727 .loc 1 1421 3 is_stmt 1 view .LVU1220 1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else { - ARM GAS /tmp/cczbjqIl.s page 186 + ARM GAS /tmp/ccQCFK4e.s page 186 3728 .loc 1 1421 5 is_stmt 0 view .LVU1221 @@ -11158,7 +11158,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3771 .L287: 1405:Middlewares/Third_Party/FatFs/src/ff.c **** } 3772 .loc 1 1405 27 discriminator 1 view .LVU1233 - ARM GAS /tmp/cczbjqIl.s page 187 + ARM GAS /tmp/ccQCFK4e.s page 187 3773 00ca 0023 movs r3, #0 @@ -11218,7 +11218,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3819 .loc 1 1287 2 is_stmt 1 view .LVU1243 1287:Middlewares/Third_Party/FatFs/src/ff.c **** 3820 .loc 1 1287 5 is_stmt 0 view .LVU1244 - ARM GAS /tmp/cczbjqIl.s page 188 + ARM GAS /tmp/ccQCFK4e.s page 188 3821 0006 0129 cmp r1, #1 @@ -11278,7 +11278,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3860 .loc 1 1297 9 is_stmt 0 view .LVU1259 3861 002c 2146 mov r1, r4 3862 002e 3046 mov r0, r6 - ARM GAS /tmp/cczbjqIl.s page 189 + ARM GAS /tmp/ccQCFK4e.s page 189 3863 0030 FFF7FEFF bl get_fat @@ -11338,7 +11338,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++; 3900 .loc 1 1305 36 view .LVU1277 3901 0054 911E subs r1, r2, #2 - ARM GAS /tmp/cczbjqIl.s page 190 + ARM GAS /tmp/ccQCFK4e.s page 190 1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++; @@ -11398,7 +11398,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3943 0078 F9E7 b .L295 3944 .LVL458: 3945 .L303: - ARM GAS /tmp/cczbjqIl.s page 191 + ARM GAS /tmp/ccQCFK4e.s page 191 1300:Middlewares/Third_Party/FatFs/src/ff.c **** if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) { @@ -11458,7 +11458,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3990 .loc 1 2425 5 is_stmt 0 view .LVU1302 3991 000e 20B9 cbnz r0, .L306 2426:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/cczbjqIl.s page 192 + ARM GAS /tmp/ccQCFK4e.s page 192 3992 .loc 1 2426 3 is_stmt 1 view .LVU1303 @@ -11518,7 +11518,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1525:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 4037 .loc 1 1525 9 is_stmt 0 view .LVU1315 4038 0004 0668 ldr r6, [r0] - ARM GAS /tmp/cczbjqIl.s page 193 + ARM GAS /tmp/ccQCFK4e.s page 193 4039 .LVL465: @@ -11578,7 +11578,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4076 .loc 1 1537 4 is_stmt 1 view .LVU1332 1537:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE; 4077 .loc 1 1537 26 is_stmt 0 view .LVU1333 - ARM GAS /tmp/cczbjqIl.s page 194 + ARM GAS /tmp/ccQCFK4e.s page 194 4078 002e 3389 ldrh r3, [r6, #8] @@ -11638,7 +11638,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4116 .LVL473: 1538:Middlewares/Third_Party/FatFs/src/ff.c **** } 4117 .loc 1 1538 26 view .LVU1350 - ARM GAS /tmp/cczbjqIl.s page 195 + ARM GAS /tmp/ccQCFK4e.s page 195 4118 0056 F9E7 b .L309 @@ -11698,7 +11698,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1548:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE; 4155 .loc 1 1548 9 is_stmt 0 view .LVU1368 4156 007e 8FB1 cbz r7, .L327 - ARM GAS /tmp/cczbjqIl.s page 196 + ARM GAS /tmp/ccQCFK4e.s page 196 1551:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 0) return FR_DENIED; /* No free cluster */ @@ -11758,7 +11758,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4194 .loc 1 1549 16 is_stmt 0 view .LVU1385 4195 00a4 0023 movs r3, #0 4196 00a6 EB61 str r3, [r5, #28] - ARM GAS /tmp/cczbjqIl.s page 197 + ARM GAS /tmp/ccQCFK4e.s page 197 1549:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -11818,7 +11818,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4236 00d2 F8B9 cbnz r0, .L324 1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 4237 .loc 1 1559 72 is_stmt 1 discriminator 2 view .LVU1401 - ARM GAS /tmp/cczbjqIl.s page 198 + ARM GAS /tmp/ccQCFK4e.s page 198 1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; @@ -11878,7 +11878,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4278 00fc 0420 movs r0, #4 4279 .LVL493: 1531:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 199 + ARM GAS /tmp/ccQCFK4e.s page 199 4280 .loc 1 1531 105 discriminator 3 view .LVU1416 @@ -11938,7 +11938,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4323 .LFE1206: 4325 .section .text.dir_find,"ax",%progbits 4326 .align 1 - ARM GAS /tmp/cczbjqIl.s page 200 + ARM GAS /tmp/ccQCFK4e.s page 200 4327 .syntax unified @@ -11998,7 +11998,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2277:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK); 4370 .loc 1 2277 9 is_stmt 0 view .LVU1440 4371 0014 0021 movs r1, #0 - ARM GAS /tmp/cczbjqIl.s page 201 + ARM GAS /tmp/ccQCFK4e.s page 201 4372 0016 2046 mov r0, r4 @@ -12058,7 +12058,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4410 .loc 1 2274 16 view .LVU1456 4411 003c A371 strb r3, [r4, #6] 4412 .LVL516: - ARM GAS /tmp/cczbjqIl.s page 202 + ARM GAS /tmp/ccQCFK4e.s page 202 2275:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -12118,7 +12118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4460 .cfi_def_cfa_offset 24 4461 0004 0446 mov r4, r0 4462 0006 0191 str r1, [sp, #4] - ARM GAS /tmp/cczbjqIl.s page 203 + ARM GAS /tmp/ccQCFK4e.s page 203 2818:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE ns; @@ -12178,7 +12178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4500 .L339: 2855:Middlewares/Third_Party/FatFs/src/ff.c **** res = create_name(dp, &path); /* Get a segment name of the path */ 4501 .loc 1 2855 3 is_stmt 1 view .LVU1483 - ARM GAS /tmp/cczbjqIl.s page 204 + ARM GAS /tmp/ccQCFK4e.s page 204 2856:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -12238,7 +12238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4538 .loc 1 2888 32 is_stmt 0 view .LVU1501 4539 004e 05F13401 add r1, r5, #52 2888:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 205 + ARM GAS /tmp/ccQCFK4e.s page 205 4540 .loc 1 2888 44 view .LVU1502 @@ -12298,7 +12298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2894:Middlewares/Third_Party/FatFs/src/ff.c **** 4580 .loc 1 2894 1 is_stmt 0 view .LVU1517 4581 007a 1846 mov r0, r3 - ARM GAS /tmp/cczbjqIl.s page 206 + ARM GAS /tmp/ccQCFK4e.s page 206 4582 007c 03B0 add sp, sp, #12 @@ -12358,7 +12358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4629 .cfi_offset 4, -20 4630 .cfi_offset 5, -16 4631 .cfi_offset 6, -12 - ARM GAS /tmp/cczbjqIl.s page 207 + ARM GAS /tmp/ccQCFK4e.s page 207 4632 .cfi_offset 7, -8 @@ -12418,7 +12418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4671 0020 0246 mov r2, r0 4672 0022 70B9 cbnz r0, .L348 4673 .LVL545: - ARM GAS /tmp/cczbjqIl.s page 208 + ARM GAS /tmp/ccQCFK4e.s page 208 4674 .L350: @@ -12478,7 +12478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 1619:Middlewares/Third_Party/FatFs/src/ff.c **** } 4713 .loc 1 1619 2 is_stmt 1 view .LVU1557 1620:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 209 + ARM GAS /tmp/ccQCFK4e.s page 209 4714 .loc 1 1620 1 is_stmt 0 view .LVU1558 @@ -12538,7 +12538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2371:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect); 4760 .loc 1 2371 5 is_stmt 0 view .LVU1569 4761 000c 0546 mov r5, r0 - ARM GAS /tmp/cczbjqIl.s page 210 + ARM GAS /tmp/ccQCFK4e.s page 210 4762 000e 08B1 cbz r0, .L359 @@ -12598,7 +12598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4804 .LFE1212: 4806 .section .text.dir_read,"ax",%progbits 4807 .align 1 - ARM GAS /tmp/cczbjqIl.s page 211 + ARM GAS /tmp/ccQCFK4e.s page 211 4808 .syntax unified @@ -12658,7 +12658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4851 0010 FFF7FEFF bl dir_next 4852 .LVL568: 2194:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 212 + ARM GAS /tmp/ccQCFK4e.s page 212 4853 .loc 1 2194 3 is_stmt 1 view .LVU1594 @@ -12718,7 +12718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 2188:Middlewares/Third_Party/FatFs/src/ff.c **** break; 4890 .loc 1 2188 4 is_stmt 1 view .LVU1612 2188:Middlewares/Third_Party/FatFs/src/ff.c **** break; - ARM GAS /tmp/cczbjqIl.s page 213 + ARM GAS /tmp/ccQCFK4e.s page 213 4891 .loc 1 2188 7 is_stmt 0 view .LVU1613 @@ -12778,7 +12778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4934 .align 1 4935 .syntax unified 4936 .thumb - ARM GAS /tmp/cczbjqIl.s page 214 + ARM GAS /tmp/ccQCFK4e.s page 214 4937 .thumb_func @@ -12838,7 +12838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4979 .loc 1 968 6 discriminator 1 view .LVU1638 4980 001c 00B1 cbz r0, .L369 968:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 215 + ARM GAS /tmp/ccQCFK4e.s page 215 4981 .loc 1 968 56 discriminator 1 view .LVU1639 @@ -12898,7 +12898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5023 0056 6169 ldr r1, [r4, #20] 5024 0058 04F50770 add r0, r4, #540 5025 005c FFF7FEFF bl st_dword - ARM GAS /tmp/cczbjqIl.s page 216 + ARM GAS /tmp/ccQCFK4e.s page 216 5026 .LVL587: @@ -12958,7 +12958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5072 .loc 1 3265 1 is_stmt 0 view .LVU1661 5073 0000 70B5 push {r4, r5, r6, lr} 5074 .LCFI38: - ARM GAS /tmp/cczbjqIl.s page 217 + ARM GAS /tmp/ccQCFK4e.s page 217 5075 .cfi_def_cfa_offset 16 @@ -13018,7 +13018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3279:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 5114 .loc 1 3279 3 is_stmt 0 view .LVU1677 5115 0020 FFF7FEFF bl clear_lock - ARM GAS /tmp/cczbjqIl.s page 218 + ARM GAS /tmp/ccQCFK4e.s page 218 5116 .LVL595: @@ -13078,7 +13078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5155 .cfi_remember_state 5156 .cfi_def_cfa_offset 16 5157 @ sp needed - ARM GAS /tmp/cczbjqIl.s page 219 + ARM GAS /tmp/ccQCFK4e.s page 219 5158 004c 70BD pop {r4, r5, r6, pc} @@ -13138,7 +13138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5207 .cfi_offset 8, -12 5208 .cfi_offset 9, -8 5209 .cfi_offset 14, -4 - ARM GAS /tmp/cczbjqIl.s page 220 + ARM GAS /tmp/ccQCFK4e.s page 220 5210 0004 91B0 sub sp, sp, #68 @@ -13198,7 +13198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5247 .loc 1 3499 31 is_stmt 0 discriminator 1 view .LVU1716 5248 0024 0023 movs r3, #0 5249 0026 3360 str r3, [r6] - ARM GAS /tmp/cczbjqIl.s page 221 + ARM GAS /tmp/ccQCFK4e.s page 221 5250 .LVL607: @@ -13258,7 +13258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5290 004c 14BF ite ne 5291 004e 0121 movne r1, #1 5292 0050 0021 moveq r1, #0 - ARM GAS /tmp/cczbjqIl.s page 222 + ARM GAS /tmp/ccQCFK4e.s page 222 5293 0052 04A8 add r0, sp, #16 @@ -13318,7 +13318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3392:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(dj.dir + DIR_ModTime, dw); /* Set modified time */ 5333 .loc 1 3392 6 is_stmt 1 view .LVU1745 5334 007c 0146 mov r1, r0 - ARM GAS /tmp/cczbjqIl.s page 223 + ARM GAS /tmp/ccQCFK4e.s page 223 5335 007e 0C98 ldr r0, [sp, #48] @@ -13378,7 +13378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3398:Middlewares/Third_Party/FatFs/src/ff.c **** 5378 .loc 1 3398 6 view .LVU1757 3398:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 224 + ARM GAS /tmp/ccQCFK4e.s page 224 5379 .loc 1 3398 16 is_stmt 0 view .LVU1758 @@ -13438,7 +13438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3405:Middlewares/Third_Party/FatFs/src/ff.c **** } 5419 .loc 1 3405 22 view .LVU1773 5420 00e8 039B ldr r3, [sp, #12] - ARM GAS /tmp/cczbjqIl.s page 225 + ARM GAS /tmp/ccQCFK4e.s page 225 5421 00ea 1C61 str r4, [r3, #16] @@ -13498,7 +13498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5462 0114 AAD0 beq .L393 3360:Middlewares/Third_Party/FatFs/src/ff.c **** } 5463 .loc 1 3360 36 discriminator 1 view .LVU1787 - ARM GAS /tmp/cczbjqIl.s page 226 + ARM GAS /tmp/ccQCFK4e.s page 226 5464 0116 0825 movs r5, #8 @@ -13558,7 +13558,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3423:Middlewares/Third_Party/FatFs/src/ff.c **** mode |= FA_MODIFIED; 5503 .loc 1 3423 7 is_stmt 0 view .LVU1803 5504 0140 17F0080F tst r7, #8 - ARM GAS /tmp/cczbjqIl.s page 227 + ARM GAS /tmp/ccQCFK4e.s page 227 5505 0144 01D0 beq .L395 @@ -13618,7 +13618,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5543 .loc 1 3444 3 is_stmt 1 view .LVU1819 3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); 5544 .loc 1 3456 5 view .LVU1820 - ARM GAS /tmp/cczbjqIl.s page 228 + ARM GAS /tmp/ccQCFK4e.s page 228 3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); @@ -13678,7 +13678,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */ 5581 .loc 1 3466 4 is_stmt 1 view .LVU1839 3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */ - ARM GAS /tmp/cczbjqIl.s page 229 + ARM GAS /tmp/ccQCFK4e.s page 229 5582 .loc 1 3466 13 is_stmt 0 view .LVU1840 @@ -13738,7 +13738,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5619 01bc B168 ldr r1, [r6, #8] 5620 .LVL654: 3476:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, clst); - ARM GAS /tmp/cczbjqIl.s page 230 + ARM GAS /tmp/ccQCFK4e.s page 230 5621 .loc 1 3476 5 is_stmt 1 view .LVU1858 @@ -13798,7 +13798,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5660 .loc 1 3479 34 discriminator 1 view .LVU1873 5661 01e2 0125 movs r5, #1 5662 .LVL660: - ARM GAS /tmp/cczbjqIl.s page 231 + ARM GAS /tmp/ccQCFK4e.s page 231 3479:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -13858,7 +13858,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY 5701 .loc 1 3486 21 view .LVU1890 5702 020e 0244 add r2, r2, r0 - ARM GAS /tmp/cczbjqIl.s page 232 + ARM GAS /tmp/ccQCFK4e.s page 232 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY @@ -13918,7 +13918,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5743 0230 FAE6 b .L387 5744 .cfi_endproc 5745 .LFE1222: - ARM GAS /tmp/cczbjqIl.s page 233 + ARM GAS /tmp/ccQCFK4e.s page 233 5747 .section .text.f_read,"ax",%progbits @@ -13978,7 +13978,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3526:Middlewares/Third_Party/FatFs/src/ff.c **** res = validate(&fp->obj, &fs); /* Check validity of the file object */ 5792 .loc 1 3526 6 view .LVU1915 5793 0010 C8F80030 str r3, [r8] - ARM GAS /tmp/cczbjqIl.s page 234 + ARM GAS /tmp/ccQCFK4e.s page 234 3527:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */ @@ -14038,7 +14038,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5832 0040 2E46 mov r6, r5 5833 .LVL682: 3531:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 235 + ARM GAS /tmp/ccQCFK4e.s page 235 5834 .loc 1 3531 5 view .LVU1932 @@ -14098,7 +14098,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5874 .loc 1 3551 29 discriminator 1 view .LVU1946 5875 0070 CDF804A0 str r10, [sp, #4] 5876 .LVL689: - ARM GAS /tmp/cczbjqIl.s page 236 + ARM GAS /tmp/ccQCFK4e.s page 236 3551:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */ @@ -14158,7 +14158,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5916 009c 5345 cmp r3, r10 5917 009e F5D2 bcs .L437 3570:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 237 + ARM GAS /tmp/ccQCFK4e.s page 237 5918 .loc 1 3570 6 is_stmt 1 view .LVU1962 @@ -14218,7 +14218,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5958 00d4 C4F82090 str r9, [r4, #32] 5959 .LVL698: 5960 .L426: - ARM GAS /tmp/cczbjqIl.s page 238 + ARM GAS /tmp/ccQCFK4e.s page 238 3590:Middlewares/Third_Party/FatFs/src/ff.c **** if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */ @@ -14278,7 +14278,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ 6000 .loc 1 3534 36 view .LVU1992 6001 0104 D8F80030 ldr r3, [r8] - ARM GAS /tmp/cczbjqIl.s page 239 + ARM GAS /tmp/ccQCFK4e.s page 239 3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ @@ -14338,7 +14338,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6039 .loc 1 3538 8 is_stmt 0 view .LVU2009 6040 0132 0029 cmp r1, #0 6041 0134 86D1 bne .L428 - ARM GAS /tmp/cczbjqIl.s page 240 + ARM GAS /tmp/ccQCFK4e.s page 240 3539:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Middle or end of the file */ @@ -14398,7 +14398,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */ 6079 .loc 1 3557 4 is_stmt 1 view .LVU2027 3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */ - ARM GAS /tmp/cczbjqIl.s page 241 + ARM GAS /tmp/ccQCFK4e.s page 241 6080 .loc 1 3557 15 is_stmt 0 view .LVU2028 @@ -14458,7 +14458,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6119 0190 CDF804A0 str r10, [sp, #4] 6120 .LVL714: 6121 .L423: - ARM GAS /tmp/cczbjqIl.s page 242 + ARM GAS /tmp/ccQCFK4e.s page 242 3601:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -14518,7 +14518,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3585:Middlewares/Third_Party/FatFs/src/ff.c **** } 6164 .loc 1 3585 57 is_stmt 1 discriminator 1 view .LVU2056 6165 01c4 4FF0010A mov r10, #1 - ARM GAS /tmp/cczbjqIl.s page 243 + ARM GAS /tmp/ccQCFK4e.s page 243 6166 .LVL720: @@ -14578,7 +14578,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6215 0006 0446 mov r4, r0 6216 0008 0F46 mov r7, r1 6217 000a 1546 mov r5, r2 - ARM GAS /tmp/cczbjqIl.s page 244 + ARM GAS /tmp/ccQCFK4e.s page 244 6218 000c 9846 mov r8, r3 @@ -14638,7 +14638,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6254 .loc 1 3628 5 view .LVU2081 6255 002a 13F0020F tst r3, #2 6256 002e 00F0EC80 beq .L482 - ARM GAS /tmp/cczbjqIl.s page 245 + ARM GAS /tmp/ccQCFK4e.s page 245 3631:Middlewares/Third_Party/FatFs/src/ff.c **** btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr); @@ -14698,7 +14698,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6294 .loc 1 3657 5 view .LVU2098 3657:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */ 6295 .loc 1 3657 8 is_stmt 0 view .LVU2099 - ARM GAS /tmp/cczbjqIl.s page 246 + ARM GAS /tmp/ccQCFK4e.s page 246 6296 0054 B0F1FF3F cmp r0, #-1 @@ -14758,7 +14758,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6332 .loc 1 3671 9 is_stmt 0 view .LVU2117 6333 007c B144 add r9, r9, r6 6334 .LVL736: - ARM GAS /tmp/cczbjqIl.s page 247 + ARM GAS /tmp/ccQCFK4e.s page 247 3672:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Write maximum contiguous sectors directly */ @@ -14818,7 +14818,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3677:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 2 6373 .loc 1 3677 57 is_stmt 1 discriminator 1 view .LVU2134 6374 00b2 CDF804A0 str r10, [sp, #4] - ARM GAS /tmp/cczbjqIl.s page 248 + ARM GAS /tmp/ccQCFK4e.s page 248 6375 .LVL741: @@ -14878,7 +14878,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; 6419 .loc 1 3665 5 is_stmt 1 view .LVU2145 3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; - ARM GAS /tmp/cczbjqIl.s page 249 + ARM GAS /tmp/ccQCFK4e.s page 249 6420 .loc 1 3665 9 is_stmt 0 view .LVU2146 @@ -14938,7 +14938,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); 6461 .loc 1 3685 11 is_stmt 0 view .LVU2160 6462 011c 236A ldr r3, [r4, #32] - ARM GAS /tmp/cczbjqIl.s page 250 + ARM GAS /tmp/ccQCFK4e.s page 250 3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); @@ -14998,7 +14998,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6502 014c 4B45 cmp r3, r9 6503 014e 03D0 beq .L478 3701:Middlewares/Third_Party/FatFs/src/ff.c **** disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) { - ARM GAS /tmp/cczbjqIl.s page 251 + ARM GAS /tmp/ccQCFK4e.s page 251 6504 .loc 1 3701 7 view .LVU2176 @@ -15058,7 +15058,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6542 0176 3246 mov r2, r6 6543 0178 3946 mov r1, r7 6544 017a 1844 add r0, r0, r3 - ARM GAS /tmp/cczbjqIl.s page 252 + ARM GAS /tmp/ccQCFK4e.s page 252 6545 017c FFF7FEFF bl mem_cpy @@ -15118,7 +15118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6583 .loc 1 3637 9 is_stmt 0 view .LVU2208 6584 01a8 A169 ldr r1, [r4, #24] 3637:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */ - ARM GAS /tmp/cczbjqIl.s page 253 + ARM GAS /tmp/ccQCFK4e.s page 253 6585 .loc 1 3637 18 view .LVU2209 @@ -15178,7 +15178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6622 01d6 2046 mov r0, r4 6623 .LVL767: 3643:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 254 + ARM GAS /tmp/ccQCFK4e.s page 254 6624 .loc 1 3643 14 view .LVU2227 @@ -15238,7 +15238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6666 .LVL775: 3628:Middlewares/Third_Party/FatFs/src/ff.c **** 6667 .loc 1 3628 30 discriminator 1 view .LVU2240 - ARM GAS /tmp/cczbjqIl.s page 255 + ARM GAS /tmp/ccQCFK4e.s page 255 6668 020e 52E7 b .L459 @@ -15298,7 +15298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 6714 .loc 1 5960 2 is_stmt 1 view .LVU2251 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif - ARM GAS /tmp/cczbjqIl.s page 256 + ARM GAS /tmp/ccQCFK4e.s page 256 6715 .loc 1 5960 11 is_stmt 0 view .LVU2252 @@ -15358,7 +15358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6757 .LVL785: 6758 .L500: 5964:Middlewares/Third_Party/FatFs/src/ff.c **** i = (bw == (UINT)i) ? 0 : -1; - ARM GAS /tmp/cczbjqIl.s page 257 + ARM GAS /tmp/ccQCFK4e.s page 257 6759 .loc 1 5964 3 is_stmt 1 view .LVU2265 @@ -15418,7 +15418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6803 .loc 1 5979 2 view .LVU2277 5979:Middlewares/Third_Party/FatFs/src/ff.c **** && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK 6804 .loc 1 5979 11 is_stmt 0 view .LVU2278 - ARM GAS /tmp/cczbjqIl.s page 258 + ARM GAS /tmp/ccQCFK4e.s page 258 6805 0000 4268 ldr r2, [r0, #4] @@ -15478,7 +15478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6847 .LVL793: 6848 .L504: 6849 .LCFI61: - ARM GAS /tmp/cczbjqIl.s page 259 + ARM GAS /tmp/ccQCFK4e.s page 259 6850 .cfi_def_cfa_offset 0 @@ -15538,7 +15538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 3737:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm; 6900 .loc 1 3737 2 view .LVU2297 3738:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE *dir; - ARM GAS /tmp/cczbjqIl.s page 260 + ARM GAS /tmp/ccQCFK4e.s page 260 6901 .loc 1 3738 2 view .LVU2298 @@ -15598,7 +15598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6938 002a 78B1 cbz r0, .L517 6939 .LVL802: 6940 .L512: - ARM GAS /tmp/cczbjqIl.s page 261 + ARM GAS /tmp/ccQCFK4e.s page 261 3802:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -15658,7 +15658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6982 .loc 1 3789 6 is_stmt 1 view .LVU2328 6983 0056 A268 ldr r2, [r4, #8] 6984 0058 3146 mov r1, r6 - ARM GAS /tmp/cczbjqIl.s page 262 + ARM GAS /tmp/ccQCFK4e.s page 262 6985 005a 2068 ldr r0, [r4] @@ -15718,7 +15718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7027 .cfi_endproc 7028 .LFE1225: 7030 .section .text.f_close,"ax",%progbits - ARM GAS /tmp/cczbjqIl.s page 263 + ARM GAS /tmp/ccQCFK4e.s page 263 7031 .align 1 @@ -15778,7 +15778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7076 .cfi_restore_state 3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { 7077 .loc 1 3825 3 is_stmt 1 view .LVU2351 - ARM GAS /tmp/cczbjqIl.s page 264 + ARM GAS /tmp/ccQCFK4e.s page 264 3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -15838,7 +15838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7122 .cfi_def_cfa_offset 36 7123 .cfi_offset 4, -36 7124 .cfi_offset 5, -32 - ARM GAS /tmp/cczbjqIl.s page 265 + ARM GAS /tmp/ccQCFK4e.s page 265 7125 .cfi_offset 6, -28 @@ -15898,7 +15898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4024:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs == CREATE_LINKMAP) { /* Create CLMT */ 7163 .loc 1 4024 5 view .LVU2380 7164 001a 002B cmp r3, #0 - ARM GAS /tmp/cczbjqIl.s page 266 + ARM GAS /tmp/ccQCFK4e.s page 266 7165 001c 00F08E80 beq .L526 @@ -15958,7 +15958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7205 .loc 1 4027 9 view .LVU2394 7206 003e 58F804BB ldr fp, [r8], #4 7207 .LVL829: - ARM GAS /tmp/cczbjqIl.s page 267 + ARM GAS /tmp/ccQCFK4e.s page 267 4027:Middlewares/Third_Party/FatFs/src/ff.c **** cl = fp->obj.sclust; /* Origin of the chain */ @@ -16018,7 +16018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7243 005c 2046 mov r0, r4 7244 005e FFF7FEFF bl get_fat 7245 .LVL835: - ARM GAS /tmp/cczbjqIl.s page 268 + ARM GAS /tmp/ccQCFK4e.s page 268 4035:Middlewares/Third_Party/FatFs/src/ff.c **** if (cl <= 1) ABORT(fs, FR_INT_ERR); @@ -16078,7 +16078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4042:Middlewares/Third_Party/FatFs/src/ff.c **** } 7283 .loc 1 4042 17 is_stmt 1 view .LVU2431 4042:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 269 + ARM GAS /tmp/ccQCFK4e.s page 269 7284 .loc 1 4042 21 is_stmt 0 view .LVU2432 @@ -16138,7 +16138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4044:Middlewares/Third_Party/FatFs/src/ff.c **** if (ulen <= tlen) { 7324 .loc 1 4044 15 view .LVU2447 7325 00a2 C3F80090 str r9, [r3] - ARM GAS /tmp/cczbjqIl.s page 270 + ARM GAS /tmp/ccQCFK4e.s page 270 4045:Middlewares/Third_Party/FatFs/src/ff.c **** *tbl = 0; /* Terminate table */ @@ -16198,7 +16198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ 7364 .loc 1 4057 53 view .LVU2464 7365 00da 013A subs r2, r2, #1 - ARM GAS /tmp/cczbjqIl.s page 271 + ARM GAS /tmp/ccQCFK4e.s page 271 4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ @@ -16258,7 +16258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7404 .loc 1 4068 15 is_stmt 0 view .LVU2480 7405 010c 2562 str r5, [r4, #32] 7406 010e 91E7 b .L525 - ARM GAS /tmp/cczbjqIl.s page 272 + ARM GAS /tmp/ccQCFK4e.s page 272 7407 .LVL854: @@ -16318,7 +16318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7446 .L572: 4066:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 7447 .loc 1 4066 57 is_stmt 1 discriminator 1 view .LVU2496 - ARM GAS /tmp/cczbjqIl.s page 273 + ARM GAS /tmp/ccQCFK4e.s page 273 7448 0136 0126 movs r6, #1 @@ -16378,7 +16378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7485 0154 019A ldr r2, [sp, #4] 7486 0156 B2F80A80 ldrh r8, [r2, #10] 4086:Middlewares/Third_Party/FatFs/src/ff.c **** if (ifptr > 0 && - ARM GAS /tmp/cczbjqIl.s page 274 + ARM GAS /tmp/ccQCFK4e.s page 274 7487 .loc 1 4086 29 view .LVU2514 @@ -16438,7 +16438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7524 017e 04E0 b .L542 7525 .LVL869: 7526 .L541: - ARM GAS /tmp/cczbjqIl.s page 275 + ARM GAS /tmp/ccQCFK4e.s page 275 4093:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY @@ -16498,7 +16498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7564 019e 2275 strb r2, [r4, #20] 7565 .L555: 4138:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY - ARM GAS /tmp/cczbjqIl.s page 276 + ARM GAS /tmp/ccQCFK4e.s page 276 7566 .loc 1 4138 3 is_stmt 1 view .LVU2549 @@ -16558,7 +16558,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7606 .L574: 4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR); 7607 .loc 1 4096 6 is_stmt 1 view .LVU2564 - ARM GAS /tmp/cczbjqIl.s page 277 + ARM GAS /tmp/ccQCFK4e.s page 277 4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR); @@ -16618,7 +16618,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7645 .loc 1 4098 30 is_stmt 1 discriminator 1 view .LVU2581 4098:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.sclust = clst; 7646 .loc 1 4098 30 is_stmt 0 view .LVU2582 - ARM GAS /tmp/cczbjqIl.s page 278 + ARM GAS /tmp/ccQCFK4e.s page 278 7647 01fa 1BE7 b .L525 @@ -16678,7 +16678,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7686 .LVL884: 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 7687 .loc 1 4106 18 is_stmt 1 view .LVU2598 - ARM GAS /tmp/cczbjqIl.s page 279 + ARM GAS /tmp/ccQCFK4e.s page 279 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY @@ -16738,7 +16738,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4127:Middlewares/Third_Party/FatFs/src/ff.c **** nsect = clust2sect(fs, clst); /* Current sector */ 7726 .loc 1 4127 13 view .LVU2615 7727 024c B7FBF8F3 udiv r3, r7, r8 - ARM GAS /tmp/cczbjqIl.s page 280 + ARM GAS /tmp/ccQCFK4e.s page 280 7728 0250 08FB1373 mls r3, r8, r3, r7 @@ -16798,7 +16798,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7766 .LVL895: 4123:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; 7767 .loc 1 4123 45 is_stmt 0 discriminator 3 view .LVU2632 - ARM GAS /tmp/cczbjqIl.s page 281 + ARM GAS /tmp/ccQCFK4e.s page 281 7768 0270 6675 strb r6, [r4, #21] @@ -16858,7 +16858,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7807 0294 95E7 b .L556 7808 .L581: 4142:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; - ARM GAS /tmp/cczbjqIl.s page 282 + ARM GAS /tmp/ccQCFK4e.s page 282 7809 .loc 1 4142 62 is_stmt 1 discriminator 1 view .LVU2648 @@ -16918,7 +16918,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7854 .cfi_def_cfa_offset 12 7855 .cfi_offset 4, -12 7856 .cfi_offset 5, -8 - ARM GAS /tmp/cczbjqIl.s page 283 + ARM GAS /tmp/ccQCFK4e.s page 283 7857 .cfi_offset 14, -4 @@ -16978,7 +16978,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7896 001e 2046 mov r0, r4 7897 0020 05B0 add sp, sp, #20 7898 .LCFI77: - ARM GAS /tmp/cczbjqIl.s page 284 + ARM GAS /tmp/ccQCFK4e.s page 284 7899 .cfi_remember_state @@ -17038,7 +17038,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7937 .loc 1 4196 21 is_stmt 0 view .LVU2690 7938 0044 296A ldr r1, [r5, #32] 7939 0046 0398 ldr r0, [sp, #12] - ARM GAS /tmp/cczbjqIl.s page 285 + ARM GAS /tmp/ccQCFK4e.s page 285 7940 .LVL917: @@ -17098,7 +17098,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 7977 006a 0021 movs r1, #0 7978 006c 2846 mov r0, r5 7979 .LVL920: - ARM GAS /tmp/cczbjqIl.s page 286 + ARM GAS /tmp/ccQCFK4e.s page 286 4208:Middlewares/Third_Party/FatFs/src/ff.c **** if (!obj->lockid) res = FR_TOO_MANY_OPEN_FILES; @@ -17158,7 +17158,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8021 .LFE1228: 8023 .section .text.f_closedir,"ax",%progbits 8024 .align 1 - ARM GAS /tmp/cczbjqIl.s page 287 + ARM GAS /tmp/ccQCFK4e.s page 287 8025 .global f_closedir @@ -17218,7 +17218,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4249:Middlewares/Third_Party/FatFs/src/ff.c **** } 8067 .loc 1 4249 4 is_stmt 1 view .LVU2734 4249:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 288 + ARM GAS /tmp/ccQCFK4e.s page 288 8068 .loc 1 4249 15 is_stmt 0 view .LVU2735 @@ -17278,7 +17278,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8117 0002 82B0 sub sp, sp, #8 8118 .LCFI84: 8119 .cfi_def_cfa_offset 24 - ARM GAS /tmp/cczbjqIl.s page 289 + ARM GAS /tmp/ccQCFK4e.s page 289 8120 0004 0446 mov r4, r0 @@ -17338,7 +17338,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8156 .loc 1 4284 5 is_stmt 1 view .LVU2760 8157 0022 2946 mov r1, r5 8158 0024 2046 mov r0, r4 - ARM GAS /tmp/cczbjqIl.s page 290 + ARM GAS /tmp/ccQCFK4e.s page 290 8159 0026 FFF7FEFF bl get_fileinfo @@ -17398,7 +17398,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8201 004a 0646 mov r6, r0 8202 004c FAE7 b .L603 8203 .cfi_endproc - ARM GAS /tmp/cczbjqIl.s page 291 + ARM GAS /tmp/ccQCFK4e.s page 291 8204 .LFE1230: @@ -17458,7 +17458,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8250 .L610: 4375:Middlewares/Third_Party/FatFs/src/ff.c **** } 8251 .loc 1 4375 16 is_stmt 1 view .LVU2783 - ARM GAS /tmp/cczbjqIl.s page 292 + ARM GAS /tmp/ccQCFK4e.s page 292 4378:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -17518,7 +17518,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8292 .LVL954: 4372:Middlewares/Third_Party/FatFs/src/ff.c **** } 8293 .loc 1 4372 14 is_stmt 0 discriminator 1 view .LVU2798 - ARM GAS /tmp/cczbjqIl.s page 293 + ARM GAS /tmp/ccQCFK4e.s page 293 8294 003a FFF7FEFF bl get_fileinfo @@ -17578,7 +17578,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8342 .loc 1 4398 2 view .LVU2806 4399:Middlewares/Third_Party/FatFs/src/ff.c **** 8343 .loc 1 4399 2 view .LVU2807 - ARM GAS /tmp/cczbjqIl.s page 294 + ARM GAS /tmp/ccQCFK4e.s page 294 4403:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -17638,7 +17638,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8381 .loc 1 4411 4 is_stmt 1 view .LVU2824 8382 .LVL962: 4412:Middlewares/Third_Party/FatFs/src/ff.c **** clst = 2; obj.fs = fs; - ARM GAS /tmp/cczbjqIl.s page 295 + ARM GAS /tmp/ccQCFK4e.s page 295 8383 .loc 1 4412 4 view .LVU2825 @@ -17698,7 +17698,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8421 .LVL969: 4419:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 8422 .loc 1 4419 25 is_stmt 0 view .LVU2842 - ARM GAS /tmp/cczbjqIl.s page 296 + ARM GAS /tmp/ccQCFK4e.s page 296 8423 004c 079B ldr r3, [sp, #28] @@ -17758,7 +17758,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8461 .loc 1 4444 14 view .LVU2858 8462 0072 5146 mov r1, r10 8463 0074 0798 ldr r0, [sp, #28] - ARM GAS /tmp/cczbjqIl.s page 297 + ARM GAS /tmp/ccQCFK4e.s page 297 8464 0076 FFF7FEFF bl move_window @@ -17818,7 +17818,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4451:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 8502 .loc 1 4451 18 is_stmt 0 view .LVU2875 8503 0096 023E subs r6, r6, #2 - ARM GAS /tmp/cczbjqIl.s page 298 + ARM GAS /tmp/ccQCFK4e.s page 298 8504 .LVL982: @@ -17878,7 +17878,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8542 00b0 FFF7FEFF bl ld_dword 8543 .LVL988: 4453:Middlewares/Third_Party/FatFs/src/ff.c **** p += 4; i -= 4; - ARM GAS /tmp/cczbjqIl.s page 299 + ARM GAS /tmp/ccQCFK4e.s page 299 8544 .loc 1 4453 11 discriminator 1 view .LVU2892 @@ -17938,7 +17938,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8584 .LVL993: 8585 .L628: 8586 .LCFI94: - ARM GAS /tmp/cczbjqIl.s page 300 + ARM GAS /tmp/ccQCFK4e.s page 300 8587 .cfi_restore_state @@ -17998,7 +17998,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8632 000e 0028 cmp r0, #0 8633 0010 49D1 bne .L636 4485:Middlewares/Third_Party/FatFs/src/ff.c **** if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ - ARM GAS /tmp/cczbjqIl.s page 301 + ARM GAS /tmp/ccQCFK4e.s page 301 8634 .loc 1 4485 27 discriminator 2 view .LVU2918 @@ -18058,7 +18058,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED; 8673 .loc 1 4501 23 is_stmt 0 view .LVU2934 8674 003a A369 ldr r3, [r4, #24] - ARM GAS /tmp/cczbjqIl.s page 302 + ARM GAS /tmp/ccQCFK4e.s page 302 4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED; @@ -18118,7 +18118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4494:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; 8714 .loc 1 4494 4 is_stmt 1 view .LVU2950 4495:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 1) res = FR_INT_ERR; - ARM GAS /tmp/cczbjqIl.s page 303 + ARM GAS /tmp/ccQCFK4e.s page 303 8715 .loc 1 4495 4 view .LVU2951 @@ -18178,7 +18178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8755 .loc 1 4496 22 discriminator 1 view .LVU2965 8756 009a 0225 movs r5, #2 8757 009c CDE7 b .L638 - ARM GAS /tmp/cczbjqIl.s page 304 + ARM GAS /tmp/ccQCFK4e.s page 304 8758 .LVL1008: @@ -18238,7 +18238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8805 .cfi_offset 5, -16 8806 .cfi_offset 6, -12 8807 .cfi_offset 7, -8 - ARM GAS /tmp/cczbjqIl.s page 305 + ARM GAS /tmp/ccQCFK4e.s page 305 8808 .cfi_offset 14, -4 @@ -18298,7 +18298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8848 .L656: 8849 .LCFI101: 8850 .cfi_restore_state - ARM GAS /tmp/cczbjqIl.s page 306 + ARM GAS /tmp/ccQCFK4e.s page 306 4543:Middlewares/Third_Party/FatFs/src/ff.c **** res = follow_path(&dj, path); /* Follow the file path */ @@ -18358,7 +18358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4555:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED; /* Cannot remove R/O object */ 8888 .loc 1 4555 8 view .LVU3006 8889 0046 15F0010F tst r5, #1 - ARM GAS /tmp/cczbjqIl.s page 307 + ARM GAS /tmp/ccQCFK4e.s page 307 8890 004a 39D1 bne .L653 @@ -18418,7 +18418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8930 .loc 1 4597 8 view .LVU3020 8931 0076 D0B9 cbnz r0, .L658 8932 .LVL1029: - ARM GAS /tmp/cczbjqIl.s page 308 + ARM GAS /tmp/ccQCFK4e.s page 308 8933 .L651: @@ -18478,7 +18478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 8971 009a 04A8 add r0, sp, #16 8972 .LVL1035: 4588:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) res = FR_DENIED; /* Not empty? */ - ARM GAS /tmp/cczbjqIl.s page 309 + ARM GAS /tmp/ccQCFK4e.s page 309 8973 .loc 1 4588 14 view .LVU3037 @@ -18538,7 +18538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9018 .thumb 9019 .thumb_func 9021 f_mkdir: - ARM GAS /tmp/cczbjqIl.s page 310 + ARM GAS /tmp/ccQCFK4e.s page 310 9022 .LVL1041: @@ -18598,7 +18598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9063 0014 0493 str r3, [sp, #16] 4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); 9064 .loc 1 4636 2 is_stmt 1 view .LVU3061 - ARM GAS /tmp/cczbjqIl.s page 311 + ARM GAS /tmp/ccQCFK4e.s page 311 4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); @@ -18658,7 +18658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9105 .loc 1 4644 4 is_stmt 1 view .LVU3075 4644:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.objsize = (DWORD)fs->csize * SS(fs); 9106 .loc 1 4644 10 is_stmt 0 view .LVU3076 - ARM GAS /tmp/cczbjqIl.s page 312 + ARM GAS /tmp/ccQCFK4e.s page 312 9107 0038 0021 movs r1, #0 @@ -18718,7 +18718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9146 .L662: 4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME(); 9147 .loc 1 4650 4 is_stmt 1 view .LVU3092 - ARM GAS /tmp/cczbjqIl.s page 313 + ARM GAS /tmp/ccQCFK4e.s page 313 4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME(); @@ -18778,7 +18778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9188 0088 0B22 movs r2, #11 9189 008a 2021 movs r1, #32 9190 008c 4046 mov r0, r8 - ARM GAS /tmp/cczbjqIl.s page 314 + ARM GAS /tmp/ccQCFK4e.s page 314 9191 008e FFF7FEFF bl mem_set @@ -18838,7 +18838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9230 00c8 0398 ldr r0, [sp, #12] 9231 00ca 0378 ldrb r3, [r0] @ zero_extendqisi2 4664:Middlewares/Third_Party/FatFs/src/ff.c **** st_clust(fs, dir + SZDIRE, pcl); - ARM GAS /tmp/cczbjqIl.s page 315 + ARM GAS /tmp/ccQCFK4e.s page 315 9232 .loc 1 4664 9 view .LVU3122 @@ -18898,7 +18898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9271 00f0 039B ldr r3, [sp, #12] 9272 00f2 9A89 ldrh r2, [r3, #12] 9273 00f4 0021 movs r1, #0 - ARM GAS /tmp/cczbjqIl.s page 316 + ARM GAS /tmp/ccQCFK4e.s page 316 9274 00f6 4046 mov r0, r8 @@ -18958,7 +18958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9315 .loc 1 4664 61 discriminator 2 view .LVU3150 9316 0118 DAE7 b .L665 9317 .LVL1083: - ARM GAS /tmp/cczbjqIl.s page 317 + ARM GAS /tmp/ccQCFK4e.s page 317 9318 .L667: @@ -19018,7 +19018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 9360 .loc 1 4694 6 view .LVU3163 4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/cczbjqIl.s page 318 + ARM GAS /tmp/ccQCFK4e.s page 318 9361 .loc 1 4694 20 is_stmt 0 view .LVU3164 @@ -19078,7 +19078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9408 0002 A3B0 sub sp, sp, #140 9409 .LCFI107: 9410 .cfi_def_cfa_offset 152 - ARM GAS /tmp/cczbjqIl.s page 319 + ARM GAS /tmp/ccQCFK4e.s page 319 9411 0004 0190 str r0, [sp, #4] @@ -19138,7 +19138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); 9451 .loc 1 4733 3 is_stmt 1 view .LVU3188 4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); - ARM GAS /tmp/cczbjqIl.s page 320 + ARM GAS /tmp/ccQCFK4e.s page 320 9452 .loc 1 4733 14 is_stmt 0 view .LVU3189 @@ -19198,7 +19198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9491 004c 1E99 ldr r1, [sp, #120] 9492 004e 0B31 adds r1, r1, #11 9493 0050 03A8 add r0, sp, #12 - ARM GAS /tmp/cczbjqIl.s page 321 + ARM GAS /tmp/ccQCFK4e.s page 321 9494 0052 FFF7FEFF bl mem_cpy @@ -19258,7 +19258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9536 .loc 1 4775 8 is_stmt 0 view .LVU3216 9537 0084 0428 cmp r0, #4 9538 0086 0CD0 beq .L687 - ARM GAS /tmp/cczbjqIl.s page 322 + ARM GAS /tmp/ccQCFK4e.s page 322 9539 .LVL1113: @@ -19318,7 +19318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9578 .loc 1 4778 7 is_stmt 1 view .LVU3231 4778:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(dir + 13, buf + 2, 19); 9579 .loc 1 4778 11 is_stmt 0 view .LVU3232 - ARM GAS /tmp/cczbjqIl.s page 323 + ARM GAS /tmp/ccQCFK4e.s page 323 9580 00ae 129D ldr r5, [sp, #72] @@ -19378,7 +19378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9620 .LVL1124: 9621 00e8 0146 mov r1, r0 4783:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dw) { - ARM GAS /tmp/cczbjqIl.s page 324 + ARM GAS /tmp/ccQCFK4e.s page 324 9622 .loc 1 4783 13 discriminator 1 view .LVU3247 @@ -19438,7 +19438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9662 .LVL1131: 4791:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 9663 .loc 1 4791 10 is_stmt 0 view .LVU3262 - ARM GAS /tmp/cczbjqIl.s page 325 + ARM GAS /tmp/ccQCFK4e.s page 325 9664 0116 FFF7FEFF bl st_clust @@ -19498,7 +19498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9705 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 9706 .LCFI110: 9707 .cfi_def_cfa_offset 36 - ARM GAS /tmp/cczbjqIl.s page 326 + ARM GAS /tmp/ccQCFK4e.s page 326 9708 .cfi_offset 4, -36 @@ -19558,7 +19558,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9745 .loc 1 5328 5 is_stmt 0 view .LVU3284 9746 0014 0028 cmp r0, #0 5328:Middlewares/Third_Party/FatFs/src/ff.c **** if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the volume */ - ARM GAS /tmp/cczbjqIl.s page 327 + ARM GAS /tmp/ccQCFK4e.s page 327 9747 .loc 1 5328 5 view .LVU3285 @@ -19618,7 +19618,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9784 0042 2046 mov r0, r4 9785 .LVL1141: 5337:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS != _MIN_SS /* Get sector size of the medium if variable sector size cfg. */ - ARM GAS /tmp/cczbjqIl.s page 328 + ARM GAS /tmp/ccQCFK4e.s page 328 9786 .loc 1 5337 6 view .LVU3303 @@ -19678,7 +19678,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9826 007e 00F2D082 bhi .L742 5340:Middlewares/Third_Party/FatFs/src/ff.c **** #else 9827 .loc 1 5340 48 discriminator 2 view .LVU3318 - ARM GAS /tmp/cczbjqIl.s page 329 + ARM GAS /tmp/ccQCFK4e.s page 329 9828 0082 5A1E subs r2, r3, #1 @@ -19738,7 +19738,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9866 00b6 00F0BE82 beq .L747 5354:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get partition information from partition table in the MBR */ 9867 .loc 1 5354 2 is_stmt 1 view .LVU3335 - ARM GAS /tmp/cczbjqIl.s page 330 + ARM GAS /tmp/ccQCFK4e.s page 330 5364:Middlewares/Third_Party/FatFs/src/ff.c **** b_vol = (opt & FM_SFD) ? 0 : 63; /* Volume start sector */ @@ -19798,7 +19798,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9905 00ea 802D cmp r5, #128 9906 00ec 00F2B882 bhi .L752 5379:Middlewares/Third_Party/FatFs/src/ff.c **** if ((opt & FM_ANY) == FM_FAT32 || !(opt & FM_FAT)) { /* FAT32 only or no-FAT? */ - ARM GAS /tmp/cczbjqIl.s page 331 + ARM GAS /tmp/ccQCFK4e.s page 331 9907 .loc 1 5379 3 is_stmt 1 view .LVU3353 @@ -19858,7 +19858,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9950 0136 1D46 mov r5, r3 9951 .LVL1152: 5604:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 332 + ARM GAS /tmp/ccQCFK4e.s page 332 9952 .loc 1 5604 10 view .LVU3365 @@ -19918,7 +19918,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 9990 015a 0444 add r4, r4, r0 5564:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* FAT12/16 volume */ 9991 .loc 1 5564 8 view .LVU3382 - ARM GAS /tmp/cczbjqIl.s page 333 + ARM GAS /tmp/ccQCFK4e.s page 333 9992 015c 5248 ldr r0, .L793+8 @@ -19978,7 +19978,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10031 0186 DDD0 beq .L706 5558:Middlewares/Third_Party/FatFs/src/ff.c **** } 10032 .loc 1 5558 36 discriminator 3 view .LVU3398 - ARM GAS /tmp/cczbjqIl.s page 334 + ARM GAS /tmp/ccQCFK4e.s page 334 10033 0188 A342 cmp r3, r4 @@ -20038,7 +20038,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10072 .loc 1 5575 6 view .LVU3413 5575:Middlewares/Third_Party/FatFs/src/ff.c **** } 10073 .loc 1 5575 18 is_stmt 0 view .LVU3414 - ARM GAS /tmp/cczbjqIl.s page 335 + ARM GAS /tmp/ccQCFK4e.s page 335 10074 01ac 03EB4303 add r3, r3, r3, lsl #1 @@ -20098,7 +20098,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10113 .LVL1178: 5597:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 10114 .loc 1 5597 14 discriminator 1 view .LVU3430 - ARM GAS /tmp/cczbjqIl.s page 336 + ARM GAS /tmp/ccQCFK4e.s page 336 10115 01d4 B8F1010F cmp r8, #1 @@ -20158,7 +20158,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10153 01fe A846 mov r8, r5 10154 .LVL1183: 10155 .L710: - ARM GAS /tmp/cczbjqIl.s page 337 + ARM GAS /tmp/ccQCFK4e.s page 337 5570:Middlewares/Third_Party/FatFs/src/ff.c **** if (n_clst > MAX_FAT12) { @@ -20218,7 +20218,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5581:Middlewares/Third_Party/FatFs/src/ff.c **** b_data = b_fat + sz_fat * n_fats + sz_dir; /* Data base */ 10194 .loc 1 5581 10 is_stmt 0 view .LVU3463 10195 0228 0EEB0B09 add r9, lr, fp - ARM GAS /tmp/cczbjqIl.s page 338 + ARM GAS /tmp/ccQCFK4e.s page 338 10196 .LVL1191: @@ -20278,7 +20278,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10233 0250 C0F00C82 bcc .L759 5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) { 10234 .loc 1 5594 4 is_stmt 1 view .LVU3481 - ARM GAS /tmp/cczbjqIl.s page 339 + ARM GAS /tmp/ccQCFK4e.s page 339 5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) { @@ -20338,7 +20338,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 10273 .loc 1 5609 6 is_stmt 1 view .LVU3498 5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; - ARM GAS /tmp/cczbjqIl.s page 340 + ARM GAS /tmp/ccQCFK4e.s page 340 10274 .loc 1 5609 9 is_stmt 0 view .LVU3499 @@ -20398,7 +20398,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10318 02c8 40F6F572 movw r2, #4085 10319 02cc BAF1010F cmp r10, #1 10320 02d0 14BF ite ne - ARM GAS /tmp/cczbjqIl.s page 341 + ARM GAS /tmp/ccQCFK4e.s page 341 10321 02d2 0023 movne r3, #0 @@ -20458,7 +20458,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10363 0314 3374 strb r3, [r6, #16] 5634:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 0x10000) { 10364 .loc 1 5634 3 is_stmt 1 view .LVU3522 - ARM GAS /tmp/cczbjqIl.s page 342 + ARM GAS /tmp/ccQCFK4e.s page 342 10365 0316 06F11100 add r0, r6, #17 @@ -20518,7 +20518,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10406 .loc 1 5644 6 is_stmt 0 view .LVU3535 10407 035e BAF1030F cmp r10, #3 10408 0362 6BD0 beq .L787 - ARM GAS /tmp/cczbjqIl.s page 343 + ARM GAS /tmp/ccQCFK4e.s page 343 5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ @@ -20578,7 +20578,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10451 03ac FFF7FEFF bl disk_write 10452 .LVL1224: 5661:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 344 + ARM GAS /tmp/ccQCFK4e.s page 344 10453 .loc 1 5661 6 discriminator 1 view .LVU3548 @@ -20638,7 +20638,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5697:Middlewares/Third_Party/FatFs/src/ff.c **** do { 10494 .loc 1 5697 35 view .LVU3562 10495 03e2 DDF82080 ldr r8, [sp, #32] - ARM GAS /tmp/cczbjqIl.s page 345 + ARM GAS /tmp/ccQCFK4e.s page 345 10496 03e6 0197 str r7, [sp, #4] @@ -20698,7 +20698,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10535 .loc 1 5709 3 view .LVU3577 5709:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x0C; /* FAT32X */ 10536 .loc 1 5709 6 is_stmt 0 view .LVU3578 - ARM GAS /tmp/cczbjqIl.s page 346 + ARM GAS /tmp/ccQCFK4e.s page 346 10537 040e BAF1030F cmp r10, #3 @@ -20758,7 +20758,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5647:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */ 10579 .loc 1 5647 4 view .LVU3591 10580 0454 0221 movs r1, #2 - ARM GAS /tmp/cczbjqIl.s page 347 + ARM GAS /tmp/ccQCFK4e.s page 347 10581 0456 06F12C00 add r0, r6, #44 @@ -20818,7 +20818,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10625 04a6 6A49 ldr r1, .L795+12 10626 04a8 3046 mov r0, r6 10627 04aa FFF7FEFF bl st_dword - ARM GAS /tmp/cczbjqIl.s page 348 + ARM GAS /tmp/ccQCFK4e.s page 348 10628 .LVL1251: @@ -20878,7 +20878,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5685:Middlewares/Third_Party/FatFs/src/ff.c **** } 10673 .loc 1 5685 5 is_stmt 0 discriminator 2 view .LVU3611 10674 0500 6FF00701 mvn r1, #7 - ARM GAS /tmp/cczbjqIl.s page 349 + ARM GAS /tmp/ccQCFK4e.s page 349 10675 .L731: @@ -20938,7 +20938,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10716 .loc 1 5693 13 view .LVU3624 10717 053a B8EB0A08 subs r8, r8, r10 10718 .LVL1265: - ARM GAS /tmp/cczbjqIl.s page 350 + ARM GAS /tmp/ccQCFK4e.s page 350 5693:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -20998,7 +20998,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10763 0578 4FF00408 mov r8, #4 10764 .LVL1275: 5715:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 351 + ARM GAS /tmp/ccQCFK4e.s page 351 10765 .loc 1 5715 9 discriminator 1 view .LVU3635 @@ -21058,7 +21058,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5734:Middlewares/Third_Party/FatFs/src/ff.c **** pte[PTE_System] = sys; /* System type */ 10804 .loc 1 5734 19 is_stmt 0 view .LVU3651 10805 05ac 86F8C151 strb r5, [r6, #449] - ARM GAS /tmp/cczbjqIl.s page 352 + ARM GAS /tmp/ccQCFK4e.s page 352 5735:Middlewares/Third_Party/FatFs/src/ff.c **** n = (b_vol + sz_vol) / (63 * 255); /* (End CHS may be invalid) */ @@ -21118,7 +21118,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10843 05e8 3B46 mov r3, r7 10844 05ea 2A46 mov r2, r5 10845 05ec 3146 mov r1, r6 - ARM GAS /tmp/cczbjqIl.s page 353 + ARM GAS /tmp/ccQCFK4e.s page 353 10846 05ee 2046 mov r0, r4 @@ -21178,7 +21178,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 5336:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK || !sz_blk || sz_blk > 32768 || (sz_blk & 10889 .loc 1 5336 33 discriminator 1 view .LVU3680 10890 0616 0A20 movs r0, #10 - ARM GAS /tmp/cczbjqIl.s page 354 + ARM GAS /tmp/ccQCFK4e.s page 354 10891 .LVL1294: @@ -21238,7 +21238,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10937 .loc 1 5366 30 discriminator 1 view .LVU3688 10938 063e 0E20 movs r0, #14 10939 0640 EAE7 b .L696 - ARM GAS /tmp/cczbjqIl.s page 355 + ARM GAS /tmp/ccQCFK4e.s page 355 10940 .L796: @@ -21298,7 +21298,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 10985 .LVL1305: 10986 .L764: 5614:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cczbjqIl.s page 356 + ARM GAS /tmp/ccQCFK4e.s page 356 10987 .loc 1 5614 13 view .LVU3698 @@ -21358,7 +21358,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11035 @ frame_needed = 0, uses_anonymous_args = 0 5835:Middlewares/Third_Party/FatFs/src/ff.c **** int n = 0; 11036 .loc 1 5835 1 is_stmt 0 view .LVU3707 - ARM GAS /tmp/cczbjqIl.s page 357 + ARM GAS /tmp/ccQCFK4e.s page 357 11037 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} @@ -21418,7 +21418,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11078 0018 AB42 cmp r3, r5 11079 001a 13DD ble .L799 5887:Middlewares/Third_Party/FatFs/src/ff.c **** if (rc != 1) break; - ARM GAS /tmp/cczbjqIl.s page 358 + ARM GAS /tmp/ccQCFK4e.s page 358 11080 .loc 1 5887 3 is_stmt 1 view .LVU3721 @@ -21478,7 +21478,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11119 .L799: 5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */ 11120 .loc 1 5896 2 is_stmt 1 view .LVU3737 - ARM GAS /tmp/cczbjqIl.s page 359 + ARM GAS /tmp/ccQCFK4e.s page 359 5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */ @@ -21538,7 +21538,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11162 .loc 1 6002 1 is_stmt 0 view .LVU3746 11163 0000 10B5 push {r4, lr} 11164 .LCFI118: - ARM GAS /tmp/cczbjqIl.s page 360 + ARM GAS /tmp/ccQCFK4e.s page 360 11165 .cfi_def_cfa_offset 8 @@ -21598,7 +21598,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6015:Middlewares/Third_Party/FatFs/src/ff.c **** /* Put a string to the file */ 6016:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 6017:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cczbjqIl.s page 361 + ARM GAS /tmp/ccQCFK4e.s page 361 6018:Middlewares/Third_Party/FatFs/src/ff.c **** int f_puts ( @@ -21658,7 +21658,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6029:Middlewares/Third_Party/FatFs/src/ff.c **** } 11252 .loc 1 6029 1 view .LVU3768 11253 0022 14B0 add sp, sp, #80 - ARM GAS /tmp/cczbjqIl.s page 362 + ARM GAS /tmp/ccQCFK4e.s page 362 11254 .LCFI123: @@ -21718,7 +21718,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11296 .cfi_def_cfa_offset 160 11297 0008 0146 mov r1, r0 11298 000a 25AC add r4, sp, #148 - ARM GAS /tmp/cczbjqIl.s page 363 + ARM GAS /tmp/ccQCFK4e.s page 363 11299 000c 54F8045B ldr r5, [r4], #4 @@ -21778,7 +21778,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6061:Middlewares/Third_Party/FatFs/src/ff.c **** continue; 11336 .loc 1 6061 4 view .LVU3790 6057:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == 0) break; /* End of string */ - ARM GAS /tmp/cczbjqIl.s page 364 + ARM GAS /tmp/ccQCFK4e.s page 364 11337 .loc 1 6057 11 is_stmt 0 view .LVU3791 @@ -21838,7 +21838,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11377 .LVL1349: 6066:Middlewares/Third_Party/FatFs/src/ff.c **** f = 1; c = *fmt++; 11378 .loc 1 6066 6 view .LVU3808 - ARM GAS /tmp/cczbjqIl.s page 365 + ARM GAS /tmp/ccQCFK4e.s page 365 11379 004a 0126 movs r6, #1 @@ -21898,7 +21898,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11423 0076 46F00406 orr r6, r6, #4 11424 .LVL1357: 11425 .loc 1 6077 12 is_stmt 1 view .LVU3825 - ARM GAS /tmp/cczbjqIl.s page 366 + ARM GAS /tmp/ccQCFK4e.s page 366 11426 .loc 1 6077 14 is_stmt 0 view .LVU3826 @@ -21958,7 +21958,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11475 00b4 5C .byte (.L824-.L826)/2 11476 00b5 5C .byte (.L824-.L826)/2 11477 00b6 5A .byte (.L825-.L826)/2 - ARM GAS /tmp/cczbjqIl.s page 367 + ARM GAS /tmp/ccQCFK4e.s page 367 11478 .LVL1361: @@ -22018,7 +22018,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11526 .loc 1 6087 13 is_stmt 0 discriminator 1 view .LVU3851 11527 00e6 3746 mov r7, r6 11528 .LVL1370: - ARM GAS /tmp/cczbjqIl.s page 368 + ARM GAS /tmp/ccQCFK4e.s page 368 11529 .L834: @@ -22078,7 +22078,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 6093:Middlewares/Third_Party/FatFs/src/ff.c **** case 'C' : /* Character */ 6094:Middlewares/Third_Party/FatFs/src/ff.c **** putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue; 11578 .loc 1 6094 4 is_stmt 1 view .LVU3866 - ARM GAS /tmp/cczbjqIl.s page 369 + ARM GAS /tmp/ccQCFK4e.s page 369 11579 .loc 1 6094 25 is_stmt 0 view .LVU3867 @@ -22138,7 +22138,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11613 0138 1268 ldr r2, [r2] 11614 .L842: 11615 .LVL1386: - ARM GAS /tmp/cczbjqIl.s page 370 + ARM GAS /tmp/ccQCFK4e.s page 370 6115:Middlewares/Third_Party/FatFs/src/ff.c **** if (d == 'D' && (v & 0x80000000)) { @@ -22198,7 +22198,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11657 .loc 1 6082 3 view .LVU3896 11658 0160 0220 movs r0, #2 11659 0162 E3E7 b .L829 - ARM GAS /tmp/cczbjqIl.s page 371 + ARM GAS /tmp/ccQCFK4e.s page 371 11660 .L859: @@ -22258,7 +22258,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11705 .loc 1 6124 14 is_stmt 1 view .LVU3908 11706 .loc 1 6124 19 is_stmt 0 view .LVU3909 11707 0196 1F2F cmp r7, #31 - ARM GAS /tmp/cczbjqIl.s page 372 + ARM GAS /tmp/ccQCFK4e.s page 372 11708 0198 8CBF ite hi @@ -22318,7 +22318,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11749 .loc 1 6125 6 is_stmt 0 view .LVU3925 11750 01c2 16F0080F tst r6, #8 11751 01c6 08D0 beq .L849 - ARM GAS /tmp/cczbjqIl.s page 373 + ARM GAS /tmp/ccQCFK4e.s page 373 11752 .loc 1 6125 14 is_stmt 1 discriminator 1 view .LVU3926 @@ -22378,7 +22378,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11802 .loc 1 6127 23 discriminator 2 view .LVU3942 11803 0206 C846 mov r8, r9 11804 .LVL1412: - ARM GAS /tmp/cczbjqIl.s page 374 + ARM GAS /tmp/ccQCFK4e.s page 374 11805 .L854: @@ -22438,7 +22438,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11849 @ sp needed 11850 023c BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr} 11851 .LCFI128: - ARM GAS /tmp/cczbjqIl.s page 375 + ARM GAS /tmp/ccQCFK4e.s page 375 11852 .cfi_restore 14 @@ -22498,7 +22498,7 @@ ARM GAS /tmp/cczbjqIl.s page 1 11903 0040 C0C1C2C3 .ascii "\300\301\302\303\304\305AA\310\311\312\313\314\315\316" 11903 C4C54141 11903 C8C9CACB - ARM GAS /tmp/cczbjqIl.s page 376 + ARM GAS /tmp/ccQCFK4e.s page 376 11903 CCCDCE @@ -22542,173 +22542,173 @@ ARM GAS /tmp/cczbjqIl.s page 1 11933 .file 8 "Middlewares/Third_Party/FatFs/src/diskio.h" 11934 .file 9 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdarg.h" 11935 .file 10 "" - ARM GAS /tmp/cczbjqIl.s page 377 + ARM GAS /tmp/ccQCFK4e.s page 377 DEFINED SYMBOLS *ABS*:00000000 ff.c - /tmp/cczbjqIl.s:20 .text.ld_word:00000000 $t - /tmp/cczbjqIl.s:25 .text.ld_word:00000000 ld_word - /tmp/cczbjqIl.s:52 .text.ld_dword:00000000 $t - /tmp/cczbjqIl.s:57 .text.ld_dword:00000000 ld_dword - /tmp/cczbjqIl.s:96 .text.st_word:00000000 $t - /tmp/cczbjqIl.s:101 .text.st_word:00000000 st_word - /tmp/cczbjqIl.s:125 .text.st_dword:00000000 $t - /tmp/cczbjqIl.s:130 .text.st_dword:00000000 st_dword - /tmp/cczbjqIl.s:169 .text.mem_cpy:00000000 $t - /tmp/cczbjqIl.s:174 .text.mem_cpy:00000000 mem_cpy - /tmp/cczbjqIl.s:214 .text.mem_set:00000000 $t - /tmp/cczbjqIl.s:219 .text.mem_set:00000000 mem_set - /tmp/cczbjqIl.s:246 .text.mem_cmp:00000000 $t - /tmp/cczbjqIl.s:251 .text.mem_cmp:00000000 mem_cmp - /tmp/cczbjqIl.s:294 .text.chk_chr:00000000 $t - /tmp/cczbjqIl.s:299 .text.chk_chr:00000000 chk_chr - /tmp/cczbjqIl.s:335 .text.chk_lock:00000000 $t - /tmp/cczbjqIl.s:340 .text.chk_lock:00000000 chk_lock - /tmp/cczbjqIl.s:477 .text.chk_lock:00000078 $d - /tmp/cczbjqIl.s:11911 .bss.Files:00000000 Files - /tmp/cczbjqIl.s:482 .text.enq_lock:00000000 $t - /tmp/cczbjqIl.s:487 .text.enq_lock:00000000 enq_lock - /tmp/cczbjqIl.s:531 .text.enq_lock:0000001c $d - /tmp/cczbjqIl.s:536 .text.inc_lock:00000000 $t - /tmp/cczbjqIl.s:541 .text.inc_lock:00000000 inc_lock - /tmp/cczbjqIl.s:711 .text.inc_lock:0000009c $d - /tmp/cczbjqIl.s:716 .text.dec_lock:00000000 $t - /tmp/cczbjqIl.s:721 .text.dec_lock:00000000 dec_lock - /tmp/cczbjqIl.s:802 .text.dec_lock:0000003c $d - /tmp/cczbjqIl.s:807 .text.clear_lock:00000000 $t - /tmp/cczbjqIl.s:812 .text.clear_lock:00000000 clear_lock - /tmp/cczbjqIl.s:889 .text.clear_lock:00000038 $d - /tmp/cczbjqIl.s:894 .text.clust2sect:00000000 $t - /tmp/cczbjqIl.s:899 .text.clust2sect:00000000 clust2sect - /tmp/cczbjqIl.s:939 .text.clmt_clust:00000000 $t - /tmp/cczbjqIl.s:944 .text.clmt_clust:00000000 clmt_clust - /tmp/cczbjqIl.s:1015 .text.ld_clust:00000000 $t - /tmp/cczbjqIl.s:1020 .text.ld_clust:00000000 ld_clust - /tmp/cczbjqIl.s:1076 .text.st_clust:00000000 $t - /tmp/cczbjqIl.s:1081 .text.st_clust:00000000 st_clust - /tmp/cczbjqIl.s:1130 .text.get_fileinfo:00000000 $t - /tmp/cczbjqIl.s:1135 .text.get_fileinfo:00000000 get_fileinfo - /tmp/cczbjqIl.s:1275 .rodata.create_name.str1.4:00000000 $d - /tmp/cczbjqIl.s:1279 .text.create_name:00000000 $t - /tmp/cczbjqIl.s:1284 .text.create_name:00000000 create_name - /tmp/cczbjqIl.s:1516 .text.create_name:000000c8 $d - /tmp/cczbjqIl.s:11899 .rodata.ExCvt:00000000 ExCvt - /tmp/cczbjqIl.s:1522 .text.get_ldnumber:00000000 $t - /tmp/cczbjqIl.s:1527 .text.get_ldnumber:00000000 get_ldnumber - /tmp/cczbjqIl.s:1628 .text.putc_init:00000000 $t - /tmp/cczbjqIl.s:1633 .text.putc_init:00000000 putc_init - /tmp/cczbjqIl.s:1656 .text.validate:00000000 $t - /tmp/cczbjqIl.s:1661 .text.validate:00000000 validate - /tmp/cczbjqIl.s:1770 .text.sync_window:00000000 $t - /tmp/cczbjqIl.s:1775 .text.sync_window:00000000 sync_window - ARM GAS /tmp/cczbjqIl.s page 378 + /tmp/ccQCFK4e.s:20 .text.ld_word:00000000 $t + /tmp/ccQCFK4e.s:25 .text.ld_word:00000000 ld_word + /tmp/ccQCFK4e.s:52 .text.ld_dword:00000000 $t + /tmp/ccQCFK4e.s:57 .text.ld_dword:00000000 ld_dword + /tmp/ccQCFK4e.s:96 .text.st_word:00000000 $t + /tmp/ccQCFK4e.s:101 .text.st_word:00000000 st_word + /tmp/ccQCFK4e.s:125 .text.st_dword:00000000 $t + /tmp/ccQCFK4e.s:130 .text.st_dword:00000000 st_dword + /tmp/ccQCFK4e.s:169 .text.mem_cpy:00000000 $t + /tmp/ccQCFK4e.s:174 .text.mem_cpy:00000000 mem_cpy + /tmp/ccQCFK4e.s:214 .text.mem_set:00000000 $t + /tmp/ccQCFK4e.s:219 .text.mem_set:00000000 mem_set + /tmp/ccQCFK4e.s:246 .text.mem_cmp:00000000 $t + /tmp/ccQCFK4e.s:251 .text.mem_cmp:00000000 mem_cmp + /tmp/ccQCFK4e.s:294 .text.chk_chr:00000000 $t + /tmp/ccQCFK4e.s:299 .text.chk_chr:00000000 chk_chr + /tmp/ccQCFK4e.s:335 .text.chk_lock:00000000 $t + /tmp/ccQCFK4e.s:340 .text.chk_lock:00000000 chk_lock + /tmp/ccQCFK4e.s:477 .text.chk_lock:00000078 $d + /tmp/ccQCFK4e.s:11911 .bss.Files:00000000 Files + /tmp/ccQCFK4e.s:482 .text.enq_lock:00000000 $t + /tmp/ccQCFK4e.s:487 .text.enq_lock:00000000 enq_lock + /tmp/ccQCFK4e.s:531 .text.enq_lock:0000001c $d + /tmp/ccQCFK4e.s:536 .text.inc_lock:00000000 $t + /tmp/ccQCFK4e.s:541 .text.inc_lock:00000000 inc_lock + /tmp/ccQCFK4e.s:711 .text.inc_lock:0000009c $d + /tmp/ccQCFK4e.s:716 .text.dec_lock:00000000 $t + /tmp/ccQCFK4e.s:721 .text.dec_lock:00000000 dec_lock + /tmp/ccQCFK4e.s:802 .text.dec_lock:0000003c $d + /tmp/ccQCFK4e.s:807 .text.clear_lock:00000000 $t + /tmp/ccQCFK4e.s:812 .text.clear_lock:00000000 clear_lock + /tmp/ccQCFK4e.s:889 .text.clear_lock:00000038 $d + /tmp/ccQCFK4e.s:894 .text.clust2sect:00000000 $t + /tmp/ccQCFK4e.s:899 .text.clust2sect:00000000 clust2sect + /tmp/ccQCFK4e.s:939 .text.clmt_clust:00000000 $t + /tmp/ccQCFK4e.s:944 .text.clmt_clust:00000000 clmt_clust + /tmp/ccQCFK4e.s:1015 .text.ld_clust:00000000 $t + /tmp/ccQCFK4e.s:1020 .text.ld_clust:00000000 ld_clust + /tmp/ccQCFK4e.s:1076 .text.st_clust:00000000 $t + /tmp/ccQCFK4e.s:1081 .text.st_clust:00000000 st_clust + /tmp/ccQCFK4e.s:1130 .text.get_fileinfo:00000000 $t + /tmp/ccQCFK4e.s:1135 .text.get_fileinfo:00000000 get_fileinfo + /tmp/ccQCFK4e.s:1275 .rodata.create_name.str1.4:00000000 $d + /tmp/ccQCFK4e.s:1279 .text.create_name:00000000 $t + /tmp/ccQCFK4e.s:1284 .text.create_name:00000000 create_name + /tmp/ccQCFK4e.s:1516 .text.create_name:000000c8 $d + /tmp/ccQCFK4e.s:11899 .rodata.ExCvt:00000000 ExCvt + /tmp/ccQCFK4e.s:1522 .text.get_ldnumber:00000000 $t + /tmp/ccQCFK4e.s:1527 .text.get_ldnumber:00000000 get_ldnumber + /tmp/ccQCFK4e.s:1628 .text.putc_init:00000000 $t + /tmp/ccQCFK4e.s:1633 .text.putc_init:00000000 putc_init + /tmp/ccQCFK4e.s:1656 .text.validate:00000000 $t + /tmp/ccQCFK4e.s:1661 .text.validate:00000000 validate + /tmp/ccQCFK4e.s:1770 .text.sync_window:00000000 $t + /tmp/ccQCFK4e.s:1775 .text.sync_window:00000000 sync_window + ARM GAS /tmp/ccQCFK4e.s page 378 - /tmp/cczbjqIl.s:1882 .text.move_window:00000000 $t - /tmp/cczbjqIl.s:1887 .text.move_window:00000000 move_window - /tmp/cczbjqIl.s:1959 .text.check_fs:00000000 $t - /tmp/cczbjqIl.s:1964 .text.check_fs:00000000 check_fs - /tmp/cczbjqIl.s:2060 .text.check_fs:0000006c $d - /tmp/cczbjqIl.s:2067 .text.find_volume:00000000 $t - /tmp/cczbjqIl.s:2072 .text.find_volume:00000000 find_volume - /tmp/cczbjqIl.s:2746 .text.find_volume:00000314 $d - /tmp/cczbjqIl.s:11923 .bss.FatFs:00000000 FatFs - /tmp/cczbjqIl.s:11917 .bss.Fsid:00000000 Fsid - /tmp/cczbjqIl.s:2753 .text.find_volume:00000324 $t - /tmp/cczbjqIl.s:2802 .text.put_fat:00000000 $t - /tmp/cczbjqIl.s:2807 .text.put_fat:00000000 put_fat - /tmp/cczbjqIl.s:3085 .text.get_fat:00000000 $t - /tmp/cczbjqIl.s:3090 .text.get_fat:00000000 get_fat - /tmp/cczbjqIl.s:3338 .text.dir_sdi:00000000 $t - /tmp/cczbjqIl.s:3343 .text.dir_sdi:00000000 dir_sdi - /tmp/cczbjqIl.s:3548 .text.create_chain:00000000 $t - /tmp/cczbjqIl.s:3553 .text.create_chain:00000000 create_chain - /tmp/cczbjqIl.s:3789 .text.remove_chain:00000000 $t - /tmp/cczbjqIl.s:3794 .text.remove_chain:00000000 remove_chain - /tmp/cczbjqIl.s:3955 .text.dir_remove:00000000 $t - /tmp/cczbjqIl.s:3960 .text.dir_remove:00000000 dir_remove - /tmp/cczbjqIl.s:4011 .text.dir_next:00000000 $t - /tmp/cczbjqIl.s:4016 .text.dir_next:00000000 dir_next - /tmp/cczbjqIl.s:4326 .text.dir_find:00000000 $t - /tmp/cczbjqIl.s:4331 .text.dir_find:00000000 dir_find - /tmp/cczbjqIl.s:4439 .text.follow_path:00000000 $t - /tmp/cczbjqIl.s:4444 .text.follow_path:00000000 follow_path - /tmp/cczbjqIl.s:4612 .text.dir_alloc:00000000 $t - /tmp/cczbjqIl.s:4617 .text.dir_alloc:00000000 dir_alloc - /tmp/cczbjqIl.s:4728 .text.dir_register:00000000 $t - /tmp/cczbjqIl.s:4733 .text.dir_register:00000000 dir_register - /tmp/cczbjqIl.s:4807 .text.dir_read:00000000 $t - /tmp/cczbjqIl.s:4812 .text.dir_read:00000000 dir_read - /tmp/cczbjqIl.s:4934 .text.sync_fs:00000000 $t - /tmp/cczbjqIl.s:4939 .text.sync_fs:00000000 sync_fs - /tmp/cczbjqIl.s:5053 .text.sync_fs:00000080 $d - /tmp/cczbjqIl.s:5059 .text.f_mount:00000000 $t - /tmp/cczbjqIl.s:5065 .text.f_mount:00000000 f_mount - /tmp/cczbjqIl.s:5181 .text.f_mount:0000005c $d - /tmp/cczbjqIl.s:5186 .text.f_open:00000000 $t - /tmp/cczbjqIl.s:5192 .text.f_open:00000000 f_open - /tmp/cczbjqIl.s:5748 .text.f_read:00000000 $t - /tmp/cczbjqIl.s:5754 .text.f_read:00000000 f_read - /tmp/cczbjqIl.s:6186 .text.f_write:00000000 $t - /tmp/cczbjqIl.s:6192 .text.f_write:00000000 f_write - /tmp/cczbjqIl.s:6673 .text.putc_bfd:00000000 $t - /tmp/cczbjqIl.s:6678 .text.putc_bfd:00000000 putc_bfd - /tmp/cczbjqIl.s:6790 .text.putc_flush:00000000 $t - /tmp/cczbjqIl.s:6795 .text.putc_flush:00000000 putc_flush - /tmp/cczbjqIl.s:6874 .text.f_sync:00000000 $t - /tmp/cczbjqIl.s:6880 .text.f_sync:00000000 f_sync - /tmp/cczbjqIl.s:7031 .text.f_close:00000000 $t - /tmp/cczbjqIl.s:7037 .text.f_close:00000000 f_close - /tmp/cczbjqIl.s:7106 .text.f_lseek:00000000 $t - /tmp/cczbjqIl.s:7112 .text.f_lseek:00000000 f_lseek - ARM GAS /tmp/cczbjqIl.s page 379 + /tmp/ccQCFK4e.s:1882 .text.move_window:00000000 $t + /tmp/ccQCFK4e.s:1887 .text.move_window:00000000 move_window + /tmp/ccQCFK4e.s:1959 .text.check_fs:00000000 $t + /tmp/ccQCFK4e.s:1964 .text.check_fs:00000000 check_fs + /tmp/ccQCFK4e.s:2060 .text.check_fs:0000006c $d + /tmp/ccQCFK4e.s:2067 .text.find_volume:00000000 $t + /tmp/ccQCFK4e.s:2072 .text.find_volume:00000000 find_volume + /tmp/ccQCFK4e.s:2746 .text.find_volume:00000314 $d + /tmp/ccQCFK4e.s:11923 .bss.FatFs:00000000 FatFs + /tmp/ccQCFK4e.s:11917 .bss.Fsid:00000000 Fsid + /tmp/ccQCFK4e.s:2753 .text.find_volume:00000324 $t + /tmp/ccQCFK4e.s:2802 .text.put_fat:00000000 $t + /tmp/ccQCFK4e.s:2807 .text.put_fat:00000000 put_fat + /tmp/ccQCFK4e.s:3085 .text.get_fat:00000000 $t + /tmp/ccQCFK4e.s:3090 .text.get_fat:00000000 get_fat + /tmp/ccQCFK4e.s:3338 .text.dir_sdi:00000000 $t + /tmp/ccQCFK4e.s:3343 .text.dir_sdi:00000000 dir_sdi + /tmp/ccQCFK4e.s:3548 .text.create_chain:00000000 $t + /tmp/ccQCFK4e.s:3553 .text.create_chain:00000000 create_chain + /tmp/ccQCFK4e.s:3789 .text.remove_chain:00000000 $t + /tmp/ccQCFK4e.s:3794 .text.remove_chain:00000000 remove_chain + /tmp/ccQCFK4e.s:3955 .text.dir_remove:00000000 $t + /tmp/ccQCFK4e.s:3960 .text.dir_remove:00000000 dir_remove + /tmp/ccQCFK4e.s:4011 .text.dir_next:00000000 $t + /tmp/ccQCFK4e.s:4016 .text.dir_next:00000000 dir_next + /tmp/ccQCFK4e.s:4326 .text.dir_find:00000000 $t + /tmp/ccQCFK4e.s:4331 .text.dir_find:00000000 dir_find + /tmp/ccQCFK4e.s:4439 .text.follow_path:00000000 $t + /tmp/ccQCFK4e.s:4444 .text.follow_path:00000000 follow_path + /tmp/ccQCFK4e.s:4612 .text.dir_alloc:00000000 $t + /tmp/ccQCFK4e.s:4617 .text.dir_alloc:00000000 dir_alloc + /tmp/ccQCFK4e.s:4728 .text.dir_register:00000000 $t + /tmp/ccQCFK4e.s:4733 .text.dir_register:00000000 dir_register + /tmp/ccQCFK4e.s:4807 .text.dir_read:00000000 $t + /tmp/ccQCFK4e.s:4812 .text.dir_read:00000000 dir_read + /tmp/ccQCFK4e.s:4934 .text.sync_fs:00000000 $t + /tmp/ccQCFK4e.s:4939 .text.sync_fs:00000000 sync_fs + /tmp/ccQCFK4e.s:5053 .text.sync_fs:00000080 $d + /tmp/ccQCFK4e.s:5059 .text.f_mount:00000000 $t + /tmp/ccQCFK4e.s:5065 .text.f_mount:00000000 f_mount + /tmp/ccQCFK4e.s:5181 .text.f_mount:0000005c $d + /tmp/ccQCFK4e.s:5186 .text.f_open:00000000 $t + /tmp/ccQCFK4e.s:5192 .text.f_open:00000000 f_open + /tmp/ccQCFK4e.s:5748 .text.f_read:00000000 $t + /tmp/ccQCFK4e.s:5754 .text.f_read:00000000 f_read + /tmp/ccQCFK4e.s:6186 .text.f_write:00000000 $t + /tmp/ccQCFK4e.s:6192 .text.f_write:00000000 f_write + /tmp/ccQCFK4e.s:6673 .text.putc_bfd:00000000 $t + /tmp/ccQCFK4e.s:6678 .text.putc_bfd:00000000 putc_bfd + /tmp/ccQCFK4e.s:6790 .text.putc_flush:00000000 $t + /tmp/ccQCFK4e.s:6795 .text.putc_flush:00000000 putc_flush + /tmp/ccQCFK4e.s:6874 .text.f_sync:00000000 $t + /tmp/ccQCFK4e.s:6880 .text.f_sync:00000000 f_sync + /tmp/ccQCFK4e.s:7031 .text.f_close:00000000 $t + /tmp/ccQCFK4e.s:7037 .text.f_close:00000000 f_close + /tmp/ccQCFK4e.s:7106 .text.f_lseek:00000000 $t + /tmp/ccQCFK4e.s:7112 .text.f_lseek:00000000 f_lseek + ARM GAS /tmp/ccQCFK4e.s page 379 - /tmp/cczbjqIl.s:7838 .text.f_opendir:00000000 $t - /tmp/cczbjqIl.s:7844 .text.f_opendir:00000000 f_opendir - /tmp/cczbjqIl.s:8024 .text.f_closedir:00000000 $t - /tmp/cczbjqIl.s:8030 .text.f_closedir:00000000 f_closedir - /tmp/cczbjqIl.s:8096 .text.f_readdir:00000000 $t - /tmp/cczbjqIl.s:8102 .text.f_readdir:00000000 f_readdir - /tmp/cczbjqIl.s:8207 .text.f_stat:00000000 $t - /tmp/cczbjqIl.s:8213 .text.f_stat:00000000 f_stat - /tmp/cczbjqIl.s:8306 .text.f_getfree:00000000 $t - /tmp/cczbjqIl.s:8312 .text.f_getfree:00000000 f_getfree - /tmp/cczbjqIl.s:8597 .text.f_truncate:00000000 $t - /tmp/cczbjqIl.s:8603 .text.f_truncate:00000000 f_truncate - /tmp/cczbjqIl.s:8787 .text.f_unlink:00000000 $t - /tmp/cczbjqIl.s:8793 .text.f_unlink:00000000 f_unlink - /tmp/cczbjqIl.s:9015 .text.f_mkdir:00000000 $t - /tmp/cczbjqIl.s:9021 .text.f_mkdir:00000000 f_mkdir - /tmp/cczbjqIl.s:9388 .text.f_rename:00000000 $t - /tmp/cczbjqIl.s:9394 .text.f_rename:00000000 f_rename - /tmp/cczbjqIl.s:9681 .rodata.f_mkfs.str1.4:00000000 $d - /tmp/cczbjqIl.s:9691 .text.f_mkfs:00000000 $t - /tmp/cczbjqIl.s:9697 .text.f_mkfs:00000000 f_mkfs - /tmp/cczbjqIl.s:10298 .text.f_mkfs:000002a0 $d - /tmp/cczbjqIl.s:11887 .rodata.cst32.1:00000000 cst32.1 - /tmp/cczbjqIl.s:11875 .rodata.cst.0:00000000 cst.0 - /tmp/cczbjqIl.s:10306 .text.f_mkfs:000002b4 $t - /tmp/cczbjqIl.s:10943 .text.f_mkfs:00000644 $d - /tmp/cczbjqIl.s:10951 .text.f_mkfs:0000065c $t - /tmp/cczbjqIl.s:11023 .text.f_gets:00000000 $t - /tmp/cczbjqIl.s:11029 .text.f_gets:00000000 f_gets - /tmp/cczbjqIl.s:11149 .text.f_putc:00000000 $t - /tmp/cczbjqIl.s:11155 .text.f_putc:00000000 f_putc - /tmp/cczbjqIl.s:11200 .text.f_puts:00000000 $t - /tmp/cczbjqIl.s:11206 .text.f_puts:00000000 f_puts - /tmp/cczbjqIl.s:11263 .text.f_printf:00000000 $t - /tmp/cczbjqIl.s:11269 .text.f_printf:00000000 f_printf - /tmp/cczbjqIl.s:11455 .text.f_printf:000000a0 $d - /tmp/cczbjqIl.s:11872 .rodata.cst.0:00000000 $d - /tmp/cczbjqIl.s:11884 .rodata.cst32.1:00000000 $d - /tmp/cczbjqIl.s:11896 .rodata.ExCvt:00000000 $d - /tmp/cczbjqIl.s:11908 .bss.Files:00000000 $d - /tmp/cczbjqIl.s:11914 .bss.Fsid:00000000 $d - /tmp/cczbjqIl.s:11920 .bss.FatFs:00000000 $d - /tmp/cczbjqIl.s:11479 .text.f_printf:000000b7 $d - /tmp/cczbjqIl.s:11479 .text.f_printf:000000b8 $t + /tmp/ccQCFK4e.s:7838 .text.f_opendir:00000000 $t + /tmp/ccQCFK4e.s:7844 .text.f_opendir:00000000 f_opendir + /tmp/ccQCFK4e.s:8024 .text.f_closedir:00000000 $t + /tmp/ccQCFK4e.s:8030 .text.f_closedir:00000000 f_closedir + /tmp/ccQCFK4e.s:8096 .text.f_readdir:00000000 $t + /tmp/ccQCFK4e.s:8102 .text.f_readdir:00000000 f_readdir + /tmp/ccQCFK4e.s:8207 .text.f_stat:00000000 $t + /tmp/ccQCFK4e.s:8213 .text.f_stat:00000000 f_stat + /tmp/ccQCFK4e.s:8306 .text.f_getfree:00000000 $t + /tmp/ccQCFK4e.s:8312 .text.f_getfree:00000000 f_getfree + /tmp/ccQCFK4e.s:8597 .text.f_truncate:00000000 $t + /tmp/ccQCFK4e.s:8603 .text.f_truncate:00000000 f_truncate + /tmp/ccQCFK4e.s:8787 .text.f_unlink:00000000 $t + /tmp/ccQCFK4e.s:8793 .text.f_unlink:00000000 f_unlink + /tmp/ccQCFK4e.s:9015 .text.f_mkdir:00000000 $t + /tmp/ccQCFK4e.s:9021 .text.f_mkdir:00000000 f_mkdir + /tmp/ccQCFK4e.s:9388 .text.f_rename:00000000 $t + /tmp/ccQCFK4e.s:9394 .text.f_rename:00000000 f_rename + /tmp/ccQCFK4e.s:9681 .rodata.f_mkfs.str1.4:00000000 $d + /tmp/ccQCFK4e.s:9691 .text.f_mkfs:00000000 $t + /tmp/ccQCFK4e.s:9697 .text.f_mkfs:00000000 f_mkfs + /tmp/ccQCFK4e.s:10298 .text.f_mkfs:000002a0 $d + /tmp/ccQCFK4e.s:11887 .rodata.cst32.1:00000000 cst32.1 + /tmp/ccQCFK4e.s:11875 .rodata.cst.0:00000000 cst.0 + /tmp/ccQCFK4e.s:10306 .text.f_mkfs:000002b4 $t + /tmp/ccQCFK4e.s:10943 .text.f_mkfs:00000644 $d + /tmp/ccQCFK4e.s:10951 .text.f_mkfs:0000065c $t + /tmp/ccQCFK4e.s:11023 .text.f_gets:00000000 $t + /tmp/ccQCFK4e.s:11029 .text.f_gets:00000000 f_gets + /tmp/ccQCFK4e.s:11149 .text.f_putc:00000000 $t + /tmp/ccQCFK4e.s:11155 .text.f_putc:00000000 f_putc + /tmp/ccQCFK4e.s:11200 .text.f_puts:00000000 $t + /tmp/ccQCFK4e.s:11206 .text.f_puts:00000000 f_puts + /tmp/ccQCFK4e.s:11263 .text.f_printf:00000000 $t + /tmp/ccQCFK4e.s:11269 .text.f_printf:00000000 f_printf + /tmp/ccQCFK4e.s:11455 .text.f_printf:000000a0 $d + /tmp/ccQCFK4e.s:11872 .rodata.cst.0:00000000 $d + /tmp/ccQCFK4e.s:11884 .rodata.cst32.1:00000000 $d + /tmp/ccQCFK4e.s:11896 .rodata.ExCvt:00000000 $d + /tmp/ccQCFK4e.s:11908 .bss.Files:00000000 $d + /tmp/ccQCFK4e.s:11914 .bss.Fsid:00000000 $d + /tmp/ccQCFK4e.s:11920 .bss.FatFs:00000000 $d + /tmp/ccQCFK4e.s:11479 .text.f_printf:000000b7 $d + /tmp/ccQCFK4e.s:11479 .text.f_printf:000000b8 $t UNDEFINED SYMBOLS disk_status diff --git a/build/ff_gen_drv.lst b/build/ff_gen_drv.lst index 03932a8..5fd81d4 100644 --- a/build/ff_gen_drv.lst +++ b/build/ff_gen_drv.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccaLv9j7.s page 1 +ARM GAS /tmp/ccyRZSSS.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccaLv9j7.s page 1 28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** 29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /** 30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active - ARM GAS /tmp/ccaLv9j7.s page 2 + ARM GAS /tmp/ccyRZSSS.s page 2 31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers. @@ -118,7 +118,7 @@ ARM GAS /tmp/ccaLv9j7.s page 1 64 .loc 1 48 5 is_stmt 1 view .LVU13 65 .loc 1 48 18 is_stmt 0 view .LVU14 66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2 - ARM GAS /tmp/ccaLv9j7.s page 3 + ARM GAS /tmp/ccyRZSSS.s page 3 67 .LVL2: @@ -178,7 +178,7 @@ ARM GAS /tmp/ccaLv9j7.s page 1 41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0; 111 .loc 1 41 11 view .LVU32 112 004c 0120 movs r0, #1 - ARM GAS /tmp/ccaLv9j7.s page 4 + ARM GAS /tmp/ccyRZSSS.s page 4 113 .LVL10: @@ -238,7 +238,7 @@ ARM GAS /tmp/ccaLv9j7.s page 1 156 .global FATFS_UnLinkDriverEx 157 .syntax unified 158 .thumb - ARM GAS /tmp/ccaLv9j7.s page 5 + ARM GAS /tmp/ccyRZSSS.s page 5 159 .thumb_func @@ -298,7 +298,7 @@ ARM GAS /tmp/ccaLv9j7.s page 1 195 .LVL15: 196 .loc 1 90 25 view .LVU54 197 001c 0020 movs r0, #0 - ARM GAS /tmp/ccaLv9j7.s page 6 + ARM GAS /tmp/ccyRZSSS.s page 6 198 .LVL16: @@ -358,7 +358,7 @@ ARM GAS /tmp/ccaLv9j7.s page 1 242 .align 1 243 .global FATFS_UnLinkDriver 244 .syntax unified - ARM GAS /tmp/ccaLv9j7.s page 7 + ARM GAS /tmp/ccyRZSSS.s page 7 245 .thumb @@ -418,7 +418,7 @@ ARM GAS /tmp/ccaLv9j7.s page 1 283 @ frame_needed = 0, uses_anonymous_args = 0 284 @ link register save eliminated. 118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr; - ARM GAS /tmp/ccaLv9j7.s page 8 + ARM GAS /tmp/ccyRZSSS.s page 8 285 .loc 1 118 3 view .LVU75 @@ -450,25 +450,25 @@ ARM GAS /tmp/ccaLv9j7.s page 1 311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" - ARM GAS /tmp/ccaLv9j7.s page 9 + ARM GAS /tmp/ccyRZSSS.s page 9 DEFINED SYMBOLS *ABS*:00000000 ff_gen_drv.c - /tmp/ccaLv9j7.s:20 .text.FATFS_LinkDriverEx:00000000 $t - /tmp/ccaLv9j7.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx - /tmp/ccaLv9j7.s:120 .text.FATFS_LinkDriverEx:00000050 $d - /tmp/ccaLv9j7.s:303 .bss.disk:00000000 disk - /tmp/ccaLv9j7.s:125 .text.FATFS_LinkDriver:00000000 $t - /tmp/ccaLv9j7.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver - /tmp/ccaLv9j7.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t - /tmp/ccaLv9j7.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx - /tmp/ccaLv9j7.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d - /tmp/ccaLv9j7.s:242 .text.FATFS_UnLinkDriver:00000000 $t - /tmp/ccaLv9j7.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver - /tmp/ccaLv9j7.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t - /tmp/ccaLv9j7.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr - /tmp/ccaLv9j7.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d - /tmp/ccaLv9j7.s:300 .bss.disk:00000000 $d + /tmp/ccyRZSSS.s:20 .text.FATFS_LinkDriverEx:00000000 $t + /tmp/ccyRZSSS.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx + /tmp/ccyRZSSS.s:120 .text.FATFS_LinkDriverEx:00000050 $d + /tmp/ccyRZSSS.s:303 .bss.disk:00000000 disk + /tmp/ccyRZSSS.s:125 .text.FATFS_LinkDriver:00000000 $t + /tmp/ccyRZSSS.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver + /tmp/ccyRZSSS.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t + /tmp/ccyRZSSS.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx + /tmp/ccyRZSSS.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d + /tmp/ccyRZSSS.s:242 .text.FATFS_UnLinkDriver:00000000 $t + /tmp/ccyRZSSS.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver + /tmp/ccyRZSSS.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t + /tmp/ccyRZSSS.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr + /tmp/ccyRZSSS.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d + /tmp/ccyRZSSS.s:300 .bss.disk:00000000 $d NO UNDEFINED SYMBOLS diff --git a/build/main.lst b/build/main.lst index 62b9f39..589df87 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccEQxcUB.s page 1 +ARM GAS /tmp/ccuHnxNu.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */ 29:Drivers/CMSIS/Include/core_cm7.h **** #endif 30:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 2 + ARM GAS /tmp/ccuHnxNu.s page 2 31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC @@ -118,7 +118,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 86:Drivers/CMSIS/Include/core_cm7.h **** #endif 87:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 3 + ARM GAS /tmp/ccuHnxNu.s page 3 88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) @@ -178,7 +178,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 143:Drivers/CMSIS/Include/core_cm7.h **** #endif 144:Drivers/CMSIS/Include/core_cm7.h **** #else - ARM GAS /tmp/ccEQxcUB.s page 4 + ARM GAS /tmp/ccuHnxNu.s page 4 145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U @@ -238,7 +238,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!" 200:Drivers/CMSIS/Include/core_cm7.h **** #endif 201:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 5 + ARM GAS /tmp/ccuHnxNu.s page 5 202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT @@ -298,7 +298,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register 257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register 258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/ - ARM GAS /tmp/ccEQxcUB.s page 6 + ARM GAS /tmp/ccuHnxNu.s page 6 259:Drivers/CMSIS/Include/core_cm7.h **** /** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 313:Drivers/CMSIS/Include/core_cm7.h **** typedef union 314:Drivers/CMSIS/Include/core_cm7.h **** { 315:Drivers/CMSIS/Include/core_cm7.h **** struct - ARM GAS /tmp/ccEQxcUB.s page 7 + ARM GAS /tmp/ccuHnxNu.s page 7 316:Drivers/CMSIS/Include/core_cm7.h **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR 371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR 372:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 8 + ARM GAS /tmp/ccuHnxNu.s page 8 373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR @@ -478,7 +478,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * 428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U]; 429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - ARM GAS /tmp/ccEQxcUB.s page 9 + ARM GAS /tmp/ccuHnxNu.s page 9 430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U]; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U]; 485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 - ARM GAS /tmp/ccEQxcUB.s page 10 + ARM GAS /tmp/ccuHnxNu.s page 10 487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB 542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB 543:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 11 + ARM GAS /tmp/ccuHnxNu.s page 11 544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB @@ -658,7 +658,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 598:Drivers/CMSIS/Include/core_cm7.h **** 599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB 600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB - ARM GAS /tmp/ccEQxcUB.s page 12 + ARM GAS /tmp/ccuHnxNu.s page 12 601:Drivers/CMSIS/Include/core_cm7.h **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB 656:Drivers/CMSIS/Include/core_cm7.h **** 657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB - ARM GAS /tmp/ccEQxcUB.s page 13 + ARM GAS /tmp/ccuHnxNu.s page 13 658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB @@ -778,7 +778,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB 713:Drivers/CMSIS/Include/core_cm7.h **** 714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ - ARM GAS /tmp/ccEQxcUB.s page 14 + ARM GAS /tmp/ccuHnxNu.s page 14 715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB @@ -838,7 +838,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 769:Drivers/CMSIS/Include/core_cm7.h **** 770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB 771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB - ARM GAS /tmp/ccEQxcUB.s page 15 + ARM GAS /tmp/ccuHnxNu.s page 15 772:Drivers/CMSIS/Include/core_cm7.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB 827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB 828:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 16 + ARM GAS /tmp/ccuHnxNu.s page 16 829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB 884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB 885:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 17 + ARM GAS /tmp/ccuHnxNu.s page 17 886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: 941:Drivers/CMSIS/Include/core_cm7.h **** 942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: - ARM GAS /tmp/ccEQxcUB.s page 18 + ARM GAS /tmp/ccuHnxNu.s page 18 943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT 998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT 999:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 19 + ARM GAS /tmp/ccuHnxNu.s page 19 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM 1056:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 20 + ARM GAS /tmp/ccuHnxNu.s page 20 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1111:Drivers/CMSIS/Include/core_cm7.h **** */ 1112:Drivers/CMSIS/Include/core_cm7.h **** 1113:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 21 + ARM GAS /tmp/ccuHnxNu.s page 21 1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR 1170:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 22 + ARM GAS /tmp/ccuHnxNu.s page 22 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */ 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN - ARM GAS /tmp/ccEQxcUB.s page 23 + ARM GAS /tmp/ccuHnxNu.s page 23 1228:Drivers/CMSIS/Include/core_cm7.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U]; 1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ 1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - ARM GAS /tmp/ccEQxcUB.s page 24 + ARM GAS /tmp/ccuHnxNu.s page 24 1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF 1341:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 25 + ARM GAS /tmp/ccuHnxNu.s page 25 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV 1397:Drivers/CMSIS/Include/core_cm7.h **** 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV - ARM GAS /tmp/ccEQxcUB.s page 26 + ARM GAS /tmp/ccuHnxNu.s page 26 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU 1454:Drivers/CMSIS/Include/core_cm7.h **** 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */ - ARM GAS /tmp/ccEQxcUB.s page 27 + ARM GAS /tmp/ccuHnxNu.s page 27 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */ 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ 1512:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 28 + ARM GAS /tmp/ccuHnxNu.s page 28 1513:Drivers/CMSIS/Include/core_cm7.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */ 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS - ARM GAS /tmp/ccEQxcUB.s page 29 + ARM GAS /tmp/ccuHnxNu.s page 29 1570:Drivers/CMSIS/Include/core_cm7.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register 1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) 1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers - ARM GAS /tmp/ccEQxcUB.s page 30 + ARM GAS /tmp/ccuHnxNu.s page 30 1627:Drivers/CMSIS/Include/core_cm7.h **** @{ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1681:Drivers/CMSIS/Include/core_cm7.h **** 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core - ARM GAS /tmp/ccEQxcUB.s page 31 + ARM GAS /tmp/ccuHnxNu.s page 31 1684:Drivers/CMSIS/Include/core_cm7.h **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. 1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value. 1740:Drivers/CMSIS/Include/core_cm7.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 32 + ARM GAS /tmp/ccuHnxNu.s page 32 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions 1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions 1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions - ARM GAS /tmp/ccEQxcUB.s page 33 + ARM GAS /tmp/ccuHnxNu.s page 33 1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu 1854:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccEQxcUB.s page 34 + ARM GAS /tmp/ccuHnxNu.s page 34 1855:Drivers/CMSIS/Include/core_cm7.h **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled. 1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled. 1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccEQxcUB.s page 35 + ARM GAS /tmp/ccuHnxNu.s page 35 1912:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1966:Drivers/CMSIS/Include/core_cm7.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. 1967:Drivers/CMSIS/Include/core_cm7.h **** \param [in] IRQn Device specific interrupt number. 1968:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccEQxcUB.s page 36 + ARM GAS /tmp/ccuHnxNu.s page 36 1969:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2023:Drivers/CMSIS/Include/core_cm7.h **** */ 2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) 2025:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccEQxcUB.s page 37 + ARM GAS /tmp/ccuHnxNu.s page 37 2026:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 36 .cfi_def_cfa_offset 4 37 .cfi_offset 14, -4 2073:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used - ARM GAS /tmp/ccEQxcUB.s page 38 + ARM GAS /tmp/ccuHnxNu.s page 38 38 .loc 2 2073 3 is_stmt 1 view .LVU2 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2078:Drivers/CMSIS/Include/core_cm7.h **** 81 .loc 2 2078 109 discriminator 2 view .LVU19 82 003a 0023 movs r3, #0 - ARM GAS /tmp/ccEQxcUB.s page 39 + ARM GAS /tmp/ccuHnxNu.s page 39 83 003c EEE7 b .L2 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 45:Src/main.c **** #define AD9102_REG_PAT_TIMEBASE 0x0028u 46:Src/main.c **** #define AD9102_REG_PAT_PERIOD 0x0029u 47:Src/main.c **** #define AD9102_REG_DAC_PAT 0x002Bu - ARM GAS /tmp/ccEQxcUB.s page 40 + ARM GAS /tmp/ccuHnxNu.s page 40 48:Src/main.c **** #define AD9102_REG_SAW_CONFIG 0x0037u @@ -2398,1246 +2398,1269 @@ ARM GAS /tmp/ccEQxcUB.s page 1 102:Src/main.c **** #define AD9833_FLAG_TRIANGLE 0x0002u 103:Src/main.c **** #define DS1809_FLAG_UC 0x0001u 104:Src/main.c **** #define DS1809_FLAG_DC 0x0002u - ARM GAS /tmp/ccEQxcUB.s page 41 + ARM GAS /tmp/ccuHnxNu.s page 41 105:Src/main.c **** #define DS1809_PULSE_MS_DEFAULT 2u - 106:Src/main.c **** /* USER CODE END PD */ - 107:Src/main.c **** - 108:Src/main.c **** /* Private macro -------------------------------------------------------------*/ - 109:Src/main.c **** /* USER CODE BEGIN PM */ - 110:Src/main.c **** - 111:Src/main.c **** /* USER CODE END PM */ + 106:Src/main.c **** #define STM32_DAC_FLAG_ENABLE 0x0001u + 107:Src/main.c **** #define STM32_DAC_CODE_MAX 4095u + 108:Src/main.c **** /* USER CODE END PD */ + 109:Src/main.c **** + 110:Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 111:Src/main.c **** /* USER CODE BEGIN PM */ 112:Src/main.c **** - 113:Src/main.c **** /* Private variables ---------------------------------------------------------*/ - 114:Src/main.c **** ADC_HandleTypeDef hadc1; - 115:Src/main.c **** ADC_HandleTypeDef hadc3; - 116:Src/main.c **** - 117:Src/main.c **** SD_HandleTypeDef hsd1; + 113:Src/main.c **** /* USER CODE END PM */ + 114:Src/main.c **** + 115:Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 116:Src/main.c **** ADC_HandleTypeDef hadc1; + 117:Src/main.c **** ADC_HandleTypeDef hadc3; 118:Src/main.c **** - 119:Src/main.c **** TIM_HandleTypeDef htim4; - 120:Src/main.c **** TIM_HandleTypeDef htim8; - 121:Src/main.c **** TIM_HandleTypeDef htim1; - 122:Src/main.c **** TIM_HandleTypeDef htim10; - 123:Src/main.c **** TIM_HandleTypeDef htim11; - 124:Src/main.c **** - 125:Src/main.c **** UART_HandleTypeDef huart8; + 119:Src/main.c **** SD_HandleTypeDef hsd1; + 120:Src/main.c **** + 121:Src/main.c **** TIM_HandleTypeDef htim4; + 122:Src/main.c **** TIM_HandleTypeDef htim8; + 123:Src/main.c **** TIM_HandleTypeDef htim1; + 124:Src/main.c **** TIM_HandleTypeDef htim10; + 125:Src/main.c **** TIM_HandleTypeDef htim11; 126:Src/main.c **** - 127:Src/main.c **** /* USER CODE BEGIN PV */ - 128:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, - 129:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ - 130:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat - 131:Src/main.c **** FRESULT fresult; // result - 132:Src/main.c **** int test; - 133:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ - 134:Src/main.c **** - 135:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; - 136:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; - 137:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; - 138:Src/main.c **** - 139:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; + 127:Src/main.c **** UART_HandleTypeDef huart8; + 128:Src/main.c **** + 129:Src/main.c **** /* USER CODE BEGIN PV */ + 130:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, + 131:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ + 132:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat + 133:Src/main.c **** FRESULT fresult; // result + 134:Src/main.c **** int test; + 135:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ + 136:Src/main.c **** + 137:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; + 138:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; + 139:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; 140:Src/main.c **** - 141:Src/main.c **** task_t task; + 141:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; 142:Src/main.c **** - 143:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { - 144:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, - 145:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, - 146:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, - 147:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, - 148:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, - 149:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, - 150:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, - 151:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, - 152:Src/main.c **** 0x001eu, 0x001du - 153:Src/main.c **** }; - 154:Src/main.c **** - 155:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { - 156:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, - 157:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, - 158:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, - 159:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 160:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, - 161:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - ARM GAS /tmp/ccEQxcUB.s page 42 + 143:Src/main.c **** task_t task; + 144:Src/main.c **** + 145:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { + 146:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, + 147:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, + 148:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, + 149:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, + 150:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, + 151:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, + 152:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, + 153:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, + 154:Src/main.c **** 0x001eu, 0x001du + 155:Src/main.c **** }; + 156:Src/main.c **** + 157:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { + 158:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 159:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 160:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, + 161:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + ARM GAS /tmp/ccuHnxNu.s page 42 - 162:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 163:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, - 164:Src/main.c **** 0x0001u, 0x0001u - 165:Src/main.c **** }; - 166:Src/main.c **** - 167:Src/main.c **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = { - 168:Src/main.c **** 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, - 169:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, - 170:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u, - 171:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 172:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u, - 173:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 174:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 175:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u, - 176:Src/main.c **** 0x0001u, 0x0001u - 177:Src/main.c **** }; - 178:Src/main.c **** - 179:Src/main.c **** + 162:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, + 163:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 164:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 165:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, + 166:Src/main.c **** 0x0001u, 0x0001u + 167:Src/main.c **** }; + 168:Src/main.c **** + 169:Src/main.c **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = { + 170:Src/main.c **** 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 171:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 172:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u, + 173:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 174:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u, + 175:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 176:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 177:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u, + 178:Src/main.c **** 0x0001u, 0x0001u + 179:Src/main.c **** }; 180:Src/main.c **** 181:Src/main.c **** - 182:Src/main.c **** /* USER CODE END PV */ + 182:Src/main.c **** 183:Src/main.c **** - 184:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ - 185:Src/main.c **** void SystemClock_Config(void); - 186:Src/main.c **** static void MX_GPIO_Init(void); - 187:Src/main.c **** static void MX_DMA_Init(void); - 188:Src/main.c **** static void MX_SPI4_Init(void); - 189:Src/main.c **** static void MX_TIM2_Init(void); - 190:Src/main.c **** static void MX_TIM5_Init(void); - 191:Src/main.c **** static void MX_ADC1_Init(void); - 192:Src/main.c **** static void MX_ADC3_Init(void); - 193:Src/main.c **** static void MX_SPI2_Init(void); - 194:Src/main.c **** static void MX_SPI5_Init(void); - 195:Src/main.c **** static void MX_SPI6_Init(void); - 196:Src/main.c **** static void MX_USART1_UART_Init(void); - 197:Src/main.c **** static void MX_SDMMC1_SD_Init(void); - 198:Src/main.c **** static void MX_TIM7_Init(void); - 199:Src/main.c **** static void MX_TIM6_Init(void); - 200:Src/main.c **** static void MX_TIM10_Init(void); - 201:Src/main.c **** static void MX_UART8_Init(void); - 202:Src/main.c **** static void MX_TIM8_Init(void); - 203:Src/main.c **** static void MX_TIM11_Init(void); - 204:Src/main.c **** static void MX_TIM4_Init(void); - 205:Src/main.c **** static void MX_TIM1_Init(void); - 206:Src/main.c **** /* USER CODE BEGIN PFP */ - 207:Src/main.c **** static void Init_params(void); - 208:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 209:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 210:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); - 211:Src/main.c **** static uint16_t MPhD_T(uint8_t num); - 212:Src/main.c **** static uint16_t Get_ADC(uint8_t num); - 213:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul - 214:Src/main.c **** static void AD9102_Init(void); - 215:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value); - 216:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr); - 217:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); - 218:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, - ARM GAS /tmp/ccEQxcUB.s page 43 + 184:Src/main.c **** /* USER CODE END PV */ + 185:Src/main.c **** + 186:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 187:Src/main.c **** void SystemClock_Config(void); + 188:Src/main.c **** static void MX_GPIO_Init(void); + 189:Src/main.c **** static void MX_DMA_Init(void); + 190:Src/main.c **** static void MX_SPI4_Init(void); + 191:Src/main.c **** static void MX_TIM2_Init(void); + 192:Src/main.c **** static void MX_TIM5_Init(void); + 193:Src/main.c **** static void MX_ADC1_Init(void); + 194:Src/main.c **** static void MX_ADC3_Init(void); + 195:Src/main.c **** static void MX_SPI2_Init(void); + 196:Src/main.c **** static void MX_SPI5_Init(void); + 197:Src/main.c **** static void MX_SPI6_Init(void); + 198:Src/main.c **** static void MX_USART1_UART_Init(void); + 199:Src/main.c **** static void MX_SDMMC1_SD_Init(void); + 200:Src/main.c **** static void MX_TIM7_Init(void); + 201:Src/main.c **** static void MX_TIM6_Init(void); + 202:Src/main.c **** static void MX_TIM10_Init(void); + 203:Src/main.c **** static void MX_UART8_Init(void); + 204:Src/main.c **** static void MX_TIM8_Init(void); + 205:Src/main.c **** static void MX_TIM11_Init(void); + 206:Src/main.c **** static void MX_TIM4_Init(void); + 207:Src/main.c **** static void MX_TIM1_Init(void); + 208:Src/main.c **** /* USER CODE BEGIN PFP */ + 209:Src/main.c **** static void Init_params(void); + 210:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 211:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 212:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); + 213:Src/main.c **** static uint16_t MPhD_T(uint8_t num); + 214:Src/main.c **** static uint16_t Get_ADC(uint8_t num); + 215:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul + 216:Src/main.c **** static void AD9102_Init(void); + 217:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value); + 218:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr); + ARM GAS /tmp/ccuHnxNu.s page 43 - 219:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, - 220:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude); - 221:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t - 222:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin - 223:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase); - 224:Src/main.c **** static void AD9833_WriteWord(uint16_t word); - 225:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word); - 226:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms); - 227:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); - 228:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); - 229:Src/main.c **** //int SD_Init(void); - 230:Src/main.c **** int SD_SAVE(uint16_t *pbuff); - 231:Src/main.c **** //uint32_t Get_Length(void); - 232:Src/main.c **** int SD_READ(uint16_t *pbuff); - 233:Src/main.c **** int SD_REMOVE(void); - 234:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); - 235:Src/main.c **** void USART_TX_DMA (uint16_t sz); - 236:Src/main.c **** static void Stop_TIM10(); - 237:Src/main.c **** static void OUT_trigger(uint8_t); - 238:Src/main.c **** /* USER CODE END PFP */ - 239:Src/main.c **** - 240:Src/main.c **** /* Private user code ---------------------------------------------------------*/ - 241:Src/main.c **** /* USER CODE BEGIN 0 */ - 242:Src/main.c **** - 243:Src/main.c **** /* USER CODE END 0 */ - 244:Src/main.c **** - 245:Src/main.c **** /** - 246:Src/main.c **** * @brief The application entry point. - 247:Src/main.c **** * @retval int - 248:Src/main.c **** */ - 249:Src/main.c **** int main(void) - 250:Src/main.c **** { - 251:Src/main.c **** - 252:Src/main.c **** /* USER CODE BEGIN 1 */ - 253:Src/main.c **** HAL_StatusTypeDef st; - 254:Src/main.c **** /* USER CODE END 1 */ + 219:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); + 220:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, + 221:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, + 222:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude); + 223:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t + 224:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin + 225:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase); + 226:Src/main.c **** static void AD9833_WriteWord(uint16_t word); + 227:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word); + 228:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms); + 229:Src/main.c **** static void PA4_DAC_Init(void); + 230:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable); + 231:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); + 232:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); + 233:Src/main.c **** //int SD_Init(void); + 234:Src/main.c **** int SD_SAVE(uint16_t *pbuff); + 235:Src/main.c **** //uint32_t Get_Length(void); + 236:Src/main.c **** int SD_READ(uint16_t *pbuff); + 237:Src/main.c **** int SD_REMOVE(void); + 238:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); + 239:Src/main.c **** void USART_TX_DMA (uint16_t sz); + 240:Src/main.c **** static void Stop_TIM10(); + 241:Src/main.c **** static void OUT_trigger(uint8_t); + 242:Src/main.c **** /* USER CODE END PFP */ + 243:Src/main.c **** + 244:Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 245:Src/main.c **** /* USER CODE BEGIN 0 */ + 246:Src/main.c **** + 247:Src/main.c **** /* USER CODE END 0 */ + 248:Src/main.c **** + 249:Src/main.c **** /** + 250:Src/main.c **** * @brief The application entry point. + 251:Src/main.c **** * @retval int + 252:Src/main.c **** */ + 253:Src/main.c **** int main(void) + 254:Src/main.c **** { 255:Src/main.c **** - 256:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ - 257:Src/main.c **** - 258:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - 259:Src/main.c **** HAL_Init(); - 260:Src/main.c **** - 261:Src/main.c **** /* USER CODE BEGIN Init */ - 262:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ - 263:Src/main.c **** /* USER CODE END Init */ + 256:Src/main.c **** /* USER CODE BEGIN 1 */ + 257:Src/main.c **** HAL_StatusTypeDef st; + 258:Src/main.c **** /* USER CODE END 1 */ + 259:Src/main.c **** + 260:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 261:Src/main.c **** + 262:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 263:Src/main.c **** HAL_Init(); 264:Src/main.c **** - 265:Src/main.c **** /* Configure the system clock */ - 266:Src/main.c **** SystemClock_Config(); - 267:Src/main.c **** - 268:Src/main.c **** /* USER CODE BEGIN SysInit */ - 269:Src/main.c **** - 270:Src/main.c **** /* USER CODE END SysInit */ + 265:Src/main.c **** /* USER CODE BEGIN Init */ + 266:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ + 267:Src/main.c **** /* USER CODE END Init */ + 268:Src/main.c **** + 269:Src/main.c **** /* Configure the system clock */ + 270:Src/main.c **** SystemClock_Config(); 271:Src/main.c **** - 272:Src/main.c **** /* Initialize all configured peripherals */ - 273:Src/main.c **** MX_GPIO_Init(); - 274:Src/main.c **** MX_DMA_Init(); - 275:Src/main.c **** MX_SPI4_Init(); - ARM GAS /tmp/ccEQxcUB.s page 44 + 272:Src/main.c **** /* USER CODE BEGIN SysInit */ + 273:Src/main.c **** + 274:Src/main.c **** /* USER CODE END SysInit */ + 275:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 44 - 276:Src/main.c **** MX_FATFS_Init(); - 277:Src/main.c **** MX_TIM2_Init(); - 278:Src/main.c **** MX_TIM5_Init(); - 279:Src/main.c **** MX_ADC1_Init(); - 280:Src/main.c **** MX_ADC3_Init(); - 281:Src/main.c **** MX_SPI2_Init(); - 282:Src/main.c **** MX_SPI5_Init(); - 283:Src/main.c **** MX_SPI6_Init(); - 284:Src/main.c **** MX_USART1_UART_Init(); - 285:Src/main.c **** MX_SDMMC1_SD_Init(); - 286:Src/main.c **** MX_TIM7_Init(); - 287:Src/main.c **** MX_TIM6_Init(); - 288:Src/main.c **** MX_TIM10_Init(); - 289:Src/main.c **** MX_UART8_Init(); - 290:Src/main.c **** MX_TIM8_Init(); - 291:Src/main.c **** MX_TIM11_Init(); - 292:Src/main.c **** MX_TIM4_Init(); - 293:Src/main.c **** MX_TIM1_Init(); - 294:Src/main.c **** /* USER CODE BEGIN 2 */ - 295:Src/main.c **** Init_params(); - 296:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 297:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 298:Src/main.c **** - 299:Src/main.c **** - 300:Src/main.c **** //TIM4,11 clocks = 92 MHz - 301:Src/main.c **** - 302:Src/main.c **** //ADC clock - 303:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 304:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 305:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 306:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre - 307:Src/main.c **** - 308:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 309:Src/main.c **** - 310:Src/main.c **** - 311:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) + 276:Src/main.c **** /* Initialize all configured peripherals */ + 277:Src/main.c **** MX_GPIO_Init(); + 278:Src/main.c **** MX_DMA_Init(); + 279:Src/main.c **** MX_SPI4_Init(); + 280:Src/main.c **** MX_FATFS_Init(); + 281:Src/main.c **** MX_TIM2_Init(); + 282:Src/main.c **** MX_TIM5_Init(); + 283:Src/main.c **** MX_ADC1_Init(); + 284:Src/main.c **** MX_ADC3_Init(); + 285:Src/main.c **** MX_SPI2_Init(); + 286:Src/main.c **** MX_SPI5_Init(); + 287:Src/main.c **** MX_SPI6_Init(); + 288:Src/main.c **** MX_USART1_UART_Init(); + 289:Src/main.c **** MX_SDMMC1_SD_Init(); + 290:Src/main.c **** MX_TIM7_Init(); + 291:Src/main.c **** MX_TIM6_Init(); + 292:Src/main.c **** MX_TIM10_Init(); + 293:Src/main.c **** MX_UART8_Init(); + 294:Src/main.c **** MX_TIM8_Init(); + 295:Src/main.c **** MX_TIM11_Init(); + 296:Src/main.c **** MX_TIM4_Init(); + 297:Src/main.c **** MX_TIM1_Init(); + 298:Src/main.c **** PA4_DAC_Init(); + 299:Src/main.c **** /* USER CODE BEGIN 2 */ + 300:Src/main.c **** Init_params(); + 301:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 302:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 303:Src/main.c **** + 304:Src/main.c **** + 305:Src/main.c **** //TIM4,11 clocks = 92 MHz + 306:Src/main.c **** + 307:Src/main.c **** //ADC clock + 308:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 309:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 310:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 311:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre 312:Src/main.c **** - 313:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; - 314:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 313:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 314:Src/main.c **** 315:Src/main.c **** - 316:Src/main.c **** // AD9833 MCLK output on PE9 (TIM1_CH1) - 317:Src/main.c **** // TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output - 318:Src/main.c **** HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); - 319:Src/main.c **** - 320:Src/main.c **** /* - 321:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ - 322:Src/main.c **** - 323:Src/main.c **** CPU_state = DECODE_ENABLE; - 324:Src/main.c **** } - 325:Src/main.c **** */ - 326:Src/main.c **** /* USER CODE END 2 */ + 316:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) + 317:Src/main.c **** + 318:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; + 319:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 320:Src/main.c **** + 321:Src/main.c **** // AD9833 MCLK output on PE9 (TIM1_CH1) + 322:Src/main.c **** // TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output + 323:Src/main.c **** HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); + 324:Src/main.c **** + 325:Src/main.c **** /* + 326:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ 327:Src/main.c **** - 328:Src/main.c **** /* Infinite loop */ - 329:Src/main.c **** /* USER CODE BEGIN WHILE */ - 330:Src/main.c **** while (1) - 331:Src/main.c **** { - 332:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) - ARM GAS /tmp/ccEQxcUB.s page 45 + 328:Src/main.c **** CPU_state = DECODE_ENABLE; + 329:Src/main.c **** } + 330:Src/main.c **** */ + 331:Src/main.c **** /* USER CODE END 2 */ + 332:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 45 - 333:Src/main.c **** { - 334:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); - 335:Src/main.c **** LL_USART_EnableIT_PE(USART1); - 336:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); - 337:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); - 338:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); - 339:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 340:Src/main.c **** u_rx_flg = 1; - 341:Src/main.c **** } - 342:Src/main.c **** // else - 343:Src/main.c **** // { - 344:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); - 345:Src/main.c **** // u_rx_flg = 0; - 346:Src/main.c **** // } - 347:Src/main.c **** switch (CPU_state) - 348:Src/main.c **** { - 349:Src/main.c **** case HALT://0 - Default state - 350:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 351:Src/main.c **** task.current_param = task.min_param; - 352:Src/main.c **** Stop_TIM10(); - 353:Src/main.c **** break; - 354:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 355:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); - 356:Src/main.c **** if (CheckChecksum(COMMAND)) - 357:Src/main.c **** { - 358:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 - 359:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 360:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 361:Src/main.c **** TO6_before = TO6; - 362:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 363:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; - 364:Src/main.c **** CPU_state = WORK_ENABLE; - 365:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 366:Src/main.c **** } - 367:Src/main.c **** else - 368:Src/main.c **** { - 369:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 370:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 371:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 372:Src/main.c **** } - 373:Src/main.c **** UART_transmission_request = MESS_01; - 374:Src/main.c **** break; - 375:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 376:Src/main.c **** //Set current setup to default - 377:Src/main.c **** task.current_param = task.min_param; - 378:Src/main.c **** Stop_TIM10(); - 379:Src/main.c **** Init_params(); - 380:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 381:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 382:Src/main.c **** CPU_state = HALT; - 383:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 384:Src/main.c **** UART_transmission_request = MESS_01; - 385:Src/main.c **** break; - 386:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 387:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); - 388:Src/main.c **** State_Data[0]|=temp16&0xff; - 389:Src/main.c **** if (temp16==0) - ARM GAS /tmp/ccEQxcUB.s page 46 + 333:Src/main.c **** /* Infinite loop */ + 334:Src/main.c **** /* USER CODE BEGIN WHILE */ + 335:Src/main.c **** while (1) + 336:Src/main.c **** { + 337:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) + 338:Src/main.c **** { + 339:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); + 340:Src/main.c **** LL_USART_EnableIT_PE(USART1); + 341:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); + 342:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); + 343:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); + 344:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 345:Src/main.c **** u_rx_flg = 1; + 346:Src/main.c **** } + 347:Src/main.c **** // else + 348:Src/main.c **** // { + 349:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); + 350:Src/main.c **** // u_rx_flg = 0; + 351:Src/main.c **** // } + 352:Src/main.c **** switch (CPU_state) + 353:Src/main.c **** { + 354:Src/main.c **** case HALT://0 - Default state + 355:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 356:Src/main.c **** task.current_param = task.min_param; + 357:Src/main.c **** Stop_TIM10(); + 358:Src/main.c **** break; + 359:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 360:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); + 361:Src/main.c **** if (CheckChecksum(COMMAND)) + 362:Src/main.c **** { + 363:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 + 364:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 365:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 366:Src/main.c **** TO6_before = TO6; + 367:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 368:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; + 369:Src/main.c **** CPU_state = WORK_ENABLE; + 370:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 371:Src/main.c **** } + 372:Src/main.c **** else + 373:Src/main.c **** { + 374:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 375:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 376:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 377:Src/main.c **** } + 378:Src/main.c **** UART_transmission_request = MESS_01; + 379:Src/main.c **** break; + 380:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 381:Src/main.c **** //Set current setup to default + 382:Src/main.c **** task.current_param = task.min_param; + 383:Src/main.c **** Stop_TIM10(); + 384:Src/main.c **** Init_params(); + 385:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 386:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 387:Src/main.c **** CPU_state = HALT; + 388:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 389:Src/main.c **** UART_transmission_request = MESS_01; + ARM GAS /tmp/ccuHnxNu.s page 46 - 390:Src/main.c **** { - 391:Src/main.c **** UART_transmission_request = MESS_03; - 392:Src/main.c **** } - 393:Src/main.c **** else - 394:Src/main.c **** { - 395:Src/main.c **** UART_transmission_request = MESS_01; - 396:Src/main.c **** } - 397:Src/main.c **** CPU_state_old = HALT; - 398:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 399:Src/main.c **** break; - 400:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 401:Src/main.c **** UART_transmission_request = MESS_02; - 402:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 403:Src/main.c **** break; - 404:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 405:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; - 406:Src/main.c **** UART_transmission_request = MESS_01; - 407:Src/main.c **** CPU_state = CPU_state_old; + 390:Src/main.c **** break; + 391:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 392:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); + 393:Src/main.c **** State_Data[0]|=temp16&0xff; + 394:Src/main.c **** if (temp16==0) + 395:Src/main.c **** { + 396:Src/main.c **** UART_transmission_request = MESS_03; + 397:Src/main.c **** } + 398:Src/main.c **** else + 399:Src/main.c **** { + 400:Src/main.c **** UART_transmission_request = MESS_01; + 401:Src/main.c **** } + 402:Src/main.c **** CPU_state_old = HALT; + 403:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 404:Src/main.c **** break; + 405:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 406:Src/main.c **** UART_transmission_request = MESS_02; + 407:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle 408:Src/main.c **** break; - 409:Src/main.c **** case STATE://6 - Transmith state message - 410:Src/main.c **** UART_transmission_request = MESS_01; - 411:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 412:Src/main.c **** break; - 413:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 414:Src/main.c **** task.current_param = task.min_param; - 415:Src/main.c **** Stop_TIM10(); - 416:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 417:Src/main.c **** { - 418:Src/main.c **** TO7_before = TO7; - 419:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 420:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 421:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 422:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 423:Src/main.c **** - 424:Src/main.c **** //Correct temperature in all pulses - 425:Src/main.c **** (void) MPhD_T(3); - 426:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 427:Src/main.c **** (void) MPhD_T(4); - 428:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 429:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 430:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 431:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 432:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 433:Src/main.c **** - 434:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 435:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 436:Src/main.c **** - 437:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 - 438:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 439:Src/main.c **** - 440:Src/main.c **** //Prepare DATA of internals ADCs - 441:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 442:Src/main.c **** temp16 = Get_ADC(0); - 443:Src/main.c **** temp16 = Get_ADC(1); - 444:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 445:Src/main.c **** + 409:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 410:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; + 411:Src/main.c **** UART_transmission_request = MESS_01; + 412:Src/main.c **** CPU_state = CPU_state_old; + 413:Src/main.c **** break; + 414:Src/main.c **** case STATE://6 - Transmith state message + 415:Src/main.c **** UART_transmission_request = MESS_01; + 416:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 417:Src/main.c **** break; + 418:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 419:Src/main.c **** task.current_param = task.min_param; + 420:Src/main.c **** Stop_TIM10(); + 421:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 422:Src/main.c **** { + 423:Src/main.c **** TO7_before = TO7; + 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 425:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 427:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 428:Src/main.c **** + 429:Src/main.c **** //Correct temperature in all pulses + 430:Src/main.c **** (void) MPhD_T(3); + 431:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 432:Src/main.c **** (void) MPhD_T(4); + 433:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 434:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 435:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 436:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 437:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 438:Src/main.c **** + 439:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 440:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 441:Src/main.c **** + 442:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 + 443:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 444:Src/main.c **** + 445:Src/main.c **** //Prepare DATA of internals ADCs 446:Src/main.c **** //Put the temperature of LD2 to Long_Data: - ARM GAS /tmp/ccEQxcUB.s page 47 + ARM GAS /tmp/ccuHnxNu.s page 47 - 447:Src/main.c **** temp16 = Get_ADC(1); - 448:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 449:Src/main.c **** - 450:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 451:Src/main.c **** temp16 = Get_ADC(1); - 452:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 453:Src/main.c **** - 454:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 455:Src/main.c **** temp16 = Get_ADC(1); - 456:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 457:Src/main.c **** - 458:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 459:Src/main.c **** temp16 = Get_ADC(1); - 460:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 461:Src/main.c **** temp16 = Get_ADC(2); + 447:Src/main.c **** temp16 = Get_ADC(0); + 448:Src/main.c **** temp16 = Get_ADC(1); + 449:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 450:Src/main.c **** + 451:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 452:Src/main.c **** temp16 = Get_ADC(1); + 453:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 454:Src/main.c **** + 455:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 456:Src/main.c **** temp16 = Get_ADC(1); + 457:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 458:Src/main.c **** + 459:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 460:Src/main.c **** temp16 = Get_ADC(1); + 461:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor 462:Src/main.c **** 463:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 464:Src/main.c **** temp16 = Get_ADC(3); - 465:Src/main.c **** temp16 = Get_ADC(4); - 466:Src/main.c **** Long_Data[12] = temp16; - 467:Src/main.c **** temp16 = Get_ADC(5); - 468:Src/main.c **** - 469:Src/main.c **** //Put the timer tick to Long_Data: - 470:Src/main.c **** TO6_stop = TO6; - 471:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 472:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 473:Src/main.c **** - 474:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 475:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 476:Src/main.c **** - 477:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 478:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 479:Src/main.c **** - 480:Src/main.c **** if (Curr_setup.SD_EN==1) - 481:Src/main.c **** { - 482:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 483:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 484:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 485:Src/main.c **** State_Data[0]|=temp16&0xff; - 486:Src/main.c **** } - 487:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 488:Src/main.c **** } - 489:Src/main.c **** break; - 490:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output - 491:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) - 492:Src/main.c **** { - 493:Src/main.c **** uint16_t flags = COMMAND[0]; - 494:Src/main.c **** uint16_t param0 = COMMAND[1]; - 495:Src/main.c **** uint16_t param1 = COMMAND[2]; - 496:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 497:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 498:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; - 499:Src/main.c **** - 500:Src/main.c **** if (sram_mode) - 501:Src/main.c **** { - 502:Src/main.c **** uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u; - 503:Src/main.c **** uint16_t samples; - ARM GAS /tmp/ccEQxcUB.s page 48 + 464:Src/main.c **** temp16 = Get_ADC(1); + 465:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 466:Src/main.c **** temp16 = Get_ADC(2); + 467:Src/main.c **** + 468:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 469:Src/main.c **** temp16 = Get_ADC(3); + 470:Src/main.c **** temp16 = Get_ADC(4); + 471:Src/main.c **** Long_Data[12] = temp16; + 472:Src/main.c **** temp16 = Get_ADC(5); + 473:Src/main.c **** + 474:Src/main.c **** //Put the timer tick to Long_Data: + 475:Src/main.c **** TO6_stop = TO6; + 476:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 477:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 478:Src/main.c **** + 479:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 480:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 481:Src/main.c **** + 482:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 483:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 484:Src/main.c **** + 485:Src/main.c **** if (Curr_setup.SD_EN==1) + 486:Src/main.c **** { + 487:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 488:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 489:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 490:Src/main.c **** State_Data[0]|=temp16&0xff; + 491:Src/main.c **** } + 492:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 493:Src/main.c **** } + 494:Src/main.c **** break; + 495:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output + 496:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) + 497:Src/main.c **** { + 498:Src/main.c **** uint16_t flags = COMMAND[0]; + 499:Src/main.c **** uint16_t param0 = COMMAND[1]; + 500:Src/main.c **** uint16_t param1 = COMMAND[2]; + 501:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 502:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 503:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + ARM GAS /tmp/ccuHnxNu.s page 48 - 504:Src/main.c **** uint8_t hold; - 505:Src/main.c **** uint16_t amplitude; - 506:Src/main.c **** - 507:Src/main.c **** if (sram_fmt) - 508:Src/main.c **** { - 509:Src/main.c **** amplitude = param0; - 510:Src/main.c **** samples = param1; - 511:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; - 512:Src/main.c **** } - 513:Src/main.c **** else - 514:Src/main.c **** { - 515:Src/main.c **** samples = param0; - 516:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); - 517:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; - 518:Src/main.c **** } - 519:Src/main.c **** - 520:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude); - 521:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 522:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) - 523:Src/main.c **** { - 524:Src/main.c **** State_Data[0] |= AD9102_ERR; - 525:Src/main.c **** } - 526:Src/main.c **** } - 527:Src/main.c **** else - 528:Src/main.c **** { - 529:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; - 530:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 531:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 532:Src/main.c **** uint16_t pat_period = param1; - 533:Src/main.c **** - 534:Src/main.c **** if (param0 == 0u && param1 == 0u) - 535:Src/main.c **** { - 536:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; - 537:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; - 538:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 539:Src/main.c **** } - 540:Src/main.c **** else - 541:Src/main.c **** { - 542:Src/main.c **** if (saw_step == 0u) - 543:Src/main.c **** { - 544:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; - 545:Src/main.c **** } - 546:Src/main.c **** else if (saw_step > 63u) - 547:Src/main.c **** { - 548:Src/main.c **** saw_step = 63u; - 549:Src/main.c **** } - 550:Src/main.c **** if (pat_period == 0u) - 551:Src/main.c **** { - 552:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 553:Src/main.c **** } - 554:Src/main.c **** } - 555:Src/main.c **** - 556:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); - 557:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 558:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 559:Src/main.c **** { - 560:Src/main.c **** State_Data[0] |= AD9102_ERR; - ARM GAS /tmp/ccEQxcUB.s page 49 + 504:Src/main.c **** + 505:Src/main.c **** if (sram_mode) + 506:Src/main.c **** { + 507:Src/main.c **** uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u; + 508:Src/main.c **** uint16_t samples; + 509:Src/main.c **** uint8_t hold; + 510:Src/main.c **** uint16_t amplitude; + 511:Src/main.c **** + 512:Src/main.c **** if (sram_fmt) + 513:Src/main.c **** { + 514:Src/main.c **** amplitude = param0; + 515:Src/main.c **** samples = param1; + 516:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; + 517:Src/main.c **** } + 518:Src/main.c **** else + 519:Src/main.c **** { + 520:Src/main.c **** samples = param0; + 521:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); + 522:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; + 523:Src/main.c **** } + 524:Src/main.c **** + 525:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude); + 526:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 527:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 528:Src/main.c **** { + 529:Src/main.c **** State_Data[0] |= AD9102_ERR; + 530:Src/main.c **** } + 531:Src/main.c **** } + 532:Src/main.c **** else + 533:Src/main.c **** { + 534:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + 535:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 536:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 537:Src/main.c **** uint16_t pat_period = param1; + 538:Src/main.c **** + 539:Src/main.c **** if (param0 == 0u && param1 == 0u) + 540:Src/main.c **** { + 541:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 542:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 543:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 544:Src/main.c **** } + 545:Src/main.c **** else + 546:Src/main.c **** { + 547:Src/main.c **** if (saw_step == 0u) + 548:Src/main.c **** { + 549:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 550:Src/main.c **** } + 551:Src/main.c **** else if (saw_step > 63u) + 552:Src/main.c **** { + 553:Src/main.c **** saw_step = 63u; + 554:Src/main.c **** } + 555:Src/main.c **** if (pat_period == 0u) + 556:Src/main.c **** { + 557:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 558:Src/main.c **** } + 559:Src/main.c **** } + 560:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 49 - 561:Src/main.c **** } - 562:Src/main.c **** } - 563:Src/main.c **** } - 564:Src/main.c **** else - 565:Src/main.c **** { - 566:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 567:Src/main.c **** } - 568:Src/main.c **** UART_transmission_request = MESS_01; - 569:Src/main.c **** CPU_state = CPU_state_old; - 570:Src/main.c **** break; - 571:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output - 572:Src/main.c **** State_Data[1] = 0u; - 573:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) - 574:Src/main.c **** { - 575:Src/main.c **** uint16_t flags = COMMAND[0]; - 576:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); - 577:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 578:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 579:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; - 580:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; - 581:Src/main.c **** - 582:Src/main.c **** AD9833_Apply(enable, triangle, freq_word); - 583:Src/main.c **** } - 584:Src/main.c **** else - 585:Src/main.c **** { - 586:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 587:Src/main.c **** } - 588:Src/main.c **** UART_transmission_request = MESS_01; - 589:Src/main.c **** CPU_state = CPU_state_old; - 590:Src/main.c **** break; - 591:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls - 592:Src/main.c **** if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1]) - 593:Src/main.c **** { - 594:Src/main.c **** uint16_t flags = COMMAND[0]; - 595:Src/main.c **** uint16_t count = COMMAND[1]; - 596:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; - 597:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; - 598:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; - 599:Src/main.c **** - 600:Src/main.c **** if (uc && dc) - 601:Src/main.c **** { - 602:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 603:Src/main.c **** } - 604:Src/main.c **** else - 605:Src/main.c **** { - 606:Src/main.c **** if (count == 0u) - 607:Src/main.c **** { - 608:Src/main.c **** count = 1u; - 609:Src/main.c **** } - 610:Src/main.c **** if (count > 64u) - 611:Src/main.c **** { - 612:Src/main.c **** count = 64u; - 613:Src/main.c **** } - 614:Src/main.c **** if (pulse_ms == 0u) - 615:Src/main.c **** { - 616:Src/main.c **** pulse_ms = DS1809_PULSE_MS_DEFAULT; - 617:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 50 + 561:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); + 562:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 563:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 564:Src/main.c **** { + 565:Src/main.c **** State_Data[0] |= AD9102_ERR; + 566:Src/main.c **** } + 567:Src/main.c **** } + 568:Src/main.c **** } + 569:Src/main.c **** else + 570:Src/main.c **** { + 571:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 572:Src/main.c **** } + 573:Src/main.c **** UART_transmission_request = MESS_01; + 574:Src/main.c **** CPU_state = CPU_state_old; + 575:Src/main.c **** break; + 576:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output + 577:Src/main.c **** State_Data[1] = 0u; + 578:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) + 579:Src/main.c **** { + 580:Src/main.c **** uint16_t flags = COMMAND[0]; + 581:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); + 582:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 583:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 584:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; + 585:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; + 586:Src/main.c **** + 587:Src/main.c **** AD9833_Apply(enable, triangle, freq_word); + 588:Src/main.c **** } + 589:Src/main.c **** else + 590:Src/main.c **** { + 591:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 592:Src/main.c **** } + 593:Src/main.c **** UART_transmission_request = MESS_01; + 594:Src/main.c **** CPU_state = CPU_state_old; + 595:Src/main.c **** break; + 596:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls + 597:Src/main.c **** if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1]) + 598:Src/main.c **** { + 599:Src/main.c **** uint16_t flags = COMMAND[0]; + 600:Src/main.c **** uint16_t count = COMMAND[1]; + 601:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; + 602:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; + 603:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; + 604:Src/main.c **** + 605:Src/main.c **** if (uc && dc) + 606:Src/main.c **** { + 607:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 608:Src/main.c **** } + 609:Src/main.c **** else + 610:Src/main.c **** { + 611:Src/main.c **** if (count == 0u) + 612:Src/main.c **** { + 613:Src/main.c **** count = 1u; + 614:Src/main.c **** } + 615:Src/main.c **** if (count > 64u) + 616:Src/main.c **** { + 617:Src/main.c **** count = 64u; + ARM GAS /tmp/ccuHnxNu.s page 50 - 618:Src/main.c **** if (pulse_ms > 500u) - 619:Src/main.c **** { - 620:Src/main.c **** pulse_ms = 500u; - 621:Src/main.c **** } - 622:Src/main.c **** DS1809_Pulse(uc, dc, count, pulse_ms); - 623:Src/main.c **** } - 624:Src/main.c **** } - 625:Src/main.c **** else - 626:Src/main.c **** { - 627:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 628:Src/main.c **** } - 629:Src/main.c **** UART_transmission_request = MESS_01; - 630:Src/main.c **** CPU_state = CPU_state_old; - 631:Src/main.c **** break; - 632:Src/main.c **** case DECODE_TASK: - 633:Src/main.c **** if (CheckChecksum(COMMAND)) - 634:Src/main.c **** { - 635:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 636:Src/main.c **** TO6_before = TO6; - 637:Src/main.c **** CPU_state = RUN_TASK; - 638:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 639:Src/main.c **** } - 640:Src/main.c **** else - 641:Src/main.c **** { - 642:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 643:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 644:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 645:Src/main.c **** } - 646:Src/main.c **** UART_transmission_request = MESS_01; - 647:Src/main.c **** break; - 648:Src/main.c **** case RUN_TASK: - 649:Src/main.c **** switch (task.task_type) - 650:Src/main.c **** { - 651:Src/main.c **** case TT_CHANGE_CURR_1: - 652:Src/main.c **** - 653:Src/main.c **** - 654:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator - 655:Src/main.c **** //ADC clock - 656:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 657:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 658:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 659:Src/main.c **** - 660:Src/main.c **** //online calculation for debug purposes: - 661:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running - 662:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 663:Src/main.c **** - 664:Src/main.c **** - 665:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 666:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 667:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 668:Src/main.c **** - 669:Src/main.c **** - 670:Src/main.c **** - 671:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); - 672:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 673:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 674:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - ARM GAS /tmp/ccEQxcUB.s page 51 + 618:Src/main.c **** } + 619:Src/main.c **** if (pulse_ms == 0u) + 620:Src/main.c **** { + 621:Src/main.c **** pulse_ms = DS1809_PULSE_MS_DEFAULT; + 622:Src/main.c **** } + 623:Src/main.c **** if (pulse_ms > 500u) + 624:Src/main.c **** { + 625:Src/main.c **** pulse_ms = 500u; + 626:Src/main.c **** } + 627:Src/main.c **** DS1809_Pulse(uc, dc, count, pulse_ms); + 628:Src/main.c **** } + 629:Src/main.c **** } + 630:Src/main.c **** else + 631:Src/main.c **** { + 632:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 633:Src/main.c **** } + 634:Src/main.c **** UART_transmission_request = MESS_01; + 635:Src/main.c **** CPU_state = CPU_state_old; + 636:Src/main.c **** break; + 637:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4) + 638:Src/main.c **** if (CalculateChecksum(COMMAND, STM32_DAC_CMD_WORDS - 1) == COMMAND[STM32_DAC_CMD_WORDS - 1]) + 639:Src/main.c **** { + 640:Src/main.c **** uint16_t flags = COMMAND[0]; + 641:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu); + 642:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; + 643:Src/main.c **** PA4_DAC_Set(dac_code, enable); + 644:Src/main.c **** } + 645:Src/main.c **** else + 646:Src/main.c **** { + 647:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 648:Src/main.c **** } + 649:Src/main.c **** UART_transmission_request = MESS_01; + 650:Src/main.c **** CPU_state = CPU_state_old; + 651:Src/main.c **** break; + 652:Src/main.c **** case DECODE_TASK: + 653:Src/main.c **** if (CheckChecksum(COMMAND)) + 654:Src/main.c **** { + 655:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 656:Src/main.c **** TO6_before = TO6; + 657:Src/main.c **** CPU_state = RUN_TASK; + 658:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 659:Src/main.c **** } + 660:Src/main.c **** else + 661:Src/main.c **** { + 662:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 663:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 664:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 665:Src/main.c **** } + 666:Src/main.c **** UART_transmission_request = MESS_01; + 667:Src/main.c **** break; + 668:Src/main.c **** case RUN_TASK: + 669:Src/main.c **** switch (task.task_type) + 670:Src/main.c **** { + 671:Src/main.c **** case TT_CHANGE_CURR_1: + 672:Src/main.c **** + 673:Src/main.c **** + 674:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator + ARM GAS /tmp/ccuHnxNu.s page 51 - 675:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 676:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 677:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 678:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 679:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 680:Src/main.c **** - 681:Src/main.c **** // Toggle pin for oscilloscope - 682:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc - 683:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 684:Src/main.c **** - 685:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 686:Src/main.c **** if (st != HAL_OK) - 687:Src/main.c **** while(1); + 675:Src/main.c **** //ADC clock + 676:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 677:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 678:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 679:Src/main.c **** + 680:Src/main.c **** //online calculation for debug purposes: + 681:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running + 682:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 683:Src/main.c **** + 684:Src/main.c **** + 685:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) + 686:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + 687:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; 688:Src/main.c **** - 689:Src/main.c **** uint16_t step_counter = 0; - 690:Src/main.c **** uint16_t trigger_counter = 0; - 691:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 692:Src/main.c **** uint16_t task_sheduler = 0; - 693:Src/main.c **** - 694:Src/main.c **** - 695:Src/main.c **** - 696:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 697:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 698:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 699:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 689:Src/main.c **** + 690:Src/main.c **** + 691:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); + 692:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 693:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 694:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 695:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 696:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 697:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 698:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 699:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 700:Src/main.c **** - 701:Src/main.c **** - 702:Src/main.c **** - 703:Src/main.c **** TIM11 -> CNT = 0; - 704:Src/main.c **** TIM4 -> CNT = 0; - 705:Src/main.c **** - 706:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 707:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 708:Src/main.c **** //TIM4 -> CNT = 0; - 709:Src/main.c **** - 710:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de - 711:Src/main.c **** TIM11 -> CNT = 0; - 712:Src/main.c **** + 701:Src/main.c **** // Toggle pin for oscilloscope + 702:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc + 703:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 704:Src/main.c **** + 705:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 706:Src/main.c **** if (st != HAL_OK) + 707:Src/main.c **** while(1); + 708:Src/main.c **** + 709:Src/main.c **** uint16_t step_counter = 0; + 710:Src/main.c **** uint16_t trigger_counter = 0; + 711:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 712:Src/main.c **** uint16_t task_sheduler = 0; 713:Src/main.c **** - 714:Src/main.c **** while (task.current_param < task.max_param) - 715:Src/main.c **** { - 716:Src/main.c **** if (TIM10_coflag) - 717:Src/main.c **** { - 718:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 719:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 720:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase - 721:Src/main.c **** task.current_param += task.delta_param; - 722:Src/main.c **** TO10 = 0; - 723:Src/main.c **** TIM10_coflag = 0; - 724:Src/main.c **** - 725:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t - 726:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 727:Src/main.c **** //* - 728:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step - 729:Src/main.c **** OUT_trigger(trigger_counter); - 730:Src/main.c **** ++trigger_counter; - 731:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 52 + 714:Src/main.c **** + 715:Src/main.c **** + 716:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 717:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 718:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 719:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 720:Src/main.c **** + 721:Src/main.c **** + 722:Src/main.c **** + 723:Src/main.c **** TIM11 -> CNT = 0; + 724:Src/main.c **** TIM4 -> CNT = 0; + 725:Src/main.c **** + 726:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 727:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 728:Src/main.c **** //TIM4 -> CNT = 0; + 729:Src/main.c **** + 730:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de + 731:Src/main.c **** TIM11 -> CNT = 0; + ARM GAS /tmp/ccuHnxNu.s page 52 - 732:Src/main.c **** ++step_counter; - 733:Src/main.c **** //*/ - 734:Src/main.c **** /* - 735:Src/main.c **** ++task_sheduler; - 736:Src/main.c **** if (task_sheduler >= 10){ - 737:Src/main.c **** task_sheduler = 0; - 738:Src/main.c **** } - 739:Src/main.c **** //maintain stable temperature of laser 2 - 740:Src/main.c **** if (task_sheduler == 0){ - 741:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 742:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 743:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 744:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 745:Src/main.c **** } - 746:Src/main.c **** //maintain stable temperature of laser 1 - 747:Src/main.c **** //* - 748:Src/main.c **** if (task_sheduler == 5){ - 749:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 750:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 751:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 752:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 753:Src/main.c **** } - 754:Src/main.c **** //*/ - 755:Src/main.c **** } - 756:Src/main.c **** } - 757:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o - 758:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 759:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda - 760:Src/main.c **** //but one-pulse mode should be disabled - 761:Src/main.c **** - 762:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 763:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 764:Src/main.c **** - 765:Src/main.c **** - 766:Src/main.c **** - 767:Src/main.c **** Stop_TIM10(); - 768:Src/main.c **** - 769:Src/main.c **** task.current_param = task.min_param; - 770:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 771:Src/main.c **** if (task.tau > 3) - 772:Src/main.c **** { - 773:Src/main.c **** TIM10_period = htim10.Init.Period; - 774:Src/main.c **** htim10.Init.Period = 9999; - 775:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 732:Src/main.c **** + 733:Src/main.c **** + 734:Src/main.c **** while (task.current_param < task.max_param) + 735:Src/main.c **** { + 736:Src/main.c **** if (TIM10_coflag) + 737:Src/main.c **** { + 738:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 739:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 740:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase + 741:Src/main.c **** task.current_param += task.delta_param; + 742:Src/main.c **** TO10 = 0; + 743:Src/main.c **** TIM10_coflag = 0; + 744:Src/main.c **** + 745:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t + 746:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 747:Src/main.c **** //* + 748:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step + 749:Src/main.c **** OUT_trigger(trigger_counter); + 750:Src/main.c **** ++trigger_counter; + 751:Src/main.c **** } + 752:Src/main.c **** ++step_counter; + 753:Src/main.c **** //*/ + 754:Src/main.c **** /* + 755:Src/main.c **** ++task_sheduler; + 756:Src/main.c **** if (task_sheduler >= 10){ + 757:Src/main.c **** task_sheduler = 0; + 758:Src/main.c **** } + 759:Src/main.c **** //maintain stable temperature of laser 2 + 760:Src/main.c **** if (task_sheduler == 0){ + 761:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 762:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 763:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 764:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 765:Src/main.c **** } + 766:Src/main.c **** //maintain stable temperature of laser 1 + 767:Src/main.c **** //* + 768:Src/main.c **** if (task_sheduler == 5){ + 769:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 770:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 771:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 772:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 773:Src/main.c **** } + 774:Src/main.c **** //*/ + 775:Src/main.c **** } 776:Src/main.c **** } - 777:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 778:Src/main.c **** break; - 779:Src/main.c **** case TT_CHANGE_CURR_2: - 780:Src/main.c **** //Blink laser 2 - 781:Src/main.c **** //* - 782:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 783:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 784:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 785:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 786:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 787:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 788:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - ARM GAS /tmp/ccEQxcUB.s page 53 + 777:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o + 778:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 779:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda + 780:Src/main.c **** //but one-pulse mode should be disabled + 781:Src/main.c **** + 782:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 783:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 784:Src/main.c **** + 785:Src/main.c **** + 786:Src/main.c **** + 787:Src/main.c **** Stop_TIM10(); + 788:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 53 - 789:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 790:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 791:Src/main.c **** - 792:Src/main.c **** LD_blinker.task_type = 2; - 793:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 794:Src/main.c **** //LD_blinker.param = task.current_param; - 795:Src/main.c **** LD_blinker.param = 0; - 796:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 797:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 798:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 799:Src/main.c **** - 800:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). - 801:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 802:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); - 803:Src/main.c **** if (st != HAL_OK) - 804:Src/main.c **** while(1); - 805:Src/main.c **** // */ - 806:Src/main.c **** - 807:Src/main.c **** // Toggle pin for oscilloscope - 808:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 809:Src/main.c **** uint32_t i = 10000; while (--i){} - 810:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 811:Src/main.c **** LD_blinker.state = 2; - 812:Src/main.c **** - 813:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 814:Src/main.c **** if (st != HAL_OK) - 815:Src/main.c **** while(1); - 816:Src/main.c **** while (task.current_param < task.max_param) - 817:Src/main.c **** { - 818:Src/main.c **** if (TIM10_coflag) - 819:Src/main.c **** { - 820:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 821:Src/main.c **** //LD_blinker.param = task.current_param; - 822:Src/main.c **** //++LD_blinker.param; - 823:Src/main.c **** task.current_param += task.delta_param; - 824:Src/main.c **** TO10 = 0; - 825:Src/main.c **** TIM10_coflag = 0; + 789:Src/main.c **** task.current_param = task.min_param; + 790:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 791:Src/main.c **** if (task.tau > 3) + 792:Src/main.c **** { + 793:Src/main.c **** TIM10_period = htim10.Init.Period; + 794:Src/main.c **** htim10.Init.Period = 9999; + 795:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 796:Src/main.c **** } + 797:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 798:Src/main.c **** break; + 799:Src/main.c **** case TT_CHANGE_CURR_2: + 800:Src/main.c **** //Blink laser 2 + 801:Src/main.c **** //* + 802:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 803:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 804:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 805:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 806:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 807:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 808:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 809:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 810:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 811:Src/main.c **** + 812:Src/main.c **** LD_blinker.task_type = 2; + 813:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 814:Src/main.c **** //LD_blinker.param = task.current_param; + 815:Src/main.c **** LD_blinker.param = 0; + 816:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 817:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 818:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 819:Src/main.c **** + 820:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). + 821:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 822:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); + 823:Src/main.c **** if (st != HAL_OK) + 824:Src/main.c **** while(1); + 825:Src/main.c **** // */ 826:Src/main.c **** - 827:Src/main.c **** - 828:Src/main.c **** } - 829:Src/main.c **** } - 830:Src/main.c **** HAL_TIM_Base_Stop(&htim10); - 831:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 827:Src/main.c **** // Toggle pin for oscilloscope + 828:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 829:Src/main.c **** uint32_t i = 10000; while (--i){} + 830:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 831:Src/main.c **** LD_blinker.state = 2; 832:Src/main.c **** - 833:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 834:Src/main.c **** - 835:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); - 836:Src/main.c **** TIM8->CNT = 0; - 837:Src/main.c **** - 838:Src/main.c **** Stop_TIM10(); - 839:Src/main.c **** task.current_param = task.min_param; - 840:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 841:Src/main.c **** if (task.tau > 3) - 842:Src/main.c **** { - 843:Src/main.c **** TIM10_period = htim10.Init.Period; - 844:Src/main.c **** htim10.Init.Period = 9999; - 845:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - ARM GAS /tmp/ccEQxcUB.s page 54 + 833:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 834:Src/main.c **** if (st != HAL_OK) + 835:Src/main.c **** while(1); + 836:Src/main.c **** while (task.current_param < task.max_param) + 837:Src/main.c **** { + 838:Src/main.c **** if (TIM10_coflag) + 839:Src/main.c **** { + 840:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 841:Src/main.c **** //LD_blinker.param = task.current_param; + 842:Src/main.c **** //++LD_blinker.param; + 843:Src/main.c **** task.current_param += task.delta_param; + 844:Src/main.c **** TO10 = 0; + 845:Src/main.c **** TIM10_coflag = 0; + ARM GAS /tmp/ccuHnxNu.s page 54 - 846:Src/main.c **** } - 847:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 848:Src/main.c **** - 849:Src/main.c **** - 850:Src/main.c **** //*/ - 851:Src/main.c **** - 852:Src/main.c **** /* // Backup - 853:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 854:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 855:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 856:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 857:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 858:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 859:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 860:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 861:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 862:Src/main.c **** - 863:Src/main.c **** // Toggle pin for oscilloscope - 864:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 865:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 866:Src/main.c **** - 867:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 868:Src/main.c **** if (st != HAL_OK) - 869:Src/main.c **** while(1); - 870:Src/main.c **** while (task.current_param < task.max_param) - 871:Src/main.c **** { - 872:Src/main.c **** if (TIM10_coflag) - 873:Src/main.c **** { - 874:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 875:Src/main.c **** task.current_param += task.delta_param; - 876:Src/main.c **** TO10 = 0; - 877:Src/main.c **** TIM10_coflag = 0; - 878:Src/main.c **** - 879:Src/main.c **** - 880:Src/main.c **** } - 881:Src/main.c **** } - 882:Src/main.c **** Stop_TIM10(); - 883:Src/main.c **** task.current_param = task.min_param; - 884:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 885:Src/main.c **** if (task.tau > 3) - 886:Src/main.c **** { - 887:Src/main.c **** TIM10_period = htim10.Init.Period; - 888:Src/main.c **** htim10.Init.Period = 9999; - 889:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 890:Src/main.c **** } - 891:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 892:Src/main.c **** */ - 893:Src/main.c **** - 894:Src/main.c **** - 895:Src/main.c **** break; - 896:Src/main.c **** case TT_CHANGE_TEMP_1: - 897:Src/main.c **** // isn't implemented - 898:Src/main.c **** break; - 899:Src/main.c **** case TT_CHANGE_TEMP_2: - 900:Src/main.c **** // isn't implemented - 901:Src/main.c **** break; - 902:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 55 + 846:Src/main.c **** + 847:Src/main.c **** + 848:Src/main.c **** } + 849:Src/main.c **** } + 850:Src/main.c **** HAL_TIM_Base_Stop(&htim10); + 851:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 852:Src/main.c **** + 853:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 854:Src/main.c **** + 855:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); + 856:Src/main.c **** TIM8->CNT = 0; + 857:Src/main.c **** + 858:Src/main.c **** Stop_TIM10(); + 859:Src/main.c **** task.current_param = task.min_param; + 860:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 861:Src/main.c **** if (task.tau > 3) + 862:Src/main.c **** { + 863:Src/main.c **** TIM10_period = htim10.Init.Period; + 864:Src/main.c **** htim10.Init.Period = 9999; + 865:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 866:Src/main.c **** } + 867:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 868:Src/main.c **** + 869:Src/main.c **** + 870:Src/main.c **** //*/ + 871:Src/main.c **** + 872:Src/main.c **** /* // Backup + 873:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 874:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 875:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 876:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 877:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 878:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 879:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 880:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 881:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 882:Src/main.c **** + 883:Src/main.c **** // Toggle pin for oscilloscope + 884:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 885:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 886:Src/main.c **** + 887:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 888:Src/main.c **** if (st != HAL_OK) + 889:Src/main.c **** while(1); + 890:Src/main.c **** while (task.current_param < task.max_param) + 891:Src/main.c **** { + 892:Src/main.c **** if (TIM10_coflag) + 893:Src/main.c **** { + 894:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 895:Src/main.c **** task.current_param += task.delta_param; + 896:Src/main.c **** TO10 = 0; + 897:Src/main.c **** TIM10_coflag = 0; + 898:Src/main.c **** + 899:Src/main.c **** + 900:Src/main.c **** } + 901:Src/main.c **** } + 902:Src/main.c **** Stop_TIM10(); + ARM GAS /tmp/ccuHnxNu.s page 55 - 903:Src/main.c **** - 904:Src/main.c **** if (TO7>TO7_before) - 905:Src/main.c **** { - 906:Src/main.c **** TO7_before = TO7; - 907:Src/main.c **** - 908:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 909:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 910:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 911:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 912:Src/main.c **** - 913:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 914:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 915:Src/main.c **** - 916:Src/main.c **** //Prepare DATA of internals ADCs - 917:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 918:Src/main.c **** temp16 = Get_ADC(0); - 919:Src/main.c **** temp16 = Get_ADC(1); - 920:Src/main.c **** Long_Data[7] = temp16; - 921:Src/main.c **** - 922:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 923:Src/main.c **** temp16 = Get_ADC(1); - 924:Src/main.c **** Long_Data[8] = temp16; - 925:Src/main.c **** - 926:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 927:Src/main.c **** temp16 = Get_ADC(1); - 928:Src/main.c **** Long_Data[9] = temp16; - 929:Src/main.c **** - 930:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 931:Src/main.c **** temp16 = Get_ADC(1); - 932:Src/main.c **** Long_Data[10] = temp16; - 933:Src/main.c **** - 934:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 935:Src/main.c **** temp16 = Get_ADC(1); - 936:Src/main.c **** Long_Data[11] = temp16; - 937:Src/main.c **** temp16 = Get_ADC(2); - 938:Src/main.c **** - 939:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 940:Src/main.c **** temp16 = Get_ADC(3); - 941:Src/main.c **** temp16 = Get_ADC(4); - 942:Src/main.c **** Long_Data[12] = temp16; - 943:Src/main.c **** temp16 = Get_ADC(5); - 944:Src/main.c **** - 945:Src/main.c **** //Put the timer tick to Long_Data: - 946:Src/main.c **** TO6_stop = TO6; - 947:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 948:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 903:Src/main.c **** task.current_param = task.min_param; + 904:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 905:Src/main.c **** if (task.tau > 3) + 906:Src/main.c **** { + 907:Src/main.c **** TIM10_period = htim10.Init.Period; + 908:Src/main.c **** htim10.Init.Period = 9999; + 909:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 910:Src/main.c **** } + 911:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 912:Src/main.c **** */ + 913:Src/main.c **** + 914:Src/main.c **** + 915:Src/main.c **** break; + 916:Src/main.c **** case TT_CHANGE_TEMP_1: + 917:Src/main.c **** // isn't implemented + 918:Src/main.c **** break; + 919:Src/main.c **** case TT_CHANGE_TEMP_2: + 920:Src/main.c **** // isn't implemented + 921:Src/main.c **** break; + 922:Src/main.c **** } + 923:Src/main.c **** + 924:Src/main.c **** if (TO7>TO7_before) + 925:Src/main.c **** { + 926:Src/main.c **** TO7_before = TO7; + 927:Src/main.c **** + 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 929:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 931:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 932:Src/main.c **** + 933:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 934:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 935:Src/main.c **** + 936:Src/main.c **** //Prepare DATA of internals ADCs + 937:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 938:Src/main.c **** temp16 = Get_ADC(0); + 939:Src/main.c **** temp16 = Get_ADC(1); + 940:Src/main.c **** Long_Data[7] = temp16; + 941:Src/main.c **** + 942:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 943:Src/main.c **** temp16 = Get_ADC(1); + 944:Src/main.c **** Long_Data[8] = temp16; + 945:Src/main.c **** + 946:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 947:Src/main.c **** temp16 = Get_ADC(1); + 948:Src/main.c **** Long_Data[9] = temp16; 949:Src/main.c **** - 950:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 951:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 952:Src/main.c **** - 953:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 954:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 955:Src/main.c **** } - 956:Src/main.c **** while (!TIM10_coflag); - 957:Src/main.c **** - 958:Src/main.c **** Stop_TIM10(); - 959:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 56 + 950:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 951:Src/main.c **** temp16 = Get_ADC(1); + 952:Src/main.c **** Long_Data[10] = temp16; + 953:Src/main.c **** + 954:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 955:Src/main.c **** temp16 = Get_ADC(1); + 956:Src/main.c **** Long_Data[11] = temp16; + 957:Src/main.c **** temp16 = Get_ADC(2); + 958:Src/main.c **** + 959:Src/main.c **** //Put the temperature of LD2 to Long_Data: + ARM GAS /tmp/ccuHnxNu.s page 56 - 960:Src/main.c **** if (task.tau > 3) - 961:Src/main.c **** { - 962:Src/main.c **** htim10.Init.Period = TIM10_period; - 963:Src/main.c **** TO10_counter = task.dt / 10; - 964:Src/main.c **** } - 965:Src/main.c **** - 966:Src/main.c **** CPU_state_old = RUN_TASK; - 967:Src/main.c **** break; - 968:Src/main.c **** } - 969:Src/main.c **** - 970:Src/main.c **** switch (UART_transmission_request) - 971:Src/main.c **** { - 972:Src/main.c **** case MESS_01://Default state - 973:Src/main.c **** USART_TX(State_Data,2); - 974:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 975:Src/main.c **** State_Data[0]=0; - 976:Src/main.c **** State_Data[1]=0;//All OK! - 977:Src/main.c **** UART_transmission_request = NO_MESS; - 978:Src/main.c **** break; - 979:Src/main.c **** case MESS_02://Transmith packet - 980:Src/main.c **** - 981:Src/main.c **** //Find CS and put to Long_Data: - 982:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 983:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 984:Src/main.c **** - 985:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 986:Src/main.c **** { - 987:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 988:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 989:Src/main.c **** } - 990:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); - 991:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 992:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 993:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 994:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 995:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 996:Src/main.c **** UART_transmission_request = NO_MESS; - 997:Src/main.c **** break; - 998:Src/main.c **** case MESS_03://Transmith saved packet - 999:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) -1000:Src/main.c **** { -1001:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; -1002:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; -1003:Src/main.c **** } -1004:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); -1005:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); -1006:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; -1007:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; -1008:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA -1009:Src/main.c **** UART_transmission_request = NO_MESS; -1010:Src/main.c **** break; -1011:Src/main.c **** } -1012:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of -1013:Src/main.c **** { -1014:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter -1015:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! -1016:Src/main.c **** UART_transmission_request = MESS_01;//Send status - ARM GAS /tmp/ccEQxcUB.s page 57 + 960:Src/main.c **** temp16 = Get_ADC(3); + 961:Src/main.c **** temp16 = Get_ADC(4); + 962:Src/main.c **** Long_Data[12] = temp16; + 963:Src/main.c **** temp16 = Get_ADC(5); + 964:Src/main.c **** + 965:Src/main.c **** //Put the timer tick to Long_Data: + 966:Src/main.c **** TO6_stop = TO6; + 967:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 968:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 969:Src/main.c **** + 970:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 971:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 972:Src/main.c **** + 973:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 974:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 975:Src/main.c **** } + 976:Src/main.c **** while (!TIM10_coflag); + 977:Src/main.c **** + 978:Src/main.c **** Stop_TIM10(); + 979:Src/main.c **** + 980:Src/main.c **** if (task.tau > 3) + 981:Src/main.c **** { + 982:Src/main.c **** htim10.Init.Period = TIM10_period; + 983:Src/main.c **** TO10_counter = task.dt / 10; + 984:Src/main.c **** } + 985:Src/main.c **** + 986:Src/main.c **** CPU_state_old = RUN_TASK; + 987:Src/main.c **** break; + 988:Src/main.c **** } + 989:Src/main.c **** + 990:Src/main.c **** switch (UART_transmission_request) + 991:Src/main.c **** { + 992:Src/main.c **** case MESS_01://Default state + 993:Src/main.c **** USART_TX(State_Data,2); + 994:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 995:Src/main.c **** State_Data[0]=0; + 996:Src/main.c **** State_Data[1]=0;//All OK! + 997:Src/main.c **** UART_transmission_request = NO_MESS; + 998:Src/main.c **** break; + 999:Src/main.c **** case MESS_02://Transmith packet +1000:Src/main.c **** +1001:Src/main.c **** //Find CS and put to Long_Data: +1002:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); +1003:Src/main.c **** Long_Data[DL_16-1] = CS_result; +1004:Src/main.c **** +1005:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) +1006:Src/main.c **** { +1007:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; +1008:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; +1009:Src/main.c **** } +1010:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); +1011:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); +1012:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); +1013:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; +1014:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; +1015:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA +1016:Src/main.c **** UART_transmission_request = NO_MESS; + ARM GAS /tmp/ccuHnxNu.s page 57 -1017:Src/main.c **** flg_tmt = 0;//Reset timeout flag -1018:Src/main.c **** } -1019:Src/main.c **** /* USER CODE END WHILE */ -1020:Src/main.c **** -1021:Src/main.c **** /* USER CODE BEGIN 3 */ -1022:Src/main.c **** } -1023:Src/main.c **** /* USER CODE END 3 */ -1024:Src/main.c **** } -1025:Src/main.c **** -1026:Src/main.c **** /** -1027:Src/main.c **** * @brief System Clock Configuration -1028:Src/main.c **** * @retval None -1029:Src/main.c **** */ -1030:Src/main.c **** void SystemClock_Config(void) -1031:Src/main.c **** { -1032:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; -1033:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; -1034:Src/main.c **** -1035:Src/main.c **** /** Configure the main internal regulator output voltage -1036:Src/main.c **** */ -1037:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); -1038:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); -1039:Src/main.c **** -1040:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters -1041:Src/main.c **** * in the RCC_OscInitTypeDef structure. -1042:Src/main.c **** */ -1043:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; -1044:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; -1045:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; -1046:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; -1047:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; -1048:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; -1049:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; -1050:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; -1051:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; -1052:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) -1053:Src/main.c **** { -1054:Src/main.c **** Error_Handler(); -1055:Src/main.c **** } -1056:Src/main.c **** -1057:Src/main.c **** /** Activate the Over-Drive mode -1058:Src/main.c **** */ -1059:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) -1060:Src/main.c **** { -1061:Src/main.c **** Error_Handler(); -1062:Src/main.c **** } -1063:Src/main.c **** -1064:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks -1065:Src/main.c **** */ -1066:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK -1067:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; -1068:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; -1069:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; -1070:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; -1071:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; -1072:Src/main.c **** -1073:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) - ARM GAS /tmp/ccEQxcUB.s page 58 +1017:Src/main.c **** break; +1018:Src/main.c **** case MESS_03://Transmith saved packet +1019:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) +1020:Src/main.c **** { +1021:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; +1022:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; +1023:Src/main.c **** } +1024:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); +1025:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); +1026:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; +1027:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; +1028:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA +1029:Src/main.c **** UART_transmission_request = NO_MESS; +1030:Src/main.c **** break; +1031:Src/main.c **** } +1032:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of +1033:Src/main.c **** { +1034:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter +1035:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! +1036:Src/main.c **** UART_transmission_request = MESS_01;//Send status +1037:Src/main.c **** flg_tmt = 0;//Reset timeout flag +1038:Src/main.c **** } +1039:Src/main.c **** /* USER CODE END WHILE */ +1040:Src/main.c **** +1041:Src/main.c **** /* USER CODE BEGIN 3 */ +1042:Src/main.c **** } +1043:Src/main.c **** /* USER CODE END 3 */ +1044:Src/main.c **** } +1045:Src/main.c **** +1046:Src/main.c **** /** +1047:Src/main.c **** * @brief System Clock Configuration +1048:Src/main.c **** * @retval None +1049:Src/main.c **** */ +1050:Src/main.c **** void SystemClock_Config(void) +1051:Src/main.c **** { +1052:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; +1053:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; +1054:Src/main.c **** +1055:Src/main.c **** /** Configure the main internal regulator output voltage +1056:Src/main.c **** */ +1057:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); +1058:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); +1059:Src/main.c **** +1060:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters +1061:Src/main.c **** * in the RCC_OscInitTypeDef structure. +1062:Src/main.c **** */ +1063:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; +1064:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; +1065:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; +1066:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; +1067:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; +1068:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; +1069:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; +1070:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; +1071:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; +1072:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) +1073:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 58 -1074:Src/main.c **** { -1075:Src/main.c **** Error_Handler(); -1076:Src/main.c **** } -1077:Src/main.c **** } -1078:Src/main.c **** -1079:Src/main.c **** /** -1080:Src/main.c **** * @brief ADC1 Initialization Function -1081:Src/main.c **** * @param None -1082:Src/main.c **** * @retval None -1083:Src/main.c **** */ -1084:Src/main.c **** static void MX_ADC1_Init(void) -1085:Src/main.c **** { -1086:Src/main.c **** -1087:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ -1088:Src/main.c **** -1089:Src/main.c **** /* USER CODE END ADC1_Init 0 */ -1090:Src/main.c **** -1091:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1074:Src/main.c **** Error_Handler(); +1075:Src/main.c **** } +1076:Src/main.c **** +1077:Src/main.c **** /** Activate the Over-Drive mode +1078:Src/main.c **** */ +1079:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) +1080:Src/main.c **** { +1081:Src/main.c **** Error_Handler(); +1082:Src/main.c **** } +1083:Src/main.c **** +1084:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks +1085:Src/main.c **** */ +1086:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK +1087:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; +1088:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; +1089:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; +1090:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; +1091:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 1092:Src/main.c **** -1093:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ -1094:Src/main.c **** -1095:Src/main.c **** /* USER CODE END ADC1_Init 1 */ -1096:Src/main.c **** -1097:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con -1098:Src/main.c **** */ -1099:Src/main.c **** hadc1.Instance = ADC1; -1100:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; -1101:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; -1102:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; -1103:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; -1104:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; -1105:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; -1106:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; -1107:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; -1108:Src/main.c **** hadc1.Init.NbrOfConversion = 5; -1109:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; -1110:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; -1111:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) -1112:Src/main.c **** { -1113:Src/main.c **** Error_Handler(); -1114:Src/main.c **** } -1115:Src/main.c **** -1116:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1117:Src/main.c **** */ -1118:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; -1119:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; -1120:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; -1121:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1122:Src/main.c **** { -1123:Src/main.c **** Error_Handler(); -1124:Src/main.c **** } -1125:Src/main.c **** -1126:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1127:Src/main.c **** */ -1128:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; -1129:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; -1130:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - ARM GAS /tmp/ccEQxcUB.s page 59 +1093:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) +1094:Src/main.c **** { +1095:Src/main.c **** Error_Handler(); +1096:Src/main.c **** } +1097:Src/main.c **** } +1098:Src/main.c **** +1099:Src/main.c **** /** +1100:Src/main.c **** * @brief ADC1 Initialization Function +1101:Src/main.c **** * @param None +1102:Src/main.c **** * @retval None +1103:Src/main.c **** */ +1104:Src/main.c **** static void MX_ADC1_Init(void) +1105:Src/main.c **** { +1106:Src/main.c **** +1107:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ +1108:Src/main.c **** +1109:Src/main.c **** /* USER CODE END ADC1_Init 0 */ +1110:Src/main.c **** +1111:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1112:Src/main.c **** +1113:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ +1114:Src/main.c **** +1115:Src/main.c **** /* USER CODE END ADC1_Init 1 */ +1116:Src/main.c **** +1117:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1118:Src/main.c **** */ +1119:Src/main.c **** hadc1.Instance = ADC1; +1120:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; +1121:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; +1122:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; +1123:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; +1124:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; +1125:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; +1126:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; +1127:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; +1128:Src/main.c **** hadc1.Init.NbrOfConversion = 5; +1129:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; +1130:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + ARM GAS /tmp/ccuHnxNu.s page 59 -1131:Src/main.c **** { -1132:Src/main.c **** Error_Handler(); -1133:Src/main.c **** } -1134:Src/main.c **** -1135:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1136:Src/main.c **** */ -1137:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; -1138:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; -1139:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1140:Src/main.c **** { -1141:Src/main.c **** Error_Handler(); -1142:Src/main.c **** } -1143:Src/main.c **** -1144:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1145:Src/main.c **** */ -1146:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; -1147:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; -1148:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1149:Src/main.c **** { -1150:Src/main.c **** Error_Handler(); -1151:Src/main.c **** } -1152:Src/main.c **** -1153:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1154:Src/main.c **** */ -1155:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; -1156:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; -1157:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1158:Src/main.c **** { -1159:Src/main.c **** Error_Handler(); -1160:Src/main.c **** } -1161:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ -1162:Src/main.c **** -1163:Src/main.c **** /* USER CODE END ADC1_Init 2 */ -1164:Src/main.c **** -1165:Src/main.c **** } -1166:Src/main.c **** -1167:Src/main.c **** /** -1168:Src/main.c **** * @brief ADC3 Initialization Function -1169:Src/main.c **** * @param None -1170:Src/main.c **** * @retval None -1171:Src/main.c **** */ -1172:Src/main.c **** static void MX_ADC3_Init(void) -1173:Src/main.c **** { -1174:Src/main.c **** -1175:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ -1176:Src/main.c **** -1177:Src/main.c **** /* USER CODE END ADC3_Init 0 */ -1178:Src/main.c **** -1179:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; -1180:Src/main.c **** -1181:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ +1131:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) +1132:Src/main.c **** { +1133:Src/main.c **** Error_Handler(); +1134:Src/main.c **** } +1135:Src/main.c **** +1136:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1137:Src/main.c **** */ +1138:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; +1139:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; +1140:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; +1141:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1142:Src/main.c **** { +1143:Src/main.c **** Error_Handler(); +1144:Src/main.c **** } +1145:Src/main.c **** +1146:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1147:Src/main.c **** */ +1148:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; +1149:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; +1150:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1151:Src/main.c **** { +1152:Src/main.c **** Error_Handler(); +1153:Src/main.c **** } +1154:Src/main.c **** +1155:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1156:Src/main.c **** */ +1157:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; +1158:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; +1159:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1160:Src/main.c **** { +1161:Src/main.c **** Error_Handler(); +1162:Src/main.c **** } +1163:Src/main.c **** +1164:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1165:Src/main.c **** */ +1166:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; +1167:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; +1168:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1169:Src/main.c **** { +1170:Src/main.c **** Error_Handler(); +1171:Src/main.c **** } +1172:Src/main.c **** +1173:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1174:Src/main.c **** */ +1175:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; +1176:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; +1177:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1178:Src/main.c **** { +1179:Src/main.c **** Error_Handler(); +1180:Src/main.c **** } +1181:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ 1182:Src/main.c **** -1183:Src/main.c **** /* USER CODE END ADC3_Init 1 */ +1183:Src/main.c **** /* USER CODE END ADC1_Init 2 */ 1184:Src/main.c **** -1185:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con -1186:Src/main.c **** */ -1187:Src/main.c **** hadc3.Instance = ADC3; - ARM GAS /tmp/ccEQxcUB.s page 60 +1185:Src/main.c **** } +1186:Src/main.c **** +1187:Src/main.c **** /** + ARM GAS /tmp/ccuHnxNu.s page 60 -1188:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; -1189:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; -1190:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; -1191:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; -1192:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; -1193:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; -1194:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; -1195:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; -1196:Src/main.c **** hadc3.Init.NbrOfConversion = 1; -1197:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; -1198:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; -1199:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) -1200:Src/main.c **** { -1201:Src/main.c **** Error_Handler(); -1202:Src/main.c **** } -1203:Src/main.c **** -1204:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1205:Src/main.c **** */ -1206:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; -1207:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; -1208:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; -1209:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) -1210:Src/main.c **** { -1211:Src/main.c **** Error_Handler(); -1212:Src/main.c **** } -1213:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ -1214:Src/main.c **** -1215:Src/main.c **** /* USER CODE END ADC3_Init 2 */ -1216:Src/main.c **** -1217:Src/main.c **** } -1218:Src/main.c **** -1219:Src/main.c **** /** -1220:Src/main.c **** * @brief SDMMC1 Initialization Function -1221:Src/main.c **** * @param None -1222:Src/main.c **** * @retval None -1223:Src/main.c **** */ -1224:Src/main.c **** static void MX_SDMMC1_SD_Init(void) -1225:Src/main.c **** { - 95 .loc 1 1225 1 is_stmt 1 view -0 +1188:Src/main.c **** * @brief ADC3 Initialization Function +1189:Src/main.c **** * @param None +1190:Src/main.c **** * @retval None +1191:Src/main.c **** */ +1192:Src/main.c **** static void MX_ADC3_Init(void) +1193:Src/main.c **** { +1194:Src/main.c **** +1195:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ +1196:Src/main.c **** +1197:Src/main.c **** /* USER CODE END ADC3_Init 0 */ +1198:Src/main.c **** +1199:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1200:Src/main.c **** +1201:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ +1202:Src/main.c **** +1203:Src/main.c **** /* USER CODE END ADC3_Init 1 */ +1204:Src/main.c **** +1205:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1206:Src/main.c **** */ +1207:Src/main.c **** hadc3.Instance = ADC3; +1208:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; +1209:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; +1210:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; +1211:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; +1212:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; +1213:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; +1214:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; +1215:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; +1216:Src/main.c **** hadc3.Init.NbrOfConversion = 1; +1217:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; +1218:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; +1219:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) +1220:Src/main.c **** { +1221:Src/main.c **** Error_Handler(); +1222:Src/main.c **** } +1223:Src/main.c **** +1224:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1225:Src/main.c **** */ +1226:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; +1227:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; +1228:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; +1229:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) +1230:Src/main.c **** { +1231:Src/main.c **** Error_Handler(); +1232:Src/main.c **** } +1233:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ +1234:Src/main.c **** +1235:Src/main.c **** /* USER CODE END ADC3_Init 2 */ +1236:Src/main.c **** +1237:Src/main.c **** } +1238:Src/main.c **** +1239:Src/main.c **** /** +1240:Src/main.c **** * @brief SDMMC1 Initialization Function +1241:Src/main.c **** * @param None +1242:Src/main.c **** * @retval None +1243:Src/main.c **** */ +1244:Src/main.c **** static void MX_SDMMC1_SD_Init(void) + ARM GAS /tmp/ccuHnxNu.s page 61 + + +1245:Src/main.c **** { + 95 .loc 1 1245 1 is_stmt 1 view -0 96 .cfi_startproc 97 @ args = 0, pretend = 0, frame = 0 98 @ frame_needed = 0, uses_anonymous_args = 0 99 @ link register save eliminated. -1226:Src/main.c **** -1227:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ -1228:Src/main.c **** -1229:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ -1230:Src/main.c **** -1231:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ -1232:Src/main.c **** -1233:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ -1234:Src/main.c **** hsd1.Instance = SDMMC1; - 100 .loc 1 1234 3 view .LVU21 - 101 .loc 1 1234 17 is_stmt 0 view .LVU22 +1246:Src/main.c **** +1247:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ +1248:Src/main.c **** +1249:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ +1250:Src/main.c **** +1251:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ +1252:Src/main.c **** +1253:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ +1254:Src/main.c **** hsd1.Instance = SDMMC1; + 100 .loc 1 1254 3 view .LVU21 + 101 .loc 1 1254 17 is_stmt 0 view .LVU22 102 0000 064B ldr r3, .L6 103 0002 074A ldr r2, .L6+4 104 0004 1A60 str r2, [r3] - ARM GAS /tmp/ccEQxcUB.s page 61 - - -1235:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - 105 .loc 1 1235 3 is_stmt 1 view .LVU23 - 106 .loc 1 1235 23 is_stmt 0 view .LVU24 +1255:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + 105 .loc 1 1255 3 is_stmt 1 view .LVU23 + 106 .loc 1 1255 23 is_stmt 0 view .LVU24 107 0006 0022 movs r2, #0 108 0008 5A60 str r2, [r3, #4] -1236:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; - 109 .loc 1 1236 3 is_stmt 1 view .LVU25 - 110 .loc 1 1236 25 is_stmt 0 view .LVU26 +1256:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + 109 .loc 1 1256 3 is_stmt 1 view .LVU25 + 110 .loc 1 1256 25 is_stmt 0 view .LVU26 111 000a 9A60 str r2, [r3, #8] -1237:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - 112 .loc 1 1237 3 is_stmt 1 view .LVU27 - 113 .loc 1 1237 28 is_stmt 0 view .LVU28 +1257:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + 112 .loc 1 1257 3 is_stmt 1 view .LVU27 + 113 .loc 1 1257 28 is_stmt 0 view .LVU28 114 000c DA60 str r2, [r3, #12] -1238:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; - 115 .loc 1 1238 3 is_stmt 1 view .LVU29 - 116 .loc 1 1238 21 is_stmt 0 view .LVU30 +1258:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; + 115 .loc 1 1258 3 is_stmt 1 view .LVU29 + 116 .loc 1 1258 21 is_stmt 0 view .LVU30 117 000e 4FF40061 mov r1, #2048 118 0012 1961 str r1, [r3, #16] -1239:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - 119 .loc 1 1239 3 is_stmt 1 view .LVU31 - 120 .loc 1 1239 33 is_stmt 0 view .LVU32 +1259:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + 119 .loc 1 1259 3 is_stmt 1 view .LVU31 + 120 .loc 1 1259 33 is_stmt 0 view .LVU32 121 0014 5A61 str r2, [r3, #20] -1240:Src/main.c **** hsd1.Init.ClockDiv = 20; - 122 .loc 1 1240 3 is_stmt 1 view .LVU33 - 123 .loc 1 1240 22 is_stmt 0 view .LVU34 +1260:Src/main.c **** hsd1.Init.ClockDiv = 20; + 122 .loc 1 1260 3 is_stmt 1 view .LVU33 + 123 .loc 1 1260 22 is_stmt 0 view .LVU34 124 0016 1422 movs r2, #20 125 0018 9A61 str r2, [r3, #24] -1241:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ -1242:Src/main.c **** -1243:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ -1244:Src/main.c **** -1245:Src/main.c **** } - 126 .loc 1 1245 1 view .LVU35 +1261:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ +1262:Src/main.c **** +1263:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ +1264:Src/main.c **** +1265:Src/main.c **** } + 126 .loc 1 1265 1 view .LVU35 127 001a 7047 bx lr 128 .L7: 129 .align 2 130 .L6: + ARM GAS /tmp/ccuHnxNu.s page 62 + + 131 001c 00000000 .word hsd1 132 0020 002C0140 .word 1073818624 133 .cfi_endproc @@ -3649,870 +3672,867 @@ ARM GAS /tmp/ccEQxcUB.s page 1 140 .thumb_func 142 MX_DMA_Init: 143 .LFB1206: -1246:Src/main.c **** -1247:Src/main.c **** /** -1248:Src/main.c **** * @brief SPI2 Initialization Function -1249:Src/main.c **** * @param None -1250:Src/main.c **** * @retval None -1251:Src/main.c **** */ -1252:Src/main.c **** static void MX_SPI2_Init(void) -1253:Src/main.c **** { -1254:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 62 - - -1255:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ -1256:Src/main.c **** -1257:Src/main.c **** /* USER CODE END SPI2_Init 0 */ -1258:Src/main.c **** -1259:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1260:Src/main.c **** -1261:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1262:Src/main.c **** -1263:Src/main.c **** /* Peripheral clock enable */ -1264:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); -1265:Src/main.c **** -1266:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); -1267:Src/main.c **** /**SPI2 GPIO Configuration -1268:Src/main.c **** PB13 ------> SPI2_SCK -1269:Src/main.c **** PB14 ------> SPI2_MISO -1270:Src/main.c **** PB15 ------> SPI2_MOSI +1266:Src/main.c **** +1267:Src/main.c **** /** +1268:Src/main.c **** * @brief SPI2 Initialization Function +1269:Src/main.c **** * @param None +1270:Src/main.c **** * @retval None 1271:Src/main.c **** */ -1272:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1273:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1274:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1275:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1276:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1277:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1278:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1279:Src/main.c **** -1280:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14; -1281:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1282:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1283:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1284:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1285:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1286:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1287:Src/main.c **** -1288:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; -1289:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1290:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1291:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1292:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1293:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1294:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1295:Src/main.c **** -1296:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ -1297:Src/main.c **** -1298:Src/main.c **** /* USER CODE END SPI2_Init 1 */ -1299:Src/main.c **** /* SPI2 parameter configuration*/ -1300:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1301:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1302:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1303:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; -1304:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1305:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1306:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; -1307:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1308:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1309:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1310:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); -1311:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); - ARM GAS /tmp/ccEQxcUB.s page 63 +1272:Src/main.c **** static void MX_SPI2_Init(void) +1273:Src/main.c **** { +1274:Src/main.c **** +1275:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ +1276:Src/main.c **** +1277:Src/main.c **** /* USER CODE END SPI2_Init 0 */ +1278:Src/main.c **** +1279:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1280:Src/main.c **** +1281:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1282:Src/main.c **** +1283:Src/main.c **** /* Peripheral clock enable */ +1284:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); +1285:Src/main.c **** +1286:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); +1287:Src/main.c **** /**SPI2 GPIO Configuration +1288:Src/main.c **** PB13 ------> SPI2_SCK +1289:Src/main.c **** PB14 ------> SPI2_MISO +1290:Src/main.c **** PB15 ------> SPI2_MOSI +1291:Src/main.c **** */ +1292:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1293:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1294:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1295:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1296:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1297:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1298:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1299:Src/main.c **** +1300:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14; +1301:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1302:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1303:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1304:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1305:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1306:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1307:Src/main.c **** +1308:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; +1309:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1310:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1311:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + ARM GAS /tmp/ccuHnxNu.s page 63 -1312:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); -1313:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ -1314:Src/main.c **** -1315:Src/main.c **** /* USER CODE END SPI2_Init 2 */ -1316:Src/main.c **** -1317:Src/main.c **** } -1318:Src/main.c **** -1319:Src/main.c **** /** -1320:Src/main.c **** * @brief SPI4 Initialization Function -1321:Src/main.c **** * @param None -1322:Src/main.c **** * @retval None -1323:Src/main.c **** */ -1324:Src/main.c **** static void MX_SPI4_Init(void) -1325:Src/main.c **** { -1326:Src/main.c **** -1327:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ -1328:Src/main.c **** -1329:Src/main.c **** /* USER CODE END SPI4_Init 0 */ -1330:Src/main.c **** -1331:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1332:Src/main.c **** -1333:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1312:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1313:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1314:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1315:Src/main.c **** +1316:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ +1317:Src/main.c **** +1318:Src/main.c **** /* USER CODE END SPI2_Init 1 */ +1319:Src/main.c **** /* SPI2 parameter configuration*/ +1320:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1321:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1322:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1323:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; +1324:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1325:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1326:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; +1327:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1328:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1329:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1330:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); +1331:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); +1332:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); +1333:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ 1334:Src/main.c **** -1335:Src/main.c **** /* Peripheral clock enable */ -1336:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); -1337:Src/main.c **** -1338:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); -1339:Src/main.c **** /**SPI4 GPIO Configuration -1340:Src/main.c **** PE12 ------> SPI4_SCK -1341:Src/main.c **** PE13 ------> SPI4_MISO -1342:Src/main.c **** */ -1343:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; -1344:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1345:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1346:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1347:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1348:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1349:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1335:Src/main.c **** /* USER CODE END SPI2_Init 2 */ +1336:Src/main.c **** +1337:Src/main.c **** } +1338:Src/main.c **** +1339:Src/main.c **** /** +1340:Src/main.c **** * @brief SPI4 Initialization Function +1341:Src/main.c **** * @param None +1342:Src/main.c **** * @retval None +1343:Src/main.c **** */ +1344:Src/main.c **** static void MX_SPI4_Init(void) +1345:Src/main.c **** { +1346:Src/main.c **** +1347:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ +1348:Src/main.c **** +1349:Src/main.c **** /* USER CODE END SPI4_Init 0 */ 1350:Src/main.c **** -1351:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1352:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1353:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1354:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1355:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1356:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1357:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1358:Src/main.c **** -1359:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ -1360:Src/main.c **** -1361:Src/main.c **** /* USER CODE END SPI4_Init 1 */ -1362:Src/main.c **** /* SPI4 parameter configuration*/ -1363:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1364:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1365:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1366:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1367:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1368:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - ARM GAS /tmp/ccEQxcUB.s page 64 +1351:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1352:Src/main.c **** +1353:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1354:Src/main.c **** +1355:Src/main.c **** /* Peripheral clock enable */ +1356:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); +1357:Src/main.c **** +1358:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); +1359:Src/main.c **** /**SPI4 GPIO Configuration +1360:Src/main.c **** PE12 ------> SPI4_SCK +1361:Src/main.c **** PE13 ------> SPI4_MISO +1362:Src/main.c **** */ +1363:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; +1364:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1365:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1366:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1367:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1368:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + ARM GAS /tmp/ccuHnxNu.s page 64 -1369:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1370:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1371:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1372:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1373:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); -1374:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); -1375:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); -1376:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ -1377:Src/main.c **** -1378:Src/main.c **** /* USER CODE END SPI4_Init 2 */ -1379:Src/main.c **** -1380:Src/main.c **** } -1381:Src/main.c **** -1382:Src/main.c **** /** -1383:Src/main.c **** * @brief SPI5 Initialization Function -1384:Src/main.c **** * @param None -1385:Src/main.c **** * @retval None -1386:Src/main.c **** */ -1387:Src/main.c **** static void MX_SPI5_Init(void) -1388:Src/main.c **** { -1389:Src/main.c **** -1390:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ -1391:Src/main.c **** -1392:Src/main.c **** /* USER CODE END SPI5_Init 0 */ -1393:Src/main.c **** -1394:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1395:Src/main.c **** -1396:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1369:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1370:Src/main.c **** +1371:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1372:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1373:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1374:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1375:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1376:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1377:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1378:Src/main.c **** +1379:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ +1380:Src/main.c **** +1381:Src/main.c **** /* USER CODE END SPI4_Init 1 */ +1382:Src/main.c **** /* SPI4 parameter configuration*/ +1383:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1384:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1385:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1386:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1387:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1388:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1389:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1390:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1391:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1392:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1393:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); +1394:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); +1395:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); +1396:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ 1397:Src/main.c **** -1398:Src/main.c **** /* Peripheral clock enable */ -1399:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); -1400:Src/main.c **** -1401:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); -1402:Src/main.c **** /**SPI5 GPIO Configuration -1403:Src/main.c **** PF7 ------> SPI5_SCK -1404:Src/main.c **** PF8 ------> SPI5_MISO -1405:Src/main.c **** */ -1406:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1407:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1408:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1409:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1410:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1411:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1412:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1398:Src/main.c **** /* USER CODE END SPI4_Init 2 */ +1399:Src/main.c **** +1400:Src/main.c **** } +1401:Src/main.c **** +1402:Src/main.c **** /** +1403:Src/main.c **** * @brief SPI5 Initialization Function +1404:Src/main.c **** * @param None +1405:Src/main.c **** * @retval None +1406:Src/main.c **** */ +1407:Src/main.c **** static void MX_SPI5_Init(void) +1408:Src/main.c **** { +1409:Src/main.c **** +1410:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1411:Src/main.c **** +1412:Src/main.c **** /* USER CODE END SPI5_Init 0 */ 1413:Src/main.c **** -1414:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; -1415:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1416:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1417:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1418:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1419:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1420:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1421:Src/main.c **** -1422:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ -1423:Src/main.c **** -1424:Src/main.c **** /* USER CODE END SPI5_Init 1 */ -1425:Src/main.c **** /* SPI5 parameter configuration*/ - ARM GAS /tmp/ccEQxcUB.s page 65 +1414:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1415:Src/main.c **** +1416:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1417:Src/main.c **** +1418:Src/main.c **** /* Peripheral clock enable */ +1419:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); +1420:Src/main.c **** +1421:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); +1422:Src/main.c **** /**SPI5 GPIO Configuration +1423:Src/main.c **** PF7 ------> SPI5_SCK +1424:Src/main.c **** PF8 ------> SPI5_MISO +1425:Src/main.c **** */ + ARM GAS /tmp/ccuHnxNu.s page 65 -1426:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1427:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1428:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1429:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1430:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1431:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1432:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1433:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1434:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1435:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1436:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); -1437:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); -1438:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); -1439:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ -1440:Src/main.c **** -1441:Src/main.c **** /* USER CODE END SPI5_Init 2 */ -1442:Src/main.c **** -1443:Src/main.c **** } -1444:Src/main.c **** -1445:Src/main.c **** /** -1446:Src/main.c **** * @brief SPI6 Initialization Function -1447:Src/main.c **** * @param None -1448:Src/main.c **** * @retval None -1449:Src/main.c **** */ -1450:Src/main.c **** static void MX_SPI6_Init(void) -1451:Src/main.c **** { -1452:Src/main.c **** -1453:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ -1454:Src/main.c **** -1455:Src/main.c **** /* USER CODE END SPI6_Init 0 */ -1456:Src/main.c **** -1457:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1458:Src/main.c **** -1459:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1426:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1427:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1428:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1429:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1430:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1431:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1432:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1433:Src/main.c **** +1434:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; +1435:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1436:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1437:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1438:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1439:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1440:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1441:Src/main.c **** +1442:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ +1443:Src/main.c **** +1444:Src/main.c **** /* USER CODE END SPI5_Init 1 */ +1445:Src/main.c **** /* SPI5 parameter configuration*/ +1446:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1447:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1448:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1449:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1450:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1451:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1452:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1453:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1454:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1455:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1456:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); +1457:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); +1458:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); +1459:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ 1460:Src/main.c **** -1461:Src/main.c **** /* Peripheral clock enable */ -1462:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); -1463:Src/main.c **** -1464:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1465:Src/main.c **** /**SPI6 GPIO Configuration -1466:Src/main.c **** PA5 ------> SPI6_SCK -1467:Src/main.c **** PA7 ------> SPI6_MOSI -1468:Src/main.c **** */ -1469:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; -1470:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1471:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1472:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1473:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1474:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1475:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1461:Src/main.c **** /* USER CODE END SPI5_Init 2 */ +1462:Src/main.c **** +1463:Src/main.c **** } +1464:Src/main.c **** +1465:Src/main.c **** /** +1466:Src/main.c **** * @brief SPI6 Initialization Function +1467:Src/main.c **** * @param None +1468:Src/main.c **** * @retval None +1469:Src/main.c **** */ +1470:Src/main.c **** static void MX_SPI6_Init(void) +1471:Src/main.c **** { +1472:Src/main.c **** +1473:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ +1474:Src/main.c **** +1475:Src/main.c **** /* USER CODE END SPI6_Init 0 */ 1476:Src/main.c **** -1477:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1478:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1479:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1480:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1481:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1482:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - ARM GAS /tmp/ccEQxcUB.s page 66 +1477:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1478:Src/main.c **** +1479:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1480:Src/main.c **** +1481:Src/main.c **** /* Peripheral clock enable */ +1482:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); + ARM GAS /tmp/ccuHnxNu.s page 66 -1483:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1484:Src/main.c **** -1485:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ -1486:Src/main.c **** -1487:Src/main.c **** /* USER CODE END SPI6_Init 1 */ -1488:Src/main.c **** /* SPI6 parameter configuration*/ -1489:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1490:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1491:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1492:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1493:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1494:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1495:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1496:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1497:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1498:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1499:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); -1500:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); -1501:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); -1502:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ -1503:Src/main.c **** -1504:Src/main.c **** /* USER CODE END SPI6_Init 2 */ -1505:Src/main.c **** -1506:Src/main.c **** } -1507:Src/main.c **** -1508:Src/main.c **** /** -1509:Src/main.c **** * @brief TIM2 Initialization Function -1510:Src/main.c **** * @param None -1511:Src/main.c **** * @retval None -1512:Src/main.c **** */ -1513:Src/main.c **** static void MX_TIM2_Init(void) -1514:Src/main.c **** { -1515:Src/main.c **** -1516:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ -1517:Src/main.c **** -1518:Src/main.c **** /* USER CODE END TIM2_Init 0 */ -1519:Src/main.c **** -1520:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1521:Src/main.c **** -1522:Src/main.c **** /* Peripheral clock enable */ -1523:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); -1524:Src/main.c **** -1525:Src/main.c **** /* TIM2 interrupt Init */ -1526:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1527:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); -1528:Src/main.c **** -1529:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ -1530:Src/main.c **** -1531:Src/main.c **** /* USER CODE END TIM2_Init 1 */ -1532:Src/main.c **** TIM_InitStruct.Prescaler = 1000; -1533:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1534:Src/main.c **** TIM_InitStruct.Autoreload = 840000; -1535:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1536:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); -1537:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); -1538:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); -1539:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - ARM GAS /tmp/ccEQxcUB.s page 67 +1483:Src/main.c **** +1484:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1485:Src/main.c **** /**SPI6 GPIO Configuration +1486:Src/main.c **** PA5 ------> SPI6_SCK +1487:Src/main.c **** PA7 ------> SPI6_MOSI +1488:Src/main.c **** */ +1489:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; +1490:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1491:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1492:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1493:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1494:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1495:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1496:Src/main.c **** +1497:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1498:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1499:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1500:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1501:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1502:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1503:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1504:Src/main.c **** +1505:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ +1506:Src/main.c **** +1507:Src/main.c **** /* USER CODE END SPI6_Init 1 */ +1508:Src/main.c **** /* SPI6 parameter configuration*/ +1509:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1510:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1511:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1512:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1513:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1514:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1515:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1516:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1517:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1518:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1519:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); +1520:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); +1521:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); +1522:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ +1523:Src/main.c **** +1524:Src/main.c **** /* USER CODE END SPI6_Init 2 */ +1525:Src/main.c **** +1526:Src/main.c **** } +1527:Src/main.c **** +1528:Src/main.c **** /** +1529:Src/main.c **** * @brief TIM2 Initialization Function +1530:Src/main.c **** * @param None +1531:Src/main.c **** * @retval None +1532:Src/main.c **** */ +1533:Src/main.c **** static void MX_TIM2_Init(void) +1534:Src/main.c **** { +1535:Src/main.c **** +1536:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ +1537:Src/main.c **** +1538:Src/main.c **** /* USER CODE END TIM2_Init 0 */ +1539:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 67 -1540:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); -1541:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ -1542:Src/main.c **** -1543:Src/main.c **** /* USER CODE END TIM2_Init 2 */ +1540:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1541:Src/main.c **** +1542:Src/main.c **** /* Peripheral clock enable */ +1543:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); 1544:Src/main.c **** -1545:Src/main.c **** } -1546:Src/main.c **** -1547:Src/main.c **** /** -1548:Src/main.c **** * @brief TIM4 Initialization Function -1549:Src/main.c **** * @param None -1550:Src/main.c **** * @retval None -1551:Src/main.c **** */ -1552:Src/main.c **** static void MX_TIM4_Init(void) -1553:Src/main.c **** { -1554:Src/main.c **** -1555:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ -1556:Src/main.c **** -1557:Src/main.c **** /* USER CODE END TIM4_Init 0 */ -1558:Src/main.c **** -1559:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1560:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1561:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1545:Src/main.c **** /* TIM2 interrupt Init */ +1546:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1547:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); +1548:Src/main.c **** +1549:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ +1550:Src/main.c **** +1551:Src/main.c **** /* USER CODE END TIM2_Init 1 */ +1552:Src/main.c **** TIM_InitStruct.Prescaler = 1000; +1553:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1554:Src/main.c **** TIM_InitStruct.Autoreload = 840000; +1555:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1556:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); +1557:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); +1558:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); +1559:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); +1560:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); +1561:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ 1562:Src/main.c **** -1563:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ +1563:Src/main.c **** /* USER CODE END TIM2_Init 2 */ 1564:Src/main.c **** -1565:Src/main.c **** /* USER CODE END TIM4_Init 1 */ -1566:Src/main.c **** htim4.Instance = TIM4; -1567:Src/main.c **** htim4.Init.Prescaler = 0; -1568:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; -1569:Src/main.c **** htim4.Init.Period = 45; -1570:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1571:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1572:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) -1573:Src/main.c **** { -1574:Src/main.c **** Error_Handler(); -1575:Src/main.c **** } -1576:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1577:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) -1578:Src/main.c **** { -1579:Src/main.c **** Error_Handler(); -1580:Src/main.c **** } -1581:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) -1582:Src/main.c **** { -1583:Src/main.c **** Error_Handler(); -1584:Src/main.c **** } -1585:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1586:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1587:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) -1588:Src/main.c **** { -1589:Src/main.c **** Error_Handler(); -1590:Src/main.c **** } -1591:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1592:Src/main.c **** sConfigOC.Pulse = 22; -1593:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1594:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1595:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) -1596:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 68 +1565:Src/main.c **** } +1566:Src/main.c **** +1567:Src/main.c **** /** +1568:Src/main.c **** * @brief TIM4 Initialization Function +1569:Src/main.c **** * @param None +1570:Src/main.c **** * @retval None +1571:Src/main.c **** */ +1572:Src/main.c **** static void MX_TIM4_Init(void) +1573:Src/main.c **** { +1574:Src/main.c **** +1575:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ +1576:Src/main.c **** +1577:Src/main.c **** /* USER CODE END TIM4_Init 0 */ +1578:Src/main.c **** +1579:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1580:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1581:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1582:Src/main.c **** +1583:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ +1584:Src/main.c **** +1585:Src/main.c **** /* USER CODE END TIM4_Init 1 */ +1586:Src/main.c **** htim4.Instance = TIM4; +1587:Src/main.c **** htim4.Init.Prescaler = 0; +1588:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; +1589:Src/main.c **** htim4.Init.Period = 45; +1590:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1591:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1592:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) +1593:Src/main.c **** { +1594:Src/main.c **** Error_Handler(); +1595:Src/main.c **** } +1596:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + ARM GAS /tmp/ccuHnxNu.s page 68 -1597:Src/main.c **** Error_Handler(); -1598:Src/main.c **** } -1599:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ -1600:Src/main.c **** -1601:Src/main.c **** /* USER CODE END TIM4_Init 2 */ -1602:Src/main.c **** HAL_TIM_MspPostInit(&htim4); -1603:Src/main.c **** -1604:Src/main.c **** } -1605:Src/main.c **** -1606:Src/main.c **** /** -1607:Src/main.c **** * @brief TIM5 Initialization Function -1608:Src/main.c **** * @param None -1609:Src/main.c **** * @retval None -1610:Src/main.c **** */ -1611:Src/main.c **** static void MX_TIM5_Init(void) -1612:Src/main.c **** { -1613:Src/main.c **** -1614:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ -1615:Src/main.c **** -1616:Src/main.c **** /* USER CODE END TIM5_Init 0 */ -1617:Src/main.c **** -1618:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1619:Src/main.c **** -1620:Src/main.c **** /* Peripheral clock enable */ -1621:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); -1622:Src/main.c **** -1623:Src/main.c **** /* TIM5 interrupt Init */ -1624:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1625:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); -1626:Src/main.c **** -1627:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ -1628:Src/main.c **** -1629:Src/main.c **** /* USER CODE END TIM5_Init 1 */ -1630:Src/main.c **** TIM_InitStruct.Prescaler = 10000; -1631:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1632:Src/main.c **** TIM_InitStruct.Autoreload = 560; -1633:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1634:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); -1635:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); -1636:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); -1637:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); -1638:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); -1639:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ -1640:Src/main.c **** -1641:Src/main.c **** /* USER CODE END TIM5_Init 2 */ +1597:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) +1598:Src/main.c **** { +1599:Src/main.c **** Error_Handler(); +1600:Src/main.c **** } +1601:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) +1602:Src/main.c **** { +1603:Src/main.c **** Error_Handler(); +1604:Src/main.c **** } +1605:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1606:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1607:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) +1608:Src/main.c **** { +1609:Src/main.c **** Error_Handler(); +1610:Src/main.c **** } +1611:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1612:Src/main.c **** sConfigOC.Pulse = 22; +1613:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1614:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1615:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) +1616:Src/main.c **** { +1617:Src/main.c **** Error_Handler(); +1618:Src/main.c **** } +1619:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ +1620:Src/main.c **** +1621:Src/main.c **** /* USER CODE END TIM4_Init 2 */ +1622:Src/main.c **** HAL_TIM_MspPostInit(&htim4); +1623:Src/main.c **** +1624:Src/main.c **** } +1625:Src/main.c **** +1626:Src/main.c **** /** +1627:Src/main.c **** * @brief TIM5 Initialization Function +1628:Src/main.c **** * @param None +1629:Src/main.c **** * @retval None +1630:Src/main.c **** */ +1631:Src/main.c **** static void MX_TIM5_Init(void) +1632:Src/main.c **** { +1633:Src/main.c **** +1634:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ +1635:Src/main.c **** +1636:Src/main.c **** /* USER CODE END TIM5_Init 0 */ +1637:Src/main.c **** +1638:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1639:Src/main.c **** +1640:Src/main.c **** /* Peripheral clock enable */ +1641:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); 1642:Src/main.c **** -1643:Src/main.c **** } -1644:Src/main.c **** -1645:Src/main.c **** /** -1646:Src/main.c **** * @brief TIM6 Initialization Function -1647:Src/main.c **** * @param None -1648:Src/main.c **** * @retval None -1649:Src/main.c **** */ -1650:Src/main.c **** static void MX_TIM6_Init(void) -1651:Src/main.c **** { -1652:Src/main.c **** -1653:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ - ARM GAS /tmp/ccEQxcUB.s page 69 +1643:Src/main.c **** /* TIM5 interrupt Init */ +1644:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1645:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); +1646:Src/main.c **** +1647:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ +1648:Src/main.c **** +1649:Src/main.c **** /* USER CODE END TIM5_Init 1 */ +1650:Src/main.c **** TIM_InitStruct.Prescaler = 10000; +1651:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1652:Src/main.c **** TIM_InitStruct.Autoreload = 560; +1653:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + ARM GAS /tmp/ccuHnxNu.s page 69 -1654:Src/main.c **** -1655:Src/main.c **** /* USER CODE END TIM6_Init 0 */ -1656:Src/main.c **** -1657:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1658:Src/main.c **** -1659:Src/main.c **** /* Peripheral clock enable */ -1660:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); -1661:Src/main.c **** -1662:Src/main.c **** /* TIM6 interrupt Init */ -1663:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1664:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); -1665:Src/main.c **** -1666:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ -1667:Src/main.c **** -1668:Src/main.c **** /* USER CODE END TIM6_Init 1 */ -1669:Src/main.c **** TIM_InitStruct.Prescaler = 45999; -1670:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1671:Src/main.c **** TIM_InitStruct.Autoreload = 19; -1672:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); -1673:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); -1674:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); -1675:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); -1676:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ -1677:Src/main.c **** -1678:Src/main.c **** /* USER CODE END TIM6_Init 2 */ -1679:Src/main.c **** -1680:Src/main.c **** } +1654:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); +1655:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); +1656:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); +1657:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); +1658:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); +1659:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ +1660:Src/main.c **** +1661:Src/main.c **** /* USER CODE END TIM5_Init 2 */ +1662:Src/main.c **** +1663:Src/main.c **** } +1664:Src/main.c **** +1665:Src/main.c **** /** +1666:Src/main.c **** * @brief TIM6 Initialization Function +1667:Src/main.c **** * @param None +1668:Src/main.c **** * @retval None +1669:Src/main.c **** */ +1670:Src/main.c **** static void MX_TIM6_Init(void) +1671:Src/main.c **** { +1672:Src/main.c **** +1673:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ +1674:Src/main.c **** +1675:Src/main.c **** /* USER CODE END TIM6_Init 0 */ +1676:Src/main.c **** +1677:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1678:Src/main.c **** +1679:Src/main.c **** /* Peripheral clock enable */ +1680:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); 1681:Src/main.c **** -1682:Src/main.c **** /** -1683:Src/main.c **** * @brief TIM7 Initialization Function -1684:Src/main.c **** * @param None -1685:Src/main.c **** * @retval None -1686:Src/main.c **** */ -1687:Src/main.c **** static void MX_TIM7_Init(void) -1688:Src/main.c **** { -1689:Src/main.c **** -1690:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ -1691:Src/main.c **** -1692:Src/main.c **** /* USER CODE END TIM7_Init 0 */ -1693:Src/main.c **** -1694:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1695:Src/main.c **** -1696:Src/main.c **** /* Peripheral clock enable */ -1697:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); -1698:Src/main.c **** -1699:Src/main.c **** /* TIM7 interrupt Init */ -1700:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1701:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); -1702:Src/main.c **** -1703:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ -1704:Src/main.c **** -1705:Src/main.c **** /* USER CODE END TIM7_Init 1 */ -1706:Src/main.c **** TIM_InitStruct.Prescaler = 919; -1707:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1708:Src/main.c **** TIM_InitStruct.Autoreload = 99; -1709:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); -1710:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); - ARM GAS /tmp/ccEQxcUB.s page 70 +1682:Src/main.c **** /* TIM6 interrupt Init */ +1683:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1684:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); +1685:Src/main.c **** +1686:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ +1687:Src/main.c **** +1688:Src/main.c **** /* USER CODE END TIM6_Init 1 */ +1689:Src/main.c **** TIM_InitStruct.Prescaler = 45999; +1690:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1691:Src/main.c **** TIM_InitStruct.Autoreload = 19; +1692:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); +1693:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); +1694:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); +1695:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); +1696:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ +1697:Src/main.c **** +1698:Src/main.c **** /* USER CODE END TIM6_Init 2 */ +1699:Src/main.c **** +1700:Src/main.c **** } +1701:Src/main.c **** +1702:Src/main.c **** /** +1703:Src/main.c **** * @brief TIM7 Initialization Function +1704:Src/main.c **** * @param None +1705:Src/main.c **** * @retval None +1706:Src/main.c **** */ +1707:Src/main.c **** static void MX_TIM7_Init(void) +1708:Src/main.c **** { +1709:Src/main.c **** +1710:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ + ARM GAS /tmp/ccuHnxNu.s page 70 -1711:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); -1712:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); -1713:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ -1714:Src/main.c **** -1715:Src/main.c **** /* USER CODE END TIM7_Init 2 */ -1716:Src/main.c **** -1717:Src/main.c **** } +1711:Src/main.c **** +1712:Src/main.c **** /* USER CODE END TIM7_Init 0 */ +1713:Src/main.c **** +1714:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1715:Src/main.c **** +1716:Src/main.c **** /* Peripheral clock enable */ +1717:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); 1718:Src/main.c **** -1719:Src/main.c **** /** -1720:Src/main.c **** * @brief TIM8 Initialization Function -1721:Src/main.c **** * @param None -1722:Src/main.c **** * @retval None -1723:Src/main.c **** */ -1724:Src/main.c **** static void MX_TIM8_Init(void) -1725:Src/main.c **** { -1726:Src/main.c **** -1727:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ -1728:Src/main.c **** -1729:Src/main.c **** /* USER CODE END TIM8_Init 0 */ -1730:Src/main.c **** -1731:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1732:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1733:Src/main.c **** -1734:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ -1735:Src/main.c **** -1736:Src/main.c **** /* USER CODE END TIM8_Init 1 */ -1737:Src/main.c **** htim8.Instance = TIM8; -1738:Src/main.c **** htim8.Init.Prescaler = 0; -1739:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; -1740:Src/main.c **** htim8.Init.Period = 91; -1741:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1742:Src/main.c **** htim8.Init.RepetitionCounter = 0; -1743:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1744:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) -1745:Src/main.c **** { -1746:Src/main.c **** Error_Handler(); -1747:Src/main.c **** } -1748:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1749:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) -1750:Src/main.c **** { -1751:Src/main.c **** Error_Handler(); -1752:Src/main.c **** } -1753:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1754:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; -1755:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1756:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) -1757:Src/main.c **** { -1758:Src/main.c **** Error_Handler(); -1759:Src/main.c **** } -1760:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ -1761:Src/main.c **** -1762:Src/main.c **** /* USER CODE END TIM8_Init 2 */ -1763:Src/main.c **** -1764:Src/main.c **** } -1765:Src/main.c **** -1766:Src/main.c **** /** -1767:Src/main.c **** * @brief TIM10 Initialization Function - ARM GAS /tmp/ccEQxcUB.s page 71 +1719:Src/main.c **** /* TIM7 interrupt Init */ +1720:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1721:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); +1722:Src/main.c **** +1723:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1724:Src/main.c **** +1725:Src/main.c **** /* USER CODE END TIM7_Init 1 */ +1726:Src/main.c **** TIM_InitStruct.Prescaler = 919; +1727:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1728:Src/main.c **** TIM_InitStruct.Autoreload = 99; +1729:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); +1730:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); +1731:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); +1732:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); +1733:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ +1734:Src/main.c **** +1735:Src/main.c **** /* USER CODE END TIM7_Init 2 */ +1736:Src/main.c **** +1737:Src/main.c **** } +1738:Src/main.c **** +1739:Src/main.c **** /** +1740:Src/main.c **** * @brief TIM8 Initialization Function +1741:Src/main.c **** * @param None +1742:Src/main.c **** * @retval None +1743:Src/main.c **** */ +1744:Src/main.c **** static void MX_TIM8_Init(void) +1745:Src/main.c **** { +1746:Src/main.c **** +1747:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ +1748:Src/main.c **** +1749:Src/main.c **** /* USER CODE END TIM8_Init 0 */ +1750:Src/main.c **** +1751:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1752:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1753:Src/main.c **** +1754:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ +1755:Src/main.c **** +1756:Src/main.c **** /* USER CODE END TIM8_Init 1 */ +1757:Src/main.c **** htim8.Instance = TIM8; +1758:Src/main.c **** htim8.Init.Prescaler = 0; +1759:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; +1760:Src/main.c **** htim8.Init.Period = 91; +1761:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1762:Src/main.c **** htim8.Init.RepetitionCounter = 0; +1763:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1764:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) +1765:Src/main.c **** { +1766:Src/main.c **** Error_Handler(); +1767:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 71 -1768:Src/main.c **** * @param None -1769:Src/main.c **** * @retval None -1770:Src/main.c **** */ -1771:Src/main.c **** static void MX_TIM10_Init(void) -1772:Src/main.c **** { -1773:Src/main.c **** -1774:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ -1775:Src/main.c **** -1776:Src/main.c **** /* USER CODE END TIM10_Init 0 */ -1777:Src/main.c **** -1778:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ -1779:Src/main.c **** -1780:Src/main.c **** /* USER CODE END TIM10_Init 1 */ -1781:Src/main.c **** htim10.Instance = TIM10; -1782:Src/main.c **** htim10.Init.Prescaler = 183; -1783:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; -1784:Src/main.c **** htim10.Init.Period = 9; -1785:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1786:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1787:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) -1788:Src/main.c **** { -1789:Src/main.c **** Error_Handler(); -1790:Src/main.c **** } -1791:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ -1792:Src/main.c **** -1793:Src/main.c **** /* USER CODE END TIM10_Init 2 */ -1794:Src/main.c **** -1795:Src/main.c **** } -1796:Src/main.c **** -1797:Src/main.c **** /** -1798:Src/main.c **** * @brief TIM11 Initialization Function -1799:Src/main.c **** * @param None -1800:Src/main.c **** * @retval None -1801:Src/main.c **** */ -1802:Src/main.c **** static void MX_TIM11_Init(void) -1803:Src/main.c **** { -1804:Src/main.c **** -1805:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ -1806:Src/main.c **** -1807:Src/main.c **** /* USER CODE END TIM11_Init 0 */ -1808:Src/main.c **** -1809:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1810:Src/main.c **** -1811:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1768:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1769:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) +1770:Src/main.c **** { +1771:Src/main.c **** Error_Handler(); +1772:Src/main.c **** } +1773:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1774:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; +1775:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1776:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) +1777:Src/main.c **** { +1778:Src/main.c **** Error_Handler(); +1779:Src/main.c **** } +1780:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ +1781:Src/main.c **** +1782:Src/main.c **** /* USER CODE END TIM8_Init 2 */ +1783:Src/main.c **** +1784:Src/main.c **** } +1785:Src/main.c **** +1786:Src/main.c **** /** +1787:Src/main.c **** * @brief TIM10 Initialization Function +1788:Src/main.c **** * @param None +1789:Src/main.c **** * @retval None +1790:Src/main.c **** */ +1791:Src/main.c **** static void MX_TIM10_Init(void) +1792:Src/main.c **** { +1793:Src/main.c **** +1794:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ +1795:Src/main.c **** +1796:Src/main.c **** /* USER CODE END TIM10_Init 0 */ +1797:Src/main.c **** +1798:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ +1799:Src/main.c **** +1800:Src/main.c **** /* USER CODE END TIM10_Init 1 */ +1801:Src/main.c **** htim10.Instance = TIM10; +1802:Src/main.c **** htim10.Init.Prescaler = 183; +1803:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; +1804:Src/main.c **** htim10.Init.Period = 9; +1805:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1806:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1807:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) +1808:Src/main.c **** { +1809:Src/main.c **** Error_Handler(); +1810:Src/main.c **** } +1811:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ 1812:Src/main.c **** -1813:Src/main.c **** /* USER CODE END TIM11_Init 1 */ -1814:Src/main.c **** htim11.Instance = TIM11; -1815:Src/main.c **** htim11.Init.Prescaler = 1; -1816:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; -1817:Src/main.c **** htim11.Init.Period = 91; -1818:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1819:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; -1820:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) -1821:Src/main.c **** { -1822:Src/main.c **** Error_Handler(); -1823:Src/main.c **** } -1824:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) - ARM GAS /tmp/ccEQxcUB.s page 72 +1813:Src/main.c **** /* USER CODE END TIM10_Init 2 */ +1814:Src/main.c **** +1815:Src/main.c **** } +1816:Src/main.c **** +1817:Src/main.c **** /** +1818:Src/main.c **** * @brief TIM11 Initialization Function +1819:Src/main.c **** * @param None +1820:Src/main.c **** * @retval None +1821:Src/main.c **** */ +1822:Src/main.c **** static void MX_TIM11_Init(void) +1823:Src/main.c **** { +1824:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 72 -1825:Src/main.c **** { -1826:Src/main.c **** Error_Handler(); -1827:Src/main.c **** } -1828:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1829:Src/main.c **** sConfigOC.Pulse = 91; -1830:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1831:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1832:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1833:Src/main.c **** { -1834:Src/main.c **** Error_Handler(); -1835:Src/main.c **** } -1836:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ -1837:Src/main.c **** -1838:Src/main.c **** /* USER CODE END TIM11_Init 2 */ -1839:Src/main.c **** HAL_TIM_MspPostInit(&htim11); -1840:Src/main.c **** -1841:Src/main.c **** } -1842:Src/main.c **** -1843:Src/main.c **** /** -1844:Src/main.c **** * @brief TIM1 Initialization Function -1845:Src/main.c **** * @param None -1846:Src/main.c **** * @retval None -1847:Src/main.c **** */ -1848:Src/main.c **** static void MX_TIM1_Init(void) -1849:Src/main.c **** { -1850:Src/main.c **** -1851:Src/main.c **** /* USER CODE BEGIN TIM1_Init 0 */ -1852:Src/main.c **** -1853:Src/main.c **** /* USER CODE END TIM1_Init 0 */ -1854:Src/main.c **** -1855:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1856:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1857:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; -1858:Src/main.c **** -1859:Src/main.c **** /* USER CODE BEGIN TIM1_Init 1 */ +1825:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ +1826:Src/main.c **** +1827:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1828:Src/main.c **** +1829:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1830:Src/main.c **** +1831:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1832:Src/main.c **** +1833:Src/main.c **** /* USER CODE END TIM11_Init 1 */ +1834:Src/main.c **** htim11.Instance = TIM11; +1835:Src/main.c **** htim11.Init.Prescaler = 1; +1836:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; +1837:Src/main.c **** htim11.Init.Period = 91; +1838:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1839:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; +1840:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) +1841:Src/main.c **** { +1842:Src/main.c **** Error_Handler(); +1843:Src/main.c **** } +1844:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) +1845:Src/main.c **** { +1846:Src/main.c **** Error_Handler(); +1847:Src/main.c **** } +1848:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1849:Src/main.c **** sConfigOC.Pulse = 91; +1850:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1851:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1852:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) +1853:Src/main.c **** { +1854:Src/main.c **** Error_Handler(); +1855:Src/main.c **** } +1856:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ +1857:Src/main.c **** +1858:Src/main.c **** /* USER CODE END TIM11_Init 2 */ +1859:Src/main.c **** HAL_TIM_MspPostInit(&htim11); 1860:Src/main.c **** -1861:Src/main.c **** /* USER CODE END TIM1_Init 1 */ -1862:Src/main.c **** htim1.Instance = TIM1; -1863:Src/main.c **** htim1.Init.Prescaler = 0; -1864:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; -1865:Src/main.c **** htim1.Init.Period = 8; -1866:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1867:Src/main.c **** htim1.Init.RepetitionCounter = 0; -1868:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1869:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) -1870:Src/main.c **** { -1871:Src/main.c **** Error_Handler(); -1872:Src/main.c **** } -1873:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1874:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) -1875:Src/main.c **** { -1876:Src/main.c **** Error_Handler(); -1877:Src/main.c **** } -1878:Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) -1879:Src/main.c **** { -1880:Src/main.c **** Error_Handler(); -1881:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 73 +1861:Src/main.c **** } +1862:Src/main.c **** +1863:Src/main.c **** /** +1864:Src/main.c **** * @brief TIM1 Initialization Function +1865:Src/main.c **** * @param None +1866:Src/main.c **** * @retval None +1867:Src/main.c **** */ +1868:Src/main.c **** static void MX_TIM1_Init(void) +1869:Src/main.c **** { +1870:Src/main.c **** +1871:Src/main.c **** /* USER CODE BEGIN TIM1_Init 0 */ +1872:Src/main.c **** +1873:Src/main.c **** /* USER CODE END TIM1_Init 0 */ +1874:Src/main.c **** +1875:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1876:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1877:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; +1878:Src/main.c **** +1879:Src/main.c **** /* USER CODE BEGIN TIM1_Init 1 */ +1880:Src/main.c **** +1881:Src/main.c **** /* USER CODE END TIM1_Init 1 */ + ARM GAS /tmp/ccuHnxNu.s page 73 -1882:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1883:Src/main.c **** sConfigOC.Pulse = 4; -1884:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1885:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1886:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1887:Src/main.c **** { -1888:Src/main.c **** Error_Handler(); -1889:Src/main.c **** } -1890:Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; -1891:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; -1892:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; -1893:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; -1894:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; -1895:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; -1896:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; -1897:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; -1898:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; -1899:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; -1900:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; -1901:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) -1902:Src/main.c **** { -1903:Src/main.c **** Error_Handler(); -1904:Src/main.c **** } -1905:Src/main.c **** /* USER CODE BEGIN TIM1_Init 2 */ -1906:Src/main.c **** -1907:Src/main.c **** /* USER CODE END TIM1_Init 2 */ -1908:Src/main.c **** HAL_TIM_MspPostInit(&htim1); -1909:Src/main.c **** -1910:Src/main.c **** } -1911:Src/main.c **** -1912:Src/main.c **** /** -1913:Src/main.c **** * @brief UART8 Initialization Function -1914:Src/main.c **** * @param None -1915:Src/main.c **** * @retval None -1916:Src/main.c **** */ -1917:Src/main.c **** static void MX_UART8_Init(void) -1918:Src/main.c **** { -1919:Src/main.c **** -1920:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ -1921:Src/main.c **** -1922:Src/main.c **** /* USER CODE END UART8_Init 0 */ -1923:Src/main.c **** -1924:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ -1925:Src/main.c **** -1926:Src/main.c **** /* USER CODE END UART8_Init 1 */ -1927:Src/main.c **** huart8.Instance = UART8; -1928:Src/main.c **** huart8.Init.BaudRate = 115200; -1929:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; -1930:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; -1931:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; -1932:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; -1933:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; -1934:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; -1935:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; -1936:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; -1937:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) -1938:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 74 +1882:Src/main.c **** htim1.Instance = TIM1; +1883:Src/main.c **** htim1.Init.Prescaler = 0; +1884:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; +1885:Src/main.c **** htim1.Init.Period = 8; +1886:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1887:Src/main.c **** htim1.Init.RepetitionCounter = 0; +1888:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1889:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) +1890:Src/main.c **** { +1891:Src/main.c **** Error_Handler(); +1892:Src/main.c **** } +1893:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1894:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) +1895:Src/main.c **** { +1896:Src/main.c **** Error_Handler(); +1897:Src/main.c **** } +1898:Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) +1899:Src/main.c **** { +1900:Src/main.c **** Error_Handler(); +1901:Src/main.c **** } +1902:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1903:Src/main.c **** sConfigOC.Pulse = 4; +1904:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1905:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1906:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) +1907:Src/main.c **** { +1908:Src/main.c **** Error_Handler(); +1909:Src/main.c **** } +1910:Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; +1911:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; +1912:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; +1913:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; +1914:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; +1915:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; +1916:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; +1917:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; +1918:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; +1919:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; +1920:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; +1921:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) +1922:Src/main.c **** { +1923:Src/main.c **** Error_Handler(); +1924:Src/main.c **** } +1925:Src/main.c **** /* USER CODE BEGIN TIM1_Init 2 */ +1926:Src/main.c **** +1927:Src/main.c **** /* USER CODE END TIM1_Init 2 */ +1928:Src/main.c **** HAL_TIM_MspPostInit(&htim1); +1929:Src/main.c **** +1930:Src/main.c **** } +1931:Src/main.c **** +1932:Src/main.c **** /** +1933:Src/main.c **** * @brief UART8 Initialization Function +1934:Src/main.c **** * @param None +1935:Src/main.c **** * @retval None +1936:Src/main.c **** */ +1937:Src/main.c **** static void MX_UART8_Init(void) +1938:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 74 -1939:Src/main.c **** Error_Handler(); -1940:Src/main.c **** } -1941:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ -1942:Src/main.c **** -1943:Src/main.c **** /* USER CODE END UART8_Init 2 */ -1944:Src/main.c **** -1945:Src/main.c **** } -1946:Src/main.c **** -1947:Src/main.c **** /** -1948:Src/main.c **** * @brief USART1 Initialization Function -1949:Src/main.c **** * @param None -1950:Src/main.c **** * @retval None -1951:Src/main.c **** */ -1952:Src/main.c **** static void MX_USART1_UART_Init(void) -1953:Src/main.c **** { -1954:Src/main.c **** -1955:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ -1956:Src/main.c **** -1957:Src/main.c **** /* USER CODE END USART1_Init 0 */ -1958:Src/main.c **** -1959:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; -1960:Src/main.c **** -1961:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1962:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; -1963:Src/main.c **** -1964:Src/main.c **** /** Initializes the peripherals clock -1965:Src/main.c **** */ -1966:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; -1967:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; -1968:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) -1969:Src/main.c **** { -1970:Src/main.c **** Error_Handler(); -1971:Src/main.c **** } -1972:Src/main.c **** -1973:Src/main.c **** /* Peripheral clock enable */ -1974:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); -1975:Src/main.c **** -1976:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1977:Src/main.c **** /**USART1 GPIO Configuration -1978:Src/main.c **** PA9 ------> USART1_TX -1979:Src/main.c **** PA10 ------> USART1_RX -1980:Src/main.c **** */ -1981:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; -1982:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1983:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1984:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1985:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1986:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1987:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1988:Src/main.c **** -1989:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; -1990:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1991:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1992:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1993:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1994:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1995:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - ARM GAS /tmp/ccEQxcUB.s page 75 +1939:Src/main.c **** +1940:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ +1941:Src/main.c **** +1942:Src/main.c **** /* USER CODE END UART8_Init 0 */ +1943:Src/main.c **** +1944:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ +1945:Src/main.c **** +1946:Src/main.c **** /* USER CODE END UART8_Init 1 */ +1947:Src/main.c **** huart8.Instance = UART8; +1948:Src/main.c **** huart8.Init.BaudRate = 115200; +1949:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; +1950:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; +1951:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; +1952:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; +1953:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; +1954:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; +1955:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; +1956:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +1957:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) +1958:Src/main.c **** { +1959:Src/main.c **** Error_Handler(); +1960:Src/main.c **** } +1961:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ +1962:Src/main.c **** +1963:Src/main.c **** /* USER CODE END UART8_Init 2 */ +1964:Src/main.c **** +1965:Src/main.c **** } +1966:Src/main.c **** +1967:Src/main.c **** /** +1968:Src/main.c **** * @brief USART1 Initialization Function +1969:Src/main.c **** * @param None +1970:Src/main.c **** * @retval None +1971:Src/main.c **** */ +1972:Src/main.c **** static void MX_USART1_UART_Init(void) +1973:Src/main.c **** { +1974:Src/main.c **** +1975:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ +1976:Src/main.c **** +1977:Src/main.c **** /* USER CODE END USART1_Init 0 */ +1978:Src/main.c **** +1979:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; +1980:Src/main.c **** +1981:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1982:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; +1983:Src/main.c **** +1984:Src/main.c **** /** Initializes the peripherals clock +1985:Src/main.c **** */ +1986:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; +1987:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; +1988:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) +1989:Src/main.c **** { +1990:Src/main.c **** Error_Handler(); +1991:Src/main.c **** } +1992:Src/main.c **** +1993:Src/main.c **** /* Peripheral clock enable */ +1994:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +1995:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 75 -1996:Src/main.c **** -1997:Src/main.c **** /* USART1 DMA Init */ -1998:Src/main.c **** -1999:Src/main.c **** /* USART1_TX Init */ -2000:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); -2001:Src/main.c **** -2002:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); -2003:Src/main.c **** -2004:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); -2005:Src/main.c **** -2006:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); -2007:Src/main.c **** -2008:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); -2009:Src/main.c **** -2010:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); -2011:Src/main.c **** -2012:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); -2013:Src/main.c **** -2014:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); -2015:Src/main.c **** -2016:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); -2017:Src/main.c **** -2018:Src/main.c **** /* USART1 interrupt Init */ -2019:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -2020:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); +1996:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1997:Src/main.c **** /**USART1 GPIO Configuration +1998:Src/main.c **** PA9 ------> USART1_TX +1999:Src/main.c **** PA10 ------> USART1_RX +2000:Src/main.c **** */ +2001:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; +2002:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +2003:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +2004:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +2005:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +2006:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +2007:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +2008:Src/main.c **** +2009:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; +2010:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +2011:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +2012:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +2013:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +2014:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +2015:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +2016:Src/main.c **** +2017:Src/main.c **** /* USART1 DMA Init */ +2018:Src/main.c **** +2019:Src/main.c **** /* USART1_TX Init */ +2020:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); 2021:Src/main.c **** -2022:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +2022:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); 2023:Src/main.c **** -2024:Src/main.c **** /* USER CODE END USART1_Init 1 */ -2025:Src/main.c **** USART_InitStruct.BaudRate = 115200; -2026:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; -2027:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; -2028:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; -2029:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; -2030:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; -2031:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; -2032:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); -2033:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); -2034:Src/main.c **** LL_USART_Enable(USART1); -2035:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ -2036:Src/main.c **** -2037:Src/main.c **** /* USER CODE END USART1_Init 2 */ -2038:Src/main.c **** -2039:Src/main.c **** } -2040:Src/main.c **** -2041:Src/main.c **** /** -2042:Src/main.c **** * Enable DMA controller clock -2043:Src/main.c **** */ -2044:Src/main.c **** static void MX_DMA_Init(void) -2045:Src/main.c **** { - 144 .loc 1 2045 1 is_stmt 1 view -0 +2024:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); +2025:Src/main.c **** +2026:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); +2027:Src/main.c **** +2028:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); +2029:Src/main.c **** +2030:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); +2031:Src/main.c **** +2032:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +2033:Src/main.c **** +2034:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); +2035:Src/main.c **** +2036:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +2037:Src/main.c **** +2038:Src/main.c **** /* USART1 interrupt Init */ +2039:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +2040:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); +2041:Src/main.c **** +2042:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +2043:Src/main.c **** +2044:Src/main.c **** /* USER CODE END USART1_Init 1 */ +2045:Src/main.c **** USART_InitStruct.BaudRate = 115200; +2046:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; +2047:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; +2048:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; +2049:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; +2050:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; +2051:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; +2052:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + ARM GAS /tmp/ccuHnxNu.s page 76 + + +2053:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); +2054:Src/main.c **** LL_USART_Enable(USART1); +2055:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ +2056:Src/main.c **** +2057:Src/main.c **** /* USER CODE END USART1_Init 2 */ +2058:Src/main.c **** +2059:Src/main.c **** } +2060:Src/main.c **** +2061:Src/main.c **** /** +2062:Src/main.c **** * Enable DMA controller clock +2063:Src/main.c **** */ +2064:Src/main.c **** static void MX_DMA_Init(void) +2065:Src/main.c **** { + 144 .loc 1 2065 1 is_stmt 1 view -0 145 .cfi_startproc 146 @ args = 0, pretend = 0, frame = 8 147 @ frame_needed = 0, uses_anonymous_args = 0 148 0000 00B5 push {lr} 149 .LCFI1: 150 .cfi_def_cfa_offset 4 - ARM GAS /tmp/ccEQxcUB.s page 76 - - 151 .cfi_offset 14, -4 152 0002 83B0 sub sp, sp, #12 153 .LCFI2: 154 .cfi_def_cfa_offset 16 -2046:Src/main.c **** -2047:Src/main.c **** /* Init with LL driver */ -2048:Src/main.c **** /* DMA controller clock enable */ -2049:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); - 155 .loc 1 2049 3 view .LVU37 +2066:Src/main.c **** +2067:Src/main.c **** /* Init with LL driver */ +2068:Src/main.c **** /* DMA controller clock enable */ +2069:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); + 155 .loc 1 2069 3 view .LVU37 156 .LVL8: - 157 .LBB351: - 158 .LBI351: + 157 .LBB352: + 158 .LBI352: 159 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** @@ -4538,6 +4558,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @endverbatim 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @attention + ARM GAS /tmp/ccuHnxNu.s page 77 + + 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * Copyright (c) 2017 STMicroelectronics. 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * All rights reserved. @@ -4558,9 +4581,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/ 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #include "stm32f7xx.h" - ARM GAS /tmp/ccEQxcUB.s page 77 - - 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ @@ -4598,6 +4618,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(GPIOJ) 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_GPIOJ RCC_AHB1ENR_GPIOJEN 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* GPIOJ */ + ARM GAS /tmp/ccuHnxNu.s page 78 + + 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(GPIOK) 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_GPIOK RCC_AHB1ENR_GPIOKEN 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* GPIOK */ @@ -4618,9 +4641,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHS RCC_AHB1ENR_OTGHSEN 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHSULPI RCC_AHB1ENR_OTGHSULPIEN 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_AXI RCC_AHB1LPENR_AXILPEN - ARM GAS /tmp/ccEQxcUB.s page 78 - - 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN @@ -4658,6 +4678,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB3_GRP1_PERIPH_ALL 0xFFFFFFFFU 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB3_GRP1_PERIPH_FMC RCC_AHB3ENR_FMCEN + ARM GAS /tmp/ccuHnxNu.s page 79 + + 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB3_GRP1_PERIPH_QSPI RCC_AHB3ENR_QSPIEN 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} @@ -4678,9 +4701,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM14 RCC_APB1ENR_TIM14EN 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN - ARM GAS /tmp/ccEQxcUB.s page 79 - - 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX) @@ -4718,6 +4738,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH + ARM GAS /tmp/ccuHnxNu.s page 80 + + 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ALL 0xFFFFFFFFU @@ -4738,9 +4761,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM9 RCC_APB2ENR_TIM9EN 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN - ARM GAS /tmp/ccEQxcUB.s page 80 - - 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6) 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN @@ -4778,6 +4798,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB1 AHB1 + ARM GAS /tmp/ccuHnxNu.s page 81 + + 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -4798,9 +4821,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_EnableClock\n 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_EnableClock\n 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n - ARM GAS /tmp/ccEQxcUB.s page 81 - - 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n @@ -4838,8 +4858,11 @@ ARM GAS /tmp/ccEQxcUB.s page 1 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) + ARM GAS /tmp/ccuHnxNu.s page 82 + + 160 .loc 3 309 22 view .LVU38 - 161 .LBB352: + 161 .LBB353: 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; 162 .loc 3 311 3 view .LVU39 @@ -4858,46 +4881,46 @@ ARM GAS /tmp/ccEQxcUB.s page 1 172 .loc 3 314 10 view .LVU43 173 0014 0193 str r3, [sp, #4] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - ARM GAS /tmp/ccEQxcUB.s page 82 - - 174 .loc 3 315 3 is_stmt 1 view .LVU44 175 0016 019B ldr r3, [sp, #4] 176 .LVL9: 177 .loc 3 315 3 is_stmt 0 view .LVU45 - 178 .LBE352: - 179 .LBE351: -2050:Src/main.c **** -2051:Src/main.c **** /* DMA interrupt init */ -2052:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ -2053:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); - 180 .loc 1 2053 3 is_stmt 1 view .LVU46 - 181 .LBB353: - 182 .LBI353: + 178 .LBE353: + 179 .LBE352: +2070:Src/main.c **** +2071:Src/main.c **** /* DMA interrupt init */ +2072:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ +2073:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + 180 .loc 1 2073 3 is_stmt 1 view .LVU46 + 181 .LBB354: + 182 .LBI354: 1884:Drivers/CMSIS/Include/core_cm7.h **** { 183 .loc 2 1884 26 view .LVU47 - 184 .LBB354: + 184 .LBB355: 1886:Drivers/CMSIS/Include/core_cm7.h **** } 185 .loc 2 1886 3 view .LVU48 1886:Drivers/CMSIS/Include/core_cm7.h **** } 186 .loc 2 1886 26 is_stmt 0 view .LVU49 187 0018 094B ldr r3, .L10+4 188 001a D868 ldr r0, [r3, #12] - 189 .LBE354: - 190 .LBE353: - 191 .loc 1 2053 3 discriminator 1 view .LVU50 + 189 .LBE355: + 190 .LBE354: + 191 .loc 1 2073 3 discriminator 1 view .LVU50 192 001c 0022 movs r2, #0 193 001e 1146 mov r1, r2 194 0020 C0F30220 ubfx r0, r0, #8, #3 195 0024 FFF7FEFF bl NVIC_EncodePriority 196 .LVL10: - 197 .LBB355: - 198 .LBI355: + 197 .LBB356: + 198 .LBI356: 2024:Drivers/CMSIS/Include/core_cm7.h **** { 199 .loc 2 2024 22 is_stmt 1 view .LVU51 - 200 .LBB356: + 200 .LBB357: 2026:Drivers/CMSIS/Include/core_cm7.h **** { 201 .loc 2 2026 3 view .LVU52 + ARM GAS /tmp/ccuHnxNu.s page 83 + + 2028:Drivers/CMSIS/Include/core_cm7.h **** } 202 .loc 2 2028 5 view .LVU53 2028:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4914,18 +4937,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 211 .LVL12: 2028:Drivers/CMSIS/Include/core_cm7.h **** } 212 .loc 2 2028 47 view .LVU57 - 213 .LBE356: - 214 .LBE355: -2054:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 215 .loc 1 2054 3 is_stmt 1 view .LVU58 - ARM GAS /tmp/ccEQxcUB.s page 83 - - - 216 .LBB357: - 217 .LBI357: + 213 .LBE357: + 214 .LBE356: +2074:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 215 .loc 1 2074 3 is_stmt 1 view .LVU58 + 216 .LBB358: + 217 .LBI358: 1896:Drivers/CMSIS/Include/core_cm7.h **** { 218 .loc 2 1896 22 view .LVU59 - 219 .LBB358: + 219 .LBB359: 1898:Drivers/CMSIS/Include/core_cm7.h **** { 220 .loc 2 1898 3 view .LVU60 1900:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4937,11 +4957,11 @@ ARM GAS /tmp/ccEQxcUB.s page 1 225 .LVL13: 1900:Drivers/CMSIS/Include/core_cm7.h **** } 226 .loc 2 1900 43 view .LVU63 - 227 .LBE358: - 228 .LBE357: -2055:Src/main.c **** -2056:Src/main.c **** } - 229 .loc 1 2056 1 view .LVU64 + 227 .LBE359: + 228 .LBE358: +2075:Src/main.c **** +2076:Src/main.c **** } + 229 .loc 1 2076 1 view .LVU64 230 0036 03B0 add sp, sp, #12 231 .LCFI3: 232 .cfi_def_cfa_offset 4 @@ -4958,831 +4978,830 @@ ARM GAS /tmp/ccEQxcUB.s page 1 244 .section .text.Decode_task,"ax",%progbits 245 .align 1 246 .syntax unified + ARM GAS /tmp/ccuHnxNu.s page 84 + + 247 .thumb 248 .thumb_func 250 Decode_task: 251 .LVL14: 252 .LFB1210: -2057:Src/main.c **** -2058:Src/main.c **** /** -2059:Src/main.c **** * @brief GPIO Initialization Function -2060:Src/main.c **** * @param None -2061:Src/main.c **** * @retval None -2062:Src/main.c **** */ -2063:Src/main.c **** static void MX_GPIO_Init(void) -2064:Src/main.c **** { -2065:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; -2066:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ -2067:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ -2068:Src/main.c **** -2069:Src/main.c **** /* GPIO Ports Clock Enable */ -2070:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); -2071:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); - ARM GAS /tmp/ccEQxcUB.s page 84 - - -2072:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); -2073:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); -2074:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); -2075:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); -2076:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); -2077:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); -2078:Src/main.c **** -2079:Src/main.c **** /*Configure GPIO pin Output Level */ -2080:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -2081:Src/main.c **** -2082:Src/main.c **** /*Configure GPIO pin Output Level */ -2083:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); -2084:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); -2085:Src/main.c **** -2086:Src/main.c **** /*Configure GPIO pin Output Level */ -2087:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); +2077:Src/main.c **** +2078:Src/main.c **** /** +2079:Src/main.c **** * @brief GPIO Initialization Function +2080:Src/main.c **** * @param None +2081:Src/main.c **** * @retval None +2082:Src/main.c **** */ +2083:Src/main.c **** static void MX_GPIO_Init(void) +2084:Src/main.c **** { +2085:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; +2086:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ +2087:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ 2088:Src/main.c **** -2089:Src/main.c **** /*Configure GPIO pin Output Level */ -2090:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); -2091:Src/main.c **** -2092:Src/main.c **** /*Configure GPIO pin Output Level */ -2093:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -2094:Src/main.c **** HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET); -2095:Src/main.c **** -2096:Src/main.c **** /*Configure GPIO pin Output Level */ -2097:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2089:Src/main.c **** /* GPIO Ports Clock Enable */ +2090:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); +2091:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); +2092:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); +2093:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); +2094:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); +2095:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); +2096:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); +2097:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); 2098:Src/main.c **** 2099:Src/main.c **** /*Configure GPIO pin Output Level */ -2100:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin -2101:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); -2102:Src/main.c **** -2103:Src/main.c **** /*Configure GPIO pin Output Level */ -2104:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2105:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2106:Src/main.c **** -2107:Src/main.c **** /*Configure GPIO pin Output Level */ -2108:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); -2109:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2110:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); +2100:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +2101:Src/main.c **** +2102:Src/main.c **** /*Configure GPIO pin Output Level */ +2103:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); +2104:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +2105:Src/main.c **** +2106:Src/main.c **** /*Configure GPIO pin Output Level */ +2107:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); +2108:Src/main.c **** +2109:Src/main.c **** /*Configure GPIO pin Output Level */ +2110:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); 2111:Src/main.c **** 2112:Src/main.c **** /*Configure GPIO pin Output Level */ -2113:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -2114:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); +2113:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +2114:Src/main.c **** HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET); 2115:Src/main.c **** -2116:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ -2117:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; -2118:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2119:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; -2120:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -2121:Src/main.c **** -2122:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ -2123:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; -2124:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2125:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2126:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2127:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -2128:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 85 +2116:Src/main.c **** /*Configure GPIO pin Output Level */ +2117:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2118:Src/main.c **** +2119:Src/main.c **** /*Configure GPIO pin Output Level */ +2120:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin +2121:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); +2122:Src/main.c **** +2123:Src/main.c **** /*Configure GPIO pin Output Level */ +2124:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +2125:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2126:Src/main.c **** +2127:Src/main.c **** /*Configure GPIO pin Output Level */ +2128:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); + ARM GAS /tmp/ccuHnxNu.s page 85 -2129:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */ -2130:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin; -2131:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2132:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2133:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2134:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); +2129:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2130:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); +2131:Src/main.c **** +2132:Src/main.c **** /*Configure GPIO pin Output Level */ +2133:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin +2134:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); 2135:Src/main.c **** -2136:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ -2137:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; -2138:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2139:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2140:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -2141:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); -2142:Src/main.c **** -2143:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin -2144:Src/main.c **** DAC_LD2_CS_Pin */ -2145:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin -2146:Src/main.c **** |DAC_LD2_CS_Pin; -2147:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2148:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2149:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2150:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -2151:Src/main.c **** -2152:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ -2153:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; -2154:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2155:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2156:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -2157:Src/main.c **** -2158:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ -2159:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; -2160:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2161:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2162:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2163:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); -2164:Src/main.c **** -2165:Src/main.c **** /*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */ -2166:Src/main.c **** GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin; -2167:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; -2168:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2169:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2170:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); -2171:Src/main.c **** -2172:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ -2173:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; -2174:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2175:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2176:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -2177:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); -2178:Src/main.c **** -2179:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin -2180:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ -2181:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin -2182:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; -2183:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2184:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2185:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - ARM GAS /tmp/ccEQxcUB.s page 86 +2136:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ +2137:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; +2138:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +2139:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; +2140:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +2141:Src/main.c **** +2142:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ +2143:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; +2144:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2145:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2146:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2147:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +2148:Src/main.c **** +2149:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */ +2150:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin; +2151:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2152:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2153:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2154:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); +2155:Src/main.c **** +2156:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ +2157:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; +2158:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2159:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2160:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +2161:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); +2162:Src/main.c **** +2163:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_LD2_CS_Pin */ +2164:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin; +2165:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2166:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2167:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2168:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +2169:Src/main.c **** +2170:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ +2171:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; +2172:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +2173:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2174:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +2175:Src/main.c **** +2176:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin DAC_TEC2_CS_Pin */ +2177:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin|DAC_TEC2_CS_Pin; +2178:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2179:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2180:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2181:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); +2182:Src/main.c **** +2183:Src/main.c **** /*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */ +2184:Src/main.c **** GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin; +2185:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + ARM GAS /tmp/ccuHnxNu.s page 86 -2186:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); -2187:Src/main.c **** -2188:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin -2189:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS -2190:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2191:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2192:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2193:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); -2194:Src/main.c **** -2195:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ -2196:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; -2197:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2198:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2199:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); -2200:Src/main.c **** -2201:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ -2202:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; -2203:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2204:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2205:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); -2206:Src/main.c **** -2207:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin -2208:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ -2209:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -2210:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; -2211:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2212:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2213:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2214:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); -2215:Src/main.c **** -2216:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ -2217:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ -2218:Src/main.c **** } -2219:Src/main.c **** -2220:Src/main.c **** /* USER CODE BEGIN 4 */ -2221:Src/main.c **** -2222:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { -2223:Src/main.c **** -2224:Src/main.c **** // UART_transmission_request = NO_MESS; -2225:Src/main.c **** -2226:Src/main.c **** //} -2227:Src/main.c **** -2228:Src/main.c **** static void Init_params(void) -2229:Src/main.c **** { -2230:Src/main.c **** TO6 = 0; -2231:Src/main.c **** TO7 = 0; -2232:Src/main.c **** TO7_before = 0; -2233:Src/main.c **** TO6_before = 0; -2234:Src/main.c **** TO6_uart = 0; -2235:Src/main.c **** flg_tmt = 0; -2236:Src/main.c **** UART_rec_incr = 0; -2237:Src/main.c **** fgoto = 0; -2238:Src/main.c **** sizeoffile = 0; -2239:Src/main.c **** u_tx_flg = 0; -2240:Src/main.c **** u_rx_flg = 0; -2241:Src/main.c **** //State_Data[0]=0; -2242:Src/main.c **** //State_Data[1]=0;//All OK! - ARM GAS /tmp/ccEQxcUB.s page 87 +2186:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2187:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2188:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); +2189:Src/main.c **** +2190:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ +2191:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; +2192:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2193:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2194:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +2195:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); +2196:Src/main.c **** +2197:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin +2198:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ +2199:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin +2200:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; +2201:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2202:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2203:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2204:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); +2205:Src/main.c **** +2206:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin +2207:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS +2208:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2209:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2210:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2211:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); +2212:Src/main.c **** +2213:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ +2214:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; +2215:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +2216:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2217:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); +2218:Src/main.c **** +2219:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ +2220:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; +2221:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +2222:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2223:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); +2224:Src/main.c **** +2225:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin +2226:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ +2227:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin +2228:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; +2229:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2230:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2231:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2232:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); +2233:Src/main.c **** +2234:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ +2235:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ +2236:Src/main.c **** } +2237:Src/main.c **** +2238:Src/main.c **** /* USER CODE BEGIN 4 */ +2239:Src/main.c **** +2240:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { +2241:Src/main.c **** +2242:Src/main.c **** // UART_transmission_request = NO_MESS; + ARM GAS /tmp/ccuHnxNu.s page 87 -2243:Src/main.c **** for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01; -2397:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; -2398:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; -2399:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; -2400:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; -2401:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; -2402:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; -2403:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; -2404:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; -2405:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; -2406:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; -2407:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; -2408:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; -2409:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; -2410:Src/main.c **** -2411:Src/main.c **** temp2++; -2412:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2413:Src/main.c **** temp2++; - ARM GAS /tmp/ccEQxcUB.s page 90 +2395:Src/main.c **** //------------------------------------------------------------------------------------------------ +2396:Src/main.c **** +2397:Src/main.c **** +2398:Src/main.c **** test=0; +2399:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& +2400:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u +2401:Src/main.c **** { +2402:Src/main.c **** test = Mount_SD("/"); +2403:Src/main.c **** if (test == 0) //0 - suc +2404:Src/main.c **** { +2405:Src/main.c **** //Format_SD(); +2406:Src/main.c **** test = Remove_File ("COMMAND.TXT"); +2407:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ +2408:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2409:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2410:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2411:Src/main.c **** } +2412:Src/main.c **** } +2413:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 90 -2414:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2415:Src/main.c **** temp2++; -2416:Src/main.c **** temp2++; -2417:Src/main.c **** temp2++; -2418:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); -2419:Src/main.c **** temp2++; -2420:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2421:Src/main.c **** temp2++; -2422:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2423:Src/main.c **** temp2++; -2424:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2425:Src/main.c **** temp2++; -2426:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2427:Src/main.c **** temp2++; -2428:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID -2429:Src/main.c **** temp2++; -2430:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); -2431:Src/main.c **** temp2++; -2432:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); -2433:Src/main.c **** temp2++; -2434:Src/main.c **** -2435:Src/main.c **** if (Curr_setup->U5V1_EN) -2436:Src/main.c **** { -2437:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); -2438:Src/main.c **** } -2439:Src/main.c **** else -2440:Src/main.c **** { -2441:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); -2442:Src/main.c **** } -2443:Src/main.c **** -2444:Src/main.c **** if (Curr_setup->U5V2_EN) -2445:Src/main.c **** { -2446:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); -2447:Src/main.c **** } -2448:Src/main.c **** else -2449:Src/main.c **** { -2450:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); -2451:Src/main.c **** } -2452:Src/main.c **** -2453:Src/main.c **** if (Curr_setup->LD1_EN) -2454:Src/main.c **** { -2455:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); -2456:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2414:Src/main.c **** temp2 = (uint16_t *)Command; +2415:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; +2416:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; +2417:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; +2418:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; +2419:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; +2420:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; +2421:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; +2422:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; +2423:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; +2424:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; +2425:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; +2426:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; +2427:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; +2428:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; +2429:Src/main.c **** +2430:Src/main.c **** temp2++; +2431:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2432:Src/main.c **** temp2++; +2433:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2434:Src/main.c **** temp2++; +2435:Src/main.c **** temp2++; +2436:Src/main.c **** temp2++; +2437:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); +2438:Src/main.c **** temp2++; +2439:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2440:Src/main.c **** temp2++; +2441:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2442:Src/main.c **** temp2++; +2443:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2444:Src/main.c **** temp2++; +2445:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2446:Src/main.c **** temp2++; +2447:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID +2448:Src/main.c **** temp2++; +2449:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); +2450:Src/main.c **** temp2++; +2451:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); +2452:Src/main.c **** temp2++; +2453:Src/main.c **** +2454:Src/main.c **** if (Curr_setup->U5V1_EN) +2455:Src/main.c **** { +2456:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); 2457:Src/main.c **** } 2458:Src/main.c **** else 2459:Src/main.c **** { -2460:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); -2461:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC -2462:Src/main.c **** } -2463:Src/main.c **** -2464:Src/main.c **** if (Curr_setup->LD2_EN) -2465:Src/main.c **** { -2466:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); -2467:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC -2468:Src/main.c **** } -2469:Src/main.c **** else -2470:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 91 +2460:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2461:Src/main.c **** } +2462:Src/main.c **** +2463:Src/main.c **** if (Curr_setup->U5V2_EN) +2464:Src/main.c **** { +2465:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); +2466:Src/main.c **** } +2467:Src/main.c **** else +2468:Src/main.c **** { +2469:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2470:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 91 -2471:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); -2472:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC -2473:Src/main.c **** } -2474:Src/main.c **** -2475:Src/main.c **** if (Curr_setup->REF1_EN) -2476:Src/main.c **** { -2477:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); -2478:Src/main.c **** } -2479:Src/main.c **** else -2480:Src/main.c **** { -2481:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); -2482:Src/main.c **** } -2483:Src/main.c **** -2484:Src/main.c **** if (Curr_setup->REF2_EN) -2485:Src/main.c **** { -2486:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2471:Src/main.c **** +2472:Src/main.c **** if (Curr_setup->LD1_EN) +2473:Src/main.c **** { +2474:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); +2475:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2476:Src/main.c **** } +2477:Src/main.c **** else +2478:Src/main.c **** { +2479:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2480:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC +2481:Src/main.c **** } +2482:Src/main.c **** +2483:Src/main.c **** if (Curr_setup->LD2_EN) +2484:Src/main.c **** { +2485:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); +2486:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC 2487:Src/main.c **** } 2488:Src/main.c **** else 2489:Src/main.c **** { -2490:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); -2491:Src/main.c **** } -2492:Src/main.c **** -2493:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) -2494:Src/main.c **** { -2495:Src/main.c **** Set_LTEC(3,32767); -2496:Src/main.c **** Set_LTEC(3,32767); -2497:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); -2498:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); -2499:Src/main.c **** } -2500:Src/main.c **** else -2501:Src/main.c **** { -2502:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); -2503:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); -2504:Src/main.c **** } -2505:Src/main.c **** -2506:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) -2507:Src/main.c **** { -2508:Src/main.c **** Set_LTEC(4,32767); -2509:Src/main.c **** Set_LTEC(4,32767); -2510:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); -2511:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); -2512:Src/main.c **** } -2513:Src/main.c **** else -2514:Src/main.c **** { -2515:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); -2516:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); -2517:Src/main.c **** } -2518:Src/main.c **** -2519:Src/main.c **** if (Curr_setup->PI1_RD==0) +2490:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2491:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC +2492:Src/main.c **** } +2493:Src/main.c **** +2494:Src/main.c **** if (Curr_setup->REF1_EN) +2495:Src/main.c **** { +2496:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); +2497:Src/main.c **** } +2498:Src/main.c **** else +2499:Src/main.c **** { +2500:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2501:Src/main.c **** } +2502:Src/main.c **** +2503:Src/main.c **** if (Curr_setup->REF2_EN) +2504:Src/main.c **** { +2505:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2506:Src/main.c **** } +2507:Src/main.c **** else +2508:Src/main.c **** { +2509:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2510:Src/main.c **** } +2511:Src/main.c **** +2512:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) +2513:Src/main.c **** { +2514:Src/main.c **** Set_LTEC(3,32767); +2515:Src/main.c **** Set_LTEC(3,32767); +2516:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); +2517:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); +2518:Src/main.c **** } +2519:Src/main.c **** else 2520:Src/main.c **** { -2521:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; -2522:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2521:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2522:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); 2523:Src/main.c **** } 2524:Src/main.c **** -2525:Src/main.c **** if (Curr_setup->PI2_RD==0) +2525:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) 2526:Src/main.c **** { -2527:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; - ARM GAS /tmp/ccEQxcUB.s page 92 +2527:Src/main.c **** Set_LTEC(4,32767); + ARM GAS /tmp/ccuHnxNu.s page 92 -2528:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; -2529:Src/main.c **** } -2530:Src/main.c **** } -2531:Src/main.c **** -2532:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ -2533:Src/main.c **** { - 253 .loc 1 2533 1 is_stmt 1 view -0 +2528:Src/main.c **** Set_LTEC(4,32767); +2529:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); +2530:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); +2531:Src/main.c **** } +2532:Src/main.c **** else +2533:Src/main.c **** { +2534:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2535:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2536:Src/main.c **** } +2537:Src/main.c **** +2538:Src/main.c **** if (Curr_setup->PI1_RD==0) +2539:Src/main.c **** { +2540:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; +2541:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2542:Src/main.c **** } +2543:Src/main.c **** +2544:Src/main.c **** if (Curr_setup->PI2_RD==0) +2545:Src/main.c **** { +2546:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; +2547:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; +2548:Src/main.c **** } +2549:Src/main.c **** } +2550:Src/main.c **** +2551:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2552:Src/main.c **** { + 253 .loc 1 2552 1 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 8 256 @ frame_needed = 0, uses_anonymous_args = 0 257 @ link register save eliminated. - 258 .loc 1 2533 1 is_stmt 0 view .LVU66 + 258 .loc 1 2552 1 is_stmt 0 view .LVU66 259 0000 82B0 sub sp, sp, #8 260 .LCFI4: 261 .cfi_def_cfa_offset 8 -2534:Src/main.c **** uint16_t *temp2; - 262 .loc 1 2534 2 is_stmt 1 view .LVU67 -2535:Src/main.c **** -2536:Src/main.c **** temp2 = (uint16_t *)Command; - 263 .loc 1 2536 2 view .LVU68 +2553:Src/main.c **** uint16_t *temp2; + 262 .loc 1 2553 2 is_stmt 1 view .LVU67 +2554:Src/main.c **** +2555:Src/main.c **** temp2 = (uint16_t *)Command; + 263 .loc 1 2555 2 view .LVU68 264 .LVL15: -2537:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 265 .loc 1 2537 2 view .LVU69 - 266 .loc 1 2537 36 is_stmt 0 view .LVU70 +2556:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 265 .loc 1 2556 2 view .LVU69 + 266 .loc 1 2556 36 is_stmt 0 view .LVU70 267 0002 0288 ldrh r2, [r0] 268 .LVL16: - 269 .loc 1 2537 48 view .LVU71 + 269 .loc 1 2556 48 view .LVU71 270 0004 02F00102 and r2, r2, #1 - 271 .loc 1 2537 22 view .LVU72 + 271 .loc 1 2556 22 view .LVU72 272 0008 1A70 strb r2, [r3] -2538:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 273 .loc 1 2538 2 is_stmt 1 view .LVU73 - 274 .loc 1 2538 36 is_stmt 0 view .LVU74 +2557:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 273 .loc 1 2557 2 is_stmt 1 view .LVU73 + 274 .loc 1 2557 36 is_stmt 0 view .LVU74 275 000a 0288 ldrh r2, [r0] - 276 .loc 1 2538 48 view .LVU75 + 276 .loc 1 2557 48 view .LVU75 277 000c C2F34002 ubfx r2, r2, #1, #1 - 278 .loc 1 2538 22 view .LVU76 + 278 .loc 1 2557 22 view .LVU76 279 0010 5A70 strb r2, [r3, #1] -2539:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 280 .loc 1 2539 2 is_stmt 1 view .LVU77 - 281 .loc 1 2539 36 is_stmt 0 view .LVU78 + ARM GAS /tmp/ccuHnxNu.s page 93 + + +2558:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 280 .loc 1 2558 2 is_stmt 1 view .LVU77 + 281 .loc 1 2558 36 is_stmt 0 view .LVU78 282 0012 0288 ldrh r2, [r0] - 283 .loc 1 2539 48 view .LVU79 + 283 .loc 1 2558 48 view .LVU79 284 0014 C2F38002 ubfx r2, r2, #2, #1 - 285 .loc 1 2539 22 view .LVU80 + 285 .loc 1 2558 22 view .LVU80 286 0018 9A70 strb r2, [r3, #2] -2540:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 287 .loc 1 2540 2 is_stmt 1 view .LVU81 - 288 .loc 1 2540 35 is_stmt 0 view .LVU82 +2559:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 287 .loc 1 2559 2 is_stmt 1 view .LVU81 + 288 .loc 1 2559 35 is_stmt 0 view .LVU82 289 001a 0288 ldrh r2, [r0] - 290 .loc 1 2540 47 view .LVU83 + 290 .loc 1 2559 47 view .LVU83 291 001c C2F3C002 ubfx r2, r2, #3, #1 - 292 .loc 1 2540 21 view .LVU84 + 292 .loc 1 2559 21 view .LVU84 293 0020 DA70 strb r2, [r3, #3] -2541:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 294 .loc 1 2541 2 is_stmt 1 view .LVU85 - 295 .loc 1 2541 35 is_stmt 0 view .LVU86 - ARM GAS /tmp/ccEQxcUB.s page 93 - - +2560:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 294 .loc 1 2560 2 is_stmt 1 view .LVU85 + 295 .loc 1 2560 35 is_stmt 0 view .LVU86 296 0022 0288 ldrh r2, [r0] - 297 .loc 1 2541 47 view .LVU87 + 297 .loc 1 2560 47 view .LVU87 298 0024 C2F30012 ubfx r2, r2, #4, #1 - 299 .loc 1 2541 21 view .LVU88 + 299 .loc 1 2560 21 view .LVU88 300 0028 1A71 strb r2, [r3, #4] -2542:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 301 .loc 1 2542 2 is_stmt 1 view .LVU89 - 302 .loc 1 2542 36 is_stmt 0 view .LVU90 +2561:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 301 .loc 1 2561 2 is_stmt 1 view .LVU89 + 302 .loc 1 2561 36 is_stmt 0 view .LVU90 303 002a 0288 ldrh r2, [r0] - 304 .loc 1 2542 48 view .LVU91 + 304 .loc 1 2561 48 view .LVU91 305 002c C2F34012 ubfx r2, r2, #5, #1 - 306 .loc 1 2542 22 view .LVU92 + 306 .loc 1 2561 22 view .LVU92 307 0030 5A71 strb r2, [r3, #5] -2543:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 308 .loc 1 2543 2 is_stmt 1 view .LVU93 - 309 .loc 1 2543 36 is_stmt 0 view .LVU94 +2562:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 308 .loc 1 2562 2 is_stmt 1 view .LVU93 + 309 .loc 1 2562 36 is_stmt 0 view .LVU94 310 0032 0288 ldrh r2, [r0] - 311 .loc 1 2543 48 view .LVU95 + 311 .loc 1 2562 48 view .LVU95 312 0034 C2F38012 ubfx r2, r2, #6, #1 - 313 .loc 1 2543 22 view .LVU96 + 313 .loc 1 2562 22 view .LVU96 314 0038 9A71 strb r2, [r3, #6] -2544:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 315 .loc 1 2544 2 is_stmt 1 view .LVU97 - 316 .loc 1 2544 36 is_stmt 0 view .LVU98 +2563:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 315 .loc 1 2563 2 is_stmt 1 view .LVU97 + 316 .loc 1 2563 36 is_stmt 0 view .LVU98 317 003a 0288 ldrh r2, [r0] - 318 .loc 1 2544 48 view .LVU99 + 318 .loc 1 2563 48 view .LVU99 319 003c C2F3C012 ubfx r2, r2, #7, #1 - 320 .loc 1 2544 22 view .LVU100 + 320 .loc 1 2563 22 view .LVU100 321 0040 DA71 strb r2, [r3, #7] -2545:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 322 .loc 1 2545 2 is_stmt 1 view .LVU101 - 323 .loc 1 2545 36 is_stmt 0 view .LVU102 +2564:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 322 .loc 1 2564 2 is_stmt 1 view .LVU101 + 323 .loc 1 2564 36 is_stmt 0 view .LVU102 324 0042 0288 ldrh r2, [r0] - 325 .loc 1 2545 48 view .LVU103 + 325 .loc 1 2564 48 view .LVU103 326 0044 C2F30022 ubfx r2, r2, #8, #1 - 327 .loc 1 2545 22 view .LVU104 + 327 .loc 1 2564 22 view .LVU104 328 0048 1A72 strb r2, [r3, #8] -2546:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 329 .loc 1 2546 2 is_stmt 1 view .LVU105 - 330 .loc 1 2546 35 is_stmt 0 view .LVU106 +2565:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + ARM GAS /tmp/ccuHnxNu.s page 94 + + + 329 .loc 1 2565 2 is_stmt 1 view .LVU105 + 330 .loc 1 2565 35 is_stmt 0 view .LVU106 331 004a 0288 ldrh r2, [r0] - 332 .loc 1 2546 47 view .LVU107 + 332 .loc 1 2565 47 view .LVU107 333 004c C2F34022 ubfx r2, r2, #9, #1 - 334 .loc 1 2546 21 view .LVU108 + 334 .loc 1 2565 21 view .LVU108 335 0050 5A72 strb r2, [r3, #9] -2547:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 336 .loc 1 2547 2 is_stmt 1 view .LVU109 - 337 .loc 1 2547 35 is_stmt 0 view .LVU110 +2566:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 336 .loc 1 2566 2 is_stmt 1 view .LVU109 + 337 .loc 1 2566 35 is_stmt 0 view .LVU110 338 0052 0288 ldrh r2, [r0] - 339 .loc 1 2547 48 view .LVU111 + 339 .loc 1 2566 48 view .LVU111 340 0054 C2F38022 ubfx r2, r2, #10, #1 - 341 .loc 1 2547 21 view .LVU112 + 341 .loc 1 2566 21 view .LVU112 342 0058 9A72 strb r2, [r3, #10] -2548:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 343 .loc 1 2548 2 is_stmt 1 view .LVU113 - 344 .loc 1 2548 34 is_stmt 0 view .LVU114 +2567:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 343 .loc 1 2567 2 is_stmt 1 view .LVU113 + 344 .loc 1 2567 34 is_stmt 0 view .LVU114 345 005a 0288 ldrh r2, [r0] - ARM GAS /tmp/ccEQxcUB.s page 94 - - - 346 .loc 1 2548 47 view .LVU115 + 346 .loc 1 2567 47 view .LVU115 347 005c C2F3C022 ubfx r2, r2, #11, #1 - 348 .loc 1 2548 20 view .LVU116 + 348 .loc 1 2567 20 view .LVU116 349 0060 DA72 strb r2, [r3, #11] -2549:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 350 .loc 1 2549 2 is_stmt 1 view .LVU117 - 351 .loc 1 2549 35 is_stmt 0 view .LVU118 +2568:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 350 .loc 1 2568 2 is_stmt 1 view .LVU117 + 351 .loc 1 2568 35 is_stmt 0 view .LVU118 352 0062 0288 ldrh r2, [r0] - 353 .loc 1 2549 48 view .LVU119 + 353 .loc 1 2568 48 view .LVU119 354 0064 C2F30032 ubfx r2, r2, #12, #1 - 355 .loc 1 2549 21 view .LVU120 + 355 .loc 1 2568 21 view .LVU120 356 0068 1A73 strb r2, [r3, #12] -2550:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 357 .loc 1 2550 2 is_stmt 1 view .LVU121 - 358 .loc 1 2550 35 is_stmt 0 view .LVU122 +2569:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 357 .loc 1 2569 2 is_stmt 1 view .LVU121 + 358 .loc 1 2569 35 is_stmt 0 view .LVU122 359 006a 0288 ldrh r2, [r0] - 360 .loc 1 2550 48 view .LVU123 + 360 .loc 1 2569 48 view .LVU123 361 006c C2F34032 ubfx r2, r2, #13, #1 - 362 .loc 1 2550 21 view .LVU124 + 362 .loc 1 2569 21 view .LVU124 363 0070 5A73 strb r2, [r3, #13] -2551:Src/main.c **** -2552:Src/main.c **** temp2++; - 364 .loc 1 2552 2 is_stmt 1 view .LVU125 +2570:Src/main.c **** +2571:Src/main.c **** temp2++; + 364 .loc 1 2571 2 is_stmt 1 view .LVU125 365 .LVL17: -2553:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; - 366 .loc 1 2553 2 view .LVU126 - 367 .loc 1 2553 21 is_stmt 0 view .LVU127 +2572:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; + 366 .loc 1 2572 2 view .LVU126 + 367 .loc 1 2572 21 is_stmt 0 view .LVU127 368 0072 8278 ldrb r2, [r0, #2] @ zero_extendqisi2 - 369 .loc 1 2553 19 view .LVU128 + 369 .loc 1 2572 19 view .LVU128 370 0074 384B ldr r3, .L14+8 371 .LVL18: - 372 .loc 1 2553 19 view .LVU129 + 372 .loc 1 2572 19 view .LVU129 373 0076 1A70 strb r2, [r3] - 374 .loc 1 2553 40 is_stmt 1 view .LVU130 + 374 .loc 1 2572 40 is_stmt 1 view .LVU130 375 .LVL19: -2554:Src/main.c **** task.min_param = (float)(*temp2); temp2++; - 376 .loc 1 2554 2 view .LVU131 - 377 .loc 1 2554 29 is_stmt 0 view .LVU132 +2573:Src/main.c **** task.min_param = (float)(*temp2); temp2++; + 376 .loc 1 2573 2 view .LVU131 + 377 .loc 1 2573 29 is_stmt 0 view .LVU132 + ARM GAS /tmp/ccuHnxNu.s page 95 + + 378 0078 8288 ldrh r2, [r0, #4] 379 007a 07EE902A vmov s15, r2 @ int - 380 .loc 1 2554 21 view .LVU133 + 380 .loc 1 2573 21 view .LVU133 381 007e F8EE677A vcvt.f32.u32 s15, s15 - 382 .loc 1 2554 19 view .LVU134 + 382 .loc 1 2573 19 view .LVU134 383 0082 C3ED017A vstr.32 s15, [r3, #4] - 384 .loc 1 2554 38 is_stmt 1 view .LVU135 + 384 .loc 1 2573 38 is_stmt 1 view .LVU135 385 .LVL20: -2555:Src/main.c **** task.max_param = (float)(*temp2); temp2++; - 386 .loc 1 2555 2 view .LVU136 - 387 .loc 1 2555 29 is_stmt 0 view .LVU137 +2574:Src/main.c **** task.max_param = (float)(*temp2); temp2++; + 386 .loc 1 2574 2 view .LVU136 + 387 .loc 1 2574 29 is_stmt 0 view .LVU137 388 0086 C288 ldrh r2, [r0, #6] 389 0088 07EE902A vmov s15, r2 @ int - 390 .loc 1 2555 21 view .LVU138 + 390 .loc 1 2574 21 view .LVU138 391 008c F8EE677A vcvt.f32.u32 s15, s15 - 392 .loc 1 2555 19 view .LVU139 + 392 .loc 1 2574 19 view .LVU139 393 0090 C3ED027A vstr.32 s15, [r3, #8] - 394 .loc 1 2555 38 is_stmt 1 view .LVU140 + 394 .loc 1 2574 38 is_stmt 1 view .LVU140 395 .LVL21: - ARM GAS /tmp/ccEQxcUB.s page 95 - - -2556:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; - 396 .loc 1 2556 2 view .LVU141 - 397 .loc 1 2556 29 is_stmt 0 view .LVU142 +2575:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; + 396 .loc 1 2575 2 view .LVU141 + 397 .loc 1 2575 29 is_stmt 0 view .LVU142 398 0094 0289 ldrh r2, [r0, #8] 399 0096 07EE902A vmov s15, r2 @ int - 400 .loc 1 2556 21 view .LVU143 + 400 .loc 1 2575 21 view .LVU143 401 009a F8EE677A vcvt.f32.u32 s15, s15 - 402 .loc 1 2556 19 view .LVU144 + 402 .loc 1 2575 19 view .LVU144 403 009e C3ED037A vstr.32 s15, [r3, #12] - 404 .loc 1 2556 38 is_stmt 1 view .LVU145 + 404 .loc 1 2575 38 is_stmt 1 view .LVU145 405 .LVL22: -2557:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; - 406 .loc 1 2557 2 view .LVU146 - 407 .loc 1 2557 29 is_stmt 0 view .LVU147 +2576:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; + 406 .loc 1 2576 2 view .LVU146 + 407 .loc 1 2576 29 is_stmt 0 view .LVU147 408 00a2 4289 ldrh r2, [r0, #10] 409 00a4 07EE102A vmov s14, r2 @ int - 410 .loc 1 2557 21 view .LVU148 + 410 .loc 1 2576 21 view .LVU148 411 00a8 B8EE477B vcvt.f64.u32 d7, s14 - 412 .loc 1 2557 37 view .LVU149 + 412 .loc 1 2576 37 view .LVU149 413 00ac 9FED285B vldr.64 d5, .L14 414 00b0 87EE056B vdiv.f64 d6, d7, d5 - 415 .loc 1 2557 19 view .LVU150 + 415 .loc 1 2576 19 view .LVU150 416 00b4 FCEEC67B vcvt.u32.f64 s15, d6 417 00b8 CDED017A vstr.32 s15, [sp, #4] @ int 418 00bc 9DF80420 ldrb r2, [sp, #4] @ zero_extendqisi2 419 00c0 1A75 strb r2, [r3, #20] - 420 .loc 1 2557 46 is_stmt 1 view .LVU151 + 420 .loc 1 2576 46 is_stmt 1 view .LVU151 421 .LVL23: -2558:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; - 422 .loc 1 2558 2 view .LVU152 - 423 .loc 1 2558 29 is_stmt 0 view .LVU153 +2577:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; + 422 .loc 1 2577 2 view .LVU152 + 423 .loc 1 2577 29 is_stmt 0 view .LVU153 424 00c2 8189 ldrh r1, [r0, #12] 425 .LVL24: - 426 .loc 1 2558 29 view .LVU154 + 426 .loc 1 2577 29 view .LVU154 427 00c4 07EE901A vmov s15, r1 @ int - 428 .loc 1 2558 21 view .LVU155 + 428 .loc 1 2577 21 view .LVU155 429 00c8 F8EE677A vcvt.f32.u32 s15, s15 - 430 .loc 1 2558 19 view .LVU156 + 430 .loc 1 2577 19 view .LVU156 + ARM GAS /tmp/ccuHnxNu.s page 96 + + 431 00cc C3ED067A vstr.32 s15, [r3, #24] - 432 .loc 1 2558 38 is_stmt 1 view .LVU157 + 432 .loc 1 2577 38 is_stmt 1 view .LVU157 433 .LVL25: -2559:Src/main.c **** task.curr = (float)(*temp2); temp2++; - 434 .loc 1 2559 2 view .LVU158 - 435 .loc 1 2559 29 is_stmt 0 view .LVU159 +2578:Src/main.c **** task.curr = (float)(*temp2); temp2++; + 434 .loc 1 2578 2 view .LVU158 + 435 .loc 1 2578 29 is_stmt 0 view .LVU159 436 00d0 C189 ldrh r1, [r0, #14] 437 00d2 07EE901A vmov s15, r1 @ int - 438 .loc 1 2559 21 view .LVU160 + 438 .loc 1 2578 21 view .LVU160 439 00d6 F8EE677A vcvt.f32.u32 s15, s15 - 440 .loc 1 2559 19 view .LVU161 + 440 .loc 1 2578 19 view .LVU161 441 00da C3ED077A vstr.32 s15, [r3, #28] - 442 .loc 1 2559 38 is_stmt 1 view .LVU162 + 442 .loc 1 2578 38 is_stmt 1 view .LVU162 443 .LVL26: -2560:Src/main.c **** task.temp = (float)(*temp2); temp2++; - 444 .loc 1 2560 2 view .LVU163 - 445 .loc 1 2560 29 is_stmt 0 view .LVU164 +2579:Src/main.c **** task.temp = (float)(*temp2); temp2++; + 444 .loc 1 2579 2 view .LVU163 + 445 .loc 1 2579 29 is_stmt 0 view .LVU164 446 00de 018A ldrh r1, [r0, #16] 447 00e0 07EE901A vmov s15, r1 @ int - ARM GAS /tmp/ccEQxcUB.s page 96 - - - 448 .loc 1 2560 21 view .LVU165 + 448 .loc 1 2579 21 view .LVU165 449 00e4 F8EE677A vcvt.f32.u32 s15, s15 - 450 .loc 1 2560 19 view .LVU166 + 450 .loc 1 2579 19 view .LVU166 451 00e8 C3ED087A vstr.32 s15, [r3, #32] - 452 .loc 1 2560 38 is_stmt 1 view .LVU167 + 452 .loc 1 2579 38 is_stmt 1 view .LVU167 453 .LVL27: -2561:Src/main.c **** task.tau = (float)(*temp2); temp2++; - 454 .loc 1 2561 2 view .LVU168 - 455 .loc 1 2561 29 is_stmt 0 view .LVU169 +2580:Src/main.c **** task.tau = (float)(*temp2); temp2++; + 454 .loc 1 2580 2 view .LVU168 + 455 .loc 1 2580 29 is_stmt 0 view .LVU169 456 00ec 418A ldrh r1, [r0, #18] - 457 .loc 1 2561 19 view .LVU170 + 457 .loc 1 2580 19 view .LVU170 458 00ee D982 strh r1, [r3, #22] @ movhi - 459 .loc 1 2561 38 is_stmt 1 view .LVU171 + 459 .loc 1 2580 38 is_stmt 1 view .LVU171 460 .LVL28: -2562:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; - 461 .loc 1 2562 2 view .LVU172 - 462 .loc 1 2562 29 is_stmt 0 view .LVU173 +2581:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; + 461 .loc 1 2581 2 view .LVU172 + 462 .loc 1 2581 29 is_stmt 0 view .LVU173 463 00f0 818A ldrh r1, [r0, #20] 464 00f2 07EE901A vmov s15, r1 @ int - 465 .loc 1 2562 21 view .LVU174 + 465 .loc 1 2581 21 view .LVU174 466 00f6 F8EE677A vcvt.f32.u32 s15, s15 - 467 .loc 1 2562 37 view .LVU175 + 467 .loc 1 2581 37 view .LVU175 468 00fa 9FED187A vldr.32 s14, .L14+12 469 00fe 67EE877A vmul.f32 s15, s15, s14 - 470 .loc 1 2562 19 view .LVU176 + 470 .loc 1 2581 19 view .LVU176 471 0102 C3ED0A7A vstr.32 s15, [r3, #40] - 472 .loc 1 2562 46 is_stmt 1 view .LVU177 + 472 .loc 1 2581 46 is_stmt 1 view .LVU177 473 .LVL29: -2563:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; - 474 .loc 1 2563 2 view .LVU178 - 475 .loc 1 2563 29 is_stmt 0 view .LVU179 +2582:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; + 474 .loc 1 2582 2 view .LVU178 + 475 .loc 1 2582 29 is_stmt 0 view .LVU179 476 0106 C18A ldrh r1, [r0, #22] 477 0108 07EE901A vmov s15, r1 @ int - 478 .loc 1 2563 21 view .LVU180 + 478 .loc 1 2582 21 view .LVU180 479 010c F8EE677A vcvt.f32.u32 s15, s15 - 480 .loc 1 2563 37 view .LVU181 + 480 .loc 1 2582 37 view .LVU181 481 0110 67EE877A vmul.f32 s15, s15, s14 - 482 .loc 1 2563 19 view .LVU182 + 482 .loc 1 2582 19 view .LVU182 + ARM GAS /tmp/ccuHnxNu.s page 97 + + 483 0114 C3ED097A vstr.32 s15, [r3, #36] - 484 .loc 1 2563 46 is_stmt 1 view .LVU183 + 484 .loc 1 2582 46 is_stmt 1 view .LVU183 485 .LVL30: -2564:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; - 486 .loc 1 2564 2 view .LVU184 - 487 .loc 1 2564 29 is_stmt 0 view .LVU185 +2583:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; + 486 .loc 1 2583 2 view .LVU184 + 487 .loc 1 2583 29 is_stmt 0 view .LVU185 488 0118 018B ldrh r1, [r0, #24] 489 011a 07EE901A vmov s15, r1 @ int - 490 .loc 1 2564 21 view .LVU186 + 490 .loc 1 2583 21 view .LVU186 491 011e F8EE677A vcvt.f32.u32 s15, s15 - 492 .loc 1 2564 37 view .LVU187 + 492 .loc 1 2583 37 view .LVU187 493 0122 67EE877A vmul.f32 s15, s15, s14 - 494 .loc 1 2564 19 view .LVU188 + 494 .loc 1 2583 19 view .LVU188 495 0126 C3ED0C7A vstr.32 s15, [r3, #48] - 496 .loc 1 2564 46 is_stmt 1 view .LVU189 + 496 .loc 1 2583 46 is_stmt 1 view .LVU189 497 .LVL31: -2565:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; - 498 .loc 1 2565 2 view .LVU190 - 499 .loc 1 2565 29 is_stmt 0 view .LVU191 - ARM GAS /tmp/ccEQxcUB.s page 97 - - +2584:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; + 498 .loc 1 2584 2 view .LVU190 + 499 .loc 1 2584 29 is_stmt 0 view .LVU191 500 012a 418B ldrh r1, [r0, #26] 501 012c 07EE901A vmov s15, r1 @ int - 502 .loc 1 2565 21 view .LVU192 + 502 .loc 1 2584 21 view .LVU192 503 0130 F8EE677A vcvt.f32.u32 s15, s15 - 504 .loc 1 2565 37 view .LVU193 + 504 .loc 1 2584 37 view .LVU193 505 0134 67EE877A vmul.f32 s15, s15, s14 - 506 .loc 1 2565 19 view .LVU194 + 506 .loc 1 2584 19 view .LVU194 507 0138 C3ED0B7A vstr.32 s15, [r3, #44] - 508 .loc 1 2565 46 is_stmt 1 view .LVU195 + 508 .loc 1 2584 46 is_stmt 1 view .LVU195 509 .LVL32: -2566:Src/main.c **** -2567:Src/main.c **** TO10_counter = task.dt / 10; - 510 .loc 1 2567 2 view .LVU196 - 511 .loc 1 2567 25 is_stmt 0 view .LVU197 +2585:Src/main.c **** +2586:Src/main.c **** TO10_counter = task.dt / 10; + 510 .loc 1 2586 2 view .LVU196 + 511 .loc 1 2586 25 is_stmt 0 view .LVU197 512 013c 084B ldr r3, .L14+16 513 013e A3FB0232 umull r3, r2, r3, r2 514 0142 D208 lsrs r2, r2, #3 - 515 .loc 1 2567 15 view .LVU198 + 515 .loc 1 2586 15 view .LVU198 516 0144 074B ldr r3, .L14+20 517 0146 1A60 str r2, [r3] -2568:Src/main.c **** } - 518 .loc 1 2568 1 view .LVU199 +2587:Src/main.c **** } + 518 .loc 1 2587 1 view .LVU199 519 0148 02B0 add sp, sp, #8 520 .LCFI5: 521 .cfi_def_cfa_offset 0 @@ -5799,6 +5818,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 532 0164 00000000 .word TO10_counter 533 .cfi_endproc 534 .LFE1210: + ARM GAS /tmp/ccuHnxNu.s page 98 + + 536 .section .text.SPI2_SetMode,"ax",%progbits 537 .align 1 538 .syntax unified @@ -5807,93 +5829,90 @@ ARM GAS /tmp/ccEQxcUB.s page 1 542 SPI2_SetMode: 543 .LVL33: 544 .LFB1213: -2569:Src/main.c **** -2570:Src/main.c **** void OUT_trigger(uint8_t out_n) -2571:Src/main.c **** { -2572:Src/main.c **** switch (out_n) -2573:Src/main.c **** { -2574:Src/main.c **** case 0: -2575:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); -2576:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); -2577:Src/main.c **** break; -2578:Src/main.c **** -2579:Src/main.c **** case 1: - ARM GAS /tmp/ccEQxcUB.s page 98 - - -2580:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); -2581:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); -2582:Src/main.c **** break; -2583:Src/main.c **** -2584:Src/main.c **** case 2: -2585:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); -2586:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); -2587:Src/main.c **** break; 2588:Src/main.c **** -2589:Src/main.c **** case 3: -2590:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); -2591:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); -2592:Src/main.c **** break; -2593:Src/main.c **** -2594:Src/main.c **** case 4: -2595:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); -2596:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); -2597:Src/main.c **** break; -2598:Src/main.c **** -2599:Src/main.c **** case 5: -2600:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); -2601:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); -2602:Src/main.c **** break; -2603:Src/main.c **** -2604:Src/main.c **** case 6: -2605:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); -2606:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); -2607:Src/main.c **** break; -2608:Src/main.c **** -2609:Src/main.c **** case 7: -2610:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); -2611:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); -2612:Src/main.c **** break; -2613:Src/main.c **** -2614:Src/main.c **** case 8: -2615:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); -2616:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); -2617:Src/main.c **** break; -2618:Src/main.c **** -2619:Src/main.c **** case 9: -2620:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); -2621:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); -2622:Src/main.c **** break; -2623:Src/main.c **** } -2624:Src/main.c **** } -2625:Src/main.c **** -2626:Src/main.c **** static void AD9102_Init(void) -2627:Src/main.c **** { -2628:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2629:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); -2630:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -2631:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +2589:Src/main.c **** void OUT_trigger(uint8_t out_n) +2590:Src/main.c **** { +2591:Src/main.c **** switch (out_n) +2592:Src/main.c **** { +2593:Src/main.c **** case 0: +2594:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); +2595:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); +2596:Src/main.c **** break; +2597:Src/main.c **** +2598:Src/main.c **** case 1: +2599:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); +2600:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); +2601:Src/main.c **** break; +2602:Src/main.c **** +2603:Src/main.c **** case 2: +2604:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); +2605:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); +2606:Src/main.c **** break; +2607:Src/main.c **** +2608:Src/main.c **** case 3: +2609:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); +2610:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); +2611:Src/main.c **** break; +2612:Src/main.c **** +2613:Src/main.c **** case 4: +2614:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); +2615:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); +2616:Src/main.c **** break; +2617:Src/main.c **** +2618:Src/main.c **** case 5: +2619:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); +2620:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); +2621:Src/main.c **** break; +2622:Src/main.c **** +2623:Src/main.c **** case 6: +2624:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); +2625:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); +2626:Src/main.c **** break; +2627:Src/main.c **** +2628:Src/main.c **** case 7: +2629:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); +2630:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); +2631:Src/main.c **** break; 2632:Src/main.c **** -2633:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); -2634:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2635:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2636:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - ARM GAS /tmp/ccEQxcUB.s page 99 +2633:Src/main.c **** case 8: +2634:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); +2635:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); +2636:Src/main.c **** break; + ARM GAS /tmp/ccuHnxNu.s page 99 -2637:Src/main.c **** } -2638:Src/main.c **** -2639:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase) -2640:Src/main.c **** { - 545 .loc 1 2640 1 is_stmt 1 view -0 +2637:Src/main.c **** +2638:Src/main.c **** case 9: +2639:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); +2640:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); +2641:Src/main.c **** break; +2642:Src/main.c **** } +2643:Src/main.c **** } +2644:Src/main.c **** +2645:Src/main.c **** static void AD9102_Init(void) +2646:Src/main.c **** { +2647:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2648:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); +2649:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2650:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +2651:Src/main.c **** +2652:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); +2653:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2654:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2655:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2656:Src/main.c **** } +2657:Src/main.c **** +2658:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase) +2659:Src/main.c **** { + 545 .loc 1 2659 1 is_stmt 1 view -0 546 .cfi_startproc 547 @ args = 0, pretend = 0, frame = 0 548 @ frame_needed = 0, uses_anonymous_args = 0 549 @ link register save eliminated. -2641:Src/main.c **** if (LL_SPI_IsEnabled(SPI2)) - 550 .loc 1 2641 2 view .LVU201 - 551 .LBB359: - 552 .LBI359: +2660:Src/main.c **** if (LL_SPI_IsEnabled(SPI2)) + 550 .loc 1 2660 2 view .LVU201 + 551 .LBB360: + 552 .LBI360: 553 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** ****************************************************************************** @@ -5919,6 +5938,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** extern "C" { + ARM GAS /tmp/ccuHnxNu.s page 100 + + 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Includes ------------------------------------------------------------------*/ @@ -5938,9 +5960,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private macros ------------------------------------------------------------*/ 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccEQxcUB.s page 100 - - 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported types ------------------------------------------------------------*/ 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined(USE_FULL_LL_DRIVER) 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_ES_INIT SPI Exported Init structure @@ -5979,6 +5998,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (N 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. + ARM GAS /tmp/ccuHnxNu.s page 101 + + 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -5998,9 +6020,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccEQxcUB.s page 101 - - 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter must be a number between Min_Data = 0x00 an 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6039,6 +6058,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty inter 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt + ARM GAS /tmp/ccuHnxNu.s page 102 + + 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} @@ -6058,9 +6080,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_MOTOROLA 0x00000000U /*!< Motorola mode. Used as de 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode - ARM GAS /tmp/ccEQxcUB.s page 102 - - 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6099,6 +6118,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order + ARM GAS /tmp/ccuHnxNu.s page 103 + + 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/recei @@ -6118,9 +6140,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccEQxcUB.s page 103 - - 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6159,6 +6178,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} + ARM GAS /tmp/ccuHnxNu.s page 104 + + 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* USE_FULL_LL_DRIVER */ 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6178,9 +6200,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_RX_FIFO_TH_QUARTER (SPI_CR2_FRXTH) /*!< RXNE event is generated i 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} - ARM GAS /tmp/ccEQxcUB.s page 104 - - 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_RX_FIFO RX FIFO Level @@ -6219,6 +6238,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccuHnxNu.s page 105 + + 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported macro ------------------------------------------------------------*/ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -6238,9 +6260,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 105 - - 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Read a value in SPI register 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __INSTANCE__ SPI Instance 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __REG__ Register to be read @@ -6279,6 +6298,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable SPI peripheral 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note When disabling the SPI, follow the procedure described in the Reference Manual. 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SPE LL_SPI_Disable + ARM GAS /tmp/ccuHnxNu.s page 106 + + 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6295,12 +6317,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) 554 .loc 4 381 26 view .LVU202 - 555 .LBB360: + 555 .LBB361: 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL); - ARM GAS /tmp/ccEQxcUB.s page 106 - - 556 .loc 4 383 3 view .LVU203 557 .loc 4 383 12 is_stmt 0 view .LVU204 558 0000 0F4B ldr r3, .L19 @@ -6310,16 +6329,16 @@ ARM GAS /tmp/ccEQxcUB.s page 1 562 0008 04D0 beq .L17 563 .LVL34: 564 .loc 4 383 69 view .LVU206 - 565 .LBE360: - 566 .LBE359: -2642:Src/main.c **** { -2643:Src/main.c **** LL_SPI_Disable(SPI2); - 567 .loc 1 2643 3 is_stmt 1 view .LVU207 - 568 .LBB361: - 569 .LBI361: + 565 .LBE361: + 566 .LBE360: +2661:Src/main.c **** { +2662:Src/main.c **** LL_SPI_Disable(SPI2); + 567 .loc 1 2662 3 is_stmt 1 view .LVU207 + 568 .LBB362: + 569 .LBI362: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 570 .loc 4 370 22 view .LVU208 - 571 .LBB362: + 571 .LBB363: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 572 .loc 4 372 3 view .LVU209 573 000a 0D4A ldr r2, .L19 @@ -6330,15 +6349,18 @@ ARM GAS /tmp/ccEQxcUB.s page 1 578 .L17: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 579 .loc 4 372 3 is_stmt 0 view .LVU210 - 580 .LBE362: - 581 .LBE361: -2644:Src/main.c **** } -2645:Src/main.c **** LL_SPI_SetClockPolarity(SPI2, polarity); - 582 .loc 1 2645 2 is_stmt 1 view .LVU211 - 583 .LBB363: - 584 .LBI363: + 580 .LBE363: + 581 .LBE362: +2663:Src/main.c **** } +2664:Src/main.c **** LL_SPI_SetClockPolarity(SPI2, polarity); + 582 .loc 1 2664 2 is_stmt 1 view .LVU211 + 583 .LBB364: + 584 .LBI364: 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccuHnxNu.s page 107 + + 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set SPI operation mode to Master or Slave 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. @@ -6358,9 +6380,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get SPI operation mode (Master or Slave) 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 MSTR LL_SPI_GetMode\n - ARM GAS /tmp/ccEQxcUB.s page 107 - - 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 SSI LL_SPI_GetMode 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: @@ -6399,6 +6418,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccuHnxNu.s page 108 + + 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set clock phase @@ -6418,9 +6440,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get clock phase - ARM GAS /tmp/ccEQxcUB.s page 108 - - 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CPHA LL_SPI_GetClockPhase 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: @@ -6445,7 +6464,7 @@ ARM GAS /tmp/ccEQxcUB.s page 1 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) 585 .loc 4 484 22 view .LVU212 - 586 .LBB364: + 586 .LBB365: 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); 587 .loc 4 486 3 view .LVU213 @@ -6458,15 +6477,18 @@ ARM GAS /tmp/ccEQxcUB.s page 1 594 001e 1860 str r0, [r3] 595 .LVL37: 596 .loc 4 486 3 view .LVU215 - 597 .LBE364: - 598 .LBE363: -2646:Src/main.c **** LL_SPI_SetClockPhase(SPI2, phase); - 599 .loc 1 2646 2 is_stmt 1 view .LVU216 - 600 .LBB365: - 601 .LBI365: + 597 .LBE365: + ARM GAS /tmp/ccuHnxNu.s page 109 + + + 598 .LBE364: +2665:Src/main.c **** LL_SPI_SetClockPhase(SPI2, phase); + 599 .loc 1 2665 2 is_stmt 1 view .LVU216 + 600 .LBB366: + 601 .LBI366: 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 602 .loc 4 455 22 view .LVU217 - 603 .LBB366: + 603 .LBB367: 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 604 .loc 4 457 3 view .LVU218 605 0020 1A68 ldr r2, [r3] @@ -6478,19 +6500,16 @@ ARM GAS /tmp/ccEQxcUB.s page 1 610 0028 1960 str r1, [r3] 611 .LVL39: 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccEQxcUB.s page 109 - - 612 .loc 4 457 3 view .LVU220 - 613 .LBE366: - 614 .LBE365: -2647:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) - 615 .loc 1 2647 2 is_stmt 1 view .LVU221 - 616 .LBB367: - 617 .LBI367: + 613 .LBE367: + 614 .LBE366: +2666:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) + 615 .loc 1 2666 2 is_stmt 1 view .LVU221 + 616 .LBB368: + 617 .LBI368: 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 618 .loc 4 381 26 view .LVU222 - 619 .LBB368: + 619 .LBB369: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 620 .loc 4 383 3 view .LVU223 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -6503,31 +6522,34 @@ ARM GAS /tmp/ccEQxcUB.s page 1 626 .LVL40: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 627 .loc 4 383 69 view .LVU226 - 628 .LBE368: - 629 .LBE367: -2648:Src/main.c **** { -2649:Src/main.c **** LL_SPI_Enable(SPI2); - 630 .loc 1 2649 3 is_stmt 1 view .LVU227 - 631 .LBB369: - 632 .LBI369: + 628 .LBE369: + 629 .LBE368: +2667:Src/main.c **** { +2668:Src/main.c **** LL_SPI_Enable(SPI2); + 630 .loc 1 2668 3 is_stmt 1 view .LVU227 + 631 .LBB370: + 632 .LBI370: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 633 .loc 4 358 22 view .LVU228 - 634 .LBB370: + 634 .LBB371: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 635 .loc 4 360 3 view .LVU229 636 0032 034A ldr r2, .L19 637 0034 1368 ldr r3, [r2] 638 0036 43F04003 orr r3, r3, #64 639 003a 1360 str r3, [r2] + ARM GAS /tmp/ccuHnxNu.s page 110 + + 640 .LVL41: 641 .L16: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 642 .loc 4 360 3 is_stmt 0 view .LVU230 - 643 .LBE370: - 644 .LBE369: -2650:Src/main.c **** } -2651:Src/main.c **** } - 645 .loc 1 2651 1 view .LVU231 + 643 .LBE371: + 644 .LBE370: +2669:Src/main.c **** } +2670:Src/main.c **** } + 645 .loc 1 2670 1 view .LVU231 646 003c 7047 bx lr 647 .L20: 648 003e 00BF .align 2 @@ -6535,1212 +6557,1300 @@ ARM GAS /tmp/ccEQxcUB.s page 1 650 0040 00380040 .word 1073756160 651 .cfi_endproc 652 .LFE1213: - 654 .section .text.PID_Controller_Temp,"ax",%progbits + 654 .section .text.PA4_DAC_Set,"ax",%progbits 655 .align 1 656 .syntax unified - ARM GAS /tmp/ccEQxcUB.s page 110 - - 657 .thumb 658 .thumb_func - 660 PID_Controller_Temp: + 660 PA4_DAC_Set: 661 .LVL42: - 662 .LFB1229: -2652:Src/main.c **** -2653:Src/main.c **** static void AD9833_WriteWord(uint16_t word) -2654:Src/main.c **** { -2655:Src/main.c **** uint32_t tmp32 = 0; -2656:Src/main.c **** -2657:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE); -2658:Src/main.c **** -2659:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2660:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); -2661:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2662:Src/main.c **** -2663:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET); -2664:Src/main.c **** -2665:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2666:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); -2667:Src/main.c **** tmp32 = 0; -2668:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2669:Src/main.c **** (void) SPI2->DR; -2670:Src/main.c **** -2671:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); -2672:Src/main.c **** } -2673:Src/main.c **** -2674:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word) -2675:Src/main.c **** { -2676:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 -2677:Src/main.c **** if (triangle) -2678:Src/main.c **** { -2679:Src/main.c **** control |= 0x0002u; // MODE = 1 (triangle) -2680:Src/main.c **** } -2681:Src/main.c **** control |= 0x0100u; // RESET = 1 while updating -2682:Src/main.c **** -2683:Src/main.c **** freq_word &= 0x0FFFFFFFu; -2684:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB -2685:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB -2686:Src/main.c **** -2687:Src/main.c **** AD9833_WriteWord(control); -2688:Src/main.c **** AD9833_WriteWord(lsw); -2689:Src/main.c **** AD9833_WriteWord(msw); -2690:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 -2691:Src/main.c **** -2692:Src/main.c **** if (enable) -2693:Src/main.c **** { -2694:Src/main.c **** control &= (uint16_t)(~0x0100u); -2695:Src/main.c **** } -2696:Src/main.c **** AD9833_WriteWord(control); -2697:Src/main.c **** } -2698:Src/main.c **** -2699:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms) -2700:Src/main.c **** { -2701:Src/main.c **** for (uint16_t i = 0; i < count; i++) -2702:Src/main.c **** { -2703:Src/main.c **** if (uc) - ARM GAS /tmp/ccEQxcUB.s page 111 + 662 .LFB1217: +2671:Src/main.c **** +2672:Src/main.c **** static void AD9833_WriteWord(uint16_t word) +2673:Src/main.c **** { +2674:Src/main.c **** uint32_t tmp32 = 0; +2675:Src/main.c **** +2676:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE); +2677:Src/main.c **** +2678:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2679:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); +2680:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +2681:Src/main.c **** +2682:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET); +2683:Src/main.c **** +2684:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2685:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); +2686:Src/main.c **** tmp32 = 0; +2687:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2688:Src/main.c **** (void) SPI2->DR; +2689:Src/main.c **** +2690:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); +2691:Src/main.c **** } +2692:Src/main.c **** +2693:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word) +2694:Src/main.c **** { +2695:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 +2696:Src/main.c **** if (triangle) +2697:Src/main.c **** { +2698:Src/main.c **** control |= 0x0002u; // MODE = 1 (triangle) +2699:Src/main.c **** } +2700:Src/main.c **** control |= 0x0100u; // RESET = 1 while updating +2701:Src/main.c **** +2702:Src/main.c **** freq_word &= 0x0FFFFFFFu; +2703:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB + ARM GAS /tmp/ccuHnxNu.s page 111 -2704:Src/main.c **** { -2705:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET); -2706:Src/main.c **** } -2707:Src/main.c **** if (dc) -2708:Src/main.c **** { -2709:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET); -2710:Src/main.c **** } -2711:Src/main.c **** HAL_Delay(pulse_ms); -2712:Src/main.c **** if (uc) -2713:Src/main.c **** { -2714:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET); -2715:Src/main.c **** } -2716:Src/main.c **** if (dc) -2717:Src/main.c **** { -2718:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET); -2719:Src/main.c **** } -2720:Src/main.c **** HAL_Delay(pulse_ms); -2721:Src/main.c **** } -2722:Src/main.c **** } -2723:Src/main.c **** -2724:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value) -2725:Src/main.c **** { -2726:Src/main.c **** uint32_t tmp32 = 0; -2727:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address -2728:Src/main.c **** -2729:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); -2730:Src/main.c **** -2731:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); -2732:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2733:Src/main.c **** -2734:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) -2735:Src/main.c **** { -2736:Src/main.c **** LL_SPI_Enable(SPI2); -2737:Src/main.c **** } -2738:Src/main.c **** -2739:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); -2740:Src/main.c **** -2741:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2742:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); -2743:Src/main.c **** tmp32 = 0; -2744:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2745:Src/main.c **** (void) SPI2->DR; -2746:Src/main.c **** -2747:Src/main.c **** tmp32 = 0; -2748:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2749:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); -2750:Src/main.c **** tmp32 = 0; -2751:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2752:Src/main.c **** (void) SPI2->DR; -2753:Src/main.c **** -2754:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2755:Src/main.c **** } -2756:Src/main.c **** -2757:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr) -2758:Src/main.c **** { -2759:Src/main.c **** uint32_t tmp32 = 0; -2760:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) - ARM GAS /tmp/ccEQxcUB.s page 112 - - -2761:Src/main.c **** uint16_t value; -2762:Src/main.c **** -2763:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); -2764:Src/main.c **** -2765:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); -2766:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2767:Src/main.c **** -2768:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) -2769:Src/main.c **** { -2770:Src/main.c **** LL_SPI_Enable(SPI2); -2771:Src/main.c **** } -2772:Src/main.c **** -2773:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); -2774:Src/main.c **** -2775:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2776:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); -2777:Src/main.c **** tmp32 = 0; -2778:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2779:Src/main.c **** (void) SPI2->DR; -2780:Src/main.c **** -2781:Src/main.c **** tmp32 = 0; -2782:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2783:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); -2784:Src/main.c **** tmp32 = 0; -2785:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2786:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); -2787:Src/main.c **** -2788:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2789:Src/main.c **** return value; -2790:Src/main.c **** } -2791:Src/main.c **** -2792:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) -2793:Src/main.c **** { -2794:Src/main.c **** for (uint16_t i = 0; i < count; i++) -2795:Src/main.c **** { -2796:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]); -2797:Src/main.c **** } -2798:Src/main.c **** } -2799:Src/main.c **** -2800:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, -2801:Src/main.c **** { -2802:Src/main.c **** if (enable) -2803:Src/main.c **** { -2804:Src/main.c **** uint16_t saw_cfg; -2805:Src/main.c **** uint16_t pat_timebase; -2806:Src/main.c **** -2807:Src/main.c **** if (saw_step == 0u) -2808:Src/main.c **** { -2809:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; -2810:Src/main.c **** } -2811:Src/main.c **** if (saw_step > 63u) -2812:Src/main.c **** { -2813:Src/main.c **** saw_step = 63u; -2814:Src/main.c **** } -2815:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | -2816:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); -2817:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - ARM GAS /tmp/ccEQxcUB.s page 113 - - -2818:Src/main.c **** ((pat_base & 0x0Fu) << 4) | -2819:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); -2820:Src/main.c **** -2821:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); -2822:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); -2823:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); -2824:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); -2825:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat -2826:Src/main.c **** -2827:Src/main.c **** // Update RUN then RAMUPDATE at the end of the write sequence. -2828:Src/main.c **** // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. -2829:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2830:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); -2831:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2832:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -2833:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); -2834:Src/main.c **** } -2835:Src/main.c **** else -2836:Src/main.c **** { -2837:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2838:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2839:Src/main.c **** } -2840:Src/main.c **** -2841:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); -2842:Src/main.c **** } -2843:Src/main.c **** -2844:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude) -2845:Src/main.c **** { -2846:Src/main.c **** if (samples < 2u) -2847:Src/main.c **** { -2848:Src/main.c **** samples = 2u; -2849:Src/main.c **** } -2850:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) -2851:Src/main.c **** { -2852:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; -2853:Src/main.c **** } -2854:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) -2855:Src/main.c **** { -2856:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; -2857:Src/main.c **** } -2858:Src/main.c **** -2859:Src/main.c **** // Enable SRAM access. -2860:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); -2861:Src/main.c **** -2862:Src/main.c **** for (uint16_t i = 0; i < samples; i++) -2863:Src/main.c **** { -2864:Src/main.c **** int32_t value; -2865:Src/main.c **** int32_t min_val = -(int32_t)amplitude; -2866:Src/main.c **** int32_t max_val = (int32_t)amplitude; -2867:Src/main.c **** int32_t span = max_val - min_val; -2868:Src/main.c **** if (triangle) -2869:Src/main.c **** { -2870:Src/main.c **** uint16_t half = samples / 2u; -2871:Src/main.c **** if (half == 0u) -2872:Src/main.c **** { -2873:Src/main.c **** half = 1u; -2874:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 114 - - -2875:Src/main.c **** if (i < half) -2876:Src/main.c **** { -2877:Src/main.c **** uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u; -2878:Src/main.c **** if (span == 0) -2879:Src/main.c **** { -2880:Src/main.c **** value = 0; -2881:Src/main.c **** } -2882:Src/main.c **** else -2883:Src/main.c **** { -2884:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; -2885:Src/main.c **** } -2886:Src/main.c **** } -2887:Src/main.c **** else -2888:Src/main.c **** { -2889:Src/main.c **** uint16_t tail = (uint16_t)(samples - half); -2890:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; -2891:Src/main.c **** if (span == 0) -2892:Src/main.c **** { -2893:Src/main.c **** value = 0; -2894:Src/main.c **** } -2895:Src/main.c **** else -2896:Src/main.c **** { -2897:Src/main.c **** value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom; -2898:Src/main.c **** } -2899:Src/main.c **** } -2900:Src/main.c **** } -2901:Src/main.c **** else -2902:Src/main.c **** { -2903:Src/main.c **** uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u; -2904:Src/main.c **** if (span == 0) -2905:Src/main.c **** { -2906:Src/main.c **** value = 0; -2907:Src/main.c **** } -2908:Src/main.c **** else -2909:Src/main.c **** { -2910:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; -2911:Src/main.c **** } -2912:Src/main.c **** } -2913:Src/main.c **** -2914:Src/main.c **** if (value < -8192) -2915:Src/main.c **** { -2916:Src/main.c **** value = -8192; -2917:Src/main.c **** } -2918:Src/main.c **** else if (value > 8191) -2919:Src/main.c **** { -2920:Src/main.c **** value = 8191; -2921:Src/main.c **** } -2922:Src/main.c **** -2923:Src/main.c **** uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu; -2924:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); -2925:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); -2926:Src/main.c **** } -2927:Src/main.c **** -2928:Src/main.c **** // Disable SRAM access. -2929:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2930:Src/main.c **** } -2931:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 115 - - -2932:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, -2933:Src/main.c **** { -2934:Src/main.c **** if (samples == 0u) -2935:Src/main.c **** { -2936:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; -2937:Src/main.c **** } -2938:Src/main.c **** if (samples < 2u) -2939:Src/main.c **** { -2940:Src/main.c **** samples = 2u; -2941:Src/main.c **** } -2942:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) -2943:Src/main.c **** { -2944:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; -2945:Src/main.c **** } -2946:Src/main.c **** if (hold == 0u) -2947:Src/main.c **** { -2948:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; -2949:Src/main.c **** } -2950:Src/main.c **** if (hold > 0x0Fu) -2951:Src/main.c **** { -2952:Src/main.c **** hold = 0x0Fu; -2953:Src/main.c **** } -2954:Src/main.c **** -2955:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) -2956:Src/main.c **** { -2957:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; -2958:Src/main.c **** } -2959:Src/main.c **** -2960:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | -2961:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | -2962:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); -2963:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); -2964:Src/main.c **** if (pat_period == 0u) -2965:Src/main.c **** { -2966:Src/main.c **** pat_period = samples; -2967:Src/main.c **** } -2968:Src/main.c **** if (pat_period > 0xFFFFu) -2969:Src/main.c **** { -2970:Src/main.c **** pat_period = 0xFFFFu; -2971:Src/main.c **** } -2972:Src/main.c **** -2973:Src/main.c **** AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); -2974:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2975:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); -2976:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); -2977:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); -2978:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); -2979:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); -2980:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat -2981:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); -2982:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); -2983:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); -2984:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2985:Src/main.c **** -2986:Src/main.c **** AD9102_LoadSramRamp(samples, triangle, amplitude); -2987:Src/main.c **** -2988:Src/main.c **** if (enable) - ARM GAS /tmp/ccEQxcUB.s page 116 - - -2989:Src/main.c **** { -2990:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2991:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); -2992:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2993:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -2994:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); -2995:Src/main.c **** } -2996:Src/main.c **** else -2997:Src/main.c **** { -2998:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2999:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -3000:Src/main.c **** } -3001:Src/main.c **** -3002:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); -3003:Src/main.c **** } -3004:Src/main.c **** -3005:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t -3006:Src/main.c **** { -3007:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); -3008:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); -3009:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); -3010:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); -3011:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | -3012:Src/main.c **** ((pat_base & 0x0Fu) << 4) | -3013:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); -3014:Src/main.c **** -3015:Src/main.c **** if (saw_step == 0u) -3016:Src/main.c **** { -3017:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; -3018:Src/main.c **** } -3019:Src/main.c **** if (saw_step > 63u) -3020:Src/main.c **** { -3021:Src/main.c **** saw_step = 63u; -3022:Src/main.c **** } -3023:Src/main.c **** if (pat_period == 0u) -3024:Src/main.c **** { -3025:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; -3026:Src/main.c **** } -3027:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | -3028:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); -3029:Src/main.c **** -3030:Src/main.c **** uint8_t ok = 1u; -3031:Src/main.c **** -3032:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. -3033:Src/main.c **** if (spiconfig != 0x0000u) -3034:Src/main.c **** { -3035:Src/main.c **** ok = 0u; -3036:Src/main.c **** } -3037:Src/main.c **** -3038:Src/main.c **** // Power blocks should not be powered down. -3039:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) -3040:Src/main.c **** { -3041:Src/main.c **** ok = 0u; -3042:Src/main.c **** } -3043:Src/main.c **** -3044:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence). -3045:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) - ARM GAS /tmp/ccEQxcUB.s page 117 - - -3046:Src/main.c **** { -3047:Src/main.c **** ok = 0u; -3048:Src/main.c **** } -3049:Src/main.c **** -3050:Src/main.c **** // Any configuration error flags indicate a bad setup. -3051:Src/main.c **** if (cfg_err & 0x003Fu) -3052:Src/main.c **** { -3053:Src/main.c **** ok = 0u; -3054:Src/main.c **** } -3055:Src/main.c **** -3056:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) -3057:Src/main.c **** { -3058:Src/main.c **** ok = 0u; -3059:Src/main.c **** } -3060:Src/main.c **** -3061:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) -3062:Src/main.c **** { -3063:Src/main.c **** ok = 0u; -3064:Src/main.c **** } -3065:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) -3066:Src/main.c **** { -3067:Src/main.c **** ok = 0u; -3068:Src/main.c **** } -3069:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) -3070:Src/main.c **** { -3071:Src/main.c **** ok = 0u; -3072:Src/main.c **** } -3073:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) -3074:Src/main.c **** { -3075:Src/main.c **** ok = 0u; -3076:Src/main.c **** } -3077:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) -3078:Src/main.c **** { -3079:Src/main.c **** ok = 0u; -3080:Src/main.c **** } -3081:Src/main.c **** -3082:Src/main.c **** return (ok ? 0u : 1u); -3083:Src/main.c **** } -3084:Src/main.c **** -3085:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin -3086:Src/main.c **** { -3087:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); -3088:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); -3089:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); -3090:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); -3091:Src/main.c **** -3092:Src/main.c **** if (samples == 0u) -3093:Src/main.c **** { -3094:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; -3095:Src/main.c **** } -3096:Src/main.c **** if (samples < 2u) -3097:Src/main.c **** { -3098:Src/main.c **** samples = 2u; -3099:Src/main.c **** } -3100:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) -3101:Src/main.c **** { -3102:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; - ARM GAS /tmp/ccEQxcUB.s page 118 - - -3103:Src/main.c **** } -3104:Src/main.c **** if (hold == 0u) -3105:Src/main.c **** { -3106:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; -3107:Src/main.c **** } -3108:Src/main.c **** if (hold > 0x0Fu) -3109:Src/main.c **** { -3110:Src/main.c **** hold = 0x0Fu; -3111:Src/main.c **** } -3112:Src/main.c **** -3113:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | -3114:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | -3115:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); -3116:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); -3117:Src/main.c **** if (pat_period == 0u) -3118:Src/main.c **** { -3119:Src/main.c **** pat_period = samples; -3120:Src/main.c **** } -3121:Src/main.c **** if (pat_period > 0xFFFFu) -3122:Src/main.c **** { -3123:Src/main.c **** pat_period = 0xFFFFu; -3124:Src/main.c **** } -3125:Src/main.c **** -3126:Src/main.c **** uint16_t stop_addr = (uint16_t)((samples - 1u) << 4); -3127:Src/main.c **** -3128:Src/main.c **** uint8_t ok = 1u; -3129:Src/main.c **** -3130:Src/main.c **** if (spiconfig != 0x0000u) -3131:Src/main.c **** { -3132:Src/main.c **** ok = 0u; -3133:Src/main.c **** } -3134:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) -3135:Src/main.c **** { -3136:Src/main.c **** ok = 0u; -3137:Src/main.c **** } -3138:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) -3139:Src/main.c **** { -3140:Src/main.c **** ok = 0u; -3141:Src/main.c **** } -3142:Src/main.c **** if (cfg_err & 0x003Fu) -3143:Src/main.c **** { -3144:Src/main.c **** ok = 0u; -3145:Src/main.c **** } -3146:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) -3147:Src/main.c **** { -3148:Src/main.c **** ok = 0u; -3149:Src/main.c **** } -3150:Src/main.c **** -3151:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG) -3152:Src/main.c **** { -3153:Src/main.c **** ok = 0u; -3154:Src/main.c **** } -3155:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) -3156:Src/main.c **** { -3157:Src/main.c **** ok = 0u; -3158:Src/main.c **** } -3159:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period) - ARM GAS /tmp/ccEQxcUB.s page 119 - - -3160:Src/main.c **** { -3161:Src/main.c **** ok = 0u; -3162:Src/main.c **** } -3163:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) -3164:Src/main.c **** { -3165:Src/main.c **** ok = 0u; -3166:Src/main.c **** } -3167:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u) -3168:Src/main.c **** { -3169:Src/main.c **** ok = 0u; -3170:Src/main.c **** } -3171:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr) -3172:Src/main.c **** { -3173:Src/main.c **** ok = 0u; -3174:Src/main.c **** } -3175:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT) -3176:Src/main.c **** { -3177:Src/main.c **** ok = 0u; -3178:Src/main.c **** } -3179:Src/main.c **** -3180:Src/main.c **** return (ok ? 0u : 1u); -3181:Src/main.c **** } -3182:Src/main.c **** -3183:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) -3184:Src/main.c **** { -3185:Src/main.c **** uint32_t tmp32; -3186:Src/main.c **** -3187:Src/main.c **** if (num == 1 || num == 3) -3188:Src/main.c **** { -3189:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE); -3190:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -3191:Src/main.c **** } -3192:Src/main.c **** -3193:Src/main.c **** switch (num) -3194:Src/main.c **** { -3195:Src/main.c **** case 1: -3196:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L -3197:Src/main.c **** //tmp32=0; -3198:Src/main.c **** //while(tmp32<500){tmp32++;} -3199:Src/main.c **** tmp32 = 0; -3200:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -3201:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -3202:Src/main.c **** tmp32 = 0; -3203:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3204:Src/main.c **** (void) SPI2->DR; -3205:Src/main.c **** break; -3206:Src/main.c **** case 2: -3207:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes -3208:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L -3209:Src/main.c **** //tmp32=0; -3210:Src/main.c **** //while(tmp32<500){tmp32++;} -3211:Src/main.c **** tmp32 = 0; -3212:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -3213:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -3214:Src/main.c **** tmp32 = 0; -3215:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3216:Src/main.c **** (void) SPI6->DR; - ARM GAS /tmp/ccEQxcUB.s page 120 - - -3217:Src/main.c **** break; -3218:Src/main.c **** case 3: -3219:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with -3220:Src/main.c **** //tmp32=0; -3221:Src/main.c **** //while(tmp32<500){tmp32++;} -3222:Src/main.c **** tmp32 = 0; -3223:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -3224:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -3225:Src/main.c **** tmp32 = 0; -3226:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3227:Src/main.c **** (void) SPI2->DR; -3228:Src/main.c **** break; -3229:Src/main.c **** case 4: -3230:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with -3231:Src/main.c **** //tmp32=0; -3232:Src/main.c **** //while(tmp32<500){tmp32++;} -3233:Src/main.c **** tmp32 = 0; -3234:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -3235:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -3236:Src/main.c **** tmp32 = 0; -3237:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3238:Src/main.c **** (void) SPI6->DR; -3239:Src/main.c **** break; -3240:Src/main.c **** } -3241:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 -3242:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 -3243:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 -3244:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 -3245:Src/main.c **** } -3246:Src/main.c **** static uint16_t MPhD_T(uint8_t num) -3247:Src/main.c **** { -3248:Src/main.c **** uint16_t P; -3249:Src/main.c **** uint32_t tmp32; -3250:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -3251:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -3252:Src/main.c **** tmp32=0; -3253:Src/main.c **** while(tmp32<500){tmp32++;} -3254:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -3255:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -3256:Src/main.c **** tmp32=0; -3257:Src/main.c **** while(tmp32<500){tmp32++;} -3258:Src/main.c **** if (num==1)//MPD1 -3259:Src/main.c **** { -3260:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -3261:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); -3262:Src/main.c **** tmp32=0; -3263:Src/main.c **** while(tmp32<500){tmp32++;} -3264:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -3265:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC -3266:Src/main.c **** tmp32 = 0; -3267:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3268:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC -3269:Src/main.c **** while(tmp32<500){tmp32++;} -3270:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3271:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -3272:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -3273:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 121 - - -3274:Src/main.c **** else if (num==2)//MPD2 -3275:Src/main.c **** { -3276:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -3277:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); -3278:Src/main.c **** tmp32=0; -3279:Src/main.c **** while(tmp32<500){tmp32++;} -3280:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -3281:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC -3282:Src/main.c **** tmp32 = 0; -3283:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3284:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC -3285:Src/main.c **** while(tmp32<500){tmp32++;} -3286:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3287:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -3288:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -3289:Src/main.c **** } -3290:Src/main.c **** else if (num==3)//ThrLD1 -3291:Src/main.c **** { -3292:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -3293:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -3294:Src/main.c **** tmp32=0; -3295:Src/main.c **** while(tmp32<500){tmp32++;} -3296:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -3297:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC -3298:Src/main.c **** tmp32 = 0; -3299:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3300:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC -3301:Src/main.c **** while(tmp32<500){tmp32++;} -3302:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3303:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -3304:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -3305:Src/main.c **** } -3306:Src/main.c **** else if (num==4)//ThrLD2 -3307:Src/main.c **** { -3308:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -3309:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -3310:Src/main.c **** tmp32=0; -3311:Src/main.c **** while(tmp32<500){tmp32++;} -3312:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -3313:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC -3314:Src/main.c **** tmp32 = 0; -3315:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3316:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC -3317:Src/main.c **** while(tmp32<500){tmp32++;} -3318:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3319:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -3320:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -3321:Src/main.c **** } -3322:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; -3323:Src/main.c **** -3324:Src/main.c **** Inorm = (float) (65535) / (float) (100); -3325:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); -3326:Src/main.c **** Tnorm2 = 4; -3327:Src/main.c **** Pnorm = (float)(65535) / (float)(20); -3328:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system -3329:Src/main.c **** T0m = 48.6282; -3330:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; - ARM GAS /tmp/ccEQxcUB.s page 122 - - -3331:Src/main.c **** -3332:Src/main.c **** Ith = I0m * expf(T_C/T0m); -3333:Src/main.c **** I_LD = (float) (C_LD) / Inorm; -3334:Src/main.c **** -3335:Src/main.c **** if (I_LD > Ith) -3336:Src/main.c **** { -3337:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ -3338:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; -3339:Src/main.c **** } -3340:Src/main.c **** else -3341:Src/main.c **** { -3342:Src/main.c **** P = 0; -3343:Src/main.c **** } */ -3344:Src/main.c **** return P; -3345:Src/main.c **** } -3346:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time -3347:Src/main.c **** { -3348:Src/main.c **** uint16_t Result; -3349:Src/main.c **** // uint8_t randf; -3350:Src/main.c **** -3351:Src/main.c **** randf = 0; -3352:Src/main.c **** for (uint8_t i = 0; i < 32; i++) -3353:Src/main.c **** { -3354:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; -3355:Src/main.c **** } -3356:Src/main.c **** -3357:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl -3358:Src/main.c **** -3359:Src/main.c **** return (uint16_t)(Result); -3360:Src/main.c **** }*/ -3361:Src/main.c **** static uint16_t Get_ADC(uint8_t num) -3362:Src/main.c **** { -3363:Src/main.c **** uint16_t OUT; -3364:Src/main.c **** switch (num) -3365:Src/main.c **** { -3366:Src/main.c **** case 0: -3367:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on -3368:Src/main.c **** break; -3369:Src/main.c **** case 1: -3370:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion -3371:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc -3372:Src/main.c **** break; -3373:Src/main.c **** case 2: -3374:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off -3375:Src/main.c **** break; -3376:Src/main.c **** case 3: -3377:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on -3378:Src/main.c **** break; -3379:Src/main.c **** case 4: -3380:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion -3381:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc -3382:Src/main.c **** break; -3383:Src/main.c **** case 5: -3384:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off -3385:Src/main.c **** break; -3386:Src/main.c **** } -3387:Src/main.c **** return OUT; - ARM GAS /tmp/ccEQxcUB.s page 123 - - -3388:Src/main.c **** } -3389:Src/main.c **** -3390:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results -3391:Src/main.c **** { -3392:Src/main.c **** // Main idea: -3393:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat -3394:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept -3395:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t -3396:Src/main.c **** // So, equation should be look like this: -3397:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) -3398:Src/main.c **** // t -- cycle phase -3399:Src/main.c **** // a,b,c -- constants -3400:Src/main.c **** // -3401:Src/main.c **** // How can we control laser diode temperature? -3402:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. -3403:Src/main.c **** // Then we should measure wavelength. -3404:Src/main.c **** // Calibration sequence: -3405:Src/main.c **** // 1) n -3406:Src/main.c **** -3407:Src/main.c **** -3408:Src/main.c **** -3409:Src/main.c **** int e_pid; -3410:Src/main.c **** float P_coef_current;//, I_coef_current; -3411:Src/main.c **** float e_integral; -3412:Src/main.c **** int x_output; -3413:Src/main.c **** -3414:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; -3415:Src/main.c **** -3416:Src/main.c **** e_integral = LDx_results->e_integral; -3417:Src/main.c **** -3418:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ -3419:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 -3420:Src/main.c **** } -3421:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; -3422:Src/main.c **** -3423:Src/main.c **** if (e_integral > 32000){ -3424:Src/main.c **** e_integral = 32000; -3425:Src/main.c **** } -3426:Src/main.c **** else if (e_integral < - 32000){ -3427:Src/main.c **** e_integral = -32000; -3428:Src/main.c **** } -3429:Src/main.c **** LDx_results->e_integral = e_integral; -3430:Src/main.c **** -3431:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in -3432:Src/main.c **** -3433:Src/main.c **** if(x_output < 1000){ -3434:Src/main.c **** x_output = 8800; -3435:Src/main.c **** } -3436:Src/main.c **** else if(x_output > 56800){ -3437:Src/main.c **** x_output = 56800; -3438:Src/main.c **** } -3439:Src/main.c **** -3440:Src/main.c **** if (num==2) -3441:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -3442:Src/main.c **** -3443:Src/main.c **** return (uint16_t)x_output; -3444:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 124 - - -3445:Src/main.c **** -3446:Src/main.c **** -3447:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin -3448:Src/main.c **** { - 663 .loc 1 3448 1 is_stmt 1 view -0 +2704:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB +2705:Src/main.c **** +2706:Src/main.c **** AD9833_WriteWord(control); +2707:Src/main.c **** AD9833_WriteWord(lsw); +2708:Src/main.c **** AD9833_WriteWord(msw); +2709:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 +2710:Src/main.c **** +2711:Src/main.c **** if (enable) +2712:Src/main.c **** { +2713:Src/main.c **** control &= (uint16_t)(~0x0100u); +2714:Src/main.c **** } +2715:Src/main.c **** AD9833_WriteWord(control); +2716:Src/main.c **** } +2717:Src/main.c **** +2718:Src/main.c **** static void PA4_DAC_Init(void) +2719:Src/main.c **** { +2720:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; +2721:Src/main.c **** +2722:Src/main.c **** __HAL_RCC_DAC_CLK_ENABLE(); +2723:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); +2724:Src/main.c **** +2725:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_4; +2726:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; +2727:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2728:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +2729:Src/main.c **** +2730:Src/main.c **** // Keep channel disabled until a dedicated serial command enables it. +2731:Src/main.c **** DAC->CR &= ~(DAC_CR_EN1 | DAC_CR_TEN1 | DAC_CR_DMAEN1); +2732:Src/main.c **** DAC->DHR12R1 = 0u; +2733:Src/main.c **** } +2734:Src/main.c **** +2735:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable) +2736:Src/main.c **** { + 663 .loc 1 2736 1 is_stmt 1 view -0 664 .cfi_startproc 665 @ args = 0, pretend = 0, frame = 0 666 @ frame_needed = 0, uses_anonymous_args = 0 667 @ link register save eliminated. - 668 .loc 1 3448 1 is_stmt 0 view .LVU233 - 669 0000 30B4 push {r4, r5} - 670 .LCFI6: - 671 .cfi_def_cfa_offset 8 - 672 .cfi_offset 4, -8 - 673 .cfi_offset 5, -4 -3449:Src/main.c **** int e_pid; - 674 .loc 1 3449 2 is_stmt 1 view .LVU234 -3450:Src/main.c **** float P_coef_current;//, I_coef_current; - 675 .loc 1 3450 2 view .LVU235 -3451:Src/main.c **** float e_integral; - 676 .loc 1 3451 2 view .LVU236 -3452:Src/main.c **** int x_output; - 677 .loc 1 3452 2 view .LVU237 -3453:Src/main.c **** -3454:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; - 678 .loc 1 3454 2 view .LVU238 - 679 .loc 1 3454 28 is_stmt 0 view .LVU239 - 680 0002 0B88 ldrh r3, [r1] - 681 .loc 1 3454 65 view .LVU240 - 682 0004 0488 ldrh r4, [r0] - 683 .loc 1 3454 8 view .LVU241 - 684 0006 1B1B subs r3, r3, r4 - 685 .LVL43: -3455:Src/main.c **** -3456:Src/main.c **** e_integral = LDx_results->e_integral; - 686 .loc 1 3456 2 is_stmt 1 view .LVU242 - 687 .loc 1 3456 13 is_stmt 0 view .LVU243 - 688 0008 D1ED017A vldr.32 s15, [r1, #4] - 689 .LVL44: -3457:Src/main.c **** -3458:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ - 690 .loc 1 3458 2 is_stmt 1 view .LVU244 - 691 .loc 1 3458 20 is_stmt 0 view .LVU245 - 692 000c 03F6B73C addw ip, r3, #2999 - 693 .loc 1 3458 4 view .LVU246 - 694 0010 41F26E74 movw r4, #5998 - 695 0014 A445 cmp ip, r4 - 696 0016 18D8 bhi .L22 -3459:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 697 .loc 1 3459 3 is_stmt 1 view .LVU247 - 698 .loc 1 3459 31 is_stmt 0 view .LVU248 - 699 0018 90ED027A vldr.32 s14, [r0, #8] - 700 .loc 1 3459 47 view .LVU249 - 701 001c 06EE903A vmov s13, r3 @ int - 702 0020 F8EEE66A vcvt.f32.s32 s13, s13 - 703 .loc 1 3459 45 view .LVU250 - 704 0024 27EE267A vmul.f32 s14, s14, s13 - ARM GAS /tmp/ccEQxcUB.s page 125 +2737:Src/main.c **** if (dac_code > STM32_DAC_CODE_MAX) + 668 .loc 1 2737 2 view .LVU233 + 669 .loc 1 2737 5 is_stmt 0 view .LVU234 + 670 0000 B0F5805F cmp r0, #4096 + 671 0004 01D3 bcc .L22 +2738:Src/main.c **** { +2739:Src/main.c **** dac_code = STM32_DAC_CODE_MAX; + 672 .loc 1 2739 12 view .LVU235 + 673 0006 40F6FF70 movw r0, #4095 + 674 .LVL43: + 675 .L22: +2740:Src/main.c **** } +2741:Src/main.c **** +2742:Src/main.c **** DAC->DHR12R1 = dac_code; + 676 .loc 1 2742 2 is_stmt 1 view .LVU236 + 677 .loc 1 2742 15 is_stmt 0 view .LVU237 + 678 000a 074B ldr r3, .L26 + 679 000c 9860 str r0, [r3, #8] +2743:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 112 - 705 .loc 1 3459 76 view .LVU251 - 706 0028 284C ldr r4, .L32 - 707 002a 2468 ldr r4, [r4] - 708 002c 284D ldr r5, .L32+4 - 709 002e 2D68 ldr r5, [r5] - 710 0030 641B subs r4, r4, r5 - 711 .loc 1 3459 64 view .LVU252 - 712 0032 06EE904A vmov s13, r4 @ int - 713 0036 F8EE666A vcvt.f32.u32 s13, s13 - 714 .loc 1 3459 62 view .LVU253 - 715 003a 27EE267A vmul.f32 s14, s14, s13 - 716 .loc 1 3459 87 view .LVU254 - 717 003e 9FED256A vldr.32 s12, .L32+8 - 718 0042 C7EE066A vdiv.f32 s13, s14, s12 - 719 .loc 1 3459 14 view .LVU255 - 720 0046 77EEA67A vadd.f32 s15, s15, s13 - 721 .LVL45: - 722 .L22: -3460:Src/main.c **** } -3461:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; - 723 .loc 1 3461 2 is_stmt 1 view .LVU256 - 724 .loc 1 3461 17 is_stmt 0 view .LVU257 - 725 004a D0ED016A vldr.32 s13, [r0, #4] - 726 .LVL46: -3462:Src/main.c **** -3463:Src/main.c **** if (e_integral > 32000){ - 727 .loc 1 3463 2 is_stmt 1 view .LVU258 - 728 .loc 1 3463 5 is_stmt 0 view .LVU259 - 729 004e 9FED227A vldr.32 s14, .L32+12 - 730 0052 F4EEC77A vcmpe.f32 s15, s14 - 731 0056 F1EE10FA vmrs APSR_nzcv, FPSCR - 732 005a 09DC bgt .L26 -3464:Src/main.c **** e_integral = 32000; -3465:Src/main.c **** } -3466:Src/main.c **** else if (e_integral < - 32000){ - 733 .loc 1 3466 7 is_stmt 1 view .LVU260 - 734 .loc 1 3466 10 is_stmt 0 view .LVU261 - 735 005c 9FED1F7A vldr.32 s14, .L32+16 - 736 0060 F4EEC77A vcmpe.f32 s15, s14 - 737 0064 F1EE10FA vmrs APSR_nzcv, FPSCR - 738 0068 04D5 bpl .L23 -3467:Src/main.c **** e_integral = -32000; - 739 .loc 1 3467 15 view .LVU262 - 740 006a DFED1C7A vldr.32 s15, .L32+16 - 741 .LVL47: - 742 .loc 1 3467 15 view .LVU263 - 743 006e 01E0 b .L23 - 744 .LVL48: - 745 .L26: -3464:Src/main.c **** e_integral = 32000; - 746 .loc 1 3464 15 view .LVU264 - 747 0070 DFED197A vldr.32 s15, .L32+12 - 748 .LVL49: - 749 .L23: -3468:Src/main.c **** } -3469:Src/main.c **** LDx_results->e_integral = e_integral; - 750 .loc 1 3469 2 is_stmt 1 view .LVU265 - ARM GAS /tmp/ccEQxcUB.s page 126 +2744:Src/main.c **** if (enable) + 680 .loc 1 2744 2 is_stmt 1 view .LVU238 + 681 .loc 1 2744 5 is_stmt 0 view .LVU239 + 682 000e 29B1 cbz r1, .L23 +2745:Src/main.c **** { +2746:Src/main.c **** DAC->CR |= DAC_CR_EN1; + 683 .loc 1 2746 3 is_stmt 1 view .LVU240 + 684 .loc 1 2746 6 is_stmt 0 view .LVU241 + 685 0010 1A46 mov r2, r3 + 686 0012 1B68 ldr r3, [r3] + 687 .loc 1 2746 11 view .LVU242 + 688 0014 43F00103 orr r3, r3, #1 + 689 0018 1360 str r3, [r2] + 690 001a 7047 bx lr + 691 .L23: +2747:Src/main.c **** } +2748:Src/main.c **** else +2749:Src/main.c **** { +2750:Src/main.c **** DAC->CR &= ~DAC_CR_EN1; + 692 .loc 1 2750 3 is_stmt 1 view .LVU243 + 693 .loc 1 2750 6 is_stmt 0 view .LVU244 + 694 001c 024A ldr r2, .L26 + 695 001e 1368 ldr r3, [r2] + 696 .loc 1 2750 11 view .LVU245 + 697 0020 23F00103 bic r3, r3, #1 + 698 0024 1360 str r3, [r2] +2751:Src/main.c **** } +2752:Src/main.c **** } + 699 .loc 1 2752 1 view .LVU246 + 700 0026 7047 bx lr + 701 .L27: + 702 .align 2 + 703 .L26: + 704 0028 00740040 .word 1073771520 + 705 .cfi_endproc + 706 .LFE1217: + 708 .section .text.PID_Controller_Temp,"ax",%progbits + 709 .align 1 + 710 .syntax unified + 711 .thumb + 712 .thumb_func + 714 PID_Controller_Temp: + 715 .LVL44: + 716 .LFB1231: +2753:Src/main.c **** +2754:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms) +2755:Src/main.c **** { +2756:Src/main.c **** for (uint16_t i = 0; i < count; i++) +2757:Src/main.c **** { +2758:Src/main.c **** if (uc) +2759:Src/main.c **** { +2760:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET); +2761:Src/main.c **** } +2762:Src/main.c **** if (dc) +2763:Src/main.c **** { +2764:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET); +2765:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 113 - 751 .loc 1 3469 26 is_stmt 0 view .LVU266 - 752 0074 C1ED017A vstr.32 s15, [r1, #4] -3470:Src/main.c **** -3471:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in - 753 .loc 1 3471 2 is_stmt 1 view .LVU267 - 754 .loc 1 3471 36 is_stmt 0 view .LVU268 - 755 0078 07EE103A vmov s14, r3 @ int - 756 007c B8EEC77A vcvt.f32.s32 s14, s14 - 757 0080 27EE267A vmul.f32 s14, s14, s13 - 758 .loc 1 3471 19 view .LVU269 - 759 0084 DFED166A vldr.32 s13, .L32+20 - 760 .LVL50: - 761 .loc 1 3471 19 view .LVU270 - 762 0088 37EE267A vadd.f32 s14, s14, s13 - 763 .loc 1 3471 46 view .LVU271 - 764 008c FDEEE77A vcvt.s32.f32 s15, s15 - 765 .LVL51: - 766 .loc 1 3471 44 view .LVU272 - 767 0090 F8EEE77A vcvt.f32.s32 s15, s15 - 768 0094 77EE877A vadd.f32 s15, s15, s14 - 769 .loc 1 3471 11 view .LVU273 - 770 0098 FDEEE77A vcvt.s32.f32 s15, s15 - 771 009c 17EE900A vmov r0, s15 @ int - 772 .LVL52: -3472:Src/main.c **** -3473:Src/main.c **** if(x_output < 1000){ - 773 .loc 1 3473 2 is_stmt 1 view .LVU274 - 774 .loc 1 3473 4 is_stmt 0 view .LVU275 - 775 00a0 B0F57A7F cmp r0, #1000 - 776 00a4 06DB blt .L28 -3474:Src/main.c **** x_output = 8800; +2766:Src/main.c **** HAL_Delay(pulse_ms); +2767:Src/main.c **** if (uc) +2768:Src/main.c **** { +2769:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET); +2770:Src/main.c **** } +2771:Src/main.c **** if (dc) +2772:Src/main.c **** { +2773:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET); +2774:Src/main.c **** } +2775:Src/main.c **** HAL_Delay(pulse_ms); +2776:Src/main.c **** } +2777:Src/main.c **** } +2778:Src/main.c **** +2779:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value) +2780:Src/main.c **** { +2781:Src/main.c **** uint32_t tmp32 = 0; +2782:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address +2783:Src/main.c **** +2784:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); +2785:Src/main.c **** +2786:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); +2787:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +2788:Src/main.c **** +2789:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) +2790:Src/main.c **** { +2791:Src/main.c **** LL_SPI_Enable(SPI2); +2792:Src/main.c **** } +2793:Src/main.c **** +2794:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2795:Src/main.c **** +2796:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2797:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2798:Src/main.c **** tmp32 = 0; +2799:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2800:Src/main.c **** (void) SPI2->DR; +2801:Src/main.c **** +2802:Src/main.c **** tmp32 = 0; +2803:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2804:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); +2805:Src/main.c **** tmp32 = 0; +2806:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2807:Src/main.c **** (void) SPI2->DR; +2808:Src/main.c **** +2809:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2810:Src/main.c **** } +2811:Src/main.c **** +2812:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr) +2813:Src/main.c **** { +2814:Src/main.c **** uint32_t tmp32 = 0; +2815:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) +2816:Src/main.c **** uint16_t value; +2817:Src/main.c **** +2818:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); +2819:Src/main.c **** +2820:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); +2821:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +2822:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 114 + + +2823:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) +2824:Src/main.c **** { +2825:Src/main.c **** LL_SPI_Enable(SPI2); +2826:Src/main.c **** } +2827:Src/main.c **** +2828:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2829:Src/main.c **** +2830:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2831:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2832:Src/main.c **** tmp32 = 0; +2833:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2834:Src/main.c **** (void) SPI2->DR; +2835:Src/main.c **** +2836:Src/main.c **** tmp32 = 0; +2837:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2838:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); +2839:Src/main.c **** tmp32 = 0; +2840:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2841:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); +2842:Src/main.c **** +2843:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2844:Src/main.c **** return value; +2845:Src/main.c **** } +2846:Src/main.c **** +2847:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) +2848:Src/main.c **** { +2849:Src/main.c **** for (uint16_t i = 0; i < count; i++) +2850:Src/main.c **** { +2851:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]); +2852:Src/main.c **** } +2853:Src/main.c **** } +2854:Src/main.c **** +2855:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, +2856:Src/main.c **** { +2857:Src/main.c **** if (enable) +2858:Src/main.c **** { +2859:Src/main.c **** uint16_t saw_cfg; +2860:Src/main.c **** uint16_t pat_timebase; +2861:Src/main.c **** +2862:Src/main.c **** if (saw_step == 0u) +2863:Src/main.c **** { +2864:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +2865:Src/main.c **** } +2866:Src/main.c **** if (saw_step > 63u) +2867:Src/main.c **** { +2868:Src/main.c **** saw_step = 63u; +2869:Src/main.c **** } +2870:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +2871:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +2872:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +2873:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +2874:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); +2875:Src/main.c **** +2876:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); +2877:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); +2878:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); +2879:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); + ARM GAS /tmp/ccuHnxNu.s page 115 + + +2880:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat +2881:Src/main.c **** +2882:Src/main.c **** // Update RUN then RAMUPDATE at the end of the write sequence. +2883:Src/main.c **** // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. +2884:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2885:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); +2886:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2887:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2888:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); +2889:Src/main.c **** } +2890:Src/main.c **** else +2891:Src/main.c **** { +2892:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2893:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2894:Src/main.c **** } +2895:Src/main.c **** +2896:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +2897:Src/main.c **** } +2898:Src/main.c **** +2899:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude) +2900:Src/main.c **** { +2901:Src/main.c **** if (samples < 2u) +2902:Src/main.c **** { +2903:Src/main.c **** samples = 2u; +2904:Src/main.c **** } +2905:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +2906:Src/main.c **** { +2907:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +2908:Src/main.c **** } +2909:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) +2910:Src/main.c **** { +2911:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; +2912:Src/main.c **** } +2913:Src/main.c **** +2914:Src/main.c **** // Enable SRAM access. +2915:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); +2916:Src/main.c **** +2917:Src/main.c **** for (uint16_t i = 0; i < samples; i++) +2918:Src/main.c **** { +2919:Src/main.c **** int32_t value; +2920:Src/main.c **** int32_t min_val = -(int32_t)amplitude; +2921:Src/main.c **** int32_t max_val = (int32_t)amplitude; +2922:Src/main.c **** int32_t span = max_val - min_val; +2923:Src/main.c **** if (triangle) +2924:Src/main.c **** { +2925:Src/main.c **** uint16_t half = samples / 2u; +2926:Src/main.c **** if (half == 0u) +2927:Src/main.c **** { +2928:Src/main.c **** half = 1u; +2929:Src/main.c **** } +2930:Src/main.c **** if (i < half) +2931:Src/main.c **** { +2932:Src/main.c **** uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u; +2933:Src/main.c **** if (span == 0) +2934:Src/main.c **** { +2935:Src/main.c **** value = 0; +2936:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 116 + + +2937:Src/main.c **** else +2938:Src/main.c **** { +2939:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; +2940:Src/main.c **** } +2941:Src/main.c **** } +2942:Src/main.c **** else +2943:Src/main.c **** { +2944:Src/main.c **** uint16_t tail = (uint16_t)(samples - half); +2945:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; +2946:Src/main.c **** if (span == 0) +2947:Src/main.c **** { +2948:Src/main.c **** value = 0; +2949:Src/main.c **** } +2950:Src/main.c **** else +2951:Src/main.c **** { +2952:Src/main.c **** value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom; +2953:Src/main.c **** } +2954:Src/main.c **** } +2955:Src/main.c **** } +2956:Src/main.c **** else +2957:Src/main.c **** { +2958:Src/main.c **** uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u; +2959:Src/main.c **** if (span == 0) +2960:Src/main.c **** { +2961:Src/main.c **** value = 0; +2962:Src/main.c **** } +2963:Src/main.c **** else +2964:Src/main.c **** { +2965:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; +2966:Src/main.c **** } +2967:Src/main.c **** } +2968:Src/main.c **** +2969:Src/main.c **** if (value < -8192) +2970:Src/main.c **** { +2971:Src/main.c **** value = -8192; +2972:Src/main.c **** } +2973:Src/main.c **** else if (value > 8191) +2974:Src/main.c **** { +2975:Src/main.c **** value = 8191; +2976:Src/main.c **** } +2977:Src/main.c **** +2978:Src/main.c **** uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu; +2979:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); +2980:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); +2981:Src/main.c **** } +2982:Src/main.c **** +2983:Src/main.c **** // Disable SRAM access. +2984:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2985:Src/main.c **** } +2986:Src/main.c **** +2987:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, +2988:Src/main.c **** { +2989:Src/main.c **** if (samples == 0u) +2990:Src/main.c **** { +2991:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; +2992:Src/main.c **** } +2993:Src/main.c **** if (samples < 2u) + ARM GAS /tmp/ccuHnxNu.s page 117 + + +2994:Src/main.c **** { +2995:Src/main.c **** samples = 2u; +2996:Src/main.c **** } +2997:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +2998:Src/main.c **** { +2999:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +3000:Src/main.c **** } +3001:Src/main.c **** if (hold == 0u) +3002:Src/main.c **** { +3003:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +3004:Src/main.c **** } +3005:Src/main.c **** if (hold > 0x0Fu) +3006:Src/main.c **** { +3007:Src/main.c **** hold = 0x0Fu; +3008:Src/main.c **** } +3009:Src/main.c **** +3010:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) +3011:Src/main.c **** { +3012:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; +3013:Src/main.c **** } +3014:Src/main.c **** +3015:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | +3016:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | +3017:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); +3018:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); +3019:Src/main.c **** if (pat_period == 0u) +3020:Src/main.c **** { +3021:Src/main.c **** pat_period = samples; +3022:Src/main.c **** } +3023:Src/main.c **** if (pat_period > 0xFFFFu) +3024:Src/main.c **** { +3025:Src/main.c **** pat_period = 0xFFFFu; +3026:Src/main.c **** } +3027:Src/main.c **** +3028:Src/main.c **** AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); +3029:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +3030:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); +3031:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); +3032:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); +3033:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); +3034:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); +3035:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat +3036:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); +3037:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); +3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); +3039:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +3040:Src/main.c **** +3041:Src/main.c **** AD9102_LoadSramRamp(samples, triangle, amplitude); +3042:Src/main.c **** +3043:Src/main.c **** if (enable) +3044:Src/main.c **** { +3045:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +3046:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); +3047:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +3048:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +3049:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); +3050:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 118 + + +3051:Src/main.c **** else +3052:Src/main.c **** { +3053:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +3054:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +3055:Src/main.c **** } +3056:Src/main.c **** +3057:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +3058:Src/main.c **** } +3059:Src/main.c **** +3060:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t +3061:Src/main.c **** { +3062:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); +3063:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); +3064:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); +3065:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); +3066:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +3067:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +3068:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); +3069:Src/main.c **** +3070:Src/main.c **** if (saw_step == 0u) +3071:Src/main.c **** { +3072:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +3073:Src/main.c **** } +3074:Src/main.c **** if (saw_step > 63u) +3075:Src/main.c **** { +3076:Src/main.c **** saw_step = 63u; +3077:Src/main.c **** } +3078:Src/main.c **** if (pat_period == 0u) +3079:Src/main.c **** { +3080:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; +3081:Src/main.c **** } +3082:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +3083:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +3084:Src/main.c **** +3085:Src/main.c **** uint8_t ok = 1u; +3086:Src/main.c **** +3087:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. +3088:Src/main.c **** if (spiconfig != 0x0000u) +3089:Src/main.c **** { +3090:Src/main.c **** ok = 0u; +3091:Src/main.c **** } +3092:Src/main.c **** +3093:Src/main.c **** // Power blocks should not be powered down. +3094:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) +3095:Src/main.c **** { +3096:Src/main.c **** ok = 0u; +3097:Src/main.c **** } +3098:Src/main.c **** +3099:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence). +3100:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) +3101:Src/main.c **** { +3102:Src/main.c **** ok = 0u; +3103:Src/main.c **** } +3104:Src/main.c **** +3105:Src/main.c **** // Any configuration error flags indicate a bad setup. +3106:Src/main.c **** if (cfg_err & 0x003Fu) +3107:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 119 + + +3108:Src/main.c **** ok = 0u; +3109:Src/main.c **** } +3110:Src/main.c **** +3111:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) +3112:Src/main.c **** { +3113:Src/main.c **** ok = 0u; +3114:Src/main.c **** } +3115:Src/main.c **** +3116:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) +3117:Src/main.c **** { +3118:Src/main.c **** ok = 0u; +3119:Src/main.c **** } +3120:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) +3121:Src/main.c **** { +3122:Src/main.c **** ok = 0u; +3123:Src/main.c **** } +3124:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) +3125:Src/main.c **** { +3126:Src/main.c **** ok = 0u; +3127:Src/main.c **** } +3128:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) +3129:Src/main.c **** { +3130:Src/main.c **** ok = 0u; +3131:Src/main.c **** } +3132:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) +3133:Src/main.c **** { +3134:Src/main.c **** ok = 0u; +3135:Src/main.c **** } +3136:Src/main.c **** +3137:Src/main.c **** return (ok ? 0u : 1u); +3138:Src/main.c **** } +3139:Src/main.c **** +3140:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin +3141:Src/main.c **** { +3142:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); +3143:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); +3144:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); +3145:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); +3146:Src/main.c **** +3147:Src/main.c **** if (samples == 0u) +3148:Src/main.c **** { +3149:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; +3150:Src/main.c **** } +3151:Src/main.c **** if (samples < 2u) +3152:Src/main.c **** { +3153:Src/main.c **** samples = 2u; +3154:Src/main.c **** } +3155:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +3156:Src/main.c **** { +3157:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +3158:Src/main.c **** } +3159:Src/main.c **** if (hold == 0u) +3160:Src/main.c **** { +3161:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +3162:Src/main.c **** } +3163:Src/main.c **** if (hold > 0x0Fu) +3164:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 120 + + +3165:Src/main.c **** hold = 0x0Fu; +3166:Src/main.c **** } +3167:Src/main.c **** +3168:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | +3169:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | +3170:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); +3171:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); +3172:Src/main.c **** if (pat_period == 0u) +3173:Src/main.c **** { +3174:Src/main.c **** pat_period = samples; +3175:Src/main.c **** } +3176:Src/main.c **** if (pat_period > 0xFFFFu) +3177:Src/main.c **** { +3178:Src/main.c **** pat_period = 0xFFFFu; +3179:Src/main.c **** } +3180:Src/main.c **** +3181:Src/main.c **** uint16_t stop_addr = (uint16_t)((samples - 1u) << 4); +3182:Src/main.c **** +3183:Src/main.c **** uint8_t ok = 1u; +3184:Src/main.c **** +3185:Src/main.c **** if (spiconfig != 0x0000u) +3186:Src/main.c **** { +3187:Src/main.c **** ok = 0u; +3188:Src/main.c **** } +3189:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) +3190:Src/main.c **** { +3191:Src/main.c **** ok = 0u; +3192:Src/main.c **** } +3193:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) +3194:Src/main.c **** { +3195:Src/main.c **** ok = 0u; +3196:Src/main.c **** } +3197:Src/main.c **** if (cfg_err & 0x003Fu) +3198:Src/main.c **** { +3199:Src/main.c **** ok = 0u; +3200:Src/main.c **** } +3201:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) +3202:Src/main.c **** { +3203:Src/main.c **** ok = 0u; +3204:Src/main.c **** } +3205:Src/main.c **** +3206:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG) +3207:Src/main.c **** { +3208:Src/main.c **** ok = 0u; +3209:Src/main.c **** } +3210:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) +3211:Src/main.c **** { +3212:Src/main.c **** ok = 0u; +3213:Src/main.c **** } +3214:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period) +3215:Src/main.c **** { +3216:Src/main.c **** ok = 0u; +3217:Src/main.c **** } +3218:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) +3219:Src/main.c **** { +3220:Src/main.c **** ok = 0u; +3221:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 121 + + +3222:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u) +3223:Src/main.c **** { +3224:Src/main.c **** ok = 0u; +3225:Src/main.c **** } +3226:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr) +3227:Src/main.c **** { +3228:Src/main.c **** ok = 0u; +3229:Src/main.c **** } +3230:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT) +3231:Src/main.c **** { +3232:Src/main.c **** ok = 0u; +3233:Src/main.c **** } +3234:Src/main.c **** +3235:Src/main.c **** return (ok ? 0u : 1u); +3236:Src/main.c **** } +3237:Src/main.c **** +3238:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) +3239:Src/main.c **** { +3240:Src/main.c **** uint32_t tmp32; +3241:Src/main.c **** +3242:Src/main.c **** if (num == 1 || num == 3) +3243:Src/main.c **** { +3244:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE); +3245:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +3246:Src/main.c **** } +3247:Src/main.c **** +3248:Src/main.c **** switch (num) +3249:Src/main.c **** { +3250:Src/main.c **** case 1: +3251:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L +3252:Src/main.c **** //tmp32=0; +3253:Src/main.c **** //while(tmp32<500){tmp32++;} +3254:Src/main.c **** tmp32 = 0; +3255:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +3256:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +3257:Src/main.c **** tmp32 = 0; +3258:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3259:Src/main.c **** (void) SPI2->DR; +3260:Src/main.c **** break; +3261:Src/main.c **** case 2: +3262:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes +3263:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L +3264:Src/main.c **** //tmp32=0; +3265:Src/main.c **** //while(tmp32<500){tmp32++;} +3266:Src/main.c **** tmp32 = 0; +3267:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +3268:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +3269:Src/main.c **** tmp32 = 0; +3270:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3271:Src/main.c **** (void) SPI6->DR; +3272:Src/main.c **** break; +3273:Src/main.c **** case 3: +3274:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with +3275:Src/main.c **** //tmp32=0; +3276:Src/main.c **** //while(tmp32<500){tmp32++;} +3277:Src/main.c **** tmp32 = 0; +3278:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + ARM GAS /tmp/ccuHnxNu.s page 122 + + +3279:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +3280:Src/main.c **** tmp32 = 0; +3281:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3282:Src/main.c **** (void) SPI2->DR; +3283:Src/main.c **** break; +3284:Src/main.c **** case 4: +3285:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with +3286:Src/main.c **** //tmp32=0; +3287:Src/main.c **** //while(tmp32<500){tmp32++;} +3288:Src/main.c **** tmp32 = 0; +3289:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +3290:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +3291:Src/main.c **** tmp32 = 0; +3292:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3293:Src/main.c **** (void) SPI6->DR; +3294:Src/main.c **** break; +3295:Src/main.c **** } +3296:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +3297:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +3298:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +3299:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +3300:Src/main.c **** } +3301:Src/main.c **** static uint16_t MPhD_T(uint8_t num) +3302:Src/main.c **** { +3303:Src/main.c **** uint16_t P; +3304:Src/main.c **** uint32_t tmp32; +3305:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +3306:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +3307:Src/main.c **** tmp32=0; +3308:Src/main.c **** while(tmp32<500){tmp32++;} +3309:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +3310:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +3311:Src/main.c **** tmp32=0; +3312:Src/main.c **** while(tmp32<500){tmp32++;} +3313:Src/main.c **** if (num==1)//MPD1 +3314:Src/main.c **** { +3315:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +3316:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); +3317:Src/main.c **** tmp32=0; +3318:Src/main.c **** while(tmp32<500){tmp32++;} +3319:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3320:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +3321:Src/main.c **** tmp32 = 0; +3322:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3323:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC +3324:Src/main.c **** while(tmp32<500){tmp32++;} +3325:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3326:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +3327:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +3328:Src/main.c **** } +3329:Src/main.c **** else if (num==2)//MPD2 +3330:Src/main.c **** { +3331:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +3332:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); +3333:Src/main.c **** tmp32=0; +3334:Src/main.c **** while(tmp32<500){tmp32++;} +3335:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + ARM GAS /tmp/ccuHnxNu.s page 123 + + +3336:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +3337:Src/main.c **** tmp32 = 0; +3338:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3339:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC +3340:Src/main.c **** while(tmp32<500){tmp32++;} +3341:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3342:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +3343:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +3344:Src/main.c **** } +3345:Src/main.c **** else if (num==3)//ThrLD1 +3346:Src/main.c **** { +3347:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +3348:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +3349:Src/main.c **** tmp32=0; +3350:Src/main.c **** while(tmp32<500){tmp32++;} +3351:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3352:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC +3353:Src/main.c **** tmp32 = 0; +3354:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3355:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC +3356:Src/main.c **** while(tmp32<500){tmp32++;} +3357:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3358:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +3359:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +3360:Src/main.c **** } +3361:Src/main.c **** else if (num==4)//ThrLD2 +3362:Src/main.c **** { +3363:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +3364:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +3365:Src/main.c **** tmp32=0; +3366:Src/main.c **** while(tmp32<500){tmp32++;} +3367:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3368:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC +3369:Src/main.c **** tmp32 = 0; +3370:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3371:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC +3372:Src/main.c **** while(tmp32<500){tmp32++;} +3373:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3374:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +3375:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +3376:Src/main.c **** } +3377:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; +3378:Src/main.c **** +3379:Src/main.c **** Inorm = (float) (65535) / (float) (100); +3380:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); +3381:Src/main.c **** Tnorm2 = 4; +3382:Src/main.c **** Pnorm = (float)(65535) / (float)(20); +3383:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system +3384:Src/main.c **** T0m = 48.6282; +3385:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; +3386:Src/main.c **** +3387:Src/main.c **** Ith = I0m * expf(T_C/T0m); +3388:Src/main.c **** I_LD = (float) (C_LD) / Inorm; +3389:Src/main.c **** +3390:Src/main.c **** if (I_LD > Ith) +3391:Src/main.c **** { +3392:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ + ARM GAS /tmp/ccuHnxNu.s page 124 + + +3393:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; +3394:Src/main.c **** } +3395:Src/main.c **** else +3396:Src/main.c **** { +3397:Src/main.c **** P = 0; +3398:Src/main.c **** } */ +3399:Src/main.c **** return P; +3400:Src/main.c **** } +3401:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time +3402:Src/main.c **** { +3403:Src/main.c **** uint16_t Result; +3404:Src/main.c **** // uint8_t randf; +3405:Src/main.c **** +3406:Src/main.c **** randf = 0; +3407:Src/main.c **** for (uint8_t i = 0; i < 32; i++) +3408:Src/main.c **** { +3409:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; +3410:Src/main.c **** } +3411:Src/main.c **** +3412:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl +3413:Src/main.c **** +3414:Src/main.c **** return (uint16_t)(Result); +3415:Src/main.c **** }*/ +3416:Src/main.c **** static uint16_t Get_ADC(uint8_t num) +3417:Src/main.c **** { +3418:Src/main.c **** uint16_t OUT; +3419:Src/main.c **** switch (num) +3420:Src/main.c **** { +3421:Src/main.c **** case 0: +3422:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on +3423:Src/main.c **** break; +3424:Src/main.c **** case 1: +3425:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion +3426:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc +3427:Src/main.c **** break; +3428:Src/main.c **** case 2: +3429:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off +3430:Src/main.c **** break; +3431:Src/main.c **** case 3: +3432:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on +3433:Src/main.c **** break; +3434:Src/main.c **** case 4: +3435:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion +3436:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc +3437:Src/main.c **** break; +3438:Src/main.c **** case 5: +3439:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off +3440:Src/main.c **** break; +3441:Src/main.c **** } +3442:Src/main.c **** return OUT; +3443:Src/main.c **** } +3444:Src/main.c **** +3445:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results +3446:Src/main.c **** { +3447:Src/main.c **** // Main idea: +3448:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat +3449:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept + ARM GAS /tmp/ccuHnxNu.s page 125 + + +3450:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t +3451:Src/main.c **** // So, equation should be look like this: +3452:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) +3453:Src/main.c **** // t -- cycle phase +3454:Src/main.c **** // a,b,c -- constants +3455:Src/main.c **** // +3456:Src/main.c **** // How can we control laser diode temperature? +3457:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. +3458:Src/main.c **** // Then we should measure wavelength. +3459:Src/main.c **** // Calibration sequence: +3460:Src/main.c **** // 1) n +3461:Src/main.c **** +3462:Src/main.c **** +3463:Src/main.c **** +3464:Src/main.c **** int e_pid; +3465:Src/main.c **** float P_coef_current;//, I_coef_current; +3466:Src/main.c **** float e_integral; +3467:Src/main.c **** int x_output; +3468:Src/main.c **** +3469:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; +3470:Src/main.c **** +3471:Src/main.c **** e_integral = LDx_results->e_integral; +3472:Src/main.c **** +3473:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ +3474:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 3475:Src/main.c **** } -3476:Src/main.c **** else if(x_output > 56800){ - 777 .loc 1 3476 7 is_stmt 1 view .LVU276 - 778 .loc 1 3476 9 is_stmt 0 view .LVU277 - 779 00a6 4DF6E053 movw r3, #56800 - 780 .LVL53: - 781 .loc 1 3476 9 view .LVU278 - 782 00aa 9842 cmp r0, r3 - 783 00ac 04DD ble .L24 -3477:Src/main.c **** x_output = 56800; - 784 .loc 1 3477 12 view .LVU279 - 785 00ae 4DF6E050 movw r0, #56800 - 786 .LVL54: - 787 .loc 1 3477 12 view .LVU280 - 788 00b2 01E0 b .L24 - 789 .LVL55: - 790 .L28: -3474:Src/main.c **** x_output = 8800; - 791 .loc 1 3474 12 view .LVU281 - 792 00b4 42F26020 movw r0, #8800 - 793 .LVL56: - 794 .L24: -3478:Src/main.c **** } -3479:Src/main.c **** -3480:Src/main.c **** if (num==2) - 795 .loc 1 3480 2 is_stmt 1 view .LVU282 - ARM GAS /tmp/ccEQxcUB.s page 127 +3476:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; +3477:Src/main.c **** +3478:Src/main.c **** if (e_integral > 32000){ +3479:Src/main.c **** e_integral = 32000; +3480:Src/main.c **** } +3481:Src/main.c **** else if (e_integral < - 32000){ +3482:Src/main.c **** e_integral = -32000; +3483:Src/main.c **** } +3484:Src/main.c **** LDx_results->e_integral = e_integral; +3485:Src/main.c **** +3486:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in +3487:Src/main.c **** +3488:Src/main.c **** if(x_output < 1000){ +3489:Src/main.c **** x_output = 8800; +3490:Src/main.c **** } +3491:Src/main.c **** else if(x_output > 56800){ +3492:Src/main.c **** x_output = 56800; +3493:Src/main.c **** } +3494:Src/main.c **** +3495:Src/main.c **** if (num==2) +3496:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +3497:Src/main.c **** +3498:Src/main.c **** return (uint16_t)x_output; +3499:Src/main.c **** } +3500:Src/main.c **** +3501:Src/main.c **** +3502:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin +3503:Src/main.c **** { + 717 .loc 1 3503 1 is_stmt 1 view -0 + 718 .cfi_startproc + 719 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccuHnxNu.s page 126 - 796 .loc 1 3480 5 is_stmt 0 view .LVU283 - 797 00b8 022A cmp r2, #2 - 798 00ba 02D0 beq .L31 - 799 .LVL57: - 800 .L25: -3481:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -3482:Src/main.c **** -3483:Src/main.c **** return (uint16_t)x_output; - 801 .loc 1 3483 2 is_stmt 1 view .LVU284 -3484:Src/main.c **** } - 802 .loc 1 3484 1 is_stmt 0 view .LVU285 - 803 00bc 80B2 uxth r0, r0 - 804 .LVL58: - 805 .loc 1 3484 1 view .LVU286 - 806 00be 30BC pop {r4, r5} - 807 .LCFI7: - 808 .cfi_remember_state - 809 .cfi_restore 5 - 810 .cfi_restore 4 - 811 .cfi_def_cfa_offset 0 - 812 00c0 7047 bx lr - 813 .LVL59: - 814 .L31: - 815 .LCFI8: - 816 .cfi_restore_state -3481:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 817 .loc 1 3481 3 is_stmt 1 view .LVU287 -3481:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 818 .loc 1 3481 11 is_stmt 0 view .LVU288 - 819 00c2 024B ldr r3, .L32 - 820 00c4 1A68 ldr r2, [r3] - 821 .LVL60: -3481:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 822 .loc 1 3481 11 view .LVU289 - 823 00c6 024B ldr r3, .L32+4 - 824 00c8 1A60 str r2, [r3] - 825 00ca F7E7 b .L25 - 826 .L33: - 827 .align 2 - 828 .L32: - 829 00cc 00000000 .word TO7 - 830 00d0 00000000 .word TO7_PID - 831 00d4 0000C842 .word 1120403456 - 832 00d8 0000FA46 .word 1190789120 - 833 00dc 0000FAC6 .word -956694528 - 834 00e0 00000047 .word 1191182336 - 835 .cfi_endproc - 836 .LFE1229: - 838 .section .text.AD9102_WriteReg,"ax",%progbits - 839 .align 1 - 840 .syntax unified - 841 .thumb - 842 .thumb_func - 844 AD9102_WriteReg: - 845 .LVL61: - 846 .LFB1217: -2725:Src/main.c **** uint32_t tmp32 = 0; - ARM GAS /tmp/ccEQxcUB.s page 128 + 720 @ frame_needed = 0, uses_anonymous_args = 0 + 721 @ link register save eliminated. + 722 .loc 1 3503 1 is_stmt 0 view .LVU248 + 723 0000 30B4 push {r4, r5} + 724 .LCFI6: + 725 .cfi_def_cfa_offset 8 + 726 .cfi_offset 4, -8 + 727 .cfi_offset 5, -4 +3504:Src/main.c **** int e_pid; + 728 .loc 1 3504 2 is_stmt 1 view .LVU249 +3505:Src/main.c **** float P_coef_current;//, I_coef_current; + 729 .loc 1 3505 2 view .LVU250 +3506:Src/main.c **** float e_integral; + 730 .loc 1 3506 2 view .LVU251 +3507:Src/main.c **** int x_output; + 731 .loc 1 3507 2 view .LVU252 +3508:Src/main.c **** +3509:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; + 732 .loc 1 3509 2 view .LVU253 + 733 .loc 1 3509 28 is_stmt 0 view .LVU254 + 734 0002 0B88 ldrh r3, [r1] + 735 .loc 1 3509 65 view .LVU255 + 736 0004 0488 ldrh r4, [r0] + 737 .loc 1 3509 8 view .LVU256 + 738 0006 1B1B subs r3, r3, r4 + 739 .LVL45: +3510:Src/main.c **** +3511:Src/main.c **** e_integral = LDx_results->e_integral; + 740 .loc 1 3511 2 is_stmt 1 view .LVU257 + 741 .loc 1 3511 13 is_stmt 0 view .LVU258 + 742 0008 D1ED017A vldr.32 s15, [r1, #4] + 743 .LVL46: +3512:Src/main.c **** +3513:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ + 744 .loc 1 3513 2 is_stmt 1 view .LVU259 + 745 .loc 1 3513 20 is_stmt 0 view .LVU260 + 746 000c 03F6B73C addw ip, r3, #2999 + 747 .loc 1 3513 4 view .LVU261 + 748 0010 41F26E74 movw r4, #5998 + 749 0014 A445 cmp ip, r4 + 750 0016 18D8 bhi .L29 +3514:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 751 .loc 1 3514 3 is_stmt 1 view .LVU262 + 752 .loc 1 3514 31 is_stmt 0 view .LVU263 + 753 0018 90ED027A vldr.32 s14, [r0, #8] + 754 .loc 1 3514 47 view .LVU264 + 755 001c 06EE903A vmov s13, r3 @ int + 756 0020 F8EEE66A vcvt.f32.s32 s13, s13 + 757 .loc 1 3514 45 view .LVU265 + 758 0024 27EE267A vmul.f32 s14, s14, s13 + 759 .loc 1 3514 76 view .LVU266 + 760 0028 284C ldr r4, .L39 + 761 002a 2468 ldr r4, [r4] + 762 002c 284D ldr r5, .L39+4 + 763 002e 2D68 ldr r5, [r5] + 764 0030 641B subs r4, r4, r5 + 765 .loc 1 3514 64 view .LVU267 + ARM GAS /tmp/ccuHnxNu.s page 127 - 847 .loc 1 2725 1 is_stmt 1 view -0 - 848 .cfi_startproc - 849 @ args = 0, pretend = 0, frame = 0 - 850 @ frame_needed = 0, uses_anonymous_args = 0 -2725:Src/main.c **** uint32_t tmp32 = 0; - 851 .loc 1 2725 1 is_stmt 0 view .LVU291 - 852 0000 38B5 push {r3, r4, r5, lr} - 853 .LCFI9: - 854 .cfi_def_cfa_offset 16 - 855 .cfi_offset 3, -16 - 856 .cfi_offset 4, -12 - 857 .cfi_offset 5, -8 - 858 .cfi_offset 14, -4 - 859 0002 0C46 mov r4, r1 -2726:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address - 860 .loc 1 2726 2 is_stmt 1 view .LVU292 - 861 .LVL62: -2727:Src/main.c **** - 862 .loc 1 2727 2 view .LVU293 -2727:Src/main.c **** - 863 .loc 1 2727 11 is_stmt 0 view .LVU294 - 864 0004 C0F30E05 ubfx r5, r0, #0, #15 - 865 .LVL63: -2729:Src/main.c **** - 866 .loc 1 2729 2 is_stmt 1 view .LVU295 - 867 0008 0021 movs r1, #0 - 868 .LVL64: -2729:Src/main.c **** - 869 .loc 1 2729 2 is_stmt 0 view .LVU296 - 870 000a 0846 mov r0, r1 - 871 .LVL65: -2729:Src/main.c **** - 872 .loc 1 2729 2 view .LVU297 - 873 000c FFF7FEFF bl SPI2_SetMode - 874 .LVL66: -2731:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); - 875 .loc 1 2731 2 is_stmt 1 view .LVU298 - 876 0010 0122 movs r2, #1 - 877 0012 4FF48041 mov r1, #16384 - 878 0016 2C48 ldr r0, .L49 - 879 0018 FFF7FEFF bl HAL_GPIO_WritePin - 880 .LVL67: -2732:Src/main.c **** - 881 .loc 1 2732 2 view .LVU299 - 882 001c 0122 movs r2, #1 - 883 001e 4FF48051 mov r1, #4096 - 884 0022 2A48 ldr r0, .L49+4 - 885 0024 FFF7FEFF bl HAL_GPIO_WritePin - 886 .LVL68: -2734:Src/main.c **** { - 887 .loc 1 2734 2 view .LVU300 - 888 .LBB371: - 889 .LBI371: + 766 0032 06EE904A vmov s13, r4 @ int + 767 0036 F8EE666A vcvt.f32.u32 s13, s13 + 768 .loc 1 3514 62 view .LVU268 + 769 003a 27EE267A vmul.f32 s14, s14, s13 + 770 .loc 1 3514 87 view .LVU269 + 771 003e 9FED256A vldr.32 s12, .L39+8 + 772 0042 C7EE066A vdiv.f32 s13, s14, s12 + 773 .loc 1 3514 14 view .LVU270 + 774 0046 77EEA67A vadd.f32 s15, s15, s13 + 775 .LVL47: + 776 .L29: +3515:Src/main.c **** } +3516:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; + 777 .loc 1 3516 2 is_stmt 1 view .LVU271 + 778 .loc 1 3516 17 is_stmt 0 view .LVU272 + 779 004a D0ED016A vldr.32 s13, [r0, #4] + 780 .LVL48: +3517:Src/main.c **** +3518:Src/main.c **** if (e_integral > 32000){ + 781 .loc 1 3518 2 is_stmt 1 view .LVU273 + 782 .loc 1 3518 5 is_stmt 0 view .LVU274 + 783 004e 9FED227A vldr.32 s14, .L39+12 + 784 0052 F4EEC77A vcmpe.f32 s15, s14 + 785 0056 F1EE10FA vmrs APSR_nzcv, FPSCR + 786 005a 09DC bgt .L33 +3519:Src/main.c **** e_integral = 32000; +3520:Src/main.c **** } +3521:Src/main.c **** else if (e_integral < - 32000){ + 787 .loc 1 3521 7 is_stmt 1 view .LVU275 + 788 .loc 1 3521 10 is_stmt 0 view .LVU276 + 789 005c 9FED1F7A vldr.32 s14, .L39+16 + 790 0060 F4EEC77A vcmpe.f32 s15, s14 + 791 0064 F1EE10FA vmrs APSR_nzcv, FPSCR + 792 0068 04D5 bpl .L30 +3522:Src/main.c **** e_integral = -32000; + 793 .loc 1 3522 15 view .LVU277 + 794 006a DFED1C7A vldr.32 s15, .L39+16 + 795 .LVL49: + 796 .loc 1 3522 15 view .LVU278 + 797 006e 01E0 b .L30 + 798 .LVL50: + 799 .L33: +3519:Src/main.c **** e_integral = 32000; + 800 .loc 1 3519 15 view .LVU279 + 801 0070 DFED197A vldr.32 s15, .L39+12 + 802 .LVL51: + 803 .L30: +3523:Src/main.c **** } +3524:Src/main.c **** LDx_results->e_integral = e_integral; + 804 .loc 1 3524 2 is_stmt 1 view .LVU280 + 805 .loc 1 3524 26 is_stmt 0 view .LVU281 + 806 0074 C1ED017A vstr.32 s15, [r1, #4] +3525:Src/main.c **** +3526:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in + 807 .loc 1 3526 2 is_stmt 1 view .LVU282 + 808 .loc 1 3526 36 is_stmt 0 view .LVU283 + 809 0078 07EE103A vmov s14, r3 @ int + ARM GAS /tmp/ccuHnxNu.s page 128 + + + 810 007c B8EEC77A vcvt.f32.s32 s14, s14 + 811 0080 27EE267A vmul.f32 s14, s14, s13 + 812 .loc 1 3526 19 view .LVU284 + 813 0084 DFED166A vldr.32 s13, .L39+20 + 814 .LVL52: + 815 .loc 1 3526 19 view .LVU285 + 816 0088 37EE267A vadd.f32 s14, s14, s13 + 817 .loc 1 3526 46 view .LVU286 + 818 008c FDEEE77A vcvt.s32.f32 s15, s15 + 819 .LVL53: + 820 .loc 1 3526 44 view .LVU287 + 821 0090 F8EEE77A vcvt.f32.s32 s15, s15 + 822 0094 77EE877A vadd.f32 s15, s15, s14 + 823 .loc 1 3526 11 view .LVU288 + 824 0098 FDEEE77A vcvt.s32.f32 s15, s15 + 825 009c 17EE900A vmov r0, s15 @ int + 826 .LVL54: +3527:Src/main.c **** +3528:Src/main.c **** if(x_output < 1000){ + 827 .loc 1 3528 2 is_stmt 1 view .LVU289 + 828 .loc 1 3528 4 is_stmt 0 view .LVU290 + 829 00a0 B0F57A7F cmp r0, #1000 + 830 00a4 06DB blt .L35 +3529:Src/main.c **** x_output = 8800; +3530:Src/main.c **** } +3531:Src/main.c **** else if(x_output > 56800){ + 831 .loc 1 3531 7 is_stmt 1 view .LVU291 + 832 .loc 1 3531 9 is_stmt 0 view .LVU292 + 833 00a6 4DF6E053 movw r3, #56800 + 834 .LVL55: + 835 .loc 1 3531 9 view .LVU293 + 836 00aa 9842 cmp r0, r3 + 837 00ac 04DD ble .L31 +3532:Src/main.c **** x_output = 56800; + 838 .loc 1 3532 12 view .LVU294 + 839 00ae 4DF6E050 movw r0, #56800 + 840 .LVL56: + 841 .loc 1 3532 12 view .LVU295 + 842 00b2 01E0 b .L31 + 843 .LVL57: + 844 .L35: +3529:Src/main.c **** x_output = 8800; + 845 .loc 1 3529 12 view .LVU296 + 846 00b4 42F26020 movw r0, #8800 + 847 .LVL58: + 848 .L31: +3533:Src/main.c **** } +3534:Src/main.c **** +3535:Src/main.c **** if (num==2) + 849 .loc 1 3535 2 is_stmt 1 view .LVU297 + 850 .loc 1 3535 5 is_stmt 0 view .LVU298 + 851 00b8 022A cmp r2, #2 + 852 00ba 02D0 beq .L38 + 853 .LVL59: + 854 .L32: +3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +3537:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 129 + + +3538:Src/main.c **** return (uint16_t)x_output; + 855 .loc 1 3538 2 is_stmt 1 view .LVU299 +3539:Src/main.c **** } + 856 .loc 1 3539 1 is_stmt 0 view .LVU300 + 857 00bc 80B2 uxth r0, r0 + 858 .LVL60: + 859 .loc 1 3539 1 view .LVU301 + 860 00be 30BC pop {r4, r5} + 861 .LCFI7: + 862 .cfi_remember_state + 863 .cfi_restore 5 + 864 .cfi_restore 4 + 865 .cfi_def_cfa_offset 0 + 866 00c0 7047 bx lr + 867 .LVL61: + 868 .L38: + 869 .LCFI8: + 870 .cfi_restore_state +3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 871 .loc 1 3536 3 is_stmt 1 view .LVU302 +3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 872 .loc 1 3536 11 is_stmt 0 view .LVU303 + 873 00c2 024B ldr r3, .L39 + 874 00c4 1A68 ldr r2, [r3] + 875 .LVL62: +3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 876 .loc 1 3536 11 view .LVU304 + 877 00c6 024B ldr r3, .L39+4 + 878 00c8 1A60 str r2, [r3] + 879 00ca F7E7 b .L32 + 880 .L40: + 881 .align 2 + 882 .L39: + 883 00cc 00000000 .word TO7 + 884 00d0 00000000 .word TO7_PID + 885 00d4 0000C842 .word 1120403456 + 886 00d8 0000FA46 .word 1190789120 + 887 00dc 0000FAC6 .word -956694528 + 888 00e0 00000047 .word 1191182336 + 889 .cfi_endproc + 890 .LFE1231: + 892 .section .text.AD9102_WriteReg,"ax",%progbits + 893 .align 1 + 894 .syntax unified + 895 .thumb + 896 .thumb_func + 898 AD9102_WriteReg: + 899 .LVL63: + 900 .LFB1219: +2780:Src/main.c **** uint32_t tmp32 = 0; + 901 .loc 1 2780 1 is_stmt 1 view -0 + 902 .cfi_startproc + 903 @ args = 0, pretend = 0, frame = 0 + 904 @ frame_needed = 0, uses_anonymous_args = 0 +2780:Src/main.c **** uint32_t tmp32 = 0; + 905 .loc 1 2780 1 is_stmt 0 view .LVU306 + 906 0000 38B5 push {r3, r4, r5, lr} + ARM GAS /tmp/ccuHnxNu.s page 130 + + + 907 .LCFI9: + 908 .cfi_def_cfa_offset 16 + 909 .cfi_offset 3, -16 + 910 .cfi_offset 4, -12 + 911 .cfi_offset 5, -8 + 912 .cfi_offset 14, -4 + 913 0002 0C46 mov r4, r1 +2781:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + 914 .loc 1 2781 2 is_stmt 1 view .LVU307 + 915 .LVL64: +2782:Src/main.c **** + 916 .loc 1 2782 2 view .LVU308 +2782:Src/main.c **** + 917 .loc 1 2782 11 is_stmt 0 view .LVU309 + 918 0004 C0F30E05 ubfx r5, r0, #0, #15 + 919 .LVL65: +2784:Src/main.c **** + 920 .loc 1 2784 2 is_stmt 1 view .LVU310 + 921 0008 0021 movs r1, #0 + 922 .LVL66: +2784:Src/main.c **** + 923 .loc 1 2784 2 is_stmt 0 view .LVU311 + 924 000a 0846 mov r0, r1 + 925 .LVL67: +2784:Src/main.c **** + 926 .loc 1 2784 2 view .LVU312 + 927 000c FFF7FEFF bl SPI2_SetMode + 928 .LVL68: +2786:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); + 929 .loc 1 2786 2 is_stmt 1 view .LVU313 + 930 0010 0122 movs r2, #1 + 931 0012 4FF48041 mov r1, #16384 + 932 0016 2C48 ldr r0, .L56 + 933 0018 FFF7FEFF bl HAL_GPIO_WritePin + 934 .LVL69: +2787:Src/main.c **** + 935 .loc 1 2787 2 view .LVU314 + 936 001c 0122 movs r2, #1 + 937 001e 4FF48051 mov r1, #4096 + 938 0022 2A48 ldr r0, .L56+4 + 939 0024 FFF7FEFF bl HAL_GPIO_WritePin + 940 .LVL70: +2789:Src/main.c **** { + 941 .loc 1 2789 2 view .LVU315 + 942 .LBB372: + 943 .LBI372: 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 890 .loc 4 381 26 view .LVU301 - 891 .LBB372: + 944 .loc 4 381 26 view .LVU316 + 945 .LBB373: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccEQxcUB.s page 129 + 946 .loc 4 383 3 view .LVU317 + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 947 .loc 4 383 12 is_stmt 0 view .LVU318 + 948 0028 294B ldr r3, .L56+8 + 949 002a 1B68 ldr r3, [r3] + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 950 .loc 4 383 69 view .LVU319 + ARM GAS /tmp/ccuHnxNu.s page 131 - 892 .loc 4 383 3 view .LVU302 + 951 002c 13F0400F tst r3, #64 + 952 0030 04D1 bne .L42 + 953 .LVL71: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 893 .loc 4 383 12 is_stmt 0 view .LVU303 - 894 0028 294B ldr r3, .L49+8 - 895 002a 1B68 ldr r3, [r3] - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 896 .loc 4 383 69 view .LVU304 - 897 002c 13F0400F tst r3, #64 - 898 0030 04D1 bne .L35 - 899 .LVL69: - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 900 .loc 4 383 69 view .LVU305 - 901 .LBE372: - 902 .LBE371: -2736:Src/main.c **** } - 903 .loc 1 2736 3 is_stmt 1 view .LVU306 - 904 .LBB373: - 905 .LBI373: + 954 .loc 4 383 69 view .LVU320 + 955 .LBE373: + 956 .LBE372: +2791:Src/main.c **** } + 957 .loc 1 2791 3 is_stmt 1 view .LVU321 + 958 .LBB374: + 959 .LBI374: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 906 .loc 4 358 22 view .LVU307 - 907 .LBB374: + 960 .loc 4 358 22 view .LVU322 + 961 .LBB375: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 908 .loc 4 360 3 view .LVU308 - 909 0032 274A ldr r2, .L49+8 - 910 0034 1368 ldr r3, [r2] - 911 0036 43F04003 orr r3, r3, #64 - 912 003a 1360 str r3, [r2] - 913 .LVL70: - 914 .L35: + 962 .loc 4 360 3 view .LVU323 + 963 0032 274A ldr r2, .L56+8 + 964 0034 1368 ldr r3, [r2] + 965 0036 43F04003 orr r3, r3, #64 + 966 003a 1360 str r3, [r2] + 967 .LVL72: + 968 .L42: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 915 .loc 4 360 3 is_stmt 0 view .LVU309 - 916 .LBE374: - 917 .LBE373: -2739:Src/main.c **** - 918 .loc 1 2739 2 is_stmt 1 view .LVU310 - 919 003c 0022 movs r2, #0 - 920 003e 4FF48051 mov r1, #4096 - 921 0042 2148 ldr r0, .L49 - 922 0044 FFF7FEFF bl HAL_GPIO_WritePin - 923 .LVL71: -2741:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 924 .loc 1 2741 2 view .LVU311 -2726:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address - 925 .loc 1 2726 11 is_stmt 0 view .LVU312 - 926 0048 0023 movs r3, #0 - 927 .LVL72: - 928 .L37: -2741:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 929 .loc 1 2741 63 is_stmt 1 discriminator 2 view .LVU313 -2741:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 930 .loc 1 2741 41 discriminator 2 view .LVU314 - 931 .LBB375: - 932 .LBI375: + 969 .loc 4 360 3 is_stmt 0 view .LVU324 + 970 .LBE375: + 971 .LBE374: +2794:Src/main.c **** + 972 .loc 1 2794 2 is_stmt 1 view .LVU325 + 973 003c 0022 movs r2, #0 + 974 003e 4FF48051 mov r1, #4096 + 975 0042 2148 ldr r0, .L56 + 976 0044 FFF7FEFF bl HAL_GPIO_WritePin + 977 .LVL73: +2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 978 .loc 1 2796 2 view .LVU326 +2781:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + 979 .loc 1 2781 11 is_stmt 0 view .LVU327 + 980 0048 0023 movs r3, #0 + 981 .LVL74: + 982 .L44: +2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 983 .loc 1 2796 63 is_stmt 1 discriminator 2 view .LVU328 +2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 984 .loc 1 2796 41 discriminator 2 view .LVU329 + 985 .LBB376: + 986 .LBI376: 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get clock polarity - ARM GAS /tmp/ccEQxcUB.s page 130 - - 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CPOL LL_SPI_GetClockPolarity 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: @@ -7748,6 +7858,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_HIGH 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx) + ARM GAS /tmp/ccuHnxNu.s page 132 + + 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL)); 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7798,9 +7911,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 LSBFIRST LL_SPI_SetTransferBitOrder 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param BitOrder This parameter can be one of the following values: - ARM GAS /tmp/ccEQxcUB.s page 131 - - 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_LSB_FIRST 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MSB_FIRST 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None @@ -7808,6 +7918,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder) 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder); + ARM GAS /tmp/ccuHnxNu.s page 133 + + 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7858,9 +7971,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx) 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)); - ARM GAS /tmp/ccEQxcUB.s page 132 - - 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7868,6 +7978,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 DS LL_SPI_SetDataWidth 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param DataWidth This parameter can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 134 + + 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_4BIT 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_5BIT 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_6BIT @@ -7918,9 +8031,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Threshold This parameter can be one of the following values: 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_RX_FIFO_TH_HALF - ARM GAS /tmp/ccEQxcUB.s page 133 - - 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_RX_FIFO_TH_QUARTER 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -7928,6 +8038,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold); 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccuHnxNu.s page 135 + + 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get threshold of RXFIFO that triggers an RXNE event @@ -7978,9 +8091,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if CRC is enabled 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CRCEN LL_SPI_IsEnabledCRC - ARM GAS /tmp/ccEQxcUB.s page 134 - - 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -7988,6 +8098,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)) ? 1UL : 0UL); 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccuHnxNu.s page 136 + + 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set CRC Length @@ -8038,9 +8151,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly) 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccEQxcUB.s page 135 - - 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly); 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8048,6 +8158,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get polynomial for CRC calculation 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CRCPR CRCPOLY LL_SPI_GetCRCPolynomial 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccuHnxNu.s page 137 + + 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) @@ -8098,9 +8211,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS) - ARM GAS /tmp/ccEQxcUB.s page 136 - - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_SSM, NSS); 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U))); @@ -8108,6 +8218,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get NSS mode + ARM GAS /tmp/ccuHnxNu.s page 138 + + 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SSM LL_SPI_GetNSSMode\n 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 SSOE LL_SPI_GetNSSMode 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -8158,9 +8271,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL); 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccEQxcUB.s page 137 - - 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} @@ -8168,6 +8278,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_FLAG_Management FLAG Management 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ + ARM GAS /tmp/ccuHnxNu.s page 139 + + 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -8188,46 +8301,46 @@ ARM GAS /tmp/ccEQxcUB.s page 1 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) - 933 .loc 4 916 26 view .LVU315 - 934 .LBB376: + 987 .loc 4 916 26 view .LVU330 + 988 .LBB377: 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL); - 935 .loc 4 918 3 view .LVU316 - 936 .loc 4 918 12 is_stmt 0 view .LVU317 - 937 004a 214A ldr r2, .L49+8 - 938 004c 9268 ldr r2, [r2, #8] - 939 .loc 4 918 66 view .LVU318 - 940 004e 12F0020F tst r2, #2 - 941 0052 05D1 bne .L36 - 942 .LVL73: - 943 .loc 4 918 66 view .LVU319 - 944 .LBE376: - 945 .LBE375: -2741:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 946 .loc 1 2741 50 discriminator 1 view .LVU320 - 947 0054 5A1C adds r2, r3, #1 - 948 .LVL74: -2741:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 949 .loc 1 2741 41 discriminator 1 view .LVU321 - 950 0056 B3F57A7F cmp r3, #1000 - 951 005a 01D2 bcs .L36 -2741:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 952 .loc 1 2741 50 discriminator 1 view .LVU322 - 953 005c 1346 mov r3, r2 - 954 005e F4E7 b .L37 - 955 .LVL75: - 956 .L36: -2742:Src/main.c **** tmp32 = 0; - ARM GAS /tmp/ccEQxcUB.s page 138 - - - 957 .loc 1 2742 2 is_stmt 1 view .LVU323 - 958 .LBB377: - 959 .LBI377: + 989 .loc 4 918 3 view .LVU331 + 990 .loc 4 918 12 is_stmt 0 view .LVU332 + 991 004a 214A ldr r2, .L56+8 + 992 004c 9268 ldr r2, [r2, #8] + 993 .loc 4 918 66 view .LVU333 + 994 004e 12F0020F tst r2, #2 + 995 0052 05D1 bne .L43 + 996 .LVL75: + 997 .loc 4 918 66 view .LVU334 + 998 .LBE377: + 999 .LBE376: +2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1000 .loc 1 2796 50 discriminator 1 view .LVU335 + 1001 0054 5A1C adds r2, r3, #1 + 1002 .LVL76: +2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1003 .loc 1 2796 41 discriminator 1 view .LVU336 + 1004 0056 B3F57A7F cmp r3, #1000 + 1005 005a 01D2 bcs .L43 +2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1006 .loc 1 2796 50 discriminator 1 view .LVU337 + 1007 005c 1346 mov r3, r2 + 1008 005e F4E7 b .L44 + 1009 .LVL77: + 1010 .L43: +2797:Src/main.c **** tmp32 = 0; + 1011 .loc 1 2797 2 is_stmt 1 view .LVU338 + 1012 .LBB378: + 1013 .LBI378: 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get CRC error flag + ARM GAS /tmp/ccuHnxNu.s page 140 + + 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR CRCERR LL_SPI_IsActiveFlag_CRCERR 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). @@ -8278,9 +8391,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 139 - - 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get frame format error flag 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FRE LL_SPI_IsActiveFlag_FRE 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -8288,6 +8398,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx) 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + ARM GAS /tmp/ccuHnxNu.s page 141 + + 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)) ? 1UL : 0UL); 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8338,9 +8451,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * register followed by a write access to the SPIx_CR1 register 1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR MODF LL_SPI_ClearFlag_MODF 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccEQxcUB.s page 140 - - 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx) @@ -8348,6 +8458,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint32_t tmpreg_sr; 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg_sr = SPIx->SR; 1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg_sr; + ARM GAS /tmp/ccuHnxNu.s page 142 + + 1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); 1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8398,9 +8511,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx) - ARM GAS /tmp/ccEQxcUB.s page 141 - - 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_ERRIE); 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -8408,6 +8518,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable Rx buffer not empty interrupt 1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXNEIE LL_SPI_EnableIT_RXNE + ARM GAS /tmp/ccuHnxNu.s page 143 + + 1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -8458,9 +8571,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx) 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccEQxcUB.s page 142 - - 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE); 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8468,6 +8578,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if error interrupt is enabled 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_IsEnabledIT_ERR 1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccuHnxNu.s page 144 + + 1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) @@ -8518,9 +8631,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable DMA Rx - ARM GAS /tmp/ccEQxcUB.s page 143 - - 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXDMAEN LL_SPI_DisableDMAReq_RX 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None @@ -8528,6 +8638,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx) 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); + ARM GAS /tmp/ccuHnxNu.s page 145 + + 1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -8578,9 +8691,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set parity of Last DMA reception 1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMARX LL_SPI_SetDMAParity_RX 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccEQxcUB.s page 144 - - 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Parity This parameter can be one of the following values: 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN @@ -8588,6 +8698,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetDMAParity_RX(SPI_TypeDef *SPIx, uint32_t Parity) 1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + ARM GAS /tmp/ccuHnxNu.s page 146 + + 1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_LDMARX, (Parity << SPI_CR2_LDMARX_Pos)); 1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8638,9 +8751,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Address of data register 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx) - ARM GAS /tmp/ccEQxcUB.s page 145 - - 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t) &(SPIx->DR); 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -8648,6 +8758,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 147 + + 1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_DATA_Management DATA Management 1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -8698,5078 +8811,5209 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 146 - - 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) - 960 .loc 4 1373 22 view .LVU324 - 961 .LBB378: + 1014 .loc 4 1373 22 view .LVU339 + 1015 .LBB379: 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR); - 962 .loc 4 1376 3 view .LVU325 + ARM GAS /tmp/ccuHnxNu.s page 148 + + + 1016 .loc 4 1376 3 view .LVU340 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 963 .loc 4 1377 3 view .LVU326 - 964 .loc 4 1377 10 is_stmt 0 view .LVU327 - 965 0060 1B4B ldr r3, .L49+8 - 966 0062 9D81 strh r5, [r3, #12] @ movhi - 967 .LVL76: - 968 .loc 4 1377 10 view .LVU328 - 969 .LBE378: - 970 .LBE377: -2743:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 971 .loc 1 2743 2 is_stmt 1 view .LVU329 -2744:Src/main.c **** (void) SPI2->DR; - 972 .loc 1 2744 2 view .LVU330 -2743:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 973 .loc 1 2743 8 is_stmt 0 view .LVU331 - 974 0064 0023 movs r3, #0 - 975 .LVL77: - 976 .L39: -2744:Src/main.c **** (void) SPI2->DR; - 977 .loc 1 2744 64 is_stmt 1 discriminator 2 view .LVU332 -2744:Src/main.c **** (void) SPI2->DR; - 978 .loc 1 2744 42 discriminator 2 view .LVU333 - 979 .LBB379: - 980 .LBI379: + 1017 .loc 4 1377 3 view .LVU341 + 1018 .loc 4 1377 10 is_stmt 0 view .LVU342 + 1019 0060 1B4B ldr r3, .L56+8 + 1020 0062 9D81 strh r5, [r3, #12] @ movhi + 1021 .LVL78: + 1022 .loc 4 1377 10 view .LVU343 + 1023 .LBE379: + 1024 .LBE378: +2798:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1025 .loc 1 2798 2 is_stmt 1 view .LVU344 +2799:Src/main.c **** (void) SPI2->DR; + 1026 .loc 1 2799 2 view .LVU345 +2798:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1027 .loc 1 2798 8 is_stmt 0 view .LVU346 + 1028 0064 0023 movs r3, #0 + 1029 .LVL79: + 1030 .L46: +2799:Src/main.c **** (void) SPI2->DR; + 1031 .loc 1 2799 64 is_stmt 1 discriminator 2 view .LVU347 +2799:Src/main.c **** (void) SPI2->DR; + 1032 .loc 1 2799 42 discriminator 2 view .LVU348 + 1033 .LBB380: + 1034 .LBI380: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 981 .loc 4 905 26 view .LVU334 - 982 .LBB380: + 1035 .loc 4 905 26 view .LVU349 + 1036 .LBB381: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 983 .loc 4 907 3 view .LVU335 + 1037 .loc 4 907 3 view .LVU350 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 984 .loc 4 907 12 is_stmt 0 view .LVU336 - 985 0066 1A4A ldr r2, .L49+8 - 986 0068 9268 ldr r2, [r2, #8] + 1038 .loc 4 907 12 is_stmt 0 view .LVU351 + 1039 0066 1A4A ldr r2, .L56+8 + 1040 0068 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 987 .loc 4 907 68 view .LVU337 - 988 006a 12F0010F tst r2, #1 - 989 006e 05D1 bne .L38 - 990 .LVL78: + 1041 .loc 4 907 68 view .LVU352 + 1042 006a 12F0010F tst r2, #1 + 1043 006e 05D1 bne .L45 + 1044 .LVL80: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 991 .loc 4 907 68 view .LVU338 - 992 .LBE380: - 993 .LBE379: -2744:Src/main.c **** (void) SPI2->DR; - 994 .loc 1 2744 51 discriminator 1 view .LVU339 - 995 0070 5A1C adds r2, r3, #1 - 996 .LVL79: -2744:Src/main.c **** (void) SPI2->DR; - 997 .loc 1 2744 42 discriminator 1 view .LVU340 - 998 0072 B3F57A7F cmp r3, #1000 - ARM GAS /tmp/ccEQxcUB.s page 147 + 1045 .loc 4 907 68 view .LVU353 + 1046 .LBE381: + 1047 .LBE380: +2799:Src/main.c **** (void) SPI2->DR; + 1048 .loc 1 2799 51 discriminator 1 view .LVU354 + 1049 0070 5A1C adds r2, r3, #1 + 1050 .LVL81: +2799:Src/main.c **** (void) SPI2->DR; + 1051 .loc 1 2799 42 discriminator 1 view .LVU355 + 1052 0072 B3F57A7F cmp r3, #1000 + 1053 0076 01D2 bcs .L45 +2799:Src/main.c **** (void) SPI2->DR; + 1054 .loc 1 2799 51 discriminator 1 view .LVU356 + 1055 0078 1346 mov r3, r2 + 1056 007a F4E7 b .L46 + 1057 .LVL82: + 1058 .L45: + ARM GAS /tmp/ccuHnxNu.s page 149 - 999 0076 01D2 bcs .L38 -2744:Src/main.c **** (void) SPI2->DR; - 1000 .loc 1 2744 51 discriminator 1 view .LVU341 - 1001 0078 1346 mov r3, r2 - 1002 007a F4E7 b .L39 - 1003 .LVL80: - 1004 .L38: -2745:Src/main.c **** - 1005 .loc 1 2745 2 is_stmt 1 view .LVU342 - 1006 007c 144B ldr r3, .L49+8 - 1007 007e DB68 ldr r3, [r3, #12] -2747:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1008 .loc 1 2747 2 view .LVU343 - 1009 .LVL81: -2748:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1010 .loc 1 2748 2 view .LVU344 -2747:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1011 .loc 1 2747 8 is_stmt 0 view .LVU345 - 1012 0080 0023 movs r3, #0 - 1013 .LVL82: - 1014 .L41: -2748:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1015 .loc 1 2748 63 is_stmt 1 discriminator 2 view .LVU346 -2748:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1016 .loc 1 2748 41 discriminator 2 view .LVU347 - 1017 .LBB381: - 1018 .LBI381: +2800:Src/main.c **** + 1059 .loc 1 2800 2 is_stmt 1 view .LVU357 + 1060 007c 144B ldr r3, .L56+8 + 1061 007e DB68 ldr r3, [r3, #12] +2802:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1062 .loc 1 2802 2 view .LVU358 + 1063 .LVL83: +2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1064 .loc 1 2803 2 view .LVU359 +2802:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1065 .loc 1 2802 8 is_stmt 0 view .LVU360 + 1066 0080 0023 movs r3, #0 + 1067 .LVL84: + 1068 .L48: +2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1069 .loc 1 2803 63 is_stmt 1 discriminator 2 view .LVU361 +2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1070 .loc 1 2803 41 discriminator 2 view .LVU362 + 1071 .LBB382: + 1072 .LBI382: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1019 .loc 4 916 26 view .LVU348 - 1020 .LBB382: + 1073 .loc 4 916 26 view .LVU363 + 1074 .LBB383: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1021 .loc 4 918 3 view .LVU349 + 1075 .loc 4 918 3 view .LVU364 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1022 .loc 4 918 12 is_stmt 0 view .LVU350 - 1023 0082 134A ldr r2, .L49+8 - 1024 0084 9268 ldr r2, [r2, #8] + 1076 .loc 4 918 12 is_stmt 0 view .LVU365 + 1077 0082 134A ldr r2, .L56+8 + 1078 0084 9268 ldr r2, [r2, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1025 .loc 4 918 66 view .LVU351 - 1026 0086 12F0020F tst r2, #2 - 1027 008a 05D1 bne .L40 - 1028 .LVL83: + 1079 .loc 4 918 66 view .LVU366 + 1080 0086 12F0020F tst r2, #2 + 1081 008a 05D1 bne .L47 + 1082 .LVL85: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1029 .loc 4 918 66 view .LVU352 - 1030 .LBE382: - 1031 .LBE381: -2748:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1032 .loc 1 2748 50 discriminator 1 view .LVU353 - 1033 008c 5A1C adds r2, r3, #1 - 1034 .LVL84: -2748:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1035 .loc 1 2748 41 discriminator 1 view .LVU354 - 1036 008e B3F57A7F cmp r3, #1000 - 1037 0092 01D2 bcs .L40 -2748:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1038 .loc 1 2748 50 discriminator 1 view .LVU355 - 1039 0094 1346 mov r3, r2 - 1040 0096 F4E7 b .L41 - ARM GAS /tmp/ccEQxcUB.s page 148 - - - 1041 .LVL85: - 1042 .L40: -2749:Src/main.c **** tmp32 = 0; - 1043 .loc 1 2749 2 is_stmt 1 view .LVU356 - 1044 .LBB383: - 1045 .LBI383: + 1083 .loc 4 918 66 view .LVU367 + 1084 .LBE383: + 1085 .LBE382: +2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1086 .loc 1 2803 50 discriminator 1 view .LVU368 + 1087 008c 5A1C adds r2, r3, #1 + 1088 .LVL86: +2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1089 .loc 1 2803 41 discriminator 1 view .LVU369 + 1090 008e B3F57A7F cmp r3, #1000 + 1091 0092 01D2 bcs .L47 +2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1092 .loc 1 2803 50 discriminator 1 view .LVU370 + 1093 0094 1346 mov r3, r2 + 1094 0096 F4E7 b .L48 + 1095 .LVL87: + 1096 .L47: +2804:Src/main.c **** tmp32 = 0; + 1097 .loc 1 2804 2 is_stmt 1 view .LVU371 + 1098 .LBB384: + 1099 .LBI384: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1046 .loc 4 1373 22 view .LVU357 - 1047 .LBB384: + ARM GAS /tmp/ccuHnxNu.s page 150 + + + 1100 .loc 4 1373 22 view .LVU372 + 1101 .LBB385: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1048 .loc 4 1376 3 view .LVU358 - 1049 .loc 4 1377 3 view .LVU359 - 1050 .loc 4 1377 10 is_stmt 0 view .LVU360 - 1051 0098 0D4B ldr r3, .L49+8 - 1052 009a 9C81 strh r4, [r3, #12] @ movhi - 1053 .LVL86: - 1054 .loc 4 1377 10 view .LVU361 - 1055 .LBE384: - 1056 .LBE383: -2750:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1057 .loc 1 2750 2 is_stmt 1 view .LVU362 -2751:Src/main.c **** (void) SPI2->DR; - 1058 .loc 1 2751 2 view .LVU363 -2750:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1059 .loc 1 2750 8 is_stmt 0 view .LVU364 - 1060 009c 0023 movs r3, #0 - 1061 .LVL87: - 1062 .L43: -2751:Src/main.c **** (void) SPI2->DR; - 1063 .loc 1 2751 64 is_stmt 1 discriminator 2 view .LVU365 -2751:Src/main.c **** (void) SPI2->DR; - 1064 .loc 1 2751 42 discriminator 2 view .LVU366 - 1065 .LBB385: - 1066 .LBI385: + 1102 .loc 4 1376 3 view .LVU373 + 1103 .loc 4 1377 3 view .LVU374 + 1104 .loc 4 1377 10 is_stmt 0 view .LVU375 + 1105 0098 0D4B ldr r3, .L56+8 + 1106 009a 9C81 strh r4, [r3, #12] @ movhi + 1107 .LVL88: + 1108 .loc 4 1377 10 view .LVU376 + 1109 .LBE385: + 1110 .LBE384: +2805:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1111 .loc 1 2805 2 is_stmt 1 view .LVU377 +2806:Src/main.c **** (void) SPI2->DR; + 1112 .loc 1 2806 2 view .LVU378 +2805:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1113 .loc 1 2805 8 is_stmt 0 view .LVU379 + 1114 009c 0023 movs r3, #0 + 1115 .LVL89: + 1116 .L50: +2806:Src/main.c **** (void) SPI2->DR; + 1117 .loc 1 2806 64 is_stmt 1 discriminator 2 view .LVU380 +2806:Src/main.c **** (void) SPI2->DR; + 1118 .loc 1 2806 42 discriminator 2 view .LVU381 + 1119 .LBB386: + 1120 .LBI386: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1067 .loc 4 905 26 view .LVU367 - 1068 .LBB386: + 1121 .loc 4 905 26 view .LVU382 + 1122 .LBB387: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1069 .loc 4 907 3 view .LVU368 + 1123 .loc 4 907 3 view .LVU383 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1070 .loc 4 907 12 is_stmt 0 view .LVU369 - 1071 009e 0C4A ldr r2, .L49+8 - 1072 00a0 9268 ldr r2, [r2, #8] + 1124 .loc 4 907 12 is_stmt 0 view .LVU384 + 1125 009e 0C4A ldr r2, .L56+8 + 1126 00a0 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1073 .loc 4 907 68 view .LVU370 - 1074 00a2 12F0010F tst r2, #1 - 1075 00a6 05D1 bne .L42 - 1076 .LVL88: + 1127 .loc 4 907 68 view .LVU385 + 1128 00a2 12F0010F tst r2, #1 + 1129 00a6 05D1 bne .L49 + 1130 .LVL90: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1077 .loc 4 907 68 view .LVU371 - 1078 .LBE386: - 1079 .LBE385: -2751:Src/main.c **** (void) SPI2->DR; - 1080 .loc 1 2751 51 discriminator 1 view .LVU372 - 1081 00a8 5A1C adds r2, r3, #1 - 1082 .LVL89: -2751:Src/main.c **** (void) SPI2->DR; - ARM GAS /tmp/ccEQxcUB.s page 149 + 1131 .loc 4 907 68 view .LVU386 + 1132 .LBE387: + 1133 .LBE386: +2806:Src/main.c **** (void) SPI2->DR; + 1134 .loc 1 2806 51 discriminator 1 view .LVU387 + 1135 00a8 5A1C adds r2, r3, #1 + 1136 .LVL91: +2806:Src/main.c **** (void) SPI2->DR; + 1137 .loc 1 2806 42 discriminator 1 view .LVU388 + 1138 00aa B3F57A7F cmp r3, #1000 + 1139 00ae 01D2 bcs .L49 +2806:Src/main.c **** (void) SPI2->DR; + 1140 .loc 1 2806 51 discriminator 1 view .LVU389 + 1141 00b0 1346 mov r3, r2 + 1142 00b2 F4E7 b .L50 + ARM GAS /tmp/ccuHnxNu.s page 151 - 1083 .loc 1 2751 42 discriminator 1 view .LVU373 - 1084 00aa B3F57A7F cmp r3, #1000 - 1085 00ae 01D2 bcs .L42 -2751:Src/main.c **** (void) SPI2->DR; - 1086 .loc 1 2751 51 discriminator 1 view .LVU374 - 1087 00b0 1346 mov r3, r2 - 1088 00b2 F4E7 b .L43 - 1089 .LVL90: - 1090 .L42: -2752:Src/main.c **** - 1091 .loc 1 2752 2 is_stmt 1 view .LVU375 - 1092 00b4 064B ldr r3, .L49+8 - 1093 00b6 DB68 ldr r3, [r3, #12] -2754:Src/main.c **** } - 1094 .loc 1 2754 2 view .LVU376 - 1095 00b8 0122 movs r2, #1 - 1096 00ba 4FF48051 mov r1, #4096 - 1097 00be 0248 ldr r0, .L49 - 1098 00c0 FFF7FEFF bl HAL_GPIO_WritePin - 1099 .LVL91: -2755:Src/main.c **** - 1100 .loc 1 2755 1 is_stmt 0 view .LVU377 - 1101 00c4 38BD pop {r3, r4, r5, pc} - 1102 .LVL92: - 1103 .L50: -2755:Src/main.c **** - 1104 .loc 1 2755 1 view .LVU378 - 1105 00c6 00BF .align 2 - 1106 .L49: - 1107 00c8 00040240 .word 1073873920 - 1108 00cc 000C0240 .word 1073875968 - 1109 00d0 00380040 .word 1073756160 - 1110 .cfi_endproc - 1111 .LFE1217: - 1113 .section .text.AD9102_WriteRegTable,"ax",%progbits - 1114 .align 1 - 1115 .syntax unified - 1116 .thumb - 1117 .thumb_func - 1119 AD9102_WriteRegTable: - 1120 .LVL93: - 1121 .LFB1219: -2793:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 1122 .loc 1 2793 1 is_stmt 1 view -0 - 1123 .cfi_startproc - 1124 @ args = 0, pretend = 0, frame = 0 - 1125 @ frame_needed = 0, uses_anonymous_args = 0 -2793:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 1126 .loc 1 2793 1 is_stmt 0 view .LVU380 - 1127 0000 70B5 push {r4, r5, r6, lr} - 1128 .LCFI10: - 1129 .cfi_def_cfa_offset 16 - 1130 .cfi_offset 4, -16 - 1131 .cfi_offset 5, -12 - 1132 .cfi_offset 6, -8 - 1133 .cfi_offset 14, -4 - 1134 0002 0646 mov r6, r0 - ARM GAS /tmp/ccEQxcUB.s page 150 + 1143 .LVL92: + 1144 .L49: +2807:Src/main.c **** + 1145 .loc 1 2807 2 is_stmt 1 view .LVU390 + 1146 00b4 064B ldr r3, .L56+8 + 1147 00b6 DB68 ldr r3, [r3, #12] +2809:Src/main.c **** } + 1148 .loc 1 2809 2 view .LVU391 + 1149 00b8 0122 movs r2, #1 + 1150 00ba 4FF48051 mov r1, #4096 + 1151 00be 0248 ldr r0, .L56 + 1152 00c0 FFF7FEFF bl HAL_GPIO_WritePin + 1153 .LVL93: +2810:Src/main.c **** + 1154 .loc 1 2810 1 is_stmt 0 view .LVU392 + 1155 00c4 38BD pop {r3, r4, r5, pc} + 1156 .LVL94: + 1157 .L57: +2810:Src/main.c **** + 1158 .loc 1 2810 1 view .LVU393 + 1159 00c6 00BF .align 2 + 1160 .L56: + 1161 00c8 00040240 .word 1073873920 + 1162 00cc 000C0240 .word 1073875968 + 1163 00d0 00380040 .word 1073756160 + 1164 .cfi_endproc + 1165 .LFE1219: + 1167 .section .text.AD9102_WriteRegTable,"ax",%progbits + 1168 .align 1 + 1169 .syntax unified + 1170 .thumb + 1171 .thumb_func + 1173 AD9102_WriteRegTable: + 1174 .LVL95: + 1175 .LFB1221: +2848:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 1176 .loc 1 2848 1 is_stmt 1 view -0 + 1177 .cfi_startproc + 1178 @ args = 0, pretend = 0, frame = 0 + 1179 @ frame_needed = 0, uses_anonymous_args = 0 +2848:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 1180 .loc 1 2848 1 is_stmt 0 view .LVU395 + 1181 0000 70B5 push {r4, r5, r6, lr} + 1182 .LCFI10: + 1183 .cfi_def_cfa_offset 16 + 1184 .cfi_offset 4, -16 + 1185 .cfi_offset 5, -12 + 1186 .cfi_offset 6, -8 + 1187 .cfi_offset 14, -4 + 1188 0002 0646 mov r6, r0 + 1189 0004 0D46 mov r5, r1 +2849:Src/main.c **** { + 1190 .loc 1 2849 2 is_stmt 1 view .LVU396 + 1191 .LBB388: +2849:Src/main.c **** { + 1192 .loc 1 2849 7 view .LVU397 + 1193 .LVL96: + ARM GAS /tmp/ccuHnxNu.s page 152 - 1135 0004 0D46 mov r5, r1 -2794:Src/main.c **** { - 1136 .loc 1 2794 2 is_stmt 1 view .LVU381 - 1137 .LBB387: -2794:Src/main.c **** { - 1138 .loc 1 2794 7 view .LVU382 - 1139 .LVL94: -2794:Src/main.c **** { - 1140 .loc 1 2794 16 is_stmt 0 view .LVU383 - 1141 0006 0024 movs r4, #0 -2794:Src/main.c **** { - 1142 .loc 1 2794 2 view .LVU384 - 1143 0008 08E0 b .L52 - 1144 .LVL95: - 1145 .L53: -2796:Src/main.c **** } - 1146 .loc 1 2796 3 is_stmt 1 view .LVU385 - 1147 000a 36F81410 ldrh r1, [r6, r4, lsl #1] - 1148 000e 054B ldr r3, .L55 - 1149 0010 33F81400 ldrh r0, [r3, r4, lsl #1] - 1150 0014 FFF7FEFF bl AD9102_WriteReg - 1151 .LVL96: -2794:Src/main.c **** { - 1152 .loc 1 2794 35 discriminator 3 view .LVU386 - 1153 0018 0134 adds r4, r4, #1 - 1154 .LVL97: -2794:Src/main.c **** { - 1155 .loc 1 2794 35 is_stmt 0 discriminator 3 view .LVU387 - 1156 001a A4B2 uxth r4, r4 - 1157 .LVL98: - 1158 .L52: -2794:Src/main.c **** { - 1159 .loc 1 2794 25 is_stmt 1 discriminator 1 view .LVU388 - 1160 001c AC42 cmp r4, r5 - 1161 001e F4D3 bcc .L53 - 1162 .LBE387: -2798:Src/main.c **** - 1163 .loc 1 2798 1 is_stmt 0 view .LVU389 - 1164 0020 70BD pop {r4, r5, r6, pc} - 1165 .LVL99: - 1166 .L56: -2798:Src/main.c **** - 1167 .loc 1 2798 1 view .LVU390 - 1168 0022 00BF .align 2 - 1169 .L55: - 1170 0024 00000000 .word ad9102_reg_addr - 1171 .cfi_endproc - 1172 .LFE1219: - 1174 .section .text.AD9102_LoadSramRamp,"ax",%progbits - 1175 .align 1 - 1176 .syntax unified - 1177 .thumb - 1178 .thumb_func - 1180 AD9102_LoadSramRamp: - 1181 .LVL100: - 1182 .LFB1221: -2845:Src/main.c **** if (samples < 2u) - ARM GAS /tmp/ccEQxcUB.s page 151 +2849:Src/main.c **** { + 1194 .loc 1 2849 16 is_stmt 0 view .LVU398 + 1195 0006 0024 movs r4, #0 +2849:Src/main.c **** { + 1196 .loc 1 2849 2 view .LVU399 + 1197 0008 08E0 b .L59 + 1198 .LVL97: + 1199 .L60: +2851:Src/main.c **** } + 1200 .loc 1 2851 3 is_stmt 1 view .LVU400 + 1201 000a 36F81410 ldrh r1, [r6, r4, lsl #1] + 1202 000e 054B ldr r3, .L62 + 1203 0010 33F81400 ldrh r0, [r3, r4, lsl #1] + 1204 0014 FFF7FEFF bl AD9102_WriteReg + 1205 .LVL98: +2849:Src/main.c **** { + 1206 .loc 1 2849 35 discriminator 3 view .LVU401 + 1207 0018 0134 adds r4, r4, #1 + 1208 .LVL99: +2849:Src/main.c **** { + 1209 .loc 1 2849 35 is_stmt 0 discriminator 3 view .LVU402 + 1210 001a A4B2 uxth r4, r4 + 1211 .LVL100: + 1212 .L59: +2849:Src/main.c **** { + 1213 .loc 1 2849 25 is_stmt 1 discriminator 1 view .LVU403 + 1214 001c AC42 cmp r4, r5 + 1215 001e F4D3 bcc .L60 + 1216 .LBE388: +2853:Src/main.c **** + 1217 .loc 1 2853 1 is_stmt 0 view .LVU404 + 1218 0020 70BD pop {r4, r5, r6, pc} + 1219 .LVL101: + 1220 .L63: +2853:Src/main.c **** + 1221 .loc 1 2853 1 view .LVU405 + 1222 0022 00BF .align 2 + 1223 .L62: + 1224 0024 00000000 .word ad9102_reg_addr + 1225 .cfi_endproc + 1226 .LFE1221: + 1228 .section .text.AD9102_LoadSramRamp,"ax",%progbits + 1229 .align 1 + 1230 .syntax unified + 1231 .thumb + 1232 .thumb_func + 1234 AD9102_LoadSramRamp: + 1235 .LVL102: + 1236 .LFB1223: +2900:Src/main.c **** if (samples < 2u) + 1237 .loc 1 2900 1 is_stmt 1 view -0 + 1238 .cfi_startproc + 1239 @ args = 0, pretend = 0, frame = 0 + 1240 @ frame_needed = 0, uses_anonymous_args = 0 +2900:Src/main.c **** if (samples < 2u) + 1241 .loc 1 2900 1 is_stmt 0 view .LVU407 + 1242 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + ARM GAS /tmp/ccuHnxNu.s page 153 - 1183 .loc 1 2845 1 is_stmt 1 view -0 - 1184 .cfi_startproc - 1185 @ args = 0, pretend = 0, frame = 0 - 1186 @ frame_needed = 0, uses_anonymous_args = 0 -2845:Src/main.c **** if (samples < 2u) - 1187 .loc 1 2845 1 is_stmt 0 view .LVU392 - 1188 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 1189 .LCFI11: - 1190 .cfi_def_cfa_offset 24 - 1191 .cfi_offset 3, -24 - 1192 .cfi_offset 4, -20 - 1193 .cfi_offset 5, -16 - 1194 .cfi_offset 6, -12 - 1195 .cfi_offset 7, -8 - 1196 .cfi_offset 14, -4 - 1197 0002 0F46 mov r7, r1 - 1198 0004 1646 mov r6, r2 -2846:Src/main.c **** { - 1199 .loc 1 2846 2 is_stmt 1 view .LVU393 -2846:Src/main.c **** { - 1200 .loc 1 2846 5 is_stmt 0 view .LVU394 - 1201 0006 0128 cmp r0, #1 - 1202 0008 06D9 bls .L71 - 1203 000a 0546 mov r5, r0 -2850:Src/main.c **** { - 1204 .loc 1 2850 2 is_stmt 1 view .LVU395 -2850:Src/main.c **** { - 1205 .loc 1 2850 5 is_stmt 0 view .LVU396 - 1206 000c B0F5805F cmp r0, #4096 - 1207 0010 03D9 bls .L58 -2852:Src/main.c **** } - 1208 .loc 1 2852 11 view .LVU397 - 1209 0012 4FF48055 mov r5, #4096 - 1210 0016 00E0 b .L58 - 1211 .L71: -2848:Src/main.c **** } - 1212 .loc 1 2848 11 view .LVU398 - 1213 0018 0225 movs r5, #2 - 1214 .L58: - 1215 .LVL101: -2854:Src/main.c **** { - 1216 .loc 1 2854 2 is_stmt 1 view .LVU399 -2854:Src/main.c **** { - 1217 .loc 1 2854 5 is_stmt 0 view .LVU400 - 1218 001a B6F5005F cmp r6, #8192 - 1219 001e 01D3 bcc .L59 -2856:Src/main.c **** } - 1220 .loc 1 2856 13 view .LVU401 - 1221 0020 41F6FF76 movw r6, #8191 - 1222 .L59: - 1223 .LVL102: -2860:Src/main.c **** - 1224 .loc 1 2860 2 is_stmt 1 view .LVU402 - 1225 0024 0421 movs r1, #4 - 1226 .LVL103: -2860:Src/main.c **** - 1227 .loc 1 2860 2 is_stmt 0 view .LVU403 - ARM GAS /tmp/ccEQxcUB.s page 152 + 1243 .LCFI11: + 1244 .cfi_def_cfa_offset 24 + 1245 .cfi_offset 3, -24 + 1246 .cfi_offset 4, -20 + 1247 .cfi_offset 5, -16 + 1248 .cfi_offset 6, -12 + 1249 .cfi_offset 7, -8 + 1250 .cfi_offset 14, -4 + 1251 0002 0F46 mov r7, r1 + 1252 0004 1646 mov r6, r2 +2901:Src/main.c **** { + 1253 .loc 1 2901 2 is_stmt 1 view .LVU408 +2901:Src/main.c **** { + 1254 .loc 1 2901 5 is_stmt 0 view .LVU409 + 1255 0006 0128 cmp r0, #1 + 1256 0008 06D9 bls .L78 + 1257 000a 0546 mov r5, r0 +2905:Src/main.c **** { + 1258 .loc 1 2905 2 is_stmt 1 view .LVU410 +2905:Src/main.c **** { + 1259 .loc 1 2905 5 is_stmt 0 view .LVU411 + 1260 000c B0F5805F cmp r0, #4096 + 1261 0010 03D9 bls .L65 +2907:Src/main.c **** } + 1262 .loc 1 2907 11 view .LVU412 + 1263 0012 4FF48055 mov r5, #4096 + 1264 0016 00E0 b .L65 + 1265 .L78: +2903:Src/main.c **** } + 1266 .loc 1 2903 11 view .LVU413 + 1267 0018 0225 movs r5, #2 + 1268 .L65: + 1269 .LVL103: +2909:Src/main.c **** { + 1270 .loc 1 2909 2 is_stmt 1 view .LVU414 +2909:Src/main.c **** { + 1271 .loc 1 2909 5 is_stmt 0 view .LVU415 + 1272 001a B6F5005F cmp r6, #8192 + 1273 001e 01D3 bcc .L66 +2911:Src/main.c **** } + 1274 .loc 1 2911 13 view .LVU416 + 1275 0020 41F6FF76 movw r6, #8191 + 1276 .L66: + 1277 .LVL104: +2915:Src/main.c **** + 1278 .loc 1 2915 2 is_stmt 1 view .LVU417 + 1279 0024 0421 movs r1, #4 + 1280 .LVL105: +2915:Src/main.c **** + 1281 .loc 1 2915 2 is_stmt 0 view .LVU418 + 1282 0026 1E20 movs r0, #30 + 1283 0028 FFF7FEFF bl AD9102_WriteReg + 1284 .LVL106: +2917:Src/main.c **** { + 1285 .loc 1 2917 2 is_stmt 1 view .LVU419 + 1286 .LBB389: +2917:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 154 - 1228 0026 1E20 movs r0, #30 - 1229 0028 FFF7FEFF bl AD9102_WriteReg - 1230 .LVL104: -2862:Src/main.c **** { - 1231 .loc 1 2862 2 is_stmt 1 view .LVU404 - 1232 .LBB388: -2862:Src/main.c **** { - 1233 .loc 1 2862 7 view .LVU405 -2862:Src/main.c **** { - 1234 .loc 1 2862 16 is_stmt 0 view .LVU406 - 1235 002c 0024 movs r4, #0 -2862:Src/main.c **** { - 1236 .loc 1 2862 2 view .LVU407 - 1237 002e 2DE0 b .L60 - 1238 .LVL105: - 1239 .L82: - 1240 .LBB389: - 1241 .LBB390: -2873:Src/main.c **** } - 1242 .loc 1 2873 10 view .LVU408 - 1243 0030 0122 movs r2, #1 - 1244 .LVL106: -2873:Src/main.c **** } - 1245 .loc 1 2873 10 view .LVU409 - 1246 0032 34E0 b .L62 - 1247 .LVL107: - 1248 .L75: - 1249 .LBB391: -2877:Src/main.c **** if (span == 0) - 1250 .loc 1 2877 14 discriminator 2 view .LVU410 - 1251 0034 0122 movs r2, #1 - 1252 .LVL108: -2877:Src/main.c **** if (span == 0) - 1253 .loc 1 2877 14 discriminator 2 view .LVU411 - 1254 0036 38E0 b .L64 - 1255 .LVL109: - 1256 .L63: -2877:Src/main.c **** if (span == 0) - 1257 .loc 1 2877 14 discriminator 2 view .LVU412 - 1258 .LBE391: - 1259 .LBB392: -2889:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; - 1260 .loc 1 2889 5 is_stmt 1 view .LVU413 -2889:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; - 1261 .loc 1 2889 14 is_stmt 0 view .LVU414 - 1262 0038 A91A subs r1, r5, r2 - 1263 003a 89B2 uxth r1, r1 - 1264 .LVL110: -2890:Src/main.c **** if (span == 0) - 1265 .loc 1 2890 5 is_stmt 1 view .LVU415 -2890:Src/main.c **** if (span == 0) - 1266 .loc 1 2890 14 is_stmt 0 view .LVU416 - 1267 003c 0129 cmp r1, #1 - 1268 003e 09D9 bls .L76 -2890:Src/main.c **** if (span == 0) - 1269 .loc 1 2890 14 discriminator 1 view .LVU417 - 1270 0040 0139 subs r1, r1, #1 - ARM GAS /tmp/ccEQxcUB.s page 153 + 1287 .loc 1 2917 7 view .LVU420 +2917:Src/main.c **** { + 1288 .loc 1 2917 16 is_stmt 0 view .LVU421 + 1289 002c 0024 movs r4, #0 +2917:Src/main.c **** { + 1290 .loc 1 2917 2 view .LVU422 + 1291 002e 2DE0 b .L67 + 1292 .LVL107: + 1293 .L89: + 1294 .LBB390: + 1295 .LBB391: +2928:Src/main.c **** } + 1296 .loc 1 2928 10 view .LVU423 + 1297 0030 0122 movs r2, #1 + 1298 .LVL108: +2928:Src/main.c **** } + 1299 .loc 1 2928 10 view .LVU424 + 1300 0032 34E0 b .L69 + 1301 .LVL109: + 1302 .L82: + 1303 .LBB392: +2932:Src/main.c **** if (span == 0) + 1304 .loc 1 2932 14 discriminator 2 view .LVU425 + 1305 0034 0122 movs r2, #1 + 1306 .LVL110: +2932:Src/main.c **** if (span == 0) + 1307 .loc 1 2932 14 discriminator 2 view .LVU426 + 1308 0036 38E0 b .L71 + 1309 .LVL111: + 1310 .L70: +2932:Src/main.c **** if (span == 0) + 1311 .loc 1 2932 14 discriminator 2 view .LVU427 + 1312 .LBE392: + 1313 .LBB393: +2944:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; + 1314 .loc 1 2944 5 is_stmt 1 view .LVU428 +2944:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; + 1315 .loc 1 2944 14 is_stmt 0 view .LVU429 + 1316 0038 A91A subs r1, r5, r2 + 1317 003a 89B2 uxth r1, r1 + 1318 .LVL112: +2945:Src/main.c **** if (span == 0) + 1319 .loc 1 2945 5 is_stmt 1 view .LVU430 +2945:Src/main.c **** if (span == 0) + 1320 .loc 1 2945 14 is_stmt 0 view .LVU431 + 1321 003c 0129 cmp r1, #1 + 1322 003e 09D9 bls .L83 +2945:Src/main.c **** if (span == 0) + 1323 .loc 1 2945 14 discriminator 1 view .LVU432 + 1324 0040 0139 subs r1, r1, #1 + 1325 .LVL113: +2945:Src/main.c **** if (span == 0) + 1326 .loc 1 2945 14 discriminator 1 view .LVU433 + 1327 0042 89B2 uxth r1, r1 + 1328 .LVL114: + 1329 .L74: +2946:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 155 - 1271 .LVL111: -2890:Src/main.c **** if (span == 0) - 1272 .loc 1 2890 14 discriminator 1 view .LVU418 - 1273 0042 89B2 uxth r1, r1 - 1274 .LVL112: - 1275 .L67: -2891:Src/main.c **** { - 1276 .loc 1 2891 5 is_stmt 1 view .LVU419 -2891:Src/main.c **** { - 1277 .loc 1 2891 8 is_stmt 0 view .LVU420 - 1278 0044 ABB1 cbz r3, .L65 -2897:Src/main.c **** } - 1279 .loc 1 2897 6 is_stmt 1 view .LVU421 -2897:Src/main.c **** } - 1280 .loc 1 2897 44 is_stmt 0 view .LVU422 - 1281 0046 A21A subs r2, r4, r2 - 1282 .LVL113: -2897:Src/main.c **** } - 1283 .loc 1 2897 30 view .LVU423 - 1284 0048 03FB02F2 mul r2, r3, r2 -2897:Src/main.c **** } - 1285 .loc 1 2897 53 view .LVU424 - 1286 004c 92FBF1F2 sdiv r2, r2, r1 -2897:Src/main.c **** } - 1287 .loc 1 2897 12 view .LVU425 - 1288 0050 831A subs r3, r0, r2 - 1289 .LVL114: -2897:Src/main.c **** } - 1290 .loc 1 2897 12 view .LVU426 - 1291 0052 0BE0 b .L66 - 1292 .LVL115: - 1293 .L76: -2890:Src/main.c **** if (span == 0) - 1294 .loc 1 2890 14 discriminator 2 view .LVU427 - 1295 0054 0121 movs r1, #1 - 1296 .LVL116: -2890:Src/main.c **** if (span == 0) - 1297 .loc 1 2890 14 discriminator 2 view .LVU428 - 1298 0056 F5E7 b .L67 - 1299 .LVL117: - 1300 .L61: -2890:Src/main.c **** if (span == 0) - 1301 .loc 1 2890 14 discriminator 2 view .LVU429 - 1302 .LBE392: - 1303 .LBE390: - 1304 .LBB394: -2903:Src/main.c **** if (span == 0) - 1305 .loc 1 2903 4 is_stmt 1 view .LVU430 -2903:Src/main.c **** if (span == 0) - 1306 .loc 1 2903 13 is_stmt 0 view .LVU431 - 1307 0058 012D cmp r5, #1 - 1308 005a 2ED9 bls .L77 -2903:Src/main.c **** if (span == 0) - 1309 .loc 1 2903 13 discriminator 1 view .LVU432 - 1310 005c 6A1E subs r2, r5, #1 - 1311 005e 92B2 uxth r2, r2 - 1312 .L68: - ARM GAS /tmp/ccEQxcUB.s page 154 + 1330 .loc 1 2946 5 is_stmt 1 view .LVU434 +2946:Src/main.c **** { + 1331 .loc 1 2946 8 is_stmt 0 view .LVU435 + 1332 0044 ABB1 cbz r3, .L72 +2952:Src/main.c **** } + 1333 .loc 1 2952 6 is_stmt 1 view .LVU436 +2952:Src/main.c **** } + 1334 .loc 1 2952 44 is_stmt 0 view .LVU437 + 1335 0046 A21A subs r2, r4, r2 + 1336 .LVL115: +2952:Src/main.c **** } + 1337 .loc 1 2952 30 view .LVU438 + 1338 0048 03FB02F2 mul r2, r3, r2 +2952:Src/main.c **** } + 1339 .loc 1 2952 53 view .LVU439 + 1340 004c 92FBF1F2 sdiv r2, r2, r1 +2952:Src/main.c **** } + 1341 .loc 1 2952 12 view .LVU440 + 1342 0050 831A subs r3, r0, r2 + 1343 .LVL116: +2952:Src/main.c **** } + 1344 .loc 1 2952 12 view .LVU441 + 1345 0052 0BE0 b .L73 + 1346 .LVL117: + 1347 .L83: +2945:Src/main.c **** if (span == 0) + 1348 .loc 1 2945 14 discriminator 2 view .LVU442 + 1349 0054 0121 movs r1, #1 + 1350 .LVL118: +2945:Src/main.c **** if (span == 0) + 1351 .loc 1 2945 14 discriminator 2 view .LVU443 + 1352 0056 F5E7 b .L74 + 1353 .LVL119: + 1354 .L68: +2945:Src/main.c **** if (span == 0) + 1355 .loc 1 2945 14 discriminator 2 view .LVU444 + 1356 .LBE393: + 1357 .LBE391: + 1358 .LBB395: +2958:Src/main.c **** if (span == 0) + 1359 .loc 1 2958 4 is_stmt 1 view .LVU445 +2958:Src/main.c **** if (span == 0) + 1360 .loc 1 2958 13 is_stmt 0 view .LVU446 + 1361 0058 012D cmp r5, #1 + 1362 005a 2ED9 bls .L84 +2958:Src/main.c **** if (span == 0) + 1363 .loc 1 2958 13 discriminator 1 view .LVU447 + 1364 005c 6A1E subs r2, r5, #1 + 1365 005e 92B2 uxth r2, r2 + 1366 .L75: + 1367 .LVL120: +2959:Src/main.c **** { + 1368 .loc 1 2959 4 is_stmt 1 view .LVU448 +2959:Src/main.c **** { + 1369 .loc 1 2959 7 is_stmt 0 view .LVU449 + 1370 0060 3BB1 cbz r3, .L72 +2965:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 156 - 1313 .LVL118: -2904:Src/main.c **** { - 1314 .loc 1 2904 4 is_stmt 1 view .LVU433 -2904:Src/main.c **** { - 1315 .loc 1 2904 7 is_stmt 0 view .LVU434 - 1316 0060 3BB1 cbz r3, .L65 -2910:Src/main.c **** } - 1317 .loc 1 2910 5 is_stmt 1 view .LVU435 -2910:Src/main.c **** } - 1318 .loc 1 2910 29 is_stmt 0 view .LVU436 - 1319 0062 04FB03F3 mul r3, r4, r3 - 1320 .LVL119: -2910:Src/main.c **** } - 1321 .loc 1 2910 43 view .LVU437 - 1322 0066 93FBF2F3 sdiv r3, r3, r2 - 1323 006a 1B1A subs r3, r3, r0 - 1324 .LVL120: - 1325 .L66: -2910:Src/main.c **** } - 1326 .loc 1 2910 43 view .LVU438 - 1327 .LBE394: -2914:Src/main.c **** { - 1328 .loc 1 2914 3 is_stmt 1 view .LVU439 -2914:Src/main.c **** { - 1329 .loc 1 2914 6 is_stmt 0 view .LVU440 - 1330 006c 13F5005F cmn r3, #8192 - 1331 0070 25DB blt .L78 - 1332 .LVL121: - 1333 .L65: -2918:Src/main.c **** { - 1334 .loc 1 2918 8 is_stmt 1 view .LVU441 -2918:Src/main.c **** { - 1335 .loc 1 2918 11 is_stmt 0 view .LVU442 - 1336 0072 B3F5005F cmp r3, #8192 - 1337 0076 24DA bge .L79 - 1338 .L69: - 1339 .LVL122: -2923:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); - 1340 .loc 1 2923 3 is_stmt 1 view .LVU443 -2923:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); - 1341 .loc 1 2923 25 is_stmt 0 view .LVU444 - 1342 0078 99B2 uxth r1, r3 - 1343 .LVL123: -2924:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); - 1344 .loc 1 2924 3 is_stmt 1 view .LVU445 -2925:Src/main.c **** } - 1345 .loc 1 2925 3 view .LVU446 - 1346 007a 8900 lsls r1, r1, #2 - 1347 .LVL124: -2925:Src/main.c **** } - 1348 .loc 1 2925 3 is_stmt 0 view .LVU447 - 1349 007c 89B2 uxth r1, r1 - 1350 007e 04F5C040 add r0, r4, #24576 - 1351 .LVL125: -2925:Src/main.c **** } - 1352 .loc 1 2925 3 view .LVU448 - 1353 0082 80B2 uxth r0, r0 - ARM GAS /tmp/ccEQxcUB.s page 155 + 1371 .loc 1 2965 5 is_stmt 1 view .LVU450 +2965:Src/main.c **** } + 1372 .loc 1 2965 29 is_stmt 0 view .LVU451 + 1373 0062 04FB03F3 mul r3, r4, r3 + 1374 .LVL121: +2965:Src/main.c **** } + 1375 .loc 1 2965 43 view .LVU452 + 1376 0066 93FBF2F3 sdiv r3, r3, r2 + 1377 006a 1B1A subs r3, r3, r0 + 1378 .LVL122: + 1379 .L73: +2965:Src/main.c **** } + 1380 .loc 1 2965 43 view .LVU453 + 1381 .LBE395: +2969:Src/main.c **** { + 1382 .loc 1 2969 3 is_stmt 1 view .LVU454 +2969:Src/main.c **** { + 1383 .loc 1 2969 6 is_stmt 0 view .LVU455 + 1384 006c 13F5005F cmn r3, #8192 + 1385 0070 25DB blt .L85 + 1386 .LVL123: + 1387 .L72: +2973:Src/main.c **** { + 1388 .loc 1 2973 8 is_stmt 1 view .LVU456 +2973:Src/main.c **** { + 1389 .loc 1 2973 11 is_stmt 0 view .LVU457 + 1390 0072 B3F5005F cmp r3, #8192 + 1391 0076 24DA bge .L86 + 1392 .L76: + 1393 .LVL124: +2978:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); + 1394 .loc 1 2978 3 is_stmt 1 view .LVU458 +2978:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); + 1395 .loc 1 2978 25 is_stmt 0 view .LVU459 + 1396 0078 99B2 uxth r1, r3 + 1397 .LVL125: +2979:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); + 1398 .loc 1 2979 3 is_stmt 1 view .LVU460 +2980:Src/main.c **** } + 1399 .loc 1 2980 3 view .LVU461 + 1400 007a 8900 lsls r1, r1, #2 + 1401 .LVL126: +2980:Src/main.c **** } + 1402 .loc 1 2980 3 is_stmt 0 view .LVU462 + 1403 007c 89B2 uxth r1, r1 + 1404 007e 04F5C040 add r0, r4, #24576 + 1405 .LVL127: +2980:Src/main.c **** } + 1406 .loc 1 2980 3 view .LVU463 + 1407 0082 80B2 uxth r0, r0 + 1408 0084 FFF7FEFF bl AD9102_WriteReg + 1409 .LVL128: +2980:Src/main.c **** } + 1410 .loc 1 2980 3 view .LVU464 + 1411 .LBE390: +2917:Src/main.c **** { + 1412 .loc 1 2917 37 is_stmt 1 discriminator 2 view .LVU465 + ARM GAS /tmp/ccuHnxNu.s page 157 - 1354 0084 FFF7FEFF bl AD9102_WriteReg - 1355 .LVL126: -2925:Src/main.c **** } - 1356 .loc 1 2925 3 view .LVU449 - 1357 .LBE389: -2862:Src/main.c **** { - 1358 .loc 1 2862 37 is_stmt 1 discriminator 2 view .LVU450 - 1359 0088 0134 adds r4, r4, #1 - 1360 .LVL127: -2862:Src/main.c **** { - 1361 .loc 1 2862 37 is_stmt 0 discriminator 2 view .LVU451 - 1362 008a A4B2 uxth r4, r4 - 1363 .LVL128: - 1364 .L60: -2862:Src/main.c **** { - 1365 .loc 1 2862 25 is_stmt 1 discriminator 1 view .LVU452 - 1366 008c A542 cmp r5, r4 - 1367 008e 1BD9 bls .L81 - 1368 .LBB397: -2864:Src/main.c **** int32_t min_val = -(int32_t)amplitude; - 1369 .loc 1 2864 3 view .LVU453 -2865:Src/main.c **** int32_t max_val = (int32_t)amplitude; - 1370 .loc 1 2865 3 view .LVU454 -2865:Src/main.c **** int32_t max_val = (int32_t)amplitude; - 1371 .loc 1 2865 22 is_stmt 0 view .LVU455 - 1372 0090 3046 mov r0, r6 - 1373 .LVL129: -2866:Src/main.c **** int32_t span = max_val - min_val; - 1374 .loc 1 2866 3 is_stmt 1 view .LVU456 -2867:Src/main.c **** if (triangle) - 1375 .loc 1 2867 3 view .LVU457 -2867:Src/main.c **** if (triangle) - 1376 .loc 1 2867 11 is_stmt 0 view .LVU458 - 1377 0092 7300 lsls r3, r6, #1 - 1378 .LVL130: -2868:Src/main.c **** { - 1379 .loc 1 2868 3 is_stmt 1 view .LVU459 -2868:Src/main.c **** { - 1380 .loc 1 2868 6 is_stmt 0 view .LVU460 - 1381 0094 002F cmp r7, #0 - 1382 0096 DFD0 beq .L61 - 1383 .LBB395: -2870:Src/main.c **** if (half == 0u) - 1384 .loc 1 2870 4 is_stmt 1 view .LVU461 -2870:Src/main.c **** if (half == 0u) - 1385 .loc 1 2870 13 is_stmt 0 view .LVU462 - 1386 0098 6A08 lsrs r2, r5, #1 - 1387 .LVL131: -2871:Src/main.c **** { - 1388 .loc 1 2871 4 is_stmt 1 view .LVU463 -2871:Src/main.c **** { - 1389 .loc 1 2871 7 is_stmt 0 view .LVU464 - 1390 009a 012D cmp r5, #1 - 1391 009c C8D9 bls .L82 - 1392 .LVL132: - 1393 .L62: -2875:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 156 + 1413 0088 0134 adds r4, r4, #1 + 1414 .LVL129: +2917:Src/main.c **** { + 1415 .loc 1 2917 37 is_stmt 0 discriminator 2 view .LVU466 + 1416 008a A4B2 uxth r4, r4 + 1417 .LVL130: + 1418 .L67: +2917:Src/main.c **** { + 1419 .loc 1 2917 25 is_stmt 1 discriminator 1 view .LVU467 + 1420 008c A542 cmp r5, r4 + 1421 008e 1BD9 bls .L88 + 1422 .LBB398: +2919:Src/main.c **** int32_t min_val = -(int32_t)amplitude; + 1423 .loc 1 2919 3 view .LVU468 +2920:Src/main.c **** int32_t max_val = (int32_t)amplitude; + 1424 .loc 1 2920 3 view .LVU469 +2920:Src/main.c **** int32_t max_val = (int32_t)amplitude; + 1425 .loc 1 2920 22 is_stmt 0 view .LVU470 + 1426 0090 3046 mov r0, r6 + 1427 .LVL131: +2921:Src/main.c **** int32_t span = max_val - min_val; + 1428 .loc 1 2921 3 is_stmt 1 view .LVU471 +2922:Src/main.c **** if (triangle) + 1429 .loc 1 2922 3 view .LVU472 +2922:Src/main.c **** if (triangle) + 1430 .loc 1 2922 11 is_stmt 0 view .LVU473 + 1431 0092 7300 lsls r3, r6, #1 + 1432 .LVL132: +2923:Src/main.c **** { + 1433 .loc 1 2923 3 is_stmt 1 view .LVU474 +2923:Src/main.c **** { + 1434 .loc 1 2923 6 is_stmt 0 view .LVU475 + 1435 0094 002F cmp r7, #0 + 1436 0096 DFD0 beq .L68 + 1437 .LBB396: +2925:Src/main.c **** if (half == 0u) + 1438 .loc 1 2925 4 is_stmt 1 view .LVU476 +2925:Src/main.c **** if (half == 0u) + 1439 .loc 1 2925 13 is_stmt 0 view .LVU477 + 1440 0098 6A08 lsrs r2, r5, #1 + 1441 .LVL133: +2926:Src/main.c **** { + 1442 .loc 1 2926 4 is_stmt 1 view .LVU478 +2926:Src/main.c **** { + 1443 .loc 1 2926 7 is_stmt 0 view .LVU479 + 1444 009a 012D cmp r5, #1 + 1445 009c C8D9 bls .L89 + 1446 .LVL134: + 1447 .L69: +2930:Src/main.c **** { + 1448 .loc 1 2930 4 is_stmt 1 view .LVU480 +2930:Src/main.c **** { + 1449 .loc 1 2930 7 is_stmt 0 view .LVU481 + 1450 009e 9442 cmp r4, r2 + 1451 00a0 CAD2 bcs .L70 + 1452 .LBB394: +2932:Src/main.c **** if (span == 0) + ARM GAS /tmp/ccuHnxNu.s page 158 - 1394 .loc 1 2875 4 is_stmt 1 view .LVU465 -2875:Src/main.c **** { - 1395 .loc 1 2875 7 is_stmt 0 view .LVU466 - 1396 009e 9442 cmp r4, r2 - 1397 00a0 CAD2 bcs .L63 - 1398 .LBB393: -2877:Src/main.c **** if (span == 0) - 1399 .loc 1 2877 5 is_stmt 1 view .LVU467 -2877:Src/main.c **** if (span == 0) - 1400 .loc 1 2877 14 is_stmt 0 view .LVU468 - 1401 00a2 012A cmp r2, #1 - 1402 00a4 C6D9 bls .L75 -2877:Src/main.c **** if (span == 0) - 1403 .loc 1 2877 14 discriminator 1 view .LVU469 - 1404 00a6 013A subs r2, r2, #1 - 1405 .LVL133: -2877:Src/main.c **** if (span == 0) - 1406 .loc 1 2877 14 discriminator 1 view .LVU470 - 1407 00a8 92B2 uxth r2, r2 - 1408 .LVL134: - 1409 .L64: -2878:Src/main.c **** { - 1410 .loc 1 2878 5 is_stmt 1 view .LVU471 -2878:Src/main.c **** { - 1411 .loc 1 2878 8 is_stmt 0 view .LVU472 - 1412 00aa 002B cmp r3, #0 - 1413 00ac E1D0 beq .L65 -2884:Src/main.c **** } - 1414 .loc 1 2884 6 is_stmt 1 view .LVU473 -2884:Src/main.c **** } - 1415 .loc 1 2884 30 is_stmt 0 view .LVU474 - 1416 00ae 04FB03F3 mul r3, r4, r3 - 1417 .LVL135: -2884:Src/main.c **** } - 1418 .loc 1 2884 44 view .LVU475 - 1419 00b2 93FBF2F3 sdiv r3, r3, r2 - 1420 00b6 1B1A subs r3, r3, r0 - 1421 .LVL136: -2884:Src/main.c **** } - 1422 .loc 1 2884 44 view .LVU476 - 1423 00b8 D8E7 b .L66 - 1424 .LVL137: - 1425 .L77: -2884:Src/main.c **** } - 1426 .loc 1 2884 44 view .LVU477 - 1427 .LBE393: - 1428 .LBE395: - 1429 .LBB396: -2903:Src/main.c **** if (span == 0) - 1430 .loc 1 2903 13 discriminator 2 view .LVU478 - 1431 00ba 0122 movs r2, #1 - 1432 00bc D0E7 b .L68 - 1433 .LVL138: - 1434 .L78: -2903:Src/main.c **** if (span == 0) - 1435 .loc 1 2903 13 discriminator 2 view .LVU479 - 1436 .LBE396: - ARM GAS /tmp/ccEQxcUB.s page 157 + 1453 .loc 1 2932 5 is_stmt 1 view .LVU482 +2932:Src/main.c **** if (span == 0) + 1454 .loc 1 2932 14 is_stmt 0 view .LVU483 + 1455 00a2 012A cmp r2, #1 + 1456 00a4 C6D9 bls .L82 +2932:Src/main.c **** if (span == 0) + 1457 .loc 1 2932 14 discriminator 1 view .LVU484 + 1458 00a6 013A subs r2, r2, #1 + 1459 .LVL135: +2932:Src/main.c **** if (span == 0) + 1460 .loc 1 2932 14 discriminator 1 view .LVU485 + 1461 00a8 92B2 uxth r2, r2 + 1462 .LVL136: + 1463 .L71: +2933:Src/main.c **** { + 1464 .loc 1 2933 5 is_stmt 1 view .LVU486 +2933:Src/main.c **** { + 1465 .loc 1 2933 8 is_stmt 0 view .LVU487 + 1466 00aa 002B cmp r3, #0 + 1467 00ac E1D0 beq .L72 +2939:Src/main.c **** } + 1468 .loc 1 2939 6 is_stmt 1 view .LVU488 +2939:Src/main.c **** } + 1469 .loc 1 2939 30 is_stmt 0 view .LVU489 + 1470 00ae 04FB03F3 mul r3, r4, r3 + 1471 .LVL137: +2939:Src/main.c **** } + 1472 .loc 1 2939 44 view .LVU490 + 1473 00b2 93FBF2F3 sdiv r3, r3, r2 + 1474 00b6 1B1A subs r3, r3, r0 + 1475 .LVL138: +2939:Src/main.c **** } + 1476 .loc 1 2939 44 view .LVU491 + 1477 00b8 D8E7 b .L73 + 1478 .LVL139: + 1479 .L84: +2939:Src/main.c **** } + 1480 .loc 1 2939 44 view .LVU492 + 1481 .LBE394: + 1482 .LBE396: + 1483 .LBB397: +2958:Src/main.c **** if (span == 0) + 1484 .loc 1 2958 13 discriminator 2 view .LVU493 + 1485 00ba 0122 movs r2, #1 + 1486 00bc D0E7 b .L75 + 1487 .LVL140: + 1488 .L85: +2958:Src/main.c **** if (span == 0) + 1489 .loc 1 2958 13 discriminator 2 view .LVU494 + 1490 .LBE397: +2971:Src/main.c **** } + 1491 .loc 1 2971 10 view .LVU495 + 1492 00be 054B ldr r3, .L90 + 1493 .LVL141: +2971:Src/main.c **** } + 1494 .loc 1 2971 10 view .LVU496 + 1495 00c0 DAE7 b .L76 + ARM GAS /tmp/ccuHnxNu.s page 159 -2916:Src/main.c **** } - 1437 .loc 1 2916 10 view .LVU480 - 1438 00be 054B ldr r3, .L83 - 1439 .LVL139: -2916:Src/main.c **** } - 1440 .loc 1 2916 10 view .LVU481 - 1441 00c0 DAE7 b .L69 - 1442 .LVL140: - 1443 .L79: -2920:Src/main.c **** } - 1444 .loc 1 2920 10 view .LVU482 - 1445 00c2 41F6FF73 movw r3, #8191 - 1446 00c6 D7E7 b .L69 - 1447 .LVL141: - 1448 .L81: -2920:Src/main.c **** } - 1449 .loc 1 2920 10 view .LVU483 - 1450 .LBE397: - 1451 .LBE388: -2929:Src/main.c **** } - 1452 .loc 1 2929 2 is_stmt 1 view .LVU484 - 1453 00c8 0021 movs r1, #0 - 1454 00ca 1E20 movs r0, #30 - 1455 00cc FFF7FEFF bl AD9102_WriteReg - 1456 .LVL142: -2930:Src/main.c **** - 1457 .loc 1 2930 1 is_stmt 0 view .LVU485 - 1458 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} - 1459 .LVL143: - 1460 .L84: -2930:Src/main.c **** - 1461 .loc 1 2930 1 view .LVU486 - 1462 00d2 00BF .align 2 - 1463 .L83: - 1464 00d4 00E0FFFF .word -8192 - 1465 .cfi_endproc - 1466 .LFE1221: - 1468 .section .text.AD9102_Init,"ax",%progbits - 1469 .align 1 - 1470 .syntax unified - 1471 .thumb - 1472 .thumb_func - 1474 AD9102_Init: - 1475 .LFB1212: -2627:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 1476 .loc 1 2627 1 is_stmt 1 view -0 - 1477 .cfi_startproc - 1478 @ args = 0, pretend = 0, frame = 8 - 1479 @ frame_needed = 0, uses_anonymous_args = 0 - 1480 0000 00B5 push {lr} - 1481 .LCFI12: - 1482 .cfi_def_cfa_offset 4 - 1483 .cfi_offset 14, -4 - 1484 0002 83B0 sub sp, sp, #12 - 1485 .LCFI13: - 1486 .cfi_def_cfa_offset 16 -2628:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); - ARM GAS /tmp/ccEQxcUB.s page 158 + 1496 .LVL142: + 1497 .L86: +2975:Src/main.c **** } + 1498 .loc 1 2975 10 view .LVU497 + 1499 00c2 41F6FF73 movw r3, #8191 + 1500 00c6 D7E7 b .L76 + 1501 .LVL143: + 1502 .L88: +2975:Src/main.c **** } + 1503 .loc 1 2975 10 view .LVU498 + 1504 .LBE398: + 1505 .LBE389: +2984:Src/main.c **** } + 1506 .loc 1 2984 2 is_stmt 1 view .LVU499 + 1507 00c8 0021 movs r1, #0 + 1508 00ca 1E20 movs r0, #30 + 1509 00cc FFF7FEFF bl AD9102_WriteReg + 1510 .LVL144: +2985:Src/main.c **** + 1511 .loc 1 2985 1 is_stmt 0 view .LVU500 + 1512 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} + 1513 .LVL145: + 1514 .L91: +2985:Src/main.c **** + 1515 .loc 1 2985 1 view .LVU501 + 1516 00d2 00BF .align 2 + 1517 .L90: + 1518 00d4 00E0FFFF .word -8192 + 1519 .cfi_endproc + 1520 .LFE1223: + 1522 .section .text.AD9102_Init,"ax",%progbits + 1523 .align 1 + 1524 .syntax unified + 1525 .thumb + 1526 .thumb_func + 1528 AD9102_Init: + 1529 .LFB1212: +2646:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 1530 .loc 1 2646 1 is_stmt 1 view -0 + 1531 .cfi_startproc + 1532 @ args = 0, pretend = 0, frame = 8 + 1533 @ frame_needed = 0, uses_anonymous_args = 0 + 1534 0000 00B5 push {lr} + 1535 .LCFI12: + 1536 .cfi_def_cfa_offset 4 + 1537 .cfi_offset 14, -4 + 1538 0002 83B0 sub sp, sp, #12 + 1539 .LCFI13: + 1540 .cfi_def_cfa_offset 16 +2647:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); + 1541 .loc 1 2647 2 view .LVU503 + 1542 0004 0122 movs r2, #1 + 1543 0006 4FF48051 mov r1, #4096 + 1544 000a 1648 ldr r0, .L96 + 1545 000c FFF7FEFF bl HAL_GPIO_WritePin + 1546 .LVL146: +2648:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + ARM GAS /tmp/ccuHnxNu.s page 160 - 1487 .loc 1 2628 2 view .LVU488 - 1488 0004 0122 movs r2, #1 - 1489 0006 4FF48051 mov r1, #4096 - 1490 000a 1648 ldr r0, .L89 - 1491 000c FFF7FEFF bl HAL_GPIO_WritePin - 1492 .LVL144: -2629:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - 1493 .loc 1 2629 2 view .LVU489 - 1494 0010 0022 movs r2, #0 - 1495 0012 4021 movs r1, #64 - 1496 0014 1448 ldr r0, .L89+4 - 1497 0016 FFF7FEFF bl HAL_GPIO_WritePin - 1498 .LVL145: -2630:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1499 .loc 1 2630 2 view .LVU490 - 1500 .LBB398: -2630:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1501 .loc 1 2630 7 view .LVU491 -2630:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1502 .loc 1 2630 25 is_stmt 0 view .LVU492 - 1503 001a 0023 movs r3, #0 - 1504 001c 0193 str r3, [sp, #4] -2630:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1505 .loc 1 2630 2 view .LVU493 - 1506 001e 02E0 b .L86 - 1507 .L87: -2630:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1508 .loc 1 2630 48 is_stmt 1 discriminator 3 view .LVU494 -2630:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1509 .loc 1 2630 43 discriminator 3 view .LVU495 - 1510 0020 019B ldr r3, [sp, #4] - 1511 0022 0133 adds r3, r3, #1 - 1512 0024 0193 str r3, [sp, #4] - 1513 .L86: -2630:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1514 .loc 1 2630 34 discriminator 1 view .LVU496 - 1515 0026 019B ldr r3, [sp, #4] - 1516 0028 B3F57A7F cmp r3, #1000 - 1517 002c F8D3 bcc .L87 - 1518 .LBE398: -2631:Src/main.c **** - 1519 .loc 1 2631 2 view .LVU497 - 1520 002e 0122 movs r2, #1 - 1521 0030 4021 movs r1, #64 - 1522 0032 0D48 ldr r0, .L89+4 - 1523 0034 FFF7FEFF bl HAL_GPIO_WritePin - 1524 .LVL146: -2633:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - 1525 .loc 1 2633 2 view .LVU498 - 1526 0038 4221 movs r1, #66 - 1527 003a 0C48 ldr r0, .L89+8 - 1528 003c FFF7FEFF bl AD9102_WriteRegTable - 1529 .LVL147: -2634:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 1530 .loc 1 2634 2 view .LVU499 - 1531 0040 0021 movs r1, #0 - 1532 0042 1E20 movs r0, #30 - ARM GAS /tmp/ccEQxcUB.s page 159 + 1547 .loc 1 2648 2 view .LVU504 + 1548 0010 0022 movs r2, #0 + 1549 0012 4021 movs r1, #64 + 1550 0014 1448 ldr r0, .L96+4 + 1551 0016 FFF7FEFF bl HAL_GPIO_WritePin + 1552 .LVL147: +2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1553 .loc 1 2649 2 view .LVU505 + 1554 .LBB399: +2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1555 .loc 1 2649 7 view .LVU506 +2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1556 .loc 1 2649 25 is_stmt 0 view .LVU507 + 1557 001a 0023 movs r3, #0 + 1558 001c 0193 str r3, [sp, #4] +2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1559 .loc 1 2649 2 view .LVU508 + 1560 001e 02E0 b .L93 + 1561 .L94: +2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1562 .loc 1 2649 48 is_stmt 1 discriminator 3 view .LVU509 +2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1563 .loc 1 2649 43 discriminator 3 view .LVU510 + 1564 0020 019B ldr r3, [sp, #4] + 1565 0022 0133 adds r3, r3, #1 + 1566 0024 0193 str r3, [sp, #4] + 1567 .L93: +2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1568 .loc 1 2649 34 discriminator 1 view .LVU511 + 1569 0026 019B ldr r3, [sp, #4] + 1570 0028 B3F57A7F cmp r3, #1000 + 1571 002c F8D3 bcc .L94 + 1572 .LBE399: +2650:Src/main.c **** + 1573 .loc 1 2650 2 view .LVU512 + 1574 002e 0122 movs r2, #1 + 1575 0030 4021 movs r1, #64 + 1576 0032 0D48 ldr r0, .L96+4 + 1577 0034 FFF7FEFF bl HAL_GPIO_WritePin + 1578 .LVL148: +2652:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 1579 .loc 1 2652 2 view .LVU513 + 1580 0038 4221 movs r1, #66 + 1581 003a 0C48 ldr r0, .L96+8 + 1582 003c FFF7FEFF bl AD9102_WriteRegTable + 1583 .LVL149: +2653:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 1584 .loc 1 2653 2 view .LVU514 + 1585 0040 0021 movs r1, #0 + 1586 0042 1E20 movs r0, #30 + 1587 0044 FFF7FEFF bl AD9102_WriteReg + 1588 .LVL150: +2654:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1589 .loc 1 2654 2 view .LVU515 + 1590 0048 0121 movs r1, #1 + 1591 004a 1D20 movs r0, #29 + 1592 004c FFF7FEFF bl AD9102_WriteReg + ARM GAS /tmp/ccuHnxNu.s page 161 - 1533 0044 FFF7FEFF bl AD9102_WriteReg - 1534 .LVL148: -2635:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 1535 .loc 1 2635 2 view .LVU500 - 1536 0048 0121 movs r1, #1 - 1537 004a 1D20 movs r0, #29 - 1538 004c FFF7FEFF bl AD9102_WriteReg - 1539 .LVL149: -2636:Src/main.c **** } - 1540 .loc 1 2636 2 view .LVU501 - 1541 0050 0122 movs r2, #1 - 1542 0052 4FF40061 mov r1, #2048 - 1543 0056 0648 ldr r0, .L89+12 - 1544 0058 FFF7FEFF bl HAL_GPIO_WritePin - 1545 .LVL150: -2637:Src/main.c **** - 1546 .loc 1 2637 1 is_stmt 0 view .LVU502 - 1547 005c 03B0 add sp, sp, #12 - 1548 .LCFI14: - 1549 .cfi_def_cfa_offset 4 - 1550 @ sp needed - 1551 005e 5DF804FB ldr pc, [sp], #4 - 1552 .L90: - 1553 0062 00BF .align 2 - 1554 .L89: - 1555 0064 00040240 .word 1073873920 - 1556 0068 00080240 .word 1073874944 - 1557 006c 00000000 .word ad9102_example4_regval - 1558 0070 000C0240 .word 1073875968 - 1559 .cfi_endproc - 1560 .LFE1212: - 1562 .section .text.AD9102_ReadReg,"ax",%progbits - 1563 .align 1 - 1564 .syntax unified - 1565 .thumb - 1566 .thumb_func - 1568 AD9102_ReadReg: - 1569 .LVL151: - 1570 .LFB1218: -2758:Src/main.c **** uint32_t tmp32 = 0; - 1571 .loc 1 2758 1 is_stmt 1 view -0 - 1572 .cfi_startproc - 1573 @ args = 0, pretend = 0, frame = 0 - 1574 @ frame_needed = 0, uses_anonymous_args = 0 -2758:Src/main.c **** uint32_t tmp32 = 0; - 1575 .loc 1 2758 1 is_stmt 0 view .LVU504 - 1576 0000 10B5 push {r4, lr} - 1577 .LCFI15: - 1578 .cfi_def_cfa_offset 8 - 1579 .cfi_offset 4, -8 - 1580 .cfi_offset 14, -4 -2759:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) - 1581 .loc 1 2759 2 is_stmt 1 view .LVU505 - 1582 .LVL152: -2760:Src/main.c **** uint16_t value; - 1583 .loc 1 2760 2 view .LVU506 -2760:Src/main.c **** uint16_t value; - ARM GAS /tmp/ccEQxcUB.s page 160 + 1593 .LVL151: +2655:Src/main.c **** } + 1594 .loc 1 2655 2 view .LVU516 + 1595 0050 0122 movs r2, #1 + 1596 0052 4FF40061 mov r1, #2048 + 1597 0056 0648 ldr r0, .L96+12 + 1598 0058 FFF7FEFF bl HAL_GPIO_WritePin + 1599 .LVL152: +2656:Src/main.c **** + 1600 .loc 1 2656 1 is_stmt 0 view .LVU517 + 1601 005c 03B0 add sp, sp, #12 + 1602 .LCFI14: + 1603 .cfi_def_cfa_offset 4 + 1604 @ sp needed + 1605 005e 5DF804FB ldr pc, [sp], #4 + 1606 .L97: + 1607 0062 00BF .align 2 + 1608 .L96: + 1609 0064 00040240 .word 1073873920 + 1610 0068 00080240 .word 1073874944 + 1611 006c 00000000 .word ad9102_example4_regval + 1612 0070 000C0240 .word 1073875968 + 1613 .cfi_endproc + 1614 .LFE1212: + 1616 .section .text.AD9102_ReadReg,"ax",%progbits + 1617 .align 1 + 1618 .syntax unified + 1619 .thumb + 1620 .thumb_func + 1622 AD9102_ReadReg: + 1623 .LVL153: + 1624 .LFB1220: +2813:Src/main.c **** uint32_t tmp32 = 0; + 1625 .loc 1 2813 1 is_stmt 1 view -0 + 1626 .cfi_startproc + 1627 @ args = 0, pretend = 0, frame = 0 + 1628 @ frame_needed = 0, uses_anonymous_args = 0 +2813:Src/main.c **** uint32_t tmp32 = 0; + 1629 .loc 1 2813 1 is_stmt 0 view .LVU519 + 1630 0000 10B5 push {r4, lr} + 1631 .LCFI15: + 1632 .cfi_def_cfa_offset 8 + 1633 .cfi_offset 4, -8 + 1634 .cfi_offset 14, -4 +2814:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 1635 .loc 1 2814 2 is_stmt 1 view .LVU520 + 1636 .LVL154: +2815:Src/main.c **** uint16_t value; + 1637 .loc 1 2815 2 view .LVU521 +2815:Src/main.c **** uint16_t value; + 1638 .loc 1 2815 11 is_stmt 0 view .LVU522 + 1639 0002 40F40044 orr r4, r0, #32768 + 1640 .LVL155: +2816:Src/main.c **** + 1641 .loc 1 2816 2 is_stmt 1 view .LVU523 +2818:Src/main.c **** + 1642 .loc 1 2818 2 view .LVU524 + ARM GAS /tmp/ccuHnxNu.s page 162 - 1584 .loc 1 2760 11 is_stmt 0 view .LVU507 - 1585 0002 40F40044 orr r4, r0, #32768 - 1586 .LVL153: -2761:Src/main.c **** - 1587 .loc 1 2761 2 is_stmt 1 view .LVU508 -2763:Src/main.c **** - 1588 .loc 1 2763 2 view .LVU509 - 1589 0006 0021 movs r1, #0 - 1590 0008 0846 mov r0, r1 - 1591 .LVL154: -2763:Src/main.c **** - 1592 .loc 1 2763 2 is_stmt 0 view .LVU510 - 1593 000a FFF7FEFF bl SPI2_SetMode - 1594 .LVL155: -2765:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); - 1595 .loc 1 2765 2 is_stmt 1 view .LVU511 - 1596 000e 0122 movs r2, #1 - 1597 0010 4FF48041 mov r1, #16384 - 1598 0014 2C48 ldr r0, .L106 - 1599 0016 FFF7FEFF bl HAL_GPIO_WritePin - 1600 .LVL156: -2766:Src/main.c **** - 1601 .loc 1 2766 2 view .LVU512 - 1602 001a 0122 movs r2, #1 - 1603 001c 4FF48051 mov r1, #4096 - 1604 0020 2A48 ldr r0, .L106+4 - 1605 0022 FFF7FEFF bl HAL_GPIO_WritePin - 1606 .LVL157: -2768:Src/main.c **** { - 1607 .loc 1 2768 2 view .LVU513 - 1608 .LBB399: - 1609 .LBI399: + 1643 0006 0021 movs r1, #0 + 1644 0008 0846 mov r0, r1 + 1645 .LVL156: +2818:Src/main.c **** + 1646 .loc 1 2818 2 is_stmt 0 view .LVU525 + 1647 000a FFF7FEFF bl SPI2_SetMode + 1648 .LVL157: +2820:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); + 1649 .loc 1 2820 2 is_stmt 1 view .LVU526 + 1650 000e 0122 movs r2, #1 + 1651 0010 4FF48041 mov r1, #16384 + 1652 0014 2C48 ldr r0, .L113 + 1653 0016 FFF7FEFF bl HAL_GPIO_WritePin + 1654 .LVL158: +2821:Src/main.c **** + 1655 .loc 1 2821 2 view .LVU527 + 1656 001a 0122 movs r2, #1 + 1657 001c 4FF48051 mov r1, #4096 + 1658 0020 2A48 ldr r0, .L113+4 + 1659 0022 FFF7FEFF bl HAL_GPIO_WritePin + 1660 .LVL159: +2823:Src/main.c **** { + 1661 .loc 1 2823 2 view .LVU528 + 1662 .LBB400: + 1663 .LBI400: 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1610 .loc 4 381 26 view .LVU514 - 1611 .LBB400: + 1664 .loc 4 381 26 view .LVU529 + 1665 .LBB401: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1612 .loc 4 383 3 view .LVU515 + 1666 .loc 4 383 3 view .LVU530 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1613 .loc 4 383 12 is_stmt 0 view .LVU516 - 1614 0026 2A4B ldr r3, .L106+8 - 1615 0028 1B68 ldr r3, [r3] + 1667 .loc 4 383 12 is_stmt 0 view .LVU531 + 1668 0026 2A4B ldr r3, .L113+8 + 1669 0028 1B68 ldr r3, [r3] 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1616 .loc 4 383 69 view .LVU517 - 1617 002a 13F0400F tst r3, #64 - 1618 002e 04D1 bne .L92 - 1619 .LVL158: + 1670 .loc 4 383 69 view .LVU532 + 1671 002a 13F0400F tst r3, #64 + 1672 002e 04D1 bne .L99 + 1673 .LVL160: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1620 .loc 4 383 69 view .LVU518 - 1621 .LBE400: - 1622 .LBE399: -2770:Src/main.c **** } - 1623 .loc 1 2770 3 is_stmt 1 view .LVU519 - 1624 .LBB401: - 1625 .LBI401: + 1674 .loc 4 383 69 view .LVU533 + 1675 .LBE401: + 1676 .LBE400: +2825:Src/main.c **** } + 1677 .loc 1 2825 3 is_stmt 1 view .LVU534 + 1678 .LBB402: + 1679 .LBI402: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1626 .loc 4 358 22 view .LVU520 - 1627 .LBB402: - ARM GAS /tmp/ccEQxcUB.s page 161 - - + 1680 .loc 4 358 22 view .LVU535 + 1681 .LBB403: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1628 .loc 4 360 3 view .LVU521 - 1629 0030 274A ldr r2, .L106+8 - 1630 0032 1368 ldr r3, [r2] - 1631 0034 43F04003 orr r3, r3, #64 - 1632 0038 1360 str r3, [r2] - 1633 .LVL159: - 1634 .L92: + 1682 .loc 4 360 3 view .LVU536 + 1683 0030 274A ldr r2, .L113+8 + 1684 0032 1368 ldr r3, [r2] + 1685 0034 43F04003 orr r3, r3, #64 + 1686 0038 1360 str r3, [r2] + 1687 .LVL161: + ARM GAS /tmp/ccuHnxNu.s page 163 + + + 1688 .L99: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1635 .loc 4 360 3 is_stmt 0 view .LVU522 - 1636 .LBE402: - 1637 .LBE401: -2773:Src/main.c **** - 1638 .loc 1 2773 2 is_stmt 1 view .LVU523 - 1639 003a 0022 movs r2, #0 - 1640 003c 4FF48051 mov r1, #4096 - 1641 0040 2148 ldr r0, .L106 - 1642 0042 FFF7FEFF bl HAL_GPIO_WritePin - 1643 .LVL160: -2775:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1644 .loc 1 2775 2 view .LVU524 -2759:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) - 1645 .loc 1 2759 11 is_stmt 0 view .LVU525 - 1646 0046 0023 movs r3, #0 - 1647 .LVL161: - 1648 .L94: -2775:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1649 .loc 1 2775 63 is_stmt 1 discriminator 2 view .LVU526 -2775:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1650 .loc 1 2775 41 discriminator 2 view .LVU527 - 1651 .LBB403: - 1652 .LBI403: + 1689 .loc 4 360 3 is_stmt 0 view .LVU537 + 1690 .LBE403: + 1691 .LBE402: +2828:Src/main.c **** + 1692 .loc 1 2828 2 is_stmt 1 view .LVU538 + 1693 003a 0022 movs r2, #0 + 1694 003c 4FF48051 mov r1, #4096 + 1695 0040 2148 ldr r0, .L113 + 1696 0042 FFF7FEFF bl HAL_GPIO_WritePin + 1697 .LVL162: +2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1698 .loc 1 2830 2 view .LVU539 +2814:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 1699 .loc 1 2814 11 is_stmt 0 view .LVU540 + 1700 0046 0023 movs r3, #0 + 1701 .LVL163: + 1702 .L101: +2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1703 .loc 1 2830 63 is_stmt 1 discriminator 2 view .LVU541 +2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1704 .loc 1 2830 41 discriminator 2 view .LVU542 + 1705 .LBB404: + 1706 .LBI404: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1653 .loc 4 916 26 view .LVU528 - 1654 .LBB404: + 1707 .loc 4 916 26 view .LVU543 + 1708 .LBB405: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1655 .loc 4 918 3 view .LVU529 + 1709 .loc 4 918 3 view .LVU544 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1656 .loc 4 918 12 is_stmt 0 view .LVU530 - 1657 0048 214A ldr r2, .L106+8 - 1658 004a 9268 ldr r2, [r2, #8] + 1710 .loc 4 918 12 is_stmt 0 view .LVU545 + 1711 0048 214A ldr r2, .L113+8 + 1712 004a 9268 ldr r2, [r2, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1659 .loc 4 918 66 view .LVU531 - 1660 004c 12F0020F tst r2, #2 - 1661 0050 05D1 bne .L93 - 1662 .LVL162: + 1713 .loc 4 918 66 view .LVU546 + 1714 004c 12F0020F tst r2, #2 + 1715 0050 05D1 bne .L100 + 1716 .LVL164: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1663 .loc 4 918 66 view .LVU532 - 1664 .LBE404: - 1665 .LBE403: -2775:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1666 .loc 1 2775 50 discriminator 1 view .LVU533 - 1667 0052 5A1C adds r2, r3, #1 - 1668 .LVL163: -2775:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1669 .loc 1 2775 41 discriminator 1 view .LVU534 - 1670 0054 B3F57A7F cmp r3, #1000 - ARM GAS /tmp/ccEQxcUB.s page 162 + 1717 .loc 4 918 66 view .LVU547 + 1718 .LBE405: + 1719 .LBE404: +2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1720 .loc 1 2830 50 discriminator 1 view .LVU548 + 1721 0052 5A1C adds r2, r3, #1 + 1722 .LVL165: +2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1723 .loc 1 2830 41 discriminator 1 view .LVU549 + 1724 0054 B3F57A7F cmp r3, #1000 + 1725 0058 01D2 bcs .L100 +2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1726 .loc 1 2830 50 discriminator 1 view .LVU550 + 1727 005a 1346 mov r3, r2 + 1728 005c F4E7 b .L101 + 1729 .LVL166: + 1730 .L100: + ARM GAS /tmp/ccuHnxNu.s page 164 - 1671 0058 01D2 bcs .L93 -2775:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1672 .loc 1 2775 50 discriminator 1 view .LVU535 - 1673 005a 1346 mov r3, r2 - 1674 005c F4E7 b .L94 - 1675 .LVL164: - 1676 .L93: -2776:Src/main.c **** tmp32 = 0; - 1677 .loc 1 2776 2 is_stmt 1 view .LVU536 - 1678 .LBB405: - 1679 .LBI405: +2831:Src/main.c **** tmp32 = 0; + 1731 .loc 1 2831 2 is_stmt 1 view .LVU551 + 1732 .LBB406: + 1733 .LBI406: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1680 .loc 4 1373 22 view .LVU537 - 1681 .LBB406: + 1734 .loc 4 1373 22 view .LVU552 + 1735 .LBB407: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1682 .loc 4 1376 3 view .LVU538 - 1683 .loc 4 1377 3 view .LVU539 - 1684 .loc 4 1377 10 is_stmt 0 view .LVU540 - 1685 005e 1C4B ldr r3, .L106+8 - 1686 0060 9C81 strh r4, [r3, #12] @ movhi - 1687 .LVL165: - 1688 .loc 4 1377 10 view .LVU541 - 1689 .LBE406: - 1690 .LBE405: -2777:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1691 .loc 1 2777 2 is_stmt 1 view .LVU542 -2778:Src/main.c **** (void) SPI2->DR; - 1692 .loc 1 2778 2 view .LVU543 -2777:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1693 .loc 1 2777 8 is_stmt 0 view .LVU544 - 1694 0062 0023 movs r3, #0 - 1695 .LVL166: - 1696 .L96: -2778:Src/main.c **** (void) SPI2->DR; - 1697 .loc 1 2778 64 is_stmt 1 discriminator 2 view .LVU545 -2778:Src/main.c **** (void) SPI2->DR; - 1698 .loc 1 2778 42 discriminator 2 view .LVU546 - 1699 .LBB407: - 1700 .LBI407: + 1736 .loc 4 1376 3 view .LVU553 + 1737 .loc 4 1377 3 view .LVU554 + 1738 .loc 4 1377 10 is_stmt 0 view .LVU555 + 1739 005e 1C4B ldr r3, .L113+8 + 1740 0060 9C81 strh r4, [r3, #12] @ movhi + 1741 .LVL167: + 1742 .loc 4 1377 10 view .LVU556 + 1743 .LBE407: + 1744 .LBE406: +2832:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1745 .loc 1 2832 2 is_stmt 1 view .LVU557 +2833:Src/main.c **** (void) SPI2->DR; + 1746 .loc 1 2833 2 view .LVU558 +2832:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1747 .loc 1 2832 8 is_stmt 0 view .LVU559 + 1748 0062 0023 movs r3, #0 + 1749 .LVL168: + 1750 .L103: +2833:Src/main.c **** (void) SPI2->DR; + 1751 .loc 1 2833 64 is_stmt 1 discriminator 2 view .LVU560 +2833:Src/main.c **** (void) SPI2->DR; + 1752 .loc 1 2833 42 discriminator 2 view .LVU561 + 1753 .LBB408: + 1754 .LBI408: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1701 .loc 4 905 26 view .LVU547 - 1702 .LBB408: + 1755 .loc 4 905 26 view .LVU562 + 1756 .LBB409: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1703 .loc 4 907 3 view .LVU548 + 1757 .loc 4 907 3 view .LVU563 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1704 .loc 4 907 12 is_stmt 0 view .LVU549 - 1705 0064 1A4A ldr r2, .L106+8 - 1706 0066 9268 ldr r2, [r2, #8] + 1758 .loc 4 907 12 is_stmt 0 view .LVU564 + 1759 0064 1A4A ldr r2, .L113+8 + 1760 0066 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1707 .loc 4 907 68 view .LVU550 - 1708 0068 12F0010F tst r2, #1 - 1709 006c 05D1 bne .L95 - 1710 .LVL167: + 1761 .loc 4 907 68 view .LVU565 + 1762 0068 12F0010F tst r2, #1 + 1763 006c 05D1 bne .L102 + 1764 .LVL169: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1711 .loc 4 907 68 view .LVU551 - 1712 .LBE408: - 1713 .LBE407: - ARM GAS /tmp/ccEQxcUB.s page 163 + 1765 .loc 4 907 68 view .LVU566 + 1766 .LBE409: + 1767 .LBE408: +2833:Src/main.c **** (void) SPI2->DR; + 1768 .loc 1 2833 51 discriminator 1 view .LVU567 + 1769 006e 5A1C adds r2, r3, #1 + 1770 .LVL170: +2833:Src/main.c **** (void) SPI2->DR; + 1771 .loc 1 2833 42 discriminator 1 view .LVU568 + 1772 0070 B3F57A7F cmp r3, #1000 + ARM GAS /tmp/ccuHnxNu.s page 165 -2778:Src/main.c **** (void) SPI2->DR; - 1714 .loc 1 2778 51 discriminator 1 view .LVU552 - 1715 006e 5A1C adds r2, r3, #1 - 1716 .LVL168: -2778:Src/main.c **** (void) SPI2->DR; - 1717 .loc 1 2778 42 discriminator 1 view .LVU553 - 1718 0070 B3F57A7F cmp r3, #1000 - 1719 0074 01D2 bcs .L95 -2778:Src/main.c **** (void) SPI2->DR; - 1720 .loc 1 2778 51 discriminator 1 view .LVU554 - 1721 0076 1346 mov r3, r2 - 1722 0078 F4E7 b .L96 - 1723 .LVL169: - 1724 .L95: -2779:Src/main.c **** - 1725 .loc 1 2779 2 is_stmt 1 view .LVU555 - 1726 007a 154B ldr r3, .L106+8 - 1727 007c DB68 ldr r3, [r3, #12] -2781:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1728 .loc 1 2781 2 view .LVU556 - 1729 .LVL170: -2782:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1730 .loc 1 2782 2 view .LVU557 -2781:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1731 .loc 1 2781 8 is_stmt 0 view .LVU558 - 1732 007e 0023 movs r3, #0 - 1733 .LVL171: - 1734 .L98: -2782:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1735 .loc 1 2782 63 is_stmt 1 discriminator 2 view .LVU559 -2782:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1736 .loc 1 2782 41 discriminator 2 view .LVU560 - 1737 .LBB409: - 1738 .LBI409: + 1773 0074 01D2 bcs .L102 +2833:Src/main.c **** (void) SPI2->DR; + 1774 .loc 1 2833 51 discriminator 1 view .LVU569 + 1775 0076 1346 mov r3, r2 + 1776 0078 F4E7 b .L103 + 1777 .LVL171: + 1778 .L102: +2834:Src/main.c **** + 1779 .loc 1 2834 2 is_stmt 1 view .LVU570 + 1780 007a 154B ldr r3, .L113+8 + 1781 007c DB68 ldr r3, [r3, #12] +2836:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1782 .loc 1 2836 2 view .LVU571 + 1783 .LVL172: +2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1784 .loc 1 2837 2 view .LVU572 +2836:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1785 .loc 1 2836 8 is_stmt 0 view .LVU573 + 1786 007e 0023 movs r3, #0 + 1787 .LVL173: + 1788 .L105: +2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1789 .loc 1 2837 63 is_stmt 1 discriminator 2 view .LVU574 +2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1790 .loc 1 2837 41 discriminator 2 view .LVU575 + 1791 .LBB410: + 1792 .LBI410: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1739 .loc 4 916 26 view .LVU561 - 1740 .LBB410: + 1793 .loc 4 916 26 view .LVU576 + 1794 .LBB411: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1741 .loc 4 918 3 view .LVU562 + 1795 .loc 4 918 3 view .LVU577 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1742 .loc 4 918 12 is_stmt 0 view .LVU563 - 1743 0080 134A ldr r2, .L106+8 - 1744 0082 9268 ldr r2, [r2, #8] + 1796 .loc 4 918 12 is_stmt 0 view .LVU578 + 1797 0080 134A ldr r2, .L113+8 + 1798 0082 9268 ldr r2, [r2, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1745 .loc 4 918 66 view .LVU564 - 1746 0084 12F0020F tst r2, #2 - 1747 0088 05D1 bne .L97 - 1748 .LVL172: + 1799 .loc 4 918 66 view .LVU579 + 1800 0084 12F0020F tst r2, #2 + 1801 0088 05D1 bne .L104 + 1802 .LVL174: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1749 .loc 4 918 66 view .LVU565 - 1750 .LBE410: - 1751 .LBE409: -2782:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1752 .loc 1 2782 50 discriminator 1 view .LVU566 - 1753 008a 5A1C adds r2, r3, #1 - 1754 .LVL173: -2782:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - ARM GAS /tmp/ccEQxcUB.s page 164 + 1803 .loc 4 918 66 view .LVU580 + 1804 .LBE411: + 1805 .LBE410: +2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1806 .loc 1 2837 50 discriminator 1 view .LVU581 + 1807 008a 5A1C adds r2, r3, #1 + 1808 .LVL175: +2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1809 .loc 1 2837 41 discriminator 1 view .LVU582 + 1810 008c B3F57A7F cmp r3, #1000 + 1811 0090 01D2 bcs .L104 +2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1812 .loc 1 2837 50 discriminator 1 view .LVU583 + 1813 0092 1346 mov r3, r2 + 1814 0094 F4E7 b .L105 + ARM GAS /tmp/ccuHnxNu.s page 166 - 1755 .loc 1 2782 41 discriminator 1 view .LVU567 - 1756 008c B3F57A7F cmp r3, #1000 - 1757 0090 01D2 bcs .L97 -2782:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1758 .loc 1 2782 50 discriminator 1 view .LVU568 - 1759 0092 1346 mov r3, r2 - 1760 0094 F4E7 b .L98 - 1761 .LVL174: - 1762 .L97: -2783:Src/main.c **** tmp32 = 0; - 1763 .loc 1 2783 2 is_stmt 1 view .LVU569 - 1764 .LBB411: - 1765 .LBI411: + 1815 .LVL176: + 1816 .L104: +2838:Src/main.c **** tmp32 = 0; + 1817 .loc 1 2838 2 is_stmt 1 view .LVU584 + 1818 .LBB412: + 1819 .LBI412: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1766 .loc 4 1373 22 view .LVU570 - 1767 .LBB412: + 1820 .loc 4 1373 22 view .LVU585 + 1821 .LBB413: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1768 .loc 4 1376 3 view .LVU571 - 1769 .loc 4 1377 3 view .LVU572 - 1770 .loc 4 1377 10 is_stmt 0 view .LVU573 - 1771 0096 0023 movs r3, #0 - 1772 0098 0D4A ldr r2, .L106+8 - 1773 009a 9381 strh r3, [r2, #12] @ movhi - 1774 .LVL175: - 1775 .loc 4 1377 10 view .LVU574 - 1776 .LBE412: - 1777 .LBE411: -2784:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1778 .loc 1 2784 2 is_stmt 1 view .LVU575 -2785:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1779 .loc 1 2785 2 view .LVU576 - 1780 .L100: -2785:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1781 .loc 1 2785 64 discriminator 2 view .LVU577 -2785:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1782 .loc 1 2785 42 discriminator 2 view .LVU578 - 1783 .LBB413: - 1784 .LBI413: + 1822 .loc 4 1376 3 view .LVU586 + 1823 .loc 4 1377 3 view .LVU587 + 1824 .loc 4 1377 10 is_stmt 0 view .LVU588 + 1825 0096 0023 movs r3, #0 + 1826 0098 0D4A ldr r2, .L113+8 + 1827 009a 9381 strh r3, [r2, #12] @ movhi + 1828 .LVL177: + 1829 .loc 4 1377 10 view .LVU589 + 1830 .LBE413: + 1831 .LBE412: +2839:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1832 .loc 1 2839 2 is_stmt 1 view .LVU590 +2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1833 .loc 1 2840 2 view .LVU591 + 1834 .L107: +2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1835 .loc 1 2840 64 discriminator 2 view .LVU592 +2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1836 .loc 1 2840 42 discriminator 2 view .LVU593 + 1837 .LBB414: + 1838 .LBI414: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1785 .loc 4 905 26 view .LVU579 - 1786 .LBB414: + 1839 .loc 4 905 26 view .LVU594 + 1840 .LBB415: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1787 .loc 4 907 3 view .LVU580 + 1841 .loc 4 907 3 view .LVU595 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1788 .loc 4 907 12 is_stmt 0 view .LVU581 - 1789 009c 0C4A ldr r2, .L106+8 - 1790 009e 9268 ldr r2, [r2, #8] + 1842 .loc 4 907 12 is_stmt 0 view .LVU596 + 1843 009c 0C4A ldr r2, .L113+8 + 1844 009e 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1791 .loc 4 907 68 view .LVU582 - 1792 00a0 12F0010F tst r2, #1 - 1793 00a4 05D1 bne .L99 - 1794 .LVL176: + 1845 .loc 4 907 68 view .LVU597 + 1846 00a0 12F0010F tst r2, #1 + 1847 00a4 05D1 bne .L106 + 1848 .LVL178: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1795 .loc 4 907 68 view .LVU583 - 1796 .LBE414: - 1797 .LBE413: -2785:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - ARM GAS /tmp/ccEQxcUB.s page 165 + 1849 .loc 4 907 68 view .LVU598 + 1850 .LBE415: + 1851 .LBE414: +2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1852 .loc 1 2840 51 discriminator 1 view .LVU599 + 1853 00a6 5A1C adds r2, r3, #1 + 1854 .LVL179: +2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1855 .loc 1 2840 42 discriminator 1 view .LVU600 + 1856 00a8 B3F57A7F cmp r3, #1000 + 1857 00ac 01D2 bcs .L106 + ARM GAS /tmp/ccuHnxNu.s page 167 - 1798 .loc 1 2785 51 discriminator 1 view .LVU584 - 1799 00a6 5A1C adds r2, r3, #1 - 1800 .LVL177: -2785:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1801 .loc 1 2785 42 discriminator 1 view .LVU585 - 1802 00a8 B3F57A7F cmp r3, #1000 - 1803 00ac 01D2 bcs .L99 -2785:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1804 .loc 1 2785 51 discriminator 1 view .LVU586 - 1805 00ae 1346 mov r3, r2 - 1806 00b0 F4E7 b .L100 - 1807 .LVL178: - 1808 .L99: -2786:Src/main.c **** - 1809 .loc 1 2786 2 is_stmt 1 view .LVU587 - 1810 .LBB415: - 1811 .LBI415: +2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1858 .loc 1 2840 51 discriminator 1 view .LVU601 + 1859 00ae 1346 mov r3, r2 + 1860 00b0 F4E7 b .L107 + 1861 .LVL180: + 1862 .L106: +2841:Src/main.c **** + 1863 .loc 1 2841 2 is_stmt 1 view .LVU602 + 1864 .LBB416: + 1865 .LBI416: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1812 .loc 4 1344 26 view .LVU588 - 1813 .LBB416: + 1866 .loc 4 1344 26 view .LVU603 + 1867 .LBB417: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1814 .loc 4 1346 3 view .LVU589 + 1868 .loc 4 1346 3 view .LVU604 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1815 .loc 4 1346 21 is_stmt 0 view .LVU590 - 1816 00b2 074B ldr r3, .L106+8 - 1817 00b4 DC68 ldr r4, [r3, #12] - 1818 .LVL179: + 1869 .loc 4 1346 21 is_stmt 0 view .LVU605 + 1870 00b2 074B ldr r3, .L113+8 + 1871 00b4 DC68 ldr r4, [r3, #12] + 1872 .LVL181: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1819 .loc 4 1346 10 view .LVU591 - 1820 00b6 A4B2 uxth r4, r4 - 1821 .LVL180: + 1873 .loc 4 1346 10 view .LVU606 + 1874 00b6 A4B2 uxth r4, r4 + 1875 .LVL182: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1822 .loc 4 1346 10 view .LVU592 - 1823 .LBE416: - 1824 .LBE415: -2788:Src/main.c **** return value; - 1825 .loc 1 2788 2 is_stmt 1 view .LVU593 - 1826 00b8 0122 movs r2, #1 - 1827 00ba 4FF48051 mov r1, #4096 - 1828 00be 0248 ldr r0, .L106 - 1829 00c0 FFF7FEFF bl HAL_GPIO_WritePin - 1830 .LVL181: -2789:Src/main.c **** } - 1831 .loc 1 2789 2 view .LVU594 -2790:Src/main.c **** - 1832 .loc 1 2790 1 is_stmt 0 view .LVU595 - 1833 00c4 2046 mov r0, r4 - 1834 00c6 10BD pop {r4, pc} - 1835 .LVL182: - 1836 .L107: -2790:Src/main.c **** - 1837 .loc 1 2790 1 view .LVU596 - 1838 .align 2 - 1839 .L106: - 1840 00c8 00040240 .word 1073873920 - 1841 00cc 000C0240 .word 1073875968 - 1842 00d0 00380040 .word 1073756160 - ARM GAS /tmp/ccEQxcUB.s page 166 + 1876 .loc 4 1346 10 view .LVU607 + 1877 .LBE417: + 1878 .LBE416: +2843:Src/main.c **** return value; + 1879 .loc 1 2843 2 is_stmt 1 view .LVU608 + 1880 00b8 0122 movs r2, #1 + 1881 00ba 4FF48051 mov r1, #4096 + 1882 00be 0248 ldr r0, .L113 + 1883 00c0 FFF7FEFF bl HAL_GPIO_WritePin + 1884 .LVL183: +2844:Src/main.c **** } + 1885 .loc 1 2844 2 view .LVU609 +2845:Src/main.c **** + 1886 .loc 1 2845 1 is_stmt 0 view .LVU610 + 1887 00c4 2046 mov r0, r4 + 1888 00c6 10BD pop {r4, pc} + 1889 .LVL184: + 1890 .L114: +2845:Src/main.c **** + 1891 .loc 1 2845 1 view .LVU611 + 1892 .align 2 + 1893 .L113: + 1894 00c8 00040240 .word 1073873920 + 1895 00cc 000C0240 .word 1073875968 + 1896 00d0 00380040 .word 1073756160 + 1897 .cfi_endproc + 1898 .LFE1220: + 1900 .section .text.AD9102_CheckFlagsSram,"ax",%progbits + 1901 .align 1 + 1902 .syntax unified + 1903 .thumb + 1904 .thumb_func + ARM GAS /tmp/ccuHnxNu.s page 168 - 1843 .cfi_endproc - 1844 .LFE1218: - 1846 .section .text.AD9102_CheckFlagsSram,"ax",%progbits - 1847 .align 1 - 1848 .syntax unified - 1849 .thumb - 1850 .thumb_func - 1852 AD9102_CheckFlagsSram: - 1853 .LVL183: - 1854 .LFB1224: -3086:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 1855 .loc 1 3086 1 is_stmt 1 view -0 - 1856 .cfi_startproc - 1857 @ args = 0, pretend = 0, frame = 8 - 1858 @ frame_needed = 0, uses_anonymous_args = 0 -3086:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 1859 .loc 1 3086 1 is_stmt 0 view .LVU598 - 1860 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} - 1861 .LCFI16: - 1862 .cfi_def_cfa_offset 36 - 1863 .cfi_offset 4, -36 - 1864 .cfi_offset 5, -32 - 1865 .cfi_offset 6, -28 - 1866 .cfi_offset 7, -24 - 1867 .cfi_offset 8, -20 - 1868 .cfi_offset 9, -16 - 1869 .cfi_offset 10, -12 - 1870 .cfi_offset 11, -8 - 1871 .cfi_offset 14, -4 - 1872 0004 83B0 sub sp, sp, #12 - 1873 .LCFI17: - 1874 .cfi_def_cfa_offset 48 - 1875 0006 8346 mov fp, r0 - 1876 0008 0F46 mov r7, r1 - 1877 000a 1446 mov r4, r2 - 1878 000c 1D46 mov r5, r3 -3087:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1879 .loc 1 3087 2 is_stmt 1 view .LVU599 -3087:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1880 .loc 1 3087 23 is_stmt 0 view .LVU600 - 1881 000e 0020 movs r0, #0 - 1882 .LVL184: -3087:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1883 .loc 1 3087 23 view .LVU601 - 1884 0010 FFF7FEFF bl AD9102_ReadReg - 1885 .LVL185: -3087:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1886 .loc 1 3087 23 view .LVU602 - 1887 0014 8246 mov r10, r0 - 1888 .LVL186: -3088:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 1889 .loc 1 3088 2 is_stmt 1 view .LVU603 -3088:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 1890 .loc 1 3088 22 is_stmt 0 view .LVU604 - 1891 0016 0120 movs r0, #1 - 1892 0018 FFF7FEFF bl AD9102_ReadReg - 1893 .LVL187: - ARM GAS /tmp/ccEQxcUB.s page 167 + 1906 AD9102_CheckFlagsSram: + 1907 .LVL185: + 1908 .LFB1226: +3141:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 1909 .loc 1 3141 1 is_stmt 1 view -0 + 1910 .cfi_startproc + 1911 @ args = 0, pretend = 0, frame = 8 + 1912 @ frame_needed = 0, uses_anonymous_args = 0 +3141:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 1913 .loc 1 3141 1 is_stmt 0 view .LVU613 + 1914 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1915 .LCFI16: + 1916 .cfi_def_cfa_offset 36 + 1917 .cfi_offset 4, -36 + 1918 .cfi_offset 5, -32 + 1919 .cfi_offset 6, -28 + 1920 .cfi_offset 7, -24 + 1921 .cfi_offset 8, -20 + 1922 .cfi_offset 9, -16 + 1923 .cfi_offset 10, -12 + 1924 .cfi_offset 11, -8 + 1925 .cfi_offset 14, -4 + 1926 0004 83B0 sub sp, sp, #12 + 1927 .LCFI17: + 1928 .cfi_def_cfa_offset 48 + 1929 0006 8346 mov fp, r0 + 1930 0008 0F46 mov r7, r1 + 1931 000a 1446 mov r4, r2 + 1932 000c 1D46 mov r5, r3 +3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1933 .loc 1 3142 2 is_stmt 1 view .LVU614 +3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1934 .loc 1 3142 23 is_stmt 0 view .LVU615 + 1935 000e 0020 movs r0, #0 + 1936 .LVL186: +3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1937 .loc 1 3142 23 view .LVU616 + 1938 0010 FFF7FEFF bl AD9102_ReadReg + 1939 .LVL187: +3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1940 .loc 1 3142 23 view .LVU617 + 1941 0014 8246 mov r10, r0 + 1942 .LVL188: +3143:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 1943 .loc 1 3143 2 is_stmt 1 view .LVU618 +3143:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 1944 .loc 1 3143 22 is_stmt 0 view .LVU619 + 1945 0016 0120 movs r0, #1 + 1946 0018 FFF7FEFF bl AD9102_ReadReg + 1947 .LVL189: + 1948 001c 8146 mov r9, r0 + 1949 .LVL190: +3144:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 1950 .loc 1 3144 2 is_stmt 1 view .LVU620 +3144:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 1951 .loc 1 3144 22 is_stmt 0 view .LVU621 + 1952 001e 0220 movs r0, #2 + ARM GAS /tmp/ccuHnxNu.s page 169 - 1894 001c 8146 mov r9, r0 - 1895 .LVL188: -3089:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 1896 .loc 1 3089 2 is_stmt 1 view .LVU605 -3089:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 1897 .loc 1 3089 22 is_stmt 0 view .LVU606 - 1898 001e 0220 movs r0, #2 - 1899 0020 FFF7FEFF bl AD9102_ReadReg - 1900 .LVL189: - 1901 0024 8046 mov r8, r0 - 1902 .LVL190: -3090:Src/main.c **** - 1903 .loc 1 3090 2 is_stmt 1 view .LVU607 -3090:Src/main.c **** - 1904 .loc 1 3090 21 is_stmt 0 view .LVU608 - 1905 0026 6020 movs r0, #96 - 1906 0028 FFF7FEFF bl AD9102_ReadReg - 1907 .LVL191: -3092:Src/main.c **** { - 1908 .loc 1 3092 2 is_stmt 1 view .LVU609 -3092:Src/main.c **** { - 1909 .loc 1 3092 5 is_stmt 0 view .LVU610 - 1910 002c 1CB1 cbz r4, .L125 -3096:Src/main.c **** { - 1911 .loc 1 3096 2 is_stmt 1 view .LVU611 -3096:Src/main.c **** { - 1912 .loc 1 3096 5 is_stmt 0 view .LVU612 - 1913 002e 012C cmp r4, #1 - 1914 0030 02D8 bhi .L109 -3098:Src/main.c **** } - 1915 .loc 1 3098 11 view .LVU613 - 1916 0032 0224 movs r4, #2 - 1917 .LVL192: -3098:Src/main.c **** } - 1918 .loc 1 3098 11 view .LVU614 - 1919 0034 03E0 b .L110 - 1920 .LVL193: - 1921 .L125: -3094:Src/main.c **** } - 1922 .loc 1 3094 11 view .LVU615 - 1923 0036 1024 movs r4, #16 - 1924 .LVL194: - 1925 .L109: -3100:Src/main.c **** { - 1926 .loc 1 3100 2 is_stmt 1 view .LVU616 -3100:Src/main.c **** { - 1927 .loc 1 3100 5 is_stmt 0 view .LVU617 - 1928 0038 B4F5805F cmp r4, #4096 - 1929 003c 04D8 bhi .L127 - 1930 .LVL195: - 1931 .L110: -3104:Src/main.c **** { - 1932 .loc 1 3104 2 is_stmt 1 view .LVU618 -3104:Src/main.c **** { - 1933 .loc 1 3104 5 is_stmt 0 view .LVU619 - 1934 003e 35B1 cbz r5, .L128 -3108:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 168 - - - 1935 .loc 1 3108 2 is_stmt 1 view .LVU620 -3108:Src/main.c **** { - 1936 .loc 1 3108 5 is_stmt 0 view .LVU621 - 1937 0040 0F2D cmp r5, #15 - 1938 0042 05D9 bls .L111 -3110:Src/main.c **** } - 1939 .loc 1 3110 8 view .LVU622 - 1940 0044 0F25 movs r5, #15 - 1941 .LVL196: -3110:Src/main.c **** } - 1942 .loc 1 3110 8 view .LVU623 - 1943 0046 03E0 b .L111 - 1944 .LVL197: - 1945 .L127: -3102:Src/main.c **** } - 1946 .loc 1 3102 11 view .LVU624 - 1947 0048 4FF48054 mov r4, #4096 - 1948 .LVL198: -3102:Src/main.c **** } - 1949 .loc 1 3102 11 view .LVU625 - 1950 004c F7E7 b .L110 - 1951 .LVL199: - 1952 .L128: -3106:Src/main.c **** } - 1953 .loc 1 3106 8 view .LVU626 - 1954 004e 0125 movs r5, #1 - 1955 .LVL200: - 1956 .L111: -3113:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 1957 .loc 1 3113 2 is_stmt 1 view .LVU627 -3113:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 1958 .loc 1 3113 63 is_stmt 0 view .LVU628 - 1959 0050 2E02 lsls r6, r5, #8 - 1960 0052 06F47066 and r6, r6, #3840 -3113:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 1961 .loc 1 3113 11 view .LVU629 - 1962 0056 46F01106 orr r6, r6, #17 - 1963 .LVL201: -3116:Src/main.c **** if (pat_period == 0u) - 1964 .loc 1 3116 2 is_stmt 1 view .LVU630 -3116:Src/main.c **** if (pat_period == 0u) - 1965 .loc 1 3116 24 is_stmt 0 view .LVU631 - 1966 005a 0194 str r4, [sp, #4] -3116:Src/main.c **** if (pat_period == 0u) - 1967 .loc 1 3116 44 view .LVU632 - 1968 005c 05F00F05 and r5, r5, #15 - 1969 .LVL202: -3116:Src/main.c **** if (pat_period == 0u) - 1970 .loc 1 3116 11 view .LVU633 - 1971 0060 04FB05F5 mul r5, r4, r5 - 1972 .LVL203: -3117:Src/main.c **** { - 1973 .loc 1 3117 2 is_stmt 1 view .LVU634 -3117:Src/main.c **** { - 1974 .loc 1 3117 5 is_stmt 0 view .LVU635 - 1975 0064 1DB1 cbz r5, .L112 -3121:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 169 - - - 1976 .loc 1 3121 2 is_stmt 1 view .LVU636 -3121:Src/main.c **** { - 1977 .loc 1 3121 5 is_stmt 0 view .LVU637 - 1978 0066 B5F5803F cmp r5, #65536 - 1979 006a 4CD2 bcs .L130 - 1980 006c 0195 str r5, [sp, #4] - 1981 .L112: - 1982 .LVL204: -3126:Src/main.c **** - 1983 .loc 1 3126 2 is_stmt 1 view .LVU638 -3126:Src/main.c **** - 1984 .loc 1 3126 43 is_stmt 0 view .LVU639 - 1985 006e 013C subs r4, r4, #1 - 1986 .LVL205: -3126:Src/main.c **** - 1987 .loc 1 3126 43 view .LVU640 - 1988 0070 A4B2 uxth r4, r4 -3126:Src/main.c **** - 1989 .loc 1 3126 11 view .LVU641 - 1990 0072 2401 lsls r4, r4, #4 - 1991 0074 A4B2 uxth r4, r4 - 1992 .LVL206: -3128:Src/main.c **** - 1993 .loc 1 3128 2 is_stmt 1 view .LVU642 -3130:Src/main.c **** { - 1994 .loc 1 3130 2 view .LVU643 -3130:Src/main.c **** { - 1995 .loc 1 3130 5 is_stmt 0 view .LVU644 - 1996 0076 BAF1000F cmp r10, #0 - 1997 007a 48D1 bne .L131 -3128:Src/main.c **** - 1998 .loc 1 3128 10 view .LVU645 - 1999 007c 0125 movs r5, #1 - 2000 .L113: - 2001 .LVL207: -3134:Src/main.c **** { - 2002 .loc 1 3134 2 is_stmt 1 view .LVU646 -3134:Src/main.c **** { - 2003 .loc 1 3134 5 is_stmt 0 view .LVU647 - 2004 007e 19F4F47F tst r9, #488 - 2005 0082 00D0 beq .L114 -3136:Src/main.c **** } - 2006 .loc 1 3136 6 view .LVU648 - 2007 0084 0025 movs r5, #0 - 2008 .LVL208: - 2009 .L114: -3138:Src/main.c **** { - 2010 .loc 1 3138 2 is_stmt 1 view .LVU649 -3138:Src/main.c **** { - 2011 .loc 1 3138 5 is_stmt 0 view .LVU650 - 2012 0086 18F40E6F tst r8, #2272 - 2013 008a 00D0 beq .L115 -3140:Src/main.c **** } - 2014 .loc 1 3140 6 view .LVU651 - 2015 008c 0025 movs r5, #0 - 2016 .LVL209: - 2017 .L115: - ARM GAS /tmp/ccEQxcUB.s page 170 - - -3142:Src/main.c **** { - 2018 .loc 1 3142 2 is_stmt 1 view .LVU652 -3142:Src/main.c **** { - 2019 .loc 1 3142 5 is_stmt 0 view .LVU653 - 2020 008e 10F03F0F tst r0, #63 - 2021 0092 00D0 beq .L116 -3144:Src/main.c **** } - 2022 .loc 1 3144 6 view .LVU654 - 2023 0094 0025 movs r5, #0 - 2024 .LVL210: - 2025 .L116: -3146:Src/main.c **** { - 2026 .loc 1 3146 2 is_stmt 1 view .LVU655 -3146:Src/main.c **** { - 2027 .loc 1 3146 5 is_stmt 0 view .LVU656 - 2028 0096 1FB1 cbz r7, .L117 -3146:Src/main.c **** { - 2029 .loc 1 3146 17 discriminator 1 view .LVU657 - 2030 0098 1BF0010F tst fp, #1 - 2031 009c 00D1 bne .L117 -3148:Src/main.c **** } - 2032 .loc 1 3148 6 view .LVU658 - 2033 009e 0025 movs r5, #0 - 2034 .LVL211: - 2035 .L117: + 1953 0020 FFF7FEFF bl AD9102_ReadReg + 1954 .LVL191: + 1955 0024 8046 mov r8, r0 + 1956 .LVL192: +3145:Src/main.c **** + 1957 .loc 1 3145 2 is_stmt 1 view .LVU622 +3145:Src/main.c **** + 1958 .loc 1 3145 21 is_stmt 0 view .LVU623 + 1959 0026 6020 movs r0, #96 + 1960 0028 FFF7FEFF bl AD9102_ReadReg + 1961 .LVL193: +3147:Src/main.c **** { + 1962 .loc 1 3147 2 is_stmt 1 view .LVU624 +3147:Src/main.c **** { + 1963 .loc 1 3147 5 is_stmt 0 view .LVU625 + 1964 002c 1CB1 cbz r4, .L132 3151:Src/main.c **** { - 2036 .loc 1 3151 2 is_stmt 1 view .LVU659 + 1965 .loc 1 3151 2 is_stmt 1 view .LVU626 3151:Src/main.c **** { - 2037 .loc 1 3151 6 is_stmt 0 view .LVU660 - 2038 00a0 2720 movs r0, #39 - 2039 .LVL212: -3151:Src/main.c **** { - 2040 .loc 1 3151 6 view .LVU661 - 2041 00a2 FFF7FEFF bl AD9102_ReadReg - 2042 .LVL213: -3151:Src/main.c **** { - 2043 .loc 1 3151 5 discriminator 1 view .LVU662 - 2044 00a6 43F23003 movw r3, #12336 - 2045 00aa 9842 cmp r0, r3 - 2046 00ac 00D0 beq .L118 + 1966 .loc 1 3151 5 is_stmt 0 view .LVU627 + 1967 002e 012C cmp r4, #1 + 1968 0030 02D8 bhi .L116 3153:Src/main.c **** } - 2047 .loc 1 3153 6 view .LVU663 - 2048 00ae 0025 movs r5, #0 - 2049 .LVL214: - 2050 .L118: + 1969 .loc 1 3153 11 view .LVU628 + 1970 0032 0224 movs r4, #2 + 1971 .LVL194: +3153:Src/main.c **** } + 1972 .loc 1 3153 11 view .LVU629 + 1973 0034 03E0 b .L117 + 1974 .LVL195: + 1975 .L132: +3149:Src/main.c **** } + 1976 .loc 1 3149 11 view .LVU630 + 1977 0036 1024 movs r4, #16 + 1978 .LVL196: + 1979 .L116: 3155:Src/main.c **** { - 2051 .loc 1 3155 2 is_stmt 1 view .LVU664 + 1980 .loc 1 3155 2 is_stmt 1 view .LVU631 3155:Src/main.c **** { - 2052 .loc 1 3155 6 is_stmt 0 view .LVU665 - 2053 00b0 2820 movs r0, #40 - 2054 00b2 FFF7FEFF bl AD9102_ReadReg - 2055 .LVL215: -3155:Src/main.c **** { - 2056 .loc 1 3155 5 discriminator 1 view .LVU666 - 2057 00b6 B042 cmp r0, r6 - 2058 00b8 00D0 beq .L119 -3157:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 171 - - - 2059 .loc 1 3157 6 view .LVU667 - 2060 00ba 0025 movs r5, #0 - 2061 .LVL216: - 2062 .L119: + 1981 .loc 1 3155 5 is_stmt 0 view .LVU632 + 1982 0038 B4F5805F cmp r4, #4096 + 1983 003c 04D8 bhi .L134 + 1984 .LVL197: + 1985 .L117: 3159:Src/main.c **** { - 2063 .loc 1 3159 2 is_stmt 1 view .LVU668 + 1986 .loc 1 3159 2 is_stmt 1 view .LVU633 3159:Src/main.c **** { - 2064 .loc 1 3159 6 is_stmt 0 view .LVU669 - 2065 00bc 2920 movs r0, #41 - 2066 00be FFF7FEFF bl AD9102_ReadReg - 2067 .LVL217: -3159:Src/main.c **** { - 2068 .loc 1 3159 44 discriminator 1 view .LVU670 - 2069 00c2 BDF80430 ldrh r3, [sp, #4] -3159:Src/main.c **** { - 2070 .loc 1 3159 5 discriminator 1 view .LVU671 - 2071 00c6 9842 cmp r0, r3 - 2072 00c8 00D0 beq .L120 -3161:Src/main.c **** } - 2073 .loc 1 3161 6 view .LVU672 - 2074 00ca 0025 movs r5, #0 - 2075 .LVL218: - 2076 .L120: + 1987 .loc 1 3159 5 is_stmt 0 view .LVU634 + 1988 003e 35B1 cbz r5, .L135 3163:Src/main.c **** { - 2077 .loc 1 3163 2 is_stmt 1 view .LVU673 + 1989 .loc 1 3163 2 is_stmt 1 view .LVU635 3163:Src/main.c **** { - 2078 .loc 1 3163 6 is_stmt 0 view .LVU674 - 2079 00cc 1F20 movs r0, #31 - 2080 00ce FFF7FEFF bl AD9102_ReadReg - 2081 .LVL219: -3163:Src/main.c **** { - 2082 .loc 1 3163 5 discriminator 1 view .LVU675 - 2083 00d2 00B1 cbz r0, .L121 + 1990 .loc 1 3163 5 is_stmt 0 view .LVU636 + 1991 0040 0F2D cmp r5, #15 + 1992 0042 05D9 bls .L118 3165:Src/main.c **** } - 2084 .loc 1 3165 6 view .LVU676 - 2085 00d4 0025 movs r5, #0 - 2086 .LVL220: - 2087 .L121: -3167:Src/main.c **** { - 2088 .loc 1 3167 2 is_stmt 1 view .LVU677 -3167:Src/main.c **** { - 2089 .loc 1 3167 6 is_stmt 0 view .LVU678 - 2090 00d6 5D20 movs r0, #93 - 2091 00d8 FFF7FEFF bl AD9102_ReadReg - 2092 .LVL221: -3167:Src/main.c **** { - 2093 .loc 1 3167 5 discriminator 1 view .LVU679 - 2094 00dc 00B1 cbz r0, .L122 -3169:Src/main.c **** } - 2095 .loc 1 3169 6 view .LVU680 - 2096 00de 0025 movs r5, #0 - 2097 .LVL222: - 2098 .L122: -3171:Src/main.c **** { - 2099 .loc 1 3171 2 is_stmt 1 view .LVU681 -3171:Src/main.c **** { - 2100 .loc 1 3171 6 is_stmt 0 view .LVU682 - ARM GAS /tmp/ccEQxcUB.s page 172 + 1993 .loc 1 3165 8 view .LVU637 + ARM GAS /tmp/ccuHnxNu.s page 170 - 2101 00e0 5E20 movs r0, #94 - 2102 00e2 FFF7FEFF bl AD9102_ReadReg - 2103 .LVL223: -3171:Src/main.c **** { - 2104 .loc 1 3171 5 discriminator 1 view .LVU683 - 2105 00e6 A042 cmp r0, r4 - 2106 00e8 00D0 beq .L123 -3173:Src/main.c **** } - 2107 .loc 1 3173 6 view .LVU684 - 2108 00ea 0025 movs r5, #0 - 2109 .LVL224: - 2110 .L123: -3175:Src/main.c **** { - 2111 .loc 1 3175 2 is_stmt 1 view .LVU685 -3175:Src/main.c **** { - 2112 .loc 1 3175 6 is_stmt 0 view .LVU686 - 2113 00ec 2B20 movs r0, #43 - 2114 00ee FFF7FEFF bl AD9102_ReadReg - 2115 .LVL225: -3175:Src/main.c **** { - 2116 .loc 1 3175 5 discriminator 1 view .LVU687 - 2117 00f2 40F20113 movw r3, #257 - 2118 00f6 9842 cmp r0, r3 - 2119 00f8 00D0 beq .L124 -3177:Src/main.c **** } - 2120 .loc 1 3177 6 view .LVU688 - 2121 00fa 0025 movs r5, #0 - 2122 .LVL226: - 2123 .L124: -3180:Src/main.c **** } - 2124 .loc 1 3180 2 is_stmt 1 view .LVU689 + 1994 0044 0F25 movs r5, #15 + 1995 .LVL198: +3165:Src/main.c **** } + 1996 .loc 1 3165 8 view .LVU638 + 1997 0046 03E0 b .L118 + 1998 .LVL199: + 1999 .L134: +3157:Src/main.c **** } + 2000 .loc 1 3157 11 view .LVU639 + 2001 0048 4FF48054 mov r4, #4096 + 2002 .LVL200: +3157:Src/main.c **** } + 2003 .loc 1 3157 11 view .LVU640 + 2004 004c F7E7 b .L117 + 2005 .LVL201: + 2006 .L135: +3161:Src/main.c **** } + 2007 .loc 1 3161 8 view .LVU641 + 2008 004e 0125 movs r5, #1 + 2009 .LVL202: + 2010 .L118: +3168:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2011 .loc 1 3168 2 is_stmt 1 view .LVU642 +3168:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2012 .loc 1 3168 63 is_stmt 0 view .LVU643 + 2013 0050 2E02 lsls r6, r5, #8 + 2014 0052 06F47066 and r6, r6, #3840 +3168:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2015 .loc 1 3168 11 view .LVU644 + 2016 0056 46F01106 orr r6, r6, #17 + 2017 .LVL203: +3171:Src/main.c **** if (pat_period == 0u) + 2018 .loc 1 3171 2 is_stmt 1 view .LVU645 +3171:Src/main.c **** if (pat_period == 0u) + 2019 .loc 1 3171 24 is_stmt 0 view .LVU646 + 2020 005a 0194 str r4, [sp, #4] +3171:Src/main.c **** if (pat_period == 0u) + 2021 .loc 1 3171 44 view .LVU647 + 2022 005c 05F00F05 and r5, r5, #15 + 2023 .LVL204: +3171:Src/main.c **** if (pat_period == 0u) + 2024 .loc 1 3171 11 view .LVU648 + 2025 0060 04FB05F5 mul r5, r4, r5 + 2026 .LVL205: +3172:Src/main.c **** { + 2027 .loc 1 3172 2 is_stmt 1 view .LVU649 +3172:Src/main.c **** { + 2028 .loc 1 3172 5 is_stmt 0 view .LVU650 + 2029 0064 1DB1 cbz r5, .L119 +3176:Src/main.c **** { + 2030 .loc 1 3176 2 is_stmt 1 view .LVU651 +3176:Src/main.c **** { + 2031 .loc 1 3176 5 is_stmt 0 view .LVU652 + 2032 0066 B5F5803F cmp r5, #65536 + 2033 006a 4CD2 bcs .L137 + 2034 006c 0195 str r5, [sp, #4] + 2035 .L119: + ARM GAS /tmp/ccuHnxNu.s page 171 + + + 2036 .LVL206: 3181:Src/main.c **** - 2125 .loc 1 3181 1 is_stmt 0 view .LVU690 - 2126 00fc 85F00100 eor r0, r5, #1 - 2127 0100 03B0 add sp, sp, #12 - 2128 .LCFI18: - 2129 .cfi_remember_state - 2130 .cfi_def_cfa_offset 36 - 2131 @ sp needed - 2132 0102 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} - 2133 .LVL227: - 2134 .L130: - 2135 .LCFI19: - 2136 .cfi_restore_state -3123:Src/main.c **** } - 2137 .loc 1 3123 14 view .LVU691 - 2138 0106 4FF6FF73 movw r3, #65535 - 2139 010a 0193 str r3, [sp, #4] - 2140 010c AFE7 b .L112 - 2141 .LVL228: - 2142 .L131: -3132:Src/main.c **** } - 2143 .loc 1 3132 6 view .LVU692 - 2144 010e 0025 movs r5, #0 - 2145 0110 B5E7 b .L113 - 2146 .cfi_endproc - 2147 .LFE1224: - ARM GAS /tmp/ccEQxcUB.s page 173 + 2037 .loc 1 3181 2 is_stmt 1 view .LVU653 +3181:Src/main.c **** + 2038 .loc 1 3181 43 is_stmt 0 view .LVU654 + 2039 006e 013C subs r4, r4, #1 + 2040 .LVL207: +3181:Src/main.c **** + 2041 .loc 1 3181 43 view .LVU655 + 2042 0070 A4B2 uxth r4, r4 +3181:Src/main.c **** + 2043 .loc 1 3181 11 view .LVU656 + 2044 0072 2401 lsls r4, r4, #4 + 2045 0074 A4B2 uxth r4, r4 + 2046 .LVL208: +3183:Src/main.c **** + 2047 .loc 1 3183 2 is_stmt 1 view .LVU657 +3185:Src/main.c **** { + 2048 .loc 1 3185 2 view .LVU658 +3185:Src/main.c **** { + 2049 .loc 1 3185 5 is_stmt 0 view .LVU659 + 2050 0076 BAF1000F cmp r10, #0 + 2051 007a 48D1 bne .L138 +3183:Src/main.c **** + 2052 .loc 1 3183 10 view .LVU660 + 2053 007c 0125 movs r5, #1 + 2054 .L120: + 2055 .LVL209: +3189:Src/main.c **** { + 2056 .loc 1 3189 2 is_stmt 1 view .LVU661 +3189:Src/main.c **** { + 2057 .loc 1 3189 5 is_stmt 0 view .LVU662 + 2058 007e 19F4F47F tst r9, #488 + 2059 0082 00D0 beq .L121 +3191:Src/main.c **** } + 2060 .loc 1 3191 6 view .LVU663 + 2061 0084 0025 movs r5, #0 + 2062 .LVL210: + 2063 .L121: +3193:Src/main.c **** { + 2064 .loc 1 3193 2 is_stmt 1 view .LVU664 +3193:Src/main.c **** { + 2065 .loc 1 3193 5 is_stmt 0 view .LVU665 + 2066 0086 18F40E6F tst r8, #2272 + 2067 008a 00D0 beq .L122 +3195:Src/main.c **** } + 2068 .loc 1 3195 6 view .LVU666 + 2069 008c 0025 movs r5, #0 + 2070 .LVL211: + 2071 .L122: +3197:Src/main.c **** { + 2072 .loc 1 3197 2 is_stmt 1 view .LVU667 +3197:Src/main.c **** { + 2073 .loc 1 3197 5 is_stmt 0 view .LVU668 + 2074 008e 10F03F0F tst r0, #63 + 2075 0092 00D0 beq .L123 +3199:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 172 - 2149 .section .text.AD9102_CheckFlags,"ax",%progbits - 2150 .align 1 - 2151 .syntax unified - 2152 .thumb - 2153 .thumb_func - 2155 AD9102_CheckFlags: - 2156 .LVL229: - 2157 .LFB1223: -3006:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 2158 .loc 1 3006 1 is_stmt 1 view -0 - 2159 .cfi_startproc - 2160 @ args = 8, pretend = 0, frame = 8 - 2161 @ frame_needed = 0, uses_anonymous_args = 0 -3006:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 2162 .loc 1 3006 1 is_stmt 0 view .LVU694 - 2163 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} - 2164 .LCFI20: - 2165 .cfi_def_cfa_offset 36 - 2166 .cfi_offset 4, -36 - 2167 .cfi_offset 5, -32 - 2168 .cfi_offset 6, -28 - 2169 .cfi_offset 7, -24 - 2170 .cfi_offset 8, -20 - 2171 .cfi_offset 9, -16 - 2172 .cfi_offset 10, -12 - 2173 .cfi_offset 11, -8 - 2174 .cfi_offset 14, -4 - 2175 0004 83B0 sub sp, sp, #12 - 2176 .LCFI21: - 2177 .cfi_def_cfa_offset 48 - 2178 0006 0190 str r0, [sp, #4] - 2179 0008 0F46 mov r7, r1 - 2180 000a 1546 mov r5, r2 - 2181 000c 1C46 mov r4, r3 - 2182 000e BDF834B0 ldrh fp, [sp, #52] -3007:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2183 .loc 1 3007 2 is_stmt 1 view .LVU695 -3007:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2184 .loc 1 3007 23 is_stmt 0 view .LVU696 - 2185 0012 0020 movs r0, #0 - 2186 .LVL230: -3007:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2187 .loc 1 3007 23 view .LVU697 - 2188 0014 FFF7FEFF bl AD9102_ReadReg - 2189 .LVL231: -3007:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2190 .loc 1 3007 23 view .LVU698 - 2191 0018 8246 mov r10, r0 - 2192 .LVL232: -3008:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 2193 .loc 1 3008 2 is_stmt 1 view .LVU699 -3008:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 2194 .loc 1 3008 22 is_stmt 0 view .LVU700 - 2195 001a 0120 movs r0, #1 - 2196 001c FFF7FEFF bl AD9102_ReadReg - 2197 .LVL233: - 2198 0020 8146 mov r9, r0 - ARM GAS /tmp/ccEQxcUB.s page 174 + 2076 .loc 1 3199 6 view .LVU669 + 2077 0094 0025 movs r5, #0 + 2078 .LVL212: + 2079 .L123: +3201:Src/main.c **** { + 2080 .loc 1 3201 2 is_stmt 1 view .LVU670 +3201:Src/main.c **** { + 2081 .loc 1 3201 5 is_stmt 0 view .LVU671 + 2082 0096 1FB1 cbz r7, .L124 +3201:Src/main.c **** { + 2083 .loc 1 3201 17 discriminator 1 view .LVU672 + 2084 0098 1BF0010F tst fp, #1 + 2085 009c 00D1 bne .L124 +3203:Src/main.c **** } + 2086 .loc 1 3203 6 view .LVU673 + 2087 009e 0025 movs r5, #0 + 2088 .LVL213: + 2089 .L124: +3206:Src/main.c **** { + 2090 .loc 1 3206 2 is_stmt 1 view .LVU674 +3206:Src/main.c **** { + 2091 .loc 1 3206 6 is_stmt 0 view .LVU675 + 2092 00a0 2720 movs r0, #39 + 2093 .LVL214: +3206:Src/main.c **** { + 2094 .loc 1 3206 6 view .LVU676 + 2095 00a2 FFF7FEFF bl AD9102_ReadReg + 2096 .LVL215: +3206:Src/main.c **** { + 2097 .loc 1 3206 5 discriminator 1 view .LVU677 + 2098 00a6 43F23003 movw r3, #12336 + 2099 00aa 9842 cmp r0, r3 + 2100 00ac 00D0 beq .L125 +3208:Src/main.c **** } + 2101 .loc 1 3208 6 view .LVU678 + 2102 00ae 0025 movs r5, #0 + 2103 .LVL216: + 2104 .L125: +3210:Src/main.c **** { + 2105 .loc 1 3210 2 is_stmt 1 view .LVU679 +3210:Src/main.c **** { + 2106 .loc 1 3210 6 is_stmt 0 view .LVU680 + 2107 00b0 2820 movs r0, #40 + 2108 00b2 FFF7FEFF bl AD9102_ReadReg + 2109 .LVL217: +3210:Src/main.c **** { + 2110 .loc 1 3210 5 discriminator 1 view .LVU681 + 2111 00b6 B042 cmp r0, r6 + 2112 00b8 00D0 beq .L126 +3212:Src/main.c **** } + 2113 .loc 1 3212 6 view .LVU682 + 2114 00ba 0025 movs r5, #0 + 2115 .LVL218: + 2116 .L126: +3214:Src/main.c **** { + 2117 .loc 1 3214 2 is_stmt 1 view .LVU683 +3214:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 173 - 2199 .LVL234: -3009:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 2200 .loc 1 3009 2 is_stmt 1 view .LVU701 -3009:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 2201 .loc 1 3009 22 is_stmt 0 view .LVU702 - 2202 0022 0220 movs r0, #2 - 2203 0024 FFF7FEFF bl AD9102_ReadReg - 2204 .LVL235: - 2205 0028 8046 mov r8, r0 - 2206 .LVL236: -3010:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 2207 .loc 1 3010 2 is_stmt 1 view .LVU703 -3010:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 2208 .loc 1 3010 21 is_stmt 0 view .LVU704 - 2209 002a 6020 movs r0, #96 - 2210 002c FFF7FEFF bl AD9102_ReadReg - 2211 .LVL237: -3011:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2212 .loc 1 3011 2 is_stmt 1 view .LVU705 -3012:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 2213 .loc 1 3012 57 is_stmt 0 view .LVU706 - 2214 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2 - 2215 0034 1B01 lsls r3, r3, #4 - 2216 0036 03F0F003 and r3, r3, #240 -3011:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2217 .loc 1 3011 11 view .LVU707 - 2218 003a 40F20116 movw r6, #257 - 2219 003e 1E43 orrs r6, r6, r3 - 2220 .LVL238: -3015:Src/main.c **** { - 2221 .loc 1 3015 2 is_stmt 1 view .LVU708 -3015:Src/main.c **** { - 2222 .loc 1 3015 5 is_stmt 0 view .LVU709 - 2223 0040 1CB1 cbz r4, .L157 -3019:Src/main.c **** { - 2224 .loc 1 3019 2 is_stmt 1 view .LVU710 -3019:Src/main.c **** { - 2225 .loc 1 3019 5 is_stmt 0 view .LVU711 - 2226 0042 3F2C cmp r4, #63 - 2227 0044 02D9 bls .L145 -3021:Src/main.c **** } - 2228 .loc 1 3021 12 view .LVU712 - 2229 0046 3F24 movs r4, #63 - 2230 .LVL239: -3021:Src/main.c **** } - 2231 .loc 1 3021 12 view .LVU713 - 2232 0048 00E0 b .L145 - 2233 .LVL240: - 2234 .L157: -3017:Src/main.c **** } - 2235 .loc 1 3017 12 view .LVU714 - 2236 004a 0124 movs r4, #1 - 2237 .LVL241: - 2238 .L145: -3023:Src/main.c **** { - 2239 .loc 1 3023 2 is_stmt 1 view .LVU715 -3023:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 175 + 2118 .loc 1 3214 6 is_stmt 0 view .LVU684 + 2119 00bc 2920 movs r0, #41 + 2120 00be FFF7FEFF bl AD9102_ReadReg + 2121 .LVL219: +3214:Src/main.c **** { + 2122 .loc 1 3214 44 discriminator 1 view .LVU685 + 2123 00c2 BDF80430 ldrh r3, [sp, #4] +3214:Src/main.c **** { + 2124 .loc 1 3214 5 discriminator 1 view .LVU686 + 2125 00c6 9842 cmp r0, r3 + 2126 00c8 00D0 beq .L127 +3216:Src/main.c **** } + 2127 .loc 1 3216 6 view .LVU687 + 2128 00ca 0025 movs r5, #0 + 2129 .LVL220: + 2130 .L127: +3218:Src/main.c **** { + 2131 .loc 1 3218 2 is_stmt 1 view .LVU688 +3218:Src/main.c **** { + 2132 .loc 1 3218 6 is_stmt 0 view .LVU689 + 2133 00cc 1F20 movs r0, #31 + 2134 00ce FFF7FEFF bl AD9102_ReadReg + 2135 .LVL221: +3218:Src/main.c **** { + 2136 .loc 1 3218 5 discriminator 1 view .LVU690 + 2137 00d2 00B1 cbz r0, .L128 +3220:Src/main.c **** } + 2138 .loc 1 3220 6 view .LVU691 + 2139 00d4 0025 movs r5, #0 + 2140 .LVL222: + 2141 .L128: +3222:Src/main.c **** { + 2142 .loc 1 3222 2 is_stmt 1 view .LVU692 +3222:Src/main.c **** { + 2143 .loc 1 3222 6 is_stmt 0 view .LVU693 + 2144 00d6 5D20 movs r0, #93 + 2145 00d8 FFF7FEFF bl AD9102_ReadReg + 2146 .LVL223: +3222:Src/main.c **** { + 2147 .loc 1 3222 5 discriminator 1 view .LVU694 + 2148 00dc 00B1 cbz r0, .L129 +3224:Src/main.c **** } + 2149 .loc 1 3224 6 view .LVU695 + 2150 00de 0025 movs r5, #0 + 2151 .LVL224: + 2152 .L129: +3226:Src/main.c **** { + 2153 .loc 1 3226 2 is_stmt 1 view .LVU696 +3226:Src/main.c **** { + 2154 .loc 1 3226 6 is_stmt 0 view .LVU697 + 2155 00e0 5E20 movs r0, #94 + 2156 00e2 FFF7FEFF bl AD9102_ReadReg + 2157 .LVL225: +3226:Src/main.c **** { + 2158 .loc 1 3226 5 discriminator 1 view .LVU698 + 2159 00e6 A042 cmp r0, r4 + 2160 00e8 00D0 beq .L130 + ARM GAS /tmp/ccuHnxNu.s page 174 - 2240 .loc 1 3023 5 is_stmt 0 view .LVU716 - 2241 004c BBF1000F cmp fp, #0 - 2242 0050 01D1 bne .L146 -3025:Src/main.c **** } - 2243 .loc 1 3025 14 view .LVU717 - 2244 0052 4FF6FF7B movw fp, #65535 - 2245 .L146: - 2246 .LVL242: -3027:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2247 .loc 1 3027 2 is_stmt 1 view .LVU718 -3028:Src/main.c **** - 2248 .loc 1 3028 35 is_stmt 0 view .LVU719 - 2249 0056 05F00305 and r5, r5, #3 - 2250 .LVL243: -3027:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2251 .loc 1 3027 71 view .LVU720 - 2252 005a A400 lsls r4, r4, #2 - 2253 .LVL244: -3027:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2254 .loc 1 3027 71 view .LVU721 - 2255 005c E4B2 uxtb r4, r4 -3027:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2256 .loc 1 3027 11 view .LVU722 - 2257 005e 2543 orrs r5, r5, r4 - 2258 .LVL245: -3030:Src/main.c **** - 2259 .loc 1 3030 2 is_stmt 1 view .LVU723 -3033:Src/main.c **** { - 2260 .loc 1 3033 2 view .LVU724 -3033:Src/main.c **** { - 2261 .loc 1 3033 5 is_stmt 0 view .LVU725 - 2262 0060 BAF1000F cmp r10, #0 - 2263 0064 36D1 bne .L160 -3030:Src/main.c **** - 2264 .loc 1 3030 10 view .LVU726 - 2265 0066 0124 movs r4, #1 - 2266 .L147: - 2267 .LVL246: -3039:Src/main.c **** { - 2268 .loc 1 3039 2 is_stmt 1 view .LVU727 -3039:Src/main.c **** { - 2269 .loc 1 3039 5 is_stmt 0 view .LVU728 - 2270 0068 19F4F47F tst r9, #488 - 2271 006c 00D0 beq .L148 -3041:Src/main.c **** } - 2272 .loc 1 3041 6 view .LVU729 - 2273 006e 0024 movs r4, #0 - 2274 .LVL247: - 2275 .L148: -3045:Src/main.c **** { - 2276 .loc 1 3045 2 is_stmt 1 view .LVU730 -3045:Src/main.c **** { - 2277 .loc 1 3045 5 is_stmt 0 view .LVU731 - 2278 0070 18F40E6F tst r8, #2272 - 2279 0074 00D0 beq .L149 -3047:Src/main.c **** } - 2280 .loc 1 3047 6 view .LVU732 - ARM GAS /tmp/ccEQxcUB.s page 176 +3228:Src/main.c **** } + 2161 .loc 1 3228 6 view .LVU699 + 2162 00ea 0025 movs r5, #0 + 2163 .LVL226: + 2164 .L130: +3230:Src/main.c **** { + 2165 .loc 1 3230 2 is_stmt 1 view .LVU700 +3230:Src/main.c **** { + 2166 .loc 1 3230 6 is_stmt 0 view .LVU701 + 2167 00ec 2B20 movs r0, #43 + 2168 00ee FFF7FEFF bl AD9102_ReadReg + 2169 .LVL227: +3230:Src/main.c **** { + 2170 .loc 1 3230 5 discriminator 1 view .LVU702 + 2171 00f2 40F20113 movw r3, #257 + 2172 00f6 9842 cmp r0, r3 + 2173 00f8 00D0 beq .L131 +3232:Src/main.c **** } + 2174 .loc 1 3232 6 view .LVU703 + 2175 00fa 0025 movs r5, #0 + 2176 .LVL228: + 2177 .L131: +3235:Src/main.c **** } + 2178 .loc 1 3235 2 is_stmt 1 view .LVU704 +3236:Src/main.c **** + 2179 .loc 1 3236 1 is_stmt 0 view .LVU705 + 2180 00fc 85F00100 eor r0, r5, #1 + 2181 0100 03B0 add sp, sp, #12 + 2182 .LCFI18: + 2183 .cfi_remember_state + 2184 .cfi_def_cfa_offset 36 + 2185 @ sp needed + 2186 0102 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2187 .LVL229: + 2188 .L137: + 2189 .LCFI19: + 2190 .cfi_restore_state +3178:Src/main.c **** } + 2191 .loc 1 3178 14 view .LVU706 + 2192 0106 4FF6FF73 movw r3, #65535 + 2193 010a 0193 str r3, [sp, #4] + 2194 010c AFE7 b .L119 + 2195 .LVL230: + 2196 .L138: +3187:Src/main.c **** } + 2197 .loc 1 3187 6 view .LVU707 + 2198 010e 0025 movs r5, #0 + 2199 0110 B5E7 b .L120 + 2200 .cfi_endproc + 2201 .LFE1226: + 2203 .section .text.AD9102_CheckFlags,"ax",%progbits + 2204 .align 1 + 2205 .syntax unified + 2206 .thumb + 2207 .thumb_func + 2209 AD9102_CheckFlags: + 2210 .LVL231: + ARM GAS /tmp/ccuHnxNu.s page 175 - 2281 0076 0024 movs r4, #0 - 2282 .LVL248: - 2283 .L149: -3051:Src/main.c **** { - 2284 .loc 1 3051 2 is_stmt 1 view .LVU733 -3051:Src/main.c **** { - 2285 .loc 1 3051 5 is_stmt 0 view .LVU734 - 2286 0078 10F03F0F tst r0, #63 - 2287 007c 00D0 beq .L150 -3053:Src/main.c **** } - 2288 .loc 1 3053 6 view .LVU735 - 2289 007e 0024 movs r4, #0 - 2290 .LVL249: - 2291 .L150: -3056:Src/main.c **** { - 2292 .loc 1 3056 2 is_stmt 1 view .LVU736 -3056:Src/main.c **** { - 2293 .loc 1 3056 5 is_stmt 0 view .LVU737 - 2294 0080 27B1 cbz r7, .L151 -3056:Src/main.c **** { - 2295 .loc 1 3056 17 discriminator 1 view .LVU738 - 2296 0082 019B ldr r3, [sp, #4] - 2297 0084 13F0010F tst r3, #1 - 2298 0088 00D1 bne .L151 -3058:Src/main.c **** } - 2299 .loc 1 3058 6 view .LVU739 - 2300 008a 0024 movs r4, #0 - 2301 .LVL250: - 2302 .L151: -3061:Src/main.c **** { - 2303 .loc 1 3061 2 is_stmt 1 view .LVU740 -3061:Src/main.c **** { - 2304 .loc 1 3061 6 is_stmt 0 view .LVU741 - 2305 008c 2720 movs r0, #39 - 2306 .LVL251: -3061:Src/main.c **** { - 2307 .loc 1 3061 6 view .LVU742 - 2308 008e FFF7FEFF bl AD9102_ReadReg - 2309 .LVL252: -3061:Src/main.c **** { - 2310 .loc 1 3061 5 discriminator 1 view .LVU743 - 2311 0092 43F21223 movw r3, #12818 - 2312 0096 9842 cmp r0, r3 - 2313 0098 00D0 beq .L152 -3063:Src/main.c **** } - 2314 .loc 1 3063 6 view .LVU744 - 2315 009a 0024 movs r4, #0 - 2316 .LVL253: - 2317 .L152: -3065:Src/main.c **** { - 2318 .loc 1 3065 2 is_stmt 1 view .LVU745 -3065:Src/main.c **** { - 2319 .loc 1 3065 6 is_stmt 0 view .LVU746 - 2320 009c 2820 movs r0, #40 - 2321 009e FFF7FEFF bl AD9102_ReadReg - 2322 .LVL254: -3065:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 177 + 2211 .LFB1225: +3061:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 2212 .loc 1 3061 1 is_stmt 1 view -0 + 2213 .cfi_startproc + 2214 @ args = 8, pretend = 0, frame = 8 + 2215 @ frame_needed = 0, uses_anonymous_args = 0 +3061:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 2216 .loc 1 3061 1 is_stmt 0 view .LVU709 + 2217 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2218 .LCFI20: + 2219 .cfi_def_cfa_offset 36 + 2220 .cfi_offset 4, -36 + 2221 .cfi_offset 5, -32 + 2222 .cfi_offset 6, -28 + 2223 .cfi_offset 7, -24 + 2224 .cfi_offset 8, -20 + 2225 .cfi_offset 9, -16 + 2226 .cfi_offset 10, -12 + 2227 .cfi_offset 11, -8 + 2228 .cfi_offset 14, -4 + 2229 0004 83B0 sub sp, sp, #12 + 2230 .LCFI21: + 2231 .cfi_def_cfa_offset 48 + 2232 0006 0190 str r0, [sp, #4] + 2233 0008 0F46 mov r7, r1 + 2234 000a 1546 mov r5, r2 + 2235 000c 1C46 mov r4, r3 + 2236 000e BDF834B0 ldrh fp, [sp, #52] +3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2237 .loc 1 3062 2 is_stmt 1 view .LVU710 +3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2238 .loc 1 3062 23 is_stmt 0 view .LVU711 + 2239 0012 0020 movs r0, #0 + 2240 .LVL232: +3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2241 .loc 1 3062 23 view .LVU712 + 2242 0014 FFF7FEFF bl AD9102_ReadReg + 2243 .LVL233: +3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2244 .loc 1 3062 23 view .LVU713 + 2245 0018 8246 mov r10, r0 + 2246 .LVL234: +3063:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 2247 .loc 1 3063 2 is_stmt 1 view .LVU714 +3063:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 2248 .loc 1 3063 22 is_stmt 0 view .LVU715 + 2249 001a 0120 movs r0, #1 + 2250 001c FFF7FEFF bl AD9102_ReadReg + 2251 .LVL235: + 2252 0020 8146 mov r9, r0 + 2253 .LVL236: +3064:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 2254 .loc 1 3064 2 is_stmt 1 view .LVU716 +3064:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 2255 .loc 1 3064 22 is_stmt 0 view .LVU717 + 2256 0022 0220 movs r0, #2 + 2257 0024 FFF7FEFF bl AD9102_ReadReg + ARM GAS /tmp/ccuHnxNu.s page 176 - 2323 .loc 1 3065 5 discriminator 1 view .LVU747 - 2324 00a2 B042 cmp r0, r6 - 2325 00a4 00D0 beq .L153 -3067:Src/main.c **** } - 2326 .loc 1 3067 6 view .LVU748 - 2327 00a6 0024 movs r4, #0 - 2328 .LVL255: - 2329 .L153: -3069:Src/main.c **** { - 2330 .loc 1 3069 2 is_stmt 1 view .LVU749 -3069:Src/main.c **** { - 2331 .loc 1 3069 6 is_stmt 0 view .LVU750 - 2332 00a8 2920 movs r0, #41 - 2333 00aa FFF7FEFF bl AD9102_ReadReg - 2334 .LVL256: -3069:Src/main.c **** { - 2335 .loc 1 3069 5 discriminator 1 view .LVU751 - 2336 00ae 5845 cmp r0, fp - 2337 00b0 00D0 beq .L154 -3071:Src/main.c **** } - 2338 .loc 1 3071 6 view .LVU752 - 2339 00b2 0024 movs r4, #0 - 2340 .LVL257: - 2341 .L154: -3073:Src/main.c **** { - 2342 .loc 1 3073 2 is_stmt 1 view .LVU753 -3073:Src/main.c **** { - 2343 .loc 1 3073 6 is_stmt 0 view .LVU754 - 2344 00b4 1F20 movs r0, #31 - 2345 00b6 FFF7FEFF bl AD9102_ReadReg - 2346 .LVL258: -3073:Src/main.c **** { - 2347 .loc 1 3073 5 discriminator 1 view .LVU755 - 2348 00ba 00B1 cbz r0, .L155 -3075:Src/main.c **** } - 2349 .loc 1 3075 6 view .LVU756 - 2350 00bc 0024 movs r4, #0 - 2351 .LVL259: - 2352 .L155: -3077:Src/main.c **** { - 2353 .loc 1 3077 2 is_stmt 1 view .LVU757 -3077:Src/main.c **** { - 2354 .loc 1 3077 6 is_stmt 0 view .LVU758 - 2355 00be 3720 movs r0, #55 - 2356 00c0 FFF7FEFF bl AD9102_ReadReg - 2357 .LVL260: -3077:Src/main.c **** { - 2358 .loc 1 3077 5 discriminator 1 view .LVU759 - 2359 00c4 A842 cmp r0, r5 - 2360 00c6 00D0 beq .L156 -3079:Src/main.c **** } - 2361 .loc 1 3079 6 view .LVU760 - 2362 00c8 0024 movs r4, #0 - 2363 .LVL261: - 2364 .L156: -3082:Src/main.c **** } - 2365 .loc 1 3082 2 is_stmt 1 view .LVU761 - ARM GAS /tmp/ccEQxcUB.s page 178 + 2258 .LVL237: + 2259 0028 8046 mov r8, r0 + 2260 .LVL238: +3065:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2261 .loc 1 3065 2 is_stmt 1 view .LVU718 +3065:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2262 .loc 1 3065 21 is_stmt 0 view .LVU719 + 2263 002a 6020 movs r0, #96 + 2264 002c FFF7FEFF bl AD9102_ReadReg + 2265 .LVL239: +3066:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2266 .loc 1 3066 2 is_stmt 1 view .LVU720 +3067:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2267 .loc 1 3067 57 is_stmt 0 view .LVU721 + 2268 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2 + 2269 0034 1B01 lsls r3, r3, #4 + 2270 0036 03F0F003 and r3, r3, #240 +3066:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2271 .loc 1 3066 11 view .LVU722 + 2272 003a 40F20116 movw r6, #257 + 2273 003e 1E43 orrs r6, r6, r3 + 2274 .LVL240: +3070:Src/main.c **** { + 2275 .loc 1 3070 2 is_stmt 1 view .LVU723 +3070:Src/main.c **** { + 2276 .loc 1 3070 5 is_stmt 0 view .LVU724 + 2277 0040 1CB1 cbz r4, .L164 +3074:Src/main.c **** { + 2278 .loc 1 3074 2 is_stmt 1 view .LVU725 +3074:Src/main.c **** { + 2279 .loc 1 3074 5 is_stmt 0 view .LVU726 + 2280 0042 3F2C cmp r4, #63 + 2281 0044 02D9 bls .L152 +3076:Src/main.c **** } + 2282 .loc 1 3076 12 view .LVU727 + 2283 0046 3F24 movs r4, #63 + 2284 .LVL241: +3076:Src/main.c **** } + 2285 .loc 1 3076 12 view .LVU728 + 2286 0048 00E0 b .L152 + 2287 .LVL242: + 2288 .L164: +3072:Src/main.c **** } + 2289 .loc 1 3072 12 view .LVU729 + 2290 004a 0124 movs r4, #1 + 2291 .LVL243: + 2292 .L152: +3078:Src/main.c **** { + 2293 .loc 1 3078 2 is_stmt 1 view .LVU730 +3078:Src/main.c **** { + 2294 .loc 1 3078 5 is_stmt 0 view .LVU731 + 2295 004c BBF1000F cmp fp, #0 + 2296 0050 01D1 bne .L153 +3080:Src/main.c **** } + 2297 .loc 1 3080 14 view .LVU732 + 2298 0052 4FF6FF7B movw fp, #65535 + 2299 .L153: + ARM GAS /tmp/ccuHnxNu.s page 177 + 2300 .LVL244: +3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2301 .loc 1 3082 2 is_stmt 1 view .LVU733 3083:Src/main.c **** - 2366 .loc 1 3083 1 is_stmt 0 view .LVU762 - 2367 00ca 84F00100 eor r0, r4, #1 - 2368 00ce 03B0 add sp, sp, #12 - 2369 .LCFI22: - 2370 .cfi_remember_state - 2371 .cfi_def_cfa_offset 36 - 2372 @ sp needed - 2373 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} - 2374 .LVL262: - 2375 .L160: - 2376 .LCFI23: - 2377 .cfi_restore_state -3035:Src/main.c **** } - 2378 .loc 1 3035 6 view .LVU763 - 2379 00d4 0024 movs r4, #0 - 2380 00d6 C7E7 b .L147 - 2381 .cfi_endproc - 2382 .LFE1223: - 2384 .section .text.AD9102_ApplySram,"ax",%progbits - 2385 .align 1 - 2386 .syntax unified - 2387 .thumb - 2388 .thumb_func - 2390 AD9102_ApplySram: - 2391 .LVL263: - 2392 .LFB1222: -2933:Src/main.c **** if (samples == 0u) - 2393 .loc 1 2933 1 is_stmt 1 view -0 - 2394 .cfi_startproc - 2395 @ args = 4, pretend = 0, frame = 8 - 2396 @ frame_needed = 0, uses_anonymous_args = 0 -2933:Src/main.c **** if (samples == 0u) - 2397 .loc 1 2933 1 is_stmt 0 view .LVU765 - 2398 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} - 2399 .LCFI24: - 2400 .cfi_def_cfa_offset 28 - 2401 .cfi_offset 4, -28 - 2402 .cfi_offset 5, -24 - 2403 .cfi_offset 6, -20 - 2404 .cfi_offset 7, -16 - 2405 .cfi_offset 8, -12 - 2406 .cfi_offset 9, -8 - 2407 .cfi_offset 14, -4 - 2408 0004 83B0 sub sp, sp, #12 - 2409 .LCFI25: - 2410 .cfi_def_cfa_offset 40 - 2411 0006 0646 mov r6, r0 - 2412 0008 1F46 mov r7, r3 - 2413 000a BDF82880 ldrh r8, [sp, #40] -2934:Src/main.c **** { - 2414 .loc 1 2934 2 is_stmt 1 view .LVU766 -2934:Src/main.c **** { - 2415 .loc 1 2934 5 is_stmt 0 view .LVU767 - 2416 000e 21B1 cbz r1, .L181 - 2417 0010 0C46 mov r4, r1 -2938:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 179 + 2302 .loc 1 3083 35 is_stmt 0 view .LVU734 + 2303 0056 05F00305 and r5, r5, #3 + 2304 .LVL245: +3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2305 .loc 1 3082 71 view .LVU735 + 2306 005a A400 lsls r4, r4, #2 + 2307 .LVL246: +3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2308 .loc 1 3082 71 view .LVU736 + 2309 005c E4B2 uxtb r4, r4 +3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2310 .loc 1 3082 11 view .LVU737 + 2311 005e 2543 orrs r5, r5, r4 + 2312 .LVL247: +3085:Src/main.c **** + 2313 .loc 1 3085 2 is_stmt 1 view .LVU738 +3088:Src/main.c **** { + 2314 .loc 1 3088 2 view .LVU739 +3088:Src/main.c **** { + 2315 .loc 1 3088 5 is_stmt 0 view .LVU740 + 2316 0060 BAF1000F cmp r10, #0 + 2317 0064 36D1 bne .L167 +3085:Src/main.c **** + 2318 .loc 1 3085 10 view .LVU741 + 2319 0066 0124 movs r4, #1 + 2320 .L154: + 2321 .LVL248: +3094:Src/main.c **** { + 2322 .loc 1 3094 2 is_stmt 1 view .LVU742 +3094:Src/main.c **** { + 2323 .loc 1 3094 5 is_stmt 0 view .LVU743 + 2324 0068 19F4F47F tst r9, #488 + 2325 006c 00D0 beq .L155 +3096:Src/main.c **** } + 2326 .loc 1 3096 6 view .LVU744 + 2327 006e 0024 movs r4, #0 + 2328 .LVL249: + 2329 .L155: +3100:Src/main.c **** { + 2330 .loc 1 3100 2 is_stmt 1 view .LVU745 +3100:Src/main.c **** { + 2331 .loc 1 3100 5 is_stmt 0 view .LVU746 + 2332 0070 18F40E6F tst r8, #2272 + 2333 0074 00D0 beq .L156 +3102:Src/main.c **** } + 2334 .loc 1 3102 6 view .LVU747 + 2335 0076 0024 movs r4, #0 + 2336 .LVL250: + 2337 .L156: +3106:Src/main.c **** { + 2338 .loc 1 3106 2 is_stmt 1 view .LVU748 +3106:Src/main.c **** { + 2339 .loc 1 3106 5 is_stmt 0 view .LVU749 + ARM GAS /tmp/ccuHnxNu.s page 178 - 2418 .loc 1 2938 2 is_stmt 1 view .LVU768 -2938:Src/main.c **** { - 2419 .loc 1 2938 5 is_stmt 0 view .LVU769 - 2420 0012 0129 cmp r1, #1 - 2421 0014 02D8 bhi .L172 -2940:Src/main.c **** } - 2422 .loc 1 2940 11 view .LVU770 - 2423 0016 0224 movs r4, #2 - 2424 0018 03E0 b .L173 - 2425 .L181: -2936:Src/main.c **** } - 2426 .loc 1 2936 11 view .LVU771 - 2427 001a 1024 movs r4, #16 - 2428 .L172: - 2429 .LVL264: -2942:Src/main.c **** { - 2430 .loc 1 2942 2 is_stmt 1 view .LVU772 -2942:Src/main.c **** { - 2431 .loc 1 2942 5 is_stmt 0 view .LVU773 - 2432 001c B4F5805F cmp r4, #4096 - 2433 0020 04D8 bhi .L183 - 2434 .LVL265: - 2435 .L173: -2946:Src/main.c **** { - 2436 .loc 1 2946 2 is_stmt 1 view .LVU774 -2946:Src/main.c **** { - 2437 .loc 1 2946 5 is_stmt 0 view .LVU775 - 2438 0022 32B1 cbz r2, .L184 -2950:Src/main.c **** { - 2439 .loc 1 2950 2 is_stmt 1 view .LVU776 -2950:Src/main.c **** { - 2440 .loc 1 2950 5 is_stmt 0 view .LVU777 - 2441 0024 0F2A cmp r2, #15 - 2442 0026 05D9 bls .L174 -2952:Src/main.c **** } - 2443 .loc 1 2952 8 view .LVU778 - 2444 0028 0F22 movs r2, #15 - 2445 .LVL266: -2952:Src/main.c **** } - 2446 .loc 1 2952 8 view .LVU779 - 2447 002a 03E0 b .L174 - 2448 .LVL267: - 2449 .L183: -2944:Src/main.c **** } - 2450 .loc 1 2944 11 view .LVU780 - 2451 002c 4FF48054 mov r4, #4096 - 2452 .LVL268: -2944:Src/main.c **** } - 2453 .loc 1 2944 11 view .LVU781 - 2454 0030 F7E7 b .L173 - 2455 .LVL269: - 2456 .L184: -2948:Src/main.c **** } - 2457 .loc 1 2948 8 view .LVU782 - 2458 0032 0122 movs r2, #1 - 2459 .LVL270: - 2460 .L174: - ARM GAS /tmp/ccEQxcUB.s page 180 + 2340 0078 10F03F0F tst r0, #63 + 2341 007c 00D0 beq .L157 +3108:Src/main.c **** } + 2342 .loc 1 3108 6 view .LVU750 + 2343 007e 0024 movs r4, #0 + 2344 .LVL251: + 2345 .L157: +3111:Src/main.c **** { + 2346 .loc 1 3111 2 is_stmt 1 view .LVU751 +3111:Src/main.c **** { + 2347 .loc 1 3111 5 is_stmt 0 view .LVU752 + 2348 0080 27B1 cbz r7, .L158 +3111:Src/main.c **** { + 2349 .loc 1 3111 17 discriminator 1 view .LVU753 + 2350 0082 019B ldr r3, [sp, #4] + 2351 0084 13F0010F tst r3, #1 + 2352 0088 00D1 bne .L158 +3113:Src/main.c **** } + 2353 .loc 1 3113 6 view .LVU754 + 2354 008a 0024 movs r4, #0 + 2355 .LVL252: + 2356 .L158: +3116:Src/main.c **** { + 2357 .loc 1 3116 2 is_stmt 1 view .LVU755 +3116:Src/main.c **** { + 2358 .loc 1 3116 6 is_stmt 0 view .LVU756 + 2359 008c 2720 movs r0, #39 + 2360 .LVL253: +3116:Src/main.c **** { + 2361 .loc 1 3116 6 view .LVU757 + 2362 008e FFF7FEFF bl AD9102_ReadReg + 2363 .LVL254: +3116:Src/main.c **** { + 2364 .loc 1 3116 5 discriminator 1 view .LVU758 + 2365 0092 43F21223 movw r3, #12818 + 2366 0096 9842 cmp r0, r3 + 2367 0098 00D0 beq .L159 +3118:Src/main.c **** } + 2368 .loc 1 3118 6 view .LVU759 + 2369 009a 0024 movs r4, #0 + 2370 .LVL255: + 2371 .L159: +3120:Src/main.c **** { + 2372 .loc 1 3120 2 is_stmt 1 view .LVU760 +3120:Src/main.c **** { + 2373 .loc 1 3120 6 is_stmt 0 view .LVU761 + 2374 009c 2820 movs r0, #40 + 2375 009e FFF7FEFF bl AD9102_ReadReg + 2376 .LVL256: +3120:Src/main.c **** { + 2377 .loc 1 3120 5 discriminator 1 view .LVU762 + 2378 00a2 B042 cmp r0, r6 + 2379 00a4 00D0 beq .L160 +3122:Src/main.c **** } + 2380 .loc 1 3122 6 view .LVU763 + 2381 00a6 0024 movs r4, #0 + 2382 .LVL257: + ARM GAS /tmp/ccuHnxNu.s page 179 -2955:Src/main.c **** { - 2461 .loc 1 2955 2 is_stmt 1 view .LVU783 -2955:Src/main.c **** { - 2462 .loc 1 2955 5 is_stmt 0 view .LVU784 - 2463 0034 B8F5005F cmp r8, #8192 - 2464 0038 01D3 bcc .L175 -2957:Src/main.c **** } - 2465 .loc 1 2957 13 view .LVU785 - 2466 003a 41F6FF78 movw r8, #8191 - 2467 .L175: - 2468 .LVL271: -2960:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2469 .loc 1 2960 2 is_stmt 1 view .LVU786 -2960:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2470 .loc 1 2960 63 is_stmt 0 view .LVU787 - 2471 003e 1502 lsls r5, r2, #8 - 2472 0040 05F47065 and r5, r5, #3840 -2960:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2473 .loc 1 2960 11 view .LVU788 - 2474 0044 45F01105 orr r5, r5, #17 - 2475 .LVL272: -2963:Src/main.c **** if (pat_period == 0u) - 2476 .loc 1 2963 2 is_stmt 1 view .LVU789 -2963:Src/main.c **** if (pat_period == 0u) - 2477 .loc 1 2963 24 is_stmt 0 view .LVU790 - 2478 0048 A146 mov r9, r4 -2963:Src/main.c **** if (pat_period == 0u) - 2479 .loc 1 2963 44 view .LVU791 - 2480 004a 02F00F02 and r2, r2, #15 - 2481 .LVL273: -2963:Src/main.c **** if (pat_period == 0u) - 2482 .loc 1 2963 11 view .LVU792 - 2483 004e 04FB02F2 mul r2, r4, r2 - 2484 .LVL274: -2964:Src/main.c **** { - 2485 .loc 1 2964 2 is_stmt 1 view .LVU793 -2964:Src/main.c **** { - 2486 .loc 1 2964 5 is_stmt 0 view .LVU794 - 2487 0052 1AB1 cbz r2, .L176 -2968:Src/main.c **** { - 2488 .loc 1 2968 2 is_stmt 1 view .LVU795 -2968:Src/main.c **** { - 2489 .loc 1 2968 5 is_stmt 0 view .LVU796 - 2490 0054 B2F5803F cmp r2, #65536 - 2491 0058 4ED2 bcs .L187 - 2492 005a 9146 mov r9, r2 - 2493 .L176: - 2494 .LVL275: -2973:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - 2495 .loc 1 2973 2 is_stmt 1 view .LVU797 - 2496 005c 4221 movs r1, #66 - 2497 005e 3748 ldr r0, .L189 - 2498 .LVL276: -2973:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - 2499 .loc 1 2973 2 is_stmt 0 view .LVU798 - 2500 0060 FFF7FEFF bl AD9102_WriteRegTable - 2501 .LVL277: - ARM GAS /tmp/ccEQxcUB.s page 181 + 2383 .L160: +3124:Src/main.c **** { + 2384 .loc 1 3124 2 is_stmt 1 view .LVU764 +3124:Src/main.c **** { + 2385 .loc 1 3124 6 is_stmt 0 view .LVU765 + 2386 00a8 2920 movs r0, #41 + 2387 00aa FFF7FEFF bl AD9102_ReadReg + 2388 .LVL258: +3124:Src/main.c **** { + 2389 .loc 1 3124 5 discriminator 1 view .LVU766 + 2390 00ae 5845 cmp r0, fp + 2391 00b0 00D0 beq .L161 +3126:Src/main.c **** } + 2392 .loc 1 3126 6 view .LVU767 + 2393 00b2 0024 movs r4, #0 + 2394 .LVL259: + 2395 .L161: +3128:Src/main.c **** { + 2396 .loc 1 3128 2 is_stmt 1 view .LVU768 +3128:Src/main.c **** { + 2397 .loc 1 3128 6 is_stmt 0 view .LVU769 + 2398 00b4 1F20 movs r0, #31 + 2399 00b6 FFF7FEFF bl AD9102_ReadReg + 2400 .LVL260: +3128:Src/main.c **** { + 2401 .loc 1 3128 5 discriminator 1 view .LVU770 + 2402 00ba 00B1 cbz r0, .L162 +3130:Src/main.c **** } + 2403 .loc 1 3130 6 view .LVU771 + 2404 00bc 0024 movs r4, #0 + 2405 .LVL261: + 2406 .L162: +3132:Src/main.c **** { + 2407 .loc 1 3132 2 is_stmt 1 view .LVU772 +3132:Src/main.c **** { + 2408 .loc 1 3132 6 is_stmt 0 view .LVU773 + 2409 00be 3720 movs r0, #55 + 2410 00c0 FFF7FEFF bl AD9102_ReadReg + 2411 .LVL262: +3132:Src/main.c **** { + 2412 .loc 1 3132 5 discriminator 1 view .LVU774 + 2413 00c4 A842 cmp r0, r5 + 2414 00c6 00D0 beq .L163 +3134:Src/main.c **** } + 2415 .loc 1 3134 6 view .LVU775 + 2416 00c8 0024 movs r4, #0 + 2417 .LVL263: + 2418 .L163: +3137:Src/main.c **** } + 2419 .loc 1 3137 2 is_stmt 1 view .LVU776 +3138:Src/main.c **** + 2420 .loc 1 3138 1 is_stmt 0 view .LVU777 + 2421 00ca 84F00100 eor r0, r4, #1 + 2422 00ce 03B0 add sp, sp, #12 + 2423 .LCFI22: + 2424 .cfi_remember_state + 2425 .cfi_def_cfa_offset 36 + ARM GAS /tmp/ccuHnxNu.s page 180 -2974:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); - 2502 .loc 1 2974 2 is_stmt 1 view .LVU799 - 2503 0064 0021 movs r1, #0 - 2504 0066 1E20 movs r0, #30 - 2505 0068 FFF7FEFF bl AD9102_WriteReg - 2506 .LVL278: -2975:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); - 2507 .loc 1 2975 2 view .LVU800 - 2508 006c 43F23001 movw r1, #12336 - 2509 0070 2720 movs r0, #39 - 2510 0072 FFF7FEFF bl AD9102_WriteReg - 2511 .LVL279: -2976:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); - 2512 .loc 1 2976 2 view .LVU801 - 2513 0076 4FF40071 mov r1, #512 - 2514 007a 3720 movs r0, #55 - 2515 007c FFF7FEFF bl AD9102_WriteReg - 2516 .LVL280: -2977:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); - 2517 .loc 1 2977 2 view .LVU802 - 2518 0080 40F20111 movw r1, #257 - 2519 0084 2B20 movs r0, #43 - 2520 0086 FFF7FEFF bl AD9102_WriteReg - 2521 .LVL281: -2978:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); - 2522 .loc 1 2978 2 view .LVU803 - 2523 008a 2946 mov r1, r5 - 2524 008c 2820 movs r0, #40 - 2525 008e FFF7FEFF bl AD9102_WriteReg - 2526 .LVL282: -2979:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat - 2527 .loc 1 2979 2 view .LVU804 - 2528 0092 1FFA89F1 uxth r1, r9 - 2529 0096 2920 movs r0, #41 - 2530 0098 FFF7FEFF bl AD9102_WriteReg - 2531 .LVL283: -2980:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); - 2532 .loc 1 2980 2 view .LVU805 - 2533 009c 0021 movs r1, #0 - 2534 009e 1F20 movs r0, #31 - 2535 00a0 FFF7FEFF bl AD9102_WriteReg - 2536 .LVL284: -2981:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); - 2537 .loc 1 2981 2 view .LVU806 - 2538 00a4 0021 movs r1, #0 - 2539 00a6 5C20 movs r0, #92 - 2540 00a8 FFF7FEFF bl AD9102_WriteReg - 2541 .LVL285: -2982:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); - 2542 .loc 1 2982 2 view .LVU807 - 2543 00ac 0021 movs r1, #0 - 2544 00ae 5D20 movs r0, #93 - 2545 00b0 FFF7FEFF bl AD9102_WriteReg - 2546 .LVL286: -2983:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2547 .loc 1 2983 2 view .LVU808 -2983:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - ARM GAS /tmp/ccEQxcUB.s page 182 + 2426 @ sp needed + 2427 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2428 .LVL264: + 2429 .L167: + 2430 .LCFI23: + 2431 .cfi_restore_state +3090:Src/main.c **** } + 2432 .loc 1 3090 6 view .LVU778 + 2433 00d4 0024 movs r4, #0 + 2434 00d6 C7E7 b .L154 + 2435 .cfi_endproc + 2436 .LFE1225: + 2438 .section .text.AD9102_ApplySram,"ax",%progbits + 2439 .align 1 + 2440 .syntax unified + 2441 .thumb + 2442 .thumb_func + 2444 AD9102_ApplySram: + 2445 .LVL265: + 2446 .LFB1224: +2988:Src/main.c **** if (samples == 0u) + 2447 .loc 1 2988 1 is_stmt 1 view -0 + 2448 .cfi_startproc + 2449 @ args = 4, pretend = 0, frame = 8 + 2450 @ frame_needed = 0, uses_anonymous_args = 0 +2988:Src/main.c **** if (samples == 0u) + 2451 .loc 1 2988 1 is_stmt 0 view .LVU780 + 2452 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 2453 .LCFI24: + 2454 .cfi_def_cfa_offset 28 + 2455 .cfi_offset 4, -28 + 2456 .cfi_offset 5, -24 + 2457 .cfi_offset 6, -20 + 2458 .cfi_offset 7, -16 + 2459 .cfi_offset 8, -12 + 2460 .cfi_offset 9, -8 + 2461 .cfi_offset 14, -4 + 2462 0004 83B0 sub sp, sp, #12 + 2463 .LCFI25: + 2464 .cfi_def_cfa_offset 40 + 2465 0006 0646 mov r6, r0 + 2466 0008 1F46 mov r7, r3 + 2467 000a BDF82880 ldrh r8, [sp, #40] +2989:Src/main.c **** { + 2468 .loc 1 2989 2 is_stmt 1 view .LVU781 +2989:Src/main.c **** { + 2469 .loc 1 2989 5 is_stmt 0 view .LVU782 + 2470 000e 21B1 cbz r1, .L188 + 2471 0010 0C46 mov r4, r1 +2993:Src/main.c **** { + 2472 .loc 1 2993 2 is_stmt 1 view .LVU783 +2993:Src/main.c **** { + 2473 .loc 1 2993 5 is_stmt 0 view .LVU784 + 2474 0012 0129 cmp r1, #1 + 2475 0014 02D8 bhi .L179 +2995:Src/main.c **** } + 2476 .loc 1 2995 11 view .LVU785 + ARM GAS /tmp/ccuHnxNu.s page 181 - 2548 .loc 1 2983 60 is_stmt 0 view .LVU809 - 2549 00b4 611E subs r1, r4, #1 - 2550 00b6 89B2 uxth r1, r1 -2983:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2551 .loc 1 2983 2 view .LVU810 - 2552 00b8 0901 lsls r1, r1, #4 - 2553 00ba 89B2 uxth r1, r1 - 2554 00bc 5E20 movs r0, #94 - 2555 00be FFF7FEFF bl AD9102_WriteReg - 2556 .LVL287: -2984:Src/main.c **** - 2557 .loc 1 2984 2 is_stmt 1 view .LVU811 - 2558 00c2 0121 movs r1, #1 - 2559 00c4 1D20 movs r0, #29 - 2560 00c6 FFF7FEFF bl AD9102_WriteReg - 2561 .LVL288: -2986:Src/main.c **** - 2562 .loc 1 2986 2 view .LVU812 - 2563 00ca 4246 mov r2, r8 - 2564 00cc 3946 mov r1, r7 - 2565 00ce 2046 mov r0, r4 - 2566 00d0 FFF7FEFF bl AD9102_LoadSramRamp - 2567 .LVL289: -2988:Src/main.c **** { - 2568 .loc 1 2988 2 view .LVU813 -2988:Src/main.c **** { - 2569 .loc 1 2988 5 is_stmt 0 view .LVU814 - 2570 00d4 36B3 cbz r6, .L177 -2990:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); - 2571 .loc 1 2990 3 is_stmt 1 view .LVU815 - 2572 00d6 0122 movs r2, #1 - 2573 00d8 4FF40061 mov r1, #2048 - 2574 00dc 1848 ldr r0, .L189+4 - 2575 00de FFF7FEFF bl HAL_GPIO_WritePin - 2576 .LVL290: -2991:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2577 .loc 1 2991 3 view .LVU816 - 2578 00e2 0121 movs r1, #1 - 2579 00e4 1E20 movs r0, #30 - 2580 00e6 FFF7FEFF bl AD9102_WriteReg - 2581 .LVL291: -2992:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - 2582 .loc 1 2992 3 view .LVU817 - 2583 00ea 0121 movs r1, #1 - 2584 00ec 1D20 movs r0, #29 - 2585 00ee FFF7FEFF bl AD9102_WriteReg - 2586 .LVL292: -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2587 .loc 1 2993 3 view .LVU818 - 2588 .LBB417: -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2589 .loc 1 2993 8 view .LVU819 -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2590 .loc 1 2993 26 is_stmt 0 view .LVU820 - 2591 00f2 0023 movs r3, #0 - 2592 00f4 0193 str r3, [sp, #4] -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - ARM GAS /tmp/ccEQxcUB.s page 183 - - - 2593 .loc 1 2993 3 view .LVU821 - 2594 00f6 05E0 b .L178 - 2595 .LVL293: - 2596 .L187: -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2597 .loc 1 2993 3 view .LVU822 - 2598 .LBE417: -2970:Src/main.c **** } - 2599 .loc 1 2970 14 view .LVU823 - 2600 00f8 4FF6FF79 movw r9, #65535 - 2601 00fc AEE7 b .L176 - 2602 .LVL294: - 2603 .L179: - 2604 .LBB418: -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2605 .loc 1 2993 49 is_stmt 1 discriminator 3 view .LVU824 -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2606 .loc 1 2993 44 discriminator 3 view .LVU825 - 2607 00fe 019B ldr r3, [sp, #4] - 2608 0100 0133 adds r3, r3, #1 - 2609 0102 0193 str r3, [sp, #4] - 2610 .L178: -2993:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2611 .loc 1 2993 35 discriminator 1 view .LVU826 - 2612 0104 019B ldr r3, [sp, #4] - 2613 0106 B3F57A7F cmp r3, #1000 - 2614 010a F8D3 bcc .L179 - 2615 .LBE418: -2994:Src/main.c **** } - 2616 .loc 1 2994 3 view .LVU827 - 2617 010c 0022 movs r2, #0 - 2618 010e 4FF40061 mov r1, #2048 - 2619 0112 0B48 ldr r0, .L189+4 - 2620 0114 FFF7FEFF bl HAL_GPIO_WritePin - 2621 .LVL295: - 2622 .L180: -3002:Src/main.c **** } - 2623 .loc 1 3002 2 view .LVU828 -3002:Src/main.c **** } - 2624 .loc 1 3002 9 is_stmt 0 view .LVU829 - 2625 0118 1E20 movs r0, #30 - 2626 011a FFF7FEFF bl AD9102_ReadReg - 2627 .LVL296: -3003:Src/main.c **** - 2628 .loc 1 3003 1 view .LVU830 - 2629 011e 03B0 add sp, sp, #12 - 2630 .LCFI26: - 2631 .cfi_remember_state - 2632 .cfi_def_cfa_offset 28 - 2633 @ sp needed - 2634 0120 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} - 2635 .LVL297: - 2636 .L177: - 2637 .LCFI27: - 2638 .cfi_restore_state -2998:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 2639 .loc 1 2998 3 is_stmt 1 view .LVU831 - ARM GAS /tmp/ccEQxcUB.s page 184 - - - 2640 0124 0021 movs r1, #0 - 2641 0126 1E20 movs r0, #30 - 2642 0128 FFF7FEFF bl AD9102_WriteReg - 2643 .LVL298: + 2477 0016 0224 movs r4, #2 + 2478 0018 03E0 b .L180 + 2479 .L188: +2991:Src/main.c **** } + 2480 .loc 1 2991 11 view .LVU786 + 2481 001a 1024 movs r4, #16 + 2482 .L179: + 2483 .LVL266: +2997:Src/main.c **** { + 2484 .loc 1 2997 2 is_stmt 1 view .LVU787 +2997:Src/main.c **** { + 2485 .loc 1 2997 5 is_stmt 0 view .LVU788 + 2486 001c B4F5805F cmp r4, #4096 + 2487 0020 04D8 bhi .L190 + 2488 .LVL267: + 2489 .L180: +3001:Src/main.c **** { + 2490 .loc 1 3001 2 is_stmt 1 view .LVU789 +3001:Src/main.c **** { + 2491 .loc 1 3001 5 is_stmt 0 view .LVU790 + 2492 0022 32B1 cbz r2, .L191 +3005:Src/main.c **** { + 2493 .loc 1 3005 2 is_stmt 1 view .LVU791 +3005:Src/main.c **** { + 2494 .loc 1 3005 5 is_stmt 0 view .LVU792 + 2495 0024 0F2A cmp r2, #15 + 2496 0026 05D9 bls .L181 +3007:Src/main.c **** } + 2497 .loc 1 3007 8 view .LVU793 + 2498 0028 0F22 movs r2, #15 + 2499 .LVL268: +3007:Src/main.c **** } + 2500 .loc 1 3007 8 view .LVU794 + 2501 002a 03E0 b .L181 + 2502 .LVL269: + 2503 .L190: 2999:Src/main.c **** } - 2644 .loc 1 2999 3 view .LVU832 - 2645 012c 0122 movs r2, #1 - 2646 012e 4FF40061 mov r1, #2048 - 2647 0132 0348 ldr r0, .L189+4 - 2648 0134 FFF7FEFF bl HAL_GPIO_WritePin - 2649 .LVL299: - 2650 0138 EEE7 b .L180 - 2651 .L190: - 2652 013a 00BF .align 2 - 2653 .L189: - 2654 013c 00000000 .word ad9102_example2_regval - 2655 0140 000C0240 .word 1073875968 - 2656 .cfi_endproc - 2657 .LFE1222: - 2659 .section .text.AD9102_Apply,"ax",%progbits - 2660 .align 1 - 2661 .syntax unified - 2662 .thumb - 2663 .thumb_func - 2665 AD9102_Apply: - 2666 .LVL300: - 2667 .LFB1220: -2801:Src/main.c **** if (enable) - 2668 .loc 1 2801 1 view -0 - 2669 .cfi_startproc - 2670 @ args = 4, pretend = 0, frame = 8 - 2671 @ frame_needed = 0, uses_anonymous_args = 0 -2801:Src/main.c **** if (enable) - 2672 .loc 1 2801 1 is_stmt 0 view .LVU834 - 2673 0000 30B5 push {r4, r5, lr} - 2674 .LCFI28: - 2675 .cfi_def_cfa_offset 12 - 2676 .cfi_offset 4, -12 - 2677 .cfi_offset 5, -8 - 2678 .cfi_offset 14, -4 - 2679 0002 83B0 sub sp, sp, #12 - 2680 .LCFI29: - 2681 .cfi_def_cfa_offset 24 -2802:Src/main.c **** { - 2682 .loc 1 2802 2 is_stmt 1 view .LVU835 -2802:Src/main.c **** { - 2683 .loc 1 2802 5 is_stmt 0 view .LVU836 - 2684 0004 0029 cmp r1, #0 - 2685 0006 4AD0 beq .L192 - 2686 .LBB419: -2804:Src/main.c **** uint16_t pat_timebase; - 2687 .loc 1 2804 3 is_stmt 1 view .LVU837 -2805:Src/main.c **** - 2688 .loc 1 2805 3 view .LVU838 -2807:Src/main.c **** { - 2689 .loc 1 2807 3 view .LVU839 -2807:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 185 + 2504 .loc 1 2999 11 view .LVU795 + 2505 002c 4FF48054 mov r4, #4096 + 2506 .LVL270: +2999:Src/main.c **** } + 2507 .loc 1 2999 11 view .LVU796 + 2508 0030 F7E7 b .L180 + 2509 .LVL271: + 2510 .L191: +3003:Src/main.c **** } + 2511 .loc 1 3003 8 view .LVU797 + 2512 0032 0122 movs r2, #1 + 2513 .LVL272: + 2514 .L181: +3010:Src/main.c **** { + 2515 .loc 1 3010 2 is_stmt 1 view .LVU798 +3010:Src/main.c **** { + 2516 .loc 1 3010 5 is_stmt 0 view .LVU799 + 2517 0034 B8F5005F cmp r8, #8192 + 2518 0038 01D3 bcc .L182 +3012:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 182 - 2690 .loc 1 2807 6 is_stmt 0 view .LVU840 - 2691 0008 1AB1 cbz r2, .L197 -2811:Src/main.c **** { - 2692 .loc 1 2811 3 is_stmt 1 view .LVU841 -2811:Src/main.c **** { - 2693 .loc 1 2811 6 is_stmt 0 view .LVU842 - 2694 000a 3F2A cmp r2, #63 - 2695 000c 02D9 bls .L193 -2813:Src/main.c **** } - 2696 .loc 1 2813 13 view .LVU843 - 2697 000e 3F22 movs r2, #63 - 2698 .LVL301: -2813:Src/main.c **** } - 2699 .loc 1 2813 13 view .LVU844 - 2700 0010 00E0 b .L193 - 2701 .LVL302: - 2702 .L197: -2809:Src/main.c **** } - 2703 .loc 1 2809 13 view .LVU845 - 2704 0012 0122 movs r2, #1 - 2705 .LVL303: - 2706 .L193: -2815:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2707 .loc 1 2815 3 is_stmt 1 view .LVU846 -2816:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 2708 .loc 1 2816 25 is_stmt 0 view .LVU847 - 2709 0014 00F00300 and r0, r0, #3 - 2710 .LVL304: -2815:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2711 .loc 1 2815 60 view .LVU848 - 2712 0018 9200 lsls r2, r2, #2 - 2713 .LVL305: -2815:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2714 .loc 1 2815 60 view .LVU849 - 2715 001a D2B2 uxtb r2, r2 -2815:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2716 .loc 1 2815 11 view .LVU850 - 2717 001c 40EA0204 orr r4, r0, r2 - 2718 .LVL306: -2817:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2719 .loc 1 2817 3 is_stmt 1 view .LVU851 -2818:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 2720 .loc 1 2818 49 is_stmt 0 view .LVU852 - 2721 0020 1B01 lsls r3, r3, #4 - 2722 .LVL307: -2818:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 2723 .loc 1 2818 49 view .LVU853 - 2724 0022 03F0F003 and r3, r3, #240 -2817:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2725 .loc 1 2817 16 view .LVU854 - 2726 0026 40F20115 movw r5, #257 - 2727 002a 1D43 orrs r5, r5, r3 - 2728 .LVL308: -2821:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); - 2729 .loc 1 2821 3 is_stmt 1 view .LVU855 - 2730 002c 43F21221 movw r1, #12818 - 2731 .LVL309: - ARM GAS /tmp/ccEQxcUB.s page 186 + 2519 .loc 1 3012 13 view .LVU800 + 2520 003a 41F6FF78 movw r8, #8191 + 2521 .L182: + 2522 .LVL273: +3015:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2523 .loc 1 3015 2 is_stmt 1 view .LVU801 +3015:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2524 .loc 1 3015 63 is_stmt 0 view .LVU802 + 2525 003e 1502 lsls r5, r2, #8 + 2526 0040 05F47065 and r5, r5, #3840 +3015:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2527 .loc 1 3015 11 view .LVU803 + 2528 0044 45F01105 orr r5, r5, #17 + 2529 .LVL274: +3018:Src/main.c **** if (pat_period == 0u) + 2530 .loc 1 3018 2 is_stmt 1 view .LVU804 +3018:Src/main.c **** if (pat_period == 0u) + 2531 .loc 1 3018 24 is_stmt 0 view .LVU805 + 2532 0048 A146 mov r9, r4 +3018:Src/main.c **** if (pat_period == 0u) + 2533 .loc 1 3018 44 view .LVU806 + 2534 004a 02F00F02 and r2, r2, #15 + 2535 .LVL275: +3018:Src/main.c **** if (pat_period == 0u) + 2536 .loc 1 3018 11 view .LVU807 + 2537 004e 04FB02F2 mul r2, r4, r2 + 2538 .LVL276: +3019:Src/main.c **** { + 2539 .loc 1 3019 2 is_stmt 1 view .LVU808 +3019:Src/main.c **** { + 2540 .loc 1 3019 5 is_stmt 0 view .LVU809 + 2541 0052 1AB1 cbz r2, .L183 +3023:Src/main.c **** { + 2542 .loc 1 3023 2 is_stmt 1 view .LVU810 +3023:Src/main.c **** { + 2543 .loc 1 3023 5 is_stmt 0 view .LVU811 + 2544 0054 B2F5803F cmp r2, #65536 + 2545 0058 4ED2 bcs .L194 + 2546 005a 9146 mov r9, r2 + 2547 .L183: + 2548 .LVL277: +3028:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 2549 .loc 1 3028 2 is_stmt 1 view .LVU812 + 2550 005c 4221 movs r1, #66 + 2551 005e 3748 ldr r0, .L196 + 2552 .LVL278: +3028:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 2553 .loc 1 3028 2 is_stmt 0 view .LVU813 + 2554 0060 FFF7FEFF bl AD9102_WriteRegTable + 2555 .LVL279: +3029:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); + 2556 .loc 1 3029 2 is_stmt 1 view .LVU814 + 2557 0064 0021 movs r1, #0 + 2558 0066 1E20 movs r0, #30 + 2559 0068 FFF7FEFF bl AD9102_WriteReg + 2560 .LVL280: +3030:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); + ARM GAS /tmp/ccuHnxNu.s page 183 -2821:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); - 2732 .loc 1 2821 3 is_stmt 0 view .LVU856 - 2733 0030 2720 movs r0, #39 - 2734 0032 FFF7FEFF bl AD9102_WriteReg - 2735 .LVL310: -2822:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); - 2736 .loc 1 2822 3 is_stmt 1 view .LVU857 - 2737 0036 2146 mov r1, r4 - 2738 0038 3720 movs r0, #55 - 2739 003a FFF7FEFF bl AD9102_WriteReg - 2740 .LVL311: -2823:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); - 2741 .loc 1 2823 3 view .LVU858 - 2742 003e 2946 mov r1, r5 - 2743 0040 2820 movs r0, #40 - 2744 0042 FFF7FEFF bl AD9102_WriteReg - 2745 .LVL312: -2824:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat - 2746 .loc 1 2824 3 view .LVU859 - 2747 0046 BDF81810 ldrh r1, [sp, #24] - 2748 004a 2920 movs r0, #41 - 2749 004c FFF7FEFF bl AD9102_WriteReg - 2750 .LVL313: -2825:Src/main.c **** - 2751 .loc 1 2825 3 view .LVU860 - 2752 0050 0021 movs r1, #0 - 2753 0052 1F20 movs r0, #31 - 2754 0054 FFF7FEFF bl AD9102_WriteReg - 2755 .LVL314: -2829:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); - 2756 .loc 1 2829 3 view .LVU861 - 2757 0058 0122 movs r2, #1 - 2758 005a 4FF40061 mov r1, #2048 - 2759 005e 1548 ldr r0, .L200 - 2760 0060 FFF7FEFF bl HAL_GPIO_WritePin - 2761 .LVL315: -2830:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2762 .loc 1 2830 3 view .LVU862 - 2763 0064 0121 movs r1, #1 - 2764 0066 1E20 movs r0, #30 - 2765 0068 FFF7FEFF bl AD9102_WriteReg - 2766 .LVL316: -2831:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - 2767 .loc 1 2831 3 view .LVU863 - 2768 006c 0121 movs r1, #1 - 2769 006e 1D20 movs r0, #29 - 2770 0070 FFF7FEFF bl AD9102_WriteReg - 2771 .LVL317: -2832:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2772 .loc 1 2832 3 view .LVU864 - 2773 .LBB420: -2832:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2774 .loc 1 2832 8 view .LVU865 -2832:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2775 .loc 1 2832 26 is_stmt 0 view .LVU866 - 2776 0074 0023 movs r3, #0 - 2777 0076 0193 str r3, [sp, #4] - ARM GAS /tmp/ccEQxcUB.s page 187 + 2561 .loc 1 3030 2 view .LVU815 + 2562 006c 43F23001 movw r1, #12336 + 2563 0070 2720 movs r0, #39 + 2564 0072 FFF7FEFF bl AD9102_WriteReg + 2565 .LVL281: +3031:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); + 2566 .loc 1 3031 2 view .LVU816 + 2567 0076 4FF40071 mov r1, #512 + 2568 007a 3720 movs r0, #55 + 2569 007c FFF7FEFF bl AD9102_WriteReg + 2570 .LVL282: +3032:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + 2571 .loc 1 3032 2 view .LVU817 + 2572 0080 40F20111 movw r1, #257 + 2573 0084 2B20 movs r0, #43 + 2574 0086 FFF7FEFF bl AD9102_WriteReg + 2575 .LVL283: +3033:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); + 2576 .loc 1 3033 2 view .LVU818 + 2577 008a 2946 mov r1, r5 + 2578 008c 2820 movs r0, #40 + 2579 008e FFF7FEFF bl AD9102_WriteReg + 2580 .LVL284: +3034:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + 2581 .loc 1 3034 2 view .LVU819 + 2582 0092 1FFA89F1 uxth r1, r9 + 2583 0096 2920 movs r0, #41 + 2584 0098 FFF7FEFF bl AD9102_WriteReg + 2585 .LVL285: +3035:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); + 2586 .loc 1 3035 2 view .LVU820 + 2587 009c 0021 movs r1, #0 + 2588 009e 1F20 movs r0, #31 + 2589 00a0 FFF7FEFF bl AD9102_WriteReg + 2590 .LVL286: +3036:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + 2591 .loc 1 3036 2 view .LVU821 + 2592 00a4 0021 movs r1, #0 + 2593 00a6 5C20 movs r0, #92 + 2594 00a8 FFF7FEFF bl AD9102_WriteReg + 2595 .LVL287: +3037:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); + 2596 .loc 1 3037 2 view .LVU822 + 2597 00ac 0021 movs r1, #0 + 2598 00ae 5D20 movs r0, #93 + 2599 00b0 FFF7FEFF bl AD9102_WriteReg + 2600 .LVL288: +3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2601 .loc 1 3038 2 view .LVU823 +3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2602 .loc 1 3038 60 is_stmt 0 view .LVU824 + 2603 00b4 611E subs r1, r4, #1 + 2604 00b6 89B2 uxth r1, r1 +3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2605 .loc 1 3038 2 view .LVU825 + 2606 00b8 0901 lsls r1, r1, #4 + 2607 00ba 89B2 uxth r1, r1 + ARM GAS /tmp/ccuHnxNu.s page 184 -2832:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2778 .loc 1 2832 3 view .LVU867 - 2779 0078 02E0 b .L194 - 2780 .L195: -2832:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2781 .loc 1 2832 49 is_stmt 1 discriminator 3 view .LVU868 -2832:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2782 .loc 1 2832 44 discriminator 3 view .LVU869 - 2783 007a 019B ldr r3, [sp, #4] - 2784 007c 0133 adds r3, r3, #1 - 2785 007e 0193 str r3, [sp, #4] - 2786 .L194: -2832:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2787 .loc 1 2832 35 discriminator 1 view .LVU870 - 2788 0080 019B ldr r3, [sp, #4] - 2789 0082 B3F57A7F cmp r3, #1000 - 2790 0086 F8D3 bcc .L195 - 2791 .LBE420: -2833:Src/main.c **** } - 2792 .loc 1 2833 3 view .LVU871 - 2793 0088 0022 movs r2, #0 - 2794 008a 4FF40061 mov r1, #2048 - 2795 008e 0948 ldr r0, .L200 - 2796 0090 FFF7FEFF bl HAL_GPIO_WritePin - 2797 .LVL318: - 2798 .L196: -2833:Src/main.c **** } - 2799 .loc 1 2833 3 is_stmt 0 view .LVU872 - 2800 .LBE419: -2841:Src/main.c **** } - 2801 .loc 1 2841 2 is_stmt 1 view .LVU873 -2841:Src/main.c **** } - 2802 .loc 1 2841 9 is_stmt 0 view .LVU874 - 2803 0094 1E20 movs r0, #30 - 2804 0096 FFF7FEFF bl AD9102_ReadReg - 2805 .LVL319: -2842:Src/main.c **** - 2806 .loc 1 2842 1 view .LVU875 - 2807 009a 03B0 add sp, sp, #12 - 2808 .LCFI30: - 2809 .cfi_remember_state - 2810 .cfi_def_cfa_offset 12 - 2811 @ sp needed - 2812 009c 30BD pop {r4, r5, pc} - 2813 .LVL320: - 2814 .L192: - 2815 .LCFI31: - 2816 .cfi_restore_state -2837:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 2817 .loc 1 2837 3 is_stmt 1 view .LVU876 - 2818 009e 0021 movs r1, #0 - 2819 .LVL321: -2837:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 2820 .loc 1 2837 3 is_stmt 0 view .LVU877 - 2821 00a0 1E20 movs r0, #30 - 2822 .LVL322: -2837:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - ARM GAS /tmp/ccEQxcUB.s page 188 + 2608 00bc 5E20 movs r0, #94 + 2609 00be FFF7FEFF bl AD9102_WriteReg + 2610 .LVL289: +3039:Src/main.c **** + 2611 .loc 1 3039 2 is_stmt 1 view .LVU826 + 2612 00c2 0121 movs r1, #1 + 2613 00c4 1D20 movs r0, #29 + 2614 00c6 FFF7FEFF bl AD9102_WriteReg + 2615 .LVL290: +3041:Src/main.c **** + 2616 .loc 1 3041 2 view .LVU827 + 2617 00ca 4246 mov r2, r8 + 2618 00cc 3946 mov r1, r7 + 2619 00ce 2046 mov r0, r4 + 2620 00d0 FFF7FEFF bl AD9102_LoadSramRamp + 2621 .LVL291: +3043:Src/main.c **** { + 2622 .loc 1 3043 2 view .LVU828 +3043:Src/main.c **** { + 2623 .loc 1 3043 5 is_stmt 0 view .LVU829 + 2624 00d4 36B3 cbz r6, .L184 +3045:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + 2625 .loc 1 3045 3 is_stmt 1 view .LVU830 + 2626 00d6 0122 movs r2, #1 + 2627 00d8 4FF40061 mov r1, #2048 + 2628 00dc 1848 ldr r0, .L196+4 + 2629 00de FFF7FEFF bl HAL_GPIO_WritePin + 2630 .LVL292: +3046:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2631 .loc 1 3046 3 view .LVU831 + 2632 00e2 0121 movs r1, #1 + 2633 00e4 1E20 movs r0, #30 + 2634 00e6 FFF7FEFF bl AD9102_WriteReg + 2635 .LVL293: +3047:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 2636 .loc 1 3047 3 view .LVU832 + 2637 00ea 0121 movs r1, #1 + 2638 00ec 1D20 movs r0, #29 + 2639 00ee FFF7FEFF bl AD9102_WriteReg + 2640 .LVL294: +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2641 .loc 1 3048 3 view .LVU833 + 2642 .LBB418: +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2643 .loc 1 3048 8 view .LVU834 +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2644 .loc 1 3048 26 is_stmt 0 view .LVU835 + 2645 00f2 0023 movs r3, #0 + 2646 00f4 0193 str r3, [sp, #4] +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2647 .loc 1 3048 3 view .LVU836 + 2648 00f6 05E0 b .L185 + 2649 .LVL295: + 2650 .L194: +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2651 .loc 1 3048 3 view .LVU837 + 2652 .LBE418: + ARM GAS /tmp/ccuHnxNu.s page 185 - 2823 .loc 1 2837 3 view .LVU878 - 2824 00a2 FFF7FEFF bl AD9102_WriteReg - 2825 .LVL323: -2838:Src/main.c **** } - 2826 .loc 1 2838 3 is_stmt 1 view .LVU879 - 2827 00a6 0122 movs r2, #1 - 2828 00a8 4FF40061 mov r1, #2048 - 2829 00ac 0148 ldr r0, .L200 - 2830 00ae FFF7FEFF bl HAL_GPIO_WritePin - 2831 .LVL324: - 2832 00b2 EFE7 b .L196 - 2833 .L201: - 2834 .align 2 - 2835 .L200: - 2836 00b4 000C0240 .word 1073875968 - 2837 .cfi_endproc - 2838 .LFE1220: - 2840 .section .text.AD9833_WriteWord,"ax",%progbits - 2841 .align 1 - 2842 .syntax unified - 2843 .thumb - 2844 .thumb_func - 2846 AD9833_WriteWord: - 2847 .LVL325: - 2848 .LFB1214: -2654:Src/main.c **** uint32_t tmp32 = 0; - 2849 .loc 1 2654 1 view -0 - 2850 .cfi_startproc - 2851 @ args = 0, pretend = 0, frame = 0 - 2852 @ frame_needed = 0, uses_anonymous_args = 0 -2654:Src/main.c **** uint32_t tmp32 = 0; - 2853 .loc 1 2654 1 is_stmt 0 view .LVU881 - 2854 0000 38B5 push {r3, r4, r5, lr} - 2855 .LCFI32: - 2856 .cfi_def_cfa_offset 16 - 2857 .cfi_offset 3, -16 - 2858 .cfi_offset 4, -12 - 2859 .cfi_offset 5, -8 - 2860 .cfi_offset 14, -4 - 2861 0002 0446 mov r4, r0 -2655:Src/main.c **** - 2862 .loc 1 2655 2 is_stmt 1 view .LVU882 - 2863 .LVL326: -2657:Src/main.c **** - 2864 .loc 1 2657 2 view .LVU883 - 2865 0004 0021 movs r1, #0 - 2866 0006 0220 movs r0, #2 - 2867 .LVL327: -2657:Src/main.c **** - 2868 .loc 1 2657 2 is_stmt 0 view .LVU884 - 2869 0008 FFF7FEFF bl SPI2_SetMode - 2870 .LVL328: -2659:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); - 2871 .loc 1 2659 2 is_stmt 1 view .LVU885 - 2872 000c 1E4D ldr r5, .L210 - 2873 000e 0122 movs r2, #1 - 2874 0010 4FF48051 mov r1, #4096 - ARM GAS /tmp/ccEQxcUB.s page 189 +3025:Src/main.c **** } + 2653 .loc 1 3025 14 view .LVU838 + 2654 00f8 4FF6FF79 movw r9, #65535 + 2655 00fc AEE7 b .L183 + 2656 .LVL296: + 2657 .L186: + 2658 .LBB419: +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2659 .loc 1 3048 49 is_stmt 1 discriminator 3 view .LVU839 +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2660 .loc 1 3048 44 discriminator 3 view .LVU840 + 2661 00fe 019B ldr r3, [sp, #4] + 2662 0100 0133 adds r3, r3, #1 + 2663 0102 0193 str r3, [sp, #4] + 2664 .L185: +3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2665 .loc 1 3048 35 discriminator 1 view .LVU841 + 2666 0104 019B ldr r3, [sp, #4] + 2667 0106 B3F57A7F cmp r3, #1000 + 2668 010a F8D3 bcc .L186 + 2669 .LBE419: +3049:Src/main.c **** } + 2670 .loc 1 3049 3 view .LVU842 + 2671 010c 0022 movs r2, #0 + 2672 010e 4FF40061 mov r1, #2048 + 2673 0112 0B48 ldr r0, .L196+4 + 2674 0114 FFF7FEFF bl HAL_GPIO_WritePin + 2675 .LVL297: + 2676 .L187: +3057:Src/main.c **** } + 2677 .loc 1 3057 2 view .LVU843 +3057:Src/main.c **** } + 2678 .loc 1 3057 9 is_stmt 0 view .LVU844 + 2679 0118 1E20 movs r0, #30 + 2680 011a FFF7FEFF bl AD9102_ReadReg + 2681 .LVL298: +3058:Src/main.c **** + 2682 .loc 1 3058 1 view .LVU845 + 2683 011e 03B0 add sp, sp, #12 + 2684 .LCFI26: + 2685 .cfi_remember_state + 2686 .cfi_def_cfa_offset 28 + 2687 @ sp needed + 2688 0120 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 2689 .LVL299: + 2690 .L184: + 2691 .LCFI27: + 2692 .cfi_restore_state +3053:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2693 .loc 1 3053 3 is_stmt 1 view .LVU846 + 2694 0124 0021 movs r1, #0 + 2695 0126 1E20 movs r0, #30 + 2696 0128 FFF7FEFF bl AD9102_WriteReg + 2697 .LVL300: +3054:Src/main.c **** } + 2698 .loc 1 3054 3 view .LVU847 + 2699 012c 0122 movs r2, #1 + ARM GAS /tmp/ccuHnxNu.s page 186 - 2875 0014 2846 mov r0, r5 - 2876 0016 FFF7FEFF bl HAL_GPIO_WritePin - 2877 .LVL329: -2660:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); - 2878 .loc 1 2660 2 view .LVU886 - 2879 001a 0122 movs r2, #1 - 2880 001c 4FF48041 mov r1, #16384 - 2881 0020 2846 mov r0, r5 - 2882 0022 FFF7FEFF bl HAL_GPIO_WritePin - 2883 .LVL330: -2661:Src/main.c **** - 2884 .loc 1 2661 2 view .LVU887 - 2885 0026 05F50065 add r5, r5, #2048 - 2886 002a 0122 movs r2, #1 - 2887 002c 4FF48051 mov r1, #4096 - 2888 0030 2846 mov r0, r5 - 2889 0032 FFF7FEFF bl HAL_GPIO_WritePin - 2890 .LVL331: -2663:Src/main.c **** - 2891 .loc 1 2663 2 view .LVU888 - 2892 0036 0022 movs r2, #0 - 2893 0038 4FF40051 mov r1, #8192 - 2894 003c 2846 mov r0, r5 - 2895 003e FFF7FEFF bl HAL_GPIO_WritePin - 2896 .LVL332: -2665:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2897 .loc 1 2665 2 view .LVU889 -2655:Src/main.c **** - 2898 .loc 1 2655 11 is_stmt 0 view .LVU890 - 2899 0042 0023 movs r3, #0 - 2900 .LVL333: - 2901 .L204: -2665:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2902 .loc 1 2665 63 is_stmt 1 discriminator 2 view .LVU891 -2665:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2903 .loc 1 2665 41 discriminator 2 view .LVU892 - 2904 .LBB421: - 2905 .LBI421: + 2700 012e 4FF40061 mov r1, #2048 + 2701 0132 0348 ldr r0, .L196+4 + 2702 0134 FFF7FEFF bl HAL_GPIO_WritePin + 2703 .LVL301: + 2704 0138 EEE7 b .L187 + 2705 .L197: + 2706 013a 00BF .align 2 + 2707 .L196: + 2708 013c 00000000 .word ad9102_example2_regval + 2709 0140 000C0240 .word 1073875968 + 2710 .cfi_endproc + 2711 .LFE1224: + 2713 .section .text.AD9102_Apply,"ax",%progbits + 2714 .align 1 + 2715 .syntax unified + 2716 .thumb + 2717 .thumb_func + 2719 AD9102_Apply: + 2720 .LVL302: + 2721 .LFB1222: +2856:Src/main.c **** if (enable) + 2722 .loc 1 2856 1 view -0 + 2723 .cfi_startproc + 2724 @ args = 4, pretend = 0, frame = 8 + 2725 @ frame_needed = 0, uses_anonymous_args = 0 +2856:Src/main.c **** if (enable) + 2726 .loc 1 2856 1 is_stmt 0 view .LVU849 + 2727 0000 30B5 push {r4, r5, lr} + 2728 .LCFI28: + 2729 .cfi_def_cfa_offset 12 + 2730 .cfi_offset 4, -12 + 2731 .cfi_offset 5, -8 + 2732 .cfi_offset 14, -4 + 2733 0002 83B0 sub sp, sp, #12 + 2734 .LCFI29: + 2735 .cfi_def_cfa_offset 24 +2857:Src/main.c **** { + 2736 .loc 1 2857 2 is_stmt 1 view .LVU850 +2857:Src/main.c **** { + 2737 .loc 1 2857 5 is_stmt 0 view .LVU851 + 2738 0004 0029 cmp r1, #0 + 2739 0006 4AD0 beq .L199 + 2740 .LBB420: +2859:Src/main.c **** uint16_t pat_timebase; + 2741 .loc 1 2859 3 is_stmt 1 view .LVU852 +2860:Src/main.c **** + 2742 .loc 1 2860 3 view .LVU853 +2862:Src/main.c **** { + 2743 .loc 1 2862 3 view .LVU854 +2862:Src/main.c **** { + 2744 .loc 1 2862 6 is_stmt 0 view .LVU855 + 2745 0008 1AB1 cbz r2, .L204 +2866:Src/main.c **** { + 2746 .loc 1 2866 3 is_stmt 1 view .LVU856 +2866:Src/main.c **** { + 2747 .loc 1 2866 6 is_stmt 0 view .LVU857 + 2748 000a 3F2A cmp r2, #63 + ARM GAS /tmp/ccuHnxNu.s page 187 + + + 2749 000c 02D9 bls .L200 +2868:Src/main.c **** } + 2750 .loc 1 2868 13 view .LVU858 + 2751 000e 3F22 movs r2, #63 + 2752 .LVL303: +2868:Src/main.c **** } + 2753 .loc 1 2868 13 view .LVU859 + 2754 0010 00E0 b .L200 + 2755 .LVL304: + 2756 .L204: +2864:Src/main.c **** } + 2757 .loc 1 2864 13 view .LVU860 + 2758 0012 0122 movs r2, #1 + 2759 .LVL305: + 2760 .L200: +2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2761 .loc 1 2870 3 is_stmt 1 view .LVU861 +2871:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2762 .loc 1 2871 25 is_stmt 0 view .LVU862 + 2763 0014 00F00300 and r0, r0, #3 + 2764 .LVL306: +2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2765 .loc 1 2870 60 view .LVU863 + 2766 0018 9200 lsls r2, r2, #2 + 2767 .LVL307: +2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2768 .loc 1 2870 60 view .LVU864 + 2769 001a D2B2 uxtb r2, r2 +2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2770 .loc 1 2870 11 view .LVU865 + 2771 001c 40EA0204 orr r4, r0, r2 + 2772 .LVL308: +2872:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2773 .loc 1 2872 3 is_stmt 1 view .LVU866 +2873:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2774 .loc 1 2873 49 is_stmt 0 view .LVU867 + 2775 0020 1B01 lsls r3, r3, #4 + 2776 .LVL309: +2873:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2777 .loc 1 2873 49 view .LVU868 + 2778 0022 03F0F003 and r3, r3, #240 +2872:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2779 .loc 1 2872 16 view .LVU869 + 2780 0026 40F20115 movw r5, #257 + 2781 002a 1D43 orrs r5, r5, r3 + 2782 .LVL310: +2876:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + 2783 .loc 1 2876 3 is_stmt 1 view .LVU870 + 2784 002c 43F21221 movw r1, #12818 + 2785 .LVL311: +2876:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + 2786 .loc 1 2876 3 is_stmt 0 view .LVU871 + 2787 0030 2720 movs r0, #39 + 2788 0032 FFF7FEFF bl AD9102_WriteReg + 2789 .LVL312: +2877:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + 2790 .loc 1 2877 3 is_stmt 1 view .LVU872 + ARM GAS /tmp/ccuHnxNu.s page 188 + + + 2791 0036 2146 mov r1, r4 + 2792 0038 3720 movs r0, #55 + 2793 003a FFF7FEFF bl AD9102_WriteReg + 2794 .LVL313: +2878:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); + 2795 .loc 1 2878 3 view .LVU873 + 2796 003e 2946 mov r1, r5 + 2797 0040 2820 movs r0, #40 + 2798 0042 FFF7FEFF bl AD9102_WriteReg + 2799 .LVL314: +2879:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + 2800 .loc 1 2879 3 view .LVU874 + 2801 0046 BDF81810 ldrh r1, [sp, #24] + 2802 004a 2920 movs r0, #41 + 2803 004c FFF7FEFF bl AD9102_WriteReg + 2804 .LVL315: +2880:Src/main.c **** + 2805 .loc 1 2880 3 view .LVU875 + 2806 0050 0021 movs r1, #0 + 2807 0052 1F20 movs r0, #31 + 2808 0054 FFF7FEFF bl AD9102_WriteReg + 2809 .LVL316: +2884:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + 2810 .loc 1 2884 3 view .LVU876 + 2811 0058 0122 movs r2, #1 + 2812 005a 4FF40061 mov r1, #2048 + 2813 005e 1548 ldr r0, .L207 + 2814 0060 FFF7FEFF bl HAL_GPIO_WritePin + 2815 .LVL317: +2885:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2816 .loc 1 2885 3 view .LVU877 + 2817 0064 0121 movs r1, #1 + 2818 0066 1E20 movs r0, #30 + 2819 0068 FFF7FEFF bl AD9102_WriteReg + 2820 .LVL318: +2886:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 2821 .loc 1 2886 3 view .LVU878 + 2822 006c 0121 movs r1, #1 + 2823 006e 1D20 movs r0, #29 + 2824 0070 FFF7FEFF bl AD9102_WriteReg + 2825 .LVL319: +2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2826 .loc 1 2887 3 view .LVU879 + 2827 .LBB421: +2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2828 .loc 1 2887 8 view .LVU880 +2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2829 .loc 1 2887 26 is_stmt 0 view .LVU881 + 2830 0074 0023 movs r3, #0 + 2831 0076 0193 str r3, [sp, #4] +2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2832 .loc 1 2887 3 view .LVU882 + 2833 0078 02E0 b .L201 + 2834 .L202: +2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2835 .loc 1 2887 49 is_stmt 1 discriminator 3 view .LVU883 +2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + ARM GAS /tmp/ccuHnxNu.s page 189 + + + 2836 .loc 1 2887 44 discriminator 3 view .LVU884 + 2837 007a 019B ldr r3, [sp, #4] + 2838 007c 0133 adds r3, r3, #1 + 2839 007e 0193 str r3, [sp, #4] + 2840 .L201: +2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2841 .loc 1 2887 35 discriminator 1 view .LVU885 + 2842 0080 019B ldr r3, [sp, #4] + 2843 0082 B3F57A7F cmp r3, #1000 + 2844 0086 F8D3 bcc .L202 + 2845 .LBE421: +2888:Src/main.c **** } + 2846 .loc 1 2888 3 view .LVU886 + 2847 0088 0022 movs r2, #0 + 2848 008a 4FF40061 mov r1, #2048 + 2849 008e 0948 ldr r0, .L207 + 2850 0090 FFF7FEFF bl HAL_GPIO_WritePin + 2851 .LVL320: + 2852 .L203: +2888:Src/main.c **** } + 2853 .loc 1 2888 3 is_stmt 0 view .LVU887 + 2854 .LBE420: +2896:Src/main.c **** } + 2855 .loc 1 2896 2 is_stmt 1 view .LVU888 +2896:Src/main.c **** } + 2856 .loc 1 2896 9 is_stmt 0 view .LVU889 + 2857 0094 1E20 movs r0, #30 + 2858 0096 FFF7FEFF bl AD9102_ReadReg + 2859 .LVL321: +2897:Src/main.c **** + 2860 .loc 1 2897 1 view .LVU890 + 2861 009a 03B0 add sp, sp, #12 + 2862 .LCFI30: + 2863 .cfi_remember_state + 2864 .cfi_def_cfa_offset 12 + 2865 @ sp needed + 2866 009c 30BD pop {r4, r5, pc} + 2867 .LVL322: + 2868 .L199: + 2869 .LCFI31: + 2870 .cfi_restore_state +2892:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2871 .loc 1 2892 3 is_stmt 1 view .LVU891 + 2872 009e 0021 movs r1, #0 + 2873 .LVL323: +2892:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2874 .loc 1 2892 3 is_stmt 0 view .LVU892 + 2875 00a0 1E20 movs r0, #30 + 2876 .LVL324: +2892:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2877 .loc 1 2892 3 view .LVU893 + 2878 00a2 FFF7FEFF bl AD9102_WriteReg + 2879 .LVL325: +2893:Src/main.c **** } + 2880 .loc 1 2893 3 is_stmt 1 view .LVU894 + 2881 00a6 0122 movs r2, #1 + 2882 00a8 4FF40061 mov r1, #2048 + ARM GAS /tmp/ccuHnxNu.s page 190 + + + 2883 00ac 0148 ldr r0, .L207 + 2884 00ae FFF7FEFF bl HAL_GPIO_WritePin + 2885 .LVL326: + 2886 00b2 EFE7 b .L203 + 2887 .L208: + 2888 .align 2 + 2889 .L207: + 2890 00b4 000C0240 .word 1073875968 + 2891 .cfi_endproc + 2892 .LFE1222: + 2894 .section .text.AD9833_WriteWord,"ax",%progbits + 2895 .align 1 + 2896 .syntax unified + 2897 .thumb + 2898 .thumb_func + 2900 AD9833_WriteWord: + 2901 .LVL327: + 2902 .LFB1214: +2673:Src/main.c **** uint32_t tmp32 = 0; + 2903 .loc 1 2673 1 view -0 + 2904 .cfi_startproc + 2905 @ args = 0, pretend = 0, frame = 0 + 2906 @ frame_needed = 0, uses_anonymous_args = 0 +2673:Src/main.c **** uint32_t tmp32 = 0; + 2907 .loc 1 2673 1 is_stmt 0 view .LVU896 + 2908 0000 38B5 push {r3, r4, r5, lr} + 2909 .LCFI32: + 2910 .cfi_def_cfa_offset 16 + 2911 .cfi_offset 3, -16 + 2912 .cfi_offset 4, -12 + 2913 .cfi_offset 5, -8 + 2914 .cfi_offset 14, -4 + 2915 0002 0446 mov r4, r0 +2674:Src/main.c **** + 2916 .loc 1 2674 2 is_stmt 1 view .LVU897 + 2917 .LVL328: +2676:Src/main.c **** + 2918 .loc 1 2676 2 view .LVU898 + 2919 0004 0021 movs r1, #0 + 2920 0006 0220 movs r0, #2 + 2921 .LVL329: +2676:Src/main.c **** + 2922 .loc 1 2676 2 is_stmt 0 view .LVU899 + 2923 0008 FFF7FEFF bl SPI2_SetMode + 2924 .LVL330: +2678:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); + 2925 .loc 1 2678 2 is_stmt 1 view .LVU900 + 2926 000c 1E4D ldr r5, .L217 + 2927 000e 0122 movs r2, #1 + 2928 0010 4FF48051 mov r1, #4096 + 2929 0014 2846 mov r0, r5 + 2930 0016 FFF7FEFF bl HAL_GPIO_WritePin + 2931 .LVL331: +2679:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); + 2932 .loc 1 2679 2 view .LVU901 + 2933 001a 0122 movs r2, #1 + 2934 001c 4FF48041 mov r1, #16384 + ARM GAS /tmp/ccuHnxNu.s page 191 + + + 2935 0020 2846 mov r0, r5 + 2936 0022 FFF7FEFF bl HAL_GPIO_WritePin + 2937 .LVL332: +2680:Src/main.c **** + 2938 .loc 1 2680 2 view .LVU902 + 2939 0026 05F50065 add r5, r5, #2048 + 2940 002a 0122 movs r2, #1 + 2941 002c 4FF48051 mov r1, #4096 + 2942 0030 2846 mov r0, r5 + 2943 0032 FFF7FEFF bl HAL_GPIO_WritePin + 2944 .LVL333: +2682:Src/main.c **** + 2945 .loc 1 2682 2 view .LVU903 + 2946 0036 0022 movs r2, #0 + 2947 0038 4FF40051 mov r1, #8192 + 2948 003c 2846 mov r0, r5 + 2949 003e FFF7FEFF bl HAL_GPIO_WritePin + 2950 .LVL334: +2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 2951 .loc 1 2684 2 view .LVU904 +2674:Src/main.c **** + 2952 .loc 1 2674 11 is_stmt 0 view .LVU905 + 2953 0042 0023 movs r3, #0 + 2954 .LVL335: + 2955 .L211: +2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 2956 .loc 1 2684 63 is_stmt 1 discriminator 2 view .LVU906 +2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 2957 .loc 1 2684 41 discriminator 2 view .LVU907 + 2958 .LBB422: + 2959 .LBI422: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2906 .loc 4 916 26 view .LVU893 - 2907 .LBB422: + 2960 .loc 4 916 26 view .LVU908 + 2961 .LBB423: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2908 .loc 4 918 3 view .LVU894 + 2962 .loc 4 918 3 view .LVU909 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2909 .loc 4 918 12 is_stmt 0 view .LVU895 - 2910 0044 114A ldr r2, .L210+4 - 2911 0046 9268 ldr r2, [r2, #8] + 2963 .loc 4 918 12 is_stmt 0 view .LVU910 + 2964 0044 114A ldr r2, .L217+4 + 2965 0046 9268 ldr r2, [r2, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2912 .loc 4 918 66 view .LVU896 - 2913 0048 12F0020F tst r2, #2 - 2914 004c 05D1 bne .L203 - 2915 .LVL334: + 2966 .loc 4 918 66 view .LVU911 + 2967 0048 12F0020F tst r2, #2 + 2968 004c 05D1 bne .L210 + 2969 .LVL336: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2916 .loc 4 918 66 view .LVU897 - 2917 .LBE422: - 2918 .LBE421: -2665:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - ARM GAS /tmp/ccEQxcUB.s page 190 + 2970 .loc 4 918 66 view .LVU912 + 2971 .LBE423: + 2972 .LBE422: +2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 2973 .loc 1 2684 50 discriminator 1 view .LVU913 + 2974 004e 5A1C adds r2, r3, #1 + 2975 .LVL337: +2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 2976 .loc 1 2684 41 discriminator 1 view .LVU914 + 2977 0050 B3F57A7F cmp r3, #1000 + 2978 0054 01D2 bcs .L210 + ARM GAS /tmp/ccuHnxNu.s page 192 - 2919 .loc 1 2665 50 discriminator 1 view .LVU898 - 2920 004e 5A1C adds r2, r3, #1 - 2921 .LVL335: -2665:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2922 .loc 1 2665 41 discriminator 1 view .LVU899 - 2923 0050 B3F57A7F cmp r3, #1000 - 2924 0054 01D2 bcs .L203 -2665:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2925 .loc 1 2665 50 discriminator 1 view .LVU900 - 2926 0056 1346 mov r3, r2 - 2927 0058 F4E7 b .L204 - 2928 .LVL336: - 2929 .L203: -2666:Src/main.c **** tmp32 = 0; - 2930 .loc 1 2666 2 is_stmt 1 view .LVU901 - 2931 .LBB423: - 2932 .LBI423: +2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 2979 .loc 1 2684 50 discriminator 1 view .LVU915 + 2980 0056 1346 mov r3, r2 + 2981 0058 F4E7 b .L211 + 2982 .LVL338: + 2983 .L210: +2685:Src/main.c **** tmp32 = 0; + 2984 .loc 1 2685 2 is_stmt 1 view .LVU916 + 2985 .LBB424: + 2986 .LBI424: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2933 .loc 4 1373 22 view .LVU902 - 2934 .LBB424: + 2987 .loc 4 1373 22 view .LVU917 + 2988 .LBB425: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 2935 .loc 4 1376 3 view .LVU903 - 2936 .loc 4 1377 3 view .LVU904 - 2937 .loc 4 1377 10 is_stmt 0 view .LVU905 - 2938 005a 0C4B ldr r3, .L210+4 - 2939 005c 9C81 strh r4, [r3, #12] @ movhi - 2940 .LVL337: - 2941 .loc 4 1377 10 view .LVU906 - 2942 .LBE424: - 2943 .LBE423: -2667:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 2944 .loc 1 2667 2 is_stmt 1 view .LVU907 -2668:Src/main.c **** (void) SPI2->DR; - 2945 .loc 1 2668 2 view .LVU908 -2667:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 2946 .loc 1 2667 8 is_stmt 0 view .LVU909 - 2947 005e 0023 movs r3, #0 - 2948 .LVL338: - 2949 .L206: -2668:Src/main.c **** (void) SPI2->DR; - 2950 .loc 1 2668 64 is_stmt 1 discriminator 2 view .LVU910 -2668:Src/main.c **** (void) SPI2->DR; - 2951 .loc 1 2668 42 discriminator 2 view .LVU911 - 2952 .LBB425: - 2953 .LBI425: + 2989 .loc 4 1376 3 view .LVU918 + 2990 .loc 4 1377 3 view .LVU919 + 2991 .loc 4 1377 10 is_stmt 0 view .LVU920 + 2992 005a 0C4B ldr r3, .L217+4 + 2993 005c 9C81 strh r4, [r3, #12] @ movhi + 2994 .LVL339: + 2995 .loc 4 1377 10 view .LVU921 + 2996 .LBE425: + 2997 .LBE424: +2686:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 2998 .loc 1 2686 2 is_stmt 1 view .LVU922 +2687:Src/main.c **** (void) SPI2->DR; + 2999 .loc 1 2687 2 view .LVU923 +2686:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 3000 .loc 1 2686 8 is_stmt 0 view .LVU924 + 3001 005e 0023 movs r3, #0 + 3002 .LVL340: + 3003 .L213: +2687:Src/main.c **** (void) SPI2->DR; + 3004 .loc 1 2687 64 is_stmt 1 discriminator 2 view .LVU925 +2687:Src/main.c **** (void) SPI2->DR; + 3005 .loc 1 2687 42 discriminator 2 view .LVU926 + 3006 .LBB426: + 3007 .LBI426: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2954 .loc 4 905 26 view .LVU912 - 2955 .LBB426: + 3008 .loc 4 905 26 view .LVU927 + 3009 .LBB427: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2956 .loc 4 907 3 view .LVU913 + 3010 .loc 4 907 3 view .LVU928 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2957 .loc 4 907 12 is_stmt 0 view .LVU914 - 2958 0060 0A4A ldr r2, .L210+4 - 2959 0062 9268 ldr r2, [r2, #8] + 3011 .loc 4 907 12 is_stmt 0 view .LVU929 + 3012 0060 0A4A ldr r2, .L217+4 + 3013 0062 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2960 .loc 4 907 68 view .LVU915 - 2961 0064 12F0010F tst r2, #1 - ARM GAS /tmp/ccEQxcUB.s page 191 - - - 2962 0068 05D1 bne .L205 - 2963 .LVL339: + 3014 .loc 4 907 68 view .LVU930 + 3015 0064 12F0010F tst r2, #1 + 3016 0068 05D1 bne .L212 + 3017 .LVL341: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2964 .loc 4 907 68 view .LVU916 - 2965 .LBE426: - 2966 .LBE425: -2668:Src/main.c **** (void) SPI2->DR; - 2967 .loc 1 2668 51 discriminator 1 view .LVU917 - 2968 006a 5A1C adds r2, r3, #1 - 2969 .LVL340: -2668:Src/main.c **** (void) SPI2->DR; - 2970 .loc 1 2668 42 discriminator 1 view .LVU918 - 2971 006c B3F57A7F cmp r3, #1000 - 2972 0070 01D2 bcs .L205 -2668:Src/main.c **** (void) SPI2->DR; - 2973 .loc 1 2668 51 discriminator 1 view .LVU919 - 2974 0072 1346 mov r3, r2 - 2975 0074 F4E7 b .L206 - 2976 .LVL341: - 2977 .L205: -2669:Src/main.c **** - 2978 .loc 1 2669 2 is_stmt 1 view .LVU920 - 2979 0076 054B ldr r3, .L210+4 - 2980 0078 DB68 ldr r3, [r3, #12] -2671:Src/main.c **** } - 2981 .loc 1 2671 2 view .LVU921 - 2982 007a 0122 movs r2, #1 - 2983 007c 4FF40051 mov r1, #8192 - 2984 0080 0348 ldr r0, .L210+8 - 2985 0082 FFF7FEFF bl HAL_GPIO_WritePin - 2986 .LVL342: -2672:Src/main.c **** - 2987 .loc 1 2672 1 is_stmt 0 view .LVU922 - 2988 0086 38BD pop {r3, r4, r5, pc} - 2989 .LVL343: - 2990 .L211: -2672:Src/main.c **** - 2991 .loc 1 2672 1 view .LVU923 - 2992 .align 2 - 2993 .L210: - 2994 0088 00040240 .word 1073873920 - 2995 008c 00380040 .word 1073756160 - 2996 0090 000C0240 .word 1073875968 - 2997 .cfi_endproc - 2998 .LFE1214: - 3000 .section .text.AD9833_Apply,"ax",%progbits - 3001 .align 1 - 3002 .syntax unified - 3003 .thumb - 3004 .thumb_func - 3006 AD9833_Apply: - 3007 .LVL344: - 3008 .LFB1215: -2675:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 - 3009 .loc 1 2675 1 is_stmt 1 view -0 - 3010 .cfi_startproc - 3011 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccEQxcUB.s page 192 + 3018 .loc 4 907 68 view .LVU931 + 3019 .LBE427: + 3020 .LBE426: +2687:Src/main.c **** (void) SPI2->DR; + ARM GAS /tmp/ccuHnxNu.s page 193 - 3012 @ frame_needed = 0, uses_anonymous_args = 0 -2675:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 - 3013 .loc 1 2675 1 is_stmt 0 view .LVU925 - 3014 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 3015 .LCFI33: - 3016 .cfi_def_cfa_offset 24 - 3017 .cfi_offset 4, -24 - 3018 .cfi_offset 5, -20 - 3019 .cfi_offset 6, -16 - 3020 .cfi_offset 7, -12 - 3021 .cfi_offset 8, -8 - 3022 .cfi_offset 14, -4 - 3023 0004 0546 mov r5, r0 -2676:Src/main.c **** if (triangle) - 3024 .loc 1 2676 2 is_stmt 1 view .LVU926 - 3025 .LVL345: -2677:Src/main.c **** { - 3026 .loc 1 2677 2 view .LVU927 -2677:Src/main.c **** { - 3027 .loc 1 2677 5 is_stmt 0 view .LVU928 - 3028 0006 F9B9 cbnz r1, .L215 -2676:Src/main.c **** if (triangle) - 3029 .loc 1 2676 11 view .LVU929 - 3030 0008 4FF40057 mov r7, #8192 - 3031 .L213: - 3032 .LVL346: -2681:Src/main.c **** - 3033 .loc 1 2681 2 is_stmt 1 view .LVU930 -2681:Src/main.c **** - 3034 .loc 1 2681 10 is_stmt 0 view .LVU931 - 3035 000c 47F48078 orr r8, r7, #256 - 3036 .LVL347: -2683:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB - 3037 .loc 1 2683 2 is_stmt 1 view .LVU932 -2684:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB - 3038 .loc 1 2684 2 view .LVU933 -2684:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB - 3039 .loc 1 2684 49 is_stmt 0 view .LVU934 - 3040 0010 C2F30D06 ubfx r6, r2, #0, #14 -2684:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB - 3041 .loc 1 2684 11 view .LVU935 - 3042 0014 46F48046 orr r6, r6, #16384 - 3043 .LVL348: -2685:Src/main.c **** - 3044 .loc 1 2685 2 is_stmt 1 view .LVU936 -2685:Src/main.c **** - 3045 .loc 1 2685 57 is_stmt 0 view .LVU937 - 3046 0018 C2F38D32 ubfx r2, r2, #14, #14 - 3047 .LVL349: -2685:Src/main.c **** - 3048 .loc 1 2685 11 view .LVU938 - 3049 001c 42F48044 orr r4, r2, #16384 - 3050 .LVL350: -2687:Src/main.c **** AD9833_WriteWord(lsw); - 3051 .loc 1 2687 2 is_stmt 1 view .LVU939 - 3052 0020 4046 mov r0, r8 - 3053 .LVL351: - ARM GAS /tmp/ccEQxcUB.s page 193 + 3021 .loc 1 2687 51 discriminator 1 view .LVU932 + 3022 006a 5A1C adds r2, r3, #1 + 3023 .LVL342: +2687:Src/main.c **** (void) SPI2->DR; + 3024 .loc 1 2687 42 discriminator 1 view .LVU933 + 3025 006c B3F57A7F cmp r3, #1000 + 3026 0070 01D2 bcs .L212 +2687:Src/main.c **** (void) SPI2->DR; + 3027 .loc 1 2687 51 discriminator 1 view .LVU934 + 3028 0072 1346 mov r3, r2 + 3029 0074 F4E7 b .L213 + 3030 .LVL343: + 3031 .L212: +2688:Src/main.c **** + 3032 .loc 1 2688 2 is_stmt 1 view .LVU935 + 3033 0076 054B ldr r3, .L217+4 + 3034 0078 DB68 ldr r3, [r3, #12] +2690:Src/main.c **** } + 3035 .loc 1 2690 2 view .LVU936 + 3036 007a 0122 movs r2, #1 + 3037 007c 4FF40051 mov r1, #8192 + 3038 0080 0348 ldr r0, .L217+8 + 3039 0082 FFF7FEFF bl HAL_GPIO_WritePin + 3040 .LVL344: +2691:Src/main.c **** + 3041 .loc 1 2691 1 is_stmt 0 view .LVU937 + 3042 0086 38BD pop {r3, r4, r5, pc} + 3043 .LVL345: + 3044 .L218: +2691:Src/main.c **** + 3045 .loc 1 2691 1 view .LVU938 + 3046 .align 2 + 3047 .L217: + 3048 0088 00040240 .word 1073873920 + 3049 008c 00380040 .word 1073756160 + 3050 0090 000C0240 .word 1073875968 + 3051 .cfi_endproc + 3052 .LFE1214: + 3054 .section .text.AD9833_Apply,"ax",%progbits + 3055 .align 1 + 3056 .syntax unified + 3057 .thumb + 3058 .thumb_func + 3060 AD9833_Apply: + 3061 .LVL346: + 3062 .LFB1215: +2694:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 + 3063 .loc 1 2694 1 is_stmt 1 view -0 + 3064 .cfi_startproc + 3065 @ args = 0, pretend = 0, frame = 0 + 3066 @ frame_needed = 0, uses_anonymous_args = 0 +2694:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 + 3067 .loc 1 2694 1 is_stmt 0 view .LVU940 + 3068 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 3069 .LCFI33: + 3070 .cfi_def_cfa_offset 24 + 3071 .cfi_offset 4, -24 + ARM GAS /tmp/ccuHnxNu.s page 194 -2687:Src/main.c **** AD9833_WriteWord(lsw); - 3054 .loc 1 2687 2 is_stmt 0 view .LVU940 - 3055 0022 FFF7FEFF bl AD9833_WriteWord - 3056 .LVL352: -2688:Src/main.c **** AD9833_WriteWord(msw); - 3057 .loc 1 2688 2 is_stmt 1 view .LVU941 - 3058 0026 3046 mov r0, r6 - 3059 0028 FFF7FEFF bl AD9833_WriteWord - 3060 .LVL353: -2689:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 - 3061 .loc 1 2689 2 view .LVU942 - 3062 002c 2046 mov r0, r4 - 3063 002e FFF7FEFF bl AD9833_WriteWord - 3064 .LVL354: -2690:Src/main.c **** - 3065 .loc 1 2690 2 view .LVU943 - 3066 0032 4FF44040 mov r0, #49152 - 3067 0036 FFF7FEFF bl AD9833_WriteWord - 3068 .LVL355: -2692:Src/main.c **** { - 3069 .loc 1 2692 2 view .LVU944 -2692:Src/main.c **** { - 3070 .loc 1 2692 5 is_stmt 0 view .LVU945 - 3071 003a 05B9 cbnz r5, .L214 -2681:Src/main.c **** - 3072 .loc 1 2681 10 view .LVU946 - 3073 003c 4746 mov r7, r8 - 3074 .L214: - 3075 .LVL356: -2696:Src/main.c **** } - 3076 .loc 1 2696 2 is_stmt 1 view .LVU947 - 3077 003e 3846 mov r0, r7 - 3078 0040 FFF7FEFF bl AD9833_WriteWord - 3079 .LVL357: -2697:Src/main.c **** - 3080 .loc 1 2697 1 is_stmt 0 view .LVU948 - 3081 0044 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 3082 .LVL358: - 3083 .L215: -2679:Src/main.c **** } - 3084 .loc 1 2679 11 view .LVU949 - 3085 0048 42F20207 movw r7, #8194 - 3086 004c DEE7 b .L213 - 3087 .cfi_endproc - 3088 .LFE1215: - 3090 .section .text.OUT_trigger,"ax",%progbits - 3091 .align 1 - 3092 .syntax unified - 3093 .thumb - 3094 .thumb_func - 3096 OUT_trigger: - 3097 .LVL359: - 3098 .LFB1211: -2571:Src/main.c **** switch (out_n) - 3099 .loc 1 2571 1 is_stmt 1 view -0 - 3100 .cfi_startproc - 3101 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccEQxcUB.s page 194 + 3072 .cfi_offset 5, -20 + 3073 .cfi_offset 6, -16 + 3074 .cfi_offset 7, -12 + 3075 .cfi_offset 8, -8 + 3076 .cfi_offset 14, -4 + 3077 0004 0546 mov r5, r0 +2695:Src/main.c **** if (triangle) + 3078 .loc 1 2695 2 is_stmt 1 view .LVU941 + 3079 .LVL347: +2696:Src/main.c **** { + 3080 .loc 1 2696 2 view .LVU942 +2696:Src/main.c **** { + 3081 .loc 1 2696 5 is_stmt 0 view .LVU943 + 3082 0006 F9B9 cbnz r1, .L222 +2695:Src/main.c **** if (triangle) + 3083 .loc 1 2695 11 view .LVU944 + 3084 0008 4FF40057 mov r7, #8192 + 3085 .L220: + 3086 .LVL348: +2700:Src/main.c **** + 3087 .loc 1 2700 2 is_stmt 1 view .LVU945 +2700:Src/main.c **** + 3088 .loc 1 2700 10 is_stmt 0 view .LVU946 + 3089 000c 47F48078 orr r8, r7, #256 + 3090 .LVL349: +2702:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB + 3091 .loc 1 2702 2 is_stmt 1 view .LVU947 +2703:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB + 3092 .loc 1 2703 2 view .LVU948 +2703:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB + 3093 .loc 1 2703 49 is_stmt 0 view .LVU949 + 3094 0010 C2F30D06 ubfx r6, r2, #0, #14 +2703:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB + 3095 .loc 1 2703 11 view .LVU950 + 3096 0014 46F48046 orr r6, r6, #16384 + 3097 .LVL350: +2704:Src/main.c **** + 3098 .loc 1 2704 2 is_stmt 1 view .LVU951 +2704:Src/main.c **** + 3099 .loc 1 2704 57 is_stmt 0 view .LVU952 + 3100 0018 C2F38D32 ubfx r2, r2, #14, #14 + 3101 .LVL351: +2704:Src/main.c **** + 3102 .loc 1 2704 11 view .LVU953 + 3103 001c 42F48044 orr r4, r2, #16384 + 3104 .LVL352: +2706:Src/main.c **** AD9833_WriteWord(lsw); + 3105 .loc 1 2706 2 is_stmt 1 view .LVU954 + 3106 0020 4046 mov r0, r8 + 3107 .LVL353: +2706:Src/main.c **** AD9833_WriteWord(lsw); + 3108 .loc 1 2706 2 is_stmt 0 view .LVU955 + 3109 0022 FFF7FEFF bl AD9833_WriteWord + 3110 .LVL354: +2707:Src/main.c **** AD9833_WriteWord(msw); + 3111 .loc 1 2707 2 is_stmt 1 view .LVU956 + 3112 0026 3046 mov r0, r6 + ARM GAS /tmp/ccuHnxNu.s page 195 - 3102 @ frame_needed = 0, uses_anonymous_args = 0 -2571:Src/main.c **** switch (out_n) - 3103 .loc 1 2571 1 is_stmt 0 view .LVU951 - 3104 0000 10B5 push {r4, lr} - 3105 .LCFI34: - 3106 .cfi_def_cfa_offset 8 - 3107 .cfi_offset 4, -8 - 3108 .cfi_offset 14, -4 -2572:Src/main.c **** { - 3109 .loc 1 2572 2 is_stmt 1 view .LVU952 - 3110 0002 0928 cmp r0, #9 - 3111 0004 13D8 bhi .L217 - 3112 0006 DFE800F0 tbb [pc, r0] - 3113 .L220: - 3114 000a 05 .byte (.L229-.L220)/2 - 3115 000b 13 .byte (.L228-.L220)/2 - 3116 000c 21 .byte (.L227-.L220)/2 - 3117 000d 2F .byte (.L226-.L220)/2 - 3118 000e 3D .byte (.L225-.L220)/2 - 3119 000f 4B .byte (.L224-.L220)/2 - 3120 0010 59 .byte (.L223-.L220)/2 - 3121 0011 65 .byte (.L222-.L220)/2 - 3122 0012 71 .byte (.L221-.L220)/2 - 3123 0013 7D .byte (.L219-.L220)/2 - 3124 .p2align 1 - 3125 .L229: -2575:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 3126 .loc 1 2575 3 view .LVU953 - 3127 0014 414C ldr r4, .L232 - 3128 0016 0122 movs r2, #1 - 3129 0018 4FF48061 mov r1, #1024 - 3130 001c 2046 mov r0, r4 - 3131 .LVL360: -2575:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 3132 .loc 1 2575 3 is_stmt 0 view .LVU954 - 3133 001e FFF7FEFF bl HAL_GPIO_WritePin - 3134 .LVL361: -2576:Src/main.c **** break; - 3135 .loc 1 2576 3 is_stmt 1 view .LVU955 - 3136 0022 0022 movs r2, #0 - 3137 0024 4FF48061 mov r1, #1024 - 3138 0028 2046 mov r0, r4 - 3139 002a FFF7FEFF bl HAL_GPIO_WritePin - 3140 .LVL362: -2577:Src/main.c **** - 3141 .loc 1 2577 2 view .LVU956 - 3142 .L217: -2624:Src/main.c **** - 3143 .loc 1 2624 1 is_stmt 0 view .LVU957 - 3144 002e 10BD pop {r4, pc} - 3145 .LVL363: - 3146 .L228: -2580:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 3147 .loc 1 2580 3 is_stmt 1 view .LVU958 - 3148 0030 3A4C ldr r4, .L232 - 3149 0032 0122 movs r2, #1 - 3150 0034 4FF40061 mov r1, #2048 - ARM GAS /tmp/ccEQxcUB.s page 195 + 3113 0028 FFF7FEFF bl AD9833_WriteWord + 3114 .LVL355: +2708:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 + 3115 .loc 1 2708 2 view .LVU957 + 3116 002c 2046 mov r0, r4 + 3117 002e FFF7FEFF bl AD9833_WriteWord + 3118 .LVL356: +2709:Src/main.c **** + 3119 .loc 1 2709 2 view .LVU958 + 3120 0032 4FF44040 mov r0, #49152 + 3121 0036 FFF7FEFF bl AD9833_WriteWord + 3122 .LVL357: +2711:Src/main.c **** { + 3123 .loc 1 2711 2 view .LVU959 +2711:Src/main.c **** { + 3124 .loc 1 2711 5 is_stmt 0 view .LVU960 + 3125 003a 05B9 cbnz r5, .L221 +2700:Src/main.c **** + 3126 .loc 1 2700 10 view .LVU961 + 3127 003c 4746 mov r7, r8 + 3128 .L221: + 3129 .LVL358: +2715:Src/main.c **** } + 3130 .loc 1 2715 2 is_stmt 1 view .LVU962 + 3131 003e 3846 mov r0, r7 + 3132 0040 FFF7FEFF bl AD9833_WriteWord + 3133 .LVL359: +2716:Src/main.c **** + 3134 .loc 1 2716 1 is_stmt 0 view .LVU963 + 3135 0044 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 3136 .LVL360: + 3137 .L222: +2698:Src/main.c **** } + 3138 .loc 1 2698 11 view .LVU964 + 3139 0048 42F20207 movw r7, #8194 + 3140 004c DEE7 b .L220 + 3141 .cfi_endproc + 3142 .LFE1215: + 3144 .section .text.OUT_trigger,"ax",%progbits + 3145 .align 1 + 3146 .syntax unified + 3147 .thumb + 3148 .thumb_func + 3150 OUT_trigger: + 3151 .LVL361: + 3152 .LFB1211: +2590:Src/main.c **** switch (out_n) + 3153 .loc 1 2590 1 is_stmt 1 view -0 + 3154 .cfi_startproc + 3155 @ args = 0, pretend = 0, frame = 0 + 3156 @ frame_needed = 0, uses_anonymous_args = 0 +2590:Src/main.c **** switch (out_n) + 3157 .loc 1 2590 1 is_stmt 0 view .LVU966 + 3158 0000 10B5 push {r4, lr} + 3159 .LCFI34: + 3160 .cfi_def_cfa_offset 8 + 3161 .cfi_offset 4, -8 + ARM GAS /tmp/ccuHnxNu.s page 196 - 3151 0038 2046 mov r0, r4 - 3152 .LVL364: -2580:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 3153 .loc 1 2580 3 is_stmt 0 view .LVU959 - 3154 003a FFF7FEFF bl HAL_GPIO_WritePin - 3155 .LVL365: -2581:Src/main.c **** break; - 3156 .loc 1 2581 3 is_stmt 1 view .LVU960 - 3157 003e 0022 movs r2, #0 - 3158 0040 4FF40061 mov r1, #2048 - 3159 0044 2046 mov r0, r4 - 3160 0046 FFF7FEFF bl HAL_GPIO_WritePin - 3161 .LVL366: -2582:Src/main.c **** - 3162 .loc 1 2582 2 view .LVU961 - 3163 004a F0E7 b .L217 - 3164 .LVL367: - 3165 .L227: -2585:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 3166 .loc 1 2585 3 view .LVU962 - 3167 004c 334C ldr r4, .L232 - 3168 004e 0122 movs r2, #1 - 3169 0050 4FF48051 mov r1, #4096 - 3170 0054 2046 mov r0, r4 - 3171 .LVL368: -2585:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 3172 .loc 1 2585 3 is_stmt 0 view .LVU963 - 3173 0056 FFF7FEFF bl HAL_GPIO_WritePin - 3174 .LVL369: -2586:Src/main.c **** break; - 3175 .loc 1 2586 3 is_stmt 1 view .LVU964 - 3176 005a 0022 movs r2, #0 - 3177 005c 4FF48051 mov r1, #4096 - 3178 0060 2046 mov r0, r4 - 3179 0062 FFF7FEFF bl HAL_GPIO_WritePin - 3180 .LVL370: -2587:Src/main.c **** - 3181 .loc 1 2587 2 view .LVU965 - 3182 0066 E2E7 b .L217 - 3183 .LVL371: - 3184 .L226: -2590:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 3185 .loc 1 2590 3 view .LVU966 - 3186 0068 2C4C ldr r4, .L232 - 3187 006a 0122 movs r2, #1 - 3188 006c 4FF40051 mov r1, #8192 - 3189 0070 2046 mov r0, r4 - 3190 .LVL372: -2590:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 3191 .loc 1 2590 3 is_stmt 0 view .LVU967 - 3192 0072 FFF7FEFF bl HAL_GPIO_WritePin - 3193 .LVL373: -2591:Src/main.c **** break; - 3194 .loc 1 2591 3 is_stmt 1 view .LVU968 - 3195 0076 0022 movs r2, #0 - 3196 0078 4FF40051 mov r1, #8192 - 3197 007c 2046 mov r0, r4 - ARM GAS /tmp/ccEQxcUB.s page 196 + 3162 .cfi_offset 14, -4 +2591:Src/main.c **** { + 3163 .loc 1 2591 2 is_stmt 1 view .LVU967 + 3164 0002 0928 cmp r0, #9 + 3165 0004 13D8 bhi .L224 + 3166 0006 DFE800F0 tbb [pc, r0] + 3167 .L227: + 3168 000a 05 .byte (.L236-.L227)/2 + 3169 000b 13 .byte (.L235-.L227)/2 + 3170 000c 21 .byte (.L234-.L227)/2 + 3171 000d 2F .byte (.L233-.L227)/2 + 3172 000e 3D .byte (.L232-.L227)/2 + 3173 000f 4B .byte (.L231-.L227)/2 + 3174 0010 59 .byte (.L230-.L227)/2 + 3175 0011 65 .byte (.L229-.L227)/2 + 3176 0012 71 .byte (.L228-.L227)/2 + 3177 0013 7D .byte (.L226-.L227)/2 + 3178 .p2align 1 + 3179 .L236: +2594:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 3180 .loc 1 2594 3 view .LVU968 + 3181 0014 414C ldr r4, .L239 + 3182 0016 0122 movs r2, #1 + 3183 0018 4FF48061 mov r1, #1024 + 3184 001c 2046 mov r0, r4 + 3185 .LVL362: +2594:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 3186 .loc 1 2594 3 is_stmt 0 view .LVU969 + 3187 001e FFF7FEFF bl HAL_GPIO_WritePin + 3188 .LVL363: +2595:Src/main.c **** break; + 3189 .loc 1 2595 3 is_stmt 1 view .LVU970 + 3190 0022 0022 movs r2, #0 + 3191 0024 4FF48061 mov r1, #1024 + 3192 0028 2046 mov r0, r4 + 3193 002a FFF7FEFF bl HAL_GPIO_WritePin + 3194 .LVL364: +2596:Src/main.c **** + 3195 .loc 1 2596 2 view .LVU971 + 3196 .L224: +2643:Src/main.c **** + 3197 .loc 1 2643 1 is_stmt 0 view .LVU972 + 3198 002e 10BD pop {r4, pc} + 3199 .LVL365: + 3200 .L235: +2599:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 3201 .loc 1 2599 3 is_stmt 1 view .LVU973 + 3202 0030 3A4C ldr r4, .L239 + 3203 0032 0122 movs r2, #1 + 3204 0034 4FF40061 mov r1, #2048 + 3205 0038 2046 mov r0, r4 + 3206 .LVL366: +2599:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 3207 .loc 1 2599 3 is_stmt 0 view .LVU974 + 3208 003a FFF7FEFF bl HAL_GPIO_WritePin + 3209 .LVL367: +2600:Src/main.c **** break; + ARM GAS /tmp/ccuHnxNu.s page 197 - 3198 007e FFF7FEFF bl HAL_GPIO_WritePin - 3199 .LVL374: -2592:Src/main.c **** - 3200 .loc 1 2592 2 view .LVU969 - 3201 0082 D4E7 b .L217 - 3202 .LVL375: - 3203 .L225: -2595:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 3204 .loc 1 2595 3 view .LVU970 - 3205 0084 254C ldr r4, .L232 - 3206 0086 0122 movs r2, #1 - 3207 0088 4FF48041 mov r1, #16384 - 3208 008c 2046 mov r0, r4 - 3209 .LVL376: -2595:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 3210 .loc 1 2595 3 is_stmt 0 view .LVU971 - 3211 008e FFF7FEFF bl HAL_GPIO_WritePin - 3212 .LVL377: -2596:Src/main.c **** break; - 3213 .loc 1 2596 3 is_stmt 1 view .LVU972 - 3214 0092 0022 movs r2, #0 - 3215 0094 4FF48041 mov r1, #16384 - 3216 0098 2046 mov r0, r4 - 3217 009a FFF7FEFF bl HAL_GPIO_WritePin - 3218 .LVL378: -2597:Src/main.c **** - 3219 .loc 1 2597 2 view .LVU973 - 3220 009e C6E7 b .L217 - 3221 .LVL379: - 3222 .L224: -2600:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 3223 .loc 1 2600 3 view .LVU974 - 3224 00a0 1E4C ldr r4, .L232 - 3225 00a2 0122 movs r2, #1 - 3226 00a4 4FF40041 mov r1, #32768 - 3227 00a8 2046 mov r0, r4 - 3228 .LVL380: -2600:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 3229 .loc 1 2600 3 is_stmt 0 view .LVU975 - 3230 00aa FFF7FEFF bl HAL_GPIO_WritePin - 3231 .LVL381: -2601:Src/main.c **** break; - 3232 .loc 1 2601 3 is_stmt 1 view .LVU976 - 3233 00ae 0022 movs r2, #0 - 3234 00b0 4FF40041 mov r1, #32768 - 3235 00b4 2046 mov r0, r4 - 3236 00b6 FFF7FEFF bl HAL_GPIO_WritePin - 3237 .LVL382: -2602:Src/main.c **** - 3238 .loc 1 2602 2 view .LVU977 - 3239 00ba B8E7 b .L217 - 3240 .LVL383: - 3241 .L223: -2605:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 3242 .loc 1 2605 3 view .LVU978 - 3243 00bc 184C ldr r4, .L232+4 - 3244 00be 0122 movs r2, #1 - ARM GAS /tmp/ccEQxcUB.s page 197 + 3210 .loc 1 2600 3 is_stmt 1 view .LVU975 + 3211 003e 0022 movs r2, #0 + 3212 0040 4FF40061 mov r1, #2048 + 3213 0044 2046 mov r0, r4 + 3214 0046 FFF7FEFF bl HAL_GPIO_WritePin + 3215 .LVL368: +2601:Src/main.c **** + 3216 .loc 1 2601 2 view .LVU976 + 3217 004a F0E7 b .L224 + 3218 .LVL369: + 3219 .L234: +2604:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 3220 .loc 1 2604 3 view .LVU977 + 3221 004c 334C ldr r4, .L239 + 3222 004e 0122 movs r2, #1 + 3223 0050 4FF48051 mov r1, #4096 + 3224 0054 2046 mov r0, r4 + 3225 .LVL370: +2604:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 3226 .loc 1 2604 3 is_stmt 0 view .LVU978 + 3227 0056 FFF7FEFF bl HAL_GPIO_WritePin + 3228 .LVL371: +2605:Src/main.c **** break; + 3229 .loc 1 2605 3 is_stmt 1 view .LVU979 + 3230 005a 0022 movs r2, #0 + 3231 005c 4FF48051 mov r1, #4096 + 3232 0060 2046 mov r0, r4 + 3233 0062 FFF7FEFF bl HAL_GPIO_WritePin + 3234 .LVL372: +2606:Src/main.c **** + 3235 .loc 1 2606 2 view .LVU980 + 3236 0066 E2E7 b .L224 + 3237 .LVL373: + 3238 .L233: +2609:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 3239 .loc 1 2609 3 view .LVU981 + 3240 0068 2C4C ldr r4, .L239 + 3241 006a 0122 movs r2, #1 + 3242 006c 4FF40051 mov r1, #8192 + 3243 0070 2046 mov r0, r4 + 3244 .LVL374: +2609:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 3245 .loc 1 2609 3 is_stmt 0 view .LVU982 + 3246 0072 FFF7FEFF bl HAL_GPIO_WritePin + 3247 .LVL375: +2610:Src/main.c **** break; + 3248 .loc 1 2610 3 is_stmt 1 view .LVU983 + 3249 0076 0022 movs r2, #0 + 3250 0078 4FF40051 mov r1, #8192 + 3251 007c 2046 mov r0, r4 + 3252 007e FFF7FEFF bl HAL_GPIO_WritePin + 3253 .LVL376: +2611:Src/main.c **** + 3254 .loc 1 2611 2 view .LVU984 + 3255 0082 D4E7 b .L224 + 3256 .LVL377: + 3257 .L232: + ARM GAS /tmp/ccuHnxNu.s page 198 - 3245 00c0 1021 movs r1, #16 - 3246 00c2 2046 mov r0, r4 - 3247 .LVL384: -2605:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 3248 .loc 1 2605 3 is_stmt 0 view .LVU979 - 3249 00c4 FFF7FEFF bl HAL_GPIO_WritePin - 3250 .LVL385: -2606:Src/main.c **** break; - 3251 .loc 1 2606 3 is_stmt 1 view .LVU980 - 3252 00c8 0022 movs r2, #0 - 3253 00ca 1021 movs r1, #16 - 3254 00cc 2046 mov r0, r4 - 3255 00ce FFF7FEFF bl HAL_GPIO_WritePin - 3256 .LVL386: -2607:Src/main.c **** - 3257 .loc 1 2607 2 view .LVU981 - 3258 00d2 ACE7 b .L217 - 3259 .LVL387: - 3260 .L222: -2610:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 3261 .loc 1 2610 3 view .LVU982 - 3262 00d4 124C ldr r4, .L232+4 - 3263 00d6 0122 movs r2, #1 - 3264 00d8 2021 movs r1, #32 - 3265 00da 2046 mov r0, r4 - 3266 .LVL388: -2610:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 3267 .loc 1 2610 3 is_stmt 0 view .LVU983 - 3268 00dc FFF7FEFF bl HAL_GPIO_WritePin - 3269 .LVL389: -2611:Src/main.c **** break; - 3270 .loc 1 2611 3 is_stmt 1 view .LVU984 - 3271 00e0 0022 movs r2, #0 - 3272 00e2 2021 movs r1, #32 - 3273 00e4 2046 mov r0, r4 - 3274 00e6 FFF7FEFF bl HAL_GPIO_WritePin - 3275 .LVL390: -2612:Src/main.c **** - 3276 .loc 1 2612 2 view .LVU985 - 3277 00ea A0E7 b .L217 - 3278 .LVL391: - 3279 .L221: -2615:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 3280 .loc 1 2615 3 view .LVU986 - 3281 00ec 0C4C ldr r4, .L232+4 - 3282 00ee 0122 movs r2, #1 - 3283 00f0 4021 movs r1, #64 - 3284 00f2 2046 mov r0, r4 - 3285 .LVL392: -2615:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 3286 .loc 1 2615 3 is_stmt 0 view .LVU987 - 3287 00f4 FFF7FEFF bl HAL_GPIO_WritePin - 3288 .LVL393: -2616:Src/main.c **** break; - 3289 .loc 1 2616 3 is_stmt 1 view .LVU988 - 3290 00f8 0022 movs r2, #0 - 3291 00fa 4021 movs r1, #64 - ARM GAS /tmp/ccEQxcUB.s page 198 +2614:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 3258 .loc 1 2614 3 view .LVU985 + 3259 0084 254C ldr r4, .L239 + 3260 0086 0122 movs r2, #1 + 3261 0088 4FF48041 mov r1, #16384 + 3262 008c 2046 mov r0, r4 + 3263 .LVL378: +2614:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 3264 .loc 1 2614 3 is_stmt 0 view .LVU986 + 3265 008e FFF7FEFF bl HAL_GPIO_WritePin + 3266 .LVL379: +2615:Src/main.c **** break; + 3267 .loc 1 2615 3 is_stmt 1 view .LVU987 + 3268 0092 0022 movs r2, #0 + 3269 0094 4FF48041 mov r1, #16384 + 3270 0098 2046 mov r0, r4 + 3271 009a FFF7FEFF bl HAL_GPIO_WritePin + 3272 .LVL380: +2616:Src/main.c **** + 3273 .loc 1 2616 2 view .LVU988 + 3274 009e C6E7 b .L224 + 3275 .LVL381: + 3276 .L231: +2619:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 3277 .loc 1 2619 3 view .LVU989 + 3278 00a0 1E4C ldr r4, .L239 + 3279 00a2 0122 movs r2, #1 + 3280 00a4 4FF40041 mov r1, #32768 + 3281 00a8 2046 mov r0, r4 + 3282 .LVL382: +2619:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 3283 .loc 1 2619 3 is_stmt 0 view .LVU990 + 3284 00aa FFF7FEFF bl HAL_GPIO_WritePin + 3285 .LVL383: +2620:Src/main.c **** break; + 3286 .loc 1 2620 3 is_stmt 1 view .LVU991 + 3287 00ae 0022 movs r2, #0 + 3288 00b0 4FF40041 mov r1, #32768 + 3289 00b4 2046 mov r0, r4 + 3290 00b6 FFF7FEFF bl HAL_GPIO_WritePin + 3291 .LVL384: +2621:Src/main.c **** + 3292 .loc 1 2621 2 view .LVU992 + 3293 00ba B8E7 b .L224 + 3294 .LVL385: + 3295 .L230: +2624:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 3296 .loc 1 2624 3 view .LVU993 + 3297 00bc 184C ldr r4, .L239+4 + 3298 00be 0122 movs r2, #1 + 3299 00c0 1021 movs r1, #16 + 3300 00c2 2046 mov r0, r4 + 3301 .LVL386: +2624:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 3302 .loc 1 2624 3 is_stmt 0 view .LVU994 + 3303 00c4 FFF7FEFF bl HAL_GPIO_WritePin + 3304 .LVL387: + ARM GAS /tmp/ccuHnxNu.s page 199 - 3292 00fc 2046 mov r0, r4 - 3293 00fe FFF7FEFF bl HAL_GPIO_WritePin - 3294 .LVL394: -2617:Src/main.c **** - 3295 .loc 1 2617 2 view .LVU989 - 3296 0102 94E7 b .L217 - 3297 .LVL395: - 3298 .L219: -2620:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 3299 .loc 1 2620 3 view .LVU990 - 3300 0104 064C ldr r4, .L232+4 - 3301 0106 0122 movs r2, #1 - 3302 0108 8021 movs r1, #128 - 3303 010a 2046 mov r0, r4 - 3304 .LVL396: -2620:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 3305 .loc 1 2620 3 is_stmt 0 view .LVU991 - 3306 010c FFF7FEFF bl HAL_GPIO_WritePin - 3307 .LVL397: -2621:Src/main.c **** break; - 3308 .loc 1 2621 3 is_stmt 1 view .LVU992 - 3309 0110 0022 movs r2, #0 - 3310 0112 8021 movs r1, #128 - 3311 0114 2046 mov r0, r4 - 3312 0116 FFF7FEFF bl HAL_GPIO_WritePin - 3313 .LVL398: -2622:Src/main.c **** } - 3314 .loc 1 2622 2 view .LVU993 -2624:Src/main.c **** - 3315 .loc 1 2624 1 is_stmt 0 view .LVU994 - 3316 011a 88E7 b .L217 - 3317 .L233: - 3318 .align 2 - 3319 .L232: - 3320 011c 00180240 .word 1073879040 - 3321 0120 00040240 .word 1073873920 - 3322 .cfi_endproc - 3323 .LFE1211: - 3325 .section .text.MPhD_T,"ax",%progbits - 3326 .align 1 - 3327 .syntax unified - 3328 .thumb - 3329 .thumb_func - 3331 MPhD_T: - 3332 .LVL399: - 3333 .LFB1226: -3247:Src/main.c **** uint16_t P; - 3334 .loc 1 3247 1 is_stmt 1 view -0 - 3335 .cfi_startproc - 3336 @ args = 0, pretend = 0, frame = 0 - 3337 @ frame_needed = 0, uses_anonymous_args = 0 -3247:Src/main.c **** uint16_t P; - 3338 .loc 1 3247 1 is_stmt 0 view .LVU996 - 3339 0000 38B5 push {r3, r4, r5, lr} - 3340 .LCFI35: - 3341 .cfi_def_cfa_offset 16 - 3342 .cfi_offset 3, -16 - ARM GAS /tmp/ccEQxcUB.s page 199 +2625:Src/main.c **** break; + 3305 .loc 1 2625 3 is_stmt 1 view .LVU995 + 3306 00c8 0022 movs r2, #0 + 3307 00ca 1021 movs r1, #16 + 3308 00cc 2046 mov r0, r4 + 3309 00ce FFF7FEFF bl HAL_GPIO_WritePin + 3310 .LVL388: +2626:Src/main.c **** + 3311 .loc 1 2626 2 view .LVU996 + 3312 00d2 ACE7 b .L224 + 3313 .LVL389: + 3314 .L229: +2629:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 3315 .loc 1 2629 3 view .LVU997 + 3316 00d4 124C ldr r4, .L239+4 + 3317 00d6 0122 movs r2, #1 + 3318 00d8 2021 movs r1, #32 + 3319 00da 2046 mov r0, r4 + 3320 .LVL390: +2629:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 3321 .loc 1 2629 3 is_stmt 0 view .LVU998 + 3322 00dc FFF7FEFF bl HAL_GPIO_WritePin + 3323 .LVL391: +2630:Src/main.c **** break; + 3324 .loc 1 2630 3 is_stmt 1 view .LVU999 + 3325 00e0 0022 movs r2, #0 + 3326 00e2 2021 movs r1, #32 + 3327 00e4 2046 mov r0, r4 + 3328 00e6 FFF7FEFF bl HAL_GPIO_WritePin + 3329 .LVL392: +2631:Src/main.c **** + 3330 .loc 1 2631 2 view .LVU1000 + 3331 00ea A0E7 b .L224 + 3332 .LVL393: + 3333 .L228: +2634:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 3334 .loc 1 2634 3 view .LVU1001 + 3335 00ec 0C4C ldr r4, .L239+4 + 3336 00ee 0122 movs r2, #1 + 3337 00f0 4021 movs r1, #64 + 3338 00f2 2046 mov r0, r4 + 3339 .LVL394: +2634:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 3340 .loc 1 2634 3 is_stmt 0 view .LVU1002 + 3341 00f4 FFF7FEFF bl HAL_GPIO_WritePin + 3342 .LVL395: +2635:Src/main.c **** break; + 3343 .loc 1 2635 3 is_stmt 1 view .LVU1003 + 3344 00f8 0022 movs r2, #0 + 3345 00fa 4021 movs r1, #64 + 3346 00fc 2046 mov r0, r4 + 3347 00fe FFF7FEFF bl HAL_GPIO_WritePin + 3348 .LVL396: +2636:Src/main.c **** + 3349 .loc 1 2636 2 view .LVU1004 + 3350 0102 94E7 b .L224 + 3351 .LVL397: + ARM GAS /tmp/ccuHnxNu.s page 200 - 3343 .cfi_offset 4, -12 - 3344 .cfi_offset 5, -8 - 3345 .cfi_offset 14, -4 - 3346 0002 0446 mov r4, r0 -3248:Src/main.c **** uint32_t tmp32; - 3347 .loc 1 3248 2 is_stmt 1 view .LVU997 -3249:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 3348 .loc 1 3249 2 view .LVU998 -3250:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 3349 .loc 1 3250 2 view .LVU999 - 3350 0004 0022 movs r2, #0 - 3351 0006 4FF48041 mov r1, #16384 - 3352 000a 8148 ldr r0, .L275 - 3353 .LVL400: -3250:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 3354 .loc 1 3250 2 is_stmt 0 view .LVU1000 - 3355 000c FFF7FEFF bl HAL_GPIO_WritePin - 3356 .LVL401: -3251:Src/main.c **** tmp32=0; - 3357 .loc 1 3251 2 is_stmt 1 view .LVU1001 - 3358 0010 0022 movs r2, #0 - 3359 0012 4FF40071 mov r1, #512 - 3360 0016 7F48 ldr r0, .L275+4 - 3361 0018 FFF7FEFF bl HAL_GPIO_WritePin - 3362 .LVL402: -3252:Src/main.c **** while(tmp32<500){tmp32++;} - 3363 .loc 1 3252 2 view .LVU1002 -3253:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3364 .loc 1 3253 2 view .LVU1003 -3252:Src/main.c **** while(tmp32<500){tmp32++;} - 3365 .loc 1 3252 7 is_stmt 0 view .LVU1004 - 3366 001c 0023 movs r3, #0 -3253:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3367 .loc 1 3253 7 view .LVU1005 - 3368 001e 00E0 b .L235 - 3369 .LVL403: - 3370 .L236: -3253:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3371 .loc 1 3253 19 is_stmt 1 discriminator 2 view .LVU1006 -3253:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3372 .loc 1 3253 24 is_stmt 0 discriminator 2 view .LVU1007 - 3373 0020 0133 adds r3, r3, #1 - 3374 .LVL404: - 3375 .L235: -3253:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3376 .loc 1 3253 13 is_stmt 1 discriminator 1 view .LVU1008 - 3377 0022 B3F5FA7F cmp r3, #500 - 3378 0026 FBD3 bcc .L236 -3254:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3379 .loc 1 3254 2 view .LVU1009 - 3380 0028 0122 movs r2, #1 - 3381 002a 4FF48041 mov r1, #16384 - 3382 002e 7848 ldr r0, .L275 - 3383 0030 FFF7FEFF bl HAL_GPIO_WritePin - 3384 .LVL405: -3255:Src/main.c **** tmp32=0; - 3385 .loc 1 3255 2 view .LVU1010 - ARM GAS /tmp/ccEQxcUB.s page 200 + 3352 .L226: +2639:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 3353 .loc 1 2639 3 view .LVU1005 + 3354 0104 064C ldr r4, .L239+4 + 3355 0106 0122 movs r2, #1 + 3356 0108 8021 movs r1, #128 + 3357 010a 2046 mov r0, r4 + 3358 .LVL398: +2639:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 3359 .loc 1 2639 3 is_stmt 0 view .LVU1006 + 3360 010c FFF7FEFF bl HAL_GPIO_WritePin + 3361 .LVL399: +2640:Src/main.c **** break; + 3362 .loc 1 2640 3 is_stmt 1 view .LVU1007 + 3363 0110 0022 movs r2, #0 + 3364 0112 8021 movs r1, #128 + 3365 0114 2046 mov r0, r4 + 3366 0116 FFF7FEFF bl HAL_GPIO_WritePin + 3367 .LVL400: +2641:Src/main.c **** } + 3368 .loc 1 2641 2 view .LVU1008 +2643:Src/main.c **** + 3369 .loc 1 2643 1 is_stmt 0 view .LVU1009 + 3370 011a 88E7 b .L224 + 3371 .L240: + 3372 .align 2 + 3373 .L239: + 3374 011c 00180240 .word 1073879040 + 3375 0120 00040240 .word 1073873920 + 3376 .cfi_endproc + 3377 .LFE1211: + 3379 .section .text.MPhD_T,"ax",%progbits + 3380 .align 1 + 3381 .syntax unified + 3382 .thumb + 3383 .thumb_func + 3385 MPhD_T: + 3386 .LVL401: + 3387 .LFB1228: +3302:Src/main.c **** uint16_t P; + 3388 .loc 1 3302 1 is_stmt 1 view -0 + 3389 .cfi_startproc + 3390 @ args = 0, pretend = 0, frame = 0 + 3391 @ frame_needed = 0, uses_anonymous_args = 0 +3302:Src/main.c **** uint16_t P; + 3392 .loc 1 3302 1 is_stmt 0 view .LVU1011 + 3393 0000 38B5 push {r3, r4, r5, lr} + 3394 .LCFI35: + 3395 .cfi_def_cfa_offset 16 + 3396 .cfi_offset 3, -16 + 3397 .cfi_offset 4, -12 + 3398 .cfi_offset 5, -8 + 3399 .cfi_offset 14, -4 + 3400 0002 0446 mov r4, r0 +3303:Src/main.c **** uint32_t tmp32; + 3401 .loc 1 3303 2 is_stmt 1 view .LVU1012 +3304:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + ARM GAS /tmp/ccuHnxNu.s page 201 - 3386 0034 0122 movs r2, #1 - 3387 0036 4FF40071 mov r1, #512 - 3388 003a 7648 ldr r0, .L275+4 - 3389 003c FFF7FEFF bl HAL_GPIO_WritePin - 3390 .LVL406: -3256:Src/main.c **** while(tmp32<500){tmp32++;} - 3391 .loc 1 3256 2 view .LVU1011 -3257:Src/main.c **** if (num==1)//MPD1 - 3392 .loc 1 3257 2 view .LVU1012 -3256:Src/main.c **** while(tmp32<500){tmp32++;} - 3393 .loc 1 3256 7 is_stmt 0 view .LVU1013 - 3394 0040 0023 movs r3, #0 -3257:Src/main.c **** if (num==1)//MPD1 - 3395 .loc 1 3257 7 view .LVU1014 - 3396 0042 00E0 b .L237 - 3397 .LVL407: - 3398 .L238: -3257:Src/main.c **** if (num==1)//MPD1 - 3399 .loc 1 3257 19 is_stmt 1 discriminator 2 view .LVU1015 -3257:Src/main.c **** if (num==1)//MPD1 - 3400 .loc 1 3257 24 is_stmt 0 discriminator 2 view .LVU1016 - 3401 0044 0133 adds r3, r3, #1 - 3402 .LVL408: - 3403 .L237: -3257:Src/main.c **** if (num==1)//MPD1 - 3404 .loc 1 3257 13 is_stmt 1 discriminator 1 view .LVU1017 - 3405 0046 B3F5FA7F cmp r3, #500 - 3406 004a FBD3 bcc .L238 -3258:Src/main.c **** { - 3407 .loc 1 3258 2 view .LVU1018 - 3408 004c 631E subs r3, r4, #1 - 3409 .LVL409: -3258:Src/main.c **** { - 3410 .loc 1 3258 2 is_stmt 0 view .LVU1019 - 3411 004e 032B cmp r3, #3 - 3412 0050 39D8 bhi .L239 - 3413 0052 DFE803F0 tbb [pc, r3] - 3414 .L241: - 3415 0056 02 .byte (.L244-.L241)/2 - 3416 0057 3A .byte (.L243-.L241)/2 - 3417 0058 6F .byte (.L242-.L241)/2 - 3418 0059 A6 .byte (.L240-.L241)/2 - 3419 .p2align 1 - 3420 .L244: -3260:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 3421 .loc 1 3260 3 is_stmt 1 view .LVU1020 - 3422 005a 6D4C ldr r4, .L275 - 3423 .LVL410: -3260:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 3424 .loc 1 3260 3 is_stmt 0 view .LVU1021 - 3425 005c 0122 movs r2, #1 - 3426 005e 4FF40061 mov r1, #2048 - 3427 0062 2046 mov r0, r4 - 3428 0064 FFF7FEFF bl HAL_GPIO_WritePin - 3429 .LVL411: -3261:Src/main.c **** tmp32=0; - 3430 .loc 1 3261 3 is_stmt 1 view .LVU1022 - ARM GAS /tmp/ccEQxcUB.s page 201 + 3402 .loc 1 3304 2 view .LVU1013 +3305:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 3403 .loc 1 3305 2 view .LVU1014 + 3404 0004 0022 movs r2, #0 + 3405 0006 4FF48041 mov r1, #16384 + 3406 000a 8148 ldr r0, .L282 + 3407 .LVL402: +3305:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 3408 .loc 1 3305 2 is_stmt 0 view .LVU1015 + 3409 000c FFF7FEFF bl HAL_GPIO_WritePin + 3410 .LVL403: +3306:Src/main.c **** tmp32=0; + 3411 .loc 1 3306 2 is_stmt 1 view .LVU1016 + 3412 0010 0022 movs r2, #0 + 3413 0012 4FF40071 mov r1, #512 + 3414 0016 7F48 ldr r0, .L282+4 + 3415 0018 FFF7FEFF bl HAL_GPIO_WritePin + 3416 .LVL404: +3307:Src/main.c **** while(tmp32<500){tmp32++;} + 3417 .loc 1 3307 2 view .LVU1017 +3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3418 .loc 1 3308 2 view .LVU1018 +3307:Src/main.c **** while(tmp32<500){tmp32++;} + 3419 .loc 1 3307 7 is_stmt 0 view .LVU1019 + 3420 001c 0023 movs r3, #0 +3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3421 .loc 1 3308 7 view .LVU1020 + 3422 001e 00E0 b .L242 + 3423 .LVL405: + 3424 .L243: +3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3425 .loc 1 3308 19 is_stmt 1 discriminator 2 view .LVU1021 +3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3426 .loc 1 3308 24 is_stmt 0 discriminator 2 view .LVU1022 + 3427 0020 0133 adds r3, r3, #1 + 3428 .LVL406: + 3429 .L242: +3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3430 .loc 1 3308 13 is_stmt 1 discriminator 1 view .LVU1023 + 3431 0022 B3F5FA7F cmp r3, #500 + 3432 0026 FBD3 bcc .L243 +3309:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3433 .loc 1 3309 2 view .LVU1024 + 3434 0028 0122 movs r2, #1 + 3435 002a 4FF48041 mov r1, #16384 + 3436 002e 7848 ldr r0, .L282 + 3437 0030 FFF7FEFF bl HAL_GPIO_WritePin + 3438 .LVL407: +3310:Src/main.c **** tmp32=0; + 3439 .loc 1 3310 2 view .LVU1025 + 3440 0034 0122 movs r2, #1 + 3441 0036 4FF40071 mov r1, #512 + 3442 003a 7648 ldr r0, .L282+4 + 3443 003c FFF7FEFF bl HAL_GPIO_WritePin + 3444 .LVL408: +3311:Src/main.c **** while(tmp32<500){tmp32++;} + 3445 .loc 1 3311 2 view .LVU1026 + ARM GAS /tmp/ccuHnxNu.s page 202 - 3431 0068 0022 movs r2, #0 - 3432 006a 4FF48061 mov r1, #1024 - 3433 006e 2046 mov r0, r4 - 3434 0070 FFF7FEFF bl HAL_GPIO_WritePin - 3435 .LVL412: -3262:Src/main.c **** while(tmp32<500){tmp32++;} - 3436 .loc 1 3262 3 view .LVU1023 -3263:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3437 .loc 1 3263 3 view .LVU1024 -3262:Src/main.c **** while(tmp32<500){tmp32++;} - 3438 .loc 1 3262 8 is_stmt 0 view .LVU1025 - 3439 0074 0023 movs r3, #0 -3263:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3440 .loc 1 3263 8 view .LVU1026 - 3441 0076 00E0 b .L245 - 3442 .LVL413: - 3443 .L246: -3263:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3444 .loc 1 3263 20 is_stmt 1 discriminator 2 view .LVU1027 -3263:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3445 .loc 1 3263 25 is_stmt 0 discriminator 2 view .LVU1028 - 3446 0078 0133 adds r3, r3, #1 - 3447 .LVL414: - 3448 .L245: -3263:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3449 .loc 1 3263 14 is_stmt 1 discriminator 1 view .LVU1029 - 3450 007a B3F5FA7F cmp r3, #500 - 3451 007e FBD3 bcc .L246 -3265:Src/main.c **** tmp32 = 0; - 3452 .loc 1 3265 3 view .LVU1030 - 3453 .LVL415: - 3454 .LBB427: - 3455 .LBI427: +3312:Src/main.c **** if (num==1)//MPD1 + 3446 .loc 1 3312 2 view .LVU1027 +3311:Src/main.c **** while(tmp32<500){tmp32++;} + 3447 .loc 1 3311 7 is_stmt 0 view .LVU1028 + 3448 0040 0023 movs r3, #0 +3312:Src/main.c **** if (num==1)//MPD1 + 3449 .loc 1 3312 7 view .LVU1029 + 3450 0042 00E0 b .L244 + 3451 .LVL409: + 3452 .L245: +3312:Src/main.c **** if (num==1)//MPD1 + 3453 .loc 1 3312 19 is_stmt 1 discriminator 2 view .LVU1030 +3312:Src/main.c **** if (num==1)//MPD1 + 3454 .loc 1 3312 24 is_stmt 0 discriminator 2 view .LVU1031 + 3455 0044 0133 adds r3, r3, #1 + 3456 .LVL410: + 3457 .L244: +3312:Src/main.c **** if (num==1)//MPD1 + 3458 .loc 1 3312 13 is_stmt 1 discriminator 1 view .LVU1032 + 3459 0046 B3F5FA7F cmp r3, #500 + 3460 004a FBD3 bcc .L245 +3313:Src/main.c **** { + 3461 .loc 1 3313 2 view .LVU1033 + 3462 004c 631E subs r3, r4, #1 + 3463 .LVL411: +3313:Src/main.c **** { + 3464 .loc 1 3313 2 is_stmt 0 view .LVU1034 + 3465 004e 032B cmp r3, #3 + 3466 0050 39D8 bhi .L246 + 3467 0052 DFE803F0 tbb [pc, r3] + 3468 .L248: + 3469 0056 02 .byte (.L251-.L248)/2 + 3470 0057 3A .byte (.L250-.L248)/2 + 3471 0058 6F .byte (.L249-.L248)/2 + 3472 0059 A6 .byte (.L247-.L248)/2 + 3473 .p2align 1 + 3474 .L251: +3315:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 3475 .loc 1 3315 3 is_stmt 1 view .LVU1035 + 3476 005a 6D4C ldr r4, .L282 + 3477 .LVL412: +3315:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 3478 .loc 1 3315 3 is_stmt 0 view .LVU1036 + 3479 005c 0122 movs r2, #1 + 3480 005e 4FF40061 mov r1, #2048 + 3481 0062 2046 mov r0, r4 + 3482 0064 FFF7FEFF bl HAL_GPIO_WritePin + 3483 .LVL413: +3316:Src/main.c **** tmp32=0; + 3484 .loc 1 3316 3 is_stmt 1 view .LVU1037 + 3485 0068 0022 movs r2, #0 + 3486 006a 4FF48061 mov r1, #1024 + 3487 006e 2046 mov r0, r4 + 3488 0070 FFF7FEFF bl HAL_GPIO_WritePin + 3489 .LVL414: +3317:Src/main.c **** while(tmp32<500){tmp32++;} + 3490 .loc 1 3317 3 view .LVU1038 + ARM GAS /tmp/ccuHnxNu.s page 203 + + +3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3491 .loc 1 3318 3 view .LVU1039 +3317:Src/main.c **** while(tmp32<500){tmp32++;} + 3492 .loc 1 3317 8 is_stmt 0 view .LVU1040 + 3493 0074 0023 movs r3, #0 +3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3494 .loc 1 3318 8 view .LVU1041 + 3495 0076 00E0 b .L252 + 3496 .LVL415: + 3497 .L253: +3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3498 .loc 1 3318 20 is_stmt 1 discriminator 2 view .LVU1042 +3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3499 .loc 1 3318 25 is_stmt 0 discriminator 2 view .LVU1043 + 3500 0078 0133 adds r3, r3, #1 + 3501 .LVL416: + 3502 .L252: +3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3503 .loc 1 3318 14 is_stmt 1 discriminator 1 view .LVU1044 + 3504 007a B3F5FA7F cmp r3, #500 + 3505 007e FBD3 bcc .L253 +3320:Src/main.c **** tmp32 = 0; + 3506 .loc 1 3320 3 view .LVU1045 + 3507 .LVL417: + 3508 .LBB428: + 3509 .LBI428: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3456 .loc 4 358 22 view .LVU1031 - 3457 .LBB428: + 3510 .loc 4 358 22 view .LVU1046 + 3511 .LBB429: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3458 .loc 4 360 3 view .LVU1032 - 3459 0080 654A ldr r2, .L275+8 - 3460 0082 1368 ldr r3, [r2] - 3461 .LVL416: + 3512 .loc 4 360 3 view .LVU1047 + 3513 0080 654A ldr r2, .L282+8 + 3514 0082 1368 ldr r3, [r2] + 3515 .LVL418: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3462 .loc 4 360 3 is_stmt 0 view .LVU1033 - 3463 0084 43F04003 orr r3, r3, #64 - 3464 0088 1360 str r3, [r2] - 3465 .LVL417: + 3516 .loc 4 360 3 is_stmt 0 view .LVU1048 + 3517 0084 43F04003 orr r3, r3, #64 + 3518 0088 1360 str r3, [r2] + 3519 .LVL419: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3466 .loc 4 360 3 view .LVU1034 - 3467 .LBE428: - 3468 .LBE427: -3266:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3469 .loc 1 3266 3 is_stmt 1 view .LVU1035 -3267:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3470 .loc 1 3267 3 view .LVU1036 -3266:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3471 .loc 1 3266 9 is_stmt 0 view .LVU1037 - 3472 008a 0023 movs r3, #0 - ARM GAS /tmp/ccEQxcUB.s page 202 - - - 3473 .LVL418: - 3474 .L247: -3267:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3475 .loc 1 3267 43 is_stmt 1 discriminator 1 view .LVU1038 - 3476 .LBB429: - 3477 .LBI429: + 3520 .loc 4 360 3 view .LVU1049 + 3521 .LBE429: + 3522 .LBE428: +3321:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3523 .loc 1 3321 3 is_stmt 1 view .LVU1050 +3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3524 .loc 1 3322 3 view .LVU1051 +3321:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3525 .loc 1 3321 9 is_stmt 0 view .LVU1052 + 3526 008a 0023 movs r3, #0 + 3527 .LVL420: + 3528 .L254: +3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3529 .loc 1 3322 43 is_stmt 1 discriminator 1 view .LVU1053 + 3530 .LBB430: + 3531 .LBI430: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3478 .loc 4 905 26 view .LVU1039 - 3479 .LBB430: + ARM GAS /tmp/ccuHnxNu.s page 204 + + + 3532 .loc 4 905 26 view .LVU1054 + 3533 .LBB431: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3480 .loc 4 907 3 view .LVU1040 + 3534 .loc 4 907 3 view .LVU1055 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3481 .loc 4 907 12 is_stmt 0 view .LVU1041 - 3482 008c 624A ldr r2, .L275+8 - 3483 008e 9268 ldr r2, [r2, #8] + 3535 .loc 4 907 12 is_stmt 0 view .LVU1056 + 3536 008c 624A ldr r2, .L282+8 + 3537 008e 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3484 .loc 4 907 68 view .LVU1042 - 3485 0090 12F0010F tst r2, #1 - 3486 0094 04D1 bne .L248 - 3487 .LVL419: + 3538 .loc 4 907 68 view .LVU1057 + 3539 0090 12F0010F tst r2, #1 + 3540 0094 04D1 bne .L255 + 3541 .LVL421: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3488 .loc 4 907 68 view .LVU1043 - 3489 .LBE430: - 3490 .LBE429: -3267:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3491 .loc 1 3267 43 discriminator 2 view .LVU1044 - 3492 0096 B3F57A7F cmp r3, #1000 - 3493 009a 01D8 bhi .L248 -3267:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3494 .loc 1 3267 62 is_stmt 1 discriminator 3 view .LVU1045 -3267:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3495 .loc 1 3267 67 is_stmt 0 discriminator 3 view .LVU1046 - 3496 009c 0133 adds r3, r3, #1 - 3497 .LVL420: -3267:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3498 .loc 1 3267 67 discriminator 3 view .LVU1047 - 3499 009e F5E7 b .L247 - 3500 .L248: -3268:Src/main.c **** while(tmp32<500){tmp32++;} - 3501 .loc 1 3268 3 is_stmt 1 view .LVU1048 - 3502 .LVL421: - 3503 .LBB431: - 3504 .LBI431: + 3542 .loc 4 907 68 view .LVU1058 + 3543 .LBE431: + 3544 .LBE430: +3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3545 .loc 1 3322 43 discriminator 2 view .LVU1059 + 3546 0096 B3F57A7F cmp r3, #1000 + 3547 009a 01D8 bhi .L255 +3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3548 .loc 1 3322 62 is_stmt 1 discriminator 3 view .LVU1060 +3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3549 .loc 1 3322 67 is_stmt 0 discriminator 3 view .LVU1061 + 3550 009c 0133 adds r3, r3, #1 + 3551 .LVL422: +3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3552 .loc 1 3322 67 discriminator 3 view .LVU1062 + 3553 009e F5E7 b .L254 + 3554 .L255: +3323:Src/main.c **** while(tmp32<500){tmp32++;} + 3555 .loc 1 3323 3 is_stmt 1 view .LVU1063 + 3556 .LVL423: + 3557 .LBB432: + 3558 .LBI432: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3505 .loc 4 370 22 view .LVU1049 - 3506 .LBB432: + 3559 .loc 4 370 22 view .LVU1064 + 3560 .LBB433: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3507 .loc 4 372 3 view .LVU1050 - 3508 00a0 5D49 ldr r1, .L275+8 - 3509 00a2 0A68 ldr r2, [r1] - 3510 00a4 22F04002 bic r2, r2, #64 - 3511 00a8 0A60 str r2, [r1] - 3512 .LVL422: + 3561 .loc 4 372 3 view .LVU1065 + 3562 00a0 5D49 ldr r1, .L282+8 + 3563 00a2 0A68 ldr r2, [r1] + 3564 00a4 22F04002 bic r2, r2, #64 + 3565 00a8 0A60 str r2, [r1] + 3566 .LVL424: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3513 .loc 4 372 3 is_stmt 0 view .LVU1051 - 3514 .LBE432: - 3515 .LBE431: - ARM GAS /tmp/ccEQxcUB.s page 203 + 3567 .loc 4 372 3 is_stmt 0 view .LVU1066 + 3568 .LBE433: + 3569 .LBE432: +3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3570 .loc 1 3324 3 is_stmt 1 view .LVU1067 + 3571 .LBB435: + 3572 .LBB434: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 3573 .loc 4 373 1 is_stmt 0 view .LVU1068 + 3574 00aa 00E0 b .L257 + ARM GAS /tmp/ccuHnxNu.s page 205 -3269:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3516 .loc 1 3269 3 is_stmt 1 view .LVU1052 - 3517 .LBB434: - 3518 .LBB433: + 3575 .L258: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3519 .loc 4 373 1 is_stmt 0 view .LVU1053 - 3520 00aa 00E0 b .L250 - 3521 .L251: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3522 .loc 4 373 1 view .LVU1054 - 3523 .LBE433: - 3524 .LBE434: -3269:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3525 .loc 1 3269 20 is_stmt 1 discriminator 2 view .LVU1055 -3269:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3526 .loc 1 3269 25 is_stmt 0 discriminator 2 view .LVU1056 - 3527 00ac 0133 adds r3, r3, #1 - 3528 .LVL423: - 3529 .L250: -3269:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3530 .loc 1 3269 14 is_stmt 1 discriminator 1 view .LVU1057 - 3531 00ae B3F5FA7F cmp r3, #500 - 3532 00b2 FBD3 bcc .L251 -3271:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 3533 .loc 1 3271 3 view .LVU1058 - 3534 00b4 0122 movs r2, #1 - 3535 00b6 4FF48061 mov r1, #1024 - 3536 00ba 5548 ldr r0, .L275 - 3537 00bc FFF7FEFF bl HAL_GPIO_WritePin - 3538 .LVL424: -3272:Src/main.c **** } - 3539 .loc 1 3272 3 view .LVU1059 - 3540 .LBB435: - 3541 .LBI435: + 3576 .loc 4 373 1 view .LVU1069 + 3577 .LBE434: + 3578 .LBE435: +3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3579 .loc 1 3324 20 is_stmt 1 discriminator 2 view .LVU1070 +3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3580 .loc 1 3324 25 is_stmt 0 discriminator 2 view .LVU1071 + 3581 00ac 0133 adds r3, r3, #1 + 3582 .LVL425: + 3583 .L257: +3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3584 .loc 1 3324 14 is_stmt 1 discriminator 1 view .LVU1072 + 3585 00ae B3F5FA7F cmp r3, #500 + 3586 00b2 FBD3 bcc .L258 +3326:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 3587 .loc 1 3326 3 view .LVU1073 + 3588 00b4 0122 movs r2, #1 + 3589 00b6 4FF48061 mov r1, #1024 + 3590 00ba 5548 ldr r0, .L282 + 3591 00bc FFF7FEFF bl HAL_GPIO_WritePin + 3592 .LVL426: +3327:Src/main.c **** } + 3593 .loc 1 3327 3 view .LVU1074 + 3594 .LBB436: + 3595 .LBI436: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3542 .loc 4 1344 26 view .LVU1060 - 3543 .LBB436: + 3596 .loc 4 1344 26 view .LVU1075 + 3597 .LBB437: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3544 .loc 4 1346 3 view .LVU1061 + 3598 .loc 4 1346 3 view .LVU1076 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3545 .loc 4 1346 21 is_stmt 0 view .LVU1062 - 3546 00c0 554B ldr r3, .L275+8 - 3547 00c2 DD68 ldr r5, [r3, #12] + 3599 .loc 4 1346 21 is_stmt 0 view .LVU1077 + 3600 00c0 554B ldr r3, .L282+8 + 3601 00c2 DD68 ldr r5, [r3, #12] 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3548 .loc 4 1346 10 view .LVU1063 - 3549 00c4 ADB2 uxth r5, r5 - 3550 .LVL425: - 3551 .L239: + 3602 .loc 4 1346 10 view .LVU1078 + 3603 00c4 ADB2 uxth r5, r5 + 3604 .LVL427: + 3605 .L246: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3552 .loc 4 1346 10 view .LVU1064 - 3553 .LBE436: - 3554 .LBE435: -3344:Src/main.c **** } - 3555 .loc 1 3344 2 is_stmt 1 view .LVU1065 -3345:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time - 3556 .loc 1 3345 1 is_stmt 0 view .LVU1066 - 3557 00c6 2846 mov r0, r5 - ARM GAS /tmp/ccEQxcUB.s page 204 + 3606 .loc 4 1346 10 view .LVU1079 + 3607 .LBE437: + 3608 .LBE436: +3399:Src/main.c **** } + 3609 .loc 1 3399 2 is_stmt 1 view .LVU1080 +3400:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time + 3610 .loc 1 3400 1 is_stmt 0 view .LVU1081 + 3611 00c6 2846 mov r0, r5 + 3612 00c8 38BD pop {r3, r4, r5, pc} + 3613 .LVL428: + 3614 .L250: +3331:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); + 3615 .loc 1 3331 3 is_stmt 1 view .LVU1082 + 3616 00ca 524C ldr r4, .L282+4 + 3617 00cc 0122 movs r2, #1 + ARM GAS /tmp/ccuHnxNu.s page 206 - 3558 00c8 38BD pop {r3, r4, r5, pc} - 3559 .LVL426: - 3560 .L243: -3276:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); - 3561 .loc 1 3276 3 is_stmt 1 view .LVU1067 - 3562 00ca 524C ldr r4, .L275+4 - 3563 00cc 0122 movs r2, #1 - 3564 00ce 4FF48061 mov r1, #1024 - 3565 00d2 2046 mov r0, r4 - 3566 00d4 FFF7FEFF bl HAL_GPIO_WritePin - 3567 .LVL427: -3277:Src/main.c **** tmp32=0; - 3568 .loc 1 3277 3 view .LVU1068 - 3569 00d8 0022 movs r2, #0 - 3570 00da 4021 movs r1, #64 - 3571 00dc 2046 mov r0, r4 - 3572 00de FFF7FEFF bl HAL_GPIO_WritePin - 3573 .LVL428: -3278:Src/main.c **** while(tmp32<500){tmp32++;} - 3574 .loc 1 3278 3 view .LVU1069 -3279:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3575 .loc 1 3279 3 view .LVU1070 -3278:Src/main.c **** while(tmp32<500){tmp32++;} - 3576 .loc 1 3278 8 is_stmt 0 view .LVU1071 - 3577 00e2 0023 movs r3, #0 -3279:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3578 .loc 1 3279 8 view .LVU1072 - 3579 00e4 00E0 b .L252 - 3580 .LVL429: - 3581 .L253: -3279:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3582 .loc 1 3279 20 is_stmt 1 discriminator 2 view .LVU1073 -3279:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3583 .loc 1 3279 25 is_stmt 0 discriminator 2 view .LVU1074 - 3584 00e6 0133 adds r3, r3, #1 - 3585 .LVL430: - 3586 .L252: -3279:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3587 .loc 1 3279 14 is_stmt 1 discriminator 1 view .LVU1075 - 3588 00e8 B3F5FA7F cmp r3, #500 - 3589 00ec FBD3 bcc .L253 -3281:Src/main.c **** tmp32 = 0; - 3590 .loc 1 3281 3 view .LVU1076 - 3591 .LVL431: - 3592 .LBB437: - 3593 .LBI437: + 3618 00ce 4FF48061 mov r1, #1024 + 3619 00d2 2046 mov r0, r4 + 3620 00d4 FFF7FEFF bl HAL_GPIO_WritePin + 3621 .LVL429: +3332:Src/main.c **** tmp32=0; + 3622 .loc 1 3332 3 view .LVU1083 + 3623 00d8 0022 movs r2, #0 + 3624 00da 4021 movs r1, #64 + 3625 00dc 2046 mov r0, r4 + 3626 00de FFF7FEFF bl HAL_GPIO_WritePin + 3627 .LVL430: +3333:Src/main.c **** while(tmp32<500){tmp32++;} + 3628 .loc 1 3333 3 view .LVU1084 +3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3629 .loc 1 3334 3 view .LVU1085 +3333:Src/main.c **** while(tmp32<500){tmp32++;} + 3630 .loc 1 3333 8 is_stmt 0 view .LVU1086 + 3631 00e2 0023 movs r3, #0 +3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3632 .loc 1 3334 8 view .LVU1087 + 3633 00e4 00E0 b .L259 + 3634 .LVL431: + 3635 .L260: +3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3636 .loc 1 3334 20 is_stmt 1 discriminator 2 view .LVU1088 +3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3637 .loc 1 3334 25 is_stmt 0 discriminator 2 view .LVU1089 + 3638 00e6 0133 adds r3, r3, #1 + 3639 .LVL432: + 3640 .L259: +3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3641 .loc 1 3334 14 is_stmt 1 discriminator 1 view .LVU1090 + 3642 00e8 B3F5FA7F cmp r3, #500 + 3643 00ec FBD3 bcc .L260 +3336:Src/main.c **** tmp32 = 0; + 3644 .loc 1 3336 3 view .LVU1091 + 3645 .LVL433: + 3646 .LBB438: + 3647 .LBI438: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3594 .loc 4 358 22 view .LVU1077 - 3595 .LBB438: + 3648 .loc 4 358 22 view .LVU1092 + 3649 .LBB439: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3596 .loc 4 360 3 view .LVU1078 - 3597 00ee 4B4A ldr r2, .L275+12 - 3598 00f0 1368 ldr r3, [r2] - 3599 .LVL432: + 3650 .loc 4 360 3 view .LVU1093 + 3651 00ee 4B4A ldr r2, .L282+12 + 3652 00f0 1368 ldr r3, [r2] + 3653 .LVL434: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3600 .loc 4 360 3 is_stmt 0 view .LVU1079 - 3601 00f2 43F04003 orr r3, r3, #64 - ARM GAS /tmp/ccEQxcUB.s page 205 + 3654 .loc 4 360 3 is_stmt 0 view .LVU1094 + 3655 00f2 43F04003 orr r3, r3, #64 + 3656 00f6 1360 str r3, [r2] + 3657 .LVL435: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3658 .loc 4 360 3 view .LVU1095 + 3659 .LBE439: + 3660 .LBE438: +3337:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + ARM GAS /tmp/ccuHnxNu.s page 207 - 3602 00f6 1360 str r3, [r2] - 3603 .LVL433: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3604 .loc 4 360 3 view .LVU1080 - 3605 .LBE438: - 3606 .LBE437: -3282:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3607 .loc 1 3282 3 is_stmt 1 view .LVU1081 -3283:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3608 .loc 1 3283 3 view .LVU1082 -3282:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3609 .loc 1 3282 9 is_stmt 0 view .LVU1083 - 3610 00f8 0023 movs r3, #0 - 3611 .LVL434: - 3612 .L254: -3283:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3613 .loc 1 3283 43 is_stmt 1 discriminator 1 view .LVU1084 - 3614 .LBB439: - 3615 .LBI439: + 3661 .loc 1 3337 3 is_stmt 1 view .LVU1096 +3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3662 .loc 1 3338 3 view .LVU1097 +3337:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3663 .loc 1 3337 9 is_stmt 0 view .LVU1098 + 3664 00f8 0023 movs r3, #0 + 3665 .LVL436: + 3666 .L261: +3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3667 .loc 1 3338 43 is_stmt 1 discriminator 1 view .LVU1099 + 3668 .LBB440: + 3669 .LBI440: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3616 .loc 4 905 26 view .LVU1085 - 3617 .LBB440: + 3670 .loc 4 905 26 view .LVU1100 + 3671 .LBB441: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3618 .loc 4 907 3 view .LVU1086 + 3672 .loc 4 907 3 view .LVU1101 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3619 .loc 4 907 12 is_stmt 0 view .LVU1087 - 3620 00fa 484A ldr r2, .L275+12 - 3621 00fc 9268 ldr r2, [r2, #8] + 3673 .loc 4 907 12 is_stmt 0 view .LVU1102 + 3674 00fa 484A ldr r2, .L282+12 + 3675 00fc 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3622 .loc 4 907 68 view .LVU1088 - 3623 00fe 12F0010F tst r2, #1 - 3624 0102 04D1 bne .L255 - 3625 .LVL435: + 3676 .loc 4 907 68 view .LVU1103 + 3677 00fe 12F0010F tst r2, #1 + 3678 0102 04D1 bne .L262 + 3679 .LVL437: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3626 .loc 4 907 68 view .LVU1089 - 3627 .LBE440: - 3628 .LBE439: -3283:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3629 .loc 1 3283 43 discriminator 2 view .LVU1090 - 3630 0104 B3F57A7F cmp r3, #1000 - 3631 0108 01D8 bhi .L255 -3283:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3632 .loc 1 3283 62 is_stmt 1 discriminator 3 view .LVU1091 -3283:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3633 .loc 1 3283 67 is_stmt 0 discriminator 3 view .LVU1092 - 3634 010a 0133 adds r3, r3, #1 - 3635 .LVL436: -3283:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3636 .loc 1 3283 67 discriminator 3 view .LVU1093 - 3637 010c F5E7 b .L254 - 3638 .L255: -3284:Src/main.c **** while(tmp32<500){tmp32++;} - 3639 .loc 1 3284 3 is_stmt 1 view .LVU1094 - 3640 .LVL437: - 3641 .LBB441: - 3642 .LBI441: + 3680 .loc 4 907 68 view .LVU1104 + 3681 .LBE441: + 3682 .LBE440: +3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3683 .loc 1 3338 43 discriminator 2 view .LVU1105 + 3684 0104 B3F57A7F cmp r3, #1000 + 3685 0108 01D8 bhi .L262 +3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3686 .loc 1 3338 62 is_stmt 1 discriminator 3 view .LVU1106 +3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3687 .loc 1 3338 67 is_stmt 0 discriminator 3 view .LVU1107 + 3688 010a 0133 adds r3, r3, #1 + 3689 .LVL438: +3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3690 .loc 1 3338 67 discriminator 3 view .LVU1108 + 3691 010c F5E7 b .L261 + 3692 .L262: +3339:Src/main.c **** while(tmp32<500){tmp32++;} + 3693 .loc 1 3339 3 is_stmt 1 view .LVU1109 + 3694 .LVL439: + 3695 .LBB442: + 3696 .LBI442: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccEQxcUB.s page 206 + 3697 .loc 4 370 22 view .LVU1110 + 3698 .LBB443: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3699 .loc 4 372 3 view .LVU1111 + 3700 010e 4349 ldr r1, .L282+12 + 3701 0110 0A68 ldr r2, [r1] + 3702 0112 22F04002 bic r2, r2, #64 + ARM GAS /tmp/ccuHnxNu.s page 208 - 3643 .loc 4 370 22 view .LVU1095 - 3644 .LBB442: + 3703 0116 0A60 str r2, [r1] + 3704 .LVL440: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3645 .loc 4 372 3 view .LVU1096 - 3646 010e 4349 ldr r1, .L275+12 - 3647 0110 0A68 ldr r2, [r1] - 3648 0112 22F04002 bic r2, r2, #64 - 3649 0116 0A60 str r2, [r1] - 3650 .LVL438: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3651 .loc 4 372 3 is_stmt 0 view .LVU1097 - 3652 .LBE442: - 3653 .LBE441: -3285:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3654 .loc 1 3285 3 is_stmt 1 view .LVU1098 - 3655 .LBB444: - 3656 .LBB443: + 3705 .loc 4 372 3 is_stmt 0 view .LVU1112 + 3706 .LBE443: + 3707 .LBE442: +3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3708 .loc 1 3340 3 is_stmt 1 view .LVU1113 + 3709 .LBB445: + 3710 .LBB444: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3657 .loc 4 373 1 is_stmt 0 view .LVU1099 - 3658 0118 00E0 b .L257 - 3659 .L258: + 3711 .loc 4 373 1 is_stmt 0 view .LVU1114 + 3712 0118 00E0 b .L264 + 3713 .L265: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3660 .loc 4 373 1 view .LVU1100 - 3661 .LBE443: - 3662 .LBE444: -3285:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3663 .loc 1 3285 20 is_stmt 1 discriminator 2 view .LVU1101 -3285:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3664 .loc 1 3285 25 is_stmt 0 discriminator 2 view .LVU1102 - 3665 011a 0133 adds r3, r3, #1 - 3666 .LVL439: - 3667 .L257: -3285:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3668 .loc 1 3285 14 is_stmt 1 discriminator 1 view .LVU1103 - 3669 011c B3F5FA7F cmp r3, #500 - 3670 0120 FBD3 bcc .L258 -3287:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 3671 .loc 1 3287 3 view .LVU1104 - 3672 0122 0122 movs r2, #1 - 3673 0124 4021 movs r1, #64 - 3674 0126 3B48 ldr r0, .L275+4 - 3675 0128 FFF7FEFF bl HAL_GPIO_WritePin - 3676 .LVL440: -3288:Src/main.c **** } - 3677 .loc 1 3288 3 view .LVU1105 - 3678 .LBB445: - 3679 .LBI445: + 3714 .loc 4 373 1 view .LVU1115 + 3715 .LBE444: + 3716 .LBE445: +3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3717 .loc 1 3340 20 is_stmt 1 discriminator 2 view .LVU1116 +3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3718 .loc 1 3340 25 is_stmt 0 discriminator 2 view .LVU1117 + 3719 011a 0133 adds r3, r3, #1 + 3720 .LVL441: + 3721 .L264: +3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3722 .loc 1 3340 14 is_stmt 1 discriminator 1 view .LVU1118 + 3723 011c B3F5FA7F cmp r3, #500 + 3724 0120 FBD3 bcc .L265 +3342:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 3725 .loc 1 3342 3 view .LVU1119 + 3726 0122 0122 movs r2, #1 + 3727 0124 4021 movs r1, #64 + 3728 0126 3B48 ldr r0, .L282+4 + 3729 0128 FFF7FEFF bl HAL_GPIO_WritePin + 3730 .LVL442: +3343:Src/main.c **** } + 3731 .loc 1 3343 3 view .LVU1120 + 3732 .LBB446: + 3733 .LBI446: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3680 .loc 4 1344 26 view .LVU1106 - 3681 .LBB446: + 3734 .loc 4 1344 26 view .LVU1121 + 3735 .LBB447: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3682 .loc 4 1346 3 view .LVU1107 + 3736 .loc 4 1346 3 view .LVU1122 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3683 .loc 4 1346 21 is_stmt 0 view .LVU1108 - 3684 012c 3B4B ldr r3, .L275+12 - 3685 012e DD68 ldr r5, [r3, #12] + 3737 .loc 4 1346 21 is_stmt 0 view .LVU1123 + 3738 012c 3B4B ldr r3, .L282+12 + 3739 012e DD68 ldr r5, [r3, #12] 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccEQxcUB.s page 207 + 3740 .loc 4 1346 10 view .LVU1124 + 3741 0130 ADB2 uxth r5, r5 + 3742 .LVL443: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3743 .loc 4 1346 10 view .LVU1125 + 3744 .LBE447: + 3745 .LBE446: + ARM GAS /tmp/ccuHnxNu.s page 209 - 3686 .loc 4 1346 10 view .LVU1109 - 3687 0130 ADB2 uxth r5, r5 - 3688 .LVL441: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3689 .loc 4 1346 10 view .LVU1110 - 3690 .LBE446: - 3691 .LBE445: - 3692 0132 C8E7 b .L239 - 3693 .LVL442: - 3694 .L242: -3292:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); - 3695 .loc 1 3292 3 is_stmt 1 view .LVU1111 - 3696 0134 364C ldr r4, .L275 - 3697 0136 0122 movs r2, #1 - 3698 0138 4FF48061 mov r1, #1024 - 3699 013c 2046 mov r0, r4 - 3700 013e FFF7FEFF bl HAL_GPIO_WritePin - 3701 .LVL443: -3293:Src/main.c **** tmp32=0; - 3702 .loc 1 3293 3 view .LVU1112 - 3703 0142 0022 movs r2, #0 - 3704 0144 4FF40061 mov r1, #2048 - 3705 0148 2046 mov r0, r4 - 3706 014a FFF7FEFF bl HAL_GPIO_WritePin - 3707 .LVL444: -3294:Src/main.c **** while(tmp32<500){tmp32++;} - 3708 .loc 1 3294 3 view .LVU1113 -3295:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3709 .loc 1 3295 3 view .LVU1114 -3294:Src/main.c **** while(tmp32<500){tmp32++;} - 3710 .loc 1 3294 8 is_stmt 0 view .LVU1115 - 3711 014e 0023 movs r3, #0 -3295:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3712 .loc 1 3295 8 view .LVU1116 - 3713 0150 00E0 b .L259 - 3714 .LVL445: - 3715 .L260: -3295:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3716 .loc 1 3295 20 is_stmt 1 discriminator 2 view .LVU1117 -3295:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3717 .loc 1 3295 25 is_stmt 0 discriminator 2 view .LVU1118 - 3718 0152 0133 adds r3, r3, #1 - 3719 .LVL446: - 3720 .L259: -3295:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3721 .loc 1 3295 14 is_stmt 1 discriminator 1 view .LVU1119 - 3722 0154 B3F5FA7F cmp r3, #500 - 3723 0158 FBD3 bcc .L260 -3297:Src/main.c **** tmp32 = 0; - 3724 .loc 1 3297 3 view .LVU1120 - 3725 .LVL447: - 3726 .LBB447: - 3727 .LBI447: + 3746 0132 C8E7 b .L246 + 3747 .LVL444: + 3748 .L249: +3347:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); + 3749 .loc 1 3347 3 is_stmt 1 view .LVU1126 + 3750 0134 364C ldr r4, .L282 + 3751 0136 0122 movs r2, #1 + 3752 0138 4FF48061 mov r1, #1024 + 3753 013c 2046 mov r0, r4 + 3754 013e FFF7FEFF bl HAL_GPIO_WritePin + 3755 .LVL445: +3348:Src/main.c **** tmp32=0; + 3756 .loc 1 3348 3 view .LVU1127 + 3757 0142 0022 movs r2, #0 + 3758 0144 4FF40061 mov r1, #2048 + 3759 0148 2046 mov r0, r4 + 3760 014a FFF7FEFF bl HAL_GPIO_WritePin + 3761 .LVL446: +3349:Src/main.c **** while(tmp32<500){tmp32++;} + 3762 .loc 1 3349 3 view .LVU1128 +3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3763 .loc 1 3350 3 view .LVU1129 +3349:Src/main.c **** while(tmp32<500){tmp32++;} + 3764 .loc 1 3349 8 is_stmt 0 view .LVU1130 + 3765 014e 0023 movs r3, #0 +3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3766 .loc 1 3350 8 view .LVU1131 + 3767 0150 00E0 b .L266 + 3768 .LVL447: + 3769 .L267: +3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3770 .loc 1 3350 20 is_stmt 1 discriminator 2 view .LVU1132 +3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3771 .loc 1 3350 25 is_stmt 0 discriminator 2 view .LVU1133 + 3772 0152 0133 adds r3, r3, #1 + 3773 .LVL448: + 3774 .L266: +3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3775 .loc 1 3350 14 is_stmt 1 discriminator 1 view .LVU1134 + 3776 0154 B3F5FA7F cmp r3, #500 + 3777 0158 FBD3 bcc .L267 +3352:Src/main.c **** tmp32 = 0; + 3778 .loc 1 3352 3 view .LVU1135 + 3779 .LVL449: + 3780 .LBB448: + 3781 .LBI448: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3728 .loc 4 358 22 view .LVU1121 - 3729 .LBB448: + 3782 .loc 4 358 22 view .LVU1136 + 3783 .LBB449: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccEQxcUB.s page 208 + 3784 .loc 4 360 3 view .LVU1137 + 3785 015a 2F4A ldr r2, .L282+8 + 3786 015c 1368 ldr r3, [r2] + 3787 .LVL450: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3788 .loc 4 360 3 is_stmt 0 view .LVU1138 + 3789 015e 43F04003 orr r3, r3, #64 + ARM GAS /tmp/ccuHnxNu.s page 210 - 3730 .loc 4 360 3 view .LVU1122 - 3731 015a 2F4A ldr r2, .L275+8 - 3732 015c 1368 ldr r3, [r2] - 3733 .LVL448: + 3790 0162 1360 str r3, [r2] + 3791 .LVL451: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3734 .loc 4 360 3 is_stmt 0 view .LVU1123 - 3735 015e 43F04003 orr r3, r3, #64 - 3736 0162 1360 str r3, [r2] - 3737 .LVL449: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3738 .loc 4 360 3 view .LVU1124 - 3739 .LBE448: - 3740 .LBE447: -3298:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3741 .loc 1 3298 3 is_stmt 1 view .LVU1125 -3299:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3742 .loc 1 3299 3 view .LVU1126 -3298:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3743 .loc 1 3298 9 is_stmt 0 view .LVU1127 - 3744 0164 0023 movs r3, #0 - 3745 .LVL450: - 3746 .L261: -3299:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3747 .loc 1 3299 43 is_stmt 1 discriminator 1 view .LVU1128 - 3748 .LBB449: - 3749 .LBI449: + 3792 .loc 4 360 3 view .LVU1139 + 3793 .LBE449: + 3794 .LBE448: +3353:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3795 .loc 1 3353 3 is_stmt 1 view .LVU1140 +3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3796 .loc 1 3354 3 view .LVU1141 +3353:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3797 .loc 1 3353 9 is_stmt 0 view .LVU1142 + 3798 0164 0023 movs r3, #0 + 3799 .LVL452: + 3800 .L268: +3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3801 .loc 1 3354 43 is_stmt 1 discriminator 1 view .LVU1143 + 3802 .LBB450: + 3803 .LBI450: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3750 .loc 4 905 26 view .LVU1129 - 3751 .LBB450: + 3804 .loc 4 905 26 view .LVU1144 + 3805 .LBB451: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3752 .loc 4 907 3 view .LVU1130 + 3806 .loc 4 907 3 view .LVU1145 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3753 .loc 4 907 12 is_stmt 0 view .LVU1131 - 3754 0166 2C4A ldr r2, .L275+8 - 3755 0168 9268 ldr r2, [r2, #8] + 3807 .loc 4 907 12 is_stmt 0 view .LVU1146 + 3808 0166 2C4A ldr r2, .L282+8 + 3809 0168 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3756 .loc 4 907 68 view .LVU1132 - 3757 016a 12F0010F tst r2, #1 - 3758 016e 04D1 bne .L262 - 3759 .LVL451: + 3810 .loc 4 907 68 view .LVU1147 + 3811 016a 12F0010F tst r2, #1 + 3812 016e 04D1 bne .L269 + 3813 .LVL453: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3760 .loc 4 907 68 view .LVU1133 - 3761 .LBE450: - 3762 .LBE449: -3299:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3763 .loc 1 3299 43 discriminator 2 view .LVU1134 - 3764 0170 B3F57A7F cmp r3, #1000 - 3765 0174 01D8 bhi .L262 -3299:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3766 .loc 1 3299 62 is_stmt 1 discriminator 3 view .LVU1135 -3299:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3767 .loc 1 3299 67 is_stmt 0 discriminator 3 view .LVU1136 - 3768 0176 0133 adds r3, r3, #1 - 3769 .LVL452: -3299:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3770 .loc 1 3299 67 discriminator 3 view .LVU1137 - 3771 0178 F5E7 b .L261 - ARM GAS /tmp/ccEQxcUB.s page 209 - - - 3772 .L262: -3300:Src/main.c **** while(tmp32<500){tmp32++;} - 3773 .loc 1 3300 3 is_stmt 1 view .LVU1138 - 3774 .LVL453: - 3775 .LBB451: - 3776 .LBI451: + 3814 .loc 4 907 68 view .LVU1148 + 3815 .LBE451: + 3816 .LBE450: +3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3817 .loc 1 3354 43 discriminator 2 view .LVU1149 + 3818 0170 B3F57A7F cmp r3, #1000 + 3819 0174 01D8 bhi .L269 +3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3820 .loc 1 3354 62 is_stmt 1 discriminator 3 view .LVU1150 +3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3821 .loc 1 3354 67 is_stmt 0 discriminator 3 view .LVU1151 + 3822 0176 0133 adds r3, r3, #1 + 3823 .LVL454: +3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3824 .loc 1 3354 67 discriminator 3 view .LVU1152 + 3825 0178 F5E7 b .L268 + 3826 .L269: +3355:Src/main.c **** while(tmp32<500){tmp32++;} + 3827 .loc 1 3355 3 is_stmt 1 view .LVU1153 + 3828 .LVL455: + 3829 .LBB452: + 3830 .LBI452: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3777 .loc 4 370 22 view .LVU1139 - 3778 .LBB452: + ARM GAS /tmp/ccuHnxNu.s page 211 + + + 3831 .loc 4 370 22 view .LVU1154 + 3832 .LBB453: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3779 .loc 4 372 3 view .LVU1140 - 3780 017a 2749 ldr r1, .L275+8 - 3781 017c 0A68 ldr r2, [r1] - 3782 017e 22F04002 bic r2, r2, #64 - 3783 0182 0A60 str r2, [r1] - 3784 .LVL454: + 3833 .loc 4 372 3 view .LVU1155 + 3834 017a 2749 ldr r1, .L282+8 + 3835 017c 0A68 ldr r2, [r1] + 3836 017e 22F04002 bic r2, r2, #64 + 3837 0182 0A60 str r2, [r1] + 3838 .LVL456: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3785 .loc 4 372 3 is_stmt 0 view .LVU1141 - 3786 .LBE452: - 3787 .LBE451: -3301:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3788 .loc 1 3301 3 is_stmt 1 view .LVU1142 - 3789 .LBB454: - 3790 .LBB453: + 3839 .loc 4 372 3 is_stmt 0 view .LVU1156 + 3840 .LBE453: + 3841 .LBE452: +3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3842 .loc 1 3356 3 is_stmt 1 view .LVU1157 + 3843 .LBB455: + 3844 .LBB454: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3791 .loc 4 373 1 is_stmt 0 view .LVU1143 - 3792 0184 00E0 b .L264 - 3793 .L265: + 3845 .loc 4 373 1 is_stmt 0 view .LVU1158 + 3846 0184 00E0 b .L271 + 3847 .L272: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3794 .loc 4 373 1 view .LVU1144 - 3795 .LBE453: - 3796 .LBE454: -3301:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3797 .loc 1 3301 20 is_stmt 1 discriminator 2 view .LVU1145 -3301:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3798 .loc 1 3301 25 is_stmt 0 discriminator 2 view .LVU1146 - 3799 0186 0133 adds r3, r3, #1 - 3800 .LVL455: - 3801 .L264: -3301:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3802 .loc 1 3301 14 is_stmt 1 discriminator 1 view .LVU1147 - 3803 0188 B3F5FA7F cmp r3, #500 - 3804 018c FBD3 bcc .L265 -3303:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 3805 .loc 1 3303 3 view .LVU1148 - 3806 018e 0122 movs r2, #1 - 3807 0190 4FF40061 mov r1, #2048 - 3808 0194 1E48 ldr r0, .L275 - 3809 0196 FFF7FEFF bl HAL_GPIO_WritePin - 3810 .LVL456: -3304:Src/main.c **** } - 3811 .loc 1 3304 3 view .LVU1149 - 3812 .LBB455: - 3813 .LBI455: + 3848 .loc 4 373 1 view .LVU1159 + 3849 .LBE454: + 3850 .LBE455: +3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3851 .loc 1 3356 20 is_stmt 1 discriminator 2 view .LVU1160 +3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3852 .loc 1 3356 25 is_stmt 0 discriminator 2 view .LVU1161 + 3853 0186 0133 adds r3, r3, #1 + 3854 .LVL457: + 3855 .L271: +3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3856 .loc 1 3356 14 is_stmt 1 discriminator 1 view .LVU1162 + 3857 0188 B3F5FA7F cmp r3, #500 + 3858 018c FBD3 bcc .L272 +3358:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 3859 .loc 1 3358 3 view .LVU1163 + 3860 018e 0122 movs r2, #1 + 3861 0190 4FF40061 mov r1, #2048 + 3862 0194 1E48 ldr r0, .L282 + 3863 0196 FFF7FEFF bl HAL_GPIO_WritePin + 3864 .LVL458: +3359:Src/main.c **** } + 3865 .loc 1 3359 3 view .LVU1164 + 3866 .LBB456: + 3867 .LBI456: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3814 .loc 4 1344 26 view .LVU1150 - 3815 .LBB456: - ARM GAS /tmp/ccEQxcUB.s page 210 + 3868 .loc 4 1344 26 view .LVU1165 + 3869 .LBB457: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3870 .loc 4 1346 3 view .LVU1166 +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3871 .loc 4 1346 21 is_stmt 0 view .LVU1167 + 3872 019a 1F4B ldr r3, .L282+8 + 3873 019c DD68 ldr r5, [r3, #12] +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccuHnxNu.s page 212 + 3874 .loc 4 1346 10 view .LVU1168 + 3875 019e ADB2 uxth r5, r5 + 3876 .LVL459: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3816 .loc 4 1346 3 view .LVU1151 -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3817 .loc 4 1346 21 is_stmt 0 view .LVU1152 - 3818 019a 1F4B ldr r3, .L275+8 - 3819 019c DD68 ldr r5, [r3, #12] -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3820 .loc 4 1346 10 view .LVU1153 - 3821 019e ADB2 uxth r5, r5 - 3822 .LVL457: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3823 .loc 4 1346 10 view .LVU1154 - 3824 .LBE456: - 3825 .LBE455: - 3826 01a0 91E7 b .L239 - 3827 .LVL458: - 3828 .L240: -3308:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); - 3829 .loc 1 3308 3 is_stmt 1 view .LVU1155 - 3830 01a2 1C4C ldr r4, .L275+4 - 3831 01a4 0122 movs r2, #1 - 3832 01a6 4021 movs r1, #64 - 3833 01a8 2046 mov r0, r4 - 3834 01aa FFF7FEFF bl HAL_GPIO_WritePin - 3835 .LVL459: -3309:Src/main.c **** tmp32=0; - 3836 .loc 1 3309 3 view .LVU1156 - 3837 01ae 0022 movs r2, #0 - 3838 01b0 4FF48061 mov r1, #1024 - 3839 01b4 2046 mov r0, r4 - 3840 01b6 FFF7FEFF bl HAL_GPIO_WritePin - 3841 .LVL460: -3310:Src/main.c **** while(tmp32<500){tmp32++;} - 3842 .loc 1 3310 3 view .LVU1157 -3311:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3843 .loc 1 3311 3 view .LVU1158 -3310:Src/main.c **** while(tmp32<500){tmp32++;} - 3844 .loc 1 3310 8 is_stmt 0 view .LVU1159 - 3845 01ba 0023 movs r3, #0 -3311:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3846 .loc 1 3311 8 view .LVU1160 - 3847 01bc 00E0 b .L266 - 3848 .LVL461: - 3849 .L267: -3311:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3850 .loc 1 3311 20 is_stmt 1 discriminator 2 view .LVU1161 -3311:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3851 .loc 1 3311 25 is_stmt 0 discriminator 2 view .LVU1162 - 3852 01be 0133 adds r3, r3, #1 - 3853 .LVL462: - 3854 .L266: -3311:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3855 .loc 1 3311 14 is_stmt 1 discriminator 1 view .LVU1163 - 3856 01c0 B3F5FA7F cmp r3, #500 - 3857 01c4 FBD3 bcc .L267 -3313:Src/main.c **** tmp32 = 0; - 3858 .loc 1 3313 3 view .LVU1164 - ARM GAS /tmp/ccEQxcUB.s page 211 - - - 3859 .LVL463: - 3860 .LBB457: - 3861 .LBI457: + 3877 .loc 4 1346 10 view .LVU1169 + 3878 .LBE457: + 3879 .LBE456: + 3880 01a0 91E7 b .L246 + 3881 .LVL460: + 3882 .L247: +3363:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); + 3883 .loc 1 3363 3 is_stmt 1 view .LVU1170 + 3884 01a2 1C4C ldr r4, .L282+4 + 3885 01a4 0122 movs r2, #1 + 3886 01a6 4021 movs r1, #64 + 3887 01a8 2046 mov r0, r4 + 3888 01aa FFF7FEFF bl HAL_GPIO_WritePin + 3889 .LVL461: +3364:Src/main.c **** tmp32=0; + 3890 .loc 1 3364 3 view .LVU1171 + 3891 01ae 0022 movs r2, #0 + 3892 01b0 4FF48061 mov r1, #1024 + 3893 01b4 2046 mov r0, r4 + 3894 01b6 FFF7FEFF bl HAL_GPIO_WritePin + 3895 .LVL462: +3365:Src/main.c **** while(tmp32<500){tmp32++;} + 3896 .loc 1 3365 3 view .LVU1172 +3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3897 .loc 1 3366 3 view .LVU1173 +3365:Src/main.c **** while(tmp32<500){tmp32++;} + 3898 .loc 1 3365 8 is_stmt 0 view .LVU1174 + 3899 01ba 0023 movs r3, #0 +3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3900 .loc 1 3366 8 view .LVU1175 + 3901 01bc 00E0 b .L273 + 3902 .LVL463: + 3903 .L274: +3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3904 .loc 1 3366 20 is_stmt 1 discriminator 2 view .LVU1176 +3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3905 .loc 1 3366 25 is_stmt 0 discriminator 2 view .LVU1177 + 3906 01be 0133 adds r3, r3, #1 + 3907 .LVL464: + 3908 .L273: +3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3909 .loc 1 3366 14 is_stmt 1 discriminator 1 view .LVU1178 + 3910 01c0 B3F5FA7F cmp r3, #500 + 3911 01c4 FBD3 bcc .L274 +3368:Src/main.c **** tmp32 = 0; + 3912 .loc 1 3368 3 view .LVU1179 + 3913 .LVL465: + 3914 .LBB458: + 3915 .LBI458: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3862 .loc 4 358 22 view .LVU1165 - 3863 .LBB458: + 3916 .loc 4 358 22 view .LVU1180 + 3917 .LBB459: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3864 .loc 4 360 3 view .LVU1166 - 3865 01c6 154A ldr r2, .L275+12 - 3866 01c8 1368 ldr r3, [r2] - 3867 .LVL464: + ARM GAS /tmp/ccuHnxNu.s page 213 + + + 3918 .loc 4 360 3 view .LVU1181 + 3919 01c6 154A ldr r2, .L282+12 + 3920 01c8 1368 ldr r3, [r2] + 3921 .LVL466: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3868 .loc 4 360 3 is_stmt 0 view .LVU1167 - 3869 01ca 43F04003 orr r3, r3, #64 - 3870 01ce 1360 str r3, [r2] - 3871 .LVL465: + 3922 .loc 4 360 3 is_stmt 0 view .LVU1182 + 3923 01ca 43F04003 orr r3, r3, #64 + 3924 01ce 1360 str r3, [r2] + 3925 .LVL467: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3872 .loc 4 360 3 view .LVU1168 - 3873 .LBE458: - 3874 .LBE457: -3314:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3875 .loc 1 3314 3 is_stmt 1 view .LVU1169 -3315:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3876 .loc 1 3315 3 view .LVU1170 -3314:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3877 .loc 1 3314 9 is_stmt 0 view .LVU1171 - 3878 01d0 0023 movs r3, #0 - 3879 .LVL466: - 3880 .L268: -3315:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3881 .loc 1 3315 43 is_stmt 1 discriminator 1 view .LVU1172 - 3882 .LBB459: - 3883 .LBI459: + 3926 .loc 4 360 3 view .LVU1183 + 3927 .LBE459: + 3928 .LBE458: +3369:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3929 .loc 1 3369 3 is_stmt 1 view .LVU1184 +3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3930 .loc 1 3370 3 view .LVU1185 +3369:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3931 .loc 1 3369 9 is_stmt 0 view .LVU1186 + 3932 01d0 0023 movs r3, #0 + 3933 .LVL468: + 3934 .L275: +3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3935 .loc 1 3370 43 is_stmt 1 discriminator 1 view .LVU1187 + 3936 .LBB460: + 3937 .LBI460: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3884 .loc 4 905 26 view .LVU1173 - 3885 .LBB460: + 3938 .loc 4 905 26 view .LVU1188 + 3939 .LBB461: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3886 .loc 4 907 3 view .LVU1174 + 3940 .loc 4 907 3 view .LVU1189 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3887 .loc 4 907 12 is_stmt 0 view .LVU1175 - 3888 01d2 124A ldr r2, .L275+12 - 3889 01d4 9268 ldr r2, [r2, #8] + 3941 .loc 4 907 12 is_stmt 0 view .LVU1190 + 3942 01d2 124A ldr r2, .L282+12 + 3943 01d4 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3890 .loc 4 907 68 view .LVU1176 - 3891 01d6 12F0010F tst r2, #1 - 3892 01da 04D1 bne .L269 - 3893 .LVL467: + 3944 .loc 4 907 68 view .LVU1191 + 3945 01d6 12F0010F tst r2, #1 + 3946 01da 04D1 bne .L276 + 3947 .LVL469: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3894 .loc 4 907 68 view .LVU1177 - 3895 .LBE460: - 3896 .LBE459: -3315:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3897 .loc 1 3315 43 discriminator 2 view .LVU1178 - 3898 01dc B3F57A7F cmp r3, #1000 - 3899 01e0 01D8 bhi .L269 -3315:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3900 .loc 1 3315 62 is_stmt 1 discriminator 3 view .LVU1179 - ARM GAS /tmp/ccEQxcUB.s page 212 + 3948 .loc 4 907 68 view .LVU1192 + 3949 .LBE461: + 3950 .LBE460: +3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3951 .loc 1 3370 43 discriminator 2 view .LVU1193 + 3952 01dc B3F57A7F cmp r3, #1000 + 3953 01e0 01D8 bhi .L276 +3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3954 .loc 1 3370 62 is_stmt 1 discriminator 3 view .LVU1194 +3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3955 .loc 1 3370 67 is_stmt 0 discriminator 3 view .LVU1195 + 3956 01e2 0133 adds r3, r3, #1 + 3957 .LVL470: +3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3958 .loc 1 3370 67 discriminator 3 view .LVU1196 + 3959 01e4 F5E7 b .L275 + ARM GAS /tmp/ccuHnxNu.s page 214 -3315:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3901 .loc 1 3315 67 is_stmt 0 discriminator 3 view .LVU1180 - 3902 01e2 0133 adds r3, r3, #1 - 3903 .LVL468: -3315:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3904 .loc 1 3315 67 discriminator 3 view .LVU1181 - 3905 01e4 F5E7 b .L268 - 3906 .L269: -3316:Src/main.c **** while(tmp32<500){tmp32++;} - 3907 .loc 1 3316 3 is_stmt 1 view .LVU1182 - 3908 .LVL469: - 3909 .LBB461: - 3910 .LBI461: + 3960 .L276: +3371:Src/main.c **** while(tmp32<500){tmp32++;} + 3961 .loc 1 3371 3 is_stmt 1 view .LVU1197 + 3962 .LVL471: + 3963 .LBB462: + 3964 .LBI462: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3911 .loc 4 370 22 view .LVU1183 - 3912 .LBB462: + 3965 .loc 4 370 22 view .LVU1198 + 3966 .LBB463: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3913 .loc 4 372 3 view .LVU1184 - 3914 01e6 0D49 ldr r1, .L275+12 - 3915 01e8 0A68 ldr r2, [r1] - 3916 01ea 22F04002 bic r2, r2, #64 - 3917 01ee 0A60 str r2, [r1] - 3918 .LVL470: + 3967 .loc 4 372 3 view .LVU1199 + 3968 01e6 0D49 ldr r1, .L282+12 + 3969 01e8 0A68 ldr r2, [r1] + 3970 01ea 22F04002 bic r2, r2, #64 + 3971 01ee 0A60 str r2, [r1] + 3972 .LVL472: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3919 .loc 4 372 3 is_stmt 0 view .LVU1185 - 3920 .LBE462: - 3921 .LBE461: -3317:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3922 .loc 1 3317 3 is_stmt 1 view .LVU1186 - 3923 .LBB464: - 3924 .LBB463: + 3973 .loc 4 372 3 is_stmt 0 view .LVU1200 + 3974 .LBE463: + 3975 .LBE462: +3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3976 .loc 1 3372 3 is_stmt 1 view .LVU1201 + 3977 .LBB465: + 3978 .LBB464: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3925 .loc 4 373 1 is_stmt 0 view .LVU1187 - 3926 01f0 00E0 b .L271 - 3927 .L272: + 3979 .loc 4 373 1 is_stmt 0 view .LVU1202 + 3980 01f0 00E0 b .L278 + 3981 .L279: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3928 .loc 4 373 1 view .LVU1188 - 3929 .LBE463: - 3930 .LBE464: -3317:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3931 .loc 1 3317 20 is_stmt 1 discriminator 2 view .LVU1189 -3317:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3932 .loc 1 3317 25 is_stmt 0 discriminator 2 view .LVU1190 - 3933 01f2 0133 adds r3, r3, #1 - 3934 .LVL471: - 3935 .L271: -3317:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3936 .loc 1 3317 14 is_stmt 1 discriminator 1 view .LVU1191 - 3937 01f4 B3F5FA7F cmp r3, #500 - 3938 01f8 FBD3 bcc .L272 -3319:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 3939 .loc 1 3319 3 view .LVU1192 - 3940 01fa 0122 movs r2, #1 - 3941 01fc 4FF48061 mov r1, #1024 - 3942 0200 0448 ldr r0, .L275+4 - 3943 0202 FFF7FEFF bl HAL_GPIO_WritePin - 3944 .LVL472: - ARM GAS /tmp/ccEQxcUB.s page 213 - - -3320:Src/main.c **** } - 3945 .loc 1 3320 3 view .LVU1193 - 3946 .LBB465: - 3947 .LBI465: + 3982 .loc 4 373 1 view .LVU1203 + 3983 .LBE464: + 3984 .LBE465: +3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3985 .loc 1 3372 20 is_stmt 1 discriminator 2 view .LVU1204 +3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3986 .loc 1 3372 25 is_stmt 0 discriminator 2 view .LVU1205 + 3987 01f2 0133 adds r3, r3, #1 + 3988 .LVL473: + 3989 .L278: +3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3990 .loc 1 3372 14 is_stmt 1 discriminator 1 view .LVU1206 + 3991 01f4 B3F5FA7F cmp r3, #500 + 3992 01f8 FBD3 bcc .L279 +3374:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 3993 .loc 1 3374 3 view .LVU1207 + 3994 01fa 0122 movs r2, #1 + 3995 01fc 4FF48061 mov r1, #1024 + 3996 0200 0448 ldr r0, .L282+4 + 3997 0202 FFF7FEFF bl HAL_GPIO_WritePin + 3998 .LVL474: +3375:Src/main.c **** } + 3999 .loc 1 3375 3 view .LVU1208 + 4000 .LBB466: + 4001 .LBI466: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3948 .loc 4 1344 26 view .LVU1194 - 3949 .LBB466: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3950 .loc 4 1346 3 view .LVU1195 -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3951 .loc 4 1346 21 is_stmt 0 view .LVU1196 - 3952 0206 054B ldr r3, .L275+12 - 3953 0208 DD68 ldr r5, [r3, #12] -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3954 .loc 4 1346 10 view .LVU1197 - 3955 020a ADB2 uxth r5, r5 - 3956 .LVL473: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3957 .loc 4 1346 10 view .LVU1198 - 3958 020c 5BE7 b .L239 - 3959 .L276: - 3960 020e 00BF .align 2 - 3961 .L275: - 3962 0210 00100240 .word 1073876992 - 3963 0214 00140240 .word 1073878016 - 3964 0218 00340140 .word 1073820672 - 3965 021c 00500140 .word 1073827840 - 3966 .LBE466: - 3967 .LBE465: - 3968 .cfi_endproc - 3969 .LFE1226: - 3971 .section .text.Stop_TIM10,"ax",%progbits - 3972 .align 1 - 3973 .syntax unified - 3974 .thumb - 3975 .thumb_func - 3977 Stop_TIM10: - 3978 .LFB1237: -3485:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) -3486:Src/main.c **** { -3487:Src/main.c **** uint16_t cl_ind; -3488:Src/main.c **** -3489:Src/main.c **** switch (UART_header) -3490:Src/main.c **** { -3491:Src/main.c **** case 0x7777: -3492:Src/main.c **** cl_ind = TSK_16 - 2; -3493:Src/main.c **** break; -3494:Src/main.c **** case 0x1111: -3495:Src/main.c **** cl_ind = CL_16 - 2; -3496:Src/main.c **** break; -3497:Src/main.c **** default: -3498:Src/main.c **** return 0; -3499:Src/main.c **** break; -3500:Src/main.c **** } -3501:Src/main.c **** -3502:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); -3503:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 214 + 4002 .loc 4 1344 26 view .LVU1209 + 4003 .LBB467: + ARM GAS /tmp/ccuHnxNu.s page 215 -3504:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); -3505:Src/main.c **** } -3506:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) -3507:Src/main.c **** { -3508:Src/main.c **** short i; -3509:Src/main.c **** uint16_t cs = *pbuff; -3510:Src/main.c **** -3511:Src/main.c **** for(i = 1; i < len; i++) -3512:Src/main.c **** { -3513:Src/main.c **** cs ^= *(pbuff+i); -3514:Src/main.c **** } -3515:Src/main.c **** return cs; -3516:Src/main.c **** } -3517:Src/main.c **** -3518:Src/main.c **** /*int SD_Init(void) -3519:Src/main.c **** { -3520:Src/main.c **** int test=0; -3521:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -3522:Src/main.c **** { -3523:Src/main.c **** test = Mount_SD("/"); -3524:Src/main.c **** if (test == 0) //0 - suc -3525:Src/main.c **** { -3526:Src/main.c **** //Format_SD(); -3527:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc -3528:Src/main.c **** //Create_File("FILE2.TXT"); -3529:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part -3530:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -3531:Src/main.c **** return test; -3532:Src/main.c **** } -3533:Src/main.c **** else -3534:Src/main.c **** { -3535:Src/main.c **** return 1; -3536:Src/main.c **** } -3537:Src/main.c **** } -3538:Src/main.c **** else -3539:Src/main.c **** { -3540:Src/main.c **** return 1; -3541:Src/main.c **** } -3542:Src/main.c **** }*/ +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4004 .loc 4 1346 3 view .LVU1210 +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4005 .loc 4 1346 21 is_stmt 0 view .LVU1211 + 4006 0206 054B ldr r3, .L282+12 + 4007 0208 DD68 ldr r5, [r3, #12] +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4008 .loc 4 1346 10 view .LVU1212 + 4009 020a ADB2 uxth r5, r5 + 4010 .LVL475: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4011 .loc 4 1346 10 view .LVU1213 + 4012 020c 5BE7 b .L246 + 4013 .L283: + 4014 020e 00BF .align 2 + 4015 .L282: + 4016 0210 00100240 .word 1073876992 + 4017 0214 00140240 .word 1073878016 + 4018 0218 00340140 .word 1073820672 + 4019 021c 00500140 .word 1073827840 + 4020 .LBE467: + 4021 .LBE466: + 4022 .cfi_endproc + 4023 .LFE1228: + 4025 .section .text.Stop_TIM10,"ax",%progbits + 4026 .align 1 + 4027 .syntax unified + 4028 .thumb + 4029 .thumb_func + 4031 Stop_TIM10: + 4032 .LFB1239: +3540:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) +3541:Src/main.c **** { +3542:Src/main.c **** uint16_t cl_ind; 3543:Src/main.c **** -3544:Src/main.c **** int SD_SAVE(uint16_t *pbuff) -3545:Src/main.c **** { -3546:Src/main.c **** int test=0; -3547:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -3548:Src/main.c **** { -3549:Src/main.c **** test = Mount_SD("/"); -3550:Src/main.c **** if (test == 0) //0 - suc -3551:Src/main.c **** { -3552:Src/main.c **** //Format_SD(); -3553:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); -3554:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -3555:Src/main.c **** return test; -3556:Src/main.c **** } -3557:Src/main.c **** else -3558:Src/main.c **** { -3559:Src/main.c **** return 1; -3560:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 215 - - -3561:Src/main.c **** } -3562:Src/main.c **** else -3563:Src/main.c **** { -3564:Src/main.c **** return 1; -3565:Src/main.c **** } -3566:Src/main.c **** } -3567:Src/main.c **** -3568:Src/main.c **** -3569:Src/main.c **** -3570:Src/main.c **** //uint32_t Get_Length(void) -3571:Src/main.c **** //{ -3572:Src/main.c **** // return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16); -3573:Src/main.c **** //} -3574:Src/main.c **** -3575:Src/main.c **** int SD_READ(uint16_t *pbuff) -3576:Src/main.c **** { -3577:Src/main.c **** int test=0; -3578:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -3579:Src/main.c **** { -3580:Src/main.c **** test = Mount_SD("/"); -3581:Src/main.c **** if (test == 0) //0 - suc -3582:Src/main.c **** { -3583:Src/main.c **** //Format_SD(); -3584:Src/main.c **** test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes -3585:Src/main.c **** fgoto+=DL_8; -3586:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -3587:Src/main.c **** return test; -3588:Src/main.c **** } -3589:Src/main.c **** else -3590:Src/main.c **** { -3591:Src/main.c **** return 1; -3592:Src/main.c **** } -3593:Src/main.c **** } -3594:Src/main.c **** else -3595:Src/main.c **** { -3596:Src/main.c **** return 1; -3597:Src/main.c **** } -3598:Src/main.c **** -3599:Src/main.c **** /* for (uint16_t j = 0; j < DL_16; j++) -3600:Src/main.c **** { -3601:Src/main.c **** *(pbuff+j) = SD_matr[SD_SLIDE][j]; -3602:Src/main.c **** } -3603:Src/main.c **** if (SD_SLIDEDHR12R1 = 0u; + 4654 .loc 1 2731 2 view .LVU1427 +2731:Src/main.c **** DAC->DHR12R1 = 0u; + 4655 .loc 1 2731 5 is_stmt 0 view .LVU1428 + 4656 0046 064B ldr r3, .L294+8 + 4657 0048 1968 ldr r1, [r3] +2731:Src/main.c **** DAC->DHR12R1 = 0u; + 4658 .loc 1 2731 10 view .LVU1429 + 4659 004a 064A ldr r2, .L294+12 + 4660 004c 0A40 ands r2, r2, r1 + 4661 004e 1A60 str r2, [r3] +2732:Src/main.c **** } + 4662 .loc 1 2732 2 is_stmt 1 view .LVU1430 +2732:Src/main.c **** } + 4663 .loc 1 2732 15 is_stmt 0 view .LVU1431 + 4664 0050 9C60 str r4, [r3, #8] +2733:Src/main.c **** + 4665 .loc 1 2733 1 view .LVU1432 + 4666 0052 08B0 add sp, sp, #32 + 4667 .LCFI42: + 4668 .cfi_def_cfa_offset 8 + 4669 @ sp needed + 4670 0054 10BD pop {r4, pc} + 4671 .L295: + 4672 0056 00BF .align 2 + 4673 .L294: + 4674 0058 00380240 .word 1073887232 + 4675 005c 00000240 .word 1073872896 + 4676 0060 00740040 .word 1073771520 + 4677 0064 FAEFFFFF .word -4102 + 4678 .cfi_endproc + 4679 .LFE1216: + 4681 .section .text.MX_SPI4_Init,"ax",%progbits + 4682 .align 1 + 4683 .syntax unified + 4684 .thumb + 4685 .thumb_func + 4687 MX_SPI4_Init: + 4688 .LFB1192: +1345:Src/main.c **** + 4689 .loc 1 1345 1 is_stmt 1 view -0 + 4690 .cfi_startproc + 4691 @ args = 0, pretend = 0, frame = 72 + 4692 @ frame_needed = 0, uses_anonymous_args = 0 + 4693 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 4694 .LCFI43: + 4695 .cfi_def_cfa_offset 24 + 4696 .cfi_offset 4, -24 + ARM GAS /tmp/ccuHnxNu.s page 234 + + + 4697 .cfi_offset 5, -20 + 4698 .cfi_offset 6, -16 + 4699 .cfi_offset 7, -12 + 4700 .cfi_offset 8, -8 + 4701 .cfi_offset 14, -4 + 4702 0004 92B0 sub sp, sp, #72 + 4703 .LCFI44: + 4704 .cfi_def_cfa_offset 96 +1351:Src/main.c **** + 4705 .loc 1 1351 3 view .LVU1434 +1351:Src/main.c **** + 4706 .loc 1 1351 22 is_stmt 0 view .LVU1435 + 4707 0006 2822 movs r2, #40 + 4708 0008 0021 movs r1, #0 + 4709 000a 08A8 add r0, sp, #32 + 4710 000c FFF7FEFF bl memset + 4711 .LVL507: +1353:Src/main.c **** + 4712 .loc 1 1353 3 is_stmt 1 view .LVU1436 +1353:Src/main.c **** + 4713 .loc 1 1353 23 is_stmt 0 view .LVU1437 + 4714 0010 0024 movs r4, #0 + 4715 0012 0294 str r4, [sp, #8] + 4716 0014 0394 str r4, [sp, #12] + 4717 0016 0494 str r4, [sp, #16] + 4718 0018 0594 str r4, [sp, #20] + 4719 001a 0694 str r4, [sp, #24] + 4720 001c 0794 str r4, [sp, #28] +1356:Src/main.c **** + 4721 .loc 1 1356 3 is_stmt 1 view .LVU1438 + 4722 .LVL508: + 4723 .LBB478: + 4724 .LBI478: 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -13794,13 +14038,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_IsEnabledClock\n 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_IsEnabledClock\n 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_IsEnabledClock\n + ARM GAS /tmp/ccuHnxNu.s page 235 + + 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_IsEnabledClock\n 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_IsEnabledClock\n 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIENDEN LL_AHB1_GRP1_IsEnabledClock 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccEQxcUB.s page 231 - - 344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC @@ -13854,13 +14098,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_DisableClock\n 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_DisableClock\n 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_DisableClock\n + ARM GAS /tmp/ccuHnxNu.s page 236 + + 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_DisableClock\n 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_DisableClock\n 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_DisableClock\n 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIENDEN LL_AHB1_GRP1_DisableClock - ARM GAS /tmp/ccEQxcUB.s page 232 - - 401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB @@ -13914,13 +14158,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ForceReset\n 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ForceReset 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: + ARM GAS /tmp/ccuHnxNu.s page 237 + + 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC - ARM GAS /tmp/ccEQxcUB.s page 233 - - 458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF @@ -13974,13 +14218,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI + ARM GAS /tmp/ccuHnxNu.s page 238 + + 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 - ARM GAS /tmp/ccEQxcUB.s page 234 - - 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) @@ -14034,13 +14278,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) + ARM GAS /tmp/ccuHnxNu.s page 239 + + 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_AXI 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF - ARM GAS /tmp/ccEQxcUB.s page 235 - - 572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM @@ -14094,13 +14338,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_DisableClockLowPower\n 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_DisableClockLowPower\n 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccuHnxNu.s page 240 + + 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_DisableClockLowPower\n 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_DisableClockLowPower 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA - ARM GAS /tmp/ccEQxcUB.s page 236 - - 629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD @@ -14154,13 +14398,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock\n 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: + ARM GAS /tmp/ccuHnxNu.s page 241 + + 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) - ARM GAS /tmp/ccEQxcUB.s page 237 - - 686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS @@ -14214,13 +14458,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) + ARM GAS /tmp/ccuHnxNu.s page 242 + + 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) - ARM GAS /tmp/ccEQxcUB.s page 238 - - 743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @@ -14274,13 +14518,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) + ARM GAS /tmp/ccuHnxNu.s page 243 + + 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG 798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS 799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * - ARM GAS /tmp/ccEQxcUB.s page 239 - - 800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ @@ -14334,13 +14578,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) + ARM GAS /tmp/ccuHnxNu.s page 244 + + 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS 855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/ccEQxcUB.s page 240 - - 857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs) @@ -14394,13 +14638,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripherals clock. + ARM GAS /tmp/ccuHnxNu.s page 245 + + 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) - ARM GAS /tmp/ccEQxcUB.s page 241 - - 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. @@ -14454,13 +14698,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. + ARM GAS /tmp/ccuHnxNu.s page 246 + + 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs) 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - ARM GAS /tmp/ccEQxcUB.s page 242 - - 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB3LPENR, Periphs); 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ @@ -14514,13 +14758,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n + ARM GAS /tmp/ccuHnxNu.s page 247 + + 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_EnableClock\n 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_EnableClock\n 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_EnableClock\n - ARM GAS /tmp/ccEQxcUB.s page 243 - - 1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_EnableClock\n 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_EnableClock\n 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n @@ -14574,13 +14818,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 248 + + 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccEQxcUB.s page 244 - - 1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_IsEnabledClock\n 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n @@ -14634,13 +14878,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) + ARM GAS /tmp/ccuHnxNu.s page 249 + + 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 - ARM GAS /tmp/ccEQxcUB.s page 245 - - 1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) @@ -14694,13 +14938,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 + ARM GAS /tmp/ccuHnxNu.s page 250 + + 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG - ARM GAS /tmp/ccEQxcUB.s page 246 - - 1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) @@ -14754,13 +14998,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ForceReset\n + ARM GAS /tmp/ccuHnxNu.s page 251 + + 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN3RST LL_APB1_GRP1_ForceReset\n 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ForceReset\n - ARM GAS /tmp/ccEQxcUB.s page 247 - - 1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART7RST LL_APB1_GRP1_ForceReset\n @@ -14814,13 +15058,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n + ARM GAS /tmp/ccuHnxNu.s page 252 + + 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset\n 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset\n - ARM GAS /tmp/ccEQxcUB.s page 248 - - 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ReleaseReset\n 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ReleaseReset\n @@ -14874,13 +15118,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None + ARM GAS /tmp/ccuHnxNu.s page 253 + + 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->APB1RSTR, Periphs); - ARM GAS /tmp/ccEQxcUB.s page 249 - - 1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -14934,13 +15178,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 + ARM GAS /tmp/ccuHnxNu.s page 254 + + 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 - ARM GAS /tmp/ccEQxcUB.s page 250 - - 1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) @@ -14994,13 +15238,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccuHnxNu.s page 255 + + 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_DisableClockLowPower\n 1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_DisableClockLowPower 1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccEQxcUB.s page 251 - - 1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 @@ -15054,13 +15298,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n 1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n + ARM GAS /tmp/ccuHnxNu.s page 256 + + 1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n 1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n 1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC2EN LL_APB2_GRP1_EnableClock\n 1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC3EN LL_APB2_GRP1_EnableClock\n - ARM GAS /tmp/ccEQxcUB.s page 252 - - 1541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SDMMC1EN LL_APB2_GRP1_EnableClock\n 1542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SDMMC2EN LL_APB2_GRP1_EnableClock\n 1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n @@ -15108,1399 +15352,1399 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) - 4571 .loc 3 1587 22 view .LVU1397 - 4572 .LBB476: + 4725 .loc 3 1587 22 view .LVU1439 + 4726 .LBB479: 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; - 4573 .loc 3 1589 3 view .LVU1398 + 4727 .loc 3 1589 3 view .LVU1440 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 4574 .loc 3 1590 3 view .LVU1399 - 4575 001e 2A4B ldr r3, .L287 - 4576 0020 5A6C ldr r2, [r3, #68] - 4577 0022 42F40052 orr r2, r2, #8192 - ARM GAS /tmp/ccEQxcUB.s page 253 + ARM GAS /tmp/ccuHnxNu.s page 257 - 4578 0026 5A64 str r2, [r3, #68] + 4728 .loc 3 1590 3 view .LVU1441 + 4729 001e 2A4B ldr r3, .L298 + 4730 0020 5A6C ldr r2, [r3, #68] + 4731 0022 42F40052 orr r2, r2, #8192 + 4732 0026 5A64 str r2, [r3, #68] 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs); - 4579 .loc 3 1592 3 view .LVU1400 - 4580 .loc 3 1592 12 is_stmt 0 view .LVU1401 - 4581 0028 5A6C ldr r2, [r3, #68] - 4582 002a 02F40052 and r2, r2, #8192 - 4583 .loc 3 1592 10 view .LVU1402 - 4584 002e 0192 str r2, [sp, #4] + 4733 .loc 3 1592 3 view .LVU1442 + 4734 .loc 3 1592 12 is_stmt 0 view .LVU1443 + 4735 0028 5A6C ldr r2, [r3, #68] + 4736 002a 02F40052 and r2, r2, #8192 + 4737 .loc 3 1592 10 view .LVU1444 + 4738 002e 0192 str r2, [sp, #4] 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4585 .loc 3 1593 3 is_stmt 1 view .LVU1403 - 4586 0030 019A ldr r2, [sp, #4] - 4587 .LVL506: - 4588 .loc 3 1593 3 is_stmt 0 view .LVU1404 - 4589 .LBE476: - 4590 .LBE475: -1338:Src/main.c **** /**SPI4 GPIO Configuration - 4591 .loc 1 1338 3 is_stmt 1 view .LVU1405 - 4592 .LBB477: - 4593 .LBI477: + 4739 .loc 3 1593 3 is_stmt 1 view .LVU1445 + 4740 0030 019A ldr r2, [sp, #4] + 4741 .LVL509: + 4742 .loc 3 1593 3 is_stmt 0 view .LVU1446 + 4743 .LBE479: + 4744 .LBE478: +1358:Src/main.c **** /**SPI4 GPIO Configuration + 4745 .loc 1 1358 3 is_stmt 1 view .LVU1447 + 4746 .LBB480: + 4747 .LBI480: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4594 .loc 3 309 22 view .LVU1406 - 4595 .LBB478: + 4748 .loc 3 309 22 view .LVU1448 + 4749 .LBB481: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 4596 .loc 3 311 3 view .LVU1407 + 4750 .loc 3 311 3 view .LVU1449 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4597 .loc 3 312 3 view .LVU1408 - 4598 0032 1A6B ldr r2, [r3, #48] - 4599 0034 42F01002 orr r2, r2, #16 - 4600 0038 1A63 str r2, [r3, #48] + 4751 .loc 3 312 3 view .LVU1450 + 4752 0032 1A6B ldr r2, [r3, #48] + 4753 0034 42F01002 orr r2, r2, #16 + 4754 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4601 .loc 3 314 3 view .LVU1409 + 4755 .loc 3 314 3 view .LVU1451 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4602 .loc 3 314 12 is_stmt 0 view .LVU1410 - 4603 003a 1B6B ldr r3, [r3, #48] - 4604 003c 03F01003 and r3, r3, #16 + 4756 .loc 3 314 12 is_stmt 0 view .LVU1452 + 4757 003a 1B6B ldr r3, [r3, #48] + 4758 003c 03F01003 and r3, r3, #16 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4605 .loc 3 314 10 view .LVU1411 - 4606 0040 0093 str r3, [sp] + 4759 .loc 3 314 10 view .LVU1453 + 4760 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4607 .loc 3 315 3 is_stmt 1 view .LVU1412 - 4608 0042 009B ldr r3, [sp] - 4609 .LVL507: + 4761 .loc 3 315 3 is_stmt 1 view .LVU1454 + 4762 0042 009B ldr r3, [sp] + 4763 .LVL510: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4610 .loc 3 315 3 is_stmt 0 view .LVU1413 - 4611 .LBE478: - 4612 .LBE477: -1343:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4613 .loc 1 1343 3 is_stmt 1 view .LVU1414 -1343:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4614 .loc 1 1343 23 is_stmt 0 view .LVU1415 - 4615 0044 4FF48053 mov r3, #4096 - 4616 0048 0293 str r3, [sp, #8] -1344:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4617 .loc 1 1344 3 is_stmt 1 view .LVU1416 -1344:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4618 .loc 1 1344 24 is_stmt 0 view .LVU1417 - ARM GAS /tmp/ccEQxcUB.s page 254 + 4764 .loc 3 315 3 is_stmt 0 view .LVU1455 + 4765 .LBE481: + 4766 .LBE480: +1363:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4767 .loc 1 1363 3 is_stmt 1 view .LVU1456 +1363:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4768 .loc 1 1363 23 is_stmt 0 view .LVU1457 + 4769 0044 4FF48053 mov r3, #4096 + 4770 0048 0293 str r3, [sp, #8] + ARM GAS /tmp/ccuHnxNu.s page 258 - 4619 004a 0225 movs r5, #2 - 4620 004c 0395 str r5, [sp, #12] -1345:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4621 .loc 1 1345 3 is_stmt 1 view .LVU1418 -1345:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4622 .loc 1 1345 25 is_stmt 0 view .LVU1419 - 4623 004e 4FF00308 mov r8, #3 - 4624 0052 CDF81080 str r8, [sp, #16] -1346:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4625 .loc 1 1346 3 is_stmt 1 view .LVU1420 -1347:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4626 .loc 1 1347 3 view .LVU1421 -1348:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4627 .loc 1 1348 3 view .LVU1422 -1348:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4628 .loc 1 1348 29 is_stmt 0 view .LVU1423 - 4629 0056 0527 movs r7, #5 - 4630 0058 0797 str r7, [sp, #28] -1349:Src/main.c **** - 4631 .loc 1 1349 3 is_stmt 1 view .LVU1424 - 4632 005a 1C4E ldr r6, .L287+4 - 4633 005c 02A9 add r1, sp, #8 - 4634 005e 3046 mov r0, r6 - 4635 0060 FFF7FEFF bl LL_GPIO_Init - 4636 .LVL508: -1351:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4637 .loc 1 1351 3 view .LVU1425 -1351:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4638 .loc 1 1351 23 is_stmt 0 view .LVU1426 - 4639 0064 4FF40053 mov r3, #8192 - 4640 0068 0293 str r3, [sp, #8] -1352:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4641 .loc 1 1352 3 is_stmt 1 view .LVU1427 -1352:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4642 .loc 1 1352 24 is_stmt 0 view .LVU1428 - 4643 006a 0395 str r5, [sp, #12] -1353:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4644 .loc 1 1353 3 is_stmt 1 view .LVU1429 -1353:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4645 .loc 1 1353 25 is_stmt 0 view .LVU1430 - 4646 006c CDF81080 str r8, [sp, #16] -1354:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4647 .loc 1 1354 3 is_stmt 1 view .LVU1431 -1354:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4648 .loc 1 1354 30 is_stmt 0 view .LVU1432 - 4649 0070 0594 str r4, [sp, #20] -1355:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4650 .loc 1 1355 3 is_stmt 1 view .LVU1433 -1355:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4651 .loc 1 1355 24 is_stmt 0 view .LVU1434 - 4652 0072 0694 str r4, [sp, #24] -1356:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4653 .loc 1 1356 3 is_stmt 1 view .LVU1435 -1356:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4654 .loc 1 1356 29 is_stmt 0 view .LVU1436 - 4655 0074 0797 str r7, [sp, #28] -1357:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 255 +1364:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4771 .loc 1 1364 3 is_stmt 1 view .LVU1458 +1364:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4772 .loc 1 1364 24 is_stmt 0 view .LVU1459 + 4773 004a 0225 movs r5, #2 + 4774 004c 0395 str r5, [sp, #12] +1365:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4775 .loc 1 1365 3 is_stmt 1 view .LVU1460 +1365:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4776 .loc 1 1365 25 is_stmt 0 view .LVU1461 + 4777 004e 4FF00308 mov r8, #3 + 4778 0052 CDF81080 str r8, [sp, #16] +1366:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4779 .loc 1 1366 3 is_stmt 1 view .LVU1462 +1367:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4780 .loc 1 1367 3 view .LVU1463 +1368:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4781 .loc 1 1368 3 view .LVU1464 +1368:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4782 .loc 1 1368 29 is_stmt 0 view .LVU1465 + 4783 0056 0527 movs r7, #5 + 4784 0058 0797 str r7, [sp, #28] +1369:Src/main.c **** + 4785 .loc 1 1369 3 is_stmt 1 view .LVU1466 + 4786 005a 1C4E ldr r6, .L298+4 + 4787 005c 02A9 add r1, sp, #8 + 4788 005e 3046 mov r0, r6 + 4789 0060 FFF7FEFF bl LL_GPIO_Init + 4790 .LVL511: +1371:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4791 .loc 1 1371 3 view .LVU1467 +1371:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4792 .loc 1 1371 23 is_stmt 0 view .LVU1468 + 4793 0064 4FF40053 mov r3, #8192 + 4794 0068 0293 str r3, [sp, #8] +1372:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4795 .loc 1 1372 3 is_stmt 1 view .LVU1469 +1372:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4796 .loc 1 1372 24 is_stmt 0 view .LVU1470 + 4797 006a 0395 str r5, [sp, #12] +1373:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4798 .loc 1 1373 3 is_stmt 1 view .LVU1471 +1373:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4799 .loc 1 1373 25 is_stmt 0 view .LVU1472 + 4800 006c CDF81080 str r8, [sp, #16] +1374:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4801 .loc 1 1374 3 is_stmt 1 view .LVU1473 +1374:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4802 .loc 1 1374 30 is_stmt 0 view .LVU1474 + 4803 0070 0594 str r4, [sp, #20] +1375:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4804 .loc 1 1375 3 is_stmt 1 view .LVU1475 +1375:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4805 .loc 1 1375 24 is_stmt 0 view .LVU1476 + 4806 0072 0694 str r4, [sp, #24] +1376:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4807 .loc 1 1376 3 is_stmt 1 view .LVU1477 + ARM GAS /tmp/ccuHnxNu.s page 259 - 4656 .loc 1 1357 3 is_stmt 1 view .LVU1437 - 4657 0076 02A9 add r1, sp, #8 - 4658 0078 3046 mov r0, r6 - 4659 007a FFF7FEFF bl LL_GPIO_Init - 4660 .LVL509: -1363:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4661 .loc 1 1363 3 view .LVU1438 -1363:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4662 .loc 1 1363 36 is_stmt 0 view .LVU1439 - 4663 007e 4FF48063 mov r3, #1024 - 4664 0082 0893 str r3, [sp, #32] -1364:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 4665 .loc 1 1364 3 is_stmt 1 view .LVU1440 -1364:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 4666 .loc 1 1364 23 is_stmt 0 view .LVU1441 - 4667 0084 4FF48273 mov r3, #260 - 4668 0088 0993 str r3, [sp, #36] -1365:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 4669 .loc 1 1365 3 is_stmt 1 view .LVU1442 -1365:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 4670 .loc 1 1365 28 is_stmt 0 view .LVU1443 - 4671 008a 4FF47063 mov r3, #3840 - 4672 008e 0A93 str r3, [sp, #40] -1366:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 4673 .loc 1 1366 3 is_stmt 1 view .LVU1444 -1366:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 4674 .loc 1 1366 32 is_stmt 0 view .LVU1445 - 4675 0090 0B95 str r5, [sp, #44] -1367:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4676 .loc 1 1367 3 is_stmt 1 view .LVU1446 -1367:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4677 .loc 1 1367 29 is_stmt 0 view .LVU1447 - 4678 0092 0C94 str r4, [sp, #48] -1368:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 4679 .loc 1 1368 3 is_stmt 1 view .LVU1448 -1368:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 4680 .loc 1 1368 22 is_stmt 0 view .LVU1449 - 4681 0094 4FF40073 mov r3, #512 - 4682 0098 0D93 str r3, [sp, #52] -1369:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4683 .loc 1 1369 3 is_stmt 1 view .LVU1450 -1369:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4684 .loc 1 1369 27 is_stmt 0 view .LVU1451 - 4685 009a 1823 movs r3, #24 - 4686 009c 0E93 str r3, [sp, #56] -1370:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4687 .loc 1 1370 3 is_stmt 1 view .LVU1452 -1370:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4688 .loc 1 1370 27 is_stmt 0 view .LVU1453 - 4689 009e 0F94 str r4, [sp, #60] -1371:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 4690 .loc 1 1371 3 is_stmt 1 view .LVU1454 -1371:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 4691 .loc 1 1371 33 is_stmt 0 view .LVU1455 - 4692 00a0 1094 str r4, [sp, #64] -1372:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 4693 .loc 1 1372 3 is_stmt 1 view .LVU1456 - ARM GAS /tmp/ccEQxcUB.s page 256 +1376:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4808 .loc 1 1376 29 is_stmt 0 view .LVU1478 + 4809 0074 0797 str r7, [sp, #28] +1377:Src/main.c **** + 4810 .loc 1 1377 3 is_stmt 1 view .LVU1479 + 4811 0076 02A9 add r1, sp, #8 + 4812 0078 3046 mov r0, r6 + 4813 007a FFF7FEFF bl LL_GPIO_Init + 4814 .LVL512: +1383:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4815 .loc 1 1383 3 view .LVU1480 +1383:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4816 .loc 1 1383 36 is_stmt 0 view .LVU1481 + 4817 007e 4FF48063 mov r3, #1024 + 4818 0082 0893 str r3, [sp, #32] +1384:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4819 .loc 1 1384 3 is_stmt 1 view .LVU1482 +1384:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4820 .loc 1 1384 23 is_stmt 0 view .LVU1483 + 4821 0084 4FF48273 mov r3, #260 + 4822 0088 0993 str r3, [sp, #36] +1385:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4823 .loc 1 1385 3 is_stmt 1 view .LVU1484 +1385:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4824 .loc 1 1385 28 is_stmt 0 view .LVU1485 + 4825 008a 4FF47063 mov r3, #3840 + 4826 008e 0A93 str r3, [sp, #40] +1386:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4827 .loc 1 1386 3 is_stmt 1 view .LVU1486 +1386:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4828 .loc 1 1386 32 is_stmt 0 view .LVU1487 + 4829 0090 0B95 str r5, [sp, #44] +1387:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4830 .loc 1 1387 3 is_stmt 1 view .LVU1488 +1387:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4831 .loc 1 1387 29 is_stmt 0 view .LVU1489 + 4832 0092 0C94 str r4, [sp, #48] +1388:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4833 .loc 1 1388 3 is_stmt 1 view .LVU1490 +1388:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4834 .loc 1 1388 22 is_stmt 0 view .LVU1491 + 4835 0094 4FF40073 mov r3, #512 + 4836 0098 0D93 str r3, [sp, #52] +1389:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4837 .loc 1 1389 3 is_stmt 1 view .LVU1492 +1389:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4838 .loc 1 1389 27 is_stmt 0 view .LVU1493 + 4839 009a 1823 movs r3, #24 + 4840 009c 0E93 str r3, [sp, #56] +1390:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4841 .loc 1 1390 3 is_stmt 1 view .LVU1494 +1390:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4842 .loc 1 1390 27 is_stmt 0 view .LVU1495 + 4843 009e 0F94 str r4, [sp, #60] +1391:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4844 .loc 1 1391 3 is_stmt 1 view .LVU1496 +1391:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + ARM GAS /tmp/ccuHnxNu.s page 260 -1372:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 4694 .loc 1 1372 26 is_stmt 0 view .LVU1457 - 4695 00a2 0723 movs r3, #7 - 4696 00a4 1193 str r3, [sp, #68] -1373:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); - 4697 .loc 1 1373 3 is_stmt 1 view .LVU1458 - 4698 00a6 0A4C ldr r4, .L287+8 - 4699 00a8 08A9 add r1, sp, #32 - 4700 00aa 2046 mov r0, r4 - 4701 00ac FFF7FEFF bl LL_SPI_Init - 4702 .LVL510: -1374:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); - 4703 .loc 1 1374 3 view .LVU1459 - 4704 .LBB479: - 4705 .LBI479: + 4845 .loc 1 1391 33 is_stmt 0 view .LVU1497 + 4846 00a0 1094 str r4, [sp, #64] +1392:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 4847 .loc 1 1392 3 is_stmt 1 view .LVU1498 +1392:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 4848 .loc 1 1392 26 is_stmt 0 view .LVU1499 + 4849 00a2 0723 movs r3, #7 + 4850 00a4 1193 str r3, [sp, #68] +1393:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); + 4851 .loc 1 1393 3 is_stmt 1 view .LVU1500 + 4852 00a6 0A4C ldr r4, .L298+8 + 4853 00a8 08A9 add r1, sp, #32 + 4854 00aa 2046 mov r0, r4 + 4855 00ac FFF7FEFF bl LL_SPI_Init + 4856 .LVL513: +1394:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); + 4857 .loc 1 1394 3 view .LVU1501 + 4858 .LBB482: + 4859 .LBI482: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4706 .loc 4 426 22 view .LVU1460 - 4707 .LBB480: + 4860 .loc 4 426 22 view .LVU1502 + 4861 .LBB483: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4708 .loc 4 428 3 view .LVU1461 - 4709 00b0 6368 ldr r3, [r4, #4] - 4710 00b2 23F01003 bic r3, r3, #16 - 4711 00b6 6360 str r3, [r4, #4] - 4712 .LVL511: + 4862 .loc 4 428 3 view .LVU1503 + 4863 00b0 6368 ldr r3, [r4, #4] + 4864 00b2 23F01003 bic r3, r3, #16 + 4865 00b6 6360 str r3, [r4, #4] + 4866 .LVL514: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4713 .loc 4 428 3 is_stmt 0 view .LVU1462 - 4714 .LBE480: - 4715 .LBE479: -1375:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ - 4716 .loc 1 1375 3 is_stmt 1 view .LVU1463 - 4717 .LBB481: - 4718 .LBI481: + 4867 .loc 4 428 3 is_stmt 0 view .LVU1504 + 4868 .LBE483: + 4869 .LBE482: +1395:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ + 4870 .loc 1 1395 3 is_stmt 1 view .LVU1505 + 4871 .LBB484: + 4872 .LBI484: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4719 .loc 4 874 22 view .LVU1464 - 4720 .LBB482: + 4873 .loc 4 874 22 view .LVU1506 + 4874 .LBB485: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4721 .loc 4 876 3 view .LVU1465 - 4722 00b8 6368 ldr r3, [r4, #4] - 4723 00ba 23F00803 bic r3, r3, #8 - 4724 00be 6360 str r3, [r4, #4] - 4725 .LVL512: + 4875 .loc 4 876 3 view .LVU1507 + 4876 00b8 6368 ldr r3, [r4, #4] + 4877 00ba 23F00803 bic r3, r3, #8 + 4878 00be 6360 str r3, [r4, #4] + 4879 .LVL515: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4726 .loc 4 876 3 is_stmt 0 view .LVU1466 - 4727 .LBE482: - 4728 .LBE481: -1380:Src/main.c **** - 4729 .loc 1 1380 1 view .LVU1467 - 4730 00c0 12B0 add sp, sp, #72 - 4731 .LCFI42: - 4732 .cfi_def_cfa_offset 24 - 4733 @ sp needed - 4734 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 4735 .L288: - 4736 00c6 00BF .align 2 - 4737 .L287: - 4738 00c8 00380240 .word 1073887232 - 4739 00cc 00100240 .word 1073876992 - ARM GAS /tmp/ccEQxcUB.s page 257 + 4880 .loc 4 876 3 is_stmt 0 view .LVU1508 + 4881 .LBE485: + 4882 .LBE484: +1400:Src/main.c **** + 4883 .loc 1 1400 1 view .LVU1509 + 4884 00c0 12B0 add sp, sp, #72 + 4885 .LCFI45: + 4886 .cfi_def_cfa_offset 24 + 4887 @ sp needed + 4888 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 4889 .L299: + ARM GAS /tmp/ccuHnxNu.s page 261 - 4740 00d0 00340140 .word 1073820672 - 4741 .cfi_endproc - 4742 .LFE1192: - 4744 .section .text.MX_SPI2_Init,"ax",%progbits - 4745 .align 1 - 4746 .syntax unified - 4747 .thumb - 4748 .thumb_func - 4750 MX_SPI2_Init: - 4751 .LFB1191: -1253:Src/main.c **** - 4752 .loc 1 1253 1 is_stmt 1 view -0 - 4753 .cfi_startproc - 4754 @ args = 0, pretend = 0, frame = 72 - 4755 @ frame_needed = 0, uses_anonymous_args = 0 - 4756 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 4757 .LCFI43: - 4758 .cfi_def_cfa_offset 24 - 4759 .cfi_offset 4, -24 - 4760 .cfi_offset 5, -20 - 4761 .cfi_offset 6, -16 - 4762 .cfi_offset 7, -12 - 4763 .cfi_offset 8, -8 - 4764 .cfi_offset 14, -4 - 4765 0004 92B0 sub sp, sp, #72 - 4766 .LCFI44: - 4767 .cfi_def_cfa_offset 96 -1259:Src/main.c **** - 4768 .loc 1 1259 3 view .LVU1469 -1259:Src/main.c **** - 4769 .loc 1 1259 22 is_stmt 0 view .LVU1470 - 4770 0006 2822 movs r2, #40 - 4771 0008 0021 movs r1, #0 - 4772 000a 08A8 add r0, sp, #32 - 4773 000c FFF7FEFF bl memset - 4774 .LVL513: -1261:Src/main.c **** - 4775 .loc 1 1261 3 is_stmt 1 view .LVU1471 -1261:Src/main.c **** - 4776 .loc 1 1261 23 is_stmt 0 view .LVU1472 - 4777 0010 0024 movs r4, #0 - 4778 0012 0294 str r4, [sp, #8] - 4779 0014 0394 str r4, [sp, #12] - 4780 0016 0494 str r4, [sp, #16] - 4781 0018 0594 str r4, [sp, #20] - 4782 001a 0694 str r4, [sp, #24] - 4783 001c 0794 str r4, [sp, #28] -1264:Src/main.c **** - 4784 .loc 1 1264 3 is_stmt 1 view .LVU1473 - 4785 .LVL514: - 4786 .LBB483: - 4787 .LBI483: + 4890 00c6 00BF .align 2 + 4891 .L298: + 4892 00c8 00380240 .word 1073887232 + 4893 00cc 00100240 .word 1073876992 + 4894 00d0 00340140 .word 1073820672 + 4895 .cfi_endproc + 4896 .LFE1192: + 4898 .section .text.MX_SPI2_Init,"ax",%progbits + 4899 .align 1 + 4900 .syntax unified + 4901 .thumb + 4902 .thumb_func + 4904 MX_SPI2_Init: + 4905 .LFB1191: +1273:Src/main.c **** + 4906 .loc 1 1273 1 is_stmt 1 view -0 + 4907 .cfi_startproc + 4908 @ args = 0, pretend = 0, frame = 72 + 4909 @ frame_needed = 0, uses_anonymous_args = 0 + 4910 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 4911 .LCFI46: + 4912 .cfi_def_cfa_offset 24 + 4913 .cfi_offset 4, -24 + 4914 .cfi_offset 5, -20 + 4915 .cfi_offset 6, -16 + 4916 .cfi_offset 7, -12 + 4917 .cfi_offset 8, -8 + 4918 .cfi_offset 14, -4 + 4919 0004 92B0 sub sp, sp, #72 + 4920 .LCFI47: + 4921 .cfi_def_cfa_offset 96 +1279:Src/main.c **** + 4922 .loc 1 1279 3 view .LVU1511 +1279:Src/main.c **** + 4923 .loc 1 1279 22 is_stmt 0 view .LVU1512 + 4924 0006 2822 movs r2, #40 + 4925 0008 0021 movs r1, #0 + 4926 000a 08A8 add r0, sp, #32 + 4927 000c FFF7FEFF bl memset + 4928 .LVL516: +1281:Src/main.c **** + 4929 .loc 1 1281 3 is_stmt 1 view .LVU1513 +1281:Src/main.c **** + 4930 .loc 1 1281 23 is_stmt 0 view .LVU1514 + 4931 0010 0024 movs r4, #0 + 4932 0012 0294 str r4, [sp, #8] + 4933 0014 0394 str r4, [sp, #12] + 4934 0016 0494 str r4, [sp, #16] + 4935 0018 0594 str r4, [sp, #20] + 4936 001a 0694 str r4, [sp, #24] + 4937 001c 0794 str r4, [sp, #28] +1284:Src/main.c **** + 4938 .loc 1 1284 3 is_stmt 1 view .LVU1515 + 4939 .LVL517: + 4940 .LBB486: + 4941 .LBI486: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4788 .loc 3 1071 22 view .LVU1474 - 4789 .LBB484: + ARM GAS /tmp/ccuHnxNu.s page 262 + + + 4942 .loc 3 1071 22 view .LVU1516 + 4943 .LBB487: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 4790 .loc 3 1073 3 view .LVU1475 - ARM GAS /tmp/ccEQxcUB.s page 258 - - + 4944 .loc 3 1073 3 view .LVU1517 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4791 .loc 3 1074 3 view .LVU1476 - 4792 001e 2F4B ldr r3, .L291 - 4793 0020 1A6C ldr r2, [r3, #64] - 4794 0022 42F48042 orr r2, r2, #16384 - 4795 0026 1A64 str r2, [r3, #64] + 4945 .loc 3 1074 3 view .LVU1518 + 4946 001e 2F4B ldr r3, .L302 + 4947 0020 1A6C ldr r2, [r3, #64] + 4948 0022 42F48042 orr r2, r2, #16384 + 4949 0026 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4796 .loc 3 1076 3 view .LVU1477 + 4950 .loc 3 1076 3 view .LVU1519 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4797 .loc 3 1076 12 is_stmt 0 view .LVU1478 - 4798 0028 1A6C ldr r2, [r3, #64] - 4799 002a 02F48042 and r2, r2, #16384 + 4951 .loc 3 1076 12 is_stmt 0 view .LVU1520 + 4952 0028 1A6C ldr r2, [r3, #64] + 4953 002a 02F48042 and r2, r2, #16384 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4800 .loc 3 1076 10 view .LVU1479 - 4801 002e 0192 str r2, [sp, #4] + 4954 .loc 3 1076 10 view .LVU1521 + 4955 002e 0192 str r2, [sp, #4] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4802 .loc 3 1077 3 is_stmt 1 view .LVU1480 - 4803 0030 019A ldr r2, [sp, #4] - 4804 .LVL515: + 4956 .loc 3 1077 3 is_stmt 1 view .LVU1522 + 4957 0030 019A ldr r2, [sp, #4] + 4958 .LVL518: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4805 .loc 3 1077 3 is_stmt 0 view .LVU1481 - 4806 .LBE484: - 4807 .LBE483: -1266:Src/main.c **** /**SPI2 GPIO Configuration - 4808 .loc 1 1266 3 is_stmt 1 view .LVU1482 - 4809 .LBB485: - 4810 .LBI485: + 4959 .loc 3 1077 3 is_stmt 0 view .LVU1523 + 4960 .LBE487: + 4961 .LBE486: +1286:Src/main.c **** /**SPI2 GPIO Configuration + 4962 .loc 1 1286 3 is_stmt 1 view .LVU1524 + 4963 .LBB488: + 4964 .LBI488: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4811 .loc 3 309 22 view .LVU1483 - 4812 .LBB486: + 4965 .loc 3 309 22 view .LVU1525 + 4966 .LBB489: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 4813 .loc 3 311 3 view .LVU1484 + 4967 .loc 3 311 3 view .LVU1526 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4814 .loc 3 312 3 view .LVU1485 - 4815 0032 1A6B ldr r2, [r3, #48] - 4816 0034 42F00202 orr r2, r2, #2 - 4817 0038 1A63 str r2, [r3, #48] + 4968 .loc 3 312 3 view .LVU1527 + 4969 0032 1A6B ldr r2, [r3, #48] + 4970 0034 42F00202 orr r2, r2, #2 + 4971 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4818 .loc 3 314 3 view .LVU1486 + 4972 .loc 3 314 3 view .LVU1528 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4819 .loc 3 314 12 is_stmt 0 view .LVU1487 - 4820 003a 1B6B ldr r3, [r3, #48] - 4821 003c 03F00203 and r3, r3, #2 + 4973 .loc 3 314 12 is_stmt 0 view .LVU1529 + 4974 003a 1B6B ldr r3, [r3, #48] + 4975 003c 03F00203 and r3, r3, #2 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4822 .loc 3 314 10 view .LVU1488 - 4823 0040 0093 str r3, [sp] + 4976 .loc 3 314 10 view .LVU1530 + 4977 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4824 .loc 3 315 3 is_stmt 1 view .LVU1489 - 4825 0042 009B ldr r3, [sp] - 4826 .LVL516: + 4978 .loc 3 315 3 is_stmt 1 view .LVU1531 + 4979 0042 009B ldr r3, [sp] + 4980 .LVL519: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4827 .loc 3 315 3 is_stmt 0 view .LVU1490 - 4828 .LBE486: - 4829 .LBE485: -1272:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4830 .loc 1 1272 3 is_stmt 1 view .LVU1491 -1272:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - ARM GAS /tmp/ccEQxcUB.s page 259 + 4981 .loc 3 315 3 is_stmt 0 view .LVU1532 + 4982 .LBE489: + ARM GAS /tmp/ccuHnxNu.s page 263 - 4831 .loc 1 1272 23 is_stmt 0 view .LVU1492 - 4832 0044 4FF40053 mov r3, #8192 - 4833 0048 0293 str r3, [sp, #8] -1273:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4834 .loc 1 1273 3 is_stmt 1 view .LVU1493 -1273:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4835 .loc 1 1273 24 is_stmt 0 view .LVU1494 - 4836 004a 4FF00208 mov r8, #2 - 4837 004e CDF80C80 str r8, [sp, #12] -1274:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4838 .loc 1 1274 3 is_stmt 1 view .LVU1495 -1274:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4839 .loc 1 1274 25 is_stmt 0 view .LVU1496 - 4840 0052 0327 movs r7, #3 - 4841 0054 0497 str r7, [sp, #16] -1275:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4842 .loc 1 1275 3 is_stmt 1 view .LVU1497 -1276:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4843 .loc 1 1276 3 view .LVU1498 -1277:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4844 .loc 1 1277 3 view .LVU1499 -1277:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4845 .loc 1 1277 29 is_stmt 0 view .LVU1500 - 4846 0056 0526 movs r6, #5 - 4847 0058 0796 str r6, [sp, #28] -1278:Src/main.c **** - 4848 .loc 1 1278 3 is_stmt 1 view .LVU1501 - 4849 005a 214D ldr r5, .L291+4 - 4850 005c 02A9 add r1, sp, #8 - 4851 005e 2846 mov r0, r5 - 4852 0060 FFF7FEFF bl LL_GPIO_Init - 4853 .LVL517: -1280:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4854 .loc 1 1280 3 view .LVU1502 -1280:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4855 .loc 1 1280 23 is_stmt 0 view .LVU1503 - 4856 0064 4FF48043 mov r3, #16384 - 4857 0068 0293 str r3, [sp, #8] -1281:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4858 .loc 1 1281 3 is_stmt 1 view .LVU1504 -1281:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4859 .loc 1 1281 24 is_stmt 0 view .LVU1505 - 4860 006a CDF80C80 str r8, [sp, #12] -1282:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4861 .loc 1 1282 3 is_stmt 1 view .LVU1506 -1282:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4862 .loc 1 1282 25 is_stmt 0 view .LVU1507 - 4863 006e 0497 str r7, [sp, #16] -1283:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4864 .loc 1 1283 3 is_stmt 1 view .LVU1508 -1283:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4865 .loc 1 1283 30 is_stmt 0 view .LVU1509 - 4866 0070 0594 str r4, [sp, #20] -1284:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4867 .loc 1 1284 3 is_stmt 1 view .LVU1510 -1284:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4868 .loc 1 1284 24 is_stmt 0 view .LVU1511 - ARM GAS /tmp/ccEQxcUB.s page 260 + 4983 .LBE488: +1292:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4984 .loc 1 1292 3 is_stmt 1 view .LVU1533 +1292:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4985 .loc 1 1292 23 is_stmt 0 view .LVU1534 + 4986 0044 4FF40053 mov r3, #8192 + 4987 0048 0293 str r3, [sp, #8] +1293:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4988 .loc 1 1293 3 is_stmt 1 view .LVU1535 +1293:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4989 .loc 1 1293 24 is_stmt 0 view .LVU1536 + 4990 004a 4FF00208 mov r8, #2 + 4991 004e CDF80C80 str r8, [sp, #12] +1294:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4992 .loc 1 1294 3 is_stmt 1 view .LVU1537 +1294:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4993 .loc 1 1294 25 is_stmt 0 view .LVU1538 + 4994 0052 0327 movs r7, #3 + 4995 0054 0497 str r7, [sp, #16] +1295:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4996 .loc 1 1295 3 is_stmt 1 view .LVU1539 +1296:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4997 .loc 1 1296 3 view .LVU1540 +1297:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4998 .loc 1 1297 3 view .LVU1541 +1297:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4999 .loc 1 1297 29 is_stmt 0 view .LVU1542 + 5000 0056 0526 movs r6, #5 + 5001 0058 0796 str r6, [sp, #28] +1298:Src/main.c **** + 5002 .loc 1 1298 3 is_stmt 1 view .LVU1543 + 5003 005a 214D ldr r5, .L302+4 + 5004 005c 02A9 add r1, sp, #8 + 5005 005e 2846 mov r0, r5 + 5006 0060 FFF7FEFF bl LL_GPIO_Init + 5007 .LVL520: +1300:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5008 .loc 1 1300 3 view .LVU1544 +1300:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5009 .loc 1 1300 23 is_stmt 0 view .LVU1545 + 5010 0064 4FF48043 mov r3, #16384 + 5011 0068 0293 str r3, [sp, #8] +1301:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5012 .loc 1 1301 3 is_stmt 1 view .LVU1546 +1301:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5013 .loc 1 1301 24 is_stmt 0 view .LVU1547 + 5014 006a CDF80C80 str r8, [sp, #12] +1302:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5015 .loc 1 1302 3 is_stmt 1 view .LVU1548 +1302:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5016 .loc 1 1302 25 is_stmt 0 view .LVU1549 + 5017 006e 0497 str r7, [sp, #16] +1303:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5018 .loc 1 1303 3 is_stmt 1 view .LVU1550 +1303:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5019 .loc 1 1303 30 is_stmt 0 view .LVU1551 + 5020 0070 0594 str r4, [sp, #20] + ARM GAS /tmp/ccuHnxNu.s page 264 - 4869 0072 0694 str r4, [sp, #24] -1285:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4870 .loc 1 1285 3 is_stmt 1 view .LVU1512 -1285:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4871 .loc 1 1285 29 is_stmt 0 view .LVU1513 - 4872 0074 0796 str r6, [sp, #28] -1286:Src/main.c **** - 4873 .loc 1 1286 3 is_stmt 1 view .LVU1514 - 4874 0076 02A9 add r1, sp, #8 - 4875 0078 2846 mov r0, r5 - 4876 007a FFF7FEFF bl LL_GPIO_Init - 4877 .LVL518: -1288:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4878 .loc 1 1288 3 view .LVU1515 -1288:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4879 .loc 1 1288 23 is_stmt 0 view .LVU1516 - 4880 007e 4FF40043 mov r3, #32768 - 4881 0082 0293 str r3, [sp, #8] -1289:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4882 .loc 1 1289 3 is_stmt 1 view .LVU1517 -1289:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4883 .loc 1 1289 24 is_stmt 0 view .LVU1518 - 4884 0084 CDF80C80 str r8, [sp, #12] -1290:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4885 .loc 1 1290 3 is_stmt 1 view .LVU1519 -1290:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4886 .loc 1 1290 25 is_stmt 0 view .LVU1520 - 4887 0088 0497 str r7, [sp, #16] -1291:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4888 .loc 1 1291 3 is_stmt 1 view .LVU1521 -1291:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4889 .loc 1 1291 30 is_stmt 0 view .LVU1522 - 4890 008a 0594 str r4, [sp, #20] -1292:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4891 .loc 1 1292 3 is_stmt 1 view .LVU1523 -1292:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4892 .loc 1 1292 24 is_stmt 0 view .LVU1524 - 4893 008c 0694 str r4, [sp, #24] -1293:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4894 .loc 1 1293 3 is_stmt 1 view .LVU1525 -1293:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4895 .loc 1 1293 29 is_stmt 0 view .LVU1526 - 4896 008e 0796 str r6, [sp, #28] -1294:Src/main.c **** - 4897 .loc 1 1294 3 is_stmt 1 view .LVU1527 - 4898 0090 02A9 add r1, sp, #8 - 4899 0092 2846 mov r0, r5 - 4900 0094 FFF7FEFF bl LL_GPIO_Init - 4901 .LVL519: -1300:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4902 .loc 1 1300 3 view .LVU1528 -1300:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4903 .loc 1 1300 36 is_stmt 0 view .LVU1529 - 4904 0098 0894 str r4, [sp, #32] -1301:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 4905 .loc 1 1301 3 is_stmt 1 view .LVU1530 -1301:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - ARM GAS /tmp/ccEQxcUB.s page 261 +1304:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5021 .loc 1 1304 3 is_stmt 1 view .LVU1552 +1304:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5022 .loc 1 1304 24 is_stmt 0 view .LVU1553 + 5023 0072 0694 str r4, [sp, #24] +1305:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5024 .loc 1 1305 3 is_stmt 1 view .LVU1554 +1305:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5025 .loc 1 1305 29 is_stmt 0 view .LVU1555 + 5026 0074 0796 str r6, [sp, #28] +1306:Src/main.c **** + 5027 .loc 1 1306 3 is_stmt 1 view .LVU1556 + 5028 0076 02A9 add r1, sp, #8 + 5029 0078 2846 mov r0, r5 + 5030 007a FFF7FEFF bl LL_GPIO_Init + 5031 .LVL521: +1308:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5032 .loc 1 1308 3 view .LVU1557 +1308:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5033 .loc 1 1308 23 is_stmt 0 view .LVU1558 + 5034 007e 4FF40043 mov r3, #32768 + 5035 0082 0293 str r3, [sp, #8] +1309:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5036 .loc 1 1309 3 is_stmt 1 view .LVU1559 +1309:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5037 .loc 1 1309 24 is_stmt 0 view .LVU1560 + 5038 0084 CDF80C80 str r8, [sp, #12] +1310:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5039 .loc 1 1310 3 is_stmt 1 view .LVU1561 +1310:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5040 .loc 1 1310 25 is_stmt 0 view .LVU1562 + 5041 0088 0497 str r7, [sp, #16] +1311:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5042 .loc 1 1311 3 is_stmt 1 view .LVU1563 +1311:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5043 .loc 1 1311 30 is_stmt 0 view .LVU1564 + 5044 008a 0594 str r4, [sp, #20] +1312:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5045 .loc 1 1312 3 is_stmt 1 view .LVU1565 +1312:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5046 .loc 1 1312 24 is_stmt 0 view .LVU1566 + 5047 008c 0694 str r4, [sp, #24] +1313:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5048 .loc 1 1313 3 is_stmt 1 view .LVU1567 +1313:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5049 .loc 1 1313 29 is_stmt 0 view .LVU1568 + 5050 008e 0796 str r6, [sp, #28] +1314:Src/main.c **** + 5051 .loc 1 1314 3 is_stmt 1 view .LVU1569 + 5052 0090 02A9 add r1, sp, #8 + 5053 0092 2846 mov r0, r5 + 5054 0094 FFF7FEFF bl LL_GPIO_Init + 5055 .LVL522: +1320:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5056 .loc 1 1320 3 view .LVU1570 +1320:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5057 .loc 1 1320 36 is_stmt 0 view .LVU1571 + ARM GAS /tmp/ccuHnxNu.s page 265 - 4906 .loc 1 1301 23 is_stmt 0 view .LVU1531 - 4907 009a 4FF48273 mov r3, #260 - 4908 009e 0993 str r3, [sp, #36] -1302:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - 4909 .loc 1 1302 3 is_stmt 1 view .LVU1532 -1302:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - 4910 .loc 1 1302 28 is_stmt 0 view .LVU1533 - 4911 00a0 4FF47063 mov r3, #3840 - 4912 00a4 0A93 str r3, [sp, #40] -1303:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 4913 .loc 1 1303 3 is_stmt 1 view .LVU1534 -1303:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 4914 .loc 1 1303 32 is_stmt 0 view .LVU1535 - 4915 00a6 0B94 str r4, [sp, #44] -1304:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4916 .loc 1 1304 3 is_stmt 1 view .LVU1536 -1304:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4917 .loc 1 1304 29 is_stmt 0 view .LVU1537 - 4918 00a8 0C94 str r4, [sp, #48] -1305:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 4919 .loc 1 1305 3 is_stmt 1 view .LVU1538 -1305:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 4920 .loc 1 1305 22 is_stmt 0 view .LVU1539 - 4921 00aa 4FF40073 mov r3, #512 - 4922 00ae 0D93 str r3, [sp, #52] -1306:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4923 .loc 1 1306 3 is_stmt 1 view .LVU1540 -1306:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4924 .loc 1 1306 27 is_stmt 0 view .LVU1541 - 4925 00b0 1023 movs r3, #16 - 4926 00b2 0E93 str r3, [sp, #56] -1307:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4927 .loc 1 1307 3 is_stmt 1 view .LVU1542 -1307:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4928 .loc 1 1307 27 is_stmt 0 view .LVU1543 - 4929 00b4 0F94 str r4, [sp, #60] -1308:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 4930 .loc 1 1308 3 is_stmt 1 view .LVU1544 -1308:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 4931 .loc 1 1308 33 is_stmt 0 view .LVU1545 - 4932 00b6 1094 str r4, [sp, #64] -1309:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 4933 .loc 1 1309 3 is_stmt 1 view .LVU1546 -1309:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 4934 .loc 1 1309 26 is_stmt 0 view .LVU1547 - 4935 00b8 0723 movs r3, #7 - 4936 00ba 1193 str r3, [sp, #68] -1310:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); - 4937 .loc 1 1310 3 is_stmt 1 view .LVU1548 - 4938 00bc 094C ldr r4, .L291+8 - 4939 00be 08A9 add r1, sp, #32 - 4940 00c0 2046 mov r0, r4 - 4941 00c2 FFF7FEFF bl LL_SPI_Init - 4942 .LVL520: -1311:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); - 4943 .loc 1 1311 3 view .LVU1549 - 4944 .LBB487: - ARM GAS /tmp/ccEQxcUB.s page 262 + 5058 0098 0894 str r4, [sp, #32] +1321:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5059 .loc 1 1321 3 is_stmt 1 view .LVU1572 +1321:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5060 .loc 1 1321 23 is_stmt 0 view .LVU1573 + 5061 009a 4FF48273 mov r3, #260 + 5062 009e 0993 str r3, [sp, #36] +1322:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 5063 .loc 1 1322 3 is_stmt 1 view .LVU1574 +1322:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 5064 .loc 1 1322 28 is_stmt 0 view .LVU1575 + 5065 00a0 4FF47063 mov r3, #3840 + 5066 00a4 0A93 str r3, [sp, #40] +1323:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5067 .loc 1 1323 3 is_stmt 1 view .LVU1576 +1323:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5068 .loc 1 1323 32 is_stmt 0 view .LVU1577 + 5069 00a6 0B94 str r4, [sp, #44] +1324:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5070 .loc 1 1324 3 is_stmt 1 view .LVU1578 +1324:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5071 .loc 1 1324 29 is_stmt 0 view .LVU1579 + 5072 00a8 0C94 str r4, [sp, #48] +1325:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 5073 .loc 1 1325 3 is_stmt 1 view .LVU1580 +1325:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 5074 .loc 1 1325 22 is_stmt 0 view .LVU1581 + 5075 00aa 4FF40073 mov r3, #512 + 5076 00ae 0D93 str r3, [sp, #52] +1326:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5077 .loc 1 1326 3 is_stmt 1 view .LVU1582 +1326:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5078 .loc 1 1326 27 is_stmt 0 view .LVU1583 + 5079 00b0 1023 movs r3, #16 + 5080 00b2 0E93 str r3, [sp, #56] +1327:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5081 .loc 1 1327 3 is_stmt 1 view .LVU1584 +1327:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5082 .loc 1 1327 27 is_stmt 0 view .LVU1585 + 5083 00b4 0F94 str r4, [sp, #60] +1328:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5084 .loc 1 1328 3 is_stmt 1 view .LVU1586 +1328:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5085 .loc 1 1328 33 is_stmt 0 view .LVU1587 + 5086 00b6 1094 str r4, [sp, #64] +1329:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 5087 .loc 1 1329 3 is_stmt 1 view .LVU1588 +1329:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 5088 .loc 1 1329 26 is_stmt 0 view .LVU1589 + 5089 00b8 0723 movs r3, #7 + 5090 00ba 1193 str r3, [sp, #68] +1330:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); + 5091 .loc 1 1330 3 is_stmt 1 view .LVU1590 + 5092 00bc 094C ldr r4, .L302+8 + 5093 00be 08A9 add r1, sp, #32 + 5094 00c0 2046 mov r0, r4 + 5095 00c2 FFF7FEFF bl LL_SPI_Init + ARM GAS /tmp/ccuHnxNu.s page 266 - 4945 .LBI487: + 5096 .LVL523: +1331:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); + 5097 .loc 1 1331 3 view .LVU1591 + 5098 .LBB490: + 5099 .LBI490: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4946 .loc 4 426 22 view .LVU1550 - 4947 .LBB488: + 5100 .loc 4 426 22 view .LVU1592 + 5101 .LBB491: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4948 .loc 4 428 3 view .LVU1551 - 4949 00c6 6368 ldr r3, [r4, #4] - 4950 00c8 23F01003 bic r3, r3, #16 - 4951 00cc 6360 str r3, [r4, #4] - 4952 .LVL521: + 5102 .loc 4 428 3 view .LVU1593 + 5103 00c6 6368 ldr r3, [r4, #4] + 5104 00c8 23F01003 bic r3, r3, #16 + 5105 00cc 6360 str r3, [r4, #4] + 5106 .LVL524: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4953 .loc 4 428 3 is_stmt 0 view .LVU1552 - 4954 .LBE488: - 4955 .LBE487: -1312:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ - 4956 .loc 1 1312 3 is_stmt 1 view .LVU1553 - 4957 .LBB489: - 4958 .LBI489: + 5107 .loc 4 428 3 is_stmt 0 view .LVU1594 + 5108 .LBE491: + 5109 .LBE490: +1332:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ + 5110 .loc 1 1332 3 is_stmt 1 view .LVU1595 + 5111 .LBB492: + 5112 .LBI492: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4959 .loc 4 874 22 view .LVU1554 - 4960 .LBB490: + 5113 .loc 4 874 22 view .LVU1596 + 5114 .LBB493: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4961 .loc 4 876 3 view .LVU1555 - 4962 00ce 6368 ldr r3, [r4, #4] - 4963 00d0 23F00803 bic r3, r3, #8 - 4964 00d4 6360 str r3, [r4, #4] - 4965 .LVL522: + 5115 .loc 4 876 3 view .LVU1597 + 5116 00ce 6368 ldr r3, [r4, #4] + 5117 00d0 23F00803 bic r3, r3, #8 + 5118 00d4 6360 str r3, [r4, #4] + 5119 .LVL525: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4966 .loc 4 876 3 is_stmt 0 view .LVU1556 - 4967 .LBE490: - 4968 .LBE489: -1317:Src/main.c **** - 4969 .loc 1 1317 1 view .LVU1557 - 4970 00d6 12B0 add sp, sp, #72 - 4971 .LCFI45: - 4972 .cfi_def_cfa_offset 24 - 4973 @ sp needed - 4974 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 4975 .L292: - 4976 .align 2 - 4977 .L291: - 4978 00dc 00380240 .word 1073887232 - 4979 00e0 00040240 .word 1073873920 - 4980 00e4 00380040 .word 1073756160 - 4981 .cfi_endproc - 4982 .LFE1191: - 4984 .section .text.MX_SPI5_Init,"ax",%progbits - 4985 .align 1 - 4986 .syntax unified - 4987 .thumb - 4988 .thumb_func - 4990 MX_SPI5_Init: - 4991 .LFB1193: -1388:Src/main.c **** - 4992 .loc 1 1388 1 is_stmt 1 view -0 - 4993 .cfi_startproc - 4994 @ args = 0, pretend = 0, frame = 72 - ARM GAS /tmp/ccEQxcUB.s page 263 + 5120 .loc 4 876 3 is_stmt 0 view .LVU1598 + 5121 .LBE493: + 5122 .LBE492: +1337:Src/main.c **** + 5123 .loc 1 1337 1 view .LVU1599 + 5124 00d6 12B0 add sp, sp, #72 + 5125 .LCFI48: + 5126 .cfi_def_cfa_offset 24 + 5127 @ sp needed + 5128 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 5129 .L303: + 5130 .align 2 + 5131 .L302: + 5132 00dc 00380240 .word 1073887232 + 5133 00e0 00040240 .word 1073873920 + 5134 00e4 00380040 .word 1073756160 + 5135 .cfi_endproc + 5136 .LFE1191: + 5138 .section .text.MX_SPI5_Init,"ax",%progbits + 5139 .align 1 + 5140 .syntax unified + 5141 .thumb + 5142 .thumb_func + 5144 MX_SPI5_Init: + 5145 .LFB1193: + ARM GAS /tmp/ccuHnxNu.s page 267 - 4995 @ frame_needed = 0, uses_anonymous_args = 0 - 4996 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 4997 .LCFI46: - 4998 .cfi_def_cfa_offset 24 - 4999 .cfi_offset 4, -24 - 5000 .cfi_offset 5, -20 - 5001 .cfi_offset 6, -16 - 5002 .cfi_offset 7, -12 - 5003 .cfi_offset 8, -8 - 5004 .cfi_offset 14, -4 - 5005 0004 92B0 sub sp, sp, #72 - 5006 .LCFI47: - 5007 .cfi_def_cfa_offset 96 -1394:Src/main.c **** - 5008 .loc 1 1394 3 view .LVU1559 -1394:Src/main.c **** - 5009 .loc 1 1394 22 is_stmt 0 view .LVU1560 - 5010 0006 2822 movs r2, #40 - 5011 0008 0021 movs r1, #0 - 5012 000a 08A8 add r0, sp, #32 - 5013 000c FFF7FEFF bl memset - 5014 .LVL523: -1396:Src/main.c **** - 5015 .loc 1 1396 3 is_stmt 1 view .LVU1561 -1396:Src/main.c **** - 5016 .loc 1 1396 23 is_stmt 0 view .LVU1562 - 5017 0010 0024 movs r4, #0 - 5018 0012 0294 str r4, [sp, #8] - 5019 0014 0394 str r4, [sp, #12] - 5020 0016 0494 str r4, [sp, #16] - 5021 0018 0594 str r4, [sp, #20] - 5022 001a 0694 str r4, [sp, #24] - 5023 001c 0794 str r4, [sp, #28] -1399:Src/main.c **** - 5024 .loc 1 1399 3 is_stmt 1 view .LVU1563 - 5025 .LVL524: - 5026 .LBB491: - 5027 .LBI491: +1408:Src/main.c **** + 5146 .loc 1 1408 1 is_stmt 1 view -0 + 5147 .cfi_startproc + 5148 @ args = 0, pretend = 0, frame = 72 + 5149 @ frame_needed = 0, uses_anonymous_args = 0 + 5150 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 5151 .LCFI49: + 5152 .cfi_def_cfa_offset 24 + 5153 .cfi_offset 4, -24 + 5154 .cfi_offset 5, -20 + 5155 .cfi_offset 6, -16 + 5156 .cfi_offset 7, -12 + 5157 .cfi_offset 8, -8 + 5158 .cfi_offset 14, -4 + 5159 0004 92B0 sub sp, sp, #72 + 5160 .LCFI50: + 5161 .cfi_def_cfa_offset 96 +1414:Src/main.c **** + 5162 .loc 1 1414 3 view .LVU1601 +1414:Src/main.c **** + 5163 .loc 1 1414 22 is_stmt 0 view .LVU1602 + 5164 0006 2822 movs r2, #40 + 5165 0008 0021 movs r1, #0 + 5166 000a 08A8 add r0, sp, #32 + 5167 000c FFF7FEFF bl memset + 5168 .LVL526: +1416:Src/main.c **** + 5169 .loc 1 1416 3 is_stmt 1 view .LVU1603 +1416:Src/main.c **** + 5170 .loc 1 1416 23 is_stmt 0 view .LVU1604 + 5171 0010 0024 movs r4, #0 + 5172 0012 0294 str r4, [sp, #8] + 5173 0014 0394 str r4, [sp, #12] + 5174 0016 0494 str r4, [sp, #16] + 5175 0018 0594 str r4, [sp, #20] + 5176 001a 0694 str r4, [sp, #24] + 5177 001c 0794 str r4, [sp, #28] +1419:Src/main.c **** + 5178 .loc 1 1419 3 is_stmt 1 view .LVU1605 + 5179 .LVL527: + 5180 .LBB494: + 5181 .LBI494: 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5028 .loc 3 1587 22 view .LVU1564 - 5029 .LBB492: + 5182 .loc 3 1587 22 view .LVU1606 + 5183 .LBB495: 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 5030 .loc 3 1589 3 view .LVU1565 + 5184 .loc 3 1589 3 view .LVU1607 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5031 .loc 3 1590 3 view .LVU1566 - 5032 001e 294B ldr r3, .L295 - 5033 0020 5A6C ldr r2, [r3, #68] - 5034 0022 42F48012 orr r2, r2, #1048576 - 5035 0026 5A64 str r2, [r3, #68] + 5185 .loc 3 1590 3 view .LVU1608 + 5186 001e 294B ldr r3, .L306 + 5187 0020 5A6C ldr r2, [r3, #68] + 5188 0022 42F48012 orr r2, r2, #1048576 + 5189 0026 5A64 str r2, [r3, #68] 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5036 .loc 3 1592 3 view .LVU1567 + 5190 .loc 3 1592 3 view .LVU1609 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5037 .loc 3 1592 12 is_stmt 0 view .LVU1568 - 5038 0028 5A6C ldr r2, [r3, #68] - 5039 002a 02F48012 and r2, r2, #1048576 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5040 .loc 3 1592 10 view .LVU1569 - ARM GAS /tmp/ccEQxcUB.s page 264 + 5191 .loc 3 1592 12 is_stmt 0 view .LVU1610 + ARM GAS /tmp/ccuHnxNu.s page 268 - 5041 002e 0192 str r2, [sp, #4] - 5042 .loc 3 1593 3 is_stmt 1 view .LVU1570 - 5043 0030 019A ldr r2, [sp, #4] - 5044 .LVL525: - 5045 .loc 3 1593 3 is_stmt 0 view .LVU1571 - 5046 .LBE492: - 5047 .LBE491: -1401:Src/main.c **** /**SPI5 GPIO Configuration - 5048 .loc 1 1401 3 is_stmt 1 view .LVU1572 - 5049 .LBB493: - 5050 .LBI493: + 5192 0028 5A6C ldr r2, [r3, #68] + 5193 002a 02F48012 and r2, r2, #1048576 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5194 .loc 3 1592 10 view .LVU1611 + 5195 002e 0192 str r2, [sp, #4] + 5196 .loc 3 1593 3 is_stmt 1 view .LVU1612 + 5197 0030 019A ldr r2, [sp, #4] + 5198 .LVL528: + 5199 .loc 3 1593 3 is_stmt 0 view .LVU1613 + 5200 .LBE495: + 5201 .LBE494: +1421:Src/main.c **** /**SPI5 GPIO Configuration + 5202 .loc 1 1421 3 is_stmt 1 view .LVU1614 + 5203 .LBB496: + 5204 .LBI496: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5051 .loc 3 309 22 view .LVU1573 - 5052 .LBB494: + 5205 .loc 3 309 22 view .LVU1615 + 5206 .LBB497: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 5053 .loc 3 311 3 view .LVU1574 + 5207 .loc 3 311 3 view .LVU1616 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5054 .loc 3 312 3 view .LVU1575 - 5055 0032 1A6B ldr r2, [r3, #48] - 5056 0034 42F02002 orr r2, r2, #32 - 5057 0038 1A63 str r2, [r3, #48] + 5208 .loc 3 312 3 view .LVU1617 + 5209 0032 1A6B ldr r2, [r3, #48] + 5210 0034 42F02002 orr r2, r2, #32 + 5211 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5058 .loc 3 314 3 view .LVU1576 + 5212 .loc 3 314 3 view .LVU1618 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5059 .loc 3 314 12 is_stmt 0 view .LVU1577 - 5060 003a 1B6B ldr r3, [r3, #48] - 5061 003c 03F02003 and r3, r3, #32 + 5213 .loc 3 314 12 is_stmt 0 view .LVU1619 + 5214 003a 1B6B ldr r3, [r3, #48] + 5215 003c 03F02003 and r3, r3, #32 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5062 .loc 3 314 10 view .LVU1578 - 5063 0040 0093 str r3, [sp] + 5216 .loc 3 314 10 view .LVU1620 + 5217 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5064 .loc 3 315 3 is_stmt 1 view .LVU1579 - 5065 0042 009B ldr r3, [sp] - 5066 .LVL526: + 5218 .loc 3 315 3 is_stmt 1 view .LVU1621 + 5219 0042 009B ldr r3, [sp] + 5220 .LVL529: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5067 .loc 3 315 3 is_stmt 0 view .LVU1580 - 5068 .LBE494: - 5069 .LBE493: -1406:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5070 .loc 1 1406 3 is_stmt 1 view .LVU1581 -1406:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5071 .loc 1 1406 23 is_stmt 0 view .LVU1582 - 5072 0044 8023 movs r3, #128 - 5073 0046 0293 str r3, [sp, #8] -1407:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5074 .loc 1 1407 3 is_stmt 1 view .LVU1583 -1407:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5075 .loc 1 1407 24 is_stmt 0 view .LVU1584 - 5076 0048 0225 movs r5, #2 - 5077 004a 0395 str r5, [sp, #12] -1408:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5078 .loc 1 1408 3 is_stmt 1 view .LVU1585 -1408:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5079 .loc 1 1408 25 is_stmt 0 view .LVU1586 - 5080 004c 4FF00308 mov r8, #3 - 5081 0050 CDF81080 str r8, [sp, #16] -1409:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - ARM GAS /tmp/ccEQxcUB.s page 265 + 5221 .loc 3 315 3 is_stmt 0 view .LVU1622 + 5222 .LBE497: + 5223 .LBE496: +1426:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5224 .loc 1 1426 3 is_stmt 1 view .LVU1623 +1426:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5225 .loc 1 1426 23 is_stmt 0 view .LVU1624 + 5226 0044 8023 movs r3, #128 + 5227 0046 0293 str r3, [sp, #8] +1427:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5228 .loc 1 1427 3 is_stmt 1 view .LVU1625 +1427:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5229 .loc 1 1427 24 is_stmt 0 view .LVU1626 + 5230 0048 0225 movs r5, #2 + 5231 004a 0395 str r5, [sp, #12] +1428:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5232 .loc 1 1428 3 is_stmt 1 view .LVU1627 +1428:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + ARM GAS /tmp/ccuHnxNu.s page 269 - 5082 .loc 1 1409 3 is_stmt 1 view .LVU1587 -1410:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5083 .loc 1 1410 3 view .LVU1588 -1411:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5084 .loc 1 1411 3 view .LVU1589 -1411:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5085 .loc 1 1411 29 is_stmt 0 view .LVU1590 - 5086 0054 0527 movs r7, #5 - 5087 0056 0797 str r7, [sp, #28] -1412:Src/main.c **** - 5088 .loc 1 1412 3 is_stmt 1 view .LVU1591 - 5089 0058 1B4E ldr r6, .L295+4 - 5090 005a 02A9 add r1, sp, #8 - 5091 005c 3046 mov r0, r6 - 5092 005e FFF7FEFF bl LL_GPIO_Init - 5093 .LVL527: -1414:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5094 .loc 1 1414 3 view .LVU1592 -1414:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5095 .loc 1 1414 23 is_stmt 0 view .LVU1593 - 5096 0062 4FF48073 mov r3, #256 - 5097 0066 0293 str r3, [sp, #8] -1415:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5098 .loc 1 1415 3 is_stmt 1 view .LVU1594 -1415:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5099 .loc 1 1415 24 is_stmt 0 view .LVU1595 - 5100 0068 0395 str r5, [sp, #12] -1416:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5101 .loc 1 1416 3 is_stmt 1 view .LVU1596 -1416:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5102 .loc 1 1416 25 is_stmt 0 view .LVU1597 - 5103 006a CDF81080 str r8, [sp, #16] -1417:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5104 .loc 1 1417 3 is_stmt 1 view .LVU1598 -1417:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5105 .loc 1 1417 30 is_stmt 0 view .LVU1599 - 5106 006e 0594 str r4, [sp, #20] -1418:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5107 .loc 1 1418 3 is_stmt 1 view .LVU1600 -1418:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5108 .loc 1 1418 24 is_stmt 0 view .LVU1601 - 5109 0070 0694 str r4, [sp, #24] -1419:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5110 .loc 1 1419 3 is_stmt 1 view .LVU1602 -1419:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5111 .loc 1 1419 29 is_stmt 0 view .LVU1603 - 5112 0072 0797 str r7, [sp, #28] -1420:Src/main.c **** - 5113 .loc 1 1420 3 is_stmt 1 view .LVU1604 - 5114 0074 02A9 add r1, sp, #8 - 5115 0076 3046 mov r0, r6 - 5116 0078 FFF7FEFF bl LL_GPIO_Init - 5117 .LVL528: -1426:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5118 .loc 1 1426 3 view .LVU1605 -1426:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5119 .loc 1 1426 36 is_stmt 0 view .LVU1606 - ARM GAS /tmp/ccEQxcUB.s page 266 + 5233 .loc 1 1428 25 is_stmt 0 view .LVU1628 + 5234 004c 4FF00308 mov r8, #3 + 5235 0050 CDF81080 str r8, [sp, #16] +1429:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5236 .loc 1 1429 3 is_stmt 1 view .LVU1629 +1430:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5237 .loc 1 1430 3 view .LVU1630 +1431:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5238 .loc 1 1431 3 view .LVU1631 +1431:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5239 .loc 1 1431 29 is_stmt 0 view .LVU1632 + 5240 0054 0527 movs r7, #5 + 5241 0056 0797 str r7, [sp, #28] +1432:Src/main.c **** + 5242 .loc 1 1432 3 is_stmt 1 view .LVU1633 + 5243 0058 1B4E ldr r6, .L306+4 + 5244 005a 02A9 add r1, sp, #8 + 5245 005c 3046 mov r0, r6 + 5246 005e FFF7FEFF bl LL_GPIO_Init + 5247 .LVL530: +1434:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5248 .loc 1 1434 3 view .LVU1634 +1434:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5249 .loc 1 1434 23 is_stmt 0 view .LVU1635 + 5250 0062 4FF48073 mov r3, #256 + 5251 0066 0293 str r3, [sp, #8] +1435:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5252 .loc 1 1435 3 is_stmt 1 view .LVU1636 +1435:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5253 .loc 1 1435 24 is_stmt 0 view .LVU1637 + 5254 0068 0395 str r5, [sp, #12] +1436:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5255 .loc 1 1436 3 is_stmt 1 view .LVU1638 +1436:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5256 .loc 1 1436 25 is_stmt 0 view .LVU1639 + 5257 006a CDF81080 str r8, [sp, #16] +1437:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5258 .loc 1 1437 3 is_stmt 1 view .LVU1640 +1437:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5259 .loc 1 1437 30 is_stmt 0 view .LVU1641 + 5260 006e 0594 str r4, [sp, #20] +1438:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5261 .loc 1 1438 3 is_stmt 1 view .LVU1642 +1438:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5262 .loc 1 1438 24 is_stmt 0 view .LVU1643 + 5263 0070 0694 str r4, [sp, #24] +1439:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5264 .loc 1 1439 3 is_stmt 1 view .LVU1644 +1439:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5265 .loc 1 1439 29 is_stmt 0 view .LVU1645 + 5266 0072 0797 str r7, [sp, #28] +1440:Src/main.c **** + 5267 .loc 1 1440 3 is_stmt 1 view .LVU1646 + 5268 0074 02A9 add r1, sp, #8 + 5269 0076 3046 mov r0, r6 + 5270 0078 FFF7FEFF bl LL_GPIO_Init + 5271 .LVL531: + ARM GAS /tmp/ccuHnxNu.s page 270 - 5120 007c 4FF48063 mov r3, #1024 - 5121 0080 0893 str r3, [sp, #32] -1427:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5122 .loc 1 1427 3 is_stmt 1 view .LVU1607 -1427:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5123 .loc 1 1427 23 is_stmt 0 view .LVU1608 - 5124 0082 4FF48273 mov r3, #260 - 5125 0086 0993 str r3, [sp, #36] -1428:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5126 .loc 1 1428 3 is_stmt 1 view .LVU1609 -1428:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5127 .loc 1 1428 28 is_stmt 0 view .LVU1610 - 5128 0088 4FF47063 mov r3, #3840 - 5129 008c 0A93 str r3, [sp, #40] -1429:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 5130 .loc 1 1429 3 is_stmt 1 view .LVU1611 -1429:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 5131 .loc 1 1429 32 is_stmt 0 view .LVU1612 - 5132 008e 0B95 str r5, [sp, #44] -1430:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5133 .loc 1 1430 3 is_stmt 1 view .LVU1613 -1430:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5134 .loc 1 1430 29 is_stmt 0 view .LVU1614 - 5135 0090 0C94 str r4, [sp, #48] -1431:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5136 .loc 1 1431 3 is_stmt 1 view .LVU1615 -1431:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5137 .loc 1 1431 22 is_stmt 0 view .LVU1616 - 5138 0092 4FF40073 mov r3, #512 - 5139 0096 0D93 str r3, [sp, #52] -1432:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5140 .loc 1 1432 3 is_stmt 1 view .LVU1617 -1432:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5141 .loc 1 1432 27 is_stmt 0 view .LVU1618 - 5142 0098 1823 movs r3, #24 - 5143 009a 0E93 str r3, [sp, #56] -1433:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5144 .loc 1 1433 3 is_stmt 1 view .LVU1619 -1433:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5145 .loc 1 1433 27 is_stmt 0 view .LVU1620 - 5146 009c 0F94 str r4, [sp, #60] -1434:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5147 .loc 1 1434 3 is_stmt 1 view .LVU1621 -1434:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5148 .loc 1 1434 33 is_stmt 0 view .LVU1622 - 5149 009e 1094 str r4, [sp, #64] -1435:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 5150 .loc 1 1435 3 is_stmt 1 view .LVU1623 -1435:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 5151 .loc 1 1435 26 is_stmt 0 view .LVU1624 - 5152 00a0 0723 movs r3, #7 - 5153 00a2 1193 str r3, [sp, #68] -1436:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); - 5154 .loc 1 1436 3 is_stmt 1 view .LVU1625 - 5155 00a4 094C ldr r4, .L295+8 - 5156 00a6 08A9 add r1, sp, #32 - 5157 00a8 2046 mov r0, r4 - ARM GAS /tmp/ccEQxcUB.s page 267 +1446:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5272 .loc 1 1446 3 view .LVU1647 +1446:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5273 .loc 1 1446 36 is_stmt 0 view .LVU1648 + 5274 007c 4FF48063 mov r3, #1024 + 5275 0080 0893 str r3, [sp, #32] +1447:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5276 .loc 1 1447 3 is_stmt 1 view .LVU1649 +1447:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5277 .loc 1 1447 23 is_stmt 0 view .LVU1650 + 5278 0082 4FF48273 mov r3, #260 + 5279 0086 0993 str r3, [sp, #36] +1448:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5280 .loc 1 1448 3 is_stmt 1 view .LVU1651 +1448:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5281 .loc 1 1448 28 is_stmt 0 view .LVU1652 + 5282 0088 4FF47063 mov r3, #3840 + 5283 008c 0A93 str r3, [sp, #40] +1449:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5284 .loc 1 1449 3 is_stmt 1 view .LVU1653 +1449:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5285 .loc 1 1449 32 is_stmt 0 view .LVU1654 + 5286 008e 0B95 str r5, [sp, #44] +1450:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5287 .loc 1 1450 3 is_stmt 1 view .LVU1655 +1450:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5288 .loc 1 1450 29 is_stmt 0 view .LVU1656 + 5289 0090 0C94 str r4, [sp, #48] +1451:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5290 .loc 1 1451 3 is_stmt 1 view .LVU1657 +1451:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5291 .loc 1 1451 22 is_stmt 0 view .LVU1658 + 5292 0092 4FF40073 mov r3, #512 + 5293 0096 0D93 str r3, [sp, #52] +1452:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5294 .loc 1 1452 3 is_stmt 1 view .LVU1659 +1452:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5295 .loc 1 1452 27 is_stmt 0 view .LVU1660 + 5296 0098 1823 movs r3, #24 + 5297 009a 0E93 str r3, [sp, #56] +1453:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5298 .loc 1 1453 3 is_stmt 1 view .LVU1661 +1453:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5299 .loc 1 1453 27 is_stmt 0 view .LVU1662 + 5300 009c 0F94 str r4, [sp, #60] +1454:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5301 .loc 1 1454 3 is_stmt 1 view .LVU1663 +1454:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5302 .loc 1 1454 33 is_stmt 0 view .LVU1664 + 5303 009e 1094 str r4, [sp, #64] +1455:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 5304 .loc 1 1455 3 is_stmt 1 view .LVU1665 +1455:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 5305 .loc 1 1455 26 is_stmt 0 view .LVU1666 + 5306 00a0 0723 movs r3, #7 + 5307 00a2 1193 str r3, [sp, #68] +1456:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); + ARM GAS /tmp/ccuHnxNu.s page 271 - 5158 00aa FFF7FEFF bl LL_SPI_Init - 5159 .LVL529: -1437:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); - 5160 .loc 1 1437 3 view .LVU1626 - 5161 .LBB495: - 5162 .LBI495: + 5308 .loc 1 1456 3 is_stmt 1 view .LVU1667 + 5309 00a4 094C ldr r4, .L306+8 + 5310 00a6 08A9 add r1, sp, #32 + 5311 00a8 2046 mov r0, r4 + 5312 00aa FFF7FEFF bl LL_SPI_Init + 5313 .LVL532: +1457:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); + 5314 .loc 1 1457 3 view .LVU1668 + 5315 .LBB498: + 5316 .LBI498: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5163 .loc 4 426 22 view .LVU1627 - 5164 .LBB496: + 5317 .loc 4 426 22 view .LVU1669 + 5318 .LBB499: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5165 .loc 4 428 3 view .LVU1628 - 5166 00ae 6368 ldr r3, [r4, #4] - 5167 00b0 23F01003 bic r3, r3, #16 - 5168 00b4 6360 str r3, [r4, #4] - 5169 .LVL530: + 5319 .loc 4 428 3 view .LVU1670 + 5320 00ae 6368 ldr r3, [r4, #4] + 5321 00b0 23F01003 bic r3, r3, #16 + 5322 00b4 6360 str r3, [r4, #4] + 5323 .LVL533: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5170 .loc 4 428 3 is_stmt 0 view .LVU1629 - 5171 .LBE496: - 5172 .LBE495: -1438:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ - 5173 .loc 1 1438 3 is_stmt 1 view .LVU1630 - 5174 .LBB497: - 5175 .LBI497: + 5324 .loc 4 428 3 is_stmt 0 view .LVU1671 + 5325 .LBE499: + 5326 .LBE498: +1458:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ + 5327 .loc 1 1458 3 is_stmt 1 view .LVU1672 + 5328 .LBB500: + 5329 .LBI500: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5176 .loc 4 874 22 view .LVU1631 - 5177 .LBB498: + 5330 .loc 4 874 22 view .LVU1673 + 5331 .LBB501: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5178 .loc 4 876 3 view .LVU1632 - 5179 00b6 6368 ldr r3, [r4, #4] - 5180 00b8 23F00803 bic r3, r3, #8 - 5181 00bc 6360 str r3, [r4, #4] - 5182 .LVL531: + 5332 .loc 4 876 3 view .LVU1674 + 5333 00b6 6368 ldr r3, [r4, #4] + 5334 00b8 23F00803 bic r3, r3, #8 + 5335 00bc 6360 str r3, [r4, #4] + 5336 .LVL534: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5183 .loc 4 876 3 is_stmt 0 view .LVU1633 - 5184 .LBE498: - 5185 .LBE497: -1443:Src/main.c **** - 5186 .loc 1 1443 1 view .LVU1634 - 5187 00be 12B0 add sp, sp, #72 - 5188 .LCFI48: - 5189 .cfi_def_cfa_offset 24 - 5190 @ sp needed - 5191 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 5192 .L296: - 5193 .align 2 - 5194 .L295: - 5195 00c4 00380240 .word 1073887232 - 5196 00c8 00140240 .word 1073878016 - 5197 00cc 00500140 .word 1073827840 - 5198 .cfi_endproc - 5199 .LFE1193: - 5201 .section .text.MX_SPI6_Init,"ax",%progbits - 5202 .align 1 - 5203 .syntax unified - 5204 .thumb - 5205 .thumb_func - 5207 MX_SPI6_Init: - ARM GAS /tmp/ccEQxcUB.s page 268 + 5337 .loc 4 876 3 is_stmt 0 view .LVU1675 + 5338 .LBE501: + 5339 .LBE500: +1463:Src/main.c **** + 5340 .loc 1 1463 1 view .LVU1676 + 5341 00be 12B0 add sp, sp, #72 + 5342 .LCFI51: + 5343 .cfi_def_cfa_offset 24 + 5344 @ sp needed + 5345 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 5346 .L307: + 5347 .align 2 + 5348 .L306: + 5349 00c4 00380240 .word 1073887232 + 5350 00c8 00140240 .word 1073878016 + 5351 00cc 00500140 .word 1073827840 + 5352 .cfi_endproc + 5353 .LFE1193: + 5355 .section .text.MX_SPI6_Init,"ax",%progbits + 5356 .align 1 + ARM GAS /tmp/ccuHnxNu.s page 272 - 5208 .LFB1194: -1451:Src/main.c **** - 5209 .loc 1 1451 1 is_stmt 1 view -0 - 5210 .cfi_startproc - 5211 @ args = 0, pretend = 0, frame = 72 - 5212 @ frame_needed = 0, uses_anonymous_args = 0 - 5213 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 5214 .LCFI49: - 5215 .cfi_def_cfa_offset 24 - 5216 .cfi_offset 4, -24 - 5217 .cfi_offset 5, -20 - 5218 .cfi_offset 6, -16 - 5219 .cfi_offset 7, -12 - 5220 .cfi_offset 8, -8 - 5221 .cfi_offset 14, -4 - 5222 0004 92B0 sub sp, sp, #72 - 5223 .LCFI50: - 5224 .cfi_def_cfa_offset 96 -1457:Src/main.c **** - 5225 .loc 1 1457 3 view .LVU1636 -1457:Src/main.c **** - 5226 .loc 1 1457 22 is_stmt 0 view .LVU1637 - 5227 0006 2822 movs r2, #40 - 5228 0008 0021 movs r1, #0 - 5229 000a 08A8 add r0, sp, #32 - 5230 000c FFF7FEFF bl memset - 5231 .LVL532: -1459:Src/main.c **** - 5232 .loc 1 1459 3 is_stmt 1 view .LVU1638 -1459:Src/main.c **** - 5233 .loc 1 1459 23 is_stmt 0 view .LVU1639 - 5234 0010 0024 movs r4, #0 - 5235 0012 0294 str r4, [sp, #8] - 5236 0014 0394 str r4, [sp, #12] - 5237 0016 0494 str r4, [sp, #16] - 5238 0018 0594 str r4, [sp, #20] - 5239 001a 0694 str r4, [sp, #24] - 5240 001c 0794 str r4, [sp, #28] -1462:Src/main.c **** - 5241 .loc 1 1462 3 is_stmt 1 view .LVU1640 - 5242 .LVL533: - 5243 .LBB499: - 5244 .LBI499: + 5357 .syntax unified + 5358 .thumb + 5359 .thumb_func + 5361 MX_SPI6_Init: + 5362 .LFB1194: +1471:Src/main.c **** + 5363 .loc 1 1471 1 is_stmt 1 view -0 + 5364 .cfi_startproc + 5365 @ args = 0, pretend = 0, frame = 72 + 5366 @ frame_needed = 0, uses_anonymous_args = 0 + 5367 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 5368 .LCFI52: + 5369 .cfi_def_cfa_offset 24 + 5370 .cfi_offset 4, -24 + 5371 .cfi_offset 5, -20 + 5372 .cfi_offset 6, -16 + 5373 .cfi_offset 7, -12 + 5374 .cfi_offset 8, -8 + 5375 .cfi_offset 14, -4 + 5376 0004 92B0 sub sp, sp, #72 + 5377 .LCFI53: + 5378 .cfi_def_cfa_offset 96 +1477:Src/main.c **** + 5379 .loc 1 1477 3 view .LVU1678 +1477:Src/main.c **** + 5380 .loc 1 1477 22 is_stmt 0 view .LVU1679 + 5381 0006 2822 movs r2, #40 + 5382 0008 0021 movs r1, #0 + 5383 000a 08A8 add r0, sp, #32 + 5384 000c FFF7FEFF bl memset + 5385 .LVL535: +1479:Src/main.c **** + 5386 .loc 1 1479 3 is_stmt 1 view .LVU1680 +1479:Src/main.c **** + 5387 .loc 1 1479 23 is_stmt 0 view .LVU1681 + 5388 0010 0024 movs r4, #0 + 5389 0012 0294 str r4, [sp, #8] + 5390 0014 0394 str r4, [sp, #12] + 5391 0016 0494 str r4, [sp, #16] + 5392 0018 0594 str r4, [sp, #20] + 5393 001a 0694 str r4, [sp, #24] + 5394 001c 0794 str r4, [sp, #28] +1482:Src/main.c **** + 5395 .loc 1 1482 3 is_stmt 1 view .LVU1682 + 5396 .LVL536: + 5397 .LBB502: + 5398 .LBI502: 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5245 .loc 3 1587 22 view .LVU1641 - 5246 .LBB500: + 5399 .loc 3 1587 22 view .LVU1683 + 5400 .LBB503: 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 5247 .loc 3 1589 3 view .LVU1642 + 5401 .loc 3 1589 3 view .LVU1684 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5248 .loc 3 1590 3 view .LVU1643 - 5249 001e 294B ldr r3, .L299 - 5250 0020 5A6C ldr r2, [r3, #68] - 5251 0022 42F40012 orr r2, r2, #2097152 - 5252 0026 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5253 .loc 3 1592 3 view .LVU1644 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - ARM GAS /tmp/ccEQxcUB.s page 269 + 5402 .loc 3 1590 3 view .LVU1685 + 5403 001e 294B ldr r3, .L310 + 5404 0020 5A6C ldr r2, [r3, #68] + 5405 0022 42F40012 orr r2, r2, #2097152 + ARM GAS /tmp/ccuHnxNu.s page 273 - 5254 .loc 3 1592 12 is_stmt 0 view .LVU1645 - 5255 0028 5A6C ldr r2, [r3, #68] - 5256 002a 02F40012 and r2, r2, #2097152 + 5406 0026 5A64 str r2, [r3, #68] 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5257 .loc 3 1592 10 view .LVU1646 - 5258 002e 0192 str r2, [sp, #4] - 5259 .loc 3 1593 3 is_stmt 1 view .LVU1647 - 5260 0030 019A ldr r2, [sp, #4] - 5261 .LVL534: - 5262 .loc 3 1593 3 is_stmt 0 view .LVU1648 - 5263 .LBE500: - 5264 .LBE499: -1464:Src/main.c **** /**SPI6 GPIO Configuration - 5265 .loc 1 1464 3 is_stmt 1 view .LVU1649 - 5266 .LBB501: - 5267 .LBI501: + 5407 .loc 3 1592 3 view .LVU1686 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5408 .loc 3 1592 12 is_stmt 0 view .LVU1687 + 5409 0028 5A6C ldr r2, [r3, #68] + 5410 002a 02F40012 and r2, r2, #2097152 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5411 .loc 3 1592 10 view .LVU1688 + 5412 002e 0192 str r2, [sp, #4] + 5413 .loc 3 1593 3 is_stmt 1 view .LVU1689 + 5414 0030 019A ldr r2, [sp, #4] + 5415 .LVL537: + 5416 .loc 3 1593 3 is_stmt 0 view .LVU1690 + 5417 .LBE503: + 5418 .LBE502: +1484:Src/main.c **** /**SPI6 GPIO Configuration + 5419 .loc 1 1484 3 is_stmt 1 view .LVU1691 + 5420 .LBB504: + 5421 .LBI504: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5268 .loc 3 309 22 view .LVU1650 - 5269 .LBB502: + 5422 .loc 3 309 22 view .LVU1692 + 5423 .LBB505: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 5270 .loc 3 311 3 view .LVU1651 + 5424 .loc 3 311 3 view .LVU1693 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5271 .loc 3 312 3 view .LVU1652 - 5272 0032 1A6B ldr r2, [r3, #48] - 5273 0034 42F00102 orr r2, r2, #1 - 5274 0038 1A63 str r2, [r3, #48] + 5425 .loc 3 312 3 view .LVU1694 + 5426 0032 1A6B ldr r2, [r3, #48] + 5427 0034 42F00102 orr r2, r2, #1 + 5428 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5275 .loc 3 314 3 view .LVU1653 + 5429 .loc 3 314 3 view .LVU1695 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5276 .loc 3 314 12 is_stmt 0 view .LVU1654 - 5277 003a 1B6B ldr r3, [r3, #48] - 5278 003c 03F00103 and r3, r3, #1 + 5430 .loc 3 314 12 is_stmt 0 view .LVU1696 + 5431 003a 1B6B ldr r3, [r3, #48] + 5432 003c 03F00103 and r3, r3, #1 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5279 .loc 3 314 10 view .LVU1655 - 5280 0040 0093 str r3, [sp] + 5433 .loc 3 314 10 view .LVU1697 + 5434 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5281 .loc 3 315 3 is_stmt 1 view .LVU1656 - 5282 0042 009B ldr r3, [sp] - 5283 .LVL535: + 5435 .loc 3 315 3 is_stmt 1 view .LVU1698 + 5436 0042 009B ldr r3, [sp] + 5437 .LVL538: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5284 .loc 3 315 3 is_stmt 0 view .LVU1657 - 5285 .LBE502: - 5286 .LBE501: -1469:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5287 .loc 1 1469 3 is_stmt 1 view .LVU1658 -1469:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5288 .loc 1 1469 23 is_stmt 0 view .LVU1659 - 5289 0044 2023 movs r3, #32 - 5290 0046 0293 str r3, [sp, #8] -1470:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5291 .loc 1 1470 3 is_stmt 1 view .LVU1660 -1470:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5292 .loc 1 1470 24 is_stmt 0 view .LVU1661 - 5293 0048 0225 movs r5, #2 - 5294 004a 0395 str r5, [sp, #12] -1471:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5295 .loc 1 1471 3 is_stmt 1 view .LVU1662 - ARM GAS /tmp/ccEQxcUB.s page 270 + 5438 .loc 3 315 3 is_stmt 0 view .LVU1699 + 5439 .LBE505: + 5440 .LBE504: +1489:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5441 .loc 1 1489 3 is_stmt 1 view .LVU1700 +1489:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5442 .loc 1 1489 23 is_stmt 0 view .LVU1701 + 5443 0044 2023 movs r3, #32 + 5444 0046 0293 str r3, [sp, #8] +1490:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5445 .loc 1 1490 3 is_stmt 1 view .LVU1702 +1490:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5446 .loc 1 1490 24 is_stmt 0 view .LVU1703 + ARM GAS /tmp/ccuHnxNu.s page 274 -1471:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5296 .loc 1 1471 25 is_stmt 0 view .LVU1663 - 5297 004c 4FF00308 mov r8, #3 - 5298 0050 CDF81080 str r8, [sp, #16] -1472:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5299 .loc 1 1472 3 is_stmt 1 view .LVU1664 -1473:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 5300 .loc 1 1473 3 view .LVU1665 -1474:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5301 .loc 1 1474 3 view .LVU1666 -1474:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5302 .loc 1 1474 29 is_stmt 0 view .LVU1667 - 5303 0054 0827 movs r7, #8 - 5304 0056 0797 str r7, [sp, #28] -1475:Src/main.c **** - 5305 .loc 1 1475 3 is_stmt 1 view .LVU1668 - 5306 0058 1B4E ldr r6, .L299+4 - 5307 005a 0DEB0701 add r1, sp, r7 - 5308 005e 3046 mov r0, r6 - 5309 0060 FFF7FEFF bl LL_GPIO_Init - 5310 .LVL536: -1477:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5311 .loc 1 1477 3 view .LVU1669 -1477:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5312 .loc 1 1477 23 is_stmt 0 view .LVU1670 - 5313 0064 8023 movs r3, #128 - 5314 0066 0293 str r3, [sp, #8] -1478:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5315 .loc 1 1478 3 is_stmt 1 view .LVU1671 -1478:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5316 .loc 1 1478 24 is_stmt 0 view .LVU1672 - 5317 0068 0395 str r5, [sp, #12] -1479:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5318 .loc 1 1479 3 is_stmt 1 view .LVU1673 -1479:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5319 .loc 1 1479 25 is_stmt 0 view .LVU1674 - 5320 006a CDF81080 str r8, [sp, #16] -1480:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5321 .loc 1 1480 3 is_stmt 1 view .LVU1675 -1480:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5322 .loc 1 1480 30 is_stmt 0 view .LVU1676 - 5323 006e 0594 str r4, [sp, #20] -1481:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 5324 .loc 1 1481 3 is_stmt 1 view .LVU1677 -1481:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 5325 .loc 1 1481 24 is_stmt 0 view .LVU1678 - 5326 0070 0694 str r4, [sp, #24] -1482:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5327 .loc 1 1482 3 is_stmt 1 view .LVU1679 -1482:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5328 .loc 1 1482 29 is_stmt 0 view .LVU1680 - 5329 0072 0797 str r7, [sp, #28] -1483:Src/main.c **** - 5330 .loc 1 1483 3 is_stmt 1 view .LVU1681 - 5331 0074 0DEB0701 add r1, sp, r7 - 5332 0078 3046 mov r0, r6 - 5333 007a FFF7FEFF bl LL_GPIO_Init - ARM GAS /tmp/ccEQxcUB.s page 271 + 5447 0048 0225 movs r5, #2 + 5448 004a 0395 str r5, [sp, #12] +1491:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5449 .loc 1 1491 3 is_stmt 1 view .LVU1704 +1491:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5450 .loc 1 1491 25 is_stmt 0 view .LVU1705 + 5451 004c 4FF00308 mov r8, #3 + 5452 0050 CDF81080 str r8, [sp, #16] +1492:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5453 .loc 1 1492 3 is_stmt 1 view .LVU1706 +1493:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 5454 .loc 1 1493 3 view .LVU1707 +1494:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5455 .loc 1 1494 3 view .LVU1708 +1494:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5456 .loc 1 1494 29 is_stmt 0 view .LVU1709 + 5457 0054 0827 movs r7, #8 + 5458 0056 0797 str r7, [sp, #28] +1495:Src/main.c **** + 5459 .loc 1 1495 3 is_stmt 1 view .LVU1710 + 5460 0058 1B4E ldr r6, .L310+4 + 5461 005a 0DEB0701 add r1, sp, r7 + 5462 005e 3046 mov r0, r6 + 5463 0060 FFF7FEFF bl LL_GPIO_Init + 5464 .LVL539: +1497:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5465 .loc 1 1497 3 view .LVU1711 +1497:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5466 .loc 1 1497 23 is_stmt 0 view .LVU1712 + 5467 0064 8023 movs r3, #128 + 5468 0066 0293 str r3, [sp, #8] +1498:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5469 .loc 1 1498 3 is_stmt 1 view .LVU1713 +1498:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5470 .loc 1 1498 24 is_stmt 0 view .LVU1714 + 5471 0068 0395 str r5, [sp, #12] +1499:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5472 .loc 1 1499 3 is_stmt 1 view .LVU1715 +1499:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5473 .loc 1 1499 25 is_stmt 0 view .LVU1716 + 5474 006a CDF81080 str r8, [sp, #16] +1500:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5475 .loc 1 1500 3 is_stmt 1 view .LVU1717 +1500:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5476 .loc 1 1500 30 is_stmt 0 view .LVU1718 + 5477 006e 0594 str r4, [sp, #20] +1501:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 5478 .loc 1 1501 3 is_stmt 1 view .LVU1719 +1501:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 5479 .loc 1 1501 24 is_stmt 0 view .LVU1720 + 5480 0070 0694 str r4, [sp, #24] +1502:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5481 .loc 1 1502 3 is_stmt 1 view .LVU1721 +1502:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5482 .loc 1 1502 29 is_stmt 0 view .LVU1722 + 5483 0072 0797 str r7, [sp, #28] +1503:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 275 - 5334 .LVL537: -1489:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5335 .loc 1 1489 3 view .LVU1682 -1489:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5336 .loc 1 1489 36 is_stmt 0 view .LVU1683 - 5337 007e 0894 str r4, [sp, #32] -1490:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5338 .loc 1 1490 3 is_stmt 1 view .LVU1684 -1490:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5339 .loc 1 1490 23 is_stmt 0 view .LVU1685 - 5340 0080 4FF48273 mov r3, #260 - 5341 0084 0993 str r3, [sp, #36] -1491:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5342 .loc 1 1491 3 is_stmt 1 view .LVU1686 -1491:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5343 .loc 1 1491 28 is_stmt 0 view .LVU1687 - 5344 0086 4FF47063 mov r3, #3840 - 5345 008a 0A93 str r3, [sp, #40] -1492:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 5346 .loc 1 1492 3 is_stmt 1 view .LVU1688 -1492:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 5347 .loc 1 1492 32 is_stmt 0 view .LVU1689 - 5348 008c 0B95 str r5, [sp, #44] -1493:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5349 .loc 1 1493 3 is_stmt 1 view .LVU1690 -1493:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5350 .loc 1 1493 29 is_stmt 0 view .LVU1691 - 5351 008e 0123 movs r3, #1 - 5352 0090 0C93 str r3, [sp, #48] -1494:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5353 .loc 1 1494 3 is_stmt 1 view .LVU1692 -1494:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5354 .loc 1 1494 22 is_stmt 0 view .LVU1693 - 5355 0092 4FF40073 mov r3, #512 - 5356 0096 0D93 str r3, [sp, #52] -1495:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5357 .loc 1 1495 3 is_stmt 1 view .LVU1694 -1495:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5358 .loc 1 1495 27 is_stmt 0 view .LVU1695 - 5359 0098 1823 movs r3, #24 - 5360 009a 0E93 str r3, [sp, #56] -1496:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5361 .loc 1 1496 3 is_stmt 1 view .LVU1696 -1496:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5362 .loc 1 1496 27 is_stmt 0 view .LVU1697 - 5363 009c 0F94 str r4, [sp, #60] -1497:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5364 .loc 1 1497 3 is_stmt 1 view .LVU1698 -1497:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5365 .loc 1 1497 33 is_stmt 0 view .LVU1699 - 5366 009e 1094 str r4, [sp, #64] -1498:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 5367 .loc 1 1498 3 is_stmt 1 view .LVU1700 -1498:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 5368 .loc 1 1498 26 is_stmt 0 view .LVU1701 - 5369 00a0 0723 movs r3, #7 - 5370 00a2 1193 str r3, [sp, #68] - ARM GAS /tmp/ccEQxcUB.s page 272 + 5484 .loc 1 1503 3 is_stmt 1 view .LVU1723 + 5485 0074 0DEB0701 add r1, sp, r7 + 5486 0078 3046 mov r0, r6 + 5487 007a FFF7FEFF bl LL_GPIO_Init + 5488 .LVL540: +1509:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5489 .loc 1 1509 3 view .LVU1724 +1509:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5490 .loc 1 1509 36 is_stmt 0 view .LVU1725 + 5491 007e 0894 str r4, [sp, #32] +1510:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5492 .loc 1 1510 3 is_stmt 1 view .LVU1726 +1510:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5493 .loc 1 1510 23 is_stmt 0 view .LVU1727 + 5494 0080 4FF48273 mov r3, #260 + 5495 0084 0993 str r3, [sp, #36] +1511:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5496 .loc 1 1511 3 is_stmt 1 view .LVU1728 +1511:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5497 .loc 1 1511 28 is_stmt 0 view .LVU1729 + 5498 0086 4FF47063 mov r3, #3840 + 5499 008a 0A93 str r3, [sp, #40] +1512:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 5500 .loc 1 1512 3 is_stmt 1 view .LVU1730 +1512:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 5501 .loc 1 1512 32 is_stmt 0 view .LVU1731 + 5502 008c 0B95 str r5, [sp, #44] +1513:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5503 .loc 1 1513 3 is_stmt 1 view .LVU1732 +1513:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5504 .loc 1 1513 29 is_stmt 0 view .LVU1733 + 5505 008e 0123 movs r3, #1 + 5506 0090 0C93 str r3, [sp, #48] +1514:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5507 .loc 1 1514 3 is_stmt 1 view .LVU1734 +1514:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5508 .loc 1 1514 22 is_stmt 0 view .LVU1735 + 5509 0092 4FF40073 mov r3, #512 + 5510 0096 0D93 str r3, [sp, #52] +1515:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5511 .loc 1 1515 3 is_stmt 1 view .LVU1736 +1515:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5512 .loc 1 1515 27 is_stmt 0 view .LVU1737 + 5513 0098 1823 movs r3, #24 + 5514 009a 0E93 str r3, [sp, #56] +1516:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5515 .loc 1 1516 3 is_stmt 1 view .LVU1738 +1516:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5516 .loc 1 1516 27 is_stmt 0 view .LVU1739 + 5517 009c 0F94 str r4, [sp, #60] +1517:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5518 .loc 1 1517 3 is_stmt 1 view .LVU1740 +1517:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5519 .loc 1 1517 33 is_stmt 0 view .LVU1741 + 5520 009e 1094 str r4, [sp, #64] +1518:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 5521 .loc 1 1518 3 is_stmt 1 view .LVU1742 + ARM GAS /tmp/ccuHnxNu.s page 276 -1499:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); - 5371 .loc 1 1499 3 is_stmt 1 view .LVU1702 - 5372 00a4 094C ldr r4, .L299+8 - 5373 00a6 08A9 add r1, sp, #32 - 5374 00a8 2046 mov r0, r4 - 5375 00aa FFF7FEFF bl LL_SPI_Init - 5376 .LVL538: -1500:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); - 5377 .loc 1 1500 3 view .LVU1703 - 5378 .LBB503: - 5379 .LBI503: +1518:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 5522 .loc 1 1518 26 is_stmt 0 view .LVU1743 + 5523 00a0 0723 movs r3, #7 + 5524 00a2 1193 str r3, [sp, #68] +1519:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); + 5525 .loc 1 1519 3 is_stmt 1 view .LVU1744 + 5526 00a4 094C ldr r4, .L310+8 + 5527 00a6 08A9 add r1, sp, #32 + 5528 00a8 2046 mov r0, r4 + 5529 00aa FFF7FEFF bl LL_SPI_Init + 5530 .LVL541: +1520:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); + 5531 .loc 1 1520 3 view .LVU1745 + 5532 .LBB506: + 5533 .LBI506: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5380 .loc 4 426 22 view .LVU1704 - 5381 .LBB504: + 5534 .loc 4 426 22 view .LVU1746 + 5535 .LBB507: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5382 .loc 4 428 3 view .LVU1705 - 5383 00ae 6368 ldr r3, [r4, #4] - 5384 00b0 23F01003 bic r3, r3, #16 - 5385 00b4 6360 str r3, [r4, #4] - 5386 .LVL539: + 5536 .loc 4 428 3 view .LVU1747 + 5537 00ae 6368 ldr r3, [r4, #4] + 5538 00b0 23F01003 bic r3, r3, #16 + 5539 00b4 6360 str r3, [r4, #4] + 5540 .LVL542: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5387 .loc 4 428 3 is_stmt 0 view .LVU1706 - 5388 .LBE504: - 5389 .LBE503: -1501:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ - 5390 .loc 1 1501 3 is_stmt 1 view .LVU1707 - 5391 .LBB505: - 5392 .LBI505: + 5541 .loc 4 428 3 is_stmt 0 view .LVU1748 + 5542 .LBE507: + 5543 .LBE506: +1521:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ + 5544 .loc 1 1521 3 is_stmt 1 view .LVU1749 + 5545 .LBB508: + 5546 .LBI508: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5393 .loc 4 874 22 view .LVU1708 - 5394 .LBB506: + 5547 .loc 4 874 22 view .LVU1750 + 5548 .LBB509: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5395 .loc 4 876 3 view .LVU1709 - 5396 00b6 6368 ldr r3, [r4, #4] - 5397 00b8 23F00803 bic r3, r3, #8 - 5398 00bc 6360 str r3, [r4, #4] - 5399 .LVL540: + 5549 .loc 4 876 3 view .LVU1751 + 5550 00b6 6368 ldr r3, [r4, #4] + 5551 00b8 23F00803 bic r3, r3, #8 + 5552 00bc 6360 str r3, [r4, #4] + 5553 .LVL543: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5400 .loc 4 876 3 is_stmt 0 view .LVU1710 - 5401 .LBE506: - 5402 .LBE505: -1506:Src/main.c **** - 5403 .loc 1 1506 1 view .LVU1711 - 5404 00be 12B0 add sp, sp, #72 - 5405 .LCFI51: - 5406 .cfi_def_cfa_offset 24 - 5407 @ sp needed - 5408 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 5409 .L300: - 5410 .align 2 - 5411 .L299: - 5412 00c4 00380240 .word 1073887232 - 5413 00c8 00000240 .word 1073872896 - 5414 00cc 00540140 .word 1073828864 - 5415 .cfi_endproc - 5416 .LFE1194: - 5418 .section .text.MX_TIM2_Init,"ax",%progbits - ARM GAS /tmp/ccEQxcUB.s page 273 + 5554 .loc 4 876 3 is_stmt 0 view .LVU1752 + 5555 .LBE509: + 5556 .LBE508: +1526:Src/main.c **** + 5557 .loc 1 1526 1 view .LVU1753 + 5558 00be 12B0 add sp, sp, #72 + 5559 .LCFI54: + 5560 .cfi_def_cfa_offset 24 + 5561 @ sp needed + 5562 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 5563 .L311: + 5564 .align 2 + 5565 .L310: + 5566 00c4 00380240 .word 1073887232 + 5567 00c8 00000240 .word 1073872896 + ARM GAS /tmp/ccuHnxNu.s page 277 - 5419 .align 1 - 5420 .syntax unified - 5421 .thumb - 5422 .thumb_func - 5424 MX_TIM2_Init: - 5425 .LFB1195: -1514:Src/main.c **** - 5426 .loc 1 1514 1 is_stmt 1 view -0 - 5427 .cfi_startproc - 5428 @ args = 0, pretend = 0, frame = 24 - 5429 @ frame_needed = 0, uses_anonymous_args = 0 - 5430 0000 10B5 push {r4, lr} - 5431 .LCFI52: - 5432 .cfi_def_cfa_offset 8 - 5433 .cfi_offset 4, -8 - 5434 .cfi_offset 14, -4 - 5435 0002 86B0 sub sp, sp, #24 - 5436 .LCFI53: - 5437 .cfi_def_cfa_offset 32 -1520:Src/main.c **** - 5438 .loc 1 1520 3 view .LVU1713 -1520:Src/main.c **** - 5439 .loc 1 1520 22 is_stmt 0 view .LVU1714 - 5440 0004 0024 movs r4, #0 - 5441 0006 0194 str r4, [sp, #4] - 5442 0008 0294 str r4, [sp, #8] - 5443 000a 0394 str r4, [sp, #12] - 5444 000c 0494 str r4, [sp, #16] - 5445 000e 0594 str r4, [sp, #20] -1523:Src/main.c **** - 5446 .loc 1 1523 3 is_stmt 1 view .LVU1715 - 5447 .LVL541: - 5448 .LBB507: - 5449 .LBI507: + 5568 00cc 00540140 .word 1073828864 + 5569 .cfi_endproc + 5570 .LFE1194: + 5572 .section .text.MX_TIM2_Init,"ax",%progbits + 5573 .align 1 + 5574 .syntax unified + 5575 .thumb + 5576 .thumb_func + 5578 MX_TIM2_Init: + 5579 .LFB1195: +1534:Src/main.c **** + 5580 .loc 1 1534 1 is_stmt 1 view -0 + 5581 .cfi_startproc + 5582 @ args = 0, pretend = 0, frame = 24 + 5583 @ frame_needed = 0, uses_anonymous_args = 0 + 5584 0000 10B5 push {r4, lr} + 5585 .LCFI55: + 5586 .cfi_def_cfa_offset 8 + 5587 .cfi_offset 4, -8 + 5588 .cfi_offset 14, -4 + 5589 0002 86B0 sub sp, sp, #24 + 5590 .LCFI56: + 5591 .cfi_def_cfa_offset 32 +1540:Src/main.c **** + 5592 .loc 1 1540 3 view .LVU1755 +1540:Src/main.c **** + 5593 .loc 1 1540 22 is_stmt 0 view .LVU1756 + 5594 0004 0024 movs r4, #0 + 5595 0006 0194 str r4, [sp, #4] + 5596 0008 0294 str r4, [sp, #8] + 5597 000a 0394 str r4, [sp, #12] + 5598 000c 0494 str r4, [sp, #16] + 5599 000e 0594 str r4, [sp, #20] +1543:Src/main.c **** + 5600 .loc 1 1543 3 is_stmt 1 view .LVU1757 + 5601 .LVL544: + 5602 .LBB510: + 5603 .LBI510: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5450 .loc 3 1071 22 view .LVU1716 - 5451 .LBB508: + 5604 .loc 3 1071 22 view .LVU1758 + 5605 .LBB511: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 5452 .loc 3 1073 3 view .LVU1717 + 5606 .loc 3 1073 3 view .LVU1759 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5453 .loc 3 1074 3 view .LVU1718 - 5454 0010 1D4B ldr r3, .L303 - 5455 0012 1A6C ldr r2, [r3, #64] - 5456 0014 42F00102 orr r2, r2, #1 - 5457 0018 1A64 str r2, [r3, #64] + 5607 .loc 3 1074 3 view .LVU1760 + 5608 0010 1D4B ldr r3, .L314 + 5609 0012 1A6C ldr r2, [r3, #64] + 5610 0014 42F00102 orr r2, r2, #1 + 5611 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5458 .loc 3 1076 3 view .LVU1719 + 5612 .loc 3 1076 3 view .LVU1761 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5459 .loc 3 1076 12 is_stmt 0 view .LVU1720 - 5460 001a 1B6C ldr r3, [r3, #64] - 5461 001c 03F00103 and r3, r3, #1 + 5613 .loc 3 1076 12 is_stmt 0 view .LVU1762 + 5614 001a 1B6C ldr r3, [r3, #64] + 5615 001c 03F00103 and r3, r3, #1 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5462 .loc 3 1076 10 view .LVU1721 - 5463 0020 0093 str r3, [sp] -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5464 .loc 3 1077 3 is_stmt 1 view .LVU1722 - 5465 0022 009B ldr r3, [sp] - ARM GAS /tmp/ccEQxcUB.s page 274 + 5616 .loc 3 1076 10 view .LVU1763 + ARM GAS /tmp/ccuHnxNu.s page 278 - 5466 .LVL542: + 5617 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5467 .loc 3 1077 3 is_stmt 0 view .LVU1723 - 5468 .LBE508: - 5469 .LBE507: -1526:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 5470 .loc 1 1526 3 is_stmt 1 view .LVU1724 - 5471 .LBB509: - 5472 .LBI509: + 5618 .loc 3 1077 3 is_stmt 1 view .LVU1764 + 5619 0022 009B ldr r3, [sp] + 5620 .LVL545: +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5621 .loc 3 1077 3 is_stmt 0 view .LVU1765 + 5622 .LBE511: + 5623 .LBE510: +1546:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 5624 .loc 1 1546 3 is_stmt 1 view .LVU1766 + 5625 .LBB512: + 5626 .LBI512: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 5473 .loc 2 1884 26 view .LVU1725 - 5474 .LBB510: + 5627 .loc 2 1884 26 view .LVU1767 + 5628 .LBB513: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5475 .loc 2 1886 3 view .LVU1726 + 5629 .loc 2 1886 3 view .LVU1768 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5476 .loc 2 1886 26 is_stmt 0 view .LVU1727 - 5477 0024 194B ldr r3, .L303+4 - 5478 0026 D868 ldr r0, [r3, #12] - 5479 .LBE510: - 5480 .LBE509: -1526:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 5481 .loc 1 1526 3 discriminator 1 view .LVU1728 - 5482 0028 2246 mov r2, r4 - 5483 002a 2146 mov r1, r4 - 5484 002c C0F30220 ubfx r0, r0, #8, #3 - 5485 0030 FFF7FEFF bl NVIC_EncodePriority - 5486 .LVL543: - 5487 .LBB511: - 5488 .LBI511: + 5630 .loc 2 1886 26 is_stmt 0 view .LVU1769 + 5631 0024 194B ldr r3, .L314+4 + 5632 0026 D868 ldr r0, [r3, #12] + 5633 .LBE513: + 5634 .LBE512: +1546:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 5635 .loc 1 1546 3 discriminator 1 view .LVU1770 + 5636 0028 2246 mov r2, r4 + 5637 002a 2146 mov r1, r4 + 5638 002c C0F30220 ubfx r0, r0, #8, #3 + 5639 0030 FFF7FEFF bl NVIC_EncodePriority + 5640 .LVL546: + 5641 .LBB514: + 5642 .LBI514: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 5489 .loc 2 2024 22 is_stmt 1 view .LVU1729 - 5490 .LBB512: + 5643 .loc 2 2024 22 is_stmt 1 view .LVU1771 + 5644 .LBB515: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 5491 .loc 2 2026 3 view .LVU1730 + 5645 .loc 2 2026 3 view .LVU1772 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5492 .loc 2 2028 5 view .LVU1731 + 5646 .loc 2 2028 5 view .LVU1773 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5493 .loc 2 2028 49 is_stmt 0 view .LVU1732 - 5494 0034 0001 lsls r0, r0, #4 - 5495 .LVL544: + 5647 .loc 2 2028 49 is_stmt 0 view .LVU1774 + 5648 0034 0001 lsls r0, r0, #4 + 5649 .LVL547: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5496 .loc 2 2028 49 view .LVU1733 - 5497 0036 C0B2 uxtb r0, r0 + 5650 .loc 2 2028 49 view .LVU1775 + 5651 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5498 .loc 2 2028 47 view .LVU1734 - 5499 0038 154B ldr r3, .L303+8 - 5500 003a 83F81C03 strb r0, [r3, #796] - 5501 .LVL545: + 5652 .loc 2 2028 47 view .LVU1776 + 5653 0038 154B ldr r3, .L314+8 + 5654 003a 83F81C03 strb r0, [r3, #796] + 5655 .LVL548: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5502 .loc 2 2028 47 view .LVU1735 - 5503 .LBE512: - 5504 .LBE511: -1527:Src/main.c **** - 5505 .loc 1 1527 3 is_stmt 1 view .LVU1736 - 5506 .LBB513: - 5507 .LBI513: + 5656 .loc 2 2028 47 view .LVU1777 + 5657 .LBE515: + 5658 .LBE514: +1547:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 279 + + + 5659 .loc 1 1547 3 is_stmt 1 view .LVU1778 + 5660 .LBB516: + 5661 .LBI516: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccEQxcUB.s page 275 - - - 5508 .loc 2 1896 22 view .LVU1737 - 5509 .LBB514: + 5662 .loc 2 1896 22 view .LVU1779 + 5663 .LBB517: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 5510 .loc 2 1898 3 view .LVU1738 + 5664 .loc 2 1898 3 view .LVU1780 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5511 .loc 2 1900 5 view .LVU1739 + 5665 .loc 2 1900 5 view .LVU1781 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5512 .loc 2 1900 43 is_stmt 0 view .LVU1740 - 5513 003e 4FF08052 mov r2, #268435456 - 5514 0042 1A60 str r2, [r3] - 5515 .LVL546: + 5666 .loc 2 1900 43 is_stmt 0 view .LVU1782 + 5667 003e 4FF08052 mov r2, #268435456 + 5668 0042 1A60 str r2, [r3] + 5669 .LVL549: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5516 .loc 2 1900 43 view .LVU1741 - 5517 .LBE514: - 5518 .LBE513: -1532:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5519 .loc 1 1532 3 is_stmt 1 view .LVU1742 -1532:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5520 .loc 1 1532 28 is_stmt 0 view .LVU1743 - 5521 0044 4FF47A73 mov r3, #1000 - 5522 0048 ADF80430 strh r3, [sp, #4] @ movhi -1533:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 5523 .loc 1 1533 3 is_stmt 1 view .LVU1744 -1533:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 5524 .loc 1 1533 30 is_stmt 0 view .LVU1745 - 5525 004c 0294 str r4, [sp, #8] -1534:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5526 .loc 1 1534 3 is_stmt 1 view .LVU1746 -1534:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5527 .loc 1 1534 29 is_stmt 0 view .LVU1747 - 5528 004e 114B ldr r3, .L303+12 - 5529 0050 0393 str r3, [sp, #12] -1535:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 5530 .loc 1 1535 3 is_stmt 1 view .LVU1748 -1535:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 5531 .loc 1 1535 32 is_stmt 0 view .LVU1749 - 5532 0052 0494 str r4, [sp, #16] -1536:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); - 5533 .loc 1 1536 3 is_stmt 1 view .LVU1750 - 5534 0054 01A9 add r1, sp, #4 - 5535 0056 4FF08040 mov r0, #1073741824 - 5536 005a FFF7FEFF bl LL_TIM_Init - 5537 .LVL547: -1537:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); - 5538 .loc 1 1537 3 view .LVU1751 - 5539 .LBB515: - 5540 .LBI515: - 5541 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" + 5670 .loc 2 1900 43 view .LVU1783 + 5671 .LBE517: + 5672 .LBE516: +1552:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5673 .loc 1 1552 3 is_stmt 1 view .LVU1784 +1552:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5674 .loc 1 1552 28 is_stmt 0 view .LVU1785 + 5675 0044 4FF47A73 mov r3, #1000 + 5676 0048 ADF80430 strh r3, [sp, #4] @ movhi +1553:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 5677 .loc 1 1553 3 is_stmt 1 view .LVU1786 +1553:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 5678 .loc 1 1553 30 is_stmt 0 view .LVU1787 + 5679 004c 0294 str r4, [sp, #8] +1554:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5680 .loc 1 1554 3 is_stmt 1 view .LVU1788 +1554:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5681 .loc 1 1554 29 is_stmt 0 view .LVU1789 + 5682 004e 114B ldr r3, .L314+12 + 5683 0050 0393 str r3, [sp, #12] +1555:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 5684 .loc 1 1555 3 is_stmt 1 view .LVU1790 +1555:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 5685 .loc 1 1555 32 is_stmt 0 view .LVU1791 + 5686 0052 0494 str r4, [sp, #16] +1556:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); + 5687 .loc 1 1556 3 is_stmt 1 view .LVU1792 + 5688 0054 01A9 add r1, sp, #4 + 5689 0056 4FF08040 mov r0, #1073741824 + 5690 005a FFF7FEFF bl LL_TIM_Init + 5691 .LVL550: +1557:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); + 5692 .loc 1 1557 3 view .LVU1793 + 5693 .LBB518: + 5694 .LBI518: + 5695 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h 4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @author MCD Application Team 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Header file of TIM LL module. + ARM GAS /tmp/ccuHnxNu.s page 280 + + 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ****************************************************************************** 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @attention 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * 9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Copyright (c) 2017 STMicroelectronics. - ARM GAS /tmp/ccEQxcUB.s page 276 - - 10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * All rights reserved. 11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * 12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * This software is licensed under terms that can be found in the LICENSE file @@ -16554,13 +16798,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */ 61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 1: - NA */ 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 2: OC2M, OC2FE, OC2PE */ + ARM GAS /tmp/ccuHnxNu.s page 281 + + 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 3: - NA */ 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 4: OC3M, OC3FE, OC3PE */ 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 5: - NA */ 66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 6: OC4M, OC4FE, OC4PE */ - ARM GAS /tmp/ccEQxcUB.s page 277 - - 67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 7: OC5M, OC5FE, OC5PE */ 68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U /* 8: OC6M, OC6FE, OC6PE */ 69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }; @@ -16614,13 +16858,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Defines used for the bit position in the register and perform offsets */ + ARM GAS /tmp/ccuHnxNu.s page 282 + + 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_POSITION_BRK_SOURCE (POSITION_VAL(Source) & 0x1FUL) 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Generic bit definitions for TIMx_AF1 register */ 123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_AF1_BKINP TIM1_AF1_BKINP /*!< BRK BKIN input polarity */ - ARM GAS /tmp/ccEQxcUB.s page 278 - - 124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */ 125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Remap mask definitions */ @@ -16674,13 +16918,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\ 175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U) 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccuHnxNu.s page 283 + + 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Calculate the deadtime sampling period(in ps). 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz). 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values: 180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 - ARM GAS /tmp/ccEQxcUB.s page 279 - - 181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none @@ -16734,13 +16978,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downc 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** reaches zero, an update event is generated and counting restarts + ARM GAS /tmp/ccuHnxNu.s page 284 + + 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** from the RCR value (N). 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This means in PWM mode that (N+1) corresponds to: 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of PWM periods in edge-aligned mode 237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of half PWM period in center-aligned mode - ARM GAS /tmp/ccEQxcUB.s page 280 - - 238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** GP timers: this parameter must be a number between Min_Data = 0x 239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Max_Data = 0xFF. 240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Advanced timers: this parameter must be a number between Min_Dat @@ -16794,13 +17038,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. + ARM GAS /tmp/ccuHnxNu.s page 285 + + 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/ 294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 281 - - 295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. 296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. 297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -16854,13 +17098,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. + ARM GAS /tmp/ccuHnxNu.s page 286 + + 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 282 - - 352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source 353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -16914,13 +17158,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccuHnxNu.s page 287 + + 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. - ARM GAS /tmp/ccEQxcUB.s page 283 - - 409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Prescaler must be set to get a maximum counter period longer th 410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** time interval between 2 consecutive changes on the Hall inputs. 411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. @@ -16974,13 +17218,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** register has been written, their content is frozen until the 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the + ARM GAS /tmp/ccuHnxNu.s page 288 + + 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** switching-on of the outputs. 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x00 and Ma 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio - ARM GAS /tmp/ccEQxcUB.s page 284 - - 466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetDeadTime() 467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve @@ -17034,13 +17278,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter. 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccuHnxNu.s page 289 + + 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2() 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve - ARM GAS /tmp/ccEQxcUB.s page 285 - - 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled @@ -17094,13 +17338,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */ 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */ 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 290 + + 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable - ARM GAS /tmp/ccEQxcUB.s page 286 - - 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_DISABLE 0x00000000U /*!< Break2 function disabled */ @@ -17154,13 +17398,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode + ARM GAS /tmp/ccuHnxNu.s page 291 + + 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_UP 0x00000000U /*!< Counter used as upcounter 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounte - ARM GAS /tmp/ccEQxcUB.s page 287 - - 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0 /*!< The counter counts up and 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!< The counter counts up and 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and @@ -17214,13 +17458,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /*!< LOCK Level 3 */ 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} + ARM GAS /tmp/ccuHnxNu.s page 292 + + 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CHANNEL Channel 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ - ARM GAS /tmp/ccEQxcUB.s page 288 - - 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE /*!< Timer complementary output ch @@ -17274,13 +17518,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} + ARM GAS /tmp/ccuHnxNu.s page 293 + + 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ - ARM GAS /tmp/ccEQxcUB.s page 289 - - 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_HIGH 0x00000000U /*!< OCxactive high*/ 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/ @@ -17334,13 +17578,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1 0x00000000U 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N2 (TIM_CCMR1_IC1F_0 << 16U) + ARM GAS /tmp/ccuHnxNu.s page 294 + + 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N4 (TIM_CCMR1_IC1F_1 << 16U) 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N8 ((TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U) 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV2_N6 (TIM_CCMR1_IC1F_2 << 16U) 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV2_N8 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U) - ARM GAS /tmp/ccEQxcUB.s page 290 - - 808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N6 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U) 809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N8 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC 810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV8_N6 (TIM_CCMR1_IC1F_3 << 16U) @@ -17394,13 +17638,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 /*!< 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_0) /*!< + ARM GAS /tmp/ccuHnxNu.s page 295 + + 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC3REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1) /*!< 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC4REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} - ARM GAS /tmp/ccEQxcUB.s page 291 - - 865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO2 Trigger Output 2 @@ -17454,13 +17698,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity + ARM GAS /tmp/ccuHnxNu.s page 296 + + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_POLARITY_NONINVERTED 0x00000000U /*!< ETR is non-inverted, ac 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_POLARITY_INVERTED TIM_SMCR_ETP /*!< ETR is inverted, active - ARM GAS /tmp/ccEQxcUB.s page 292 - - 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -17514,13 +17758,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1 0x00000000U /*!< No filter, BRK acts asynchronousl 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N2 0x00010000U /*!< fSAMPLING=fCK_INT, N=2 */ + ARM GAS /tmp/ccuHnxNu.s page 297 + + 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N4 0x00020000U /*!< fSAMPLING=fCK_INT, N=4 */ 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N8 0x00030000U /*!< fSAMPLING=fCK_INT, N=8 */ 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV2_N6 0x00040000U /*!< fSAMPLING=fDTS/2, N=6 */ 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV2_N8 0x00050000U /*!< fSAMPLING=fDTS/2, N=8 */ - ARM GAS /tmp/ccEQxcUB.s page 293 - - 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N6 0x00060000U /*!< fSAMPLING=fDTS/4, N=6 */ 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N8 0x00070000U /*!< fSAMPLING=fDTS/4, N=8 */ 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV8_N6 0x00080000U /*!< fSAMPLING=fDTS/8, N=6 */ @@ -17574,13 +17818,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSI_ENABLE TIM_BDTR_OSSI /*!< When inactive, OxC/OCxN 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} + ARM GAS /tmp/ccuHnxNu.s page 298 + + 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OSSR OSSR 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ - ARM GAS /tmp/ccEQxcUB.s page 294 - - 1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_DISABLE 0x00000000U /*!< When inactive, OCx/OCxN 1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_ENABLE TIM_BDTR_OSSR /*!< When inactive, OC/OCN o @@ -17634,13 +17878,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 | TIM_DCR_DBA_2) 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) + ARM GAS /tmp/ccuHnxNu.s page 299 + + 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) 1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 | TIM_DCR_DBA_0) - ARM GAS /tmp/ccEQxcUB.s page 295 - - 1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_OR (TIM_DCR_DBA_4 | TIM_DCR_DBA_2) 1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) 1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) @@ -17694,13 +17938,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_GPIO TIM5_OR_RMP_MASK /*!< TIM5 chan + ARM GAS /tmp/ccuHnxNu.s page 300 + + 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_LSI (TIM5_OR_TI4_RMP_0 | TIM5_OR_RMP_MASK) /*!< TIM5 chan 1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_LSE (TIM5_OR_TI4_RMP_1 | TIM5_OR_RMP_MASK) /*!< TIM5 chan 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_RTC (TIM5_OR_TI4_RMP | TIM5_OR_RMP_MASK) /*!< TIM5 chan 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 296 - - 1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17754,13 +17998,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * to TIMx_CNT register bit 31) 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNT__ Counter value + ARM GAS /tmp/ccuHnxNu.s page 301 + + 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval UIF status bit 1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GETFLAG_UIFCPY(__CNT__) \ 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos) - ARM GAS /tmp/ccEQxcUB.s page 297 - - 1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested de @@ -17814,13 +18058,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler + ARM GAS /tmp/ccuHnxNu.s page 302 + + 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us) 1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Compare value (between Min_Data=0 and Max_Data=65535) 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \ - ARM GAS /tmp/ccEQxcUB.s page 298 - - 1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17874,13 +18118,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_CEN); 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccuHnxNu.s page 303 + + 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable timer counter. 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_DisableCounter - ARM GAS /tmp/ccEQxcUB.s page 299 - - 1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -17934,13 +18178,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 304 + + 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set update event source 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * generate an update interrupt or DMA request if enabled: 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Counter overflow/underflow - ARM GAS /tmp/ccEQxcUB.s page 300 - - 1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Setting the UG bit 1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Update generation through the slave mode controller 1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter @@ -17994,13 +18238,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx) 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccuHnxNu.s page 305 + + 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); 1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 301 - - 1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the timer counter counting mode. 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported @@ -18054,13 +18298,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 306 + + 1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable auto-reload (ARR) preload. 1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload 1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 302 - - 1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) 1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -18074,23 +18318,23 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) - 5542 .loc 5 1504 22 view .LVU1752 - 5543 .LBB516: + 5696 .loc 5 1504 22 view .LVU1794 + 5697 .LBB519: 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); - 5544 .loc 5 1506 3 view .LVU1753 - 5545 005e 4FF08043 mov r3, #1073741824 - 5546 0062 1A68 ldr r2, [r3] - 5547 0064 22F08002 bic r2, r2, #128 - 5548 0068 1A60 str r2, [r3] - 5549 .LVL548: - 5550 .loc 5 1506 3 is_stmt 0 view .LVU1754 - 5551 .LBE516: - 5552 .LBE515: -1538:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - 5553 .loc 1 1538 3 is_stmt 1 view .LVU1755 - 5554 .LBB517: - 5555 .LBI517: + 5698 .loc 5 1506 3 view .LVU1795 + 5699 005e 4FF08043 mov r3, #1073741824 + 5700 0062 1A68 ldr r2, [r3] + 5701 0064 22F08002 bic r2, r2, #128 + 5702 0068 1A60 str r2, [r3] + 5703 .LVL551: + 5704 .loc 5 1506 3 is_stmt 0 view .LVU1796 + 5705 .LBE519: + 5706 .LBE518: +1558:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + 5707 .loc 1 1558 3 is_stmt 1 view .LVU1797 + 5708 .LBB520: + 5709 .LBI520: 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -18114,13 +18358,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ClockDivision This parameter can be one of the following values: 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 + ARM GAS /tmp/ccuHnxNu.s page 307 + + 1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 303 - - 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision) 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); @@ -18174,13 +18418,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current direction of the counter 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection + ARM GAS /tmp/ccuHnxNu.s page 308 + + 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_DOWN - ARM GAS /tmp/ccEQxcUB.s page 304 - - 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx) 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -18234,13 +18478,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the auto-reload value. 1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_GetAutoReload 1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + ARM GAS /tmp/ccuHnxNu.s page 309 + + 1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value 1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 305 - - 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx) 1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->ARR)); @@ -18294,13 +18538,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx) + ARM GAS /tmp/ccuHnxNu.s page 310 + + 1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 306 - - 1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) copy is set. 1707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Counter Counter value @@ -18354,13 +18598,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) + ARM GAS /tmp/ccuHnxNu.s page 311 + + 1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 307 - - 1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM). 1764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check @@ -18414,13 +18658,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param LockLevel This parameter can be one of the following values: 1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_OFF 1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1 + ARM GAS /tmp/ccuHnxNu.s page 312 + + 1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2 1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 308 - - 1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel) 1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); @@ -18474,13 +18718,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N + ARM GAS /tmp/ccuHnxNu.s page 313 + + 1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 309 - - 1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels) 1878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -18534,13 +18778,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_ConfigOutput\n 1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n + ARM GAS /tmp/ccuHnxNu.s page 314 + + 1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n 1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_ConfigOutput\n 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_ConfigOutput\n 1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS1 LL_TIM_OC_ConfigOutput\n - ARM GAS /tmp/ccEQxcUB.s page 310 - - 1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_ConfigOutput\n 1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_ConfigOutput\n 1935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_ConfigOutput\n @@ -18594,13 +18838,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE 1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE 1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE + ARM GAS /tmp/ccuHnxNu.s page 315 + + 1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1 1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM2 - ARM GAS /tmp/ccEQxcUB.s page 311 - - 1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1 1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2 1992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1 @@ -18654,13 +18898,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 316 + + 2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of an output channel. 2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n 2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_SetPolarity\n - ARM GAS /tmp/ccEQxcUB.s page 312 - - 2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_SetPolarity\n 2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_SetPolarity\n 2049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_OC_SetPolarity\n @@ -18714,13 +18958,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW + ARM GAS /tmp/ccuHnxNu.s page 317 + + 2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); - ARM GAS /tmp/ccEQxcUB.s page 313 - - 2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChan 2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -18774,13 +19018,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_GetIdleState 2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 318 + + 2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N - ARM GAS /tmp/ccEQxcUB.s page 314 - - 2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 2163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -18834,13 +19078,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 + ARM GAS /tmp/ccuHnxNu.s page 319 + + 2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/ccEQxcUB.s page 315 - - 2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -18894,13 +19138,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 + ARM GAS /tmp/ccuHnxNu.s page 320 + + 2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) 2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccEQxcUB.s page 316 - - 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); @@ -18954,13 +19198,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; + ARM GAS /tmp/ccuHnxNu.s page 321 + + 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 317 - - 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable clearing the output channel on an external event. 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force 2334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether @@ -19014,13 +19258,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccuHnxNu.s page 322 + + 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function enables clearing the output channel on an external event. - ARM GAS /tmp/ccEQxcUB.s page 318 - - 2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether 2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. @@ -19074,13 +19318,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 + ARM GAS /tmp/ccuHnxNu.s page 323 + + 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccEQxcUB.s page 319 - - 2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR1, CompareValue); 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -19134,13 +19378,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR4, CompareValue); 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccuHnxNu.s page 324 + + 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 5 (TIMx_CCR5). 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not - ARM GAS /tmp/ccEQxcUB.s page 320 - - 2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 5 is supported by a timer instance. 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR5 CCR5 LL_TIM_OC_SetCompareCH5 2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -19194,13 +19438,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) + ARM GAS /tmp/ccuHnxNu.s page 325 + + 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 321 - - 2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR3) set for output channel 3. 2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF @@ -19254,13 +19498,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 326 + + 2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR6)); 2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccEQxcUB.s page 322 - - 2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Select on which reference signal the OC5REF is combined to. @@ -19314,13 +19558,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 + ARM GAS /tmp/ccuHnxNu.s page 327 + + 2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values: - ARM GAS /tmp/ccEQxcUB.s page 323 - - 2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_ 2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8 2676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8 @@ -19374,13 +19618,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccuHnxNu.s page 328 + + 2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI 2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI - ARM GAS /tmp/ccEQxcUB.s page 324 - - 2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel) @@ -19434,13 +19678,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 329 + + 2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC - ARM GAS /tmp/ccEQxcUB.s page 325 - - 2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iCha 2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -19494,13 +19738,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 + ARM GAS /tmp/ccuHnxNu.s page 330 + + 2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 - ARM GAS /tmp/ccEQxcUB.s page 326 - - 2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 2847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 @@ -19554,13 +19798,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current input channel polarity. 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n + ARM GAS /tmp/ccuHnxNu.s page 331 + + 2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n 2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_GetPolarity\n - ARM GAS /tmp/ccEQxcUB.s page 327 - - 2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_GetPolarity\n 2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_GetPolarity\n 2904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_GetPolarity @@ -19614,13 +19858,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input. 2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccuHnxNu.s page 332 + + 2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) 2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccEQxcUB.s page 328 - - 2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL); 2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -19674,13 +19918,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4. + ARM GAS /tmp/ccuHnxNu.s page 333 + + 3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not - ARM GAS /tmp/ccEQxcUB.s page 329 - - 3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 4 is supported by a timer instance. 3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4 3018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -19734,13 +19978,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) + ARM GAS /tmp/ccuHnxNu.s page 334 + + 3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 330 - - 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the clock source of the counter clock. 3075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note when selected clock source is external clock mode 1, the timer input @@ -19761,23 +20005,23 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) - 5556 .loc 5 3092 22 view .LVU1756 - 5557 .LBB518: + 5710 .loc 5 3092 22 view .LVU1798 + 5711 .LBB521: 3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); - 5558 .loc 5 3094 3 view .LVU1757 - 5559 006a 9968 ldr r1, [r3, #8] - 5560 006c 0A4A ldr r2, .L303+16 - 5561 006e 0A40 ands r2, r2, r1 - 5562 0070 9A60 str r2, [r3, #8] - 5563 .LVL549: - 5564 .loc 5 3094 3 is_stmt 0 view .LVU1758 - 5565 .LBE518: - 5566 .LBE517: -1539:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); - 5567 .loc 1 1539 3 is_stmt 1 view .LVU1759 - 5568 .LBB519: - 5569 .LBI519: + 5712 .loc 5 3094 3 view .LVU1799 + 5713 006a 9968 ldr r1, [r3, #8] + 5714 006c 0A4A ldr r2, .L314+16 + 5715 006e 0A40 ands r2, r2, r1 + 5716 0070 9A60 str r2, [r3, #8] + 5717 .LVL552: + 5718 .loc 5 3094 3 is_stmt 0 view .LVU1800 + 5719 .LBE521: + 5720 .LBE520: +1559:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); + 5721 .loc 1 1559 3 is_stmt 1 view .LVU1801 + 5722 .LBB522: + 5723 .LBI522: 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -19794,13 +20038,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) 3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccuHnxNu.s page 335 + + 3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); 3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 331 - - 3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 3116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -19825,22 +20069,22 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) - 5570 .loc 5 3138 22 view .LVU1760 - 5571 .LBB520: + 5724 .loc 5 3138 22 view .LVU1802 + 5725 .LBB523: 3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); - 5572 .loc 5 3140 3 view .LVU1761 - 5573 0072 5A68 ldr r2, [r3, #4] - 5574 0074 22F07002 bic r2, r2, #112 - 5575 0078 5A60 str r2, [r3, #4] - 5576 .LVL550: - 5577 .loc 5 3140 3 is_stmt 0 view .LVU1762 - 5578 .LBE520: - 5579 .LBE519: -1540:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ - 5580 .loc 1 1540 3 is_stmt 1 view .LVU1763 - 5581 .LBB521: - 5582 .LBI521: + 5726 .loc 5 3140 3 view .LVU1803 + 5727 0072 5A68 ldr r2, [r3, #4] + 5728 0074 22F07002 bic r2, r2, #112 + 5729 0078 5A60 str r2, [r3, #4] + 5730 .LVL553: + 5731 .loc 5 3140 3 is_stmt 0 view .LVU1804 + 5732 .LBE523: + 5733 .LBE522: +1560:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 5734 .loc 1 1560 3 is_stmt 1 view .LVU1805 + 5735 .LBB524: + 5736 .LBI524: 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -19854,13 +20098,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_ENABLE 3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_UPDATE 3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_CC1F + ARM GAS /tmp/ccuHnxNu.s page 336 + + 3154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC1 3155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC2 3156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC3 3157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4 - ARM GAS /tmp/ccEQxcUB.s page 332 - - 3158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC5 3159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC6 3160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4_RISINGFALLING @@ -19914,13 +20158,13 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) 3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccuHnxNu.s page 337 + + 3211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); 3212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 333 - - 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the Master/Slave mode. 3216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 3217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer. @@ -19942,1065 +20186,1067 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) - 5583 .loc 5 3235 22 view .LVU1764 - 5584 .LBB522: + 5737 .loc 5 3235 22 view .LVU1806 + 5738 .LBB525: 3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); - 5585 .loc 5 3237 3 view .LVU1765 - 5586 007a 9A68 ldr r2, [r3, #8] - 5587 007c 22F08002 bic r2, r2, #128 - 5588 0080 9A60 str r2, [r3, #8] - 5589 .LVL551: - 5590 .loc 5 3237 3 is_stmt 0 view .LVU1766 - 5591 .LBE522: - 5592 .LBE521: -1545:Src/main.c **** - 5593 .loc 1 1545 1 view .LVU1767 - 5594 0082 06B0 add sp, sp, #24 - 5595 .LCFI54: - 5596 .cfi_def_cfa_offset 8 - 5597 @ sp needed - 5598 0084 10BD pop {r4, pc} - 5599 .L304: - 5600 0086 00BF .align 2 - 5601 .L303: - 5602 0088 00380240 .word 1073887232 - 5603 008c 00ED00E0 .word -536810240 - 5604 0090 00E100E0 .word -536813312 - 5605 0094 40D10C00 .word 840000 - 5606 0098 F8BFFEFF .word -81928 - 5607 .cfi_endproc - 5608 .LFE1195: - 5610 .section .text.MX_TIM5_Init,"ax",%progbits - 5611 .align 1 - 5612 .syntax unified - 5613 .thumb - 5614 .thumb_func - 5616 MX_TIM5_Init: - 5617 .LFB1197: - ARM GAS /tmp/ccEQxcUB.s page 334 + 5739 .loc 5 3237 3 view .LVU1807 + 5740 007a 9A68 ldr r2, [r3, #8] + 5741 007c 22F08002 bic r2, r2, #128 + 5742 0080 9A60 str r2, [r3, #8] + 5743 .LVL554: + 5744 .loc 5 3237 3 is_stmt 0 view .LVU1808 + 5745 .LBE525: + 5746 .LBE524: +1565:Src/main.c **** + 5747 .loc 1 1565 1 view .LVU1809 + 5748 0082 06B0 add sp, sp, #24 + 5749 .LCFI57: + 5750 .cfi_def_cfa_offset 8 + 5751 @ sp needed + 5752 0084 10BD pop {r4, pc} + 5753 .L315: + 5754 0086 00BF .align 2 + 5755 .L314: + 5756 0088 00380240 .word 1073887232 + 5757 008c 00ED00E0 .word -536810240 + 5758 0090 00E100E0 .word -536813312 + 5759 0094 40D10C00 .word 840000 + 5760 0098 F8BFFEFF .word -81928 + 5761 .cfi_endproc + 5762 .LFE1195: + 5764 .section .text.MX_TIM5_Init,"ax",%progbits + 5765 .align 1 + 5766 .syntax unified + ARM GAS /tmp/ccuHnxNu.s page 338 -1612:Src/main.c **** - 5618 .loc 1 1612 1 is_stmt 1 view -0 - 5619 .cfi_startproc - 5620 @ args = 0, pretend = 0, frame = 24 - 5621 @ frame_needed = 0, uses_anonymous_args = 0 - 5622 0000 10B5 push {r4, lr} - 5623 .LCFI55: - 5624 .cfi_def_cfa_offset 8 - 5625 .cfi_offset 4, -8 - 5626 .cfi_offset 14, -4 - 5627 0002 86B0 sub sp, sp, #24 - 5628 .LCFI56: - 5629 .cfi_def_cfa_offset 32 -1618:Src/main.c **** - 5630 .loc 1 1618 3 view .LVU1769 -1618:Src/main.c **** - 5631 .loc 1 1618 22 is_stmt 0 view .LVU1770 - 5632 0004 0024 movs r4, #0 - 5633 0006 0194 str r4, [sp, #4] - 5634 0008 0294 str r4, [sp, #8] - 5635 000a 0394 str r4, [sp, #12] - 5636 000c 0494 str r4, [sp, #16] - 5637 000e 0594 str r4, [sp, #20] -1621:Src/main.c **** - 5638 .loc 1 1621 3 is_stmt 1 view .LVU1771 - 5639 .LVL552: - 5640 .LBB523: - 5641 .LBI523: + 5767 .thumb + 5768 .thumb_func + 5770 MX_TIM5_Init: + 5771 .LFB1197: +1632:Src/main.c **** + 5772 .loc 1 1632 1 is_stmt 1 view -0 + 5773 .cfi_startproc + 5774 @ args = 0, pretend = 0, frame = 24 + 5775 @ frame_needed = 0, uses_anonymous_args = 0 + 5776 0000 10B5 push {r4, lr} + 5777 .LCFI58: + 5778 .cfi_def_cfa_offset 8 + 5779 .cfi_offset 4, -8 + 5780 .cfi_offset 14, -4 + 5781 0002 86B0 sub sp, sp, #24 + 5782 .LCFI59: + 5783 .cfi_def_cfa_offset 32 +1638:Src/main.c **** + 5784 .loc 1 1638 3 view .LVU1811 +1638:Src/main.c **** + 5785 .loc 1 1638 22 is_stmt 0 view .LVU1812 + 5786 0004 0024 movs r4, #0 + 5787 0006 0194 str r4, [sp, #4] + 5788 0008 0294 str r4, [sp, #8] + 5789 000a 0394 str r4, [sp, #12] + 5790 000c 0494 str r4, [sp, #16] + 5791 000e 0594 str r4, [sp, #20] +1641:Src/main.c **** + 5792 .loc 1 1641 3 is_stmt 1 view .LVU1813 + 5793 .LVL555: + 5794 .LBB526: + 5795 .LBI526: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5642 .loc 3 1071 22 view .LVU1772 - 5643 .LBB524: + 5796 .loc 3 1071 22 view .LVU1814 + 5797 .LBB527: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 5644 .loc 3 1073 3 view .LVU1773 + 5798 .loc 3 1073 3 view .LVU1815 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5645 .loc 3 1074 3 view .LVU1774 - 5646 0010 1C4B ldr r3, .L307 - 5647 0012 1A6C ldr r2, [r3, #64] - 5648 0014 42F00802 orr r2, r2, #8 - 5649 0018 1A64 str r2, [r3, #64] + 5799 .loc 3 1074 3 view .LVU1816 + 5800 0010 1C4B ldr r3, .L318 + 5801 0012 1A6C ldr r2, [r3, #64] + 5802 0014 42F00802 orr r2, r2, #8 + 5803 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5650 .loc 3 1076 3 view .LVU1775 + 5804 .loc 3 1076 3 view .LVU1817 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5651 .loc 3 1076 12 is_stmt 0 view .LVU1776 - 5652 001a 1B6C ldr r3, [r3, #64] - 5653 001c 03F00803 and r3, r3, #8 + 5805 .loc 3 1076 12 is_stmt 0 view .LVU1818 + 5806 001a 1B6C ldr r3, [r3, #64] + 5807 001c 03F00803 and r3, r3, #8 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5654 .loc 3 1076 10 view .LVU1777 - 5655 0020 0093 str r3, [sp] + 5808 .loc 3 1076 10 view .LVU1819 + 5809 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5656 .loc 3 1077 3 is_stmt 1 view .LVU1778 - 5657 0022 009B ldr r3, [sp] - 5658 .LVL553: + 5810 .loc 3 1077 3 is_stmt 1 view .LVU1820 + 5811 0022 009B ldr r3, [sp] + 5812 .LVL556: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5659 .loc 3 1077 3 is_stmt 0 view .LVU1779 - 5660 .LBE524: - 5661 .LBE523: -1624:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - ARM GAS /tmp/ccEQxcUB.s page 335 + ARM GAS /tmp/ccuHnxNu.s page 339 - 5662 .loc 1 1624 3 is_stmt 1 view .LVU1780 - 5663 .LBB525: - 5664 .LBI525: + 5813 .loc 3 1077 3 is_stmt 0 view .LVU1821 + 5814 .LBE527: + 5815 .LBE526: +1644:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 5816 .loc 1 1644 3 is_stmt 1 view .LVU1822 + 5817 .LBB528: + 5818 .LBI528: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 5665 .loc 2 1884 26 view .LVU1781 - 5666 .LBB526: + 5819 .loc 2 1884 26 view .LVU1823 + 5820 .LBB529: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5667 .loc 2 1886 3 view .LVU1782 + 5821 .loc 2 1886 3 view .LVU1824 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5668 .loc 2 1886 26 is_stmt 0 view .LVU1783 - 5669 0024 184B ldr r3, .L307+4 - 5670 0026 D868 ldr r0, [r3, #12] - 5671 .LBE526: - 5672 .LBE525: -1624:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 5673 .loc 1 1624 3 discriminator 1 view .LVU1784 - 5674 0028 2246 mov r2, r4 - 5675 002a 2146 mov r1, r4 - 5676 002c C0F30220 ubfx r0, r0, #8, #3 - 5677 0030 FFF7FEFF bl NVIC_EncodePriority - 5678 .LVL554: - 5679 .LBB527: - 5680 .LBI527: + 5822 .loc 2 1886 26 is_stmt 0 view .LVU1825 + 5823 0024 184B ldr r3, .L318+4 + 5824 0026 D868 ldr r0, [r3, #12] + 5825 .LBE529: + 5826 .LBE528: +1644:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 5827 .loc 1 1644 3 discriminator 1 view .LVU1826 + 5828 0028 2246 mov r2, r4 + 5829 002a 2146 mov r1, r4 + 5830 002c C0F30220 ubfx r0, r0, #8, #3 + 5831 0030 FFF7FEFF bl NVIC_EncodePriority + 5832 .LVL557: + 5833 .LBB530: + 5834 .LBI530: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 5681 .loc 2 2024 22 is_stmt 1 view .LVU1785 - 5682 .LBB528: + 5835 .loc 2 2024 22 is_stmt 1 view .LVU1827 + 5836 .LBB531: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 5683 .loc 2 2026 3 view .LVU1786 + 5837 .loc 2 2026 3 view .LVU1828 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5684 .loc 2 2028 5 view .LVU1787 + 5838 .loc 2 2028 5 view .LVU1829 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5685 .loc 2 2028 49 is_stmt 0 view .LVU1788 - 5686 0034 0001 lsls r0, r0, #4 - 5687 .LVL555: + 5839 .loc 2 2028 49 is_stmt 0 view .LVU1830 + 5840 0034 0001 lsls r0, r0, #4 + 5841 .LVL558: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5688 .loc 2 2028 49 view .LVU1789 - 5689 0036 C0B2 uxtb r0, r0 + 5842 .loc 2 2028 49 view .LVU1831 + 5843 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5690 .loc 2 2028 47 view .LVU1790 - 5691 0038 144B ldr r3, .L307+8 - 5692 003a 83F83203 strb r0, [r3, #818] - 5693 .LVL556: + 5844 .loc 2 2028 47 view .LVU1832 + 5845 0038 144B ldr r3, .L318+8 + 5846 003a 83F83203 strb r0, [r3, #818] + 5847 .LVL559: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5694 .loc 2 2028 47 view .LVU1791 - 5695 .LBE528: - 5696 .LBE527: -1625:Src/main.c **** - 5697 .loc 1 1625 3 is_stmt 1 view .LVU1792 - 5698 .LBB529: - 5699 .LBI529: + 5848 .loc 2 2028 47 view .LVU1833 + 5849 .LBE531: + 5850 .LBE530: +1645:Src/main.c **** + 5851 .loc 1 1645 3 is_stmt 1 view .LVU1834 + 5852 .LBB532: + 5853 .LBI532: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 5700 .loc 2 1896 22 view .LVU1793 - 5701 .LBB530: + 5854 .loc 2 1896 22 view .LVU1835 + 5855 .LBB533: + ARM GAS /tmp/ccuHnxNu.s page 340 + + 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 5702 .loc 2 1898 3 view .LVU1794 + 5856 .loc 2 1898 3 view .LVU1836 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5703 .loc 2 1900 5 view .LVU1795 - ARM GAS /tmp/ccEQxcUB.s page 336 - - + 5857 .loc 2 1900 5 view .LVU1837 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5704 .loc 2 1900 43 is_stmt 0 view .LVU1796 - 5705 003e 4FF48022 mov r2, #262144 - 5706 0042 5A60 str r2, [r3, #4] - 5707 .LVL557: + 5858 .loc 2 1900 43 is_stmt 0 view .LVU1838 + 5859 003e 4FF48022 mov r2, #262144 + 5860 0042 5A60 str r2, [r3, #4] + 5861 .LVL560: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5708 .loc 2 1900 43 view .LVU1797 - 5709 .LBE530: - 5710 .LBE529: -1630:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5711 .loc 1 1630 3 is_stmt 1 view .LVU1798 -1630:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5712 .loc 1 1630 28 is_stmt 0 view .LVU1799 - 5713 0044 42F21073 movw r3, #10000 - 5714 0048 ADF80430 strh r3, [sp, #4] @ movhi -1631:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 5715 .loc 1 1631 3 is_stmt 1 view .LVU1800 -1631:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 5716 .loc 1 1631 30 is_stmt 0 view .LVU1801 - 5717 004c 0294 str r4, [sp, #8] -1632:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5718 .loc 1 1632 3 is_stmt 1 view .LVU1802 -1632:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5719 .loc 1 1632 29 is_stmt 0 view .LVU1803 - 5720 004e 4FF40C73 mov r3, #560 - 5721 0052 0393 str r3, [sp, #12] -1633:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 5722 .loc 1 1633 3 is_stmt 1 view .LVU1804 -1633:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 5723 .loc 1 1633 32 is_stmt 0 view .LVU1805 - 5724 0054 0494 str r4, [sp, #16] -1634:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); - 5725 .loc 1 1634 3 is_stmt 1 view .LVU1806 - 5726 0056 0E4C ldr r4, .L307+12 - 5727 0058 01A9 add r1, sp, #4 - 5728 005a 2046 mov r0, r4 - 5729 005c FFF7FEFF bl LL_TIM_Init - 5730 .LVL558: -1635:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); - 5731 .loc 1 1635 3 view .LVU1807 - 5732 .LBB531: - 5733 .LBI531: + 5862 .loc 2 1900 43 view .LVU1839 + 5863 .LBE533: + 5864 .LBE532: +1650:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5865 .loc 1 1650 3 is_stmt 1 view .LVU1840 +1650:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5866 .loc 1 1650 28 is_stmt 0 view .LVU1841 + 5867 0044 42F21073 movw r3, #10000 + 5868 0048 ADF80430 strh r3, [sp, #4] @ movhi +1651:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 5869 .loc 1 1651 3 is_stmt 1 view .LVU1842 +1651:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 5870 .loc 1 1651 30 is_stmt 0 view .LVU1843 + 5871 004c 0294 str r4, [sp, #8] +1652:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5872 .loc 1 1652 3 is_stmt 1 view .LVU1844 +1652:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5873 .loc 1 1652 29 is_stmt 0 view .LVU1845 + 5874 004e 4FF40C73 mov r3, #560 + 5875 0052 0393 str r3, [sp, #12] +1653:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 5876 .loc 1 1653 3 is_stmt 1 view .LVU1846 +1653:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 5877 .loc 1 1653 32 is_stmt 0 view .LVU1847 + 5878 0054 0494 str r4, [sp, #16] +1654:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); + 5879 .loc 1 1654 3 is_stmt 1 view .LVU1848 + 5880 0056 0E4C ldr r4, .L318+12 + 5881 0058 01A9 add r1, sp, #4 + 5882 005a 2046 mov r0, r4 + 5883 005c FFF7FEFF bl LL_TIM_Init + 5884 .LVL561: +1655:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); + 5885 .loc 1 1655 3 view .LVU1849 + 5886 .LBB534: + 5887 .LBI534: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5734 .loc 5 1504 22 view .LVU1808 - 5735 .LBB532: + 5888 .loc 5 1504 22 view .LVU1850 + 5889 .LBB535: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5736 .loc 5 1506 3 view .LVU1809 - 5737 0060 2368 ldr r3, [r4] - 5738 0062 23F08003 bic r3, r3, #128 - 5739 0066 2360 str r3, [r4] - 5740 .LVL559: + 5890 .loc 5 1506 3 view .LVU1851 + 5891 0060 2368 ldr r3, [r4] + 5892 0062 23F08003 bic r3, r3, #128 + 5893 0066 2360 str r3, [r4] + 5894 .LVL562: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5741 .loc 5 1506 3 is_stmt 0 view .LVU1810 - 5742 .LBE532: - 5743 .LBE531: -1636:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); - 5744 .loc 1 1636 3 is_stmt 1 view .LVU1811 - ARM GAS /tmp/ccEQxcUB.s page 337 + 5895 .loc 5 1506 3 is_stmt 0 view .LVU1852 + ARM GAS /tmp/ccuHnxNu.s page 341 - 5745 .LBB533: - 5746 .LBI533: + 5896 .LBE535: + 5897 .LBE534: +1656:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); + 5898 .loc 1 1656 3 is_stmt 1 view .LVU1853 + 5899 .LBB536: + 5900 .LBI536: 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5747 .loc 5 3092 22 view .LVU1812 - 5748 .LBB534: + 5901 .loc 5 3092 22 view .LVU1854 + 5902 .LBB537: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5749 .loc 5 3094 3 view .LVU1813 - 5750 0068 A268 ldr r2, [r4, #8] - 5751 006a 0A4B ldr r3, .L307+16 - 5752 006c 1340 ands r3, r3, r2 - 5753 006e A360 str r3, [r4, #8] - 5754 .LVL560: + 5903 .loc 5 3094 3 view .LVU1855 + 5904 0068 A268 ldr r2, [r4, #8] + 5905 006a 0A4B ldr r3, .L318+16 + 5906 006c 1340 ands r3, r3, r2 + 5907 006e A360 str r3, [r4, #8] + 5908 .LVL563: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5755 .loc 5 3094 3 is_stmt 0 view .LVU1814 - 5756 .LBE534: - 5757 .LBE533: -1637:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); - 5758 .loc 1 1637 3 is_stmt 1 view .LVU1815 - 5759 .LBB535: - 5760 .LBI535: + 5909 .loc 5 3094 3 is_stmt 0 view .LVU1856 + 5910 .LBE537: + 5911 .LBE536: +1657:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); + 5912 .loc 1 1657 3 is_stmt 1 view .LVU1857 + 5913 .LBB538: + 5914 .LBI538: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5761 .loc 5 3138 22 view .LVU1816 - 5762 .LBB536: + 5915 .loc 5 3138 22 view .LVU1858 + 5916 .LBB539: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5763 .loc 5 3140 3 view .LVU1817 - 5764 0070 6368 ldr r3, [r4, #4] - 5765 0072 23F07003 bic r3, r3, #112 - 5766 0076 6360 str r3, [r4, #4] - 5767 .LVL561: + 5917 .loc 5 3140 3 view .LVU1859 + 5918 0070 6368 ldr r3, [r4, #4] + 5919 0072 23F07003 bic r3, r3, #112 + 5920 0076 6360 str r3, [r4, #4] + 5921 .LVL564: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5768 .loc 5 3140 3 is_stmt 0 view .LVU1818 - 5769 .LBE536: - 5770 .LBE535: -1638:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ - 5771 .loc 1 1638 3 is_stmt 1 view .LVU1819 - 5772 .LBB537: - 5773 .LBI537: + 5922 .loc 5 3140 3 is_stmt 0 view .LVU1860 + 5923 .LBE539: + 5924 .LBE538: +1658:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ + 5925 .loc 1 1658 3 is_stmt 1 view .LVU1861 + 5926 .LBB540: + 5927 .LBI540: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5774 .loc 5 3235 22 view .LVU1820 - 5775 .LBB538: - 5776 .loc 5 3237 3 view .LVU1821 - 5777 0078 A368 ldr r3, [r4, #8] - 5778 007a 23F08003 bic r3, r3, #128 - 5779 007e A360 str r3, [r4, #8] - 5780 .LVL562: - 5781 .loc 5 3237 3 is_stmt 0 view .LVU1822 - 5782 .LBE538: - 5783 .LBE537: -1643:Src/main.c **** - 5784 .loc 1 1643 1 view .LVU1823 - 5785 0080 06B0 add sp, sp, #24 - 5786 .LCFI57: - 5787 .cfi_def_cfa_offset 8 - 5788 @ sp needed - 5789 0082 10BD pop {r4, pc} - 5790 .L308: - 5791 .align 2 - ARM GAS /tmp/ccEQxcUB.s page 338 + 5928 .loc 5 3235 22 view .LVU1862 + 5929 .LBB541: + 5930 .loc 5 3237 3 view .LVU1863 + 5931 0078 A368 ldr r3, [r4, #8] + 5932 007a 23F08003 bic r3, r3, #128 + 5933 007e A360 str r3, [r4, #8] + 5934 .LVL565: + 5935 .loc 5 3237 3 is_stmt 0 view .LVU1864 + 5936 .LBE541: + 5937 .LBE540: +1663:Src/main.c **** + 5938 .loc 1 1663 1 view .LVU1865 + 5939 0080 06B0 add sp, sp, #24 + 5940 .LCFI60: + 5941 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccuHnxNu.s page 342 - 5792 .L307: - 5793 0084 00380240 .word 1073887232 - 5794 0088 00ED00E0 .word -536810240 - 5795 008c 00E100E0 .word -536813312 - 5796 0090 000C0040 .word 1073744896 - 5797 0094 F8BFFEFF .word -81928 - 5798 .cfi_endproc - 5799 .LFE1197: - 5801 .section .text.MX_TIM7_Init,"ax",%progbits - 5802 .align 1 - 5803 .syntax unified - 5804 .thumb - 5805 .thumb_func - 5807 MX_TIM7_Init: - 5808 .LFB1199: -1688:Src/main.c **** - 5809 .loc 1 1688 1 is_stmt 1 view -0 - 5810 .cfi_startproc - 5811 @ args = 0, pretend = 0, frame = 24 - 5812 @ frame_needed = 0, uses_anonymous_args = 0 - 5813 0000 10B5 push {r4, lr} - 5814 .LCFI58: - 5815 .cfi_def_cfa_offset 8 - 5816 .cfi_offset 4, -8 - 5817 .cfi_offset 14, -4 - 5818 0002 86B0 sub sp, sp, #24 - 5819 .LCFI59: - 5820 .cfi_def_cfa_offset 32 -1694:Src/main.c **** - 5821 .loc 1 1694 3 view .LVU1825 -1694:Src/main.c **** - 5822 .loc 1 1694 22 is_stmt 0 view .LVU1826 - 5823 0004 0024 movs r4, #0 - 5824 0006 0194 str r4, [sp, #4] - 5825 0008 0294 str r4, [sp, #8] - 5826 000a 0394 str r4, [sp, #12] - 5827 000c 0494 str r4, [sp, #16] - 5828 000e 0594 str r4, [sp, #20] -1697:Src/main.c **** - 5829 .loc 1 1697 3 is_stmt 1 view .LVU1827 - 5830 .LVL563: - 5831 .LBB539: - 5832 .LBI539: -1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5833 .loc 3 1071 22 view .LVU1828 - 5834 .LBB540: -1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 5835 .loc 3 1073 3 view .LVU1829 -1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5836 .loc 3 1074 3 view .LVU1830 - 5837 0010 1A4B ldr r3, .L311 - 5838 0012 1A6C ldr r2, [r3, #64] - 5839 0014 42F02002 orr r2, r2, #32 - 5840 0018 1A64 str r2, [r3, #64] -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5841 .loc 3 1076 3 view .LVU1831 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - ARM GAS /tmp/ccEQxcUB.s page 339 - - - 5842 .loc 3 1076 12 is_stmt 0 view .LVU1832 - 5843 001a 1B6C ldr r3, [r3, #64] - 5844 001c 03F02003 and r3, r3, #32 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5845 .loc 3 1076 10 view .LVU1833 - 5846 0020 0093 str r3, [sp] -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5847 .loc 3 1077 3 is_stmt 1 view .LVU1834 - 5848 0022 009B ldr r3, [sp] - 5849 .LVL564: -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5850 .loc 3 1077 3 is_stmt 0 view .LVU1835 - 5851 .LBE540: - 5852 .LBE539: -1700:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 5853 .loc 1 1700 3 is_stmt 1 view .LVU1836 - 5854 .LBB541: - 5855 .LBI541: -1884:Drivers/CMSIS/Include/core_cm7.h **** { - 5856 .loc 2 1884 26 view .LVU1837 - 5857 .LBB542: -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5858 .loc 2 1886 3 view .LVU1838 -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5859 .loc 2 1886 26 is_stmt 0 view .LVU1839 - 5860 0024 164B ldr r3, .L311+4 - 5861 0026 D868 ldr r0, [r3, #12] - 5862 .LBE542: - 5863 .LBE541: -1700:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 5864 .loc 1 1700 3 discriminator 1 view .LVU1840 - 5865 0028 2246 mov r2, r4 - 5866 002a 2146 mov r1, r4 - 5867 002c C0F30220 ubfx r0, r0, #8, #3 - 5868 0030 FFF7FEFF bl NVIC_EncodePriority - 5869 .LVL565: - 5870 .LBB543: - 5871 .LBI543: -2024:Drivers/CMSIS/Include/core_cm7.h **** { - 5872 .loc 2 2024 22 is_stmt 1 view .LVU1841 - 5873 .LBB544: -2026:Drivers/CMSIS/Include/core_cm7.h **** { - 5874 .loc 2 2026 3 view .LVU1842 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5875 .loc 2 2028 5 view .LVU1843 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5876 .loc 2 2028 49 is_stmt 0 view .LVU1844 - 5877 0034 0001 lsls r0, r0, #4 - 5878 .LVL566: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5879 .loc 2 2028 49 view .LVU1845 - 5880 0036 C0B2 uxtb r0, r0 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5881 .loc 2 2028 47 view .LVU1846 - 5882 0038 124B ldr r3, .L311+8 - 5883 003a 83F83703 strb r0, [r3, #823] - 5884 .LVL567: - ARM GAS /tmp/ccEQxcUB.s page 340 - - -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5885 .loc 2 2028 47 view .LVU1847 - 5886 .LBE544: - 5887 .LBE543: -1701:Src/main.c **** - 5888 .loc 1 1701 3 is_stmt 1 view .LVU1848 - 5889 .LBB545: - 5890 .LBI545: -1896:Drivers/CMSIS/Include/core_cm7.h **** { - 5891 .loc 2 1896 22 view .LVU1849 - 5892 .LBB546: -1898:Drivers/CMSIS/Include/core_cm7.h **** { - 5893 .loc 2 1898 3 view .LVU1850 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5894 .loc 2 1900 5 view .LVU1851 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5895 .loc 2 1900 43 is_stmt 0 view .LVU1852 - 5896 003e 4FF40002 mov r2, #8388608 - 5897 0042 5A60 str r2, [r3, #4] - 5898 .LVL568: -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5899 .loc 2 1900 43 view .LVU1853 - 5900 .LBE546: - 5901 .LBE545: -1706:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5902 .loc 1 1706 3 is_stmt 1 view .LVU1854 -1706:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5903 .loc 1 1706 28 is_stmt 0 view .LVU1855 - 5904 0044 40F29733 movw r3, #919 - 5905 0048 ADF80430 strh r3, [sp, #4] @ movhi -1707:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 5906 .loc 1 1707 3 is_stmt 1 view .LVU1856 -1707:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 5907 .loc 1 1707 30 is_stmt 0 view .LVU1857 - 5908 004c 0294 str r4, [sp, #8] -1708:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 5909 .loc 1 1708 3 is_stmt 1 view .LVU1858 -1708:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 5910 .loc 1 1708 29 is_stmt 0 view .LVU1859 - 5911 004e 6323 movs r3, #99 - 5912 0050 0393 str r3, [sp, #12] -1709:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); - 5913 .loc 1 1709 3 is_stmt 1 view .LVU1860 - 5914 0052 0D4C ldr r4, .L311+12 - 5915 0054 01A9 add r1, sp, #4 - 5916 0056 2046 mov r0, r4 - 5917 0058 FFF7FEFF bl LL_TIM_Init - 5918 .LVL569: -1710:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); - 5919 .loc 1 1710 3 view .LVU1861 - 5920 .LBB547: - 5921 .LBI547: -1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5922 .loc 5 1504 22 view .LVU1862 - 5923 .LBB548: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5924 .loc 5 1506 3 view .LVU1863 - ARM GAS /tmp/ccEQxcUB.s page 341 - - - 5925 005c 2368 ldr r3, [r4] - 5926 005e 23F08003 bic r3, r3, #128 - 5927 0062 2360 str r3, [r4] - 5928 .LVL570: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5929 .loc 5 1506 3 is_stmt 0 view .LVU1864 - 5930 .LBE548: - 5931 .LBE547: -1711:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); - 5932 .loc 1 1711 3 is_stmt 1 view .LVU1865 - 5933 .LBB549: - 5934 .LBI549: -3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5935 .loc 5 3138 22 view .LVU1866 - 5936 .LBB550: -3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5937 .loc 5 3140 3 view .LVU1867 - 5938 0064 6368 ldr r3, [r4, #4] - 5939 0066 23F07003 bic r3, r3, #112 - 5940 006a 43F01003 orr r3, r3, #16 - 5941 006e 6360 str r3, [r4, #4] - 5942 .LVL571: -3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5943 .loc 5 3140 3 is_stmt 0 view .LVU1868 - 5944 .LBE550: - 5945 .LBE549: -1712:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ - 5946 .loc 1 1712 3 is_stmt 1 view .LVU1869 - 5947 .LBB551: - 5948 .LBI551: -3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5949 .loc 5 3235 22 view .LVU1870 - 5950 .LBB552: - 5951 .loc 5 3237 3 view .LVU1871 - 5952 0070 A368 ldr r3, [r4, #8] - 5953 0072 23F08003 bic r3, r3, #128 - 5954 0076 A360 str r3, [r4, #8] - 5955 .LVL572: - 5956 .loc 5 3237 3 is_stmt 0 view .LVU1872 - 5957 .LBE552: - 5958 .LBE551: + 5942 @ sp needed + 5943 0082 10BD pop {r4, pc} + 5944 .L319: + 5945 .align 2 + 5946 .L318: + 5947 0084 00380240 .word 1073887232 + 5948 0088 00ED00E0 .word -536810240 + 5949 008c 00E100E0 .word -536813312 + 5950 0090 000C0040 .word 1073744896 + 5951 0094 F8BFFEFF .word -81928 + 5952 .cfi_endproc + 5953 .LFE1197: + 5955 .section .text.MX_TIM7_Init,"ax",%progbits + 5956 .align 1 + 5957 .syntax unified + 5958 .thumb + 5959 .thumb_func + 5961 MX_TIM7_Init: + 5962 .LFB1199: +1708:Src/main.c **** + 5963 .loc 1 1708 1 is_stmt 1 view -0 + 5964 .cfi_startproc + 5965 @ args = 0, pretend = 0, frame = 24 + 5966 @ frame_needed = 0, uses_anonymous_args = 0 + 5967 0000 10B5 push {r4, lr} + 5968 .LCFI61: + 5969 .cfi_def_cfa_offset 8 + 5970 .cfi_offset 4, -8 + 5971 .cfi_offset 14, -4 + 5972 0002 86B0 sub sp, sp, #24 + 5973 .LCFI62: + 5974 .cfi_def_cfa_offset 32 +1714:Src/main.c **** + 5975 .loc 1 1714 3 view .LVU1867 +1714:Src/main.c **** + 5976 .loc 1 1714 22 is_stmt 0 view .LVU1868 + 5977 0004 0024 movs r4, #0 + 5978 0006 0194 str r4, [sp, #4] + 5979 0008 0294 str r4, [sp, #8] + 5980 000a 0394 str r4, [sp, #12] + 5981 000c 0494 str r4, [sp, #16] + 5982 000e 0594 str r4, [sp, #20] 1717:Src/main.c **** - 5959 .loc 1 1717 1 view .LVU1873 - 5960 0078 06B0 add sp, sp, #24 - 5961 .LCFI60: - 5962 .cfi_def_cfa_offset 8 - 5963 @ sp needed - 5964 007a 10BD pop {r4, pc} - 5965 .L312: - 5966 .align 2 - 5967 .L311: - 5968 007c 00380240 .word 1073887232 - 5969 0080 00ED00E0 .word -536810240 - 5970 0084 00E100E0 .word -536813312 - 5971 0088 00140040 .word 1073746944 - 5972 .cfi_endproc - 5973 .LFE1199: - ARM GAS /tmp/ccEQxcUB.s page 342 - - - 5975 .section .text.MX_TIM6_Init,"ax",%progbits - 5976 .align 1 - 5977 .syntax unified - 5978 .thumb - 5979 .thumb_func - 5981 MX_TIM6_Init: - 5982 .LFB1198: -1651:Src/main.c **** - 5983 .loc 1 1651 1 is_stmt 1 view -0 - 5984 .cfi_startproc - 5985 @ args = 0, pretend = 0, frame = 24 - 5986 @ frame_needed = 0, uses_anonymous_args = 0 - 5987 0000 10B5 push {r4, lr} - 5988 .LCFI61: - 5989 .cfi_def_cfa_offset 8 - 5990 .cfi_offset 4, -8 - 5991 .cfi_offset 14, -4 - 5992 0002 86B0 sub sp, sp, #24 - 5993 .LCFI62: - 5994 .cfi_def_cfa_offset 32 -1657:Src/main.c **** - 5995 .loc 1 1657 3 view .LVU1875 -1657:Src/main.c **** - 5996 .loc 1 1657 22 is_stmt 0 view .LVU1876 - 5997 0004 0024 movs r4, #0 - 5998 0006 0194 str r4, [sp, #4] - 5999 0008 0294 str r4, [sp, #8] - 6000 000a 0394 str r4, [sp, #12] - 6001 000c 0494 str r4, [sp, #16] - 6002 000e 0594 str r4, [sp, #20] -1660:Src/main.c **** - 6003 .loc 1 1660 3 is_stmt 1 view .LVU1877 - 6004 .LVL573: - 6005 .LBB553: - 6006 .LBI553: + 5983 .loc 1 1717 3 is_stmt 1 view .LVU1869 + 5984 .LVL566: + 5985 .LBB542: + 5986 .LBI542: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 6007 .loc 3 1071 22 view .LVU1878 - 6008 .LBB554: + 5987 .loc 3 1071 22 view .LVU1870 + 5988 .LBB543: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 6009 .loc 3 1073 3 view .LVU1879 + 5989 .loc 3 1073 3 view .LVU1871 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 6010 .loc 3 1074 3 view .LVU1880 - 6011 0010 1A4B ldr r3, .L315 - 6012 0012 1A6C ldr r2, [r3, #64] - 6013 0014 42F01002 orr r2, r2, #16 - 6014 0018 1A64 str r2, [r3, #64] -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6015 .loc 3 1076 3 view .LVU1881 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6016 .loc 3 1076 12 is_stmt 0 view .LVU1882 - 6017 001a 1B6C ldr r3, [r3, #64] - 6018 001c 03F01003 and r3, r3, #16 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6019 .loc 3 1076 10 view .LVU1883 - 6020 0020 0093 str r3, [sp] -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6021 .loc 3 1077 3 is_stmt 1 view .LVU1884 - ARM GAS /tmp/ccEQxcUB.s page 343 + 5990 .loc 3 1074 3 view .LVU1872 + 5991 0010 1A4B ldr r3, .L322 + 5992 0012 1A6C ldr r2, [r3, #64] + 5993 0014 42F02002 orr r2, r2, #32 + ARM GAS /tmp/ccuHnxNu.s page 343 - 6022 0022 009B ldr r3, [sp] - 6023 .LVL574: + 5994 0018 1A64 str r2, [r3, #64] +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5995 .loc 3 1076 3 view .LVU1873 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5996 .loc 3 1076 12 is_stmt 0 view .LVU1874 + 5997 001a 1B6C ldr r3, [r3, #64] + 5998 001c 03F02003 and r3, r3, #32 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5999 .loc 3 1076 10 view .LVU1875 + 6000 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6024 .loc 3 1077 3 is_stmt 0 view .LVU1885 - 6025 .LBE554: - 6026 .LBE553: -1663:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 6027 .loc 1 1663 3 is_stmt 1 view .LVU1886 - 6028 .LBB555: - 6029 .LBI555: + 6001 .loc 3 1077 3 is_stmt 1 view .LVU1876 + 6002 0022 009B ldr r3, [sp] + 6003 .LVL567: +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 6004 .loc 3 1077 3 is_stmt 0 view .LVU1877 + 6005 .LBE543: + 6006 .LBE542: +1720:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 6007 .loc 1 1720 3 is_stmt 1 view .LVU1878 + 6008 .LBB544: + 6009 .LBI544: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 6030 .loc 2 1884 26 view .LVU1887 - 6031 .LBB556: + 6010 .loc 2 1884 26 view .LVU1879 + 6011 .LBB545: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6032 .loc 2 1886 3 view .LVU1888 + 6012 .loc 2 1886 3 view .LVU1880 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6033 .loc 2 1886 26 is_stmt 0 view .LVU1889 - 6034 0024 164B ldr r3, .L315+4 - 6035 0026 D868 ldr r0, [r3, #12] - 6036 .LBE556: - 6037 .LBE555: -1663:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 6038 .loc 1 1663 3 discriminator 1 view .LVU1890 - 6039 0028 2246 mov r2, r4 - 6040 002a 2146 mov r1, r4 - 6041 002c C0F30220 ubfx r0, r0, #8, #3 - 6042 0030 FFF7FEFF bl NVIC_EncodePriority - 6043 .LVL575: - 6044 .LBB557: - 6045 .LBI557: + 6013 .loc 2 1886 26 is_stmt 0 view .LVU1881 + 6014 0024 164B ldr r3, .L322+4 + 6015 0026 D868 ldr r0, [r3, #12] + 6016 .LBE545: + 6017 .LBE544: +1720:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 6018 .loc 1 1720 3 discriminator 1 view .LVU1882 + 6019 0028 2246 mov r2, r4 + 6020 002a 2146 mov r1, r4 + 6021 002c C0F30220 ubfx r0, r0, #8, #3 + 6022 0030 FFF7FEFF bl NVIC_EncodePriority + 6023 .LVL568: + 6024 .LBB546: + 6025 .LBI546: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 6046 .loc 2 2024 22 is_stmt 1 view .LVU1891 - 6047 .LBB558: + 6026 .loc 2 2024 22 is_stmt 1 view .LVU1883 + 6027 .LBB547: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 6048 .loc 2 2026 3 view .LVU1892 + 6028 .loc 2 2026 3 view .LVU1884 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6049 .loc 2 2028 5 view .LVU1893 + 6029 .loc 2 2028 5 view .LVU1885 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6050 .loc 2 2028 49 is_stmt 0 view .LVU1894 - 6051 0034 0001 lsls r0, r0, #4 - 6052 .LVL576: + 6030 .loc 2 2028 49 is_stmt 0 view .LVU1886 + 6031 0034 0001 lsls r0, r0, #4 + 6032 .LVL569: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6053 .loc 2 2028 49 view .LVU1895 - 6054 0036 C0B2 uxtb r0, r0 + 6033 .loc 2 2028 49 view .LVU1887 + 6034 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6055 .loc 2 2028 47 view .LVU1896 - 6056 0038 124B ldr r3, .L315+8 - 6057 003a 83F83603 strb r0, [r3, #822] - 6058 .LVL577: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6059 .loc 2 2028 47 view .LVU1897 - 6060 .LBE558: - 6061 .LBE557: -1664:Src/main.c **** - 6062 .loc 1 1664 3 is_stmt 1 view .LVU1898 - 6063 .LBB559: - 6064 .LBI559: - ARM GAS /tmp/ccEQxcUB.s page 344 + ARM GAS /tmp/ccuHnxNu.s page 344 + 6035 .loc 2 2028 47 view .LVU1888 + 6036 0038 124B ldr r3, .L322+8 + 6037 003a 83F83703 strb r0, [r3, #823] + 6038 .LVL570: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6039 .loc 2 2028 47 view .LVU1889 + 6040 .LBE547: + 6041 .LBE546: +1721:Src/main.c **** + 6042 .loc 1 1721 3 is_stmt 1 view .LVU1890 + 6043 .LBB548: + 6044 .LBI548: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 6065 .loc 2 1896 22 view .LVU1899 - 6066 .LBB560: + 6045 .loc 2 1896 22 view .LVU1891 + 6046 .LBB549: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 6067 .loc 2 1898 3 view .LVU1900 + 6047 .loc 2 1898 3 view .LVU1892 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6068 .loc 2 1900 5 view .LVU1901 + 6048 .loc 2 1900 5 view .LVU1893 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6069 .loc 2 1900 43 is_stmt 0 view .LVU1902 - 6070 003e 4FF48002 mov r2, #4194304 - 6071 0042 5A60 str r2, [r3, #4] - 6072 .LVL578: + 6049 .loc 2 1900 43 is_stmt 0 view .LVU1894 + 6050 003e 4FF40002 mov r2, #8388608 + 6051 0042 5A60 str r2, [r3, #4] + 6052 .LVL571: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6073 .loc 2 1900 43 view .LVU1903 - 6074 .LBE560: - 6075 .LBE559: -1669:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 6076 .loc 1 1669 3 is_stmt 1 view .LVU1904 -1669:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 6077 .loc 1 1669 28 is_stmt 0 view .LVU1905 - 6078 0044 4BF2AF33 movw r3, #45999 - 6079 0048 ADF80430 strh r3, [sp, #4] @ movhi -1670:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 6080 .loc 1 1670 3 is_stmt 1 view .LVU1906 -1670:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 6081 .loc 1 1670 30 is_stmt 0 view .LVU1907 - 6082 004c 0294 str r4, [sp, #8] -1671:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 6083 .loc 1 1671 3 is_stmt 1 view .LVU1908 -1671:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 6084 .loc 1 1671 29 is_stmt 0 view .LVU1909 - 6085 004e 1323 movs r3, #19 - 6086 0050 0393 str r3, [sp, #12] -1672:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); - 6087 .loc 1 1672 3 is_stmt 1 view .LVU1910 - 6088 0052 0D4C ldr r4, .L315+12 - 6089 0054 01A9 add r1, sp, #4 - 6090 0056 2046 mov r0, r4 - 6091 0058 FFF7FEFF bl LL_TIM_Init - 6092 .LVL579: -1673:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); - 6093 .loc 1 1673 3 view .LVU1911 - 6094 .LBB561: - 6095 .LBI561: + 6053 .loc 2 1900 43 view .LVU1895 + 6054 .LBE549: + 6055 .LBE548: +1726:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6056 .loc 1 1726 3 is_stmt 1 view .LVU1896 +1726:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6057 .loc 1 1726 28 is_stmt 0 view .LVU1897 + 6058 0044 40F29733 movw r3, #919 + 6059 0048 ADF80430 strh r3, [sp, #4] @ movhi +1727:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 6060 .loc 1 1727 3 is_stmt 1 view .LVU1898 +1727:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 6061 .loc 1 1727 30 is_stmt 0 view .LVU1899 + 6062 004c 0294 str r4, [sp, #8] +1728:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 6063 .loc 1 1728 3 is_stmt 1 view .LVU1900 +1728:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 6064 .loc 1 1728 29 is_stmt 0 view .LVU1901 + 6065 004e 6323 movs r3, #99 + 6066 0050 0393 str r3, [sp, #12] +1729:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); + 6067 .loc 1 1729 3 is_stmt 1 view .LVU1902 + 6068 0052 0D4C ldr r4, .L322+12 + 6069 0054 01A9 add r1, sp, #4 + 6070 0056 2046 mov r0, r4 + 6071 0058 FFF7FEFF bl LL_TIM_Init + 6072 .LVL572: +1730:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); + 6073 .loc 1 1730 3 view .LVU1903 + 6074 .LBB550: + 6075 .LBI550: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6096 .loc 5 1504 22 view .LVU1912 - 6097 .LBB562: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6098 .loc 5 1506 3 view .LVU1913 - 6099 005c 2368 ldr r3, [r4] - 6100 005e 23F08003 bic r3, r3, #128 - 6101 0062 2360 str r3, [r4] - 6102 .LVL580: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6103 .loc 5 1506 3 is_stmt 0 view .LVU1914 - 6104 .LBE562: - 6105 .LBE561: - ARM GAS /tmp/ccEQxcUB.s page 345 + ARM GAS /tmp/ccuHnxNu.s page 345 -1674:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); - 6106 .loc 1 1674 3 is_stmt 1 view .LVU1915 - 6107 .LBB563: - 6108 .LBI563: + 6076 .loc 5 1504 22 view .LVU1904 + 6077 .LBB551: +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6078 .loc 5 1506 3 view .LVU1905 + 6079 005c 2368 ldr r3, [r4] + 6080 005e 23F08003 bic r3, r3, #128 + 6081 0062 2360 str r3, [r4] + 6082 .LVL573: +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6083 .loc 5 1506 3 is_stmt 0 view .LVU1906 + 6084 .LBE551: + 6085 .LBE550: +1731:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); + 6086 .loc 1 1731 3 is_stmt 1 view .LVU1907 + 6087 .LBB552: + 6088 .LBI552: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6109 .loc 5 3138 22 view .LVU1916 - 6110 .LBB564: + 6089 .loc 5 3138 22 view .LVU1908 + 6090 .LBB553: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6111 .loc 5 3140 3 view .LVU1917 - 6112 0064 6368 ldr r3, [r4, #4] - 6113 0066 23F07003 bic r3, r3, #112 - 6114 006a 43F01003 orr r3, r3, #16 - 6115 006e 6360 str r3, [r4, #4] - 6116 .LVL581: + 6091 .loc 5 3140 3 view .LVU1909 + 6092 0064 6368 ldr r3, [r4, #4] + 6093 0066 23F07003 bic r3, r3, #112 + 6094 006a 43F01003 orr r3, r3, #16 + 6095 006e 6360 str r3, [r4, #4] + 6096 .LVL574: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6117 .loc 5 3140 3 is_stmt 0 view .LVU1918 - 6118 .LBE564: - 6119 .LBE563: -1675:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ - 6120 .loc 1 1675 3 is_stmt 1 view .LVU1919 - 6121 .LBB565: - 6122 .LBI565: + 6097 .loc 5 3140 3 is_stmt 0 view .LVU1910 + 6098 .LBE553: + 6099 .LBE552: +1732:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ + 6100 .loc 1 1732 3 is_stmt 1 view .LVU1911 + 6101 .LBB554: + 6102 .LBI554: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6123 .loc 5 3235 22 view .LVU1920 - 6124 .LBB566: - 6125 .loc 5 3237 3 view .LVU1921 - 6126 0070 A368 ldr r3, [r4, #8] - 6127 0072 23F08003 bic r3, r3, #128 - 6128 0076 A360 str r3, [r4, #8] - 6129 .LVL582: - 6130 .loc 5 3237 3 is_stmt 0 view .LVU1922 - 6131 .LBE566: - 6132 .LBE565: + 6103 .loc 5 3235 22 view .LVU1912 + 6104 .LBB555: + 6105 .loc 5 3237 3 view .LVU1913 + 6106 0070 A368 ldr r3, [r4, #8] + 6107 0072 23F08003 bic r3, r3, #128 + 6108 0076 A360 str r3, [r4, #8] + 6109 .LVL575: + 6110 .loc 5 3237 3 is_stmt 0 view .LVU1914 + 6111 .LBE555: + 6112 .LBE554: +1737:Src/main.c **** + 6113 .loc 1 1737 1 view .LVU1915 + 6114 0078 06B0 add sp, sp, #24 + 6115 .LCFI63: + 6116 .cfi_def_cfa_offset 8 + 6117 @ sp needed + 6118 007a 10BD pop {r4, pc} + 6119 .L323: + 6120 .align 2 + 6121 .L322: + 6122 007c 00380240 .word 1073887232 + 6123 0080 00ED00E0 .word -536810240 + ARM GAS /tmp/ccuHnxNu.s page 346 + + + 6124 0084 00E100E0 .word -536813312 + 6125 0088 00140040 .word 1073746944 + 6126 .cfi_endproc + 6127 .LFE1199: + 6129 .section .text.MX_TIM6_Init,"ax",%progbits + 6130 .align 1 + 6131 .syntax unified + 6132 .thumb + 6133 .thumb_func + 6135 MX_TIM6_Init: + 6136 .LFB1198: +1671:Src/main.c **** + 6137 .loc 1 1671 1 is_stmt 1 view -0 + 6138 .cfi_startproc + 6139 @ args = 0, pretend = 0, frame = 24 + 6140 @ frame_needed = 0, uses_anonymous_args = 0 + 6141 0000 10B5 push {r4, lr} + 6142 .LCFI64: + 6143 .cfi_def_cfa_offset 8 + 6144 .cfi_offset 4, -8 + 6145 .cfi_offset 14, -4 + 6146 0002 86B0 sub sp, sp, #24 + 6147 .LCFI65: + 6148 .cfi_def_cfa_offset 32 +1677:Src/main.c **** + 6149 .loc 1 1677 3 view .LVU1917 +1677:Src/main.c **** + 6150 .loc 1 1677 22 is_stmt 0 view .LVU1918 + 6151 0004 0024 movs r4, #0 + 6152 0006 0194 str r4, [sp, #4] + 6153 0008 0294 str r4, [sp, #8] + 6154 000a 0394 str r4, [sp, #12] + 6155 000c 0494 str r4, [sp, #16] + 6156 000e 0594 str r4, [sp, #20] 1680:Src/main.c **** - 6133 .loc 1 1680 1 view .LVU1923 - 6134 0078 06B0 add sp, sp, #24 - 6135 .LCFI63: - 6136 .cfi_def_cfa_offset 8 - 6137 @ sp needed - 6138 007a 10BD pop {r4, pc} - 6139 .L316: - 6140 .align 2 - 6141 .L315: - 6142 007c 00380240 .word 1073887232 - 6143 0080 00ED00E0 .word -536810240 - 6144 0084 00E100E0 .word -536813312 - 6145 0088 00100040 .word 1073745920 - 6146 .cfi_endproc - 6147 .LFE1198: - 6149 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 - 6150 .align 2 - 6151 .LC0: - 6152 0000 2F00 .ascii "/\000" - 6153 0002 0000 .align 2 - 6154 .LC1: - 6155 0004 434F4D4D .ascii "COMMAND.TXT\000" - 6155 414E442E - ARM GAS /tmp/ccEQxcUB.s page 346 + 6157 .loc 1 1680 3 is_stmt 1 view .LVU1919 + 6158 .LVL576: + 6159 .LBB556: + 6160 .LBI556: +1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 6161 .loc 3 1071 22 view .LVU1920 + 6162 .LBB557: +1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); + 6163 .loc 3 1073 3 view .LVU1921 +1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 6164 .loc 3 1074 3 view .LVU1922 + 6165 0010 1A4B ldr r3, .L326 + 6166 0012 1A6C ldr r2, [r3, #64] + 6167 0014 42F01002 orr r2, r2, #16 + 6168 0018 1A64 str r2, [r3, #64] +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 6169 .loc 3 1076 3 view .LVU1923 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 6170 .loc 3 1076 12 is_stmt 0 view .LVU1924 + 6171 001a 1B6C ldr r3, [r3, #64] + 6172 001c 03F01003 and r3, r3, #16 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + ARM GAS /tmp/ccuHnxNu.s page 347 - 6155 54585400 - 6156 .section .text.Init_params,"ax",%progbits - 6157 .align 1 - 6158 .syntax unified - 6159 .thumb - 6160 .thumb_func - 6162 Init_params: - 6163 .LFB1208: -2229:Src/main.c **** TO6 = 0; - 6164 .loc 1 2229 1 is_stmt 1 view -0 - 6165 .cfi_startproc - 6166 @ args = 0, pretend = 0, frame = 0 - 6167 @ frame_needed = 0, uses_anonymous_args = 0 - 6168 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 6169 .LCFI64: - 6170 .cfi_def_cfa_offset 24 - 6171 .cfi_offset 4, -24 - 6172 .cfi_offset 5, -20 - 6173 .cfi_offset 6, -16 - 6174 .cfi_offset 7, -12 - 6175 .cfi_offset 8, -8 - 6176 .cfi_offset 14, -4 -2230:Src/main.c **** TO7 = 0; - 6177 .loc 1 2230 2 view .LVU1925 -2230:Src/main.c **** TO7 = 0; - 6178 .loc 1 2230 6 is_stmt 0 view .LVU1926 - 6179 0004 0023 movs r3, #0 - 6180 0006 9F4A ldr r2, .L329 - 6181 0008 1360 str r3, [r2] -2231:Src/main.c **** TO7_before = 0; - 6182 .loc 1 2231 2 is_stmt 1 view .LVU1927 -2231:Src/main.c **** TO7_before = 0; - 6183 .loc 1 2231 6 is_stmt 0 view .LVU1928 - 6184 000a 9F4A ldr r2, .L329+4 - 6185 000c 1360 str r3, [r2] -2232:Src/main.c **** TO6_before = 0; - 6186 .loc 1 2232 2 is_stmt 1 view .LVU1929 -2232:Src/main.c **** TO6_before = 0; - 6187 .loc 1 2232 13 is_stmt 0 view .LVU1930 - 6188 000e 9F4A ldr r2, .L329+8 - 6189 0010 1360 str r3, [r2] -2233:Src/main.c **** TO6_uart = 0; - 6190 .loc 1 2233 2 is_stmt 1 view .LVU1931 -2233:Src/main.c **** TO6_uart = 0; - 6191 .loc 1 2233 13 is_stmt 0 view .LVU1932 - 6192 0012 9F4A ldr r2, .L329+12 - 6193 0014 1360 str r3, [r2] -2234:Src/main.c **** flg_tmt = 0; - 6194 .loc 1 2234 2 is_stmt 1 view .LVU1933 -2234:Src/main.c **** flg_tmt = 0; - 6195 .loc 1 2234 11 is_stmt 0 view .LVU1934 - 6196 0016 9F4A ldr r2, .L329+16 - 6197 0018 1360 str r3, [r2] -2235:Src/main.c **** UART_rec_incr = 0; - 6198 .loc 1 2235 2 is_stmt 1 view .LVU1935 -2235:Src/main.c **** UART_rec_incr = 0; - 6199 .loc 1 2235 10 is_stmt 0 view .LVU1936 - ARM GAS /tmp/ccEQxcUB.s page 347 + 6173 .loc 3 1076 10 view .LVU1925 + 6174 0020 0093 str r3, [sp] +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 6175 .loc 3 1077 3 is_stmt 1 view .LVU1926 + 6176 0022 009B ldr r3, [sp] + 6177 .LVL577: +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 6178 .loc 3 1077 3 is_stmt 0 view .LVU1927 + 6179 .LBE557: + 6180 .LBE556: +1683:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 6181 .loc 1 1683 3 is_stmt 1 view .LVU1928 + 6182 .LBB558: + 6183 .LBI558: +1884:Drivers/CMSIS/Include/core_cm7.h **** { + 6184 .loc 2 1884 26 view .LVU1929 + 6185 .LBB559: +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 6186 .loc 2 1886 3 view .LVU1930 +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 6187 .loc 2 1886 26 is_stmt 0 view .LVU1931 + 6188 0024 164B ldr r3, .L326+4 + 6189 0026 D868 ldr r0, [r3, #12] + 6190 .LBE559: + 6191 .LBE558: +1683:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 6192 .loc 1 1683 3 discriminator 1 view .LVU1932 + 6193 0028 2246 mov r2, r4 + 6194 002a 2146 mov r1, r4 + 6195 002c C0F30220 ubfx r0, r0, #8, #3 + 6196 0030 FFF7FEFF bl NVIC_EncodePriority + 6197 .LVL578: + 6198 .LBB560: + 6199 .LBI560: +2024:Drivers/CMSIS/Include/core_cm7.h **** { + 6200 .loc 2 2024 22 is_stmt 1 view .LVU1933 + 6201 .LBB561: +2026:Drivers/CMSIS/Include/core_cm7.h **** { + 6202 .loc 2 2026 3 view .LVU1934 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6203 .loc 2 2028 5 view .LVU1935 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6204 .loc 2 2028 49 is_stmt 0 view .LVU1936 + 6205 0034 0001 lsls r0, r0, #4 + 6206 .LVL579: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6207 .loc 2 2028 49 view .LVU1937 + 6208 0036 C0B2 uxtb r0, r0 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6209 .loc 2 2028 47 view .LVU1938 + 6210 0038 124B ldr r3, .L326+8 + 6211 003a 83F83603 strb r0, [r3, #822] + 6212 .LVL580: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6213 .loc 2 2028 47 view .LVU1939 + 6214 .LBE561: + 6215 .LBE560: + ARM GAS /tmp/ccuHnxNu.s page 348 - 6200 001a 9F4A ldr r2, .L329+20 - 6201 001c 1370 strb r3, [r2] -2236:Src/main.c **** fgoto = 0; - 6202 .loc 1 2236 2 is_stmt 1 view .LVU1937 -2236:Src/main.c **** fgoto = 0; - 6203 .loc 1 2236 16 is_stmt 0 view .LVU1938 - 6204 001e 9F4A ldr r2, .L329+24 - 6205 0020 1380 strh r3, [r2] @ movhi -2237:Src/main.c **** sizeoffile = 0; - 6206 .loc 1 2237 2 is_stmt 1 view .LVU1939 -2237:Src/main.c **** sizeoffile = 0; - 6207 .loc 1 2237 8 is_stmt 0 view .LVU1940 - 6208 0022 9F4A ldr r2, .L329+28 - 6209 0024 1360 str r3, [r2] -2238:Src/main.c **** u_tx_flg = 0; - 6210 .loc 1 2238 2 is_stmt 1 view .LVU1941 -2238:Src/main.c **** u_tx_flg = 0; - 6211 .loc 1 2238 13 is_stmt 0 view .LVU1942 - 6212 0026 9F4A ldr r2, .L329+32 - 6213 0028 1360 str r3, [r2] -2239:Src/main.c **** u_rx_flg = 0; - 6214 .loc 1 2239 2 is_stmt 1 view .LVU1943 -2239:Src/main.c **** u_rx_flg = 0; - 6215 .loc 1 2239 11 is_stmt 0 view .LVU1944 - 6216 002a 9F4A ldr r2, .L329+36 - 6217 002c 1370 strb r3, [r2] -2240:Src/main.c **** //State_Data[0]=0; - 6218 .loc 1 2240 2 is_stmt 1 view .LVU1945 -2240:Src/main.c **** //State_Data[0]=0; - 6219 .loc 1 2240 11 is_stmt 0 view .LVU1946 - 6220 002e 9F4A ldr r2, .L329+40 - 6221 0030 1370 strb r3, [r2] -2243:Src/main.c **** { - 6222 .loc 1 2243 2 is_stmt 1 view .LVU1947 - 6223 .LBB567: -2243:Src/main.c **** { - 6224 .loc 1 2243 7 view .LVU1948 - 6225 .LVL583: -2243:Src/main.c **** { - 6226 .loc 1 2243 2 is_stmt 0 view .LVU1949 - 6227 0032 05E0 b .L318 - 6228 .LVL584: - 6229 .L319: -2245:Src/main.c **** } - 6230 .loc 1 2245 3 is_stmt 1 view .LVU1950 -2245:Src/main.c **** } - 6231 .loc 1 2245 16 is_stmt 0 view .LVU1951 - 6232 0034 9E4A ldr r2, .L329+44 - 6233 0036 0021 movs r1, #0 - 6234 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi -2243:Src/main.c **** { - 6235 .loc 1 2243 31 is_stmt 1 discriminator 3 view .LVU1952 - 6236 003c 0133 adds r3, r3, #1 - 6237 .LVL585: -2243:Src/main.c **** { - 6238 .loc 1 2243 31 is_stmt 0 discriminator 3 view .LVU1953 - 6239 003e 9BB2 uxth r3, r3 - ARM GAS /tmp/ccEQxcUB.s page 348 +1684:Src/main.c **** + 6216 .loc 1 1684 3 is_stmt 1 view .LVU1940 + 6217 .LBB562: + 6218 .LBI562: +1896:Drivers/CMSIS/Include/core_cm7.h **** { + 6219 .loc 2 1896 22 view .LVU1941 + 6220 .LBB563: +1898:Drivers/CMSIS/Include/core_cm7.h **** { + 6221 .loc 2 1898 3 view .LVU1942 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 6222 .loc 2 1900 5 view .LVU1943 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 6223 .loc 2 1900 43 is_stmt 0 view .LVU1944 + 6224 003e 4FF48002 mov r2, #4194304 + 6225 0042 5A60 str r2, [r3, #4] + 6226 .LVL581: +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 6227 .loc 2 1900 43 view .LVU1945 + 6228 .LBE563: + 6229 .LBE562: +1689:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6230 .loc 1 1689 3 is_stmt 1 view .LVU1946 +1689:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6231 .loc 1 1689 28 is_stmt 0 view .LVU1947 + 6232 0044 4BF2AF33 movw r3, #45999 + 6233 0048 ADF80430 strh r3, [sp, #4] @ movhi +1690:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 6234 .loc 1 1690 3 is_stmt 1 view .LVU1948 +1690:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 6235 .loc 1 1690 30 is_stmt 0 view .LVU1949 + 6236 004c 0294 str r4, [sp, #8] +1691:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 6237 .loc 1 1691 3 is_stmt 1 view .LVU1950 +1691:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 6238 .loc 1 1691 29 is_stmt 0 view .LVU1951 + 6239 004e 1323 movs r3, #19 + 6240 0050 0393 str r3, [sp, #12] +1692:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); + 6241 .loc 1 1692 3 is_stmt 1 view .LVU1952 + 6242 0052 0D4C ldr r4, .L326+12 + 6243 0054 01A9 add r1, sp, #4 + 6244 0056 2046 mov r0, r4 + 6245 0058 FFF7FEFF bl LL_TIM_Init + 6246 .LVL582: +1693:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); + 6247 .loc 1 1693 3 view .LVU1953 + 6248 .LBB564: + 6249 .LBI564: +1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + 6250 .loc 5 1504 22 view .LVU1954 + 6251 .LBB565: +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6252 .loc 5 1506 3 view .LVU1955 + 6253 005c 2368 ldr r3, [r4] + 6254 005e 23F08003 bic r3, r3, #128 + 6255 0062 2360 str r3, [r4] + 6256 .LVL583: + ARM GAS /tmp/ccuHnxNu.s page 349 - 6240 .LVL586: - 6241 .L318: -2243:Src/main.c **** { - 6242 .loc 1 2243 22 is_stmt 1 discriminator 1 view .LVU1954 - 6243 0040 0E2B cmp r3, #14 - 6244 0042 F7D9 bls .L319 - 6245 .LBE567: -2247:Src/main.c **** - 6246 .loc 1 2247 2 view .LVU1955 -2247:Src/main.c **** - 6247 .loc 1 2247 14 is_stmt 0 view .LVU1956 - 6248 0044 9A4B ldr r3, .L329+44 - 6249 .LVL587: -2247:Src/main.c **** - 6250 .loc 1 2247 14 view .LVU1957 - 6251 0046 41F21112 movw r2, #4369 - 6252 004a 1A80 strh r2, [r3] @ movhi -2250:Src/main.c **** Def_setup.LD1_EN = 0; - 6253 .loc 1 2250 2 is_stmt 1 view .LVU1958 -2250:Src/main.c **** Def_setup.LD1_EN = 0; - 6254 .loc 1 2250 21 is_stmt 0 view .LVU1959 - 6255 004c 994B ldr r3, .L329+48 - 6256 004e 0022 movs r2, #0 - 6257 0050 DA81 strh r2, [r3, #14] @ movhi -2251:Src/main.c **** Def_setup.LD2_EN = 0; - 6258 .loc 1 2251 2 is_stmt 1 view .LVU1960 -2251:Src/main.c **** Def_setup.LD2_EN = 0; - 6259 .loc 1 2251 19 is_stmt 0 view .LVU1961 - 6260 0052 DA70 strb r2, [r3, #3] -2252:Src/main.c **** Def_setup.MES_ID = 0; - 6261 .loc 1 2252 2 is_stmt 1 view .LVU1962 -2252:Src/main.c **** Def_setup.MES_ID = 0; - 6262 .loc 1 2252 19 is_stmt 0 view .LVU1963 - 6263 0054 1A71 strb r2, [r3, #4] -2253:Src/main.c **** Def_setup.PI1_RD = 0; - 6264 .loc 1 2253 2 is_stmt 1 view .LVU1964 -2253:Src/main.c **** Def_setup.PI1_RD = 0; - 6265 .loc 1 2253 19 is_stmt 0 view .LVU1965 - 6266 0056 1A82 strh r2, [r3, #16] @ movhi -2254:Src/main.c **** Def_setup.PI2_RD = 0; - 6267 .loc 1 2254 2 is_stmt 1 view .LVU1966 -2254:Src/main.c **** Def_setup.PI2_RD = 0; - 6268 .loc 1 2254 19 is_stmt 0 view .LVU1967 - 6269 0058 1A73 strb r2, [r3, #12] -2255:Src/main.c **** Def_setup.REF1_EN = 0; - 6270 .loc 1 2255 2 is_stmt 1 view .LVU1968 -2255:Src/main.c **** Def_setup.REF1_EN = 0; - 6271 .loc 1 2255 19 is_stmt 0 view .LVU1969 - 6272 005a 5A73 strb r2, [r3, #13] -2256:Src/main.c **** Def_setup.REF2_EN = 0; - 6273 .loc 1 2256 2 is_stmt 1 view .LVU1970 -2256:Src/main.c **** Def_setup.REF2_EN = 0; - 6274 .loc 1 2256 20 is_stmt 0 view .LVU1971 - 6275 005c 5A71 strb r2, [r3, #5] -2257:Src/main.c **** Def_setup.SD_EN = 0; - 6276 .loc 1 2257 2 is_stmt 1 view .LVU1972 -2257:Src/main.c **** Def_setup.SD_EN = 0; - ARM GAS /tmp/ccEQxcUB.s page 349 +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6257 .loc 5 1506 3 is_stmt 0 view .LVU1956 + 6258 .LBE565: + 6259 .LBE564: +1694:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); + 6260 .loc 1 1694 3 is_stmt 1 view .LVU1957 + 6261 .LBB566: + 6262 .LBI566: +3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + 6263 .loc 5 3138 22 view .LVU1958 + 6264 .LBB567: +3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6265 .loc 5 3140 3 view .LVU1959 + 6266 0064 6368 ldr r3, [r4, #4] + 6267 0066 23F07003 bic r3, r3, #112 + 6268 006a 43F01003 orr r3, r3, #16 + 6269 006e 6360 str r3, [r4, #4] + 6270 .LVL584: +3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6271 .loc 5 3140 3 is_stmt 0 view .LVU1960 + 6272 .LBE567: + 6273 .LBE566: +1695:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ + 6274 .loc 1 1695 3 is_stmt 1 view .LVU1961 + 6275 .LBB568: + 6276 .LBI568: +3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + 6277 .loc 5 3235 22 view .LVU1962 + 6278 .LBB569: + 6279 .loc 5 3237 3 view .LVU1963 + 6280 0070 A368 ldr r3, [r4, #8] + 6281 0072 23F08003 bic r3, r3, #128 + 6282 0076 A360 str r3, [r4, #8] + 6283 .LVL585: + 6284 .loc 5 3237 3 is_stmt 0 view .LVU1964 + 6285 .LBE569: + 6286 .LBE568: +1700:Src/main.c **** + 6287 .loc 1 1700 1 view .LVU1965 + 6288 0078 06B0 add sp, sp, #24 + 6289 .LCFI66: + 6290 .cfi_def_cfa_offset 8 + 6291 @ sp needed + 6292 007a 10BD pop {r4, pc} + 6293 .L327: + 6294 .align 2 + 6295 .L326: + 6296 007c 00380240 .word 1073887232 + 6297 0080 00ED00E0 .word -536810240 + 6298 0084 00E100E0 .word -536813312 + 6299 0088 00100040 .word 1073745920 + 6300 .cfi_endproc + 6301 .LFE1198: + 6303 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 + 6304 .align 2 + 6305 .LC0: + 6306 0000 2F00 .ascii "/\000" + ARM GAS /tmp/ccuHnxNu.s page 350 - 6277 .loc 1 2257 20 is_stmt 0 view .LVU1973 - 6278 005e 9A71 strb r2, [r3, #6] -2258:Src/main.c **** Def_setup.TEC1_EN = 0; - 6279 .loc 1 2258 2 is_stmt 1 view .LVU1974 -2258:Src/main.c **** Def_setup.TEC1_EN = 0; - 6280 .loc 1 2258 18 is_stmt 0 view .LVU1975 - 6281 0060 DA72 strb r2, [r3, #11] -2259:Src/main.c **** Def_setup.TEC2_EN = 0; - 6282 .loc 1 2259 2 is_stmt 1 view .LVU1976 -2259:Src/main.c **** Def_setup.TEC2_EN = 0; - 6283 .loc 1 2259 20 is_stmt 0 view .LVU1977 - 6284 0062 DA71 strb r2, [r3, #7] -2260:Src/main.c **** Def_setup.TS1_EN = 0; - 6285 .loc 1 2260 2 is_stmt 1 view .LVU1978 -2260:Src/main.c **** Def_setup.TS1_EN = 0; - 6286 .loc 1 2260 20 is_stmt 0 view .LVU1979 - 6287 0064 1A72 strb r2, [r3, #8] -2261:Src/main.c **** Def_setup.TS2_EN = 0; - 6288 .loc 1 2261 2 is_stmt 1 view .LVU1980 -2261:Src/main.c **** Def_setup.TS2_EN = 0; - 6289 .loc 1 2261 19 is_stmt 0 view .LVU1981 - 6290 0066 5A72 strb r2, [r3, #9] -2262:Src/main.c **** Def_setup.U5V1_EN = 0; - 6291 .loc 1 2262 2 is_stmt 1 view .LVU1982 -2262:Src/main.c **** Def_setup.U5V1_EN = 0; - 6292 .loc 1 2262 19 is_stmt 0 view .LVU1983 - 6293 0068 9A72 strb r2, [r3, #10] -2263:Src/main.c **** Def_setup.U5V2_EN = 0; - 6294 .loc 1 2263 2 is_stmt 1 view .LVU1984 -2263:Src/main.c **** Def_setup.U5V2_EN = 0; - 6295 .loc 1 2263 20 is_stmt 0 view .LVU1985 - 6296 006a 5A70 strb r2, [r3, #1] -2264:Src/main.c **** Def_setup.WORK_EN = 0; - 6297 .loc 1 2264 2 is_stmt 1 view .LVU1986 -2264:Src/main.c **** Def_setup.WORK_EN = 0; - 6298 .loc 1 2264 20 is_stmt 0 view .LVU1987 - 6299 006c 9A70 strb r2, [r3, #2] + 6307 0002 0000 .align 2 + 6308 .LC1: + 6309 0004 434F4D4D .ascii "COMMAND.TXT\000" + 6309 414E442E + 6309 54585400 + 6310 .section .text.Init_params,"ax",%progbits + 6311 .align 1 + 6312 .syntax unified + 6313 .thumb + 6314 .thumb_func + 6316 Init_params: + 6317 .LFB1208: +2247:Src/main.c **** TO6 = 0; + 6318 .loc 1 2247 1 is_stmt 1 view -0 + 6319 .cfi_startproc + 6320 @ args = 0, pretend = 0, frame = 0 + 6321 @ frame_needed = 0, uses_anonymous_args = 0 + 6322 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 6323 .LCFI67: + 6324 .cfi_def_cfa_offset 32 + 6325 .cfi_offset 3, -32 + 6326 .cfi_offset 4, -28 + 6327 .cfi_offset 5, -24 + 6328 .cfi_offset 6, -20 + 6329 .cfi_offset 7, -16 + 6330 .cfi_offset 8, -12 + 6331 .cfi_offset 9, -8 + 6332 .cfi_offset 14, -4 +2248:Src/main.c **** TO7 = 0; + 6333 .loc 1 2248 2 view .LVU1967 +2248:Src/main.c **** TO7 = 0; + 6334 .loc 1 2248 6 is_stmt 0 view .LVU1968 + 6335 0004 0023 movs r3, #0 + 6336 0006 A34A ldr r2, .L340 + 6337 0008 1360 str r3, [r2] +2249:Src/main.c **** TO7_before = 0; + 6338 .loc 1 2249 2 is_stmt 1 view .LVU1969 +2249:Src/main.c **** TO7_before = 0; + 6339 .loc 1 2249 6 is_stmt 0 view .LVU1970 + 6340 000a A34A ldr r2, .L340+4 + 6341 000c 1360 str r3, [r2] +2250:Src/main.c **** TO6_before = 0; + 6342 .loc 1 2250 2 is_stmt 1 view .LVU1971 +2250:Src/main.c **** TO6_before = 0; + 6343 .loc 1 2250 13 is_stmt 0 view .LVU1972 + 6344 000e A34A ldr r2, .L340+8 + 6345 0010 1360 str r3, [r2] +2251:Src/main.c **** TO6_uart = 0; + 6346 .loc 1 2251 2 is_stmt 1 view .LVU1973 +2251:Src/main.c **** TO6_uart = 0; + 6347 .loc 1 2251 13 is_stmt 0 view .LVU1974 + 6348 0012 A34A ldr r2, .L340+12 + 6349 0014 1360 str r3, [r2] +2252:Src/main.c **** flg_tmt = 0; + 6350 .loc 1 2252 2 is_stmt 1 view .LVU1975 +2252:Src/main.c **** flg_tmt = 0; + 6351 .loc 1 2252 11 is_stmt 0 view .LVU1976 + ARM GAS /tmp/ccuHnxNu.s page 351 + + + 6352 0016 A34A ldr r2, .L340+16 + 6353 0018 1360 str r3, [r2] +2253:Src/main.c **** UART_rec_incr = 0; + 6354 .loc 1 2253 2 is_stmt 1 view .LVU1977 +2253:Src/main.c **** UART_rec_incr = 0; + 6355 .loc 1 2253 10 is_stmt 0 view .LVU1978 + 6356 001a A34A ldr r2, .L340+20 + 6357 001c 1370 strb r3, [r2] +2254:Src/main.c **** fgoto = 0; + 6358 .loc 1 2254 2 is_stmt 1 view .LVU1979 +2254:Src/main.c **** fgoto = 0; + 6359 .loc 1 2254 16 is_stmt 0 view .LVU1980 + 6360 001e A34A ldr r2, .L340+24 + 6361 0020 1380 strh r3, [r2] @ movhi +2255:Src/main.c **** sizeoffile = 0; + 6362 .loc 1 2255 2 is_stmt 1 view .LVU1981 +2255:Src/main.c **** sizeoffile = 0; + 6363 .loc 1 2255 8 is_stmt 0 view .LVU1982 + 6364 0022 A34A ldr r2, .L340+28 + 6365 0024 1360 str r3, [r2] +2256:Src/main.c **** u_tx_flg = 0; + 6366 .loc 1 2256 2 is_stmt 1 view .LVU1983 +2256:Src/main.c **** u_tx_flg = 0; + 6367 .loc 1 2256 13 is_stmt 0 view .LVU1984 + 6368 0026 A34A ldr r2, .L340+32 + 6369 0028 1360 str r3, [r2] +2257:Src/main.c **** u_rx_flg = 0; + 6370 .loc 1 2257 2 is_stmt 1 view .LVU1985 +2257:Src/main.c **** u_rx_flg = 0; + 6371 .loc 1 2257 11 is_stmt 0 view .LVU1986 + 6372 002a A34A ldr r2, .L340+36 + 6373 002c 1370 strb r3, [r2] +2258:Src/main.c **** //State_Data[0]=0; + 6374 .loc 1 2258 2 is_stmt 1 view .LVU1987 +2258:Src/main.c **** //State_Data[0]=0; + 6375 .loc 1 2258 11 is_stmt 0 view .LVU1988 + 6376 002e A34A ldr r2, .L340+40 + 6377 0030 1370 strb r3, [r2] +2261:Src/main.c **** { + 6378 .loc 1 2261 2 is_stmt 1 view .LVU1989 + 6379 .LBB570: +2261:Src/main.c **** { + 6380 .loc 1 2261 7 view .LVU1990 + 6381 .LVL586: +2261:Src/main.c **** { + 6382 .loc 1 2261 2 is_stmt 0 view .LVU1991 + 6383 0032 05E0 b .L329 + 6384 .LVL587: + 6385 .L330: +2263:Src/main.c **** } + 6386 .loc 1 2263 3 is_stmt 1 view .LVU1992 +2263:Src/main.c **** } + 6387 .loc 1 2263 16 is_stmt 0 view .LVU1993 + 6388 0034 A24A ldr r2, .L340+44 + 6389 0036 0021 movs r1, #0 + 6390 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi +2261:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 352 + + + 6391 .loc 1 2261 31 is_stmt 1 discriminator 3 view .LVU1994 + 6392 003c 0133 adds r3, r3, #1 + 6393 .LVL588: +2261:Src/main.c **** { + 6394 .loc 1 2261 31 is_stmt 0 discriminator 3 view .LVU1995 + 6395 003e 9BB2 uxth r3, r3 + 6396 .LVL589: + 6397 .L329: +2261:Src/main.c **** { + 6398 .loc 1 2261 22 is_stmt 1 discriminator 1 view .LVU1996 + 6399 0040 0E2B cmp r3, #14 + 6400 0042 F7D9 bls .L330 + 6401 .LBE570: 2265:Src/main.c **** - 6300 .loc 1 2265 2 is_stmt 1 view .LVU1988 + 6402 .loc 1 2265 2 view .LVU1997 2265:Src/main.c **** - 6301 .loc 1 2265 20 is_stmt 0 view .LVU1989 - 6302 006e 1A70 strb r2, [r3] -2267:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 6303 .loc 1 2267 2 is_stmt 1 view .LVU1990 -2267:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 6304 .loc 1 2267 24 is_stmt 0 view .LVU1991 - 6305 0070 914D ldr r5, .L329+52 - 6306 0072 2A80 strh r2, [r5] @ movhi -2268:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 6307 .loc 1 2268 2 is_stmt 1 view .LVU1992 -2268:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 6308 .loc 1 2268 24 is_stmt 0 view .LVU1993 - 6309 0074 914C ldr r4, .L329+56 - 6310 0076 2280 strh r2, [r4] @ movhi -2269:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 6311 .loc 1 2269 2 is_stmt 1 view .LVU1994 -2269:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - ARM GAS /tmp/ccEQxcUB.s page 350 + 6403 .loc 1 2265 14 is_stmt 0 view .LVU1998 + 6404 0044 9E4B ldr r3, .L340+44 + 6405 .LVL590: +2265:Src/main.c **** + 6406 .loc 1 2265 14 view .LVU1999 + 6407 0046 41F21112 movw r2, #4369 + 6408 004a 1A80 strh r2, [r3] @ movhi +2268:Src/main.c **** Def_setup.LD1_EN = 0; + 6409 .loc 1 2268 2 is_stmt 1 view .LVU2000 +2268:Src/main.c **** Def_setup.LD1_EN = 0; + 6410 .loc 1 2268 21 is_stmt 0 view .LVU2001 + 6411 004c 9D4B ldr r3, .L340+48 + 6412 004e 0022 movs r2, #0 + 6413 0050 DA81 strh r2, [r3, #14] @ movhi +2269:Src/main.c **** Def_setup.LD2_EN = 0; + 6414 .loc 1 2269 2 is_stmt 1 view .LVU2002 +2269:Src/main.c **** Def_setup.LD2_EN = 0; + 6415 .loc 1 2269 19 is_stmt 0 view .LVU2003 + 6416 0052 DA70 strb r2, [r3, #3] +2270:Src/main.c **** Def_setup.MES_ID = 0; + 6417 .loc 1 2270 2 is_stmt 1 view .LVU2004 +2270:Src/main.c **** Def_setup.MES_ID = 0; + 6418 .loc 1 2270 19 is_stmt 0 view .LVU2005 + 6419 0054 1A71 strb r2, [r3, #4] +2271:Src/main.c **** Def_setup.PI1_RD = 0; + 6420 .loc 1 2271 2 is_stmt 1 view .LVU2006 +2271:Src/main.c **** Def_setup.PI1_RD = 0; + 6421 .loc 1 2271 19 is_stmt 0 view .LVU2007 + 6422 0056 1A82 strh r2, [r3, #16] @ movhi +2272:Src/main.c **** Def_setup.PI2_RD = 0; + 6423 .loc 1 2272 2 is_stmt 1 view .LVU2008 +2272:Src/main.c **** Def_setup.PI2_RD = 0; + 6424 .loc 1 2272 19 is_stmt 0 view .LVU2009 + 6425 0058 1A73 strb r2, [r3, #12] +2273:Src/main.c **** Def_setup.REF1_EN = 0; + 6426 .loc 1 2273 2 is_stmt 1 view .LVU2010 +2273:Src/main.c **** Def_setup.REF1_EN = 0; + 6427 .loc 1 2273 19 is_stmt 0 view .LVU2011 + 6428 005a 5A73 strb r2, [r3, #13] +2274:Src/main.c **** Def_setup.REF2_EN = 0; + 6429 .loc 1 2274 2 is_stmt 1 view .LVU2012 + ARM GAS /tmp/ccuHnxNu.s page 353 - 6312 .loc 1 2269 28 is_stmt 0 view .LVU1995 - 6313 0078 0022 movs r2, #0 - 6314 007a 6A60 str r2, [r5, #4] @ float -2270:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 6315 .loc 1 2270 2 is_stmt 1 view .LVU1996 -2270:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 6316 .loc 1 2270 28 is_stmt 0 view .LVU1997 - 6317 007c 6260 str r2, [r4, #4] @ float -2271:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 6318 .loc 1 2271 2 is_stmt 1 view .LVU1998 -2271:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 6319 .loc 1 2271 28 is_stmt 0 view .LVU1999 - 6320 007e AA60 str r2, [r5, #8] @ float -2272:Src/main.c **** - 6321 .loc 1 2272 2 is_stmt 1 view .LVU2000 -2272:Src/main.c **** - 6322 .loc 1 2272 28 is_stmt 0 view .LVU2001 - 6323 0080 A260 str r2, [r4, #8] @ float -2275:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 6324 .loc 1 2275 2 is_stmt 1 view .LVU2002 -2275:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 6325 .loc 1 2275 13 is_stmt 0 view .LVU2003 - 6326 0082 8F4E ldr r6, .L329+60 - 6327 0084 9C46 mov ip, r3 - 6328 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} - 6329 008a 0FC6 stmia r6!, {r0, r1, r2, r3} - 6330 008c DCF80030 ldr r3, [ip] - 6331 0090 3380 strh r3, [r6] @ movhi -2276:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 6332 .loc 1 2276 2 is_stmt 1 view .LVU2004 -2276:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 6333 .loc 1 2276 17 is_stmt 0 view .LVU2005 - 6334 0092 8C4E ldr r6, .L329+64 - 6335 0094 95E80F00 ldm r5, {r0, r1, r2, r3} - 6336 0098 86E80F00 stm r6, {r0, r1, r2, r3} -2277:Src/main.c **** - 6337 .loc 1 2277 2 is_stmt 1 view .LVU2006 -2277:Src/main.c **** - 6338 .loc 1 2277 17 is_stmt 0 view .LVU2007 - 6339 009c 8A4D ldr r5, .L329+68 - 6340 009e 94E80F00 ldm r4, {r0, r1, r2, r3} - 6341 00a2 85E80F00 stm r5, {r0, r1, r2, r3} -2282:Src/main.c **** LL_TIM_EnableCounter(TIM6); - 6342 .loc 1 2282 2 is_stmt 1 view .LVU2008 - 6343 .LVL588: - 6344 .LBB568: - 6345 .LBI568: +2274:Src/main.c **** Def_setup.REF2_EN = 0; + 6430 .loc 1 2274 20 is_stmt 0 view .LVU2013 + 6431 005c 5A71 strb r2, [r3, #5] +2275:Src/main.c **** Def_setup.SD_EN = 0; + 6432 .loc 1 2275 2 is_stmt 1 view .LVU2014 +2275:Src/main.c **** Def_setup.SD_EN = 0; + 6433 .loc 1 2275 20 is_stmt 0 view .LVU2015 + 6434 005e 9A71 strb r2, [r3, #6] +2276:Src/main.c **** Def_setup.TEC1_EN = 0; + 6435 .loc 1 2276 2 is_stmt 1 view .LVU2016 +2276:Src/main.c **** Def_setup.TEC1_EN = 0; + 6436 .loc 1 2276 18 is_stmt 0 view .LVU2017 + 6437 0060 DA72 strb r2, [r3, #11] +2277:Src/main.c **** Def_setup.TEC2_EN = 0; + 6438 .loc 1 2277 2 is_stmt 1 view .LVU2018 +2277:Src/main.c **** Def_setup.TEC2_EN = 0; + 6439 .loc 1 2277 20 is_stmt 0 view .LVU2019 + 6440 0062 DA71 strb r2, [r3, #7] +2278:Src/main.c **** Def_setup.TS1_EN = 0; + 6441 .loc 1 2278 2 is_stmt 1 view .LVU2020 +2278:Src/main.c **** Def_setup.TS1_EN = 0; + 6442 .loc 1 2278 20 is_stmt 0 view .LVU2021 + 6443 0064 1A72 strb r2, [r3, #8] +2279:Src/main.c **** Def_setup.TS2_EN = 0; + 6444 .loc 1 2279 2 is_stmt 1 view .LVU2022 +2279:Src/main.c **** Def_setup.TS2_EN = 0; + 6445 .loc 1 2279 19 is_stmt 0 view .LVU2023 + 6446 0066 5A72 strb r2, [r3, #9] +2280:Src/main.c **** Def_setup.U5V1_EN = 0; + 6447 .loc 1 2280 2 is_stmt 1 view .LVU2024 +2280:Src/main.c **** Def_setup.U5V1_EN = 0; + 6448 .loc 1 2280 19 is_stmt 0 view .LVU2025 + 6449 0068 9A72 strb r2, [r3, #10] +2281:Src/main.c **** Def_setup.U5V2_EN = 0; + 6450 .loc 1 2281 2 is_stmt 1 view .LVU2026 +2281:Src/main.c **** Def_setup.U5V2_EN = 0; + 6451 .loc 1 2281 20 is_stmt 0 view .LVU2027 + 6452 006a 5A70 strb r2, [r3, #1] +2282:Src/main.c **** Def_setup.WORK_EN = 0; + 6453 .loc 1 2282 2 is_stmt 1 view .LVU2028 +2282:Src/main.c **** Def_setup.WORK_EN = 0; + 6454 .loc 1 2282 20 is_stmt 0 view .LVU2029 + 6455 006c 9A70 strb r2, [r3, #2] +2283:Src/main.c **** + 6456 .loc 1 2283 2 is_stmt 1 view .LVU2030 +2283:Src/main.c **** + 6457 .loc 1 2283 20 is_stmt 0 view .LVU2031 + 6458 006e 1A70 strb r2, [r3] +2285:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 6459 .loc 1 2285 2 is_stmt 1 view .LVU2032 +2285:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 6460 .loc 1 2285 24 is_stmt 0 view .LVU2033 + 6461 0070 954D ldr r5, .L340+52 + 6462 0072 2A80 strh r2, [r5] @ movhi +2286:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 6463 .loc 1 2286 2 is_stmt 1 view .LVU2034 +2286:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + ARM GAS /tmp/ccuHnxNu.s page 354 + + + 6464 .loc 1 2286 24 is_stmt 0 view .LVU2035 + 6465 0074 954C ldr r4, .L340+56 + 6466 0076 2280 strh r2, [r4] @ movhi +2287:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 6467 .loc 1 2287 2 is_stmt 1 view .LVU2036 +2287:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 6468 .loc 1 2287 28 is_stmt 0 view .LVU2037 + 6469 0078 0022 movs r2, #0 + 6470 007a 6A60 str r2, [r5, #4] @ float +2288:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 6471 .loc 1 2288 2 is_stmt 1 view .LVU2038 +2288:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 6472 .loc 1 2288 28 is_stmt 0 view .LVU2039 + 6473 007c 6260 str r2, [r4, #4] @ float +2289:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 6474 .loc 1 2289 2 is_stmt 1 view .LVU2040 +2289:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 6475 .loc 1 2289 28 is_stmt 0 view .LVU2041 + 6476 007e AA60 str r2, [r5, #8] @ float +2290:Src/main.c **** + 6477 .loc 1 2290 2 is_stmt 1 view .LVU2042 +2290:Src/main.c **** + 6478 .loc 1 2290 28 is_stmt 0 view .LVU2043 + 6479 0080 A260 str r2, [r4, #8] @ float +2293:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 6480 .loc 1 2293 2 is_stmt 1 view .LVU2044 +2293:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 6481 .loc 1 2293 13 is_stmt 0 view .LVU2045 + 6482 0082 934E ldr r6, .L340+60 + 6483 0084 9C46 mov ip, r3 + 6484 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} + 6485 008a 0FC6 stmia r6!, {r0, r1, r2, r3} + 6486 008c DCF80030 ldr r3, [ip] + 6487 0090 3380 strh r3, [r6] @ movhi +2294:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 6488 .loc 1 2294 2 is_stmt 1 view .LVU2046 +2294:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 6489 .loc 1 2294 17 is_stmt 0 view .LVU2047 + 6490 0092 904E ldr r6, .L340+64 + 6491 0094 95E80F00 ldm r5, {r0, r1, r2, r3} + 6492 0098 86E80F00 stm r6, {r0, r1, r2, r3} +2295:Src/main.c **** + 6493 .loc 1 2295 2 is_stmt 1 view .LVU2048 +2295:Src/main.c **** + 6494 .loc 1 2295 17 is_stmt 0 view .LVU2049 + 6495 009c 8E4D ldr r5, .L340+68 + 6496 009e 94E80F00 ldm r4, {r0, r1, r2, r3} + 6497 00a2 85E80F00 stm r5, {r0, r1, r2, r3} +2300:Src/main.c **** LL_TIM_EnableCounter(TIM6); + 6498 .loc 1 2300 2 is_stmt 1 view .LVU2050 + 6499 .LVL591: + 6500 .LBB571: + 6501 .LBI571: 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. + ARM GAS /tmp/ccuHnxNu.s page 355 + + 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer. 3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode 3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 351 - - 3248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx) 3249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL); @@ -21052,15 +21298,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration + ARM GAS /tmp/ccuHnxNu.s page 356 + + 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break function. 3303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 3304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input. - ARM GAS /tmp/ccEQxcUB.s page 352 - - 3305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_EnableBRK 3306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -21112,15 +21358,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 357 + + 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, 3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakFilter) 3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter); 3360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 353 - - 3362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break 2 function. 3364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not @@ -21172,15 +21418,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5 + ARM GAS /tmp/ccuHnxNu.s page 358 + + 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6 3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8 3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F 3418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccEQxcUB.s page 354 - - 3419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter); 3420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -21232,15 +21478,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. + ARM GAS /tmp/ccuHnxNu.s page 359 + + 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input. 3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput 3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 355 - - 3476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx) 3477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL); @@ -21292,15 +21538,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input. + ARM GAS /tmp/ccuHnxNu.s page 360 + + 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether 3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection. 3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_EnableBreakInputSource\n 3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_EnableBreakInputSource\n 3531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_EnableBreakInputSource\n 3532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_EnableBreakInputSource - ARM GAS /tmp/ccEQxcUB.s page 356 - - 3533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values: 3535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN @@ -21352,15 +21598,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 361 + + 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN 3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK 3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values: 3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_LOW 3588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_HIGH 3589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 357 - - 3590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin 3592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Polarity) @@ -21412,15 +21658,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS + ARM GAS /tmp/ccuHnxNu.s page 362 + + 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS 3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS 3645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS 3646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS - ARM GAS /tmp/ccEQxcUB.s page 358 - - 3647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS 3648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS 3649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS @@ -21472,15 +21718,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE + ARM GAS /tmp/ccuHnxNu.s page 363 + + 3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC 3699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * 3700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11: one of the following values 3701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * 3702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_GPIO 3703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_SPDIFRX - ARM GAS /tmp/ccEQxcUB.s page 359 - - 3704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_HSE 3705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_MCO1 3706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @@ -21532,15 +21778,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 364 + + 3755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 inte 3756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1 3757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccEQxcUB.s page 360 - - 3761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL); 3763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -21592,15 +21838,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F). 3811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4 + ARM GAS /tmp/ccuHnxNu.s page 365 + + 3812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx) 3816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF)); - ARM GAS /tmp/ccEQxcUB.s page 361 - - 3818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -21652,15 +21898,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6 3867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccuHnxNu.s page 366 + + 3869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx) 3871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL); 3873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccEQxcUB.s page 362 - - 3875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the commutation interrupt flag (COMIF). 3877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR COMIF LL_TIM_ClearFlag_COM @@ -21712,15 +21958,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) + ARM GAS /tmp/ccuHnxNu.s page 367 + + 3926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_BIF)); 3928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether break interrupt flag (BIF) is set (break interrupt is pending). - ARM GAS /tmp/ccEQxcUB.s page 363 - - 3932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR BIF LL_TIM_IsActiveFlag_BRK 3933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -21772,15 +22018,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) 3982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccuHnxNu.s page 368 + + 3983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL); 3984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF). 3988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR - ARM GAS /tmp/ccEQxcUB.s page 364 - - 3989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -21832,15 +22078,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 4037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) 4039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccuHnxNu.s page 369 + + 4040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); 4041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set 4045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 4 over-capture interrupt is pending). - ARM GAS /tmp/ccEQxcUB.s page 365 - - 4046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR 4047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 4048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -21886,81 +22132,81 @@ ARM GAS /tmp/ccEQxcUB.s page 1 4088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 4089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) - 6346 .loc 5 4090 22 view .LVU2009 - 6347 .LBB569: + 6502 .loc 5 4090 22 view .LVU2051 + 6503 .LBB572: 4091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE); - 6348 .loc 5 4092 3 view .LVU2010 - 6349 00a6 894B ldr r3, .L329+72 - 6350 00a8 DA68 ldr r2, [r3, #12] - 6351 00aa 42F00102 orr r2, r2, #1 - 6352 00ae DA60 str r2, [r3, #12] - 6353 .LVL589: - 6354 .loc 5 4092 3 is_stmt 0 view .LVU2011 - 6355 .LBE569: - ARM GAS /tmp/ccEQxcUB.s page 366 + 6504 .loc 5 4092 3 view .LVU2052 + 6505 00a6 8D4B ldr r3, .L340+72 + ARM GAS /tmp/ccuHnxNu.s page 370 - 6356 .LBE568: -2283:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); - 6357 .loc 1 2283 2 is_stmt 1 view .LVU2012 - 6358 .LBB570: - 6359 .LBI570: + 6506 00a8 DA68 ldr r2, [r3, #12] + 6507 00aa 42F00102 orr r2, r2, #1 + 6508 00ae DA60 str r2, [r3, #12] + 6509 .LVL592: + 6510 .loc 5 4092 3 is_stmt 0 view .LVU2053 + 6511 .LBE572: + 6512 .LBE571: +2301:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); + 6513 .loc 1 2301 2 is_stmt 1 view .LVU2054 + 6514 .LBB573: + 6515 .LBI573: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6360 .loc 5 1313 22 view .LVU2013 - 6361 .LBB571: + 6516 .loc 5 1313 22 view .LVU2055 + 6517 .LBB574: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6362 .loc 5 1315 3 view .LVU2014 - 6363 00b0 1A68 ldr r2, [r3] - 6364 00b2 42F00102 orr r2, r2, #1 - 6365 00b6 1A60 str r2, [r3] - 6366 .LVL590: + 6518 .loc 5 1315 3 view .LVU2056 + 6519 00b0 1A68 ldr r2, [r3] + 6520 00b2 42F00102 orr r2, r2, #1 + 6521 00b6 1A60 str r2, [r3] + 6522 .LVL593: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6367 .loc 5 1315 3 is_stmt 0 view .LVU2015 - 6368 .LBE571: - 6369 .LBE570: -2284:Src/main.c **** LL_TIM_EnableCounter(TIM7); - 6370 .loc 1 2284 2 is_stmt 1 view .LVU2016 - 6371 .LBB572: - 6372 .LBI572: + 6523 .loc 5 1315 3 is_stmt 0 view .LVU2057 + 6524 .LBE574: + 6525 .LBE573: +2302:Src/main.c **** LL_TIM_EnableCounter(TIM7); + 6526 .loc 1 2302 2 is_stmt 1 view .LVU2058 + 6527 .LBB575: + 6528 .LBI575: 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6373 .loc 5 4090 22 view .LVU2017 - 6374 .LBB573: - 6375 .loc 5 4092 3 view .LVU2018 - 6376 00b8 03F58063 add r3, r3, #1024 - 6377 00bc DA68 ldr r2, [r3, #12] - 6378 00be 42F00102 orr r2, r2, #1 - 6379 00c2 DA60 str r2, [r3, #12] - 6380 .LVL591: - 6381 .loc 5 4092 3 is_stmt 0 view .LVU2019 - 6382 .LBE573: - 6383 .LBE572: -2285:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); - 6384 .loc 1 2285 2 is_stmt 1 view .LVU2020 - 6385 .LBB574: - 6386 .LBI574: + 6529 .loc 5 4090 22 view .LVU2059 + 6530 .LBB576: + 6531 .loc 5 4092 3 view .LVU2060 + 6532 00b8 03F58063 add r3, r3, #1024 + 6533 00bc DA68 ldr r2, [r3, #12] + 6534 00be 42F00102 orr r2, r2, #1 + 6535 00c2 DA60 str r2, [r3, #12] + 6536 .LVL594: + 6537 .loc 5 4092 3 is_stmt 0 view .LVU2061 + 6538 .LBE576: + 6539 .LBE575: +2303:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); + 6540 .loc 1 2303 2 is_stmt 1 view .LVU2062 + 6541 .LBB577: + 6542 .LBI577: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6387 .loc 5 1313 22 view .LVU2021 - 6388 .LBB575: + 6543 .loc 5 1313 22 view .LVU2063 + 6544 .LBB578: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6389 .loc 5 1315 3 view .LVU2022 - 6390 00c4 1A68 ldr r2, [r3] - 6391 00c6 42F00102 orr r2, r2, #1 - 6392 00ca 1A60 str r2, [r3] - 6393 .LVL592: + 6545 .loc 5 1315 3 view .LVU2064 + 6546 00c4 1A68 ldr r2, [r3] + 6547 00c6 42F00102 orr r2, r2, #1 + 6548 00ca 1A60 str r2, [r3] + 6549 .LVL595: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6394 .loc 5 1315 3 is_stmt 0 view .LVU2023 - 6395 .LBE575: - 6396 .LBE574: -2292:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 6397 .loc 1 2292 3 is_stmt 1 view .LVU2024 - 6398 .LBB576: - 6399 .LBI576: - 6400 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" + 6550 .loc 5 1315 3 is_stmt 0 view .LVU2065 + 6551 .LBE578: + 6552 .LBE577: + ARM GAS /tmp/ccuHnxNu.s page 371 + + +2310:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 6553 .loc 1 2310 3 is_stmt 1 view .LVU2066 + 6554 .LBB579: + 6555 .LBI579: + 6556 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 367 - - 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h 4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @author MCD Application Team @@ -22012,15 +22258,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream2_BASE - DMA1_BASE), 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream3_BASE - DMA1_BASE), 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE), + ARM GAS /tmp/ccuHnxNu.s page 372 + + 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream5_BASE - DMA1_BASE), 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream6_BASE - DMA1_BASE), 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream7_BASE - DMA1_BASE) 56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }; 57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 368 - - 59:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -22072,15 +22318,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PERIPH 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct + ARM GAS /tmp/ccuHnxNu.s page 373 + + 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** is incremented or not. 113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MEMORY 114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct - ARM GAS /tmp/ccEQxcUB.s page 369 - - 116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data 118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** in case of memory to memory transfer direction. @@ -22132,15 +22378,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphBurst; /*!< Specifies the Burst transfer configuration for the peripher + ARM GAS /tmp/ccuHnxNu.s page 374 + + 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** It specifies the amount of data to be transferred in a sing 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** transaction. 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PBURST 170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The burst mode is possible only if the address Increm 171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct - ARM GAS /tmp/ccEQxcUB.s page 370 - - 173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } LL_DMA_InitTypeDef; 175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -22192,15 +22438,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DOUBLEBUFFER_MODE_DISABLE 0x00000000U /*!< Disable double buffering m + ARM GAS /tmp/ccuHnxNu.s page 375 + + 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DOUBLEBUFFER_MODE_ENABLE DMA_SxCR_DBM /*!< Enable double buffering mo 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PERIPH PERIPH - ARM GAS /tmp/ccEQxcUB.s page 371 - - 230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PERIPH_NOINCREMENT 0x00000000U /*!< Peripheral increment mode @@ -22252,15 +22498,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium + ARM GAS /tmp/ccuHnxNu.s page 376 + + 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_HIGH DMA_SxCR_PL_1 /*!< Priority level : High 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_VERYHIGH DMA_SxCR_PL /*!< Priority level : Very_High 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccEQxcUB.s page 372 - - 287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CHANNEL CHANNEL 288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -22312,15 +22558,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode di + ARM GAS /tmp/ccuHnxNu.s page 377 + + 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode en 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_FIFOSTATUS_0 FIFOSTATUS 0 - ARM GAS /tmp/ccEQxcUB.s page 373 - - 344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_0_25 0x00000000U /*!< 0 < fifo_lev @@ -22372,15 +22618,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __VALUE__ Value to be written in the register 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 378 + + 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Read a value in DMA register 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __INSTANCE__ DMA Instance 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __REG__ Register to be read - ARM GAS /tmp/ccEQxcUB.s page 374 - - 401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Register value 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) @@ -22432,15 +22678,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM + ARM GAS /tmp/ccuHnxNu.s page 379 + + 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM - ARM GAS /tmp/ccEQxcUB.s page 375 - - 458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM @@ -22492,35 +22738,35 @@ ARM GAS /tmp/ccEQxcUB.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 + ARM GAS /tmp/ccuHnxNu.s page 380 + + 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 - ARM GAS /tmp/ccEQxcUB.s page 376 - - 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableStream(DMA_TypeDef *DMAx, uint32_t Stream) - 6401 .loc 6 517 22 view .LVU2025 - 6402 .LBB577: + 6557 .loc 6 517 22 view .LVU2067 + 6558 .LBB580: 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D - 6403 .loc 6 519 3 view .LVU2026 - 6404 00cc 03F51433 add r3, r3, #151552 - 6405 00d0 D3F8B820 ldr r2, [r3, #184] - 6406 00d4 22F00102 bic r2, r2, #1 - 6407 00d8 C3F8B820 str r2, [r3, #184] - 6408 .LVL593: - 6409 .loc 6 519 3 is_stmt 0 view .LVU2027 - 6410 .LBE577: - 6411 .LBE576: -2293:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 6412 .loc 1 2293 3 is_stmt 1 view .LVU2028 - 6413 .LBB578: - 6414 .LBI578: + 6559 .loc 6 519 3 view .LVU2068 + 6560 00cc 03F51433 add r3, r3, #151552 + 6561 00d0 D3F8B820 ldr r2, [r3, #184] + 6562 00d4 22F00102 bic r2, r2, #1 + 6563 00d8 C3F8B820 str r2, [r3, #184] + 6564 .LVL596: + 6565 .loc 6 519 3 is_stmt 0 view .LVU2069 + 6566 .LBE580: + 6567 .LBE579: +2311:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 6568 .loc 1 2311 3 is_stmt 1 view .LVU2070 + 6569 .LBB581: + 6570 .LBI581: 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -22552,15 +22798,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PSIZE LL_DMA_ConfigTransfer\n 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MSIZE LL_DMA_ConfigTransfer\n 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PL LL_DMA_ConfigTransfer\n + ARM GAS /tmp/ccuHnxNu.s page 381 + + 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PFCTRL LL_DMA_ConfigTransfer 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccEQxcUB.s page 377 - - 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -22612,15 +22858,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_GetDataTransferDirection 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 382 + + 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccEQxcUB.s page 378 - - 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: @@ -22672,15 +22918,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccuHnxNu.s page 383 + + 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_PFCTRL 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Stream) - ARM GAS /tmp/ccEQxcUB.s page 379 - - 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -22732,15 +22978,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory increment mode. + ARM GAS /tmp/ccuHnxNu.s page 384 + + 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MINC LL_DMA_SetMemoryIncMode 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccEQxcUB.s page 380 - - 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -22792,15 +23038,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Size This parameter can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 385 + + 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) - ARM GAS /tmp/ccEQxcUB.s page 381 - - 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -22852,15 +23098,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccuHnxNu.s page 386 + + 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory size. 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_GetMemorySize 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccEQxcUB.s page 382 - - 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -22912,15 +23158,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 + ARM GAS /tmp/ccuHnxNu.s page 387 + + 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_PSIZE 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 383 - - 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetIncOffsetSize(DMA_TypeDef *DMAx, uint32_t Stream) 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- @@ -22972,15 +23218,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream) 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccuHnxNu.s page 388 + + 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Number of data to transfer. 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll NDTR NDT LL_DMA_SetDataLength - ARM GAS /tmp/ccEQxcUB.s page 384 - - 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This action has no effect if 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * stream is enabled. 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -23032,15 +23278,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 + ARM GAS /tmp/ccuHnxNu.s page 389 + + 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_0 - ARM GAS /tmp/ccEQxcUB.s page 385 - - 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 @@ -23092,15 +23338,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_10 (*) 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_11 (*) 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_12 (*) + ARM GAS /tmp/ccuHnxNu.s page 390 + + 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_13 (*) 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_14 (*) 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_15 (*) 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * (*) value not defined in all devices. 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 386 - - 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream) 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- @@ -23152,15 +23398,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream) 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccuHnxNu.s page 391 + + 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Peripheral burst transfer configuration. 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PBURST LL_DMA_SetPeriphBurstxfer - ARM GAS /tmp/ccEQxcUB.s page 387 - - 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -23212,15 +23458,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CT LL_DMA_SetCurrentTargetMem 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 392 + + 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccEQxcUB.s page 388 - - 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param CurrentMemory This parameter can be one of the following values: @@ -23272,15 +23518,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream) 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccuHnxNu.s page 393 + + 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable the double buffer mode. 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DBM LL_DMA_DisableDoubleBufferMode - ARM GAS /tmp/ccEQxcUB.s page 389 - - 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -23332,15 +23578,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccuHnxNu.s page 394 + + 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 390 - - 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream) 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -23392,15 +23638,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccuHnxNu.s page 395 + + 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get FIFO threshold. 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_GetFIFOThreshold 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccEQxcUB.s page 391 - - 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -23452,15 +23698,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the Source and Destination addresses. 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA stream is enabled. 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_ConfigAddresses\n + ARM GAS /tmp/ccuHnxNu.s page 396 + + 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * PAR PA LL_DMA_ConfigAddresses 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccEQxcUB.s page 392 - - 1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -23512,15 +23758,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccuHnxNu.s page 397 + + 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Peripheral address. 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_SetPeriphAddress 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. - ARM GAS /tmp/ccEQxcUB.s page 393 - - 1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -23572,15 +23818,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 + ARM GAS /tmp/ccuHnxNu.s page 398 + + 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream) 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccEQxcUB.s page 394 - - 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream]))) 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -23632,15 +23878,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory to Memory Source address. + ARM GAS /tmp/ccuHnxNu.s page 399 + + 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetM2MSrcAddress 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccEQxcUB.s page 395 - - 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -23692,15 +23938,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address) + ARM GAS /tmp/ccuHnxNu.s page 400 + + 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory 1 address (used in case of Double buffer mode). - ARM GAS /tmp/ccEQxcUB.s page 396 - - 1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M1AR M1A LL_DMA_GetMemory1Address 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -23752,15 +23998,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 half transfer flag. 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF2 LL_DMA_IsActiveFlag_HT2 + ARM GAS /tmp/ccuHnxNu.s page 401 + + 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx) 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF2)==(DMA_LISR_HTIF2)); - ARM GAS /tmp/ccEQxcUB.s page 397 - - 1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -23812,15 +24058,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF7 LL_DMA_IsActiveFlag_HT7 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccuHnxNu.s page 402 + + 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx) 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF7)==(DMA_HISR_HTIF7)); 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccEQxcUB.s page 398 - - 1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 transfer complete flag. 1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TCIF0 LL_DMA_IsActiveFlag_TC0 @@ -23872,15 +24118,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccuHnxNu.s page 403 + + 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF4)==(DMA_HISR_TCIF4)); 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer complete flag. - ARM GAS /tmp/ccEQxcUB.s page 399 - - 1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF0 LL_DMA_IsActiveFlag_TC5 1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -23932,15 +24178,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx) 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF1)==(DMA_LISR_TEIF1)); + ARM GAS /tmp/ccuHnxNu.s page 404 + + 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 transfer error flag. 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF2 LL_DMA_IsActiveFlag_TE2 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccEQxcUB.s page 400 - - 1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx) @@ -23992,15 +24238,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF6)==(DMA_HISR_TEIF6)); 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccuHnxNu.s page 405 + + 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer error flag. 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF7 LL_DMA_IsActiveFlag_TE7 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 401 - - 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx) 1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF7)==(DMA_HISR_TEIF7)); @@ -24052,15 +24298,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 direct mode error flag. + ARM GAS /tmp/ccuHnxNu.s page 406 + + 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF4 LL_DMA_IsActiveFlag_DME4 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME4(DMA_TypeDef *DMAx) 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccEQxcUB.s page 402 - - 1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF4)==(DMA_HISR_DMEIF4)); 1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -24112,15 +24358,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 FIFO error flag. 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF1 LL_DMA_IsActiveFlag_FE1 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccuHnxNu.s page 407 + + 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE1(DMA_TypeDef *DMAx) 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF1)==(DMA_LISR_FEIF1)); 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccEQxcUB.s page 403 - - 2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 FIFO error flag. @@ -24172,15 +24418,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 408 + + 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE6(DMA_TypeDef *DMAx) 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF6)==(DMA_HISR_FEIF6)); 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 404 - - 2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 FIFO error flag. 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF7 LL_DMA_IsActiveFlag_FE7 2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -24232,15 +24478,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx) 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccuHnxNu.s page 409 + + 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3); 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 half transfer flag. 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF4 LL_DMA_ClearFlag_HT4 - ARM GAS /tmp/ccEQxcUB.s page 405 - - 2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -24292,15 +24538,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0); 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccuHnxNu.s page 410 + + 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 transfer complete flag. 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF1 LL_DMA_ClearFlag_TC1 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 406 - - 2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx) 2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -24352,15 +24598,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 411 + + 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer complete flag. 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF6 LL_DMA_ClearFlag_TC6 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccEQxcUB.s page 407 - - 2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF6); 2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -24372,21 +24618,21 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) - 6415 .loc 6 2277 22 view .LVU2029 - 6416 .LBB579: + 6571 .loc 6 2277 22 view .LVU2071 + 6572 .LBB582: 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); - 6417 .loc 6 2279 3 view .LVU2030 - 6418 00dc 4FF00062 mov r2, #134217728 - 6419 00e0 DA60 str r2, [r3, #12] - 6420 .LVL594: - 6421 .loc 6 2279 3 is_stmt 0 view .LVU2031 - 6422 .LBE579: - 6423 .LBE578: -2294:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); - 6424 .loc 1 2294 3 is_stmt 1 view .LVU2032 - 6425 .LBB580: - 6426 .LBI580: + 6573 .loc 6 2279 3 view .LVU2072 + 6574 00dc 4FF00062 mov r2, #134217728 + 6575 00e0 DA60 str r2, [r3, #12] + 6576 .LVL597: + 6577 .loc 6 2279 3 is_stmt 0 view .LVU2073 + 6578 .LBE582: + 6579 .LBE581: +2312:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); + 6580 .loc 1 2312 3 is_stmt 1 view .LVU2074 + 6581 .LBB583: + 6582 .LBI583: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -24412,15 +24658,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 412 + + 2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 transfer error flag. 2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF2 LL_DMA_ClearFlag_TE2 2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccEQxcUB.s page 408 - - 2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF2); 2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -24472,29 +24718,29 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 transfer error flag. 2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF7 LL_DMA_ClearFlag_TE7 + ARM GAS /tmp/ccuHnxNu.s page 413 + + 2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) - 6427 .loc 6 2365 22 view .LVU2033 - 6428 .LBB581: - ARM GAS /tmp/ccEQxcUB.s page 409 - - + 6583 .loc 6 2365 22 view .LVU2075 + 6584 .LBB584: 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7); - 6429 .loc 6 2367 3 view .LVU2034 - 6430 00e2 4FF00072 mov r2, #33554432 - 6431 00e6 DA60 str r2, [r3, #12] - 6432 .LVL595: - 6433 .loc 6 2367 3 is_stmt 0 view .LVU2035 - 6434 .LBE581: - 6435 .LBE580: -2295:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); - 6436 .loc 1 2295 3 is_stmt 1 view .LVU2036 - 6437 .LBB582: - 6438 .LBI582: - 6439 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" + 6585 .loc 6 2367 3 view .LVU2076 + 6586 00e2 4FF00072 mov r2, #33554432 + 6587 00e6 DA60 str r2, [r3, #12] + 6588 .LVL598: + 6589 .loc 6 2367 3 is_stmt 0 view .LVU2077 + 6590 .LBE584: + 6591 .LBE583: +2313:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); + 6592 .loc 1 2313 3 is_stmt 1 view .LVU2078 + 6593 .LBB585: + 6594 .LBI585: + 6595 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @file stm32f7xx_ll_usart.h @@ -24532,15 +24778,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** || defined(UART4) || defined(UART5) || defined(UART7) || defined(UART8) 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL USART + ARM GAS /tmp/ccuHnxNu.s page 414 + + 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private types -------------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private variables ---------------------------------------------------------*/ 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccEQxcUB.s page 410 - - 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private constants ---------------------------------------------------------*/ 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Private_Constants USART Private Constants 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ @@ -24592,15 +24838,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetParity().*/ + ARM GAS /tmp/ccuHnxNu.s page 415 + + 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is en 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_DIRECT 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetTransferDirection().*/ - ARM GAS /tmp/ccEQxcUB.s page 411 - - 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enab 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_HWCONT @@ -24652,15 +24898,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } LL_USART_ClockInitTypeDef; 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccuHnxNu.s page 416 + + 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USE_FULL_LL_DRIVER */ 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported constants --------------------------------------------------------*/ - ARM GAS /tmp/ccEQxcUB.s page 412 - - 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Constants USART Exported Constants 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24712,15 +24958,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_ABRE USART_ISR_ABRE /*!< Auto baud rate e 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_ABRF USART_ISR_ABRF /*!< Auto baud rate f 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ + ARM GAS /tmp/ccuHnxNu.s page 417 + + 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CMF USART_ISR_CMF /*!< Character match 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop - ARM GAS /tmp/ccEQxcUB.s page 413 - - 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable @@ -24772,15 +25018,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccuHnxNu.s page 418 + + 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_PARITY Parity Control 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity co 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity co 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity co - ARM GAS /tmp/ccEQxcUB.s page 414 - - 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24832,15 +25078,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the l 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} + ARM GAS /tmp/ccuHnxNu.s page 419 + + 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_PHASE Clock Phase 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti - ARM GAS /tmp/ccEQxcUB.s page 415 - - 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transit 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} @@ -24892,15 +25138,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 420 + + 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the da 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the da - ARM GAS /tmp/ccEQxcUB.s page 416 - - 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24952,15 +25198,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake u 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake u + ARM GAS /tmp/ccuHnxNu.s page 421 + + 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake u 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUS */ - ARM GAS /tmp/ccEQxcUB.s page 417 - - 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ @@ -25012,15 +25258,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 422 + + 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Write a value in USART register 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __INSTANCE__ USART Instance 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __REG__ Register to be written 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __VALUE__ Value to be written in the register 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 418 - - 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VAL 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -25072,15 +25318,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration Configuration functions + ARM GAS /tmp/ccuHnxNu.s page 423 + + 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Enable 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 UE LL_USART_Enable - ARM GAS /tmp/ccEQxcUB.s page 419 - - 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25132,15 +25378,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART disabled in STOP Mode. + ARM GAS /tmp/ccuHnxNu.s page 424 + + 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When this function is disabled, USART is not able to wake up the MCU from Stop mode 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 UESM LL_USART_DisableInStopMode 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 420 - - 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx) 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -25192,15 +25438,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsClockEnabledInStopMode(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccuHnxNu.s page 425 + + 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)); 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_UCESM */ 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM*/ - ARM GAS /tmp/ccEQxcUB.s page 421 - - 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit) 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RE LL_USART_EnableDirectionRx @@ -25252,15 +25498,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 TE LL_USART_SetTransferDirection 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param TransferDirection This parameter can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 426 + + 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_NONE 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_RX 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_TX 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_TX_RX 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 422 - - 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirectio 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); @@ -25312,15 +25558,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccuHnxNu.s page 427 + + 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Receiver Wake Up method from Mute mode. - ARM GAS /tmp/ccEQxcUB.s page 423 - - 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Method This parameter can be one of the following values: @@ -25372,15 +25618,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_8B 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_9B 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 428 + + 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetDataWidth(const USART_TypeDef *USARTx) 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M)); 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 424 - - 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Allow switch between Mute Mode and Active mode 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 MME LL_USART_EnableMuteMode 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -25432,15 +25678,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 OVER8 LL_USART_GetOverSampling 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccuHnxNu.s page 429 + + 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_16 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx) 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8)); - ARM GAS /tmp/ccEQxcUB.s page 425 - - 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -25492,15 +25738,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 430 + + 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return phase of the clock output on the SCLK pin in synchronous mode 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CPHA LL_USART_GetClockPhase 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccEQxcUB.s page 426 - - 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25552,15 +25798,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CPOL LL_USART_ConfigClock\n 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 LBCL LL_USART_ConfigClock 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccuHnxNu.s page 431 + + 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Phase This parameter can be one of the following values: 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Polarity This parameter can be one of the following values: 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_LOW 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_HIGH - ARM GAS /tmp/ccEQxcUB.s page 427 - - 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LBCPOutput This parameter can be one of the following values: 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT @@ -25612,15 +25858,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set the length of the stop bits + ARM GAS /tmp/ccuHnxNu.s page 432 + + 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 STOP LL_USART_SetStopBitsLength 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values: 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1_5 - ARM GAS /tmp/ccEQxcUB.s page 428 - - 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_2 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25672,15 +25918,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t P + ARM GAS /tmp/ccuHnxNu.s page 433 + + 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t StopBits) 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccEQxcUB.s page 429 - - 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure TX/RX pins swapping setting. 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 SWAP LL_USART_SetTXRXSwap @@ -25732,15 +25978,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(const USART_TypeDef *USARTx) 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccuHnxNu.s page 434 + + 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV)); 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure TX pin active level logic 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 TXINV LL_USART_SetTXPinLevel - ARM GAS /tmp/ccEQxcUB.s page 430 - - 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PinInvMethod This parameter can be one of the following values: 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD @@ -25792,15 +26038,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(const USART_TypeDef *USARTx) 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV)); + ARM GAS /tmp/ccuHnxNu.s page 435 + + 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure transfer bit order (either Less or Most Significant Bit First) 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note MSB First means data is transmitted/received with the MSB first, following the start bi 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LSB First means data is transmitted/received with data bit 0 first, following the start - ARM GAS /tmp/ccEQxcUB.s page 431 - - 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 MSBFIRST LL_USART_SetTransferBitOrder 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param BitOrder This parameter can be one of the following values: @@ -25852,15 +26098,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx) 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN); + ARM GAS /tmp/ccuHnxNu.s page 436 + + 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if Auto Baud-Rate Detection mechanism is enabled 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. - ARM GAS /tmp/ccEQxcUB.s page 432 - - 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_IsEnabledAutoBaud 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -25912,15 +26158,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx) + ARM GAS /tmp/ccuHnxNu.s page 437 + + 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_RTOEN); 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Receiver Timeout - ARM GAS /tmp/ccEQxcUB.s page 433 - - 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RTOEN LL_USART_DisableRxTimeout 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -25972,15 +26218,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return 8 bit Address of the USART node as set in ADD field of CR2. + ARM GAS /tmp/ccuHnxNu.s page 438 + + 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note If 4-bit Address Detection is selected in ADDM7, 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * If 7-bit Address Detection is selected in ADDM7, 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant) 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ADD LL_USART_GetNodeAddress 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccEQxcUB.s page 434 - - 1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255) 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(const USART_TypeDef *USARTx) @@ -26032,15 +26278,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl + ARM GAS /tmp/ccuHnxNu.s page 439 + + 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx) 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_CTSE); - ARM GAS /tmp/ccEQxcUB.s page 435 - - 1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26092,15 +26338,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccuHnxNu.s page 440 + + 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable One bit sampling method 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccEQxcUB.s page 436 - - 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx) 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -26152,15 +26398,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 441 + + 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if Overrun detection is enabled 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_IsEnabledOverrunDetect 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccEQxcUB.s page 437 - - 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL); 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -26212,15 +26458,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll BRR BRR LL_USART_SetBaudRate 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PeriphClk Peripheral Clock + ARM GAS /tmp/ccuHnxNu.s page 442 + + 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param OverSampling This parameter can be one of the following values: 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_16 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param BaudRate Baud Rate 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 438 - - 1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverS 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t BaudRate) 1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -26272,15 +26518,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrresult = (PeriphClk * 2U) / usartdiv; 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccuHnxNu.s page 443 + + 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if ((usartdiv & 0xFFFFU) != 0U) 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrresult = PeriphClk / usartdiv; 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccEQxcUB.s page 439 - - 1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (brrresult); 1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -26332,15 +26578,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 444 + + 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 440 - - 1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable IrDA mode @@ -26392,15 +26638,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_LOW 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 445 + + 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode) 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 441 - - 1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power) 1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. @@ -26452,15 +26698,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccuHnxNu.s page 446 + + 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Smartcard NACK transmission 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccEQxcUB.s page 442 - - 1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx) @@ -26512,15 +26758,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 SCEN LL_USART_DisableSmartcard + ARM GAS /tmp/ccuHnxNu.s page 447 + + 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx) 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN); - ARM GAS /tmp/ccEQxcUB.s page 443 - - 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26572,15 +26818,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Smartcard prescaler value, used for dividing the USART clock 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * source to provide the SMARTCARD Clock (5 bits value) 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + ARM GAS /tmp/ccuHnxNu.s page 448 + + 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PrescalerValue Value between Min_Data=0 and Max_Data=31 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 444 - - 1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) 1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue); @@ -26632,15 +26878,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 449 + + 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex f 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 445 - - 2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Single Wire Half-Duplex mode 2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not 2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Half-Duplex mode is supported by the USARTx instance. @@ -26692,15 +26938,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen + ARM GAS /tmp/ccuHnxNu.s page 450 + + 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LINBDLength This parameter can be one of the following values: 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LINBREAK_DETECT_10B 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LINBREAK_DETECT_11B 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 446 - - 2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength) 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength); @@ -26752,15 +26998,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN + ARM GAS /tmp/ccuHnxNu.s page 451 + + 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx) 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL); - ARM GAS /tmp/ccEQxcUB.s page 447 - - 2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26812,15 +27058,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccuHnxNu.s page 452 + + 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return DEAT (Driver Enable Assertion Time) 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 DEAT LL_USART_GetDEAssertionTime 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccEQxcUB.s page 448 - - 2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(const USART_TypeDef *USARTx) @@ -26872,15 +27118,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEP LL_USART_SetDESignalPolarity + ARM GAS /tmp/ccuHnxNu.s page 453 + + 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Polarity This parameter can be one of the following values: 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DE_POLARITY_HIGH 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DE_POLARITY_LOW 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 449 - - 2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity) 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity); @@ -26932,15 +27178,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigAsyncMode\n 2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigAsyncMode 2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccuHnxNu.s page 454 + + 2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx) 2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Asynchronous mode, the following bits must be kept cleared: 2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN, CLKEN bits in the USART_CR2 register, - ARM GAS /tmp/ccEQxcUB.s page 450 - - 2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - SCEN, IREN and HDSEL bits in the USART_CR3 register. 2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); @@ -26992,15 +27238,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - STOP and CLKEN bits in the USART_CR2 register, 2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register, 2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register, + ARM GAS /tmp/ccuHnxNu.s page 455 + + 2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register. 2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also set the UART/USART in LIN mode. 2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : 2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function - ARM GAS /tmp/ccEQxcUB.s page 451 - - 2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function @@ -27052,15 +27298,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n 2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n 2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n + ARM GAS /tmp/ccuHnxNu.s page 456 + + 2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n 2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigHalfDuplexMode 2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx) - ARM GAS /tmp/ccEQxcUB.s page 452 - - 2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Half Duplex mode, the following bits must be kept cleared: 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN and CLKEN bits in the USART_CR2 register, @@ -27112,15 +27358,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Configure Stop bits to 1.5 bits */ 2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Synchronous mode is activated by default */ 2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN)); + ARM GAS /tmp/ccuHnxNu.s page 457 + + 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Smartcard mode */ 2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_SCEN); 2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Irda Mode - ARM GAS /tmp/ccEQxcUB.s page 453 - - 2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In IRDA mode, the following bits must be kept cleared: 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - STOP and CLKEN bits in the USART_CR2 register, @@ -27172,15 +27418,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register. 2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : 2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + ARM GAS /tmp/ccuHnxNu.s page 458 + + 2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function 2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function 2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function 2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function 2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Multi processor Mode 2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Wake Up Method, Node address, ...) should be set using - ARM GAS /tmp/ccEQxcUB.s page 454 - - 2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n @@ -27232,15 +27478,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Noise error detected Flag is set or not + ARM GAS /tmp/ccuHnxNu.s page 459 + + 2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR NE LL_USART_IsActiveFlag_NE 2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx) 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccEQxcUB.s page 455 - - 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL); 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -27292,15 +27538,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmit Data Register Empty Flag is set or not 2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE 2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccuHnxNu.s page 460 + + 2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(const USART_TypeDef *USARTx) 2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL); 2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccEQxcUB.s page 456 - - 2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART LIN Break Detection Flag is set or not @@ -27352,15 +27598,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL); 2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccuHnxNu.s page 461 + + 2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART End Of Block Flag is set or not 2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR EOBF LL_USART_IsActiveFlag_EOB 2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccEQxcUB.s page 457 - - 2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(const USART_TypeDef *USARTx) @@ -27412,15 +27658,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccuHnxNu.s page 462 + + 2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL); 2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Send Break Flag is set or not - ARM GAS /tmp/ccEQxcUB.s page 458 - - 2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR SBKF LL_USART_IsActiveFlag_SBK 2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -27472,15 +27718,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_ISR_REACK) 2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receive Enable Acknowledge Flag is set or not + ARM GAS /tmp/ccuHnxNu.s page 463 + + 2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR REACK LL_USART_IsActiveFlag_REACK 2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(const USART_TypeDef *USARTx) 2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccEQxcUB.s page 459 - - 2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL); 2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -27532,15 +27778,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_NCF); 2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccuHnxNu.s page 464 + + 2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear OverRun Error Flag 2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR ORECF LL_USART_ClearFlag_ORE 2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 460 - - 2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx) 2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_ORECF); @@ -27592,15 +27838,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx) 2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccuHnxNu.s page 465 + + 2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_LBDCF); 2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear CTS Interrupt Flag 2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccEQxcUB.s page 461 - - 2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR CTSCF LL_USART_ClearFlag_nCTS 2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -27652,15 +27898,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Wake Up from stop mode Flag 3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not 3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. + ARM GAS /tmp/ccuHnxNu.s page 466 + + 3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR WUCF LL_USART_ClearFlag_WKUP 3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx) 3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccEQxcUB.s page 462 - - 3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_WUCF); 3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -27712,15 +27958,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE 3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccuHnxNu.s page 467 + + 3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx) 3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE); 3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccEQxcUB.s page 463 - - 3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Parity Error Interrupt 3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_EnableIT_PE @@ -27772,15 +28018,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD + ARM GAS /tmp/ccuHnxNu.s page 468 + + 3116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx) 3120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_LBDIE); - ARM GAS /tmp/ccEQxcUB.s page 464 - - 3122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -27832,15 +28078,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 3171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt + ARM GAS /tmp/ccuHnxNu.s page 469 + + 3173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 3175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_EnableIT_TCBGT 3176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 465 - - 3179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx) 3180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE); @@ -27892,15 +28138,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 470 + + 3230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Parity Error Interrupt 3231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_DisableIT_PE 3232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx) - ARM GAS /tmp/ccEQxcUB.s page 466 - - 3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE); 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -27952,15 +28198,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE); 3286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccuHnxNu.s page 471 + + 3287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Error Interrupt 3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a fram 3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register). 3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 0: Interrupt is inhibited - ARM GAS /tmp/ccEQxcUB.s page 467 - - 3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. 3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR 3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -28012,15 +28258,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx) + ARM GAS /tmp/ccuHnxNu.s page 472 + + 3344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); 3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ 3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 468 - - 3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART IDLE Interrupt source is enabled or disabled. 3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE 3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -28072,15 +28318,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx) 3400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccuHnxNu.s page 473 + + 3401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL); 3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Character Match Interrupt is enabled or disabled. 3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_IsEnabledIT_CM - ARM GAS /tmp/ccEQxcUB.s page 469 - - 3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -28132,15 +28378,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 3457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 474 + + 3458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx) 3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); 3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 470 - - 3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART CTS Interrupt is enabled or disabled. 3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not 3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. @@ -28192,15 +28438,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_DMA_Management DMA_Management 3514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ + ARM GAS /tmp/ccuHnxNu.s page 475 + + 3515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Mode for reception 3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX 3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccEQxcUB.s page 471 - - 3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx) @@ -28237,30 +28483,30 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) - 6440 .loc 7 3556 22 view .LVU2037 - 6441 .L320: + 6596 .loc 7 3556 22 view .LVU2079 + 6597 .L331: 3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); - 6442 .loc 7 3558 3 discriminator 1 view .LVU2038 - 6443 .LBB583: - 6444 .loc 7 3558 3 discriminator 1 view .LVU2039 - 6445 .loc 7 3558 3 discriminator 1 view .LVU2040 - 6446 .loc 7 3558 3 discriminator 1 view .LVU2041 - 6447 .LBB584: - 6448 .LBI584: - 6449 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" + 6598 .loc 7 3558 3 discriminator 1 view .LVU2080 + 6599 .LBB586: + 6600 .loc 7 3558 3 discriminator 1 view .LVU2081 + 6601 .loc 7 3558 3 discriminator 1 view .LVU2082 + 6602 .loc 7 3558 3 discriminator 1 view .LVU2083 + 6603 .LBB587: + 6604 .LBI587: + 6605 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + ARM GAS /tmp/ccuHnxNu.s page 476 + + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * - ARM GAS /tmp/ccEQxcUB.s page 472 - - 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may @@ -28312,15 +28558,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccuHnxNu.s page 477 + + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccEQxcUB.s page 473 - - 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -28372,15 +28618,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccuHnxNu.s page 478 + + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccEQxcUB.s page 474 - - 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. @@ -28432,15 +28678,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccuHnxNu.s page 479 + + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 475 - - 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); @@ -28492,15 +28738,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + ARM GAS /tmp/ccuHnxNu.s page 480 + + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - ARM GAS /tmp/ccEQxcUB.s page 476 - - 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -28552,15 +28798,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccuHnxNu.s page 481 + + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccEQxcUB.s page 477 - - 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer @@ -28612,15 +28858,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + ARM GAS /tmp/ccuHnxNu.s page 482 + + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 478 - - 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value @@ -28672,15 +28918,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccuHnxNu.s page 483 + + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask - ARM GAS /tmp/ccEQxcUB.s page 479 - - 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -28732,15 +28978,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + ARM GAS /tmp/ccuHnxNu.s page 484 + + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - ARM GAS /tmp/ccEQxcUB.s page 480 - - 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -28792,15 +29038,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + ARM GAS /tmp/ccuHnxNu.s page 485 + + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccEQxcUB.s page 481 - - 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value @@ -28852,15 +29098,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccuHnxNu.s page 486 + + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 579:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccEQxcUB.s page 482 - - 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -28912,15 +29158,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + ARM GAS /tmp/ccuHnxNu.s page 487 + + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 483 - - 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ @@ -28972,15 +29218,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + ARM GAS /tmp/ccuHnxNu.s page 488 + + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) - ARM GAS /tmp/ccEQxcUB.s page 484 - - 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure @@ -29032,15 +29278,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + ARM GAS /tmp/ccuHnxNu.s page 489 + + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; - ARM GAS /tmp/ccEQxcUB.s page 485 - - 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -29092,15 +29338,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccuHnxNu.s page 490 + + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccEQxcUB.s page 486 - - 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ @@ -29152,15 +29398,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccuHnxNu.s page 491 + + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. - ARM GAS /tmp/ccEQxcUB.s page 487 - - 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -29212,15 +29458,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + ARM GAS /tmp/ccuHnxNu.s page 492 + + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/ccEQxcUB.s page 488 - - 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; @@ -29272,15 +29518,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + ARM GAS /tmp/ccuHnxNu.s page 493 + + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse - ARM GAS /tmp/ccEQxcUB.s page 489 - - 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) @@ -29332,15 +29578,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); + ARM GAS /tmp/ccuHnxNu.s page 494 + + 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccEQxcUB.s page 490 - - 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -29374,37 +29620,37 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) - 6450 .loc 8 1068 31 view .LVU2042 - 6451 .LBB585: + 6606 .loc 8 1068 31 view .LVU2084 + 6607 .LBB588: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 6452 .loc 8 1070 5 view .LVU2043 + 6608 .loc 8 1070 5 view .LVU2085 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 6453 .loc 8 1072 4 view .LVU2044 - 6454 00e8 794A ldr r2, .L329+76 - 6455 00ea 02F10803 add r3, r2, #8 - 6456 .syntax unified - 6457 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 6458 00ee 53E8003F ldrex r3, [r3] - 6459 @ 0 "" 2 - 6460 .LVL596: + 6609 .loc 8 1072 4 view .LVU2086 + 6610 00e8 7D4A ldr r2, .L340+76 + 6611 00ea 02F10803 add r3, r2, #8 + 6612 .syntax unified + 6613 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6614 00ee 53E8003F ldrex r3, [r3] + 6615 @ 0 "" 2 + 6616 .LVL599: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 6461 .loc 8 1073 4 view .LVU2045 - 6462 .loc 8 1073 4 is_stmt 0 view .LVU2046 - 6463 .thumb - 6464 .syntax unified - 6465 .LBE585: - 6466 .LBE584: - 6467 .loc 7 3558 3 discriminator 1 view .LVU2047 - 6468 00f2 43F08003 orr r3, r3, #128 - ARM GAS /tmp/ccEQxcUB.s page 491 + 6617 .loc 8 1073 4 view .LVU2087 + 6618 .loc 8 1073 4 is_stmt 0 view .LVU2088 + ARM GAS /tmp/ccuHnxNu.s page 495 - 6469 .LVL597: - 6470 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU2048 - 6471 .LBB586: - 6472 .LBI586: + 6619 .thumb + 6620 .syntax unified + 6621 .LBE588: + 6622 .LBE587: + 6623 .loc 7 3558 3 discriminator 1 view .LVU2089 + 6624 00f2 43F08003 orr r3, r3, #128 + 6625 .LVL600: + 6626 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU2090 + 6627 .LBB589: + 6628 .LBI589: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -29451,42 +29697,42 @@ ARM GAS /tmp/ccEQxcUB.s page 1 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) - 6473 .loc 8 1119 31 view .LVU2049 - 6474 .LBB587: + 6629 .loc 8 1119 31 view .LVU2091 + ARM GAS /tmp/ccuHnxNu.s page 496 + + + 6630 .LBB590: 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 6475 .loc 8 1121 4 view .LVU2050 + 6631 .loc 8 1121 4 view .LVU2092 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - ARM GAS /tmp/ccEQxcUB.s page 492 - - - 6476 .loc 8 1123 4 view .LVU2051 - 6477 00f6 0832 adds r2, r2, #8 - 6478 .syntax unified - 6479 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 6480 00f8 42E80031 strex r1, r3, [r2] - 6481 @ 0 "" 2 - 6482 .LVL598: + 6632 .loc 8 1123 4 view .LVU2093 + 6633 00f6 0832 adds r2, r2, #8 + 6634 .syntax unified + 6635 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6636 00f8 42E80031 strex r1, r3, [r2] + 6637 @ 0 "" 2 + 6638 .LVL601: 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 6483 .loc 8 1124 4 view .LVU2052 - 6484 .loc 8 1124 4 is_stmt 0 view .LVU2053 - 6485 .thumb - 6486 .syntax unified - 6487 .LBE587: - 6488 .LBE586: - 6489 .loc 7 3558 3 discriminator 1 view .LVU2054 - 6490 00fc 0029 cmp r1, #0 - 6491 00fe F3D1 bne .L320 - 6492 .LBE583: - 6493 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU2055 - 6494 .LVL599: - 6495 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU2056 - 6496 .LBE582: -2296:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); - 6497 .loc 1 2296 3 is_stmt 1 view .LVU2057 - 6498 .LBB588: - 6499 .LBI588: + 6639 .loc 8 1124 4 view .LVU2094 + 6640 .loc 8 1124 4 is_stmt 0 view .LVU2095 + 6641 .thumb + 6642 .syntax unified + 6643 .LBE590: + 6644 .LBE589: + 6645 .loc 7 3558 3 discriminator 1 view .LVU2096 + 6646 00fc 0029 cmp r1, #0 + 6647 00fe F3D1 bne .L331 + 6648 .LBE586: + 6649 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU2097 + 6650 .LVL602: + 6651 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU2098 + 6652 .LBE585: +2314:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); + 6653 .loc 1 2314 3 is_stmt 1 view .LVU2099 + 6654 .LBB591: + 6655 .LBI591: 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -29512,15 +29758,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 497 + + 2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 direct mode error flag. 2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF2 LL_DMA_ClearFlag_DME2 2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME2(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccEQxcUB.s page 493 - - 2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF2); 2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -29572,15 +29818,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 direct mode error flag. 2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF7 LL_DMA_ClearFlag_DME7 + ARM GAS /tmp/ccuHnxNu.s page 498 + + 2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME7(DMA_TypeDef *DMAx) 2454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF7); - ARM GAS /tmp/ccEQxcUB.s page 494 - - 2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -29632,15 +29878,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF4 LL_DMA_ClearFlag_FE4 2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccuHnxNu.s page 499 + + 2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE4(DMA_TypeDef *DMAx) 2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF4); 2511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccEQxcUB.s page 495 - - 2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 FIFO error flag. 2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF5 LL_DMA_ClearFlag_FE5 @@ -29692,15 +29938,15 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 + ARM GAS /tmp/ccuHnxNu.s page 500 + + 2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 2567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Stream) - ARM GAS /tmp/ccEQxcUB.s page 496 - - 2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -29741,3074 +29987,3080 @@ ARM GAS /tmp/ccEQxcUB.s page 1 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream) - 6500 .loc 6 2609 22 view .LVU2058 - 6501 .LBB589: + 6656 .loc 6 2609 22 view .LVU2100 + 6657 .LBB592: 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA - 6502 .loc 6 2611 3 view .LVU2059 - 6503 0100 744B ldr r3, .L329+80 - 6504 0102 D3F8B820 ldr r2, [r3, #184] - 6505 0106 42F01002 orr r2, r2, #16 - 6506 010a C3F8B820 str r2, [r3, #184] - 6507 .LVL600: - 6508 .loc 6 2611 3 is_stmt 0 view .LVU2060 - 6509 .LBE589: - 6510 .LBE588: -2297:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 6511 .loc 1 2297 3 is_stmt 1 view .LVU2061 - 6512 .LBB590: - 6513 .LBI590: - ARM GAS /tmp/ccEQxcUB.s page 497 + 6658 .loc 6 2611 3 view .LVU2101 + 6659 0100 784B ldr r3, .L340+80 + 6660 0102 D3F8B820 ldr r2, [r3, #184] + 6661 0106 42F01002 orr r2, r2, #16 + 6662 010a C3F8B820 str r2, [r3, #184] + 6663 .LVL603: + 6664 .loc 6 2611 3 is_stmt 0 view .LVU2102 + ARM GAS /tmp/ccuHnxNu.s page 501 + 6665 .LBE592: + 6666 .LBE591: +2315:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 6667 .loc 1 2315 3 is_stmt 1 view .LVU2103 + 6668 .LBB593: + 6669 .LBI593: 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6514 .loc 6 2589 22 view .LVU2062 - 6515 .LBB591: + 6670 .loc 6 2589 22 view .LVU2104 + 6671 .LBB594: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6516 .loc 6 2591 3 view .LVU2063 - 6517 010e D3F8B820 ldr r2, [r3, #184] - 6518 0112 42F00402 orr r2, r2, #4 - 6519 0116 C3F8B820 str r2, [r3, #184] - 6520 .LVL601: + 6672 .loc 6 2591 3 view .LVU2105 + 6673 010e D3F8B820 ldr r2, [r3, #184] + 6674 0112 42F00402 orr r2, r2, #4 + 6675 0116 C3F8B820 str r2, [r3, #184] + 6676 .LVL604: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6521 .loc 6 2591 3 is_stmt 0 view .LVU2064 - 6522 .LBE591: - 6523 .LBE590: -2298:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 6524 .loc 1 2298 3 is_stmt 1 view .LVU2065 - 6525 .LBB592: - 6526 .LBI592: + 6677 .loc 6 2591 3 is_stmt 0 view .LVU2106 + 6678 .LBE594: + 6679 .LBE593: +2316:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 6680 .loc 1 2316 3 is_stmt 1 view .LVU2107 + 6681 .LBB595: + 6682 .LBI595: 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6527 .loc 6 2277 22 view .LVU2066 - 6528 .LBB593: + 6683 .loc 6 2277 22 view .LVU2108 + 6684 .LBB596: 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6529 .loc 6 2279 3 view .LVU2067 - 6530 011a 4FF00062 mov r2, #134217728 - 6531 011e DA60 str r2, [r3, #12] - 6532 .LVL602: + 6685 .loc 6 2279 3 view .LVU2109 + 6686 011a 4FF00062 mov r2, #134217728 + 6687 011e DA60 str r2, [r3, #12] + 6688 .LVL605: 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6533 .loc 6 2279 3 is_stmt 0 view .LVU2068 - 6534 .LBE593: - 6535 .LBE592: -2299:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART - 6536 .loc 1 2299 3 is_stmt 1 view .LVU2069 - 6537 .LBB594: - 6538 .LBI594: + 6689 .loc 6 2279 3 is_stmt 0 view .LVU2110 + 6690 .LBE596: + 6691 .LBE595: +2317:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART + 6692 .loc 1 2317 3 is_stmt 1 view .LVU2111 + 6693 .LBB597: + 6694 .LBI597: 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6539 .loc 6 2365 22 view .LVU2070 - 6540 .LBB595: + 6695 .loc 6 2365 22 view .LVU2112 + 6696 .LBB598: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6541 .loc 6 2367 3 view .LVU2071 - 6542 0120 4FF00072 mov r2, #33554432 - 6543 0124 DA60 str r2, [r3, #12] - 6544 .LVL603: + 6697 .loc 6 2367 3 view .LVU2113 + 6698 0120 4FF00072 mov r2, #33554432 + 6699 0124 DA60 str r2, [r3, #12] + 6700 .LVL606: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6545 .loc 6 2367 3 is_stmt 0 view .LVU2072 - 6546 .LBE595: - 6547 .LBE594: -2300:Src/main.c **** - 6548 .loc 1 2300 3 is_stmt 1 view .LVU2073 - 6549 0126 6C4A ldr r2, .L329+84 - 6550 .LVL604: - 6551 .LBB596: - 6552 .LBI596: + 6701 .loc 6 2367 3 is_stmt 0 view .LVU2114 + 6702 .LBE598: + 6703 .LBE597: +2318:Src/main.c **** + 6704 .loc 1 2318 3 is_stmt 1 view .LVU2115 + 6705 0126 704A ldr r2, .L340+84 + 6706 .LVL607: + 6707 .LBB599: + 6708 .LBI599: + ARM GAS /tmp/ccuHnxNu.s page 502 + + 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6553 .loc 6 621 26 view .LVU2074 - 6554 .LBB597: + 6709 .loc 6 621 26 view .LVU2116 + 6710 .LBB600: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6555 .loc 6 623 3 view .LVU2075 + 6711 .loc 6 623 3 view .LVU2117 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccEQxcUB.s page 498 - - - 6556 .loc 6 623 11 is_stmt 0 view .LVU2076 - 6557 0128 D3F8B830 ldr r3, [r3, #184] - 6558 012c 03F0C003 and r3, r3, #192 - 6559 .LVL605: + 6712 .loc 6 623 11 is_stmt 0 view .LVU2118 + 6713 0128 D3F8B830 ldr r3, [r3, #184] + 6714 012c 03F0C003 and r3, r3, #192 + 6715 .LVL608: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6560 .loc 6 623 11 view .LVU2077 - 6561 .LBE597: - 6562 .LBE596: - 6563 .LBB598: - 6564 .LBI598: + 6716 .loc 6 623 11 view .LVU2119 + 6717 .LBE600: + 6718 .LBE599: + 6719 .LBB601: + 6720 .LBI601: 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6565 .loc 6 1425 22 is_stmt 1 view .LVU2078 - 6566 .LBB599: + 6721 .loc 6 1425 22 is_stmt 1 view .LVU2120 + 6722 .LBB602: 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6567 .loc 6 1428 3 view .LVU2079 + 6723 .loc 6 1428 3 view .LVU2121 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6568 .loc 6 1428 6 is_stmt 0 view .LVU2080 - 6569 0130 402B cmp r3, #64 - 6570 0132 7DD0 beq .L326 + 6724 .loc 6 1428 6 is_stmt 0 view .LVU2122 + 6725 0130 402B cmp r3, #64 + 6726 0132 00F08480 beq .L337 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - 6571 .loc 6 1436 5 is_stmt 1 view .LVU2081 - 6572 0134 674B ldr r3, .L329+80 - 6573 .LVL606: + 6727 .loc 6 1436 5 is_stmt 1 view .LVU2123 + 6728 0136 6B4B ldr r3, .L340+80 + 6729 .LVL609: 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - 6574 .loc 6 1436 5 is_stmt 0 view .LVU2082 - 6575 0136 C3F8C020 str r2, [r3, #192] + 6730 .loc 6 1436 5 is_stmt 0 view .LVU2124 + 6731 0138 C3F8C020 str r2, [r3, #192] 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6576 .loc 6 1437 5 is_stmt 1 view .LVU2083 - 6577 013a 684A ldr r2, .L329+88 - 6578 013c C3F8C420 str r2, [r3, #196] - 6579 .L322: - 6580 .LVL607: + 6732 .loc 6 1437 5 is_stmt 1 view .LVU2125 + 6733 013c 6B4A ldr r2, .L340+88 + 6734 013e C3F8C420 str r2, [r3, #196] + 6735 .L333: + 6736 .LVL610: 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6581 .loc 6 1437 5 is_stmt 0 view .LVU2084 - 6582 .LBE599: - 6583 .LBE598: -2305:Src/main.c **** SD_SLIDE = 0; - 6584 .loc 1 2305 2 is_stmt 1 view .LVU2085 -2305:Src/main.c **** SD_SLIDE = 0; - 6585 .loc 1 2305 10 is_stmt 0 view .LVU2086 - 6586 0140 0024 movs r4, #0 - 6587 0142 674B ldr r3, .L329+92 - 6588 0144 1C60 str r4, [r3] -2306:Src/main.c **** //Reset all periphery - 6589 .loc 1 2306 2 is_stmt 1 view .LVU2087 -2306:Src/main.c **** //Reset all periphery - 6590 .loc 1 2306 11 is_stmt 0 view .LVU2088 - 6591 0146 674B ldr r3, .L329+96 - 6592 0148 1C60 str r4, [r3] -2308:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); - 6593 .loc 1 2308 2 is_stmt 1 view .LVU2089 - 6594 014a 674E ldr r6, .L329+100 - 6595 014c 2246 mov r2, r4 - 6596 014e 0821 movs r1, #8 - 6597 0150 3046 mov r0, r6 - 6598 0152 FFF7FEFF bl HAL_GPIO_WritePin - 6599 .LVL608: - ARM GAS /tmp/ccEQxcUB.s page 499 + 6737 .loc 6 1437 5 is_stmt 0 view .LVU2126 + 6738 .LBE602: + 6739 .LBE601: +2323:Src/main.c **** SD_SLIDE = 0; + 6740 .loc 1 2323 2 is_stmt 1 view .LVU2127 +2323:Src/main.c **** SD_SLIDE = 0; + 6741 .loc 1 2323 10 is_stmt 0 view .LVU2128 + 6742 0142 0024 movs r4, #0 + 6743 0144 6A4B ldr r3, .L340+92 + 6744 0146 1C60 str r4, [r3] +2324:Src/main.c **** //Reset all periphery + 6745 .loc 1 2324 2 is_stmt 1 view .LVU2129 +2324:Src/main.c **** //Reset all periphery + 6746 .loc 1 2324 11 is_stmt 0 view .LVU2130 + 6747 0148 6A4B ldr r3, .L340+96 + 6748 014a 1C60 str r4, [r3] +2326:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); + 6749 .loc 1 2326 2 is_stmt 1 view .LVU2131 + ARM GAS /tmp/ccuHnxNu.s page 503 -2309:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); - 6600 .loc 1 2309 2 view .LVU2090 - 6601 0156 2246 mov r2, r4 - 6602 0158 8021 movs r1, #128 - 6603 015a 3046 mov r0, r6 - 6604 015c FFF7FEFF bl HAL_GPIO_WritePin - 6605 .LVL609: -2310:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); - 6606 .loc 1 2310 2 view .LVU2091 - 6607 0160 624F ldr r7, .L329+104 - 6608 0162 2246 mov r2, r4 - 6609 0164 4FF48071 mov r1, #256 - 6610 0168 3846 mov r0, r7 - 6611 016a FFF7FEFF bl HAL_GPIO_WritePin - 6612 .LVL610: -2311:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); - 6613 .loc 1 2311 2 view .LVU2092 - 6614 016e 2246 mov r2, r4 - 6615 0170 1021 movs r1, #16 - 6616 0172 3046 mov r0, r6 - 6617 0174 FFF7FEFF bl HAL_GPIO_WritePin - 6618 .LVL611: -2312:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); - 6619 .loc 1 2312 2 view .LVU2093 - 6620 0178 DFF89081 ldr r8, .L329+136 - 6621 017c 2246 mov r2, r4 - 6622 017e 4FF48061 mov r1, #1024 - 6623 0182 4046 mov r0, r8 - 6624 0184 FFF7FEFF bl HAL_GPIO_WritePin - 6625 .LVL612: -2313:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); - 6626 .loc 1 2313 2 view .LVU2094 - 6627 0188 594D ldr r5, .L329+108 - 6628 018a 2246 mov r2, r4 - 6629 018c 0821 movs r1, #8 - 6630 018e 2846 mov r0, r5 - 6631 0190 FFF7FEFF bl HAL_GPIO_WritePin - 6632 .LVL613: -2314:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); - 6633 .loc 1 2314 2 view .LVU2095 - 6634 0194 2246 mov r2, r4 - 6635 0196 0121 movs r1, #1 - 6636 0198 2846 mov r0, r5 - 6637 019a FFF7FEFF bl HAL_GPIO_WritePin - 6638 .LVL614: -2315:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 6639 .loc 1 2315 2 view .LVU2096 - 6640 019e 2246 mov r2, r4 - 6641 01a0 0221 movs r1, #2 - 6642 01a2 2846 mov r0, r5 - 6643 01a4 FFF7FEFF bl HAL_GPIO_WritePin - 6644 .LVL615: -2316:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 6645 .loc 1 2316 2 view .LVU2097 - 6646 01a8 2246 mov r2, r4 - 6647 01aa 4FF40061 mov r1, #2048 - 6648 01ae 4046 mov r0, r8 - ARM GAS /tmp/ccEQxcUB.s page 500 + 6750 014c 6A4E ldr r6, .L340+100 + 6751 014e 2246 mov r2, r4 + 6752 0150 0821 movs r1, #8 + 6753 0152 3046 mov r0, r6 + 6754 0154 FFF7FEFF bl HAL_GPIO_WritePin + 6755 .LVL611: +2327:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); + 6756 .loc 1 2327 2 view .LVU2132 + 6757 0158 2246 mov r2, r4 + 6758 015a 8021 movs r1, #128 + 6759 015c 3046 mov r0, r6 + 6760 015e FFF7FEFF bl HAL_GPIO_WritePin + 6761 .LVL612: +2328:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); + 6762 .loc 1 2328 2 view .LVU2133 + 6763 0162 664F ldr r7, .L340+104 + 6764 0164 2246 mov r2, r4 + 6765 0166 4FF48071 mov r1, #256 + 6766 016a 3846 mov r0, r7 + 6767 016c FFF7FEFF bl HAL_GPIO_WritePin + 6768 .LVL613: +2329:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); + 6769 .loc 1 2329 2 view .LVU2134 + 6770 0170 2246 mov r2, r4 + 6771 0172 1021 movs r1, #16 + 6772 0174 3046 mov r0, r6 + 6773 0176 FFF7FEFF bl HAL_GPIO_WritePin + 6774 .LVL614: +2330:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); + 6775 .loc 1 2330 2 view .LVU2135 + 6776 017a DFF89C81 ldr r8, .L340+132 + 6777 017e 2246 mov r2, r4 + 6778 0180 4FF48061 mov r1, #1024 + 6779 0184 4046 mov r0, r8 + 6780 0186 FFF7FEFF bl HAL_GPIO_WritePin + 6781 .LVL615: +2331:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); + 6782 .loc 1 2331 2 view .LVU2136 + 6783 018a 5D4D ldr r5, .L340+108 + 6784 018c 2246 mov r2, r4 + 6785 018e 0821 movs r1, #8 + 6786 0190 2846 mov r0, r5 + 6787 0192 FFF7FEFF bl HAL_GPIO_WritePin + 6788 .LVL616: +2332:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); + 6789 .loc 1 2332 2 view .LVU2137 + 6790 0196 2246 mov r2, r4 + 6791 0198 0121 movs r1, #1 + 6792 019a 2846 mov r0, r5 + 6793 019c FFF7FEFF bl HAL_GPIO_WritePin + 6794 .LVL617: +2333:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 6795 .loc 1 2333 2 view .LVU2138 + 6796 01a0 2246 mov r2, r4 + 6797 01a2 0221 movs r1, #2 + 6798 01a4 2846 mov r0, r5 + 6799 01a6 FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccuHnxNu.s page 504 - 6649 01b0 FFF7FEFF bl HAL_GPIO_WritePin - 6650 .LVL616: -2317:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) - 6651 .loc 1 2317 2 view .LVU2098 - 6652 01b4 2246 mov r2, r4 - 6653 01b6 2021 movs r1, #32 - 6654 01b8 3046 mov r0, r6 - 6655 01ba FFF7FEFF bl HAL_GPIO_WritePin - 6656 .LVL617: -2327:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC - 6657 .loc 1 2327 2 view .LVU2099 - 6658 01be 06F50066 add r6, r6, #2048 - 6659 01c2 0122 movs r2, #1 - 6660 01c4 4FF48061 mov r1, #1024 - 6661 01c8 3046 mov r0, r6 - 6662 01ca FFF7FEFF bl HAL_GPIO_WritePin - 6663 .LVL618: -2328:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 6664 .loc 1 2328 2 view .LVU2100 - 6665 01ce 494C ldr r4, .L329+112 - 6666 01d0 0122 movs r2, #1 - 6667 01d2 4021 movs r1, #64 - 6668 01d4 2046 mov r0, r4 - 6669 01d6 FFF7FEFF bl HAL_GPIO_WritePin - 6670 .LVL619: -2329:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 6671 .loc 1 2329 2 view .LVU2101 - 6672 01da 0122 movs r2, #1 - 6673 01dc 4FF48041 mov r1, #16384 - 6674 01e0 3046 mov r0, r6 - 6675 01e2 FFF7FEFF bl HAL_GPIO_WritePin - 6676 .LVL620: -2330:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 - 6677 .loc 1 2330 2 view .LVU2102 - 6678 01e6 0122 movs r2, #1 - 6679 01e8 4FF48041 mov r1, #16384 - 6680 01ec 2046 mov r0, r4 - 6681 01ee FFF7FEFF bl HAL_GPIO_WritePin - 6682 .LVL621: -2331:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 6683 .loc 1 2331 2 view .LVU2103 - 6684 01f2 0122 movs r2, #1 - 6685 01f4 4FF48041 mov r1, #16384 - 6686 01f8 4046 mov r0, r8 - 6687 01fa FFF7FEFF bl HAL_GPIO_WritePin - 6688 .LVL622: -2332:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 6689 .loc 1 2332 2 view .LVU2104 - 6690 01fe 0122 movs r2, #1 - 6691 0200 4021 movs r1, #64 - 6692 0202 2846 mov r0, r5 - 6693 0204 FFF7FEFF bl HAL_GPIO_WritePin - 6694 .LVL623: -2333:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 6695 .loc 1 2333 2 view .LVU2105 - 6696 0208 0122 movs r2, #1 - 6697 020a 4FF48051 mov r1, #4096 - ARM GAS /tmp/ccEQxcUB.s page 501 + 6800 .LVL618: +2334:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 6801 .loc 1 2334 2 view .LVU2139 + 6802 01aa 2246 mov r2, r4 + 6803 01ac 4FF40061 mov r1, #2048 + 6804 01b0 4046 mov r0, r8 + 6805 01b2 FFF7FEFF bl HAL_GPIO_WritePin + 6806 .LVL619: +2335:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) + 6807 .loc 1 2335 2 view .LVU2140 + 6808 01b6 2246 mov r2, r4 + 6809 01b8 2021 movs r1, #32 + 6810 01ba 3046 mov r0, r6 + 6811 01bc FFF7FEFF bl HAL_GPIO_WritePin + 6812 .LVL620: +2345:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC + 6813 .loc 1 2345 2 view .LVU2141 + 6814 01c0 06F50066 add r6, r6, #2048 + 6815 01c4 0122 movs r2, #1 + 6816 01c6 4FF48061 mov r1, #1024 + 6817 01ca 3046 mov r0, r6 + 6818 01cc FFF7FEFF bl HAL_GPIO_WritePin + 6819 .LVL621: +2346:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 6820 .loc 1 2346 2 view .LVU2142 + 6821 01d0 DFF84891 ldr r9, .L340+136 + 6822 01d4 0122 movs r2, #1 + 6823 01d6 4021 movs r1, #64 + 6824 01d8 4846 mov r0, r9 + 6825 01da FFF7FEFF bl HAL_GPIO_WritePin + 6826 .LVL622: +2347:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 6827 .loc 1 2347 2 view .LVU2143 + 6828 01de 0122 movs r2, #1 + 6829 01e0 4FF48041 mov r1, #16384 + 6830 01e4 3046 mov r0, r6 + 6831 01e6 FFF7FEFF bl HAL_GPIO_WritePin + 6832 .LVL623: +2348:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 + 6833 .loc 1 2348 2 view .LVU2144 + 6834 01ea 0122 movs r2, #1 + 6835 01ec 4FF48041 mov r1, #16384 + 6836 01f0 4846 mov r0, r9 + 6837 01f2 FFF7FEFF bl HAL_GPIO_WritePin + 6838 .LVL624: +2349:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 6839 .loc 1 2349 2 view .LVU2145 + 6840 01f6 0122 movs r2, #1 + 6841 01f8 4FF48041 mov r1, #16384 + 6842 01fc 4046 mov r0, r8 + 6843 01fe FFF7FEFF bl HAL_GPIO_WritePin + 6844 .LVL625: +2350:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 6845 .loc 1 2350 2 view .LVU2146 + 6846 0202 0122 movs r2, #1 + 6847 0204 4021 movs r1, #64 + 6848 0206 2846 mov r0, r5 + ARM GAS /tmp/ccuHnxNu.s page 505 - 6698 020e 3846 mov r0, r7 - 6699 0210 FFF7FEFF bl HAL_GPIO_WritePin - 6700 .LVL624: -2334:Src/main.c **** - 6701 .loc 1 2334 2 view .LVU2106 - 6702 0214 0122 movs r2, #1 - 6703 0216 1021 movs r1, #16 - 6704 0218 2846 mov r0, r5 - 6705 021a FFF7FEFF bl HAL_GPIO_WritePin - 6706 .LVL625: -2338:Src/main.c **** { - 6707 .loc 1 2338 2 view .LVU2107 -2338:Src/main.c **** { - 6708 .loc 1 2338 6 is_stmt 0 view .LVU2108 - 6709 021e 0121 movs r1, #1 - 6710 0220 3846 mov r0, r7 - 6711 0222 FFF7FEFF bl HAL_GPIO_ReadPin - 6712 .LVL626: -2338:Src/main.c **** { - 6713 .loc 1 2338 5 discriminator 1 view .LVU2109 - 6714 0226 50B1 cbz r0, .L327 - 6715 .L323: -2369:Src/main.c **** } - 6716 .loc 1 2369 2 is_stmt 1 view .LVU2110 - 6717 0228 FFF7FEFF bl AD9102_Init - 6718 .LVL627: -2370:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 6719 .loc 1 2370 1 is_stmt 0 view .LVU2111 - 6720 022c BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 6721 .LVL628: - 6722 .L326: - 6723 .LBB601: - 6724 .LBB600: + 6849 0208 FFF7FEFF bl HAL_GPIO_WritePin + 6850 .LVL626: +2351:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 6851 .loc 1 2351 2 view .LVU2147 + 6852 020c 0122 movs r2, #1 + 6853 020e 4FF48051 mov r1, #4096 + 6854 0212 3846 mov r0, r7 + 6855 0214 FFF7FEFF bl HAL_GPIO_WritePin + 6856 .LVL627: +2352:Src/main.c **** PA4_DAC_Set(0u, 0u); + 6857 .loc 1 2352 2 view .LVU2148 + 6858 0218 0122 movs r2, #1 + 6859 021a 4FF48071 mov r1, #256 + 6860 021e 3046 mov r0, r6 + 6861 0220 FFF7FEFF bl HAL_GPIO_WritePin + 6862 .LVL628: +2353:Src/main.c **** + 6863 .loc 1 2353 2 view .LVU2149 + 6864 0224 2146 mov r1, r4 + 6865 0226 2046 mov r0, r4 + 6866 0228 FFF7FEFF bl PA4_DAC_Set + 6867 .LVL629: +2357:Src/main.c **** { + 6868 .loc 1 2357 2 view .LVU2150 +2357:Src/main.c **** { + 6869 .loc 1 2357 6 is_stmt 0 view .LVU2151 + 6870 022c 0121 movs r1, #1 + 6871 022e 3846 mov r0, r7 + 6872 0230 FFF7FEFF bl HAL_GPIO_ReadPin + 6873 .LVL630: +2357:Src/main.c **** { + 6874 .loc 1 2357 5 discriminator 1 view .LVU2152 + 6875 0234 50B1 cbz r0, .L338 + 6876 .L334: +2388:Src/main.c **** } + 6877 .loc 1 2388 2 is_stmt 1 view .LVU2153 + 6878 0236 FFF7FEFF bl AD9102_Init + 6879 .LVL631: +2389:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 6880 .loc 1 2389 1 is_stmt 0 view .LVU2154 + 6881 023a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 6882 .LVL632: + 6883 .L337: + 6884 .LBB604: + 6885 .LBB603: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - 6725 .loc 6 1430 5 is_stmt 1 view .LVU2112 - 6726 0230 284B ldr r3, .L329+80 - 6727 .LVL629: + 6886 .loc 6 1430 5 is_stmt 1 view .LVU2155 + 6887 023e 294B ldr r3, .L340+80 + 6888 .LVL633: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - 6728 .loc 6 1430 5 is_stmt 0 view .LVU2113 - 6729 0232 C3F8C420 str r2, [r3, #196] + 6889 .loc 6 1430 5 is_stmt 0 view .LVU2156 + 6890 0240 C3F8C420 str r2, [r3, #196] 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6730 .loc 6 1431 5 is_stmt 1 view .LVU2114 - 6731 0236 294A ldr r2, .L329+88 - 6732 0238 C3F8C020 str r2, [r3, #192] - 6733 023c 80E7 b .L322 - 6734 .LVL630: - 6735 .L327: + 6891 .loc 6 1431 5 is_stmt 1 view .LVU2157 + 6892 0244 294A ldr r2, .L340+88 + 6893 0246 C3F8C020 str r2, [r3, #192] + 6894 024a 7AE7 b .L333 + ARM GAS /tmp/ccuHnxNu.s page 506 + + + 6895 .LVL634: + 6896 .L338: 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6736 .loc 6 1431 5 is_stmt 0 view .LVU2115 - 6737 .LBE600: - 6738 .LBE601: -2341:Src/main.c **** { - 6739 .loc 1 2341 3 is_stmt 1 view .LVU2116 -2341:Src/main.c **** { - 6740 .loc 1 2341 7 is_stmt 0 view .LVU2117 - 6741 023e 4FF48071 mov r1, #256 - 6742 0242 2846 mov r0, r5 - ARM GAS /tmp/ccEQxcUB.s page 502 + 6897 .loc 6 1431 5 is_stmt 0 view .LVU2158 + 6898 .LBE603: + 6899 .LBE604: +2360:Src/main.c **** { + 6900 .loc 1 2360 3 is_stmt 1 view .LVU2159 +2360:Src/main.c **** { + 6901 .loc 1 2360 7 is_stmt 0 view .LVU2160 + 6902 024c 4FF48071 mov r1, #256 + 6903 0250 2846 mov r0, r5 + 6904 0252 FFF7FEFF bl HAL_GPIO_ReadPin + 6905 .LVL635: +2360:Src/main.c **** { + 6906 .loc 1 2360 6 discriminator 1 view .LVU2161 + 6907 0256 0028 cmp r0, #0 + 6908 0258 EDD1 bne .L334 +2363:Src/main.c **** if (test == 0) //0 - suc + 6909 .loc 1 2363 4 is_stmt 1 view .LVU2162 +2363:Src/main.c **** if (test == 0) //0 - suc + 6910 .loc 1 2363 11 is_stmt 0 view .LVU2163 + 6911 025a 2A48 ldr r0, .L340+112 + 6912 025c FFF7FEFF bl Mount_SD + 6913 .LVL636: +2363:Src/main.c **** if (test == 0) //0 - suc + 6914 .loc 1 2363 9 discriminator 1 view .LVU2164 + 6915 0260 294B ldr r3, .L340+116 + 6916 0262 1860 str r0, [r3] +2364:Src/main.c **** { + 6917 .loc 1 2364 4 is_stmt 1 view .LVU2165 +2364:Src/main.c **** { + 6918 .loc 1 2364 7 is_stmt 0 view .LVU2166 + 6919 0264 18B1 cbz r0, .L339 + 6920 .L335: +2376:Src/main.c **** } + 6921 .loc 1 2376 4 is_stmt 1 view .LVU2167 +2376:Src/main.c **** } + 6922 .loc 1 2376 14 is_stmt 0 view .LVU2168 + 6923 0266 294B ldr r3, .L340+120 + 6924 0268 0122 movs r2, #1 + 6925 026a 1A70 strb r2, [r3] + 6926 026c E3E7 b .L334 + 6927 .L339: +2367:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6928 .loc 1 2367 5 is_stmt 1 view .LVU2169 +2367:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6929 .loc 1 2367 12 is_stmt 0 view .LVU2170 + 6930 026e 1E23 movs r3, #30 + 6931 0270 1A46 mov r2, r3 + 6932 0272 2749 ldr r1, .L340+124 + 6933 0274 2748 ldr r0, .L340+128 + 6934 0276 FFF7FEFF bl Seek_Read_File + 6935 .LVL637: +2367:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6936 .loc 1 2367 10 discriminator 1 view .LVU2171 + 6937 027a 234C ldr r4, .L340+116 + ARM GAS /tmp/ccuHnxNu.s page 507 - 6743 0244 FFF7FEFF bl HAL_GPIO_ReadPin - 6744 .LVL631: -2341:Src/main.c **** { - 6745 .loc 1 2341 6 discriminator 1 view .LVU2118 - 6746 0248 0028 cmp r0, #0 - 6747 024a EDD1 bne .L323 -2344:Src/main.c **** if (test == 0) //0 - suc - 6748 .loc 1 2344 4 is_stmt 1 view .LVU2119 -2344:Src/main.c **** if (test == 0) //0 - suc - 6749 .loc 1 2344 11 is_stmt 0 view .LVU2120 - 6750 024c 2A48 ldr r0, .L329+116 - 6751 024e FFF7FEFF bl Mount_SD - 6752 .LVL632: -2344:Src/main.c **** if (test == 0) //0 - suc - 6753 .loc 1 2344 9 discriminator 1 view .LVU2121 - 6754 0252 2A4B ldr r3, .L329+120 - 6755 0254 1860 str r0, [r3] -2345:Src/main.c **** { - 6756 .loc 1 2345 4 is_stmt 1 view .LVU2122 -2345:Src/main.c **** { - 6757 .loc 1 2345 7 is_stmt 0 view .LVU2123 - 6758 0256 18B1 cbz r0, .L328 - 6759 .L324: -2357:Src/main.c **** } - 6760 .loc 1 2357 4 is_stmt 1 view .LVU2124 -2357:Src/main.c **** } - 6761 .loc 1 2357 14 is_stmt 0 view .LVU2125 - 6762 0258 294B ldr r3, .L329+124 - 6763 025a 0122 movs r2, #1 - 6764 025c 1A70 strb r2, [r3] - 6765 025e E3E7 b .L323 - 6766 .L328: -2348:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6767 .loc 1 2348 5 is_stmt 1 view .LVU2126 -2348:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6768 .loc 1 2348 12 is_stmt 0 view .LVU2127 - 6769 0260 1E23 movs r3, #30 - 6770 0262 1A46 mov r2, r3 - 6771 0264 2749 ldr r1, .L329+128 - 6772 0266 2848 ldr r0, .L329+132 - 6773 0268 FFF7FEFF bl Seek_Read_File - 6774 .LVL633: -2348:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6775 .loc 1 2348 10 discriminator 1 view .LVU2128 - 6776 026c 234C ldr r4, .L329+120 - 6777 026e 2060 str r0, [r4] -2349:Src/main.c **** UART_rec_incr = 0; - 6778 .loc 1 2349 5 is_stmt 1 view .LVU2129 -2349:Src/main.c **** UART_rec_incr = 0; - 6779 .loc 1 2349 12 is_stmt 0 view .LVU2130 - 6780 0270 2148 ldr r0, .L329+116 - 6781 0272 FFF7FEFF bl Unmount_SD - 6782 .LVL634: -2349:Src/main.c **** UART_rec_incr = 0; - 6783 .loc 1 2349 10 discriminator 1 view .LVU2131 - 6784 0276 2060 str r0, [r4] -2350:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - ARM GAS /tmp/ccEQxcUB.s page 503 + 6938 027c 2060 str r0, [r4] +2368:Src/main.c **** UART_rec_incr = 0; + 6939 .loc 1 2368 5 is_stmt 1 view .LVU2172 +2368:Src/main.c **** UART_rec_incr = 0; + 6940 .loc 1 2368 12 is_stmt 0 view .LVU2173 + 6941 027e 2148 ldr r0, .L340+112 + 6942 0280 FFF7FEFF bl Unmount_SD + 6943 .LVL638: +2368:Src/main.c **** UART_rec_incr = 0; + 6944 .loc 1 2368 10 discriminator 1 view .LVU2174 + 6945 0284 2060 str r0, [r4] +2369:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 6946 .loc 1 2369 5 is_stmt 1 view .LVU2175 +2369:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 6947 .loc 1 2369 19 is_stmt 0 view .LVU2176 + 6948 0286 0023 movs r3, #0 + 6949 0288 084A ldr r2, .L340+24 + 6950 028a 1380 strh r3, [r2] @ movhi +2370:Src/main.c **** } + 6951 .loc 1 2370 5 is_stmt 1 view .LVU2177 +2370:Src/main.c **** } + 6952 .loc 1 2370 13 is_stmt 0 view .LVU2178 + 6953 028c 064A ldr r2, .L340+20 + 6954 028e 1370 strb r3, [r2] + 6955 0290 E9E7 b .L335 + 6956 .L341: + 6957 0292 00BF .align 2 + 6958 .L340: + 6959 0294 00000000 .word TO6 + 6960 0298 00000000 .word TO7 + 6961 029c 00000000 .word TO7_before + 6962 02a0 00000000 .word TO6_before + 6963 02a4 00000000 .word TO6_uart + 6964 02a8 00000000 .word flg_tmt + 6965 02ac 00000000 .word UART_rec_incr + 6966 02b0 00000000 .word fgoto + 6967 02b4 00000000 .word sizeoffile + 6968 02b8 00000000 .word u_tx_flg + 6969 02bc 00000000 .word u_rx_flg + 6970 02c0 00000000 .word Long_Data + 6971 02c4 00000000 .word Def_setup + 6972 02c8 00000000 .word LD1_def_setup + 6973 02cc 00000000 .word LD2_def_setup + 6974 02d0 00000000 .word Curr_setup + 6975 02d4 00000000 .word LD1_curr_setup + 6976 02d8 00000000 .word LD2_curr_setup + 6977 02dc 00100040 .word 1073745920 + 6978 02e0 00100140 .word 1073811456 + 6979 02e4 00640240 .word 1073898496 + 6980 02e8 00000000 .word UART_DATA + 6981 02ec 28100140 .word 1073811496 + 6982 02f0 00000000 .word SD_SEEK + 6983 02f4 00000000 .word SD_SLIDE + 6984 02f8 00080240 .word 1073874944 + 6985 02fc 000C0240 .word 1073875968 + 6986 0300 00000240 .word 1073872896 + 6987 0304 00000000 .word .LC0 + ARM GAS /tmp/ccuHnxNu.s page 508 - 6785 .loc 1 2350 5 is_stmt 1 view .LVU2132 -2350:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 6786 .loc 1 2350 19 is_stmt 0 view .LVU2133 - 6787 0278 0023 movs r3, #0 - 6788 027a 084A ldr r2, .L329+24 - 6789 027c 1380 strh r3, [r2] @ movhi -2351:Src/main.c **** } - 6790 .loc 1 2351 5 is_stmt 1 view .LVU2134 -2351:Src/main.c **** } - 6791 .loc 1 2351 13 is_stmt 0 view .LVU2135 - 6792 027e 064A ldr r2, .L329+20 - 6793 0280 1370 strb r3, [r2] - 6794 0282 E9E7 b .L324 - 6795 .L330: - 6796 .align 2 - 6797 .L329: - 6798 0284 00000000 .word TO6 - 6799 0288 00000000 .word TO7 - 6800 028c 00000000 .word TO7_before - 6801 0290 00000000 .word TO6_before - 6802 0294 00000000 .word TO6_uart - 6803 0298 00000000 .word flg_tmt - 6804 029c 00000000 .word UART_rec_incr - 6805 02a0 00000000 .word fgoto - 6806 02a4 00000000 .word sizeoffile - 6807 02a8 00000000 .word u_tx_flg - 6808 02ac 00000000 .word u_rx_flg - 6809 02b0 00000000 .word Long_Data - 6810 02b4 00000000 .word Def_setup - 6811 02b8 00000000 .word LD1_def_setup - 6812 02bc 00000000 .word LD2_def_setup - 6813 02c0 00000000 .word Curr_setup - 6814 02c4 00000000 .word LD1_curr_setup - 6815 02c8 00000000 .word LD2_curr_setup - 6816 02cc 00100040 .word 1073745920 - 6817 02d0 00100140 .word 1073811456 - 6818 02d4 00640240 .word 1073898496 - 6819 02d8 00000000 .word UART_DATA - 6820 02dc 28100140 .word 1073811496 - 6821 02e0 00000000 .word SD_SEEK - 6822 02e4 00000000 .word SD_SLIDE - 6823 02e8 00080240 .word 1073874944 - 6824 02ec 000C0240 .word 1073875968 - 6825 02f0 00000240 .word 1073872896 - 6826 02f4 00140240 .word 1073878016 - 6827 02f8 00000000 .word .LC0 - 6828 02fc 00000000 .word test - 6829 0300 00000000 .word CPU_state - 6830 0304 00000000 .word COMMAND - 6831 0308 04000000 .word .LC1 - 6832 030c 00040240 .word 1073873920 - 6833 .cfi_endproc - 6834 .LFE1208: - 6836 .section .text.DS1809_Pulse,"ax",%progbits - 6837 .align 1 - 6838 .syntax unified - 6839 .thumb - ARM GAS /tmp/ccEQxcUB.s page 504 + 6988 0308 00000000 .word test + 6989 030c 00000000 .word CPU_state + 6990 0310 00000000 .word COMMAND + 6991 0314 04000000 .word .LC1 + 6992 0318 00040240 .word 1073873920 + 6993 031c 00140240 .word 1073878016 + 6994 .cfi_endproc + 6995 .LFE1208: + 6997 .section .text.DS1809_Pulse,"ax",%progbits + 6998 .align 1 + 6999 .syntax unified + 7000 .thumb + 7001 .thumb_func + 7003 DS1809_Pulse: + 7004 .LVL639: + 7005 .LFB1218: +2755:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 7006 .loc 1 2755 1 is_stmt 1 view -0 + 7007 .cfi_startproc + 7008 @ args = 0, pretend = 0, frame = 0 + 7009 @ frame_needed = 0, uses_anonymous_args = 0 +2755:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 7010 .loc 1 2755 1 is_stmt 0 view .LVU2180 + 7011 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 7012 .LCFI68: + 7013 .cfi_def_cfa_offset 24 + 7014 .cfi_offset 4, -24 + 7015 .cfi_offset 5, -20 + 7016 .cfi_offset 6, -16 + 7017 .cfi_offset 7, -12 + 7018 .cfi_offset 8, -8 + 7019 .cfi_offset 14, -4 + 7020 0004 0746 mov r7, r0 + 7021 0006 0E46 mov r6, r1 + 7022 0008 9046 mov r8, r2 + 7023 000a 1D46 mov r5, r3 +2756:Src/main.c **** { + 7024 .loc 1 2756 2 is_stmt 1 view .LVU2181 + 7025 .LBB605: +2756:Src/main.c **** { + 7026 .loc 1 2756 7 view .LVU2182 + 7027 .LVL640: +2756:Src/main.c **** { + 7028 .loc 1 2756 16 is_stmt 0 view .LVU2183 + 7029 000c 0024 movs r4, #0 +2756:Src/main.c **** { + 7030 .loc 1 2756 2 view .LVU2184 + 7031 000e 16E0 b .L343 + 7032 .LVL641: + 7033 .L351: +2760:Src/main.c **** } + 7034 .loc 1 2760 4 is_stmt 1 view .LVU2185 + 7035 0010 0022 movs r2, #0 + 7036 0012 0421 movs r1, #4 + 7037 0014 1448 ldr r0, .L354 + 7038 0016 FFF7FEFF bl HAL_GPIO_WritePin + 7039 .LVL642: + ARM GAS /tmp/ccuHnxNu.s page 509 - 6840 .thumb_func - 6842 DS1809_Pulse: - 6843 .LVL635: - 6844 .LFB1216: -2700:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 6845 .loc 1 2700 1 is_stmt 1 view -0 - 6846 .cfi_startproc - 6847 @ args = 0, pretend = 0, frame = 0 - 6848 @ frame_needed = 0, uses_anonymous_args = 0 -2700:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 6849 .loc 1 2700 1 is_stmt 0 view .LVU2137 - 6850 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 6851 .LCFI65: - 6852 .cfi_def_cfa_offset 24 - 6853 .cfi_offset 4, -24 - 6854 .cfi_offset 5, -20 - 6855 .cfi_offset 6, -16 - 6856 .cfi_offset 7, -12 - 6857 .cfi_offset 8, -8 - 6858 .cfi_offset 14, -4 - 6859 0004 0746 mov r7, r0 - 6860 0006 0E46 mov r6, r1 - 6861 0008 9046 mov r8, r2 - 6862 000a 1D46 mov r5, r3 -2701:Src/main.c **** { - 6863 .loc 1 2701 2 is_stmt 1 view .LVU2138 - 6864 .LBB602: -2701:Src/main.c **** { - 6865 .loc 1 2701 7 view .LVU2139 - 6866 .LVL636: -2701:Src/main.c **** { - 6867 .loc 1 2701 16 is_stmt 0 view .LVU2140 - 6868 000c 0024 movs r4, #0 -2701:Src/main.c **** { - 6869 .loc 1 2701 2 view .LVU2141 - 6870 000e 16E0 b .L332 - 6871 .LVL637: - 6872 .L340: -2705:Src/main.c **** } - 6873 .loc 1 2705 4 is_stmt 1 view .LVU2142 - 6874 0010 0022 movs r2, #0 - 6875 0012 0421 movs r1, #4 - 6876 0014 1448 ldr r0, .L343 - 6877 0016 FFF7FEFF bl HAL_GPIO_WritePin - 6878 .LVL638: - 6879 001a 14E0 b .L333 - 6880 .L341: -2709:Src/main.c **** } - 6881 .loc 1 2709 4 view .LVU2143 - 6882 001c 0022 movs r2, #0 - 6883 001e 0821 movs r1, #8 - 6884 0020 1148 ldr r0, .L343 - 6885 0022 FFF7FEFF bl HAL_GPIO_WritePin - 6886 .LVL639: - 6887 0026 10E0 b .L334 - 6888 .L342: -2714:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 505 + 7040 001a 14E0 b .L344 + 7041 .L352: +2764:Src/main.c **** } + 7042 .loc 1 2764 4 view .LVU2186 + 7043 001c 0022 movs r2, #0 + 7044 001e 0821 movs r1, #8 + 7045 0020 1148 ldr r0, .L354 + 7046 0022 FFF7FEFF bl HAL_GPIO_WritePin + 7047 .LVL643: + 7048 0026 10E0 b .L345 + 7049 .L353: +2769:Src/main.c **** } + 7050 .loc 1 2769 4 view .LVU2187 + 7051 0028 0122 movs r2, #1 + 7052 002a 0421 movs r1, #4 + 7053 002c 0E48 ldr r0, .L354 + 7054 002e FFF7FEFF bl HAL_GPIO_WritePin + 7055 .LVL644: + 7056 0032 0FE0 b .L346 + 7057 .L347: +2775:Src/main.c **** } + 7058 .loc 1 2775 3 view .LVU2188 + 7059 0034 2846 mov r0, r5 + 7060 0036 FFF7FEFF bl HAL_Delay + 7061 .LVL645: +2756:Src/main.c **** { + 7062 .loc 1 2756 35 discriminator 2 view .LVU2189 + 7063 003a 0134 adds r4, r4, #1 + 7064 .LVL646: +2756:Src/main.c **** { + 7065 .loc 1 2756 35 is_stmt 0 discriminator 2 view .LVU2190 + 7066 003c A4B2 uxth r4, r4 + 7067 .LVL647: + 7068 .L343: +2756:Src/main.c **** { + 7069 .loc 1 2756 25 is_stmt 1 discriminator 1 view .LVU2191 + 7070 003e 4445 cmp r4, r8 + 7071 0040 10D2 bcs .L350 +2758:Src/main.c **** { + 7072 .loc 1 2758 3 view .LVU2192 +2758:Src/main.c **** { + 7073 .loc 1 2758 6 is_stmt 0 view .LVU2193 + 7074 0042 002F cmp r7, #0 + 7075 0044 E4D1 bne .L351 + 7076 .L344: +2762:Src/main.c **** { + 7077 .loc 1 2762 3 is_stmt 1 view .LVU2194 +2762:Src/main.c **** { + 7078 .loc 1 2762 6 is_stmt 0 view .LVU2195 + 7079 0046 002E cmp r6, #0 + 7080 0048 E8D1 bne .L352 + 7081 .L345: +2766:Src/main.c **** if (uc) + 7082 .loc 1 2766 3 is_stmt 1 view .LVU2196 + 7083 004a 2846 mov r0, r5 + 7084 004c FFF7FEFF bl HAL_Delay + 7085 .LVL648: + ARM GAS /tmp/ccuHnxNu.s page 510 - 6889 .loc 1 2714 4 view .LVU2144 - 6890 0028 0122 movs r2, #1 - 6891 002a 0421 movs r1, #4 - 6892 002c 0E48 ldr r0, .L343 - 6893 002e FFF7FEFF bl HAL_GPIO_WritePin - 6894 .LVL640: - 6895 0032 0FE0 b .L335 - 6896 .L336: -2720:Src/main.c **** } - 6897 .loc 1 2720 3 view .LVU2145 - 6898 0034 2846 mov r0, r5 - 6899 0036 FFF7FEFF bl HAL_Delay - 6900 .LVL641: -2701:Src/main.c **** { - 6901 .loc 1 2701 35 discriminator 2 view .LVU2146 - 6902 003a 0134 adds r4, r4, #1 - 6903 .LVL642: -2701:Src/main.c **** { - 6904 .loc 1 2701 35 is_stmt 0 discriminator 2 view .LVU2147 - 6905 003c A4B2 uxth r4, r4 - 6906 .LVL643: - 6907 .L332: -2701:Src/main.c **** { - 6908 .loc 1 2701 25 is_stmt 1 discriminator 1 view .LVU2148 - 6909 003e 4445 cmp r4, r8 - 6910 0040 10D2 bcs .L339 -2703:Src/main.c **** { - 6911 .loc 1 2703 3 view .LVU2149 -2703:Src/main.c **** { - 6912 .loc 1 2703 6 is_stmt 0 view .LVU2150 - 6913 0042 002F cmp r7, #0 - 6914 0044 E4D1 bne .L340 - 6915 .L333: -2707:Src/main.c **** { - 6916 .loc 1 2707 3 is_stmt 1 view .LVU2151 -2707:Src/main.c **** { - 6917 .loc 1 2707 6 is_stmt 0 view .LVU2152 - 6918 0046 002E cmp r6, #0 - 6919 0048 E8D1 bne .L341 - 6920 .L334: -2711:Src/main.c **** if (uc) - 6921 .loc 1 2711 3 is_stmt 1 view .LVU2153 - 6922 004a 2846 mov r0, r5 - 6923 004c FFF7FEFF bl HAL_Delay - 6924 .LVL644: -2712:Src/main.c **** { - 6925 .loc 1 2712 3 view .LVU2154 -2712:Src/main.c **** { - 6926 .loc 1 2712 6 is_stmt 0 view .LVU2155 - 6927 0050 002F cmp r7, #0 - 6928 0052 E9D1 bne .L342 - 6929 .L335: -2716:Src/main.c **** { - 6930 .loc 1 2716 3 is_stmt 1 view .LVU2156 -2716:Src/main.c **** { - 6931 .loc 1 2716 6 is_stmt 0 view .LVU2157 - 6932 0054 002E cmp r6, #0 - ARM GAS /tmp/ccEQxcUB.s page 506 +2767:Src/main.c **** { + 7086 .loc 1 2767 3 view .LVU2197 +2767:Src/main.c **** { + 7087 .loc 1 2767 6 is_stmt 0 view .LVU2198 + 7088 0050 002F cmp r7, #0 + 7089 0052 E9D1 bne .L353 + 7090 .L346: +2771:Src/main.c **** { + 7091 .loc 1 2771 3 is_stmt 1 view .LVU2199 +2771:Src/main.c **** { + 7092 .loc 1 2771 6 is_stmt 0 view .LVU2200 + 7093 0054 002E cmp r6, #0 + 7094 0056 EDD0 beq .L347 +2773:Src/main.c **** } + 7095 .loc 1 2773 4 is_stmt 1 view .LVU2201 + 7096 0058 0122 movs r2, #1 + 7097 005a 0821 movs r1, #8 + 7098 005c 0248 ldr r0, .L354 + 7099 005e FFF7FEFF bl HAL_GPIO_WritePin + 7100 .LVL649: + 7101 0062 E7E7 b .L347 + 7102 .L350: +2773:Src/main.c **** } + 7103 .loc 1 2773 4 is_stmt 0 view .LVU2202 + 7104 .LBE605: +2777:Src/main.c **** + 7105 .loc 1 2777 1 view .LVU2203 + 7106 0064 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 7107 .LVL650: + 7108 .L355: +2777:Src/main.c **** + 7109 .loc 1 2777 1 view .LVU2204 + 7110 .align 2 + 7111 .L354: + 7112 0068 00100240 .word 1073876992 + 7113 .cfi_endproc + 7114 .LFE1218: + 7116 .section .text.Get_ADC,"ax",%progbits + 7117 .align 1 + 7118 .syntax unified + 7119 .thumb + 7120 .thumb_func + 7122 Get_ADC: + 7123 .LVL651: + 7124 .LFB1229: +3417:Src/main.c **** uint16_t OUT; + 7125 .loc 1 3417 1 is_stmt 1 view -0 + 7126 .cfi_startproc + 7127 @ args = 0, pretend = 0, frame = 0 + 7128 @ frame_needed = 0, uses_anonymous_args = 0 +3417:Src/main.c **** uint16_t OUT; + 7129 .loc 1 3417 1 is_stmt 0 view .LVU2206 + 7130 0000 10B5 push {r4, lr} + 7131 .LCFI69: + 7132 .cfi_def_cfa_offset 8 + 7133 .cfi_offset 4, -8 + 7134 .cfi_offset 14, -4 + ARM GAS /tmp/ccuHnxNu.s page 511 - 6933 0056 EDD0 beq .L336 -2718:Src/main.c **** } - 6934 .loc 1 2718 4 is_stmt 1 view .LVU2158 - 6935 0058 0122 movs r2, #1 - 6936 005a 0821 movs r1, #8 - 6937 005c 0248 ldr r0, .L343 - 6938 005e FFF7FEFF bl HAL_GPIO_WritePin - 6939 .LVL645: - 6940 0062 E7E7 b .L336 - 6941 .L339: -2718:Src/main.c **** } - 6942 .loc 1 2718 4 is_stmt 0 view .LVU2159 - 6943 .LBE602: -2722:Src/main.c **** - 6944 .loc 1 2722 1 view .LVU2160 - 6945 0064 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 6946 .LVL646: - 6947 .L344: -2722:Src/main.c **** - 6948 .loc 1 2722 1 view .LVU2161 - 6949 .align 2 - 6950 .L343: - 6951 0068 00100240 .word 1073876992 - 6952 .cfi_endproc - 6953 .LFE1216: - 6955 .section .text.Get_ADC,"ax",%progbits - 6956 .align 1 - 6957 .syntax unified - 6958 .thumb - 6959 .thumb_func - 6961 Get_ADC: - 6962 .LVL647: - 6963 .LFB1227: -3362:Src/main.c **** uint16_t OUT; - 6964 .loc 1 3362 1 is_stmt 1 view -0 - 6965 .cfi_startproc - 6966 @ args = 0, pretend = 0, frame = 0 - 6967 @ frame_needed = 0, uses_anonymous_args = 0 -3362:Src/main.c **** uint16_t OUT; - 6968 .loc 1 3362 1 is_stmt 0 view .LVU2163 - 6969 0000 10B5 push {r4, lr} - 6970 .LCFI66: - 6971 .cfi_def_cfa_offset 8 - 6972 .cfi_offset 4, -8 - 6973 .cfi_offset 14, -4 - 6974 0002 0024 movs r4, #0 -3363:Src/main.c **** switch (num) - 6975 .loc 1 3363 2 is_stmt 1 view .LVU2164 -3364:Src/main.c **** { - 6976 .loc 1 3364 2 view .LVU2165 - 6977 0004 0528 cmp r0, #5 - 6978 0006 2CD8 bhi .L354 - 6979 0008 DFE800F0 tbb [pc, r0] - 6980 .L348: - 6981 000c 03 .byte (.L353-.L348)/2 - 6982 000d 08 .byte (.L352-.L348)/2 - 6983 000e 12 .byte (.L351-.L348)/2 - ARM GAS /tmp/ccEQxcUB.s page 507 + 7135 0002 0024 movs r4, #0 +3418:Src/main.c **** switch (num) + 7136 .loc 1 3418 2 is_stmt 1 view .LVU2207 +3419:Src/main.c **** { + 7137 .loc 1 3419 2 view .LVU2208 + 7138 0004 0528 cmp r0, #5 + 7139 0006 2CD8 bhi .L365 + 7140 0008 DFE800F0 tbb [pc, r0] + 7141 .L359: + 7142 000c 03 .byte (.L364-.L359)/2 + 7143 000d 08 .byte (.L363-.L359)/2 + 7144 000e 12 .byte (.L362-.L359)/2 + 7145 000f 17 .byte (.L361-.L359)/2 + 7146 0010 1C .byte (.L360-.L359)/2 + 7147 0011 26 .byte (.L358-.L359)/2 + 7148 .p2align 1 + 7149 .L364: +3422:Src/main.c **** break; + 7150 .loc 1 3422 5 view .LVU2209 + 7151 0012 1548 ldr r0, .L367 + 7152 .LVL652: +3422:Src/main.c **** break; + 7153 .loc 1 3422 5 is_stmt 0 view .LVU2210 + 7154 0014 FFF7FEFF bl HAL_ADC_Start + 7155 .LVL653: +3423:Src/main.c **** case 1: + 7156 .loc 1 3423 4 is_stmt 1 view .LVU2211 + 7157 0018 2046 mov r0, r4 + 7158 .L357: + 7159 .LVL654: +3442:Src/main.c **** } + 7160 .loc 1 3442 2 view .LVU2212 +3443:Src/main.c **** + 7161 .loc 1 3443 1 is_stmt 0 view .LVU2213 + 7162 001a 10BD pop {r4, pc} + 7163 .LVL655: + 7164 .L363: +3425:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 7165 .loc 1 3425 5 is_stmt 1 view .LVU2214 + 7166 001c 124C ldr r4, .L367 + 7167 001e 6421 movs r1, #100 + 7168 0020 2046 mov r0, r4 + 7169 .LVL656: +3425:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 7170 .loc 1 3425 5 is_stmt 0 view .LVU2215 + 7171 0022 FFF7FEFF bl HAL_ADC_PollForConversion + 7172 .LVL657: +3426:Src/main.c **** break; + 7173 .loc 1 3426 9 is_stmt 1 view .LVU2216 +3426:Src/main.c **** break; + 7174 .loc 1 3426 15 is_stmt 0 view .LVU2217 + 7175 0026 2046 mov r0, r4 + 7176 0028 FFF7FEFF bl HAL_ADC_GetValue + 7177 .LVL658: +3426:Src/main.c **** break; + 7178 .loc 1 3426 13 discriminator 1 view .LVU2218 + 7179 002c 80B2 uxth r0, r0 + ARM GAS /tmp/ccuHnxNu.s page 512 - 6984 000f 17 .byte (.L350-.L348)/2 - 6985 0010 1C .byte (.L349-.L348)/2 - 6986 0011 26 .byte (.L347-.L348)/2 - 6987 .p2align 1 - 6988 .L353: -3367:Src/main.c **** break; - 6989 .loc 1 3367 5 view .LVU2166 - 6990 0012 1548 ldr r0, .L356 - 6991 .LVL648: -3367:Src/main.c **** break; - 6992 .loc 1 3367 5 is_stmt 0 view .LVU2167 - 6993 0014 FFF7FEFF bl HAL_ADC_Start - 6994 .LVL649: -3368:Src/main.c **** case 1: - 6995 .loc 1 3368 4 is_stmt 1 view .LVU2168 - 6996 0018 2046 mov r0, r4 - 6997 .L346: - 6998 .LVL650: -3387:Src/main.c **** } - 6999 .loc 1 3387 2 view .LVU2169 -3388:Src/main.c **** - 7000 .loc 1 3388 1 is_stmt 0 view .LVU2170 - 7001 001a 10BD pop {r4, pc} - 7002 .LVL651: - 7003 .L352: -3370:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 7004 .loc 1 3370 5 is_stmt 1 view .LVU2171 - 7005 001c 124C ldr r4, .L356 - 7006 001e 6421 movs r1, #100 - 7007 0020 2046 mov r0, r4 - 7008 .LVL652: -3370:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 7009 .loc 1 3370 5 is_stmt 0 view .LVU2172 - 7010 0022 FFF7FEFF bl HAL_ADC_PollForConversion - 7011 .LVL653: -3371:Src/main.c **** break; - 7012 .loc 1 3371 9 is_stmt 1 view .LVU2173 -3371:Src/main.c **** break; - 7013 .loc 1 3371 15 is_stmt 0 view .LVU2174 - 7014 0026 2046 mov r0, r4 - 7015 0028 FFF7FEFF bl HAL_ADC_GetValue - 7016 .LVL654: -3371:Src/main.c **** break; - 7017 .loc 1 3371 13 discriminator 1 view .LVU2175 - 7018 002c 80B2 uxth r0, r0 - 7019 .LVL655: -3372:Src/main.c **** case 2: - 7020 .loc 1 3372 4 is_stmt 1 view .LVU2176 - 7021 002e F4E7 b .L346 - 7022 .LVL656: - 7023 .L351: -3374:Src/main.c **** break; - 7024 .loc 1 3374 5 view .LVU2177 - 7025 0030 0D48 ldr r0, .L356 - 7026 .LVL657: -3374:Src/main.c **** break; - 7027 .loc 1 3374 5 is_stmt 0 view .LVU2178 - ARM GAS /tmp/ccEQxcUB.s page 508 + 7180 .LVL659: +3427:Src/main.c **** case 2: + 7181 .loc 1 3427 4 is_stmt 1 view .LVU2219 + 7182 002e F4E7 b .L357 + 7183 .LVL660: + 7184 .L362: +3429:Src/main.c **** break; + 7185 .loc 1 3429 5 view .LVU2220 + 7186 0030 0D48 ldr r0, .L367 + 7187 .LVL661: +3429:Src/main.c **** break; + 7188 .loc 1 3429 5 is_stmt 0 view .LVU2221 + 7189 0032 FFF7FEFF bl HAL_ADC_Stop + 7190 .LVL662: +3430:Src/main.c **** case 3: + 7191 .loc 1 3430 4 is_stmt 1 view .LVU2222 + 7192 0036 2046 mov r0, r4 + 7193 0038 EFE7 b .L357 + 7194 .LVL663: + 7195 .L361: +3432:Src/main.c **** break; + 7196 .loc 1 3432 5 view .LVU2223 + 7197 003a 0C48 ldr r0, .L367+4 + 7198 .LVL664: +3432:Src/main.c **** break; + 7199 .loc 1 3432 5 is_stmt 0 view .LVU2224 + 7200 003c FFF7FEFF bl HAL_ADC_Start + 7201 .LVL665: +3433:Src/main.c **** case 4: + 7202 .loc 1 3433 4 is_stmt 1 view .LVU2225 + 7203 0040 2046 mov r0, r4 + 7204 0042 EAE7 b .L357 + 7205 .LVL666: + 7206 .L360: +3435:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 7207 .loc 1 3435 5 view .LVU2226 + 7208 0044 094C ldr r4, .L367+4 + 7209 0046 6421 movs r1, #100 + 7210 0048 2046 mov r0, r4 + 7211 .LVL667: +3435:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 7212 .loc 1 3435 5 is_stmt 0 view .LVU2227 + 7213 004a FFF7FEFF bl HAL_ADC_PollForConversion + 7214 .LVL668: +3436:Src/main.c **** break; + 7215 .loc 1 3436 9 is_stmt 1 view .LVU2228 +3436:Src/main.c **** break; + 7216 .loc 1 3436 15 is_stmt 0 view .LVU2229 + 7217 004e 2046 mov r0, r4 + 7218 0050 FFF7FEFF bl HAL_ADC_GetValue + 7219 .LVL669: +3436:Src/main.c **** break; + 7220 .loc 1 3436 13 discriminator 1 view .LVU2230 + 7221 0054 80B2 uxth r0, r0 + 7222 .LVL670: +3437:Src/main.c **** case 5: + 7223 .loc 1 3437 4 is_stmt 1 view .LVU2231 + ARM GAS /tmp/ccuHnxNu.s page 513 - 7028 0032 FFF7FEFF bl HAL_ADC_Stop - 7029 .LVL658: -3375:Src/main.c **** case 3: - 7030 .loc 1 3375 4 is_stmt 1 view .LVU2179 - 7031 0036 2046 mov r0, r4 - 7032 0038 EFE7 b .L346 - 7033 .LVL659: - 7034 .L350: -3377:Src/main.c **** break; - 7035 .loc 1 3377 5 view .LVU2180 - 7036 003a 0C48 ldr r0, .L356+4 - 7037 .LVL660: -3377:Src/main.c **** break; - 7038 .loc 1 3377 5 is_stmt 0 view .LVU2181 - 7039 003c FFF7FEFF bl HAL_ADC_Start - 7040 .LVL661: -3378:Src/main.c **** case 4: - 7041 .loc 1 3378 4 is_stmt 1 view .LVU2182 - 7042 0040 2046 mov r0, r4 - 7043 0042 EAE7 b .L346 - 7044 .LVL662: - 7045 .L349: -3380:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 7046 .loc 1 3380 5 view .LVU2183 - 7047 0044 094C ldr r4, .L356+4 - 7048 0046 6421 movs r1, #100 - 7049 0048 2046 mov r0, r4 - 7050 .LVL663: -3380:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 7051 .loc 1 3380 5 is_stmt 0 view .LVU2184 - 7052 004a FFF7FEFF bl HAL_ADC_PollForConversion - 7053 .LVL664: -3381:Src/main.c **** break; - 7054 .loc 1 3381 9 is_stmt 1 view .LVU2185 -3381:Src/main.c **** break; - 7055 .loc 1 3381 15 is_stmt 0 view .LVU2186 - 7056 004e 2046 mov r0, r4 - 7057 0050 FFF7FEFF bl HAL_ADC_GetValue - 7058 .LVL665: -3381:Src/main.c **** break; - 7059 .loc 1 3381 13 discriminator 1 view .LVU2187 - 7060 0054 80B2 uxth r0, r0 - 7061 .LVL666: -3382:Src/main.c **** case 5: - 7062 .loc 1 3382 4 is_stmt 1 view .LVU2188 - 7063 0056 E0E7 b .L346 - 7064 .LVL667: - 7065 .L347: -3384:Src/main.c **** break; - 7066 .loc 1 3384 9 view .LVU2189 - 7067 0058 0448 ldr r0, .L356+4 - 7068 .LVL668: -3384:Src/main.c **** break; - 7069 .loc 1 3384 9 is_stmt 0 view .LVU2190 - 7070 005a FFF7FEFF bl HAL_ADC_Stop - 7071 .LVL669: -3385:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 509 + 7224 0056 E0E7 b .L357 + 7225 .LVL671: + 7226 .L358: +3439:Src/main.c **** break; + 7227 .loc 1 3439 9 view .LVU2232 + 7228 0058 0448 ldr r0, .L367+4 + 7229 .LVL672: +3439:Src/main.c **** break; + 7230 .loc 1 3439 9 is_stmt 0 view .LVU2233 + 7231 005a FFF7FEFF bl HAL_ADC_Stop + 7232 .LVL673: +3440:Src/main.c **** } + 7233 .loc 1 3440 4 is_stmt 1 view .LVU2234 + 7234 005e 2046 mov r0, r4 + 7235 0060 DBE7 b .L357 + 7236 .LVL674: + 7237 .L365: +3419:Src/main.c **** { + 7238 .loc 1 3419 2 is_stmt 0 view .LVU2235 + 7239 0062 2046 mov r0, r4 + 7240 .LVL675: +3419:Src/main.c **** { + 7241 .loc 1 3419 2 view .LVU2236 + 7242 0064 D9E7 b .L357 + 7243 .L368: + 7244 0066 00BF .align 2 + 7245 .L367: + 7246 0068 00000000 .word hadc1 + 7247 006c 00000000 .word hadc3 + 7248 .cfi_endproc + 7249 .LFE1229: + 7251 .section .text.Set_LTEC,"ax",%progbits + 7252 .align 1 + 7253 .global Set_LTEC + 7254 .syntax unified + 7255 .thumb + 7256 .thumb_func + 7258 Set_LTEC: + 7259 .LVL676: + 7260 .LFB1227: +3239:Src/main.c **** uint32_t tmp32; + 7261 .loc 1 3239 1 is_stmt 1 view -0 + 7262 .cfi_startproc + 7263 @ args = 0, pretend = 0, frame = 0 + 7264 @ frame_needed = 0, uses_anonymous_args = 0 +3239:Src/main.c **** uint32_t tmp32; + 7265 .loc 1 3239 1 is_stmt 0 view .LVU2238 + 7266 0000 38B5 push {r3, r4, r5, lr} + 7267 .LCFI70: + 7268 .cfi_def_cfa_offset 16 + 7269 .cfi_offset 3, -16 + 7270 .cfi_offset 4, -12 + 7271 .cfi_offset 5, -8 + 7272 .cfi_offset 14, -4 + 7273 0002 0446 mov r4, r0 + 7274 0004 0D46 mov r5, r1 +3240:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 514 - 7072 .loc 1 3385 4 is_stmt 1 view .LVU2191 - 7073 005e 2046 mov r0, r4 - 7074 0060 DBE7 b .L346 - 7075 .LVL670: - 7076 .L354: -3364:Src/main.c **** { - 7077 .loc 1 3364 2 is_stmt 0 view .LVU2192 - 7078 0062 2046 mov r0, r4 - 7079 .LVL671: -3364:Src/main.c **** { - 7080 .loc 1 3364 2 view .LVU2193 - 7081 0064 D9E7 b .L346 - 7082 .L357: - 7083 0066 00BF .align 2 - 7084 .L356: - 7085 0068 00000000 .word hadc1 - 7086 006c 00000000 .word hadc3 - 7087 .cfi_endproc - 7088 .LFE1227: - 7090 .section .text.Set_LTEC,"ax",%progbits - 7091 .align 1 - 7092 .global Set_LTEC - 7093 .syntax unified - 7094 .thumb - 7095 .thumb_func - 7097 Set_LTEC: - 7098 .LVL672: - 7099 .LFB1225: -3184:Src/main.c **** uint32_t tmp32; - 7100 .loc 1 3184 1 is_stmt 1 view -0 - 7101 .cfi_startproc - 7102 @ args = 0, pretend = 0, frame = 0 - 7103 @ frame_needed = 0, uses_anonymous_args = 0 -3184:Src/main.c **** uint32_t tmp32; - 7104 .loc 1 3184 1 is_stmt 0 view .LVU2195 - 7105 0000 38B5 push {r3, r4, r5, lr} - 7106 .LCFI67: - 7107 .cfi_def_cfa_offset 16 - 7108 .cfi_offset 3, -16 - 7109 .cfi_offset 4, -12 - 7110 .cfi_offset 5, -8 - 7111 .cfi_offset 14, -4 - 7112 0002 0446 mov r4, r0 - 7113 0004 0D46 mov r5, r1 -3185:Src/main.c **** - 7114 .loc 1 3185 2 is_stmt 1 view .LVU2196 -3187:Src/main.c **** { - 7115 .loc 1 3187 2 view .LVU2197 -3187:Src/main.c **** { - 7116 .loc 1 3187 5 is_stmt 0 view .LVU2198 - 7117 0006 0328 cmp r0, #3 - 7118 0008 18BF it ne - 7119 000a 0128 cmpne r0, #1 - 7120 000c 06D0 beq .L392 - 7121 .LVL673: - 7122 .L359: -3193:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 510 + 7275 .loc 1 3240 2 is_stmt 1 view .LVU2239 +3242:Src/main.c **** { + 7276 .loc 1 3242 2 view .LVU2240 +3242:Src/main.c **** { + 7277 .loc 1 3242 5 is_stmt 0 view .LVU2241 + 7278 0006 0328 cmp r0, #3 + 7279 0008 18BF it ne + 7280 000a 0128 cmpne r0, #1 + 7281 000c 06D0 beq .L403 + 7282 .LVL677: + 7283 .L370: +3248:Src/main.c **** { + 7284 .loc 1 3248 2 is_stmt 1 view .LVU2242 + 7285 000e 013C subs r4, r4, #1 + 7286 .LVL678: +3248:Src/main.c **** { + 7287 .loc 1 3248 2 is_stmt 0 view .LVU2243 + 7288 0010 032C cmp r4, #3 + 7289 0012 2ED8 bhi .L371 + 7290 0014 DFE804F0 tbb [pc, r4] + 7291 .L373: + 7292 0018 0D .byte (.L376-.L373)/2 + 7293 0019 45 .byte (.L375-.L373)/2 + 7294 001a 65 .byte (.L374-.L373)/2 + 7295 001b 86 .byte (.L372-.L373)/2 + 7296 .LVL679: + 7297 .p2align 1 + 7298 .L403: +3244:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 7299 .loc 1 3244 3 is_stmt 1 view .LVU2244 + 7300 001c 0121 movs r1, #1 + 7301 .LVL680: +3244:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 7302 .loc 1 3244 3 is_stmt 0 view .LVU2245 + 7303 001e 0220 movs r0, #2 + 7304 .LVL681: +3244:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 7305 .loc 1 3244 3 view .LVU2246 + 7306 0020 FFF7FEFF bl SPI2_SetMode + 7307 .LVL682: +3245:Src/main.c **** } + 7308 .loc 1 3245 3 is_stmt 1 view .LVU2247 + 7309 0024 0122 movs r2, #1 + 7310 0026 4FF48051 mov r1, #4096 + 7311 002a 4F48 ldr r0, .L404 + 7312 002c FFF7FEFF bl HAL_GPIO_WritePin + 7313 .LVL683: + 7314 0030 EDE7 b .L370 + 7315 .LVL684: + 7316 .L376: +3251:Src/main.c **** //tmp32=0; + 7317 .loc 1 3251 4 view .LVU2248 + 7318 0032 0022 movs r2, #0 + 7319 0034 4FF48041 mov r1, #16384 + 7320 0038 4B48 ldr r0, .L404 + 7321 003a FFF7FEFF bl HAL_GPIO_WritePin + 7322 .LVL685: + ARM GAS /tmp/ccuHnxNu.s page 515 - 7123 .loc 1 3193 2 is_stmt 1 view .LVU2199 - 7124 000e 013C subs r4, r4, #1 - 7125 .LVL674: -3193:Src/main.c **** { - 7126 .loc 1 3193 2 is_stmt 0 view .LVU2200 - 7127 0010 032C cmp r4, #3 - 7128 0012 2ED8 bhi .L360 - 7129 0014 DFE804F0 tbb [pc, r4] - 7130 .L362: - 7131 0018 0D .byte (.L365-.L362)/2 - 7132 0019 45 .byte (.L364-.L362)/2 - 7133 001a 65 .byte (.L363-.L362)/2 - 7134 001b 86 .byte (.L361-.L362)/2 - 7135 .LVL675: - 7136 .p2align 1 - 7137 .L392: -3189:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 7138 .loc 1 3189 3 is_stmt 1 view .LVU2201 - 7139 001c 0121 movs r1, #1 - 7140 .LVL676: -3189:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 7141 .loc 1 3189 3 is_stmt 0 view .LVU2202 - 7142 001e 0220 movs r0, #2 - 7143 .LVL677: -3189:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 7144 .loc 1 3189 3 view .LVU2203 - 7145 0020 FFF7FEFF bl SPI2_SetMode - 7146 .LVL678: -3190:Src/main.c **** } - 7147 .loc 1 3190 3 is_stmt 1 view .LVU2204 - 7148 0024 0122 movs r2, #1 - 7149 0026 4FF48051 mov r1, #4096 - 7150 002a 4E48 ldr r0, .L393 - 7151 002c FFF7FEFF bl HAL_GPIO_WritePin - 7152 .LVL679: - 7153 0030 EDE7 b .L359 - 7154 .LVL680: - 7155 .L365: -3196:Src/main.c **** //tmp32=0; - 7156 .loc 1 3196 4 view .LVU2205 - 7157 0032 0022 movs r2, #0 - 7158 0034 4FF48041 mov r1, #16384 - 7159 0038 4A48 ldr r0, .L393 - 7160 003a FFF7FEFF bl HAL_GPIO_WritePin - 7161 .LVL681: -3199:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7162 .loc 1 3199 4 view .LVU2206 -3200:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7163 .loc 1 3200 4 view .LVU2207 -3199:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7164 .loc 1 3199 10 is_stmt 0 view .LVU2208 - 7165 003e 0022 movs r2, #0 - 7166 .LVL682: - 7167 .L366: -3200:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7168 .loc 1 3200 42 is_stmt 1 discriminator 1 view .LVU2209 - 7169 .LBB603: - ARM GAS /tmp/ccEQxcUB.s page 511 - - - 7170 .LBI603: +3254:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7323 .loc 1 3254 4 view .LVU2249 +3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7324 .loc 1 3255 4 view .LVU2250 +3254:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7325 .loc 1 3254 10 is_stmt 0 view .LVU2251 + 7326 003e 0022 movs r2, #0 + 7327 .LVL686: + 7328 .L377: +3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7329 .loc 1 3255 42 is_stmt 1 discriminator 1 view .LVU2252 + 7330 .LBB606: + 7331 .LBI606: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7171 .loc 4 916 26 view .LVU2210 - 7172 .LBB604: + 7332 .loc 4 916 26 view .LVU2253 + 7333 .LBB607: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7173 .loc 4 918 3 view .LVU2211 + 7334 .loc 4 918 3 view .LVU2254 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7174 .loc 4 918 12 is_stmt 0 view .LVU2212 - 7175 0040 494B ldr r3, .L393+4 - 7176 0042 9B68 ldr r3, [r3, #8] + 7335 .loc 4 918 12 is_stmt 0 view .LVU2255 + 7336 0040 4A4B ldr r3, .L404+4 + 7337 0042 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7177 .loc 4 918 66 view .LVU2213 - 7178 0044 13F0020F tst r3, #2 - 7179 0048 04D1 bne .L367 - 7180 .LVL683: + 7338 .loc 4 918 66 view .LVU2256 + 7339 0044 13F0020F tst r3, #2 + 7340 0048 04D1 bne .L378 + 7341 .LVL687: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7181 .loc 4 918 66 view .LVU2214 - 7182 .LBE604: - 7183 .LBE603: -3200:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7184 .loc 1 3200 42 discriminator 2 view .LVU2215 - 7185 004a B2F5FA7F cmp r2, #500 - 7186 004e 01D8 bhi .L367 -3200:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7187 .loc 1 3200 59 is_stmt 1 discriminator 3 view .LVU2216 -3200:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7188 .loc 1 3200 64 is_stmt 0 discriminator 3 view .LVU2217 - 7189 0050 0132 adds r2, r2, #1 - 7190 .LVL684: -3200:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7191 .loc 1 3200 64 discriminator 3 view .LVU2218 - 7192 0052 F5E7 b .L366 - 7193 .L367: -3201:Src/main.c **** tmp32 = 0; - 7194 .loc 1 3201 4 is_stmt 1 view .LVU2219 - 7195 .LVL685: - 7196 .LBB605: - 7197 .LBI605: + 7342 .loc 4 918 66 view .LVU2257 + 7343 .LBE607: + 7344 .LBE606: +3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7345 .loc 1 3255 42 discriminator 2 view .LVU2258 + 7346 004a B2F5FA7F cmp r2, #500 + 7347 004e 01D8 bhi .L378 +3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7348 .loc 1 3255 59 is_stmt 1 discriminator 3 view .LVU2259 +3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7349 .loc 1 3255 64 is_stmt 0 discriminator 3 view .LVU2260 + 7350 0050 0132 adds r2, r2, #1 + 7351 .LVL688: +3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7352 .loc 1 3255 64 discriminator 3 view .LVU2261 + 7353 0052 F5E7 b .L377 + 7354 .L378: +3256:Src/main.c **** tmp32 = 0; + 7355 .loc 1 3256 4 is_stmt 1 view .LVU2262 + 7356 .LVL689: + 7357 .LBB608: + 7358 .LBI608: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7198 .loc 4 1373 22 view .LVU2220 - 7199 .LBB606: + 7359 .loc 4 1373 22 view .LVU2263 + 7360 .LBB609: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7200 .loc 4 1376 3 view .LVU2221 - 7201 .loc 4 1377 3 view .LVU2222 - 7202 .loc 4 1377 10 is_stmt 0 view .LVU2223 - 7203 0054 444B ldr r3, .L393+4 - 7204 0056 9D81 strh r5, [r3, #12] @ movhi - 7205 .LVL686: - 7206 .loc 4 1377 10 view .LVU2224 - 7207 .LBE606: - 7208 .LBE605: -3202:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7209 .loc 1 3202 4 is_stmt 1 view .LVU2225 -3203:Src/main.c **** (void) SPI2->DR; - 7210 .loc 1 3203 4 view .LVU2226 -3202:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7211 .loc 1 3202 10 is_stmt 0 view .LVU2227 - ARM GAS /tmp/ccEQxcUB.s page 512 + 7361 .loc 4 1376 3 view .LVU2264 + 7362 .loc 4 1377 3 view .LVU2265 + 7363 .loc 4 1377 10 is_stmt 0 view .LVU2266 + ARM GAS /tmp/ccuHnxNu.s page 516 - 7212 0058 0022 movs r2, #0 - 7213 .LVL687: - 7214 .L369: -3203:Src/main.c **** (void) SPI2->DR; - 7215 .loc 1 3203 43 is_stmt 1 discriminator 1 view .LVU2228 - 7216 .LBB607: - 7217 .LBI607: + 7364 0054 454B ldr r3, .L404+4 + 7365 0056 9D81 strh r5, [r3, #12] @ movhi + 7366 .LVL690: + 7367 .loc 4 1377 10 view .LVU2267 + 7368 .LBE609: + 7369 .LBE608: +3257:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7370 .loc 1 3257 4 is_stmt 1 view .LVU2268 +3258:Src/main.c **** (void) SPI2->DR; + 7371 .loc 1 3258 4 view .LVU2269 +3257:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7372 .loc 1 3257 10 is_stmt 0 view .LVU2270 + 7373 0058 0022 movs r2, #0 + 7374 .LVL691: + 7375 .L380: +3258:Src/main.c **** (void) SPI2->DR; + 7376 .loc 1 3258 43 is_stmt 1 discriminator 1 view .LVU2271 + 7377 .LBB610: + 7378 .LBI610: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7218 .loc 4 905 26 view .LVU2229 - 7219 .LBB608: + 7379 .loc 4 905 26 view .LVU2272 + 7380 .LBB611: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7220 .loc 4 907 3 view .LVU2230 + 7381 .loc 4 907 3 view .LVU2273 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7221 .loc 4 907 12 is_stmt 0 view .LVU2231 - 7222 005a 434B ldr r3, .L393+4 - 7223 005c 9B68 ldr r3, [r3, #8] + 7382 .loc 4 907 12 is_stmt 0 view .LVU2274 + 7383 005a 444B ldr r3, .L404+4 + 7384 005c 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7224 .loc 4 907 68 view .LVU2232 - 7225 005e 13F0010F tst r3, #1 - 7226 0062 04D1 bne .L370 - 7227 .LVL688: + 7385 .loc 4 907 68 view .LVU2275 + 7386 005e 13F0010F tst r3, #1 + 7387 0062 04D1 bne .L381 + 7388 .LVL692: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7228 .loc 4 907 68 view .LVU2233 - 7229 .LBE608: - 7230 .LBE607: -3203:Src/main.c **** (void) SPI2->DR; - 7231 .loc 1 3203 43 discriminator 2 view .LVU2234 - 7232 0064 B2F5FA7F cmp r2, #500 - 7233 0068 01D8 bhi .L370 -3203:Src/main.c **** (void) SPI2->DR; - 7234 .loc 1 3203 60 is_stmt 1 discriminator 3 view .LVU2235 -3203:Src/main.c **** (void) SPI2->DR; - 7235 .loc 1 3203 65 is_stmt 0 discriminator 3 view .LVU2236 - 7236 006a 0132 adds r2, r2, #1 - 7237 .LVL689: -3203:Src/main.c **** (void) SPI2->DR; - 7238 .loc 1 3203 65 discriminator 3 view .LVU2237 - 7239 006c F5E7 b .L369 - 7240 .L370: -3204:Src/main.c **** break; - 7241 .loc 1 3204 4 is_stmt 1 view .LVU2238 - 7242 006e 3E4B ldr r3, .L393+4 - 7243 0070 DB68 ldr r3, [r3, #12] -3205:Src/main.c **** case 2: - 7244 .loc 1 3205 3 view .LVU2239 - 7245 .LVL690: - 7246 .L360: -3241:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 7247 .loc 1 3241 2 view .LVU2240 - 7248 0072 0122 movs r2, #1 - 7249 0074 4FF48041 mov r1, #16384 - 7250 0078 3A48 ldr r0, .L393 - 7251 007a FFF7FEFF bl HAL_GPIO_WritePin - 7252 .LVL691: -3242:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 7253 .loc 1 3242 2 view .LVU2241 - 7254 007e 3B4C ldr r4, .L393+8 - ARM GAS /tmp/ccEQxcUB.s page 513 + 7389 .loc 4 907 68 view .LVU2276 + 7390 .LBE611: + 7391 .LBE610: +3258:Src/main.c **** (void) SPI2->DR; + 7392 .loc 1 3258 43 discriminator 2 view .LVU2277 + 7393 0064 B2F5FA7F cmp r2, #500 + 7394 0068 01D8 bhi .L381 +3258:Src/main.c **** (void) SPI2->DR; + 7395 .loc 1 3258 60 is_stmt 1 discriminator 3 view .LVU2278 +3258:Src/main.c **** (void) SPI2->DR; + 7396 .loc 1 3258 65 is_stmt 0 discriminator 3 view .LVU2279 + 7397 006a 0132 adds r2, r2, #1 + 7398 .LVL693: +3258:Src/main.c **** (void) SPI2->DR; + 7399 .loc 1 3258 65 discriminator 3 view .LVU2280 + 7400 006c F5E7 b .L380 + 7401 .L381: +3259:Src/main.c **** break; + 7402 .loc 1 3259 4 is_stmt 1 view .LVU2281 + 7403 006e 3F4B ldr r3, .L404+4 + 7404 0070 DB68 ldr r3, [r3, #12] +3260:Src/main.c **** case 2: + 7405 .loc 1 3260 3 view .LVU2282 + ARM GAS /tmp/ccuHnxNu.s page 517 - 7255 .LVL692: -3242:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 7256 .loc 1 3242 2 is_stmt 0 view .LVU2242 - 7257 0080 0122 movs r2, #1 - 7258 0082 4021 movs r1, #64 - 7259 0084 2046 mov r0, r4 - 7260 0086 FFF7FEFF bl HAL_GPIO_WritePin - 7261 .LVL693: -3243:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 7262 .loc 1 3243 2 is_stmt 1 view .LVU2243 - 7263 008a 0122 movs r2, #1 - 7264 008c 4FF48051 mov r1, #4096 - 7265 0090 3748 ldr r0, .L393+12 - 7266 0092 FFF7FEFF bl HAL_GPIO_WritePin - 7267 .LVL694: -3244:Src/main.c **** } - 7268 .loc 1 3244 2 view .LVU2244 - 7269 0096 0122 movs r2, #1 - 7270 0098 1021 movs r1, #16 - 7271 009a 2046 mov r0, r4 - 7272 009c FFF7FEFF bl HAL_GPIO_WritePin - 7273 .LVL695: -3245:Src/main.c **** static uint16_t MPhD_T(uint8_t num) - 7274 .loc 1 3245 1 is_stmt 0 view .LVU2245 - 7275 00a0 38BD pop {r3, r4, r5, pc} - 7276 .LVL696: - 7277 .L364: -3208:Src/main.c **** //tmp32=0; - 7278 .loc 1 3208 4 is_stmt 1 view .LVU2246 - 7279 00a2 0022 movs r2, #0 - 7280 00a4 4021 movs r1, #64 - 7281 00a6 3148 ldr r0, .L393+8 - 7282 00a8 FFF7FEFF bl HAL_GPIO_WritePin - 7283 .LVL697: -3211:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7284 .loc 1 3211 4 view .LVU2247 -3212:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7285 .loc 1 3212 4 view .LVU2248 -3211:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7286 .loc 1 3211 10 is_stmt 0 view .LVU2249 - 7287 00ac 0022 movs r2, #0 - 7288 .LVL698: - 7289 .L372: -3212:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7290 .loc 1 3212 42 is_stmt 1 discriminator 1 view .LVU2250 - 7291 .LBB609: - 7292 .LBI609: + 7406 .LVL694: + 7407 .L371: +3296:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 7408 .loc 1 3296 2 view .LVU2283 + 7409 0072 0122 movs r2, #1 + 7410 0074 4FF48041 mov r1, #16384 + 7411 0078 3B48 ldr r0, .L404 + 7412 007a FFF7FEFF bl HAL_GPIO_WritePin + 7413 .LVL695: +3297:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 7414 .loc 1 3297 2 view .LVU2284 + 7415 007e 0122 movs r2, #1 + 7416 0080 4021 movs r1, #64 + 7417 0082 3B48 ldr r0, .L404+8 + 7418 0084 FFF7FEFF bl HAL_GPIO_WritePin + 7419 .LVL696: +3298:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 7420 .loc 1 3298 2 view .LVU2285 + 7421 0088 0122 movs r2, #1 + 7422 008a 4FF48051 mov r1, #4096 + 7423 008e 3948 ldr r0, .L404+12 + 7424 0090 FFF7FEFF bl HAL_GPIO_WritePin + 7425 .LVL697: +3299:Src/main.c **** } + 7426 .loc 1 3299 2 view .LVU2286 + 7427 0094 0122 movs r2, #1 + 7428 0096 4FF48071 mov r1, #256 + 7429 009a 3748 ldr r0, .L404+16 + 7430 009c FFF7FEFF bl HAL_GPIO_WritePin + 7431 .LVL698: +3300:Src/main.c **** static uint16_t MPhD_T(uint8_t num) + 7432 .loc 1 3300 1 is_stmt 0 view .LVU2287 + 7433 00a0 38BD pop {r3, r4, r5, pc} + 7434 .LVL699: + 7435 .L375: +3263:Src/main.c **** //tmp32=0; + 7436 .loc 1 3263 4 is_stmt 1 view .LVU2288 + 7437 00a2 0022 movs r2, #0 + 7438 00a4 4021 movs r1, #64 + 7439 00a6 3248 ldr r0, .L404+8 + 7440 00a8 FFF7FEFF bl HAL_GPIO_WritePin + 7441 .LVL700: +3266:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7442 .loc 1 3266 4 view .LVU2289 +3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7443 .loc 1 3267 4 view .LVU2290 +3266:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7444 .loc 1 3266 10 is_stmt 0 view .LVU2291 + 7445 00ac 0022 movs r2, #0 + 7446 .LVL701: + 7447 .L383: +3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7448 .loc 1 3267 42 is_stmt 1 discriminator 1 view .LVU2292 + 7449 .LBB612: + 7450 .LBI612: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7293 .loc 4 916 26 view .LVU2251 - 7294 .LBB610: + 7451 .loc 4 916 26 view .LVU2293 + ARM GAS /tmp/ccuHnxNu.s page 518 + + + 7452 .LBB613: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7295 .loc 4 918 3 view .LVU2252 + 7453 .loc 4 918 3 view .LVU2294 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7296 .loc 4 918 12 is_stmt 0 view .LVU2253 - 7297 00ae 314B ldr r3, .L393+16 - 7298 00b0 9B68 ldr r3, [r3, #8] + 7454 .loc 4 918 12 is_stmt 0 view .LVU2295 + 7455 00ae 334B ldr r3, .L404+20 + 7456 00b0 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccEQxcUB.s page 514 - - - 7299 .loc 4 918 66 view .LVU2254 - 7300 00b2 13F0020F tst r3, #2 - 7301 00b6 04D1 bne .L373 - 7302 .LVL699: + 7457 .loc 4 918 66 view .LVU2296 + 7458 00b2 13F0020F tst r3, #2 + 7459 00b6 04D1 bne .L384 + 7460 .LVL702: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7303 .loc 4 918 66 view .LVU2255 - 7304 .LBE610: - 7305 .LBE609: -3212:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7306 .loc 1 3212 42 discriminator 2 view .LVU2256 - 7307 00b8 B2F5FA7F cmp r2, #500 - 7308 00bc 01D8 bhi .L373 -3212:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7309 .loc 1 3212 59 is_stmt 1 discriminator 3 view .LVU2257 -3212:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7310 .loc 1 3212 64 is_stmt 0 discriminator 3 view .LVU2258 - 7311 00be 0132 adds r2, r2, #1 - 7312 .LVL700: -3212:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7313 .loc 1 3212 64 discriminator 3 view .LVU2259 - 7314 00c0 F5E7 b .L372 - 7315 .L373: -3213:Src/main.c **** tmp32 = 0; - 7316 .loc 1 3213 4 is_stmt 1 view .LVU2260 - 7317 .LVL701: - 7318 .LBB611: - 7319 .LBI611: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7320 .loc 4 1373 22 view .LVU2261 - 7321 .LBB612: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7322 .loc 4 1376 3 view .LVU2262 - 7323 .loc 4 1377 3 view .LVU2263 - 7324 .loc 4 1377 10 is_stmt 0 view .LVU2264 - 7325 00c2 2C4B ldr r3, .L393+16 - 7326 00c4 9D81 strh r5, [r3, #12] @ movhi - 7327 .LVL702: - 7328 .loc 4 1377 10 view .LVU2265 - 7329 .LBE612: - 7330 .LBE611: -3214:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7331 .loc 1 3214 4 is_stmt 1 view .LVU2266 -3215:Src/main.c **** (void) SPI6->DR; - 7332 .loc 1 3215 4 view .LVU2267 -3214:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7333 .loc 1 3214 10 is_stmt 0 view .LVU2268 - 7334 00c6 0022 movs r2, #0 - 7335 .LVL703: - 7336 .L375: -3215:Src/main.c **** (void) SPI6->DR; - 7337 .loc 1 3215 43 is_stmt 1 discriminator 1 view .LVU2269 - 7338 .LBB613: - 7339 .LBI613: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7340 .loc 4 905 26 view .LVU2270 - 7341 .LBB614: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccEQxcUB.s page 515 - - - 7342 .loc 4 907 3 view .LVU2271 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7343 .loc 4 907 12 is_stmt 0 view .LVU2272 - 7344 00c8 2A4B ldr r3, .L393+16 - 7345 00ca 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7346 .loc 4 907 68 view .LVU2273 - 7347 00cc 13F0010F tst r3, #1 - 7348 00d0 04D1 bne .L376 - 7349 .LVL704: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7350 .loc 4 907 68 view .LVU2274 - 7351 .LBE614: - 7352 .LBE613: -3215:Src/main.c **** (void) SPI6->DR; - 7353 .loc 1 3215 43 discriminator 2 view .LVU2275 - 7354 00d2 B2F5FA7F cmp r2, #500 - 7355 00d6 01D8 bhi .L376 -3215:Src/main.c **** (void) SPI6->DR; - 7356 .loc 1 3215 60 is_stmt 1 discriminator 3 view .LVU2276 -3215:Src/main.c **** (void) SPI6->DR; - 7357 .loc 1 3215 65 is_stmt 0 discriminator 3 view .LVU2277 - 7358 00d8 0132 adds r2, r2, #1 - 7359 .LVL705: -3215:Src/main.c **** (void) SPI6->DR; - 7360 .loc 1 3215 65 discriminator 3 view .LVU2278 - 7361 00da F5E7 b .L375 - 7362 .L376: -3216:Src/main.c **** break; - 7363 .loc 1 3216 4 is_stmt 1 view .LVU2279 - 7364 00dc 254B ldr r3, .L393+16 - 7365 00de DB68 ldr r3, [r3, #12] -3217:Src/main.c **** case 3: - 7366 .loc 1 3217 3 view .LVU2280 - 7367 00e0 C7E7 b .L360 - 7368 .LVL706: - 7369 .L363: -3219:Src/main.c **** //tmp32=0; - 7370 .loc 1 3219 4 view .LVU2281 - 7371 00e2 0022 movs r2, #0 - 7372 00e4 4FF48051 mov r1, #4096 - 7373 00e8 2148 ldr r0, .L393+12 - 7374 00ea FFF7FEFF bl HAL_GPIO_WritePin - 7375 .LVL707: -3222:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7376 .loc 1 3222 4 view .LVU2282 -3223:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7377 .loc 1 3223 4 view .LVU2283 -3222:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7378 .loc 1 3222 10 is_stmt 0 view .LVU2284 - 7379 00ee 0022 movs r2, #0 - 7380 .LVL708: - 7381 .L378: -3223:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7382 .loc 1 3223 42 is_stmt 1 discriminator 1 view .LVU2285 - 7383 .LBB615: - 7384 .LBI615: - ARM GAS /tmp/ccEQxcUB.s page 516 - - - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7385 .loc 4 916 26 view .LVU2286 - 7386 .LBB616: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7387 .loc 4 918 3 view .LVU2287 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7388 .loc 4 918 12 is_stmt 0 view .LVU2288 - 7389 00f0 1D4B ldr r3, .L393+4 - 7390 00f2 9B68 ldr r3, [r3, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7391 .loc 4 918 66 view .LVU2289 - 7392 00f4 13F0020F tst r3, #2 - 7393 00f8 04D1 bne .L379 - 7394 .LVL709: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7395 .loc 4 918 66 view .LVU2290 - 7396 .LBE616: - 7397 .LBE615: -3223:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7398 .loc 1 3223 42 discriminator 2 view .LVU2291 - 7399 00fa B2F5FA7F cmp r2, #500 - 7400 00fe 01D8 bhi .L379 -3223:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7401 .loc 1 3223 59 is_stmt 1 discriminator 3 view .LVU2292 -3223:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7402 .loc 1 3223 64 is_stmt 0 discriminator 3 view .LVU2293 - 7403 0100 0132 adds r2, r2, #1 - 7404 .LVL710: -3223:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7405 .loc 1 3223 64 discriminator 3 view .LVU2294 - 7406 0102 F5E7 b .L378 - 7407 .L379: -3224:Src/main.c **** tmp32 = 0; - 7408 .loc 1 3224 4 is_stmt 1 view .LVU2295 - 7409 .LVL711: - 7410 .LBB617: - 7411 .LBI617: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7412 .loc 4 1373 22 view .LVU2296 - 7413 .LBB618: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7414 .loc 4 1376 3 view .LVU2297 - 7415 .loc 4 1377 3 view .LVU2298 - 7416 .loc 4 1377 10 is_stmt 0 view .LVU2299 - 7417 0104 184B ldr r3, .L393+4 - 7418 0106 9D81 strh r5, [r3, #12] @ movhi - 7419 .LVL712: - 7420 .loc 4 1377 10 view .LVU2300 - 7421 .LBE618: - 7422 .LBE617: -3225:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7423 .loc 1 3225 4 is_stmt 1 view .LVU2301 -3226:Src/main.c **** (void) SPI2->DR; - 7424 .loc 1 3226 4 view .LVU2302 -3225:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7425 .loc 1 3225 10 is_stmt 0 view .LVU2303 - 7426 0108 0022 movs r2, #0 - ARM GAS /tmp/ccEQxcUB.s page 517 - - - 7427 .LVL713: - 7428 .L381: -3226:Src/main.c **** (void) SPI2->DR; - 7429 .loc 1 3226 43 is_stmt 1 discriminator 1 view .LVU2304 - 7430 .LBB619: - 7431 .LBI619: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7432 .loc 4 905 26 view .LVU2305 - 7433 .LBB620: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7434 .loc 4 907 3 view .LVU2306 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7435 .loc 4 907 12 is_stmt 0 view .LVU2307 - 7436 010a 174B ldr r3, .L393+4 - 7437 010c 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7438 .loc 4 907 68 view .LVU2308 - 7439 010e 13F0010F tst r3, #1 - 7440 0112 04D1 bne .L382 - 7441 .LVL714: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7442 .loc 4 907 68 view .LVU2309 - 7443 .LBE620: - 7444 .LBE619: -3226:Src/main.c **** (void) SPI2->DR; - 7445 .loc 1 3226 43 discriminator 2 view .LVU2310 - 7446 0114 B2F5FA7F cmp r2, #500 - 7447 0118 01D8 bhi .L382 -3226:Src/main.c **** (void) SPI2->DR; - 7448 .loc 1 3226 60 is_stmt 1 discriminator 3 view .LVU2311 -3226:Src/main.c **** (void) SPI2->DR; - 7449 .loc 1 3226 65 is_stmt 0 discriminator 3 view .LVU2312 - 7450 011a 0132 adds r2, r2, #1 - 7451 .LVL715: -3226:Src/main.c **** (void) SPI2->DR; - 7452 .loc 1 3226 65 discriminator 3 view .LVU2313 - 7453 011c F5E7 b .L381 - 7454 .L382: -3227:Src/main.c **** break; - 7455 .loc 1 3227 4 is_stmt 1 view .LVU2314 - 7456 011e 124B ldr r3, .L393+4 - 7457 0120 DB68 ldr r3, [r3, #12] -3228:Src/main.c **** case 4: - 7458 .loc 1 3228 3 view .LVU2315 - 7459 0122 A6E7 b .L360 - 7460 .LVL716: - 7461 .L361: -3230:Src/main.c **** //tmp32=0; - 7462 .loc 1 3230 4 view .LVU2316 - 7463 0124 0022 movs r2, #0 - 7464 0126 1021 movs r1, #16 - 7465 0128 1048 ldr r0, .L393+8 - 7466 012a FFF7FEFF bl HAL_GPIO_WritePin - 7467 .LVL717: -3233:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7468 .loc 1 3233 4 view .LVU2317 -3234:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - ARM GAS /tmp/ccEQxcUB.s page 518 - - - 7469 .loc 1 3234 4 view .LVU2318 -3233:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7470 .loc 1 3233 10 is_stmt 0 view .LVU2319 - 7471 012e 0022 movs r2, #0 - 7472 .LVL718: + 7461 .loc 4 918 66 view .LVU2297 + 7462 .LBE613: + 7463 .LBE612: +3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7464 .loc 1 3267 42 discriminator 2 view .LVU2298 + 7465 00b8 B2F5FA7F cmp r2, #500 + 7466 00bc 01D8 bhi .L384 +3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7467 .loc 1 3267 59 is_stmt 1 discriminator 3 view .LVU2299 +3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7468 .loc 1 3267 64 is_stmt 0 discriminator 3 view .LVU2300 + 7469 00be 0132 adds r2, r2, #1 + 7470 .LVL703: +3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7471 .loc 1 3267 64 discriminator 3 view .LVU2301 + 7472 00c0 F5E7 b .L383 7473 .L384: -3234:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7474 .loc 1 3234 42 is_stmt 1 discriminator 1 view .LVU2320 - 7475 .LBB621: - 7476 .LBI621: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7477 .loc 4 916 26 view .LVU2321 - 7478 .LBB622: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7479 .loc 4 918 3 view .LVU2322 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7480 .loc 4 918 12 is_stmt 0 view .LVU2323 - 7481 0130 104B ldr r3, .L393+16 - 7482 0132 9B68 ldr r3, [r3, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7483 .loc 4 918 66 view .LVU2324 - 7484 0134 13F0020F tst r3, #2 - 7485 0138 04D1 bne .L385 - 7486 .LVL719: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7487 .loc 4 918 66 view .LVU2325 - 7488 .LBE622: - 7489 .LBE621: -3234:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7490 .loc 1 3234 42 discriminator 2 view .LVU2326 - 7491 013a B2F5FA7F cmp r2, #500 - 7492 013e 01D8 bhi .L385 -3234:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7493 .loc 1 3234 59 is_stmt 1 discriminator 3 view .LVU2327 -3234:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7494 .loc 1 3234 64 is_stmt 0 discriminator 3 view .LVU2328 - 7495 0140 0132 adds r2, r2, #1 - 7496 .LVL720: -3234:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7497 .loc 1 3234 64 discriminator 3 view .LVU2329 - 7498 0142 F5E7 b .L384 - 7499 .L385: -3235:Src/main.c **** tmp32 = 0; - 7500 .loc 1 3235 4 is_stmt 1 view .LVU2330 - 7501 .LVL721: - 7502 .LBB623: - 7503 .LBI623: +3268:Src/main.c **** tmp32 = 0; + 7474 .loc 1 3268 4 is_stmt 1 view .LVU2302 + 7475 .LVL704: + 7476 .LBB614: + 7477 .LBI614: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7504 .loc 4 1373 22 view .LVU2331 - 7505 .LBB624: + 7478 .loc 4 1373 22 view .LVU2303 + 7479 .LBB615: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7506 .loc 4 1376 3 view .LVU2332 - 7507 .loc 4 1377 3 view .LVU2333 - 7508 .loc 4 1377 10 is_stmt 0 view .LVU2334 - 7509 0144 0B4B ldr r3, .L393+16 - 7510 0146 9D81 strh r5, [r3, #12] @ movhi - 7511 .LVL722: - ARM GAS /tmp/ccEQxcUB.s page 519 + 7480 .loc 4 1376 3 view .LVU2304 + 7481 .loc 4 1377 3 view .LVU2305 + 7482 .loc 4 1377 10 is_stmt 0 view .LVU2306 + 7483 00c2 2E4B ldr r3, .L404+20 + 7484 00c4 9D81 strh r5, [r3, #12] @ movhi + 7485 .LVL705: + 7486 .loc 4 1377 10 view .LVU2307 + 7487 .LBE615: + 7488 .LBE614: +3269:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7489 .loc 1 3269 4 is_stmt 1 view .LVU2308 +3270:Src/main.c **** (void) SPI6->DR; + 7490 .loc 1 3270 4 view .LVU2309 +3269:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7491 .loc 1 3269 10 is_stmt 0 view .LVU2310 + 7492 00c6 0022 movs r2, #0 + 7493 .LVL706: + 7494 .L386: + ARM GAS /tmp/ccuHnxNu.s page 519 - 7512 .loc 4 1377 10 view .LVU2335 - 7513 .LBE624: - 7514 .LBE623: -3236:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7515 .loc 1 3236 4 is_stmt 1 view .LVU2336 -3237:Src/main.c **** (void) SPI6->DR; - 7516 .loc 1 3237 4 view .LVU2337 -3236:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7517 .loc 1 3236 10 is_stmt 0 view .LVU2338 - 7518 0148 0022 movs r2, #0 - 7519 .LVL723: - 7520 .L387: -3237:Src/main.c **** (void) SPI6->DR; - 7521 .loc 1 3237 43 is_stmt 1 discriminator 1 view .LVU2339 - 7522 .LBB625: - 7523 .LBI625: +3270:Src/main.c **** (void) SPI6->DR; + 7495 .loc 1 3270 43 is_stmt 1 discriminator 1 view .LVU2311 + 7496 .LBB616: + 7497 .LBI616: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7524 .loc 4 905 26 view .LVU2340 - 7525 .LBB626: + 7498 .loc 4 905 26 view .LVU2312 + 7499 .LBB617: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7526 .loc 4 907 3 view .LVU2341 + 7500 .loc 4 907 3 view .LVU2313 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7527 .loc 4 907 12 is_stmt 0 view .LVU2342 - 7528 014a 0A4B ldr r3, .L393+16 - 7529 014c 9B68 ldr r3, [r3, #8] + 7501 .loc 4 907 12 is_stmt 0 view .LVU2314 + 7502 00c8 2C4B ldr r3, .L404+20 + 7503 00ca 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7530 .loc 4 907 68 view .LVU2343 - 7531 014e 13F0010F tst r3, #1 - 7532 0152 04D1 bne .L388 - 7533 .LVL724: + 7504 .loc 4 907 68 view .LVU2315 + 7505 00cc 13F0010F tst r3, #1 + 7506 00d0 04D1 bne .L387 + 7507 .LVL707: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7534 .loc 4 907 68 view .LVU2344 - 7535 .LBE626: - 7536 .LBE625: -3237:Src/main.c **** (void) SPI6->DR; - 7537 .loc 1 3237 43 discriminator 2 view .LVU2345 - 7538 0154 B2F5FA7F cmp r2, #500 - 7539 0158 01D8 bhi .L388 -3237:Src/main.c **** (void) SPI6->DR; - 7540 .loc 1 3237 60 is_stmt 1 discriminator 3 view .LVU2346 -3237:Src/main.c **** (void) SPI6->DR; - 7541 .loc 1 3237 65 is_stmt 0 discriminator 3 view .LVU2347 - 7542 015a 0132 adds r2, r2, #1 - 7543 .LVL725: -3237:Src/main.c **** (void) SPI6->DR; - 7544 .loc 1 3237 65 discriminator 3 view .LVU2348 - 7545 015c F5E7 b .L387 - 7546 .L388: -3238:Src/main.c **** break; - 7547 .loc 1 3238 4 is_stmt 1 view .LVU2349 - 7548 015e 054B ldr r3, .L393+16 - 7549 0160 DB68 ldr r3, [r3, #12] -3239:Src/main.c **** } - 7550 .loc 1 3239 3 view .LVU2350 - 7551 0162 86E7 b .L360 - 7552 .L394: - 7553 .align 2 - ARM GAS /tmp/ccEQxcUB.s page 520 + 7508 .loc 4 907 68 view .LVU2316 + 7509 .LBE617: + 7510 .LBE616: +3270:Src/main.c **** (void) SPI6->DR; + 7511 .loc 1 3270 43 discriminator 2 view .LVU2317 + 7512 00d2 B2F5FA7F cmp r2, #500 + 7513 00d6 01D8 bhi .L387 +3270:Src/main.c **** (void) SPI6->DR; + 7514 .loc 1 3270 60 is_stmt 1 discriminator 3 view .LVU2318 +3270:Src/main.c **** (void) SPI6->DR; + 7515 .loc 1 3270 65 is_stmt 0 discriminator 3 view .LVU2319 + 7516 00d8 0132 adds r2, r2, #1 + 7517 .LVL708: +3270:Src/main.c **** (void) SPI6->DR; + 7518 .loc 1 3270 65 discriminator 3 view .LVU2320 + 7519 00da F5E7 b .L386 + 7520 .L387: +3271:Src/main.c **** break; + 7521 .loc 1 3271 4 is_stmt 1 view .LVU2321 + 7522 00dc 274B ldr r3, .L404+20 + 7523 00de DB68 ldr r3, [r3, #12] +3272:Src/main.c **** case 3: + 7524 .loc 1 3272 3 view .LVU2322 + 7525 00e0 C7E7 b .L371 + 7526 .LVL709: + 7527 .L374: +3274:Src/main.c **** //tmp32=0; + 7528 .loc 1 3274 4 view .LVU2323 + 7529 00e2 0022 movs r2, #0 + 7530 00e4 4FF48051 mov r1, #4096 + 7531 00e8 2248 ldr r0, .L404+12 + 7532 00ea FFF7FEFF bl HAL_GPIO_WritePin + 7533 .LVL710: +3277:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7534 .loc 1 3277 4 view .LVU2324 +3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7535 .loc 1 3278 4 view .LVU2325 +3277:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + ARM GAS /tmp/ccuHnxNu.s page 520 - 7554 .L393: - 7555 0164 00040240 .word 1073873920 - 7556 0168 00380040 .word 1073756160 - 7557 016c 00000240 .word 1073872896 - 7558 0170 000C0240 .word 1073875968 - 7559 0174 00540140 .word 1073828864 - 7560 .cfi_endproc - 7561 .LFE1225: - 7563 .section .text.Decode_uart,"ax",%progbits - 7564 .align 1 - 7565 .syntax unified - 7566 .thumb - 7567 .thumb_func - 7569 Decode_uart: - 7570 .LVL726: - 7571 .LFB1209: -2372:Src/main.c **** // uint8_t *temp1; - 7572 .loc 1 2372 1 view -0 - 7573 .cfi_startproc - 7574 @ args = 0, pretend = 0, frame = 0 - 7575 @ frame_needed = 0, uses_anonymous_args = 0 -2372:Src/main.c **** // uint8_t *temp1; - 7576 .loc 1 2372 1 is_stmt 0 view .LVU2352 - 7577 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} - 7578 .LCFI68: - 7579 .cfi_def_cfa_offset 32 - 7580 .cfi_offset 3, -32 - 7581 .cfi_offset 4, -28 - 7582 .cfi_offset 5, -24 - 7583 .cfi_offset 6, -20 - 7584 .cfi_offset 7, -16 - 7585 .cfi_offset 8, -12 - 7586 .cfi_offset 9, -8 - 7587 .cfi_offset 14, -4 - 7588 0004 0546 mov r5, r0 - 7589 0006 0F46 mov r7, r1 - 7590 0008 1646 mov r6, r2 - 7591 000a 1C46 mov r4, r3 -2374:Src/main.c **** - 7592 .loc 1 2374 2 is_stmt 1 view .LVU2353 -2379:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7593 .loc 1 2379 2 view .LVU2354 -2379:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7594 .loc 1 2379 6 is_stmt 0 view .LVU2355 - 7595 000c AF4B ldr r3, .L419 - 7596 .LVL727: -2379:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7597 .loc 1 2379 6 view .LVU2356 - 7598 000e 0022 movs r2, #0 - 7599 .LVL728: -2379:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7600 .loc 1 2379 6 view .LVU2357 - 7601 0010 1A60 str r2, [r3] -2380:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7602 .loc 1 2380 2 is_stmt 1 view .LVU2358 -2380:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7603 .loc 1 2380 7 is_stmt 0 view .LVU2359 - ARM GAS /tmp/ccEQxcUB.s page 521 + 7536 .loc 1 3277 10 is_stmt 0 view .LVU2326 + 7537 00ee 0022 movs r2, #0 + 7538 .LVL711: + 7539 .L389: +3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7540 .loc 1 3278 42 is_stmt 1 discriminator 1 view .LVU2327 + 7541 .LBB618: + 7542 .LBI618: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7543 .loc 4 916 26 view .LVU2328 + 7544 .LBB619: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7545 .loc 4 918 3 view .LVU2329 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7546 .loc 4 918 12 is_stmt 0 view .LVU2330 + 7547 00f0 1E4B ldr r3, .L404+4 + 7548 00f2 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7549 .loc 4 918 66 view .LVU2331 + 7550 00f4 13F0020F tst r3, #2 + 7551 00f8 04D1 bne .L390 + 7552 .LVL712: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7553 .loc 4 918 66 view .LVU2332 + 7554 .LBE619: + 7555 .LBE618: +3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7556 .loc 1 3278 42 discriminator 2 view .LVU2333 + 7557 00fa B2F5FA7F cmp r2, #500 + 7558 00fe 01D8 bhi .L390 +3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7559 .loc 1 3278 59 is_stmt 1 discriminator 3 view .LVU2334 +3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7560 .loc 1 3278 64 is_stmt 0 discriminator 3 view .LVU2335 + 7561 0100 0132 adds r2, r2, #1 + 7562 .LVL713: +3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7563 .loc 1 3278 64 discriminator 3 view .LVU2336 + 7564 0102 F5E7 b .L389 + 7565 .L390: +3279:Src/main.c **** tmp32 = 0; + 7566 .loc 1 3279 4 is_stmt 1 view .LVU2337 + 7567 .LVL714: + 7568 .LBB620: + 7569 .LBI620: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7570 .loc 4 1373 22 view .LVU2338 + 7571 .LBB621: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 7572 .loc 4 1376 3 view .LVU2339 + 7573 .loc 4 1377 3 view .LVU2340 + 7574 .loc 4 1377 10 is_stmt 0 view .LVU2341 + 7575 0104 194B ldr r3, .L404+4 + 7576 0106 9D81 strh r5, [r3, #12] @ movhi + 7577 .LVL715: + 7578 .loc 4 1377 10 view .LVU2342 + 7579 .LBE621: + ARM GAS /tmp/ccuHnxNu.s page 521 - 7604 0012 0121 movs r1, #1 - 7605 .LVL729: -2380:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7606 .loc 1 2380 7 view .LVU2360 - 7607 0014 AE48 ldr r0, .L419+4 - 7608 .LVL730: -2380:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7609 .loc 1 2380 7 view .LVU2361 - 7610 0016 FFF7FEFF bl HAL_GPIO_ReadPin - 7611 .LVL731: -2380:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7612 .loc 1 2380 5 discriminator 1 view .LVU2362 - 7613 001a 0028 cmp r0, #0 - 7614 001c 00F0D280 beq .L416 - 7615 .L396: -2395:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 7616 .loc 1 2395 2 is_stmt 1 view .LVU2363 - 7617 .LVL732: -2396:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7618 .loc 1 2396 2 view .LVU2364 -2396:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7619 .loc 1 2396 36 is_stmt 0 view .LVU2365 - 7620 0020 2B88 ldrh r3, [r5] -2396:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7621 .loc 1 2396 48 view .LVU2366 - 7622 0022 03F00103 and r3, r3, #1 -2396:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7623 .loc 1 2396 22 view .LVU2367 - 7624 0026 2370 strb r3, [r4] -2397:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7625 .loc 1 2397 2 is_stmt 1 view .LVU2368 -2397:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7626 .loc 1 2397 36 is_stmt 0 view .LVU2369 - 7627 0028 2B88 ldrh r3, [r5] -2397:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7628 .loc 1 2397 48 view .LVU2370 - 7629 002a C3F34003 ubfx r3, r3, #1, #1 -2397:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7630 .loc 1 2397 22 view .LVU2371 - 7631 002e 6370 strb r3, [r4, #1] -2398:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7632 .loc 1 2398 2 is_stmt 1 view .LVU2372 -2398:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7633 .loc 1 2398 36 is_stmt 0 view .LVU2373 - 7634 0030 2B88 ldrh r3, [r5] -2398:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7635 .loc 1 2398 48 view .LVU2374 - 7636 0032 C3F38003 ubfx r3, r3, #2, #1 -2398:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7637 .loc 1 2398 22 view .LVU2375 - 7638 0036 A370 strb r3, [r4, #2] -2399:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 7639 .loc 1 2399 2 is_stmt 1 view .LVU2376 -2399:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 7640 .loc 1 2399 35 is_stmt 0 view .LVU2377 - 7641 0038 2B88 ldrh r3, [r5] -2399:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - ARM GAS /tmp/ccEQxcUB.s page 522 + 7580 .LBE620: +3280:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7581 .loc 1 3280 4 is_stmt 1 view .LVU2343 +3281:Src/main.c **** (void) SPI2->DR; + 7582 .loc 1 3281 4 view .LVU2344 +3280:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7583 .loc 1 3280 10 is_stmt 0 view .LVU2345 + 7584 0108 0022 movs r2, #0 + 7585 .LVL716: + 7586 .L392: +3281:Src/main.c **** (void) SPI2->DR; + 7587 .loc 1 3281 43 is_stmt 1 discriminator 1 view .LVU2346 + 7588 .LBB622: + 7589 .LBI622: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7590 .loc 4 905 26 view .LVU2347 + 7591 .LBB623: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7592 .loc 4 907 3 view .LVU2348 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7593 .loc 4 907 12 is_stmt 0 view .LVU2349 + 7594 010a 184B ldr r3, .L404+4 + 7595 010c 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7596 .loc 4 907 68 view .LVU2350 + 7597 010e 13F0010F tst r3, #1 + 7598 0112 04D1 bne .L393 + 7599 .LVL717: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7600 .loc 4 907 68 view .LVU2351 + 7601 .LBE623: + 7602 .LBE622: +3281:Src/main.c **** (void) SPI2->DR; + 7603 .loc 1 3281 43 discriminator 2 view .LVU2352 + 7604 0114 B2F5FA7F cmp r2, #500 + 7605 0118 01D8 bhi .L393 +3281:Src/main.c **** (void) SPI2->DR; + 7606 .loc 1 3281 60 is_stmt 1 discriminator 3 view .LVU2353 +3281:Src/main.c **** (void) SPI2->DR; + 7607 .loc 1 3281 65 is_stmt 0 discriminator 3 view .LVU2354 + 7608 011a 0132 adds r2, r2, #1 + 7609 .LVL718: +3281:Src/main.c **** (void) SPI2->DR; + 7610 .loc 1 3281 65 discriminator 3 view .LVU2355 + 7611 011c F5E7 b .L392 + 7612 .L393: +3282:Src/main.c **** break; + 7613 .loc 1 3282 4 is_stmt 1 view .LVU2356 + 7614 011e 134B ldr r3, .L404+4 + 7615 0120 DB68 ldr r3, [r3, #12] +3283:Src/main.c **** case 4: + 7616 .loc 1 3283 3 view .LVU2357 + 7617 0122 A6E7 b .L371 + 7618 .LVL719: + 7619 .L372: +3285:Src/main.c **** //tmp32=0; + 7620 .loc 1 3285 4 view .LVU2358 + ARM GAS /tmp/ccuHnxNu.s page 522 - 7642 .loc 1 2399 47 view .LVU2378 - 7643 003a C3F3C003 ubfx r3, r3, #3, #1 -2399:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 7644 .loc 1 2399 21 view .LVU2379 - 7645 003e E370 strb r3, [r4, #3] -2400:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7646 .loc 1 2400 2 is_stmt 1 view .LVU2380 -2400:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7647 .loc 1 2400 35 is_stmt 0 view .LVU2381 - 7648 0040 2B88 ldrh r3, [r5] -2400:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7649 .loc 1 2400 47 view .LVU2382 - 7650 0042 C3F30013 ubfx r3, r3, #4, #1 -2400:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7651 .loc 1 2400 21 view .LVU2383 - 7652 0046 2371 strb r3, [r4, #4] -2401:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7653 .loc 1 2401 2 is_stmt 1 view .LVU2384 -2401:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7654 .loc 1 2401 36 is_stmt 0 view .LVU2385 - 7655 0048 2B88 ldrh r3, [r5] -2401:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7656 .loc 1 2401 48 view .LVU2386 - 7657 004a C3F34013 ubfx r3, r3, #5, #1 -2401:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7658 .loc 1 2401 22 view .LVU2387 - 7659 004e 6371 strb r3, [r4, #5] -2402:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7660 .loc 1 2402 2 is_stmt 1 view .LVU2388 -2402:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7661 .loc 1 2402 36 is_stmt 0 view .LVU2389 - 7662 0050 2B88 ldrh r3, [r5] -2402:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7663 .loc 1 2402 48 view .LVU2390 - 7664 0052 C3F38013 ubfx r3, r3, #6, #1 -2402:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7665 .loc 1 2402 22 view .LVU2391 - 7666 0056 A371 strb r3, [r4, #6] -2403:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7667 .loc 1 2403 2 is_stmt 1 view .LVU2392 -2403:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7668 .loc 1 2403 36 is_stmt 0 view .LVU2393 - 7669 0058 2B88 ldrh r3, [r5] -2403:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7670 .loc 1 2403 48 view .LVU2394 - 7671 005a C3F3C013 ubfx r3, r3, #7, #1 -2403:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7672 .loc 1 2403 22 view .LVU2395 - 7673 005e E371 strb r3, [r4, #7] -2404:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7674 .loc 1 2404 2 is_stmt 1 view .LVU2396 -2404:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7675 .loc 1 2404 36 is_stmt 0 view .LVU2397 - 7676 0060 2B88 ldrh r3, [r5] -2404:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7677 .loc 1 2404 48 view .LVU2398 - 7678 0062 C3F30023 ubfx r3, r3, #8, #1 - ARM GAS /tmp/ccEQxcUB.s page 523 + 7621 0124 0022 movs r2, #0 + 7622 0126 4FF48071 mov r1, #256 + 7623 012a 1348 ldr r0, .L404+16 + 7624 012c FFF7FEFF bl HAL_GPIO_WritePin + 7625 .LVL720: +3288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7626 .loc 1 3288 4 view .LVU2359 +3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7627 .loc 1 3289 4 view .LVU2360 +3288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7628 .loc 1 3288 10 is_stmt 0 view .LVU2361 + 7629 0130 0022 movs r2, #0 + 7630 .LVL721: + 7631 .L395: +3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7632 .loc 1 3289 42 is_stmt 1 discriminator 1 view .LVU2362 + 7633 .LBB624: + 7634 .LBI624: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7635 .loc 4 916 26 view .LVU2363 + 7636 .LBB625: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7637 .loc 4 918 3 view .LVU2364 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7638 .loc 4 918 12 is_stmt 0 view .LVU2365 + 7639 0132 124B ldr r3, .L404+20 + 7640 0134 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7641 .loc 4 918 66 view .LVU2366 + 7642 0136 13F0020F tst r3, #2 + 7643 013a 04D1 bne .L396 + 7644 .LVL722: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7645 .loc 4 918 66 view .LVU2367 + 7646 .LBE625: + 7647 .LBE624: +3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7648 .loc 1 3289 42 discriminator 2 view .LVU2368 + 7649 013c B2F5FA7F cmp r2, #500 + 7650 0140 01D8 bhi .L396 +3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7651 .loc 1 3289 59 is_stmt 1 discriminator 3 view .LVU2369 +3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7652 .loc 1 3289 64 is_stmt 0 discriminator 3 view .LVU2370 + 7653 0142 0132 adds r2, r2, #1 + 7654 .LVL723: +3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7655 .loc 1 3289 64 discriminator 3 view .LVU2371 + 7656 0144 F5E7 b .L395 + 7657 .L396: +3290:Src/main.c **** tmp32 = 0; + 7658 .loc 1 3290 4 is_stmt 1 view .LVU2372 + 7659 .LVL724: + 7660 .LBB626: + 7661 .LBI626: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7662 .loc 4 1373 22 view .LVU2373 + ARM GAS /tmp/ccuHnxNu.s page 523 -2404:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7679 .loc 1 2404 22 view .LVU2399 - 7680 0066 2372 strb r3, [r4, #8] -2405:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7681 .loc 1 2405 2 is_stmt 1 view .LVU2400 -2405:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7682 .loc 1 2405 35 is_stmt 0 view .LVU2401 - 7683 0068 2B88 ldrh r3, [r5] -2405:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7684 .loc 1 2405 47 view .LVU2402 - 7685 006a C3F34023 ubfx r3, r3, #9, #1 -2405:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7686 .loc 1 2405 21 view .LVU2403 - 7687 006e 6372 strb r3, [r4, #9] -2406:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7688 .loc 1 2406 2 is_stmt 1 view .LVU2404 -2406:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7689 .loc 1 2406 35 is_stmt 0 view .LVU2405 - 7690 0070 2B88 ldrh r3, [r5] -2406:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7691 .loc 1 2406 48 view .LVU2406 - 7692 0072 C3F38023 ubfx r3, r3, #10, #1 -2406:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7693 .loc 1 2406 21 view .LVU2407 - 7694 0076 A372 strb r3, [r4, #10] -2407:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7695 .loc 1 2407 2 is_stmt 1 view .LVU2408 -2407:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7696 .loc 1 2407 34 is_stmt 0 view .LVU2409 - 7697 0078 2B88 ldrh r3, [r5] -2407:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7698 .loc 1 2407 47 view .LVU2410 - 7699 007a C3F3C023 ubfx r3, r3, #11, #1 -2407:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7700 .loc 1 2407 20 view .LVU2411 - 7701 007e E372 strb r3, [r4, #11] -2408:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7702 .loc 1 2408 2 is_stmt 1 view .LVU2412 -2408:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7703 .loc 1 2408 35 is_stmt 0 view .LVU2413 - 7704 0080 2B88 ldrh r3, [r5] -2408:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7705 .loc 1 2408 48 view .LVU2414 - 7706 0082 C3F30033 ubfx r3, r3, #12, #1 -2408:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7707 .loc 1 2408 21 view .LVU2415 - 7708 0086 2373 strb r3, [r4, #12] -2409:Src/main.c **** - 7709 .loc 1 2409 2 is_stmt 1 view .LVU2416 -2409:Src/main.c **** - 7710 .loc 1 2409 35 is_stmt 0 view .LVU2417 - 7711 0088 2B88 ldrh r3, [r5] -2409:Src/main.c **** - 7712 .loc 1 2409 48 view .LVU2418 - 7713 008a C3F34033 ubfx r3, r3, #13, #1 -2409:Src/main.c **** - 7714 .loc 1 2409 21 view .LVU2419 - ARM GAS /tmp/ccEQxcUB.s page 524 + 7663 .LBB627: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 7664 .loc 4 1376 3 view .LVU2374 + 7665 .loc 4 1377 3 view .LVU2375 + 7666 .loc 4 1377 10 is_stmt 0 view .LVU2376 + 7667 0146 0D4B ldr r3, .L404+20 + 7668 0148 9D81 strh r5, [r3, #12] @ movhi + 7669 .LVL725: + 7670 .loc 4 1377 10 view .LVU2377 + 7671 .LBE627: + 7672 .LBE626: +3291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7673 .loc 1 3291 4 is_stmt 1 view .LVU2378 +3292:Src/main.c **** (void) SPI6->DR; + 7674 .loc 1 3292 4 view .LVU2379 +3291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7675 .loc 1 3291 10 is_stmt 0 view .LVU2380 + 7676 014a 0022 movs r2, #0 + 7677 .LVL726: + 7678 .L398: +3292:Src/main.c **** (void) SPI6->DR; + 7679 .loc 1 3292 43 is_stmt 1 discriminator 1 view .LVU2381 + 7680 .LBB628: + 7681 .LBI628: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7682 .loc 4 905 26 view .LVU2382 + 7683 .LBB629: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7684 .loc 4 907 3 view .LVU2383 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7685 .loc 4 907 12 is_stmt 0 view .LVU2384 + 7686 014c 0B4B ldr r3, .L404+20 + 7687 014e 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7688 .loc 4 907 68 view .LVU2385 + 7689 0150 13F0010F tst r3, #1 + 7690 0154 04D1 bne .L399 + 7691 .LVL727: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7692 .loc 4 907 68 view .LVU2386 + 7693 .LBE629: + 7694 .LBE628: +3292:Src/main.c **** (void) SPI6->DR; + 7695 .loc 1 3292 43 discriminator 2 view .LVU2387 + 7696 0156 B2F5FA7F cmp r2, #500 + 7697 015a 01D8 bhi .L399 +3292:Src/main.c **** (void) SPI6->DR; + 7698 .loc 1 3292 60 is_stmt 1 discriminator 3 view .LVU2388 +3292:Src/main.c **** (void) SPI6->DR; + 7699 .loc 1 3292 65 is_stmt 0 discriminator 3 view .LVU2389 + 7700 015c 0132 adds r2, r2, #1 + 7701 .LVL728: +3292:Src/main.c **** (void) SPI6->DR; + 7702 .loc 1 3292 65 discriminator 3 view .LVU2390 + 7703 015e F5E7 b .L398 + 7704 .L399: +3293:Src/main.c **** break; + ARM GAS /tmp/ccuHnxNu.s page 524 - 7715 008e 6373 strb r3, [r4, #13] -2411:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 7716 .loc 1 2411 2 is_stmt 1 view .LVU2420 - 7717 .LVL733: -2412:Src/main.c **** temp2++; - 7718 .loc 1 2412 2 view .LVU2421 -2412:Src/main.c **** temp2++; - 7719 .loc 1 2412 28 is_stmt 0 view .LVU2422 - 7720 0090 6B88 ldrh r3, [r5, #2] -2412:Src/main.c **** temp2++; - 7721 .loc 1 2412 26 view .LVU2423 - 7722 0092 3B80 strh r3, [r7] @ movhi -2413:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 7723 .loc 1 2413 2 is_stmt 1 view .LVU2424 - 7724 .LVL734: -2414:Src/main.c **** temp2++; - 7725 .loc 1 2414 2 view .LVU2425 -2414:Src/main.c **** temp2++; - 7726 .loc 1 2414 28 is_stmt 0 view .LVU2426 - 7727 0094 AB88 ldrh r3, [r5, #4] -2414:Src/main.c **** temp2++; - 7728 .loc 1 2414 26 view .LVU2427 - 7729 0096 3380 strh r3, [r6] @ movhi -2415:Src/main.c **** temp2++; - 7730 .loc 1 2415 2 is_stmt 1 view .LVU2428 - 7731 .LVL735: -2416:Src/main.c **** temp2++; - 7732 .loc 1 2416 2 view .LVU2429 -2417:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); - 7733 .loc 1 2417 2 view .LVU2430 -2418:Src/main.c **** temp2++; - 7734 .loc 1 2418 2 view .LVU2431 -2418:Src/main.c **** temp2++; - 7735 .loc 1 2418 25 is_stmt 0 view .LVU2432 - 7736 0098 6B89 ldrh r3, [r5, #10] -2418:Src/main.c **** temp2++; - 7737 .loc 1 2418 23 view .LVU2433 - 7738 009a E381 strh r3, [r4, #14] @ movhi -2419:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7739 .loc 1 2419 2 is_stmt 1 view .LVU2434 - 7740 .LVL736: -2420:Src/main.c **** temp2++; - 7741 .loc 1 2420 2 view .LVU2435 -2420:Src/main.c **** temp2++; - 7742 .loc 1 2420 51 is_stmt 0 view .LVU2436 - 7743 009c AB89 ldrh r3, [r5, #12] - 7744 009e 07EE903A vmov s15, r3 @ int -2420:Src/main.c **** temp2++; - 7745 .loc 1 2420 32 view .LVU2437 - 7746 00a2 F8EE677A vcvt.f32.u32 s15, s15 -2420:Src/main.c **** temp2++; - 7747 .loc 1 2420 59 view .LVU2438 - 7748 00a6 9FED8B7A vldr.32 s14, .L419+8 - 7749 00aa 67EE877A vmul.f32 s15, s15, s14 -2420:Src/main.c **** temp2++; - 7750 .loc 1 2420 30 view .LVU2439 - 7751 00ae C7ED017A vstr.32 s15, [r7, #4] - ARM GAS /tmp/ccEQxcUB.s page 525 + 7705 .loc 1 3293 4 is_stmt 1 view .LVU2391 + 7706 0160 064B ldr r3, .L404+20 + 7707 0162 DB68 ldr r3, [r3, #12] +3294:Src/main.c **** } + 7708 .loc 1 3294 3 view .LVU2392 + 7709 0164 85E7 b .L371 + 7710 .L405: + 7711 0166 00BF .align 2 + 7712 .L404: + 7713 0168 00040240 .word 1073873920 + 7714 016c 00380040 .word 1073756160 + 7715 0170 00000240 .word 1073872896 + 7716 0174 000C0240 .word 1073875968 + 7717 0178 00100240 .word 1073876992 + 7718 017c 00540140 .word 1073828864 + 7719 .cfi_endproc + 7720 .LFE1227: + 7722 .section .text.Decode_uart,"ax",%progbits + 7723 .align 1 + 7724 .syntax unified + 7725 .thumb + 7726 .thumb_func + 7728 Decode_uart: + 7729 .LVL729: + 7730 .LFB1209: +2391:Src/main.c **** // uint8_t *temp1; + 7731 .loc 1 2391 1 view -0 + 7732 .cfi_startproc + 7733 @ args = 0, pretend = 0, frame = 0 + 7734 @ frame_needed = 0, uses_anonymous_args = 0 +2391:Src/main.c **** // uint8_t *temp1; + 7735 .loc 1 2391 1 is_stmt 0 view .LVU2394 + 7736 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 7737 .LCFI71: + 7738 .cfi_def_cfa_offset 32 + 7739 .cfi_offset 3, -32 + 7740 .cfi_offset 4, -28 + 7741 .cfi_offset 5, -24 + 7742 .cfi_offset 6, -20 + 7743 .cfi_offset 7, -16 + 7744 .cfi_offset 8, -12 + 7745 .cfi_offset 9, -8 + 7746 .cfi_offset 14, -4 + 7747 0004 0546 mov r5, r0 + 7748 0006 0F46 mov r7, r1 + 7749 0008 1646 mov r6, r2 + 7750 000a 1C46 mov r4, r3 +2393:Src/main.c **** + 7751 .loc 1 2393 2 is_stmt 1 view .LVU2395 +2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 7752 .loc 1 2398 2 view .LVU2396 +2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 7753 .loc 1 2398 6 is_stmt 0 view .LVU2397 + 7754 000c AF4B ldr r3, .L430 + 7755 .LVL730: +2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 7756 .loc 1 2398 6 view .LVU2398 + ARM GAS /tmp/ccuHnxNu.s page 525 -2421:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7752 .loc 1 2421 2 is_stmt 1 view .LVU2440 - 7753 .LVL737: -2422:Src/main.c **** temp2++; - 7754 .loc 1 2422 2 view .LVU2441 -2422:Src/main.c **** temp2++; - 7755 .loc 1 2422 51 is_stmt 0 view .LVU2442 - 7756 00b2 EB89 ldrh r3, [r5, #14] - 7757 00b4 07EE903A vmov s15, r3 @ int -2422:Src/main.c **** temp2++; - 7758 .loc 1 2422 32 view .LVU2443 - 7759 00b8 F8EE677A vcvt.f32.u32 s15, s15 -2422:Src/main.c **** temp2++; - 7760 .loc 1 2422 59 view .LVU2444 - 7761 00bc 67EE877A vmul.f32 s15, s15, s14 -2422:Src/main.c **** temp2++; - 7762 .loc 1 2422 30 view .LVU2445 - 7763 00c0 C7ED027A vstr.32 s15, [r7, #8] -2423:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7764 .loc 1 2423 2 is_stmt 1 view .LVU2446 - 7765 .LVL738: -2424:Src/main.c **** temp2++; - 7766 .loc 1 2424 2 view .LVU2447 -2424:Src/main.c **** temp2++; - 7767 .loc 1 2424 51 is_stmt 0 view .LVU2448 - 7768 00c4 2B8A ldrh r3, [r5, #16] - 7769 00c6 07EE903A vmov s15, r3 @ int -2424:Src/main.c **** temp2++; - 7770 .loc 1 2424 32 view .LVU2449 - 7771 00ca F8EE677A vcvt.f32.u32 s15, s15 -2424:Src/main.c **** temp2++; - 7772 .loc 1 2424 59 view .LVU2450 - 7773 00ce 67EE877A vmul.f32 s15, s15, s14 -2424:Src/main.c **** temp2++; - 7774 .loc 1 2424 30 view .LVU2451 - 7775 00d2 C6ED017A vstr.32 s15, [r6, #4] -2425:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7776 .loc 1 2425 2 is_stmt 1 view .LVU2452 - 7777 .LVL739: -2426:Src/main.c **** temp2++; - 7778 .loc 1 2426 2 view .LVU2453 -2426:Src/main.c **** temp2++; - 7779 .loc 1 2426 51 is_stmt 0 view .LVU2454 - 7780 00d6 6B8A ldrh r3, [r5, #18] - 7781 00d8 07EE903A vmov s15, r3 @ int -2426:Src/main.c **** temp2++; - 7782 .loc 1 2426 32 view .LVU2455 - 7783 00dc F8EE677A vcvt.f32.u32 s15, s15 -2426:Src/main.c **** temp2++; - 7784 .loc 1 2426 59 view .LVU2456 - 7785 00e0 67EE877A vmul.f32 s15, s15, s14 -2426:Src/main.c **** temp2++; - 7786 .loc 1 2426 30 view .LVU2457 - 7787 00e4 C6ED027A vstr.32 s15, [r6, #8] -2427:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID - 7788 .loc 1 2427 2 is_stmt 1 view .LVU2458 - 7789 .LVL740: - ARM GAS /tmp/ccEQxcUB.s page 526 + 7757 000e 0022 movs r2, #0 + 7758 .LVL731: +2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 7759 .loc 1 2398 6 view .LVU2399 + 7760 0010 1A60 str r2, [r3] +2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7761 .loc 1 2399 2 is_stmt 1 view .LVU2400 +2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7762 .loc 1 2399 7 is_stmt 0 view .LVU2401 + 7763 0012 0121 movs r1, #1 + 7764 .LVL732: +2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7765 .loc 1 2399 7 view .LVU2402 + 7766 0014 AE48 ldr r0, .L430+4 + 7767 .LVL733: +2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7768 .loc 1 2399 7 view .LVU2403 + 7769 0016 FFF7FEFF bl HAL_GPIO_ReadPin + 7770 .LVL734: +2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7771 .loc 1 2399 5 discriminator 1 view .LVU2404 + 7772 001a 0028 cmp r0, #0 + 7773 001c 00F0D280 beq .L427 + 7774 .L407: +2414:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 7775 .loc 1 2414 2 is_stmt 1 view .LVU2405 + 7776 .LVL735: +2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7777 .loc 1 2415 2 view .LVU2406 +2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7778 .loc 1 2415 36 is_stmt 0 view .LVU2407 + 7779 0020 2B88 ldrh r3, [r5] +2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7780 .loc 1 2415 48 view .LVU2408 + 7781 0022 03F00103 and r3, r3, #1 +2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7782 .loc 1 2415 22 view .LVU2409 + 7783 0026 2370 strb r3, [r4] +2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7784 .loc 1 2416 2 is_stmt 1 view .LVU2410 +2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7785 .loc 1 2416 36 is_stmt 0 view .LVU2411 + 7786 0028 2B88 ldrh r3, [r5] +2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7787 .loc 1 2416 48 view .LVU2412 + 7788 002a C3F34003 ubfx r3, r3, #1, #1 +2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7789 .loc 1 2416 22 view .LVU2413 + 7790 002e 6370 strb r3, [r4, #1] +2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7791 .loc 1 2417 2 is_stmt 1 view .LVU2414 +2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7792 .loc 1 2417 36 is_stmt 0 view .LVU2415 + 7793 0030 2B88 ldrh r3, [r5] +2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7794 .loc 1 2417 48 view .LVU2416 + 7795 0032 C3F38003 ubfx r3, r3, #2, #1 + ARM GAS /tmp/ccuHnxNu.s page 526 -2428:Src/main.c **** temp2++; - 7790 .loc 1 2428 2 view .LVU2459 -2428:Src/main.c **** temp2++; - 7791 .loc 1 2428 18 is_stmt 0 view .LVU2460 - 7792 00e8 AA8A ldrh r2, [r5, #20] -2428:Src/main.c **** temp2++; - 7793 .loc 1 2428 16 view .LVU2461 - 7794 00ea 7B4B ldr r3, .L419+12 - 7795 00ec 5A83 strh r2, [r3, #26] @ movhi -2429:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); - 7796 .loc 1 2429 2 is_stmt 1 view .LVU2462 - 7797 .LVL741: -2430:Src/main.c **** temp2++; - 7798 .loc 1 2430 2 view .LVU2463 -2430:Src/main.c **** temp2++; - 7799 .loc 1 2430 28 is_stmt 0 view .LVU2464 - 7800 00ee EB8A ldrh r3, [r5, #22] -2430:Src/main.c **** temp2++; - 7801 .loc 1 2430 26 view .LVU2465 - 7802 00f0 BB81 strh r3, [r7, #12] @ movhi -2431:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); - 7803 .loc 1 2431 2 is_stmt 1 view .LVU2466 - 7804 .LVL742: -2432:Src/main.c **** temp2++; - 7805 .loc 1 2432 2 view .LVU2467 -2432:Src/main.c **** temp2++; - 7806 .loc 1 2432 28 is_stmt 0 view .LVU2468 - 7807 00f2 2B8B ldrh r3, [r5, #24] -2432:Src/main.c **** temp2++; - 7808 .loc 1 2432 26 view .LVU2469 - 7809 00f4 B381 strh r3, [r6, #12] @ movhi -2433:Src/main.c **** - 7810 .loc 1 2433 2 is_stmt 1 view .LVU2470 - 7811 .LVL743: -2435:Src/main.c **** { - 7812 .loc 1 2435 2 view .LVU2471 -2435:Src/main.c **** { - 7813 .loc 1 2435 16 is_stmt 0 view .LVU2472 - 7814 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 -2435:Src/main.c **** { - 7815 .loc 1 2435 5 view .LVU2473 - 7816 00f8 002B cmp r3, #0 - 7817 00fa 00F09580 beq .L397 -2437:Src/main.c **** } - 7818 .loc 1 2437 3 is_stmt 1 view .LVU2474 - 7819 00fe 0122 movs r2, #1 - 7820 0100 0821 movs r1, #8 - 7821 0102 7648 ldr r0, .L419+16 - 7822 0104 FFF7FEFF bl HAL_GPIO_WritePin - 7823 .LVL744: - 7824 .L398: -2444:Src/main.c **** { - 7825 .loc 1 2444 2 view .LVU2475 -2444:Src/main.c **** { - 7826 .loc 1 2444 16 is_stmt 0 view .LVU2476 - 7827 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 -2444:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 527 +2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7796 .loc 1 2417 22 view .LVU2417 + 7797 0036 A370 strb r3, [r4, #2] +2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7798 .loc 1 2418 2 is_stmt 1 view .LVU2418 +2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7799 .loc 1 2418 35 is_stmt 0 view .LVU2419 + 7800 0038 2B88 ldrh r3, [r5] +2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7801 .loc 1 2418 47 view .LVU2420 + 7802 003a C3F3C003 ubfx r3, r3, #3, #1 +2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7803 .loc 1 2418 21 view .LVU2421 + 7804 003e E370 strb r3, [r4, #3] +2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7805 .loc 1 2419 2 is_stmt 1 view .LVU2422 +2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7806 .loc 1 2419 35 is_stmt 0 view .LVU2423 + 7807 0040 2B88 ldrh r3, [r5] +2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7808 .loc 1 2419 47 view .LVU2424 + 7809 0042 C3F30013 ubfx r3, r3, #4, #1 +2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7810 .loc 1 2419 21 view .LVU2425 + 7811 0046 2371 strb r3, [r4, #4] +2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7812 .loc 1 2420 2 is_stmt 1 view .LVU2426 +2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7813 .loc 1 2420 36 is_stmt 0 view .LVU2427 + 7814 0048 2B88 ldrh r3, [r5] +2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7815 .loc 1 2420 48 view .LVU2428 + 7816 004a C3F34013 ubfx r3, r3, #5, #1 +2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7817 .loc 1 2420 22 view .LVU2429 + 7818 004e 6371 strb r3, [r4, #5] +2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7819 .loc 1 2421 2 is_stmt 1 view .LVU2430 +2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7820 .loc 1 2421 36 is_stmt 0 view .LVU2431 + 7821 0050 2B88 ldrh r3, [r5] +2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7822 .loc 1 2421 48 view .LVU2432 + 7823 0052 C3F38013 ubfx r3, r3, #6, #1 +2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7824 .loc 1 2421 22 view .LVU2433 + 7825 0056 A371 strb r3, [r4, #6] +2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7826 .loc 1 2422 2 is_stmt 1 view .LVU2434 +2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7827 .loc 1 2422 36 is_stmt 0 view .LVU2435 + 7828 0058 2B88 ldrh r3, [r5] +2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7829 .loc 1 2422 48 view .LVU2436 + 7830 005a C3F3C013 ubfx r3, r3, #7, #1 +2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7831 .loc 1 2422 22 view .LVU2437 + ARM GAS /tmp/ccuHnxNu.s page 527 - 7828 .loc 1 2444 5 view .LVU2477 - 7829 010a 002B cmp r3, #0 - 7830 010c 00F09280 beq .L399 -2446:Src/main.c **** } - 7831 .loc 1 2446 3 is_stmt 1 view .LVU2478 - 7832 0110 0122 movs r2, #1 - 7833 0112 8021 movs r1, #128 - 7834 0114 7148 ldr r0, .L419+16 - 7835 0116 FFF7FEFF bl HAL_GPIO_WritePin - 7836 .LVL745: - 7837 .L400: -2453:Src/main.c **** { - 7838 .loc 1 2453 2 view .LVU2479 -2453:Src/main.c **** { - 7839 .loc 1 2453 16 is_stmt 0 view .LVU2480 - 7840 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 -2453:Src/main.c **** { - 7841 .loc 1 2453 5 view .LVU2481 - 7842 011c 002B cmp r3, #0 - 7843 011e 00F08F80 beq .L401 -2455:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC - 7844 .loc 1 2455 3 is_stmt 1 view .LVU2482 - 7845 0122 0122 movs r2, #1 - 7846 0124 4FF48071 mov r1, #256 - 7847 0128 6948 ldr r0, .L419+4 - 7848 012a FFF7FEFF bl HAL_GPIO_WritePin - 7849 .LVL746: - 7850 .L402: -2464:Src/main.c **** { - 7851 .loc 1 2464 2 view .LVU2483 -2464:Src/main.c **** { - 7852 .loc 1 2464 16 is_stmt 0 view .LVU2484 - 7853 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 -2464:Src/main.c **** { - 7854 .loc 1 2464 5 view .LVU2485 - 7855 0130 002B cmp r3, #0 - 7856 0132 00F08C80 beq .L403 -2466:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC - 7857 .loc 1 2466 3 is_stmt 1 view .LVU2486 - 7858 0136 0122 movs r2, #1 - 7859 0138 1021 movs r1, #16 - 7860 013a 6848 ldr r0, .L419+16 - 7861 013c FFF7FEFF bl HAL_GPIO_WritePin - 7862 .LVL747: - 7863 .L404: -2475:Src/main.c **** { - 7864 .loc 1 2475 2 view .LVU2487 -2475:Src/main.c **** { - 7865 .loc 1 2475 16 is_stmt 0 view .LVU2488 - 7866 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 -2475:Src/main.c **** { - 7867 .loc 1 2475 5 view .LVU2489 - 7868 0142 002B cmp r3, #0 - 7869 0144 00F08980 beq .L405 -2477:Src/main.c **** } - 7870 .loc 1 2477 3 is_stmt 1 view .LVU2490 - 7871 0148 0122 movs r2, #1 - ARM GAS /tmp/ccEQxcUB.s page 528 + 7832 005e E371 strb r3, [r4, #7] +2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7833 .loc 1 2423 2 is_stmt 1 view .LVU2438 +2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7834 .loc 1 2423 36 is_stmt 0 view .LVU2439 + 7835 0060 2B88 ldrh r3, [r5] +2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7836 .loc 1 2423 48 view .LVU2440 + 7837 0062 C3F30023 ubfx r3, r3, #8, #1 +2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7838 .loc 1 2423 22 view .LVU2441 + 7839 0066 2372 strb r3, [r4, #8] +2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7840 .loc 1 2424 2 is_stmt 1 view .LVU2442 +2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7841 .loc 1 2424 35 is_stmt 0 view .LVU2443 + 7842 0068 2B88 ldrh r3, [r5] +2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7843 .loc 1 2424 47 view .LVU2444 + 7844 006a C3F34023 ubfx r3, r3, #9, #1 +2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7845 .loc 1 2424 21 view .LVU2445 + 7846 006e 6372 strb r3, [r4, #9] +2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 7847 .loc 1 2425 2 is_stmt 1 view .LVU2446 +2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 7848 .loc 1 2425 35 is_stmt 0 view .LVU2447 + 7849 0070 2B88 ldrh r3, [r5] +2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 7850 .loc 1 2425 48 view .LVU2448 + 7851 0072 C3F38023 ubfx r3, r3, #10, #1 +2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 7852 .loc 1 2425 21 view .LVU2449 + 7853 0076 A372 strb r3, [r4, #10] +2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7854 .loc 1 2426 2 is_stmt 1 view .LVU2450 +2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7855 .loc 1 2426 34 is_stmt 0 view .LVU2451 + 7856 0078 2B88 ldrh r3, [r5] +2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7857 .loc 1 2426 47 view .LVU2452 + 7858 007a C3F3C023 ubfx r3, r3, #11, #1 +2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7859 .loc 1 2426 20 view .LVU2453 + 7860 007e E372 strb r3, [r4, #11] +2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7861 .loc 1 2427 2 is_stmt 1 view .LVU2454 +2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7862 .loc 1 2427 35 is_stmt 0 view .LVU2455 + 7863 0080 2B88 ldrh r3, [r5] +2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7864 .loc 1 2427 48 view .LVU2456 + 7865 0082 C3F30033 ubfx r3, r3, #12, #1 +2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7866 .loc 1 2427 21 view .LVU2457 + 7867 0086 2373 strb r3, [r4, #12] +2428:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 528 - 7872 014a 4FF48061 mov r1, #1024 - 7873 014e 6448 ldr r0, .L419+20 - 7874 0150 FFF7FEFF bl HAL_GPIO_WritePin - 7875 .LVL748: - 7876 .L406: -2484:Src/main.c **** { - 7877 .loc 1 2484 2 view .LVU2491 -2484:Src/main.c **** { - 7878 .loc 1 2484 16 is_stmt 0 view .LVU2492 - 7879 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 -2484:Src/main.c **** { - 7880 .loc 1 2484 5 view .LVU2493 - 7881 0156 002B cmp r3, #0 - 7882 0158 00F08680 beq .L407 -2486:Src/main.c **** } - 7883 .loc 1 2486 3 is_stmt 1 view .LVU2494 - 7884 015c 0122 movs r2, #1 - 7885 015e 0821 movs r1, #8 - 7886 0160 6048 ldr r0, .L419+24 - 7887 0162 FFF7FEFF bl HAL_GPIO_WritePin - 7888 .LVL749: - 7889 .L408: -2493:Src/main.c **** { - 7890 .loc 1 2493 2 view .LVU2495 -2493:Src/main.c **** { - 7891 .loc 1 2493 17 is_stmt 0 view .LVU2496 - 7892 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 -2493:Src/main.c **** { - 7893 .loc 1 2493 5 view .LVU2497 - 7894 0168 1BB1 cbz r3, .L409 -2493:Src/main.c **** { - 7895 .loc 1 2493 39 discriminator 1 view .LVU2498 - 7896 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 -2493:Src/main.c **** { - 7897 .loc 1 2493 26 discriminator 1 view .LVU2499 - 7898 016c 002B cmp r3, #0 - 7899 016e 40F08180 bne .L417 - 7900 .L409: -2502:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 7901 .loc 1 2502 3 is_stmt 1 view .LVU2500 - 7902 0172 0022 movs r2, #0 - 7903 0174 0121 movs r1, #1 - 7904 0176 5B48 ldr r0, .L419+24 - 7905 0178 FFF7FEFF bl HAL_GPIO_WritePin - 7906 .LVL750: -2503:Src/main.c **** } - 7907 .loc 1 2503 3 view .LVU2501 - 7908 017c 0022 movs r2, #0 - 7909 017e 4FF40061 mov r1, #2048 - 7910 0182 5748 ldr r0, .L419+20 - 7911 0184 FFF7FEFF bl HAL_GPIO_WritePin - 7912 .LVL751: - 7913 .L410: -2506:Src/main.c **** { - 7914 .loc 1 2506 2 view .LVU2502 -2506:Src/main.c **** { - 7915 .loc 1 2506 17 is_stmt 0 view .LVU2503 - ARM GAS /tmp/ccEQxcUB.s page 529 + 7868 .loc 1 2428 2 is_stmt 1 view .LVU2458 +2428:Src/main.c **** + 7869 .loc 1 2428 35 is_stmt 0 view .LVU2459 + 7870 0088 2B88 ldrh r3, [r5] +2428:Src/main.c **** + 7871 .loc 1 2428 48 view .LVU2460 + 7872 008a C3F34033 ubfx r3, r3, #13, #1 +2428:Src/main.c **** + 7873 .loc 1 2428 21 view .LVU2461 + 7874 008e 6373 strb r3, [r4, #13] +2430:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 7875 .loc 1 2430 2 is_stmt 1 view .LVU2462 + 7876 .LVL736: +2431:Src/main.c **** temp2++; + 7877 .loc 1 2431 2 view .LVU2463 +2431:Src/main.c **** temp2++; + 7878 .loc 1 2431 28 is_stmt 0 view .LVU2464 + 7879 0090 6B88 ldrh r3, [r5, #2] +2431:Src/main.c **** temp2++; + 7880 .loc 1 2431 26 view .LVU2465 + 7881 0092 3B80 strh r3, [r7] @ movhi +2432:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 7882 .loc 1 2432 2 is_stmt 1 view .LVU2466 + 7883 .LVL737: +2433:Src/main.c **** temp2++; + 7884 .loc 1 2433 2 view .LVU2467 +2433:Src/main.c **** temp2++; + 7885 .loc 1 2433 28 is_stmt 0 view .LVU2468 + 7886 0094 AB88 ldrh r3, [r5, #4] +2433:Src/main.c **** temp2++; + 7887 .loc 1 2433 26 view .LVU2469 + 7888 0096 3380 strh r3, [r6] @ movhi +2434:Src/main.c **** temp2++; + 7889 .loc 1 2434 2 is_stmt 1 view .LVU2470 + 7890 .LVL738: +2435:Src/main.c **** temp2++; + 7891 .loc 1 2435 2 view .LVU2471 +2436:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); + 7892 .loc 1 2436 2 view .LVU2472 +2437:Src/main.c **** temp2++; + 7893 .loc 1 2437 2 view .LVU2473 +2437:Src/main.c **** temp2++; + 7894 .loc 1 2437 25 is_stmt 0 view .LVU2474 + 7895 0098 6B89 ldrh r3, [r5, #10] +2437:Src/main.c **** temp2++; + 7896 .loc 1 2437 23 view .LVU2475 + 7897 009a E381 strh r3, [r4, #14] @ movhi +2438:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7898 .loc 1 2438 2 is_stmt 1 view .LVU2476 + 7899 .LVL739: +2439:Src/main.c **** temp2++; + 7900 .loc 1 2439 2 view .LVU2477 +2439:Src/main.c **** temp2++; + 7901 .loc 1 2439 51 is_stmt 0 view .LVU2478 + 7902 009c AB89 ldrh r3, [r5, #12] + 7903 009e 07EE903A vmov s15, r3 @ int +2439:Src/main.c **** temp2++; + ARM GAS /tmp/ccuHnxNu.s page 529 - 7916 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 -2506:Src/main.c **** { - 7917 .loc 1 2506 5 view .LVU2504 - 7918 018a 1BB1 cbz r3, .L411 -2506:Src/main.c **** { - 7919 .loc 1 2506 39 discriminator 1 view .LVU2505 - 7920 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 -2506:Src/main.c **** { - 7921 .loc 1 2506 26 discriminator 1 view .LVU2506 - 7922 018e 002B cmp r3, #0 - 7923 0190 40F08680 bne .L418 - 7924 .L411: -2515:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 7925 .loc 1 2515 3 is_stmt 1 view .LVU2507 - 7926 0194 0022 movs r2, #0 - 7927 0196 0221 movs r1, #2 - 7928 0198 5248 ldr r0, .L419+24 - 7929 019a FFF7FEFF bl HAL_GPIO_WritePin - 7930 .LVL752: -2516:Src/main.c **** } - 7931 .loc 1 2516 3 view .LVU2508 - 7932 019e 0022 movs r2, #0 - 7933 01a0 2021 movs r1, #32 - 7934 01a2 4E48 ldr r0, .L419+16 - 7935 01a4 FFF7FEFF bl HAL_GPIO_WritePin - 7936 .LVL753: - 7937 .L412: -2519:Src/main.c **** { - 7938 .loc 1 2519 2 view .LVU2509 -2519:Src/main.c **** { - 7939 .loc 1 2519 16 is_stmt 0 view .LVU2510 - 7940 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 -2519:Src/main.c **** { - 7941 .loc 1 2519 5 view .LVU2511 - 7942 01aa 1BB9 cbnz r3, .L413 -2521:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 7943 .loc 1 2521 3 is_stmt 1 view .LVU2512 -2521:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 7944 .loc 1 2521 31 is_stmt 0 view .LVU2513 - 7945 01ac 4E4B ldr r3, .L419+28 - 7946 01ae 7B60 str r3, [r7, #4] @ float + 7904 .loc 1 2439 32 view .LVU2479 + 7905 00a2 F8EE677A vcvt.f32.u32 s15, s15 +2439:Src/main.c **** temp2++; + 7906 .loc 1 2439 59 view .LVU2480 + 7907 00a6 9FED8B7A vldr.32 s14, .L430+8 + 7908 00aa 67EE877A vmul.f32 s15, s15, s14 +2439:Src/main.c **** temp2++; + 7909 .loc 1 2439 30 view .LVU2481 + 7910 00ae C7ED017A vstr.32 s15, [r7, #4] +2440:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7911 .loc 1 2440 2 is_stmt 1 view .LVU2482 + 7912 .LVL740: +2441:Src/main.c **** temp2++; + 7913 .loc 1 2441 2 view .LVU2483 +2441:Src/main.c **** temp2++; + 7914 .loc 1 2441 51 is_stmt 0 view .LVU2484 + 7915 00b2 EB89 ldrh r3, [r5, #14] + 7916 00b4 07EE903A vmov s15, r3 @ int +2441:Src/main.c **** temp2++; + 7917 .loc 1 2441 32 view .LVU2485 + 7918 00b8 F8EE677A vcvt.f32.u32 s15, s15 +2441:Src/main.c **** temp2++; + 7919 .loc 1 2441 59 view .LVU2486 + 7920 00bc 67EE877A vmul.f32 s15, s15, s14 +2441:Src/main.c **** temp2++; + 7921 .loc 1 2441 30 view .LVU2487 + 7922 00c0 C7ED027A vstr.32 s15, [r7, #8] +2442:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7923 .loc 1 2442 2 is_stmt 1 view .LVU2488 + 7924 .LVL741: +2443:Src/main.c **** temp2++; + 7925 .loc 1 2443 2 view .LVU2489 +2443:Src/main.c **** temp2++; + 7926 .loc 1 2443 51 is_stmt 0 view .LVU2490 + 7927 00c4 2B8A ldrh r3, [r5, #16] + 7928 00c6 07EE903A vmov s15, r3 @ int +2443:Src/main.c **** temp2++; + 7929 .loc 1 2443 32 view .LVU2491 + 7930 00ca F8EE677A vcvt.f32.u32 s15, s15 +2443:Src/main.c **** temp2++; + 7931 .loc 1 2443 59 view .LVU2492 + 7932 00ce 67EE877A vmul.f32 s15, s15, s14 +2443:Src/main.c **** temp2++; + 7933 .loc 1 2443 30 view .LVU2493 + 7934 00d2 C6ED017A vstr.32 s15, [r6, #4] +2444:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7935 .loc 1 2444 2 is_stmt 1 view .LVU2494 + 7936 .LVL742: +2445:Src/main.c **** temp2++; + 7937 .loc 1 2445 2 view .LVU2495 +2445:Src/main.c **** temp2++; + 7938 .loc 1 2445 51 is_stmt 0 view .LVU2496 + 7939 00d6 6B8A ldrh r3, [r5, #18] + 7940 00d8 07EE903A vmov s15, r3 @ int +2445:Src/main.c **** temp2++; + 7941 .loc 1 2445 32 view .LVU2497 + 7942 00dc F8EE677A vcvt.f32.u32 s15, s15 + ARM GAS /tmp/ccuHnxNu.s page 530 + + +2445:Src/main.c **** temp2++; + 7943 .loc 1 2445 59 view .LVU2498 + 7944 00e0 67EE877A vmul.f32 s15, s15, s14 +2445:Src/main.c **** temp2++; + 7945 .loc 1 2445 30 view .LVU2499 + 7946 00e4 C6ED027A vstr.32 s15, [r6, #8] +2446:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID + 7947 .loc 1 2446 2 is_stmt 1 view .LVU2500 + 7948 .LVL743: +2447:Src/main.c **** temp2++; + 7949 .loc 1 2447 2 view .LVU2501 +2447:Src/main.c **** temp2++; + 7950 .loc 1 2447 18 is_stmt 0 view .LVU2502 + 7951 00e8 AA8A ldrh r2, [r5, #20] +2447:Src/main.c **** temp2++; + 7952 .loc 1 2447 16 view .LVU2503 + 7953 00ea 7B4B ldr r3, .L430+12 + 7954 00ec 5A83 strh r2, [r3, #26] @ movhi +2448:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); + 7955 .loc 1 2448 2 is_stmt 1 view .LVU2504 + 7956 .LVL744: +2449:Src/main.c **** temp2++; + 7957 .loc 1 2449 2 view .LVU2505 +2449:Src/main.c **** temp2++; + 7958 .loc 1 2449 28 is_stmt 0 view .LVU2506 + 7959 00ee EB8A ldrh r3, [r5, #22] +2449:Src/main.c **** temp2++; + 7960 .loc 1 2449 26 view .LVU2507 + 7961 00f0 BB81 strh r3, [r7, #12] @ movhi +2450:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); + 7962 .loc 1 2450 2 is_stmt 1 view .LVU2508 + 7963 .LVL745: +2451:Src/main.c **** temp2++; + 7964 .loc 1 2451 2 view .LVU2509 +2451:Src/main.c **** temp2++; + 7965 .loc 1 2451 28 is_stmt 0 view .LVU2510 + 7966 00f2 2B8B ldrh r3, [r5, #24] +2451:Src/main.c **** temp2++; + 7967 .loc 1 2451 26 view .LVU2511 + 7968 00f4 B381 strh r3, [r6, #12] @ movhi +2452:Src/main.c **** + 7969 .loc 1 2452 2 is_stmt 1 view .LVU2512 + 7970 .LVL746: +2454:Src/main.c **** { + 7971 .loc 1 2454 2 view .LVU2513 +2454:Src/main.c **** { + 7972 .loc 1 2454 16 is_stmt 0 view .LVU2514 + 7973 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 +2454:Src/main.c **** { + 7974 .loc 1 2454 5 view .LVU2515 + 7975 00f8 002B cmp r3, #0 + 7976 00fa 00F09580 beq .L408 +2456:Src/main.c **** } + 7977 .loc 1 2456 3 is_stmt 1 view .LVU2516 + 7978 00fe 0122 movs r2, #1 + 7979 0100 0821 movs r1, #8 + 7980 0102 7648 ldr r0, .L430+16 + ARM GAS /tmp/ccuHnxNu.s page 531 + + + 7981 0104 FFF7FEFF bl HAL_GPIO_WritePin + 7982 .LVL747: + 7983 .L409: +2463:Src/main.c **** { + 7984 .loc 1 2463 2 view .LVU2517 +2463:Src/main.c **** { + 7985 .loc 1 2463 16 is_stmt 0 view .LVU2518 + 7986 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 +2463:Src/main.c **** { + 7987 .loc 1 2463 5 view .LVU2519 + 7988 010a 002B cmp r3, #0 + 7989 010c 00F09280 beq .L410 +2465:Src/main.c **** } + 7990 .loc 1 2465 3 is_stmt 1 view .LVU2520 + 7991 0110 0122 movs r2, #1 + 7992 0112 8021 movs r1, #128 + 7993 0114 7148 ldr r0, .L430+16 + 7994 0116 FFF7FEFF bl HAL_GPIO_WritePin + 7995 .LVL748: + 7996 .L411: +2472:Src/main.c **** { + 7997 .loc 1 2472 2 view .LVU2521 +2472:Src/main.c **** { + 7998 .loc 1 2472 16 is_stmt 0 view .LVU2522 + 7999 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 +2472:Src/main.c **** { + 8000 .loc 1 2472 5 view .LVU2523 + 8001 011c 002B cmp r3, #0 + 8002 011e 00F08F80 beq .L412 +2474:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC + 8003 .loc 1 2474 3 is_stmt 1 view .LVU2524 + 8004 0122 0122 movs r2, #1 + 8005 0124 4FF48071 mov r1, #256 + 8006 0128 6948 ldr r0, .L430+4 + 8007 012a FFF7FEFF bl HAL_GPIO_WritePin + 8008 .LVL749: + 8009 .L413: +2483:Src/main.c **** { + 8010 .loc 1 2483 2 view .LVU2525 +2483:Src/main.c **** { + 8011 .loc 1 2483 16 is_stmt 0 view .LVU2526 + 8012 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 +2483:Src/main.c **** { + 8013 .loc 1 2483 5 view .LVU2527 + 8014 0130 002B cmp r3, #0 + 8015 0132 00F08C80 beq .L414 +2485:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC + 8016 .loc 1 2485 3 is_stmt 1 view .LVU2528 + 8017 0136 0122 movs r2, #1 + 8018 0138 1021 movs r1, #16 + 8019 013a 6848 ldr r0, .L430+16 + 8020 013c FFF7FEFF bl HAL_GPIO_WritePin + 8021 .LVL750: + 8022 .L415: +2494:Src/main.c **** { + 8023 .loc 1 2494 2 view .LVU2529 +2494:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 532 + + + 8024 .loc 1 2494 16 is_stmt 0 view .LVU2530 + 8025 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 +2494:Src/main.c **** { + 8026 .loc 1 2494 5 view .LVU2531 + 8027 0142 002B cmp r3, #0 + 8028 0144 00F08980 beq .L416 +2496:Src/main.c **** } + 8029 .loc 1 2496 3 is_stmt 1 view .LVU2532 + 8030 0148 0122 movs r2, #1 + 8031 014a 4FF48061 mov r1, #1024 + 8032 014e 6448 ldr r0, .L430+20 + 8033 0150 FFF7FEFF bl HAL_GPIO_WritePin + 8034 .LVL751: + 8035 .L417: +2503:Src/main.c **** { + 8036 .loc 1 2503 2 view .LVU2533 +2503:Src/main.c **** { + 8037 .loc 1 2503 16 is_stmt 0 view .LVU2534 + 8038 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 +2503:Src/main.c **** { + 8039 .loc 1 2503 5 view .LVU2535 + 8040 0156 002B cmp r3, #0 + 8041 0158 00F08680 beq .L418 +2505:Src/main.c **** } + 8042 .loc 1 2505 3 is_stmt 1 view .LVU2536 + 8043 015c 0122 movs r2, #1 + 8044 015e 0821 movs r1, #8 + 8045 0160 6048 ldr r0, .L430+24 + 8046 0162 FFF7FEFF bl HAL_GPIO_WritePin + 8047 .LVL752: + 8048 .L419: +2512:Src/main.c **** { + 8049 .loc 1 2512 2 view .LVU2537 +2512:Src/main.c **** { + 8050 .loc 1 2512 17 is_stmt 0 view .LVU2538 + 8051 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 +2512:Src/main.c **** { + 8052 .loc 1 2512 5 view .LVU2539 + 8053 0168 1BB1 cbz r3, .L420 +2512:Src/main.c **** { + 8054 .loc 1 2512 39 discriminator 1 view .LVU2540 + 8055 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 +2512:Src/main.c **** { + 8056 .loc 1 2512 26 discriminator 1 view .LVU2541 + 8057 016c 002B cmp r3, #0 + 8058 016e 40F08180 bne .L428 + 8059 .L420: +2521:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 8060 .loc 1 2521 3 is_stmt 1 view .LVU2542 + 8061 0172 0022 movs r2, #0 + 8062 0174 0121 movs r1, #1 + 8063 0176 5B48 ldr r0, .L430+24 + 8064 0178 FFF7FEFF bl HAL_GPIO_WritePin + 8065 .LVL753: 2522:Src/main.c **** } - 7947 .loc 1 2522 3 is_stmt 1 view .LVU2514 -2522:Src/main.c **** } - 7948 .loc 1 2522 31 is_stmt 0 view .LVU2515 - 7949 01b0 4E4B ldr r3, .L419+32 - 7950 01b2 BB60 str r3, [r7, #8] @ float - 7951 .L413: + 8066 .loc 1 2522 3 view .LVU2543 + 8067 017c 0022 movs r2, #0 + ARM GAS /tmp/ccuHnxNu.s page 533 + + + 8068 017e 4FF40061 mov r1, #2048 + 8069 0182 5748 ldr r0, .L430+20 + 8070 0184 FFF7FEFF bl HAL_GPIO_WritePin + 8071 .LVL754: + 8072 .L421: 2525:Src/main.c **** { - 7952 .loc 1 2525 2 is_stmt 1 view .LVU2516 + 8073 .loc 1 2525 2 view .LVU2544 2525:Src/main.c **** { - 7953 .loc 1 2525 16 is_stmt 0 view .LVU2517 - 7954 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 + 8074 .loc 1 2525 17 is_stmt 0 view .LVU2545 + 8075 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 2525:Src/main.c **** { - 7955 .loc 1 2525 5 view .LVU2518 - 7956 01b6 1BB9 cbnz r3, .L395 -2527:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - ARM GAS /tmp/ccEQxcUB.s page 530 + 8076 .loc 1 2525 5 view .LVU2546 + 8077 018a 1BB1 cbz r3, .L422 +2525:Src/main.c **** { + 8078 .loc 1 2525 39 discriminator 1 view .LVU2547 + 8079 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 +2525:Src/main.c **** { + 8080 .loc 1 2525 26 discriminator 1 view .LVU2548 + 8081 018e 002B cmp r3, #0 + 8082 0190 40F08680 bne .L429 + 8083 .L422: +2534:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 8084 .loc 1 2534 3 is_stmt 1 view .LVU2549 + 8085 0194 0022 movs r2, #0 + 8086 0196 0221 movs r1, #2 + 8087 0198 5248 ldr r0, .L430+24 + 8088 019a FFF7FEFF bl HAL_GPIO_WritePin + 8089 .LVL755: +2535:Src/main.c **** } + 8090 .loc 1 2535 3 view .LVU2550 + 8091 019e 0022 movs r2, #0 + 8092 01a0 2021 movs r1, #32 + 8093 01a2 4E48 ldr r0, .L430+16 + 8094 01a4 FFF7FEFF bl HAL_GPIO_WritePin + 8095 .LVL756: + 8096 .L423: +2538:Src/main.c **** { + 8097 .loc 1 2538 2 view .LVU2551 +2538:Src/main.c **** { + 8098 .loc 1 2538 16 is_stmt 0 view .LVU2552 + 8099 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 +2538:Src/main.c **** { + 8100 .loc 1 2538 5 view .LVU2553 + 8101 01aa 1BB9 cbnz r3, .L424 +2540:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 8102 .loc 1 2540 3 is_stmt 1 view .LVU2554 +2540:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 8103 .loc 1 2540 31 is_stmt 0 view .LVU2555 + 8104 01ac 4E4B ldr r3, .L430+28 + 8105 01ae 7B60 str r3, [r7, #4] @ float +2541:Src/main.c **** } + 8106 .loc 1 2541 3 is_stmt 1 view .LVU2556 +2541:Src/main.c **** } + 8107 .loc 1 2541 31 is_stmt 0 view .LVU2557 + 8108 01b0 4E4B ldr r3, .L430+32 + 8109 01b2 BB60 str r3, [r7, #8] @ float + 8110 .L424: + ARM GAS /tmp/ccuHnxNu.s page 534 - 7957 .loc 1 2527 3 is_stmt 1 view .LVU2519 -2527:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 7958 .loc 1 2527 31 is_stmt 0 view .LVU2520 - 7959 01b8 4B4B ldr r3, .L419+28 - 7960 01ba 7360 str r3, [r6, #4] @ float -2528:Src/main.c **** } - 7961 .loc 1 2528 3 is_stmt 1 view .LVU2521 -2528:Src/main.c **** } - 7962 .loc 1 2528 31 is_stmt 0 view .LVU2522 - 7963 01bc 4B4B ldr r3, .L419+32 - 7964 01be B360 str r3, [r6, #8] @ float - 7965 .L395: -2530:Src/main.c **** - 7966 .loc 1 2530 1 view .LVU2523 - 7967 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} - 7968 .LVL754: - 7969 .L416: -2381:Src/main.c **** { - 7970 .loc 1 2381 6 view .LVU2524 - 7971 01c4 4FF48071 mov r1, #256 - 7972 01c8 4648 ldr r0, .L419+24 - 7973 01ca FFF7FEFF bl HAL_GPIO_ReadPin - 7974 .LVL755: -2380:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7975 .loc 1 2380 78 discriminator 1 view .LVU2525 - 7976 01ce 0128 cmp r0, #1 - 7977 01d0 7FF426AF bne .L396 -2383:Src/main.c **** if (test == 0) //0 - suc - 7978 .loc 1 2383 3 is_stmt 1 view .LVU2526 -2383:Src/main.c **** if (test == 0) //0 - suc - 7979 .loc 1 2383 10 is_stmt 0 view .LVU2527 - 7980 01d4 4648 ldr r0, .L419+36 - 7981 01d6 FFF7FEFF bl Mount_SD - 7982 .LVL756: -2383:Src/main.c **** if (test == 0) //0 - suc - 7983 .loc 1 2383 8 discriminator 1 view .LVU2528 - 7984 01da 3C4B ldr r3, .L419 - 7985 01dc 1860 str r0, [r3] -2384:Src/main.c **** { - 7986 .loc 1 2384 3 is_stmt 1 view .LVU2529 -2384:Src/main.c **** { - 7987 .loc 1 2384 6 is_stmt 0 view .LVU2530 - 7988 01de 0028 cmp r0, #0 - 7989 01e0 7FF41EAF bne .L396 -2387:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 7990 .loc 1 2387 4 is_stmt 1 view .LVU2531 -2387:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 7991 .loc 1 2387 11 is_stmt 0 view .LVU2532 - 7992 01e4 DFF80C91 ldr r9, .L419+40 - 7993 01e8 4846 mov r0, r9 - 7994 01ea FFF7FEFF bl Remove_File - 7995 .LVL757: -2387:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 7996 .loc 1 2387 9 discriminator 1 view .LVU2533 - 7997 01ee DFF8DC80 ldr r8, .L419 - 7998 01f2 C8F80000 str r0, [r8] -2388:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - ARM GAS /tmp/ccEQxcUB.s page 531 +2544:Src/main.c **** { + 8111 .loc 1 2544 2 is_stmt 1 view .LVU2558 +2544:Src/main.c **** { + 8112 .loc 1 2544 16 is_stmt 0 view .LVU2559 + 8113 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 +2544:Src/main.c **** { + 8114 .loc 1 2544 5 view .LVU2560 + 8115 01b6 1BB9 cbnz r3, .L406 +2546:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 8116 .loc 1 2546 3 is_stmt 1 view .LVU2561 +2546:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 8117 .loc 1 2546 31 is_stmt 0 view .LVU2562 + 8118 01b8 4B4B ldr r3, .L430+28 + 8119 01ba 7360 str r3, [r6, #4] @ float +2547:Src/main.c **** } + 8120 .loc 1 2547 3 is_stmt 1 view .LVU2563 +2547:Src/main.c **** } + 8121 .loc 1 2547 31 is_stmt 0 view .LVU2564 + 8122 01bc 4B4B ldr r3, .L430+32 + 8123 01be B360 str r3, [r6, #8] @ float + 8124 .L406: +2549:Src/main.c **** + 8125 .loc 1 2549 1 view .LVU2565 + 8126 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 8127 .LVL757: + 8128 .L427: +2400:Src/main.c **** { + 8129 .loc 1 2400 6 view .LVU2566 + 8130 01c4 4FF48071 mov r1, #256 + 8131 01c8 4648 ldr r0, .L430+24 + 8132 01ca FFF7FEFF bl HAL_GPIO_ReadPin + 8133 .LVL758: +2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 8134 .loc 1 2399 78 discriminator 1 view .LVU2567 + 8135 01ce 0128 cmp r0, #1 + 8136 01d0 7FF426AF bne .L407 +2402:Src/main.c **** if (test == 0) //0 - suc + 8137 .loc 1 2402 3 is_stmt 1 view .LVU2568 +2402:Src/main.c **** if (test == 0) //0 - suc + 8138 .loc 1 2402 10 is_stmt 0 view .LVU2569 + 8139 01d4 4648 ldr r0, .L430+36 + 8140 01d6 FFF7FEFF bl Mount_SD + 8141 .LVL759: +2402:Src/main.c **** if (test == 0) //0 - suc + 8142 .loc 1 2402 8 discriminator 1 view .LVU2570 + 8143 01da 3C4B ldr r3, .L430 + 8144 01dc 1860 str r0, [r3] +2403:Src/main.c **** { + 8145 .loc 1 2403 3 is_stmt 1 view .LVU2571 +2403:Src/main.c **** { + 8146 .loc 1 2403 6 is_stmt 0 view .LVU2572 + 8147 01de 0028 cmp r0, #0 + 8148 01e0 7FF41EAF bne .L407 +2406:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 8149 .loc 1 2406 4 is_stmt 1 view .LVU2573 +2406:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 8150 .loc 1 2406 11 is_stmt 0 view .LVU2574 + ARM GAS /tmp/ccuHnxNu.s page 535 - 7999 .loc 1 2388 4 is_stmt 1 view .LVU2534 -2388:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8000 .loc 1 2388 11 is_stmt 0 view .LVU2535 - 8001 01f6 4846 mov r0, r9 - 8002 01f8 FFF7FEFF bl Create_File - 8003 .LVL758: -2388:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8004 .loc 1 2388 9 discriminator 1 view .LVU2536 - 8005 01fc C8F80000 str r0, [r8] -2389:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8006 .loc 1 2389 4 is_stmt 1 view .LVU2537 -2389:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8007 .loc 1 2389 11 is_stmt 0 view .LVU2538 - 8008 0200 1E22 movs r2, #30 - 8009 0202 2946 mov r1, r5 - 8010 0204 4846 mov r0, r9 - 8011 0206 FFF7FEFF bl Write_File_byte - 8012 .LVL759: -2389:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8013 .loc 1 2389 9 discriminator 1 view .LVU2539 - 8014 020a C8F80000 str r0, [r8] -2390:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8015 .loc 1 2390 4 is_stmt 1 view .LVU2540 -2390:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8016 .loc 1 2390 11 is_stmt 0 view .LVU2541 - 8017 020e 1E22 movs r2, #30 - 8018 0210 2946 mov r1, r5 - 8019 0212 4846 mov r0, r9 - 8020 0214 FFF7FEFF bl Update_File_byte - 8021 .LVL760: -2390:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8022 .loc 1 2390 9 discriminator 1 view .LVU2542 - 8023 0218 C8F80000 str r0, [r8] -2391:Src/main.c **** } - 8024 .loc 1 2391 4 is_stmt 1 view .LVU2543 -2391:Src/main.c **** } - 8025 .loc 1 2391 11 is_stmt 0 view .LVU2544 - 8026 021c 3448 ldr r0, .L419+36 - 8027 021e FFF7FEFF bl Unmount_SD - 8028 .LVL761: -2391:Src/main.c **** } - 8029 .loc 1 2391 9 discriminator 1 view .LVU2545 - 8030 0222 C8F80000 str r0, [r8] - 8031 0226 FBE6 b .L396 - 8032 .LVL762: - 8033 .L397: -2441:Src/main.c **** } - 8034 .loc 1 2441 3 is_stmt 1 view .LVU2546 - 8035 0228 0022 movs r2, #0 - 8036 022a 0821 movs r1, #8 - 8037 022c 2B48 ldr r0, .L419+16 - 8038 022e FFF7FEFF bl HAL_GPIO_WritePin - 8039 .LVL763: - 8040 0232 69E7 b .L398 - 8041 .L399: -2450:Src/main.c **** } - 8042 .loc 1 2450 3 view .LVU2547 - ARM GAS /tmp/ccEQxcUB.s page 532 + 8151 01e4 DFF80C91 ldr r9, .L430+40 + 8152 01e8 4846 mov r0, r9 + 8153 01ea FFF7FEFF bl Remove_File + 8154 .LVL760: +2406:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 8155 .loc 1 2406 9 discriminator 1 view .LVU2575 + 8156 01ee DFF8DC80 ldr r8, .L430 + 8157 01f2 C8F80000 str r0, [r8] +2407:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8158 .loc 1 2407 4 is_stmt 1 view .LVU2576 +2407:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8159 .loc 1 2407 11 is_stmt 0 view .LVU2577 + 8160 01f6 4846 mov r0, r9 + 8161 01f8 FFF7FEFF bl Create_File + 8162 .LVL761: +2407:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8163 .loc 1 2407 9 discriminator 1 view .LVU2578 + 8164 01fc C8F80000 str r0, [r8] +2408:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8165 .loc 1 2408 4 is_stmt 1 view .LVU2579 +2408:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8166 .loc 1 2408 11 is_stmt 0 view .LVU2580 + 8167 0200 1E22 movs r2, #30 + 8168 0202 2946 mov r1, r5 + 8169 0204 4846 mov r0, r9 + 8170 0206 FFF7FEFF bl Write_File_byte + 8171 .LVL762: +2408:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8172 .loc 1 2408 9 discriminator 1 view .LVU2581 + 8173 020a C8F80000 str r0, [r8] +2409:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8174 .loc 1 2409 4 is_stmt 1 view .LVU2582 +2409:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8175 .loc 1 2409 11 is_stmt 0 view .LVU2583 + 8176 020e 1E22 movs r2, #30 + 8177 0210 2946 mov r1, r5 + 8178 0212 4846 mov r0, r9 + 8179 0214 FFF7FEFF bl Update_File_byte + 8180 .LVL763: +2409:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8181 .loc 1 2409 9 discriminator 1 view .LVU2584 + 8182 0218 C8F80000 str r0, [r8] +2410:Src/main.c **** } + 8183 .loc 1 2410 4 is_stmt 1 view .LVU2585 +2410:Src/main.c **** } + 8184 .loc 1 2410 11 is_stmt 0 view .LVU2586 + 8185 021c 3448 ldr r0, .L430+36 + 8186 021e FFF7FEFF bl Unmount_SD + 8187 .LVL764: +2410:Src/main.c **** } + 8188 .loc 1 2410 9 discriminator 1 view .LVU2587 + 8189 0222 C8F80000 str r0, [r8] + 8190 0226 FBE6 b .L407 + 8191 .LVL765: + 8192 .L408: +2460:Src/main.c **** } + 8193 .loc 1 2460 3 is_stmt 1 view .LVU2588 + ARM GAS /tmp/ccuHnxNu.s page 536 - 8043 0234 0022 movs r2, #0 - 8044 0236 8021 movs r1, #128 - 8045 0238 2848 ldr r0, .L419+16 - 8046 023a FFF7FEFF bl HAL_GPIO_WritePin - 8047 .LVL764: - 8048 023e 6CE7 b .L400 - 8049 .L401: -2460:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC - 8050 .loc 1 2460 3 view .LVU2548 - 8051 0240 0022 movs r2, #0 - 8052 0242 4FF48071 mov r1, #256 - 8053 0246 2248 ldr r0, .L419+4 - 8054 0248 FFF7FEFF bl HAL_GPIO_WritePin - 8055 .LVL765: - 8056 024c 6FE7 b .L402 - 8057 .L403: -2471:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC - 8058 .loc 1 2471 3 view .LVU2549 - 8059 024e 0022 movs r2, #0 - 8060 0250 1021 movs r1, #16 - 8061 0252 2248 ldr r0, .L419+16 - 8062 0254 FFF7FEFF bl HAL_GPIO_WritePin - 8063 .LVL766: - 8064 0258 72E7 b .L404 - 8065 .L405: -2481:Src/main.c **** } - 8066 .loc 1 2481 3 view .LVU2550 - 8067 025a 0022 movs r2, #0 - 8068 025c 4FF48061 mov r1, #1024 - 8069 0260 1F48 ldr r0, .L419+20 - 8070 0262 FFF7FEFF bl HAL_GPIO_WritePin - 8071 .LVL767: - 8072 0266 75E7 b .L406 - 8073 .L407: -2490:Src/main.c **** } - 8074 .loc 1 2490 3 view .LVU2551 - 8075 0268 0022 movs r2, #0 - 8076 026a 0821 movs r1, #8 - 8077 026c 1D48 ldr r0, .L419+24 - 8078 026e FFF7FEFF bl HAL_GPIO_WritePin - 8079 .LVL768: - 8080 0272 78E7 b .L408 - 8081 .L417: -2495:Src/main.c **** Set_LTEC(3,32767); - 8082 .loc 1 2495 3 view .LVU2552 - 8083 0274 47F6FF71 movw r1, #32767 - 8084 0278 0320 movs r0, #3 - 8085 027a FFF7FEFF bl Set_LTEC - 8086 .LVL769: -2496:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); - 8087 .loc 1 2496 3 view .LVU2553 - 8088 027e 47F6FF71 movw r1, #32767 - 8089 0282 0320 movs r0, #3 - 8090 0284 FFF7FEFF bl Set_LTEC - 8091 .LVL770: -2497:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); - 8092 .loc 1 2497 3 view .LVU2554 - ARM GAS /tmp/ccEQxcUB.s page 533 + 8194 0228 0022 movs r2, #0 + 8195 022a 0821 movs r1, #8 + 8196 022c 2B48 ldr r0, .L430+16 + 8197 022e FFF7FEFF bl HAL_GPIO_WritePin + 8198 .LVL766: + 8199 0232 69E7 b .L409 + 8200 .L410: +2469:Src/main.c **** } + 8201 .loc 1 2469 3 view .LVU2589 + 8202 0234 0022 movs r2, #0 + 8203 0236 8021 movs r1, #128 + 8204 0238 2848 ldr r0, .L430+16 + 8205 023a FFF7FEFF bl HAL_GPIO_WritePin + 8206 .LVL767: + 8207 023e 6CE7 b .L411 + 8208 .L412: +2479:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC + 8209 .loc 1 2479 3 view .LVU2590 + 8210 0240 0022 movs r2, #0 + 8211 0242 4FF48071 mov r1, #256 + 8212 0246 2248 ldr r0, .L430+4 + 8213 0248 FFF7FEFF bl HAL_GPIO_WritePin + 8214 .LVL768: + 8215 024c 6FE7 b .L413 + 8216 .L414: +2490:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC + 8217 .loc 1 2490 3 view .LVU2591 + 8218 024e 0022 movs r2, #0 + 8219 0250 1021 movs r1, #16 + 8220 0252 2248 ldr r0, .L430+16 + 8221 0254 FFF7FEFF bl HAL_GPIO_WritePin + 8222 .LVL769: + 8223 0258 72E7 b .L415 + 8224 .L416: +2500:Src/main.c **** } + 8225 .loc 1 2500 3 view .LVU2592 + 8226 025a 0022 movs r2, #0 + 8227 025c 4FF48061 mov r1, #1024 + 8228 0260 1F48 ldr r0, .L430+20 + 8229 0262 FFF7FEFF bl HAL_GPIO_WritePin + 8230 .LVL770: + 8231 0266 75E7 b .L417 + 8232 .L418: +2509:Src/main.c **** } + 8233 .loc 1 2509 3 view .LVU2593 + 8234 0268 0022 movs r2, #0 + 8235 026a 0821 movs r1, #8 + 8236 026c 1D48 ldr r0, .L430+24 + 8237 026e FFF7FEFF bl HAL_GPIO_WritePin + 8238 .LVL771: + 8239 0272 78E7 b .L419 + 8240 .L428: +2514:Src/main.c **** Set_LTEC(3,32767); + 8241 .loc 1 2514 3 view .LVU2594 + 8242 0274 47F6FF71 movw r1, #32767 + 8243 0278 0320 movs r0, #3 + 8244 027a FFF7FEFF bl Set_LTEC + ARM GAS /tmp/ccuHnxNu.s page 537 - 8093 0288 0122 movs r2, #1 - 8094 028a 4FF40061 mov r1, #2048 - 8095 028e 1448 ldr r0, .L419+20 - 8096 0290 FFF7FEFF bl HAL_GPIO_WritePin - 8097 .LVL771: -2498:Src/main.c **** } - 8098 .loc 1 2498 3 view .LVU2555 - 8099 0294 0122 movs r2, #1 - 8100 0296 1146 mov r1, r2 - 8101 0298 1248 ldr r0, .L419+24 - 8102 029a FFF7FEFF bl HAL_GPIO_WritePin - 8103 .LVL772: - 8104 029e 73E7 b .L410 - 8105 .L418: -2508:Src/main.c **** Set_LTEC(4,32767); - 8106 .loc 1 2508 3 view .LVU2556 - 8107 02a0 47F6FF71 movw r1, #32767 - 8108 02a4 0420 movs r0, #4 - 8109 02a6 FFF7FEFF bl Set_LTEC - 8110 .LVL773: -2509:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); - 8111 .loc 1 2509 3 view .LVU2557 - 8112 02aa 47F6FF71 movw r1, #32767 - 8113 02ae 0420 movs r0, #4 - 8114 02b0 FFF7FEFF bl Set_LTEC - 8115 .LVL774: -2510:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); - 8116 .loc 1 2510 3 view .LVU2558 - 8117 02b4 0122 movs r2, #1 - 8118 02b6 2021 movs r1, #32 - 8119 02b8 0848 ldr r0, .L419+16 - 8120 02ba FFF7FEFF bl HAL_GPIO_WritePin - 8121 .LVL775: -2511:Src/main.c **** } - 8122 .loc 1 2511 3 view .LVU2559 - 8123 02be 0122 movs r2, #1 - 8124 02c0 0221 movs r1, #2 - 8125 02c2 0848 ldr r0, .L419+24 - 8126 02c4 FFF7FEFF bl HAL_GPIO_WritePin - 8127 .LVL776: - 8128 02c8 6EE7 b .L412 - 8129 .L420: - 8130 02ca 00BF .align 2 - 8131 .L419: - 8132 02cc 00000000 .word test - 8133 02d0 000C0240 .word 1073875968 - 8134 02d4 0000803B .word 998244352 - 8135 02d8 00000000 .word Long_Data - 8136 02dc 00080240 .word 1073874944 - 8137 02e0 00040240 .word 1073873920 - 8138 02e4 00000240 .word 1073872896 - 8139 02e8 00002041 .word 1092616192 - 8140 02ec 0AD7233C .word 1008981770 - 8141 02f0 00000000 .word .LC0 - 8142 02f4 04000000 .word .LC1 - 8143 .cfi_endproc - 8144 .LFE1209: - ARM GAS /tmp/ccEQxcUB.s page 534 + 8245 .LVL772: +2515:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); + 8246 .loc 1 2515 3 view .LVU2595 + 8247 027e 47F6FF71 movw r1, #32767 + 8248 0282 0320 movs r0, #3 + 8249 0284 FFF7FEFF bl Set_LTEC + 8250 .LVL773: +2516:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); + 8251 .loc 1 2516 3 view .LVU2596 + 8252 0288 0122 movs r2, #1 + 8253 028a 4FF40061 mov r1, #2048 + 8254 028e 1448 ldr r0, .L430+20 + 8255 0290 FFF7FEFF bl HAL_GPIO_WritePin + 8256 .LVL774: +2517:Src/main.c **** } + 8257 .loc 1 2517 3 view .LVU2597 + 8258 0294 0122 movs r2, #1 + 8259 0296 1146 mov r1, r2 + 8260 0298 1248 ldr r0, .L430+24 + 8261 029a FFF7FEFF bl HAL_GPIO_WritePin + 8262 .LVL775: + 8263 029e 73E7 b .L421 + 8264 .L429: +2527:Src/main.c **** Set_LTEC(4,32767); + 8265 .loc 1 2527 3 view .LVU2598 + 8266 02a0 47F6FF71 movw r1, #32767 + 8267 02a4 0420 movs r0, #4 + 8268 02a6 FFF7FEFF bl Set_LTEC + 8269 .LVL776: +2528:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); + 8270 .loc 1 2528 3 view .LVU2599 + 8271 02aa 47F6FF71 movw r1, #32767 + 8272 02ae 0420 movs r0, #4 + 8273 02b0 FFF7FEFF bl Set_LTEC + 8274 .LVL777: +2529:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); + 8275 .loc 1 2529 3 view .LVU2600 + 8276 02b4 0122 movs r2, #1 + 8277 02b6 2021 movs r1, #32 + 8278 02b8 0848 ldr r0, .L430+16 + 8279 02ba FFF7FEFF bl HAL_GPIO_WritePin + 8280 .LVL778: +2530:Src/main.c **** } + 8281 .loc 1 2530 3 view .LVU2601 + 8282 02be 0122 movs r2, #1 + 8283 02c0 0221 movs r1, #2 + 8284 02c2 0848 ldr r0, .L430+24 + 8285 02c4 FFF7FEFF bl HAL_GPIO_WritePin + 8286 .LVL779: + 8287 02c8 6EE7 b .L423 + 8288 .L431: + 8289 02ca 00BF .align 2 + 8290 .L430: + 8291 02cc 00000000 .word test + 8292 02d0 000C0240 .word 1073875968 + 8293 02d4 0000803B .word 998244352 + 8294 02d8 00000000 .word Long_Data + ARM GAS /tmp/ccuHnxNu.s page 538 - 8146 .section .text.Advanced_Controller_Temp,"ax",%progbits - 8147 .align 1 - 8148 .global Advanced_Controller_Temp - 8149 .syntax unified - 8150 .thumb - 8151 .thumb_func - 8153 Advanced_Controller_Temp: - 8154 .LVL777: - 8155 .LFB1228: -3391:Src/main.c **** // Main idea: - 8156 .loc 1 3391 1 view -0 - 8157 .cfi_startproc - 8158 @ args = 0, pretend = 0, frame = 0 - 8159 @ frame_needed = 0, uses_anonymous_args = 0 - 8160 @ link register save eliminated. -3391:Src/main.c **** // Main idea: - 8161 .loc 1 3391 1 is_stmt 0 view .LVU2561 - 8162 0000 30B4 push {r4, r5} - 8163 .LCFI69: - 8164 .cfi_def_cfa_offset 8 - 8165 .cfi_offset 4, -8 - 8166 .cfi_offset 5, -4 -3409:Src/main.c **** float P_coef_current;//, I_coef_current; - 8167 .loc 1 3409 2 is_stmt 1 view .LVU2562 -3410:Src/main.c **** float e_integral; - 8168 .loc 1 3410 2 view .LVU2563 -3411:Src/main.c **** int x_output; - 8169 .loc 1 3411 2 view .LVU2564 -3412:Src/main.c **** - 8170 .loc 1 3412 2 view .LVU2565 -3414:Src/main.c **** - 8171 .loc 1 3414 2 view .LVU2566 -3414:Src/main.c **** - 8172 .loc 1 3414 28 is_stmt 0 view .LVU2567 - 8173 0002 0B88 ldrh r3, [r1] -3414:Src/main.c **** - 8174 .loc 1 3414 65 view .LVU2568 - 8175 0004 0488 ldrh r4, [r0] -3414:Src/main.c **** - 8176 .loc 1 3414 8 view .LVU2569 - 8177 0006 1B1B subs r3, r3, r4 - 8178 .LVL778: -3416:Src/main.c **** - 8179 .loc 1 3416 2 is_stmt 1 view .LVU2570 -3416:Src/main.c **** - 8180 .loc 1 3416 13 is_stmt 0 view .LVU2571 - 8181 0008 D1ED017A vldr.32 s15, [r1, #4] - 8182 .LVL779: -3418:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 8183 .loc 1 3418 2 is_stmt 1 view .LVU2572 -3418:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 8184 .loc 1 3418 20 is_stmt 0 view .LVU2573 - 8185 000c 03F6B73C addw ip, r3, #2999 -3418:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 8186 .loc 1 3418 4 view .LVU2574 - 8187 0010 41F26E74 movw r4, #5998 - 8188 0014 A445 cmp ip, r4 - ARM GAS /tmp/ccEQxcUB.s page 535 + 8295 02dc 00080240 .word 1073874944 + 8296 02e0 00040240 .word 1073873920 + 8297 02e4 00000240 .word 1073872896 + 8298 02e8 00002041 .word 1092616192 + 8299 02ec 0AD7233C .word 1008981770 + 8300 02f0 00000000 .word .LC0 + 8301 02f4 04000000 .word .LC1 + 8302 .cfi_endproc + 8303 .LFE1209: + 8305 .section .text.Advanced_Controller_Temp,"ax",%progbits + 8306 .align 1 + 8307 .global Advanced_Controller_Temp + 8308 .syntax unified + 8309 .thumb + 8310 .thumb_func + 8312 Advanced_Controller_Temp: + 8313 .LVL780: + 8314 .LFB1230: +3446:Src/main.c **** // Main idea: + 8315 .loc 1 3446 1 view -0 + 8316 .cfi_startproc + 8317 @ args = 0, pretend = 0, frame = 0 + 8318 @ frame_needed = 0, uses_anonymous_args = 0 + 8319 @ link register save eliminated. +3446:Src/main.c **** // Main idea: + 8320 .loc 1 3446 1 is_stmt 0 view .LVU2603 + 8321 0000 30B4 push {r4, r5} + 8322 .LCFI72: + 8323 .cfi_def_cfa_offset 8 + 8324 .cfi_offset 4, -8 + 8325 .cfi_offset 5, -4 +3464:Src/main.c **** float P_coef_current;//, I_coef_current; + 8326 .loc 1 3464 2 is_stmt 1 view .LVU2604 +3465:Src/main.c **** float e_integral; + 8327 .loc 1 3465 2 view .LVU2605 +3466:Src/main.c **** int x_output; + 8328 .loc 1 3466 2 view .LVU2606 +3467:Src/main.c **** + 8329 .loc 1 3467 2 view .LVU2607 +3469:Src/main.c **** + 8330 .loc 1 3469 2 view .LVU2608 +3469:Src/main.c **** + 8331 .loc 1 3469 28 is_stmt 0 view .LVU2609 + 8332 0002 0B88 ldrh r3, [r1] +3469:Src/main.c **** + 8333 .loc 1 3469 65 view .LVU2610 + 8334 0004 0488 ldrh r4, [r0] +3469:Src/main.c **** + 8335 .loc 1 3469 8 view .LVU2611 + 8336 0006 1B1B subs r3, r3, r4 + 8337 .LVL781: +3471:Src/main.c **** + 8338 .loc 1 3471 2 is_stmt 1 view .LVU2612 +3471:Src/main.c **** + 8339 .loc 1 3471 13 is_stmt 0 view .LVU2613 + 8340 0008 D1ED017A vldr.32 s15, [r1, #4] + 8341 .LVL782: + ARM GAS /tmp/ccuHnxNu.s page 539 - 8189 0016 18D8 bhi .L422 -3419:Src/main.c **** } - 8190 .loc 1 3419 3 is_stmt 1 view .LVU2575 -3419:Src/main.c **** } - 8191 .loc 1 3419 31 is_stmt 0 view .LVU2576 - 8192 0018 90ED027A vldr.32 s14, [r0, #8] -3419:Src/main.c **** } - 8193 .loc 1 3419 47 view .LVU2577 - 8194 001c 06EE903A vmov s13, r3 @ int - 8195 0020 F8EEE66A vcvt.f32.s32 s13, s13 -3419:Src/main.c **** } - 8196 .loc 1 3419 45 view .LVU2578 - 8197 0024 27EE267A vmul.f32 s14, s14, s13 -3419:Src/main.c **** } - 8198 .loc 1 3419 76 view .LVU2579 - 8199 0028 284C ldr r4, .L432 - 8200 002a 2468 ldr r4, [r4] - 8201 002c 284D ldr r5, .L432+4 - 8202 002e 2D68 ldr r5, [r5] - 8203 0030 641B subs r4, r4, r5 -3419:Src/main.c **** } - 8204 .loc 1 3419 64 view .LVU2580 - 8205 0032 06EE904A vmov s13, r4 @ int - 8206 0036 F8EE666A vcvt.f32.u32 s13, s13 -3419:Src/main.c **** } - 8207 .loc 1 3419 62 view .LVU2581 - 8208 003a 27EE267A vmul.f32 s14, s14, s13 -3419:Src/main.c **** } - 8209 .loc 1 3419 87 view .LVU2582 - 8210 003e 9FED256A vldr.32 s12, .L432+8 - 8211 0042 C7EE066A vdiv.f32 s13, s14, s12 -3419:Src/main.c **** } - 8212 .loc 1 3419 14 view .LVU2583 - 8213 0046 77EEA67A vadd.f32 s15, s15, s13 - 8214 .LVL780: - 8215 .L422: -3421:Src/main.c **** - 8216 .loc 1 3421 2 is_stmt 1 view .LVU2584 -3421:Src/main.c **** - 8217 .loc 1 3421 17 is_stmt 0 view .LVU2585 - 8218 004a D0ED016A vldr.32 s13, [r0, #4] - 8219 .LVL781: -3423:Src/main.c **** e_integral = 32000; - 8220 .loc 1 3423 2 is_stmt 1 view .LVU2586 -3423:Src/main.c **** e_integral = 32000; - 8221 .loc 1 3423 5 is_stmt 0 view .LVU2587 - 8222 004e 9FED227A vldr.32 s14, .L432+12 - 8223 0052 F4EEC77A vcmpe.f32 s15, s14 - 8224 0056 F1EE10FA vmrs APSR_nzcv, FPSCR - 8225 005a 09DC bgt .L426 -3426:Src/main.c **** e_integral = -32000; - 8226 .loc 1 3426 7 is_stmt 1 view .LVU2588 -3426:Src/main.c **** e_integral = -32000; - 8227 .loc 1 3426 10 is_stmt 0 view .LVU2589 - 8228 005c 9FED1F7A vldr.32 s14, .L432+16 - 8229 0060 F4EEC77A vcmpe.f32 s15, s14 - 8230 0064 F1EE10FA vmrs APSR_nzcv, FPSCR - ARM GAS /tmp/ccEQxcUB.s page 536 +3473:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 8342 .loc 1 3473 2 is_stmt 1 view .LVU2614 +3473:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 8343 .loc 1 3473 20 is_stmt 0 view .LVU2615 + 8344 000c 03F6B73C addw ip, r3, #2999 +3473:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 8345 .loc 1 3473 4 view .LVU2616 + 8346 0010 41F26E74 movw r4, #5998 + 8347 0014 A445 cmp ip, r4 + 8348 0016 18D8 bhi .L433 +3474:Src/main.c **** } + 8349 .loc 1 3474 3 is_stmt 1 view .LVU2617 +3474:Src/main.c **** } + 8350 .loc 1 3474 31 is_stmt 0 view .LVU2618 + 8351 0018 90ED027A vldr.32 s14, [r0, #8] +3474:Src/main.c **** } + 8352 .loc 1 3474 47 view .LVU2619 + 8353 001c 06EE903A vmov s13, r3 @ int + 8354 0020 F8EEE66A vcvt.f32.s32 s13, s13 +3474:Src/main.c **** } + 8355 .loc 1 3474 45 view .LVU2620 + 8356 0024 27EE267A vmul.f32 s14, s14, s13 +3474:Src/main.c **** } + 8357 .loc 1 3474 76 view .LVU2621 + 8358 0028 284C ldr r4, .L443 + 8359 002a 2468 ldr r4, [r4] + 8360 002c 284D ldr r5, .L443+4 + 8361 002e 2D68 ldr r5, [r5] + 8362 0030 641B subs r4, r4, r5 +3474:Src/main.c **** } + 8363 .loc 1 3474 64 view .LVU2622 + 8364 0032 06EE904A vmov s13, r4 @ int + 8365 0036 F8EE666A vcvt.f32.u32 s13, s13 +3474:Src/main.c **** } + 8366 .loc 1 3474 62 view .LVU2623 + 8367 003a 27EE267A vmul.f32 s14, s14, s13 +3474:Src/main.c **** } + 8368 .loc 1 3474 87 view .LVU2624 + 8369 003e 9FED256A vldr.32 s12, .L443+8 + 8370 0042 C7EE066A vdiv.f32 s13, s14, s12 +3474:Src/main.c **** } + 8371 .loc 1 3474 14 view .LVU2625 + 8372 0046 77EEA67A vadd.f32 s15, s15, s13 + 8373 .LVL783: + 8374 .L433: +3476:Src/main.c **** + 8375 .loc 1 3476 2 is_stmt 1 view .LVU2626 +3476:Src/main.c **** + 8376 .loc 1 3476 17 is_stmt 0 view .LVU2627 + 8377 004a D0ED016A vldr.32 s13, [r0, #4] + 8378 .LVL784: +3478:Src/main.c **** e_integral = 32000; + 8379 .loc 1 3478 2 is_stmt 1 view .LVU2628 +3478:Src/main.c **** e_integral = 32000; + 8380 .loc 1 3478 5 is_stmt 0 view .LVU2629 + 8381 004e 9FED227A vldr.32 s14, .L443+12 + 8382 0052 F4EEC77A vcmpe.f32 s15, s14 + ARM GAS /tmp/ccuHnxNu.s page 540 - 8231 0068 04D5 bpl .L423 -3427:Src/main.c **** } - 8232 .loc 1 3427 15 view .LVU2590 - 8233 006a DFED1C7A vldr.32 s15, .L432+16 - 8234 .LVL782: -3427:Src/main.c **** } - 8235 .loc 1 3427 15 view .LVU2591 - 8236 006e 01E0 b .L423 - 8237 .LVL783: - 8238 .L426: -3424:Src/main.c **** } - 8239 .loc 1 3424 15 view .LVU2592 - 8240 0070 DFED197A vldr.32 s15, .L432+12 - 8241 .LVL784: - 8242 .L423: -3429:Src/main.c **** - 8243 .loc 1 3429 2 is_stmt 1 view .LVU2593 -3429:Src/main.c **** - 8244 .loc 1 3429 26 is_stmt 0 view .LVU2594 - 8245 0074 C1ED017A vstr.32 s15, [r1, #4] -3431:Src/main.c **** - 8246 .loc 1 3431 2 is_stmt 1 view .LVU2595 -3431:Src/main.c **** - 8247 .loc 1 3431 36 is_stmt 0 view .LVU2596 - 8248 0078 07EE103A vmov s14, r3 @ int - 8249 007c B8EEC77A vcvt.f32.s32 s14, s14 - 8250 0080 27EE267A vmul.f32 s14, s14, s13 -3431:Src/main.c **** - 8251 .loc 1 3431 19 view .LVU2597 - 8252 0084 DFED166A vldr.32 s13, .L432+20 - 8253 .LVL785: -3431:Src/main.c **** - 8254 .loc 1 3431 19 view .LVU2598 - 8255 0088 37EE267A vadd.f32 s14, s14, s13 -3431:Src/main.c **** - 8256 .loc 1 3431 46 view .LVU2599 - 8257 008c FDEEE77A vcvt.s32.f32 s15, s15 - 8258 .LVL786: -3431:Src/main.c **** - 8259 .loc 1 3431 44 view .LVU2600 - 8260 0090 F8EEE77A vcvt.f32.s32 s15, s15 - 8261 0094 77EE877A vadd.f32 s15, s15, s14 -3431:Src/main.c **** - 8262 .loc 1 3431 11 view .LVU2601 - 8263 0098 FDEEE77A vcvt.s32.f32 s15, s15 - 8264 009c 17EE900A vmov r0, s15 @ int - 8265 .LVL787: -3433:Src/main.c **** x_output = 8800; - 8266 .loc 1 3433 2 is_stmt 1 view .LVU2602 -3433:Src/main.c **** x_output = 8800; - 8267 .loc 1 3433 4 is_stmt 0 view .LVU2603 - 8268 00a0 B0F57A7F cmp r0, #1000 - 8269 00a4 06DB blt .L428 -3436:Src/main.c **** x_output = 56800; - 8270 .loc 1 3436 7 is_stmt 1 view .LVU2604 -3436:Src/main.c **** x_output = 56800; - 8271 .loc 1 3436 9 is_stmt 0 view .LVU2605 - ARM GAS /tmp/ccEQxcUB.s page 537 + 8383 0056 F1EE10FA vmrs APSR_nzcv, FPSCR + 8384 005a 09DC bgt .L437 +3481:Src/main.c **** e_integral = -32000; + 8385 .loc 1 3481 7 is_stmt 1 view .LVU2630 +3481:Src/main.c **** e_integral = -32000; + 8386 .loc 1 3481 10 is_stmt 0 view .LVU2631 + 8387 005c 9FED1F7A vldr.32 s14, .L443+16 + 8388 0060 F4EEC77A vcmpe.f32 s15, s14 + 8389 0064 F1EE10FA vmrs APSR_nzcv, FPSCR + 8390 0068 04D5 bpl .L434 +3482:Src/main.c **** } + 8391 .loc 1 3482 15 view .LVU2632 + 8392 006a DFED1C7A vldr.32 s15, .L443+16 + 8393 .LVL785: +3482:Src/main.c **** } + 8394 .loc 1 3482 15 view .LVU2633 + 8395 006e 01E0 b .L434 + 8396 .LVL786: + 8397 .L437: +3479:Src/main.c **** } + 8398 .loc 1 3479 15 view .LVU2634 + 8399 0070 DFED197A vldr.32 s15, .L443+12 + 8400 .LVL787: + 8401 .L434: +3484:Src/main.c **** + 8402 .loc 1 3484 2 is_stmt 1 view .LVU2635 +3484:Src/main.c **** + 8403 .loc 1 3484 26 is_stmt 0 view .LVU2636 + 8404 0074 C1ED017A vstr.32 s15, [r1, #4] +3486:Src/main.c **** + 8405 .loc 1 3486 2 is_stmt 1 view .LVU2637 +3486:Src/main.c **** + 8406 .loc 1 3486 36 is_stmt 0 view .LVU2638 + 8407 0078 07EE103A vmov s14, r3 @ int + 8408 007c B8EEC77A vcvt.f32.s32 s14, s14 + 8409 0080 27EE267A vmul.f32 s14, s14, s13 +3486:Src/main.c **** + 8410 .loc 1 3486 19 view .LVU2639 + 8411 0084 DFED166A vldr.32 s13, .L443+20 + 8412 .LVL788: +3486:Src/main.c **** + 8413 .loc 1 3486 19 view .LVU2640 + 8414 0088 37EE267A vadd.f32 s14, s14, s13 +3486:Src/main.c **** + 8415 .loc 1 3486 46 view .LVU2641 + 8416 008c FDEEE77A vcvt.s32.f32 s15, s15 + 8417 .LVL789: +3486:Src/main.c **** + 8418 .loc 1 3486 44 view .LVU2642 + 8419 0090 F8EEE77A vcvt.f32.s32 s15, s15 + 8420 0094 77EE877A vadd.f32 s15, s15, s14 +3486:Src/main.c **** + 8421 .loc 1 3486 11 view .LVU2643 + 8422 0098 FDEEE77A vcvt.s32.f32 s15, s15 + 8423 009c 17EE900A vmov r0, s15 @ int + 8424 .LVL790: +3488:Src/main.c **** x_output = 8800; + ARM GAS /tmp/ccuHnxNu.s page 541 - 8272 00a6 4DF6E053 movw r3, #56800 - 8273 .LVL788: -3436:Src/main.c **** x_output = 56800; - 8274 .loc 1 3436 9 view .LVU2606 - 8275 00aa 9842 cmp r0, r3 - 8276 00ac 04DD ble .L424 -3437:Src/main.c **** } - 8277 .loc 1 3437 12 view .LVU2607 - 8278 00ae 4DF6E050 movw r0, #56800 - 8279 .LVL789: -3437:Src/main.c **** } - 8280 .loc 1 3437 12 view .LVU2608 - 8281 00b2 01E0 b .L424 - 8282 .LVL790: - 8283 .L428: -3434:Src/main.c **** } - 8284 .loc 1 3434 12 view .LVU2609 - 8285 00b4 42F26020 movw r0, #8800 - 8286 .LVL791: - 8287 .L424: -3440:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 8288 .loc 1 3440 2 is_stmt 1 view .LVU2610 -3440:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 8289 .loc 1 3440 5 is_stmt 0 view .LVU2611 - 8290 00b8 022A cmp r2, #2 - 8291 00ba 02D0 beq .L431 - 8292 .LVL792: - 8293 .L425: -3443:Src/main.c **** } - 8294 .loc 1 3443 2 is_stmt 1 view .LVU2612 -3444:Src/main.c **** - 8295 .loc 1 3444 1 is_stmt 0 view .LVU2613 - 8296 00bc 80B2 uxth r0, r0 - 8297 .LVL793: -3444:Src/main.c **** - 8298 .loc 1 3444 1 view .LVU2614 - 8299 00be 30BC pop {r4, r5} - 8300 .LCFI70: - 8301 .cfi_remember_state - 8302 .cfi_restore 5 - 8303 .cfi_restore 4 - 8304 .cfi_def_cfa_offset 0 - 8305 00c0 7047 bx lr - 8306 .LVL794: - 8307 .L431: - 8308 .LCFI71: - 8309 .cfi_restore_state -3441:Src/main.c **** - 8310 .loc 1 3441 3 is_stmt 1 view .LVU2615 -3441:Src/main.c **** - 8311 .loc 1 3441 11 is_stmt 0 view .LVU2616 - 8312 00c2 024B ldr r3, .L432 - 8313 00c4 1A68 ldr r2, [r3] - 8314 .LVL795: -3441:Src/main.c **** - 8315 .loc 1 3441 11 view .LVU2617 - 8316 00c6 024B ldr r3, .L432+4 - ARM GAS /tmp/ccEQxcUB.s page 538 + 8425 .loc 1 3488 2 is_stmt 1 view .LVU2644 +3488:Src/main.c **** x_output = 8800; + 8426 .loc 1 3488 4 is_stmt 0 view .LVU2645 + 8427 00a0 B0F57A7F cmp r0, #1000 + 8428 00a4 06DB blt .L439 +3491:Src/main.c **** x_output = 56800; + 8429 .loc 1 3491 7 is_stmt 1 view .LVU2646 +3491:Src/main.c **** x_output = 56800; + 8430 .loc 1 3491 9 is_stmt 0 view .LVU2647 + 8431 00a6 4DF6E053 movw r3, #56800 + 8432 .LVL791: +3491:Src/main.c **** x_output = 56800; + 8433 .loc 1 3491 9 view .LVU2648 + 8434 00aa 9842 cmp r0, r3 + 8435 00ac 04DD ble .L435 +3492:Src/main.c **** } + 8436 .loc 1 3492 12 view .LVU2649 + 8437 00ae 4DF6E050 movw r0, #56800 + 8438 .LVL792: +3492:Src/main.c **** } + 8439 .loc 1 3492 12 view .LVU2650 + 8440 00b2 01E0 b .L435 + 8441 .LVL793: + 8442 .L439: +3489:Src/main.c **** } + 8443 .loc 1 3489 12 view .LVU2651 + 8444 00b4 42F26020 movw r0, #8800 + 8445 .LVL794: + 8446 .L435: +3495:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 8447 .loc 1 3495 2 is_stmt 1 view .LVU2652 +3495:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 8448 .loc 1 3495 5 is_stmt 0 view .LVU2653 + 8449 00b8 022A cmp r2, #2 + 8450 00ba 02D0 beq .L442 + 8451 .LVL795: + 8452 .L436: +3498:Src/main.c **** } + 8453 .loc 1 3498 2 is_stmt 1 view .LVU2654 +3499:Src/main.c **** + 8454 .loc 1 3499 1 is_stmt 0 view .LVU2655 + 8455 00bc 80B2 uxth r0, r0 + 8456 .LVL796: +3499:Src/main.c **** + 8457 .loc 1 3499 1 view .LVU2656 + 8458 00be 30BC pop {r4, r5} + 8459 .LCFI73: + 8460 .cfi_remember_state + 8461 .cfi_restore 5 + 8462 .cfi_restore 4 + 8463 .cfi_def_cfa_offset 0 + 8464 00c0 7047 bx lr + 8465 .LVL797: + 8466 .L442: + 8467 .LCFI74: + 8468 .cfi_restore_state +3496:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 542 - 8317 00c8 1A60 str r2, [r3] - 8318 00ca F7E7 b .L425 - 8319 .L433: - 8320 .align 2 - 8321 .L432: - 8322 00cc 00000000 .word TO7 - 8323 00d0 00000000 .word TO7_PID - 8324 00d4 0000C842 .word 1120403456 - 8325 00d8 0000FA46 .word 1190789120 - 8326 00dc 0000FAC6 .word -956694528 - 8327 00e0 00000047 .word 1191182336 - 8328 .cfi_endproc - 8329 .LFE1228: - 8331 .section .text.CalculateChecksum,"ax",%progbits - 8332 .align 1 - 8333 .global CalculateChecksum - 8334 .syntax unified - 8335 .thumb - 8336 .thumb_func - 8338 CalculateChecksum: - 8339 .LVL796: - 8340 .LFB1231: -3507:Src/main.c **** short i; - 8341 .loc 1 3507 1 is_stmt 1 view -0 - 8342 .cfi_startproc - 8343 @ args = 0, pretend = 0, frame = 0 - 8344 @ frame_needed = 0, uses_anonymous_args = 0 - 8345 @ link register save eliminated. -3507:Src/main.c **** short i; - 8346 .loc 1 3507 1 is_stmt 0 view .LVU2619 - 8347 0000 8446 mov ip, r0 -3508:Src/main.c **** uint16_t cs = *pbuff; - 8348 .loc 1 3508 2 is_stmt 1 view .LVU2620 -3509:Src/main.c **** - 8349 .loc 1 3509 2 view .LVU2621 -3509:Src/main.c **** - 8350 .loc 1 3509 11 is_stmt 0 view .LVU2622 - 8351 0002 0088 ldrh r0, [r0] - 8352 .LVL797: -3511:Src/main.c **** { - 8353 .loc 1 3511 3 is_stmt 1 view .LVU2623 -3511:Src/main.c **** { - 8354 .loc 1 3511 9 is_stmt 0 view .LVU2624 - 8355 0004 0123 movs r3, #1 -3511:Src/main.c **** { - 8356 .loc 1 3511 3 view .LVU2625 - 8357 0006 04E0 b .L435 - 8358 .LVL798: - 8359 .L436: -3513:Src/main.c **** } - 8360 .loc 1 3513 3 is_stmt 1 view .LVU2626 -3513:Src/main.c **** } - 8361 .loc 1 3513 9 is_stmt 0 view .LVU2627 - 8362 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] -3513:Src/main.c **** } - 8363 .loc 1 3513 6 view .LVU2628 - 8364 000c 5040 eors r0, r0, r2 - ARM GAS /tmp/ccEQxcUB.s page 539 + 8469 .loc 1 3496 3 is_stmt 1 view .LVU2657 +3496:Src/main.c **** + 8470 .loc 1 3496 11 is_stmt 0 view .LVU2658 + 8471 00c2 024B ldr r3, .L443 + 8472 00c4 1A68 ldr r2, [r3] + 8473 .LVL798: +3496:Src/main.c **** + 8474 .loc 1 3496 11 view .LVU2659 + 8475 00c6 024B ldr r3, .L443+4 + 8476 00c8 1A60 str r2, [r3] + 8477 00ca F7E7 b .L436 + 8478 .L444: + 8479 .align 2 + 8480 .L443: + 8481 00cc 00000000 .word TO7 + 8482 00d0 00000000 .word TO7_PID + 8483 00d4 0000C842 .word 1120403456 + 8484 00d8 0000FA46 .word 1190789120 + 8485 00dc 0000FAC6 .word -956694528 + 8486 00e0 00000047 .word 1191182336 + 8487 .cfi_endproc + 8488 .LFE1230: + 8490 .section .text.CalculateChecksum,"ax",%progbits + 8491 .align 1 + 8492 .global CalculateChecksum + 8493 .syntax unified + 8494 .thumb + 8495 .thumb_func + 8497 CalculateChecksum: + 8498 .LVL799: + 8499 .LFB1233: +3562:Src/main.c **** short i; + 8500 .loc 1 3562 1 is_stmt 1 view -0 + 8501 .cfi_startproc + 8502 @ args = 0, pretend = 0, frame = 0 + 8503 @ frame_needed = 0, uses_anonymous_args = 0 + 8504 @ link register save eliminated. +3562:Src/main.c **** short i; + 8505 .loc 1 3562 1 is_stmt 0 view .LVU2661 + 8506 0000 8446 mov ip, r0 +3563:Src/main.c **** uint16_t cs = *pbuff; + 8507 .loc 1 3563 2 is_stmt 1 view .LVU2662 +3564:Src/main.c **** + 8508 .loc 1 3564 2 view .LVU2663 +3564:Src/main.c **** + 8509 .loc 1 3564 11 is_stmt 0 view .LVU2664 + 8510 0002 0088 ldrh r0, [r0] + 8511 .LVL800: +3566:Src/main.c **** { + 8512 .loc 1 3566 3 is_stmt 1 view .LVU2665 +3566:Src/main.c **** { + 8513 .loc 1 3566 9 is_stmt 0 view .LVU2666 + 8514 0004 0123 movs r3, #1 +3566:Src/main.c **** { + 8515 .loc 1 3566 3 view .LVU2667 + 8516 0006 04E0 b .L446 + 8517 .LVL801: + ARM GAS /tmp/ccuHnxNu.s page 543 - 8365 .LVL799: -3511:Src/main.c **** { - 8366 .loc 1 3511 24 is_stmt 1 discriminator 3 view .LVU2629 - 8367 000e 0133 adds r3, r3, #1 - 8368 .LVL800: -3511:Src/main.c **** { - 8369 .loc 1 3511 24 is_stmt 0 discriminator 3 view .LVU2630 - 8370 0010 1BB2 sxth r3, r3 - 8371 .LVL801: - 8372 .L435: -3511:Src/main.c **** { - 8373 .loc 1 3511 16 is_stmt 1 discriminator 1 view .LVU2631 - 8374 0012 8B42 cmp r3, r1 - 8375 0014 F8DB blt .L436 -3515:Src/main.c **** } - 8376 .loc 1 3515 2 view .LVU2632 -3516:Src/main.c **** - 8377 .loc 1 3516 1 is_stmt 0 view .LVU2633 - 8378 0016 7047 bx lr - 8379 .cfi_endproc - 8380 .LFE1231: - 8382 .section .text.CheckChecksum,"ax",%progbits - 8383 .align 1 - 8384 .global CheckChecksum - 8385 .syntax unified - 8386 .thumb - 8387 .thumb_func - 8389 CheckChecksum: - 8390 .LVL802: - 8391 .LFB1230: -3486:Src/main.c **** uint16_t cl_ind; - 8392 .loc 1 3486 1 is_stmt 1 view -0 - 8393 .cfi_startproc - 8394 @ args = 0, pretend = 0, frame = 0 - 8395 @ frame_needed = 0, uses_anonymous_args = 0 -3486:Src/main.c **** uint16_t cl_ind; - 8396 .loc 1 3486 1 is_stmt 0 view .LVU2635 - 8397 0000 10B5 push {r4, lr} - 8398 .LCFI72: - 8399 .cfi_def_cfa_offset 8 - 8400 .cfi_offset 4, -8 - 8401 .cfi_offset 14, -4 -3487:Src/main.c **** - 8402 .loc 1 3487 3 is_stmt 1 view .LVU2636 -3489:Src/main.c **** { - 8403 .loc 1 3489 3 view .LVU2637 - 8404 0002 0E4B ldr r3, .L443 - 8405 0004 1B88 ldrh r3, [r3] - 8406 0006 41F21112 movw r2, #4369 - 8407 000a 9342 cmp r3, r2 - 8408 000c 05D0 beq .L440 - 8409 000e 47F27772 movw r2, #30583 - 8410 0012 9342 cmp r3, r2 - 8411 0014 0FD1 bne .L441 - 8412 0016 0E24 movs r4, #14 - 8413 0018 00E0 b .L438 - 8414 .L440: - ARM GAS /tmp/ccEQxcUB.s page 540 + 8518 .L447: +3568:Src/main.c **** } + 8519 .loc 1 3568 3 is_stmt 1 view .LVU2668 +3568:Src/main.c **** } + 8520 .loc 1 3568 9 is_stmt 0 view .LVU2669 + 8521 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] +3568:Src/main.c **** } + 8522 .loc 1 3568 6 view .LVU2670 + 8523 000c 5040 eors r0, r0, r2 + 8524 .LVL802: +3566:Src/main.c **** { + 8525 .loc 1 3566 24 is_stmt 1 discriminator 3 view .LVU2671 + 8526 000e 0133 adds r3, r3, #1 + 8527 .LVL803: +3566:Src/main.c **** { + 8528 .loc 1 3566 24 is_stmt 0 discriminator 3 view .LVU2672 + 8529 0010 1BB2 sxth r3, r3 + 8530 .LVL804: + 8531 .L446: +3566:Src/main.c **** { + 8532 .loc 1 3566 16 is_stmt 1 discriminator 1 view .LVU2673 + 8533 0012 8B42 cmp r3, r1 + 8534 0014 F8DB blt .L447 +3570:Src/main.c **** } + 8535 .loc 1 3570 2 view .LVU2674 +3571:Src/main.c **** + 8536 .loc 1 3571 1 is_stmt 0 view .LVU2675 + 8537 0016 7047 bx lr + 8538 .cfi_endproc + 8539 .LFE1233: + 8541 .section .text.CheckChecksum,"ax",%progbits + 8542 .align 1 + 8543 .global CheckChecksum + 8544 .syntax unified + 8545 .thumb + 8546 .thumb_func + 8548 CheckChecksum: + 8549 .LVL805: + 8550 .LFB1232: +3541:Src/main.c **** uint16_t cl_ind; + 8551 .loc 1 3541 1 is_stmt 1 view -0 + 8552 .cfi_startproc + 8553 @ args = 0, pretend = 0, frame = 0 + 8554 @ frame_needed = 0, uses_anonymous_args = 0 +3541:Src/main.c **** uint16_t cl_ind; + 8555 .loc 1 3541 1 is_stmt 0 view .LVU2677 + 8556 0000 10B5 push {r4, lr} + 8557 .LCFI75: + 8558 .cfi_def_cfa_offset 8 + 8559 .cfi_offset 4, -8 + 8560 .cfi_offset 14, -4 +3542:Src/main.c **** + 8561 .loc 1 3542 3 is_stmt 1 view .LVU2678 +3544:Src/main.c **** { + 8562 .loc 1 3544 3 view .LVU2679 + 8563 0002 0E4B ldr r3, .L454 + 8564 0004 1B88 ldrh r3, [r3] + ARM GAS /tmp/ccuHnxNu.s page 544 -3495:Src/main.c **** break; - 8415 .loc 1 3495 14 is_stmt 0 view .LVU2638 - 8416 001a 0D24 movs r4, #13 - 8417 .L438: - 8418 .LVL803: -3499:Src/main.c **** } - 8419 .loc 1 3499 5 is_stmt 1 view .LVU2639 -3502:Src/main.c **** - 8420 .loc 1 3502 3 view .LVU2640 -3502:Src/main.c **** - 8421 .loc 1 3502 15 is_stmt 0 view .LVU2641 - 8422 001c 2146 mov r1, r4 - 8423 001e FFF7FEFF bl CalculateChecksum - 8424 .LVL804: -3502:Src/main.c **** - 8425 .loc 1 3502 13 discriminator 1 view .LVU2642 - 8426 0022 074B ldr r3, .L443+4 - 8427 0024 1880 strh r0, [r3] @ movhi -3504:Src/main.c **** } - 8428 .loc 1 3504 3 is_stmt 1 view .LVU2643 -3504:Src/main.c **** } - 8429 .loc 1 3504 32 is_stmt 0 view .LVU2644 - 8430 0026 074B ldr r3, .L443+8 - 8431 0028 33F81430 ldrh r3, [r3, r4, lsl #1] -3504:Src/main.c **** } - 8432 .loc 1 3504 46 view .LVU2645 - 8433 002c 9842 cmp r0, r3 - 8434 002e 14BF ite ne - 8435 0030 0020 movne r0, #0 - 8436 0032 0120 moveq r0, #1 - 8437 .LVL805: - 8438 .L439: -3505:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) - 8439 .loc 1 3505 1 view .LVU2646 - 8440 0034 10BD pop {r4, pc} - 8441 .LVL806: - 8442 .L441: -3489:Src/main.c **** { - 8443 .loc 1 3489 3 view .LVU2647 - 8444 0036 0020 movs r0, #0 - 8445 .LVL807: -3489:Src/main.c **** { - 8446 .loc 1 3489 3 view .LVU2648 - 8447 0038 FCE7 b .L439 - 8448 .L444: - 8449 003a 00BF .align 2 - 8450 .L443: - 8451 003c 00000000 .word UART_header - 8452 0040 00000000 .word CS_result - 8453 0044 00000000 .word COMMAND - 8454 .cfi_endproc - 8455 .LFE1230: - 8457 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 - 8458 .align 2 - 8459 .LC2: - 8460 0000 46494C45 .ascii "FILE1.TXT\000" - 8460 312E5458 - ARM GAS /tmp/ccEQxcUB.s page 541 + 8565 0006 41F21112 movw r2, #4369 + 8566 000a 9342 cmp r3, r2 + 8567 000c 05D0 beq .L451 + 8568 000e 47F27772 movw r2, #30583 + 8569 0012 9342 cmp r3, r2 + 8570 0014 0FD1 bne .L452 + 8571 0016 0E24 movs r4, #14 + 8572 0018 00E0 b .L449 + 8573 .L451: +3550:Src/main.c **** break; + 8574 .loc 1 3550 14 is_stmt 0 view .LVU2680 + 8575 001a 0D24 movs r4, #13 + 8576 .L449: + 8577 .LVL806: +3554:Src/main.c **** } + 8578 .loc 1 3554 5 is_stmt 1 view .LVU2681 +3557:Src/main.c **** + 8579 .loc 1 3557 3 view .LVU2682 +3557:Src/main.c **** + 8580 .loc 1 3557 15 is_stmt 0 view .LVU2683 + 8581 001c 2146 mov r1, r4 + 8582 001e FFF7FEFF bl CalculateChecksum + 8583 .LVL807: +3557:Src/main.c **** + 8584 .loc 1 3557 13 discriminator 1 view .LVU2684 + 8585 0022 074B ldr r3, .L454+4 + 8586 0024 1880 strh r0, [r3] @ movhi +3559:Src/main.c **** } + 8587 .loc 1 3559 3 is_stmt 1 view .LVU2685 +3559:Src/main.c **** } + 8588 .loc 1 3559 32 is_stmt 0 view .LVU2686 + 8589 0026 074B ldr r3, .L454+8 + 8590 0028 33F81430 ldrh r3, [r3, r4, lsl #1] +3559:Src/main.c **** } + 8591 .loc 1 3559 46 view .LVU2687 + 8592 002c 9842 cmp r0, r3 + 8593 002e 14BF ite ne + 8594 0030 0020 movne r0, #0 + 8595 0032 0120 moveq r0, #1 + 8596 .LVL808: + 8597 .L450: +3560:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) + 8598 .loc 1 3560 1 view .LVU2688 + 8599 0034 10BD pop {r4, pc} + 8600 .LVL809: + 8601 .L452: +3544:Src/main.c **** { + 8602 .loc 1 3544 3 view .LVU2689 + 8603 0036 0020 movs r0, #0 + 8604 .LVL810: +3544:Src/main.c **** { + 8605 .loc 1 3544 3 view .LVU2690 + 8606 0038 FCE7 b .L450 + 8607 .L455: + 8608 003a 00BF .align 2 + 8609 .L454: + 8610 003c 00000000 .word UART_header + ARM GAS /tmp/ccuHnxNu.s page 545 - 8460 5400 - 8461 .section .text.SD_SAVE,"ax",%progbits - 8462 .align 1 - 8463 .global SD_SAVE - 8464 .syntax unified - 8465 .thumb - 8466 .thumb_func - 8468 SD_SAVE: - 8469 .LVL808: - 8470 .LFB1232: -3545:Src/main.c **** int test=0; - 8471 .loc 1 3545 1 is_stmt 1 view -0 - 8472 .cfi_startproc - 8473 @ args = 0, pretend = 0, frame = 0 - 8474 @ frame_needed = 0, uses_anonymous_args = 0 -3545:Src/main.c **** int test=0; - 8475 .loc 1 3545 1 is_stmt 0 view .LVU2650 - 8476 0000 10B5 push {r4, lr} - 8477 .LCFI73: - 8478 .cfi_def_cfa_offset 8 - 8479 .cfi_offset 4, -8 - 8480 .cfi_offset 14, -4 - 8481 0002 0446 mov r4, r0 -3546:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 8482 .loc 1 3546 2 is_stmt 1 view .LVU2651 - 8483 .LVL809: -3547:Src/main.c **** { - 8484 .loc 1 3547 2 view .LVU2652 -3547:Src/main.c **** { - 8485 .loc 1 3547 6 is_stmt 0 view .LVU2653 - 8486 0004 0121 movs r1, #1 - 8487 0006 0A48 ldr r0, .L452 - 8488 .LVL810: -3547:Src/main.c **** { - 8489 .loc 1 3547 6 view .LVU2654 - 8490 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 8491 .LVL811: -3547:Src/main.c **** { - 8492 .loc 1 3547 5 discriminator 1 view .LVU2655 - 8493 000c 08B1 cbz r0, .L450 -3564:Src/main.c **** } - 8494 .loc 1 3564 10 view .LVU2656 - 8495 000e 0120 movs r0, #1 - 8496 .LVL812: - 8497 .L445: -3566:Src/main.c **** - 8498 .loc 1 3566 1 view .LVU2657 - 8499 0010 10BD pop {r4, pc} - 8500 .LVL813: - 8501 .L450: -3549:Src/main.c **** if (test == 0) //0 - suc - 8502 .loc 1 3549 3 is_stmt 1 view .LVU2658 -3549:Src/main.c **** if (test == 0) //0 - suc - 8503 .loc 1 3549 10 is_stmt 0 view .LVU2659 - 8504 0012 0848 ldr r0, .L452+4 - 8505 0014 FFF7FEFF bl Mount_SD - 8506 .LVL814: - ARM GAS /tmp/ccEQxcUB.s page 542 + 8611 0040 00000000 .word CS_result + 8612 0044 00000000 .word COMMAND + 8613 .cfi_endproc + 8614 .LFE1232: + 8616 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 + 8617 .align 2 + 8618 .LC2: + 8619 0000 46494C45 .ascii "FILE1.TXT\000" + 8619 312E5458 + 8619 5400 + 8620 .section .text.SD_SAVE,"ax",%progbits + 8621 .align 1 + 8622 .global SD_SAVE + 8623 .syntax unified + 8624 .thumb + 8625 .thumb_func + 8627 SD_SAVE: + 8628 .LVL811: + 8629 .LFB1234: +3600:Src/main.c **** int test=0; + 8630 .loc 1 3600 1 is_stmt 1 view -0 + 8631 .cfi_startproc + 8632 @ args = 0, pretend = 0, frame = 0 + 8633 @ frame_needed = 0, uses_anonymous_args = 0 +3600:Src/main.c **** int test=0; + 8634 .loc 1 3600 1 is_stmt 0 view .LVU2692 + 8635 0000 10B5 push {r4, lr} + 8636 .LCFI76: + 8637 .cfi_def_cfa_offset 8 + 8638 .cfi_offset 4, -8 + 8639 .cfi_offset 14, -4 + 8640 0002 0446 mov r4, r0 +3601:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 8641 .loc 1 3601 2 is_stmt 1 view .LVU2693 + 8642 .LVL812: +3602:Src/main.c **** { + 8643 .loc 1 3602 2 view .LVU2694 +3602:Src/main.c **** { + 8644 .loc 1 3602 6 is_stmt 0 view .LVU2695 + 8645 0004 0121 movs r1, #1 + 8646 0006 0A48 ldr r0, .L463 + 8647 .LVL813: +3602:Src/main.c **** { + 8648 .loc 1 3602 6 view .LVU2696 + 8649 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 8650 .LVL814: +3602:Src/main.c **** { + 8651 .loc 1 3602 5 discriminator 1 view .LVU2697 + 8652 000c 08B1 cbz r0, .L461 +3619:Src/main.c **** } + 8653 .loc 1 3619 10 view .LVU2698 + 8654 000e 0120 movs r0, #1 + 8655 .LVL815: + 8656 .L456: +3621:Src/main.c **** + 8657 .loc 1 3621 1 view .LVU2699 + 8658 0010 10BD pop {r4, pc} + ARM GAS /tmp/ccuHnxNu.s page 546 -3550:Src/main.c **** { - 8507 .loc 1 3550 3 is_stmt 1 view .LVU2660 -3550:Src/main.c **** { - 8508 .loc 1 3550 6 is_stmt 0 view .LVU2661 - 8509 0018 08B1 cbz r0, .L451 -3559:Src/main.c **** } - 8510 .loc 1 3559 11 view .LVU2662 - 8511 001a 0120 movs r0, #1 - 8512 .LVL815: -3559:Src/main.c **** } - 8513 .loc 1 3559 11 view .LVU2663 - 8514 001c F8E7 b .L445 - 8515 .LVL816: - 8516 .L451: -3553:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8517 .loc 1 3553 4 is_stmt 1 view .LVU2664 -3553:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8518 .loc 1 3553 11 is_stmt 0 view .LVU2665 - 8519 001e 1E22 movs r2, #30 - 8520 0020 2146 mov r1, r4 - 8521 0022 0548 ldr r0, .L452+8 - 8522 .LVL817: -3553:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8523 .loc 1 3553 11 view .LVU2666 - 8524 0024 FFF7FEFF bl Update_File_byte - 8525 .LVL818: -3554:Src/main.c **** return test; - 8526 .loc 1 3554 4 is_stmt 1 view .LVU2667 -3554:Src/main.c **** return test; - 8527 .loc 1 3554 11 is_stmt 0 view .LVU2668 - 8528 0028 0248 ldr r0, .L452+4 - 8529 002a FFF7FEFF bl Unmount_SD - 8530 .LVL819: -3555:Src/main.c **** } - 8531 .loc 1 3555 4 is_stmt 1 view .LVU2669 -3555:Src/main.c **** } - 8532 .loc 1 3555 11 is_stmt 0 view .LVU2670 - 8533 002e EFE7 b .L445 - 8534 .L453: - 8535 .align 2 - 8536 .L452: - 8537 0030 000C0240 .word 1073875968 - 8538 0034 00000000 .word .LC0 - 8539 0038 00000000 .word .LC2 - 8540 .cfi_endproc - 8541 .LFE1232: - 8543 .section .text.SD_READ,"ax",%progbits - 8544 .align 1 - 8545 .global SD_READ - 8546 .syntax unified - 8547 .thumb - 8548 .thumb_func - 8550 SD_READ: - 8551 .LVL820: - 8552 .LFB1233: -3576:Src/main.c **** int test=0; - 8553 .loc 1 3576 1 is_stmt 1 view -0 - ARM GAS /tmp/ccEQxcUB.s page 543 + 8659 .LVL816: + 8660 .L461: +3604:Src/main.c **** if (test == 0) //0 - suc + 8661 .loc 1 3604 3 is_stmt 1 view .LVU2700 +3604:Src/main.c **** if (test == 0) //0 - suc + 8662 .loc 1 3604 10 is_stmt 0 view .LVU2701 + 8663 0012 0848 ldr r0, .L463+4 + 8664 0014 FFF7FEFF bl Mount_SD + 8665 .LVL817: +3605:Src/main.c **** { + 8666 .loc 1 3605 3 is_stmt 1 view .LVU2702 +3605:Src/main.c **** { + 8667 .loc 1 3605 6 is_stmt 0 view .LVU2703 + 8668 0018 08B1 cbz r0, .L462 +3614:Src/main.c **** } + 8669 .loc 1 3614 11 view .LVU2704 + 8670 001a 0120 movs r0, #1 + 8671 .LVL818: +3614:Src/main.c **** } + 8672 .loc 1 3614 11 view .LVU2705 + 8673 001c F8E7 b .L456 + 8674 .LVL819: + 8675 .L462: +3608:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8676 .loc 1 3608 4 is_stmt 1 view .LVU2706 +3608:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8677 .loc 1 3608 11 is_stmt 0 view .LVU2707 + 8678 001e 1E22 movs r2, #30 + 8679 0020 2146 mov r1, r4 + 8680 0022 0548 ldr r0, .L463+8 + 8681 .LVL820: +3608:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8682 .loc 1 3608 11 view .LVU2708 + 8683 0024 FFF7FEFF bl Update_File_byte + 8684 .LVL821: +3609:Src/main.c **** return test; + 8685 .loc 1 3609 4 is_stmt 1 view .LVU2709 +3609:Src/main.c **** return test; + 8686 .loc 1 3609 11 is_stmt 0 view .LVU2710 + 8687 0028 0248 ldr r0, .L463+4 + 8688 002a FFF7FEFF bl Unmount_SD + 8689 .LVL822: +3610:Src/main.c **** } + 8690 .loc 1 3610 4 is_stmt 1 view .LVU2711 +3610:Src/main.c **** } + 8691 .loc 1 3610 11 is_stmt 0 view .LVU2712 + 8692 002e EFE7 b .L456 + 8693 .L464: + 8694 .align 2 + 8695 .L463: + 8696 0030 000C0240 .word 1073875968 + 8697 0034 00000000 .word .LC0 + 8698 0038 00000000 .word .LC2 + 8699 .cfi_endproc + 8700 .LFE1234: + 8702 .section .text.SD_READ,"ax",%progbits + 8703 .align 1 + ARM GAS /tmp/ccuHnxNu.s page 547 - 8554 .cfi_startproc - 8555 @ args = 0, pretend = 0, frame = 0 - 8556 @ frame_needed = 0, uses_anonymous_args = 0 -3576:Src/main.c **** int test=0; - 8557 .loc 1 3576 1 is_stmt 0 view .LVU2672 - 8558 0000 38B5 push {r3, r4, r5, lr} - 8559 .LCFI74: - 8560 .cfi_def_cfa_offset 16 - 8561 .cfi_offset 3, -16 - 8562 .cfi_offset 4, -12 - 8563 .cfi_offset 5, -8 - 8564 .cfi_offset 14, -4 - 8565 0002 0446 mov r4, r0 -3577:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 8566 .loc 1 3577 2 is_stmt 1 view .LVU2673 - 8567 .LVL821: -3578:Src/main.c **** { - 8568 .loc 1 3578 2 view .LVU2674 -3578:Src/main.c **** { - 8569 .loc 1 3578 6 is_stmt 0 view .LVU2675 - 8570 0004 0121 movs r1, #1 - 8571 0006 0D48 ldr r0, .L461 - 8572 .LVL822: -3578:Src/main.c **** { - 8573 .loc 1 3578 6 view .LVU2676 - 8574 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 8575 .LVL823: -3578:Src/main.c **** { - 8576 .loc 1 3578 5 discriminator 1 view .LVU2677 - 8577 000c 08B1 cbz r0, .L459 -3596:Src/main.c **** } - 8578 .loc 1 3596 10 view .LVU2678 - 8579 000e 0120 movs r0, #1 - 8580 .LVL824: - 8581 .L454: -3612:Src/main.c **** - 8582 .loc 1 3612 1 view .LVU2679 - 8583 0010 38BD pop {r3, r4, r5, pc} - 8584 .LVL825: - 8585 .L459: -3580:Src/main.c **** if (test == 0) //0 - suc - 8586 .loc 1 3580 3 is_stmt 1 view .LVU2680 -3580:Src/main.c **** if (test == 0) //0 - suc - 8587 .loc 1 3580 10 is_stmt 0 view .LVU2681 - 8588 0012 0B48 ldr r0, .L461+4 - 8589 0014 FFF7FEFF bl Mount_SD - 8590 .LVL826: -3581:Src/main.c **** { - 8591 .loc 1 3581 3 is_stmt 1 view .LVU2682 -3581:Src/main.c **** { - 8592 .loc 1 3581 6 is_stmt 0 view .LVU2683 - 8593 0018 08B1 cbz r0, .L460 -3591:Src/main.c **** } - 8594 .loc 1 3591 11 view .LVU2684 - 8595 001a 0120 movs r0, #1 - 8596 .LVL827: -3591:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 544 + 8704 .global SD_READ + 8705 .syntax unified + 8706 .thumb + 8707 .thumb_func + 8709 SD_READ: + 8710 .LVL823: + 8711 .LFB1235: +3631:Src/main.c **** int test=0; + 8712 .loc 1 3631 1 is_stmt 1 view -0 + 8713 .cfi_startproc + 8714 @ args = 0, pretend = 0, frame = 0 + 8715 @ frame_needed = 0, uses_anonymous_args = 0 +3631:Src/main.c **** int test=0; + 8716 .loc 1 3631 1 is_stmt 0 view .LVU2714 + 8717 0000 38B5 push {r3, r4, r5, lr} + 8718 .LCFI77: + 8719 .cfi_def_cfa_offset 16 + 8720 .cfi_offset 3, -16 + 8721 .cfi_offset 4, -12 + 8722 .cfi_offset 5, -8 + 8723 .cfi_offset 14, -4 + 8724 0002 0446 mov r4, r0 +3632:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 8725 .loc 1 3632 2 is_stmt 1 view .LVU2715 + 8726 .LVL824: +3633:Src/main.c **** { + 8727 .loc 1 3633 2 view .LVU2716 +3633:Src/main.c **** { + 8728 .loc 1 3633 6 is_stmt 0 view .LVU2717 + 8729 0004 0121 movs r1, #1 + 8730 0006 0D48 ldr r0, .L472 + 8731 .LVL825: +3633:Src/main.c **** { + 8732 .loc 1 3633 6 view .LVU2718 + 8733 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 8734 .LVL826: +3633:Src/main.c **** { + 8735 .loc 1 3633 5 discriminator 1 view .LVU2719 + 8736 000c 08B1 cbz r0, .L470 +3651:Src/main.c **** } + 8737 .loc 1 3651 10 view .LVU2720 + 8738 000e 0120 movs r0, #1 + 8739 .LVL827: + 8740 .L465: +3667:Src/main.c **** + 8741 .loc 1 3667 1 view .LVU2721 + 8742 0010 38BD pop {r3, r4, r5, pc} + 8743 .LVL828: + 8744 .L470: +3635:Src/main.c **** if (test == 0) //0 - suc + 8745 .loc 1 3635 3 is_stmt 1 view .LVU2722 +3635:Src/main.c **** if (test == 0) //0 - suc + 8746 .loc 1 3635 10 is_stmt 0 view .LVU2723 + 8747 0012 0B48 ldr r0, .L472+4 + 8748 0014 FFF7FEFF bl Mount_SD + 8749 .LVL829: +3636:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 548 - 8597 .loc 1 3591 11 view .LVU2685 - 8598 001c F8E7 b .L454 - 8599 .LVL828: - 8600 .L460: -3584:Src/main.c **** fgoto+=DL_8; - 8601 .loc 1 3584 4 is_stmt 1 view .LVU2686 -3584:Src/main.c **** fgoto+=DL_8; - 8602 .loc 1 3584 11 is_stmt 0 view .LVU2687 - 8603 001e 094D ldr r5, .L461+8 - 8604 0020 2B68 ldr r3, [r5] - 8605 0022 1E22 movs r2, #30 - 8606 0024 2146 mov r1, r4 - 8607 0026 0848 ldr r0, .L461+12 - 8608 .LVL829: -3584:Src/main.c **** fgoto+=DL_8; - 8609 .loc 1 3584 11 view .LVU2688 - 8610 0028 FFF7FEFF bl Seek_Read_File - 8611 .LVL830: -3585:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8612 .loc 1 3585 4 is_stmt 1 view .LVU2689 -3585:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8613 .loc 1 3585 9 is_stmt 0 view .LVU2690 - 8614 002c 2B68 ldr r3, [r5] - 8615 002e 1E33 adds r3, r3, #30 - 8616 0030 2B60 str r3, [r5] -3586:Src/main.c **** return test; - 8617 .loc 1 3586 4 is_stmt 1 view .LVU2691 -3586:Src/main.c **** return test; - 8618 .loc 1 3586 11 is_stmt 0 view .LVU2692 - 8619 0032 0348 ldr r0, .L461+4 - 8620 0034 FFF7FEFF bl Unmount_SD - 8621 .LVL831: -3587:Src/main.c **** } - 8622 .loc 1 3587 4 is_stmt 1 view .LVU2693 -3587:Src/main.c **** } - 8623 .loc 1 3587 11 is_stmt 0 view .LVU2694 - 8624 0038 EAE7 b .L454 - 8625 .L462: - 8626 003a 00BF .align 2 - 8627 .L461: - 8628 003c 000C0240 .word 1073875968 - 8629 0040 00000000 .word .LC0 - 8630 0044 00000000 .word fgoto - 8631 0048 00000000 .word .LC2 - 8632 .cfi_endproc - 8633 .LFE1233: - 8635 .section .text.SD_REMOVE,"ax",%progbits - 8636 .align 1 - 8637 .global SD_REMOVE - 8638 .syntax unified - 8639 .thumb - 8640 .thumb_func - 8642 SD_REMOVE: - 8643 .LFB1234: -3615:Src/main.c **** int test=0; - 8644 .loc 1 3615 1 is_stmt 1 view -0 - 8645 .cfi_startproc - ARM GAS /tmp/ccEQxcUB.s page 545 + 8750 .loc 1 3636 3 is_stmt 1 view .LVU2724 +3636:Src/main.c **** { + 8751 .loc 1 3636 6 is_stmt 0 view .LVU2725 + 8752 0018 08B1 cbz r0, .L471 +3646:Src/main.c **** } + 8753 .loc 1 3646 11 view .LVU2726 + 8754 001a 0120 movs r0, #1 + 8755 .LVL830: +3646:Src/main.c **** } + 8756 .loc 1 3646 11 view .LVU2727 + 8757 001c F8E7 b .L465 + 8758 .LVL831: + 8759 .L471: +3639:Src/main.c **** fgoto+=DL_8; + 8760 .loc 1 3639 4 is_stmt 1 view .LVU2728 +3639:Src/main.c **** fgoto+=DL_8; + 8761 .loc 1 3639 11 is_stmt 0 view .LVU2729 + 8762 001e 094D ldr r5, .L472+8 + 8763 0020 2B68 ldr r3, [r5] + 8764 0022 1E22 movs r2, #30 + 8765 0024 2146 mov r1, r4 + 8766 0026 0848 ldr r0, .L472+12 + 8767 .LVL832: +3639:Src/main.c **** fgoto+=DL_8; + 8768 .loc 1 3639 11 view .LVU2730 + 8769 0028 FFF7FEFF bl Seek_Read_File + 8770 .LVL833: +3640:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8771 .loc 1 3640 4 is_stmt 1 view .LVU2731 +3640:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8772 .loc 1 3640 9 is_stmt 0 view .LVU2732 + 8773 002c 2B68 ldr r3, [r5] + 8774 002e 1E33 adds r3, r3, #30 + 8775 0030 2B60 str r3, [r5] +3641:Src/main.c **** return test; + 8776 .loc 1 3641 4 is_stmt 1 view .LVU2733 +3641:Src/main.c **** return test; + 8777 .loc 1 3641 11 is_stmt 0 view .LVU2734 + 8778 0032 0348 ldr r0, .L472+4 + 8779 0034 FFF7FEFF bl Unmount_SD + 8780 .LVL834: +3642:Src/main.c **** } + 8781 .loc 1 3642 4 is_stmt 1 view .LVU2735 +3642:Src/main.c **** } + 8782 .loc 1 3642 11 is_stmt 0 view .LVU2736 + 8783 0038 EAE7 b .L465 + 8784 .L473: + 8785 003a 00BF .align 2 + 8786 .L472: + 8787 003c 000C0240 .word 1073875968 + 8788 0040 00000000 .word .LC0 + 8789 0044 00000000 .word fgoto + 8790 0048 00000000 .word .LC2 + 8791 .cfi_endproc + 8792 .LFE1235: + 8794 .section .text.SD_REMOVE,"ax",%progbits + 8795 .align 1 + ARM GAS /tmp/ccuHnxNu.s page 549 - 8646 @ args = 0, pretend = 0, frame = 0 - 8647 @ frame_needed = 0, uses_anonymous_args = 0 - 8648 0000 10B5 push {r4, lr} - 8649 .LCFI75: - 8650 .cfi_def_cfa_offset 8 - 8651 .cfi_offset 4, -8 - 8652 .cfi_offset 14, -4 -3616:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 8653 .loc 1 3616 2 view .LVU2696 - 8654 .LVL832: -3617:Src/main.c **** { - 8655 .loc 1 3617 2 view .LVU2697 -3617:Src/main.c **** { - 8656 .loc 1 3617 6 is_stmt 0 view .LVU2698 - 8657 0002 0121 movs r1, #1 - 8658 0004 0B48 ldr r0, .L470 - 8659 0006 FFF7FEFF bl HAL_GPIO_ReadPin - 8660 .LVL833: -3617:Src/main.c **** { - 8661 .loc 1 3617 5 discriminator 1 view .LVU2699 - 8662 000a 08B1 cbz r0, .L468 -3635:Src/main.c **** } - 8663 .loc 1 3635 10 view .LVU2700 - 8664 000c 0120 movs r0, #1 - 8665 .LVL834: - 8666 .L463: -3637:Src/main.c **** - 8667 .loc 1 3637 1 view .LVU2701 - 8668 000e 10BD pop {r4, pc} - 8669 .LVL835: - 8670 .L468: -3619:Src/main.c **** if (test==FR_OK) - 8671 .loc 1 3619 3 is_stmt 1 view .LVU2702 -3619:Src/main.c **** if (test==FR_OK) - 8672 .loc 1 3619 10 is_stmt 0 view .LVU2703 - 8673 0010 0948 ldr r0, .L470+4 - 8674 0012 FFF7FEFF bl Mount_SD - 8675 .LVL836: -3620:Src/main.c **** { - 8676 .loc 1 3620 3 is_stmt 1 view .LVU2704 -3620:Src/main.c **** { - 8677 .loc 1 3620 6 is_stmt 0 view .LVU2705 - 8678 0016 08B1 cbz r0, .L469 -3630:Src/main.c **** } - 8679 .loc 1 3630 11 view .LVU2706 - 8680 0018 0120 movs r0, #1 - 8681 .LVL837: -3630:Src/main.c **** } - 8682 .loc 1 3630 11 view .LVU2707 - 8683 001a F8E7 b .L463 - 8684 .LVL838: - 8685 .L469: -3622:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 8686 .loc 1 3622 4 is_stmt 1 view .LVU2708 -3622:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 8687 .loc 1 3622 11 is_stmt 0 view .LVU2709 - 8688 001c 074C ldr r4, .L470+8 - ARM GAS /tmp/ccEQxcUB.s page 546 + 8796 .global SD_REMOVE + 8797 .syntax unified + 8798 .thumb + 8799 .thumb_func + 8801 SD_REMOVE: + 8802 .LFB1236: +3670:Src/main.c **** int test=0; + 8803 .loc 1 3670 1 is_stmt 1 view -0 + 8804 .cfi_startproc + 8805 @ args = 0, pretend = 0, frame = 0 + 8806 @ frame_needed = 0, uses_anonymous_args = 0 + 8807 0000 10B5 push {r4, lr} + 8808 .LCFI78: + 8809 .cfi_def_cfa_offset 8 + 8810 .cfi_offset 4, -8 + 8811 .cfi_offset 14, -4 +3671:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 8812 .loc 1 3671 2 view .LVU2738 + 8813 .LVL835: +3672:Src/main.c **** { + 8814 .loc 1 3672 2 view .LVU2739 +3672:Src/main.c **** { + 8815 .loc 1 3672 6 is_stmt 0 view .LVU2740 + 8816 0002 0121 movs r1, #1 + 8817 0004 0B48 ldr r0, .L481 + 8818 0006 FFF7FEFF bl HAL_GPIO_ReadPin + 8819 .LVL836: +3672:Src/main.c **** { + 8820 .loc 1 3672 5 discriminator 1 view .LVU2741 + 8821 000a 08B1 cbz r0, .L479 +3690:Src/main.c **** } + 8822 .loc 1 3690 10 view .LVU2742 + 8823 000c 0120 movs r0, #1 + 8824 .LVL837: + 8825 .L474: +3692:Src/main.c **** + 8826 .loc 1 3692 1 view .LVU2743 + 8827 000e 10BD pop {r4, pc} + 8828 .LVL838: + 8829 .L479: +3674:Src/main.c **** if (test==FR_OK) + 8830 .loc 1 3674 3 is_stmt 1 view .LVU2744 +3674:Src/main.c **** if (test==FR_OK) + 8831 .loc 1 3674 10 is_stmt 0 view .LVU2745 + 8832 0010 0948 ldr r0, .L481+4 + 8833 0012 FFF7FEFF bl Mount_SD + 8834 .LVL839: +3675:Src/main.c **** { + 8835 .loc 1 3675 3 is_stmt 1 view .LVU2746 +3675:Src/main.c **** { + 8836 .loc 1 3675 6 is_stmt 0 view .LVU2747 + 8837 0016 08B1 cbz r0, .L480 +3685:Src/main.c **** } + 8838 .loc 1 3685 11 view .LVU2748 + 8839 0018 0120 movs r0, #1 + 8840 .LVL840: +3685:Src/main.c **** } + ARM GAS /tmp/ccuHnxNu.s page 550 - 8689 001e 2046 mov r0, r4 - 8690 .LVL839: -3622:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 8691 .loc 1 3622 11 view .LVU2710 - 8692 0020 FFF7FEFF bl Remove_File - 8693 .LVL840: -3623:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 8694 .loc 1 3623 4 is_stmt 1 view .LVU2711 -3623:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 8695 .loc 1 3623 11 is_stmt 0 view .LVU2712 - 8696 0024 2046 mov r0, r4 - 8697 0026 FFF7FEFF bl Create_File - 8698 .LVL841: -3625:Src/main.c **** return test; - 8699 .loc 1 3625 4 is_stmt 1 view .LVU2713 -3625:Src/main.c **** return test; - 8700 .loc 1 3625 11 is_stmt 0 view .LVU2714 - 8701 002a 0348 ldr r0, .L470+4 - 8702 002c FFF7FEFF bl Unmount_SD - 8703 .LVL842: -3626:Src/main.c **** } - 8704 .loc 1 3626 4 is_stmt 1 view .LVU2715 -3626:Src/main.c **** } - 8705 .loc 1 3626 11 is_stmt 0 view .LVU2716 - 8706 0030 EDE7 b .L463 - 8707 .L471: - 8708 0032 00BF .align 2 - 8709 .L470: - 8710 0034 000C0240 .word 1073875968 - 8711 0038 00000000 .word .LC0 - 8712 003c 00000000 .word .LC2 - 8713 .cfi_endproc - 8714 .LFE1234: - 8716 .section .text.USART_TX,"ax",%progbits - 8717 .align 1 - 8718 .global USART_TX - 8719 .syntax unified - 8720 .thumb - 8721 .thumb_func - 8723 USART_TX: - 8724 .LVL843: - 8725 .LFB1235: -3641:Src/main.c **** uint16_t ind = 0; - 8726 .loc 1 3641 1 is_stmt 1 view -0 - 8727 .cfi_startproc - 8728 @ args = 0, pretend = 0, frame = 0 - 8729 @ frame_needed = 0, uses_anonymous_args = 0 - 8730 @ link register save eliminated. -3641:Src/main.c **** uint16_t ind = 0; - 8731 .loc 1 3641 1 is_stmt 0 view .LVU2718 - 8732 0000 8C46 mov ip, r1 -3642:Src/main.c **** while (indCR3, USART_CR3_DMAT); 3570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -32869,6 +33118,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccuHnxNu.s page 553 + + 3617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Get the data register address used for DMA transfer 3618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RDR RDR LL_USART_DMA_GetRegAddr\n 3619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll TDR TDR LL_USART_DMA_GetRegAddr @@ -32878,9 +33130,6 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DMA_REG_DATA_RECEIVE 3624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Address of data register 3625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccEQxcUB.s page 549 - - 3626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx, uint32_t Direction) 3627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t data_reg_addr; @@ -32929,6 +33178,9 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR)); 3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccuHnxNu.s page 554 + + 3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) 3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll TDR TDR LL_USART_TransmitData8 @@ -32937,6960 +33189,7054 @@ ARM GAS /tmp/ccEQxcUB.s page 1 3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value) - 8772 .loc 7 3681 22 view .LVU2733 - ARM GAS /tmp/ccEQxcUB.s page 550 - - - 8773 .LBB630: + 8931 .loc 7 3681 22 view .LVU2775 + 8932 .LBB633: 3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USARTx->TDR = Value; - 8774 .loc 7 3683 3 view .LVU2734 - 8775 .loc 7 3683 15 is_stmt 0 view .LVU2735 - 8776 0018 034B ldr r3, .L477 - 8777 001a 9962 str r1, [r3, #40] - 8778 .LVL849: - 8779 .loc 7 3683 15 view .LVU2736 - 8780 .LBE630: - 8781 .LBE629: -3647:Src/main.c **** } - 8782 .loc 1 3647 5 is_stmt 1 view .LVU2737 -3647:Src/main.c **** } - 8783 .loc 1 3647 8 is_stmt 0 view .LVU2738 - 8784 001c 0132 adds r2, r2, #1 - 8785 .LVL850: -3647:Src/main.c **** } - 8786 .loc 1 3647 8 view .LVU2739 - 8787 001e 92B2 uxth r2, r2 - 8788 .LVL851: - 8789 .L473: -3643:Src/main.c **** { - 8790 .loc 1 3643 13 is_stmt 1 view .LVU2740 - 8791 0020 6245 cmp r2, ip - 8792 0022 F1D3 bcc .L475 -3649:Src/main.c **** - 8793 .loc 1 3649 1 is_stmt 0 view .LVU2741 - 8794 0024 7047 bx lr - 8795 .L478: - 8796 0026 00BF .align 2 - 8797 .L477: - 8798 0028 00100140 .word 1073811456 - 8799 .cfi_endproc - 8800 .LFE1235: - 8802 .section .text.USART_TX_DMA,"ax",%progbits - 8803 .align 1 - 8804 .global USART_TX_DMA - 8805 .syntax unified - 8806 .thumb - 8807 .thumb_func - 8809 USART_TX_DMA: - 8810 .LFB1236: -3652:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter - 8811 .loc 1 3652 1 is_stmt 1 view -0 - 8812 .cfi_startproc - 8813 @ args = 0, pretend = 0, frame = 0 - 8814 @ frame_needed = 0, uses_anonymous_args = 0 - 8815 @ link register save eliminated. - 8816 .LVL852: - 8817 .L480: -3653:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 8818 .loc 1 3653 20 discriminator 1 view .LVU2743 -3653:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 8819 .loc 1 3653 9 discriminator 1 view .LVU2744 - 8820 0000 0D4B ldr r3, .L481 - 8821 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 - ARM GAS /tmp/ccEQxcUB.s page 551 + 8933 .loc 7 3683 3 view .LVU2776 + 8934 .loc 7 3683 15 is_stmt 0 view .LVU2777 + 8935 0018 034B ldr r3, .L488 + 8936 001a 9962 str r1, [r3, #40] + 8937 .LVL852: + 8938 .loc 7 3683 15 view .LVU2778 + 8939 .LBE633: + 8940 .LBE632: +3702:Src/main.c **** } + 8941 .loc 1 3702 5 is_stmt 1 view .LVU2779 +3702:Src/main.c **** } + 8942 .loc 1 3702 8 is_stmt 0 view .LVU2780 + 8943 001c 0132 adds r2, r2, #1 + 8944 .LVL853: +3702:Src/main.c **** } + 8945 .loc 1 3702 8 view .LVU2781 + 8946 001e 92B2 uxth r2, r2 + 8947 .LVL854: + 8948 .L484: +3698:Src/main.c **** { + 8949 .loc 1 3698 13 is_stmt 1 view .LVU2782 + 8950 0020 6245 cmp r2, ip + 8951 0022 F1D3 bcc .L486 +3704:Src/main.c **** + 8952 .loc 1 3704 1 is_stmt 0 view .LVU2783 + 8953 0024 7047 bx lr + 8954 .L489: + 8955 0026 00BF .align 2 + 8956 .L488: + 8957 0028 00100140 .word 1073811456 + 8958 .cfi_endproc + 8959 .LFE1237: + 8961 .section .text.USART_TX_DMA,"ax",%progbits + 8962 .align 1 + 8963 .global USART_TX_DMA + 8964 .syntax unified + 8965 .thumb + 8966 .thumb_func + 8968 USART_TX_DMA: + 8969 .LFB1238: +3707:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter + 8970 .loc 1 3707 1 is_stmt 1 view -0 + 8971 .cfi_startproc + 8972 @ args = 0, pretend = 0, frame = 0 + 8973 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccuHnxNu.s page 555 - 8822 0004 002B cmp r3, #0 - 8823 0006 FBD1 bne .L480 -3654:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); - 8824 .loc 1 3654 2 view .LVU2745 - 8825 .LVL853: - 8826 .LBB631: - 8827 .LBI631: + 8974 @ link register save eliminated. + 8975 .LVL855: + 8976 .L491: +3708:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 8977 .loc 1 3708 20 discriminator 1 view .LVU2785 +3708:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 8978 .loc 1 3708 9 discriminator 1 view .LVU2786 + 8979 0000 0D4B ldr r3, .L492 + 8980 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 8981 0004 002B cmp r3, #0 + 8982 0006 FBD1 bne .L491 +3709:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); + 8983 .loc 1 3709 2 view .LVU2787 + 8984 .LVL856: + 8985 .LBB634: + 8986 .LBI634: 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8828 .loc 6 517 22 view .LVU2746 - 8829 .LBB632: + 8987 .loc 6 517 22 view .LVU2788 + 8988 .LBB635: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8830 .loc 6 519 3 view .LVU2747 - 8831 0008 0C4B ldr r3, .L481+4 - 8832 000a D3F8B820 ldr r2, [r3, #184] - 8833 000e 22F00102 bic r2, r2, #1 - 8834 0012 C3F8B820 str r2, [r3, #184] - 8835 .LVL854: + 8989 .loc 6 519 3 view .LVU2789 + 8990 0008 0C4B ldr r3, .L492+4 + 8991 000a D3F8B820 ldr r2, [r3, #184] + 8992 000e 22F00102 bic r2, r2, #1 + 8993 0012 C3F8B820 str r2, [r3, #184] + 8994 .LVL857: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8836 .loc 6 519 3 is_stmt 0 view .LVU2748 - 8837 .LBE632: - 8838 .LBE631: -3655:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); - 8839 .loc 1 3655 3 is_stmt 1 view .LVU2749 - 8840 .LBB633: - 8841 .LBI633: + 8995 .loc 6 519 3 is_stmt 0 view .LVU2790 + 8996 .LBE635: + 8997 .LBE634: +3710:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); + 8998 .loc 1 3710 3 is_stmt 1 view .LVU2791 + 8999 .LBB636: + 9000 .LBI636: 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8842 .loc 6 971 22 view .LVU2750 - 8843 .LBB634: + 9001 .loc 6 971 22 view .LVU2792 + 9002 .LBB637: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8844 .loc 6 973 3 view .LVU2751 - 8845 0016 D3F8BC20 ldr r2, [r3, #188] - 8846 001a 6FF30F02 bfc r2, #0, #16 - 8847 001e 1043 orrs r0, r0, r2 - 8848 .LVL855: + 9003 .loc 6 973 3 view .LVU2793 + 9004 0016 D3F8BC20 ldr r2, [r3, #188] + 9005 001a 6FF30F02 bfc r2, #0, #16 + 9006 001e 1043 orrs r0, r0, r2 + 9007 .LVL858: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8849 .loc 6 973 3 is_stmt 0 view .LVU2752 - 8850 0020 C3F8BC00 str r0, [r3, #188] - 8851 .LVL856: + 9008 .loc 6 973 3 is_stmt 0 view .LVU2794 + 9009 0020 C3F8BC00 str r0, [r3, #188] + 9010 .LVL859: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8852 .loc 6 973 3 view .LVU2753 - 8853 .LBE634: - 8854 .LBE633: -3656:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin - 8855 .loc 1 3656 3 is_stmt 1 view .LVU2754 - 8856 .LBB635: - 8857 .LBI635: + 9011 .loc 6 973 3 view .LVU2795 + 9012 .LBE637: + 9013 .LBE636: +3711:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin + 9014 .loc 1 3711 3 is_stmt 1 view .LVU2796 + 9015 .LBB638: + 9016 .LBI638: 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8858 .loc 6 497 22 view .LVU2755 - 8859 .LBB636: - 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8860 .loc 6 499 3 view .LVU2756 - 8861 0024 D3F8B820 ldr r2, [r3, #184] - 8862 0028 42F00102 orr r2, r2, #1 - 8863 002c C3F8B820 str r2, [r3, #184] - 8864 .LVL857: - 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8865 .loc 6 499 3 is_stmt 0 view .LVU2757 - ARM GAS /tmp/ccEQxcUB.s page 552 + 9017 .loc 6 497 22 view .LVU2797 + ARM GAS /tmp/ccuHnxNu.s page 556 + + + 9018 .LBB639: + 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9019 .loc 6 499 3 view .LVU2798 + 9020 0024 D3F8B820 ldr r2, [r3, #184] + 9021 0028 42F00102 orr r2, r2, #1 + 9022 002c C3F8B820 str r2, [r3, #184] + 9023 .LVL860: + 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9024 .loc 6 499 3 is_stmt 0 view .LVU2799 + 9025 .LBE639: + 9026 .LBE638: +3712:Src/main.c **** } + 9027 .loc 1 3712 2 is_stmt 1 view .LVU2800 +3712:Src/main.c **** } + 9028 .loc 1 3712 11 is_stmt 0 view .LVU2801 + 9029 0030 014B ldr r3, .L492 + 9030 0032 0122 movs r2, #1 + 9031 0034 1A70 strb r2, [r3] +3713:Src/main.c **** + 9032 .loc 1 3713 1 view .LVU2802 + 9033 0036 7047 bx lr + 9034 .L493: + 9035 .align 2 + 9036 .L492: + 9037 0038 00000000 .word u_tx_flg + 9038 003c 00640240 .word 1073898496 + 9039 .cfi_endproc + 9040 .LFE1238: + 9042 .section .text.Error_Handler,"ax",%progbits + 9043 .align 1 + 9044 .global Error_Handler + 9045 .syntax unified + 9046 .thumb + 9047 .thumb_func + 9049 Error_Handler: + 9050 .LFB1240: +3721:Src/main.c **** //------------------------------------------------------- +3722:Src/main.c **** /* USER CODE END 4 */ +3723:Src/main.c **** +3724:Src/main.c **** /** +3725:Src/main.c **** * @brief This function is executed in case of error occurrence. +3726:Src/main.c **** * @retval None +3727:Src/main.c **** */ +3728:Src/main.c **** void Error_Handler(void) +3729:Src/main.c **** { + 9051 .loc 1 3729 1 is_stmt 1 view -0 + 9052 .cfi_startproc + 9053 @ Volatile: function does not return. + 9054 @ args = 0, pretend = 0, frame = 0 + 9055 @ frame_needed = 0, uses_anonymous_args = 0 + 9056 @ link register save eliminated. +3730:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ +3731:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ +3732:Src/main.c **** __disable_irq(); + 9057 .loc 1 3732 3 view .LVU2804 + 9058 .LBB640: + 9059 .LBI640: + ARM GAS /tmp/ccuHnxNu.s page 557 - 8866 .LBE636: - 8867 .LBE635: -3657:Src/main.c **** } - 8868 .loc 1 3657 2 is_stmt 1 view .LVU2758 -3657:Src/main.c **** } - 8869 .loc 1 3657 11 is_stmt 0 view .LVU2759 - 8870 0030 014B ldr r3, .L481 - 8871 0032 0122 movs r2, #1 - 8872 0034 1A70 strb r2, [r3] -3658:Src/main.c **** - 8873 .loc 1 3658 1 view .LVU2760 - 8874 0036 7047 bx lr - 8875 .L482: - 8876 .align 2 - 8877 .L481: - 8878 0038 00000000 .word u_tx_flg - 8879 003c 00640240 .word 1073898496 - 8880 .cfi_endproc - 8881 .LFE1236: - 8883 .section .text.Error_Handler,"ax",%progbits - 8884 .align 1 - 8885 .global Error_Handler - 8886 .syntax unified - 8887 .thumb - 8888 .thumb_func - 8890 Error_Handler: - 8891 .LFB1238: -3666:Src/main.c **** //------------------------------------------------------- -3667:Src/main.c **** /* USER CODE END 4 */ -3668:Src/main.c **** -3669:Src/main.c **** /** -3670:Src/main.c **** * @brief This function is executed in case of error occurrence. -3671:Src/main.c **** * @retval None -3672:Src/main.c **** */ -3673:Src/main.c **** void Error_Handler(void) -3674:Src/main.c **** { - 8892 .loc 1 3674 1 is_stmt 1 view -0 - 8893 .cfi_startproc - 8894 @ Volatile: function does not return. - 8895 @ args = 0, pretend = 0, frame = 0 - 8896 @ frame_needed = 0, uses_anonymous_args = 0 - 8897 @ link register save eliminated. -3675:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ -3676:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ -3677:Src/main.c **** __disable_irq(); - 8898 .loc 1 3677 3 view .LVU2762 - 8899 .LBB637: - 8900 .LBI637: 140:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8901 .loc 8 140 27 view .LVU2763 - 8902 .LBB638: + 9060 .loc 8 140 27 view .LVU2805 + 9061 .LBB641: 142:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 8903 .loc 8 142 3 view .LVU2764 - 8904 .syntax unified - 8905 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8906 0000 72B6 cpsid i - 8907 @ 0 "" 2 - ARM GAS /tmp/ccEQxcUB.s page 553 + 9062 .loc 8 142 3 view .LVU2806 + 9063 .syntax unified + 9064 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9065 0000 72B6 cpsid i + 9066 @ 0 "" 2 + 9067 .thumb + 9068 .syntax unified + 9069 .L495: + 9070 .LBE641: + 9071 .LBE640: +3733:Src/main.c **** while (1) + 9072 .loc 1 3733 3 view .LVU2807 +3734:Src/main.c **** { +3735:Src/main.c **** } + 9073 .loc 1 3735 3 view .LVU2808 +3733:Src/main.c **** while (1) + 9074 .loc 1 3733 9 view .LVU2809 + 9075 0002 FEE7 b .L495 + 9076 .cfi_endproc + 9077 .LFE1240: + 9079 .section .text.MX_ADC1_Init,"ax",%progbits + 9080 .align 1 + 9081 .syntax unified + 9082 .thumb + 9083 .thumb_func + 9085 MX_ADC1_Init: + 9086 .LFB1188: +1105:Src/main.c **** + 9087 .loc 1 1105 1 view -0 + 9088 .cfi_startproc + 9089 @ args = 0, pretend = 0, frame = 16 + 9090 @ frame_needed = 0, uses_anonymous_args = 0 + 9091 0000 00B5 push {lr} + 9092 .LCFI79: + 9093 .cfi_def_cfa_offset 4 + 9094 .cfi_offset 14, -4 + 9095 0002 85B0 sub sp, sp, #20 + 9096 .LCFI80: + 9097 .cfi_def_cfa_offset 24 +1111:Src/main.c **** + 9098 .loc 1 1111 3 view .LVU2811 +1111:Src/main.c **** + 9099 .loc 1 1111 26 is_stmt 0 view .LVU2812 + 9100 0004 0023 movs r3, #0 + 9101 0006 0093 str r3, [sp] + 9102 0008 0193 str r3, [sp, #4] + 9103 000a 0293 str r3, [sp, #8] + 9104 000c 0393 str r3, [sp, #12] +1119:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9105 .loc 1 1119 3 is_stmt 1 view .LVU2813 +1119:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9106 .loc 1 1119 18 is_stmt 0 view .LVU2814 + 9107 000e 2B48 ldr r0, .L510 + ARM GAS /tmp/ccuHnxNu.s page 558 - 8908 .thumb - 8909 .syntax unified - 8910 .L484: - 8911 .LBE638: - 8912 .LBE637: -3678:Src/main.c **** while (1) - 8913 .loc 1 3678 3 view .LVU2765 -3679:Src/main.c **** { -3680:Src/main.c **** } - 8914 .loc 1 3680 3 view .LVU2766 -3678:Src/main.c **** while (1) - 8915 .loc 1 3678 9 view .LVU2767 - 8916 0002 FEE7 b .L484 - 8917 .cfi_endproc - 8918 .LFE1238: - 8920 .section .text.MX_ADC1_Init,"ax",%progbits - 8921 .align 1 - 8922 .syntax unified - 8923 .thumb - 8924 .thumb_func - 8926 MX_ADC1_Init: - 8927 .LFB1188: -1085:Src/main.c **** - 8928 .loc 1 1085 1 view -0 - 8929 .cfi_startproc - 8930 @ args = 0, pretend = 0, frame = 16 - 8931 @ frame_needed = 0, uses_anonymous_args = 0 - 8932 0000 00B5 push {lr} - 8933 .LCFI76: - 8934 .cfi_def_cfa_offset 4 - 8935 .cfi_offset 14, -4 - 8936 0002 85B0 sub sp, sp, #20 - 8937 .LCFI77: - 8938 .cfi_def_cfa_offset 24 -1091:Src/main.c **** - 8939 .loc 1 1091 3 view .LVU2769 -1091:Src/main.c **** - 8940 .loc 1 1091 26 is_stmt 0 view .LVU2770 - 8941 0004 0023 movs r3, #0 - 8942 0006 0093 str r3, [sp] - 8943 0008 0193 str r3, [sp, #4] - 8944 000a 0293 str r3, [sp, #8] - 8945 000c 0393 str r3, [sp, #12] -1099:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 8946 .loc 1 1099 3 is_stmt 1 view .LVU2771 -1099:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 8947 .loc 1 1099 18 is_stmt 0 view .LVU2772 - 8948 000e 2B48 ldr r0, .L499 - 8949 0010 2B4A ldr r2, .L499+4 - 8950 0012 0260 str r2, [r0] -1100:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 8951 .loc 1 1100 3 is_stmt 1 view .LVU2773 -1100:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 8952 .loc 1 1100 29 is_stmt 0 view .LVU2774 - 8953 0014 4FF44032 mov r2, #196608 - 8954 0018 4260 str r2, [r0, #4] -1101:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - ARM GAS /tmp/ccEQxcUB.s page 554 + 9108 0010 2B4A ldr r2, .L510+4 + 9109 0012 0260 str r2, [r0] +1120:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 9110 .loc 1 1120 3 is_stmt 1 view .LVU2815 +1120:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 9111 .loc 1 1120 29 is_stmt 0 view .LVU2816 + 9112 0014 4FF44032 mov r2, #196608 + 9113 0018 4260 str r2, [r0, #4] +1121:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 9114 .loc 1 1121 3 is_stmt 1 view .LVU2817 +1121:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 9115 .loc 1 1121 25 is_stmt 0 view .LVU2818 + 9116 001a 8360 str r3, [r0, #8] +1122:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 9117 .loc 1 1122 3 is_stmt 1 view .LVU2819 +1122:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 9118 .loc 1 1122 27 is_stmt 0 view .LVU2820 + 9119 001c 0122 movs r2, #1 + 9120 001e 0261 str r2, [r0, #16] +1123:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 9121 .loc 1 1123 3 is_stmt 1 view .LVU2821 +1123:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 9122 .loc 1 1123 33 is_stmt 0 view .LVU2822 + 9123 0020 8361 str r3, [r0, #24] +1124:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9124 .loc 1 1124 3 is_stmt 1 view .LVU2823 +1124:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9125 .loc 1 1124 36 is_stmt 0 view .LVU2824 + 9126 0022 80F82030 strb r3, [r0, #32] +1125:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9127 .loc 1 1125 3 is_stmt 1 view .LVU2825 +1125:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9128 .loc 1 1125 35 is_stmt 0 view .LVU2826 + 9129 0026 C362 str r3, [r0, #44] +1126:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9130 .loc 1 1126 3 is_stmt 1 view .LVU2827 +1126:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9131 .loc 1 1126 31 is_stmt 0 view .LVU2828 + 9132 0028 2649 ldr r1, .L510+8 + 9133 002a 8162 str r1, [r0, #40] +1127:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 9134 .loc 1 1127 3 is_stmt 1 view .LVU2829 +1127:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 9135 .loc 1 1127 24 is_stmt 0 view .LVU2830 + 9136 002c C360 str r3, [r0, #12] +1128:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 9137 .loc 1 1128 3 is_stmt 1 view .LVU2831 +1128:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 9138 .loc 1 1128 30 is_stmt 0 view .LVU2832 + 9139 002e 0521 movs r1, #5 + 9140 0030 C161 str r1, [r0, #28] +1129:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9141 .loc 1 1129 3 is_stmt 1 view .LVU2833 +1129:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9142 .loc 1 1129 36 is_stmt 0 view .LVU2834 + 9143 0032 80F83030 strb r3, [r0, #48] +1130:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + ARM GAS /tmp/ccuHnxNu.s page 559 - 8955 .loc 1 1101 3 is_stmt 1 view .LVU2775 -1101:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 8956 .loc 1 1101 25 is_stmt 0 view .LVU2776 - 8957 001a 8360 str r3, [r0, #8] -1102:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 8958 .loc 1 1102 3 is_stmt 1 view .LVU2777 -1102:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 8959 .loc 1 1102 27 is_stmt 0 view .LVU2778 - 8960 001c 0122 movs r2, #1 - 8961 001e 0261 str r2, [r0, #16] -1103:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 8962 .loc 1 1103 3 is_stmt 1 view .LVU2779 -1103:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 8963 .loc 1 1103 33 is_stmt 0 view .LVU2780 - 8964 0020 8361 str r3, [r0, #24] -1104:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 8965 .loc 1 1104 3 is_stmt 1 view .LVU2781 -1104:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 8966 .loc 1 1104 36 is_stmt 0 view .LVU2782 - 8967 0022 80F82030 strb r3, [r0, #32] -1105:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8968 .loc 1 1105 3 is_stmt 1 view .LVU2783 -1105:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8969 .loc 1 1105 35 is_stmt 0 view .LVU2784 - 8970 0026 C362 str r3, [r0, #44] -1106:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8971 .loc 1 1106 3 is_stmt 1 view .LVU2785 -1106:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8972 .loc 1 1106 31 is_stmt 0 view .LVU2786 - 8973 0028 2649 ldr r1, .L499+8 - 8974 002a 8162 str r1, [r0, #40] -1107:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 8975 .loc 1 1107 3 is_stmt 1 view .LVU2787 -1107:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 8976 .loc 1 1107 24 is_stmt 0 view .LVU2788 - 8977 002c C360 str r3, [r0, #12] -1108:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 8978 .loc 1 1108 3 is_stmt 1 view .LVU2789 -1108:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 8979 .loc 1 1108 30 is_stmt 0 view .LVU2790 - 8980 002e 0521 movs r1, #5 - 8981 0030 C161 str r1, [r0, #28] -1109:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 8982 .loc 1 1109 3 is_stmt 1 view .LVU2791 -1109:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 8983 .loc 1 1109 36 is_stmt 0 view .LVU2792 - 8984 0032 80F83030 strb r3, [r0, #48] -1110:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 8985 .loc 1 1110 3 is_stmt 1 view .LVU2793 -1110:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 8986 .loc 1 1110 27 is_stmt 0 view .LVU2794 - 8987 0036 4261 str r2, [r0, #20] -1111:Src/main.c **** { - 8988 .loc 1 1111 3 is_stmt 1 view .LVU2795 -1111:Src/main.c **** { - 8989 .loc 1 1111 7 is_stmt 0 view .LVU2796 - 8990 0038 FFF7FEFF bl HAL_ADC_Init - ARM GAS /tmp/ccEQxcUB.s page 555 + 9144 .loc 1 1130 3 is_stmt 1 view .LVU2835 +1130:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 9145 .loc 1 1130 27 is_stmt 0 view .LVU2836 + 9146 0036 4261 str r2, [r0, #20] +1131:Src/main.c **** { + 9147 .loc 1 1131 3 is_stmt 1 view .LVU2837 +1131:Src/main.c **** { + 9148 .loc 1 1131 7 is_stmt 0 view .LVU2838 + 9149 0038 FFF7FEFF bl HAL_ADC_Init + 9150 .LVL861: +1131:Src/main.c **** { + 9151 .loc 1 1131 6 discriminator 1 view .LVU2839 + 9152 003c 0028 cmp r0, #0 + 9153 003e 31D1 bne .L504 +1138:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9154 .loc 1 1138 3 is_stmt 1 view .LVU2840 +1138:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9155 .loc 1 1138 19 is_stmt 0 view .LVU2841 + 9156 0040 0923 movs r3, #9 + 9157 0042 0093 str r3, [sp] +1139:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9158 .loc 1 1139 3 is_stmt 1 view .LVU2842 +1139:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9159 .loc 1 1139 16 is_stmt 0 view .LVU2843 + 9160 0044 0123 movs r3, #1 + 9161 0046 0193 str r3, [sp, #4] +1140:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9162 .loc 1 1140 3 is_stmt 1 view .LVU2844 +1140:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9163 .loc 1 1140 24 is_stmt 0 view .LVU2845 + 9164 0048 0723 movs r3, #7 + 9165 004a 0293 str r3, [sp, #8] +1141:Src/main.c **** { + 9166 .loc 1 1141 3 is_stmt 1 view .LVU2846 +1141:Src/main.c **** { + 9167 .loc 1 1141 7 is_stmt 0 view .LVU2847 + 9168 004c 6946 mov r1, sp + 9169 004e 1B48 ldr r0, .L510 + 9170 0050 FFF7FEFF bl HAL_ADC_ConfigChannel + 9171 .LVL862: +1141:Src/main.c **** { + 9172 .loc 1 1141 6 discriminator 1 view .LVU2848 + 9173 0054 40BB cbnz r0, .L505 +1148:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 9174 .loc 1 1148 3 is_stmt 1 view .LVU2849 +1148:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 9175 .loc 1 1148 19 is_stmt 0 view .LVU2850 + 9176 0056 0823 movs r3, #8 + 9177 0058 0093 str r3, [sp] +1149:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9178 .loc 1 1149 3 is_stmt 1 view .LVU2851 +1149:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9179 .loc 1 1149 16 is_stmt 0 view .LVU2852 + 9180 005a 0223 movs r3, #2 + 9181 005c 0193 str r3, [sp, #4] +1150:Src/main.c **** { + 9182 .loc 1 1150 3 is_stmt 1 view .LVU2853 + ARM GAS /tmp/ccuHnxNu.s page 560 - 8991 .LVL858: -1111:Src/main.c **** { - 8992 .loc 1 1111 6 discriminator 1 view .LVU2797 - 8993 003c 0028 cmp r0, #0 - 8994 003e 31D1 bne .L493 -1118:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 8995 .loc 1 1118 3 is_stmt 1 view .LVU2798 -1118:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 8996 .loc 1 1118 19 is_stmt 0 view .LVU2799 - 8997 0040 0923 movs r3, #9 - 8998 0042 0093 str r3, [sp] -1119:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 8999 .loc 1 1119 3 is_stmt 1 view .LVU2800 -1119:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 9000 .loc 1 1119 16 is_stmt 0 view .LVU2801 - 9001 0044 0123 movs r3, #1 - 9002 0046 0193 str r3, [sp, #4] -1120:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9003 .loc 1 1120 3 is_stmt 1 view .LVU2802 -1120:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9004 .loc 1 1120 24 is_stmt 0 view .LVU2803 - 9005 0048 0723 movs r3, #7 - 9006 004a 0293 str r3, [sp, #8] -1121:Src/main.c **** { - 9007 .loc 1 1121 3 is_stmt 1 view .LVU2804 -1121:Src/main.c **** { - 9008 .loc 1 1121 7 is_stmt 0 view .LVU2805 - 9009 004c 6946 mov r1, sp - 9010 004e 1B48 ldr r0, .L499 - 9011 0050 FFF7FEFF bl HAL_ADC_ConfigChannel - 9012 .LVL859: -1121:Src/main.c **** { - 9013 .loc 1 1121 6 discriminator 1 view .LVU2806 - 9014 0054 40BB cbnz r0, .L494 -1128:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 9015 .loc 1 1128 3 is_stmt 1 view .LVU2807 -1128:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 9016 .loc 1 1128 19 is_stmt 0 view .LVU2808 - 9017 0056 0823 movs r3, #8 - 9018 0058 0093 str r3, [sp] -1129:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9019 .loc 1 1129 3 is_stmt 1 view .LVU2809 -1129:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9020 .loc 1 1129 16 is_stmt 0 view .LVU2810 - 9021 005a 0223 movs r3, #2 - 9022 005c 0193 str r3, [sp, #4] -1130:Src/main.c **** { - 9023 .loc 1 1130 3 is_stmt 1 view .LVU2811 -1130:Src/main.c **** { - 9024 .loc 1 1130 7 is_stmt 0 view .LVU2812 - 9025 005e 6946 mov r1, sp - 9026 0060 1648 ldr r0, .L499 - 9027 0062 FFF7FEFF bl HAL_ADC_ConfigChannel - 9028 .LVL860: -1130:Src/main.c **** { - 9029 .loc 1 1130 6 discriminator 1 view .LVU2813 - 9030 0066 08BB cbnz r0, .L495 - ARM GAS /tmp/ccEQxcUB.s page 556 +1150:Src/main.c **** { + 9183 .loc 1 1150 7 is_stmt 0 view .LVU2854 + 9184 005e 6946 mov r1, sp + 9185 0060 1648 ldr r0, .L510 + 9186 0062 FFF7FEFF bl HAL_ADC_ConfigChannel + 9187 .LVL863: +1150:Src/main.c **** { + 9188 .loc 1 1150 6 discriminator 1 view .LVU2855 + 9189 0066 08BB cbnz r0, .L506 +1157:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 9190 .loc 1 1157 3 is_stmt 1 view .LVU2856 +1157:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 9191 .loc 1 1157 19 is_stmt 0 view .LVU2857 + 9192 0068 0223 movs r3, #2 + 9193 006a 0093 str r3, [sp] +1158:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9194 .loc 1 1158 3 is_stmt 1 view .LVU2858 +1158:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9195 .loc 1 1158 16 is_stmt 0 view .LVU2859 + 9196 006c 0323 movs r3, #3 + 9197 006e 0193 str r3, [sp, #4] +1159:Src/main.c **** { + 9198 .loc 1 1159 3 is_stmt 1 view .LVU2860 +1159:Src/main.c **** { + 9199 .loc 1 1159 7 is_stmt 0 view .LVU2861 + 9200 0070 6946 mov r1, sp + 9201 0072 1248 ldr r0, .L510 + 9202 0074 FFF7FEFF bl HAL_ADC_ConfigChannel + 9203 .LVL864: +1159:Src/main.c **** { + 9204 .loc 1 1159 6 discriminator 1 view .LVU2862 + 9205 0078 D0B9 cbnz r0, .L507 +1166:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 9206 .loc 1 1166 3 is_stmt 1 view .LVU2863 +1166:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 9207 .loc 1 1166 19 is_stmt 0 view .LVU2864 + 9208 007a 0A23 movs r3, #10 + 9209 007c 0093 str r3, [sp] +1167:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9210 .loc 1 1167 3 is_stmt 1 view .LVU2865 +1167:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9211 .loc 1 1167 16 is_stmt 0 view .LVU2866 + 9212 007e 0423 movs r3, #4 + 9213 0080 0193 str r3, [sp, #4] +1168:Src/main.c **** { + 9214 .loc 1 1168 3 is_stmt 1 view .LVU2867 +1168:Src/main.c **** { + 9215 .loc 1 1168 7 is_stmt 0 view .LVU2868 + 9216 0082 6946 mov r1, sp + 9217 0084 0D48 ldr r0, .L510 + 9218 0086 FFF7FEFF bl HAL_ADC_ConfigChannel + 9219 .LVL865: +1168:Src/main.c **** { + 9220 .loc 1 1168 6 discriminator 1 view .LVU2869 + 9221 008a 98B9 cbnz r0, .L508 +1175:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 9222 .loc 1 1175 3 is_stmt 1 view .LVU2870 + ARM GAS /tmp/ccuHnxNu.s page 561 -1137:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 9031 .loc 1 1137 3 is_stmt 1 view .LVU2814 -1137:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 9032 .loc 1 1137 19 is_stmt 0 view .LVU2815 - 9033 0068 0223 movs r3, #2 - 9034 006a 0093 str r3, [sp] -1138:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9035 .loc 1 1138 3 is_stmt 1 view .LVU2816 -1138:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9036 .loc 1 1138 16 is_stmt 0 view .LVU2817 - 9037 006c 0323 movs r3, #3 - 9038 006e 0193 str r3, [sp, #4] -1139:Src/main.c **** { - 9039 .loc 1 1139 3 is_stmt 1 view .LVU2818 -1139:Src/main.c **** { - 9040 .loc 1 1139 7 is_stmt 0 view .LVU2819 - 9041 0070 6946 mov r1, sp - 9042 0072 1248 ldr r0, .L499 - 9043 0074 FFF7FEFF bl HAL_ADC_ConfigChannel - 9044 .LVL861: -1139:Src/main.c **** { - 9045 .loc 1 1139 6 discriminator 1 view .LVU2820 - 9046 0078 D0B9 cbnz r0, .L496 -1146:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 9047 .loc 1 1146 3 is_stmt 1 view .LVU2821 -1146:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 9048 .loc 1 1146 19 is_stmt 0 view .LVU2822 - 9049 007a 0A23 movs r3, #10 - 9050 007c 0093 str r3, [sp] -1147:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9051 .loc 1 1147 3 is_stmt 1 view .LVU2823 -1147:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9052 .loc 1 1147 16 is_stmt 0 view .LVU2824 - 9053 007e 0423 movs r3, #4 - 9054 0080 0193 str r3, [sp, #4] -1148:Src/main.c **** { - 9055 .loc 1 1148 3 is_stmt 1 view .LVU2825 -1148:Src/main.c **** { - 9056 .loc 1 1148 7 is_stmt 0 view .LVU2826 - 9057 0082 6946 mov r1, sp - 9058 0084 0D48 ldr r0, .L499 - 9059 0086 FFF7FEFF bl HAL_ADC_ConfigChannel - 9060 .LVL862: -1148:Src/main.c **** { - 9061 .loc 1 1148 6 discriminator 1 view .LVU2827 - 9062 008a 98B9 cbnz r0, .L497 -1155:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 9063 .loc 1 1155 3 is_stmt 1 view .LVU2828 -1155:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 9064 .loc 1 1155 19 is_stmt 0 view .LVU2829 - 9065 008c 0B23 movs r3, #11 - 9066 008e 0093 str r3, [sp] -1156:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9067 .loc 1 1156 3 is_stmt 1 view .LVU2830 -1156:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9068 .loc 1 1156 16 is_stmt 0 view .LVU2831 - 9069 0090 0523 movs r3, #5 - ARM GAS /tmp/ccEQxcUB.s page 557 +1175:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 9223 .loc 1 1175 19 is_stmt 0 view .LVU2871 + 9224 008c 0B23 movs r3, #11 + 9225 008e 0093 str r3, [sp] +1176:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9226 .loc 1 1176 3 is_stmt 1 view .LVU2872 +1176:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9227 .loc 1 1176 16 is_stmt 0 view .LVU2873 + 9228 0090 0523 movs r3, #5 + 9229 0092 0193 str r3, [sp, #4] +1177:Src/main.c **** { + 9230 .loc 1 1177 3 is_stmt 1 view .LVU2874 +1177:Src/main.c **** { + 9231 .loc 1 1177 7 is_stmt 0 view .LVU2875 + 9232 0094 6946 mov r1, sp + 9233 0096 0948 ldr r0, .L510 + 9234 0098 FFF7FEFF bl HAL_ADC_ConfigChannel + 9235 .LVL866: +1177:Src/main.c **** { + 9236 .loc 1 1177 6 discriminator 1 view .LVU2876 + 9237 009c 60B9 cbnz r0, .L509 +1185:Src/main.c **** + 9238 .loc 1 1185 1 view .LVU2877 + 9239 009e 05B0 add sp, sp, #20 + 9240 .LCFI81: + 9241 .cfi_remember_state + 9242 .cfi_def_cfa_offset 4 + 9243 @ sp needed + 9244 00a0 5DF804FB ldr pc, [sp], #4 + 9245 .L504: + 9246 .LCFI82: + 9247 .cfi_restore_state +1133:Src/main.c **** } + 9248 .loc 1 1133 5 is_stmt 1 view .LVU2878 + 9249 00a4 FFF7FEFF bl Error_Handler + 9250 .LVL867: + 9251 .L505: +1143:Src/main.c **** } + 9252 .loc 1 1143 5 view .LVU2879 + 9253 00a8 FFF7FEFF bl Error_Handler + 9254 .LVL868: + 9255 .L506: +1152:Src/main.c **** } + 9256 .loc 1 1152 5 view .LVU2880 + 9257 00ac FFF7FEFF bl Error_Handler + 9258 .LVL869: + 9259 .L507: +1161:Src/main.c **** } + 9260 .loc 1 1161 5 view .LVU2881 + 9261 00b0 FFF7FEFF bl Error_Handler + 9262 .LVL870: + 9263 .L508: +1170:Src/main.c **** } + 9264 .loc 1 1170 5 view .LVU2882 + 9265 00b4 FFF7FEFF bl Error_Handler + 9266 .LVL871: + 9267 .L509: + ARM GAS /tmp/ccuHnxNu.s page 562 - 9070 0092 0193 str r3, [sp, #4] -1157:Src/main.c **** { - 9071 .loc 1 1157 3 is_stmt 1 view .LVU2832 -1157:Src/main.c **** { - 9072 .loc 1 1157 7 is_stmt 0 view .LVU2833 - 9073 0094 6946 mov r1, sp - 9074 0096 0948 ldr r0, .L499 - 9075 0098 FFF7FEFF bl HAL_ADC_ConfigChannel - 9076 .LVL863: -1157:Src/main.c **** { - 9077 .loc 1 1157 6 discriminator 1 view .LVU2834 - 9078 009c 60B9 cbnz r0, .L498 -1165:Src/main.c **** - 9079 .loc 1 1165 1 view .LVU2835 - 9080 009e 05B0 add sp, sp, #20 - 9081 .LCFI78: - 9082 .cfi_remember_state - 9083 .cfi_def_cfa_offset 4 - 9084 @ sp needed - 9085 00a0 5DF804FB ldr pc, [sp], #4 - 9086 .L493: - 9087 .LCFI79: - 9088 .cfi_restore_state -1113:Src/main.c **** } - 9089 .loc 1 1113 5 is_stmt 1 view .LVU2836 - 9090 00a4 FFF7FEFF bl Error_Handler - 9091 .LVL864: - 9092 .L494: -1123:Src/main.c **** } - 9093 .loc 1 1123 5 view .LVU2837 - 9094 00a8 FFF7FEFF bl Error_Handler - 9095 .LVL865: - 9096 .L495: -1132:Src/main.c **** } - 9097 .loc 1 1132 5 view .LVU2838 - 9098 00ac FFF7FEFF bl Error_Handler - 9099 .LVL866: - 9100 .L496: -1141:Src/main.c **** } - 9101 .loc 1 1141 5 view .LVU2839 - 9102 00b0 FFF7FEFF bl Error_Handler - 9103 .LVL867: - 9104 .L497: -1150:Src/main.c **** } - 9105 .loc 1 1150 5 view .LVU2840 - 9106 00b4 FFF7FEFF bl Error_Handler - 9107 .LVL868: - 9108 .L498: -1159:Src/main.c **** } - 9109 .loc 1 1159 5 view .LVU2841 - 9110 00b8 FFF7FEFF bl Error_Handler - 9111 .LVL869: - 9112 .L500: - 9113 .align 2 - 9114 .L499: - 9115 00bc 00000000 .word hadc1 - 9116 00c0 00200140 .word 1073815552 - ARM GAS /tmp/ccEQxcUB.s page 558 +1179:Src/main.c **** } + 9268 .loc 1 1179 5 view .LVU2883 + 9269 00b8 FFF7FEFF bl Error_Handler + 9270 .LVL872: + 9271 .L511: + 9272 .align 2 + 9273 .L510: + 9274 00bc 00000000 .word hadc1 + 9275 00c0 00200140 .word 1073815552 + 9276 00c4 0100000F .word 251658241 + 9277 .cfi_endproc + 9278 .LFE1188: + 9280 .section .text.MX_ADC3_Init,"ax",%progbits + 9281 .align 1 + 9282 .syntax unified + 9283 .thumb + 9284 .thumb_func + 9286 MX_ADC3_Init: + 9287 .LFB1189: +1193:Src/main.c **** + 9288 .loc 1 1193 1 view -0 + 9289 .cfi_startproc + 9290 @ args = 0, pretend = 0, frame = 16 + 9291 @ frame_needed = 0, uses_anonymous_args = 0 + 9292 0000 00B5 push {lr} + 9293 .LCFI83: + 9294 .cfi_def_cfa_offset 4 + 9295 .cfi_offset 14, -4 + 9296 0002 85B0 sub sp, sp, #20 + 9297 .LCFI84: + 9298 .cfi_def_cfa_offset 24 +1199:Src/main.c **** + 9299 .loc 1 1199 3 view .LVU2885 +1199:Src/main.c **** + 9300 .loc 1 1199 26 is_stmt 0 view .LVU2886 + 9301 0004 0023 movs r3, #0 + 9302 0006 0093 str r3, [sp] + 9303 0008 0193 str r3, [sp, #4] + 9304 000a 0293 str r3, [sp, #8] + 9305 000c 0393 str r3, [sp, #12] +1207:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9306 .loc 1 1207 3 is_stmt 1 view .LVU2887 +1207:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9307 .loc 1 1207 18 is_stmt 0 view .LVU2888 + 9308 000e 1448 ldr r0, .L518 + 9309 0010 144A ldr r2, .L518+4 + 9310 0012 0260 str r2, [r0] +1208:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 9311 .loc 1 1208 3 is_stmt 1 view .LVU2889 +1208:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 9312 .loc 1 1208 29 is_stmt 0 view .LVU2890 + 9313 0014 4FF44032 mov r2, #196608 + 9314 0018 4260 str r2, [r0, #4] +1209:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 9315 .loc 1 1209 3 is_stmt 1 view .LVU2891 +1209:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 9316 .loc 1 1209 25 is_stmt 0 view .LVU2892 + ARM GAS /tmp/ccuHnxNu.s page 563 - 9117 00c4 0100000F .word 251658241 - 9118 .cfi_endproc - 9119 .LFE1188: - 9121 .section .text.MX_ADC3_Init,"ax",%progbits - 9122 .align 1 - 9123 .syntax unified - 9124 .thumb - 9125 .thumb_func - 9127 MX_ADC3_Init: - 9128 .LFB1189: -1173:Src/main.c **** - 9129 .loc 1 1173 1 view -0 - 9130 .cfi_startproc - 9131 @ args = 0, pretend = 0, frame = 16 - 9132 @ frame_needed = 0, uses_anonymous_args = 0 - 9133 0000 00B5 push {lr} - 9134 .LCFI80: - 9135 .cfi_def_cfa_offset 4 - 9136 .cfi_offset 14, -4 - 9137 0002 85B0 sub sp, sp, #20 - 9138 .LCFI81: - 9139 .cfi_def_cfa_offset 24 -1179:Src/main.c **** - 9140 .loc 1 1179 3 view .LVU2843 -1179:Src/main.c **** - 9141 .loc 1 1179 26 is_stmt 0 view .LVU2844 - 9142 0004 0023 movs r3, #0 - 9143 0006 0093 str r3, [sp] - 9144 0008 0193 str r3, [sp, #4] - 9145 000a 0293 str r3, [sp, #8] - 9146 000c 0393 str r3, [sp, #12] -1187:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 9147 .loc 1 1187 3 is_stmt 1 view .LVU2845 -1187:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 9148 .loc 1 1187 18 is_stmt 0 view .LVU2846 - 9149 000e 1448 ldr r0, .L507 - 9150 0010 144A ldr r2, .L507+4 - 9151 0012 0260 str r2, [r0] -1188:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 9152 .loc 1 1188 3 is_stmt 1 view .LVU2847 -1188:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 9153 .loc 1 1188 29 is_stmt 0 view .LVU2848 - 9154 0014 4FF44032 mov r2, #196608 - 9155 0018 4260 str r2, [r0, #4] -1189:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 9156 .loc 1 1189 3 is_stmt 1 view .LVU2849 -1189:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 9157 .loc 1 1189 25 is_stmt 0 view .LVU2850 - 9158 001a 8360 str r3, [r0, #8] -1190:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 9159 .loc 1 1190 3 is_stmt 1 view .LVU2851 -1190:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 9160 .loc 1 1190 27 is_stmt 0 view .LVU2852 - 9161 001c 0361 str r3, [r0, #16] -1191:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 9162 .loc 1 1191 3 is_stmt 1 view .LVU2853 -1191:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - ARM GAS /tmp/ccEQxcUB.s page 559 + 9317 001a 8360 str r3, [r0, #8] +1210:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 9318 .loc 1 1210 3 is_stmt 1 view .LVU2893 +1210:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 9319 .loc 1 1210 27 is_stmt 0 view .LVU2894 + 9320 001c 0361 str r3, [r0, #16] +1211:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 9321 .loc 1 1211 3 is_stmt 1 view .LVU2895 +1211:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 9322 .loc 1 1211 33 is_stmt 0 view .LVU2896 + 9323 001e 8361 str r3, [r0, #24] +1212:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9324 .loc 1 1212 3 is_stmt 1 view .LVU2897 +1212:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9325 .loc 1 1212 36 is_stmt 0 view .LVU2898 + 9326 0020 80F82030 strb r3, [r0, #32] +1213:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9327 .loc 1 1213 3 is_stmt 1 view .LVU2899 +1213:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9328 .loc 1 1213 35 is_stmt 0 view .LVU2900 + 9329 0024 C362 str r3, [r0, #44] +1214:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9330 .loc 1 1214 3 is_stmt 1 view .LVU2901 +1214:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9331 .loc 1 1214 31 is_stmt 0 view .LVU2902 + 9332 0026 104A ldr r2, .L518+8 + 9333 0028 8262 str r2, [r0, #40] +1215:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 9334 .loc 1 1215 3 is_stmt 1 view .LVU2903 +1215:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 9335 .loc 1 1215 24 is_stmt 0 view .LVU2904 + 9336 002a C360 str r3, [r0, #12] +1216:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 9337 .loc 1 1216 3 is_stmt 1 view .LVU2905 +1216:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 9338 .loc 1 1216 30 is_stmt 0 view .LVU2906 + 9339 002c 0122 movs r2, #1 + 9340 002e C261 str r2, [r0, #28] +1217:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9341 .loc 1 1217 3 is_stmt 1 view .LVU2907 +1217:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9342 .loc 1 1217 36 is_stmt 0 view .LVU2908 + 9343 0030 80F83030 strb r3, [r0, #48] +1218:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 9344 .loc 1 1218 3 is_stmt 1 view .LVU2909 +1218:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 9345 .loc 1 1218 27 is_stmt 0 view .LVU2910 + 9346 0034 4261 str r2, [r0, #20] +1219:Src/main.c **** { + 9347 .loc 1 1219 3 is_stmt 1 view .LVU2911 +1219:Src/main.c **** { + 9348 .loc 1 1219 7 is_stmt 0 view .LVU2912 + 9349 0036 FFF7FEFF bl HAL_ADC_Init + 9350 .LVL873: +1219:Src/main.c **** { + 9351 .loc 1 1219 6 discriminator 1 view .LVU2913 + 9352 003a 68B9 cbnz r0, .L516 + ARM GAS /tmp/ccuHnxNu.s page 564 - 9163 .loc 1 1191 33 is_stmt 0 view .LVU2854 - 9164 001e 8361 str r3, [r0, #24] -1192:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 9165 .loc 1 1192 3 is_stmt 1 view .LVU2855 -1192:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 9166 .loc 1 1192 36 is_stmt 0 view .LVU2856 - 9167 0020 80F82030 strb r3, [r0, #32] -1193:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 9168 .loc 1 1193 3 is_stmt 1 view .LVU2857 -1193:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 9169 .loc 1 1193 35 is_stmt 0 view .LVU2858 - 9170 0024 C362 str r3, [r0, #44] -1194:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 9171 .loc 1 1194 3 is_stmt 1 view .LVU2859 -1194:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 9172 .loc 1 1194 31 is_stmt 0 view .LVU2860 - 9173 0026 104A ldr r2, .L507+8 - 9174 0028 8262 str r2, [r0, #40] -1195:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 9175 .loc 1 1195 3 is_stmt 1 view .LVU2861 -1195:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 9176 .loc 1 1195 24 is_stmt 0 view .LVU2862 - 9177 002a C360 str r3, [r0, #12] -1196:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 9178 .loc 1 1196 3 is_stmt 1 view .LVU2863 -1196:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 9179 .loc 1 1196 30 is_stmt 0 view .LVU2864 - 9180 002c 0122 movs r2, #1 - 9181 002e C261 str r2, [r0, #28] -1197:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 9182 .loc 1 1197 3 is_stmt 1 view .LVU2865 -1197:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 9183 .loc 1 1197 36 is_stmt 0 view .LVU2866 - 9184 0030 80F83030 strb r3, [r0, #48] -1198:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 9185 .loc 1 1198 3 is_stmt 1 view .LVU2867 -1198:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 9186 .loc 1 1198 27 is_stmt 0 view .LVU2868 - 9187 0034 4261 str r2, [r0, #20] -1199:Src/main.c **** { - 9188 .loc 1 1199 3 is_stmt 1 view .LVU2869 -1199:Src/main.c **** { - 9189 .loc 1 1199 7 is_stmt 0 view .LVU2870 - 9190 0036 FFF7FEFF bl HAL_ADC_Init - 9191 .LVL870: -1199:Src/main.c **** { - 9192 .loc 1 1199 6 discriminator 1 view .LVU2871 - 9193 003a 68B9 cbnz r0, .L505 -1206:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 9194 .loc 1 1206 3 is_stmt 1 view .LVU2872 -1206:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 9195 .loc 1 1206 19 is_stmt 0 view .LVU2873 - 9196 003c 0F23 movs r3, #15 - 9197 003e 0093 str r3, [sp] -1207:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 9198 .loc 1 1207 3 is_stmt 1 view .LVU2874 -1207:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - ARM GAS /tmp/ccEQxcUB.s page 560 +1226:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9353 .loc 1 1226 3 is_stmt 1 view .LVU2914 +1226:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9354 .loc 1 1226 19 is_stmt 0 view .LVU2915 + 9355 003c 0F23 movs r3, #15 + 9356 003e 0093 str r3, [sp] +1227:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9357 .loc 1 1227 3 is_stmt 1 view .LVU2916 +1227:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9358 .loc 1 1227 16 is_stmt 0 view .LVU2917 + 9359 0040 0123 movs r3, #1 + 9360 0042 0193 str r3, [sp, #4] +1228:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 9361 .loc 1 1228 3 is_stmt 1 view .LVU2918 +1228:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 9362 .loc 1 1228 24 is_stmt 0 view .LVU2919 + 9363 0044 0723 movs r3, #7 + 9364 0046 0293 str r3, [sp, #8] +1229:Src/main.c **** { + 9365 .loc 1 1229 3 is_stmt 1 view .LVU2920 +1229:Src/main.c **** { + 9366 .loc 1 1229 7 is_stmt 0 view .LVU2921 + 9367 0048 6946 mov r1, sp + 9368 004a 0548 ldr r0, .L518 + 9369 004c FFF7FEFF bl HAL_ADC_ConfigChannel + 9370 .LVL874: +1229:Src/main.c **** { + 9371 .loc 1 1229 6 discriminator 1 view .LVU2922 + 9372 0050 20B9 cbnz r0, .L517 +1237:Src/main.c **** + 9373 .loc 1 1237 1 view .LVU2923 + 9374 0052 05B0 add sp, sp, #20 + 9375 .LCFI85: + 9376 .cfi_remember_state + 9377 .cfi_def_cfa_offset 4 + 9378 @ sp needed + 9379 0054 5DF804FB ldr pc, [sp], #4 + 9380 .L516: + 9381 .LCFI86: + 9382 .cfi_restore_state +1221:Src/main.c **** } + 9383 .loc 1 1221 5 is_stmt 1 view .LVU2924 + 9384 0058 FFF7FEFF bl Error_Handler + 9385 .LVL875: + 9386 .L517: +1231:Src/main.c **** } + 9387 .loc 1 1231 5 view .LVU2925 + 9388 005c FFF7FEFF bl Error_Handler + 9389 .LVL876: + 9390 .L519: + 9391 .align 2 + 9392 .L518: + 9393 0060 00000000 .word hadc3 + 9394 0064 00220140 .word 1073816064 + 9395 0068 0100000F .word 251658241 + 9396 .cfi_endproc + 9397 .LFE1189: + ARM GAS /tmp/ccuHnxNu.s page 565 - 9199 .loc 1 1207 16 is_stmt 0 view .LVU2875 - 9200 0040 0123 movs r3, #1 - 9201 0042 0193 str r3, [sp, #4] -1208:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 9202 .loc 1 1208 3 is_stmt 1 view .LVU2876 -1208:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 9203 .loc 1 1208 24 is_stmt 0 view .LVU2877 - 9204 0044 0723 movs r3, #7 - 9205 0046 0293 str r3, [sp, #8] -1209:Src/main.c **** { - 9206 .loc 1 1209 3 is_stmt 1 view .LVU2878 -1209:Src/main.c **** { - 9207 .loc 1 1209 7 is_stmt 0 view .LVU2879 - 9208 0048 6946 mov r1, sp - 9209 004a 0548 ldr r0, .L507 - 9210 004c FFF7FEFF bl HAL_ADC_ConfigChannel - 9211 .LVL871: -1209:Src/main.c **** { - 9212 .loc 1 1209 6 discriminator 1 view .LVU2880 - 9213 0050 20B9 cbnz r0, .L506 -1217:Src/main.c **** - 9214 .loc 1 1217 1 view .LVU2881 - 9215 0052 05B0 add sp, sp, #20 - 9216 .LCFI82: - 9217 .cfi_remember_state - 9218 .cfi_def_cfa_offset 4 - 9219 @ sp needed - 9220 0054 5DF804FB ldr pc, [sp], #4 - 9221 .L505: - 9222 .LCFI83: - 9223 .cfi_restore_state -1201:Src/main.c **** } - 9224 .loc 1 1201 5 is_stmt 1 view .LVU2882 - 9225 0058 FFF7FEFF bl Error_Handler - 9226 .LVL872: - 9227 .L506: -1211:Src/main.c **** } - 9228 .loc 1 1211 5 view .LVU2883 - 9229 005c FFF7FEFF bl Error_Handler - 9230 .LVL873: - 9231 .L508: - 9232 .align 2 - 9233 .L507: - 9234 0060 00000000 .word hadc3 - 9235 0064 00220140 .word 1073816064 - 9236 0068 0100000F .word 251658241 - 9237 .cfi_endproc - 9238 .LFE1189: - 9240 .section .text.MX_USART1_UART_Init,"ax",%progbits - 9241 .align 1 - 9242 .syntax unified - 9243 .thumb - 9244 .thumb_func - 9246 MX_USART1_UART_Init: - 9247 .LFB1205: -1953:Src/main.c **** - 9248 .loc 1 1953 1 view -0 - ARM GAS /tmp/ccEQxcUB.s page 561 + 9399 .section .text.MX_USART1_UART_Init,"ax",%progbits + 9400 .align 1 + 9401 .syntax unified + 9402 .thumb + 9403 .thumb_func + 9405 MX_USART1_UART_Init: + 9406 .LFB1205: +1973:Src/main.c **** + 9407 .loc 1 1973 1 view -0 + 9408 .cfi_startproc + 9409 @ args = 0, pretend = 0, frame = 208 + 9410 @ frame_needed = 0, uses_anonymous_args = 0 + 9411 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 9412 .LCFI87: + 9413 .cfi_def_cfa_offset 24 + 9414 .cfi_offset 4, -24 + 9415 .cfi_offset 5, -20 + 9416 .cfi_offset 6, -16 + 9417 .cfi_offset 7, -12 + 9418 .cfi_offset 8, -8 + 9419 .cfi_offset 14, -4 + 9420 0004 B4B0 sub sp, sp, #208 + 9421 .LCFI88: + 9422 .cfi_def_cfa_offset 232 +1979:Src/main.c **** + 9423 .loc 1 1979 3 view .LVU2927 +1979:Src/main.c **** + 9424 .loc 1 1979 24 is_stmt 0 view .LVU2928 + 9425 0006 0021 movs r1, #0 + 9426 0008 2D91 str r1, [sp, #180] + 9427 000a 2E91 str r1, [sp, #184] + 9428 000c 2F91 str r1, [sp, #188] + 9429 000e 3091 str r1, [sp, #192] + 9430 0010 3191 str r1, [sp, #196] + 9431 0012 3291 str r1, [sp, #200] + 9432 0014 3391 str r1, [sp, #204] +1981:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 9433 .loc 1 1981 3 is_stmt 1 view .LVU2929 +1981:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 9434 .loc 1 1981 23 is_stmt 0 view .LVU2930 + 9435 0016 2791 str r1, [sp, #156] + 9436 0018 2891 str r1, [sp, #160] + 9437 001a 2991 str r1, [sp, #164] + 9438 001c 2A91 str r1, [sp, #168] + 9439 001e 2B91 str r1, [sp, #172] + 9440 0020 2C91 str r1, [sp, #176] +1982:Src/main.c **** + 9441 .loc 1 1982 3 is_stmt 1 view .LVU2931 +1982:Src/main.c **** + 9442 .loc 1 1982 28 is_stmt 0 view .LVU2932 + 9443 0022 9022 movs r2, #144 + 9444 0024 03A8 add r0, sp, #12 + 9445 0026 FFF7FEFF bl memset + 9446 .LVL877: +1986:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 9447 .loc 1 1986 3 is_stmt 1 view .LVU2933 +1986:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + ARM GAS /tmp/ccuHnxNu.s page 566 - 9249 .cfi_startproc - 9250 @ args = 0, pretend = 0, frame = 208 - 9251 @ frame_needed = 0, uses_anonymous_args = 0 - 9252 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 9253 .LCFI84: - 9254 .cfi_def_cfa_offset 24 - 9255 .cfi_offset 4, -24 - 9256 .cfi_offset 5, -20 - 9257 .cfi_offset 6, -16 - 9258 .cfi_offset 7, -12 - 9259 .cfi_offset 8, -8 - 9260 .cfi_offset 14, -4 - 9261 0004 B4B0 sub sp, sp, #208 - 9262 .LCFI85: - 9263 .cfi_def_cfa_offset 232 -1959:Src/main.c **** - 9264 .loc 1 1959 3 view .LVU2885 -1959:Src/main.c **** - 9265 .loc 1 1959 24 is_stmt 0 view .LVU2886 - 9266 0006 0021 movs r1, #0 - 9267 0008 2D91 str r1, [sp, #180] - 9268 000a 2E91 str r1, [sp, #184] - 9269 000c 2F91 str r1, [sp, #188] - 9270 000e 3091 str r1, [sp, #192] - 9271 0010 3191 str r1, [sp, #196] - 9272 0012 3291 str r1, [sp, #200] - 9273 0014 3391 str r1, [sp, #204] -1961:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 9274 .loc 1 1961 3 is_stmt 1 view .LVU2887 -1961:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 9275 .loc 1 1961 23 is_stmt 0 view .LVU2888 - 9276 0016 2791 str r1, [sp, #156] - 9277 0018 2891 str r1, [sp, #160] - 9278 001a 2991 str r1, [sp, #164] - 9279 001c 2A91 str r1, [sp, #168] - 9280 001e 2B91 str r1, [sp, #172] - 9281 0020 2C91 str r1, [sp, #176] -1962:Src/main.c **** - 9282 .loc 1 1962 3 is_stmt 1 view .LVU2889 -1962:Src/main.c **** - 9283 .loc 1 1962 28 is_stmt 0 view .LVU2890 - 9284 0022 9022 movs r2, #144 - 9285 0024 03A8 add r0, sp, #12 - 9286 0026 FFF7FEFF bl memset - 9287 .LVL874: -1966:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 9288 .loc 1 1966 3 is_stmt 1 view .LVU2891 -1966:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 9289 .loc 1 1966 44 is_stmt 0 view .LVU2892 - 9290 002a 4023 movs r3, #64 - 9291 002c 0393 str r3, [sp, #12] -1967:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 9292 .loc 1 1967 3 is_stmt 1 view .LVU2893 -1968:Src/main.c **** { - 9293 .loc 1 1968 3 view .LVU2894 -1968:Src/main.c **** { - 9294 .loc 1 1968 7 is_stmt 0 view .LVU2895 - ARM GAS /tmp/ccEQxcUB.s page 562 - - - 9295 002e 03A8 add r0, sp, #12 - 9296 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig - 9297 .LVL875: -1968:Src/main.c **** { - 9298 .loc 1 1968 6 discriminator 1 view .LVU2896 - 9299 0034 0028 cmp r0, #0 - 9300 0036 40F09E80 bne .L512 -1974:Src/main.c **** - 9301 .loc 1 1974 3 is_stmt 1 view .LVU2897 - 9302 .LVL876: - 9303 .LBB639: - 9304 .LBI639: + 9448 .loc 1 1986 44 is_stmt 0 view .LVU2934 + 9449 002a 4023 movs r3, #64 + 9450 002c 0393 str r3, [sp, #12] +1987:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + 9451 .loc 1 1987 3 is_stmt 1 view .LVU2935 +1988:Src/main.c **** { + 9452 .loc 1 1988 3 view .LVU2936 +1988:Src/main.c **** { + 9453 .loc 1 1988 7 is_stmt 0 view .LVU2937 + 9454 002e 03A8 add r0, sp, #12 + 9455 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig + 9456 .LVL878: +1988:Src/main.c **** { + 9457 .loc 1 1988 6 discriminator 1 view .LVU2938 + 9458 0034 0028 cmp r0, #0 + 9459 0036 40F09E80 bne .L523 +1994:Src/main.c **** + 9460 .loc 1 1994 3 is_stmt 1 view .LVU2939 + 9461 .LVL879: + 9462 .LBB642: + 9463 .LBI642: 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 9305 .loc 3 1587 22 view .LVU2898 - 9306 .LBB640: + 9464 .loc 3 1587 22 view .LVU2940 + 9465 .LBB643: 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 9307 .loc 3 1589 3 view .LVU2899 + 9466 .loc 3 1589 3 view .LVU2941 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 9308 .loc 3 1590 3 view .LVU2900 - 9309 003a 504B ldr r3, .L513 - 9310 003c 5A6C ldr r2, [r3, #68] - 9311 003e 42F01002 orr r2, r2, #16 - 9312 0042 5A64 str r2, [r3, #68] + 9467 .loc 3 1590 3 view .LVU2942 + 9468 003a 504B ldr r3, .L524 + 9469 003c 5A6C ldr r2, [r3, #68] + 9470 003e 42F01002 orr r2, r2, #16 + 9471 0042 5A64 str r2, [r3, #68] 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9313 .loc 3 1592 3 view .LVU2901 + 9472 .loc 3 1592 3 view .LVU2943 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9314 .loc 3 1592 12 is_stmt 0 view .LVU2902 - 9315 0044 5A6C ldr r2, [r3, #68] - 9316 0046 02F01002 and r2, r2, #16 + 9473 .loc 3 1592 12 is_stmt 0 view .LVU2944 + 9474 0044 5A6C ldr r2, [r3, #68] + 9475 0046 02F01002 and r2, r2, #16 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9317 .loc 3 1592 10 view .LVU2903 - 9318 004a 0292 str r2, [sp, #8] - 9319 .loc 3 1593 3 is_stmt 1 view .LVU2904 - 9320 004c 029A ldr r2, [sp, #8] - 9321 .LVL877: - 9322 .loc 3 1593 3 is_stmt 0 view .LVU2905 - 9323 .LBE640: - 9324 .LBE639: -1976:Src/main.c **** /**USART1 GPIO Configuration - 9325 .loc 1 1976 3 is_stmt 1 view .LVU2906 - 9326 .LBB641: - 9327 .LBI641: + 9476 .loc 3 1592 10 view .LVU2945 + 9477 004a 0292 str r2, [sp, #8] + 9478 .loc 3 1593 3 is_stmt 1 view .LVU2946 + 9479 004c 029A ldr r2, [sp, #8] + 9480 .LVL880: + 9481 .loc 3 1593 3 is_stmt 0 view .LVU2947 + 9482 .LBE643: + 9483 .LBE642: +1996:Src/main.c **** /**USART1 GPIO Configuration + 9484 .loc 1 1996 3 is_stmt 1 view .LVU2948 + 9485 .LBB644: + 9486 .LBI644: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 9328 .loc 3 309 22 view .LVU2907 - 9329 .LBB642: + 9487 .loc 3 309 22 view .LVU2949 + 9488 .LBB645: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 9330 .loc 3 311 3 view .LVU2908 + 9489 .loc 3 311 3 view .LVU2950 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 9331 .loc 3 312 3 view .LVU2909 - 9332 004e 1A6B ldr r2, [r3, #48] - 9333 0050 42F00102 orr r2, r2, #1 - 9334 0054 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9335 .loc 3 314 3 view .LVU2910 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9336 .loc 3 314 12 is_stmt 0 view .LVU2911 - 9337 0056 1B6B ldr r3, [r3, #48] - ARM GAS /tmp/ccEQxcUB.s page 563 + ARM GAS /tmp/ccuHnxNu.s page 567 - 9338 0058 03F00103 and r3, r3, #1 + 9490 .loc 3 312 3 view .LVU2951 + 9491 004e 1A6B ldr r2, [r3, #48] + 9492 0050 42F00102 orr r2, r2, #1 + 9493 0054 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9339 .loc 3 314 10 view .LVU2912 - 9340 005c 0193 str r3, [sp, #4] + 9494 .loc 3 314 3 view .LVU2952 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 9495 .loc 3 314 12 is_stmt 0 view .LVU2953 + 9496 0056 1B6B ldr r3, [r3, #48] + 9497 0058 03F00103 and r3, r3, #1 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 9498 .loc 3 314 10 view .LVU2954 + 9499 005c 0193 str r3, [sp, #4] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 9341 .loc 3 315 3 is_stmt 1 view .LVU2913 - 9342 005e 019B ldr r3, [sp, #4] - 9343 .LVL878: + 9500 .loc 3 315 3 is_stmt 1 view .LVU2955 + 9501 005e 019B ldr r3, [sp, #4] + 9502 .LVL881: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 9344 .loc 3 315 3 is_stmt 0 view .LVU2914 - 9345 .LBE642: - 9346 .LBE641: -1981:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 9347 .loc 1 1981 3 is_stmt 1 view .LVU2915 -1981:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 9348 .loc 1 1981 23 is_stmt 0 view .LVU2916 - 9349 0060 4FF40073 mov r3, #512 - 9350 0064 2793 str r3, [sp, #156] -1982:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9351 .loc 1 1982 3 is_stmt 1 view .LVU2917 -1982:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9352 .loc 1 1982 24 is_stmt 0 view .LVU2918 - 9353 0066 4FF00208 mov r8, #2 - 9354 006a CDF8A080 str r8, [sp, #160] -1983:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9355 .loc 1 1983 3 is_stmt 1 view .LVU2919 -1983:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9356 .loc 1 1983 25 is_stmt 0 view .LVU2920 - 9357 006e 0327 movs r7, #3 - 9358 0070 2997 str r7, [sp, #164] -1984:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9359 .loc 1 1984 3 is_stmt 1 view .LVU2921 -1984:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9360 .loc 1 1984 30 is_stmt 0 view .LVU2922 - 9361 0072 0024 movs r4, #0 - 9362 0074 2A94 str r4, [sp, #168] -1985:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9363 .loc 1 1985 3 is_stmt 1 view .LVU2923 -1985:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9364 .loc 1 1985 24 is_stmt 0 view .LVU2924 - 9365 0076 2B94 str r4, [sp, #172] -1986:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9366 .loc 1 1986 3 is_stmt 1 view .LVU2925 -1986:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9367 .loc 1 1986 29 is_stmt 0 view .LVU2926 - 9368 0078 0726 movs r6, #7 - 9369 007a 2C96 str r6, [sp, #176] -1987:Src/main.c **** - 9370 .loc 1 1987 3 is_stmt 1 view .LVU2927 - 9371 007c 404D ldr r5, .L513+4 - 9372 007e 27A9 add r1, sp, #156 - 9373 0080 2846 mov r0, r5 - 9374 0082 FFF7FEFF bl LL_GPIO_Init - 9375 .LVL879: -1989:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 9376 .loc 1 1989 3 view .LVU2928 -1989:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - ARM GAS /tmp/ccEQxcUB.s page 564 + 9503 .loc 3 315 3 is_stmt 0 view .LVU2956 + 9504 .LBE645: + 9505 .LBE644: +2001:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 9506 .loc 1 2001 3 is_stmt 1 view .LVU2957 +2001:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 9507 .loc 1 2001 23 is_stmt 0 view .LVU2958 + 9508 0060 4FF40073 mov r3, #512 + 9509 0064 2793 str r3, [sp, #156] +2002:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 9510 .loc 1 2002 3 is_stmt 1 view .LVU2959 +2002:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 9511 .loc 1 2002 24 is_stmt 0 view .LVU2960 + 9512 0066 4FF00208 mov r8, #2 + 9513 006a CDF8A080 str r8, [sp, #160] +2003:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 9514 .loc 1 2003 3 is_stmt 1 view .LVU2961 +2003:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 9515 .loc 1 2003 25 is_stmt 0 view .LVU2962 + 9516 006e 0327 movs r7, #3 + 9517 0070 2997 str r7, [sp, #164] +2004:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 9518 .loc 1 2004 3 is_stmt 1 view .LVU2963 +2004:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 9519 .loc 1 2004 30 is_stmt 0 view .LVU2964 + 9520 0072 0024 movs r4, #0 + 9521 0074 2A94 str r4, [sp, #168] +2005:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 9522 .loc 1 2005 3 is_stmt 1 view .LVU2965 +2005:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 9523 .loc 1 2005 24 is_stmt 0 view .LVU2966 + 9524 0076 2B94 str r4, [sp, #172] +2006:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 9525 .loc 1 2006 3 is_stmt 1 view .LVU2967 +2006:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 9526 .loc 1 2006 29 is_stmt 0 view .LVU2968 + 9527 0078 0726 movs r6, #7 + 9528 007a 2C96 str r6, [sp, #176] +2007:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 568 - 9377 .loc 1 1989 23 is_stmt 0 view .LVU2929 - 9378 0086 4FF48063 mov r3, #1024 - 9379 008a 2793 str r3, [sp, #156] -1990:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9380 .loc 1 1990 3 is_stmt 1 view .LVU2930 -1990:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9381 .loc 1 1990 24 is_stmt 0 view .LVU2931 - 9382 008c CDF8A080 str r8, [sp, #160] -1991:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9383 .loc 1 1991 3 is_stmt 1 view .LVU2932 -1991:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9384 .loc 1 1991 25 is_stmt 0 view .LVU2933 - 9385 0090 2997 str r7, [sp, #164] -1992:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9386 .loc 1 1992 3 is_stmt 1 view .LVU2934 -1992:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9387 .loc 1 1992 30 is_stmt 0 view .LVU2935 - 9388 0092 2A94 str r4, [sp, #168] -1993:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9389 .loc 1 1993 3 is_stmt 1 view .LVU2936 -1993:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9390 .loc 1 1993 24 is_stmt 0 view .LVU2937 - 9391 0094 2B94 str r4, [sp, #172] -1994:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9392 .loc 1 1994 3 is_stmt 1 view .LVU2938 -1994:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9393 .loc 1 1994 29 is_stmt 0 view .LVU2939 - 9394 0096 2C96 str r6, [sp, #176] -1995:Src/main.c **** - 9395 .loc 1 1995 3 is_stmt 1 view .LVU2940 - 9396 0098 27A9 add r1, sp, #156 - 9397 009a 2846 mov r0, r5 - 9398 009c FFF7FEFF bl LL_GPIO_Init - 9399 .LVL880: -2000:Src/main.c **** - 9400 .loc 1 2000 3 view .LVU2941 - 9401 .LBB643: - 9402 .LBI643: -1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9403 .loc 6 1032 22 view .LVU2942 - 9404 .LBB644: -1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9405 .loc 6 1034 3 view .LVU2943 - 9406 00a0 384B ldr r3, .L513+8 - 9407 00a2 D3F8B820 ldr r2, [r3, #184] - 9408 00a6 22F0F052 bic r2, r2, #503316480 - 9409 00aa 42F00062 orr r2, r2, #134217728 - 9410 00ae C3F8B820 str r2, [r3, #184] - 9411 .LVL881: -1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9412 .loc 6 1034 3 is_stmt 0 view .LVU2944 - 9413 .LBE644: - 9414 .LBE643: -2002:Src/main.c **** - 9415 .loc 1 2002 3 is_stmt 1 view .LVU2945 - 9416 .LBB645: - 9417 .LBI645: - ARM GAS /tmp/ccEQxcUB.s page 565 - - - 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9418 .loc 6 598 22 view .LVU2946 - 9419 .LBB646: - 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9420 .loc 6 600 3 view .LVU2947 - 9421 00b2 D3F8B820 ldr r2, [r3, #184] - 9422 00b6 22F0C002 bic r2, r2, #192 - 9423 00ba 42F04002 orr r2, r2, #64 - 9424 00be C3F8B820 str r2, [r3, #184] - 9425 .LVL882: - 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9426 .loc 6 600 3 is_stmt 0 view .LVU2948 - 9427 .LBE646: - 9428 .LBE645: -2004:Src/main.c **** - 9429 .loc 1 2004 3 is_stmt 1 view .LVU2949 - 9430 .LBB647: - 9431 .LBI647: - 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9432 .loc 6 924 22 view .LVU2950 - 9433 .LBB648: - 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9434 .loc 6 926 3 view .LVU2951 - 9435 00c2 D3F8B820 ldr r2, [r3, #184] - 9436 00c6 42F44032 orr r2, r2, #196608 - 9437 00ca C3F8B820 str r2, [r3, #184] - 9438 .LVL883: - 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9439 .loc 6 926 3 is_stmt 0 view .LVU2952 - 9440 .LBE648: - 9441 .LBE647: -2006:Src/main.c **** - 9442 .loc 1 2006 3 is_stmt 1 view .LVU2953 - 9443 .LBB649: - 9444 .LBI649: - 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9445 .loc 6 646 22 view .LVU2954 - 9446 .LBB650: - 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9447 .loc 6 648 3 view .LVU2955 - 9448 00ce D3F8B820 ldr r2, [r3, #184] - 9449 00d2 22F49072 bic r2, r2, #288 - 9450 00d6 C3F8B820 str r2, [r3, #184] - 9451 .LVL884: - 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9452 .loc 6 648 3 is_stmt 0 view .LVU2956 - 9453 .LBE650: - 9454 .LBE649: -2008:Src/main.c **** - 9455 .loc 1 2008 3 is_stmt 1 view .LVU2957 - 9456 .LBB651: - 9457 .LBI651: - 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9458 .loc 6 693 22 view .LVU2958 - 9459 .LBB652: - 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9460 .loc 6 695 3 view .LVU2959 - ARM GAS /tmp/ccEQxcUB.s page 566 - - - 9461 00da D3F8B820 ldr r2, [r3, #184] - 9462 00de 22F40072 bic r2, r2, #512 - 9463 00e2 C3F8B820 str r2, [r3, #184] - 9464 .LVL885: - 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9465 .loc 6 695 3 is_stmt 0 view .LVU2960 - 9466 .LBE652: - 9467 .LBE651: -2010:Src/main.c **** - 9468 .loc 1 2010 3 is_stmt 1 view .LVU2961 - 9469 .LBB653: - 9470 .LBI653: - 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9471 .loc 6 738 22 view .LVU2962 - 9472 .LBB654: - 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9473 .loc 6 740 3 view .LVU2963 - 9474 00e6 D3F8B820 ldr r2, [r3, #184] - 9475 00ea 42F48062 orr r2, r2, #1024 - 9476 00ee C3F8B820 str r2, [r3, #184] - 9477 .LVL886: - 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9478 .loc 6 740 3 is_stmt 0 view .LVU2964 - 9479 .LBE654: - 9480 .LBE653: -2012:Src/main.c **** - 9481 .loc 1 2012 3 is_stmt 1 view .LVU2965 - 9482 .LBB655: - 9483 .LBI655: - 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9484 .loc 6 784 22 view .LVU2966 - 9485 .LBB656: - 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9486 .loc 6 786 3 view .LVU2967 - 9487 00f2 D3F8B820 ldr r2, [r3, #184] - 9488 00f6 22F4C052 bic r2, r2, #6144 - 9489 00fa C3F8B820 str r2, [r3, #184] - 9490 .LVL887: - 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9491 .loc 6 786 3 is_stmt 0 view .LVU2968 - 9492 .LBE656: - 9493 .LBE655: -2014:Src/main.c **** - 9494 .loc 1 2014 3 is_stmt 1 view .LVU2969 - 9495 .LBB657: - 9496 .LBI657: - 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9497 .loc 6 831 22 view .LVU2970 - 9498 .LBB658: - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9499 .loc 6 833 3 view .LVU2971 - 9500 00fe D3F8B820 ldr r2, [r3, #184] - 9501 0102 22F4C042 bic r2, r2, #24576 - 9502 0106 C3F8B820 str r2, [r3, #184] - 9503 .LVL888: - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9504 .loc 6 833 3 is_stmt 0 view .LVU2972 - ARM GAS /tmp/ccEQxcUB.s page 567 - - - 9505 .LBE658: - 9506 .LBE657: -2016:Src/main.c **** - 9507 .loc 1 2016 3 is_stmt 1 view .LVU2973 - 9508 .LBB659: - 9509 .LBI659: -1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9510 .loc 6 1299 22 view .LVU2974 - 9511 .LBB660: -1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9512 .loc 6 1301 3 view .LVU2975 - 9513 010a D3F8CC20 ldr r2, [r3, #204] - 9514 010e 22F00402 bic r2, r2, #4 - 9515 0112 C3F8CC20 str r2, [r3, #204] - 9516 .LVL889: -1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9517 .loc 6 1301 3 is_stmt 0 view .LVU2976 - 9518 .LBE660: - 9519 .LBE659: -2019:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 9520 .loc 1 2019 3 is_stmt 1 view .LVU2977 - 9521 .LBB661: - 9522 .LBI661: -1884:Drivers/CMSIS/Include/core_cm7.h **** { - 9523 .loc 2 1884 26 view .LVU2978 - 9524 .LBB662: -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 9525 .loc 2 1886 3 view .LVU2979 -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 9526 .loc 2 1886 26 is_stmt 0 view .LVU2980 - 9527 0116 1C4B ldr r3, .L513+12 - 9528 0118 D868 ldr r0, [r3, #12] - 9529 .LBE662: - 9530 .LBE661: -2019:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 9531 .loc 1 2019 3 discriminator 1 view .LVU2981 - 9532 011a 2246 mov r2, r4 - 9533 011c 2146 mov r1, r4 - 9534 011e C0F30220 ubfx r0, r0, #8, #3 - 9535 0122 FFF7FEFF bl NVIC_EncodePriority - 9536 .LVL890: - 9537 .LBB663: - 9538 .LBI663: -2024:Drivers/CMSIS/Include/core_cm7.h **** { - 9539 .loc 2 2024 22 is_stmt 1 view .LVU2982 - 9540 .LBB664: -2026:Drivers/CMSIS/Include/core_cm7.h **** { - 9541 .loc 2 2026 3 view .LVU2983 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9542 .loc 2 2028 5 view .LVU2984 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9543 .loc 2 2028 49 is_stmt 0 view .LVU2985 - 9544 0126 0001 lsls r0, r0, #4 - 9545 .LVL891: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9546 .loc 2 2028 49 view .LVU2986 - 9547 0128 C0B2 uxtb r0, r0 - ARM GAS /tmp/ccEQxcUB.s page 568 - - -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9548 .loc 2 2028 47 view .LVU2987 - 9549 012a 184B ldr r3, .L513+16 - 9550 012c 83F82503 strb r0, [r3, #805] - 9551 .LVL892: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9552 .loc 2 2028 47 view .LVU2988 - 9553 .LBE664: - 9554 .LBE663: + 9529 .loc 1 2007 3 is_stmt 1 view .LVU2969 + 9530 007c 404D ldr r5, .L524+4 + 9531 007e 27A9 add r1, sp, #156 + 9532 0080 2846 mov r0, r5 + 9533 0082 FFF7FEFF bl LL_GPIO_Init + 9534 .LVL882: +2009:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 9535 .loc 1 2009 3 view .LVU2970 +2009:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 9536 .loc 1 2009 23 is_stmt 0 view .LVU2971 + 9537 0086 4FF48063 mov r3, #1024 + 9538 008a 2793 str r3, [sp, #156] +2010:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 9539 .loc 1 2010 3 is_stmt 1 view .LVU2972 +2010:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 9540 .loc 1 2010 24 is_stmt 0 view .LVU2973 + 9541 008c CDF8A080 str r8, [sp, #160] +2011:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 9542 .loc 1 2011 3 is_stmt 1 view .LVU2974 +2011:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 9543 .loc 1 2011 25 is_stmt 0 view .LVU2975 + 9544 0090 2997 str r7, [sp, #164] +2012:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 9545 .loc 1 2012 3 is_stmt 1 view .LVU2976 +2012:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 9546 .loc 1 2012 30 is_stmt 0 view .LVU2977 + 9547 0092 2A94 str r4, [sp, #168] +2013:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 9548 .loc 1 2013 3 is_stmt 1 view .LVU2978 +2013:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 9549 .loc 1 2013 24 is_stmt 0 view .LVU2979 + 9550 0094 2B94 str r4, [sp, #172] +2014:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 9551 .loc 1 2014 3 is_stmt 1 view .LVU2980 +2014:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 9552 .loc 1 2014 29 is_stmt 0 view .LVU2981 + 9553 0096 2C96 str r6, [sp, #176] +2015:Src/main.c **** + 9554 .loc 1 2015 3 is_stmt 1 view .LVU2982 + 9555 0098 27A9 add r1, sp, #156 + 9556 009a 2846 mov r0, r5 + 9557 009c FFF7FEFF bl LL_GPIO_Init + 9558 .LVL883: 2020:Src/main.c **** - 9555 .loc 1 2020 3 is_stmt 1 view .LVU2989 - 9556 .LBB665: - 9557 .LBI665: -1896:Drivers/CMSIS/Include/core_cm7.h **** { - 9558 .loc 2 1896 22 view .LVU2990 - 9559 .LBB666: -1898:Drivers/CMSIS/Include/core_cm7.h **** { - 9560 .loc 2 1898 3 view .LVU2991 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9561 .loc 2 1900 5 view .LVU2992 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9562 .loc 2 1900 43 is_stmt 0 view .LVU2993 - 9563 0130 2022 movs r2, #32 - 9564 0132 5A60 str r2, [r3, #4] - 9565 .LVL893: -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9566 .loc 2 1900 43 view .LVU2994 - 9567 .LBE666: - 9568 .LBE665: -2025:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 9569 .loc 1 2025 3 is_stmt 1 view .LVU2995 -2025:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 9570 .loc 1 2025 29 is_stmt 0 view .LVU2996 - 9571 0134 4FF4E133 mov r3, #115200 - 9572 0138 2D93 str r3, [sp, #180] -2026:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 9573 .loc 1 2026 3 is_stmt 1 view .LVU2997 -2026:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 9574 .loc 1 2026 30 is_stmt 0 view .LVU2998 - 9575 013a 2E94 str r4, [sp, #184] -2027:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 9576 .loc 1 2027 3 is_stmt 1 view .LVU2999 -2027:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 9577 .loc 1 2027 29 is_stmt 0 view .LVU3000 - 9578 013c 2F94 str r4, [sp, #188] -2028:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 9579 .loc 1 2028 3 is_stmt 1 view .LVU3001 -2028:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 9580 .loc 1 2028 27 is_stmt 0 view .LVU3002 - 9581 013e 3094 str r4, [sp, #192] -2029:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 9582 .loc 1 2029 3 is_stmt 1 view .LVU3003 -2029:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 9583 .loc 1 2029 38 is_stmt 0 view .LVU3004 - 9584 0140 0C23 movs r3, #12 - 9585 0142 3193 str r3, [sp, #196] -2030:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - ARM GAS /tmp/ccEQxcUB.s page 569 + 9559 .loc 1 2020 3 view .LVU2983 + 9560 .LBB646: + 9561 .LBI646: +1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9562 .loc 6 1032 22 view .LVU2984 + 9563 .LBB647: +1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9564 .loc 6 1034 3 view .LVU2985 + 9565 00a0 384B ldr r3, .L524+8 + 9566 00a2 D3F8B820 ldr r2, [r3, #184] + 9567 00a6 22F0F052 bic r2, r2, #503316480 + 9568 00aa 42F00062 orr r2, r2, #134217728 + 9569 00ae C3F8B820 str r2, [r3, #184] + ARM GAS /tmp/ccuHnxNu.s page 569 - 9586 .loc 1 2030 3 is_stmt 1 view .LVU3005 -2030:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 9587 .loc 1 2030 40 is_stmt 0 view .LVU3006 - 9588 0144 3294 str r4, [sp, #200] -2031:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 9589 .loc 1 2031 3 is_stmt 1 view .LVU3007 -2031:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 9590 .loc 1 2031 33 is_stmt 0 view .LVU3008 - 9591 0146 3394 str r4, [sp, #204] -2032:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); - 9592 .loc 1 2032 3 is_stmt 1 view .LVU3009 - 9593 0148 04F18044 add r4, r4, #1073741824 - 9594 014c 04F58834 add r4, r4, #69632 - 9595 0150 2DA9 add r1, sp, #180 - 9596 0152 2046 mov r0, r4 - 9597 0154 FFF7FEFF bl LL_USART_Init - 9598 .LVL894: -2033:Src/main.c **** LL_USART_Enable(USART1); - 9599 .loc 1 2033 3 view .LVU3010 - 9600 .LBB667: - 9601 .LBI667: -2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 9602 .loc 7 2320 22 view .LVU3011 - 9603 .LBB668: -2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); - 9604 .loc 7 2326 3 view .LVU3012 - 9605 0158 6368 ldr r3, [r4, #4] - 9606 015a 23F49043 bic r3, r3, #18432 - 9607 015e 6360 str r3, [r4, #4] -2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9608 .loc 7 2327 3 view .LVU3013 - 9609 0160 A368 ldr r3, [r4, #8] - 9610 0162 23F02A03 bic r3, r3, #42 - 9611 0166 A360 str r3, [r4, #8] - 9612 .LVL895: -2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9613 .loc 7 2327 3 is_stmt 0 view .LVU3014 - 9614 .LBE668: - 9615 .LBE667: -2034:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ - 9616 .loc 1 2034 3 is_stmt 1 view .LVU3015 - 9617 .LBB669: - 9618 .LBI669: - 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 9619 .loc 7 560 22 view .LVU3016 - 9620 .LBB670: - 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9621 .loc 7 562 3 view .LVU3017 - 9622 0168 2368 ldr r3, [r4] - 9623 016a 43F00103 orr r3, r3, #1 - 9624 016e 2360 str r3, [r4] - 9625 .LVL896: - 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9626 .loc 7 562 3 is_stmt 0 view .LVU3018 - 9627 .LBE670: - 9628 .LBE669: -2039:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 570 + 9570 .LVL884: +1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9571 .loc 6 1034 3 is_stmt 0 view .LVU2986 + 9572 .LBE647: + 9573 .LBE646: +2022:Src/main.c **** + 9574 .loc 1 2022 3 is_stmt 1 view .LVU2987 + 9575 .LBB648: + 9576 .LBI648: + 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9577 .loc 6 598 22 view .LVU2988 + 9578 .LBB649: + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9579 .loc 6 600 3 view .LVU2989 + 9580 00b2 D3F8B820 ldr r2, [r3, #184] + 9581 00b6 22F0C002 bic r2, r2, #192 + 9582 00ba 42F04002 orr r2, r2, #64 + 9583 00be C3F8B820 str r2, [r3, #184] + 9584 .LVL885: + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9585 .loc 6 600 3 is_stmt 0 view .LVU2990 + 9586 .LBE649: + 9587 .LBE648: +2024:Src/main.c **** + 9588 .loc 1 2024 3 is_stmt 1 view .LVU2991 + 9589 .LBB650: + 9590 .LBI650: + 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9591 .loc 6 924 22 view .LVU2992 + 9592 .LBB651: + 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9593 .loc 6 926 3 view .LVU2993 + 9594 00c2 D3F8B820 ldr r2, [r3, #184] + 9595 00c6 42F44032 orr r2, r2, #196608 + 9596 00ca C3F8B820 str r2, [r3, #184] + 9597 .LVL886: + 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9598 .loc 6 926 3 is_stmt 0 view .LVU2994 + 9599 .LBE651: + 9600 .LBE650: +2026:Src/main.c **** + 9601 .loc 1 2026 3 is_stmt 1 view .LVU2995 + 9602 .LBB652: + 9603 .LBI652: + 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9604 .loc 6 646 22 view .LVU2996 + 9605 .LBB653: + 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9606 .loc 6 648 3 view .LVU2997 + 9607 00ce D3F8B820 ldr r2, [r3, #184] + 9608 00d2 22F49072 bic r2, r2, #288 + 9609 00d6 C3F8B820 str r2, [r3, #184] + 9610 .LVL887: + 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9611 .loc 6 648 3 is_stmt 0 view .LVU2998 + 9612 .LBE653: + 9613 .LBE652: + ARM GAS /tmp/ccuHnxNu.s page 570 - 9629 .loc 1 2039 1 view .LVU3019 - 9630 0170 34B0 add sp, sp, #208 - 9631 .LCFI86: - 9632 .cfi_remember_state - 9633 .cfi_def_cfa_offset 24 - 9634 @ sp needed - 9635 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 9636 .L512: - 9637 .LCFI87: - 9638 .cfi_restore_state -1970:Src/main.c **** } - 9639 .loc 1 1970 5 is_stmt 1 view .LVU3020 - 9640 0176 FFF7FEFF bl Error_Handler - 9641 .LVL897: - 9642 .L514: - 9643 017a 00BF .align 2 - 9644 .L513: - 9645 017c 00380240 .word 1073887232 - 9646 0180 00000240 .word 1073872896 - 9647 0184 00640240 .word 1073898496 - 9648 0188 00ED00E0 .word -536810240 - 9649 018c 00E100E0 .word -536813312 - 9650 .cfi_endproc - 9651 .LFE1205: - 9653 .section .text.MX_TIM10_Init,"ax",%progbits - 9654 .align 1 - 9655 .syntax unified - 9656 .thumb - 9657 .thumb_func - 9659 MX_TIM10_Init: - 9660 .LFB1201: -1772:Src/main.c **** - 9661 .loc 1 1772 1 view -0 - 9662 .cfi_startproc - 9663 @ args = 0, pretend = 0, frame = 0 - 9664 @ frame_needed = 0, uses_anonymous_args = 0 - 9665 0000 08B5 push {r3, lr} - 9666 .LCFI88: - 9667 .cfi_def_cfa_offset 8 - 9668 .cfi_offset 3, -8 - 9669 .cfi_offset 14, -4 -1781:Src/main.c **** htim10.Init.Prescaler = 183; - 9670 .loc 1 1781 3 view .LVU3022 -1781:Src/main.c **** htim10.Init.Prescaler = 183; - 9671 .loc 1 1781 19 is_stmt 0 view .LVU3023 - 9672 0002 0848 ldr r0, .L519 - 9673 0004 084B ldr r3, .L519+4 - 9674 0006 0360 str r3, [r0] -1782:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 9675 .loc 1 1782 3 is_stmt 1 view .LVU3024 -1782:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 9676 .loc 1 1782 25 is_stmt 0 view .LVU3025 - 9677 0008 B723 movs r3, #183 - 9678 000a 4360 str r3, [r0, #4] -1783:Src/main.c **** htim10.Init.Period = 9; - 9679 .loc 1 1783 3 is_stmt 1 view .LVU3026 -1783:Src/main.c **** htim10.Init.Period = 9; - ARM GAS /tmp/ccEQxcUB.s page 571 +2028:Src/main.c **** + 9614 .loc 1 2028 3 is_stmt 1 view .LVU2999 + 9615 .LBB654: + 9616 .LBI654: + 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9617 .loc 6 693 22 view .LVU3000 + 9618 .LBB655: + 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9619 .loc 6 695 3 view .LVU3001 + 9620 00da D3F8B820 ldr r2, [r3, #184] + 9621 00de 22F40072 bic r2, r2, #512 + 9622 00e2 C3F8B820 str r2, [r3, #184] + 9623 .LVL888: + 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9624 .loc 6 695 3 is_stmt 0 view .LVU3002 + 9625 .LBE655: + 9626 .LBE654: +2030:Src/main.c **** + 9627 .loc 1 2030 3 is_stmt 1 view .LVU3003 + 9628 .LBB656: + 9629 .LBI656: + 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9630 .loc 6 738 22 view .LVU3004 + 9631 .LBB657: + 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9632 .loc 6 740 3 view .LVU3005 + 9633 00e6 D3F8B820 ldr r2, [r3, #184] + 9634 00ea 42F48062 orr r2, r2, #1024 + 9635 00ee C3F8B820 str r2, [r3, #184] + 9636 .LVL889: + 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9637 .loc 6 740 3 is_stmt 0 view .LVU3006 + 9638 .LBE657: + 9639 .LBE656: +2032:Src/main.c **** + 9640 .loc 1 2032 3 is_stmt 1 view .LVU3007 + 9641 .LBB658: + 9642 .LBI658: + 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9643 .loc 6 784 22 view .LVU3008 + 9644 .LBB659: + 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9645 .loc 6 786 3 view .LVU3009 + 9646 00f2 D3F8B820 ldr r2, [r3, #184] + 9647 00f6 22F4C052 bic r2, r2, #6144 + 9648 00fa C3F8B820 str r2, [r3, #184] + 9649 .LVL890: + 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9650 .loc 6 786 3 is_stmt 0 view .LVU3010 + 9651 .LBE659: + 9652 .LBE658: +2034:Src/main.c **** + 9653 .loc 1 2034 3 is_stmt 1 view .LVU3011 + 9654 .LBB660: + 9655 .LBI660: + 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9656 .loc 6 831 22 view .LVU3012 + ARM GAS /tmp/ccuHnxNu.s page 571 - 9680 .loc 1 1783 27 is_stmt 0 view .LVU3027 - 9681 000c 0023 movs r3, #0 - 9682 000e 8360 str r3, [r0, #8] -1784:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9683 .loc 1 1784 3 is_stmt 1 view .LVU3028 -1784:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9684 .loc 1 1784 22 is_stmt 0 view .LVU3029 - 9685 0010 0922 movs r2, #9 - 9686 0012 C260 str r2, [r0, #12] -1785:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9687 .loc 1 1785 3 is_stmt 1 view .LVU3030 -1785:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9688 .loc 1 1785 29 is_stmt 0 view .LVU3031 - 9689 0014 0361 str r3, [r0, #16] -1786:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 9690 .loc 1 1786 3 is_stmt 1 view .LVU3032 -1786:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 9691 .loc 1 1786 33 is_stmt 0 view .LVU3033 - 9692 0016 8361 str r3, [r0, #24] -1787:Src/main.c **** { - 9693 .loc 1 1787 3 is_stmt 1 view .LVU3034 -1787:Src/main.c **** { - 9694 .loc 1 1787 7 is_stmt 0 view .LVU3035 - 9695 0018 FFF7FEFF bl HAL_TIM_Base_Init - 9696 .LVL898: -1787:Src/main.c **** { - 9697 .loc 1 1787 6 discriminator 1 view .LVU3036 - 9698 001c 00B9 cbnz r0, .L518 -1795:Src/main.c **** - 9699 .loc 1 1795 1 view .LVU3037 - 9700 001e 08BD pop {r3, pc} - 9701 .L518: -1789:Src/main.c **** } - 9702 .loc 1 1789 5 is_stmt 1 view .LVU3038 - 9703 0020 FFF7FEFF bl Error_Handler - 9704 .LVL899: - 9705 .L520: - 9706 .align 2 - 9707 .L519: - 9708 0024 00000000 .word htim10 - 9709 0028 00440140 .word 1073824768 - 9710 .cfi_endproc - 9711 .LFE1201: - 9713 .section .text.MX_UART8_Init,"ax",%progbits - 9714 .align 1 - 9715 .syntax unified - 9716 .thumb - 9717 .thumb_func - 9719 MX_UART8_Init: - 9720 .LFB1204: -1918:Src/main.c **** - 9721 .loc 1 1918 1 view -0 - 9722 .cfi_startproc - 9723 @ args = 0, pretend = 0, frame = 0 - 9724 @ frame_needed = 0, uses_anonymous_args = 0 - 9725 0000 08B5 push {r3, lr} - 9726 .LCFI89: - ARM GAS /tmp/ccEQxcUB.s page 572 - - - 9727 .cfi_def_cfa_offset 8 - 9728 .cfi_offset 3, -8 - 9729 .cfi_offset 14, -4 -1927:Src/main.c **** huart8.Init.BaudRate = 115200; - 9730 .loc 1 1927 3 view .LVU3040 -1927:Src/main.c **** huart8.Init.BaudRate = 115200; - 9731 .loc 1 1927 19 is_stmt 0 view .LVU3041 - 9732 0002 0B48 ldr r0, .L525 - 9733 0004 0B4B ldr r3, .L525+4 - 9734 0006 0360 str r3, [r0] -1928:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 9735 .loc 1 1928 3 is_stmt 1 view .LVU3042 -1928:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 9736 .loc 1 1928 24 is_stmt 0 view .LVU3043 - 9737 0008 4FF4E133 mov r3, #115200 - 9738 000c 4360 str r3, [r0, #4] -1929:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 9739 .loc 1 1929 3 is_stmt 1 view .LVU3044 -1929:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 9740 .loc 1 1929 26 is_stmt 0 view .LVU3045 - 9741 000e 0023 movs r3, #0 - 9742 0010 8360 str r3, [r0, #8] -1930:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 9743 .loc 1 1930 3 is_stmt 1 view .LVU3046 -1930:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 9744 .loc 1 1930 24 is_stmt 0 view .LVU3047 - 9745 0012 C360 str r3, [r0, #12] -1931:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 9746 .loc 1 1931 3 is_stmt 1 view .LVU3048 -1931:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 9747 .loc 1 1931 22 is_stmt 0 view .LVU3049 - 9748 0014 0361 str r3, [r0, #16] -1932:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 9749 .loc 1 1932 3 is_stmt 1 view .LVU3050 -1932:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 9750 .loc 1 1932 20 is_stmt 0 view .LVU3051 - 9751 0016 0C22 movs r2, #12 - 9752 0018 4261 str r2, [r0, #20] -1933:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 9753 .loc 1 1933 3 is_stmt 1 view .LVU3052 -1933:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 9754 .loc 1 1933 25 is_stmt 0 view .LVU3053 - 9755 001a 8361 str r3, [r0, #24] -1934:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 9756 .loc 1 1934 3 is_stmt 1 view .LVU3054 -1934:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 9757 .loc 1 1934 28 is_stmt 0 view .LVU3055 - 9758 001c C361 str r3, [r0, #28] -1935:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 9759 .loc 1 1935 3 is_stmt 1 view .LVU3056 -1935:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 9760 .loc 1 1935 30 is_stmt 0 view .LVU3057 - 9761 001e 0362 str r3, [r0, #32] -1936:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 9762 .loc 1 1936 3 is_stmt 1 view .LVU3058 -1936:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 9763 .loc 1 1936 38 is_stmt 0 view .LVU3059 - ARM GAS /tmp/ccEQxcUB.s page 573 - - - 9764 0020 4362 str r3, [r0, #36] -1937:Src/main.c **** { - 9765 .loc 1 1937 3 is_stmt 1 view .LVU3060 -1937:Src/main.c **** { - 9766 .loc 1 1937 7 is_stmt 0 view .LVU3061 - 9767 0022 FFF7FEFF bl HAL_UART_Init - 9768 .LVL900: -1937:Src/main.c **** { - 9769 .loc 1 1937 6 discriminator 1 view .LVU3062 - 9770 0026 00B9 cbnz r0, .L524 -1945:Src/main.c **** - 9771 .loc 1 1945 1 view .LVU3063 - 9772 0028 08BD pop {r3, pc} - 9773 .L524: -1939:Src/main.c **** } - 9774 .loc 1 1939 5 is_stmt 1 view .LVU3064 - 9775 002a FFF7FEFF bl Error_Handler - 9776 .LVL901: - 9777 .L526: - 9778 002e 00BF .align 2 - 9779 .L525: - 9780 0030 00000000 .word huart8 - 9781 0034 007C0040 .word 1073773568 - 9782 .cfi_endproc - 9783 .LFE1204: - 9785 .section .text.MX_TIM8_Init,"ax",%progbits - 9786 .align 1 - 9787 .syntax unified - 9788 .thumb - 9789 .thumb_func - 9791 MX_TIM8_Init: - 9792 .LFB1200: -1725:Src/main.c **** - 9793 .loc 1 1725 1 view -0 - 9794 .cfi_startproc - 9795 @ args = 0, pretend = 0, frame = 32 - 9796 @ frame_needed = 0, uses_anonymous_args = 0 - 9797 0000 00B5 push {lr} - 9798 .LCFI90: - 9799 .cfi_def_cfa_offset 4 - 9800 .cfi_offset 14, -4 - 9801 0002 89B0 sub sp, sp, #36 - 9802 .LCFI91: - 9803 .cfi_def_cfa_offset 40 -1731:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 9804 .loc 1 1731 3 view .LVU3066 -1731:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 9805 .loc 1 1731 26 is_stmt 0 view .LVU3067 - 9806 0004 0023 movs r3, #0 - 9807 0006 0493 str r3, [sp, #16] - 9808 0008 0593 str r3, [sp, #20] - 9809 000a 0693 str r3, [sp, #24] - 9810 000c 0793 str r3, [sp, #28] -1732:Src/main.c **** - 9811 .loc 1 1732 3 is_stmt 1 view .LVU3068 -1732:Src/main.c **** - 9812 .loc 1 1732 27 is_stmt 0 view .LVU3069 - ARM GAS /tmp/ccEQxcUB.s page 574 - - - 9813 000e 0193 str r3, [sp, #4] - 9814 0010 0293 str r3, [sp, #8] - 9815 0012 0393 str r3, [sp, #12] -1737:Src/main.c **** htim8.Init.Prescaler = 0; - 9816 .loc 1 1737 3 is_stmt 1 view .LVU3070 -1737:Src/main.c **** htim8.Init.Prescaler = 0; - 9817 .loc 1 1737 18 is_stmt 0 view .LVU3071 - 9818 0014 1348 ldr r0, .L535 - 9819 0016 144A ldr r2, .L535+4 - 9820 0018 0260 str r2, [r0] -1738:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 9821 .loc 1 1738 3 is_stmt 1 view .LVU3072 -1738:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 9822 .loc 1 1738 24 is_stmt 0 view .LVU3073 - 9823 001a 4360 str r3, [r0, #4] -1739:Src/main.c **** htim8.Init.Period = 91; - 9824 .loc 1 1739 3 is_stmt 1 view .LVU3074 -1739:Src/main.c **** htim8.Init.Period = 91; - 9825 .loc 1 1739 26 is_stmt 0 view .LVU3075 - 9826 001c 8360 str r3, [r0, #8] -1740:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9827 .loc 1 1740 3 is_stmt 1 view .LVU3076 -1740:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9828 .loc 1 1740 21 is_stmt 0 view .LVU3077 - 9829 001e 5B22 movs r2, #91 - 9830 0020 C260 str r2, [r0, #12] -1741:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 9831 .loc 1 1741 3 is_stmt 1 view .LVU3078 -1741:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 9832 .loc 1 1741 28 is_stmt 0 view .LVU3079 - 9833 0022 0361 str r3, [r0, #16] -1742:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9834 .loc 1 1742 3 is_stmt 1 view .LVU3080 -1742:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9835 .loc 1 1742 32 is_stmt 0 view .LVU3081 - 9836 0024 4361 str r3, [r0, #20] -1743:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 9837 .loc 1 1743 3 is_stmt 1 view .LVU3082 -1743:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 9838 .loc 1 1743 32 is_stmt 0 view .LVU3083 - 9839 0026 8361 str r3, [r0, #24] -1744:Src/main.c **** { - 9840 .loc 1 1744 3 is_stmt 1 view .LVU3084 -1744:Src/main.c **** { - 9841 .loc 1 1744 7 is_stmt 0 view .LVU3085 - 9842 0028 FFF7FEFF bl HAL_TIM_Base_Init - 9843 .LVL902: -1744:Src/main.c **** { - 9844 .loc 1 1744 6 discriminator 1 view .LVU3086 - 9845 002c 98B9 cbnz r0, .L532 -1748:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 9846 .loc 1 1748 3 is_stmt 1 view .LVU3087 -1748:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 9847 .loc 1 1748 34 is_stmt 0 view .LVU3088 - 9848 002e 4FF48053 mov r3, #4096 - 9849 0032 0493 str r3, [sp, #16] -1749:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 575 - - - 9850 .loc 1 1749 3 is_stmt 1 view .LVU3089 -1749:Src/main.c **** { - 9851 .loc 1 1749 7 is_stmt 0 view .LVU3090 - 9852 0034 04A9 add r1, sp, #16 - 9853 0036 0B48 ldr r0, .L535 - 9854 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource - 9855 .LVL903: -1749:Src/main.c **** { - 9856 .loc 1 1749 6 discriminator 1 view .LVU3091 - 9857 003c 68B9 cbnz r0, .L533 -1753:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 9858 .loc 1 1753 3 is_stmt 1 view .LVU3092 -1753:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 9859 .loc 1 1753 37 is_stmt 0 view .LVU3093 - 9860 003e 0023 movs r3, #0 - 9861 0040 0193 str r3, [sp, #4] -1754:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 9862 .loc 1 1754 3 is_stmt 1 view .LVU3094 -1754:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 9863 .loc 1 1754 38 is_stmt 0 view .LVU3095 - 9864 0042 0293 str r3, [sp, #8] -1755:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 9865 .loc 1 1755 3 is_stmt 1 view .LVU3096 -1755:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 9866 .loc 1 1755 33 is_stmt 0 view .LVU3097 - 9867 0044 0393 str r3, [sp, #12] -1756:Src/main.c **** { - 9868 .loc 1 1756 3 is_stmt 1 view .LVU3098 -1756:Src/main.c **** { - 9869 .loc 1 1756 7 is_stmt 0 view .LVU3099 - 9870 0046 01A9 add r1, sp, #4 - 9871 0048 0648 ldr r0, .L535 - 9872 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 9873 .LVL904: -1756:Src/main.c **** { - 9874 .loc 1 1756 6 discriminator 1 view .LVU3100 - 9875 004e 30B9 cbnz r0, .L534 -1764:Src/main.c **** - 9876 .loc 1 1764 1 view .LVU3101 - 9877 0050 09B0 add sp, sp, #36 - 9878 .LCFI92: - 9879 .cfi_remember_state - 9880 .cfi_def_cfa_offset 4 - 9881 @ sp needed - 9882 0052 5DF804FB ldr pc, [sp], #4 - 9883 .L532: - 9884 .LCFI93: - 9885 .cfi_restore_state -1746:Src/main.c **** } - 9886 .loc 1 1746 5 is_stmt 1 view .LVU3102 - 9887 0056 FFF7FEFF bl Error_Handler - 9888 .LVL905: - 9889 .L533: -1751:Src/main.c **** } - 9890 .loc 1 1751 5 view .LVU3103 - 9891 005a FFF7FEFF bl Error_Handler - 9892 .LVL906: - ARM GAS /tmp/ccEQxcUB.s page 576 - - - 9893 .L534: -1758:Src/main.c **** } - 9894 .loc 1 1758 5 view .LVU3104 - 9895 005e FFF7FEFF bl Error_Handler - 9896 .LVL907: - 9897 .L536: - 9898 0062 00BF .align 2 - 9899 .L535: - 9900 0064 00000000 .word htim8 - 9901 0068 00040140 .word 1073808384 - 9902 .cfi_endproc - 9903 .LFE1200: - 9905 .section .text.MX_TIM11_Init,"ax",%progbits - 9906 .align 1 - 9907 .syntax unified - 9908 .thumb - 9909 .thumb_func - 9911 MX_TIM11_Init: - 9912 .LFB1202: -1803:Src/main.c **** - 9913 .loc 1 1803 1 view -0 - 9914 .cfi_startproc - 9915 @ args = 0, pretend = 0, frame = 32 - 9916 @ frame_needed = 0, uses_anonymous_args = 0 - 9917 0000 00B5 push {lr} - 9918 .LCFI94: - 9919 .cfi_def_cfa_offset 4 - 9920 .cfi_offset 14, -4 - 9921 0002 89B0 sub sp, sp, #36 - 9922 .LCFI95: - 9923 .cfi_def_cfa_offset 40 -1809:Src/main.c **** - 9924 .loc 1 1809 3 view .LVU3106 -1809:Src/main.c **** - 9925 .loc 1 1809 22 is_stmt 0 view .LVU3107 - 9926 0004 0023 movs r3, #0 - 9927 0006 0193 str r3, [sp, #4] - 9928 0008 0293 str r3, [sp, #8] - 9929 000a 0393 str r3, [sp, #12] - 9930 000c 0493 str r3, [sp, #16] - 9931 000e 0593 str r3, [sp, #20] - 9932 0010 0693 str r3, [sp, #24] - 9933 0012 0793 str r3, [sp, #28] -1814:Src/main.c **** htim11.Init.Prescaler = 1; - 9934 .loc 1 1814 3 is_stmt 1 view .LVU3108 -1814:Src/main.c **** htim11.Init.Prescaler = 1; - 9935 .loc 1 1814 19 is_stmt 0 view .LVU3109 - 9936 0014 1448 ldr r0, .L545 - 9937 0016 154A ldr r2, .L545+4 - 9938 0018 0260 str r2, [r0] -1815:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 9939 .loc 1 1815 3 is_stmt 1 view .LVU3110 -1815:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 9940 .loc 1 1815 25 is_stmt 0 view .LVU3111 - 9941 001a 0122 movs r2, #1 - 9942 001c 4260 str r2, [r0, #4] -1816:Src/main.c **** htim11.Init.Period = 91; - ARM GAS /tmp/ccEQxcUB.s page 577 - - - 9943 .loc 1 1816 3 is_stmt 1 view .LVU3112 -1816:Src/main.c **** htim11.Init.Period = 91; - 9944 .loc 1 1816 27 is_stmt 0 view .LVU3113 - 9945 001e 8360 str r3, [r0, #8] -1817:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9946 .loc 1 1817 3 is_stmt 1 view .LVU3114 -1817:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9947 .loc 1 1817 22 is_stmt 0 view .LVU3115 - 9948 0020 5B22 movs r2, #91 - 9949 0022 C260 str r2, [r0, #12] -1818:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 9950 .loc 1 1818 3 is_stmt 1 view .LVU3116 -1818:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 9951 .loc 1 1818 29 is_stmt 0 view .LVU3117 - 9952 0024 0361 str r3, [r0, #16] -1819:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 9953 .loc 1 1819 3 is_stmt 1 view .LVU3118 -1819:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 9954 .loc 1 1819 33 is_stmt 0 view .LVU3119 - 9955 0026 8023 movs r3, #128 - 9956 0028 8361 str r3, [r0, #24] -1820:Src/main.c **** { - 9957 .loc 1 1820 3 is_stmt 1 view .LVU3120 -1820:Src/main.c **** { - 9958 .loc 1 1820 7 is_stmt 0 view .LVU3121 - 9959 002a FFF7FEFF bl HAL_TIM_Base_Init - 9960 .LVL908: -1820:Src/main.c **** { - 9961 .loc 1 1820 6 discriminator 1 view .LVU3122 - 9962 002e A8B9 cbnz r0, .L542 -1824:Src/main.c **** { - 9963 .loc 1 1824 3 is_stmt 1 view .LVU3123 -1824:Src/main.c **** { - 9964 .loc 1 1824 7 is_stmt 0 view .LVU3124 - 9965 0030 0D48 ldr r0, .L545 - 9966 0032 FFF7FEFF bl HAL_TIM_PWM_Init - 9967 .LVL909: -1824:Src/main.c **** { - 9968 .loc 1 1824 6 discriminator 1 view .LVU3125 - 9969 0036 98B9 cbnz r0, .L543 -1828:Src/main.c **** sConfigOC.Pulse = 91; - 9970 .loc 1 1828 3 is_stmt 1 view .LVU3126 -1828:Src/main.c **** sConfigOC.Pulse = 91; - 9971 .loc 1 1828 20 is_stmt 0 view .LVU3127 - 9972 0038 6023 movs r3, #96 - 9973 003a 0193 str r3, [sp, #4] -1829:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 9974 .loc 1 1829 3 is_stmt 1 view .LVU3128 -1829:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 9975 .loc 1 1829 19 is_stmt 0 view .LVU3129 - 9976 003c 5B23 movs r3, #91 - 9977 003e 0293 str r3, [sp, #8] -1830:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 9978 .loc 1 1830 3 is_stmt 1 view .LVU3130 -1830:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 9979 .loc 1 1830 24 is_stmt 0 view .LVU3131 - 9980 0040 0022 movs r2, #0 - ARM GAS /tmp/ccEQxcUB.s page 578 - - - 9981 0042 0392 str r2, [sp, #12] -1831:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 9982 .loc 1 1831 3 is_stmt 1 view .LVU3132 -1831:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 9983 .loc 1 1831 24 is_stmt 0 view .LVU3133 - 9984 0044 0592 str r2, [sp, #20] -1832:Src/main.c **** { - 9985 .loc 1 1832 3 is_stmt 1 view .LVU3134 -1832:Src/main.c **** { - 9986 .loc 1 1832 7 is_stmt 0 view .LVU3135 - 9987 0046 01A9 add r1, sp, #4 - 9988 0048 0748 ldr r0, .L545 - 9989 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 9990 .LVL910: -1832:Src/main.c **** { - 9991 .loc 1 1832 6 discriminator 1 view .LVU3136 - 9992 004e 48B9 cbnz r0, .L544 -1839:Src/main.c **** - 9993 .loc 1 1839 3 is_stmt 1 view .LVU3137 - 9994 0050 0548 ldr r0, .L545 - 9995 0052 FFF7FEFF bl HAL_TIM_MspPostInit - 9996 .LVL911: -1841:Src/main.c **** - 9997 .loc 1 1841 1 is_stmt 0 view .LVU3138 - 9998 0056 09B0 add sp, sp, #36 - 9999 .LCFI96: - 10000 .cfi_remember_state - 10001 .cfi_def_cfa_offset 4 - 10002 @ sp needed - 10003 0058 5DF804FB ldr pc, [sp], #4 - 10004 .L542: - 10005 .LCFI97: - 10006 .cfi_restore_state -1822:Src/main.c **** } - 10007 .loc 1 1822 5 is_stmt 1 view .LVU3139 - 10008 005c FFF7FEFF bl Error_Handler - 10009 .LVL912: - 10010 .L543: -1826:Src/main.c **** } - 10011 .loc 1 1826 5 view .LVU3140 - 10012 0060 FFF7FEFF bl Error_Handler - 10013 .LVL913: - 10014 .L544: -1834:Src/main.c **** } - 10015 .loc 1 1834 5 view .LVU3141 - 10016 0064 FFF7FEFF bl Error_Handler - 10017 .LVL914: - 10018 .L546: - 10019 .align 2 - 10020 .L545: - 10021 0068 00000000 .word htim11 - 10022 006c 00480140 .word 1073825792 - 10023 .cfi_endproc - 10024 .LFE1202: - 10026 .section .text.MX_TIM4_Init,"ax",%progbits - 10027 .align 1 - 10028 .syntax unified - ARM GAS /tmp/ccEQxcUB.s page 579 - - - 10029 .thumb - 10030 .thumb_func - 10032 MX_TIM4_Init: - 10033 .LFB1196: -1553:Src/main.c **** - 10034 .loc 1 1553 1 view -0 - 10035 .cfi_startproc - 10036 @ args = 0, pretend = 0, frame = 56 - 10037 @ frame_needed = 0, uses_anonymous_args = 0 - 10038 0000 00B5 push {lr} - 10039 .LCFI98: - 10040 .cfi_def_cfa_offset 4 - 10041 .cfi_offset 14, -4 - 10042 0002 8FB0 sub sp, sp, #60 - 10043 .LCFI99: - 10044 .cfi_def_cfa_offset 64 -1559:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 10045 .loc 1 1559 3 view .LVU3143 -1559:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 10046 .loc 1 1559 26 is_stmt 0 view .LVU3144 - 10047 0004 0023 movs r3, #0 - 10048 0006 0A93 str r3, [sp, #40] - 10049 0008 0B93 str r3, [sp, #44] - 10050 000a 0C93 str r3, [sp, #48] - 10051 000c 0D93 str r3, [sp, #52] -1560:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10052 .loc 1 1560 3 is_stmt 1 view .LVU3145 -1560:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10053 .loc 1 1560 27 is_stmt 0 view .LVU3146 - 10054 000e 0793 str r3, [sp, #28] - 10055 0010 0893 str r3, [sp, #32] - 10056 0012 0993 str r3, [sp, #36] -1561:Src/main.c **** - 10057 .loc 1 1561 3 is_stmt 1 view .LVU3147 -1561:Src/main.c **** - 10058 .loc 1 1561 22 is_stmt 0 view .LVU3148 - 10059 0014 0093 str r3, [sp] - 10060 0016 0193 str r3, [sp, #4] - 10061 0018 0293 str r3, [sp, #8] - 10062 001a 0393 str r3, [sp, #12] - 10063 001c 0493 str r3, [sp, #16] - 10064 001e 0593 str r3, [sp, #20] - 10065 0020 0693 str r3, [sp, #24] -1566:Src/main.c **** htim4.Init.Prescaler = 0; - 10066 .loc 1 1566 3 is_stmt 1 view .LVU3149 -1566:Src/main.c **** htim4.Init.Prescaler = 0; - 10067 .loc 1 1566 18 is_stmt 0 view .LVU3150 - 10068 0022 1E48 ldr r0, .L559 - 10069 0024 1E4A ldr r2, .L559+4 - 10070 0026 0260 str r2, [r0] -1567:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 10071 .loc 1 1567 3 is_stmt 1 view .LVU3151 -1567:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 10072 .loc 1 1567 24 is_stmt 0 view .LVU3152 - 10073 0028 4360 str r3, [r0, #4] -1568:Src/main.c **** htim4.Init.Period = 45; - 10074 .loc 1 1568 3 is_stmt 1 view .LVU3153 - ARM GAS /tmp/ccEQxcUB.s page 580 - - -1568:Src/main.c **** htim4.Init.Period = 45; - 10075 .loc 1 1568 26 is_stmt 0 view .LVU3154 - 10076 002a 8360 str r3, [r0, #8] -1569:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10077 .loc 1 1569 3 is_stmt 1 view .LVU3155 -1569:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10078 .loc 1 1569 21 is_stmt 0 view .LVU3156 - 10079 002c 2D22 movs r2, #45 - 10080 002e C260 str r2, [r0, #12] -1570:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10081 .loc 1 1570 3 is_stmt 1 view .LVU3157 -1570:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10082 .loc 1 1570 28 is_stmt 0 view .LVU3158 - 10083 0030 0361 str r3, [r0, #16] -1571:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 10084 .loc 1 1571 3 is_stmt 1 view .LVU3159 -1571:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 10085 .loc 1 1571 32 is_stmt 0 view .LVU3160 - 10086 0032 8361 str r3, [r0, #24] -1572:Src/main.c **** { - 10087 .loc 1 1572 3 is_stmt 1 view .LVU3161 -1572:Src/main.c **** { - 10088 .loc 1 1572 7 is_stmt 0 view .LVU3162 - 10089 0034 FFF7FEFF bl HAL_TIM_Base_Init - 10090 .LVL915: -1572:Src/main.c **** { - 10091 .loc 1 1572 6 discriminator 1 view .LVU3163 - 10092 0038 30BB cbnz r0, .L554 -1576:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 10093 .loc 1 1576 3 is_stmt 1 view .LVU3164 -1576:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 10094 .loc 1 1576 34 is_stmt 0 view .LVU3165 - 10095 003a 4FF48053 mov r3, #4096 - 10096 003e 0A93 str r3, [sp, #40] -1577:Src/main.c **** { - 10097 .loc 1 1577 3 is_stmt 1 view .LVU3166 -1577:Src/main.c **** { - 10098 .loc 1 1577 7 is_stmt 0 view .LVU3167 - 10099 0040 0AA9 add r1, sp, #40 - 10100 0042 1648 ldr r0, .L559 - 10101 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource - 10102 .LVL916: -1577:Src/main.c **** { - 10103 .loc 1 1577 6 discriminator 1 view .LVU3168 - 10104 0048 00BB cbnz r0, .L555 -1581:Src/main.c **** { - 10105 .loc 1 1581 3 is_stmt 1 view .LVU3169 -1581:Src/main.c **** { - 10106 .loc 1 1581 7 is_stmt 0 view .LVU3170 - 10107 004a 1448 ldr r0, .L559 - 10108 004c FFF7FEFF bl HAL_TIM_PWM_Init - 10109 .LVL917: -1581:Src/main.c **** { - 10110 .loc 1 1581 6 discriminator 1 view .LVU3171 - 10111 0050 F0B9 cbnz r0, .L556 -1585:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 10112 .loc 1 1585 3 is_stmt 1 view .LVU3172 - ARM GAS /tmp/ccEQxcUB.s page 581 - - -1585:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 10113 .loc 1 1585 37 is_stmt 0 view .LVU3173 - 10114 0052 0023 movs r3, #0 - 10115 0054 0793 str r3, [sp, #28] -1586:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 10116 .loc 1 1586 3 is_stmt 1 view .LVU3174 -1586:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 10117 .loc 1 1586 33 is_stmt 0 view .LVU3175 - 10118 0056 0993 str r3, [sp, #36] -1587:Src/main.c **** { - 10119 .loc 1 1587 3 is_stmt 1 view .LVU3176 -1587:Src/main.c **** { - 10120 .loc 1 1587 7 is_stmt 0 view .LVU3177 - 10121 0058 07A9 add r1, sp, #28 - 10122 005a 1048 ldr r0, .L559 - 10123 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 10124 .LVL918: -1587:Src/main.c **** { - 10125 .loc 1 1587 6 discriminator 1 view .LVU3178 - 10126 0060 C0B9 cbnz r0, .L557 -1591:Src/main.c **** sConfigOC.Pulse = 22; - 10127 .loc 1 1591 3 is_stmt 1 view .LVU3179 -1591:Src/main.c **** sConfigOC.Pulse = 22; - 10128 .loc 1 1591 20 is_stmt 0 view .LVU3180 - 10129 0062 6023 movs r3, #96 - 10130 0064 0093 str r3, [sp] -1592:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10131 .loc 1 1592 3 is_stmt 1 view .LVU3181 -1592:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10132 .loc 1 1592 19 is_stmt 0 view .LVU3182 - 10133 0066 1623 movs r3, #22 - 10134 0068 0193 str r3, [sp, #4] -1593:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10135 .loc 1 1593 3 is_stmt 1 view .LVU3183 -1593:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10136 .loc 1 1593 24 is_stmt 0 view .LVU3184 - 10137 006a 0023 movs r3, #0 - 10138 006c 0293 str r3, [sp, #8] -1594:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 10139 .loc 1 1594 3 is_stmt 1 view .LVU3185 -1594:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 10140 .loc 1 1594 24 is_stmt 0 view .LVU3186 - 10141 006e 0493 str r3, [sp, #16] -1595:Src/main.c **** { - 10142 .loc 1 1595 3 is_stmt 1 view .LVU3187 -1595:Src/main.c **** { - 10143 .loc 1 1595 7 is_stmt 0 view .LVU3188 - 10144 0070 0822 movs r2, #8 - 10145 0072 6946 mov r1, sp - 10146 0074 0948 ldr r0, .L559 - 10147 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 10148 .LVL919: -1595:Src/main.c **** { - 10149 .loc 1 1595 6 discriminator 1 view .LVU3189 - 10150 007a 68B9 cbnz r0, .L558 -1602:Src/main.c **** - 10151 .loc 1 1602 3 is_stmt 1 view .LVU3190 - ARM GAS /tmp/ccEQxcUB.s page 582 - - - 10152 007c 0748 ldr r0, .L559 - 10153 007e FFF7FEFF bl HAL_TIM_MspPostInit - 10154 .LVL920: -1604:Src/main.c **** - 10155 .loc 1 1604 1 is_stmt 0 view .LVU3191 - 10156 0082 0FB0 add sp, sp, #60 - 10157 .LCFI100: - 10158 .cfi_remember_state - 10159 .cfi_def_cfa_offset 4 - 10160 @ sp needed - 10161 0084 5DF804FB ldr pc, [sp], #4 - 10162 .L554: - 10163 .LCFI101: - 10164 .cfi_restore_state -1574:Src/main.c **** } - 10165 .loc 1 1574 5 is_stmt 1 view .LVU3192 - 10166 0088 FFF7FEFF bl Error_Handler - 10167 .LVL921: - 10168 .L555: -1579:Src/main.c **** } - 10169 .loc 1 1579 5 view .LVU3193 - 10170 008c FFF7FEFF bl Error_Handler - 10171 .LVL922: - 10172 .L556: -1583:Src/main.c **** } - 10173 .loc 1 1583 5 view .LVU3194 - 10174 0090 FFF7FEFF bl Error_Handler - 10175 .LVL923: - 10176 .L557: -1589:Src/main.c **** } - 10177 .loc 1 1589 5 view .LVU3195 - 10178 0094 FFF7FEFF bl Error_Handler - 10179 .LVL924: - 10180 .L558: -1597:Src/main.c **** } - 10181 .loc 1 1597 5 view .LVU3196 - 10182 0098 FFF7FEFF bl Error_Handler - 10183 .LVL925: - 10184 .L560: - 10185 .align 2 - 10186 .L559: - 10187 009c 00000000 .word htim4 - 10188 00a0 00080040 .word 1073743872 - 10189 .cfi_endproc - 10190 .LFE1196: - 10192 .section .text.MX_TIM1_Init,"ax",%progbits - 10193 .align 1 - 10194 .syntax unified - 10195 .thumb - 10196 .thumb_func - 10198 MX_TIM1_Init: - 10199 .LFB1203: -1849:Src/main.c **** - 10200 .loc 1 1849 1 view -0 - 10201 .cfi_startproc - 10202 @ args = 0, pretend = 0, frame = 88 - 10203 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccEQxcUB.s page 583 - - - 10204 0000 10B5 push {r4, lr} - 10205 .LCFI102: - 10206 .cfi_def_cfa_offset 8 - 10207 .cfi_offset 4, -8 - 10208 .cfi_offset 14, -4 - 10209 0002 96B0 sub sp, sp, #88 - 10210 .LCFI103: - 10211 .cfi_def_cfa_offset 96 -1855:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10212 .loc 1 1855 3 view .LVU3198 -1855:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10213 .loc 1 1855 26 is_stmt 0 view .LVU3199 - 10214 0004 0024 movs r4, #0 - 10215 0006 1294 str r4, [sp, #72] - 10216 0008 1394 str r4, [sp, #76] - 10217 000a 1494 str r4, [sp, #80] - 10218 000c 1594 str r4, [sp, #84] -1856:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 10219 .loc 1 1856 3 is_stmt 1 view .LVU3200 -1856:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 10220 .loc 1 1856 22 is_stmt 0 view .LVU3201 - 10221 000e 0B94 str r4, [sp, #44] - 10222 0010 0C94 str r4, [sp, #48] - 10223 0012 0D94 str r4, [sp, #52] - 10224 0014 0E94 str r4, [sp, #56] - 10225 0016 0F94 str r4, [sp, #60] - 10226 0018 1094 str r4, [sp, #64] - 10227 001a 1194 str r4, [sp, #68] -1857:Src/main.c **** - 10228 .loc 1 1857 3 is_stmt 1 view .LVU3202 -1857:Src/main.c **** - 10229 .loc 1 1857 34 is_stmt 0 view .LVU3203 - 10230 001c 2C22 movs r2, #44 - 10231 001e 2146 mov r1, r4 - 10232 0020 6846 mov r0, sp - 10233 0022 FFF7FEFF bl memset - 10234 .LVL926: -1862:Src/main.c **** htim1.Init.Prescaler = 0; - 10235 .loc 1 1862 3 is_stmt 1 view .LVU3204 -1862:Src/main.c **** htim1.Init.Prescaler = 0; - 10236 .loc 1 1862 18 is_stmt 0 view .LVU3205 - 10237 0026 2548 ldr r0, .L573 - 10238 0028 254B ldr r3, .L573+4 - 10239 002a 0360 str r3, [r0] -1863:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 10240 .loc 1 1863 3 is_stmt 1 view .LVU3206 -1863:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 10241 .loc 1 1863 24 is_stmt 0 view .LVU3207 - 10242 002c 4460 str r4, [r0, #4] -1864:Src/main.c **** htim1.Init.Period = 8; - 10243 .loc 1 1864 3 is_stmt 1 view .LVU3208 -1864:Src/main.c **** htim1.Init.Period = 8; - 10244 .loc 1 1864 26 is_stmt 0 view .LVU3209 - 10245 002e 8460 str r4, [r0, #8] -1865:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10246 .loc 1 1865 3 is_stmt 1 view .LVU3210 -1865:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - ARM GAS /tmp/ccEQxcUB.s page 584 - - - 10247 .loc 1 1865 21 is_stmt 0 view .LVU3211 - 10248 0030 0823 movs r3, #8 - 10249 0032 C360 str r3, [r0, #12] -1866:Src/main.c **** htim1.Init.RepetitionCounter = 0; - 10250 .loc 1 1866 3 is_stmt 1 view .LVU3212 -1866:Src/main.c **** htim1.Init.RepetitionCounter = 0; - 10251 .loc 1 1866 28 is_stmt 0 view .LVU3213 - 10252 0034 0461 str r4, [r0, #16] -1867:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10253 .loc 1 1867 3 is_stmt 1 view .LVU3214 -1867:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10254 .loc 1 1867 32 is_stmt 0 view .LVU3215 - 10255 0036 4461 str r4, [r0, #20] -1868:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 10256 .loc 1 1868 3 is_stmt 1 view .LVU3216 -1868:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 10257 .loc 1 1868 32 is_stmt 0 view .LVU3217 - 10258 0038 8461 str r4, [r0, #24] -1869:Src/main.c **** { - 10259 .loc 1 1869 3 is_stmt 1 view .LVU3218 -1869:Src/main.c **** { - 10260 .loc 1 1869 7 is_stmt 0 view .LVU3219 - 10261 003a FFF7FEFF bl HAL_TIM_Base_Init - 10262 .LVL927: -1869:Src/main.c **** { - 10263 .loc 1 1869 6 discriminator 1 view .LVU3220 - 10264 003e 0028 cmp r0, #0 - 10265 0040 32D1 bne .L568 -1873:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 10266 .loc 1 1873 3 is_stmt 1 view .LVU3221 -1873:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 10267 .loc 1 1873 34 is_stmt 0 view .LVU3222 - 10268 0042 4FF48053 mov r3, #4096 - 10269 0046 1293 str r3, [sp, #72] -1874:Src/main.c **** { - 10270 .loc 1 1874 3 is_stmt 1 view .LVU3223 -1874:Src/main.c **** { - 10271 .loc 1 1874 7 is_stmt 0 view .LVU3224 - 10272 0048 12A9 add r1, sp, #72 - 10273 004a 1C48 ldr r0, .L573 - 10274 004c FFF7FEFF bl HAL_TIM_ConfigClockSource - 10275 .LVL928: -1874:Src/main.c **** { - 10276 .loc 1 1874 6 discriminator 1 view .LVU3225 - 10277 0050 0028 cmp r0, #0 - 10278 0052 2BD1 bne .L569 -1878:Src/main.c **** { - 10279 .loc 1 1878 3 is_stmt 1 view .LVU3226 -1878:Src/main.c **** { - 10280 .loc 1 1878 7 is_stmt 0 view .LVU3227 - 10281 0054 1948 ldr r0, .L573 - 10282 0056 FFF7FEFF bl HAL_TIM_PWM_Init - 10283 .LVL929: -1878:Src/main.c **** { - 10284 .loc 1 1878 6 discriminator 1 view .LVU3228 - 10285 005a 48BB cbnz r0, .L570 -1882:Src/main.c **** sConfigOC.Pulse = 4; - ARM GAS /tmp/ccEQxcUB.s page 585 - - - 10286 .loc 1 1882 3 is_stmt 1 view .LVU3229 -1882:Src/main.c **** sConfigOC.Pulse = 4; - 10287 .loc 1 1882 20 is_stmt 0 view .LVU3230 - 10288 005c 6023 movs r3, #96 - 10289 005e 0B93 str r3, [sp, #44] -1883:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10290 .loc 1 1883 3 is_stmt 1 view .LVU3231 -1883:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10291 .loc 1 1883 19 is_stmt 0 view .LVU3232 - 10292 0060 0423 movs r3, #4 - 10293 0062 0C93 str r3, [sp, #48] -1884:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10294 .loc 1 1884 3 is_stmt 1 view .LVU3233 -1884:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10295 .loc 1 1884 24 is_stmt 0 view .LVU3234 - 10296 0064 0022 movs r2, #0 - 10297 0066 0D92 str r2, [sp, #52] -1885:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 10298 .loc 1 1885 3 is_stmt 1 view .LVU3235 -1885:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 10299 .loc 1 1885 24 is_stmt 0 view .LVU3236 - 10300 0068 0F92 str r2, [sp, #60] -1886:Src/main.c **** { - 10301 .loc 1 1886 3 is_stmt 1 view .LVU3237 -1886:Src/main.c **** { - 10302 .loc 1 1886 7 is_stmt 0 view .LVU3238 - 10303 006a 0BA9 add r1, sp, #44 - 10304 006c 1348 ldr r0, .L573 - 10305 006e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 10306 .LVL930: -1886:Src/main.c **** { - 10307 .loc 1 1886 6 discriminator 1 view .LVU3239 - 10308 0072 F8B9 cbnz r0, .L571 -1890:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - 10309 .loc 1 1890 3 is_stmt 1 view .LVU3240 -1890:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - 10310 .loc 1 1890 40 is_stmt 0 view .LVU3241 - 10311 0074 0023 movs r3, #0 - 10312 0076 0093 str r3, [sp] -1891:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 10313 .loc 1 1891 3 is_stmt 1 view .LVU3242 -1891:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 10314 .loc 1 1891 41 is_stmt 0 view .LVU3243 - 10315 0078 0193 str r3, [sp, #4] -1892:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; - 10316 .loc 1 1892 3 is_stmt 1 view .LVU3244 -1892:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; - 10317 .loc 1 1892 34 is_stmt 0 view .LVU3245 - 10318 007a 0293 str r3, [sp, #8] -1893:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 10319 .loc 1 1893 3 is_stmt 1 view .LVU3246 -1893:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 10320 .loc 1 1893 33 is_stmt 0 view .LVU3247 - 10321 007c 0393 str r3, [sp, #12] -1894:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 10322 .loc 1 1894 3 is_stmt 1 view .LVU3248 -1894:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - ARM GAS /tmp/ccEQxcUB.s page 586 - - - 10323 .loc 1 1894 35 is_stmt 0 view .LVU3249 - 10324 007e 0493 str r3, [sp, #16] -1895:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; - 10325 .loc 1 1895 3 is_stmt 1 view .LVU3250 -1895:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; - 10326 .loc 1 1895 38 is_stmt 0 view .LVU3251 - 10327 0080 4FF40052 mov r2, #8192 - 10328 0084 0592 str r2, [sp, #20] -1896:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; - 10329 .loc 1 1896 3 is_stmt 1 view .LVU3252 -1896:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; - 10330 .loc 1 1896 36 is_stmt 0 view .LVU3253 - 10331 0086 0693 str r3, [sp, #24] -1897:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 10332 .loc 1 1897 3 is_stmt 1 view .LVU3254 -1897:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 10333 .loc 1 1897 36 is_stmt 0 view .LVU3255 - 10334 0088 0793 str r3, [sp, #28] -1898:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; - 10335 .loc 1 1898 3 is_stmt 1 view .LVU3256 -1898:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; - 10336 .loc 1 1898 39 is_stmt 0 view .LVU3257 - 10337 008a 4FF00072 mov r2, #33554432 - 10338 008e 0892 str r2, [sp, #32] -1899:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 10339 .loc 1 1899 3 is_stmt 1 view .LVU3258 -1899:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 10340 .loc 1 1899 37 is_stmt 0 view .LVU3259 - 10341 0090 0993 str r3, [sp, #36] -1900:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 10342 .loc 1 1900 3 is_stmt 1 view .LVU3260 -1900:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 10343 .loc 1 1900 40 is_stmt 0 view .LVU3261 - 10344 0092 0A93 str r3, [sp, #40] -1901:Src/main.c **** { - 10345 .loc 1 1901 3 is_stmt 1 view .LVU3262 -1901:Src/main.c **** { - 10346 .loc 1 1901 7 is_stmt 0 view .LVU3263 - 10347 0094 6946 mov r1, sp - 10348 0096 0948 ldr r0, .L573 - 10349 0098 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime - 10350 .LVL931: -1901:Src/main.c **** { - 10351 .loc 1 1901 6 discriminator 1 view .LVU3264 - 10352 009c 60B9 cbnz r0, .L572 -1908:Src/main.c **** - 10353 .loc 1 1908 3 is_stmt 1 view .LVU3265 - 10354 009e 0748 ldr r0, .L573 - 10355 00a0 FFF7FEFF bl HAL_TIM_MspPostInit - 10356 .LVL932: -1910:Src/main.c **** - 10357 .loc 1 1910 1 is_stmt 0 view .LVU3266 - 10358 00a4 16B0 add sp, sp, #88 - 10359 .LCFI104: - 10360 .cfi_remember_state - 10361 .cfi_def_cfa_offset 8 - 10362 @ sp needed - ARM GAS /tmp/ccEQxcUB.s page 587 - - - 10363 00a6 10BD pop {r4, pc} - 10364 .L568: - 10365 .LCFI105: - 10366 .cfi_restore_state -1871:Src/main.c **** } - 10367 .loc 1 1871 5 is_stmt 1 view .LVU3267 - 10368 00a8 FFF7FEFF bl Error_Handler - 10369 .LVL933: - 10370 .L569: -1876:Src/main.c **** } - 10371 .loc 1 1876 5 view .LVU3268 - 10372 00ac FFF7FEFF bl Error_Handler - 10373 .LVL934: - 10374 .L570: -1880:Src/main.c **** } - 10375 .loc 1 1880 5 view .LVU3269 - 10376 00b0 FFF7FEFF bl Error_Handler - 10377 .LVL935: - 10378 .L571: -1888:Src/main.c **** } - 10379 .loc 1 1888 5 view .LVU3270 - 10380 00b4 FFF7FEFF bl Error_Handler - 10381 .LVL936: - 10382 .L572: -1903:Src/main.c **** } - 10383 .loc 1 1903 5 view .LVU3271 - 10384 00b8 FFF7FEFF bl Error_Handler - 10385 .LVL937: - 10386 .L574: - 10387 .align 2 - 10388 .L573: - 10389 00bc 00000000 .word htim1 - 10390 00c0 00000140 .word 1073807360 - 10391 .cfi_endproc - 10392 .LFE1203: - 10394 .section .text.SystemClock_Config,"ax",%progbits - 10395 .align 1 - 10396 .global SystemClock_Config - 10397 .syntax unified - 10398 .thumb - 10399 .thumb_func - 10401 SystemClock_Config: - 10402 .LFB1187: -1031:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 10403 .loc 1 1031 1 view -0 - 10404 .cfi_startproc - 10405 @ args = 0, pretend = 0, frame = 80 - 10406 @ frame_needed = 0, uses_anonymous_args = 0 - 10407 0000 00B5 push {lr} - 10408 .LCFI106: - 10409 .cfi_def_cfa_offset 4 - 10410 .cfi_offset 14, -4 - 10411 0002 95B0 sub sp, sp, #84 - 10412 .LCFI107: - 10413 .cfi_def_cfa_offset 88 -1032:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 10414 .loc 1 1032 3 view .LVU3273 - ARM GAS /tmp/ccEQxcUB.s page 588 - - -1032:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 10415 .loc 1 1032 22 is_stmt 0 view .LVU3274 - 10416 0004 3422 movs r2, #52 - 10417 0006 0021 movs r1, #0 - 10418 0008 07A8 add r0, sp, #28 - 10419 000a FFF7FEFF bl memset - 10420 .LVL938: -1033:Src/main.c **** - 10421 .loc 1 1033 3 is_stmt 1 view .LVU3275 -1033:Src/main.c **** - 10422 .loc 1 1033 22 is_stmt 0 view .LVU3276 - 10423 000e 0023 movs r3, #0 - 10424 0010 0293 str r3, [sp, #8] - 10425 0012 0393 str r3, [sp, #12] - 10426 0014 0493 str r3, [sp, #16] - 10427 0016 0593 str r3, [sp, #20] - 10428 0018 0693 str r3, [sp, #24] -1037:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10429 .loc 1 1037 3 is_stmt 1 view .LVU3277 - 10430 .LBB671: -1037:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10431 .loc 1 1037 3 view .LVU3278 -1037:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10432 .loc 1 1037 3 view .LVU3279 - 10433 001a 244B ldr r3, .L583 - 10434 001c 1A6C ldr r2, [r3, #64] - 10435 001e 42F08052 orr r2, r2, #268435456 - 10436 0022 1A64 str r2, [r3, #64] -1037:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10437 .loc 1 1037 3 view .LVU3280 - 10438 0024 1B6C ldr r3, [r3, #64] - 10439 0026 03F08053 and r3, r3, #268435456 - 10440 002a 0093 str r3, [sp] -1037:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10441 .loc 1 1037 3 view .LVU3281 - 10442 002c 009B ldr r3, [sp] - 10443 .LBE671: -1037:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10444 .loc 1 1037 3 view .LVU3282 -1038:Src/main.c **** - 10445 .loc 1 1038 3 view .LVU3283 - 10446 .LBB672: -1038:Src/main.c **** - 10447 .loc 1 1038 3 view .LVU3284 -1038:Src/main.c **** - 10448 .loc 1 1038 3 view .LVU3285 - 10449 002e 204B ldr r3, .L583+4 - 10450 0030 1A68 ldr r2, [r3] - 10451 0032 42F44042 orr r2, r2, #49152 - 10452 0036 1A60 str r2, [r3] -1038:Src/main.c **** - 10453 .loc 1 1038 3 view .LVU3286 - 10454 0038 1B68 ldr r3, [r3] - 10455 003a 03F44043 and r3, r3, #49152 - 10456 003e 0193 str r3, [sp, #4] -1038:Src/main.c **** - 10457 .loc 1 1038 3 view .LVU3287 - ARM GAS /tmp/ccEQxcUB.s page 589 - - - 10458 0040 019B ldr r3, [sp, #4] - 10459 .LBE672: -1038:Src/main.c **** - 10460 .loc 1 1038 3 view .LVU3288 -1043:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 10461 .loc 1 1043 3 view .LVU3289 -1043:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 10462 .loc 1 1043 36 is_stmt 0 view .LVU3290 - 10463 0042 0123 movs r3, #1 - 10464 0044 0793 str r3, [sp, #28] -1044:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 10465 .loc 1 1044 3 is_stmt 1 view .LVU3291 -1044:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 10466 .loc 1 1044 30 is_stmt 0 view .LVU3292 - 10467 0046 4FF48033 mov r3, #65536 - 10468 004a 0893 str r3, [sp, #32] -1045:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 10469 .loc 1 1045 3 is_stmt 1 view .LVU3293 -1045:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 10470 .loc 1 1045 34 is_stmt 0 view .LVU3294 - 10471 004c 0223 movs r3, #2 - 10472 004e 0D93 str r3, [sp, #52] -1046:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 10473 .loc 1 1046 3 is_stmt 1 view .LVU3295 -1046:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 10474 .loc 1 1046 35 is_stmt 0 view .LVU3296 - 10475 0050 4FF48002 mov r2, #4194304 - 10476 0054 0E92 str r2, [sp, #56] -1047:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 10477 .loc 1 1047 3 is_stmt 1 view .LVU3297 -1047:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 10478 .loc 1 1047 30 is_stmt 0 view .LVU3298 - 10479 0056 1922 movs r2, #25 - 10480 0058 0F92 str r2, [sp, #60] -1048:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 10481 .loc 1 1048 3 is_stmt 1 view .LVU3299 -1048:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 10482 .loc 1 1048 30 is_stmt 0 view .LVU3300 - 10483 005a 4FF4B872 mov r2, #368 - 10484 005e 1092 str r2, [sp, #64] -1049:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 10485 .loc 1 1049 3 is_stmt 1 view .LVU3301 -1049:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 10486 .loc 1 1049 30 is_stmt 0 view .LVU3302 - 10487 0060 1193 str r3, [sp, #68] -1050:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 10488 .loc 1 1050 3 is_stmt 1 view .LVU3303 -1050:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 10489 .loc 1 1050 30 is_stmt 0 view .LVU3304 - 10490 0062 0822 movs r2, #8 - 10491 0064 1292 str r2, [sp, #72] -1051:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 10492 .loc 1 1051 3 is_stmt 1 view .LVU3305 -1051:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 10493 .loc 1 1051 30 is_stmt 0 view .LVU3306 - 10494 0066 1393 str r3, [sp, #76] -1052:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 590 - - - 10495 .loc 1 1052 3 is_stmt 1 view .LVU3307 -1052:Src/main.c **** { - 10496 .loc 1 1052 7 is_stmt 0 view .LVU3308 - 10497 0068 07A8 add r0, sp, #28 - 10498 006a FFF7FEFF bl HAL_RCC_OscConfig - 10499 .LVL939: -1052:Src/main.c **** { - 10500 .loc 1 1052 6 discriminator 1 view .LVU3309 - 10501 006e B0B9 cbnz r0, .L580 -1059:Src/main.c **** { - 10502 .loc 1 1059 3 is_stmt 1 view .LVU3310 -1059:Src/main.c **** { - 10503 .loc 1 1059 7 is_stmt 0 view .LVU3311 - 10504 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive - 10505 .LVL940: -1059:Src/main.c **** { - 10506 .loc 1 1059 6 discriminator 1 view .LVU3312 - 10507 0074 A8B9 cbnz r0, .L581 -1066:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 10508 .loc 1 1066 3 is_stmt 1 view .LVU3313 -1066:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 10509 .loc 1 1066 31 is_stmt 0 view .LVU3314 - 10510 0076 0F23 movs r3, #15 - 10511 0078 0293 str r3, [sp, #8] -1068:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 10512 .loc 1 1068 3 is_stmt 1 view .LVU3315 -1068:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 10513 .loc 1 1068 34 is_stmt 0 view .LVU3316 - 10514 007a 0223 movs r3, #2 - 10515 007c 0393 str r3, [sp, #12] -1069:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 10516 .loc 1 1069 3 is_stmt 1 view .LVU3317 -1069:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 10517 .loc 1 1069 35 is_stmt 0 view .LVU3318 - 10518 007e 0023 movs r3, #0 - 10519 0080 0493 str r3, [sp, #16] -1070:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 10520 .loc 1 1070 3 is_stmt 1 view .LVU3319 -1070:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 10521 .loc 1 1070 36 is_stmt 0 view .LVU3320 - 10522 0082 4FF4A053 mov r3, #5120 - 10523 0086 0593 str r3, [sp, #20] -1071:Src/main.c **** - 10524 .loc 1 1071 3 is_stmt 1 view .LVU3321 -1071:Src/main.c **** - 10525 .loc 1 1071 36 is_stmt 0 view .LVU3322 - 10526 0088 4FF48053 mov r3, #4096 - 10527 008c 0693 str r3, [sp, #24] -1073:Src/main.c **** { - 10528 .loc 1 1073 3 is_stmt 1 view .LVU3323 -1073:Src/main.c **** { - 10529 .loc 1 1073 7 is_stmt 0 view .LVU3324 - 10530 008e 0621 movs r1, #6 - 10531 0090 02A8 add r0, sp, #8 - 10532 0092 FFF7FEFF bl HAL_RCC_ClockConfig - 10533 .LVL941: -1073:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 591 - - - 10534 .loc 1 1073 6 discriminator 1 view .LVU3325 - 10535 0096 30B9 cbnz r0, .L582 -1077:Src/main.c **** - 10536 .loc 1 1077 1 view .LVU3326 - 10537 0098 15B0 add sp, sp, #84 - 10538 .LCFI108: - 10539 .cfi_remember_state - 10540 .cfi_def_cfa_offset 4 - 10541 @ sp needed - 10542 009a 5DF804FB ldr pc, [sp], #4 - 10543 .L580: - 10544 .LCFI109: - 10545 .cfi_restore_state -1054:Src/main.c **** } - 10546 .loc 1 1054 5 is_stmt 1 view .LVU3327 - 10547 009e FFF7FEFF bl Error_Handler - 10548 .LVL942: - 10549 .L581: -1061:Src/main.c **** } - 10550 .loc 1 1061 5 view .LVU3328 - 10551 00a2 FFF7FEFF bl Error_Handler - 10552 .LVL943: - 10553 .L582: -1075:Src/main.c **** } - 10554 .loc 1 1075 5 view .LVU3329 - 10555 00a6 FFF7FEFF bl Error_Handler - 10556 .LVL944: - 10557 .L584: - 10558 00aa 00BF .align 2 - 10559 .L583: - 10560 00ac 00380240 .word 1073887232 - 10561 00b0 00700040 .word 1073770496 - 10562 .cfi_endproc - 10563 .LFE1187: - 10565 .section .text.main,"ax",%progbits - 10566 .align 1 - 10567 .global main - 10568 .syntax unified - 10569 .thumb - 10570 .thumb_func - 10572 main: - 10573 .LFB1186: - 250:Src/main.c **** - 10574 .loc 1 250 1 view -0 - 10575 .cfi_startproc - 10576 @ args = 0, pretend = 0, frame = 8 - 10577 @ frame_needed = 0, uses_anonymous_args = 0 - 10578 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} - 10579 .LCFI110: - 10580 .cfi_def_cfa_offset 28 - 10581 .cfi_offset 4, -28 - 10582 .cfi_offset 5, -24 - 10583 .cfi_offset 6, -20 - 10584 .cfi_offset 7, -16 - 10585 .cfi_offset 8, -12 - 10586 .cfi_offset 9, -8 - 10587 .cfi_offset 14, -4 - ARM GAS /tmp/ccEQxcUB.s page 592 - - - 10588 0004 85B0 sub sp, sp, #20 - 10589 .LCFI111: - 10590 .cfi_def_cfa_offset 48 - 253:Src/main.c **** /* USER CODE END 1 */ - 10591 .loc 1 253 2 view .LVU3331 - 259:Src/main.c **** - 10592 .loc 1 259 3 view .LVU3332 - 10593 0006 FFF7FEFF bl HAL_Init - 10594 .LVL945: - 266:Src/main.c **** - 10595 .loc 1 266 3 view .LVU3333 - 10596 000a FFF7FEFF bl SystemClock_Config - 10597 .LVL946: - 273:Src/main.c **** MX_DMA_Init(); - 10598 .loc 1 273 3 view .LVU3334 - 10599 000e FFF7FEFF bl MX_GPIO_Init - 10600 .LVL947: - 274:Src/main.c **** MX_SPI4_Init(); - 10601 .loc 1 274 3 view .LVU3335 - 10602 0012 FFF7FEFF bl MX_DMA_Init - 10603 .LVL948: - 275:Src/main.c **** MX_FATFS_Init(); - 10604 .loc 1 275 3 view .LVU3336 - 10605 0016 FFF7FEFF bl MX_SPI4_Init - 10606 .LVL949: - 276:Src/main.c **** MX_TIM2_Init(); - 10607 .loc 1 276 3 view .LVU3337 - 10608 001a FFF7FEFF bl MX_FATFS_Init - 10609 .LVL950: - 277:Src/main.c **** MX_TIM5_Init(); - 10610 .loc 1 277 3 view .LVU3338 - 10611 001e FFF7FEFF bl MX_TIM2_Init - 10612 .LVL951: - 278:Src/main.c **** MX_ADC1_Init(); - 10613 .loc 1 278 3 view .LVU3339 - 10614 0022 FFF7FEFF bl MX_TIM5_Init - 10615 .LVL952: - 279:Src/main.c **** MX_ADC3_Init(); - 10616 .loc 1 279 3 view .LVU3340 - 10617 0026 FFF7FEFF bl MX_ADC1_Init - 10618 .LVL953: - 280:Src/main.c **** MX_SPI2_Init(); - 10619 .loc 1 280 3 view .LVU3341 - 10620 002a FFF7FEFF bl MX_ADC3_Init - 10621 .LVL954: - 281:Src/main.c **** MX_SPI5_Init(); - 10622 .loc 1 281 3 view .LVU3342 - 10623 002e FFF7FEFF bl MX_SPI2_Init - 10624 .LVL955: - 282:Src/main.c **** MX_SPI6_Init(); - 10625 .loc 1 282 3 view .LVU3343 - 10626 0032 FFF7FEFF bl MX_SPI5_Init - 10627 .LVL956: - 283:Src/main.c **** MX_USART1_UART_Init(); - 10628 .loc 1 283 3 view .LVU3344 - 10629 0036 FFF7FEFF bl MX_SPI6_Init - 10630 .LVL957: - ARM GAS /tmp/ccEQxcUB.s page 593 - - - 284:Src/main.c **** MX_SDMMC1_SD_Init(); - 10631 .loc 1 284 3 view .LVU3345 - 10632 003a FFF7FEFF bl MX_USART1_UART_Init - 10633 .LVL958: - 285:Src/main.c **** MX_TIM7_Init(); - 10634 .loc 1 285 3 view .LVU3346 - 10635 003e FFF7FEFF bl MX_SDMMC1_SD_Init - 10636 .LVL959: - 286:Src/main.c **** MX_TIM6_Init(); - 10637 .loc 1 286 3 view .LVU3347 - 10638 0042 FFF7FEFF bl MX_TIM7_Init - 10639 .LVL960: - 287:Src/main.c **** MX_TIM10_Init(); - 10640 .loc 1 287 3 view .LVU3348 - 10641 0046 FFF7FEFF bl MX_TIM6_Init - 10642 .LVL961: - 288:Src/main.c **** MX_UART8_Init(); - 10643 .loc 1 288 3 view .LVU3349 - 10644 004a FFF7FEFF bl MX_TIM10_Init - 10645 .LVL962: - 289:Src/main.c **** MX_TIM8_Init(); - 10646 .loc 1 289 3 view .LVU3350 - 10647 004e FFF7FEFF bl MX_UART8_Init - 10648 .LVL963: - 290:Src/main.c **** MX_TIM11_Init(); - 10649 .loc 1 290 3 view .LVU3351 - 10650 0052 FFF7FEFF bl MX_TIM8_Init - 10651 .LVL964: - 291:Src/main.c **** MX_TIM4_Init(); - 10652 .loc 1 291 3 view .LVU3352 - 10653 0056 FFF7FEFF bl MX_TIM11_Init - 10654 .LVL965: - 292:Src/main.c **** MX_TIM1_Init(); - 10655 .loc 1 292 3 view .LVU3353 - 10656 005a FFF7FEFF bl MX_TIM4_Init - 10657 .LVL966: - 293:Src/main.c **** /* USER CODE BEGIN 2 */ - 10658 .loc 1 293 3 view .LVU3354 - 10659 005e FFF7FEFF bl MX_TIM1_Init - 10660 .LVL967: - 295:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 10661 .loc 1 295 2 view .LVU3355 - 10662 0062 FFF7FEFF bl Init_params - 10663 .LVL968: - 306:Src/main.c **** - 10664 .loc 1 306 2 view .LVU3356 - 306:Src/main.c **** - 10665 .loc 1 306 14 is_stmt 0 view .LVU3357 - 10666 0066 894A ldr r2, .L679 - 10667 0068 3523 movs r3, #53 - 10668 006a D362 str r3, [r2, #44] - 308:Src/main.c **** - 10669 .loc 1 308 2 is_stmt 1 view .LVU3358 - 308:Src/main.c **** - 10670 .loc 1 308 23 is_stmt 0 view .LVU3359 - 10671 006c D36A ldr r3, [r2, #44] - 308:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 594 - - - 10672 .loc 1 308 30 view .LVU3360 - 10673 006e 0133 adds r3, r3, #1 - 308:Src/main.c **** - 10674 .loc 1 308 33 view .LVU3361 - 10675 0070 5B08 lsrs r3, r3, #1 - 308:Src/main.c **** - 10676 .loc 1 308 36 view .LVU3362 - 10677 0072 013B subs r3, r3, #1 - 308:Src/main.c **** - 10678 .loc 1 308 15 view .LVU3363 - 10679 0074 D363 str r3, [r2, #60] - 313:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10680 .loc 1 313 2 is_stmt 1 view .LVU3364 - 313:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10681 .loc 1 313 23 is_stmt 0 view .LVU3365 - 10682 0076 D36A ldr r3, [r2, #44] - 313:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10683 .loc 1 313 36 view .LVU3366 - 10684 0078 9B00 lsls r3, r3, #2 - 10685 007a 0333 adds r3, r3, #3 - 313:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10686 .loc 1 313 15 view .LVU3367 - 10687 007c 02F5A032 add r2, r2, #81920 - 10688 0080 D362 str r3, [r2, #44] - 314:Src/main.c **** - 10689 .loc 1 314 2 is_stmt 1 view .LVU3368 - 314:Src/main.c **** - 10690 .loc 1 314 25 is_stmt 0 view .LVU3369 - 10691 0082 D36A ldr r3, [r2, #44] - 314:Src/main.c **** - 10692 .loc 1 314 32 view .LVU3370 - 10693 0084 0133 adds r3, r3, #1 - 314:Src/main.c **** - 10694 .loc 1 314 35 view .LVU3371 - 10695 0086 5B08 lsrs r3, r3, #1 - 314:Src/main.c **** - 10696 .loc 1 314 38 view .LVU3372 - 10697 0088 013B subs r3, r3, #1 - 314:Src/main.c **** - 10698 .loc 1 314 16 view .LVU3373 - 10699 008a 5363 str r3, [r2, #52] - 318:Src/main.c **** - 10700 .loc 1 318 2 is_stmt 1 view .LVU3374 - 10701 008c 0021 movs r1, #0 - 10702 008e 8048 ldr r0, .L679+4 - 10703 0090 FFF7FEFF bl HAL_TIM_PWM_Start - 10704 .LVL969: - 10705 0094 4CE0 b .L586 - 10706 .L668: - 332:Src/main.c **** { - 10707 .loc 1 332 85 is_stmt 0 discriminator 1 view .LVU3375 - 10708 0096 7F4B ldr r3, .L679+8 - 10709 0098 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 332:Src/main.c **** { - 10710 .loc 1 332 73 discriminator 1 view .LVU3376 - 10711 009a 002B cmp r3, #0 - 10712 009c 4FD1 bne .L587 - ARM GAS /tmp/ccEQxcUB.s page 595 - - - 10713 .L588: - 10714 .LBB673: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10715 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3377 - 10716 .LBB674: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10717 .loc 7 3073 3 discriminator 1 view .LVU3378 -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10718 .loc 7 3073 3 discriminator 1 view .LVU3379 -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10719 .loc 7 3073 3 discriminator 1 view .LVU3380 - 10720 .LVL970: - 10721 .LBB675: - 10722 .LBI675: -1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10723 .loc 8 1068 31 view .LVU3381 - 10724 .LBB676: -1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10725 .loc 8 1070 5 view .LVU3382 -1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10726 .loc 8 1072 4 view .LVU3383 - 10727 009e 7E4A ldr r2, .L679+12 - 10728 .syntax unified - 10729 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10730 00a0 52E8003F ldrex r3, [r2] - 10731 @ 0 "" 2 - 10732 .LVL971: -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10733 .loc 8 1073 4 view .LVU3384 -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10734 .loc 8 1073 4 is_stmt 0 view .LVU3385 - 10735 .thumb - 10736 .syntax unified - 10737 .LBE676: - 10738 .LBE675: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10739 .loc 7 3073 3 discriminator 1 view .LVU3386 - 10740 00a4 43F48073 orr r3, r3, #256 - 10741 .LVL972: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10742 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3387 - 10743 .LBB677: - 10744 .LBI677: -1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10745 .loc 8 1119 31 view .LVU3388 - 10746 .LBB678: -1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10747 .loc 8 1121 4 view .LVU3389 -1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10748 .loc 8 1123 4 view .LVU3390 - 10749 .syntax unified - 10750 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10751 00a8 42E80031 strex r1, r3, [r2] - 10752 @ 0 "" 2 - 10753 .LVL973: - 10754 .loc 8 1124 4 view .LVU3391 - 10755 .loc 8 1124 4 is_stmt 0 view .LVU3392 - ARM GAS /tmp/ccEQxcUB.s page 596 - - - 10756 .thumb - 10757 .syntax unified - 10758 .LBE678: - 10759 .LBE677: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10760 .loc 7 3073 3 discriminator 1 view .LVU3393 - 10761 00ac 0029 cmp r1, #0 - 10762 00ae F6D1 bne .L588 - 10763 .LVL974: - 10764 .L589: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10765 .loc 7 3073 3 discriminator 1 view .LVU3394 - 10766 .LBE674: - 10767 .LBE673: - 10768 .LBB679: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10769 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3395 - 10770 .LBB680: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10771 .loc 7 3040 3 discriminator 1 view .LVU3396 -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10772 .loc 7 3040 3 discriminator 1 view .LVU3397 -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10773 .loc 7 3040 3 discriminator 1 view .LVU3398 - 10774 .LBB681: - 10775 .LBI681: -1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10776 .loc 8 1068 31 view .LVU3399 - 10777 .LBB682: -1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10778 .loc 8 1070 5 view .LVU3400 -1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10779 .loc 8 1072 4 view .LVU3401 - 10780 00b0 794A ldr r2, .L679+12 - 10781 .syntax unified - 10782 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10783 00b2 52E8003F ldrex r3, [r2] - 10784 @ 0 "" 2 - 10785 .LVL975: -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10786 .loc 8 1073 4 view .LVU3402 -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10787 .loc 8 1073 4 is_stmt 0 view .LVU3403 - 10788 .thumb - 10789 .syntax unified - 10790 .LBE682: - 10791 .LBE681: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10792 .loc 7 3040 3 discriminator 1 view .LVU3404 - 10793 00b6 43F02003 orr r3, r3, #32 - 10794 .LVL976: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10795 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3405 - 10796 .LBB683: - 10797 .LBI683: -1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10798 .loc 8 1119 31 view .LVU3406 - ARM GAS /tmp/ccEQxcUB.s page 597 - - - 10799 .LBB684: -1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10800 .loc 8 1121 4 view .LVU3407 -1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10801 .loc 8 1123 4 view .LVU3408 - 10802 .syntax unified - 10803 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10804 00ba 42E80031 strex r1, r3, [r2] - 10805 @ 0 "" 2 - 10806 .LVL977: - 10807 .loc 8 1124 4 view .LVU3409 - 10808 .loc 8 1124 4 is_stmt 0 view .LVU3410 - 10809 .thumb - 10810 .syntax unified - 10811 .LBE684: - 10812 .LBE683: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10813 .loc 7 3040 3 discriminator 1 view .LVU3411 - 10814 00be 0029 cmp r1, #0 - 10815 00c0 F6D1 bne .L589 - 10816 .LVL978: - 10817 .L590: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10818 .loc 7 3040 3 discriminator 1 view .LVU3412 - 10819 .LBE680: - 10820 .LBE679: - 10821 .LBB685: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10822 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3413 - 10823 .LBB686: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10824 .loc 7 3136 3 discriminator 1 view .LVU3414 -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10825 .loc 7 3136 3 discriminator 1 view .LVU3415 -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10826 .loc 7 3136 3 discriminator 1 view .LVU3416 - 10827 .LBB687: - 10828 .LBI687: -1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10829 .loc 8 1068 31 view .LVU3417 - 10830 .LBB688: -1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10831 .loc 8 1070 5 view .LVU3418 -1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10832 .loc 8 1072 4 view .LVU3419 - 10833 00c2 754A ldr r2, .L679+12 - 10834 00c4 02F10803 add r3, r2, #8 - 10835 .syntax unified - 10836 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10837 00c8 53E8003F ldrex r3, [r3] - 10838 @ 0 "" 2 - 10839 .LVL979: -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10840 .loc 8 1073 4 view .LVU3420 -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10841 .loc 8 1073 4 is_stmt 0 view .LVU3421 - 10842 .thumb - ARM GAS /tmp/ccEQxcUB.s page 598 - - - 10843 .syntax unified - 10844 .LBE688: - 10845 .LBE687: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10846 .loc 7 3136 3 discriminator 1 view .LVU3422 - 10847 00cc 43F00103 orr r3, r3, #1 - 10848 .LVL980: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10849 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3423 - 10850 .LBB689: - 10851 .LBI689: -1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10852 .loc 8 1119 31 view .LVU3424 - 10853 .LBB690: -1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10854 .loc 8 1121 4 view .LVU3425 -1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10855 .loc 8 1123 4 view .LVU3426 - 10856 00d0 0832 adds r2, r2, #8 - 10857 .syntax unified - 10858 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10859 00d2 42E80031 strex r1, r3, [r2] - 10860 @ 0 "" 2 - 10861 .LVL981: - 10862 .loc 8 1124 4 view .LVU3427 - 10863 .loc 8 1124 4 is_stmt 0 view .LVU3428 - 10864 .thumb - 10865 .syntax unified - 10866 .LBE690: - 10867 .LBE689: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10868 .loc 7 3136 3 discriminator 1 view .LVU3429 - 10869 00d6 0029 cmp r1, #0 - 10870 00d8 F3D1 bne .L590 - 10871 .LBE686: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10872 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3430 - 10873 .LVL982: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10874 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3431 - 10875 .LBE685: - 338:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 10876 .loc 1 338 4 is_stmt 1 view .LVU3432 - 10877 .LBB691: - 10878 .LBI691: + 9657 .LBB661: + 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9658 .loc 6 833 3 view .LVU3013 + 9659 00fe D3F8B820 ldr r2, [r3, #184] + 9660 0102 22F4C042 bic r2, r2, #24576 + 9661 0106 C3F8B820 str r2, [r3, #184] + 9662 .LVL891: + 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9663 .loc 6 833 3 is_stmt 0 view .LVU3014 + 9664 .LBE661: + 9665 .LBE660: +2036:Src/main.c **** + 9666 .loc 1 2036 3 is_stmt 1 view .LVU3015 + 9667 .LBB662: + 9668 .LBI662: +1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 9669 .loc 6 1299 22 view .LVU3016 + 9670 .LBB663: +1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9671 .loc 6 1301 3 view .LVU3017 + 9672 010a D3F8CC20 ldr r2, [r3, #204] + 9673 010e 22F00402 bic r2, r2, #4 + 9674 0112 C3F8CC20 str r2, [r3, #204] + 9675 .LVL892: +1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 9676 .loc 6 1301 3 is_stmt 0 view .LVU3018 + 9677 .LBE663: + 9678 .LBE662: +2039:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 9679 .loc 1 2039 3 is_stmt 1 view .LVU3019 + 9680 .LBB664: + 9681 .LBI664: +1884:Drivers/CMSIS/Include/core_cm7.h **** { + 9682 .loc 2 1884 26 view .LVU3020 + 9683 .LBB665: +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 9684 .loc 2 1886 3 view .LVU3021 +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 9685 .loc 2 1886 26 is_stmt 0 view .LVU3022 + 9686 0116 1C4B ldr r3, .L524+12 + 9687 0118 D868 ldr r0, [r3, #12] + 9688 .LBE665: + 9689 .LBE664: +2039:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 9690 .loc 1 2039 3 discriminator 1 view .LVU3023 + 9691 011a 2246 mov r2, r4 + 9692 011c 2146 mov r1, r4 + 9693 011e C0F30220 ubfx r0, r0, #8, #3 + 9694 0122 FFF7FEFF bl NVIC_EncodePriority + 9695 .LVL893: + 9696 .LBB666: + 9697 .LBI666: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 10879 .loc 2 2024 22 view .LVU3433 - 10880 .LBB692: + 9698 .loc 2 2024 22 is_stmt 1 view .LVU3024 + 9699 .LBB667: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 10881 .loc 2 2026 3 view .LVU3434 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 10882 .loc 2 2028 5 view .LVU3435 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 10883 .loc 2 2028 47 is_stmt 0 view .LVU3436 - 10884 00da 704B ldr r3, .L679+16 - 10885 00dc 0022 movs r2, #0 - 10886 00de 83F82523 strb r2, [r3, #805] - ARM GAS /tmp/ccEQxcUB.s page 599 + 9700 .loc 2 2026 3 view .LVU3025 + ARM GAS /tmp/ccuHnxNu.s page 572 - 10887 .LVL983: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 10888 .loc 2 2028 47 view .LVU3437 - 10889 .LBE692: - 10890 .LBE691: - 339:Src/main.c **** u_rx_flg = 1; - 10891 .loc 1 339 4 is_stmt 1 view .LVU3438 - 10892 .LBB693: - 10893 .LBI693: + 9701 .loc 2 2028 5 view .LVU3026 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 9702 .loc 2 2028 49 is_stmt 0 view .LVU3027 + 9703 0126 0001 lsls r0, r0, #4 + 9704 .LVL894: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 9705 .loc 2 2028 49 view .LVU3028 + 9706 0128 C0B2 uxtb r0, r0 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 9707 .loc 2 2028 47 view .LVU3029 + 9708 012a 184B ldr r3, .L524+16 + 9709 012c 83F82503 strb r0, [r3, #805] + 9710 .LVL895: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 9711 .loc 2 2028 47 view .LVU3030 + 9712 .LBE667: + 9713 .LBE666: +2040:Src/main.c **** + 9714 .loc 1 2040 3 is_stmt 1 view .LVU3031 + 9715 .LBB668: + 9716 .LBI668: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 10894 .loc 2 1896 22 view .LVU3439 - 10895 .LBB694: + 9717 .loc 2 1896 22 view .LVU3032 + 9718 .LBB669: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 10896 .loc 2 1898 3 view .LVU3440 + 9719 .loc 2 1898 3 view .LVU3033 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 10897 .loc 2 1900 5 view .LVU3441 + 9720 .loc 2 1900 5 view .LVU3034 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 10898 .loc 2 1900 43 is_stmt 0 view .LVU3442 - 10899 00e2 2022 movs r2, #32 - 10900 00e4 5A60 str r2, [r3, #4] - 10901 .LVL984: + 9721 .loc 2 1900 43 is_stmt 0 view .LVU3035 + 9722 0130 2022 movs r2, #32 + 9723 0132 5A60 str r2, [r3, #4] + 9724 .LVL896: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 10902 .loc 2 1900 43 view .LVU3443 - 10903 .LBE694: - 10904 .LBE693: - 340:Src/main.c **** } - 10905 .loc 1 340 4 is_stmt 1 view .LVU3444 - 340:Src/main.c **** } - 10906 .loc 1 340 13 is_stmt 0 view .LVU3445 - 10907 00e6 6B4B ldr r3, .L679+8 - 10908 00e8 0122 movs r2, #1 - 10909 00ea 1A70 strb r2, [r3] - 10910 00ec 27E0 b .L587 - 10911 .L605: - 350:Src/main.c **** task.current_param = task.min_param; - 10912 .loc 1 350 6 is_stmt 1 view .LVU3446 - 350:Src/main.c **** task.current_param = task.min_param; - 10913 .loc 1 350 20 is_stmt 0 view .LVU3447 - 10914 00ee 6C4B ldr r3, .L679+20 - 10915 00f0 0022 movs r2, #0 - 10916 00f2 1A70 strb r2, [r3] - 351:Src/main.c **** Stop_TIM10(); - 10917 .loc 1 351 6 is_stmt 1 view .LVU3448 - 351:Src/main.c **** Stop_TIM10(); - 10918 .loc 1 351 31 is_stmt 0 view .LVU3449 - 10919 00f4 6B4B ldr r3, .L679+24 - 10920 00f6 5A68 ldr r2, [r3, #4] @ float - 351:Src/main.c **** Stop_TIM10(); - 10921 .loc 1 351 25 view .LVU3450 - 10922 00f8 1A61 str r2, [r3, #16] @ float - 352:Src/main.c **** break; - 10923 .loc 1 352 6 is_stmt 1 view .LVU3451 - 10924 00fa FFF7FEFF bl Stop_TIM10 - 10925 .LVL985: - 353:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 10926 .loc 1 353 5 view .LVU3452 - 10927 .L591: - ARM GAS /tmp/ccEQxcUB.s page 600 + 9725 .loc 2 1900 43 view .LVU3036 + 9726 .LBE669: + 9727 .LBE668: +2045:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 9728 .loc 1 2045 3 is_stmt 1 view .LVU3037 +2045:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 9729 .loc 1 2045 29 is_stmt 0 view .LVU3038 + 9730 0134 4FF4E133 mov r3, #115200 + 9731 0138 2D93 str r3, [sp, #180] +2046:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 9732 .loc 1 2046 3 is_stmt 1 view .LVU3039 +2046:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 9733 .loc 1 2046 30 is_stmt 0 view .LVU3040 + 9734 013a 2E94 str r4, [sp, #184] +2047:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 9735 .loc 1 2047 3 is_stmt 1 view .LVU3041 +2047:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 9736 .loc 1 2047 29 is_stmt 0 view .LVU3042 + 9737 013c 2F94 str r4, [sp, #188] +2048:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 9738 .loc 1 2048 3 is_stmt 1 view .LVU3043 +2048:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + ARM GAS /tmp/ccuHnxNu.s page 573 - 970:Src/main.c **** { - 10928 .loc 1 970 3 view .LVU3453 - 10929 00fe 6A4B ldr r3, .L679+28 - 10930 0100 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 10931 0102 022B cmp r3, #2 - 10932 0104 00F0F384 beq .L648 - 10933 0108 032B cmp r3, #3 - 10934 010a 00F02685 beq .L664 - 10935 010e 012B cmp r3, #1 - 10936 0110 09D1 bne .L650 - 973:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 10937 .loc 1 973 5 view .LVU3454 - 10938 0112 664C ldr r4, .L679+32 - 10939 0114 0221 movs r1, #2 - 10940 0116 2046 mov r0, r4 - 10941 0118 FFF7FEFF bl USART_TX - 10942 .LVL986: - 975:Src/main.c **** State_Data[1]=0;//All OK! - 10943 .loc 1 975 5 view .LVU3455 - 975:Src/main.c **** State_Data[1]=0;//All OK! - 10944 .loc 1 975 18 is_stmt 0 view .LVU3456 - 10945 011c 0023 movs r3, #0 - 10946 011e 2370 strb r3, [r4] - 976:Src/main.c **** UART_transmission_request = NO_MESS; - 10947 .loc 1 976 5 is_stmt 1 view .LVU3457 - 976:Src/main.c **** UART_transmission_request = NO_MESS; - 10948 .loc 1 976 18 is_stmt 0 view .LVU3458 - 10949 0120 6370 strb r3, [r4, #1] - 977:Src/main.c **** break; - 10950 .loc 1 977 5 is_stmt 1 view .LVU3459 - 977:Src/main.c **** break; - 10951 .loc 1 977 31 is_stmt 0 view .LVU3460 - 10952 0122 614A ldr r2, .L679+28 - 10953 0124 1370 strb r3, [r2] - 978:Src/main.c **** case MESS_02://Transmith packet - 10954 .loc 1 978 4 is_stmt 1 view .LVU3461 - 10955 .L650: -1012:Src/main.c **** { - 10956 .loc 1 1012 5 view .LVU3462 -1012:Src/main.c **** { - 10957 .loc 1 1012 17 is_stmt 0 view .LVU3463 - 10958 0126 624B ldr r3, .L679+36 - 10959 0128 1B78 ldrb r3, [r3] @ zero_extendqisi2 -1012:Src/main.c **** { - 10960 .loc 1 1012 8 view .LVU3464 - 10961 012a 012B cmp r3, #1 - 10962 012c 00F01785 beq .L667 - 10963 .L586: - 330:Src/main.c **** { - 10964 .loc 1 330 3 is_stmt 1 view .LVU3465 - 332:Src/main.c **** { - 10965 .loc 1 332 3 view .LVU3466 - 332:Src/main.c **** { - 10966 .loc 1 332 8 is_stmt 0 view .LVU3467 - 10967 0130 4FF48071 mov r1, #256 - 10968 0134 5F48 ldr r0, .L679+40 - 10969 0136 FFF7FEFF bl HAL_GPIO_ReadPin - ARM GAS /tmp/ccEQxcUB.s page 601 + 9739 .loc 1 2048 27 is_stmt 0 view .LVU3044 + 9740 013e 3094 str r4, [sp, #192] +2049:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 9741 .loc 1 2049 3 is_stmt 1 view .LVU3045 +2049:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 9742 .loc 1 2049 38 is_stmt 0 view .LVU3046 + 9743 0140 0C23 movs r3, #12 + 9744 0142 3193 str r3, [sp, #196] +2050:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 9745 .loc 1 2050 3 is_stmt 1 view .LVU3047 +2050:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 9746 .loc 1 2050 40 is_stmt 0 view .LVU3048 + 9747 0144 3294 str r4, [sp, #200] +2051:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 9748 .loc 1 2051 3 is_stmt 1 view .LVU3049 +2051:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 9749 .loc 1 2051 33 is_stmt 0 view .LVU3050 + 9750 0146 3394 str r4, [sp, #204] +2052:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); + 9751 .loc 1 2052 3 is_stmt 1 view .LVU3051 + 9752 0148 04F18044 add r4, r4, #1073741824 + 9753 014c 04F58834 add r4, r4, #69632 + 9754 0150 2DA9 add r1, sp, #180 + 9755 0152 2046 mov r0, r4 + 9756 0154 FFF7FEFF bl LL_USART_Init + 9757 .LVL897: +2053:Src/main.c **** LL_USART_Enable(USART1); + 9758 .loc 1 2053 3 view .LVU3052 + 9759 .LBB670: + 9760 .LBI670: +2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + 9761 .loc 7 2320 22 view .LVU3053 + 9762 .LBB671: +2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); + 9763 .loc 7 2326 3 view .LVU3054 + 9764 0158 6368 ldr r3, [r4, #4] + 9765 015a 23F49043 bic r3, r3, #18432 + 9766 015e 6360 str r3, [r4, #4] +2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9767 .loc 7 2327 3 view .LVU3055 + 9768 0160 A368 ldr r3, [r4, #8] + 9769 0162 23F02A03 bic r3, r3, #42 + 9770 0166 A360 str r3, [r4, #8] + 9771 .LVL898: +2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9772 .loc 7 2327 3 is_stmt 0 view .LVU3056 + 9773 .LBE671: + 9774 .LBE670: +2054:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ + 9775 .loc 1 2054 3 is_stmt 1 view .LVU3057 + 9776 .LBB672: + 9777 .LBI672: + 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + 9778 .loc 7 560 22 view .LVU3058 + 9779 .LBB673: + 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9780 .loc 7 562 3 view .LVU3059 + ARM GAS /tmp/ccuHnxNu.s page 574 - 10970 .LVL987: - 332:Src/main.c **** { - 10971 .loc 1 332 6 discriminator 1 view .LVU3468 - 10972 013a 0128 cmp r0, #1 - 10973 013c ABD0 beq .L668 - 10974 .L587: - 347:Src/main.c **** { - 10975 .loc 1 347 4 is_stmt 1 view .LVU3469 - 10976 013e 5E4B ldr r3, .L679+44 - 10977 0140 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 10978 0142 0C2B cmp r3, #12 - 10979 0144 DBD8 bhi .L591 - 10980 0146 01A2 adr r2, .L593 - 10981 0148 52F823F0 ldr pc, [r2, r3, lsl #2] - 10982 .p2align 2 - 10983 .L593: - 10984 014c EF000000 .word .L605+1 - 10985 0150 81010000 .word .L604+1 - 10986 0154 EB010000 .word .L603+1 - 10987 0158 21020000 .word .L602+1 - 10988 015c 51020000 .word .L601+1 - 10989 0160 61020000 .word .L600+1 - 10990 0164 7D020000 .word .L599+1 - 10991 0168 E5020000 .word .L598+1 - 10992 016c 1B060000 .word .L597+1 - 10993 0170 61060000 .word .L596+1 - 10994 0174 39040000 .word .L595+1 - 10995 0178 15050000 .word .L594+1 - 10996 017c 65050000 .word .L592+1 - 10997 .p2align 1 - 10998 .L604: - 355:Src/main.c **** if (CheckChecksum(COMMAND)) - 10999 .loc 1 355 6 view .LVU3470 - 355:Src/main.c **** if (CheckChecksum(COMMAND)) - 11000 .loc 1 355 18 is_stmt 0 view .LVU3471 - 11001 0180 4E4C ldr r4, .L679+48 - 11002 0182 0D21 movs r1, #13 - 11003 0184 2046 mov r0, r4 - 11004 0186 FFF7FEFF bl CalculateChecksum - 11005 .LVL988: - 355:Src/main.c **** if (CheckChecksum(COMMAND)) - 11006 .loc 1 355 16 discriminator 1 view .LVU3472 - 11007 018a 4D4B ldr r3, .L679+52 - 11008 018c 1880 strh r0, [r3] @ movhi - 356:Src/main.c **** { - 11009 .loc 1 356 6 is_stmt 1 view .LVU3473 - 356:Src/main.c **** { - 11010 .loc 1 356 10 is_stmt 0 view .LVU3474 - 11011 018e 2046 mov r0, r4 - 11012 0190 FFF7FEFF bl CheckChecksum - 11013 .LVL989: - 356:Src/main.c **** { - 11014 .loc 1 356 9 discriminator 1 view .LVU3475 - 11015 0194 70B9 cbnz r0, .L669 - 369:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 11016 .loc 1 369 7 is_stmt 1 view .LVU3476 - 369:Src/main.c **** CPU_state = DEFAULT_ENABLE; - ARM GAS /tmp/ccEQxcUB.s page 602 + 9781 0168 2368 ldr r3, [r4] + 9782 016a 43F00103 orr r3, r3, #1 + 9783 016e 2360 str r3, [r4] + 9784 .LVL899: + 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9785 .loc 7 562 3 is_stmt 0 view .LVU3060 + 9786 .LBE673: + 9787 .LBE672: +2059:Src/main.c **** + 9788 .loc 1 2059 1 view .LVU3061 + 9789 0170 34B0 add sp, sp, #208 + 9790 .LCFI89: + 9791 .cfi_remember_state + 9792 .cfi_def_cfa_offset 24 + 9793 @ sp needed + 9794 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 9795 .L523: + 9796 .LCFI90: + 9797 .cfi_restore_state +1990:Src/main.c **** } + 9798 .loc 1 1990 5 is_stmt 1 view .LVU3062 + 9799 0176 FFF7FEFF bl Error_Handler + 9800 .LVL900: + 9801 .L525: + 9802 017a 00BF .align 2 + 9803 .L524: + 9804 017c 00380240 .word 1073887232 + 9805 0180 00000240 .word 1073872896 + 9806 0184 00640240 .word 1073898496 + 9807 0188 00ED00E0 .word -536810240 + 9808 018c 00E100E0 .word -536813312 + 9809 .cfi_endproc + 9810 .LFE1205: + 9812 .section .text.MX_TIM10_Init,"ax",%progbits + 9813 .align 1 + 9814 .syntax unified + 9815 .thumb + 9816 .thumb_func + 9818 MX_TIM10_Init: + 9819 .LFB1201: +1792:Src/main.c **** + 9820 .loc 1 1792 1 view -0 + 9821 .cfi_startproc + 9822 @ args = 0, pretend = 0, frame = 0 + 9823 @ frame_needed = 0, uses_anonymous_args = 0 + 9824 0000 08B5 push {r3, lr} + 9825 .LCFI91: + 9826 .cfi_def_cfa_offset 8 + 9827 .cfi_offset 3, -8 + 9828 .cfi_offset 14, -4 +1801:Src/main.c **** htim10.Init.Prescaler = 183; + 9829 .loc 1 1801 3 view .LVU3064 +1801:Src/main.c **** htim10.Init.Prescaler = 183; + 9830 .loc 1 1801 19 is_stmt 0 view .LVU3065 + 9831 0002 0848 ldr r0, .L530 + 9832 0004 084B ldr r3, .L530+4 + 9833 0006 0360 str r3, [r0] + ARM GAS /tmp/ccuHnxNu.s page 575 - 11017 .loc 1 369 17 is_stmt 0 view .LVU3477 - 11018 0196 454A ldr r2, .L679+32 - 11019 0198 1378 ldrb r3, [r2] @ zero_extendqisi2 - 369:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 11020 .loc 1 369 21 view .LVU3478 - 11021 019a 43F00403 orr r3, r3, #4 - 11022 019e 1370 strb r3, [r2] - 370:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 11023 .loc 1 370 7 is_stmt 1 view .LVU3479 - 370:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 11024 .loc 1 370 17 is_stmt 0 view .LVU3480 - 11025 01a0 454B ldr r3, .L679+44 - 11026 01a2 0222 movs r2, #2 - 11027 01a4 1A70 strb r2, [r3] - 371:Src/main.c **** } - 11028 .loc 1 371 7 is_stmt 1 view .LVU3481 - 371:Src/main.c **** } - 11029 .loc 1 371 21 is_stmt 0 view .LVU3482 - 11030 01a6 3E4B ldr r3, .L679+20 - 11031 01a8 0022 movs r2, #0 - 11032 01aa 1A70 strb r2, [r3] - 11033 .L607: - 373:Src/main.c **** break; - 11034 .loc 1 373 6 is_stmt 1 view .LVU3483 - 373:Src/main.c **** break; - 11035 .loc 1 373 32 is_stmt 0 view .LVU3484 - 11036 01ac 3E4B ldr r3, .L679+28 - 11037 01ae 0122 movs r2, #1 - 11038 01b0 1A70 strb r2, [r3] - 374:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 11039 .loc 1 374 5 is_stmt 1 view .LVU3485 - 11040 01b2 A4E7 b .L591 - 11041 .L669: - 358:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 11042 .loc 1 358 7 view .LVU3486 - 11043 .LVL990: - 11044 .LBB695: - 11045 .LBI695: +1802:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 9834 .loc 1 1802 3 is_stmt 1 view .LVU3066 +1802:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 9835 .loc 1 1802 25 is_stmt 0 view .LVU3067 + 9836 0008 B723 movs r3, #183 + 9837 000a 4360 str r3, [r0, #4] +1803:Src/main.c **** htim10.Init.Period = 9; + 9838 .loc 1 1803 3 is_stmt 1 view .LVU3068 +1803:Src/main.c **** htim10.Init.Period = 9; + 9839 .loc 1 1803 27 is_stmt 0 view .LVU3069 + 9840 000c 0023 movs r3, #0 + 9841 000e 8360 str r3, [r0, #8] +1804:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9842 .loc 1 1804 3 is_stmt 1 view .LVU3070 +1804:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9843 .loc 1 1804 22 is_stmt 0 view .LVU3071 + 9844 0010 0922 movs r2, #9 + 9845 0012 C260 str r2, [r0, #12] +1805:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9846 .loc 1 1805 3 is_stmt 1 view .LVU3072 +1805:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9847 .loc 1 1805 29 is_stmt 0 view .LVU3073 + 9848 0014 0361 str r3, [r0, #16] +1806:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 9849 .loc 1 1806 3 is_stmt 1 view .LVU3074 +1806:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 9850 .loc 1 1806 33 is_stmt 0 view .LVU3075 + 9851 0016 8361 str r3, [r0, #24] +1807:Src/main.c **** { + 9852 .loc 1 1807 3 is_stmt 1 view .LVU3076 +1807:Src/main.c **** { + 9853 .loc 1 1807 7 is_stmt 0 view .LVU3077 + 9854 0018 FFF7FEFF bl HAL_TIM_Base_Init + 9855 .LVL901: +1807:Src/main.c **** { + 9856 .loc 1 1807 6 discriminator 1 view .LVU3078 + 9857 001c 00B9 cbnz r0, .L529 +1815:Src/main.c **** + 9858 .loc 1 1815 1 view .LVU3079 + 9859 001e 08BD pop {r3, pc} + 9860 .L529: +1809:Src/main.c **** } + 9861 .loc 1 1809 5 is_stmt 1 view .LVU3080 + 9862 0020 FFF7FEFF bl Error_Handler + 9863 .LVL902: + 9864 .L531: + 9865 .align 2 + 9866 .L530: + 9867 0024 00000000 .word htim10 + 9868 0028 00440140 .word 1073824768 + 9869 .cfi_endproc + 9870 .LFE1201: + 9872 .section .text.MX_UART8_Init,"ax",%progbits + 9873 .align 1 + 9874 .syntax unified + 9875 .thumb + 9876 .thumb_func + ARM GAS /tmp/ccuHnxNu.s page 576 + + + 9878 MX_UART8_Init: + 9879 .LFB1204: +1938:Src/main.c **** + 9880 .loc 1 1938 1 view -0 + 9881 .cfi_startproc + 9882 @ args = 0, pretend = 0, frame = 0 + 9883 @ frame_needed = 0, uses_anonymous_args = 0 + 9884 0000 08B5 push {r3, lr} + 9885 .LCFI92: + 9886 .cfi_def_cfa_offset 8 + 9887 .cfi_offset 3, -8 + 9888 .cfi_offset 14, -4 +1947:Src/main.c **** huart8.Init.BaudRate = 115200; + 9889 .loc 1 1947 3 view .LVU3082 +1947:Src/main.c **** huart8.Init.BaudRate = 115200; + 9890 .loc 1 1947 19 is_stmt 0 view .LVU3083 + 9891 0002 0B48 ldr r0, .L536 + 9892 0004 0B4B ldr r3, .L536+4 + 9893 0006 0360 str r3, [r0] +1948:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 9894 .loc 1 1948 3 is_stmt 1 view .LVU3084 +1948:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 9895 .loc 1 1948 24 is_stmt 0 view .LVU3085 + 9896 0008 4FF4E133 mov r3, #115200 + 9897 000c 4360 str r3, [r0, #4] +1949:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 9898 .loc 1 1949 3 is_stmt 1 view .LVU3086 +1949:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 9899 .loc 1 1949 26 is_stmt 0 view .LVU3087 + 9900 000e 0023 movs r3, #0 + 9901 0010 8360 str r3, [r0, #8] +1950:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 9902 .loc 1 1950 3 is_stmt 1 view .LVU3088 +1950:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 9903 .loc 1 1950 24 is_stmt 0 view .LVU3089 + 9904 0012 C360 str r3, [r0, #12] +1951:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 9905 .loc 1 1951 3 is_stmt 1 view .LVU3090 +1951:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 9906 .loc 1 1951 22 is_stmt 0 view .LVU3091 + 9907 0014 0361 str r3, [r0, #16] +1952:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 9908 .loc 1 1952 3 is_stmt 1 view .LVU3092 +1952:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 9909 .loc 1 1952 20 is_stmt 0 view .LVU3093 + 9910 0016 0C22 movs r2, #12 + 9911 0018 4261 str r2, [r0, #20] +1953:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 9912 .loc 1 1953 3 is_stmt 1 view .LVU3094 +1953:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 9913 .loc 1 1953 25 is_stmt 0 view .LVU3095 + 9914 001a 8361 str r3, [r0, #24] +1954:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 9915 .loc 1 1954 3 is_stmt 1 view .LVU3096 +1954:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 9916 .loc 1 1954 28 is_stmt 0 view .LVU3097 + 9917 001c C361 str r3, [r0, #28] + ARM GAS /tmp/ccuHnxNu.s page 577 + + +1955:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 9918 .loc 1 1955 3 is_stmt 1 view .LVU3098 +1955:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 9919 .loc 1 1955 30 is_stmt 0 view .LVU3099 + 9920 001e 0362 str r3, [r0, #32] +1956:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 9921 .loc 1 1956 3 is_stmt 1 view .LVU3100 +1956:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 9922 .loc 1 1956 38 is_stmt 0 view .LVU3101 + 9923 0020 4362 str r3, [r0, #36] +1957:Src/main.c **** { + 9924 .loc 1 1957 3 is_stmt 1 view .LVU3102 +1957:Src/main.c **** { + 9925 .loc 1 1957 7 is_stmt 0 view .LVU3103 + 9926 0022 FFF7FEFF bl HAL_UART_Init + 9927 .LVL903: +1957:Src/main.c **** { + 9928 .loc 1 1957 6 discriminator 1 view .LVU3104 + 9929 0026 00B9 cbnz r0, .L535 +1965:Src/main.c **** + 9930 .loc 1 1965 1 view .LVU3105 + 9931 0028 08BD pop {r3, pc} + 9932 .L535: +1959:Src/main.c **** } + 9933 .loc 1 1959 5 is_stmt 1 view .LVU3106 + 9934 002a FFF7FEFF bl Error_Handler + 9935 .LVL904: + 9936 .L537: + 9937 002e 00BF .align 2 + 9938 .L536: + 9939 0030 00000000 .word huart8 + 9940 0034 007C0040 .word 1073773568 + 9941 .cfi_endproc + 9942 .LFE1204: + 9944 .section .text.MX_TIM8_Init,"ax",%progbits + 9945 .align 1 + 9946 .syntax unified + 9947 .thumb + 9948 .thumb_func + 9950 MX_TIM8_Init: + 9951 .LFB1200: +1745:Src/main.c **** + 9952 .loc 1 1745 1 view -0 + 9953 .cfi_startproc + 9954 @ args = 0, pretend = 0, frame = 32 + 9955 @ frame_needed = 0, uses_anonymous_args = 0 + 9956 0000 00B5 push {lr} + 9957 .LCFI93: + 9958 .cfi_def_cfa_offset 4 + 9959 .cfi_offset 14, -4 + 9960 0002 89B0 sub sp, sp, #36 + 9961 .LCFI94: + 9962 .cfi_def_cfa_offset 40 +1751:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 9963 .loc 1 1751 3 view .LVU3108 +1751:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 9964 .loc 1 1751 26 is_stmt 0 view .LVU3109 + ARM GAS /tmp/ccuHnxNu.s page 578 + + + 9965 0004 0023 movs r3, #0 + 9966 0006 0493 str r3, [sp, #16] + 9967 0008 0593 str r3, [sp, #20] + 9968 000a 0693 str r3, [sp, #24] + 9969 000c 0793 str r3, [sp, #28] +1752:Src/main.c **** + 9970 .loc 1 1752 3 is_stmt 1 view .LVU3110 +1752:Src/main.c **** + 9971 .loc 1 1752 27 is_stmt 0 view .LVU3111 + 9972 000e 0193 str r3, [sp, #4] + 9973 0010 0293 str r3, [sp, #8] + 9974 0012 0393 str r3, [sp, #12] +1757:Src/main.c **** htim8.Init.Prescaler = 0; + 9975 .loc 1 1757 3 is_stmt 1 view .LVU3112 +1757:Src/main.c **** htim8.Init.Prescaler = 0; + 9976 .loc 1 1757 18 is_stmt 0 view .LVU3113 + 9977 0014 1348 ldr r0, .L546 + 9978 0016 144A ldr r2, .L546+4 + 9979 0018 0260 str r2, [r0] +1758:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 9980 .loc 1 1758 3 is_stmt 1 view .LVU3114 +1758:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 9981 .loc 1 1758 24 is_stmt 0 view .LVU3115 + 9982 001a 4360 str r3, [r0, #4] +1759:Src/main.c **** htim8.Init.Period = 91; + 9983 .loc 1 1759 3 is_stmt 1 view .LVU3116 +1759:Src/main.c **** htim8.Init.Period = 91; + 9984 .loc 1 1759 26 is_stmt 0 view .LVU3117 + 9985 001c 8360 str r3, [r0, #8] +1760:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9986 .loc 1 1760 3 is_stmt 1 view .LVU3118 +1760:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9987 .loc 1 1760 21 is_stmt 0 view .LVU3119 + 9988 001e 5B22 movs r2, #91 + 9989 0020 C260 str r2, [r0, #12] +1761:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 9990 .loc 1 1761 3 is_stmt 1 view .LVU3120 +1761:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 9991 .loc 1 1761 28 is_stmt 0 view .LVU3121 + 9992 0022 0361 str r3, [r0, #16] +1762:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9993 .loc 1 1762 3 is_stmt 1 view .LVU3122 +1762:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9994 .loc 1 1762 32 is_stmt 0 view .LVU3123 + 9995 0024 4361 str r3, [r0, #20] +1763:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 9996 .loc 1 1763 3 is_stmt 1 view .LVU3124 +1763:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 9997 .loc 1 1763 32 is_stmt 0 view .LVU3125 + 9998 0026 8361 str r3, [r0, #24] +1764:Src/main.c **** { + 9999 .loc 1 1764 3 is_stmt 1 view .LVU3126 +1764:Src/main.c **** { + 10000 .loc 1 1764 7 is_stmt 0 view .LVU3127 + 10001 0028 FFF7FEFF bl HAL_TIM_Base_Init + 10002 .LVL905: +1764:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 579 + + + 10003 .loc 1 1764 6 discriminator 1 view .LVU3128 + 10004 002c 98B9 cbnz r0, .L543 +1768:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 10005 .loc 1 1768 3 is_stmt 1 view .LVU3129 +1768:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 10006 .loc 1 1768 34 is_stmt 0 view .LVU3130 + 10007 002e 4FF48053 mov r3, #4096 + 10008 0032 0493 str r3, [sp, #16] +1769:Src/main.c **** { + 10009 .loc 1 1769 3 is_stmt 1 view .LVU3131 +1769:Src/main.c **** { + 10010 .loc 1 1769 7 is_stmt 0 view .LVU3132 + 10011 0034 04A9 add r1, sp, #16 + 10012 0036 0B48 ldr r0, .L546 + 10013 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource + 10014 .LVL906: +1769:Src/main.c **** { + 10015 .loc 1 1769 6 discriminator 1 view .LVU3133 + 10016 003c 68B9 cbnz r0, .L544 +1773:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 10017 .loc 1 1773 3 is_stmt 1 view .LVU3134 +1773:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 10018 .loc 1 1773 37 is_stmt 0 view .LVU3135 + 10019 003e 0023 movs r3, #0 + 10020 0040 0193 str r3, [sp, #4] +1774:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10021 .loc 1 1774 3 is_stmt 1 view .LVU3136 +1774:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10022 .loc 1 1774 38 is_stmt 0 view .LVU3137 + 10023 0042 0293 str r3, [sp, #8] +1775:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 10024 .loc 1 1775 3 is_stmt 1 view .LVU3138 +1775:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 10025 .loc 1 1775 33 is_stmt 0 view .LVU3139 + 10026 0044 0393 str r3, [sp, #12] +1776:Src/main.c **** { + 10027 .loc 1 1776 3 is_stmt 1 view .LVU3140 +1776:Src/main.c **** { + 10028 .loc 1 1776 7 is_stmt 0 view .LVU3141 + 10029 0046 01A9 add r1, sp, #4 + 10030 0048 0648 ldr r0, .L546 + 10031 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 10032 .LVL907: +1776:Src/main.c **** { + 10033 .loc 1 1776 6 discriminator 1 view .LVU3142 + 10034 004e 30B9 cbnz r0, .L545 +1784:Src/main.c **** + 10035 .loc 1 1784 1 view .LVU3143 + 10036 0050 09B0 add sp, sp, #36 + 10037 .LCFI95: + 10038 .cfi_remember_state + 10039 .cfi_def_cfa_offset 4 + 10040 @ sp needed + 10041 0052 5DF804FB ldr pc, [sp], #4 + 10042 .L543: + 10043 .LCFI96: + 10044 .cfi_restore_state + ARM GAS /tmp/ccuHnxNu.s page 580 + + +1766:Src/main.c **** } + 10045 .loc 1 1766 5 is_stmt 1 view .LVU3144 + 10046 0056 FFF7FEFF bl Error_Handler + 10047 .LVL908: + 10048 .L544: +1771:Src/main.c **** } + 10049 .loc 1 1771 5 view .LVU3145 + 10050 005a FFF7FEFF bl Error_Handler + 10051 .LVL909: + 10052 .L545: +1778:Src/main.c **** } + 10053 .loc 1 1778 5 view .LVU3146 + 10054 005e FFF7FEFF bl Error_Handler + 10055 .LVL910: + 10056 .L547: + 10057 0062 00BF .align 2 + 10058 .L546: + 10059 0064 00000000 .word htim8 + 10060 0068 00040140 .word 1073808384 + 10061 .cfi_endproc + 10062 .LFE1200: + 10064 .section .text.MX_TIM11_Init,"ax",%progbits + 10065 .align 1 + 10066 .syntax unified + 10067 .thumb + 10068 .thumb_func + 10070 MX_TIM11_Init: + 10071 .LFB1202: +1823:Src/main.c **** + 10072 .loc 1 1823 1 view -0 + 10073 .cfi_startproc + 10074 @ args = 0, pretend = 0, frame = 32 + 10075 @ frame_needed = 0, uses_anonymous_args = 0 + 10076 0000 00B5 push {lr} + 10077 .LCFI97: + 10078 .cfi_def_cfa_offset 4 + 10079 .cfi_offset 14, -4 + 10080 0002 89B0 sub sp, sp, #36 + 10081 .LCFI98: + 10082 .cfi_def_cfa_offset 40 +1829:Src/main.c **** + 10083 .loc 1 1829 3 view .LVU3148 +1829:Src/main.c **** + 10084 .loc 1 1829 22 is_stmt 0 view .LVU3149 + 10085 0004 0023 movs r3, #0 + 10086 0006 0193 str r3, [sp, #4] + 10087 0008 0293 str r3, [sp, #8] + 10088 000a 0393 str r3, [sp, #12] + 10089 000c 0493 str r3, [sp, #16] + 10090 000e 0593 str r3, [sp, #20] + 10091 0010 0693 str r3, [sp, #24] + 10092 0012 0793 str r3, [sp, #28] +1834:Src/main.c **** htim11.Init.Prescaler = 1; + 10093 .loc 1 1834 3 is_stmt 1 view .LVU3150 +1834:Src/main.c **** htim11.Init.Prescaler = 1; + 10094 .loc 1 1834 19 is_stmt 0 view .LVU3151 + 10095 0014 1448 ldr r0, .L556 + ARM GAS /tmp/ccuHnxNu.s page 581 + + + 10096 0016 154A ldr r2, .L556+4 + 10097 0018 0260 str r2, [r0] +1835:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 10098 .loc 1 1835 3 is_stmt 1 view .LVU3152 +1835:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 10099 .loc 1 1835 25 is_stmt 0 view .LVU3153 + 10100 001a 0122 movs r2, #1 + 10101 001c 4260 str r2, [r0, #4] +1836:Src/main.c **** htim11.Init.Period = 91; + 10102 .loc 1 1836 3 is_stmt 1 view .LVU3154 +1836:Src/main.c **** htim11.Init.Period = 91; + 10103 .loc 1 1836 27 is_stmt 0 view .LVU3155 + 10104 001e 8360 str r3, [r0, #8] +1837:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10105 .loc 1 1837 3 is_stmt 1 view .LVU3156 +1837:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10106 .loc 1 1837 22 is_stmt 0 view .LVU3157 + 10107 0020 5B22 movs r2, #91 + 10108 0022 C260 str r2, [r0, #12] +1838:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 10109 .loc 1 1838 3 is_stmt 1 view .LVU3158 +1838:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 10110 .loc 1 1838 29 is_stmt 0 view .LVU3159 + 10111 0024 0361 str r3, [r0, #16] +1839:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 10112 .loc 1 1839 3 is_stmt 1 view .LVU3160 +1839:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 10113 .loc 1 1839 33 is_stmt 0 view .LVU3161 + 10114 0026 8023 movs r3, #128 + 10115 0028 8361 str r3, [r0, #24] +1840:Src/main.c **** { + 10116 .loc 1 1840 3 is_stmt 1 view .LVU3162 +1840:Src/main.c **** { + 10117 .loc 1 1840 7 is_stmt 0 view .LVU3163 + 10118 002a FFF7FEFF bl HAL_TIM_Base_Init + 10119 .LVL911: +1840:Src/main.c **** { + 10120 .loc 1 1840 6 discriminator 1 view .LVU3164 + 10121 002e A8B9 cbnz r0, .L553 +1844:Src/main.c **** { + 10122 .loc 1 1844 3 is_stmt 1 view .LVU3165 +1844:Src/main.c **** { + 10123 .loc 1 1844 7 is_stmt 0 view .LVU3166 + 10124 0030 0D48 ldr r0, .L556 + 10125 0032 FFF7FEFF bl HAL_TIM_PWM_Init + 10126 .LVL912: +1844:Src/main.c **** { + 10127 .loc 1 1844 6 discriminator 1 view .LVU3167 + 10128 0036 98B9 cbnz r0, .L554 +1848:Src/main.c **** sConfigOC.Pulse = 91; + 10129 .loc 1 1848 3 is_stmt 1 view .LVU3168 +1848:Src/main.c **** sConfigOC.Pulse = 91; + 10130 .loc 1 1848 20 is_stmt 0 view .LVU3169 + 10131 0038 6023 movs r3, #96 + 10132 003a 0193 str r3, [sp, #4] +1849:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10133 .loc 1 1849 3 is_stmt 1 view .LVU3170 + ARM GAS /tmp/ccuHnxNu.s page 582 + + +1849:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10134 .loc 1 1849 19 is_stmt 0 view .LVU3171 + 10135 003c 5B23 movs r3, #91 + 10136 003e 0293 str r3, [sp, #8] +1850:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10137 .loc 1 1850 3 is_stmt 1 view .LVU3172 +1850:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10138 .loc 1 1850 24 is_stmt 0 view .LVU3173 + 10139 0040 0022 movs r2, #0 + 10140 0042 0392 str r2, [sp, #12] +1851:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10141 .loc 1 1851 3 is_stmt 1 view .LVU3174 +1851:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10142 .loc 1 1851 24 is_stmt 0 view .LVU3175 + 10143 0044 0592 str r2, [sp, #20] +1852:Src/main.c **** { + 10144 .loc 1 1852 3 is_stmt 1 view .LVU3176 +1852:Src/main.c **** { + 10145 .loc 1 1852 7 is_stmt 0 view .LVU3177 + 10146 0046 01A9 add r1, sp, #4 + 10147 0048 0748 ldr r0, .L556 + 10148 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 10149 .LVL913: +1852:Src/main.c **** { + 10150 .loc 1 1852 6 discriminator 1 view .LVU3178 + 10151 004e 48B9 cbnz r0, .L555 +1859:Src/main.c **** + 10152 .loc 1 1859 3 is_stmt 1 view .LVU3179 + 10153 0050 0548 ldr r0, .L556 + 10154 0052 FFF7FEFF bl HAL_TIM_MspPostInit + 10155 .LVL914: +1861:Src/main.c **** + 10156 .loc 1 1861 1 is_stmt 0 view .LVU3180 + 10157 0056 09B0 add sp, sp, #36 + 10158 .LCFI99: + 10159 .cfi_remember_state + 10160 .cfi_def_cfa_offset 4 + 10161 @ sp needed + 10162 0058 5DF804FB ldr pc, [sp], #4 + 10163 .L553: + 10164 .LCFI100: + 10165 .cfi_restore_state +1842:Src/main.c **** } + 10166 .loc 1 1842 5 is_stmt 1 view .LVU3181 + 10167 005c FFF7FEFF bl Error_Handler + 10168 .LVL915: + 10169 .L554: +1846:Src/main.c **** } + 10170 .loc 1 1846 5 view .LVU3182 + 10171 0060 FFF7FEFF bl Error_Handler + 10172 .LVL916: + 10173 .L555: +1854:Src/main.c **** } + 10174 .loc 1 1854 5 view .LVU3183 + 10175 0064 FFF7FEFF bl Error_Handler + 10176 .LVL917: + 10177 .L557: + ARM GAS /tmp/ccuHnxNu.s page 583 + + + 10178 .align 2 + 10179 .L556: + 10180 0068 00000000 .word htim11 + 10181 006c 00480140 .word 1073825792 + 10182 .cfi_endproc + 10183 .LFE1202: + 10185 .section .text.MX_TIM4_Init,"ax",%progbits + 10186 .align 1 + 10187 .syntax unified + 10188 .thumb + 10189 .thumb_func + 10191 MX_TIM4_Init: + 10192 .LFB1196: +1573:Src/main.c **** + 10193 .loc 1 1573 1 view -0 + 10194 .cfi_startproc + 10195 @ args = 0, pretend = 0, frame = 56 + 10196 @ frame_needed = 0, uses_anonymous_args = 0 + 10197 0000 00B5 push {lr} + 10198 .LCFI101: + 10199 .cfi_def_cfa_offset 4 + 10200 .cfi_offset 14, -4 + 10201 0002 8FB0 sub sp, sp, #60 + 10202 .LCFI102: + 10203 .cfi_def_cfa_offset 64 +1579:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 10204 .loc 1 1579 3 view .LVU3185 +1579:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 10205 .loc 1 1579 26 is_stmt 0 view .LVU3186 + 10206 0004 0023 movs r3, #0 + 10207 0006 0A93 str r3, [sp, #40] + 10208 0008 0B93 str r3, [sp, #44] + 10209 000a 0C93 str r3, [sp, #48] + 10210 000c 0D93 str r3, [sp, #52] +1580:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10211 .loc 1 1580 3 is_stmt 1 view .LVU3187 +1580:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10212 .loc 1 1580 27 is_stmt 0 view .LVU3188 + 10213 000e 0793 str r3, [sp, #28] + 10214 0010 0893 str r3, [sp, #32] + 10215 0012 0993 str r3, [sp, #36] +1581:Src/main.c **** + 10216 .loc 1 1581 3 is_stmt 1 view .LVU3189 +1581:Src/main.c **** + 10217 .loc 1 1581 22 is_stmt 0 view .LVU3190 + 10218 0014 0093 str r3, [sp] + 10219 0016 0193 str r3, [sp, #4] + 10220 0018 0293 str r3, [sp, #8] + 10221 001a 0393 str r3, [sp, #12] + 10222 001c 0493 str r3, [sp, #16] + 10223 001e 0593 str r3, [sp, #20] + 10224 0020 0693 str r3, [sp, #24] +1586:Src/main.c **** htim4.Init.Prescaler = 0; + 10225 .loc 1 1586 3 is_stmt 1 view .LVU3191 +1586:Src/main.c **** htim4.Init.Prescaler = 0; + 10226 .loc 1 1586 18 is_stmt 0 view .LVU3192 + 10227 0022 1E48 ldr r0, .L570 + ARM GAS /tmp/ccuHnxNu.s page 584 + + + 10228 0024 1E4A ldr r2, .L570+4 + 10229 0026 0260 str r2, [r0] +1587:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 10230 .loc 1 1587 3 is_stmt 1 view .LVU3193 +1587:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 10231 .loc 1 1587 24 is_stmt 0 view .LVU3194 + 10232 0028 4360 str r3, [r0, #4] +1588:Src/main.c **** htim4.Init.Period = 45; + 10233 .loc 1 1588 3 is_stmt 1 view .LVU3195 +1588:Src/main.c **** htim4.Init.Period = 45; + 10234 .loc 1 1588 26 is_stmt 0 view .LVU3196 + 10235 002a 8360 str r3, [r0, #8] +1589:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10236 .loc 1 1589 3 is_stmt 1 view .LVU3197 +1589:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10237 .loc 1 1589 21 is_stmt 0 view .LVU3198 + 10238 002c 2D22 movs r2, #45 + 10239 002e C260 str r2, [r0, #12] +1590:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10240 .loc 1 1590 3 is_stmt 1 view .LVU3199 +1590:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10241 .loc 1 1590 28 is_stmt 0 view .LVU3200 + 10242 0030 0361 str r3, [r0, #16] +1591:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 10243 .loc 1 1591 3 is_stmt 1 view .LVU3201 +1591:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 10244 .loc 1 1591 32 is_stmt 0 view .LVU3202 + 10245 0032 8361 str r3, [r0, #24] +1592:Src/main.c **** { + 10246 .loc 1 1592 3 is_stmt 1 view .LVU3203 +1592:Src/main.c **** { + 10247 .loc 1 1592 7 is_stmt 0 view .LVU3204 + 10248 0034 FFF7FEFF bl HAL_TIM_Base_Init + 10249 .LVL918: +1592:Src/main.c **** { + 10250 .loc 1 1592 6 discriminator 1 view .LVU3205 + 10251 0038 30BB cbnz r0, .L565 +1596:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 10252 .loc 1 1596 3 is_stmt 1 view .LVU3206 +1596:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 10253 .loc 1 1596 34 is_stmt 0 view .LVU3207 + 10254 003a 4FF48053 mov r3, #4096 + 10255 003e 0A93 str r3, [sp, #40] +1597:Src/main.c **** { + 10256 .loc 1 1597 3 is_stmt 1 view .LVU3208 +1597:Src/main.c **** { + 10257 .loc 1 1597 7 is_stmt 0 view .LVU3209 + 10258 0040 0AA9 add r1, sp, #40 + 10259 0042 1648 ldr r0, .L570 + 10260 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource + 10261 .LVL919: +1597:Src/main.c **** { + 10262 .loc 1 1597 6 discriminator 1 view .LVU3210 + 10263 0048 00BB cbnz r0, .L566 +1601:Src/main.c **** { + 10264 .loc 1 1601 3 is_stmt 1 view .LVU3211 +1601:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 585 + + + 10265 .loc 1 1601 7 is_stmt 0 view .LVU3212 + 10266 004a 1448 ldr r0, .L570 + 10267 004c FFF7FEFF bl HAL_TIM_PWM_Init + 10268 .LVL920: +1601:Src/main.c **** { + 10269 .loc 1 1601 6 discriminator 1 view .LVU3213 + 10270 0050 F0B9 cbnz r0, .L567 +1605:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10271 .loc 1 1605 3 is_stmt 1 view .LVU3214 +1605:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10272 .loc 1 1605 37 is_stmt 0 view .LVU3215 + 10273 0052 0023 movs r3, #0 + 10274 0054 0793 str r3, [sp, #28] +1606:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 10275 .loc 1 1606 3 is_stmt 1 view .LVU3216 +1606:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 10276 .loc 1 1606 33 is_stmt 0 view .LVU3217 + 10277 0056 0993 str r3, [sp, #36] +1607:Src/main.c **** { + 10278 .loc 1 1607 3 is_stmt 1 view .LVU3218 +1607:Src/main.c **** { + 10279 .loc 1 1607 7 is_stmt 0 view .LVU3219 + 10280 0058 07A9 add r1, sp, #28 + 10281 005a 1048 ldr r0, .L570 + 10282 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 10283 .LVL921: +1607:Src/main.c **** { + 10284 .loc 1 1607 6 discriminator 1 view .LVU3220 + 10285 0060 C0B9 cbnz r0, .L568 +1611:Src/main.c **** sConfigOC.Pulse = 22; + 10286 .loc 1 1611 3 is_stmt 1 view .LVU3221 +1611:Src/main.c **** sConfigOC.Pulse = 22; + 10287 .loc 1 1611 20 is_stmt 0 view .LVU3222 + 10288 0062 6023 movs r3, #96 + 10289 0064 0093 str r3, [sp] +1612:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10290 .loc 1 1612 3 is_stmt 1 view .LVU3223 +1612:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10291 .loc 1 1612 19 is_stmt 0 view .LVU3224 + 10292 0066 1623 movs r3, #22 + 10293 0068 0193 str r3, [sp, #4] +1613:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10294 .loc 1 1613 3 is_stmt 1 view .LVU3225 +1613:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10295 .loc 1 1613 24 is_stmt 0 view .LVU3226 + 10296 006a 0023 movs r3, #0 + 10297 006c 0293 str r3, [sp, #8] +1614:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 10298 .loc 1 1614 3 is_stmt 1 view .LVU3227 +1614:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 10299 .loc 1 1614 24 is_stmt 0 view .LVU3228 + 10300 006e 0493 str r3, [sp, #16] +1615:Src/main.c **** { + 10301 .loc 1 1615 3 is_stmt 1 view .LVU3229 +1615:Src/main.c **** { + 10302 .loc 1 1615 7 is_stmt 0 view .LVU3230 + 10303 0070 0822 movs r2, #8 + ARM GAS /tmp/ccuHnxNu.s page 586 + + + 10304 0072 6946 mov r1, sp + 10305 0074 0948 ldr r0, .L570 + 10306 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 10307 .LVL922: +1615:Src/main.c **** { + 10308 .loc 1 1615 6 discriminator 1 view .LVU3231 + 10309 007a 68B9 cbnz r0, .L569 +1622:Src/main.c **** + 10310 .loc 1 1622 3 is_stmt 1 view .LVU3232 + 10311 007c 0748 ldr r0, .L570 + 10312 007e FFF7FEFF bl HAL_TIM_MspPostInit + 10313 .LVL923: +1624:Src/main.c **** + 10314 .loc 1 1624 1 is_stmt 0 view .LVU3233 + 10315 0082 0FB0 add sp, sp, #60 + 10316 .LCFI103: + 10317 .cfi_remember_state + 10318 .cfi_def_cfa_offset 4 + 10319 @ sp needed + 10320 0084 5DF804FB ldr pc, [sp], #4 + 10321 .L565: + 10322 .LCFI104: + 10323 .cfi_restore_state +1594:Src/main.c **** } + 10324 .loc 1 1594 5 is_stmt 1 view .LVU3234 + 10325 0088 FFF7FEFF bl Error_Handler + 10326 .LVL924: + 10327 .L566: +1599:Src/main.c **** } + 10328 .loc 1 1599 5 view .LVU3235 + 10329 008c FFF7FEFF bl Error_Handler + 10330 .LVL925: + 10331 .L567: +1603:Src/main.c **** } + 10332 .loc 1 1603 5 view .LVU3236 + 10333 0090 FFF7FEFF bl Error_Handler + 10334 .LVL926: + 10335 .L568: +1609:Src/main.c **** } + 10336 .loc 1 1609 5 view .LVU3237 + 10337 0094 FFF7FEFF bl Error_Handler + 10338 .LVL927: + 10339 .L569: +1617:Src/main.c **** } + 10340 .loc 1 1617 5 view .LVU3238 + 10341 0098 FFF7FEFF bl Error_Handler + 10342 .LVL928: + 10343 .L571: + 10344 .align 2 + 10345 .L570: + 10346 009c 00000000 .word htim4 + 10347 00a0 00080040 .word 1073743872 + 10348 .cfi_endproc + 10349 .LFE1196: + 10351 .section .text.MX_TIM1_Init,"ax",%progbits + 10352 .align 1 + 10353 .syntax unified + ARM GAS /tmp/ccuHnxNu.s page 587 + + + 10354 .thumb + 10355 .thumb_func + 10357 MX_TIM1_Init: + 10358 .LFB1203: +1869:Src/main.c **** + 10359 .loc 1 1869 1 view -0 + 10360 .cfi_startproc + 10361 @ args = 0, pretend = 0, frame = 88 + 10362 @ frame_needed = 0, uses_anonymous_args = 0 + 10363 0000 10B5 push {r4, lr} + 10364 .LCFI105: + 10365 .cfi_def_cfa_offset 8 + 10366 .cfi_offset 4, -8 + 10367 .cfi_offset 14, -4 + 10368 0002 96B0 sub sp, sp, #88 + 10369 .LCFI106: + 10370 .cfi_def_cfa_offset 96 +1875:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10371 .loc 1 1875 3 view .LVU3240 +1875:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10372 .loc 1 1875 26 is_stmt 0 view .LVU3241 + 10373 0004 0024 movs r4, #0 + 10374 0006 1294 str r4, [sp, #72] + 10375 0008 1394 str r4, [sp, #76] + 10376 000a 1494 str r4, [sp, #80] + 10377 000c 1594 str r4, [sp, #84] +1876:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 10378 .loc 1 1876 3 is_stmt 1 view .LVU3242 +1876:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 10379 .loc 1 1876 22 is_stmt 0 view .LVU3243 + 10380 000e 0B94 str r4, [sp, #44] + 10381 0010 0C94 str r4, [sp, #48] + 10382 0012 0D94 str r4, [sp, #52] + 10383 0014 0E94 str r4, [sp, #56] + 10384 0016 0F94 str r4, [sp, #60] + 10385 0018 1094 str r4, [sp, #64] + 10386 001a 1194 str r4, [sp, #68] +1877:Src/main.c **** + 10387 .loc 1 1877 3 is_stmt 1 view .LVU3244 +1877:Src/main.c **** + 10388 .loc 1 1877 34 is_stmt 0 view .LVU3245 + 10389 001c 2C22 movs r2, #44 + 10390 001e 2146 mov r1, r4 + 10391 0020 6846 mov r0, sp + 10392 0022 FFF7FEFF bl memset + 10393 .LVL929: +1882:Src/main.c **** htim1.Init.Prescaler = 0; + 10394 .loc 1 1882 3 is_stmt 1 view .LVU3246 +1882:Src/main.c **** htim1.Init.Prescaler = 0; + 10395 .loc 1 1882 18 is_stmt 0 view .LVU3247 + 10396 0026 2548 ldr r0, .L584 + 10397 0028 254B ldr r3, .L584+4 + 10398 002a 0360 str r3, [r0] +1883:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + 10399 .loc 1 1883 3 is_stmt 1 view .LVU3248 +1883:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + 10400 .loc 1 1883 24 is_stmt 0 view .LVU3249 + ARM GAS /tmp/ccuHnxNu.s page 588 + + + 10401 002c 4460 str r4, [r0, #4] +1884:Src/main.c **** htim1.Init.Period = 8; + 10402 .loc 1 1884 3 is_stmt 1 view .LVU3250 +1884:Src/main.c **** htim1.Init.Period = 8; + 10403 .loc 1 1884 26 is_stmt 0 view .LVU3251 + 10404 002e 8460 str r4, [r0, #8] +1885:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10405 .loc 1 1885 3 is_stmt 1 view .LVU3252 +1885:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10406 .loc 1 1885 21 is_stmt 0 view .LVU3253 + 10407 0030 0823 movs r3, #8 + 10408 0032 C360 str r3, [r0, #12] +1886:Src/main.c **** htim1.Init.RepetitionCounter = 0; + 10409 .loc 1 1886 3 is_stmt 1 view .LVU3254 +1886:Src/main.c **** htim1.Init.RepetitionCounter = 0; + 10410 .loc 1 1886 28 is_stmt 0 view .LVU3255 + 10411 0034 0461 str r4, [r0, #16] +1887:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10412 .loc 1 1887 3 is_stmt 1 view .LVU3256 +1887:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10413 .loc 1 1887 32 is_stmt 0 view .LVU3257 + 10414 0036 4461 str r4, [r0, #20] +1888:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) + 10415 .loc 1 1888 3 is_stmt 1 view .LVU3258 +1888:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) + 10416 .loc 1 1888 32 is_stmt 0 view .LVU3259 + 10417 0038 8461 str r4, [r0, #24] +1889:Src/main.c **** { + 10418 .loc 1 1889 3 is_stmt 1 view .LVU3260 +1889:Src/main.c **** { + 10419 .loc 1 1889 7 is_stmt 0 view .LVU3261 + 10420 003a FFF7FEFF bl HAL_TIM_Base_Init + 10421 .LVL930: +1889:Src/main.c **** { + 10422 .loc 1 1889 6 discriminator 1 view .LVU3262 + 10423 003e 0028 cmp r0, #0 + 10424 0040 32D1 bne .L579 +1893:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) + 10425 .loc 1 1893 3 is_stmt 1 view .LVU3263 +1893:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) + 10426 .loc 1 1893 34 is_stmt 0 view .LVU3264 + 10427 0042 4FF48053 mov r3, #4096 + 10428 0046 1293 str r3, [sp, #72] +1894:Src/main.c **** { + 10429 .loc 1 1894 3 is_stmt 1 view .LVU3265 +1894:Src/main.c **** { + 10430 .loc 1 1894 7 is_stmt 0 view .LVU3266 + 10431 0048 12A9 add r1, sp, #72 + 10432 004a 1C48 ldr r0, .L584 + 10433 004c FFF7FEFF bl HAL_TIM_ConfigClockSource + 10434 .LVL931: +1894:Src/main.c **** { + 10435 .loc 1 1894 6 discriminator 1 view .LVU3267 + 10436 0050 0028 cmp r0, #0 + 10437 0052 2BD1 bne .L580 +1898:Src/main.c **** { + 10438 .loc 1 1898 3 is_stmt 1 view .LVU3268 + ARM GAS /tmp/ccuHnxNu.s page 589 + + +1898:Src/main.c **** { + 10439 .loc 1 1898 7 is_stmt 0 view .LVU3269 + 10440 0054 1948 ldr r0, .L584 + 10441 0056 FFF7FEFF bl HAL_TIM_PWM_Init + 10442 .LVL932: +1898:Src/main.c **** { + 10443 .loc 1 1898 6 discriminator 1 view .LVU3270 + 10444 005a 48BB cbnz r0, .L581 +1902:Src/main.c **** sConfigOC.Pulse = 4; + 10445 .loc 1 1902 3 is_stmt 1 view .LVU3271 +1902:Src/main.c **** sConfigOC.Pulse = 4; + 10446 .loc 1 1902 20 is_stmt 0 view .LVU3272 + 10447 005c 6023 movs r3, #96 + 10448 005e 0B93 str r3, [sp, #44] +1903:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10449 .loc 1 1903 3 is_stmt 1 view .LVU3273 +1903:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10450 .loc 1 1903 19 is_stmt 0 view .LVU3274 + 10451 0060 0423 movs r3, #4 + 10452 0062 0C93 str r3, [sp, #48] +1904:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10453 .loc 1 1904 3 is_stmt 1 view .LVU3275 +1904:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10454 .loc 1 1904 24 is_stmt 0 view .LVU3276 + 10455 0064 0022 movs r2, #0 + 10456 0066 0D92 str r2, [sp, #52] +1905:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10457 .loc 1 1905 3 is_stmt 1 view .LVU3277 +1905:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10458 .loc 1 1905 24 is_stmt 0 view .LVU3278 + 10459 0068 0F92 str r2, [sp, #60] +1906:Src/main.c **** { + 10460 .loc 1 1906 3 is_stmt 1 view .LVU3279 +1906:Src/main.c **** { + 10461 .loc 1 1906 7 is_stmt 0 view .LVU3280 + 10462 006a 0BA9 add r1, sp, #44 + 10463 006c 1348 ldr r0, .L584 + 10464 006e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 10465 .LVL933: +1906:Src/main.c **** { + 10466 .loc 1 1906 6 discriminator 1 view .LVU3281 + 10467 0072 F8B9 cbnz r0, .L582 +1910:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 10468 .loc 1 1910 3 is_stmt 1 view .LVU3282 +1910:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 10469 .loc 1 1910 40 is_stmt 0 view .LVU3283 + 10470 0074 0023 movs r3, #0 + 10471 0076 0093 str r3, [sp] +1911:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 10472 .loc 1 1911 3 is_stmt 1 view .LVU3284 +1911:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 10473 .loc 1 1911 41 is_stmt 0 view .LVU3285 + 10474 0078 0193 str r3, [sp, #4] +1912:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 10475 .loc 1 1912 3 is_stmt 1 view .LVU3286 +1912:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 10476 .loc 1 1912 34 is_stmt 0 view .LVU3287 + ARM GAS /tmp/ccuHnxNu.s page 590 + + + 10477 007a 0293 str r3, [sp, #8] +1913:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 10478 .loc 1 1913 3 is_stmt 1 view .LVU3288 +1913:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 10479 .loc 1 1913 33 is_stmt 0 view .LVU3289 + 10480 007c 0393 str r3, [sp, #12] +1914:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 10481 .loc 1 1914 3 is_stmt 1 view .LVU3290 +1914:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 10482 .loc 1 1914 35 is_stmt 0 view .LVU3291 + 10483 007e 0493 str r3, [sp, #16] +1915:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 10484 .loc 1 1915 3 is_stmt 1 view .LVU3292 +1915:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 10485 .loc 1 1915 38 is_stmt 0 view .LVU3293 + 10486 0080 4FF40052 mov r2, #8192 + 10487 0084 0592 str r2, [sp, #20] +1916:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 10488 .loc 1 1916 3 is_stmt 1 view .LVU3294 +1916:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 10489 .loc 1 1916 36 is_stmt 0 view .LVU3295 + 10490 0086 0693 str r3, [sp, #24] +1917:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 10491 .loc 1 1917 3 is_stmt 1 view .LVU3296 +1917:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 10492 .loc 1 1917 36 is_stmt 0 view .LVU3297 + 10493 0088 0793 str r3, [sp, #28] +1918:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; + 10494 .loc 1 1918 3 is_stmt 1 view .LVU3298 +1918:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; + 10495 .loc 1 1918 39 is_stmt 0 view .LVU3299 + 10496 008a 4FF00072 mov r2, #33554432 + 10497 008e 0892 str r2, [sp, #32] +1919:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 10498 .loc 1 1919 3 is_stmt 1 view .LVU3300 +1919:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 10499 .loc 1 1919 37 is_stmt 0 view .LVU3301 + 10500 0090 0993 str r3, [sp, #36] +1920:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 10501 .loc 1 1920 3 is_stmt 1 view .LVU3302 +1920:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 10502 .loc 1 1920 40 is_stmt 0 view .LVU3303 + 10503 0092 0A93 str r3, [sp, #40] +1921:Src/main.c **** { + 10504 .loc 1 1921 3 is_stmt 1 view .LVU3304 +1921:Src/main.c **** { + 10505 .loc 1 1921 7 is_stmt 0 view .LVU3305 + 10506 0094 6946 mov r1, sp + 10507 0096 0948 ldr r0, .L584 + 10508 0098 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime + 10509 .LVL934: +1921:Src/main.c **** { + 10510 .loc 1 1921 6 discriminator 1 view .LVU3306 + 10511 009c 60B9 cbnz r0, .L583 +1928:Src/main.c **** + 10512 .loc 1 1928 3 is_stmt 1 view .LVU3307 + 10513 009e 0748 ldr r0, .L584 + ARM GAS /tmp/ccuHnxNu.s page 591 + + + 10514 00a0 FFF7FEFF bl HAL_TIM_MspPostInit + 10515 .LVL935: +1930:Src/main.c **** + 10516 .loc 1 1930 1 is_stmt 0 view .LVU3308 + 10517 00a4 16B0 add sp, sp, #88 + 10518 .LCFI107: + 10519 .cfi_remember_state + 10520 .cfi_def_cfa_offset 8 + 10521 @ sp needed + 10522 00a6 10BD pop {r4, pc} + 10523 .L579: + 10524 .LCFI108: + 10525 .cfi_restore_state +1891:Src/main.c **** } + 10526 .loc 1 1891 5 is_stmt 1 view .LVU3309 + 10527 00a8 FFF7FEFF bl Error_Handler + 10528 .LVL936: + 10529 .L580: +1896:Src/main.c **** } + 10530 .loc 1 1896 5 view .LVU3310 + 10531 00ac FFF7FEFF bl Error_Handler + 10532 .LVL937: + 10533 .L581: +1900:Src/main.c **** } + 10534 .loc 1 1900 5 view .LVU3311 + 10535 00b0 FFF7FEFF bl Error_Handler + 10536 .LVL938: + 10537 .L582: +1908:Src/main.c **** } + 10538 .loc 1 1908 5 view .LVU3312 + 10539 00b4 FFF7FEFF bl Error_Handler + 10540 .LVL939: + 10541 .L583: +1923:Src/main.c **** } + 10542 .loc 1 1923 5 view .LVU3313 + 10543 00b8 FFF7FEFF bl Error_Handler + 10544 .LVL940: + 10545 .L585: + 10546 .align 2 + 10547 .L584: + 10548 00bc 00000000 .word htim1 + 10549 00c0 00000140 .word 1073807360 + 10550 .cfi_endproc + 10551 .LFE1203: + 10553 .section .text.SystemClock_Config,"ax",%progbits + 10554 .align 1 + 10555 .global SystemClock_Config + 10556 .syntax unified + 10557 .thumb + 10558 .thumb_func + 10560 SystemClock_Config: + 10561 .LFB1187: +1051:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 10562 .loc 1 1051 1 view -0 + 10563 .cfi_startproc + 10564 @ args = 0, pretend = 0, frame = 80 + 10565 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccuHnxNu.s page 592 + + + 10566 0000 00B5 push {lr} + 10567 .LCFI109: + 10568 .cfi_def_cfa_offset 4 + 10569 .cfi_offset 14, -4 + 10570 0002 95B0 sub sp, sp, #84 + 10571 .LCFI110: + 10572 .cfi_def_cfa_offset 88 +1052:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 10573 .loc 1 1052 3 view .LVU3315 +1052:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 10574 .loc 1 1052 22 is_stmt 0 view .LVU3316 + 10575 0004 3422 movs r2, #52 + 10576 0006 0021 movs r1, #0 + 10577 0008 07A8 add r0, sp, #28 + 10578 000a FFF7FEFF bl memset + 10579 .LVL941: +1053:Src/main.c **** + 10580 .loc 1 1053 3 is_stmt 1 view .LVU3317 +1053:Src/main.c **** + 10581 .loc 1 1053 22 is_stmt 0 view .LVU3318 + 10582 000e 0023 movs r3, #0 + 10583 0010 0293 str r3, [sp, #8] + 10584 0012 0393 str r3, [sp, #12] + 10585 0014 0493 str r3, [sp, #16] + 10586 0016 0593 str r3, [sp, #20] + 10587 0018 0693 str r3, [sp, #24] +1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 10588 .loc 1 1057 3 is_stmt 1 view .LVU3319 + 10589 .LBB674: +1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 10590 .loc 1 1057 3 view .LVU3320 +1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 10591 .loc 1 1057 3 view .LVU3321 + 10592 001a 244B ldr r3, .L594 + 10593 001c 1A6C ldr r2, [r3, #64] + 10594 001e 42F08052 orr r2, r2, #268435456 + 10595 0022 1A64 str r2, [r3, #64] +1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 10596 .loc 1 1057 3 view .LVU3322 + 10597 0024 1B6C ldr r3, [r3, #64] + 10598 0026 03F08053 and r3, r3, #268435456 + 10599 002a 0093 str r3, [sp] +1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 10600 .loc 1 1057 3 view .LVU3323 + 10601 002c 009B ldr r3, [sp] + 10602 .LBE674: +1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 10603 .loc 1 1057 3 view .LVU3324 +1058:Src/main.c **** + 10604 .loc 1 1058 3 view .LVU3325 + 10605 .LBB675: +1058:Src/main.c **** + 10606 .loc 1 1058 3 view .LVU3326 +1058:Src/main.c **** + 10607 .loc 1 1058 3 view .LVU3327 + 10608 002e 204B ldr r3, .L594+4 + 10609 0030 1A68 ldr r2, [r3] + ARM GAS /tmp/ccuHnxNu.s page 593 + + + 10610 0032 42F44042 orr r2, r2, #49152 + 10611 0036 1A60 str r2, [r3] +1058:Src/main.c **** + 10612 .loc 1 1058 3 view .LVU3328 + 10613 0038 1B68 ldr r3, [r3] + 10614 003a 03F44043 and r3, r3, #49152 + 10615 003e 0193 str r3, [sp, #4] +1058:Src/main.c **** + 10616 .loc 1 1058 3 view .LVU3329 + 10617 0040 019B ldr r3, [sp, #4] + 10618 .LBE675: +1058:Src/main.c **** + 10619 .loc 1 1058 3 view .LVU3330 +1063:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 10620 .loc 1 1063 3 view .LVU3331 +1063:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 10621 .loc 1 1063 36 is_stmt 0 view .LVU3332 + 10622 0042 0123 movs r3, #1 + 10623 0044 0793 str r3, [sp, #28] +1064:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 10624 .loc 1 1064 3 is_stmt 1 view .LVU3333 +1064:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 10625 .loc 1 1064 30 is_stmt 0 view .LVU3334 + 10626 0046 4FF48033 mov r3, #65536 + 10627 004a 0893 str r3, [sp, #32] +1065:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 10628 .loc 1 1065 3 is_stmt 1 view .LVU3335 +1065:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 10629 .loc 1 1065 34 is_stmt 0 view .LVU3336 + 10630 004c 0223 movs r3, #2 + 10631 004e 0D93 str r3, [sp, #52] +1066:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 10632 .loc 1 1066 3 is_stmt 1 view .LVU3337 +1066:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 10633 .loc 1 1066 35 is_stmt 0 view .LVU3338 + 10634 0050 4FF48002 mov r2, #4194304 + 10635 0054 0E92 str r2, [sp, #56] +1067:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 10636 .loc 1 1067 3 is_stmt 1 view .LVU3339 +1067:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 10637 .loc 1 1067 30 is_stmt 0 view .LVU3340 + 10638 0056 1922 movs r2, #25 + 10639 0058 0F92 str r2, [sp, #60] +1068:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 10640 .loc 1 1068 3 is_stmt 1 view .LVU3341 +1068:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 10641 .loc 1 1068 30 is_stmt 0 view .LVU3342 + 10642 005a 4FF4B872 mov r2, #368 + 10643 005e 1092 str r2, [sp, #64] +1069:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 10644 .loc 1 1069 3 is_stmt 1 view .LVU3343 +1069:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 10645 .loc 1 1069 30 is_stmt 0 view .LVU3344 + 10646 0060 1193 str r3, [sp, #68] +1070:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 10647 .loc 1 1070 3 is_stmt 1 view .LVU3345 +1070:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + ARM GAS /tmp/ccuHnxNu.s page 594 + + + 10648 .loc 1 1070 30 is_stmt 0 view .LVU3346 + 10649 0062 0822 movs r2, #8 + 10650 0064 1292 str r2, [sp, #72] +1071:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 10651 .loc 1 1071 3 is_stmt 1 view .LVU3347 +1071:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 10652 .loc 1 1071 30 is_stmt 0 view .LVU3348 + 10653 0066 1393 str r3, [sp, #76] +1072:Src/main.c **** { + 10654 .loc 1 1072 3 is_stmt 1 view .LVU3349 +1072:Src/main.c **** { + 10655 .loc 1 1072 7 is_stmt 0 view .LVU3350 + 10656 0068 07A8 add r0, sp, #28 + 10657 006a FFF7FEFF bl HAL_RCC_OscConfig + 10658 .LVL942: +1072:Src/main.c **** { + 10659 .loc 1 1072 6 discriminator 1 view .LVU3351 + 10660 006e B0B9 cbnz r0, .L591 +1079:Src/main.c **** { + 10661 .loc 1 1079 3 is_stmt 1 view .LVU3352 +1079:Src/main.c **** { + 10662 .loc 1 1079 7 is_stmt 0 view .LVU3353 + 10663 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive + 10664 .LVL943: +1079:Src/main.c **** { + 10665 .loc 1 1079 6 discriminator 1 view .LVU3354 + 10666 0074 A8B9 cbnz r0, .L592 +1086:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 10667 .loc 1 1086 3 is_stmt 1 view .LVU3355 +1086:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 10668 .loc 1 1086 31 is_stmt 0 view .LVU3356 + 10669 0076 0F23 movs r3, #15 + 10670 0078 0293 str r3, [sp, #8] +1088:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 10671 .loc 1 1088 3 is_stmt 1 view .LVU3357 +1088:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 10672 .loc 1 1088 34 is_stmt 0 view .LVU3358 + 10673 007a 0223 movs r3, #2 + 10674 007c 0393 str r3, [sp, #12] +1089:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 10675 .loc 1 1089 3 is_stmt 1 view .LVU3359 +1089:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 10676 .loc 1 1089 35 is_stmt 0 view .LVU3360 + 10677 007e 0023 movs r3, #0 + 10678 0080 0493 str r3, [sp, #16] +1090:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 10679 .loc 1 1090 3 is_stmt 1 view .LVU3361 +1090:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 10680 .loc 1 1090 36 is_stmt 0 view .LVU3362 + 10681 0082 4FF4A053 mov r3, #5120 + 10682 0086 0593 str r3, [sp, #20] +1091:Src/main.c **** + 10683 .loc 1 1091 3 is_stmt 1 view .LVU3363 +1091:Src/main.c **** + 10684 .loc 1 1091 36 is_stmt 0 view .LVU3364 + 10685 0088 4FF48053 mov r3, #4096 + 10686 008c 0693 str r3, [sp, #24] + ARM GAS /tmp/ccuHnxNu.s page 595 + + +1093:Src/main.c **** { + 10687 .loc 1 1093 3 is_stmt 1 view .LVU3365 +1093:Src/main.c **** { + 10688 .loc 1 1093 7 is_stmt 0 view .LVU3366 + 10689 008e 0621 movs r1, #6 + 10690 0090 02A8 add r0, sp, #8 + 10691 0092 FFF7FEFF bl HAL_RCC_ClockConfig + 10692 .LVL944: +1093:Src/main.c **** { + 10693 .loc 1 1093 6 discriminator 1 view .LVU3367 + 10694 0096 30B9 cbnz r0, .L593 +1097:Src/main.c **** + 10695 .loc 1 1097 1 view .LVU3368 + 10696 0098 15B0 add sp, sp, #84 + 10697 .LCFI111: + 10698 .cfi_remember_state + 10699 .cfi_def_cfa_offset 4 + 10700 @ sp needed + 10701 009a 5DF804FB ldr pc, [sp], #4 + 10702 .L591: + 10703 .LCFI112: + 10704 .cfi_restore_state +1074:Src/main.c **** } + 10705 .loc 1 1074 5 is_stmt 1 view .LVU3369 + 10706 009e FFF7FEFF bl Error_Handler + 10707 .LVL945: + 10708 .L592: +1081:Src/main.c **** } + 10709 .loc 1 1081 5 view .LVU3370 + 10710 00a2 FFF7FEFF bl Error_Handler + 10711 .LVL946: + 10712 .L593: +1095:Src/main.c **** } + 10713 .loc 1 1095 5 view .LVU3371 + 10714 00a6 FFF7FEFF bl Error_Handler + 10715 .LVL947: + 10716 .L595: + 10717 00aa 00BF .align 2 + 10718 .L594: + 10719 00ac 00380240 .word 1073887232 + 10720 00b0 00700040 .word 1073770496 + 10721 .cfi_endproc + 10722 .LFE1187: + 10724 .section .text.main,"ax",%progbits + 10725 .align 1 + 10726 .global main + 10727 .syntax unified + 10728 .thumb + 10729 .thumb_func + 10731 main: + 10732 .LFB1186: + 254:Src/main.c **** + 10733 .loc 1 254 1 view -0 + 10734 .cfi_startproc + 10735 @ args = 0, pretend = 0, frame = 8 + 10736 @ frame_needed = 0, uses_anonymous_args = 0 + 10737 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + ARM GAS /tmp/ccuHnxNu.s page 596 + + + 10738 .LCFI113: + 10739 .cfi_def_cfa_offset 28 + 10740 .cfi_offset 4, -28 + 10741 .cfi_offset 5, -24 + 10742 .cfi_offset 6, -20 + 10743 .cfi_offset 7, -16 + 10744 .cfi_offset 8, -12 + 10745 .cfi_offset 9, -8 + 10746 .cfi_offset 14, -4 + 10747 0004 85B0 sub sp, sp, #20 + 10748 .LCFI114: + 10749 .cfi_def_cfa_offset 48 + 257:Src/main.c **** /* USER CODE END 1 */ + 10750 .loc 1 257 2 view .LVU3373 + 263:Src/main.c **** + 10751 .loc 1 263 3 view .LVU3374 + 10752 0006 FFF7FEFF bl HAL_Init + 10753 .LVL948: + 270:Src/main.c **** + 10754 .loc 1 270 3 view .LVU3375 + 10755 000a FFF7FEFF bl SystemClock_Config + 10756 .LVL949: + 277:Src/main.c **** MX_DMA_Init(); + 10757 .loc 1 277 3 view .LVU3376 + 10758 000e FFF7FEFF bl MX_GPIO_Init + 10759 .LVL950: + 278:Src/main.c **** MX_SPI4_Init(); + 10760 .loc 1 278 3 view .LVU3377 + 10761 0012 FFF7FEFF bl MX_DMA_Init + 10762 .LVL951: + 279:Src/main.c **** MX_FATFS_Init(); + 10763 .loc 1 279 3 view .LVU3378 + 10764 0016 FFF7FEFF bl MX_SPI4_Init + 10765 .LVL952: + 280:Src/main.c **** MX_TIM2_Init(); + 10766 .loc 1 280 3 view .LVU3379 + 10767 001a FFF7FEFF bl MX_FATFS_Init + 10768 .LVL953: + 281:Src/main.c **** MX_TIM5_Init(); + 10769 .loc 1 281 3 view .LVU3380 + 10770 001e FFF7FEFF bl MX_TIM2_Init + 10771 .LVL954: + 282:Src/main.c **** MX_ADC1_Init(); + 10772 .loc 1 282 3 view .LVU3381 + 10773 0022 FFF7FEFF bl MX_TIM5_Init + 10774 .LVL955: + 283:Src/main.c **** MX_ADC3_Init(); + 10775 .loc 1 283 3 view .LVU3382 + 10776 0026 FFF7FEFF bl MX_ADC1_Init + 10777 .LVL956: + 284:Src/main.c **** MX_SPI2_Init(); + 10778 .loc 1 284 3 view .LVU3383 + 10779 002a FFF7FEFF bl MX_ADC3_Init + 10780 .LVL957: + 285:Src/main.c **** MX_SPI5_Init(); + 10781 .loc 1 285 3 view .LVU3384 + 10782 002e FFF7FEFF bl MX_SPI2_Init + ARM GAS /tmp/ccuHnxNu.s page 597 + + + 10783 .LVL958: + 286:Src/main.c **** MX_SPI6_Init(); + 10784 .loc 1 286 3 view .LVU3385 + 10785 0032 FFF7FEFF bl MX_SPI5_Init + 10786 .LVL959: + 287:Src/main.c **** MX_USART1_UART_Init(); + 10787 .loc 1 287 3 view .LVU3386 + 10788 0036 FFF7FEFF bl MX_SPI6_Init + 10789 .LVL960: + 288:Src/main.c **** MX_SDMMC1_SD_Init(); + 10790 .loc 1 288 3 view .LVU3387 + 10791 003a FFF7FEFF bl MX_USART1_UART_Init + 10792 .LVL961: + 289:Src/main.c **** MX_TIM7_Init(); + 10793 .loc 1 289 3 view .LVU3388 + 10794 003e FFF7FEFF bl MX_SDMMC1_SD_Init + 10795 .LVL962: + 290:Src/main.c **** MX_TIM6_Init(); + 10796 .loc 1 290 3 view .LVU3389 + 10797 0042 FFF7FEFF bl MX_TIM7_Init + 10798 .LVL963: + 291:Src/main.c **** MX_TIM10_Init(); + 10799 .loc 1 291 3 view .LVU3390 + 10800 0046 FFF7FEFF bl MX_TIM6_Init + 10801 .LVL964: + 292:Src/main.c **** MX_UART8_Init(); + 10802 .loc 1 292 3 view .LVU3391 + 10803 004a FFF7FEFF bl MX_TIM10_Init + 10804 .LVL965: + 293:Src/main.c **** MX_TIM8_Init(); + 10805 .loc 1 293 3 view .LVU3392 + 10806 004e FFF7FEFF bl MX_UART8_Init + 10807 .LVL966: + 294:Src/main.c **** MX_TIM11_Init(); + 10808 .loc 1 294 3 view .LVU3393 + 10809 0052 FFF7FEFF bl MX_TIM8_Init + 10810 .LVL967: + 295:Src/main.c **** MX_TIM4_Init(); + 10811 .loc 1 295 3 view .LVU3394 + 10812 0056 FFF7FEFF bl MX_TIM11_Init + 10813 .LVL968: + 296:Src/main.c **** MX_TIM1_Init(); + 10814 .loc 1 296 3 view .LVU3395 + 10815 005a FFF7FEFF bl MX_TIM4_Init + 10816 .LVL969: + 297:Src/main.c **** PA4_DAC_Init(); + 10817 .loc 1 297 3 view .LVU3396 + 10818 005e FFF7FEFF bl MX_TIM1_Init + 10819 .LVL970: + 298:Src/main.c **** /* USER CODE BEGIN 2 */ + 10820 .loc 1 298 3 view .LVU3397 + 10821 0062 FFF7FEFF bl PA4_DAC_Init + 10822 .LVL971: + 300:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 10823 .loc 1 300 2 view .LVU3398 + 10824 0066 FFF7FEFF bl Init_params + 10825 .LVL972: + ARM GAS /tmp/ccuHnxNu.s page 598 + + + 311:Src/main.c **** + 10826 .loc 1 311 2 view .LVU3399 + 311:Src/main.c **** + 10827 .loc 1 311 14 is_stmt 0 view .LVU3400 + 10828 006a 8A4A ldr r2, .L694 + 10829 006c 3523 movs r3, #53 + 10830 006e D362 str r3, [r2, #44] + 313:Src/main.c **** + 10831 .loc 1 313 2 is_stmt 1 view .LVU3401 + 313:Src/main.c **** + 10832 .loc 1 313 23 is_stmt 0 view .LVU3402 + 10833 0070 D36A ldr r3, [r2, #44] + 313:Src/main.c **** + 10834 .loc 1 313 30 view .LVU3403 + 10835 0072 0133 adds r3, r3, #1 + 313:Src/main.c **** + 10836 .loc 1 313 33 view .LVU3404 + 10837 0074 5B08 lsrs r3, r3, #1 + 313:Src/main.c **** + 10838 .loc 1 313 36 view .LVU3405 + 10839 0076 013B subs r3, r3, #1 + 313:Src/main.c **** + 10840 .loc 1 313 15 view .LVU3406 + 10841 0078 D363 str r3, [r2, #60] + 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 10842 .loc 1 318 2 is_stmt 1 view .LVU3407 + 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 10843 .loc 1 318 23 is_stmt 0 view .LVU3408 + 10844 007a D36A ldr r3, [r2, #44] + 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 10845 .loc 1 318 36 view .LVU3409 + 10846 007c 9B00 lsls r3, r3, #2 + 10847 007e 0333 adds r3, r3, #3 + 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 10848 .loc 1 318 15 view .LVU3410 + 10849 0080 02F5A032 add r2, r2, #81920 + 10850 0084 D362 str r3, [r2, #44] + 319:Src/main.c **** + 10851 .loc 1 319 2 is_stmt 1 view .LVU3411 + 319:Src/main.c **** + 10852 .loc 1 319 25 is_stmt 0 view .LVU3412 + 10853 0086 D36A ldr r3, [r2, #44] + 319:Src/main.c **** + 10854 .loc 1 319 32 view .LVU3413 + 10855 0088 0133 adds r3, r3, #1 + 319:Src/main.c **** + 10856 .loc 1 319 35 view .LVU3414 + 10857 008a 5B08 lsrs r3, r3, #1 + 319:Src/main.c **** + 10858 .loc 1 319 38 view .LVU3415 + 10859 008c 013B subs r3, r3, #1 + 319:Src/main.c **** + 10860 .loc 1 319 16 view .LVU3416 + 10861 008e 5363 str r3, [r2, #52] + 323:Src/main.c **** + 10862 .loc 1 323 2 is_stmt 1 view .LVU3417 + 10863 0090 0021 movs r1, #0 + ARM GAS /tmp/ccuHnxNu.s page 599 + + + 10864 0092 8148 ldr r0, .L694+4 + 10865 0094 FFF7FEFF bl HAL_TIM_PWM_Start + 10866 .LVL973: + 10867 0098 4CE0 b .L597 + 10868 .L682: + 337:Src/main.c **** { + 10869 .loc 1 337 85 is_stmt 0 discriminator 1 view .LVU3418 + 10870 009a 804B ldr r3, .L694+8 + 10871 009c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 337:Src/main.c **** { + 10872 .loc 1 337 73 discriminator 1 view .LVU3419 + 10873 009e 002B cmp r3, #0 + 10874 00a0 4FD1 bne .L598 + 10875 .L599: + 10876 .LBB676: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10877 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3420 + 10878 .LBB677: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10879 .loc 7 3073 3 discriminator 1 view .LVU3421 +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10880 .loc 7 3073 3 discriminator 1 view .LVU3422 +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10881 .loc 7 3073 3 discriminator 1 view .LVU3423 + 10882 .LVL974: + 10883 .LBB678: + 10884 .LBI678: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10885 .loc 8 1068 31 view .LVU3424 + 10886 .LBB679: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10887 .loc 8 1070 5 view .LVU3425 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10888 .loc 8 1072 4 view .LVU3426 + 10889 00a2 7F4A ldr r2, .L694+12 + 10890 .syntax unified + 10891 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10892 00a4 52E8003F ldrex r3, [r2] + 10893 @ 0 "" 2 + 10894 .LVL975: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10895 .loc 8 1073 4 view .LVU3427 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10896 .loc 8 1073 4 is_stmt 0 view .LVU3428 + 10897 .thumb + 10898 .syntax unified + 10899 .LBE679: + 10900 .LBE678: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10901 .loc 7 3073 3 discriminator 1 view .LVU3429 + 10902 00a8 43F48073 orr r3, r3, #256 + 10903 .LVL976: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10904 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3430 + 10905 .LBB680: + 10906 .LBI680: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccuHnxNu.s page 600 + + + 10907 .loc 8 1119 31 view .LVU3431 + 10908 .LBB681: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10909 .loc 8 1121 4 view .LVU3432 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10910 .loc 8 1123 4 view .LVU3433 + 10911 .syntax unified + 10912 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10913 00ac 42E80031 strex r1, r3, [r2] + 10914 @ 0 "" 2 + 10915 .LVL977: + 10916 .loc 8 1124 4 view .LVU3434 + 10917 .loc 8 1124 4 is_stmt 0 view .LVU3435 + 10918 .thumb + 10919 .syntax unified + 10920 .LBE681: + 10921 .LBE680: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10922 .loc 7 3073 3 discriminator 1 view .LVU3436 + 10923 00b0 0029 cmp r1, #0 + 10924 00b2 F6D1 bne .L599 + 10925 .LVL978: + 10926 .L600: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10927 .loc 7 3073 3 discriminator 1 view .LVU3437 + 10928 .LBE677: + 10929 .LBE676: + 10930 .LBB682: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10931 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3438 + 10932 .LBB683: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10933 .loc 7 3040 3 discriminator 1 view .LVU3439 +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10934 .loc 7 3040 3 discriminator 1 view .LVU3440 +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10935 .loc 7 3040 3 discriminator 1 view .LVU3441 + 10936 .LBB684: + 10937 .LBI684: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10938 .loc 8 1068 31 view .LVU3442 + 10939 .LBB685: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10940 .loc 8 1070 5 view .LVU3443 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10941 .loc 8 1072 4 view .LVU3444 + 10942 00b4 7A4A ldr r2, .L694+12 + 10943 .syntax unified + 10944 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10945 00b6 52E8003F ldrex r3, [r2] + 10946 @ 0 "" 2 + 10947 .LVL979: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10948 .loc 8 1073 4 view .LVU3445 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10949 .loc 8 1073 4 is_stmt 0 view .LVU3446 + 10950 .thumb + ARM GAS /tmp/ccuHnxNu.s page 601 + + + 10951 .syntax unified + 10952 .LBE685: + 10953 .LBE684: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10954 .loc 7 3040 3 discriminator 1 view .LVU3447 + 10955 00ba 43F02003 orr r3, r3, #32 + 10956 .LVL980: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10957 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3448 + 10958 .LBB686: + 10959 .LBI686: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10960 .loc 8 1119 31 view .LVU3449 + 10961 .LBB687: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10962 .loc 8 1121 4 view .LVU3450 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10963 .loc 8 1123 4 view .LVU3451 + 10964 .syntax unified + 10965 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10966 00be 42E80031 strex r1, r3, [r2] + 10967 @ 0 "" 2 + 10968 .LVL981: + 10969 .loc 8 1124 4 view .LVU3452 + 10970 .loc 8 1124 4 is_stmt 0 view .LVU3453 + 10971 .thumb + 10972 .syntax unified + 10973 .LBE687: + 10974 .LBE686: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10975 .loc 7 3040 3 discriminator 1 view .LVU3454 + 10976 00c2 0029 cmp r1, #0 + 10977 00c4 F6D1 bne .L600 + 10978 .LVL982: + 10979 .L601: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10980 .loc 7 3040 3 discriminator 1 view .LVU3455 + 10981 .LBE683: + 10982 .LBE682: + 10983 .LBB688: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10984 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3456 + 10985 .LBB689: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10986 .loc 7 3136 3 discriminator 1 view .LVU3457 +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10987 .loc 7 3136 3 discriminator 1 view .LVU3458 +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10988 .loc 7 3136 3 discriminator 1 view .LVU3459 + 10989 .LBB690: + 10990 .LBI690: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10991 .loc 8 1068 31 view .LVU3460 + 10992 .LBB691: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10993 .loc 8 1070 5 view .LVU3461 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccuHnxNu.s page 602 + + + 10994 .loc 8 1072 4 view .LVU3462 + 10995 00c6 764A ldr r2, .L694+12 + 10996 00c8 02F10803 add r3, r2, #8 + 10997 .syntax unified + 10998 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10999 00cc 53E8003F ldrex r3, [r3] + 11000 @ 0 "" 2 + 11001 .LVL983: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 11002 .loc 8 1073 4 view .LVU3463 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 11003 .loc 8 1073 4 is_stmt 0 view .LVU3464 + 11004 .thumb + 11005 .syntax unified + 11006 .LBE691: + 11007 .LBE690: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 11008 .loc 7 3136 3 discriminator 1 view .LVU3465 + 11009 00d0 43F00103 orr r3, r3, #1 + 11010 .LVL984: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 11011 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3466 + 11012 .LBB692: + 11013 .LBI692: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 11014 .loc 8 1119 31 view .LVU3467 + 11015 .LBB693: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 11016 .loc 8 1121 4 view .LVU3468 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 11017 .loc 8 1123 4 view .LVU3469 + 11018 00d4 0832 adds r2, r2, #8 + 11019 .syntax unified + 11020 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11021 00d6 42E80031 strex r1, r3, [r2] + 11022 @ 0 "" 2 + 11023 .LVL985: + 11024 .loc 8 1124 4 view .LVU3470 + 11025 .loc 8 1124 4 is_stmt 0 view .LVU3471 + 11026 .thumb + 11027 .syntax unified + 11028 .LBE693: + 11029 .LBE692: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 11030 .loc 7 3136 3 discriminator 1 view .LVU3472 + 11031 00da 0029 cmp r1, #0 + 11032 00dc F3D1 bne .L601 + 11033 .LBE689: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 11034 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3473 + 11035 .LVL986: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 11036 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3474 + 11037 .LBE688: + 343:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 11038 .loc 1 343 4 is_stmt 1 view .LVU3475 + 11039 .LBB694: + ARM GAS /tmp/ccuHnxNu.s page 603 + + + 11040 .LBI694: +2024:Drivers/CMSIS/Include/core_cm7.h **** { + 11041 .loc 2 2024 22 view .LVU3476 + 11042 .LBB695: +2026:Drivers/CMSIS/Include/core_cm7.h **** { + 11043 .loc 2 2026 3 view .LVU3477 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 11044 .loc 2 2028 5 view .LVU3478 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 11045 .loc 2 2028 47 is_stmt 0 view .LVU3479 + 11046 00de 714B ldr r3, .L694+16 + 11047 00e0 0022 movs r2, #0 + 11048 00e2 83F82523 strb r2, [r3, #805] + 11049 .LVL987: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 11050 .loc 2 2028 47 view .LVU3480 + 11051 .LBE695: + 11052 .LBE694: + 344:Src/main.c **** u_rx_flg = 1; + 11053 .loc 1 344 4 is_stmt 1 view .LVU3481 + 11054 .LBB696: + 11055 .LBI696: +1896:Drivers/CMSIS/Include/core_cm7.h **** { + 11056 .loc 2 1896 22 view .LVU3482 + 11057 .LBB697: +1898:Drivers/CMSIS/Include/core_cm7.h **** { + 11058 .loc 2 1898 3 view .LVU3483 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 11059 .loc 2 1900 5 view .LVU3484 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 11060 .loc 2 1900 43 is_stmt 0 view .LVU3485 + 11061 00e6 2022 movs r2, #32 + 11062 00e8 5A60 str r2, [r3, #4] + 11063 .LVL988: +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 11064 .loc 2 1900 43 view .LVU3486 + 11065 .LBE697: + 11066 .LBE696: + 345:Src/main.c **** } + 11067 .loc 1 345 4 is_stmt 1 view .LVU3487 + 345:Src/main.c **** } + 11068 .loc 1 345 13 is_stmt 0 view .LVU3488 + 11069 00ea 6C4B ldr r3, .L694+8 + 11070 00ec 0122 movs r2, #1 + 11071 00ee 1A70 strb r2, [r3] + 11072 00f0 27E0 b .L598 + 11073 .L617: + 355:Src/main.c **** task.current_param = task.min_param; + 11074 .loc 1 355 6 is_stmt 1 view .LVU3489 + 355:Src/main.c **** task.current_param = task.min_param; + 11075 .loc 1 355 20 is_stmt 0 view .LVU3490 + 11076 00f2 6D4B ldr r3, .L694+20 + 11077 00f4 0022 movs r2, #0 + 11078 00f6 1A70 strb r2, [r3] + 356:Src/main.c **** Stop_TIM10(); + 11079 .loc 1 356 6 is_stmt 1 view .LVU3491 + 356:Src/main.c **** Stop_TIM10(); + ARM GAS /tmp/ccuHnxNu.s page 604 + + + 11080 .loc 1 356 31 is_stmt 0 view .LVU3492 + 11081 00f8 6C4B ldr r3, .L694+24 + 11082 00fa 5A68 ldr r2, [r3, #4] @ float + 356:Src/main.c **** Stop_TIM10(); + 11083 .loc 1 356 25 view .LVU3493 + 11084 00fc 1A61 str r2, [r3, #16] @ float + 357:Src/main.c **** break; + 11085 .loc 1 357 6 is_stmt 1 view .LVU3494 + 11086 00fe FFF7FEFF bl Stop_TIM10 + 11087 .LVL989: + 358:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 11088 .loc 1 358 5 view .LVU3495 + 11089 .L602: + 990:Src/main.c **** { + 11090 .loc 1 990 3 view .LVU3496 + 11091 0102 6B4B ldr r3, .L694+28 + 11092 0104 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 11093 0106 022B cmp r3, #2 + 11094 0108 00F01385 beq .L662 + 11095 010c 032B cmp r3, #3 + 11096 010e 00F04685 beq .L678 + 11097 0112 012B cmp r3, #1 + 11098 0114 09D1 bne .L664 + 993:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 11099 .loc 1 993 5 view .LVU3497 + 11100 0116 674C ldr r4, .L694+32 + 11101 0118 0221 movs r1, #2 + 11102 011a 2046 mov r0, r4 + 11103 011c FFF7FEFF bl USART_TX + 11104 .LVL990: + 995:Src/main.c **** State_Data[1]=0;//All OK! + 11105 .loc 1 995 5 view .LVU3498 + 995:Src/main.c **** State_Data[1]=0;//All OK! + 11106 .loc 1 995 18 is_stmt 0 view .LVU3499 + 11107 0120 0023 movs r3, #0 + 11108 0122 2370 strb r3, [r4] + 996:Src/main.c **** UART_transmission_request = NO_MESS; + 11109 .loc 1 996 5 is_stmt 1 view .LVU3500 + 996:Src/main.c **** UART_transmission_request = NO_MESS; + 11110 .loc 1 996 18 is_stmt 0 view .LVU3501 + 11111 0124 6370 strb r3, [r4, #1] + 997:Src/main.c **** break; + 11112 .loc 1 997 5 is_stmt 1 view .LVU3502 + 997:Src/main.c **** break; + 11113 .loc 1 997 31 is_stmt 0 view .LVU3503 + 11114 0126 624A ldr r2, .L694+28 + 11115 0128 1370 strb r3, [r2] + 998:Src/main.c **** case MESS_02://Transmith packet + 11116 .loc 1 998 4 is_stmt 1 view .LVU3504 + 11117 .L664: +1032:Src/main.c **** { + 11118 .loc 1 1032 5 view .LVU3505 +1032:Src/main.c **** { + 11119 .loc 1 1032 17 is_stmt 0 view .LVU3506 + 11120 012a 634B ldr r3, .L694+36 + 11121 012c 1B78 ldrb r3, [r3] @ zero_extendqisi2 +1032:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 605 + + + 11122 .loc 1 1032 8 view .LVU3507 + 11123 012e 012B cmp r3, #1 + 11124 0130 00F03785 beq .L681 + 11125 .L597: + 335:Src/main.c **** { + 11126 .loc 1 335 3 is_stmt 1 view .LVU3508 + 337:Src/main.c **** { + 11127 .loc 1 337 3 view .LVU3509 + 337:Src/main.c **** { + 11128 .loc 1 337 8 is_stmt 0 view .LVU3510 + 11129 0134 4FF48071 mov r1, #256 + 11130 0138 6048 ldr r0, .L694+40 + 11131 013a FFF7FEFF bl HAL_GPIO_ReadPin + 11132 .LVL991: + 337:Src/main.c **** { + 11133 .loc 1 337 6 discriminator 1 view .LVU3511 + 11134 013e 0128 cmp r0, #1 + 11135 0140 ABD0 beq .L682 + 11136 .L598: + 352:Src/main.c **** { + 11137 .loc 1 352 4 is_stmt 1 view .LVU3512 + 11138 0142 5F4B ldr r3, .L694+44 + 11139 0144 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 11140 0146 0D2B cmp r3, #13 + 11141 0148 DBD8 bhi .L602 + 11142 014a 01A2 adr r2, .L604 + 11143 014c 52F823F0 ldr pc, [r2, r3, lsl #2] + 11144 .p2align 2 + 11145 .L604: + 11146 0150 F3000000 .word .L617+1 + 11147 0154 89010000 .word .L616+1 + 11148 0158 F3010000 .word .L615+1 + 11149 015c 29020000 .word .L614+1 + 11150 0160 59020000 .word .L613+1 + 11151 0164 69020000 .word .L612+1 + 11152 0168 85020000 .word .L611+1 + 11153 016c ED020000 .word .L610+1 + 11154 0170 5F060000 .word .L609+1 + 11155 0174 A5060000 .word .L608+1 + 11156 0178 41040000 .word .L607+1 + 11157 017c 1D050000 .word .L606+1 + 11158 0180 6D050000 .word .L605+1 + 11159 0184 23060000 .word .L603+1 + 11160 .p2align 1 + 11161 .L616: + 360:Src/main.c **** if (CheckChecksum(COMMAND)) + 11162 .loc 1 360 6 view .LVU3513 + 360:Src/main.c **** if (CheckChecksum(COMMAND)) + 11163 .loc 1 360 18 is_stmt 0 view .LVU3514 + 11164 0188 4E4C ldr r4, .L694+48 + 11165 018a 0D21 movs r1, #13 + 11166 018c 2046 mov r0, r4 + 11167 018e FFF7FEFF bl CalculateChecksum + 11168 .LVL992: + 360:Src/main.c **** if (CheckChecksum(COMMAND)) + 11169 .loc 1 360 16 discriminator 1 view .LVU3515 + 11170 0192 4D4B ldr r3, .L694+52 + ARM GAS /tmp/ccuHnxNu.s page 606 + + + 11171 0194 1880 strh r0, [r3] @ movhi + 361:Src/main.c **** { + 11172 .loc 1 361 6 is_stmt 1 view .LVU3516 + 361:Src/main.c **** { + 11173 .loc 1 361 10 is_stmt 0 view .LVU3517 + 11174 0196 2046 mov r0, r4 + 11175 0198 FFF7FEFF bl CheckChecksum + 11176 .LVL993: + 361:Src/main.c **** { + 11177 .loc 1 361 9 discriminator 1 view .LVU3518 + 11178 019c 70B9 cbnz r0, .L683 + 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 11179 .loc 1 374 7 is_stmt 1 view .LVU3519 + 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 11180 .loc 1 374 17 is_stmt 0 view .LVU3520 + 11181 019e 454A ldr r2, .L694+32 + 11182 01a0 1378 ldrb r3, [r2] @ zero_extendqisi2 + 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 11183 .loc 1 374 21 view .LVU3521 + 11184 01a2 43F00403 orr r3, r3, #4 + 11185 01a6 1370 strb r3, [r2] + 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 11186 .loc 1 375 7 is_stmt 1 view .LVU3522 + 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 11187 .loc 1 375 17 is_stmt 0 view .LVU3523 + 11188 01a8 454B ldr r3, .L694+44 + 11189 01aa 0222 movs r2, #2 + 11190 01ac 1A70 strb r2, [r3] + 376:Src/main.c **** } + 11191 .loc 1 376 7 is_stmt 1 view .LVU3524 + 376:Src/main.c **** } + 11192 .loc 1 376 21 is_stmt 0 view .LVU3525 + 11193 01ae 3E4B ldr r3, .L694+20 + 11194 01b0 0022 movs r2, #0 + 11195 01b2 1A70 strb r2, [r3] + 11196 .L619: + 378:Src/main.c **** break; + 11197 .loc 1 378 6 is_stmt 1 view .LVU3526 + 378:Src/main.c **** break; + 11198 .loc 1 378 32 is_stmt 0 view .LVU3527 + 11199 01b4 3E4B ldr r3, .L694+28 + 11200 01b6 0122 movs r2, #1 + 11201 01b8 1A70 strb r2, [r3] + 379:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 11202 .loc 1 379 5 is_stmt 1 view .LVU3528 + 11203 01ba A2E7 b .L602 + 11204 .L683: + 363:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 11205 .loc 1 363 7 view .LVU3529 + 11206 .LVL994: + 11207 .LBB698: + 11208 .LBI698: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 11046 .loc 4 358 22 view .LVU3487 - 11047 .LBB696: + 11209 .loc 4 358 22 view .LVU3530 + 11210 .LBB699: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11048 .loc 4 360 3 view .LVU3488 - 11049 01b4 434A ldr r2, .L679+56 - 11050 01b6 1368 ldr r3, [r2] - 11051 01b8 43F04003 orr r3, r3, #64 - 11052 01bc 1360 str r3, [r2] - 11053 .LVL991: + 11211 .loc 4 360 3 view .LVU3531 + ARM GAS /tmp/ccuHnxNu.s page 607 + + + 11212 01bc 434A ldr r2, .L694+56 + 11213 01be 1368 ldr r3, [r2] + 11214 01c0 43F04003 orr r3, r3, #64 + 11215 01c4 1360 str r3, [r2] + 11216 .LVL995: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11054 .loc 4 360 3 is_stmt 0 view .LVU3489 - 11055 .LBE696: - 11056 .LBE695: - 359:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 11057 .loc 1 359 7 is_stmt 1 view .LVU3490 - 11058 .LBB697: - 11059 .LBI697: + 11217 .loc 4 360 3 is_stmt 0 view .LVU3532 + 11218 .LBE699: + 11219 .LBE698: + 364:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 11220 .loc 1 364 7 is_stmt 1 view .LVU3533 + 11221 .LBB700: + 11222 .LBI700: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccEQxcUB.s page 603 - - - 11060 .loc 4 358 22 view .LVU3491 - 11061 .LBB698: + 11223 .loc 4 358 22 view .LVU3534 + 11224 .LBB701: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11062 .loc 4 360 3 view .LVU3492 - 11063 01be 02F58E32 add r2, r2, #72704 - 11064 01c2 1368 ldr r3, [r2] - 11065 01c4 43F04003 orr r3, r3, #64 - 11066 01c8 1360 str r3, [r2] - 11067 .LVL992: + 11225 .loc 4 360 3 view .LVU3535 + 11226 01c6 02F58E32 add r2, r2, #72704 + 11227 01ca 1368 ldr r3, [r2] + 11228 01cc 43F04003 orr r3, r3, #64 + 11229 01d0 1360 str r3, [r2] + 11230 .LVL996: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11068 .loc 4 360 3 is_stmt 0 view .LVU3493 - 11069 .LBE698: - 11070 .LBE697: - 360:Src/main.c **** TO6_before = TO6; - 11071 .loc 1 360 7 is_stmt 1 view .LVU3494 - 11072 01ca 3F4B ldr r3, .L679+60 - 11073 01cc 3F4A ldr r2, .L679+64 - 11074 01ce 4049 ldr r1, .L679+68 - 11075 01d0 2046 mov r0, r4 - 11076 01d2 FFF7FEFF bl Decode_uart - 11077 .LVL993: - 361:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 11078 .loc 1 361 7 view .LVU3495 - 361:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 11079 .loc 1 361 18 is_stmt 0 view .LVU3496 - 11080 01d6 3F4B ldr r3, .L679+72 - 11081 01d8 1A68 ldr r2, [r3] - 11082 01da 3F4B ldr r3, .L679+76 - 11083 01dc 1A60 str r2, [r3] - 364:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 11084 .loc 1 364 7 is_stmt 1 view .LVU3497 - 364:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 11085 .loc 1 364 17 is_stmt 0 view .LVU3498 - 11086 01de 0723 movs r3, #7 - 11087 01e0 354A ldr r2, .L679+44 - 11088 01e2 1370 strb r3, [r2] - 365:Src/main.c **** } - 11089 .loc 1 365 7 is_stmt 1 view .LVU3499 - 365:Src/main.c **** } - 11090 .loc 1 365 21 is_stmt 0 view .LVU3500 - 11091 01e4 2E4A ldr r2, .L679+20 - 11092 01e6 1370 strb r3, [r2] - 11093 01e8 E0E7 b .L607 - 11094 .L603: - 377:Src/main.c **** Stop_TIM10(); - 11095 .loc 1 377 6 is_stmt 1 view .LVU3501 - 377:Src/main.c **** Stop_TIM10(); - 11096 .loc 1 377 31 is_stmt 0 view .LVU3502 - 11097 01ea 2E4B ldr r3, .L679+24 - 11098 01ec 5A68 ldr r2, [r3, #4] @ float - 377:Src/main.c **** Stop_TIM10(); - 11099 .loc 1 377 25 view .LVU3503 - 11100 01ee 1A61 str r2, [r3, #16] @ float - 378:Src/main.c **** Init_params(); - 11101 .loc 1 378 6 is_stmt 1 view .LVU3504 - 11102 01f0 FFF7FEFF bl Stop_TIM10 - 11103 .LVL994: - ARM GAS /tmp/ccEQxcUB.s page 604 + 11231 .loc 4 360 3 is_stmt 0 view .LVU3536 + 11232 .LBE701: + 11233 .LBE700: + 365:Src/main.c **** TO6_before = TO6; + 11234 .loc 1 365 7 is_stmt 1 view .LVU3537 + 11235 01d2 3F4B ldr r3, .L694+60 + 11236 01d4 3F4A ldr r2, .L694+64 + 11237 01d6 4049 ldr r1, .L694+68 + 11238 01d8 2046 mov r0, r4 + 11239 01da FFF7FEFF bl Decode_uart + 11240 .LVL997: + 366:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 11241 .loc 1 366 7 view .LVU3538 + 366:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 11242 .loc 1 366 18 is_stmt 0 view .LVU3539 + 11243 01de 3F4B ldr r3, .L694+72 + 11244 01e0 1A68 ldr r2, [r3] + 11245 01e2 3F4B ldr r3, .L694+76 + 11246 01e4 1A60 str r2, [r3] + 369:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 11247 .loc 1 369 7 is_stmt 1 view .LVU3540 + 369:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 11248 .loc 1 369 17 is_stmt 0 view .LVU3541 + 11249 01e6 0723 movs r3, #7 + 11250 01e8 354A ldr r2, .L694+44 + 11251 01ea 1370 strb r3, [r2] + 370:Src/main.c **** } + 11252 .loc 1 370 7 is_stmt 1 view .LVU3542 + 370:Src/main.c **** } + 11253 .loc 1 370 21 is_stmt 0 view .LVU3543 + 11254 01ec 2E4A ldr r2, .L694+20 + 11255 01ee 1370 strb r3, [r2] + 11256 01f0 E0E7 b .L619 + ARM GAS /tmp/ccuHnxNu.s page 608 - 379:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 11104 .loc 1 379 6 view .LVU3505 - 11105 01f4 FFF7FEFF bl Init_params - 11106 .LVL995: - 380:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 11107 .loc 1 380 6 view .LVU3506 - 11108 .LBB699: - 11109 .LBI699: + 11257 .L615: + 382:Src/main.c **** Stop_TIM10(); + 11258 .loc 1 382 6 is_stmt 1 view .LVU3544 + 382:Src/main.c **** Stop_TIM10(); + 11259 .loc 1 382 31 is_stmt 0 view .LVU3545 + 11260 01f2 2E4B ldr r3, .L694+24 + 11261 01f4 5A68 ldr r2, [r3, #4] @ float + 382:Src/main.c **** Stop_TIM10(); + 11262 .loc 1 382 25 view .LVU3546 + 11263 01f6 1A61 str r2, [r3, #16] @ float + 383:Src/main.c **** Init_params(); + 11264 .loc 1 383 6 is_stmt 1 view .LVU3547 + 11265 01f8 FFF7FEFF bl Stop_TIM10 + 11266 .LVL998: + 384:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 11267 .loc 1 384 6 view .LVU3548 + 11268 01fc FFF7FEFF bl Init_params + 11269 .LVL999: + 385:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 11270 .loc 1 385 6 view .LVU3549 + 11271 .LBB702: + 11272 .LBI702: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 11110 .loc 4 370 22 view .LVU3507 - 11111 .LBB700: + 11273 .loc 4 370 22 view .LVU3550 + 11274 .LBB703: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11112 .loc 4 372 3 view .LVU3508 - 11113 01f8 324A ldr r2, .L679+56 - 11114 01fa 1368 ldr r3, [r2] - 11115 01fc 23F04003 bic r3, r3, #64 - 11116 0200 1360 str r3, [r2] - 11117 .LVL996: + 11275 .loc 4 372 3 view .LVU3551 + 11276 0200 324A ldr r2, .L694+56 + 11277 0202 1368 ldr r3, [r2] + 11278 0204 23F04003 bic r3, r3, #64 + 11279 0208 1360 str r3, [r2] + 11280 .LVL1000: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11118 .loc 4 372 3 is_stmt 0 view .LVU3509 - 11119 .LBE700: - 11120 .LBE699: - 381:Src/main.c **** CPU_state = HALT; - 11121 .loc 1 381 6 is_stmt 1 view .LVU3510 - 11122 .LBB701: - 11123 .LBI701: + 11281 .loc 4 372 3 is_stmt 0 view .LVU3552 + 11282 .LBE703: + 11283 .LBE702: + 386:Src/main.c **** CPU_state = HALT; + 11284 .loc 1 386 6 is_stmt 1 view .LVU3553 + 11285 .LBB704: + 11286 .LBI704: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 11124 .loc 4 370 22 view .LVU3511 - 11125 .LBB702: + 11287 .loc 4 370 22 view .LVU3554 + 11288 .LBB705: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11126 .loc 4 372 3 view .LVU3512 - 11127 0202 02F58E32 add r2, r2, #72704 - 11128 0206 1368 ldr r3, [r2] - 11129 0208 23F04003 bic r3, r3, #64 - 11130 020c 1360 str r3, [r2] - 11131 .LVL997: + 11289 .loc 4 372 3 view .LVU3555 + 11290 020a 02F58E32 add r2, r2, #72704 + 11291 020e 1368 ldr r3, [r2] + 11292 0210 23F04003 bic r3, r3, #64 + 11293 0214 1360 str r3, [r2] + 11294 .LVL1001: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11132 .loc 4 372 3 is_stmt 0 view .LVU3513 - 11133 .LBE702: - 11134 .LBE701: - 382:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 11135 .loc 1 382 6 is_stmt 1 view .LVU3514 - 382:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 11136 .loc 1 382 16 is_stmt 0 view .LVU3515 - 11137 020e 0023 movs r3, #0 - 11138 0210 294A ldr r2, .L679+44 - 11139 0212 1370 strb r3, [r2] - 383:Src/main.c **** UART_transmission_request = MESS_01; - 11140 .loc 1 383 6 is_stmt 1 view .LVU3516 - 383:Src/main.c **** UART_transmission_request = MESS_01; - 11141 .loc 1 383 20 is_stmt 0 view .LVU3517 - 11142 0214 224A ldr r2, .L679+20 - 11143 0216 1370 strb r3, [r2] - 384:Src/main.c **** break; - 11144 .loc 1 384 6 is_stmt 1 view .LVU3518 - 384:Src/main.c **** break; - 11145 .loc 1 384 32 is_stmt 0 view .LVU3519 - ARM GAS /tmp/ccEQxcUB.s page 605 + 11295 .loc 4 372 3 is_stmt 0 view .LVU3556 + 11296 .LBE705: + 11297 .LBE704: + 387:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 11298 .loc 1 387 6 is_stmt 1 view .LVU3557 + 387:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + ARM GAS /tmp/ccuHnxNu.s page 609 - 11146 0218 234B ldr r3, .L679+28 - 11147 021a 0122 movs r2, #1 - 11148 021c 1A70 strb r2, [r3] - 385:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 11149 .loc 1 385 5 is_stmt 1 view .LVU3520 - 11150 021e 6EE7 b .L591 - 11151 .L602: - 387:Src/main.c **** State_Data[0]|=temp16&0xff; - 11152 .loc 1 387 6 view .LVU3521 - 387:Src/main.c **** State_Data[0]|=temp16&0xff; - 11153 .loc 1 387 15 is_stmt 0 view .LVU3522 - 11154 0220 2E48 ldr r0, .L679+80 - 11155 0222 FFF7FEFF bl SD_READ - 11156 .LVL998: - 387:Src/main.c **** State_Data[0]|=temp16&0xff; - 11157 .loc 1 387 13 discriminator 1 view .LVU3523 - 11158 0226 82B2 uxth r2, r0 - 11159 0228 2D4B ldr r3, .L679+84 - 11160 022a 1A80 strh r2, [r3] @ movhi - 388:Src/main.c **** if (temp16==0) - 11161 .loc 1 388 6 is_stmt 1 view .LVU3524 - 388:Src/main.c **** if (temp16==0) - 11162 .loc 1 388 16 is_stmt 0 view .LVU3525 - 11163 022c 1F49 ldr r1, .L679+32 - 11164 022e 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 388:Src/main.c **** if (temp16==0) - 11165 .loc 1 388 19 view .LVU3526 - 11166 0230 0343 orrs r3, r3, r0 - 11167 0232 0B70 strb r3, [r1] - 389:Src/main.c **** { - 11168 .loc 1 389 6 is_stmt 1 view .LVU3527 - 389:Src/main.c **** { - 11169 .loc 1 389 9 is_stmt 0 view .LVU3528 - 11170 0234 42B9 cbnz r2, .L608 - 391:Src/main.c **** } - 11171 .loc 1 391 7 is_stmt 1 view .LVU3529 - 391:Src/main.c **** } - 11172 .loc 1 391 33 is_stmt 0 view .LVU3530 - 11173 0236 1C4B ldr r3, .L679+28 - 11174 0238 0322 movs r2, #3 - 11175 023a 1A70 strb r2, [r3] - 11176 .L609: - 397:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11177 .loc 1 397 6 is_stmt 1 view .LVU3531 - 397:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11178 .loc 1 397 20 is_stmt 0 view .LVU3532 - 11179 023c 0023 movs r3, #0 - 11180 023e 184A ldr r2, .L679+20 - 11181 0240 1370 strb r3, [r2] - 398:Src/main.c **** break; - 11182 .loc 1 398 6 is_stmt 1 view .LVU3533 - 398:Src/main.c **** break; - 11183 .loc 1 398 16 is_stmt 0 view .LVU3534 - 11184 0242 1D4A ldr r2, .L679+44 - 11185 0244 1370 strb r3, [r2] - 399:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 11186 .loc 1 399 5 is_stmt 1 view .LVU3535 - ARM GAS /tmp/ccEQxcUB.s page 606 + 11299 .loc 1 387 16 is_stmt 0 view .LVU3558 + 11300 0216 0023 movs r3, #0 + 11301 0218 294A ldr r2, .L694+44 + 11302 021a 1370 strb r3, [r2] + 388:Src/main.c **** UART_transmission_request = MESS_01; + 11303 .loc 1 388 6 is_stmt 1 view .LVU3559 + 388:Src/main.c **** UART_transmission_request = MESS_01; + 11304 .loc 1 388 20 is_stmt 0 view .LVU3560 + 11305 021c 224A ldr r2, .L694+20 + 11306 021e 1370 strb r3, [r2] + 389:Src/main.c **** break; + 11307 .loc 1 389 6 is_stmt 1 view .LVU3561 + 389:Src/main.c **** break; + 11308 .loc 1 389 32 is_stmt 0 view .LVU3562 + 11309 0220 234B ldr r3, .L694+28 + 11310 0222 0122 movs r2, #1 + 11311 0224 1A70 strb r2, [r3] + 390:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 11312 .loc 1 390 5 is_stmt 1 view .LVU3563 + 11313 0226 6CE7 b .L602 + 11314 .L614: + 392:Src/main.c **** State_Data[0]|=temp16&0xff; + 11315 .loc 1 392 6 view .LVU3564 + 392:Src/main.c **** State_Data[0]|=temp16&0xff; + 11316 .loc 1 392 15 is_stmt 0 view .LVU3565 + 11317 0228 2E48 ldr r0, .L694+80 + 11318 022a FFF7FEFF bl SD_READ + 11319 .LVL1002: + 392:Src/main.c **** State_Data[0]|=temp16&0xff; + 11320 .loc 1 392 13 discriminator 1 view .LVU3566 + 11321 022e 82B2 uxth r2, r0 + 11322 0230 2D4B ldr r3, .L694+84 + 11323 0232 1A80 strh r2, [r3] @ movhi + 393:Src/main.c **** if (temp16==0) + 11324 .loc 1 393 6 is_stmt 1 view .LVU3567 + 393:Src/main.c **** if (temp16==0) + 11325 .loc 1 393 16 is_stmt 0 view .LVU3568 + 11326 0234 1F49 ldr r1, .L694+32 + 11327 0236 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 393:Src/main.c **** if (temp16==0) + 11328 .loc 1 393 19 view .LVU3569 + 11329 0238 0343 orrs r3, r3, r0 + 11330 023a 0B70 strb r3, [r1] + 394:Src/main.c **** { + 11331 .loc 1 394 6 is_stmt 1 view .LVU3570 + 394:Src/main.c **** { + 11332 .loc 1 394 9 is_stmt 0 view .LVU3571 + 11333 023c 42B9 cbnz r2, .L620 + 396:Src/main.c **** } + 11334 .loc 1 396 7 is_stmt 1 view .LVU3572 + 396:Src/main.c **** } + 11335 .loc 1 396 33 is_stmt 0 view .LVU3573 + 11336 023e 1C4B ldr r3, .L694+28 + 11337 0240 0322 movs r2, #3 + 11338 0242 1A70 strb r2, [r3] + 11339 .L621: + 402:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + ARM GAS /tmp/ccuHnxNu.s page 610 - 11187 0246 5AE7 b .L591 - 11188 .L608: - 395:Src/main.c **** } - 11189 .loc 1 395 7 view .LVU3536 - 395:Src/main.c **** } - 11190 .loc 1 395 33 is_stmt 0 view .LVU3537 - 11191 0248 174B ldr r3, .L679+28 - 11192 024a 0122 movs r2, #1 - 11193 024c 1A70 strb r2, [r3] - 11194 024e F5E7 b .L609 - 11195 .L601: - 401:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11196 .loc 1 401 6 is_stmt 1 view .LVU3538 - 401:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11197 .loc 1 401 32 is_stmt 0 view .LVU3539 - 11198 0250 154B ldr r3, .L679+28 - 11199 0252 0222 movs r2, #2 - 11200 0254 1A70 strb r2, [r3] - 402:Src/main.c **** break; - 11201 .loc 1 402 6 is_stmt 1 view .LVU3540 - 402:Src/main.c **** break; - 11202 .loc 1 402 16 is_stmt 0 view .LVU3541 - 11203 0256 124B ldr r3, .L679+20 - 11204 0258 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11205 025a 174B ldr r3, .L679+44 - 11206 025c 1A70 strb r2, [r3] - 403:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 11207 .loc 1 403 5 is_stmt 1 view .LVU3542 - 11208 025e 4EE7 b .L591 - 11209 .L600: - 405:Src/main.c **** UART_transmission_request = MESS_01; - 11210 .loc 1 405 6 view .LVU3543 - 405:Src/main.c **** UART_transmission_request = MESS_01; - 11211 .loc 1 405 21 is_stmt 0 view .LVU3544 - 11212 0260 FFF7FEFF bl SD_REMOVE - 11213 .LVL999: - 405:Src/main.c **** UART_transmission_request = MESS_01; - 11214 .loc 1 405 16 discriminator 1 view .LVU3545 - 11215 0264 114A ldr r2, .L679+32 - 11216 0266 1378 ldrb r3, [r2] @ zero_extendqisi2 - 405:Src/main.c **** UART_transmission_request = MESS_01; - 11217 .loc 1 405 19 discriminator 1 view .LVU3546 - 11218 0268 0343 orrs r3, r3, r0 - 11219 026a 1370 strb r3, [r2] - 406:Src/main.c **** CPU_state = CPU_state_old; - 11220 .loc 1 406 6 is_stmt 1 view .LVU3547 - 406:Src/main.c **** CPU_state = CPU_state_old; - 11221 .loc 1 406 32 is_stmt 0 view .LVU3548 - 11222 026c 0E4B ldr r3, .L679+28 - 11223 026e 0122 movs r2, #1 - 11224 0270 1A70 strb r2, [r3] + 11340 .loc 1 402 6 is_stmt 1 view .LVU3574 + 402:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11341 .loc 1 402 20 is_stmt 0 view .LVU3575 + 11342 0244 0023 movs r3, #0 + 11343 0246 184A ldr r2, .L694+20 + 11344 0248 1370 strb r3, [r2] + 403:Src/main.c **** break; + 11345 .loc 1 403 6 is_stmt 1 view .LVU3576 + 403:Src/main.c **** break; + 11346 .loc 1 403 16 is_stmt 0 view .LVU3577 + 11347 024a 1D4A ldr r2, .L694+44 + 11348 024c 1370 strb r3, [r2] + 404:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 11349 .loc 1 404 5 is_stmt 1 view .LVU3578 + 11350 024e 58E7 b .L602 + 11351 .L620: + 400:Src/main.c **** } + 11352 .loc 1 400 7 view .LVU3579 + 400:Src/main.c **** } + 11353 .loc 1 400 33 is_stmt 0 view .LVU3580 + 11354 0250 174B ldr r3, .L694+28 + 11355 0252 0122 movs r2, #1 + 11356 0254 1A70 strb r2, [r3] + 11357 0256 F5E7 b .L621 + 11358 .L613: + 406:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11359 .loc 1 406 6 is_stmt 1 view .LVU3581 + 406:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11360 .loc 1 406 32 is_stmt 0 view .LVU3582 + 11361 0258 154B ldr r3, .L694+28 + 11362 025a 0222 movs r2, #2 + 11363 025c 1A70 strb r2, [r3] 407:Src/main.c **** break; - 11225 .loc 1 407 6 is_stmt 1 view .LVU3549 + 11364 .loc 1 407 6 is_stmt 1 view .LVU3583 407:Src/main.c **** break; - 11226 .loc 1 407 16 is_stmt 0 view .LVU3550 - 11227 0272 0B4B ldr r3, .L679+20 - 11228 0274 1A78 ldrb r2, [r3] @ zero_extendqisi2 - ARM GAS /tmp/ccEQxcUB.s page 607 + 11365 .loc 1 407 16 is_stmt 0 view .LVU3584 + 11366 025e 124B ldr r3, .L694+20 + 11367 0260 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11368 0262 174B ldr r3, .L694+44 + 11369 0264 1A70 strb r2, [r3] + 408:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 11370 .loc 1 408 5 is_stmt 1 view .LVU3585 + 11371 0266 4CE7 b .L602 + 11372 .L612: + 410:Src/main.c **** UART_transmission_request = MESS_01; + 11373 .loc 1 410 6 view .LVU3586 + 410:Src/main.c **** UART_transmission_request = MESS_01; + 11374 .loc 1 410 21 is_stmt 0 view .LVU3587 + 11375 0268 FFF7FEFF bl SD_REMOVE + 11376 .LVL1003: + 410:Src/main.c **** UART_transmission_request = MESS_01; + 11377 .loc 1 410 16 discriminator 1 view .LVU3588 + 11378 026c 114A ldr r2, .L694+32 + 11379 026e 1378 ldrb r3, [r2] @ zero_extendqisi2 + 410:Src/main.c **** UART_transmission_request = MESS_01; + 11380 .loc 1 410 19 discriminator 1 view .LVU3589 + 11381 0270 0343 orrs r3, r3, r0 + ARM GAS /tmp/ccuHnxNu.s page 611 - 11229 0276 104B ldr r3, .L679+44 - 11230 0278 1A70 strb r2, [r3] - 408:Src/main.c **** case STATE://6 - Transmith state message - 11231 .loc 1 408 5 is_stmt 1 view .LVU3551 - 11232 027a 40E7 b .L591 - 11233 .L599: - 410:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11234 .loc 1 410 6 view .LVU3552 - 410:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11235 .loc 1 410 32 is_stmt 0 view .LVU3553 - 11236 027c 0A4B ldr r3, .L679+28 - 11237 027e 0122 movs r2, #1 - 11238 0280 1A70 strb r2, [r3] - 411:Src/main.c **** break; - 11239 .loc 1 411 6 is_stmt 1 view .LVU3554 - 411:Src/main.c **** break; - 11240 .loc 1 411 16 is_stmt 0 view .LVU3555 - 11241 0282 074B ldr r3, .L679+20 - 11242 0284 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11243 0286 0C4B ldr r3, .L679+44 - 11244 0288 1A70 strb r2, [r3] - 412:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 11245 .loc 1 412 5 is_stmt 1 view .LVU3556 - 11246 028a 38E7 b .L591 - 11247 .L680: - 11248 .align 2 - 11249 .L679: - 11250 028c 00080040 .word 1073743872 - 11251 0290 00000000 .word htim1 - 11252 0294 00000000 .word u_rx_flg - 11253 0298 00100140 .word 1073811456 - 11254 029c 00E100E0 .word -536813312 - 11255 02a0 00000000 .word CPU_state_old - 11256 02a4 00000000 .word task - 11257 02a8 00000000 .word UART_transmission_request - 11258 02ac 00000000 .word State_Data - 11259 02b0 00000000 .word flg_tmt - 11260 02b4 00000240 .word 1073872896 - 11261 02b8 00000000 .word CPU_state - 11262 02bc 00000000 .word COMMAND - 11263 02c0 00000000 .word CS_result - 11264 02c4 00380040 .word 1073756160 - 11265 02c8 00000000 .word Curr_setup - 11266 02cc 00000000 .word LD2_curr_setup - 11267 02d0 00000000 .word LD1_curr_setup - 11268 02d4 00000000 .word TO6 - 11269 02d8 00000000 .word TO6_before - 11270 02dc 00000000 .word Long_Data - 11271 02e0 00000000 .word temp16 - 11272 .L598: - 414:Src/main.c **** Stop_TIM10(); - 11273 .loc 1 414 6 view .LVU3557 - 414:Src/main.c **** Stop_TIM10(); - 11274 .loc 1 414 31 is_stmt 0 view .LVU3558 - 11275 02e4 B24B ldr r3, .L681 - 11276 02e6 5A68 ldr r2, [r3, #4] @ float - 414:Src/main.c **** Stop_TIM10(); - ARM GAS /tmp/ccEQxcUB.s page 608 + 11382 0272 1370 strb r3, [r2] + 411:Src/main.c **** CPU_state = CPU_state_old; + 11383 .loc 1 411 6 is_stmt 1 view .LVU3590 + 411:Src/main.c **** CPU_state = CPU_state_old; + 11384 .loc 1 411 32 is_stmt 0 view .LVU3591 + 11385 0274 0E4B ldr r3, .L694+28 + 11386 0276 0122 movs r2, #1 + 11387 0278 1A70 strb r2, [r3] + 412:Src/main.c **** break; + 11388 .loc 1 412 6 is_stmt 1 view .LVU3592 + 412:Src/main.c **** break; + 11389 .loc 1 412 16 is_stmt 0 view .LVU3593 + 11390 027a 0B4B ldr r3, .L694+20 + 11391 027c 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11392 027e 104B ldr r3, .L694+44 + 11393 0280 1A70 strb r2, [r3] + 413:Src/main.c **** case STATE://6 - Transmith state message + 11394 .loc 1 413 5 is_stmt 1 view .LVU3594 + 11395 0282 3EE7 b .L602 + 11396 .L611: + 415:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11397 .loc 1 415 6 view .LVU3595 + 415:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11398 .loc 1 415 32 is_stmt 0 view .LVU3596 + 11399 0284 0A4B ldr r3, .L694+28 + 11400 0286 0122 movs r2, #1 + 11401 0288 1A70 strb r2, [r3] + 416:Src/main.c **** break; + 11402 .loc 1 416 6 is_stmt 1 view .LVU3597 + 416:Src/main.c **** break; + 11403 .loc 1 416 16 is_stmt 0 view .LVU3598 + 11404 028a 074B ldr r3, .L694+20 + 11405 028c 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11406 028e 0C4B ldr r3, .L694+44 + 11407 0290 1A70 strb r2, [r3] + 417:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 11408 .loc 1 417 5 is_stmt 1 view .LVU3599 + 11409 0292 36E7 b .L602 + 11410 .L695: + 11411 .align 2 + 11412 .L694: + 11413 0294 00080040 .word 1073743872 + 11414 0298 00000000 .word htim1 + 11415 029c 00000000 .word u_rx_flg + 11416 02a0 00100140 .word 1073811456 + 11417 02a4 00E100E0 .word -536813312 + 11418 02a8 00000000 .word CPU_state_old + 11419 02ac 00000000 .word task + 11420 02b0 00000000 .word UART_transmission_request + 11421 02b4 00000000 .word State_Data + 11422 02b8 00000000 .word flg_tmt + 11423 02bc 00000240 .word 1073872896 + 11424 02c0 00000000 .word CPU_state + 11425 02c4 00000000 .word COMMAND + 11426 02c8 00000000 .word CS_result + 11427 02cc 00380040 .word 1073756160 + 11428 02d0 00000000 .word Curr_setup + ARM GAS /tmp/ccuHnxNu.s page 612 - 11277 .loc 1 414 25 view .LVU3559 - 11278 02e8 1A61 str r2, [r3, #16] @ float - 415:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 11279 .loc 1 415 6 is_stmt 1 view .LVU3560 - 11280 02ea FFF7FEFF bl Stop_TIM10 - 11281 .LVL1000: - 416:Src/main.c **** { - 11282 .loc 1 416 6 view .LVU3561 - 416:Src/main.c **** { - 11283 .loc 1 416 13 is_stmt 0 view .LVU3562 - 11284 02ee B14B ldr r3, .L681+4 - 11285 02f0 1B68 ldr r3, [r3] - 11286 02f2 B14A ldr r2, .L681+8 - 11287 02f4 1268 ldr r2, [r2] - 416:Src/main.c **** { - 11288 .loc 1 416 9 view .LVU3563 - 11289 02f6 9342 cmp r3, r2 - 11290 02f8 7FF601AF bls .L591 - 418:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11291 .loc 1 418 7 is_stmt 1 view .LVU3564 - 418:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11292 .loc 1 418 18 is_stmt 0 view .LVU3565 - 11293 02fc AE4A ldr r2, .L681+8 - 11294 02fe 1360 str r3, [r2] - 419:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11295 .loc 1 419 7 is_stmt 1 view .LVU3566 - 419:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11296 .loc 1 419 25 is_stmt 0 view .LVU3567 - 11297 0300 0120 movs r0, #1 - 11298 0302 FFF7FEFF bl MPhD_T - 11299 .LVL1001: - 419:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11300 .loc 1 419 23 discriminator 1 view .LVU3568 - 11301 0306 AD4F ldr r7, .L681+12 - 11302 0308 3881 strh r0, [r7, #8] @ movhi - 420:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11303 .loc 1 420 7 is_stmt 1 view .LVU3569 - 420:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11304 .loc 1 420 25 is_stmt 0 view .LVU3570 - 11305 030a 0120 movs r0, #1 - 11306 030c FFF7FEFF bl MPhD_T - 11307 .LVL1002: - 420:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11308 .loc 1 420 23 discriminator 1 view .LVU3571 - 11309 0310 3881 strh r0, [r7, #8] @ movhi - 421:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11310 .loc 1 421 7 is_stmt 1 view .LVU3572 - 421:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11311 .loc 1 421 25 is_stmt 0 view .LVU3573 - 11312 0312 0220 movs r0, #2 - 11313 0314 FFF7FEFF bl MPhD_T - 11314 .LVL1003: - 421:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11315 .loc 1 421 23 discriminator 1 view .LVU3574 - 11316 0318 A94E ldr r6, .L681+16 - 11317 031a 3081 strh r0, [r6, #8] @ movhi - 422:Src/main.c **** - ARM GAS /tmp/ccEQxcUB.s page 609 + 11429 02d4 00000000 .word LD2_curr_setup + 11430 02d8 00000000 .word LD1_curr_setup + 11431 02dc 00000000 .word TO6 + 11432 02e0 00000000 .word TO6_before + 11433 02e4 00000000 .word Long_Data + 11434 02e8 00000000 .word temp16 + 11435 .L610: + 419:Src/main.c **** Stop_TIM10(); + 11436 .loc 1 419 6 view .LVU3600 + 419:Src/main.c **** Stop_TIM10(); + 11437 .loc 1 419 31 is_stmt 0 view .LVU3601 + 11438 02ec B24B ldr r3, .L696 + 11439 02ee 5A68 ldr r2, [r3, #4] @ float + 419:Src/main.c **** Stop_TIM10(); + 11440 .loc 1 419 25 view .LVU3602 + 11441 02f0 1A61 str r2, [r3, #16] @ float + 420:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 11442 .loc 1 420 6 is_stmt 1 view .LVU3603 + 11443 02f2 FFF7FEFF bl Stop_TIM10 + 11444 .LVL1004: + 421:Src/main.c **** { + 11445 .loc 1 421 6 view .LVU3604 + 421:Src/main.c **** { + 11446 .loc 1 421 13 is_stmt 0 view .LVU3605 + 11447 02f6 B14B ldr r3, .L696+4 + 11448 02f8 1B68 ldr r3, [r3] + 11449 02fa B14A ldr r2, .L696+8 + 11450 02fc 1268 ldr r2, [r2] + 421:Src/main.c **** { + 11451 .loc 1 421 9 view .LVU3606 + 11452 02fe 9342 cmp r3, r2 + 11453 0300 7FF6FFAE bls .L602 + 423:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11454 .loc 1 423 7 is_stmt 1 view .LVU3607 + 423:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11455 .loc 1 423 18 is_stmt 0 view .LVU3608 + 11456 0304 AE4A ldr r2, .L696+8 + 11457 0306 1360 str r3, [r2] + 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11458 .loc 1 424 7 is_stmt 1 view .LVU3609 + 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11459 .loc 1 424 25 is_stmt 0 view .LVU3610 + 11460 0308 0120 movs r0, #1 + 11461 030a FFF7FEFF bl MPhD_T + 11462 .LVL1005: + 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11463 .loc 1 424 23 discriminator 1 view .LVU3611 + 11464 030e AD4F ldr r7, .L696+12 + 11465 0310 3881 strh r0, [r7, #8] @ movhi + 425:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11466 .loc 1 425 7 is_stmt 1 view .LVU3612 + 425:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11467 .loc 1 425 25 is_stmt 0 view .LVU3613 + 11468 0312 0120 movs r0, #1 + 11469 0314 FFF7FEFF bl MPhD_T + 11470 .LVL1006: + 425:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + ARM GAS /tmp/ccuHnxNu.s page 613 - 11318 .loc 1 422 7 is_stmt 1 view .LVU3575 - 422:Src/main.c **** - 11319 .loc 1 422 25 is_stmt 0 view .LVU3576 - 11320 031c 0220 movs r0, #2 - 11321 031e FFF7FEFF bl MPhD_T - 11322 .LVL1004: - 422:Src/main.c **** - 11323 .loc 1 422 23 discriminator 1 view .LVU3577 - 11324 0322 3081 strh r0, [r6, #8] @ movhi - 425:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 11325 .loc 1 425 7 is_stmt 1 view .LVU3578 - 425:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 11326 .loc 1 425 14 is_stmt 0 view .LVU3579 - 11327 0324 0320 movs r0, #3 - 11328 0326 FFF7FEFF bl MPhD_T - 11329 .LVL1005: - 426:Src/main.c **** (void) MPhD_T(4); - 11330 .loc 1 426 7 is_stmt 1 view .LVU3580 - 426:Src/main.c **** (void) MPhD_T(4); - 11331 .loc 1 426 32 is_stmt 0 view .LVU3581 - 11332 032a 0320 movs r0, #3 - 11333 032c FFF7FEFF bl MPhD_T - 11334 .LVL1006: - 426:Src/main.c **** (void) MPhD_T(4); - 11335 .loc 1 426 30 discriminator 1 view .LVU3582 - 11336 0330 3880 strh r0, [r7] @ movhi - 427:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 11337 .loc 1 427 7 is_stmt 1 view .LVU3583 - 427:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 11338 .loc 1 427 14 is_stmt 0 view .LVU3584 - 11339 0332 0420 movs r0, #4 - 11340 0334 FFF7FEFF bl MPhD_T - 11341 .LVL1007: - 428:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 11342 .loc 1 428 7 is_stmt 1 view .LVU3585 - 428:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 11343 .loc 1 428 32 is_stmt 0 view .LVU3586 - 11344 0338 0420 movs r0, #4 - 11345 033a FFF7FEFF bl MPhD_T - 11346 .LVL1008: - 428:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 11347 .loc 1 428 30 discriminator 1 view .LVU3587 - 11348 033e 3080 strh r0, [r6] @ movhi - 429:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 11349 .loc 1 429 7 is_stmt 1 view .LVU3588 - 429:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 11350 .loc 1 429 14 is_stmt 0 view .LVU3589 - 11351 0340 DFF8AC82 ldr r8, .L681+64 - 11352 0344 0122 movs r2, #1 - 11353 0346 3946 mov r1, r7 - 11354 0348 4046 mov r0, r8 - 11355 034a FFF7FEFF bl PID_Controller_Temp - 11356 .LVL1009: - 11357 034e 0146 mov r1, r0 - 429:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 11358 .loc 1 429 13 discriminator 1 view .LVU3590 - 11359 0350 9C4D ldr r5, .L681+20 - ARM GAS /tmp/ccEQxcUB.s page 610 + 11471 .loc 1 425 23 discriminator 1 view .LVU3614 + 11472 0318 3881 strh r0, [r7, #8] @ movhi + 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11473 .loc 1 426 7 is_stmt 1 view .LVU3615 + 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11474 .loc 1 426 25 is_stmt 0 view .LVU3616 + 11475 031a 0220 movs r0, #2 + 11476 031c FFF7FEFF bl MPhD_T + 11477 .LVL1007: + 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11478 .loc 1 426 23 discriminator 1 view .LVU3617 + 11479 0320 A94E ldr r6, .L696+16 + 11480 0322 3081 strh r0, [r6, #8] @ movhi + 427:Src/main.c **** + 11481 .loc 1 427 7 is_stmt 1 view .LVU3618 + 427:Src/main.c **** + 11482 .loc 1 427 25 is_stmt 0 view .LVU3619 + 11483 0324 0220 movs r0, #2 + 11484 0326 FFF7FEFF bl MPhD_T + 11485 .LVL1008: + 427:Src/main.c **** + 11486 .loc 1 427 23 discriminator 1 view .LVU3620 + 11487 032a 3081 strh r0, [r6, #8] @ movhi + 430:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 11488 .loc 1 430 7 is_stmt 1 view .LVU3621 + 430:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 11489 .loc 1 430 14 is_stmt 0 view .LVU3622 + 11490 032c 0320 movs r0, #3 + 11491 032e FFF7FEFF bl MPhD_T + 11492 .LVL1009: + 431:Src/main.c **** (void) MPhD_T(4); + 11493 .loc 1 431 7 is_stmt 1 view .LVU3623 + 431:Src/main.c **** (void) MPhD_T(4); + 11494 .loc 1 431 32 is_stmt 0 view .LVU3624 + 11495 0332 0320 movs r0, #3 + 11496 0334 FFF7FEFF bl MPhD_T + 11497 .LVL1010: + 431:Src/main.c **** (void) MPhD_T(4); + 11498 .loc 1 431 30 discriminator 1 view .LVU3625 + 11499 0338 3880 strh r0, [r7] @ movhi + 432:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 11500 .loc 1 432 7 is_stmt 1 view .LVU3626 + 432:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 11501 .loc 1 432 14 is_stmt 0 view .LVU3627 + 11502 033a 0420 movs r0, #4 + 11503 033c FFF7FEFF bl MPhD_T + 11504 .LVL1011: + 433:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11505 .loc 1 433 7 is_stmt 1 view .LVU3628 + 433:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11506 .loc 1 433 32 is_stmt 0 view .LVU3629 + 11507 0340 0420 movs r0, #4 + 11508 0342 FFF7FEFF bl MPhD_T + 11509 .LVL1012: + 433:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11510 .loc 1 433 30 discriminator 1 view .LVU3630 + 11511 0346 3080 strh r0, [r6] @ movhi + ARM GAS /tmp/ccuHnxNu.s page 614 - 11360 0352 2880 strh r0, [r5] @ movhi - 430:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 11361 .loc 1 430 7 is_stmt 1 view .LVU3591 - 11362 0354 0320 movs r0, #3 - 11363 0356 FFF7FEFF bl Set_LTEC - 11364 .LVL1010: - 431:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 11365 .loc 1 431 7 view .LVU3592 - 431:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 11366 .loc 1 431 14 is_stmt 0 view .LVU3593 - 11367 035a DFF89892 ldr r9, .L681+68 - 11368 035e 0222 movs r2, #2 - 11369 0360 3146 mov r1, r6 - 11370 0362 4846 mov r0, r9 - 11371 0364 FFF7FEFF bl PID_Controller_Temp - 11372 .LVL1011: - 11373 0368 0146 mov r1, r0 - 431:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 11374 .loc 1 431 13 discriminator 1 view .LVU3594 - 11375 036a 2880 strh r0, [r5] @ movhi - 432:Src/main.c **** - 11376 .loc 1 432 7 is_stmt 1 view .LVU3595 - 11377 036c 0420 movs r0, #4 - 11378 036e FFF7FEFF bl Set_LTEC - 11379 .LVL1012: - 434:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 11380 .loc 1 434 7 view .LVU3596 - 434:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 11381 .loc 1 434 31 is_stmt 0 view .LVU3597 - 11382 0372 3B89 ldrh r3, [r7, #8] - 434:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 11383 .loc 1 434 20 view .LVU3598 - 11384 0374 944C ldr r4, .L681+24 - 11385 0376 6380 strh r3, [r4, #2] @ movhi - 435:Src/main.c **** - 11386 .loc 1 435 7 is_stmt 1 view .LVU3599 - 435:Src/main.c **** - 11387 .loc 1 435 31 is_stmt 0 view .LVU3600 - 11388 0378 3389 ldrh r3, [r6, #8] - 435:Src/main.c **** - 11389 .loc 1 435 20 view .LVU3601 - 11390 037a A380 strh r3, [r4, #4] @ movhi - 437:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 11391 .loc 1 437 7 is_stmt 1 view .LVU3602 - 11392 037c B8F80C10 ldrh r1, [r8, #12] - 11393 0380 0120 movs r0, #1 - 11394 0382 FFF7FEFF bl Set_LTEC - 11395 .LVL1013: - 438:Src/main.c **** - 11396 .loc 1 438 7 view .LVU3603 - 11397 0386 B9F80C10 ldrh r1, [r9, #12] - 11398 038a 0220 movs r0, #2 - 11399 038c FFF7FEFF bl Set_LTEC - 11400 .LVL1014: - 442:Src/main.c **** temp16 = Get_ADC(1); - 11401 .loc 1 442 7 view .LVU3604 - 442:Src/main.c **** temp16 = Get_ADC(1); - ARM GAS /tmp/ccEQxcUB.s page 611 + 434:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 11512 .loc 1 434 7 is_stmt 1 view .LVU3631 + 434:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 11513 .loc 1 434 14 is_stmt 0 view .LVU3632 + 11514 0348 DFF8AC82 ldr r8, .L696+64 + 11515 034c 0122 movs r2, #1 + 11516 034e 3946 mov r1, r7 + 11517 0350 4046 mov r0, r8 + 11518 0352 FFF7FEFF bl PID_Controller_Temp + 11519 .LVL1013: + 11520 0356 0146 mov r1, r0 + 434:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 11521 .loc 1 434 13 discriminator 1 view .LVU3633 + 11522 0358 9C4D ldr r5, .L696+20 + 11523 035a 2880 strh r0, [r5] @ movhi + 435:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 11524 .loc 1 435 7 is_stmt 1 view .LVU3634 + 11525 035c 0320 movs r0, #3 + 11526 035e FFF7FEFF bl Set_LTEC + 11527 .LVL1014: + 436:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 11528 .loc 1 436 7 view .LVU3635 + 436:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 11529 .loc 1 436 14 is_stmt 0 view .LVU3636 + 11530 0362 DFF89892 ldr r9, .L696+68 + 11531 0366 0222 movs r2, #2 + 11532 0368 3146 mov r1, r6 + 11533 036a 4846 mov r0, r9 + 11534 036c FFF7FEFF bl PID_Controller_Temp + 11535 .LVL1015: + 11536 0370 0146 mov r1, r0 + 436:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 11537 .loc 1 436 13 discriminator 1 view .LVU3637 + 11538 0372 2880 strh r0, [r5] @ movhi + 437:Src/main.c **** + 11539 .loc 1 437 7 is_stmt 1 view .LVU3638 + 11540 0374 0420 movs r0, #4 + 11541 0376 FFF7FEFF bl Set_LTEC + 11542 .LVL1016: + 439:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 11543 .loc 1 439 7 view .LVU3639 + 439:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 11544 .loc 1 439 31 is_stmt 0 view .LVU3640 + 11545 037a 3B89 ldrh r3, [r7, #8] + 439:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 11546 .loc 1 439 20 view .LVU3641 + 11547 037c 944C ldr r4, .L696+24 + 11548 037e 6380 strh r3, [r4, #2] @ movhi + 440:Src/main.c **** + 11549 .loc 1 440 7 is_stmt 1 view .LVU3642 + 440:Src/main.c **** + 11550 .loc 1 440 31 is_stmt 0 view .LVU3643 + 11551 0380 3389 ldrh r3, [r6, #8] + 440:Src/main.c **** + 11552 .loc 1 440 20 view .LVU3644 + 11553 0382 A380 strh r3, [r4, #4] @ movhi + 442:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + ARM GAS /tmp/ccuHnxNu.s page 615 - 11402 .loc 1 442 16 is_stmt 0 view .LVU3605 - 11403 0390 0020 movs r0, #0 - 11404 0392 FFF7FEFF bl Get_ADC - 11405 .LVL1015: - 442:Src/main.c **** temp16 = Get_ADC(1); - 11406 .loc 1 442 14 discriminator 1 view .LVU3606 - 11407 0396 2880 strh r0, [r5] @ movhi - 443:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 11408 .loc 1 443 7 is_stmt 1 view .LVU3607 - 443:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 11409 .loc 1 443 16 is_stmt 0 view .LVU3608 - 11410 0398 0120 movs r0, #1 - 11411 039a FFF7FEFF bl Get_ADC - 11412 .LVL1016: - 443:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 11413 .loc 1 443 14 discriminator 1 view .LVU3609 - 11414 039e 2880 strh r0, [r5] @ movhi - 444:Src/main.c **** - 11415 .loc 1 444 7 is_stmt 1 view .LVU3610 - 444:Src/main.c **** - 11416 .loc 1 444 20 is_stmt 0 view .LVU3611 - 11417 03a0 E081 strh r0, [r4, #14] @ movhi - 447:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 11418 .loc 1 447 7 is_stmt 1 view .LVU3612 - 447:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 11419 .loc 1 447 16 is_stmt 0 view .LVU3613 - 11420 03a2 0120 movs r0, #1 - 11421 03a4 FFF7FEFF bl Get_ADC - 11422 .LVL1017: - 447:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 11423 .loc 1 447 14 discriminator 1 view .LVU3614 - 11424 03a8 2880 strh r0, [r5] @ movhi - 448:Src/main.c **** - 11425 .loc 1 448 7 is_stmt 1 view .LVU3615 - 448:Src/main.c **** - 11426 .loc 1 448 20 is_stmt 0 view .LVU3616 - 11427 03aa 2082 strh r0, [r4, #16] @ movhi - 451:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 11428 .loc 1 451 7 is_stmt 1 view .LVU3617 - 451:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 11429 .loc 1 451 16 is_stmt 0 view .LVU3618 - 11430 03ac 0120 movs r0, #1 - 11431 03ae FFF7FEFF bl Get_ADC - 11432 .LVL1018: - 451:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 11433 .loc 1 451 14 discriminator 1 view .LVU3619 - 11434 03b2 2880 strh r0, [r5] @ movhi - 452:Src/main.c **** - 11435 .loc 1 452 7 is_stmt 1 view .LVU3620 - 452:Src/main.c **** - 11436 .loc 1 452 20 is_stmt 0 view .LVU3621 - 11437 03b4 6082 strh r0, [r4, #18] @ movhi - 455:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 11438 .loc 1 455 7 is_stmt 1 view .LVU3622 - 455:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 11439 .loc 1 455 16 is_stmt 0 view .LVU3623 - 11440 03b6 0120 movs r0, #1 - ARM GAS /tmp/ccEQxcUB.s page 612 + 11554 .loc 1 442 7 is_stmt 1 view .LVU3645 + 11555 0384 B8F80C10 ldrh r1, [r8, #12] + 11556 0388 0120 movs r0, #1 + 11557 038a FFF7FEFF bl Set_LTEC + 11558 .LVL1017: + 443:Src/main.c **** + 11559 .loc 1 443 7 view .LVU3646 + 11560 038e B9F80C10 ldrh r1, [r9, #12] + 11561 0392 0220 movs r0, #2 + 11562 0394 FFF7FEFF bl Set_LTEC + 11563 .LVL1018: + 447:Src/main.c **** temp16 = Get_ADC(1); + 11564 .loc 1 447 7 view .LVU3647 + 447:Src/main.c **** temp16 = Get_ADC(1); + 11565 .loc 1 447 16 is_stmt 0 view .LVU3648 + 11566 0398 0020 movs r0, #0 + 11567 039a FFF7FEFF bl Get_ADC + 11568 .LVL1019: + 447:Src/main.c **** temp16 = Get_ADC(1); + 11569 .loc 1 447 14 discriminator 1 view .LVU3649 + 11570 039e 2880 strh r0, [r5] @ movhi + 448:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 11571 .loc 1 448 7 is_stmt 1 view .LVU3650 + 448:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 11572 .loc 1 448 16 is_stmt 0 view .LVU3651 + 11573 03a0 0120 movs r0, #1 + 11574 03a2 FFF7FEFF bl Get_ADC + 11575 .LVL1020: + 448:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 11576 .loc 1 448 14 discriminator 1 view .LVU3652 + 11577 03a6 2880 strh r0, [r5] @ movhi + 449:Src/main.c **** + 11578 .loc 1 449 7 is_stmt 1 view .LVU3653 + 449:Src/main.c **** + 11579 .loc 1 449 20 is_stmt 0 view .LVU3654 + 11580 03a8 E081 strh r0, [r4, #14] @ movhi + 452:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 11581 .loc 1 452 7 is_stmt 1 view .LVU3655 + 452:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 11582 .loc 1 452 16 is_stmt 0 view .LVU3656 + 11583 03aa 0120 movs r0, #1 + 11584 03ac FFF7FEFF bl Get_ADC + 11585 .LVL1021: + 452:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 11586 .loc 1 452 14 discriminator 1 view .LVU3657 + 11587 03b0 2880 strh r0, [r5] @ movhi + 453:Src/main.c **** + 11588 .loc 1 453 7 is_stmt 1 view .LVU3658 + 453:Src/main.c **** + 11589 .loc 1 453 20 is_stmt 0 view .LVU3659 + 11590 03b2 2082 strh r0, [r4, #16] @ movhi + 456:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 11591 .loc 1 456 7 is_stmt 1 view .LVU3660 + 456:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 11592 .loc 1 456 16 is_stmt 0 view .LVU3661 + 11593 03b4 0120 movs r0, #1 + 11594 03b6 FFF7FEFF bl Get_ADC + ARM GAS /tmp/ccuHnxNu.s page 616 - 11441 03b8 FFF7FEFF bl Get_ADC - 11442 .LVL1019: - 455:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 11443 .loc 1 455 14 discriminator 1 view .LVU3624 - 11444 03bc 2880 strh r0, [r5] @ movhi - 456:Src/main.c **** - 11445 .loc 1 456 7 is_stmt 1 view .LVU3625 - 456:Src/main.c **** - 11446 .loc 1 456 21 is_stmt 0 view .LVU3626 - 11447 03be A082 strh r0, [r4, #20] @ movhi - 459:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 11448 .loc 1 459 7 is_stmt 1 view .LVU3627 - 459:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 11449 .loc 1 459 16 is_stmt 0 view .LVU3628 - 11450 03c0 0120 movs r0, #1 - 11451 03c2 FFF7FEFF bl Get_ADC - 11452 .LVL1020: - 459:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 11453 .loc 1 459 14 discriminator 1 view .LVU3629 - 11454 03c6 2880 strh r0, [r5] @ movhi - 460:Src/main.c **** temp16 = Get_ADC(2); - 11455 .loc 1 460 7 is_stmt 1 view .LVU3630 - 460:Src/main.c **** temp16 = Get_ADC(2); - 11456 .loc 1 460 21 is_stmt 0 view .LVU3631 - 11457 03c8 E082 strh r0, [r4, #22] @ movhi + 11595 .LVL1022: + 456:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 11596 .loc 1 456 14 discriminator 1 view .LVU3662 + 11597 03ba 2880 strh r0, [r5] @ movhi + 457:Src/main.c **** + 11598 .loc 1 457 7 is_stmt 1 view .LVU3663 + 457:Src/main.c **** + 11599 .loc 1 457 20 is_stmt 0 view .LVU3664 + 11600 03bc 6082 strh r0, [r4, #18] @ movhi + 460:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 11601 .loc 1 460 7 is_stmt 1 view .LVU3665 + 460:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 11602 .loc 1 460 16 is_stmt 0 view .LVU3666 + 11603 03be 0120 movs r0, #1 + 11604 03c0 FFF7FEFF bl Get_ADC + 11605 .LVL1023: + 460:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 11606 .loc 1 460 14 discriminator 1 view .LVU3667 + 11607 03c4 2880 strh r0, [r5] @ movhi 461:Src/main.c **** - 11458 .loc 1 461 7 is_stmt 1 view .LVU3632 + 11608 .loc 1 461 7 is_stmt 1 view .LVU3668 461:Src/main.c **** - 11459 .loc 1 461 16 is_stmt 0 view .LVU3633 - 11460 03ca 0220 movs r0, #2 - 11461 03cc FFF7FEFF bl Get_ADC - 11462 .LVL1021: - 461:Src/main.c **** - 11463 .loc 1 461 14 discriminator 1 view .LVU3634 - 11464 03d0 2880 strh r0, [r5] @ movhi - 464:Src/main.c **** temp16 = Get_ADC(4); - 11465 .loc 1 464 7 is_stmt 1 view .LVU3635 - 464:Src/main.c **** temp16 = Get_ADC(4); - 11466 .loc 1 464 16 is_stmt 0 view .LVU3636 - 11467 03d2 0320 movs r0, #3 - 11468 03d4 FFF7FEFF bl Get_ADC - 11469 .LVL1022: - 464:Src/main.c **** temp16 = Get_ADC(4); - 11470 .loc 1 464 14 discriminator 1 view .LVU3637 - 11471 03d8 2880 strh r0, [r5] @ movhi - 465:Src/main.c **** Long_Data[12] = temp16; - 11472 .loc 1 465 7 is_stmt 1 view .LVU3638 - 465:Src/main.c **** Long_Data[12] = temp16; - 11473 .loc 1 465 16 is_stmt 0 view .LVU3639 - 11474 03da 0420 movs r0, #4 - 11475 03dc FFF7FEFF bl Get_ADC - 11476 .LVL1023: - 465:Src/main.c **** Long_Data[12] = temp16; - 11477 .loc 1 465 14 discriminator 1 view .LVU3640 - 11478 03e0 2880 strh r0, [r5] @ movhi - 466:Src/main.c **** temp16 = Get_ADC(5); - 11479 .loc 1 466 7 is_stmt 1 view .LVU3641 - ARM GAS /tmp/ccEQxcUB.s page 613 + 11609 .loc 1 461 21 is_stmt 0 view .LVU3669 + 11610 03c6 A082 strh r0, [r4, #20] @ movhi + 464:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 11611 .loc 1 464 7 is_stmt 1 view .LVU3670 + 464:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 11612 .loc 1 464 16 is_stmt 0 view .LVU3671 + 11613 03c8 0120 movs r0, #1 + 11614 03ca FFF7FEFF bl Get_ADC + 11615 .LVL1024: + 464:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 11616 .loc 1 464 14 discriminator 1 view .LVU3672 + 11617 03ce 2880 strh r0, [r5] @ movhi + 465:Src/main.c **** temp16 = Get_ADC(2); + 11618 .loc 1 465 7 is_stmt 1 view .LVU3673 + 465:Src/main.c **** temp16 = Get_ADC(2); + 11619 .loc 1 465 21 is_stmt 0 view .LVU3674 + 11620 03d0 E082 strh r0, [r4, #22] @ movhi + 466:Src/main.c **** + 11621 .loc 1 466 7 is_stmt 1 view .LVU3675 + 466:Src/main.c **** + 11622 .loc 1 466 16 is_stmt 0 view .LVU3676 + 11623 03d2 0220 movs r0, #2 + 11624 03d4 FFF7FEFF bl Get_ADC + 11625 .LVL1025: + 466:Src/main.c **** + 11626 .loc 1 466 14 discriminator 1 view .LVU3677 + 11627 03d8 2880 strh r0, [r5] @ movhi + 469:Src/main.c **** temp16 = Get_ADC(4); + 11628 .loc 1 469 7 is_stmt 1 view .LVU3678 + 469:Src/main.c **** temp16 = Get_ADC(4); + 11629 .loc 1 469 16 is_stmt 0 view .LVU3679 + 11630 03da 0320 movs r0, #3 + 11631 03dc FFF7FEFF bl Get_ADC + 11632 .LVL1026: + 469:Src/main.c **** temp16 = Get_ADC(4); + ARM GAS /tmp/ccuHnxNu.s page 617 - 466:Src/main.c **** temp16 = Get_ADC(5); - 11480 .loc 1 466 21 is_stmt 0 view .LVU3642 - 11481 03e2 2083 strh r0, [r4, #24] @ movhi - 467:Src/main.c **** - 11482 .loc 1 467 7 is_stmt 1 view .LVU3643 - 467:Src/main.c **** - 11483 .loc 1 467 16 is_stmt 0 view .LVU3644 - 11484 03e4 0520 movs r0, #5 - 11485 03e6 FFF7FEFF bl Get_ADC - 11486 .LVL1024: - 467:Src/main.c **** - 11487 .loc 1 467 14 discriminator 1 view .LVU3645 - 11488 03ea 2880 strh r0, [r5] @ movhi - 470:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 11489 .loc 1 470 7 is_stmt 1 view .LVU3646 - 470:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 11490 .loc 1 470 16 is_stmt 0 view .LVU3647 - 11491 03ec 774B ldr r3, .L681+28 - 11492 03ee 1B68 ldr r3, [r3] - 11493 03f0 774A ldr r2, .L681+32 - 11494 03f2 1360 str r3, [r2] - 471:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 11495 .loc 1 471 7 is_stmt 1 view .LVU3648 - 471:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 11496 .loc 1 471 20 is_stmt 0 view .LVU3649 - 11497 03f4 E380 strh r3, [r4, #6] @ movhi - 472:Src/main.c **** - 11498 .loc 1 472 7 is_stmt 1 view .LVU3650 - 472:Src/main.c **** - 11499 .loc 1 472 31 is_stmt 0 view .LVU3651 - 11500 03f6 1B0C lsrs r3, r3, #16 - 472:Src/main.c **** - 11501 .loc 1 472 20 view .LVU3652 - 11502 03f8 2381 strh r3, [r4, #8] @ movhi - 475:Src/main.c **** - 11503 .loc 1 475 7 is_stmt 1 view .LVU3653 - 475:Src/main.c **** - 11504 .loc 1 475 31 is_stmt 0 view .LVU3654 - 11505 03fa 3B88 ldrh r3, [r7] - 475:Src/main.c **** - 11506 .loc 1 475 20 view .LVU3655 - 11507 03fc 6381 strh r3, [r4, #10] @ movhi - 478:Src/main.c **** - 11508 .loc 1 478 7 is_stmt 1 view .LVU3656 - 478:Src/main.c **** - 11509 .loc 1 478 31 is_stmt 0 view .LVU3657 - 11510 03fe 3388 ldrh r3, [r6] - 478:Src/main.c **** - 11511 .loc 1 478 20 view .LVU3658 - 11512 0400 A381 strh r3, [r4, #12] @ movhi - 480:Src/main.c **** { - 11513 .loc 1 480 7 is_stmt 1 view .LVU3659 - 480:Src/main.c **** { - 11514 .loc 1 480 21 is_stmt 0 view .LVU3660 - 11515 0402 744B ldr r3, .L681+36 - 11516 0404 DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 - 480:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 614 + 11633 .loc 1 469 14 discriminator 1 view .LVU3680 + 11634 03e0 2880 strh r0, [r5] @ movhi + 470:Src/main.c **** Long_Data[12] = temp16; + 11635 .loc 1 470 7 is_stmt 1 view .LVU3681 + 470:Src/main.c **** Long_Data[12] = temp16; + 11636 .loc 1 470 16 is_stmt 0 view .LVU3682 + 11637 03e2 0420 movs r0, #4 + 11638 03e4 FFF7FEFF bl Get_ADC + 11639 .LVL1027: + 470:Src/main.c **** Long_Data[12] = temp16; + 11640 .loc 1 470 14 discriminator 1 view .LVU3683 + 11641 03e8 2880 strh r0, [r5] @ movhi + 471:Src/main.c **** temp16 = Get_ADC(5); + 11642 .loc 1 471 7 is_stmt 1 view .LVU3684 + 471:Src/main.c **** temp16 = Get_ADC(5); + 11643 .loc 1 471 21 is_stmt 0 view .LVU3685 + 11644 03ea 2083 strh r0, [r4, #24] @ movhi + 472:Src/main.c **** + 11645 .loc 1 472 7 is_stmt 1 view .LVU3686 + 472:Src/main.c **** + 11646 .loc 1 472 16 is_stmt 0 view .LVU3687 + 11647 03ec 0520 movs r0, #5 + 11648 03ee FFF7FEFF bl Get_ADC + 11649 .LVL1028: + 472:Src/main.c **** + 11650 .loc 1 472 14 discriminator 1 view .LVU3688 + 11651 03f2 2880 strh r0, [r5] @ movhi + 475:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 11652 .loc 1 475 7 is_stmt 1 view .LVU3689 + 475:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 11653 .loc 1 475 16 is_stmt 0 view .LVU3690 + 11654 03f4 774B ldr r3, .L696+28 + 11655 03f6 1B68 ldr r3, [r3] + 11656 03f8 774A ldr r2, .L696+32 + 11657 03fa 1360 str r3, [r2] + 476:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 11658 .loc 1 476 7 is_stmt 1 view .LVU3691 + 476:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 11659 .loc 1 476 20 is_stmt 0 view .LVU3692 + 11660 03fc E380 strh r3, [r4, #6] @ movhi + 477:Src/main.c **** + 11661 .loc 1 477 7 is_stmt 1 view .LVU3693 + 477:Src/main.c **** + 11662 .loc 1 477 31 is_stmt 0 view .LVU3694 + 11663 03fe 1B0C lsrs r3, r3, #16 + 477:Src/main.c **** + 11664 .loc 1 477 20 view .LVU3695 + 11665 0400 2381 strh r3, [r4, #8] @ movhi + 480:Src/main.c **** + 11666 .loc 1 480 7 is_stmt 1 view .LVU3696 + 480:Src/main.c **** + 11667 .loc 1 480 31 is_stmt 0 view .LVU3697 + 11668 0402 3B88 ldrh r3, [r7] + 480:Src/main.c **** + 11669 .loc 1 480 20 view .LVU3698 + 11670 0404 6381 strh r3, [r4, #10] @ movhi + 483:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 618 - 11517 .loc 1 480 10 view .LVU3661 - 11518 0406 012B cmp r3, #1 - 11519 0408 03D0 beq .L670 - 11520 .L610: - 487:Src/main.c **** } - 11521 .loc 1 487 7 is_stmt 1 view .LVU3662 - 487:Src/main.c **** } - 11522 .loc 1 487 21 is_stmt 0 view .LVU3663 - 11523 040a 734B ldr r3, .L681+40 - 11524 040c 0722 movs r2, #7 - 11525 040e 1A70 strb r2, [r3] - 11526 0410 75E6 b .L591 - 11527 .L670: - 482:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 11528 .loc 1 482 8 is_stmt 1 view .LVU3664 - 482:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 11529 .loc 1 482 20 is_stmt 0 view .LVU3665 - 11530 0412 0234 adds r4, r4, #2 - 11531 0414 0D21 movs r1, #13 - 11532 0416 2046 mov r0, r4 - 11533 0418 FFF7FEFF bl CalculateChecksum - 11534 .LVL1025: - 11535 041c 0346 mov r3, r0 - 482:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 11536 .loc 1 482 18 discriminator 1 view .LVU3666 - 11537 041e 6F4A ldr r2, .L681+44 - 11538 0420 1080 strh r0, [r2] @ movhi - 483:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 11539 .loc 1 483 8 is_stmt 1 view .LVU3667 - 483:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 11540 .loc 1 483 27 is_stmt 0 view .LVU3668 - 11541 0422 A01E subs r0, r4, #2 - 11542 0424 8383 strh r3, [r0, #28] @ movhi - 484:Src/main.c **** State_Data[0]|=temp16&0xff; - 11543 .loc 1 484 8 is_stmt 1 view .LVU3669 - 484:Src/main.c **** State_Data[0]|=temp16&0xff; - 11544 .loc 1 484 17 is_stmt 0 view .LVU3670 - 11545 0426 FFF7FEFF bl SD_SAVE - 11546 .LVL1026: - 11547 042a 0346 mov r3, r0 - 484:Src/main.c **** State_Data[0]|=temp16&0xff; - 11548 .loc 1 484 15 discriminator 1 view .LVU3671 - 11549 042c 2880 strh r0, [r5] @ movhi - 485:Src/main.c **** } - 11550 .loc 1 485 8 is_stmt 1 view .LVU3672 - 485:Src/main.c **** } - 11551 .loc 1 485 18 is_stmt 0 view .LVU3673 - 11552 042e 6C49 ldr r1, .L681+48 - 11553 0430 0A78 ldrb r2, [r1] @ zero_extendqisi2 - 485:Src/main.c **** } - 11554 .loc 1 485 21 view .LVU3674 - 11555 0432 1343 orrs r3, r3, r2 - 11556 0434 0B70 strb r3, [r1] - 11557 0436 E8E7 b .L610 - 11558 .L595: - 491:Src/main.c **** { - 11559 .loc 1 491 6 is_stmt 1 view .LVU3675 - ARM GAS /tmp/ccEQxcUB.s page 615 + 11671 .loc 1 483 7 is_stmt 1 view .LVU3699 + 483:Src/main.c **** + 11672 .loc 1 483 31 is_stmt 0 view .LVU3700 + 11673 0406 3388 ldrh r3, [r6] + 483:Src/main.c **** + 11674 .loc 1 483 20 view .LVU3701 + 11675 0408 A381 strh r3, [r4, #12] @ movhi + 485:Src/main.c **** { + 11676 .loc 1 485 7 is_stmt 1 view .LVU3702 + 485:Src/main.c **** { + 11677 .loc 1 485 21 is_stmt 0 view .LVU3703 + 11678 040a 744B ldr r3, .L696+36 + 11679 040c DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 + 485:Src/main.c **** { + 11680 .loc 1 485 10 view .LVU3704 + 11681 040e 012B cmp r3, #1 + 11682 0410 03D0 beq .L684 + 11683 .L622: + 492:Src/main.c **** } + 11684 .loc 1 492 7 is_stmt 1 view .LVU3705 + 492:Src/main.c **** } + 11685 .loc 1 492 21 is_stmt 0 view .LVU3706 + 11686 0412 734B ldr r3, .L696+40 + 11687 0414 0722 movs r2, #7 + 11688 0416 1A70 strb r2, [r3] + 11689 0418 73E6 b .L602 + 11690 .L684: + 487:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 11691 .loc 1 487 8 is_stmt 1 view .LVU3707 + 487:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 11692 .loc 1 487 20 is_stmt 0 view .LVU3708 + 11693 041a 0234 adds r4, r4, #2 + 11694 041c 0D21 movs r1, #13 + 11695 041e 2046 mov r0, r4 + 11696 0420 FFF7FEFF bl CalculateChecksum + 11697 .LVL1029: + 11698 0424 0346 mov r3, r0 + 487:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 11699 .loc 1 487 18 discriminator 1 view .LVU3709 + 11700 0426 6F4A ldr r2, .L696+44 + 11701 0428 1080 strh r0, [r2] @ movhi + 488:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 11702 .loc 1 488 8 is_stmt 1 view .LVU3710 + 488:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 11703 .loc 1 488 27 is_stmt 0 view .LVU3711 + 11704 042a A01E subs r0, r4, #2 + 11705 042c 8383 strh r3, [r0, #28] @ movhi + 489:Src/main.c **** State_Data[0]|=temp16&0xff; + 11706 .loc 1 489 8 is_stmt 1 view .LVU3712 + 489:Src/main.c **** State_Data[0]|=temp16&0xff; + 11707 .loc 1 489 17 is_stmt 0 view .LVU3713 + 11708 042e FFF7FEFF bl SD_SAVE + 11709 .LVL1030: + 11710 0432 0346 mov r3, r0 + 489:Src/main.c **** State_Data[0]|=temp16&0xff; + 11711 .loc 1 489 15 discriminator 1 view .LVU3714 + 11712 0434 2880 strh r0, [r5] @ movhi + ARM GAS /tmp/ccuHnxNu.s page 619 - 491:Src/main.c **** { - 11560 .loc 1 491 10 is_stmt 0 view .LVU3676 - 11561 0438 6A4C ldr r4, .L681+52 - 11562 043a 0321 movs r1, #3 - 11563 043c 2046 mov r0, r4 - 11564 043e FFF7FEFF bl CalculateChecksum - 11565 .LVL1027: - 491:Src/main.c **** { - 11566 .loc 1 491 69 discriminator 1 view .LVU3677 - 11567 0442 E388 ldrh r3, [r4, #6] - 491:Src/main.c **** { - 11568 .loc 1 491 9 discriminator 1 view .LVU3678 - 11569 0444 9842 cmp r0, r3 - 11570 0446 0CD0 beq .L671 - 566:Src/main.c **** } - 11571 .loc 1 566 7 is_stmt 1 view .LVU3679 - 566:Src/main.c **** } - 11572 .loc 1 566 17 is_stmt 0 view .LVU3680 - 11573 0448 654A ldr r2, .L681+48 - 11574 044a 1378 ldrb r3, [r2] @ zero_extendqisi2 - 566:Src/main.c **** } - 11575 .loc 1 566 21 view .LVU3681 - 11576 044c 43F00403 orr r3, r3, #4 - 11577 0450 1370 strb r3, [r2] - 11578 .L614: - 568:Src/main.c **** CPU_state = CPU_state_old; - 11579 .loc 1 568 6 is_stmt 1 view .LVU3682 - 568:Src/main.c **** CPU_state = CPU_state_old; - 11580 .loc 1 568 32 is_stmt 0 view .LVU3683 - 11581 0452 654B ldr r3, .L681+56 - 11582 0454 0122 movs r2, #1 - 11583 0456 1A70 strb r2, [r3] - 569:Src/main.c **** break; - 11584 .loc 1 569 6 is_stmt 1 view .LVU3684 - 569:Src/main.c **** break; - 11585 .loc 1 569 16 is_stmt 0 view .LVU3685 - 11586 0458 5F4B ldr r3, .L681+40 - 11587 045a 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11588 045c 634B ldr r3, .L681+60 - 11589 045e 1A70 strb r2, [r3] - 570:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output - 11590 .loc 1 570 5 is_stmt 1 view .LVU3686 - 11591 0460 4DE6 b .L591 - 11592 .L671: - 11593 .LBB703: - 493:Src/main.c **** uint16_t param0 = COMMAND[1]; - 11594 .loc 1 493 7 view .LVU3687 - 493:Src/main.c **** uint16_t param0 = COMMAND[1]; - 11595 .loc 1 493 16 is_stmt 0 view .LVU3688 - 11596 0462 2388 ldrh r3, [r4] - 11597 .LVL1028: - 494:Src/main.c **** uint16_t param1 = COMMAND[2]; - 11598 .loc 1 494 7 is_stmt 1 view .LVU3689 - 494:Src/main.c **** uint16_t param1 = COMMAND[2]; - 11599 .loc 1 494 16 is_stmt 0 view .LVU3690 - 11600 0464 6188 ldrh r1, [r4, #2] - 11601 .LVL1029: - ARM GAS /tmp/ccEQxcUB.s page 616 + 490:Src/main.c **** } + 11713 .loc 1 490 8 is_stmt 1 view .LVU3715 + 490:Src/main.c **** } + 11714 .loc 1 490 18 is_stmt 0 view .LVU3716 + 11715 0436 6C49 ldr r1, .L696+48 + 11716 0438 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 490:Src/main.c **** } + 11717 .loc 1 490 21 view .LVU3717 + 11718 043a 1343 orrs r3, r3, r2 + 11719 043c 0B70 strb r3, [r1] + 11720 043e E8E7 b .L622 + 11721 .L607: + 496:Src/main.c **** { + 11722 .loc 1 496 6 is_stmt 1 view .LVU3718 + 496:Src/main.c **** { + 11723 .loc 1 496 10 is_stmt 0 view .LVU3719 + 11724 0440 6A4C ldr r4, .L696+52 + 11725 0442 0321 movs r1, #3 + 11726 0444 2046 mov r0, r4 + 11727 0446 FFF7FEFF bl CalculateChecksum + 11728 .LVL1031: + 496:Src/main.c **** { + 11729 .loc 1 496 69 discriminator 1 view .LVU3720 + 11730 044a E388 ldrh r3, [r4, #6] + 496:Src/main.c **** { + 11731 .loc 1 496 9 discriminator 1 view .LVU3721 + 11732 044c 9842 cmp r0, r3 + 11733 044e 0CD0 beq .L685 + 571:Src/main.c **** } + 11734 .loc 1 571 7 is_stmt 1 view .LVU3722 + 571:Src/main.c **** } + 11735 .loc 1 571 17 is_stmt 0 view .LVU3723 + 11736 0450 654A ldr r2, .L696+48 + 11737 0452 1378 ldrb r3, [r2] @ zero_extendqisi2 + 571:Src/main.c **** } + 11738 .loc 1 571 21 view .LVU3724 + 11739 0454 43F00403 orr r3, r3, #4 + 11740 0458 1370 strb r3, [r2] + 11741 .L626: + 573:Src/main.c **** CPU_state = CPU_state_old; + 11742 .loc 1 573 6 is_stmt 1 view .LVU3725 + 573:Src/main.c **** CPU_state = CPU_state_old; + 11743 .loc 1 573 32 is_stmt 0 view .LVU3726 + 11744 045a 654B ldr r3, .L696+56 + 11745 045c 0122 movs r2, #1 + 11746 045e 1A70 strb r2, [r3] + 574:Src/main.c **** break; + 11747 .loc 1 574 6 is_stmt 1 view .LVU3727 + 574:Src/main.c **** break; + 11748 .loc 1 574 16 is_stmt 0 view .LVU3728 + 11749 0460 5F4B ldr r3, .L696+40 + 11750 0462 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11751 0464 634B ldr r3, .L696+60 + 11752 0466 1A70 strb r2, [r3] + 575:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output + 11753 .loc 1 575 5 is_stmt 1 view .LVU3729 + 11754 0468 4BE6 b .L602 + ARM GAS /tmp/ccuHnxNu.s page 620 - 495:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 11602 .loc 1 495 7 is_stmt 1 view .LVU3691 - 495:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 11603 .loc 1 495 16 is_stmt 0 view .LVU3692 - 11604 0466 A488 ldrh r4, [r4, #4] - 11605 .LVL1030: - 496:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 11606 .loc 1 496 7 is_stmt 1 view .LVU3693 - 496:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 11607 .loc 1 496 15 is_stmt 0 view .LVU3694 - 11608 0468 03F00106 and r6, r3, #1 - 11609 .LVL1031: - 497:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; - 11610 .loc 1 497 7 is_stmt 1 view .LVU3695 - 497:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; - 11611 .loc 1 497 15 is_stmt 0 view .LVU3696 - 11612 046c C3F34005 ubfx r5, r3, #1, #1 - 11613 .LVL1032: - 498:Src/main.c **** - 11614 .loc 1 498 7 is_stmt 1 view .LVU3697 - 500:Src/main.c **** { - 11615 .loc 1 500 7 view .LVU3698 - 500:Src/main.c **** { - 11616 .loc 1 500 10 is_stmt 0 view .LVU3699 - 11617 0470 13F0040F tst r3, #4 - 11618 0474 1FD0 beq .L612 - 11619 .LBB704: - 502:Src/main.c **** uint16_t samples; - 11620 .loc 1 502 8 is_stmt 1 view .LVU3700 - 11621 .LVL1033: - 503:Src/main.c **** uint8_t hold; - 11622 .loc 1 503 8 view .LVU3701 - 504:Src/main.c **** uint16_t amplitude; - 11623 .loc 1 504 8 view .LVU3702 - 505:Src/main.c **** - 11624 .loc 1 505 8 view .LVU3703 - 507:Src/main.c **** { - 11625 .loc 1 507 8 view .LVU3704 - 507:Src/main.c **** { - 11626 .loc 1 507 11 is_stmt 0 view .LVU3705 - 11627 0476 13F0080F tst r3, #8 - 11628 047a 05D1 bne .L655 - 515:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); - 11629 .loc 1 515 9 is_stmt 1 view .LVU3706 - 11630 .LVL1034: - 516:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; - 11631 .loc 1 516 9 view .LVU3707 - 516:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; - 11632 .loc 1 516 14 is_stmt 0 view .LVU3708 - 11633 047c 04F00F07 and r7, r4, #15 - 11634 .LVL1035: - 517:Src/main.c **** } - 11635 .loc 1 517 9 is_stmt 1 view .LVU3709 - 515:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); - 11636 .loc 1 515 17 is_stmt 0 view .LVU3710 - 11637 0480 0C46 mov r4, r1 - 11638 .LVL1036: - ARM GAS /tmp/ccEQxcUB.s page 617 + 11755 .L685: + 11756 .LBB706: + 498:Src/main.c **** uint16_t param0 = COMMAND[1]; + 11757 .loc 1 498 7 view .LVU3730 + 498:Src/main.c **** uint16_t param0 = COMMAND[1]; + 11758 .loc 1 498 16 is_stmt 0 view .LVU3731 + 11759 046a 2388 ldrh r3, [r4] + 11760 .LVL1032: + 499:Src/main.c **** uint16_t param1 = COMMAND[2]; + 11761 .loc 1 499 7 is_stmt 1 view .LVU3732 + 499:Src/main.c **** uint16_t param1 = COMMAND[2]; + 11762 .loc 1 499 16 is_stmt 0 view .LVU3733 + 11763 046c 6188 ldrh r1, [r4, #2] + 11764 .LVL1033: + 500:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 11765 .loc 1 500 7 is_stmt 1 view .LVU3734 + 500:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 11766 .loc 1 500 16 is_stmt 0 view .LVU3735 + 11767 046e A488 ldrh r4, [r4, #4] + 11768 .LVL1034: + 501:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 11769 .loc 1 501 7 is_stmt 1 view .LVU3736 + 501:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 11770 .loc 1 501 15 is_stmt 0 view .LVU3737 + 11771 0470 03F00106 and r6, r3, #1 + 11772 .LVL1035: + 502:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 11773 .loc 1 502 7 is_stmt 1 view .LVU3738 + 502:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 11774 .loc 1 502 15 is_stmt 0 view .LVU3739 + 11775 0474 C3F34005 ubfx r5, r3, #1, #1 + 11776 .LVL1036: + 503:Src/main.c **** + 11777 .loc 1 503 7 is_stmt 1 view .LVU3740 + 505:Src/main.c **** { + 11778 .loc 1 505 7 view .LVU3741 + 505:Src/main.c **** { + 11779 .loc 1 505 10 is_stmt 0 view .LVU3742 + 11780 0478 13F0040F tst r3, #4 + 11781 047c 1FD0 beq .L624 + 11782 .LBB707: + 507:Src/main.c **** uint16_t samples; + 11783 .loc 1 507 8 is_stmt 1 view .LVU3743 + 11784 .LVL1037: + 508:Src/main.c **** uint8_t hold; + 11785 .loc 1 508 8 view .LVU3744 + 509:Src/main.c **** uint16_t amplitude; + 11786 .loc 1 509 8 view .LVU3745 + 510:Src/main.c **** + 11787 .loc 1 510 8 view .LVU3746 + 512:Src/main.c **** { + 11788 .loc 1 512 8 view .LVU3747 + 512:Src/main.c **** { + 11789 .loc 1 512 11 is_stmt 0 view .LVU3748 + 11790 047e 13F0080F tst r3, #8 + 11791 0482 05D1 bne .L669 + 520:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); + ARM GAS /tmp/ccuHnxNu.s page 621 - 517:Src/main.c **** } - 11639 .loc 1 517 19 view .LVU3711 - 11640 0482 41F6FF71 movw r1, #8191 - 11641 .LVL1037: - 517:Src/main.c **** } - 11642 .loc 1 517 19 view .LVU3712 - 11643 0486 00E0 b .L613 - 11644 .LVL1038: - 11645 .L655: - 511:Src/main.c **** } - 11646 .loc 1 511 14 view .LVU3713 - 11647 0488 0127 movs r7, #1 - 11648 .LVL1039: - 11649 .L613: - 520:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11650 .loc 1 520 8 is_stmt 1 view .LVU3714 - 520:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11651 .loc 1 520 30 is_stmt 0 view .LVU3715 - 11652 048a 0091 str r1, [sp] - 11653 048c 2B46 mov r3, r5 - 11654 .LVL1040: - 520:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11655 .loc 1 520 30 view .LVU3716 - 11656 048e 3A46 mov r2, r7 - 11657 0490 2146 mov r1, r4 - 11658 .LVL1041: - 520:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11659 .loc 1 520 30 view .LVU3717 - 11660 0492 3046 mov r0, r6 - 11661 0494 FFF7FEFF bl AD9102_ApplySram - 11662 .LVL1042: - 521:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) - 11663 .loc 1 521 8 is_stmt 1 view .LVU3718 - 521:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) - 11664 .loc 1 521 22 is_stmt 0 view .LVU3719 - 11665 0498 514B ldr r3, .L681+48 - 11666 049a 5870 strb r0, [r3, #1] - 522:Src/main.c **** { - 11667 .loc 1 522 8 is_stmt 1 view .LVU3720 - 522:Src/main.c **** { - 11668 .loc 1 522 12 is_stmt 0 view .LVU3721 - 11669 049c 3B46 mov r3, r7 - 11670 049e 2246 mov r2, r4 - 11671 04a0 3146 mov r1, r6 - 11672 04a2 FFF7FEFF bl AD9102_CheckFlagsSram - 11673 .LVL1043: - 522:Src/main.c **** { - 11674 .loc 1 522 11 discriminator 1 view .LVU3722 - 11675 04a6 0028 cmp r0, #0 - 11676 04a8 D3D0 beq .L614 - 524:Src/main.c **** } - 11677 .loc 1 524 9 is_stmt 1 view .LVU3723 - 524:Src/main.c **** } - 11678 .loc 1 524 19 is_stmt 0 view .LVU3724 - 11679 04aa 4D4A ldr r2, .L681+48 - 11680 04ac 1378 ldrb r3, [r2] @ zero_extendqisi2 - 524:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 618 + 11792 .loc 1 520 9 is_stmt 1 view .LVU3749 + 11793 .LVL1038: + 521:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; + 11794 .loc 1 521 9 view .LVU3750 + 521:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; + 11795 .loc 1 521 14 is_stmt 0 view .LVU3751 + 11796 0484 04F00F07 and r7, r4, #15 + 11797 .LVL1039: + 522:Src/main.c **** } + 11798 .loc 1 522 9 is_stmt 1 view .LVU3752 + 520:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); + 11799 .loc 1 520 17 is_stmt 0 view .LVU3753 + 11800 0488 0C46 mov r4, r1 + 11801 .LVL1040: + 522:Src/main.c **** } + 11802 .loc 1 522 19 view .LVU3754 + 11803 048a 41F6FF71 movw r1, #8191 + 11804 .LVL1041: + 522:Src/main.c **** } + 11805 .loc 1 522 19 view .LVU3755 + 11806 048e 00E0 b .L625 + 11807 .LVL1042: + 11808 .L669: + 516:Src/main.c **** } + 11809 .loc 1 516 14 view .LVU3756 + 11810 0490 0127 movs r7, #1 + 11811 .LVL1043: + 11812 .L625: + 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 11813 .loc 1 525 8 is_stmt 1 view .LVU3757 + 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 11814 .loc 1 525 30 is_stmt 0 view .LVU3758 + 11815 0492 0091 str r1, [sp] + 11816 0494 2B46 mov r3, r5 + 11817 .LVL1044: + 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 11818 .loc 1 525 30 view .LVU3759 + 11819 0496 3A46 mov r2, r7 + 11820 0498 2146 mov r1, r4 + 11821 .LVL1045: + 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 11822 .loc 1 525 30 view .LVU3760 + 11823 049a 3046 mov r0, r6 + 11824 049c FFF7FEFF bl AD9102_ApplySram + 11825 .LVL1046: + 526:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 11826 .loc 1 526 8 is_stmt 1 view .LVU3761 + 526:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 11827 .loc 1 526 22 is_stmt 0 view .LVU3762 + 11828 04a0 514B ldr r3, .L696+48 + 11829 04a2 5870 strb r0, [r3, #1] + 527:Src/main.c **** { + 11830 .loc 1 527 8 is_stmt 1 view .LVU3763 + 527:Src/main.c **** { + 11831 .loc 1 527 12 is_stmt 0 view .LVU3764 + 11832 04a4 3B46 mov r3, r7 + 11833 04a6 2246 mov r2, r4 + ARM GAS /tmp/ccuHnxNu.s page 622 - 11681 .loc 1 524 23 view .LVU3725 - 11682 04ae 63F07F03 orn r3, r3, #127 - 11683 04b2 1370 strb r3, [r2] - 11684 04b4 CDE7 b .L614 - 11685 .LVL1044: - 11686 .L612: - 524:Src/main.c **** } - 11687 .loc 1 524 23 view .LVU3726 - 11688 .LBE704: - 11689 .LBB705: - 529:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 11690 .loc 1 529 8 is_stmt 1 view .LVU3727 - 529:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 11691 .loc 1 529 16 is_stmt 0 view .LVU3728 - 11692 04b6 05B1 cbz r5, .L615 - 529:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 11693 .loc 1 529 16 discriminator 1 view .LVU3729 - 11694 04b8 0225 movs r5, #2 - 11695 .LVL1045: - 11696 .L615: - 530:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 11697 .loc 1 530 8 is_stmt 1 view .LVU3730 - 530:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 11698 .loc 1 530 16 is_stmt 0 view .LVU3731 - 11699 04ba CFB2 uxtb r7, r1 - 11700 .LVL1046: - 531:Src/main.c **** uint16_t pat_period = param1; - 11701 .loc 1 531 8 is_stmt 1 view .LVU3732 - 531:Src/main.c **** uint16_t pat_period = param1; - 11702 .loc 1 531 16 is_stmt 0 view .LVU3733 - 11703 04bc C1F30328 ubfx r8, r1, #8, #4 - 11704 .LVL1047: - 532:Src/main.c **** - 11705 .loc 1 532 8 is_stmt 1 view .LVU3734 - 534:Src/main.c **** { - 11706 .loc 1 534 8 view .LVU3735 - 534:Src/main.c **** { - 11707 .loc 1 534 11 is_stmt 0 view .LVU3736 - 11708 04c0 2143 orrs r1, r1, r4 - 11709 .LVL1048: - 534:Src/main.c **** { - 11710 .loc 1 534 11 view .LVU3737 - 11711 04c2 09D0 beq .L656 - 542:Src/main.c **** { - 11712 .loc 1 542 9 is_stmt 1 view .LVU3738 - 542:Src/main.c **** { - 11713 .loc 1 542 12 is_stmt 0 view .LVU3739 - 11714 04c4 1FB1 cbz r7, .L657 - 546:Src/main.c **** { - 11715 .loc 1 546 14 is_stmt 1 view .LVU3740 - 546:Src/main.c **** { - 11716 .loc 1 546 17 is_stmt 0 view .LVU3741 - 11717 04c6 3F2F cmp r7, #63 - 11718 04c8 02D9 bls .L617 - 548:Src/main.c **** } - 11719 .loc 1 548 19 view .LVU3742 - 11720 04ca 3F27 movs r7, #63 - ARM GAS /tmp/ccEQxcUB.s page 619 + 11834 04a8 3146 mov r1, r6 + 11835 04aa FFF7FEFF bl AD9102_CheckFlagsSram + 11836 .LVL1047: + 527:Src/main.c **** { + 11837 .loc 1 527 11 discriminator 1 view .LVU3765 + 11838 04ae 0028 cmp r0, #0 + 11839 04b0 D3D0 beq .L626 + 529:Src/main.c **** } + 11840 .loc 1 529 9 is_stmt 1 view .LVU3766 + 529:Src/main.c **** } + 11841 .loc 1 529 19 is_stmt 0 view .LVU3767 + 11842 04b2 4D4A ldr r2, .L696+48 + 11843 04b4 1378 ldrb r3, [r2] @ zero_extendqisi2 + 529:Src/main.c **** } + 11844 .loc 1 529 23 view .LVU3768 + 11845 04b6 63F07F03 orn r3, r3, #127 + 11846 04ba 1370 strb r3, [r2] + 11847 04bc CDE7 b .L626 + 11848 .LVL1048: + 11849 .L624: + 529:Src/main.c **** } + 11850 .loc 1 529 23 view .LVU3769 + 11851 .LBE707: + 11852 .LBB708: + 534:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 11853 .loc 1 534 8 is_stmt 1 view .LVU3770 + 534:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 11854 .loc 1 534 16 is_stmt 0 view .LVU3771 + 11855 04be 05B1 cbz r5, .L627 + 534:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 11856 .loc 1 534 16 discriminator 1 view .LVU3772 + 11857 04c0 0225 movs r5, #2 + 11858 .LVL1049: + 11859 .L627: + 535:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 11860 .loc 1 535 8 is_stmt 1 view .LVU3773 + 535:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 11861 .loc 1 535 16 is_stmt 0 view .LVU3774 + 11862 04c2 CFB2 uxtb r7, r1 + 11863 .LVL1050: + 536:Src/main.c **** uint16_t pat_period = param1; + 11864 .loc 1 536 8 is_stmt 1 view .LVU3775 + 536:Src/main.c **** uint16_t pat_period = param1; + 11865 .loc 1 536 16 is_stmt 0 view .LVU3776 + 11866 04c4 C1F30328 ubfx r8, r1, #8, #4 + 11867 .LVL1051: + 537:Src/main.c **** + 11868 .loc 1 537 8 is_stmt 1 view .LVU3777 + 539:Src/main.c **** { + 11869 .loc 1 539 8 view .LVU3778 + 539:Src/main.c **** { + 11870 .loc 1 539 11 is_stmt 0 view .LVU3779 + 11871 04c8 2143 orrs r1, r1, r4 + 11872 .LVL1052: + 539:Src/main.c **** { + 11873 .loc 1 539 11 view .LVU3780 + 11874 04ca 09D0 beq .L670 + ARM GAS /tmp/ccuHnxNu.s page 623 - 11721 .LVL1049: - 548:Src/main.c **** } - 11722 .loc 1 548 19 view .LVU3743 - 11723 04cc 00E0 b .L617 - 11724 .LVL1050: - 11725 .L657: - 544:Src/main.c **** } - 11726 .loc 1 544 19 view .LVU3744 - 11727 04ce 0127 movs r7, #1 - 11728 .LVL1051: - 11729 .L617: - 550:Src/main.c **** { - 11730 .loc 1 550 9 is_stmt 1 view .LVU3745 - 550:Src/main.c **** { - 11731 .loc 1 550 12 is_stmt 0 view .LVU3746 - 11732 04d0 3CB9 cbnz r4, .L616 - 552:Src/main.c **** } - 11733 .loc 1 552 21 view .LVU3747 - 11734 04d2 4FF6FF74 movw r4, #65535 - 11735 .LVL1052: - 552:Src/main.c **** } - 11736 .loc 1 552 21 view .LVU3748 - 11737 04d6 04E0 b .L616 - 11738 .LVL1053: - 11739 .L656: - 538:Src/main.c **** } - 11740 .loc 1 538 20 view .LVU3749 - 11741 04d8 4FF6FF74 movw r4, #65535 - 11742 .LVL1054: - 537:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 11743 .loc 1 537 18 view .LVU3750 - 11744 04dc 4FF00208 mov r8, #2 - 11745 .LVL1055: - 536:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; - 11746 .loc 1 536 18 view .LVU3751 - 11747 04e0 0127 movs r7, #1 - 11748 .LVL1056: - 11749 .L616: - 556:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11750 .loc 1 556 8 is_stmt 1 view .LVU3752 - 556:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11751 .loc 1 556 30 is_stmt 0 view .LVU3753 - 11752 04e2 0094 str r4, [sp] - 11753 04e4 4346 mov r3, r8 - 11754 .LVL1057: - 556:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11755 .loc 1 556 30 view .LVU3754 - 11756 04e6 3A46 mov r2, r7 - 11757 04e8 3146 mov r1, r6 - 11758 04ea 2846 mov r0, r5 - 11759 04ec FFF7FEFF bl AD9102_Apply - 11760 .LVL1058: - 557:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 11761 .loc 1 557 8 is_stmt 1 view .LVU3755 - 557:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 11762 .loc 1 557 22 is_stmt 0 view .LVU3756 - 11763 04f0 3B4B ldr r3, .L681+48 - ARM GAS /tmp/ccEQxcUB.s page 620 + 547:Src/main.c **** { + 11875 .loc 1 547 9 is_stmt 1 view .LVU3781 + 547:Src/main.c **** { + 11876 .loc 1 547 12 is_stmt 0 view .LVU3782 + 11877 04cc 1FB1 cbz r7, .L671 + 551:Src/main.c **** { + 11878 .loc 1 551 14 is_stmt 1 view .LVU3783 + 551:Src/main.c **** { + 11879 .loc 1 551 17 is_stmt 0 view .LVU3784 + 11880 04ce 3F2F cmp r7, #63 + 11881 04d0 02D9 bls .L629 + 553:Src/main.c **** } + 11882 .loc 1 553 19 view .LVU3785 + 11883 04d2 3F27 movs r7, #63 + 11884 .LVL1053: + 553:Src/main.c **** } + 11885 .loc 1 553 19 view .LVU3786 + 11886 04d4 00E0 b .L629 + 11887 .LVL1054: + 11888 .L671: + 549:Src/main.c **** } + 11889 .loc 1 549 19 view .LVU3787 + 11890 04d6 0127 movs r7, #1 + 11891 .LVL1055: + 11892 .L629: + 555:Src/main.c **** { + 11893 .loc 1 555 9 is_stmt 1 view .LVU3788 + 555:Src/main.c **** { + 11894 .loc 1 555 12 is_stmt 0 view .LVU3789 + 11895 04d8 3CB9 cbnz r4, .L628 + 557:Src/main.c **** } + 11896 .loc 1 557 21 view .LVU3790 + 11897 04da 4FF6FF74 movw r4, #65535 + 11898 .LVL1056: + 557:Src/main.c **** } + 11899 .loc 1 557 21 view .LVU3791 + 11900 04de 04E0 b .L628 + 11901 .LVL1057: + 11902 .L670: + 543:Src/main.c **** } + 11903 .loc 1 543 20 view .LVU3792 + 11904 04e0 4FF6FF74 movw r4, #65535 + 11905 .LVL1058: + 542:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 11906 .loc 1 542 18 view .LVU3793 + 11907 04e4 4FF00208 mov r8, #2 + 11908 .LVL1059: + 541:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 11909 .loc 1 541 18 view .LVU3794 + 11910 04e8 0127 movs r7, #1 + 11911 .LVL1060: + 11912 .L628: + 561:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 11913 .loc 1 561 8 is_stmt 1 view .LVU3795 + 561:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 11914 .loc 1 561 30 is_stmt 0 view .LVU3796 + 11915 04ea 0094 str r4, [sp] + ARM GAS /tmp/ccuHnxNu.s page 624 - 11764 04f2 5870 strb r0, [r3, #1] - 558:Src/main.c **** { - 11765 .loc 1 558 8 is_stmt 1 view .LVU3757 - 558:Src/main.c **** { - 11766 .loc 1 558 12 is_stmt 0 view .LVU3758 - 11767 04f4 0194 str r4, [sp, #4] - 11768 04f6 CDF80080 str r8, [sp] - 11769 04fa 3B46 mov r3, r7 - 11770 04fc 2A46 mov r2, r5 - 11771 04fe 3146 mov r1, r6 - 11772 0500 FFF7FEFF bl AD9102_CheckFlags - 11773 .LVL1059: - 558:Src/main.c **** { - 11774 .loc 1 558 11 discriminator 1 view .LVU3759 - 11775 0504 0028 cmp r0, #0 - 11776 0506 A4D0 beq .L614 - 560:Src/main.c **** } - 11777 .loc 1 560 9 is_stmt 1 view .LVU3760 - 560:Src/main.c **** } - 11778 .loc 1 560 19 is_stmt 0 view .LVU3761 - 11779 0508 354A ldr r2, .L681+48 - 11780 050a 1378 ldrb r3, [r2] @ zero_extendqisi2 - 560:Src/main.c **** } - 11781 .loc 1 560 23 view .LVU3762 - 11782 050c 63F07F03 orn r3, r3, #127 - 11783 0510 1370 strb r3, [r2] - 11784 0512 9EE7 b .L614 - 11785 .LVL1060: - 11786 .L594: - 560:Src/main.c **** } - 11787 .loc 1 560 23 view .LVU3763 - 11788 .LBE705: - 11789 .LBE703: - 572:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) - 11790 .loc 1 572 6 is_stmt 1 view .LVU3764 - 572:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) - 11791 .loc 1 572 20 is_stmt 0 view .LVU3765 - 11792 0514 324B ldr r3, .L681+48 - 11793 0516 0022 movs r2, #0 - 11794 0518 5A70 strb r2, [r3, #1] - 573:Src/main.c **** { - 11795 .loc 1 573 6 is_stmt 1 view .LVU3766 - 573:Src/main.c **** { - 11796 .loc 1 573 10 is_stmt 0 view .LVU3767 - 11797 051a 324C ldr r4, .L681+52 - 11798 051c 0321 movs r1, #3 - 11799 051e 2046 mov r0, r4 - 11800 0520 FFF7FEFF bl CalculateChecksum - 11801 .LVL1061: - 573:Src/main.c **** { - 11802 .loc 1 573 69 discriminator 1 view .LVU3768 - 11803 0524 E388 ldrh r3, [r4, #6] - 573:Src/main.c **** { - 11804 .loc 1 573 9 discriminator 1 view .LVU3769 - 11805 0526 9842 cmp r0, r3 - 11806 0528 0CD0 beq .L672 - 586:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 621 + 11916 04ec 4346 mov r3, r8 + 11917 .LVL1061: + 561:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 11918 .loc 1 561 30 view .LVU3797 + 11919 04ee 3A46 mov r2, r7 + 11920 04f0 3146 mov r1, r6 + 11921 04f2 2846 mov r0, r5 + 11922 04f4 FFF7FEFF bl AD9102_Apply + 11923 .LVL1062: + 562:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 11924 .loc 1 562 8 is_stmt 1 view .LVU3798 + 562:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 11925 .loc 1 562 22 is_stmt 0 view .LVU3799 + 11926 04f8 3B4B ldr r3, .L696+48 + 11927 04fa 5870 strb r0, [r3, #1] + 563:Src/main.c **** { + 11928 .loc 1 563 8 is_stmt 1 view .LVU3800 + 563:Src/main.c **** { + 11929 .loc 1 563 12 is_stmt 0 view .LVU3801 + 11930 04fc 0194 str r4, [sp, #4] + 11931 04fe CDF80080 str r8, [sp] + 11932 0502 3B46 mov r3, r7 + 11933 0504 2A46 mov r2, r5 + 11934 0506 3146 mov r1, r6 + 11935 0508 FFF7FEFF bl AD9102_CheckFlags + 11936 .LVL1063: + 563:Src/main.c **** { + 11937 .loc 1 563 11 discriminator 1 view .LVU3802 + 11938 050c 0028 cmp r0, #0 + 11939 050e A4D0 beq .L626 + 565:Src/main.c **** } + 11940 .loc 1 565 9 is_stmt 1 view .LVU3803 + 565:Src/main.c **** } + 11941 .loc 1 565 19 is_stmt 0 view .LVU3804 + 11942 0510 354A ldr r2, .L696+48 + 11943 0512 1378 ldrb r3, [r2] @ zero_extendqisi2 + 565:Src/main.c **** } + 11944 .loc 1 565 23 view .LVU3805 + 11945 0514 63F07F03 orn r3, r3, #127 + 11946 0518 1370 strb r3, [r2] + 11947 051a 9EE7 b .L626 + 11948 .LVL1064: + 11949 .L606: + 565:Src/main.c **** } + 11950 .loc 1 565 23 view .LVU3806 + 11951 .LBE708: + 11952 .LBE706: + 577:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) + 11953 .loc 1 577 6 is_stmt 1 view .LVU3807 + 577:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) + 11954 .loc 1 577 20 is_stmt 0 view .LVU3808 + 11955 051c 324B ldr r3, .L696+48 + 11956 051e 0022 movs r2, #0 + 11957 0520 5A70 strb r2, [r3, #1] + 578:Src/main.c **** { + 11958 .loc 1 578 6 is_stmt 1 view .LVU3809 + 578:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 625 - 11807 .loc 1 586 7 is_stmt 1 view .LVU3770 - 586:Src/main.c **** } - 11808 .loc 1 586 17 is_stmt 0 view .LVU3771 - 11809 052a 2D4A ldr r2, .L681+48 - 11810 052c 1378 ldrb r3, [r2] @ zero_extendqisi2 - 586:Src/main.c **** } - 11811 .loc 1 586 21 view .LVU3772 - 11812 052e 43F00403 orr r3, r3, #4 - 11813 0532 1370 strb r3, [r2] - 11814 .L619: - 588:Src/main.c **** CPU_state = CPU_state_old; - 11815 .loc 1 588 6 is_stmt 1 view .LVU3773 - 588:Src/main.c **** CPU_state = CPU_state_old; - 11816 .loc 1 588 32 is_stmt 0 view .LVU3774 - 11817 0534 2C4B ldr r3, .L681+56 - 11818 0536 0122 movs r2, #1 - 11819 0538 1A70 strb r2, [r3] - 589:Src/main.c **** break; - 11820 .loc 1 589 6 is_stmt 1 view .LVU3775 - 589:Src/main.c **** break; - 11821 .loc 1 589 16 is_stmt 0 view .LVU3776 - 11822 053a 274B ldr r3, .L681+40 - 11823 053c 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11824 053e 2B4B ldr r3, .L681+60 - 11825 0540 1A70 strb r2, [r3] - 590:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls - 11826 .loc 1 590 5 is_stmt 1 view .LVU3777 - 11827 0542 DCE5 b .L591 - 11828 .L672: - 11829 .LBB706: - 575:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); - 11830 .loc 1 575 7 view .LVU3778 - 575:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); - 11831 .loc 1 575 16 is_stmt 0 view .LVU3779 - 11832 0544 2088 ldrh r0, [r4] - 11833 .LVL1062: - 576:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 11834 .loc 1 576 7 is_stmt 1 view .LVU3780 - 576:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 11835 .loc 1 576 40 is_stmt 0 view .LVU3781 - 11836 0546 6388 ldrh r3, [r4, #2] - 576:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 11837 .loc 1 576 16 view .LVU3782 - 11838 0548 C3F30D03 ubfx r3, r3, #0, #14 - 11839 .LVL1063: - 577:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 11840 .loc 1 577 7 is_stmt 1 view .LVU3783 - 577:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 11841 .loc 1 577 40 is_stmt 0 view .LVU3784 - 11842 054c A288 ldrh r2, [r4, #4] - 577:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 11843 .loc 1 577 16 view .LVU3785 - 11844 054e C2F30D02 ubfx r2, r2, #0, #14 - 11845 .LVL1064: - 578:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; - 11846 .loc 1 578 7 is_stmt 1 view .LVU3786 - 579:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; - ARM GAS /tmp/ccEQxcUB.s page 622 + 11959 .loc 1 578 10 is_stmt 0 view .LVU3810 + 11960 0522 324C ldr r4, .L696+52 + 11961 0524 0321 movs r1, #3 + 11962 0526 2046 mov r0, r4 + 11963 0528 FFF7FEFF bl CalculateChecksum + 11964 .LVL1065: + 578:Src/main.c **** { + 11965 .loc 1 578 69 discriminator 1 view .LVU3811 + 11966 052c E388 ldrh r3, [r4, #6] + 578:Src/main.c **** { + 11967 .loc 1 578 9 discriminator 1 view .LVU3812 + 11968 052e 9842 cmp r0, r3 + 11969 0530 0CD0 beq .L686 + 591:Src/main.c **** } + 11970 .loc 1 591 7 is_stmt 1 view .LVU3813 + 591:Src/main.c **** } + 11971 .loc 1 591 17 is_stmt 0 view .LVU3814 + 11972 0532 2D4A ldr r2, .L696+48 + 11973 0534 1378 ldrb r3, [r2] @ zero_extendqisi2 + 591:Src/main.c **** } + 11974 .loc 1 591 21 view .LVU3815 + 11975 0536 43F00403 orr r3, r3, #4 + 11976 053a 1370 strb r3, [r2] + 11977 .L631: + 593:Src/main.c **** CPU_state = CPU_state_old; + 11978 .loc 1 593 6 is_stmt 1 view .LVU3816 + 593:Src/main.c **** CPU_state = CPU_state_old; + 11979 .loc 1 593 32 is_stmt 0 view .LVU3817 + 11980 053c 2C4B ldr r3, .L696+56 + 11981 053e 0122 movs r2, #1 + 11982 0540 1A70 strb r2, [r3] + 594:Src/main.c **** break; + 11983 .loc 1 594 6 is_stmt 1 view .LVU3818 + 594:Src/main.c **** break; + 11984 .loc 1 594 16 is_stmt 0 view .LVU3819 + 11985 0542 274B ldr r3, .L696+40 + 11986 0544 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11987 0546 2B4B ldr r3, .L696+60 + 11988 0548 1A70 strb r2, [r3] + 595:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls + 11989 .loc 1 595 5 is_stmt 1 view .LVU3820 + 11990 054a DAE5 b .L602 + 11991 .L686: + 11992 .LBB709: + 580:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); + 11993 .loc 1 580 7 view .LVU3821 + 580:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); + 11994 .loc 1 580 16 is_stmt 0 view .LVU3822 + 11995 054c 2088 ldrh r0, [r4] + 11996 .LVL1066: + 581:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 11997 .loc 1 581 7 is_stmt 1 view .LVU3823 + 581:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 11998 .loc 1 581 40 is_stmt 0 view .LVU3824 + 11999 054e 6388 ldrh r3, [r4, #2] + 581:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 12000 .loc 1 581 16 view .LVU3825 + ARM GAS /tmp/ccuHnxNu.s page 626 - 11847 .loc 1 579 7 view .LVU3787 - 580:Src/main.c **** - 11848 .loc 1 580 7 view .LVU3788 - 582:Src/main.c **** } - 11849 .loc 1 582 7 view .LVU3789 - 11850 0552 43EA8232 orr r2, r3, r2, lsl #14 - 11851 .LVL1065: - 582:Src/main.c **** } - 11852 .loc 1 582 7 is_stmt 0 view .LVU3790 - 11853 0556 C0F34001 ubfx r1, r0, #1, #1 - 11854 055a 00F00100 and r0, r0, #1 - 11855 .LVL1066: - 582:Src/main.c **** } - 11856 .loc 1 582 7 view .LVU3791 - 11857 055e FFF7FEFF bl AD9833_Apply - 11858 .LVL1067: - 582:Src/main.c **** } - 11859 .loc 1 582 7 view .LVU3792 - 11860 .LBE706: - 11861 0562 E7E7 b .L619 - 11862 .LVL1068: - 11863 .L592: - 592:Src/main.c **** { - 11864 .loc 1 592 6 is_stmt 1 view .LVU3793 - 592:Src/main.c **** { - 11865 .loc 1 592 10 is_stmt 0 view .LVU3794 - 11866 0564 1F4C ldr r4, .L681+52 - 11867 0566 0321 movs r1, #3 - 11868 0568 2046 mov r0, r4 - 11869 056a FFF7FEFF bl CalculateChecksum - 11870 .LVL1069: - 592:Src/main.c **** { - 11871 .loc 1 592 69 discriminator 1 view .LVU3795 - 11872 056e E388 ldrh r3, [r4, #6] - 592:Src/main.c **** { - 11873 .loc 1 592 9 discriminator 1 view .LVU3796 - 11874 0570 9842 cmp r0, r3 - 11875 0572 0CD0 beq .L673 - 627:Src/main.c **** } - 11876 .loc 1 627 7 is_stmt 1 view .LVU3797 - 627:Src/main.c **** } - 11877 .loc 1 627 17 is_stmt 0 view .LVU3798 - 11878 0574 1A4A ldr r2, .L681+48 - 11879 0576 1378 ldrb r3, [r2] @ zero_extendqisi2 - 627:Src/main.c **** } - 11880 .loc 1 627 21 view .LVU3799 - 11881 0578 43F00403 orr r3, r3, #4 - 11882 057c 1370 strb r3, [r2] - 11883 .L622: - 629:Src/main.c **** CPU_state = CPU_state_old; - 11884 .loc 1 629 6 is_stmt 1 view .LVU3800 - 629:Src/main.c **** CPU_state = CPU_state_old; - 11885 .loc 1 629 32 is_stmt 0 view .LVU3801 - 11886 057e 1A4B ldr r3, .L681+56 - 11887 0580 0122 movs r2, #1 - 11888 0582 1A70 strb r2, [r3] - 630:Src/main.c **** break; - ARM GAS /tmp/ccEQxcUB.s page 623 + 12001 0550 C3F30D03 ubfx r3, r3, #0, #14 + 12002 .LVL1067: + 582:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 12003 .loc 1 582 7 is_stmt 1 view .LVU3826 + 582:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 12004 .loc 1 582 40 is_stmt 0 view .LVU3827 + 12005 0554 A288 ldrh r2, [r4, #4] + 582:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 12006 .loc 1 582 16 view .LVU3828 + 12007 0556 C2F30D02 ubfx r2, r2, #0, #14 + 12008 .LVL1068: + 583:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; + 12009 .loc 1 583 7 is_stmt 1 view .LVU3829 + 584:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; + 12010 .loc 1 584 7 view .LVU3830 + 585:Src/main.c **** + 12011 .loc 1 585 7 view .LVU3831 + 587:Src/main.c **** } + 12012 .loc 1 587 7 view .LVU3832 + 12013 055a 43EA8232 orr r2, r3, r2, lsl #14 + 12014 .LVL1069: + 587:Src/main.c **** } + 12015 .loc 1 587 7 is_stmt 0 view .LVU3833 + 12016 055e C0F34001 ubfx r1, r0, #1, #1 + 12017 0562 00F00100 and r0, r0, #1 + 12018 .LVL1070: + 587:Src/main.c **** } + 12019 .loc 1 587 7 view .LVU3834 + 12020 0566 FFF7FEFF bl AD9833_Apply + 12021 .LVL1071: + 587:Src/main.c **** } + 12022 .loc 1 587 7 view .LVU3835 + 12023 .LBE709: + 12024 056a E7E7 b .L631 + 12025 .LVL1072: + 12026 .L605: + 597:Src/main.c **** { + 12027 .loc 1 597 6 is_stmt 1 view .LVU3836 + 597:Src/main.c **** { + 12028 .loc 1 597 10 is_stmt 0 view .LVU3837 + 12029 056c 1F4C ldr r4, .L696+52 + 12030 056e 0321 movs r1, #3 + 12031 0570 2046 mov r0, r4 + 12032 0572 FFF7FEFF bl CalculateChecksum + 12033 .LVL1073: + 597:Src/main.c **** { + 12034 .loc 1 597 69 discriminator 1 view .LVU3838 + 12035 0576 E388 ldrh r3, [r4, #6] + 597:Src/main.c **** { + 12036 .loc 1 597 9 discriminator 1 view .LVU3839 + 12037 0578 9842 cmp r0, r3 + 12038 057a 0CD0 beq .L687 + 632:Src/main.c **** } + 12039 .loc 1 632 7 is_stmt 1 view .LVU3840 + 632:Src/main.c **** } + 12040 .loc 1 632 17 is_stmt 0 view .LVU3841 + 12041 057c 1A4A ldr r2, .L696+48 + ARM GAS /tmp/ccuHnxNu.s page 627 - 11889 .loc 1 630 6 is_stmt 1 view .LVU3802 - 630:Src/main.c **** break; - 11890 .loc 1 630 16 is_stmt 0 view .LVU3803 - 11891 0584 144B ldr r3, .L681+40 - 11892 0586 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11893 0588 184B ldr r3, .L681+60 - 11894 058a 1A70 strb r2, [r3] - 631:Src/main.c **** case DECODE_TASK: - 11895 .loc 1 631 5 is_stmt 1 view .LVU3804 - 11896 058c B7E5 b .L591 - 11897 .L673: - 11898 .LBB707: - 594:Src/main.c **** uint16_t count = COMMAND[1]; - 11899 .loc 1 594 7 view .LVU3805 - 594:Src/main.c **** uint16_t count = COMMAND[1]; - 11900 .loc 1 594 16 is_stmt 0 view .LVU3806 - 11901 058e 2346 mov r3, r4 - 11902 0590 2488 ldrh r4, [r4] - 11903 .LVL1070: - 595:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; - 11904 .loc 1 595 7 is_stmt 1 view .LVU3807 - 595:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; - 11905 .loc 1 595 16 is_stmt 0 view .LVU3808 - 11906 0592 5A88 ldrh r2, [r3, #2] - 11907 .LVL1071: - 596:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; - 11908 .loc 1 596 7 is_stmt 1 view .LVU3809 - 596:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; - 11909 .loc 1 596 16 is_stmt 0 view .LVU3810 - 11910 0594 9B88 ldrh r3, [r3, #4] - 11911 .LVL1072: - 597:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; - 11912 .loc 1 597 7 is_stmt 1 view .LVU3811 - 598:Src/main.c **** - 11913 .loc 1 598 7 view .LVU3812 - 598:Src/main.c **** - 11914 .loc 1 598 15 is_stmt 0 view .LVU3813 - 11915 0596 C4F34001 ubfx r1, r4, #1, #1 - 11916 .LVL1073: - 600:Src/main.c **** { - 11917 .loc 1 600 7 is_stmt 1 view .LVU3814 - 600:Src/main.c **** { - 11918 .loc 1 600 11 is_stmt 0 view .LVU3815 - 11919 059a 04F00100 and r0, r4, #1 - 600:Src/main.c **** { - 11920 .loc 1 600 10 view .LVU3816 - 11921 059e 0C42 tst r4, r1 - 11922 05a0 2AD0 beq .L621 - 602:Src/main.c **** } - 11923 .loc 1 602 8 is_stmt 1 view .LVU3817 - 602:Src/main.c **** } - 11924 .loc 1 602 18 is_stmt 0 view .LVU3818 - 11925 05a2 0F4A ldr r2, .L681+48 - 11926 .LVL1074: - 602:Src/main.c **** } - 11927 .loc 1 602 18 view .LVU3819 - 11928 05a4 1378 ldrb r3, [r2] @ zero_extendqisi2 - ARM GAS /tmp/ccEQxcUB.s page 624 + 12042 057e 1378 ldrb r3, [r2] @ zero_extendqisi2 + 632:Src/main.c **** } + 12043 .loc 1 632 21 view .LVU3842 + 12044 0580 43F00403 orr r3, r3, #4 + 12045 0584 1370 strb r3, [r2] + 12046 .L634: + 634:Src/main.c **** CPU_state = CPU_state_old; + 12047 .loc 1 634 6 is_stmt 1 view .LVU3843 + 634:Src/main.c **** CPU_state = CPU_state_old; + 12048 .loc 1 634 32 is_stmt 0 view .LVU3844 + 12049 0586 1A4B ldr r3, .L696+56 + 12050 0588 0122 movs r2, #1 + 12051 058a 1A70 strb r2, [r3] + 635:Src/main.c **** break; + 12052 .loc 1 635 6 is_stmt 1 view .LVU3845 + 635:Src/main.c **** break; + 12053 .loc 1 635 16 is_stmt 0 view .LVU3846 + 12054 058c 144B ldr r3, .L696+40 + 12055 058e 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12056 0590 184B ldr r3, .L696+60 + 12057 0592 1A70 strb r2, [r3] + 636:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4) + 12058 .loc 1 636 5 is_stmt 1 view .LVU3847 + 12059 0594 B5E5 b .L602 + 12060 .L687: + 12061 .LBB710: + 599:Src/main.c **** uint16_t count = COMMAND[1]; + 12062 .loc 1 599 7 view .LVU3848 + 599:Src/main.c **** uint16_t count = COMMAND[1]; + 12063 .loc 1 599 16 is_stmt 0 view .LVU3849 + 12064 0596 2346 mov r3, r4 + 12065 0598 2488 ldrh r4, [r4] + 12066 .LVL1074: + 600:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; + 12067 .loc 1 600 7 is_stmt 1 view .LVU3850 + 600:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; + 12068 .loc 1 600 16 is_stmt 0 view .LVU3851 + 12069 059a 5A88 ldrh r2, [r3, #2] + 12070 .LVL1075: + 601:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; + 12071 .loc 1 601 7 is_stmt 1 view .LVU3852 + 601:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; + 12072 .loc 1 601 16 is_stmt 0 view .LVU3853 + 12073 059c 9B88 ldrh r3, [r3, #4] + 12074 .LVL1076: + 602:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; + 12075 .loc 1 602 7 is_stmt 1 view .LVU3854 + 603:Src/main.c **** + 12076 .loc 1 603 7 view .LVU3855 + 603:Src/main.c **** + 12077 .loc 1 603 15 is_stmt 0 view .LVU3856 + 12078 059e C4F34001 ubfx r1, r4, #1, #1 + 12079 .LVL1077: + 605:Src/main.c **** { + 12080 .loc 1 605 7 is_stmt 1 view .LVU3857 + 605:Src/main.c **** { + 12081 .loc 1 605 11 is_stmt 0 view .LVU3858 + ARM GAS /tmp/ccuHnxNu.s page 628 - 11929 .LVL1075: - 602:Src/main.c **** } - 11930 .loc 1 602 22 view .LVU3820 - 11931 05a6 43F00403 orr r3, r3, #4 - 11932 05aa 1370 strb r3, [r2] - 11933 05ac E7E7 b .L622 - 11934 .L682: - 11935 05ae 00BF .align 2 - 11936 .L681: - 11937 05b0 00000000 .word task - 11938 05b4 00000000 .word TO7 - 11939 05b8 00000000 .word TO7_before - 11940 05bc 00000000 .word LD1_param - 11941 05c0 00000000 .word LD2_param - 11942 05c4 00000000 .word temp16 - 11943 05c8 00000000 .word Long_Data - 11944 05cc 00000000 .word TO6 - 11945 05d0 00000000 .word TO6_stop - 11946 05d4 00000000 .word Curr_setup - 11947 05d8 00000000 .word CPU_state_old - 11948 05dc 00000000 .word CS_result - 11949 05e0 00000000 .word State_Data - 11950 05e4 00000000 .word COMMAND - 11951 05e8 00000000 .word UART_transmission_request - 11952 05ec 00000000 .word CPU_state - 11953 05f0 00000000 .word LD1_curr_setup - 11954 05f4 00000000 .word LD2_curr_setup - 11955 .LVL1076: - 11956 .L621: - 606:Src/main.c **** { - 11957 .loc 1 606 8 is_stmt 1 view .LVU3821 - 606:Src/main.c **** { - 11958 .loc 1 606 11 is_stmt 0 view .LVU3822 - 11959 05f8 1AB1 cbz r2, .L660 - 610:Src/main.c **** { - 11960 .loc 1 610 8 is_stmt 1 view .LVU3823 - 610:Src/main.c **** { - 11961 .loc 1 610 11 is_stmt 0 view .LVU3824 - 11962 05fa 402A cmp r2, #64 - 11963 05fc 02D9 bls .L623 - 612:Src/main.c **** } - 11964 .loc 1 612 15 view .LVU3825 - 11965 05fe 4022 movs r2, #64 - 11966 .LVL1077: - 612:Src/main.c **** } - 11967 .loc 1 612 15 view .LVU3826 - 11968 0600 00E0 b .L623 - 11969 .LVL1078: - 11970 .L660: - 608:Src/main.c **** } - 11971 .loc 1 608 15 view .LVU3827 - 11972 0602 0122 movs r2, #1 - 11973 .LVL1079: - 11974 .L623: - 614:Src/main.c **** { - 11975 .loc 1 614 8 is_stmt 1 view .LVU3828 - 614:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 625 + 12082 05a2 04F00100 and r0, r4, #1 + 605:Src/main.c **** { + 12083 .loc 1 605 10 view .LVU3859 + 12084 05a6 0C42 tst r4, r1 + 12085 05a8 2AD0 beq .L633 + 607:Src/main.c **** } + 12086 .loc 1 607 8 is_stmt 1 view .LVU3860 + 607:Src/main.c **** } + 12087 .loc 1 607 18 is_stmt 0 view .LVU3861 + 12088 05aa 0F4A ldr r2, .L696+48 + 12089 .LVL1078: + 607:Src/main.c **** } + 12090 .loc 1 607 18 view .LVU3862 + 12091 05ac 1378 ldrb r3, [r2] @ zero_extendqisi2 + 12092 .LVL1079: + 607:Src/main.c **** } + 12093 .loc 1 607 22 view .LVU3863 + 12094 05ae 43F00403 orr r3, r3, #4 + 12095 05b2 1370 strb r3, [r2] + 12096 05b4 E7E7 b .L634 + 12097 .L697: + 12098 05b6 00BF .align 2 + 12099 .L696: + 12100 05b8 00000000 .word task + 12101 05bc 00000000 .word TO7 + 12102 05c0 00000000 .word TO7_before + 12103 05c4 00000000 .word LD1_param + 12104 05c8 00000000 .word LD2_param + 12105 05cc 00000000 .word temp16 + 12106 05d0 00000000 .word Long_Data + 12107 05d4 00000000 .word TO6 + 12108 05d8 00000000 .word TO6_stop + 12109 05dc 00000000 .word Curr_setup + 12110 05e0 00000000 .word CPU_state_old + 12111 05e4 00000000 .word CS_result + 12112 05e8 00000000 .word State_Data + 12113 05ec 00000000 .word COMMAND + 12114 05f0 00000000 .word UART_transmission_request + 12115 05f4 00000000 .word CPU_state + 12116 05f8 00000000 .word LD1_curr_setup + 12117 05fc 00000000 .word LD2_curr_setup + 12118 .LVL1080: + 12119 .L633: + 611:Src/main.c **** { + 12120 .loc 1 611 8 is_stmt 1 view .LVU3864 + 611:Src/main.c **** { + 12121 .loc 1 611 11 is_stmt 0 view .LVU3865 + 12122 0600 1AB1 cbz r2, .L674 + 615:Src/main.c **** { + 12123 .loc 1 615 8 is_stmt 1 view .LVU3866 + 615:Src/main.c **** { + 12124 .loc 1 615 11 is_stmt 0 view .LVU3867 + 12125 0602 402A cmp r2, #64 + 12126 0604 02D9 bls .L635 + 617:Src/main.c **** } + 12127 .loc 1 617 15 view .LVU3868 + 12128 0606 4022 movs r2, #64 + ARM GAS /tmp/ccuHnxNu.s page 629 - 11976 .loc 1 614 11 is_stmt 0 view .LVU3829 - 11977 0604 2BB1 cbz r3, .L662 - 618:Src/main.c **** { - 11978 .loc 1 618 8 is_stmt 1 view .LVU3830 - 618:Src/main.c **** { - 11979 .loc 1 618 11 is_stmt 0 view .LVU3831 - 11980 0606 B3F5FA7F cmp r3, #500 - 11981 060a 03D9 bls .L624 - 620:Src/main.c **** } - 11982 .loc 1 620 18 view .LVU3832 - 11983 060c 4FF4FA73 mov r3, #500 - 11984 .LVL1080: - 620:Src/main.c **** } - 11985 .loc 1 620 18 view .LVU3833 - 11986 0610 00E0 b .L624 - 11987 .LVL1081: - 11988 .L662: - 616:Src/main.c **** } - 11989 .loc 1 616 18 view .LVU3834 - 11990 0612 0223 movs r3, #2 - 11991 .LVL1082: - 11992 .L624: - 622:Src/main.c **** } - 11993 .loc 1 622 8 is_stmt 1 view .LVU3835 - 11994 0614 FFF7FEFF bl DS1809_Pulse - 11995 .LVL1083: - 622:Src/main.c **** } - 11996 .loc 1 622 8 is_stmt 0 view .LVU3836 - 11997 0618 B1E7 b .L622 - 11998 .LVL1084: - 11999 .L597: - 622:Src/main.c **** } - 12000 .loc 1 622 8 view .LVU3837 - 12001 .LBE707: - 633:Src/main.c **** { - 12002 .loc 1 633 6 is_stmt 1 view .LVU3838 - 633:Src/main.c **** { - 12003 .loc 1 633 10 is_stmt 0 view .LVU3839 - 12004 061a 9848 ldr r0, .L683 - 12005 061c FFF7FEFF bl CheckChecksum - 12006 .LVL1085: - 633:Src/main.c **** { - 12007 .loc 1 633 9 discriminator 1 view .LVU3840 - 12008 0620 70B9 cbnz r0, .L674 - 642:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 12009 .loc 1 642 7 is_stmt 1 view .LVU3841 - 642:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 12010 .loc 1 642 17 is_stmt 0 view .LVU3842 - 12011 0622 974A ldr r2, .L683+4 - 12012 0624 1378 ldrb r3, [r2] @ zero_extendqisi2 - 642:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 12013 .loc 1 642 21 view .LVU3843 - 12014 0626 43F00403 orr r3, r3, #4 - 12015 062a 1370 strb r3, [r2] - 643:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 12016 .loc 1 643 7 is_stmt 1 view .LVU3844 - 643:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - ARM GAS /tmp/ccEQxcUB.s page 626 + 12129 .LVL1081: + 617:Src/main.c **** } + 12130 .loc 1 617 15 view .LVU3869 + 12131 0608 00E0 b .L635 + 12132 .LVL1082: + 12133 .L674: + 613:Src/main.c **** } + 12134 .loc 1 613 15 view .LVU3870 + 12135 060a 0122 movs r2, #1 + 12136 .LVL1083: + 12137 .L635: + 619:Src/main.c **** { + 12138 .loc 1 619 8 is_stmt 1 view .LVU3871 + 619:Src/main.c **** { + 12139 .loc 1 619 11 is_stmt 0 view .LVU3872 + 12140 060c 2BB1 cbz r3, .L676 + 623:Src/main.c **** { + 12141 .loc 1 623 8 is_stmt 1 view .LVU3873 + 623:Src/main.c **** { + 12142 .loc 1 623 11 is_stmt 0 view .LVU3874 + 12143 060e B3F5FA7F cmp r3, #500 + 12144 0612 03D9 bls .L636 + 625:Src/main.c **** } + 12145 .loc 1 625 18 view .LVU3875 + 12146 0614 4FF4FA73 mov r3, #500 + 12147 .LVL1084: + 625:Src/main.c **** } + 12148 .loc 1 625 18 view .LVU3876 + 12149 0618 00E0 b .L636 + 12150 .LVL1085: + 12151 .L676: + 621:Src/main.c **** } + 12152 .loc 1 621 18 view .LVU3877 + 12153 061a 0223 movs r3, #2 + 12154 .LVL1086: + 12155 .L636: + 627:Src/main.c **** } + 12156 .loc 1 627 8 is_stmt 1 view .LVU3878 + 12157 061c FFF7FEFF bl DS1809_Pulse + 12158 .LVL1087: + 627:Src/main.c **** } + 12159 .loc 1 627 8 is_stmt 0 view .LVU3879 + 12160 0620 B1E7 b .L634 + 12161 .LVL1088: + 12162 .L603: + 627:Src/main.c **** } + 12163 .loc 1 627 8 view .LVU3880 + 12164 .LBE710: + 638:Src/main.c **** { + 12165 .loc 1 638 6 is_stmt 1 view .LVU3881 + 638:Src/main.c **** { + 12166 .loc 1 638 10 is_stmt 0 view .LVU3882 + 12167 0622 A74C ldr r4, .L698 + 12168 0624 0321 movs r1, #3 + 12169 0626 2046 mov r0, r4 + 12170 0628 FFF7FEFF bl CalculateChecksum + 12171 .LVL1089: + ARM GAS /tmp/ccuHnxNu.s page 630 - 12017 .loc 1 643 17 is_stmt 0 view .LVU3845 - 12018 062c 954B ldr r3, .L683+8 - 12019 062e 0222 movs r2, #2 - 12020 0630 1A70 strb r2, [r3] - 644:Src/main.c **** } - 12021 .loc 1 644 7 is_stmt 1 view .LVU3846 - 644:Src/main.c **** } - 12022 .loc 1 644 21 is_stmt 0 view .LVU3847 - 12023 0632 954B ldr r3, .L683+12 - 12024 0634 0022 movs r2, #0 - 12025 0636 1A70 strb r2, [r3] - 12026 .L626: - 646:Src/main.c **** break; - 12027 .loc 1 646 6 is_stmt 1 view .LVU3848 - 646:Src/main.c **** break; - 12028 .loc 1 646 32 is_stmt 0 view .LVU3849 - 12029 0638 944B ldr r3, .L683+16 - 12030 063a 0122 movs r2, #1 - 12031 063c 1A70 strb r2, [r3] - 647:Src/main.c **** case RUN_TASK: - 12032 .loc 1 647 5 is_stmt 1 view .LVU3850 - 12033 063e 5EE5 b .L591 - 12034 .L674: - 635:Src/main.c **** TO6_before = TO6; - 12035 .loc 1 635 7 view .LVU3851 - 12036 0640 934B ldr r3, .L683+20 - 12037 0642 944A ldr r2, .L683+24 - 12038 0644 9449 ldr r1, .L683+28 - 12039 0646 8D48 ldr r0, .L683 - 12040 0648 FFF7FEFF bl Decode_task - 12041 .LVL1086: - 636:Src/main.c **** CPU_state = RUN_TASK; - 12042 .loc 1 636 7 view .LVU3852 - 636:Src/main.c **** CPU_state = RUN_TASK; - 12043 .loc 1 636 18 is_stmt 0 view .LVU3853 - 12044 064c 934B ldr r3, .L683+32 - 12045 064e 1A68 ldr r2, [r3] - 12046 0650 934B ldr r3, .L683+36 - 12047 0652 1A60 str r2, [r3] - 637:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 12048 .loc 1 637 7 is_stmt 1 view .LVU3854 - 637:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 12049 .loc 1 637 17 is_stmt 0 view .LVU3855 - 12050 0654 0923 movs r3, #9 - 12051 0656 8B4A ldr r2, .L683+8 - 12052 0658 1370 strb r3, [r2] - 638:Src/main.c **** } - 12053 .loc 1 638 7 is_stmt 1 view .LVU3856 - 638:Src/main.c **** } - 12054 .loc 1 638 21 is_stmt 0 view .LVU3857 - 12055 065a 8B4A ldr r2, .L683+12 - 12056 065c 1370 strb r3, [r2] - 12057 065e EBE7 b .L626 - 12058 .L596: - 649:Src/main.c **** { - 12059 .loc 1 649 6 is_stmt 1 view .LVU3858 - 649:Src/main.c **** { - ARM GAS /tmp/ccEQxcUB.s page 627 + 638:Src/main.c **** { + 12172 .loc 1 638 72 discriminator 1 view .LVU3883 + 12173 062c E388 ldrh r3, [r4, #6] + 638:Src/main.c **** { + 12174 .loc 1 638 9 discriminator 1 view .LVU3884 + 12175 062e 9842 cmp r0, r3 + 12176 0630 0CD0 beq .L688 + 647:Src/main.c **** } + 12177 .loc 1 647 7 is_stmt 1 view .LVU3885 + 647:Src/main.c **** } + 12178 .loc 1 647 17 is_stmt 0 view .LVU3886 + 12179 0632 A44A ldr r2, .L698+4 + 12180 0634 1378 ldrb r3, [r2] @ zero_extendqisi2 + 647:Src/main.c **** } + 12181 .loc 1 647 21 view .LVU3887 + 12182 0636 43F00403 orr r3, r3, #4 + 12183 063a 1370 strb r3, [r2] + 12184 .L638: + 649:Src/main.c **** CPU_state = CPU_state_old; + 12185 .loc 1 649 6 is_stmt 1 view .LVU3888 + 649:Src/main.c **** CPU_state = CPU_state_old; + 12186 .loc 1 649 32 is_stmt 0 view .LVU3889 + 12187 063c A24B ldr r3, .L698+8 + 12188 063e 0122 movs r2, #1 + 12189 0640 1A70 strb r2, [r3] + 650:Src/main.c **** break; + 12190 .loc 1 650 6 is_stmt 1 view .LVU3890 + 650:Src/main.c **** break; + 12191 .loc 1 650 16 is_stmt 0 view .LVU3891 + 12192 0642 A24B ldr r3, .L698+12 + 12193 0644 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12194 0646 A24B ldr r3, .L698+16 + 12195 0648 1A70 strb r2, [r3] + 651:Src/main.c **** case DECODE_TASK: + 12196 .loc 1 651 5 is_stmt 1 view .LVU3892 + 12197 064a 5AE5 b .L602 + 12198 .L688: + 12199 .LBB711: + 640:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu); + 12200 .loc 1 640 7 view .LVU3893 + 12201 .LVL1090: + 641:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; + 12202 .loc 1 641 7 view .LVU3894 + 641:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; + 12203 .loc 1 641 45 is_stmt 0 view .LVU3895 + 12204 064c 6088 ldrh r0, [r4, #2] + 12205 .LVL1091: + 642:Src/main.c **** PA4_DAC_Set(dac_code, enable); + 12206 .loc 1 642 7 is_stmt 1 view .LVU3896 + 642:Src/main.c **** PA4_DAC_Set(dac_code, enable); + 12207 .loc 1 642 61 is_stmt 0 view .LVU3897 + 12208 064e 2178 ldrb r1, [r4] @ zero_extendqisi2 + 12209 .LVL1092: + 643:Src/main.c **** } + 12210 .loc 1 643 7 is_stmt 1 view .LVU3898 + 12211 0650 01F00101 and r1, r1, #1 + 12212 .LVL1093: + ARM GAS /tmp/ccuHnxNu.s page 631 - 12060 .loc 1 649 18 is_stmt 0 view .LVU3859 - 12061 0660 904B ldr r3, .L683+40 - 12062 0662 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 12063 0664 012B cmp r3, #1 - 12064 0666 23D0 beq .L627 - 12065 0668 022B cmp r3, #2 - 12066 066a 00F03F81 beq .L628 - 12067 .L629: - 904:Src/main.c **** { - 12068 .loc 1 904 6 is_stmt 1 view .LVU3860 - 904:Src/main.c **** { - 12069 .loc 1 904 13 is_stmt 0 view .LVU3861 - 12070 066e 8E4B ldr r3, .L683+44 - 12071 0670 1B68 ldr r3, [r3] - 12072 0672 8E4A ldr r2, .L683+48 - 12073 0674 1268 ldr r2, [r2] - 904:Src/main.c **** { - 12074 .loc 1 904 9 view .LVU3862 - 12075 0676 9342 cmp r3, r2 - 12076 0678 00F2E681 bhi .L675 - 12077 .L646: - 956:Src/main.c **** - 12078 .loc 1 956 13 is_stmt 1 discriminator 1 view .LVU3863 - 12079 067c 8C4B ldr r3, .L683+52 - 12080 067e 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 12081 0680 002B cmp r3, #0 - 12082 0682 FBD0 beq .L646 - 958:Src/main.c **** - 12083 .loc 1 958 6 view .LVU3864 - 12084 0684 FFF7FEFF bl Stop_TIM10 - 12085 .LVL1087: - 960:Src/main.c **** { - 12086 .loc 1 960 6 view .LVU3865 - 960:Src/main.c **** { - 12087 .loc 1 960 14 is_stmt 0 view .LVU3866 - 12088 0688 864B ldr r3, .L683+40 - 12089 068a DB8A ldrh r3, [r3, #22] - 960:Src/main.c **** { - 12090 .loc 1 960 9 view .LVU3867 - 12091 068c 032B cmp r3, #3 - 12092 068e 0BD9 bls .L647 - 962:Src/main.c **** TO10_counter = task.dt / 10; - 12093 .loc 1 962 7 is_stmt 1 view .LVU3868 - 962:Src/main.c **** TO10_counter = task.dt / 10; - 12094 .loc 1 962 26 is_stmt 0 view .LVU3869 - 12095 0690 884B ldr r3, .L683+56 - 12096 0692 1A68 ldr r2, [r3] - 12097 0694 884B ldr r3, .L683+60 - 12098 0696 DA60 str r2, [r3, #12] - 963:Src/main.c **** } - 12099 .loc 1 963 7 is_stmt 1 view .LVU3870 - 963:Src/main.c **** } - 12100 .loc 1 963 26 is_stmt 0 view .LVU3871 - 12101 0698 824B ldr r3, .L683+40 - 12102 069a 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 - 963:Src/main.c **** } - 12103 .loc 1 963 30 view .LVU3872 - ARM GAS /tmp/ccEQxcUB.s page 628 + 643:Src/main.c **** } + 12213 .loc 1 643 7 is_stmt 0 view .LVU3899 + 12214 0654 C0F30B00 ubfx r0, r0, #0, #12 + 12215 .LVL1094: + 643:Src/main.c **** } + 12216 .loc 1 643 7 view .LVU3900 + 12217 0658 FFF7FEFF bl PA4_DAC_Set + 12218 .LVL1095: + 643:Src/main.c **** } + 12219 .loc 1 643 7 view .LVU3901 + 12220 .LBE711: + 12221 065c EEE7 b .L638 + 12222 .LVL1096: + 12223 .L609: + 653:Src/main.c **** { + 12224 .loc 1 653 6 is_stmt 1 view .LVU3902 + 653:Src/main.c **** { + 12225 .loc 1 653 10 is_stmt 0 view .LVU3903 + 12226 065e 9848 ldr r0, .L698 + 12227 0660 FFF7FEFF bl CheckChecksum + 12228 .LVL1097: + 653:Src/main.c **** { + 12229 .loc 1 653 9 discriminator 1 view .LVU3904 + 12230 0664 70B9 cbnz r0, .L689 + 662:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 12231 .loc 1 662 7 is_stmt 1 view .LVU3905 + 662:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 12232 .loc 1 662 17 is_stmt 0 view .LVU3906 + 12233 0666 974A ldr r2, .L698+4 + 12234 0668 1378 ldrb r3, [r2] @ zero_extendqisi2 + 662:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 12235 .loc 1 662 21 view .LVU3907 + 12236 066a 43F00403 orr r3, r3, #4 + 12237 066e 1370 strb r3, [r2] + 663:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 12238 .loc 1 663 7 is_stmt 1 view .LVU3908 + 663:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 12239 .loc 1 663 17 is_stmt 0 view .LVU3909 + 12240 0670 974B ldr r3, .L698+16 + 12241 0672 0222 movs r2, #2 + 12242 0674 1A70 strb r2, [r3] + 664:Src/main.c **** } + 12243 .loc 1 664 7 is_stmt 1 view .LVU3910 + 664:Src/main.c **** } + 12244 .loc 1 664 21 is_stmt 0 view .LVU3911 + 12245 0676 954B ldr r3, .L698+12 + 12246 0678 0022 movs r2, #0 + 12247 067a 1A70 strb r2, [r3] + 12248 .L640: + 666:Src/main.c **** break; + 12249 .loc 1 666 6 is_stmt 1 view .LVU3912 + 666:Src/main.c **** break; + 12250 .loc 1 666 32 is_stmt 0 view .LVU3913 + 12251 067c 924B ldr r3, .L698+8 + 12252 067e 0122 movs r2, #1 + 12253 0680 1A70 strb r2, [r3] + 667:Src/main.c **** case RUN_TASK: + ARM GAS /tmp/ccuHnxNu.s page 632 - 12104 069c 874A ldr r2, .L683+64 - 12105 069e A2FB0323 umull r2, r3, r2, r3 - 12106 06a2 DB08 lsrs r3, r3, #3 - 963:Src/main.c **** } - 12107 .loc 1 963 20 view .LVU3873 - 12108 06a4 864A ldr r2, .L683+68 - 12109 06a6 1360 str r3, [r2] - 12110 .L647: - 966:Src/main.c **** break; - 12111 .loc 1 966 6 is_stmt 1 view .LVU3874 - 966:Src/main.c **** break; - 12112 .loc 1 966 20 is_stmt 0 view .LVU3875 - 12113 06a8 774B ldr r3, .L683+12 - 12114 06aa 0922 movs r2, #9 - 12115 06ac 1A70 strb r2, [r3] - 967:Src/main.c **** } - 12116 .loc 1 967 9 is_stmt 1 view .LVU3876 - 12117 06ae 26E5 b .L591 - 12118 .L627: - 12119 .LBB708: - 671:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12120 .loc 1 671 7 view .LVU3877 - 671:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12121 .loc 1 671 38 is_stmt 0 view .LVU3878 - 12122 06b0 7C4B ldr r3, .L683+40 - 12123 06b2 D3ED077A vldr.32 s15, [r3, #28] - 671:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12124 .loc 1 671 7 view .LVU3879 - 12125 06b6 FCEEE77A vcvt.u32.f32 s15, s15 - 12126 06ba 17EE903A vmov r3, s15 @ int - 12127 06be 99B2 uxth r1, r3 - 12128 06c0 0220 movs r0, #2 - 12129 06c2 FFF7FEFF bl Set_LTEC - 12130 .LVL1088: - 672:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12131 .loc 1 672 7 is_stmt 1 view .LVU3880 - 672:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12132 .loc 1 672 14 is_stmt 0 view .LVU3881 - 12133 06c6 0320 movs r0, #3 - 12134 06c8 FFF7FEFF bl MPhD_T - 12135 .LVL1089: - 673:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12136 .loc 1 673 7 is_stmt 1 view .LVU3882 - 673:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12137 .loc 1 673 32 is_stmt 0 view .LVU3883 - 12138 06cc 0320 movs r0, #3 - 12139 06ce FFF7FEFF bl MPhD_T - 12140 .LVL1090: - 673:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12141 .loc 1 673 30 discriminator 1 view .LVU3884 - 12142 06d2 7C4C ldr r4, .L683+72 - 12143 06d4 2080 strh r0, [r4] @ movhi - 674:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12144 .loc 1 674 7 is_stmt 1 view .LVU3885 - 674:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12145 .loc 1 674 14 is_stmt 0 view .LVU3886 - 12146 06d6 0420 movs r0, #4 - ARM GAS /tmp/ccEQxcUB.s page 629 + 12254 .loc 1 667 5 is_stmt 1 view .LVU3914 + 12255 0682 3EE5 b .L602 + 12256 .L689: + 655:Src/main.c **** TO6_before = TO6; + 12257 .loc 1 655 7 view .LVU3915 + 12258 0684 934B ldr r3, .L698+20 + 12259 0686 944A ldr r2, .L698+24 + 12260 0688 9449 ldr r1, .L698+28 + 12261 068a 8D48 ldr r0, .L698 + 12262 068c FFF7FEFF bl Decode_task + 12263 .LVL1098: + 656:Src/main.c **** CPU_state = RUN_TASK; + 12264 .loc 1 656 7 view .LVU3916 + 656:Src/main.c **** CPU_state = RUN_TASK; + 12265 .loc 1 656 18 is_stmt 0 view .LVU3917 + 12266 0690 934B ldr r3, .L698+32 + 12267 0692 1A68 ldr r2, [r3] + 12268 0694 934B ldr r3, .L698+36 + 12269 0696 1A60 str r2, [r3] + 657:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 12270 .loc 1 657 7 is_stmt 1 view .LVU3918 + 657:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 12271 .loc 1 657 17 is_stmt 0 view .LVU3919 + 12272 0698 0923 movs r3, #9 + 12273 069a 8D4A ldr r2, .L698+16 + 12274 069c 1370 strb r3, [r2] + 658:Src/main.c **** } + 12275 .loc 1 658 7 is_stmt 1 view .LVU3920 + 658:Src/main.c **** } + 12276 .loc 1 658 21 is_stmt 0 view .LVU3921 + 12277 069e 8B4A ldr r2, .L698+12 + 12278 06a0 1370 strb r3, [r2] + 12279 06a2 EBE7 b .L640 + 12280 .L608: + 669:Src/main.c **** { + 12281 .loc 1 669 6 is_stmt 1 view .LVU3922 + 669:Src/main.c **** { + 12282 .loc 1 669 18 is_stmt 0 view .LVU3923 + 12283 06a4 904B ldr r3, .L698+40 + 12284 06a6 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 12285 06a8 012B cmp r3, #1 + 12286 06aa 23D0 beq .L641 + 12287 06ac 022B cmp r3, #2 + 12288 06ae 00F03F81 beq .L642 + 12289 .L643: + 924:Src/main.c **** { + 12290 .loc 1 924 6 is_stmt 1 view .LVU3924 + 924:Src/main.c **** { + 12291 .loc 1 924 13 is_stmt 0 view .LVU3925 + 12292 06b2 8E4B ldr r3, .L698+44 + 12293 06b4 1B68 ldr r3, [r3] + 12294 06b6 8E4A ldr r2, .L698+48 + 12295 06b8 1268 ldr r2, [r2] + 924:Src/main.c **** { + 12296 .loc 1 924 9 view .LVU3926 + 12297 06ba 9342 cmp r3, r2 + 12298 06bc 00F2E681 bhi .L690 + ARM GAS /tmp/ccuHnxNu.s page 633 - 12147 06d8 FFF7FEFF bl MPhD_T - 12148 .LVL1091: - 675:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12149 .loc 1 675 7 is_stmt 1 view .LVU3887 - 675:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12150 .loc 1 675 32 is_stmt 0 view .LVU3888 - 12151 06dc 0420 movs r0, #4 - 12152 06de FFF7FEFF bl MPhD_T - 12153 .LVL1092: - 675:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12154 .loc 1 675 30 discriminator 1 view .LVU3889 - 12155 06e2 794D ldr r5, .L683+76 - 12156 06e4 2880 strh r0, [r5] @ movhi - 676:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12157 .loc 1 676 7 is_stmt 1 view .LVU3890 - 676:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12158 .loc 1 676 14 is_stmt 0 view .LVU3891 - 12159 06e6 0122 movs r2, #1 - 12160 06e8 2146 mov r1, r4 - 12161 06ea 6B48 ldr r0, .L683+28 - 12162 06ec FFF7FEFF bl PID_Controller_Temp - 12163 .LVL1093: - 12164 06f0 0146 mov r1, r0 - 676:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12165 .loc 1 676 13 discriminator 1 view .LVU3892 - 12166 06f2 764C ldr r4, .L683+80 - 12167 06f4 2080 strh r0, [r4] @ movhi - 677:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 12168 .loc 1 677 7 is_stmt 1 view .LVU3893 - 12169 06f6 0320 movs r0, #3 - 12170 06f8 FFF7FEFF bl Set_LTEC - 12171 .LVL1094: - 678:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12172 .loc 1 678 7 view .LVU3894 - 678:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12173 .loc 1 678 14 is_stmt 0 view .LVU3895 - 12174 06fc 0222 movs r2, #2 - 12175 06fe 2946 mov r1, r5 - 12176 0700 6448 ldr r0, .L683+24 - 12177 0702 FFF7FEFF bl PID_Controller_Temp - 12178 .LVL1095: - 12179 0706 0146 mov r1, r0 - 678:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12180 .loc 1 678 13 discriminator 1 view .LVU3896 - 12181 0708 2080 strh r0, [r4] @ movhi - 679:Src/main.c **** - 12182 .loc 1 679 7 is_stmt 1 view .LVU3897 - 12183 070a 0420 movs r0, #4 - 12184 070c FFF7FEFF bl Set_LTEC - 12185 .LVL1096: - 682:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12186 .loc 1 682 7 view .LVU3898 - 12187 0710 6F4C ldr r4, .L683+84 - 12188 0712 0122 movs r2, #1 - 12189 0714 8021 movs r1, #128 - 12190 0716 2046 mov r0, r4 - 12191 0718 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccEQxcUB.s page 630 + 12299 .L660: + 976:Src/main.c **** + 12300 .loc 1 976 13 is_stmt 1 discriminator 1 view .LVU3927 + 12301 06c0 8C4B ldr r3, .L698+52 + 12302 06c2 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 12303 06c4 002B cmp r3, #0 + 12304 06c6 FBD0 beq .L660 + 978:Src/main.c **** + 12305 .loc 1 978 6 view .LVU3928 + 12306 06c8 FFF7FEFF bl Stop_TIM10 + 12307 .LVL1099: + 980:Src/main.c **** { + 12308 .loc 1 980 6 view .LVU3929 + 980:Src/main.c **** { + 12309 .loc 1 980 14 is_stmt 0 view .LVU3930 + 12310 06cc 864B ldr r3, .L698+40 + 12311 06ce DB8A ldrh r3, [r3, #22] + 980:Src/main.c **** { + 12312 .loc 1 980 9 view .LVU3931 + 12313 06d0 032B cmp r3, #3 + 12314 06d2 0BD9 bls .L661 + 982:Src/main.c **** TO10_counter = task.dt / 10; + 12315 .loc 1 982 7 is_stmt 1 view .LVU3932 + 982:Src/main.c **** TO10_counter = task.dt / 10; + 12316 .loc 1 982 26 is_stmt 0 view .LVU3933 + 12317 06d4 884B ldr r3, .L698+56 + 12318 06d6 1A68 ldr r2, [r3] + 12319 06d8 884B ldr r3, .L698+60 + 12320 06da DA60 str r2, [r3, #12] + 983:Src/main.c **** } + 12321 .loc 1 983 7 is_stmt 1 view .LVU3934 + 983:Src/main.c **** } + 12322 .loc 1 983 26 is_stmt 0 view .LVU3935 + 12323 06dc 824B ldr r3, .L698+40 + 12324 06de 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 + 983:Src/main.c **** } + 12325 .loc 1 983 30 view .LVU3936 + 12326 06e0 874A ldr r2, .L698+64 + 12327 06e2 A2FB0323 umull r2, r3, r2, r3 + 12328 06e6 DB08 lsrs r3, r3, #3 + 983:Src/main.c **** } + 12329 .loc 1 983 20 view .LVU3937 + 12330 06e8 864A ldr r2, .L698+68 + 12331 06ea 1360 str r3, [r2] + 12332 .L661: + 986:Src/main.c **** break; + 12333 .loc 1 986 6 is_stmt 1 view .LVU3938 + 986:Src/main.c **** break; + 12334 .loc 1 986 20 is_stmt 0 view .LVU3939 + 12335 06ec 774B ldr r3, .L698+12 + 12336 06ee 0922 movs r2, #9 + 12337 06f0 1A70 strb r2, [r3] + 987:Src/main.c **** } + 12338 .loc 1 987 9 is_stmt 1 view .LVU3940 + 12339 06f2 06E5 b .L602 + 12340 .L641: + 12341 .LBB712: + ARM GAS /tmp/ccuHnxNu.s page 634 - 12192 .LVL1097: - 683:Src/main.c **** - 12193 .loc 1 683 7 view .LVU3899 - 12194 071c 0022 movs r2, #0 - 12195 071e 8021 movs r1, #128 - 12196 0720 2046 mov r0, r4 - 12197 0722 FFF7FEFF bl HAL_GPIO_WritePin - 12198 .LVL1098: - 685:Src/main.c **** if (st != HAL_OK) - 12199 .loc 1 685 7 view .LVU3900 - 685:Src/main.c **** if (st != HAL_OK) - 12200 .loc 1 685 12 is_stmt 0 view .LVU3901 - 12201 0726 6448 ldr r0, .L683+60 - 12202 0728 FFF7FEFF bl HAL_TIM_Base_Start_IT - 12203 .LVL1099: - 686:Src/main.c **** while(1); - 12204 .loc 1 686 7 is_stmt 1 view .LVU3902 - 686:Src/main.c **** while(1); - 12205 .loc 1 686 10 is_stmt 0 view .LVU3903 - 12206 072c 0028 cmp r0, #0 - 12207 072e 75D1 bne .L631 - 689:Src/main.c **** uint16_t trigger_counter = 0; - 12208 .loc 1 689 7 is_stmt 1 view .LVU3904 - 12209 .LVL1100: - 690:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 12210 .loc 1 690 7 view .LVU3905 - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12211 .loc 1 691 7 view .LVU3906 - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12212 .loc 1 691 47 is_stmt 0 view .LVU3907 - 12213 0730 5C4B ldr r3, .L683+40 - 12214 0732 93ED027A vldr.32 s14, [r3, #8] - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12215 .loc 1 691 64 view .LVU3908 - 12216 0736 D3ED047A vldr.32 s15, [r3, #16] - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12217 .loc 1 691 58 view .LVU3909 - 12218 073a 37EE677A vsub.f32 s14, s14, s15 - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12219 .loc 1 691 84 view .LVU3910 - 12220 073e D3ED036A vldr.32 s13, [r3, #12] - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12221 .loc 1 691 79 view .LVU3911 - 12222 0742 C7EE267A vdiv.f32 s15, s14, s13 - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12223 .loc 1 691 97 view .LVU3912 - 12224 0746 B2EE047A vmov.f32 s14, #1.0e+1 - 12225 074a 67EE877A vmul.f32 s15, s15, s14 - 691:Src/main.c **** uint16_t task_sheduler = 0; - 12226 .loc 1 691 31 view .LVU3913 - 12227 074e FCEEE77A vcvt.u32.f32 s15, s15 - 12228 0752 CDED037A vstr.32 s15, [sp, #12] @ int - 12229 0756 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2 - 12230 .LVL1101: - 692:Src/main.c **** - 12231 .loc 1 692 7 is_stmt 1 view .LVU3914 - 696:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - ARM GAS /tmp/ccEQxcUB.s page 631 + 691:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 12342 .loc 1 691 7 view .LVU3941 + 691:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 12343 .loc 1 691 38 is_stmt 0 view .LVU3942 + 12344 06f4 7C4B ldr r3, .L698+40 + 12345 06f6 D3ED077A vldr.32 s15, [r3, #28] + 691:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 12346 .loc 1 691 7 view .LVU3943 + 12347 06fa FCEEE77A vcvt.u32.f32 s15, s15 + 12348 06fe 17EE903A vmov r3, s15 @ int + 12349 0702 99B2 uxth r1, r3 + 12350 0704 0220 movs r0, #2 + 12351 0706 FFF7FEFF bl Set_LTEC + 12352 .LVL1100: + 692:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 12353 .loc 1 692 7 is_stmt 1 view .LVU3944 + 692:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 12354 .loc 1 692 14 is_stmt 0 view .LVU3945 + 12355 070a 0320 movs r0, #3 + 12356 070c FFF7FEFF bl MPhD_T + 12357 .LVL1101: + 693:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 12358 .loc 1 693 7 is_stmt 1 view .LVU3946 + 693:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 12359 .loc 1 693 32 is_stmt 0 view .LVU3947 + 12360 0710 0320 movs r0, #3 + 12361 0712 FFF7FEFF bl MPhD_T + 12362 .LVL1102: + 693:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 12363 .loc 1 693 30 discriminator 1 view .LVU3948 + 12364 0716 7C4C ldr r4, .L698+72 + 12365 0718 2080 strh r0, [r4] @ movhi + 694:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 12366 .loc 1 694 7 is_stmt 1 view .LVU3949 + 694:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 12367 .loc 1 694 14 is_stmt 0 view .LVU3950 + 12368 071a 0420 movs r0, #4 + 12369 071c FFF7FEFF bl MPhD_T + 12370 .LVL1103: + 695:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 12371 .loc 1 695 7 is_stmt 1 view .LVU3951 + 695:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 12372 .loc 1 695 32 is_stmt 0 view .LVU3952 + 12373 0720 0420 movs r0, #4 + 12374 0722 FFF7FEFF bl MPhD_T + 12375 .LVL1104: + 695:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 12376 .loc 1 695 30 discriminator 1 view .LVU3953 + 12377 0726 794D ldr r5, .L698+76 + 12378 0728 2880 strh r0, [r5] @ movhi + 696:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 12379 .loc 1 696 7 is_stmt 1 view .LVU3954 + 696:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 12380 .loc 1 696 14 is_stmt 0 view .LVU3955 + 12381 072a 0122 movs r2, #1 + 12382 072c 2146 mov r1, r4 + 12383 072e 6B48 ldr r0, .L698+28 + ARM GAS /tmp/ccuHnxNu.s page 635 - 12232 .loc 1 696 7 view .LVU3915 - 12233 075a DFF88491 ldr r9, .L683+100 - 12234 075e 0021 movs r1, #0 - 12235 0760 4846 mov r0, r9 - 12236 .LVL1102: - 696:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 12237 .loc 1 696 7 is_stmt 0 view .LVU3916 - 12238 0762 FFF7FEFF bl HAL_TIM_PWM_Stop - 12239 .LVL1103: - 697:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12240 .loc 1 697 7 is_stmt 1 view .LVU3917 - 12241 0766 DFF87C81 ldr r8, .L683+104 - 12242 076a 0821 movs r1, #8 - 12243 076c 4046 mov r0, r8 - 12244 076e FFF7FEFF bl HAL_TIM_PWM_Stop - 12245 .LVL1104: - 698:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12246 .loc 1 698 7 view .LVU3918 - 698:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12247 .loc 1 698 13 is_stmt 0 view .LVU3919 - 12248 0772 584F ldr r7, .L683+88 - 12249 0774 3B68 ldr r3, [r7] - 698:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12250 .loc 1 698 20 view .LVU3920 - 12251 0776 23F00803 bic r3, r3, #8 - 12252 077a 3B60 str r3, [r7] + 12384 0730 FFF7FEFF bl PID_Controller_Temp + 12385 .LVL1105: + 12386 0734 0146 mov r1, r0 + 696:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 12387 .loc 1 696 13 discriminator 1 view .LVU3956 + 12388 0736 764C ldr r4, .L698+80 + 12389 0738 2080 strh r0, [r4] @ movhi + 697:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 12390 .loc 1 697 7 is_stmt 1 view .LVU3957 + 12391 073a 0320 movs r0, #3 + 12392 073c FFF7FEFF bl Set_LTEC + 12393 .LVL1106: + 698:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 12394 .loc 1 698 7 view .LVU3958 + 698:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 12395 .loc 1 698 14 is_stmt 0 view .LVU3959 + 12396 0740 0222 movs r2, #2 + 12397 0742 2946 mov r1, r5 + 12398 0744 6448 ldr r0, .L698+24 + 12399 0746 FFF7FEFF bl PID_Controller_Temp + 12400 .LVL1107: + 12401 074a 0146 mov r1, r0 + 698:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 12402 .loc 1 698 13 discriminator 1 view .LVU3960 + 12403 074c 2080 strh r0, [r4] @ movhi 699:Src/main.c **** - 12253 .loc 1 699 7 is_stmt 1 view .LVU3921 - 699:Src/main.c **** - 12254 .loc 1 699 12 is_stmt 0 view .LVU3922 - 12255 077c 564D ldr r5, .L683+92 - 12256 077e 2B68 ldr r3, [r5] - 699:Src/main.c **** - 12257 .loc 1 699 19 view .LVU3923 - 12258 0780 23F00803 bic r3, r3, #8 - 12259 0784 2B60 str r3, [r5] - 703:Src/main.c **** TIM4 -> CNT = 0; - 12260 .loc 1 703 7 is_stmt 1 view .LVU3924 - 703:Src/main.c **** TIM4 -> CNT = 0; - 12261 .loc 1 703 20 is_stmt 0 view .LVU3925 - 12262 0786 0024 movs r4, #0 - 12263 0788 7C62 str r4, [r7, #36] - 704:Src/main.c **** - 12264 .loc 1 704 7 is_stmt 1 view .LVU3926 - 704:Src/main.c **** - 12265 .loc 1 704 19 is_stmt 0 view .LVU3927 - 12266 078a 6C62 str r4, [r5, #36] - 706:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 12267 .loc 1 706 7 is_stmt 1 view .LVU3928 - 12268 078c 2146 mov r1, r4 - 12269 078e 4846 mov r0, r9 - 12270 0790 FFF7FEFF bl HAL_TIM_PWM_Start - 12271 .LVL1105: - 707:Src/main.c **** //TIM4 -> CNT = 0; - 12272 .loc 1 707 7 view .LVU3929 - 12273 0794 0821 movs r1, #8 - 12274 0796 4046 mov r0, r8 - ARM GAS /tmp/ccEQxcUB.s page 632 + 12404 .loc 1 699 7 is_stmt 1 view .LVU3961 + 12405 074e 0420 movs r0, #4 + 12406 0750 FFF7FEFF bl Set_LTEC + 12407 .LVL1108: + 702:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12408 .loc 1 702 7 view .LVU3962 + 12409 0754 6F4C ldr r4, .L698+84 + 12410 0756 0122 movs r2, #1 + 12411 0758 8021 movs r1, #128 + 12412 075a 2046 mov r0, r4 + 12413 075c FFF7FEFF bl HAL_GPIO_WritePin + 12414 .LVL1109: + 703:Src/main.c **** + 12415 .loc 1 703 7 view .LVU3963 + 12416 0760 0022 movs r2, #0 + 12417 0762 8021 movs r1, #128 + 12418 0764 2046 mov r0, r4 + 12419 0766 FFF7FEFF bl HAL_GPIO_WritePin + 12420 .LVL1110: + 705:Src/main.c **** if (st != HAL_OK) + 12421 .loc 1 705 7 view .LVU3964 + 705:Src/main.c **** if (st != HAL_OK) + 12422 .loc 1 705 12 is_stmt 0 view .LVU3965 + 12423 076a 6448 ldr r0, .L698+60 + 12424 076c FFF7FEFF bl HAL_TIM_Base_Start_IT + 12425 .LVL1111: + 706:Src/main.c **** while(1); + 12426 .loc 1 706 7 is_stmt 1 view .LVU3966 + 706:Src/main.c **** while(1); + 12427 .loc 1 706 10 is_stmt 0 view .LVU3967 + 12428 0770 0028 cmp r0, #0 + ARM GAS /tmp/ccuHnxNu.s page 636 - 12275 0798 FFF7FEFF bl HAL_TIM_PWM_Start - 12276 .LVL1106: - 710:Src/main.c **** TIM11 -> CNT = 0; - 12277 .loc 1 710 7 view .LVU3930 - 710:Src/main.c **** TIM11 -> CNT = 0; - 12278 .loc 1 710 26 is_stmt 0 view .LVU3931 - 12279 079c EB6A ldr r3, [r5, #44] - 710:Src/main.c **** TIM11 -> CNT = 0; - 12280 .loc 1 710 33 view .LVU3932 - 12281 079e 143B subs r3, r3, #20 - 710:Src/main.c **** TIM11 -> CNT = 0; - 12282 .loc 1 710 19 view .LVU3933 - 12283 07a0 6B62 str r3, [r5, #36] - 711:Src/main.c **** - 12284 .loc 1 711 7 is_stmt 1 view .LVU3934 - 711:Src/main.c **** - 12285 .loc 1 711 20 is_stmt 0 view .LVU3935 - 12286 07a2 7C62 str r4, [r7, #36] - 714:Src/main.c **** { - 12287 .loc 1 714 7 is_stmt 1 view .LVU3936 - 690:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 12288 .loc 1 690 16 is_stmt 0 view .LVU3937 - 12289 07a4 2546 mov r5, r4 - 12290 .LVL1107: - 12291 .L633: - 714:Src/main.c **** { - 12292 .loc 1 714 33 is_stmt 1 view .LVU3938 - 714:Src/main.c **** { - 12293 .loc 1 714 18 is_stmt 0 view .LVU3939 - 12294 07a6 3F4B ldr r3, .L683+40 - 12295 07a8 D3ED047A vldr.32 s15, [r3, #16] - 714:Src/main.c **** { - 12296 .loc 1 714 39 view .LVU3940 - 12297 07ac 93ED027A vldr.32 s14, [r3, #8] - 714:Src/main.c **** { - 12298 .loc 1 714 33 view .LVU3941 - 12299 07b0 F4EEC77A vcmpe.f32 s15, s14 - 12300 07b4 F1EE10FA vmrs APSR_nzcv, FPSCR - 12301 07b8 37D5 bpl .L676 - 716:Src/main.c **** { - 12302 .loc 1 716 8 is_stmt 1 view .LVU3942 - 716:Src/main.c **** { - 12303 .loc 1 716 12 is_stmt 0 view .LVU3943 - 12304 07ba 3D4B ldr r3, .L683+52 - 12305 07bc 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 716:Src/main.c **** { - 12306 .loc 1 716 11 view .LVU3944 - 12307 07be 002B cmp r3, #0 - 12308 07c0 F1D0 beq .L633 - 718:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 12309 .loc 1 718 9 is_stmt 1 view .LVU3945 - 12310 07c2 FCEEE77A vcvt.u32.f32 s15, s15 - 12311 07c6 17EE903A vmov r3, s15 @ int - 12312 07ca 99B2 uxth r1, r3 - 12313 07cc 0120 movs r0, #1 - 12314 07ce FFF7FEFF bl Set_LTEC - 12315 .LVL1108: - ARM GAS /tmp/ccEQxcUB.s page 633 + 12429 0772 75D1 bne .L645 + 709:Src/main.c **** uint16_t trigger_counter = 0; + 12430 .loc 1 709 7 is_stmt 1 view .LVU3968 + 12431 .LVL1112: + 710:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 12432 .loc 1 710 7 view .LVU3969 + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12433 .loc 1 711 7 view .LVU3970 + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12434 .loc 1 711 47 is_stmt 0 view .LVU3971 + 12435 0774 5C4B ldr r3, .L698+40 + 12436 0776 93ED027A vldr.32 s14, [r3, #8] + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12437 .loc 1 711 64 view .LVU3972 + 12438 077a D3ED047A vldr.32 s15, [r3, #16] + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12439 .loc 1 711 58 view .LVU3973 + 12440 077e 37EE677A vsub.f32 s14, s14, s15 + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12441 .loc 1 711 84 view .LVU3974 + 12442 0782 D3ED036A vldr.32 s13, [r3, #12] + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12443 .loc 1 711 79 view .LVU3975 + 12444 0786 C7EE267A vdiv.f32 s15, s14, s13 + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12445 .loc 1 711 97 view .LVU3976 + 12446 078a B2EE047A vmov.f32 s14, #1.0e+1 + 12447 078e 67EE877A vmul.f32 s15, s15, s14 + 711:Src/main.c **** uint16_t task_sheduler = 0; + 12448 .loc 1 711 31 view .LVU3977 + 12449 0792 FCEEE77A vcvt.u32.f32 s15, s15 + 12450 0796 CDED037A vstr.32 s15, [sp, #12] @ int + 12451 079a 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2 + 12452 .LVL1113: + 712:Src/main.c **** + 12453 .loc 1 712 7 is_stmt 1 view .LVU3978 + 716:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 12454 .loc 1 716 7 view .LVU3979 + 12455 079e DFF88491 ldr r9, .L698+100 + 12456 07a2 0021 movs r1, #0 + 12457 07a4 4846 mov r0, r9 + 12458 .LVL1114: + 716:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 12459 .loc 1 716 7 is_stmt 0 view .LVU3980 + 12460 07a6 FFF7FEFF bl HAL_TIM_PWM_Stop + 12461 .LVL1115: + 717:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 12462 .loc 1 717 7 is_stmt 1 view .LVU3981 + 12463 07aa DFF87C81 ldr r8, .L698+104 + 12464 07ae 0821 movs r1, #8 + 12465 07b0 4046 mov r0, r8 + 12466 07b2 FFF7FEFF bl HAL_TIM_PWM_Stop + 12467 .LVL1116: + 718:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 12468 .loc 1 718 7 view .LVU3982 + 718:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 12469 .loc 1 718 13 is_stmt 0 view .LVU3983 + ARM GAS /tmp/ccuHnxNu.s page 637 - 721:Src/main.c **** TO10 = 0; - 12316 .loc 1 721 9 view .LVU3946 - 721:Src/main.c **** TO10 = 0; - 12317 .loc 1 721 13 is_stmt 0 view .LVU3947 - 12318 07d2 344B ldr r3, .L683+40 - 12319 07d4 D3ED047A vldr.32 s15, [r3, #16] - 721:Src/main.c **** TO10 = 0; - 12320 .loc 1 721 35 view .LVU3948 - 12321 07d8 93ED037A vldr.32 s14, [r3, #12] - 721:Src/main.c **** TO10 = 0; - 12322 .loc 1 721 28 view .LVU3949 - 12323 07dc 77EE877A vadd.f32 s15, s15, s14 - 12324 07e0 C3ED047A vstr.32 s15, [r3, #16] - 722:Src/main.c **** TIM10_coflag = 0; - 12325 .loc 1 722 9 is_stmt 1 view .LVU3950 - 722:Src/main.c **** TIM10_coflag = 0; - 12326 .loc 1 722 14 is_stmt 0 view .LVU3951 - 12327 07e4 0027 movs r7, #0 - 12328 07e6 3D4B ldr r3, .L683+96 - 12329 07e8 1F60 str r7, [r3] - 723:Src/main.c **** - 12330 .loc 1 723 9 is_stmt 1 view .LVU3952 - 723:Src/main.c **** - 12331 .loc 1 723 22 is_stmt 0 view .LVU3953 - 12332 07ea 314B ldr r3, .L683+52 - 12333 07ec 1F70 strb r7, [r3] - 725:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 12334 .loc 1 725 9 is_stmt 1 view .LVU3954 - 12335 07ee DFF8F880 ldr r8, .L683+108 - 12336 07f2 0122 movs r2, #1 - 12337 07f4 4FF40071 mov r1, #512 - 12338 07f8 4046 mov r0, r8 - 12339 07fa FFF7FEFF bl HAL_GPIO_WritePin - 12340 .LVL1109: - 726:Src/main.c **** //* - 12341 .loc 1 726 9 view .LVU3955 - 12342 07fe 3A46 mov r2, r7 - 12343 0800 4FF40071 mov r1, #512 - 12344 0804 4046 mov r0, r8 - 12345 0806 FFF7FEFF bl HAL_GPIO_WritePin - 12346 .LVL1110: - 728:Src/main.c **** OUT_trigger(trigger_counter); - 12347 .loc 1 728 9 view .LVU3956 - 728:Src/main.c **** OUT_trigger(trigger_counter); - 12348 .loc 1 728 41 is_stmt 0 view .LVU3957 - 12349 080a B4FBF6F3 udiv r3, r4, r6 - 12350 080e 06FB1343 mls r3, r6, r3, r4 - 12351 0812 9BB2 uxth r3, r3 - 728:Src/main.c **** OUT_trigger(trigger_counter); - 12352 .loc 1 728 12 view .LVU3958 - 12353 0814 1BB1 cbz r3, .L677 - 12354 .L634: - 732:Src/main.c **** //*/ - 12355 .loc 1 732 9 is_stmt 1 view .LVU3959 - 12356 0816 0134 adds r4, r4, #1 - 12357 .LVL1111: - 732:Src/main.c **** //*/ - ARM GAS /tmp/ccEQxcUB.s page 634 + 12470 07b6 584F ldr r7, .L698+88 + 12471 07b8 3B68 ldr r3, [r7] + 718:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 12472 .loc 1 718 20 view .LVU3984 + 12473 07ba 23F00803 bic r3, r3, #8 + 12474 07be 3B60 str r3, [r7] + 719:Src/main.c **** + 12475 .loc 1 719 7 is_stmt 1 view .LVU3985 + 719:Src/main.c **** + 12476 .loc 1 719 12 is_stmt 0 view .LVU3986 + 12477 07c0 564D ldr r5, .L698+92 + 12478 07c2 2B68 ldr r3, [r5] + 719:Src/main.c **** + 12479 .loc 1 719 19 view .LVU3987 + 12480 07c4 23F00803 bic r3, r3, #8 + 12481 07c8 2B60 str r3, [r5] + 723:Src/main.c **** TIM4 -> CNT = 0; + 12482 .loc 1 723 7 is_stmt 1 view .LVU3988 + 723:Src/main.c **** TIM4 -> CNT = 0; + 12483 .loc 1 723 20 is_stmt 0 view .LVU3989 + 12484 07ca 0024 movs r4, #0 + 12485 07cc 7C62 str r4, [r7, #36] + 724:Src/main.c **** + 12486 .loc 1 724 7 is_stmt 1 view .LVU3990 + 724:Src/main.c **** + 12487 .loc 1 724 19 is_stmt 0 view .LVU3991 + 12488 07ce 6C62 str r4, [r5, #36] + 726:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 12489 .loc 1 726 7 is_stmt 1 view .LVU3992 + 12490 07d0 2146 mov r1, r4 + 12491 07d2 4846 mov r0, r9 + 12492 07d4 FFF7FEFF bl HAL_TIM_PWM_Start + 12493 .LVL1117: + 727:Src/main.c **** //TIM4 -> CNT = 0; + 12494 .loc 1 727 7 view .LVU3993 + 12495 07d8 0821 movs r1, #8 + 12496 07da 4046 mov r0, r8 + 12497 07dc FFF7FEFF bl HAL_TIM_PWM_Start + 12498 .LVL1118: + 730:Src/main.c **** TIM11 -> CNT = 0; + 12499 .loc 1 730 7 view .LVU3994 + 730:Src/main.c **** TIM11 -> CNT = 0; + 12500 .loc 1 730 26 is_stmt 0 view .LVU3995 + 12501 07e0 EB6A ldr r3, [r5, #44] + 730:Src/main.c **** TIM11 -> CNT = 0; + 12502 .loc 1 730 33 view .LVU3996 + 12503 07e2 143B subs r3, r3, #20 + 730:Src/main.c **** TIM11 -> CNT = 0; + 12504 .loc 1 730 19 view .LVU3997 + 12505 07e4 6B62 str r3, [r5, #36] + 731:Src/main.c **** + 12506 .loc 1 731 7 is_stmt 1 view .LVU3998 + 731:Src/main.c **** + 12507 .loc 1 731 20 is_stmt 0 view .LVU3999 + 12508 07e6 7C62 str r4, [r7, #36] + 734:Src/main.c **** { + 12509 .loc 1 734 7 is_stmt 1 view .LVU4000 + ARM GAS /tmp/ccuHnxNu.s page 638 - 12358 .loc 1 732 9 is_stmt 0 view .LVU3960 - 12359 0818 A4B2 uxth r4, r4 - 12360 .LVL1112: - 732:Src/main.c **** //*/ - 12361 .loc 1 732 9 view .LVU3961 - 12362 081a C4E7 b .L633 - 12363 .LVL1113: - 12364 .L631: - 687:Src/main.c **** - 12365 .loc 1 687 8 is_stmt 1 view .LVU3962 - 687:Src/main.c **** - 12366 .loc 1 687 13 view .LVU3963 - 12367 081c FEE7 b .L631 - 12368 .LVL1114: - 12369 .L677: - 729:Src/main.c **** ++trigger_counter; - 12370 .loc 1 729 10 view .LVU3964 - 12371 081e E8B2 uxtb r0, r5 - 12372 0820 FFF7FEFF bl OUT_trigger - 12373 .LVL1115: - 730:Src/main.c **** } - 12374 .loc 1 730 10 view .LVU3965 - 12375 0824 0135 adds r5, r5, #1 - 12376 .LVL1116: - 730:Src/main.c **** } - 12377 .loc 1 730 10 is_stmt 0 view .LVU3966 - 12378 0826 ADB2 uxth r5, r5 - 12379 .LVL1117: - 730:Src/main.c **** } - 12380 .loc 1 730 10 view .LVU3967 - 12381 0828 F5E7 b .L634 - 12382 .L676: - 757:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 12383 .loc 1 757 7 is_stmt 1 view .LVU3968 - 757:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 12384 .loc 1 757 13 is_stmt 0 view .LVU3969 - 12385 082a 2A4A ldr r2, .L683+88 - 12386 082c D368 ldr r3, [r2, #12] - 757:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 12387 .loc 1 757 21 view .LVU3970 - 12388 082e 43F00103 orr r3, r3, #1 - 12389 0832 D360 str r3, [r2, #12] - 767:Src/main.c **** - 12390 .loc 1 767 7 is_stmt 1 view .LVU3971 - 12391 0834 FFF7FEFF bl Stop_TIM10 - 12392 .LVL1118: - 769:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12393 .loc 1 769 7 view .LVU3972 - 769:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12394 .loc 1 769 32 is_stmt 0 view .LVU3973 - 12395 0838 1A4C ldr r4, .L683+40 - 12396 .LVL1119: - 769:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12397 .loc 1 769 32 view .LVU3974 - 12398 083a D4ED017A vldr.32 s15, [r4, #4] - 769:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12399 .loc 1 769 26 view .LVU3975 - ARM GAS /tmp/ccEQxcUB.s page 635 + 710:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 12510 .loc 1 710 16 is_stmt 0 view .LVU4001 + 12511 07e8 2546 mov r5, r4 + 12512 .LVL1119: + 12513 .L647: + 734:Src/main.c **** { + 12514 .loc 1 734 33 is_stmt 1 view .LVU4002 + 734:Src/main.c **** { + 12515 .loc 1 734 18 is_stmt 0 view .LVU4003 + 12516 07ea 3F4B ldr r3, .L698+40 + 12517 07ec D3ED047A vldr.32 s15, [r3, #16] + 734:Src/main.c **** { + 12518 .loc 1 734 39 view .LVU4004 + 12519 07f0 93ED027A vldr.32 s14, [r3, #8] + 734:Src/main.c **** { + 12520 .loc 1 734 33 view .LVU4005 + 12521 07f4 F4EEC77A vcmpe.f32 s15, s14 + 12522 07f8 F1EE10FA vmrs APSR_nzcv, FPSCR + 12523 07fc 37D5 bpl .L691 + 736:Src/main.c **** { + 12524 .loc 1 736 8 is_stmt 1 view .LVU4006 + 736:Src/main.c **** { + 12525 .loc 1 736 12 is_stmt 0 view .LVU4007 + 12526 07fe 3D4B ldr r3, .L698+52 + 12527 0800 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 736:Src/main.c **** { + 12528 .loc 1 736 11 view .LVU4008 + 12529 0802 002B cmp r3, #0 + 12530 0804 F1D0 beq .L647 + 738:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 12531 .loc 1 738 9 is_stmt 1 view .LVU4009 + 12532 0806 FCEEE77A vcvt.u32.f32 s15, s15 + 12533 080a 17EE903A vmov r3, s15 @ int + 12534 080e 99B2 uxth r1, r3 + 12535 0810 0120 movs r0, #1 + 12536 0812 FFF7FEFF bl Set_LTEC + 12537 .LVL1120: + 741:Src/main.c **** TO10 = 0; + 12538 .loc 1 741 9 view .LVU4010 + 741:Src/main.c **** TO10 = 0; + 12539 .loc 1 741 13 is_stmt 0 view .LVU4011 + 12540 0816 344B ldr r3, .L698+40 + 12541 0818 D3ED047A vldr.32 s15, [r3, #16] + 741:Src/main.c **** TO10 = 0; + 12542 .loc 1 741 35 view .LVU4012 + 12543 081c 93ED037A vldr.32 s14, [r3, #12] + 741:Src/main.c **** TO10 = 0; + 12544 .loc 1 741 28 view .LVU4013 + 12545 0820 77EE877A vadd.f32 s15, s15, s14 + 12546 0824 C3ED047A vstr.32 s15, [r3, #16] + 742:Src/main.c **** TIM10_coflag = 0; + 12547 .loc 1 742 9 is_stmt 1 view .LVU4014 + 742:Src/main.c **** TIM10_coflag = 0; + 12548 .loc 1 742 14 is_stmt 0 view .LVU4015 + 12549 0828 0027 movs r7, #0 + 12550 082a 3D4B ldr r3, .L698+96 + 12551 082c 1F60 str r7, [r3] + ARM GAS /tmp/ccuHnxNu.s page 639 - 12400 083e C4ED047A vstr.32 s15, [r4, #16] - 770:Src/main.c **** if (task.tau > 3) - 12401 .loc 1 770 7 is_stmt 1 view .LVU3976 - 12402 0842 FCEEE77A vcvt.u32.f32 s15, s15 - 12403 0846 17EE903A vmov r3, s15 @ int - 12404 084a 99B2 uxth r1, r3 - 12405 084c 0120 movs r0, #1 - 12406 084e FFF7FEFF bl Set_LTEC - 12407 .LVL1120: - 771:Src/main.c **** { - 12408 .loc 1 771 7 view .LVU3977 - 771:Src/main.c **** { - 12409 .loc 1 771 15 is_stmt 0 view .LVU3978 - 12410 0852 E38A ldrh r3, [r4, #22] - 771:Src/main.c **** { - 12411 .loc 1 771 10 view .LVU3979 - 12412 0854 032B cmp r3, #3 - 12413 0856 0CD9 bls .L636 - 773:Src/main.c **** htim10.Init.Period = 9999; - 12414 .loc 1 773 8 is_stmt 1 view .LVU3980 - 773:Src/main.c **** htim10.Init.Period = 9999; - 12415 .loc 1 773 34 is_stmt 0 view .LVU3981 - 12416 0858 174A ldr r2, .L683+60 - 12417 085a D068 ldr r0, [r2, #12] - 773:Src/main.c **** htim10.Init.Period = 9999; - 12418 .loc 1 773 21 view .LVU3982 - 12419 085c 1549 ldr r1, .L683+56 - 12420 085e 0860 str r0, [r1] - 774:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12421 .loc 1 774 8 is_stmt 1 view .LVU3983 - 774:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12422 .loc 1 774 27 is_stmt 0 view .LVU3984 - 12423 0860 42F20F71 movw r1, #9999 - 12424 0864 D160 str r1, [r2, #12] - 775:Src/main.c **** } - 12425 .loc 1 775 8 is_stmt 1 view .LVU3985 - 775:Src/main.c **** } - 12426 .loc 1 775 33 is_stmt 0 view .LVU3986 - 12427 0866 013B subs r3, r3, #1 - 775:Src/main.c **** } - 12428 .loc 1 775 38 view .LVU3987 - 12429 0868 6422 movs r2, #100 - 12430 086a 02FB03F3 mul r3, r2, r3 - 775:Src/main.c **** } - 12431 .loc 1 775 21 view .LVU3988 - 12432 086e 144A ldr r2, .L683+68 - 12433 0870 1360 str r3, [r2] - 12434 .L636: - 777:Src/main.c **** break; - 12435 .loc 1 777 7 is_stmt 1 view .LVU3989 - 12436 0872 1148 ldr r0, .L683+60 - 12437 0874 FFF7FEFF bl HAL_TIM_Base_Start_IT - 12438 .LVL1121: - 778:Src/main.c **** case TT_CHANGE_CURR_2: - 12439 .loc 1 778 6 view .LVU3990 - 12440 0878 F9E6 b .L629 - 12441 .L684: - ARM GAS /tmp/ccEQxcUB.s page 636 + 743:Src/main.c **** + 12552 .loc 1 743 9 is_stmt 1 view .LVU4016 + 743:Src/main.c **** + 12553 .loc 1 743 22 is_stmt 0 view .LVU4017 + 12554 082e 314B ldr r3, .L698+52 + 12555 0830 1F70 strb r7, [r3] + 745:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 12556 .loc 1 745 9 is_stmt 1 view .LVU4018 + 12557 0832 DFF8F880 ldr r8, .L698+108 + 12558 0836 0122 movs r2, #1 + 12559 0838 4FF40071 mov r1, #512 + 12560 083c 4046 mov r0, r8 + 12561 083e FFF7FEFF bl HAL_GPIO_WritePin + 12562 .LVL1121: + 746:Src/main.c **** //* + 12563 .loc 1 746 9 view .LVU4019 + 12564 0842 3A46 mov r2, r7 + 12565 0844 4FF40071 mov r1, #512 + 12566 0848 4046 mov r0, r8 + 12567 084a FFF7FEFF bl HAL_GPIO_WritePin + 12568 .LVL1122: + 748:Src/main.c **** OUT_trigger(trigger_counter); + 12569 .loc 1 748 9 view .LVU4020 + 748:Src/main.c **** OUT_trigger(trigger_counter); + 12570 .loc 1 748 41 is_stmt 0 view .LVU4021 + 12571 084e B4FBF6F3 udiv r3, r4, r6 + 12572 0852 06FB1343 mls r3, r6, r3, r4 + 12573 0856 9BB2 uxth r3, r3 + 748:Src/main.c **** OUT_trigger(trigger_counter); + 12574 .loc 1 748 12 view .LVU4022 + 12575 0858 1BB1 cbz r3, .L692 + 12576 .L648: + 752:Src/main.c **** //*/ + 12577 .loc 1 752 9 is_stmt 1 view .LVU4023 + 12578 085a 0134 adds r4, r4, #1 + 12579 .LVL1123: + 752:Src/main.c **** //*/ + 12580 .loc 1 752 9 is_stmt 0 view .LVU4024 + 12581 085c A4B2 uxth r4, r4 + 12582 .LVL1124: + 752:Src/main.c **** //*/ + 12583 .loc 1 752 9 view .LVU4025 + 12584 085e C4E7 b .L647 + 12585 .LVL1125: + 12586 .L645: + 707:Src/main.c **** + 12587 .loc 1 707 8 is_stmt 1 view .LVU4026 + 707:Src/main.c **** + 12588 .loc 1 707 13 view .LVU4027 + 12589 0860 FEE7 b .L645 + 12590 .LVL1126: + 12591 .L692: + 749:Src/main.c **** ++trigger_counter; + 12592 .loc 1 749 10 view .LVU4028 + 12593 0862 E8B2 uxtb r0, r5 + 12594 0864 FFF7FEFF bl OUT_trigger + 12595 .LVL1127: + ARM GAS /tmp/ccuHnxNu.s page 640 - 12442 087a 00BF .align 2 - 12443 .L683: - 12444 087c 00000000 .word COMMAND - 12445 0880 00000000 .word State_Data - 12446 0884 00000000 .word CPU_state - 12447 0888 00000000 .word CPU_state_old - 12448 088c 00000000 .word UART_transmission_request - 12449 0890 00000000 .word Curr_setup - 12450 0894 00000000 .word LD2_curr_setup - 12451 0898 00000000 .word LD1_curr_setup - 12452 089c 00000000 .word TO6 - 12453 08a0 00000000 .word TO6_before - 12454 08a4 00000000 .word task - 12455 08a8 00000000 .word TO7 - 12456 08ac 00000000 .word TO7_before - 12457 08b0 00000000 .word TIM10_coflag - 12458 08b4 00000000 .word TIM10_period - 12459 08b8 00000000 .word htim10 - 12460 08bc CDCCCCCC .word -858993459 - 12461 08c0 00000000 .word TO10_counter - 12462 08c4 00000000 .word LD1_param - 12463 08c8 00000000 .word LD2_param - 12464 08cc 00000000 .word temp16 - 12465 08d0 000C0240 .word 1073875968 - 12466 08d4 00480140 .word 1073825792 - 12467 08d8 00080040 .word 1073743872 - 12468 08dc 00000000 .word TO10 - 12469 08e0 00000000 .word htim11 - 12470 08e4 00000000 .word htim4 - 12471 08e8 00180240 .word 1073879040 - 12472 .LVL1122: - 12473 .L628: - 782:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12474 .loc 1 782 7 view .LVU3991 - 782:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12475 .loc 1 782 38 is_stmt 0 view .LVU3992 - 12476 08ec A74B ldr r3, .L685 - 12477 08ee D3ED077A vldr.32 s15, [r3, #28] - 782:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12478 .loc 1 782 7 view .LVU3993 - 12479 08f2 FCEEE77A vcvt.u32.f32 s15, s15 - 12480 08f6 17EE903A vmov r3, s15 @ int - 12481 08fa 99B2 uxth r1, r3 - 12482 08fc 0120 movs r0, #1 - 12483 08fe FFF7FEFF bl Set_LTEC - 12484 .LVL1123: - 783:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12485 .loc 1 783 7 is_stmt 1 view .LVU3994 - 783:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12486 .loc 1 783 14 is_stmt 0 view .LVU3995 - 12487 0902 0320 movs r0, #3 - 12488 0904 FFF7FEFF bl MPhD_T - 12489 .LVL1124: - 784:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12490 .loc 1 784 7 is_stmt 1 view .LVU3996 - 784:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12491 .loc 1 784 32 is_stmt 0 view .LVU3997 - ARM GAS /tmp/ccEQxcUB.s page 637 + 750:Src/main.c **** } + 12596 .loc 1 750 10 view .LVU4029 + 12597 0868 0135 adds r5, r5, #1 + 12598 .LVL1128: + 750:Src/main.c **** } + 12599 .loc 1 750 10 is_stmt 0 view .LVU4030 + 12600 086a ADB2 uxth r5, r5 + 12601 .LVL1129: + 750:Src/main.c **** } + 12602 .loc 1 750 10 view .LVU4031 + 12603 086c F5E7 b .L648 + 12604 .L691: + 777:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 12605 .loc 1 777 7 is_stmt 1 view .LVU4032 + 777:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 12606 .loc 1 777 13 is_stmt 0 view .LVU4033 + 12607 086e 2A4A ldr r2, .L698+88 + 12608 0870 D368 ldr r3, [r2, #12] + 777:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 12609 .loc 1 777 21 view .LVU4034 + 12610 0872 43F00103 orr r3, r3, #1 + 12611 0876 D360 str r3, [r2, #12] + 787:Src/main.c **** + 12612 .loc 1 787 7 is_stmt 1 view .LVU4035 + 12613 0878 FFF7FEFF bl Stop_TIM10 + 12614 .LVL1130: + 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 12615 .loc 1 789 7 view .LVU4036 + 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 12616 .loc 1 789 32 is_stmt 0 view .LVU4037 + 12617 087c 1A4C ldr r4, .L698+40 + 12618 .LVL1131: + 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 12619 .loc 1 789 32 view .LVU4038 + 12620 087e D4ED017A vldr.32 s15, [r4, #4] + 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 12621 .loc 1 789 26 view .LVU4039 + 12622 0882 C4ED047A vstr.32 s15, [r4, #16] + 790:Src/main.c **** if (task.tau > 3) + 12623 .loc 1 790 7 is_stmt 1 view .LVU4040 + 12624 0886 FCEEE77A vcvt.u32.f32 s15, s15 + 12625 088a 17EE903A vmov r3, s15 @ int + 12626 088e 99B2 uxth r1, r3 + 12627 0890 0120 movs r0, #1 + 12628 0892 FFF7FEFF bl Set_LTEC + 12629 .LVL1132: + 791:Src/main.c **** { + 12630 .loc 1 791 7 view .LVU4041 + 791:Src/main.c **** { + 12631 .loc 1 791 15 is_stmt 0 view .LVU4042 + 12632 0896 E38A ldrh r3, [r4, #22] + 791:Src/main.c **** { + 12633 .loc 1 791 10 view .LVU4043 + 12634 0898 032B cmp r3, #3 + 12635 089a 0CD9 bls .L650 + 793:Src/main.c **** htim10.Init.Period = 9999; + 12636 .loc 1 793 8 is_stmt 1 view .LVU4044 + ARM GAS /tmp/ccuHnxNu.s page 641 - 12492 0908 0320 movs r0, #3 - 12493 090a FFF7FEFF bl MPhD_T - 12494 .LVL1125: - 784:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12495 .loc 1 784 30 discriminator 1 view .LVU3998 - 12496 090e A04C ldr r4, .L685+4 - 12497 0910 2080 strh r0, [r4] @ movhi - 785:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12498 .loc 1 785 7 is_stmt 1 view .LVU3999 - 785:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12499 .loc 1 785 14 is_stmt 0 view .LVU4000 - 12500 0912 0420 movs r0, #4 - 12501 0914 FFF7FEFF bl MPhD_T - 12502 .LVL1126: - 786:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12503 .loc 1 786 7 is_stmt 1 view .LVU4001 - 786:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12504 .loc 1 786 32 is_stmt 0 view .LVU4002 - 12505 0918 0420 movs r0, #4 - 12506 091a FFF7FEFF bl MPhD_T - 12507 .LVL1127: - 786:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12508 .loc 1 786 30 discriminator 1 view .LVU4003 - 12509 091e 9D4D ldr r5, .L685+8 - 12510 0920 2880 strh r0, [r5] @ movhi - 787:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12511 .loc 1 787 7 is_stmt 1 view .LVU4004 - 787:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12512 .loc 1 787 14 is_stmt 0 view .LVU4005 - 12513 0922 0122 movs r2, #1 - 12514 0924 2146 mov r1, r4 - 12515 0926 9C48 ldr r0, .L685+12 - 12516 0928 FFF7FEFF bl PID_Controller_Temp - 12517 .LVL1128: - 12518 092c 0146 mov r1, r0 - 787:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12519 .loc 1 787 13 discriminator 1 view .LVU4006 - 12520 092e 9B4C ldr r4, .L685+16 - 12521 0930 2080 strh r0, [r4] @ movhi - 788:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 12522 .loc 1 788 7 is_stmt 1 view .LVU4007 - 12523 0932 0320 movs r0, #3 - 12524 0934 FFF7FEFF bl Set_LTEC - 12525 .LVL1129: - 789:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12526 .loc 1 789 7 view .LVU4008 - 789:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12527 .loc 1 789 14 is_stmt 0 view .LVU4009 - 12528 0938 0222 movs r2, #2 - 12529 093a 2946 mov r1, r5 - 12530 093c 9848 ldr r0, .L685+20 - 12531 093e FFF7FEFF bl PID_Controller_Temp - 12532 .LVL1130: - 12533 0942 0146 mov r1, r0 - 789:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12534 .loc 1 789 13 discriminator 1 view .LVU4010 - 12535 0944 2080 strh r0, [r4] @ movhi - ARM GAS /tmp/ccEQxcUB.s page 638 + 793:Src/main.c **** htim10.Init.Period = 9999; + 12637 .loc 1 793 34 is_stmt 0 view .LVU4045 + 12638 089c 174A ldr r2, .L698+60 + 12639 089e D068 ldr r0, [r2, #12] + 793:Src/main.c **** htim10.Init.Period = 9999; + 12640 .loc 1 793 21 view .LVU4046 + 12641 08a0 1549 ldr r1, .L698+56 + 12642 08a2 0860 str r0, [r1] + 794:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 12643 .loc 1 794 8 is_stmt 1 view .LVU4047 + 794:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 12644 .loc 1 794 27 is_stmt 0 view .LVU4048 + 12645 08a4 42F20F71 movw r1, #9999 + 12646 08a8 D160 str r1, [r2, #12] + 795:Src/main.c **** } + 12647 .loc 1 795 8 is_stmt 1 view .LVU4049 + 795:Src/main.c **** } + 12648 .loc 1 795 33 is_stmt 0 view .LVU4050 + 12649 08aa 013B subs r3, r3, #1 + 795:Src/main.c **** } + 12650 .loc 1 795 38 view .LVU4051 + 12651 08ac 6422 movs r2, #100 + 12652 08ae 02FB03F3 mul r3, r2, r3 + 795:Src/main.c **** } + 12653 .loc 1 795 21 view .LVU4052 + 12654 08b2 144A ldr r2, .L698+68 + 12655 08b4 1360 str r3, [r2] + 12656 .L650: + 797:Src/main.c **** break; + 12657 .loc 1 797 7 is_stmt 1 view .LVU4053 + 12658 08b6 1148 ldr r0, .L698+60 + 12659 08b8 FFF7FEFF bl HAL_TIM_Base_Start_IT + 12660 .LVL1133: + 798:Src/main.c **** case TT_CHANGE_CURR_2: + 12661 .loc 1 798 6 view .LVU4054 + 12662 08bc F9E6 b .L643 + 12663 .L699: + 12664 08be 00BF .align 2 + 12665 .L698: + 12666 08c0 00000000 .word COMMAND + 12667 08c4 00000000 .word State_Data + 12668 08c8 00000000 .word UART_transmission_request + 12669 08cc 00000000 .word CPU_state_old + 12670 08d0 00000000 .word CPU_state + 12671 08d4 00000000 .word Curr_setup + 12672 08d8 00000000 .word LD2_curr_setup + 12673 08dc 00000000 .word LD1_curr_setup + 12674 08e0 00000000 .word TO6 + 12675 08e4 00000000 .word TO6_before + 12676 08e8 00000000 .word task + 12677 08ec 00000000 .word TO7 + 12678 08f0 00000000 .word TO7_before + 12679 08f4 00000000 .word TIM10_coflag + 12680 08f8 00000000 .word TIM10_period + 12681 08fc 00000000 .word htim10 + 12682 0900 CDCCCCCC .word -858993459 + 12683 0904 00000000 .word TO10_counter + ARM GAS /tmp/ccuHnxNu.s page 642 - 790:Src/main.c **** - 12536 .loc 1 790 7 is_stmt 1 view .LVU4011 - 12537 0946 0420 movs r0, #4 - 12538 0948 FFF7FEFF bl Set_LTEC - 12539 .LVL1131: - 792:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 12540 .loc 1 792 7 view .LVU4012 - 792:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 12541 .loc 1 792 28 is_stmt 0 view .LVU4013 - 12542 094c 954B ldr r3, .L685+24 - 12543 094e 0222 movs r2, #2 - 12544 0950 1A70 strb r2, [r3] - 793:Src/main.c **** //LD_blinker.param = task.current_param; - 12545 .loc 1 793 7 is_stmt 1 view .LVU4014 - 793:Src/main.c **** //LD_blinker.param = task.current_param; - 12546 .loc 1 793 24 is_stmt 0 view .LVU4015 - 12547 0952 0022 movs r2, #0 - 12548 0954 9A72 strb r2, [r3, #10] - 795:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 12549 .loc 1 795 7 is_stmt 1 view .LVU4016 - 795:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 12550 .loc 1 795 24 is_stmt 0 view .LVU4017 - 12551 0956 1A81 strh r2, [r3, #8] @ movhi - 796:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 12552 .loc 1 796 7 is_stmt 1 view .LVU4018 - 796:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 12553 .loc 1 796 24 is_stmt 0 view .LVU4019 - 12554 0958 4FF47A72 mov r2, #1000 - 12555 095c 1A81 strh r2, [r3, #8] @ movhi - 797:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 12556 .loc 1 797 7 is_stmt 1 view .LVU4020 - 797:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 12557 .loc 1 797 30 is_stmt 0 view .LVU4021 - 12558 095e 924A ldr r2, .L685+28 - 12559 0960 5A60 str r2, [r3, #4] - 798:Src/main.c **** - 12560 .loc 1 798 7 is_stmt 1 view .LVU4022 - 798:Src/main.c **** - 12561 .loc 1 798 29 is_stmt 0 view .LVU4023 - 12562 0962 8022 movs r2, #128 - 12563 0964 5A80 strh r2, [r3, #2] @ movhi - 800:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 12564 .loc 1 800 7 is_stmt 1 view .LVU4024 - 800:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 12565 .loc 1 800 17 is_stmt 0 view .LVU4025 - 12566 0966 914B ldr r3, .L685+32 - 12567 0968 42F21072 movw r2, #10000 - 12568 096c DA62 str r2, [r3, #44] - 802:Src/main.c **** if (st != HAL_OK) - 12569 .loc 1 802 7 is_stmt 1 view .LVU4026 - 802:Src/main.c **** if (st != HAL_OK) - 12570 .loc 1 802 12 is_stmt 0 view .LVU4027 - 12571 096e 9048 ldr r0, .L685+36 - 12572 0970 FFF7FEFF bl HAL_TIM_Base_Start_IT - 12573 .LVL1132: - 803:Src/main.c **** while(1); - 12574 .loc 1 803 7 is_stmt 1 view .LVU4028 - ARM GAS /tmp/ccEQxcUB.s page 639 + 12684 0908 00000000 .word LD1_param + 12685 090c 00000000 .word LD2_param + 12686 0910 00000000 .word temp16 + 12687 0914 000C0240 .word 1073875968 + 12688 0918 00480140 .word 1073825792 + 12689 091c 00080040 .word 1073743872 + 12690 0920 00000000 .word TO10 + 12691 0924 00000000 .word htim11 + 12692 0928 00000000 .word htim4 + 12693 092c 00180240 .word 1073879040 + 12694 .LVL1134: + 12695 .L642: + 802:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 12696 .loc 1 802 7 view .LVU4055 + 802:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 12697 .loc 1 802 38 is_stmt 0 view .LVU4056 + 12698 0930 A74B ldr r3, .L700 + 12699 0932 D3ED077A vldr.32 s15, [r3, #28] + 802:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 12700 .loc 1 802 7 view .LVU4057 + 12701 0936 FCEEE77A vcvt.u32.f32 s15, s15 + 12702 093a 17EE903A vmov r3, s15 @ int + 12703 093e 99B2 uxth r1, r3 + 12704 0940 0120 movs r0, #1 + 12705 0942 FFF7FEFF bl Set_LTEC + 12706 .LVL1135: + 803:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 12707 .loc 1 803 7 is_stmt 1 view .LVU4058 + 803:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 12708 .loc 1 803 14 is_stmt 0 view .LVU4059 + 12709 0946 0320 movs r0, #3 + 12710 0948 FFF7FEFF bl MPhD_T + 12711 .LVL1136: + 804:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 12712 .loc 1 804 7 is_stmt 1 view .LVU4060 + 804:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 12713 .loc 1 804 32 is_stmt 0 view .LVU4061 + 12714 094c 0320 movs r0, #3 + 12715 094e FFF7FEFF bl MPhD_T + 12716 .LVL1137: + 804:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 12717 .loc 1 804 30 discriminator 1 view .LVU4062 + 12718 0952 A04C ldr r4, .L700+4 + 12719 0954 2080 strh r0, [r4] @ movhi + 805:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 12720 .loc 1 805 7 is_stmt 1 view .LVU4063 + 805:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 12721 .loc 1 805 14 is_stmt 0 view .LVU4064 + 12722 0956 0420 movs r0, #4 + 12723 0958 FFF7FEFF bl MPhD_T + 12724 .LVL1138: + 806:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 12725 .loc 1 806 7 is_stmt 1 view .LVU4065 + 806:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 12726 .loc 1 806 32 is_stmt 0 view .LVU4066 + 12727 095c 0420 movs r0, #4 + 12728 095e FFF7FEFF bl MPhD_T + ARM GAS /tmp/ccuHnxNu.s page 643 - 803:Src/main.c **** while(1); - 12575 .loc 1 803 10 is_stmt 0 view .LVU4029 - 12576 0974 78BB cbnz r0, .L638 - 808:Src/main.c **** uint32_t i = 10000; while (--i){} - 12577 .loc 1 808 7 is_stmt 1 view .LVU4030 - 12578 0976 0122 movs r2, #1 - 12579 0978 8021 movs r1, #128 - 12580 097a 8E48 ldr r0, .L685+40 - 12581 .LVL1133: - 808:Src/main.c **** uint32_t i = 10000; while (--i){} - 12582 .loc 1 808 7 is_stmt 0 view .LVU4031 - 12583 097c FFF7FEFF bl HAL_GPIO_WritePin - 12584 .LVL1134: - 809:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12585 .loc 1 809 7 is_stmt 1 view .LVU4032 - 809:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12586 .loc 1 809 27 view .LVU4033 - 809:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12587 .loc 1 809 16 is_stmt 0 view .LVU4034 - 12588 0980 42F21073 movw r3, #10000 - 12589 .LVL1135: - 12590 .L639: - 809:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12591 .loc 1 809 39 is_stmt 1 discriminator 2 view .LVU4035 - 809:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12592 .loc 1 809 34 discriminator 2 view .LVU4036 - 809:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12593 .loc 1 809 34 is_stmt 0 discriminator 2 view .LVU4037 - 12594 0984 013B subs r3, r3, #1 - 12595 .LVL1136: - 809:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12596 .loc 1 809 34 discriminator 2 view .LVU4038 - 12597 0986 FDD1 bne .L639 - 810:Src/main.c **** LD_blinker.state = 2; - 12598 .loc 1 810 7 is_stmt 1 view .LVU4039 - 12599 0988 0022 movs r2, #0 - 12600 098a 8021 movs r1, #128 - 12601 098c 8948 ldr r0, .L685+40 - 12602 098e FFF7FEFF bl HAL_GPIO_WritePin - 12603 .LVL1137: - 811:Src/main.c **** - 12604 .loc 1 811 7 view .LVU4040 - 811:Src/main.c **** - 12605 .loc 1 811 24 is_stmt 0 view .LVU4041 - 12606 0992 844B ldr r3, .L685+24 - 12607 0994 0222 movs r2, #2 - 12608 0996 9A72 strb r2, [r3, #10] - 813:Src/main.c **** if (st != HAL_OK) - 12609 .loc 1 813 7 is_stmt 1 view .LVU4042 - 813:Src/main.c **** if (st != HAL_OK) - 12610 .loc 1 813 12 is_stmt 0 view .LVU4043 - 12611 0998 8748 ldr r0, .L685+44 - 12612 099a FFF7FEFF bl HAL_TIM_Base_Start_IT - 12613 .LVL1138: - 814:Src/main.c **** while(1); - 12614 .loc 1 814 7 is_stmt 1 view .LVU4044 - 814:Src/main.c **** while(1); - ARM GAS /tmp/ccEQxcUB.s page 640 + 12729 .LVL1139: + 806:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 12730 .loc 1 806 30 discriminator 1 view .LVU4067 + 12731 0962 9D4D ldr r5, .L700+8 + 12732 0964 2880 strh r0, [r5] @ movhi + 807:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 12733 .loc 1 807 7 is_stmt 1 view .LVU4068 + 807:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 12734 .loc 1 807 14 is_stmt 0 view .LVU4069 + 12735 0966 0122 movs r2, #1 + 12736 0968 2146 mov r1, r4 + 12737 096a 9C48 ldr r0, .L700+12 + 12738 096c FFF7FEFF bl PID_Controller_Temp + 12739 .LVL1140: + 12740 0970 0146 mov r1, r0 + 807:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 12741 .loc 1 807 13 discriminator 1 view .LVU4070 + 12742 0972 9B4C ldr r4, .L700+16 + 12743 0974 2080 strh r0, [r4] @ movhi + 808:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 12744 .loc 1 808 7 is_stmt 1 view .LVU4071 + 12745 0976 0320 movs r0, #3 + 12746 0978 FFF7FEFF bl Set_LTEC + 12747 .LVL1141: + 809:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 12748 .loc 1 809 7 view .LVU4072 + 809:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 12749 .loc 1 809 14 is_stmt 0 view .LVU4073 + 12750 097c 0222 movs r2, #2 + 12751 097e 2946 mov r1, r5 + 12752 0980 9848 ldr r0, .L700+20 + 12753 0982 FFF7FEFF bl PID_Controller_Temp + 12754 .LVL1142: + 12755 0986 0146 mov r1, r0 + 809:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 12756 .loc 1 809 13 discriminator 1 view .LVU4074 + 12757 0988 2080 strh r0, [r4] @ movhi + 810:Src/main.c **** + 12758 .loc 1 810 7 is_stmt 1 view .LVU4075 + 12759 098a 0420 movs r0, #4 + 12760 098c FFF7FEFF bl Set_LTEC + 12761 .LVL1143: + 812:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 12762 .loc 1 812 7 view .LVU4076 + 812:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 12763 .loc 1 812 28 is_stmt 0 view .LVU4077 + 12764 0990 954B ldr r3, .L700+24 + 12765 0992 0222 movs r2, #2 + 12766 0994 1A70 strb r2, [r3] + 813:Src/main.c **** //LD_blinker.param = task.current_param; + 12767 .loc 1 813 7 is_stmt 1 view .LVU4078 + 813:Src/main.c **** //LD_blinker.param = task.current_param; + 12768 .loc 1 813 24 is_stmt 0 view .LVU4079 + 12769 0996 0022 movs r2, #0 + 12770 0998 9A72 strb r2, [r3, #10] + 815:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 12771 .loc 1 815 7 is_stmt 1 view .LVU4080 + ARM GAS /tmp/ccuHnxNu.s page 644 - 12615 .loc 1 814 10 is_stmt 0 view .LVU4045 - 12616 099e D8B9 cbnz r0, .L641 - 12617 .L642: - 816:Src/main.c **** { - 12618 .loc 1 816 33 is_stmt 1 view .LVU4046 - 816:Src/main.c **** { - 12619 .loc 1 816 18 is_stmt 0 view .LVU4047 - 12620 09a0 7A4B ldr r3, .L685 - 12621 09a2 D3ED047A vldr.32 s15, [r3, #16] - 816:Src/main.c **** { - 12622 .loc 1 816 39 view .LVU4048 - 12623 09a6 93ED027A vldr.32 s14, [r3, #8] - 816:Src/main.c **** { - 12624 .loc 1 816 33 view .LVU4049 - 12625 09aa F4EEC77A vcmpe.f32 s15, s14 - 12626 09ae F1EE10FA vmrs APSR_nzcv, FPSCR - 12627 09b2 12D5 bpl .L678 - 818:Src/main.c **** { - 12628 .loc 1 818 8 is_stmt 1 view .LVU4050 - 818:Src/main.c **** { - 12629 .loc 1 818 12 is_stmt 0 view .LVU4051 - 12630 09b4 814B ldr r3, .L685+48 - 12631 09b6 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 818:Src/main.c **** { - 12632 .loc 1 818 11 view .LVU4052 - 12633 09b8 002B cmp r3, #0 - 12634 09ba F1D0 beq .L642 - 823:Src/main.c **** TO10 = 0; - 12635 .loc 1 823 9 is_stmt 1 view .LVU4053 - 823:Src/main.c **** TO10 = 0; - 12636 .loc 1 823 35 is_stmt 0 view .LVU4054 - 12637 09bc 734B ldr r3, .L685 - 12638 09be 93ED037A vldr.32 s14, [r3, #12] - 823:Src/main.c **** TO10 = 0; - 12639 .loc 1 823 28 view .LVU4055 - 12640 09c2 77EE277A vadd.f32 s15, s14, s15 - 12641 09c6 C3ED047A vstr.32 s15, [r3, #16] - 824:Src/main.c **** TIM10_coflag = 0; - 12642 .loc 1 824 9 is_stmt 1 view .LVU4056 - 824:Src/main.c **** TIM10_coflag = 0; - 12643 .loc 1 824 14 is_stmt 0 view .LVU4057 - 12644 09ca 0023 movs r3, #0 - 12645 09cc 7C4A ldr r2, .L685+52 - 12646 09ce 1360 str r3, [r2] - 825:Src/main.c **** - 12647 .loc 1 825 9 is_stmt 1 view .LVU4058 - 825:Src/main.c **** - 12648 .loc 1 825 22 is_stmt 0 view .LVU4059 - 12649 09d0 7A4A ldr r2, .L685+48 - 12650 09d2 1370 strb r3, [r2] - 12651 09d4 E4E7 b .L642 - 12652 .LVL1139: - 12653 .L638: - 804:Src/main.c **** // */ - 12654 .loc 1 804 8 is_stmt 1 view .LVU4060 - 804:Src/main.c **** // */ - 12655 .loc 1 804 13 view .LVU4061 - ARM GAS /tmp/ccEQxcUB.s page 641 + 815:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 12772 .loc 1 815 24 is_stmt 0 view .LVU4081 + 12773 099a 1A81 strh r2, [r3, #8] @ movhi + 816:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 12774 .loc 1 816 7 is_stmt 1 view .LVU4082 + 816:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 12775 .loc 1 816 24 is_stmt 0 view .LVU4083 + 12776 099c 4FF47A72 mov r2, #1000 + 12777 09a0 1A81 strh r2, [r3, #8] @ movhi + 817:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 12778 .loc 1 817 7 is_stmt 1 view .LVU4084 + 817:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 12779 .loc 1 817 30 is_stmt 0 view .LVU4085 + 12780 09a2 924A ldr r2, .L700+28 + 12781 09a4 5A60 str r2, [r3, #4] + 818:Src/main.c **** + 12782 .loc 1 818 7 is_stmt 1 view .LVU4086 + 818:Src/main.c **** + 12783 .loc 1 818 29 is_stmt 0 view .LVU4087 + 12784 09a6 8022 movs r2, #128 + 12785 09a8 5A80 strh r2, [r3, #2] @ movhi + 820:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 12786 .loc 1 820 7 is_stmt 1 view .LVU4088 + 820:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 12787 .loc 1 820 17 is_stmt 0 view .LVU4089 + 12788 09aa 914B ldr r3, .L700+32 + 12789 09ac 42F21072 movw r2, #10000 + 12790 09b0 DA62 str r2, [r3, #44] + 822:Src/main.c **** if (st != HAL_OK) + 12791 .loc 1 822 7 is_stmt 1 view .LVU4090 + 822:Src/main.c **** if (st != HAL_OK) + 12792 .loc 1 822 12 is_stmt 0 view .LVU4091 + 12793 09b2 9048 ldr r0, .L700+36 + 12794 09b4 FFF7FEFF bl HAL_TIM_Base_Start_IT + 12795 .LVL1144: + 823:Src/main.c **** while(1); + 12796 .loc 1 823 7 is_stmt 1 view .LVU4092 + 823:Src/main.c **** while(1); + 12797 .loc 1 823 10 is_stmt 0 view .LVU4093 + 12798 09b8 78BB cbnz r0, .L652 + 828:Src/main.c **** uint32_t i = 10000; while (--i){} + 12799 .loc 1 828 7 is_stmt 1 view .LVU4094 + 12800 09ba 0122 movs r2, #1 + 12801 09bc 8021 movs r1, #128 + 12802 09be 8E48 ldr r0, .L700+40 + 12803 .LVL1145: + 828:Src/main.c **** uint32_t i = 10000; while (--i){} + 12804 .loc 1 828 7 is_stmt 0 view .LVU4095 + 12805 09c0 FFF7FEFF bl HAL_GPIO_WritePin + 12806 .LVL1146: + 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12807 .loc 1 829 7 is_stmt 1 view .LVU4096 + 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12808 .loc 1 829 27 view .LVU4097 + 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12809 .loc 1 829 16 is_stmt 0 view .LVU4098 + 12810 09c4 42F21073 movw r3, #10000 + ARM GAS /tmp/ccuHnxNu.s page 645 - 12656 09d6 FEE7 b .L638 - 12657 .LVL1140: - 12658 .L641: - 815:Src/main.c **** while (task.current_param < task.max_param) - 12659 .loc 1 815 8 view .LVU4062 - 815:Src/main.c **** while (task.current_param < task.max_param) - 12660 .loc 1 815 13 view .LVU4063 - 12661 09d8 FEE7 b .L641 - 12662 .L678: - 830:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 12663 .loc 1 830 7 view .LVU4064 - 12664 09da 7748 ldr r0, .L685+44 - 12665 .LVL1141: - 830:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 12666 .loc 1 830 7 is_stmt 0 view .LVU4065 - 12667 09dc FFF7FEFF bl HAL_TIM_Base_Stop - 12668 .LVL1142: + 12811 .LVL1147: + 12812 .L653: + 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12813 .loc 1 829 39 is_stmt 1 discriminator 2 view .LVU4099 + 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12814 .loc 1 829 34 discriminator 2 view .LVU4100 + 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12815 .loc 1 829 34 is_stmt 0 discriminator 2 view .LVU4101 + 12816 09c8 013B subs r3, r3, #1 + 12817 .LVL1148: + 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 12818 .loc 1 829 34 discriminator 2 view .LVU4102 + 12819 09ca FDD1 bne .L653 + 830:Src/main.c **** LD_blinker.state = 2; + 12820 .loc 1 830 7 is_stmt 1 view .LVU4103 + 12821 09cc 0022 movs r2, #0 + 12822 09ce 8021 movs r1, #128 + 12823 09d0 8948 ldr r0, .L700+40 + 12824 09d2 FFF7FEFF bl HAL_GPIO_WritePin + 12825 .LVL1149: 831:Src/main.c **** - 12669 .loc 1 831 7 is_stmt 1 view .LVU4066 - 12670 09e0 744C ldr r4, .L685+40 - 12671 09e2 0122 movs r2, #1 - 12672 09e4 8021 movs r1, #128 - 12673 09e6 2046 mov r0, r4 - 12674 09e8 FFF7FEFF bl HAL_GPIO_WritePin - 12675 .LVL1143: - 833:Src/main.c **** - 12676 .loc 1 833 7 view .LVU4067 - 12677 09ec 0022 movs r2, #0 - 12678 09ee 8021 movs r1, #128 - 12679 09f0 2046 mov r0, r4 - 12680 09f2 FFF7FEFF bl HAL_GPIO_WritePin - 12681 .LVL1144: - 835:Src/main.c **** TIM8->CNT = 0; - 12682 .loc 1 835 7 view .LVU4068 - 12683 09f6 6E48 ldr r0, .L685+36 - 12684 09f8 FFF7FEFF bl HAL_TIM_Base_Stop_IT - 12685 .LVL1145: - 836:Src/main.c **** - 12686 .loc 1 836 7 view .LVU4069 - 836:Src/main.c **** - 12687 .loc 1 836 17 is_stmt 0 view .LVU4070 - 12688 09fc 6B4B ldr r3, .L685+32 - 12689 09fe 0022 movs r2, #0 - 12690 0a00 5A62 str r2, [r3, #36] - 838:Src/main.c **** task.current_param = task.min_param; - 12691 .loc 1 838 7 is_stmt 1 view .LVU4071 - 12692 0a02 FFF7FEFF bl Stop_TIM10 - 12693 .LVL1146: - 839:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 12694 .loc 1 839 7 view .LVU4072 - 839:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 12695 .loc 1 839 32 is_stmt 0 view .LVU4073 - 12696 0a06 614C ldr r4, .L685 - 12697 0a08 D4ED017A vldr.32 s15, [r4, #4] - 839:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 12698 .loc 1 839 26 view .LVU4074 - 12699 0a0c C4ED047A vstr.32 s15, [r4, #16] - ARM GAS /tmp/ccEQxcUB.s page 642 + 12826 .loc 1 831 7 view .LVU4104 + 831:Src/main.c **** + 12827 .loc 1 831 24 is_stmt 0 view .LVU4105 + 12828 09d6 844B ldr r3, .L700+24 + 12829 09d8 0222 movs r2, #2 + 12830 09da 9A72 strb r2, [r3, #10] + 833:Src/main.c **** if (st != HAL_OK) + 12831 .loc 1 833 7 is_stmt 1 view .LVU4106 + 833:Src/main.c **** if (st != HAL_OK) + 12832 .loc 1 833 12 is_stmt 0 view .LVU4107 + 12833 09dc 8748 ldr r0, .L700+44 + 12834 09de FFF7FEFF bl HAL_TIM_Base_Start_IT + 12835 .LVL1150: + 834:Src/main.c **** while(1); + 12836 .loc 1 834 7 is_stmt 1 view .LVU4108 + 834:Src/main.c **** while(1); + 12837 .loc 1 834 10 is_stmt 0 view .LVU4109 + 12838 09e2 D8B9 cbnz r0, .L655 + 12839 .L656: + 836:Src/main.c **** { + 12840 .loc 1 836 33 is_stmt 1 view .LVU4110 + 836:Src/main.c **** { + 12841 .loc 1 836 18 is_stmt 0 view .LVU4111 + 12842 09e4 7A4B ldr r3, .L700 + 12843 09e6 D3ED047A vldr.32 s15, [r3, #16] + 836:Src/main.c **** { + 12844 .loc 1 836 39 view .LVU4112 + 12845 09ea 93ED027A vldr.32 s14, [r3, #8] + 836:Src/main.c **** { + 12846 .loc 1 836 33 view .LVU4113 + 12847 09ee F4EEC77A vcmpe.f32 s15, s14 + 12848 09f2 F1EE10FA vmrs APSR_nzcv, FPSCR + 12849 09f6 12D5 bpl .L693 + 838:Src/main.c **** { + 12850 .loc 1 838 8 is_stmt 1 view .LVU4114 + 838:Src/main.c **** { + ARM GAS /tmp/ccuHnxNu.s page 646 - 840:Src/main.c **** if (task.tau > 3) - 12700 .loc 1 840 7 is_stmt 1 view .LVU4075 - 12701 0a10 FCEEE77A vcvt.u32.f32 s15, s15 - 12702 0a14 17EE903A vmov r3, s15 @ int - 12703 0a18 99B2 uxth r1, r3 - 12704 0a1a 0220 movs r0, #2 - 12705 0a1c FFF7FEFF bl Set_LTEC - 12706 .LVL1147: - 841:Src/main.c **** { - 12707 .loc 1 841 7 view .LVU4076 - 841:Src/main.c **** { - 12708 .loc 1 841 15 is_stmt 0 view .LVU4077 - 12709 0a20 E38A ldrh r3, [r4, #22] - 841:Src/main.c **** { - 12710 .loc 1 841 10 view .LVU4078 - 12711 0a22 032B cmp r3, #3 - 12712 0a24 0CD9 bls .L644 - 843:Src/main.c **** htim10.Init.Period = 9999; - 12713 .loc 1 843 8 is_stmt 1 view .LVU4079 - 843:Src/main.c **** htim10.Init.Period = 9999; - 12714 .loc 1 843 34 is_stmt 0 view .LVU4080 - 12715 0a26 644A ldr r2, .L685+44 - 12716 0a28 D068 ldr r0, [r2, #12] - 843:Src/main.c **** htim10.Init.Period = 9999; - 12717 .loc 1 843 21 view .LVU4081 - 12718 0a2a 6649 ldr r1, .L685+56 - 12719 0a2c 0860 str r0, [r1] - 844:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12720 .loc 1 844 8 is_stmt 1 view .LVU4082 - 844:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12721 .loc 1 844 27 is_stmt 0 view .LVU4083 - 12722 0a2e 42F20F71 movw r1, #9999 - 12723 0a32 D160 str r1, [r2, #12] - 845:Src/main.c **** } - 12724 .loc 1 845 8 is_stmt 1 view .LVU4084 - 845:Src/main.c **** } - 12725 .loc 1 845 33 is_stmt 0 view .LVU4085 - 12726 0a34 013B subs r3, r3, #1 - 845:Src/main.c **** } - 12727 .loc 1 845 38 view .LVU4086 - 12728 0a36 6422 movs r2, #100 - 12729 0a38 02FB03F3 mul r3, r2, r3 - 845:Src/main.c **** } - 12730 .loc 1 845 21 view .LVU4087 - 12731 0a3c 624A ldr r2, .L685+60 - 12732 0a3e 1360 str r3, [r2] - 12733 .L644: - 847:Src/main.c **** - 12734 .loc 1 847 7 is_stmt 1 view .LVU4088 - 12735 0a40 5D48 ldr r0, .L685+44 - 12736 0a42 FFF7FEFF bl HAL_TIM_Base_Start_IT - 12737 .LVL1148: - 895:Src/main.c **** case TT_CHANGE_TEMP_1: - 12738 .loc 1 895 6 view .LVU4089 - 12739 0a46 12E6 b .L629 - 12740 .LVL1149: - 12741 .L675: - ARM GAS /tmp/ccEQxcUB.s page 643 + 12851 .loc 1 838 12 is_stmt 0 view .LVU4115 + 12852 09f8 814B ldr r3, .L700+48 + 12853 09fa 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 838:Src/main.c **** { + 12854 .loc 1 838 11 view .LVU4116 + 12855 09fc 002B cmp r3, #0 + 12856 09fe F1D0 beq .L656 + 843:Src/main.c **** TO10 = 0; + 12857 .loc 1 843 9 is_stmt 1 view .LVU4117 + 843:Src/main.c **** TO10 = 0; + 12858 .loc 1 843 35 is_stmt 0 view .LVU4118 + 12859 0a00 734B ldr r3, .L700 + 12860 0a02 93ED037A vldr.32 s14, [r3, #12] + 843:Src/main.c **** TO10 = 0; + 12861 .loc 1 843 28 view .LVU4119 + 12862 0a06 77EE277A vadd.f32 s15, s14, s15 + 12863 0a0a C3ED047A vstr.32 s15, [r3, #16] + 844:Src/main.c **** TIM10_coflag = 0; + 12864 .loc 1 844 9 is_stmt 1 view .LVU4120 + 844:Src/main.c **** TIM10_coflag = 0; + 12865 .loc 1 844 14 is_stmt 0 view .LVU4121 + 12866 0a0e 0023 movs r3, #0 + 12867 0a10 7C4A ldr r2, .L700+52 + 12868 0a12 1360 str r3, [r2] + 845:Src/main.c **** + 12869 .loc 1 845 9 is_stmt 1 view .LVU4122 + 845:Src/main.c **** + 12870 .loc 1 845 22 is_stmt 0 view .LVU4123 + 12871 0a14 7A4A ldr r2, .L700+48 + 12872 0a16 1370 strb r3, [r2] + 12873 0a18 E4E7 b .L656 + 12874 .LVL1151: + 12875 .L652: + 824:Src/main.c **** // */ + 12876 .loc 1 824 8 is_stmt 1 view .LVU4124 + 824:Src/main.c **** // */ + 12877 .loc 1 824 13 view .LVU4125 + 12878 0a1a FEE7 b .L652 + 12879 .LVL1152: + 12880 .L655: + 835:Src/main.c **** while (task.current_param < task.max_param) + 12881 .loc 1 835 8 view .LVU4126 + 835:Src/main.c **** while (task.current_param < task.max_param) + 12882 .loc 1 835 13 view .LVU4127 + 12883 0a1c FEE7 b .L655 + 12884 .L693: + 850:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 12885 .loc 1 850 7 view .LVU4128 + 12886 0a1e 7748 ldr r0, .L700+44 + 12887 .LVL1153: + 850:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 12888 .loc 1 850 7 is_stmt 0 view .LVU4129 + 12889 0a20 FFF7FEFF bl HAL_TIM_Base_Stop + 12890 .LVL1154: + 851:Src/main.c **** + 12891 .loc 1 851 7 is_stmt 1 view .LVU4130 + 12892 0a24 744C ldr r4, .L700+40 + ARM GAS /tmp/ccuHnxNu.s page 647 - 895:Src/main.c **** case TT_CHANGE_TEMP_1: - 12742 .loc 1 895 6 is_stmt 0 view .LVU4090 - 12743 .LBE708: - 906:Src/main.c **** - 12744 .loc 1 906 7 is_stmt 1 view .LVU4091 - 906:Src/main.c **** - 12745 .loc 1 906 18 is_stmt 0 view .LVU4092 - 12746 0a48 604A ldr r2, .L685+64 - 12747 0a4a 1360 str r3, [r2] - 908:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 12748 .loc 1 908 7 is_stmt 1 view .LVU4093 - 908:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 12749 .loc 1 908 25 is_stmt 0 view .LVU4094 - 12750 0a4c 0120 movs r0, #1 - 12751 0a4e FFF7FEFF bl MPhD_T - 12752 .LVL1150: - 908:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 12753 .loc 1 908 23 discriminator 1 view .LVU4095 - 12754 0a52 4F4E ldr r6, .L685+4 - 12755 0a54 3081 strh r0, [r6, #8] @ movhi - 909:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12756 .loc 1 909 7 is_stmt 1 view .LVU4096 - 909:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12757 .loc 1 909 25 is_stmt 0 view .LVU4097 - 12758 0a56 0120 movs r0, #1 - 12759 0a58 FFF7FEFF bl MPhD_T - 12760 .LVL1151: - 909:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12761 .loc 1 909 23 discriminator 1 view .LVU4098 - 12762 0a5c 3081 strh r0, [r6, #8] @ movhi - 910:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12763 .loc 1 910 7 is_stmt 1 view .LVU4099 - 910:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12764 .loc 1 910 25 is_stmt 0 view .LVU4100 - 12765 0a5e 0220 movs r0, #2 - 12766 0a60 FFF7FEFF bl MPhD_T - 12767 .LVL1152: - 910:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12768 .loc 1 910 23 discriminator 1 view .LVU4101 - 12769 0a64 4B4F ldr r7, .L685+8 - 12770 0a66 3881 strh r0, [r7, #8] @ movhi - 911:Src/main.c **** - 12771 .loc 1 911 7 is_stmt 1 view .LVU4102 - 911:Src/main.c **** - 12772 .loc 1 911 25 is_stmt 0 view .LVU4103 - 12773 0a68 0220 movs r0, #2 - 12774 0a6a FFF7FEFF bl MPhD_T - 12775 .LVL1153: - 911:Src/main.c **** - 12776 .loc 1 911 23 discriminator 1 view .LVU4104 - 12777 0a6e 3881 strh r0, [r7, #8] @ movhi - 913:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 12778 .loc 1 913 7 is_stmt 1 view .LVU4105 - 913:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 12779 .loc 1 913 31 is_stmt 0 view .LVU4106 - 12780 0a70 3389 ldrh r3, [r6, #8] - 913:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - ARM GAS /tmp/ccEQxcUB.s page 644 + 12893 0a26 0122 movs r2, #1 + 12894 0a28 8021 movs r1, #128 + 12895 0a2a 2046 mov r0, r4 + 12896 0a2c FFF7FEFF bl HAL_GPIO_WritePin + 12897 .LVL1155: + 853:Src/main.c **** + 12898 .loc 1 853 7 view .LVU4131 + 12899 0a30 0022 movs r2, #0 + 12900 0a32 8021 movs r1, #128 + 12901 0a34 2046 mov r0, r4 + 12902 0a36 FFF7FEFF bl HAL_GPIO_WritePin + 12903 .LVL1156: + 855:Src/main.c **** TIM8->CNT = 0; + 12904 .loc 1 855 7 view .LVU4132 + 12905 0a3a 6E48 ldr r0, .L700+36 + 12906 0a3c FFF7FEFF bl HAL_TIM_Base_Stop_IT + 12907 .LVL1157: + 856:Src/main.c **** + 12908 .loc 1 856 7 view .LVU4133 + 856:Src/main.c **** + 12909 .loc 1 856 17 is_stmt 0 view .LVU4134 + 12910 0a40 6B4B ldr r3, .L700+32 + 12911 0a42 0022 movs r2, #0 + 12912 0a44 5A62 str r2, [r3, #36] + 858:Src/main.c **** task.current_param = task.min_param; + 12913 .loc 1 858 7 is_stmt 1 view .LVU4135 + 12914 0a46 FFF7FEFF bl Stop_TIM10 + 12915 .LVL1158: + 859:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 12916 .loc 1 859 7 view .LVU4136 + 859:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 12917 .loc 1 859 32 is_stmt 0 view .LVU4137 + 12918 0a4a 614C ldr r4, .L700 + 12919 0a4c D4ED017A vldr.32 s15, [r4, #4] + 859:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 12920 .loc 1 859 26 view .LVU4138 + 12921 0a50 C4ED047A vstr.32 s15, [r4, #16] + 860:Src/main.c **** if (task.tau > 3) + 12922 .loc 1 860 7 is_stmt 1 view .LVU4139 + 12923 0a54 FCEEE77A vcvt.u32.f32 s15, s15 + 12924 0a58 17EE903A vmov r3, s15 @ int + 12925 0a5c 99B2 uxth r1, r3 + 12926 0a5e 0220 movs r0, #2 + 12927 0a60 FFF7FEFF bl Set_LTEC + 12928 .LVL1159: + 861:Src/main.c **** { + 12929 .loc 1 861 7 view .LVU4140 + 861:Src/main.c **** { + 12930 .loc 1 861 15 is_stmt 0 view .LVU4141 + 12931 0a64 E38A ldrh r3, [r4, #22] + 861:Src/main.c **** { + 12932 .loc 1 861 10 view .LVU4142 + 12933 0a66 032B cmp r3, #3 + 12934 0a68 0CD9 bls .L658 + 863:Src/main.c **** htim10.Init.Period = 9999; + 12935 .loc 1 863 8 is_stmt 1 view .LVU4143 + 863:Src/main.c **** htim10.Init.Period = 9999; + ARM GAS /tmp/ccuHnxNu.s page 648 - 12781 .loc 1 913 20 view .LVU4107 - 12782 0a72 574C ldr r4, .L685+68 - 12783 0a74 6380 strh r3, [r4, #2] @ movhi - 914:Src/main.c **** - 12784 .loc 1 914 7 is_stmt 1 view .LVU4108 - 914:Src/main.c **** - 12785 .loc 1 914 20 is_stmt 0 view .LVU4109 - 12786 0a76 A080 strh r0, [r4, #4] @ movhi - 918:Src/main.c **** temp16 = Get_ADC(1); - 12787 .loc 1 918 7 is_stmt 1 view .LVU4110 - 918:Src/main.c **** temp16 = Get_ADC(1); - 12788 .loc 1 918 16 is_stmt 0 view .LVU4111 - 12789 0a78 0020 movs r0, #0 - 12790 0a7a FFF7FEFF bl Get_ADC - 12791 .LVL1154: - 918:Src/main.c **** temp16 = Get_ADC(1); - 12792 .loc 1 918 14 discriminator 1 view .LVU4112 - 12793 0a7e 474D ldr r5, .L685+16 - 12794 0a80 2880 strh r0, [r5] @ movhi - 919:Src/main.c **** Long_Data[7] = temp16; - 12795 .loc 1 919 7 is_stmt 1 view .LVU4113 - 919:Src/main.c **** Long_Data[7] = temp16; - 12796 .loc 1 919 16 is_stmt 0 view .LVU4114 - 12797 0a82 0120 movs r0, #1 - 12798 0a84 FFF7FEFF bl Get_ADC - 12799 .LVL1155: - 919:Src/main.c **** Long_Data[7] = temp16; - 12800 .loc 1 919 14 discriminator 1 view .LVU4115 - 12801 0a88 2880 strh r0, [r5] @ movhi - 920:Src/main.c **** - 12802 .loc 1 920 7 is_stmt 1 view .LVU4116 - 920:Src/main.c **** - 12803 .loc 1 920 20 is_stmt 0 view .LVU4117 - 12804 0a8a E081 strh r0, [r4, #14] @ movhi - 923:Src/main.c **** Long_Data[8] = temp16; - 12805 .loc 1 923 7 is_stmt 1 view .LVU4118 - 923:Src/main.c **** Long_Data[8] = temp16; - 12806 .loc 1 923 16 is_stmt 0 view .LVU4119 - 12807 0a8c 0120 movs r0, #1 - 12808 0a8e FFF7FEFF bl Get_ADC - 12809 .LVL1156: - 923:Src/main.c **** Long_Data[8] = temp16; - 12810 .loc 1 923 14 discriminator 1 view .LVU4120 - 12811 0a92 2880 strh r0, [r5] @ movhi - 924:Src/main.c **** - 12812 .loc 1 924 7 is_stmt 1 view .LVU4121 - 924:Src/main.c **** - 12813 .loc 1 924 20 is_stmt 0 view .LVU4122 - 12814 0a94 2082 strh r0, [r4, #16] @ movhi - 927:Src/main.c **** Long_Data[9] = temp16; - 12815 .loc 1 927 7 is_stmt 1 view .LVU4123 - 927:Src/main.c **** Long_Data[9] = temp16; - 12816 .loc 1 927 16 is_stmt 0 view .LVU4124 - 12817 0a96 0120 movs r0, #1 - 12818 0a98 FFF7FEFF bl Get_ADC - 12819 .LVL1157: - 927:Src/main.c **** Long_Data[9] = temp16; - ARM GAS /tmp/ccEQxcUB.s page 645 + 12936 .loc 1 863 34 is_stmt 0 view .LVU4144 + 12937 0a6a 644A ldr r2, .L700+44 + 12938 0a6c D068 ldr r0, [r2, #12] + 863:Src/main.c **** htim10.Init.Period = 9999; + 12939 .loc 1 863 21 view .LVU4145 + 12940 0a6e 6649 ldr r1, .L700+56 + 12941 0a70 0860 str r0, [r1] + 864:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 12942 .loc 1 864 8 is_stmt 1 view .LVU4146 + 864:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 12943 .loc 1 864 27 is_stmt 0 view .LVU4147 + 12944 0a72 42F20F71 movw r1, #9999 + 12945 0a76 D160 str r1, [r2, #12] + 865:Src/main.c **** } + 12946 .loc 1 865 8 is_stmt 1 view .LVU4148 + 865:Src/main.c **** } + 12947 .loc 1 865 33 is_stmt 0 view .LVU4149 + 12948 0a78 013B subs r3, r3, #1 + 865:Src/main.c **** } + 12949 .loc 1 865 38 view .LVU4150 + 12950 0a7a 6422 movs r2, #100 + 12951 0a7c 02FB03F3 mul r3, r2, r3 + 865:Src/main.c **** } + 12952 .loc 1 865 21 view .LVU4151 + 12953 0a80 624A ldr r2, .L700+60 + 12954 0a82 1360 str r3, [r2] + 12955 .L658: + 867:Src/main.c **** + 12956 .loc 1 867 7 is_stmt 1 view .LVU4152 + 12957 0a84 5D48 ldr r0, .L700+44 + 12958 0a86 FFF7FEFF bl HAL_TIM_Base_Start_IT + 12959 .LVL1160: + 915:Src/main.c **** case TT_CHANGE_TEMP_1: + 12960 .loc 1 915 6 view .LVU4153 + 12961 0a8a 12E6 b .L643 + 12962 .LVL1161: + 12963 .L690: + 915:Src/main.c **** case TT_CHANGE_TEMP_1: + 12964 .loc 1 915 6 is_stmt 0 view .LVU4154 + 12965 .LBE712: + 926:Src/main.c **** + 12966 .loc 1 926 7 is_stmt 1 view .LVU4155 + 926:Src/main.c **** + 12967 .loc 1 926 18 is_stmt 0 view .LVU4156 + 12968 0a8c 604A ldr r2, .L700+64 + 12969 0a8e 1360 str r3, [r2] + 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 12970 .loc 1 928 7 is_stmt 1 view .LVU4157 + 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 12971 .loc 1 928 25 is_stmt 0 view .LVU4158 + 12972 0a90 0120 movs r0, #1 + 12973 0a92 FFF7FEFF bl MPhD_T + 12974 .LVL1162: + 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 12975 .loc 1 928 23 discriminator 1 view .LVU4159 + 12976 0a96 4F4E ldr r6, .L700+4 + 12977 0a98 3081 strh r0, [r6, #8] @ movhi + ARM GAS /tmp/ccuHnxNu.s page 649 - 12820 .loc 1 927 14 discriminator 1 view .LVU4125 - 12821 0a9c 2880 strh r0, [r5] @ movhi - 928:Src/main.c **** - 12822 .loc 1 928 7 is_stmt 1 view .LVU4126 - 928:Src/main.c **** - 12823 .loc 1 928 20 is_stmt 0 view .LVU4127 - 12824 0a9e 6082 strh r0, [r4, #18] @ movhi - 931:Src/main.c **** Long_Data[10] = temp16; - 12825 .loc 1 931 7 is_stmt 1 view .LVU4128 - 931:Src/main.c **** Long_Data[10] = temp16; - 12826 .loc 1 931 16 is_stmt 0 view .LVU4129 - 12827 0aa0 0120 movs r0, #1 - 12828 0aa2 FFF7FEFF bl Get_ADC - 12829 .LVL1158: - 931:Src/main.c **** Long_Data[10] = temp16; - 12830 .loc 1 931 14 discriminator 1 view .LVU4130 - 12831 0aa6 2880 strh r0, [r5] @ movhi - 932:Src/main.c **** - 12832 .loc 1 932 7 is_stmt 1 view .LVU4131 - 932:Src/main.c **** - 12833 .loc 1 932 21 is_stmt 0 view .LVU4132 - 12834 0aa8 A082 strh r0, [r4, #20] @ movhi - 935:Src/main.c **** Long_Data[11] = temp16; - 12835 .loc 1 935 7 is_stmt 1 view .LVU4133 - 935:Src/main.c **** Long_Data[11] = temp16; - 12836 .loc 1 935 16 is_stmt 0 view .LVU4134 - 12837 0aaa 0120 movs r0, #1 - 12838 0aac FFF7FEFF bl Get_ADC - 12839 .LVL1159: - 935:Src/main.c **** Long_Data[11] = temp16; - 12840 .loc 1 935 14 discriminator 1 view .LVU4135 - 12841 0ab0 2880 strh r0, [r5] @ movhi - 936:Src/main.c **** temp16 = Get_ADC(2); - 12842 .loc 1 936 7 is_stmt 1 view .LVU4136 - 936:Src/main.c **** temp16 = Get_ADC(2); - 12843 .loc 1 936 21 is_stmt 0 view .LVU4137 - 12844 0ab2 E082 strh r0, [r4, #22] @ movhi - 937:Src/main.c **** - 12845 .loc 1 937 7 is_stmt 1 view .LVU4138 - 937:Src/main.c **** - 12846 .loc 1 937 16 is_stmt 0 view .LVU4139 - 12847 0ab4 0220 movs r0, #2 - 12848 0ab6 FFF7FEFF bl Get_ADC - 12849 .LVL1160: - 937:Src/main.c **** - 12850 .loc 1 937 14 discriminator 1 view .LVU4140 - 12851 0aba 2880 strh r0, [r5] @ movhi - 940:Src/main.c **** temp16 = Get_ADC(4); - 12852 .loc 1 940 7 is_stmt 1 view .LVU4141 - 940:Src/main.c **** temp16 = Get_ADC(4); - 12853 .loc 1 940 16 is_stmt 0 view .LVU4142 - 12854 0abc 0320 movs r0, #3 - 12855 0abe FFF7FEFF bl Get_ADC - 12856 .LVL1161: - 940:Src/main.c **** temp16 = Get_ADC(4); - 12857 .loc 1 940 14 discriminator 1 view .LVU4143 - 12858 0ac2 2880 strh r0, [r5] @ movhi - ARM GAS /tmp/ccEQxcUB.s page 646 + 929:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 12978 .loc 1 929 7 is_stmt 1 view .LVU4160 + 929:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 12979 .loc 1 929 25 is_stmt 0 view .LVU4161 + 12980 0a9a 0120 movs r0, #1 + 12981 0a9c FFF7FEFF bl MPhD_T + 12982 .LVL1163: + 929:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 12983 .loc 1 929 23 discriminator 1 view .LVU4162 + 12984 0aa0 3081 strh r0, [r6, #8] @ movhi + 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 12985 .loc 1 930 7 is_stmt 1 view .LVU4163 + 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 12986 .loc 1 930 25 is_stmt 0 view .LVU4164 + 12987 0aa2 0220 movs r0, #2 + 12988 0aa4 FFF7FEFF bl MPhD_T + 12989 .LVL1164: + 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 12990 .loc 1 930 23 discriminator 1 view .LVU4165 + 12991 0aa8 4B4F ldr r7, .L700+8 + 12992 0aaa 3881 strh r0, [r7, #8] @ movhi + 931:Src/main.c **** + 12993 .loc 1 931 7 is_stmt 1 view .LVU4166 + 931:Src/main.c **** + 12994 .loc 1 931 25 is_stmt 0 view .LVU4167 + 12995 0aac 0220 movs r0, #2 + 12996 0aae FFF7FEFF bl MPhD_T + 12997 .LVL1165: + 931:Src/main.c **** + 12998 .loc 1 931 23 discriminator 1 view .LVU4168 + 12999 0ab2 3881 strh r0, [r7, #8] @ movhi + 933:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 13000 .loc 1 933 7 is_stmt 1 view .LVU4169 + 933:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 13001 .loc 1 933 31 is_stmt 0 view .LVU4170 + 13002 0ab4 3389 ldrh r3, [r6, #8] + 933:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 13003 .loc 1 933 20 view .LVU4171 + 13004 0ab6 574C ldr r4, .L700+68 + 13005 0ab8 6380 strh r3, [r4, #2] @ movhi + 934:Src/main.c **** + 13006 .loc 1 934 7 is_stmt 1 view .LVU4172 + 934:Src/main.c **** + 13007 .loc 1 934 20 is_stmt 0 view .LVU4173 + 13008 0aba A080 strh r0, [r4, #4] @ movhi + 938:Src/main.c **** temp16 = Get_ADC(1); + 13009 .loc 1 938 7 is_stmt 1 view .LVU4174 + 938:Src/main.c **** temp16 = Get_ADC(1); + 13010 .loc 1 938 16 is_stmt 0 view .LVU4175 + 13011 0abc 0020 movs r0, #0 + 13012 0abe FFF7FEFF bl Get_ADC + 13013 .LVL1166: + 938:Src/main.c **** temp16 = Get_ADC(1); + 13014 .loc 1 938 14 discriminator 1 view .LVU4176 + 13015 0ac2 474D ldr r5, .L700+16 + 13016 0ac4 2880 strh r0, [r5] @ movhi + 939:Src/main.c **** Long_Data[7] = temp16; + ARM GAS /tmp/ccuHnxNu.s page 650 - 941:Src/main.c **** Long_Data[12] = temp16; - 12859 .loc 1 941 7 is_stmt 1 view .LVU4144 - 941:Src/main.c **** Long_Data[12] = temp16; - 12860 .loc 1 941 16 is_stmt 0 view .LVU4145 - 12861 0ac4 0420 movs r0, #4 - 12862 0ac6 FFF7FEFF bl Get_ADC - 12863 .LVL1162: - 941:Src/main.c **** Long_Data[12] = temp16; - 12864 .loc 1 941 14 discriminator 1 view .LVU4146 - 12865 0aca 2880 strh r0, [r5] @ movhi - 942:Src/main.c **** temp16 = Get_ADC(5); - 12866 .loc 1 942 7 is_stmt 1 view .LVU4147 - 942:Src/main.c **** temp16 = Get_ADC(5); - 12867 .loc 1 942 21 is_stmt 0 view .LVU4148 - 12868 0acc 2083 strh r0, [r4, #24] @ movhi - 943:Src/main.c **** - 12869 .loc 1 943 7 is_stmt 1 view .LVU4149 - 943:Src/main.c **** - 12870 .loc 1 943 16 is_stmt 0 view .LVU4150 - 12871 0ace 0520 movs r0, #5 - 12872 0ad0 FFF7FEFF bl Get_ADC - 12873 .LVL1163: - 943:Src/main.c **** - 12874 .loc 1 943 14 discriminator 1 view .LVU4151 - 12875 0ad4 2880 strh r0, [r5] @ movhi - 946:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 12876 .loc 1 946 7 is_stmt 1 view .LVU4152 - 946:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 12877 .loc 1 946 16 is_stmt 0 view .LVU4153 - 12878 0ad6 3F4B ldr r3, .L685+72 - 12879 0ad8 1B68 ldr r3, [r3] - 12880 0ada 3F4A ldr r2, .L685+76 - 12881 0adc 1360 str r3, [r2] - 947:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 12882 .loc 1 947 7 is_stmt 1 view .LVU4154 - 947:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 12883 .loc 1 947 20 is_stmt 0 view .LVU4155 - 12884 0ade E380 strh r3, [r4, #6] @ movhi + 13017 .loc 1 939 7 is_stmt 1 view .LVU4177 + 939:Src/main.c **** Long_Data[7] = temp16; + 13018 .loc 1 939 16 is_stmt 0 view .LVU4178 + 13019 0ac6 0120 movs r0, #1 + 13020 0ac8 FFF7FEFF bl Get_ADC + 13021 .LVL1167: + 939:Src/main.c **** Long_Data[7] = temp16; + 13022 .loc 1 939 14 discriminator 1 view .LVU4179 + 13023 0acc 2880 strh r0, [r5] @ movhi + 940:Src/main.c **** + 13024 .loc 1 940 7 is_stmt 1 view .LVU4180 + 940:Src/main.c **** + 13025 .loc 1 940 20 is_stmt 0 view .LVU4181 + 13026 0ace E081 strh r0, [r4, #14] @ movhi + 943:Src/main.c **** Long_Data[8] = temp16; + 13027 .loc 1 943 7 is_stmt 1 view .LVU4182 + 943:Src/main.c **** Long_Data[8] = temp16; + 13028 .loc 1 943 16 is_stmt 0 view .LVU4183 + 13029 0ad0 0120 movs r0, #1 + 13030 0ad2 FFF7FEFF bl Get_ADC + 13031 .LVL1168: + 943:Src/main.c **** Long_Data[8] = temp16; + 13032 .loc 1 943 14 discriminator 1 view .LVU4184 + 13033 0ad6 2880 strh r0, [r5] @ movhi + 944:Src/main.c **** + 13034 .loc 1 944 7 is_stmt 1 view .LVU4185 + 944:Src/main.c **** + 13035 .loc 1 944 20 is_stmt 0 view .LVU4186 + 13036 0ad8 2082 strh r0, [r4, #16] @ movhi + 947:Src/main.c **** Long_Data[9] = temp16; + 13037 .loc 1 947 7 is_stmt 1 view .LVU4187 + 947:Src/main.c **** Long_Data[9] = temp16; + 13038 .loc 1 947 16 is_stmt 0 view .LVU4188 + 13039 0ada 0120 movs r0, #1 + 13040 0adc FFF7FEFF bl Get_ADC + 13041 .LVL1169: + 947:Src/main.c **** Long_Data[9] = temp16; + 13042 .loc 1 947 14 discriminator 1 view .LVU4189 + 13043 0ae0 2880 strh r0, [r5] @ movhi 948:Src/main.c **** - 12885 .loc 1 948 7 is_stmt 1 view .LVU4156 + 13044 .loc 1 948 7 is_stmt 1 view .LVU4190 948:Src/main.c **** - 12886 .loc 1 948 31 is_stmt 0 view .LVU4157 - 12887 0ae0 1B0C lsrs r3, r3, #16 - 948:Src/main.c **** - 12888 .loc 1 948 20 view .LVU4158 - 12889 0ae2 2381 strh r3, [r4, #8] @ movhi - 951:Src/main.c **** - 12890 .loc 1 951 7 is_stmt 1 view .LVU4159 - 951:Src/main.c **** - 12891 .loc 1 951 31 is_stmt 0 view .LVU4160 - 12892 0ae4 3388 ldrh r3, [r6] - 951:Src/main.c **** - 12893 .loc 1 951 20 view .LVU4161 - 12894 0ae6 6381 strh r3, [r4, #10] @ movhi - 954:Src/main.c **** } - 12895 .loc 1 954 7 is_stmt 1 view .LVU4162 - 954:Src/main.c **** } - ARM GAS /tmp/ccEQxcUB.s page 647 + 13045 .loc 1 948 20 is_stmt 0 view .LVU4191 + 13046 0ae2 6082 strh r0, [r4, #18] @ movhi + 951:Src/main.c **** Long_Data[10] = temp16; + 13047 .loc 1 951 7 is_stmt 1 view .LVU4192 + 951:Src/main.c **** Long_Data[10] = temp16; + 13048 .loc 1 951 16 is_stmt 0 view .LVU4193 + 13049 0ae4 0120 movs r0, #1 + 13050 0ae6 FFF7FEFF bl Get_ADC + 13051 .LVL1170: + 951:Src/main.c **** Long_Data[10] = temp16; + 13052 .loc 1 951 14 discriminator 1 view .LVU4194 + 13053 0aea 2880 strh r0, [r5] @ movhi + 952:Src/main.c **** + 13054 .loc 1 952 7 is_stmt 1 view .LVU4195 + 952:Src/main.c **** + ARM GAS /tmp/ccuHnxNu.s page 651 - 12896 .loc 1 954 31 is_stmt 0 view .LVU4163 - 12897 0ae8 3B88 ldrh r3, [r7] - 954:Src/main.c **** } - 12898 .loc 1 954 20 view .LVU4164 - 12899 0aea A381 strh r3, [r4, #12] @ movhi - 12900 0aec C6E5 b .L646 - 12901 .L648: - 982:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 12902 .loc 1 982 5 is_stmt 1 view .LVU4165 - 982:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 12903 .loc 1 982 17 is_stmt 0 view .LVU4166 - 12904 0aee 3B4C ldr r4, .L685+80 - 12905 0af0 0D21 movs r1, #13 - 12906 0af2 2046 mov r0, r4 - 12907 0af4 FFF7FEFF bl CalculateChecksum - 12908 .LVL1164: - 982:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 12909 .loc 1 982 15 discriminator 1 view .LVU4167 - 12910 0af8 394B ldr r3, .L685+84 - 12911 0afa 1880 strh r0, [r3] @ movhi - 983:Src/main.c **** - 12912 .loc 1 983 5 is_stmt 1 view .LVU4168 - 983:Src/main.c **** - 12913 .loc 1 983 24 is_stmt 0 view .LVU4169 - 12914 0afc 6083 strh r0, [r4, #26] @ movhi - 985:Src/main.c **** { - 12915 .loc 1 985 5 is_stmt 1 view .LVU4170 - 12916 .LBB709: - 985:Src/main.c **** { - 12917 .loc 1 985 10 view .LVU4171 - 12918 .LVL1165: - 985:Src/main.c **** { - 12919 .loc 1 985 19 is_stmt 0 view .LVU4172 - 12920 0afe 0023 movs r3, #0 - 985:Src/main.c **** { - 12921 .loc 1 985 5 view .LVU4173 - 12922 0b00 0BE0 b .L651 - 12923 .LVL1166: - 12924 .L652: - 987:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12925 .loc 1 987 6 is_stmt 1 view .LVU4174 - 987:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12926 .loc 1 987 33 is_stmt 0 view .LVU4175 - 12927 0b02 334A ldr r2, .L685+68 - 12928 0b04 32F81320 ldrh r2, [r2, r3, lsl #1] - 987:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12929 .loc 1 987 17 view .LVU4176 - 12930 0b08 5900 lsls r1, r3, #1 - 987:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12931 .loc 1 987 21 view .LVU4177 - 12932 0b0a 3648 ldr r0, .L685+88 - 12933 0b0c 00F81320 strb r2, [r0, r3, lsl #1] - 988:Src/main.c **** } - 12934 .loc 1 988 6 is_stmt 1 view .LVU4178 - 988:Src/main.c **** } - 12935 .loc 1 988 19 is_stmt 0 view .LVU4179 - 12936 0b10 0131 adds r1, r1, #1 - ARM GAS /tmp/ccEQxcUB.s page 648 + 13055 .loc 1 952 21 is_stmt 0 view .LVU4196 + 13056 0aec A082 strh r0, [r4, #20] @ movhi + 955:Src/main.c **** Long_Data[11] = temp16; + 13057 .loc 1 955 7 is_stmt 1 view .LVU4197 + 955:Src/main.c **** Long_Data[11] = temp16; + 13058 .loc 1 955 16 is_stmt 0 view .LVU4198 + 13059 0aee 0120 movs r0, #1 + 13060 0af0 FFF7FEFF bl Get_ADC + 13061 .LVL1171: + 955:Src/main.c **** Long_Data[11] = temp16; + 13062 .loc 1 955 14 discriminator 1 view .LVU4199 + 13063 0af4 2880 strh r0, [r5] @ movhi + 956:Src/main.c **** temp16 = Get_ADC(2); + 13064 .loc 1 956 7 is_stmt 1 view .LVU4200 + 956:Src/main.c **** temp16 = Get_ADC(2); + 13065 .loc 1 956 21 is_stmt 0 view .LVU4201 + 13066 0af6 E082 strh r0, [r4, #22] @ movhi + 957:Src/main.c **** + 13067 .loc 1 957 7 is_stmt 1 view .LVU4202 + 957:Src/main.c **** + 13068 .loc 1 957 16 is_stmt 0 view .LVU4203 + 13069 0af8 0220 movs r0, #2 + 13070 0afa FFF7FEFF bl Get_ADC + 13071 .LVL1172: + 957:Src/main.c **** + 13072 .loc 1 957 14 discriminator 1 view .LVU4204 + 13073 0afe 2880 strh r0, [r5] @ movhi + 960:Src/main.c **** temp16 = Get_ADC(4); + 13074 .loc 1 960 7 is_stmt 1 view .LVU4205 + 960:Src/main.c **** temp16 = Get_ADC(4); + 13075 .loc 1 960 16 is_stmt 0 view .LVU4206 + 13076 0b00 0320 movs r0, #3 + 13077 0b02 FFF7FEFF bl Get_ADC + 13078 .LVL1173: + 960:Src/main.c **** temp16 = Get_ADC(4); + 13079 .loc 1 960 14 discriminator 1 view .LVU4207 + 13080 0b06 2880 strh r0, [r5] @ movhi + 961:Src/main.c **** Long_Data[12] = temp16; + 13081 .loc 1 961 7 is_stmt 1 view .LVU4208 + 961:Src/main.c **** Long_Data[12] = temp16; + 13082 .loc 1 961 16 is_stmt 0 view .LVU4209 + 13083 0b08 0420 movs r0, #4 + 13084 0b0a FFF7FEFF bl Get_ADC + 13085 .LVL1174: + 961:Src/main.c **** Long_Data[12] = temp16; + 13086 .loc 1 961 14 discriminator 1 view .LVU4210 + 13087 0b0e 2880 strh r0, [r5] @ movhi + 962:Src/main.c **** temp16 = Get_ADC(5); + 13088 .loc 1 962 7 is_stmt 1 view .LVU4211 + 962:Src/main.c **** temp16 = Get_ADC(5); + 13089 .loc 1 962 21 is_stmt 0 view .LVU4212 + 13090 0b10 2083 strh r0, [r4, #24] @ movhi + 963:Src/main.c **** + 13091 .loc 1 963 7 is_stmt 1 view .LVU4213 + 963:Src/main.c **** + 13092 .loc 1 963 16 is_stmt 0 view .LVU4214 + 13093 0b12 0520 movs r0, #5 + ARM GAS /tmp/ccuHnxNu.s page 652 - 988:Src/main.c **** } - 12937 .loc 1 988 23 view .LVU4180 - 12938 0b12 120A lsrs r2, r2, #8 - 12939 0b14 4254 strb r2, [r0, r1] - 985:Src/main.c **** { - 12940 .loc 1 985 38 is_stmt 1 discriminator 3 view .LVU4181 - 12941 0b16 0133 adds r3, r3, #1 - 12942 .LVL1167: - 985:Src/main.c **** { - 12943 .loc 1 985 38 is_stmt 0 discriminator 3 view .LVU4182 - 12944 0b18 9BB2 uxth r3, r3 - 12945 .LVL1168: - 12946 .L651: - 985:Src/main.c **** { - 12947 .loc 1 985 28 is_stmt 1 discriminator 1 view .LVU4183 - 12948 0b1a 0E2B cmp r3, #14 - 12949 0b1c F1D9 bls .L652 - 12950 .LBE709: - 995:Src/main.c **** UART_transmission_request = NO_MESS; - 12951 .loc 1 995 5 view .LVU4184 - 12952 0b1e 1E20 movs r0, #30 - 12953 0b20 FFF7FEFF bl USART_TX_DMA - 12954 .LVL1169: - 996:Src/main.c **** break; - 12955 .loc 1 996 5 view .LVU4185 - 996:Src/main.c **** break; - 12956 .loc 1 996 31 is_stmt 0 view .LVU4186 - 12957 0b24 304B ldr r3, .L685+92 - 12958 0b26 0022 movs r2, #0 - 12959 0b28 1A70 strb r2, [r3] - 997:Src/main.c **** case MESS_03://Transmith saved packet - 12960 .loc 1 997 4 is_stmt 1 view .LVU4187 - 12961 0b2a FFF7FCBA b .L650 - 12962 .LVL1170: - 12963 .L653: - 12964 .LBB710: -1001:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12965 .loc 1 1001 6 view .LVU4188 -1001:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12966 .loc 1 1001 33 is_stmt 0 view .LVU4189 - 12967 0b2e 284A ldr r2, .L685+68 - 12968 0b30 32F81320 ldrh r2, [r2, r3, lsl #1] -1001:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12969 .loc 1 1001 17 view .LVU4190 - 12970 0b34 5900 lsls r1, r3, #1 -1001:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 12971 .loc 1 1001 21 view .LVU4191 - 12972 0b36 2B48 ldr r0, .L685+88 - 12973 0b38 00F81320 strb r2, [r0, r3, lsl #1] -1002:Src/main.c **** } - 12974 .loc 1 1002 6 is_stmt 1 view .LVU4192 -1002:Src/main.c **** } - 12975 .loc 1 1002 19 is_stmt 0 view .LVU4193 - 12976 0b3c 0131 adds r1, r1, #1 -1002:Src/main.c **** } - 12977 .loc 1 1002 23 view .LVU4194 - 12978 0b3e 120A lsrs r2, r2, #8 - ARM GAS /tmp/ccEQxcUB.s page 649 + 13094 0b14 FFF7FEFF bl Get_ADC + 13095 .LVL1175: + 963:Src/main.c **** + 13096 .loc 1 963 14 discriminator 1 view .LVU4215 + 13097 0b18 2880 strh r0, [r5] @ movhi + 966:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 13098 .loc 1 966 7 is_stmt 1 view .LVU4216 + 966:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 13099 .loc 1 966 16 is_stmt 0 view .LVU4217 + 13100 0b1a 3F4B ldr r3, .L700+72 + 13101 0b1c 1B68 ldr r3, [r3] + 13102 0b1e 3F4A ldr r2, .L700+76 + 13103 0b20 1360 str r3, [r2] + 967:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 13104 .loc 1 967 7 is_stmt 1 view .LVU4218 + 967:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 13105 .loc 1 967 20 is_stmt 0 view .LVU4219 + 13106 0b22 E380 strh r3, [r4, #6] @ movhi + 968:Src/main.c **** + 13107 .loc 1 968 7 is_stmt 1 view .LVU4220 + 968:Src/main.c **** + 13108 .loc 1 968 31 is_stmt 0 view .LVU4221 + 13109 0b24 1B0C lsrs r3, r3, #16 + 968:Src/main.c **** + 13110 .loc 1 968 20 view .LVU4222 + 13111 0b26 2381 strh r3, [r4, #8] @ movhi + 971:Src/main.c **** + 13112 .loc 1 971 7 is_stmt 1 view .LVU4223 + 971:Src/main.c **** + 13113 .loc 1 971 31 is_stmt 0 view .LVU4224 + 13114 0b28 3388 ldrh r3, [r6] + 971:Src/main.c **** + 13115 .loc 1 971 20 view .LVU4225 + 13116 0b2a 6381 strh r3, [r4, #10] @ movhi + 974:Src/main.c **** } + 13117 .loc 1 974 7 is_stmt 1 view .LVU4226 + 974:Src/main.c **** } + 13118 .loc 1 974 31 is_stmt 0 view .LVU4227 + 13119 0b2c 3B88 ldrh r3, [r7] + 974:Src/main.c **** } + 13120 .loc 1 974 20 view .LVU4228 + 13121 0b2e A381 strh r3, [r4, #12] @ movhi + 13122 0b30 C6E5 b .L660 + 13123 .L662: +1002:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 13124 .loc 1 1002 5 is_stmt 1 view .LVU4229 +1002:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 13125 .loc 1 1002 17 is_stmt 0 view .LVU4230 + 13126 0b32 3B4C ldr r4, .L700+80 + 13127 0b34 0D21 movs r1, #13 + 13128 0b36 2046 mov r0, r4 + 13129 0b38 FFF7FEFF bl CalculateChecksum + 13130 .LVL1176: +1002:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 13131 .loc 1 1002 15 discriminator 1 view .LVU4231 + 13132 0b3c 394B ldr r3, .L700+84 + 13133 0b3e 1880 strh r0, [r3] @ movhi + ARM GAS /tmp/ccuHnxNu.s page 653 - 12979 0b40 4254 strb r2, [r0, r1] - 999:Src/main.c **** { - 12980 .loc 1 999 38 is_stmt 1 discriminator 3 view .LVU4195 - 12981 0b42 0133 adds r3, r3, #1 - 12982 .LVL1171: - 999:Src/main.c **** { - 12983 .loc 1 999 38 is_stmt 0 discriminator 3 view .LVU4196 - 12984 0b44 9BB2 uxth r3, r3 - 12985 .LVL1172: - 12986 .L649: - 999:Src/main.c **** { - 12987 .loc 1 999 28 is_stmt 1 discriminator 1 view .LVU4197 - 12988 0b46 0E2B cmp r3, #14 - 12989 0b48 F1D9 bls .L653 - 12990 .LBE710: -1008:Src/main.c **** UART_transmission_request = NO_MESS; - 12991 .loc 1 1008 5 view .LVU4198 - 12992 0b4a 1E20 movs r0, #30 - 12993 0b4c FFF7FEFF bl USART_TX_DMA - 12994 .LVL1173: -1009:Src/main.c **** break; - 12995 .loc 1 1009 5 view .LVU4199 -1009:Src/main.c **** break; - 12996 .loc 1 1009 31 is_stmt 0 view .LVU4200 - 12997 0b50 254B ldr r3, .L685+92 - 12998 0b52 0022 movs r2, #0 - 12999 0b54 1A70 strb r2, [r3] -1010:Src/main.c **** } - 13000 .loc 1 1010 4 is_stmt 1 view .LVU4201 - 13001 0b56 FFF7E6BA b .L650 - 13002 .LVL1174: - 13003 .L664: - 970:Src/main.c **** { - 13004 .loc 1 970 3 is_stmt 0 view .LVU4202 - 13005 0b5a 0023 movs r3, #0 - 13006 0b5c F3E7 b .L649 - 13007 .L667: -1012:Src/main.c **** { - 13008 .loc 1 1012 28 discriminator 1 view .LVU4203 - 13009 0b5e 1D4B ldr r3, .L685+72 - 13010 0b60 1B68 ldr r3, [r3] - 13011 0b62 224A ldr r2, .L685+96 - 13012 0b64 1268 ldr r2, [r2] - 13013 0b66 9B1A subs r3, r3, r2 -1012:Src/main.c **** { - 13014 .loc 1 1012 21 discriminator 1 view .LVU4204 - 13015 0b68 642B cmp r3, #100 - 13016 0b6a 7FF6E1AA bls .L586 -1014:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 13017 .loc 1 1014 4 is_stmt 1 view .LVU4205 -1014:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 13018 .loc 1 1014 18 is_stmt 0 view .LVU4206 - 13019 0b6e 0022 movs r2, #0 - 13020 0b70 1F4B ldr r3, .L685+100 - 13021 0b72 1A80 strh r2, [r3] @ movhi -1015:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 13022 .loc 1 1015 4 is_stmt 1 view .LVU4207 - ARM GAS /tmp/ccEQxcUB.s page 650 +1003:Src/main.c **** + 13134 .loc 1 1003 5 is_stmt 1 view .LVU4232 +1003:Src/main.c **** + 13135 .loc 1 1003 24 is_stmt 0 view .LVU4233 + 13136 0b40 6083 strh r0, [r4, #26] @ movhi +1005:Src/main.c **** { + 13137 .loc 1 1005 5 is_stmt 1 view .LVU4234 + 13138 .LBB713: +1005:Src/main.c **** { + 13139 .loc 1 1005 10 view .LVU4235 + 13140 .LVL1177: +1005:Src/main.c **** { + 13141 .loc 1 1005 19 is_stmt 0 view .LVU4236 + 13142 0b42 0023 movs r3, #0 +1005:Src/main.c **** { + 13143 .loc 1 1005 5 view .LVU4237 + 13144 0b44 0BE0 b .L665 + 13145 .LVL1178: + 13146 .L666: +1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13147 .loc 1 1007 6 is_stmt 1 view .LVU4238 +1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13148 .loc 1 1007 33 is_stmt 0 view .LVU4239 + 13149 0b46 334A ldr r2, .L700+68 + 13150 0b48 32F81320 ldrh r2, [r2, r3, lsl #1] +1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13151 .loc 1 1007 17 view .LVU4240 + 13152 0b4c 5900 lsls r1, r3, #1 +1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13153 .loc 1 1007 21 view .LVU4241 + 13154 0b4e 3648 ldr r0, .L700+88 + 13155 0b50 00F81320 strb r2, [r0, r3, lsl #1] +1008:Src/main.c **** } + 13156 .loc 1 1008 6 is_stmt 1 view .LVU4242 +1008:Src/main.c **** } + 13157 .loc 1 1008 19 is_stmt 0 view .LVU4243 + 13158 0b54 0131 adds r1, r1, #1 +1008:Src/main.c **** } + 13159 .loc 1 1008 23 view .LVU4244 + 13160 0b56 120A lsrs r2, r2, #8 + 13161 0b58 4254 strb r2, [r0, r1] +1005:Src/main.c **** { + 13162 .loc 1 1005 38 is_stmt 1 discriminator 3 view .LVU4245 + 13163 0b5a 0133 adds r3, r3, #1 + 13164 .LVL1179: +1005:Src/main.c **** { + 13165 .loc 1 1005 38 is_stmt 0 discriminator 3 view .LVU4246 + 13166 0b5c 9BB2 uxth r3, r3 + 13167 .LVL1180: + 13168 .L665: +1005:Src/main.c **** { + 13169 .loc 1 1005 28 is_stmt 1 discriminator 1 view .LVU4247 + 13170 0b5e 0E2B cmp r3, #14 + 13171 0b60 F1D9 bls .L666 + 13172 .LBE713: +1015:Src/main.c **** UART_transmission_request = NO_MESS; + 13173 .loc 1 1015 5 view .LVU4248 + ARM GAS /tmp/ccuHnxNu.s page 654 -1015:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 13023 .loc 1 1015 14 is_stmt 0 view .LVU4208 - 13024 0b74 1F49 ldr r1, .L685+104 - 13025 0b76 0B78 ldrb r3, [r1] @ zero_extendqisi2 -1015:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 13026 .loc 1 1015 18 view .LVU4209 - 13027 0b78 43F00203 orr r3, r3, #2 - 13028 0b7c 0B70 strb r3, [r1] -1016:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 13029 .loc 1 1016 4 is_stmt 1 view .LVU4210 -1016:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 13030 .loc 1 1016 30 is_stmt 0 view .LVU4211 - 13031 0b7e 1A4B ldr r3, .L685+92 - 13032 0b80 0121 movs r1, #1 - 13033 0b82 1970 strb r1, [r3] -1017:Src/main.c **** } - 13034 .loc 1 1017 4 is_stmt 1 view .LVU4212 -1017:Src/main.c **** } - 13035 .loc 1 1017 12 is_stmt 0 view .LVU4213 - 13036 0b84 1C4B ldr r3, .L685+108 - 13037 0b86 1A70 strb r2, [r3] - 13038 0b88 FFF7D2BA b .L586 - 13039 .L686: - 13040 .align 2 - 13041 .L685: - 13042 0b8c 00000000 .word task - 13043 0b90 00000000 .word LD1_param - 13044 0b94 00000000 .word LD2_param - 13045 0b98 00000000 .word LD1_curr_setup - 13046 0b9c 00000000 .word temp16 - 13047 0ba0 00000000 .word LD2_curr_setup - 13048 0ba4 00000000 .word LD_blinker - 13049 0ba8 00040240 .word 1073873920 - 13050 0bac 00040140 .word 1073808384 - 13051 0bb0 00000000 .word htim8 - 13052 0bb4 000C0240 .word 1073875968 - 13053 0bb8 00000000 .word htim10 - 13054 0bbc 00000000 .word TIM10_coflag - 13055 0bc0 00000000 .word TO10 - 13056 0bc4 00000000 .word TIM10_period - 13057 0bc8 00000000 .word TO10_counter - 13058 0bcc 00000000 .word TO7_before - 13059 0bd0 00000000 .word Long_Data - 13060 0bd4 00000000 .word TO6 - 13061 0bd8 00000000 .word TO6_stop - 13062 0bdc 02000000 .word Long_Data+2 - 13063 0be0 00000000 .word CS_result - 13064 0be4 00000000 .word UART_DATA - 13065 0be8 00000000 .word UART_transmission_request - 13066 0bec 00000000 .word TO6_uart - 13067 0bf0 00000000 .word UART_rec_incr - 13068 0bf4 00000000 .word State_Data - 13069 0bf8 00000000 .word flg_tmt - 13070 .cfi_endproc - 13071 .LFE1186: - 13073 .section .rodata.ad9102_example2_regval,"a" - 13074 .align 2 - ARM GAS /tmp/ccEQxcUB.s page 651 + 13174 0b62 1E20 movs r0, #30 + 13175 0b64 FFF7FEFF bl USART_TX_DMA + 13176 .LVL1181: +1016:Src/main.c **** break; + 13177 .loc 1 1016 5 view .LVU4249 +1016:Src/main.c **** break; + 13178 .loc 1 1016 31 is_stmt 0 view .LVU4250 + 13179 0b68 304B ldr r3, .L700+92 + 13180 0b6a 0022 movs r2, #0 + 13181 0b6c 1A70 strb r2, [r3] +1017:Src/main.c **** case MESS_03://Transmith saved packet + 13182 .loc 1 1017 4 is_stmt 1 view .LVU4251 + 13183 0b6e FFF7DCBA b .L664 + 13184 .LVL1182: + 13185 .L667: + 13186 .LBB714: +1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13187 .loc 1 1021 6 view .LVU4252 +1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13188 .loc 1 1021 33 is_stmt 0 view .LVU4253 + 13189 0b72 284A ldr r2, .L700+68 + 13190 0b74 32F81320 ldrh r2, [r2, r3, lsl #1] +1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13191 .loc 1 1021 17 view .LVU4254 + 13192 0b78 5900 lsls r1, r3, #1 +1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13193 .loc 1 1021 21 view .LVU4255 + 13194 0b7a 2B48 ldr r0, .L700+88 + 13195 0b7c 00F81320 strb r2, [r0, r3, lsl #1] +1022:Src/main.c **** } + 13196 .loc 1 1022 6 is_stmt 1 view .LVU4256 +1022:Src/main.c **** } + 13197 .loc 1 1022 19 is_stmt 0 view .LVU4257 + 13198 0b80 0131 adds r1, r1, #1 +1022:Src/main.c **** } + 13199 .loc 1 1022 23 view .LVU4258 + 13200 0b82 120A lsrs r2, r2, #8 + 13201 0b84 4254 strb r2, [r0, r1] +1019:Src/main.c **** { + 13202 .loc 1 1019 38 is_stmt 1 discriminator 3 view .LVU4259 + 13203 0b86 0133 adds r3, r3, #1 + 13204 .LVL1183: +1019:Src/main.c **** { + 13205 .loc 1 1019 38 is_stmt 0 discriminator 3 view .LVU4260 + 13206 0b88 9BB2 uxth r3, r3 + 13207 .LVL1184: + 13208 .L663: +1019:Src/main.c **** { + 13209 .loc 1 1019 28 is_stmt 1 discriminator 1 view .LVU4261 + 13210 0b8a 0E2B cmp r3, #14 + 13211 0b8c F1D9 bls .L667 + 13212 .LBE714: +1028:Src/main.c **** UART_transmission_request = NO_MESS; + 13213 .loc 1 1028 5 view .LVU4262 + 13214 0b8e 1E20 movs r0, #30 + 13215 0b90 FFF7FEFF bl USART_TX_DMA + 13216 .LVL1185: + ARM GAS /tmp/ccuHnxNu.s page 655 - 13077 ad9102_example2_regval: - 13078 0000 0000 .short 0 - 13079 0002 000E .short 3584 - 13080 0004 0000 .short 0 - 13081 0006 0000 .short 0 - 13082 0008 0000 .short 0 - 13083 000a 0000 .short 0 - 13084 000c 0000 .short 0 - 13085 000e 0040 .short 16384 - 13086 0010 0000 .short 0 - 13087 0012 0000 .short 0 - 13088 0014 0000 .short 0 - 13089 0016 0000 .short 0 - 13090 0018 001F .short 7936 - 13091 001a 0000 .short 0 - 13092 001c 0000 .short 0 - 13093 001e 0000 .short 0 - 13094 0020 0E00 .short 14 - 13095 0022 0000 .short 0 - 13096 0024 0000 .short 0 - 13097 0026 0000 .short 0 - 13098 0028 0000 .short 0 - 13099 002a 0000 .short 0 - 13100 002c 3030 .short 12336 - 13101 002e 1101 .short 273 - 13102 0030 FFFF .short -1 - 13103 0032 0000 .short 0 - 13104 0034 0101 .short 257 - 13105 0036 0300 .short 3 - 13106 0038 0000 .short 0 - 13107 003a 0000 .short 0 - 13108 003c 0000 .short 0 - 13109 003e 0000 .short 0 - 13110 0040 0000 .short 0 - 13111 0042 0000 .short 0 - 13112 0044 0000 .short 0 - 13113 0046 0000 .short 0 - 13114 0048 0040 .short 16384 - 13115 004a 0000 .short 0 - 13116 004c 0002 .short 512 - 13117 004e 0000 .short 0 - 13118 0050 0000 .short 0 - 13119 0052 0000 .short 0 - 13120 0054 0000 .short 0 - 13121 0056 0000 .short 0 - 13122 0058 0000 .short 0 - 13123 005a 0000 .short 0 - 13124 005c 0000 .short 0 - 13125 005e 0000 .short 0 - 13126 0060 0000 .short 0 - 13127 0062 0000 .short 0 - 13128 0064 0000 .short 0 - 13129 0066 0000 .short 0 - 13130 0068 0000 .short 0 - 13131 006a 0000 .short 0 - 13132 006c 0000 .short 0 - 13133 006e 0000 .short 0 - ARM GAS /tmp/ccEQxcUB.s page 652 +1029:Src/main.c **** break; + 13217 .loc 1 1029 5 view .LVU4263 +1029:Src/main.c **** break; + 13218 .loc 1 1029 31 is_stmt 0 view .LVU4264 + 13219 0b94 254B ldr r3, .L700+92 + 13220 0b96 0022 movs r2, #0 + 13221 0b98 1A70 strb r2, [r3] +1030:Src/main.c **** } + 13222 .loc 1 1030 4 is_stmt 1 view .LVU4265 + 13223 0b9a FFF7C6BA b .L664 + 13224 .LVL1186: + 13225 .L678: + 990:Src/main.c **** { + 13226 .loc 1 990 3 is_stmt 0 view .LVU4266 + 13227 0b9e 0023 movs r3, #0 + 13228 0ba0 F3E7 b .L663 + 13229 .L681: +1032:Src/main.c **** { + 13230 .loc 1 1032 28 discriminator 1 view .LVU4267 + 13231 0ba2 1D4B ldr r3, .L700+72 + 13232 0ba4 1B68 ldr r3, [r3] + 13233 0ba6 224A ldr r2, .L700+96 + 13234 0ba8 1268 ldr r2, [r2] + 13235 0baa 9B1A subs r3, r3, r2 +1032:Src/main.c **** { + 13236 .loc 1 1032 21 discriminator 1 view .LVU4268 + 13237 0bac 642B cmp r3, #100 + 13238 0bae 7FF6C1AA bls .L597 +1034:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 13239 .loc 1 1034 4 is_stmt 1 view .LVU4269 +1034:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 13240 .loc 1 1034 18 is_stmt 0 view .LVU4270 + 13241 0bb2 0022 movs r2, #0 + 13242 0bb4 1F4B ldr r3, .L700+100 + 13243 0bb6 1A80 strh r2, [r3] @ movhi +1035:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 13244 .loc 1 1035 4 is_stmt 1 view .LVU4271 +1035:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 13245 .loc 1 1035 14 is_stmt 0 view .LVU4272 + 13246 0bb8 1F49 ldr r1, .L700+104 + 13247 0bba 0B78 ldrb r3, [r1] @ zero_extendqisi2 +1035:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 13248 .loc 1 1035 18 view .LVU4273 + 13249 0bbc 43F00203 orr r3, r3, #2 + 13250 0bc0 0B70 strb r3, [r1] +1036:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 13251 .loc 1 1036 4 is_stmt 1 view .LVU4274 +1036:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 13252 .loc 1 1036 30 is_stmt 0 view .LVU4275 + 13253 0bc2 1A4B ldr r3, .L700+92 + 13254 0bc4 0121 movs r1, #1 + 13255 0bc6 1970 strb r1, [r3] +1037:Src/main.c **** } + 13256 .loc 1 1037 4 is_stmt 1 view .LVU4276 +1037:Src/main.c **** } + 13257 .loc 1 1037 12 is_stmt 0 view .LVU4277 + 13258 0bc8 1C4B ldr r3, .L700+108 + ARM GAS /tmp/ccuHnxNu.s page 656 - 13134 0070 0000 .short 0 - 13135 0072 0000 .short 0 - 13136 0074 0000 .short 0 - 13137 0076 0000 .short 0 - 13138 0078 A00F .short 4000 - 13139 007a 0000 .short 0 - 13140 007c F03F .short 16368 - 13141 007e 0001 .short 256 - 13142 0080 0100 .short 1 - 13143 0082 0100 .short 1 - 13144 .section .rodata.ad9102_example4_regval,"a" - 13145 .align 2 - 13148 ad9102_example4_regval: - 13149 0000 0000 .short 0 - 13150 0002 0000 .short 0 - 13151 0004 0000 .short 0 - 13152 0006 0000 .short 0 - 13153 0008 0000 .short 0 - 13154 000a 0000 .short 0 - 13155 000c 0000 .short 0 - 13156 000e 0040 .short 16384 - 13157 0010 0000 .short 0 - 13158 0012 0000 .short 0 - 13159 0014 0000 .short 0 - 13160 0016 0000 .short 0 - 13161 0018 001F .short 7936 - 13162 001a 0000 .short 0 - 13163 001c 0000 .short 0 - 13164 001e 0000 .short 0 - 13165 0020 0E00 .short 14 - 13166 0022 0000 .short 0 - 13167 0024 0000 .short 0 - 13168 0026 0000 .short 0 - 13169 0028 0000 .short 0 - 13170 002a 0000 .short 0 - 13171 002c 1232 .short 12818 - 13172 002e 2101 .short 289 - 13173 0030 FFFF .short -1 - 13174 0032 0000 .short 0 - 13175 0034 0101 .short 257 - 13176 0036 0300 .short 3 - 13177 0038 0000 .short 0 - 13178 003a 0000 .short 0 - 13179 003c 0000 .short 0 - 13180 003e 0000 .short 0 - 13181 0040 0000 .short 0 - 13182 0042 0000 .short 0 - 13183 0044 0000 .short 0 - 13184 0046 0000 .short 0 - 13185 0048 0040 .short 16384 - 13186 004a 0000 .short 0 - 13187 004c 0606 .short 1542 - 13188 004e 9919 .short 6553 - 13189 0050 009A .short -26112 - 13190 0052 0000 .short 0 - 13191 0054 0000 .short 0 - 13192 0056 0000 .short 0 - ARM GAS /tmp/ccEQxcUB.s page 653 + 13259 0bca 1A70 strb r2, [r3] + 13260 0bcc FFF7B2BA b .L597 + 13261 .L701: + 13262 .align 2 + 13263 .L700: + 13264 0bd0 00000000 .word task + 13265 0bd4 00000000 .word LD1_param + 13266 0bd8 00000000 .word LD2_param + 13267 0bdc 00000000 .word LD1_curr_setup + 13268 0be0 00000000 .word temp16 + 13269 0be4 00000000 .word LD2_curr_setup + 13270 0be8 00000000 .word LD_blinker + 13271 0bec 00040240 .word 1073873920 + 13272 0bf0 00040140 .word 1073808384 + 13273 0bf4 00000000 .word htim8 + 13274 0bf8 000C0240 .word 1073875968 + 13275 0bfc 00000000 .word htim10 + 13276 0c00 00000000 .word TIM10_coflag + 13277 0c04 00000000 .word TO10 + 13278 0c08 00000000 .word TIM10_period + 13279 0c0c 00000000 .word TO10_counter + 13280 0c10 00000000 .word TO7_before + 13281 0c14 00000000 .word Long_Data + 13282 0c18 00000000 .word TO6 + 13283 0c1c 00000000 .word TO6_stop + 13284 0c20 02000000 .word Long_Data+2 + 13285 0c24 00000000 .word CS_result + 13286 0c28 00000000 .word UART_DATA + 13287 0c2c 00000000 .word UART_transmission_request + 13288 0c30 00000000 .word TO6_uart + 13289 0c34 00000000 .word UART_rec_incr + 13290 0c38 00000000 .word State_Data + 13291 0c3c 00000000 .word flg_tmt + 13292 .cfi_endproc + 13293 .LFE1186: + 13295 .section .rodata.ad9102_example2_regval,"a" + 13296 .align 2 + 13299 ad9102_example2_regval: + 13300 0000 0000 .short 0 + 13301 0002 000E .short 3584 + 13302 0004 0000 .short 0 + 13303 0006 0000 .short 0 + 13304 0008 0000 .short 0 + 13305 000a 0000 .short 0 + 13306 000c 0000 .short 0 + 13307 000e 0040 .short 16384 + 13308 0010 0000 .short 0 + 13309 0012 0000 .short 0 + 13310 0014 0000 .short 0 + 13311 0016 0000 .short 0 + 13312 0018 001F .short 7936 + 13313 001a 0000 .short 0 + 13314 001c 0000 .short 0 + 13315 001e 0000 .short 0 + 13316 0020 0E00 .short 14 + 13317 0022 0000 .short 0 + 13318 0024 0000 .short 0 + ARM GAS /tmp/ccuHnxNu.s page 657 - 13193 0058 0000 .short 0 - 13194 005a 0000 .short 0 - 13195 005c 0000 .short 0 - 13196 005e 0000 .short 0 - 13197 0060 A00F .short 4000 - 13198 0062 0000 .short 0 - 13199 0064 0000 .short 0 - 13200 0066 0000 .short 0 - 13201 0068 0000 .short 0 - 13202 006a 0000 .short 0 - 13203 006c 0000 .short 0 - 13204 006e 0000 .short 0 - 13205 0070 0000 .short 0 - 13206 0072 0000 .short 0 - 13207 0074 0000 .short 0 - 13208 0076 0000 .short 0 - 13209 0078 0000 .short 0 - 13210 007a 0000 .short 0 - 13211 007c 0000 .short 0 - 13212 007e FF16 .short 5887 - 13213 0080 0100 .short 1 - 13214 0082 0100 .short 1 - 13215 .section .rodata.ad9102_reg_addr,"a" - 13216 .align 2 - 13219 ad9102_reg_addr: - 13220 0000 0000 .short 0 - 13221 0002 0100 .short 1 - 13222 0004 0200 .short 2 - 13223 0006 0300 .short 3 - 13224 0008 0400 .short 4 - 13225 000a 0500 .short 5 - 13226 000c 0600 .short 6 - 13227 000e 0700 .short 7 - 13228 0010 0800 .short 8 - 13229 0012 0900 .short 9 - 13230 0014 0A00 .short 10 - 13231 0016 0B00 .short 11 - 13232 0018 0C00 .short 12 - 13233 001a 0D00 .short 13 - 13234 001c 0E00 .short 14 - 13235 001e 1F00 .short 31 - 13236 0020 2000 .short 32 - 13237 0022 2200 .short 34 - 13238 0024 2300 .short 35 - 13239 0026 2400 .short 36 - 13240 0028 2500 .short 37 - 13241 002a 2600 .short 38 - 13242 002c 2700 .short 39 - 13243 002e 2800 .short 40 - 13244 0030 2900 .short 41 - 13245 0032 2A00 .short 42 - 13246 0034 2B00 .short 43 - 13247 0036 2C00 .short 44 - 13248 0038 2D00 .short 45 - 13249 003a 2E00 .short 46 - 13250 003c 2F00 .short 47 - 13251 003e 3000 .short 48 - ARM GAS /tmp/ccEQxcUB.s page 654 + 13319 0026 0000 .short 0 + 13320 0028 0000 .short 0 + 13321 002a 0000 .short 0 + 13322 002c 3030 .short 12336 + 13323 002e 1101 .short 273 + 13324 0030 FFFF .short -1 + 13325 0032 0000 .short 0 + 13326 0034 0101 .short 257 + 13327 0036 0300 .short 3 + 13328 0038 0000 .short 0 + 13329 003a 0000 .short 0 + 13330 003c 0000 .short 0 + 13331 003e 0000 .short 0 + 13332 0040 0000 .short 0 + 13333 0042 0000 .short 0 + 13334 0044 0000 .short 0 + 13335 0046 0000 .short 0 + 13336 0048 0040 .short 16384 + 13337 004a 0000 .short 0 + 13338 004c 0002 .short 512 + 13339 004e 0000 .short 0 + 13340 0050 0000 .short 0 + 13341 0052 0000 .short 0 + 13342 0054 0000 .short 0 + 13343 0056 0000 .short 0 + 13344 0058 0000 .short 0 + 13345 005a 0000 .short 0 + 13346 005c 0000 .short 0 + 13347 005e 0000 .short 0 + 13348 0060 0000 .short 0 + 13349 0062 0000 .short 0 + 13350 0064 0000 .short 0 + 13351 0066 0000 .short 0 + 13352 0068 0000 .short 0 + 13353 006a 0000 .short 0 + 13354 006c 0000 .short 0 + 13355 006e 0000 .short 0 + 13356 0070 0000 .short 0 + 13357 0072 0000 .short 0 + 13358 0074 0000 .short 0 + 13359 0076 0000 .short 0 + 13360 0078 A00F .short 4000 + 13361 007a 0000 .short 0 + 13362 007c F03F .short 16368 + 13363 007e 0001 .short 256 + 13364 0080 0100 .short 1 + 13365 0082 0100 .short 1 + 13366 .section .rodata.ad9102_example4_regval,"a" + 13367 .align 2 + 13370 ad9102_example4_regval: + 13371 0000 0000 .short 0 + 13372 0002 0000 .short 0 + 13373 0004 0000 .short 0 + 13374 0006 0000 .short 0 + 13375 0008 0000 .short 0 + 13376 000a 0000 .short 0 + 13377 000c 0000 .short 0 + ARM GAS /tmp/ccuHnxNu.s page 658 - 13252 0040 3100 .short 49 - 13253 0042 3200 .short 50 - 13254 0044 3300 .short 51 - 13255 0046 3400 .short 52 - 13256 0048 3500 .short 53 - 13257 004a 3600 .short 54 - 13258 004c 3700 .short 55 - 13259 004e 3E00 .short 62 - 13260 0050 3F00 .short 63 - 13261 0052 4000 .short 64 - 13262 0054 4100 .short 65 - 13263 0056 4200 .short 66 - 13264 0058 4300 .short 67 - 13265 005a 4400 .short 68 - 13266 005c 4500 .short 69 - 13267 005e 4700 .short 71 - 13268 0060 5000 .short 80 - 13269 0062 5100 .short 81 - 13270 0064 5200 .short 82 - 13271 0066 5300 .short 83 - 13272 0068 5400 .short 84 - 13273 006a 5500 .short 85 - 13274 006c 5600 .short 86 - 13275 006e 5700 .short 87 - 13276 0070 5800 .short 88 - 13277 0072 5900 .short 89 - 13278 0074 5A00 .short 90 - 13279 0076 5B00 .short 91 - 13280 0078 5C00 .short 92 - 13281 007a 5D00 .short 93 - 13282 007c 5E00 .short 94 - 13283 007e 5F00 .short 95 - 13284 0080 1E00 .short 30 - 13285 0082 1D00 .short 29 - 13286 .global task - 13287 .section .bss.task,"aw",%nobits - 13288 .align 2 - 13291 task: - 13292 0000 00000000 .space 52 - 13292 00000000 - 13292 00000000 - 13292 00000000 - 13292 00000000 - 13293 .global LD_blinker - 13294 .section .bss.LD_blinker,"aw",%nobits - 13295 .align 2 - 13298 LD_blinker: - 13299 0000 00000000 .space 12 - 13299 00000000 - 13299 00000000 - 13300 .global LD2_param - 13301 .section .bss.LD2_param,"aw",%nobits - 13302 .align 2 - 13305 LD2_param: - 13306 0000 00000000 .space 12 - 13306 00000000 - 13306 00000000 - ARM GAS /tmp/ccEQxcUB.s page 655 + 13378 000e 0040 .short 16384 + 13379 0010 0000 .short 0 + 13380 0012 0000 .short 0 + 13381 0014 0000 .short 0 + 13382 0016 0000 .short 0 + 13383 0018 001F .short 7936 + 13384 001a 0000 .short 0 + 13385 001c 0000 .short 0 + 13386 001e 0000 .short 0 + 13387 0020 0E00 .short 14 + 13388 0022 0000 .short 0 + 13389 0024 0000 .short 0 + 13390 0026 0000 .short 0 + 13391 0028 0000 .short 0 + 13392 002a 0000 .short 0 + 13393 002c 1232 .short 12818 + 13394 002e 2101 .short 289 + 13395 0030 FFFF .short -1 + 13396 0032 0000 .short 0 + 13397 0034 0101 .short 257 + 13398 0036 0300 .short 3 + 13399 0038 0000 .short 0 + 13400 003a 0000 .short 0 + 13401 003c 0000 .short 0 + 13402 003e 0000 .short 0 + 13403 0040 0000 .short 0 + 13404 0042 0000 .short 0 + 13405 0044 0000 .short 0 + 13406 0046 0000 .short 0 + 13407 0048 0040 .short 16384 + 13408 004a 0000 .short 0 + 13409 004c 0606 .short 1542 + 13410 004e 9919 .short 6553 + 13411 0050 009A .short -26112 + 13412 0052 0000 .short 0 + 13413 0054 0000 .short 0 + 13414 0056 0000 .short 0 + 13415 0058 0000 .short 0 + 13416 005a 0000 .short 0 + 13417 005c 0000 .short 0 + 13418 005e 0000 .short 0 + 13419 0060 A00F .short 4000 + 13420 0062 0000 .short 0 + 13421 0064 0000 .short 0 + 13422 0066 0000 .short 0 + 13423 0068 0000 .short 0 + 13424 006a 0000 .short 0 + 13425 006c 0000 .short 0 + 13426 006e 0000 .short 0 + 13427 0070 0000 .short 0 + 13428 0072 0000 .short 0 + 13429 0074 0000 .short 0 + 13430 0076 0000 .short 0 + 13431 0078 0000 .short 0 + 13432 007a 0000 .short 0 + 13433 007c 0000 .short 0 + 13434 007e FF16 .short 5887 + ARM GAS /tmp/ccuHnxNu.s page 659 - 13307 .global LD1_param - 13308 .section .bss.LD1_param,"aw",%nobits - 13309 .align 2 - 13312 LD1_param: - 13313 0000 00000000 .space 12 - 13313 00000000 - 13313 00000000 - 13314 .global Def_setup - 13315 .section .bss.Def_setup,"aw",%nobits - 13316 .align 2 - 13319 Def_setup: - 13320 0000 00000000 .space 18 - 13320 00000000 - 13320 00000000 - 13320 00000000 - 13320 0000 - 13321 .global Curr_setup - 13322 .section .bss.Curr_setup,"aw",%nobits - 13323 .align 2 - 13326 Curr_setup: - 13327 0000 00000000 .space 18 - 13327 00000000 - 13327 00000000 - 13327 00000000 - 13327 0000 - 13328 .global LD2_def_setup - 13329 .section .bss.LD2_def_setup,"aw",%nobits - 13330 .align 2 - 13333 LD2_def_setup: - 13334 0000 00000000 .space 16 - 13334 00000000 - 13334 00000000 - 13334 00000000 - 13335 .global LD1_def_setup - 13336 .section .bss.LD1_def_setup,"aw",%nobits - 13337 .align 2 - 13340 LD1_def_setup: - 13341 0000 00000000 .space 16 - 13341 00000000 - 13341 00000000 - 13341 00000000 - 13342 .global LD2_curr_setup - 13343 .section .bss.LD2_curr_setup,"aw",%nobits - 13344 .align 2 - 13347 LD2_curr_setup: - 13348 0000 00000000 .space 16 - 13348 00000000 - 13348 00000000 - 13348 00000000 - 13349 .global LD1_curr_setup - 13350 .section .bss.LD1_curr_setup,"aw",%nobits - 13351 .align 2 - 13354 LD1_curr_setup: - 13355 0000 00000000 .space 16 - 13355 00000000 - 13355 00000000 - 13355 00000000 - ARM GAS /tmp/ccEQxcUB.s page 656 + 13435 0080 0100 .short 1 + 13436 0082 0100 .short 1 + 13437 .section .rodata.ad9102_reg_addr,"a" + 13438 .align 2 + 13441 ad9102_reg_addr: + 13442 0000 0000 .short 0 + 13443 0002 0100 .short 1 + 13444 0004 0200 .short 2 + 13445 0006 0300 .short 3 + 13446 0008 0400 .short 4 + 13447 000a 0500 .short 5 + 13448 000c 0600 .short 6 + 13449 000e 0700 .short 7 + 13450 0010 0800 .short 8 + 13451 0012 0900 .short 9 + 13452 0014 0A00 .short 10 + 13453 0016 0B00 .short 11 + 13454 0018 0C00 .short 12 + 13455 001a 0D00 .short 13 + 13456 001c 0E00 .short 14 + 13457 001e 1F00 .short 31 + 13458 0020 2000 .short 32 + 13459 0022 2200 .short 34 + 13460 0024 2300 .short 35 + 13461 0026 2400 .short 36 + 13462 0028 2500 .short 37 + 13463 002a 2600 .short 38 + 13464 002c 2700 .short 39 + 13465 002e 2800 .short 40 + 13466 0030 2900 .short 41 + 13467 0032 2A00 .short 42 + 13468 0034 2B00 .short 43 + 13469 0036 2C00 .short 44 + 13470 0038 2D00 .short 45 + 13471 003a 2E00 .short 46 + 13472 003c 2F00 .short 47 + 13473 003e 3000 .short 48 + 13474 0040 3100 .short 49 + 13475 0042 3200 .short 50 + 13476 0044 3300 .short 51 + 13477 0046 3400 .short 52 + 13478 0048 3500 .short 53 + 13479 004a 3600 .short 54 + 13480 004c 3700 .short 55 + 13481 004e 3E00 .short 62 + 13482 0050 3F00 .short 63 + 13483 0052 4000 .short 64 + 13484 0054 4100 .short 65 + 13485 0056 4200 .short 66 + 13486 0058 4300 .short 67 + 13487 005a 4400 .short 68 + 13488 005c 4500 .short 69 + 13489 005e 4700 .short 71 + 13490 0060 5000 .short 80 + 13491 0062 5100 .short 81 + 13492 0064 5200 .short 82 + 13493 0066 5300 .short 83 + ARM GAS /tmp/ccuHnxNu.s page 660 - 13356 .global sizeoffile - 13357 .section .bss.sizeoffile,"aw",%nobits - 13358 .align 2 - 13361 sizeoffile: - 13362 0000 00000000 .space 4 - 13363 .global fgoto - 13364 .section .bss.fgoto,"aw",%nobits - 13365 .align 2 - 13368 fgoto: - 13369 0000 00000000 .space 4 - 13370 .global test - 13371 .section .bss.test,"aw",%nobits - 13372 .align 2 - 13375 test: - 13376 0000 00000000 .space 4 - 13377 .global fresult - 13378 .section .bss.fresult,"aw",%nobits - 13381 fresult: - 13382 0000 00 .space 1 - 13383 .global COMMAND - 13384 .section .bss.COMMAND,"aw",%nobits - 13385 .align 2 - 13388 COMMAND: - 13389 0000 00000000 .space 30 - 13389 00000000 - 13389 00000000 - 13389 00000000 - 13389 00000000 - 13390 .global Long_Data - 13391 .section .bss.Long_Data,"aw",%nobits - 13392 .align 2 - 13395 Long_Data: - 13396 0000 00000000 .space 30 - 13396 00000000 - 13396 00000000 - 13396 00000000 - 13396 00000000 - 13397 .global temp16 - 13398 .section .bss.temp16,"aw",%nobits - 13399 .align 1 - 13402 temp16: - 13403 0000 0000 .space 2 - 13404 .global CS_result - 13405 .section .bss.CS_result,"aw",%nobits - 13406 .align 1 - 13409 CS_result: - 13410 0000 0000 .space 2 - 13411 .global UART_header - 13412 .section .bss.UART_header,"aw",%nobits - 13413 .align 1 - 13416 UART_header: - 13417 0000 0000 .space 2 - 13418 .global UART_rec_incr - 13419 .section .bss.UART_rec_incr,"aw",%nobits - 13420 .align 1 - 13423 UART_rec_incr: - 13424 0000 0000 .space 2 - ARM GAS /tmp/ccEQxcUB.s page 657 - - - 13425 .global TIM10_coflag - 13426 .section .bss.TIM10_coflag,"aw",%nobits - 13429 TIM10_coflag: - 13430 0000 00 .space 1 - 13431 .global u_rx_flg - 13432 .section .bss.u_rx_flg,"aw",%nobits - 13435 u_rx_flg: - 13436 0000 00 .space 1 - 13437 .global u_tx_flg - 13438 .section .bss.u_tx_flg,"aw",%nobits - 13441 u_tx_flg: - 13442 0000 00 .space 1 - 13443 .global flg_tmt - 13444 .section .bss.flg_tmt,"aw",%nobits - 13447 flg_tmt: - 13448 0000 00 .space 1 - 13449 .global UART_DATA - 13450 .section .bss.UART_DATA,"aw",%nobits - 13451 .align 2 - 13454 UART_DATA: - 13455 0000 00000000 .space 30 - 13455 00000000 - 13455 00000000 - 13455 00000000 - 13455 00000000 - 13456 .global State_Data - 13457 .section .bss.State_Data,"aw",%nobits - 13458 .align 2 - 13461 State_Data: - 13462 0000 0000 .space 2 - 13463 .global UART_transmission_request - 13464 .section .bss.UART_transmission_request,"aw",%nobits - 13467 UART_transmission_request: - 13468 0000 00 .space 1 - 13469 .global CPU_state_old - 13470 .section .bss.CPU_state_old,"aw",%nobits - 13473 CPU_state_old: - 13474 0000 00 .space 1 - 13475 .global CPU_state - 13476 .section .bss.CPU_state,"aw",%nobits - 13479 CPU_state: - 13480 0000 00 .space 1 - 13481 .global uart_buf - 13482 .section .bss.uart_buf,"aw",%nobits - 13485 uart_buf: - 13486 0000 00 .space 1 - 13487 .global TIM10_period - 13488 .section .bss.TIM10_period,"aw",%nobits - 13489 .align 2 - 13492 TIM10_period: - 13493 0000 00000000 .space 4 - 13494 .global TO10_counter - 13495 .section .bss.TO10_counter,"aw",%nobits - 13496 .align 2 - 13499 TO10_counter: - 13500 0000 00000000 .space 4 - 13501 .global TO10 - ARM GAS /tmp/ccEQxcUB.s page 658 - - - 13502 .section .bss.TO10,"aw",%nobits - 13503 .align 2 - 13506 TO10: - 13507 0000 00000000 .space 4 - 13508 .global TO7_PID - 13509 .section .bss.TO7_PID,"aw",%nobits + 13494 0068 5400 .short 84 + 13495 006a 5500 .short 85 + 13496 006c 5600 .short 86 + 13497 006e 5700 .short 87 + 13498 0070 5800 .short 88 + 13499 0072 5900 .short 89 + 13500 0074 5A00 .short 90 + 13501 0076 5B00 .short 91 + 13502 0078 5C00 .short 92 + 13503 007a 5D00 .short 93 + 13504 007c 5E00 .short 94 + 13505 007e 5F00 .short 95 + 13506 0080 1E00 .short 30 + 13507 0082 1D00 .short 29 + 13508 .global task + 13509 .section .bss.task,"aw",%nobits 13510 .align 2 - 13513 TO7_PID: - 13514 0000 00000000 .space 4 - 13515 .global TO7_before - 13516 .section .bss.TO7_before,"aw",%nobits + 13513 task: + 13514 0000 00000000 .space 52 + 13514 00000000 + 13514 00000000 + 13514 00000000 + 13514 00000000 + 13515 .global LD_blinker + 13516 .section .bss.LD_blinker,"aw",%nobits 13517 .align 2 - 13520 TO7_before: - 13521 0000 00000000 .space 4 - 13522 .global TO7 - 13523 .section .bss.TO7,"aw",%nobits + 13520 LD_blinker: + 13521 0000 00000000 .space 12 + 13521 00000000 + 13521 00000000 + 13522 .global LD2_param + 13523 .section .bss.LD2_param,"aw",%nobits 13524 .align 2 - 13527 TO7: - 13528 0000 00000000 .space 4 - 13529 .global temp32 - 13530 .section .bss.temp32,"aw",%nobits + 13527 LD2_param: + 13528 0000 00000000 .space 12 + 13528 00000000 + 13528 00000000 + 13529 .global LD1_param + 13530 .section .bss.LD1_param,"aw",%nobits 13531 .align 2 - 13534 temp32: - 13535 0000 00000000 .space 4 - 13536 .global SD_SLIDE - 13537 .section .bss.SD_SLIDE,"aw",%nobits + 13534 LD1_param: + 13535 0000 00000000 .space 12 + 13535 00000000 + 13535 00000000 + 13536 .global Def_setup + 13537 .section .bss.Def_setup,"aw",%nobits 13538 .align 2 - 13541 SD_SLIDE: - 13542 0000 00000000 .space 4 - 13543 .global SD_SEEK - 13544 .section .bss.SD_SEEK,"aw",%nobits + 13541 Def_setup: + 13542 0000 00000000 .space 18 + 13542 00000000 + 13542 00000000 + 13542 00000000 + 13542 0000 + 13543 .global Curr_setup + 13544 .section .bss.Curr_setup,"aw",%nobits 13545 .align 2 - 13548 SD_SEEK: - 13549 0000 00000000 .space 4 - 13550 .global TO6_uart - 13551 .section .bss.TO6_uart,"aw",%nobits + 13548 Curr_setup: + ARM GAS /tmp/ccuHnxNu.s page 661 + + + 13549 0000 00000000 .space 18 + 13549 00000000 + 13549 00000000 + 13549 00000000 + 13549 0000 + 13550 .global LD2_def_setup + 13551 .section .bss.LD2_def_setup,"aw",%nobits 13552 .align 2 - 13555 TO6_uart: - 13556 0000 00000000 .space 4 - 13557 .global TO6_stop - 13558 .section .bss.TO6_stop,"aw",%nobits + 13555 LD2_def_setup: + 13556 0000 00000000 .space 16 + 13556 00000000 + 13556 00000000 + 13556 00000000 + 13557 .global LD1_def_setup + 13558 .section .bss.LD1_def_setup,"aw",%nobits 13559 .align 2 - 13562 TO6_stop: - 13563 0000 00000000 .space 4 - 13564 .global TO6_before - 13565 .section .bss.TO6_before,"aw",%nobits + 13562 LD1_def_setup: + 13563 0000 00000000 .space 16 + 13563 00000000 + 13563 00000000 + 13563 00000000 + 13564 .global LD2_curr_setup + 13565 .section .bss.LD2_curr_setup,"aw",%nobits 13566 .align 2 - 13569 TO6_before: - 13570 0000 00000000 .space 4 - 13571 .global TO6 - 13572 .section .bss.TO6,"aw",%nobits + 13569 LD2_curr_setup: + 13570 0000 00000000 .space 16 + 13570 00000000 + 13570 00000000 + 13570 00000000 + 13571 .global LD1_curr_setup + 13572 .section .bss.LD1_curr_setup,"aw",%nobits 13573 .align 2 - 13576 TO6: - 13577 0000 00000000 .space 4 - 13578 .global huart8 - 13579 .section .bss.huart8,"aw",%nobits + 13576 LD1_curr_setup: + 13577 0000 00000000 .space 16 + 13577 00000000 + 13577 00000000 + 13577 00000000 + 13578 .global sizeoffile + 13579 .section .bss.sizeoffile,"aw",%nobits 13580 .align 2 - ARM GAS /tmp/ccEQxcUB.s page 659 - - - 13583 huart8: - 13584 0000 00000000 .space 136 - 13584 00000000 - 13584 00000000 - 13584 00000000 - 13584 00000000 - 13585 .global htim11 - 13586 .section .bss.htim11,"aw",%nobits + 13583 sizeoffile: + 13584 0000 00000000 .space 4 + 13585 .global fgoto + 13586 .section .bss.fgoto,"aw",%nobits 13587 .align 2 - 13590 htim11: - 13591 0000 00000000 .space 76 - 13591 00000000 - 13591 00000000 - 13591 00000000 - 13591 00000000 - 13592 .global htim10 - 13593 .section .bss.htim10,"aw",%nobits + 13590 fgoto: + 13591 0000 00000000 .space 4 + 13592 .global test + 13593 .section .bss.test,"aw",%nobits 13594 .align 2 - 13597 htim10: - 13598 0000 00000000 .space 76 - 13598 00000000 - 13598 00000000 - 13598 00000000 - 13598 00000000 - 13599 .global htim1 - 13600 .section .bss.htim1,"aw",%nobits - 13601 .align 2 - 13604 htim1: - 13605 0000 00000000 .space 76 - 13605 00000000 - 13605 00000000 - 13605 00000000 - 13605 00000000 - 13606 .global htim8 - 13607 .section .bss.htim8,"aw",%nobits - 13608 .align 2 - 13611 htim8: - 13612 0000 00000000 .space 76 - 13612 00000000 - 13612 00000000 - 13612 00000000 - 13612 00000000 - 13613 .global htim4 - 13614 .section .bss.htim4,"aw",%nobits - 13615 .align 2 - 13618 htim4: - 13619 0000 00000000 .space 76 - 13619 00000000 - 13619 00000000 - 13619 00000000 - 13619 00000000 - 13620 .global hsd1 - 13621 .section .bss.hsd1,"aw",%nobits - 13622 .align 2 - 13625 hsd1: - 13626 0000 00000000 .space 132 - 13626 00000000 - ARM GAS /tmp/ccEQxcUB.s page 660 + 13597 test: + 13598 0000 00000000 .space 4 + 13599 .global fresult + 13600 .section .bss.fresult,"aw",%nobits + 13603 fresult: + 13604 0000 00 .space 1 + 13605 .global COMMAND + ARM GAS /tmp/ccuHnxNu.s page 662 - 13626 00000000 - 13626 00000000 - 13626 00000000 - 13627 .global hadc3 - 13628 .section .bss.hadc3,"aw",%nobits - 13629 .align 2 - 13632 hadc3: - 13633 0000 00000000 .space 72 - 13633 00000000 - 13633 00000000 - 13633 00000000 - 13633 00000000 - 13634 .global hadc1 - 13635 .section .bss.hadc1,"aw",%nobits - 13636 .align 2 - 13639 hadc1: - 13640 0000 00000000 .space 72 - 13640 00000000 - 13640 00000000 - 13640 00000000 - 13640 00000000 - 13641 .text - 13642 .Letext0: - 13643 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 13644 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 13645 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 13646 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 13647 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" - 13648 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" - 13649 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 13650 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 13651 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 13652 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" - 13653 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" - 13654 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 13655 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" - 13656 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 13657 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" - 13658 .file 24 "Inc/main.h" - 13659 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" - 13660 .file 26 "Inc/File_Handling.h" - 13661 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" - 13662 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - 13663 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" - 13664 .file 30 "Inc/fatfs.h" - 13665 .file 31 "" - ARM GAS /tmp/ccEQxcUB.s page 661 + 13606 .section .bss.COMMAND,"aw",%nobits + 13607 .align 2 + 13610 COMMAND: + 13611 0000 00000000 .space 30 + 13611 00000000 + 13611 00000000 + 13611 00000000 + 13611 00000000 + 13612 .global Long_Data + 13613 .section .bss.Long_Data,"aw",%nobits + 13614 .align 2 + 13617 Long_Data: + 13618 0000 00000000 .space 30 + 13618 00000000 + 13618 00000000 + 13618 00000000 + 13618 00000000 + 13619 .global temp16 + 13620 .section .bss.temp16,"aw",%nobits + 13621 .align 1 + 13624 temp16: + 13625 0000 0000 .space 2 + 13626 .global CS_result + 13627 .section .bss.CS_result,"aw",%nobits + 13628 .align 1 + 13631 CS_result: + 13632 0000 0000 .space 2 + 13633 .global UART_header + 13634 .section .bss.UART_header,"aw",%nobits + 13635 .align 1 + 13638 UART_header: + 13639 0000 0000 .space 2 + 13640 .global UART_rec_incr + 13641 .section .bss.UART_rec_incr,"aw",%nobits + 13642 .align 1 + 13645 UART_rec_incr: + 13646 0000 0000 .space 2 + 13647 .global TIM10_coflag + 13648 .section .bss.TIM10_coflag,"aw",%nobits + 13651 TIM10_coflag: + 13652 0000 00 .space 1 + 13653 .global u_rx_flg + 13654 .section .bss.u_rx_flg,"aw",%nobits + 13657 u_rx_flg: + 13658 0000 00 .space 1 + 13659 .global u_tx_flg + 13660 .section .bss.u_tx_flg,"aw",%nobits + 13663 u_tx_flg: + 13664 0000 00 .space 1 + 13665 .global flg_tmt + 13666 .section .bss.flg_tmt,"aw",%nobits + 13669 flg_tmt: + 13670 0000 00 .space 1 + 13671 .global UART_DATA + 13672 .section .bss.UART_DATA,"aw",%nobits + 13673 .align 2 + 13676 UART_DATA: + ARM GAS /tmp/ccuHnxNu.s page 663 + + + 13677 0000 00000000 .space 30 + 13677 00000000 + 13677 00000000 + 13677 00000000 + 13677 00000000 + 13678 .global State_Data + 13679 .section .bss.State_Data,"aw",%nobits + 13680 .align 2 + 13683 State_Data: + 13684 0000 0000 .space 2 + 13685 .global UART_transmission_request + 13686 .section .bss.UART_transmission_request,"aw",%nobits + 13689 UART_transmission_request: + 13690 0000 00 .space 1 + 13691 .global CPU_state_old + 13692 .section .bss.CPU_state_old,"aw",%nobits + 13695 CPU_state_old: + 13696 0000 00 .space 1 + 13697 .global CPU_state + 13698 .section .bss.CPU_state,"aw",%nobits + 13701 CPU_state: + 13702 0000 00 .space 1 + 13703 .global uart_buf + 13704 .section .bss.uart_buf,"aw",%nobits + 13707 uart_buf: + 13708 0000 00 .space 1 + 13709 .global TIM10_period + 13710 .section .bss.TIM10_period,"aw",%nobits + 13711 .align 2 + 13714 TIM10_period: + 13715 0000 00000000 .space 4 + 13716 .global TO10_counter + 13717 .section .bss.TO10_counter,"aw",%nobits + 13718 .align 2 + 13721 TO10_counter: + 13722 0000 00000000 .space 4 + 13723 .global TO10 + 13724 .section .bss.TO10,"aw",%nobits + 13725 .align 2 + 13728 TO10: + 13729 0000 00000000 .space 4 + 13730 .global TO7_PID + 13731 .section .bss.TO7_PID,"aw",%nobits + 13732 .align 2 + 13735 TO7_PID: + 13736 0000 00000000 .space 4 + 13737 .global TO7_before + 13738 .section .bss.TO7_before,"aw",%nobits + 13739 .align 2 + 13742 TO7_before: + 13743 0000 00000000 .space 4 + 13744 .global TO7 + 13745 .section .bss.TO7,"aw",%nobits + 13746 .align 2 + 13749 TO7: + 13750 0000 00000000 .space 4 + 13751 .global temp32 + ARM GAS /tmp/ccuHnxNu.s page 664 + + + 13752 .section .bss.temp32,"aw",%nobits + 13753 .align 2 + 13756 temp32: + 13757 0000 00000000 .space 4 + 13758 .global SD_SLIDE + 13759 .section .bss.SD_SLIDE,"aw",%nobits + 13760 .align 2 + 13763 SD_SLIDE: + 13764 0000 00000000 .space 4 + 13765 .global SD_SEEK + 13766 .section .bss.SD_SEEK,"aw",%nobits + 13767 .align 2 + 13770 SD_SEEK: + 13771 0000 00000000 .space 4 + 13772 .global TO6_uart + 13773 .section .bss.TO6_uart,"aw",%nobits + 13774 .align 2 + 13777 TO6_uart: + 13778 0000 00000000 .space 4 + 13779 .global TO6_stop + 13780 .section .bss.TO6_stop,"aw",%nobits + 13781 .align 2 + 13784 TO6_stop: + 13785 0000 00000000 .space 4 + 13786 .global TO6_before + 13787 .section .bss.TO6_before,"aw",%nobits + 13788 .align 2 + 13791 TO6_before: + 13792 0000 00000000 .space 4 + 13793 .global TO6 + 13794 .section .bss.TO6,"aw",%nobits + 13795 .align 2 + 13798 TO6: + 13799 0000 00000000 .space 4 + 13800 .global huart8 + 13801 .section .bss.huart8,"aw",%nobits + 13802 .align 2 + 13805 huart8: + 13806 0000 00000000 .space 136 + 13806 00000000 + 13806 00000000 + 13806 00000000 + 13806 00000000 + 13807 .global htim11 + 13808 .section .bss.htim11,"aw",%nobits + 13809 .align 2 + 13812 htim11: + 13813 0000 00000000 .space 76 + 13813 00000000 + 13813 00000000 + 13813 00000000 + 13813 00000000 + 13814 .global htim10 + 13815 .section .bss.htim10,"aw",%nobits + 13816 .align 2 + 13819 htim10: + 13820 0000 00000000 .space 76 + ARM GAS /tmp/ccuHnxNu.s page 665 + + + 13820 00000000 + 13820 00000000 + 13820 00000000 + 13820 00000000 + 13821 .global htim1 + 13822 .section .bss.htim1,"aw",%nobits + 13823 .align 2 + 13826 htim1: + 13827 0000 00000000 .space 76 + 13827 00000000 + 13827 00000000 + 13827 00000000 + 13827 00000000 + 13828 .global htim8 + 13829 .section .bss.htim8,"aw",%nobits + 13830 .align 2 + 13833 htim8: + 13834 0000 00000000 .space 76 + 13834 00000000 + 13834 00000000 + 13834 00000000 + 13834 00000000 + 13835 .global htim4 + 13836 .section .bss.htim4,"aw",%nobits + 13837 .align 2 + 13840 htim4: + 13841 0000 00000000 .space 76 + 13841 00000000 + 13841 00000000 + 13841 00000000 + 13841 00000000 + 13842 .global hsd1 + 13843 .section .bss.hsd1,"aw",%nobits + 13844 .align 2 + 13847 hsd1: + 13848 0000 00000000 .space 132 + 13848 00000000 + 13848 00000000 + 13848 00000000 + 13848 00000000 + 13849 .global hadc3 + 13850 .section .bss.hadc3,"aw",%nobits + 13851 .align 2 + 13854 hadc3: + 13855 0000 00000000 .space 72 + 13855 00000000 + 13855 00000000 + 13855 00000000 + 13855 00000000 + 13856 .global hadc1 + 13857 .section .bss.hadc1,"aw",%nobits + 13858 .align 2 + 13861 hadc1: + 13862 0000 00000000 .space 72 + 13862 00000000 + 13862 00000000 + 13862 00000000 + ARM GAS /tmp/ccuHnxNu.s page 666 + + + 13862 00000000 + 13863 .text + 13864 .Letext0: + 13865 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + 13866 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 13867 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 13868 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 13869 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" + 13870 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" + 13871 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 13872 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 13873 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 13874 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" + 13875 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" + 13876 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 13877 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" + 13878 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 13879 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" + 13880 .file 24 "Inc/main.h" + 13881 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" + 13882 .file 26 "Inc/File_Handling.h" + 13883 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" + 13884 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + 13885 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" + 13886 .file 30 "Inc/fatfs.h" + 13887 .file 31 "" + ARM GAS /tmp/ccuHnxNu.s page 667 DEFINED SYMBOLS *ABS*:00000000 main.c - /tmp/ccEQxcUB.s:20 .text.NVIC_EncodePriority:00000000 $t - /tmp/ccEQxcUB.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority - /tmp/ccEQxcUB.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t - /tmp/ccEQxcUB.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init - /tmp/ccEQxcUB.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d - /tmp/ccEQxcUB.s:13625 .bss.hsd1:00000000 hsd1 - /tmp/ccEQxcUB.s:137 .text.MX_DMA_Init:00000000 $t - /tmp/ccEQxcUB.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init - /tmp/ccEQxcUB.s:238 .text.MX_DMA_Init:0000003c $d - /tmp/ccEQxcUB.s:245 .text.Decode_task:00000000 $t - /tmp/ccEQxcUB.s:250 .text.Decode_task:00000000 Decode_task - /tmp/ccEQxcUB.s:527 .text.Decode_task:00000150 $d - /tmp/ccEQxcUB.s:13291 .bss.task:00000000 task - /tmp/ccEQxcUB.s:13499 .bss.TO10_counter:00000000 TO10_counter - /tmp/ccEQxcUB.s:537 .text.SPI2_SetMode:00000000 $t - /tmp/ccEQxcUB.s:542 .text.SPI2_SetMode:00000000 SPI2_SetMode - /tmp/ccEQxcUB.s:650 .text.SPI2_SetMode:00000040 $d - /tmp/ccEQxcUB.s:655 .text.PID_Controller_Temp:00000000 $t - /tmp/ccEQxcUB.s:660 .text.PID_Controller_Temp:00000000 PID_Controller_Temp - /tmp/ccEQxcUB.s:829 .text.PID_Controller_Temp:000000cc $d - /tmp/ccEQxcUB.s:13527 .bss.TO7:00000000 TO7 - /tmp/ccEQxcUB.s:13513 .bss.TO7_PID:00000000 TO7_PID - /tmp/ccEQxcUB.s:839 .text.AD9102_WriteReg:00000000 $t - /tmp/ccEQxcUB.s:844 .text.AD9102_WriteReg:00000000 AD9102_WriteReg - /tmp/ccEQxcUB.s:1107 .text.AD9102_WriteReg:000000c8 $d - /tmp/ccEQxcUB.s:1114 .text.AD9102_WriteRegTable:00000000 $t - /tmp/ccEQxcUB.s:1119 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable - /tmp/ccEQxcUB.s:1170 .text.AD9102_WriteRegTable:00000024 $d - /tmp/ccEQxcUB.s:13219 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr - /tmp/ccEQxcUB.s:1175 .text.AD9102_LoadSramRamp:00000000 $t - /tmp/ccEQxcUB.s:1180 .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp - /tmp/ccEQxcUB.s:1464 .text.AD9102_LoadSramRamp:000000d4 $d - /tmp/ccEQxcUB.s:1469 .text.AD9102_Init:00000000 $t - /tmp/ccEQxcUB.s:1474 .text.AD9102_Init:00000000 AD9102_Init - /tmp/ccEQxcUB.s:1555 .text.AD9102_Init:00000064 $d - /tmp/ccEQxcUB.s:13148 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval - /tmp/ccEQxcUB.s:1563 .text.AD9102_ReadReg:00000000 $t - /tmp/ccEQxcUB.s:1568 .text.AD9102_ReadReg:00000000 AD9102_ReadReg - /tmp/ccEQxcUB.s:1840 .text.AD9102_ReadReg:000000c8 $d - /tmp/ccEQxcUB.s:1847 .text.AD9102_CheckFlagsSram:00000000 $t - /tmp/ccEQxcUB.s:1852 .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram - /tmp/ccEQxcUB.s:2150 .text.AD9102_CheckFlags:00000000 $t - /tmp/ccEQxcUB.s:2155 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags - /tmp/ccEQxcUB.s:2385 .text.AD9102_ApplySram:00000000 $t - /tmp/ccEQxcUB.s:2390 .text.AD9102_ApplySram:00000000 AD9102_ApplySram - /tmp/ccEQxcUB.s:2654 .text.AD9102_ApplySram:0000013c $d - /tmp/ccEQxcUB.s:13077 .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval - /tmp/ccEQxcUB.s:2660 .text.AD9102_Apply:00000000 $t - /tmp/ccEQxcUB.s:2665 .text.AD9102_Apply:00000000 AD9102_Apply - /tmp/ccEQxcUB.s:2836 .text.AD9102_Apply:000000b4 $d - /tmp/ccEQxcUB.s:2841 .text.AD9833_WriteWord:00000000 $t - /tmp/ccEQxcUB.s:2846 .text.AD9833_WriteWord:00000000 AD9833_WriteWord - /tmp/ccEQxcUB.s:2994 .text.AD9833_WriteWord:00000088 $d - /tmp/ccEQxcUB.s:3001 .text.AD9833_Apply:00000000 $t - /tmp/ccEQxcUB.s:3006 .text.AD9833_Apply:00000000 AD9833_Apply - ARM GAS /tmp/ccEQxcUB.s page 662 + /tmp/ccuHnxNu.s:20 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccuHnxNu.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccuHnxNu.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t + /tmp/ccuHnxNu.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init + /tmp/ccuHnxNu.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d + /tmp/ccuHnxNu.s:13847 .bss.hsd1:00000000 hsd1 + /tmp/ccuHnxNu.s:137 .text.MX_DMA_Init:00000000 $t + /tmp/ccuHnxNu.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init + /tmp/ccuHnxNu.s:238 .text.MX_DMA_Init:0000003c $d + /tmp/ccuHnxNu.s:245 .text.Decode_task:00000000 $t + /tmp/ccuHnxNu.s:250 .text.Decode_task:00000000 Decode_task + /tmp/ccuHnxNu.s:527 .text.Decode_task:00000150 $d + /tmp/ccuHnxNu.s:13513 .bss.task:00000000 task + /tmp/ccuHnxNu.s:13721 .bss.TO10_counter:00000000 TO10_counter + /tmp/ccuHnxNu.s:537 .text.SPI2_SetMode:00000000 $t + /tmp/ccuHnxNu.s:542 .text.SPI2_SetMode:00000000 SPI2_SetMode + /tmp/ccuHnxNu.s:650 .text.SPI2_SetMode:00000040 $d + /tmp/ccuHnxNu.s:655 .text.PA4_DAC_Set:00000000 $t + /tmp/ccuHnxNu.s:660 .text.PA4_DAC_Set:00000000 PA4_DAC_Set + /tmp/ccuHnxNu.s:704 .text.PA4_DAC_Set:00000028 $d + /tmp/ccuHnxNu.s:709 .text.PID_Controller_Temp:00000000 $t + /tmp/ccuHnxNu.s:714 .text.PID_Controller_Temp:00000000 PID_Controller_Temp + /tmp/ccuHnxNu.s:883 .text.PID_Controller_Temp:000000cc $d + /tmp/ccuHnxNu.s:13749 .bss.TO7:00000000 TO7 + /tmp/ccuHnxNu.s:13735 .bss.TO7_PID:00000000 TO7_PID + /tmp/ccuHnxNu.s:893 .text.AD9102_WriteReg:00000000 $t + /tmp/ccuHnxNu.s:898 .text.AD9102_WriteReg:00000000 AD9102_WriteReg + /tmp/ccuHnxNu.s:1161 .text.AD9102_WriteReg:000000c8 $d + /tmp/ccuHnxNu.s:1168 .text.AD9102_WriteRegTable:00000000 $t + /tmp/ccuHnxNu.s:1173 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable + /tmp/ccuHnxNu.s:1224 .text.AD9102_WriteRegTable:00000024 $d + /tmp/ccuHnxNu.s:13441 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr + /tmp/ccuHnxNu.s:1229 .text.AD9102_LoadSramRamp:00000000 $t + /tmp/ccuHnxNu.s:1234 .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp + /tmp/ccuHnxNu.s:1518 .text.AD9102_LoadSramRamp:000000d4 $d + /tmp/ccuHnxNu.s:1523 .text.AD9102_Init:00000000 $t + /tmp/ccuHnxNu.s:1528 .text.AD9102_Init:00000000 AD9102_Init + /tmp/ccuHnxNu.s:1609 .text.AD9102_Init:00000064 $d + /tmp/ccuHnxNu.s:13370 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval + /tmp/ccuHnxNu.s:1617 .text.AD9102_ReadReg:00000000 $t + /tmp/ccuHnxNu.s:1622 .text.AD9102_ReadReg:00000000 AD9102_ReadReg + /tmp/ccuHnxNu.s:1894 .text.AD9102_ReadReg:000000c8 $d + /tmp/ccuHnxNu.s:1901 .text.AD9102_CheckFlagsSram:00000000 $t + /tmp/ccuHnxNu.s:1906 .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram + /tmp/ccuHnxNu.s:2204 .text.AD9102_CheckFlags:00000000 $t + /tmp/ccuHnxNu.s:2209 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags + /tmp/ccuHnxNu.s:2439 .text.AD9102_ApplySram:00000000 $t + /tmp/ccuHnxNu.s:2444 .text.AD9102_ApplySram:00000000 AD9102_ApplySram + /tmp/ccuHnxNu.s:2708 .text.AD9102_ApplySram:0000013c $d + /tmp/ccuHnxNu.s:13299 .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval + /tmp/ccuHnxNu.s:2714 .text.AD9102_Apply:00000000 $t + /tmp/ccuHnxNu.s:2719 .text.AD9102_Apply:00000000 AD9102_Apply + /tmp/ccuHnxNu.s:2890 .text.AD9102_Apply:000000b4 $d + /tmp/ccuHnxNu.s:2895 .text.AD9833_WriteWord:00000000 $t + /tmp/ccuHnxNu.s:2900 .text.AD9833_WriteWord:00000000 AD9833_WriteWord + ARM GAS /tmp/ccuHnxNu.s page 668 - /tmp/ccEQxcUB.s:3091 .text.OUT_trigger:00000000 $t - /tmp/ccEQxcUB.s:3096 .text.OUT_trigger:00000000 OUT_trigger - /tmp/ccEQxcUB.s:3114 .text.OUT_trigger:0000000a $d - /tmp/ccEQxcUB.s:3124 .text.OUT_trigger:00000014 $t - /tmp/ccEQxcUB.s:3320 .text.OUT_trigger:0000011c $d - /tmp/ccEQxcUB.s:3326 .text.MPhD_T:00000000 $t - /tmp/ccEQxcUB.s:3331 .text.MPhD_T:00000000 MPhD_T - /tmp/ccEQxcUB.s:3415 .text.MPhD_T:00000056 $d - /tmp/ccEQxcUB.s:3419 .text.MPhD_T:0000005a $t - /tmp/ccEQxcUB.s:3962 .text.MPhD_T:00000210 $d - /tmp/ccEQxcUB.s:3972 .text.Stop_TIM10:00000000 $t - /tmp/ccEQxcUB.s:3977 .text.Stop_TIM10:00000000 Stop_TIM10 - /tmp/ccEQxcUB.s:4006 .text.Stop_TIM10:00000014 $d - /tmp/ccEQxcUB.s:13597 .bss.htim10:00000000 htim10 - /tmp/ccEQxcUB.s:13429 .bss.TIM10_coflag:00000000 TIM10_coflag - /tmp/ccEQxcUB.s:13506 .bss.TO10:00000000 TO10 - /tmp/ccEQxcUB.s:4013 .text.MX_GPIO_Init:00000000 $t - /tmp/ccEQxcUB.s:4018 .text.MX_GPIO_Init:00000000 MX_GPIO_Init - /tmp/ccEQxcUB.s:4516 .text.MX_GPIO_Init:00000274 $d - /tmp/ccEQxcUB.s:4528 .text.MX_SPI4_Init:00000000 $t - /tmp/ccEQxcUB.s:4533 .text.MX_SPI4_Init:00000000 MX_SPI4_Init - /tmp/ccEQxcUB.s:4738 .text.MX_SPI4_Init:000000c8 $d - /tmp/ccEQxcUB.s:4745 .text.MX_SPI2_Init:00000000 $t - /tmp/ccEQxcUB.s:4750 .text.MX_SPI2_Init:00000000 MX_SPI2_Init - /tmp/ccEQxcUB.s:4978 .text.MX_SPI2_Init:000000dc $d - /tmp/ccEQxcUB.s:4985 .text.MX_SPI5_Init:00000000 $t - /tmp/ccEQxcUB.s:4990 .text.MX_SPI5_Init:00000000 MX_SPI5_Init - /tmp/ccEQxcUB.s:5195 .text.MX_SPI5_Init:000000c4 $d - /tmp/ccEQxcUB.s:5202 .text.MX_SPI6_Init:00000000 $t - /tmp/ccEQxcUB.s:5207 .text.MX_SPI6_Init:00000000 MX_SPI6_Init - /tmp/ccEQxcUB.s:5412 .text.MX_SPI6_Init:000000c4 $d - /tmp/ccEQxcUB.s:5419 .text.MX_TIM2_Init:00000000 $t - /tmp/ccEQxcUB.s:5424 .text.MX_TIM2_Init:00000000 MX_TIM2_Init - /tmp/ccEQxcUB.s:5602 .text.MX_TIM2_Init:00000088 $d - /tmp/ccEQxcUB.s:5611 .text.MX_TIM5_Init:00000000 $t - /tmp/ccEQxcUB.s:5616 .text.MX_TIM5_Init:00000000 MX_TIM5_Init - /tmp/ccEQxcUB.s:5793 .text.MX_TIM5_Init:00000084 $d - /tmp/ccEQxcUB.s:5802 .text.MX_TIM7_Init:00000000 $t - /tmp/ccEQxcUB.s:5807 .text.MX_TIM7_Init:00000000 MX_TIM7_Init - /tmp/ccEQxcUB.s:5968 .text.MX_TIM7_Init:0000007c $d - /tmp/ccEQxcUB.s:5976 .text.MX_TIM6_Init:00000000 $t - /tmp/ccEQxcUB.s:5981 .text.MX_TIM6_Init:00000000 MX_TIM6_Init - /tmp/ccEQxcUB.s:6142 .text.MX_TIM6_Init:0000007c $d - /tmp/ccEQxcUB.s:6150 .rodata.Init_params.str1.4:00000000 $d - /tmp/ccEQxcUB.s:6157 .text.Init_params:00000000 $t - /tmp/ccEQxcUB.s:6162 .text.Init_params:00000000 Init_params - /tmp/ccEQxcUB.s:6798 .text.Init_params:00000284 $d - /tmp/ccEQxcUB.s:13576 .bss.TO6:00000000 TO6 - /tmp/ccEQxcUB.s:13520 .bss.TO7_before:00000000 TO7_before - /tmp/ccEQxcUB.s:13569 .bss.TO6_before:00000000 TO6_before - /tmp/ccEQxcUB.s:13555 .bss.TO6_uart:00000000 TO6_uart - /tmp/ccEQxcUB.s:13447 .bss.flg_tmt:00000000 flg_tmt - /tmp/ccEQxcUB.s:13423 .bss.UART_rec_incr:00000000 UART_rec_incr - /tmp/ccEQxcUB.s:13368 .bss.fgoto:00000000 fgoto - /tmp/ccEQxcUB.s:13361 .bss.sizeoffile:00000000 sizeoffile - /tmp/ccEQxcUB.s:13441 .bss.u_tx_flg:00000000 u_tx_flg - /tmp/ccEQxcUB.s:13435 .bss.u_rx_flg:00000000 u_rx_flg - ARM GAS /tmp/ccEQxcUB.s page 663 + /tmp/ccuHnxNu.s:3048 .text.AD9833_WriteWord:00000088 $d + /tmp/ccuHnxNu.s:3055 .text.AD9833_Apply:00000000 $t + /tmp/ccuHnxNu.s:3060 .text.AD9833_Apply:00000000 AD9833_Apply + /tmp/ccuHnxNu.s:3145 .text.OUT_trigger:00000000 $t + /tmp/ccuHnxNu.s:3150 .text.OUT_trigger:00000000 OUT_trigger + /tmp/ccuHnxNu.s:3168 .text.OUT_trigger:0000000a $d + /tmp/ccuHnxNu.s:3178 .text.OUT_trigger:00000014 $t + /tmp/ccuHnxNu.s:3374 .text.OUT_trigger:0000011c $d + /tmp/ccuHnxNu.s:3380 .text.MPhD_T:00000000 $t + /tmp/ccuHnxNu.s:3385 .text.MPhD_T:00000000 MPhD_T + /tmp/ccuHnxNu.s:3469 .text.MPhD_T:00000056 $d + /tmp/ccuHnxNu.s:3473 .text.MPhD_T:0000005a $t + /tmp/ccuHnxNu.s:4016 .text.MPhD_T:00000210 $d + /tmp/ccuHnxNu.s:4026 .text.Stop_TIM10:00000000 $t + /tmp/ccuHnxNu.s:4031 .text.Stop_TIM10:00000000 Stop_TIM10 + /tmp/ccuHnxNu.s:4060 .text.Stop_TIM10:00000014 $d + /tmp/ccuHnxNu.s:13819 .bss.htim10:00000000 htim10 + /tmp/ccuHnxNu.s:13651 .bss.TIM10_coflag:00000000 TIM10_coflag + /tmp/ccuHnxNu.s:13728 .bss.TO10:00000000 TO10 + /tmp/ccuHnxNu.s:4067 .text.MX_GPIO_Init:00000000 $t + /tmp/ccuHnxNu.s:4072 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccuHnxNu.s:4570 .text.MX_GPIO_Init:00000274 $d + /tmp/ccuHnxNu.s:4582 .text.PA4_DAC_Init:00000000 $t + /tmp/ccuHnxNu.s:4587 .text.PA4_DAC_Init:00000000 PA4_DAC_Init + /tmp/ccuHnxNu.s:4674 .text.PA4_DAC_Init:00000058 $d + /tmp/ccuHnxNu.s:4682 .text.MX_SPI4_Init:00000000 $t + /tmp/ccuHnxNu.s:4687 .text.MX_SPI4_Init:00000000 MX_SPI4_Init + /tmp/ccuHnxNu.s:4892 .text.MX_SPI4_Init:000000c8 $d + /tmp/ccuHnxNu.s:4899 .text.MX_SPI2_Init:00000000 $t + /tmp/ccuHnxNu.s:4904 .text.MX_SPI2_Init:00000000 MX_SPI2_Init + /tmp/ccuHnxNu.s:5132 .text.MX_SPI2_Init:000000dc $d + /tmp/ccuHnxNu.s:5139 .text.MX_SPI5_Init:00000000 $t + /tmp/ccuHnxNu.s:5144 .text.MX_SPI5_Init:00000000 MX_SPI5_Init + /tmp/ccuHnxNu.s:5349 .text.MX_SPI5_Init:000000c4 $d + /tmp/ccuHnxNu.s:5356 .text.MX_SPI6_Init:00000000 $t + /tmp/ccuHnxNu.s:5361 .text.MX_SPI6_Init:00000000 MX_SPI6_Init + /tmp/ccuHnxNu.s:5566 .text.MX_SPI6_Init:000000c4 $d + /tmp/ccuHnxNu.s:5573 .text.MX_TIM2_Init:00000000 $t + /tmp/ccuHnxNu.s:5578 .text.MX_TIM2_Init:00000000 MX_TIM2_Init + /tmp/ccuHnxNu.s:5756 .text.MX_TIM2_Init:00000088 $d + /tmp/ccuHnxNu.s:5765 .text.MX_TIM5_Init:00000000 $t + /tmp/ccuHnxNu.s:5770 .text.MX_TIM5_Init:00000000 MX_TIM5_Init + /tmp/ccuHnxNu.s:5947 .text.MX_TIM5_Init:00000084 $d + /tmp/ccuHnxNu.s:5956 .text.MX_TIM7_Init:00000000 $t + /tmp/ccuHnxNu.s:5961 .text.MX_TIM7_Init:00000000 MX_TIM7_Init + /tmp/ccuHnxNu.s:6122 .text.MX_TIM7_Init:0000007c $d + /tmp/ccuHnxNu.s:6130 .text.MX_TIM6_Init:00000000 $t + /tmp/ccuHnxNu.s:6135 .text.MX_TIM6_Init:00000000 MX_TIM6_Init + /tmp/ccuHnxNu.s:6296 .text.MX_TIM6_Init:0000007c $d + /tmp/ccuHnxNu.s:6304 .rodata.Init_params.str1.4:00000000 $d + /tmp/ccuHnxNu.s:6311 .text.Init_params:00000000 $t + /tmp/ccuHnxNu.s:6316 .text.Init_params:00000000 Init_params + /tmp/ccuHnxNu.s:6959 .text.Init_params:00000294 $d + /tmp/ccuHnxNu.s:13798 .bss.TO6:00000000 TO6 + /tmp/ccuHnxNu.s:13742 .bss.TO7_before:00000000 TO7_before + /tmp/ccuHnxNu.s:13791 .bss.TO6_before:00000000 TO6_before + /tmp/ccuHnxNu.s:13777 .bss.TO6_uart:00000000 TO6_uart + ARM GAS /tmp/ccuHnxNu.s page 669 - /tmp/ccEQxcUB.s:13395 .bss.Long_Data:00000000 Long_Data - /tmp/ccEQxcUB.s:13319 .bss.Def_setup:00000000 Def_setup - /tmp/ccEQxcUB.s:13340 .bss.LD1_def_setup:00000000 LD1_def_setup - /tmp/ccEQxcUB.s:13333 .bss.LD2_def_setup:00000000 LD2_def_setup - /tmp/ccEQxcUB.s:13326 .bss.Curr_setup:00000000 Curr_setup - /tmp/ccEQxcUB.s:13354 .bss.LD1_curr_setup:00000000 LD1_curr_setup - /tmp/ccEQxcUB.s:13347 .bss.LD2_curr_setup:00000000 LD2_curr_setup - /tmp/ccEQxcUB.s:13454 .bss.UART_DATA:00000000 UART_DATA - /tmp/ccEQxcUB.s:13548 .bss.SD_SEEK:00000000 SD_SEEK - /tmp/ccEQxcUB.s:13541 .bss.SD_SLIDE:00000000 SD_SLIDE - /tmp/ccEQxcUB.s:13375 .bss.test:00000000 test - /tmp/ccEQxcUB.s:13479 .bss.CPU_state:00000000 CPU_state - /tmp/ccEQxcUB.s:13388 .bss.COMMAND:00000000 COMMAND - /tmp/ccEQxcUB.s:6837 .text.DS1809_Pulse:00000000 $t - /tmp/ccEQxcUB.s:6842 .text.DS1809_Pulse:00000000 DS1809_Pulse - /tmp/ccEQxcUB.s:6951 .text.DS1809_Pulse:00000068 $d - /tmp/ccEQxcUB.s:6956 .text.Get_ADC:00000000 $t - /tmp/ccEQxcUB.s:6961 .text.Get_ADC:00000000 Get_ADC - /tmp/ccEQxcUB.s:6981 .text.Get_ADC:0000000c $d - /tmp/ccEQxcUB.s:6987 .text.Get_ADC:00000012 $t - /tmp/ccEQxcUB.s:7085 .text.Get_ADC:00000068 $d - /tmp/ccEQxcUB.s:13639 .bss.hadc1:00000000 hadc1 - /tmp/ccEQxcUB.s:13632 .bss.hadc3:00000000 hadc3 - /tmp/ccEQxcUB.s:7091 .text.Set_LTEC:00000000 $t - /tmp/ccEQxcUB.s:7097 .text.Set_LTEC:00000000 Set_LTEC - /tmp/ccEQxcUB.s:7131 .text.Set_LTEC:00000018 $d - /tmp/ccEQxcUB.s:7136 .text.Set_LTEC:0000001c $t - /tmp/ccEQxcUB.s:7555 .text.Set_LTEC:00000164 $d - /tmp/ccEQxcUB.s:7564 .text.Decode_uart:00000000 $t - /tmp/ccEQxcUB.s:7569 .text.Decode_uart:00000000 Decode_uart - /tmp/ccEQxcUB.s:8132 .text.Decode_uart:000002cc $d - /tmp/ccEQxcUB.s:8147 .text.Advanced_Controller_Temp:00000000 $t - /tmp/ccEQxcUB.s:8153 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp - /tmp/ccEQxcUB.s:8322 .text.Advanced_Controller_Temp:000000cc $d - /tmp/ccEQxcUB.s:8332 .text.CalculateChecksum:00000000 $t - /tmp/ccEQxcUB.s:8338 .text.CalculateChecksum:00000000 CalculateChecksum - /tmp/ccEQxcUB.s:8383 .text.CheckChecksum:00000000 $t - /tmp/ccEQxcUB.s:8389 .text.CheckChecksum:00000000 CheckChecksum - /tmp/ccEQxcUB.s:8451 .text.CheckChecksum:0000003c $d - /tmp/ccEQxcUB.s:13416 .bss.UART_header:00000000 UART_header - /tmp/ccEQxcUB.s:13409 .bss.CS_result:00000000 CS_result - /tmp/ccEQxcUB.s:8458 .rodata.SD_SAVE.str1.4:00000000 $d - /tmp/ccEQxcUB.s:8462 .text.SD_SAVE:00000000 $t - /tmp/ccEQxcUB.s:8468 .text.SD_SAVE:00000000 SD_SAVE - /tmp/ccEQxcUB.s:8537 .text.SD_SAVE:00000030 $d - /tmp/ccEQxcUB.s:8544 .text.SD_READ:00000000 $t - /tmp/ccEQxcUB.s:8550 .text.SD_READ:00000000 SD_READ - /tmp/ccEQxcUB.s:8628 .text.SD_READ:0000003c $d - /tmp/ccEQxcUB.s:8636 .text.SD_REMOVE:00000000 $t - /tmp/ccEQxcUB.s:8642 .text.SD_REMOVE:00000000 SD_REMOVE - /tmp/ccEQxcUB.s:8710 .text.SD_REMOVE:00000034 $d - /tmp/ccEQxcUB.s:8717 .text.USART_TX:00000000 $t - /tmp/ccEQxcUB.s:8723 .text.USART_TX:00000000 USART_TX - /tmp/ccEQxcUB.s:8798 .text.USART_TX:00000028 $d - /tmp/ccEQxcUB.s:8803 .text.USART_TX_DMA:00000000 $t - /tmp/ccEQxcUB.s:8809 .text.USART_TX_DMA:00000000 USART_TX_DMA - /tmp/ccEQxcUB.s:8878 .text.USART_TX_DMA:00000038 $d - ARM GAS /tmp/ccEQxcUB.s page 664 + /tmp/ccuHnxNu.s:13669 .bss.flg_tmt:00000000 flg_tmt + /tmp/ccuHnxNu.s:13645 .bss.UART_rec_incr:00000000 UART_rec_incr + /tmp/ccuHnxNu.s:13590 .bss.fgoto:00000000 fgoto + /tmp/ccuHnxNu.s:13583 .bss.sizeoffile:00000000 sizeoffile + /tmp/ccuHnxNu.s:13663 .bss.u_tx_flg:00000000 u_tx_flg + /tmp/ccuHnxNu.s:13657 .bss.u_rx_flg:00000000 u_rx_flg + /tmp/ccuHnxNu.s:13617 .bss.Long_Data:00000000 Long_Data + /tmp/ccuHnxNu.s:13541 .bss.Def_setup:00000000 Def_setup + /tmp/ccuHnxNu.s:13562 .bss.LD1_def_setup:00000000 LD1_def_setup + /tmp/ccuHnxNu.s:13555 .bss.LD2_def_setup:00000000 LD2_def_setup + /tmp/ccuHnxNu.s:13548 .bss.Curr_setup:00000000 Curr_setup + /tmp/ccuHnxNu.s:13576 .bss.LD1_curr_setup:00000000 LD1_curr_setup + /tmp/ccuHnxNu.s:13569 .bss.LD2_curr_setup:00000000 LD2_curr_setup + /tmp/ccuHnxNu.s:13676 .bss.UART_DATA:00000000 UART_DATA + /tmp/ccuHnxNu.s:13770 .bss.SD_SEEK:00000000 SD_SEEK + /tmp/ccuHnxNu.s:13763 .bss.SD_SLIDE:00000000 SD_SLIDE + /tmp/ccuHnxNu.s:13597 .bss.test:00000000 test + /tmp/ccuHnxNu.s:13701 .bss.CPU_state:00000000 CPU_state + /tmp/ccuHnxNu.s:13610 .bss.COMMAND:00000000 COMMAND + /tmp/ccuHnxNu.s:6998 .text.DS1809_Pulse:00000000 $t + /tmp/ccuHnxNu.s:7003 .text.DS1809_Pulse:00000000 DS1809_Pulse + /tmp/ccuHnxNu.s:7112 .text.DS1809_Pulse:00000068 $d + /tmp/ccuHnxNu.s:7117 .text.Get_ADC:00000000 $t + /tmp/ccuHnxNu.s:7122 .text.Get_ADC:00000000 Get_ADC + /tmp/ccuHnxNu.s:7142 .text.Get_ADC:0000000c $d + /tmp/ccuHnxNu.s:7148 .text.Get_ADC:00000012 $t + /tmp/ccuHnxNu.s:7246 .text.Get_ADC:00000068 $d + /tmp/ccuHnxNu.s:13861 .bss.hadc1:00000000 hadc1 + /tmp/ccuHnxNu.s:13854 .bss.hadc3:00000000 hadc3 + /tmp/ccuHnxNu.s:7252 .text.Set_LTEC:00000000 $t + /tmp/ccuHnxNu.s:7258 .text.Set_LTEC:00000000 Set_LTEC + /tmp/ccuHnxNu.s:7292 .text.Set_LTEC:00000018 $d + /tmp/ccuHnxNu.s:7297 .text.Set_LTEC:0000001c $t + /tmp/ccuHnxNu.s:7713 .text.Set_LTEC:00000168 $d + /tmp/ccuHnxNu.s:7723 .text.Decode_uart:00000000 $t + /tmp/ccuHnxNu.s:7728 .text.Decode_uart:00000000 Decode_uart + /tmp/ccuHnxNu.s:8291 .text.Decode_uart:000002cc $d + /tmp/ccuHnxNu.s:8306 .text.Advanced_Controller_Temp:00000000 $t + /tmp/ccuHnxNu.s:8312 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp + /tmp/ccuHnxNu.s:8481 .text.Advanced_Controller_Temp:000000cc $d + /tmp/ccuHnxNu.s:8491 .text.CalculateChecksum:00000000 $t + /tmp/ccuHnxNu.s:8497 .text.CalculateChecksum:00000000 CalculateChecksum + /tmp/ccuHnxNu.s:8542 .text.CheckChecksum:00000000 $t + /tmp/ccuHnxNu.s:8548 .text.CheckChecksum:00000000 CheckChecksum + /tmp/ccuHnxNu.s:8610 .text.CheckChecksum:0000003c $d + /tmp/ccuHnxNu.s:13638 .bss.UART_header:00000000 UART_header + /tmp/ccuHnxNu.s:13631 .bss.CS_result:00000000 CS_result + /tmp/ccuHnxNu.s:8617 .rodata.SD_SAVE.str1.4:00000000 $d + /tmp/ccuHnxNu.s:8621 .text.SD_SAVE:00000000 $t + /tmp/ccuHnxNu.s:8627 .text.SD_SAVE:00000000 SD_SAVE + /tmp/ccuHnxNu.s:8696 .text.SD_SAVE:00000030 $d + /tmp/ccuHnxNu.s:8703 .text.SD_READ:00000000 $t + /tmp/ccuHnxNu.s:8709 .text.SD_READ:00000000 SD_READ + /tmp/ccuHnxNu.s:8787 .text.SD_READ:0000003c $d + /tmp/ccuHnxNu.s:8795 .text.SD_REMOVE:00000000 $t + /tmp/ccuHnxNu.s:8801 .text.SD_REMOVE:00000000 SD_REMOVE + /tmp/ccuHnxNu.s:8869 .text.SD_REMOVE:00000034 $d + ARM GAS /tmp/ccuHnxNu.s page 670 - /tmp/ccEQxcUB.s:8884 .text.Error_Handler:00000000 $t - /tmp/ccEQxcUB.s:8890 .text.Error_Handler:00000000 Error_Handler - /tmp/ccEQxcUB.s:8921 .text.MX_ADC1_Init:00000000 $t - /tmp/ccEQxcUB.s:8926 .text.MX_ADC1_Init:00000000 MX_ADC1_Init - /tmp/ccEQxcUB.s:9115 .text.MX_ADC1_Init:000000bc $d - /tmp/ccEQxcUB.s:9122 .text.MX_ADC3_Init:00000000 $t - /tmp/ccEQxcUB.s:9127 .text.MX_ADC3_Init:00000000 MX_ADC3_Init - /tmp/ccEQxcUB.s:9234 .text.MX_ADC3_Init:00000060 $d - /tmp/ccEQxcUB.s:9241 .text.MX_USART1_UART_Init:00000000 $t - /tmp/ccEQxcUB.s:9246 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init - /tmp/ccEQxcUB.s:9645 .text.MX_USART1_UART_Init:0000017c $d - /tmp/ccEQxcUB.s:9654 .text.MX_TIM10_Init:00000000 $t - /tmp/ccEQxcUB.s:9659 .text.MX_TIM10_Init:00000000 MX_TIM10_Init - /tmp/ccEQxcUB.s:9708 .text.MX_TIM10_Init:00000024 $d - /tmp/ccEQxcUB.s:9714 .text.MX_UART8_Init:00000000 $t - /tmp/ccEQxcUB.s:9719 .text.MX_UART8_Init:00000000 MX_UART8_Init - /tmp/ccEQxcUB.s:9780 .text.MX_UART8_Init:00000030 $d - /tmp/ccEQxcUB.s:13583 .bss.huart8:00000000 huart8 - /tmp/ccEQxcUB.s:9786 .text.MX_TIM8_Init:00000000 $t - /tmp/ccEQxcUB.s:9791 .text.MX_TIM8_Init:00000000 MX_TIM8_Init - /tmp/ccEQxcUB.s:9900 .text.MX_TIM8_Init:00000064 $d - /tmp/ccEQxcUB.s:13611 .bss.htim8:00000000 htim8 - /tmp/ccEQxcUB.s:9906 .text.MX_TIM11_Init:00000000 $t - /tmp/ccEQxcUB.s:9911 .text.MX_TIM11_Init:00000000 MX_TIM11_Init - /tmp/ccEQxcUB.s:10021 .text.MX_TIM11_Init:00000068 $d - /tmp/ccEQxcUB.s:13590 .bss.htim11:00000000 htim11 - /tmp/ccEQxcUB.s:10027 .text.MX_TIM4_Init:00000000 $t - /tmp/ccEQxcUB.s:10032 .text.MX_TIM4_Init:00000000 MX_TIM4_Init - /tmp/ccEQxcUB.s:10187 .text.MX_TIM4_Init:0000009c $d - /tmp/ccEQxcUB.s:13618 .bss.htim4:00000000 htim4 - /tmp/ccEQxcUB.s:10193 .text.MX_TIM1_Init:00000000 $t - /tmp/ccEQxcUB.s:10198 .text.MX_TIM1_Init:00000000 MX_TIM1_Init - /tmp/ccEQxcUB.s:10389 .text.MX_TIM1_Init:000000bc $d - /tmp/ccEQxcUB.s:13604 .bss.htim1:00000000 htim1 - /tmp/ccEQxcUB.s:10395 .text.SystemClock_Config:00000000 $t - /tmp/ccEQxcUB.s:10401 .text.SystemClock_Config:00000000 SystemClock_Config - /tmp/ccEQxcUB.s:10560 .text.SystemClock_Config:000000ac $d - /tmp/ccEQxcUB.s:10566 .text.main:00000000 $t - /tmp/ccEQxcUB.s:10572 .text.main:00000000 main - /tmp/ccEQxcUB.s:10984 .text.main:0000014c $d - /tmp/ccEQxcUB.s:10997 .text.main:00000180 $t - /tmp/ccEQxcUB.s:11250 .text.main:0000028c $d - /tmp/ccEQxcUB.s:13473 .bss.CPU_state_old:00000000 CPU_state_old - /tmp/ccEQxcUB.s:13467 .bss.UART_transmission_request:00000000 UART_transmission_request - /tmp/ccEQxcUB.s:13461 .bss.State_Data:00000000 State_Data - /tmp/ccEQxcUB.s:13402 .bss.temp16:00000000 temp16 - /tmp/ccEQxcUB.s:11275 .text.main:000002e4 $t - /tmp/ccEQxcUB.s:11937 .text.main:000005b0 $d - /tmp/ccEQxcUB.s:13312 .bss.LD1_param:00000000 LD1_param - /tmp/ccEQxcUB.s:13305 .bss.LD2_param:00000000 LD2_param - /tmp/ccEQxcUB.s:13562 .bss.TO6_stop:00000000 TO6_stop - /tmp/ccEQxcUB.s:11959 .text.main:000005f8 $t - /tmp/ccEQxcUB.s:12444 .text.main:0000087c $d - /tmp/ccEQxcUB.s:13492 .bss.TIM10_period:00000000 TIM10_period - /tmp/ccEQxcUB.s:12476 .text.main:000008ec $t - /tmp/ccEQxcUB.s:13042 .text.main:00000b8c $d - /tmp/ccEQxcUB.s:13298 .bss.LD_blinker:00000000 LD_blinker - ARM GAS /tmp/ccEQxcUB.s page 665 + /tmp/ccuHnxNu.s:8876 .text.USART_TX:00000000 $t + /tmp/ccuHnxNu.s:8882 .text.USART_TX:00000000 USART_TX + /tmp/ccuHnxNu.s:8957 .text.USART_TX:00000028 $d + /tmp/ccuHnxNu.s:8962 .text.USART_TX_DMA:00000000 $t + /tmp/ccuHnxNu.s:8968 .text.USART_TX_DMA:00000000 USART_TX_DMA + /tmp/ccuHnxNu.s:9037 .text.USART_TX_DMA:00000038 $d + /tmp/ccuHnxNu.s:9043 .text.Error_Handler:00000000 $t + /tmp/ccuHnxNu.s:9049 .text.Error_Handler:00000000 Error_Handler + /tmp/ccuHnxNu.s:9080 .text.MX_ADC1_Init:00000000 $t + /tmp/ccuHnxNu.s:9085 .text.MX_ADC1_Init:00000000 MX_ADC1_Init + /tmp/ccuHnxNu.s:9274 .text.MX_ADC1_Init:000000bc $d + /tmp/ccuHnxNu.s:9281 .text.MX_ADC3_Init:00000000 $t + /tmp/ccuHnxNu.s:9286 .text.MX_ADC3_Init:00000000 MX_ADC3_Init + /tmp/ccuHnxNu.s:9393 .text.MX_ADC3_Init:00000060 $d + /tmp/ccuHnxNu.s:9400 .text.MX_USART1_UART_Init:00000000 $t + /tmp/ccuHnxNu.s:9405 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init + /tmp/ccuHnxNu.s:9804 .text.MX_USART1_UART_Init:0000017c $d + /tmp/ccuHnxNu.s:9813 .text.MX_TIM10_Init:00000000 $t + /tmp/ccuHnxNu.s:9818 .text.MX_TIM10_Init:00000000 MX_TIM10_Init + /tmp/ccuHnxNu.s:9867 .text.MX_TIM10_Init:00000024 $d + /tmp/ccuHnxNu.s:9873 .text.MX_UART8_Init:00000000 $t + /tmp/ccuHnxNu.s:9878 .text.MX_UART8_Init:00000000 MX_UART8_Init + /tmp/ccuHnxNu.s:9939 .text.MX_UART8_Init:00000030 $d + /tmp/ccuHnxNu.s:13805 .bss.huart8:00000000 huart8 + /tmp/ccuHnxNu.s:9945 .text.MX_TIM8_Init:00000000 $t + /tmp/ccuHnxNu.s:9950 .text.MX_TIM8_Init:00000000 MX_TIM8_Init + /tmp/ccuHnxNu.s:10059 .text.MX_TIM8_Init:00000064 $d + /tmp/ccuHnxNu.s:13833 .bss.htim8:00000000 htim8 + /tmp/ccuHnxNu.s:10065 .text.MX_TIM11_Init:00000000 $t + /tmp/ccuHnxNu.s:10070 .text.MX_TIM11_Init:00000000 MX_TIM11_Init + /tmp/ccuHnxNu.s:10180 .text.MX_TIM11_Init:00000068 $d + /tmp/ccuHnxNu.s:13812 .bss.htim11:00000000 htim11 + /tmp/ccuHnxNu.s:10186 .text.MX_TIM4_Init:00000000 $t + /tmp/ccuHnxNu.s:10191 .text.MX_TIM4_Init:00000000 MX_TIM4_Init + /tmp/ccuHnxNu.s:10346 .text.MX_TIM4_Init:0000009c $d + /tmp/ccuHnxNu.s:13840 .bss.htim4:00000000 htim4 + /tmp/ccuHnxNu.s:10352 .text.MX_TIM1_Init:00000000 $t + /tmp/ccuHnxNu.s:10357 .text.MX_TIM1_Init:00000000 MX_TIM1_Init + /tmp/ccuHnxNu.s:10548 .text.MX_TIM1_Init:000000bc $d + /tmp/ccuHnxNu.s:13826 .bss.htim1:00000000 htim1 + /tmp/ccuHnxNu.s:10554 .text.SystemClock_Config:00000000 $t + /tmp/ccuHnxNu.s:10560 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccuHnxNu.s:10719 .text.SystemClock_Config:000000ac $d + /tmp/ccuHnxNu.s:10725 .text.main:00000000 $t + /tmp/ccuHnxNu.s:10731 .text.main:00000000 main + /tmp/ccuHnxNu.s:11146 .text.main:00000150 $d + /tmp/ccuHnxNu.s:11160 .text.main:00000188 $t + /tmp/ccuHnxNu.s:11413 .text.main:00000294 $d + /tmp/ccuHnxNu.s:13695 .bss.CPU_state_old:00000000 CPU_state_old + /tmp/ccuHnxNu.s:13689 .bss.UART_transmission_request:00000000 UART_transmission_request + /tmp/ccuHnxNu.s:13683 .bss.State_Data:00000000 State_Data + /tmp/ccuHnxNu.s:13624 .bss.temp16:00000000 temp16 + /tmp/ccuHnxNu.s:11438 .text.main:000002ec $t + /tmp/ccuHnxNu.s:12100 .text.main:000005b8 $d + /tmp/ccuHnxNu.s:13534 .bss.LD1_param:00000000 LD1_param + /tmp/ccuHnxNu.s:13527 .bss.LD2_param:00000000 LD2_param + /tmp/ccuHnxNu.s:13784 .bss.TO6_stop:00000000 TO6_stop + ARM GAS /tmp/ccuHnxNu.s page 671 - /tmp/ccEQxcUB.s:13074 .rodata.ad9102_example2_regval:00000000 $d - /tmp/ccEQxcUB.s:13145 .rodata.ad9102_example4_regval:00000000 $d - /tmp/ccEQxcUB.s:13216 .rodata.ad9102_reg_addr:00000000 $d - /tmp/ccEQxcUB.s:13288 .bss.task:00000000 $d - /tmp/ccEQxcUB.s:13295 .bss.LD_blinker:00000000 $d - /tmp/ccEQxcUB.s:13302 .bss.LD2_param:00000000 $d - /tmp/ccEQxcUB.s:13309 .bss.LD1_param:00000000 $d - /tmp/ccEQxcUB.s:13316 .bss.Def_setup:00000000 $d - /tmp/ccEQxcUB.s:13323 .bss.Curr_setup:00000000 $d - /tmp/ccEQxcUB.s:13330 .bss.LD2_def_setup:00000000 $d - /tmp/ccEQxcUB.s:13337 .bss.LD1_def_setup:00000000 $d - /tmp/ccEQxcUB.s:13344 .bss.LD2_curr_setup:00000000 $d - /tmp/ccEQxcUB.s:13351 .bss.LD1_curr_setup:00000000 $d - /tmp/ccEQxcUB.s:13358 .bss.sizeoffile:00000000 $d - /tmp/ccEQxcUB.s:13365 .bss.fgoto:00000000 $d - /tmp/ccEQxcUB.s:13372 .bss.test:00000000 $d - /tmp/ccEQxcUB.s:13381 .bss.fresult:00000000 fresult - /tmp/ccEQxcUB.s:13382 .bss.fresult:00000000 $d - /tmp/ccEQxcUB.s:13385 .bss.COMMAND:00000000 $d - /tmp/ccEQxcUB.s:13392 .bss.Long_Data:00000000 $d - /tmp/ccEQxcUB.s:13399 .bss.temp16:00000000 $d - /tmp/ccEQxcUB.s:13406 .bss.CS_result:00000000 $d - /tmp/ccEQxcUB.s:13413 .bss.UART_header:00000000 $d - /tmp/ccEQxcUB.s:13420 .bss.UART_rec_incr:00000000 $d - /tmp/ccEQxcUB.s:13430 .bss.TIM10_coflag:00000000 $d - /tmp/ccEQxcUB.s:13436 .bss.u_rx_flg:00000000 $d - /tmp/ccEQxcUB.s:13442 .bss.u_tx_flg:00000000 $d - /tmp/ccEQxcUB.s:13448 .bss.flg_tmt:00000000 $d - /tmp/ccEQxcUB.s:13451 .bss.UART_DATA:00000000 $d - /tmp/ccEQxcUB.s:13458 .bss.State_Data:00000000 $d - /tmp/ccEQxcUB.s:13468 .bss.UART_transmission_request:00000000 $d - /tmp/ccEQxcUB.s:13474 .bss.CPU_state_old:00000000 $d - /tmp/ccEQxcUB.s:13480 .bss.CPU_state:00000000 $d - /tmp/ccEQxcUB.s:13485 .bss.uart_buf:00000000 uart_buf - /tmp/ccEQxcUB.s:13486 .bss.uart_buf:00000000 $d - /tmp/ccEQxcUB.s:13489 .bss.TIM10_period:00000000 $d - /tmp/ccEQxcUB.s:13496 .bss.TO10_counter:00000000 $d - /tmp/ccEQxcUB.s:13503 .bss.TO10:00000000 $d - /tmp/ccEQxcUB.s:13510 .bss.TO7_PID:00000000 $d - /tmp/ccEQxcUB.s:13517 .bss.TO7_before:00000000 $d - /tmp/ccEQxcUB.s:13524 .bss.TO7:00000000 $d - /tmp/ccEQxcUB.s:13534 .bss.temp32:00000000 temp32 - /tmp/ccEQxcUB.s:13531 .bss.temp32:00000000 $d - /tmp/ccEQxcUB.s:13538 .bss.SD_SLIDE:00000000 $d - /tmp/ccEQxcUB.s:13545 .bss.SD_SEEK:00000000 $d - /tmp/ccEQxcUB.s:13552 .bss.TO6_uart:00000000 $d - /tmp/ccEQxcUB.s:13559 .bss.TO6_stop:00000000 $d - /tmp/ccEQxcUB.s:13566 .bss.TO6_before:00000000 $d - /tmp/ccEQxcUB.s:13573 .bss.TO6:00000000 $d - /tmp/ccEQxcUB.s:13580 .bss.huart8:00000000 $d - /tmp/ccEQxcUB.s:13587 .bss.htim11:00000000 $d - /tmp/ccEQxcUB.s:13594 .bss.htim10:00000000 $d - /tmp/ccEQxcUB.s:13601 .bss.htim1:00000000 $d - /tmp/ccEQxcUB.s:13608 .bss.htim8:00000000 $d - /tmp/ccEQxcUB.s:13615 .bss.htim4:00000000 $d - /tmp/ccEQxcUB.s:13622 .bss.hsd1:00000000 $d - /tmp/ccEQxcUB.s:13629 .bss.hadc3:00000000 $d - ARM GAS /tmp/ccEQxcUB.s page 666 + /tmp/ccuHnxNu.s:12122 .text.main:00000600 $t + /tmp/ccuHnxNu.s:12666 .text.main:000008c0 $d + /tmp/ccuHnxNu.s:13714 .bss.TIM10_period:00000000 TIM10_period + /tmp/ccuHnxNu.s:12698 .text.main:00000930 $t + /tmp/ccuHnxNu.s:13264 .text.main:00000bd0 $d + /tmp/ccuHnxNu.s:13520 .bss.LD_blinker:00000000 LD_blinker + /tmp/ccuHnxNu.s:13296 .rodata.ad9102_example2_regval:00000000 $d + /tmp/ccuHnxNu.s:13367 .rodata.ad9102_example4_regval:00000000 $d + /tmp/ccuHnxNu.s:13438 .rodata.ad9102_reg_addr:00000000 $d + /tmp/ccuHnxNu.s:13510 .bss.task:00000000 $d + /tmp/ccuHnxNu.s:13517 .bss.LD_blinker:00000000 $d + /tmp/ccuHnxNu.s:13524 .bss.LD2_param:00000000 $d + /tmp/ccuHnxNu.s:13531 .bss.LD1_param:00000000 $d + /tmp/ccuHnxNu.s:13538 .bss.Def_setup:00000000 $d + /tmp/ccuHnxNu.s:13545 .bss.Curr_setup:00000000 $d + /tmp/ccuHnxNu.s:13552 .bss.LD2_def_setup:00000000 $d + /tmp/ccuHnxNu.s:13559 .bss.LD1_def_setup:00000000 $d + /tmp/ccuHnxNu.s:13566 .bss.LD2_curr_setup:00000000 $d + /tmp/ccuHnxNu.s:13573 .bss.LD1_curr_setup:00000000 $d + /tmp/ccuHnxNu.s:13580 .bss.sizeoffile:00000000 $d + /tmp/ccuHnxNu.s:13587 .bss.fgoto:00000000 $d + /tmp/ccuHnxNu.s:13594 .bss.test:00000000 $d + /tmp/ccuHnxNu.s:13603 .bss.fresult:00000000 fresult + /tmp/ccuHnxNu.s:13604 .bss.fresult:00000000 $d + /tmp/ccuHnxNu.s:13607 .bss.COMMAND:00000000 $d + /tmp/ccuHnxNu.s:13614 .bss.Long_Data:00000000 $d + /tmp/ccuHnxNu.s:13621 .bss.temp16:00000000 $d + /tmp/ccuHnxNu.s:13628 .bss.CS_result:00000000 $d + /tmp/ccuHnxNu.s:13635 .bss.UART_header:00000000 $d + /tmp/ccuHnxNu.s:13642 .bss.UART_rec_incr:00000000 $d + /tmp/ccuHnxNu.s:13652 .bss.TIM10_coflag:00000000 $d + /tmp/ccuHnxNu.s:13658 .bss.u_rx_flg:00000000 $d + /tmp/ccuHnxNu.s:13664 .bss.u_tx_flg:00000000 $d + /tmp/ccuHnxNu.s:13670 .bss.flg_tmt:00000000 $d + /tmp/ccuHnxNu.s:13673 .bss.UART_DATA:00000000 $d + /tmp/ccuHnxNu.s:13680 .bss.State_Data:00000000 $d + /tmp/ccuHnxNu.s:13690 .bss.UART_transmission_request:00000000 $d + /tmp/ccuHnxNu.s:13696 .bss.CPU_state_old:00000000 $d + /tmp/ccuHnxNu.s:13702 .bss.CPU_state:00000000 $d + /tmp/ccuHnxNu.s:13707 .bss.uart_buf:00000000 uart_buf + /tmp/ccuHnxNu.s:13708 .bss.uart_buf:00000000 $d + /tmp/ccuHnxNu.s:13711 .bss.TIM10_period:00000000 $d + /tmp/ccuHnxNu.s:13718 .bss.TO10_counter:00000000 $d + /tmp/ccuHnxNu.s:13725 .bss.TO10:00000000 $d + /tmp/ccuHnxNu.s:13732 .bss.TO7_PID:00000000 $d + /tmp/ccuHnxNu.s:13739 .bss.TO7_before:00000000 $d + /tmp/ccuHnxNu.s:13746 .bss.TO7:00000000 $d + /tmp/ccuHnxNu.s:13756 .bss.temp32:00000000 temp32 + /tmp/ccuHnxNu.s:13753 .bss.temp32:00000000 $d + /tmp/ccuHnxNu.s:13760 .bss.SD_SLIDE:00000000 $d + /tmp/ccuHnxNu.s:13767 .bss.SD_SEEK:00000000 $d + /tmp/ccuHnxNu.s:13774 .bss.TO6_uart:00000000 $d + /tmp/ccuHnxNu.s:13781 .bss.TO6_stop:00000000 $d + /tmp/ccuHnxNu.s:13788 .bss.TO6_before:00000000 $d + /tmp/ccuHnxNu.s:13795 .bss.TO6:00000000 $d + /tmp/ccuHnxNu.s:13802 .bss.huart8:00000000 $d + /tmp/ccuHnxNu.s:13809 .bss.htim11:00000000 $d + ARM GAS /tmp/ccuHnxNu.s page 672 - /tmp/ccEQxcUB.s:13636 .bss.hadc1:00000000 $d + /tmp/ccuHnxNu.s:13816 .bss.htim10:00000000 $d + /tmp/ccuHnxNu.s:13823 .bss.htim1:00000000 $d + /tmp/ccuHnxNu.s:13830 .bss.htim8:00000000 $d + /tmp/ccuHnxNu.s:13837 .bss.htim4:00000000 $d + /tmp/ccuHnxNu.s:13844 .bss.hsd1:00000000 $d + /tmp/ccuHnxNu.s:13851 .bss.hadc3:00000000 $d + /tmp/ccuHnxNu.s:13858 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin diff --git a/build/main.o b/build/main.o index 73ed151d13b36ea465ba5c79eefa472cea117fcb..cae79cc89e9c403acc76052707fff3fe4b5ad515 100644 GIT binary patch literal 178364 zcmd?Sd3aPs_CH*8Z{MW5Z+Ftk?LZR(bkcz&BtS?aq9B9>nk8XJMMMpYh=3Xvm5E!k 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a/build/sd_diskio.lst b/build/sd_diskio.lst index 981d0bc..8c83de5 100644 --- a/build/sd_diskio.lst +++ b/build/sd_diskio.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccx8I3an.s page 1 +ARM GAS /tmp/cc2j0q1O.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 29:Src/sd_diskio.c **** #include "sd_diskio.h" 30:Src/sd_diskio.c **** 31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/ - ARM GAS /tmp/ccx8I3an.s page 2 + ARM GAS /tmp/cc2j0q1O.s page 2 32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */ 87:Src/sd_diskio.c **** 88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/ - ARM GAS /tmp/ccx8I3an.s page 3 + ARM GAS /tmp/cc2j0q1O.s page 3 89:Src/sd_diskio.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 71 .global SD_initialize 72 .syntax unified 73 .thumb - ARM GAS /tmp/ccx8I3an.s page 4 + ARM GAS /tmp/cc2j0q1O.s page 4 74 .thumb_func @@ -238,7 +238,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 106 .loc 1 123 1 view .LVU21 107 0014 10BD pop {r4, pc} 108 .LVL4: - ARM GAS /tmp/ccx8I3an.s page 5 + ARM GAS /tmp/cc2j0q1O.s page 5 109 .L9: @@ -298,7 +298,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 152 .cfi_endproc 153 .LFE1185: 155 .section .text.SD_read,"ax",%progbits - ARM GAS /tmp/ccx8I3an.s page 6 + ARM GAS /tmp/cc2j0q1O.s page 6 156 .align 1 @@ -358,7 +358,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 193 .L16: 152:Src/sd_diskio.c **** (uint32_t) (sector), 153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK) - ARM GAS /tmp/ccx8I3an.s page 7 + ARM GAS /tmp/cc2j0q1O.s page 7 154:Src/sd_diskio.c **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128) 174:Src/sd_diskio.c **** * @retval DRESULT: Operation result 175:Src/sd_diskio.c **** */ - ARM GAS /tmp/ccx8I3an.s page 8 + ARM GAS /tmp/cc2j0q1O.s page 8 176:Src/sd_diskio.c **** #if _USE_WRITE == 1 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 264 001a FAD1 bne .L21 265 .L20: 266 .LVL24: - ARM GAS /tmp/ccx8I3an.s page 9 + ARM GAS /tmp/cc2j0q1O.s page 9 190:Src/sd_diskio.c **** res = RES_OK; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 302 .cfi_def_cfa_offset 48 210:Src/sd_diskio.c **** DRESULT res = RES_ERROR; 303 .loc 1 210 3 is_stmt 1 view .LVU64 - ARM GAS /tmp/ccx8I3an.s page 10 + ARM GAS /tmp/cc2j0q1O.s page 10 304 .LVL27: @@ -598,7 +598,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 341 002a 0DE0 b .L25 342 .LVL31: 343 .L28: - ARM GAS /tmp/ccx8I3an.s page 11 + ARM GAS /tmp/cc2j0q1O.s page 11 228:Src/sd_diskio.c **** @@ -658,7 +658,7 @@ ARM GAS /tmp/ccx8I3an.s page 1 245:Src/sd_diskio.c **** } 246:Src/sd_diskio.c **** 247:Src/sd_diskio.c **** return res; - ARM GAS /tmp/ccx8I3an.s page 12 + ARM GAS /tmp/cc2j0q1O.s page 12 248:Src/sd_diskio.c **** } @@ -708,31 +708,31 @@ ARM GAS /tmp/ccx8I3an.s page 1 427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 428 .file 10 "Inc/bsp_driver_sd.h" 429 .file 11 "Inc/sd_diskio.h" - ARM GAS /tmp/ccx8I3an.s page 13 + ARM GAS /tmp/cc2j0q1O.s page 13 DEFINED SYMBOLS *ABS*:00000000 sd_diskio.c - /tmp/ccx8I3an.s:20 .text.SD_CheckStatus:00000000 $t - /tmp/ccx8I3an.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus - /tmp/ccx8I3an.s:65 .text.SD_CheckStatus:00000020 $d - /tmp/ccx8I3an.s:416 .data.Stat:00000000 Stat - /tmp/ccx8I3an.s:70 .text.SD_initialize:00000000 $t - /tmp/ccx8I3an.s:76 .text.SD_initialize:00000000 SD_initialize - /tmp/ccx8I3an.s:122 .text.SD_initialize:00000024 $d - /tmp/ccx8I3an.s:127 .text.SD_status:00000000 $t - /tmp/ccx8I3an.s:133 .text.SD_status:00000000 SD_status - /tmp/ccx8I3an.s:156 .text.SD_read:00000000 $t - /tmp/ccx8I3an.s:162 .text.SD_read:00000000 SD_read - /tmp/ccx8I3an.s:218 .text.SD_write:00000000 $t - /tmp/ccx8I3an.s:224 .text.SD_write:00000000 SD_write - /tmp/ccx8I3an.s:280 .text.SD_ioctl:00000000 $t - /tmp/ccx8I3an.s:286 .text.SD_ioctl:00000000 SD_ioctl - /tmp/ccx8I3an.s:320 .text.SD_ioctl:00000018 $d - /tmp/ccx8I3an.s:324 .text.SD_ioctl:0000001c $t - /tmp/ccx8I3an.s:398 .text.SD_ioctl:00000054 $d - /tmp/ccx8I3an.s:407 .rodata.SD_Driver:00000000 SD_Driver - /tmp/ccx8I3an.s:404 .rodata.SD_Driver:00000000 $d + /tmp/cc2j0q1O.s:20 .text.SD_CheckStatus:00000000 $t + /tmp/cc2j0q1O.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus + /tmp/cc2j0q1O.s:65 .text.SD_CheckStatus:00000020 $d + /tmp/cc2j0q1O.s:416 .data.Stat:00000000 Stat + /tmp/cc2j0q1O.s:70 .text.SD_initialize:00000000 $t + /tmp/cc2j0q1O.s:76 .text.SD_initialize:00000000 SD_initialize + /tmp/cc2j0q1O.s:122 .text.SD_initialize:00000024 $d + /tmp/cc2j0q1O.s:127 .text.SD_status:00000000 $t + /tmp/cc2j0q1O.s:133 .text.SD_status:00000000 SD_status + /tmp/cc2j0q1O.s:156 .text.SD_read:00000000 $t + /tmp/cc2j0q1O.s:162 .text.SD_read:00000000 SD_read + /tmp/cc2j0q1O.s:218 .text.SD_write:00000000 $t + /tmp/cc2j0q1O.s:224 .text.SD_write:00000000 SD_write + /tmp/cc2j0q1O.s:280 .text.SD_ioctl:00000000 $t + /tmp/cc2j0q1O.s:286 .text.SD_ioctl:00000000 SD_ioctl + /tmp/cc2j0q1O.s:320 .text.SD_ioctl:00000018 $d + /tmp/cc2j0q1O.s:324 .text.SD_ioctl:0000001c $t + /tmp/cc2j0q1O.s:398 .text.SD_ioctl:00000054 $d + /tmp/cc2j0q1O.s:407 .rodata.SD_Driver:00000000 SD_Driver + /tmp/cc2j0q1O.s:404 .rodata.SD_Driver:00000000 $d UNDEFINED SYMBOLS BSP_SD_GetCardState diff --git a/build/stm32f7xx_hal_msp.lst b/build/stm32f7xx_hal_msp.lst index a67dc67..f115fde 100644 --- a/build/stm32f7xx_hal_msp.lst +++ b/build/stm32f7xx_hal_msp.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccEjAJiv.s page 1 +ARM GAS /tmp/ccR0YjlF.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 29:Src/stm32f7xx_hal_msp.c **** 30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */ 31:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccEjAJiv.s page 2 + ARM GAS /tmp/ccR0YjlF.s page 2 32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 41 0004 1A6C ldr r2, [r3, #64] 42 0006 42F08052 orr r2, r2, #268435456 43 000a 1A64 str r2, [r3, #64] - ARM GAS /tmp/ccEjAJiv.s page 3 + ARM GAS /tmp/ccR0YjlF.s page 3 44 .loc 1 72 3 view .LVU4 @@ -178,7 +178,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 83:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization 84:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example 85:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer - ARM GAS /tmp/ccEjAJiv.s page 4 + ARM GAS /tmp/ccR0YjlF.s page 4 86:Src/stm32f7xx_hal_msp.c **** * @retval None @@ -238,7 +238,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 113:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccEjAJiv.s page 5 + ARM GAS /tmp/ccR0YjlF.s page 5 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2; @@ -298,7 +298,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 130 .cfi_def_cfa_offset 12 131 @ sp needed 132 0020 30BD pop {r4, r5, pc} - ARM GAS /tmp/ccEjAJiv.s page 6 + ARM GAS /tmp/ccR0YjlF.s page 6 133 .LVL2: @@ -358,7 +358,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 172 0048 1A6B ldr r2, [r3, #48] 173 004a 42F00102 orr r2, r2, #1 174 004e 1A63 str r2, [r3, #48] - ARM GAS /tmp/ccEjAJiv.s page 7 + ARM GAS /tmp/ccR0YjlF.s page 7 100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); @@ -418,7 +418,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 213 .loc 1 114 5 is_stmt 1 view .LVU55 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - ARM GAS /tmp/ccEjAJiv.s page 8 + ARM GAS /tmp/ccR0YjlF.s page 8 214 .loc 1 114 25 is_stmt 0 view .LVU56 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 254 .LVL9: 255 .L10: 137:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccEjAJiv.s page 9 + ARM GAS /tmp/ccR0YjlF.s page 9 256 .loc 1 137 5 view .LVU71 @@ -538,7 +538,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 295 .loc 1 145 5 is_stmt 1 view .LVU87 146:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccEjAJiv.s page 10 + ARM GAS /tmp/ccR0YjlF.s page 10 296 .loc 1 146 5 view .LVU88 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 340 @ args = 0, pretend = 0, frame = 0 341 @ frame_needed = 0, uses_anonymous_args = 0 342 .loc 1 165 1 is_stmt 0 view .LVU94 - ARM GAS /tmp/ccEjAJiv.s page 11 + ARM GAS /tmp/ccR0YjlF.s page 11 343 0000 08B5 push {r3, lr} @@ -658,7 +658,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 201:Src/stm32f7xx_hal_msp.c **** { 202:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */ 203:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccEjAJiv.s page 12 + ARM GAS /tmp/ccR0YjlF.s page 12 204:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */ @@ -718,7 +718,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 387 .LVL20: 388 0036 EBE7 b .L13 389 .LVL21: - ARM GAS /tmp/ccEjAJiv.s page 13 + ARM GAS /tmp/ccR0YjlF.s page 13 390 .L18: @@ -778,7 +778,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 434 .cfi_def_cfa_offset 20 435 .cfi_offset 4, -20 436 .cfi_offset 5, -16 - ARM GAS /tmp/ccEjAJiv.s page 14 + ARM GAS /tmp/ccR0YjlF.s page 14 437 .cfi_offset 6, -12 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); 260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration 261:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0 - ARM GAS /tmp/ccEjAJiv.s page 15 + ARM GAS /tmp/ccR0YjlF.s page 15 262:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1 @@ -898,7 +898,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 489 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 490 .LVL29: 250:Src/stm32f7xx_hal_msp.c **** { - ARM GAS /tmp/ccEjAJiv.s page 16 + ARM GAS /tmp/ccR0YjlF.s page 16 491 .loc 1 250 8 discriminator 1 view .LVU127 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 530 005c 1A6B ldr r2, [r3, #48] 531 005e 42F00802 orr r2, r2, #8 532 0062 1A63 str r2, [r3, #48] - ARM GAS /tmp/ccEjAJiv.s page 17 + ARM GAS /tmp/ccR0YjlF.s page 17 259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 570 008c 0423 movs r3, #4 571 008e 2793 str r3, [sp, #156] 277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - ARM GAS /tmp/ccEjAJiv.s page 18 + ARM GAS /tmp/ccR0YjlF.s page 18 572 .loc 1 277 5 is_stmt 1 view .LVU160 @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 292:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization 293:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example 294:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer - ARM GAS /tmp/ccEjAJiv.s page 19 + ARM GAS /tmp/ccR0YjlF.s page 19 295:Src/stm32f7xx_hal_msp.c **** * @retval None @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 305:Src/stm32f7xx_hal_msp.c **** 640 .loc 1 305 5 is_stmt 1 view .LVU177 641 000c 084A ldr r2, .L33+4 - ARM GAS /tmp/ccEjAJiv.s page 20 + ARM GAS /tmp/ccR0YjlF.s page 20 642 000e 536C ldr r3, [r2, #68] @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 686 .cfi_def_cfa_offset 4 687 .cfi_offset 14, -4 688 0002 87B0 sub sp, sp, #28 - ARM GAS /tmp/ccEjAJiv.s page 21 + ARM GAS /tmp/ccR0YjlF.s page 21 689 .LCFI13: @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 370:Src/stm32f7xx_hal_msp.c **** } 371:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM10) 708 .loc 1 371 8 is_stmt 1 view .LVU191 - ARM GAS /tmp/ccEjAJiv.s page 22 + ARM GAS /tmp/ccR0YjlF.s page 22 709 .loc 1 371 10 is_stmt 0 view .LVU192 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 741 .LVL43: 394:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn); 742 .loc 1 394 5 is_stmt 1 view .LVU203 - ARM GAS /tmp/ccEjAJiv.s page 23 + ARM GAS /tmp/ccR0YjlF.s page 23 743 0042 1A20 movs r0, #26 @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 782 .loc 1 352 5 view .LVU214 783 0064 1D4B ldr r3, .L46+20 784 0066 5A6C ldr r2, [r3, #68] - ARM GAS /tmp/ccEjAJiv.s page 24 + ARM GAS /tmp/ccR0YjlF.s page 24 785 0068 42F00102 orr r2, r2, #1 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 827 .L45: 377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */ 828 .loc 1 377 5 view .LVU227 - ARM GAS /tmp/ccEjAJiv.s page 25 + ARM GAS /tmp/ccR0YjlF.s page 25 829 .LBB17: @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 877 .LVL55: 878 .LFB1189: 401:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccEjAJiv.s page 26 + ARM GAS /tmp/ccR0YjlF.s page 26 402:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 909 001a 9342 cmp r3, r2 910 001c 1AD0 beq .L54 426:Src/stm32f7xx_hal_msp.c **** { - ARM GAS /tmp/ccEjAJiv.s page 27 + ARM GAS /tmp/ccR0YjlF.s page 27 427:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 0 */ @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 923 @ sp needed 924 0026 5DF804FB ldr pc, [sp], #4 925 .LVL57: - ARM GAS /tmp/ccEjAJiv.s page 28 + ARM GAS /tmp/ccR0YjlF.s page 28 926 .L53: @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 964 .LVL59: 965 0052 E7E7 b .L48 966 .LVL60: - ARM GAS /tmp/ccEjAJiv.s page 29 + ARM GAS /tmp/ccR0YjlF.s page 29 967 .L54: @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 440:Src/stm32f7xx_hal_msp.c **** 1005 .loc 1 440 5 is_stmt 0 view .LVU280 1006 007e FFF7FEFF bl HAL_GPIO_Init - ARM GAS /tmp/ccEjAJiv.s page 30 + ARM GAS /tmp/ccR0YjlF.s page 30 1007 .LVL62: @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 1045 .loc 1 461 5 is_stmt 0 view .LVU296 1046 00aa FFF7FEFF bl HAL_GPIO_Init 1047 .LVL65: - ARM GAS /tmp/ccEjAJiv.s page 31 + ARM GAS /tmp/ccR0YjlF.s page 31 1048 .loc 1 468 1 view .LVU297 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 484:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */ 485:Src/stm32f7xx_hal_msp.c **** 486:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspDeInit 1 */ - ARM GAS /tmp/ccEjAJiv.s page 32 + ARM GAS /tmp/ccR0YjlF.s page 32 487:Src/stm32f7xx_hal_msp.c **** } @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 526:Src/stm32f7xx_hal_msp.c **** } 527:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM11) 1104 .loc 1 527 8 is_stmt 1 view .LVU309 - ARM GAS /tmp/ccEjAJiv.s page 33 + ARM GAS /tmp/ccR0YjlF.s page 33 1105 .loc 1 527 10 is_stmt 0 view .LVU310 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 505:Src/stm32f7xx_hal_msp.c **** 1142 .loc 1 505 5 view .LVU318 1143 0052 02F59A32 add r2, r2, #78848 - ARM GAS /tmp/ccEjAJiv.s page 34 + ARM GAS /tmp/ccR0YjlF.s page 34 1144 0056 536C ldr r3, [r2, #68] @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 549:Src/stm32f7xx_hal_msp.c **** */ 550:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) 551:Src/stm32f7xx_hal_msp.c **** { - ARM GAS /tmp/ccEjAJiv.s page 35 + ARM GAS /tmp/ccR0YjlF.s page 35 1189 .loc 1 551 1 is_stmt 1 view -0 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 568:Src/stm32f7xx_hal_msp.c **** 569:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */ 570:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_UART8_CLK_ENABLE(); - ARM GAS /tmp/ccEjAJiv.s page 36 + ARM GAS /tmp/ccR0YjlF.s page 36 571:Src/stm32f7xx_hal_msp.c **** @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 1253 .loc 1 570 5 view .LVU342 570:Src/stm32f7xx_hal_msp.c **** 1254 .loc 1 570 5 view .LVU343 - ARM GAS /tmp/ccEjAJiv.s page 37 + ARM GAS /tmp/ccR0YjlF.s page 37 1255 0034 124B ldr r3, .L77+4 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8; 1294 .loc 1 580 5 is_stmt 1 view .LVU359 580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8; - ARM GAS /tmp/ccEjAJiv.s page 38 + ARM GAS /tmp/ccR0YjlF.s page 38 1295 .loc 1 580 27 is_stmt 0 view .LVU360 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 1338 .LCFI25: 1339 .cfi_def_cfa_offset 8 1340 .cfi_offset 3, -8 - ARM GAS /tmp/ccEjAJiv.s page 39 + ARM GAS /tmp/ccR0YjlF.s page 39 1341 .cfi_offset 14, -4 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccEjAJiv.s page 1 1372 0020 007C0040 .word 1073773568 1373 0024 00380240 .word 1073887232 1374 0028 00100240 .word 1073876992 - ARM GAS /tmp/ccEjAJiv.s page 40 + ARM GAS /tmp/ccR0YjlF.s page 40 1375 .cfi_endproc @@ -2363,41 +2363,41 @@ ARM GAS /tmp/ccEjAJiv.s page 1 1395 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h" 1396 .file 18 "Inc/main.h" 1397 .file 19 "" - ARM GAS /tmp/ccEjAJiv.s page 41 + ARM GAS /tmp/ccR0YjlF.s page 41 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_msp.c - /tmp/ccEjAJiv.s:20 .text.HAL_MspInit:00000000 $t - /tmp/ccEjAJiv.s:26 .text.HAL_MspInit:00000000 HAL_MspInit - /tmp/ccEjAJiv.s:76 .text.HAL_MspInit:0000002c $d - /tmp/ccEjAJiv.s:81 .text.HAL_ADC_MspInit:00000000 $t - /tmp/ccEjAJiv.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit - /tmp/ccEjAJiv.s:318 .text.HAL_ADC_MspInit:000000f4 $d - /tmp/ccEjAJiv.s:329 .text.HAL_ADC_MspDeInit:00000000 $t - /tmp/ccEjAJiv.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit - /tmp/ccEjAJiv.s:408 .text.HAL_ADC_MspDeInit:00000050 $d - /tmp/ccEjAJiv.s:418 .text.HAL_SD_MspInit:00000000 $t - /tmp/ccEjAJiv.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit - /tmp/ccEjAJiv.s:600 .text.HAL_SD_MspInit:000000a8 $d - /tmp/ccEjAJiv.s:608 .text.HAL_SD_MspDeInit:00000000 $t - /tmp/ccEjAJiv.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit - /tmp/ccEjAJiv.s:662 .text.HAL_SD_MspDeInit:0000002c $d - /tmp/ccEjAJiv.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t - /tmp/ccEjAJiv.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit - /tmp/ccEjAJiv.s:860 .text.HAL_TIM_Base_MspInit:000000c8 $d - /tmp/ccEjAJiv.s:870 .text.HAL_TIM_MspPostInit:00000000 $t - /tmp/ccEjAJiv.s:876 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit - /tmp/ccEjAJiv.s:1053 .text.HAL_TIM_MspPostInit:000000b0 $d - /tmp/ccEjAJiv.s:1063 .text.HAL_TIM_Base_MspDeInit:00000000 $t - /tmp/ccEjAJiv.s:1069 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit - /tmp/ccEjAJiv.s:1171 .text.HAL_TIM_Base_MspDeInit:0000007c $d - /tmp/ccEjAJiv.s:1180 .text.HAL_UART_MspInit:00000000 $t - /tmp/ccEjAJiv.s:1186 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit - /tmp/ccEjAJiv.s:1316 .text.HAL_UART_MspInit:0000007c $d - /tmp/ccEjAJiv.s:1323 .text.HAL_UART_MspDeInit:00000000 $t - /tmp/ccEjAJiv.s:1329 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit - /tmp/ccEjAJiv.s:1372 .text.HAL_UART_MspDeInit:00000020 $d + /tmp/ccR0YjlF.s:20 .text.HAL_MspInit:00000000 $t + /tmp/ccR0YjlF.s:26 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccR0YjlF.s:76 .text.HAL_MspInit:0000002c $d + /tmp/ccR0YjlF.s:81 .text.HAL_ADC_MspInit:00000000 $t + /tmp/ccR0YjlF.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/ccR0YjlF.s:318 .text.HAL_ADC_MspInit:000000f4 $d + /tmp/ccR0YjlF.s:329 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/ccR0YjlF.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/ccR0YjlF.s:408 .text.HAL_ADC_MspDeInit:00000050 $d + /tmp/ccR0YjlF.s:418 .text.HAL_SD_MspInit:00000000 $t + /tmp/ccR0YjlF.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit + /tmp/ccR0YjlF.s:600 .text.HAL_SD_MspInit:000000a8 $d + /tmp/ccR0YjlF.s:608 .text.HAL_SD_MspDeInit:00000000 $t + /tmp/ccR0YjlF.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit + /tmp/ccR0YjlF.s:662 .text.HAL_SD_MspDeInit:0000002c $d + /tmp/ccR0YjlF.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/ccR0YjlF.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/ccR0YjlF.s:860 .text.HAL_TIM_Base_MspInit:000000c8 $d + /tmp/ccR0YjlF.s:870 .text.HAL_TIM_MspPostInit:00000000 $t + /tmp/ccR0YjlF.s:876 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit + /tmp/ccR0YjlF.s:1053 .text.HAL_TIM_MspPostInit:000000b0 $d + /tmp/ccR0YjlF.s:1063 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/ccR0YjlF.s:1069 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/ccR0YjlF.s:1171 .text.HAL_TIM_Base_MspDeInit:0000007c $d + /tmp/ccR0YjlF.s:1180 .text.HAL_UART_MspInit:00000000 $t + /tmp/ccR0YjlF.s:1186 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit + /tmp/ccR0YjlF.s:1316 .text.HAL_UART_MspInit:0000007c $d + /tmp/ccR0YjlF.s:1323 .text.HAL_UART_MspDeInit:00000000 $t + /tmp/ccR0YjlF.s:1329 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit + /tmp/ccR0YjlF.s:1372 .text.HAL_UART_MspDeInit:00000020 $d UNDEFINED SYMBOLS HAL_GPIO_Init diff --git a/build/stm32f7xx_it.lst b/build/stm32f7xx_it.lst index d045abb..2e67398 100644 --- a/build/stm32f7xx_it.lst +++ b/build/stm32f7xx_it.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cczi2eQD.s page 1 +ARM GAS /tmp/ccqZqdXP.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 29:Src/stm32f7xx_it.c **** 30:Src/stm32f7xx_it.c **** /* USER CODE END TD */ 31:Src/stm32f7xx_it.c **** - ARM GAS /tmp/cczi2eQD.s page 2 + ARM GAS /tmp/ccqZqdXP.s page 2 32:Src/stm32f7xx_it.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 33 @ link register save eliminated. 34 .L2: 81:Src/stm32f7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ - ARM GAS /tmp/cczi2eQD.s page 3 + ARM GAS /tmp/ccqZqdXP.s page 3 82:Src/stm32f7xx_it.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 68 .syntax unified 69 .thumb 70 .thumb_func - ARM GAS /tmp/cczi2eQD.s page 4 + ARM GAS /tmp/ccqZqdXP.s page 4 72 MemManage_Handler: @@ -238,7 +238,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 127:Src/stm32f7xx_it.c **** 128:Src/stm32f7xx_it.c **** /* USER CODE END BusFault_IRQn 0 */ 129:Src/stm32f7xx_it.c **** while (1) - ARM GAS /tmp/cczi2eQD.s page 5 + ARM GAS /tmp/ccqZqdXP.s page 5 104 .loc 1 129 3 view .LVU13 @@ -298,7 +298,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 141 SVC_Handler: 142 .LFB1188: 149:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/cczi2eQD.s page 6 + ARM GAS /tmp/ccqZqdXP.s page 6 150:Src/stm32f7xx_it.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 174 .global PendSV_Handler 175 .syntax unified 176 .thumb - ARM GAS /tmp/cczi2eQD.s page 7 + ARM GAS /tmp/ccqZqdXP.s page 7 177 .thumb_func @@ -418,7 +418,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 211 .LVL0: 199:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ 200:Src/stm32f7xx_it.c **** - ARM GAS /tmp/cczi2eQD.s page 8 + ARM GAS /tmp/ccqZqdXP.s page 8 201:Src/stm32f7xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ @@ -478,7 +478,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 244 000e 08BD pop {r3, pc} 245 .L19: 246 .align 2 - ARM GAS /tmp/cczi2eQD.s page 9 + ARM GAS /tmp/ccqZqdXP.s page 9 247 .L18: @@ -538,7 +538,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 239:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */ 240:Src/stm32f7xx_it.c **** 241:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_UP_TIM10_IRQn 1 */ - ARM GAS /tmp/cczi2eQD.s page 10 + ARM GAS /tmp/ccqZqdXP.s page 10 242:Src/stm32f7xx_it.c **** } @@ -598,7 +598,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 333 .loc 1 251 2 is_stmt 1 view .LVU47 334 .loc 1 251 7 is_stmt 0 view .LVU48 335 000c 0749 ldr r1, .L28+4 - ARM GAS /tmp/cczi2eQD.s page 11 + ARM GAS /tmp/ccqZqdXP.s page 11 336 000e 0A68 ldr r2, [r1] @@ -658,7 +658,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 269:Src/stm32f7xx_it.c **** 270:Src/stm32f7xx_it.c **** /* USER CODE END TIM2_IRQn 1 */ 271:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/cczi2eQD.s page 12 + ARM GAS /tmp/ccqZqdXP.s page 12 375 .loc 1 271 1 view .LVU56 @@ -718,7 +718,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 314:Src/stm32f7xx_it.c **** //UART_transmission_busy = 0; 315:Src/stm32f7xx_it.c **** } 316:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/cczi2eQD.s page 13 + ARM GAS /tmp/ccqZqdXP.s page 13 317:Src/stm32f7xx_it.c **** } @@ -778,7 +778,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 411 .LVL5: 349:Src/stm32f7xx_it.c **** HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_RESET); 412 .loc 1 349 4 view .LVU62 - ARM GAS /tmp/cczi2eQD.s page 14 + ARM GAS /tmp/ccqZqdXP.s page 14 413 0016 0C4C ldr r4, .L36 @@ -838,7 +838,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 452 .L36: 453 0048 00000000 .word LD_blinker 454 004c 00000000 .word htim8 - ARM GAS /tmp/cczi2eQD.s page 15 + ARM GAS /tmp/ccqZqdXP.s page 15 455 .cfi_endproc @@ -898,7 +898,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 494 .cfi_offset 14, -4 379:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM6_DAC_IRQn 0 */ 380:Src/stm32f7xx_it.c **** - ARM GAS /tmp/cczi2eQD.s page 16 + ARM GAS /tmp/ccqZqdXP.s page 16 381:Src/stm32f7xx_it.c **** /* USER CODE END TIM6_DAC_IRQn 0 */ @@ -958,7 +958,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 0: TIMx_CH1 */ 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 1: TIMx_CH1N */ 49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 2: TIMx_CH2 */ - ARM GAS /tmp/cczi2eQD.s page 17 + ARM GAS /tmp/ccqZqdXP.s page 17 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 3: TIMx_CH2N */ @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 5U, /* 5: OIS3N */ 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 6: OIS4 */ 106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 7: OIS5 */ - ARM GAS /tmp/cczi2eQD.s page 18 + ARM GAS /tmp/ccqZqdXP.s page 18 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 10U /* 8: OIS6 */ @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/cczi2eQD.s page 19 + ARM GAS /tmp/ccqZqdXP.s page 19 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Auto-Reload Register at the next update event. 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter must be a number between Min_Data=0x0000 and Max_ 220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Some timer instances may support 32 bits counters. In that case - ARM GAS /tmp/cczi2eQD.s page 20 + ARM GAS /tmp/ccqZqdXP.s page 20 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** be a number between 0x0000 and 0xFFFFFFFF. @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCPolarity; /*!< Specifies the output polarity. 277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. - ARM GAS /tmp/cczi2eQD.s page 21 + ARM GAS /tmp/ccqZqdXP.s page 21 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_IC_InitTypeDef; 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/cczi2eQD.s page 22 + ARM GAS /tmp/ccqZqdXP.s page 22 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function - ARM GAS /tmp/cczi2eQD.s page 23 + ARM GAS /tmp/ccqZqdXP.s page 23 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/ @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state. 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSI 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/cczi2eQD.s page 24 + ARM GAS /tmp/ccqZqdXP.s page 24 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ - ARM GAS /tmp/cczi2eQD.s page 25 + ARM GAS /tmp/ccqZqdXP.s page 25 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapt 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapt 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapt - ARM GAS /tmp/cczi2eQD.s page 26 + ARM GAS /tmp/ccqZqdXP.s page 26 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapt @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /*!< Counter overflow/underflow 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/unde 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/cczi2eQD.s page 27 + ARM GAS /tmp/ccqZqdXP.s page 27 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when 676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when - ARM GAS /tmp/cczi2eQD.s page 28 + ARM GAS /tmp/ccqZqdXP.s page 28 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FROZEN 0x00000000U 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 - ARM GAS /tmp/cczi2eQD.s page 29 + ARM GAS /tmp/ccqZqdXP.s page 29 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler 789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/cczi2eQD.s page 30 + ARM GAS /tmp/ccqZqdXP.s page 30 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV1 0x00000000U /*!< No prescaler, ca @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X2_TI1 TIM_SMCR_SMS_0 846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X2_TI2 TIM_SMCR_SMS_1 847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X4_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) - ARM GAS /tmp/cczi2eQD.s page 31 + ARM GAS /tmp/ccqZqdXP.s page 31 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TS Trigger Selection 903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/cczi2eQD.s page 32 + ARM GAS /tmp/ccqZqdXP.s page 32 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR0 0x00000000U @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_POLARITY break polarity - ARM GAS /tmp/cczi2eQD.s page 33 + ARM GAS /tmp/ccqZqdXP.s page 33 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV16_N6 0x00B00000U /*!< fSAMPLING=fDTS/16, N=6 */ 1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV16_N8 0x00C00000U /*!< fSAMPLING=fDTS/16, N=8 */ 1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N5 0x00D00000U /*!< fSAMPLING=fDTS/32, N=5 */ - ARM GAS /tmp/cczi2eQD.s page 34 + ARM GAS /tmp/ccqZqdXP.s page 34 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N6 0x00E00000U /*!< fSAMPLING=fDTS/32, N=6 */ @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR1 0x00000000U - ARM GAS /tmp/cczi2eQD.s page 35 + ARM GAS /tmp/ccqZqdXP.s page 35 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TIM2_ITR1_RMP_TIM8 TIM2 Internal Trigger1 Remap TIM8 1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ - ARM GAS /tmp/cczi2eQD.s page 36 + ARM GAS /tmp/ccqZqdXP.s page 36 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Read a value in TIM register. 1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance 1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __REG__ Register to be read - ARM GAS /tmp/cczi2eQD.s page 37 + ARM GAS /tmp/ccqZqdXP.s page 37 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Register value @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required output signal fr 1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000); 1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) - ARM GAS /tmp/cczi2eQD.s page 38 + ARM GAS /tmp/ccqZqdXP.s page 38 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/cczi2eQD.s page 39 + ARM GAS /tmp/ccqZqdXP.s page 39 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UDIS); 1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/cczi2eQD.s page 40 + ARM GAS /tmp/ccqZqdXP.s page 40 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) 1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/cczi2eQD.s page 41 + ARM GAS /tmp/ccqZqdXP.s page 41 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) 1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/cczi2eQD.s page 42 + ARM GAS /tmp/ccqZqdXP.s page 42 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t counter_mode; @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 - ARM GAS /tmp/cczi2eQD.s page 43 + ARM GAS /tmp/ccqZqdXP.s page 43 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/cczi2eQD.s page 44 + ARM GAS /tmp/ccqZqdXP.s page 44 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/cczi2eQD.s page 45 + ARM GAS /tmp/ccqZqdXP.s page 45 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx) 1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); - ARM GAS /tmp/cczi2eQD.s page 46 + ARM GAS /tmp/ccqZqdXP.s page 46 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) 1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); - ARM GAS /tmp/cczi2eQD.s page 47 + ARM GAS /tmp/ccqZqdXP.s page 47 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1 1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2 1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3 - ARM GAS /tmp/cczi2eQD.s page 48 + ARM GAS /tmp/ccqZqdXP.s page 48 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/cczi2eQD.s page 49 + ARM GAS /tmp/ccqZqdXP.s page 49 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n 1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n 1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_ConfigOutput\n - ARM GAS /tmp/cczi2eQD.s page 50 + ARM GAS /tmp/ccqZqdXP.s page 50 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_ConfigOutput\n @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE 1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 - ARM GAS /tmp/cczi2eQD.s page 51 + ARM GAS /tmp/ccqZqdXP.s page 51 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of an output channel. 2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n - ARM GAS /tmp/cczi2eQD.s page 52 + ARM GAS /tmp/ccqZqdXP.s page 52 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW 2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) - ARM GAS /tmp/cczi2eQD.s page 53 + ARM GAS /tmp/ccqZqdXP.s page 53 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N - ARM GAS /tmp/cczi2eQD.s page 54 + ARM GAS /tmp/ccqZqdXP.s page 54 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/cczi2eQD.s page 55 + ARM GAS /tmp/ccqZqdXP.s page 55 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/cczi2eQD.s page 56 + ARM GAS /tmp/ccqZqdXP.s page 56 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/cczi2eQD.s page 57 + ARM GAS /tmp/ccqZqdXP.s page 57 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/cczi2eQD.s page 58 + ARM GAS /tmp/ccqZqdXP.s page 58 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/cczi2eQD.s page 59 + ARM GAS /tmp/ccqZqdXP.s page 59 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/cczi2eQD.s page 60 + ARM GAS /tmp/ccqZqdXP.s page 60 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 5 (TIMx_CCR5). @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); - ARM GAS /tmp/cczi2eQD.s page 61 + ARM GAS /tmp/ccqZqdXP.s page 61 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/cczi2eQD.s page 62 + ARM GAS /tmp/ccqZqdXP.s page 62 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR6)); @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/cczi2eQD.s page 63 + ARM GAS /tmp/ccqZqdXP.s page 63 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/cczi2eQD.s page 64 + ARM GAS /tmp/ccqZqdXP.s page 64 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/cczi2eQD.s page 65 + ARM GAS /tmp/ccqZqdXP.s page 65 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 - ARM GAS /tmp/cczi2eQD.s page 66 + ARM GAS /tmp/ccqZqdXP.s page 66 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 @@ -3958,7 +3958,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n 2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n - ARM GAS /tmp/cczi2eQD.s page 67 + ARM GAS /tmp/ccqZqdXP.s page 67 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n @@ -4018,7 +4018,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/cczi2eQD.s page 68 + ARM GAS /tmp/ccqZqdXP.s page 68 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) @@ -4078,7 +4078,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4. 3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check - ARM GAS /tmp/cczi2eQD.s page 69 + ARM GAS /tmp/ccqZqdXP.s page 69 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. @@ -4138,7 +4138,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) 3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); - ARM GAS /tmp/cczi2eQD.s page 70 + ARM GAS /tmp/ccqZqdXP.s page 70 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -4198,7 +4198,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput 3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values: - ARM GAS /tmp/cczi2eQD.s page 71 + ARM GAS /tmp/ccqZqdXP.s page 71 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_RESET @@ -4258,7 +4258,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED 3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER 3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER - ARM GAS /tmp/cczi2eQD.s page 72 + ARM GAS /tmp/ccqZqdXP.s page 72 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -4318,7 +4318,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. - ARM GAS /tmp/cczi2eQD.s page 73 + ARM GAS /tmp/ccqZqdXP.s page 73 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not @@ -4378,7 +4378,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration - ARM GAS /tmp/cczi2eQD.s page 74 + ARM GAS /tmp/ccqZqdXP.s page 74 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -4438,7 +4438,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/cczi2eQD.s page 75 + ARM GAS /tmp/ccqZqdXP.s page 75 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, @@ -4498,7 +4498,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5 - ARM GAS /tmp/cczi2eQD.s page 76 + ARM GAS /tmp/ccqZqdXP.s page 76 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. - ARM GAS /tmp/cczi2eQD.s page 77 + ARM GAS /tmp/ccqZqdXP.s page 77 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not @@ -4618,7 +4618,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input. - ARM GAS /tmp/cczi2eQD.s page 78 + ARM GAS /tmp/ccqZqdXP.s page 78 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether @@ -4678,7 +4678,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: - ARM GAS /tmp/cczi2eQD.s page 79 + ARM GAS /tmp/ccqZqdXP.s page 79 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN @@ -4738,7 +4738,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS - ARM GAS /tmp/cczi2eQD.s page 80 + ARM GAS /tmp/ccqZqdXP.s page 80 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS @@ -4798,7 +4798,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE - ARM GAS /tmp/cczi2eQD.s page 81 + ARM GAS /tmp/ccqZqdXP.s page 81 3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC @@ -4858,7 +4858,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 511 .LBE59: 512 .LBE58: 384:Src/stm32f7xx_it.c **** { - ARM GAS /tmp/cczi2eQD.s page 82 + ARM GAS /tmp/ccqZqdXP.s page 82 385:Src/stm32f7xx_it.c **** LL_TIM_ClearFlag_UPDATE(TIM6); @@ -4918,7 +4918,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 393:Src/stm32f7xx_it.c **** 394:Src/stm32f7xx_it.c **** /** 395:Src/stm32f7xx_it.c **** * @brief This function handles TIM7 global interrupt. - ARM GAS /tmp/cczi2eQD.s page 83 + ARM GAS /tmp/ccqZqdXP.s page 83 396:Src/stm32f7xx_it.c **** */ @@ -4978,7 +4978,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 597 0016 0133 adds r3, r3, #1 598 0018 1360 str r3, [r2] 599 .L44: - ARM GAS /tmp/cczi2eQD.s page 84 + ARM GAS /tmp/ccqZqdXP.s page 84 407:Src/stm32f7xx_it.c **** //1 ms or 1000 Hz @@ -5038,7 +5038,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 626 .cfi_def_cfa_offset 4 627 .cfi_offset 4, -4 437:Src/stm32f7xx_it.c **** uart_buf = LL_USART_ReceiveData8(USART1); - ARM GAS /tmp/cczi2eQD.s page 85 + ARM GAS /tmp/ccqZqdXP.s page 85 628 .loc 1 437 5 view .LVU105 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private macros ------------------------------------------------------------*/ 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER) - ARM GAS /tmp/cczi2eQD.s page 86 + ARM GAS /tmp/ccqZqdXP.s page 86 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Private_Macros USART Private Macros @@ -5158,7 +5158,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8. 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_OVERSA - ARM GAS /tmp/cczi2eQD.s page 87 + ARM GAS /tmp/ccqZqdXP.s page 87 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5218,7 +5218,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error cle - ARM GAS /tmp/cczi2eQD.s page 88 + ARM GAS /tmp/ccqZqdXP.s page 88 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error cl @@ -5278,7 +5278,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission com 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ - ARM GAS /tmp/cczi2eQD.s page 89 + ARM GAS /tmp/ccqZqdXP.s page 89 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5338,7 +5338,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute - ARM GAS /tmp/cczi2eQD.s page 90 + ARM GAS /tmp/ccqZqdXP.s page 90 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5398,7 +5398,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK - ARM GAS /tmp/cczi2eQD.s page 91 + ARM GAS /tmp/ccqZqdXP.s page 91 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCL @@ -5458,7 +5458,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/rece 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/rece - ARM GAS /tmp/cczi2eQD.s page 92 + ARM GAS /tmp/ccqZqdXP.s page 92 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5518,7 +5518,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 93 + ARM GAS /tmp/ccqZqdXP.s page 93 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5578,7 +5578,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Register value 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) - ARM GAS /tmp/cczi2eQD.s page 94 + ARM GAS /tmp/ccqZqdXP.s page 94 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5638,7 +5638,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/cczi2eQD.s page 95 + ARM GAS /tmp/ccqZqdXP.s page 95 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Disable (all USART prescalers and outputs are disabled) @@ -5698,7 +5698,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/cczi2eQD.s page 96 + ARM GAS /tmp/ccqZqdXP.s page 96 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -5758,7 +5758,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE); - ARM GAS /tmp/cczi2eQD.s page 97 + ARM GAS /tmp/ccqZqdXP.s page 97 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -5818,7 +5818,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return enabled/disabled states of Transmitter and Receiver 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RE LL_USART_GetTransferDirection\n 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 TE LL_USART_GetTransferDirection - ARM GAS /tmp/cczi2eQD.s page 98 + ARM GAS /tmp/ccqZqdXP.s page 98 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -5878,7 +5878,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method) 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/cczi2eQD.s page 99 + ARM GAS /tmp/ccqZqdXP.s page 99 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method); @@ -5938,7 +5938,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME); 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/cczi2eQD.s page 100 + ARM GAS /tmp/ccqZqdXP.s page 100 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5998,7 +5998,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LastBitClockPulse This parameter can be one of the following values: - ARM GAS /tmp/cczi2eQD.s page 101 + ARM GAS /tmp/ccqZqdXP.s page 101 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT @@ -6058,7 +6058,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/cczi2eQD.s page 102 + ARM GAS /tmp/ccqZqdXP.s page 102 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode @@ -6118,7 +6118,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCP 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/cczi2eQD.s page 103 + ARM GAS /tmp/ccqZqdXP.s page 103 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -6178,7 +6178,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/cczi2eQD.s page 104 + ARM GAS /tmp/ccqZqdXP.s page 104 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve the length of the stop bits @@ -6238,7 +6238,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_SWAPPED 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 105 + ARM GAS /tmp/ccqZqdXP.s page 105 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig) @@ -6298,7 +6298,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod) 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod); - ARM GAS /tmp/cczi2eQD.s page 106 + ARM GAS /tmp/ccqZqdXP.s page 106 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -6358,7 +6358,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder) 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/cczi2eQD.s page 107 + ARM GAS /tmp/ccqZqdXP.s page 107 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder); @@ -6418,7 +6418,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL); 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/cczi2eQD.s page 108 + ARM GAS /tmp/ccqZqdXP.s page 108 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -6478,7 +6478,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN); 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/cczi2eQD.s page 109 + ARM GAS /tmp/ccqZqdXP.s page 109 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -6538,7 +6538,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) - ARM GAS /tmp/cczi2eQD.s page 110 + ARM GAS /tmp/ccqZqdXP.s page 110 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen @@ -6598,7 +6598,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/cczi2eQD.s page 111 + ARM GAS /tmp/ccqZqdXP.s page 111 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -6658,7 +6658,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable One bit sampling method 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp - ARM GAS /tmp/cczi2eQD.s page 112 + ARM GAS /tmp/ccqZqdXP.s page 112 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -6718,7 +6718,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/cczi2eQD.s page 113 + ARM GAS /tmp/ccqZqdXP.s page 113 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -6778,7 +6778,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (OverSampling == LL_USART_OVERSAMPLING_8) 1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate)); - ARM GAS /tmp/cczi2eQD.s page 114 + ARM GAS /tmp/ccqZqdXP.s page 114 1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U; @@ -6838,7 +6838,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR RTO LL_USART_SetRxTimeout 1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF - ARM GAS /tmp/cczi2eQD.s page 115 + ARM GAS /tmp/ccqZqdXP.s page 115 1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -6898,7 +6898,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 116 + ARM GAS /tmp/ccqZqdXP.s page 116 1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx) @@ -6958,7 +6958,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_NORMAL 1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE 1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 117 + ARM GAS /tmp/ccqZqdXP.s page 117 1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx) @@ -7018,7 +7018,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard NACK transmission - ARM GAS /tmp/cczi2eQD.s page 118 + ARM GAS /tmp/ccqZqdXP.s page 118 1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -7078,7 +7078,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard 1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/cczi2eQD.s page 119 + ARM GAS /tmp/ccqZqdXP.s page 119 1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -7138,7 +7138,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Smartcard prescaler value, used for dividing the USART clock 1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * source to provide the SMARTCARD Clock (5 bits value) 1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/cczi2eQD.s page 120 + ARM GAS /tmp/ccqZqdXP.s page 120 1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. @@ -7198,7 +7198,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx) 2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/cczi2eQD.s page 121 + ARM GAS /tmp/ccqZqdXP.s page 121 2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL); @@ -7258,7 +7258,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return LIN Break Detection Length 2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. - ARM GAS /tmp/cczi2eQD.s page 122 + ARM GAS /tmp/ccqZqdXP.s page 122 2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen @@ -7318,7 +7318,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature 2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 123 + ARM GAS /tmp/ccqZqdXP.s page 123 2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -7378,7 +7378,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Driver Enable (DE) Mode - ARM GAS /tmp/cczi2eQD.s page 124 + ARM GAS /tmp/ccqZqdXP.s page 124 2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not @@ -7438,7 +7438,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Driver Enable Polarity 2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. - ARM GAS /tmp/cczi2eQD.s page 125 + ARM GAS /tmp/ccqZqdXP.s page 125 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity @@ -7498,7 +7498,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Synchronous Mode 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Synchronous mode, the following bits must be kept cleared: - ARM GAS /tmp/cczi2eQD.s page 126 + ARM GAS /tmp/ccqZqdXP.s page 126 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, @@ -7558,7 +7558,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n - ARM GAS /tmp/cczi2eQD.s page 127 + ARM GAS /tmp/ccqZqdXP.s page 127 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigLINMode\n @@ -7618,7 +7618,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Half Duplex mode */ 2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL); - ARM GAS /tmp/cczi2eQD.s page 128 + ARM GAS /tmp/ccqZqdXP.s page 128 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -7678,7 +7678,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : - ARM GAS /tmp/cczi2eQD.s page 129 + ARM GAS /tmp/ccqZqdXP.s page 129 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function @@ -7738,7 +7738,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 130 + ARM GAS /tmp/ccqZqdXP.s page 130 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx) @@ -7798,7 +7798,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 131 + ARM GAS /tmp/ccqZqdXP.s page 131 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx) @@ -7858,7 +7858,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/cczi2eQD.s page 132 + ARM GAS /tmp/ccqZqdXP.s page 132 2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx) @@ -7918,7 +7918,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Error Flag is set or not - ARM GAS /tmp/cczi2eQD.s page 133 + ARM GAS /tmp/ccqZqdXP.s page 133 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or @@ -7978,7 +7978,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL); 2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/cczi2eQD.s page 134 + ARM GAS /tmp/ccqZqdXP.s page 134 2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -8038,7 +8038,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not 2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT - ARM GAS /tmp/cczi2eQD.s page 135 + ARM GAS /tmp/ccqZqdXP.s page 135 2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8098,7 +8098,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear IDLE line detected Flag 2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE 2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/cczi2eQD.s page 136 + ARM GAS /tmp/ccqZqdXP.s page 136 2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -8158,7 +8158,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CTSCF); 2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/cczi2eQD.s page 137 + ARM GAS /tmp/ccqZqdXP.s page 137 2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8218,7 +8218,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/cczi2eQD.s page 138 + ARM GAS /tmp/ccqZqdXP.s page 138 3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_IT_Management IT_Management @@ -8278,7 +8278,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) 3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE); - ARM GAS /tmp/cczi2eQD.s page 139 + ARM GAS /tmp/ccqZqdXP.s page 139 3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -8338,7 +8338,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 0: Interrupt is inhibited 3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. 3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR - ARM GAS /tmp/cczi2eQD.s page 140 + ARM GAS /tmp/ccqZqdXP.s page 140 3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8398,7 +8398,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable IDLE Interrupt 3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE - ARM GAS /tmp/cczi2eQD.s page 141 + ARM GAS /tmp/ccqZqdXP.s page 141 3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8458,7 +8458,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_DisableIT_CM 3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/cczi2eQD.s page 142 + ARM GAS /tmp/ccqZqdXP.s page 142 3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -8518,7 +8518,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); 3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/cczi2eQD.s page 143 + ARM GAS /tmp/ccqZqdXP.s page 143 3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8578,7 +8578,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); 3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/cczi2eQD.s page 144 + ARM GAS /tmp/ccqZqdXP.s page 144 3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8638,7 +8638,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/cczi2eQD.s page 145 + ARM GAS /tmp/ccqZqdXP.s page 145 3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled. @@ -8698,7 +8698,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx) 3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/cczi2eQD.s page 146 + ARM GAS /tmp/ccqZqdXP.s page 146 3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); @@ -8758,7 +8758,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable DMA Mode for reception - ARM GAS /tmp/cczi2eQD.s page 147 + ARM GAS /tmp/ccqZqdXP.s page 147 3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX @@ -8818,7 +8818,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Disabling on Reception Error 3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr 3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/cczi2eQD.s page 148 + ARM GAS /tmp/ccqZqdXP.s page 148 3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -8878,7 +8878,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return data_reg_addr; 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/cczi2eQD.s page 149 + ARM GAS /tmp/ccqZqdXP.s page 149 3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -8902,7 +8902,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU); 635 .loc 3 3660 3 view .LVU107 636 .loc 3 3660 20 is_stmt 0 view .LVU108 - 637 0002 994B ldr r3, .L100 + 637 0002 9D4B ldr r3, .L106 638 0004 5A6A ldr r2, [r3, #36] 639 .loc 3 3660 10 view .LVU109 640 0006 D2B2 uxtb r2, r2 @@ -8911,51 +8911,51 @@ ARM GAS /tmp/cczi2eQD.s page 1 643 .LBE67: 644 .LBE66: 645 .loc 1 437 14 discriminator 1 view .LVU111 - 646 0008 984B ldr r3, .L100+4 + 646 0008 9C4B ldr r3, .L106+4 647 000a 1A70 strb r2, [r3] 438:Src/stm32f7xx_it.c **** switch (UART_rec_incr) 648 .loc 1 438 5 is_stmt 1 view .LVU112 - 649 000c 984B ldr r3, .L100+8 + 649 000c 9C4B ldr r3, .L106+8 650 000e 1B88 ldrh r3, [r3] 651 0010 1F2B cmp r3, #31 - 652 0012 00F2B381 bhi .L49 + 652 0012 00F2DC81 bhi .L49 653 0016 DFE813F0 tbh [pc, r3, lsl #1] 654 .L51: 655 001a 2000 .2byte (.L55-.L51)/2 656 001c 2F00 .2byte (.L54-.L51)/2 - 657 001e B101 .2byte (.L49-.L51)/2 - 658 0020 B101 .2byte (.L49-.L51)/2 - 659 0022 B101 .2byte (.L49-.L51)/2 - 660 0024 B101 .2byte (.L49-.L51)/2 - 661 0026 B101 .2byte (.L49-.L51)/2 - 662 0028 B101 .2byte (.L49-.L51)/2 - 663 002a B101 .2byte (.L49-.L51)/2 - 664 002c AF00 .2byte (.L53-.L51)/2 - 665 002e B101 .2byte (.L49-.L51)/2 - 666 0030 B101 .2byte (.L49-.L51)/2 - 667 0032 B101 .2byte (.L49-.L51)/2 - 668 0034 B101 .2byte (.L49-.L51)/2 - 669 0036 B101 .2byte (.L49-.L51)/2 - 670 0038 B101 .2byte (.L49-.L51)/2 - 671 003a B101 .2byte (.L49-.L51)/2 - ARM GAS /tmp/cczi2eQD.s page 150 + 657 001e DA01 .2byte (.L49-.L51)/2 + 658 0020 DA01 .2byte (.L49-.L51)/2 + 659 0022 DA01 .2byte (.L49-.L51)/2 + 660 0024 DA01 .2byte (.L49-.L51)/2 + 661 0026 DA01 .2byte (.L49-.L51)/2 + 662 0028 DA01 .2byte (.L49-.L51)/2 + 663 002a DA01 .2byte (.L49-.L51)/2 + 664 002c B700 .2byte (.L53-.L51)/2 + 665 002e DA01 .2byte (.L49-.L51)/2 + 666 0030 DA01 .2byte (.L49-.L51)/2 + 667 0032 DA01 .2byte (.L49-.L51)/2 + 668 0034 DA01 .2byte (.L49-.L51)/2 + 669 0036 DA01 .2byte (.L49-.L51)/2 + 670 0038 DA01 .2byte (.L49-.L51)/2 + 671 003a DA01 .2byte (.L49-.L51)/2 + ARM GAS /tmp/ccqZqdXP.s page 150 - 672 003c B101 .2byte (.L49-.L51)/2 - 673 003e B101 .2byte (.L49-.L51)/2 - 674 0040 B101 .2byte (.L49-.L51)/2 - 675 0042 B101 .2byte (.L49-.L51)/2 - 676 0044 B101 .2byte (.L49-.L51)/2 - 677 0046 B101 .2byte (.L49-.L51)/2 - 678 0048 B101 .2byte (.L49-.L51)/2 - 679 004a B101 .2byte (.L49-.L51)/2 - 680 004c B101 .2byte (.L49-.L51)/2 - 681 004e B101 .2byte (.L49-.L51)/2 - 682 0050 B101 .2byte (.L49-.L51)/2 - 683 0052 B101 .2byte (.L49-.L51)/2 - 684 0054 3D01 .2byte (.L52-.L51)/2 - 685 0056 B101 .2byte (.L49-.L51)/2 - 686 0058 7701 .2byte (.L50-.L51)/2 + 672 003c DA01 .2byte (.L49-.L51)/2 + 673 003e DA01 .2byte (.L49-.L51)/2 + 674 0040 DA01 .2byte (.L49-.L51)/2 + 675 0042 DA01 .2byte (.L49-.L51)/2 + 676 0044 DA01 .2byte (.L49-.L51)/2 + 677 0046 DA01 .2byte (.L49-.L51)/2 + 678 0048 DA01 .2byte (.L49-.L51)/2 + 679 004a DA01 .2byte (.L49-.L51)/2 + 680 004c DA01 .2byte (.L49-.L51)/2 + 681 004e DA01 .2byte (.L49-.L51)/2 + 682 0050 DA01 .2byte (.L49-.L51)/2 + 683 0052 DA01 .2byte (.L49-.L51)/2 + 684 0054 6601 .2byte (.L52-.L51)/2 + 685 0056 DA01 .2byte (.L49-.L51)/2 + 686 0058 A001 .2byte (.L50-.L51)/2 687 .p2align 1 688 .L55: 439:Src/stm32f7xx_it.c **** { @@ -8963,26 +8963,26 @@ ARM GAS /tmp/cczi2eQD.s page 1 441:Src/stm32f7xx_it.c **** TO6_uart = TO6;//Save the time of start rec. command 689 .loc 1 441 9 view .LVU113 690 .loc 1 441 18 is_stmt 0 view .LVU114 - 691 005a 8649 ldr r1, .L100+12 + 691 005a 8A49 ldr r1, .L106+12 692 005c 0868 ldr r0, [r1] - 693 005e 8649 ldr r1, .L100+16 + 693 005e 8A49 ldr r1, .L106+16 694 0060 0860 str r0, [r1] 442:Src/stm32f7xx_it.c **** flg_tmt = 1;//Set the timeout flag 695 .loc 1 442 9 is_stmt 1 view .LVU115 696 .loc 1 442 17 is_stmt 0 view .LVU116 - 697 0062 8649 ldr r1, .L100+20 + 697 0062 8A49 ldr r1, .L106+20 698 0064 0120 movs r0, #1 699 0066 0870 strb r0, [r1] 443:Src/stm32f7xx_it.c **** UART_header = uart_buf; 700 .loc 1 443 9 is_stmt 1 view .LVU117 701 .loc 1 443 21 is_stmt 0 view .LVU118 - 702 0068 8549 ldr r1, .L100+24 + 702 0068 8949 ldr r1, .L106+24 703 006a 0A80 strh r2, [r1] @ movhi 444:Src/stm32f7xx_it.c **** UART_rec_incr++; 704 .loc 1 444 9 is_stmt 1 view .LVU119 705 .loc 1 444 22 is_stmt 0 view .LVU120 706 006c 0344 add r3, r3, r0 - 707 006e 804A ldr r2, .L100+8 + 707 006e 844A ldr r2, .L106+8 708 0070 1380 strh r3, [r2] @ movhi 445:Src/stm32f7xx_it.c **** break; 709 .loc 1 445 5 is_stmt 1 view .LVU121 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/cczi2eQD.s page 1 454:Src/stm32f7xx_it.c **** UART_rec_incr = 0; 455:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag 456:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - ARM GAS /tmp/cczi2eQD.s page 151 + ARM GAS /tmp/ccqZqdXP.s page 151 457:Src/stm32f7xx_it.c **** break; @@ -9034,119 +9034,132 @@ ARM GAS /tmp/cczi2eQD.s page 1 487:Src/stm32f7xx_it.c **** case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command 488:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting! 489:Src/stm32f7xx_it.c **** break; - 490:Src/stm32f7xx_it.c **** default: //error decoding header - 491:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 492:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 493:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 494:Src/stm32f7xx_it.c **** //CPU_state = HALT; - 495:Src/stm32f7xx_it.c **** State_Data[0] |= UART_ERR; - 496:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 497:Src/stm32f7xx_it.c **** break; - 498:Src/stm32f7xx_it.c **** } - 499:Src/stm32f7xx_it.c **** break; - 500:Src/stm32f7xx_it.c **** - 501:Src/stm32f7xx_it.c **** case (AD9102_CMD_8 - 1): - 502:Src/stm32f7xx_it.c **** if (UART_header == AD9102_CMD_HEADER) - 503:Src/stm32f7xx_it.c **** { - 504:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 505:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 506:Src/stm32f7xx_it.c **** else - 507:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 508:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 509:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 510:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 511:Src/stm32f7xx_it.c **** } - 512:Src/stm32f7xx_it.c **** else if (UART_header == AD9833_CMD_HEADER) - 513:Src/stm32f7xx_it.c **** { - ARM GAS /tmp/cczi2eQD.s page 152 + 490:Src/stm32f7xx_it.c **** case STM32_DAC_CMD_HEADER: // STM32 internal DAC command + 491:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting! + 492:Src/stm32f7xx_it.c **** break; + 493:Src/stm32f7xx_it.c **** default: //error decoding header + 494:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 495:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 496:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 497:Src/stm32f7xx_it.c **** //CPU_state = HALT; + 498:Src/stm32f7xx_it.c **** State_Data[0] |= UART_ERR; + 499:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 500:Src/stm32f7xx_it.c **** break; + 501:Src/stm32f7xx_it.c **** } + 502:Src/stm32f7xx_it.c **** break; + 503:Src/stm32f7xx_it.c **** + 504:Src/stm32f7xx_it.c **** case (AD9102_CMD_8 - 1): + 505:Src/stm32f7xx_it.c **** if (UART_header == AD9102_CMD_HEADER) + 506:Src/stm32f7xx_it.c **** { + 507:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 508:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 509:Src/stm32f7xx_it.c **** else + 510:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 511:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 512:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 513:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + ARM GAS /tmp/ccqZqdXP.s page 152 - 514:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 515:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 516:Src/stm32f7xx_it.c **** else - 517:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 518:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 519:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 520:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 521:Src/stm32f7xx_it.c **** } - 522:Src/stm32f7xx_it.c **** else if (UART_header == DS1809_CMD_HEADER) - 523:Src/stm32f7xx_it.c **** { - 524:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 525:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 526:Src/stm32f7xx_it.c **** else - 527:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 528:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 529:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 530:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 531:Src/stm32f7xx_it.c **** } - 532:Src/stm32f7xx_it.c **** else - 533:Src/stm32f7xx_it.c **** { - 534:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 535:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 536:Src/stm32f7xx_it.c **** else - 537:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 538:Src/stm32f7xx_it.c **** UART_rec_incr++; - 539:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 540:Src/stm32f7xx_it.c **** } - 541:Src/stm32f7xx_it.c **** break; - 542:Src/stm32f7xx_it.c **** - 543:Src/stm32f7xx_it.c **** case (CL_8 - 1): - 544:Src/stm32f7xx_it.c **** if (UART_header == 0x1111) - 545:Src/stm32f7xx_it.c **** { - 546:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 547:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 548:Src/stm32f7xx_it.c **** else - 549:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 550:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 551:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 552:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 514:Src/stm32f7xx_it.c **** } + 515:Src/stm32f7xx_it.c **** else if (UART_header == AD9833_CMD_HEADER) + 516:Src/stm32f7xx_it.c **** { + 517:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 518:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 519:Src/stm32f7xx_it.c **** else + 520:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 521:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 522:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 523:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 524:Src/stm32f7xx_it.c **** } + 525:Src/stm32f7xx_it.c **** else if (UART_header == DS1809_CMD_HEADER) + 526:Src/stm32f7xx_it.c **** { + 527:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 528:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 529:Src/stm32f7xx_it.c **** else + 530:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 531:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 532:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 533:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 534:Src/stm32f7xx_it.c **** } + 535:Src/stm32f7xx_it.c **** else if (UART_header == STM32_DAC_CMD_HEADER) + 536:Src/stm32f7xx_it.c **** { + 537:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 538:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 539:Src/stm32f7xx_it.c **** else + 540:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 541:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 542:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 543:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 544:Src/stm32f7xx_it.c **** } + 545:Src/stm32f7xx_it.c **** else + 546:Src/stm32f7xx_it.c **** { + 547:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 548:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 549:Src/stm32f7xx_it.c **** else + 550:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 551:Src/stm32f7xx_it.c **** UART_rec_incr++; + 552:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; 553:Src/stm32f7xx_it.c **** } - 554:Src/stm32f7xx_it.c **** else - 555:Src/stm32f7xx_it.c **** { - 556:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 557:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 558:Src/stm32f7xx_it.c **** else - 559:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 560:Src/stm32f7xx_it.c **** UART_rec_incr++; - 561:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 562:Src/stm32f7xx_it.c **** } - 563:Src/stm32f7xx_it.c **** break; - 564:Src/stm32f7xx_it.c **** case (TSK_8 - 1): - 565:Src/stm32f7xx_it.c **** if (UART_header == 0x7777) - 566:Src/stm32f7xx_it.c **** { - 567:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 568:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 569:Src/stm32f7xx_it.c **** else - 570:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - ARM GAS /tmp/cczi2eQD.s page 153 + 554:Src/stm32f7xx_it.c **** break; + 555:Src/stm32f7xx_it.c **** + 556:Src/stm32f7xx_it.c **** case (CL_8 - 1): + 557:Src/stm32f7xx_it.c **** if (UART_header == 0x1111) + 558:Src/stm32f7xx_it.c **** { + 559:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 560:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 561:Src/stm32f7xx_it.c **** else + 562:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 563:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 564:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 565:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 566:Src/stm32f7xx_it.c **** } + 567:Src/stm32f7xx_it.c **** else + 568:Src/stm32f7xx_it.c **** { + 569:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 570:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + ARM GAS /tmp/ccqZqdXP.s page 153 - 571:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 572:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 573:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 574:Src/stm32f7xx_it.c **** } - 575:Src/stm32f7xx_it.c **** else - 576:Src/stm32f7xx_it.c **** { - 577:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 578:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 579:Src/stm32f7xx_it.c **** else - 580:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 581:Src/stm32f7xx_it.c **** UART_rec_incr++; - 582:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 583:Src/stm32f7xx_it.c **** } - 584:Src/stm32f7xx_it.c **** break; - 585:Src/stm32f7xx_it.c **** default: - 586:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 587:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 571:Src/stm32f7xx_it.c **** else + 572:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 573:Src/stm32f7xx_it.c **** UART_rec_incr++; + 574:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 575:Src/stm32f7xx_it.c **** } + 576:Src/stm32f7xx_it.c **** break; + 577:Src/stm32f7xx_it.c **** case (TSK_8 - 1): + 578:Src/stm32f7xx_it.c **** if (UART_header == 0x7777) + 579:Src/stm32f7xx_it.c **** { + 580:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 581:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 582:Src/stm32f7xx_it.c **** else + 583:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 584:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 585:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 586:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 587:Src/stm32f7xx_it.c **** } 588:Src/stm32f7xx_it.c **** else - 589:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 590:Src/stm32f7xx_it.c **** UART_rec_incr++; - 591:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 592:Src/stm32f7xx_it.c **** break; - 593:Src/stm32f7xx_it.c **** } - 594:Src/stm32f7xx_it.c **** // HAL_UART_Receive_IT(&huart1, &uart_buf, 1); - 595:Src/stm32f7xx_it.c **** } - 711 .loc 1 595 1 is_stmt 0 view .LVU122 + 589:Src/stm32f7xx_it.c **** { + 590:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 591:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 592:Src/stm32f7xx_it.c **** else + 593:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 594:Src/stm32f7xx_it.c **** UART_rec_incr++; + 595:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 596:Src/stm32f7xx_it.c **** } + 597:Src/stm32f7xx_it.c **** break; + 598:Src/stm32f7xx_it.c **** default: + 599:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 600:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 601:Src/stm32f7xx_it.c **** else + 602:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 603:Src/stm32f7xx_it.c **** UART_rec_incr++; + 604:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 605:Src/stm32f7xx_it.c **** break; + 606:Src/stm32f7xx_it.c **** } + 607:Src/stm32f7xx_it.c **** // HAL_UART_Receive_IT(&huart1, &uart_buf, 1); + 608:Src/stm32f7xx_it.c **** } + 711 .loc 1 608 1 is_stmt 0 view .LVU122 712 0072 5DF8044B ldr r4, [sp], #4 713 .LCFI7: 714 .cfi_remember_state @@ -9160,1092 +9173,1174 @@ ARM GAS /tmp/cczi2eQD.s page 1 721 .loc 1 447 9 is_stmt 1 view .LVU123 447:Src/stm32f7xx_it.c **** switch (UART_header) 722 .loc 1 447 21 is_stmt 0 view .LVU124 - 723 0078 8149 ldr r1, .L100+24 + 723 0078 8549 ldr r1, .L106+24 724 007a 0B88 ldrh r3, [r1] 725 007c 03EB0223 add r3, r3, r2, lsl #8 726 0080 9BB2 uxth r3, r3 727 0082 0B80 strh r3, [r1] @ movhi + ARM GAS /tmp/ccqZqdXP.s page 154 + + 448:Src/stm32f7xx_it.c **** { 728 .loc 1 448 9 is_stmt 1 view .LVU125 729 0084 46F26662 movw r2, #26214 730 0088 9342 cmp r3, r2 - 731 008a 56D0 beq .L57 - 732 008c 26D8 bhi .L58 - 733 008e 43F23332 movw r2, #13107 + 731 008a 5AD0 beq .L57 + 732 008c 10D9 bls .L99 + 733 008e 49F69912 movw r2, #39321 734 0092 9342 cmp r3, r2 - 735 0094 3FD0 beq .L59 - 736 0096 10D8 bhi .L60 - 737 0098 41F21112 movw r2, #4369 + 735 0094 62D0 beq .L66 + 736 0096 32D8 bhi .L67 + 737 0098 47F27772 movw r2, #30583 738 009c 9342 cmp r3, r2 - 739 009e 36D0 beq .L61 - ARM GAS /tmp/cczi2eQD.s page 154 - - - 740 00a0 42F22222 movw r2, #8738 + 739 009e 59D0 beq .L68 + 740 00a0 48F68802 movw r2, #34952 741 00a4 9342 cmp r3, r2 - 742 00a6 59D1 bne .L63 - 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 743 .loc 1 454 13 view .LVU126 - 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 744 .loc 1 454 27 is_stmt 0 view .LVU127 - 745 00a8 0023 movs r3, #0 - 746 00aa 714A ldr r2, .L100+8 - 747 00ac 1380 strh r3, [r2] @ movhi - 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - 748 .loc 1 455 13 is_stmt 1 view .LVU128 - 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - 749 .loc 1 455 21 is_stmt 0 view .LVU129 - 750 00ae 734A ldr r2, .L100+20 - 751 00b0 1370 strb r3, [r2] - 456:Src/stm32f7xx_it.c **** break; - 752 .loc 1 456 13 is_stmt 1 view .LVU130 - 456:Src/stm32f7xx_it.c **** break; - 753 .loc 1 456 23 is_stmt 0 view .LVU131 - 754 00b2 744B ldr r3, .L100+28 - 755 00b4 0222 movs r2, #2 - 756 00b6 1A70 strb r2, [r3] - 457:Src/stm32f7xx_it.c **** case 0x3333: //Transmith saved DATA - 757 .loc 1 457 9 is_stmt 1 view .LVU132 - 758 00b8 DBE7 b .L48 - 759 .L60: - 760 00ba 44F24442 movw r2, #17476 - 761 00be 9342 cmp r3, r2 - 762 00c0 32D0 beq .L64 - 763 00c2 45F25552 movw r2, #21845 - 764 00c6 9342 cmp r3, r2 - 765 00c8 48D1 bne .L63 - 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 766 .loc 1 469 13 view .LVU133 - 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 767 .loc 1 469 27 is_stmt 0 view .LVU134 - 768 00ca 0023 movs r3, #0 - 769 00cc 684A ldr r2, .L100+8 - 770 00ce 1380 strh r3, [r2] @ movhi - 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; - 771 .loc 1 470 13 is_stmt 1 view .LVU135 - 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; - 772 .loc 1 470 21 is_stmt 0 view .LVU136 - 773 00d0 6A4A ldr r2, .L100+20 - 774 00d2 1370 strb r3, [r2] - 471:Src/stm32f7xx_it.c **** break; - 775 .loc 1 471 13 is_stmt 1 view .LVU137 - 471:Src/stm32f7xx_it.c **** break; - 776 .loc 1 471 23 is_stmt 0 view .LVU138 - 777 00d4 6B4B ldr r3, .L100+28 - 778 00d6 0522 movs r2, #5 - 779 00d8 1A70 strb r2, [r3] - 472:Src/stm32f7xx_it.c **** case 0x6666: //Request state - 780 .loc 1 472 9 is_stmt 1 view .LVU139 - 781 00da CAE7 b .L48 - 782 .L58: - ARM GAS /tmp/cczi2eQD.s page 155 - - - 783 00dc 49F69912 movw r2, #39321 - 784 00e0 9342 cmp r3, r2 - 785 00e2 37D0 beq .L66 - 786 00e4 0BD8 bhi .L67 - 787 00e6 47F27772 movw r2, #30583 - 788 00ea 9342 cmp r3, r2 - 789 00ec 2ED0 beq .L68 - 790 00ee 48F68802 movw r2, #34952 - 791 00f2 9342 cmp r3, r2 - 792 00f4 32D1 bne .L63 + 742 00a6 61D1 bne .L63 482:Src/stm32f7xx_it.c **** break; - 793 .loc 1 482 13 view .LVU140 + 743 .loc 1 482 13 view .LVU126 482:Src/stm32f7xx_it.c **** break; - 794 .loc 1 482 27 is_stmt 0 view .LVU141 - 795 00f6 5E4B ldr r3, .L100+8 - 796 00f8 0222 movs r2, #2 - 797 00fa 1A80 strh r2, [r3] @ movhi + 744 .loc 1 482 27 is_stmt 0 view .LVU127 + 745 00a8 754B ldr r3, .L106+8 + 746 00aa 0222 movs r2, #2 + 747 00ac 1A80 strh r2, [r3] @ movhi 483:Src/stm32f7xx_it.c **** case AD9833_CMD_HEADER: // AD9833 command - 798 .loc 1 483 9 is_stmt 1 view .LVU142 + 748 .loc 1 483 9 is_stmt 1 view .LVU128 + 749 00ae E0E7 b .L48 + 750 .L99: + 751 00b0 43F23332 movw r2, #13107 + 752 00b4 9342 cmp r3, r2 + 753 00b6 32D0 beq .L59 + 754 00b8 10D8 bhi .L60 + 755 00ba 41F21112 movw r2, #4369 + 756 00be 9342 cmp r3, r2 + 757 00c0 29D0 beq .L61 + 758 00c2 42F22222 movw r2, #8738 + 759 00c6 9342 cmp r3, r2 + 760 00c8 50D1 bne .L63 + 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 761 .loc 1 454 13 view .LVU129 + 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 762 .loc 1 454 27 is_stmt 0 view .LVU130 + 763 00ca 0023 movs r3, #0 + 764 00cc 6C4A ldr r2, .L106+8 + 765 00ce 1380 strh r3, [r2] @ movhi + 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; + 766 .loc 1 455 13 is_stmt 1 view .LVU131 + 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; + 767 .loc 1 455 21 is_stmt 0 view .LVU132 + 768 00d0 6E4A ldr r2, .L106+20 + 769 00d2 1370 strb r3, [r2] + 456:Src/stm32f7xx_it.c **** break; + 770 .loc 1 456 13 is_stmt 1 view .LVU133 + 456:Src/stm32f7xx_it.c **** break; + 771 .loc 1 456 23 is_stmt 0 view .LVU134 + 772 00d4 6F4B ldr r3, .L106+28 + 773 00d6 0222 movs r2, #2 + 774 00d8 1A70 strb r2, [r3] + ARM GAS /tmp/ccqZqdXP.s page 155 + + + 457:Src/stm32f7xx_it.c **** case 0x3333: //Transmith saved DATA + 775 .loc 1 457 9 is_stmt 1 view .LVU135 + 776 00da CAE7 b .L48 + 777 .L60: + 778 00dc 44F24442 movw r2, #17476 + 779 00e0 9342 cmp r3, r2 + 780 00e2 25D0 beq .L64 + 781 00e4 45F25552 movw r2, #21845 + 782 00e8 9342 cmp r3, r2 + 783 00ea 3FD1 bne .L63 + 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 784 .loc 1 469 13 view .LVU136 + 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 785 .loc 1 469 27 is_stmt 0 view .LVU137 + 786 00ec 0023 movs r3, #0 + 787 00ee 644A ldr r2, .L106+8 + 788 00f0 1380 strh r3, [r2] @ movhi + 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; + 789 .loc 1 470 13 is_stmt 1 view .LVU138 + 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; + 790 .loc 1 470 21 is_stmt 0 view .LVU139 + 791 00f2 664A ldr r2, .L106+20 + 792 00f4 1370 strb r3, [r2] + 471:Src/stm32f7xx_it.c **** break; + 793 .loc 1 471 13 is_stmt 1 view .LVU140 + 471:Src/stm32f7xx_it.c **** break; + 794 .loc 1 471 23 is_stmt 0 view .LVU141 + 795 00f6 674B ldr r3, .L106+28 + 796 00f8 0522 movs r2, #5 + 797 00fa 1A70 strb r2, [r3] + 472:Src/stm32f7xx_it.c **** case 0x6666: //Request state + 798 .loc 1 472 9 is_stmt 1 view .LVU142 799 00fc B9E7 b .L48 800 .L67: 801 00fe 4AF6AA22 movw r2, #43690 802 0102 9342 cmp r3, r2 - 803 0104 2AD1 bne .L63 - 488:Src/stm32f7xx_it.c **** break; - 804 .loc 1 488 13 view .LVU143 - 488:Src/stm32f7xx_it.c **** break; - 805 .loc 1 488 27 is_stmt 0 view .LVU144 - 806 0106 5A4B ldr r3, .L100+8 - 807 0108 0222 movs r2, #2 - 808 010a 1A80 strh r2, [r3] @ movhi - 489:Src/stm32f7xx_it.c **** default: //error decoding header - 809 .loc 1 489 9 is_stmt 1 view .LVU145 - 810 010c B1E7 b .L48 - 811 .L61: + 803 0104 2ED0 beq .L70 + 804 0106 4BF6BB32 movw r2, #48059 + 805 010a 9342 cmp r3, r2 + 806 010c 2ED1 bne .L63 + 491:Src/stm32f7xx_it.c **** break; + 807 .loc 1 491 13 view .LVU143 + 491:Src/stm32f7xx_it.c **** break; + 808 .loc 1 491 27 is_stmt 0 view .LVU144 + 809 010e 5C4B ldr r3, .L106+8 + 810 0110 0222 movs r2, #2 + 811 0112 1A80 strh r2, [r3] @ movhi + 492:Src/stm32f7xx_it.c **** default: //error decoding header + 812 .loc 1 492 9 is_stmt 1 view .LVU145 + 813 0114 ADE7 b .L48 + 814 .L61: 451:Src/stm32f7xx_it.c **** break; - 812 .loc 1 451 13 view .LVU146 + 815 .loc 1 451 13 view .LVU146 451:Src/stm32f7xx_it.c **** break; - 813 .loc 1 451 27 is_stmt 0 view .LVU147 - 814 010e 584B ldr r3, .L100+8 - 815 0110 0222 movs r2, #2 - 816 0112 1A80 strh r2, [r3] @ movhi + 816 .loc 1 451 27 is_stmt 0 view .LVU147 + 817 0116 5A4B ldr r3, .L106+8 + 818 0118 0222 movs r2, #2 + ARM GAS /tmp/ccqZqdXP.s page 156 + + + 819 011a 1A80 strh r2, [r3] @ movhi 452:Src/stm32f7xx_it.c **** case 0x2222: //Back to default - 817 .loc 1 452 9 is_stmt 1 view .LVU148 - 818 0114 ADE7 b .L48 - 819 .L59: + 820 .loc 1 452 9 is_stmt 1 view .LVU148 + 821 011c A9E7 b .L48 + 822 .L59: 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 820 .loc 1 459 13 view .LVU149 + 823 .loc 1 459 13 view .LVU149 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 821 .loc 1 459 27 is_stmt 0 view .LVU150 - 822 0116 0023 movs r3, #0 - 823 0118 554A ldr r2, .L100+8 - 824 011a 1380 strh r3, [r2] @ movhi + 824 .loc 1 459 27 is_stmt 0 view .LVU150 + 825 011e 0023 movs r3, #0 + 826 0120 574A ldr r2, .L106+8 + 827 0122 1380 strh r3, [r2] @ movhi 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; - 825 .loc 1 460 13 is_stmt 1 view .LVU151 + 828 .loc 1 460 13 is_stmt 1 view .LVU151 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; - 826 .loc 1 460 21 is_stmt 0 view .LVU152 - ARM GAS /tmp/cczi2eQD.s page 156 - - - 827 011c 574A ldr r2, .L100+20 - 828 011e 1370 strb r3, [r2] + 829 .loc 1 460 21 is_stmt 0 view .LVU152 + 830 0124 594A ldr r2, .L106+20 + 831 0126 1370 strb r3, [r2] 461:Src/stm32f7xx_it.c **** break; - 829 .loc 1 461 13 is_stmt 1 view .LVU153 + 832 .loc 1 461 13 is_stmt 1 view .LVU153 461:Src/stm32f7xx_it.c **** break; - 830 .loc 1 461 23 is_stmt 0 view .LVU154 - 831 0120 584B ldr r3, .L100+28 - 832 0122 0322 movs r2, #3 - 833 0124 1A70 strb r2, [r3] + 833 .loc 1 461 23 is_stmt 0 view .LVU154 + 834 0128 5A4B ldr r3, .L106+28 + 835 012a 0322 movs r2, #3 + 836 012c 1A70 strb r2, [r3] 462:Src/stm32f7xx_it.c **** case 0x4444: //Received packet - 834 .loc 1 462 9 is_stmt 1 view .LVU155 - 835 0126 A4E7 b .L48 - 836 .L64: + 837 .loc 1 462 9 is_stmt 1 view .LVU155 + 838 012e A0E7 b .L48 + 839 .L64: 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 837 .loc 1 464 13 view .LVU156 + 840 .loc 1 464 13 view .LVU156 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 838 .loc 1 464 27 is_stmt 0 view .LVU157 - 839 0128 0023 movs r3, #0 - 840 012a 514A ldr r2, .L100+8 - 841 012c 1380 strh r3, [r2] @ movhi + 841 .loc 1 464 27 is_stmt 0 view .LVU157 + 842 0130 0023 movs r3, #0 + 843 0132 534A ldr r2, .L106+8 + 844 0134 1380 strh r3, [r2] @ movhi 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; - 842 .loc 1 465 13 is_stmt 1 view .LVU158 + 845 .loc 1 465 13 is_stmt 1 view .LVU158 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; - 843 .loc 1 465 21 is_stmt 0 view .LVU159 - 844 012e 534A ldr r2, .L100+20 - 845 0130 1370 strb r3, [r2] + 846 .loc 1 465 21 is_stmt 0 view .LVU159 + 847 0136 554A ldr r2, .L106+20 + 848 0138 1370 strb r3, [r2] 466:Src/stm32f7xx_it.c **** break; - 846 .loc 1 466 13 is_stmt 1 view .LVU160 + 849 .loc 1 466 13 is_stmt 1 view .LVU160 466:Src/stm32f7xx_it.c **** break; - 847 .loc 1 466 23 is_stmt 0 view .LVU161 - 848 0132 544B ldr r3, .L100+28 - 849 0134 0422 movs r2, #4 - 850 0136 1A70 strb r2, [r3] + 850 .loc 1 466 23 is_stmt 0 view .LVU161 + 851 013a 564B ldr r3, .L106+28 + 852 013c 0422 movs r2, #4 + 853 013e 1A70 strb r2, [r3] 467:Src/stm32f7xx_it.c **** case 0x5555: //Erase saved DATA - 851 .loc 1 467 9 is_stmt 1 view .LVU162 - 852 0138 9BE7 b .L48 - 853 .L57: + 854 .loc 1 467 9 is_stmt 1 view .LVU162 + 855 0140 97E7 b .L48 + 856 .L57: 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 854 .loc 1 474 13 view .LVU163 + 857 .loc 1 474 13 view .LVU163 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 855 .loc 1 474 27 is_stmt 0 view .LVU164 - 856 013a 0023 movs r3, #0 - 857 013c 4C4A ldr r2, .L100+8 - 858 013e 1380 strh r3, [r2] @ movhi - 475:Src/stm32f7xx_it.c **** CPU_state = STATE; - 859 .loc 1 475 13 is_stmt 1 view .LVU165 - 475:Src/stm32f7xx_it.c **** CPU_state = STATE; - 860 .loc 1 475 21 is_stmt 0 view .LVU166 - 861 0140 4E4A ldr r2, .L100+20 - 862 0142 1370 strb r3, [r2] - 476:Src/stm32f7xx_it.c **** break; - 863 .loc 1 476 13 is_stmt 1 view .LVU167 - 476:Src/stm32f7xx_it.c **** break; - 864 .loc 1 476 23 is_stmt 0 view .LVU168 - 865 0144 4F4B ldr r3, .L100+28 - 866 0146 0622 movs r2, #6 - 867 0148 1A70 strb r2, [r3] - ARM GAS /tmp/cczi2eQD.s page 157 + 858 .loc 1 474 27 is_stmt 0 view .LVU164 + ARM GAS /tmp/ccqZqdXP.s page 157 + 859 0142 0023 movs r3, #0 + 860 0144 4E4A ldr r2, .L106+8 + 861 0146 1380 strh r3, [r2] @ movhi + 475:Src/stm32f7xx_it.c **** CPU_state = STATE; + 862 .loc 1 475 13 is_stmt 1 view .LVU165 + 475:Src/stm32f7xx_it.c **** CPU_state = STATE; + 863 .loc 1 475 21 is_stmt 0 view .LVU166 + 864 0148 504A ldr r2, .L106+20 + 865 014a 1370 strb r3, [r2] + 476:Src/stm32f7xx_it.c **** break; + 866 .loc 1 476 13 is_stmt 1 view .LVU167 + 476:Src/stm32f7xx_it.c **** break; + 867 .loc 1 476 23 is_stmt 0 view .LVU168 + 868 014c 514B ldr r3, .L106+28 + 869 014e 0622 movs r2, #6 + 870 0150 1A70 strb r2, [r3] 477:Src/stm32f7xx_it.c **** case 0x7777: - 868 .loc 1 477 9 is_stmt 1 view .LVU169 - 869 014a 92E7 b .L48 - 870 .L68: + 871 .loc 1 477 9 is_stmt 1 view .LVU169 + 872 0152 8EE7 b .L48 + 873 .L68: 479:Src/stm32f7xx_it.c **** break; - 871 .loc 1 479 13 view .LVU170 + 874 .loc 1 479 13 view .LVU170 479:Src/stm32f7xx_it.c **** break; - 872 .loc 1 479 27 is_stmt 0 view .LVU171 - 873 014c 484B ldr r3, .L100+8 - 874 014e 0222 movs r2, #2 - 875 0150 1A80 strh r2, [r3] @ movhi + 875 .loc 1 479 27 is_stmt 0 view .LVU171 + 876 0154 4A4B ldr r3, .L106+8 + 877 0156 0222 movs r2, #2 + 878 0158 1A80 strh r2, [r3] @ movhi 480:Src/stm32f7xx_it.c **** case AD9102_CMD_HEADER: // AD9102 command - 876 .loc 1 480 13 is_stmt 1 view .LVU172 - 877 0152 8EE7 b .L48 - 878 .L66: + 879 .loc 1 480 13 is_stmt 1 view .LVU172 + 880 015a 8AE7 b .L48 + 881 .L66: 485:Src/stm32f7xx_it.c **** break; - 879 .loc 1 485 13 view .LVU173 + 882 .loc 1 485 13 view .LVU173 485:Src/stm32f7xx_it.c **** break; - 880 .loc 1 485 27 is_stmt 0 view .LVU174 - 881 0154 464B ldr r3, .L100+8 - 882 0156 0222 movs r2, #2 - 883 0158 1A80 strh r2, [r3] @ movhi + 883 .loc 1 485 27 is_stmt 0 view .LVU174 + 884 015c 484B ldr r3, .L106+8 + 885 015e 0222 movs r2, #2 + 886 0160 1A80 strh r2, [r3] @ movhi 486:Src/stm32f7xx_it.c **** case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command - 884 .loc 1 486 9 is_stmt 1 view .LVU175 - 885 015a 8AE7 b .L48 - 886 .L63: - 491:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 887 .loc 1 491 13 view .LVU176 - 491:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 888 .loc 1 491 27 is_stmt 0 view .LVU177 - 889 015c 0023 movs r3, #0 - 890 015e 444A ldr r2, .L100+8 - 891 0160 1380 strh r3, [r2] @ movhi - 492:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 892 .loc 1 492 13 is_stmt 1 view .LVU178 - 492:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 893 .loc 1 492 21 is_stmt 0 view .LVU179 - 894 0162 464A ldr r2, .L100+20 - 895 0164 1370 strb r3, [r2] - 495:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 896 .loc 1 495 13 is_stmt 1 view .LVU180 - 495:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 897 .loc 1 495 23 is_stmt 0 view .LVU181 - 898 0166 484A ldr r2, .L100+32 - 899 0168 1378 ldrb r3, [r2] @ zero_extendqisi2 - 495:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 900 .loc 1 495 27 view .LVU182 - 901 016a 43F00203 orr r3, r3, #2 - 902 016e 1370 strb r3, [r2] - 496:Src/stm32f7xx_it.c **** break; - 903 .loc 1 496 13 is_stmt 1 view .LVU183 - 496:Src/stm32f7xx_it.c **** break; - 904 .loc 1 496 23 is_stmt 0 view .LVU184 - 905 0170 444B ldr r3, .L100+28 - 906 0172 0222 movs r2, #2 - 907 0174 1A70 strb r2, [r3] - 497:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/cczi2eQD.s page 158 + 887 .loc 1 486 9 is_stmt 1 view .LVU175 + 888 0162 86E7 b .L48 + 889 .L70: + 488:Src/stm32f7xx_it.c **** break; + 890 .loc 1 488 13 view .LVU176 + 488:Src/stm32f7xx_it.c **** break; + 891 .loc 1 488 27 is_stmt 0 view .LVU177 + 892 0164 464B ldr r3, .L106+8 + 893 0166 0222 movs r2, #2 + 894 0168 1A80 strh r2, [r3] @ movhi + 489:Src/stm32f7xx_it.c **** case STM32_DAC_CMD_HEADER: // STM32 internal DAC command + 895 .loc 1 489 9 is_stmt 1 view .LVU178 + 896 016a 82E7 b .L48 + 897 .L63: + 494:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 898 .loc 1 494 13 view .LVU179 + 494:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 899 .loc 1 494 27 is_stmt 0 view .LVU180 + ARM GAS /tmp/ccqZqdXP.s page 158 - 908 .loc 1 497 9 is_stmt 1 view .LVU185 - 909 0176 7CE7 b .L48 - 910 .L53: - 502:Src/stm32f7xx_it.c **** { - 911 .loc 1 502 9 view .LVU186 - 502:Src/stm32f7xx_it.c **** { - 912 .loc 1 502 25 is_stmt 0 view .LVU187 - 913 0178 4149 ldr r1, .L100+24 - 914 017a 0988 ldrh r1, [r1] - 502:Src/stm32f7xx_it.c **** { - 915 .loc 1 502 12 view .LVU188 - 916 017c 48F68800 movw r0, #34952 - 917 0180 8142 cmp r1, r0 - 918 0182 1AD0 beq .L95 - 512:Src/stm32f7xx_it.c **** { - 919 .loc 1 512 14 is_stmt 1 view .LVU189 - 512:Src/stm32f7xx_it.c **** { - 920 .loc 1 512 17 is_stmt 0 view .LVU190 - 921 0184 49F69910 movw r0, #39321 - 922 0188 8142 cmp r1, r0 - 923 018a 31D0 beq .L96 - 522:Src/stm32f7xx_it.c **** { - 924 .loc 1 522 14 is_stmt 1 view .LVU191 - 522:Src/stm32f7xx_it.c **** { - 925 .loc 1 522 17 is_stmt 0 view .LVU192 - 926 018c 4AF6AA20 movw r0, #43690 - 927 0190 8142 cmp r1, r0 - 928 0192 48D0 beq .L97 - 534:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 929 .loc 1 534 13 is_stmt 1 view .LVU193 - 534:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 930 .loc 1 534 16 is_stmt 0 view .LVU194 - 931 0194 13F0010F tst r3, #1 - 932 0198 60D0 beq .L80 - 535:Src/stm32f7xx_it.c **** else - 933 .loc 1 535 17 is_stmt 1 view .LVU195 - 535:Src/stm32f7xx_it.c **** else - 934 .loc 1 535 24 is_stmt 0 view .LVU196 - 935 019a 5908 lsrs r1, r3, #1 - 936 019c 0139 subs r1, r1, #1 - 937 019e 3B4C ldr r4, .L100+36 - 938 01a0 34F81100 ldrh r0, [r4, r1, lsl #1] - 535:Src/stm32f7xx_it.c **** else - 939 .loc 1 535 47 view .LVU197 - 940 01a4 00EB0222 add r2, r0, r2, lsl #8 - 941 01a8 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 942 .L81: - 538:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 943 .loc 1 538 13 is_stmt 1 view .LVU198 - 538:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 944 .loc 1 538 26 is_stmt 0 view .LVU199 - 945 01ac 0133 adds r3, r3, #1 - 946 01ae 304A ldr r2, .L100+8 - 947 01b0 1380 strh r3, [r2] @ movhi - 539:Src/stm32f7xx_it.c **** } - 948 .loc 1 539 13 is_stmt 1 view .LVU200 - 539:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/cczi2eQD.s page 159 + 900 016c 0023 movs r3, #0 + 901 016e 444A ldr r2, .L106+8 + 902 0170 1380 strh r3, [r2] @ movhi + 495:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 903 .loc 1 495 13 is_stmt 1 view .LVU181 + 495:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 904 .loc 1 495 21 is_stmt 0 view .LVU182 + 905 0172 464A ldr r2, .L106+20 + 906 0174 1370 strb r3, [r2] + 498:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 907 .loc 1 498 13 is_stmt 1 view .LVU183 + 498:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 908 .loc 1 498 23 is_stmt 0 view .LVU184 + 909 0176 484A ldr r2, .L106+32 + 910 0178 1378 ldrb r3, [r2] @ zero_extendqisi2 + 498:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 911 .loc 1 498 27 view .LVU185 + 912 017a 43F00203 orr r3, r3, #2 + 913 017e 1370 strb r3, [r2] + 499:Src/stm32f7xx_it.c **** break; + 914 .loc 1 499 13 is_stmt 1 view .LVU186 + 499:Src/stm32f7xx_it.c **** break; + 915 .loc 1 499 23 is_stmt 0 view .LVU187 + 916 0180 444B ldr r3, .L106+28 + 917 0182 0222 movs r2, #2 + 918 0184 1A70 strb r2, [r3] + 500:Src/stm32f7xx_it.c **** } + 919 .loc 1 500 9 is_stmt 1 view .LVU188 + 920 0186 74E7 b .L48 + 921 .L53: + 505:Src/stm32f7xx_it.c **** { + 922 .loc 1 505 9 view .LVU189 + 505:Src/stm32f7xx_it.c **** { + 923 .loc 1 505 25 is_stmt 0 view .LVU190 + 924 0188 4149 ldr r1, .L106+24 + 925 018a 0988 ldrh r1, [r1] + 505:Src/stm32f7xx_it.c **** { + 926 .loc 1 505 12 view .LVU191 + 927 018c 48F68800 movw r0, #34952 + 928 0190 8142 cmp r1, r0 + 929 0192 1FD0 beq .L100 + 515:Src/stm32f7xx_it.c **** { + 930 .loc 1 515 14 is_stmt 1 view .LVU192 + 515:Src/stm32f7xx_it.c **** { + 931 .loc 1 515 17 is_stmt 0 view .LVU193 + 932 0194 49F69910 movw r0, #39321 + 933 0198 8142 cmp r1, r0 + 934 019a 36D0 beq .L101 + 525:Src/stm32f7xx_it.c **** { + 935 .loc 1 525 14 is_stmt 1 view .LVU194 + 525:Src/stm32f7xx_it.c **** { + 936 .loc 1 525 17 is_stmt 0 view .LVU195 + 937 019c 4AF6AA20 movw r0, #43690 + 938 01a0 8142 cmp r1, r0 + 939 01a2 4DD0 beq .L102 + 535:Src/stm32f7xx_it.c **** { + 940 .loc 1 535 14 is_stmt 1 view .LVU196 + ARM GAS /tmp/ccqZqdXP.s page 159 - 949 .loc 1 539 39 is_stmt 0 view .LVU201 - 950 01b2 374B ldr r3, .L100+40 - 951 01b4 0022 movs r2, #0 - 952 01b6 1A70 strb r2, [r3] - 953 01b8 5BE7 b .L48 - 954 .L95: - 504:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 955 .loc 1 504 13 is_stmt 1 view .LVU202 - 504:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 956 .loc 1 504 16 is_stmt 0 view .LVU203 - 957 01ba 13F0010F tst r3, #1 - 958 01be 11D0 beq .L72 - 505:Src/stm32f7xx_it.c **** else - 959 .loc 1 505 17 is_stmt 1 view .LVU204 - 505:Src/stm32f7xx_it.c **** else - 960 .loc 1 505 24 is_stmt 0 view .LVU205 - 961 01c0 5B08 lsrs r3, r3, #1 - 962 01c2 013B subs r3, r3, #1 - 963 01c4 3148 ldr r0, .L100+36 - 964 01c6 30F81310 ldrh r1, [r0, r3, lsl #1] - 505:Src/stm32f7xx_it.c **** else - 965 .loc 1 505 51 view .LVU206 - 966 01ca 01EB0222 add r2, r1, r2, lsl #8 - 967 01ce 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 968 .L73: - 508:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 969 .loc 1 508 13 is_stmt 1 view .LVU207 - 508:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 970 .loc 1 508 23 is_stmt 0 view .LVU208 - 971 01d2 2C4B ldr r3, .L100+28 - 972 01d4 0A22 movs r2, #10 - 973 01d6 1A70 strb r2, [r3] - 509:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 974 .loc 1 509 13 is_stmt 1 view .LVU209 - 509:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 975 .loc 1 509 27 is_stmt 0 view .LVU210 - 976 01d8 0023 movs r3, #0 - 977 01da 254A ldr r2, .L100+8 - 978 01dc 1380 strh r3, [r2] @ movhi - 510:Src/stm32f7xx_it.c **** } - 979 .loc 1 510 13 is_stmt 1 view .LVU211 - 510:Src/stm32f7xx_it.c **** } - 980 .loc 1 510 21 is_stmt 0 view .LVU212 - 981 01de 274A ldr r2, .L100+20 - 982 01e0 1370 strb r3, [r2] - 983 01e2 46E7 b .L48 - 984 .L72: - 507:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 985 .loc 1 507 17 is_stmt 1 view .LVU213 - 507:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 986 .loc 1 507 40 is_stmt 0 view .LVU214 - 987 01e4 5B08 lsrs r3, r3, #1 - 507:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 988 .loc 1 507 46 view .LVU215 - 989 01e6 013B subs r3, r3, #1 - 507:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 990 .loc 1 507 51 view .LVU216 - ARM GAS /tmp/cczi2eQD.s page 160 - - - 991 01e8 2849 ldr r1, .L100+36 - 992 01ea 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 993 01ee F0E7 b .L73 - 994 .L96: - 514:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 995 .loc 1 514 13 is_stmt 1 view .LVU217 - 514:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 996 .loc 1 514 16 is_stmt 0 view .LVU218 - 997 01f0 13F0010F tst r3, #1 - 998 01f4 11D0 beq .L75 - 515:Src/stm32f7xx_it.c **** else - 999 .loc 1 515 17 is_stmt 1 view .LVU219 - 515:Src/stm32f7xx_it.c **** else - 1000 .loc 1 515 24 is_stmt 0 view .LVU220 - 1001 01f6 5B08 lsrs r3, r3, #1 - 1002 01f8 013B subs r3, r3, #1 - 1003 01fa 2448 ldr r0, .L100+36 - 1004 01fc 30F81310 ldrh r1, [r0, r3, lsl #1] - 515:Src/stm32f7xx_it.c **** else - 1005 .loc 1 515 51 view .LVU221 - 1006 0200 01EB0222 add r2, r1, r2, lsl #8 - 1007 0204 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1008 .L76: - 518:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1009 .loc 1 518 13 is_stmt 1 view .LVU222 - 518:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1010 .loc 1 518 23 is_stmt 0 view .LVU223 - 1011 0208 1E4B ldr r3, .L100+28 - 1012 020a 0B22 movs r2, #11 - 1013 020c 1A70 strb r2, [r3] - 519:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1014 .loc 1 519 13 is_stmt 1 view .LVU224 - 519:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1015 .loc 1 519 27 is_stmt 0 view .LVU225 - 1016 020e 0023 movs r3, #0 - 1017 0210 174A ldr r2, .L100+8 - 1018 0212 1380 strh r3, [r2] @ movhi - 520:Src/stm32f7xx_it.c **** } - 1019 .loc 1 520 13 is_stmt 1 view .LVU226 - 520:Src/stm32f7xx_it.c **** } - 1020 .loc 1 520 21 is_stmt 0 view .LVU227 - 1021 0214 194A ldr r2, .L100+20 - 1022 0216 1370 strb r3, [r2] - 1023 0218 2BE7 b .L48 - 1024 .L75: - 517:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1025 .loc 1 517 17 is_stmt 1 view .LVU228 - 517:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1026 .loc 1 517 40 is_stmt 0 view .LVU229 - 1027 021a 5B08 lsrs r3, r3, #1 - 517:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1028 .loc 1 517 46 view .LVU230 - 1029 021c 013B subs r3, r3, #1 - 517:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1030 .loc 1 517 51 view .LVU231 - 1031 021e 1B49 ldr r1, .L100+36 - 1032 0220 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - ARM GAS /tmp/cczi2eQD.s page 161 - - - 1033 0224 F0E7 b .L76 - 1034 .L97: - 524:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1035 .loc 1 524 13 is_stmt 1 view .LVU232 - 524:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1036 .loc 1 524 16 is_stmt 0 view .LVU233 - 1037 0226 13F0010F tst r3, #1 - 1038 022a 11D0 beq .L78 - 525:Src/stm32f7xx_it.c **** else - 1039 .loc 1 525 17 is_stmt 1 view .LVU234 - 525:Src/stm32f7xx_it.c **** else - 1040 .loc 1 525 24 is_stmt 0 view .LVU235 - 1041 022c 5B08 lsrs r3, r3, #1 - 1042 022e 013B subs r3, r3, #1 - 1043 0230 1648 ldr r0, .L100+36 - 1044 0232 30F81310 ldrh r1, [r0, r3, lsl #1] - 525:Src/stm32f7xx_it.c **** else - 1045 .loc 1 525 51 view .LVU236 - 1046 0236 01EB0222 add r2, r1, r2, lsl #8 - 1047 023a 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1048 .L79: - 528:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1049 .loc 1 528 13 is_stmt 1 view .LVU237 - 528:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1050 .loc 1 528 23 is_stmt 0 view .LVU238 - 1051 023e 114B ldr r3, .L100+28 - 1052 0240 0C22 movs r2, #12 - 1053 0242 1A70 strb r2, [r3] - 529:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1054 .loc 1 529 13 is_stmt 1 view .LVU239 - 529:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1055 .loc 1 529 27 is_stmt 0 view .LVU240 - 1056 0244 0023 movs r3, #0 - 1057 0246 0A4A ldr r2, .L100+8 - 1058 0248 1380 strh r3, [r2] @ movhi - 530:Src/stm32f7xx_it.c **** } - 1059 .loc 1 530 13 is_stmt 1 view .LVU241 - 530:Src/stm32f7xx_it.c **** } - 1060 .loc 1 530 21 is_stmt 0 view .LVU242 - 1061 024a 0C4A ldr r2, .L100+20 - 1062 024c 1370 strb r3, [r2] - 1063 024e 10E7 b .L48 - 1064 .L78: - 527:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1065 .loc 1 527 17 is_stmt 1 view .LVU243 - 527:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1066 .loc 1 527 40 is_stmt 0 view .LVU244 - 1067 0250 5B08 lsrs r3, r3, #1 - 527:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1068 .loc 1 527 46 view .LVU245 - 1069 0252 013B subs r3, r3, #1 - 527:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1070 .loc 1 527 51 view .LVU246 - 1071 0254 0D49 ldr r1, .L100+36 - 1072 0256 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1073 025a F0E7 b .L79 - 1074 .L80: - ARM GAS /tmp/cczi2eQD.s page 162 - - - 537:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1075 .loc 1 537 17 is_stmt 1 view .LVU247 - 537:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1076 .loc 1 537 39 is_stmt 0 view .LVU248 - 1077 025c 5908 lsrs r1, r3, #1 - 537:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1078 .loc 1 537 43 view .LVU249 - 1079 025e 0139 subs r1, r1, #1 - 537:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1080 .loc 1 537 47 view .LVU250 - 1081 0260 0A48 ldr r0, .L100+36 - 1082 0262 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1083 0266 A1E7 b .L81 - 1084 .L101: - 1085 .align 2 - 1086 .L100: - 1087 0268 00100140 .word 1073811456 - 1088 026c 00000000 .word uart_buf - 1089 0270 00000000 .word UART_rec_incr - 1090 0274 00000000 .word TO6 - 1091 0278 00000000 .word TO6_uart - 1092 027c 00000000 .word flg_tmt - 1093 0280 00000000 .word UART_header - 1094 0284 00000000 .word CPU_state - 1095 0288 00000000 .word State_Data - 1096 028c 00000000 .word COMMAND - 1097 0290 00000000 .word UART_transmission_request - 1098 .L52: - 544:Src/stm32f7xx_it.c **** { - 1099 .loc 1 544 9 is_stmt 1 view .LVU251 - 544:Src/stm32f7xx_it.c **** { - 1100 .loc 1 544 25 is_stmt 0 view .LVU252 - 1101 0294 4649 ldr r1, .L102 - 1102 0296 0888 ldrh r0, [r1] - 544:Src/stm32f7xx_it.c **** { - 1103 .loc 1 544 12 view .LVU253 - 1104 0298 41F21111 movw r1, #4369 - 1105 029c 8842 cmp r0, r1 - 1106 029e 12D0 beq .L98 - 556:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1107 .loc 1 556 13 is_stmt 1 view .LVU254 - 556:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1108 .loc 1 556 16 is_stmt 0 view .LVU255 - 1109 02a0 13F0010F tst r3, #1 - 1110 02a4 2AD0 beq .L85 - 557:Src/stm32f7xx_it.c **** else - 1111 .loc 1 557 17 is_stmt 1 view .LVU256 - 557:Src/stm32f7xx_it.c **** else - 1112 .loc 1 557 24 is_stmt 0 view .LVU257 - 1113 02a6 5908 lsrs r1, r3, #1 - 1114 02a8 0139 subs r1, r1, #1 - 1115 02aa 424C ldr r4, .L102+4 - 1116 02ac 34F81100 ldrh r0, [r4, r1, lsl #1] - 557:Src/stm32f7xx_it.c **** else - 1117 .loc 1 557 47 view .LVU258 - 1118 02b0 00EB0222 add r2, r0, r2, lsl #8 - 1119 02b4 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - ARM GAS /tmp/cczi2eQD.s page 163 - - - 1120 .L86: - 560:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1121 .loc 1 560 12 is_stmt 1 view .LVU259 - 560:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1122 .loc 1 560 25 is_stmt 0 view .LVU260 - 1123 02b8 0133 adds r3, r3, #1 - 1124 02ba 3F4A ldr r2, .L102+8 - 1125 02bc 1380 strh r3, [r2] @ movhi - 561:Src/stm32f7xx_it.c **** } - 1126 .loc 1 561 12 is_stmt 1 view .LVU261 - 561:Src/stm32f7xx_it.c **** } - 1127 .loc 1 561 38 is_stmt 0 view .LVU262 - 1128 02be 3F4B ldr r3, .L102+12 - 1129 02c0 0022 movs r2, #0 - 1130 02c2 1A70 strb r2, [r3] - 1131 02c4 D5E6 b .L48 - 1132 .L98: - 546:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1133 .loc 1 546 13 is_stmt 1 view .LVU263 - 546:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1134 .loc 1 546 16 is_stmt 0 view .LVU264 - 1135 02c6 13F0010F tst r3, #1 - 1136 02ca 11D0 beq .L83 - 547:Src/stm32f7xx_it.c **** else - 1137 .loc 1 547 17 is_stmt 1 view .LVU265 - 547:Src/stm32f7xx_it.c **** else - 1138 .loc 1 547 24 is_stmt 0 view .LVU266 - 1139 02cc 5B08 lsrs r3, r3, #1 - 1140 02ce 013B subs r3, r3, #1 - 1141 02d0 3848 ldr r0, .L102+4 - 1142 02d2 30F81310 ldrh r1, [r0, r3, lsl #1] - 547:Src/stm32f7xx_it.c **** else - 1143 .loc 1 547 51 view .LVU267 - 1144 02d6 01EB0222 add r2, r1, r2, lsl #8 - 1145 02da 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1146 .L84: - 550:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1147 .loc 1 550 13 is_stmt 1 view .LVU268 - 550:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1148 .loc 1 550 23 is_stmt 0 view .LVU269 - 1149 02de 384B ldr r3, .L102+16 - 1150 02e0 0122 movs r2, #1 - 1151 02e2 1A70 strb r2, [r3] - 551:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1152 .loc 1 551 13 is_stmt 1 view .LVU270 - 551:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1153 .loc 1 551 27 is_stmt 0 view .LVU271 - 1154 02e4 0023 movs r3, #0 - 1155 02e6 344A ldr r2, .L102+8 - 1156 02e8 1380 strh r3, [r2] @ movhi + 535:Src/stm32f7xx_it.c **** { + 941 .loc 1 535 17 is_stmt 0 view .LVU197 + 942 01a4 4BF6BB30 movw r0, #48059 + 943 01a8 8142 cmp r1, r0 + 944 01aa 7BD0 beq .L103 + 547:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 945 .loc 1 547 13 is_stmt 1 view .LVU198 + 547:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 946 .loc 1 547 16 is_stmt 0 view .LVU199 + 947 01ac 13F0010F tst r3, #1 + 948 01b0 00F09380 beq .L84 + 548:Src/stm32f7xx_it.c **** else + 949 .loc 1 548 17 is_stmt 1 view .LVU200 + 548:Src/stm32f7xx_it.c **** else + 950 .loc 1 548 24 is_stmt 0 view .LVU201 + 951 01b4 5908 lsrs r1, r3, #1 + 952 01b6 0139 subs r1, r1, #1 + 953 01b8 384C ldr r4, .L106+36 + 954 01ba 34F81100 ldrh r0, [r4, r1, lsl #1] + 548:Src/stm32f7xx_it.c **** else + 955 .loc 1 548 47 view .LVU202 + 956 01be 00EB0222 add r2, r0, r2, lsl #8 + 957 01c2 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 958 .L85: + 551:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 959 .loc 1 551 13 is_stmt 1 view .LVU203 + 551:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 960 .loc 1 551 26 is_stmt 0 view .LVU204 + 961 01c6 0133 adds r3, r3, #1 + 962 01c8 2D4A ldr r2, .L106+8 + 963 01ca 1380 strh r3, [r2] @ movhi 552:Src/stm32f7xx_it.c **** } - 1157 .loc 1 552 13 is_stmt 1 view .LVU272 + 964 .loc 1 552 13 is_stmt 1 view .LVU205 552:Src/stm32f7xx_it.c **** } - 1158 .loc 1 552 21 is_stmt 0 view .LVU273 - 1159 02ea 364A ldr r2, .L102+20 - 1160 02ec 1370 strb r3, [r2] - 1161 02ee C0E6 b .L48 - ARM GAS /tmp/cczi2eQD.s page 164 + 965 .loc 1 552 39 is_stmt 0 view .LVU206 + 966 01cc 344B ldr r3, .L106+40 + 967 01ce 0022 movs r2, #0 + 968 01d0 1A70 strb r2, [r3] + 969 01d2 4EE7 b .L48 + 970 .L100: + 507:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 971 .loc 1 507 13 is_stmt 1 view .LVU207 + 507:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 972 .loc 1 507 16 is_stmt 0 view .LVU208 + 973 01d4 13F0010F tst r3, #1 + 974 01d8 11D0 beq .L73 + 508:Src/stm32f7xx_it.c **** else + 975 .loc 1 508 17 is_stmt 1 view .LVU209 + 508:Src/stm32f7xx_it.c **** else + 976 .loc 1 508 24 is_stmt 0 view .LVU210 + 977 01da 5B08 lsrs r3, r3, #1 + 978 01dc 013B subs r3, r3, #1 + 979 01de 2F48 ldr r0, .L106+36 + 980 01e0 30F81310 ldrh r1, [r0, r3, lsl #1] + 508:Src/stm32f7xx_it.c **** else + 981 .loc 1 508 51 view .LVU211 + 982 01e4 01EB0222 add r2, r1, r2, lsl #8 + ARM GAS /tmp/ccqZqdXP.s page 160 - 1162 .L83: - 549:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1163 .loc 1 549 17 is_stmt 1 view .LVU274 - 549:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1164 .loc 1 549 40 is_stmt 0 view .LVU275 - 1165 02f0 5B08 lsrs r3, r3, #1 - 549:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1166 .loc 1 549 46 view .LVU276 - 1167 02f2 013B subs r3, r3, #1 - 549:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1168 .loc 1 549 51 view .LVU277 - 1169 02f4 2F49 ldr r1, .L102+4 - 1170 02f6 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1171 02fa F0E7 b .L84 - 1172 .L85: - 559:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1173 .loc 1 559 17 is_stmt 1 view .LVU278 - 559:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1174 .loc 1 559 39 is_stmt 0 view .LVU279 - 1175 02fc 5908 lsrs r1, r3, #1 - 559:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1176 .loc 1 559 43 view .LVU280 - 1177 02fe 0139 subs r1, r1, #1 - 559:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1178 .loc 1 559 47 view .LVU281 - 1179 0300 2C48 ldr r0, .L102+4 - 1180 0302 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1181 0306 D7E7 b .L86 - 1182 .L50: - 565:Src/stm32f7xx_it.c **** { - 1183 .loc 1 565 9 is_stmt 1 view .LVU282 - 565:Src/stm32f7xx_it.c **** { - 1184 .loc 1 565 25 is_stmt 0 view .LVU283 - 1185 0308 2949 ldr r1, .L102 - 1186 030a 0888 ldrh r0, [r1] - 565:Src/stm32f7xx_it.c **** { - 1187 .loc 1 565 12 view .LVU284 - 1188 030c 47F27771 movw r1, #30583 - 1189 0310 8842 cmp r0, r1 - 1190 0312 12D0 beq .L99 - 577:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1191 .loc 1 577 13 is_stmt 1 view .LVU285 - 577:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1192 .loc 1 577 16 is_stmt 0 view .LVU286 - 1193 0314 13F0010F tst r3, #1 - 1194 0318 2AD0 beq .L90 - 578:Src/stm32f7xx_it.c **** else - 1195 .loc 1 578 17 is_stmt 1 view .LVU287 - 578:Src/stm32f7xx_it.c **** else - 1196 .loc 1 578 24 is_stmt 0 view .LVU288 - 1197 031a 5908 lsrs r1, r3, #1 - 1198 031c 0139 subs r1, r1, #1 - 1199 031e 254C ldr r4, .L102+4 - 1200 0320 34F81100 ldrh r0, [r4, r1, lsl #1] - 578:Src/stm32f7xx_it.c **** else - 1201 .loc 1 578 47 view .LVU289 - 1202 0324 00EB0222 add r2, r0, r2, lsl #8 - ARM GAS /tmp/cczi2eQD.s page 165 + 983 01e8 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 984 .L74: + 511:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 985 .loc 1 511 13 is_stmt 1 view .LVU212 + 511:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 986 .loc 1 511 23 is_stmt 0 view .LVU213 + 987 01ec 294B ldr r3, .L106+28 + 988 01ee 0A22 movs r2, #10 + 989 01f0 1A70 strb r2, [r3] + 512:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 990 .loc 1 512 13 is_stmt 1 view .LVU214 + 512:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 991 .loc 1 512 27 is_stmt 0 view .LVU215 + 992 01f2 0023 movs r3, #0 + 993 01f4 224A ldr r2, .L106+8 + 994 01f6 1380 strh r3, [r2] @ movhi + 513:Src/stm32f7xx_it.c **** } + 995 .loc 1 513 13 is_stmt 1 view .LVU216 + 513:Src/stm32f7xx_it.c **** } + 996 .loc 1 513 21 is_stmt 0 view .LVU217 + 997 01f8 244A ldr r2, .L106+20 + 998 01fa 1370 strb r3, [r2] + 999 01fc 39E7 b .L48 + 1000 .L73: + 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1001 .loc 1 510 17 is_stmt 1 view .LVU218 + 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1002 .loc 1 510 40 is_stmt 0 view .LVU219 + 1003 01fe 5B08 lsrs r3, r3, #1 + 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1004 .loc 1 510 46 view .LVU220 + 1005 0200 013B subs r3, r3, #1 + 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1006 .loc 1 510 51 view .LVU221 + 1007 0202 2649 ldr r1, .L106+36 + 1008 0204 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1009 0208 F0E7 b .L74 + 1010 .L101: + 517:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1011 .loc 1 517 13 is_stmt 1 view .LVU222 + 517:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1012 .loc 1 517 16 is_stmt 0 view .LVU223 + 1013 020a 13F0010F tst r3, #1 + 1014 020e 11D0 beq .L76 + 518:Src/stm32f7xx_it.c **** else + 1015 .loc 1 518 17 is_stmt 1 view .LVU224 + 518:Src/stm32f7xx_it.c **** else + 1016 .loc 1 518 24 is_stmt 0 view .LVU225 + 1017 0210 5B08 lsrs r3, r3, #1 + 1018 0212 013B subs r3, r3, #1 + 1019 0214 2148 ldr r0, .L106+36 + 1020 0216 30F81310 ldrh r1, [r0, r3, lsl #1] + 518:Src/stm32f7xx_it.c **** else + 1021 .loc 1 518 51 view .LVU226 + 1022 021a 01EB0222 add r2, r1, r2, lsl #8 + 1023 021e 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1024 .L77: + ARM GAS /tmp/ccqZqdXP.s page 161 - 1203 0328 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 1204 .L91: - 581:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1205 .loc 1 581 13 is_stmt 1 view .LVU290 - 581:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1206 .loc 1 581 26 is_stmt 0 view .LVU291 - 1207 032c 0133 adds r3, r3, #1 - 1208 032e 224A ldr r2, .L102+8 - 1209 0330 1380 strh r3, [r2] @ movhi - 582:Src/stm32f7xx_it.c **** } - 1210 .loc 1 582 13 is_stmt 1 view .LVU292 - 582:Src/stm32f7xx_it.c **** } - 1211 .loc 1 582 39 is_stmt 0 view .LVU293 - 1212 0332 224B ldr r3, .L102+12 - 1213 0334 0022 movs r2, #0 - 1214 0336 1A70 strb r2, [r3] - 1215 0338 9BE6 b .L48 - 1216 .L99: - 567:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1217 .loc 1 567 13 is_stmt 1 view .LVU294 - 567:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1218 .loc 1 567 16 is_stmt 0 view .LVU295 - 1219 033a 13F0010F tst r3, #1 - 1220 033e 11D0 beq .L88 - 568:Src/stm32f7xx_it.c **** else - 1221 .loc 1 568 16 is_stmt 1 view .LVU296 - 568:Src/stm32f7xx_it.c **** else - 1222 .loc 1 568 23 is_stmt 0 view .LVU297 - 1223 0340 5B08 lsrs r3, r3, #1 - 1224 0342 013B subs r3, r3, #1 - 1225 0344 1B48 ldr r0, .L102+4 - 1226 0346 30F81310 ldrh r1, [r0, r3, lsl #1] - 568:Src/stm32f7xx_it.c **** else - 1227 .loc 1 568 46 view .LVU298 - 1228 034a 01EB0222 add r2, r1, r2, lsl #8 - 1229 034e 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1230 .L89: - 571:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1231 .loc 1 571 13 is_stmt 1 view .LVU299 - 571:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1232 .loc 1 571 23 is_stmt 0 view .LVU300 - 1233 0352 1B4B ldr r3, .L102+16 - 1234 0354 0822 movs r2, #8 - 1235 0356 1A70 strb r2, [r3] - 572:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1236 .loc 1 572 13 is_stmt 1 view .LVU301 - 572:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1237 .loc 1 572 27 is_stmt 0 view .LVU302 - 1238 0358 0023 movs r3, #0 - 1239 035a 174A ldr r2, .L102+8 - 1240 035c 1380 strh r3, [r2] @ movhi - 573:Src/stm32f7xx_it.c **** } - 1241 .loc 1 573 13 is_stmt 1 view .LVU303 - 573:Src/stm32f7xx_it.c **** } - 1242 .loc 1 573 21 is_stmt 0 view .LVU304 - 1243 035e 194A ldr r2, .L102+20 - 1244 0360 1370 strb r3, [r2] - ARM GAS /tmp/cczi2eQD.s page 166 + 521:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1025 .loc 1 521 13 is_stmt 1 view .LVU227 + 521:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1026 .loc 1 521 23 is_stmt 0 view .LVU228 + 1027 0222 1C4B ldr r3, .L106+28 + 1028 0224 0B22 movs r2, #11 + 1029 0226 1A70 strb r2, [r3] + 522:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1030 .loc 1 522 13 is_stmt 1 view .LVU229 + 522:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1031 .loc 1 522 27 is_stmt 0 view .LVU230 + 1032 0228 0023 movs r3, #0 + 1033 022a 154A ldr r2, .L106+8 + 1034 022c 1380 strh r3, [r2] @ movhi + 523:Src/stm32f7xx_it.c **** } + 1035 .loc 1 523 13 is_stmt 1 view .LVU231 + 523:Src/stm32f7xx_it.c **** } + 1036 .loc 1 523 21 is_stmt 0 view .LVU232 + 1037 022e 174A ldr r2, .L106+20 + 1038 0230 1370 strb r3, [r2] + 1039 0232 1EE7 b .L48 + 1040 .L76: + 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1041 .loc 1 520 17 is_stmt 1 view .LVU233 + 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1042 .loc 1 520 40 is_stmt 0 view .LVU234 + 1043 0234 5B08 lsrs r3, r3, #1 + 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1044 .loc 1 520 46 view .LVU235 + 1045 0236 013B subs r3, r3, #1 + 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1046 .loc 1 520 51 view .LVU236 + 1047 0238 1849 ldr r1, .L106+36 + 1048 023a 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1049 023e F0E7 b .L77 + 1050 .L102: + 527:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1051 .loc 1 527 13 is_stmt 1 view .LVU237 + 527:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1052 .loc 1 527 16 is_stmt 0 view .LVU238 + 1053 0240 13F0010F tst r3, #1 + 1054 0244 11D0 beq .L79 + 528:Src/stm32f7xx_it.c **** else + 1055 .loc 1 528 17 is_stmt 1 view .LVU239 + 528:Src/stm32f7xx_it.c **** else + 1056 .loc 1 528 24 is_stmt 0 view .LVU240 + 1057 0246 5B08 lsrs r3, r3, #1 + 1058 0248 013B subs r3, r3, #1 + 1059 024a 1448 ldr r0, .L106+36 + 1060 024c 30F81310 ldrh r1, [r0, r3, lsl #1] + 528:Src/stm32f7xx_it.c **** else + 1061 .loc 1 528 51 view .LVU241 + 1062 0250 01EB0222 add r2, r1, r2, lsl #8 + 1063 0254 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1064 .L80: + 531:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1065 .loc 1 531 13 is_stmt 1 view .LVU242 + ARM GAS /tmp/ccqZqdXP.s page 162 - 1245 0362 86E6 b .L48 - 1246 .L88: - 570:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1247 .loc 1 570 17 is_stmt 1 view .LVU305 - 570:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1248 .loc 1 570 39 is_stmt 0 view .LVU306 - 1249 0364 5B08 lsrs r3, r3, #1 - 570:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1250 .loc 1 570 43 view .LVU307 - 1251 0366 013B subs r3, r3, #1 - 570:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1252 .loc 1 570 47 view .LVU308 - 1253 0368 1249 ldr r1, .L102+4 - 1254 036a 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1255 036e F0E7 b .L89 - 1256 .L90: - 580:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1257 .loc 1 580 17 is_stmt 1 view .LVU309 - 580:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1258 .loc 1 580 39 is_stmt 0 view .LVU310 - 1259 0370 5908 lsrs r1, r3, #1 - 580:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1260 .loc 1 580 43 view .LVU311 - 1261 0372 0139 subs r1, r1, #1 - 580:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1262 .loc 1 580 47 view .LVU312 - 1263 0374 0F48 ldr r0, .L102+4 - 1264 0376 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1265 037a D7E7 b .L91 - 1266 .L49: - 586:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1267 .loc 1 586 9 is_stmt 1 view .LVU313 - 586:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1268 .loc 1 586 12 is_stmt 0 view .LVU314 - 1269 037c 13F0010F tst r3, #1 - 1270 0380 0FD0 beq .L92 - 587:Src/stm32f7xx_it.c **** else - 1271 .loc 1 587 13 is_stmt 1 view .LVU315 - 587:Src/stm32f7xx_it.c **** else - 1272 .loc 1 587 20 is_stmt 0 view .LVU316 - 1273 0382 5908 lsrs r1, r3, #1 - 1274 0384 0139 subs r1, r1, #1 - 1275 0386 0B4C ldr r4, .L102+4 - 1276 0388 34F81100 ldrh r0, [r4, r1, lsl #1] - 587:Src/stm32f7xx_it.c **** else - 1277 .loc 1 587 43 view .LVU317 - 1278 038c 00EB0222 add r2, r0, r2, lsl #8 - 1279 0390 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 1280 .L93: - 590:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1281 .loc 1 590 9 is_stmt 1 view .LVU318 - 590:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1282 .loc 1 590 22 is_stmt 0 view .LVU319 - 1283 0394 0133 adds r3, r3, #1 - 1284 0396 084A ldr r2, .L102+8 - 1285 0398 1380 strh r3, [r2] @ movhi - 591:Src/stm32f7xx_it.c **** break; - ARM GAS /tmp/cczi2eQD.s page 167 + 531:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1066 .loc 1 531 23 is_stmt 0 view .LVU243 + 1067 0258 0E4B ldr r3, .L106+28 + 1068 025a 0C22 movs r2, #12 + 1069 025c 1A70 strb r2, [r3] + 532:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1070 .loc 1 532 13 is_stmt 1 view .LVU244 + 532:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1071 .loc 1 532 27 is_stmt 0 view .LVU245 + 1072 025e 0023 movs r3, #0 + 1073 0260 074A ldr r2, .L106+8 + 1074 0262 1380 strh r3, [r2] @ movhi + 533:Src/stm32f7xx_it.c **** } + 1075 .loc 1 533 13 is_stmt 1 view .LVU246 + 533:Src/stm32f7xx_it.c **** } + 1076 .loc 1 533 21 is_stmt 0 view .LVU247 + 1077 0264 094A ldr r2, .L106+20 + 1078 0266 1370 strb r3, [r2] + 1079 0268 03E7 b .L48 + 1080 .L79: + 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1081 .loc 1 530 17 is_stmt 1 view .LVU248 + 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1082 .loc 1 530 40 is_stmt 0 view .LVU249 + 1083 026a 5B08 lsrs r3, r3, #1 + 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1084 .loc 1 530 46 view .LVU250 + 1085 026c 013B subs r3, r3, #1 + 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1086 .loc 1 530 51 view .LVU251 + 1087 026e 0B49 ldr r1, .L106+36 + 1088 0270 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1089 0274 F0E7 b .L80 + 1090 .L107: + 1091 0276 00BF .align 2 + 1092 .L106: + 1093 0278 00100140 .word 1073811456 + 1094 027c 00000000 .word uart_buf + 1095 0280 00000000 .word UART_rec_incr + 1096 0284 00000000 .word TO6 + 1097 0288 00000000 .word TO6_uart + 1098 028c 00000000 .word flg_tmt + 1099 0290 00000000 .word UART_header + 1100 0294 00000000 .word CPU_state + 1101 0298 00000000 .word State_Data + 1102 029c 00000000 .word COMMAND + 1103 02a0 00000000 .word UART_transmission_request + 1104 .L103: + 537:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1105 .loc 1 537 13 is_stmt 1 view .LVU252 + 537:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1106 .loc 1 537 16 is_stmt 0 view .LVU253 + 1107 02a4 13F0010F tst r3, #1 + 1108 02a8 11D0 beq .L82 + 538:Src/stm32f7xx_it.c **** else + 1109 .loc 1 538 17 is_stmt 1 view .LVU254 + 538:Src/stm32f7xx_it.c **** else + ARM GAS /tmp/ccqZqdXP.s page 163 - 1286 .loc 1 591 9 is_stmt 1 view .LVU320 - 591:Src/stm32f7xx_it.c **** break; - 1287 .loc 1 591 35 is_stmt 0 view .LVU321 - 1288 039a 084B ldr r3, .L102+12 - 1289 039c 0022 movs r2, #0 - 1290 039e 1A70 strb r2, [r3] - 592:Src/stm32f7xx_it.c **** } - 1291 .loc 1 592 5 is_stmt 1 view .LVU322 - 1292 .loc 1 595 1 is_stmt 0 view .LVU323 - 1293 03a0 67E6 b .L48 - 1294 .L92: - 589:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1295 .loc 1 589 13 is_stmt 1 view .LVU324 - 589:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1296 .loc 1 589 35 is_stmt 0 view .LVU325 - 1297 03a2 5908 lsrs r1, r3, #1 - 589:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1298 .loc 1 589 39 view .LVU326 - 1299 03a4 0139 subs r1, r1, #1 - 589:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1300 .loc 1 589 43 view .LVU327 - 1301 03a6 0348 ldr r0, .L102+4 - 1302 03a8 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1303 03ac F2E7 b .L93 - 1304 .L103: - 1305 03ae 00BF .align 2 - 1306 .L102: - 1307 03b0 00000000 .word UART_header - 1308 03b4 00000000 .word COMMAND - 1309 03b8 00000000 .word UART_rec_incr - 1310 03bc 00000000 .word UART_transmission_request - 1311 03c0 00000000 .word CPU_state - 1312 03c4 00000000 .word flg_tmt - 1313 .cfi_endproc - 1314 .LFE1202: - 1316 .section .text.USART1_IRQHandler,"ax",%progbits - 1317 .align 1 - 1318 .global USART1_IRQHandler - 1319 .syntax unified - 1320 .thumb - 1321 .thumb_func - 1323 USART1_IRQHandler: - 1324 .LFB1196: + 1110 .loc 1 538 24 is_stmt 0 view .LVU255 + 1111 02aa 5B08 lsrs r3, r3, #1 + 1112 02ac 013B subs r3, r3, #1 + 1113 02ae 5448 ldr r0, .L108 + 1114 02b0 30F81310 ldrh r1, [r0, r3, lsl #1] + 538:Src/stm32f7xx_it.c **** else + 1115 .loc 1 538 51 view .LVU256 + 1116 02b4 01EB0222 add r2, r1, r2, lsl #8 + 1117 02b8 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1118 .L83: + 541:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1119 .loc 1 541 13 is_stmt 1 view .LVU257 + 541:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1120 .loc 1 541 23 is_stmt 0 view .LVU258 + 1121 02bc 514B ldr r3, .L108+4 + 1122 02be 0D22 movs r2, #13 + 1123 02c0 1A70 strb r2, [r3] + 542:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1124 .loc 1 542 13 is_stmt 1 view .LVU259 + 542:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1125 .loc 1 542 27 is_stmt 0 view .LVU260 + 1126 02c2 0023 movs r3, #0 + 1127 02c4 504A ldr r2, .L108+8 + 1128 02c6 1380 strh r3, [r2] @ movhi + 543:Src/stm32f7xx_it.c **** } + 1129 .loc 1 543 13 is_stmt 1 view .LVU261 + 543:Src/stm32f7xx_it.c **** } + 1130 .loc 1 543 21 is_stmt 0 view .LVU262 + 1131 02c8 504A ldr r2, .L108+12 + 1132 02ca 1370 strb r3, [r2] + 1133 02cc D1E6 b .L48 + 1134 .L82: + 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1135 .loc 1 540 17 is_stmt 1 view .LVU263 + 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1136 .loc 1 540 40 is_stmt 0 view .LVU264 + 1137 02ce 5B08 lsrs r3, r3, #1 + 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1138 .loc 1 540 46 view .LVU265 + 1139 02d0 013B subs r3, r3, #1 + 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1140 .loc 1 540 51 view .LVU266 + 1141 02d2 4B49 ldr r1, .L108 + 1142 02d4 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1143 02d8 F0E7 b .L83 + 1144 .L84: + 550:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1145 .loc 1 550 17 is_stmt 1 view .LVU267 + 550:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1146 .loc 1 550 39 is_stmt 0 view .LVU268 + 1147 02da 5908 lsrs r1, r3, #1 + 550:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1148 .loc 1 550 43 view .LVU269 + 1149 02dc 0139 subs r1, r1, #1 + 550:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1150 .loc 1 550 47 view .LVU270 + 1151 02de 4848 ldr r0, .L108 + ARM GAS /tmp/ccqZqdXP.s page 164 + + + 1152 02e0 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1153 02e4 6FE7 b .L85 + 1154 .L52: + 557:Src/stm32f7xx_it.c **** { + 1155 .loc 1 557 9 is_stmt 1 view .LVU271 + 557:Src/stm32f7xx_it.c **** { + 1156 .loc 1 557 25 is_stmt 0 view .LVU272 + 1157 02e6 4A49 ldr r1, .L108+16 + 1158 02e8 0888 ldrh r0, [r1] + 557:Src/stm32f7xx_it.c **** { + 1159 .loc 1 557 12 view .LVU273 + 1160 02ea 41F21111 movw r1, #4369 + 1161 02ee 8842 cmp r0, r1 + 1162 02f0 12D0 beq .L104 + 569:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1163 .loc 1 569 13 is_stmt 1 view .LVU274 + 569:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1164 .loc 1 569 16 is_stmt 0 view .LVU275 + 1165 02f2 13F0010F tst r3, #1 + 1166 02f6 2AD0 beq .L89 + 570:Src/stm32f7xx_it.c **** else + 1167 .loc 1 570 17 is_stmt 1 view .LVU276 + 570:Src/stm32f7xx_it.c **** else + 1168 .loc 1 570 24 is_stmt 0 view .LVU277 + 1169 02f8 5908 lsrs r1, r3, #1 + 1170 02fa 0139 subs r1, r1, #1 + 1171 02fc 404C ldr r4, .L108 + 1172 02fe 34F81100 ldrh r0, [r4, r1, lsl #1] + 570:Src/stm32f7xx_it.c **** else + 1173 .loc 1 570 47 view .LVU278 + 1174 0302 00EB0222 add r2, r0, r2, lsl #8 + 1175 0306 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1176 .L90: + 573:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1177 .loc 1 573 12 is_stmt 1 view .LVU279 + 573:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1178 .loc 1 573 25 is_stmt 0 view .LVU280 + 1179 030a 0133 adds r3, r3, #1 + 1180 030c 3E4A ldr r2, .L108+8 + 1181 030e 1380 strh r3, [r2] @ movhi + 574:Src/stm32f7xx_it.c **** } + 1182 .loc 1 574 12 is_stmt 1 view .LVU281 + 574:Src/stm32f7xx_it.c **** } + 1183 .loc 1 574 38 is_stmt 0 view .LVU282 + 1184 0310 404B ldr r3, .L108+20 + 1185 0312 0022 movs r2, #0 + 1186 0314 1A70 strb r2, [r3] + 1187 0316 ACE6 b .L48 + 1188 .L104: + 559:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1189 .loc 1 559 13 is_stmt 1 view .LVU283 + 559:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1190 .loc 1 559 16 is_stmt 0 view .LVU284 + 1191 0318 13F0010F tst r3, #1 + 1192 031c 11D0 beq .L87 + 560:Src/stm32f7xx_it.c **** else + 1193 .loc 1 560 17 is_stmt 1 view .LVU285 + ARM GAS /tmp/ccqZqdXP.s page 165 + + + 560:Src/stm32f7xx_it.c **** else + 1194 .loc 1 560 24 is_stmt 0 view .LVU286 + 1195 031e 5B08 lsrs r3, r3, #1 + 1196 0320 013B subs r3, r3, #1 + 1197 0322 3748 ldr r0, .L108 + 1198 0324 30F81310 ldrh r1, [r0, r3, lsl #1] + 560:Src/stm32f7xx_it.c **** else + 1199 .loc 1 560 51 view .LVU287 + 1200 0328 01EB0222 add r2, r1, r2, lsl #8 + 1201 032c 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1202 .L88: + 563:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1203 .loc 1 563 13 is_stmt 1 view .LVU288 + 563:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1204 .loc 1 563 23 is_stmt 0 view .LVU289 + 1205 0330 344B ldr r3, .L108+4 + 1206 0332 0122 movs r2, #1 + 1207 0334 1A70 strb r2, [r3] + 564:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1208 .loc 1 564 13 is_stmt 1 view .LVU290 + 564:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1209 .loc 1 564 27 is_stmt 0 view .LVU291 + 1210 0336 0023 movs r3, #0 + 1211 0338 334A ldr r2, .L108+8 + 1212 033a 1380 strh r3, [r2] @ movhi + 565:Src/stm32f7xx_it.c **** } + 1213 .loc 1 565 13 is_stmt 1 view .LVU292 + 565:Src/stm32f7xx_it.c **** } + 1214 .loc 1 565 21 is_stmt 0 view .LVU293 + 1215 033c 334A ldr r2, .L108+12 + 1216 033e 1370 strb r3, [r2] + 1217 0340 97E6 b .L48 + 1218 .L87: + 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1219 .loc 1 562 17 is_stmt 1 view .LVU294 + 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1220 .loc 1 562 40 is_stmt 0 view .LVU295 + 1221 0342 5B08 lsrs r3, r3, #1 + 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1222 .loc 1 562 46 view .LVU296 + 1223 0344 013B subs r3, r3, #1 + 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1224 .loc 1 562 51 view .LVU297 + 1225 0346 2E49 ldr r1, .L108 + 1226 0348 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1227 034c F0E7 b .L88 + 1228 .L89: + 572:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1229 .loc 1 572 17 is_stmt 1 view .LVU298 + 572:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1230 .loc 1 572 39 is_stmt 0 view .LVU299 + 1231 034e 5908 lsrs r1, r3, #1 + 572:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1232 .loc 1 572 43 view .LVU300 + 1233 0350 0139 subs r1, r1, #1 + 572:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1234 .loc 1 572 47 view .LVU301 + ARM GAS /tmp/ccqZqdXP.s page 166 + + + 1235 0352 2B48 ldr r0, .L108 + 1236 0354 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1237 0358 D7E7 b .L90 + 1238 .L50: + 578:Src/stm32f7xx_it.c **** { + 1239 .loc 1 578 9 is_stmt 1 view .LVU302 + 578:Src/stm32f7xx_it.c **** { + 1240 .loc 1 578 25 is_stmt 0 view .LVU303 + 1241 035a 2D49 ldr r1, .L108+16 + 1242 035c 0888 ldrh r0, [r1] + 578:Src/stm32f7xx_it.c **** { + 1243 .loc 1 578 12 view .LVU304 + 1244 035e 47F27771 movw r1, #30583 + 1245 0362 8842 cmp r0, r1 + 1246 0364 12D0 beq .L105 + 590:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1247 .loc 1 590 13 is_stmt 1 view .LVU305 + 590:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1248 .loc 1 590 16 is_stmt 0 view .LVU306 + 1249 0366 13F0010F tst r3, #1 + 1250 036a 2AD0 beq .L94 + 591:Src/stm32f7xx_it.c **** else + 1251 .loc 1 591 17 is_stmt 1 view .LVU307 + 591:Src/stm32f7xx_it.c **** else + 1252 .loc 1 591 24 is_stmt 0 view .LVU308 + 1253 036c 5908 lsrs r1, r3, #1 + 1254 036e 0139 subs r1, r1, #1 + 1255 0370 234C ldr r4, .L108 + 1256 0372 34F81100 ldrh r0, [r4, r1, lsl #1] + 591:Src/stm32f7xx_it.c **** else + 1257 .loc 1 591 47 view .LVU309 + 1258 0376 00EB0222 add r2, r0, r2, lsl #8 + 1259 037a 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1260 .L95: + 594:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1261 .loc 1 594 13 is_stmt 1 view .LVU310 + 594:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1262 .loc 1 594 26 is_stmt 0 view .LVU311 + 1263 037e 0133 adds r3, r3, #1 + 1264 0380 214A ldr r2, .L108+8 + 1265 0382 1380 strh r3, [r2] @ movhi + 595:Src/stm32f7xx_it.c **** } + 1266 .loc 1 595 13 is_stmt 1 view .LVU312 + 595:Src/stm32f7xx_it.c **** } + 1267 .loc 1 595 39 is_stmt 0 view .LVU313 + 1268 0384 234B ldr r3, .L108+20 + 1269 0386 0022 movs r2, #0 + 1270 0388 1A70 strb r2, [r3] + 1271 038a 72E6 b .L48 + 1272 .L105: + 580:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1273 .loc 1 580 13 is_stmt 1 view .LVU314 + 580:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1274 .loc 1 580 16 is_stmt 0 view .LVU315 + 1275 038c 13F0010F tst r3, #1 + 1276 0390 11D0 beq .L92 + 581:Src/stm32f7xx_it.c **** else + ARM GAS /tmp/ccqZqdXP.s page 167 + + + 1277 .loc 1 581 16 is_stmt 1 view .LVU316 + 581:Src/stm32f7xx_it.c **** else + 1278 .loc 1 581 23 is_stmt 0 view .LVU317 + 1279 0392 5B08 lsrs r3, r3, #1 + 1280 0394 013B subs r3, r3, #1 + 1281 0396 1A48 ldr r0, .L108 + 1282 0398 30F81310 ldrh r1, [r0, r3, lsl #1] + 581:Src/stm32f7xx_it.c **** else + 1283 .loc 1 581 46 view .LVU318 + 1284 039c 01EB0222 add r2, r1, r2, lsl #8 + 1285 03a0 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1286 .L93: + 584:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1287 .loc 1 584 13 is_stmt 1 view .LVU319 + 584:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1288 .loc 1 584 23 is_stmt 0 view .LVU320 + 1289 03a4 174B ldr r3, .L108+4 + 1290 03a6 0822 movs r2, #8 + 1291 03a8 1A70 strb r2, [r3] + 585:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1292 .loc 1 585 13 is_stmt 1 view .LVU321 + 585:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1293 .loc 1 585 27 is_stmt 0 view .LVU322 + 1294 03aa 0023 movs r3, #0 + 1295 03ac 164A ldr r2, .L108+8 + 1296 03ae 1380 strh r3, [r2] @ movhi + 586:Src/stm32f7xx_it.c **** } + 1297 .loc 1 586 13 is_stmt 1 view .LVU323 + 586:Src/stm32f7xx_it.c **** } + 1298 .loc 1 586 21 is_stmt 0 view .LVU324 + 1299 03b0 164A ldr r2, .L108+12 + 1300 03b2 1370 strb r3, [r2] + 1301 03b4 5DE6 b .L48 + 1302 .L92: + 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1303 .loc 1 583 17 is_stmt 1 view .LVU325 + 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1304 .loc 1 583 39 is_stmt 0 view .LVU326 + 1305 03b6 5B08 lsrs r3, r3, #1 + 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1306 .loc 1 583 43 view .LVU327 + 1307 03b8 013B subs r3, r3, #1 + 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1308 .loc 1 583 47 view .LVU328 + 1309 03ba 1149 ldr r1, .L108 + 1310 03bc 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1311 03c0 F0E7 b .L93 + 1312 .L94: + 593:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1313 .loc 1 593 17 is_stmt 1 view .LVU329 + 593:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1314 .loc 1 593 39 is_stmt 0 view .LVU330 + 1315 03c2 5908 lsrs r1, r3, #1 + 593:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1316 .loc 1 593 43 view .LVU331 + 1317 03c4 0139 subs r1, r1, #1 + 593:Src/stm32f7xx_it.c **** UART_rec_incr++; + ARM GAS /tmp/ccqZqdXP.s page 168 + + + 1318 .loc 1 593 47 view .LVU332 + 1319 03c6 0E48 ldr r0, .L108 + 1320 03c8 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1321 03cc D7E7 b .L95 + 1322 .L49: + 599:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1323 .loc 1 599 9 is_stmt 1 view .LVU333 + 599:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1324 .loc 1 599 12 is_stmt 0 view .LVU334 + 1325 03ce 13F0010F tst r3, #1 + 1326 03d2 0FD0 beq .L96 + 600:Src/stm32f7xx_it.c **** else + 1327 .loc 1 600 13 is_stmt 1 view .LVU335 + 600:Src/stm32f7xx_it.c **** else + 1328 .loc 1 600 20 is_stmt 0 view .LVU336 + 1329 03d4 5908 lsrs r1, r3, #1 + 1330 03d6 0139 subs r1, r1, #1 + 1331 03d8 094C ldr r4, .L108 + 1332 03da 34F81100 ldrh r0, [r4, r1, lsl #1] + 600:Src/stm32f7xx_it.c **** else + 1333 .loc 1 600 43 view .LVU337 + 1334 03de 00EB0222 add r2, r0, r2, lsl #8 + 1335 03e2 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1336 .L97: + 603:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1337 .loc 1 603 9 is_stmt 1 view .LVU338 + 603:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1338 .loc 1 603 22 is_stmt 0 view .LVU339 + 1339 03e6 0133 adds r3, r3, #1 + 1340 03e8 074A ldr r2, .L108+8 + 1341 03ea 1380 strh r3, [r2] @ movhi + 604:Src/stm32f7xx_it.c **** break; + 1342 .loc 1 604 9 is_stmt 1 view .LVU340 + 604:Src/stm32f7xx_it.c **** break; + 1343 .loc 1 604 35 is_stmt 0 view .LVU341 + 1344 03ec 094B ldr r3, .L108+20 + 1345 03ee 0022 movs r2, #0 + 1346 03f0 1A70 strb r2, [r3] + 605:Src/stm32f7xx_it.c **** } + 1347 .loc 1 605 5 is_stmt 1 view .LVU342 + 1348 .loc 1 608 1 is_stmt 0 view .LVU343 + 1349 03f2 3EE6 b .L48 + 1350 .L96: + 602:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1351 .loc 1 602 13 is_stmt 1 view .LVU344 + 602:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1352 .loc 1 602 35 is_stmt 0 view .LVU345 + 1353 03f4 5908 lsrs r1, r3, #1 + 602:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1354 .loc 1 602 39 view .LVU346 + 1355 03f6 0139 subs r1, r1, #1 + 602:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1356 .loc 1 602 43 view .LVU347 + 1357 03f8 0148 ldr r0, .L108 + 1358 03fa 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1359 03fe F2E7 b .L97 + 1360 .L109: + ARM GAS /tmp/ccqZqdXP.s page 169 + + + 1361 .align 2 + 1362 .L108: + 1363 0400 00000000 .word COMMAND + 1364 0404 00000000 .word CPU_state + 1365 0408 00000000 .word UART_rec_incr + 1366 040c 00000000 .word flg_tmt + 1367 0410 00000000 .word UART_header + 1368 0414 00000000 .word UART_transmission_request + 1369 .cfi_endproc + 1370 .LFE1202: + 1372 .section .text.USART1_IRQHandler,"ax",%progbits + 1373 .align 1 + 1374 .global USART1_IRQHandler + 1375 .syntax unified + 1376 .thumb + 1377 .thumb_func + 1379 USART1_IRQHandler: + 1380 .LFB1196: 277:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */ - 1325 .loc 1 277 1 is_stmt 1 view -0 - 1326 .cfi_startproc - 1327 @ args = 0, pretend = 0, frame = 8 - 1328 @ frame_needed = 0, uses_anonymous_args = 0 - 1329 0000 00B5 push {lr} - 1330 .LCFI9: - 1331 .cfi_def_cfa_offset 4 - 1332 .cfi_offset 14, -4 - 1333 0002 83B0 sub sp, sp, #12 - 1334 .LCFI10: - 1335 .cfi_def_cfa_offset 16 + 1381 .loc 1 277 1 is_stmt 1 view -0 + 1382 .cfi_startproc + 1383 @ args = 0, pretend = 0, frame = 8 + 1384 @ frame_needed = 0, uses_anonymous_args = 0 + 1385 0000 00B5 push {lr} + 1386 .LCFI9: + 1387 .cfi_def_cfa_offset 4 + 1388 .cfi_offset 14, -4 + 1389 0002 83B0 sub sp, sp, #12 + 1390 .LCFI10: + 1391 .cfi_def_cfa_offset 16 279:Src/stm32f7xx_it.c **** if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1)) - 1336 .loc 1 279 3 view .LVU329 - ARM GAS /tmp/cczi2eQD.s page 168 - - + 1392 .loc 1 279 3 view .LVU349 280:Src/stm32f7xx_it.c **** { - 1337 .loc 1 280 3 view .LVU330 - 1338 .LVL19: - 1339 .LBB68: - 1340 .LBI68: + 1393 .loc 1 280 3 view .LVU350 + 1394 .LVL19: + 1395 .LBB68: + 1396 .LBI68: 2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1341 .loc 3 2640 26 view .LVU331 - 1342 .LBB69: + 1397 .loc 3 2640 26 view .LVU351 + 1398 .LBB69: 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1343 .loc 3 2642 3 view .LVU332 + 1399 .loc 3 2642 3 view .LVU352 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1344 .loc 3 2642 12 is_stmt 0 view .LVU333 - 1345 0004 304B ldr r3, .L120 - 1346 0006 DB69 ldr r3, [r3, #28] + 1400 .loc 3 2642 12 is_stmt 0 view .LVU353 + 1401 0004 304B ldr r3, .L126 + 1402 0006 DB69 ldr r3, [r3, #28] 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1347 .loc 3 2642 77 view .LVU334 - 1348 0008 13F0200F tst r3, #32 - 1349 000c 07D0 beq .L105 - 1350 .LVL20: + 1403 .loc 3 2642 77 view .LVU354 + 1404 0008 13F0200F tst r3, #32 + 1405 000c 07D0 beq .L111 + 1406 .LVL20: 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1351 .loc 3 2642 77 view .LVU335 - 1352 .LBE69: - 1353 .LBE68: - 1354 .LBB70: - 1355 .LBI70: + 1407 .loc 3 2642 77 view .LVU355 + 1408 .LBE69: + 1409 .LBE68: + 1410 .LBB70: + 1411 .LBI70: + ARM GAS /tmp/ccqZqdXP.s page 170 + + 3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1356 .loc 3 3366 26 is_stmt 1 view .LVU336 - 1357 .LBB71: + 1412 .loc 3 3366 26 is_stmt 1 view .LVU356 + 1413 .LBB71: 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1358 .loc 3 3368 3 view .LVU337 + 1414 .loc 3 3368 3 view .LVU357 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1359 .loc 3 3368 12 is_stmt 0 view .LVU338 - 1360 000e 2E4B ldr r3, .L120 - 1361 0010 1B68 ldr r3, [r3] + 1415 .loc 3 3368 12 is_stmt 0 view .LVU358 + 1416 000e 2E4B ldr r3, .L126 + 1417 0010 1B68 ldr r3, [r3] 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1362 .loc 3 3368 80 view .LVU339 - 1363 0012 13F0200F tst r3, #32 - 1364 0016 02D0 beq .L105 - 1365 .LVL21: + 1418 .loc 3 3368 80 view .LVU359 + 1419 0012 13F0200F tst r3, #32 + 1420 0016 02D0 beq .L111 + 1421 .LVL21: 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1366 .loc 3 3368 80 view .LVU340 - 1367 .LBE71: - 1368 .LBE70: + 1422 .loc 3 3368 80 view .LVU360 + 1423 .LBE71: + 1424 .LBE70: 282:Src/stm32f7xx_it.c **** } - 1369 .loc 1 282 5 is_stmt 1 view .LVU341 - 1370 0018 FFF7FEFF bl UART_RxCpltCallback - 1371 .LVL22: - 1372 001c 33E0 b .L104 - 1373 .L105: + 1425 .loc 1 282 5 is_stmt 1 view .LVU361 + 1426 0018 FFF7FEFF bl UART_RxCpltCallback + 1427 .LVL22: + 1428 001c 33E0 b .L110 + 1429 .L111: 286:Src/stm32f7xx_it.c **** { - 1374 .loc 1 286 5 view .LVU342 - 1375 .LVL23: - 1376 .LBB72: - 1377 .LBI72: + 1430 .loc 1 286 5 view .LVU362 + 1431 .LVL23: + 1432 .LBB72: + 1433 .LBI72: 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1378 .loc 3 2618 26 view .LVU343 - 1379 .LBB73: - ARM GAS /tmp/cczi2eQD.s page 169 - - + 1434 .loc 3 2618 26 view .LVU363 + 1435 .LBB73: 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1380 .loc 3 2620 3 view .LVU344 + 1436 .loc 3 2620 3 view .LVU364 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1381 .loc 3 2620 12 is_stmt 0 view .LVU345 - 1382 001e 2A4B ldr r3, .L120 - 1383 0020 DB69 ldr r3, [r3, #28] + 1437 .loc 3 2620 12 is_stmt 0 view .LVU365 + 1438 001e 2A4B ldr r3, .L126 + 1439 0020 DB69 ldr r3, [r3, #28] 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1384 .loc 3 2620 75 view .LVU346 - 1385 0022 13F0080F tst r3, #8 - 1386 0026 25D1 bne .L107 - 1387 .LVL24: + 1440 .loc 3 2620 75 view .LVU366 + 1441 0022 13F0080F tst r3, #8 + 1442 0026 25D1 bne .L113 + 1443 .LVL24: 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1388 .loc 3 2620 75 view .LVU347 - 1389 .LBE73: - 1390 .LBE72: + 1444 .loc 3 2620 75 view .LVU367 + 1445 .LBE73: + 1446 .LBE72: 291:Src/stm32f7xx_it.c **** { - 1391 .loc 1 291 10 is_stmt 1 view .LVU348 - 1392 .LBB74: - 1393 .LBI74: + 1447 .loc 1 291 10 is_stmt 1 view .LVU368 + 1448 .LBB74: + 1449 .LBI74: 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1394 .loc 3 2596 26 view .LVU349 - 1395 .LBB75: + 1450 .loc 3 2596 26 view .LVU369 + 1451 .LBB75: 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1396 .loc 3 2598 3 view .LVU350 + 1452 .loc 3 2598 3 view .LVU370 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1397 .loc 3 2598 12 is_stmt 0 view .LVU351 - 1398 0028 274B ldr r3, .L120 - 1399 002a DB69 ldr r3, [r3, #28] + ARM GAS /tmp/ccqZqdXP.s page 171 + + + 1453 .loc 3 2598 12 is_stmt 0 view .LVU371 + 1454 0028 274B ldr r3, .L126 + 1455 002a DB69 ldr r3, [r3, #28] 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1400 .loc 3 2598 73 view .LVU352 - 1401 002c 13F0020F tst r3, #2 - 1402 0030 2CD1 bne .L108 - 1403 .LVL25: + 1456 .loc 3 2598 73 view .LVU372 + 1457 002c 13F0020F tst r3, #2 + 1458 0030 2CD1 bne .L114 + 1459 .LVL25: 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1404 .loc 3 2598 73 view .LVU353 - 1405 .LBE75: - 1406 .LBE74: + 1460 .loc 3 2598 73 view .LVU373 + 1461 .LBE75: + 1462 .LBE74: 296:Src/stm32f7xx_it.c **** { - 1407 .loc 1 296 10 is_stmt 1 view .LVU354 - 1408 .LBB76: - 1409 .LBI76: + 1463 .loc 1 296 10 is_stmt 1 view .LVU374 + 1464 .LBB76: + 1465 .LBI76: 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1410 .loc 3 2607 26 view .LVU355 - 1411 .LBB77: + 1466 .loc 3 2607 26 view .LVU375 + 1467 .LBB77: 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1412 .loc 3 2609 3 view .LVU356 + 1468 .loc 3 2609 3 view .LVU376 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1413 .loc 3 2609 12 is_stmt 0 view .LVU357 - 1414 0032 254B ldr r3, .L120 - 1415 0034 DB69 ldr r3, [r3, #28] + 1469 .loc 3 2609 12 is_stmt 0 view .LVU377 + 1470 0032 254B ldr r3, .L126 + 1471 0034 DB69 ldr r3, [r3, #28] 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1416 .loc 3 2609 73 view .LVU358 - 1417 0036 13F0040F tst r3, #4 - 1418 003a 31D1 bne .L110 - 1419 .LVL26: + 1472 .loc 3 2609 73 view .LVU378 + 1473 0036 13F0040F tst r3, #4 + 1474 003a 31D1 bne .L116 + 1475 .LVL26: 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1420 .loc 3 2609 73 view .LVU359 - ARM GAS /tmp/cczi2eQD.s page 170 - - - 1421 .LBE77: - 1422 .LBE76: + 1476 .loc 3 2609 73 view .LVU379 + 1477 .LBE77: + 1478 .LBE76: 301:Src/stm32f7xx_it.c **** { - 1423 .loc 1 301 10 is_stmt 1 view .LVU360 - 1424 .LBB78: - 1425 .LBI78: + 1479 .loc 1 301 10 is_stmt 1 view .LVU380 + 1480 .LBB78: + 1481 .LBI78: 2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1426 .loc 3 2585 26 view .LVU361 - 1427 .LBB79: + 1482 .loc 3 2585 26 view .LVU381 + 1483 .LBB79: 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1428 .loc 3 2587 3 view .LVU362 + 1484 .loc 3 2587 3 view .LVU382 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1429 .loc 3 2587 12 is_stmt 0 view .LVU363 - 1430 003c 224B ldr r3, .L120 - 1431 003e DB69 ldr r3, [r3, #28] + 1485 .loc 3 2587 12 is_stmt 0 view .LVU383 + 1486 003c 224B ldr r3, .L126 + 1487 003e DB69 ldr r3, [r3, #28] 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1432 .loc 3 2587 73 view .LVU364 - 1433 0040 13F0010F tst r3, #1 - 1434 0044 36D1 bne .L112 - 1435 .LVL27: + 1488 .loc 3 2587 73 view .LVU384 + 1489 0040 13F0010F tst r3, #1 + 1490 0044 36D1 bne .L118 + 1491 .LVL27: 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1436 .loc 3 2587 73 view .LVU365 - 1437 .LBE79: - 1438 .LBE78: + 1492 .loc 3 2587 73 view .LVU385 + 1493 .LBE79: + 1494 .LBE78: 308:Src/stm32f7xx_it.c **** { - 1439 .loc 1 308 7 is_stmt 1 view .LVU366 - 1440 .LBB80: - 1441 .LBI80: + ARM GAS /tmp/ccqZqdXP.s page 172 + + + 1495 .loc 1 308 7 is_stmt 1 view .LVU386 + 1496 .LBB80: + 1497 .LBI80: 2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1442 .loc 3 2651 26 view .LVU367 - 1443 .LBB81: + 1498 .loc 3 2651 26 view .LVU387 + 1499 .LBB81: 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1444 .loc 3 2653 3 view .LVU368 + 1500 .loc 3 2653 3 view .LVU388 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1445 .loc 3 2653 12 is_stmt 0 view .LVU369 - 1446 0046 214B ldr r3, .L120+4 - 1447 0048 DB69 ldr r3, [r3, #28] + 1501 .loc 3 2653 12 is_stmt 0 view .LVU389 + 1502 0046 214B ldr r3, .L126+4 + 1503 0048 DB69 ldr r3, [r3, #28] 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1448 .loc 3 2653 73 view .LVU370 - 1449 004a 13F0400F tst r3, #64 - 1450 004e 1AD0 beq .L104 - 1451 .LVL28: + 1504 .loc 3 2653 73 view .LVU390 + 1505 004a 13F0400F tst r3, #64 + 1506 004e 1AD0 beq .L110 + 1507 .LVL28: 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1452 .loc 3 2653 73 view .LVU371 - 1453 .LBE81: - 1454 .LBE80: - 1455 .LBB82: - 1456 .LBI82: + 1508 .loc 3 2653 73 view .LVU391 + 1509 .LBE81: + 1510 .LBE80: + 1511 .LBB82: + 1512 .LBI82: 3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1457 .loc 3 3377 26 is_stmt 1 view .LVU372 - 1458 .LBB83: + 1513 .loc 3 3377 26 is_stmt 1 view .LVU392 + 1514 .LBB83: 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1459 .loc 3 3379 3 view .LVU373 + 1515 .loc 3 3379 3 view .LVU393 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1460 .loc 3 3379 12 is_stmt 0 view .LVU374 - 1461 0050 1E4B ldr r3, .L120+4 - 1462 0052 1B68 ldr r3, [r3] - ARM GAS /tmp/cczi2eQD.s page 171 - - + 1516 .loc 3 3379 12 is_stmt 0 view .LVU394 + 1517 0050 1E4B ldr r3, .L126+4 + 1518 0052 1B68 ldr r3, [r3] 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1463 .loc 3 3379 77 view .LVU375 - 1464 0054 13F0400F tst r3, #64 - 1465 0058 15D0 beq .L104 - 1466 .LVL29: + 1519 .loc 3 3379 77 view .LVU395 + 1520 0054 13F0400F tst r3, #64 + 1521 0058 15D0 beq .L110 + 1522 .LVL29: 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1467 .loc 3 3379 77 view .LVU376 - 1468 .LBE83: - 1469 .LBE82: + 1523 .loc 3 3379 77 view .LVU396 + 1524 .LBE83: + 1525 .LBE82: 310:Src/stm32f7xx_it.c **** //test_counter += 1; - 1470 .loc 1 310 9 is_stmt 1 view .LVU377 - 1471 .LBB84: - 1472 .LBI84: + 1526 .loc 1 310 9 is_stmt 1 view .LVU397 + 1527 .LBB84: + 1528 .LBI84: 2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1473 .loc 3 2916 22 view .LVU378 - 1474 .LBB85: + 1529 .loc 3 2916 22 view .LVU398 + 1530 .LBB85: 2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1475 .loc 3 2918 3 view .LVU379 - 1476 005a 1B4B ldr r3, .L120 - 1477 005c 4022 movs r2, #64 - 1478 005e 1A62 str r2, [r3, #32] - 1479 .LVL30: + 1531 .loc 3 2918 3 view .LVU399 + 1532 005a 1B4B ldr r3, .L126 + 1533 005c 4022 movs r2, #64 + 1534 005e 1A62 str r2, [r3, #32] + 1535 .LVL30: 2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1480 .loc 3 2918 3 is_stmt 0 view .LVU380 - 1481 .LBE85: - 1482 .LBE84: + 1536 .loc 3 2918 3 is_stmt 0 view .LVU400 + 1537 .LBE85: + ARM GAS /tmp/ccqZqdXP.s page 173 + + + 1538 .LBE84: 313:Src/stm32f7xx_it.c **** //UART_transmission_busy = 0; - 1483 .loc 1 313 9 is_stmt 1 view .LVU381 - 1484 .LBB86: - 1485 .LBI86: + 1539 .loc 1 313 9 is_stmt 1 view .LVU401 + 1540 .LBB86: + 1541 .LBI86: 3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1486 .loc 3 3213 22 view .LVU382 - 1487 .L115: + 1542 .loc 3 3213 22 view .LVU402 + 1543 .L121: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1488 .loc 3 3215 3 discriminator 1 view .LVU383 - 1489 .LBB87: + 1544 .loc 3 3215 3 discriminator 1 view .LVU403 + 1545 .LBB87: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1490 .loc 3 3215 3 discriminator 1 view .LVU384 + 1546 .loc 3 3215 3 discriminator 1 view .LVU404 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1491 .loc 3 3215 3 discriminator 1 view .LVU385 + 1547 .loc 3 3215 3 discriminator 1 view .LVU405 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1492 .loc 3 3215 3 discriminator 1 view .LVU386 - 1493 .LBB88: - 1494 .LBI88: - 1495 .file 4 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1548 .loc 3 3215 3 discriminator 1 view .LVU406 + 1549 .LBB88: + 1550 .LBI88: + 1551 .file 4 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file @@ -10258,9 +10353,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may - ARM GAS /tmp/cczi2eQD.s page 172 - - 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * @@ -10286,6 +10378,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccqZqdXP.s page 174 + + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM @@ -10318,9 +10413,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/cczi2eQD.s page 173 - - 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" @@ -10346,6 +10438,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + ARM GAS /tmp/ccqZqdXP.s page 175 + + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" @@ -10378,9 +10473,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - ARM GAS /tmp/cczi2eQD.s page 174 - - 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) @@ -10406,6 +10498,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + ARM GAS /tmp/ccqZqdXP.s page 176 + + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10438,9 +10533,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); - ARM GAS /tmp/cczi2eQD.s page 175 - - 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10466,6 +10558,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqZqdXP.s page 177 + + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -10498,9 +10593,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cczi2eQD.s page 176 - - 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer @@ -10526,6 +10618,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqZqdXP.s page 178 + + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -10558,9 +10653,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer - ARM GAS /tmp/cczi2eQD.s page 177 - - 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -10586,6 +10678,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqZqdXP.s page 179 + + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10618,9 +10713,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value - ARM GAS /tmp/cczi2eQD.s page 178 - - 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -10646,6 +10738,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + ARM GAS /tmp/ccqZqdXP.s page 180 + + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) @@ -10678,9 +10773,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cczi2eQD.s page 179 - - 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); @@ -10706,6 +10798,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + ARM GAS /tmp/ccqZqdXP.s page 181 + + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) @@ -10738,9 +10833,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cczi2eQD.s page 180 - - 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -10766,6 +10858,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + ARM GAS /tmp/ccqZqdXP.s page 182 + + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10798,9 +10893,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value - ARM GAS /tmp/cczi2eQD.s page 181 - - 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -10826,6 +10918,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqZqdXP.s page 183 + + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask @@ -10858,9 +10953,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cczi2eQD.s page 182 - - 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure @@ -10886,6 +10978,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + ARM GAS /tmp/ccqZqdXP.s page 184 + + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10918,9 +11013,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - ARM GAS /tmp/cczi2eQD.s page 183 - - 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; @@ -10946,6 +11038,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + ARM GAS /tmp/ccqZqdXP.s page 185 + + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -10978,9 +11073,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - ARM GAS /tmp/cczi2eQD.s page 184 - - 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec @@ -11006,6 +11098,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqZqdXP.s page 186 + + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -11038,9 +11133,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/cczi2eQD.s page 185 - - 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11066,6 +11158,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + ARM GAS /tmp/ccqZqdXP.s page 187 + + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else @@ -11098,9 +11193,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ - ARM GAS /tmp/cczi2eQD.s page 186 - - 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ @@ -11126,6 +11218,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccqZqdXP.s page 188 + + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -11158,9 +11253,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/cczi2eQD.s page 187 - - 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11186,6 +11278,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqZqdXP.s page 189 + + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) @@ -11218,9 +11313,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; - ARM GAS /tmp/cczi2eQD.s page 188 - - 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11246,6 +11338,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + ARM GAS /tmp/ccqZqdXP.s page 190 + + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value @@ -11278,9 +11373,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) - ARM GAS /tmp/cczi2eQD.s page 189 - - 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 984:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11306,6 +11398,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros + ARM GAS /tmp/ccqZqdXP.s page 191 + + 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value @@ -11338,9 +11433,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cczi2eQD.s page 190 - - 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) @@ -11366,43 +11458,43 @@ ARM GAS /tmp/cczi2eQD.s page 1 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) + ARM GAS /tmp/ccqZqdXP.s page 192 + + 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) - 1496 .loc 4 1068 31 view .LVU387 - 1497 .LBB89: + 1552 .loc 4 1068 31 view .LVU407 + 1553 .LBB89: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 1498 .loc 4 1070 5 view .LVU388 + 1554 .loc 4 1070 5 view .LVU408 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 1499 .loc 4 1072 4 view .LVU389 - 1500 0060 194A ldr r2, .L120 - 1501 .syntax unified - 1502 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 1503 0062 52E8003F ldrex r3, [r2] - 1504 @ 0 "" 2 - 1505 .LVL31: + 1555 .loc 4 1072 4 view .LVU409 + 1556 0060 194A ldr r2, .L126 + 1557 .syntax unified + 1558 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1559 0062 52E8003F ldrex r3, [r2] + 1560 @ 0 "" 2 + 1561 .LVL31: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 1506 .loc 4 1073 4 view .LVU390 - 1507 .loc 4 1073 4 is_stmt 0 view .LVU391 - 1508 .thumb - 1509 .syntax unified - 1510 .LBE89: - 1511 .LBE88: + 1562 .loc 4 1073 4 view .LVU410 + 1563 .loc 4 1073 4 is_stmt 0 view .LVU411 + 1564 .thumb + 1565 .syntax unified + 1566 .LBE89: + 1567 .LBE88: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1512 .loc 3 3215 3 discriminator 1 view .LVU392 - 1513 0066 23F04003 bic r3, r3, #64 - 1514 .LVL32: + 1568 .loc 3 3215 3 discriminator 1 view .LVU412 + 1569 0066 23F04003 bic r3, r3, #64 + 1570 .LVL32: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1515 .loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU393 - ARM GAS /tmp/cczi2eQD.s page 191 - - - 1516 .LBB90: - 1517 .LBI90: + 1571 .loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU413 + 1572 .LBB90: + 1573 .LBI90: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11426,6 +11518,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1094:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1095:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) 1096:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. + ARM GAS /tmp/ccqZqdXP.s page 193 + + 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded @@ -11449,180 +11544,180 @@ ARM GAS /tmp/cczi2eQD.s page 1 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) - 1518 .loc 4 1119 31 view .LVU394 - 1519 .LBB91: + 1574 .loc 4 1119 31 view .LVU414 + 1575 .LBB91: 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 1520 .loc 4 1121 4 view .LVU395 + 1576 .loc 4 1121 4 view .LVU415 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 1521 .loc 4 1123 4 view .LVU396 - 1522 .syntax unified - ARM GAS /tmp/cczi2eQD.s page 192 - - - 1523 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 1524 006a 42E80031 strex r1, r3, [r2] - 1525 @ 0 "" 2 - 1526 .LVL33: + 1577 .loc 4 1123 4 view .LVU416 + 1578 .syntax unified + 1579 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1580 006a 42E80031 strex r1, r3, [r2] + 1581 @ 0 "" 2 + 1582 .LVL33: 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 1527 .loc 4 1124 4 view .LVU397 - 1528 .loc 4 1124 4 is_stmt 0 view .LVU398 - 1529 .thumb - 1530 .syntax unified - 1531 .LBE91: - 1532 .LBE90: + 1583 .loc 4 1124 4 view .LVU417 + 1584 .loc 4 1124 4 is_stmt 0 view .LVU418 + 1585 .thumb + 1586 .syntax unified + 1587 .LBE91: + 1588 .LBE90: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1533 .loc 3 3215 3 discriminator 1 view .LVU399 - 1534 006e 0029 cmp r1, #0 - 1535 0070 F6D1 bne .L115 - 1536 0072 08E0 b .L104 - 1537 .LVL34: - 1538 .L107: + 1589 .loc 3 3215 3 discriminator 1 view .LVU419 + 1590 006e 0029 cmp r1, #0 + 1591 0070 F6D1 bne .L121 + 1592 0072 08E0 b .L110 + 1593 .LVL34: + 1594 .L113: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1539 .loc 3 3215 3 discriminator 1 view .LVU400 - 1540 .LBE87: - 1541 .LBE86: + 1595 .loc 3 3215 3 discriminator 1 view .LVU420 + 1596 .LBE87: + 1597 .LBE86: 289:Src/stm32f7xx_it.c **** } - 1542 .loc 1 289 7 is_stmt 1 view .LVU401 - 1543 .LBB92: - 1544 .LBI92: + 1598 .loc 1 289 7 is_stmt 1 view .LVU421 + 1599 .LBB92: + ARM GAS /tmp/ccqZqdXP.s page 194 + + + 1600 .LBI92: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1545 .loc 3 3658 25 view .LVU402 - 1546 .LBB93: - 1547 .loc 3 3660 3 view .LVU403 - 1548 .loc 3 3660 20 is_stmt 0 view .LVU404 - 1549 0074 144B ldr r3, .L120 - 1550 0076 5B6A ldr r3, [r3, #36] - 1551 .LVL35: - 1552 .loc 3 3660 20 view .LVU405 - 1553 .LBE93: - 1554 .LBE92: + 1601 .loc 3 3658 25 view .LVU422 + 1602 .LBB93: + 1603 .loc 3 3660 3 view .LVU423 + 1604 .loc 3 3660 20 is_stmt 0 view .LVU424 + 1605 0074 144B ldr r3, .L126 + 1606 0076 5B6A ldr r3, [r3, #36] + 1607 .LVL35: + 1608 .loc 3 3660 20 view .LVU425 + 1609 .LBE93: + 1610 .LBE92: 289:Src/stm32f7xx_it.c **** } - 1555 .loc 1 289 11 discriminator 1 view .LVU406 - 1556 0078 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1557 007c 52FA83F3 uxtab r3, r2, r3 - 1558 0080 DBB2 uxtb r3, r3 - 1559 0082 8DF80730 strb r3, [sp, #7] - 1560 .L104: + 1611 .loc 1 289 11 discriminator 1 view .LVU426 + 1612 0078 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1613 007c 52FA83F3 uxtab r3, r2, r3 + 1614 0080 DBB2 uxtb r3, r3 + 1615 0082 8DF80730 strb r3, [sp, #7] + 1616 .L110: 323:Src/stm32f7xx_it.c **** - 1561 .loc 1 323 1 view .LVU407 - 1562 0086 03B0 add sp, sp, #12 - 1563 .LCFI11: - 1564 .cfi_remember_state - 1565 .cfi_def_cfa_offset 4 - 1566 @ sp needed - 1567 0088 5DF804FB ldr pc, [sp], #4 - 1568 .LVL36: - 1569 .L108: - 1570 .LCFI12: - 1571 .cfi_restore_state + 1617 .loc 1 323 1 view .LVU427 + 1618 0086 03B0 add sp, sp, #12 + 1619 .LCFI11: + 1620 .cfi_remember_state + 1621 .cfi_def_cfa_offset 4 + 1622 @ sp needed + 1623 0088 5DF804FB ldr pc, [sp], #4 + 1624 .LVL36: + 1625 .L114: + 1626 .LCFI12: + 1627 .cfi_restore_state 294:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/cczi2eQD.s page 193 - - - 1572 .loc 1 294 7 is_stmt 1 view .LVU408 - 1573 .LBB94: - 1574 .LBI94: + 1628 .loc 1 294 7 is_stmt 1 view .LVU428 + 1629 .LBB94: + 1630 .LBI94: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1575 .loc 3 3658 25 view .LVU409 - 1576 .LBB95: - 1577 .loc 3 3660 3 view .LVU410 - 1578 .loc 3 3660 20 is_stmt 0 view .LVU411 - 1579 008c 0E4B ldr r3, .L120 - 1580 008e 5B6A ldr r3, [r3, #36] - 1581 .LVL37: - 1582 .loc 3 3660 20 view .LVU412 - 1583 .LBE95: - 1584 .LBE94: + 1631 .loc 3 3658 25 view .LVU429 + 1632 .LBB95: + 1633 .loc 3 3660 3 view .LVU430 + 1634 .loc 3 3660 20 is_stmt 0 view .LVU431 + 1635 008c 0E4B ldr r3, .L126 + 1636 008e 5B6A ldr r3, [r3, #36] + 1637 .LVL37: + 1638 .loc 3 3660 20 view .LVU432 + 1639 .LBE95: + 1640 .LBE94: 294:Src/stm32f7xx_it.c **** } - 1585 .loc 1 294 11 discriminator 1 view .LVU413 - 1586 0090 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1587 0094 52FA83F3 uxtab r3, r2, r3 - 1588 0098 DBB2 uxtb r3, r3 - 1589 009a 8DF80730 strb r3, [sp, #7] - 1590 009e F2E7 b .L104 - 1591 .LVL38: - 1592 .L110: + 1641 .loc 1 294 11 discriminator 1 view .LVU433 + 1642 0090 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1643 0094 52FA83F3 uxtab r3, r2, r3 + 1644 0098 DBB2 uxtb r3, r3 + 1645 009a 8DF80730 strb r3, [sp, #7] + 1646 009e F2E7 b .L110 + 1647 .LVL38: + 1648 .L116: 299:Src/stm32f7xx_it.c **** } - 1593 .loc 1 299 7 is_stmt 1 view .LVU414 - 1594 .LBB96: - 1595 .LBI96: -3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1596 .loc 3 3658 25 view .LVU415 - 1597 .LBB97: - 1598 .loc 3 3660 3 view .LVU416 - 1599 .loc 3 3660 20 is_stmt 0 view .LVU417 - 1600 00a0 094B ldr r3, .L120 - 1601 00a2 5B6A ldr r3, [r3, #36] - 1602 .LVL39: - 1603 .loc 3 3660 20 view .LVU418 - 1604 .LBE97: - 1605 .LBE96: - 299:Src/stm32f7xx_it.c **** } - 1606 .loc 1 299 11 discriminator 1 view .LVU419 - 1607 00a4 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1608 00a8 52FA83F3 uxtab r3, r2, r3 - 1609 00ac DBB2 uxtb r3, r3 - 1610 00ae 8DF80730 strb r3, [sp, #7] - 1611 00b2 E8E7 b .L104 - 1612 .LVL40: - 1613 .L112: - 304:Src/stm32f7xx_it.c **** } - 1614 .loc 1 304 7 is_stmt 1 view .LVU420 - 1615 .LBB98: - 1616 .LBI98: -3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1617 .loc 3 3658 25 view .LVU421 - 1618 .LBB99: - 1619 .loc 3 3660 3 view .LVU422 - 1620 .loc 3 3660 20 is_stmt 0 view .LVU423 - 1621 00b4 044B ldr r3, .L120 - ARM GAS /tmp/cczi2eQD.s page 194 + 1649 .loc 1 299 7 is_stmt 1 view .LVU434 + ARM GAS /tmp/ccqZqdXP.s page 195 - 1622 00b6 5B6A ldr r3, [r3, #36] - 1623 .LVL41: - 1624 .loc 3 3660 20 view .LVU424 - 1625 .LBE99: - 1626 .LBE98: + 1650 .LBB96: + 1651 .LBI96: +3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + 1652 .loc 3 3658 25 view .LVU435 + 1653 .LBB97: + 1654 .loc 3 3660 3 view .LVU436 + 1655 .loc 3 3660 20 is_stmt 0 view .LVU437 + 1656 00a0 094B ldr r3, .L126 + 1657 00a2 5B6A ldr r3, [r3, #36] + 1658 .LVL39: + 1659 .loc 3 3660 20 view .LVU438 + 1660 .LBE97: + 1661 .LBE96: + 299:Src/stm32f7xx_it.c **** } + 1662 .loc 1 299 11 discriminator 1 view .LVU439 + 1663 00a4 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1664 00a8 52FA83F3 uxtab r3, r2, r3 + 1665 00ac DBB2 uxtb r3, r3 + 1666 00ae 8DF80730 strb r3, [sp, #7] + 1667 00b2 E8E7 b .L110 + 1668 .LVL40: + 1669 .L118: 304:Src/stm32f7xx_it.c **** } - 1627 .loc 1 304 11 discriminator 1 view .LVU425 - 1628 00b8 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1629 00bc 52FA83F3 uxtab r3, r2, r3 - 1630 00c0 DBB2 uxtb r3, r3 - 1631 00c2 8DF80730 strb r3, [sp, #7] - 1632 00c6 DEE7 b .L104 - 1633 .L121: - 1634 .align 2 - 1635 .L120: - 1636 00c8 00100140 .word 1073811456 - 1637 00cc 00140140 .word 1073812480 - 1638 .cfi_endproc - 1639 .LFE1196: - 1641 .section .text.DMA2_Stream7_TransferComplete,"ax",%progbits - 1642 .align 1 - 1643 .global DMA2_Stream7_TransferComplete - 1644 .syntax unified - 1645 .thumb - 1646 .thumb_func - 1648 DMA2_Stream7_TransferComplete: - 1649 .LFB1203: - 596:Src/stm32f7xx_it.c **** - 597:Src/stm32f7xx_it.c **** //----------------------------------------------- - 598:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void) - 599:Src/stm32f7xx_it.c **** { - 1650 .loc 1 599 1 is_stmt 1 view -0 - 1651 .cfi_startproc - 1652 @ args = 0, pretend = 0, frame = 0 - 1653 @ frame_needed = 0, uses_anonymous_args = 0 - 1654 @ link register save eliminated. - 600:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2); - 1655 .loc 1 600 3 view .LVU427 - 1656 .LVL42: - 1657 .LBB100: - 1658 .LBI100: - 1659 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" + 1670 .loc 1 304 7 is_stmt 1 view .LVU440 + 1671 .LBB98: + 1672 .LBI98: +3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + 1673 .loc 3 3658 25 view .LVU441 + 1674 .LBB99: + 1675 .loc 3 3660 3 view .LVU442 + 1676 .loc 3 3660 20 is_stmt 0 view .LVU443 + 1677 00b4 044B ldr r3, .L126 + 1678 00b6 5B6A ldr r3, [r3, #36] + 1679 .LVL41: + 1680 .loc 3 3660 20 view .LVU444 + 1681 .LBE99: + 1682 .LBE98: + 304:Src/stm32f7xx_it.c **** } + 1683 .loc 1 304 11 discriminator 1 view .LVU445 + 1684 00b8 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1685 00bc 52FA83F3 uxtab r3, r2, r3 + 1686 00c0 DBB2 uxtb r3, r3 + 1687 00c2 8DF80730 strb r3, [sp, #7] + 1688 00c6 DEE7 b .L110 + 1689 .L127: + 1690 .align 2 + 1691 .L126: + 1692 00c8 00100140 .word 1073811456 + 1693 00cc 00140140 .word 1073812480 + 1694 .cfi_endproc + 1695 .LFE1196: + 1697 .section .text.DMA2_Stream7_TransferComplete,"ax",%progbits + 1698 .align 1 + 1699 .global DMA2_Stream7_TransferComplete + 1700 .syntax unified + 1701 .thumb + 1702 .thumb_func + ARM GAS /tmp/ccqZqdXP.s page 196 + + + 1704 DMA2_Stream7_TransferComplete: + 1705 .LFB1203: + 609:Src/stm32f7xx_it.c **** + 610:Src/stm32f7xx_it.c **** //----------------------------------------------- + 611:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void) + 612:Src/stm32f7xx_it.c **** { + 1706 .loc 1 612 1 is_stmt 1 view -0 + 1707 .cfi_startproc + 1708 @ args = 0, pretend = 0, frame = 0 + 1709 @ frame_needed = 0, uses_anonymous_args = 0 + 1710 @ link register save eliminated. + 613:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2); + 1711 .loc 1 613 3 view .LVU447 + 1712 .LVL42: + 1713 .LBB100: + 1714 .LBI100: + 1715 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h @@ -11638,9 +11733,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 13:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * the root directory of this software component. 14:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * - ARM GAS /tmp/cczi2eQD.s page 195 - - 16:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 17:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 18:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11666,6 +11758,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Private types -------------------------------------------------------------*/ + ARM GAS /tmp/ccqZqdXP.s page 197 + + 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Private_Variables DMA Private Variables 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ @@ -11698,9 +11793,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 70:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 71:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 72:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/cczi2eQD.s page 196 - - 73:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 74:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Private macros ------------------------------------------------------------*/ 75:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported types ------------------------------------------------------------*/ @@ -11726,6 +11818,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccqZqdXP.s page 198 + + 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Mode; /*!< Specifies the normal or circular operation mode. 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MODE 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The circular buffer mode cannot be used if the memory @@ -11758,9 +11853,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit. - ARM GAS /tmp/cczi2eQD.s page 197 - - 130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** The data unit is equal to the source buffer configuration s 131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or MemorySize parameters depending in the transfer directio 132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max @@ -11786,6 +11878,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t FIFOThreshold; /*!< Specifies the FIFO threshold level. 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_FIFOTHRESHO + ARM GAS /tmp/ccqZqdXP.s page 199 + + 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11818,9 +11913,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_STREAM STREAM 185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/cczi2eQD.s page 198 - - 187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_0 0x00000000U 188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_1 0x00000001U 189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_2 0x00000002U @@ -11846,6 +11938,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MODE MODE 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ + ARM GAS /tmp/ccqZqdXP.s page 200 + + 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_NORMAL 0x00000000U /*!< Normal Mode 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_CIRCULAR DMA_SxCR_CIRC /*!< Circular Mode @@ -11878,9 +11973,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MEMORY_NOINCREMENT 0x00000000U /*!< Memory increment mode Disa 242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MEMORY_INCREMENT DMA_SxCR_MINC /*!< Memory increment mode Enab 243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/cczi2eQD.s page 199 - - 244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11906,6 +11998,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_OFFSETSIZE OFFSETSIZE 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ + ARM GAS /tmp/ccqZqdXP.s page 201 + + 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_PSIZE 0x00000000U /*!< Peripheral increment offse 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_FIXEDTO4 DMA_SxCR_PINCOS /*!< Peripheral increment offse @@ -11938,9 +12033,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined(DMA_CHANNEL_SELECTION_8_15) 299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_8 DMA_SxCR_CHSEL_3 300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_9 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_0) - ARM GAS /tmp/cczi2eQD.s page 200 - - 301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_10 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1) 302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_11 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) 303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_12 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2) @@ -11966,6 +12058,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PBURST PBURST 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccqZqdXP.s page 202 + + 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_SINGLE 0x00000000U /*!< Peripheral b 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC4 DMA_SxCR_PBURST_0 /*!< Peripheral b 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC8 DMA_SxCR_PBURST_1 /*!< Peripheral b @@ -11998,9 +12093,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_FIFOTHRESHOLD FIFOTHRESHOLD 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ - ARM GAS /tmp/cczi2eQD.s page 201 - - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_1_4 0x00000000U /*!< FIFO thresho 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_1_2 DMA_SxFCR_FTH_0 /*!< FIFO thresho @@ -12026,6 +12118,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported macro ------------------------------------------------------------*/ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Macros DMA Exported Macros 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ + ARM GAS /tmp/ccqZqdXP.s page 203 + + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros @@ -12058,9 +12153,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMAx_Streamy into DMAx 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM_INSTANCE__ DMAx_Streamy 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval DMAx - ARM GAS /tmp/cczi2eQD.s page 202 - - 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_INSTANCE(__STREAM_INSTANCE__) \ 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__STREAM_INSTANCE__) > ((uint32_t)DMA1_Stream7)) ? DMA2 : DMA1) @@ -12086,6 +12178,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream6)) ? LL_DMA_STREAM_6 : \ 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream6)) ? LL_DMA_STREAM_6 : \ 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** LL_DMA_STREAM_7) + ARM GAS /tmp/ccqZqdXP.s page 204 + + 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy @@ -12118,9 +12213,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/cczi2eQD.s page 203 - - 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported functions --------------------------------------------------------*/ @@ -12146,6 +12238,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccqZqdXP.s page 205 + + 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableStream(DMA_TypeDef *DMAx, uint32_t Stream) 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA @@ -12178,9 +12273,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/cczi2eQD.s page 204 - - 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -12206,6 +12298,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PFCTRL LL_DMA_ConfigTransfer 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccqZqdXP.s page 206 + + 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -12238,9 +12333,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/cczi2eQD.s page 205 - - 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -12266,6 +12358,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccqZqdXP.s page 207 + + 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12298,9 +12393,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Mode This parameter can be one of the following values: 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR - ARM GAS /tmp/cczi2eQD.s page 206 - - 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_PFCTRL 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12326,6 +12418,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR + ARM GAS /tmp/ccqZqdXP.s page 208 + + 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_PFCTRL 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Stream) @@ -12358,9 +12453,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral increment mode. - ARM GAS /tmp/cczi2eQD.s page 207 - - 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINC LL_DMA_GetPeriphIncMode 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -12386,6 +12478,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MINC LL_DMA_SetMemoryIncMode 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccqZqdXP.s page 209 + + 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -12418,9 +12513,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/cczi2eQD.s page 208 - - 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_NOINCREMENT 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_INCREMENT 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12446,6 +12538,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD + ARM GAS /tmp/ccqZqdXP.s page 210 + + 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) @@ -12478,9 +12573,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory size. - ARM GAS /tmp/cczi2eQD.s page 209 - - 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_SetMemorySize 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -12506,6 +12598,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory size. 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_GetMemorySize + ARM GAS /tmp/ccqZqdXP.s page 211 + + 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -12538,9 +12633,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 - ARM GAS /tmp/cczi2eQD.s page 210 - - 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param OffsetSize This parameter can be one of the following values: 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_PSIZE @@ -12566,6 +12658,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccqZqdXP.s page 212 + + 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_PSIZE 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12598,9 +12693,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/cczi2eQD.s page 211 - - 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream priority level. @@ -12626,6 +12718,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccqZqdXP.s page 213 + + 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Number of data to transfer. 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll NDTR NDT LL_DMA_SetDataLength @@ -12658,9 +12753,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/cczi2eQD.s page 212 - - 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -12686,6 +12778,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 + ARM GAS /tmp/ccqZqdXP.s page 214 + + 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_0 @@ -12718,9 +12813,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CHSEL LL_DMA_GetChannelSelection 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/cczi2eQD.s page 213 - - 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -12746,6 +12838,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_13 (*) 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_14 (*) 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_15 (*) + ARM GAS /tmp/ccqZqdXP.s page 215 + + 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * (*) value not defined in all devices. 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12778,9 +12873,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/cczi2eQD.s page 214 - - 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory burst transfer configuration. @@ -12806,6 +12898,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccqZqdXP.s page 216 + + 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Peripheral burst transfer configuration. 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PBURST LL_DMA_SetPeriphBurstxfer @@ -12838,9 +12933,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/cczi2eQD.s page 215 - - 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -12866,6 +12958,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccqZqdXP.s page 217 + + 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12898,9 +12993,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CURRENTTARGETMEM0 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CURRENTTARGETMEM1 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/cczi2eQD.s page 216 - - 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetCurrentTargetMem(DMA_TypeDef *DMAx, uint32_t Stream) 1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- @@ -12926,6 +13018,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccqZqdXP.s page 218 + + 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable the double buffer mode. 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DBM LL_DMA_DisableDoubleBufferMode @@ -12958,9 +13053,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 - ARM GAS /tmp/cczi2eQD.s page 217 - - 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_0_25 @@ -12986,6 +13078,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 + ARM GAS /tmp/ccqZqdXP.s page 219 + + 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -13018,9 +13113,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select FIFO threshold. 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_SetFIFOThreshold - ARM GAS /tmp/cczi2eQD.s page 218 - - 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -13046,6 +13138,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get FIFO threshold. 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_GetFIFOThreshold + ARM GAS /tmp/ccqZqdXP.s page 220 + + 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -13078,9 +13173,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 - ARM GAS /tmp/cczi2eQD.s page 219 - - 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -13106,6 +13198,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * PAR PA LL_DMA_ConfigAddresses 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccqZqdXP.s page 221 + + 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -13138,9 +13233,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/cczi2eQD.s page 220 - - 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory address. 1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetMemoryAddress @@ -13166,6 +13258,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Peripheral address. + ARM GAS /tmp/ccqZqdXP.s page 222 + + 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_SetPeriphAddress 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. @@ -13198,9 +13293,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 - ARM GAS /tmp/cczi2eQD.s page 221 - - 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -13226,6 +13318,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF + ARM GAS /tmp/ccqZqdXP.s page 223 + + 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream) 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13258,9 +13353,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory to Memory Destination address. 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetM2MDstAddress - ARM GAS /tmp/cczi2eQD.s page 222 - - 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -13286,6 +13378,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetM2MSrcAddress 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccqZqdXP.s page 224 + + 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -13318,9 +13413,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/cczi2eQD.s page 223 - - 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream) 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-> @@ -13346,6 +13438,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccqZqdXP.s page 225 + + 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory 1 address (used in case of Double buffer mode). @@ -13378,9 +13473,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 half transfer flag. 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF0 LL_DMA_IsActiveFlag_HT0 - ARM GAS /tmp/cczi2eQD.s page 224 - - 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -13406,6 +13498,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccqZqdXP.s page 226 + + 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx) 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF2)==(DMA_LISR_HTIF2)); @@ -13438,9 +13533,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF0 LL_DMA_IsActiveFlag_HT5 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/cczi2eQD.s page 225 - - 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx) 1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13466,6 +13558,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx) 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccqZqdXP.s page 227 + + 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF7)==(DMA_HISR_HTIF7)); 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -13498,9 +13593,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx) - ARM GAS /tmp/cczi2eQD.s page 226 - - 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF2)==(DMA_LISR_TCIF2)); 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -13526,6 +13618,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF4)==(DMA_HISR_TCIF4)); 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccqZqdXP.s page 228 + + 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer complete flag. @@ -13558,9 +13653,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx) 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7)); - ARM GAS /tmp/cczi2eQD.s page 227 - - 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13586,6 +13678,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccqZqdXP.s page 229 + + 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 transfer error flag. 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF2 LL_DMA_IsActiveFlag_TE2 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -13618,9 +13713,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF4)==(DMA_HISR_TEIF4)); 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/cczi2eQD.s page 228 - - 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer error flag. 1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF0 LL_DMA_IsActiveFlag_TE5 @@ -13646,6 +13738,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer error flag. 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF7 LL_DMA_IsActiveFlag_TE7 + ARM GAS /tmp/ccqZqdXP.s page 230 + + 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -13678,9 +13773,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 1951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 direct mode error flag. - ARM GAS /tmp/cczi2eQD.s page 229 - - 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF2 LL_DMA_IsActiveFlag_DME2 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -13706,6 +13798,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF4 LL_DMA_IsActiveFlag_DME4 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccqZqdXP.s page 231 + + 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME4(DMA_TypeDef *DMAx) 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13738,9 +13833,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 2008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 direct mode error flag. 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF7 LL_DMA_IsActiveFlag_DME7 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/cczi2eQD.s page 230 - - 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME7(DMA_TypeDef *DMAx) @@ -13766,6 +13858,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE1(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccqZqdXP.s page 232 + + 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF1)==(DMA_LISR_FEIF1)); 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -13798,9 +13893,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 2065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/cczi2eQD.s page 231 - - 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE4(DMA_TypeDef *DMAx) 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF4)==(DMA_HISR_FEIF4)); @@ -13826,6 +13918,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE6(DMA_TypeDef *DMAx) 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF6)==(DMA_HISR_FEIF6)); + ARM GAS /tmp/ccqZqdXP.s page 233 + + 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13858,9 +13953,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 2122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx) 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/cczi2eQD.s page 232 - - 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1); 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -13886,6 +13978,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3); 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccqZqdXP.s page 234 + + 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 half transfer flag. 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF4 LL_DMA_ClearFlag_HT4 @@ -13918,9 +14013,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 2179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6); 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/cczi2eQD.s page 233 - - 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 half transfer flag. @@ -13946,6 +14038,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 transfer complete flag. + ARM GAS /tmp/ccqZqdXP.s page 235 + + 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF1 LL_DMA_ClearFlag_TC1 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -13978,9 +14073,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 2236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/cczi2eQD.s page 234 - - 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 transfer complete flag. 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF4 LL_DMA_ClearFlag_TC4 2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -14006,6 +14098,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer complete flag. 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF6 LL_DMA_ClearFlag_TC6 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccqZqdXP.s page 236 + + 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx) @@ -14020,102 +14115,99 @@ ARM GAS /tmp/cczi2eQD.s page 1 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) - 1660 .loc 5 2277 22 view .LVU428 - 1661 .LBB101: + 1716 .loc 5 2277 22 view .LVU448 + 1717 .LBB101: 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); - 1662 .loc 5 2279 3 view .LVU429 - 1663 0000 024B ldr r3, .L123 - 1664 0002 4FF00062 mov r2, #134217728 - 1665 0006 DA60 str r2, [r3, #12] - 1666 .LVL43: - 1667 .loc 5 2279 3 is_stmt 0 view .LVU430 - 1668 .LBE101: - 1669 .LBE100: - 601:Src/stm32f7xx_it.c **** } - 1670 .loc 1 601 1 view .LVU431 - 1671 0008 7047 bx lr - 1672 .L124: - 1673 000a 00BF .align 2 - 1674 .L123: - ARM GAS /tmp/cczi2eQD.s page 235 - - - 1675 000c 00640240 .word 1073898496 - 1676 .cfi_endproc - 1677 .LFE1203: - 1679 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits - 1680 .align 1 - 1681 .global DMA2_Stream7_IRQHandler - 1682 .syntax unified - 1683 .thumb - 1684 .thumb_func - 1686 DMA2_Stream7_IRQHandler: - 1687 .LFB1201: + 1718 .loc 5 2279 3 view .LVU449 + 1719 0000 024B ldr r3, .L129 + 1720 0002 4FF00062 mov r2, #134217728 + 1721 0006 DA60 str r2, [r3, #12] + 1722 .LVL43: + 1723 .loc 5 2279 3 is_stmt 0 view .LVU450 + 1724 .LBE101: + 1725 .LBE100: + 614:Src/stm32f7xx_it.c **** } + 1726 .loc 1 614 1 view .LVU451 + 1727 0008 7047 bx lr + 1728 .L130: + 1729 000a 00BF .align 2 + 1730 .L129: + 1731 000c 00640240 .word 1073898496 + 1732 .cfi_endproc + 1733 .LFE1203: + 1735 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits + 1736 .align 1 + 1737 .global DMA2_Stream7_IRQHandler + 1738 .syntax unified + 1739 .thumb + 1740 .thumb_func + 1742 DMA2_Stream7_IRQHandler: + 1743 .LFB1201: 417:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */ - 1688 .loc 1 417 1 is_stmt 1 view -0 - 1689 .cfi_startproc - 1690 @ args = 0, pretend = 0, frame = 0 - 1691 @ frame_needed = 0, uses_anonymous_args = 0 - 1692 0000 08B5 push {r3, lr} - 1693 .LCFI13: - 1694 .cfi_def_cfa_offset 8 - 1695 .cfi_offset 3, -8 - 1696 .cfi_offset 14, -4 + 1744 .loc 1 417 1 is_stmt 1 view -0 + 1745 .cfi_startproc + 1746 @ args = 0, pretend = 0, frame = 0 + 1747 @ frame_needed = 0, uses_anonymous_args = 0 + 1748 0000 08B5 push {r3, lr} + 1749 .LCFI13: + 1750 .cfi_def_cfa_offset 8 + 1751 .cfi_offset 3, -8 + 1752 .cfi_offset 14, -4 419:Src/stm32f7xx_it.c **** { - 1697 .loc 1 419 3 view .LVU433 - 1698 .LVL44: - 1699 .LBB102: - 1700 .LBI102: + 1753 .loc 1 419 3 view .LVU453 + 1754 .LVL44: + 1755 .LBB102: + ARM GAS /tmp/ccqZqdXP.s page 237 + + + 1756 .LBI102: 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 1701 .loc 5 1837 26 view .LVU434 - 1702 .LBB103: + 1757 .loc 5 1837 26 view .LVU454 + 1758 .LBB103: 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1703 .loc 5 1839 3 view .LVU435 + 1759 .loc 5 1839 3 view .LVU455 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1704 .loc 5 1839 11 is_stmt 0 view .LVU436 - 1705 0002 0A4B ldr r3, .L130 - 1706 0004 5B68 ldr r3, [r3, #4] - 1707 .LVL45: + 1760 .loc 5 1839 11 is_stmt 0 view .LVU456 + 1761 0002 0A4B ldr r3, .L136 + 1762 0004 5B68 ldr r3, [r3, #4] + 1763 .LVL45: 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1708 .loc 5 1839 11 view .LVU437 - 1709 .LBE103: - 1710 .LBE102: + 1764 .loc 5 1839 11 view .LVU457 + 1765 .LBE103: + 1766 .LBE102: 419:Src/stm32f7xx_it.c **** { - 1711 .loc 1 419 5 discriminator 1 view .LVU438 - 1712 0006 13F0006F tst r3, #134217728 - 1713 000a 09D1 bne .L129 + 1767 .loc 1 419 5 discriminator 1 view .LVU458 + 1768 0006 13F0006F tst r3, #134217728 + 1769 000a 09D1 bne .L135 424:Src/stm32f7xx_it.c **** { - 1714 .loc 1 424 8 is_stmt 1 view .LVU439 - 1715 .LVL46: - 1716 .LBB104: - 1717 .LBI104: + 1770 .loc 1 424 8 is_stmt 1 view .LVU459 + 1771 .LVL46: + 1772 .LBB104: + 1773 .LBI104: 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 1718 .loc 5 1925 26 view .LVU440 - 1719 .LBB105: + 1774 .loc 5 1925 26 view .LVU460 + 1775 .LBB105: 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1720 .loc 5 1927 3 view .LVU441 + 1776 .loc 5 1927 3 view .LVU461 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1721 .loc 5 1927 11 is_stmt 0 view .LVU442 - 1722 000c 074B ldr r3, .L130 - ARM GAS /tmp/cczi2eQD.s page 236 - - - 1723 000e 5B68 ldr r3, [r3, #4] - 1724 .LVL47: + 1777 .loc 5 1927 11 is_stmt 0 view .LVU462 + 1778 000c 074B ldr r3, .L136 + 1779 000e 5B68 ldr r3, [r3, #4] + 1780 .LVL47: 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1725 .loc 5 1927 11 view .LVU443 - 1726 .LBE105: - 1727 .LBE104: + 1781 .loc 5 1927 11 view .LVU463 + 1782 .LBE105: + 1783 .LBE104: 424:Src/stm32f7xx_it.c **** { - 1728 .loc 1 424 10 discriminator 1 view .LVU444 - 1729 0010 13F0007F tst r3, #33554432 - 1730 0014 03D0 beq .L125 + 1784 .loc 1 424 10 discriminator 1 view .LVU464 + 1785 0010 13F0007F tst r3, #33554432 + 1786 0014 03D0 beq .L131 426:Src/stm32f7xx_it.c **** } - 1731 .loc 1 426 5 is_stmt 1 view .LVU445 - 1732 .LVL48: - 1733 .LBB106: - 1734 .LBI106: + 1787 .loc 1 426 5 is_stmt 1 view .LVU465 + 1788 .LVL48: + 1789 .LBB106: + 1790 .LBI106: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -14126,6 +14218,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE0(DMA_TypeDef *DMAx) 2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccqZqdXP.s page 238 + + 2290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF0); 2291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -14158,9 +14253,6 @@ ARM GAS /tmp/cczi2eQD.s page 1 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx) - ARM GAS /tmp/cczi2eQD.s page 237 - - 2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF3); 2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -14186,6 +14278,9 @@ ARM GAS /tmp/cczi2eQD.s page 1 2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF5); 2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccqZqdXP.s page 239 + + 2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer error flag. @@ -14205,122 +14300,122 @@ ARM GAS /tmp/cczi2eQD.s page 1 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) - 1735 .loc 5 2365 22 view .LVU446 - 1736 .LBB107: + 1791 .loc 5 2365 22 view .LVU466 + 1792 .LBB107: 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7); - 1737 .loc 5 2367 3 view .LVU447 - 1738 0016 054B ldr r3, .L130 - 1739 0018 4FF00072 mov r2, #33554432 - 1740 001c DA60 str r2, [r3, #12] - 1741 .LVL49: - 1742 .L125: - 1743 .loc 5 2367 3 is_stmt 0 view .LVU448 - 1744 .LBE107: - 1745 .LBE106: - ARM GAS /tmp/cczi2eQD.s page 238 - - + 1793 .loc 5 2367 3 view .LVU467 + 1794 0016 054B ldr r3, .L136 + 1795 0018 4FF00072 mov r2, #33554432 + 1796 001c DA60 str r2, [r3, #12] + 1797 .LVL49: + 1798 .L131: + 1799 .loc 5 2367 3 is_stmt 0 view .LVU468 + 1800 .LBE107: + 1801 .LBE106: 432:Src/stm32f7xx_it.c **** - 1746 .loc 1 432 1 view .LVU449 - 1747 001e 08BD pop {r3, pc} - 1748 .L129: + 1802 .loc 1 432 1 view .LVU469 + 1803 001e 08BD pop {r3, pc} + 1804 .L135: 421:Src/stm32f7xx_it.c **** u_tx_flg = 0;//indicate that transfer compete - 1749 .loc 1 421 5 is_stmt 1 view .LVU450 - 1750 0020 FFF7FEFF bl DMA2_Stream7_TransferComplete - 1751 .LVL50: + 1805 .loc 1 421 5 is_stmt 1 view .LVU470 + 1806 0020 FFF7FEFF bl DMA2_Stream7_TransferComplete + 1807 .LVL50: 422:Src/stm32f7xx_it.c **** } - 1752 .loc 1 422 5 view .LVU451 + 1808 .loc 1 422 5 view .LVU471 422:Src/stm32f7xx_it.c **** } - 1753 .loc 1 422 14 is_stmt 0 view .LVU452 - 1754 0024 024B ldr r3, .L130+4 - 1755 0026 0022 movs r2, #0 - 1756 0028 1A70 strb r2, [r3] - 1757 002a F8E7 b .L125 - 1758 .L131: - 1759 .align 2 - 1760 .L130: - 1761 002c 00640240 .word 1073898496 - 1762 0030 00000000 .word u_tx_flg - 1763 .cfi_endproc - 1764 .LFE1201: - 1766 .text - 1767 .Letext0: - 1768 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 1769 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 1770 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 1771 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 1772 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 1773 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 1774 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 1775 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 1776 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 1777 .file 15 "Inc/main.h" - 1778 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/cczi2eQD.s page 239 + 1809 .loc 1 422 14 is_stmt 0 view .LVU472 + 1810 0024 024B ldr r3, .L136+4 + 1811 0026 0022 movs r2, #0 + 1812 0028 1A70 strb r2, [r3] + 1813 002a F8E7 b .L131 + 1814 .L137: + 1815 .align 2 + 1816 .L136: + 1817 002c 00640240 .word 1073898496 + 1818 0030 00000000 .word u_tx_flg + 1819 .cfi_endproc + 1820 .LFE1201: + 1822 .text + 1823 .Letext0: + ARM GAS /tmp/ccqZqdXP.s page 240 + + + 1824 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 1825 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + 1826 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 1827 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 1828 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 1829 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 1830 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 1831 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 1832 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 1833 .file 15 "Inc/main.h" + 1834 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + ARM GAS /tmp/ccqZqdXP.s page 241 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_it.c - /tmp/cczi2eQD.s:20 .text.NMI_Handler:00000000 $t - /tmp/cczi2eQD.s:26 .text.NMI_Handler:00000000 NMI_Handler - /tmp/cczi2eQD.s:43 .text.HardFault_Handler:00000000 $t - /tmp/cczi2eQD.s:49 .text.HardFault_Handler:00000000 HardFault_Handler - /tmp/cczi2eQD.s:66 .text.MemManage_Handler:00000000 $t - /tmp/cczi2eQD.s:72 .text.MemManage_Handler:00000000 MemManage_Handler - /tmp/cczi2eQD.s:89 .text.BusFault_Handler:00000000 $t - /tmp/cczi2eQD.s:95 .text.BusFault_Handler:00000000 BusFault_Handler - /tmp/cczi2eQD.s:112 .text.UsageFault_Handler:00000000 $t - /tmp/cczi2eQD.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler - /tmp/cczi2eQD.s:135 .text.SVC_Handler:00000000 $t - /tmp/cczi2eQD.s:141 .text.SVC_Handler:00000000 SVC_Handler - /tmp/cczi2eQD.s:154 .text.DebugMon_Handler:00000000 $t - /tmp/cczi2eQD.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler - /tmp/cczi2eQD.s:173 .text.PendSV_Handler:00000000 $t - /tmp/cczi2eQD.s:179 .text.PendSV_Handler:00000000 PendSV_Handler - /tmp/cczi2eQD.s:192 .text.SysTick_Handler:00000000 $t - /tmp/cczi2eQD.s:198 .text.SysTick_Handler:00000000 SysTick_Handler - /tmp/cczi2eQD.s:218 .text.ADC_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler - /tmp/cczi2eQD.s:248 .text.ADC_IRQHandler:00000010 $d - /tmp/cczi2eQD.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler - /tmp/cczi2eQD.s:301 .text.TIM1_UP_TIM10_IRQHandler:00000024 $d - /tmp/cczi2eQD.s:309 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:315 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler - /tmp/cczi2eQD.s:355 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d - /tmp/cczi2eQD.s:362 .text.TIM2_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:368 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler - /tmp/cczi2eQD.s:381 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:387 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler - /tmp/cczi2eQD.s:453 .text.TIM8_UP_TIM13_IRQHandler:00000048 $d - /tmp/cczi2eQD.s:459 .text.TIM5_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:465 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler - /tmp/cczi2eQD.s:478 .text.TIM6_DAC_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:484 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler - /tmp/cczi2eQD.s:543 .text.TIM6_DAC_IRQHandler:00000028 $d - /tmp/cczi2eQD.s:550 .text.TIM7_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:556 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler - /tmp/cczi2eQD.s:605 .text.TIM7_IRQHandler:0000001c $d - /tmp/cczi2eQD.s:611 .text.UART_RxCpltCallback:00000000 $t - /tmp/cczi2eQD.s:617 .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback - /tmp/cczi2eQD.s:655 .text.UART_RxCpltCallback:0000001a $d - /tmp/cczi2eQD.s:687 .text.UART_RxCpltCallback:0000005a $t - /tmp/cczi2eQD.s:1087 .text.UART_RxCpltCallback:00000268 $d - /tmp/cczi2eQD.s:1101 .text.UART_RxCpltCallback:00000294 $t - /tmp/cczi2eQD.s:1307 .text.UART_RxCpltCallback:000003b0 $d - /tmp/cczi2eQD.s:1317 .text.USART1_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:1323 .text.USART1_IRQHandler:00000000 USART1_IRQHandler - /tmp/cczi2eQD.s:1636 .text.USART1_IRQHandler:000000c8 $d - /tmp/cczi2eQD.s:1642 .text.DMA2_Stream7_TransferComplete:00000000 $t - /tmp/cczi2eQD.s:1648 .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete - /tmp/cczi2eQD.s:1675 .text.DMA2_Stream7_TransferComplete:0000000c $d - /tmp/cczi2eQD.s:1680 .text.DMA2_Stream7_IRQHandler:00000000 $t - /tmp/cczi2eQD.s:1686 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler - ARM GAS /tmp/cczi2eQD.s page 240 + /tmp/ccqZqdXP.s:20 .text.NMI_Handler:00000000 $t + /tmp/ccqZqdXP.s:26 .text.NMI_Handler:00000000 NMI_Handler + /tmp/ccqZqdXP.s:43 .text.HardFault_Handler:00000000 $t + /tmp/ccqZqdXP.s:49 .text.HardFault_Handler:00000000 HardFault_Handler + /tmp/ccqZqdXP.s:66 .text.MemManage_Handler:00000000 $t + /tmp/ccqZqdXP.s:72 .text.MemManage_Handler:00000000 MemManage_Handler + /tmp/ccqZqdXP.s:89 .text.BusFault_Handler:00000000 $t + /tmp/ccqZqdXP.s:95 .text.BusFault_Handler:00000000 BusFault_Handler + /tmp/ccqZqdXP.s:112 .text.UsageFault_Handler:00000000 $t + /tmp/ccqZqdXP.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler + /tmp/ccqZqdXP.s:135 .text.SVC_Handler:00000000 $t + /tmp/ccqZqdXP.s:141 .text.SVC_Handler:00000000 SVC_Handler + /tmp/ccqZqdXP.s:154 .text.DebugMon_Handler:00000000 $t + /tmp/ccqZqdXP.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler + /tmp/ccqZqdXP.s:173 .text.PendSV_Handler:00000000 $t + /tmp/ccqZqdXP.s:179 .text.PendSV_Handler:00000000 PendSV_Handler + /tmp/ccqZqdXP.s:192 .text.SysTick_Handler:00000000 $t + /tmp/ccqZqdXP.s:198 .text.SysTick_Handler:00000000 SysTick_Handler + /tmp/ccqZqdXP.s:218 .text.ADC_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler + /tmp/ccqZqdXP.s:248 .text.ADC_IRQHandler:00000010 $d + /tmp/ccqZqdXP.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler + /tmp/ccqZqdXP.s:301 .text.TIM1_UP_TIM10_IRQHandler:00000024 $d + /tmp/ccqZqdXP.s:309 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:315 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler + /tmp/ccqZqdXP.s:355 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d + /tmp/ccqZqdXP.s:362 .text.TIM2_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:368 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler + /tmp/ccqZqdXP.s:381 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:387 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler + /tmp/ccqZqdXP.s:453 .text.TIM8_UP_TIM13_IRQHandler:00000048 $d + /tmp/ccqZqdXP.s:459 .text.TIM5_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:465 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler + /tmp/ccqZqdXP.s:478 .text.TIM6_DAC_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:484 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler + /tmp/ccqZqdXP.s:543 .text.TIM6_DAC_IRQHandler:00000028 $d + /tmp/ccqZqdXP.s:550 .text.TIM7_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:556 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler + /tmp/ccqZqdXP.s:605 .text.TIM7_IRQHandler:0000001c $d + /tmp/ccqZqdXP.s:611 .text.UART_RxCpltCallback:00000000 $t + /tmp/ccqZqdXP.s:617 .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback + /tmp/ccqZqdXP.s:655 .text.UART_RxCpltCallback:0000001a $d + /tmp/ccqZqdXP.s:687 .text.UART_RxCpltCallback:0000005a $t + /tmp/ccqZqdXP.s:1093 .text.UART_RxCpltCallback:00000278 $d + /tmp/ccqZqdXP.s:1107 .text.UART_RxCpltCallback:000002a4 $t + /tmp/ccqZqdXP.s:1363 .text.UART_RxCpltCallback:00000400 $d + /tmp/ccqZqdXP.s:1373 .text.USART1_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:1379 .text.USART1_IRQHandler:00000000 USART1_IRQHandler + /tmp/ccqZqdXP.s:1692 .text.USART1_IRQHandler:000000c8 $d + /tmp/ccqZqdXP.s:1698 .text.DMA2_Stream7_TransferComplete:00000000 $t + /tmp/ccqZqdXP.s:1704 .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete + /tmp/ccqZqdXP.s:1731 .text.DMA2_Stream7_TransferComplete:0000000c $d + /tmp/ccqZqdXP.s:1736 .text.DMA2_Stream7_IRQHandler:00000000 $t + /tmp/ccqZqdXP.s:1742 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler + ARM GAS /tmp/ccqZqdXP.s page 242 - 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