ChTheo/RadioPhotonic_PCB_software
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This commit is contained in:
feda
2025-03-03 16:03:02 +03:00
parent 2d2912a771
commit d0637bb5e6
97 changed files with 15957 additions and 15422 deletions
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180
build/stm32f7xx_hal_pwr.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccE9MXkV.s page 1
ARM GAS /tmp/cc78PkiJ.s page 1
1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** */
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /** @defgroup PWR PWR
ARM GAS /tmp/ccE9MXkV.s page 2
ARM GAS /tmp/cc78PkiJ.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @brief PWR HAL module driver
@ -118,7 +118,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows:
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro.
ARM GAS /tmp/ccE9MXkV.s page 3
ARM GAS /tmp/cc78PkiJ.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
@ -178,7 +178,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** void HAL_PWR_EnableBkUpAccess(void)
113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** {
61 .loc 1 113 1 is_stmt 1 view -0
ARM GAS /tmp/ccE9MXkV.s page 4
ARM GAS /tmp/cc78PkiJ.s page 4
62 .cfi_startproc
@ -238,7 +238,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
102 .L9:
103 .align 2
104 .L8:
ARM GAS /tmp/ccE9MXkV.s page 5
ARM GAS /tmp/cc78PkiJ.s page 5
105 000c 00700040 .word 1073770496
@ -298,7 +298,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** *** Sleep mode ***
172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** ==================
173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** [..]
ARM GAS /tmp/ccE9MXkV.s page 6
ARM GAS /tmp/cc78PkiJ.s page 6
174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Entry:
@ -358,7 +358,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** [..]
229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
ARM GAS /tmp/ccE9MXkV.s page 7
ARM GAS /tmp/cc78PkiJ.s page 7
231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** Wakeup event, a tamper event or a time-stamp event, without depending on
@ -418,7 +418,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
135 000e 1C4B ldr r3, .L15+4
136 0010 5A68 ldr r2, [r3, #4]
137 0012 22F48032 bic r2, r2, #65536
ARM GAS /tmp/ccE9MXkV.s page 8
ARM GAS /tmp/cc78PkiJ.s page 8
138 0016 5A60 str r2, [r3, #4]
@ -478,7 +478,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
175 .loc 1 287 3 view .LVU26
176 .loc 1 287 17 is_stmt 0 view .LVU27
ARM GAS /tmp/ccE9MXkV.s page 9
ARM GAS /tmp/cc78PkiJ.s page 9
177 0054 4368 ldr r3, [r0, #4]
@ -538,7 +538,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** void HAL_PWR_EnablePVD(void)
303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** {
219 .loc 1 303 1 is_stmt 1 view -0
ARM GAS /tmp/ccE9MXkV.s page 10
ARM GAS /tmp/cc78PkiJ.s page 10
220 .cfi_startproc
@ -598,7 +598,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
263 000c 00700040 .word 1073770496
264 .cfi_endproc
265 .LFE146:
ARM GAS /tmp/ccE9MXkV.s page 11
ARM GAS /tmp/cc78PkiJ.s page 11
267 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits
@ -658,7 +658,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
294 .LVL2:
295 .loc 1 344 3 is_stmt 0 view .LVU45
296 0018 9060 str r0, [r2, #8]
ARM GAS /tmp/ccE9MXkV.s page 12
ARM GAS /tmp/cc78PkiJ.s page 12
345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** }
@ -718,7 +718,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
333 000c 00700040 .word 1073770496
334 .cfi_endproc
335 .LFE148:
ARM GAS /tmp/ccE9MXkV.s page 13
ARM GAS /tmp/cc78PkiJ.s page 13
337 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits
@ -778,7 +778,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
360 0008 1361 str r3, [r2, #16]
397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Ensure that all instructions done before entering SLEEP mode */
ARM GAS /tmp/ccE9MXkV.s page 14
ARM GAS /tmp/cc78PkiJ.s page 14
399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __DSB();
@ -838,7 +838,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
ARM GAS /tmp/ccE9MXkV.s page 15
ARM GAS /tmp/cc78PkiJ.s page 15
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
@ -898,7 +898,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS /tmp/ccE9MXkV.s page 16
ARM GAS /tmp/cc78PkiJ.s page 16
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
@ -958,7 +958,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
ARM GAS /tmp/ccE9MXkV.s page 17
ARM GAS /tmp/cc78PkiJ.s page 17
167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
222:Drivers/CMSIS/Include/cmsis_gcc.h ****
223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
ARM GAS /tmp/ccE9MXkV.s page 18
ARM GAS /tmp/cc78PkiJ.s page 18
224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS /tmp/ccE9MXkV.s page 19
ARM GAS /tmp/cc78PkiJ.s page 19
281:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
335:Drivers/CMSIS/Include/cmsis_gcc.h ****
336:Drivers/CMSIS/Include/cmsis_gcc.h ****
337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
ARM GAS /tmp/ccE9MXkV.s page 20
ARM GAS /tmp/cc78PkiJ.s page 20
338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
ARM GAS /tmp/ccE9MXkV.s page 21
ARM GAS /tmp/cc78PkiJ.s page 21
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
449:Drivers/CMSIS/Include/cmsis_gcc.h **** */
450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccE9MXkV.s page 22
ARM GAS /tmp/cc78PkiJ.s page 22
452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
508:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccE9MXkV.s page 23
ARM GAS /tmp/cc78PkiJ.s page 23
509:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
ARM GAS /tmp/ccE9MXkV.s page 24
ARM GAS /tmp/cc78PkiJ.s page 24
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
ARM GAS /tmp/ccE9MXkV.s page 25
ARM GAS /tmp/cc78PkiJ.s page 25
623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
678:Drivers/CMSIS/Include/cmsis_gcc.h **** */
679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
ARM GAS /tmp/ccE9MXkV.s page 26
ARM GAS /tmp/cc78PkiJ.s page 26
680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccE9MXkV.s page 27
ARM GAS /tmp/cc78PkiJ.s page 27
737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccE9MXkV.s page 28
ARM GAS /tmp/cc78PkiJ.s page 28
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
849:Drivers/CMSIS/Include/cmsis_gcc.h **** */
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
ARM GAS /tmp/ccE9MXkV.s page 29
ARM GAS /tmp/cc78PkiJ.s page 29
851:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
387 .syntax unified
388 .LBE13:
389 .LBE12:
ARM GAS /tmp/ccE9MXkV.s page 30
ARM GAS /tmp/cc78PkiJ.s page 30
401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
429 .global HAL_PWR_EnterSTOPMode
430 .syntax unified
431 .thumb
ARM GAS /tmp/ccE9MXkV.s page 31
ARM GAS /tmp/cc78PkiJ.s page 31
432 .thumb_func
@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
448:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Set LPDS, MRLVDS and LPLVDS bits according to Regulator value */
450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** tmpreg |= Regulator;
ARM GAS /tmp/ccE9MXkV.s page 32
ARM GAS /tmp/cc78PkiJ.s page 32
455 .loc 1 450 3 is_stmt 1 view .LVU77
@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
496 .syntax unified
497 .LBE17:
498 .LBE16:
ARM GAS /tmp/ccE9MXkV.s page 33
ARM GAS /tmp/cc78PkiJ.s page 33
461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
535 0036 F7E7 b .L37
536 .L40:
537 .align 2
ARM GAS /tmp/ccE9MXkV.s page 34
ARM GAS /tmp/cc78PkiJ.s page 34
538 .L39:
@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Request Wait For Interrupt */
502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __WFI();
571 .loc 1 502 3 is_stmt 1 view .LVU104
ARM GAS /tmp/ccE9MXkV.s page 35
ARM GAS /tmp/cc78PkiJ.s page 35
572 .syntax unified
@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
602 @ link register save eliminated.
529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* NOTE : This function Should not be modified, when the callback is needed,
530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** the HAL_PWR_PVDCallback could be implemented in the user file
ARM GAS /tmp/ccE9MXkV.s page 36
ARM GAS /tmp/cc78PkiJ.s page 36
531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** */
@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
649 .L49:
650 001c 003C0140 .word 1073822720
651 .cfi_endproc
ARM GAS /tmp/ccE9MXkV.s page 37
ARM GAS /tmp/cc78PkiJ.s page 37
652 .LFE152:
@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
550:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
551:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over.
552:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @retval None
ARM GAS /tmp/ccE9MXkV.s page 38
ARM GAS /tmp/cc78PkiJ.s page 38
553:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** */
@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccE9MXkV.s page 1
570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** }
732 .loc 1 570 1 is_stmt 0 view .LVU124
733 000a 7047 bx lr
ARM GAS /tmp/ccE9MXkV.s page 39
ARM GAS /tmp/cc78PkiJ.s page 39
734 .L59:
@ -2333,60 +2333,60 @@ ARM GAS /tmp/ccE9MXkV.s page 1
774 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
775 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h"
776 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
ARM GAS /tmp/ccE9MXkV.s page 40
ARM GAS /tmp/cc78PkiJ.s page 40
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f7xx_hal_pwr.c
/tmp/ccE9MXkV.s:17 .text.HAL_PWR_DeInit:0000000000000000 $t
/tmp/ccE9MXkV.s:25 .text.HAL_PWR_DeInit:0000000000000000 HAL_PWR_DeInit
/tmp/ccE9MXkV.s:47 .text.HAL_PWR_DeInit:0000000000000014 $d
/tmp/ccE9MXkV.s:52 .text.HAL_PWR_EnableBkUpAccess:0000000000000000 $t
/tmp/ccE9MXkV.s:59 .text.HAL_PWR_EnableBkUpAccess:0000000000000000 HAL_PWR_EnableBkUpAccess
/tmp/ccE9MXkV.s:76 .text.HAL_PWR_EnableBkUpAccess:000000000000000c $d
/tmp/ccE9MXkV.s:81 .text.HAL_PWR_DisableBkUpAccess:0000000000000000 $t
/tmp/ccE9MXkV.s:88 .text.HAL_PWR_DisableBkUpAccess:0000000000000000 HAL_PWR_DisableBkUpAccess
/tmp/ccE9MXkV.s:105 .text.HAL_PWR_DisableBkUpAccess:000000000000000c $d
/tmp/ccE9MXkV.s:110 .text.HAL_PWR_ConfigPVD:0000000000000000 $t
/tmp/ccE9MXkV.s:117 .text.HAL_PWR_ConfigPVD:0000000000000000 HAL_PWR_ConfigPVD
/tmp/ccE9MXkV.s:204 .text.HAL_PWR_ConfigPVD:000000000000007c $d
/tmp/ccE9MXkV.s:210 .text.HAL_PWR_EnablePVD:0000000000000000 $t
/tmp/ccE9MXkV.s:217 .text.HAL_PWR_EnablePVD:0000000000000000 HAL_PWR_EnablePVD
/tmp/ccE9MXkV.s:234 .text.HAL_PWR_EnablePVD:000000000000000c $d
/tmp/ccE9MXkV.s:239 .text.HAL_PWR_DisablePVD:0000000000000000 $t
/tmp/ccE9MXkV.s:246 .text.HAL_PWR_DisablePVD:0000000000000000 HAL_PWR_DisablePVD
/tmp/ccE9MXkV.s:263 .text.HAL_PWR_DisablePVD:000000000000000c $d
/tmp/ccE9MXkV.s:268 .text.HAL_PWR_EnableWakeUpPin:0000000000000000 $t
/tmp/ccE9MXkV.s:275 .text.HAL_PWR_EnableWakeUpPin:0000000000000000 HAL_PWR_EnableWakeUpPin
/tmp/ccE9MXkV.s:302 .text.HAL_PWR_EnableWakeUpPin:000000000000001c $d
/tmp/ccE9MXkV.s:307 .text.HAL_PWR_DisableWakeUpPin:0000000000000000 $t
/tmp/ccE9MXkV.s:314 .text.HAL_PWR_DisableWakeUpPin:0000000000000000 HAL_PWR_DisableWakeUpPin
/tmp/ccE9MXkV.s:333 .text.HAL_PWR_DisableWakeUpPin:000000000000000c $d
/tmp/ccE9MXkV.s:338 .text.HAL_PWR_EnterSLEEPMode:0000000000000000 $t
/tmp/ccE9MXkV.s:345 .text.HAL_PWR_EnterSLEEPMode:0000000000000000 HAL_PWR_EnterSLEEPMode
/tmp/ccE9MXkV.s:423 .text.HAL_PWR_EnterSLEEPMode:0000000000000024 $d
/tmp/ccE9MXkV.s:428 .text.HAL_PWR_EnterSTOPMode:0000000000000000 $t
/tmp/ccE9MXkV.s:435 .text.HAL_PWR_EnterSTOPMode:0000000000000000 HAL_PWR_EnterSTOPMode
/tmp/ccE9MXkV.s:539 .text.HAL_PWR_EnterSTOPMode:0000000000000038 $d
/tmp/ccE9MXkV.s:545 .text.HAL_PWR_EnterSTANDBYMode:0000000000000000 $t
/tmp/ccE9MXkV.s:552 .text.HAL_PWR_EnterSTANDBYMode:0000000000000000 HAL_PWR_EnterSTANDBYMode
/tmp/ccE9MXkV.s:583 .text.HAL_PWR_EnterSTANDBYMode:0000000000000018 $d
/tmp/ccE9MXkV.s:589 .text.HAL_PWR_PVDCallback:0000000000000000 $t
/tmp/ccE9MXkV.s:596 .text.HAL_PWR_PVDCallback:0000000000000000 HAL_PWR_PVDCallback
/tmp/ccE9MXkV.s:609 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 $t
/tmp/ccE9MXkV.s:616 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 HAL_PWR_PVD_IRQHandler
/tmp/ccE9MXkV.s:650 .text.HAL_PWR_PVD_IRQHandler:000000000000001c $d
/tmp/ccE9MXkV.s:655 .text.HAL_PWR_EnableSleepOnExit:0000000000000000 $t
/tmp/ccE9MXkV.s:662 .text.HAL_PWR_EnableSleepOnExit:0000000000000000 HAL_PWR_EnableSleepOnExit
/tmp/ccE9MXkV.s:679 .text.HAL_PWR_EnableSleepOnExit:000000000000000c $d
/tmp/ccE9MXkV.s:684 .text.HAL_PWR_DisableSleepOnExit:0000000000000000 $t
/tmp/ccE9MXkV.s:691 .text.HAL_PWR_DisableSleepOnExit:0000000000000000 HAL_PWR_DisableSleepOnExit
/tmp/ccE9MXkV.s:708 .text.HAL_PWR_DisableSleepOnExit:000000000000000c $d
/tmp/ccE9MXkV.s:713 .text.HAL_PWR_EnableSEVOnPend:0000000000000000 $t
/tmp/ccE9MXkV.s:720 .text.HAL_PWR_EnableSEVOnPend:0000000000000000 HAL_PWR_EnableSEVOnPend
/tmp/ccE9MXkV.s:737 .text.HAL_PWR_EnableSEVOnPend:000000000000000c $d
/tmp/ccE9MXkV.s:742 .text.HAL_PWR_DisableSEVOnPend:0000000000000000 $t
/tmp/ccE9MXkV.s:749 .text.HAL_PWR_DisableSEVOnPend:0000000000000000 HAL_PWR_DisableSEVOnPend
/tmp/ccE9MXkV.s:766 .text.HAL_PWR_DisableSEVOnPend:000000000000000c $d
/tmp/cc78PkiJ.s:17 .text.HAL_PWR_DeInit:0000000000000000 $t
/tmp/cc78PkiJ.s:25 .text.HAL_PWR_DeInit:0000000000000000 HAL_PWR_DeInit
/tmp/cc78PkiJ.s:47 .text.HAL_PWR_DeInit:0000000000000014 $d
/tmp/cc78PkiJ.s:52 .text.HAL_PWR_EnableBkUpAccess:0000000000000000 $t
/tmp/cc78PkiJ.s:59 .text.HAL_PWR_EnableBkUpAccess:0000000000000000 HAL_PWR_EnableBkUpAccess
/tmp/cc78PkiJ.s:76 .text.HAL_PWR_EnableBkUpAccess:000000000000000c $d
/tmp/cc78PkiJ.s:81 .text.HAL_PWR_DisableBkUpAccess:0000000000000000 $t
/tmp/cc78PkiJ.s:88 .text.HAL_PWR_DisableBkUpAccess:0000000000000000 HAL_PWR_DisableBkUpAccess
/tmp/cc78PkiJ.s:105 .text.HAL_PWR_DisableBkUpAccess:000000000000000c $d
/tmp/cc78PkiJ.s:110 .text.HAL_PWR_ConfigPVD:0000000000000000 $t
/tmp/cc78PkiJ.s:117 .text.HAL_PWR_ConfigPVD:0000000000000000 HAL_PWR_ConfigPVD
/tmp/cc78PkiJ.s:204 .text.HAL_PWR_ConfigPVD:000000000000007c $d
/tmp/cc78PkiJ.s:210 .text.HAL_PWR_EnablePVD:0000000000000000 $t
/tmp/cc78PkiJ.s:217 .text.HAL_PWR_EnablePVD:0000000000000000 HAL_PWR_EnablePVD
/tmp/cc78PkiJ.s:234 .text.HAL_PWR_EnablePVD:000000000000000c $d
/tmp/cc78PkiJ.s:239 .text.HAL_PWR_DisablePVD:0000000000000000 $t
/tmp/cc78PkiJ.s:246 .text.HAL_PWR_DisablePVD:0000000000000000 HAL_PWR_DisablePVD
/tmp/cc78PkiJ.s:263 .text.HAL_PWR_DisablePVD:000000000000000c $d
/tmp/cc78PkiJ.s:268 .text.HAL_PWR_EnableWakeUpPin:0000000000000000 $t
/tmp/cc78PkiJ.s:275 .text.HAL_PWR_EnableWakeUpPin:0000000000000000 HAL_PWR_EnableWakeUpPin
/tmp/cc78PkiJ.s:302 .text.HAL_PWR_EnableWakeUpPin:000000000000001c $d
/tmp/cc78PkiJ.s:307 .text.HAL_PWR_DisableWakeUpPin:0000000000000000 $t
/tmp/cc78PkiJ.s:314 .text.HAL_PWR_DisableWakeUpPin:0000000000000000 HAL_PWR_DisableWakeUpPin
/tmp/cc78PkiJ.s:333 .text.HAL_PWR_DisableWakeUpPin:000000000000000c $d
/tmp/cc78PkiJ.s:338 .text.HAL_PWR_EnterSLEEPMode:0000000000000000 $t
/tmp/cc78PkiJ.s:345 .text.HAL_PWR_EnterSLEEPMode:0000000000000000 HAL_PWR_EnterSLEEPMode
/tmp/cc78PkiJ.s:423 .text.HAL_PWR_EnterSLEEPMode:0000000000000024 $d
/tmp/cc78PkiJ.s:428 .text.HAL_PWR_EnterSTOPMode:0000000000000000 $t
/tmp/cc78PkiJ.s:435 .text.HAL_PWR_EnterSTOPMode:0000000000000000 HAL_PWR_EnterSTOPMode
/tmp/cc78PkiJ.s:539 .text.HAL_PWR_EnterSTOPMode:0000000000000038 $d
/tmp/cc78PkiJ.s:545 .text.HAL_PWR_EnterSTANDBYMode:0000000000000000 $t
/tmp/cc78PkiJ.s:552 .text.HAL_PWR_EnterSTANDBYMode:0000000000000000 HAL_PWR_EnterSTANDBYMode
/tmp/cc78PkiJ.s:583 .text.HAL_PWR_EnterSTANDBYMode:0000000000000018 $d
/tmp/cc78PkiJ.s:589 .text.HAL_PWR_PVDCallback:0000000000000000 $t
/tmp/cc78PkiJ.s:596 .text.HAL_PWR_PVDCallback:0000000000000000 HAL_PWR_PVDCallback
/tmp/cc78PkiJ.s:609 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 $t
/tmp/cc78PkiJ.s:616 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 HAL_PWR_PVD_IRQHandler
/tmp/cc78PkiJ.s:650 .text.HAL_PWR_PVD_IRQHandler:000000000000001c $d
/tmp/cc78PkiJ.s:655 .text.HAL_PWR_EnableSleepOnExit:0000000000000000 $t
/tmp/cc78PkiJ.s:662 .text.HAL_PWR_EnableSleepOnExit:0000000000000000 HAL_PWR_EnableSleepOnExit
/tmp/cc78PkiJ.s:679 .text.HAL_PWR_EnableSleepOnExit:000000000000000c $d
/tmp/cc78PkiJ.s:684 .text.HAL_PWR_DisableSleepOnExit:0000000000000000 $t
/tmp/cc78PkiJ.s:691 .text.HAL_PWR_DisableSleepOnExit:0000000000000000 HAL_PWR_DisableSleepOnExit
/tmp/cc78PkiJ.s:708 .text.HAL_PWR_DisableSleepOnExit:000000000000000c $d
/tmp/cc78PkiJ.s:713 .text.HAL_PWR_EnableSEVOnPend:0000000000000000 $t
/tmp/cc78PkiJ.s:720 .text.HAL_PWR_EnableSEVOnPend:0000000000000000 HAL_PWR_EnableSEVOnPend
/tmp/cc78PkiJ.s:737 .text.HAL_PWR_EnableSEVOnPend:000000000000000c $d
/tmp/cc78PkiJ.s:742 .text.HAL_PWR_DisableSEVOnPend:0000000000000000 $t
/tmp/cc78PkiJ.s:749 .text.HAL_PWR_DisableSEVOnPend:0000000000000000 HAL_PWR_DisableSEVOnPend
/tmp/cc78PkiJ.s:766 .text.HAL_PWR_DisableSEVOnPend:000000000000000c $d
NO UNDEFINED SYMBOLS