From bd15847b769af1b8fabc74775e554db6e137725b Mon Sep 17 00:00:00 2001 From: Theodor Chikin Date: Thu, 18 Sep 2025 18:57:18 +0300 Subject: [PATCH] Reduced Mach-Zander modulatoes --- .gitignore | 2 +- Src/main.c | 5 +- build/For_stm32.bin | Bin 44412 -> 44412 bytes build/For_stm32.elf | Bin 730904 -> 730904 bytes build/For_stm32.hex | 2 +- build/main.lst | 18081 +++++++++++++++++++++--------------------- build/main.o | Bin 134592 -> 134592 bytes 7 files changed, 9046 insertions(+), 9044 deletions(-) diff --git a/.gitignore b/.gitignore index 567609b..8b13789 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1 @@ -build/ + diff --git a/Src/main.c b/Src/main.c index 0eadeca..8a705f4 100644 --- a/Src/main.c +++ b/Src/main.c @@ -186,8 +186,9 @@ int main(void) TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - //Mach-Zander clock (should be half of ADC clock freq) - TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + //Mach-Zander clock (should be 1/4 of ADC clock freq) + + TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; /* diff --git a/build/For_stm32.bin b/build/For_stm32.bin index c0caf94316e640bef33b2fbd45d86c40d7416346..e8dab8e09c23b5b31a9ea38e5ebf0526b2c32042 100755 GIT binary patch delta 18 acmex!i|NlTrVUFBnP)RFZ(eSAwHg3gJP5J? delta 18 acmex!i|NlTrVUFBnWGsPH!nB5S`7eLFbHq} diff --git a/build/For_stm32.elf b/build/For_stm32.elf index f81c4669109ce98351617e99bee4fcc697157268..98d492f5654caa6b69ce8f152ec487c77bb7e656 100755 GIT binary patch delta 5981 zcmZu#34B!5)qiK+%)2ua!XlGN2uT>S5kgEN0-}Zr>gT7S2v|P~1**1G1uC)##UvyW zLI``v15Uzj0ust1lqIr=EMieVRJM>3R;g4GO4Wcs0`!01oe6`G-|xKh-Z|%SAfN zxxcP6tub%aJxOcL9#;~&Ep{6;q=V)x2G}NOG`O>-JvihojTXCGebgFC`m`UDCBG8; z>6&&^)3ob=)S)AWXtdOtjZR&G}t ze7pe21f>3Pj7E{}5GgPnFcqMsQHN%bx0%J)V!SqYTdDFBFm?jcKW+z>-Te4k0-Z1~ zT#Ly&;dzhZ|R^Yt#R|Y9s z@F)_P^Z?!}TwSD#M?pOZP%c)u1_ZlU;Tj=bv>Te%AZ=JKZc#Q~05KDwT&yx%-0-A) zpnR$Xxm>a=pSCLb6CfM`Xq|kr9tzFAH)8M{dBa0R=HwfnQcJUUeT=82%O_1vMu-yt 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zJKzNVVG?kK8Bw^Ev~xIv{X+gL5vN6SL_~*EL#-sUGGuvEJ8MQ*wB9%pq)nJ2?oonv zE^p>uSe>>tT%MoP?P{t2dx%_w%UOjl;B$GJI4EfDh&1=U!6)X5HkCW(;PQm)@$tE0 zGwtD7EFPoYYLq6ZiFaa@ns}?&HBSu6HC46Dl)lv1)pG7_%R#GJO5Msodoo&SeFl@! zN_BY-J~c9~3Pt-kgtphFeHB7mWYcD-S@^uA@FxsIsc?%TTD09Ztw;?>i+06sT}RYK zH1y88Hh5>Pw(hLai|jk=IVF1M&WcJZ3Nu9t2OGQTF)jOgFdZaB{dq))1sRgH&3V<8nsXVpR I`^4n`2TPITSpWb4 diff --git a/build/For_stm32.hex b/build/For_stm32.hex index 287c1fd..7e868e2 100644 --- a/build/For_stm32.hex +++ b/build/For_stm32.hex @@ -793,7 +793,7 @@ :1031700085F9FEF7F1FFFFF735F8FFF78DFEFFF752 :10318000A1FEFFF7BBFEFFF7EFFEFFF725FFFFF7FE :103190006FF8844A3523D362D36A01335B08013B5D -:1031A000D363D36A5B00013302F5A032D362D36AE2 +:1031A000D363D36A9B00033302F5A032D362D36AA0 :1031B00001335B08013B53634CE07B4B1B78002BD6 :1031C0004FD17A4A52E8003F43F4807342E800311D :1031D0000029F6D1754A52E8003F43F0200342E847 diff --git a/build/main.lst b/build/main.lst index 8644ff7..d0b2a72 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccWQNJQt.s page 1 +ARM GAS /tmp/ccO46DoU.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */ 29:Drivers/CMSIS/Include/core_cm7.h **** #endif 30:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 2 + ARM GAS /tmp/ccO46DoU.s page 2 31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC @@ -118,7 +118,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 86:Drivers/CMSIS/Include/core_cm7.h **** #endif 87:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 3 + ARM GAS /tmp/ccO46DoU.s page 3 88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) @@ -178,7 +178,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 143:Drivers/CMSIS/Include/core_cm7.h **** #endif 144:Drivers/CMSIS/Include/core_cm7.h **** #else - ARM GAS /tmp/ccWQNJQt.s page 4 + ARM GAS /tmp/ccO46DoU.s page 4 145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U @@ -238,7 +238,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!" 200:Drivers/CMSIS/Include/core_cm7.h **** #endif 201:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 5 + ARM GAS /tmp/ccO46DoU.s page 5 202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT @@ -298,7 +298,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register 257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register 258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/ - ARM GAS /tmp/ccWQNJQt.s page 6 + ARM GAS /tmp/ccO46DoU.s page 6 259:Drivers/CMSIS/Include/core_cm7.h **** /** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 313:Drivers/CMSIS/Include/core_cm7.h **** typedef union 314:Drivers/CMSIS/Include/core_cm7.h **** { 315:Drivers/CMSIS/Include/core_cm7.h **** struct - ARM GAS /tmp/ccWQNJQt.s page 7 + ARM GAS /tmp/ccO46DoU.s page 7 316:Drivers/CMSIS/Include/core_cm7.h **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR 371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR 372:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 8 + ARM GAS /tmp/ccO46DoU.s page 8 373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR @@ -478,7 +478,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * 428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U]; 429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - ARM GAS /tmp/ccWQNJQt.s page 9 + ARM GAS /tmp/ccO46DoU.s page 9 430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U]; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U]; 485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 - ARM GAS /tmp/ccWQNJQt.s page 10 + ARM GAS /tmp/ccO46DoU.s page 10 487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB 542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB 543:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 11 + ARM GAS /tmp/ccO46DoU.s page 11 544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB @@ -658,7 +658,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 598:Drivers/CMSIS/Include/core_cm7.h **** 599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB 600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB - ARM GAS /tmp/ccWQNJQt.s page 12 + ARM GAS /tmp/ccO46DoU.s page 12 601:Drivers/CMSIS/Include/core_cm7.h **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB 656:Drivers/CMSIS/Include/core_cm7.h **** 657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB - ARM GAS /tmp/ccWQNJQt.s page 13 + ARM GAS /tmp/ccO46DoU.s page 13 658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB @@ -778,7 +778,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB 713:Drivers/CMSIS/Include/core_cm7.h **** 714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ - ARM GAS /tmp/ccWQNJQt.s page 14 + ARM GAS /tmp/ccO46DoU.s page 14 715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB @@ -838,7 +838,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 769:Drivers/CMSIS/Include/core_cm7.h **** 770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB 771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB - ARM GAS /tmp/ccWQNJQt.s page 15 + ARM GAS /tmp/ccO46DoU.s page 15 772:Drivers/CMSIS/Include/core_cm7.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB 827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB 828:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 16 + ARM GAS /tmp/ccO46DoU.s page 16 829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB 884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB 885:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 17 + ARM GAS /tmp/ccO46DoU.s page 17 886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: 941:Drivers/CMSIS/Include/core_cm7.h **** 942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: - ARM GAS /tmp/ccWQNJQt.s page 18 + ARM GAS /tmp/ccO46DoU.s page 18 943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT 998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT 999:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 19 + ARM GAS /tmp/ccO46DoU.s page 19 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM 1056:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 20 + ARM GAS /tmp/ccO46DoU.s page 20 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1111:Drivers/CMSIS/Include/core_cm7.h **** */ 1112:Drivers/CMSIS/Include/core_cm7.h **** 1113:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 21 + ARM GAS /tmp/ccO46DoU.s page 21 1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR 1170:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 22 + ARM GAS /tmp/ccO46DoU.s page 22 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */ 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN - ARM GAS /tmp/ccWQNJQt.s page 23 + ARM GAS /tmp/ccO46DoU.s page 23 1228:Drivers/CMSIS/Include/core_cm7.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U]; 1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ 1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - ARM GAS /tmp/ccWQNJQt.s page 24 + ARM GAS /tmp/ccO46DoU.s page 24 1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF 1341:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 25 + ARM GAS /tmp/ccO46DoU.s page 25 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV 1397:Drivers/CMSIS/Include/core_cm7.h **** 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV - ARM GAS /tmp/ccWQNJQt.s page 26 + ARM GAS /tmp/ccO46DoU.s page 26 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU 1454:Drivers/CMSIS/Include/core_cm7.h **** 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */ - ARM GAS /tmp/ccWQNJQt.s page 27 + ARM GAS /tmp/ccO46DoU.s page 27 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */ 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ 1512:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 28 + ARM GAS /tmp/ccO46DoU.s page 28 1513:Drivers/CMSIS/Include/core_cm7.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */ 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS - ARM GAS /tmp/ccWQNJQt.s page 29 + ARM GAS /tmp/ccO46DoU.s page 29 1570:Drivers/CMSIS/Include/core_cm7.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register 1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) 1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers - ARM GAS /tmp/ccWQNJQt.s page 30 + ARM GAS /tmp/ccO46DoU.s page 30 1627:Drivers/CMSIS/Include/core_cm7.h **** @{ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1681:Drivers/CMSIS/Include/core_cm7.h **** 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core - ARM GAS /tmp/ccWQNJQt.s page 31 + ARM GAS /tmp/ccO46DoU.s page 31 1684:Drivers/CMSIS/Include/core_cm7.h **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. 1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value. 1740:Drivers/CMSIS/Include/core_cm7.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 32 + ARM GAS /tmp/ccO46DoU.s page 32 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions 1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions 1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions - ARM GAS /tmp/ccWQNJQt.s page 33 + ARM GAS /tmp/ccO46DoU.s page 33 1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu 1854:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccWQNJQt.s page 34 + ARM GAS /tmp/ccO46DoU.s page 34 1855:Drivers/CMSIS/Include/core_cm7.h **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled. 1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled. 1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccWQNJQt.s page 35 + ARM GAS /tmp/ccO46DoU.s page 35 1912:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1966:Drivers/CMSIS/Include/core_cm7.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. 1967:Drivers/CMSIS/Include/core_cm7.h **** \param [in] IRQn Device specific interrupt number. 1968:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccWQNJQt.s page 36 + ARM GAS /tmp/ccO46DoU.s page 36 1969:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2023:Drivers/CMSIS/Include/core_cm7.h **** */ 2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) 2025:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccWQNJQt.s page 37 + ARM GAS /tmp/ccO46DoU.s page 37 2026:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 36 .cfi_def_cfa_offset 4 37 .cfi_offset 14, -4 2073:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used - ARM GAS /tmp/ccWQNJQt.s page 38 + ARM GAS /tmp/ccO46DoU.s page 38 38 .loc 2 2073 3 is_stmt 1 view .LVU2 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2078:Drivers/CMSIS/Include/core_cm7.h **** 81 .loc 2 2078 109 discriminator 2 view .LVU19 82 003a 0023 movs r3, #0 - ARM GAS /tmp/ccWQNJQt.s page 39 + ARM GAS /tmp/ccO46DoU.s page 39 83 003c EEE7 b .L2 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 45:Src/main.c **** ADC_HandleTypeDef hadc1; 46:Src/main.c **** ADC_HandleTypeDef hadc3; 47:Src/main.c **** - ARM GAS /tmp/ccWQNJQt.s page 40 + ARM GAS /tmp/ccO46DoU.s page 40 48:Src/main.c **** SD_HandleTypeDef hsd1; @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 102:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); 103:Src/main.c **** static uint16_t MPhD_T(uint8_t num); 104:Src/main.c **** static uint16_t Get_ADC(uint8_t num); - ARM GAS /tmp/ccWQNJQt.s page 41 + ARM GAS /tmp/ccO46DoU.s page 41 105:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 159:Src/main.c **** MX_ADC3_Init(); 160:Src/main.c **** MX_SPI2_Init(); 161:Src/main.c **** MX_SPI5_Init(); - ARM GAS /tmp/ccWQNJQt.s page 42 + ARM GAS /tmp/ccO46DoU.s page 42 162:Src/main.c **** MX_SPI6_Init(); @@ -2488,868 +2488,869 @@ ARM GAS /tmp/ccWQNJQt.s page 1 186:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; 187:Src/main.c **** 188:Src/main.c **** - 189:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 190:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 192:Src/main.c **** - 193:Src/main.c **** /* - 194:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ - 195:Src/main.c **** - 196:Src/main.c **** CPU_state = DECODE_ENABLE; - 197:Src/main.c **** } - 198:Src/main.c **** */ - 199:Src/main.c **** /* USER CODE END 2 */ - 200:Src/main.c **** - 201:Src/main.c **** /* Infinite loop */ - 202:Src/main.c **** /* USER CODE BEGIN WHILE */ - 203:Src/main.c **** while (1) - 204:Src/main.c **** { - 205:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) - 206:Src/main.c **** { - 207:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); - 208:Src/main.c **** LL_USART_EnableIT_PE(USART1); - 209:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); - 210:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); - 211:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); - 212:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 213:Src/main.c **** u_rx_flg = 1; - 214:Src/main.c **** } - 215:Src/main.c **** // else - 216:Src/main.c **** // { - 217:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); - 218:Src/main.c **** // u_rx_flg = 0; - ARM GAS /tmp/ccWQNJQt.s page 43 + 189:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) + 190:Src/main.c **** + 191:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; + 192:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 193:Src/main.c **** + 194:Src/main.c **** /* + 195:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ + 196:Src/main.c **** + 197:Src/main.c **** CPU_state = DECODE_ENABLE; + 198:Src/main.c **** } + 199:Src/main.c **** */ + 200:Src/main.c **** /* USER CODE END 2 */ + 201:Src/main.c **** + 202:Src/main.c **** /* Infinite loop */ + 203:Src/main.c **** /* USER CODE BEGIN WHILE */ + 204:Src/main.c **** while (1) + 205:Src/main.c **** { + 206:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) + 207:Src/main.c **** { + 208:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); + 209:Src/main.c **** LL_USART_EnableIT_PE(USART1); + 210:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); + 211:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); + 212:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); + 213:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 214:Src/main.c **** u_rx_flg = 1; + 215:Src/main.c **** } + 216:Src/main.c **** // else + 217:Src/main.c **** // { + 218:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); + ARM GAS /tmp/ccO46DoU.s page 43 - 219:Src/main.c **** // } - 220:Src/main.c **** switch (CPU_state) - 221:Src/main.c **** { - 222:Src/main.c **** case HALT://0 - Default state - 223:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 224:Src/main.c **** task.current_param = task.min_param; - 225:Src/main.c **** Stop_TIM10(); - 226:Src/main.c **** break; - 227:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 228:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); - 229:Src/main.c **** if (CheckChecksum(COMMAND)) - 230:Src/main.c **** { - 231:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 - 232:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 233:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 234:Src/main.c **** TO6_before = TO6; - 235:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 236:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; - 237:Src/main.c **** CPU_state = WORK_ENABLE; - 238:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 239:Src/main.c **** } - 240:Src/main.c **** else - 241:Src/main.c **** { - 242:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 243:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 244:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 245:Src/main.c **** } - 246:Src/main.c **** UART_transmission_request = MESS_01; - 247:Src/main.c **** break; - 248:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 249:Src/main.c **** //Set current setup to default - 250:Src/main.c **** task.current_param = task.min_param; - 251:Src/main.c **** Stop_TIM10(); - 252:Src/main.c **** Init_params(); - 253:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 254:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 255:Src/main.c **** CPU_state = HALT; - 256:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 257:Src/main.c **** UART_transmission_request = MESS_01; - 258:Src/main.c **** break; - 259:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 260:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); - 261:Src/main.c **** State_Data[0]|=temp16&0xff; - 262:Src/main.c **** if (temp16==0) - 263:Src/main.c **** { - 264:Src/main.c **** UART_transmission_request = MESS_03; - 265:Src/main.c **** } - 266:Src/main.c **** else - 267:Src/main.c **** { - 268:Src/main.c **** UART_transmission_request = MESS_01; - 269:Src/main.c **** } - 270:Src/main.c **** CPU_state_old = HALT; - 271:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 272:Src/main.c **** break; - 273:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 274:Src/main.c **** UART_transmission_request = MESS_02; - 275:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - ARM GAS /tmp/ccWQNJQt.s page 44 + 219:Src/main.c **** // u_rx_flg = 0; + 220:Src/main.c **** // } + 221:Src/main.c **** switch (CPU_state) + 222:Src/main.c **** { + 223:Src/main.c **** case HALT://0 - Default state + 224:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 225:Src/main.c **** task.current_param = task.min_param; + 226:Src/main.c **** Stop_TIM10(); + 227:Src/main.c **** break; + 228:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 229:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); + 230:Src/main.c **** if (CheckChecksum(COMMAND)) + 231:Src/main.c **** { + 232:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 + 233:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 234:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 235:Src/main.c **** TO6_before = TO6; + 236:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 237:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; + 238:Src/main.c **** CPU_state = WORK_ENABLE; + 239:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 240:Src/main.c **** } + 241:Src/main.c **** else + 242:Src/main.c **** { + 243:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 244:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 245:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 246:Src/main.c **** } + 247:Src/main.c **** UART_transmission_request = MESS_01; + 248:Src/main.c **** break; + 249:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 250:Src/main.c **** //Set current setup to default + 251:Src/main.c **** task.current_param = task.min_param; + 252:Src/main.c **** Stop_TIM10(); + 253:Src/main.c **** Init_params(); + 254:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 255:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 256:Src/main.c **** CPU_state = HALT; + 257:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 258:Src/main.c **** UART_transmission_request = MESS_01; + 259:Src/main.c **** break; + 260:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 261:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); + 262:Src/main.c **** State_Data[0]|=temp16&0xff; + 263:Src/main.c **** if (temp16==0) + 264:Src/main.c **** { + 265:Src/main.c **** UART_transmission_request = MESS_03; + 266:Src/main.c **** } + 267:Src/main.c **** else + 268:Src/main.c **** { + 269:Src/main.c **** UART_transmission_request = MESS_01; + 270:Src/main.c **** } + 271:Src/main.c **** CPU_state_old = HALT; + 272:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 273:Src/main.c **** break; + 274:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 275:Src/main.c **** UART_transmission_request = MESS_02; + ARM GAS /tmp/ccO46DoU.s page 44 - 276:Src/main.c **** break; - 277:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 278:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; - 279:Src/main.c **** UART_transmission_request = MESS_01; - 280:Src/main.c **** CPU_state = CPU_state_old; - 281:Src/main.c **** break; - 282:Src/main.c **** case STATE://6 - Transmith state message - 283:Src/main.c **** UART_transmission_request = MESS_01; - 284:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 285:Src/main.c **** break; - 286:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 287:Src/main.c **** task.current_param = task.min_param; - 288:Src/main.c **** Stop_TIM10(); - 289:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 290:Src/main.c **** { - 291:Src/main.c **** TO7_before = TO7; - 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 276:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 277:Src/main.c **** break; + 278:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 279:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; + 280:Src/main.c **** UART_transmission_request = MESS_01; + 281:Src/main.c **** CPU_state = CPU_state_old; + 282:Src/main.c **** break; + 283:Src/main.c **** case STATE://6 - Transmith state message + 284:Src/main.c **** UART_transmission_request = MESS_01; + 285:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 286:Src/main.c **** break; + 287:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 288:Src/main.c **** task.current_param = task.min_param; + 289:Src/main.c **** Stop_TIM10(); + 290:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 291:Src/main.c **** { + 292:Src/main.c **** TO7_before = TO7; 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 294:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 296:Src/main.c **** - 297:Src/main.c **** //Correct temperature in all pulses - 298:Src/main.c **** (void) MPhD_T(3); - 299:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 300:Src/main.c **** (void) MPhD_T(4); - 301:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 302:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 303:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 304:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 305:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 306:Src/main.c **** - 307:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 308:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 309:Src/main.c **** - 310:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 - 311:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 312:Src/main.c **** - 313:Src/main.c **** //Prepare DATA of internals ADCs - 314:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 315:Src/main.c **** temp16 = Get_ADC(0); - 316:Src/main.c **** temp16 = Get_ADC(1); - 317:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 318:Src/main.c **** - 319:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 320:Src/main.c **** temp16 = Get_ADC(1); - 321:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 322:Src/main.c **** - 323:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 324:Src/main.c **** temp16 = Get_ADC(1); - 325:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 326:Src/main.c **** - 327:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 328:Src/main.c **** temp16 = Get_ADC(1); - 329:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 330:Src/main.c **** - 331:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 332:Src/main.c **** temp16 = Get_ADC(1); - ARM GAS /tmp/ccWQNJQt.s page 45 + 296:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 297:Src/main.c **** + 298:Src/main.c **** //Correct temperature in all pulses + 299:Src/main.c **** (void) MPhD_T(3); + 300:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 301:Src/main.c **** (void) MPhD_T(4); + 302:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 303:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 304:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 305:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 306:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 307:Src/main.c **** + 308:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 309:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 310:Src/main.c **** + 311:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 + 312:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 313:Src/main.c **** + 314:Src/main.c **** //Prepare DATA of internals ADCs + 315:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 316:Src/main.c **** temp16 = Get_ADC(0); + 317:Src/main.c **** temp16 = Get_ADC(1); + 318:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 319:Src/main.c **** + 320:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 321:Src/main.c **** temp16 = Get_ADC(1); + 322:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 323:Src/main.c **** + 324:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 325:Src/main.c **** temp16 = Get_ADC(1); + 326:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 327:Src/main.c **** + 328:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 329:Src/main.c **** temp16 = Get_ADC(1); + 330:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 331:Src/main.c **** + 332:Src/main.c **** //Put the temperature of LD2 to Long_Data: + ARM GAS /tmp/ccO46DoU.s page 45 - 333:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 334:Src/main.c **** temp16 = Get_ADC(2); - 335:Src/main.c **** - 336:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 337:Src/main.c **** temp16 = Get_ADC(3); - 338:Src/main.c **** temp16 = Get_ADC(4); - 339:Src/main.c **** Long_Data[12] = temp16; - 340:Src/main.c **** temp16 = Get_ADC(5); - 341:Src/main.c **** - 342:Src/main.c **** //Put the timer tick to Long_Data: - 343:Src/main.c **** TO6_stop = TO6; - 344:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 345:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 346:Src/main.c **** - 347:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 348:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 349:Src/main.c **** - 350:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 351:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 352:Src/main.c **** - 353:Src/main.c **** if (Curr_setup.SD_EN==1) - 354:Src/main.c **** { - 355:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 356:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 357:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 358:Src/main.c **** State_Data[0]|=temp16&0xff; - 359:Src/main.c **** } - 360:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 361:Src/main.c **** } - 362:Src/main.c **** break; - 363:Src/main.c **** case DECODE_TASK: - 364:Src/main.c **** if (CheckChecksum(COMMAND)) - 365:Src/main.c **** { - 366:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 367:Src/main.c **** TO6_before = TO6; - 368:Src/main.c **** CPU_state = RUN_TASK; - 369:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 370:Src/main.c **** } - 371:Src/main.c **** else - 372:Src/main.c **** { - 373:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 376:Src/main.c **** } - 377:Src/main.c **** UART_transmission_request = MESS_01; - 378:Src/main.c **** break; - 379:Src/main.c **** case RUN_TASK: - 380:Src/main.c **** switch (task.task_type) - 381:Src/main.c **** { - 382:Src/main.c **** case TT_CHANGE_CURR_1: - 383:Src/main.c **** + 333:Src/main.c **** temp16 = Get_ADC(1); + 334:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 335:Src/main.c **** temp16 = Get_ADC(2); + 336:Src/main.c **** + 337:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 338:Src/main.c **** temp16 = Get_ADC(3); + 339:Src/main.c **** temp16 = Get_ADC(4); + 340:Src/main.c **** Long_Data[12] = temp16; + 341:Src/main.c **** temp16 = Get_ADC(5); + 342:Src/main.c **** + 343:Src/main.c **** //Put the timer tick to Long_Data: + 344:Src/main.c **** TO6_stop = TO6; + 345:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 346:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 347:Src/main.c **** + 348:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 349:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 350:Src/main.c **** + 351:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 352:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 353:Src/main.c **** + 354:Src/main.c **** if (Curr_setup.SD_EN==1) + 355:Src/main.c **** { + 356:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 357:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 358:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 359:Src/main.c **** State_Data[0]|=temp16&0xff; + 360:Src/main.c **** } + 361:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 362:Src/main.c **** } + 363:Src/main.c **** break; + 364:Src/main.c **** case DECODE_TASK: + 365:Src/main.c **** if (CheckChecksum(COMMAND)) + 366:Src/main.c **** { + 367:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 368:Src/main.c **** TO6_before = TO6; + 369:Src/main.c **** CPU_state = RUN_TASK; + 370:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 371:Src/main.c **** } + 372:Src/main.c **** else + 373:Src/main.c **** { + 374:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 375:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 376:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 377:Src/main.c **** } + 378:Src/main.c **** UART_transmission_request = MESS_01; + 379:Src/main.c **** break; + 380:Src/main.c **** case RUN_TASK: + 381:Src/main.c **** switch (task.task_type) + 382:Src/main.c **** { + 383:Src/main.c **** case TT_CHANGE_CURR_1: 384:Src/main.c **** - 385:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator - 386:Src/main.c **** //ADC clock - 387:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 388:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 389:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - ARM GAS /tmp/ccWQNJQt.s page 46 + 385:Src/main.c **** + 386:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator + 387:Src/main.c **** //ADC clock + 388:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 389:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + ARM GAS /tmp/ccO46DoU.s page 46 - 390:Src/main.c **** - 391:Src/main.c **** //online calculation for debug purposes: - 392:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running - 393:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 394:Src/main.c **** + 390:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 391:Src/main.c **** + 392:Src/main.c **** //online calculation for debug purposes: + 393:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running + 394:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; 395:Src/main.c **** - 396:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 397:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 398:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 399:Src/main.c **** + 396:Src/main.c **** + 397:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) + 398:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + 399:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; 400:Src/main.c **** 401:Src/main.c **** - 402:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); - 403:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 404:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 405:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 406:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 407:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 408:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 409:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 410:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 411:Src/main.c **** - 412:Src/main.c **** // Toggle pin for oscilloscope - 413:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc - 414:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 415:Src/main.c **** - 416:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 417:Src/main.c **** if (st != HAL_OK) - 418:Src/main.c **** while(1); - 419:Src/main.c **** - 420:Src/main.c **** uint16_t step_counter = 0; - 421:Src/main.c **** uint16_t trigger_counter = 0; - 422:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 423:Src/main.c **** uint16_t task_sheduler = 0; - 424:Src/main.c **** + 402:Src/main.c **** + 403:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); + 404:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 405:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 406:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 407:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 408:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 409:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 410:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 411:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 412:Src/main.c **** + 413:Src/main.c **** // Toggle pin for oscilloscope + 414:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc + 415:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 416:Src/main.c **** + 417:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 418:Src/main.c **** if (st != HAL_OK) + 419:Src/main.c **** while(1); + 420:Src/main.c **** + 421:Src/main.c **** uint16_t step_counter = 0; + 422:Src/main.c **** uint16_t trigger_counter = 0; + 423:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 424:Src/main.c **** uint16_t task_sheduler = 0; 425:Src/main.c **** 426:Src/main.c **** - 427:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 428:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 429:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 430:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 431:Src/main.c **** + 427:Src/main.c **** + 428:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 429:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 430:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 431:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode 432:Src/main.c **** 433:Src/main.c **** - 434:Src/main.c **** TIM11 -> CNT = 0; - 435:Src/main.c **** TIM4 -> CNT = 0; - 436:Src/main.c **** - 437:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 438:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 439:Src/main.c **** //TIM4 -> CNT = 0; - 440:Src/main.c **** - 441:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de - 442:Src/main.c **** TIM11 -> CNT = 0; - 443:Src/main.c **** + 434:Src/main.c **** + 435:Src/main.c **** TIM11 -> CNT = 0; + 436:Src/main.c **** TIM4 -> CNT = 0; + 437:Src/main.c **** + 438:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 439:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 440:Src/main.c **** //TIM4 -> CNT = 0; + 441:Src/main.c **** + 442:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de + 443:Src/main.c **** TIM11 -> CNT = 0; 444:Src/main.c **** - 445:Src/main.c **** while (task.current_param < task.max_param) - 446:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 47 + 445:Src/main.c **** + 446:Src/main.c **** while (task.current_param < task.max_param) + ARM GAS /tmp/ccO46DoU.s page 47 - 447:Src/main.c **** if (TIM10_coflag) - 448:Src/main.c **** { - 449:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 450:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 451:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase - 452:Src/main.c **** task.current_param += task.delta_param; - 453:Src/main.c **** TO10 = 0; - 454:Src/main.c **** TIM10_coflag = 0; - 455:Src/main.c **** - 456:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t - 457:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 458:Src/main.c **** //* - 459:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step - 460:Src/main.c **** OUT_trigger(trigger_counter); - 461:Src/main.c **** ++trigger_counter; - 462:Src/main.c **** } - 463:Src/main.c **** ++step_counter; - 464:Src/main.c **** //*/ - 465:Src/main.c **** /* - 466:Src/main.c **** ++task_sheduler; - 467:Src/main.c **** if (task_sheduler >= 10){ - 468:Src/main.c **** task_sheduler = 0; - 469:Src/main.c **** } - 470:Src/main.c **** //maintain stable temperature of laser 2 - 471:Src/main.c **** if (task_sheduler == 0){ - 472:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 473:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 474:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 475:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 476:Src/main.c **** } - 477:Src/main.c **** //maintain stable temperature of laser 1 - 478:Src/main.c **** //* - 479:Src/main.c **** if (task_sheduler == 5){ - 480:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 481:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 482:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 483:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 484:Src/main.c **** } - 485:Src/main.c **** //*/ - 486:Src/main.c **** } - 487:Src/main.c **** } - 488:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o - 489:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 490:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda - 491:Src/main.c **** //but one-pulse mode should be disabled - 492:Src/main.c **** - 493:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 494:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 495:Src/main.c **** + 447:Src/main.c **** { + 448:Src/main.c **** if (TIM10_coflag) + 449:Src/main.c **** { + 450:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 451:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 452:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase + 453:Src/main.c **** task.current_param += task.delta_param; + 454:Src/main.c **** TO10 = 0; + 455:Src/main.c **** TIM10_coflag = 0; + 456:Src/main.c **** + 457:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t + 458:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 459:Src/main.c **** //* + 460:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step + 461:Src/main.c **** OUT_trigger(trigger_counter); + 462:Src/main.c **** ++trigger_counter; + 463:Src/main.c **** } + 464:Src/main.c **** ++step_counter; + 465:Src/main.c **** //*/ + 466:Src/main.c **** /* + 467:Src/main.c **** ++task_sheduler; + 468:Src/main.c **** if (task_sheduler >= 10){ + 469:Src/main.c **** task_sheduler = 0; + 470:Src/main.c **** } + 471:Src/main.c **** //maintain stable temperature of laser 2 + 472:Src/main.c **** if (task_sheduler == 0){ + 473:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 474:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 475:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 476:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 477:Src/main.c **** } + 478:Src/main.c **** //maintain stable temperature of laser 1 + 479:Src/main.c **** //* + 480:Src/main.c **** if (task_sheduler == 5){ + 481:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 482:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 483:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 484:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 485:Src/main.c **** } + 486:Src/main.c **** //*/ + 487:Src/main.c **** } + 488:Src/main.c **** } + 489:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o + 490:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 491:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda + 492:Src/main.c **** //but one-pulse mode should be disabled + 493:Src/main.c **** + 494:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 495:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock 496:Src/main.c **** 497:Src/main.c **** - 498:Src/main.c **** Stop_TIM10(); - 499:Src/main.c **** - 500:Src/main.c **** task.current_param = task.min_param; - 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 502:Src/main.c **** if (task.tau > 3) - 503:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 48 + 498:Src/main.c **** + 499:Src/main.c **** Stop_TIM10(); + 500:Src/main.c **** + 501:Src/main.c **** task.current_param = task.min_param; + 502:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 503:Src/main.c **** if (task.tau > 3) + ARM GAS /tmp/ccO46DoU.s page 48 - 504:Src/main.c **** TIM10_period = htim10.Init.Period; - 505:Src/main.c **** htim10.Init.Period = 9999; - 506:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 507:Src/main.c **** } - 508:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 509:Src/main.c **** break; - 510:Src/main.c **** case TT_CHANGE_CURR_2: - 511:Src/main.c **** //Blink laser 2 - 512:Src/main.c **** //* - 513:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 514:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 515:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 516:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 517:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 518:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 519:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 520:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 522:Src/main.c **** - 523:Src/main.c **** LD_blinker.task_type = 2; - 524:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 525:Src/main.c **** //LD_blinker.param = task.current_param; - 526:Src/main.c **** LD_blinker.param = 0; - 527:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 528:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 529:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 530:Src/main.c **** - 531:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). - 532:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 533:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); - 534:Src/main.c **** if (st != HAL_OK) - 535:Src/main.c **** while(1); - 536:Src/main.c **** // */ - 537:Src/main.c **** - 538:Src/main.c **** // Toggle pin for oscilloscope - 539:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 540:Src/main.c **** uint32_t i = 10000; while (--i){} - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 542:Src/main.c **** LD_blinker.state = 2; - 543:Src/main.c **** - 544:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 545:Src/main.c **** if (st != HAL_OK) - 546:Src/main.c **** while(1); - 547:Src/main.c **** while (task.current_param < task.max_param) - 548:Src/main.c **** { - 549:Src/main.c **** if (TIM10_coflag) - 550:Src/main.c **** { - 551:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 552:Src/main.c **** //LD_blinker.param = task.current_param; - 553:Src/main.c **** //++LD_blinker.param; - 554:Src/main.c **** task.current_param += task.delta_param; - 555:Src/main.c **** TO10 = 0; - 556:Src/main.c **** TIM10_coflag = 0; - 557:Src/main.c **** + 504:Src/main.c **** { + 505:Src/main.c **** TIM10_period = htim10.Init.Period; + 506:Src/main.c **** htim10.Init.Period = 9999; + 507:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 508:Src/main.c **** } + 509:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 510:Src/main.c **** break; + 511:Src/main.c **** case TT_CHANGE_CURR_2: + 512:Src/main.c **** //Blink laser 2 + 513:Src/main.c **** //* + 514:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 515:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 516:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 517:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 518:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 519:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 520:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 521:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 522:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 523:Src/main.c **** + 524:Src/main.c **** LD_blinker.task_type = 2; + 525:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 526:Src/main.c **** //LD_blinker.param = task.current_param; + 527:Src/main.c **** LD_blinker.param = 0; + 528:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 529:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 530:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 531:Src/main.c **** + 532:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). + 533:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 534:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); + 535:Src/main.c **** if (st != HAL_OK) + 536:Src/main.c **** while(1); + 537:Src/main.c **** // */ + 538:Src/main.c **** + 539:Src/main.c **** // Toggle pin for oscilloscope + 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 541:Src/main.c **** uint32_t i = 10000; while (--i){} + 542:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 543:Src/main.c **** LD_blinker.state = 2; + 544:Src/main.c **** + 545:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 546:Src/main.c **** if (st != HAL_OK) + 547:Src/main.c **** while(1); + 548:Src/main.c **** while (task.current_param < task.max_param) + 549:Src/main.c **** { + 550:Src/main.c **** if (TIM10_coflag) + 551:Src/main.c **** { + 552:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 553:Src/main.c **** //LD_blinker.param = task.current_param; + 554:Src/main.c **** //++LD_blinker.param; + 555:Src/main.c **** task.current_param += task.delta_param; + 556:Src/main.c **** TO10 = 0; + 557:Src/main.c **** TIM10_coflag = 0; 558:Src/main.c **** - 559:Src/main.c **** } - 560:Src/main.c **** } - ARM GAS /tmp/ccWQNJQt.s page 49 + 559:Src/main.c **** + 560:Src/main.c **** } + ARM GAS /tmp/ccO46DoU.s page 49 - 561:Src/main.c **** HAL_TIM_Base_Stop(&htim10); - 562:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 563:Src/main.c **** - 564:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 565:Src/main.c **** - 566:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); - 567:Src/main.c **** TIM8->CNT = 0; - 568:Src/main.c **** - 569:Src/main.c **** Stop_TIM10(); - 570:Src/main.c **** task.current_param = task.min_param; - 571:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 572:Src/main.c **** if (task.tau > 3) - 573:Src/main.c **** { - 574:Src/main.c **** TIM10_period = htim10.Init.Period; - 575:Src/main.c **** htim10.Init.Period = 9999; - 576:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 577:Src/main.c **** } - 578:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 579:Src/main.c **** + 561:Src/main.c **** } + 562:Src/main.c **** HAL_TIM_Base_Stop(&htim10); + 563:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 564:Src/main.c **** + 565:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 566:Src/main.c **** + 567:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); + 568:Src/main.c **** TIM8->CNT = 0; + 569:Src/main.c **** + 570:Src/main.c **** Stop_TIM10(); + 571:Src/main.c **** task.current_param = task.min_param; + 572:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 573:Src/main.c **** if (task.tau > 3) + 574:Src/main.c **** { + 575:Src/main.c **** TIM10_period = htim10.Init.Period; + 576:Src/main.c **** htim10.Init.Period = 9999; + 577:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 578:Src/main.c **** } + 579:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); 580:Src/main.c **** - 581:Src/main.c **** //*/ - 582:Src/main.c **** - 583:Src/main.c **** /* // Backup - 584:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 585:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 586:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 587:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 588:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 589:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 590:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 591:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 592:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 593:Src/main.c **** - 594:Src/main.c **** // Toggle pin for oscilloscope - 595:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 596:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 597:Src/main.c **** - 598:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 599:Src/main.c **** if (st != HAL_OK) - 600:Src/main.c **** while(1); - 601:Src/main.c **** while (task.current_param < task.max_param) - 602:Src/main.c **** { - 603:Src/main.c **** if (TIM10_coflag) - 604:Src/main.c **** { - 605:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 606:Src/main.c **** task.current_param += task.delta_param; - 607:Src/main.c **** TO10 = 0; - 608:Src/main.c **** TIM10_coflag = 0; - 609:Src/main.c **** + 581:Src/main.c **** + 582:Src/main.c **** //*/ + 583:Src/main.c **** + 584:Src/main.c **** /* // Backup + 585:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 586:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 587:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 588:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 589:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 590:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 591:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 592:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 593:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 594:Src/main.c **** + 595:Src/main.c **** // Toggle pin for oscilloscope + 596:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 597:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 598:Src/main.c **** + 599:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 600:Src/main.c **** if (st != HAL_OK) + 601:Src/main.c **** while(1); + 602:Src/main.c **** while (task.current_param < task.max_param) + 603:Src/main.c **** { + 604:Src/main.c **** if (TIM10_coflag) + 605:Src/main.c **** { + 606:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 607:Src/main.c **** task.current_param += task.delta_param; + 608:Src/main.c **** TO10 = 0; + 609:Src/main.c **** TIM10_coflag = 0; 610:Src/main.c **** - 611:Src/main.c **** } - 612:Src/main.c **** } - 613:Src/main.c **** Stop_TIM10(); - 614:Src/main.c **** task.current_param = task.min_param; - 615:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 616:Src/main.c **** if (task.tau > 3) - 617:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 50 + 611:Src/main.c **** + 612:Src/main.c **** } + 613:Src/main.c **** } + 614:Src/main.c **** Stop_TIM10(); + 615:Src/main.c **** task.current_param = task.min_param; + 616:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 617:Src/main.c **** if (task.tau > 3) + ARM GAS /tmp/ccO46DoU.s page 50 - 618:Src/main.c **** TIM10_period = htim10.Init.Period; - 619:Src/main.c **** htim10.Init.Period = 9999; - 620:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 621:Src/main.c **** } - 622:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 623:Src/main.c **** */ - 624:Src/main.c **** + 618:Src/main.c **** { + 619:Src/main.c **** TIM10_period = htim10.Init.Period; + 620:Src/main.c **** htim10.Init.Period = 9999; + 621:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 622:Src/main.c **** } + 623:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 624:Src/main.c **** */ 625:Src/main.c **** - 626:Src/main.c **** break; - 627:Src/main.c **** case TT_CHANGE_TEMP_1: - 628:Src/main.c **** // isn't implemented - 629:Src/main.c **** break; - 630:Src/main.c **** case TT_CHANGE_TEMP_2: - 631:Src/main.c **** // isn't implemented - 632:Src/main.c **** break; - 633:Src/main.c **** } - 634:Src/main.c **** - 635:Src/main.c **** if (TO7>TO7_before) - 636:Src/main.c **** { - 637:Src/main.c **** TO7_before = TO7; - 638:Src/main.c **** - 639:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 626:Src/main.c **** + 627:Src/main.c **** break; + 628:Src/main.c **** case TT_CHANGE_TEMP_1: + 629:Src/main.c **** // isn't implemented + 630:Src/main.c **** break; + 631:Src/main.c **** case TT_CHANGE_TEMP_2: + 632:Src/main.c **** // isn't implemented + 633:Src/main.c **** break; + 634:Src/main.c **** } + 635:Src/main.c **** + 636:Src/main.c **** if (TO7>TO7_before) + 637:Src/main.c **** { + 638:Src/main.c **** TO7_before = TO7; + 639:Src/main.c **** 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 641:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 643:Src/main.c **** - 644:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 645:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 646:Src/main.c **** - 647:Src/main.c **** //Prepare DATA of internals ADCs - 648:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 649:Src/main.c **** temp16 = Get_ADC(0); - 650:Src/main.c **** temp16 = Get_ADC(1); - 651:Src/main.c **** Long_Data[7] = temp16; - 652:Src/main.c **** - 653:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 654:Src/main.c **** temp16 = Get_ADC(1); - 655:Src/main.c **** Long_Data[8] = temp16; - 656:Src/main.c **** - 657:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 658:Src/main.c **** temp16 = Get_ADC(1); - 659:Src/main.c **** Long_Data[9] = temp16; - 660:Src/main.c **** - 661:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 662:Src/main.c **** temp16 = Get_ADC(1); - 663:Src/main.c **** Long_Data[10] = temp16; - 664:Src/main.c **** - 665:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 666:Src/main.c **** temp16 = Get_ADC(1); - 667:Src/main.c **** Long_Data[11] = temp16; - 668:Src/main.c **** temp16 = Get_ADC(2); - 669:Src/main.c **** - 670:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 671:Src/main.c **** temp16 = Get_ADC(3); - 672:Src/main.c **** temp16 = Get_ADC(4); - 673:Src/main.c **** Long_Data[12] = temp16; - 674:Src/main.c **** temp16 = Get_ADC(5); - ARM GAS /tmp/ccWQNJQt.s page 51 + 643:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 644:Src/main.c **** + 645:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 646:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 647:Src/main.c **** + 648:Src/main.c **** //Prepare DATA of internals ADCs + 649:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 650:Src/main.c **** temp16 = Get_ADC(0); + 651:Src/main.c **** temp16 = Get_ADC(1); + 652:Src/main.c **** Long_Data[7] = temp16; + 653:Src/main.c **** + 654:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 655:Src/main.c **** temp16 = Get_ADC(1); + 656:Src/main.c **** Long_Data[8] = temp16; + 657:Src/main.c **** + 658:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 659:Src/main.c **** temp16 = Get_ADC(1); + 660:Src/main.c **** Long_Data[9] = temp16; + 661:Src/main.c **** + 662:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 663:Src/main.c **** temp16 = Get_ADC(1); + 664:Src/main.c **** Long_Data[10] = temp16; + 665:Src/main.c **** + 666:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 667:Src/main.c **** temp16 = Get_ADC(1); + 668:Src/main.c **** Long_Data[11] = temp16; + 669:Src/main.c **** temp16 = Get_ADC(2); + 670:Src/main.c **** + 671:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 672:Src/main.c **** temp16 = Get_ADC(3); + 673:Src/main.c **** temp16 = Get_ADC(4); + 674:Src/main.c **** Long_Data[12] = temp16; + ARM GAS /tmp/ccO46DoU.s page 51 - 675:Src/main.c **** - 676:Src/main.c **** //Put the timer tick to Long_Data: - 677:Src/main.c **** TO6_stop = TO6; - 678:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 679:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 680:Src/main.c **** - 681:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 682:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 683:Src/main.c **** - 684:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 685:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 686:Src/main.c **** } - 687:Src/main.c **** while (!TIM10_coflag); - 688:Src/main.c **** - 689:Src/main.c **** Stop_TIM10(); - 690:Src/main.c **** - 691:Src/main.c **** if (task.tau > 3) - 692:Src/main.c **** { - 693:Src/main.c **** htim10.Init.Period = TIM10_period; - 694:Src/main.c **** TO10_counter = task.dt / 10; - 695:Src/main.c **** } - 696:Src/main.c **** - 697:Src/main.c **** CPU_state_old = RUN_TASK; - 698:Src/main.c **** break; - 699:Src/main.c **** } - 700:Src/main.c **** - 701:Src/main.c **** switch (UART_transmission_request) - 702:Src/main.c **** { - 703:Src/main.c **** case MESS_01://Default state - 704:Src/main.c **** USART_TX(State_Data,2); - 705:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 706:Src/main.c **** State_Data[0]=0; - 707:Src/main.c **** State_Data[1]=0;//All OK! - 708:Src/main.c **** UART_transmission_request = NO_MESS; - 709:Src/main.c **** break; - 710:Src/main.c **** case MESS_02://Transmith packet - 711:Src/main.c **** - 712:Src/main.c **** //Find CS and put to Long_Data: - 713:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 714:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 715:Src/main.c **** - 716:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 717:Src/main.c **** { - 718:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 720:Src/main.c **** } - 721:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); - 722:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 723:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 724:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 725:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 726:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 727:Src/main.c **** UART_transmission_request = NO_MESS; - 728:Src/main.c **** break; - 729:Src/main.c **** case MESS_03://Transmith saved packet - 730:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 731:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 52 + 675:Src/main.c **** temp16 = Get_ADC(5); + 676:Src/main.c **** + 677:Src/main.c **** //Put the timer tick to Long_Data: + 678:Src/main.c **** TO6_stop = TO6; + 679:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 680:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 681:Src/main.c **** + 682:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 683:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 684:Src/main.c **** + 685:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 686:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 687:Src/main.c **** } + 688:Src/main.c **** while (!TIM10_coflag); + 689:Src/main.c **** + 690:Src/main.c **** Stop_TIM10(); + 691:Src/main.c **** + 692:Src/main.c **** if (task.tau > 3) + 693:Src/main.c **** { + 694:Src/main.c **** htim10.Init.Period = TIM10_period; + 695:Src/main.c **** TO10_counter = task.dt / 10; + 696:Src/main.c **** } + 697:Src/main.c **** + 698:Src/main.c **** CPU_state_old = RUN_TASK; + 699:Src/main.c **** break; + 700:Src/main.c **** } + 701:Src/main.c **** + 702:Src/main.c **** switch (UART_transmission_request) + 703:Src/main.c **** { + 704:Src/main.c **** case MESS_01://Default state + 705:Src/main.c **** USART_TX(State_Data,2); + 706:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 707:Src/main.c **** State_Data[0]=0; + 708:Src/main.c **** State_Data[1]=0;//All OK! + 709:Src/main.c **** UART_transmission_request = NO_MESS; + 710:Src/main.c **** break; + 711:Src/main.c **** case MESS_02://Transmith packet + 712:Src/main.c **** + 713:Src/main.c **** //Find CS and put to Long_Data: + 714:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 715:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 716:Src/main.c **** + 717:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + 718:Src/main.c **** { + 719:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 720:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 721:Src/main.c **** } + 722:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); + 723:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 724:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 725:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 726:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 727:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 728:Src/main.c **** UART_transmission_request = NO_MESS; + 729:Src/main.c **** break; + 730:Src/main.c **** case MESS_03://Transmith saved packet + 731:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + ARM GAS /tmp/ccO46DoU.s page 52 - 732:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 734:Src/main.c **** } - 735:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 736:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 737:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 738:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 739:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 740:Src/main.c **** UART_transmission_request = NO_MESS; - 741:Src/main.c **** break; - 742:Src/main.c **** } - 743:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of - 744:Src/main.c **** { - 745:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter - 746:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 747:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 748:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 749:Src/main.c **** } - 750:Src/main.c **** /* USER CODE END WHILE */ - 751:Src/main.c **** - 752:Src/main.c **** /* USER CODE BEGIN 3 */ - 753:Src/main.c **** } - 754:Src/main.c **** /* USER CODE END 3 */ - 755:Src/main.c **** } - 756:Src/main.c **** - 757:Src/main.c **** /** - 758:Src/main.c **** * @brief System Clock Configuration - 759:Src/main.c **** * @retval None - 760:Src/main.c **** */ - 761:Src/main.c **** void SystemClock_Config(void) - 762:Src/main.c **** { - 763:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 764:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 765:Src/main.c **** - 766:Src/main.c **** /** Configure the main internal regulator output voltage - 767:Src/main.c **** */ - 768:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); - 769:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 770:Src/main.c **** - 771:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters - 772:Src/main.c **** * in the RCC_OscInitTypeDef structure. - 773:Src/main.c **** */ - 774:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 775:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 776:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 777:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 778:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 779:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 780:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 781:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 782:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 783:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 784:Src/main.c **** { - 785:Src/main.c **** Error_Handler(); - 786:Src/main.c **** } - 787:Src/main.c **** - 788:Src/main.c **** /** Activate the Over-Drive mode - ARM GAS /tmp/ccWQNJQt.s page 53 + 732:Src/main.c **** { + 733:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 734:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 735:Src/main.c **** } + 736:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 737:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 738:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 739:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 740:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 741:Src/main.c **** UART_transmission_request = NO_MESS; + 742:Src/main.c **** break; + 743:Src/main.c **** } + 744:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of + 745:Src/main.c **** { + 746:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter + 747:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 748:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 749:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 750:Src/main.c **** } + 751:Src/main.c **** /* USER CODE END WHILE */ + 752:Src/main.c **** + 753:Src/main.c **** /* USER CODE BEGIN 3 */ + 754:Src/main.c **** } + 755:Src/main.c **** /* USER CODE END 3 */ + 756:Src/main.c **** } + 757:Src/main.c **** + 758:Src/main.c **** /** + 759:Src/main.c **** * @brief System Clock Configuration + 760:Src/main.c **** * @retval None + 761:Src/main.c **** */ + 762:Src/main.c **** void SystemClock_Config(void) + 763:Src/main.c **** { + 764:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 765:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 766:Src/main.c **** + 767:Src/main.c **** /** Configure the main internal regulator output voltage + 768:Src/main.c **** */ + 769:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 770:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 771:Src/main.c **** + 772:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 773:Src/main.c **** * in the RCC_OscInitTypeDef structure. + 774:Src/main.c **** */ + 775:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + 776:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 777:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 778:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 779:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 780:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 781:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 782:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 783:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 784:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 785:Src/main.c **** { + 786:Src/main.c **** Error_Handler(); + 787:Src/main.c **** } + 788:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 53 - 789:Src/main.c **** */ - 790:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) - 791:Src/main.c **** { - 792:Src/main.c **** Error_Handler(); - 793:Src/main.c **** } - 794:Src/main.c **** - 795:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks - 796:Src/main.c **** */ - 797:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 798:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 799:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 800:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 801:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 802:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 803:Src/main.c **** - 804:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) - 805:Src/main.c **** { - 806:Src/main.c **** Error_Handler(); - 807:Src/main.c **** } - 808:Src/main.c **** } - 809:Src/main.c **** - 810:Src/main.c **** /** - 811:Src/main.c **** * @brief ADC1 Initialization Function - 812:Src/main.c **** * @param None - 813:Src/main.c **** * @retval None - 814:Src/main.c **** */ - 815:Src/main.c **** static void MX_ADC1_Init(void) - 816:Src/main.c **** { - 817:Src/main.c **** - 818:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ - 819:Src/main.c **** - 820:Src/main.c **** /* USER CODE END ADC1_Init 0 */ - 821:Src/main.c **** - 822:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; - 823:Src/main.c **** - 824:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ - 825:Src/main.c **** - 826:Src/main.c **** /* USER CODE END ADC1_Init 1 */ - 827:Src/main.c **** - 828:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 829:Src/main.c **** */ - 830:Src/main.c **** hadc1.Instance = ADC1; - 831:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 832:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 833:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 834:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 835:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 836:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 837:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 838:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 839:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 840:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 841:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 842:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 843:Src/main.c **** { - 844:Src/main.c **** Error_Handler(); - 845:Src/main.c **** } - ARM GAS /tmp/ccWQNJQt.s page 54 + 789:Src/main.c **** /** Activate the Over-Drive mode + 790:Src/main.c **** */ + 791:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) + 792:Src/main.c **** { + 793:Src/main.c **** Error_Handler(); + 794:Src/main.c **** } + 795:Src/main.c **** + 796:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 797:Src/main.c **** */ + 798:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 799:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 800:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 801:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 802:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 803:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 804:Src/main.c **** + 805:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) + 806:Src/main.c **** { + 807:Src/main.c **** Error_Handler(); + 808:Src/main.c **** } + 809:Src/main.c **** } + 810:Src/main.c **** + 811:Src/main.c **** /** + 812:Src/main.c **** * @brief ADC1 Initialization Function + 813:Src/main.c **** * @param None + 814:Src/main.c **** * @retval None + 815:Src/main.c **** */ + 816:Src/main.c **** static void MX_ADC1_Init(void) + 817:Src/main.c **** { + 818:Src/main.c **** + 819:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ + 820:Src/main.c **** + 821:Src/main.c **** /* USER CODE END ADC1_Init 0 */ + 822:Src/main.c **** + 823:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 824:Src/main.c **** + 825:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ + 826:Src/main.c **** + 827:Src/main.c **** /* USER CODE END ADC1_Init 1 */ + 828:Src/main.c **** + 829:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 830:Src/main.c **** */ + 831:Src/main.c **** hadc1.Instance = ADC1; + 832:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 833:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 834:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 835:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 836:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 837:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 838:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 839:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 840:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 841:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 842:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 843:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 844:Src/main.c **** { + 845:Src/main.c **** Error_Handler(); + ARM GAS /tmp/ccO46DoU.s page 54 - 846:Src/main.c **** - 847:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 848:Src/main.c **** */ - 849:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; - 850:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 851:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 852:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 853:Src/main.c **** { - 854:Src/main.c **** Error_Handler(); - 855:Src/main.c **** } - 856:Src/main.c **** - 857:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 858:Src/main.c **** */ - 859:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; - 860:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 861:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 862:Src/main.c **** { - 863:Src/main.c **** Error_Handler(); - 864:Src/main.c **** } - 865:Src/main.c **** - 866:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 867:Src/main.c **** */ - 868:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; - 869:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 870:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 871:Src/main.c **** { - 872:Src/main.c **** Error_Handler(); - 873:Src/main.c **** } - 874:Src/main.c **** - 875:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 876:Src/main.c **** */ - 877:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; - 878:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 879:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 880:Src/main.c **** { - 881:Src/main.c **** Error_Handler(); - 882:Src/main.c **** } - 883:Src/main.c **** - 884:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 885:Src/main.c **** */ - 886:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; - 887:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 888:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 889:Src/main.c **** { - 890:Src/main.c **** Error_Handler(); - 891:Src/main.c **** } - 892:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ - 893:Src/main.c **** - 894:Src/main.c **** /* USER CODE END ADC1_Init 2 */ - 895:Src/main.c **** - 896:Src/main.c **** } - 897:Src/main.c **** - 898:Src/main.c **** /** - 899:Src/main.c **** * @brief ADC3 Initialization Function - 900:Src/main.c **** * @param None - 901:Src/main.c **** * @retval None - 902:Src/main.c **** */ - ARM GAS /tmp/ccWQNJQt.s page 55 + 846:Src/main.c **** } + 847:Src/main.c **** + 848:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 849:Src/main.c **** */ + 850:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; + 851:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 852:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 853:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 854:Src/main.c **** { + 855:Src/main.c **** Error_Handler(); + 856:Src/main.c **** } + 857:Src/main.c **** + 858:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 859:Src/main.c **** */ + 860:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; + 861:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 862:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 863:Src/main.c **** { + 864:Src/main.c **** Error_Handler(); + 865:Src/main.c **** } + 866:Src/main.c **** + 867:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 868:Src/main.c **** */ + 869:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; + 870:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 871:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 872:Src/main.c **** { + 873:Src/main.c **** Error_Handler(); + 874:Src/main.c **** } + 875:Src/main.c **** + 876:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 877:Src/main.c **** */ + 878:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; + 879:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 880:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 881:Src/main.c **** { + 882:Src/main.c **** Error_Handler(); + 883:Src/main.c **** } + 884:Src/main.c **** + 885:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 886:Src/main.c **** */ + 887:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; + 888:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 889:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 890:Src/main.c **** { + 891:Src/main.c **** Error_Handler(); + 892:Src/main.c **** } + 893:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ + 894:Src/main.c **** + 895:Src/main.c **** /* USER CODE END ADC1_Init 2 */ + 896:Src/main.c **** + 897:Src/main.c **** } + 898:Src/main.c **** + 899:Src/main.c **** /** + 900:Src/main.c **** * @brief ADC3 Initialization Function + 901:Src/main.c **** * @param None + 902:Src/main.c **** * @retval None + ARM GAS /tmp/ccO46DoU.s page 55 - 903:Src/main.c **** static void MX_ADC3_Init(void) - 904:Src/main.c **** { - 905:Src/main.c **** - 906:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ - 907:Src/main.c **** - 908:Src/main.c **** /* USER CODE END ADC3_Init 0 */ - 909:Src/main.c **** - 910:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; - 911:Src/main.c **** - 912:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ - 913:Src/main.c **** - 914:Src/main.c **** /* USER CODE END ADC3_Init 1 */ - 915:Src/main.c **** - 916:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 917:Src/main.c **** */ - 918:Src/main.c **** hadc3.Instance = ADC3; - 919:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 920:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 921:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 922:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 923:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 924:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 925:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 926:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 927:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 928:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 929:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 930:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 931:Src/main.c **** { - 932:Src/main.c **** Error_Handler(); - 933:Src/main.c **** } - 934:Src/main.c **** - 935:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 936:Src/main.c **** */ - 937:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; - 938:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 939:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 940:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 941:Src/main.c **** { - 942:Src/main.c **** Error_Handler(); - 943:Src/main.c **** } - 944:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ - 945:Src/main.c **** - 946:Src/main.c **** /* USER CODE END ADC3_Init 2 */ - 947:Src/main.c **** - 948:Src/main.c **** } - 949:Src/main.c **** - 950:Src/main.c **** /** - 951:Src/main.c **** * @brief SDMMC1 Initialization Function - 952:Src/main.c **** * @param None - 953:Src/main.c **** * @retval None - 954:Src/main.c **** */ - 955:Src/main.c **** static void MX_SDMMC1_SD_Init(void) - 956:Src/main.c **** { - 95 .loc 1 956 1 is_stmt 1 view -0 + 903:Src/main.c **** */ + 904:Src/main.c **** static void MX_ADC3_Init(void) + 905:Src/main.c **** { + 906:Src/main.c **** + 907:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ + 908:Src/main.c **** + 909:Src/main.c **** /* USER CODE END ADC3_Init 0 */ + 910:Src/main.c **** + 911:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 912:Src/main.c **** + 913:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ + 914:Src/main.c **** + 915:Src/main.c **** /* USER CODE END ADC3_Init 1 */ + 916:Src/main.c **** + 917:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 918:Src/main.c **** */ + 919:Src/main.c **** hadc3.Instance = ADC3; + 920:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 921:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 922:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 923:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 924:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 925:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 926:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 927:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 928:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 929:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 930:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 931:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 932:Src/main.c **** { + 933:Src/main.c **** Error_Handler(); + 934:Src/main.c **** } + 935:Src/main.c **** + 936:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 937:Src/main.c **** */ + 938:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; + 939:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 940:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 941:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 942:Src/main.c **** { + 943:Src/main.c **** Error_Handler(); + 944:Src/main.c **** } + 945:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ + 946:Src/main.c **** + 947:Src/main.c **** /* USER CODE END ADC3_Init 2 */ + 948:Src/main.c **** + 949:Src/main.c **** } + 950:Src/main.c **** + 951:Src/main.c **** /** + 952:Src/main.c **** * @brief SDMMC1 Initialization Function + 953:Src/main.c **** * @param None + 954:Src/main.c **** * @retval None + 955:Src/main.c **** */ + 956:Src/main.c **** static void MX_SDMMC1_SD_Init(void) + 957:Src/main.c **** { + 95 .loc 1 957 1 is_stmt 1 view -0 96 .cfi_startproc + ARM GAS /tmp/ccO46DoU.s page 56 + + 97 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccWQNJQt.s page 56 - - 98 @ frame_needed = 0, uses_anonymous_args = 0 99 @ link register save eliminated. - 957:Src/main.c **** - 958:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ - 959:Src/main.c **** - 960:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ - 961:Src/main.c **** - 962:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ - 963:Src/main.c **** - 964:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ - 965:Src/main.c **** hsd1.Instance = SDMMC1; - 100 .loc 1 965 3 view .LVU21 - 101 .loc 1 965 17 is_stmt 0 view .LVU22 + 958:Src/main.c **** + 959:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ + 960:Src/main.c **** + 961:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ + 962:Src/main.c **** + 963:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ + 964:Src/main.c **** + 965:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ + 966:Src/main.c **** hsd1.Instance = SDMMC1; + 100 .loc 1 966 3 view .LVU21 + 101 .loc 1 966 17 is_stmt 0 view .LVU22 102 0000 064B ldr r3, .L6 103 0002 074A ldr r2, .L6+4 104 0004 1A60 str r2, [r3] - 966:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - 105 .loc 1 966 3 is_stmt 1 view .LVU23 - 106 .loc 1 966 23 is_stmt 0 view .LVU24 + 967:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + 105 .loc 1 967 3 is_stmt 1 view .LVU23 + 106 .loc 1 967 23 is_stmt 0 view .LVU24 107 0006 0022 movs r2, #0 108 0008 5A60 str r2, [r3, #4] - 967:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; - 109 .loc 1 967 3 is_stmt 1 view .LVU25 - 110 .loc 1 967 25 is_stmt 0 view .LVU26 + 968:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + 109 .loc 1 968 3 is_stmt 1 view .LVU25 + 110 .loc 1 968 25 is_stmt 0 view .LVU26 111 000a 9A60 str r2, [r3, #8] - 968:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - 112 .loc 1 968 3 is_stmt 1 view .LVU27 - 113 .loc 1 968 28 is_stmt 0 view .LVU28 + 969:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + 112 .loc 1 969 3 is_stmt 1 view .LVU27 + 113 .loc 1 969 28 is_stmt 0 view .LVU28 114 000c DA60 str r2, [r3, #12] - 969:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; - 115 .loc 1 969 3 is_stmt 1 view .LVU29 - 116 .loc 1 969 21 is_stmt 0 view .LVU30 + 970:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; + 115 .loc 1 970 3 is_stmt 1 view .LVU29 + 116 .loc 1 970 21 is_stmt 0 view .LVU30 117 000e 4FF40061 mov r1, #2048 118 0012 1961 str r1, [r3, #16] - 970:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - 119 .loc 1 970 3 is_stmt 1 view .LVU31 - 120 .loc 1 970 33 is_stmt 0 view .LVU32 + 971:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + 119 .loc 1 971 3 is_stmt 1 view .LVU31 + 120 .loc 1 971 33 is_stmt 0 view .LVU32 121 0014 5A61 str r2, [r3, #20] - 971:Src/main.c **** hsd1.Init.ClockDiv = 20; - 122 .loc 1 971 3 is_stmt 1 view .LVU33 - 123 .loc 1 971 22 is_stmt 0 view .LVU34 + 972:Src/main.c **** hsd1.Init.ClockDiv = 20; + 122 .loc 1 972 3 is_stmt 1 view .LVU33 + 123 .loc 1 972 22 is_stmt 0 view .LVU34 124 0016 1422 movs r2, #20 125 0018 9A61 str r2, [r3, #24] - 972:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ - 973:Src/main.c **** - 974:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ - 975:Src/main.c **** - 976:Src/main.c **** } - 126 .loc 1 976 1 view .LVU35 + 973:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ + 974:Src/main.c **** + 975:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ + 976:Src/main.c **** + 977:Src/main.c **** } + 126 .loc 1 977 1 view .LVU35 127 001a 7047 bx lr 128 .L7: 129 .align 2 @@ -3357,10 +3358,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 131 001c 00000000 .word hsd1 132 0020 002C0140 .word 1073818624 133 .cfi_endproc + ARM GAS /tmp/ccO46DoU.s page 57 + + 134 .LFE1190: - ARM GAS /tmp/ccWQNJQt.s page 57 - - 136 .section .text.MX_DMA_Init,"ax",%progbits 137 .align 1 138 .syntax unified @@ -3368,765 +3369,765 @@ ARM GAS /tmp/ccWQNJQt.s page 1 140 .thumb_func 142 MX_DMA_Init: 143 .LFB1205: - 977:Src/main.c **** - 978:Src/main.c **** /** - 979:Src/main.c **** * @brief SPI2 Initialization Function - 980:Src/main.c **** * @param None - 981:Src/main.c **** * @retval None - 982:Src/main.c **** */ - 983:Src/main.c **** static void MX_SPI2_Init(void) - 984:Src/main.c **** { - 985:Src/main.c **** - 986:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ - 987:Src/main.c **** - 988:Src/main.c **** /* USER CODE END SPI2_Init 0 */ - 989:Src/main.c **** - 990:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; - 991:Src/main.c **** - 992:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - 993:Src/main.c **** - 994:Src/main.c **** /* Peripheral clock enable */ - 995:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); - 996:Src/main.c **** - 997:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); - 998:Src/main.c **** /**SPI2 GPIO Configuration - 999:Src/main.c **** PB13 ------> SPI2_SCK -1000:Src/main.c **** PB15 ------> SPI2_MOSI -1001:Src/main.c **** */ -1002:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1003:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1004:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1005:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1006:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1007:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1008:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1009:Src/main.c **** -1010:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; -1011:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1012:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1013:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1014:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1015:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1016:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1017:Src/main.c **** -1018:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ -1019:Src/main.c **** -1020:Src/main.c **** /* USER CODE END SPI2_Init 1 */ -1021:Src/main.c **** /* SPI2 parameter configuration*/ -1022:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1023:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1024:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1025:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1026:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - ARM GAS /tmp/ccWQNJQt.s page 58 + 978:Src/main.c **** + 979:Src/main.c **** /** + 980:Src/main.c **** * @brief SPI2 Initialization Function + 981:Src/main.c **** * @param None + 982:Src/main.c **** * @retval None + 983:Src/main.c **** */ + 984:Src/main.c **** static void MX_SPI2_Init(void) + 985:Src/main.c **** { + 986:Src/main.c **** + 987:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ + 988:Src/main.c **** + 989:Src/main.c **** /* USER CODE END SPI2_Init 0 */ + 990:Src/main.c **** + 991:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; + 992:Src/main.c **** + 993:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + 994:Src/main.c **** + 995:Src/main.c **** /* Peripheral clock enable */ + 996:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); + 997:Src/main.c **** + 998:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); + 999:Src/main.c **** /**SPI2 GPIO Configuration +1000:Src/main.c **** PB13 ------> SPI2_SCK +1001:Src/main.c **** PB15 ------> SPI2_MOSI +1002:Src/main.c **** */ +1003:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1004:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1005:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1006:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1007:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1008:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1009:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1010:Src/main.c **** +1011:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; +1012:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1013:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1014:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1015:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1016:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1017:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1018:Src/main.c **** +1019:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ +1020:Src/main.c **** +1021:Src/main.c **** /* USER CODE END SPI2_Init 1 */ +1022:Src/main.c **** /* SPI2 parameter configuration*/ +1023:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1024:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1025:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1026:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + ARM GAS /tmp/ccO46DoU.s page 58 -1027:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1028:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; -1029:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1030:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1031:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1032:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); -1033:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); -1034:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); -1035:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ -1036:Src/main.c **** -1037:Src/main.c **** /* USER CODE END SPI2_Init 2 */ -1038:Src/main.c **** -1039:Src/main.c **** } -1040:Src/main.c **** -1041:Src/main.c **** /** -1042:Src/main.c **** * @brief SPI4 Initialization Function -1043:Src/main.c **** * @param None -1044:Src/main.c **** * @retval None -1045:Src/main.c **** */ -1046:Src/main.c **** static void MX_SPI4_Init(void) -1047:Src/main.c **** { -1048:Src/main.c **** -1049:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ -1050:Src/main.c **** -1051:Src/main.c **** /* USER CODE END SPI4_Init 0 */ -1052:Src/main.c **** -1053:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1054:Src/main.c **** -1055:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1056:Src/main.c **** -1057:Src/main.c **** /* Peripheral clock enable */ -1058:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); -1059:Src/main.c **** -1060:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); -1061:Src/main.c **** /**SPI4 GPIO Configuration -1062:Src/main.c **** PE12 ------> SPI4_SCK -1063:Src/main.c **** PE13 ------> SPI4_MISO -1064:Src/main.c **** */ -1065:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; -1066:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1067:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1068:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1069:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1070:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1071:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1072:Src/main.c **** -1073:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1074:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1075:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1076:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1077:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1078:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1079:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1080:Src/main.c **** -1081:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ -1082:Src/main.c **** -1083:Src/main.c **** /* USER CODE END SPI4_Init 1 */ - ARM GAS /tmp/ccWQNJQt.s page 59 +1027:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1028:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1029:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; +1030:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1031:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1032:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1033:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); +1034:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); +1035:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); +1036:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ +1037:Src/main.c **** +1038:Src/main.c **** /* USER CODE END SPI2_Init 2 */ +1039:Src/main.c **** +1040:Src/main.c **** } +1041:Src/main.c **** +1042:Src/main.c **** /** +1043:Src/main.c **** * @brief SPI4 Initialization Function +1044:Src/main.c **** * @param None +1045:Src/main.c **** * @retval None +1046:Src/main.c **** */ +1047:Src/main.c **** static void MX_SPI4_Init(void) +1048:Src/main.c **** { +1049:Src/main.c **** +1050:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ +1051:Src/main.c **** +1052:Src/main.c **** /* USER CODE END SPI4_Init 0 */ +1053:Src/main.c **** +1054:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1055:Src/main.c **** +1056:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1057:Src/main.c **** +1058:Src/main.c **** /* Peripheral clock enable */ +1059:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); +1060:Src/main.c **** +1061:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); +1062:Src/main.c **** /**SPI4 GPIO Configuration +1063:Src/main.c **** PE12 ------> SPI4_SCK +1064:Src/main.c **** PE13 ------> SPI4_MISO +1065:Src/main.c **** */ +1066:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; +1067:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1068:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1069:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1070:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1071:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1072:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1073:Src/main.c **** +1074:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1075:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1076:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1077:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1078:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1079:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1080:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1081:Src/main.c **** +1082:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ +1083:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 59 -1084:Src/main.c **** /* SPI4 parameter configuration*/ -1085:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1086:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1087:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1088:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1089:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1090:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1091:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1092:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1093:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1094:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1095:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); -1096:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); -1097:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); -1098:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ -1099:Src/main.c **** -1100:Src/main.c **** /* USER CODE END SPI4_Init 2 */ -1101:Src/main.c **** -1102:Src/main.c **** } -1103:Src/main.c **** -1104:Src/main.c **** /** -1105:Src/main.c **** * @brief SPI5 Initialization Function -1106:Src/main.c **** * @param None -1107:Src/main.c **** * @retval None -1108:Src/main.c **** */ -1109:Src/main.c **** static void MX_SPI5_Init(void) -1110:Src/main.c **** { -1111:Src/main.c **** -1112:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ -1113:Src/main.c **** -1114:Src/main.c **** /* USER CODE END SPI5_Init 0 */ -1115:Src/main.c **** -1116:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1117:Src/main.c **** -1118:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1119:Src/main.c **** -1120:Src/main.c **** /* Peripheral clock enable */ -1121:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); -1122:Src/main.c **** -1123:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); -1124:Src/main.c **** /**SPI5 GPIO Configuration -1125:Src/main.c **** PF7 ------> SPI5_SCK -1126:Src/main.c **** PF8 ------> SPI5_MISO -1127:Src/main.c **** */ -1128:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1129:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1130:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1131:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1132:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1133:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1134:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1135:Src/main.c **** -1136:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; -1137:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1138:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1139:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1140:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - ARM GAS /tmp/ccWQNJQt.s page 60 +1084:Src/main.c **** /* USER CODE END SPI4_Init 1 */ +1085:Src/main.c **** /* SPI4 parameter configuration*/ +1086:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1087:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1088:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1089:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1090:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1091:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1092:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1093:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1094:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1095:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1096:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); +1097:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); +1098:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); +1099:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ +1100:Src/main.c **** +1101:Src/main.c **** /* USER CODE END SPI4_Init 2 */ +1102:Src/main.c **** +1103:Src/main.c **** } +1104:Src/main.c **** +1105:Src/main.c **** /** +1106:Src/main.c **** * @brief SPI5 Initialization Function +1107:Src/main.c **** * @param None +1108:Src/main.c **** * @retval None +1109:Src/main.c **** */ +1110:Src/main.c **** static void MX_SPI5_Init(void) +1111:Src/main.c **** { +1112:Src/main.c **** +1113:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1114:Src/main.c **** +1115:Src/main.c **** /* USER CODE END SPI5_Init 0 */ +1116:Src/main.c **** +1117:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1118:Src/main.c **** +1119:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1120:Src/main.c **** +1121:Src/main.c **** /* Peripheral clock enable */ +1122:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); +1123:Src/main.c **** +1124:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); +1125:Src/main.c **** /**SPI5 GPIO Configuration +1126:Src/main.c **** PF7 ------> SPI5_SCK +1127:Src/main.c **** PF8 ------> SPI5_MISO +1128:Src/main.c **** */ +1129:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1130:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1131:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1132:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1133:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1134:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1135:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1136:Src/main.c **** +1137:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; +1138:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1139:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1140:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + ARM GAS /tmp/ccO46DoU.s page 60 -1141:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1142:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1143:Src/main.c **** -1144:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ -1145:Src/main.c **** -1146:Src/main.c **** /* USER CODE END SPI5_Init 1 */ -1147:Src/main.c **** /* SPI5 parameter configuration*/ -1148:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1149:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1150:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1151:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1152:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1153:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1154:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1155:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1156:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1157:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1158:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); -1159:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); -1160:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); -1161:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ -1162:Src/main.c **** -1163:Src/main.c **** /* USER CODE END SPI5_Init 2 */ -1164:Src/main.c **** -1165:Src/main.c **** } -1166:Src/main.c **** -1167:Src/main.c **** /** -1168:Src/main.c **** * @brief SPI6 Initialization Function -1169:Src/main.c **** * @param None -1170:Src/main.c **** * @retval None -1171:Src/main.c **** */ -1172:Src/main.c **** static void MX_SPI6_Init(void) -1173:Src/main.c **** { -1174:Src/main.c **** -1175:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ -1176:Src/main.c **** -1177:Src/main.c **** /* USER CODE END SPI6_Init 0 */ -1178:Src/main.c **** -1179:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1180:Src/main.c **** -1181:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1182:Src/main.c **** -1183:Src/main.c **** /* Peripheral clock enable */ -1184:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); -1185:Src/main.c **** -1186:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1187:Src/main.c **** /**SPI6 GPIO Configuration -1188:Src/main.c **** PA5 ------> SPI6_SCK -1189:Src/main.c **** PA7 ------> SPI6_MOSI -1190:Src/main.c **** */ -1191:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; -1192:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1193:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1194:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1195:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1196:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1197:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - ARM GAS /tmp/ccWQNJQt.s page 61 +1141:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1142:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1143:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1144:Src/main.c **** +1145:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ +1146:Src/main.c **** +1147:Src/main.c **** /* USER CODE END SPI5_Init 1 */ +1148:Src/main.c **** /* SPI5 parameter configuration*/ +1149:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1150:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1151:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1152:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1153:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1154:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1155:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1156:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1157:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1158:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1159:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); +1160:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); +1161:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); +1162:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ +1163:Src/main.c **** +1164:Src/main.c **** /* USER CODE END SPI5_Init 2 */ +1165:Src/main.c **** +1166:Src/main.c **** } +1167:Src/main.c **** +1168:Src/main.c **** /** +1169:Src/main.c **** * @brief SPI6 Initialization Function +1170:Src/main.c **** * @param None +1171:Src/main.c **** * @retval None +1172:Src/main.c **** */ +1173:Src/main.c **** static void MX_SPI6_Init(void) +1174:Src/main.c **** { +1175:Src/main.c **** +1176:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ +1177:Src/main.c **** +1178:Src/main.c **** /* USER CODE END SPI6_Init 0 */ +1179:Src/main.c **** +1180:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1181:Src/main.c **** +1182:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1183:Src/main.c **** +1184:Src/main.c **** /* Peripheral clock enable */ +1185:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); +1186:Src/main.c **** +1187:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1188:Src/main.c **** /**SPI6 GPIO Configuration +1189:Src/main.c **** PA5 ------> SPI6_SCK +1190:Src/main.c **** PA7 ------> SPI6_MOSI +1191:Src/main.c **** */ +1192:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; +1193:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1194:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1195:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1196:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1197:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + ARM GAS /tmp/ccO46DoU.s page 61 -1198:Src/main.c **** -1199:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1200:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1201:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1202:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1203:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1204:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1205:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1206:Src/main.c **** -1207:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ -1208:Src/main.c **** -1209:Src/main.c **** /* USER CODE END SPI6_Init 1 */ -1210:Src/main.c **** /* SPI6 parameter configuration*/ -1211:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1212:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1213:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1214:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1215:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1216:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1217:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1218:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1219:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1220:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1221:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); -1222:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); -1223:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); -1224:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ -1225:Src/main.c **** -1226:Src/main.c **** /* USER CODE END SPI6_Init 2 */ -1227:Src/main.c **** -1228:Src/main.c **** } -1229:Src/main.c **** -1230:Src/main.c **** /** -1231:Src/main.c **** * @brief TIM2 Initialization Function -1232:Src/main.c **** * @param None -1233:Src/main.c **** * @retval None -1234:Src/main.c **** */ -1235:Src/main.c **** static void MX_TIM2_Init(void) -1236:Src/main.c **** { -1237:Src/main.c **** -1238:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ -1239:Src/main.c **** -1240:Src/main.c **** /* USER CODE END TIM2_Init 0 */ -1241:Src/main.c **** -1242:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1243:Src/main.c **** -1244:Src/main.c **** /* Peripheral clock enable */ -1245:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); -1246:Src/main.c **** -1247:Src/main.c **** /* TIM2 interrupt Init */ -1248:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1249:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); -1250:Src/main.c **** -1251:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ -1252:Src/main.c **** -1253:Src/main.c **** /* USER CODE END TIM2_Init 1 */ -1254:Src/main.c **** TIM_InitStruct.Prescaler = 1000; - ARM GAS /tmp/ccWQNJQt.s page 62 +1198:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1199:Src/main.c **** +1200:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1201:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1202:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1203:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1204:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1205:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1206:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1207:Src/main.c **** +1208:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ +1209:Src/main.c **** +1210:Src/main.c **** /* USER CODE END SPI6_Init 1 */ +1211:Src/main.c **** /* SPI6 parameter configuration*/ +1212:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1213:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1214:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1215:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1216:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1217:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1218:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1219:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1220:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1221:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1222:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); +1223:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); +1224:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); +1225:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ +1226:Src/main.c **** +1227:Src/main.c **** /* USER CODE END SPI6_Init 2 */ +1228:Src/main.c **** +1229:Src/main.c **** } +1230:Src/main.c **** +1231:Src/main.c **** /** +1232:Src/main.c **** * @brief TIM2 Initialization Function +1233:Src/main.c **** * @param None +1234:Src/main.c **** * @retval None +1235:Src/main.c **** */ +1236:Src/main.c **** static void MX_TIM2_Init(void) +1237:Src/main.c **** { +1238:Src/main.c **** +1239:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ +1240:Src/main.c **** +1241:Src/main.c **** /* USER CODE END TIM2_Init 0 */ +1242:Src/main.c **** +1243:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1244:Src/main.c **** +1245:Src/main.c **** /* Peripheral clock enable */ +1246:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); +1247:Src/main.c **** +1248:Src/main.c **** /* TIM2 interrupt Init */ +1249:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1250:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); +1251:Src/main.c **** +1252:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ +1253:Src/main.c **** +1254:Src/main.c **** /* USER CODE END TIM2_Init 1 */ + ARM GAS /tmp/ccO46DoU.s page 62 -1255:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1256:Src/main.c **** TIM_InitStruct.Autoreload = 840000; -1257:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1258:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); -1259:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); -1260:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); -1261:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); -1262:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); -1263:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ -1264:Src/main.c **** -1265:Src/main.c **** /* USER CODE END TIM2_Init 2 */ -1266:Src/main.c **** -1267:Src/main.c **** } -1268:Src/main.c **** -1269:Src/main.c **** /** -1270:Src/main.c **** * @brief TIM4 Initialization Function -1271:Src/main.c **** * @param None -1272:Src/main.c **** * @retval None -1273:Src/main.c **** */ -1274:Src/main.c **** static void MX_TIM4_Init(void) -1275:Src/main.c **** { -1276:Src/main.c **** -1277:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ -1278:Src/main.c **** -1279:Src/main.c **** /* USER CODE END TIM4_Init 0 */ -1280:Src/main.c **** -1281:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1282:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1283:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1284:Src/main.c **** -1285:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ -1286:Src/main.c **** -1287:Src/main.c **** /* USER CODE END TIM4_Init 1 */ -1288:Src/main.c **** htim4.Instance = TIM4; -1289:Src/main.c **** htim4.Init.Prescaler = 0; -1290:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; -1291:Src/main.c **** htim4.Init.Period = 45; -1292:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1293:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1294:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) -1295:Src/main.c **** { -1296:Src/main.c **** Error_Handler(); -1297:Src/main.c **** } -1298:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1299:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) -1300:Src/main.c **** { -1301:Src/main.c **** Error_Handler(); -1302:Src/main.c **** } -1303:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) -1304:Src/main.c **** { -1305:Src/main.c **** Error_Handler(); -1306:Src/main.c **** } -1307:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1308:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1309:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) -1310:Src/main.c **** { -1311:Src/main.c **** Error_Handler(); - ARM GAS /tmp/ccWQNJQt.s page 63 +1255:Src/main.c **** TIM_InitStruct.Prescaler = 1000; +1256:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1257:Src/main.c **** TIM_InitStruct.Autoreload = 840000; +1258:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1259:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); +1260:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); +1261:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); +1262:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); +1263:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); +1264:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ +1265:Src/main.c **** +1266:Src/main.c **** /* USER CODE END TIM2_Init 2 */ +1267:Src/main.c **** +1268:Src/main.c **** } +1269:Src/main.c **** +1270:Src/main.c **** /** +1271:Src/main.c **** * @brief TIM4 Initialization Function +1272:Src/main.c **** * @param None +1273:Src/main.c **** * @retval None +1274:Src/main.c **** */ +1275:Src/main.c **** static void MX_TIM4_Init(void) +1276:Src/main.c **** { +1277:Src/main.c **** +1278:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ +1279:Src/main.c **** +1280:Src/main.c **** /* USER CODE END TIM4_Init 0 */ +1281:Src/main.c **** +1282:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1283:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1284:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1285:Src/main.c **** +1286:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ +1287:Src/main.c **** +1288:Src/main.c **** /* USER CODE END TIM4_Init 1 */ +1289:Src/main.c **** htim4.Instance = TIM4; +1290:Src/main.c **** htim4.Init.Prescaler = 0; +1291:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; +1292:Src/main.c **** htim4.Init.Period = 45; +1293:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1294:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1295:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) +1296:Src/main.c **** { +1297:Src/main.c **** Error_Handler(); +1298:Src/main.c **** } +1299:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1300:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) +1301:Src/main.c **** { +1302:Src/main.c **** Error_Handler(); +1303:Src/main.c **** } +1304:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) +1305:Src/main.c **** { +1306:Src/main.c **** Error_Handler(); +1307:Src/main.c **** } +1308:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1309:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1310:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) +1311:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 63 -1312:Src/main.c **** } -1313:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1314:Src/main.c **** sConfigOC.Pulse = 22; -1315:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1316:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1317:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) -1318:Src/main.c **** { -1319:Src/main.c **** Error_Handler(); -1320:Src/main.c **** } -1321:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ -1322:Src/main.c **** -1323:Src/main.c **** /* USER CODE END TIM4_Init 2 */ -1324:Src/main.c **** HAL_TIM_MspPostInit(&htim4); -1325:Src/main.c **** -1326:Src/main.c **** } -1327:Src/main.c **** -1328:Src/main.c **** /** -1329:Src/main.c **** * @brief TIM5 Initialization Function -1330:Src/main.c **** * @param None -1331:Src/main.c **** * @retval None -1332:Src/main.c **** */ -1333:Src/main.c **** static void MX_TIM5_Init(void) -1334:Src/main.c **** { -1335:Src/main.c **** -1336:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ -1337:Src/main.c **** -1338:Src/main.c **** /* USER CODE END TIM5_Init 0 */ -1339:Src/main.c **** -1340:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1341:Src/main.c **** -1342:Src/main.c **** /* Peripheral clock enable */ -1343:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); -1344:Src/main.c **** -1345:Src/main.c **** /* TIM5 interrupt Init */ -1346:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1347:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); -1348:Src/main.c **** -1349:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ -1350:Src/main.c **** -1351:Src/main.c **** /* USER CODE END TIM5_Init 1 */ -1352:Src/main.c **** TIM_InitStruct.Prescaler = 10000; -1353:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1354:Src/main.c **** TIM_InitStruct.Autoreload = 560; -1355:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1356:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); -1357:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); -1358:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); -1359:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); -1360:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); -1361:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ -1362:Src/main.c **** -1363:Src/main.c **** /* USER CODE END TIM5_Init 2 */ -1364:Src/main.c **** -1365:Src/main.c **** } -1366:Src/main.c **** -1367:Src/main.c **** /** -1368:Src/main.c **** * @brief TIM6 Initialization Function - ARM GAS /tmp/ccWQNJQt.s page 64 +1312:Src/main.c **** Error_Handler(); +1313:Src/main.c **** } +1314:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1315:Src/main.c **** sConfigOC.Pulse = 22; +1316:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1317:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1318:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) +1319:Src/main.c **** { +1320:Src/main.c **** Error_Handler(); +1321:Src/main.c **** } +1322:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ +1323:Src/main.c **** +1324:Src/main.c **** /* USER CODE END TIM4_Init 2 */ +1325:Src/main.c **** HAL_TIM_MspPostInit(&htim4); +1326:Src/main.c **** +1327:Src/main.c **** } +1328:Src/main.c **** +1329:Src/main.c **** /** +1330:Src/main.c **** * @brief TIM5 Initialization Function +1331:Src/main.c **** * @param None +1332:Src/main.c **** * @retval None +1333:Src/main.c **** */ +1334:Src/main.c **** static void MX_TIM5_Init(void) +1335:Src/main.c **** { +1336:Src/main.c **** +1337:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ +1338:Src/main.c **** +1339:Src/main.c **** /* USER CODE END TIM5_Init 0 */ +1340:Src/main.c **** +1341:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1342:Src/main.c **** +1343:Src/main.c **** /* Peripheral clock enable */ +1344:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); +1345:Src/main.c **** +1346:Src/main.c **** /* TIM5 interrupt Init */ +1347:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1348:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); +1349:Src/main.c **** +1350:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ +1351:Src/main.c **** +1352:Src/main.c **** /* USER CODE END TIM5_Init 1 */ +1353:Src/main.c **** TIM_InitStruct.Prescaler = 10000; +1354:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1355:Src/main.c **** TIM_InitStruct.Autoreload = 560; +1356:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1357:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); +1358:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); +1359:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); +1360:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); +1361:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); +1362:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ +1363:Src/main.c **** +1364:Src/main.c **** /* USER CODE END TIM5_Init 2 */ +1365:Src/main.c **** +1366:Src/main.c **** } +1367:Src/main.c **** +1368:Src/main.c **** /** + ARM GAS /tmp/ccO46DoU.s page 64 -1369:Src/main.c **** * @param None -1370:Src/main.c **** * @retval None -1371:Src/main.c **** */ -1372:Src/main.c **** static void MX_TIM6_Init(void) -1373:Src/main.c **** { -1374:Src/main.c **** -1375:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ -1376:Src/main.c **** -1377:Src/main.c **** /* USER CODE END TIM6_Init 0 */ -1378:Src/main.c **** -1379:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1380:Src/main.c **** -1381:Src/main.c **** /* Peripheral clock enable */ -1382:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); -1383:Src/main.c **** -1384:Src/main.c **** /* TIM6 interrupt Init */ -1385:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1386:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); -1387:Src/main.c **** -1388:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ -1389:Src/main.c **** -1390:Src/main.c **** /* USER CODE END TIM6_Init 1 */ -1391:Src/main.c **** TIM_InitStruct.Prescaler = 45999; -1392:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1393:Src/main.c **** TIM_InitStruct.Autoreload = 19; -1394:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); -1395:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); -1396:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); -1397:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); -1398:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ -1399:Src/main.c **** -1400:Src/main.c **** /* USER CODE END TIM6_Init 2 */ -1401:Src/main.c **** -1402:Src/main.c **** } -1403:Src/main.c **** -1404:Src/main.c **** /** -1405:Src/main.c **** * @brief TIM7 Initialization Function -1406:Src/main.c **** * @param None -1407:Src/main.c **** * @retval None -1408:Src/main.c **** */ -1409:Src/main.c **** static void MX_TIM7_Init(void) -1410:Src/main.c **** { -1411:Src/main.c **** -1412:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ -1413:Src/main.c **** -1414:Src/main.c **** /* USER CODE END TIM7_Init 0 */ -1415:Src/main.c **** -1416:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1417:Src/main.c **** -1418:Src/main.c **** /* Peripheral clock enable */ -1419:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); -1420:Src/main.c **** -1421:Src/main.c **** /* TIM7 interrupt Init */ -1422:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1423:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); -1424:Src/main.c **** -1425:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ - ARM GAS /tmp/ccWQNJQt.s page 65 +1369:Src/main.c **** * @brief TIM6 Initialization Function +1370:Src/main.c **** * @param None +1371:Src/main.c **** * @retval None +1372:Src/main.c **** */ +1373:Src/main.c **** static void MX_TIM6_Init(void) +1374:Src/main.c **** { +1375:Src/main.c **** +1376:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ +1377:Src/main.c **** +1378:Src/main.c **** /* USER CODE END TIM6_Init 0 */ +1379:Src/main.c **** +1380:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1381:Src/main.c **** +1382:Src/main.c **** /* Peripheral clock enable */ +1383:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); +1384:Src/main.c **** +1385:Src/main.c **** /* TIM6 interrupt Init */ +1386:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1387:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); +1388:Src/main.c **** +1389:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ +1390:Src/main.c **** +1391:Src/main.c **** /* USER CODE END TIM6_Init 1 */ +1392:Src/main.c **** TIM_InitStruct.Prescaler = 45999; +1393:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1394:Src/main.c **** TIM_InitStruct.Autoreload = 19; +1395:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); +1396:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); +1397:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); +1398:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); +1399:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ +1400:Src/main.c **** +1401:Src/main.c **** /* USER CODE END TIM6_Init 2 */ +1402:Src/main.c **** +1403:Src/main.c **** } +1404:Src/main.c **** +1405:Src/main.c **** /** +1406:Src/main.c **** * @brief TIM7 Initialization Function +1407:Src/main.c **** * @param None +1408:Src/main.c **** * @retval None +1409:Src/main.c **** */ +1410:Src/main.c **** static void MX_TIM7_Init(void) +1411:Src/main.c **** { +1412:Src/main.c **** +1413:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ +1414:Src/main.c **** +1415:Src/main.c **** /* USER CODE END TIM7_Init 0 */ +1416:Src/main.c **** +1417:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1418:Src/main.c **** +1419:Src/main.c **** /* Peripheral clock enable */ +1420:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); +1421:Src/main.c **** +1422:Src/main.c **** /* TIM7 interrupt Init */ +1423:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1424:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); +1425:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 65 -1426:Src/main.c **** -1427:Src/main.c **** /* USER CODE END TIM7_Init 1 */ -1428:Src/main.c **** TIM_InitStruct.Prescaler = 919; -1429:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1430:Src/main.c **** TIM_InitStruct.Autoreload = 99; -1431:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); -1432:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); -1433:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); -1434:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); -1435:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ -1436:Src/main.c **** -1437:Src/main.c **** /* USER CODE END TIM7_Init 2 */ -1438:Src/main.c **** -1439:Src/main.c **** } -1440:Src/main.c **** -1441:Src/main.c **** /** -1442:Src/main.c **** * @brief TIM8 Initialization Function -1443:Src/main.c **** * @param None -1444:Src/main.c **** * @retval None -1445:Src/main.c **** */ -1446:Src/main.c **** static void MX_TIM8_Init(void) -1447:Src/main.c **** { -1448:Src/main.c **** -1449:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ -1450:Src/main.c **** -1451:Src/main.c **** /* USER CODE END TIM8_Init 0 */ -1452:Src/main.c **** -1453:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1454:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1455:Src/main.c **** -1456:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ -1457:Src/main.c **** -1458:Src/main.c **** /* USER CODE END TIM8_Init 1 */ -1459:Src/main.c **** htim8.Instance = TIM8; -1460:Src/main.c **** htim8.Init.Prescaler = 0; -1461:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; -1462:Src/main.c **** htim8.Init.Period = 91; -1463:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1464:Src/main.c **** htim8.Init.RepetitionCounter = 0; -1465:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1466:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) -1467:Src/main.c **** { -1468:Src/main.c **** Error_Handler(); -1469:Src/main.c **** } -1470:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1471:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) -1472:Src/main.c **** { -1473:Src/main.c **** Error_Handler(); -1474:Src/main.c **** } -1475:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1476:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; -1477:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1478:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) -1479:Src/main.c **** { -1480:Src/main.c **** Error_Handler(); -1481:Src/main.c **** } -1482:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ - ARM GAS /tmp/ccWQNJQt.s page 66 +1426:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1427:Src/main.c **** +1428:Src/main.c **** /* USER CODE END TIM7_Init 1 */ +1429:Src/main.c **** TIM_InitStruct.Prescaler = 919; +1430:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1431:Src/main.c **** TIM_InitStruct.Autoreload = 99; +1432:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); +1433:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); +1434:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); +1435:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); +1436:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ +1437:Src/main.c **** +1438:Src/main.c **** /* USER CODE END TIM7_Init 2 */ +1439:Src/main.c **** +1440:Src/main.c **** } +1441:Src/main.c **** +1442:Src/main.c **** /** +1443:Src/main.c **** * @brief TIM8 Initialization Function +1444:Src/main.c **** * @param None +1445:Src/main.c **** * @retval None +1446:Src/main.c **** */ +1447:Src/main.c **** static void MX_TIM8_Init(void) +1448:Src/main.c **** { +1449:Src/main.c **** +1450:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ +1451:Src/main.c **** +1452:Src/main.c **** /* USER CODE END TIM8_Init 0 */ +1453:Src/main.c **** +1454:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1455:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1456:Src/main.c **** +1457:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ +1458:Src/main.c **** +1459:Src/main.c **** /* USER CODE END TIM8_Init 1 */ +1460:Src/main.c **** htim8.Instance = TIM8; +1461:Src/main.c **** htim8.Init.Prescaler = 0; +1462:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; +1463:Src/main.c **** htim8.Init.Period = 91; +1464:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1465:Src/main.c **** htim8.Init.RepetitionCounter = 0; +1466:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1467:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) +1468:Src/main.c **** { +1469:Src/main.c **** Error_Handler(); +1470:Src/main.c **** } +1471:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1472:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) +1473:Src/main.c **** { +1474:Src/main.c **** Error_Handler(); +1475:Src/main.c **** } +1476:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1477:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; +1478:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1479:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) +1480:Src/main.c **** { +1481:Src/main.c **** Error_Handler(); +1482:Src/main.c **** } + ARM GAS /tmp/ccO46DoU.s page 66 -1483:Src/main.c **** -1484:Src/main.c **** /* USER CODE END TIM8_Init 2 */ -1485:Src/main.c **** -1486:Src/main.c **** } -1487:Src/main.c **** -1488:Src/main.c **** /** -1489:Src/main.c **** * @brief TIM10 Initialization Function -1490:Src/main.c **** * @param None -1491:Src/main.c **** * @retval None -1492:Src/main.c **** */ -1493:Src/main.c **** static void MX_TIM10_Init(void) -1494:Src/main.c **** { -1495:Src/main.c **** -1496:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ -1497:Src/main.c **** -1498:Src/main.c **** /* USER CODE END TIM10_Init 0 */ -1499:Src/main.c **** -1500:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ -1501:Src/main.c **** -1502:Src/main.c **** /* USER CODE END TIM10_Init 1 */ -1503:Src/main.c **** htim10.Instance = TIM10; -1504:Src/main.c **** htim10.Init.Prescaler = 183; -1505:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; -1506:Src/main.c **** htim10.Init.Period = 9; -1507:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1508:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1509:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) -1510:Src/main.c **** { -1511:Src/main.c **** Error_Handler(); -1512:Src/main.c **** } -1513:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ -1514:Src/main.c **** -1515:Src/main.c **** /* USER CODE END TIM10_Init 2 */ -1516:Src/main.c **** -1517:Src/main.c **** } -1518:Src/main.c **** -1519:Src/main.c **** /** -1520:Src/main.c **** * @brief TIM11 Initialization Function -1521:Src/main.c **** * @param None -1522:Src/main.c **** * @retval None -1523:Src/main.c **** */ -1524:Src/main.c **** static void MX_TIM11_Init(void) -1525:Src/main.c **** { -1526:Src/main.c **** -1527:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ -1528:Src/main.c **** -1529:Src/main.c **** /* USER CODE END TIM11_Init 0 */ -1530:Src/main.c **** -1531:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1532:Src/main.c **** -1533:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ -1534:Src/main.c **** -1535:Src/main.c **** /* USER CODE END TIM11_Init 1 */ -1536:Src/main.c **** htim11.Instance = TIM11; -1537:Src/main.c **** htim11.Init.Prescaler = 1; -1538:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; -1539:Src/main.c **** htim11.Init.Period = 91; - ARM GAS /tmp/ccWQNJQt.s page 67 +1483:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ +1484:Src/main.c **** +1485:Src/main.c **** /* USER CODE END TIM8_Init 2 */ +1486:Src/main.c **** +1487:Src/main.c **** } +1488:Src/main.c **** +1489:Src/main.c **** /** +1490:Src/main.c **** * @brief TIM10 Initialization Function +1491:Src/main.c **** * @param None +1492:Src/main.c **** * @retval None +1493:Src/main.c **** */ +1494:Src/main.c **** static void MX_TIM10_Init(void) +1495:Src/main.c **** { +1496:Src/main.c **** +1497:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ +1498:Src/main.c **** +1499:Src/main.c **** /* USER CODE END TIM10_Init 0 */ +1500:Src/main.c **** +1501:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ +1502:Src/main.c **** +1503:Src/main.c **** /* USER CODE END TIM10_Init 1 */ +1504:Src/main.c **** htim10.Instance = TIM10; +1505:Src/main.c **** htim10.Init.Prescaler = 183; +1506:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; +1507:Src/main.c **** htim10.Init.Period = 9; +1508:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1509:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1510:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) +1511:Src/main.c **** { +1512:Src/main.c **** Error_Handler(); +1513:Src/main.c **** } +1514:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ +1515:Src/main.c **** +1516:Src/main.c **** /* USER CODE END TIM10_Init 2 */ +1517:Src/main.c **** +1518:Src/main.c **** } +1519:Src/main.c **** +1520:Src/main.c **** /** +1521:Src/main.c **** * @brief TIM11 Initialization Function +1522:Src/main.c **** * @param None +1523:Src/main.c **** * @retval None +1524:Src/main.c **** */ +1525:Src/main.c **** static void MX_TIM11_Init(void) +1526:Src/main.c **** { +1527:Src/main.c **** +1528:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ +1529:Src/main.c **** +1530:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1531:Src/main.c **** +1532:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1533:Src/main.c **** +1534:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1535:Src/main.c **** +1536:Src/main.c **** /* USER CODE END TIM11_Init 1 */ +1537:Src/main.c **** htim11.Instance = TIM11; +1538:Src/main.c **** htim11.Init.Prescaler = 1; +1539:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + ARM GAS /tmp/ccO46DoU.s page 67 -1540:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1541:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; -1542:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) -1543:Src/main.c **** { -1544:Src/main.c **** Error_Handler(); -1545:Src/main.c **** } -1546:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) -1547:Src/main.c **** { -1548:Src/main.c **** Error_Handler(); -1549:Src/main.c **** } -1550:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1551:Src/main.c **** sConfigOC.Pulse = 91; -1552:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1553:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1554:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1555:Src/main.c **** { -1556:Src/main.c **** Error_Handler(); -1557:Src/main.c **** } -1558:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ -1559:Src/main.c **** -1560:Src/main.c **** /* USER CODE END TIM11_Init 2 */ -1561:Src/main.c **** HAL_TIM_MspPostInit(&htim11); -1562:Src/main.c **** -1563:Src/main.c **** } -1564:Src/main.c **** -1565:Src/main.c **** /** -1566:Src/main.c **** * @brief UART8 Initialization Function -1567:Src/main.c **** * @param None -1568:Src/main.c **** * @retval None -1569:Src/main.c **** */ -1570:Src/main.c **** static void MX_UART8_Init(void) -1571:Src/main.c **** { -1572:Src/main.c **** -1573:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ -1574:Src/main.c **** -1575:Src/main.c **** /* USER CODE END UART8_Init 0 */ -1576:Src/main.c **** -1577:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ -1578:Src/main.c **** -1579:Src/main.c **** /* USER CODE END UART8_Init 1 */ -1580:Src/main.c **** huart8.Instance = UART8; -1581:Src/main.c **** huart8.Init.BaudRate = 115200; -1582:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; -1583:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; -1584:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; -1585:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; -1586:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; -1587:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; -1588:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; -1589:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; -1590:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) -1591:Src/main.c **** { -1592:Src/main.c **** Error_Handler(); -1593:Src/main.c **** } -1594:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ -1595:Src/main.c **** -1596:Src/main.c **** /* USER CODE END UART8_Init 2 */ - ARM GAS /tmp/ccWQNJQt.s page 68 +1540:Src/main.c **** htim11.Init.Period = 91; +1541:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1542:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; +1543:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) +1544:Src/main.c **** { +1545:Src/main.c **** Error_Handler(); +1546:Src/main.c **** } +1547:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) +1548:Src/main.c **** { +1549:Src/main.c **** Error_Handler(); +1550:Src/main.c **** } +1551:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1552:Src/main.c **** sConfigOC.Pulse = 91; +1553:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1554:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1555:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) +1556:Src/main.c **** { +1557:Src/main.c **** Error_Handler(); +1558:Src/main.c **** } +1559:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ +1560:Src/main.c **** +1561:Src/main.c **** /* USER CODE END TIM11_Init 2 */ +1562:Src/main.c **** HAL_TIM_MspPostInit(&htim11); +1563:Src/main.c **** +1564:Src/main.c **** } +1565:Src/main.c **** +1566:Src/main.c **** /** +1567:Src/main.c **** * @brief UART8 Initialization Function +1568:Src/main.c **** * @param None +1569:Src/main.c **** * @retval None +1570:Src/main.c **** */ +1571:Src/main.c **** static void MX_UART8_Init(void) +1572:Src/main.c **** { +1573:Src/main.c **** +1574:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ +1575:Src/main.c **** +1576:Src/main.c **** /* USER CODE END UART8_Init 0 */ +1577:Src/main.c **** +1578:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ +1579:Src/main.c **** +1580:Src/main.c **** /* USER CODE END UART8_Init 1 */ +1581:Src/main.c **** huart8.Instance = UART8; +1582:Src/main.c **** huart8.Init.BaudRate = 115200; +1583:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; +1584:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; +1585:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; +1586:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; +1587:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; +1588:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; +1589:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; +1590:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +1591:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) +1592:Src/main.c **** { +1593:Src/main.c **** Error_Handler(); +1594:Src/main.c **** } +1595:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ +1596:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 68 -1597:Src/main.c **** -1598:Src/main.c **** } -1599:Src/main.c **** -1600:Src/main.c **** /** -1601:Src/main.c **** * @brief USART1 Initialization Function -1602:Src/main.c **** * @param None -1603:Src/main.c **** * @retval None -1604:Src/main.c **** */ -1605:Src/main.c **** static void MX_USART1_UART_Init(void) -1606:Src/main.c **** { -1607:Src/main.c **** -1608:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ -1609:Src/main.c **** -1610:Src/main.c **** /* USER CODE END USART1_Init 0 */ -1611:Src/main.c **** -1612:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; -1613:Src/main.c **** -1614:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1615:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; -1616:Src/main.c **** -1617:Src/main.c **** /** Initializes the peripherals clock -1618:Src/main.c **** */ -1619:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; -1620:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; -1621:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) -1622:Src/main.c **** { -1623:Src/main.c **** Error_Handler(); -1624:Src/main.c **** } -1625:Src/main.c **** -1626:Src/main.c **** /* Peripheral clock enable */ -1627:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); -1628:Src/main.c **** -1629:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1630:Src/main.c **** /**USART1 GPIO Configuration -1631:Src/main.c **** PA9 ------> USART1_TX -1632:Src/main.c **** PA10 ------> USART1_RX -1633:Src/main.c **** */ -1634:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; -1635:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1636:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1637:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1638:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1639:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1640:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1641:Src/main.c **** -1642:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; -1643:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1644:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1645:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1646:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1647:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1648:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1649:Src/main.c **** -1650:Src/main.c **** /* USART1 DMA Init */ -1651:Src/main.c **** -1652:Src/main.c **** /* USART1_TX Init */ -1653:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); - ARM GAS /tmp/ccWQNJQt.s page 69 +1597:Src/main.c **** /* USER CODE END UART8_Init 2 */ +1598:Src/main.c **** +1599:Src/main.c **** } +1600:Src/main.c **** +1601:Src/main.c **** /** +1602:Src/main.c **** * @brief USART1 Initialization Function +1603:Src/main.c **** * @param None +1604:Src/main.c **** * @retval None +1605:Src/main.c **** */ +1606:Src/main.c **** static void MX_USART1_UART_Init(void) +1607:Src/main.c **** { +1608:Src/main.c **** +1609:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ +1610:Src/main.c **** +1611:Src/main.c **** /* USER CODE END USART1_Init 0 */ +1612:Src/main.c **** +1613:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; +1614:Src/main.c **** +1615:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1616:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; +1617:Src/main.c **** +1618:Src/main.c **** /** Initializes the peripherals clock +1619:Src/main.c **** */ +1620:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; +1621:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; +1622:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) +1623:Src/main.c **** { +1624:Src/main.c **** Error_Handler(); +1625:Src/main.c **** } +1626:Src/main.c **** +1627:Src/main.c **** /* Peripheral clock enable */ +1628:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +1629:Src/main.c **** +1630:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1631:Src/main.c **** /**USART1 GPIO Configuration +1632:Src/main.c **** PA9 ------> USART1_TX +1633:Src/main.c **** PA10 ------> USART1_RX +1634:Src/main.c **** */ +1635:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; +1636:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1637:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1638:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1639:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1640:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1641:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1642:Src/main.c **** +1643:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; +1644:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1645:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1646:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1647:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1648:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1649:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1650:Src/main.c **** +1651:Src/main.c **** /* USART1 DMA Init */ +1652:Src/main.c **** +1653:Src/main.c **** /* USART1_TX Init */ + ARM GAS /tmp/ccO46DoU.s page 69 -1654:Src/main.c **** -1655:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); -1656:Src/main.c **** -1657:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); -1658:Src/main.c **** -1659:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); -1660:Src/main.c **** -1661:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); -1662:Src/main.c **** -1663:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); -1664:Src/main.c **** -1665:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); -1666:Src/main.c **** -1667:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); -1668:Src/main.c **** -1669:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); -1670:Src/main.c **** -1671:Src/main.c **** /* USART1 interrupt Init */ -1672:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1673:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); -1674:Src/main.c **** -1675:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ -1676:Src/main.c **** -1677:Src/main.c **** /* USER CODE END USART1_Init 1 */ -1678:Src/main.c **** USART_InitStruct.BaudRate = 115200; -1679:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; -1680:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; -1681:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; -1682:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; -1683:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; -1684:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; -1685:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); -1686:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); -1687:Src/main.c **** LL_USART_Enable(USART1); -1688:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ -1689:Src/main.c **** -1690:Src/main.c **** /* USER CODE END USART1_Init 2 */ -1691:Src/main.c **** -1692:Src/main.c **** } -1693:Src/main.c **** -1694:Src/main.c **** /** -1695:Src/main.c **** * Enable DMA controller clock -1696:Src/main.c **** */ -1697:Src/main.c **** static void MX_DMA_Init(void) -1698:Src/main.c **** { - 144 .loc 1 1698 1 is_stmt 1 view -0 +1654:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); +1655:Src/main.c **** +1656:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); +1657:Src/main.c **** +1658:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); +1659:Src/main.c **** +1660:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); +1661:Src/main.c **** +1662:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); +1663:Src/main.c **** +1664:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); +1665:Src/main.c **** +1666:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +1667:Src/main.c **** +1668:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); +1669:Src/main.c **** +1670:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +1671:Src/main.c **** +1672:Src/main.c **** /* USART1 interrupt Init */ +1673:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1674:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); +1675:Src/main.c **** +1676:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +1677:Src/main.c **** +1678:Src/main.c **** /* USER CODE END USART1_Init 1 */ +1679:Src/main.c **** USART_InitStruct.BaudRate = 115200; +1680:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; +1681:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; +1682:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; +1683:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; +1684:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; +1685:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; +1686:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); +1687:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); +1688:Src/main.c **** LL_USART_Enable(USART1); +1689:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ +1690:Src/main.c **** +1691:Src/main.c **** /* USER CODE END USART1_Init 2 */ +1692:Src/main.c **** +1693:Src/main.c **** } +1694:Src/main.c **** +1695:Src/main.c **** /** +1696:Src/main.c **** * Enable DMA controller clock +1697:Src/main.c **** */ +1698:Src/main.c **** static void MX_DMA_Init(void) +1699:Src/main.c **** { + 144 .loc 1 1699 1 is_stmt 1 view -0 145 .cfi_startproc 146 @ args = 0, pretend = 0, frame = 8 147 @ frame_needed = 0, uses_anonymous_args = 0 @@ -4137,14 +4138,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 152 0002 83B0 sub sp, sp, #12 153 .LCFI2: 154 .cfi_def_cfa_offset 16 -1699:Src/main.c **** - ARM GAS /tmp/ccWQNJQt.s page 70 + ARM GAS /tmp/ccO46DoU.s page 70 -1700:Src/main.c **** /* Init with LL driver */ -1701:Src/main.c **** /* DMA controller clock enable */ -1702:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); - 155 .loc 1 1702 3 view .LVU37 +1700:Src/main.c **** +1701:Src/main.c **** /* Init with LL driver */ +1702:Src/main.c **** /* DMA controller clock enable */ +1703:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); + 155 .loc 1 1703 3 view .LVU37 156 .LVL8: 157 .LBB294: 158 .LBI294: @@ -4197,10 +4198,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ + ARM GAS /tmp/ccO46DoU.s page 71 + + 49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccWQNJQt.s page 71 - - 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(RCC) 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL BUS @@ -4257,10 +4258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** + ARM GAS /tmp/ccO46DoU.s page 72 + + 106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} - ARM GAS /tmp/ccWQNJQt.s page 72 - - 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EC_AHB2_GRP1_PERIPH AHB2 GRP1 PERIPH @@ -4317,10 +4318,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX) 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPDIFRX RCC_APB1ENR_SPDIFRXEN + ARM GAS /tmp/ccO46DoU.s page 73 + + 163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SPDIFRX */ - ARM GAS /tmp/ccWQNJQt.s page 73 - - 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR_USART2EN 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART3 RCC_APB1ENR_USART3EN 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_UART4 RCC_APB1ENR_UART4EN @@ -4377,10 +4378,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6) 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SPI6 */ + ARM GAS /tmp/ccO46DoU.s page 74 + + 220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN - ARM GAS /tmp/ccWQNJQt.s page 74 - - 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(LTDC) 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_LTDC RCC_APB2ENR_LTDCEN @@ -4437,10 +4438,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_EnableClock\n + ARM GAS /tmp/ccO46DoU.s page 75 + + 277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_EnableClock\n - ARM GAS /tmp/ccWQNJQt.s page 75 - - 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_EnableClock\n 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_EnableClock\n 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIEN LL_AHB1_GRP1_EnableClock @@ -4497,16 +4498,16 @@ ARM GAS /tmp/ccWQNJQt.s page 1 175 0016 019B ldr r3, [sp, #4] 176 .LVL9: 177 .loc 3 315 3 is_stmt 0 view .LVU45 + ARM GAS /tmp/ccO46DoU.s page 76 + + 178 .LBE295: - ARM GAS /tmp/ccWQNJQt.s page 76 - - 179 .LBE294: -1703:Src/main.c **** -1704:Src/main.c **** /* DMA interrupt init */ -1705:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ -1706:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); - 180 .loc 1 1706 3 is_stmt 1 view .LVU46 +1704:Src/main.c **** +1705:Src/main.c **** /* DMA interrupt init */ +1706:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ +1707:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + 180 .loc 1 1707 3 is_stmt 1 view .LVU46 181 .LBB296: 182 .LBI296: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -4520,7 +4521,7 @@ ARM GAS /tmp/ccWQNJQt.s page 1 188 001a D868 ldr r0, [r3, #12] 189 .LBE297: 190 .LBE296: - 191 .loc 1 1706 3 discriminator 1 view .LVU50 + 191 .loc 1 1707 3 discriminator 1 view .LVU50 192 001c 0022 movs r2, #0 193 001e 1146 mov r1, r2 194 0020 C0F30220 ubfx r0, r0, #8, #3 @@ -4551,16 +4552,16 @@ ARM GAS /tmp/ccWQNJQt.s page 1 212 .loc 2 2028 47 view .LVU57 213 .LBE299: 214 .LBE298: -1707:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 215 .loc 1 1707 3 is_stmt 1 view .LVU58 +1708:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 215 .loc 1 1708 3 is_stmt 1 view .LVU58 216 .LBB300: 217 .LBI300: 1896:Drivers/CMSIS/Include/core_cm7.h **** { 218 .loc 2 1896 22 view .LVU59 + ARM GAS /tmp/ccO46DoU.s page 77 + + 219 .LBB301: - ARM GAS /tmp/ccWQNJQt.s page 77 - - 1898:Drivers/CMSIS/Include/core_cm7.h **** { 220 .loc 2 1898 3 view .LVU60 1900:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4574,9 +4575,9 @@ ARM GAS /tmp/ccWQNJQt.s page 1 226 .loc 2 1900 43 view .LVU63 227 .LBE301: 228 .LBE300: -1708:Src/main.c **** -1709:Src/main.c **** } - 229 .loc 1 1709 1 view .LVU64 +1709:Src/main.c **** +1710:Src/main.c **** } + 229 .loc 1 1710 1 view .LVU64 230 0036 03B0 add sp, sp, #12 231 .LCFI3: 232 .cfi_def_cfa_offset 4 @@ -4598,812 +4599,812 @@ ARM GAS /tmp/ccWQNJQt.s page 1 250 Decode_task: 251 .LVL14: 252 .LFB1209: -1710:Src/main.c **** -1711:Src/main.c **** /** -1712:Src/main.c **** * @brief GPIO Initialization Function -1713:Src/main.c **** * @param None -1714:Src/main.c **** * @retval None -1715:Src/main.c **** */ -1716:Src/main.c **** static void MX_GPIO_Init(void) -1717:Src/main.c **** { -1718:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; -1719:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ -1720:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ -1721:Src/main.c **** -1722:Src/main.c **** /* GPIO Ports Clock Enable */ -1723:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); -1724:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); -1725:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); -1726:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); -1727:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); -1728:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); -1729:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); - ARM GAS /tmp/ccWQNJQt.s page 78 +1711:Src/main.c **** +1712:Src/main.c **** /** +1713:Src/main.c **** * @brief GPIO Initialization Function +1714:Src/main.c **** * @param None +1715:Src/main.c **** * @retval None +1716:Src/main.c **** */ +1717:Src/main.c **** static void MX_GPIO_Init(void) +1718:Src/main.c **** { +1719:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; +1720:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ +1721:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ +1722:Src/main.c **** +1723:Src/main.c **** /* GPIO Ports Clock Enable */ +1724:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); +1725:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); +1726:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); +1727:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); +1728:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); +1729:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); + ARM GAS /tmp/ccO46DoU.s page 78 -1730:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); -1731:Src/main.c **** -1732:Src/main.c **** /*Configure GPIO pin Output Level */ -1733:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -1734:Src/main.c **** -1735:Src/main.c **** /*Configure GPIO pin Output Level */ -1736:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); -1737:Src/main.c **** -1738:Src/main.c **** /*Configure GPIO pin Output Level */ -1739:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); -1740:Src/main.c **** -1741:Src/main.c **** /*Configure GPIO pin Output Level */ -1742:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); -1743:Src/main.c **** -1744:Src/main.c **** /*Configure GPIO pin Output Level */ -1745:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -1746:Src/main.c **** -1747:Src/main.c **** /*Configure GPIO pin Output Level */ -1748:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); -1749:Src/main.c **** -1750:Src/main.c **** /*Configure GPIO pin Output Level */ -1751:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin -1752:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); -1753:Src/main.c **** -1754:Src/main.c **** /*Configure GPIO pin Output Level */ -1755:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -1756:Src/main.c **** -1757:Src/main.c **** /*Configure GPIO pin Output Level */ -1758:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); -1759:Src/main.c **** -1760:Src/main.c **** /*Configure GPIO pin Output Level */ -1761:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1762:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); -1763:Src/main.c **** -1764:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ -1765:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; -1766:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1767:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; -1768:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1769:Src/main.c **** -1770:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ -1771:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; -1772:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1773:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1774:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1775:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1776:Src/main.c **** -1777:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */ -1778:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin; -1779:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1780:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1781:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1782:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); -1783:Src/main.c **** -1784:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ -1785:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; -1786:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - ARM GAS /tmp/ccWQNJQt.s page 79 +1730:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); +1731:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); +1732:Src/main.c **** +1733:Src/main.c **** /*Configure GPIO pin Output Level */ +1734:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +1735:Src/main.c **** +1736:Src/main.c **** /*Configure GPIO pin Output Level */ +1737:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); +1738:Src/main.c **** +1739:Src/main.c **** /*Configure GPIO pin Output Level */ +1740:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); +1741:Src/main.c **** +1742:Src/main.c **** /*Configure GPIO pin Output Level */ +1743:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); +1744:Src/main.c **** +1745:Src/main.c **** /*Configure GPIO pin Output Level */ +1746:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +1747:Src/main.c **** +1748:Src/main.c **** /*Configure GPIO pin Output Level */ +1749:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +1750:Src/main.c **** +1751:Src/main.c **** /*Configure GPIO pin Output Level */ +1752:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin +1753:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); +1754:Src/main.c **** +1755:Src/main.c **** /*Configure GPIO pin Output Level */ +1756:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +1757:Src/main.c **** +1758:Src/main.c **** /*Configure GPIO pin Output Level */ +1759:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); +1760:Src/main.c **** +1761:Src/main.c **** /*Configure GPIO pin Output Level */ +1762:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin +1763:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); +1764:Src/main.c **** +1765:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ +1766:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; +1767:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1768:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; +1769:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1770:Src/main.c **** +1771:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ +1772:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; +1773:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1774:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1775:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1776:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1777:Src/main.c **** +1778:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */ +1779:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin; +1780:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1781:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1782:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1783:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); +1784:Src/main.c **** +1785:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ +1786:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; + ARM GAS /tmp/ccO46DoU.s page 79 -1787:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1788:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1789:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); -1790:Src/main.c **** -1791:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin -1792:Src/main.c **** DAC_LD2_CS_Pin */ -1793:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin -1794:Src/main.c **** |DAC_LD2_CS_Pin; -1795:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1796:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1797:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1798:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1799:Src/main.c **** -1800:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ -1801:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; -1802:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1803:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1804:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1805:Src/main.c **** -1806:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ -1807:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; -1808:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1809:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1810:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1811:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1812:Src/main.c **** -1813:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ -1814:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; -1815:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1816:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1817:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1818:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); -1819:Src/main.c **** -1820:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin -1821:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ -1822:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin -1823:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; -1824:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1825:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1826:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1827:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1828:Src/main.c **** -1829:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */ -1830:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7; -1831:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1832:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1833:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1834:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); -1835:Src/main.c **** -1836:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ -1837:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; -1838:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1839:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1840:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); -1841:Src/main.c **** -1842:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ -1843:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; - ARM GAS /tmp/ccWQNJQt.s page 80 +1787:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1788:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1789:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +1790:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); +1791:Src/main.c **** +1792:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin +1793:Src/main.c **** DAC_LD2_CS_Pin */ +1794:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin +1795:Src/main.c **** |DAC_LD2_CS_Pin; +1796:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1797:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1798:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1799:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1800:Src/main.c **** +1801:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ +1802:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; +1803:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1804:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1805:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1806:Src/main.c **** +1807:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ +1808:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; +1809:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1810:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1811:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1812:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1813:Src/main.c **** +1814:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ +1815:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; +1816:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1817:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1818:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +1819:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); +1820:Src/main.c **** +1821:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin +1822:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ +1823:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin +1824:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; +1825:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1826:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1827:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1828:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1829:Src/main.c **** +1830:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */ +1831:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7; +1832:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1833:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1834:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1835:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); +1836:Src/main.c **** +1837:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ +1838:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; +1839:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1840:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1841:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); +1842:Src/main.c **** +1843:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ + ARM GAS /tmp/ccO46DoU.s page 80 -1844:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1845:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1846:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); -1847:Src/main.c **** -1848:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin -1849:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ -1850:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1851:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; -1852:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1853:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1854:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1855:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); -1856:Src/main.c **** -1857:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ -1858:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ -1859:Src/main.c **** } -1860:Src/main.c **** -1861:Src/main.c **** /* USER CODE BEGIN 4 */ -1862:Src/main.c **** -1863:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { -1864:Src/main.c **** -1865:Src/main.c **** // UART_transmission_request = NO_MESS; -1866:Src/main.c **** -1867:Src/main.c **** //} -1868:Src/main.c **** -1869:Src/main.c **** static void Init_params(void) -1870:Src/main.c **** { -1871:Src/main.c **** TO6 = 0; -1872:Src/main.c **** TO7 = 0; -1873:Src/main.c **** TO7_before = 0; -1874:Src/main.c **** TO6_before = 0; -1875:Src/main.c **** TO6_uart = 0; -1876:Src/main.c **** flg_tmt = 0; -1877:Src/main.c **** UART_rec_incr = 0; -1878:Src/main.c **** fgoto = 0; -1879:Src/main.c **** sizeoffile = 0; -1880:Src/main.c **** u_tx_flg = 0; -1881:Src/main.c **** u_rx_flg = 0; -1882:Src/main.c **** //State_Data[0]=0; -1883:Src/main.c **** //State_Data[1]=0;//All OK! -1884:Src/main.c **** for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01; -2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; -2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; -2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; -2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; -2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; -2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; -2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; -2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; -2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; -2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; -2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; -2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; -2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; -2049:Src/main.c **** -2050:Src/main.c **** temp2++; -2051:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2052:Src/main.c **** temp2++; -2053:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2054:Src/main.c **** temp2++; +2015:Src/main.c **** +2016:Src/main.c **** //------------------------------------------------------------------------------------------------ +2017:Src/main.c **** +2018:Src/main.c **** +2019:Src/main.c **** test=0; +2020:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& +2021:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u +2022:Src/main.c **** { +2023:Src/main.c **** test = Mount_SD("/"); +2024:Src/main.c **** if (test == 0) //0 - suc +2025:Src/main.c **** { +2026:Src/main.c **** //Format_SD(); +2027:Src/main.c **** test = Remove_File ("COMMAND.TXT"); +2028:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ +2029:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2030:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2031:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2032:Src/main.c **** } +2033:Src/main.c **** } +2034:Src/main.c **** +2035:Src/main.c **** temp2 = (uint16_t *)Command; +2036:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; +2037:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; +2038:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; +2039:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; +2040:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; +2041:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; +2042:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; +2043:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; +2044:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; +2045:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; +2046:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; +2047:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; +2048:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; +2049:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; +2050:Src/main.c **** +2051:Src/main.c **** temp2++; +2052:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2053:Src/main.c **** temp2++; +2054:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); 2055:Src/main.c **** temp2++; 2056:Src/main.c **** temp2++; -2057:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); -2058:Src/main.c **** temp2++; -2059:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2060:Src/main.c **** temp2++; -2061:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2062:Src/main.c **** temp2++; -2063:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2064:Src/main.c **** temp2++; -2065:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2066:Src/main.c **** temp2++; -2067:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID -2068:Src/main.c **** temp2++; -2069:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); -2070:Src/main.c **** temp2++; -2071:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); - ARM GAS /tmp/ccWQNJQt.s page 84 +2057:Src/main.c **** temp2++; +2058:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); +2059:Src/main.c **** temp2++; +2060:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2061:Src/main.c **** temp2++; +2062:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2063:Src/main.c **** temp2++; +2064:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2065:Src/main.c **** temp2++; +2066:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2067:Src/main.c **** temp2++; +2068:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID +2069:Src/main.c **** temp2++; +2070:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); +2071:Src/main.c **** temp2++; + ARM GAS /tmp/ccO46DoU.s page 84 -2072:Src/main.c **** temp2++; -2073:Src/main.c **** -2074:Src/main.c **** if (Curr_setup->U5V1_EN) -2075:Src/main.c **** { -2076:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); -2077:Src/main.c **** } -2078:Src/main.c **** else -2079:Src/main.c **** { -2080:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); -2081:Src/main.c **** } -2082:Src/main.c **** -2083:Src/main.c **** if (Curr_setup->U5V2_EN) -2084:Src/main.c **** { -2085:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); -2086:Src/main.c **** } -2087:Src/main.c **** else -2088:Src/main.c **** { -2089:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); -2090:Src/main.c **** } -2091:Src/main.c **** -2092:Src/main.c **** if (Curr_setup->LD1_EN) -2093:Src/main.c **** { -2094:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); -2095:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC -2096:Src/main.c **** } -2097:Src/main.c **** else -2098:Src/main.c **** { -2099:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); -2100:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC -2101:Src/main.c **** } -2102:Src/main.c **** -2103:Src/main.c **** if (Curr_setup->LD2_EN) -2104:Src/main.c **** { -2105:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); -2106:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC -2107:Src/main.c **** } -2108:Src/main.c **** else -2109:Src/main.c **** { -2110:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); -2111:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC -2112:Src/main.c **** } -2113:Src/main.c **** -2114:Src/main.c **** if (Curr_setup->REF1_EN) -2115:Src/main.c **** { -2116:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); -2117:Src/main.c **** } -2118:Src/main.c **** else -2119:Src/main.c **** { -2120:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); -2121:Src/main.c **** } -2122:Src/main.c **** -2123:Src/main.c **** if (Curr_setup->REF2_EN) -2124:Src/main.c **** { -2125:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); -2126:Src/main.c **** } -2127:Src/main.c **** else -2128:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 85 +2072:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); +2073:Src/main.c **** temp2++; +2074:Src/main.c **** +2075:Src/main.c **** if (Curr_setup->U5V1_EN) +2076:Src/main.c **** { +2077:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); +2078:Src/main.c **** } +2079:Src/main.c **** else +2080:Src/main.c **** { +2081:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2082:Src/main.c **** } +2083:Src/main.c **** +2084:Src/main.c **** if (Curr_setup->U5V2_EN) +2085:Src/main.c **** { +2086:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); +2087:Src/main.c **** } +2088:Src/main.c **** else +2089:Src/main.c **** { +2090:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2091:Src/main.c **** } +2092:Src/main.c **** +2093:Src/main.c **** if (Curr_setup->LD1_EN) +2094:Src/main.c **** { +2095:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); +2096:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2097:Src/main.c **** } +2098:Src/main.c **** else +2099:Src/main.c **** { +2100:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2101:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC +2102:Src/main.c **** } +2103:Src/main.c **** +2104:Src/main.c **** if (Curr_setup->LD2_EN) +2105:Src/main.c **** { +2106:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); +2107:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC +2108:Src/main.c **** } +2109:Src/main.c **** else +2110:Src/main.c **** { +2111:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2112:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC +2113:Src/main.c **** } +2114:Src/main.c **** +2115:Src/main.c **** if (Curr_setup->REF1_EN) +2116:Src/main.c **** { +2117:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); +2118:Src/main.c **** } +2119:Src/main.c **** else +2120:Src/main.c **** { +2121:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2122:Src/main.c **** } +2123:Src/main.c **** +2124:Src/main.c **** if (Curr_setup->REF2_EN) +2125:Src/main.c **** { +2126:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2127:Src/main.c **** } +2128:Src/main.c **** else + ARM GAS /tmp/ccO46DoU.s page 85 -2129:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); -2130:Src/main.c **** } -2131:Src/main.c **** -2132:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) -2133:Src/main.c **** { -2134:Src/main.c **** Set_LTEC(3,32767); +2129:Src/main.c **** { +2130:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2131:Src/main.c **** } +2132:Src/main.c **** +2133:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) +2134:Src/main.c **** { 2135:Src/main.c **** Set_LTEC(3,32767); -2136:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); -2137:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); -2138:Src/main.c **** } -2139:Src/main.c **** else -2140:Src/main.c **** { -2141:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); -2142:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); -2143:Src/main.c **** } -2144:Src/main.c **** -2145:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) -2146:Src/main.c **** { -2147:Src/main.c **** Set_LTEC(4,32767); +2136:Src/main.c **** Set_LTEC(3,32767); +2137:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); +2138:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); +2139:Src/main.c **** } +2140:Src/main.c **** else +2141:Src/main.c **** { +2142:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2143:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2144:Src/main.c **** } +2145:Src/main.c **** +2146:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) +2147:Src/main.c **** { 2148:Src/main.c **** Set_LTEC(4,32767); -2149:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); -2150:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); -2151:Src/main.c **** } -2152:Src/main.c **** else -2153:Src/main.c **** { -2154:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); -2155:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); -2156:Src/main.c **** } -2157:Src/main.c **** -2158:Src/main.c **** if (Curr_setup->PI1_RD==0) -2159:Src/main.c **** { -2160:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; -2161:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; -2162:Src/main.c **** } -2163:Src/main.c **** -2164:Src/main.c **** if (Curr_setup->PI2_RD==0) -2165:Src/main.c **** { -2166:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; -2167:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; -2168:Src/main.c **** } -2169:Src/main.c **** } -2170:Src/main.c **** -2171:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ -2172:Src/main.c **** { - 253 .loc 1 2172 1 is_stmt 1 view -0 +2149:Src/main.c **** Set_LTEC(4,32767); +2150:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); +2151:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); +2152:Src/main.c **** } +2153:Src/main.c **** else +2154:Src/main.c **** { +2155:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2156:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2157:Src/main.c **** } +2158:Src/main.c **** +2159:Src/main.c **** if (Curr_setup->PI1_RD==0) +2160:Src/main.c **** { +2161:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; +2162:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2163:Src/main.c **** } +2164:Src/main.c **** +2165:Src/main.c **** if (Curr_setup->PI2_RD==0) +2166:Src/main.c **** { +2167:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; +2168:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; +2169:Src/main.c **** } +2170:Src/main.c **** } +2171:Src/main.c **** +2172:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2173:Src/main.c **** { + 253 .loc 1 2173 1 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 8 256 @ frame_needed = 0, uses_anonymous_args = 0 257 @ link register save eliminated. - 258 .loc 1 2172 1 is_stmt 0 view .LVU66 + 258 .loc 1 2173 1 is_stmt 0 view .LVU66 259 0000 82B0 sub sp, sp, #8 260 .LCFI4: 261 .cfi_def_cfa_offset 8 -2173:Src/main.c **** uint16_t *temp2; - 262 .loc 1 2173 2 is_stmt 1 view .LVU67 -2174:Src/main.c **** -2175:Src/main.c **** temp2 = (uint16_t *)Command; - ARM GAS /tmp/ccWQNJQt.s page 86 +2174:Src/main.c **** uint16_t *temp2; + 262 .loc 1 2174 2 is_stmt 1 view .LVU67 +2175:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 86 - 263 .loc 1 2175 2 view .LVU68 +2176:Src/main.c **** temp2 = (uint16_t *)Command; + 263 .loc 1 2176 2 view .LVU68 264 .LVL15: -2176:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 265 .loc 1 2176 2 view .LVU69 - 266 .loc 1 2176 36 is_stmt 0 view .LVU70 +2177:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 265 .loc 1 2177 2 view .LVU69 + 266 .loc 1 2177 36 is_stmt 0 view .LVU70 267 0002 0288 ldrh r2, [r0] 268 .LVL16: - 269 .loc 1 2176 48 view .LVU71 + 269 .loc 1 2177 48 view .LVU71 270 0004 02F00102 and r2, r2, #1 - 271 .loc 1 2176 22 view .LVU72 + 271 .loc 1 2177 22 view .LVU72 272 0008 1A70 strb r2, [r3] -2177:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 273 .loc 1 2177 2 is_stmt 1 view .LVU73 - 274 .loc 1 2177 36 is_stmt 0 view .LVU74 +2178:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 273 .loc 1 2178 2 is_stmt 1 view .LVU73 + 274 .loc 1 2178 36 is_stmt 0 view .LVU74 275 000a 0288 ldrh r2, [r0] - 276 .loc 1 2177 48 view .LVU75 + 276 .loc 1 2178 48 view .LVU75 277 000c C2F34002 ubfx r2, r2, #1, #1 - 278 .loc 1 2177 22 view .LVU76 + 278 .loc 1 2178 22 view .LVU76 279 0010 5A70 strb r2, [r3, #1] -2178:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 280 .loc 1 2178 2 is_stmt 1 view .LVU77 - 281 .loc 1 2178 36 is_stmt 0 view .LVU78 +2179:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 280 .loc 1 2179 2 is_stmt 1 view .LVU77 + 281 .loc 1 2179 36 is_stmt 0 view .LVU78 282 0012 0288 ldrh r2, [r0] - 283 .loc 1 2178 48 view .LVU79 + 283 .loc 1 2179 48 view .LVU79 284 0014 C2F38002 ubfx r2, r2, #2, #1 - 285 .loc 1 2178 22 view .LVU80 + 285 .loc 1 2179 22 view .LVU80 286 0018 9A70 strb r2, [r3, #2] -2179:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 287 .loc 1 2179 2 is_stmt 1 view .LVU81 - 288 .loc 1 2179 35 is_stmt 0 view .LVU82 +2180:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 287 .loc 1 2180 2 is_stmt 1 view .LVU81 + 288 .loc 1 2180 35 is_stmt 0 view .LVU82 289 001a 0288 ldrh r2, [r0] - 290 .loc 1 2179 47 view .LVU83 + 290 .loc 1 2180 47 view .LVU83 291 001c C2F3C002 ubfx r2, r2, #3, #1 - 292 .loc 1 2179 21 view .LVU84 + 292 .loc 1 2180 21 view .LVU84 293 0020 DA70 strb r2, [r3, #3] -2180:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 294 .loc 1 2180 2 is_stmt 1 view .LVU85 - 295 .loc 1 2180 35 is_stmt 0 view .LVU86 +2181:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 294 .loc 1 2181 2 is_stmt 1 view .LVU85 + 295 .loc 1 2181 35 is_stmt 0 view .LVU86 296 0022 0288 ldrh r2, [r0] - 297 .loc 1 2180 47 view .LVU87 + 297 .loc 1 2181 47 view .LVU87 298 0024 C2F30012 ubfx r2, r2, #4, #1 - 299 .loc 1 2180 21 view .LVU88 + 299 .loc 1 2181 21 view .LVU88 300 0028 1A71 strb r2, [r3, #4] -2181:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 301 .loc 1 2181 2 is_stmt 1 view .LVU89 - 302 .loc 1 2181 36 is_stmt 0 view .LVU90 +2182:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 301 .loc 1 2182 2 is_stmt 1 view .LVU89 + 302 .loc 1 2182 36 is_stmt 0 view .LVU90 303 002a 0288 ldrh r2, [r0] - 304 .loc 1 2181 48 view .LVU91 + 304 .loc 1 2182 48 view .LVU91 305 002c C2F34012 ubfx r2, r2, #5, #1 - 306 .loc 1 2181 22 view .LVU92 + 306 .loc 1 2182 22 view .LVU92 307 0030 5A71 strb r2, [r3, #5] -2182:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 308 .loc 1 2182 2 is_stmt 1 view .LVU93 - 309 .loc 1 2182 36 is_stmt 0 view .LVU94 +2183:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 308 .loc 1 2183 2 is_stmt 1 view .LVU93 + 309 .loc 1 2183 36 is_stmt 0 view .LVU94 310 0032 0288 ldrh r2, [r0] - 311 .loc 1 2182 48 view .LVU95 + 311 .loc 1 2183 48 view .LVU95 + ARM GAS /tmp/ccO46DoU.s page 87 + + 312 0034 C2F38012 ubfx r2, r2, #6, #1 - ARM GAS /tmp/ccWQNJQt.s page 87 - - - 313 .loc 1 2182 22 view .LVU96 + 313 .loc 1 2183 22 view .LVU96 314 0038 9A71 strb r2, [r3, #6] -2183:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 315 .loc 1 2183 2 is_stmt 1 view .LVU97 - 316 .loc 1 2183 36 is_stmt 0 view .LVU98 +2184:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 315 .loc 1 2184 2 is_stmt 1 view .LVU97 + 316 .loc 1 2184 36 is_stmt 0 view .LVU98 317 003a 0288 ldrh r2, [r0] - 318 .loc 1 2183 48 view .LVU99 + 318 .loc 1 2184 48 view .LVU99 319 003c C2F3C012 ubfx r2, r2, #7, #1 - 320 .loc 1 2183 22 view .LVU100 + 320 .loc 1 2184 22 view .LVU100 321 0040 DA71 strb r2, [r3, #7] -2184:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 322 .loc 1 2184 2 is_stmt 1 view .LVU101 - 323 .loc 1 2184 36 is_stmt 0 view .LVU102 +2185:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 322 .loc 1 2185 2 is_stmt 1 view .LVU101 + 323 .loc 1 2185 36 is_stmt 0 view .LVU102 324 0042 0288 ldrh r2, [r0] - 325 .loc 1 2184 48 view .LVU103 + 325 .loc 1 2185 48 view .LVU103 326 0044 C2F30022 ubfx r2, r2, #8, #1 - 327 .loc 1 2184 22 view .LVU104 + 327 .loc 1 2185 22 view .LVU104 328 0048 1A72 strb r2, [r3, #8] -2185:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 329 .loc 1 2185 2 is_stmt 1 view .LVU105 - 330 .loc 1 2185 35 is_stmt 0 view .LVU106 +2186:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 329 .loc 1 2186 2 is_stmt 1 view .LVU105 + 330 .loc 1 2186 35 is_stmt 0 view .LVU106 331 004a 0288 ldrh r2, [r0] - 332 .loc 1 2185 47 view .LVU107 + 332 .loc 1 2186 47 view .LVU107 333 004c C2F34022 ubfx r2, r2, #9, #1 - 334 .loc 1 2185 21 view .LVU108 + 334 .loc 1 2186 21 view .LVU108 335 0050 5A72 strb r2, [r3, #9] -2186:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 336 .loc 1 2186 2 is_stmt 1 view .LVU109 - 337 .loc 1 2186 35 is_stmt 0 view .LVU110 +2187:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 336 .loc 1 2187 2 is_stmt 1 view .LVU109 + 337 .loc 1 2187 35 is_stmt 0 view .LVU110 338 0052 0288 ldrh r2, [r0] - 339 .loc 1 2186 48 view .LVU111 + 339 .loc 1 2187 48 view .LVU111 340 0054 C2F38022 ubfx r2, r2, #10, #1 - 341 .loc 1 2186 21 view .LVU112 + 341 .loc 1 2187 21 view .LVU112 342 0058 9A72 strb r2, [r3, #10] -2187:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 343 .loc 1 2187 2 is_stmt 1 view .LVU113 - 344 .loc 1 2187 34 is_stmt 0 view .LVU114 +2188:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 343 .loc 1 2188 2 is_stmt 1 view .LVU113 + 344 .loc 1 2188 34 is_stmt 0 view .LVU114 345 005a 0288 ldrh r2, [r0] - 346 .loc 1 2187 47 view .LVU115 + 346 .loc 1 2188 47 view .LVU115 347 005c C2F3C022 ubfx r2, r2, #11, #1 - 348 .loc 1 2187 20 view .LVU116 + 348 .loc 1 2188 20 view .LVU116 349 0060 DA72 strb r2, [r3, #11] -2188:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 350 .loc 1 2188 2 is_stmt 1 view .LVU117 - 351 .loc 1 2188 35 is_stmt 0 view .LVU118 +2189:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 350 .loc 1 2189 2 is_stmt 1 view .LVU117 + 351 .loc 1 2189 35 is_stmt 0 view .LVU118 352 0062 0288 ldrh r2, [r0] - 353 .loc 1 2188 48 view .LVU119 + 353 .loc 1 2189 48 view .LVU119 354 0064 C2F30032 ubfx r2, r2, #12, #1 - 355 .loc 1 2188 21 view .LVU120 + 355 .loc 1 2189 21 view .LVU120 356 0068 1A73 strb r2, [r3, #12] -2189:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 357 .loc 1 2189 2 is_stmt 1 view .LVU121 - 358 .loc 1 2189 35 is_stmt 0 view .LVU122 +2190:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 357 .loc 1 2190 2 is_stmt 1 view .LVU121 + 358 .loc 1 2190 35 is_stmt 0 view .LVU122 359 006a 0288 ldrh r2, [r0] - 360 .loc 1 2189 48 view .LVU123 + 360 .loc 1 2190 48 view .LVU123 361 006c C2F34032 ubfx r2, r2, #13, #1 - 362 .loc 1 2189 21 view .LVU124 - ARM GAS /tmp/ccWQNJQt.s page 88 + ARM GAS /tmp/ccO46DoU.s page 88 + 362 .loc 1 2190 21 view .LVU124 363 0070 5A73 strb r2, [r3, #13] -2190:Src/main.c **** -2191:Src/main.c **** temp2++; - 364 .loc 1 2191 2 is_stmt 1 view .LVU125 +2191:Src/main.c **** +2192:Src/main.c **** temp2++; + 364 .loc 1 2192 2 is_stmt 1 view .LVU125 365 .LVL17: -2192:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; - 366 .loc 1 2192 2 view .LVU126 - 367 .loc 1 2192 21 is_stmt 0 view .LVU127 +2193:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; + 366 .loc 1 2193 2 view .LVU126 + 367 .loc 1 2193 21 is_stmt 0 view .LVU127 368 0072 8278 ldrb r2, [r0, #2] @ zero_extendqisi2 - 369 .loc 1 2192 19 view .LVU128 + 369 .loc 1 2193 19 view .LVU128 370 0074 384B ldr r3, .L14+8 371 .LVL18: - 372 .loc 1 2192 19 view .LVU129 + 372 .loc 1 2193 19 view .LVU129 373 0076 1A70 strb r2, [r3] - 374 .loc 1 2192 40 is_stmt 1 view .LVU130 + 374 .loc 1 2193 40 is_stmt 1 view .LVU130 375 .LVL19: -2193:Src/main.c **** task.min_param = (float)(*temp2); temp2++; - 376 .loc 1 2193 2 view .LVU131 - 377 .loc 1 2193 29 is_stmt 0 view .LVU132 +2194:Src/main.c **** task.min_param = (float)(*temp2); temp2++; + 376 .loc 1 2194 2 view .LVU131 + 377 .loc 1 2194 29 is_stmt 0 view .LVU132 378 0078 8288 ldrh r2, [r0, #4] 379 007a 07EE902A vmov s15, r2 @ int - 380 .loc 1 2193 21 view .LVU133 + 380 .loc 1 2194 21 view .LVU133 381 007e F8EE677A vcvt.f32.u32 s15, s15 - 382 .loc 1 2193 19 view .LVU134 + 382 .loc 1 2194 19 view .LVU134 383 0082 C3ED017A vstr.32 s15, [r3, #4] - 384 .loc 1 2193 38 is_stmt 1 view .LVU135 + 384 .loc 1 2194 38 is_stmt 1 view .LVU135 385 .LVL20: -2194:Src/main.c **** task.max_param = (float)(*temp2); temp2++; - 386 .loc 1 2194 2 view .LVU136 - 387 .loc 1 2194 29 is_stmt 0 view .LVU137 +2195:Src/main.c **** task.max_param = (float)(*temp2); temp2++; + 386 .loc 1 2195 2 view .LVU136 + 387 .loc 1 2195 29 is_stmt 0 view .LVU137 388 0086 C288 ldrh r2, [r0, #6] 389 0088 07EE902A vmov s15, r2 @ int - 390 .loc 1 2194 21 view .LVU138 + 390 .loc 1 2195 21 view .LVU138 391 008c F8EE677A vcvt.f32.u32 s15, s15 - 392 .loc 1 2194 19 view .LVU139 + 392 .loc 1 2195 19 view .LVU139 393 0090 C3ED027A vstr.32 s15, [r3, #8] - 394 .loc 1 2194 38 is_stmt 1 view .LVU140 + 394 .loc 1 2195 38 is_stmt 1 view .LVU140 395 .LVL21: -2195:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; - 396 .loc 1 2195 2 view .LVU141 - 397 .loc 1 2195 29 is_stmt 0 view .LVU142 +2196:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; + 396 .loc 1 2196 2 view .LVU141 + 397 .loc 1 2196 29 is_stmt 0 view .LVU142 398 0094 0289 ldrh r2, [r0, #8] 399 0096 07EE902A vmov s15, r2 @ int - 400 .loc 1 2195 21 view .LVU143 + 400 .loc 1 2196 21 view .LVU143 401 009a F8EE677A vcvt.f32.u32 s15, s15 - 402 .loc 1 2195 19 view .LVU144 + 402 .loc 1 2196 19 view .LVU144 403 009e C3ED037A vstr.32 s15, [r3, #12] - 404 .loc 1 2195 38 is_stmt 1 view .LVU145 + 404 .loc 1 2196 38 is_stmt 1 view .LVU145 405 .LVL22: -2196:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; - 406 .loc 1 2196 2 view .LVU146 - 407 .loc 1 2196 29 is_stmt 0 view .LVU147 +2197:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; + 406 .loc 1 2197 2 view .LVU146 + 407 .loc 1 2197 29 is_stmt 0 view .LVU147 408 00a2 4289 ldrh r2, [r0, #10] 409 00a4 07EE102A vmov s14, r2 @ int - 410 .loc 1 2196 21 view .LVU148 + 410 .loc 1 2197 21 view .LVU148 411 00a8 B8EE477B vcvt.f64.u32 d7, s14 - 412 .loc 1 2196 37 view .LVU149 - ARM GAS /tmp/ccWQNJQt.s page 89 + ARM GAS /tmp/ccO46DoU.s page 89 + 412 .loc 1 2197 37 view .LVU149 413 00ac 9FED285B vldr.64 d5, .L14 414 00b0 87EE056B vdiv.f64 d6, d7, d5 - 415 .loc 1 2196 19 view .LVU150 + 415 .loc 1 2197 19 view .LVU150 416 00b4 FCEEC67B vcvt.u32.f64 s15, d6 417 00b8 CDED017A vstr.32 s15, [sp, #4] @ int 418 00bc 9DF80420 ldrb r2, [sp, #4] @ zero_extendqisi2 419 00c0 1A75 strb r2, [r3, #20] - 420 .loc 1 2196 46 is_stmt 1 view .LVU151 + 420 .loc 1 2197 46 is_stmt 1 view .LVU151 421 .LVL23: -2197:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; - 422 .loc 1 2197 2 view .LVU152 - 423 .loc 1 2197 29 is_stmt 0 view .LVU153 +2198:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; + 422 .loc 1 2198 2 view .LVU152 + 423 .loc 1 2198 29 is_stmt 0 view .LVU153 424 00c2 8189 ldrh r1, [r0, #12] 425 .LVL24: - 426 .loc 1 2197 29 view .LVU154 + 426 .loc 1 2198 29 view .LVU154 427 00c4 07EE901A vmov s15, r1 @ int - 428 .loc 1 2197 21 view .LVU155 + 428 .loc 1 2198 21 view .LVU155 429 00c8 F8EE677A vcvt.f32.u32 s15, s15 - 430 .loc 1 2197 19 view .LVU156 + 430 .loc 1 2198 19 view .LVU156 431 00cc C3ED067A vstr.32 s15, [r3, #24] - 432 .loc 1 2197 38 is_stmt 1 view .LVU157 + 432 .loc 1 2198 38 is_stmt 1 view .LVU157 433 .LVL25: -2198:Src/main.c **** task.curr = (float)(*temp2); temp2++; - 434 .loc 1 2198 2 view .LVU158 - 435 .loc 1 2198 29 is_stmt 0 view .LVU159 +2199:Src/main.c **** task.curr = (float)(*temp2); temp2++; + 434 .loc 1 2199 2 view .LVU158 + 435 .loc 1 2199 29 is_stmt 0 view .LVU159 436 00d0 C189 ldrh r1, [r0, #14] 437 00d2 07EE901A vmov s15, r1 @ int - 438 .loc 1 2198 21 view .LVU160 + 438 .loc 1 2199 21 view .LVU160 439 00d6 F8EE677A vcvt.f32.u32 s15, s15 - 440 .loc 1 2198 19 view .LVU161 + 440 .loc 1 2199 19 view .LVU161 441 00da C3ED077A vstr.32 s15, [r3, #28] - 442 .loc 1 2198 38 is_stmt 1 view .LVU162 + 442 .loc 1 2199 38 is_stmt 1 view .LVU162 443 .LVL26: -2199:Src/main.c **** task.temp = (float)(*temp2); temp2++; - 444 .loc 1 2199 2 view .LVU163 - 445 .loc 1 2199 29 is_stmt 0 view .LVU164 +2200:Src/main.c **** task.temp = (float)(*temp2); temp2++; + 444 .loc 1 2200 2 view .LVU163 + 445 .loc 1 2200 29 is_stmt 0 view .LVU164 446 00de 018A ldrh r1, [r0, #16] 447 00e0 07EE901A vmov s15, r1 @ int - 448 .loc 1 2199 21 view .LVU165 + 448 .loc 1 2200 21 view .LVU165 449 00e4 F8EE677A vcvt.f32.u32 s15, s15 - 450 .loc 1 2199 19 view .LVU166 + 450 .loc 1 2200 19 view .LVU166 451 00e8 C3ED087A vstr.32 s15, [r3, #32] - 452 .loc 1 2199 38 is_stmt 1 view .LVU167 + 452 .loc 1 2200 38 is_stmt 1 view .LVU167 453 .LVL27: -2200:Src/main.c **** task.tau = (float)(*temp2); temp2++; - 454 .loc 1 2200 2 view .LVU168 - 455 .loc 1 2200 29 is_stmt 0 view .LVU169 +2201:Src/main.c **** task.tau = (float)(*temp2); temp2++; + 454 .loc 1 2201 2 view .LVU168 + 455 .loc 1 2201 29 is_stmt 0 view .LVU169 456 00ec 418A ldrh r1, [r0, #18] - 457 .loc 1 2200 19 view .LVU170 + 457 .loc 1 2201 19 view .LVU170 458 00ee D982 strh r1, [r3, #22] @ movhi - 459 .loc 1 2200 38 is_stmt 1 view .LVU171 + 459 .loc 1 2201 38 is_stmt 1 view .LVU171 460 .LVL28: -2201:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; - 461 .loc 1 2201 2 view .LVU172 - 462 .loc 1 2201 29 is_stmt 0 view .LVU173 +2202:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; + 461 .loc 1 2202 2 view .LVU172 + 462 .loc 1 2202 29 is_stmt 0 view .LVU173 463 00f0 818A ldrh r1, [r0, #20] + ARM GAS /tmp/ccO46DoU.s page 90 + + 464 00f2 07EE901A vmov s15, r1 @ int - ARM GAS /tmp/ccWQNJQt.s page 90 - - - 465 .loc 1 2201 21 view .LVU174 + 465 .loc 1 2202 21 view .LVU174 466 00f6 F8EE677A vcvt.f32.u32 s15, s15 - 467 .loc 1 2201 37 view .LVU175 + 467 .loc 1 2202 37 view .LVU175 468 00fa 9FED187A vldr.32 s14, .L14+12 469 00fe 67EE877A vmul.f32 s15, s15, s14 - 470 .loc 1 2201 19 view .LVU176 + 470 .loc 1 2202 19 view .LVU176 471 0102 C3ED0A7A vstr.32 s15, [r3, #40] - 472 .loc 1 2201 46 is_stmt 1 view .LVU177 + 472 .loc 1 2202 46 is_stmt 1 view .LVU177 473 .LVL29: -2202:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; - 474 .loc 1 2202 2 view .LVU178 - 475 .loc 1 2202 29 is_stmt 0 view .LVU179 +2203:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; + 474 .loc 1 2203 2 view .LVU178 + 475 .loc 1 2203 29 is_stmt 0 view .LVU179 476 0106 C18A ldrh r1, [r0, #22] 477 0108 07EE901A vmov s15, r1 @ int - 478 .loc 1 2202 21 view .LVU180 + 478 .loc 1 2203 21 view .LVU180 479 010c F8EE677A vcvt.f32.u32 s15, s15 - 480 .loc 1 2202 37 view .LVU181 + 480 .loc 1 2203 37 view .LVU181 481 0110 67EE877A vmul.f32 s15, s15, s14 - 482 .loc 1 2202 19 view .LVU182 + 482 .loc 1 2203 19 view .LVU182 483 0114 C3ED097A vstr.32 s15, [r3, #36] - 484 .loc 1 2202 46 is_stmt 1 view .LVU183 + 484 .loc 1 2203 46 is_stmt 1 view .LVU183 485 .LVL30: -2203:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; - 486 .loc 1 2203 2 view .LVU184 - 487 .loc 1 2203 29 is_stmt 0 view .LVU185 +2204:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; + 486 .loc 1 2204 2 view .LVU184 + 487 .loc 1 2204 29 is_stmt 0 view .LVU185 488 0118 018B ldrh r1, [r0, #24] 489 011a 07EE901A vmov s15, r1 @ int - 490 .loc 1 2203 21 view .LVU186 + 490 .loc 1 2204 21 view .LVU186 491 011e F8EE677A vcvt.f32.u32 s15, s15 - 492 .loc 1 2203 37 view .LVU187 + 492 .loc 1 2204 37 view .LVU187 493 0122 67EE877A vmul.f32 s15, s15, s14 - 494 .loc 1 2203 19 view .LVU188 + 494 .loc 1 2204 19 view .LVU188 495 0126 C3ED0C7A vstr.32 s15, [r3, #48] - 496 .loc 1 2203 46 is_stmt 1 view .LVU189 + 496 .loc 1 2204 46 is_stmt 1 view .LVU189 497 .LVL31: -2204:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; - 498 .loc 1 2204 2 view .LVU190 - 499 .loc 1 2204 29 is_stmt 0 view .LVU191 +2205:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; + 498 .loc 1 2205 2 view .LVU190 + 499 .loc 1 2205 29 is_stmt 0 view .LVU191 500 012a 418B ldrh r1, [r0, #26] 501 012c 07EE901A vmov s15, r1 @ int - 502 .loc 1 2204 21 view .LVU192 + 502 .loc 1 2205 21 view .LVU192 503 0130 F8EE677A vcvt.f32.u32 s15, s15 - 504 .loc 1 2204 37 view .LVU193 + 504 .loc 1 2205 37 view .LVU193 505 0134 67EE877A vmul.f32 s15, s15, s14 - 506 .loc 1 2204 19 view .LVU194 + 506 .loc 1 2205 19 view .LVU194 507 0138 C3ED0B7A vstr.32 s15, [r3, #44] - 508 .loc 1 2204 46 is_stmt 1 view .LVU195 + 508 .loc 1 2205 46 is_stmt 1 view .LVU195 509 .LVL32: -2205:Src/main.c **** -2206:Src/main.c **** TO10_counter = task.dt / 10; - 510 .loc 1 2206 2 view .LVU196 - 511 .loc 1 2206 25 is_stmt 0 view .LVU197 +2206:Src/main.c **** +2207:Src/main.c **** TO10_counter = task.dt / 10; + 510 .loc 1 2207 2 view .LVU196 + 511 .loc 1 2207 25 is_stmt 0 view .LVU197 512 013c 084B ldr r3, .L14+16 513 013e A3FB0232 umull r3, r2, r3, r2 514 0142 D208 lsrs r2, r2, #3 - 515 .loc 1 2206 15 view .LVU198 + 515 .loc 1 2207 15 view .LVU198 + ARM GAS /tmp/ccO46DoU.s page 91 + + 516 0144 074B ldr r3, .L14+20 - ARM GAS /tmp/ccWQNJQt.s page 91 - - 517 0146 1A60 str r2, [r3] -2207:Src/main.c **** } - 518 .loc 1 2207 1 view .LVU199 +2208:Src/main.c **** } + 518 .loc 1 2208 1 view .LVU199 519 0148 02B0 add sp, sp, #8 520 .LCFI5: 521 .cfi_def_cfa_offset 0 @@ -5428,531 +5429,531 @@ ARM GAS /tmp/ccWQNJQt.s page 1 542 PID_Controller_Temp: 543 .LVL33: 544 .LFB1215: -2208:Src/main.c **** -2209:Src/main.c **** void OUT_trigger(uint8_t out_n) -2210:Src/main.c **** { -2211:Src/main.c **** switch (out_n) -2212:Src/main.c **** { -2213:Src/main.c **** case 0: -2214:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); -2215:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); -2216:Src/main.c **** break; -2217:Src/main.c **** -2218:Src/main.c **** case 1: -2219:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); -2220:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); -2221:Src/main.c **** break; -2222:Src/main.c **** -2223:Src/main.c **** case 2: -2224:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); -2225:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); -2226:Src/main.c **** break; -2227:Src/main.c **** -2228:Src/main.c **** case 3: -2229:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); -2230:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); -2231:Src/main.c **** break; -2232:Src/main.c **** -2233:Src/main.c **** case 4: -2234:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); -2235:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); -2236:Src/main.c **** break; -2237:Src/main.c **** - ARM GAS /tmp/ccWQNJQt.s page 92 +2209:Src/main.c **** +2210:Src/main.c **** void OUT_trigger(uint8_t out_n) +2211:Src/main.c **** { +2212:Src/main.c **** switch (out_n) +2213:Src/main.c **** { +2214:Src/main.c **** case 0: +2215:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); +2216:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); +2217:Src/main.c **** break; +2218:Src/main.c **** +2219:Src/main.c **** case 1: +2220:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); +2221:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); +2222:Src/main.c **** break; +2223:Src/main.c **** +2224:Src/main.c **** case 2: +2225:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); +2226:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); +2227:Src/main.c **** break; +2228:Src/main.c **** +2229:Src/main.c **** case 3: +2230:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); +2231:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); +2232:Src/main.c **** break; +2233:Src/main.c **** +2234:Src/main.c **** case 4: +2235:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); +2236:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); +2237:Src/main.c **** break; + ARM GAS /tmp/ccO46DoU.s page 92 -2238:Src/main.c **** case 5: -2239:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); -2240:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); -2241:Src/main.c **** break; -2242:Src/main.c **** -2243:Src/main.c **** case 6: -2244:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); -2245:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); -2246:Src/main.c **** break; -2247:Src/main.c **** -2248:Src/main.c **** case 7: -2249:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); -2250:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); -2251:Src/main.c **** break; -2252:Src/main.c **** -2253:Src/main.c **** case 8: -2254:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); -2255:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); -2256:Src/main.c **** break; -2257:Src/main.c **** -2258:Src/main.c **** case 9: -2259:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); -2260:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); -2261:Src/main.c **** break; -2262:Src/main.c **** } -2263:Src/main.c **** } -2264:Src/main.c **** -2265:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) -2266:Src/main.c **** { -2267:Src/main.c **** uint32_t tmp32; -2268:Src/main.c **** -2269:Src/main.c **** switch (num) -2270:Src/main.c **** { -2271:Src/main.c **** case 1: -2272:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2273:Src/main.c **** //tmp32=0; -2274:Src/main.c **** //while(tmp32<500){tmp32++;} -2275:Src/main.c **** tmp32 = 0; -2276:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2278:Src/main.c **** tmp32 = 0; -2279:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2280:Src/main.c **** (void) SPI2->DR; -2281:Src/main.c **** break; -2282:Src/main.c **** case 2: -2283:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes -2284:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2285:Src/main.c **** //tmp32=0; -2286:Src/main.c **** //while(tmp32<500){tmp32++;} -2287:Src/main.c **** tmp32 = 0; -2288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -2290:Src/main.c **** tmp32 = 0; -2291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2292:Src/main.c **** (void) SPI6->DR; -2293:Src/main.c **** break; -2294:Src/main.c **** case 3: - ARM GAS /tmp/ccWQNJQt.s page 93 +2238:Src/main.c **** +2239:Src/main.c **** case 5: +2240:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); +2241:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); +2242:Src/main.c **** break; +2243:Src/main.c **** +2244:Src/main.c **** case 6: +2245:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); +2246:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); +2247:Src/main.c **** break; +2248:Src/main.c **** +2249:Src/main.c **** case 7: +2250:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); +2251:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); +2252:Src/main.c **** break; +2253:Src/main.c **** +2254:Src/main.c **** case 8: +2255:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); +2256:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); +2257:Src/main.c **** break; +2258:Src/main.c **** +2259:Src/main.c **** case 9: +2260:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); +2261:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); +2262:Src/main.c **** break; +2263:Src/main.c **** } +2264:Src/main.c **** } +2265:Src/main.c **** +2266:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) +2267:Src/main.c **** { +2268:Src/main.c **** uint32_t tmp32; +2269:Src/main.c **** +2270:Src/main.c **** switch (num) +2271:Src/main.c **** { +2272:Src/main.c **** case 1: +2273:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2274:Src/main.c **** //tmp32=0; +2275:Src/main.c **** //while(tmp32<500){tmp32++;} +2276:Src/main.c **** tmp32 = 0; +2277:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2279:Src/main.c **** tmp32 = 0; +2280:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2281:Src/main.c **** (void) SPI2->DR; +2282:Src/main.c **** break; +2283:Src/main.c **** case 2: +2284:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes +2285:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2286:Src/main.c **** //tmp32=0; +2287:Src/main.c **** //while(tmp32<500){tmp32++;} +2288:Src/main.c **** tmp32 = 0; +2289:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2290:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +2291:Src/main.c **** tmp32 = 0; +2292:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2293:Src/main.c **** (void) SPI6->DR; +2294:Src/main.c **** break; + ARM GAS /tmp/ccO46DoU.s page 93 -2295:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with -2296:Src/main.c **** //tmp32=0; -2297:Src/main.c **** //while(tmp32<500){tmp32++;} -2298:Src/main.c **** tmp32 = 0; -2299:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2301:Src/main.c **** tmp32 = 0; -2302:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2303:Src/main.c **** (void) SPI2->DR; -2304:Src/main.c **** break; -2305:Src/main.c **** case 4: -2306:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with -2307:Src/main.c **** //tmp32=0; -2308:Src/main.c **** //while(tmp32<500){tmp32++;} -2309:Src/main.c **** tmp32 = 0; -2310:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -2312:Src/main.c **** tmp32 = 0; -2313:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2314:Src/main.c **** (void) SPI6->DR; -2315:Src/main.c **** break; -2316:Src/main.c **** } -2317:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 -2318:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 -2319:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 -2320:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 -2321:Src/main.c **** } -2322:Src/main.c **** static uint16_t MPhD_T(uint8_t num) -2323:Src/main.c **** { -2324:Src/main.c **** uint16_t P; -2325:Src/main.c **** uint32_t tmp32; -2326:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2327:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2328:Src/main.c **** tmp32=0; -2329:Src/main.c **** while(tmp32<500){tmp32++;} -2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2331:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2332:Src/main.c **** tmp32=0; -2333:Src/main.c **** while(tmp32<500){tmp32++;} -2334:Src/main.c **** if (num==1)//MPD1 -2335:Src/main.c **** { -2336:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2337:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); -2338:Src/main.c **** tmp32=0; -2339:Src/main.c **** while(tmp32<500){tmp32++;} -2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2341:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC -2342:Src/main.c **** tmp32 = 0; -2343:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC -2345:Src/main.c **** while(tmp32<500){tmp32++;} -2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2347:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -2348:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2349:Src/main.c **** } -2350:Src/main.c **** else if (num==2)//MPD2 -2351:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 94 +2295:Src/main.c **** case 3: +2296:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with +2297:Src/main.c **** //tmp32=0; +2298:Src/main.c **** //while(tmp32<500){tmp32++;} +2299:Src/main.c **** tmp32 = 0; +2300:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2301:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2302:Src/main.c **** tmp32 = 0; +2303:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2304:Src/main.c **** (void) SPI2->DR; +2305:Src/main.c **** break; +2306:Src/main.c **** case 4: +2307:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with +2308:Src/main.c **** //tmp32=0; +2309:Src/main.c **** //while(tmp32<500){tmp32++;} +2310:Src/main.c **** tmp32 = 0; +2311:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2312:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +2313:Src/main.c **** tmp32 = 0; +2314:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2315:Src/main.c **** (void) SPI6->DR; +2316:Src/main.c **** break; +2317:Src/main.c **** } +2318:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +2319:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +2320:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +2321:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +2322:Src/main.c **** } +2323:Src/main.c **** static uint16_t MPhD_T(uint8_t num) +2324:Src/main.c **** { +2325:Src/main.c **** uint16_t P; +2326:Src/main.c **** uint32_t tmp32; +2327:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2328:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2329:Src/main.c **** tmp32=0; +2330:Src/main.c **** while(tmp32<500){tmp32++;} +2331:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2332:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2333:Src/main.c **** tmp32=0; +2334:Src/main.c **** while(tmp32<500){tmp32++;} +2335:Src/main.c **** if (num==1)//MPD1 +2336:Src/main.c **** { +2337:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +2338:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); +2339:Src/main.c **** tmp32=0; +2340:Src/main.c **** while(tmp32<500){tmp32++;} +2341:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2342:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +2343:Src/main.c **** tmp32 = 0; +2344:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2345:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC +2346:Src/main.c **** while(tmp32<500){tmp32++;} +2347:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2348:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2349:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +2350:Src/main.c **** } +2351:Src/main.c **** else if (num==2)//MPD2 + ARM GAS /tmp/ccO46DoU.s page 94 -2352:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2353:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); -2354:Src/main.c **** tmp32=0; -2355:Src/main.c **** while(tmp32<500){tmp32++;} -2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2357:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC -2358:Src/main.c **** tmp32 = 0; -2359:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC -2361:Src/main.c **** while(tmp32<500){tmp32++;} -2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2363:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2364:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -2365:Src/main.c **** } -2366:Src/main.c **** else if (num==3)//ThrLD1 -2367:Src/main.c **** { -2368:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -2369:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -2370:Src/main.c **** tmp32=0; -2371:Src/main.c **** while(tmp32<500){tmp32++;} -2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2373:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC -2374:Src/main.c **** tmp32 = 0; -2375:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC -2377:Src/main.c **** while(tmp32<500){tmp32++;} -2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2379:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2380:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2381:Src/main.c **** } -2382:Src/main.c **** else if (num==4)//ThrLD2 -2383:Src/main.c **** { -2384:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2385:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -2386:Src/main.c **** tmp32=0; -2387:Src/main.c **** while(tmp32<500){tmp32++;} -2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2389:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC -2390:Src/main.c **** tmp32 = 0; -2391:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC -2393:Src/main.c **** while(tmp32<500){tmp32++;} -2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2395:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2396:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -2397:Src/main.c **** } -2398:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; -2399:Src/main.c **** -2400:Src/main.c **** Inorm = (float) (65535) / (float) (100); -2401:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); -2402:Src/main.c **** Tnorm2 = 4; -2403:Src/main.c **** Pnorm = (float)(65535) / (float)(20); -2404:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system -2405:Src/main.c **** T0m = 48.6282; -2406:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; -2407:Src/main.c **** -2408:Src/main.c **** Ith = I0m * expf(T_C/T0m); - ARM GAS /tmp/ccWQNJQt.s page 95 +2352:Src/main.c **** { +2353:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +2354:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); +2355:Src/main.c **** tmp32=0; +2356:Src/main.c **** while(tmp32<500){tmp32++;} +2357:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2358:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +2359:Src/main.c **** tmp32 = 0; +2360:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2361:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC +2362:Src/main.c **** while(tmp32<500){tmp32++;} +2363:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2364:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +2365:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2366:Src/main.c **** } +2367:Src/main.c **** else if (num==3)//ThrLD1 +2368:Src/main.c **** { +2369:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2370:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +2371:Src/main.c **** tmp32=0; +2372:Src/main.c **** while(tmp32<500){tmp32++;} +2373:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2374:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC +2375:Src/main.c **** tmp32 = 0; +2376:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2377:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC +2378:Src/main.c **** while(tmp32<500){tmp32++;} +2379:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2380:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +2381:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +2382:Src/main.c **** } +2383:Src/main.c **** else if (num==4)//ThrLD2 +2384:Src/main.c **** { +2385:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +2386:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +2387:Src/main.c **** tmp32=0; +2388:Src/main.c **** while(tmp32<500){tmp32++;} +2389:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2390:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC +2391:Src/main.c **** tmp32 = 0; +2392:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2393:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC +2394:Src/main.c **** while(tmp32<500){tmp32++;} +2395:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2396:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +2397:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2398:Src/main.c **** } +2399:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; +2400:Src/main.c **** +2401:Src/main.c **** Inorm = (float) (65535) / (float) (100); +2402:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); +2403:Src/main.c **** Tnorm2 = 4; +2404:Src/main.c **** Pnorm = (float)(65535) / (float)(20); +2405:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system +2406:Src/main.c **** T0m = 48.6282; +2407:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; +2408:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 95 -2409:Src/main.c **** I_LD = (float) (C_LD) / Inorm; -2410:Src/main.c **** -2411:Src/main.c **** if (I_LD > Ith) -2412:Src/main.c **** { -2413:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ -2414:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; -2415:Src/main.c **** } -2416:Src/main.c **** else -2417:Src/main.c **** { -2418:Src/main.c **** P = 0; -2419:Src/main.c **** } */ -2420:Src/main.c **** return P; -2421:Src/main.c **** } -2422:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time -2423:Src/main.c **** { -2424:Src/main.c **** uint16_t Result; -2425:Src/main.c **** // uint8_t randf; -2426:Src/main.c **** -2427:Src/main.c **** randf = 0; -2428:Src/main.c **** for (uint8_t i = 0; i < 32; i++) -2429:Src/main.c **** { -2430:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; -2431:Src/main.c **** } -2432:Src/main.c **** -2433:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl -2434:Src/main.c **** -2435:Src/main.c **** return (uint16_t)(Result); -2436:Src/main.c **** }*/ -2437:Src/main.c **** static uint16_t Get_ADC(uint8_t num) -2438:Src/main.c **** { -2439:Src/main.c **** uint16_t OUT; -2440:Src/main.c **** switch (num) -2441:Src/main.c **** { -2442:Src/main.c **** case 0: -2443:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on -2444:Src/main.c **** break; -2445:Src/main.c **** case 1: -2446:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion -2447:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc -2448:Src/main.c **** break; -2449:Src/main.c **** case 2: -2450:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off -2451:Src/main.c **** break; -2452:Src/main.c **** case 3: -2453:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on -2454:Src/main.c **** break; -2455:Src/main.c **** case 4: -2456:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion -2457:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc -2458:Src/main.c **** break; -2459:Src/main.c **** case 5: -2460:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off -2461:Src/main.c **** break; -2462:Src/main.c **** } -2463:Src/main.c **** return OUT; -2464:Src/main.c **** } -2465:Src/main.c **** - ARM GAS /tmp/ccWQNJQt.s page 96 +2409:Src/main.c **** Ith = I0m * expf(T_C/T0m); +2410:Src/main.c **** I_LD = (float) (C_LD) / Inorm; +2411:Src/main.c **** +2412:Src/main.c **** if (I_LD > Ith) +2413:Src/main.c **** { +2414:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ +2415:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; +2416:Src/main.c **** } +2417:Src/main.c **** else +2418:Src/main.c **** { +2419:Src/main.c **** P = 0; +2420:Src/main.c **** } */ +2421:Src/main.c **** return P; +2422:Src/main.c **** } +2423:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time +2424:Src/main.c **** { +2425:Src/main.c **** uint16_t Result; +2426:Src/main.c **** // uint8_t randf; +2427:Src/main.c **** +2428:Src/main.c **** randf = 0; +2429:Src/main.c **** for (uint8_t i = 0; i < 32; i++) +2430:Src/main.c **** { +2431:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; +2432:Src/main.c **** } +2433:Src/main.c **** +2434:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl +2435:Src/main.c **** +2436:Src/main.c **** return (uint16_t)(Result); +2437:Src/main.c **** }*/ +2438:Src/main.c **** static uint16_t Get_ADC(uint8_t num) +2439:Src/main.c **** { +2440:Src/main.c **** uint16_t OUT; +2441:Src/main.c **** switch (num) +2442:Src/main.c **** { +2443:Src/main.c **** case 0: +2444:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on +2445:Src/main.c **** break; +2446:Src/main.c **** case 1: +2447:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion +2448:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc +2449:Src/main.c **** break; +2450:Src/main.c **** case 2: +2451:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off +2452:Src/main.c **** break; +2453:Src/main.c **** case 3: +2454:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on +2455:Src/main.c **** break; +2456:Src/main.c **** case 4: +2457:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion +2458:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc +2459:Src/main.c **** break; +2460:Src/main.c **** case 5: +2461:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off +2462:Src/main.c **** break; +2463:Src/main.c **** } +2464:Src/main.c **** return OUT; +2465:Src/main.c **** } + ARM GAS /tmp/ccO46DoU.s page 96 -2466:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results -2467:Src/main.c **** { -2468:Src/main.c **** // Main idea: -2469:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat -2470:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept -2471:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t -2472:Src/main.c **** // So, equation should be look like this: -2473:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) -2474:Src/main.c **** // t -- cycle phase -2475:Src/main.c **** // a,b,c -- constants -2476:Src/main.c **** // -2477:Src/main.c **** // How can we control laser diode temperature? -2478:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. -2479:Src/main.c **** // Then we should measure wavelength. -2480:Src/main.c **** // Calibration sequence: -2481:Src/main.c **** // 1) n -2482:Src/main.c **** +2466:Src/main.c **** +2467:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results +2468:Src/main.c **** { +2469:Src/main.c **** // Main idea: +2470:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat +2471:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept +2472:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t +2473:Src/main.c **** // So, equation should be look like this: +2474:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) +2475:Src/main.c **** // t -- cycle phase +2476:Src/main.c **** // a,b,c -- constants +2477:Src/main.c **** // +2478:Src/main.c **** // How can we control laser diode temperature? +2479:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. +2480:Src/main.c **** // Then we should measure wavelength. +2481:Src/main.c **** // Calibration sequence: +2482:Src/main.c **** // 1) n 2483:Src/main.c **** 2484:Src/main.c **** -2485:Src/main.c **** int e_pid; -2486:Src/main.c **** float P_coef_current;//, I_coef_current; -2487:Src/main.c **** float e_integral; -2488:Src/main.c **** int x_output; -2489:Src/main.c **** -2490:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; -2491:Src/main.c **** -2492:Src/main.c **** e_integral = LDx_results->e_integral; -2493:Src/main.c **** -2494:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ -2495:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 -2496:Src/main.c **** } -2497:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; -2498:Src/main.c **** -2499:Src/main.c **** if (e_integral > 32000){ -2500:Src/main.c **** e_integral = 32000; -2501:Src/main.c **** } -2502:Src/main.c **** else if (e_integral < - 32000){ -2503:Src/main.c **** e_integral = -32000; -2504:Src/main.c **** } -2505:Src/main.c **** LDx_results->e_integral = e_integral; -2506:Src/main.c **** -2507:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in -2508:Src/main.c **** -2509:Src/main.c **** if(x_output < 1000){ -2510:Src/main.c **** x_output = 8800; -2511:Src/main.c **** } -2512:Src/main.c **** else if(x_output > 56800){ -2513:Src/main.c **** x_output = 56800; -2514:Src/main.c **** } -2515:Src/main.c **** -2516:Src/main.c **** if (num==2) -2517:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -2518:Src/main.c **** -2519:Src/main.c **** return (uint16_t)x_output; -2520:Src/main.c **** } -2521:Src/main.c **** +2485:Src/main.c **** +2486:Src/main.c **** int e_pid; +2487:Src/main.c **** float P_coef_current;//, I_coef_current; +2488:Src/main.c **** float e_integral; +2489:Src/main.c **** int x_output; +2490:Src/main.c **** +2491:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; +2492:Src/main.c **** +2493:Src/main.c **** e_integral = LDx_results->e_integral; +2494:Src/main.c **** +2495:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ +2496:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 +2497:Src/main.c **** } +2498:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; +2499:Src/main.c **** +2500:Src/main.c **** if (e_integral > 32000){ +2501:Src/main.c **** e_integral = 32000; +2502:Src/main.c **** } +2503:Src/main.c **** else if (e_integral < - 32000){ +2504:Src/main.c **** e_integral = -32000; +2505:Src/main.c **** } +2506:Src/main.c **** LDx_results->e_integral = e_integral; +2507:Src/main.c **** +2508:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in +2509:Src/main.c **** +2510:Src/main.c **** if(x_output < 1000){ +2511:Src/main.c **** x_output = 8800; +2512:Src/main.c **** } +2513:Src/main.c **** else if(x_output > 56800){ +2514:Src/main.c **** x_output = 56800; +2515:Src/main.c **** } +2516:Src/main.c **** +2517:Src/main.c **** if (num==2) +2518:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +2519:Src/main.c **** +2520:Src/main.c **** return (uint16_t)x_output; +2521:Src/main.c **** } 2522:Src/main.c **** - ARM GAS /tmp/ccWQNJQt.s page 97 + ARM GAS /tmp/ccO46DoU.s page 97 -2523:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin -2524:Src/main.c **** { - 545 .loc 1 2524 1 is_stmt 1 view -0 +2523:Src/main.c **** +2524:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin +2525:Src/main.c **** { + 545 .loc 1 2525 1 is_stmt 1 view -0 546 .cfi_startproc 547 @ args = 0, pretend = 0, frame = 0 548 @ frame_needed = 0, uses_anonymous_args = 0 549 @ link register save eliminated. - 550 .loc 1 2524 1 is_stmt 0 view .LVU201 + 550 .loc 1 2525 1 is_stmt 0 view .LVU201 551 0000 30B4 push {r4, r5} 552 .LCFI6: 553 .cfi_def_cfa_offset 8 554 .cfi_offset 4, -8 555 .cfi_offset 5, -4 -2525:Src/main.c **** int e_pid; - 556 .loc 1 2525 2 is_stmt 1 view .LVU202 -2526:Src/main.c **** float P_coef_current;//, I_coef_current; - 557 .loc 1 2526 2 view .LVU203 -2527:Src/main.c **** float e_integral; - 558 .loc 1 2527 2 view .LVU204 -2528:Src/main.c **** int x_output; - 559 .loc 1 2528 2 view .LVU205 -2529:Src/main.c **** -2530:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; - 560 .loc 1 2530 2 view .LVU206 - 561 .loc 1 2530 28 is_stmt 0 view .LVU207 +2526:Src/main.c **** int e_pid; + 556 .loc 1 2526 2 is_stmt 1 view .LVU202 +2527:Src/main.c **** float P_coef_current;//, I_coef_current; + 557 .loc 1 2527 2 view .LVU203 +2528:Src/main.c **** float e_integral; + 558 .loc 1 2528 2 view .LVU204 +2529:Src/main.c **** int x_output; + 559 .loc 1 2529 2 view .LVU205 +2530:Src/main.c **** +2531:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; + 560 .loc 1 2531 2 view .LVU206 + 561 .loc 1 2531 28 is_stmt 0 view .LVU207 562 0002 0B88 ldrh r3, [r1] - 563 .loc 1 2530 65 view .LVU208 + 563 .loc 1 2531 65 view .LVU208 564 0004 0488 ldrh r4, [r0] - 565 .loc 1 2530 8 view .LVU209 + 565 .loc 1 2531 8 view .LVU209 566 0006 1B1B subs r3, r3, r4 567 .LVL34: -2531:Src/main.c **** -2532:Src/main.c **** e_integral = LDx_results->e_integral; - 568 .loc 1 2532 2 is_stmt 1 view .LVU210 - 569 .loc 1 2532 13 is_stmt 0 view .LVU211 +2532:Src/main.c **** +2533:Src/main.c **** e_integral = LDx_results->e_integral; + 568 .loc 1 2533 2 is_stmt 1 view .LVU210 + 569 .loc 1 2533 13 is_stmt 0 view .LVU211 570 0008 D1ED017A vldr.32 s15, [r1, #4] 571 .LVL35: -2533:Src/main.c **** -2534:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ - 572 .loc 1 2534 2 is_stmt 1 view .LVU212 - 573 .loc 1 2534 20 is_stmt 0 view .LVU213 +2534:Src/main.c **** +2535:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ + 572 .loc 1 2535 2 is_stmt 1 view .LVU212 + 573 .loc 1 2535 20 is_stmt 0 view .LVU213 574 000c 03F6B73C addw ip, r3, #2999 - 575 .loc 1 2534 4 view .LVU214 + 575 .loc 1 2535 4 view .LVU214 576 0010 41F26E74 movw r4, #5998 577 0014 A445 cmp ip, r4 578 0016 18D8 bhi .L17 -2535:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 579 .loc 1 2535 3 is_stmt 1 view .LVU215 - 580 .loc 1 2535 31 is_stmt 0 view .LVU216 +2536:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 579 .loc 1 2536 3 is_stmt 1 view .LVU215 + 580 .loc 1 2536 31 is_stmt 0 view .LVU216 581 0018 90ED027A vldr.32 s14, [r0, #8] - 582 .loc 1 2535 47 view .LVU217 + 582 .loc 1 2536 47 view .LVU217 583 001c 06EE903A vmov s13, r3 @ int 584 0020 F8EEE66A vcvt.f32.s32 s13, s13 - 585 .loc 1 2535 45 view .LVU218 + 585 .loc 1 2536 45 view .LVU218 586 0024 27EE267A vmul.f32 s14, s14, s13 - 587 .loc 1 2535 76 view .LVU219 + 587 .loc 1 2536 76 view .LVU219 + ARM GAS /tmp/ccO46DoU.s page 98 + + 588 0028 284C ldr r4, .L27 - ARM GAS /tmp/ccWQNJQt.s page 98 - - 589 002a 2468 ldr r4, [r4] 590 002c 284D ldr r5, .L27+4 591 002e 2D68 ldr r5, [r5] 592 0030 641B subs r4, r4, r5 - 593 .loc 1 2535 64 view .LVU220 + 593 .loc 1 2536 64 view .LVU220 594 0032 06EE904A vmov s13, r4 @ int 595 0036 F8EE666A vcvt.f32.u32 s13, s13 - 596 .loc 1 2535 62 view .LVU221 + 596 .loc 1 2536 62 view .LVU221 597 003a 27EE267A vmul.f32 s14, s14, s13 - 598 .loc 1 2535 87 view .LVU222 + 598 .loc 1 2536 87 view .LVU222 599 003e 9FED256A vldr.32 s12, .L27+8 600 0042 C7EE066A vdiv.f32 s13, s14, s12 - 601 .loc 1 2535 14 view .LVU223 + 601 .loc 1 2536 14 view .LVU223 602 0046 77EEA67A vadd.f32 s15, s15, s13 603 .LVL36: 604 .L17: -2536:Src/main.c **** } -2537:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; - 605 .loc 1 2537 2 is_stmt 1 view .LVU224 - 606 .loc 1 2537 17 is_stmt 0 view .LVU225 +2537:Src/main.c **** } +2538:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; + 605 .loc 1 2538 2 is_stmt 1 view .LVU224 + 606 .loc 1 2538 17 is_stmt 0 view .LVU225 607 004a D0ED016A vldr.32 s13, [r0, #4] 608 .LVL37: -2538:Src/main.c **** -2539:Src/main.c **** if (e_integral > 32000){ - 609 .loc 1 2539 2 is_stmt 1 view .LVU226 - 610 .loc 1 2539 5 is_stmt 0 view .LVU227 +2539:Src/main.c **** +2540:Src/main.c **** if (e_integral > 32000){ + 609 .loc 1 2540 2 is_stmt 1 view .LVU226 + 610 .loc 1 2540 5 is_stmt 0 view .LVU227 611 004e 9FED227A vldr.32 s14, .L27+12 612 0052 F4EEC77A vcmpe.f32 s15, s14 613 0056 F1EE10FA vmrs APSR_nzcv, FPSCR 614 005a 09DC bgt .L21 -2540:Src/main.c **** e_integral = 32000; -2541:Src/main.c **** } -2542:Src/main.c **** else if (e_integral < - 32000){ - 615 .loc 1 2542 7 is_stmt 1 view .LVU228 - 616 .loc 1 2542 10 is_stmt 0 view .LVU229 +2541:Src/main.c **** e_integral = 32000; +2542:Src/main.c **** } +2543:Src/main.c **** else if (e_integral < - 32000){ + 615 .loc 1 2543 7 is_stmt 1 view .LVU228 + 616 .loc 1 2543 10 is_stmt 0 view .LVU229 617 005c 9FED1F7A vldr.32 s14, .L27+16 618 0060 F4EEC77A vcmpe.f32 s15, s14 619 0064 F1EE10FA vmrs APSR_nzcv, FPSCR 620 0068 04D5 bpl .L18 -2543:Src/main.c **** e_integral = -32000; - 621 .loc 1 2543 15 view .LVU230 +2544:Src/main.c **** e_integral = -32000; + 621 .loc 1 2544 15 view .LVU230 622 006a DFED1C7A vldr.32 s15, .L27+16 623 .LVL38: - 624 .loc 1 2543 15 view .LVU231 + 624 .loc 1 2544 15 view .LVU231 625 006e 01E0 b .L18 626 .LVL39: 627 .L21: -2540:Src/main.c **** e_integral = 32000; - 628 .loc 1 2540 15 view .LVU232 +2541:Src/main.c **** e_integral = 32000; + 628 .loc 1 2541 15 view .LVU232 629 0070 DFED197A vldr.32 s15, .L27+12 630 .LVL40: 631 .L18: -2544:Src/main.c **** } -2545:Src/main.c **** LDx_results->e_integral = e_integral; - 632 .loc 1 2545 2 is_stmt 1 view .LVU233 - 633 .loc 1 2545 26 is_stmt 0 view .LVU234 +2545:Src/main.c **** } +2546:Src/main.c **** LDx_results->e_integral = e_integral; + 632 .loc 1 2546 2 is_stmt 1 view .LVU233 + 633 .loc 1 2546 26 is_stmt 0 view .LVU234 + ARM GAS /tmp/ccO46DoU.s page 99 + + 634 0074 C1ED017A vstr.32 s15, [r1, #4] - ARM GAS /tmp/ccWQNJQt.s page 99 - - -2546:Src/main.c **** -2547:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in - 635 .loc 1 2547 2 is_stmt 1 view .LVU235 - 636 .loc 1 2547 36 is_stmt 0 view .LVU236 +2547:Src/main.c **** +2548:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in + 635 .loc 1 2548 2 is_stmt 1 view .LVU235 + 636 .loc 1 2548 36 is_stmt 0 view .LVU236 637 0078 07EE103A vmov s14, r3 @ int 638 007c B8EEC77A vcvt.f32.s32 s14, s14 639 0080 27EE267A vmul.f32 s14, s14, s13 - 640 .loc 1 2547 19 view .LVU237 + 640 .loc 1 2548 19 view .LVU237 641 0084 DFED166A vldr.32 s13, .L27+20 642 .LVL41: - 643 .loc 1 2547 19 view .LVU238 + 643 .loc 1 2548 19 view .LVU238 644 0088 37EE267A vadd.f32 s14, s14, s13 - 645 .loc 1 2547 46 view .LVU239 + 645 .loc 1 2548 46 view .LVU239 646 008c FDEEE77A vcvt.s32.f32 s15, s15 647 .LVL42: - 648 .loc 1 2547 44 view .LVU240 + 648 .loc 1 2548 44 view .LVU240 649 0090 F8EEE77A vcvt.f32.s32 s15, s15 650 0094 77EE877A vadd.f32 s15, s15, s14 - 651 .loc 1 2547 11 view .LVU241 + 651 .loc 1 2548 11 view .LVU241 652 0098 FDEEE77A vcvt.s32.f32 s15, s15 653 009c 17EE900A vmov r0, s15 @ int 654 .LVL43: -2548:Src/main.c **** -2549:Src/main.c **** if(x_output < 1000){ - 655 .loc 1 2549 2 is_stmt 1 view .LVU242 - 656 .loc 1 2549 4 is_stmt 0 view .LVU243 +2549:Src/main.c **** +2550:Src/main.c **** if(x_output < 1000){ + 655 .loc 1 2550 2 is_stmt 1 view .LVU242 + 656 .loc 1 2550 4 is_stmt 0 view .LVU243 657 00a0 B0F57A7F cmp r0, #1000 658 00a4 06DB blt .L23 -2550:Src/main.c **** x_output = 8800; -2551:Src/main.c **** } -2552:Src/main.c **** else if(x_output > 56800){ - 659 .loc 1 2552 7 is_stmt 1 view .LVU244 - 660 .loc 1 2552 9 is_stmt 0 view .LVU245 +2551:Src/main.c **** x_output = 8800; +2552:Src/main.c **** } +2553:Src/main.c **** else if(x_output > 56800){ + 659 .loc 1 2553 7 is_stmt 1 view .LVU244 + 660 .loc 1 2553 9 is_stmt 0 view .LVU245 661 00a6 4DF6E053 movw r3, #56800 662 .LVL44: - 663 .loc 1 2552 9 view .LVU246 + 663 .loc 1 2553 9 view .LVU246 664 00aa 9842 cmp r0, r3 665 00ac 04DD ble .L19 -2553:Src/main.c **** x_output = 56800; - 666 .loc 1 2553 12 view .LVU247 +2554:Src/main.c **** x_output = 56800; + 666 .loc 1 2554 12 view .LVU247 667 00ae 4DF6E050 movw r0, #56800 668 .LVL45: - 669 .loc 1 2553 12 view .LVU248 + 669 .loc 1 2554 12 view .LVU248 670 00b2 01E0 b .L19 671 .LVL46: 672 .L23: -2550:Src/main.c **** x_output = 8800; - 673 .loc 1 2550 12 view .LVU249 +2551:Src/main.c **** x_output = 8800; + 673 .loc 1 2551 12 view .LVU249 674 00b4 42F26020 movw r0, #8800 675 .LVL47: 676 .L19: -2554:Src/main.c **** } -2555:Src/main.c **** -2556:Src/main.c **** if (num==2) - 677 .loc 1 2556 2 is_stmt 1 view .LVU250 - 678 .loc 1 2556 5 is_stmt 0 view .LVU251 +2555:Src/main.c **** } +2556:Src/main.c **** +2557:Src/main.c **** if (num==2) + 677 .loc 1 2557 2 is_stmt 1 view .LVU250 + 678 .loc 1 2557 5 is_stmt 0 view .LVU251 + ARM GAS /tmp/ccO46DoU.s page 100 + + 679 00b8 022A cmp r2, #2 - ARM GAS /tmp/ccWQNJQt.s page 100 - - 680 00ba 02D0 beq .L26 681 .LVL48: 682 .L20: -2557:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -2558:Src/main.c **** -2559:Src/main.c **** return (uint16_t)x_output; - 683 .loc 1 2559 2 is_stmt 1 view .LVU252 -2560:Src/main.c **** } - 684 .loc 1 2560 1 is_stmt 0 view .LVU253 +2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +2559:Src/main.c **** +2560:Src/main.c **** return (uint16_t)x_output; + 683 .loc 1 2560 2 is_stmt 1 view .LVU252 +2561:Src/main.c **** } + 684 .loc 1 2561 1 is_stmt 0 view .LVU253 685 00bc 80B2 uxth r0, r0 686 .LVL49: - 687 .loc 1 2560 1 view .LVU254 + 687 .loc 1 2561 1 view .LVU254 688 00be 30BC pop {r4, r5} 689 .LCFI7: 690 .cfi_remember_state @@ -5964,15 +5965,15 @@ ARM GAS /tmp/ccWQNJQt.s page 1 696 .L26: 697 .LCFI8: 698 .cfi_restore_state -2557:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 699 .loc 1 2557 3 is_stmt 1 view .LVU255 -2557:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 700 .loc 1 2557 11 is_stmt 0 view .LVU256 +2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 699 .loc 1 2558 3 is_stmt 1 view .LVU255 +2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 700 .loc 1 2558 11 is_stmt 0 view .LVU256 701 00c2 024B ldr r3, .L27 702 00c4 1A68 ldr r2, [r3] 703 .LVL51: -2557:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 704 .loc 1 2557 11 view .LVU257 +2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 704 .loc 1 2558 11 view .LVU257 705 00c6 024B ldr r3, .L27+4 706 00c8 1A60 str r2, [r3] 707 00ca F7E7 b .L20 @@ -5995,23 +5996,23 @@ ARM GAS /tmp/ccWQNJQt.s page 1 726 OUT_trigger: 727 .LVL52: 728 .LFB1210: -2210:Src/main.c **** switch (out_n) - 729 .loc 1 2210 1 is_stmt 1 view -0 +2211:Src/main.c **** switch (out_n) + 729 .loc 1 2211 1 is_stmt 1 view -0 + ARM GAS /tmp/ccO46DoU.s page 101 + + 730 .cfi_startproc - ARM GAS /tmp/ccWQNJQt.s page 101 - - 731 @ args = 0, pretend = 0, frame = 0 732 @ frame_needed = 0, uses_anonymous_args = 0 -2210:Src/main.c **** switch (out_n) - 733 .loc 1 2210 1 is_stmt 0 view .LVU259 +2211:Src/main.c **** switch (out_n) + 733 .loc 1 2211 1 is_stmt 0 view .LVU259 734 0000 10B5 push {r4, lr} 735 .LCFI9: 736 .cfi_def_cfa_offset 8 737 .cfi_offset 4, -8 738 .cfi_offset 14, -4 -2211:Src/main.c **** { - 739 .loc 1 2211 2 is_stmt 1 view .LVU260 +2212:Src/main.c **** { + 739 .loc 1 2212 2 is_stmt 1 view .LVU260 740 0002 0928 cmp r0, #9 741 0004 13D8 bhi .L29 742 0006 DFE800F0 tbb [pc, r0] @@ -6028,250 +6029,250 @@ ARM GAS /tmp/ccWQNJQt.s page 1 753 0013 7D .byte (.L31-.L32)/2 754 .p2align 1 755 .L41: -2214:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 756 .loc 1 2214 3 view .LVU261 +2215:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 756 .loc 1 2215 3 view .LVU261 757 0014 414C ldr r4, .L44 758 0016 0122 movs r2, #1 759 0018 4FF48061 mov r1, #1024 760 001c 2046 mov r0, r4 761 .LVL53: -2214:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 762 .loc 1 2214 3 is_stmt 0 view .LVU262 +2215:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 762 .loc 1 2215 3 is_stmt 0 view .LVU262 763 001e FFF7FEFF bl HAL_GPIO_WritePin 764 .LVL54: -2215:Src/main.c **** break; - 765 .loc 1 2215 3 is_stmt 1 view .LVU263 +2216:Src/main.c **** break; + 765 .loc 1 2216 3 is_stmt 1 view .LVU263 766 0022 0022 movs r2, #0 767 0024 4FF48061 mov r1, #1024 768 0028 2046 mov r0, r4 769 002a FFF7FEFF bl HAL_GPIO_WritePin 770 .LVL55: -2216:Src/main.c **** - 771 .loc 1 2216 2 view .LVU264 +2217:Src/main.c **** + 771 .loc 1 2217 2 view .LVU264 772 .L29: -2263:Src/main.c **** - 773 .loc 1 2263 1 is_stmt 0 view .LVU265 +2264:Src/main.c **** + 773 .loc 1 2264 1 is_stmt 0 view .LVU265 774 002e 10BD pop {r4, pc} 775 .LVL56: 776 .L40: -2219:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 777 .loc 1 2219 3 is_stmt 1 view .LVU266 +2220:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 777 .loc 1 2220 3 is_stmt 1 view .LVU266 778 0030 3A4C ldr r4, .L44 + ARM GAS /tmp/ccO46DoU.s page 102 + + 779 0032 0122 movs r2, #1 - ARM GAS /tmp/ccWQNJQt.s page 102 - - 780 0034 4FF40061 mov r1, #2048 781 0038 2046 mov r0, r4 782 .LVL57: -2219:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 783 .loc 1 2219 3 is_stmt 0 view .LVU267 +2220:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 783 .loc 1 2220 3 is_stmt 0 view .LVU267 784 003a FFF7FEFF bl HAL_GPIO_WritePin 785 .LVL58: -2220:Src/main.c **** break; - 786 .loc 1 2220 3 is_stmt 1 view .LVU268 +2221:Src/main.c **** break; + 786 .loc 1 2221 3 is_stmt 1 view .LVU268 787 003e 0022 movs r2, #0 788 0040 4FF40061 mov r1, #2048 789 0044 2046 mov r0, r4 790 0046 FFF7FEFF bl HAL_GPIO_WritePin 791 .LVL59: -2221:Src/main.c **** - 792 .loc 1 2221 2 view .LVU269 +2222:Src/main.c **** + 792 .loc 1 2222 2 view .LVU269 793 004a F0E7 b .L29 794 .LVL60: 795 .L39: -2224:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 796 .loc 1 2224 3 view .LVU270 +2225:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 796 .loc 1 2225 3 view .LVU270 797 004c 334C ldr r4, .L44 798 004e 0122 movs r2, #1 799 0050 4FF48051 mov r1, #4096 800 0054 2046 mov r0, r4 801 .LVL61: -2224:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 802 .loc 1 2224 3 is_stmt 0 view .LVU271 +2225:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 802 .loc 1 2225 3 is_stmt 0 view .LVU271 803 0056 FFF7FEFF bl HAL_GPIO_WritePin 804 .LVL62: -2225:Src/main.c **** break; - 805 .loc 1 2225 3 is_stmt 1 view .LVU272 +2226:Src/main.c **** break; + 805 .loc 1 2226 3 is_stmt 1 view .LVU272 806 005a 0022 movs r2, #0 807 005c 4FF48051 mov r1, #4096 808 0060 2046 mov r0, r4 809 0062 FFF7FEFF bl HAL_GPIO_WritePin 810 .LVL63: -2226:Src/main.c **** - 811 .loc 1 2226 2 view .LVU273 +2227:Src/main.c **** + 811 .loc 1 2227 2 view .LVU273 812 0066 E2E7 b .L29 813 .LVL64: 814 .L38: -2229:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 815 .loc 1 2229 3 view .LVU274 +2230:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 815 .loc 1 2230 3 view .LVU274 816 0068 2C4C ldr r4, .L44 817 006a 0122 movs r2, #1 818 006c 4FF40051 mov r1, #8192 819 0070 2046 mov r0, r4 820 .LVL65: -2229:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 821 .loc 1 2229 3 is_stmt 0 view .LVU275 +2230:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 821 .loc 1 2230 3 is_stmt 0 view .LVU275 822 0072 FFF7FEFF bl HAL_GPIO_WritePin 823 .LVL66: -2230:Src/main.c **** break; - 824 .loc 1 2230 3 is_stmt 1 view .LVU276 +2231:Src/main.c **** break; + 824 .loc 1 2231 3 is_stmt 1 view .LVU276 825 0076 0022 movs r2, #0 + ARM GAS /tmp/ccO46DoU.s page 103 + + 826 0078 4FF40051 mov r1, #8192 - ARM GAS /tmp/ccWQNJQt.s page 103 - - 827 007c 2046 mov r0, r4 828 007e FFF7FEFF bl HAL_GPIO_WritePin 829 .LVL67: -2231:Src/main.c **** - 830 .loc 1 2231 2 view .LVU277 +2232:Src/main.c **** + 830 .loc 1 2232 2 view .LVU277 831 0082 D4E7 b .L29 832 .LVL68: 833 .L37: -2234:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 834 .loc 1 2234 3 view .LVU278 +2235:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 834 .loc 1 2235 3 view .LVU278 835 0084 254C ldr r4, .L44 836 0086 0122 movs r2, #1 837 0088 4FF48041 mov r1, #16384 838 008c 2046 mov r0, r4 839 .LVL69: -2234:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 840 .loc 1 2234 3 is_stmt 0 view .LVU279 +2235:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 840 .loc 1 2235 3 is_stmt 0 view .LVU279 841 008e FFF7FEFF bl HAL_GPIO_WritePin 842 .LVL70: -2235:Src/main.c **** break; - 843 .loc 1 2235 3 is_stmt 1 view .LVU280 +2236:Src/main.c **** break; + 843 .loc 1 2236 3 is_stmt 1 view .LVU280 844 0092 0022 movs r2, #0 845 0094 4FF48041 mov r1, #16384 846 0098 2046 mov r0, r4 847 009a FFF7FEFF bl HAL_GPIO_WritePin 848 .LVL71: -2236:Src/main.c **** - 849 .loc 1 2236 2 view .LVU281 +2237:Src/main.c **** + 849 .loc 1 2237 2 view .LVU281 850 009e C6E7 b .L29 851 .LVL72: 852 .L36: -2239:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 853 .loc 1 2239 3 view .LVU282 +2240:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 853 .loc 1 2240 3 view .LVU282 854 00a0 1E4C ldr r4, .L44 855 00a2 0122 movs r2, #1 856 00a4 4FF40041 mov r1, #32768 857 00a8 2046 mov r0, r4 858 .LVL73: -2239:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 859 .loc 1 2239 3 is_stmt 0 view .LVU283 +2240:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 859 .loc 1 2240 3 is_stmt 0 view .LVU283 860 00aa FFF7FEFF bl HAL_GPIO_WritePin 861 .LVL74: -2240:Src/main.c **** break; - 862 .loc 1 2240 3 is_stmt 1 view .LVU284 +2241:Src/main.c **** break; + 862 .loc 1 2241 3 is_stmt 1 view .LVU284 863 00ae 0022 movs r2, #0 864 00b0 4FF40041 mov r1, #32768 865 00b4 2046 mov r0, r4 866 00b6 FFF7FEFF bl HAL_GPIO_WritePin 867 .LVL75: -2241:Src/main.c **** - 868 .loc 1 2241 2 view .LVU285 +2242:Src/main.c **** + 868 .loc 1 2242 2 view .LVU285 869 00ba B8E7 b .L29 870 .LVL76: 871 .L35: -2244:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 872 .loc 1 2244 3 view .LVU286 +2245:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 872 .loc 1 2245 3 view .LVU286 + ARM GAS /tmp/ccO46DoU.s page 104 + + 873 00bc 184C ldr r4, .L44+4 - ARM GAS /tmp/ccWQNJQt.s page 104 - - 874 00be 0122 movs r2, #1 875 00c0 1021 movs r1, #16 876 00c2 2046 mov r0, r4 877 .LVL77: -2244:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 878 .loc 1 2244 3 is_stmt 0 view .LVU287 +2245:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 878 .loc 1 2245 3 is_stmt 0 view .LVU287 879 00c4 FFF7FEFF bl HAL_GPIO_WritePin 880 .LVL78: -2245:Src/main.c **** break; - 881 .loc 1 2245 3 is_stmt 1 view .LVU288 +2246:Src/main.c **** break; + 881 .loc 1 2246 3 is_stmt 1 view .LVU288 882 00c8 0022 movs r2, #0 883 00ca 1021 movs r1, #16 884 00cc 2046 mov r0, r4 885 00ce FFF7FEFF bl HAL_GPIO_WritePin 886 .LVL79: -2246:Src/main.c **** - 887 .loc 1 2246 2 view .LVU289 +2247:Src/main.c **** + 887 .loc 1 2247 2 view .LVU289 888 00d2 ACE7 b .L29 889 .LVL80: 890 .L34: -2249:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 891 .loc 1 2249 3 view .LVU290 +2250:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 891 .loc 1 2250 3 view .LVU290 892 00d4 124C ldr r4, .L44+4 893 00d6 0122 movs r2, #1 894 00d8 2021 movs r1, #32 895 00da 2046 mov r0, r4 896 .LVL81: -2249:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 897 .loc 1 2249 3 is_stmt 0 view .LVU291 +2250:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 897 .loc 1 2250 3 is_stmt 0 view .LVU291 898 00dc FFF7FEFF bl HAL_GPIO_WritePin 899 .LVL82: -2250:Src/main.c **** break; - 900 .loc 1 2250 3 is_stmt 1 view .LVU292 +2251:Src/main.c **** break; + 900 .loc 1 2251 3 is_stmt 1 view .LVU292 901 00e0 0022 movs r2, #0 902 00e2 2021 movs r1, #32 903 00e4 2046 mov r0, r4 904 00e6 FFF7FEFF bl HAL_GPIO_WritePin 905 .LVL83: -2251:Src/main.c **** - 906 .loc 1 2251 2 view .LVU293 +2252:Src/main.c **** + 906 .loc 1 2252 2 view .LVU293 907 00ea A0E7 b .L29 908 .LVL84: 909 .L33: -2254:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 910 .loc 1 2254 3 view .LVU294 +2255:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 910 .loc 1 2255 3 view .LVU294 911 00ec 0C4C ldr r4, .L44+4 912 00ee 0122 movs r2, #1 913 00f0 4021 movs r1, #64 914 00f2 2046 mov r0, r4 915 .LVL85: -2254:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 916 .loc 1 2254 3 is_stmt 0 view .LVU295 +2255:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 916 .loc 1 2255 3 is_stmt 0 view .LVU295 917 00f4 FFF7FEFF bl HAL_GPIO_WritePin 918 .LVL86: -2255:Src/main.c **** break; - 919 .loc 1 2255 3 is_stmt 1 view .LVU296 +2256:Src/main.c **** break; + 919 .loc 1 2256 3 is_stmt 1 view .LVU296 + ARM GAS /tmp/ccO46DoU.s page 105 + + 920 00f8 0022 movs r2, #0 - ARM GAS /tmp/ccWQNJQt.s page 105 - - 921 00fa 4021 movs r1, #64 922 00fc 2046 mov r0, r4 923 00fe FFF7FEFF bl HAL_GPIO_WritePin 924 .LVL87: -2256:Src/main.c **** - 925 .loc 1 2256 2 view .LVU297 +2257:Src/main.c **** + 925 .loc 1 2257 2 view .LVU297 926 0102 94E7 b .L29 927 .LVL88: 928 .L31: -2259:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 929 .loc 1 2259 3 view .LVU298 +2260:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 929 .loc 1 2260 3 view .LVU298 930 0104 064C ldr r4, .L44+4 931 0106 0122 movs r2, #1 932 0108 8021 movs r1, #128 933 010a 2046 mov r0, r4 934 .LVL89: -2259:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 935 .loc 1 2259 3 is_stmt 0 view .LVU299 +2260:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 935 .loc 1 2260 3 is_stmt 0 view .LVU299 936 010c FFF7FEFF bl HAL_GPIO_WritePin 937 .LVL90: -2260:Src/main.c **** break; - 938 .loc 1 2260 3 is_stmt 1 view .LVU300 +2261:Src/main.c **** break; + 938 .loc 1 2261 3 is_stmt 1 view .LVU300 939 0110 0022 movs r2, #0 940 0112 8021 movs r1, #128 941 0114 2046 mov r0, r4 942 0116 FFF7FEFF bl HAL_GPIO_WritePin 943 .LVL91: -2261:Src/main.c **** } - 944 .loc 1 2261 2 view .LVU301 -2263:Src/main.c **** - 945 .loc 1 2263 1 is_stmt 0 view .LVU302 +2262:Src/main.c **** } + 944 .loc 1 2262 2 view .LVU301 +2264:Src/main.c **** + 945 .loc 1 2264 1 is_stmt 0 view .LVU302 946 011a 88E7 b .L29 947 .L45: 948 .align 2 @@ -6288,114 +6289,114 @@ ARM GAS /tmp/ccWQNJQt.s page 1 961 MPhD_T: 962 .LVL92: 963 .LFB1212: -2323:Src/main.c **** uint16_t P; - 964 .loc 1 2323 1 is_stmt 1 view -0 +2324:Src/main.c **** uint16_t P; + 964 .loc 1 2324 1 is_stmt 1 view -0 965 .cfi_startproc 966 @ args = 0, pretend = 0, frame = 0 967 @ frame_needed = 0, uses_anonymous_args = 0 -2323:Src/main.c **** uint16_t P; - 968 .loc 1 2323 1 is_stmt 0 view .LVU304 +2324:Src/main.c **** uint16_t P; + 968 .loc 1 2324 1 is_stmt 0 view .LVU304 969 0000 38B5 push {r3, r4, r5, lr} 970 .LCFI10: + ARM GAS /tmp/ccO46DoU.s page 106 + + 971 .cfi_def_cfa_offset 16 - ARM GAS /tmp/ccWQNJQt.s page 106 - - 972 .cfi_offset 3, -16 973 .cfi_offset 4, -12 974 .cfi_offset 5, -8 975 .cfi_offset 14, -4 976 0002 0446 mov r4, r0 -2324:Src/main.c **** uint32_t tmp32; - 977 .loc 1 2324 2 is_stmt 1 view .LVU305 -2325:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 978 .loc 1 2325 2 view .LVU306 -2326:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 979 .loc 1 2326 2 view .LVU307 +2325:Src/main.c **** uint32_t tmp32; + 977 .loc 1 2325 2 is_stmt 1 view .LVU305 +2326:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 978 .loc 1 2326 2 view .LVU306 +2327:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 979 .loc 1 2327 2 view .LVU307 980 0004 0022 movs r2, #0 981 0006 4FF48041 mov r1, #16384 982 000a 8148 ldr r0, .L87 983 .LVL93: -2326:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 984 .loc 1 2326 2 is_stmt 0 view .LVU308 +2327:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 984 .loc 1 2327 2 is_stmt 0 view .LVU308 985 000c FFF7FEFF bl HAL_GPIO_WritePin 986 .LVL94: -2327:Src/main.c **** tmp32=0; - 987 .loc 1 2327 2 is_stmt 1 view .LVU309 +2328:Src/main.c **** tmp32=0; + 987 .loc 1 2328 2 is_stmt 1 view .LVU309 988 0010 0022 movs r2, #0 989 0012 4FF40071 mov r1, #512 990 0016 7F48 ldr r0, .L87+4 991 0018 FFF7FEFF bl HAL_GPIO_WritePin 992 .LVL95: -2328:Src/main.c **** while(tmp32<500){tmp32++;} - 993 .loc 1 2328 2 view .LVU310 -2329:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 994 .loc 1 2329 2 view .LVU311 -2328:Src/main.c **** while(tmp32<500){tmp32++;} - 995 .loc 1 2328 7 is_stmt 0 view .LVU312 +2329:Src/main.c **** while(tmp32<500){tmp32++;} + 993 .loc 1 2329 2 view .LVU310 +2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 994 .loc 1 2330 2 view .LVU311 +2329:Src/main.c **** while(tmp32<500){tmp32++;} + 995 .loc 1 2329 7 is_stmt 0 view .LVU312 996 001c 0023 movs r3, #0 -2329:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 997 .loc 1 2329 7 view .LVU313 +2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 997 .loc 1 2330 7 view .LVU313 998 001e 00E0 b .L47 999 .LVL96: 1000 .L48: -2329:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1001 .loc 1 2329 19 is_stmt 1 discriminator 2 view .LVU314 -2329:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1002 .loc 1 2329 24 is_stmt 0 discriminator 2 view .LVU315 +2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1001 .loc 1 2330 19 is_stmt 1 discriminator 2 view .LVU314 +2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1002 .loc 1 2330 24 is_stmt 0 discriminator 2 view .LVU315 1003 0020 0133 adds r3, r3, #1 1004 .LVL97: 1005 .L47: -2329:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1006 .loc 1 2329 13 is_stmt 1 discriminator 1 view .LVU316 +2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1006 .loc 1 2330 13 is_stmt 1 discriminator 1 view .LVU316 1007 0022 B3F5FA7F cmp r3, #500 1008 0026 FBD3 bcc .L48 -2330:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1009 .loc 1 2330 2 view .LVU317 +2331:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1009 .loc 1 2331 2 view .LVU317 1010 0028 0122 movs r2, #1 1011 002a 4FF48041 mov r1, #16384 1012 002e 7848 ldr r0, .L87 1013 0030 FFF7FEFF bl HAL_GPIO_WritePin 1014 .LVL98: -2331:Src/main.c **** tmp32=0; - ARM GAS /tmp/ccWQNJQt.s page 107 + ARM GAS /tmp/ccO46DoU.s page 107 - 1015 .loc 1 2331 2 view .LVU318 +2332:Src/main.c **** tmp32=0; + 1015 .loc 1 2332 2 view .LVU318 1016 0034 0122 movs r2, #1 1017 0036 4FF40071 mov r1, #512 1018 003a 7648 ldr r0, .L87+4 1019 003c FFF7FEFF bl HAL_GPIO_WritePin 1020 .LVL99: -2332:Src/main.c **** while(tmp32<500){tmp32++;} - 1021 .loc 1 2332 2 view .LVU319 -2333:Src/main.c **** if (num==1)//MPD1 - 1022 .loc 1 2333 2 view .LVU320 -2332:Src/main.c **** while(tmp32<500){tmp32++;} - 1023 .loc 1 2332 7 is_stmt 0 view .LVU321 +2333:Src/main.c **** while(tmp32<500){tmp32++;} + 1021 .loc 1 2333 2 view .LVU319 +2334:Src/main.c **** if (num==1)//MPD1 + 1022 .loc 1 2334 2 view .LVU320 +2333:Src/main.c **** while(tmp32<500){tmp32++;} + 1023 .loc 1 2333 7 is_stmt 0 view .LVU321 1024 0040 0023 movs r3, #0 -2333:Src/main.c **** if (num==1)//MPD1 - 1025 .loc 1 2333 7 view .LVU322 +2334:Src/main.c **** if (num==1)//MPD1 + 1025 .loc 1 2334 7 view .LVU322 1026 0042 00E0 b .L49 1027 .LVL100: 1028 .L50: -2333:Src/main.c **** if (num==1)//MPD1 - 1029 .loc 1 2333 19 is_stmt 1 discriminator 2 view .LVU323 -2333:Src/main.c **** if (num==1)//MPD1 - 1030 .loc 1 2333 24 is_stmt 0 discriminator 2 view .LVU324 +2334:Src/main.c **** if (num==1)//MPD1 + 1029 .loc 1 2334 19 is_stmt 1 discriminator 2 view .LVU323 +2334:Src/main.c **** if (num==1)//MPD1 + 1030 .loc 1 2334 24 is_stmt 0 discriminator 2 view .LVU324 1031 0044 0133 adds r3, r3, #1 1032 .LVL101: 1033 .L49: -2333:Src/main.c **** if (num==1)//MPD1 - 1034 .loc 1 2333 13 is_stmt 1 discriminator 1 view .LVU325 +2334:Src/main.c **** if (num==1)//MPD1 + 1034 .loc 1 2334 13 is_stmt 1 discriminator 1 view .LVU325 1035 0046 B3F5FA7F cmp r3, #500 1036 004a FBD3 bcc .L50 -2334:Src/main.c **** { - 1037 .loc 1 2334 2 view .LVU326 +2335:Src/main.c **** { + 1037 .loc 1 2335 2 view .LVU326 1038 004c 631E subs r3, r4, #1 1039 .LVL102: -2334:Src/main.c **** { - 1040 .loc 1 2334 2 is_stmt 0 view .LVU327 +2335:Src/main.c **** { + 1040 .loc 1 2335 2 is_stmt 0 view .LVU327 1041 004e 032B cmp r3, #3 1042 0050 39D8 bhi .L51 1043 0052 DFE803F0 tbb [pc, r3] @@ -6406,52 +6407,52 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1048 0059 A6 .byte (.L52-.L53)/2 1049 .p2align 1 1050 .L56: -2336:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 1051 .loc 1 2336 3 is_stmt 1 view .LVU328 +2337:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 1051 .loc 1 2337 3 is_stmt 1 view .LVU328 1052 005a 6D4C ldr r4, .L87 1053 .LVL103: -2336:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 1054 .loc 1 2336 3 is_stmt 0 view .LVU329 +2337:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 1054 .loc 1 2337 3 is_stmt 0 view .LVU329 1055 005c 0122 movs r2, #1 1056 005e 4FF40061 mov r1, #2048 1057 0062 2046 mov r0, r4 1058 0064 FFF7FEFF bl HAL_GPIO_WritePin 1059 .LVL104: -2337:Src/main.c **** tmp32=0; - ARM GAS /tmp/ccWQNJQt.s page 108 + ARM GAS /tmp/ccO46DoU.s page 108 - 1060 .loc 1 2337 3 is_stmt 1 view .LVU330 +2338:Src/main.c **** tmp32=0; + 1060 .loc 1 2338 3 is_stmt 1 view .LVU330 1061 0068 0022 movs r2, #0 1062 006a 4FF48061 mov r1, #1024 1063 006e 2046 mov r0, r4 1064 0070 FFF7FEFF bl HAL_GPIO_WritePin 1065 .LVL105: -2338:Src/main.c **** while(tmp32<500){tmp32++;} - 1066 .loc 1 2338 3 view .LVU331 -2339:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1067 .loc 1 2339 3 view .LVU332 -2338:Src/main.c **** while(tmp32<500){tmp32++;} - 1068 .loc 1 2338 8 is_stmt 0 view .LVU333 +2339:Src/main.c **** while(tmp32<500){tmp32++;} + 1066 .loc 1 2339 3 view .LVU331 +2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1067 .loc 1 2340 3 view .LVU332 +2339:Src/main.c **** while(tmp32<500){tmp32++;} + 1068 .loc 1 2339 8 is_stmt 0 view .LVU333 1069 0074 0023 movs r3, #0 -2339:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1070 .loc 1 2339 8 view .LVU334 +2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1070 .loc 1 2340 8 view .LVU334 1071 0076 00E0 b .L57 1072 .LVL106: 1073 .L58: -2339:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1074 .loc 1 2339 20 is_stmt 1 discriminator 2 view .LVU335 -2339:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1075 .loc 1 2339 25 is_stmt 0 discriminator 2 view .LVU336 +2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1074 .loc 1 2340 20 is_stmt 1 discriminator 2 view .LVU335 +2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1075 .loc 1 2340 25 is_stmt 0 discriminator 2 view .LVU336 1076 0078 0133 adds r3, r3, #1 1077 .LVL107: 1078 .L57: -2339:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1079 .loc 1 2339 14 is_stmt 1 discriminator 1 view .LVU337 +2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1079 .loc 1 2340 14 is_stmt 1 discriminator 1 view .LVU337 1080 007a B3F5FA7F cmp r3, #500 1081 007e FBD3 bcc .L58 -2341:Src/main.c **** tmp32 = 0; - 1082 .loc 1 2341 3 view .LVU338 +2342:Src/main.c **** tmp32 = 0; + 1082 .loc 1 2342 3 view .LVU338 1083 .LVL108: 1084 .LBB302: 1085 .LBI302: @@ -6477,10 +6478,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #ifndef STM32F7xx_LL_SPI_H 21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define STM32F7xx_LL_SPI_H + ARM GAS /tmp/ccO46DoU.s page 109 + + 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccWQNJQt.s page 109 - - 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** extern "C" { 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif @@ -6537,10 +6538,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_PHASE. 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func + ARM GAS /tmp/ccO46DoU.s page 110 + + 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccWQNJQt.s page 110 - - 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (N 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6597,10 +6598,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_IT IT Defines 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions 135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ + ARM GAS /tmp/ccO46DoU.s page 111 + + 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 111 - - 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty inter 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable @@ -6657,10 +6658,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_BAUDRATEPRESCALER_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< Baud 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} + ARM GAS /tmp/ccO46DoU.s page 112 + + 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 112 - - 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -6717,10 +6718,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRCCALCULATION_DISABLE 0x00000000U /*!< CRC calculation disabled + ARM GAS /tmp/ccO46DoU.s page 113 + + 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled - ARM GAS /tmp/ccWQNJQt.s page 113 - - 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6777,10 +6778,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccO46DoU.s page 114 + + 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} - ARM GAS /tmp/ccWQNJQt.s page 114 - - 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported macro ------------------------------------------------------------*/ @@ -6837,10 +6838,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR1, SPI_CR1_SPE); 1089 .loc 4 360 3 view .LVU340 + ARM GAS /tmp/ccO46DoU.s page 115 + + 1090 0080 654A ldr r2, .L87+8 - ARM GAS /tmp/ccWQNJQt.s page 115 - - 1091 0082 1368 ldr r3, [r2] 1092 .LVL109: 1093 .loc 4 360 3 is_stmt 0 view .LVU341 @@ -6850,17 +6851,17 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1097 .loc 4 360 3 view .LVU342 1098 .LBE303: 1099 .LBE302: -2342:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1100 .loc 1 2342 3 is_stmt 1 view .LVU343 -2343:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1101 .loc 1 2343 3 view .LVU344 -2342:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1102 .loc 1 2342 9 is_stmt 0 view .LVU345 +2343:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1100 .loc 1 2343 3 is_stmt 1 view .LVU343 +2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1101 .loc 1 2344 3 view .LVU344 +2343:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1102 .loc 1 2343 9 is_stmt 0 view .LVU345 1103 008a 0023 movs r3, #0 1104 .LVL111: 1105 .L59: -2343:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1106 .loc 1 2343 43 is_stmt 1 discriminator 1 view .LVU346 +2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1106 .loc 1 2344 43 is_stmt 1 discriminator 1 view .LVU346 1107 .LBB304: 1108 .LBI304: 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -6897,10 +6898,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Mode This parameter can be one of the following values: 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_MASTER 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_SLAVE + ARM GAS /tmp/ccO46DoU.s page 116 + + 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 116 - - 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode) 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -6957,10 +6958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param ClockPhase This parameter can be one of the following values: 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_1EDGE + ARM GAS /tmp/ccO46DoU.s page 117 + + 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_2EDGE - ARM GAS /tmp/ccWQNJQt.s page 117 - - 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase) @@ -7017,10 +7018,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param BaudRate This parameter can be one of the following values: 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2 + ARM GAS /tmp/ccO46DoU.s page 118 + + 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4 - ARM GAS /tmp/ccWQNJQt.s page 118 - - 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32 @@ -7077,10 +7078,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MSB_FIRST 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx) + ARM GAS /tmp/ccO46DoU.s page 119 + + 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccWQNJQt.s page 119 - - 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST)); 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7137,10 +7138,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_12BIT 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_13BIT 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_14BIT + ARM GAS /tmp/ccO46DoU.s page 120 + + 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_15BIT - ARM GAS /tmp/ccWQNJQt.s page 120 - - 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_16BIT 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -7197,10 +7198,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOThreshold(SPI_TypeDef *SPIx) 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + ARM GAS /tmp/ccO46DoU.s page 121 + + 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH)); - ARM GAS /tmp/ccWQNJQt.s page 121 - - 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7257,10 +7258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_CRC_16BIT 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccO46DoU.s page 122 + + 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetCRCWidth(SPI_TypeDef *SPIx, uint32_t CRCLength) - ARM GAS /tmp/ccWQNJQt.s page 122 - - 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_CRCL, CRCLength); 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7317,10 +7318,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get Rx CRC 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll RXCRCR RXCRC LL_SPI_GetRxCRC 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccO46DoU.s page 123 + + 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF - ARM GAS /tmp/ccWQNJQt.s page 123 - - 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -7377,10 +7378,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx) 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM)); + ARM GAS /tmp/ccO46DoU.s page 124 + + 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); - ARM GAS /tmp/ccWQNJQt.s page 124 - - 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (Ssm | Ssoe); 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7437,10 +7438,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) 1109 .loc 4 905 26 view .LVU347 1110 .LBB305: + ARM GAS /tmp/ccO46DoU.s page 125 + + 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccWQNJQt.s page 125 - - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL); 1111 .loc 4 907 3 view .LVU348 1112 .loc 4 907 12 is_stmt 0 view .LVU349 @@ -7453,22 +7454,22 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1119 .loc 4 907 68 view .LVU351 1120 .LBE305: 1121 .LBE304: -2343:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1122 .loc 1 2343 43 discriminator 2 view .LVU352 +2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1122 .loc 1 2344 43 discriminator 2 view .LVU352 1123 0096 B3F57A7F cmp r3, #1000 1124 009a 01D8 bhi .L60 -2343:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1125 .loc 1 2343 62 is_stmt 1 discriminator 3 view .LVU353 -2343:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1126 .loc 1 2343 67 is_stmt 0 discriminator 3 view .LVU354 +2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1125 .loc 1 2344 62 is_stmt 1 discriminator 3 view .LVU353 +2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1126 .loc 1 2344 67 is_stmt 0 discriminator 3 view .LVU354 1127 009c 0133 adds r3, r3, #1 1128 .LVL113: -2343:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1129 .loc 1 2343 67 discriminator 3 view .LVU355 +2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1129 .loc 1 2344 67 discriminator 3 view .LVU355 1130 009e F5E7 b .L59 1131 .L60: -2344:Src/main.c **** while(tmp32<500){tmp32++;} - 1132 .loc 1 2344 3 is_stmt 1 view .LVU356 +2345:Src/main.c **** while(tmp32<500){tmp32++;} + 1132 .loc 1 2345 3 is_stmt 1 view .LVU356 1133 .LVL114: 1134 .LBB306: 1135 .LBI306: @@ -7486,8 +7487,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1144 .loc 4 372 3 is_stmt 0 view .LVU359 1145 .LBE307: 1146 .LBE306: -2345:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1147 .loc 1 2345 3 is_stmt 1 view .LVU360 +2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1147 .loc 1 2346 3 is_stmt 1 view .LVU360 1148 .LBB309: 1149 .LBB308: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7497,30 +7498,30 @@ ARM GAS /tmp/ccWQNJQt.s page 1 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1153 .loc 4 373 1 view .LVU362 1154 .LBE308: + ARM GAS /tmp/ccO46DoU.s page 126 + + 1155 .LBE309: - ARM GAS /tmp/ccWQNJQt.s page 126 - - -2345:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1156 .loc 1 2345 20 is_stmt 1 discriminator 2 view .LVU363 -2345:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1157 .loc 1 2345 25 is_stmt 0 discriminator 2 view .LVU364 +2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1156 .loc 1 2346 20 is_stmt 1 discriminator 2 view .LVU363 +2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1157 .loc 1 2346 25 is_stmt 0 discriminator 2 view .LVU364 1158 00ac 0133 adds r3, r3, #1 1159 .LVL116: 1160 .L62: -2345:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1161 .loc 1 2345 14 is_stmt 1 discriminator 1 view .LVU365 +2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1161 .loc 1 2346 14 is_stmt 1 discriminator 1 view .LVU365 1162 00ae B3F5FA7F cmp r3, #500 1163 00b2 FBD3 bcc .L63 -2347:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 1164 .loc 1 2347 3 view .LVU366 +2348:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 1164 .loc 1 2348 3 view .LVU366 1165 00b4 0122 movs r2, #1 1166 00b6 4FF48061 mov r1, #1024 1167 00ba 5548 ldr r0, .L87 1168 00bc FFF7FEFF bl HAL_GPIO_WritePin 1169 .LVL117: -2348:Src/main.c **** } - 1170 .loc 1 2348 3 view .LVU367 +2349:Src/main.c **** } + 1170 .loc 1 2349 3 view .LVU367 1171 .LBB310: 1172 .LBI310: 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7557,10 +7558,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL); 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccO46DoU.s page 127 + + 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccWQNJQt.s page 127 - - 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get overrun error flag 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR OVR LL_SPI_IsActiveFlag_OVR @@ -7617,10 +7618,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccO46DoU.s page 128 + + 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get FIFO Transmission Level - ARM GAS /tmp/ccWQNJQt.s page 128 - - 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FTLVL LL_SPI_GetTxFIFOLevel 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: @@ -7677,10 +7678,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg = SPIx->SR; 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg; 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccO46DoU.s page 129 + + 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccWQNJQt.s page 129 - - 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear frame format error flag 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note Clearing this flag is done by reading SPIx_SR register @@ -7737,10 +7738,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_TXEIE); 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccO46DoU.s page 130 + + 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 130 - - 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable error interrupt 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR @@ -7797,10 +7798,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccO46DoU.s page 131 + + 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Tx buffer empty interrupt - ARM GAS /tmp/ccWQNJQt.s page 131 - - 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). @@ -7857,10 +7858,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccO46DoU.s page 132 + + 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx) - ARM GAS /tmp/ccWQNJQt.s page 132 - - 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7917,10 +7918,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set parity of Last DMA transmission 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMATX LL_SPI_SetDMAParity_TX + ARM GAS /tmp/ccO46DoU.s page 133 + + 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccWQNJQt.s page 133 - - 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Parity This parameter can be one of the following values: 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN @@ -7977,10 +7978,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Read 16-Bits in the data register 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_ReceiveData16 + ARM GAS /tmp/ccO46DoU.s page 134 + + 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccWQNJQt.s page 134 - - 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx) @@ -7999,57 +8000,57 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1183 .loc 4 1346 10 view .LVU372 1184 .LBE311: 1185 .LBE310: -2420:Src/main.c **** } - 1186 .loc 1 2420 2 is_stmt 1 view .LVU373 -2421:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time - 1187 .loc 1 2421 1 is_stmt 0 view .LVU374 +2421:Src/main.c **** } + 1186 .loc 1 2421 2 is_stmt 1 view .LVU373 +2422:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time + 1187 .loc 1 2422 1 is_stmt 0 view .LVU374 1188 00c6 2846 mov r0, r5 1189 00c8 38BD pop {r3, r4, r5, pc} 1190 .LVL119: 1191 .L55: -2352:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); - 1192 .loc 1 2352 3 is_stmt 1 view .LVU375 +2353:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); + 1192 .loc 1 2353 3 is_stmt 1 view .LVU375 1193 00ca 524C ldr r4, .L87+4 1194 00cc 0122 movs r2, #1 1195 00ce 4FF48061 mov r1, #1024 1196 00d2 2046 mov r0, r4 1197 00d4 FFF7FEFF bl HAL_GPIO_WritePin 1198 .LVL120: -2353:Src/main.c **** tmp32=0; - 1199 .loc 1 2353 3 view .LVU376 +2354:Src/main.c **** tmp32=0; + 1199 .loc 1 2354 3 view .LVU376 1200 00d8 0022 movs r2, #0 1201 00da 4021 movs r1, #64 1202 00dc 2046 mov r0, r4 1203 00de FFF7FEFF bl HAL_GPIO_WritePin 1204 .LVL121: -2354:Src/main.c **** while(tmp32<500){tmp32++;} - 1205 .loc 1 2354 3 view .LVU377 -2355:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1206 .loc 1 2355 3 view .LVU378 -2354:Src/main.c **** while(tmp32<500){tmp32++;} - 1207 .loc 1 2354 8 is_stmt 0 view .LVU379 +2355:Src/main.c **** while(tmp32<500){tmp32++;} + 1205 .loc 1 2355 3 view .LVU377 +2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1206 .loc 1 2356 3 view .LVU378 +2355:Src/main.c **** while(tmp32<500){tmp32++;} + 1207 .loc 1 2355 8 is_stmt 0 view .LVU379 1208 00e2 0023 movs r3, #0 -2355:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1209 .loc 1 2355 8 view .LVU380 +2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1209 .loc 1 2356 8 view .LVU380 1210 00e4 00E0 b .L64 1211 .LVL122: 1212 .L65: -2355:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1213 .loc 1 2355 20 is_stmt 1 discriminator 2 view .LVU381 -2355:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1214 .loc 1 2355 25 is_stmt 0 discriminator 2 view .LVU382 - ARM GAS /tmp/ccWQNJQt.s page 135 +2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1213 .loc 1 2356 20 is_stmt 1 discriminator 2 view .LVU381 +2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + ARM GAS /tmp/ccO46DoU.s page 135 + 1214 .loc 1 2356 25 is_stmt 0 discriminator 2 view .LVU382 1215 00e6 0133 adds r3, r3, #1 1216 .LVL123: 1217 .L64: -2355:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1218 .loc 1 2355 14 is_stmt 1 discriminator 1 view .LVU383 +2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1218 .loc 1 2356 14 is_stmt 1 discriminator 1 view .LVU383 1219 00e8 B3F5FA7F cmp r3, #500 1220 00ec FBD3 bcc .L65 -2357:Src/main.c **** tmp32 = 0; - 1221 .loc 1 2357 3 view .LVU384 +2358:Src/main.c **** tmp32 = 0; + 1221 .loc 1 2358 3 view .LVU384 1222 .LVL124: 1223 .LBB312: 1224 .LBI312: @@ -8070,17 +8071,17 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1235 .loc 4 360 3 view .LVU388 1236 .LBE313: 1237 .LBE312: -2358:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1238 .loc 1 2358 3 is_stmt 1 view .LVU389 -2359:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1239 .loc 1 2359 3 view .LVU390 -2358:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1240 .loc 1 2358 9 is_stmt 0 view .LVU391 +2359:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1238 .loc 1 2359 3 is_stmt 1 view .LVU389 +2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1239 .loc 1 2360 3 view .LVU390 +2359:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1240 .loc 1 2359 9 is_stmt 0 view .LVU391 1241 00f8 0023 movs r3, #0 1242 .LVL127: 1243 .L66: -2359:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1244 .loc 1 2359 43 is_stmt 1 discriminator 1 view .LVU392 +2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1244 .loc 1 2360 43 is_stmt 1 discriminator 1 view .LVU392 1245 .LBB314: 1246 .LBI314: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8097,29 +8098,29 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1254 00fe 12F0010F tst r2, #1 1255 0102 04D1 bne .L67 1256 .LVL128: + ARM GAS /tmp/ccO46DoU.s page 136 + + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccWQNJQt.s page 136 - - 1257 .loc 4 907 68 view .LVU397 1258 .LBE315: 1259 .LBE314: -2359:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1260 .loc 1 2359 43 discriminator 2 view .LVU398 +2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1260 .loc 1 2360 43 discriminator 2 view .LVU398 1261 0104 B3F57A7F cmp r3, #1000 1262 0108 01D8 bhi .L67 -2359:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1263 .loc 1 2359 62 is_stmt 1 discriminator 3 view .LVU399 -2359:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1264 .loc 1 2359 67 is_stmt 0 discriminator 3 view .LVU400 +2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1263 .loc 1 2360 62 is_stmt 1 discriminator 3 view .LVU399 +2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1264 .loc 1 2360 67 is_stmt 0 discriminator 3 view .LVU400 1265 010a 0133 adds r3, r3, #1 1266 .LVL129: -2359:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1267 .loc 1 2359 67 discriminator 3 view .LVU401 +2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1267 .loc 1 2360 67 discriminator 3 view .LVU401 1268 010c F5E7 b .L66 1269 .L67: -2360:Src/main.c **** while(tmp32<500){tmp32++;} - 1270 .loc 1 2360 3 is_stmt 1 view .LVU402 +2361:Src/main.c **** while(tmp32<500){tmp32++;} + 1270 .loc 1 2361 3 is_stmt 1 view .LVU402 1271 .LVL130: 1272 .LBB316: 1273 .LBI316: @@ -8137,8 +8138,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1282 .loc 4 372 3 is_stmt 0 view .LVU405 1283 .LBE317: 1284 .LBE316: -2361:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1285 .loc 1 2361 3 is_stmt 1 view .LVU406 +2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1285 .loc 1 2362 3 is_stmt 1 view .LVU406 1286 .LBB319: 1287 .LBB318: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8149,29 +8150,29 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1291 .loc 4 373 1 view .LVU408 1292 .LBE318: 1293 .LBE319: -2361:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1294 .loc 1 2361 20 is_stmt 1 discriminator 2 view .LVU409 -2361:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1295 .loc 1 2361 25 is_stmt 0 discriminator 2 view .LVU410 +2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1294 .loc 1 2362 20 is_stmt 1 discriminator 2 view .LVU409 +2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1295 .loc 1 2362 25 is_stmt 0 discriminator 2 view .LVU410 1296 011a 0133 adds r3, r3, #1 1297 .LVL132: 1298 .L69: -2361:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1299 .loc 1 2361 14 is_stmt 1 discriminator 1 view .LVU411 - ARM GAS /tmp/ccWQNJQt.s page 137 +2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + ARM GAS /tmp/ccO46DoU.s page 137 + 1299 .loc 1 2362 14 is_stmt 1 discriminator 1 view .LVU411 1300 011c B3F5FA7F cmp r3, #500 1301 0120 FBD3 bcc .L70 -2363:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 1302 .loc 1 2363 3 view .LVU412 +2364:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 1302 .loc 1 2364 3 view .LVU412 1303 0122 0122 movs r2, #1 1304 0124 4021 movs r1, #64 1305 0126 3B48 ldr r0, .L87+4 1306 0128 FFF7FEFF bl HAL_GPIO_WritePin 1307 .LVL133: -2364:Src/main.c **** } - 1308 .loc 1 2364 3 view .LVU413 +2365:Src/main.c **** } + 1308 .loc 1 2365 3 view .LVU413 1309 .LBB320: 1310 .LBI320: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8190,49 +8191,49 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1323 0132 C8E7 b .L51 1324 .LVL135: 1325 .L54: -2368:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); - 1326 .loc 1 2368 3 is_stmt 1 view .LVU419 +2369:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); + 1326 .loc 1 2369 3 is_stmt 1 view .LVU419 1327 0134 364C ldr r4, .L87 1328 0136 0122 movs r2, #1 1329 0138 4FF48061 mov r1, #1024 1330 013c 2046 mov r0, r4 1331 013e FFF7FEFF bl HAL_GPIO_WritePin 1332 .LVL136: -2369:Src/main.c **** tmp32=0; - 1333 .loc 1 2369 3 view .LVU420 +2370:Src/main.c **** tmp32=0; + 1333 .loc 1 2370 3 view .LVU420 1334 0142 0022 movs r2, #0 1335 0144 4FF40061 mov r1, #2048 1336 0148 2046 mov r0, r4 1337 014a FFF7FEFF bl HAL_GPIO_WritePin 1338 .LVL137: -2370:Src/main.c **** while(tmp32<500){tmp32++;} - 1339 .loc 1 2370 3 view .LVU421 -2371:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1340 .loc 1 2371 3 view .LVU422 -2370:Src/main.c **** while(tmp32<500){tmp32++;} - 1341 .loc 1 2370 8 is_stmt 0 view .LVU423 +2371:Src/main.c **** while(tmp32<500){tmp32++;} + 1339 .loc 1 2371 3 view .LVU421 +2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1340 .loc 1 2372 3 view .LVU422 +2371:Src/main.c **** while(tmp32<500){tmp32++;} + 1341 .loc 1 2371 8 is_stmt 0 view .LVU423 1342 014e 0023 movs r3, #0 -2371:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1343 .loc 1 2371 8 view .LVU424 +2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1343 .loc 1 2372 8 view .LVU424 1344 0150 00E0 b .L71 1345 .LVL138: 1346 .L72: -2371:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - ARM GAS /tmp/ccWQNJQt.s page 138 + ARM GAS /tmp/ccO46DoU.s page 138 - 1347 .loc 1 2371 20 is_stmt 1 discriminator 2 view .LVU425 -2371:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1348 .loc 1 2371 25 is_stmt 0 discriminator 2 view .LVU426 +2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1347 .loc 1 2372 20 is_stmt 1 discriminator 2 view .LVU425 +2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1348 .loc 1 2372 25 is_stmt 0 discriminator 2 view .LVU426 1349 0152 0133 adds r3, r3, #1 1350 .LVL139: 1351 .L71: -2371:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1352 .loc 1 2371 14 is_stmt 1 discriminator 1 view .LVU427 +2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1352 .loc 1 2372 14 is_stmt 1 discriminator 1 view .LVU427 1353 0154 B3F5FA7F cmp r3, #500 1354 0158 FBD3 bcc .L72 -2373:Src/main.c **** tmp32 = 0; - 1355 .loc 1 2373 3 view .LVU428 +2374:Src/main.c **** tmp32 = 0; + 1355 .loc 1 2374 3 view .LVU428 1356 .LVL140: 1357 .LBB322: 1358 .LBI322: @@ -8253,17 +8254,17 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1369 .loc 4 360 3 view .LVU432 1370 .LBE323: 1371 .LBE322: -2374:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1372 .loc 1 2374 3 is_stmt 1 view .LVU433 -2375:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1373 .loc 1 2375 3 view .LVU434 -2374:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1374 .loc 1 2374 9 is_stmt 0 view .LVU435 +2375:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1372 .loc 1 2375 3 is_stmt 1 view .LVU433 +2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1373 .loc 1 2376 3 view .LVU434 +2375:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1374 .loc 1 2375 9 is_stmt 0 view .LVU435 1375 0164 0023 movs r3, #0 1376 .LVL143: 1377 .L73: -2375:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1378 .loc 1 2375 43 is_stmt 1 discriminator 1 view .LVU436 +2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1378 .loc 1 2376 43 is_stmt 1 discriminator 1 view .LVU436 1379 .LBB324: 1380 .LBI324: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8277,32 +8278,32 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1386 0168 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1387 .loc 4 907 68 view .LVU440 + ARM GAS /tmp/ccO46DoU.s page 139 + + 1388 016a 12F0010F tst r2, #1 - ARM GAS /tmp/ccWQNJQt.s page 139 - - 1389 016e 04D1 bne .L74 1390 .LVL144: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1391 .loc 4 907 68 view .LVU441 1392 .LBE325: 1393 .LBE324: -2375:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1394 .loc 1 2375 43 discriminator 2 view .LVU442 +2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1394 .loc 1 2376 43 discriminator 2 view .LVU442 1395 0170 B3F57A7F cmp r3, #1000 1396 0174 01D8 bhi .L74 -2375:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1397 .loc 1 2375 62 is_stmt 1 discriminator 3 view .LVU443 -2375:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1398 .loc 1 2375 67 is_stmt 0 discriminator 3 view .LVU444 +2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1397 .loc 1 2376 62 is_stmt 1 discriminator 3 view .LVU443 +2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1398 .loc 1 2376 67 is_stmt 0 discriminator 3 view .LVU444 1399 0176 0133 adds r3, r3, #1 1400 .LVL145: -2375:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1401 .loc 1 2375 67 discriminator 3 view .LVU445 +2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1401 .loc 1 2376 67 discriminator 3 view .LVU445 1402 0178 F5E7 b .L73 1403 .L74: -2376:Src/main.c **** while(tmp32<500){tmp32++;} - 1404 .loc 1 2376 3 is_stmt 1 view .LVU446 +2377:Src/main.c **** while(tmp32<500){tmp32++;} + 1404 .loc 1 2377 3 is_stmt 1 view .LVU446 1405 .LVL146: 1406 .LBB326: 1407 .LBI326: @@ -8320,8 +8321,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1416 .loc 4 372 3 is_stmt 0 view .LVU449 1417 .LBE327: 1418 .LBE326: -2377:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1419 .loc 1 2377 3 is_stmt 1 view .LVU450 +2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1419 .loc 1 2378 3 is_stmt 1 view .LVU450 1420 .LBB329: 1421 .LBB328: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8332,29 +8333,29 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1425 .loc 4 373 1 view .LVU452 1426 .LBE328: 1427 .LBE329: -2377:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1428 .loc 1 2377 20 is_stmt 1 discriminator 2 view .LVU453 -2377:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1429 .loc 1 2377 25 is_stmt 0 discriminator 2 view .LVU454 +2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1428 .loc 1 2378 20 is_stmt 1 discriminator 2 view .LVU453 +2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1429 .loc 1 2378 25 is_stmt 0 discriminator 2 view .LVU454 1430 0186 0133 adds r3, r3, #1 + ARM GAS /tmp/ccO46DoU.s page 140 + + 1431 .LVL148: - ARM GAS /tmp/ccWQNJQt.s page 140 - - 1432 .L76: -2377:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1433 .loc 1 2377 14 is_stmt 1 discriminator 1 view .LVU455 +2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1433 .loc 1 2378 14 is_stmt 1 discriminator 1 view .LVU455 1434 0188 B3F5FA7F cmp r3, #500 1435 018c FBD3 bcc .L77 -2379:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 1436 .loc 1 2379 3 view .LVU456 +2380:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 1436 .loc 1 2380 3 view .LVU456 1437 018e 0122 movs r2, #1 1438 0190 4FF40061 mov r1, #2048 1439 0194 1E48 ldr r0, .L87 1440 0196 FFF7FEFF bl HAL_GPIO_WritePin 1441 .LVL149: -2380:Src/main.c **** } - 1442 .loc 1 2380 3 view .LVU457 +2381:Src/main.c **** } + 1442 .loc 1 2381 3 view .LVU457 1443 .LBB330: 1444 .LBI330: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8373,49 +8374,49 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1457 01a0 91E7 b .L51 1458 .LVL151: 1459 .L52: -2384:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); - 1460 .loc 1 2384 3 is_stmt 1 view .LVU463 +2385:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); + 1460 .loc 1 2385 3 is_stmt 1 view .LVU463 1461 01a2 1C4C ldr r4, .L87+4 1462 01a4 0122 movs r2, #1 1463 01a6 4021 movs r1, #64 1464 01a8 2046 mov r0, r4 1465 01aa FFF7FEFF bl HAL_GPIO_WritePin 1466 .LVL152: -2385:Src/main.c **** tmp32=0; - 1467 .loc 1 2385 3 view .LVU464 +2386:Src/main.c **** tmp32=0; + 1467 .loc 1 2386 3 view .LVU464 1468 01ae 0022 movs r2, #0 1469 01b0 4FF48061 mov r1, #1024 1470 01b4 2046 mov r0, r4 1471 01b6 FFF7FEFF bl HAL_GPIO_WritePin 1472 .LVL153: -2386:Src/main.c **** while(tmp32<500){tmp32++;} - 1473 .loc 1 2386 3 view .LVU465 -2387:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1474 .loc 1 2387 3 view .LVU466 -2386:Src/main.c **** while(tmp32<500){tmp32++;} - 1475 .loc 1 2386 8 is_stmt 0 view .LVU467 +2387:Src/main.c **** while(tmp32<500){tmp32++;} + 1473 .loc 1 2387 3 view .LVU465 +2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1474 .loc 1 2388 3 view .LVU466 +2387:Src/main.c **** while(tmp32<500){tmp32++;} + 1475 .loc 1 2387 8 is_stmt 0 view .LVU467 1476 01ba 0023 movs r3, #0 -2387:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1477 .loc 1 2387 8 view .LVU468 +2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1477 .loc 1 2388 8 view .LVU468 + ARM GAS /tmp/ccO46DoU.s page 141 + + 1478 01bc 00E0 b .L78 - ARM GAS /tmp/ccWQNJQt.s page 141 - - 1479 .LVL154: 1480 .L79: -2387:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1481 .loc 1 2387 20 is_stmt 1 discriminator 2 view .LVU469 -2387:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1482 .loc 1 2387 25 is_stmt 0 discriminator 2 view .LVU470 +2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1481 .loc 1 2388 20 is_stmt 1 discriminator 2 view .LVU469 +2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1482 .loc 1 2388 25 is_stmt 0 discriminator 2 view .LVU470 1483 01be 0133 adds r3, r3, #1 1484 .LVL155: 1485 .L78: -2387:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1486 .loc 1 2387 14 is_stmt 1 discriminator 1 view .LVU471 +2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1486 .loc 1 2388 14 is_stmt 1 discriminator 1 view .LVU471 1487 01c0 B3F5FA7F cmp r3, #500 1488 01c4 FBD3 bcc .L79 -2389:Src/main.c **** tmp32 = 0; - 1489 .loc 1 2389 3 view .LVU472 +2390:Src/main.c **** tmp32 = 0; + 1489 .loc 1 2390 3 view .LVU472 1490 .LVL156: 1491 .LBB332: 1492 .LBI332: @@ -8436,17 +8437,17 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1503 .loc 4 360 3 view .LVU476 1504 .LBE333: 1505 .LBE332: -2390:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1506 .loc 1 2390 3 is_stmt 1 view .LVU477 -2391:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1507 .loc 1 2391 3 view .LVU478 -2390:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1508 .loc 1 2390 9 is_stmt 0 view .LVU479 +2391:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1506 .loc 1 2391 3 is_stmt 1 view .LVU477 +2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1507 .loc 1 2392 3 view .LVU478 +2391:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1508 .loc 1 2391 9 is_stmt 0 view .LVU479 1509 01d0 0023 movs r3, #0 1510 .LVL159: 1511 .L80: -2391:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1512 .loc 1 2391 43 is_stmt 1 discriminator 1 view .LVU480 +2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1512 .loc 1 2392 43 is_stmt 1 discriminator 1 view .LVU480 1513 .LBB334: 1514 .LBI334: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8457,10 +8458,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1518 .loc 4 907 12 is_stmt 0 view .LVU483 1519 01d2 124A ldr r2, .L87+12 + ARM GAS /tmp/ccO46DoU.s page 142 + + 1520 01d4 9268 ldr r2, [r2, #8] - ARM GAS /tmp/ccWQNJQt.s page 142 - - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1521 .loc 4 907 68 view .LVU484 1522 01d6 12F0010F tst r2, #1 @@ -8470,22 +8471,22 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1525 .loc 4 907 68 view .LVU485 1526 .LBE335: 1527 .LBE334: -2391:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1528 .loc 1 2391 43 discriminator 2 view .LVU486 +2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1528 .loc 1 2392 43 discriminator 2 view .LVU486 1529 01dc B3F57A7F cmp r3, #1000 1530 01e0 01D8 bhi .L81 -2391:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1531 .loc 1 2391 62 is_stmt 1 discriminator 3 view .LVU487 -2391:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1532 .loc 1 2391 67 is_stmt 0 discriminator 3 view .LVU488 +2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1531 .loc 1 2392 62 is_stmt 1 discriminator 3 view .LVU487 +2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1532 .loc 1 2392 67 is_stmt 0 discriminator 3 view .LVU488 1533 01e2 0133 adds r3, r3, #1 1534 .LVL161: -2391:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1535 .loc 1 2391 67 discriminator 3 view .LVU489 +2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1535 .loc 1 2392 67 discriminator 3 view .LVU489 1536 01e4 F5E7 b .L80 1537 .L81: -2392:Src/main.c **** while(tmp32<500){tmp32++;} - 1538 .loc 1 2392 3 is_stmt 1 view .LVU490 +2393:Src/main.c **** while(tmp32<500){tmp32++;} + 1538 .loc 1 2393 3 is_stmt 1 view .LVU490 1539 .LVL162: 1540 .LBB336: 1541 .LBI336: @@ -8503,8 +8504,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1550 .loc 4 372 3 is_stmt 0 view .LVU493 1551 .LBE337: 1552 .LBE336: -2393:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1553 .loc 1 2393 3 is_stmt 1 view .LVU494 +2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1553 .loc 1 2394 3 is_stmt 1 view .LVU494 1554 .LBB339: 1555 .LBB338: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8515,29 +8516,29 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1559 .loc 4 373 1 view .LVU496 1560 .LBE338: 1561 .LBE339: -2393:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1562 .loc 1 2393 20 is_stmt 1 discriminator 2 view .LVU497 -2393:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - ARM GAS /tmp/ccWQNJQt.s page 143 +2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1562 .loc 1 2394 20 is_stmt 1 discriminator 2 view .LVU497 + ARM GAS /tmp/ccO46DoU.s page 143 - 1563 .loc 1 2393 25 is_stmt 0 discriminator 2 view .LVU498 +2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1563 .loc 1 2394 25 is_stmt 0 discriminator 2 view .LVU498 1564 01f2 0133 adds r3, r3, #1 1565 .LVL164: 1566 .L83: -2393:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1567 .loc 1 2393 14 is_stmt 1 discriminator 1 view .LVU499 +2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1567 .loc 1 2394 14 is_stmt 1 discriminator 1 view .LVU499 1568 01f4 B3F5FA7F cmp r3, #500 1569 01f8 FBD3 bcc .L84 -2395:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 1570 .loc 1 2395 3 view .LVU500 +2396:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 1570 .loc 1 2396 3 view .LVU500 1571 01fa 0122 movs r2, #1 1572 01fc 4FF48061 mov r1, #1024 1573 0200 0448 ldr r0, .L87+4 1574 0202 FFF7FEFF bl HAL_GPIO_WritePin 1575 .LVL165: -2396:Src/main.c **** } - 1576 .loc 1 2396 3 view .LVU501 +2397:Src/main.c **** } + 1576 .loc 1 2397 3 view .LVU501 1577 .LBB340: 1578 .LBI340: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8570,197 +8571,197 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1606 .thumb_func 1608 Stop_TIM10: 1609 .LFB1223: -2561:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) -2562:Src/main.c **** { -2563:Src/main.c **** uint16_t cl_ind; -2564:Src/main.c **** -2565:Src/main.c **** switch (UART_header) -2566:Src/main.c **** { -2567:Src/main.c **** case 0x7777: -2568:Src/main.c **** cl_ind = TSK_16 - 2; - ARM GAS /tmp/ccWQNJQt.s page 144 +2562:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) +2563:Src/main.c **** { +2564:Src/main.c **** uint16_t cl_ind; +2565:Src/main.c **** +2566:Src/main.c **** switch (UART_header) +2567:Src/main.c **** { +2568:Src/main.c **** case 0x7777: + ARM GAS /tmp/ccO46DoU.s page 144 -2569:Src/main.c **** break; -2570:Src/main.c **** case 0x1111: -2571:Src/main.c **** cl_ind = CL_16 - 2; -2572:Src/main.c **** break; -2573:Src/main.c **** default: -2574:Src/main.c **** return 0; -2575:Src/main.c **** break; -2576:Src/main.c **** } -2577:Src/main.c **** -2578:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); -2579:Src/main.c **** -2580:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); -2581:Src/main.c **** } -2582:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) -2583:Src/main.c **** { -2584:Src/main.c **** short i; -2585:Src/main.c **** uint16_t cs = *pbuff; -2586:Src/main.c **** -2587:Src/main.c **** for(i = 1; i < len; i++) -2588:Src/main.c **** { -2589:Src/main.c **** cs ^= *(pbuff+i); -2590:Src/main.c **** } -2591:Src/main.c **** return cs; -2592:Src/main.c **** } -2593:Src/main.c **** -2594:Src/main.c **** /*int SD_Init(void) -2595:Src/main.c **** { -2596:Src/main.c **** int test=0; -2597:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2598:Src/main.c **** { -2599:Src/main.c **** test = Mount_SD("/"); -2600:Src/main.c **** if (test == 0) //0 - suc -2601:Src/main.c **** { -2602:Src/main.c **** //Format_SD(); -2603:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc -2604:Src/main.c **** //Create_File("FILE2.TXT"); -2605:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part -2606:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2607:Src/main.c **** return test; -2608:Src/main.c **** } -2609:Src/main.c **** else -2610:Src/main.c **** { -2611:Src/main.c **** return 1; -2612:Src/main.c **** } -2613:Src/main.c **** } -2614:Src/main.c **** else -2615:Src/main.c **** { -2616:Src/main.c **** return 1; -2617:Src/main.c **** } -2618:Src/main.c **** }*/ -2619:Src/main.c **** -2620:Src/main.c **** int SD_SAVE(uint16_t *pbuff) -2621:Src/main.c **** { -2622:Src/main.c **** int test=0; -2623:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2624:Src/main.c **** { -2625:Src/main.c **** test = Mount_SD("/"); - ARM GAS /tmp/ccWQNJQt.s page 145 +2569:Src/main.c **** cl_ind = TSK_16 - 2; +2570:Src/main.c **** break; +2571:Src/main.c **** case 0x1111: +2572:Src/main.c **** cl_ind = CL_16 - 2; +2573:Src/main.c **** break; +2574:Src/main.c **** default: +2575:Src/main.c **** return 0; +2576:Src/main.c **** break; +2577:Src/main.c **** } +2578:Src/main.c **** +2579:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); +2580:Src/main.c **** +2581:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); +2582:Src/main.c **** } +2583:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) +2584:Src/main.c **** { +2585:Src/main.c **** short i; +2586:Src/main.c **** uint16_t cs = *pbuff; +2587:Src/main.c **** +2588:Src/main.c **** for(i = 1; i < len; i++) +2589:Src/main.c **** { +2590:Src/main.c **** cs ^= *(pbuff+i); +2591:Src/main.c **** } +2592:Src/main.c **** return cs; +2593:Src/main.c **** } +2594:Src/main.c **** +2595:Src/main.c **** /*int SD_Init(void) +2596:Src/main.c **** { +2597:Src/main.c **** int test=0; +2598:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) +2599:Src/main.c **** { +2600:Src/main.c **** test = Mount_SD("/"); +2601:Src/main.c **** if (test == 0) //0 - suc +2602:Src/main.c **** { +2603:Src/main.c **** //Format_SD(); +2604:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc +2605:Src/main.c **** //Create_File("FILE2.TXT"); +2606:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part +2607:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2608:Src/main.c **** return test; +2609:Src/main.c **** } +2610:Src/main.c **** else +2611:Src/main.c **** { +2612:Src/main.c **** return 1; +2613:Src/main.c **** } +2614:Src/main.c **** } +2615:Src/main.c **** else +2616:Src/main.c **** { +2617:Src/main.c **** return 1; +2618:Src/main.c **** } +2619:Src/main.c **** }*/ +2620:Src/main.c **** +2621:Src/main.c **** int SD_SAVE(uint16_t *pbuff) +2622:Src/main.c **** { +2623:Src/main.c **** int test=0; +2624:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) +2625:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 145 -2626:Src/main.c **** if (test == 0) //0 - suc -2627:Src/main.c **** { -2628:Src/main.c **** //Format_SD(); -2629:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); -2630:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2631:Src/main.c **** return test; -2632:Src/main.c **** } -2633:Src/main.c **** else -2634:Src/main.c **** { -2635:Src/main.c **** return 1; -2636:Src/main.c **** } -2637:Src/main.c **** } -2638:Src/main.c **** else -2639:Src/main.c **** { -2640:Src/main.c **** return 1; -2641:Src/main.c **** } -2642:Src/main.c **** } -2643:Src/main.c **** +2626:Src/main.c **** test = Mount_SD("/"); +2627:Src/main.c **** if (test == 0) //0 - suc +2628:Src/main.c **** { +2629:Src/main.c **** //Format_SD(); +2630:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); +2631:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2632:Src/main.c **** return test; +2633:Src/main.c **** } +2634:Src/main.c **** else +2635:Src/main.c **** { +2636:Src/main.c **** return 1; +2637:Src/main.c **** } +2638:Src/main.c **** } +2639:Src/main.c **** else +2640:Src/main.c **** { +2641:Src/main.c **** return 1; +2642:Src/main.c **** } +2643:Src/main.c **** } 2644:Src/main.c **** 2645:Src/main.c **** -2646:Src/main.c **** //uint32_t Get_Length(void) -2647:Src/main.c **** //{ -2648:Src/main.c **** // return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16); -2649:Src/main.c **** //} -2650:Src/main.c **** -2651:Src/main.c **** int SD_READ(uint16_t *pbuff) -2652:Src/main.c **** { -2653:Src/main.c **** int test=0; -2654:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2655:Src/main.c **** { -2656:Src/main.c **** test = Mount_SD("/"); -2657:Src/main.c **** if (test == 0) //0 - suc -2658:Src/main.c **** { -2659:Src/main.c **** //Format_SD(); -2660:Src/main.c **** test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes -2661:Src/main.c **** fgoto+=DL_8; -2662:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2663:Src/main.c **** return test; -2664:Src/main.c **** } -2665:Src/main.c **** else -2666:Src/main.c **** { -2667:Src/main.c **** return 1; -2668:Src/main.c **** } -2669:Src/main.c **** } -2670:Src/main.c **** else -2671:Src/main.c **** { -2672:Src/main.c **** return 1; -2673:Src/main.c **** } -2674:Src/main.c **** -2675:Src/main.c **** /* for (uint16_t j = 0; j < DL_16; j++) -2676:Src/main.c **** { -2677:Src/main.c **** *(pbuff+j) = SD_matr[SD_SLIDE][j]; -2678:Src/main.c **** } -2679:Src/main.c **** if (SD_SLIDEAHB3ENR, Periphs) == Periphs); 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** + ARM GAS /tmp/ccO46DoU.s page 170 + + 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 170 - - 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripherals clock. 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock @@ -10197,10 +10198,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI + ARM GAS /tmp/ccO46DoU.s page 171 + + 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * - ARM GAS /tmp/ccWQNJQt.s page 171 - - 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ @@ -10257,10 +10258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_EnableClock\n 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n + ARM GAS /tmp/ccO46DoU.s page 172 + + 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n - ARM GAS /tmp/ccWQNJQt.s page 172 - - 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_EnableClock\n @@ -10317,10 +10318,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs); 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + ARM GAS /tmp/ccO46DoU.s page 173 + + 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccWQNJQt.s page 173 - - 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n @@ -10377,10 +10378,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) + ARM GAS /tmp/ccO46DoU.s page 174 + + 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 - ARM GAS /tmp/ccWQNJQt.s page 174 - - 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) @@ -10437,10 +10438,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + ARM GAS /tmp/ccO46DoU.s page 175 + + 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 - ARM GAS /tmp/ccWQNJQt.s page 175 - - 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 @@ -10497,10 +10498,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n + ARM GAS /tmp/ccO46DoU.s page 176 + + 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n - ARM GAS /tmp/ccWQNJQt.s page 176 - - 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ForceReset\n 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n @@ -10557,10 +10558,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ReleaseReset\n 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n + ARM GAS /tmp/ccO46DoU.s page 177 + + 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n - ARM GAS /tmp/ccWQNJQt.s page 177 - - 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n @@ -10617,10 +10618,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * + ARM GAS /tmp/ccO46DoU.s page 178 + + 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/ccWQNJQt.s page 178 - - 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) @@ -10677,10 +10678,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + ARM GAS /tmp/ccO46DoU.s page 179 + + 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 - ARM GAS /tmp/ccWQNJQt.s page 179 - - 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 @@ -10737,10 +10738,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN2LPEN LL_APB1_GRP1_DisableClockLowPower\n 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN3LPEN LL_APB1_GRP1_DisableClockLowPower\n 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccO46DoU.s page 180 + + 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccWQNJQt.s page 180 - - 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_DisableClockLowPower\n @@ -10797,10 +10798,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB2 peripherals clock. 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n + ARM GAS /tmp/ccO46DoU.s page 181 + + 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n - ARM GAS /tmp/ccWQNJQt.s page 181 - - 1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n 1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n 1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n @@ -10857,10 +10858,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2154 .LBB351: 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; + ARM GAS /tmp/ccO46DoU.s page 182 + + 2155 .loc 3 1589 3 view .LVU692 - ARM GAS /tmp/ccWQNJQt.s page 182 - - 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); 2156 .loc 3 1590 3 view .LVU693 2157 001e 2A4B ldr r3, .L99 @@ -10882,8 +10883,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2170 .loc 3 1593 3 is_stmt 0 view .LVU698 2171 .LBE351: 2172 .LBE350: -1060:Src/main.c **** /**SPI4 GPIO Configuration - 2173 .loc 1 1060 3 is_stmt 1 view .LVU699 +1061:Src/main.c **** /**SPI4 GPIO Configuration + 2173 .loc 1 1061 3 is_stmt 1 view .LVU699 2174 .LBB352: 2175 .LBI352: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -10913,152 +10914,152 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2192 .loc 3 315 3 is_stmt 0 view .LVU707 2193 .LBE353: 2194 .LBE352: -1065:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2195 .loc 1 1065 3 is_stmt 1 view .LVU708 -1065:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2196 .loc 1 1065 23 is_stmt 0 view .LVU709 +1066:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2195 .loc 1 1066 3 is_stmt 1 view .LVU708 +1066:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2196 .loc 1 1066 23 is_stmt 0 view .LVU709 + ARM GAS /tmp/ccO46DoU.s page 183 + + 2197 0044 4FF48053 mov r3, #4096 - ARM GAS /tmp/ccWQNJQt.s page 183 - - 2198 0048 0293 str r3, [sp, #8] -1066:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2199 .loc 1 1066 3 is_stmt 1 view .LVU710 -1066:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2200 .loc 1 1066 24 is_stmt 0 view .LVU711 +1067:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2199 .loc 1 1067 3 is_stmt 1 view .LVU710 +1067:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2200 .loc 1 1067 24 is_stmt 0 view .LVU711 2201 004a 0225 movs r5, #2 2202 004c 0395 str r5, [sp, #12] -1067:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2203 .loc 1 1067 3 is_stmt 1 view .LVU712 -1067:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2204 .loc 1 1067 25 is_stmt 0 view .LVU713 +1068:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2203 .loc 1 1068 3 is_stmt 1 view .LVU712 +1068:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2204 .loc 1 1068 25 is_stmt 0 view .LVU713 2205 004e 4FF00308 mov r8, #3 2206 0052 CDF81080 str r8, [sp, #16] -1068:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2207 .loc 1 1068 3 is_stmt 1 view .LVU714 -1069:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2208 .loc 1 1069 3 view .LVU715 -1070:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2209 .loc 1 1070 3 view .LVU716 -1070:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2210 .loc 1 1070 29 is_stmt 0 view .LVU717 +1069:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2207 .loc 1 1069 3 is_stmt 1 view .LVU714 +1070:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2208 .loc 1 1070 3 view .LVU715 +1071:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2209 .loc 1 1071 3 view .LVU716 +1071:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2210 .loc 1 1071 29 is_stmt 0 view .LVU717 2211 0056 0527 movs r7, #5 2212 0058 0797 str r7, [sp, #28] -1071:Src/main.c **** - 2213 .loc 1 1071 3 is_stmt 1 view .LVU718 +1072:Src/main.c **** + 2213 .loc 1 1072 3 is_stmt 1 view .LVU718 2214 005a 1C4E ldr r6, .L99+4 2215 005c 02A9 add r1, sp, #8 2216 005e 3046 mov r0, r6 2217 0060 FFF7FEFF bl LL_GPIO_Init 2218 .LVL195: -1073:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2219 .loc 1 1073 3 view .LVU719 -1073:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2220 .loc 1 1073 23 is_stmt 0 view .LVU720 +1074:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2219 .loc 1 1074 3 view .LVU719 +1074:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2220 .loc 1 1074 23 is_stmt 0 view .LVU720 2221 0064 4FF40053 mov r3, #8192 2222 0068 0293 str r3, [sp, #8] -1074:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2223 .loc 1 1074 3 is_stmt 1 view .LVU721 -1074:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2224 .loc 1 1074 24 is_stmt 0 view .LVU722 +1075:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2223 .loc 1 1075 3 is_stmt 1 view .LVU721 +1075:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2224 .loc 1 1075 24 is_stmt 0 view .LVU722 2225 006a 0395 str r5, [sp, #12] -1075:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2226 .loc 1 1075 3 is_stmt 1 view .LVU723 -1075:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2227 .loc 1 1075 25 is_stmt 0 view .LVU724 +1076:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2226 .loc 1 1076 3 is_stmt 1 view .LVU723 +1076:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2227 .loc 1 1076 25 is_stmt 0 view .LVU724 2228 006c CDF81080 str r8, [sp, #16] -1076:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2229 .loc 1 1076 3 is_stmt 1 view .LVU725 -1076:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2230 .loc 1 1076 30 is_stmt 0 view .LVU726 +1077:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2229 .loc 1 1077 3 is_stmt 1 view .LVU725 +1077:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2230 .loc 1 1077 30 is_stmt 0 view .LVU726 2231 0070 0594 str r4, [sp, #20] -1077:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2232 .loc 1 1077 3 is_stmt 1 view .LVU727 -1077:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2233 .loc 1 1077 24 is_stmt 0 view .LVU728 +1078:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2232 .loc 1 1078 3 is_stmt 1 view .LVU727 +1078:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2233 .loc 1 1078 24 is_stmt 0 view .LVU728 2234 0072 0694 str r4, [sp, #24] -1078:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - ARM GAS /tmp/ccWQNJQt.s page 184 + ARM GAS /tmp/ccO46DoU.s page 184 - 2235 .loc 1 1078 3 is_stmt 1 view .LVU729 -1078:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2236 .loc 1 1078 29 is_stmt 0 view .LVU730 +1079:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2235 .loc 1 1079 3 is_stmt 1 view .LVU729 +1079:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2236 .loc 1 1079 29 is_stmt 0 view .LVU730 2237 0074 0797 str r7, [sp, #28] -1079:Src/main.c **** - 2238 .loc 1 1079 3 is_stmt 1 view .LVU731 +1080:Src/main.c **** + 2238 .loc 1 1080 3 is_stmt 1 view .LVU731 2239 0076 02A9 add r1, sp, #8 2240 0078 3046 mov r0, r6 2241 007a FFF7FEFF bl LL_GPIO_Init 2242 .LVL196: -1085:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2243 .loc 1 1085 3 view .LVU732 -1085:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2244 .loc 1 1085 36 is_stmt 0 view .LVU733 +1086:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2243 .loc 1 1086 3 view .LVU732 +1086:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2244 .loc 1 1086 36 is_stmt 0 view .LVU733 2245 007e 4FF48063 mov r3, #1024 2246 0082 0893 str r3, [sp, #32] -1086:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2247 .loc 1 1086 3 is_stmt 1 view .LVU734 -1086:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2248 .loc 1 1086 23 is_stmt 0 view .LVU735 +1087:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2247 .loc 1 1087 3 is_stmt 1 view .LVU734 +1087:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2248 .loc 1 1087 23 is_stmt 0 view .LVU735 2249 0084 4FF48273 mov r3, #260 2250 0088 0993 str r3, [sp, #36] -1087:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2251 .loc 1 1087 3 is_stmt 1 view .LVU736 -1087:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2252 .loc 1 1087 28 is_stmt 0 view .LVU737 +1088:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2251 .loc 1 1088 3 is_stmt 1 view .LVU736 +1088:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2252 .loc 1 1088 28 is_stmt 0 view .LVU737 2253 008a 4FF47063 mov r3, #3840 2254 008e 0A93 str r3, [sp, #40] -1088:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2255 .loc 1 1088 3 is_stmt 1 view .LVU738 -1088:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2256 .loc 1 1088 32 is_stmt 0 view .LVU739 +1089:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2255 .loc 1 1089 3 is_stmt 1 view .LVU738 +1089:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2256 .loc 1 1089 32 is_stmt 0 view .LVU739 2257 0090 0B95 str r5, [sp, #44] -1089:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2258 .loc 1 1089 3 is_stmt 1 view .LVU740 -1089:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2259 .loc 1 1089 29 is_stmt 0 view .LVU741 +1090:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2258 .loc 1 1090 3 is_stmt 1 view .LVU740 +1090:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2259 .loc 1 1090 29 is_stmt 0 view .LVU741 2260 0092 0C94 str r4, [sp, #48] -1090:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2261 .loc 1 1090 3 is_stmt 1 view .LVU742 -1090:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2262 .loc 1 1090 22 is_stmt 0 view .LVU743 +1091:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2261 .loc 1 1091 3 is_stmt 1 view .LVU742 +1091:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2262 .loc 1 1091 22 is_stmt 0 view .LVU743 2263 0094 4FF40073 mov r3, #512 2264 0098 0D93 str r3, [sp, #52] -1091:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2265 .loc 1 1091 3 is_stmt 1 view .LVU744 -1091:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2266 .loc 1 1091 27 is_stmt 0 view .LVU745 +1092:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2265 .loc 1 1092 3 is_stmt 1 view .LVU744 +1092:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2266 .loc 1 1092 27 is_stmt 0 view .LVU745 2267 009a 1823 movs r3, #24 2268 009c 0E93 str r3, [sp, #56] -1092:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2269 .loc 1 1092 3 is_stmt 1 view .LVU746 -1092:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2270 .loc 1 1092 27 is_stmt 0 view .LVU747 +1093:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2269 .loc 1 1093 3 is_stmt 1 view .LVU746 +1093:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2270 .loc 1 1093 27 is_stmt 0 view .LVU747 2271 009e 0F94 str r4, [sp, #60] -1093:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2272 .loc 1 1093 3 is_stmt 1 view .LVU748 - ARM GAS /tmp/ccWQNJQt.s page 185 +1094:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + ARM GAS /tmp/ccO46DoU.s page 185 -1093:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2273 .loc 1 1093 33 is_stmt 0 view .LVU749 + 2272 .loc 1 1094 3 is_stmt 1 view .LVU748 +1094:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2273 .loc 1 1094 33 is_stmt 0 view .LVU749 2274 00a0 1094 str r4, [sp, #64] -1094:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 2275 .loc 1 1094 3 is_stmt 1 view .LVU750 -1094:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 2276 .loc 1 1094 26 is_stmt 0 view .LVU751 +1095:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 2275 .loc 1 1095 3 is_stmt 1 view .LVU750 +1095:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 2276 .loc 1 1095 26 is_stmt 0 view .LVU751 2277 00a2 0723 movs r3, #7 2278 00a4 1193 str r3, [sp, #68] -1095:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); - 2279 .loc 1 1095 3 is_stmt 1 view .LVU752 +1096:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); + 2279 .loc 1 1096 3 is_stmt 1 view .LVU752 2280 00a6 0A4C ldr r4, .L99+8 2281 00a8 08A9 add r1, sp, #32 2282 00aa 2046 mov r0, r4 2283 00ac FFF7FEFF bl LL_SPI_Init 2284 .LVL197: -1096:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); - 2285 .loc 1 1096 3 view .LVU753 +1097:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); + 2285 .loc 1 1097 3 view .LVU753 2286 .LBB354: 2287 .LBI354: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11074,8 +11075,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2295 .loc 4 428 3 is_stmt 0 view .LVU756 2296 .LBE355: 2297 .LBE354: -1097:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ - 2298 .loc 1 1097 3 is_stmt 1 view .LVU757 +1098:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ + 2298 .loc 1 1098 3 is_stmt 1 view .LVU757 2299 .LBB356: 2300 .LBI356: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11091,16 +11092,16 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2308 .loc 4 876 3 is_stmt 0 view .LVU760 2309 .LBE357: 2310 .LBE356: -1102:Src/main.c **** - 2311 .loc 1 1102 1 view .LVU761 +1103:Src/main.c **** + 2311 .loc 1 1103 1 view .LVU761 2312 00c0 12B0 add sp, sp, #72 2313 .LCFI17: 2314 .cfi_def_cfa_offset 24 2315 @ sp needed + ARM GAS /tmp/ccO46DoU.s page 186 + + 2316 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - ARM GAS /tmp/ccWQNJQt.s page 186 - - 2317 .L100: 2318 00c6 00BF .align 2 2319 .L99: @@ -11116,8 +11117,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2330 .thumb_func 2332 MX_SPI2_Init: 2333 .LFB1191: - 984:Src/main.c **** - 2334 .loc 1 984 1 is_stmt 1 view -0 + 985:Src/main.c **** + 2334 .loc 1 985 1 is_stmt 1 view -0 2335 .cfi_startproc 2336 @ args = 0, pretend = 0, frame = 72 2337 @ frame_needed = 0, uses_anonymous_args = 0 @@ -11133,19 +11134,19 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2347 0004 92B0 sub sp, sp, #72 2348 .LCFI19: 2349 .cfi_def_cfa_offset 96 - 990:Src/main.c **** - 2350 .loc 1 990 3 view .LVU763 - 990:Src/main.c **** - 2351 .loc 1 990 22 is_stmt 0 view .LVU764 + 991:Src/main.c **** + 2350 .loc 1 991 3 view .LVU763 + 991:Src/main.c **** + 2351 .loc 1 991 22 is_stmt 0 view .LVU764 2352 0006 2822 movs r2, #40 2353 0008 0021 movs r1, #0 2354 000a 08A8 add r0, sp, #32 2355 000c FFF7FEFF bl memset 2356 .LVL200: - 992:Src/main.c **** - 2357 .loc 1 992 3 is_stmt 1 view .LVU765 - 992:Src/main.c **** - 2358 .loc 1 992 23 is_stmt 0 view .LVU766 + 993:Src/main.c **** + 2357 .loc 1 993 3 is_stmt 1 view .LVU765 + 993:Src/main.c **** + 2358 .loc 1 993 23 is_stmt 0 view .LVU766 2359 0010 0024 movs r4, #0 2360 0012 0294 str r4, [sp, #8] 2361 0014 0394 str r4, [sp, #12] @@ -11153,14 +11154,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2363 0018 0594 str r4, [sp, #20] 2364 001a 0694 str r4, [sp, #24] 2365 001c 0794 str r4, [sp, #28] - 995:Src/main.c **** - 2366 .loc 1 995 3 is_stmt 1 view .LVU767 + 996:Src/main.c **** + 2366 .loc 1 996 3 is_stmt 1 view .LVU767 2367 .LVL201: 2368 .LBB358: + ARM GAS /tmp/ccO46DoU.s page 187 + + 2369 .LBI358: - ARM GAS /tmp/ccWQNJQt.s page 187 - - 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 2370 .loc 3 1071 22 view .LVU768 2371 .LBB359: @@ -11189,8 +11190,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2387 .loc 3 1077 3 is_stmt 0 view .LVU775 2388 .LBE359: 2389 .LBE358: - 997:Src/main.c **** /**SPI2 GPIO Configuration - 2390 .loc 1 997 3 is_stmt 1 view .LVU776 + 998:Src/main.c **** /**SPI2 GPIO Configuration + 2390 .loc 1 998 3 is_stmt 1 view .LVU776 2391 .LBB360: 2392 .LBI360: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -11217,155 +11218,155 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2407 0042 009B ldr r3, [sp] 2408 .LVL203: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + ARM GAS /tmp/ccO46DoU.s page 188 + + 2409 .loc 3 315 3 is_stmt 0 view .LVU784 - ARM GAS /tmp/ccWQNJQt.s page 188 - - 2410 .LBE361: 2411 .LBE360: -1002:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2412 .loc 1 1002 3 is_stmt 1 view .LVU785 -1002:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2413 .loc 1 1002 23 is_stmt 0 view .LVU786 +1003:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2412 .loc 1 1003 3 is_stmt 1 view .LVU785 +1003:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2413 .loc 1 1003 23 is_stmt 0 view .LVU786 2414 0044 4FF40053 mov r3, #8192 2415 0048 0293 str r3, [sp, #8] -1003:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2416 .loc 1 1003 3 is_stmt 1 view .LVU787 -1003:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2417 .loc 1 1003 24 is_stmt 0 view .LVU788 +1004:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2416 .loc 1 1004 3 is_stmt 1 view .LVU787 +1004:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2417 .loc 1 1004 24 is_stmt 0 view .LVU788 2418 004a 0225 movs r5, #2 2419 004c 0395 str r5, [sp, #12] -1004:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2420 .loc 1 1004 3 is_stmt 1 view .LVU789 -1004:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2421 .loc 1 1004 25 is_stmt 0 view .LVU790 +1005:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2420 .loc 1 1005 3 is_stmt 1 view .LVU789 +1005:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2421 .loc 1 1005 25 is_stmt 0 view .LVU790 2422 004e 4FF00308 mov r8, #3 2423 0052 CDF81080 str r8, [sp, #16] -1005:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2424 .loc 1 1005 3 is_stmt 1 view .LVU791 -1006:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2425 .loc 1 1006 3 view .LVU792 -1007:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2426 .loc 1 1007 3 view .LVU793 -1007:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2427 .loc 1 1007 29 is_stmt 0 view .LVU794 +1006:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2424 .loc 1 1006 3 is_stmt 1 view .LVU791 +1007:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2425 .loc 1 1007 3 view .LVU792 +1008:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2426 .loc 1 1008 3 view .LVU793 +1008:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2427 .loc 1 1008 29 is_stmt 0 view .LVU794 2428 0056 0527 movs r7, #5 2429 0058 0797 str r7, [sp, #28] -1008:Src/main.c **** - 2430 .loc 1 1008 3 is_stmt 1 view .LVU795 +1009:Src/main.c **** + 2430 .loc 1 1009 3 is_stmt 1 view .LVU795 2431 005a 1B4E ldr r6, .L103+4 2432 005c 02A9 add r1, sp, #8 2433 005e 3046 mov r0, r6 2434 0060 FFF7FEFF bl LL_GPIO_Init 2435 .LVL204: -1010:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2436 .loc 1 1010 3 view .LVU796 -1010:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2437 .loc 1 1010 23 is_stmt 0 view .LVU797 +1011:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2436 .loc 1 1011 3 view .LVU796 +1011:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2437 .loc 1 1011 23 is_stmt 0 view .LVU797 2438 0064 4FF40043 mov r3, #32768 2439 0068 0293 str r3, [sp, #8] -1011:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2440 .loc 1 1011 3 is_stmt 1 view .LVU798 -1011:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2441 .loc 1 1011 24 is_stmt 0 view .LVU799 +1012:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2440 .loc 1 1012 3 is_stmt 1 view .LVU798 +1012:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2441 .loc 1 1012 24 is_stmt 0 view .LVU799 2442 006a 0395 str r5, [sp, #12] -1012:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2443 .loc 1 1012 3 is_stmt 1 view .LVU800 -1012:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2444 .loc 1 1012 25 is_stmt 0 view .LVU801 +1013:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2443 .loc 1 1013 3 is_stmt 1 view .LVU800 +1013:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2444 .loc 1 1013 25 is_stmt 0 view .LVU801 2445 006c CDF81080 str r8, [sp, #16] -1013:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2446 .loc 1 1013 3 is_stmt 1 view .LVU802 -1013:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2447 .loc 1 1013 30 is_stmt 0 view .LVU803 - ARM GAS /tmp/ccWQNJQt.s page 189 +1014:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2446 .loc 1 1014 3 is_stmt 1 view .LVU802 +1014:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + ARM GAS /tmp/ccO46DoU.s page 189 + 2447 .loc 1 1014 30 is_stmt 0 view .LVU803 2448 0070 0594 str r4, [sp, #20] -1014:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2449 .loc 1 1014 3 is_stmt 1 view .LVU804 -1014:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2450 .loc 1 1014 24 is_stmt 0 view .LVU805 +1015:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2449 .loc 1 1015 3 is_stmt 1 view .LVU804 +1015:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2450 .loc 1 1015 24 is_stmt 0 view .LVU805 2451 0072 0694 str r4, [sp, #24] -1015:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2452 .loc 1 1015 3 is_stmt 1 view .LVU806 -1015:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2453 .loc 1 1015 29 is_stmt 0 view .LVU807 +1016:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2452 .loc 1 1016 3 is_stmt 1 view .LVU806 +1016:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2453 .loc 1 1016 29 is_stmt 0 view .LVU807 2454 0074 0797 str r7, [sp, #28] -1016:Src/main.c **** - 2455 .loc 1 1016 3 is_stmt 1 view .LVU808 +1017:Src/main.c **** + 2455 .loc 1 1017 3 is_stmt 1 view .LVU808 2456 0076 02A9 add r1, sp, #8 2457 0078 3046 mov r0, r6 2458 007a FFF7FEFF bl LL_GPIO_Init 2459 .LVL205: -1022:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2460 .loc 1 1022 3 view .LVU809 -1022:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2461 .loc 1 1022 36 is_stmt 0 view .LVU810 +1023:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2460 .loc 1 1023 3 view .LVU809 +1023:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2461 .loc 1 1023 36 is_stmt 0 view .LVU810 2462 007e 0894 str r4, [sp, #32] -1023:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2463 .loc 1 1023 3 is_stmt 1 view .LVU811 -1023:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2464 .loc 1 1023 23 is_stmt 0 view .LVU812 +1024:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2463 .loc 1 1024 3 is_stmt 1 view .LVU811 +1024:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2464 .loc 1 1024 23 is_stmt 0 view .LVU812 2465 0080 4FF48273 mov r3, #260 2466 0084 0993 str r3, [sp, #36] -1024:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2467 .loc 1 1024 3 is_stmt 1 view .LVU813 -1024:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2468 .loc 1 1024 28 is_stmt 0 view .LVU814 +1025:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2467 .loc 1 1025 3 is_stmt 1 view .LVU813 +1025:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2468 .loc 1 1025 28 is_stmt 0 view .LVU814 2469 0086 4FF47063 mov r3, #3840 2470 008a 0A93 str r3, [sp, #40] -1025:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2471 .loc 1 1025 3 is_stmt 1 view .LVU815 -1025:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2472 .loc 1 1025 32 is_stmt 0 view .LVU816 +1026:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2471 .loc 1 1026 3 is_stmt 1 view .LVU815 +1026:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2472 .loc 1 1026 32 is_stmt 0 view .LVU816 2473 008c 0B95 str r5, [sp, #44] -1026:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2474 .loc 1 1026 3 is_stmt 1 view .LVU817 -1026:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2475 .loc 1 1026 29 is_stmt 0 view .LVU818 +1027:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2474 .loc 1 1027 3 is_stmt 1 view .LVU817 +1027:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2475 .loc 1 1027 29 is_stmt 0 view .LVU818 2476 008e 0123 movs r3, #1 2477 0090 0C93 str r3, [sp, #48] -1027:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 2478 .loc 1 1027 3 is_stmt 1 view .LVU819 -1027:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 2479 .loc 1 1027 22 is_stmt 0 view .LVU820 +1028:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 2478 .loc 1 1028 3 is_stmt 1 view .LVU819 +1028:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 2479 .loc 1 1028 22 is_stmt 0 view .LVU820 2480 0092 4FF40073 mov r3, #512 2481 0096 0D93 str r3, [sp, #52] -1028:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2482 .loc 1 1028 3 is_stmt 1 view .LVU821 -1028:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2483 .loc 1 1028 27 is_stmt 0 view .LVU822 +1029:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2482 .loc 1 1029 3 is_stmt 1 view .LVU821 +1029:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2483 .loc 1 1029 27 is_stmt 0 view .LVU822 2484 0098 1023 movs r3, #16 + ARM GAS /tmp/ccO46DoU.s page 190 + + 2485 009a 0E93 str r3, [sp, #56] - ARM GAS /tmp/ccWQNJQt.s page 190 - - -1029:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2486 .loc 1 1029 3 is_stmt 1 view .LVU823 -1029:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2487 .loc 1 1029 27 is_stmt 0 view .LVU824 +1030:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2486 .loc 1 1030 3 is_stmt 1 view .LVU823 +1030:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2487 .loc 1 1030 27 is_stmt 0 view .LVU824 2488 009c 0F94 str r4, [sp, #60] -1030:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2489 .loc 1 1030 3 is_stmt 1 view .LVU825 -1030:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2490 .loc 1 1030 33 is_stmt 0 view .LVU826 +1031:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2489 .loc 1 1031 3 is_stmt 1 view .LVU825 +1031:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2490 .loc 1 1031 33 is_stmt 0 view .LVU826 2491 009e 1094 str r4, [sp, #64] -1031:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 2492 .loc 1 1031 3 is_stmt 1 view .LVU827 -1031:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 2493 .loc 1 1031 26 is_stmt 0 view .LVU828 +1032:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 2492 .loc 1 1032 3 is_stmt 1 view .LVU827 +1032:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 2493 .loc 1 1032 26 is_stmt 0 view .LVU828 2494 00a0 0723 movs r3, #7 2495 00a2 1193 str r3, [sp, #68] -1032:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); - 2496 .loc 1 1032 3 is_stmt 1 view .LVU829 +1033:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); + 2496 .loc 1 1033 3 is_stmt 1 view .LVU829 2497 00a4 094C ldr r4, .L103+8 2498 00a6 08A9 add r1, sp, #32 2499 00a8 2046 mov r0, r4 2500 00aa FFF7FEFF bl LL_SPI_Init 2501 .LVL206: -1033:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); - 2502 .loc 1 1033 3 view .LVU830 +1034:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); + 2502 .loc 1 1034 3 view .LVU830 2503 .LBB362: 2504 .LBI362: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11381,8 +11382,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2512 .loc 4 428 3 is_stmt 0 view .LVU833 2513 .LBE363: 2514 .LBE362: -1034:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ - 2515 .loc 1 1034 3 is_stmt 1 view .LVU834 +1035:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ + 2515 .loc 1 1035 3 is_stmt 1 view .LVU834 2516 .LBB364: 2517 .LBI364: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11397,12 +11398,12 @@ ARM GAS /tmp/ccWQNJQt.s page 1 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 2525 .loc 4 876 3 is_stmt 0 view .LVU837 2526 .LBE365: + ARM GAS /tmp/ccO46DoU.s page 191 + + 2527 .LBE364: - ARM GAS /tmp/ccWQNJQt.s page 191 - - -1039:Src/main.c **** - 2528 .loc 1 1039 1 view .LVU838 +1040:Src/main.c **** + 2528 .loc 1 1040 1 view .LVU838 2529 00be 12B0 add sp, sp, #72 2530 .LCFI20: 2531 .cfi_def_cfa_offset 24 @@ -11423,8 +11424,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2547 .thumb_func 2549 MX_SPI5_Init: 2550 .LFB1193: -1110:Src/main.c **** - 2551 .loc 1 1110 1 is_stmt 1 view -0 +1111:Src/main.c **** + 2551 .loc 1 1111 1 is_stmt 1 view -0 2552 .cfi_startproc 2553 @ args = 0, pretend = 0, frame = 72 2554 @ frame_needed = 0, uses_anonymous_args = 0 @@ -11440,31 +11441,31 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2564 0004 92B0 sub sp, sp, #72 2565 .LCFI22: 2566 .cfi_def_cfa_offset 96 -1116:Src/main.c **** - 2567 .loc 1 1116 3 view .LVU840 -1116:Src/main.c **** - 2568 .loc 1 1116 22 is_stmt 0 view .LVU841 +1117:Src/main.c **** + 2567 .loc 1 1117 3 view .LVU840 +1117:Src/main.c **** + 2568 .loc 1 1117 22 is_stmt 0 view .LVU841 2569 0006 2822 movs r2, #40 2570 0008 0021 movs r1, #0 2571 000a 08A8 add r0, sp, #32 2572 000c FFF7FEFF bl memset 2573 .LVL209: -1118:Src/main.c **** - 2574 .loc 1 1118 3 is_stmt 1 view .LVU842 -1118:Src/main.c **** - 2575 .loc 1 1118 23 is_stmt 0 view .LVU843 +1119:Src/main.c **** + 2574 .loc 1 1119 3 is_stmt 1 view .LVU842 +1119:Src/main.c **** + 2575 .loc 1 1119 23 is_stmt 0 view .LVU843 2576 0010 0024 movs r4, #0 2577 0012 0294 str r4, [sp, #8] 2578 0014 0394 str r4, [sp, #12] 2579 0016 0494 str r4, [sp, #16] + ARM GAS /tmp/ccO46DoU.s page 192 + + 2580 0018 0594 str r4, [sp, #20] - ARM GAS /tmp/ccWQNJQt.s page 192 - - 2581 001a 0694 str r4, [sp, #24] 2582 001c 0794 str r4, [sp, #28] -1121:Src/main.c **** - 2583 .loc 1 1121 3 is_stmt 1 view .LVU844 +1122:Src/main.c **** + 2583 .loc 1 1122 3 is_stmt 1 view .LVU844 2584 .LVL210: 2585 .LBB366: 2586 .LBI366: @@ -11494,8 +11495,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2604 .loc 3 1593 3 is_stmt 0 view .LVU852 2605 .LBE367: 2606 .LBE366: -1123:Src/main.c **** /**SPI5 GPIO Configuration - 2607 .loc 1 1123 3 is_stmt 1 view .LVU853 +1124:Src/main.c **** /**SPI5 GPIO Configuration + 2607 .loc 1 1124 3 is_stmt 1 view .LVU853 2608 .LBB368: 2609 .LBI368: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -11517,10 +11518,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 2621 .loc 3 314 10 view .LVU859 2622 0040 0093 str r3, [sp] + ARM GAS /tmp/ccO46DoU.s page 193 + + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccWQNJQt.s page 193 - - 2623 .loc 3 315 3 is_stmt 1 view .LVU860 2624 0042 009B ldr r3, [sp] 2625 .LVL212: @@ -11528,149 +11529,149 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2626 .loc 3 315 3 is_stmt 0 view .LVU861 2627 .LBE369: 2628 .LBE368: -1128:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2629 .loc 1 1128 3 is_stmt 1 view .LVU862 -1128:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2630 .loc 1 1128 23 is_stmt 0 view .LVU863 +1129:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2629 .loc 1 1129 3 is_stmt 1 view .LVU862 +1129:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2630 .loc 1 1129 23 is_stmt 0 view .LVU863 2631 0044 8023 movs r3, #128 2632 0046 0293 str r3, [sp, #8] -1129:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2633 .loc 1 1129 3 is_stmt 1 view .LVU864 -1129:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2634 .loc 1 1129 24 is_stmt 0 view .LVU865 +1130:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2633 .loc 1 1130 3 is_stmt 1 view .LVU864 +1130:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2634 .loc 1 1130 24 is_stmt 0 view .LVU865 2635 0048 0225 movs r5, #2 2636 004a 0395 str r5, [sp, #12] -1130:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2637 .loc 1 1130 3 is_stmt 1 view .LVU866 -1130:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2638 .loc 1 1130 25 is_stmt 0 view .LVU867 +1131:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2637 .loc 1 1131 3 is_stmt 1 view .LVU866 +1131:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2638 .loc 1 1131 25 is_stmt 0 view .LVU867 2639 004c 4FF00308 mov r8, #3 2640 0050 CDF81080 str r8, [sp, #16] -1131:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2641 .loc 1 1131 3 is_stmt 1 view .LVU868 -1132:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2642 .loc 1 1132 3 view .LVU869 -1133:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2643 .loc 1 1133 3 view .LVU870 -1133:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2644 .loc 1 1133 29 is_stmt 0 view .LVU871 +1132:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2641 .loc 1 1132 3 is_stmt 1 view .LVU868 +1133:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2642 .loc 1 1133 3 view .LVU869 +1134:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2643 .loc 1 1134 3 view .LVU870 +1134:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2644 .loc 1 1134 29 is_stmt 0 view .LVU871 2645 0054 0527 movs r7, #5 2646 0056 0797 str r7, [sp, #28] -1134:Src/main.c **** - 2647 .loc 1 1134 3 is_stmt 1 view .LVU872 +1135:Src/main.c **** + 2647 .loc 1 1135 3 is_stmt 1 view .LVU872 2648 0058 1B4E ldr r6, .L107+4 2649 005a 02A9 add r1, sp, #8 2650 005c 3046 mov r0, r6 2651 005e FFF7FEFF bl LL_GPIO_Init 2652 .LVL213: -1136:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2653 .loc 1 1136 3 view .LVU873 -1136:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2654 .loc 1 1136 23 is_stmt 0 view .LVU874 +1137:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2653 .loc 1 1137 3 view .LVU873 +1137:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2654 .loc 1 1137 23 is_stmt 0 view .LVU874 2655 0062 4FF48073 mov r3, #256 2656 0066 0293 str r3, [sp, #8] -1137:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2657 .loc 1 1137 3 is_stmt 1 view .LVU875 -1137:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2658 .loc 1 1137 24 is_stmt 0 view .LVU876 +1138:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2657 .loc 1 1138 3 is_stmt 1 view .LVU875 +1138:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2658 .loc 1 1138 24 is_stmt 0 view .LVU876 2659 0068 0395 str r5, [sp, #12] -1138:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2660 .loc 1 1138 3 is_stmt 1 view .LVU877 -1138:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2661 .loc 1 1138 25 is_stmt 0 view .LVU878 - ARM GAS /tmp/ccWQNJQt.s page 194 +1139:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2660 .loc 1 1139 3 is_stmt 1 view .LVU877 +1139:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + ARM GAS /tmp/ccO46DoU.s page 194 + 2661 .loc 1 1139 25 is_stmt 0 view .LVU878 2662 006a CDF81080 str r8, [sp, #16] -1139:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2663 .loc 1 1139 3 is_stmt 1 view .LVU879 -1139:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2664 .loc 1 1139 30 is_stmt 0 view .LVU880 +1140:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2663 .loc 1 1140 3 is_stmt 1 view .LVU879 +1140:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2664 .loc 1 1140 30 is_stmt 0 view .LVU880 2665 006e 0594 str r4, [sp, #20] -1140:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2666 .loc 1 1140 3 is_stmt 1 view .LVU881 -1140:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2667 .loc 1 1140 24 is_stmt 0 view .LVU882 +1141:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2666 .loc 1 1141 3 is_stmt 1 view .LVU881 +1141:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2667 .loc 1 1141 24 is_stmt 0 view .LVU882 2668 0070 0694 str r4, [sp, #24] -1141:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2669 .loc 1 1141 3 is_stmt 1 view .LVU883 -1141:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2670 .loc 1 1141 29 is_stmt 0 view .LVU884 +1142:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2669 .loc 1 1142 3 is_stmt 1 view .LVU883 +1142:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2670 .loc 1 1142 29 is_stmt 0 view .LVU884 2671 0072 0797 str r7, [sp, #28] -1142:Src/main.c **** - 2672 .loc 1 1142 3 is_stmt 1 view .LVU885 +1143:Src/main.c **** + 2672 .loc 1 1143 3 is_stmt 1 view .LVU885 2673 0074 02A9 add r1, sp, #8 2674 0076 3046 mov r0, r6 2675 0078 FFF7FEFF bl LL_GPIO_Init 2676 .LVL214: -1148:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2677 .loc 1 1148 3 view .LVU886 -1148:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2678 .loc 1 1148 36 is_stmt 0 view .LVU887 +1149:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2677 .loc 1 1149 3 view .LVU886 +1149:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2678 .loc 1 1149 36 is_stmt 0 view .LVU887 2679 007c 4FF48063 mov r3, #1024 2680 0080 0893 str r3, [sp, #32] -1149:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2681 .loc 1 1149 3 is_stmt 1 view .LVU888 -1149:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2682 .loc 1 1149 23 is_stmt 0 view .LVU889 +1150:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2681 .loc 1 1150 3 is_stmt 1 view .LVU888 +1150:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2682 .loc 1 1150 23 is_stmt 0 view .LVU889 2683 0082 4FF48273 mov r3, #260 2684 0086 0993 str r3, [sp, #36] -1150:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2685 .loc 1 1150 3 is_stmt 1 view .LVU890 -1150:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2686 .loc 1 1150 28 is_stmt 0 view .LVU891 +1151:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2685 .loc 1 1151 3 is_stmt 1 view .LVU890 +1151:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2686 .loc 1 1151 28 is_stmt 0 view .LVU891 2687 0088 4FF47063 mov r3, #3840 2688 008c 0A93 str r3, [sp, #40] -1151:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2689 .loc 1 1151 3 is_stmt 1 view .LVU892 -1151:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2690 .loc 1 1151 32 is_stmt 0 view .LVU893 +1152:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2689 .loc 1 1152 3 is_stmt 1 view .LVU892 +1152:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2690 .loc 1 1152 32 is_stmt 0 view .LVU893 2691 008e 0B95 str r5, [sp, #44] -1152:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2692 .loc 1 1152 3 is_stmt 1 view .LVU894 -1152:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2693 .loc 1 1152 29 is_stmt 0 view .LVU895 +1153:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2692 .loc 1 1153 3 is_stmt 1 view .LVU894 +1153:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2693 .loc 1 1153 29 is_stmt 0 view .LVU895 2694 0090 0C94 str r4, [sp, #48] -1153:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2695 .loc 1 1153 3 is_stmt 1 view .LVU896 -1153:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2696 .loc 1 1153 22 is_stmt 0 view .LVU897 +1154:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2695 .loc 1 1154 3 is_stmt 1 view .LVU896 +1154:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2696 .loc 1 1154 22 is_stmt 0 view .LVU897 2697 0092 4FF40073 mov r3, #512 2698 0096 0D93 str r3, [sp, #52] -1154:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - ARM GAS /tmp/ccWQNJQt.s page 195 + ARM GAS /tmp/ccO46DoU.s page 195 - 2699 .loc 1 1154 3 is_stmt 1 view .LVU898 -1154:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2700 .loc 1 1154 27 is_stmt 0 view .LVU899 +1155:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2699 .loc 1 1155 3 is_stmt 1 view .LVU898 +1155:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2700 .loc 1 1155 27 is_stmt 0 view .LVU899 2701 0098 1823 movs r3, #24 2702 009a 0E93 str r3, [sp, #56] -1155:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2703 .loc 1 1155 3 is_stmt 1 view .LVU900 -1155:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2704 .loc 1 1155 27 is_stmt 0 view .LVU901 +1156:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2703 .loc 1 1156 3 is_stmt 1 view .LVU900 +1156:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2704 .loc 1 1156 27 is_stmt 0 view .LVU901 2705 009c 0F94 str r4, [sp, #60] -1156:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2706 .loc 1 1156 3 is_stmt 1 view .LVU902 -1156:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2707 .loc 1 1156 33 is_stmt 0 view .LVU903 +1157:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2706 .loc 1 1157 3 is_stmt 1 view .LVU902 +1157:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2707 .loc 1 1157 33 is_stmt 0 view .LVU903 2708 009e 1094 str r4, [sp, #64] -1157:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 2709 .loc 1 1157 3 is_stmt 1 view .LVU904 -1157:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 2710 .loc 1 1157 26 is_stmt 0 view .LVU905 +1158:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 2709 .loc 1 1158 3 is_stmt 1 view .LVU904 +1158:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 2710 .loc 1 1158 26 is_stmt 0 view .LVU905 2711 00a0 0723 movs r3, #7 2712 00a2 1193 str r3, [sp, #68] -1158:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); - 2713 .loc 1 1158 3 is_stmt 1 view .LVU906 +1159:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); + 2713 .loc 1 1159 3 is_stmt 1 view .LVU906 2714 00a4 094C ldr r4, .L107+8 2715 00a6 08A9 add r1, sp, #32 2716 00a8 2046 mov r0, r4 2717 00aa FFF7FEFF bl LL_SPI_Init 2718 .LVL215: -1159:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); - 2719 .loc 1 1159 3 view .LVU907 +1160:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); + 2719 .loc 1 1160 3 view .LVU907 2720 .LBB370: 2721 .LBI370: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11686,8 +11687,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2729 .loc 4 428 3 is_stmt 0 view .LVU910 2730 .LBE371: 2731 .LBE370: -1160:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ - 2732 .loc 1 1160 3 is_stmt 1 view .LVU911 +1161:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ + 2732 .loc 1 1161 3 is_stmt 1 view .LVU911 2733 .LBB372: 2734 .LBI372: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11697,17 +11698,17 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2737 .loc 4 876 3 view .LVU913 2738 00b6 6368 ldr r3, [r4, #4] 2739 00b8 23F00803 bic r3, r3, #8 + ARM GAS /tmp/ccO46DoU.s page 196 + + 2740 00bc 6360 str r3, [r4, #4] - ARM GAS /tmp/ccWQNJQt.s page 196 - - 2741 .LVL217: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 2742 .loc 4 876 3 is_stmt 0 view .LVU914 2743 .LBE373: 2744 .LBE372: -1165:Src/main.c **** - 2745 .loc 1 1165 1 view .LVU915 +1166:Src/main.c **** + 2745 .loc 1 1166 1 view .LVU915 2746 00be 12B0 add sp, sp, #72 2747 .LCFI23: 2748 .cfi_def_cfa_offset 24 @@ -11728,8 +11729,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2764 .thumb_func 2766 MX_SPI6_Init: 2767 .LFB1194: -1173:Src/main.c **** - 2768 .loc 1 1173 1 is_stmt 1 view -0 +1174:Src/main.c **** + 2768 .loc 1 1174 1 is_stmt 1 view -0 2769 .cfi_startproc 2770 @ args = 0, pretend = 0, frame = 72 2771 @ frame_needed = 0, uses_anonymous_args = 0 @@ -11745,22 +11746,22 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2781 0004 92B0 sub sp, sp, #72 2782 .LCFI25: 2783 .cfi_def_cfa_offset 96 -1179:Src/main.c **** - 2784 .loc 1 1179 3 view .LVU917 -1179:Src/main.c **** - 2785 .loc 1 1179 22 is_stmt 0 view .LVU918 +1180:Src/main.c **** + 2784 .loc 1 1180 3 view .LVU917 +1180:Src/main.c **** + 2785 .loc 1 1180 22 is_stmt 0 view .LVU918 2786 0006 2822 movs r2, #40 2787 0008 0021 movs r1, #0 2788 000a 08A8 add r0, sp, #32 2789 000c FFF7FEFF bl memset 2790 .LVL218: -1181:Src/main.c **** - 2791 .loc 1 1181 3 is_stmt 1 view .LVU919 -1181:Src/main.c **** - 2792 .loc 1 1181 23 is_stmt 0 view .LVU920 - ARM GAS /tmp/ccWQNJQt.s page 197 +1182:Src/main.c **** + 2791 .loc 1 1182 3 is_stmt 1 view .LVU919 +1182:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 197 + 2792 .loc 1 1182 23 is_stmt 0 view .LVU920 2793 0010 0024 movs r4, #0 2794 0012 0294 str r4, [sp, #8] 2795 0014 0394 str r4, [sp, #12] @@ -11768,8 +11769,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2797 0018 0594 str r4, [sp, #20] 2798 001a 0694 str r4, [sp, #24] 2799 001c 0794 str r4, [sp, #28] -1184:Src/main.c **** - 2800 .loc 1 1184 3 is_stmt 1 view .LVU921 +1185:Src/main.c **** + 2800 .loc 1 1185 3 is_stmt 1 view .LVU921 2801 .LVL219: 2802 .LBB374: 2803 .LBI374: @@ -11799,8 +11800,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2821 .loc 3 1593 3 is_stmt 0 view .LVU929 2822 .LBE375: 2823 .LBE374: -1186:Src/main.c **** /**SPI6 GPIO Configuration - 2824 .loc 1 1186 3 is_stmt 1 view .LVU930 +1187:Src/main.c **** /**SPI6 GPIO Configuration + 2824 .loc 1 1187 3 is_stmt 1 view .LVU930 2825 .LBB376: 2826 .LBI376: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -11817,10 +11818,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2834 .loc 3 314 3 view .LVU934 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 2835 .loc 3 314 12 is_stmt 0 view .LVU935 + ARM GAS /tmp/ccO46DoU.s page 198 + + 2836 003a 1B6B ldr r3, [r3, #48] - ARM GAS /tmp/ccWQNJQt.s page 198 - - 2837 003c 03F00103 and r3, r3, #1 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 2838 .loc 3 314 10 view .LVU936 @@ -11833,149 +11834,149 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2843 .loc 3 315 3 is_stmt 0 view .LVU938 2844 .LBE377: 2845 .LBE376: -1191:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2846 .loc 1 1191 3 is_stmt 1 view .LVU939 -1191:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2847 .loc 1 1191 23 is_stmt 0 view .LVU940 +1192:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2846 .loc 1 1192 3 is_stmt 1 view .LVU939 +1192:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2847 .loc 1 1192 23 is_stmt 0 view .LVU940 2848 0044 2023 movs r3, #32 2849 0046 0293 str r3, [sp, #8] -1192:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2850 .loc 1 1192 3 is_stmt 1 view .LVU941 -1192:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2851 .loc 1 1192 24 is_stmt 0 view .LVU942 +1193:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2850 .loc 1 1193 3 is_stmt 1 view .LVU941 +1193:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2851 .loc 1 1193 24 is_stmt 0 view .LVU942 2852 0048 0225 movs r5, #2 2853 004a 0395 str r5, [sp, #12] -1193:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2854 .loc 1 1193 3 is_stmt 1 view .LVU943 -1193:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2855 .loc 1 1193 25 is_stmt 0 view .LVU944 +1194:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2854 .loc 1 1194 3 is_stmt 1 view .LVU943 +1194:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2855 .loc 1 1194 25 is_stmt 0 view .LVU944 2856 004c 4FF00308 mov r8, #3 2857 0050 CDF81080 str r8, [sp, #16] -1194:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2858 .loc 1 1194 3 is_stmt 1 view .LVU945 -1195:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2859 .loc 1 1195 3 view .LVU946 -1196:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2860 .loc 1 1196 3 view .LVU947 -1196:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2861 .loc 1 1196 29 is_stmt 0 view .LVU948 +1195:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2858 .loc 1 1195 3 is_stmt 1 view .LVU945 +1196:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 2859 .loc 1 1196 3 view .LVU946 +1197:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2860 .loc 1 1197 3 view .LVU947 +1197:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2861 .loc 1 1197 29 is_stmt 0 view .LVU948 2862 0054 0827 movs r7, #8 2863 0056 0797 str r7, [sp, #28] -1197:Src/main.c **** - 2864 .loc 1 1197 3 is_stmt 1 view .LVU949 +1198:Src/main.c **** + 2864 .loc 1 1198 3 is_stmt 1 view .LVU949 2865 0058 1B4E ldr r6, .L111+4 2866 005a 0DEB0701 add r1, sp, r7 2867 005e 3046 mov r0, r6 2868 0060 FFF7FEFF bl LL_GPIO_Init 2869 .LVL222: -1199:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2870 .loc 1 1199 3 view .LVU950 -1199:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2871 .loc 1 1199 23 is_stmt 0 view .LVU951 +1200:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2870 .loc 1 1200 3 view .LVU950 +1200:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2871 .loc 1 1200 23 is_stmt 0 view .LVU951 2872 0064 8023 movs r3, #128 2873 0066 0293 str r3, [sp, #8] -1200:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2874 .loc 1 1200 3 is_stmt 1 view .LVU952 -1200:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2875 .loc 1 1200 24 is_stmt 0 view .LVU953 - ARM GAS /tmp/ccWQNJQt.s page 199 +1201:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2874 .loc 1 1201 3 is_stmt 1 view .LVU952 +1201:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + ARM GAS /tmp/ccO46DoU.s page 199 + 2875 .loc 1 1201 24 is_stmt 0 view .LVU953 2876 0068 0395 str r5, [sp, #12] -1201:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2877 .loc 1 1201 3 is_stmt 1 view .LVU954 -1201:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2878 .loc 1 1201 25 is_stmt 0 view .LVU955 +1202:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2877 .loc 1 1202 3 is_stmt 1 view .LVU954 +1202:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2878 .loc 1 1202 25 is_stmt 0 view .LVU955 2879 006a CDF81080 str r8, [sp, #16] -1202:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2880 .loc 1 1202 3 is_stmt 1 view .LVU956 -1202:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2881 .loc 1 1202 30 is_stmt 0 view .LVU957 +1203:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2880 .loc 1 1203 3 is_stmt 1 view .LVU956 +1203:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2881 .loc 1 1203 30 is_stmt 0 view .LVU957 2882 006e 0594 str r4, [sp, #20] -1203:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2883 .loc 1 1203 3 is_stmt 1 view .LVU958 -1203:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2884 .loc 1 1203 24 is_stmt 0 view .LVU959 +1204:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 2883 .loc 1 1204 3 is_stmt 1 view .LVU958 +1204:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 2884 .loc 1 1204 24 is_stmt 0 view .LVU959 2885 0070 0694 str r4, [sp, #24] -1204:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2886 .loc 1 1204 3 is_stmt 1 view .LVU960 -1204:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2887 .loc 1 1204 29 is_stmt 0 view .LVU961 +1205:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2886 .loc 1 1205 3 is_stmt 1 view .LVU960 +1205:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2887 .loc 1 1205 29 is_stmt 0 view .LVU961 2888 0072 0797 str r7, [sp, #28] -1205:Src/main.c **** - 2889 .loc 1 1205 3 is_stmt 1 view .LVU962 +1206:Src/main.c **** + 2889 .loc 1 1206 3 is_stmt 1 view .LVU962 2890 0074 0DEB0701 add r1, sp, r7 2891 0078 3046 mov r0, r6 2892 007a FFF7FEFF bl LL_GPIO_Init 2893 .LVL223: -1211:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2894 .loc 1 1211 3 view .LVU963 -1211:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2895 .loc 1 1211 36 is_stmt 0 view .LVU964 +1212:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2894 .loc 1 1212 3 view .LVU963 +1212:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2895 .loc 1 1212 36 is_stmt 0 view .LVU964 2896 007e 0894 str r4, [sp, #32] -1212:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2897 .loc 1 1212 3 is_stmt 1 view .LVU965 -1212:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2898 .loc 1 1212 23 is_stmt 0 view .LVU966 +1213:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2897 .loc 1 1213 3 is_stmt 1 view .LVU965 +1213:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2898 .loc 1 1213 23 is_stmt 0 view .LVU966 2899 0080 4FF48273 mov r3, #260 2900 0084 0993 str r3, [sp, #36] -1213:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2901 .loc 1 1213 3 is_stmt 1 view .LVU967 -1213:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2902 .loc 1 1213 28 is_stmt 0 view .LVU968 +1214:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2901 .loc 1 1214 3 is_stmt 1 view .LVU967 +1214:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2902 .loc 1 1214 28 is_stmt 0 view .LVU968 2903 0086 4FF47063 mov r3, #3840 2904 008a 0A93 str r3, [sp, #40] -1214:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2905 .loc 1 1214 3 is_stmt 1 view .LVU969 -1214:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2906 .loc 1 1214 32 is_stmt 0 view .LVU970 +1215:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2905 .loc 1 1215 3 is_stmt 1 view .LVU969 +1215:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2906 .loc 1 1215 32 is_stmt 0 view .LVU970 2907 008c 0B95 str r5, [sp, #44] -1215:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2908 .loc 1 1215 3 is_stmt 1 view .LVU971 -1215:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2909 .loc 1 1215 29 is_stmt 0 view .LVU972 +1216:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2908 .loc 1 1216 3 is_stmt 1 view .LVU971 +1216:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2909 .loc 1 1216 29 is_stmt 0 view .LVU972 2910 008e 0123 movs r3, #1 2911 0090 0C93 str r3, [sp, #48] -1216:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2912 .loc 1 1216 3 is_stmt 1 view .LVU973 - ARM GAS /tmp/ccWQNJQt.s page 200 +1217:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + ARM GAS /tmp/ccO46DoU.s page 200 -1216:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2913 .loc 1 1216 22 is_stmt 0 view .LVU974 + 2912 .loc 1 1217 3 is_stmt 1 view .LVU973 +1217:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2913 .loc 1 1217 22 is_stmt 0 view .LVU974 2914 0092 4FF40073 mov r3, #512 2915 0096 0D93 str r3, [sp, #52] -1217:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2916 .loc 1 1217 3 is_stmt 1 view .LVU975 -1217:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2917 .loc 1 1217 27 is_stmt 0 view .LVU976 +1218:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2916 .loc 1 1218 3 is_stmt 1 view .LVU975 +1218:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2917 .loc 1 1218 27 is_stmt 0 view .LVU976 2918 0098 1823 movs r3, #24 2919 009a 0E93 str r3, [sp, #56] -1218:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2920 .loc 1 1218 3 is_stmt 1 view .LVU977 -1218:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2921 .loc 1 1218 27 is_stmt 0 view .LVU978 +1219:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2920 .loc 1 1219 3 is_stmt 1 view .LVU977 +1219:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2921 .loc 1 1219 27 is_stmt 0 view .LVU978 2922 009c 0F94 str r4, [sp, #60] -1219:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2923 .loc 1 1219 3 is_stmt 1 view .LVU979 -1219:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2924 .loc 1 1219 33 is_stmt 0 view .LVU980 +1220:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2923 .loc 1 1220 3 is_stmt 1 view .LVU979 +1220:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2924 .loc 1 1220 33 is_stmt 0 view .LVU980 2925 009e 1094 str r4, [sp, #64] -1220:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 2926 .loc 1 1220 3 is_stmt 1 view .LVU981 -1220:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 2927 .loc 1 1220 26 is_stmt 0 view .LVU982 +1221:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 2926 .loc 1 1221 3 is_stmt 1 view .LVU981 +1221:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 2927 .loc 1 1221 26 is_stmt 0 view .LVU982 2928 00a0 0723 movs r3, #7 2929 00a2 1193 str r3, [sp, #68] -1221:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); - 2930 .loc 1 1221 3 is_stmt 1 view .LVU983 +1222:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); + 2930 .loc 1 1222 3 is_stmt 1 view .LVU983 2931 00a4 094C ldr r4, .L111+8 2932 00a6 08A9 add r1, sp, #32 2933 00a8 2046 mov r0, r4 2934 00aa FFF7FEFF bl LL_SPI_Init 2935 .LVL224: -1222:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); - 2936 .loc 1 1222 3 view .LVU984 +1223:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); + 2936 .loc 1 1223 3 view .LVU984 2937 .LBB378: 2938 .LBI378: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11991,16 +11992,16 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2946 .loc 4 428 3 is_stmt 0 view .LVU987 2947 .LBE379: 2948 .LBE378: -1223:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ - 2949 .loc 1 1223 3 is_stmt 1 view .LVU988 +1224:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ + 2949 .loc 1 1224 3 is_stmt 1 view .LVU988 2950 .LBB380: 2951 .LBI380: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 2952 .loc 4 874 22 view .LVU989 + ARM GAS /tmp/ccO46DoU.s page 201 + + 2953 .LBB381: - ARM GAS /tmp/ccWQNJQt.s page 201 - - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 2954 .loc 4 876 3 view .LVU990 2955 00b6 6368 ldr r3, [r4, #4] @@ -12011,8 +12012,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2959 .loc 4 876 3 is_stmt 0 view .LVU991 2960 .LBE381: 2961 .LBE380: -1228:Src/main.c **** - 2962 .loc 1 1228 1 view .LVU992 +1229:Src/main.c **** + 2962 .loc 1 1229 1 view .LVU992 2963 00be 12B0 add sp, sp, #72 2964 .LCFI26: 2965 .cfi_def_cfa_offset 24 @@ -12033,8 +12034,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2981 .thumb_func 2983 MX_TIM2_Init: 2984 .LFB1195: -1236:Src/main.c **** - 2985 .loc 1 1236 1 is_stmt 1 view -0 +1237:Src/main.c **** + 2985 .loc 1 1237 1 is_stmt 1 view -0 2986 .cfi_startproc 2987 @ args = 0, pretend = 0, frame = 24 2988 @ frame_needed = 0, uses_anonymous_args = 0 @@ -12046,21 +12047,21 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2994 0002 86B0 sub sp, sp, #24 2995 .LCFI28: 2996 .cfi_def_cfa_offset 32 -1242:Src/main.c **** - 2997 .loc 1 1242 3 view .LVU994 -1242:Src/main.c **** - 2998 .loc 1 1242 22 is_stmt 0 view .LVU995 +1243:Src/main.c **** + 2997 .loc 1 1243 3 view .LVU994 +1243:Src/main.c **** + 2998 .loc 1 1243 22 is_stmt 0 view .LVU995 2999 0004 0024 movs r4, #0 3000 0006 0194 str r4, [sp, #4] 3001 0008 0294 str r4, [sp, #8] 3002 000a 0394 str r4, [sp, #12] 3003 000c 0494 str r4, [sp, #16] 3004 000e 0594 str r4, [sp, #20] -1245:Src/main.c **** - 3005 .loc 1 1245 3 is_stmt 1 view .LVU996 - ARM GAS /tmp/ccWQNJQt.s page 202 +1246:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 202 + 3005 .loc 1 1246 3 is_stmt 1 view .LVU996 3006 .LVL227: 3007 .LBB382: 3008 .LBI382: @@ -12092,8 +12093,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3026 .loc 3 1077 3 is_stmt 0 view .LVU1004 3027 .LBE383: 3028 .LBE382: -1248:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 3029 .loc 1 1248 3 is_stmt 1 view .LVU1005 +1249:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 3029 .loc 1 1249 3 is_stmt 1 view .LVU1005 3030 .LBB384: 3031 .LBI384: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -12107,8 +12108,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3037 0026 D868 ldr r0, [r3, #12] 3038 .LBE385: 3039 .LBE384: -1248:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 3040 .loc 1 1248 3 discriminator 1 view .LVU1009 +1249:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 3040 .loc 1 1249 3 discriminator 1 view .LVU1009 3041 0028 2246 mov r2, r4 3042 002a 2146 mov r1, r4 3043 002c C0F30220 ubfx r0, r0, #8, #3 @@ -12117,10 +12118,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3046 .LBB386: 3047 .LBI386: 2024:Drivers/CMSIS/Include/core_cm7.h **** { + ARM GAS /tmp/ccO46DoU.s page 203 + + 3048 .loc 2 2024 22 is_stmt 1 view .LVU1010 - ARM GAS /tmp/ccWQNJQt.s page 203 - - 3049 .LBB387: 2026:Drivers/CMSIS/Include/core_cm7.h **** { 3050 .loc 2 2026 3 view .LVU1011 @@ -12142,8 +12143,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3061 .loc 2 2028 47 view .LVU1016 3062 .LBE387: 3063 .LBE386: -1249:Src/main.c **** - 3064 .loc 1 1249 3 is_stmt 1 view .LVU1017 +1250:Src/main.c **** + 3064 .loc 1 1250 3 is_stmt 1 view .LVU1017 3065 .LBB388: 3066 .LBI388: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -12162,39 +12163,39 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3075 .loc 2 1900 43 view .LVU1022 3076 .LBE389: 3077 .LBE388: -1254:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3078 .loc 1 1254 3 is_stmt 1 view .LVU1023 -1254:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3079 .loc 1 1254 28 is_stmt 0 view .LVU1024 +1255:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3078 .loc 1 1255 3 is_stmt 1 view .LVU1023 +1255:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3079 .loc 1 1255 28 is_stmt 0 view .LVU1024 3080 0044 4FF47A73 mov r3, #1000 3081 0048 ADF80430 strh r3, [sp, #4] @ movhi -1255:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 3082 .loc 1 1255 3 is_stmt 1 view .LVU1025 -1255:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 3083 .loc 1 1255 30 is_stmt 0 view .LVU1026 +1256:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 3082 .loc 1 1256 3 is_stmt 1 view .LVU1025 +1256:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 3083 .loc 1 1256 30 is_stmt 0 view .LVU1026 3084 004c 0294 str r4, [sp, #8] -1256:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3085 .loc 1 1256 3 is_stmt 1 view .LVU1027 -1256:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3086 .loc 1 1256 29 is_stmt 0 view .LVU1028 +1257:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3085 .loc 1 1257 3 is_stmt 1 view .LVU1027 +1257:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3086 .loc 1 1257 29 is_stmt 0 view .LVU1028 + ARM GAS /tmp/ccO46DoU.s page 204 + + 3087 004e 114B ldr r3, .L115+12 - ARM GAS /tmp/ccWQNJQt.s page 204 - - 3088 0050 0393 str r3, [sp, #12] -1257:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 3089 .loc 1 1257 3 is_stmt 1 view .LVU1029 -1257:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 3090 .loc 1 1257 32 is_stmt 0 view .LVU1030 +1258:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 3089 .loc 1 1258 3 is_stmt 1 view .LVU1029 +1258:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 3090 .loc 1 1258 32 is_stmt 0 view .LVU1030 3091 0052 0494 str r4, [sp, #16] -1258:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); - 3092 .loc 1 1258 3 is_stmt 1 view .LVU1031 +1259:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); + 3092 .loc 1 1259 3 is_stmt 1 view .LVU1031 3093 0054 01A9 add r1, sp, #4 3094 0056 4FF08040 mov r0, #1073741824 3095 005a FFF7FEFF bl LL_TIM_Init 3096 .LVL233: -1259:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); - 3097 .loc 1 1259 3 view .LVU1032 +1260:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); + 3097 .loc 1 1260 3 view .LVU1032 3098 .LBB390: 3099 .LBI390: 3100 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" @@ -12237,10 +12238,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 205 + + 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private types -------------------------------------------------------------*/ - ARM GAS /tmp/ccWQNJQt.s page 205 - - 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Variables TIM Private Variables 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -12297,10 +12298,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 20U /* 8: CC6P */ 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }; 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 206 + + 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OISx[] = - ARM GAS /tmp/ccWQNJQt.s page 206 - - 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OIS1 */ 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1U, /* 1: OIS1N */ @@ -12357,10 +12358,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Macros TIM Private Macros 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccO46DoU.s page 207 + + 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Convert channel id into channel index. - ARM GAS /tmp/ccWQNJQt.s page 207 - - 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CHANNEL__ This parameter can be one of the following values: 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N @@ -12417,10 +12418,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetPrescaler().*/ 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 208 + + 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CounterMode; /*!< Specifies the counter mode. - ARM GAS /tmp/ccWQNJQt.s page 208 - - 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function @@ -12477,10 +12478,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE. 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functions + ARM GAS /tmp/ccO46DoU.s page 209 + + 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ - ARM GAS /tmp/ccWQNJQt.s page 209 - - 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Re 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_Data= @@ -12537,10 +12538,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function + ARM GAS /tmp/ccO46DoU.s page 210 + + 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/ - ARM GAS /tmp/ccWQNJQt.s page 210 - - 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICFilter; /*!< Specifies the input capture filter. 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. @@ -12597,10 +12598,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 211 + + 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. - ARM GAS /tmp/ccWQNJQt.s page 211 - - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function @@ -12657,10 +12658,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode. 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSR + ARM GAS /tmp/ccO46DoU.s page 212 + + 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccWQNJQt.s page 212 - - 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetOffStates() 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12717,10 +12718,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK() 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve + ARM GAS /tmp/ccO46DoU.s page 213 + + 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ - ARM GAS /tmp/ccWQNJQt.s page 213 - - 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2State; /*!< Specifies whether the TIM Break2 input is enabled or not. 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_ENABLE @@ -12777,10 +12778,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrup 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrup 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrup + ARM GAS /tmp/ccO46DoU.s page 214 + + 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrup - ARM GAS /tmp/ccWQNJQt.s page 214 - - 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC5IF TIM_SR_CC5IF /*!< Capture/compare 5 interrup 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC6IF TIM_SR_CC6IF /*!< Capture/compare 6 interrup 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_COMIF TIM_SR_COMIF /*!< COM interrupt flag */ @@ -12837,10 +12838,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_COMIE TIM_DIER_COMIE /*!< COM interrupt enable */ 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable * 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_BIE TIM_DIER_BIE /*!< Break interrupt enable */ + ARM GAS /tmp/ccO46DoU.s page 215 + + 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 215 - - 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12897,10 +12898,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_ONLY 0x00000000U /*!< Capture/compare control bi + ARM GAS /tmp/ccO46DoU.s page 216 + + 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI TIM_CR2_CCUS /*!< Capture/compare control bi - ARM GAS /tmp/ccWQNJQt.s page 216 - - 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -12957,10 +12958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM1 LL_TIM_OCMODE_ASYMMETRIC_PWM1 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM2 LL_TIM_OCMODE_ASYMMETRIC_PWM2 + ARM GAS /tmp/ccO46DoU.s page 217 + + 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 217 - - 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @endcond 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -13017,10 +13018,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ACTIVEINPUT Active Input Selection 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccO46DoU.s page 218 + + 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ACTIVEINPUT_DIRECTTI (TIM_CCMR1_CC1S_0 << 16U) /*!< ICx is mapped on TIx - ARM GAS /tmp/ccWQNJQt.s page 218 - - 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ACTIVEINPUT_INDIRECTTI (TIM_CCMR1_CC1S_1 << 16U) /*!< ICx is mapped on TIy 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ACTIVEINPUT_TRC (TIM_CCMR1_CC1S << 16U) /*!< ICx is mapped on TRC 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13077,10 +13078,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKSOURCE_INTERNAL 0x00000000U 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKSOURCE_EXT_MODE1 (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKSOURCE_EXT_MODE2 TIM_SMCR_ECE + ARM GAS /tmp/ccO46DoU.s page 219 + + 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 219 - - 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -13137,10 +13138,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_DISABLED 0x00000000U /*!< Slave mode 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_RESET TIM_SMCR_SMS_2 /*!< Reset Mode + ARM GAS /tmp/ccO46DoU.s page 220 + + 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0) /*!< Gated Mode - ARM GAS /tmp/ccWQNJQt.s page 220 - - 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1) /*!< Trigger Mod 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER TIM_SMCR_SMS_3 /*!< Combined re 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13197,10 +13198,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0) 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1) 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) + ARM GAS /tmp/ccO46DoU.s page 221 + + 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2) - ARM GAS /tmp/ccWQNJQt.s page 221 - - 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0) 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1) 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV32_N8 TIM_SMCR_ETF @@ -13257,10 +13258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV1_N2 0x00100000U /*!< fSAMPLING=fCK_INT, N=2 */ 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV1_N4 0x00200000U /*!< fSAMPLING=fCK_INT, N=4 */ 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV1_N8 0x00300000U /*!< fSAMPLING=fCK_INT, N=8 */ + ARM GAS /tmp/ccO46DoU.s page 222 + + 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV2_N6 0x00400000U /*!< fSAMPLING=fDTS/2, N=6 */ - ARM GAS /tmp/ccWQNJQt.s page 222 - - 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV2_N8 0x00500000U /*!< fSAMPLING=fDTS/2, N=8 */ 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV4_N6 0x00600000U /*!< fSAMPLING=fDTS/4, N=6 */ 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV4_N8 0x00700000U /*!< fSAMPLING=fDTS/4, N=8 */ @@ -13317,10 +13318,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_POLARITY_LOW TIM1_AF1_BKINP /*!< BRK BKIN input is acti + ARM GAS /tmp/ccO46DoU.s page 223 + + 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_POLARITY_HIGH 0x00000000U /*!< BRK BKIN input is acti - ARM GAS /tmp/ccWQNJQt.s page 223 - - 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13377,10 +13378,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_13TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2) 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_14TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_0) 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_15TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1) + ARM GAS /tmp/ccO46DoU.s page 224 + + 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_16TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM - ARM GAS /tmp/ccWQNJQt.s page 224 - - 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_17TRANSFERS TIM_DCR_DBL_4 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_18TRANSFERS (TIM_DCR_DBL_4 | TIM_DCR_DBL_0) 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13437,10 +13438,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Write a value in TIM register. 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance + ARM GAS /tmp/ccO46DoU.s page 225 + + 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __REG__ Register to be written - ARM GAS /tmp/ccWQNJQt.s page 225 - - 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __VALUE__ Value to be written in the register 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13497,10 +13498,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the prescaler value to achieve the required counter clock freq 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000); 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) + ARM GAS /tmp/ccO46DoU.s page 226 + + 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNTCLK__ counter clock frequency (in Hz) - ARM GAS /tmp/ccWQNJQt.s page 226 - - 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ @@ -13557,10 +13558,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \ 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos))) 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 227 + + 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccWQNJQt.s page 227 - - 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13617,10 +13618,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 228 + + 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 228 - - 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update event generation. 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -13677,10 +13678,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccO46DoU.s page 229 + + 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set one pulse mode (one shot v.s. repetitive). - ARM GAS /tmp/ccWQNJQt.s page 229 - - 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OnePulseMode This parameter can be one of the following values: @@ -13737,10 +13738,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * by a timer instance. 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR1 CMS LL_TIM_GetCounterMode + ARM GAS /tmp/ccO46DoU.s page 230 + + 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccWQNJQt.s page 230 - - 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN @@ -13793,14 +13794,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3109 .loc 5 1506 3 is_stmt 0 view .LVU1035 3110 .LBE391: 3111 .LBE390: -1260:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - 3112 .loc 1 1260 3 is_stmt 1 view .LVU1036 +1261:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + 3112 .loc 1 1261 3 is_stmt 1 view .LVU1036 3113 .LBB392: 3114 .LBI392: + ARM GAS /tmp/ccO46DoU.s page 231 + + 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccWQNJQt.s page 231 - - 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether auto-reload (ARR) preload is enabled. @@ -13857,10 +13858,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_SetCounter 1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF) + ARM GAS /tmp/ccO46DoU.s page 232 + + 1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 232 - - 1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -13917,10 +13918,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx) 1620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccO46DoU.s page 233 + + 1621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->PSC)); - ARM GAS /tmp/ccWQNJQt.s page 233 - - 1622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13977,10 +13978,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx) 1677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccO46DoU.s page 234 + + 1678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->RCR)); - ARM GAS /tmp/ccWQNJQt.s page 234 - - 1679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -14037,10 +14038,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx) 1734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccO46DoU.s page 235 + + 1735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_CCPC); - ARM GAS /tmp/ccWQNJQt.s page 235 - - 1736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -14097,10 +14098,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); 1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 236 + + 1792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 236 - - 1793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual trigger of the capture/compare DMA request. 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -14157,10 +14158,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) + ARM GAS /tmp/ccO46DoU.s page 237 + + 1849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccWQNJQt.s page 237 - - 1850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CCER, Channels); 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14217,10 +14218,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 1905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccO46DoU.s page 238 + + 1906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels) - ARM GAS /tmp/ccWQNJQt.s page 238 - - 1907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL); 1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -14277,10 +14278,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccO46DoU.s page 239 + + 1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Define the behavior of the output reference signal OCxREF from which - ARM GAS /tmp/ccWQNJQt.s page 239 - - 1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * OCx and OCxN (when relevant) are derived. 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n 1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_SetMode\n @@ -14337,10 +14338,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccO46DoU.s page 240 + + 2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN - ARM GAS /tmp/ccWQNJQt.s page 240 - - 2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE 2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE @@ -14397,10 +14398,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the polarity of an output channel. + ARM GAS /tmp/ccO46DoU.s page 241 + + 2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n - ARM GAS /tmp/ccWQNJQt.s page 241 - - 2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_GetPolarity\n 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_GetPolarity\n 2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_GetPolarity\n @@ -14457,10 +14458,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param IdleState This parameter can be one of the following values: + ARM GAS /tmp/ccO46DoU.s page 242 + + 2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW - ARM GAS /tmp/ccWQNJQt.s page 242 - - 2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -14517,10 +14518,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 + ARM GAS /tmp/ccO46DoU.s page 243 + + 2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/ccWQNJQt.s page 243 - - 2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -14577,10 +14578,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel) + ARM GAS /tmp/ccO46DoU.s page 244 + + 2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccWQNJQt.s page 244 - - 2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]; @@ -14637,10 +14638,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); 2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccO46DoU.s page 245 + + 2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 245 - - 2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channe 2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n 2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n @@ -14697,10 +14698,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable clearing the output channel on an external event. 2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether + ARM GAS /tmp/ccO46DoU.s page 246 + + 2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. - ARM GAS /tmp/ccWQNJQt.s page 246 - - 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_DisableClear\n 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_DisableClear\n @@ -14757,10 +14758,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal an 2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the Ocx and OCxN signals). + ARM GAS /tmp/ccO46DoU.s page 247 + + 2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not - ARM GAS /tmp/ccWQNJQt.s page 247 - - 2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * dead-time insertion feature is supported by a timer instance. 2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter 2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime @@ -14817,10 +14818,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3 2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 + ARM GAS /tmp/ccO46DoU.s page 248 + + 2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 248 - - 2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) 2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -14877,10 +14878,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF 2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. + ARM GAS /tmp/ccO46DoU.s page 249 + + 2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not - ARM GAS /tmp/ccWQNJQt.s page 249 - - 2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance. 2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1 2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -14937,10 +14938,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx) 2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4)); + ARM GAS /tmp/ccO46DoU.s page 250 + + 2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccWQNJQt.s page 250 - - 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR5) set for output channel 5. @@ -14997,10 +14998,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure input channel. + ARM GAS /tmp/ccO46DoU.s page 251 + + 2647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n - ARM GAS /tmp/ccWQNJQt.s page 251 - - 2648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1PSC LL_TIM_IC_Config\n 2649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1F LL_TIM_IC_Config\n 2650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_Config\n @@ -15057,10 +15058,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICActiveInput This parameter can be one of the following values: + ARM GAS /tmp/ccO46DoU.s page 252 + + 2704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI - ARM GAS /tmp/ccWQNJQt.s page 252 - - 2705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI 2706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC 2707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -15117,10 +15118,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal 2760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccO46DoU.s page 253 + + 2761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); - ARM GAS /tmp/ccWQNJQt.s page 253 - - 2762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT 2764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15177,10 +15178,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 2816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 2817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 + ARM GAS /tmp/ccO46DoU.s page 254 + + 2818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 - ARM GAS /tmp/ccWQNJQt.s page 254 - - 2819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 2820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -15237,10 +15238,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_SetPolarity\n 2873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_SetPolarity\n 2874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_SetPolarity\n + ARM GAS /tmp/ccO46DoU.s page 255 + + 2875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_SetPolarity - ARM GAS /tmp/ccWQNJQt.s page 255 - - 2876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 @@ -15297,10 +15298,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) + ARM GAS /tmp/ccO46DoU.s page 256 + + 2932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccWQNJQt.s page 256 - - 2933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_TI1S); 2934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15357,10 +15358,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccO46DoU.s page 257 + + 2989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccWQNJQt.s page 257 - - 2990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); 2992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15417,10 +15418,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); 3045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccO46DoU.s page 258 + + 3046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccWQNJQt.s page 258 - - 3047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable external clock mode 2. 3049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check @@ -15477,14 +15478,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3120 006e 0A40 ands r2, r2, r1 3121 0070 9A60 str r2, [r3, #8] 3122 .LVL235: + ARM GAS /tmp/ccO46DoU.s page 259 + + 3123 .loc 5 3094 3 is_stmt 0 view .LVU1039 - ARM GAS /tmp/ccWQNJQt.s page 259 - - 3124 .LBE393: 3125 .LBE392: -1261:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); - 3126 .loc 1 1261 3 is_stmt 1 view .LVU1040 +1262:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); + 3126 .loc 1 1262 3 is_stmt 1 view .LVU1040 3127 .LBB394: 3128 .LBI394: 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15537,17 +15538,17 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); 3131 .loc 5 3140 3 view .LVU1042 3132 0072 5A68 ldr r2, [r3, #4] + ARM GAS /tmp/ccO46DoU.s page 260 + + 3133 0074 22F07002 bic r2, r2, #112 - ARM GAS /tmp/ccWQNJQt.s page 260 - - 3134 0078 5A60 str r2, [r3, #4] 3135 .LVL236: 3136 .loc 5 3140 3 is_stmt 0 view .LVU1043 3137 .LBE395: 3138 .LBE394: -1262:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ - 3139 .loc 1 1262 3 is_stmt 1 view .LVU1044 +1263:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 3139 .loc 1 1263 3 is_stmt 1 view .LVU1044 3140 .LBB396: 3141 .LBI396: 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15597,10 +15598,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) + ARM GAS /tmp/ccO46DoU.s page 261 + + 3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccWQNJQt.s page 261 - - 3189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); 3190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15657,14 +15658,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3146 007c 22F08002 bic r2, r2, #128 3147 0080 9A60 str r2, [r3, #8] 3148 .LVL237: + ARM GAS /tmp/ccO46DoU.s page 262 + + 3149 .loc 5 3237 3 is_stmt 0 view .LVU1047 - ARM GAS /tmp/ccWQNJQt.s page 262 - - 3150 .LBE397: 3151 .LBE396: -1267:Src/main.c **** - 3152 .loc 1 1267 1 view .LVU1048 +1268:Src/main.c **** + 3152 .loc 1 1268 1 view .LVU1048 3153 0082 06B0 add sp, sp, #24 3154 .LCFI29: 3155 .cfi_def_cfa_offset 8 @@ -15687,8 +15688,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3173 .thumb_func 3175 MX_TIM5_Init: 3176 .LFB1197: -1334:Src/main.c **** - 3177 .loc 1 1334 1 is_stmt 1 view -0 +1335:Src/main.c **** + 3177 .loc 1 1335 1 is_stmt 1 view -0 3178 .cfi_startproc 3179 @ args = 0, pretend = 0, frame = 24 3180 @ frame_needed = 0, uses_anonymous_args = 0 @@ -15700,27 +15701,27 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3186 0002 86B0 sub sp, sp, #24 3187 .LCFI31: 3188 .cfi_def_cfa_offset 32 -1340:Src/main.c **** - 3189 .loc 1 1340 3 view .LVU1050 -1340:Src/main.c **** - 3190 .loc 1 1340 22 is_stmt 0 view .LVU1051 +1341:Src/main.c **** + 3189 .loc 1 1341 3 view .LVU1050 +1341:Src/main.c **** + 3190 .loc 1 1341 22 is_stmt 0 view .LVU1051 3191 0004 0024 movs r4, #0 3192 0006 0194 str r4, [sp, #4] 3193 0008 0294 str r4, [sp, #8] 3194 000a 0394 str r4, [sp, #12] 3195 000c 0494 str r4, [sp, #16] 3196 000e 0594 str r4, [sp, #20] -1343:Src/main.c **** - 3197 .loc 1 1343 3 is_stmt 1 view .LVU1052 +1344:Src/main.c **** + 3197 .loc 1 1344 3 is_stmt 1 view .LVU1052 3198 .LVL238: 3199 .LBB398: 3200 .LBI398: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 3201 .loc 3 1071 22 view .LVU1053 + ARM GAS /tmp/ccO46DoU.s page 263 + + 3202 .LBB399: - ARM GAS /tmp/ccWQNJQt.s page 263 - - 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); 3203 .loc 3 1073 3 view .LVU1054 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ @@ -15746,8 +15747,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3218 .loc 3 1077 3 is_stmt 0 view .LVU1060 3219 .LBE399: 3220 .LBE398: -1346:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 3221 .loc 1 1346 3 is_stmt 1 view .LVU1061 +1347:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 3221 .loc 1 1347 3 is_stmt 1 view .LVU1061 3222 .LBB400: 3223 .LBI400: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -15761,8 +15762,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3229 0026 D868 ldr r0, [r3, #12] 3230 .LBE401: 3231 .LBE400: -1346:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 3232 .loc 1 1346 3 discriminator 1 view .LVU1065 +1347:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 3232 .loc 1 1347 3 discriminator 1 view .LVU1065 3233 0028 2246 mov r2, r4 3234 002a 2146 mov r1, r4 3235 002c C0F30220 ubfx r0, r0, #8, #3 @@ -15777,10 +15778,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3242 .loc 2 2026 3 view .LVU1067 2028:Drivers/CMSIS/Include/core_cm7.h **** } 3243 .loc 2 2028 5 view .LVU1068 + ARM GAS /tmp/ccO46DoU.s page 264 + + 2028:Drivers/CMSIS/Include/core_cm7.h **** } - ARM GAS /tmp/ccWQNJQt.s page 264 - - 3244 .loc 2 2028 49 is_stmt 0 view .LVU1069 3245 0034 0001 lsls r0, r0, #4 3246 .LVL241: @@ -15796,8 +15797,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3253 .loc 2 2028 47 view .LVU1072 3254 .LBE403: 3255 .LBE402: -1347:Src/main.c **** - 3256 .loc 1 1347 3 is_stmt 1 view .LVU1073 +1348:Src/main.c **** + 3256 .loc 1 1348 3 is_stmt 1 view .LVU1073 3257 .LBB404: 3258 .LBI404: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -15816,40 +15817,40 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3267 .loc 2 1900 43 view .LVU1078 3268 .LBE405: 3269 .LBE404: -1352:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3270 .loc 1 1352 3 is_stmt 1 view .LVU1079 -1352:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3271 .loc 1 1352 28 is_stmt 0 view .LVU1080 +1353:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3270 .loc 1 1353 3 is_stmt 1 view .LVU1079 +1353:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3271 .loc 1 1353 28 is_stmt 0 view .LVU1080 3272 0044 42F21073 movw r3, #10000 3273 0048 ADF80430 strh r3, [sp, #4] @ movhi -1353:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 3274 .loc 1 1353 3 is_stmt 1 view .LVU1081 -1353:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 3275 .loc 1 1353 30 is_stmt 0 view .LVU1082 +1354:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 3274 .loc 1 1354 3 is_stmt 1 view .LVU1081 +1354:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 3275 .loc 1 1354 30 is_stmt 0 view .LVU1082 3276 004c 0294 str r4, [sp, #8] -1354:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3277 .loc 1 1354 3 is_stmt 1 view .LVU1083 -1354:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3278 .loc 1 1354 29 is_stmt 0 view .LVU1084 +1355:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3277 .loc 1 1355 3 is_stmt 1 view .LVU1083 +1355:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3278 .loc 1 1355 29 is_stmt 0 view .LVU1084 3279 004e 4FF40C73 mov r3, #560 3280 0052 0393 str r3, [sp, #12] -1355:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 3281 .loc 1 1355 3 is_stmt 1 view .LVU1085 -1355:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 3282 .loc 1 1355 32 is_stmt 0 view .LVU1086 +1356:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 3281 .loc 1 1356 3 is_stmt 1 view .LVU1085 +1356:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 3282 .loc 1 1356 32 is_stmt 0 view .LVU1086 + ARM GAS /tmp/ccO46DoU.s page 265 + + 3283 0054 0494 str r4, [sp, #16] - ARM GAS /tmp/ccWQNJQt.s page 265 - - -1356:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); - 3284 .loc 1 1356 3 is_stmt 1 view .LVU1087 +1357:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); + 3284 .loc 1 1357 3 is_stmt 1 view .LVU1087 3285 0056 0E4C ldr r4, .L119+12 3286 0058 01A9 add r1, sp, #4 3287 005a 2046 mov r0, r4 3288 005c FFF7FEFF bl LL_TIM_Init 3289 .LVL244: -1357:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); - 3290 .loc 1 1357 3 view .LVU1088 +1358:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); + 3290 .loc 1 1358 3 view .LVU1088 3291 .LBB406: 3292 .LBI406: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15865,8 +15866,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3300 .loc 5 1506 3 is_stmt 0 view .LVU1091 3301 .LBE407: 3302 .LBE406: -1358:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); - 3303 .loc 1 1358 3 is_stmt 1 view .LVU1092 +1359:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); + 3303 .loc 1 1359 3 is_stmt 1 view .LVU1092 3304 .LBB408: 3305 .LBI408: 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15883,8 +15884,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3314 .loc 5 3094 3 is_stmt 0 view .LVU1095 3315 .LBE409: 3316 .LBE408: -1359:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); - 3317 .loc 1 1359 3 is_stmt 1 view .LVU1096 +1360:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); + 3317 .loc 1 1360 3 is_stmt 1 view .LVU1096 3318 .LBB410: 3319 .LBI410: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15897,14 +15898,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3325 0076 6360 str r3, [r4, #4] 3326 .LVL247: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccO46DoU.s page 266 + + 3327 .loc 5 3140 3 is_stmt 0 view .LVU1099 - ARM GAS /tmp/ccWQNJQt.s page 266 - - 3328 .LBE411: 3329 .LBE410: -1360:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ - 3330 .loc 1 1360 3 is_stmt 1 view .LVU1100 +1361:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ + 3330 .loc 1 1361 3 is_stmt 1 view .LVU1100 3331 .LBB412: 3332 .LBI412: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15918,8 +15919,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3340 .loc 5 3237 3 is_stmt 0 view .LVU1103 3341 .LBE413: 3342 .LBE412: -1365:Src/main.c **** - 3343 .loc 1 1365 1 view .LVU1104 +1366:Src/main.c **** + 3343 .loc 1 1366 1 view .LVU1104 3344 0080 06B0 add sp, sp, #24 3345 .LCFI32: 3346 .cfi_def_cfa_offset 8 @@ -15942,8 +15943,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3364 .thumb_func 3366 MX_TIM7_Init: 3367 .LFB1199: -1410:Src/main.c **** - 3368 .loc 1 1410 1 is_stmt 1 view -0 +1411:Src/main.c **** + 3368 .loc 1 1411 1 is_stmt 1 view -0 3369 .cfi_startproc 3370 @ args = 0, pretend = 0, frame = 24 3371 @ frame_needed = 0, uses_anonymous_args = 0 @@ -15955,21 +15956,21 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3377 0002 86B0 sub sp, sp, #24 3378 .LCFI34: 3379 .cfi_def_cfa_offset 32 -1416:Src/main.c **** - 3380 .loc 1 1416 3 view .LVU1106 -1416:Src/main.c **** - ARM GAS /tmp/ccWQNJQt.s page 267 +1417:Src/main.c **** + 3380 .loc 1 1417 3 view .LVU1106 + ARM GAS /tmp/ccO46DoU.s page 267 - 3381 .loc 1 1416 22 is_stmt 0 view .LVU1107 +1417:Src/main.c **** + 3381 .loc 1 1417 22 is_stmt 0 view .LVU1107 3382 0004 0024 movs r4, #0 3383 0006 0194 str r4, [sp, #4] 3384 0008 0294 str r4, [sp, #8] 3385 000a 0394 str r4, [sp, #12] 3386 000c 0494 str r4, [sp, #16] 3387 000e 0594 str r4, [sp, #20] -1419:Src/main.c **** - 3388 .loc 1 1419 3 is_stmt 1 view .LVU1108 +1420:Src/main.c **** + 3388 .loc 1 1420 3 is_stmt 1 view .LVU1108 3389 .LVL249: 3390 .LBB414: 3391 .LBI414: @@ -16001,8 +16002,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3409 .loc 3 1077 3 is_stmt 0 view .LVU1116 3410 .LBE415: 3411 .LBE414: -1422:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 3412 .loc 1 1422 3 is_stmt 1 view .LVU1117 +1423:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 3412 .loc 1 1423 3 is_stmt 1 view .LVU1117 3413 .LBB416: 3414 .LBI416: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16016,11 +16017,11 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3420 0026 D868 ldr r0, [r3, #12] 3421 .LBE417: 3422 .LBE416: -1422:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 3423 .loc 1 1422 3 discriminator 1 view .LVU1121 - ARM GAS /tmp/ccWQNJQt.s page 268 +1423:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + ARM GAS /tmp/ccO46DoU.s page 268 + 3423 .loc 1 1423 3 discriminator 1 view .LVU1121 3424 0028 2246 mov r2, r4 3425 002a 2146 mov r1, r4 3426 002c C0F30220 ubfx r0, r0, #8, #3 @@ -16051,8 +16052,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3444 .loc 2 2028 47 view .LVU1128 3445 .LBE419: 3446 .LBE418: -1423:Src/main.c **** - 3447 .loc 1 1423 3 is_stmt 1 view .LVU1129 +1424:Src/main.c **** + 3447 .loc 1 1424 3 is_stmt 1 view .LVU1129 3448 .LBB420: 3449 .LBI420: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16071,35 +16072,35 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3458 .loc 2 1900 43 view .LVU1134 3459 .LBE421: 3460 .LBE420: -1428:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3461 .loc 1 1428 3 is_stmt 1 view .LVU1135 -1428:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3462 .loc 1 1428 28 is_stmt 0 view .LVU1136 +1429:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3461 .loc 1 1429 3 is_stmt 1 view .LVU1135 +1429:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3462 .loc 1 1429 28 is_stmt 0 view .LVU1136 3463 0044 40F29733 movw r3, #919 3464 0048 ADF80430 strh r3, [sp, #4] @ movhi -1429:Src/main.c **** TIM_InitStruct.Autoreload = 99; - ARM GAS /tmp/ccWQNJQt.s page 269 + ARM GAS /tmp/ccO46DoU.s page 269 - 3465 .loc 1 1429 3 is_stmt 1 view .LVU1137 -1429:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 3466 .loc 1 1429 30 is_stmt 0 view .LVU1138 +1430:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 3465 .loc 1 1430 3 is_stmt 1 view .LVU1137 +1430:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 3466 .loc 1 1430 30 is_stmt 0 view .LVU1138 3467 004c 0294 str r4, [sp, #8] -1430:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 3468 .loc 1 1430 3 is_stmt 1 view .LVU1139 -1430:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 3469 .loc 1 1430 29 is_stmt 0 view .LVU1140 +1431:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 3468 .loc 1 1431 3 is_stmt 1 view .LVU1139 +1431:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 3469 .loc 1 1431 29 is_stmt 0 view .LVU1140 3470 004e 6323 movs r3, #99 3471 0050 0393 str r3, [sp, #12] -1431:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); - 3472 .loc 1 1431 3 is_stmt 1 view .LVU1141 +1432:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); + 3472 .loc 1 1432 3 is_stmt 1 view .LVU1141 3473 0052 0D4C ldr r4, .L123+12 3474 0054 01A9 add r1, sp, #4 3475 0056 2046 mov r0, r4 3476 0058 FFF7FEFF bl LL_TIM_Init 3477 .LVL255: -1432:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); - 3478 .loc 1 1432 3 view .LVU1142 +1433:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); + 3478 .loc 1 1433 3 view .LVU1142 3479 .LBB422: 3480 .LBI422: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16115,8 +16116,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3488 .loc 5 1506 3 is_stmt 0 view .LVU1145 3489 .LBE423: 3490 .LBE422: -1433:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); - 3491 .loc 1 1433 3 is_stmt 1 view .LVU1146 +1434:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); + 3491 .loc 1 1434 3 is_stmt 1 view .LVU1146 3492 .LBB424: 3493 .LBI424: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16133,14 +16134,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3502 .loc 5 3140 3 is_stmt 0 view .LVU1149 3503 .LBE425: 3504 .LBE424: -1434:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ - 3505 .loc 1 1434 3 is_stmt 1 view .LVU1150 +1435:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ + 3505 .loc 1 1435 3 is_stmt 1 view .LVU1150 3506 .LBB426: 3507 .LBI426: + ARM GAS /tmp/ccO46DoU.s page 270 + + 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccWQNJQt.s page 270 - - 3508 .loc 5 3235 22 view .LVU1151 3509 .LBB427: 3510 .loc 5 3237 3 view .LVU1152 @@ -16151,8 +16152,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3515 .loc 5 3237 3 is_stmt 0 view .LVU1153 3516 .LBE427: 3517 .LBE426: -1439:Src/main.c **** - 3518 .loc 1 1439 1 view .LVU1154 +1440:Src/main.c **** + 3518 .loc 1 1440 1 view .LVU1154 3519 0078 06B0 add sp, sp, #24 3520 .LCFI35: 3521 .cfi_def_cfa_offset 8 @@ -16174,8 +16175,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3538 .thumb_func 3540 MX_TIM6_Init: 3541 .LFB1198: -1373:Src/main.c **** - 3542 .loc 1 1373 1 is_stmt 1 view -0 +1374:Src/main.c **** + 3542 .loc 1 1374 1 is_stmt 1 view -0 3543 .cfi_startproc 3544 @ args = 0, pretend = 0, frame = 24 3545 @ frame_needed = 0, uses_anonymous_args = 0 @@ -16187,21 +16188,21 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3551 0002 86B0 sub sp, sp, #24 3552 .LCFI37: 3553 .cfi_def_cfa_offset 32 -1379:Src/main.c **** - 3554 .loc 1 1379 3 view .LVU1156 -1379:Src/main.c **** - 3555 .loc 1 1379 22 is_stmt 0 view .LVU1157 +1380:Src/main.c **** + 3554 .loc 1 1380 3 view .LVU1156 +1380:Src/main.c **** + 3555 .loc 1 1380 22 is_stmt 0 view .LVU1157 3556 0004 0024 movs r4, #0 3557 0006 0194 str r4, [sp, #4] 3558 0008 0294 str r4, [sp, #8] 3559 000a 0394 str r4, [sp, #12] 3560 000c 0494 str r4, [sp, #16] 3561 000e 0594 str r4, [sp, #20] -1382:Src/main.c **** - ARM GAS /tmp/ccWQNJQt.s page 271 + ARM GAS /tmp/ccO46DoU.s page 271 - 3562 .loc 1 1382 3 is_stmt 1 view .LVU1158 +1383:Src/main.c **** + 3562 .loc 1 1383 3 is_stmt 1 view .LVU1158 3563 .LVL259: 3564 .LBB428: 3565 .LBI428: @@ -16233,8 +16234,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3583 .loc 3 1077 3 is_stmt 0 view .LVU1166 3584 .LBE429: 3585 .LBE428: -1385:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 3586 .loc 1 1385 3 is_stmt 1 view .LVU1167 +1386:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 3586 .loc 1 1386 3 is_stmt 1 view .LVU1167 3587 .LBB430: 3588 .LBI430: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16248,8 +16249,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3594 0026 D868 ldr r0, [r3, #12] 3595 .LBE431: 3596 .LBE430: -1385:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 3597 .loc 1 1385 3 discriminator 1 view .LVU1171 +1386:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 3597 .loc 1 1386 3 discriminator 1 view .LVU1171 3598 0028 2246 mov r2, r4 3599 002a 2146 mov r1, r4 3600 002c C0F30220 ubfx r0, r0, #8, #3 @@ -16257,10 +16258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3602 .LVL261: 3603 .LBB432: 3604 .LBI432: + ARM GAS /tmp/ccO46DoU.s page 272 + + 2024:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccWQNJQt.s page 272 - - 3605 .loc 2 2024 22 is_stmt 1 view .LVU1172 3606 .LBB433: 2026:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16283,8 +16284,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3618 .loc 2 2028 47 view .LVU1178 3619 .LBE433: 3620 .LBE432: -1386:Src/main.c **** - 3621 .loc 1 1386 3 is_stmt 1 view .LVU1179 +1387:Src/main.c **** + 3621 .loc 1 1387 3 is_stmt 1 view .LVU1179 3622 .LBB434: 3623 .LBI434: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16303,35 +16304,35 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3632 .loc 2 1900 43 view .LVU1184 3633 .LBE435: 3634 .LBE434: -1391:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3635 .loc 1 1391 3 is_stmt 1 view .LVU1185 -1391:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3636 .loc 1 1391 28 is_stmt 0 view .LVU1186 +1392:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3635 .loc 1 1392 3 is_stmt 1 view .LVU1185 +1392:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3636 .loc 1 1392 28 is_stmt 0 view .LVU1186 3637 0044 4BF2AF33 movw r3, #45999 3638 0048 ADF80430 strh r3, [sp, #4] @ movhi -1392:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 3639 .loc 1 1392 3 is_stmt 1 view .LVU1187 -1392:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 3640 .loc 1 1392 30 is_stmt 0 view .LVU1188 +1393:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 3639 .loc 1 1393 3 is_stmt 1 view .LVU1187 +1393:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 3640 .loc 1 1393 30 is_stmt 0 view .LVU1188 3641 004c 0294 str r4, [sp, #8] -1393:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 3642 .loc 1 1393 3 is_stmt 1 view .LVU1189 -1393:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 3643 .loc 1 1393 29 is_stmt 0 view .LVU1190 - ARM GAS /tmp/ccWQNJQt.s page 273 +1394:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 3642 .loc 1 1394 3 is_stmt 1 view .LVU1189 +1394:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + ARM GAS /tmp/ccO46DoU.s page 273 + 3643 .loc 1 1394 29 is_stmt 0 view .LVU1190 3644 004e 1323 movs r3, #19 3645 0050 0393 str r3, [sp, #12] -1394:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); - 3646 .loc 1 1394 3 is_stmt 1 view .LVU1191 +1395:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); + 3646 .loc 1 1395 3 is_stmt 1 view .LVU1191 3647 0052 0D4C ldr r4, .L127+12 3648 0054 01A9 add r1, sp, #4 3649 0056 2046 mov r0, r4 3650 0058 FFF7FEFF bl LL_TIM_Init 3651 .LVL265: -1395:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); - 3652 .loc 1 1395 3 view .LVU1192 +1396:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); + 3652 .loc 1 1396 3 view .LVU1192 3653 .LBB436: 3654 .LBI436: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16347,8 +16348,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3662 .loc 5 1506 3 is_stmt 0 view .LVU1195 3663 .LBE437: 3664 .LBE436: -1396:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); - 3665 .loc 1 1396 3 is_stmt 1 view .LVU1196 +1397:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); + 3665 .loc 1 1397 3 is_stmt 1 view .LVU1196 3666 .LBB438: 3667 .LBI438: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16365,8 +16366,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3676 .loc 5 3140 3 is_stmt 0 view .LVU1199 3677 .LBE439: 3678 .LBE438: -1397:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ - 3679 .loc 1 1397 3 is_stmt 1 view .LVU1200 +1398:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ + 3679 .loc 1 1398 3 is_stmt 1 view .LVU1200 3680 .LBB440: 3681 .LBI440: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16377,14 +16378,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3686 0072 23F08003 bic r3, r3, #128 3687 0076 A360 str r3, [r4, #8] 3688 .LVL268: + ARM GAS /tmp/ccO46DoU.s page 274 + + 3689 .loc 5 3237 3 is_stmt 0 view .LVU1203 - ARM GAS /tmp/ccWQNJQt.s page 274 - - 3690 .LBE441: 3691 .LBE440: -1402:Src/main.c **** - 3692 .loc 1 1402 1 view .LVU1204 +1403:Src/main.c **** + 3692 .loc 1 1403 1 view .LVU1204 3693 0078 06B0 add sp, sp, #24 3694 .LCFI38: 3695 .cfi_def_cfa_offset 8 @@ -16415,8 +16416,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3719 .thumb_func 3721 Init_params: 3722 .LFB1207: -1870:Src/main.c **** TO6 = 0; - 3723 .loc 1 1870 1 is_stmt 1 view -0 +1871:Src/main.c **** TO6 = 0; + 3723 .loc 1 1871 1 is_stmt 1 view -0 3724 .cfi_startproc 3725 @ args = 0, pretend = 0, frame = 0 3726 @ frame_needed = 0, uses_anonymous_args = 0 @@ -16429,271 +16430,271 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3733 .cfi_offset 7, -12 3734 .cfi_offset 8, -8 3735 .cfi_offset 14, -4 -1871:Src/main.c **** TO7 = 0; - 3736 .loc 1 1871 2 view .LVU1206 -1871:Src/main.c **** TO7 = 0; - 3737 .loc 1 1871 6 is_stmt 0 view .LVU1207 +1872:Src/main.c **** TO7 = 0; + 3736 .loc 1 1872 2 view .LVU1206 +1872:Src/main.c **** TO7 = 0; + 3737 .loc 1 1872 6 is_stmt 0 view .LVU1207 3738 0004 0023 movs r3, #0 3739 0006 9E4A ldr r2, .L141 3740 0008 1360 str r3, [r2] -1872:Src/main.c **** TO7_before = 0; - 3741 .loc 1 1872 2 is_stmt 1 view .LVU1208 - ARM GAS /tmp/ccWQNJQt.s page 275 +1873:Src/main.c **** TO7_before = 0; + ARM GAS /tmp/ccO46DoU.s page 275 -1872:Src/main.c **** TO7_before = 0; - 3742 .loc 1 1872 6 is_stmt 0 view .LVU1209 + 3741 .loc 1 1873 2 is_stmt 1 view .LVU1208 +1873:Src/main.c **** TO7_before = 0; + 3742 .loc 1 1873 6 is_stmt 0 view .LVU1209 3743 000a 9E4A ldr r2, .L141+4 3744 000c 1360 str r3, [r2] -1873:Src/main.c **** TO6_before = 0; - 3745 .loc 1 1873 2 is_stmt 1 view .LVU1210 -1873:Src/main.c **** TO6_before = 0; - 3746 .loc 1 1873 13 is_stmt 0 view .LVU1211 +1874:Src/main.c **** TO6_before = 0; + 3745 .loc 1 1874 2 is_stmt 1 view .LVU1210 +1874:Src/main.c **** TO6_before = 0; + 3746 .loc 1 1874 13 is_stmt 0 view .LVU1211 3747 000e 9E4A ldr r2, .L141+8 3748 0010 1360 str r3, [r2] -1874:Src/main.c **** TO6_uart = 0; - 3749 .loc 1 1874 2 is_stmt 1 view .LVU1212 -1874:Src/main.c **** TO6_uart = 0; - 3750 .loc 1 1874 13 is_stmt 0 view .LVU1213 +1875:Src/main.c **** TO6_uart = 0; + 3749 .loc 1 1875 2 is_stmt 1 view .LVU1212 +1875:Src/main.c **** TO6_uart = 0; + 3750 .loc 1 1875 13 is_stmt 0 view .LVU1213 3751 0012 9E4A ldr r2, .L141+12 3752 0014 1360 str r3, [r2] -1875:Src/main.c **** flg_tmt = 0; - 3753 .loc 1 1875 2 is_stmt 1 view .LVU1214 -1875:Src/main.c **** flg_tmt = 0; - 3754 .loc 1 1875 11 is_stmt 0 view .LVU1215 +1876:Src/main.c **** flg_tmt = 0; + 3753 .loc 1 1876 2 is_stmt 1 view .LVU1214 +1876:Src/main.c **** flg_tmt = 0; + 3754 .loc 1 1876 11 is_stmt 0 view .LVU1215 3755 0016 9E4A ldr r2, .L141+16 3756 0018 1360 str r3, [r2] -1876:Src/main.c **** UART_rec_incr = 0; - 3757 .loc 1 1876 2 is_stmt 1 view .LVU1216 -1876:Src/main.c **** UART_rec_incr = 0; - 3758 .loc 1 1876 10 is_stmt 0 view .LVU1217 +1877:Src/main.c **** UART_rec_incr = 0; + 3757 .loc 1 1877 2 is_stmt 1 view .LVU1216 +1877:Src/main.c **** UART_rec_incr = 0; + 3758 .loc 1 1877 10 is_stmt 0 view .LVU1217 3759 001a 9E4A ldr r2, .L141+20 3760 001c 1370 strb r3, [r2] -1877:Src/main.c **** fgoto = 0; - 3761 .loc 1 1877 2 is_stmt 1 view .LVU1218 -1877:Src/main.c **** fgoto = 0; - 3762 .loc 1 1877 16 is_stmt 0 view .LVU1219 +1878:Src/main.c **** fgoto = 0; + 3761 .loc 1 1878 2 is_stmt 1 view .LVU1218 +1878:Src/main.c **** fgoto = 0; + 3762 .loc 1 1878 16 is_stmt 0 view .LVU1219 3763 001e 9E4A ldr r2, .L141+24 3764 0020 1380 strh r3, [r2] @ movhi -1878:Src/main.c **** sizeoffile = 0; - 3765 .loc 1 1878 2 is_stmt 1 view .LVU1220 -1878:Src/main.c **** sizeoffile = 0; - 3766 .loc 1 1878 8 is_stmt 0 view .LVU1221 +1879:Src/main.c **** sizeoffile = 0; + 3765 .loc 1 1879 2 is_stmt 1 view .LVU1220 +1879:Src/main.c **** sizeoffile = 0; + 3766 .loc 1 1879 8 is_stmt 0 view .LVU1221 3767 0022 9E4A ldr r2, .L141+28 3768 0024 1360 str r3, [r2] -1879:Src/main.c **** u_tx_flg = 0; - 3769 .loc 1 1879 2 is_stmt 1 view .LVU1222 -1879:Src/main.c **** u_tx_flg = 0; - 3770 .loc 1 1879 13 is_stmt 0 view .LVU1223 +1880:Src/main.c **** u_tx_flg = 0; + 3769 .loc 1 1880 2 is_stmt 1 view .LVU1222 +1880:Src/main.c **** u_tx_flg = 0; + 3770 .loc 1 1880 13 is_stmt 0 view .LVU1223 3771 0026 9E4A ldr r2, .L141+32 3772 0028 1360 str r3, [r2] -1880:Src/main.c **** u_rx_flg = 0; - 3773 .loc 1 1880 2 is_stmt 1 view .LVU1224 -1880:Src/main.c **** u_rx_flg = 0; - 3774 .loc 1 1880 11 is_stmt 0 view .LVU1225 +1881:Src/main.c **** u_rx_flg = 0; + 3773 .loc 1 1881 2 is_stmt 1 view .LVU1224 +1881:Src/main.c **** u_rx_flg = 0; + 3774 .loc 1 1881 11 is_stmt 0 view .LVU1225 3775 002a 9E4A ldr r2, .L141+36 3776 002c 1370 strb r3, [r2] -1881:Src/main.c **** //State_Data[0]=0; - 3777 .loc 1 1881 2 is_stmt 1 view .LVU1226 -1881:Src/main.c **** //State_Data[0]=0; - 3778 .loc 1 1881 11 is_stmt 0 view .LVU1227 +1882:Src/main.c **** //State_Data[0]=0; + 3777 .loc 1 1882 2 is_stmt 1 view .LVU1226 +1882:Src/main.c **** //State_Data[0]=0; + 3778 .loc 1 1882 11 is_stmt 0 view .LVU1227 + ARM GAS /tmp/ccO46DoU.s page 276 + + 3779 002e 9E4A ldr r2, .L141+40 - ARM GAS /tmp/ccWQNJQt.s page 276 - - 3780 0030 1370 strb r3, [r2] -1884:Src/main.c **** { - 3781 .loc 1 1884 2 is_stmt 1 view .LVU1228 +1885:Src/main.c **** { + 3781 .loc 1 1885 2 is_stmt 1 view .LVU1228 3782 .LBB442: -1884:Src/main.c **** { - 3783 .loc 1 1884 7 view .LVU1229 +1885:Src/main.c **** { + 3783 .loc 1 1885 7 view .LVU1229 3784 .LVL269: -1884:Src/main.c **** { - 3785 .loc 1 1884 2 is_stmt 0 view .LVU1230 +1885:Src/main.c **** { + 3785 .loc 1 1885 2 is_stmt 0 view .LVU1230 3786 0032 05E0 b .L130 3787 .LVL270: 3788 .L131: -1886:Src/main.c **** } - 3789 .loc 1 1886 3 is_stmt 1 view .LVU1231 -1886:Src/main.c **** } - 3790 .loc 1 1886 16 is_stmt 0 view .LVU1232 +1887:Src/main.c **** } + 3789 .loc 1 1887 3 is_stmt 1 view .LVU1231 +1887:Src/main.c **** } + 3790 .loc 1 1887 16 is_stmt 0 view .LVU1232 3791 0034 9D4A ldr r2, .L141+44 3792 0036 0021 movs r1, #0 3793 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi -1884:Src/main.c **** { - 3794 .loc 1 1884 31 is_stmt 1 discriminator 3 view .LVU1233 +1885:Src/main.c **** { + 3794 .loc 1 1885 31 is_stmt 1 discriminator 3 view .LVU1233 3795 003c 0133 adds r3, r3, #1 3796 .LVL271: -1884:Src/main.c **** { - 3797 .loc 1 1884 31 is_stmt 0 discriminator 3 view .LVU1234 +1885:Src/main.c **** { + 3797 .loc 1 1885 31 is_stmt 0 discriminator 3 view .LVU1234 3798 003e 9BB2 uxth r3, r3 3799 .LVL272: 3800 .L130: -1884:Src/main.c **** { - 3801 .loc 1 1884 22 is_stmt 1 discriminator 1 view .LVU1235 +1885:Src/main.c **** { + 3801 .loc 1 1885 22 is_stmt 1 discriminator 1 view .LVU1235 3802 0040 0E2B cmp r3, #14 3803 0042 F7D9 bls .L131 3804 .LBE442: -1888:Src/main.c **** - 3805 .loc 1 1888 2 view .LVU1236 -1888:Src/main.c **** - 3806 .loc 1 1888 14 is_stmt 0 view .LVU1237 +1889:Src/main.c **** + 3805 .loc 1 1889 2 view .LVU1236 +1889:Src/main.c **** + 3806 .loc 1 1889 14 is_stmt 0 view .LVU1237 3807 0044 994B ldr r3, .L141+44 3808 .LVL273: -1888:Src/main.c **** - 3809 .loc 1 1888 14 view .LVU1238 +1889:Src/main.c **** + 3809 .loc 1 1889 14 view .LVU1238 3810 0046 41F21112 movw r2, #4369 3811 004a 1A80 strh r2, [r3] @ movhi -1891:Src/main.c **** Def_setup.LD1_EN = 0; - 3812 .loc 1 1891 2 is_stmt 1 view .LVU1239 -1891:Src/main.c **** Def_setup.LD1_EN = 0; - 3813 .loc 1 1891 21 is_stmt 0 view .LVU1240 +1892:Src/main.c **** Def_setup.LD1_EN = 0; + 3812 .loc 1 1892 2 is_stmt 1 view .LVU1239 +1892:Src/main.c **** Def_setup.LD1_EN = 0; + 3813 .loc 1 1892 21 is_stmt 0 view .LVU1240 3814 004c 984B ldr r3, .L141+48 3815 004e 0022 movs r2, #0 3816 0050 DA81 strh r2, [r3, #14] @ movhi -1892:Src/main.c **** Def_setup.LD2_EN = 0; - 3817 .loc 1 1892 2 is_stmt 1 view .LVU1241 -1892:Src/main.c **** Def_setup.LD2_EN = 0; - 3818 .loc 1 1892 19 is_stmt 0 view .LVU1242 +1893:Src/main.c **** Def_setup.LD2_EN = 0; + 3817 .loc 1 1893 2 is_stmt 1 view .LVU1241 +1893:Src/main.c **** Def_setup.LD2_EN = 0; + 3818 .loc 1 1893 19 is_stmt 0 view .LVU1242 3819 0052 DA70 strb r2, [r3, #3] -1893:Src/main.c **** Def_setup.MES_ID = 0; - 3820 .loc 1 1893 2 is_stmt 1 view .LVU1243 - ARM GAS /tmp/ccWQNJQt.s page 277 +1894:Src/main.c **** Def_setup.MES_ID = 0; + ARM GAS /tmp/ccO46DoU.s page 277 -1893:Src/main.c **** Def_setup.MES_ID = 0; - 3821 .loc 1 1893 19 is_stmt 0 view .LVU1244 + 3820 .loc 1 1894 2 is_stmt 1 view .LVU1243 +1894:Src/main.c **** Def_setup.MES_ID = 0; + 3821 .loc 1 1894 19 is_stmt 0 view .LVU1244 3822 0054 1A71 strb r2, [r3, #4] -1894:Src/main.c **** Def_setup.PI1_RD = 0; - 3823 .loc 1 1894 2 is_stmt 1 view .LVU1245 -1894:Src/main.c **** Def_setup.PI1_RD = 0; - 3824 .loc 1 1894 19 is_stmt 0 view .LVU1246 +1895:Src/main.c **** Def_setup.PI1_RD = 0; + 3823 .loc 1 1895 2 is_stmt 1 view .LVU1245 +1895:Src/main.c **** Def_setup.PI1_RD = 0; + 3824 .loc 1 1895 19 is_stmt 0 view .LVU1246 3825 0056 1A82 strh r2, [r3, #16] @ movhi -1895:Src/main.c **** Def_setup.PI2_RD = 0; - 3826 .loc 1 1895 2 is_stmt 1 view .LVU1247 -1895:Src/main.c **** Def_setup.PI2_RD = 0; - 3827 .loc 1 1895 19 is_stmt 0 view .LVU1248 +1896:Src/main.c **** Def_setup.PI2_RD = 0; + 3826 .loc 1 1896 2 is_stmt 1 view .LVU1247 +1896:Src/main.c **** Def_setup.PI2_RD = 0; + 3827 .loc 1 1896 19 is_stmt 0 view .LVU1248 3828 0058 1A73 strb r2, [r3, #12] -1896:Src/main.c **** Def_setup.REF1_EN = 0; - 3829 .loc 1 1896 2 is_stmt 1 view .LVU1249 -1896:Src/main.c **** Def_setup.REF1_EN = 0; - 3830 .loc 1 1896 19 is_stmt 0 view .LVU1250 +1897:Src/main.c **** Def_setup.REF1_EN = 0; + 3829 .loc 1 1897 2 is_stmt 1 view .LVU1249 +1897:Src/main.c **** Def_setup.REF1_EN = 0; + 3830 .loc 1 1897 19 is_stmt 0 view .LVU1250 3831 005a 5A73 strb r2, [r3, #13] -1897:Src/main.c **** Def_setup.REF2_EN = 0; - 3832 .loc 1 1897 2 is_stmt 1 view .LVU1251 -1897:Src/main.c **** Def_setup.REF2_EN = 0; - 3833 .loc 1 1897 20 is_stmt 0 view .LVU1252 +1898:Src/main.c **** Def_setup.REF2_EN = 0; + 3832 .loc 1 1898 2 is_stmt 1 view .LVU1251 +1898:Src/main.c **** Def_setup.REF2_EN = 0; + 3833 .loc 1 1898 20 is_stmt 0 view .LVU1252 3834 005c 5A71 strb r2, [r3, #5] -1898:Src/main.c **** Def_setup.SD_EN = 0; - 3835 .loc 1 1898 2 is_stmt 1 view .LVU1253 -1898:Src/main.c **** Def_setup.SD_EN = 0; - 3836 .loc 1 1898 20 is_stmt 0 view .LVU1254 +1899:Src/main.c **** Def_setup.SD_EN = 0; + 3835 .loc 1 1899 2 is_stmt 1 view .LVU1253 +1899:Src/main.c **** Def_setup.SD_EN = 0; + 3836 .loc 1 1899 20 is_stmt 0 view .LVU1254 3837 005e 9A71 strb r2, [r3, #6] -1899:Src/main.c **** Def_setup.TEC1_EN = 0; - 3838 .loc 1 1899 2 is_stmt 1 view .LVU1255 -1899:Src/main.c **** Def_setup.TEC1_EN = 0; - 3839 .loc 1 1899 18 is_stmt 0 view .LVU1256 +1900:Src/main.c **** Def_setup.TEC1_EN = 0; + 3838 .loc 1 1900 2 is_stmt 1 view .LVU1255 +1900:Src/main.c **** Def_setup.TEC1_EN = 0; + 3839 .loc 1 1900 18 is_stmt 0 view .LVU1256 3840 0060 DA72 strb r2, [r3, #11] -1900:Src/main.c **** Def_setup.TEC2_EN = 0; - 3841 .loc 1 1900 2 is_stmt 1 view .LVU1257 -1900:Src/main.c **** Def_setup.TEC2_EN = 0; - 3842 .loc 1 1900 20 is_stmt 0 view .LVU1258 +1901:Src/main.c **** Def_setup.TEC2_EN = 0; + 3841 .loc 1 1901 2 is_stmt 1 view .LVU1257 +1901:Src/main.c **** Def_setup.TEC2_EN = 0; + 3842 .loc 1 1901 20 is_stmt 0 view .LVU1258 3843 0062 DA71 strb r2, [r3, #7] -1901:Src/main.c **** Def_setup.TS1_EN = 0; - 3844 .loc 1 1901 2 is_stmt 1 view .LVU1259 -1901:Src/main.c **** Def_setup.TS1_EN = 0; - 3845 .loc 1 1901 20 is_stmt 0 view .LVU1260 +1902:Src/main.c **** Def_setup.TS1_EN = 0; + 3844 .loc 1 1902 2 is_stmt 1 view .LVU1259 +1902:Src/main.c **** Def_setup.TS1_EN = 0; + 3845 .loc 1 1902 20 is_stmt 0 view .LVU1260 3846 0064 1A72 strb r2, [r3, #8] -1902:Src/main.c **** Def_setup.TS2_EN = 0; - 3847 .loc 1 1902 2 is_stmt 1 view .LVU1261 -1902:Src/main.c **** Def_setup.TS2_EN = 0; - 3848 .loc 1 1902 19 is_stmt 0 view .LVU1262 +1903:Src/main.c **** Def_setup.TS2_EN = 0; + 3847 .loc 1 1903 2 is_stmt 1 view .LVU1261 +1903:Src/main.c **** Def_setup.TS2_EN = 0; + 3848 .loc 1 1903 19 is_stmt 0 view .LVU1262 3849 0066 5A72 strb r2, [r3, #9] -1903:Src/main.c **** Def_setup.U5V1_EN = 0; - 3850 .loc 1 1903 2 is_stmt 1 view .LVU1263 -1903:Src/main.c **** Def_setup.U5V1_EN = 0; - 3851 .loc 1 1903 19 is_stmt 0 view .LVU1264 +1904:Src/main.c **** Def_setup.U5V1_EN = 0; + 3850 .loc 1 1904 2 is_stmt 1 view .LVU1263 +1904:Src/main.c **** Def_setup.U5V1_EN = 0; + 3851 .loc 1 1904 19 is_stmt 0 view .LVU1264 3852 0068 9A72 strb r2, [r3, #10] -1904:Src/main.c **** Def_setup.U5V2_EN = 0; - 3853 .loc 1 1904 2 is_stmt 1 view .LVU1265 -1904:Src/main.c **** Def_setup.U5V2_EN = 0; - 3854 .loc 1 1904 20 is_stmt 0 view .LVU1266 - ARM GAS /tmp/ccWQNJQt.s page 278 +1905:Src/main.c **** Def_setup.U5V2_EN = 0; + 3853 .loc 1 1905 2 is_stmt 1 view .LVU1265 +1905:Src/main.c **** Def_setup.U5V2_EN = 0; + ARM GAS /tmp/ccO46DoU.s page 278 + 3854 .loc 1 1905 20 is_stmt 0 view .LVU1266 3855 006a 5A70 strb r2, [r3, #1] -1905:Src/main.c **** Def_setup.WORK_EN = 0; - 3856 .loc 1 1905 2 is_stmt 1 view .LVU1267 -1905:Src/main.c **** Def_setup.WORK_EN = 0; - 3857 .loc 1 1905 20 is_stmt 0 view .LVU1268 +1906:Src/main.c **** Def_setup.WORK_EN = 0; + 3856 .loc 1 1906 2 is_stmt 1 view .LVU1267 +1906:Src/main.c **** Def_setup.WORK_EN = 0; + 3857 .loc 1 1906 20 is_stmt 0 view .LVU1268 3858 006c 9A70 strb r2, [r3, #2] -1906:Src/main.c **** - 3859 .loc 1 1906 2 is_stmt 1 view .LVU1269 -1906:Src/main.c **** - 3860 .loc 1 1906 20 is_stmt 0 view .LVU1270 +1907:Src/main.c **** + 3859 .loc 1 1907 2 is_stmt 1 view .LVU1269 +1907:Src/main.c **** + 3860 .loc 1 1907 20 is_stmt 0 view .LVU1270 3861 006e 1A70 strb r2, [r3] -1908:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 3862 .loc 1 1908 2 is_stmt 1 view .LVU1271 -1908:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 3863 .loc 1 1908 24 is_stmt 0 view .LVU1272 +1909:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 3862 .loc 1 1909 2 is_stmt 1 view .LVU1271 +1909:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 3863 .loc 1 1909 24 is_stmt 0 view .LVU1272 3864 0070 904D ldr r5, .L141+52 3865 0072 2A80 strh r2, [r5] @ movhi -1909:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 3866 .loc 1 1909 2 is_stmt 1 view .LVU1273 -1909:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 3867 .loc 1 1909 24 is_stmt 0 view .LVU1274 +1910:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 3866 .loc 1 1910 2 is_stmt 1 view .LVU1273 +1910:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 3867 .loc 1 1910 24 is_stmt 0 view .LVU1274 3868 0074 904C ldr r4, .L141+56 3869 0076 2280 strh r2, [r4] @ movhi -1910:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 3870 .loc 1 1910 2 is_stmt 1 view .LVU1275 -1910:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 3871 .loc 1 1910 28 is_stmt 0 view .LVU1276 +1911:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 3870 .loc 1 1911 2 is_stmt 1 view .LVU1275 +1911:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 3871 .loc 1 1911 28 is_stmt 0 view .LVU1276 3872 0078 0022 movs r2, #0 3873 007a 6A60 str r2, [r5, #4] @ float -1911:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 3874 .loc 1 1911 2 is_stmt 1 view .LVU1277 -1911:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 3875 .loc 1 1911 28 is_stmt 0 view .LVU1278 +1912:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 3874 .loc 1 1912 2 is_stmt 1 view .LVU1277 +1912:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 3875 .loc 1 1912 28 is_stmt 0 view .LVU1278 3876 007c 6260 str r2, [r4, #4] @ float -1912:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 3877 .loc 1 1912 2 is_stmt 1 view .LVU1279 -1912:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 3878 .loc 1 1912 28 is_stmt 0 view .LVU1280 +1913:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 3877 .loc 1 1913 2 is_stmt 1 view .LVU1279 +1913:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 3878 .loc 1 1913 28 is_stmt 0 view .LVU1280 3879 007e AA60 str r2, [r5, #8] @ float -1913:Src/main.c **** - 3880 .loc 1 1913 2 is_stmt 1 view .LVU1281 -1913:Src/main.c **** - 3881 .loc 1 1913 28 is_stmt 0 view .LVU1282 +1914:Src/main.c **** + 3880 .loc 1 1914 2 is_stmt 1 view .LVU1281 +1914:Src/main.c **** + 3881 .loc 1 1914 28 is_stmt 0 view .LVU1282 3882 0080 A260 str r2, [r4, #8] @ float -1916:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 3883 .loc 1 1916 2 is_stmt 1 view .LVU1283 -1916:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 3884 .loc 1 1916 13 is_stmt 0 view .LVU1284 +1917:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 3883 .loc 1 1917 2 is_stmt 1 view .LVU1283 +1917:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 3884 .loc 1 1917 13 is_stmt 0 view .LVU1284 3885 0082 8E4E ldr r6, .L141+60 3886 0084 9C46 mov ip, r3 3887 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} 3888 008a 0FC6 stmia r6!, {r0, r1, r2, r3} 3889 008c DCF80030 ldr r3, [ip] 3890 0090 3380 strh r3, [r6] @ movhi -1917:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 3891 .loc 1 1917 2 is_stmt 1 view .LVU1285 -1917:Src/main.c **** LD2_curr_setup = LD2_def_setup; - ARM GAS /tmp/ccWQNJQt.s page 279 +1918:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 3891 .loc 1 1918 2 is_stmt 1 view .LVU1285 + ARM GAS /tmp/ccO46DoU.s page 279 - 3892 .loc 1 1917 17 is_stmt 0 view .LVU1286 +1918:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 3892 .loc 1 1918 17 is_stmt 0 view .LVU1286 3893 0092 8B4E ldr r6, .L141+64 3894 0094 95E80F00 ldm r5, {r0, r1, r2, r3} 3895 0098 86E80F00 stm r6, {r0, r1, r2, r3} -1918:Src/main.c **** - 3896 .loc 1 1918 2 is_stmt 1 view .LVU1287 -1918:Src/main.c **** - 3897 .loc 1 1918 17 is_stmt 0 view .LVU1288 +1919:Src/main.c **** + 3896 .loc 1 1919 2 is_stmt 1 view .LVU1287 +1919:Src/main.c **** + 3897 .loc 1 1919 17 is_stmt 0 view .LVU1288 3898 009c 894D ldr r5, .L141+68 3899 009e 94E80F00 ldm r4, {r0, r1, r2, r3} 3900 00a2 85E80F00 stm r5, {r0, r1, r2, r3} -1923:Src/main.c **** LL_TIM_EnableCounter(TIM6); - 3901 .loc 1 1923 2 is_stmt 1 view .LVU1289 +1924:Src/main.c **** LL_TIM_EnableCounter(TIM6); + 3901 .loc 1 1924 2 is_stmt 1 view .LVU1289 3902 .LVL274: 3903 .LBB443: 3904 .LBI443: @@ -16737,10 +16738,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8 3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6 3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8 + ARM GAS /tmp/ccO46DoU.s page 280 + + 3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6 - ARM GAS /tmp/ccWQNJQt.s page 280 - - 3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8 3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5 3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6 @@ -16797,10 +16798,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BKF LL_TIM_ConfigBRK 3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakPolarity This parameter can be one of the following values: + ARM GAS /tmp/ccO46DoU.s page 281 + + 3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_LOW - ARM GAS /tmp/ccWQNJQt.s page 281 - - 3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_HIGH 3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakFilter This parameter can be one of the following values: 3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1 @@ -16857,10 +16858,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break 2 input. 3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not 3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input. + ARM GAS /tmp/ccO46DoU.s page 282 + + 3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n - ARM GAS /tmp/ccWQNJQt.s page 282 - - 3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BK2F LL_TIM_ConfigBRK2 3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Break2Polarity This parameter can be one of the following values: @@ -16917,10 +16918,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput 3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccO46DoU.s page 283 + + 3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 283 - - 3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx) 3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); @@ -16977,10 +16978,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccO46DoU.s page 284 + + 3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccWQNJQt.s page 284 - - 3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE); 3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -17037,10 +17038,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: 3561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN 3562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK + ARM GAS /tmp/ccO46DoU.s page 285 + + 3563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 285 - - 3564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_ 3566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17097,10 +17098,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SR 3618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR 3619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1 + ARM GAS /tmp/ccO46DoU.s page 286 + + 3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2 - ARM GAS /tmp/ccWQNJQt.s page 286 - - 3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER 3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT 3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC @@ -17157,10 +17158,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a some timer inputs can be remapped. 3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll TIM2_OR ITR1_RMP LL_TIM_SetRemap\n 3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5_OR TI4_RMP LL_TIM_SetRemap\n + ARM GAS /tmp/ccO46DoU.s page 287 + + 3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11_OR TI1_RMP LL_TIM_SetRemap - ARM GAS /tmp/ccWQNJQt.s page 287 - - 3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Remap Remap param depends on the TIMx. Description available only 3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in CHM version of the User Manual (not in .pdf). @@ -17217,10 +17218,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending). + ARM GAS /tmp/ccO46DoU.s page 288 + + 3734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE - ARM GAS /tmp/ccWQNJQt.s page 288 - - 3735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -17277,10 +17278,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 interrupt flag (CC3F). 3789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3 3790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccO46DoU.s page 289 + + 3791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 289 - - 3792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) 3794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17337,10 +17338,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccO46DoU.s page 290 + + 3848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccWQNJQt.s page 290 - - 3849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL); 3851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -17397,10 +17398,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) 3904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccO46DoU.s page 291 + + 3905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); - ARM GAS /tmp/ccWQNJQt.s page 291 - - 3906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -17457,10 +17458,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL); 3961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccO46DoU.s page 292 + + 3962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccWQNJQt.s page 292 - - 3963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF). 3965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR @@ -17517,10 +17518,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); 4018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccO46DoU.s page 293 + + 4019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccWQNJQt.s page 293 - - 4020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set 4022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 3 over-capture interrupt is pending). @@ -17577,10 +17578,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL); 4075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccO46DoU.s page 294 + + 4076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccWQNJQt.s page 294 - - 4077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 4079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -17608,8 +17609,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3913 .loc 5 4092 3 is_stmt 0 view .LVU1292 3914 .LBE444: 3915 .LBE443: -1924:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); - 3916 .loc 1 1924 2 is_stmt 1 view .LVU1293 +1925:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); + 3916 .loc 1 1925 2 is_stmt 1 view .LVU1293 3917 .LBB445: 3918 .LBI445: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17625,8 +17626,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3926 .loc 5 1315 3 is_stmt 0 view .LVU1296 3927 .LBE446: 3928 .LBE445: -1925:Src/main.c **** LL_TIM_EnableCounter(TIM7); - 3929 .loc 1 1925 2 is_stmt 1 view .LVU1297 +1926:Src/main.c **** LL_TIM_EnableCounter(TIM7); + 3929 .loc 1 1926 2 is_stmt 1 view .LVU1297 3930 .LBB447: 3931 .LBI447: 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17637,15 +17638,15 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3936 00bc DA68 ldr r2, [r3, #12] 3937 00be 42F00102 orr r2, r2, #1 3938 00c2 DA60 str r2, [r3, #12] + ARM GAS /tmp/ccO46DoU.s page 295 + + 3939 .LVL277: - ARM GAS /tmp/ccWQNJQt.s page 295 - - 3940 .loc 5 4092 3 is_stmt 0 view .LVU1300 3941 .LBE448: 3942 .LBE447: -1926:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); - 3943 .loc 1 1926 2 is_stmt 1 view .LVU1301 +1927:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); + 3943 .loc 1 1927 2 is_stmt 1 view .LVU1301 3944 .LBB449: 3945 .LBI449: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17661,8 +17662,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3953 .loc 5 1315 3 is_stmt 0 view .LVU1304 3954 .LBE450: 3955 .LBE449: -1933:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 3956 .loc 1 1933 3 is_stmt 1 view .LVU1305 +1934:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 3956 .loc 1 1934 3 is_stmt 1 view .LVU1305 3957 .LBB451: 3958 .LBI451: 3959 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" @@ -17697,10 +17698,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ + ARM GAS /tmp/ccO46DoU.s page 296 + + 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 296 - - 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined (DMA1) || defined (DMA2) 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -17757,10 +17758,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or as Destination base address in case of memory to memory + ARM GAS /tmp/ccO46DoU.s page 297 + + 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccWQNJQt.s page 297 - - 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Direction; /*!< Specifies if the data will be transferred from memory to pe @@ -17817,10 +17818,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccO46DoU.s page 298 + + 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for - ARM GAS /tmp/ccWQNJQt.s page 298 - - 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_FIFOMODE 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The Direct mode (FIFO mode disabled) cannot be used i 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** memory-to-memory data transfer is configured on the selecte @@ -17877,10 +17878,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_DIRECTION DIRECTION 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccO46DoU.s page 299 + + 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direc - ARM GAS /tmp/ccWQNJQt.s page 299 - - 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_SxCR_DIR_0 /*!< Memory to peripheral direc 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_SxCR_DIR_1 /*!< Memory to memory direction 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -17937,10 +17938,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MDATAALIGN MDATAALIGN 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccO46DoU.s page 300 + + 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : By - ARM GAS /tmp/ccWQNJQt.s page 300 - - 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_HALFWORD DMA_SxCR_MSIZE_0 /*!< Memory data alignment : Ha 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_WORD DMA_SxCR_MSIZE_1 /*!< Memory data alignment : Wo 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -17997,10 +17998,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_SINGLE 0x00000000U /*!< Memory burst 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC4 DMA_SxCR_MBURST_0 /*!< Memory burst + ARM GAS /tmp/ccO46DoU.s page 301 + + 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC8 DMA_SxCR_MBURST_1 /*!< Memory burst - ARM GAS /tmp/ccWQNJQt.s page 301 - - 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC16 (DMA_SxCR_MBURST_0 | DMA_SxCR_MBURST_1) /*!< Memory burst 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -18057,10 +18058,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CURRENTTARGETMEM1 DMA_SxCR_CT /*!< Set CurrentT 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} + ARM GAS /tmp/ccO46DoU.s page 302 + + 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 302 - - 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -18117,10 +18118,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream1)) ? LL_DMA_STREAM_1 : \ 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream2)) ? LL_DMA_STREAM_2 : \ 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream2)) ? LL_DMA_STREAM_2 : \ + ARM GAS /tmp/ccO46DoU.s page 303 + + 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream3)) ? LL_DMA_STREAM_3 : \ - ARM GAS /tmp/ccWQNJQt.s page 303 - - 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream3)) ? LL_DMA_STREAM_3 : \ 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream4)) ? LL_DMA_STREAM_4 : \ 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream4)) ? LL_DMA_STREAM_4 : \ @@ -18177,10 +18178,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccO46DoU.s page 304 + + 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccWQNJQt.s page 304 - - 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -18223,8 +18224,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3968 .loc 6 519 3 is_stmt 0 view .LVU1308 3969 .LBE452: 3970 .LBE451: -1934:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 3971 .loc 1 1934 3 is_stmt 1 view .LVU1309 +1935:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 3971 .loc 1 1935 3 is_stmt 1 view .LVU1309 3972 .LBB453: 3973 .LBI453: 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -18237,10 +18238,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccO46DoU.s page 305 + + 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 - ARM GAS /tmp/ccWQNJQt.s page 305 - - 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -18297,10 +18298,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccO46DoU.s page 306 + + 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 - ARM GAS /tmp/ccWQNJQt.s page 306 - - 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -18357,10 +18358,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_PFCTRL + ARM GAS /tmp/ccO46DoU.s page 307 + + 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 307 - - 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Mode) 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -18417,10 +18418,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral increment mode. 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINC LL_DMA_GetPeriphIncMode + ARM GAS /tmp/ccO46DoU.s page 308 + + 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccWQNJQt.s page 308 - - 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -18477,10 +18478,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_NOINCREMENT + ARM GAS /tmp/ccO46DoU.s page 309 + + 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_INCREMENT - ARM GAS /tmp/ccWQNJQt.s page 309 - - 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Stream) 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -18537,10 +18538,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory size. 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_SetMemorySize + ARM GAS /tmp/ccO46DoU.s page 310 + + 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccWQNJQt.s page 310 - - 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -18597,10 +18598,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccO46DoU.s page 311 + + 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param OffsetSize This parameter can be one of the following values: - ARM GAS /tmp/ccWQNJQt.s page 311 - - 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_PSIZE 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4 875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -18657,10 +18658,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccO46DoU.s page 312 + + 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 312 - - 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream priority level. 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PL LL_DMA_GetStreamPriorityLevel 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -18717,10 +18718,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccO46DoU.s page 313 + + 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 - ARM GAS /tmp/ccWQNJQt.s page 313 - - 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -18777,10 +18778,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccO46DoU.s page 314 + + 1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccWQNJQt.s page 314 - - 1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -18837,10 +18838,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccO46DoU.s page 315 + + 1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 315 - - 1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory burst transfer configuration. 1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MBURST LL_DMA_GetMemoryBurstxfer 1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -18897,10 +18898,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccO46DoU.s page 316 + + 1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 - ARM GAS /tmp/ccWQNJQt.s page 316 - - 1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -18957,10 +18958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CURRENTTARGETMEM1 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetCurrentTargetMem(DMA_TypeDef *DMAx, uint32_t Stream) + ARM GAS /tmp/ccO46DoU.s page 317 + + 1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccWQNJQt.s page 317 - - 1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19017,10 +19018,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccO46DoU.s page 318 + + 1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccWQNJQt.s page 318 - - 1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_0_25 1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_25_50 1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_50_75 @@ -19077,10 +19078,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select FIFO threshold. 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_SetFIFOThreshold 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccO46DoU.s page 319 + + 1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccWQNJQt.s page 319 - - 1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -19137,10 +19138,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 + ARM GAS /tmp/ccO46DoU.s page 320 + + 1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 - ARM GAS /tmp/ccWQNJQt.s page 320 - - 1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param FifoMode This parameter can be one of the following values: 1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOMODE_ENABLE @@ -19197,10 +19198,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccO46DoU.s page 321 + + 1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory address. - ARM GAS /tmp/ccWQNJQt.s page 321 - - 1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetMemoryAddress 1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. @@ -19257,10 +19258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 + ARM GAS /tmp/ccO46DoU.s page 322 + + 1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 - ARM GAS /tmp/ccWQNJQt.s page 322 - - 1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -19317,10 +19318,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory to Memory Destination address. 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetM2MDstAddress 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. + ARM GAS /tmp/ccO46DoU.s page 323 + + 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. - ARM GAS /tmp/ccWQNJQt.s page 323 - - 1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -19377,10 +19378,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream) + ARM GAS /tmp/ccO46DoU.s page 324 + + 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccWQNJQt.s page 324 - - 1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-> 1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19437,10 +19438,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 half transfer flag. 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF0 LL_DMA_IsActiveFlag_HT0 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccO46DoU.s page 325 + + 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccWQNJQt.s page 325 - - 1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT0(DMA_TypeDef *DMAx) 1673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -19497,10 +19498,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccO46DoU.s page 326 + + 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccWQNJQt.s page 326 - - 1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF5)==(DMA_HISR_HTIF5)); 1730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -19557,10 +19558,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx) 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccO46DoU.s page 327 + + 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF2)==(DMA_LISR_TCIF2)); - ARM GAS /tmp/ccWQNJQt.s page 327 - - 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -19617,10 +19618,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7)); 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccO46DoU.s page 328 + + 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccWQNJQt.s page 328 - - 1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 transfer error flag. 1844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF0 LL_DMA_IsActiveFlag_TE0 @@ -19677,10 +19678,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccO46DoU.s page 329 + + 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer error flag. - ARM GAS /tmp/ccWQNJQt.s page 329 - - 1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF0 LL_DMA_IsActiveFlag_TE5 1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -19737,10 +19738,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 direct mode error flag. 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF2 LL_DMA_IsActiveFlag_DME2 + ARM GAS /tmp/ccO46DoU.s page 330 + + 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccWQNJQt.s page 330 - - 1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME2(DMA_TypeDef *DMAx) @@ -19797,10 +19798,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF7 LL_DMA_IsActiveFlag_DME7 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccO46DoU.s page 331 + + 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 331 - - 2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME7(DMA_TypeDef *DMAx) 2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF7)==(DMA_HISR_DMEIF7)); @@ -19857,10 +19858,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE4(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccO46DoU.s page 332 + + 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccWQNJQt.s page 332 - - 2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF4)==(DMA_HISR_FEIF4)); 2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19917,10 +19918,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx) 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1); + ARM GAS /tmp/ccO46DoU.s page 333 + + 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccWQNJQt.s page 333 - - 2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 half transfer flag. @@ -19977,10 +19978,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6); 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccO46DoU.s page 334 + + 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 334 - - 2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 half transfer flag. 2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF7 LL_DMA_ClearFlag_HT7 2186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -20037,10 +20038,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 transfer complete flag. + ARM GAS /tmp/ccO46DoU.s page 335 + + 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF4 LL_DMA_ClearFlag_TC4 - ARM GAS /tmp/ccWQNJQt.s page 335 - - 2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -20089,18 +20090,18 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3980 .loc 6 2279 3 is_stmt 0 view .LVU1312 3981 .LBE454: 3982 .LBE453: -1935:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); - 3983 .loc 1 1935 3 is_stmt 1 view .LVU1313 +1936:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); + 3983 .loc 1 1936 3 is_stmt 1 view .LVU1313 3984 .LBB455: 3985 .LBI455: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer error flag. + ARM GAS /tmp/ccO46DoU.s page 336 + + 2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF0 LL_DMA_ClearFlag_TE0 - ARM GAS /tmp/ccWQNJQt.s page 336 - - 2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -20157,10 +20158,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer error flag. 2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF5 LL_DMA_ClearFlag_TE5 2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccO46DoU.s page 337 + + 2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 337 - - 2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx) 2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -20196,8 +20197,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3992 .loc 6 2367 3 is_stmt 0 view .LVU1316 3993 .LBE456: 3994 .LBE455: -1936:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); - 3995 .loc 1 1936 3 is_stmt 1 view .LVU1317 +1937:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); + 3995 .loc 1 1937 3 is_stmt 1 view .LVU1317 3996 .LBB457: 3997 .LBI457: 3998 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" @@ -20217,10 +20218,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 14:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 16:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** + ARM GAS /tmp/ccO46DoU.s page 338 + + 17:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 338 - - 18:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #ifndef STM32F7xx_LL_USART_H @@ -20277,10 +20278,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 71:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 72:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 73:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t BaudRate; /*!< This field defines expected Usart communication baud rat + ARM GAS /tmp/ccO46DoU.s page 339 + + 74:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccWQNJQt.s page 339 - - 75:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetBaudRate().*/ 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20337,10 +20338,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. 129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_POLARI 130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccO46DoU.s page 340 + + 131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USART HW configuration can be modified afterwards using - ARM GAS /tmp/ccWQNJQt.s page 340 - - 132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** functions @ref LL_USART_SetClockPolarity(). 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** For more details, refer to description of this function. 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20397,10 +20398,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccO46DoU.s page 341 + + 188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccWQNJQt.s page 341 - - 189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Flags defines which can be used with LL_USART_ReadReg function 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ @@ -20457,10 +20458,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt en 243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) + ARM GAS /tmp/ccO46DoU.s page 342 + + 245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop - ARM GAS /tmp/ccWQNJQt.s page 342 - - 246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) @@ -20517,10 +20518,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} + ARM GAS /tmp/ccO46DoU.s page 343 + + 302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 343 - - 303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER) 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_CLOCK Clock Signal @@ -20577,10 +20578,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as d 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions + ARM GAS /tmp/ccO46DoU.s page 344 + + 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 344 - - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20637,10 +20638,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccO46DoU.s page 345 + + 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} - ARM GAS /tmp/ccWQNJQt.s page 345 - - 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_HWCONTROL Hardware Control @@ -20697,10 +20698,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ + ARM GAS /tmp/ccO46DoU.s page 346 + + 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 346 - - 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data regis 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data regis 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -20757,10 +20758,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Compute USARTDIV value according to Peripheral Clock and 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned) + ARM GAS /tmp/ccO46DoU.s page 347 + + 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance - ARM GAS /tmp/ccWQNJQt.s page 347 - - 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __BAUDRATE__ Baud rate value to achieve 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -20817,10 +20818,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabled(const USART_TypeDef *USARTx) 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 348 + + 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL); - ARM GAS /tmp/ccWQNJQt.s page 348 - - 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) @@ -20877,10 +20878,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableClockInStopMode(USART_TypeDef *USARTx) 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM); + ARM GAS /tmp/ccO46DoU.s page 349 + + 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccWQNJQt.s page 349 - - 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART clock disabled in STOP Mode @@ -20937,10 +20938,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx) 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 350 + + 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE); - ARM GAS /tmp/ccWQNJQt.s page 350 - - 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -20997,10 +20998,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_SetParity 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Parity This parameter can be one of the following values: + ARM GAS /tmp/ccO46DoU.s page 351 + + 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_NONE - ARM GAS /tmp/ccWQNJQt.s page 351 - - 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -21057,10 +21058,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_SetDataWidth\n 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_SetDataWidth 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccO46DoU.s page 352 + + 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param DataWidth This parameter can be one of the following values: - ARM GAS /tmp/ccWQNJQt.s page 352 - - 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_7B 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_8B 818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_9B @@ -21117,10 +21118,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(const USART_TypeDef *USARTx) 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL); + ARM GAS /tmp/ccO46DoU.s page 353 + + 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccWQNJQt.s page 353 - - 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Oversampling to 8-bit or 16-bit mode @@ -21177,10 +21178,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccO46DoU.s page 354 + + 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccWQNJQt.s page 354 - - 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -21237,10 +21238,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CPOL LL_USART_GetClockPolarity 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccO46DoU.s page 355 + + 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccWQNJQt.s page 355 - - 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_LOW 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_HIGH 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -21297,10 +21298,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccO46DoU.s page 356 + + 1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 356 - - 1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx) 1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN); @@ -21357,10 +21358,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Parity Control and mode configuration using @ref LL_USART_SetParity() function 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PS LL_USART_ConfigCharacter\n + ARM GAS /tmp/ccO46DoU.s page 357 + + 1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_ConfigCharacter\n - ARM GAS /tmp/ccWQNJQt.s page 357 - - 1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M0 LL_USART_ConfigCharacter\n 1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_ConfigCharacter\n 1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigCharacter @@ -21417,10 +21418,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure RX pin active level logic 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_SetRXPinLevel + ARM GAS /tmp/ccO46DoU.s page 358 + + 1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccWQNJQt.s page 358 - - 1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PinInvMethod This parameter can be one of the following values: 1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD 1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED @@ -21477,10 +21478,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H) 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 DATAINV LL_USART_SetBinaryDataLogic 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccO46DoU.s page 359 + + 1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param DataLogic This parameter can be one of the following values: - ARM GAS /tmp/ccWQNJQt.s page 359 - - 1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE 1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE 1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -21537,10 +21538,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Auto Baud-Rate Detection 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or + ARM GAS /tmp/ccO46DoU.s page 360 + + 1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. - ARM GAS /tmp/ccWQNJQt.s page 360 - - 1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_EnableAutoBaudRate 1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -21597,10 +21598,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Auto Baud-Rate mode 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or + ARM GAS /tmp/ccO46DoU.s page 361 + + 1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. - ARM GAS /tmp/ccWQNJQt.s page 361 - - 1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABRMODE LL_USART_GetAutoBaudRateMode 1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: @@ -21657,10 +21658,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (This is used in multiprocessor communication during Mute mode or Stop mode, 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * for wake up with 7-bit address mark detection. 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * The MSB of the character sent by the transmitter should be equal to 1. + ARM GAS /tmp/ccO46DoU.s page 362 + + 1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * It may also be used for character detection during normal reception, - ARM GAS /tmp/ccWQNJQt.s page 362 - - 1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Mute mode inactive (for example, end of block detection in ModBus protocol). 1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * In this case, the whole received character (8-bit) is compared to the ADD[7:0] 1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * value and CMF flag is set on match) @@ -21717,10 +21718,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx) 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 363 + + 1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_RTSE); - ARM GAS /tmp/ccWQNJQt.s page 363 - - 1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -21777,10 +21778,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl) + ARM GAS /tmp/ccO46DoU.s page 364 + + 1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccWQNJQt.s page 364 - - 1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); 1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -21837,10 +21838,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Overrun detection + ARM GAS /tmp/ccO46DoU.s page 365 + + 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_EnableOverrunDetect - ARM GAS /tmp/ccWQNJQt.s page 365 - - 1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -21897,10 +21898,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUS LL_USART_GetWKUPType 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccO46DoU.s page 366 + + 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ON_ADDRESS - ARM GAS /tmp/ccWQNJQt.s page 366 - - 1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ON_STARTBIT 1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ON_RXNE 1616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -21957,10 +21958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param OverSampling This parameter can be one of the following values: 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_16 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8 + ARM GAS /tmp/ccO46DoU.s page 367 + + 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Baud Rate - ARM GAS /tmp/ccWQNJQt.s page 367 - - 1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk, uint 1673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -22017,10 +22018,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Block Length value in reception 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR BLEN LL_USART_SetBlockLength + ARM GAS /tmp/ccO46DoU.s page 368 + + 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccWQNJQt.s page 368 - - 1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param BlockLength Value between Min_Data=0x00 and Max_Data=0xFF 1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22077,10 +22078,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if IrDA mode is enabled 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + ARM GAS /tmp/ccO46DoU.s page 369 + + 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. - ARM GAS /tmp/ccWQNJQt.s page 369 - - 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IREN LL_USART_IsEnabledIrda 1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -22137,10 +22138,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccO46DoU.s page 370 + + 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Irda prescaler value, used for dividing the USART clock source - ARM GAS /tmp/ccWQNJQt.s page 370 - - 1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * to achieve the Irda Low Power frequency (8 bits value) 1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 1844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. @@ -22197,10 +22198,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(const USART_TypeDef *USARTx) 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 371 + + 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL); - ARM GAS /tmp/ccWQNJQt.s page 371 - - 1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -22257,10 +22258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryC + ARM GAS /tmp/ccO46DoU.s page 372 + + 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccWQNJQt.s page 372 - - 1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos); 1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22317,10 +22318,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime) + ARM GAS /tmp/ccO46DoU.s page 373 + + 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccWQNJQt.s page 373 - - 2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos)); 2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22377,10 +22378,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Half-Duplex mode is supported by the USARTx instance. 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex + ARM GAS /tmp/ccO46DoU.s page 374 + + 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccWQNJQt.s page 374 - - 2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(const USART_TypeDef *USARTx) @@ -22437,10 +22438,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx) 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 375 + + 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_LINEN); - ARM GAS /tmp/ccWQNJQt.s page 375 - - 2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -22497,10 +22498,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 DEDT LL_USART_GetDEDeassertionTime 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccO46DoU.s page 376 + + 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31 - ARM GAS /tmp/ccWQNJQt.s page 376 - - 2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(const USART_TypeDef *USARTx) 2186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -22557,10 +22558,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx) 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 377 + + 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_DEM); - ARM GAS /tmp/ccWQNJQt.s page 377 - - 2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -22617,10 +22618,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART) + ARM GAS /tmp/ccO46DoU.s page 378 + + 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In UART mode, the following bits must be kept cleared: - ARM GAS /tmp/ccWQNJQt.s page 378 - - 2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, 2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register, 2300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register, @@ -22677,10 +22678,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigSyncMode\n 2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigSyncMode\n 2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigSyncMode + ARM GAS /tmp/ccO46DoU.s page 379 + + 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccWQNJQt.s page 379 - - 2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx) @@ -22737,10 +22738,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccO46DoU.s page 380 + + 2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode - ARM GAS /tmp/ccWQNJQt.s page 380 - - 2412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Half Duplex mode, the following bits must be kept cleared: 2413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, 2414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register, @@ -22797,10 +22798,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function 2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function 2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Smartcard Mode + ARM GAS /tmp/ccO46DoU.s page 381 + + 2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using - ARM GAS /tmp/ccWQNJQt.s page 381 - - 2469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n 2471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigSmartcardMode\n @@ -22857,10 +22858,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx) 2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In IRDA mode, the following bits must be kept cleared: + ARM GAS /tmp/ccO46DoU.s page 382 + + 2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN, STOP and CLKEN bits in the USART_CR2 register, - ARM GAS /tmp/ccWQNJQt.s page 382 - - 2526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - SCEN and HDSEL bits in the USART_CR3 register. 2527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP)); @@ -22917,10 +22918,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Parity Error Flag is set or not 2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR PE LL_USART_IsActiveFlag_PE + ARM GAS /tmp/ccO46DoU.s page 383 + + 2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccWQNJQt.s page 383 - - 2583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx) @@ -22977,10 +22978,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RXNE LL_USART_IsActiveFlag_RXNE 2637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccO46DoU.s page 384 + + 2639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 384 - - 2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(const USART_TypeDef *USARTx) 2641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL); @@ -23037,10 +23038,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART CTS Flag is set or not 2695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + ARM GAS /tmp/ccO46DoU.s page 385 + + 2696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. - ARM GAS /tmp/ccWQNJQt.s page 385 - - 2697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CTS LL_USART_IsActiveFlag_CTS 2698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -23097,10 +23098,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(const USART_TypeDef *USARTx) 2752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 386 + + 2753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL); - ARM GAS /tmp/ccWQNJQt.s page 386 - - 2754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23157,10 +23158,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccO46DoU.s page 387 + + 2810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccWQNJQt.s page 387 - - 2811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL); 2813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -23217,10 +23218,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccO46DoU.s page 388 + + 2867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Framing Error Flag - ARM GAS /tmp/ccWQNJQt.s page 388 - - 2868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR FECF LL_USART_ClearFlag_FE 2869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -23277,10 +23278,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) 2922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 2923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccO46DoU.s page 389 + + 2924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Smartcard Transmission Complete Before Guard Time Flag - ARM GAS /tmp/ccWQNJQt.s page 389 - - 2925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR TCBGTCF LL_USART_ClearFlag_TCBGT 2926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -23337,10 +23338,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx) + ARM GAS /tmp/ccO46DoU.s page 390 + + 2981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccWQNJQt.s page 390 - - 2982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_EOBCF); 2983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23397,10 +23398,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccO46DoU.s page 391 + + 3038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx) - ARM GAS /tmp/ccWQNJQt.s page 391 - - 3039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE); 3041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -23457,10 +23458,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx) 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccO46DoU.s page 392 + + 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RTOIE); - ARM GAS /tmp/ccWQNJQt.s page 392 - - 3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23517,10 +23518,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); 3150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccO46DoU.s page 393 + + 3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) - ARM GAS /tmp/ccWQNJQt.s page 393 - - 3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) 3154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Wake Up from Stop Mode Interrupt @@ -23577,10 +23578,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Transmission Complete Interrupt + ARM GAS /tmp/ccO46DoU.s page 394 + + 3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TCIE LL_USART_DisableIT_TC - ARM GAS /tmp/ccWQNJQt.s page 394 - - 3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -23637,10 +23638,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable End Of Block Interrupt 3264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. + ARM GAS /tmp/ccO46DoU.s page 395 + + 3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 EOBIE LL_USART_DisableIT_EOB - ARM GAS /tmp/ccWQNJQt.s page 395 - - 3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -23697,10 +23698,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not 3321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. 3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUFIE LL_USART_DisableIT_WKUP + ARM GAS /tmp/ccO46DoU.s page 396 + + 3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccWQNJQt.s page 396 - - 3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx) @@ -23757,10 +23758,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx) 3378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL); + ARM GAS /tmp/ccO46DoU.s page 397 + + 3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccWQNJQt.s page 397 - - 3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART TX Empty Interrupt is enabled or disabled. @@ -23817,10 +23818,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(const USART_TypeDef *USARTx) 3435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL); + ARM GAS /tmp/ccO46DoU.s page 398 + + 3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccWQNJQt.s page 398 - - 3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled. @@ -23877,10 +23878,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ 3492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ 3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) + ARM GAS /tmp/ccO46DoU.s page 399 + + 3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ - ARM GAS /tmp/ccWQNJQt.s page 399 - - 3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or 3497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -23937,10 +23938,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccO46DoU.s page 400 + + 3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Mode for transmission - ARM GAS /tmp/ccWQNJQt.s page 400 - - 3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX 3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -23997,10 +23998,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + ARM GAS /tmp/ccO46DoU.s page 401 + + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM - ARM GAS /tmp/ccWQNJQt.s page 401 - - 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE @@ -24057,10 +24058,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + ARM GAS /tmp/ccO46DoU.s page 402 + + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" - ARM GAS /tmp/ccWQNJQt.s page 402 - - 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- @@ -24117,10 +24118,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + ARM GAS /tmp/ccO46DoU.s page 403 + + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccWQNJQt.s page 403 - - 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -24177,10 +24178,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccO46DoU.s page 404 + + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccWQNJQt.s page 404 - - 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -24237,10 +24238,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccO46DoU.s page 405 + + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccWQNJQt.s page 405 - - 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** 271:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24297,10 +24298,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccO46DoU.s page 406 + + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccWQNJQt.s page 406 - - 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). @@ -24357,10 +24358,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccO46DoU.s page 407 + + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) - ARM GAS /tmp/ccWQNJQt.s page 407 - - 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 385:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24417,10 +24418,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccO46DoU.s page 408 + + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) - ARM GAS /tmp/ccWQNJQt.s page 408 - - 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -24477,10 +24478,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccO46DoU.s page 409 + + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccWQNJQt.s page 409 - - 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) @@ -24537,10 +24538,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccO46DoU.s page 410 + + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask - ARM GAS /tmp/ccWQNJQt.s page 410 - - 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -24597,10 +24598,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + ARM GAS /tmp/ccO46DoU.s page 411 + + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccWQNJQt.s page 411 - - 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -24657,10 +24658,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccO46DoU.s page 412 + + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccWQNJQt.s page 412 - - 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -24717,10 +24718,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + ARM GAS /tmp/ccO46DoU.s page 413 + + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccWQNJQt.s page 413 - - 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ @@ -24777,10 +24778,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccO46DoU.s page 414 + + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - ARM GAS /tmp/ccWQNJQt.s page 414 - - 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -24837,10 +24838,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccO46DoU.s page 415 + + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccWQNJQt.s page 415 - - 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -24897,10 +24898,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccO46DoU.s page 416 + + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) - ARM GAS /tmp/ccWQNJQt.s page 416 - - 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value @@ -24957,10 +24958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + ARM GAS /tmp/ccO46DoU.s page 417 + + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value - ARM GAS /tmp/ccWQNJQt.s page 417 - - 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -25017,10 +25018,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros + ARM GAS /tmp/ccO46DoU.s page 418 + + 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value - ARM GAS /tmp/ccWQNJQt.s page 418 - - 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -25077,10 +25078,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data + ARM GAS /tmp/ccO46DoU.s page 419 + + 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) - ARM GAS /tmp/ccWQNJQt.s page 419 - - 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) 4009 .loc 8 1068 31 view .LVU1323 @@ -25137,10 +25138,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded + ARM GAS /tmp/ccO46DoU.s page 420 + + 1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed - ARM GAS /tmp/ccWQNJQt.s page 420 - - 1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) 1103:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -25189,18 +25190,18 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4053 .LVL285: 4054 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU1337 4055 .LBE457: -1937:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); - 4056 .loc 1 1937 3 is_stmt 1 view .LVU1338 +1938:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); + 4056 .loc 1 1938 3 is_stmt 1 view .LVU1338 4057 .LBB463: 4058 .LBI463: 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 direct mode error flag. + ARM GAS /tmp/ccO46DoU.s page 421 + + 2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF0 LL_DMA_ClearFlag_DME0 - ARM GAS /tmp/ccWQNJQt.s page 421 - - 2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -25257,10 +25258,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 direct mode error flag. 2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF5 LL_DMA_ClearFlag_DME5 2428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccO46DoU.s page 422 + + 2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccWQNJQt.s page 422 - - 2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME5(DMA_TypeDef *DMAx) 2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25317,10 +25318,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccO46DoU.s page 423 + + 2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE2(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccWQNJQt.s page 423 - - 2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF2); 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -25377,10 +25378,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE7(DMA_TypeDef *DMAx) 2542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccO46DoU.s page 424 + + 2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF7); - ARM GAS /tmp/ccWQNJQt.s page 424 - - 2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -25437,10 +25438,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccO46DoU.s page 425 + + 2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccWQNJQt.s page 425 - - 2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -25463,8 +25464,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4067 .loc 6 2611 3 is_stmt 0 view .LVU1341 4068 .LBE464: 4069 .LBE463: -1938:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 4070 .loc 1 1938 3 is_stmt 1 view .LVU1342 +1939:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 4070 .loc 1 1939 3 is_stmt 1 view .LVU1342 4071 .LBB465: 4072 .LBI465: 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25480,8 +25481,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4080 .loc 6 2591 3 is_stmt 0 view .LVU1345 4081 .LBE466: 4082 .LBE465: -1939:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 4083 .loc 1 1939 3 is_stmt 1 view .LVU1346 +1940:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 4083 .loc 1 1940 3 is_stmt 1 view .LVU1346 4084 .LBB467: 4085 .LBI467: 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25496,11 +25497,11 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4092 .loc 6 2279 3 is_stmt 0 view .LVU1349 4093 .LBE468: 4094 .LBE467: -1940:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART - 4095 .loc 1 1940 3 is_stmt 1 view .LVU1350 - ARM GAS /tmp/ccWQNJQt.s page 426 +1941:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART + ARM GAS /tmp/ccO46DoU.s page 426 + 4095 .loc 1 1941 3 is_stmt 1 view .LVU1350 4096 .LBB469: 4097 .LBI469: 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25515,8 +25516,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4104 .loc 6 2367 3 is_stmt 0 view .LVU1353 4105 .LBE470: 4106 .LBE469: -1941:Src/main.c **** - 4107 .loc 1 1941 3 is_stmt 1 view .LVU1354 +1942:Src/main.c **** + 4107 .loc 1 1942 3 is_stmt 1 view .LVU1354 4108 0126 6B4A ldr r2, .L141+84 4109 .LVL290: 4110 .LBB471: @@ -25557,190 +25558,190 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4135 .loc 6 1437 5 is_stmt 1 view .LVU1364 4136 013a 674A ldr r2, .L141+88 4137 013c C3F8C420 str r2, [r3, #196] + ARM GAS /tmp/ccO46DoU.s page 427 + + 4138 .L134: - ARM GAS /tmp/ccWQNJQt.s page 427 - - 4139 .LVL293: 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 4140 .loc 6 1437 5 is_stmt 0 view .LVU1365 4141 .LBE474: 4142 .LBE473: -1946:Src/main.c **** SD_SLIDE = 0; - 4143 .loc 1 1946 2 is_stmt 1 view .LVU1366 -1946:Src/main.c **** SD_SLIDE = 0; - 4144 .loc 1 1946 10 is_stmt 0 view .LVU1367 +1947:Src/main.c **** SD_SLIDE = 0; + 4143 .loc 1 1947 2 is_stmt 1 view .LVU1366 +1947:Src/main.c **** SD_SLIDE = 0; + 4144 .loc 1 1947 10 is_stmt 0 view .LVU1367 4145 0140 0024 movs r4, #0 4146 0142 664B ldr r3, .L141+92 4147 0144 1C60 str r4, [r3] -1947:Src/main.c **** //Reset all periphery - 4148 .loc 1 1947 2 is_stmt 1 view .LVU1368 -1947:Src/main.c **** //Reset all periphery - 4149 .loc 1 1947 11 is_stmt 0 view .LVU1369 +1948:Src/main.c **** //Reset all periphery + 4148 .loc 1 1948 2 is_stmt 1 view .LVU1368 +1948:Src/main.c **** //Reset all periphery + 4149 .loc 1 1948 11 is_stmt 0 view .LVU1369 4150 0146 664B ldr r3, .L141+96 4151 0148 1C60 str r4, [r3] -1949:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); - 4152 .loc 1 1949 2 is_stmt 1 view .LVU1370 +1950:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); + 4152 .loc 1 1950 2 is_stmt 1 view .LVU1370 4153 014a 664F ldr r7, .L141+100 4154 014c 2246 mov r2, r4 4155 014e 0821 movs r1, #8 4156 0150 3846 mov r0, r7 4157 0152 FFF7FEFF bl HAL_GPIO_WritePin 4158 .LVL294: -1950:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); - 4159 .loc 1 1950 2 view .LVU1371 +1951:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); + 4159 .loc 1 1951 2 view .LVU1371 4160 0156 2246 mov r2, r4 4161 0158 0421 movs r1, #4 4162 015a 3846 mov r0, r7 4163 015c FFF7FEFF bl HAL_GPIO_WritePin 4164 .LVL295: -1951:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); - 4165 .loc 1 1951 2 view .LVU1372 +1952:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); + 4165 .loc 1 1952 2 view .LVU1372 4166 0160 DFF8A481 ldr r8, .L141+136 4167 0164 2246 mov r2, r4 4168 0166 4FF48071 mov r1, #256 4169 016a 4046 mov r0, r8 4170 016c FFF7FEFF bl HAL_GPIO_WritePin 4171 .LVL296: -1952:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); - 4172 .loc 1 1952 2 view .LVU1373 +1953:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); + 4172 .loc 1 1953 2 view .LVU1373 4173 0170 2246 mov r2, r4 4174 0172 1021 movs r1, #16 4175 0174 3846 mov r0, r7 4176 0176 FFF7FEFF bl HAL_GPIO_WritePin 4177 .LVL297: -1953:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); - 4178 .loc 1 1953 2 view .LVU1374 +1954:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); + 4178 .loc 1 1954 2 view .LVU1374 4179 017a 5B4E ldr r6, .L141+104 4180 017c 2246 mov r2, r4 4181 017e 4FF48061 mov r1, #1024 4182 0182 3046 mov r0, r6 4183 0184 FFF7FEFF bl HAL_GPIO_WritePin 4184 .LVL298: -1954:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); - ARM GAS /tmp/ccWQNJQt.s page 428 + ARM GAS /tmp/ccO46DoU.s page 428 - 4185 .loc 1 1954 2 view .LVU1375 +1955:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); + 4185 .loc 1 1955 2 view .LVU1375 4186 0188 584D ldr r5, .L141+108 4187 018a 2246 mov r2, r4 4188 018c 0821 movs r1, #8 4189 018e 2846 mov r0, r5 4190 0190 FFF7FEFF bl HAL_GPIO_WritePin 4191 .LVL299: -1955:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); - 4192 .loc 1 1955 2 view .LVU1376 +1956:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); + 4192 .loc 1 1956 2 view .LVU1376 4193 0194 2246 mov r2, r4 4194 0196 0121 movs r1, #1 4195 0198 2846 mov r0, r5 4196 019a FFF7FEFF bl HAL_GPIO_WritePin 4197 .LVL300: -1956:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 4198 .loc 1 1956 2 view .LVU1377 +1957:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 4198 .loc 1 1957 2 view .LVU1377 4199 019e 2246 mov r2, r4 4200 01a0 0221 movs r1, #2 4201 01a2 2846 mov r0, r5 4202 01a4 FFF7FEFF bl HAL_GPIO_WritePin 4203 .LVL301: -1957:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 4204 .loc 1 1957 2 view .LVU1378 +1958:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 4204 .loc 1 1958 2 view .LVU1378 4205 01a8 2246 mov r2, r4 4206 01aa 4FF40061 mov r1, #2048 4207 01ae 3046 mov r0, r6 4208 01b0 FFF7FEFF bl HAL_GPIO_WritePin 4209 .LVL302: -1958:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) - 4210 .loc 1 1958 2 view .LVU1379 +1959:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) + 4210 .loc 1 1959 2 view .LVU1379 4211 01b4 2246 mov r2, r4 4212 01b6 2021 movs r1, #32 4213 01b8 3846 mov r0, r7 4214 01ba FFF7FEFF bl HAL_GPIO_WritePin 4215 .LVL303: -1968:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC - 4216 .loc 1 1968 2 view .LVU1380 +1969:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC + 4216 .loc 1 1969 2 view .LVU1380 4217 01be 07F50067 add r7, r7, #2048 4218 01c2 0122 movs r2, #1 4219 01c4 4FF48061 mov r1, #1024 4220 01c8 3846 mov r0, r7 4221 01ca FFF7FEFF bl HAL_GPIO_WritePin 4222 .LVL304: -1969:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 4223 .loc 1 1969 2 view .LVU1381 +1970:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 4223 .loc 1 1970 2 view .LVU1381 4224 01ce 484C ldr r4, .L141+112 4225 01d0 0122 movs r2, #1 4226 01d2 4021 movs r1, #64 4227 01d4 2046 mov r0, r4 4228 01d6 FFF7FEFF bl HAL_GPIO_WritePin 4229 .LVL305: -1970:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 4230 .loc 1 1970 2 view .LVU1382 +1971:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 4230 .loc 1 1971 2 view .LVU1382 4231 01da 0122 movs r2, #1 4232 01dc 4FF48041 mov r1, #16384 4233 01e0 3846 mov r0, r7 + ARM GAS /tmp/ccO46DoU.s page 429 + + 4234 01e2 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccWQNJQt.s page 429 - - 4235 .LVL306: -1971:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 - 4236 .loc 1 1971 2 view .LVU1383 +1972:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 + 4236 .loc 1 1972 2 view .LVU1383 4237 01e6 0122 movs r2, #1 4238 01e8 4FF48041 mov r1, #16384 4239 01ec 2046 mov r0, r4 4240 01ee FFF7FEFF bl HAL_GPIO_WritePin 4241 .LVL307: -1972:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 4242 .loc 1 1972 2 view .LVU1384 +1973:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 4242 .loc 1 1973 2 view .LVU1384 4243 01f2 0122 movs r2, #1 4244 01f4 4FF48041 mov r1, #16384 4245 01f8 3046 mov r0, r6 4246 01fa FFF7FEFF bl HAL_GPIO_WritePin 4247 .LVL308: -1973:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4248 .loc 1 1973 2 view .LVU1385 +1974:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 4248 .loc 1 1974 2 view .LVU1385 4249 01fe 0122 movs r2, #1 4250 0200 4021 movs r1, #64 4251 0202 2846 mov r0, r5 4252 0204 FFF7FEFF bl HAL_GPIO_WritePin 4253 .LVL309: -1974:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 4254 .loc 1 1974 2 view .LVU1386 +1975:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 4254 .loc 1 1975 2 view .LVU1386 4255 0208 0122 movs r2, #1 4256 020a 4FF48051 mov r1, #4096 4257 020e 3046 mov r0, r6 4258 0210 FFF7FEFF bl HAL_GPIO_WritePin 4259 .LVL310: -1975:Src/main.c **** - 4260 .loc 1 1975 2 view .LVU1387 +1976:Src/main.c **** + 4260 .loc 1 1976 2 view .LVU1387 4261 0214 0122 movs r2, #1 4262 0216 1021 movs r1, #16 4263 0218 2846 mov r0, r5 4264 021a FFF7FEFF bl HAL_GPIO_WritePin 4265 .LVL311: -1979:Src/main.c **** { - 4266 .loc 1 1979 2 view .LVU1388 -1979:Src/main.c **** { - 4267 .loc 1 1979 6 is_stmt 0 view .LVU1389 +1980:Src/main.c **** { + 4266 .loc 1 1980 2 view .LVU1388 +1980:Src/main.c **** { + 4267 .loc 1 1980 6 is_stmt 0 view .LVU1389 4268 021e 0121 movs r1, #1 4269 0220 4046 mov r0, r8 4270 0222 FFF7FEFF bl HAL_GPIO_ReadPin 4271 .LVL312: -1979:Src/main.c **** { - 4272 .loc 1 1979 5 discriminator 1 view .LVU1390 +1980:Src/main.c **** { + 4272 .loc 1 1980 5 discriminator 1 view .LVU1390 4273 0226 40B1 cbz r0, .L139 4274 .L129: -2009:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 4275 .loc 1 2009 1 view .LVU1391 +2010:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 4275 .loc 1 2010 1 view .LVU1391 4276 0228 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 4277 .LVL313: 4278 .L138: 4279 .LBB476: 4280 .LBB475: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, + ARM GAS /tmp/ccO46DoU.s page 430 + + 4281 .loc 6 1430 5 is_stmt 1 view .LVU1392 - ARM GAS /tmp/ccWQNJQt.s page 430 - - 4282 022c 284B ldr r3, .L141+80 4283 .LVL314: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, @@ -25757,84 +25758,84 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4292 .loc 6 1431 5 is_stmt 0 view .LVU1395 4293 .LBE475: 4294 .LBE476: -1982:Src/main.c **** { - 4295 .loc 1 1982 3 is_stmt 1 view .LVU1396 -1982:Src/main.c **** { - 4296 .loc 1 1982 7 is_stmt 0 view .LVU1397 +1983:Src/main.c **** { + 4295 .loc 1 1983 3 is_stmt 1 view .LVU1396 +1983:Src/main.c **** { + 4296 .loc 1 1983 7 is_stmt 0 view .LVU1397 4297 023a 4FF48071 mov r1, #256 4298 023e 2846 mov r0, r5 4299 0240 FFF7FEFF bl HAL_GPIO_ReadPin 4300 .LVL316: -1982:Src/main.c **** { - 4301 .loc 1 1982 6 discriminator 1 view .LVU1398 +1983:Src/main.c **** { + 4301 .loc 1 1983 6 discriminator 1 view .LVU1398 4302 0244 0028 cmp r0, #0 4303 0246 EFD1 bne .L129 -1985:Src/main.c **** if (test == 0) //0 - suc - 4304 .loc 1 1985 4 is_stmt 1 view .LVU1399 -1985:Src/main.c **** if (test == 0) //0 - suc - 4305 .loc 1 1985 11 is_stmt 0 view .LVU1400 +1986:Src/main.c **** if (test == 0) //0 - suc + 4304 .loc 1 1986 4 is_stmt 1 view .LVU1399 +1986:Src/main.c **** if (test == 0) //0 - suc + 4305 .loc 1 1986 11 is_stmt 0 view .LVU1400 4306 0248 2A48 ldr r0, .L141+116 4307 024a FFF7FEFF bl Mount_SD 4308 .LVL317: -1985:Src/main.c **** if (test == 0) //0 - suc - 4309 .loc 1 1985 9 discriminator 1 view .LVU1401 +1986:Src/main.c **** if (test == 0) //0 - suc + 4309 .loc 1 1986 9 discriminator 1 view .LVU1401 4310 024e 2A4B ldr r3, .L141+120 4311 0250 1860 str r0, [r3] -1986:Src/main.c **** { - 4312 .loc 1 1986 4 is_stmt 1 view .LVU1402 -1986:Src/main.c **** { - 4313 .loc 1 1986 7 is_stmt 0 view .LVU1403 +1987:Src/main.c **** { + 4312 .loc 1 1987 4 is_stmt 1 view .LVU1402 +1987:Src/main.c **** { + 4313 .loc 1 1987 7 is_stmt 0 view .LVU1403 4314 0252 18B1 cbz r0, .L140 4315 .L136: -1998:Src/main.c **** } - 4316 .loc 1 1998 4 is_stmt 1 view .LVU1404 -1998:Src/main.c **** } - 4317 .loc 1 1998 14 is_stmt 0 view .LVU1405 +1999:Src/main.c **** } + 4316 .loc 1 1999 4 is_stmt 1 view .LVU1404 +1999:Src/main.c **** } + 4317 .loc 1 1999 14 is_stmt 0 view .LVU1405 4318 0254 294B ldr r3, .L141+124 4319 0256 0122 movs r2, #1 4320 0258 1A70 strb r2, [r3] -2009:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 4321 .loc 1 2009 1 view .LVU1406 +2010:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 4321 .loc 1 2010 1 view .LVU1406 4322 025a E5E7 b .L129 4323 .L140: -1989:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - ARM GAS /tmp/ccWQNJQt.s page 431 + ARM GAS /tmp/ccO46DoU.s page 431 - 4324 .loc 1 1989 5 is_stmt 1 view .LVU1407 -1989:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4325 .loc 1 1989 12 is_stmt 0 view .LVU1408 +1990:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 4324 .loc 1 1990 5 is_stmt 1 view .LVU1407 +1990:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 4325 .loc 1 1990 12 is_stmt 0 view .LVU1408 4326 025c 1E23 movs r3, #30 4327 025e 1A46 mov r2, r3 4328 0260 2749 ldr r1, .L141+128 4329 0262 2848 ldr r0, .L141+132 4330 0264 FFF7FEFF bl Seek_Read_File 4331 .LVL318: -1989:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4332 .loc 1 1989 10 discriminator 1 view .LVU1409 +1990:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 4332 .loc 1 1990 10 discriminator 1 view .LVU1409 4333 0268 234C ldr r4, .L141+120 4334 026a 2060 str r0, [r4] -1990:Src/main.c **** UART_rec_incr = 0; - 4335 .loc 1 1990 5 is_stmt 1 view .LVU1410 -1990:Src/main.c **** UART_rec_incr = 0; - 4336 .loc 1 1990 12 is_stmt 0 view .LVU1411 +1991:Src/main.c **** UART_rec_incr = 0; + 4335 .loc 1 1991 5 is_stmt 1 view .LVU1410 +1991:Src/main.c **** UART_rec_incr = 0; + 4336 .loc 1 1991 12 is_stmt 0 view .LVU1411 4337 026c 2148 ldr r0, .L141+116 4338 026e FFF7FEFF bl Unmount_SD 4339 .LVL319: -1990:Src/main.c **** UART_rec_incr = 0; - 4340 .loc 1 1990 10 discriminator 1 view .LVU1412 +1991:Src/main.c **** UART_rec_incr = 0; + 4340 .loc 1 1991 10 discriminator 1 view .LVU1412 4341 0272 2060 str r0, [r4] -1991:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 4342 .loc 1 1991 5 is_stmt 1 view .LVU1413 -1991:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 4343 .loc 1 1991 19 is_stmt 0 view .LVU1414 +1992:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 4342 .loc 1 1992 5 is_stmt 1 view .LVU1413 +1992:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 4343 .loc 1 1992 19 is_stmt 0 view .LVU1414 4344 0274 0023 movs r3, #0 4345 0276 084A ldr r2, .L141+24 4346 0278 1380 strh r3, [r2] @ movhi -1992:Src/main.c **** } - 4347 .loc 1 1992 5 is_stmt 1 view .LVU1415 -1992:Src/main.c **** } - 4348 .loc 1 1992 13 is_stmt 0 view .LVU1416 +1993:Src/main.c **** } + 4347 .loc 1 1993 5 is_stmt 1 view .LVU1415 +1993:Src/main.c **** } + 4348 .loc 1 1993 13 is_stmt 0 view .LVU1416 4349 027a 064A ldr r2, .L141+20 4350 027c 1370 strb r3, [r2] 4351 027e E9E7 b .L136 @@ -25857,10 +25858,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4368 02b4 00000000 .word LD1_def_setup 4369 02b8 00000000 .word LD2_def_setup 4370 02bc 00000000 .word Curr_setup + ARM GAS /tmp/ccO46DoU.s page 432 + + 4371 02c0 00000000 .word LD1_curr_setup - ARM GAS /tmp/ccWQNJQt.s page 432 - - 4372 02c4 00000000 .word LD2_curr_setup 4373 02c8 00100040 .word 1073745920 4374 02cc 00100140 .word 1073811456 @@ -25889,23 +25890,23 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4399 Get_ADC: 4400 .LVL320: 4401 .LFB1213: -2438:Src/main.c **** uint16_t OUT; - 4402 .loc 1 2438 1 is_stmt 1 view -0 +2439:Src/main.c **** uint16_t OUT; + 4402 .loc 1 2439 1 is_stmt 1 view -0 4403 .cfi_startproc 4404 @ args = 0, pretend = 0, frame = 0 4405 @ frame_needed = 0, uses_anonymous_args = 0 -2438:Src/main.c **** uint16_t OUT; - 4406 .loc 1 2438 1 is_stmt 0 view .LVU1418 +2439:Src/main.c **** uint16_t OUT; + 4406 .loc 1 2439 1 is_stmt 0 view .LVU1418 4407 0000 10B5 push {r4, lr} 4408 .LCFI40: 4409 .cfi_def_cfa_offset 8 4410 .cfi_offset 4, -8 4411 .cfi_offset 14, -4 4412 0002 0024 movs r4, #0 -2439:Src/main.c **** switch (num) - 4413 .loc 1 2439 2 is_stmt 1 view .LVU1419 -2440:Src/main.c **** { - 4414 .loc 1 2440 2 view .LVU1420 +2440:Src/main.c **** switch (num) + 4413 .loc 1 2440 2 is_stmt 1 view .LVU1419 +2441:Src/main.c **** { + 4414 .loc 1 2441 2 view .LVU1420 4415 0004 0528 cmp r0, #5 4416 0006 2CD8 bhi .L152 4417 0008 DFE800F0 tbb [pc, r0] @@ -25917,136 +25918,136 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4423 0010 1C .byte (.L147-.L146)/2 4424 0011 26 .byte (.L145-.L146)/2 4425 .p2align 1 + ARM GAS /tmp/ccO46DoU.s page 433 + + 4426 .L151: - ARM GAS /tmp/ccWQNJQt.s page 433 - - -2443:Src/main.c **** break; - 4427 .loc 1 2443 5 view .LVU1421 +2444:Src/main.c **** break; + 4427 .loc 1 2444 5 view .LVU1421 4428 0012 1548 ldr r0, .L154 4429 .LVL321: -2443:Src/main.c **** break; - 4430 .loc 1 2443 5 is_stmt 0 view .LVU1422 +2444:Src/main.c **** break; + 4430 .loc 1 2444 5 is_stmt 0 view .LVU1422 4431 0014 FFF7FEFF bl HAL_ADC_Start 4432 .LVL322: -2444:Src/main.c **** case 1: - 4433 .loc 1 2444 4 is_stmt 1 view .LVU1423 +2445:Src/main.c **** case 1: + 4433 .loc 1 2445 4 is_stmt 1 view .LVU1423 4434 0018 2046 mov r0, r4 4435 .L144: 4436 .LVL323: -2463:Src/main.c **** } - 4437 .loc 1 2463 2 view .LVU1424 -2464:Src/main.c **** - 4438 .loc 1 2464 1 is_stmt 0 view .LVU1425 +2464:Src/main.c **** } + 4437 .loc 1 2464 2 view .LVU1424 +2465:Src/main.c **** + 4438 .loc 1 2465 1 is_stmt 0 view .LVU1425 4439 001a 10BD pop {r4, pc} 4440 .LVL324: 4441 .L150: -2446:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 4442 .loc 1 2446 5 is_stmt 1 view .LVU1426 +2447:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 4442 .loc 1 2447 5 is_stmt 1 view .LVU1426 4443 001c 124C ldr r4, .L154 4444 001e 6421 movs r1, #100 4445 0020 2046 mov r0, r4 4446 .LVL325: -2446:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 4447 .loc 1 2446 5 is_stmt 0 view .LVU1427 +2447:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 4447 .loc 1 2447 5 is_stmt 0 view .LVU1427 4448 0022 FFF7FEFF bl HAL_ADC_PollForConversion 4449 .LVL326: -2447:Src/main.c **** break; - 4450 .loc 1 2447 9 is_stmt 1 view .LVU1428 -2447:Src/main.c **** break; - 4451 .loc 1 2447 15 is_stmt 0 view .LVU1429 +2448:Src/main.c **** break; + 4450 .loc 1 2448 9 is_stmt 1 view .LVU1428 +2448:Src/main.c **** break; + 4451 .loc 1 2448 15 is_stmt 0 view .LVU1429 4452 0026 2046 mov r0, r4 4453 0028 FFF7FEFF bl HAL_ADC_GetValue 4454 .LVL327: -2447:Src/main.c **** break; - 4455 .loc 1 2447 13 discriminator 1 view .LVU1430 +2448:Src/main.c **** break; + 4455 .loc 1 2448 13 discriminator 1 view .LVU1430 4456 002c 80B2 uxth r0, r0 4457 .LVL328: -2448:Src/main.c **** case 2: - 4458 .loc 1 2448 4 is_stmt 1 view .LVU1431 +2449:Src/main.c **** case 2: + 4458 .loc 1 2449 4 is_stmt 1 view .LVU1431 4459 002e F4E7 b .L144 4460 .LVL329: 4461 .L149: -2450:Src/main.c **** break; - 4462 .loc 1 2450 5 view .LVU1432 +2451:Src/main.c **** break; + 4462 .loc 1 2451 5 view .LVU1432 4463 0030 0D48 ldr r0, .L154 4464 .LVL330: -2450:Src/main.c **** break; - 4465 .loc 1 2450 5 is_stmt 0 view .LVU1433 +2451:Src/main.c **** break; + 4465 .loc 1 2451 5 is_stmt 0 view .LVU1433 4466 0032 FFF7FEFF bl HAL_ADC_Stop 4467 .LVL331: -2451:Src/main.c **** case 3: - 4468 .loc 1 2451 4 is_stmt 1 view .LVU1434 +2452:Src/main.c **** case 3: + 4468 .loc 1 2452 4 is_stmt 1 view .LVU1434 + ARM GAS /tmp/ccO46DoU.s page 434 + + 4469 0036 2046 mov r0, r4 - ARM GAS /tmp/ccWQNJQt.s page 434 - - 4470 0038 EFE7 b .L144 4471 .LVL332: 4472 .L148: -2453:Src/main.c **** break; - 4473 .loc 1 2453 5 view .LVU1435 +2454:Src/main.c **** break; + 4473 .loc 1 2454 5 view .LVU1435 4474 003a 0C48 ldr r0, .L154+4 4475 .LVL333: -2453:Src/main.c **** break; - 4476 .loc 1 2453 5 is_stmt 0 view .LVU1436 +2454:Src/main.c **** break; + 4476 .loc 1 2454 5 is_stmt 0 view .LVU1436 4477 003c FFF7FEFF bl HAL_ADC_Start 4478 .LVL334: -2454:Src/main.c **** case 4: - 4479 .loc 1 2454 4 is_stmt 1 view .LVU1437 +2455:Src/main.c **** case 4: + 4479 .loc 1 2455 4 is_stmt 1 view .LVU1437 4480 0040 2046 mov r0, r4 4481 0042 EAE7 b .L144 4482 .LVL335: 4483 .L147: -2456:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 4484 .loc 1 2456 5 view .LVU1438 +2457:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 4484 .loc 1 2457 5 view .LVU1438 4485 0044 094C ldr r4, .L154+4 4486 0046 6421 movs r1, #100 4487 0048 2046 mov r0, r4 4488 .LVL336: -2456:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 4489 .loc 1 2456 5 is_stmt 0 view .LVU1439 +2457:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 4489 .loc 1 2457 5 is_stmt 0 view .LVU1439 4490 004a FFF7FEFF bl HAL_ADC_PollForConversion 4491 .LVL337: -2457:Src/main.c **** break; - 4492 .loc 1 2457 9 is_stmt 1 view .LVU1440 -2457:Src/main.c **** break; - 4493 .loc 1 2457 15 is_stmt 0 view .LVU1441 +2458:Src/main.c **** break; + 4492 .loc 1 2458 9 is_stmt 1 view .LVU1440 +2458:Src/main.c **** break; + 4493 .loc 1 2458 15 is_stmt 0 view .LVU1441 4494 004e 2046 mov r0, r4 4495 0050 FFF7FEFF bl HAL_ADC_GetValue 4496 .LVL338: -2457:Src/main.c **** break; - 4497 .loc 1 2457 13 discriminator 1 view .LVU1442 +2458:Src/main.c **** break; + 4497 .loc 1 2458 13 discriminator 1 view .LVU1442 4498 0054 80B2 uxth r0, r0 4499 .LVL339: -2458:Src/main.c **** case 5: - 4500 .loc 1 2458 4 is_stmt 1 view .LVU1443 +2459:Src/main.c **** case 5: + 4500 .loc 1 2459 4 is_stmt 1 view .LVU1443 4501 0056 E0E7 b .L144 4502 .LVL340: 4503 .L145: -2460:Src/main.c **** break; - 4504 .loc 1 2460 9 view .LVU1444 +2461:Src/main.c **** break; + 4504 .loc 1 2461 9 view .LVU1444 4505 0058 0448 ldr r0, .L154+4 4506 .LVL341: -2460:Src/main.c **** break; - 4507 .loc 1 2460 9 is_stmt 0 view .LVU1445 +2461:Src/main.c **** break; + 4507 .loc 1 2461 9 is_stmt 0 view .LVU1445 4508 005a FFF7FEFF bl HAL_ADC_Stop 4509 .LVL342: -2461:Src/main.c **** } - 4510 .loc 1 2461 4 is_stmt 1 view .LVU1446 +2462:Src/main.c **** } + 4510 .loc 1 2462 4 is_stmt 1 view .LVU1446 4511 005e 2046 mov r0, r4 4512 0060 DBE7 b .L144 4513 .LVL343: + ARM GAS /tmp/ccO46DoU.s page 435 + + 4514 .L152: - ARM GAS /tmp/ccWQNJQt.s page 435 - - -2440:Src/main.c **** { - 4515 .loc 1 2440 2 is_stmt 0 view .LVU1447 +2441:Src/main.c **** { + 4515 .loc 1 2441 2 is_stmt 0 view .LVU1447 4516 0062 2046 mov r0, r4 4517 .LVL344: -2440:Src/main.c **** { - 4518 .loc 1 2440 2 view .LVU1448 +2441:Src/main.c **** { + 4518 .loc 1 2441 2 view .LVU1448 4519 0064 D9E7 b .L144 4520 .L155: 4521 0066 00BF .align 2 @@ -26064,13 +26065,13 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4535 Set_LTEC: 4536 .LVL345: 4537 .LFB1211: -2266:Src/main.c **** uint32_t tmp32; - 4538 .loc 1 2266 1 is_stmt 1 view -0 +2267:Src/main.c **** uint32_t tmp32; + 4538 .loc 1 2267 1 is_stmt 1 view -0 4539 .cfi_startproc 4540 @ args = 0, pretend = 0, frame = 0 4541 @ frame_needed = 0, uses_anonymous_args = 0 -2266:Src/main.c **** uint32_t tmp32; - 4542 .loc 1 2266 1 is_stmt 0 view .LVU1450 +2267:Src/main.c **** uint32_t tmp32; + 4542 .loc 1 2267 1 is_stmt 0 view .LVU1450 4543 0000 38B5 push {r3, r4, r5, lr} 4544 .LCFI41: 4545 .cfi_def_cfa_offset 16 @@ -26079,14 +26080,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4548 .cfi_offset 5, -8 4549 .cfi_offset 14, -4 4550 0002 0C46 mov r4, r1 -2267:Src/main.c **** - 4551 .loc 1 2267 2 is_stmt 1 view .LVU1451 -2269:Src/main.c **** { - 4552 .loc 1 2269 2 view .LVU1452 +2268:Src/main.c **** + 4551 .loc 1 2268 2 is_stmt 1 view .LVU1451 +2270:Src/main.c **** { + 4552 .loc 1 2270 2 view .LVU1452 4553 0004 0138 subs r0, r0, #1 4554 .LVL346: -2269:Src/main.c **** { - 4555 .loc 1 2269 2 is_stmt 0 view .LVU1453 +2270:Src/main.c **** { + 4555 .loc 1 2270 2 is_stmt 0 view .LVU1453 4556 0006 0328 cmp r0, #3 4557 0008 23D8 bhi .L157 4558 000a DFE800F0 tbb [pc, r0] @@ -26097,33 +26098,33 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4563 0011 7C .byte (.L158-.L159)/2 4564 .p2align 1 4565 .L162: -2272:Src/main.c **** //tmp32=0; - ARM GAS /tmp/ccWQNJQt.s page 436 + ARM GAS /tmp/ccO46DoU.s page 436 - 4566 .loc 1 2272 4 is_stmt 1 view .LVU1454 +2273:Src/main.c **** //tmp32=0; + 4566 .loc 1 2273 4 is_stmt 1 view .LVU1454 4567 0012 0022 movs r2, #0 4568 0014 4FF48041 mov r1, #16384 4569 .LVL347: -2272:Src/main.c **** //tmp32=0; - 4570 .loc 1 2272 4 is_stmt 0 view .LVU1455 +2273:Src/main.c **** //tmp32=0; + 4570 .loc 1 2273 4 is_stmt 0 view .LVU1455 4571 0018 4B48 ldr r0, .L189 4572 .LVL348: -2272:Src/main.c **** //tmp32=0; - 4573 .loc 1 2272 4 view .LVU1456 +2273:Src/main.c **** //tmp32=0; + 4573 .loc 1 2273 4 view .LVU1456 4574 001a FFF7FEFF bl HAL_GPIO_WritePin 4575 .LVL349: -2275:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4576 .loc 1 2275 4 is_stmt 1 view .LVU1457 -2276:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4577 .loc 1 2276 4 view .LVU1458 -2275:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4578 .loc 1 2275 10 is_stmt 0 view .LVU1459 +2276:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4576 .loc 1 2276 4 is_stmt 1 view .LVU1457 +2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4577 .loc 1 2277 4 view .LVU1458 +2276:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4578 .loc 1 2276 10 is_stmt 0 view .LVU1459 4579 001e 0022 movs r2, #0 4580 .LVL350: 4581 .L163: -2276:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4582 .loc 1 2276 42 is_stmt 1 discriminator 1 view .LVU1460 +2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4582 .loc 1 2277 42 is_stmt 1 discriminator 1 view .LVU1460 4583 .LBB477: 4584 .LBI477: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26144,25 +26145,25 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4595 .loc 4 918 66 view .LVU1465 4596 .LBE478: 4597 .LBE477: -2276:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4598 .loc 1 2276 42 discriminator 2 view .LVU1466 +2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4598 .loc 1 2277 42 discriminator 2 view .LVU1466 4599 002a B2F5FA7F cmp r2, #500 4600 002e 01D8 bhi .L164 -2276:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4601 .loc 1 2276 59 is_stmt 1 discriminator 3 view .LVU1467 -2276:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4602 .loc 1 2276 64 is_stmt 0 discriminator 3 view .LVU1468 +2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4601 .loc 1 2277 59 is_stmt 1 discriminator 3 view .LVU1467 +2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4602 .loc 1 2277 64 is_stmt 0 discriminator 3 view .LVU1468 4603 0030 0132 adds r2, r2, #1 4604 .LVL352: -2276:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4605 .loc 1 2276 64 discriminator 3 view .LVU1469 +2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4605 .loc 1 2277 64 discriminator 3 view .LVU1469 4606 0032 F5E7 b .L163 + ARM GAS /tmp/ccO46DoU.s page 437 + + 4607 .L164: - ARM GAS /tmp/ccWQNJQt.s page 437 - - -2277:Src/main.c **** tmp32 = 0; - 4608 .loc 1 2277 4 is_stmt 1 view .LVU1470 +2278:Src/main.c **** tmp32 = 0; + 4608 .loc 1 2278 4 is_stmt 1 view .LVU1470 4609 .LVL353: 4610 .LBB479: 4611 .LBI479: @@ -26208,20 +26209,20 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4620 .loc 4 1377 10 view .LVU1475 4621 .LBE480: 4622 .LBE479: -2278:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4623 .loc 1 2278 4 is_stmt 1 view .LVU1476 -2279:Src/main.c **** (void) SPI2->DR; - 4624 .loc 1 2279 4 view .LVU1477 -2278:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4625 .loc 1 2278 10 is_stmt 0 view .LVU1478 +2279:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4623 .loc 1 2279 4 is_stmt 1 view .LVU1476 +2280:Src/main.c **** (void) SPI2->DR; + 4624 .loc 1 2280 4 view .LVU1477 +2279:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4625 .loc 1 2279 10 is_stmt 0 view .LVU1478 4626 0038 0022 movs r2, #0 4627 .LVL355: 4628 .L166: -2279:Src/main.c **** (void) SPI2->DR; - ARM GAS /tmp/ccWQNJQt.s page 438 + ARM GAS /tmp/ccO46DoU.s page 438 - 4629 .loc 1 2279 43 is_stmt 1 discriminator 1 view .LVU1479 +2280:Src/main.c **** (void) SPI2->DR; + 4629 .loc 1 2280 43 is_stmt 1 discriminator 1 view .LVU1479 4630 .LBB481: 4631 .LBI481: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26242,90 +26243,90 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4642 .loc 4 907 68 view .LVU1484 4643 .LBE482: 4644 .LBE481: -2279:Src/main.c **** (void) SPI2->DR; - 4645 .loc 1 2279 43 discriminator 2 view .LVU1485 +2280:Src/main.c **** (void) SPI2->DR; + 4645 .loc 1 2280 43 discriminator 2 view .LVU1485 4646 0044 B2F5FA7F cmp r2, #500 4647 0048 01D8 bhi .L167 -2279:Src/main.c **** (void) SPI2->DR; - 4648 .loc 1 2279 60 is_stmt 1 discriminator 3 view .LVU1486 -2279:Src/main.c **** (void) SPI2->DR; - 4649 .loc 1 2279 65 is_stmt 0 discriminator 3 view .LVU1487 +2280:Src/main.c **** (void) SPI2->DR; + 4648 .loc 1 2280 60 is_stmt 1 discriminator 3 view .LVU1486 +2280:Src/main.c **** (void) SPI2->DR; + 4649 .loc 1 2280 65 is_stmt 0 discriminator 3 view .LVU1487 4650 004a 0132 adds r2, r2, #1 4651 .LVL357: -2279:Src/main.c **** (void) SPI2->DR; - 4652 .loc 1 2279 65 discriminator 3 view .LVU1488 +2280:Src/main.c **** (void) SPI2->DR; + 4652 .loc 1 2280 65 discriminator 3 view .LVU1488 4653 004c F5E7 b .L166 4654 .L167: -2280:Src/main.c **** break; - 4655 .loc 1 2280 4 is_stmt 1 view .LVU1489 +2281:Src/main.c **** break; + 4655 .loc 1 2281 4 is_stmt 1 view .LVU1489 4656 004e 3F4B ldr r3, .L189+4 4657 0050 DB68 ldr r3, [r3, #12] -2281:Src/main.c **** case 2: - 4658 .loc 1 2281 3 view .LVU1490 +2282:Src/main.c **** case 2: + 4658 .loc 1 2282 3 view .LVU1490 4659 .LVL358: 4660 .L157: -2317:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 4661 .loc 1 2317 2 view .LVU1491 +2318:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 4661 .loc 1 2318 2 view .LVU1491 4662 0052 3D4D ldr r5, .L189 4663 0054 0122 movs r2, #1 4664 0056 4FF48041 mov r1, #16384 4665 005a 2846 mov r0, r5 4666 005c FFF7FEFF bl HAL_GPIO_WritePin 4667 .LVL359: -2318:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4668 .loc 1 2318 2 view .LVU1492 +2319:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 4668 .loc 1 2319 2 view .LVU1492 4669 0060 3B4C ldr r4, .L189+8 4670 .LVL360: -2318:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4671 .loc 1 2318 2 is_stmt 0 view .LVU1493 - ARM GAS /tmp/ccWQNJQt.s page 439 +2319:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + ARM GAS /tmp/ccO46DoU.s page 439 + 4671 .loc 1 2319 2 is_stmt 0 view .LVU1493 4672 0062 0122 movs r2, #1 4673 0064 4021 movs r1, #64 4674 0066 2046 mov r0, r4 4675 0068 FFF7FEFF bl HAL_GPIO_WritePin 4676 .LVL361: -2319:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 4677 .loc 1 2319 2 is_stmt 1 view .LVU1494 +2320:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 4677 .loc 1 2320 2 is_stmt 1 view .LVU1494 4678 006c 0122 movs r2, #1 4679 006e 4FF48051 mov r1, #4096 4680 0072 2846 mov r0, r5 4681 0074 FFF7FEFF bl HAL_GPIO_WritePin 4682 .LVL362: -2320:Src/main.c **** } - 4683 .loc 1 2320 2 view .LVU1495 +2321:Src/main.c **** } + 4683 .loc 1 2321 2 view .LVU1495 4684 0078 0122 movs r2, #1 4685 007a 1021 movs r1, #16 4686 007c 2046 mov r0, r4 4687 007e FFF7FEFF bl HAL_GPIO_WritePin 4688 .LVL363: -2321:Src/main.c **** static uint16_t MPhD_T(uint8_t num) - 4689 .loc 1 2321 1 is_stmt 0 view .LVU1496 +2322:Src/main.c **** static uint16_t MPhD_T(uint8_t num) + 4689 .loc 1 2322 1 is_stmt 0 view .LVU1496 4690 0082 38BD pop {r3, r4, r5, pc} 4691 .LVL364: 4692 .L161: -2284:Src/main.c **** //tmp32=0; - 4693 .loc 1 2284 4 is_stmt 1 view .LVU1497 +2285:Src/main.c **** //tmp32=0; + 4693 .loc 1 2285 4 is_stmt 1 view .LVU1497 4694 0084 0022 movs r2, #0 4695 0086 4021 movs r1, #64 4696 .LVL365: -2284:Src/main.c **** //tmp32=0; - 4697 .loc 1 2284 4 is_stmt 0 view .LVU1498 +2285:Src/main.c **** //tmp32=0; + 4697 .loc 1 2285 4 is_stmt 0 view .LVU1498 4698 0088 3148 ldr r0, .L189+8 4699 008a FFF7FEFF bl HAL_GPIO_WritePin 4700 .LVL366: -2287:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4701 .loc 1 2287 4 is_stmt 1 view .LVU1499 -2288:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4702 .loc 1 2288 4 view .LVU1500 -2287:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4703 .loc 1 2287 10 is_stmt 0 view .LVU1501 +2288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4701 .loc 1 2288 4 is_stmt 1 view .LVU1499 +2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4702 .loc 1 2289 4 view .LVU1500 +2288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4703 .loc 1 2288 10 is_stmt 0 view .LVU1501 4704 008e 0022 movs r2, #0 4705 .LVL367: 4706 .L169: -2288:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4707 .loc 1 2288 42 is_stmt 1 discriminator 1 view .LVU1502 +2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4707 .loc 1 2289 42 is_stmt 1 discriminator 1 view .LVU1502 4708 .LBB483: 4709 .LBI483: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26337,10 +26338,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4713 .loc 4 918 12 is_stmt 0 view .LVU1505 4714 0090 304B ldr r3, .L189+12 4715 0092 9B68 ldr r3, [r3, #8] + ARM GAS /tmp/ccO46DoU.s page 440 + + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccWQNJQt.s page 440 - - 4716 .loc 4 918 66 view .LVU1506 4717 0094 13F0020F tst r3, #2 4718 0098 04D1 bne .L170 @@ -26349,22 +26350,22 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4720 .loc 4 918 66 view .LVU1507 4721 .LBE484: 4722 .LBE483: -2288:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4723 .loc 1 2288 42 discriminator 2 view .LVU1508 +2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4723 .loc 1 2289 42 discriminator 2 view .LVU1508 4724 009a B2F5FA7F cmp r2, #500 4725 009e 01D8 bhi .L170 -2288:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4726 .loc 1 2288 59 is_stmt 1 discriminator 3 view .LVU1509 -2288:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4727 .loc 1 2288 64 is_stmt 0 discriminator 3 view .LVU1510 +2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4726 .loc 1 2289 59 is_stmt 1 discriminator 3 view .LVU1509 +2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4727 .loc 1 2289 64 is_stmt 0 discriminator 3 view .LVU1510 4728 00a0 0132 adds r2, r2, #1 4729 .LVL369: -2288:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4730 .loc 1 2288 64 discriminator 3 view .LVU1511 +2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4730 .loc 1 2289 64 discriminator 3 view .LVU1511 4731 00a2 F5E7 b .L169 4732 .L170: -2289:Src/main.c **** tmp32 = 0; - 4733 .loc 1 2289 4 is_stmt 1 view .LVU1512 +2290:Src/main.c **** tmp32 = 0; + 4733 .loc 1 2290 4 is_stmt 1 view .LVU1512 4734 .LVL370: 4735 .LBB485: 4736 .LBI485: @@ -26381,26 +26382,26 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4745 .loc 4 1377 10 view .LVU1517 4746 .LBE486: 4747 .LBE485: -2290:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4748 .loc 1 2290 4 is_stmt 1 view .LVU1518 -2291:Src/main.c **** (void) SPI6->DR; - 4749 .loc 1 2291 4 view .LVU1519 -2290:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4750 .loc 1 2290 10 is_stmt 0 view .LVU1520 +2291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4748 .loc 1 2291 4 is_stmt 1 view .LVU1518 +2292:Src/main.c **** (void) SPI6->DR; + 4749 .loc 1 2292 4 view .LVU1519 +2291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4750 .loc 1 2291 10 is_stmt 0 view .LVU1520 4751 00a8 0022 movs r2, #0 4752 .LVL372: 4753 .L172: -2291:Src/main.c **** (void) SPI6->DR; - 4754 .loc 1 2291 43 is_stmt 1 discriminator 1 view .LVU1521 +2292:Src/main.c **** (void) SPI6->DR; + 4754 .loc 1 2292 43 is_stmt 1 discriminator 1 view .LVU1521 4755 .LBB487: 4756 .LBI487: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 4757 .loc 4 905 26 view .LVU1522 4758 .LBB488: + ARM GAS /tmp/ccO46DoU.s page 441 + + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccWQNJQt.s page 441 - - 4759 .loc 4 907 3 view .LVU1523 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 4760 .loc 4 907 12 is_stmt 0 view .LVU1524 @@ -26415,53 +26416,53 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4767 .loc 4 907 68 view .LVU1526 4768 .LBE488: 4769 .LBE487: -2291:Src/main.c **** (void) SPI6->DR; - 4770 .loc 1 2291 43 discriminator 2 view .LVU1527 +2292:Src/main.c **** (void) SPI6->DR; + 4770 .loc 1 2292 43 discriminator 2 view .LVU1527 4771 00b4 B2F5FA7F cmp r2, #500 4772 00b8 01D8 bhi .L173 -2291:Src/main.c **** (void) SPI6->DR; - 4773 .loc 1 2291 60 is_stmt 1 discriminator 3 view .LVU1528 -2291:Src/main.c **** (void) SPI6->DR; - 4774 .loc 1 2291 65 is_stmt 0 discriminator 3 view .LVU1529 +2292:Src/main.c **** (void) SPI6->DR; + 4773 .loc 1 2292 60 is_stmt 1 discriminator 3 view .LVU1528 +2292:Src/main.c **** (void) SPI6->DR; + 4774 .loc 1 2292 65 is_stmt 0 discriminator 3 view .LVU1529 4775 00ba 0132 adds r2, r2, #1 4776 .LVL374: -2291:Src/main.c **** (void) SPI6->DR; - 4777 .loc 1 2291 65 discriminator 3 view .LVU1530 +2292:Src/main.c **** (void) SPI6->DR; + 4777 .loc 1 2292 65 discriminator 3 view .LVU1530 4778 00bc F5E7 b .L172 4779 .L173: -2292:Src/main.c **** break; - 4780 .loc 1 2292 4 is_stmt 1 view .LVU1531 +2293:Src/main.c **** break; + 4780 .loc 1 2293 4 is_stmt 1 view .LVU1531 4781 00be 254B ldr r3, .L189+12 4782 00c0 DB68 ldr r3, [r3, #12] -2293:Src/main.c **** case 3: - 4783 .loc 1 2293 3 view .LVU1532 +2294:Src/main.c **** case 3: + 4783 .loc 1 2294 3 view .LVU1532 4784 00c2 C6E7 b .L157 4785 .LVL375: 4786 .L160: -2295:Src/main.c **** //tmp32=0; - 4787 .loc 1 2295 4 view .LVU1533 +2296:Src/main.c **** //tmp32=0; + 4787 .loc 1 2296 4 view .LVU1533 4788 00c4 0022 movs r2, #0 4789 00c6 4FF48051 mov r1, #4096 4790 .LVL376: -2295:Src/main.c **** //tmp32=0; - 4791 .loc 1 2295 4 is_stmt 0 view .LVU1534 +2296:Src/main.c **** //tmp32=0; + 4791 .loc 1 2296 4 is_stmt 0 view .LVU1534 4792 00ca 1F48 ldr r0, .L189 4793 00cc FFF7FEFF bl HAL_GPIO_WritePin 4794 .LVL377: -2298:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4795 .loc 1 2298 4 is_stmt 1 view .LVU1535 -2299:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4796 .loc 1 2299 4 view .LVU1536 -2298:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4797 .loc 1 2298 10 is_stmt 0 view .LVU1537 +2299:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4795 .loc 1 2299 4 is_stmt 1 view .LVU1535 +2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4796 .loc 1 2300 4 view .LVU1536 +2299:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4797 .loc 1 2299 10 is_stmt 0 view .LVU1537 4798 00d0 0022 movs r2, #0 4799 .LVL378: 4800 .L175: -2299:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - ARM GAS /tmp/ccWQNJQt.s page 442 + ARM GAS /tmp/ccO46DoU.s page 442 - 4801 .loc 1 2299 42 is_stmt 1 discriminator 1 view .LVU1538 +2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4801 .loc 1 2300 42 is_stmt 1 discriminator 1 view .LVU1538 4802 .LBB489: 4803 .LBI489: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26482,22 +26483,22 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4814 .loc 4 918 66 view .LVU1543 4815 .LBE490: 4816 .LBE489: -2299:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4817 .loc 1 2299 42 discriminator 2 view .LVU1544 +2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4817 .loc 1 2300 42 discriminator 2 view .LVU1544 4818 00dc B2F5FA7F cmp r2, #500 4819 00e0 01D8 bhi .L176 -2299:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4820 .loc 1 2299 59 is_stmt 1 discriminator 3 view .LVU1545 -2299:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4821 .loc 1 2299 64 is_stmt 0 discriminator 3 view .LVU1546 +2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4820 .loc 1 2300 59 is_stmt 1 discriminator 3 view .LVU1545 +2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4821 .loc 1 2300 64 is_stmt 0 discriminator 3 view .LVU1546 4822 00e2 0132 adds r2, r2, #1 4823 .LVL380: -2299:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4824 .loc 1 2299 64 discriminator 3 view .LVU1547 +2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4824 .loc 1 2300 64 discriminator 3 view .LVU1547 4825 00e4 F5E7 b .L175 4826 .L176: -2300:Src/main.c **** tmp32 = 0; - 4827 .loc 1 2300 4 is_stmt 1 view .LVU1548 +2301:Src/main.c **** tmp32 = 0; + 4827 .loc 1 2301 4 is_stmt 1 view .LVU1548 4828 .LVL381: 4829 .LBB491: 4830 .LBI491: @@ -26514,20 +26515,20 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4839 .loc 4 1377 10 view .LVU1553 4840 .LBE492: 4841 .LBE491: -2301:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4842 .loc 1 2301 4 is_stmt 1 view .LVU1554 -2302:Src/main.c **** (void) SPI2->DR; - 4843 .loc 1 2302 4 view .LVU1555 - ARM GAS /tmp/ccWQNJQt.s page 443 +2302:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4842 .loc 1 2302 4 is_stmt 1 view .LVU1554 +2303:Src/main.c **** (void) SPI2->DR; + ARM GAS /tmp/ccO46DoU.s page 443 -2301:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4844 .loc 1 2301 10 is_stmt 0 view .LVU1556 + 4843 .loc 1 2303 4 view .LVU1555 +2302:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4844 .loc 1 2302 10 is_stmt 0 view .LVU1556 4845 00ea 0022 movs r2, #0 4846 .LVL383: 4847 .L178: -2302:Src/main.c **** (void) SPI2->DR; - 4848 .loc 1 2302 43 is_stmt 1 discriminator 1 view .LVU1557 +2303:Src/main.c **** (void) SPI2->DR; + 4848 .loc 1 2303 43 is_stmt 1 discriminator 1 view .LVU1557 4849 .LBB493: 4850 .LBI493: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26548,53 +26549,53 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4861 .loc 4 907 68 view .LVU1562 4862 .LBE494: 4863 .LBE493: -2302:Src/main.c **** (void) SPI2->DR; - 4864 .loc 1 2302 43 discriminator 2 view .LVU1563 +2303:Src/main.c **** (void) SPI2->DR; + 4864 .loc 1 2303 43 discriminator 2 view .LVU1563 4865 00f6 B2F5FA7F cmp r2, #500 4866 00fa 01D8 bhi .L179 -2302:Src/main.c **** (void) SPI2->DR; - 4867 .loc 1 2302 60 is_stmt 1 discriminator 3 view .LVU1564 -2302:Src/main.c **** (void) SPI2->DR; - 4868 .loc 1 2302 65 is_stmt 0 discriminator 3 view .LVU1565 +2303:Src/main.c **** (void) SPI2->DR; + 4867 .loc 1 2303 60 is_stmt 1 discriminator 3 view .LVU1564 +2303:Src/main.c **** (void) SPI2->DR; + 4868 .loc 1 2303 65 is_stmt 0 discriminator 3 view .LVU1565 4869 00fc 0132 adds r2, r2, #1 4870 .LVL385: -2302:Src/main.c **** (void) SPI2->DR; - 4871 .loc 1 2302 65 discriminator 3 view .LVU1566 +2303:Src/main.c **** (void) SPI2->DR; + 4871 .loc 1 2303 65 discriminator 3 view .LVU1566 4872 00fe F5E7 b .L178 4873 .L179: -2303:Src/main.c **** break; - 4874 .loc 1 2303 4 is_stmt 1 view .LVU1567 +2304:Src/main.c **** break; + 4874 .loc 1 2304 4 is_stmt 1 view .LVU1567 4875 0100 124B ldr r3, .L189+4 4876 0102 DB68 ldr r3, [r3, #12] -2304:Src/main.c **** case 4: - 4877 .loc 1 2304 3 view .LVU1568 +2305:Src/main.c **** case 4: + 4877 .loc 1 2305 3 view .LVU1568 4878 0104 A5E7 b .L157 4879 .LVL386: 4880 .L158: -2306:Src/main.c **** //tmp32=0; - 4881 .loc 1 2306 4 view .LVU1569 +2307:Src/main.c **** //tmp32=0; + 4881 .loc 1 2307 4 view .LVU1569 4882 0106 0022 movs r2, #0 4883 0108 1021 movs r1, #16 4884 .LVL387: -2306:Src/main.c **** //tmp32=0; - 4885 .loc 1 2306 4 is_stmt 0 view .LVU1570 - ARM GAS /tmp/ccWQNJQt.s page 444 +2307:Src/main.c **** //tmp32=0; + ARM GAS /tmp/ccO46DoU.s page 444 + 4885 .loc 1 2307 4 is_stmt 0 view .LVU1570 4886 010a 1148 ldr r0, .L189+8 4887 010c FFF7FEFF bl HAL_GPIO_WritePin 4888 .LVL388: -2309:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4889 .loc 1 2309 4 is_stmt 1 view .LVU1571 -2310:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4890 .loc 1 2310 4 view .LVU1572 -2309:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4891 .loc 1 2309 10 is_stmt 0 view .LVU1573 +2310:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4889 .loc 1 2310 4 is_stmt 1 view .LVU1571 +2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4890 .loc 1 2311 4 view .LVU1572 +2310:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4891 .loc 1 2310 10 is_stmt 0 view .LVU1573 4892 0110 0022 movs r2, #0 4893 .LVL389: 4894 .L181: -2310:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4895 .loc 1 2310 42 is_stmt 1 discriminator 1 view .LVU1574 +2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4895 .loc 1 2311 42 is_stmt 1 discriminator 1 view .LVU1574 4896 .LBB495: 4897 .LBI495: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26615,32 +26616,32 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4908 .loc 4 918 66 view .LVU1579 4909 .LBE496: 4910 .LBE495: -2310:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4911 .loc 1 2310 42 discriminator 2 view .LVU1580 +2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4911 .loc 1 2311 42 discriminator 2 view .LVU1580 4912 011c B2F5FA7F cmp r2, #500 4913 0120 01D8 bhi .L182 -2310:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4914 .loc 1 2310 59 is_stmt 1 discriminator 3 view .LVU1581 -2310:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4915 .loc 1 2310 64 is_stmt 0 discriminator 3 view .LVU1582 +2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4914 .loc 1 2311 59 is_stmt 1 discriminator 3 view .LVU1581 +2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4915 .loc 1 2311 64 is_stmt 0 discriminator 3 view .LVU1582 4916 0122 0132 adds r2, r2, #1 4917 .LVL391: -2310:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4918 .loc 1 2310 64 discriminator 3 view .LVU1583 +2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4918 .loc 1 2311 64 discriminator 3 view .LVU1583 4919 0124 F5E7 b .L181 4920 .L182: -2311:Src/main.c **** tmp32 = 0; - 4921 .loc 1 2311 4 is_stmt 1 view .LVU1584 +2312:Src/main.c **** tmp32 = 0; + 4921 .loc 1 2312 4 is_stmt 1 view .LVU1584 4922 .LVL392: 4923 .LBB497: 4924 .LBI497: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 4925 .loc 4 1373 22 view .LVU1585 4926 .LBB498: + ARM GAS /tmp/ccO46DoU.s page 445 + + 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - ARM GAS /tmp/ccWQNJQt.s page 445 - - 4927 .loc 4 1376 3 view .LVU1586 4928 .loc 4 1377 3 view .LVU1587 4929 .loc 4 1377 10 is_stmt 0 view .LVU1588 @@ -26650,17 +26651,17 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4933 .loc 4 1377 10 view .LVU1589 4934 .LBE498: 4935 .LBE497: -2312:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4936 .loc 1 2312 4 is_stmt 1 view .LVU1590 -2313:Src/main.c **** (void) SPI6->DR; - 4937 .loc 1 2313 4 view .LVU1591 -2312:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4938 .loc 1 2312 10 is_stmt 0 view .LVU1592 +2313:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4936 .loc 1 2313 4 is_stmt 1 view .LVU1590 +2314:Src/main.c **** (void) SPI6->DR; + 4937 .loc 1 2314 4 view .LVU1591 +2313:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4938 .loc 1 2313 10 is_stmt 0 view .LVU1592 4939 012a 0022 movs r2, #0 4940 .LVL394: 4941 .L184: -2313:Src/main.c **** (void) SPI6->DR; - 4942 .loc 1 2313 43 is_stmt 1 discriminator 1 view .LVU1593 +2314:Src/main.c **** (void) SPI6->DR; + 4942 .loc 1 2314 43 is_stmt 1 discriminator 1 view .LVU1593 4943 .LBB499: 4944 .LBI499: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26681,29 +26682,29 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4955 .loc 4 907 68 view .LVU1598 4956 .LBE500: 4957 .LBE499: -2313:Src/main.c **** (void) SPI6->DR; - 4958 .loc 1 2313 43 discriminator 2 view .LVU1599 +2314:Src/main.c **** (void) SPI6->DR; + 4958 .loc 1 2314 43 discriminator 2 view .LVU1599 4959 0136 B2F5FA7F cmp r2, #500 4960 013a 01D8 bhi .L185 -2313:Src/main.c **** (void) SPI6->DR; - 4961 .loc 1 2313 60 is_stmt 1 discriminator 3 view .LVU1600 -2313:Src/main.c **** (void) SPI6->DR; - 4962 .loc 1 2313 65 is_stmt 0 discriminator 3 view .LVU1601 +2314:Src/main.c **** (void) SPI6->DR; + 4961 .loc 1 2314 60 is_stmt 1 discriminator 3 view .LVU1600 +2314:Src/main.c **** (void) SPI6->DR; + 4962 .loc 1 2314 65 is_stmt 0 discriminator 3 view .LVU1601 4963 013c 0132 adds r2, r2, #1 4964 .LVL396: -2313:Src/main.c **** (void) SPI6->DR; - 4965 .loc 1 2313 65 discriminator 3 view .LVU1602 +2314:Src/main.c **** (void) SPI6->DR; + 4965 .loc 1 2314 65 discriminator 3 view .LVU1602 4966 013e F5E7 b .L184 4967 .L185: -2314:Src/main.c **** break; - 4968 .loc 1 2314 4 is_stmt 1 view .LVU1603 +2315:Src/main.c **** break; + 4968 .loc 1 2315 4 is_stmt 1 view .LVU1603 + ARM GAS /tmp/ccO46DoU.s page 446 + + 4969 0140 044B ldr r3, .L189+12 - ARM GAS /tmp/ccWQNJQt.s page 446 - - 4970 0142 DB68 ldr r3, [r3, #12] -2315:Src/main.c **** } - 4971 .loc 1 2315 3 view .LVU1604 +2316:Src/main.c **** } + 4971 .loc 1 2316 3 view .LVU1604 4972 0144 85E7 b .L157 4973 .L190: 4974 0146 00BF .align 2 @@ -26722,13 +26723,13 @@ ARM GAS /tmp/ccWQNJQt.s page 1 4989 Decode_uart: 4990 .LVL397: 4991 .LFB1208: -2011:Src/main.c **** // uint8_t *temp1; - 4992 .loc 1 2011 1 view -0 +2012:Src/main.c **** // uint8_t *temp1; + 4992 .loc 1 2012 1 view -0 4993 .cfi_startproc 4994 @ args = 0, pretend = 0, frame = 0 4995 @ frame_needed = 0, uses_anonymous_args = 0 -2011:Src/main.c **** // uint8_t *temp1; - 4996 .loc 1 2011 1 is_stmt 0 view .LVU1606 +2012:Src/main.c **** // uint8_t *temp1; + 4996 .loc 1 2012 1 is_stmt 0 view .LVU1606 4997 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} 4998 .LCFI42: 4999 .cfi_def_cfa_offset 32 @@ -26744,688 +26745,688 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5009 0006 0F46 mov r7, r1 5010 0008 1646 mov r6, r2 5011 000a 1C46 mov r4, r3 -2013:Src/main.c **** - 5012 .loc 1 2013 2 is_stmt 1 view .LVU1607 -2018:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5013 .loc 1 2018 2 view .LVU1608 -2018:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5014 .loc 1 2018 6 is_stmt 0 view .LVU1609 +2014:Src/main.c **** + 5012 .loc 1 2014 2 is_stmt 1 view .LVU1607 +2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 5013 .loc 1 2019 2 view .LVU1608 +2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 5014 .loc 1 2019 6 is_stmt 0 view .LVU1609 5015 000c AF4B ldr r3, .L215 5016 .LVL398: -2018:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5017 .loc 1 2018 6 view .LVU1610 +2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 5017 .loc 1 2019 6 view .LVU1610 5018 000e 0022 movs r2, #0 5019 .LVL399: -2018:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5020 .loc 1 2018 6 view .LVU1611 - ARM GAS /tmp/ccWQNJQt.s page 447 +2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + ARM GAS /tmp/ccO46DoU.s page 447 + 5020 .loc 1 2019 6 view .LVU1611 5021 0010 1A60 str r2, [r3] -2019:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5022 .loc 1 2019 2 is_stmt 1 view .LVU1612 -2019:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5023 .loc 1 2019 7 is_stmt 0 view .LVU1613 +2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5022 .loc 1 2020 2 is_stmt 1 view .LVU1612 +2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5023 .loc 1 2020 7 is_stmt 0 view .LVU1613 5024 0012 0121 movs r1, #1 5025 .LVL400: -2019:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5026 .loc 1 2019 7 view .LVU1614 +2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5026 .loc 1 2020 7 view .LVU1614 5027 0014 AE48 ldr r0, .L215+4 5028 .LVL401: -2019:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5029 .loc 1 2019 7 view .LVU1615 +2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5029 .loc 1 2020 7 view .LVU1615 5030 0016 FFF7FEFF bl HAL_GPIO_ReadPin 5031 .LVL402: -2019:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5032 .loc 1 2019 5 discriminator 1 view .LVU1616 +2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5032 .loc 1 2020 5 discriminator 1 view .LVU1616 5033 001a 0028 cmp r0, #0 5034 001c 00F0D280 beq .L212 5035 .L192: -2034:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 5036 .loc 1 2034 2 is_stmt 1 view .LVU1617 +2035:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 5036 .loc 1 2035 2 is_stmt 1 view .LVU1617 5037 .LVL403: -2035:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5038 .loc 1 2035 2 view .LVU1618 -2035:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5039 .loc 1 2035 36 is_stmt 0 view .LVU1619 +2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5038 .loc 1 2036 2 view .LVU1618 +2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5039 .loc 1 2036 36 is_stmt 0 view .LVU1619 5040 0020 2B88 ldrh r3, [r5] -2035:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5041 .loc 1 2035 48 view .LVU1620 +2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5041 .loc 1 2036 48 view .LVU1620 5042 0022 03F00103 and r3, r3, #1 -2035:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5043 .loc 1 2035 22 view .LVU1621 +2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5043 .loc 1 2036 22 view .LVU1621 5044 0026 2370 strb r3, [r4] -2036:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5045 .loc 1 2036 2 is_stmt 1 view .LVU1622 -2036:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5046 .loc 1 2036 36 is_stmt 0 view .LVU1623 +2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5045 .loc 1 2037 2 is_stmt 1 view .LVU1622 +2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5046 .loc 1 2037 36 is_stmt 0 view .LVU1623 5047 0028 2B88 ldrh r3, [r5] -2036:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5048 .loc 1 2036 48 view .LVU1624 +2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5048 .loc 1 2037 48 view .LVU1624 5049 002a C3F34003 ubfx r3, r3, #1, #1 -2036:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5050 .loc 1 2036 22 view .LVU1625 +2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5050 .loc 1 2037 22 view .LVU1625 5051 002e 6370 strb r3, [r4, #1] -2037:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5052 .loc 1 2037 2 is_stmt 1 view .LVU1626 -2037:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5053 .loc 1 2037 36 is_stmt 0 view .LVU1627 +2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5052 .loc 1 2038 2 is_stmt 1 view .LVU1626 +2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5053 .loc 1 2038 36 is_stmt 0 view .LVU1627 5054 0030 2B88 ldrh r3, [r5] -2037:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5055 .loc 1 2037 48 view .LVU1628 +2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5055 .loc 1 2038 48 view .LVU1628 5056 0032 C3F38003 ubfx r3, r3, #2, #1 -2037:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5057 .loc 1 2037 22 view .LVU1629 +2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5057 .loc 1 2038 22 view .LVU1629 5058 0036 A370 strb r3, [r4, #2] -2038:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - ARM GAS /tmp/ccWQNJQt.s page 448 + ARM GAS /tmp/ccO46DoU.s page 448 - 5059 .loc 1 2038 2 is_stmt 1 view .LVU1630 -2038:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5060 .loc 1 2038 35 is_stmt 0 view .LVU1631 +2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5059 .loc 1 2039 2 is_stmt 1 view .LVU1630 +2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5060 .loc 1 2039 35 is_stmt 0 view .LVU1631 5061 0038 2B88 ldrh r3, [r5] -2038:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5062 .loc 1 2038 47 view .LVU1632 +2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5062 .loc 1 2039 47 view .LVU1632 5063 003a C3F3C003 ubfx r3, r3, #3, #1 -2038:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5064 .loc 1 2038 21 view .LVU1633 +2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5064 .loc 1 2039 21 view .LVU1633 5065 003e E370 strb r3, [r4, #3] -2039:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5066 .loc 1 2039 2 is_stmt 1 view .LVU1634 -2039:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5067 .loc 1 2039 35 is_stmt 0 view .LVU1635 +2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5066 .loc 1 2040 2 is_stmt 1 view .LVU1634 +2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5067 .loc 1 2040 35 is_stmt 0 view .LVU1635 5068 0040 2B88 ldrh r3, [r5] -2039:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5069 .loc 1 2039 47 view .LVU1636 +2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5069 .loc 1 2040 47 view .LVU1636 5070 0042 C3F30013 ubfx r3, r3, #4, #1 -2039:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5071 .loc 1 2039 21 view .LVU1637 +2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5071 .loc 1 2040 21 view .LVU1637 5072 0046 2371 strb r3, [r4, #4] -2040:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5073 .loc 1 2040 2 is_stmt 1 view .LVU1638 -2040:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5074 .loc 1 2040 36 is_stmt 0 view .LVU1639 +2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5073 .loc 1 2041 2 is_stmt 1 view .LVU1638 +2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5074 .loc 1 2041 36 is_stmt 0 view .LVU1639 5075 0048 2B88 ldrh r3, [r5] -2040:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5076 .loc 1 2040 48 view .LVU1640 +2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5076 .loc 1 2041 48 view .LVU1640 5077 004a C3F34013 ubfx r3, r3, #5, #1 -2040:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5078 .loc 1 2040 22 view .LVU1641 +2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5078 .loc 1 2041 22 view .LVU1641 5079 004e 6371 strb r3, [r4, #5] -2041:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5080 .loc 1 2041 2 is_stmt 1 view .LVU1642 -2041:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5081 .loc 1 2041 36 is_stmt 0 view .LVU1643 +2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5080 .loc 1 2042 2 is_stmt 1 view .LVU1642 +2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5081 .loc 1 2042 36 is_stmt 0 view .LVU1643 5082 0050 2B88 ldrh r3, [r5] -2041:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5083 .loc 1 2041 48 view .LVU1644 +2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5083 .loc 1 2042 48 view .LVU1644 5084 0052 C3F38013 ubfx r3, r3, #6, #1 -2041:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5085 .loc 1 2041 22 view .LVU1645 +2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5085 .loc 1 2042 22 view .LVU1645 5086 0056 A371 strb r3, [r4, #6] -2042:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5087 .loc 1 2042 2 is_stmt 1 view .LVU1646 -2042:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5088 .loc 1 2042 36 is_stmt 0 view .LVU1647 +2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5087 .loc 1 2043 2 is_stmt 1 view .LVU1646 +2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5088 .loc 1 2043 36 is_stmt 0 view .LVU1647 5089 0058 2B88 ldrh r3, [r5] -2042:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5090 .loc 1 2042 48 view .LVU1648 +2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5090 .loc 1 2043 48 view .LVU1648 5091 005a C3F3C013 ubfx r3, r3, #7, #1 -2042:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5092 .loc 1 2042 22 view .LVU1649 +2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5092 .loc 1 2043 22 view .LVU1649 5093 005e E371 strb r3, [r4, #7] -2043:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5094 .loc 1 2043 2 is_stmt 1 view .LVU1650 -2043:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - ARM GAS /tmp/ccWQNJQt.s page 449 +2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5094 .loc 1 2044 2 is_stmt 1 view .LVU1650 + ARM GAS /tmp/ccO46DoU.s page 449 - 5095 .loc 1 2043 36 is_stmt 0 view .LVU1651 +2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5095 .loc 1 2044 36 is_stmt 0 view .LVU1651 5096 0060 2B88 ldrh r3, [r5] -2043:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5097 .loc 1 2043 48 view .LVU1652 +2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5097 .loc 1 2044 48 view .LVU1652 5098 0062 C3F30023 ubfx r3, r3, #8, #1 -2043:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5099 .loc 1 2043 22 view .LVU1653 +2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5099 .loc 1 2044 22 view .LVU1653 5100 0066 2372 strb r3, [r4, #8] -2044:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5101 .loc 1 2044 2 is_stmt 1 view .LVU1654 -2044:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5102 .loc 1 2044 35 is_stmt 0 view .LVU1655 +2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5101 .loc 1 2045 2 is_stmt 1 view .LVU1654 +2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5102 .loc 1 2045 35 is_stmt 0 view .LVU1655 5103 0068 2B88 ldrh r3, [r5] -2044:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5104 .loc 1 2044 47 view .LVU1656 +2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5104 .loc 1 2045 47 view .LVU1656 5105 006a C3F34023 ubfx r3, r3, #9, #1 -2044:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5106 .loc 1 2044 21 view .LVU1657 +2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5106 .loc 1 2045 21 view .LVU1657 5107 006e 6372 strb r3, [r4, #9] -2045:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5108 .loc 1 2045 2 is_stmt 1 view .LVU1658 -2045:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5109 .loc 1 2045 35 is_stmt 0 view .LVU1659 +2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5108 .loc 1 2046 2 is_stmt 1 view .LVU1658 +2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5109 .loc 1 2046 35 is_stmt 0 view .LVU1659 5110 0070 2B88 ldrh r3, [r5] -2045:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5111 .loc 1 2045 48 view .LVU1660 +2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5111 .loc 1 2046 48 view .LVU1660 5112 0072 C3F38023 ubfx r3, r3, #10, #1 -2045:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5113 .loc 1 2045 21 view .LVU1661 +2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5113 .loc 1 2046 21 view .LVU1661 5114 0076 A372 strb r3, [r4, #10] -2046:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5115 .loc 1 2046 2 is_stmt 1 view .LVU1662 -2046:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5116 .loc 1 2046 34 is_stmt 0 view .LVU1663 +2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5115 .loc 1 2047 2 is_stmt 1 view .LVU1662 +2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5116 .loc 1 2047 34 is_stmt 0 view .LVU1663 5117 0078 2B88 ldrh r3, [r5] -2046:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5118 .loc 1 2046 47 view .LVU1664 +2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5118 .loc 1 2047 47 view .LVU1664 5119 007a C3F3C023 ubfx r3, r3, #11, #1 -2046:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5120 .loc 1 2046 20 view .LVU1665 +2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5120 .loc 1 2047 20 view .LVU1665 5121 007e E372 strb r3, [r4, #11] -2047:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5122 .loc 1 2047 2 is_stmt 1 view .LVU1666 -2047:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5123 .loc 1 2047 35 is_stmt 0 view .LVU1667 +2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5122 .loc 1 2048 2 is_stmt 1 view .LVU1666 +2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5123 .loc 1 2048 35 is_stmt 0 view .LVU1667 5124 0080 2B88 ldrh r3, [r5] -2047:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5125 .loc 1 2047 48 view .LVU1668 +2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5125 .loc 1 2048 48 view .LVU1668 5126 0082 C3F30033 ubfx r3, r3, #12, #1 -2047:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5127 .loc 1 2047 21 view .LVU1669 +2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5127 .loc 1 2048 21 view .LVU1669 5128 0086 2373 strb r3, [r4, #12] -2048:Src/main.c **** - 5129 .loc 1 2048 2 is_stmt 1 view .LVU1670 -2048:Src/main.c **** - 5130 .loc 1 2048 35 is_stmt 0 view .LVU1671 +2049:Src/main.c **** + 5129 .loc 1 2049 2 is_stmt 1 view .LVU1670 +2049:Src/main.c **** + 5130 .loc 1 2049 35 is_stmt 0 view .LVU1671 + ARM GAS /tmp/ccO46DoU.s page 450 + + 5131 0088 2B88 ldrh r3, [r5] - ARM GAS /tmp/ccWQNJQt.s page 450 - - -2048:Src/main.c **** - 5132 .loc 1 2048 48 view .LVU1672 +2049:Src/main.c **** + 5132 .loc 1 2049 48 view .LVU1672 5133 008a C3F34033 ubfx r3, r3, #13, #1 -2048:Src/main.c **** - 5134 .loc 1 2048 21 view .LVU1673 +2049:Src/main.c **** + 5134 .loc 1 2049 21 view .LVU1673 5135 008e 6373 strb r3, [r4, #13] -2050:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 5136 .loc 1 2050 2 is_stmt 1 view .LVU1674 +2051:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 5136 .loc 1 2051 2 is_stmt 1 view .LVU1674 5137 .LVL404: -2051:Src/main.c **** temp2++; - 5138 .loc 1 2051 2 view .LVU1675 -2051:Src/main.c **** temp2++; - 5139 .loc 1 2051 28 is_stmt 0 view .LVU1676 +2052:Src/main.c **** temp2++; + 5138 .loc 1 2052 2 view .LVU1675 +2052:Src/main.c **** temp2++; + 5139 .loc 1 2052 28 is_stmt 0 view .LVU1676 5140 0090 6B88 ldrh r3, [r5, #2] -2051:Src/main.c **** temp2++; - 5141 .loc 1 2051 26 view .LVU1677 +2052:Src/main.c **** temp2++; + 5141 .loc 1 2052 26 view .LVU1677 5142 0092 3B80 strh r3, [r7] @ movhi -2052:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 5143 .loc 1 2052 2 is_stmt 1 view .LVU1678 +2053:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 5143 .loc 1 2053 2 is_stmt 1 view .LVU1678 5144 .LVL405: -2053:Src/main.c **** temp2++; - 5145 .loc 1 2053 2 view .LVU1679 -2053:Src/main.c **** temp2++; - 5146 .loc 1 2053 28 is_stmt 0 view .LVU1680 - 5147 0094 AB88 ldrh r3, [r5, #4] -2053:Src/main.c **** temp2++; - 5148 .loc 1 2053 26 view .LVU1681 - 5149 0096 3380 strh r3, [r6] @ movhi 2054:Src/main.c **** temp2++; - 5150 .loc 1 2054 2 is_stmt 1 view .LVU1682 - 5151 .LVL406: + 5145 .loc 1 2054 2 view .LVU1679 +2054:Src/main.c **** temp2++; + 5146 .loc 1 2054 28 is_stmt 0 view .LVU1680 + 5147 0094 AB88 ldrh r3, [r5, #4] +2054:Src/main.c **** temp2++; + 5148 .loc 1 2054 26 view .LVU1681 + 5149 0096 3380 strh r3, [r6] @ movhi 2055:Src/main.c **** temp2++; - 5152 .loc 1 2055 2 view .LVU1683 -2056:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); - 5153 .loc 1 2056 2 view .LVU1684 -2057:Src/main.c **** temp2++; - 5154 .loc 1 2057 2 view .LVU1685 -2057:Src/main.c **** temp2++; - 5155 .loc 1 2057 25 is_stmt 0 view .LVU1686 + 5150 .loc 1 2055 2 is_stmt 1 view .LVU1682 + 5151 .LVL406: +2056:Src/main.c **** temp2++; + 5152 .loc 1 2056 2 view .LVU1683 +2057:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); + 5153 .loc 1 2057 2 view .LVU1684 +2058:Src/main.c **** temp2++; + 5154 .loc 1 2058 2 view .LVU1685 +2058:Src/main.c **** temp2++; + 5155 .loc 1 2058 25 is_stmt 0 view .LVU1686 5156 0098 6B89 ldrh r3, [r5, #10] -2057:Src/main.c **** temp2++; - 5157 .loc 1 2057 23 view .LVU1687 +2058:Src/main.c **** temp2++; + 5157 .loc 1 2058 23 view .LVU1687 5158 009a E381 strh r3, [r4, #14] @ movhi -2058:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5159 .loc 1 2058 2 is_stmt 1 view .LVU1688 +2059:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5159 .loc 1 2059 2 is_stmt 1 view .LVU1688 5160 .LVL407: -2059:Src/main.c **** temp2++; - 5161 .loc 1 2059 2 view .LVU1689 -2059:Src/main.c **** temp2++; - 5162 .loc 1 2059 51 is_stmt 0 view .LVU1690 +2060:Src/main.c **** temp2++; + 5161 .loc 1 2060 2 view .LVU1689 +2060:Src/main.c **** temp2++; + 5162 .loc 1 2060 51 is_stmt 0 view .LVU1690 5163 009c AB89 ldrh r3, [r5, #12] 5164 009e 07EE903A vmov s15, r3 @ int -2059:Src/main.c **** temp2++; - 5165 .loc 1 2059 32 view .LVU1691 +2060:Src/main.c **** temp2++; + 5165 .loc 1 2060 32 view .LVU1691 5166 00a2 F8EE677A vcvt.f32.u32 s15, s15 -2059:Src/main.c **** temp2++; - 5167 .loc 1 2059 59 view .LVU1692 - ARM GAS /tmp/ccWQNJQt.s page 451 +2060:Src/main.c **** temp2++; + ARM GAS /tmp/ccO46DoU.s page 451 + 5167 .loc 1 2060 59 view .LVU1692 5168 00a6 9FED8B7A vldr.32 s14, .L215+8 5169 00aa 67EE877A vmul.f32 s15, s15, s14 -2059:Src/main.c **** temp2++; - 5170 .loc 1 2059 30 view .LVU1693 +2060:Src/main.c **** temp2++; + 5170 .loc 1 2060 30 view .LVU1693 5171 00ae C7ED017A vstr.32 s15, [r7, #4] -2060:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5172 .loc 1 2060 2 is_stmt 1 view .LVU1694 +2061:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5172 .loc 1 2061 2 is_stmt 1 view .LVU1694 5173 .LVL408: -2061:Src/main.c **** temp2++; - 5174 .loc 1 2061 2 view .LVU1695 -2061:Src/main.c **** temp2++; - 5175 .loc 1 2061 51 is_stmt 0 view .LVU1696 +2062:Src/main.c **** temp2++; + 5174 .loc 1 2062 2 view .LVU1695 +2062:Src/main.c **** temp2++; + 5175 .loc 1 2062 51 is_stmt 0 view .LVU1696 5176 00b2 EB89 ldrh r3, [r5, #14] 5177 00b4 07EE903A vmov s15, r3 @ int -2061:Src/main.c **** temp2++; - 5178 .loc 1 2061 32 view .LVU1697 +2062:Src/main.c **** temp2++; + 5178 .loc 1 2062 32 view .LVU1697 5179 00b8 F8EE677A vcvt.f32.u32 s15, s15 -2061:Src/main.c **** temp2++; - 5180 .loc 1 2061 59 view .LVU1698 +2062:Src/main.c **** temp2++; + 5180 .loc 1 2062 59 view .LVU1698 5181 00bc 67EE877A vmul.f32 s15, s15, s14 -2061:Src/main.c **** temp2++; - 5182 .loc 1 2061 30 view .LVU1699 +2062:Src/main.c **** temp2++; + 5182 .loc 1 2062 30 view .LVU1699 5183 00c0 C7ED027A vstr.32 s15, [r7, #8] -2062:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5184 .loc 1 2062 2 is_stmt 1 view .LVU1700 +2063:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5184 .loc 1 2063 2 is_stmt 1 view .LVU1700 5185 .LVL409: -2063:Src/main.c **** temp2++; - 5186 .loc 1 2063 2 view .LVU1701 -2063:Src/main.c **** temp2++; - 5187 .loc 1 2063 51 is_stmt 0 view .LVU1702 +2064:Src/main.c **** temp2++; + 5186 .loc 1 2064 2 view .LVU1701 +2064:Src/main.c **** temp2++; + 5187 .loc 1 2064 51 is_stmt 0 view .LVU1702 5188 00c4 2B8A ldrh r3, [r5, #16] 5189 00c6 07EE903A vmov s15, r3 @ int -2063:Src/main.c **** temp2++; - 5190 .loc 1 2063 32 view .LVU1703 +2064:Src/main.c **** temp2++; + 5190 .loc 1 2064 32 view .LVU1703 5191 00ca F8EE677A vcvt.f32.u32 s15, s15 -2063:Src/main.c **** temp2++; - 5192 .loc 1 2063 59 view .LVU1704 +2064:Src/main.c **** temp2++; + 5192 .loc 1 2064 59 view .LVU1704 5193 00ce 67EE877A vmul.f32 s15, s15, s14 -2063:Src/main.c **** temp2++; - 5194 .loc 1 2063 30 view .LVU1705 +2064:Src/main.c **** temp2++; + 5194 .loc 1 2064 30 view .LVU1705 5195 00d2 C6ED017A vstr.32 s15, [r6, #4] -2064:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5196 .loc 1 2064 2 is_stmt 1 view .LVU1706 +2065:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5196 .loc 1 2065 2 is_stmt 1 view .LVU1706 5197 .LVL410: -2065:Src/main.c **** temp2++; - 5198 .loc 1 2065 2 view .LVU1707 -2065:Src/main.c **** temp2++; - 5199 .loc 1 2065 51 is_stmt 0 view .LVU1708 +2066:Src/main.c **** temp2++; + 5198 .loc 1 2066 2 view .LVU1707 +2066:Src/main.c **** temp2++; + 5199 .loc 1 2066 51 is_stmt 0 view .LVU1708 5200 00d6 6B8A ldrh r3, [r5, #18] 5201 00d8 07EE903A vmov s15, r3 @ int -2065:Src/main.c **** temp2++; - 5202 .loc 1 2065 32 view .LVU1709 +2066:Src/main.c **** temp2++; + 5202 .loc 1 2066 32 view .LVU1709 5203 00dc F8EE677A vcvt.f32.u32 s15, s15 -2065:Src/main.c **** temp2++; - 5204 .loc 1 2065 59 view .LVU1710 +2066:Src/main.c **** temp2++; + 5204 .loc 1 2066 59 view .LVU1710 5205 00e0 67EE877A vmul.f32 s15, s15, s14 -2065:Src/main.c **** temp2++; - ARM GAS /tmp/ccWQNJQt.s page 452 + ARM GAS /tmp/ccO46DoU.s page 452 - 5206 .loc 1 2065 30 view .LVU1711 +2066:Src/main.c **** temp2++; + 5206 .loc 1 2066 30 view .LVU1711 5207 00e4 C6ED027A vstr.32 s15, [r6, #8] -2066:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID - 5208 .loc 1 2066 2 is_stmt 1 view .LVU1712 +2067:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID + 5208 .loc 1 2067 2 is_stmt 1 view .LVU1712 5209 .LVL411: -2067:Src/main.c **** temp2++; - 5210 .loc 1 2067 2 view .LVU1713 -2067:Src/main.c **** temp2++; - 5211 .loc 1 2067 18 is_stmt 0 view .LVU1714 +2068:Src/main.c **** temp2++; + 5210 .loc 1 2068 2 view .LVU1713 +2068:Src/main.c **** temp2++; + 5211 .loc 1 2068 18 is_stmt 0 view .LVU1714 5212 00e8 AA8A ldrh r2, [r5, #20] -2067:Src/main.c **** temp2++; - 5213 .loc 1 2067 16 view .LVU1715 +2068:Src/main.c **** temp2++; + 5213 .loc 1 2068 16 view .LVU1715 5214 00ea 7B4B ldr r3, .L215+12 5215 00ec 5A83 strh r2, [r3, #26] @ movhi -2068:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); - 5216 .loc 1 2068 2 is_stmt 1 view .LVU1716 +2069:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); + 5216 .loc 1 2069 2 is_stmt 1 view .LVU1716 5217 .LVL412: -2069:Src/main.c **** temp2++; - 5218 .loc 1 2069 2 view .LVU1717 -2069:Src/main.c **** temp2++; - 5219 .loc 1 2069 28 is_stmt 0 view .LVU1718 +2070:Src/main.c **** temp2++; + 5218 .loc 1 2070 2 view .LVU1717 +2070:Src/main.c **** temp2++; + 5219 .loc 1 2070 28 is_stmt 0 view .LVU1718 5220 00ee EB8A ldrh r3, [r5, #22] -2069:Src/main.c **** temp2++; - 5221 .loc 1 2069 26 view .LVU1719 +2070:Src/main.c **** temp2++; + 5221 .loc 1 2070 26 view .LVU1719 5222 00f0 BB81 strh r3, [r7, #12] @ movhi -2070:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); - 5223 .loc 1 2070 2 is_stmt 1 view .LVU1720 +2071:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); + 5223 .loc 1 2071 2 is_stmt 1 view .LVU1720 5224 .LVL413: -2071:Src/main.c **** temp2++; - 5225 .loc 1 2071 2 view .LVU1721 -2071:Src/main.c **** temp2++; - 5226 .loc 1 2071 28 is_stmt 0 view .LVU1722 +2072:Src/main.c **** temp2++; + 5225 .loc 1 2072 2 view .LVU1721 +2072:Src/main.c **** temp2++; + 5226 .loc 1 2072 28 is_stmt 0 view .LVU1722 5227 00f2 2B8B ldrh r3, [r5, #24] -2071:Src/main.c **** temp2++; - 5228 .loc 1 2071 26 view .LVU1723 +2072:Src/main.c **** temp2++; + 5228 .loc 1 2072 26 view .LVU1723 5229 00f4 B381 strh r3, [r6, #12] @ movhi -2072:Src/main.c **** - 5230 .loc 1 2072 2 is_stmt 1 view .LVU1724 +2073:Src/main.c **** + 5230 .loc 1 2073 2 is_stmt 1 view .LVU1724 5231 .LVL414: -2074:Src/main.c **** { - 5232 .loc 1 2074 2 view .LVU1725 -2074:Src/main.c **** { - 5233 .loc 1 2074 16 is_stmt 0 view .LVU1726 +2075:Src/main.c **** { + 5232 .loc 1 2075 2 view .LVU1725 +2075:Src/main.c **** { + 5233 .loc 1 2075 16 is_stmt 0 view .LVU1726 5234 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 -2074:Src/main.c **** { - 5235 .loc 1 2074 5 view .LVU1727 +2075:Src/main.c **** { + 5235 .loc 1 2075 5 view .LVU1727 5236 00f8 002B cmp r3, #0 5237 00fa 00F09580 beq .L193 -2076:Src/main.c **** } - 5238 .loc 1 2076 3 is_stmt 1 view .LVU1728 +2077:Src/main.c **** } + 5238 .loc 1 2077 3 is_stmt 1 view .LVU1728 5239 00fe 0122 movs r2, #1 5240 0100 0821 movs r1, #8 5241 0102 7648 ldr r0, .L215+16 5242 0104 FFF7FEFF bl HAL_GPIO_WritePin 5243 .LVL415: 5244 .L194: -2083:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 453 + ARM GAS /tmp/ccO46DoU.s page 453 - 5245 .loc 1 2083 2 view .LVU1729 -2083:Src/main.c **** { - 5246 .loc 1 2083 16 is_stmt 0 view .LVU1730 +2084:Src/main.c **** { + 5245 .loc 1 2084 2 view .LVU1729 +2084:Src/main.c **** { + 5246 .loc 1 2084 16 is_stmt 0 view .LVU1730 5247 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 -2083:Src/main.c **** { - 5248 .loc 1 2083 5 view .LVU1731 +2084:Src/main.c **** { + 5248 .loc 1 2084 5 view .LVU1731 5249 010a 002B cmp r3, #0 5250 010c 00F09280 beq .L195 -2085:Src/main.c **** } - 5251 .loc 1 2085 3 is_stmt 1 view .LVU1732 +2086:Src/main.c **** } + 5251 .loc 1 2086 3 is_stmt 1 view .LVU1732 5252 0110 0122 movs r2, #1 5253 0112 0421 movs r1, #4 5254 0114 7148 ldr r0, .L215+16 5255 0116 FFF7FEFF bl HAL_GPIO_WritePin 5256 .LVL416: 5257 .L196: -2092:Src/main.c **** { - 5258 .loc 1 2092 2 view .LVU1733 -2092:Src/main.c **** { - 5259 .loc 1 2092 16 is_stmt 0 view .LVU1734 +2093:Src/main.c **** { + 5258 .loc 1 2093 2 view .LVU1733 +2093:Src/main.c **** { + 5259 .loc 1 2093 16 is_stmt 0 view .LVU1734 5260 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 -2092:Src/main.c **** { - 5261 .loc 1 2092 5 view .LVU1735 +2093:Src/main.c **** { + 5261 .loc 1 2093 5 view .LVU1735 5262 011c 002B cmp r3, #0 5263 011e 00F08F80 beq .L197 -2094:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC - 5264 .loc 1 2094 3 is_stmt 1 view .LVU1736 +2095:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC + 5264 .loc 1 2095 3 is_stmt 1 view .LVU1736 5265 0122 0122 movs r2, #1 5266 0124 4FF48071 mov r1, #256 5267 0128 6948 ldr r0, .L215+4 5268 012a FFF7FEFF bl HAL_GPIO_WritePin 5269 .LVL417: 5270 .L198: -2103:Src/main.c **** { - 5271 .loc 1 2103 2 view .LVU1737 -2103:Src/main.c **** { - 5272 .loc 1 2103 16 is_stmt 0 view .LVU1738 +2104:Src/main.c **** { + 5271 .loc 1 2104 2 view .LVU1737 +2104:Src/main.c **** { + 5272 .loc 1 2104 16 is_stmt 0 view .LVU1738 5273 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 -2103:Src/main.c **** { - 5274 .loc 1 2103 5 view .LVU1739 +2104:Src/main.c **** { + 5274 .loc 1 2104 5 view .LVU1739 5275 0130 002B cmp r3, #0 5276 0132 00F08C80 beq .L199 -2105:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC - 5277 .loc 1 2105 3 is_stmt 1 view .LVU1740 +2106:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC + 5277 .loc 1 2106 3 is_stmt 1 view .LVU1740 5278 0136 0122 movs r2, #1 5279 0138 1021 movs r1, #16 5280 013a 6848 ldr r0, .L215+16 5281 013c FFF7FEFF bl HAL_GPIO_WritePin 5282 .LVL418: 5283 .L200: -2114:Src/main.c **** { - 5284 .loc 1 2114 2 view .LVU1741 -2114:Src/main.c **** { - 5285 .loc 1 2114 16 is_stmt 0 view .LVU1742 +2115:Src/main.c **** { + 5284 .loc 1 2115 2 view .LVU1741 +2115:Src/main.c **** { + 5285 .loc 1 2115 16 is_stmt 0 view .LVU1742 5286 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 -2114:Src/main.c **** { - 5287 .loc 1 2114 5 view .LVU1743 - ARM GAS /tmp/ccWQNJQt.s page 454 +2115:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 454 + 5287 .loc 1 2115 5 view .LVU1743 5288 0142 002B cmp r3, #0 5289 0144 00F08980 beq .L201 -2116:Src/main.c **** } - 5290 .loc 1 2116 3 is_stmt 1 view .LVU1744 +2117:Src/main.c **** } + 5290 .loc 1 2117 3 is_stmt 1 view .LVU1744 5291 0148 0122 movs r2, #1 5292 014a 4FF48061 mov r1, #1024 5293 014e 6448 ldr r0, .L215+20 5294 0150 FFF7FEFF bl HAL_GPIO_WritePin 5295 .LVL419: 5296 .L202: -2123:Src/main.c **** { - 5297 .loc 1 2123 2 view .LVU1745 -2123:Src/main.c **** { - 5298 .loc 1 2123 16 is_stmt 0 view .LVU1746 +2124:Src/main.c **** { + 5297 .loc 1 2124 2 view .LVU1745 +2124:Src/main.c **** { + 5298 .loc 1 2124 16 is_stmt 0 view .LVU1746 5299 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 -2123:Src/main.c **** { - 5300 .loc 1 2123 5 view .LVU1747 +2124:Src/main.c **** { + 5300 .loc 1 2124 5 view .LVU1747 5301 0156 002B cmp r3, #0 5302 0158 00F08680 beq .L203 -2125:Src/main.c **** } - 5303 .loc 1 2125 3 is_stmt 1 view .LVU1748 +2126:Src/main.c **** } + 5303 .loc 1 2126 3 is_stmt 1 view .LVU1748 5304 015c 0122 movs r2, #1 5305 015e 0821 movs r1, #8 5306 0160 6048 ldr r0, .L215+24 5307 0162 FFF7FEFF bl HAL_GPIO_WritePin 5308 .LVL420: 5309 .L204: -2132:Src/main.c **** { - 5310 .loc 1 2132 2 view .LVU1749 -2132:Src/main.c **** { - 5311 .loc 1 2132 17 is_stmt 0 view .LVU1750 +2133:Src/main.c **** { + 5310 .loc 1 2133 2 view .LVU1749 +2133:Src/main.c **** { + 5311 .loc 1 2133 17 is_stmt 0 view .LVU1750 5312 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 -2132:Src/main.c **** { - 5313 .loc 1 2132 5 view .LVU1751 +2133:Src/main.c **** { + 5313 .loc 1 2133 5 view .LVU1751 5314 0168 1BB1 cbz r3, .L205 -2132:Src/main.c **** { - 5315 .loc 1 2132 39 discriminator 1 view .LVU1752 +2133:Src/main.c **** { + 5315 .loc 1 2133 39 discriminator 1 view .LVU1752 5316 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 -2132:Src/main.c **** { - 5317 .loc 1 2132 26 discriminator 1 view .LVU1753 +2133:Src/main.c **** { + 5317 .loc 1 2133 26 discriminator 1 view .LVU1753 5318 016c 002B cmp r3, #0 5319 016e 40F08180 bne .L213 5320 .L205: -2141:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 5321 .loc 1 2141 3 is_stmt 1 view .LVU1754 +2142:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 5321 .loc 1 2142 3 is_stmt 1 view .LVU1754 5322 0172 0022 movs r2, #0 5323 0174 0121 movs r1, #1 5324 0176 5B48 ldr r0, .L215+24 5325 0178 FFF7FEFF bl HAL_GPIO_WritePin 5326 .LVL421: -2142:Src/main.c **** } - 5327 .loc 1 2142 3 view .LVU1755 +2143:Src/main.c **** } + 5327 .loc 1 2143 3 view .LVU1755 5328 017c 0022 movs r2, #0 5329 017e 4FF40061 mov r1, #2048 5330 0182 5748 ldr r0, .L215+20 5331 0184 FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccO46DoU.s page 455 + + 5332 .LVL422: - ARM GAS /tmp/ccWQNJQt.s page 455 - - 5333 .L206: -2145:Src/main.c **** { - 5334 .loc 1 2145 2 view .LVU1756 -2145:Src/main.c **** { - 5335 .loc 1 2145 17 is_stmt 0 view .LVU1757 +2146:Src/main.c **** { + 5334 .loc 1 2146 2 view .LVU1756 +2146:Src/main.c **** { + 5335 .loc 1 2146 17 is_stmt 0 view .LVU1757 5336 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 -2145:Src/main.c **** { - 5337 .loc 1 2145 5 view .LVU1758 +2146:Src/main.c **** { + 5337 .loc 1 2146 5 view .LVU1758 5338 018a 1BB1 cbz r3, .L207 -2145:Src/main.c **** { - 5339 .loc 1 2145 39 discriminator 1 view .LVU1759 +2146:Src/main.c **** { + 5339 .loc 1 2146 39 discriminator 1 view .LVU1759 5340 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 -2145:Src/main.c **** { - 5341 .loc 1 2145 26 discriminator 1 view .LVU1760 +2146:Src/main.c **** { + 5341 .loc 1 2146 26 discriminator 1 view .LVU1760 5342 018e 002B cmp r3, #0 5343 0190 40F08680 bne .L214 5344 .L207: -2154:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 5345 .loc 1 2154 3 is_stmt 1 view .LVU1761 +2155:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 5345 .loc 1 2155 3 is_stmt 1 view .LVU1761 5346 0194 0022 movs r2, #0 5347 0196 0221 movs r1, #2 5348 0198 5248 ldr r0, .L215+24 5349 019a FFF7FEFF bl HAL_GPIO_WritePin 5350 .LVL423: -2155:Src/main.c **** } - 5351 .loc 1 2155 3 view .LVU1762 +2156:Src/main.c **** } + 5351 .loc 1 2156 3 view .LVU1762 5352 019e 0022 movs r2, #0 5353 01a0 2021 movs r1, #32 5354 01a2 4E48 ldr r0, .L215+16 5355 01a4 FFF7FEFF bl HAL_GPIO_WritePin 5356 .LVL424: 5357 .L208: -2158:Src/main.c **** { - 5358 .loc 1 2158 2 view .LVU1763 -2158:Src/main.c **** { - 5359 .loc 1 2158 16 is_stmt 0 view .LVU1764 +2159:Src/main.c **** { + 5358 .loc 1 2159 2 view .LVU1763 +2159:Src/main.c **** { + 5359 .loc 1 2159 16 is_stmt 0 view .LVU1764 5360 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 -2158:Src/main.c **** { - 5361 .loc 1 2158 5 view .LVU1765 +2159:Src/main.c **** { + 5361 .loc 1 2159 5 view .LVU1765 5362 01aa 1BB9 cbnz r3, .L209 -2160:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 5363 .loc 1 2160 3 is_stmt 1 view .LVU1766 -2160:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 5364 .loc 1 2160 31 is_stmt 0 view .LVU1767 +2161:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 5363 .loc 1 2161 3 is_stmt 1 view .LVU1766 +2161:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 5364 .loc 1 2161 31 is_stmt 0 view .LVU1767 5365 01ac 4E4B ldr r3, .L215+28 5366 01ae 7B60 str r3, [r7, #4] @ float -2161:Src/main.c **** } - 5367 .loc 1 2161 3 is_stmt 1 view .LVU1768 -2161:Src/main.c **** } - 5368 .loc 1 2161 31 is_stmt 0 view .LVU1769 +2162:Src/main.c **** } + 5367 .loc 1 2162 3 is_stmt 1 view .LVU1768 +2162:Src/main.c **** } + 5368 .loc 1 2162 31 is_stmt 0 view .LVU1769 5369 01b0 4E4B ldr r3, .L215+32 5370 01b2 BB60 str r3, [r7, #8] @ float 5371 .L209: -2164:Src/main.c **** { - 5372 .loc 1 2164 2 is_stmt 1 view .LVU1770 -2164:Src/main.c **** { - 5373 .loc 1 2164 16 is_stmt 0 view .LVU1771 - ARM GAS /tmp/ccWQNJQt.s page 456 +2165:Src/main.c **** { + 5372 .loc 1 2165 2 is_stmt 1 view .LVU1770 +2165:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 456 + 5373 .loc 1 2165 16 is_stmt 0 view .LVU1771 5374 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 -2164:Src/main.c **** { - 5375 .loc 1 2164 5 view .LVU1772 +2165:Src/main.c **** { + 5375 .loc 1 2165 5 view .LVU1772 5376 01b6 1BB9 cbnz r3, .L191 -2166:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 5377 .loc 1 2166 3 is_stmt 1 view .LVU1773 -2166:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 5378 .loc 1 2166 31 is_stmt 0 view .LVU1774 +2167:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 5377 .loc 1 2167 3 is_stmt 1 view .LVU1773 +2167:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 5378 .loc 1 2167 31 is_stmt 0 view .LVU1774 5379 01b8 4B4B ldr r3, .L215+28 5380 01ba 7360 str r3, [r6, #4] @ float -2167:Src/main.c **** } - 5381 .loc 1 2167 3 is_stmt 1 view .LVU1775 -2167:Src/main.c **** } - 5382 .loc 1 2167 31 is_stmt 0 view .LVU1776 +2168:Src/main.c **** } + 5381 .loc 1 2168 3 is_stmt 1 view .LVU1775 +2168:Src/main.c **** } + 5382 .loc 1 2168 31 is_stmt 0 view .LVU1776 5383 01bc 4B4B ldr r3, .L215+32 5384 01be B360 str r3, [r6, #8] @ float 5385 .L191: -2169:Src/main.c **** - 5386 .loc 1 2169 1 view .LVU1777 +2170:Src/main.c **** + 5386 .loc 1 2170 1 view .LVU1777 5387 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} 5388 .LVL425: 5389 .L212: -2020:Src/main.c **** { - 5390 .loc 1 2020 6 view .LVU1778 +2021:Src/main.c **** { + 5390 .loc 1 2021 6 view .LVU1778 5391 01c4 4FF48071 mov r1, #256 5392 01c8 4648 ldr r0, .L215+24 5393 01ca FFF7FEFF bl HAL_GPIO_ReadPin 5394 .LVL426: -2019:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5395 .loc 1 2019 78 discriminator 1 view .LVU1779 +2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5395 .loc 1 2020 78 discriminator 1 view .LVU1779 5396 01ce 0128 cmp r0, #1 5397 01d0 7FF426AF bne .L192 -2022:Src/main.c **** if (test == 0) //0 - suc - 5398 .loc 1 2022 3 is_stmt 1 view .LVU1780 -2022:Src/main.c **** if (test == 0) //0 - suc - 5399 .loc 1 2022 10 is_stmt 0 view .LVU1781 +2023:Src/main.c **** if (test == 0) //0 - suc + 5398 .loc 1 2023 3 is_stmt 1 view .LVU1780 +2023:Src/main.c **** if (test == 0) //0 - suc + 5399 .loc 1 2023 10 is_stmt 0 view .LVU1781 5400 01d4 4648 ldr r0, .L215+36 5401 01d6 FFF7FEFF bl Mount_SD 5402 .LVL427: -2022:Src/main.c **** if (test == 0) //0 - suc - 5403 .loc 1 2022 8 discriminator 1 view .LVU1782 +2023:Src/main.c **** if (test == 0) //0 - suc + 5403 .loc 1 2023 8 discriminator 1 view .LVU1782 5404 01da 3C4B ldr r3, .L215 5405 01dc 1860 str r0, [r3] -2023:Src/main.c **** { - 5406 .loc 1 2023 3 is_stmt 1 view .LVU1783 -2023:Src/main.c **** { - 5407 .loc 1 2023 6 is_stmt 0 view .LVU1784 +2024:Src/main.c **** { + 5406 .loc 1 2024 3 is_stmt 1 view .LVU1783 +2024:Src/main.c **** { + 5407 .loc 1 2024 6 is_stmt 0 view .LVU1784 5408 01de 0028 cmp r0, #0 5409 01e0 7FF41EAF bne .L192 -2026:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5410 .loc 1 2026 4 is_stmt 1 view .LVU1785 -2026:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5411 .loc 1 2026 11 is_stmt 0 view .LVU1786 +2027:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 5410 .loc 1 2027 4 is_stmt 1 view .LVU1785 +2027:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 5411 .loc 1 2027 11 is_stmt 0 view .LVU1786 5412 01e4 DFF80C91 ldr r9, .L215+40 5413 01e8 4846 mov r0, r9 5414 01ea FFF7FEFF bl Remove_File + ARM GAS /tmp/ccO46DoU.s page 457 + + 5415 .LVL428: - ARM GAS /tmp/ccWQNJQt.s page 457 - - -2026:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5416 .loc 1 2026 9 discriminator 1 view .LVU1787 +2027:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 5416 .loc 1 2027 9 discriminator 1 view .LVU1787 5417 01ee DFF8DC80 ldr r8, .L215 5418 01f2 C8F80000 str r0, [r8] -2027:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5419 .loc 1 2027 4 is_stmt 1 view .LVU1788 -2027:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5420 .loc 1 2027 11 is_stmt 0 view .LVU1789 +2028:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5419 .loc 1 2028 4 is_stmt 1 view .LVU1788 +2028:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5420 .loc 1 2028 11 is_stmt 0 view .LVU1789 5421 01f6 4846 mov r0, r9 5422 01f8 FFF7FEFF bl Create_File 5423 .LVL429: -2027:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5424 .loc 1 2027 9 discriminator 1 view .LVU1790 +2028:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5424 .loc 1 2028 9 discriminator 1 view .LVU1790 5425 01fc C8F80000 str r0, [r8] -2028:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5426 .loc 1 2028 4 is_stmt 1 view .LVU1791 -2028:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5427 .loc 1 2028 11 is_stmt 0 view .LVU1792 +2029:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5426 .loc 1 2029 4 is_stmt 1 view .LVU1791 +2029:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5427 .loc 1 2029 11 is_stmt 0 view .LVU1792 5428 0200 1E22 movs r2, #30 5429 0202 2946 mov r1, r5 5430 0204 4846 mov r0, r9 5431 0206 FFF7FEFF bl Write_File_byte 5432 .LVL430: -2028:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5433 .loc 1 2028 9 discriminator 1 view .LVU1793 +2029:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5433 .loc 1 2029 9 discriminator 1 view .LVU1793 5434 020a C8F80000 str r0, [r8] -2029:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5435 .loc 1 2029 4 is_stmt 1 view .LVU1794 -2029:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5436 .loc 1 2029 11 is_stmt 0 view .LVU1795 +2030:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5435 .loc 1 2030 4 is_stmt 1 view .LVU1794 +2030:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5436 .loc 1 2030 11 is_stmt 0 view .LVU1795 5437 020e 1E22 movs r2, #30 5438 0210 2946 mov r1, r5 5439 0212 4846 mov r0, r9 5440 0214 FFF7FEFF bl Update_File_byte 5441 .LVL431: -2029:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5442 .loc 1 2029 9 discriminator 1 view .LVU1796 +2030:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5442 .loc 1 2030 9 discriminator 1 view .LVU1796 5443 0218 C8F80000 str r0, [r8] -2030:Src/main.c **** } - 5444 .loc 1 2030 4 is_stmt 1 view .LVU1797 -2030:Src/main.c **** } - 5445 .loc 1 2030 11 is_stmt 0 view .LVU1798 +2031:Src/main.c **** } + 5444 .loc 1 2031 4 is_stmt 1 view .LVU1797 +2031:Src/main.c **** } + 5445 .loc 1 2031 11 is_stmt 0 view .LVU1798 5446 021c 3448 ldr r0, .L215+36 5447 021e FFF7FEFF bl Unmount_SD 5448 .LVL432: -2030:Src/main.c **** } - 5449 .loc 1 2030 9 discriminator 1 view .LVU1799 +2031:Src/main.c **** } + 5449 .loc 1 2031 9 discriminator 1 view .LVU1799 5450 0222 C8F80000 str r0, [r8] 5451 0226 FBE6 b .L192 5452 .LVL433: 5453 .L193: -2080:Src/main.c **** } - 5454 .loc 1 2080 3 is_stmt 1 view .LVU1800 +2081:Src/main.c **** } + 5454 .loc 1 2081 3 is_stmt 1 view .LVU1800 5455 0228 0022 movs r2, #0 5456 022a 0821 movs r1, #8 5457 022c 2B48 ldr r0, .L215+16 + ARM GAS /tmp/ccO46DoU.s page 458 + + 5458 022e FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccWQNJQt.s page 458 - - 5459 .LVL434: 5460 0232 69E7 b .L194 5461 .L195: -2089:Src/main.c **** } - 5462 .loc 1 2089 3 view .LVU1801 +2090:Src/main.c **** } + 5462 .loc 1 2090 3 view .LVU1801 5463 0234 0022 movs r2, #0 5464 0236 0421 movs r1, #4 5465 0238 2848 ldr r0, .L215+16 @@ -27433,8 +27434,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5467 .LVL435: 5468 023e 6CE7 b .L196 5469 .L197: -2099:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC - 5470 .loc 1 2099 3 view .LVU1802 +2100:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC + 5470 .loc 1 2100 3 view .LVU1802 5471 0240 0022 movs r2, #0 5472 0242 4FF48071 mov r1, #256 5473 0246 2248 ldr r0, .L215+4 @@ -27442,8 +27443,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5475 .LVL436: 5476 024c 6FE7 b .L198 5477 .L199: -2110:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC - 5478 .loc 1 2110 3 view .LVU1803 +2111:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC + 5478 .loc 1 2111 3 view .LVU1803 5479 024e 0022 movs r2, #0 5480 0250 1021 movs r1, #16 5481 0252 2248 ldr r0, .L215+16 @@ -27451,8 +27452,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5483 .LVL437: 5484 0258 72E7 b .L200 5485 .L201: -2120:Src/main.c **** } - 5486 .loc 1 2120 3 view .LVU1804 +2121:Src/main.c **** } + 5486 .loc 1 2121 3 view .LVU1804 5487 025a 0022 movs r2, #0 5488 025c 4FF48061 mov r1, #1024 5489 0260 1F48 ldr r0, .L215+20 @@ -27460,8 +27461,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5491 .LVL438: 5492 0266 75E7 b .L202 5493 .L203: -2129:Src/main.c **** } - 5494 .loc 1 2129 3 view .LVU1805 +2130:Src/main.c **** } + 5494 .loc 1 2130 3 view .LVU1805 5495 0268 0022 movs r2, #0 5496 026a 0821 movs r1, #8 5497 026c 1D48 ldr r0, .L215+24 @@ -27469,30 +27470,30 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5499 .LVL439: 5500 0272 78E7 b .L204 5501 .L213: -2134:Src/main.c **** Set_LTEC(3,32767); - 5502 .loc 1 2134 3 view .LVU1806 +2135:Src/main.c **** Set_LTEC(3,32767); + 5502 .loc 1 2135 3 view .LVU1806 5503 0274 47F6FF71 movw r1, #32767 5504 0278 0320 movs r0, #3 5505 027a FFF7FEFF bl Set_LTEC 5506 .LVL440: -2135:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); - 5507 .loc 1 2135 3 view .LVU1807 +2136:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); + 5507 .loc 1 2136 3 view .LVU1807 + ARM GAS /tmp/ccO46DoU.s page 459 + + 5508 027e 47F6FF71 movw r1, #32767 - ARM GAS /tmp/ccWQNJQt.s page 459 - - 5509 0282 0320 movs r0, #3 5510 0284 FFF7FEFF bl Set_LTEC 5511 .LVL441: -2136:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); - 5512 .loc 1 2136 3 view .LVU1808 +2137:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); + 5512 .loc 1 2137 3 view .LVU1808 5513 0288 0122 movs r2, #1 5514 028a 4FF40061 mov r1, #2048 5515 028e 1448 ldr r0, .L215+20 5516 0290 FFF7FEFF bl HAL_GPIO_WritePin 5517 .LVL442: -2137:Src/main.c **** } - 5518 .loc 1 2137 3 view .LVU1809 +2138:Src/main.c **** } + 5518 .loc 1 2138 3 view .LVU1809 5519 0294 0122 movs r2, #1 5520 0296 1146 mov r1, r2 5521 0298 1248 ldr r0, .L215+24 @@ -27500,27 +27501,27 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5523 .LVL443: 5524 029e 73E7 b .L206 5525 .L214: -2147:Src/main.c **** Set_LTEC(4,32767); - 5526 .loc 1 2147 3 view .LVU1810 +2148:Src/main.c **** Set_LTEC(4,32767); + 5526 .loc 1 2148 3 view .LVU1810 5527 02a0 47F6FF71 movw r1, #32767 5528 02a4 0420 movs r0, #4 5529 02a6 FFF7FEFF bl Set_LTEC 5530 .LVL444: -2148:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); - 5531 .loc 1 2148 3 view .LVU1811 +2149:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); + 5531 .loc 1 2149 3 view .LVU1811 5532 02aa 47F6FF71 movw r1, #32767 5533 02ae 0420 movs r0, #4 5534 02b0 FFF7FEFF bl Set_LTEC 5535 .LVL445: -2149:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); - 5536 .loc 1 2149 3 view .LVU1812 +2150:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); + 5536 .loc 1 2150 3 view .LVU1812 5537 02b4 0122 movs r2, #1 5538 02b6 2021 movs r1, #32 5539 02b8 0848 ldr r0, .L215+16 5540 02ba FFF7FEFF bl HAL_GPIO_WritePin 5541 .LVL446: -2150:Src/main.c **** } - 5542 .loc 1 2150 3 view .LVU1813 +2151:Src/main.c **** } + 5542 .loc 1 2151 3 view .LVU1813 5543 02be 0122 movs r2, #1 5544 02c0 0221 movs r1, #2 5545 02c2 0848 ldr r0, .L215+24 @@ -27537,10 +27538,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5556 02dc 00080240 .word 1073874944 5557 02e0 00040240 .word 1073873920 5558 02e4 00000240 .word 1073872896 + ARM GAS /tmp/ccO46DoU.s page 460 + + 5559 02e8 00002041 .word 1092616192 - ARM GAS /tmp/ccWQNJQt.s page 460 - - 5560 02ec 0AD7233C .word 1008981770 5561 02f0 00000000 .word .LC0 5562 02f4 04000000 .word .LC1 @@ -27555,213 +27556,213 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5573 Advanced_Controller_Temp: 5574 .LVL448: 5575 .LFB1214: -2467:Src/main.c **** // Main idea: - 5576 .loc 1 2467 1 view -0 +2468:Src/main.c **** // Main idea: + 5576 .loc 1 2468 1 view -0 5577 .cfi_startproc 5578 @ args = 0, pretend = 0, frame = 0 5579 @ frame_needed = 0, uses_anonymous_args = 0 5580 @ link register save eliminated. -2467:Src/main.c **** // Main idea: - 5581 .loc 1 2467 1 is_stmt 0 view .LVU1815 +2468:Src/main.c **** // Main idea: + 5581 .loc 1 2468 1 is_stmt 0 view .LVU1815 5582 0000 30B4 push {r4, r5} 5583 .LCFI43: 5584 .cfi_def_cfa_offset 8 5585 .cfi_offset 4, -8 5586 .cfi_offset 5, -4 -2485:Src/main.c **** float P_coef_current;//, I_coef_current; - 5587 .loc 1 2485 2 is_stmt 1 view .LVU1816 -2486:Src/main.c **** float e_integral; - 5588 .loc 1 2486 2 view .LVU1817 -2487:Src/main.c **** int x_output; - 5589 .loc 1 2487 2 view .LVU1818 -2488:Src/main.c **** - 5590 .loc 1 2488 2 view .LVU1819 -2490:Src/main.c **** - 5591 .loc 1 2490 2 view .LVU1820 -2490:Src/main.c **** - 5592 .loc 1 2490 28 is_stmt 0 view .LVU1821 +2486:Src/main.c **** float P_coef_current;//, I_coef_current; + 5587 .loc 1 2486 2 is_stmt 1 view .LVU1816 +2487:Src/main.c **** float e_integral; + 5588 .loc 1 2487 2 view .LVU1817 +2488:Src/main.c **** int x_output; + 5589 .loc 1 2488 2 view .LVU1818 +2489:Src/main.c **** + 5590 .loc 1 2489 2 view .LVU1819 +2491:Src/main.c **** + 5591 .loc 1 2491 2 view .LVU1820 +2491:Src/main.c **** + 5592 .loc 1 2491 28 is_stmt 0 view .LVU1821 5593 0002 0B88 ldrh r3, [r1] -2490:Src/main.c **** - 5594 .loc 1 2490 65 view .LVU1822 +2491:Src/main.c **** + 5594 .loc 1 2491 65 view .LVU1822 5595 0004 0488 ldrh r4, [r0] -2490:Src/main.c **** - 5596 .loc 1 2490 8 view .LVU1823 +2491:Src/main.c **** + 5596 .loc 1 2491 8 view .LVU1823 5597 0006 1B1B subs r3, r3, r4 5598 .LVL449: -2492:Src/main.c **** - 5599 .loc 1 2492 2 is_stmt 1 view .LVU1824 -2492:Src/main.c **** - 5600 .loc 1 2492 13 is_stmt 0 view .LVU1825 +2493:Src/main.c **** + 5599 .loc 1 2493 2 is_stmt 1 view .LVU1824 +2493:Src/main.c **** + 5600 .loc 1 2493 13 is_stmt 0 view .LVU1825 5601 0008 D1ED017A vldr.32 s15, [r1, #4] 5602 .LVL450: -2494:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5603 .loc 1 2494 2 is_stmt 1 view .LVU1826 -2494:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5604 .loc 1 2494 20 is_stmt 0 view .LVU1827 - ARM GAS /tmp/ccWQNJQt.s page 461 +2495:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 5603 .loc 1 2495 2 is_stmt 1 view .LVU1826 +2495:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + ARM GAS /tmp/ccO46DoU.s page 461 + 5604 .loc 1 2495 20 is_stmt 0 view .LVU1827 5605 000c 03F6B73C addw ip, r3, #2999 -2494:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5606 .loc 1 2494 4 view .LVU1828 +2495:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 5606 .loc 1 2495 4 view .LVU1828 5607 0010 41F26E74 movw r4, #5998 5608 0014 A445 cmp ip, r4 5609 0016 18D8 bhi .L218 -2495:Src/main.c **** } - 5610 .loc 1 2495 3 is_stmt 1 view .LVU1829 -2495:Src/main.c **** } - 5611 .loc 1 2495 31 is_stmt 0 view .LVU1830 +2496:Src/main.c **** } + 5610 .loc 1 2496 3 is_stmt 1 view .LVU1829 +2496:Src/main.c **** } + 5611 .loc 1 2496 31 is_stmt 0 view .LVU1830 5612 0018 90ED027A vldr.32 s14, [r0, #8] -2495:Src/main.c **** } - 5613 .loc 1 2495 47 view .LVU1831 +2496:Src/main.c **** } + 5613 .loc 1 2496 47 view .LVU1831 5614 001c 06EE903A vmov s13, r3 @ int 5615 0020 F8EEE66A vcvt.f32.s32 s13, s13 -2495:Src/main.c **** } - 5616 .loc 1 2495 45 view .LVU1832 +2496:Src/main.c **** } + 5616 .loc 1 2496 45 view .LVU1832 5617 0024 27EE267A vmul.f32 s14, s14, s13 -2495:Src/main.c **** } - 5618 .loc 1 2495 76 view .LVU1833 +2496:Src/main.c **** } + 5618 .loc 1 2496 76 view .LVU1833 5619 0028 284C ldr r4, .L228 5620 002a 2468 ldr r4, [r4] 5621 002c 284D ldr r5, .L228+4 5622 002e 2D68 ldr r5, [r5] 5623 0030 641B subs r4, r4, r5 -2495:Src/main.c **** } - 5624 .loc 1 2495 64 view .LVU1834 +2496:Src/main.c **** } + 5624 .loc 1 2496 64 view .LVU1834 5625 0032 06EE904A vmov s13, r4 @ int 5626 0036 F8EE666A vcvt.f32.u32 s13, s13 -2495:Src/main.c **** } - 5627 .loc 1 2495 62 view .LVU1835 +2496:Src/main.c **** } + 5627 .loc 1 2496 62 view .LVU1835 5628 003a 27EE267A vmul.f32 s14, s14, s13 -2495:Src/main.c **** } - 5629 .loc 1 2495 87 view .LVU1836 +2496:Src/main.c **** } + 5629 .loc 1 2496 87 view .LVU1836 5630 003e 9FED256A vldr.32 s12, .L228+8 5631 0042 C7EE066A vdiv.f32 s13, s14, s12 -2495:Src/main.c **** } - 5632 .loc 1 2495 14 view .LVU1837 +2496:Src/main.c **** } + 5632 .loc 1 2496 14 view .LVU1837 5633 0046 77EEA67A vadd.f32 s15, s15, s13 5634 .LVL451: 5635 .L218: -2497:Src/main.c **** - 5636 .loc 1 2497 2 is_stmt 1 view .LVU1838 -2497:Src/main.c **** - 5637 .loc 1 2497 17 is_stmt 0 view .LVU1839 +2498:Src/main.c **** + 5636 .loc 1 2498 2 is_stmt 1 view .LVU1838 +2498:Src/main.c **** + 5637 .loc 1 2498 17 is_stmt 0 view .LVU1839 5638 004a D0ED016A vldr.32 s13, [r0, #4] 5639 .LVL452: -2499:Src/main.c **** e_integral = 32000; - 5640 .loc 1 2499 2 is_stmt 1 view .LVU1840 -2499:Src/main.c **** e_integral = 32000; - 5641 .loc 1 2499 5 is_stmt 0 view .LVU1841 +2500:Src/main.c **** e_integral = 32000; + 5640 .loc 1 2500 2 is_stmt 1 view .LVU1840 +2500:Src/main.c **** e_integral = 32000; + 5641 .loc 1 2500 5 is_stmt 0 view .LVU1841 5642 004e 9FED227A vldr.32 s14, .L228+12 5643 0052 F4EEC77A vcmpe.f32 s15, s14 5644 0056 F1EE10FA vmrs APSR_nzcv, FPSCR 5645 005a 09DC bgt .L222 -2502:Src/main.c **** e_integral = -32000; - 5646 .loc 1 2502 7 is_stmt 1 view .LVU1842 - ARM GAS /tmp/ccWQNJQt.s page 462 +2503:Src/main.c **** e_integral = -32000; + ARM GAS /tmp/ccO46DoU.s page 462 -2502:Src/main.c **** e_integral = -32000; - 5647 .loc 1 2502 10 is_stmt 0 view .LVU1843 + 5646 .loc 1 2503 7 is_stmt 1 view .LVU1842 +2503:Src/main.c **** e_integral = -32000; + 5647 .loc 1 2503 10 is_stmt 0 view .LVU1843 5648 005c 9FED1F7A vldr.32 s14, .L228+16 5649 0060 F4EEC77A vcmpe.f32 s15, s14 5650 0064 F1EE10FA vmrs APSR_nzcv, FPSCR 5651 0068 04D5 bpl .L219 -2503:Src/main.c **** } - 5652 .loc 1 2503 15 view .LVU1844 +2504:Src/main.c **** } + 5652 .loc 1 2504 15 view .LVU1844 5653 006a DFED1C7A vldr.32 s15, .L228+16 5654 .LVL453: -2503:Src/main.c **** } - 5655 .loc 1 2503 15 view .LVU1845 +2504:Src/main.c **** } + 5655 .loc 1 2504 15 view .LVU1845 5656 006e 01E0 b .L219 5657 .LVL454: 5658 .L222: -2500:Src/main.c **** } - 5659 .loc 1 2500 15 view .LVU1846 +2501:Src/main.c **** } + 5659 .loc 1 2501 15 view .LVU1846 5660 0070 DFED197A vldr.32 s15, .L228+12 5661 .LVL455: 5662 .L219: -2505:Src/main.c **** - 5663 .loc 1 2505 2 is_stmt 1 view .LVU1847 -2505:Src/main.c **** - 5664 .loc 1 2505 26 is_stmt 0 view .LVU1848 +2506:Src/main.c **** + 5663 .loc 1 2506 2 is_stmt 1 view .LVU1847 +2506:Src/main.c **** + 5664 .loc 1 2506 26 is_stmt 0 view .LVU1848 5665 0074 C1ED017A vstr.32 s15, [r1, #4] -2507:Src/main.c **** - 5666 .loc 1 2507 2 is_stmt 1 view .LVU1849 -2507:Src/main.c **** - 5667 .loc 1 2507 36 is_stmt 0 view .LVU1850 +2508:Src/main.c **** + 5666 .loc 1 2508 2 is_stmt 1 view .LVU1849 +2508:Src/main.c **** + 5667 .loc 1 2508 36 is_stmt 0 view .LVU1850 5668 0078 07EE103A vmov s14, r3 @ int 5669 007c B8EEC77A vcvt.f32.s32 s14, s14 5670 0080 27EE267A vmul.f32 s14, s14, s13 -2507:Src/main.c **** - 5671 .loc 1 2507 19 view .LVU1851 +2508:Src/main.c **** + 5671 .loc 1 2508 19 view .LVU1851 5672 0084 DFED166A vldr.32 s13, .L228+20 5673 .LVL456: -2507:Src/main.c **** - 5674 .loc 1 2507 19 view .LVU1852 +2508:Src/main.c **** + 5674 .loc 1 2508 19 view .LVU1852 5675 0088 37EE267A vadd.f32 s14, s14, s13 -2507:Src/main.c **** - 5676 .loc 1 2507 46 view .LVU1853 +2508:Src/main.c **** + 5676 .loc 1 2508 46 view .LVU1853 5677 008c FDEEE77A vcvt.s32.f32 s15, s15 5678 .LVL457: -2507:Src/main.c **** - 5679 .loc 1 2507 44 view .LVU1854 +2508:Src/main.c **** + 5679 .loc 1 2508 44 view .LVU1854 5680 0090 F8EEE77A vcvt.f32.s32 s15, s15 5681 0094 77EE877A vadd.f32 s15, s15, s14 -2507:Src/main.c **** - 5682 .loc 1 2507 11 view .LVU1855 +2508:Src/main.c **** + 5682 .loc 1 2508 11 view .LVU1855 5683 0098 FDEEE77A vcvt.s32.f32 s15, s15 5684 009c 17EE900A vmov r0, s15 @ int 5685 .LVL458: -2509:Src/main.c **** x_output = 8800; - 5686 .loc 1 2509 2 is_stmt 1 view .LVU1856 -2509:Src/main.c **** x_output = 8800; - 5687 .loc 1 2509 4 is_stmt 0 view .LVU1857 +2510:Src/main.c **** x_output = 8800; + 5686 .loc 1 2510 2 is_stmt 1 view .LVU1856 +2510:Src/main.c **** x_output = 8800; + 5687 .loc 1 2510 4 is_stmt 0 view .LVU1857 + ARM GAS /tmp/ccO46DoU.s page 463 + + 5688 00a0 B0F57A7F cmp r0, #1000 - ARM GAS /tmp/ccWQNJQt.s page 463 - - 5689 00a4 06DB blt .L224 -2512:Src/main.c **** x_output = 56800; - 5690 .loc 1 2512 7 is_stmt 1 view .LVU1858 -2512:Src/main.c **** x_output = 56800; - 5691 .loc 1 2512 9 is_stmt 0 view .LVU1859 +2513:Src/main.c **** x_output = 56800; + 5690 .loc 1 2513 7 is_stmt 1 view .LVU1858 +2513:Src/main.c **** x_output = 56800; + 5691 .loc 1 2513 9 is_stmt 0 view .LVU1859 5692 00a6 4DF6E053 movw r3, #56800 5693 .LVL459: -2512:Src/main.c **** x_output = 56800; - 5694 .loc 1 2512 9 view .LVU1860 +2513:Src/main.c **** x_output = 56800; + 5694 .loc 1 2513 9 view .LVU1860 5695 00aa 9842 cmp r0, r3 5696 00ac 04DD ble .L220 -2513:Src/main.c **** } - 5697 .loc 1 2513 12 view .LVU1861 +2514:Src/main.c **** } + 5697 .loc 1 2514 12 view .LVU1861 5698 00ae 4DF6E050 movw r0, #56800 5699 .LVL460: -2513:Src/main.c **** } - 5700 .loc 1 2513 12 view .LVU1862 +2514:Src/main.c **** } + 5700 .loc 1 2514 12 view .LVU1862 5701 00b2 01E0 b .L220 5702 .LVL461: 5703 .L224: -2510:Src/main.c **** } - 5704 .loc 1 2510 12 view .LVU1863 +2511:Src/main.c **** } + 5704 .loc 1 2511 12 view .LVU1863 5705 00b4 42F26020 movw r0, #8800 5706 .LVL462: 5707 .L220: -2516:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 5708 .loc 1 2516 2 is_stmt 1 view .LVU1864 -2516:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 5709 .loc 1 2516 5 is_stmt 0 view .LVU1865 +2517:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 5708 .loc 1 2517 2 is_stmt 1 view .LVU1864 +2517:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 5709 .loc 1 2517 5 is_stmt 0 view .LVU1865 5710 00b8 022A cmp r2, #2 5711 00ba 02D0 beq .L227 5712 .LVL463: 5713 .L221: -2519:Src/main.c **** } - 5714 .loc 1 2519 2 is_stmt 1 view .LVU1866 -2520:Src/main.c **** - 5715 .loc 1 2520 1 is_stmt 0 view .LVU1867 +2520:Src/main.c **** } + 5714 .loc 1 2520 2 is_stmt 1 view .LVU1866 +2521:Src/main.c **** + 5715 .loc 1 2521 1 is_stmt 0 view .LVU1867 5716 00bc 80B2 uxth r0, r0 5717 .LVL464: -2520:Src/main.c **** - 5718 .loc 1 2520 1 view .LVU1868 +2521:Src/main.c **** + 5718 .loc 1 2521 1 view .LVU1868 5719 00be 30BC pop {r4, r5} 5720 .LCFI44: 5721 .cfi_remember_state @@ -27773,18 +27774,18 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5727 .L227: 5728 .LCFI45: 5729 .cfi_restore_state -2517:Src/main.c **** - 5730 .loc 1 2517 3 is_stmt 1 view .LVU1869 -2517:Src/main.c **** - 5731 .loc 1 2517 11 is_stmt 0 view .LVU1870 +2518:Src/main.c **** + 5730 .loc 1 2518 3 is_stmt 1 view .LVU1869 +2518:Src/main.c **** + 5731 .loc 1 2518 11 is_stmt 0 view .LVU1870 + ARM GAS /tmp/ccO46DoU.s page 464 + + 5732 00c2 024B ldr r3, .L228 - ARM GAS /tmp/ccWQNJQt.s page 464 - - 5733 00c4 1A68 ldr r2, [r3] 5734 .LVL466: -2517:Src/main.c **** - 5735 .loc 1 2517 11 view .LVU1871 +2518:Src/main.c **** + 5735 .loc 1 2518 11 view .LVU1871 5736 00c6 024B ldr r3, .L228+4 5737 00c8 1A60 str r2, [r3] 5738 00ca F7E7 b .L221 @@ -27808,62 +27809,62 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5758 CalculateChecksum: 5759 .LVL467: 5760 .LFB1217: -2583:Src/main.c **** short i; - 5761 .loc 1 2583 1 is_stmt 1 view -0 +2584:Src/main.c **** short i; + 5761 .loc 1 2584 1 is_stmt 1 view -0 5762 .cfi_startproc 5763 @ args = 0, pretend = 0, frame = 0 5764 @ frame_needed = 0, uses_anonymous_args = 0 5765 @ link register save eliminated. -2583:Src/main.c **** short i; - 5766 .loc 1 2583 1 is_stmt 0 view .LVU1873 +2584:Src/main.c **** short i; + 5766 .loc 1 2584 1 is_stmt 0 view .LVU1873 5767 0000 8446 mov ip, r0 -2584:Src/main.c **** uint16_t cs = *pbuff; - 5768 .loc 1 2584 2 is_stmt 1 view .LVU1874 -2585:Src/main.c **** - 5769 .loc 1 2585 2 view .LVU1875 -2585:Src/main.c **** - 5770 .loc 1 2585 11 is_stmt 0 view .LVU1876 +2585:Src/main.c **** uint16_t cs = *pbuff; + 5768 .loc 1 2585 2 is_stmt 1 view .LVU1874 +2586:Src/main.c **** + 5769 .loc 1 2586 2 view .LVU1875 +2586:Src/main.c **** + 5770 .loc 1 2586 11 is_stmt 0 view .LVU1876 5771 0002 0088 ldrh r0, [r0] 5772 .LVL468: -2587:Src/main.c **** { - 5773 .loc 1 2587 3 is_stmt 1 view .LVU1877 -2587:Src/main.c **** { - 5774 .loc 1 2587 9 is_stmt 0 view .LVU1878 +2588:Src/main.c **** { + 5773 .loc 1 2588 3 is_stmt 1 view .LVU1877 +2588:Src/main.c **** { + 5774 .loc 1 2588 9 is_stmt 0 view .LVU1878 5775 0004 0123 movs r3, #1 -2587:Src/main.c **** { - 5776 .loc 1 2587 3 view .LVU1879 +2588:Src/main.c **** { + 5776 .loc 1 2588 3 view .LVU1879 5777 0006 04E0 b .L231 5778 .LVL469: 5779 .L232: -2589:Src/main.c **** } - 5780 .loc 1 2589 3 is_stmt 1 view .LVU1880 -2589:Src/main.c **** } - ARM GAS /tmp/ccWQNJQt.s page 465 +2590:Src/main.c **** } + 5780 .loc 1 2590 3 is_stmt 1 view .LVU1880 + ARM GAS /tmp/ccO46DoU.s page 465 - 5781 .loc 1 2589 9 is_stmt 0 view .LVU1881 +2590:Src/main.c **** } + 5781 .loc 1 2590 9 is_stmt 0 view .LVU1881 5782 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] -2589:Src/main.c **** } - 5783 .loc 1 2589 6 view .LVU1882 +2590:Src/main.c **** } + 5783 .loc 1 2590 6 view .LVU1882 5784 000c 5040 eors r0, r0, r2 5785 .LVL470: -2587:Src/main.c **** { - 5786 .loc 1 2587 24 is_stmt 1 discriminator 3 view .LVU1883 +2588:Src/main.c **** { + 5786 .loc 1 2588 24 is_stmt 1 discriminator 3 view .LVU1883 5787 000e 0133 adds r3, r3, #1 5788 .LVL471: -2587:Src/main.c **** { - 5789 .loc 1 2587 24 is_stmt 0 discriminator 3 view .LVU1884 +2588:Src/main.c **** { + 5789 .loc 1 2588 24 is_stmt 0 discriminator 3 view .LVU1884 5790 0010 1BB2 sxth r3, r3 5791 .LVL472: 5792 .L231: -2587:Src/main.c **** { - 5793 .loc 1 2587 16 is_stmt 1 discriminator 1 view .LVU1885 +2588:Src/main.c **** { + 5793 .loc 1 2588 16 is_stmt 1 discriminator 1 view .LVU1885 5794 0012 8B42 cmp r3, r1 5795 0014 F8DB blt .L232 -2591:Src/main.c **** } - 5796 .loc 1 2591 2 view .LVU1886 -2592:Src/main.c **** - 5797 .loc 1 2592 1 is_stmt 0 view .LVU1887 +2592:Src/main.c **** } + 5796 .loc 1 2592 2 view .LVU1886 +2593:Src/main.c **** + 5797 .loc 1 2593 1 is_stmt 0 view .LVU1887 5798 0016 7047 bx lr 5799 .cfi_endproc 5800 .LFE1217: @@ -27876,79 +27877,79 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5809 CheckChecksum: 5810 .LVL473: 5811 .LFB1216: -2562:Src/main.c **** uint16_t cl_ind; - 5812 .loc 1 2562 1 is_stmt 1 view -0 +2563:Src/main.c **** uint16_t cl_ind; + 5812 .loc 1 2563 1 is_stmt 1 view -0 5813 .cfi_startproc 5814 @ args = 0, pretend = 0, frame = 0 5815 @ frame_needed = 0, uses_anonymous_args = 0 -2562:Src/main.c **** uint16_t cl_ind; - 5816 .loc 1 2562 1 is_stmt 0 view .LVU1889 +2563:Src/main.c **** uint16_t cl_ind; + 5816 .loc 1 2563 1 is_stmt 0 view .LVU1889 5817 0000 10B5 push {r4, lr} 5818 .LCFI46: 5819 .cfi_def_cfa_offset 8 5820 .cfi_offset 4, -8 5821 .cfi_offset 14, -4 -2563:Src/main.c **** - 5822 .loc 1 2563 3 is_stmt 1 view .LVU1890 -2565:Src/main.c **** { - 5823 .loc 1 2565 3 view .LVU1891 +2564:Src/main.c **** + 5822 .loc 1 2564 3 is_stmt 1 view .LVU1890 +2566:Src/main.c **** { + 5823 .loc 1 2566 3 view .LVU1891 5824 0002 0E4B ldr r3, .L239 5825 0004 1B88 ldrh r3, [r3] 5826 0006 41F21112 movw r2, #4369 5827 000a 9342 cmp r3, r2 5828 000c 05D0 beq .L236 + ARM GAS /tmp/ccO46DoU.s page 466 + + 5829 000e 47F27772 movw r2, #30583 - ARM GAS /tmp/ccWQNJQt.s page 466 - - 5830 0012 9342 cmp r3, r2 5831 0014 0FD1 bne .L237 5832 0016 0E24 movs r4, #14 5833 0018 00E0 b .L234 5834 .L236: -2571:Src/main.c **** break; - 5835 .loc 1 2571 14 is_stmt 0 view .LVU1892 +2572:Src/main.c **** break; + 5835 .loc 1 2572 14 is_stmt 0 view .LVU1892 5836 001a 0D24 movs r4, #13 5837 .L234: 5838 .LVL474: -2575:Src/main.c **** } - 5839 .loc 1 2575 5 is_stmt 1 view .LVU1893 -2578:Src/main.c **** - 5840 .loc 1 2578 3 view .LVU1894 -2578:Src/main.c **** - 5841 .loc 1 2578 15 is_stmt 0 view .LVU1895 +2576:Src/main.c **** } + 5839 .loc 1 2576 5 is_stmt 1 view .LVU1893 +2579:Src/main.c **** + 5840 .loc 1 2579 3 view .LVU1894 +2579:Src/main.c **** + 5841 .loc 1 2579 15 is_stmt 0 view .LVU1895 5842 001c 2146 mov r1, r4 5843 001e FFF7FEFF bl CalculateChecksum 5844 .LVL475: -2578:Src/main.c **** - 5845 .loc 1 2578 13 discriminator 1 view .LVU1896 +2579:Src/main.c **** + 5845 .loc 1 2579 13 discriminator 1 view .LVU1896 5846 0022 074B ldr r3, .L239+4 5847 0024 1880 strh r0, [r3] @ movhi -2580:Src/main.c **** } - 5848 .loc 1 2580 3 is_stmt 1 view .LVU1897 -2580:Src/main.c **** } - 5849 .loc 1 2580 32 is_stmt 0 view .LVU1898 +2581:Src/main.c **** } + 5848 .loc 1 2581 3 is_stmt 1 view .LVU1897 +2581:Src/main.c **** } + 5849 .loc 1 2581 32 is_stmt 0 view .LVU1898 5850 0026 074B ldr r3, .L239+8 5851 0028 33F81430 ldrh r3, [r3, r4, lsl #1] -2580:Src/main.c **** } - 5852 .loc 1 2580 46 view .LVU1899 +2581:Src/main.c **** } + 5852 .loc 1 2581 46 view .LVU1899 5853 002c 9842 cmp r0, r3 5854 002e 14BF ite ne 5855 0030 0020 movne r0, #0 5856 0032 0120 moveq r0, #1 5857 .LVL476: 5858 .L235: -2581:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) - 5859 .loc 1 2581 1 view .LVU1900 +2582:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) + 5859 .loc 1 2582 1 view .LVU1900 5860 0034 10BD pop {r4, pc} 5861 .LVL477: 5862 .L237: -2565:Src/main.c **** { - 5863 .loc 1 2565 3 view .LVU1901 +2566:Src/main.c **** { + 5863 .loc 1 2566 3 view .LVU1901 5864 0036 0020 movs r0, #0 5865 .LVL478: -2565:Src/main.c **** { - 5866 .loc 1 2565 3 view .LVU1902 +2566:Src/main.c **** { + 5866 .loc 1 2566 3 view .LVU1902 5867 0038 FCE7 b .L235 5868 .L240: 5869 003a 00BF .align 2 @@ -27957,10 +27958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5872 0040 00000000 .word CS_result 5873 0044 00000000 .word COMMAND 5874 .cfi_endproc + ARM GAS /tmp/ccO46DoU.s page 467 + + 5875 .LFE1216: - ARM GAS /tmp/ccWQNJQt.s page 467 - - 5877 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 5878 .align 2 5879 .LC2: @@ -27976,93 +27977,93 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5888 SD_SAVE: 5889 .LVL479: 5890 .LFB1218: -2621:Src/main.c **** int test=0; - 5891 .loc 1 2621 1 is_stmt 1 view -0 +2622:Src/main.c **** int test=0; + 5891 .loc 1 2622 1 is_stmt 1 view -0 5892 .cfi_startproc 5893 @ args = 0, pretend = 0, frame = 0 5894 @ frame_needed = 0, uses_anonymous_args = 0 -2621:Src/main.c **** int test=0; - 5895 .loc 1 2621 1 is_stmt 0 view .LVU1904 +2622:Src/main.c **** int test=0; + 5895 .loc 1 2622 1 is_stmt 0 view .LVU1904 5896 0000 10B5 push {r4, lr} 5897 .LCFI47: 5898 .cfi_def_cfa_offset 8 5899 .cfi_offset 4, -8 5900 .cfi_offset 14, -4 5901 0002 0446 mov r4, r0 -2622:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 5902 .loc 1 2622 2 is_stmt 1 view .LVU1905 +2623:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 5902 .loc 1 2623 2 is_stmt 1 view .LVU1905 5903 .LVL480: -2623:Src/main.c **** { - 5904 .loc 1 2623 2 view .LVU1906 -2623:Src/main.c **** { - 5905 .loc 1 2623 6 is_stmt 0 view .LVU1907 +2624:Src/main.c **** { + 5904 .loc 1 2624 2 view .LVU1906 +2624:Src/main.c **** { + 5905 .loc 1 2624 6 is_stmt 0 view .LVU1907 5906 0004 0121 movs r1, #1 5907 0006 0A48 ldr r0, .L248 5908 .LVL481: -2623:Src/main.c **** { - 5909 .loc 1 2623 6 view .LVU1908 +2624:Src/main.c **** { + 5909 .loc 1 2624 6 view .LVU1908 5910 0008 FFF7FEFF bl HAL_GPIO_ReadPin 5911 .LVL482: -2623:Src/main.c **** { - 5912 .loc 1 2623 5 discriminator 1 view .LVU1909 +2624:Src/main.c **** { + 5912 .loc 1 2624 5 discriminator 1 view .LVU1909 5913 000c 08B1 cbz r0, .L246 -2640:Src/main.c **** } - 5914 .loc 1 2640 10 view .LVU1910 +2641:Src/main.c **** } + 5914 .loc 1 2641 10 view .LVU1910 5915 000e 0120 movs r0, #1 5916 .LVL483: 5917 .L241: -2642:Src/main.c **** - 5918 .loc 1 2642 1 view .LVU1911 +2643:Src/main.c **** + 5918 .loc 1 2643 1 view .LVU1911 5919 0010 10BD pop {r4, pc} 5920 .LVL484: 5921 .L246: -2625:Src/main.c **** if (test == 0) //0 - suc - 5922 .loc 1 2625 3 is_stmt 1 view .LVU1912 - ARM GAS /tmp/ccWQNJQt.s page 468 +2626:Src/main.c **** if (test == 0) //0 - suc + ARM GAS /tmp/ccO46DoU.s page 468 -2625:Src/main.c **** if (test == 0) //0 - suc - 5923 .loc 1 2625 10 is_stmt 0 view .LVU1913 + 5922 .loc 1 2626 3 is_stmt 1 view .LVU1912 +2626:Src/main.c **** if (test == 0) //0 - suc + 5923 .loc 1 2626 10 is_stmt 0 view .LVU1913 5924 0012 0848 ldr r0, .L248+4 5925 0014 FFF7FEFF bl Mount_SD 5926 .LVL485: -2626:Src/main.c **** { - 5927 .loc 1 2626 3 is_stmt 1 view .LVU1914 -2626:Src/main.c **** { - 5928 .loc 1 2626 6 is_stmt 0 view .LVU1915 +2627:Src/main.c **** { + 5927 .loc 1 2627 3 is_stmt 1 view .LVU1914 +2627:Src/main.c **** { + 5928 .loc 1 2627 6 is_stmt 0 view .LVU1915 5929 0018 08B1 cbz r0, .L247 -2635:Src/main.c **** } - 5930 .loc 1 2635 11 view .LVU1916 +2636:Src/main.c **** } + 5930 .loc 1 2636 11 view .LVU1916 5931 001a 0120 movs r0, #1 5932 .LVL486: -2635:Src/main.c **** } - 5933 .loc 1 2635 11 view .LVU1917 +2636:Src/main.c **** } + 5933 .loc 1 2636 11 view .LVU1917 5934 001c F8E7 b .L241 5935 .LVL487: 5936 .L247: -2629:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5937 .loc 1 2629 4 is_stmt 1 view .LVU1918 -2629:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5938 .loc 1 2629 11 is_stmt 0 view .LVU1919 +2630:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5937 .loc 1 2630 4 is_stmt 1 view .LVU1918 +2630:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5938 .loc 1 2630 11 is_stmt 0 view .LVU1919 5939 001e 1E22 movs r2, #30 5940 0020 2146 mov r1, r4 5941 0022 0548 ldr r0, .L248+8 5942 .LVL488: -2629:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5943 .loc 1 2629 11 view .LVU1920 +2630:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5943 .loc 1 2630 11 view .LVU1920 5944 0024 FFF7FEFF bl Update_File_byte 5945 .LVL489: -2630:Src/main.c **** return test; - 5946 .loc 1 2630 4 is_stmt 1 view .LVU1921 -2630:Src/main.c **** return test; - 5947 .loc 1 2630 11 is_stmt 0 view .LVU1922 +2631:Src/main.c **** return test; + 5946 .loc 1 2631 4 is_stmt 1 view .LVU1921 +2631:Src/main.c **** return test; + 5947 .loc 1 2631 11 is_stmt 0 view .LVU1922 5948 0028 0248 ldr r0, .L248+4 5949 002a FFF7FEFF bl Unmount_SD 5950 .LVL490: -2631:Src/main.c **** } - 5951 .loc 1 2631 4 is_stmt 1 view .LVU1923 -2631:Src/main.c **** } - 5952 .loc 1 2631 11 is_stmt 0 view .LVU1924 +2632:Src/main.c **** } + 5951 .loc 1 2632 4 is_stmt 1 view .LVU1923 +2632:Src/main.c **** } + 5952 .loc 1 2632 11 is_stmt 0 view .LVU1924 5953 002e EFE7 b .L241 5954 .L249: 5955 .align 2 @@ -28077,20 +28078,20 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5965 .global SD_READ 5966 .syntax unified 5967 .thumb + ARM GAS /tmp/ccO46DoU.s page 469 + + 5968 .thumb_func - ARM GAS /tmp/ccWQNJQt.s page 469 - - 5970 SD_READ: 5971 .LVL491: 5972 .LFB1219: -2652:Src/main.c **** int test=0; - 5973 .loc 1 2652 1 is_stmt 1 view -0 +2653:Src/main.c **** int test=0; + 5973 .loc 1 2653 1 is_stmt 1 view -0 5974 .cfi_startproc 5975 @ args = 0, pretend = 0, frame = 0 5976 @ frame_needed = 0, uses_anonymous_args = 0 -2652:Src/main.c **** int test=0; - 5977 .loc 1 2652 1 is_stmt 0 view .LVU1926 +2653:Src/main.c **** int test=0; + 5977 .loc 1 2653 1 is_stmt 0 view .LVU1926 5978 0000 38B5 push {r3, r4, r5, lr} 5979 .LCFI48: 5980 .cfi_def_cfa_offset 16 @@ -28099,89 +28100,89 @@ ARM GAS /tmp/ccWQNJQt.s page 1 5983 .cfi_offset 5, -8 5984 .cfi_offset 14, -4 5985 0002 0446 mov r4, r0 -2653:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 5986 .loc 1 2653 2 is_stmt 1 view .LVU1927 +2654:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 5986 .loc 1 2654 2 is_stmt 1 view .LVU1927 5987 .LVL492: -2654:Src/main.c **** { - 5988 .loc 1 2654 2 view .LVU1928 -2654:Src/main.c **** { - 5989 .loc 1 2654 6 is_stmt 0 view .LVU1929 +2655:Src/main.c **** { + 5988 .loc 1 2655 2 view .LVU1928 +2655:Src/main.c **** { + 5989 .loc 1 2655 6 is_stmt 0 view .LVU1929 5990 0004 0121 movs r1, #1 5991 0006 0D48 ldr r0, .L257 5992 .LVL493: -2654:Src/main.c **** { - 5993 .loc 1 2654 6 view .LVU1930 +2655:Src/main.c **** { + 5993 .loc 1 2655 6 view .LVU1930 5994 0008 FFF7FEFF bl HAL_GPIO_ReadPin 5995 .LVL494: -2654:Src/main.c **** { - 5996 .loc 1 2654 5 discriminator 1 view .LVU1931 +2655:Src/main.c **** { + 5996 .loc 1 2655 5 discriminator 1 view .LVU1931 5997 000c 08B1 cbz r0, .L255 -2672:Src/main.c **** } - 5998 .loc 1 2672 10 view .LVU1932 +2673:Src/main.c **** } + 5998 .loc 1 2673 10 view .LVU1932 5999 000e 0120 movs r0, #1 6000 .LVL495: 6001 .L250: -2688:Src/main.c **** - 6002 .loc 1 2688 1 view .LVU1933 +2689:Src/main.c **** + 6002 .loc 1 2689 1 view .LVU1933 6003 0010 38BD pop {r3, r4, r5, pc} 6004 .LVL496: 6005 .L255: -2656:Src/main.c **** if (test == 0) //0 - suc - 6006 .loc 1 2656 3 is_stmt 1 view .LVU1934 -2656:Src/main.c **** if (test == 0) //0 - suc - 6007 .loc 1 2656 10 is_stmt 0 view .LVU1935 +2657:Src/main.c **** if (test == 0) //0 - suc + 6006 .loc 1 2657 3 is_stmt 1 view .LVU1934 +2657:Src/main.c **** if (test == 0) //0 - suc + 6007 .loc 1 2657 10 is_stmt 0 view .LVU1935 6008 0012 0B48 ldr r0, .L257+4 6009 0014 FFF7FEFF bl Mount_SD 6010 .LVL497: -2657:Src/main.c **** { - 6011 .loc 1 2657 3 is_stmt 1 view .LVU1936 -2657:Src/main.c **** { - 6012 .loc 1 2657 6 is_stmt 0 view .LVU1937 +2658:Src/main.c **** { + 6011 .loc 1 2658 3 is_stmt 1 view .LVU1936 +2658:Src/main.c **** { + 6012 .loc 1 2658 6 is_stmt 0 view .LVU1937 + ARM GAS /tmp/ccO46DoU.s page 470 + + 6013 0018 08B1 cbz r0, .L256 - ARM GAS /tmp/ccWQNJQt.s page 470 - - -2667:Src/main.c **** } - 6014 .loc 1 2667 11 view .LVU1938 +2668:Src/main.c **** } + 6014 .loc 1 2668 11 view .LVU1938 6015 001a 0120 movs r0, #1 6016 .LVL498: -2667:Src/main.c **** } - 6017 .loc 1 2667 11 view .LVU1939 +2668:Src/main.c **** } + 6017 .loc 1 2668 11 view .LVU1939 6018 001c F8E7 b .L250 6019 .LVL499: 6020 .L256: -2660:Src/main.c **** fgoto+=DL_8; - 6021 .loc 1 2660 4 is_stmt 1 view .LVU1940 -2660:Src/main.c **** fgoto+=DL_8; - 6022 .loc 1 2660 11 is_stmt 0 view .LVU1941 +2661:Src/main.c **** fgoto+=DL_8; + 6021 .loc 1 2661 4 is_stmt 1 view .LVU1940 +2661:Src/main.c **** fgoto+=DL_8; + 6022 .loc 1 2661 11 is_stmt 0 view .LVU1941 6023 001e 094D ldr r5, .L257+8 6024 0020 2B68 ldr r3, [r5] 6025 0022 1E22 movs r2, #30 6026 0024 2146 mov r1, r4 6027 0026 0848 ldr r0, .L257+12 6028 .LVL500: -2660:Src/main.c **** fgoto+=DL_8; - 6029 .loc 1 2660 11 view .LVU1942 +2661:Src/main.c **** fgoto+=DL_8; + 6029 .loc 1 2661 11 view .LVU1942 6030 0028 FFF7FEFF bl Seek_Read_File 6031 .LVL501: -2661:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6032 .loc 1 2661 4 is_stmt 1 view .LVU1943 -2661:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6033 .loc 1 2661 9 is_stmt 0 view .LVU1944 +2662:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6032 .loc 1 2662 4 is_stmt 1 view .LVU1943 +2662:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6033 .loc 1 2662 9 is_stmt 0 view .LVU1944 6034 002c 2B68 ldr r3, [r5] 6035 002e 1E33 adds r3, r3, #30 6036 0030 2B60 str r3, [r5] -2662:Src/main.c **** return test; - 6037 .loc 1 2662 4 is_stmt 1 view .LVU1945 -2662:Src/main.c **** return test; - 6038 .loc 1 2662 11 is_stmt 0 view .LVU1946 +2663:Src/main.c **** return test; + 6037 .loc 1 2663 4 is_stmt 1 view .LVU1945 +2663:Src/main.c **** return test; + 6038 .loc 1 2663 11 is_stmt 0 view .LVU1946 6039 0032 0348 ldr r0, .L257+4 6040 0034 FFF7FEFF bl Unmount_SD 6041 .LVL502: -2663:Src/main.c **** } - 6042 .loc 1 2663 4 is_stmt 1 view .LVU1947 -2663:Src/main.c **** } - 6043 .loc 1 2663 11 is_stmt 0 view .LVU1948 +2664:Src/main.c **** } + 6042 .loc 1 2664 4 is_stmt 1 view .LVU1947 +2664:Src/main.c **** } + 6043 .loc 1 2664 11 is_stmt 0 view .LVU1948 6044 0038 EAE7 b .L250 6045 .L258: 6046 003a 00BF .align 2 @@ -28197,14 +28198,14 @@ ARM GAS /tmp/ccWQNJQt.s page 1 6057 .global SD_REMOVE 6058 .syntax unified 6059 .thumb + ARM GAS /tmp/ccO46DoU.s page 471 + + 6060 .thumb_func - ARM GAS /tmp/ccWQNJQt.s page 471 - - 6062 SD_REMOVE: 6063 .LFB1220: -2691:Src/main.c **** int test=0; - 6064 .loc 1 2691 1 is_stmt 1 view -0 +2692:Src/main.c **** int test=0; + 6064 .loc 1 2692 1 is_stmt 1 view -0 6065 .cfi_startproc 6066 @ args = 0, pretend = 0, frame = 0 6067 @ frame_needed = 0, uses_anonymous_args = 0 @@ -28213,83 +28214,83 @@ ARM GAS /tmp/ccWQNJQt.s page 1 6070 .cfi_def_cfa_offset 8 6071 .cfi_offset 4, -8 6072 .cfi_offset 14, -4 -2692:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 6073 .loc 1 2692 2 view .LVU1950 +2693:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 6073 .loc 1 2693 2 view .LVU1950 6074 .LVL503: -2693:Src/main.c **** { - 6075 .loc 1 2693 2 view .LVU1951 -2693:Src/main.c **** { - 6076 .loc 1 2693 6 is_stmt 0 view .LVU1952 +2694:Src/main.c **** { + 6075 .loc 1 2694 2 view .LVU1951 +2694:Src/main.c **** { + 6076 .loc 1 2694 6 is_stmt 0 view .LVU1952 6077 0002 0121 movs r1, #1 6078 0004 0B48 ldr r0, .L266 6079 0006 FFF7FEFF bl HAL_GPIO_ReadPin 6080 .LVL504: -2693:Src/main.c **** { - 6081 .loc 1 2693 5 discriminator 1 view .LVU1953 +2694:Src/main.c **** { + 6081 .loc 1 2694 5 discriminator 1 view .LVU1953 6082 000a 08B1 cbz r0, .L264 -2711:Src/main.c **** } - 6083 .loc 1 2711 10 view .LVU1954 +2712:Src/main.c **** } + 6083 .loc 1 2712 10 view .LVU1954 6084 000c 0120 movs r0, #1 6085 .LVL505: 6086 .L259: -2713:Src/main.c **** - 6087 .loc 1 2713 1 view .LVU1955 +2714:Src/main.c **** + 6087 .loc 1 2714 1 view .LVU1955 6088 000e 10BD pop {r4, pc} 6089 .LVL506: 6090 .L264: -2695:Src/main.c **** if (test==FR_OK) - 6091 .loc 1 2695 3 is_stmt 1 view .LVU1956 -2695:Src/main.c **** if (test==FR_OK) - 6092 .loc 1 2695 10 is_stmt 0 view .LVU1957 +2696:Src/main.c **** if (test==FR_OK) + 6091 .loc 1 2696 3 is_stmt 1 view .LVU1956 +2696:Src/main.c **** if (test==FR_OK) + 6092 .loc 1 2696 10 is_stmt 0 view .LVU1957 6093 0010 0948 ldr r0, .L266+4 6094 0012 FFF7FEFF bl Mount_SD 6095 .LVL507: -2696:Src/main.c **** { - 6096 .loc 1 2696 3 is_stmt 1 view .LVU1958 -2696:Src/main.c **** { - 6097 .loc 1 2696 6 is_stmt 0 view .LVU1959 +2697:Src/main.c **** { + 6096 .loc 1 2697 3 is_stmt 1 view .LVU1958 +2697:Src/main.c **** { + 6097 .loc 1 2697 6 is_stmt 0 view .LVU1959 6098 0016 08B1 cbz r0, .L265 -2706:Src/main.c **** } - 6099 .loc 1 2706 11 view .LVU1960 +2707:Src/main.c **** } + 6099 .loc 1 2707 11 view .LVU1960 6100 0018 0120 movs r0, #1 6101 .LVL508: -2706:Src/main.c **** } - 6102 .loc 1 2706 11 view .LVU1961 +2707:Src/main.c **** } + 6102 .loc 1 2707 11 view .LVU1961 6103 001a F8E7 b .L259 6104 .LVL509: + ARM GAS /tmp/ccO46DoU.s page 472 + + 6105 .L265: - ARM GAS /tmp/ccWQNJQt.s page 472 - - -2698:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6106 .loc 1 2698 4 is_stmt 1 view .LVU1962 -2698:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6107 .loc 1 2698 11 is_stmt 0 view .LVU1963 +2699:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 6106 .loc 1 2699 4 is_stmt 1 view .LVU1962 +2699:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 6107 .loc 1 2699 11 is_stmt 0 view .LVU1963 6108 001c 074C ldr r4, .L266+8 6109 001e 2046 mov r0, r4 6110 .LVL510: -2698:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6111 .loc 1 2698 11 view .LVU1964 +2699:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 6111 .loc 1 2699 11 view .LVU1964 6112 0020 FFF7FEFF bl Remove_File 6113 .LVL511: -2699:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 6114 .loc 1 2699 4 is_stmt 1 view .LVU1965 -2699:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 6115 .loc 1 2699 11 is_stmt 0 view .LVU1966 +2700:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt + 6114 .loc 1 2700 4 is_stmt 1 view .LVU1965 +2700:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt + 6115 .loc 1 2700 11 is_stmt 0 view .LVU1966 6116 0024 2046 mov r0, r4 6117 0026 FFF7FEFF bl Create_File 6118 .LVL512: -2701:Src/main.c **** return test; - 6119 .loc 1 2701 4 is_stmt 1 view .LVU1967 -2701:Src/main.c **** return test; - 6120 .loc 1 2701 11 is_stmt 0 view .LVU1968 +2702:Src/main.c **** return test; + 6119 .loc 1 2702 4 is_stmt 1 view .LVU1967 +2702:Src/main.c **** return test; + 6120 .loc 1 2702 11 is_stmt 0 view .LVU1968 6121 002a 0348 ldr r0, .L266+4 6122 002c FFF7FEFF bl Unmount_SD 6123 .LVL513: -2702:Src/main.c **** } - 6124 .loc 1 2702 4 is_stmt 1 view .LVU1969 -2702:Src/main.c **** } - 6125 .loc 1 2702 11 is_stmt 0 view .LVU1970 +2703:Src/main.c **** } + 6124 .loc 1 2703 4 is_stmt 1 view .LVU1969 +2703:Src/main.c **** } + 6125 .loc 1 2703 11 is_stmt 0 view .LVU1970 6126 0030 EDE7 b .L259 6127 .L267: 6128 0032 00BF .align 2 @@ -28308,39 +28309,39 @@ ARM GAS /tmp/ccWQNJQt.s page 1 6143 USART_TX: 6144 .LVL514: 6145 .LFB1221: -2717:Src/main.c **** uint16_t ind = 0; - 6146 .loc 1 2717 1 is_stmt 1 view -0 +2718:Src/main.c **** uint16_t ind = 0; + 6146 .loc 1 2718 1 is_stmt 1 view -0 6147 .cfi_startproc 6148 @ args = 0, pretend = 0, frame = 0 6149 @ frame_needed = 0, uses_anonymous_args = 0 6150 @ link register save eliminated. -2717:Src/main.c **** uint16_t ind = 0; - 6151 .loc 1 2717 1 is_stmt 0 view .LVU1972 +2718:Src/main.c **** uint16_t ind = 0; + 6151 .loc 1 2718 1 is_stmt 0 view .LVU1972 6152 0000 8C46 mov ip, r1 -2718:Src/main.c **** while (ind CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7895 .loc 1 190 2 is_stmt 1 view .LVU2542 - 190:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7896 .loc 1 190 23 is_stmt 0 view .LVU2543 + 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 7895 .loc 1 191 2 is_stmt 1 view .LVU2542 + 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 7896 .loc 1 191 23 is_stmt 0 view .LVU2543 7897 0072 D36A ldr r3, [r2, #44] - 190:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7898 .loc 1 190 36 view .LVU2544 - 7899 0074 5B00 lsls r3, r3, #1 - 7900 0076 0133 adds r3, r3, #1 - 190:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7901 .loc 1 190 15 view .LVU2545 + 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 7898 .loc 1 191 36 view .LVU2544 + 7899 0074 9B00 lsls r3, r3, #2 + 7900 0076 0333 adds r3, r3, #3 + 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 7901 .loc 1 191 15 view .LVU2545 7902 0078 02F5A032 add r2, r2, #81920 7903 007c D362 str r3, [r2, #44] - 191:Src/main.c **** - 7904 .loc 1 191 2 is_stmt 1 view .LVU2546 - 191:Src/main.c **** - 7905 .loc 1 191 25 is_stmt 0 view .LVU2547 + 192:Src/main.c **** + 7904 .loc 1 192 2 is_stmt 1 view .LVU2546 + 192:Src/main.c **** + 7905 .loc 1 192 25 is_stmt 0 view .LVU2547 7906 007e D36A ldr r3, [r2, #44] - 191:Src/main.c **** - 7907 .loc 1 191 32 view .LVU2548 + 192:Src/main.c **** + 7907 .loc 1 192 32 view .LVU2548 7908 0080 0133 adds r3, r3, #1 - 191:Src/main.c **** - 7909 .loc 1 191 35 view .LVU2549 + 192:Src/main.c **** + 7909 .loc 1 192 35 view .LVU2549 7910 0082 5B08 lsrs r3, r3, #1 - 191:Src/main.c **** - 7911 .loc 1 191 38 view .LVU2550 + 192:Src/main.c **** + 7911 .loc 1 192 38 view .LVU2550 7912 0084 013B subs r3, r3, #1 - 191:Src/main.c **** - 7913 .loc 1 191 16 view .LVU2551 + 192:Src/main.c **** + 7913 .loc 1 192 16 view .LVU2551 7914 0086 5363 str r3, [r2, #52] 7915 0088 4CE0 b .L368 7916 .L424: - 205:Src/main.c **** { - 7917 .loc 1 205 85 discriminator 1 view .LVU2552 + 206:Src/main.c **** { + 7917 .loc 1 206 85 discriminator 1 view .LVU2552 + ARM GAS /tmp/ccO46DoU.s page 516 + + 7918 008a 7B4B ldr r3, .L432+4 - ARM GAS /tmp/ccWQNJQt.s page 516 - - 7919 008c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 205:Src/main.c **** { - 7920 .loc 1 205 73 discriminator 1 view .LVU2553 + 206:Src/main.c **** { + 7920 .loc 1 206 73 discriminator 1 view .LVU2553 7921 008e 002B cmp r3, #0 7922 0090 4FD1 bne .L369 7923 .L370: @@ -30957,10 +30958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 7958 .loc 8 1123 4 view .LVU2567 7959 .syntax unified + ARM GAS /tmp/ccO46DoU.s page 517 + + 7960 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - ARM GAS /tmp/ccWQNJQt.s page 517 - - 7961 009c 42E80031 strex r1, r3, [r2] 7962 @ 0 "" 2 7963 .LVL630: @@ -31017,10 +31018,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8002 .loc 7 3040 3 discriminator 1 view .LVU2581 8003 00aa 43F02003 orr r3, r3, #32 8004 .LVL633: + ARM GAS /tmp/ccO46DoU.s page 518 + + 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccWQNJQt.s page 518 - - 8005 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2582 8006 .LBB557: 8007 .LBI557: @@ -31077,10 +31078,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8046 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 8047 00bc 53E8003F ldrex r3, [r3] 8048 @ 0 "" 2 + ARM GAS /tmp/ccO46DoU.s page 519 + + 8049 .LVL636: - ARM GAS /tmp/ccWQNJQt.s page 519 - - 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 8050 .loc 8 1073 4 view .LVU2597 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -31127,8 +31128,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 8084 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU2608 8085 .LBE559: - 211:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 8086 .loc 1 211 4 is_stmt 1 view .LVU2609 + 212:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 8086 .loc 1 212 4 is_stmt 1 view .LVU2609 8087 .LBB565: 8088 .LBI565: 2024:Drivers/CMSIS/Include/core_cm7.h **** { @@ -31137,10 +31138,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 2026:Drivers/CMSIS/Include/core_cm7.h **** { 8091 .loc 2 2026 3 view .LVU2611 2028:Drivers/CMSIS/Include/core_cm7.h **** } + ARM GAS /tmp/ccO46DoU.s page 520 + + 8092 .loc 2 2028 5 view .LVU2612 - ARM GAS /tmp/ccWQNJQt.s page 520 - - 2028:Drivers/CMSIS/Include/core_cm7.h **** } 8093 .loc 2 2028 47 is_stmt 0 view .LVU2613 8094 00ce 6C4B ldr r3, .L432+12 @@ -31151,8 +31152,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8098 .loc 2 2028 47 view .LVU2614 8099 .LBE566: 8100 .LBE565: - 212:Src/main.c **** u_rx_flg = 1; - 8101 .loc 1 212 4 is_stmt 1 view .LVU2615 + 213:Src/main.c **** u_rx_flg = 1; + 8101 .loc 1 213 4 is_stmt 1 view .LVU2615 8102 .LBB567: 8103 .LBI567: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -31171,43 +31172,43 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8112 .loc 2 1900 43 view .LVU2620 8113 .LBE568: 8114 .LBE567: - 213:Src/main.c **** } - 8115 .loc 1 213 4 is_stmt 1 view .LVU2621 - 213:Src/main.c **** } - 8116 .loc 1 213 13 is_stmt 0 view .LVU2622 + 214:Src/main.c **** } + 8115 .loc 1 214 4 is_stmt 1 view .LVU2621 + 214:Src/main.c **** } + 8116 .loc 1 214 13 is_stmt 0 view .LVU2622 8117 00da 674B ldr r3, .L432+4 8118 00dc 0122 movs r2, #1 8119 00de 1A70 strb r2, [r3] 8120 00e0 27E0 b .L369 8121 .L384: - 223:Src/main.c **** task.current_param = task.min_param; - 8122 .loc 1 223 6 is_stmt 1 view .LVU2623 - 223:Src/main.c **** task.current_param = task.min_param; - 8123 .loc 1 223 20 is_stmt 0 view .LVU2624 + 224:Src/main.c **** task.current_param = task.min_param; + 8122 .loc 1 224 6 is_stmt 1 view .LVU2623 + 224:Src/main.c **** task.current_param = task.min_param; + 8123 .loc 1 224 20 is_stmt 0 view .LVU2624 8124 00e2 684B ldr r3, .L432+16 8125 00e4 0022 movs r2, #0 8126 00e6 1A70 strb r2, [r3] - 224:Src/main.c **** Stop_TIM10(); - 8127 .loc 1 224 6 is_stmt 1 view .LVU2625 - 224:Src/main.c **** Stop_TIM10(); - 8128 .loc 1 224 31 is_stmt 0 view .LVU2626 + 225:Src/main.c **** Stop_TIM10(); + 8127 .loc 1 225 6 is_stmt 1 view .LVU2625 + 225:Src/main.c **** Stop_TIM10(); + 8128 .loc 1 225 31 is_stmt 0 view .LVU2626 8129 00e8 674B ldr r3, .L432+20 8130 00ea 5A68 ldr r2, [r3, #4] @ float - 224:Src/main.c **** Stop_TIM10(); - 8131 .loc 1 224 25 view .LVU2627 + 225:Src/main.c **** Stop_TIM10(); + 8131 .loc 1 225 25 view .LVU2627 8132 00ec 1A61 str r2, [r3, #16] @ float - 225:Src/main.c **** break; - 8133 .loc 1 225 6 is_stmt 1 view .LVU2628 - ARM GAS /tmp/ccWQNJQt.s page 521 + 226:Src/main.c **** break; + ARM GAS /tmp/ccO46DoU.s page 521 + 8133 .loc 1 226 6 is_stmt 1 view .LVU2628 8134 00ee FFF7FEFF bl Stop_TIM10 8135 .LVL642: - 226:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 8136 .loc 1 226 5 view .LVU2629 + 227:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 8136 .loc 1 227 5 view .LVU2629 8137 .L373: - 701:Src/main.c **** { - 8138 .loc 1 701 3 view .LVU2630 + 702:Src/main.c **** { + 8138 .loc 1 702 3 view .LVU2630 8139 00f2 664B ldr r3, .L432+24 8140 00f4 1B78 ldrb r3, [r3] @ zero_extendqisi2 8141 00f6 022B cmp r3, #2 @@ -31216,64 +31217,64 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8144 00fe 00F04F84 beq .L420 8145 0102 012B cmp r3, #1 8146 0104 09D1 bne .L415 - 704:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 8147 .loc 1 704 5 view .LVU2631 + 705:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 8147 .loc 1 705 5 view .LVU2631 8148 0106 624C ldr r4, .L432+28 8149 0108 0221 movs r1, #2 8150 010a 2046 mov r0, r4 8151 010c FFF7FEFF bl USART_TX 8152 .LVL643: - 706:Src/main.c **** State_Data[1]=0;//All OK! - 8153 .loc 1 706 5 view .LVU2632 - 706:Src/main.c **** State_Data[1]=0;//All OK! - 8154 .loc 1 706 18 is_stmt 0 view .LVU2633 + 707:Src/main.c **** State_Data[1]=0;//All OK! + 8153 .loc 1 707 5 view .LVU2632 + 707:Src/main.c **** State_Data[1]=0;//All OK! + 8154 .loc 1 707 18 is_stmt 0 view .LVU2633 8155 0110 0023 movs r3, #0 8156 0112 2370 strb r3, [r4] - 707:Src/main.c **** UART_transmission_request = NO_MESS; - 8157 .loc 1 707 5 is_stmt 1 view .LVU2634 - 707:Src/main.c **** UART_transmission_request = NO_MESS; - 8158 .loc 1 707 18 is_stmt 0 view .LVU2635 + 708:Src/main.c **** UART_transmission_request = NO_MESS; + 8157 .loc 1 708 5 is_stmt 1 view .LVU2634 + 708:Src/main.c **** UART_transmission_request = NO_MESS; + 8158 .loc 1 708 18 is_stmt 0 view .LVU2635 8159 0114 6370 strb r3, [r4, #1] - 708:Src/main.c **** break; - 8160 .loc 1 708 5 is_stmt 1 view .LVU2636 - 708:Src/main.c **** break; - 8161 .loc 1 708 31 is_stmt 0 view .LVU2637 + 709:Src/main.c **** break; + 8160 .loc 1 709 5 is_stmt 1 view .LVU2636 + 709:Src/main.c **** break; + 8161 .loc 1 709 31 is_stmt 0 view .LVU2637 8162 0116 5D4A ldr r2, .L432+24 8163 0118 1370 strb r3, [r2] - 709:Src/main.c **** case MESS_02://Transmith packet - 8164 .loc 1 709 4 is_stmt 1 view .LVU2638 + 710:Src/main.c **** case MESS_02://Transmith packet + 8164 .loc 1 710 4 is_stmt 1 view .LVU2638 8165 .L415: - 743:Src/main.c **** { - 8166 .loc 1 743 5 view .LVU2639 - 743:Src/main.c **** { - 8167 .loc 1 743 17 is_stmt 0 view .LVU2640 + 744:Src/main.c **** { + 8166 .loc 1 744 5 view .LVU2639 + 744:Src/main.c **** { + 8167 .loc 1 744 17 is_stmt 0 view .LVU2640 8168 011a 5E4B ldr r3, .L432+32 8169 011c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 743:Src/main.c **** { - 8170 .loc 1 743 8 view .LVU2641 + 744:Src/main.c **** { + 8170 .loc 1 744 8 view .LVU2641 8171 011e 012B cmp r3, #1 8172 0120 00F04084 beq .L423 8173 .L368: - 203:Src/main.c **** { - 8174 .loc 1 203 3 is_stmt 1 view .LVU2642 - 205:Src/main.c **** { - 8175 .loc 1 205 3 view .LVU2643 - ARM GAS /tmp/ccWQNJQt.s page 522 + 204:Src/main.c **** { + 8174 .loc 1 204 3 is_stmt 1 view .LVU2642 + 206:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 522 - 205:Src/main.c **** { - 8176 .loc 1 205 8 is_stmt 0 view .LVU2644 + 8175 .loc 1 206 3 view .LVU2643 + 206:Src/main.c **** { + 8176 .loc 1 206 8 is_stmt 0 view .LVU2644 8177 0124 4FF48071 mov r1, #256 8178 0128 5B48 ldr r0, .L432+36 8179 012a FFF7FEFF bl HAL_GPIO_ReadPin 8180 .LVL644: - 205:Src/main.c **** { - 8181 .loc 1 205 6 discriminator 1 view .LVU2645 + 206:Src/main.c **** { + 8181 .loc 1 206 6 discriminator 1 view .LVU2645 8182 012e 0128 cmp r0, #1 8183 0130 ABD0 beq .L424 8184 .L369: - 220:Src/main.c **** { - 8185 .loc 1 220 4 is_stmt 1 view .LVU2646 + 221:Src/main.c **** { + 8185 .loc 1 221 4 is_stmt 1 view .LVU2646 8186 0132 5A4B ldr r3, .L432+40 8187 0134 1B78 ldrb r3, [r3] @ zero_extendqisi2 8188 0136 092B cmp r3, #9 @@ -31294,70 +31295,70 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8203 0164 63040000 .word .L374+1 8204 .p2align 1 8205 .L383: - 228:Src/main.c **** if (CheckChecksum(COMMAND)) - 8206 .loc 1 228 6 view .LVU2647 - 228:Src/main.c **** if (CheckChecksum(COMMAND)) - 8207 .loc 1 228 18 is_stmt 0 view .LVU2648 + 229:Src/main.c **** if (CheckChecksum(COMMAND)) + 8206 .loc 1 229 6 view .LVU2647 + 229:Src/main.c **** if (CheckChecksum(COMMAND)) + 8207 .loc 1 229 18 is_stmt 0 view .LVU2648 8208 0168 4D4C ldr r4, .L432+44 8209 016a 0D21 movs r1, #13 8210 016c 2046 mov r0, r4 8211 016e FFF7FEFF bl CalculateChecksum 8212 .LVL645: - 228:Src/main.c **** if (CheckChecksum(COMMAND)) - 8213 .loc 1 228 16 discriminator 1 view .LVU2649 + 229:Src/main.c **** if (CheckChecksum(COMMAND)) + 8213 .loc 1 229 16 discriminator 1 view .LVU2649 8214 0172 4C4B ldr r3, .L432+48 8215 0174 1880 strh r0, [r3] @ movhi - 229:Src/main.c **** { - 8216 .loc 1 229 6 is_stmt 1 view .LVU2650 - 229:Src/main.c **** { - 8217 .loc 1 229 10 is_stmt 0 view .LVU2651 + 230:Src/main.c **** { + 8216 .loc 1 230 6 is_stmt 1 view .LVU2650 + 230:Src/main.c **** { + 8217 .loc 1 230 10 is_stmt 0 view .LVU2651 8218 0176 2046 mov r0, r4 8219 0178 FFF7FEFF bl CheckChecksum 8220 .LVL646: - 229:Src/main.c **** { - 8221 .loc 1 229 9 discriminator 1 view .LVU2652 + 230:Src/main.c **** { + 8221 .loc 1 230 9 discriminator 1 view .LVU2652 8222 017c 70B9 cbnz r0, .L425 - 242:Src/main.c **** CPU_state = DEFAULT_ENABLE; - ARM GAS /tmp/ccWQNJQt.s page 523 + ARM GAS /tmp/ccO46DoU.s page 523 - 8223 .loc 1 242 7 is_stmt 1 view .LVU2653 - 242:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8224 .loc 1 242 17 is_stmt 0 view .LVU2654 + 243:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8223 .loc 1 243 7 is_stmt 1 view .LVU2653 + 243:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8224 .loc 1 243 17 is_stmt 0 view .LVU2654 8225 017e 444A ldr r2, .L432+28 8226 0180 1378 ldrb r3, [r2] @ zero_extendqisi2 - 242:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8227 .loc 1 242 21 view .LVU2655 + 243:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8227 .loc 1 243 21 view .LVU2655 8228 0182 43F00403 orr r3, r3, #4 8229 0186 1370 strb r3, [r2] - 243:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8230 .loc 1 243 7 is_stmt 1 view .LVU2656 - 243:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8231 .loc 1 243 17 is_stmt 0 view .LVU2657 + 244:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8230 .loc 1 244 7 is_stmt 1 view .LVU2656 + 244:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8231 .loc 1 244 17 is_stmt 0 view .LVU2657 8232 0188 444B ldr r3, .L432+40 8233 018a 0222 movs r2, #2 8234 018c 1A70 strb r2, [r3] - 244:Src/main.c **** } - 8235 .loc 1 244 7 is_stmt 1 view .LVU2658 - 244:Src/main.c **** } - 8236 .loc 1 244 21 is_stmt 0 view .LVU2659 + 245:Src/main.c **** } + 8235 .loc 1 245 7 is_stmt 1 view .LVU2658 + 245:Src/main.c **** } + 8236 .loc 1 245 21 is_stmt 0 view .LVU2659 8237 018e 3D4B ldr r3, .L432+16 8238 0190 0022 movs r2, #0 8239 0192 1A70 strb r2, [r3] 8240 .L386: - 246:Src/main.c **** break; - 8241 .loc 1 246 6 is_stmt 1 view .LVU2660 - 246:Src/main.c **** break; - 8242 .loc 1 246 32 is_stmt 0 view .LVU2661 + 247:Src/main.c **** break; + 8241 .loc 1 247 6 is_stmt 1 view .LVU2660 + 247:Src/main.c **** break; + 8242 .loc 1 247 32 is_stmt 0 view .LVU2661 8243 0194 3D4B ldr r3, .L432+24 8244 0196 0122 movs r2, #1 8245 0198 1A70 strb r2, [r3] - 247:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 8246 .loc 1 247 5 is_stmt 1 view .LVU2662 + 248:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 8246 .loc 1 248 5 is_stmt 1 view .LVU2662 8247 019a AAE7 b .L373 8248 .L425: - 231:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 8249 .loc 1 231 7 view .LVU2663 + 232:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 8249 .loc 1 232 7 view .LVU2663 8250 .LVL647: 8251 .LBB569: 8252 .LBI569: @@ -31375,12 +31376,12 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8261 .loc 4 360 3 is_stmt 0 view .LVU2666 8262 .LBE570: 8263 .LBE569: - 232:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 8264 .loc 1 232 7 is_stmt 1 view .LVU2667 + 233:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 8264 .loc 1 233 7 is_stmt 1 view .LVU2667 + ARM GAS /tmp/ccO46DoU.s page 524 + + 8265 .LBB571: - ARM GAS /tmp/ccWQNJQt.s page 524 - - 8266 .LBI571: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 8267 .loc 4 358 22 view .LVU2668 @@ -31396,59 +31397,59 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8275 .loc 4 360 3 is_stmt 0 view .LVU2670 8276 .LBE572: 8277 .LBE571: - 233:Src/main.c **** TO6_before = TO6; - 8278 .loc 1 233 7 is_stmt 1 view .LVU2671 + 234:Src/main.c **** TO6_before = TO6; + 8278 .loc 1 234 7 is_stmt 1 view .LVU2671 8279 01b2 3E4B ldr r3, .L432+56 8280 01b4 3E4A ldr r2, .L432+60 8281 01b6 3F49 ldr r1, .L432+64 8282 01b8 2046 mov r0, r4 8283 01ba FFF7FEFF bl Decode_uart 8284 .LVL650: - 234:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 8285 .loc 1 234 7 view .LVU2672 - 234:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 8286 .loc 1 234 18 is_stmt 0 view .LVU2673 + 235:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 8285 .loc 1 235 7 view .LVU2672 + 235:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 8286 .loc 1 235 18 is_stmt 0 view .LVU2673 8287 01be 3E4B ldr r3, .L432+68 8288 01c0 1A68 ldr r2, [r3] 8289 01c2 3E4B ldr r3, .L432+72 8290 01c4 1A60 str r2, [r3] - 237:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 8291 .loc 1 237 7 is_stmt 1 view .LVU2674 - 237:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 8292 .loc 1 237 17 is_stmt 0 view .LVU2675 + 238:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 8291 .loc 1 238 7 is_stmt 1 view .LVU2674 + 238:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 8292 .loc 1 238 17 is_stmt 0 view .LVU2675 8293 01c6 0723 movs r3, #7 8294 01c8 344A ldr r2, .L432+40 8295 01ca 1370 strb r3, [r2] - 238:Src/main.c **** } - 8296 .loc 1 238 7 is_stmt 1 view .LVU2676 - 238:Src/main.c **** } - 8297 .loc 1 238 21 is_stmt 0 view .LVU2677 + 239:Src/main.c **** } + 8296 .loc 1 239 7 is_stmt 1 view .LVU2676 + 239:Src/main.c **** } + 8297 .loc 1 239 21 is_stmt 0 view .LVU2677 8298 01cc 2D4A ldr r2, .L432+16 8299 01ce 1370 strb r3, [r2] 8300 01d0 E0E7 b .L386 8301 .L382: - 250:Src/main.c **** Stop_TIM10(); - 8302 .loc 1 250 6 is_stmt 1 view .LVU2678 - 250:Src/main.c **** Stop_TIM10(); - 8303 .loc 1 250 31 is_stmt 0 view .LVU2679 + 251:Src/main.c **** Stop_TIM10(); + 8302 .loc 1 251 6 is_stmt 1 view .LVU2678 + 251:Src/main.c **** Stop_TIM10(); + 8303 .loc 1 251 31 is_stmt 0 view .LVU2679 8304 01d2 2D4B ldr r3, .L432+20 8305 01d4 5A68 ldr r2, [r3, #4] @ float - 250:Src/main.c **** Stop_TIM10(); - 8306 .loc 1 250 25 view .LVU2680 + 251:Src/main.c **** Stop_TIM10(); + 8306 .loc 1 251 25 view .LVU2680 8307 01d6 1A61 str r2, [r3, #16] @ float - 251:Src/main.c **** Init_params(); - 8308 .loc 1 251 6 is_stmt 1 view .LVU2681 - ARM GAS /tmp/ccWQNJQt.s page 525 + 252:Src/main.c **** Init_params(); + ARM GAS /tmp/ccO46DoU.s page 525 + 8308 .loc 1 252 6 is_stmt 1 view .LVU2681 8309 01d8 FFF7FEFF bl Stop_TIM10 8310 .LVL651: - 252:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 8311 .loc 1 252 6 view .LVU2682 + 253:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 8311 .loc 1 253 6 view .LVU2682 8312 01dc FFF7FEFF bl Init_params 8313 .LVL652: - 253:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 8314 .loc 1 253 6 view .LVU2683 + 254:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 8314 .loc 1 254 6 view .LVU2683 8315 .LBB573: 8316 .LBI573: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -31465,8 +31466,8 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8325 .loc 4 372 3 is_stmt 0 view .LVU2686 8326 .LBE574: 8327 .LBE573: - 254:Src/main.c **** CPU_state = HALT; - 8328 .loc 1 254 6 is_stmt 1 view .LVU2687 + 255:Src/main.c **** CPU_state = HALT; + 8328 .loc 1 255 6 is_stmt 1 view .LVU2687 8329 .LBB575: 8330 .LBI575: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -31483,169 +31484,169 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8339 .loc 4 372 3 is_stmt 0 view .LVU2690 8340 .LBE576: 8341 .LBE575: - 255:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8342 .loc 1 255 6 is_stmt 1 view .LVU2691 - 255:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8343 .loc 1 255 16 is_stmt 0 view .LVU2692 + 256:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8342 .loc 1 256 6 is_stmt 1 view .LVU2691 + 256:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8343 .loc 1 256 16 is_stmt 0 view .LVU2692 8344 01f6 0023 movs r3, #0 8345 01f8 284A ldr r2, .L432+40 8346 01fa 1370 strb r3, [r2] - 256:Src/main.c **** UART_transmission_request = MESS_01; - 8347 .loc 1 256 6 is_stmt 1 view .LVU2693 - 256:Src/main.c **** UART_transmission_request = MESS_01; - 8348 .loc 1 256 20 is_stmt 0 view .LVU2694 + 257:Src/main.c **** UART_transmission_request = MESS_01; + 8347 .loc 1 257 6 is_stmt 1 view .LVU2693 + 257:Src/main.c **** UART_transmission_request = MESS_01; + 8348 .loc 1 257 20 is_stmt 0 view .LVU2694 8349 01fc 214A ldr r2, .L432+16 8350 01fe 1370 strb r3, [r2] - 257:Src/main.c **** break; - 8351 .loc 1 257 6 is_stmt 1 view .LVU2695 - ARM GAS /tmp/ccWQNJQt.s page 526 + 258:Src/main.c **** break; + ARM GAS /tmp/ccO46DoU.s page 526 - 257:Src/main.c **** break; - 8352 .loc 1 257 32 is_stmt 0 view .LVU2696 + 8351 .loc 1 258 6 is_stmt 1 view .LVU2695 + 258:Src/main.c **** break; + 8352 .loc 1 258 32 is_stmt 0 view .LVU2696 8353 0200 224B ldr r3, .L432+24 8354 0202 0122 movs r2, #1 8355 0204 1A70 strb r2, [r3] - 258:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 8356 .loc 1 258 5 is_stmt 1 view .LVU2697 + 259:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 8356 .loc 1 259 5 is_stmt 1 view .LVU2697 8357 0206 74E7 b .L373 8358 .L381: - 260:Src/main.c **** State_Data[0]|=temp16&0xff; - 8359 .loc 1 260 6 view .LVU2698 - 260:Src/main.c **** State_Data[0]|=temp16&0xff; - 8360 .loc 1 260 15 is_stmt 0 view .LVU2699 + 261:Src/main.c **** State_Data[0]|=temp16&0xff; + 8359 .loc 1 261 6 view .LVU2698 + 261:Src/main.c **** State_Data[0]|=temp16&0xff; + 8360 .loc 1 261 15 is_stmt 0 view .LVU2699 8361 0208 2D48 ldr r0, .L432+76 8362 020a FFF7FEFF bl SD_READ 8363 .LVL655: - 260:Src/main.c **** State_Data[0]|=temp16&0xff; - 8364 .loc 1 260 13 discriminator 1 view .LVU2700 + 261:Src/main.c **** State_Data[0]|=temp16&0xff; + 8364 .loc 1 261 13 discriminator 1 view .LVU2700 8365 020e 82B2 uxth r2, r0 8366 0210 2C4B ldr r3, .L432+80 8367 0212 1A80 strh r2, [r3] @ movhi - 261:Src/main.c **** if (temp16==0) - 8368 .loc 1 261 6 is_stmt 1 view .LVU2701 - 261:Src/main.c **** if (temp16==0) - 8369 .loc 1 261 16 is_stmt 0 view .LVU2702 + 262:Src/main.c **** if (temp16==0) + 8368 .loc 1 262 6 is_stmt 1 view .LVU2701 + 262:Src/main.c **** if (temp16==0) + 8369 .loc 1 262 16 is_stmt 0 view .LVU2702 8370 0214 1E49 ldr r1, .L432+28 8371 0216 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 261:Src/main.c **** if (temp16==0) - 8372 .loc 1 261 19 view .LVU2703 + 262:Src/main.c **** if (temp16==0) + 8372 .loc 1 262 19 view .LVU2703 8373 0218 0343 orrs r3, r3, r0 8374 021a 0B70 strb r3, [r1] - 262:Src/main.c **** { - 8375 .loc 1 262 6 is_stmt 1 view .LVU2704 - 262:Src/main.c **** { - 8376 .loc 1 262 9 is_stmt 0 view .LVU2705 + 263:Src/main.c **** { + 8375 .loc 1 263 6 is_stmt 1 view .LVU2704 + 263:Src/main.c **** { + 8376 .loc 1 263 9 is_stmt 0 view .LVU2705 8377 021c 42B9 cbnz r2, .L387 - 264:Src/main.c **** } - 8378 .loc 1 264 7 is_stmt 1 view .LVU2706 - 264:Src/main.c **** } - 8379 .loc 1 264 33 is_stmt 0 view .LVU2707 + 265:Src/main.c **** } + 8378 .loc 1 265 7 is_stmt 1 view .LVU2706 + 265:Src/main.c **** } + 8379 .loc 1 265 33 is_stmt 0 view .LVU2707 8380 021e 1B4B ldr r3, .L432+24 8381 0220 0322 movs r2, #3 8382 0222 1A70 strb r2, [r3] 8383 .L388: - 270:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8384 .loc 1 270 6 is_stmt 1 view .LVU2708 - 270:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8385 .loc 1 270 20 is_stmt 0 view .LVU2709 + 271:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8384 .loc 1 271 6 is_stmt 1 view .LVU2708 + 271:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8385 .loc 1 271 20 is_stmt 0 view .LVU2709 8386 0224 0023 movs r3, #0 8387 0226 174A ldr r2, .L432+16 8388 0228 1370 strb r3, [r2] - 271:Src/main.c **** break; - 8389 .loc 1 271 6 is_stmt 1 view .LVU2710 - 271:Src/main.c **** break; - 8390 .loc 1 271 16 is_stmt 0 view .LVU2711 + 272:Src/main.c **** break; + 8389 .loc 1 272 6 is_stmt 1 view .LVU2710 + 272:Src/main.c **** break; + 8390 .loc 1 272 16 is_stmt 0 view .LVU2711 8391 022a 1C4A ldr r2, .L432+40 + ARM GAS /tmp/ccO46DoU.s page 527 + + 8392 022c 1370 strb r3, [r2] - ARM GAS /tmp/ccWQNJQt.s page 527 - - - 272:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 8393 .loc 1 272 5 is_stmt 1 view .LVU2712 + 273:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 8393 .loc 1 273 5 is_stmt 1 view .LVU2712 8394 022e 60E7 b .L373 8395 .L387: - 268:Src/main.c **** } - 8396 .loc 1 268 7 view .LVU2713 - 268:Src/main.c **** } - 8397 .loc 1 268 33 is_stmt 0 view .LVU2714 + 269:Src/main.c **** } + 8396 .loc 1 269 7 view .LVU2713 + 269:Src/main.c **** } + 8397 .loc 1 269 33 is_stmt 0 view .LVU2714 8398 0230 164B ldr r3, .L432+24 8399 0232 0122 movs r2, #1 8400 0234 1A70 strb r2, [r3] 8401 0236 F5E7 b .L388 8402 .L380: - 274:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8403 .loc 1 274 6 is_stmt 1 view .LVU2715 - 274:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8404 .loc 1 274 32 is_stmt 0 view .LVU2716 + 275:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8403 .loc 1 275 6 is_stmt 1 view .LVU2715 + 275:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8404 .loc 1 275 32 is_stmt 0 view .LVU2716 8405 0238 144B ldr r3, .L432+24 8406 023a 0222 movs r2, #2 8407 023c 1A70 strb r2, [r3] - 275:Src/main.c **** break; - 8408 .loc 1 275 6 is_stmt 1 view .LVU2717 - 275:Src/main.c **** break; - 8409 .loc 1 275 16 is_stmt 0 view .LVU2718 + 276:Src/main.c **** break; + 8408 .loc 1 276 6 is_stmt 1 view .LVU2717 + 276:Src/main.c **** break; + 8409 .loc 1 276 16 is_stmt 0 view .LVU2718 8410 023e 114B ldr r3, .L432+16 8411 0240 1A78 ldrb r2, [r3] @ zero_extendqisi2 8412 0242 164B ldr r3, .L432+40 8413 0244 1A70 strb r2, [r3] - 276:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 8414 .loc 1 276 5 is_stmt 1 view .LVU2719 + 277:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 8414 .loc 1 277 5 is_stmt 1 view .LVU2719 8415 0246 54E7 b .L373 8416 .L379: - 278:Src/main.c **** UART_transmission_request = MESS_01; - 8417 .loc 1 278 6 view .LVU2720 - 278:Src/main.c **** UART_transmission_request = MESS_01; - 8418 .loc 1 278 21 is_stmt 0 view .LVU2721 + 279:Src/main.c **** UART_transmission_request = MESS_01; + 8417 .loc 1 279 6 view .LVU2720 + 279:Src/main.c **** UART_transmission_request = MESS_01; + 8418 .loc 1 279 21 is_stmt 0 view .LVU2721 8419 0248 FFF7FEFF bl SD_REMOVE 8420 .LVL656: - 278:Src/main.c **** UART_transmission_request = MESS_01; - 8421 .loc 1 278 16 discriminator 1 view .LVU2722 + 279:Src/main.c **** UART_transmission_request = MESS_01; + 8421 .loc 1 279 16 discriminator 1 view .LVU2722 8422 024c 104A ldr r2, .L432+28 8423 024e 1378 ldrb r3, [r2] @ zero_extendqisi2 - 278:Src/main.c **** UART_transmission_request = MESS_01; - 8424 .loc 1 278 19 discriminator 1 view .LVU2723 + 279:Src/main.c **** UART_transmission_request = MESS_01; + 8424 .loc 1 279 19 discriminator 1 view .LVU2723 8425 0250 0343 orrs r3, r3, r0 8426 0252 1370 strb r3, [r2] - 279:Src/main.c **** CPU_state = CPU_state_old; - 8427 .loc 1 279 6 is_stmt 1 view .LVU2724 - 279:Src/main.c **** CPU_state = CPU_state_old; - 8428 .loc 1 279 32 is_stmt 0 view .LVU2725 + 280:Src/main.c **** CPU_state = CPU_state_old; + 8427 .loc 1 280 6 is_stmt 1 view .LVU2724 + 280:Src/main.c **** CPU_state = CPU_state_old; + 8428 .loc 1 280 32 is_stmt 0 view .LVU2725 8429 0254 0D4B ldr r3, .L432+24 8430 0256 0122 movs r2, #1 8431 0258 1A70 strb r2, [r3] - 280:Src/main.c **** break; - 8432 .loc 1 280 6 is_stmt 1 view .LVU2726 - 280:Src/main.c **** break; - 8433 .loc 1 280 16 is_stmt 0 view .LVU2727 - ARM GAS /tmp/ccWQNJQt.s page 528 + 281:Src/main.c **** break; + 8432 .loc 1 281 6 is_stmt 1 view .LVU2726 + 281:Src/main.c **** break; + ARM GAS /tmp/ccO46DoU.s page 528 + 8433 .loc 1 281 16 is_stmt 0 view .LVU2727 8434 025a 0A4B ldr r3, .L432+16 8435 025c 1A78 ldrb r2, [r3] @ zero_extendqisi2 8436 025e 0F4B ldr r3, .L432+40 8437 0260 1A70 strb r2, [r3] - 281:Src/main.c **** case STATE://6 - Transmith state message - 8438 .loc 1 281 5 is_stmt 1 view .LVU2728 + 282:Src/main.c **** case STATE://6 - Transmith state message + 8438 .loc 1 282 5 is_stmt 1 view .LVU2728 8439 0262 46E7 b .L373 8440 .L378: - 283:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8441 .loc 1 283 6 view .LVU2729 - 283:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8442 .loc 1 283 32 is_stmt 0 view .LVU2730 + 284:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8441 .loc 1 284 6 view .LVU2729 + 284:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8442 .loc 1 284 32 is_stmt 0 view .LVU2730 8443 0264 094B ldr r3, .L432+24 8444 0266 0122 movs r2, #1 8445 0268 1A70 strb r2, [r3] - 284:Src/main.c **** break; - 8446 .loc 1 284 6 is_stmt 1 view .LVU2731 - 284:Src/main.c **** break; - 8447 .loc 1 284 16 is_stmt 0 view .LVU2732 + 285:Src/main.c **** break; + 8446 .loc 1 285 6 is_stmt 1 view .LVU2731 + 285:Src/main.c **** break; + 8447 .loc 1 285 16 is_stmt 0 view .LVU2732 8448 026a 064B ldr r3, .L432+16 8449 026c 1A78 ldrb r2, [r3] @ zero_extendqisi2 8450 026e 0B4B ldr r3, .L432+40 8451 0270 1A70 strb r2, [r3] - 285:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 8452 .loc 1 285 5 is_stmt 1 view .LVU2733 + 286:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 8452 .loc 1 286 5 is_stmt 1 view .LVU2733 8453 0272 3EE7 b .L373 8454 .L433: 8455 .align 2 @@ -31672,123 +31673,123 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8476 02c0 00000000 .word Long_Data 8477 02c4 00000000 .word temp16 8478 .L377: - 287:Src/main.c **** Stop_TIM10(); - 8479 .loc 1 287 6 view .LVU2734 - 287:Src/main.c **** Stop_TIM10(); - 8480 .loc 1 287 31 is_stmt 0 view .LVU2735 + 288:Src/main.c **** Stop_TIM10(); + 8479 .loc 1 288 6 view .LVU2734 + 288:Src/main.c **** Stop_TIM10(); + 8480 .loc 1 288 31 is_stmt 0 view .LVU2735 8481 02c8 7A4B ldr r3, .L434 + ARM GAS /tmp/ccO46DoU.s page 529 + + 8482 02ca 5A68 ldr r2, [r3, #4] @ float - ARM GAS /tmp/ccWQNJQt.s page 529 - - - 287:Src/main.c **** Stop_TIM10(); - 8483 .loc 1 287 25 view .LVU2736 + 288:Src/main.c **** Stop_TIM10(); + 8483 .loc 1 288 25 view .LVU2736 8484 02cc 1A61 str r2, [r3, #16] @ float - 288:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 8485 .loc 1 288 6 is_stmt 1 view .LVU2737 + 289:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 8485 .loc 1 289 6 is_stmt 1 view .LVU2737 8486 02ce FFF7FEFF bl Stop_TIM10 8487 .LVL657: - 289:Src/main.c **** { - 8488 .loc 1 289 6 view .LVU2738 - 289:Src/main.c **** { - 8489 .loc 1 289 13 is_stmt 0 view .LVU2739 + 290:Src/main.c **** { + 8488 .loc 1 290 6 view .LVU2738 + 290:Src/main.c **** { + 8489 .loc 1 290 13 is_stmt 0 view .LVU2739 8490 02d2 794B ldr r3, .L434+4 8491 02d4 1B68 ldr r3, [r3] 8492 02d6 794A ldr r2, .L434+8 8493 02d8 1268 ldr r2, [r2] - 289:Src/main.c **** { - 8494 .loc 1 289 9 view .LVU2740 + 290:Src/main.c **** { + 8494 .loc 1 290 9 view .LVU2740 8495 02da 9342 cmp r3, r2 8496 02dc 7FF609AF bls .L373 - 291:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8497 .loc 1 291 7 is_stmt 1 view .LVU2741 - 291:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8498 .loc 1 291 18 is_stmt 0 view .LVU2742 + 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8497 .loc 1 292 7 is_stmt 1 view .LVU2741 + 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8498 .loc 1 292 18 is_stmt 0 view .LVU2742 8499 02e0 764A ldr r2, .L434+8 8500 02e2 1360 str r3, [r2] - 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8501 .loc 1 292 7 is_stmt 1 view .LVU2743 - 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8502 .loc 1 292 25 is_stmt 0 view .LVU2744 + 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8501 .loc 1 293 7 is_stmt 1 view .LVU2743 + 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8502 .loc 1 293 25 is_stmt 0 view .LVU2744 8503 02e4 0120 movs r0, #1 8504 02e6 FFF7FEFF bl MPhD_T 8505 .LVL658: - 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8506 .loc 1 292 23 discriminator 1 view .LVU2745 + 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8506 .loc 1 293 23 discriminator 1 view .LVU2745 8507 02ea 754F ldr r7, .L434+12 8508 02ec 3881 strh r0, [r7, #8] @ movhi - 293:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8509 .loc 1 293 7 is_stmt 1 view .LVU2746 - 293:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8510 .loc 1 293 25 is_stmt 0 view .LVU2747 + 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8509 .loc 1 294 7 is_stmt 1 view .LVU2746 + 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8510 .loc 1 294 25 is_stmt 0 view .LVU2747 8511 02ee 0120 movs r0, #1 8512 02f0 FFF7FEFF bl MPhD_T 8513 .LVL659: - 293:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8514 .loc 1 293 23 discriminator 1 view .LVU2748 + 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8514 .loc 1 294 23 discriminator 1 view .LVU2748 8515 02f4 3881 strh r0, [r7, #8] @ movhi - 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8516 .loc 1 294 7 is_stmt 1 view .LVU2749 - 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8517 .loc 1 294 25 is_stmt 0 view .LVU2750 + 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8516 .loc 1 295 7 is_stmt 1 view .LVU2749 + 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8517 .loc 1 295 25 is_stmt 0 view .LVU2750 8518 02f6 0220 movs r0, #2 8519 02f8 FFF7FEFF bl MPhD_T 8520 .LVL660: - 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8521 .loc 1 294 23 discriminator 1 view .LVU2751 + 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8521 .loc 1 295 23 discriminator 1 view .LVU2751 8522 02fc 714E ldr r6, .L434+16 + ARM GAS /tmp/ccO46DoU.s page 530 + + 8523 02fe 3081 strh r0, [r6, #8] @ movhi - ARM GAS /tmp/ccWQNJQt.s page 530 - - - 295:Src/main.c **** - 8524 .loc 1 295 7 is_stmt 1 view .LVU2752 - 295:Src/main.c **** - 8525 .loc 1 295 25 is_stmt 0 view .LVU2753 + 296:Src/main.c **** + 8524 .loc 1 296 7 is_stmt 1 view .LVU2752 + 296:Src/main.c **** + 8525 .loc 1 296 25 is_stmt 0 view .LVU2753 8526 0300 0220 movs r0, #2 8527 0302 FFF7FEFF bl MPhD_T 8528 .LVL661: - 295:Src/main.c **** - 8529 .loc 1 295 23 discriminator 1 view .LVU2754 + 296:Src/main.c **** + 8529 .loc 1 296 23 discriminator 1 view .LVU2754 8530 0306 3081 strh r0, [r6, #8] @ movhi - 298:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 8531 .loc 1 298 7 is_stmt 1 view .LVU2755 - 298:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 8532 .loc 1 298 14 is_stmt 0 view .LVU2756 + 299:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 8531 .loc 1 299 7 is_stmt 1 view .LVU2755 + 299:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 8532 .loc 1 299 14 is_stmt 0 view .LVU2756 8533 0308 0320 movs r0, #3 8534 030a FFF7FEFF bl MPhD_T 8535 .LVL662: - 299:Src/main.c **** (void) MPhD_T(4); - 8536 .loc 1 299 7 is_stmt 1 view .LVU2757 - 299:Src/main.c **** (void) MPhD_T(4); - 8537 .loc 1 299 32 is_stmt 0 view .LVU2758 + 300:Src/main.c **** (void) MPhD_T(4); + 8536 .loc 1 300 7 is_stmt 1 view .LVU2757 + 300:Src/main.c **** (void) MPhD_T(4); + 8537 .loc 1 300 32 is_stmt 0 view .LVU2758 8538 030e 0320 movs r0, #3 8539 0310 FFF7FEFF bl MPhD_T 8540 .LVL663: - 299:Src/main.c **** (void) MPhD_T(4); - 8541 .loc 1 299 30 discriminator 1 view .LVU2759 + 300:Src/main.c **** (void) MPhD_T(4); + 8541 .loc 1 300 30 discriminator 1 view .LVU2759 8542 0314 3880 strh r0, [r7] @ movhi - 300:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 8543 .loc 1 300 7 is_stmt 1 view .LVU2760 - 300:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 8544 .loc 1 300 14 is_stmt 0 view .LVU2761 + 301:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 8543 .loc 1 301 7 is_stmt 1 view .LVU2760 + 301:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 8544 .loc 1 301 14 is_stmt 0 view .LVU2761 8545 0316 0420 movs r0, #4 8546 0318 FFF7FEFF bl MPhD_T 8547 .LVL664: - 301:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8548 .loc 1 301 7 is_stmt 1 view .LVU2762 - 301:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8549 .loc 1 301 32 is_stmt 0 view .LVU2763 + 302:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8548 .loc 1 302 7 is_stmt 1 view .LVU2762 + 302:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8549 .loc 1 302 32 is_stmt 0 view .LVU2763 8550 031c 0420 movs r0, #4 8551 031e FFF7FEFF bl MPhD_T 8552 .LVL665: - 301:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8553 .loc 1 301 30 discriminator 1 view .LVU2764 + 302:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8553 .loc 1 302 30 discriminator 1 view .LVU2764 8554 0322 3080 strh r0, [r6] @ movhi - 302:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8555 .loc 1 302 7 is_stmt 1 view .LVU2765 - 302:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8556 .loc 1 302 14 is_stmt 0 view .LVU2766 + 303:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 8555 .loc 1 303 7 is_stmt 1 view .LVU2765 + 303:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 8556 .loc 1 303 14 is_stmt 0 view .LVU2766 8557 0324 DFF8D081 ldr r8, .L434+68 8558 0328 0122 movs r2, #1 8559 032a 3946 mov r1, r7 @@ -31796,22 +31797,22 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8561 032e FFF7FEFF bl PID_Controller_Temp 8562 .LVL666: 8563 0332 0146 mov r1, r0 - 302:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8564 .loc 1 302 13 discriminator 1 view .LVU2767 - ARM GAS /tmp/ccWQNJQt.s page 531 + 303:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + ARM GAS /tmp/ccO46DoU.s page 531 + 8564 .loc 1 303 13 discriminator 1 view .LVU2767 8565 0334 644D ldr r5, .L434+20 8566 0336 2880 strh r0, [r5] @ movhi - 303:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 8567 .loc 1 303 7 is_stmt 1 view .LVU2768 + 304:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 8567 .loc 1 304 7 is_stmt 1 view .LVU2768 8568 0338 0320 movs r0, #3 8569 033a FFF7FEFF bl Set_LTEC 8570 .LVL667: - 304:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8571 .loc 1 304 7 view .LVU2769 - 304:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8572 .loc 1 304 14 is_stmt 0 view .LVU2770 + 305:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 8571 .loc 1 305 7 view .LVU2769 + 305:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 8572 .loc 1 305 14 is_stmt 0 view .LVU2770 8573 033e DFF8B491 ldr r9, .L434+64 8574 0342 0222 movs r2, #2 8575 0344 3146 mov r1, r6 @@ -31819,371 +31820,371 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8577 0348 FFF7FEFF bl PID_Controller_Temp 8578 .LVL668: 8579 034c 0146 mov r1, r0 - 304:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8580 .loc 1 304 13 discriminator 1 view .LVU2771 + 305:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 8580 .loc 1 305 13 discriminator 1 view .LVU2771 8581 034e 2880 strh r0, [r5] @ movhi - 305:Src/main.c **** - 8582 .loc 1 305 7 is_stmt 1 view .LVU2772 + 306:Src/main.c **** + 8582 .loc 1 306 7 is_stmt 1 view .LVU2772 8583 0350 0420 movs r0, #4 8584 0352 FFF7FEFF bl Set_LTEC 8585 .LVL669: - 307:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8586 .loc 1 307 7 view .LVU2773 - 307:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8587 .loc 1 307 31 is_stmt 0 view .LVU2774 + 308:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 8586 .loc 1 308 7 view .LVU2773 + 308:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 8587 .loc 1 308 31 is_stmt 0 view .LVU2774 8588 0356 3B89 ldrh r3, [r7, #8] - 307:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8589 .loc 1 307 20 view .LVU2775 + 308:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 8589 .loc 1 308 20 view .LVU2775 8590 0358 5C4C ldr r4, .L434+24 8591 035a 6380 strh r3, [r4, #2] @ movhi - 308:Src/main.c **** - 8592 .loc 1 308 7 is_stmt 1 view .LVU2776 - 308:Src/main.c **** - 8593 .loc 1 308 31 is_stmt 0 view .LVU2777 + 309:Src/main.c **** + 8592 .loc 1 309 7 is_stmt 1 view .LVU2776 + 309:Src/main.c **** + 8593 .loc 1 309 31 is_stmt 0 view .LVU2777 8594 035c 3389 ldrh r3, [r6, #8] - 308:Src/main.c **** - 8595 .loc 1 308 20 view .LVU2778 + 309:Src/main.c **** + 8595 .loc 1 309 20 view .LVU2778 8596 035e A380 strh r3, [r4, #4] @ movhi - 310:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 8597 .loc 1 310 7 is_stmt 1 view .LVU2779 + 311:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 8597 .loc 1 311 7 is_stmt 1 view .LVU2779 8598 0360 B8F80C10 ldrh r1, [r8, #12] 8599 0364 0120 movs r0, #1 8600 0366 FFF7FEFF bl Set_LTEC 8601 .LVL670: - 311:Src/main.c **** - 8602 .loc 1 311 7 view .LVU2780 + 312:Src/main.c **** + 8602 .loc 1 312 7 view .LVU2780 8603 036a B9F80C10 ldrh r1, [r9, #12] 8604 036e 0220 movs r0, #2 8605 0370 FFF7FEFF bl Set_LTEC 8606 .LVL671: - 315:Src/main.c **** temp16 = Get_ADC(1); - 8607 .loc 1 315 7 view .LVU2781 - ARM GAS /tmp/ccWQNJQt.s page 532 + 316:Src/main.c **** temp16 = Get_ADC(1); + ARM GAS /tmp/ccO46DoU.s page 532 - 315:Src/main.c **** temp16 = Get_ADC(1); - 8608 .loc 1 315 16 is_stmt 0 view .LVU2782 + 8607 .loc 1 316 7 view .LVU2781 + 316:Src/main.c **** temp16 = Get_ADC(1); + 8608 .loc 1 316 16 is_stmt 0 view .LVU2782 8609 0374 0020 movs r0, #0 8610 0376 FFF7FEFF bl Get_ADC 8611 .LVL672: - 315:Src/main.c **** temp16 = Get_ADC(1); - 8612 .loc 1 315 14 discriminator 1 view .LVU2783 + 316:Src/main.c **** temp16 = Get_ADC(1); + 8612 .loc 1 316 14 discriminator 1 view .LVU2783 8613 037a 2880 strh r0, [r5] @ movhi - 316:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8614 .loc 1 316 7 is_stmt 1 view .LVU2784 - 316:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8615 .loc 1 316 16 is_stmt 0 view .LVU2785 + 317:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 8614 .loc 1 317 7 is_stmt 1 view .LVU2784 + 317:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 8615 .loc 1 317 16 is_stmt 0 view .LVU2785 8616 037c 0120 movs r0, #1 8617 037e FFF7FEFF bl Get_ADC 8618 .LVL673: - 316:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8619 .loc 1 316 14 discriminator 1 view .LVU2786 + 317:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 8619 .loc 1 317 14 discriminator 1 view .LVU2786 8620 0382 2880 strh r0, [r5] @ movhi - 317:Src/main.c **** - 8621 .loc 1 317 7 is_stmt 1 view .LVU2787 - 317:Src/main.c **** - 8622 .loc 1 317 20 is_stmt 0 view .LVU2788 + 318:Src/main.c **** + 8621 .loc 1 318 7 is_stmt 1 view .LVU2787 + 318:Src/main.c **** + 8622 .loc 1 318 20 is_stmt 0 view .LVU2788 8623 0384 E081 strh r0, [r4, #14] @ movhi - 320:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8624 .loc 1 320 7 is_stmt 1 view .LVU2789 - 320:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8625 .loc 1 320 16 is_stmt 0 view .LVU2790 + 321:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 8624 .loc 1 321 7 is_stmt 1 view .LVU2789 + 321:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 8625 .loc 1 321 16 is_stmt 0 view .LVU2790 8626 0386 0120 movs r0, #1 8627 0388 FFF7FEFF bl Get_ADC 8628 .LVL674: - 320:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8629 .loc 1 320 14 discriminator 1 view .LVU2791 + 321:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 8629 .loc 1 321 14 discriminator 1 view .LVU2791 8630 038c 2880 strh r0, [r5] @ movhi - 321:Src/main.c **** - 8631 .loc 1 321 7 is_stmt 1 view .LVU2792 - 321:Src/main.c **** - 8632 .loc 1 321 20 is_stmt 0 view .LVU2793 + 322:Src/main.c **** + 8631 .loc 1 322 7 is_stmt 1 view .LVU2792 + 322:Src/main.c **** + 8632 .loc 1 322 20 is_stmt 0 view .LVU2793 8633 038e 2082 strh r0, [r4, #16] @ movhi - 324:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8634 .loc 1 324 7 is_stmt 1 view .LVU2794 - 324:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8635 .loc 1 324 16 is_stmt 0 view .LVU2795 + 325:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 8634 .loc 1 325 7 is_stmt 1 view .LVU2794 + 325:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 8635 .loc 1 325 16 is_stmt 0 view .LVU2795 8636 0390 0120 movs r0, #1 8637 0392 FFF7FEFF bl Get_ADC 8638 .LVL675: - 324:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8639 .loc 1 324 14 discriminator 1 view .LVU2796 + 325:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 8639 .loc 1 325 14 discriminator 1 view .LVU2796 8640 0396 2880 strh r0, [r5] @ movhi - 325:Src/main.c **** - 8641 .loc 1 325 7 is_stmt 1 view .LVU2797 - 325:Src/main.c **** - 8642 .loc 1 325 20 is_stmt 0 view .LVU2798 + 326:Src/main.c **** + 8641 .loc 1 326 7 is_stmt 1 view .LVU2797 + 326:Src/main.c **** + 8642 .loc 1 326 20 is_stmt 0 view .LVU2798 8643 0398 6082 strh r0, [r4, #18] @ movhi - 328:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8644 .loc 1 328 7 is_stmt 1 view .LVU2799 - 328:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8645 .loc 1 328 16 is_stmt 0 view .LVU2800 - ARM GAS /tmp/ccWQNJQt.s page 533 + 329:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 8644 .loc 1 329 7 is_stmt 1 view .LVU2799 + 329:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + ARM GAS /tmp/ccO46DoU.s page 533 + 8645 .loc 1 329 16 is_stmt 0 view .LVU2800 8646 039a 0120 movs r0, #1 8647 039c FFF7FEFF bl Get_ADC 8648 .LVL676: - 328:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8649 .loc 1 328 14 discriminator 1 view .LVU2801 + 329:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 8649 .loc 1 329 14 discriminator 1 view .LVU2801 8650 03a0 2880 strh r0, [r5] @ movhi - 329:Src/main.c **** - 8651 .loc 1 329 7 is_stmt 1 view .LVU2802 - 329:Src/main.c **** - 8652 .loc 1 329 21 is_stmt 0 view .LVU2803 + 330:Src/main.c **** + 8651 .loc 1 330 7 is_stmt 1 view .LVU2802 + 330:Src/main.c **** + 8652 .loc 1 330 21 is_stmt 0 view .LVU2803 8653 03a2 A082 strh r0, [r4, #20] @ movhi - 332:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8654 .loc 1 332 7 is_stmt 1 view .LVU2804 - 332:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8655 .loc 1 332 16 is_stmt 0 view .LVU2805 + 333:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 8654 .loc 1 333 7 is_stmt 1 view .LVU2804 + 333:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 8655 .loc 1 333 16 is_stmt 0 view .LVU2805 8656 03a4 0120 movs r0, #1 8657 03a6 FFF7FEFF bl Get_ADC 8658 .LVL677: - 332:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8659 .loc 1 332 14 discriminator 1 view .LVU2806 + 333:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 8659 .loc 1 333 14 discriminator 1 view .LVU2806 8660 03aa 2880 strh r0, [r5] @ movhi - 333:Src/main.c **** temp16 = Get_ADC(2); - 8661 .loc 1 333 7 is_stmt 1 view .LVU2807 - 333:Src/main.c **** temp16 = Get_ADC(2); - 8662 .loc 1 333 21 is_stmt 0 view .LVU2808 + 334:Src/main.c **** temp16 = Get_ADC(2); + 8661 .loc 1 334 7 is_stmt 1 view .LVU2807 + 334:Src/main.c **** temp16 = Get_ADC(2); + 8662 .loc 1 334 21 is_stmt 0 view .LVU2808 8663 03ac E082 strh r0, [r4, #22] @ movhi - 334:Src/main.c **** - 8664 .loc 1 334 7 is_stmt 1 view .LVU2809 - 334:Src/main.c **** - 8665 .loc 1 334 16 is_stmt 0 view .LVU2810 + 335:Src/main.c **** + 8664 .loc 1 335 7 is_stmt 1 view .LVU2809 + 335:Src/main.c **** + 8665 .loc 1 335 16 is_stmt 0 view .LVU2810 8666 03ae 0220 movs r0, #2 8667 03b0 FFF7FEFF bl Get_ADC 8668 .LVL678: - 334:Src/main.c **** - 8669 .loc 1 334 14 discriminator 1 view .LVU2811 + 335:Src/main.c **** + 8669 .loc 1 335 14 discriminator 1 view .LVU2811 8670 03b4 2880 strh r0, [r5] @ movhi - 337:Src/main.c **** temp16 = Get_ADC(4); - 8671 .loc 1 337 7 is_stmt 1 view .LVU2812 - 337:Src/main.c **** temp16 = Get_ADC(4); - 8672 .loc 1 337 16 is_stmt 0 view .LVU2813 + 338:Src/main.c **** temp16 = Get_ADC(4); + 8671 .loc 1 338 7 is_stmt 1 view .LVU2812 + 338:Src/main.c **** temp16 = Get_ADC(4); + 8672 .loc 1 338 16 is_stmt 0 view .LVU2813 8673 03b6 0320 movs r0, #3 8674 03b8 FFF7FEFF bl Get_ADC 8675 .LVL679: - 337:Src/main.c **** temp16 = Get_ADC(4); - 8676 .loc 1 337 14 discriminator 1 view .LVU2814 + 338:Src/main.c **** temp16 = Get_ADC(4); + 8676 .loc 1 338 14 discriminator 1 view .LVU2814 8677 03bc 2880 strh r0, [r5] @ movhi - 338:Src/main.c **** Long_Data[12] = temp16; - 8678 .loc 1 338 7 is_stmt 1 view .LVU2815 - 338:Src/main.c **** Long_Data[12] = temp16; - 8679 .loc 1 338 16 is_stmt 0 view .LVU2816 + 339:Src/main.c **** Long_Data[12] = temp16; + 8678 .loc 1 339 7 is_stmt 1 view .LVU2815 + 339:Src/main.c **** Long_Data[12] = temp16; + 8679 .loc 1 339 16 is_stmt 0 view .LVU2816 8680 03be 0420 movs r0, #4 8681 03c0 FFF7FEFF bl Get_ADC 8682 .LVL680: - 338:Src/main.c **** Long_Data[12] = temp16; - 8683 .loc 1 338 14 discriminator 1 view .LVU2817 + 339:Src/main.c **** Long_Data[12] = temp16; + 8683 .loc 1 339 14 discriminator 1 view .LVU2817 8684 03c4 2880 strh r0, [r5] @ movhi - 339:Src/main.c **** temp16 = Get_ADC(5); - ARM GAS /tmp/ccWQNJQt.s page 534 + ARM GAS /tmp/ccO46DoU.s page 534 - 8685 .loc 1 339 7 is_stmt 1 view .LVU2818 - 339:Src/main.c **** temp16 = Get_ADC(5); - 8686 .loc 1 339 21 is_stmt 0 view .LVU2819 + 340:Src/main.c **** temp16 = Get_ADC(5); + 8685 .loc 1 340 7 is_stmt 1 view .LVU2818 + 340:Src/main.c **** temp16 = Get_ADC(5); + 8686 .loc 1 340 21 is_stmt 0 view .LVU2819 8687 03c6 2083 strh r0, [r4, #24] @ movhi - 340:Src/main.c **** - 8688 .loc 1 340 7 is_stmt 1 view .LVU2820 - 340:Src/main.c **** - 8689 .loc 1 340 16 is_stmt 0 view .LVU2821 + 341:Src/main.c **** + 8688 .loc 1 341 7 is_stmt 1 view .LVU2820 + 341:Src/main.c **** + 8689 .loc 1 341 16 is_stmt 0 view .LVU2821 8690 03c8 0520 movs r0, #5 8691 03ca FFF7FEFF bl Get_ADC 8692 .LVL681: - 340:Src/main.c **** - 8693 .loc 1 340 14 discriminator 1 view .LVU2822 + 341:Src/main.c **** + 8693 .loc 1 341 14 discriminator 1 view .LVU2822 8694 03ce 2880 strh r0, [r5] @ movhi - 343:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 8695 .loc 1 343 7 is_stmt 1 view .LVU2823 - 343:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 8696 .loc 1 343 16 is_stmt 0 view .LVU2824 + 344:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 8695 .loc 1 344 7 is_stmt 1 view .LVU2823 + 344:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 8696 .loc 1 344 16 is_stmt 0 view .LVU2824 8697 03d0 3F4B ldr r3, .L434+28 8698 03d2 1B68 ldr r3, [r3] 8699 03d4 3F4A ldr r2, .L434+32 8700 03d6 1360 str r3, [r2] - 344:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 8701 .loc 1 344 7 is_stmt 1 view .LVU2825 - 344:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 8702 .loc 1 344 20 is_stmt 0 view .LVU2826 + 345:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 8701 .loc 1 345 7 is_stmt 1 view .LVU2825 + 345:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 8702 .loc 1 345 20 is_stmt 0 view .LVU2826 8703 03d8 E380 strh r3, [r4, #6] @ movhi - 345:Src/main.c **** - 8704 .loc 1 345 7 is_stmt 1 view .LVU2827 - 345:Src/main.c **** - 8705 .loc 1 345 31 is_stmt 0 view .LVU2828 + 346:Src/main.c **** + 8704 .loc 1 346 7 is_stmt 1 view .LVU2827 + 346:Src/main.c **** + 8705 .loc 1 346 31 is_stmt 0 view .LVU2828 8706 03da 1B0C lsrs r3, r3, #16 - 345:Src/main.c **** - 8707 .loc 1 345 20 view .LVU2829 + 346:Src/main.c **** + 8707 .loc 1 346 20 view .LVU2829 8708 03dc 2381 strh r3, [r4, #8] @ movhi - 348:Src/main.c **** - 8709 .loc 1 348 7 is_stmt 1 view .LVU2830 - 348:Src/main.c **** - 8710 .loc 1 348 31 is_stmt 0 view .LVU2831 + 349:Src/main.c **** + 8709 .loc 1 349 7 is_stmt 1 view .LVU2830 + 349:Src/main.c **** + 8710 .loc 1 349 31 is_stmt 0 view .LVU2831 8711 03de 3B88 ldrh r3, [r7] - 348:Src/main.c **** - 8712 .loc 1 348 20 view .LVU2832 + 349:Src/main.c **** + 8712 .loc 1 349 20 view .LVU2832 8713 03e0 6381 strh r3, [r4, #10] @ movhi - 351:Src/main.c **** - 8714 .loc 1 351 7 is_stmt 1 view .LVU2833 - 351:Src/main.c **** - 8715 .loc 1 351 31 is_stmt 0 view .LVU2834 + 352:Src/main.c **** + 8714 .loc 1 352 7 is_stmt 1 view .LVU2833 + 352:Src/main.c **** + 8715 .loc 1 352 31 is_stmt 0 view .LVU2834 8716 03e2 3388 ldrh r3, [r6] - 351:Src/main.c **** - 8717 .loc 1 351 20 view .LVU2835 + 352:Src/main.c **** + 8717 .loc 1 352 20 view .LVU2835 8718 03e4 A381 strh r3, [r4, #12] @ movhi - 353:Src/main.c **** { - 8719 .loc 1 353 7 is_stmt 1 view .LVU2836 - 353:Src/main.c **** { - 8720 .loc 1 353 21 is_stmt 0 view .LVU2837 + 354:Src/main.c **** { + 8719 .loc 1 354 7 is_stmt 1 view .LVU2836 + 354:Src/main.c **** { + 8720 .loc 1 354 21 is_stmt 0 view .LVU2837 8721 03e6 3C4B ldr r3, .L434+36 + ARM GAS /tmp/ccO46DoU.s page 535 + + 8722 03e8 DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 - ARM GAS /tmp/ccWQNJQt.s page 535 - - - 353:Src/main.c **** { - 8723 .loc 1 353 10 view .LVU2838 + 354:Src/main.c **** { + 8723 .loc 1 354 10 view .LVU2838 8724 03ea 012B cmp r3, #1 8725 03ec 03D0 beq .L426 8726 .L389: - 360:Src/main.c **** } - 8727 .loc 1 360 7 is_stmt 1 view .LVU2839 - 360:Src/main.c **** } - 8728 .loc 1 360 21 is_stmt 0 view .LVU2840 + 361:Src/main.c **** } + 8727 .loc 1 361 7 is_stmt 1 view .LVU2839 + 361:Src/main.c **** } + 8728 .loc 1 361 21 is_stmt 0 view .LVU2840 8729 03ee 3B4B ldr r3, .L434+40 8730 03f0 0722 movs r2, #7 8731 03f2 1A70 strb r2, [r3] 8732 03f4 7DE6 b .L373 8733 .L426: - 355:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8734 .loc 1 355 8 is_stmt 1 view .LVU2841 - 355:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8735 .loc 1 355 20 is_stmt 0 view .LVU2842 + 356:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 8734 .loc 1 356 8 is_stmt 1 view .LVU2841 + 356:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 8735 .loc 1 356 20 is_stmt 0 view .LVU2842 8736 03f6 0234 adds r4, r4, #2 8737 03f8 0D21 movs r1, #13 8738 03fa 2046 mov r0, r4 8739 03fc FFF7FEFF bl CalculateChecksum 8740 .LVL682: 8741 0400 0346 mov r3, r0 - 355:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8742 .loc 1 355 18 discriminator 1 view .LVU2843 + 356:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 8742 .loc 1 356 18 discriminator 1 view .LVU2843 8743 0402 374A ldr r2, .L434+44 8744 0404 1080 strh r0, [r2] @ movhi - 356:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 8745 .loc 1 356 8 is_stmt 1 view .LVU2844 - 356:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 8746 .loc 1 356 27 is_stmt 0 view .LVU2845 + 357:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 8745 .loc 1 357 8 is_stmt 1 view .LVU2844 + 357:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 8746 .loc 1 357 27 is_stmt 0 view .LVU2845 8747 0406 A01E subs r0, r4, #2 8748 0408 8383 strh r3, [r0, #28] @ movhi - 357:Src/main.c **** State_Data[0]|=temp16&0xff; - 8749 .loc 1 357 8 is_stmt 1 view .LVU2846 - 357:Src/main.c **** State_Data[0]|=temp16&0xff; - 8750 .loc 1 357 17 is_stmt 0 view .LVU2847 + 358:Src/main.c **** State_Data[0]|=temp16&0xff; + 8749 .loc 1 358 8 is_stmt 1 view .LVU2846 + 358:Src/main.c **** State_Data[0]|=temp16&0xff; + 8750 .loc 1 358 17 is_stmt 0 view .LVU2847 8751 040a FFF7FEFF bl SD_SAVE 8752 .LVL683: 8753 040e 0346 mov r3, r0 - 357:Src/main.c **** State_Data[0]|=temp16&0xff; - 8754 .loc 1 357 15 discriminator 1 view .LVU2848 + 358:Src/main.c **** State_Data[0]|=temp16&0xff; + 8754 .loc 1 358 15 discriminator 1 view .LVU2848 8755 0410 2880 strh r0, [r5] @ movhi - 358:Src/main.c **** } - 8756 .loc 1 358 8 is_stmt 1 view .LVU2849 - 358:Src/main.c **** } - 8757 .loc 1 358 18 is_stmt 0 view .LVU2850 + 359:Src/main.c **** } + 8756 .loc 1 359 8 is_stmt 1 view .LVU2849 + 359:Src/main.c **** } + 8757 .loc 1 359 18 is_stmt 0 view .LVU2850 8758 0412 3449 ldr r1, .L434+48 8759 0414 0A78 ldrb r2, [r1] @ zero_extendqisi2 - 358:Src/main.c **** } - 8760 .loc 1 358 21 view .LVU2851 + 359:Src/main.c **** } + 8760 .loc 1 359 21 view .LVU2851 8761 0416 1343 orrs r3, r3, r2 8762 0418 0B70 strb r3, [r1] 8763 041a E8E7 b .L389 8764 .L376: - 364:Src/main.c **** { - ARM GAS /tmp/ccWQNJQt.s page 536 + ARM GAS /tmp/ccO46DoU.s page 536 - 8765 .loc 1 364 6 is_stmt 1 view .LVU2852 - 364:Src/main.c **** { - 8766 .loc 1 364 10 is_stmt 0 view .LVU2853 + 365:Src/main.c **** { + 8765 .loc 1 365 6 is_stmt 1 view .LVU2852 + 365:Src/main.c **** { + 8766 .loc 1 365 10 is_stmt 0 view .LVU2853 8767 041c 3248 ldr r0, .L434+52 8768 041e FFF7FEFF bl CheckChecksum 8769 .LVL684: - 364:Src/main.c **** { - 8770 .loc 1 364 9 discriminator 1 view .LVU2854 + 365:Src/main.c **** { + 8770 .loc 1 365 9 discriminator 1 view .LVU2854 8771 0422 70B9 cbnz r0, .L427 - 373:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8772 .loc 1 373 7 is_stmt 1 view .LVU2855 - 373:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8773 .loc 1 373 17 is_stmt 0 view .LVU2856 + 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8772 .loc 1 374 7 is_stmt 1 view .LVU2855 + 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8773 .loc 1 374 17 is_stmt 0 view .LVU2856 8774 0424 2F4A ldr r2, .L434+48 8775 0426 1378 ldrb r3, [r2] @ zero_extendqisi2 - 373:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8776 .loc 1 373 21 view .LVU2857 + 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8776 .loc 1 374 21 view .LVU2857 8777 0428 43F00403 orr r3, r3, #4 8778 042c 1370 strb r3, [r2] - 374:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8779 .loc 1 374 7 is_stmt 1 view .LVU2858 - 374:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8780 .loc 1 374 17 is_stmt 0 view .LVU2859 + 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8779 .loc 1 375 7 is_stmt 1 view .LVU2858 + 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8780 .loc 1 375 17 is_stmt 0 view .LVU2859 8781 042e 2F4B ldr r3, .L434+56 8782 0430 0222 movs r2, #2 8783 0432 1A70 strb r2, [r3] - 375:Src/main.c **** } - 8784 .loc 1 375 7 is_stmt 1 view .LVU2860 - 375:Src/main.c **** } - 8785 .loc 1 375 21 is_stmt 0 view .LVU2861 + 376:Src/main.c **** } + 8784 .loc 1 376 7 is_stmt 1 view .LVU2860 + 376:Src/main.c **** } + 8785 .loc 1 376 21 is_stmt 0 view .LVU2861 8786 0434 294B ldr r3, .L434+40 8787 0436 0022 movs r2, #0 8788 0438 1A70 strb r2, [r3] 8789 .L391: - 377:Src/main.c **** break; - 8790 .loc 1 377 6 is_stmt 1 view .LVU2862 - 377:Src/main.c **** break; - 8791 .loc 1 377 32 is_stmt 0 view .LVU2863 + 378:Src/main.c **** break; + 8790 .loc 1 378 6 is_stmt 1 view .LVU2862 + 378:Src/main.c **** break; + 8791 .loc 1 378 32 is_stmt 0 view .LVU2863 8792 043a 2D4B ldr r3, .L434+60 8793 043c 0122 movs r2, #1 8794 043e 1A70 strb r2, [r3] - 378:Src/main.c **** case RUN_TASK: - 8795 .loc 1 378 5 is_stmt 1 view .LVU2864 + 379:Src/main.c **** case RUN_TASK: + 8795 .loc 1 379 5 is_stmt 1 view .LVU2864 8796 0440 57E6 b .L373 8797 .L427: - 366:Src/main.c **** TO6_before = TO6; - 8798 .loc 1 366 7 view .LVU2865 + 367:Src/main.c **** TO6_before = TO6; + 8798 .loc 1 367 7 view .LVU2865 8799 0442 254B ldr r3, .L434+36 8800 0444 2B4A ldr r2, .L434+64 8801 0446 2C49 ldr r1, .L434+68 8802 0448 2748 ldr r0, .L434+52 8803 044a FFF7FEFF bl Decode_task 8804 .LVL685: - 367:Src/main.c **** CPU_state = RUN_TASK; - 8805 .loc 1 367 7 view .LVU2866 - 367:Src/main.c **** CPU_state = RUN_TASK; - 8806 .loc 1 367 18 is_stmt 0 view .LVU2867 - ARM GAS /tmp/ccWQNJQt.s page 537 + 368:Src/main.c **** CPU_state = RUN_TASK; + 8805 .loc 1 368 7 view .LVU2866 + 368:Src/main.c **** CPU_state = RUN_TASK; + ARM GAS /tmp/ccO46DoU.s page 537 + 8806 .loc 1 368 18 is_stmt 0 view .LVU2867 8807 044e 204B ldr r3, .L434+28 8808 0450 1A68 ldr r2, [r3] 8809 0452 2A4B ldr r3, .L434+72 8810 0454 1A60 str r2, [r3] - 368:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 8811 .loc 1 368 7 is_stmt 1 view .LVU2868 - 368:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 8812 .loc 1 368 17 is_stmt 0 view .LVU2869 + 369:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 8811 .loc 1 369 7 is_stmt 1 view .LVU2868 + 369:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 8812 .loc 1 369 17 is_stmt 0 view .LVU2869 8813 0456 0923 movs r3, #9 8814 0458 244A ldr r2, .L434+56 8815 045a 1370 strb r3, [r2] - 369:Src/main.c **** } - 8816 .loc 1 369 7 is_stmt 1 view .LVU2870 - 369:Src/main.c **** } - 8817 .loc 1 369 21 is_stmt 0 view .LVU2871 + 370:Src/main.c **** } + 8816 .loc 1 370 7 is_stmt 1 view .LVU2870 + 370:Src/main.c **** } + 8817 .loc 1 370 21 is_stmt 0 view .LVU2871 8818 045c 1F4A ldr r2, .L434+40 8819 045e 1370 strb r3, [r2] 8820 0460 EBE7 b .L391 8821 .L374: - 380:Src/main.c **** { - 8822 .loc 1 380 6 is_stmt 1 view .LVU2872 - 380:Src/main.c **** { - 8823 .loc 1 380 18 is_stmt 0 view .LVU2873 + 381:Src/main.c **** { + 8822 .loc 1 381 6 is_stmt 1 view .LVU2872 + 381:Src/main.c **** { + 8823 .loc 1 381 18 is_stmt 0 view .LVU2873 8824 0462 144B ldr r3, .L434 8825 0464 1B78 ldrb r3, [r3] @ zero_extendqisi2 8826 0466 012B cmp r3, #1 @@ -32191,75 +32192,75 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8828 046a 022B cmp r3, #2 8829 046c 00F03781 beq .L393 8830 .L394: - 635:Src/main.c **** { - 8831 .loc 1 635 6 is_stmt 1 view .LVU2874 - 635:Src/main.c **** { - 8832 .loc 1 635 13 is_stmt 0 view .LVU2875 + 636:Src/main.c **** { + 8831 .loc 1 636 6 is_stmt 1 view .LVU2874 + 636:Src/main.c **** { + 8832 .loc 1 636 13 is_stmt 0 view .LVU2875 8833 0470 114B ldr r3, .L434+4 8834 0472 1B68 ldr r3, [r3] 8835 0474 114A ldr r2, .L434+8 8836 0476 1268 ldr r2, [r2] - 635:Src/main.c **** { - 8837 .loc 1 635 9 view .LVU2876 + 636:Src/main.c **** { + 8837 .loc 1 636 9 view .LVU2876 8838 0478 9342 cmp r3, r2 8839 047a 00F20882 bhi .L428 8840 .L411: - 687:Src/main.c **** - 8841 .loc 1 687 13 is_stmt 1 discriminator 1 view .LVU2877 + 688:Src/main.c **** + 8841 .loc 1 688 13 is_stmt 1 discriminator 1 view .LVU2877 8842 047e 204B ldr r3, .L434+76 8843 0480 1B78 ldrb r3, [r3] @ zero_extendqisi2 8844 0482 002B cmp r3, #0 8845 0484 FBD0 beq .L411 - 689:Src/main.c **** - 8846 .loc 1 689 6 view .LVU2878 + 690:Src/main.c **** + 8846 .loc 1 690 6 view .LVU2878 8847 0486 FFF7FEFF bl Stop_TIM10 8848 .LVL686: - 691:Src/main.c **** { - 8849 .loc 1 691 6 view .LVU2879 - 691:Src/main.c **** { - 8850 .loc 1 691 14 is_stmt 0 view .LVU2880 - ARM GAS /tmp/ccWQNJQt.s page 538 + 692:Src/main.c **** { + 8849 .loc 1 692 6 view .LVU2879 + 692:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 538 + 8850 .loc 1 692 14 is_stmt 0 view .LVU2880 8851 048a 0A4B ldr r3, .L434 8852 048c DB8A ldrh r3, [r3, #22] - 691:Src/main.c **** { - 8853 .loc 1 691 9 view .LVU2881 + 692:Src/main.c **** { + 8853 .loc 1 692 9 view .LVU2881 8854 048e 032B cmp r3, #3 8855 0490 0BD9 bls .L412 - 693:Src/main.c **** TO10_counter = task.dt / 10; - 8856 .loc 1 693 7 is_stmt 1 view .LVU2882 - 693:Src/main.c **** TO10_counter = task.dt / 10; - 8857 .loc 1 693 26 is_stmt 0 view .LVU2883 + 694:Src/main.c **** TO10_counter = task.dt / 10; + 8856 .loc 1 694 7 is_stmt 1 view .LVU2882 + 694:Src/main.c **** TO10_counter = task.dt / 10; + 8857 .loc 1 694 26 is_stmt 0 view .LVU2883 8858 0492 1C4B ldr r3, .L434+80 8859 0494 1A68 ldr r2, [r3] 8860 0496 1C4B ldr r3, .L434+84 8861 0498 DA60 str r2, [r3, #12] - 694:Src/main.c **** } - 8862 .loc 1 694 7 is_stmt 1 view .LVU2884 - 694:Src/main.c **** } - 8863 .loc 1 694 26 is_stmt 0 view .LVU2885 + 695:Src/main.c **** } + 8862 .loc 1 695 7 is_stmt 1 view .LVU2884 + 695:Src/main.c **** } + 8863 .loc 1 695 26 is_stmt 0 view .LVU2885 8864 049a 064B ldr r3, .L434 8865 049c 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 - 694:Src/main.c **** } - 8866 .loc 1 694 30 view .LVU2886 + 695:Src/main.c **** } + 8866 .loc 1 695 30 view .LVU2886 8867 049e 1B4A ldr r2, .L434+88 8868 04a0 A2FB0323 umull r2, r3, r2, r3 8869 04a4 DB08 lsrs r3, r3, #3 - 694:Src/main.c **** } - 8870 .loc 1 694 20 view .LVU2887 + 695:Src/main.c **** } + 8870 .loc 1 695 20 view .LVU2887 8871 04a6 1A4A ldr r2, .L434+92 8872 04a8 1360 str r3, [r2] 8873 .L412: - 697:Src/main.c **** break; - 8874 .loc 1 697 6 is_stmt 1 view .LVU2888 - 697:Src/main.c **** break; - 8875 .loc 1 697 20 is_stmt 0 view .LVU2889 + 698:Src/main.c **** break; + 8874 .loc 1 698 6 is_stmt 1 view .LVU2888 + 698:Src/main.c **** break; + 8875 .loc 1 698 20 is_stmt 0 view .LVU2889 8876 04aa 0C4B ldr r3, .L434+40 8877 04ac 0922 movs r2, #9 8878 04ae 1A70 strb r2, [r3] - 698:Src/main.c **** } - 8879 .loc 1 698 9 is_stmt 1 view .LVU2890 + 699:Src/main.c **** } + 8879 .loc 1 699 9 is_stmt 1 view .LVU2890 8880 04b0 1FE6 b .L373 8881 .L435: 8882 04b2 00BF .align 2 @@ -32277,10 +32278,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8894 04dc 00000000 .word CPU_state_old 8895 04e0 00000000 .word CS_result 8896 04e4 00000000 .word State_Data + ARM GAS /tmp/ccO46DoU.s page 539 + + 8897 04e8 00000000 .word COMMAND - ARM GAS /tmp/ccWQNJQt.s page 539 - - 8898 04ec 00000000 .word CPU_state 8899 04f0 00000000 .word UART_transmission_request 8900 04f4 00000000 .word LD2_curr_setup @@ -32293,739 +32294,739 @@ ARM GAS /tmp/ccWQNJQt.s page 1 8907 0510 00000000 .word TO10_counter 8908 .L392: 8909 .LBB577: - 402:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8910 .loc 1 402 7 view .LVU2891 - 402:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8911 .loc 1 402 38 is_stmt 0 view .LVU2892 + 403:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 8910 .loc 1 403 7 view .LVU2891 + 403:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 8911 .loc 1 403 38 is_stmt 0 view .LVU2892 8912 0514 AD4B ldr r3, .L436 8913 0516 D3ED077A vldr.32 s15, [r3, #28] - 402:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8914 .loc 1 402 7 view .LVU2893 + 403:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 8914 .loc 1 403 7 view .LVU2893 8915 051a FCEEE77A vcvt.u32.f32 s15, s15 8916 051e 17EE903A vmov r3, s15 @ int 8917 0522 99B2 uxth r1, r3 8918 0524 0220 movs r0, #2 8919 0526 FFF7FEFF bl Set_LTEC 8920 .LVL687: - 403:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 8921 .loc 1 403 7 is_stmt 1 view .LVU2894 - 403:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 8922 .loc 1 403 14 is_stmt 0 view .LVU2895 + 404:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 8921 .loc 1 404 7 is_stmt 1 view .LVU2894 + 404:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 8922 .loc 1 404 14 is_stmt 0 view .LVU2895 8923 052a 0320 movs r0, #3 8924 052c FFF7FEFF bl MPhD_T 8925 .LVL688: - 404:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8926 .loc 1 404 7 is_stmt 1 view .LVU2896 - 404:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8927 .loc 1 404 32 is_stmt 0 view .LVU2897 + 405:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 8926 .loc 1 405 7 is_stmt 1 view .LVU2896 + 405:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 8927 .loc 1 405 32 is_stmt 0 view .LVU2897 8928 0530 0320 movs r0, #3 8929 0532 FFF7FEFF bl MPhD_T 8930 .LVL689: - 404:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8931 .loc 1 404 30 discriminator 1 view .LVU2898 + 405:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 8931 .loc 1 405 30 discriminator 1 view .LVU2898 8932 0536 A64C ldr r4, .L436+4 8933 0538 2080 strh r0, [r4] @ movhi - 405:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 8934 .loc 1 405 7 is_stmt 1 view .LVU2899 - 405:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 8935 .loc 1 405 14 is_stmt 0 view .LVU2900 + 406:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 8934 .loc 1 406 7 is_stmt 1 view .LVU2899 + 406:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 8935 .loc 1 406 14 is_stmt 0 view .LVU2900 8936 053a 0420 movs r0, #4 8937 053c FFF7FEFF bl MPhD_T 8938 .LVL690: - 406:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8939 .loc 1 406 7 is_stmt 1 view .LVU2901 - 406:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8940 .loc 1 406 32 is_stmt 0 view .LVU2902 + 407:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8939 .loc 1 407 7 is_stmt 1 view .LVU2901 + 407:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8940 .loc 1 407 32 is_stmt 0 view .LVU2902 8941 0540 0420 movs r0, #4 + ARM GAS /tmp/ccO46DoU.s page 540 + + 8942 0542 FFF7FEFF bl MPhD_T - ARM GAS /tmp/ccWQNJQt.s page 540 - - 8943 .LVL691: - 406:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8944 .loc 1 406 30 discriminator 1 view .LVU2903 + 407:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8944 .loc 1 407 30 discriminator 1 view .LVU2903 8945 0546 A34D ldr r5, .L436+8 8946 0548 2880 strh r0, [r5] @ movhi - 407:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8947 .loc 1 407 7 is_stmt 1 view .LVU2904 - 407:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8948 .loc 1 407 14 is_stmt 0 view .LVU2905 + 408:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 8947 .loc 1 408 7 is_stmt 1 view .LVU2904 + 408:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 8948 .loc 1 408 14 is_stmt 0 view .LVU2905 8949 054a 0122 movs r2, #1 8950 054c 2146 mov r1, r4 8951 054e A248 ldr r0, .L436+12 8952 0550 FFF7FEFF bl PID_Controller_Temp 8953 .LVL692: 8954 0554 0146 mov r1, r0 - 407:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8955 .loc 1 407 13 discriminator 1 view .LVU2906 + 408:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 8955 .loc 1 408 13 discriminator 1 view .LVU2906 8956 0556 A14C ldr r4, .L436+16 8957 0558 2080 strh r0, [r4] @ movhi - 408:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 8958 .loc 1 408 7 is_stmt 1 view .LVU2907 + 409:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 8958 .loc 1 409 7 is_stmt 1 view .LVU2907 8959 055a 0320 movs r0, #3 8960 055c FFF7FEFF bl Set_LTEC 8961 .LVL693: - 409:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8962 .loc 1 409 7 view .LVU2908 - 409:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8963 .loc 1 409 14 is_stmt 0 view .LVU2909 + 410:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 8962 .loc 1 410 7 view .LVU2908 + 410:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 8963 .loc 1 410 14 is_stmt 0 view .LVU2909 8964 0560 0222 movs r2, #2 8965 0562 2946 mov r1, r5 8966 0564 9E48 ldr r0, .L436+20 8967 0566 FFF7FEFF bl PID_Controller_Temp 8968 .LVL694: 8969 056a 0146 mov r1, r0 - 409:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8970 .loc 1 409 13 discriminator 1 view .LVU2910 + 410:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 8970 .loc 1 410 13 discriminator 1 view .LVU2910 8971 056c 2080 strh r0, [r4] @ movhi - 410:Src/main.c **** - 8972 .loc 1 410 7 is_stmt 1 view .LVU2911 + 411:Src/main.c **** + 8972 .loc 1 411 7 is_stmt 1 view .LVU2911 8973 056e 0420 movs r0, #4 8974 0570 FFF7FEFF bl Set_LTEC 8975 .LVL695: - 413:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 8976 .loc 1 413 7 view .LVU2912 + 414:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 8976 .loc 1 414 7 view .LVU2912 8977 0574 9B4C ldr r4, .L436+24 8978 0576 0122 movs r2, #1 8979 0578 8021 movs r1, #128 8980 057a 2046 mov r0, r4 8981 057c FFF7FEFF bl HAL_GPIO_WritePin 8982 .LVL696: - 414:Src/main.c **** - 8983 .loc 1 414 7 view .LVU2913 + 415:Src/main.c **** + 8983 .loc 1 415 7 view .LVU2913 8984 0580 0022 movs r2, #0 8985 0582 8021 movs r1, #128 8986 0584 2046 mov r0, r4 8987 0586 FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccO46DoU.s page 541 + + 8988 .LVL697: - ARM GAS /tmp/ccWQNJQt.s page 541 - - - 416:Src/main.c **** if (st != HAL_OK) - 8989 .loc 1 416 7 view .LVU2914 - 416:Src/main.c **** if (st != HAL_OK) - 8990 .loc 1 416 12 is_stmt 0 view .LVU2915 + 417:Src/main.c **** if (st != HAL_OK) + 8989 .loc 1 417 7 view .LVU2914 + 417:Src/main.c **** if (st != HAL_OK) + 8990 .loc 1 417 12 is_stmt 0 view .LVU2915 8991 058a 9748 ldr r0, .L436+28 8992 058c FFF7FEFF bl HAL_TIM_Base_Start_IT 8993 .LVL698: - 417:Src/main.c **** while(1); - 8994 .loc 1 417 7 is_stmt 1 view .LVU2916 - 417:Src/main.c **** while(1); - 8995 .loc 1 417 10 is_stmt 0 view .LVU2917 + 418:Src/main.c **** while(1); + 8994 .loc 1 418 7 is_stmt 1 view .LVU2916 + 418:Src/main.c **** while(1); + 8995 .loc 1 418 10 is_stmt 0 view .LVU2917 8996 0590 0028 cmp r0, #0 8997 0592 75D1 bne .L396 - 420:Src/main.c **** uint16_t trigger_counter = 0; - 8998 .loc 1 420 7 is_stmt 1 view .LVU2918 + 421:Src/main.c **** uint16_t trigger_counter = 0; + 8998 .loc 1 421 7 is_stmt 1 view .LVU2918 8999 .LVL699: - 421:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 9000 .loc 1 421 7 view .LVU2919 - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9001 .loc 1 422 7 view .LVU2920 - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9002 .loc 1 422 47 is_stmt 0 view .LVU2921 + 422:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 9000 .loc 1 422 7 view .LVU2919 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9001 .loc 1 423 7 view .LVU2920 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9002 .loc 1 423 47 is_stmt 0 view .LVU2921 9003 0594 8D4B ldr r3, .L436 9004 0596 93ED027A vldr.32 s14, [r3, #8] - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9005 .loc 1 422 64 view .LVU2922 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9005 .loc 1 423 64 view .LVU2922 9006 059a D3ED047A vldr.32 s15, [r3, #16] - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9007 .loc 1 422 58 view .LVU2923 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9007 .loc 1 423 58 view .LVU2923 9008 059e 37EE677A vsub.f32 s14, s14, s15 - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9009 .loc 1 422 84 view .LVU2924 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9009 .loc 1 423 84 view .LVU2924 9010 05a2 D3ED036A vldr.32 s13, [r3, #12] - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9011 .loc 1 422 79 view .LVU2925 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9011 .loc 1 423 79 view .LVU2925 9012 05a6 C7EE267A vdiv.f32 s15, s14, s13 - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9013 .loc 1 422 97 view .LVU2926 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9013 .loc 1 423 97 view .LVU2926 9014 05aa B2EE047A vmov.f32 s14, #1.0e+1 9015 05ae 67EE877A vmul.f32 s15, s15, s14 - 422:Src/main.c **** uint16_t task_sheduler = 0; - 9016 .loc 1 422 31 view .LVU2927 + 423:Src/main.c **** uint16_t task_sheduler = 0; + 9016 .loc 1 423 31 view .LVU2927 9017 05b2 FCEEE77A vcvt.u32.f32 s15, s15 9018 05b6 CDED017A vstr.32 s15, [sp, #4] @ int 9019 05ba 9DF80460 ldrb r6, [sp, #4] @ zero_extendqisi2 9020 .LVL700: - 423:Src/main.c **** - 9021 .loc 1 423 7 is_stmt 1 view .LVU2928 - 427:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 9022 .loc 1 427 7 view .LVU2929 + 424:Src/main.c **** + 9021 .loc 1 424 7 is_stmt 1 view .LVU2928 + 428:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 9022 .loc 1 428 7 view .LVU2929 9023 05be DFF85492 ldr r9, .L436+72 9024 05c2 0021 movs r1, #0 9025 05c4 4846 mov r0, r9 9026 .LVL701: - 427:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 9027 .loc 1 427 7 is_stmt 0 view .LVU2930 + 428:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 9027 .loc 1 428 7 is_stmt 0 view .LVU2930 + ARM GAS /tmp/ccO46DoU.s page 542 + + 9028 05c6 FFF7FEFF bl HAL_TIM_PWM_Stop - ARM GAS /tmp/ccWQNJQt.s page 542 - - 9029 .LVL702: - 428:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9030 .loc 1 428 7 is_stmt 1 view .LVU2931 + 429:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9030 .loc 1 429 7 is_stmt 1 view .LVU2931 9031 05ca DFF84C82 ldr r8, .L436+76 9032 05ce 0821 movs r1, #8 9033 05d0 4046 mov r0, r8 9034 05d2 FFF7FEFF bl HAL_TIM_PWM_Stop 9035 .LVL703: - 429:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9036 .loc 1 429 7 view .LVU2932 - 429:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9037 .loc 1 429 13 is_stmt 0 view .LVU2933 + 430:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9036 .loc 1 430 7 view .LVU2932 + 430:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9037 .loc 1 430 13 is_stmt 0 view .LVU2933 9038 05d6 854F ldr r7, .L436+32 9039 05d8 3B68 ldr r3, [r7] - 429:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9040 .loc 1 429 20 view .LVU2934 + 430:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9040 .loc 1 430 20 view .LVU2934 9041 05da 23F00803 bic r3, r3, #8 9042 05de 3B60 str r3, [r7] - 430:Src/main.c **** - 9043 .loc 1 430 7 is_stmt 1 view .LVU2935 - 430:Src/main.c **** - 9044 .loc 1 430 12 is_stmt 0 view .LVU2936 + 431:Src/main.c **** + 9043 .loc 1 431 7 is_stmt 1 view .LVU2935 + 431:Src/main.c **** + 9044 .loc 1 431 12 is_stmt 0 view .LVU2936 9045 05e0 834D ldr r5, .L436+36 9046 05e2 2B68 ldr r3, [r5] - 430:Src/main.c **** - 9047 .loc 1 430 19 view .LVU2937 + 431:Src/main.c **** + 9047 .loc 1 431 19 view .LVU2937 9048 05e4 23F00803 bic r3, r3, #8 9049 05e8 2B60 str r3, [r5] - 434:Src/main.c **** TIM4 -> CNT = 0; - 9050 .loc 1 434 7 is_stmt 1 view .LVU2938 - 434:Src/main.c **** TIM4 -> CNT = 0; - 9051 .loc 1 434 20 is_stmt 0 view .LVU2939 + 435:Src/main.c **** TIM4 -> CNT = 0; + 9050 .loc 1 435 7 is_stmt 1 view .LVU2938 + 435:Src/main.c **** TIM4 -> CNT = 0; + 9051 .loc 1 435 20 is_stmt 0 view .LVU2939 9052 05ea 0024 movs r4, #0 9053 05ec 7C62 str r4, [r7, #36] - 435:Src/main.c **** - 9054 .loc 1 435 7 is_stmt 1 view .LVU2940 - 435:Src/main.c **** - 9055 .loc 1 435 19 is_stmt 0 view .LVU2941 + 436:Src/main.c **** + 9054 .loc 1 436 7 is_stmt 1 view .LVU2940 + 436:Src/main.c **** + 9055 .loc 1 436 19 is_stmt 0 view .LVU2941 9056 05ee 6C62 str r4, [r5, #36] - 437:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 9057 .loc 1 437 7 is_stmt 1 view .LVU2942 + 438:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 9057 .loc 1 438 7 is_stmt 1 view .LVU2942 9058 05f0 2146 mov r1, r4 9059 05f2 4846 mov r0, r9 9060 05f4 FFF7FEFF bl HAL_TIM_PWM_Start 9061 .LVL704: - 438:Src/main.c **** //TIM4 -> CNT = 0; - 9062 .loc 1 438 7 view .LVU2943 + 439:Src/main.c **** //TIM4 -> CNT = 0; + 9062 .loc 1 439 7 view .LVU2943 9063 05f8 0821 movs r1, #8 9064 05fa 4046 mov r0, r8 9065 05fc FFF7FEFF bl HAL_TIM_PWM_Start 9066 .LVL705: - 441:Src/main.c **** TIM11 -> CNT = 0; - 9067 .loc 1 441 7 view .LVU2944 - 441:Src/main.c **** TIM11 -> CNT = 0; - 9068 .loc 1 441 26 is_stmt 0 view .LVU2945 + 442:Src/main.c **** TIM11 -> CNT = 0; + 9067 .loc 1 442 7 view .LVU2944 + 442:Src/main.c **** TIM11 -> CNT = 0; + 9068 .loc 1 442 26 is_stmt 0 view .LVU2945 9069 0600 EB6A ldr r3, [r5, #44] - 441:Src/main.c **** TIM11 -> CNT = 0; - ARM GAS /tmp/ccWQNJQt.s page 543 + ARM GAS /tmp/ccO46DoU.s page 543 - 9070 .loc 1 441 33 view .LVU2946 + 442:Src/main.c **** TIM11 -> CNT = 0; + 9070 .loc 1 442 33 view .LVU2946 9071 0602 143B subs r3, r3, #20 - 441:Src/main.c **** TIM11 -> CNT = 0; - 9072 .loc 1 441 19 view .LVU2947 + 442:Src/main.c **** TIM11 -> CNT = 0; + 9072 .loc 1 442 19 view .LVU2947 9073 0604 6B62 str r3, [r5, #36] - 442:Src/main.c **** - 9074 .loc 1 442 7 is_stmt 1 view .LVU2948 - 442:Src/main.c **** - 9075 .loc 1 442 20 is_stmt 0 view .LVU2949 + 443:Src/main.c **** + 9074 .loc 1 443 7 is_stmt 1 view .LVU2948 + 443:Src/main.c **** + 9075 .loc 1 443 20 is_stmt 0 view .LVU2949 9076 0606 7C62 str r4, [r7, #36] - 445:Src/main.c **** { - 9077 .loc 1 445 7 is_stmt 1 view .LVU2950 - 421:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 9078 .loc 1 421 16 is_stmt 0 view .LVU2951 + 446:Src/main.c **** { + 9077 .loc 1 446 7 is_stmt 1 view .LVU2950 + 422:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 9078 .loc 1 422 16 is_stmt 0 view .LVU2951 9079 0608 2546 mov r5, r4 9080 .LVL706: 9081 .L398: - 445:Src/main.c **** { - 9082 .loc 1 445 33 is_stmt 1 view .LVU2952 - 445:Src/main.c **** { - 9083 .loc 1 445 18 is_stmt 0 view .LVU2953 + 446:Src/main.c **** { + 9082 .loc 1 446 33 is_stmt 1 view .LVU2952 + 446:Src/main.c **** { + 9083 .loc 1 446 18 is_stmt 0 view .LVU2953 9084 060a 704B ldr r3, .L436 9085 060c D3ED047A vldr.32 s15, [r3, #16] - 445:Src/main.c **** { - 9086 .loc 1 445 39 view .LVU2954 + 446:Src/main.c **** { + 9086 .loc 1 446 39 view .LVU2954 9087 0610 93ED027A vldr.32 s14, [r3, #8] - 445:Src/main.c **** { - 9088 .loc 1 445 33 view .LVU2955 + 446:Src/main.c **** { + 9088 .loc 1 446 33 view .LVU2955 9089 0614 F4EEC77A vcmpe.f32 s15, s14 9090 0618 F1EE10FA vmrs APSR_nzcv, FPSCR 9091 061c 37D5 bpl .L429 - 447:Src/main.c **** { - 9092 .loc 1 447 8 is_stmt 1 view .LVU2956 - 447:Src/main.c **** { - 9093 .loc 1 447 12 is_stmt 0 view .LVU2957 + 448:Src/main.c **** { + 9092 .loc 1 448 8 is_stmt 1 view .LVU2956 + 448:Src/main.c **** { + 9093 .loc 1 448 12 is_stmt 0 view .LVU2957 9094 061e 754B ldr r3, .L436+40 9095 0620 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 447:Src/main.c **** { - 9096 .loc 1 447 11 view .LVU2958 + 448:Src/main.c **** { + 9096 .loc 1 448 11 view .LVU2958 9097 0622 002B cmp r3, #0 9098 0624 F1D0 beq .L398 - 449:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 9099 .loc 1 449 9 is_stmt 1 view .LVU2959 + 450:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 9099 .loc 1 450 9 is_stmt 1 view .LVU2959 9100 0626 FCEEE77A vcvt.u32.f32 s15, s15 9101 062a 17EE903A vmov r3, s15 @ int 9102 062e 99B2 uxth r1, r3 9103 0630 0120 movs r0, #1 9104 0632 FFF7FEFF bl Set_LTEC 9105 .LVL707: - 452:Src/main.c **** TO10 = 0; - 9106 .loc 1 452 9 view .LVU2960 - 452:Src/main.c **** TO10 = 0; - 9107 .loc 1 452 13 is_stmt 0 view .LVU2961 + 453:Src/main.c **** TO10 = 0; + 9106 .loc 1 453 9 view .LVU2960 + 453:Src/main.c **** TO10 = 0; + 9107 .loc 1 453 13 is_stmt 0 view .LVU2961 9108 0636 654B ldr r3, .L436 9109 0638 D3ED047A vldr.32 s15, [r3, #16] - 452:Src/main.c **** TO10 = 0; - 9110 .loc 1 452 35 view .LVU2962 - ARM GAS /tmp/ccWQNJQt.s page 544 + 453:Src/main.c **** TO10 = 0; + ARM GAS /tmp/ccO46DoU.s page 544 + 9110 .loc 1 453 35 view .LVU2962 9111 063c 93ED037A vldr.32 s14, [r3, #12] - 452:Src/main.c **** TO10 = 0; - 9112 .loc 1 452 28 view .LVU2963 + 453:Src/main.c **** TO10 = 0; + 9112 .loc 1 453 28 view .LVU2963 9113 0640 77EE877A vadd.f32 s15, s15, s14 9114 0644 C3ED047A vstr.32 s15, [r3, #16] - 453:Src/main.c **** TIM10_coflag = 0; - 9115 .loc 1 453 9 is_stmt 1 view .LVU2964 - 453:Src/main.c **** TIM10_coflag = 0; - 9116 .loc 1 453 14 is_stmt 0 view .LVU2965 + 454:Src/main.c **** TIM10_coflag = 0; + 9115 .loc 1 454 9 is_stmt 1 view .LVU2964 + 454:Src/main.c **** TIM10_coflag = 0; + 9116 .loc 1 454 14 is_stmt 0 view .LVU2965 9117 0648 0027 movs r7, #0 9118 064a 6B4B ldr r3, .L436+44 9119 064c 1F60 str r7, [r3] - 454:Src/main.c **** - 9120 .loc 1 454 9 is_stmt 1 view .LVU2966 - 454:Src/main.c **** - 9121 .loc 1 454 22 is_stmt 0 view .LVU2967 + 455:Src/main.c **** + 9120 .loc 1 455 9 is_stmt 1 view .LVU2966 + 455:Src/main.c **** + 9121 .loc 1 455 22 is_stmt 0 view .LVU2967 9122 064e 694B ldr r3, .L436+40 9123 0650 1F70 strb r7, [r3] - 456:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 9124 .loc 1 456 9 is_stmt 1 view .LVU2968 + 457:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 9124 .loc 1 457 9 is_stmt 1 view .LVU2968 9125 0652 DFF8C881 ldr r8, .L436+80 9126 0656 0122 movs r2, #1 9127 0658 4FF40071 mov r1, #512 9128 065c 4046 mov r0, r8 9129 065e FFF7FEFF bl HAL_GPIO_WritePin 9130 .LVL708: - 457:Src/main.c **** //* - 9131 .loc 1 457 9 view .LVU2969 + 458:Src/main.c **** //* + 9131 .loc 1 458 9 view .LVU2969 9132 0662 3A46 mov r2, r7 9133 0664 4FF40071 mov r1, #512 9134 0668 4046 mov r0, r8 9135 066a FFF7FEFF bl HAL_GPIO_WritePin 9136 .LVL709: - 459:Src/main.c **** OUT_trigger(trigger_counter); - 9137 .loc 1 459 9 view .LVU2970 - 459:Src/main.c **** OUT_trigger(trigger_counter); - 9138 .loc 1 459 41 is_stmt 0 view .LVU2971 + 460:Src/main.c **** OUT_trigger(trigger_counter); + 9137 .loc 1 460 9 view .LVU2970 + 460:Src/main.c **** OUT_trigger(trigger_counter); + 9138 .loc 1 460 41 is_stmt 0 view .LVU2971 9139 066e B4FBF6F3 udiv r3, r4, r6 9140 0672 06FB1343 mls r3, r6, r3, r4 9141 0676 9BB2 uxth r3, r3 - 459:Src/main.c **** OUT_trigger(trigger_counter); - 9142 .loc 1 459 12 view .LVU2972 + 460:Src/main.c **** OUT_trigger(trigger_counter); + 9142 .loc 1 460 12 view .LVU2972 9143 0678 1BB1 cbz r3, .L430 9144 .L399: - 463:Src/main.c **** //*/ - 9145 .loc 1 463 9 is_stmt 1 view .LVU2973 + 464:Src/main.c **** //*/ + 9145 .loc 1 464 9 is_stmt 1 view .LVU2973 9146 067a 0134 adds r4, r4, #1 9147 .LVL710: - 463:Src/main.c **** //*/ - 9148 .loc 1 463 9 is_stmt 0 view .LVU2974 + 464:Src/main.c **** //*/ + 9148 .loc 1 464 9 is_stmt 0 view .LVU2974 9149 067c A4B2 uxth r4, r4 9150 .LVL711: - 463:Src/main.c **** //*/ - 9151 .loc 1 463 9 view .LVU2975 + 464:Src/main.c **** //*/ + 9151 .loc 1 464 9 view .LVU2975 9152 067e C4E7 b .L398 9153 .LVL712: + ARM GAS /tmp/ccO46DoU.s page 545 + + 9154 .L396: - ARM GAS /tmp/ccWQNJQt.s page 545 - - - 418:Src/main.c **** - 9155 .loc 1 418 8 is_stmt 1 view .LVU2976 - 418:Src/main.c **** - 9156 .loc 1 418 13 view .LVU2977 + 419:Src/main.c **** + 9155 .loc 1 419 8 is_stmt 1 view .LVU2976 + 419:Src/main.c **** + 9156 .loc 1 419 13 view .LVU2977 9157 0680 FEE7 b .L396 9158 .LVL713: 9159 .L430: - 460:Src/main.c **** ++trigger_counter; - 9160 .loc 1 460 10 view .LVU2978 + 461:Src/main.c **** ++trigger_counter; + 9160 .loc 1 461 10 view .LVU2978 9161 0682 E8B2 uxtb r0, r5 9162 0684 FFF7FEFF bl OUT_trigger 9163 .LVL714: - 461:Src/main.c **** } - 9164 .loc 1 461 10 view .LVU2979 + 462:Src/main.c **** } + 9164 .loc 1 462 10 view .LVU2979 9165 0688 0135 adds r5, r5, #1 9166 .LVL715: - 461:Src/main.c **** } - 9167 .loc 1 461 10 is_stmt 0 view .LVU2980 + 462:Src/main.c **** } + 9167 .loc 1 462 10 is_stmt 0 view .LVU2980 9168 068a ADB2 uxth r5, r5 9169 .LVL716: - 461:Src/main.c **** } - 9170 .loc 1 461 10 view .LVU2981 + 462:Src/main.c **** } + 9170 .loc 1 462 10 view .LVU2981 9171 068c F5E7 b .L399 9172 .L429: - 488:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9173 .loc 1 488 7 is_stmt 1 view .LVU2982 - 488:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9174 .loc 1 488 13 is_stmt 0 view .LVU2983 + 489:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 9173 .loc 1 489 7 is_stmt 1 view .LVU2982 + 489:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 9174 .loc 1 489 13 is_stmt 0 view .LVU2983 9175 068e 574A ldr r2, .L436+32 9176 0690 D368 ldr r3, [r2, #12] - 488:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9177 .loc 1 488 21 view .LVU2984 + 489:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 9177 .loc 1 489 21 view .LVU2984 9178 0692 43F00103 orr r3, r3, #1 9179 0696 D360 str r3, [r2, #12] - 498:Src/main.c **** - 9180 .loc 1 498 7 is_stmt 1 view .LVU2985 + 499:Src/main.c **** + 9180 .loc 1 499 7 is_stmt 1 view .LVU2985 9181 0698 FFF7FEFF bl Stop_TIM10 9182 .LVL717: - 500:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9183 .loc 1 500 7 view .LVU2986 - 500:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9184 .loc 1 500 32 is_stmt 0 view .LVU2987 + 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 9183 .loc 1 501 7 view .LVU2986 + 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 9184 .loc 1 501 32 is_stmt 0 view .LVU2987 9185 069c 4B4C ldr r4, .L436 9186 .LVL718: - 500:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9187 .loc 1 500 32 view .LVU2988 + 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 9187 .loc 1 501 32 view .LVU2988 9188 069e D4ED017A vldr.32 s15, [r4, #4] - 500:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9189 .loc 1 500 26 view .LVU2989 + 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 9189 .loc 1 501 26 view .LVU2989 9190 06a2 C4ED047A vstr.32 s15, [r4, #16] - 501:Src/main.c **** if (task.tau > 3) - 9191 .loc 1 501 7 is_stmt 1 view .LVU2990 + 502:Src/main.c **** if (task.tau > 3) + 9191 .loc 1 502 7 is_stmt 1 view .LVU2990 9192 06a6 FCEEE77A vcvt.u32.f32 s15, s15 9193 06aa 17EE903A vmov r3, s15 @ int 9194 06ae 99B2 uxth r1, r3 9195 06b0 0120 movs r0, #1 + ARM GAS /tmp/ccO46DoU.s page 546 + + 9196 06b2 FFF7FEFF bl Set_LTEC - ARM GAS /tmp/ccWQNJQt.s page 546 - - 9197 .LVL719: - 502:Src/main.c **** { - 9198 .loc 1 502 7 view .LVU2991 - 502:Src/main.c **** { - 9199 .loc 1 502 15 is_stmt 0 view .LVU2992 + 503:Src/main.c **** { + 9198 .loc 1 503 7 view .LVU2991 + 503:Src/main.c **** { + 9199 .loc 1 503 15 is_stmt 0 view .LVU2992 9200 06b6 E38A ldrh r3, [r4, #22] - 502:Src/main.c **** { - 9201 .loc 1 502 10 view .LVU2993 + 503:Src/main.c **** { + 9201 .loc 1 503 10 view .LVU2993 9202 06b8 032B cmp r3, #3 9203 06ba 0CD9 bls .L401 - 504:Src/main.c **** htim10.Init.Period = 9999; - 9204 .loc 1 504 8 is_stmt 1 view .LVU2994 - 504:Src/main.c **** htim10.Init.Period = 9999; - 9205 .loc 1 504 34 is_stmt 0 view .LVU2995 + 505:Src/main.c **** htim10.Init.Period = 9999; + 9204 .loc 1 505 8 is_stmt 1 view .LVU2994 + 505:Src/main.c **** htim10.Init.Period = 9999; + 9205 .loc 1 505 34 is_stmt 0 view .LVU2995 9206 06bc 4A4A ldr r2, .L436+28 9207 06be D068 ldr r0, [r2, #12] - 504:Src/main.c **** htim10.Init.Period = 9999; - 9208 .loc 1 504 21 view .LVU2996 + 505:Src/main.c **** htim10.Init.Period = 9999; + 9208 .loc 1 505 21 view .LVU2996 9209 06c0 4E49 ldr r1, .L436+48 9210 06c2 0860 str r0, [r1] - 505:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9211 .loc 1 505 8 is_stmt 1 view .LVU2997 - 505:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9212 .loc 1 505 27 is_stmt 0 view .LVU2998 + 506:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9211 .loc 1 506 8 is_stmt 1 view .LVU2997 + 506:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9212 .loc 1 506 27 is_stmt 0 view .LVU2998 9213 06c4 42F20F71 movw r1, #9999 9214 06c8 D160 str r1, [r2, #12] - 506:Src/main.c **** } - 9215 .loc 1 506 8 is_stmt 1 view .LVU2999 - 506:Src/main.c **** } - 9216 .loc 1 506 33 is_stmt 0 view .LVU3000 + 507:Src/main.c **** } + 9215 .loc 1 507 8 is_stmt 1 view .LVU2999 + 507:Src/main.c **** } + 9216 .loc 1 507 33 is_stmt 0 view .LVU3000 9217 06ca 013B subs r3, r3, #1 - 506:Src/main.c **** } - 9218 .loc 1 506 38 view .LVU3001 + 507:Src/main.c **** } + 9218 .loc 1 507 38 view .LVU3001 9219 06cc 6422 movs r2, #100 9220 06ce 02FB03F3 mul r3, r2, r3 - 506:Src/main.c **** } - 9221 .loc 1 506 21 view .LVU3002 + 507:Src/main.c **** } + 9221 .loc 1 507 21 view .LVU3002 9222 06d2 4B4A ldr r2, .L436+52 9223 06d4 1360 str r3, [r2] 9224 .L401: - 508:Src/main.c **** break; - 9225 .loc 1 508 7 is_stmt 1 view .LVU3003 + 509:Src/main.c **** break; + 9225 .loc 1 509 7 is_stmt 1 view .LVU3003 9226 06d6 4448 ldr r0, .L436+28 9227 06d8 FFF7FEFF bl HAL_TIM_Base_Start_IT 9228 .LVL720: - 509:Src/main.c **** case TT_CHANGE_CURR_2: - 9229 .loc 1 509 6 view .LVU3004 + 510:Src/main.c **** case TT_CHANGE_CURR_2: + 9229 .loc 1 510 6 view .LVU3004 9230 06dc C8E6 b .L394 9231 .LVL721: 9232 .L393: - 513:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 9233 .loc 1 513 7 view .LVU3005 - 513:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 9234 .loc 1 513 38 is_stmt 0 view .LVU3006 + 514:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 9233 .loc 1 514 7 view .LVU3005 + 514:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 9234 .loc 1 514 38 is_stmt 0 view .LVU3006 9235 06de 3B4B ldr r3, .L436 9236 06e0 D3ED077A vldr.32 s15, [r3, #28] - 513:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - ARM GAS /tmp/ccWQNJQt.s page 547 + ARM GAS /tmp/ccO46DoU.s page 547 - 9237 .loc 1 513 7 view .LVU3007 + 514:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 9237 .loc 1 514 7 view .LVU3007 9238 06e4 FCEEE77A vcvt.u32.f32 s15, s15 9239 06e8 17EE903A vmov r3, s15 @ int 9240 06ec 99B2 uxth r1, r3 9241 06ee 0120 movs r0, #1 9242 06f0 FFF7FEFF bl Set_LTEC 9243 .LVL722: - 514:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 9244 .loc 1 514 7 is_stmt 1 view .LVU3008 - 514:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 9245 .loc 1 514 14 is_stmt 0 view .LVU3009 + 515:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 9244 .loc 1 515 7 is_stmt 1 view .LVU3008 + 515:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 9245 .loc 1 515 14 is_stmt 0 view .LVU3009 9246 06f4 0320 movs r0, #3 9247 06f6 FFF7FEFF bl MPhD_T 9248 .LVL723: - 515:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9249 .loc 1 515 7 is_stmt 1 view .LVU3010 - 515:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9250 .loc 1 515 32 is_stmt 0 view .LVU3011 + 516:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 9249 .loc 1 516 7 is_stmt 1 view .LVU3010 + 516:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 9250 .loc 1 516 32 is_stmt 0 view .LVU3011 9251 06fa 0320 movs r0, #3 9252 06fc FFF7FEFF bl MPhD_T 9253 .LVL724: - 515:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9254 .loc 1 515 30 discriminator 1 view .LVU3012 + 516:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 9254 .loc 1 516 30 discriminator 1 view .LVU3012 9255 0700 334C ldr r4, .L436+4 9256 0702 2080 strh r0, [r4] @ movhi - 516:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 9257 .loc 1 516 7 is_stmt 1 view .LVU3013 - 516:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 9258 .loc 1 516 14 is_stmt 0 view .LVU3014 + 517:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 9257 .loc 1 517 7 is_stmt 1 view .LVU3013 + 517:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 9258 .loc 1 517 14 is_stmt 0 view .LVU3014 9259 0704 0420 movs r0, #4 9260 0706 FFF7FEFF bl MPhD_T 9261 .LVL725: - 517:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9262 .loc 1 517 7 is_stmt 1 view .LVU3015 - 517:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9263 .loc 1 517 32 is_stmt 0 view .LVU3016 + 518:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9262 .loc 1 518 7 is_stmt 1 view .LVU3015 + 518:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9263 .loc 1 518 32 is_stmt 0 view .LVU3016 9264 070a 0420 movs r0, #4 9265 070c FFF7FEFF bl MPhD_T 9266 .LVL726: - 517:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9267 .loc 1 517 30 discriminator 1 view .LVU3017 + 518:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9267 .loc 1 518 30 discriminator 1 view .LVU3017 9268 0710 304D ldr r5, .L436+8 9269 0712 2880 strh r0, [r5] @ movhi - 518:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9270 .loc 1 518 7 is_stmt 1 view .LVU3018 - 518:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9271 .loc 1 518 14 is_stmt 0 view .LVU3019 + 519:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 9270 .loc 1 519 7 is_stmt 1 view .LVU3018 + 519:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 9271 .loc 1 519 14 is_stmt 0 view .LVU3019 9272 0714 0122 movs r2, #1 9273 0716 2146 mov r1, r4 9274 0718 2F48 ldr r0, .L436+12 9275 071a FFF7FEFF bl PID_Controller_Temp 9276 .LVL727: 9277 071e 0146 mov r1, r0 - 518:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9278 .loc 1 518 13 discriminator 1 view .LVU3020 + 519:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 9278 .loc 1 519 13 discriminator 1 view .LVU3020 9279 0720 2E4C ldr r4, .L436+16 + ARM GAS /tmp/ccO46DoU.s page 548 + + 9280 0722 2080 strh r0, [r4] @ movhi - ARM GAS /tmp/ccWQNJQt.s page 548 - - - 519:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 9281 .loc 1 519 7 is_stmt 1 view .LVU3021 + 520:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 9281 .loc 1 520 7 is_stmt 1 view .LVU3021 9282 0724 0320 movs r0, #3 9283 0726 FFF7FEFF bl Set_LTEC 9284 .LVL728: - 520:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9285 .loc 1 520 7 view .LVU3022 - 520:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9286 .loc 1 520 14 is_stmt 0 view .LVU3023 + 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 9285 .loc 1 521 7 view .LVU3022 + 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 9286 .loc 1 521 14 is_stmt 0 view .LVU3023 9287 072a 0222 movs r2, #2 9288 072c 2946 mov r1, r5 9289 072e 2C48 ldr r0, .L436+20 9290 0730 FFF7FEFF bl PID_Controller_Temp 9291 .LVL729: 9292 0734 0146 mov r1, r0 - 520:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9293 .loc 1 520 13 discriminator 1 view .LVU3024 + 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 9293 .loc 1 521 13 discriminator 1 view .LVU3024 9294 0736 2080 strh r0, [r4] @ movhi - 521:Src/main.c **** - 9295 .loc 1 521 7 is_stmt 1 view .LVU3025 + 522:Src/main.c **** + 9295 .loc 1 522 7 is_stmt 1 view .LVU3025 9296 0738 0420 movs r0, #4 9297 073a FFF7FEFF bl Set_LTEC 9298 .LVL730: - 523:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 9299 .loc 1 523 7 view .LVU3026 - 523:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 9300 .loc 1 523 28 is_stmt 0 view .LVU3027 + 524:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 9299 .loc 1 524 7 view .LVU3026 + 524:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 9300 .loc 1 524 28 is_stmt 0 view .LVU3027 9301 073e 314B ldr r3, .L436+56 9302 0740 0222 movs r2, #2 9303 0742 1A70 strb r2, [r3] - 524:Src/main.c **** //LD_blinker.param = task.current_param; - 9304 .loc 1 524 7 is_stmt 1 view .LVU3028 - 524:Src/main.c **** //LD_blinker.param = task.current_param; - 9305 .loc 1 524 24 is_stmt 0 view .LVU3029 + 525:Src/main.c **** //LD_blinker.param = task.current_param; + 9304 .loc 1 525 7 is_stmt 1 view .LVU3028 + 525:Src/main.c **** //LD_blinker.param = task.current_param; + 9305 .loc 1 525 24 is_stmt 0 view .LVU3029 9306 0744 0022 movs r2, #0 9307 0746 9A72 strb r2, [r3, #10] - 526:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 9308 .loc 1 526 7 is_stmt 1 view .LVU3030 - 526:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 9309 .loc 1 526 24 is_stmt 0 view .LVU3031 + 527:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 9308 .loc 1 527 7 is_stmt 1 view .LVU3030 + 527:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 9309 .loc 1 527 24 is_stmt 0 view .LVU3031 9310 0748 1A81 strh r2, [r3, #8] @ movhi - 527:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 9311 .loc 1 527 7 is_stmt 1 view .LVU3032 - 527:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 9312 .loc 1 527 24 is_stmt 0 view .LVU3033 + 528:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 9311 .loc 1 528 7 is_stmt 1 view .LVU3032 + 528:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 9312 .loc 1 528 24 is_stmt 0 view .LVU3033 9313 074a 4FF47A72 mov r2, #1000 9314 074e 1A81 strh r2, [r3, #8] @ movhi - 528:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 9315 .loc 1 528 7 is_stmt 1 view .LVU3034 - 528:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 9316 .loc 1 528 30 is_stmt 0 view .LVU3035 + 529:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 9315 .loc 1 529 7 is_stmt 1 view .LVU3034 + 529:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 9316 .loc 1 529 30 is_stmt 0 view .LVU3035 9317 0750 2D4A ldr r2, .L436+60 9318 0752 5A60 str r2, [r3, #4] - 529:Src/main.c **** - 9319 .loc 1 529 7 is_stmt 1 view .LVU3036 - 529:Src/main.c **** - 9320 .loc 1 529 29 is_stmt 0 view .LVU3037 - ARM GAS /tmp/ccWQNJQt.s page 549 + 530:Src/main.c **** + 9319 .loc 1 530 7 is_stmt 1 view .LVU3036 + 530:Src/main.c **** + ARM GAS /tmp/ccO46DoU.s page 549 + 9320 .loc 1 530 29 is_stmt 0 view .LVU3037 9321 0754 8022 movs r2, #128 9322 0756 5A80 strh r2, [r3, #2] @ movhi - 531:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 9323 .loc 1 531 7 is_stmt 1 view .LVU3038 - 531:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 9324 .loc 1 531 17 is_stmt 0 view .LVU3039 + 532:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 9323 .loc 1 532 7 is_stmt 1 view .LVU3038 + 532:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 9324 .loc 1 532 17 is_stmt 0 view .LVU3039 9325 0758 2C4B ldr r3, .L436+64 9326 075a 42F21072 movw r2, #10000 9327 075e DA62 str r2, [r3, #44] - 533:Src/main.c **** if (st != HAL_OK) - 9328 .loc 1 533 7 is_stmt 1 view .LVU3040 - 533:Src/main.c **** if (st != HAL_OK) - 9329 .loc 1 533 12 is_stmt 0 view .LVU3041 + 534:Src/main.c **** if (st != HAL_OK) + 9328 .loc 1 534 7 is_stmt 1 view .LVU3040 + 534:Src/main.c **** if (st != HAL_OK) + 9329 .loc 1 534 12 is_stmt 0 view .LVU3041 9330 0760 2B48 ldr r0, .L436+68 9331 0762 FFF7FEFF bl HAL_TIM_Base_Start_IT 9332 .LVL731: - 534:Src/main.c **** while(1); - 9333 .loc 1 534 7 is_stmt 1 view .LVU3042 - 534:Src/main.c **** while(1); - 9334 .loc 1 534 10 is_stmt 0 view .LVU3043 + 535:Src/main.c **** while(1); + 9333 .loc 1 535 7 is_stmt 1 view .LVU3042 + 535:Src/main.c **** while(1); + 9334 .loc 1 535 10 is_stmt 0 view .LVU3043 9335 0766 78BB cbnz r0, .L403 - 539:Src/main.c **** uint32_t i = 10000; while (--i){} - 9336 .loc 1 539 7 is_stmt 1 view .LVU3044 + 540:Src/main.c **** uint32_t i = 10000; while (--i){} + 9336 .loc 1 540 7 is_stmt 1 view .LVU3044 9337 0768 0122 movs r2, #1 9338 076a 8021 movs r1, #128 9339 076c 1D48 ldr r0, .L436+24 9340 .LVL732: - 539:Src/main.c **** uint32_t i = 10000; while (--i){} - 9341 .loc 1 539 7 is_stmt 0 view .LVU3045 + 540:Src/main.c **** uint32_t i = 10000; while (--i){} + 9341 .loc 1 540 7 is_stmt 0 view .LVU3045 9342 076e FFF7FEFF bl HAL_GPIO_WritePin 9343 .LVL733: - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9344 .loc 1 540 7 is_stmt 1 view .LVU3046 - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9345 .loc 1 540 27 view .LVU3047 - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9346 .loc 1 540 16 is_stmt 0 view .LVU3048 + 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9344 .loc 1 541 7 is_stmt 1 view .LVU3046 + 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9345 .loc 1 541 27 view .LVU3047 + 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9346 .loc 1 541 16 is_stmt 0 view .LVU3048 9347 0772 42F21073 movw r3, #10000 9348 .LVL734: 9349 .L404: - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9350 .loc 1 540 39 is_stmt 1 discriminator 2 view .LVU3049 - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9351 .loc 1 540 34 discriminator 2 view .LVU3050 - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9352 .loc 1 540 34 is_stmt 0 discriminator 2 view .LVU3051 + 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9350 .loc 1 541 39 is_stmt 1 discriminator 2 view .LVU3049 + 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9351 .loc 1 541 34 discriminator 2 view .LVU3050 + 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9352 .loc 1 541 34 is_stmt 0 discriminator 2 view .LVU3051 9353 0776 013B subs r3, r3, #1 9354 .LVL735: - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9355 .loc 1 540 34 discriminator 2 view .LVU3052 + 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9355 .loc 1 541 34 discriminator 2 view .LVU3052 9356 0778 FDD1 bne .L404 - 541:Src/main.c **** LD_blinker.state = 2; - 9357 .loc 1 541 7 is_stmt 1 view .LVU3053 + 542:Src/main.c **** LD_blinker.state = 2; + 9357 .loc 1 542 7 is_stmt 1 view .LVU3053 9358 077a 0022 movs r2, #0 9359 077c 8021 movs r1, #128 9360 077e 1948 ldr r0, .L436+24 + ARM GAS /tmp/ccO46DoU.s page 550 + + 9361 0780 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccWQNJQt.s page 550 - - 9362 .LVL736: - 542:Src/main.c **** - 9363 .loc 1 542 7 view .LVU3054 - 542:Src/main.c **** - 9364 .loc 1 542 24 is_stmt 0 view .LVU3055 + 543:Src/main.c **** + 9363 .loc 1 543 7 view .LVU3054 + 543:Src/main.c **** + 9364 .loc 1 543 24 is_stmt 0 view .LVU3055 9365 0784 1F4B ldr r3, .L436+56 9366 0786 0222 movs r2, #2 9367 0788 9A72 strb r2, [r3, #10] - 544:Src/main.c **** if (st != HAL_OK) - 9368 .loc 1 544 7 is_stmt 1 view .LVU3056 - 544:Src/main.c **** if (st != HAL_OK) - 9369 .loc 1 544 12 is_stmt 0 view .LVU3057 + 545:Src/main.c **** if (st != HAL_OK) + 9368 .loc 1 545 7 is_stmt 1 view .LVU3056 + 545:Src/main.c **** if (st != HAL_OK) + 9369 .loc 1 545 12 is_stmt 0 view .LVU3057 9370 078a 1748 ldr r0, .L436+28 9371 078c FFF7FEFF bl HAL_TIM_Base_Start_IT 9372 .LVL737: - 545:Src/main.c **** while(1); - 9373 .loc 1 545 7 is_stmt 1 view .LVU3058 - 545:Src/main.c **** while(1); - 9374 .loc 1 545 10 is_stmt 0 view .LVU3059 + 546:Src/main.c **** while(1); + 9373 .loc 1 546 7 is_stmt 1 view .LVU3058 + 546:Src/main.c **** while(1); + 9374 .loc 1 546 10 is_stmt 0 view .LVU3059 9375 0790 D8B9 cbnz r0, .L406 9376 .L407: - 547:Src/main.c **** { - 9377 .loc 1 547 33 is_stmt 1 view .LVU3060 - 547:Src/main.c **** { - 9378 .loc 1 547 18 is_stmt 0 view .LVU3061 + 548:Src/main.c **** { + 9377 .loc 1 548 33 is_stmt 1 view .LVU3060 + 548:Src/main.c **** { + 9378 .loc 1 548 18 is_stmt 0 view .LVU3061 9379 0792 0E4B ldr r3, .L436 9380 0794 D3ED047A vldr.32 s15, [r3, #16] - 547:Src/main.c **** { - 9381 .loc 1 547 39 view .LVU3062 + 548:Src/main.c **** { + 9381 .loc 1 548 39 view .LVU3062 9382 0798 93ED027A vldr.32 s14, [r3, #8] - 547:Src/main.c **** { - 9383 .loc 1 547 33 view .LVU3063 + 548:Src/main.c **** { + 9383 .loc 1 548 33 view .LVU3063 9384 079c F4EEC77A vcmpe.f32 s15, s14 9385 07a0 F1EE10FA vmrs APSR_nzcv, FPSCR 9386 07a4 3CD5 bpl .L431 - 549:Src/main.c **** { - 9387 .loc 1 549 8 is_stmt 1 view .LVU3064 - 549:Src/main.c **** { - 9388 .loc 1 549 12 is_stmt 0 view .LVU3065 + 550:Src/main.c **** { + 9387 .loc 1 550 8 is_stmt 1 view .LVU3064 + 550:Src/main.c **** { + 9388 .loc 1 550 12 is_stmt 0 view .LVU3065 9389 07a6 134B ldr r3, .L436+40 9390 07a8 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 549:Src/main.c **** { - 9391 .loc 1 549 11 view .LVU3066 + 550:Src/main.c **** { + 9391 .loc 1 550 11 view .LVU3066 9392 07aa 002B cmp r3, #0 9393 07ac F1D0 beq .L407 - 554:Src/main.c **** TO10 = 0; - 9394 .loc 1 554 9 is_stmt 1 view .LVU3067 - 554:Src/main.c **** TO10 = 0; - 9395 .loc 1 554 35 is_stmt 0 view .LVU3068 + 555:Src/main.c **** TO10 = 0; + 9394 .loc 1 555 9 is_stmt 1 view .LVU3067 + 555:Src/main.c **** TO10 = 0; + 9395 .loc 1 555 35 is_stmt 0 view .LVU3068 9396 07ae 074B ldr r3, .L436 9397 07b0 93ED037A vldr.32 s14, [r3, #12] - 554:Src/main.c **** TO10 = 0; - 9398 .loc 1 554 28 view .LVU3069 + 555:Src/main.c **** TO10 = 0; + 9398 .loc 1 555 28 view .LVU3069 9399 07b4 77EE277A vadd.f32 s15, s14, s15 9400 07b8 C3ED047A vstr.32 s15, [r3, #16] - 555:Src/main.c **** TIM10_coflag = 0; - 9401 .loc 1 555 9 is_stmt 1 view .LVU3070 - ARM GAS /tmp/ccWQNJQt.s page 551 + 556:Src/main.c **** TIM10_coflag = 0; + ARM GAS /tmp/ccO46DoU.s page 551 - 555:Src/main.c **** TIM10_coflag = 0; - 9402 .loc 1 555 14 is_stmt 0 view .LVU3071 + 9401 .loc 1 556 9 is_stmt 1 view .LVU3070 + 556:Src/main.c **** TIM10_coflag = 0; + 9402 .loc 1 556 14 is_stmt 0 view .LVU3071 9403 07bc 0023 movs r3, #0 9404 07be 0E4A ldr r2, .L436+44 9405 07c0 1360 str r3, [r2] - 556:Src/main.c **** - 9406 .loc 1 556 9 is_stmt 1 view .LVU3072 - 556:Src/main.c **** - 9407 .loc 1 556 22 is_stmt 0 view .LVU3073 + 557:Src/main.c **** + 9406 .loc 1 557 9 is_stmt 1 view .LVU3072 + 557:Src/main.c **** + 9407 .loc 1 557 22 is_stmt 0 view .LVU3073 9408 07c2 0C4A ldr r2, .L436+40 9409 07c4 1370 strb r3, [r2] 9410 07c6 E4E7 b .L407 9411 .LVL738: 9412 .L403: - 535:Src/main.c **** // */ - 9413 .loc 1 535 8 is_stmt 1 view .LVU3074 - 535:Src/main.c **** // */ - 9414 .loc 1 535 13 view .LVU3075 + 536:Src/main.c **** // */ + 9413 .loc 1 536 8 is_stmt 1 view .LVU3074 + 536:Src/main.c **** // */ + 9414 .loc 1 536 13 view .LVU3075 9415 07c8 FEE7 b .L403 9416 .LVL739: 9417 .L406: - 546:Src/main.c **** while (task.current_param < task.max_param) - 9418 .loc 1 546 8 view .LVU3076 - 546:Src/main.c **** while (task.current_param < task.max_param) - 9419 .loc 1 546 13 view .LVU3077 + 547:Src/main.c **** while (task.current_param < task.max_param) + 9418 .loc 1 547 8 view .LVU3076 + 547:Src/main.c **** while (task.current_param < task.max_param) + 9419 .loc 1 547 13 view .LVU3077 9420 07ca FEE7 b .L406 9421 .L437: 9422 .align 2 @@ -33052,559 +33053,559 @@ ARM GAS /tmp/ccWQNJQt.s page 1 9443 0818 00000000 .word htim4 9444 081c 00180240 .word 1073879040 9445 .L431: - 561:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 9446 .loc 1 561 7 view .LVU3078 + 562:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 9446 .loc 1 562 7 view .LVU3078 9447 0820 6C48 ldr r0, .L438 9448 .LVL740: - 561:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 9449 .loc 1 561 7 is_stmt 0 view .LVU3079 - ARM GAS /tmp/ccWQNJQt.s page 552 + 562:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + ARM GAS /tmp/ccO46DoU.s page 552 + 9449 .loc 1 562 7 is_stmt 0 view .LVU3079 9450 0822 FFF7FEFF bl HAL_TIM_Base_Stop 9451 .LVL741: - 562:Src/main.c **** - 9452 .loc 1 562 7 is_stmt 1 view .LVU3080 + 563:Src/main.c **** + 9452 .loc 1 563 7 is_stmt 1 view .LVU3080 9453 0826 6C4C ldr r4, .L438+4 9454 0828 0122 movs r2, #1 9455 082a 8021 movs r1, #128 9456 082c 2046 mov r0, r4 9457 082e FFF7FEFF bl HAL_GPIO_WritePin 9458 .LVL742: - 564:Src/main.c **** - 9459 .loc 1 564 7 view .LVU3081 + 565:Src/main.c **** + 9459 .loc 1 565 7 view .LVU3081 9460 0832 0022 movs r2, #0 9461 0834 8021 movs r1, #128 9462 0836 2046 mov r0, r4 9463 0838 FFF7FEFF bl HAL_GPIO_WritePin 9464 .LVL743: - 566:Src/main.c **** TIM8->CNT = 0; - 9465 .loc 1 566 7 view .LVU3082 + 567:Src/main.c **** TIM8->CNT = 0; + 9465 .loc 1 567 7 view .LVU3082 9466 083c 6748 ldr r0, .L438+8 9467 083e FFF7FEFF bl HAL_TIM_Base_Stop_IT 9468 .LVL744: - 567:Src/main.c **** - 9469 .loc 1 567 7 view .LVU3083 - 567:Src/main.c **** - 9470 .loc 1 567 17 is_stmt 0 view .LVU3084 + 568:Src/main.c **** + 9469 .loc 1 568 7 view .LVU3083 + 568:Src/main.c **** + 9470 .loc 1 568 17 is_stmt 0 view .LVU3084 9471 0842 674B ldr r3, .L438+12 9472 0844 0022 movs r2, #0 9473 0846 5A62 str r2, [r3, #36] - 569:Src/main.c **** task.current_param = task.min_param; - 9474 .loc 1 569 7 is_stmt 1 view .LVU3085 + 570:Src/main.c **** task.current_param = task.min_param; + 9474 .loc 1 570 7 is_stmt 1 view .LVU3085 9475 0848 FFF7FEFF bl Stop_TIM10 9476 .LVL745: - 570:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9477 .loc 1 570 7 view .LVU3086 - 570:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9478 .loc 1 570 32 is_stmt 0 view .LVU3087 + 571:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 9477 .loc 1 571 7 view .LVU3086 + 571:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 9478 .loc 1 571 32 is_stmt 0 view .LVU3087 9479 084c 654C ldr r4, .L438+16 9480 084e D4ED017A vldr.32 s15, [r4, #4] - 570:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9481 .loc 1 570 26 view .LVU3088 + 571:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 9481 .loc 1 571 26 view .LVU3088 9482 0852 C4ED047A vstr.32 s15, [r4, #16] - 571:Src/main.c **** if (task.tau > 3) - 9483 .loc 1 571 7 is_stmt 1 view .LVU3089 + 572:Src/main.c **** if (task.tau > 3) + 9483 .loc 1 572 7 is_stmt 1 view .LVU3089 9484 0856 FCEEE77A vcvt.u32.f32 s15, s15 9485 085a 17EE903A vmov r3, s15 @ int 9486 085e 99B2 uxth r1, r3 9487 0860 0220 movs r0, #2 9488 0862 FFF7FEFF bl Set_LTEC 9489 .LVL746: - 572:Src/main.c **** { - 9490 .loc 1 572 7 view .LVU3090 - 572:Src/main.c **** { - 9491 .loc 1 572 15 is_stmt 0 view .LVU3091 + 573:Src/main.c **** { + 9490 .loc 1 573 7 view .LVU3090 + 573:Src/main.c **** { + 9491 .loc 1 573 15 is_stmt 0 view .LVU3091 9492 0866 E38A ldrh r3, [r4, #22] - 572:Src/main.c **** { - 9493 .loc 1 572 10 view .LVU3092 - ARM GAS /tmp/ccWQNJQt.s page 553 + 573:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 553 + 9493 .loc 1 573 10 view .LVU3092 9494 0868 032B cmp r3, #3 9495 086a 0CD9 bls .L409 - 574:Src/main.c **** htim10.Init.Period = 9999; - 9496 .loc 1 574 8 is_stmt 1 view .LVU3093 - 574:Src/main.c **** htim10.Init.Period = 9999; - 9497 .loc 1 574 34 is_stmt 0 view .LVU3094 + 575:Src/main.c **** htim10.Init.Period = 9999; + 9496 .loc 1 575 8 is_stmt 1 view .LVU3093 + 575:Src/main.c **** htim10.Init.Period = 9999; + 9497 .loc 1 575 34 is_stmt 0 view .LVU3094 9498 086c 594A ldr r2, .L438 9499 086e D068 ldr r0, [r2, #12] - 574:Src/main.c **** htim10.Init.Period = 9999; - 9500 .loc 1 574 21 view .LVU3095 + 575:Src/main.c **** htim10.Init.Period = 9999; + 9500 .loc 1 575 21 view .LVU3095 9501 0870 5D49 ldr r1, .L438+20 9502 0872 0860 str r0, [r1] - 575:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9503 .loc 1 575 8 is_stmt 1 view .LVU3096 - 575:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9504 .loc 1 575 27 is_stmt 0 view .LVU3097 + 576:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9503 .loc 1 576 8 is_stmt 1 view .LVU3096 + 576:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9504 .loc 1 576 27 is_stmt 0 view .LVU3097 9505 0874 42F20F71 movw r1, #9999 9506 0878 D160 str r1, [r2, #12] - 576:Src/main.c **** } - 9507 .loc 1 576 8 is_stmt 1 view .LVU3098 - 576:Src/main.c **** } - 9508 .loc 1 576 33 is_stmt 0 view .LVU3099 + 577:Src/main.c **** } + 9507 .loc 1 577 8 is_stmt 1 view .LVU3098 + 577:Src/main.c **** } + 9508 .loc 1 577 33 is_stmt 0 view .LVU3099 9509 087a 013B subs r3, r3, #1 - 576:Src/main.c **** } - 9510 .loc 1 576 38 view .LVU3100 + 577:Src/main.c **** } + 9510 .loc 1 577 38 view .LVU3100 9511 087c 6422 movs r2, #100 9512 087e 02FB03F3 mul r3, r2, r3 - 576:Src/main.c **** } - 9513 .loc 1 576 21 view .LVU3101 + 577:Src/main.c **** } + 9513 .loc 1 577 21 view .LVU3101 9514 0882 5A4A ldr r2, .L438+24 9515 0884 1360 str r3, [r2] 9516 .L409: - 578:Src/main.c **** - 9517 .loc 1 578 7 is_stmt 1 view .LVU3102 + 579:Src/main.c **** + 9517 .loc 1 579 7 is_stmt 1 view .LVU3102 9518 0886 5348 ldr r0, .L438 9519 0888 FFF7FEFF bl HAL_TIM_Base_Start_IT 9520 .LVL747: - 626:Src/main.c **** case TT_CHANGE_TEMP_1: - 9521 .loc 1 626 6 view .LVU3103 + 627:Src/main.c **** case TT_CHANGE_TEMP_1: + 9521 .loc 1 627 6 view .LVU3103 9522 088c F0E5 b .L394 9523 .LVL748: 9524 .L428: - 626:Src/main.c **** case TT_CHANGE_TEMP_1: - 9525 .loc 1 626 6 is_stmt 0 view .LVU3104 + 627:Src/main.c **** case TT_CHANGE_TEMP_1: + 9525 .loc 1 627 6 is_stmt 0 view .LVU3104 9526 .LBE577: - 637:Src/main.c **** - 9527 .loc 1 637 7 is_stmt 1 view .LVU3105 - 637:Src/main.c **** - 9528 .loc 1 637 18 is_stmt 0 view .LVU3106 + 638:Src/main.c **** + 9527 .loc 1 638 7 is_stmt 1 view .LVU3105 + 638:Src/main.c **** + 9528 .loc 1 638 18 is_stmt 0 view .LVU3106 9529 088e 584A ldr r2, .L438+28 9530 0890 1360 str r3, [r2] - 639:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9531 .loc 1 639 7 is_stmt 1 view .LVU3107 - 639:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9532 .loc 1 639 25 is_stmt 0 view .LVU3108 + 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9531 .loc 1 640 7 is_stmt 1 view .LVU3107 + 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9532 .loc 1 640 25 is_stmt 0 view .LVU3108 9533 0892 0120 movs r0, #1 + ARM GAS /tmp/ccO46DoU.s page 554 + + 9534 0894 FFF7FEFF bl MPhD_T - ARM GAS /tmp/ccWQNJQt.s page 554 - - 9535 .LVL749: - 639:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9536 .loc 1 639 23 discriminator 1 view .LVU3109 + 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9536 .loc 1 640 23 discriminator 1 view .LVU3109 9537 0898 564E ldr r6, .L438+32 9538 089a 3081 strh r0, [r6, #8] @ movhi - 640:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9539 .loc 1 640 7 is_stmt 1 view .LVU3110 - 640:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9540 .loc 1 640 25 is_stmt 0 view .LVU3111 + 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9539 .loc 1 641 7 is_stmt 1 view .LVU3110 + 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9540 .loc 1 641 25 is_stmt 0 view .LVU3111 9541 089c 0120 movs r0, #1 9542 089e FFF7FEFF bl MPhD_T 9543 .LVL750: - 640:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9544 .loc 1 640 23 discriminator 1 view .LVU3112 + 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9544 .loc 1 641 23 discriminator 1 view .LVU3112 9545 08a2 3081 strh r0, [r6, #8] @ movhi - 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9546 .loc 1 641 7 is_stmt 1 view .LVU3113 - 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9547 .loc 1 641 25 is_stmt 0 view .LVU3114 + 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9546 .loc 1 642 7 is_stmt 1 view .LVU3113 + 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9547 .loc 1 642 25 is_stmt 0 view .LVU3114 9548 08a4 0220 movs r0, #2 9549 08a6 FFF7FEFF bl MPhD_T 9550 .LVL751: - 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9551 .loc 1 641 23 discriminator 1 view .LVU3115 + 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9551 .loc 1 642 23 discriminator 1 view .LVU3115 9552 08aa 534F ldr r7, .L438+36 9553 08ac 3881 strh r0, [r7, #8] @ movhi - 642:Src/main.c **** - 9554 .loc 1 642 7 is_stmt 1 view .LVU3116 - 642:Src/main.c **** - 9555 .loc 1 642 25 is_stmt 0 view .LVU3117 + 643:Src/main.c **** + 9554 .loc 1 643 7 is_stmt 1 view .LVU3116 + 643:Src/main.c **** + 9555 .loc 1 643 25 is_stmt 0 view .LVU3117 9556 08ae 0220 movs r0, #2 9557 08b0 FFF7FEFF bl MPhD_T 9558 .LVL752: - 642:Src/main.c **** - 9559 .loc 1 642 23 discriminator 1 view .LVU3118 + 643:Src/main.c **** + 9559 .loc 1 643 23 discriminator 1 view .LVU3118 9560 08b4 3881 strh r0, [r7, #8] @ movhi - 644:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9561 .loc 1 644 7 is_stmt 1 view .LVU3119 - 644:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9562 .loc 1 644 31 is_stmt 0 view .LVU3120 + 645:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9561 .loc 1 645 7 is_stmt 1 view .LVU3119 + 645:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9562 .loc 1 645 31 is_stmt 0 view .LVU3120 9563 08b6 3389 ldrh r3, [r6, #8] - 644:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9564 .loc 1 644 20 view .LVU3121 + 645:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9564 .loc 1 645 20 view .LVU3121 9565 08b8 504C ldr r4, .L438+40 9566 08ba 6380 strh r3, [r4, #2] @ movhi - 645:Src/main.c **** - 9567 .loc 1 645 7 is_stmt 1 view .LVU3122 - 645:Src/main.c **** - 9568 .loc 1 645 20 is_stmt 0 view .LVU3123 + 646:Src/main.c **** + 9567 .loc 1 646 7 is_stmt 1 view .LVU3122 + 646:Src/main.c **** + 9568 .loc 1 646 20 is_stmt 0 view .LVU3123 9569 08bc A080 strh r0, [r4, #4] @ movhi - 649:Src/main.c **** temp16 = Get_ADC(1); - 9570 .loc 1 649 7 is_stmt 1 view .LVU3124 - 649:Src/main.c **** temp16 = Get_ADC(1); - 9571 .loc 1 649 16 is_stmt 0 view .LVU3125 + 650:Src/main.c **** temp16 = Get_ADC(1); + 9570 .loc 1 650 7 is_stmt 1 view .LVU3124 + 650:Src/main.c **** temp16 = Get_ADC(1); + 9571 .loc 1 650 16 is_stmt 0 view .LVU3125 9572 08be 0020 movs r0, #0 9573 08c0 FFF7FEFF bl Get_ADC + ARM GAS /tmp/ccO46DoU.s page 555 + + 9574 .LVL753: - ARM GAS /tmp/ccWQNJQt.s page 555 - - - 649:Src/main.c **** temp16 = Get_ADC(1); - 9575 .loc 1 649 14 discriminator 1 view .LVU3126 + 650:Src/main.c **** temp16 = Get_ADC(1); + 9575 .loc 1 650 14 discriminator 1 view .LVU3126 9576 08c4 4E4D ldr r5, .L438+44 9577 08c6 2880 strh r0, [r5] @ movhi - 650:Src/main.c **** Long_Data[7] = temp16; - 9578 .loc 1 650 7 is_stmt 1 view .LVU3127 - 650:Src/main.c **** Long_Data[7] = temp16; - 9579 .loc 1 650 16 is_stmt 0 view .LVU3128 + 651:Src/main.c **** Long_Data[7] = temp16; + 9578 .loc 1 651 7 is_stmt 1 view .LVU3127 + 651:Src/main.c **** Long_Data[7] = temp16; + 9579 .loc 1 651 16 is_stmt 0 view .LVU3128 9580 08c8 0120 movs r0, #1 9581 08ca FFF7FEFF bl Get_ADC 9582 .LVL754: - 650:Src/main.c **** Long_Data[7] = temp16; - 9583 .loc 1 650 14 discriminator 1 view .LVU3129 + 651:Src/main.c **** Long_Data[7] = temp16; + 9583 .loc 1 651 14 discriminator 1 view .LVU3129 9584 08ce 2880 strh r0, [r5] @ movhi - 651:Src/main.c **** - 9585 .loc 1 651 7 is_stmt 1 view .LVU3130 - 651:Src/main.c **** - 9586 .loc 1 651 20 is_stmt 0 view .LVU3131 + 652:Src/main.c **** + 9585 .loc 1 652 7 is_stmt 1 view .LVU3130 + 652:Src/main.c **** + 9586 .loc 1 652 20 is_stmt 0 view .LVU3131 9587 08d0 E081 strh r0, [r4, #14] @ movhi - 654:Src/main.c **** Long_Data[8] = temp16; - 9588 .loc 1 654 7 is_stmt 1 view .LVU3132 - 654:Src/main.c **** Long_Data[8] = temp16; - 9589 .loc 1 654 16 is_stmt 0 view .LVU3133 + 655:Src/main.c **** Long_Data[8] = temp16; + 9588 .loc 1 655 7 is_stmt 1 view .LVU3132 + 655:Src/main.c **** Long_Data[8] = temp16; + 9589 .loc 1 655 16 is_stmt 0 view .LVU3133 9590 08d2 0120 movs r0, #1 9591 08d4 FFF7FEFF bl Get_ADC 9592 .LVL755: - 654:Src/main.c **** Long_Data[8] = temp16; - 9593 .loc 1 654 14 discriminator 1 view .LVU3134 + 655:Src/main.c **** Long_Data[8] = temp16; + 9593 .loc 1 655 14 discriminator 1 view .LVU3134 9594 08d8 2880 strh r0, [r5] @ movhi - 655:Src/main.c **** - 9595 .loc 1 655 7 is_stmt 1 view .LVU3135 - 655:Src/main.c **** - 9596 .loc 1 655 20 is_stmt 0 view .LVU3136 + 656:Src/main.c **** + 9595 .loc 1 656 7 is_stmt 1 view .LVU3135 + 656:Src/main.c **** + 9596 .loc 1 656 20 is_stmt 0 view .LVU3136 9597 08da 2082 strh r0, [r4, #16] @ movhi - 658:Src/main.c **** Long_Data[9] = temp16; - 9598 .loc 1 658 7 is_stmt 1 view .LVU3137 - 658:Src/main.c **** Long_Data[9] = temp16; - 9599 .loc 1 658 16 is_stmt 0 view .LVU3138 + 659:Src/main.c **** Long_Data[9] = temp16; + 9598 .loc 1 659 7 is_stmt 1 view .LVU3137 + 659:Src/main.c **** Long_Data[9] = temp16; + 9599 .loc 1 659 16 is_stmt 0 view .LVU3138 9600 08dc 0120 movs r0, #1 9601 08de FFF7FEFF bl Get_ADC 9602 .LVL756: - 658:Src/main.c **** Long_Data[9] = temp16; - 9603 .loc 1 658 14 discriminator 1 view .LVU3139 + 659:Src/main.c **** Long_Data[9] = temp16; + 9603 .loc 1 659 14 discriminator 1 view .LVU3139 9604 08e2 2880 strh r0, [r5] @ movhi - 659:Src/main.c **** - 9605 .loc 1 659 7 is_stmt 1 view .LVU3140 - 659:Src/main.c **** - 9606 .loc 1 659 20 is_stmt 0 view .LVU3141 + 660:Src/main.c **** + 9605 .loc 1 660 7 is_stmt 1 view .LVU3140 + 660:Src/main.c **** + 9606 .loc 1 660 20 is_stmt 0 view .LVU3141 9607 08e4 6082 strh r0, [r4, #18] @ movhi - 662:Src/main.c **** Long_Data[10] = temp16; - 9608 .loc 1 662 7 is_stmt 1 view .LVU3142 - 662:Src/main.c **** Long_Data[10] = temp16; - 9609 .loc 1 662 16 is_stmt 0 view .LVU3143 + 663:Src/main.c **** Long_Data[10] = temp16; + 9608 .loc 1 663 7 is_stmt 1 view .LVU3142 + 663:Src/main.c **** Long_Data[10] = temp16; + 9609 .loc 1 663 16 is_stmt 0 view .LVU3143 9610 08e6 0120 movs r0, #1 9611 08e8 FFF7FEFF bl Get_ADC 9612 .LVL757: - 662:Src/main.c **** Long_Data[10] = temp16; - ARM GAS /tmp/ccWQNJQt.s page 556 + ARM GAS /tmp/ccO46DoU.s page 556 - 9613 .loc 1 662 14 discriminator 1 view .LVU3144 + 663:Src/main.c **** Long_Data[10] = temp16; + 9613 .loc 1 663 14 discriminator 1 view .LVU3144 9614 08ec 2880 strh r0, [r5] @ movhi - 663:Src/main.c **** - 9615 .loc 1 663 7 is_stmt 1 view .LVU3145 - 663:Src/main.c **** - 9616 .loc 1 663 21 is_stmt 0 view .LVU3146 + 664:Src/main.c **** + 9615 .loc 1 664 7 is_stmt 1 view .LVU3145 + 664:Src/main.c **** + 9616 .loc 1 664 21 is_stmt 0 view .LVU3146 9617 08ee A082 strh r0, [r4, #20] @ movhi - 666:Src/main.c **** Long_Data[11] = temp16; - 9618 .loc 1 666 7 is_stmt 1 view .LVU3147 - 666:Src/main.c **** Long_Data[11] = temp16; - 9619 .loc 1 666 16 is_stmt 0 view .LVU3148 + 667:Src/main.c **** Long_Data[11] = temp16; + 9618 .loc 1 667 7 is_stmt 1 view .LVU3147 + 667:Src/main.c **** Long_Data[11] = temp16; + 9619 .loc 1 667 16 is_stmt 0 view .LVU3148 9620 08f0 0120 movs r0, #1 9621 08f2 FFF7FEFF bl Get_ADC 9622 .LVL758: - 666:Src/main.c **** Long_Data[11] = temp16; - 9623 .loc 1 666 14 discriminator 1 view .LVU3149 + 667:Src/main.c **** Long_Data[11] = temp16; + 9623 .loc 1 667 14 discriminator 1 view .LVU3149 9624 08f6 2880 strh r0, [r5] @ movhi - 667:Src/main.c **** temp16 = Get_ADC(2); - 9625 .loc 1 667 7 is_stmt 1 view .LVU3150 - 667:Src/main.c **** temp16 = Get_ADC(2); - 9626 .loc 1 667 21 is_stmt 0 view .LVU3151 + 668:Src/main.c **** temp16 = Get_ADC(2); + 9625 .loc 1 668 7 is_stmt 1 view .LVU3150 + 668:Src/main.c **** temp16 = Get_ADC(2); + 9626 .loc 1 668 21 is_stmt 0 view .LVU3151 9627 08f8 E082 strh r0, [r4, #22] @ movhi - 668:Src/main.c **** - 9628 .loc 1 668 7 is_stmt 1 view .LVU3152 - 668:Src/main.c **** - 9629 .loc 1 668 16 is_stmt 0 view .LVU3153 + 669:Src/main.c **** + 9628 .loc 1 669 7 is_stmt 1 view .LVU3152 + 669:Src/main.c **** + 9629 .loc 1 669 16 is_stmt 0 view .LVU3153 9630 08fa 0220 movs r0, #2 9631 08fc FFF7FEFF bl Get_ADC 9632 .LVL759: - 668:Src/main.c **** - 9633 .loc 1 668 14 discriminator 1 view .LVU3154 + 669:Src/main.c **** + 9633 .loc 1 669 14 discriminator 1 view .LVU3154 9634 0900 2880 strh r0, [r5] @ movhi - 671:Src/main.c **** temp16 = Get_ADC(4); - 9635 .loc 1 671 7 is_stmt 1 view .LVU3155 - 671:Src/main.c **** temp16 = Get_ADC(4); - 9636 .loc 1 671 16 is_stmt 0 view .LVU3156 + 672:Src/main.c **** temp16 = Get_ADC(4); + 9635 .loc 1 672 7 is_stmt 1 view .LVU3155 + 672:Src/main.c **** temp16 = Get_ADC(4); + 9636 .loc 1 672 16 is_stmt 0 view .LVU3156 9637 0902 0320 movs r0, #3 9638 0904 FFF7FEFF bl Get_ADC 9639 .LVL760: - 671:Src/main.c **** temp16 = Get_ADC(4); - 9640 .loc 1 671 14 discriminator 1 view .LVU3157 + 672:Src/main.c **** temp16 = Get_ADC(4); + 9640 .loc 1 672 14 discriminator 1 view .LVU3157 9641 0908 2880 strh r0, [r5] @ movhi - 672:Src/main.c **** Long_Data[12] = temp16; - 9642 .loc 1 672 7 is_stmt 1 view .LVU3158 - 672:Src/main.c **** Long_Data[12] = temp16; - 9643 .loc 1 672 16 is_stmt 0 view .LVU3159 + 673:Src/main.c **** Long_Data[12] = temp16; + 9642 .loc 1 673 7 is_stmt 1 view .LVU3158 + 673:Src/main.c **** Long_Data[12] = temp16; + 9643 .loc 1 673 16 is_stmt 0 view .LVU3159 9644 090a 0420 movs r0, #4 9645 090c FFF7FEFF bl Get_ADC 9646 .LVL761: - 672:Src/main.c **** Long_Data[12] = temp16; - 9647 .loc 1 672 14 discriminator 1 view .LVU3160 + 673:Src/main.c **** Long_Data[12] = temp16; + 9647 .loc 1 673 14 discriminator 1 view .LVU3160 9648 0910 2880 strh r0, [r5] @ movhi - 673:Src/main.c **** temp16 = Get_ADC(5); - 9649 .loc 1 673 7 is_stmt 1 view .LVU3161 - 673:Src/main.c **** temp16 = Get_ADC(5); - 9650 .loc 1 673 21 is_stmt 0 view .LVU3162 + 674:Src/main.c **** temp16 = Get_ADC(5); + 9649 .loc 1 674 7 is_stmt 1 view .LVU3161 + 674:Src/main.c **** temp16 = Get_ADC(5); + 9650 .loc 1 674 21 is_stmt 0 view .LVU3162 + ARM GAS /tmp/ccO46DoU.s page 557 + + 9651 0912 2083 strh r0, [r4, #24] @ movhi - ARM GAS /tmp/ccWQNJQt.s page 557 - - - 674:Src/main.c **** - 9652 .loc 1 674 7 is_stmt 1 view .LVU3163 - 674:Src/main.c **** - 9653 .loc 1 674 16 is_stmt 0 view .LVU3164 + 675:Src/main.c **** + 9652 .loc 1 675 7 is_stmt 1 view .LVU3163 + 675:Src/main.c **** + 9653 .loc 1 675 16 is_stmt 0 view .LVU3164 9654 0914 0520 movs r0, #5 9655 0916 FFF7FEFF bl Get_ADC 9656 .LVL762: - 674:Src/main.c **** - 9657 .loc 1 674 14 discriminator 1 view .LVU3165 + 675:Src/main.c **** + 9657 .loc 1 675 14 discriminator 1 view .LVU3165 9658 091a 2880 strh r0, [r5] @ movhi - 677:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9659 .loc 1 677 7 is_stmt 1 view .LVU3166 - 677:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9660 .loc 1 677 16 is_stmt 0 view .LVU3167 + 678:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 9659 .loc 1 678 7 is_stmt 1 view .LVU3166 + 678:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 9660 .loc 1 678 16 is_stmt 0 view .LVU3167 9661 091c 394B ldr r3, .L438+48 9662 091e 1B68 ldr r3, [r3] 9663 0920 394A ldr r2, .L438+52 9664 0922 1360 str r3, [r2] - 678:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9665 .loc 1 678 7 is_stmt 1 view .LVU3168 - 678:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9666 .loc 1 678 20 is_stmt 0 view .LVU3169 + 679:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 9665 .loc 1 679 7 is_stmt 1 view .LVU3168 + 679:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 9666 .loc 1 679 20 is_stmt 0 view .LVU3169 9667 0924 E380 strh r3, [r4, #6] @ movhi - 679:Src/main.c **** - 9668 .loc 1 679 7 is_stmt 1 view .LVU3170 - 679:Src/main.c **** - 9669 .loc 1 679 31 is_stmt 0 view .LVU3171 + 680:Src/main.c **** + 9668 .loc 1 680 7 is_stmt 1 view .LVU3170 + 680:Src/main.c **** + 9669 .loc 1 680 31 is_stmt 0 view .LVU3171 9670 0926 1B0C lsrs r3, r3, #16 - 679:Src/main.c **** - 9671 .loc 1 679 20 view .LVU3172 + 680:Src/main.c **** + 9671 .loc 1 680 20 view .LVU3172 9672 0928 2381 strh r3, [r4, #8] @ movhi - 682:Src/main.c **** - 9673 .loc 1 682 7 is_stmt 1 view .LVU3173 - 682:Src/main.c **** - 9674 .loc 1 682 31 is_stmt 0 view .LVU3174 + 683:Src/main.c **** + 9673 .loc 1 683 7 is_stmt 1 view .LVU3173 + 683:Src/main.c **** + 9674 .loc 1 683 31 is_stmt 0 view .LVU3174 9675 092a 3388 ldrh r3, [r6] - 682:Src/main.c **** - 9676 .loc 1 682 20 view .LVU3175 + 683:Src/main.c **** + 9676 .loc 1 683 20 view .LVU3175 9677 092c 6381 strh r3, [r4, #10] @ movhi - 685:Src/main.c **** } - 9678 .loc 1 685 7 is_stmt 1 view .LVU3176 - 685:Src/main.c **** } - 9679 .loc 1 685 31 is_stmt 0 view .LVU3177 + 686:Src/main.c **** } + 9678 .loc 1 686 7 is_stmt 1 view .LVU3176 + 686:Src/main.c **** } + 9679 .loc 1 686 31 is_stmt 0 view .LVU3177 9680 092e 3B88 ldrh r3, [r7] - 685:Src/main.c **** } - 9681 .loc 1 685 20 view .LVU3178 + 686:Src/main.c **** } + 9681 .loc 1 686 20 view .LVU3178 9682 0930 A381 strh r3, [r4, #12] @ movhi 9683 0932 A4E5 b .L411 9684 .L413: - 713:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9685 .loc 1 713 5 is_stmt 1 view .LVU3179 - 713:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9686 .loc 1 713 17 is_stmt 0 view .LVU3180 + 714:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9685 .loc 1 714 5 is_stmt 1 view .LVU3179 + 714:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9686 .loc 1 714 17 is_stmt 0 view .LVU3180 9687 0934 354C ldr r4, .L438+56 9688 0936 0D21 movs r1, #13 9689 0938 2046 mov r0, r4 + ARM GAS /tmp/ccO46DoU.s page 558 + + 9690 093a FFF7FEFF bl CalculateChecksum - ARM GAS /tmp/ccWQNJQt.s page 558 - - 9691 .LVL763: - 713:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9692 .loc 1 713 15 discriminator 1 view .LVU3181 + 714:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9692 .loc 1 714 15 discriminator 1 view .LVU3181 9693 093e 344B ldr r3, .L438+60 9694 0940 1880 strh r0, [r3] @ movhi - 714:Src/main.c **** - 9695 .loc 1 714 5 is_stmt 1 view .LVU3182 - 714:Src/main.c **** - 9696 .loc 1 714 24 is_stmt 0 view .LVU3183 + 715:Src/main.c **** + 9695 .loc 1 715 5 is_stmt 1 view .LVU3182 + 715:Src/main.c **** + 9696 .loc 1 715 24 is_stmt 0 view .LVU3183 9697 0942 6083 strh r0, [r4, #26] @ movhi - 716:Src/main.c **** { - 9698 .loc 1 716 5 is_stmt 1 view .LVU3184 + 717:Src/main.c **** { + 9698 .loc 1 717 5 is_stmt 1 view .LVU3184 9699 .LBB578: - 716:Src/main.c **** { - 9700 .loc 1 716 10 view .LVU3185 + 717:Src/main.c **** { + 9700 .loc 1 717 10 view .LVU3185 9701 .LVL764: - 716:Src/main.c **** { - 9702 .loc 1 716 19 is_stmt 0 view .LVU3186 + 717:Src/main.c **** { + 9702 .loc 1 717 19 is_stmt 0 view .LVU3186 9703 0944 0023 movs r3, #0 - 716:Src/main.c **** { - 9704 .loc 1 716 5 view .LVU3187 + 717:Src/main.c **** { + 9704 .loc 1 717 5 view .LVU3187 9705 0946 0BE0 b .L416 9706 .LVL765: 9707 .L417: - 718:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9708 .loc 1 718 6 is_stmt 1 view .LVU3188 - 718:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9709 .loc 1 718 33 is_stmt 0 view .LVU3189 + 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9708 .loc 1 719 6 is_stmt 1 view .LVU3188 + 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9709 .loc 1 719 33 is_stmt 0 view .LVU3189 9710 0948 2C4A ldr r2, .L438+40 9711 094a 32F81320 ldrh r2, [r2, r3, lsl #1] - 718:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9712 .loc 1 718 17 view .LVU3190 + 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9712 .loc 1 719 17 view .LVU3190 9713 094e 5900 lsls r1, r3, #1 - 718:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9714 .loc 1 718 21 view .LVU3191 + 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9714 .loc 1 719 21 view .LVU3191 9715 0950 3048 ldr r0, .L438+64 9716 0952 00F81320 strb r2, [r0, r3, lsl #1] - 719:Src/main.c **** } - 9717 .loc 1 719 6 is_stmt 1 view .LVU3192 - 719:Src/main.c **** } - 9718 .loc 1 719 19 is_stmt 0 view .LVU3193 + 720:Src/main.c **** } + 9717 .loc 1 720 6 is_stmt 1 view .LVU3192 + 720:Src/main.c **** } + 9718 .loc 1 720 19 is_stmt 0 view .LVU3193 9719 0956 0131 adds r1, r1, #1 - 719:Src/main.c **** } - 9720 .loc 1 719 23 view .LVU3194 + 720:Src/main.c **** } + 9720 .loc 1 720 23 view .LVU3194 9721 0958 120A lsrs r2, r2, #8 9722 095a 4254 strb r2, [r0, r1] - 716:Src/main.c **** { - 9723 .loc 1 716 38 is_stmt 1 discriminator 3 view .LVU3195 + 717:Src/main.c **** { + 9723 .loc 1 717 38 is_stmt 1 discriminator 3 view .LVU3195 9724 095c 0133 adds r3, r3, #1 9725 .LVL766: - 716:Src/main.c **** { - 9726 .loc 1 716 38 is_stmt 0 discriminator 3 view .LVU3196 + 717:Src/main.c **** { + 9726 .loc 1 717 38 is_stmt 0 discriminator 3 view .LVU3196 9727 095e 9BB2 uxth r3, r3 9728 .LVL767: 9729 .L416: - 716:Src/main.c **** { - 9730 .loc 1 716 28 is_stmt 1 discriminator 1 view .LVU3197 - ARM GAS /tmp/ccWQNJQt.s page 559 + 717:Src/main.c **** { + ARM GAS /tmp/ccO46DoU.s page 559 + 9730 .loc 1 717 28 is_stmt 1 discriminator 1 view .LVU3197 9731 0960 0E2B cmp r3, #14 9732 0962 F1D9 bls .L417 9733 .LBE578: - 726:Src/main.c **** UART_transmission_request = NO_MESS; - 9734 .loc 1 726 5 view .LVU3198 + 727:Src/main.c **** UART_transmission_request = NO_MESS; + 9734 .loc 1 727 5 view .LVU3198 9735 0964 1E20 movs r0, #30 9736 0966 FFF7FEFF bl USART_TX_DMA 9737 .LVL768: - 727:Src/main.c **** break; - 9738 .loc 1 727 5 view .LVU3199 - 727:Src/main.c **** break; - 9739 .loc 1 727 31 is_stmt 0 view .LVU3200 + 728:Src/main.c **** break; + 9738 .loc 1 728 5 view .LVU3199 + 728:Src/main.c **** break; + 9739 .loc 1 728 31 is_stmt 0 view .LVU3200 9740 096a 2B4B ldr r3, .L438+68 9741 096c 0022 movs r2, #0 9742 096e 1A70 strb r2, [r3] - 728:Src/main.c **** case MESS_03://Transmith saved packet - 9743 .loc 1 728 4 is_stmt 1 view .LVU3201 + 729:Src/main.c **** case MESS_03://Transmith saved packet + 9743 .loc 1 729 4 is_stmt 1 view .LVU3201 9744 0970 FFF7D3BB b .L415 9745 .LVL769: 9746 .L418: 9747 .LBB579: - 732:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9748 .loc 1 732 6 view .LVU3202 - 732:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9749 .loc 1 732 33 is_stmt 0 view .LVU3203 + 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9748 .loc 1 733 6 view .LVU3202 + 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9749 .loc 1 733 33 is_stmt 0 view .LVU3203 9750 0974 214A ldr r2, .L438+40 9751 0976 32F81320 ldrh r2, [r2, r3, lsl #1] - 732:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9752 .loc 1 732 17 view .LVU3204 + 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9752 .loc 1 733 17 view .LVU3204 9753 097a 5900 lsls r1, r3, #1 - 732:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9754 .loc 1 732 21 view .LVU3205 + 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9754 .loc 1 733 21 view .LVU3205 9755 097c 2548 ldr r0, .L438+64 9756 097e 00F81320 strb r2, [r0, r3, lsl #1] - 733:Src/main.c **** } - 9757 .loc 1 733 6 is_stmt 1 view .LVU3206 - 733:Src/main.c **** } - 9758 .loc 1 733 19 is_stmt 0 view .LVU3207 + 734:Src/main.c **** } + 9757 .loc 1 734 6 is_stmt 1 view .LVU3206 + 734:Src/main.c **** } + 9758 .loc 1 734 19 is_stmt 0 view .LVU3207 9759 0982 0131 adds r1, r1, #1 - 733:Src/main.c **** } - 9760 .loc 1 733 23 view .LVU3208 + 734:Src/main.c **** } + 9760 .loc 1 734 23 view .LVU3208 9761 0984 120A lsrs r2, r2, #8 9762 0986 4254 strb r2, [r0, r1] - 730:Src/main.c **** { - 9763 .loc 1 730 38 is_stmt 1 discriminator 3 view .LVU3209 + 731:Src/main.c **** { + 9763 .loc 1 731 38 is_stmt 1 discriminator 3 view .LVU3209 9764 0988 0133 adds r3, r3, #1 9765 .LVL770: - 730:Src/main.c **** { - 9766 .loc 1 730 38 is_stmt 0 discriminator 3 view .LVU3210 + 731:Src/main.c **** { + 9766 .loc 1 731 38 is_stmt 0 discriminator 3 view .LVU3210 9767 098a 9BB2 uxth r3, r3 9768 .LVL771: 9769 .L414: - 730:Src/main.c **** { - 9770 .loc 1 730 28 is_stmt 1 discriminator 1 view .LVU3211 + 731:Src/main.c **** { + 9770 .loc 1 731 28 is_stmt 1 discriminator 1 view .LVU3211 9771 098c 0E2B cmp r3, #14 9772 098e F1D9 bls .L418 + ARM GAS /tmp/ccO46DoU.s page 560 + + 9773 .LBE579: - ARM GAS /tmp/ccWQNJQt.s page 560 - - - 739:Src/main.c **** UART_transmission_request = NO_MESS; - 9774 .loc 1 739 5 view .LVU3212 + 740:Src/main.c **** UART_transmission_request = NO_MESS; + 9774 .loc 1 740 5 view .LVU3212 9775 0990 1E20 movs r0, #30 9776 0992 FFF7FEFF bl USART_TX_DMA 9777 .LVL772: - 740:Src/main.c **** break; - 9778 .loc 1 740 5 view .LVU3213 - 740:Src/main.c **** break; - 9779 .loc 1 740 31 is_stmt 0 view .LVU3214 + 741:Src/main.c **** break; + 9778 .loc 1 741 5 view .LVU3213 + 741:Src/main.c **** break; + 9779 .loc 1 741 31 is_stmt 0 view .LVU3214 9780 0996 204B ldr r3, .L438+68 9781 0998 0022 movs r2, #0 9782 099a 1A70 strb r2, [r3] - 741:Src/main.c **** } - 9783 .loc 1 741 4 is_stmt 1 view .LVU3215 + 742:Src/main.c **** } + 9783 .loc 1 742 4 is_stmt 1 view .LVU3215 9784 099c FFF7BDBB b .L415 9785 .LVL773: 9786 .L420: - 701:Src/main.c **** { - 9787 .loc 1 701 3 is_stmt 0 view .LVU3216 + 702:Src/main.c **** { + 9787 .loc 1 702 3 is_stmt 0 view .LVU3216 9788 09a0 0023 movs r3, #0 9789 09a2 F3E7 b .L414 9790 .L423: - 743:Src/main.c **** { - 9791 .loc 1 743 28 discriminator 1 view .LVU3217 + 744:Src/main.c **** { + 9791 .loc 1 744 28 discriminator 1 view .LVU3217 9792 09a4 174B ldr r3, .L438+48 9793 09a6 1B68 ldr r3, [r3] 9794 09a8 1C4A ldr r2, .L438+72 9795 09aa 1268 ldr r2, [r2] 9796 09ac 9B1A subs r3, r3, r2 - 743:Src/main.c **** { - 9797 .loc 1 743 21 discriminator 1 view .LVU3218 + 744:Src/main.c **** { + 9797 .loc 1 744 21 discriminator 1 view .LVU3218 9798 09ae 642B cmp r3, #100 9799 09b0 7FF6B8AB bls .L368 - 745:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 9800 .loc 1 745 4 is_stmt 1 view .LVU3219 - 745:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 9801 .loc 1 745 18 is_stmt 0 view .LVU3220 + 746:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 9800 .loc 1 746 4 is_stmt 1 view .LVU3219 + 746:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 9801 .loc 1 746 18 is_stmt 0 view .LVU3220 9802 09b4 0022 movs r2, #0 9803 09b6 1A4B ldr r3, .L438+76 9804 09b8 1A80 strh r2, [r3] @ movhi - 746:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9805 .loc 1 746 4 is_stmt 1 view .LVU3221 - 746:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9806 .loc 1 746 14 is_stmt 0 view .LVU3222 + 747:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 9805 .loc 1 747 4 is_stmt 1 view .LVU3221 + 747:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 9806 .loc 1 747 14 is_stmt 0 view .LVU3222 9807 09ba 1A49 ldr r1, .L438+80 9808 09bc 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 746:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9809 .loc 1 746 18 view .LVU3223 + 747:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 9809 .loc 1 747 18 view .LVU3223 9810 09be 43F00203 orr r3, r3, #2 9811 09c2 0B70 strb r3, [r1] - 747:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 9812 .loc 1 747 4 is_stmt 1 view .LVU3224 - 747:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 9813 .loc 1 747 30 is_stmt 0 view .LVU3225 + 748:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 9812 .loc 1 748 4 is_stmt 1 view .LVU3224 + 748:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 9813 .loc 1 748 30 is_stmt 0 view .LVU3225 9814 09c4 144B ldr r3, .L438+68 9815 09c6 0121 movs r1, #1 + ARM GAS /tmp/ccO46DoU.s page 561 + + 9816 09c8 1970 strb r1, [r3] - ARM GAS /tmp/ccWQNJQt.s page 561 - - - 748:Src/main.c **** } - 9817 .loc 1 748 4 is_stmt 1 view .LVU3226 - 748:Src/main.c **** } - 9818 .loc 1 748 12 is_stmt 0 view .LVU3227 + 749:Src/main.c **** } + 9817 .loc 1 749 4 is_stmt 1 view .LVU3226 + 749:Src/main.c **** } + 9818 .loc 1 749 12 is_stmt 0 view .LVU3227 9819 09ca 174B ldr r3, .L438+84 9820 09cc 1A70 strb r2, [r3] 9821 09ce FFF7A9BB b .L368 @@ -33657,10 +33658,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 9869 LD2_param: 9870 0000 00000000 .space 12 9870 00000000 + ARM GAS /tmp/ccO46DoU.s page 562 + + 9870 00000000 - ARM GAS /tmp/ccWQNJQt.s page 562 - - 9871 .global LD1_param 9872 .section .bss.LD1_param,"aw",%nobits 9873 .align 2 @@ -33717,10 +33718,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 9919 0000 00000000 .space 16 9919 00000000 9919 00000000 + ARM GAS /tmp/ccO46DoU.s page 563 + + 9919 00000000 - ARM GAS /tmp/ccWQNJQt.s page 563 - - 9920 .global sizeoffile 9921 .section .bss.sizeoffile,"aw",%nobits 9922 .align 2 @@ -33777,10 +33778,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 9983 .section .bss.UART_rec_incr,"aw",%nobits 9984 .align 1 9987 UART_rec_incr: + ARM GAS /tmp/ccO46DoU.s page 564 + + 9988 0000 0000 .space 2 - ARM GAS /tmp/ccWQNJQt.s page 564 - - 9989 .global TIM10_coflag 9990 .section .bss.TIM10_coflag,"aw",%nobits 9993 TIM10_coflag: @@ -33837,10 +33838,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 10060 .align 2 10063 TO10_counter: 10064 0000 00000000 .space 4 + ARM GAS /tmp/ccO46DoU.s page 565 + + 10065 .global TO10 - ARM GAS /tmp/ccWQNJQt.s page 565 - - 10066 .section .bss.TO10,"aw",%nobits 10067 .align 2 10070 TO10: @@ -33897,10 +33898,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 10141 0000 00000000 .space 4 10142 .global huart8 10143 .section .bss.huart8,"aw",%nobits + ARM GAS /tmp/ccO46DoU.s page 566 + + 10144 .align 2 - ARM GAS /tmp/ccWQNJQt.s page 566 - - 10147 huart8: 10148 0000 00000000 .space 136 10148 00000000 @@ -33957,10 +33958,10 @@ ARM GAS /tmp/ccWQNJQt.s page 1 10186 .align 2 10189 hadc3: 10190 0000 00000000 .space 72 + ARM GAS /tmp/ccO46DoU.s page 567 + + 10190 00000000 - ARM GAS /tmp/ccWQNJQt.s page 567 - - 10190 00000000 10190 00000000 10190 00000000 @@ -33998,260 +33999,260 @@ ARM GAS /tmp/ccWQNJQt.s page 1 10220 .file 29 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