ChTheo/RadioPhotonic_PCB_software
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solved laser current setup timing issue

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This commit is contained in:
feda
2025-03-04 11:43:09 +03:00
parent 4162005fd4
commit b02e3a35b7
128 changed files with 27304 additions and 24438 deletions
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46
build/system_stm32f7xx.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccBeeNvs.s page 1
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1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
29:Src/system_stm32f7xx.c **** * in the root directory of this software component.
30:Src/system_stm32f7xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
31:Src/system_stm32f7xx.c **** *
ARM GAS /tmp/ccBeeNvs.s page 2
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32:Src/system_stm32f7xx.c **** ******************************************************************************
@ -118,7 +118,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
86:Src/system_stm32f7xx.c **** #if defined(VECT_TAB_SRAM)
87:Src/system_stm32f7xx.c **** #define VECT_TAB_BASE_ADDRESS RAMDTCM_BASE /*!< Vector Table base address field.
88:Src/system_stm32f7xx.c **** This value must be a multiple of 0x200. */
ARM GAS /tmp/ccBeeNvs.s page 3
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89:Src/system_stm32f7xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
@ -178,7 +178,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
143:Src/system_stm32f7xx.c ****
144:Src/system_stm32f7xx.c **** /**
145:Src/system_stm32f7xx.c **** * @brief Setup the microcontroller system
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146:Src/system_stm32f7xx.c **** * Initialize the Embedded Flash Interface, the PLL and update the
@ -238,7 +238,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
172:Src/system_stm32f7xx.c **** * based on this variable will be incorrect.
173:Src/system_stm32f7xx.c **** *
174:Src/system_stm32f7xx.c **** * @note - The system frequency computed by this function is not the real
ARM GAS /tmp/ccBeeNvs.s page 5
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175:Src/system_stm32f7xx.c **** * frequency in the chip. It is calculated based on the predefined
@ -298,7 +298,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
209:Src/system_stm32f7xx.c **** case 0x00: /* HSI used as system clock source */
210:Src/system_stm32f7xx.c **** SystemCoreClock = HSI_VALUE;
211:Src/system_stm32f7xx.c **** break;
ARM GAS /tmp/ccBeeNvs.s page 6
ARM GAS /tmp/ccgSjCYr.s page 6
212:Src/system_stm32f7xx.c **** case 0x04: /* HSE used as system clock source */
@ -358,7 +358,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
241:Src/system_stm32f7xx.c **** /* Compute HCLK frequency --------------------------------------------------*/
242:Src/system_stm32f7xx.c **** /* Get HCLK prescaler */
243:Src/system_stm32f7xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
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99 .loc 1 243 3 view .LVU18
@ -418,7 +418,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
140 .loc 1 221 12 view .LVU34
141 0044 02F03F02 and r2, r2, #63
142 .LVL12:
ARM GAS /tmp/ccBeeNvs.s page 8
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223:Src/system_stm32f7xx.c **** {
@ -478,7 +478,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
180 .loc 1 235 23 view .LVU51
181 0072 1360 str r3, [r2]
236:Src/system_stm32f7xx.c **** default:
ARM GAS /tmp/ccBeeNvs.s page 9
ARM GAS /tmp/ccgSjCYr.s page 9
182 .loc 1 236 7 is_stmt 1 view .LVU52
@ -538,7 +538,7 @@ ARM GAS /tmp/ccBeeNvs.s page 1
231 .section .rodata.APBPrescTable,"a"
232 .align 2
235 APBPrescTable:
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236 0000 00000000 .ascii "\000\000\000\000\001\002\003\004"
@ -549,22 +549,22 @@ ARM GAS /tmp/ccBeeNvs.s page 1
240 .file 3 "Drivers/CMSIS/Include/core_cm7.h"
241 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
242 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
ARM GAS /tmp/ccBeeNvs.s page 11
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DEFINED SYMBOLS
*ABS*:0000000000000000 system_stm32f7xx.c
/tmp/ccBeeNvs.s:17 .text.SystemInit:0000000000000000 $t
/tmp/ccBeeNvs.s:25 .text.SystemInit:0000000000000000 SystemInit
/tmp/ccBeeNvs.s:44 .text.SystemInit:0000000000000010 $d
/tmp/ccBeeNvs.s:49 .text.SystemCoreClockUpdate:0000000000000000 $t
/tmp/ccBeeNvs.s:56 .text.SystemCoreClockUpdate:0000000000000000 SystemCoreClockUpdate
/tmp/ccBeeNvs.s:205 .text.SystemCoreClockUpdate:000000000000008c $d
/tmp/ccBeeNvs.s:235 .rodata.APBPrescTable:0000000000000000 APBPrescTable
/tmp/ccBeeNvs.s:228 .rodata.AHBPrescTable:0000000000000000 AHBPrescTable
/tmp/ccBeeNvs.s:221 .data.SystemCoreClock:0000000000000000 SystemCoreClock
/tmp/ccBeeNvs.s:217 .data.SystemCoreClock:0000000000000000 $d
/tmp/ccBeeNvs.s:224 .rodata.AHBPrescTable:0000000000000000 $d
/tmp/ccBeeNvs.s:232 .rodata.APBPrescTable:0000000000000000 $d
/tmp/ccgSjCYr.s:17 .text.SystemInit:0000000000000000 $t
/tmp/ccgSjCYr.s:25 .text.SystemInit:0000000000000000 SystemInit
/tmp/ccgSjCYr.s:44 .text.SystemInit:0000000000000010 $d
/tmp/ccgSjCYr.s:49 .text.SystemCoreClockUpdate:0000000000000000 $t
/tmp/ccgSjCYr.s:56 .text.SystemCoreClockUpdate:0000000000000000 SystemCoreClockUpdate
/tmp/ccgSjCYr.s:205 .text.SystemCoreClockUpdate:000000000000008c $d
/tmp/ccgSjCYr.s:235 .rodata.APBPrescTable:0000000000000000 APBPrescTable
/tmp/ccgSjCYr.s:228 .rodata.AHBPrescTable:0000000000000000 AHBPrescTable
/tmp/ccgSjCYr.s:221 .data.SystemCoreClock:0000000000000000 SystemCoreClock
/tmp/ccgSjCYr.s:217 .data.SystemCoreClock:0000000000000000 $d
/tmp/ccgSjCYr.s:224 .rodata.AHBPrescTable:0000000000000000 $d
/tmp/ccgSjCYr.s:232 .rodata.APBPrescTable:0000000000000000 $d
NO UNDEFINED SYMBOLS