partially solved issue with random modulator and ADC clock stopping at the end of ЛЧМ. Done: when we want to stop clocks -- enable IRQ on sloewr clock (TIM11). In IRQ switches TIM4, TIM11 to one-pulse mode, disables IRQ. When we starting these timers th next time -- we resets their counters, one-pulse mode disables.

This commit is contained in:
2025-04-15 21:29:24 +03:00
parent 0829fd0983
commit 9974606734
5 changed files with 45 additions and 2 deletions

View File

@ -185,6 +185,7 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
NVIC.TIM1_TRG_COM_TIM11_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.TIM1_UP_TIM10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.TIM2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.TIM5_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true