diff --git a/Src/main.c b/Src/main.c index 5deb688..c3af010 100644 --- a/Src/main.c +++ b/Src/main.c @@ -44,7 +44,12 @@ #define AD9102_REG_WAV_CONFIG 0x0027u #define AD9102_REG_PAT_TIMEBASE 0x0028u #define AD9102_REG_PAT_PERIOD 0x0029u +#define AD9102_REG_DAC_PAT 0x002Bu #define AD9102_REG_SAW_CONFIG 0x0037u +#define AD9102_REG_START_DLY 0x005Cu +#define AD9102_REG_START_ADDR 0x005Du +#define AD9102_REG_STOP_ADDR 0x005Eu +#define AD9102_REG_SRAM_DATA_BASE 0x6000u #define AD9102_REG_CFG_ERROR 0x0060u #define AD9102_PAT_STATUS_RUN (1u << 0) @@ -68,14 +73,28 @@ #define AD9102_EX4_PAT_PERIOD 0xFFFFu #define AD9102_EX4_SAW_CONFIG 0x0606u +#define AD9102_EX2_WAV_CONFIG 0x3030u +#define AD9102_EX2_DAC_PAT 0x0101u +#define AD9102_EX2_SAW_CONFIG 0x0200u +#define AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT 0x1u +#define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u +#define AD9102_SRAM_START_DLY_DEFAULT 0x0000u +#define AD9102_SRAM_HOLD_DEFAULT 0x1u +#define AD9102_SRAM_SAMPLES_DEFAULT 16u +#define AD9102_SRAM_MAX_SAMPLES 4096u +#define AD9102_SRAM_RAMP_MIN (-8192) +#define AD9102_SRAM_RAMP_MAX (8191) +#define AD9102_SRAM_RAMP_SPAN (AD9102_SRAM_RAMP_MAX - AD9102_SRAM_RAMP_MIN) + #define AD9102_SAW_STEP_DEFAULT 1u #define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u #define AD9102_START_DELAY_BASE_DEFAULT 0x1u #define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u #define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu -#define AD9102_FLAG_ENABLE 0x0001u -#define AD9102_FLAG_TRIANGLE 0x0002u +#define AD9102_FLAG_ENABLE 0x0001u +#define AD9102_FLAG_TRIANGLE 0x0002u +#define AD9102_FLAG_SRAM 0x0004u /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ @@ -124,17 +143,29 @@ static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { 0x001eu, 0x001du }; -static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { - 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, - 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, - 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, - 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, - 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, - 0x0001u, 0x0001u -}; +static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, + 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, + 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, + 0x0001u, 0x0001u +}; + +static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = { + 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u, + 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u, + 0x0001u, 0x0001u +}; @@ -175,7 +206,10 @@ static void AD9102_WriteReg(uint16_t addr, uint16_t value); static uint16_t AD9102_ReadReg(uint16_t addr); static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); +static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle); +static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle); static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); +static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold); uint8_t CheckChecksum(uint16_t *pbuff); uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); //int SD_Init(void); @@ -435,45 +469,61 @@ int main(void) } break; case AD9102_CMD://10 - Configure AD9102 sawtooth output - if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) + if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) { uint16_t flags = COMMAND[0]; uint16_t param0 = COMMAND[1]; uint16_t param1 = COMMAND[2]; uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; - uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - uint16_t pat_period = param1; + uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; - if (param0 == 0u && param1 == 0u) + if (sram_mode) { - saw_step = AD9102_SAW_STEP_DEFAULT; - pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; - pat_period = AD9102_PAT_PERIOD_DEFAULT; + uint16_t samples = param0; + uint8_t hold = (uint8_t)(param1 & 0x0Fu); + uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle); + State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + { + State_Data[0] |= AD9102_ERR; + } } else { - if (saw_step == 0u) + uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + uint16_t pat_period = param1; + + if (param0 == 0u && param1 == 0u) { saw_step = AD9102_SAW_STEP_DEFAULT; - } - else if (saw_step > 63u) - { - saw_step = 63u; - } - if (pat_period == 0u) - { + pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; pat_period = AD9102_PAT_PERIOD_DEFAULT; } - } + else + { + if (saw_step == 0u) + { + saw_step = AD9102_SAW_STEP_DEFAULT; + } + else if (saw_step > 63u) + { + saw_step = 63u; + } + if (pat_period == 0u) + { + pat_period = AD9102_PAT_PERIOD_DEFAULT; + } + } - uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); - State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - { - State_Data[0] |= AD9102_ERR; + uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); + State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + { + State_Data[0] |= AD9102_ERR; + } } } else @@ -2521,6 +2571,137 @@ static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, return AD9102_ReadReg(AD9102_REG_PAT_STATUS); } +static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle) +{ + if (samples < 2u) + { + samples = 2u; + } + if (samples > AD9102_SRAM_MAX_SAMPLES) + { + samples = AD9102_SRAM_MAX_SAMPLES; + } + + // Enable SRAM access. + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); + + for (uint16_t i = 0; i < samples; i++) + { + int32_t value; + if (triangle) + { + uint16_t half = samples / 2u; + if (half == 0u) + { + half = 1u; + } + if (i < half) + { + uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u; + value = AD9102_SRAM_RAMP_MIN + + ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + } + else + { + uint16_t tail = (uint16_t)(samples - half); + uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; + value = AD9102_SRAM_RAMP_MAX - + ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom; + } + } + else + { + uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u; + value = AD9102_SRAM_RAMP_MIN + + ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + } + + if (value < -8192) + { + value = -8192; + } + else if (value > 8191) + { + value = 8191; + } + + uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu; + uint16_t word = (uint16_t)(sample_u14 << 2); + AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); + } + + // Disable SRAM access. + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +} + +static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle) +{ + if (samples == 0u) + { + samples = AD9102_SRAM_SAMPLES_DEFAULT; + } + if (samples < 2u) + { + samples = 2u; + } + if (samples > AD9102_SRAM_MAX_SAMPLES) + { + samples = AD9102_SRAM_MAX_SAMPLES; + } + if (hold == 0u) + { + hold = AD9102_SRAM_HOLD_DEFAULT; + } + if (hold > 0x0Fu) + { + hold = 0x0Fu; + } + + uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | + ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); + uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); + if (pat_period == 0u) + { + pat_period = samples; + } + if (pat_period > 0xFFFFu) + { + pat_period = 0xFFFFu; + } + + AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); + AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); + AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); + AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); + AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); + AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); + AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + + AD9102_LoadSramRamp(samples, triangle); + + if (enable) + { + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + for (volatile uint32_t d = 0; d < 1000; d++) {} + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + } + else + { + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + } + + return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +} + static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period) { uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); @@ -2600,6 +2781,104 @@ static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_ return (ok ? 0u : 1u); } + +static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold) +{ + uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + + if (samples == 0u) + { + samples = AD9102_SRAM_SAMPLES_DEFAULT; + } + if (samples < 2u) + { + samples = 2u; + } + if (samples > AD9102_SRAM_MAX_SAMPLES) + { + samples = AD9102_SRAM_MAX_SAMPLES; + } + if (hold == 0u) + { + hold = AD9102_SRAM_HOLD_DEFAULT; + } + if (hold > 0x0Fu) + { + hold = 0x0Fu; + } + + uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | + ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); + uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); + if (pat_period == 0u) + { + pat_period = samples; + } + if (pat_period > 0xFFFFu) + { + pat_period = 0xFFFFu; + } + + uint16_t stop_addr = (uint16_t)((samples - 1u) << 4); + + uint8_t ok = 1u; + + if (spiconfig != 0x0000u) + { + ok = 0u; + } + if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) + { + ok = 0u; + } + if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) + { + ok = 0u; + } + if (cfg_err & 0x003Fu) + { + ok = 0u; + } + if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) + { + ok = 0u; + } + + if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT) + { + ok = 0u; + } + + return (ok ? 0u : 1u); +} void Set_LTEC(uint8_t num, uint16_t DATA) { diff --git a/build/For_stm32.bin b/build/For_stm32.bin index 4415e18..62f9194 100755 Binary files a/build/For_stm32.bin and b/build/For_stm32.bin differ diff --git a/build/For_stm32.elf b/build/For_stm32.elf index 094531a..e81f8d8 100755 Binary files a/build/For_stm32.elf and b/build/For_stm32.elf differ diff --git a/build/For_stm32.hex b/build/For_stm32.hex index c79a80f..9f6ce8a 100644 --- a/build/For_stm32.hex +++ b/build/For_stm32.hex @@ -1,45 +1,45 @@ :020000040800F2 -:100000000000082041AF0008A1410008A3410008FA -:10001000A5410008A7410008A94100080000000010 -:10002000000000000000000000000000AB410008DC -:10003000AD41000800000000AF410008B1410008D8 -:1000400091AF000891AF000891AF000891AF000890 -:1000500091AF000891AF000891AF000891AF000880 -:1000600091AF000891AF000891AF000891AF000870 -:1000700091AF000891AF000891AF000891AF000860 -:1000800091AF000891AF0008B941000891AF000896 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+:10B7080050010020000000000000000000000000C0 +:10B718000000000000000000000000000000000021 +:10B728000000000000000000000000000000000011 +:10B738000000000000000000000000000000000001 +:0CB7480001010000100000000024F400CB +:040000050800B295A8 :00000001FF diff --git a/build/For_stm32.map b/build/For_stm32.map index 7f6b983..b5237bb 100644 --- a/build/For_stm32.map +++ b/build/For_stm32.map @@ -2080,7 +2080,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x08000000 g_pfnVectors 0x080001f8 . = ALIGN (0x4) -.text 0x08000200 0xadac +.text 0x08000200 0xb100 0x08000200 . = ALIGN (0x4) *(.text) .text 0x08000200 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o @@ -2149,949 +2149,958 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x08001734 0xb0 build/main.o .text.AD9102_WriteRegTable 0x080017e4 0x28 build/main.o + .text.AD9102_LoadSramRamp + 0x0800180c 0xc4 build/main.o .text.AD9102_Init - 0x0800180c 0x74 build/main.o + 0x080018d0 0x74 build/main.o .text.AD9102_ReadReg - 0x08001880 0xb0 build/main.o + 0x08001944 0xb0 build/main.o + .text.AD9102_CheckFlagsSram + 0x080019f4 0x112 build/main.o .text.AD9102_CheckFlags - 0x08001930 0xd8 build/main.o + 0x08001b06 0xd8 build/main.o + *fill* 0x08001bde 0x2 + .text.AD9102_ApplySram + 0x08001be0 0x134 build/main.o .text.AD9102_Apply - 0x08001a08 0xb8 build/main.o + 0x08001d14 0xb8 build/main.o .text.OUT_trigger - 0x08001ac0 0x124 build/main.o - .text.MPhD_T 0x08001be4 0x220 build/main.o + 0x08001dcc 0x124 build/main.o + .text.MPhD_T 0x08001ef0 0x220 build/main.o .text.Stop_TIM10 - 0x08001e04 0x20 build/main.o + 0x08002110 0x20 build/main.o .text.MX_GPIO_Init - 0x08001e24 0x25c build/main.o + 0x08002130 0x25c build/main.o .text.MX_SPI4_Init - 0x08002080 0xd4 build/main.o + 0x0800238c 0xd4 build/main.o .text.MX_SPI2_Init - 0x08002154 0xe8 build/main.o + 0x08002460 0xe8 build/main.o .text.MX_SPI5_Init - 0x0800223c 0xd0 build/main.o + 0x08002548 0xd0 build/main.o .text.MX_SPI6_Init - 0x0800230c 0xd0 build/main.o + 0x08002618 0xd0 build/main.o .text.MX_TIM2_Init - 0x080023dc 0x9c build/main.o + 0x080026e8 0x9c build/main.o .text.MX_TIM5_Init - 0x08002478 0x98 build/main.o + 0x08002784 0x98 build/main.o .text.MX_TIM7_Init - 0x08002510 0x8c build/main.o + 0x0800281c 0x8c build/main.o .text.MX_TIM6_Init - 0x0800259c 0x8c build/main.o + 0x080028a8 0x8c build/main.o .text.Init_params - 0x08002628 0x310 build/main.o - .text.Get_ADC 0x08002938 0x70 build/main.o + 0x08002934 0x310 build/main.o + .text.Get_ADC 0x08002c44 0x70 build/main.o .text.Set_LTEC - 0x080029a8 0x164 build/main.o - 0x080029a8 Set_LTEC + 0x08002cb4 0x164 build/main.o + 0x08002cb4 Set_LTEC .text.Decode_uart - 0x08002b0c 0x2f8 build/main.o + 0x08002e18 0x2f8 build/main.o .text.CalculateChecksum - 0x08002e04 0x18 build/main.o - 0x08002e04 CalculateChecksum + 0x08003110 0x18 build/main.o + 0x08003110 CalculateChecksum .text.CheckChecksum - 0x08002e1c 0x48 build/main.o - 0x08002e1c CheckChecksum - .text.SD_SAVE 0x08002e64 0x3c build/main.o - 0x08002e64 SD_SAVE - .text.SD_READ 0x08002ea0 0x4c build/main.o - 0x08002ea0 SD_READ + 0x08003128 0x48 build/main.o + 0x08003128 CheckChecksum + .text.SD_SAVE 0x08003170 0x3c build/main.o + 0x08003170 SD_SAVE + .text.SD_READ 0x080031ac 0x4c build/main.o + 0x080031ac SD_READ .text.SD_REMOVE - 0x08002eec 0x40 build/main.o - 0x08002eec SD_REMOVE + 0x080031f8 0x40 build/main.o + 0x080031f8 SD_REMOVE .text.USART_TX - 0x08002f2c 0x2c build/main.o - 0x08002f2c USART_TX + 0x08003238 0x2c build/main.o + 0x08003238 USART_TX .text.USART_TX_DMA - 0x08002f58 0x40 build/main.o - 0x08002f58 USART_TX_DMA + 0x08003264 0x40 build/main.o + 0x08003264 USART_TX_DMA .text.Error_Handler - 0x08002f98 0x4 build/main.o - 0x08002f98 Error_Handler + 0x080032a4 0x4 build/main.o + 0x080032a4 Error_Handler .text.MX_ADC1_Init - 0x08002f9c 0xc8 build/main.o + 0x080032a8 0xc8 build/main.o .text.MX_ADC3_Init - 0x08003064 0x6c build/main.o + 0x08003370 0x6c build/main.o .text.MX_USART1_UART_Init - 0x080030d0 0x190 build/main.o + 0x080033dc 0x190 build/main.o .text.MX_TIM10_Init - 0x08003260 0x2c build/main.o + 0x0800356c 0x2c build/main.o .text.MX_UART8_Init - 0x0800328c 0x38 build/main.o + 0x08003598 0x38 build/main.o .text.MX_TIM8_Init - 0x080032c4 0x6c build/main.o + 0x080035d0 0x6c build/main.o .text.MX_TIM11_Init - 0x08003330 0x70 build/main.o + 0x0800363c 0x70 build/main.o .text.MX_TIM4_Init - 0x080033a0 0xa4 build/main.o + 0x080036ac 0xa4 build/main.o .text.SystemClock_Config - 0x08003444 0xb4 build/main.o - 0x08003444 SystemClock_Config - .text.main 0x080034f8 0xac4 build/main.o - 0x080034f8 main + 0x08003750 0xb4 build/main.o + 0x08003750 SystemClock_Config + .text.main 0x08003804 0xb0c build/main.o + 0x08003804 main .text.BSP_SD_ReadBlocks - 0x08003fbc 0x20 build/bsp_driver_sd.o - 0x08003fbc BSP_SD_ReadBlocks + 0x08004310 0x20 build/bsp_driver_sd.o + 0x08004310 BSP_SD_ReadBlocks .text.BSP_SD_WriteBlocks - 0x08003fdc 0x20 build/bsp_driver_sd.o - 0x08003fdc BSP_SD_WriteBlocks + 0x08004330 0x20 build/bsp_driver_sd.o + 0x08004330 BSP_SD_WriteBlocks .text.BSP_SD_GetCardState - 0x08003ffc 0x14 build/bsp_driver_sd.o - 0x08003ffc BSP_SD_GetCardState + 0x08004350 0x14 build/bsp_driver_sd.o + 0x08004350 BSP_SD_GetCardState .text.BSP_SD_GetCardInfo - 0x08004010 0x10 build/bsp_driver_sd.o - 0x08004010 BSP_SD_GetCardInfo + 0x08004364 0x10 build/bsp_driver_sd.o + 0x08004364 BSP_SD_GetCardInfo .text.BSP_SD_IsDetected - 0x08004020 0x20 build/bsp_driver_sd.o - 0x08004020 BSP_SD_IsDetected + 0x08004374 0x20 build/bsp_driver_sd.o + 0x08004374 BSP_SD_IsDetected .text.BSP_SD_Init - 0x08004040 0x34 build/bsp_driver_sd.o - 0x08004040 BSP_SD_Init + 0x08004394 0x34 build/bsp_driver_sd.o + 0x08004394 BSP_SD_Init .text.SD_CheckStatus - 0x08004074 0x24 build/sd_diskio.o + 0x080043c8 0x24 build/sd_diskio.o .text.SD_initialize - 0x08004098 0x28 build/sd_diskio.o - 0x08004098 SD_initialize + 0x080043ec 0x28 build/sd_diskio.o + 0x080043ec SD_initialize .text.SD_status - 0x080040c0 0x8 build/sd_diskio.o - 0x080040c0 SD_status - .text.SD_read 0x080040c8 0x24 build/sd_diskio.o - 0x080040c8 SD_read + 0x08004414 0x8 build/sd_diskio.o + 0x08004414 SD_status + .text.SD_read 0x0800441c 0x24 build/sd_diskio.o + 0x0800441c SD_read .text.SD_write - 0x080040ec 0x24 build/sd_diskio.o - 0x080040ec SD_write + 0x08004440 0x24 build/sd_diskio.o + 0x08004440 SD_write .text.SD_ioctl - 0x08004110 0x58 build/sd_diskio.o - 0x08004110 SD_ioctl + 0x08004464 0x58 build/sd_diskio.o + 0x08004464 SD_ioctl .text.MX_FATFS_Init - 0x08004168 0x1c build/fatfs.o - 0x08004168 MX_FATFS_Init + 0x080044bc 0x1c build/fatfs.o + 0x080044bc MX_FATFS_Init .text.get_fattime - 0x08004184 0x4 build/fatfs.o - 0x08004184 get_fattime + 0x080044d8 0x4 build/fatfs.o + 0x080044d8 get_fattime .text.BSP_PlatformIsDetected - 0x08004188 0x18 build/fatfs_platform.o - 0x08004188 BSP_PlatformIsDetected + 0x080044dc 0x18 build/fatfs_platform.o + 0x080044dc BSP_PlatformIsDetected .text.NMI_Handler - 0x080041a0 0x2 build/stm32f7xx_it.o - 0x080041a0 NMI_Handler + 0x080044f4 0x2 build/stm32f7xx_it.o + 0x080044f4 NMI_Handler .text.HardFault_Handler - 0x080041a2 0x2 build/stm32f7xx_it.o - 0x080041a2 HardFault_Handler + 0x080044f6 0x2 build/stm32f7xx_it.o + 0x080044f6 HardFault_Handler .text.MemManage_Handler - 0x080041a4 0x2 build/stm32f7xx_it.o - 0x080041a4 MemManage_Handler + 0x080044f8 0x2 build/stm32f7xx_it.o + 0x080044f8 MemManage_Handler .text.BusFault_Handler - 0x080041a6 0x2 build/stm32f7xx_it.o - 0x080041a6 BusFault_Handler + 0x080044fa 0x2 build/stm32f7xx_it.o + 0x080044fa BusFault_Handler .text.UsageFault_Handler - 0x080041a8 0x2 build/stm32f7xx_it.o - 0x080041a8 UsageFault_Handler + 0x080044fc 0x2 build/stm32f7xx_it.o + 0x080044fc UsageFault_Handler .text.SVC_Handler - 0x080041aa 0x2 build/stm32f7xx_it.o - 0x080041aa SVC_Handler + 0x080044fe 0x2 build/stm32f7xx_it.o + 0x080044fe SVC_Handler .text.DebugMon_Handler - 0x080041ac 0x2 build/stm32f7xx_it.o - 0x080041ac DebugMon_Handler + 0x08004500 0x2 build/stm32f7xx_it.o + 0x08004500 DebugMon_Handler .text.PendSV_Handler - 0x080041ae 0x2 build/stm32f7xx_it.o - 0x080041ae PendSV_Handler + 0x08004502 0x2 build/stm32f7xx_it.o + 0x08004502 PendSV_Handler .text.SysTick_Handler - 0x080041b0 0x8 build/stm32f7xx_it.o - 0x080041b0 SysTick_Handler + 0x08004504 0x8 build/stm32f7xx_it.o + 0x08004504 SysTick_Handler .text.ADC_IRQHandler - 0x080041b8 0x18 build/stm32f7xx_it.o - 0x080041b8 ADC_IRQHandler + 0x0800450c 0x18 build/stm32f7xx_it.o + 0x0800450c ADC_IRQHandler .text.TIM1_UP_TIM10_IRQHandler - 0x080041d0 0x34 build/stm32f7xx_it.o - 0x080041d0 TIM1_UP_TIM10_IRQHandler + 0x08004524 0x34 build/stm32f7xx_it.o + 0x08004524 TIM1_UP_TIM10_IRQHandler .text.TIM1_TRG_COM_TIM11_IRQHandler - 0x08004204 0x34 build/stm32f7xx_it.o - 0x08004204 TIM1_TRG_COM_TIM11_IRQHandler + 0x08004558 0x34 build/stm32f7xx_it.o + 0x08004558 TIM1_TRG_COM_TIM11_IRQHandler .text.TIM2_IRQHandler - 0x08004238 0x2 build/stm32f7xx_it.o - 0x08004238 TIM2_IRQHandler - *fill* 0x0800423a 0x2 + 0x0800458c 0x2 build/stm32f7xx_it.o + 0x0800458c TIM2_IRQHandler + *fill* 0x0800458e 0x2 .text.TIM8_UP_TIM13_IRQHandler - 0x0800423c 0x50 build/stm32f7xx_it.o - 0x0800423c TIM8_UP_TIM13_IRQHandler + 0x08004590 0x50 build/stm32f7xx_it.o + 0x08004590 TIM8_UP_TIM13_IRQHandler .text.TIM5_IRQHandler - 0x0800428c 0x2 build/stm32f7xx_it.o - 0x0800428c TIM5_IRQHandler - *fill* 0x0800428e 0x2 + 0x080045e0 0x2 build/stm32f7xx_it.o + 0x080045e0 TIM5_IRQHandler + *fill* 0x080045e2 0x2 .text.TIM6_DAC_IRQHandler - 0x08004290 0x34 build/stm32f7xx_it.o - 0x08004290 TIM6_DAC_IRQHandler + 0x080045e4 0x34 build/stm32f7xx_it.o + 0x080045e4 TIM6_DAC_IRQHandler .text.TIM7_IRQHandler - 0x080042c4 0x24 build/stm32f7xx_it.o - 0x080042c4 TIM7_IRQHandler + 0x08004618 0x24 build/stm32f7xx_it.o + 0x08004618 TIM7_IRQHandler .text.UART_RxCpltCallback - 0x080042e8 0x324 build/stm32f7xx_it.o - 0x080042e8 UART_RxCpltCallback + 0x0800463c 0x324 build/stm32f7xx_it.o + 0x0800463c UART_RxCpltCallback .text.USART1_IRQHandler - 0x0800460c 0xd0 build/stm32f7xx_it.o - 0x0800460c USART1_IRQHandler + 0x08004960 0xd0 build/stm32f7xx_it.o + 0x08004960 USART1_IRQHandler .text.DMA2_Stream7_TransferComplete - 0x080046dc 0x10 build/stm32f7xx_it.o - 0x080046dc DMA2_Stream7_TransferComplete + 0x08004a30 0x10 build/stm32f7xx_it.o + 0x08004a30 DMA2_Stream7_TransferComplete .text.DMA2_Stream7_IRQHandler - 0x080046ec 0x34 build/stm32f7xx_it.o - 0x080046ec DMA2_Stream7_IRQHandler + 0x08004a40 0x34 build/stm32f7xx_it.o + 0x08004a40 DMA2_Stream7_IRQHandler .text.HAL_MspInit - 0x08004720 0x30 build/stm32f7xx_hal_msp.o - 0x08004720 HAL_MspInit + 0x08004a74 0x30 build/stm32f7xx_hal_msp.o + 0x08004a74 HAL_MspInit .text.HAL_ADC_MspInit - 0x08004750 0x110 build/stm32f7xx_hal_msp.o - 0x08004750 HAL_ADC_MspInit + 0x08004aa4 0x110 build/stm32f7xx_hal_msp.o + 0x08004aa4 HAL_ADC_MspInit .text.HAL_SD_MspInit - 0x08004860 0xb8 build/stm32f7xx_hal_msp.o - 0x08004860 HAL_SD_MspInit + 0x08004bb4 0xb8 build/stm32f7xx_hal_msp.o + 0x08004bb4 HAL_SD_MspInit .text.HAL_TIM_Base_MspInit - 0x08004918 0xc0 build/stm32f7xx_hal_msp.o - 0x08004918 HAL_TIM_Base_MspInit + 0x08004c6c 0xc0 build/stm32f7xx_hal_msp.o + 0x08004c6c HAL_TIM_Base_MspInit .text.HAL_TIM_MspPostInit - 0x080049d8 0x8c build/stm32f7xx_hal_msp.o - 0x080049d8 HAL_TIM_MspPostInit + 0x08004d2c 0x8c build/stm32f7xx_hal_msp.o + 0x08004d2c HAL_TIM_MspPostInit .text.HAL_UART_MspInit - 0x08004a64 0x88 build/stm32f7xx_hal_msp.o - 0x08004a64 HAL_UART_MspInit + 0x08004db8 0x88 build/stm32f7xx_hal_msp.o + 0x08004db8 HAL_UART_MspInit .text.ADC_Init - 0x08004aec 0x134 build/stm32f7xx_hal_adc.o + 0x08004e40 0x134 build/stm32f7xx_hal_adc.o .text.HAL_ADC_Init - 0x08004c20 0x58 build/stm32f7xx_hal_adc.o - 0x08004c20 HAL_ADC_Init + 0x08004f74 0x58 build/stm32f7xx_hal_adc.o + 0x08004f74 HAL_ADC_Init .text.HAL_ADC_Start - 0x08004c78 0x134 build/stm32f7xx_hal_adc.o - 0x08004c78 HAL_ADC_Start + 0x08004fcc 0x134 build/stm32f7xx_hal_adc.o + 0x08004fcc HAL_ADC_Start .text.HAL_ADC_Stop - 0x08004dac 0x40 build/stm32f7xx_hal_adc.o - 0x08004dac HAL_ADC_Stop + 0x08005100 0x40 build/stm32f7xx_hal_adc.o + 0x08005100 HAL_ADC_Stop .text.HAL_ADC_PollForConversion - 0x08004dec 0xc2 build/stm32f7xx_hal_adc.o - 0x08004dec HAL_ADC_PollForConversion + 0x08005140 0xc2 build/stm32f7xx_hal_adc.o + 0x08005140 HAL_ADC_PollForConversion .text.HAL_ADC_GetValue - 0x08004eae 0x6 build/stm32f7xx_hal_adc.o - 0x08004eae HAL_ADC_GetValue + 0x08005202 0x6 build/stm32f7xx_hal_adc.o + 0x08005202 HAL_ADC_GetValue .text.HAL_ADC_ConvCpltCallback - 0x08004eb4 0x2 build/stm32f7xx_hal_adc.o - 0x08004eb4 HAL_ADC_ConvCpltCallback + 0x08005208 0x2 build/stm32f7xx_hal_adc.o + 0x08005208 HAL_ADC_ConvCpltCallback .text.HAL_ADC_LevelOutOfWindowCallback - 0x08004eb6 0x2 build/stm32f7xx_hal_adc.o - 0x08004eb6 HAL_ADC_LevelOutOfWindowCallback + 0x0800520a 0x2 build/stm32f7xx_hal_adc.o + 0x0800520a HAL_ADC_LevelOutOfWindowCallback .text.HAL_ADC_ErrorCallback - 0x08004eb8 0x2 build/stm32f7xx_hal_adc.o - 0x08004eb8 HAL_ADC_ErrorCallback + 0x0800520c 0x2 build/stm32f7xx_hal_adc.o + 0x0800520c HAL_ADC_ErrorCallback .text.HAL_ADC_IRQHandler - 0x08004eba 0x136 build/stm32f7xx_hal_adc.o - 0x08004eba HAL_ADC_IRQHandler + 0x0800520e 0x136 build/stm32f7xx_hal_adc.o + 0x0800520e HAL_ADC_IRQHandler .text.HAL_ADC_ConfigChannel - 0x08004ff0 0x1e4 build/stm32f7xx_hal_adc.o - 0x08004ff0 HAL_ADC_ConfigChannel + 0x08005344 0x1e4 build/stm32f7xx_hal_adc.o + 0x08005344 HAL_ADC_ConfigChannel .text.HAL_ADCEx_InjectedConvCpltCallback - 0x080051d4 0x2 build/stm32f7xx_hal_adc_ex.o - 0x080051d4 HAL_ADCEx_InjectedConvCpltCallback - *fill* 0x080051d6 0x2 + 0x08005528 0x2 build/stm32f7xx_hal_adc_ex.o + 0x08005528 HAL_ADCEx_InjectedConvCpltCallback + *fill* 0x0800552a 0x2 .text.HAL_RCC_OscConfig - 0x080051d8 0x444 build/stm32f7xx_hal_rcc.o - 0x080051d8 HAL_RCC_OscConfig + 0x0800552c 0x444 build/stm32f7xx_hal_rcc.o + 0x0800552c HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x0800561c 0xa8 build/stm32f7xx_hal_rcc.o - 0x0800561c HAL_RCC_GetSysClockFreq + 0x08005970 0xa8 build/stm32f7xx_hal_rcc.o + 0x08005970 HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x080056c4 0x16c build/stm32f7xx_hal_rcc.o - 0x080056c4 HAL_RCC_ClockConfig + 0x08005a18 0x16c build/stm32f7xx_hal_rcc.o + 0x08005a18 HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x08005830 0xc build/stm32f7xx_hal_rcc.o - 0x08005830 HAL_RCC_GetHCLKFreq + 0x08005b84 0xc build/stm32f7xx_hal_rcc.o + 0x08005b84 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x0800583c 0x20 build/stm32f7xx_hal_rcc.o - 0x0800583c HAL_RCC_GetPCLK1Freq + 0x08005b90 0x20 build/stm32f7xx_hal_rcc.o + 0x08005b90 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x0800585c 0x20 build/stm32f7xx_hal_rcc.o - 0x0800585c HAL_RCC_GetPCLK2Freq + 0x08005bb0 0x20 build/stm32f7xx_hal_rcc.o + 0x08005bb0 HAL_RCC_GetPCLK2Freq .text.HAL_RCCEx_PeriphCLKConfig - 0x0800587c 0x600 build/stm32f7xx_hal_rcc_ex.o - 0x0800587c HAL_RCCEx_PeriphCLKConfig + 0x08005bd0 0x600 build/stm32f7xx_hal_rcc_ex.o + 0x08005bd0 HAL_RCCEx_PeriphCLKConfig .text.HAL_GPIO_Init - 0x08005e7c 0x204 build/stm32f7xx_hal_gpio.o - 0x08005e7c HAL_GPIO_Init + 0x080061d0 0x204 build/stm32f7xx_hal_gpio.o + 0x080061d0 HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08006080 0xe build/stm32f7xx_hal_gpio.o - 0x08006080 HAL_GPIO_ReadPin + 0x080063d4 0xe build/stm32f7xx_hal_gpio.o + 0x080063d4 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x0800608e 0xc build/stm32f7xx_hal_gpio.o - 0x0800608e HAL_GPIO_WritePin + 0x080063e2 0xc build/stm32f7xx_hal_gpio.o + 0x080063e2 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x0800609a 0x12 build/stm32f7xx_hal_gpio.o - 0x0800609a HAL_GPIO_TogglePin + 0x080063ee 0x12 build/stm32f7xx_hal_gpio.o + 0x080063ee HAL_GPIO_TogglePin .text.HAL_PWREx_EnableOverDrive - 0x080060ac 0x7c build/stm32f7xx_hal_pwr_ex.o - 0x080060ac HAL_PWREx_EnableOverDrive + 0x08006400 0x7c build/stm32f7xx_hal_pwr_ex.o + 0x08006400 HAL_PWREx_EnableOverDrive .text.__NVIC_SetPriority - 0x08006128 0x24 build/stm32f7xx_hal_cortex.o + 0x0800647c 0x24 build/stm32f7xx_hal_cortex.o .text.NVIC_EncodePriority - 0x0800614c 0x3e build/stm32f7xx_hal_cortex.o - *fill* 0x0800618a 0x2 + 0x080064a0 0x3e build/stm32f7xx_hal_cortex.o + *fill* 0x080064de 0x2 .text.HAL_NVIC_SetPriorityGrouping - 0x0800618c 0x24 build/stm32f7xx_hal_cortex.o - 0x0800618c HAL_NVIC_SetPriorityGrouping + 0x080064e0 0x24 build/stm32f7xx_hal_cortex.o + 0x080064e0 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x080061b0 0x20 build/stm32f7xx_hal_cortex.o - 0x080061b0 HAL_NVIC_SetPriority + 0x08006504 0x20 build/stm32f7xx_hal_cortex.o + 0x08006504 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x080061d0 0x1c build/stm32f7xx_hal_cortex.o - 0x080061d0 HAL_NVIC_EnableIRQ + 0x08006524 0x1c build/stm32f7xx_hal_cortex.o + 0x08006524 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x080061ec 0x28 build/stm32f7xx_hal_cortex.o - 0x080061ec HAL_SYSTICK_Config + 0x08006540 0x28 build/stm32f7xx_hal_cortex.o + 0x08006540 HAL_SYSTICK_Config .text.HAL_InitTick - 0x08006214 0x4c build/stm32f7xx_hal.o - 0x08006214 HAL_InitTick + 0x08006568 0x4c build/stm32f7xx_hal.o + 0x08006568 HAL_InitTick .text.HAL_Init - 0x08006260 0x16 build/stm32f7xx_hal.o - 0x08006260 HAL_Init - *fill* 0x08006276 0x2 + 0x080065b4 0x16 build/stm32f7xx_hal.o + 0x080065b4 HAL_Init + *fill* 0x080065ca 0x2 .text.HAL_IncTick - 0x08006278 0x18 build/stm32f7xx_hal.o - 0x08006278 HAL_IncTick + 0x080065cc 0x18 build/stm32f7xx_hal.o + 0x080065cc HAL_IncTick .text.HAL_GetTick - 0x08006290 0xc build/stm32f7xx_hal.o - 0x08006290 HAL_GetTick + 0x080065e4 0xc build/stm32f7xx_hal.o + 0x080065e4 HAL_GetTick .text.HAL_Delay - 0x0800629c 0x28 build/stm32f7xx_hal.o - 0x0800629c HAL_Delay + 0x080065f0 0x28 build/stm32f7xx_hal.o + 0x080065f0 HAL_Delay .text.RCC_GetHCLKClockFreq - 0x080062c4 0x18 build/stm32f7xx_ll_rcc.o - 0x080062c4 RCC_GetHCLKClockFreq + 0x08006618 0x18 build/stm32f7xx_ll_rcc.o + 0x08006618 RCC_GetHCLKClockFreq .text.RCC_GetPCLK1ClockFreq - 0x080062dc 0x18 build/stm32f7xx_ll_rcc.o - 0x080062dc RCC_GetPCLK1ClockFreq + 0x08006630 0x18 build/stm32f7xx_ll_rcc.o + 0x08006630 RCC_GetPCLK1ClockFreq .text.RCC_GetPCLK2ClockFreq - 0x080062f4 0x18 build/stm32f7xx_ll_rcc.o - 0x080062f4 RCC_GetPCLK2ClockFreq + 0x08006648 0x18 build/stm32f7xx_ll_rcc.o + 0x08006648 RCC_GetPCLK2ClockFreq .text.RCC_PLL_GetFreqDomain_SYS - 0x0800630c 0x44 build/stm32f7xx_ll_rcc.o - 0x0800630c RCC_PLL_GetFreqDomain_SYS + 0x08006660 0x44 build/stm32f7xx_ll_rcc.o + 0x08006660 RCC_PLL_GetFreqDomain_SYS .text.RCC_GetSystemClockFreq - 0x08006350 0x2c build/stm32f7xx_ll_rcc.o - 0x08006350 RCC_GetSystemClockFreq + 0x080066a4 0x2c build/stm32f7xx_ll_rcc.o + 0x080066a4 RCC_GetSystemClockFreq .text.LL_RCC_GetUSARTClockFreq - 0x0800637c 0x178 build/stm32f7xx_ll_rcc.o - 0x0800637c LL_RCC_GetUSARTClockFreq + 0x080066d0 0x178 build/stm32f7xx_ll_rcc.o + 0x080066d0 LL_RCC_GetUSARTClockFreq .text.LL_RCC_GetUARTClockFreq - 0x080064f4 0x180 build/stm32f7xx_ll_rcc.o - 0x080064f4 LL_RCC_GetUARTClockFreq + 0x08006848 0x180 build/stm32f7xx_ll_rcc.o + 0x08006848 LL_RCC_GetUARTClockFreq .text.LL_GPIO_SetPinSpeed - 0x08006674 0x30 build/stm32f7xx_ll_gpio.o + 0x080069c8 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinPull - 0x080066a4 0x30 build/stm32f7xx_ll_gpio.o + 0x080069f8 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_0_7 - 0x080066d4 0x30 build/stm32f7xx_ll_gpio.o + 0x08006a28 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_8_15 - 0x08006704 0x32 build/stm32f7xx_ll_gpio.o + 0x08006a58 0x32 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinMode - 0x08006736 0x30 build/stm32f7xx_ll_gpio.o + 0x08006a8a 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_Init - 0x08006766 0x8a build/stm32f7xx_ll_gpio.o - 0x08006766 LL_GPIO_Init + 0x08006aba 0x8a build/stm32f7xx_ll_gpio.o + 0x08006aba LL_GPIO_Init .text.SDMMC_GetCmdError - 0x080067f0 0x38 build/stm32f7xx_ll_sdmmc.o + 0x08006b44 0x38 build/stm32f7xx_ll_sdmmc.o .text.SDMMC_Init - 0x08006828 0x34 build/stm32f7xx_ll_sdmmc.o - 0x08006828 SDMMC_Init + 0x08006b7c 0x34 build/stm32f7xx_ll_sdmmc.o + 0x08006b7c SDMMC_Init .text.SDMMC_ReadFIFO - 0x0800685c 0x6 build/stm32f7xx_ll_sdmmc.o - 0x0800685c SDMMC_ReadFIFO + 0x08006bb0 0x6 build/stm32f7xx_ll_sdmmc.o + 0x08006bb0 SDMMC_ReadFIFO .text.SDMMC_WriteFIFO - 0x08006862 0xa build/stm32f7xx_ll_sdmmc.o - 0x08006862 SDMMC_WriteFIFO + 0x08006bb6 0xa build/stm32f7xx_ll_sdmmc.o + 0x08006bb6 SDMMC_WriteFIFO .text.SDMMC_PowerState_ON - 0x0800686c 0x8 build/stm32f7xx_ll_sdmmc.o - 0x0800686c SDMMC_PowerState_ON + 0x08006bc0 0x8 build/stm32f7xx_ll_sdmmc.o + 0x08006bc0 SDMMC_PowerState_ON .text.SDMMC_GetPowerState - 0x08006874 0x8 build/stm32f7xx_ll_sdmmc.o - 0x08006874 SDMMC_GetPowerState + 0x08006bc8 0x8 build/stm32f7xx_ll_sdmmc.o + 0x08006bc8 SDMMC_GetPowerState .text.SDMMC_SendCommand - 0x0800687c 0x20 build/stm32f7xx_ll_sdmmc.o - 0x0800687c SDMMC_SendCommand + 0x08006bd0 0x20 build/stm32f7xx_ll_sdmmc.o + 0x08006bd0 SDMMC_SendCommand .text.SDMMC_GetCommandResponse - 0x0800689c 0x6 build/stm32f7xx_ll_sdmmc.o - 0x0800689c SDMMC_GetCommandResponse + 0x08006bf0 0x6 build/stm32f7xx_ll_sdmmc.o + 0x08006bf0 SDMMC_GetCommandResponse .text.SDMMC_GetResponse - 0x080068a2 0x6 build/stm32f7xx_ll_sdmmc.o - 0x080068a2 SDMMC_GetResponse + 0x08006bf6 0x6 build/stm32f7xx_ll_sdmmc.o + 0x08006bf6 SDMMC_GetResponse .text.SDMMC_ConfigData - 0x080068a8 0x24 build/stm32f7xx_ll_sdmmc.o - 0x080068a8 SDMMC_ConfigData + 0x08006bfc 0x24 build/stm32f7xx_ll_sdmmc.o + 0x08006bfc SDMMC_ConfigData .text.SDMMC_CmdGoIdleState - 0x080068cc 0x26 build/stm32f7xx_ll_sdmmc.o - 0x080068cc SDMMC_CmdGoIdleState - *fill* 0x080068f2 0x2 + 0x08006c20 0x26 build/stm32f7xx_ll_sdmmc.o + 0x08006c20 SDMMC_CmdGoIdleState + *fill* 0x08006c46 0x2 .text.SDMMC_GetCmdResp1 - 0x080068f4 0x154 build/stm32f7xx_ll_sdmmc.o - 0x080068f4 SDMMC_GetCmdResp1 + 0x08006c48 0x154 build/stm32f7xx_ll_sdmmc.o + 0x08006c48 SDMMC_GetCmdResp1 .text.SDMMC_CmdBlockLength - 0x08006a48 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006a48 SDMMC_CmdBlockLength + 0x08006d9c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006d9c SDMMC_CmdBlockLength .text.SDMMC_CmdReadSingleBlock - 0x08006a78 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006a78 SDMMC_CmdReadSingleBlock + 0x08006dcc 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006dcc SDMMC_CmdReadSingleBlock .text.SDMMC_CmdReadMultiBlock - 0x08006aa8 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006aa8 SDMMC_CmdReadMultiBlock + 0x08006dfc 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006dfc SDMMC_CmdReadMultiBlock .text.SDMMC_CmdWriteSingleBlock - 0x08006ad8 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006ad8 SDMMC_CmdWriteSingleBlock - .text.SDMMC_CmdWriteMultiBlock - 0x08006b08 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006b08 SDMMC_CmdWriteMultiBlock - .text.SDMMC_CmdStopTransfer - 0x08006b38 0x34 build/stm32f7xx_ll_sdmmc.o - 0x08006b38 SDMMC_CmdStopTransfer - .text.SDMMC_CmdSelDesel - 0x08006b6c 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006b6c SDMMC_CmdSelDesel - .text.SDMMC_CmdAppCommand - 0x08006b9c 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006b9c SDMMC_CmdAppCommand - .text.SDMMC_CmdBusWidth - 0x08006bcc 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006bcc SDMMC_CmdBusWidth - .text.SDMMC_CmdSendSCR - 0x08006bfc 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006bfc SDMMC_CmdSendSCR - .text.SDMMC_CmdSendStatus - 0x08006c2c 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006c2c SDMMC_CmdSendStatus - .text.SDMMC_GetCmdResp2 - 0x08006c5c 0x5c build/stm32f7xx_ll_sdmmc.o - 0x08006c5c SDMMC_GetCmdResp2 - .text.SDMMC_CmdSendCID - 0x08006cb8 0x2a build/stm32f7xx_ll_sdmmc.o - 0x08006cb8 SDMMC_CmdSendCID - .text.SDMMC_CmdSendCSD - 0x08006ce2 0x2a build/stm32f7xx_ll_sdmmc.o - 0x08006ce2 SDMMC_CmdSendCSD - .text.SDMMC_GetCmdResp3 - 0x08006d0c 0x4c build/stm32f7xx_ll_sdmmc.o - 0x08006d0c SDMMC_GetCmdResp3 - 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build/diskio.o + 0x08008fb0 disk_status .text.disk_initialize - 0x08008c74 0x28 build/diskio.o - 0x08008c74 disk_initialize + 0x08008fc8 0x28 build/diskio.o + 0x08008fc8 disk_initialize .text.disk_read - 0x08008c9c 0x18 build/diskio.o - 0x08008c9c disk_read + 0x08008ff0 0x18 build/diskio.o + 0x08008ff0 disk_read .text.disk_write - 0x08008cb4 0x18 build/diskio.o - 0x08008cb4 disk_write + 0x08009008 0x18 build/diskio.o + 0x08009008 disk_write .text.disk_ioctl - 0x08008ccc 0x18 build/diskio.o - 0x08008ccc disk_ioctl - .text.ld_word 0x08008ce4 0xa build/ff.o + 0x08009020 0x18 build/diskio.o + 0x08009020 disk_ioctl + .text.ld_word 0x08009038 0xa build/ff.o .text.ld_dword - 0x08008cee 0x16 build/ff.o - .text.st_word 0x08008d04 0x8 build/ff.o + 0x08009042 0x16 build/ff.o + .text.st_word 0x08009058 0x8 build/ff.o .text.st_dword - 0x08008d0c 0x14 build/ff.o - .text.mem_cpy 0x08008d20 0x14 build/ff.o - .text.mem_set 0x08008d34 0xa build/ff.o - .text.mem_cmp 0x08008d3e 0x1a build/ff.o - .text.chk_chr 0x08008d58 0x10 build/ff.o + 0x08009060 0x14 build/ff.o + .text.mem_cpy 0x08009074 0x14 build/ff.o + .text.mem_set 0x08009088 0xa build/ff.o + .text.mem_cmp 0x08009092 0x1a build/ff.o + .text.chk_chr 0x080090ac 0x10 build/ff.o .text.chk_lock - 0x08008d68 0x7c build/ff.o + 0x080090bc 0x7c build/ff.o .text.enq_lock - 0x08008de4 0x20 build/ff.o + 0x08009138 0x20 build/ff.o .text.inc_lock - 0x08008e04 0xa0 build/ff.o + 0x08009158 0xa0 build/ff.o .text.dec_lock - 0x08008ea4 0x40 build/ff.o + 0x080091f8 0x40 build/ff.o .text.clear_lock - 0x08008ee4 0x3c build/ff.o + 0x08009238 0x3c build/ff.o .text.clust2sect - 0x08008f20 0x18 build/ff.o + 0x08009274 0x18 build/ff.o .text.clmt_clust - 0x08008f38 0x26 build/ff.o + 0x0800928c 0x26 build/ff.o .text.ld_clust - 0x08008f5e 0x26 build/ff.o + 0x080092b2 0x26 build/ff.o .text.st_clust - 0x08008f84 0x26 build/ff.o + 0x080092d8 0x26 build/ff.o .text.get_fileinfo - 0x08008faa 0x6a build/ff.o + 0x080092fe 0x6a build/ff.o .text.create_name - 0x08009014 0xd0 build/ff.o + 0x08009368 0xd0 build/ff.o .text.get_ldnumber - 0x080090e4 0x48 build/ff.o + 0x08009438 0x48 build/ff.o .text.validate - 0x0800912c 0x46 build/ff.o + 0x08009480 0x46 build/ff.o .text.sync_window - 0x08009172 0x54 build/ff.o + 0x080094c6 0x54 build/ff.o .text.move_window - 0x080091c6 0x36 build/ff.o + 0x0800951a 0x36 build/ff.o .text.check_fs - 0x080091fc 0x78 build/ff.o + 0x08009550 0x78 build/ff.o .text.find_volume - 0x08009274 0x34c build/ff.o - .text.put_fat 0x080095c0 0x136 build/ff.o - .text.get_fat 0x080096f6 0xfc build/ff.o - .text.dir_sdi 0x080097f2 0xc0 build/ff.o + 0x080095c8 0x34c build/ff.o + .text.put_fat 0x08009914 0x136 build/ff.o + .text.get_fat 0x08009a4a 0xfc build/ff.o + .text.dir_sdi 0x08009b46 0xc0 build/ff.o .text.create_chain - 0x080098b2 0xd6 build/ff.o + 0x08009c06 0xd6 build/ff.o .text.remove_chain - 0x08009988 0x7e build/ff.o + 0x08009cdc 0x7e build/ff.o .text.dir_remove - 0x08009a06 0x1c build/ff.o + 0x08009d5a 0x1c build/ff.o .text.dir_next - 0x08009a22 0x118 build/ff.o + 0x08009d76 0x118 build/ff.o .text.dir_find - 0x08009b3a 0x5a build/ff.o + 0x08009e8e 0x5a build/ff.o .text.follow_path - 0x08009b94 0x92 build/ff.o + 0x08009ee8 0x92 build/ff.o .text.dir_alloc - 0x08009c26 0x4e build/ff.o + 0x08009f7a 0x4e build/ff.o .text.dir_register - 0x08009c74 0x3e build/ff.o + 0x08009fc8 0x3e build/ff.o .text.dir_read - 0x08009cb2 0x5e build/ff.o - .text.sync_fs 0x08009d10 0x88 build/ff.o - .text.f_mount 0x08009d98 0x60 build/ff.o - 0x08009d98 f_mount - .text.f_open 0x08009df8 0x232 build/ff.o - 0x08009df8 f_open - .text.f_read 0x0800a02a 0x1d8 build/ff.o - 0x0800a02a f_read - .text.f_write 0x0800a202 0x210 build/ff.o - 0x0800a202 f_write - .text.f_sync 0x0800a412 0x98 build/ff.o - 0x0800a412 f_sync - .text.f_close 0x0800a4aa 0x2a build/ff.o - 0x0800a4aa f_close - .text.f_lseek 0x0800a4d4 0x2a6 build/ff.o - 0x0800a4d4 f_lseek - .text.f_stat 0x0800a77a 0x44 build/ff.o - 0x0800a77a f_stat + 0x0800a006 0x5e build/ff.o + .text.sync_fs 0x0800a064 0x88 build/ff.o + .text.f_mount 0x0800a0ec 0x60 build/ff.o + 0x0800a0ec f_mount + .text.f_open 0x0800a14c 0x232 build/ff.o + 0x0800a14c f_open + .text.f_read 0x0800a37e 0x1d8 build/ff.o + 0x0800a37e f_read + .text.f_write 0x0800a556 0x210 build/ff.o + 0x0800a556 f_write + .text.f_sync 0x0800a766 0x98 build/ff.o + 0x0800a766 f_sync + .text.f_close 0x0800a7fe 0x2a build/ff.o + 0x0800a7fe f_close + .text.f_lseek 0x0800a828 0x2a6 build/ff.o + 0x0800a828 f_lseek + .text.f_stat 0x0800aace 0x44 build/ff.o + 0x0800aace f_stat .text.f_unlink - 0x0800a7be 0xc4 build/ff.o - 0x0800a7be f_unlink - *fill* 0x0800a882 0x2 + 0x0800ab12 0xc4 build/ff.o + 0x0800ab12 f_unlink + *fill* 0x0800abd6 0x2 .text.FATFS_LinkDriverEx - 0x0800a884 0x54 build/ff_gen_drv.o - 0x0800a884 FATFS_LinkDriverEx + 0x0800abd8 0x54 build/ff_gen_drv.o + 0x0800abd8 FATFS_LinkDriverEx .text.FATFS_LinkDriver - 0x0800a8d8 0xa build/ff_gen_drv.o - 0x0800a8d8 FATFS_LinkDriver - *fill* 0x0800a8e2 0x2 - .text._sbrk 0x0800a8e4 0x48 build/sysmem.o - 0x0800a8e4 _sbrk + 0x0800ac2c 0xa build/ff_gen_drv.o + 0x0800ac2c FATFS_LinkDriver + *fill* 0x0800ac36 0x2 + .text._sbrk 0x0800ac38 0x48 build/sysmem.o + 0x0800ac38 _sbrk .text.UART_EndRxTransfer - 0x0800a92c 0x52 build/stm32f7xx_hal_uart.o - *fill* 0x0800a97e 0x2 + 0x0800ac80 0x52 build/stm32f7xx_hal_uart.o + *fill* 0x0800acd2 0x2 .text.UART_SetConfig - 0x0800a980 0x328 build/stm32f7xx_hal_uart.o - 0x0800a980 UART_SetConfig + 0x0800acd4 0x328 build/stm32f7xx_hal_uart.o + 0x0800acd4 UART_SetConfig .text.UART_AdvFeatureConfig - 0x0800aca8 0xca build/stm32f7xx_hal_uart.o - 0x0800aca8 UART_AdvFeatureConfig + 0x0800affc 0xca build/stm32f7xx_hal_uart.o + 0x0800affc UART_AdvFeatureConfig .text.UART_WaitOnFlagUntilTimeout - 0x0800ad72 0xa6 build/stm32f7xx_hal_uart.o - 0x0800ad72 UART_WaitOnFlagUntilTimeout + 0x0800b0c6 0xa6 build/stm32f7xx_hal_uart.o + 0x0800b0c6 UART_WaitOnFlagUntilTimeout .text.UART_CheckIdleState - 0x0800ae18 0xc6 build/stm32f7xx_hal_uart.o - 0x0800ae18 UART_CheckIdleState + 0x0800b16c 0xc6 build/stm32f7xx_hal_uart.o + 0x0800b16c UART_CheckIdleState .text.HAL_UART_Init - 0x0800aede 0x62 build/stm32f7xx_hal_uart.o - 0x0800aede HAL_UART_Init + 0x0800b232 0x62 build/stm32f7xx_hal_uart.o + 0x0800b232 HAL_UART_Init .text.Reset_Handler - 0x0800af40 0x50 build/startup_stm32f767xx.o - 0x0800af40 Reset_Handler + 0x0800b294 0x50 build/startup_stm32f767xx.o + 0x0800b294 Reset_Handler .text.Default_Handler - 0x0800af90 0x2 build/startup_stm32f767xx.o - 0x0800af90 RTC_Alarm_IRQHandler - 0x0800af90 EXTI2_IRQHandler - 0x0800af90 TIM8_CC_IRQHandler - 0x0800af90 UART8_IRQHandler - 0x0800af90 SPI4_IRQHandler - 0x0800af90 TIM1_CC_IRQHandler - 0x0800af90 DMA2_Stream5_IRQHandler - 0x0800af90 JPEG_IRQHandler - 0x0800af90 DMA1_Stream5_IRQHandler - 0x0800af90 CAN3_RX1_IRQHandler - 0x0800af90 PVD_IRQHandler - 0x0800af90 TAMP_STAMP_IRQHandler - 0x0800af90 CAN2_RX1_IRQHandler - 0x0800af90 EXTI3_IRQHandler - 0x0800af90 TIM8_TRG_COM_TIM14_IRQHandler - 0x0800af90 DFSDM1_FLT1_IRQHandler - 0x0800af90 I2C3_ER_IRQHandler - 0x0800af90 DFSDM1_FLT2_IRQHandler - 0x0800af90 EXTI0_IRQHandler - 0x0800af90 I2C2_EV_IRQHandler - 0x0800af90 DMA1_Stream2_IRQHandler - 0x0800af90 CAN1_RX0_IRQHandler - 0x0800af90 FPU_IRQHandler - 0x0800af90 OTG_HS_WKUP_IRQHandler - 0x0800af90 CAN3_SCE_IRQHandler - 0x0800af90 LTDC_ER_IRQHandler - 0x0800af90 CAN2_SCE_IRQHandler - 0x0800af90 DMA2_Stream2_IRQHandler - 0x0800af90 SPI1_IRQHandler - 0x0800af90 TIM1_BRK_TIM9_IRQHandler - 0x0800af90 DCMI_IRQHandler - 0x0800af90 CAN2_RX0_IRQHandler - 0x0800af90 DMA2_Stream3_IRQHandler - 0x0800af90 SAI2_IRQHandler - 0x0800af90 DFSDM1_FLT3_IRQHandler - 0x0800af90 USART6_IRQHandler - 0x0800af90 CAN3_RX0_IRQHandler - 0x0800af90 USART3_IRQHandler - 0x0800af90 CAN1_RX1_IRQHandler - 0x0800af90 UART5_IRQHandler - 0x0800af90 DMA2_Stream0_IRQHandler - 0x0800af90 TIM4_IRQHandler - 0x0800af90 QUADSPI_IRQHandler - 0x0800af90 I2C1_EV_IRQHandler - 0x0800af90 DMA1_Stream6_IRQHandler - 0x0800af90 DMA1_Stream1_IRQHandler - 0x0800af90 UART4_IRQHandler - 0x0800af90 TIM3_IRQHandler - 0x0800af90 RCC_IRQHandler - 0x0800af90 TIM8_BRK_TIM12_IRQHandler - 0x0800af90 Default_Handler - 0x0800af90 CEC_IRQHandler - 0x0800af90 EXTI15_10_IRQHandler - 0x0800af90 DMA1_Stream7_IRQHandler - 0x0800af90 SPI5_IRQHandler - 0x0800af90 SDMMC1_IRQHandler - 0x0800af90 CAN2_TX_IRQHandler - 0x0800af90 I2C3_EV_IRQHandler - 0x0800af90 EXTI9_5_IRQHandler - 0x0800af90 RTC_WKUP_IRQHandler - 0x0800af90 LTDC_IRQHandler - 0x0800af90 ETH_WKUP_IRQHandler - 0x0800af90 SPDIF_RX_IRQHandler - 0x0800af90 SPI2_IRQHandler - 0x0800af90 OTG_HS_EP1_IN_IRQHandler - 0x0800af90 DMA1_Stream0_IRQHandler - 0x0800af90 CAN1_TX_IRQHandler - 0x0800af90 EXTI4_IRQHandler - 0x0800af90 RNG_IRQHandler - 0x0800af90 ETH_IRQHandler - 0x0800af90 OTG_HS_EP1_OUT_IRQHandler - 0x0800af90 WWDG_IRQHandler - 0x0800af90 SPI6_IRQHandler - 0x0800af90 MDIOS_IRQHandler - 0x0800af90 I2C4_EV_IRQHandler - 0x0800af90 CAN3_TX_IRQHandler - 0x0800af90 OTG_FS_WKUP_IRQHandler - 0x0800af90 OTG_HS_IRQHandler - 0x0800af90 DMA2D_IRQHandler - 0x0800af90 EXTI1_IRQHandler - 0x0800af90 SDMMC2_IRQHandler - 0x0800af90 UART7_IRQHandler - 0x0800af90 USART2_IRQHandler - 0x0800af90 DFSDM1_FLT0_IRQHandler - 0x0800af90 I2C2_ER_IRQHandler - 0x0800af90 DMA2_Stream1_IRQHandler - 0x0800af90 CAN1_SCE_IRQHandler - 0x0800af90 FLASH_IRQHandler - 0x0800af90 DMA2_Stream4_IRQHandler - 0x0800af90 OTG_FS_IRQHandler - 0x0800af90 SPI3_IRQHandler - 0x0800af90 DMA1_Stream4_IRQHandler - 0x0800af90 I2C1_ER_IRQHandler - 0x0800af90 FMC_IRQHandler - 0x0800af90 LPTIM1_IRQHandler - 0x0800af90 I2C4_ER_IRQHandler - 0x0800af90 DMA2_Stream6_IRQHandler - 0x0800af90 SAI1_IRQHandler - 0x0800af90 DMA1_Stream3_IRQHandler + 0x0800b2e4 0x2 build/startup_stm32f767xx.o + 0x0800b2e4 RTC_Alarm_IRQHandler + 0x0800b2e4 EXTI2_IRQHandler + 0x0800b2e4 TIM8_CC_IRQHandler + 0x0800b2e4 UART8_IRQHandler + 0x0800b2e4 SPI4_IRQHandler + 0x0800b2e4 TIM1_CC_IRQHandler + 0x0800b2e4 DMA2_Stream5_IRQHandler + 0x0800b2e4 JPEG_IRQHandler + 0x0800b2e4 DMA1_Stream5_IRQHandler + 0x0800b2e4 CAN3_RX1_IRQHandler + 0x0800b2e4 PVD_IRQHandler + 0x0800b2e4 TAMP_STAMP_IRQHandler + 0x0800b2e4 CAN2_RX1_IRQHandler + 0x0800b2e4 EXTI3_IRQHandler + 0x0800b2e4 TIM8_TRG_COM_TIM14_IRQHandler + 0x0800b2e4 DFSDM1_FLT1_IRQHandler + 0x0800b2e4 I2C3_ER_IRQHandler + 0x0800b2e4 DFSDM1_FLT2_IRQHandler + 0x0800b2e4 EXTI0_IRQHandler + 0x0800b2e4 I2C2_EV_IRQHandler + 0x0800b2e4 DMA1_Stream2_IRQHandler + 0x0800b2e4 CAN1_RX0_IRQHandler + 0x0800b2e4 FPU_IRQHandler + 0x0800b2e4 OTG_HS_WKUP_IRQHandler + 0x0800b2e4 CAN3_SCE_IRQHandler + 0x0800b2e4 LTDC_ER_IRQHandler + 0x0800b2e4 CAN2_SCE_IRQHandler + 0x0800b2e4 DMA2_Stream2_IRQHandler + 0x0800b2e4 SPI1_IRQHandler + 0x0800b2e4 TIM1_BRK_TIM9_IRQHandler + 0x0800b2e4 DCMI_IRQHandler + 0x0800b2e4 CAN2_RX0_IRQHandler + 0x0800b2e4 DMA2_Stream3_IRQHandler + 0x0800b2e4 SAI2_IRQHandler + 0x0800b2e4 DFSDM1_FLT3_IRQHandler + 0x0800b2e4 USART6_IRQHandler + 0x0800b2e4 CAN3_RX0_IRQHandler + 0x0800b2e4 USART3_IRQHandler + 0x0800b2e4 CAN1_RX1_IRQHandler + 0x0800b2e4 UART5_IRQHandler + 0x0800b2e4 DMA2_Stream0_IRQHandler + 0x0800b2e4 TIM4_IRQHandler + 0x0800b2e4 QUADSPI_IRQHandler + 0x0800b2e4 I2C1_EV_IRQHandler + 0x0800b2e4 DMA1_Stream6_IRQHandler + 0x0800b2e4 DMA1_Stream1_IRQHandler + 0x0800b2e4 UART4_IRQHandler + 0x0800b2e4 TIM3_IRQHandler + 0x0800b2e4 RCC_IRQHandler + 0x0800b2e4 TIM8_BRK_TIM12_IRQHandler + 0x0800b2e4 Default_Handler + 0x0800b2e4 CEC_IRQHandler + 0x0800b2e4 EXTI15_10_IRQHandler + 0x0800b2e4 DMA1_Stream7_IRQHandler + 0x0800b2e4 SPI5_IRQHandler + 0x0800b2e4 SDMMC1_IRQHandler + 0x0800b2e4 CAN2_TX_IRQHandler + 0x0800b2e4 I2C3_EV_IRQHandler + 0x0800b2e4 EXTI9_5_IRQHandler + 0x0800b2e4 RTC_WKUP_IRQHandler + 0x0800b2e4 LTDC_IRQHandler + 0x0800b2e4 ETH_WKUP_IRQHandler + 0x0800b2e4 SPDIF_RX_IRQHandler + 0x0800b2e4 SPI2_IRQHandler + 0x0800b2e4 OTG_HS_EP1_IN_IRQHandler + 0x0800b2e4 DMA1_Stream0_IRQHandler + 0x0800b2e4 CAN1_TX_IRQHandler + 0x0800b2e4 EXTI4_IRQHandler + 0x0800b2e4 RNG_IRQHandler + 0x0800b2e4 ETH_IRQHandler + 0x0800b2e4 OTG_HS_EP1_OUT_IRQHandler + 0x0800b2e4 WWDG_IRQHandler + 0x0800b2e4 SPI6_IRQHandler + 0x0800b2e4 MDIOS_IRQHandler + 0x0800b2e4 I2C4_EV_IRQHandler + 0x0800b2e4 CAN3_TX_IRQHandler + 0x0800b2e4 OTG_FS_WKUP_IRQHandler + 0x0800b2e4 OTG_HS_IRQHandler + 0x0800b2e4 DMA2D_IRQHandler + 0x0800b2e4 EXTI1_IRQHandler + 0x0800b2e4 SDMMC2_IRQHandler + 0x0800b2e4 UART7_IRQHandler + 0x0800b2e4 USART2_IRQHandler + 0x0800b2e4 DFSDM1_FLT0_IRQHandler + 0x0800b2e4 I2C2_ER_IRQHandler + 0x0800b2e4 DMA2_Stream1_IRQHandler + 0x0800b2e4 CAN1_SCE_IRQHandler + 0x0800b2e4 FLASH_IRQHandler + 0x0800b2e4 DMA2_Stream4_IRQHandler + 0x0800b2e4 OTG_FS_IRQHandler + 0x0800b2e4 SPI3_IRQHandler + 0x0800b2e4 DMA1_Stream4_IRQHandler + 0x0800b2e4 I2C1_ER_IRQHandler + 0x0800b2e4 FMC_IRQHandler + 0x0800b2e4 LPTIM1_IRQHandler + 0x0800b2e4 I2C4_ER_IRQHandler + 0x0800b2e4 DMA2_Stream6_IRQHandler + 0x0800b2e4 SAI1_IRQHandler + 0x0800b2e4 DMA1_Stream3_IRQHandler *(.glue_7) - .glue_7 0x0800af92 0x0 linker stubs + .glue_7 0x0800b2e6 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0800af92 0x0 linker stubs + .glue_7t 0x0800b2e6 0x0 linker stubs *(.eh_frame) - *fill* 0x0800af92 0x2 - .eh_frame 0x0800af94 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + *fill* 0x0800b2e6 0x2 + .eh_frame 0x0800b2e8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o *(.init) - .init 0x0800af94 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800af94 _init - .init 0x0800af98 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + .init 0x0800b2e8 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800b2e8 _init + .init 0x0800b2ec 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o *(.fini) - .fini 0x0800afa0 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800afa0 _fini - .fini 0x0800afa4 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o - 0x0800afac . = ALIGN (0x4) - 0x0800afac _etext = . + .fini 0x0800b2f4 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800b2f4 _fini + .fini 0x0800b2f8 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + 0x0800b300 . = ALIGN (0x4) + 0x0800b300 _etext = . -.vfp11_veneer 0x0800afac 0x0 - .vfp11_veneer 0x0800afac 0x0 linker stubs +.vfp11_veneer 0x0800b300 0x0 + .vfp11_veneer 0x0800b300 0x0 linker stubs -.v4_bx 0x0800afac 0x0 - .v4_bx 0x0800afac 0x0 linker stubs +.v4_bx 0x0800b300 0x0 + .v4_bx 0x0800b300 0x0 linker stubs -.iplt 0x0800afac 0x0 - .iplt 0x0800afac 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.iplt 0x0800b300 0x0 + .iplt 0x0800b300 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.rodata 0x0800afac 0x364 - 0x0800afac . = ALIGN (0x4) +.rodata 0x0800b300 0x3e8 + 0x0800b300 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.Init_params.str1.4 - 0x0800afac 0x1ad build/main.o + 0x0800b300 0x1ad build/main.o 0x10 (size before relaxing) .rodata.SD_SAVE.str1.4 - 0x0800b159 0xa build/main.o - *fill* 0x0800b159 0x3 + 0x0800b4ad 0xa build/main.o + *fill* 0x0800b4ad 0x3 + .rodata.ad9102_example2_regval + 0x0800b4b0 0x84 build/main.o .rodata.ad9102_example4_regval - 0x0800b15c 0x84 build/main.o + 0x0800b534 0x84 build/main.o .rodata.ad9102_reg_addr - 0x0800b1e0 0x84 build/main.o + 0x0800b5b8 0x84 build/main.o .rodata.SD_Driver - 0x0800b264 0x14 build/sd_diskio.o - 0x0800b264 SD_Driver + 0x0800b63c 0x14 build/sd_diskio.o + 0x0800b63c SD_Driver .rodata.APBPrescTable - 0x0800b278 0x8 build/system_stm32f7xx.o - 0x0800b278 APBPrescTable + 0x0800b650 0x8 build/system_stm32f7xx.o + 0x0800b650 APBPrescTable .rodata.AHBPrescTable - 0x0800b280 0x10 build/system_stm32f7xx.o - 0x0800b280 AHBPrescTable + 0x0800b658 0x10 build/system_stm32f7xx.o + 0x0800b658 AHBPrescTable .rodata.Read_File.str1.4 - 0x0800b290 0xbb build/File_Handling.o + 0x0800b668 0xbb build/File_Handling.o .rodata.Seek_Read_File.str1.4 - 0x0800b290 0x27 build/File_Handling.o + 0x0800b668 0x27 build/File_Handling.o .rodata.Remove_File.str1.4 - 0x0800b290 0x64 build/File_Handling.o + 0x0800b668 0x64 build/File_Handling.o .rodata.create_name.str1.4 - 0x0800b290 0xf build/ff.o - .rodata.ExCvt 0x0800b290 0x80 build/ff.o + 0x0800b668 0xf build/ff.o + .rodata.ExCvt 0x0800b668 0x80 build/ff.o .rodata.str1.4 - 0x0800b310 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) + 0x0800b6e8 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) .rodata.str1.4 - 0x0800b310 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) - 0x0800b34c . = ALIGN (0x4) + 0x0800b6e8 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) + 0x0800b724 . = ALIGN (0x4) .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x0800b310 0x8 - 0x0800b310 __exidx_start = . +.ARM 0x0800b6e8 0x8 + 0x0800b6e8 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0800b310 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) - .ARM.exidx 0x0800b318 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) + .ARM.exidx 0x0800b6e8 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) + .ARM.exidx 0x0800b6f0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) 0x8 (size before relaxing) - .ARM.exidx 0x0800b318 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) + .ARM.exidx 0x0800b6f0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) 0x8 (size before relaxing) - 0x0800b318 __exidx_end = . + 0x0800b6f0 __exidx_end = . -.rel.dyn 0x0800b318 0x0 - .rel.iplt 0x0800b318 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.rel.dyn 0x0800b6f0 0x0 + .rel.iplt 0x0800b6f0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.preinit_array 0x0800b318 0x0 - 0x0800b318 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0800b6f0 0x0 + 0x0800b6f0 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0800b318 PROVIDE (__preinit_array_end = .) + 0x0800b6f0 PROVIDE (__preinit_array_end = .) -.init_array 0x0800b318 0x4 - 0x0800b318 PROVIDE (__init_array_start = .) +.init_array 0x0800b6f0 0x4 + 0x0800b6f0 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0800b318 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800b31c PROVIDE (__init_array_end = .) + .init_array 0x0800b6f0 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800b6f4 PROVIDE (__init_array_end = .) -.fini_array 0x0800b31c 0x4 - 0x0800b31c PROVIDE (__fini_array_start = .) +.fini_array 0x0800b6f4 0x4 + 0x0800b6f4 PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0800b31c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800b320 PROVIDE (__fini_array_end = .) - 0x0800b320 _sidata = LOADADDR (.data) + .fini_array 0x0800b6f4 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800b6f8 PROVIDE (__fini_array_end = .) + 0x0800b6f8 _sidata = LOADADDR (.data) -.data 0x20000000 0x5c load address 0x0800b320 +.data 0x20000000 0x5c load address 0x0800b6f8 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -3114,17 +3123,17 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x2000005c _edata = . .tm_clone_table - 0x2000005c 0x0 load address 0x0800b37c + 0x2000005c 0x0 load address 0x0800b754 .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o -.igot.plt 0x2000005c 0x0 load address 0x0800b37c +.igot.plt 0x2000005c 0x0 load address 0x0800b754 .igot.plt 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o 0x2000005c . = ALIGN (0x4) -.bss 0x2000005c 0x266c load address 0x0800b37c +.bss 0x2000005c 0x266c load address 0x0800b754 0x2000005c _sbss = . 0x2000005c __bss_start__ = _sbss *(.bss) @@ -3300,7 +3309,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x200026c8 __bss_end__ = _ebss ._user_heap_stack - 0x200026c8 0x6000 load address 0x0800b37c + 0x200026c8 0x6000 load address 0x0800b754 0x200026c8 . = ALIGN (0x8) [!provide] PROVIDE (end = .) 0x200026c8 PROVIDE (_end = .) @@ -3493,458 +3502,458 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o -.debug_info 0x00000000 0x3b3c0 - .debug_info 0x00000000 0x8dbb build/main.o - .debug_info 0x00008dbb 0xe39 build/bsp_driver_sd.o - .debug_info 0x00009bf4 0x74a build/sd_diskio.o - .debug_info 0x0000a33e 0x65a build/fatfs.o - .debug_info 0x0000a998 0x1f0 build/fatfs_platform.o - .debug_info 0x0000ab88 0x1925 build/stm32f7xx_it.o - .debug_info 0x0000c4ad 0x23e6 build/stm32f7xx_hal_msp.o - .debug_info 0x0000e893 0xfb5 build/stm32f7xx_hal_adc.o - .debug_info 0x0000f848 0xd39 build/stm32f7xx_hal_adc_ex.o - .debug_info 0x00010581 0xd0b build/stm32f7xx_hal_rcc.o - .debug_info 0x0001128c 0x96b build/stm32f7xx_hal_rcc_ex.o - .debug_info 0x00011bf7 0x867 build/stm32f7xx_hal_gpio.o - .debug_info 0x0001245e 0xb00 build/stm32f7xx_hal_pwr_ex.o - .debug_info 0x00012f5e 0x145b build/stm32f7xx_hal_cortex.o - .debug_info 0x000143b9 0xc0b build/stm32f7xx_hal.o - .debug_info 0x00014fc4 0x1d6b build/stm32f7xx_ll_rcc.o - .debug_info 0x00016d2f 0xda5 build/stm32f7xx_ll_gpio.o - .debug_info 0x00017ad4 0x1ad6 build/stm32f7xx_ll_sdmmc.o - .debug_info 0x000195aa 0x2a28 build/stm32f7xx_hal_sd.o - .debug_info 0x0001bfd2 0xb14 build/stm32f7xx_ll_spi.o - .debug_info 0x0001cae6 0x42a3 build/stm32f7xx_hal_tim.o - .debug_info 0x00020d89 0x2009 build/stm32f7xx_hal_tim_ex.o - .debug_info 0x00022d92 0x19f0 build/stm32f7xx_ll_tim.o - .debug_info 0x00024782 0xc07 build/stm32f7xx_ll_usart.o - .debug_info 0x00025389 0x7ea build/system_stm32f7xx.o - .debug_info 0x00025b73 0x1ef6 build/File_Handling.o - .debug_info 0x00027a69 0x5f7 build/diskio.o - .debug_info 0x00028060 0x47f5 build/ff.o - .debug_info 0x0002c855 0x525 build/ff_gen_drv.o - .debug_info 0x0002cd7a 0x174 build/sysmem.o - .debug_info 0x0002ceee 0x54ac build/stm32f7xx_hal_uart.o - .debug_info 0x0003239a 0x30 build/startup_stm32f767xx.o - .debug_info 0x000323ca 0x87b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) - .debug_info 0x00032c45 0x70b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o) - .debug_info 0x00033350 0x1092 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) - .debug_info 0x000343e2 0x10b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o) - .debug_info 0x000344ed 0x135 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o) - .debug_info 0x00034622 0x6f1 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o) - .debug_info 0x00034d13 0x9b6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o) - .debug_info 0x000356c9 0x87f /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o) - .debug_info 0x00035f48 0x148 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o) - .debug_info 0x00036090 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) - .debug_info 0x000360b5 0x33 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) - .debug_info 0x000360e8 0x796 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o) - .debug_info 0x0003687e 0x8cd /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o) - .debug_info 0x0003714b 0xdd7 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) - .debug_info 0x00037f22 0x71c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o) - .debug_info 0x0003863e 0x778 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o) - .debug_info 0x00038db6 0x78a /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o) - .debug_info 0x00039540 0xe8c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) - .debug_info 0x0003a3cc 0x89f /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o) - .debug_info 0x0003ac6b 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_info 0x0003ac8f 0x6f5 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) - .debug_info 0x0003b384 0x3c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o) +.debug_info 0x00000000 0x3bab6 + .debug_info 0x00000000 0x94b1 build/main.o + .debug_info 0x000094b1 0xe39 build/bsp_driver_sd.o + .debug_info 0x0000a2ea 0x74a build/sd_diskio.o + .debug_info 0x0000aa34 0x65a build/fatfs.o + .debug_info 0x0000b08e 0x1f0 build/fatfs_platform.o + .debug_info 0x0000b27e 0x1925 build/stm32f7xx_it.o + .debug_info 0x0000cba3 0x23e6 build/stm32f7xx_hal_msp.o + .debug_info 0x0000ef89 0xfb5 build/stm32f7xx_hal_adc.o + .debug_info 0x0000ff3e 0xd39 build/stm32f7xx_hal_adc_ex.o + .debug_info 0x00010c77 0xd0b build/stm32f7xx_hal_rcc.o + .debug_info 0x00011982 0x96b build/stm32f7xx_hal_rcc_ex.o + .debug_info 0x000122ed 0x867 build/stm32f7xx_hal_gpio.o + .debug_info 0x00012b54 0xb00 build/stm32f7xx_hal_pwr_ex.o + .debug_info 0x00013654 0x145b build/stm32f7xx_hal_cortex.o + .debug_info 0x00014aaf 0xc0b build/stm32f7xx_hal.o + .debug_info 0x000156ba 0x1d6b build/stm32f7xx_ll_rcc.o + .debug_info 0x00017425 0xda5 build/stm32f7xx_ll_gpio.o + .debug_info 0x000181ca 0x1ad6 build/stm32f7xx_ll_sdmmc.o + .debug_info 0x00019ca0 0x2a28 build/stm32f7xx_hal_sd.o + .debug_info 0x0001c6c8 0xb14 build/stm32f7xx_ll_spi.o + .debug_info 0x0001d1dc 0x42a3 build/stm32f7xx_hal_tim.o + .debug_info 0x0002147f 0x2009 build/stm32f7xx_hal_tim_ex.o + .debug_info 0x00023488 0x19f0 build/stm32f7xx_ll_tim.o + .debug_info 0x00024e78 0xc07 build/stm32f7xx_ll_usart.o + .debug_info 0x00025a7f 0x7ea build/system_stm32f7xx.o + .debug_info 0x00026269 0x1ef6 build/File_Handling.o + .debug_info 0x0002815f 0x5f7 build/diskio.o + .debug_info 0x00028756 0x47f5 build/ff.o + .debug_info 0x0002cf4b 0x525 build/ff_gen_drv.o + .debug_info 0x0002d470 0x174 build/sysmem.o + .debug_info 0x0002d5e4 0x54ac build/stm32f7xx_hal_uart.o + .debug_info 0x00032a90 0x30 build/startup_stm32f767xx.o + .debug_info 0x00032ac0 0x87b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) + .debug_info 0x0003333b 0x70b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o) + .debug_info 0x00033a46 0x1092 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) + .debug_info 0x00034ad8 0x10b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o) + .debug_info 0x00034be3 0x135 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o) + .debug_info 0x00034d18 0x6f1 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o) + .debug_info 0x00035409 0x9b6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o) + .debug_info 0x00035dbf 0x87f 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/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) + .debug_frame 0x00004d78 0x40 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o) + .debug_frame 0x00004db8 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x00004de4 0x34 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) .debug_loclists 0x00000000 0x2087 diff --git a/build/main.lst b/build/main.lst index ec5dd32..0509742 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccYgfTud.s page 1 +ARM GAS /tmp/ccwR4KB7.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */ 29:Drivers/CMSIS/Include/core_cm7.h **** #endif 30:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 2 + ARM GAS /tmp/ccwR4KB7.s page 2 31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC @@ -118,7 +118,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 86:Drivers/CMSIS/Include/core_cm7.h **** #endif 87:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 3 + ARM GAS /tmp/ccwR4KB7.s page 3 88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) @@ -178,7 +178,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 143:Drivers/CMSIS/Include/core_cm7.h **** #endif 144:Drivers/CMSIS/Include/core_cm7.h **** #else - ARM GAS /tmp/ccYgfTud.s page 4 + ARM GAS /tmp/ccwR4KB7.s page 4 145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U @@ -238,7 +238,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!" 200:Drivers/CMSIS/Include/core_cm7.h **** #endif 201:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 5 + ARM GAS /tmp/ccwR4KB7.s page 5 202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT @@ -298,7 +298,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register 257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register 258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/ - ARM GAS /tmp/ccYgfTud.s page 6 + ARM GAS /tmp/ccwR4KB7.s page 6 259:Drivers/CMSIS/Include/core_cm7.h **** /** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 313:Drivers/CMSIS/Include/core_cm7.h **** typedef union 314:Drivers/CMSIS/Include/core_cm7.h **** { 315:Drivers/CMSIS/Include/core_cm7.h **** struct - ARM GAS /tmp/ccYgfTud.s page 7 + ARM GAS /tmp/ccwR4KB7.s page 7 316:Drivers/CMSIS/Include/core_cm7.h **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR 371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR 372:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 8 + ARM GAS /tmp/ccwR4KB7.s page 8 373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR @@ -478,7 +478,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * 428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U]; 429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - ARM GAS /tmp/ccYgfTud.s page 9 + ARM GAS /tmp/ccwR4KB7.s page 9 430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U]; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U]; 485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 - ARM GAS /tmp/ccYgfTud.s page 10 + ARM GAS /tmp/ccwR4KB7.s page 10 487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB 542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB 543:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 11 + ARM GAS /tmp/ccwR4KB7.s page 11 544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB @@ -658,7 +658,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 598:Drivers/CMSIS/Include/core_cm7.h **** 599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB 600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB - ARM GAS /tmp/ccYgfTud.s page 12 + ARM GAS /tmp/ccwR4KB7.s page 12 601:Drivers/CMSIS/Include/core_cm7.h **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB 656:Drivers/CMSIS/Include/core_cm7.h **** 657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB - ARM GAS /tmp/ccYgfTud.s page 13 + ARM GAS /tmp/ccwR4KB7.s page 13 658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB @@ -778,7 +778,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB 713:Drivers/CMSIS/Include/core_cm7.h **** 714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ - ARM GAS /tmp/ccYgfTud.s page 14 + ARM GAS /tmp/ccwR4KB7.s page 14 715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB @@ -838,7 +838,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 769:Drivers/CMSIS/Include/core_cm7.h **** 770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB 771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB - ARM GAS /tmp/ccYgfTud.s page 15 + ARM GAS /tmp/ccwR4KB7.s page 15 772:Drivers/CMSIS/Include/core_cm7.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB 827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB 828:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 16 + ARM GAS /tmp/ccwR4KB7.s page 16 829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB 884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB 885:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 17 + ARM GAS /tmp/ccwR4KB7.s page 17 886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: 941:Drivers/CMSIS/Include/core_cm7.h **** 942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: - ARM GAS /tmp/ccYgfTud.s page 18 + ARM GAS /tmp/ccwR4KB7.s page 18 943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT 998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT 999:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 19 + ARM GAS /tmp/ccwR4KB7.s page 19 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM 1056:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 20 + ARM GAS /tmp/ccwR4KB7.s page 20 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1111:Drivers/CMSIS/Include/core_cm7.h **** */ 1112:Drivers/CMSIS/Include/core_cm7.h **** 1113:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccYgfTud.s page 21 + ARM GAS /tmp/ccwR4KB7.s page 21 1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR 1170:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 22 + ARM GAS /tmp/ccwR4KB7.s page 22 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */ 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN - ARM GAS /tmp/ccYgfTud.s page 23 + ARM GAS /tmp/ccwR4KB7.s page 23 1228:Drivers/CMSIS/Include/core_cm7.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U]; 1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ 1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - ARM GAS /tmp/ccYgfTud.s page 24 + ARM GAS /tmp/ccwR4KB7.s page 24 1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF 1341:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 25 + ARM GAS /tmp/ccwR4KB7.s page 25 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV 1397:Drivers/CMSIS/Include/core_cm7.h **** 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV - ARM GAS /tmp/ccYgfTud.s page 26 + ARM GAS /tmp/ccwR4KB7.s page 26 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU 1454:Drivers/CMSIS/Include/core_cm7.h **** 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */ - ARM GAS /tmp/ccYgfTud.s page 27 + ARM GAS /tmp/ccwR4KB7.s page 27 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */ 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ 1512:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 28 + ARM GAS /tmp/ccwR4KB7.s page 28 1513:Drivers/CMSIS/Include/core_cm7.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */ 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS - ARM GAS /tmp/ccYgfTud.s page 29 + ARM GAS /tmp/ccwR4KB7.s page 29 1570:Drivers/CMSIS/Include/core_cm7.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register 1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) 1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers - ARM GAS /tmp/ccYgfTud.s page 30 + ARM GAS /tmp/ccwR4KB7.s page 30 1627:Drivers/CMSIS/Include/core_cm7.h **** @{ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1681:Drivers/CMSIS/Include/core_cm7.h **** 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core - ARM GAS /tmp/ccYgfTud.s page 31 + ARM GAS /tmp/ccwR4KB7.s page 31 1684:Drivers/CMSIS/Include/core_cm7.h **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. 1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value. 1740:Drivers/CMSIS/Include/core_cm7.h **** */ - ARM GAS /tmp/ccYgfTud.s page 32 + ARM GAS /tmp/ccwR4KB7.s page 32 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions 1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions 1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions - ARM GAS /tmp/ccYgfTud.s page 33 + ARM GAS /tmp/ccwR4KB7.s page 33 1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu 1854:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccYgfTud.s page 34 + ARM GAS /tmp/ccwR4KB7.s page 34 1855:Drivers/CMSIS/Include/core_cm7.h **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled. 1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled. 1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccYgfTud.s page 35 + ARM GAS /tmp/ccwR4KB7.s page 35 1912:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 1966:Drivers/CMSIS/Include/core_cm7.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. 1967:Drivers/CMSIS/Include/core_cm7.h **** \param [in] IRQn Device specific interrupt number. 1968:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccYgfTud.s page 36 + ARM GAS /tmp/ccwR4KB7.s page 36 1969:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 2023:Drivers/CMSIS/Include/core_cm7.h **** */ 2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) 2025:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccYgfTud.s page 37 + ARM GAS /tmp/ccwR4KB7.s page 37 2026:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 36 .cfi_def_cfa_offset 4 37 .cfi_offset 14, -4 2073:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used - ARM GAS /tmp/ccYgfTud.s page 38 + ARM GAS /tmp/ccwR4KB7.s page 38 38 .loc 2 2073 3 is_stmt 1 view .LVU2 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 2078:Drivers/CMSIS/Include/core_cm7.h **** 81 .loc 2 2078 109 discriminator 2 view .LVU19 82 003a 0023 movs r3, #0 - ARM GAS /tmp/ccYgfTud.s page 39 + ARM GAS /tmp/ccwR4KB7.s page 39 83 003c EEE7 b .L2 @@ -2337,1157 +2337,1210 @@ ARM GAS /tmp/ccYgfTud.s page 1 44:Src/main.c **** #define AD9102_REG_WAV_CONFIG 0x0027u 45:Src/main.c **** #define AD9102_REG_PAT_TIMEBASE 0x0028u 46:Src/main.c **** #define AD9102_REG_PAT_PERIOD 0x0029u - 47:Src/main.c **** #define AD9102_REG_SAW_CONFIG 0x0037u - ARM GAS /tmp/ccYgfTud.s page 40 + 47:Src/main.c **** #define AD9102_REG_DAC_PAT 0x002Bu + ARM GAS /tmp/ccwR4KB7.s page 40 - 48:Src/main.c **** #define AD9102_REG_CFG_ERROR 0x0060u - 49:Src/main.c **** - 50:Src/main.c **** #define AD9102_PAT_STATUS_RUN (1u << 0) - 51:Src/main.c **** - 52:Src/main.c **** #define AD9102_WAV_PRESTORE_SEL_SHIFT 4 - 53:Src/main.c **** #define AD9102_WAV_WAVE_SEL_SHIFT 0 - 54:Src/main.c **** #define AD9102_WAV_PRESTORE_SAW 1u - 55:Src/main.c **** #define AD9102_WAV_WAVE_SEL_PRESTORE 1u + 48:Src/main.c **** #define AD9102_REG_SAW_CONFIG 0x0037u + 49:Src/main.c **** #define AD9102_REG_START_DLY 0x005Cu + 50:Src/main.c **** #define AD9102_REG_START_ADDR 0x005Du + 51:Src/main.c **** #define AD9102_REG_STOP_ADDR 0x005Eu + 52:Src/main.c **** #define AD9102_REG_SRAM_DATA_BASE 0x6000u + 53:Src/main.c **** #define AD9102_REG_CFG_ERROR 0x0060u + 54:Src/main.c **** + 55:Src/main.c **** #define AD9102_PAT_STATUS_RUN (1u << 0) 56:Src/main.c **** - 57:Src/main.c **** #define AD9102_SAW_STEP_SHIFT 2 - 58:Src/main.c **** #define AD9102_SAW_TYPE_SHIFT 0 - 59:Src/main.c **** #define AD9102_SAW_TYPE_UP 0u - 60:Src/main.c **** #define AD9102_SAW_TYPE_DOWN 1u - 61:Src/main.c **** #define AD9102_SAW_TYPE_TRI 2u - 62:Src/main.c **** #define AD9102_SAW_TYPE_ZERO 3u - 63:Src/main.c **** - 64:Src/main.c **** #define AD9102_REG_COUNT 66u - 65:Src/main.c **** - 66:Src/main.c **** #define AD9102_EX4_WAV_CONFIG 0x3212u - 67:Src/main.c **** #define AD9102_EX4_PAT_TIMEBASE 0x0121u - 68:Src/main.c **** #define AD9102_EX4_PAT_PERIOD 0xFFFFu - 69:Src/main.c **** #define AD9102_EX4_SAW_CONFIG 0x0606u + 57:Src/main.c **** #define AD9102_WAV_PRESTORE_SEL_SHIFT 4 + 58:Src/main.c **** #define AD9102_WAV_WAVE_SEL_SHIFT 0 + 59:Src/main.c **** #define AD9102_WAV_PRESTORE_SAW 1u + 60:Src/main.c **** #define AD9102_WAV_WAVE_SEL_PRESTORE 1u + 61:Src/main.c **** + 62:Src/main.c **** #define AD9102_SAW_STEP_SHIFT 2 + 63:Src/main.c **** #define AD9102_SAW_TYPE_SHIFT 0 + 64:Src/main.c **** #define AD9102_SAW_TYPE_UP 0u + 65:Src/main.c **** #define AD9102_SAW_TYPE_DOWN 1u + 66:Src/main.c **** #define AD9102_SAW_TYPE_TRI 2u + 67:Src/main.c **** #define AD9102_SAW_TYPE_ZERO 3u + 68:Src/main.c **** + 69:Src/main.c **** #define AD9102_REG_COUNT 66u 70:Src/main.c **** - 71:Src/main.c **** #define AD9102_SAW_STEP_DEFAULT 1u - 72:Src/main.c **** #define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u - 73:Src/main.c **** #define AD9102_START_DELAY_BASE_DEFAULT 0x1u - 74:Src/main.c **** #define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u - 75:Src/main.c **** #define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu - 76:Src/main.c **** - 77:Src/main.c **** #define AD9102_FLAG_ENABLE 0x0001u - 78:Src/main.c **** #define AD9102_FLAG_TRIANGLE 0x0002u - 79:Src/main.c **** /* USER CODE END PD */ - 80:Src/main.c **** - 81:Src/main.c **** /* Private macro -------------------------------------------------------------*/ - 82:Src/main.c **** /* USER CODE BEGIN PM */ - 83:Src/main.c **** - 84:Src/main.c **** /* USER CODE END PM */ - 85:Src/main.c **** - 86:Src/main.c **** /* Private variables ---------------------------------------------------------*/ - 87:Src/main.c **** ADC_HandleTypeDef hadc1; - 88:Src/main.c **** ADC_HandleTypeDef hadc3; - 89:Src/main.c **** - 90:Src/main.c **** SD_HandleTypeDef hsd1; - 91:Src/main.c **** - 92:Src/main.c **** TIM_HandleTypeDef htim4; - 93:Src/main.c **** TIM_HandleTypeDef htim8; - 94:Src/main.c **** TIM_HandleTypeDef htim10; - 95:Src/main.c **** TIM_HandleTypeDef htim11; - 96:Src/main.c **** - 97:Src/main.c **** UART_HandleTypeDef huart8; - 98:Src/main.c **** - 99:Src/main.c **** /* USER CODE BEGIN PV */ - 100:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, - 101:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ - 102:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat - 103:Src/main.c **** FRESULT fresult; // result - 104:Src/main.c **** int test; - ARM GAS /tmp/ccYgfTud.s page 41 + 71:Src/main.c **** #define AD9102_EX4_WAV_CONFIG 0x3212u + 72:Src/main.c **** #define AD9102_EX4_PAT_TIMEBASE 0x0121u + 73:Src/main.c **** #define AD9102_EX4_PAT_PERIOD 0xFFFFu + 74:Src/main.c **** #define AD9102_EX4_SAW_CONFIG 0x0606u + 75:Src/main.c **** + 76:Src/main.c **** #define AD9102_EX2_WAV_CONFIG 0x3030u + 77:Src/main.c **** #define AD9102_EX2_DAC_PAT 0x0101u + 78:Src/main.c **** #define AD9102_EX2_SAW_CONFIG 0x0200u + 79:Src/main.c **** #define AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT 0x1u + 80:Src/main.c **** #define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u + 81:Src/main.c **** #define AD9102_SRAM_START_DLY_DEFAULT 0x0000u + 82:Src/main.c **** #define AD9102_SRAM_HOLD_DEFAULT 0x1u + 83:Src/main.c **** #define AD9102_SRAM_SAMPLES_DEFAULT 16u + 84:Src/main.c **** #define AD9102_SRAM_MAX_SAMPLES 4096u + 85:Src/main.c **** #define AD9102_SRAM_RAMP_MIN (-8192) + 86:Src/main.c **** #define AD9102_SRAM_RAMP_MAX (8191) + 87:Src/main.c **** #define AD9102_SRAM_RAMP_SPAN (AD9102_SRAM_RAMP_MAX - AD9102_SRAM_RAMP_MIN) + 88:Src/main.c **** + 89:Src/main.c **** #define AD9102_SAW_STEP_DEFAULT 1u + 90:Src/main.c **** #define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u + 91:Src/main.c **** #define AD9102_START_DELAY_BASE_DEFAULT 0x1u + 92:Src/main.c **** #define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u + 93:Src/main.c **** #define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu + 94:Src/main.c **** + 95:Src/main.c **** #define AD9102_FLAG_ENABLE 0x0001u + 96:Src/main.c **** #define AD9102_FLAG_TRIANGLE 0x0002u + 97:Src/main.c **** #define AD9102_FLAG_SRAM 0x0004u + 98:Src/main.c **** /* USER CODE END PD */ + 99:Src/main.c **** + 100:Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 101:Src/main.c **** /* USER CODE BEGIN PM */ + 102:Src/main.c **** + 103:Src/main.c **** /* USER CODE END PM */ + 104:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 41 - 105:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ - 106:Src/main.c **** - 107:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; - 108:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; - 109:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; + 105:Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 106:Src/main.c **** ADC_HandleTypeDef hadc1; + 107:Src/main.c **** ADC_HandleTypeDef hadc3; + 108:Src/main.c **** + 109:Src/main.c **** SD_HandleTypeDef hsd1; 110:Src/main.c **** - 111:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; - 112:Src/main.c **** - 113:Src/main.c **** task_t task; - 114:Src/main.c **** - 115:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { - 116:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, - 117:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, - 118:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, - 119:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, - 120:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, - 121:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, - 122:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, - 123:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, - 124:Src/main.c **** 0x001eu, 0x001du - 125:Src/main.c **** }; - 126:Src/main.c **** - 127:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { - 128:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, - 129:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, - 130:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, - 131:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 132:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, - 133:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 134:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 135:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, - 136:Src/main.c **** 0x0001u, 0x0001u - 137:Src/main.c **** }; - 138:Src/main.c **** - 139:Src/main.c **** - 140:Src/main.c **** - 141:Src/main.c **** - 142:Src/main.c **** /* USER CODE END PV */ - 143:Src/main.c **** - 144:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ - 145:Src/main.c **** void SystemClock_Config(void); - 146:Src/main.c **** static void MX_GPIO_Init(void); - 147:Src/main.c **** static void MX_DMA_Init(void); - 148:Src/main.c **** static void MX_SPI4_Init(void); - 149:Src/main.c **** static void MX_TIM2_Init(void); - 150:Src/main.c **** static void MX_TIM5_Init(void); - 151:Src/main.c **** static void MX_ADC1_Init(void); - 152:Src/main.c **** static void MX_ADC3_Init(void); - 153:Src/main.c **** static void MX_SPI2_Init(void); - 154:Src/main.c **** static void MX_SPI5_Init(void); - 155:Src/main.c **** static void MX_SPI6_Init(void); - 156:Src/main.c **** static void MX_USART1_UART_Init(void); - 157:Src/main.c **** static void MX_SDMMC1_SD_Init(void); - 158:Src/main.c **** static void MX_TIM7_Init(void); - 159:Src/main.c **** static void MX_TIM6_Init(void); - 160:Src/main.c **** static void MX_TIM10_Init(void); - 161:Src/main.c **** static void MX_UART8_Init(void); - ARM GAS /tmp/ccYgfTud.s page 42 + 111:Src/main.c **** TIM_HandleTypeDef htim4; + 112:Src/main.c **** TIM_HandleTypeDef htim8; + 113:Src/main.c **** TIM_HandleTypeDef htim10; + 114:Src/main.c **** TIM_HandleTypeDef htim11; + 115:Src/main.c **** + 116:Src/main.c **** UART_HandleTypeDef huart8; + 117:Src/main.c **** + 118:Src/main.c **** /* USER CODE BEGIN PV */ + 119:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, + 120:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ + 121:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat + 122:Src/main.c **** FRESULT fresult; // result + 123:Src/main.c **** int test; + 124:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ + 125:Src/main.c **** + 126:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; + 127:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; + 128:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; + 129:Src/main.c **** + 130:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; + 131:Src/main.c **** + 132:Src/main.c **** task_t task; + 133:Src/main.c **** + 134:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { + 135:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, + 136:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, + 137:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, + 138:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, + 139:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, + 140:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, + 141:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, + 142:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, + 143:Src/main.c **** 0x001eu, 0x001du + 144:Src/main.c **** }; + 145:Src/main.c **** + 146:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { + 147:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 148:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 149:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, + 150:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 151:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, + 152:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 153:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 154:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, + 155:Src/main.c **** 0x0001u, 0x0001u + 156:Src/main.c **** }; + 157:Src/main.c **** + 158:Src/main.c **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = { + 159:Src/main.c **** 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 160:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 161:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u, + ARM GAS /tmp/ccwR4KB7.s page 42 - 162:Src/main.c **** static void MX_TIM8_Init(void); - 163:Src/main.c **** static void MX_TIM11_Init(void); - 164:Src/main.c **** static void MX_TIM4_Init(void); - 165:Src/main.c **** /* USER CODE BEGIN PFP */ - 166:Src/main.c **** static void Init_params(void); - 167:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 168:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 169:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); - 170:Src/main.c **** static uint16_t MPhD_T(uint8_t num); - 171:Src/main.c **** static uint16_t Get_ADC(uint8_t num); - 172:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul - 173:Src/main.c **** static void AD9102_Init(void); - 174:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value); - 175:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr); - 176:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); - 177:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, - 178:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t - 179:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); - 180:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); - 181:Src/main.c **** //int SD_Init(void); - 182:Src/main.c **** int SD_SAVE(uint16_t *pbuff); - 183:Src/main.c **** //uint32_t Get_Length(void); - 184:Src/main.c **** int SD_READ(uint16_t *pbuff); - 185:Src/main.c **** int SD_REMOVE(void); - 186:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); - 187:Src/main.c **** void USART_TX_DMA (uint16_t sz); - 188:Src/main.c **** static void Stop_TIM10(); - 189:Src/main.c **** static void OUT_trigger(uint8_t); - 190:Src/main.c **** /* USER CODE END PFP */ - 191:Src/main.c **** - 192:Src/main.c **** /* Private user code ---------------------------------------------------------*/ - 193:Src/main.c **** /* USER CODE BEGIN 0 */ - 194:Src/main.c **** - 195:Src/main.c **** /* USER CODE END 0 */ - 196:Src/main.c **** - 197:Src/main.c **** /** - 198:Src/main.c **** * @brief The application entry point. - 199:Src/main.c **** * @retval int - 200:Src/main.c **** */ - 201:Src/main.c **** int main(void) - 202:Src/main.c **** { - 203:Src/main.c **** - 204:Src/main.c **** /* USER CODE BEGIN 1 */ - 205:Src/main.c **** HAL_StatusTypeDef st; - 206:Src/main.c **** /* USER CODE END 1 */ - 207:Src/main.c **** - 208:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ - 209:Src/main.c **** - 210:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - 211:Src/main.c **** HAL_Init(); - 212:Src/main.c **** - 213:Src/main.c **** /* USER CODE BEGIN Init */ - 214:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ - 215:Src/main.c **** /* USER CODE END Init */ - 216:Src/main.c **** - 217:Src/main.c **** /* Configure the system clock */ - 218:Src/main.c **** SystemClock_Config(); - ARM GAS /tmp/ccYgfTud.s page 43 + 162:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 163:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u, + 164:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 165:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 166:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u, + 167:Src/main.c **** 0x0001u, 0x0001u + 168:Src/main.c **** }; + 169:Src/main.c **** + 170:Src/main.c **** + 171:Src/main.c **** + 172:Src/main.c **** + 173:Src/main.c **** /* USER CODE END PV */ + 174:Src/main.c **** + 175:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 176:Src/main.c **** void SystemClock_Config(void); + 177:Src/main.c **** static void MX_GPIO_Init(void); + 178:Src/main.c **** static void MX_DMA_Init(void); + 179:Src/main.c **** static void MX_SPI4_Init(void); + 180:Src/main.c **** static void MX_TIM2_Init(void); + 181:Src/main.c **** static void MX_TIM5_Init(void); + 182:Src/main.c **** static void MX_ADC1_Init(void); + 183:Src/main.c **** static void MX_ADC3_Init(void); + 184:Src/main.c **** static void MX_SPI2_Init(void); + 185:Src/main.c **** static void MX_SPI5_Init(void); + 186:Src/main.c **** static void MX_SPI6_Init(void); + 187:Src/main.c **** static void MX_USART1_UART_Init(void); + 188:Src/main.c **** static void MX_SDMMC1_SD_Init(void); + 189:Src/main.c **** static void MX_TIM7_Init(void); + 190:Src/main.c **** static void MX_TIM6_Init(void); + 191:Src/main.c **** static void MX_TIM10_Init(void); + 192:Src/main.c **** static void MX_UART8_Init(void); + 193:Src/main.c **** static void MX_TIM8_Init(void); + 194:Src/main.c **** static void MX_TIM11_Init(void); + 195:Src/main.c **** static void MX_TIM4_Init(void); + 196:Src/main.c **** /* USER CODE BEGIN PFP */ + 197:Src/main.c **** static void Init_params(void); + 198:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 199:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 200:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); + 201:Src/main.c **** static uint16_t MPhD_T(uint8_t num); + 202:Src/main.c **** static uint16_t Get_ADC(uint8_t num); + 203:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul + 204:Src/main.c **** static void AD9102_Init(void); + 205:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value); + 206:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr); + 207:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); + 208:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, + 209:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle); + 210:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle); + 211:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t + 212:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin + 213:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); + 214:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); + 215:Src/main.c **** //int SD_Init(void); + 216:Src/main.c **** int SD_SAVE(uint16_t *pbuff); + 217:Src/main.c **** //uint32_t Get_Length(void); + 218:Src/main.c **** int SD_READ(uint16_t *pbuff); + ARM GAS /tmp/ccwR4KB7.s page 43 - 219:Src/main.c **** - 220:Src/main.c **** /* USER CODE BEGIN SysInit */ - 221:Src/main.c **** - 222:Src/main.c **** /* USER CODE END SysInit */ - 223:Src/main.c **** - 224:Src/main.c **** /* Initialize all configured peripherals */ - 225:Src/main.c **** MX_GPIO_Init(); - 226:Src/main.c **** MX_DMA_Init(); - 227:Src/main.c **** MX_SPI4_Init(); - 228:Src/main.c **** MX_FATFS_Init(); - 229:Src/main.c **** MX_TIM2_Init(); - 230:Src/main.c **** MX_TIM5_Init(); - 231:Src/main.c **** MX_ADC1_Init(); - 232:Src/main.c **** MX_ADC3_Init(); - 233:Src/main.c **** MX_SPI2_Init(); - 234:Src/main.c **** MX_SPI5_Init(); - 235:Src/main.c **** MX_SPI6_Init(); - 236:Src/main.c **** MX_USART1_UART_Init(); - 237:Src/main.c **** MX_SDMMC1_SD_Init(); - 238:Src/main.c **** MX_TIM7_Init(); - 239:Src/main.c **** MX_TIM6_Init(); - 240:Src/main.c **** MX_TIM10_Init(); - 241:Src/main.c **** MX_UART8_Init(); - 242:Src/main.c **** MX_TIM8_Init(); - 243:Src/main.c **** MX_TIM11_Init(); - 244:Src/main.c **** MX_TIM4_Init(); - 245:Src/main.c **** /* USER CODE BEGIN 2 */ - 246:Src/main.c **** Init_params(); - 247:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 248:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 249:Src/main.c **** + 219:Src/main.c **** int SD_REMOVE(void); + 220:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); + 221:Src/main.c **** void USART_TX_DMA (uint16_t sz); + 222:Src/main.c **** static void Stop_TIM10(); + 223:Src/main.c **** static void OUT_trigger(uint8_t); + 224:Src/main.c **** /* USER CODE END PFP */ + 225:Src/main.c **** + 226:Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 227:Src/main.c **** /* USER CODE BEGIN 0 */ + 228:Src/main.c **** + 229:Src/main.c **** /* USER CODE END 0 */ + 230:Src/main.c **** + 231:Src/main.c **** /** + 232:Src/main.c **** * @brief The application entry point. + 233:Src/main.c **** * @retval int + 234:Src/main.c **** */ + 235:Src/main.c **** int main(void) + 236:Src/main.c **** { + 237:Src/main.c **** + 238:Src/main.c **** /* USER CODE BEGIN 1 */ + 239:Src/main.c **** HAL_StatusTypeDef st; + 240:Src/main.c **** /* USER CODE END 1 */ + 241:Src/main.c **** + 242:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 243:Src/main.c **** + 244:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 245:Src/main.c **** HAL_Init(); + 246:Src/main.c **** + 247:Src/main.c **** /* USER CODE BEGIN Init */ + 248:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ + 249:Src/main.c **** /* USER CODE END Init */ 250:Src/main.c **** - 251:Src/main.c **** //TIM4,11 clocks = 92 MHz - 252:Src/main.c **** - 253:Src/main.c **** //ADC clock - 254:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 255:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 256:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 257:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre - 258:Src/main.c **** - 259:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 260:Src/main.c **** - 261:Src/main.c **** - 262:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) - 263:Src/main.c **** - 264:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; - 265:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 266:Src/main.c **** - 267:Src/main.c **** /* - 268:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ - 269:Src/main.c **** - 270:Src/main.c **** CPU_state = DECODE_ENABLE; - 271:Src/main.c **** } - 272:Src/main.c **** */ - 273:Src/main.c **** /* USER CODE END 2 */ - 274:Src/main.c **** - 275:Src/main.c **** /* Infinite loop */ - ARM GAS /tmp/ccYgfTud.s page 44 + 251:Src/main.c **** /* Configure the system clock */ + 252:Src/main.c **** SystemClock_Config(); + 253:Src/main.c **** + 254:Src/main.c **** /* USER CODE BEGIN SysInit */ + 255:Src/main.c **** + 256:Src/main.c **** /* USER CODE END SysInit */ + 257:Src/main.c **** + 258:Src/main.c **** /* Initialize all configured peripherals */ + 259:Src/main.c **** MX_GPIO_Init(); + 260:Src/main.c **** MX_DMA_Init(); + 261:Src/main.c **** MX_SPI4_Init(); + 262:Src/main.c **** MX_FATFS_Init(); + 263:Src/main.c **** MX_TIM2_Init(); + 264:Src/main.c **** MX_TIM5_Init(); + 265:Src/main.c **** MX_ADC1_Init(); + 266:Src/main.c **** MX_ADC3_Init(); + 267:Src/main.c **** MX_SPI2_Init(); + 268:Src/main.c **** MX_SPI5_Init(); + 269:Src/main.c **** MX_SPI6_Init(); + 270:Src/main.c **** MX_USART1_UART_Init(); + 271:Src/main.c **** MX_SDMMC1_SD_Init(); + 272:Src/main.c **** MX_TIM7_Init(); + 273:Src/main.c **** MX_TIM6_Init(); + 274:Src/main.c **** MX_TIM10_Init(); + 275:Src/main.c **** MX_UART8_Init(); + ARM GAS /tmp/ccwR4KB7.s page 44 - 276:Src/main.c **** /* USER CODE BEGIN WHILE */ - 277:Src/main.c **** while (1) - 278:Src/main.c **** { - 279:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) - 280:Src/main.c **** { - 281:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); - 282:Src/main.c **** LL_USART_EnableIT_PE(USART1); - 283:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); - 284:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); - 285:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); - 286:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 287:Src/main.c **** u_rx_flg = 1; - 288:Src/main.c **** } - 289:Src/main.c **** // else - 290:Src/main.c **** // { - 291:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); - 292:Src/main.c **** // u_rx_flg = 0; - 293:Src/main.c **** // } - 294:Src/main.c **** switch (CPU_state) - 295:Src/main.c **** { - 296:Src/main.c **** case HALT://0 - Default state - 297:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 298:Src/main.c **** task.current_param = task.min_param; - 299:Src/main.c **** Stop_TIM10(); - 300:Src/main.c **** break; - 301:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 302:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); - 303:Src/main.c **** if (CheckChecksum(COMMAND)) - 304:Src/main.c **** { - 305:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 - 306:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 307:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 308:Src/main.c **** TO6_before = TO6; - 309:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 310:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; - 311:Src/main.c **** CPU_state = WORK_ENABLE; - 312:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 313:Src/main.c **** } - 314:Src/main.c **** else - 315:Src/main.c **** { - 316:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 317:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 318:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 319:Src/main.c **** } - 320:Src/main.c **** UART_transmission_request = MESS_01; - 321:Src/main.c **** break; - 322:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 323:Src/main.c **** //Set current setup to default - 324:Src/main.c **** task.current_param = task.min_param; - 325:Src/main.c **** Stop_TIM10(); - 326:Src/main.c **** Init_params(); - 327:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 328:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 329:Src/main.c **** CPU_state = HALT; - 330:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 331:Src/main.c **** UART_transmission_request = MESS_01; - 332:Src/main.c **** break; - ARM GAS /tmp/ccYgfTud.s page 45 + 276:Src/main.c **** MX_TIM8_Init(); + 277:Src/main.c **** MX_TIM11_Init(); + 278:Src/main.c **** MX_TIM4_Init(); + 279:Src/main.c **** /* USER CODE BEGIN 2 */ + 280:Src/main.c **** Init_params(); + 281:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 282:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 283:Src/main.c **** + 284:Src/main.c **** + 285:Src/main.c **** //TIM4,11 clocks = 92 MHz + 286:Src/main.c **** + 287:Src/main.c **** //ADC clock + 288:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 289:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 290:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 291:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre + 292:Src/main.c **** + 293:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 294:Src/main.c **** + 295:Src/main.c **** + 296:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) + 297:Src/main.c **** + 298:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; + 299:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 300:Src/main.c **** + 301:Src/main.c **** /* + 302:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ + 303:Src/main.c **** + 304:Src/main.c **** CPU_state = DECODE_ENABLE; + 305:Src/main.c **** } + 306:Src/main.c **** */ + 307:Src/main.c **** /* USER CODE END 2 */ + 308:Src/main.c **** + 309:Src/main.c **** /* Infinite loop */ + 310:Src/main.c **** /* USER CODE BEGIN WHILE */ + 311:Src/main.c **** while (1) + 312:Src/main.c **** { + 313:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) + 314:Src/main.c **** { + 315:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); + 316:Src/main.c **** LL_USART_EnableIT_PE(USART1); + 317:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); + 318:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); + 319:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); + 320:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 321:Src/main.c **** u_rx_flg = 1; + 322:Src/main.c **** } + 323:Src/main.c **** // else + 324:Src/main.c **** // { + 325:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); + 326:Src/main.c **** // u_rx_flg = 0; + 327:Src/main.c **** // } + 328:Src/main.c **** switch (CPU_state) + 329:Src/main.c **** { + 330:Src/main.c **** case HALT://0 - Default state + 331:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 332:Src/main.c **** task.current_param = task.min_param; + ARM GAS /tmp/ccwR4KB7.s page 45 - 333:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 334:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); - 335:Src/main.c **** State_Data[0]|=temp16&0xff; - 336:Src/main.c **** if (temp16==0) - 337:Src/main.c **** { - 338:Src/main.c **** UART_transmission_request = MESS_03; - 339:Src/main.c **** } - 340:Src/main.c **** else - 341:Src/main.c **** { - 342:Src/main.c **** UART_transmission_request = MESS_01; - 343:Src/main.c **** } - 344:Src/main.c **** CPU_state_old = HALT; - 345:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 346:Src/main.c **** break; - 347:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 348:Src/main.c **** UART_transmission_request = MESS_02; - 349:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 350:Src/main.c **** break; - 351:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 352:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; - 353:Src/main.c **** UART_transmission_request = MESS_01; - 354:Src/main.c **** CPU_state = CPU_state_old; + 333:Src/main.c **** Stop_TIM10(); + 334:Src/main.c **** break; + 335:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 336:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); + 337:Src/main.c **** if (CheckChecksum(COMMAND)) + 338:Src/main.c **** { + 339:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 + 340:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 341:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 342:Src/main.c **** TO6_before = TO6; + 343:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 344:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; + 345:Src/main.c **** CPU_state = WORK_ENABLE; + 346:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 347:Src/main.c **** } + 348:Src/main.c **** else + 349:Src/main.c **** { + 350:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 351:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 352:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 353:Src/main.c **** } + 354:Src/main.c **** UART_transmission_request = MESS_01; 355:Src/main.c **** break; - 356:Src/main.c **** case STATE://6 - Transmith state message - 357:Src/main.c **** UART_transmission_request = MESS_01; - 358:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 359:Src/main.c **** break; - 360:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 361:Src/main.c **** task.current_param = task.min_param; - 362:Src/main.c **** Stop_TIM10(); - 363:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 364:Src/main.c **** { - 365:Src/main.c **** TO7_before = TO7; - 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 367:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 369:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 370:Src/main.c **** - 371:Src/main.c **** //Correct temperature in all pulses - 372:Src/main.c **** (void) MPhD_T(3); - 373:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 374:Src/main.c **** (void) MPhD_T(4); - 375:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 376:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 377:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 378:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 379:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 380:Src/main.c **** - 381:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 382:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 383:Src/main.c **** - 384:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 - 385:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 386:Src/main.c **** - 387:Src/main.c **** //Prepare DATA of internals ADCs - 388:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 389:Src/main.c **** temp16 = Get_ADC(0); - ARM GAS /tmp/ccYgfTud.s page 46 + 356:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 357:Src/main.c **** //Set current setup to default + 358:Src/main.c **** task.current_param = task.min_param; + 359:Src/main.c **** Stop_TIM10(); + 360:Src/main.c **** Init_params(); + 361:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 362:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 363:Src/main.c **** CPU_state = HALT; + 364:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 365:Src/main.c **** UART_transmission_request = MESS_01; + 366:Src/main.c **** break; + 367:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 368:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); + 369:Src/main.c **** State_Data[0]|=temp16&0xff; + 370:Src/main.c **** if (temp16==0) + 371:Src/main.c **** { + 372:Src/main.c **** UART_transmission_request = MESS_03; + 373:Src/main.c **** } + 374:Src/main.c **** else + 375:Src/main.c **** { + 376:Src/main.c **** UART_transmission_request = MESS_01; + 377:Src/main.c **** } + 378:Src/main.c **** CPU_state_old = HALT; + 379:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 380:Src/main.c **** break; + 381:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 382:Src/main.c **** UART_transmission_request = MESS_02; + 383:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 384:Src/main.c **** break; + 385:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 386:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; + 387:Src/main.c **** UART_transmission_request = MESS_01; + 388:Src/main.c **** CPU_state = CPU_state_old; + 389:Src/main.c **** break; + ARM GAS /tmp/ccwR4KB7.s page 46 - 390:Src/main.c **** temp16 = Get_ADC(1); - 391:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 392:Src/main.c **** - 393:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 394:Src/main.c **** temp16 = Get_ADC(1); - 395:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 396:Src/main.c **** - 397:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 398:Src/main.c **** temp16 = Get_ADC(1); - 399:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 400:Src/main.c **** - 401:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 402:Src/main.c **** temp16 = Get_ADC(1); - 403:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 390:Src/main.c **** case STATE://6 - Transmith state message + 391:Src/main.c **** UART_transmission_request = MESS_01; + 392:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 393:Src/main.c **** break; + 394:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 395:Src/main.c **** task.current_param = task.min_param; + 396:Src/main.c **** Stop_TIM10(); + 397:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 398:Src/main.c **** { + 399:Src/main.c **** TO7_before = TO7; + 400:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 401:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 402:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 403:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 404:Src/main.c **** - 405:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 406:Src/main.c **** temp16 = Get_ADC(1); - 407:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 408:Src/main.c **** temp16 = Get_ADC(2); - 409:Src/main.c **** - 410:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 411:Src/main.c **** temp16 = Get_ADC(3); - 412:Src/main.c **** temp16 = Get_ADC(4); - 413:Src/main.c **** Long_Data[12] = temp16; - 414:Src/main.c **** temp16 = Get_ADC(5); - 415:Src/main.c **** - 416:Src/main.c **** //Put the timer tick to Long_Data: - 417:Src/main.c **** TO6_stop = TO6; - 418:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 419:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 420:Src/main.c **** - 421:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 422:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 423:Src/main.c **** - 424:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 425:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 426:Src/main.c **** - 427:Src/main.c **** if (Curr_setup.SD_EN==1) - 428:Src/main.c **** { - 429:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 430:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 431:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 432:Src/main.c **** State_Data[0]|=temp16&0xff; - 433:Src/main.c **** } - 434:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 435:Src/main.c **** } - 436:Src/main.c **** break; - 437:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output - 438:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) - 439:Src/main.c **** { - 440:Src/main.c **** uint16_t flags = COMMAND[0]; - 441:Src/main.c **** uint16_t param0 = COMMAND[1]; - 442:Src/main.c **** uint16_t param1 = COMMAND[2]; - 443:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 444:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 445:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; - 446:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - ARM GAS /tmp/ccYgfTud.s page 47 + 405:Src/main.c **** //Correct temperature in all pulses + 406:Src/main.c **** (void) MPhD_T(3); + 407:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 408:Src/main.c **** (void) MPhD_T(4); + 409:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 410:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 411:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 412:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 413:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 414:Src/main.c **** + 415:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 416:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 417:Src/main.c **** + 418:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 + 419:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 420:Src/main.c **** + 421:Src/main.c **** //Prepare DATA of internals ADCs + 422:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 423:Src/main.c **** temp16 = Get_ADC(0); + 424:Src/main.c **** temp16 = Get_ADC(1); + 425:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 426:Src/main.c **** + 427:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 428:Src/main.c **** temp16 = Get_ADC(1); + 429:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 430:Src/main.c **** + 431:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 432:Src/main.c **** temp16 = Get_ADC(1); + 433:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 434:Src/main.c **** + 435:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 436:Src/main.c **** temp16 = Get_ADC(1); + 437:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 438:Src/main.c **** + 439:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 440:Src/main.c **** temp16 = Get_ADC(1); + 441:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 442:Src/main.c **** temp16 = Get_ADC(2); + 443:Src/main.c **** + 444:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 445:Src/main.c **** temp16 = Get_ADC(3); + 446:Src/main.c **** temp16 = Get_ADC(4); + ARM GAS /tmp/ccwR4KB7.s page 47 - 447:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 448:Src/main.c **** uint16_t pat_period = param1; - 449:Src/main.c **** - 450:Src/main.c **** if (param0 == 0u && param1 == 0u) - 451:Src/main.c **** { - 452:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; - 453:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; - 454:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 455:Src/main.c **** } - 456:Src/main.c **** else - 457:Src/main.c **** { - 458:Src/main.c **** if (saw_step == 0u) - 459:Src/main.c **** { - 460:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; - 461:Src/main.c **** } - 462:Src/main.c **** else if (saw_step > 63u) - 463:Src/main.c **** { - 464:Src/main.c **** saw_step = 63u; - 465:Src/main.c **** } - 466:Src/main.c **** if (pat_period == 0u) - 467:Src/main.c **** { - 468:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 469:Src/main.c **** } - 470:Src/main.c **** } - 471:Src/main.c **** - 472:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); - 473:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 474:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 475:Src/main.c **** { - 476:Src/main.c **** State_Data[0] |= AD9102_ERR; - 477:Src/main.c **** } - 478:Src/main.c **** } - 479:Src/main.c **** else - 480:Src/main.c **** { - 481:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 482:Src/main.c **** } - 483:Src/main.c **** UART_transmission_request = MESS_01; - 484:Src/main.c **** CPU_state = CPU_state_old; - 485:Src/main.c **** break; - 486:Src/main.c **** case DECODE_TASK: - 487:Src/main.c **** if (CheckChecksum(COMMAND)) - 488:Src/main.c **** { - 489:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 490:Src/main.c **** TO6_before = TO6; - 491:Src/main.c **** CPU_state = RUN_TASK; - 492:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 493:Src/main.c **** } - 494:Src/main.c **** else - 495:Src/main.c **** { - 496:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 497:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 498:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 499:Src/main.c **** } - 500:Src/main.c **** UART_transmission_request = MESS_01; - 501:Src/main.c **** break; - 502:Src/main.c **** case RUN_TASK: - 503:Src/main.c **** switch (task.task_type) - ARM GAS /tmp/ccYgfTud.s page 48 + 447:Src/main.c **** Long_Data[12] = temp16; + 448:Src/main.c **** temp16 = Get_ADC(5); + 449:Src/main.c **** + 450:Src/main.c **** //Put the timer tick to Long_Data: + 451:Src/main.c **** TO6_stop = TO6; + 452:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 453:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 454:Src/main.c **** + 455:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 456:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 457:Src/main.c **** + 458:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 459:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 460:Src/main.c **** + 461:Src/main.c **** if (Curr_setup.SD_EN==1) + 462:Src/main.c **** { + 463:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 464:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 465:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 466:Src/main.c **** State_Data[0]|=temp16&0xff; + 467:Src/main.c **** } + 468:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 469:Src/main.c **** } + 470:Src/main.c **** break; + 471:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output + 472:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) + 473:Src/main.c **** { + 474:Src/main.c **** uint16_t flags = COMMAND[0]; + 475:Src/main.c **** uint16_t param0 = COMMAND[1]; + 476:Src/main.c **** uint16_t param1 = COMMAND[2]; + 477:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 478:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 479:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 480:Src/main.c **** + 481:Src/main.c **** if (sram_mode) + 482:Src/main.c **** { + 483:Src/main.c **** uint16_t samples = param0; + 484:Src/main.c **** uint8_t hold = (uint8_t)(param1 & 0x0Fu); + 485:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle); + 486:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 487:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 488:Src/main.c **** { + 489:Src/main.c **** State_Data[0] |= AD9102_ERR; + 490:Src/main.c **** } + 491:Src/main.c **** } + 492:Src/main.c **** else + 493:Src/main.c **** { + 494:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + 495:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 496:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 497:Src/main.c **** uint16_t pat_period = param1; + 498:Src/main.c **** + 499:Src/main.c **** if (param0 == 0u && param1 == 0u) + 500:Src/main.c **** { + 501:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 502:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 503:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + ARM GAS /tmp/ccwR4KB7.s page 48 - 504:Src/main.c **** { - 505:Src/main.c **** case TT_CHANGE_CURR_1: - 506:Src/main.c **** - 507:Src/main.c **** - 508:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator - 509:Src/main.c **** //ADC clock - 510:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 511:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 512:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 513:Src/main.c **** - 514:Src/main.c **** //online calculation for debug purposes: - 515:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running - 516:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 517:Src/main.c **** - 518:Src/main.c **** - 519:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 520:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 521:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 522:Src/main.c **** - 523:Src/main.c **** - 524:Src/main.c **** - 525:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); - 526:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 527:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 528:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 529:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 530:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 531:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 532:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 533:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 534:Src/main.c **** - 535:Src/main.c **** // Toggle pin for oscilloscope - 536:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc - 537:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 538:Src/main.c **** - 539:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 540:Src/main.c **** if (st != HAL_OK) - 541:Src/main.c **** while(1); - 542:Src/main.c **** - 543:Src/main.c **** uint16_t step_counter = 0; - 544:Src/main.c **** uint16_t trigger_counter = 0; - 545:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 546:Src/main.c **** uint16_t task_sheduler = 0; - 547:Src/main.c **** - 548:Src/main.c **** - 549:Src/main.c **** - 550:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 551:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 552:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 553:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 554:Src/main.c **** - 555:Src/main.c **** + 504:Src/main.c **** } + 505:Src/main.c **** else + 506:Src/main.c **** { + 507:Src/main.c **** if (saw_step == 0u) + 508:Src/main.c **** { + 509:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 510:Src/main.c **** } + 511:Src/main.c **** else if (saw_step > 63u) + 512:Src/main.c **** { + 513:Src/main.c **** saw_step = 63u; + 514:Src/main.c **** } + 515:Src/main.c **** if (pat_period == 0u) + 516:Src/main.c **** { + 517:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 518:Src/main.c **** } + 519:Src/main.c **** } + 520:Src/main.c **** + 521:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); + 522:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 523:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 524:Src/main.c **** { + 525:Src/main.c **** State_Data[0] |= AD9102_ERR; + 526:Src/main.c **** } + 527:Src/main.c **** } + 528:Src/main.c **** } + 529:Src/main.c **** else + 530:Src/main.c **** { + 531:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 532:Src/main.c **** } + 533:Src/main.c **** UART_transmission_request = MESS_01; + 534:Src/main.c **** CPU_state = CPU_state_old; + 535:Src/main.c **** break; + 536:Src/main.c **** case DECODE_TASK: + 537:Src/main.c **** if (CheckChecksum(COMMAND)) + 538:Src/main.c **** { + 539:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 540:Src/main.c **** TO6_before = TO6; + 541:Src/main.c **** CPU_state = RUN_TASK; + 542:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 543:Src/main.c **** } + 544:Src/main.c **** else + 545:Src/main.c **** { + 546:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 547:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 548:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 549:Src/main.c **** } + 550:Src/main.c **** UART_transmission_request = MESS_01; + 551:Src/main.c **** break; + 552:Src/main.c **** case RUN_TASK: + 553:Src/main.c **** switch (task.task_type) + 554:Src/main.c **** { + 555:Src/main.c **** case TT_CHANGE_CURR_1: 556:Src/main.c **** - 557:Src/main.c **** TIM11 -> CNT = 0; - 558:Src/main.c **** TIM4 -> CNT = 0; - 559:Src/main.c **** - 560:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - ARM GAS /tmp/ccYgfTud.s page 49 + 557:Src/main.c **** + 558:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator + 559:Src/main.c **** //ADC clock + 560:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + ARM GAS /tmp/ccwR4KB7.s page 49 - 561:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 562:Src/main.c **** //TIM4 -> CNT = 0; + 561:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 562:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz 563:Src/main.c **** - 564:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de - 565:Src/main.c **** TIM11 -> CNT = 0; - 566:Src/main.c **** + 564:Src/main.c **** //online calculation for debug purposes: + 565:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running + 566:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; 567:Src/main.c **** - 568:Src/main.c **** while (task.current_param < task.max_param) - 569:Src/main.c **** { - 570:Src/main.c **** if (TIM10_coflag) - 571:Src/main.c **** { - 572:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 573:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 574:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase - 575:Src/main.c **** task.current_param += task.delta_param; - 576:Src/main.c **** TO10 = 0; - 577:Src/main.c **** TIM10_coflag = 0; - 578:Src/main.c **** - 579:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 581:Src/main.c **** //* - 582:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step - 583:Src/main.c **** OUT_trigger(trigger_counter); - 584:Src/main.c **** ++trigger_counter; - 585:Src/main.c **** } - 586:Src/main.c **** ++step_counter; - 587:Src/main.c **** //*/ - 588:Src/main.c **** /* - 589:Src/main.c **** ++task_sheduler; - 590:Src/main.c **** if (task_sheduler >= 10){ - 591:Src/main.c **** task_sheduler = 0; - 592:Src/main.c **** } - 593:Src/main.c **** //maintain stable temperature of laser 2 - 594:Src/main.c **** if (task_sheduler == 0){ - 595:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 596:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 597:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 598:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 599:Src/main.c **** } - 600:Src/main.c **** //maintain stable temperature of laser 1 - 601:Src/main.c **** //* - 602:Src/main.c **** if (task_sheduler == 5){ - 603:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 604:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 605:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 606:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 607:Src/main.c **** } - 608:Src/main.c **** //*/ - 609:Src/main.c **** } - 610:Src/main.c **** } - 611:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o - 612:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 613:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda - 614:Src/main.c **** //but one-pulse mode should be disabled - 615:Src/main.c **** - 616:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 617:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - ARM GAS /tmp/ccYgfTud.s page 50 + 568:Src/main.c **** + 569:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) + 570:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + 571:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 572:Src/main.c **** + 573:Src/main.c **** + 574:Src/main.c **** + 575:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); + 576:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 577:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 578:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 579:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 580:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 581:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 582:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 583:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 584:Src/main.c **** + 585:Src/main.c **** // Toggle pin for oscilloscope + 586:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc + 587:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 588:Src/main.c **** + 589:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 590:Src/main.c **** if (st != HAL_OK) + 591:Src/main.c **** while(1); + 592:Src/main.c **** + 593:Src/main.c **** uint16_t step_counter = 0; + 594:Src/main.c **** uint16_t trigger_counter = 0; + 595:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 596:Src/main.c **** uint16_t task_sheduler = 0; + 597:Src/main.c **** + 598:Src/main.c **** + 599:Src/main.c **** + 600:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 601:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 602:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 603:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 604:Src/main.c **** + 605:Src/main.c **** + 606:Src/main.c **** + 607:Src/main.c **** TIM11 -> CNT = 0; + 608:Src/main.c **** TIM4 -> CNT = 0; + 609:Src/main.c **** + 610:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 611:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 612:Src/main.c **** //TIM4 -> CNT = 0; + 613:Src/main.c **** + 614:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de + 615:Src/main.c **** TIM11 -> CNT = 0; + 616:Src/main.c **** + 617:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 50 - 618:Src/main.c **** - 619:Src/main.c **** - 620:Src/main.c **** - 621:Src/main.c **** Stop_TIM10(); - 622:Src/main.c **** - 623:Src/main.c **** task.current_param = task.min_param; - 624:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 625:Src/main.c **** if (task.tau > 3) - 626:Src/main.c **** { - 627:Src/main.c **** TIM10_period = htim10.Init.Period; - 628:Src/main.c **** htim10.Init.Period = 9999; - 629:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 630:Src/main.c **** } - 631:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 632:Src/main.c **** break; - 633:Src/main.c **** case TT_CHANGE_CURR_2: - 634:Src/main.c **** //Blink laser 2 - 635:Src/main.c **** //* - 636:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 637:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 638:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 639:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 640:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 641:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 642:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 643:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 644:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 645:Src/main.c **** - 646:Src/main.c **** LD_blinker.task_type = 2; - 647:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 648:Src/main.c **** //LD_blinker.param = task.current_param; - 649:Src/main.c **** LD_blinker.param = 0; - 650:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 651:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 652:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 653:Src/main.c **** - 654:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). - 655:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 656:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); - 657:Src/main.c **** if (st != HAL_OK) - 658:Src/main.c **** while(1); - 659:Src/main.c **** // */ - 660:Src/main.c **** - 661:Src/main.c **** // Toggle pin for oscilloscope - 662:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 663:Src/main.c **** uint32_t i = 10000; while (--i){} - 664:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 665:Src/main.c **** LD_blinker.state = 2; - 666:Src/main.c **** - 667:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 668:Src/main.c **** if (st != HAL_OK) - 669:Src/main.c **** while(1); - 670:Src/main.c **** while (task.current_param < task.max_param) - 671:Src/main.c **** { - 672:Src/main.c **** if (TIM10_coflag) - 673:Src/main.c **** { - 674:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - ARM GAS /tmp/ccYgfTud.s page 51 + 618:Src/main.c **** while (task.current_param < task.max_param) + 619:Src/main.c **** { + 620:Src/main.c **** if (TIM10_coflag) + 621:Src/main.c **** { + 622:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 623:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 624:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase + 625:Src/main.c **** task.current_param += task.delta_param; + 626:Src/main.c **** TO10 = 0; + 627:Src/main.c **** TIM10_coflag = 0; + 628:Src/main.c **** + 629:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t + 630:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 631:Src/main.c **** //* + 632:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step + 633:Src/main.c **** OUT_trigger(trigger_counter); + 634:Src/main.c **** ++trigger_counter; + 635:Src/main.c **** } + 636:Src/main.c **** ++step_counter; + 637:Src/main.c **** //*/ + 638:Src/main.c **** /* + 639:Src/main.c **** ++task_sheduler; + 640:Src/main.c **** if (task_sheduler >= 10){ + 641:Src/main.c **** task_sheduler = 0; + 642:Src/main.c **** } + 643:Src/main.c **** //maintain stable temperature of laser 2 + 644:Src/main.c **** if (task_sheduler == 0){ + 645:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 646:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 647:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 648:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 649:Src/main.c **** } + 650:Src/main.c **** //maintain stable temperature of laser 1 + 651:Src/main.c **** //* + 652:Src/main.c **** if (task_sheduler == 5){ + 653:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 654:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 655:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 656:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 657:Src/main.c **** } + 658:Src/main.c **** //*/ + 659:Src/main.c **** } + 660:Src/main.c **** } + 661:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o + 662:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 663:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda + 664:Src/main.c **** //but one-pulse mode should be disabled + 665:Src/main.c **** + 666:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 667:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 668:Src/main.c **** + 669:Src/main.c **** + 670:Src/main.c **** + 671:Src/main.c **** Stop_TIM10(); + 672:Src/main.c **** + 673:Src/main.c **** task.current_param = task.min_param; + 674:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + ARM GAS /tmp/ccwR4KB7.s page 51 - 675:Src/main.c **** //LD_blinker.param = task.current_param; - 676:Src/main.c **** //++LD_blinker.param; - 677:Src/main.c **** task.current_param += task.delta_param; - 678:Src/main.c **** TO10 = 0; - 679:Src/main.c **** TIM10_coflag = 0; - 680:Src/main.c **** - 681:Src/main.c **** - 682:Src/main.c **** } - 683:Src/main.c **** } - 684:Src/main.c **** HAL_TIM_Base_Stop(&htim10); - 685:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 686:Src/main.c **** - 687:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 688:Src/main.c **** - 689:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); - 690:Src/main.c **** TIM8->CNT = 0; - 691:Src/main.c **** - 692:Src/main.c **** Stop_TIM10(); - 693:Src/main.c **** task.current_param = task.min_param; - 694:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 695:Src/main.c **** if (task.tau > 3) - 696:Src/main.c **** { - 697:Src/main.c **** TIM10_period = htim10.Init.Period; - 698:Src/main.c **** htim10.Init.Period = 9999; - 699:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 700:Src/main.c **** } - 701:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 702:Src/main.c **** + 675:Src/main.c **** if (task.tau > 3) + 676:Src/main.c **** { + 677:Src/main.c **** TIM10_period = htim10.Init.Period; + 678:Src/main.c **** htim10.Init.Period = 9999; + 679:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 680:Src/main.c **** } + 681:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 682:Src/main.c **** break; + 683:Src/main.c **** case TT_CHANGE_CURR_2: + 684:Src/main.c **** //Blink laser 2 + 685:Src/main.c **** //* + 686:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 687:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 688:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 689:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 690:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 691:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 692:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 693:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 694:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 695:Src/main.c **** + 696:Src/main.c **** LD_blinker.task_type = 2; + 697:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 698:Src/main.c **** //LD_blinker.param = task.current_param; + 699:Src/main.c **** LD_blinker.param = 0; + 700:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 701:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 702:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; 703:Src/main.c **** - 704:Src/main.c **** //*/ - 705:Src/main.c **** - 706:Src/main.c **** /* // Backup - 707:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 708:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 709:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 710:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 711:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 712:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 713:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 714:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 715:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 704:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). + 705:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 706:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); + 707:Src/main.c **** if (st != HAL_OK) + 708:Src/main.c **** while(1); + 709:Src/main.c **** // */ + 710:Src/main.c **** + 711:Src/main.c **** // Toggle pin for oscilloscope + 712:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 713:Src/main.c **** uint32_t i = 10000; while (--i){} + 714:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 715:Src/main.c **** LD_blinker.state = 2; 716:Src/main.c **** - 717:Src/main.c **** // Toggle pin for oscilloscope - 718:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 719:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 720:Src/main.c **** - 721:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 722:Src/main.c **** if (st != HAL_OK) - 723:Src/main.c **** while(1); - 724:Src/main.c **** while (task.current_param < task.max_param) - 725:Src/main.c **** { - 726:Src/main.c **** if (TIM10_coflag) - 727:Src/main.c **** { - 728:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 729:Src/main.c **** task.current_param += task.delta_param; - 730:Src/main.c **** TO10 = 0; - 731:Src/main.c **** TIM10_coflag = 0; - ARM GAS /tmp/ccYgfTud.s page 52 + 717:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 718:Src/main.c **** if (st != HAL_OK) + 719:Src/main.c **** while(1); + 720:Src/main.c **** while (task.current_param < task.max_param) + 721:Src/main.c **** { + 722:Src/main.c **** if (TIM10_coflag) + 723:Src/main.c **** { + 724:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 725:Src/main.c **** //LD_blinker.param = task.current_param; + 726:Src/main.c **** //++LD_blinker.param; + 727:Src/main.c **** task.current_param += task.delta_param; + 728:Src/main.c **** TO10 = 0; + 729:Src/main.c **** TIM10_coflag = 0; + 730:Src/main.c **** + 731:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 52 - 732:Src/main.c **** - 733:Src/main.c **** - 734:Src/main.c **** } - 735:Src/main.c **** } - 736:Src/main.c **** Stop_TIM10(); - 737:Src/main.c **** task.current_param = task.min_param; - 738:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 739:Src/main.c **** if (task.tau > 3) - 740:Src/main.c **** { - 741:Src/main.c **** TIM10_period = htim10.Init.Period; - 742:Src/main.c **** htim10.Init.Period = 9999; - 743:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 744:Src/main.c **** } - 745:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 746:Src/main.c **** */ - 747:Src/main.c **** - 748:Src/main.c **** - 749:Src/main.c **** break; - 750:Src/main.c **** case TT_CHANGE_TEMP_1: - 751:Src/main.c **** // isn't implemented - 752:Src/main.c **** break; - 753:Src/main.c **** case TT_CHANGE_TEMP_2: - 754:Src/main.c **** // isn't implemented - 755:Src/main.c **** break; - 756:Src/main.c **** } - 757:Src/main.c **** - 758:Src/main.c **** if (TO7>TO7_before) - 759:Src/main.c **** { - 760:Src/main.c **** TO7_before = TO7; - 761:Src/main.c **** - 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 763:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 765:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 766:Src/main.c **** - 767:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 768:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 769:Src/main.c **** - 770:Src/main.c **** //Prepare DATA of internals ADCs - 771:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 772:Src/main.c **** temp16 = Get_ADC(0); - 773:Src/main.c **** temp16 = Get_ADC(1); - 774:Src/main.c **** Long_Data[7] = temp16; - 775:Src/main.c **** - 776:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 777:Src/main.c **** temp16 = Get_ADC(1); - 778:Src/main.c **** Long_Data[8] = temp16; - 779:Src/main.c **** - 780:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 781:Src/main.c **** temp16 = Get_ADC(1); - 782:Src/main.c **** Long_Data[9] = temp16; - 783:Src/main.c **** - 784:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 785:Src/main.c **** temp16 = Get_ADC(1); - 786:Src/main.c **** Long_Data[10] = temp16; - 787:Src/main.c **** - 788:Src/main.c **** //Put the temperature of LD2 to Long_Data: - ARM GAS /tmp/ccYgfTud.s page 53 + 732:Src/main.c **** } + 733:Src/main.c **** } + 734:Src/main.c **** HAL_TIM_Base_Stop(&htim10); + 735:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 736:Src/main.c **** + 737:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 738:Src/main.c **** + 739:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); + 740:Src/main.c **** TIM8->CNT = 0; + 741:Src/main.c **** + 742:Src/main.c **** Stop_TIM10(); + 743:Src/main.c **** task.current_param = task.min_param; + 744:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 745:Src/main.c **** if (task.tau > 3) + 746:Src/main.c **** { + 747:Src/main.c **** TIM10_period = htim10.Init.Period; + 748:Src/main.c **** htim10.Init.Period = 9999; + 749:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 750:Src/main.c **** } + 751:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 752:Src/main.c **** + 753:Src/main.c **** + 754:Src/main.c **** //*/ + 755:Src/main.c **** + 756:Src/main.c **** /* // Backup + 757:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 758:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 759:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 760:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 761:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 762:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 763:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 764:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 765:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 766:Src/main.c **** + 767:Src/main.c **** // Toggle pin for oscilloscope + 768:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 769:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 770:Src/main.c **** + 771:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 772:Src/main.c **** if (st != HAL_OK) + 773:Src/main.c **** while(1); + 774:Src/main.c **** while (task.current_param < task.max_param) + 775:Src/main.c **** { + 776:Src/main.c **** if (TIM10_coflag) + 777:Src/main.c **** { + 778:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 779:Src/main.c **** task.current_param += task.delta_param; + 780:Src/main.c **** TO10 = 0; + 781:Src/main.c **** TIM10_coflag = 0; + 782:Src/main.c **** + 783:Src/main.c **** + 784:Src/main.c **** } + 785:Src/main.c **** } + 786:Src/main.c **** Stop_TIM10(); + 787:Src/main.c **** task.current_param = task.min_param; + 788:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + ARM GAS /tmp/ccwR4KB7.s page 53 - 789:Src/main.c **** temp16 = Get_ADC(1); - 790:Src/main.c **** Long_Data[11] = temp16; - 791:Src/main.c **** temp16 = Get_ADC(2); - 792:Src/main.c **** - 793:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 794:Src/main.c **** temp16 = Get_ADC(3); - 795:Src/main.c **** temp16 = Get_ADC(4); - 796:Src/main.c **** Long_Data[12] = temp16; - 797:Src/main.c **** temp16 = Get_ADC(5); - 798:Src/main.c **** - 799:Src/main.c **** //Put the timer tick to Long_Data: - 800:Src/main.c **** TO6_stop = TO6; - 801:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 802:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 803:Src/main.c **** - 804:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 805:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 806:Src/main.c **** - 807:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 808:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 809:Src/main.c **** } - 810:Src/main.c **** while (!TIM10_coflag); - 811:Src/main.c **** - 812:Src/main.c **** Stop_TIM10(); - 813:Src/main.c **** - 814:Src/main.c **** if (task.tau > 3) - 815:Src/main.c **** { - 816:Src/main.c **** htim10.Init.Period = TIM10_period; - 817:Src/main.c **** TO10_counter = task.dt / 10; - 818:Src/main.c **** } - 819:Src/main.c **** - 820:Src/main.c **** CPU_state_old = RUN_TASK; - 821:Src/main.c **** break; - 822:Src/main.c **** } - 823:Src/main.c **** - 824:Src/main.c **** switch (UART_transmission_request) - 825:Src/main.c **** { - 826:Src/main.c **** case MESS_01://Default state - 827:Src/main.c **** USART_TX(State_Data,2); - 828:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 829:Src/main.c **** State_Data[0]=0; - 830:Src/main.c **** State_Data[1]=0;//All OK! - 831:Src/main.c **** UART_transmission_request = NO_MESS; - 832:Src/main.c **** break; - 833:Src/main.c **** case MESS_02://Transmith packet - 834:Src/main.c **** - 835:Src/main.c **** //Find CS and put to Long_Data: - 836:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 837:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 838:Src/main.c **** - 839:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 840:Src/main.c **** { - 841:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 842:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 843:Src/main.c **** } - 844:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); - 845:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - ARM GAS /tmp/ccYgfTud.s page 54 + 789:Src/main.c **** if (task.tau > 3) + 790:Src/main.c **** { + 791:Src/main.c **** TIM10_period = htim10.Init.Period; + 792:Src/main.c **** htim10.Init.Period = 9999; + 793:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 794:Src/main.c **** } + 795:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 796:Src/main.c **** */ + 797:Src/main.c **** + 798:Src/main.c **** + 799:Src/main.c **** break; + 800:Src/main.c **** case TT_CHANGE_TEMP_1: + 801:Src/main.c **** // isn't implemented + 802:Src/main.c **** break; + 803:Src/main.c **** case TT_CHANGE_TEMP_2: + 804:Src/main.c **** // isn't implemented + 805:Src/main.c **** break; + 806:Src/main.c **** } + 807:Src/main.c **** + 808:Src/main.c **** if (TO7>TO7_before) + 809:Src/main.c **** { + 810:Src/main.c **** TO7_before = TO7; + 811:Src/main.c **** + 812:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 813:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 814:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 815:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 816:Src/main.c **** + 817:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 818:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 819:Src/main.c **** + 820:Src/main.c **** //Prepare DATA of internals ADCs + 821:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 822:Src/main.c **** temp16 = Get_ADC(0); + 823:Src/main.c **** temp16 = Get_ADC(1); + 824:Src/main.c **** Long_Data[7] = temp16; + 825:Src/main.c **** + 826:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 827:Src/main.c **** temp16 = Get_ADC(1); + 828:Src/main.c **** Long_Data[8] = temp16; + 829:Src/main.c **** + 830:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 831:Src/main.c **** temp16 = Get_ADC(1); + 832:Src/main.c **** Long_Data[9] = temp16; + 833:Src/main.c **** + 834:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 835:Src/main.c **** temp16 = Get_ADC(1); + 836:Src/main.c **** Long_Data[10] = temp16; + 837:Src/main.c **** + 838:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 839:Src/main.c **** temp16 = Get_ADC(1); + 840:Src/main.c **** Long_Data[11] = temp16; + 841:Src/main.c **** temp16 = Get_ADC(2); + 842:Src/main.c **** + 843:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 844:Src/main.c **** temp16 = Get_ADC(3); + 845:Src/main.c **** temp16 = Get_ADC(4); + ARM GAS /tmp/ccwR4KB7.s page 54 - 846:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 847:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 848:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 849:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 850:Src/main.c **** UART_transmission_request = NO_MESS; - 851:Src/main.c **** break; - 852:Src/main.c **** case MESS_03://Transmith saved packet - 853:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 854:Src/main.c **** { - 855:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 856:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 857:Src/main.c **** } - 858:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 859:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 860:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 861:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 862:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 863:Src/main.c **** UART_transmission_request = NO_MESS; - 864:Src/main.c **** break; - 865:Src/main.c **** } - 866:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of - 867:Src/main.c **** { - 868:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter - 869:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 870:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 871:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 872:Src/main.c **** } - 873:Src/main.c **** /* USER CODE END WHILE */ - 874:Src/main.c **** - 875:Src/main.c **** /* USER CODE BEGIN 3 */ - 876:Src/main.c **** } - 877:Src/main.c **** /* USER CODE END 3 */ - 878:Src/main.c **** } - 879:Src/main.c **** - 880:Src/main.c **** /** - 881:Src/main.c **** * @brief System Clock Configuration - 882:Src/main.c **** * @retval None - 883:Src/main.c **** */ - 884:Src/main.c **** void SystemClock_Config(void) - 885:Src/main.c **** { - 886:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 887:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 888:Src/main.c **** - 889:Src/main.c **** /** Configure the main internal regulator output voltage - 890:Src/main.c **** */ - 891:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); - 892:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 893:Src/main.c **** - 894:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters - 895:Src/main.c **** * in the RCC_OscInitTypeDef structure. - 896:Src/main.c **** */ - 897:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 898:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 899:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 900:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 901:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 902:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - ARM GAS /tmp/ccYgfTud.s page 55 + 846:Src/main.c **** Long_Data[12] = temp16; + 847:Src/main.c **** temp16 = Get_ADC(5); + 848:Src/main.c **** + 849:Src/main.c **** //Put the timer tick to Long_Data: + 850:Src/main.c **** TO6_stop = TO6; + 851:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 852:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 853:Src/main.c **** + 854:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 855:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 856:Src/main.c **** + 857:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 858:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 859:Src/main.c **** } + 860:Src/main.c **** while (!TIM10_coflag); + 861:Src/main.c **** + 862:Src/main.c **** Stop_TIM10(); + 863:Src/main.c **** + 864:Src/main.c **** if (task.tau > 3) + 865:Src/main.c **** { + 866:Src/main.c **** htim10.Init.Period = TIM10_period; + 867:Src/main.c **** TO10_counter = task.dt / 10; + 868:Src/main.c **** } + 869:Src/main.c **** + 870:Src/main.c **** CPU_state_old = RUN_TASK; + 871:Src/main.c **** break; + 872:Src/main.c **** } + 873:Src/main.c **** + 874:Src/main.c **** switch (UART_transmission_request) + 875:Src/main.c **** { + 876:Src/main.c **** case MESS_01://Default state + 877:Src/main.c **** USART_TX(State_Data,2); + 878:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 879:Src/main.c **** State_Data[0]=0; + 880:Src/main.c **** State_Data[1]=0;//All OK! + 881:Src/main.c **** UART_transmission_request = NO_MESS; + 882:Src/main.c **** break; + 883:Src/main.c **** case MESS_02://Transmith packet + 884:Src/main.c **** + 885:Src/main.c **** //Find CS and put to Long_Data: + 886:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 887:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 888:Src/main.c **** + 889:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + 890:Src/main.c **** { + 891:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 892:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 893:Src/main.c **** } + 894:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); + 895:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 896:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 897:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 898:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 899:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 900:Src/main.c **** UART_transmission_request = NO_MESS; + 901:Src/main.c **** break; + 902:Src/main.c **** case MESS_03://Transmith saved packet + ARM GAS /tmp/ccwR4KB7.s page 55 - 903:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 904:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 905:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 906:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 907:Src/main.c **** { - 908:Src/main.c **** Error_Handler(); - 909:Src/main.c **** } - 910:Src/main.c **** - 911:Src/main.c **** /** Activate the Over-Drive mode - 912:Src/main.c **** */ - 913:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) - 914:Src/main.c **** { - 915:Src/main.c **** Error_Handler(); - 916:Src/main.c **** } - 917:Src/main.c **** - 918:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks - 919:Src/main.c **** */ - 920:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 921:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 922:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 923:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 924:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 925:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 926:Src/main.c **** - 927:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) - 928:Src/main.c **** { - 929:Src/main.c **** Error_Handler(); - 930:Src/main.c **** } - 931:Src/main.c **** } - 932:Src/main.c **** - 933:Src/main.c **** /** - 934:Src/main.c **** * @brief ADC1 Initialization Function - 935:Src/main.c **** * @param None - 936:Src/main.c **** * @retval None - 937:Src/main.c **** */ - 938:Src/main.c **** static void MX_ADC1_Init(void) - 939:Src/main.c **** { - 940:Src/main.c **** - 941:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ - 942:Src/main.c **** - 943:Src/main.c **** /* USER CODE END ADC1_Init 0 */ - 944:Src/main.c **** - 945:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; - 946:Src/main.c **** - 947:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ - 948:Src/main.c **** - 949:Src/main.c **** /* USER CODE END ADC1_Init 1 */ - 950:Src/main.c **** - 951:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 952:Src/main.c **** */ - 953:Src/main.c **** hadc1.Instance = ADC1; - 954:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 955:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 956:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 957:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 958:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 959:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - ARM GAS /tmp/ccYgfTud.s page 56 + 903:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + 904:Src/main.c **** { + 905:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 906:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 907:Src/main.c **** } + 908:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 909:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 910:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 911:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 912:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 913:Src/main.c **** UART_transmission_request = NO_MESS; + 914:Src/main.c **** break; + 915:Src/main.c **** } + 916:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of + 917:Src/main.c **** { + 918:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter + 919:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 920:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 921:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 922:Src/main.c **** } + 923:Src/main.c **** /* USER CODE END WHILE */ + 924:Src/main.c **** + 925:Src/main.c **** /* USER CODE BEGIN 3 */ + 926:Src/main.c **** } + 927:Src/main.c **** /* USER CODE END 3 */ + 928:Src/main.c **** } + 929:Src/main.c **** + 930:Src/main.c **** /** + 931:Src/main.c **** * @brief System Clock Configuration + 932:Src/main.c **** * @retval None + 933:Src/main.c **** */ + 934:Src/main.c **** void SystemClock_Config(void) + 935:Src/main.c **** { + 936:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 937:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 938:Src/main.c **** + 939:Src/main.c **** /** Configure the main internal regulator output voltage + 940:Src/main.c **** */ + 941:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 942:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 943:Src/main.c **** + 944:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 945:Src/main.c **** * in the RCC_OscInitTypeDef structure. + 946:Src/main.c **** */ + 947:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + 948:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 949:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 950:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 951:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 952:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 953:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 954:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 955:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 956:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 957:Src/main.c **** { + 958:Src/main.c **** Error_Handler(); + 959:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 56 - 960:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 961:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 962:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 963:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 964:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 965:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 966:Src/main.c **** { - 967:Src/main.c **** Error_Handler(); - 968:Src/main.c **** } - 969:Src/main.c **** - 970:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 971:Src/main.c **** */ - 972:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; - 973:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 974:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 975:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 976:Src/main.c **** { - 977:Src/main.c **** Error_Handler(); - 978:Src/main.c **** } - 979:Src/main.c **** - 980:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 981:Src/main.c **** */ - 982:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; - 983:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 984:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 985:Src/main.c **** { - 986:Src/main.c **** Error_Handler(); - 987:Src/main.c **** } - 988:Src/main.c **** - 989:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 990:Src/main.c **** */ - 991:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; - 992:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 993:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 994:Src/main.c **** { - 995:Src/main.c **** Error_Handler(); - 996:Src/main.c **** } - 997:Src/main.c **** - 998:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 999:Src/main.c **** */ -1000:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; -1001:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; -1002:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1003:Src/main.c **** { -1004:Src/main.c **** Error_Handler(); -1005:Src/main.c **** } -1006:Src/main.c **** -1007:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1008:Src/main.c **** */ -1009:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; -1010:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; -1011:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1012:Src/main.c **** { -1013:Src/main.c **** Error_Handler(); -1014:Src/main.c **** } -1015:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ -1016:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 57 + 960:Src/main.c **** + 961:Src/main.c **** /** Activate the Over-Drive mode + 962:Src/main.c **** */ + 963:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) + 964:Src/main.c **** { + 965:Src/main.c **** Error_Handler(); + 966:Src/main.c **** } + 967:Src/main.c **** + 968:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 969:Src/main.c **** */ + 970:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 971:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 972:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 973:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 974:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 975:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 976:Src/main.c **** + 977:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) + 978:Src/main.c **** { + 979:Src/main.c **** Error_Handler(); + 980:Src/main.c **** } + 981:Src/main.c **** } + 982:Src/main.c **** + 983:Src/main.c **** /** + 984:Src/main.c **** * @brief ADC1 Initialization Function + 985:Src/main.c **** * @param None + 986:Src/main.c **** * @retval None + 987:Src/main.c **** */ + 988:Src/main.c **** static void MX_ADC1_Init(void) + 989:Src/main.c **** { + 990:Src/main.c **** + 991:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ + 992:Src/main.c **** + 993:Src/main.c **** /* USER CODE END ADC1_Init 0 */ + 994:Src/main.c **** + 995:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 996:Src/main.c **** + 997:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ + 998:Src/main.c **** + 999:Src/main.c **** /* USER CODE END ADC1_Init 1 */ +1000:Src/main.c **** +1001:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1002:Src/main.c **** */ +1003:Src/main.c **** hadc1.Instance = ADC1; +1004:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; +1005:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; +1006:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; +1007:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; +1008:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; +1009:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; +1010:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; +1011:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; +1012:Src/main.c **** hadc1.Init.NbrOfConversion = 5; +1013:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; +1014:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; +1015:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) +1016:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 57 -1017:Src/main.c **** /* USER CODE END ADC1_Init 2 */ -1018:Src/main.c **** -1019:Src/main.c **** } -1020:Src/main.c **** -1021:Src/main.c **** /** -1022:Src/main.c **** * @brief ADC3 Initialization Function -1023:Src/main.c **** * @param None -1024:Src/main.c **** * @retval None -1025:Src/main.c **** */ -1026:Src/main.c **** static void MX_ADC3_Init(void) -1027:Src/main.c **** { -1028:Src/main.c **** -1029:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ -1030:Src/main.c **** -1031:Src/main.c **** /* USER CODE END ADC3_Init 0 */ -1032:Src/main.c **** -1033:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; -1034:Src/main.c **** -1035:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ -1036:Src/main.c **** -1037:Src/main.c **** /* USER CODE END ADC3_Init 1 */ +1017:Src/main.c **** Error_Handler(); +1018:Src/main.c **** } +1019:Src/main.c **** +1020:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1021:Src/main.c **** */ +1022:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; +1023:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; +1024:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; +1025:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1026:Src/main.c **** { +1027:Src/main.c **** Error_Handler(); +1028:Src/main.c **** } +1029:Src/main.c **** +1030:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1031:Src/main.c **** */ +1032:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; +1033:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; +1034:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1035:Src/main.c **** { +1036:Src/main.c **** Error_Handler(); +1037:Src/main.c **** } 1038:Src/main.c **** -1039:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1039:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it 1040:Src/main.c **** */ -1041:Src/main.c **** hadc3.Instance = ADC3; -1042:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; -1043:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; -1044:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; -1045:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; -1046:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; -1047:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; -1048:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; -1049:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; -1050:Src/main.c **** hadc3.Init.NbrOfConversion = 1; -1051:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; -1052:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; -1053:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) -1054:Src/main.c **** { -1055:Src/main.c **** Error_Handler(); -1056:Src/main.c **** } -1057:Src/main.c **** -1058:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1059:Src/main.c **** */ -1060:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; -1061:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; -1062:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; -1063:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) -1064:Src/main.c **** { -1065:Src/main.c **** Error_Handler(); -1066:Src/main.c **** } -1067:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ +1041:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; +1042:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; +1043:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1044:Src/main.c **** { +1045:Src/main.c **** Error_Handler(); +1046:Src/main.c **** } +1047:Src/main.c **** +1048:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1049:Src/main.c **** */ +1050:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; +1051:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; +1052:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1053:Src/main.c **** { +1054:Src/main.c **** Error_Handler(); +1055:Src/main.c **** } +1056:Src/main.c **** +1057:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1058:Src/main.c **** */ +1059:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; +1060:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; +1061:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1062:Src/main.c **** { +1063:Src/main.c **** Error_Handler(); +1064:Src/main.c **** } +1065:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ +1066:Src/main.c **** +1067:Src/main.c **** /* USER CODE END ADC1_Init 2 */ 1068:Src/main.c **** -1069:Src/main.c **** /* USER CODE END ADC3_Init 2 */ +1069:Src/main.c **** } 1070:Src/main.c **** -1071:Src/main.c **** } -1072:Src/main.c **** -1073:Src/main.c **** /** - ARM GAS /tmp/ccYgfTud.s page 58 +1071:Src/main.c **** /** +1072:Src/main.c **** * @brief ADC3 Initialization Function +1073:Src/main.c **** * @param None + ARM GAS /tmp/ccwR4KB7.s page 58 + + +1074:Src/main.c **** * @retval None +1075:Src/main.c **** */ +1076:Src/main.c **** static void MX_ADC3_Init(void) +1077:Src/main.c **** { +1078:Src/main.c **** +1079:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ +1080:Src/main.c **** +1081:Src/main.c **** /* USER CODE END ADC3_Init 0 */ +1082:Src/main.c **** +1083:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1084:Src/main.c **** +1085:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ +1086:Src/main.c **** +1087:Src/main.c **** /* USER CODE END ADC3_Init 1 */ +1088:Src/main.c **** +1089:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1090:Src/main.c **** */ +1091:Src/main.c **** hadc3.Instance = ADC3; +1092:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; +1093:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; +1094:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; +1095:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; +1096:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; +1097:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; +1098:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; +1099:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; +1100:Src/main.c **** hadc3.Init.NbrOfConversion = 1; +1101:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; +1102:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; +1103:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) +1104:Src/main.c **** { +1105:Src/main.c **** Error_Handler(); +1106:Src/main.c **** } +1107:Src/main.c **** +1108:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1109:Src/main.c **** */ +1110:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; +1111:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; +1112:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; +1113:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) +1114:Src/main.c **** { +1115:Src/main.c **** Error_Handler(); +1116:Src/main.c **** } +1117:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ +1118:Src/main.c **** +1119:Src/main.c **** /* USER CODE END ADC3_Init 2 */ +1120:Src/main.c **** +1121:Src/main.c **** } +1122:Src/main.c **** +1123:Src/main.c **** /** +1124:Src/main.c **** * @brief SDMMC1 Initialization Function +1125:Src/main.c **** * @param None +1126:Src/main.c **** * @retval None +1127:Src/main.c **** */ +1128:Src/main.c **** static void MX_SDMMC1_SD_Init(void) +1129:Src/main.c **** { + 95 .loc 1 1129 1 is_stmt 1 view -0 + ARM GAS /tmp/ccwR4KB7.s page 59 -1074:Src/main.c **** * @brief SDMMC1 Initialization Function -1075:Src/main.c **** * @param None -1076:Src/main.c **** * @retval None -1077:Src/main.c **** */ -1078:Src/main.c **** static void MX_SDMMC1_SD_Init(void) -1079:Src/main.c **** { - 95 .loc 1 1079 1 is_stmt 1 view -0 96 .cfi_startproc 97 @ args = 0, pretend = 0, frame = 0 98 @ frame_needed = 0, uses_anonymous_args = 0 99 @ link register save eliminated. -1080:Src/main.c **** -1081:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ -1082:Src/main.c **** -1083:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ -1084:Src/main.c **** -1085:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ -1086:Src/main.c **** -1087:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ -1088:Src/main.c **** hsd1.Instance = SDMMC1; - 100 .loc 1 1088 3 view .LVU21 - 101 .loc 1 1088 17 is_stmt 0 view .LVU22 +1130:Src/main.c **** +1131:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ +1132:Src/main.c **** +1133:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ +1134:Src/main.c **** +1135:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ +1136:Src/main.c **** +1137:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ +1138:Src/main.c **** hsd1.Instance = SDMMC1; + 100 .loc 1 1138 3 view .LVU21 + 101 .loc 1 1138 17 is_stmt 0 view .LVU22 102 0000 064B ldr r3, .L6 103 0002 074A ldr r2, .L6+4 104 0004 1A60 str r2, [r3] -1089:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - 105 .loc 1 1089 3 is_stmt 1 view .LVU23 - 106 .loc 1 1089 23 is_stmt 0 view .LVU24 +1139:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + 105 .loc 1 1139 3 is_stmt 1 view .LVU23 + 106 .loc 1 1139 23 is_stmt 0 view .LVU24 107 0006 0022 movs r2, #0 108 0008 5A60 str r2, [r3, #4] -1090:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; - 109 .loc 1 1090 3 is_stmt 1 view .LVU25 - 110 .loc 1 1090 25 is_stmt 0 view .LVU26 +1140:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + 109 .loc 1 1140 3 is_stmt 1 view .LVU25 + 110 .loc 1 1140 25 is_stmt 0 view .LVU26 111 000a 9A60 str r2, [r3, #8] -1091:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - 112 .loc 1 1091 3 is_stmt 1 view .LVU27 - 113 .loc 1 1091 28 is_stmt 0 view .LVU28 +1141:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + 112 .loc 1 1141 3 is_stmt 1 view .LVU27 + 113 .loc 1 1141 28 is_stmt 0 view .LVU28 114 000c DA60 str r2, [r3, #12] -1092:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; - 115 .loc 1 1092 3 is_stmt 1 view .LVU29 - 116 .loc 1 1092 21 is_stmt 0 view .LVU30 +1142:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; + 115 .loc 1 1142 3 is_stmt 1 view .LVU29 + 116 .loc 1 1142 21 is_stmt 0 view .LVU30 117 000e 4FF40061 mov r1, #2048 118 0012 1961 str r1, [r3, #16] -1093:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - 119 .loc 1 1093 3 is_stmt 1 view .LVU31 - 120 .loc 1 1093 33 is_stmt 0 view .LVU32 +1143:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + 119 .loc 1 1143 3 is_stmt 1 view .LVU31 + 120 .loc 1 1143 33 is_stmt 0 view .LVU32 121 0014 5A61 str r2, [r3, #20] -1094:Src/main.c **** hsd1.Init.ClockDiv = 20; - 122 .loc 1 1094 3 is_stmt 1 view .LVU33 - 123 .loc 1 1094 22 is_stmt 0 view .LVU34 +1144:Src/main.c **** hsd1.Init.ClockDiv = 20; + 122 .loc 1 1144 3 is_stmt 1 view .LVU33 + 123 .loc 1 1144 22 is_stmt 0 view .LVU34 124 0016 1422 movs r2, #20 125 0018 9A61 str r2, [r3, #24] -1095:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ -1096:Src/main.c **** -1097:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ -1098:Src/main.c **** -1099:Src/main.c **** } - ARM GAS /tmp/ccYgfTud.s page 59 - - - 126 .loc 1 1099 1 view .LVU35 +1145:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ +1146:Src/main.c **** +1147:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ +1148:Src/main.c **** +1149:Src/main.c **** } + 126 .loc 1 1149 1 view .LVU35 127 001a 7047 bx lr 128 .L7: 129 .align 2 130 .L6: 131 001c 00000000 .word hsd1 132 0020 002C0140 .word 1073818624 + ARM GAS /tmp/ccwR4KB7.s page 60 + + 133 .cfi_endproc 134 .LFE1190: 136 .section .text.MX_DMA_Init,"ax",%progbits @@ -3497,777 +3550,777 @@ ARM GAS /tmp/ccYgfTud.s page 1 140 .thumb_func 142 MX_DMA_Init: 143 .LFB1205: -1100:Src/main.c **** -1101:Src/main.c **** /** -1102:Src/main.c **** * @brief SPI2 Initialization Function -1103:Src/main.c **** * @param None -1104:Src/main.c **** * @retval None -1105:Src/main.c **** */ -1106:Src/main.c **** static void MX_SPI2_Init(void) -1107:Src/main.c **** { -1108:Src/main.c **** -1109:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ -1110:Src/main.c **** -1111:Src/main.c **** /* USER CODE END SPI2_Init 0 */ -1112:Src/main.c **** -1113:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1114:Src/main.c **** -1115:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1116:Src/main.c **** -1117:Src/main.c **** /* Peripheral clock enable */ -1118:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); -1119:Src/main.c **** -1120:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); -1121:Src/main.c **** /**SPI2 GPIO Configuration -1122:Src/main.c **** PB13 ------> SPI2_SCK -1123:Src/main.c **** PB14 ------> SPI2_MISO -1124:Src/main.c **** PB15 ------> SPI2_MOSI -1125:Src/main.c **** */ -1126:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1127:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1128:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1129:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1130:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1131:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1132:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1133:Src/main.c **** -1134:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14; -1135:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1136:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1137:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1138:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1139:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1140:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - ARM GAS /tmp/ccYgfTud.s page 60 - - -1141:Src/main.c **** -1142:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; -1143:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1144:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1145:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1146:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1147:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1148:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1149:Src/main.c **** -1150:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ -1151:Src/main.c **** -1152:Src/main.c **** /* USER CODE END SPI2_Init 1 */ -1153:Src/main.c **** /* SPI2 parameter configuration*/ -1154:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1155:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1156:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1157:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; -1158:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1159:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1160:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; -1161:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1162:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1163:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1164:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); -1165:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); -1166:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); -1167:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ -1168:Src/main.c **** -1169:Src/main.c **** /* USER CODE END SPI2_Init 2 */ -1170:Src/main.c **** -1171:Src/main.c **** } -1172:Src/main.c **** -1173:Src/main.c **** /** -1174:Src/main.c **** * @brief SPI4 Initialization Function -1175:Src/main.c **** * @param None -1176:Src/main.c **** * @retval None -1177:Src/main.c **** */ -1178:Src/main.c **** static void MX_SPI4_Init(void) -1179:Src/main.c **** { -1180:Src/main.c **** -1181:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ -1182:Src/main.c **** -1183:Src/main.c **** /* USER CODE END SPI4_Init 0 */ -1184:Src/main.c **** -1185:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1186:Src/main.c **** -1187:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1188:Src/main.c **** -1189:Src/main.c **** /* Peripheral clock enable */ -1190:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); +1150:Src/main.c **** +1151:Src/main.c **** /** +1152:Src/main.c **** * @brief SPI2 Initialization Function +1153:Src/main.c **** * @param None +1154:Src/main.c **** * @retval None +1155:Src/main.c **** */ +1156:Src/main.c **** static void MX_SPI2_Init(void) +1157:Src/main.c **** { +1158:Src/main.c **** +1159:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ +1160:Src/main.c **** +1161:Src/main.c **** /* USER CODE END SPI2_Init 0 */ +1162:Src/main.c **** +1163:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1164:Src/main.c **** +1165:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1166:Src/main.c **** +1167:Src/main.c **** /* Peripheral clock enable */ +1168:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); +1169:Src/main.c **** +1170:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); +1171:Src/main.c **** /**SPI2 GPIO Configuration +1172:Src/main.c **** PB13 ------> SPI2_SCK +1173:Src/main.c **** PB14 ------> SPI2_MISO +1174:Src/main.c **** PB15 ------> SPI2_MOSI +1175:Src/main.c **** */ +1176:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1177:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1178:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1179:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1180:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1181:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1182:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1183:Src/main.c **** +1184:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14; +1185:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1186:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1187:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1188:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1189:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1190:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1191:Src/main.c **** -1192:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); -1193:Src/main.c **** /**SPI4 GPIO Configuration -1194:Src/main.c **** PE12 ------> SPI4_SCK -1195:Src/main.c **** PE13 ------> SPI4_MISO -1196:Src/main.c **** */ -1197:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; - ARM GAS /tmp/ccYgfTud.s page 61 +1192:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; +1193:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1194:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1195:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1196:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1197:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + ARM GAS /tmp/ccwR4KB7.s page 61 -1198:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1199:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1200:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1201:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1202:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1203:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1204:Src/main.c **** -1205:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1206:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1207:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1208:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1209:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1210:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1211:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1212:Src/main.c **** -1213:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ -1214:Src/main.c **** -1215:Src/main.c **** /* USER CODE END SPI4_Init 1 */ -1216:Src/main.c **** /* SPI4 parameter configuration*/ -1217:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1218:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1219:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1220:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1221:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1222:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1223:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1224:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1225:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1226:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1227:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); -1228:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); -1229:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); -1230:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ -1231:Src/main.c **** -1232:Src/main.c **** /* USER CODE END SPI4_Init 2 */ -1233:Src/main.c **** -1234:Src/main.c **** } -1235:Src/main.c **** -1236:Src/main.c **** /** -1237:Src/main.c **** * @brief SPI5 Initialization Function -1238:Src/main.c **** * @param None -1239:Src/main.c **** * @retval None -1240:Src/main.c **** */ -1241:Src/main.c **** static void MX_SPI5_Init(void) -1242:Src/main.c **** { -1243:Src/main.c **** -1244:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ -1245:Src/main.c **** -1246:Src/main.c **** /* USER CODE END SPI5_Init 0 */ -1247:Src/main.c **** -1248:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1249:Src/main.c **** -1250:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1251:Src/main.c **** -1252:Src/main.c **** /* Peripheral clock enable */ -1253:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); +1198:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1199:Src/main.c **** +1200:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ +1201:Src/main.c **** +1202:Src/main.c **** /* USER CODE END SPI2_Init 1 */ +1203:Src/main.c **** /* SPI2 parameter configuration*/ +1204:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1205:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1206:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1207:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; +1208:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1209:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1210:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; +1211:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1212:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1213:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1214:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); +1215:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); +1216:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); +1217:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ +1218:Src/main.c **** +1219:Src/main.c **** /* USER CODE END SPI2_Init 2 */ +1220:Src/main.c **** +1221:Src/main.c **** } +1222:Src/main.c **** +1223:Src/main.c **** /** +1224:Src/main.c **** * @brief SPI4 Initialization Function +1225:Src/main.c **** * @param None +1226:Src/main.c **** * @retval None +1227:Src/main.c **** */ +1228:Src/main.c **** static void MX_SPI4_Init(void) +1229:Src/main.c **** { +1230:Src/main.c **** +1231:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ +1232:Src/main.c **** +1233:Src/main.c **** /* USER CODE END SPI4_Init 0 */ +1234:Src/main.c **** +1235:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1236:Src/main.c **** +1237:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1238:Src/main.c **** +1239:Src/main.c **** /* Peripheral clock enable */ +1240:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); +1241:Src/main.c **** +1242:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); +1243:Src/main.c **** /**SPI4 GPIO Configuration +1244:Src/main.c **** PE12 ------> SPI4_SCK +1245:Src/main.c **** PE13 ------> SPI4_MISO +1246:Src/main.c **** */ +1247:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; +1248:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1249:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1250:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1251:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1252:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1253:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); 1254:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 62 + ARM GAS /tmp/ccwR4KB7.s page 62 -1255:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); -1256:Src/main.c **** /**SPI5 GPIO Configuration -1257:Src/main.c **** PF7 ------> SPI5_SCK -1258:Src/main.c **** PF8 ------> SPI5_MISO -1259:Src/main.c **** */ -1260:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1261:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1262:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1263:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1264:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1265:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1266:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1267:Src/main.c **** -1268:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; -1269:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1270:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1271:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1272:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1273:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1274:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1275:Src/main.c **** -1276:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ -1277:Src/main.c **** -1278:Src/main.c **** /* USER CODE END SPI5_Init 1 */ -1279:Src/main.c **** /* SPI5 parameter configuration*/ -1280:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1281:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1282:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1283:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1284:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1285:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1286:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1287:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1288:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1289:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1290:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); -1291:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); -1292:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); -1293:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ -1294:Src/main.c **** -1295:Src/main.c **** /* USER CODE END SPI5_Init 2 */ -1296:Src/main.c **** -1297:Src/main.c **** } -1298:Src/main.c **** -1299:Src/main.c **** /** -1300:Src/main.c **** * @brief SPI6 Initialization Function -1301:Src/main.c **** * @param None -1302:Src/main.c **** * @retval None -1303:Src/main.c **** */ -1304:Src/main.c **** static void MX_SPI6_Init(void) -1305:Src/main.c **** { -1306:Src/main.c **** -1307:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ -1308:Src/main.c **** -1309:Src/main.c **** /* USER CODE END SPI6_Init 0 */ -1310:Src/main.c **** -1311:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; - ARM GAS /tmp/ccYgfTud.s page 63 +1255:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1256:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1257:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1258:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1259:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1260:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1261:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1262:Src/main.c **** +1263:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ +1264:Src/main.c **** +1265:Src/main.c **** /* USER CODE END SPI4_Init 1 */ +1266:Src/main.c **** /* SPI4 parameter configuration*/ +1267:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1268:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1269:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1270:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1271:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1272:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1273:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1274:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1275:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1276:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1277:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); +1278:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); +1279:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); +1280:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ +1281:Src/main.c **** +1282:Src/main.c **** /* USER CODE END SPI4_Init 2 */ +1283:Src/main.c **** +1284:Src/main.c **** } +1285:Src/main.c **** +1286:Src/main.c **** /** +1287:Src/main.c **** * @brief SPI5 Initialization Function +1288:Src/main.c **** * @param None +1289:Src/main.c **** * @retval None +1290:Src/main.c **** */ +1291:Src/main.c **** static void MX_SPI5_Init(void) +1292:Src/main.c **** { +1293:Src/main.c **** +1294:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1295:Src/main.c **** +1296:Src/main.c **** /* USER CODE END SPI5_Init 0 */ +1297:Src/main.c **** +1298:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1299:Src/main.c **** +1300:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1301:Src/main.c **** +1302:Src/main.c **** /* Peripheral clock enable */ +1303:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); +1304:Src/main.c **** +1305:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); +1306:Src/main.c **** /**SPI5 GPIO Configuration +1307:Src/main.c **** PF7 ------> SPI5_SCK +1308:Src/main.c **** PF8 ------> SPI5_MISO +1309:Src/main.c **** */ +1310:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1311:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + ARM GAS /tmp/ccwR4KB7.s page 63 -1312:Src/main.c **** -1313:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1314:Src/main.c **** -1315:Src/main.c **** /* Peripheral clock enable */ -1316:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); +1312:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1313:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1314:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1315:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1316:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); 1317:Src/main.c **** -1318:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1319:Src/main.c **** /**SPI6 GPIO Configuration -1320:Src/main.c **** PA5 ------> SPI6_SCK -1321:Src/main.c **** PA7 ------> SPI6_MOSI -1322:Src/main.c **** */ -1323:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; -1324:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1325:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1326:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1327:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1328:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1329:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1330:Src/main.c **** -1331:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1332:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1333:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1334:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1335:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1336:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1337:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1338:Src/main.c **** -1339:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ -1340:Src/main.c **** -1341:Src/main.c **** /* USER CODE END SPI6_Init 1 */ -1342:Src/main.c **** /* SPI6 parameter configuration*/ -1343:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1344:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1345:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1346:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1347:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1348:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1349:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1350:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1351:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1352:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1353:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); -1354:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); -1355:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); -1356:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ -1357:Src/main.c **** -1358:Src/main.c **** /* USER CODE END SPI6_Init 2 */ -1359:Src/main.c **** -1360:Src/main.c **** } -1361:Src/main.c **** -1362:Src/main.c **** /** -1363:Src/main.c **** * @brief TIM2 Initialization Function -1364:Src/main.c **** * @param None -1365:Src/main.c **** * @retval None -1366:Src/main.c **** */ -1367:Src/main.c **** static void MX_TIM2_Init(void) -1368:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 64 +1318:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; +1319:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1320:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1321:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1322:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1323:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1324:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1325:Src/main.c **** +1326:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ +1327:Src/main.c **** +1328:Src/main.c **** /* USER CODE END SPI5_Init 1 */ +1329:Src/main.c **** /* SPI5 parameter configuration*/ +1330:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1331:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1332:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1333:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1334:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1335:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1336:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1337:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1338:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1339:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1340:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); +1341:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); +1342:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); +1343:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ +1344:Src/main.c **** +1345:Src/main.c **** /* USER CODE END SPI5_Init 2 */ +1346:Src/main.c **** +1347:Src/main.c **** } +1348:Src/main.c **** +1349:Src/main.c **** /** +1350:Src/main.c **** * @brief SPI6 Initialization Function +1351:Src/main.c **** * @param None +1352:Src/main.c **** * @retval None +1353:Src/main.c **** */ +1354:Src/main.c **** static void MX_SPI6_Init(void) +1355:Src/main.c **** { +1356:Src/main.c **** +1357:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ +1358:Src/main.c **** +1359:Src/main.c **** /* USER CODE END SPI6_Init 0 */ +1360:Src/main.c **** +1361:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1362:Src/main.c **** +1363:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1364:Src/main.c **** +1365:Src/main.c **** /* Peripheral clock enable */ +1366:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); +1367:Src/main.c **** +1368:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); + ARM GAS /tmp/ccwR4KB7.s page 64 -1369:Src/main.c **** -1370:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ -1371:Src/main.c **** -1372:Src/main.c **** /* USER CODE END TIM2_Init 0 */ -1373:Src/main.c **** -1374:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1375:Src/main.c **** -1376:Src/main.c **** /* Peripheral clock enable */ -1377:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); -1378:Src/main.c **** -1379:Src/main.c **** /* TIM2 interrupt Init */ -1380:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1381:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); -1382:Src/main.c **** -1383:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ -1384:Src/main.c **** -1385:Src/main.c **** /* USER CODE END TIM2_Init 1 */ -1386:Src/main.c **** TIM_InitStruct.Prescaler = 1000; -1387:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1388:Src/main.c **** TIM_InitStruct.Autoreload = 840000; -1389:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1390:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); -1391:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); -1392:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); -1393:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); -1394:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); -1395:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ -1396:Src/main.c **** -1397:Src/main.c **** /* USER CODE END TIM2_Init 2 */ -1398:Src/main.c **** -1399:Src/main.c **** } -1400:Src/main.c **** -1401:Src/main.c **** /** -1402:Src/main.c **** * @brief TIM4 Initialization Function -1403:Src/main.c **** * @param None -1404:Src/main.c **** * @retval None -1405:Src/main.c **** */ -1406:Src/main.c **** static void MX_TIM4_Init(void) -1407:Src/main.c **** { -1408:Src/main.c **** -1409:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ -1410:Src/main.c **** -1411:Src/main.c **** /* USER CODE END TIM4_Init 0 */ -1412:Src/main.c **** -1413:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1414:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1415:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1416:Src/main.c **** -1417:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ -1418:Src/main.c **** -1419:Src/main.c **** /* USER CODE END TIM4_Init 1 */ -1420:Src/main.c **** htim4.Instance = TIM4; -1421:Src/main.c **** htim4.Init.Prescaler = 0; -1422:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; -1423:Src/main.c **** htim4.Init.Period = 45; -1424:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1425:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - ARM GAS /tmp/ccYgfTud.s page 65 +1369:Src/main.c **** /**SPI6 GPIO Configuration +1370:Src/main.c **** PA5 ------> SPI6_SCK +1371:Src/main.c **** PA7 ------> SPI6_MOSI +1372:Src/main.c **** */ +1373:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; +1374:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1375:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1376:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1377:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1378:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1379:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1380:Src/main.c **** +1381:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1382:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1383:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1384:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1385:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1386:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1387:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1388:Src/main.c **** +1389:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ +1390:Src/main.c **** +1391:Src/main.c **** /* USER CODE END SPI6_Init 1 */ +1392:Src/main.c **** /* SPI6 parameter configuration*/ +1393:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1394:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1395:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1396:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1397:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1398:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1399:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1400:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1401:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1402:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1403:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); +1404:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); +1405:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); +1406:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ +1407:Src/main.c **** +1408:Src/main.c **** /* USER CODE END SPI6_Init 2 */ +1409:Src/main.c **** +1410:Src/main.c **** } +1411:Src/main.c **** +1412:Src/main.c **** /** +1413:Src/main.c **** * @brief TIM2 Initialization Function +1414:Src/main.c **** * @param None +1415:Src/main.c **** * @retval None +1416:Src/main.c **** */ +1417:Src/main.c **** static void MX_TIM2_Init(void) +1418:Src/main.c **** { +1419:Src/main.c **** +1420:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ +1421:Src/main.c **** +1422:Src/main.c **** /* USER CODE END TIM2_Init 0 */ +1423:Src/main.c **** +1424:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1425:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 65 -1426:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) -1427:Src/main.c **** { -1428:Src/main.c **** Error_Handler(); -1429:Src/main.c **** } -1430:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1431:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) -1432:Src/main.c **** { -1433:Src/main.c **** Error_Handler(); -1434:Src/main.c **** } -1435:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) -1436:Src/main.c **** { -1437:Src/main.c **** Error_Handler(); -1438:Src/main.c **** } -1439:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1440:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1441:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) -1442:Src/main.c **** { -1443:Src/main.c **** Error_Handler(); -1444:Src/main.c **** } -1445:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1446:Src/main.c **** sConfigOC.Pulse = 22; -1447:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1448:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1449:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) -1450:Src/main.c **** { -1451:Src/main.c **** Error_Handler(); -1452:Src/main.c **** } -1453:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ -1454:Src/main.c **** -1455:Src/main.c **** /* USER CODE END TIM4_Init 2 */ -1456:Src/main.c **** HAL_TIM_MspPostInit(&htim4); -1457:Src/main.c **** -1458:Src/main.c **** } -1459:Src/main.c **** -1460:Src/main.c **** /** -1461:Src/main.c **** * @brief TIM5 Initialization Function -1462:Src/main.c **** * @param None -1463:Src/main.c **** * @retval None -1464:Src/main.c **** */ -1465:Src/main.c **** static void MX_TIM5_Init(void) -1466:Src/main.c **** { -1467:Src/main.c **** -1468:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ -1469:Src/main.c **** -1470:Src/main.c **** /* USER CODE END TIM5_Init 0 */ -1471:Src/main.c **** -1472:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1473:Src/main.c **** -1474:Src/main.c **** /* Peripheral clock enable */ -1475:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); -1476:Src/main.c **** -1477:Src/main.c **** /* TIM5 interrupt Init */ -1478:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1479:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); -1480:Src/main.c **** -1481:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ -1482:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 66 +1426:Src/main.c **** /* Peripheral clock enable */ +1427:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); +1428:Src/main.c **** +1429:Src/main.c **** /* TIM2 interrupt Init */ +1430:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1431:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); +1432:Src/main.c **** +1433:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ +1434:Src/main.c **** +1435:Src/main.c **** /* USER CODE END TIM2_Init 1 */ +1436:Src/main.c **** TIM_InitStruct.Prescaler = 1000; +1437:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1438:Src/main.c **** TIM_InitStruct.Autoreload = 840000; +1439:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1440:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); +1441:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); +1442:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); +1443:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); +1444:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); +1445:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ +1446:Src/main.c **** +1447:Src/main.c **** /* USER CODE END TIM2_Init 2 */ +1448:Src/main.c **** +1449:Src/main.c **** } +1450:Src/main.c **** +1451:Src/main.c **** /** +1452:Src/main.c **** * @brief TIM4 Initialization Function +1453:Src/main.c **** * @param None +1454:Src/main.c **** * @retval None +1455:Src/main.c **** */ +1456:Src/main.c **** static void MX_TIM4_Init(void) +1457:Src/main.c **** { +1458:Src/main.c **** +1459:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ +1460:Src/main.c **** +1461:Src/main.c **** /* USER CODE END TIM4_Init 0 */ +1462:Src/main.c **** +1463:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1464:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1465:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1466:Src/main.c **** +1467:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ +1468:Src/main.c **** +1469:Src/main.c **** /* USER CODE END TIM4_Init 1 */ +1470:Src/main.c **** htim4.Instance = TIM4; +1471:Src/main.c **** htim4.Init.Prescaler = 0; +1472:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; +1473:Src/main.c **** htim4.Init.Period = 45; +1474:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1475:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1476:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) +1477:Src/main.c **** { +1478:Src/main.c **** Error_Handler(); +1479:Src/main.c **** } +1480:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1481:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) +1482:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 66 -1483:Src/main.c **** /* USER CODE END TIM5_Init 1 */ -1484:Src/main.c **** TIM_InitStruct.Prescaler = 10000; -1485:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1486:Src/main.c **** TIM_InitStruct.Autoreload = 560; -1487:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1488:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); -1489:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); -1490:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); -1491:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); -1492:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); -1493:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ -1494:Src/main.c **** -1495:Src/main.c **** /* USER CODE END TIM5_Init 2 */ -1496:Src/main.c **** -1497:Src/main.c **** } -1498:Src/main.c **** -1499:Src/main.c **** /** -1500:Src/main.c **** * @brief TIM6 Initialization Function -1501:Src/main.c **** * @param None -1502:Src/main.c **** * @retval None -1503:Src/main.c **** */ -1504:Src/main.c **** static void MX_TIM6_Init(void) -1505:Src/main.c **** { -1506:Src/main.c **** -1507:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ -1508:Src/main.c **** -1509:Src/main.c **** /* USER CODE END TIM6_Init 0 */ -1510:Src/main.c **** -1511:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1512:Src/main.c **** -1513:Src/main.c **** /* Peripheral clock enable */ -1514:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); -1515:Src/main.c **** -1516:Src/main.c **** /* TIM6 interrupt Init */ -1517:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1518:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); +1483:Src/main.c **** Error_Handler(); +1484:Src/main.c **** } +1485:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) +1486:Src/main.c **** { +1487:Src/main.c **** Error_Handler(); +1488:Src/main.c **** } +1489:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1490:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1491:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) +1492:Src/main.c **** { +1493:Src/main.c **** Error_Handler(); +1494:Src/main.c **** } +1495:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1496:Src/main.c **** sConfigOC.Pulse = 22; +1497:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1498:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1499:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) +1500:Src/main.c **** { +1501:Src/main.c **** Error_Handler(); +1502:Src/main.c **** } +1503:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ +1504:Src/main.c **** +1505:Src/main.c **** /* USER CODE END TIM4_Init 2 */ +1506:Src/main.c **** HAL_TIM_MspPostInit(&htim4); +1507:Src/main.c **** +1508:Src/main.c **** } +1509:Src/main.c **** +1510:Src/main.c **** /** +1511:Src/main.c **** * @brief TIM5 Initialization Function +1512:Src/main.c **** * @param None +1513:Src/main.c **** * @retval None +1514:Src/main.c **** */ +1515:Src/main.c **** static void MX_TIM5_Init(void) +1516:Src/main.c **** { +1517:Src/main.c **** +1518:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ 1519:Src/main.c **** -1520:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ +1520:Src/main.c **** /* USER CODE END TIM5_Init 0 */ 1521:Src/main.c **** -1522:Src/main.c **** /* USER CODE END TIM6_Init 1 */ -1523:Src/main.c **** TIM_InitStruct.Prescaler = 45999; -1524:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1525:Src/main.c **** TIM_InitStruct.Autoreload = 19; -1526:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); -1527:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); -1528:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); -1529:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); -1530:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ -1531:Src/main.c **** -1532:Src/main.c **** /* USER CODE END TIM6_Init 2 */ -1533:Src/main.c **** -1534:Src/main.c **** } -1535:Src/main.c **** -1536:Src/main.c **** /** -1537:Src/main.c **** * @brief TIM7 Initialization Function -1538:Src/main.c **** * @param None -1539:Src/main.c **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 67 +1522:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1523:Src/main.c **** +1524:Src/main.c **** /* Peripheral clock enable */ +1525:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); +1526:Src/main.c **** +1527:Src/main.c **** /* TIM5 interrupt Init */ +1528:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1529:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); +1530:Src/main.c **** +1531:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ +1532:Src/main.c **** +1533:Src/main.c **** /* USER CODE END TIM5_Init 1 */ +1534:Src/main.c **** TIM_InitStruct.Prescaler = 10000; +1535:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1536:Src/main.c **** TIM_InitStruct.Autoreload = 560; +1537:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1538:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); +1539:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); + ARM GAS /tmp/ccwR4KB7.s page 67 -1540:Src/main.c **** */ -1541:Src/main.c **** static void MX_TIM7_Init(void) -1542:Src/main.c **** { -1543:Src/main.c **** -1544:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ -1545:Src/main.c **** -1546:Src/main.c **** /* USER CODE END TIM7_Init 0 */ -1547:Src/main.c **** -1548:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1549:Src/main.c **** -1550:Src/main.c **** /* Peripheral clock enable */ -1551:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); -1552:Src/main.c **** -1553:Src/main.c **** /* TIM7 interrupt Init */ -1554:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1555:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); +1540:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); +1541:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); +1542:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); +1543:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ +1544:Src/main.c **** +1545:Src/main.c **** /* USER CODE END TIM5_Init 2 */ +1546:Src/main.c **** +1547:Src/main.c **** } +1548:Src/main.c **** +1549:Src/main.c **** /** +1550:Src/main.c **** * @brief TIM6 Initialization Function +1551:Src/main.c **** * @param None +1552:Src/main.c **** * @retval None +1553:Src/main.c **** */ +1554:Src/main.c **** static void MX_TIM6_Init(void) +1555:Src/main.c **** { 1556:Src/main.c **** -1557:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1557:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ 1558:Src/main.c **** -1559:Src/main.c **** /* USER CODE END TIM7_Init 1 */ -1560:Src/main.c **** TIM_InitStruct.Prescaler = 919; -1561:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1562:Src/main.c **** TIM_InitStruct.Autoreload = 99; -1563:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); -1564:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); -1565:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); -1566:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); -1567:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ -1568:Src/main.c **** -1569:Src/main.c **** /* USER CODE END TIM7_Init 2 */ -1570:Src/main.c **** -1571:Src/main.c **** } -1572:Src/main.c **** -1573:Src/main.c **** /** -1574:Src/main.c **** * @brief TIM8 Initialization Function -1575:Src/main.c **** * @param None -1576:Src/main.c **** * @retval None -1577:Src/main.c **** */ -1578:Src/main.c **** static void MX_TIM8_Init(void) -1579:Src/main.c **** { -1580:Src/main.c **** -1581:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ -1582:Src/main.c **** -1583:Src/main.c **** /* USER CODE END TIM8_Init 0 */ -1584:Src/main.c **** -1585:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1586:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1587:Src/main.c **** -1588:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ -1589:Src/main.c **** -1590:Src/main.c **** /* USER CODE END TIM8_Init 1 */ -1591:Src/main.c **** htim8.Instance = TIM8; -1592:Src/main.c **** htim8.Init.Prescaler = 0; -1593:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; -1594:Src/main.c **** htim8.Init.Period = 91; -1595:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1596:Src/main.c **** htim8.Init.RepetitionCounter = 0; - ARM GAS /tmp/ccYgfTud.s page 68 +1559:Src/main.c **** /* USER CODE END TIM6_Init 0 */ +1560:Src/main.c **** +1561:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1562:Src/main.c **** +1563:Src/main.c **** /* Peripheral clock enable */ +1564:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); +1565:Src/main.c **** +1566:Src/main.c **** /* TIM6 interrupt Init */ +1567:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1568:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); +1569:Src/main.c **** +1570:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ +1571:Src/main.c **** +1572:Src/main.c **** /* USER CODE END TIM6_Init 1 */ +1573:Src/main.c **** TIM_InitStruct.Prescaler = 45999; +1574:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1575:Src/main.c **** TIM_InitStruct.Autoreload = 19; +1576:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); +1577:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); +1578:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); +1579:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); +1580:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ +1581:Src/main.c **** +1582:Src/main.c **** /* USER CODE END TIM6_Init 2 */ +1583:Src/main.c **** +1584:Src/main.c **** } +1585:Src/main.c **** +1586:Src/main.c **** /** +1587:Src/main.c **** * @brief TIM7 Initialization Function +1588:Src/main.c **** * @param None +1589:Src/main.c **** * @retval None +1590:Src/main.c **** */ +1591:Src/main.c **** static void MX_TIM7_Init(void) +1592:Src/main.c **** { +1593:Src/main.c **** +1594:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ +1595:Src/main.c **** +1596:Src/main.c **** /* USER CODE END TIM7_Init 0 */ + ARM GAS /tmp/ccwR4KB7.s page 68 -1597:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1598:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) -1599:Src/main.c **** { -1600:Src/main.c **** Error_Handler(); -1601:Src/main.c **** } -1602:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1603:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) -1604:Src/main.c **** { -1605:Src/main.c **** Error_Handler(); -1606:Src/main.c **** } -1607:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1608:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; -1609:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1610:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) -1611:Src/main.c **** { -1612:Src/main.c **** Error_Handler(); -1613:Src/main.c **** } -1614:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ -1615:Src/main.c **** -1616:Src/main.c **** /* USER CODE END TIM8_Init 2 */ -1617:Src/main.c **** -1618:Src/main.c **** } -1619:Src/main.c **** -1620:Src/main.c **** /** -1621:Src/main.c **** * @brief TIM10 Initialization Function -1622:Src/main.c **** * @param None -1623:Src/main.c **** * @retval None -1624:Src/main.c **** */ -1625:Src/main.c **** static void MX_TIM10_Init(void) -1626:Src/main.c **** { -1627:Src/main.c **** -1628:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ -1629:Src/main.c **** -1630:Src/main.c **** /* USER CODE END TIM10_Init 0 */ -1631:Src/main.c **** -1632:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ -1633:Src/main.c **** -1634:Src/main.c **** /* USER CODE END TIM10_Init 1 */ -1635:Src/main.c **** htim10.Instance = TIM10; -1636:Src/main.c **** htim10.Init.Prescaler = 183; -1637:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; -1638:Src/main.c **** htim10.Init.Period = 9; -1639:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1640:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1641:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) -1642:Src/main.c **** { -1643:Src/main.c **** Error_Handler(); -1644:Src/main.c **** } -1645:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ -1646:Src/main.c **** -1647:Src/main.c **** /* USER CODE END TIM10_Init 2 */ -1648:Src/main.c **** -1649:Src/main.c **** } -1650:Src/main.c **** -1651:Src/main.c **** /** -1652:Src/main.c **** * @brief TIM11 Initialization Function -1653:Src/main.c **** * @param None - ARM GAS /tmp/ccYgfTud.s page 69 +1597:Src/main.c **** +1598:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1599:Src/main.c **** +1600:Src/main.c **** /* Peripheral clock enable */ +1601:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); +1602:Src/main.c **** +1603:Src/main.c **** /* TIM7 interrupt Init */ +1604:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1605:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); +1606:Src/main.c **** +1607:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1608:Src/main.c **** +1609:Src/main.c **** /* USER CODE END TIM7_Init 1 */ +1610:Src/main.c **** TIM_InitStruct.Prescaler = 919; +1611:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1612:Src/main.c **** TIM_InitStruct.Autoreload = 99; +1613:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); +1614:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); +1615:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); +1616:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); +1617:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ +1618:Src/main.c **** +1619:Src/main.c **** /* USER CODE END TIM7_Init 2 */ +1620:Src/main.c **** +1621:Src/main.c **** } +1622:Src/main.c **** +1623:Src/main.c **** /** +1624:Src/main.c **** * @brief TIM8 Initialization Function +1625:Src/main.c **** * @param None +1626:Src/main.c **** * @retval None +1627:Src/main.c **** */ +1628:Src/main.c **** static void MX_TIM8_Init(void) +1629:Src/main.c **** { +1630:Src/main.c **** +1631:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ +1632:Src/main.c **** +1633:Src/main.c **** /* USER CODE END TIM8_Init 0 */ +1634:Src/main.c **** +1635:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1636:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1637:Src/main.c **** +1638:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ +1639:Src/main.c **** +1640:Src/main.c **** /* USER CODE END TIM8_Init 1 */ +1641:Src/main.c **** htim8.Instance = TIM8; +1642:Src/main.c **** htim8.Init.Prescaler = 0; +1643:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; +1644:Src/main.c **** htim8.Init.Period = 91; +1645:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1646:Src/main.c **** htim8.Init.RepetitionCounter = 0; +1647:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1648:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) +1649:Src/main.c **** { +1650:Src/main.c **** Error_Handler(); +1651:Src/main.c **** } +1652:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1653:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + ARM GAS /tmp/ccwR4KB7.s page 69 -1654:Src/main.c **** * @retval None -1655:Src/main.c **** */ -1656:Src/main.c **** static void MX_TIM11_Init(void) -1657:Src/main.c **** { -1658:Src/main.c **** -1659:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ -1660:Src/main.c **** -1661:Src/main.c **** /* USER CODE END TIM11_Init 0 */ -1662:Src/main.c **** -1663:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1664:Src/main.c **** -1665:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ -1666:Src/main.c **** -1667:Src/main.c **** /* USER CODE END TIM11_Init 1 */ -1668:Src/main.c **** htim11.Instance = TIM11; -1669:Src/main.c **** htim11.Init.Prescaler = 1; -1670:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; -1671:Src/main.c **** htim11.Init.Period = 91; -1672:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1673:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; -1674:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) -1675:Src/main.c **** { -1676:Src/main.c **** Error_Handler(); -1677:Src/main.c **** } -1678:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) -1679:Src/main.c **** { -1680:Src/main.c **** Error_Handler(); -1681:Src/main.c **** } -1682:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1683:Src/main.c **** sConfigOC.Pulse = 91; -1684:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1685:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1686:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1687:Src/main.c **** { -1688:Src/main.c **** Error_Handler(); -1689:Src/main.c **** } -1690:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ -1691:Src/main.c **** -1692:Src/main.c **** /* USER CODE END TIM11_Init 2 */ -1693:Src/main.c **** HAL_TIM_MspPostInit(&htim11); -1694:Src/main.c **** -1695:Src/main.c **** } +1654:Src/main.c **** { +1655:Src/main.c **** Error_Handler(); +1656:Src/main.c **** } +1657:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1658:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; +1659:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1660:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) +1661:Src/main.c **** { +1662:Src/main.c **** Error_Handler(); +1663:Src/main.c **** } +1664:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ +1665:Src/main.c **** +1666:Src/main.c **** /* USER CODE END TIM8_Init 2 */ +1667:Src/main.c **** +1668:Src/main.c **** } +1669:Src/main.c **** +1670:Src/main.c **** /** +1671:Src/main.c **** * @brief TIM10 Initialization Function +1672:Src/main.c **** * @param None +1673:Src/main.c **** * @retval None +1674:Src/main.c **** */ +1675:Src/main.c **** static void MX_TIM10_Init(void) +1676:Src/main.c **** { +1677:Src/main.c **** +1678:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ +1679:Src/main.c **** +1680:Src/main.c **** /* USER CODE END TIM10_Init 0 */ +1681:Src/main.c **** +1682:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ +1683:Src/main.c **** +1684:Src/main.c **** /* USER CODE END TIM10_Init 1 */ +1685:Src/main.c **** htim10.Instance = TIM10; +1686:Src/main.c **** htim10.Init.Prescaler = 183; +1687:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; +1688:Src/main.c **** htim10.Init.Period = 9; +1689:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1690:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1691:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) +1692:Src/main.c **** { +1693:Src/main.c **** Error_Handler(); +1694:Src/main.c **** } +1695:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ 1696:Src/main.c **** -1697:Src/main.c **** /** -1698:Src/main.c **** * @brief UART8 Initialization Function -1699:Src/main.c **** * @param None -1700:Src/main.c **** * @retval None -1701:Src/main.c **** */ -1702:Src/main.c **** static void MX_UART8_Init(void) -1703:Src/main.c **** { -1704:Src/main.c **** -1705:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ -1706:Src/main.c **** -1707:Src/main.c **** /* USER CODE END UART8_Init 0 */ +1697:Src/main.c **** /* USER CODE END TIM10_Init 2 */ +1698:Src/main.c **** +1699:Src/main.c **** } +1700:Src/main.c **** +1701:Src/main.c **** /** +1702:Src/main.c **** * @brief TIM11 Initialization Function +1703:Src/main.c **** * @param None +1704:Src/main.c **** * @retval None +1705:Src/main.c **** */ +1706:Src/main.c **** static void MX_TIM11_Init(void) +1707:Src/main.c **** { 1708:Src/main.c **** -1709:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ +1709:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ 1710:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 70 + ARM GAS /tmp/ccwR4KB7.s page 70 -1711:Src/main.c **** /* USER CODE END UART8_Init 1 */ -1712:Src/main.c **** huart8.Instance = UART8; -1713:Src/main.c **** huart8.Init.BaudRate = 115200; -1714:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; -1715:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; -1716:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; -1717:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; -1718:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; -1719:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; -1720:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; -1721:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; -1722:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) -1723:Src/main.c **** { -1724:Src/main.c **** Error_Handler(); -1725:Src/main.c **** } -1726:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ -1727:Src/main.c **** -1728:Src/main.c **** /* USER CODE END UART8_Init 2 */ -1729:Src/main.c **** -1730:Src/main.c **** } -1731:Src/main.c **** -1732:Src/main.c **** /** -1733:Src/main.c **** * @brief USART1 Initialization Function -1734:Src/main.c **** * @param None -1735:Src/main.c **** * @retval None -1736:Src/main.c **** */ -1737:Src/main.c **** static void MX_USART1_UART_Init(void) -1738:Src/main.c **** { -1739:Src/main.c **** -1740:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ +1711:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1712:Src/main.c **** +1713:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1714:Src/main.c **** +1715:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1716:Src/main.c **** +1717:Src/main.c **** /* USER CODE END TIM11_Init 1 */ +1718:Src/main.c **** htim11.Instance = TIM11; +1719:Src/main.c **** htim11.Init.Prescaler = 1; +1720:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; +1721:Src/main.c **** htim11.Init.Period = 91; +1722:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1723:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; +1724:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) +1725:Src/main.c **** { +1726:Src/main.c **** Error_Handler(); +1727:Src/main.c **** } +1728:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) +1729:Src/main.c **** { +1730:Src/main.c **** Error_Handler(); +1731:Src/main.c **** } +1732:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1733:Src/main.c **** sConfigOC.Pulse = 91; +1734:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1735:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1736:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) +1737:Src/main.c **** { +1738:Src/main.c **** Error_Handler(); +1739:Src/main.c **** } +1740:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ 1741:Src/main.c **** -1742:Src/main.c **** /* USER CODE END USART1_Init 0 */ -1743:Src/main.c **** -1744:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; -1745:Src/main.c **** -1746:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1747:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; -1748:Src/main.c **** -1749:Src/main.c **** /** Initializes the peripherals clock -1750:Src/main.c **** */ -1751:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; -1752:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; -1753:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) -1754:Src/main.c **** { -1755:Src/main.c **** Error_Handler(); -1756:Src/main.c **** } -1757:Src/main.c **** -1758:Src/main.c **** /* Peripheral clock enable */ -1759:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +1742:Src/main.c **** /* USER CODE END TIM11_Init 2 */ +1743:Src/main.c **** HAL_TIM_MspPostInit(&htim11); +1744:Src/main.c **** +1745:Src/main.c **** } +1746:Src/main.c **** +1747:Src/main.c **** /** +1748:Src/main.c **** * @brief UART8 Initialization Function +1749:Src/main.c **** * @param None +1750:Src/main.c **** * @retval None +1751:Src/main.c **** */ +1752:Src/main.c **** static void MX_UART8_Init(void) +1753:Src/main.c **** { +1754:Src/main.c **** +1755:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ +1756:Src/main.c **** +1757:Src/main.c **** /* USER CODE END UART8_Init 0 */ +1758:Src/main.c **** +1759:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ 1760:Src/main.c **** -1761:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1762:Src/main.c **** /**USART1 GPIO Configuration -1763:Src/main.c **** PA9 ------> USART1_TX -1764:Src/main.c **** PA10 ------> USART1_RX -1765:Src/main.c **** */ -1766:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; -1767:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - ARM GAS /tmp/ccYgfTud.s page 71 +1761:Src/main.c **** /* USER CODE END UART8_Init 1 */ +1762:Src/main.c **** huart8.Instance = UART8; +1763:Src/main.c **** huart8.Init.BaudRate = 115200; +1764:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; +1765:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; +1766:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; +1767:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + ARM GAS /tmp/ccwR4KB7.s page 71 -1768:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1769:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1770:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1771:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1772:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1773:Src/main.c **** -1774:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; -1775:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1776:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1777:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1778:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1779:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1780:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1768:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; +1769:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; +1770:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; +1771:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +1772:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) +1773:Src/main.c **** { +1774:Src/main.c **** Error_Handler(); +1775:Src/main.c **** } +1776:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ +1777:Src/main.c **** +1778:Src/main.c **** /* USER CODE END UART8_Init 2 */ +1779:Src/main.c **** +1780:Src/main.c **** } 1781:Src/main.c **** -1782:Src/main.c **** /* USART1 DMA Init */ -1783:Src/main.c **** -1784:Src/main.c **** /* USART1_TX Init */ -1785:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); -1786:Src/main.c **** -1787:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); -1788:Src/main.c **** -1789:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); -1790:Src/main.c **** -1791:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); -1792:Src/main.c **** -1793:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); -1794:Src/main.c **** -1795:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); -1796:Src/main.c **** -1797:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +1782:Src/main.c **** /** +1783:Src/main.c **** * @brief USART1 Initialization Function +1784:Src/main.c **** * @param None +1785:Src/main.c **** * @retval None +1786:Src/main.c **** */ +1787:Src/main.c **** static void MX_USART1_UART_Init(void) +1788:Src/main.c **** { +1789:Src/main.c **** +1790:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ +1791:Src/main.c **** +1792:Src/main.c **** /* USER CODE END USART1_Init 0 */ +1793:Src/main.c **** +1794:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; +1795:Src/main.c **** +1796:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1797:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 1798:Src/main.c **** -1799:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); -1800:Src/main.c **** -1801:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); -1802:Src/main.c **** -1803:Src/main.c **** /* USART1 interrupt Init */ -1804:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1805:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); -1806:Src/main.c **** -1807:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ -1808:Src/main.c **** -1809:Src/main.c **** /* USER CODE END USART1_Init 1 */ -1810:Src/main.c **** USART_InitStruct.BaudRate = 115200; -1811:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; -1812:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; -1813:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; -1814:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; -1815:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; -1816:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; -1817:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); -1818:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); -1819:Src/main.c **** LL_USART_Enable(USART1); -1820:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ -1821:Src/main.c **** -1822:Src/main.c **** /* USER CODE END USART1_Init 2 */ +1799:Src/main.c **** /** Initializes the peripherals clock +1800:Src/main.c **** */ +1801:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; +1802:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; +1803:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) +1804:Src/main.c **** { +1805:Src/main.c **** Error_Handler(); +1806:Src/main.c **** } +1807:Src/main.c **** +1808:Src/main.c **** /* Peripheral clock enable */ +1809:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +1810:Src/main.c **** +1811:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1812:Src/main.c **** /**USART1 GPIO Configuration +1813:Src/main.c **** PA9 ------> USART1_TX +1814:Src/main.c **** PA10 ------> USART1_RX +1815:Src/main.c **** */ +1816:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; +1817:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1818:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1819:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1820:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1821:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1822:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1823:Src/main.c **** -1824:Src/main.c **** } - ARM GAS /tmp/ccYgfTud.s page 72 +1824:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; + ARM GAS /tmp/ccwR4KB7.s page 72 + + +1825:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1826:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1827:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1828:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1829:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1830:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1831:Src/main.c **** +1832:Src/main.c **** /* USART1 DMA Init */ +1833:Src/main.c **** +1834:Src/main.c **** /* USART1_TX Init */ +1835:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); +1836:Src/main.c **** +1837:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); +1838:Src/main.c **** +1839:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); +1840:Src/main.c **** +1841:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); +1842:Src/main.c **** +1843:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); +1844:Src/main.c **** +1845:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); +1846:Src/main.c **** +1847:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +1848:Src/main.c **** +1849:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); +1850:Src/main.c **** +1851:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +1852:Src/main.c **** +1853:Src/main.c **** /* USART1 interrupt Init */ +1854:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1855:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); +1856:Src/main.c **** +1857:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +1858:Src/main.c **** +1859:Src/main.c **** /* USER CODE END USART1_Init 1 */ +1860:Src/main.c **** USART_InitStruct.BaudRate = 115200; +1861:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; +1862:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; +1863:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; +1864:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; +1865:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; +1866:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; +1867:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); +1868:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); +1869:Src/main.c **** LL_USART_Enable(USART1); +1870:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ +1871:Src/main.c **** +1872:Src/main.c **** /* USER CODE END USART1_Init 2 */ +1873:Src/main.c **** +1874:Src/main.c **** } +1875:Src/main.c **** +1876:Src/main.c **** /** +1877:Src/main.c **** * Enable DMA controller clock +1878:Src/main.c **** */ +1879:Src/main.c **** static void MX_DMA_Init(void) +1880:Src/main.c **** { + 144 .loc 1 1880 1 is_stmt 1 view -0 + ARM GAS /tmp/ccwR4KB7.s page 73 -1825:Src/main.c **** -1826:Src/main.c **** /** -1827:Src/main.c **** * Enable DMA controller clock -1828:Src/main.c **** */ -1829:Src/main.c **** static void MX_DMA_Init(void) -1830:Src/main.c **** { - 144 .loc 1 1830 1 is_stmt 1 view -0 145 .cfi_startproc 146 @ args = 0, pretend = 0, frame = 8 147 @ frame_needed = 0, uses_anonymous_args = 0 @@ -4278,14 +4331,14 @@ ARM GAS /tmp/ccYgfTud.s page 1 152 0002 83B0 sub sp, sp, #12 153 .LCFI2: 154 .cfi_def_cfa_offset 16 -1831:Src/main.c **** -1832:Src/main.c **** /* Init with LL driver */ -1833:Src/main.c **** /* DMA controller clock enable */ -1834:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); - 155 .loc 1 1834 3 view .LVU37 +1881:Src/main.c **** +1882:Src/main.c **** /* Init with LL driver */ +1883:Src/main.c **** /* DMA controller clock enable */ +1884:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); + 155 .loc 1 1884 3 view .LVU37 156 .LVL8: - 157 .LBB329: - 158 .LBI329: + 157 .LBB331: + 158 .LBI331: 159 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** @@ -4318,9 +4371,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * This software is licensed under terms that can be found in the LICENSE file in 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * the root directory of this software component. 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * If no LICENSE file comes with this software, it is provided AS-IS. - ARM GAS /tmp/ccYgfTud.s page 73 - - 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -4328,6 +4378,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifndef __STM32F7xx_LL_BUS_H 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define __STM32F7xx_LL_BUS_H 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** + ARM GAS /tmp/ccwR4KB7.s page 74 + + 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifdef __cplusplus 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** extern "C" { 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif @@ -4378,9 +4431,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_BKPSRAM RCC_AHB1ENR_BKPSRAMEN 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DTCMRAM RCC_AHB1ENR_DTCMRAMEN 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHB1ENR_DMA1EN - ARM GAS /tmp/ccYgfTud.s page 74 - - 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(DMA2D) 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN @@ -4388,6 +4438,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(ETH) 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMAC RCC_AHB1ENR_ETHMACEN 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACTX RCC_AHB1ENR_ETHMACTXEN + ARM GAS /tmp/ccwR4KB7.s page 75 + + 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACRX RCC_AHB1ENR_ETHMACRXEN 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACPTP RCC_AHB1ENR_ETHMACPTPEN 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* ETH */ @@ -4438,9 +4491,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ - ARM GAS /tmp/ccYgfTud.s page 75 - - 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN @@ -4448,6 +4498,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM5 RCC_APB1ENR_TIM5EN 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM6 RCC_APB1ENR_TIM6EN + ARM GAS /tmp/ccwR4KB7.s page 76 + + 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR_TIM7EN 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN @@ -4498,9 +4551,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART6 RCC_APB2ENR_USART6EN - ARM GAS /tmp/ccYgfTud.s page 76 - - 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN @@ -4508,6 +4558,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SDMMC2) 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SDMMC2 RCC_APB2ENR_SDMMC2EN 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SDMMC2 */ + ARM GAS /tmp/ccwR4KB7.s page 77 + + 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI1 RCC_APB2ENR_SPI1EN 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SYSCFG RCC_APB2ENR_SYSCFGEN @@ -4558,9 +4611,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB1 peripherals clock. 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_EnableClock\n 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_EnableClock\n - ARM GAS /tmp/ccYgfTud.s page 77 - - 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_EnableClock\n 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_EnableClock\n 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n @@ -4568,6 +4618,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_EnableClock\n 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_EnableClock\n 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_EnableClock\n + ARM GAS /tmp/ccwR4KB7.s page 78 + + 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_EnableClock\n 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_EnableClock\n 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_EnableClock\n @@ -4612,15 +4665,12 @@ ARM GAS /tmp/ccYgfTud.s page 1 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) 160 .loc 3 309 22 view .LVU38 - 161 .LBB330: + 161 .LBB332: 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; 162 .loc 3 311 3 view .LVU39 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); 163 .loc 3 312 3 view .LVU40 - ARM GAS /tmp/ccYgfTud.s page 78 - - 164 0004 0D4B ldr r3, .L10 165 0006 1A6B ldr r2, [r3, #48] 166 0008 42F48002 orr r2, r2, #4194304 @@ -4628,6 +4678,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); 168 .loc 3 314 3 view .LVU41 + ARM GAS /tmp/ccwR4KB7.s page 79 + + 169 .loc 3 314 12 is_stmt 0 view .LVU42 170 000e 1B6B ldr r3, [r3, #48] 171 0010 03F48003 and r3, r3, #4194304 @@ -4638,37 +4691,37 @@ ARM GAS /tmp/ccYgfTud.s page 1 175 0016 019B ldr r3, [sp, #4] 176 .LVL9: 177 .loc 3 315 3 is_stmt 0 view .LVU45 - 178 .LBE330: - 179 .LBE329: -1835:Src/main.c **** -1836:Src/main.c **** /* DMA interrupt init */ -1837:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ -1838:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); - 180 .loc 1 1838 3 is_stmt 1 view .LVU46 - 181 .LBB331: - 182 .LBI331: + 178 .LBE332: + 179 .LBE331: +1885:Src/main.c **** +1886:Src/main.c **** /* DMA interrupt init */ +1887:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ +1888:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + 180 .loc 1 1888 3 is_stmt 1 view .LVU46 + 181 .LBB333: + 182 .LBI333: 1884:Drivers/CMSIS/Include/core_cm7.h **** { 183 .loc 2 1884 26 view .LVU47 - 184 .LBB332: + 184 .LBB334: 1886:Drivers/CMSIS/Include/core_cm7.h **** } 185 .loc 2 1886 3 view .LVU48 1886:Drivers/CMSIS/Include/core_cm7.h **** } 186 .loc 2 1886 26 is_stmt 0 view .LVU49 187 0018 094B ldr r3, .L10+4 188 001a D868 ldr r0, [r3, #12] - 189 .LBE332: - 190 .LBE331: - 191 .loc 1 1838 3 discriminator 1 view .LVU50 + 189 .LBE334: + 190 .LBE333: + 191 .loc 1 1888 3 discriminator 1 view .LVU50 192 001c 0022 movs r2, #0 193 001e 1146 mov r1, r2 194 0020 C0F30220 ubfx r0, r0, #8, #3 195 0024 FFF7FEFF bl NVIC_EncodePriority 196 .LVL10: - 197 .LBB333: - 198 .LBI333: + 197 .LBB335: + 198 .LBI335: 2024:Drivers/CMSIS/Include/core_cm7.h **** { 199 .loc 2 2024 22 is_stmt 1 view .LVU51 - 200 .LBB334: + 200 .LBB336: 2026:Drivers/CMSIS/Include/core_cm7.h **** { 201 .loc 2 2026 3 view .LVU52 2028:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4678,9 +4731,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 204 0028 0001 lsls r0, r0, #4 205 .LVL11: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - ARM GAS /tmp/ccYgfTud.s page 79 - - 206 .loc 2 2028 49 view .LVU55 207 002a C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4688,17 +4738,20 @@ ARM GAS /tmp/ccYgfTud.s page 1 209 002c 054B ldr r3, .L10+8 210 002e 83F84603 strb r0, [r3, #838] 211 .LVL12: + ARM GAS /tmp/ccwR4KB7.s page 80 + + 2028:Drivers/CMSIS/Include/core_cm7.h **** } 212 .loc 2 2028 47 view .LVU57 - 213 .LBE334: - 214 .LBE333: -1839:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 215 .loc 1 1839 3 is_stmt 1 view .LVU58 - 216 .LBB335: - 217 .LBI335: + 213 .LBE336: + 214 .LBE335: +1889:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 215 .loc 1 1889 3 is_stmt 1 view .LVU58 + 216 .LBB337: + 217 .LBI337: 1896:Drivers/CMSIS/Include/core_cm7.h **** { 218 .loc 2 1896 22 view .LVU59 - 219 .LBB336: + 219 .LBB338: 1898:Drivers/CMSIS/Include/core_cm7.h **** { 220 .loc 2 1898 3 view .LVU60 1900:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4710,11 +4763,11 @@ ARM GAS /tmp/ccYgfTud.s page 1 225 .LVL13: 1900:Drivers/CMSIS/Include/core_cm7.h **** } 226 .loc 2 1900 43 view .LVU63 - 227 .LBE336: - 228 .LBE335: -1840:Src/main.c **** -1841:Src/main.c **** } - 229 .loc 1 1841 1 view .LVU64 + 227 .LBE338: + 228 .LBE337: +1890:Src/main.c **** +1891:Src/main.c **** } + 229 .loc 1 1891 1 view .LVU64 230 0036 03B0 add sp, sp, #12 231 .LCFI3: 232 .cfi_def_cfa_offset 4 @@ -4736,816 +4789,816 @@ ARM GAS /tmp/ccYgfTud.s page 1 250 Decode_task: 251 .LVL14: 252 .LFB1209: -1842:Src/main.c **** -1843:Src/main.c **** /** - ARM GAS /tmp/ccYgfTud.s page 80 +1892:Src/main.c **** +1893:Src/main.c **** /** +1894:Src/main.c **** * @brief GPIO Initialization Function +1895:Src/main.c **** * @param None +1896:Src/main.c **** * @retval None +1897:Src/main.c **** */ +1898:Src/main.c **** static void MX_GPIO_Init(void) +1899:Src/main.c **** { +1900:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + ARM GAS /tmp/ccwR4KB7.s page 81 -1844:Src/main.c **** * @brief GPIO Initialization Function -1845:Src/main.c **** * @param None -1846:Src/main.c **** * @retval None -1847:Src/main.c **** */ -1848:Src/main.c **** static void MX_GPIO_Init(void) -1849:Src/main.c **** { -1850:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; -1851:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ -1852:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ -1853:Src/main.c **** -1854:Src/main.c **** /* GPIO Ports Clock Enable */ -1855:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); -1856:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); -1857:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); -1858:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); -1859:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); -1860:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); -1861:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); -1862:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); -1863:Src/main.c **** -1864:Src/main.c **** /*Configure GPIO pin Output Level */ -1865:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -1866:Src/main.c **** -1867:Src/main.c **** /*Configure GPIO pin Output Level */ -1868:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); -1869:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); -1870:Src/main.c **** -1871:Src/main.c **** /*Configure GPIO pin Output Level */ -1872:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); -1873:Src/main.c **** -1874:Src/main.c **** /*Configure GPIO pin Output Level */ -1875:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); -1876:Src/main.c **** -1877:Src/main.c **** /*Configure GPIO pin Output Level */ -1878:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -1879:Src/main.c **** -1880:Src/main.c **** /*Configure GPIO pin Output Level */ -1881:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); -1882:Src/main.c **** -1883:Src/main.c **** /*Configure GPIO pin Output Level */ -1884:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin -1885:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); -1886:Src/main.c **** -1887:Src/main.c **** /*Configure GPIO pin Output Level */ -1888:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -1889:Src/main.c **** -1890:Src/main.c **** /*Configure GPIO pin Output Level */ -1891:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); -1892:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -1893:Src/main.c **** -1894:Src/main.c **** /*Configure GPIO pin Output Level */ -1895:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1896:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); -1897:Src/main.c **** -1898:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ -1899:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; -1900:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - ARM GAS /tmp/ccYgfTud.s page 81 - - -1901:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; -1902:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1901:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ +1902:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ 1903:Src/main.c **** -1904:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ -1905:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; -1906:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1907:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1908:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1909:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1910:Src/main.c **** -1911:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */ -1912:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin; -1913:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1914:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1915:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1916:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); -1917:Src/main.c **** -1918:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ -1919:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; -1920:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1921:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1922:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1923:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); -1924:Src/main.c **** -1925:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin -1926:Src/main.c **** DAC_LD2_CS_Pin */ -1927:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin -1928:Src/main.c **** |DAC_LD2_CS_Pin; -1929:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1930:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1931:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1932:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1933:Src/main.c **** -1934:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ -1935:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; -1936:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1937:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1938:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1904:Src/main.c **** /* GPIO Ports Clock Enable */ +1905:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); +1906:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); +1907:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); +1908:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); +1909:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); +1910:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); +1911:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); +1912:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); +1913:Src/main.c **** +1914:Src/main.c **** /*Configure GPIO pin Output Level */ +1915:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +1916:Src/main.c **** +1917:Src/main.c **** /*Configure GPIO pin Output Level */ +1918:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); +1919:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +1920:Src/main.c **** +1921:Src/main.c **** /*Configure GPIO pin Output Level */ +1922:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); +1923:Src/main.c **** +1924:Src/main.c **** /*Configure GPIO pin Output Level */ +1925:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); +1926:Src/main.c **** +1927:Src/main.c **** /*Configure GPIO pin Output Level */ +1928:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +1929:Src/main.c **** +1930:Src/main.c **** /*Configure GPIO pin Output Level */ +1931:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +1932:Src/main.c **** +1933:Src/main.c **** /*Configure GPIO pin Output Level */ +1934:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin +1935:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); +1936:Src/main.c **** +1937:Src/main.c **** /*Configure GPIO pin Output Level */ +1938:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); 1939:Src/main.c **** -1940:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ -1941:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; -1942:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1943:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1944:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1945:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1946:Src/main.c **** -1947:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ -1948:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; -1949:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1950:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1951:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1952:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); +1940:Src/main.c **** /*Configure GPIO pin Output Level */ +1941:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); +1942:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +1943:Src/main.c **** +1944:Src/main.c **** /*Configure GPIO pin Output Level */ +1945:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin +1946:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); +1947:Src/main.c **** +1948:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ +1949:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; +1950:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1951:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; +1952:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 1953:Src/main.c **** -1954:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin -1955:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ -1956:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin -1957:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; - ARM GAS /tmp/ccYgfTud.s page 82 +1954:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ +1955:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; +1956:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1957:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + ARM GAS /tmp/ccwR4KB7.s page 82 -1958:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1959:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1960:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1961:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1962:Src/main.c **** -1963:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */ -1964:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin; -1965:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1966:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1967:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1968:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); -1969:Src/main.c **** -1970:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ -1971:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; -1972:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1973:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1974:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); -1975:Src/main.c **** -1976:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ -1977:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; -1978:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1979:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1980:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); -1981:Src/main.c **** -1982:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin -1983:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ -1984:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1985:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; -1986:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1958:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1959:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1960:Src/main.c **** +1961:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */ +1962:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin; +1963:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1964:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1965:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1966:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); +1967:Src/main.c **** +1968:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ +1969:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; +1970:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1971:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1972:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +1973:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); +1974:Src/main.c **** +1975:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin +1976:Src/main.c **** DAC_LD2_CS_Pin */ +1977:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin +1978:Src/main.c **** |DAC_LD2_CS_Pin; +1979:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1980:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1981:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1982:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1983:Src/main.c **** +1984:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ +1985:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; +1986:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 1987:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1988:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1989:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); -1990:Src/main.c **** -1991:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ -1992:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ -1993:Src/main.c **** } -1994:Src/main.c **** -1995:Src/main.c **** /* USER CODE BEGIN 4 */ +1988:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1989:Src/main.c **** +1990:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ +1991:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; +1992:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1993:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1994:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1995:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 1996:Src/main.c **** -1997:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { -1998:Src/main.c **** -1999:Src/main.c **** // UART_transmission_request = NO_MESS; -2000:Src/main.c **** -2001:Src/main.c **** //} -2002:Src/main.c **** -2003:Src/main.c **** static void Init_params(void) -2004:Src/main.c **** { -2005:Src/main.c **** TO6 = 0; -2006:Src/main.c **** TO7 = 0; -2007:Src/main.c **** TO7_before = 0; -2008:Src/main.c **** TO6_before = 0; -2009:Src/main.c **** TO6_uart = 0; -2010:Src/main.c **** flg_tmt = 0; -2011:Src/main.c **** UART_rec_incr = 0; -2012:Src/main.c **** fgoto = 0; -2013:Src/main.c **** sizeoffile = 0; -2014:Src/main.c **** u_tx_flg = 0; - ARM GAS /tmp/ccYgfTud.s page 83 +1997:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ +1998:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; +1999:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2000:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2001:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +2002:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); +2003:Src/main.c **** +2004:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin +2005:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ +2006:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin +2007:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; +2008:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2009:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2010:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2011:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); +2012:Src/main.c **** +2013:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */ +2014:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin; + ARM GAS /tmp/ccwR4KB7.s page 83 -2015:Src/main.c **** u_rx_flg = 0; -2016:Src/main.c **** //State_Data[0]=0; -2017:Src/main.c **** //State_Data[1]=0;//All OK! -2018:Src/main.c **** for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01; -2172:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; -2173:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; -2174:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; -2175:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; -2176:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; -2177:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; -2178:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; -2179:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; -2180:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; -2181:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; -2182:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; -2183:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; -2184:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; -2185:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 86 +2129:Src/main.c **** +2130:Src/main.c **** SD_SEEK = 0; +2131:Src/main.c **** SD_SLIDE = 0; +2132:Src/main.c **** //Reset all periphery +2133:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2134:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2135:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2136:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2137:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2138:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2139:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2140:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2141:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2142:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2143:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) +2144:Src/main.c **** // { +2145:Src/main.c **** // for (uint16_t j = 0; j < DL_16; j++) +2146:Src/main.c **** // { +2147:Src/main.c **** // SD_matr[i][j] = 0; +2148:Src/main.c **** // } +2149:Src/main.c **** // } +2150:Src/main.c **** //LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +2151:Src/main.c **** //LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +2152:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD1 ADC +2153:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC +2154:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2155:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2156:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +2157:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +2158:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +2159:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +2160:Src/main.c **** +2161:Src/main.c **** //------------------------------------------------------------------------------------------------ +2162:Src/main.c **** //test = 11; +2163:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)//if exist sd && disconne +2164:Src/main.c **** { +2165:Src/main.c **** //test = 14; +2166:Src/main.c **** if (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_RESET) +2167:Src/main.c **** { +2168:Src/main.c **** //test = 15; +2169:Src/main.c **** test = Mount_SD("/"); +2170:Src/main.c **** if (test == 0) //0 - suc +2171:Src/main.c **** { +2172:Src/main.c **** //Format_SD(); +2173:Src/main.c **** test = Seek_Read_File ("COMMAND.TXT", (uint8_t *)COMMAND, DL_8, DL_8);//Read next DL_8 bytes +2174:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2175:Src/main.c **** UART_rec_incr = 0; +2176:Src/main.c **** flg_tmt = 0;//Reset the timeout flag +2177:Src/main.c **** } +2178:Src/main.c **** // else +2179:Src/main.c **** // { +2180:Src/main.c **** // test = 13; +2181:Src/main.c **** // } +2182:Src/main.c **** CPU_state = DECODE_ENABLE;//Decoding data with last saved settings +2183:Src/main.c **** } +2184:Src/main.c **** // else +2185:Src/main.c **** // { + ARM GAS /tmp/ccwR4KB7.s page 86 -2186:Src/main.c **** temp2++; -2187:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2188:Src/main.c **** temp2++; -2189:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2190:Src/main.c **** temp2++; -2191:Src/main.c **** temp2++; -2192:Src/main.c **** temp2++; -2193:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); -2194:Src/main.c **** temp2++; -2195:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2196:Src/main.c **** temp2++; -2197:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2198:Src/main.c **** temp2++; -2199:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2200:Src/main.c **** temp2++; -2201:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2202:Src/main.c **** temp2++; -2203:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID -2204:Src/main.c **** temp2++; -2205:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); -2206:Src/main.c **** temp2++; -2207:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); -2208:Src/main.c **** temp2++; -2209:Src/main.c **** -2210:Src/main.c **** if (Curr_setup->U5V1_EN) -2211:Src/main.c **** { -2212:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); -2213:Src/main.c **** } -2214:Src/main.c **** else -2215:Src/main.c **** { -2216:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); -2217:Src/main.c **** } -2218:Src/main.c **** -2219:Src/main.c **** if (Curr_setup->U5V2_EN) -2220:Src/main.c **** { -2221:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); -2222:Src/main.c **** } -2223:Src/main.c **** else -2224:Src/main.c **** { -2225:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); -2226:Src/main.c **** } -2227:Src/main.c **** -2228:Src/main.c **** if (Curr_setup->LD1_EN) -2229:Src/main.c **** { -2230:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); -2231:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC -2232:Src/main.c **** } -2233:Src/main.c **** else -2234:Src/main.c **** { -2235:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); -2236:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC -2237:Src/main.c **** } -2238:Src/main.c **** -2239:Src/main.c **** if (Curr_setup->LD2_EN) -2240:Src/main.c **** { -2241:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); -2242:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC - ARM GAS /tmp/ccYgfTud.s page 87 +2186:Src/main.c **** // test = 16; +2187:Src/main.c **** // } +2188:Src/main.c **** } +2189:Src/main.c **** // else +2190:Src/main.c **** // { +2191:Src/main.c **** // test = 12; +2192:Src/main.c **** // } +2193:Src/main.c **** +2194:Src/main.c **** AD9102_Init(); +2195:Src/main.c **** } +2196:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2197:Src/main.c **** { +2198:Src/main.c **** // uint8_t *temp1; +2199:Src/main.c **** uint16_t *temp2; +2200:Src/main.c **** +2201:Src/main.c **** //------------------------------------------------------------------------------------------------ +2202:Src/main.c **** +2203:Src/main.c **** +2204:Src/main.c **** test=0; +2205:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& +2206:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u +2207:Src/main.c **** { +2208:Src/main.c **** test = Mount_SD("/"); +2209:Src/main.c **** if (test == 0) //0 - suc +2210:Src/main.c **** { +2211:Src/main.c **** //Format_SD(); +2212:Src/main.c **** test = Remove_File ("COMMAND.TXT"); +2213:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ +2214:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2215:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2216:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2217:Src/main.c **** } +2218:Src/main.c **** } +2219:Src/main.c **** +2220:Src/main.c **** temp2 = (uint16_t *)Command; +2221:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; +2222:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; +2223:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; +2224:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; +2225:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; +2226:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; +2227:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; +2228:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; +2229:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; +2230:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; +2231:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; +2232:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; +2233:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; +2234:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; +2235:Src/main.c **** +2236:Src/main.c **** temp2++; +2237:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2238:Src/main.c **** temp2++; +2239:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2240:Src/main.c **** temp2++; +2241:Src/main.c **** temp2++; +2242:Src/main.c **** temp2++; + ARM GAS /tmp/ccwR4KB7.s page 87 -2243:Src/main.c **** } -2244:Src/main.c **** else -2245:Src/main.c **** { -2246:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); -2247:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC -2248:Src/main.c **** } -2249:Src/main.c **** -2250:Src/main.c **** if (Curr_setup->REF1_EN) -2251:Src/main.c **** { -2252:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); -2253:Src/main.c **** } -2254:Src/main.c **** else -2255:Src/main.c **** { -2256:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); -2257:Src/main.c **** } -2258:Src/main.c **** -2259:Src/main.c **** if (Curr_setup->REF2_EN) -2260:Src/main.c **** { -2261:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); -2262:Src/main.c **** } -2263:Src/main.c **** else -2264:Src/main.c **** { -2265:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); -2266:Src/main.c **** } -2267:Src/main.c **** -2268:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) -2269:Src/main.c **** { -2270:Src/main.c **** Set_LTEC(3,32767); -2271:Src/main.c **** Set_LTEC(3,32767); -2272:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); -2273:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); -2274:Src/main.c **** } -2275:Src/main.c **** else -2276:Src/main.c **** { -2277:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); -2278:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); -2279:Src/main.c **** } -2280:Src/main.c **** -2281:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) -2282:Src/main.c **** { -2283:Src/main.c **** Set_LTEC(4,32767); -2284:Src/main.c **** Set_LTEC(4,32767); -2285:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); -2286:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); +2243:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); +2244:Src/main.c **** temp2++; +2245:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2246:Src/main.c **** temp2++; +2247:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2248:Src/main.c **** temp2++; +2249:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2250:Src/main.c **** temp2++; +2251:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2252:Src/main.c **** temp2++; +2253:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID +2254:Src/main.c **** temp2++; +2255:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); +2256:Src/main.c **** temp2++; +2257:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); +2258:Src/main.c **** temp2++; +2259:Src/main.c **** +2260:Src/main.c **** if (Curr_setup->U5V1_EN) +2261:Src/main.c **** { +2262:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); +2263:Src/main.c **** } +2264:Src/main.c **** else +2265:Src/main.c **** { +2266:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2267:Src/main.c **** } +2268:Src/main.c **** +2269:Src/main.c **** if (Curr_setup->U5V2_EN) +2270:Src/main.c **** { +2271:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); +2272:Src/main.c **** } +2273:Src/main.c **** else +2274:Src/main.c **** { +2275:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2276:Src/main.c **** } +2277:Src/main.c **** +2278:Src/main.c **** if (Curr_setup->LD1_EN) +2279:Src/main.c **** { +2280:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); +2281:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2282:Src/main.c **** } +2283:Src/main.c **** else +2284:Src/main.c **** { +2285:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2286:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC 2287:Src/main.c **** } -2288:Src/main.c **** else -2289:Src/main.c **** { -2290:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); -2291:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); -2292:Src/main.c **** } -2293:Src/main.c **** -2294:Src/main.c **** if (Curr_setup->PI1_RD==0) +2288:Src/main.c **** +2289:Src/main.c **** if (Curr_setup->LD2_EN) +2290:Src/main.c **** { +2291:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); +2292:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC +2293:Src/main.c **** } +2294:Src/main.c **** else 2295:Src/main.c **** { -2296:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; -2297:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2296:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2297:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC 2298:Src/main.c **** } 2299:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 88 + ARM GAS /tmp/ccwR4KB7.s page 88 -2300:Src/main.c **** if (Curr_setup->PI2_RD==0) +2300:Src/main.c **** if (Curr_setup->REF1_EN) 2301:Src/main.c **** { -2302:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; -2303:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; -2304:Src/main.c **** } -2305:Src/main.c **** } -2306:Src/main.c **** -2307:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ -2308:Src/main.c **** { - 253 .loc 1 2308 1 is_stmt 1 view -0 +2302:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); +2303:Src/main.c **** } +2304:Src/main.c **** else +2305:Src/main.c **** { +2306:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2307:Src/main.c **** } +2308:Src/main.c **** +2309:Src/main.c **** if (Curr_setup->REF2_EN) +2310:Src/main.c **** { +2311:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2312:Src/main.c **** } +2313:Src/main.c **** else +2314:Src/main.c **** { +2315:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2316:Src/main.c **** } +2317:Src/main.c **** +2318:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) +2319:Src/main.c **** { +2320:Src/main.c **** Set_LTEC(3,32767); +2321:Src/main.c **** Set_LTEC(3,32767); +2322:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); +2323:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); +2324:Src/main.c **** } +2325:Src/main.c **** else +2326:Src/main.c **** { +2327:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2328:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2329:Src/main.c **** } +2330:Src/main.c **** +2331:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) +2332:Src/main.c **** { +2333:Src/main.c **** Set_LTEC(4,32767); +2334:Src/main.c **** Set_LTEC(4,32767); +2335:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); +2336:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); +2337:Src/main.c **** } +2338:Src/main.c **** else +2339:Src/main.c **** { +2340:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2341:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2342:Src/main.c **** } +2343:Src/main.c **** +2344:Src/main.c **** if (Curr_setup->PI1_RD==0) +2345:Src/main.c **** { +2346:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; +2347:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2348:Src/main.c **** } +2349:Src/main.c **** +2350:Src/main.c **** if (Curr_setup->PI2_RD==0) +2351:Src/main.c **** { +2352:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; +2353:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; +2354:Src/main.c **** } +2355:Src/main.c **** } +2356:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 89 + + +2357:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2358:Src/main.c **** { + 253 .loc 1 2358 1 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 8 256 @ frame_needed = 0, uses_anonymous_args = 0 257 @ link register save eliminated. - 258 .loc 1 2308 1 is_stmt 0 view .LVU66 + 258 .loc 1 2358 1 is_stmt 0 view .LVU66 259 0000 82B0 sub sp, sp, #8 260 .LCFI4: 261 .cfi_def_cfa_offset 8 -2309:Src/main.c **** uint16_t *temp2; - 262 .loc 1 2309 2 is_stmt 1 view .LVU67 -2310:Src/main.c **** -2311:Src/main.c **** temp2 = (uint16_t *)Command; - 263 .loc 1 2311 2 view .LVU68 +2359:Src/main.c **** uint16_t *temp2; + 262 .loc 1 2359 2 is_stmt 1 view .LVU67 +2360:Src/main.c **** +2361:Src/main.c **** temp2 = (uint16_t *)Command; + 263 .loc 1 2361 2 view .LVU68 264 .LVL15: -2312:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 265 .loc 1 2312 2 view .LVU69 - 266 .loc 1 2312 36 is_stmt 0 view .LVU70 +2362:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 265 .loc 1 2362 2 view .LVU69 + 266 .loc 1 2362 36 is_stmt 0 view .LVU70 267 0002 0288 ldrh r2, [r0] 268 .LVL16: - 269 .loc 1 2312 48 view .LVU71 + 269 .loc 1 2362 48 view .LVU71 270 0004 02F00102 and r2, r2, #1 - 271 .loc 1 2312 22 view .LVU72 + 271 .loc 1 2362 22 view .LVU72 272 0008 1A70 strb r2, [r3] -2313:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 273 .loc 1 2313 2 is_stmt 1 view .LVU73 - 274 .loc 1 2313 36 is_stmt 0 view .LVU74 +2363:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 273 .loc 1 2363 2 is_stmt 1 view .LVU73 + 274 .loc 1 2363 36 is_stmt 0 view .LVU74 275 000a 0288 ldrh r2, [r0] - 276 .loc 1 2313 48 view .LVU75 + 276 .loc 1 2363 48 view .LVU75 277 000c C2F34002 ubfx r2, r2, #1, #1 - 278 .loc 1 2313 22 view .LVU76 + 278 .loc 1 2363 22 view .LVU76 279 0010 5A70 strb r2, [r3, #1] -2314:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 280 .loc 1 2314 2 is_stmt 1 view .LVU77 - 281 .loc 1 2314 36 is_stmt 0 view .LVU78 +2364:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 280 .loc 1 2364 2 is_stmt 1 view .LVU77 + 281 .loc 1 2364 36 is_stmt 0 view .LVU78 282 0012 0288 ldrh r2, [r0] - 283 .loc 1 2314 48 view .LVU79 + 283 .loc 1 2364 48 view .LVU79 284 0014 C2F38002 ubfx r2, r2, #2, #1 - 285 .loc 1 2314 22 view .LVU80 + 285 .loc 1 2364 22 view .LVU80 286 0018 9A70 strb r2, [r3, #2] -2315:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 287 .loc 1 2315 2 is_stmt 1 view .LVU81 - 288 .loc 1 2315 35 is_stmt 0 view .LVU82 +2365:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 287 .loc 1 2365 2 is_stmt 1 view .LVU81 + 288 .loc 1 2365 35 is_stmt 0 view .LVU82 289 001a 0288 ldrh r2, [r0] - 290 .loc 1 2315 47 view .LVU83 + 290 .loc 1 2365 47 view .LVU83 291 001c C2F3C002 ubfx r2, r2, #3, #1 - 292 .loc 1 2315 21 view .LVU84 + 292 .loc 1 2365 21 view .LVU84 293 0020 DA70 strb r2, [r3, #3] - ARM GAS /tmp/ccYgfTud.s page 89 - - -2316:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 294 .loc 1 2316 2 is_stmt 1 view .LVU85 - 295 .loc 1 2316 35 is_stmt 0 view .LVU86 +2366:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 294 .loc 1 2366 2 is_stmt 1 view .LVU85 + 295 .loc 1 2366 35 is_stmt 0 view .LVU86 296 0022 0288 ldrh r2, [r0] - 297 .loc 1 2316 47 view .LVU87 + 297 .loc 1 2366 47 view .LVU87 298 0024 C2F30012 ubfx r2, r2, #4, #1 - 299 .loc 1 2316 21 view .LVU88 + 299 .loc 1 2366 21 view .LVU88 + ARM GAS /tmp/ccwR4KB7.s page 90 + + 300 0028 1A71 strb r2, [r3, #4] -2317:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 301 .loc 1 2317 2 is_stmt 1 view .LVU89 - 302 .loc 1 2317 36 is_stmt 0 view .LVU90 +2367:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 301 .loc 1 2367 2 is_stmt 1 view .LVU89 + 302 .loc 1 2367 36 is_stmt 0 view .LVU90 303 002a 0288 ldrh r2, [r0] - 304 .loc 1 2317 48 view .LVU91 + 304 .loc 1 2367 48 view .LVU91 305 002c C2F34012 ubfx r2, r2, #5, #1 - 306 .loc 1 2317 22 view .LVU92 + 306 .loc 1 2367 22 view .LVU92 307 0030 5A71 strb r2, [r3, #5] -2318:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 308 .loc 1 2318 2 is_stmt 1 view .LVU93 - 309 .loc 1 2318 36 is_stmt 0 view .LVU94 +2368:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 308 .loc 1 2368 2 is_stmt 1 view .LVU93 + 309 .loc 1 2368 36 is_stmt 0 view .LVU94 310 0032 0288 ldrh r2, [r0] - 311 .loc 1 2318 48 view .LVU95 + 311 .loc 1 2368 48 view .LVU95 312 0034 C2F38012 ubfx r2, r2, #6, #1 - 313 .loc 1 2318 22 view .LVU96 + 313 .loc 1 2368 22 view .LVU96 314 0038 9A71 strb r2, [r3, #6] -2319:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 315 .loc 1 2319 2 is_stmt 1 view .LVU97 - 316 .loc 1 2319 36 is_stmt 0 view .LVU98 +2369:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 315 .loc 1 2369 2 is_stmt 1 view .LVU97 + 316 .loc 1 2369 36 is_stmt 0 view .LVU98 317 003a 0288 ldrh r2, [r0] - 318 .loc 1 2319 48 view .LVU99 + 318 .loc 1 2369 48 view .LVU99 319 003c C2F3C012 ubfx r2, r2, #7, #1 - 320 .loc 1 2319 22 view .LVU100 + 320 .loc 1 2369 22 view .LVU100 321 0040 DA71 strb r2, [r3, #7] -2320:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 322 .loc 1 2320 2 is_stmt 1 view .LVU101 - 323 .loc 1 2320 36 is_stmt 0 view .LVU102 +2370:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 322 .loc 1 2370 2 is_stmt 1 view .LVU101 + 323 .loc 1 2370 36 is_stmt 0 view .LVU102 324 0042 0288 ldrh r2, [r0] - 325 .loc 1 2320 48 view .LVU103 + 325 .loc 1 2370 48 view .LVU103 326 0044 C2F30022 ubfx r2, r2, #8, #1 - 327 .loc 1 2320 22 view .LVU104 + 327 .loc 1 2370 22 view .LVU104 328 0048 1A72 strb r2, [r3, #8] -2321:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 329 .loc 1 2321 2 is_stmt 1 view .LVU105 - 330 .loc 1 2321 35 is_stmt 0 view .LVU106 +2371:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 329 .loc 1 2371 2 is_stmt 1 view .LVU105 + 330 .loc 1 2371 35 is_stmt 0 view .LVU106 331 004a 0288 ldrh r2, [r0] - 332 .loc 1 2321 47 view .LVU107 + 332 .loc 1 2371 47 view .LVU107 333 004c C2F34022 ubfx r2, r2, #9, #1 - 334 .loc 1 2321 21 view .LVU108 + 334 .loc 1 2371 21 view .LVU108 335 0050 5A72 strb r2, [r3, #9] -2322:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 336 .loc 1 2322 2 is_stmt 1 view .LVU109 - 337 .loc 1 2322 35 is_stmt 0 view .LVU110 +2372:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 336 .loc 1 2372 2 is_stmt 1 view .LVU109 + 337 .loc 1 2372 35 is_stmt 0 view .LVU110 338 0052 0288 ldrh r2, [r0] - 339 .loc 1 2322 48 view .LVU111 + 339 .loc 1 2372 48 view .LVU111 340 0054 C2F38022 ubfx r2, r2, #10, #1 - 341 .loc 1 2322 21 view .LVU112 + 341 .loc 1 2372 21 view .LVU112 342 0058 9A72 strb r2, [r3, #10] -2323:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - ARM GAS /tmp/ccYgfTud.s page 90 - - - 343 .loc 1 2323 2 is_stmt 1 view .LVU113 - 344 .loc 1 2323 34 is_stmt 0 view .LVU114 +2373:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 343 .loc 1 2373 2 is_stmt 1 view .LVU113 + 344 .loc 1 2373 34 is_stmt 0 view .LVU114 345 005a 0288 ldrh r2, [r0] - 346 .loc 1 2323 47 view .LVU115 + 346 .loc 1 2373 47 view .LVU115 347 005c C2F3C022 ubfx r2, r2, #11, #1 - 348 .loc 1 2323 20 view .LVU116 + 348 .loc 1 2373 20 view .LVU116 349 0060 DA72 strb r2, [r3, #11] -2324:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 350 .loc 1 2324 2 is_stmt 1 view .LVU117 - 351 .loc 1 2324 35 is_stmt 0 view .LVU118 + ARM GAS /tmp/ccwR4KB7.s page 91 + + +2374:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 350 .loc 1 2374 2 is_stmt 1 view .LVU117 + 351 .loc 1 2374 35 is_stmt 0 view .LVU118 352 0062 0288 ldrh r2, [r0] - 353 .loc 1 2324 48 view .LVU119 + 353 .loc 1 2374 48 view .LVU119 354 0064 C2F30032 ubfx r2, r2, #12, #1 - 355 .loc 1 2324 21 view .LVU120 + 355 .loc 1 2374 21 view .LVU120 356 0068 1A73 strb r2, [r3, #12] -2325:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 357 .loc 1 2325 2 is_stmt 1 view .LVU121 - 358 .loc 1 2325 35 is_stmt 0 view .LVU122 +2375:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 357 .loc 1 2375 2 is_stmt 1 view .LVU121 + 358 .loc 1 2375 35 is_stmt 0 view .LVU122 359 006a 0288 ldrh r2, [r0] - 360 .loc 1 2325 48 view .LVU123 + 360 .loc 1 2375 48 view .LVU123 361 006c C2F34032 ubfx r2, r2, #13, #1 - 362 .loc 1 2325 21 view .LVU124 + 362 .loc 1 2375 21 view .LVU124 363 0070 5A73 strb r2, [r3, #13] -2326:Src/main.c **** -2327:Src/main.c **** temp2++; - 364 .loc 1 2327 2 is_stmt 1 view .LVU125 +2376:Src/main.c **** +2377:Src/main.c **** temp2++; + 364 .loc 1 2377 2 is_stmt 1 view .LVU125 365 .LVL17: -2328:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; - 366 .loc 1 2328 2 view .LVU126 - 367 .loc 1 2328 21 is_stmt 0 view .LVU127 +2378:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; + 366 .loc 1 2378 2 view .LVU126 + 367 .loc 1 2378 21 is_stmt 0 view .LVU127 368 0072 8278 ldrb r2, [r0, #2] @ zero_extendqisi2 - 369 .loc 1 2328 19 view .LVU128 + 369 .loc 1 2378 19 view .LVU128 370 0074 384B ldr r3, .L14+8 371 .LVL18: - 372 .loc 1 2328 19 view .LVU129 + 372 .loc 1 2378 19 view .LVU129 373 0076 1A70 strb r2, [r3] - 374 .loc 1 2328 40 is_stmt 1 view .LVU130 + 374 .loc 1 2378 40 is_stmt 1 view .LVU130 375 .LVL19: -2329:Src/main.c **** task.min_param = (float)(*temp2); temp2++; - 376 .loc 1 2329 2 view .LVU131 - 377 .loc 1 2329 29 is_stmt 0 view .LVU132 +2379:Src/main.c **** task.min_param = (float)(*temp2); temp2++; + 376 .loc 1 2379 2 view .LVU131 + 377 .loc 1 2379 29 is_stmt 0 view .LVU132 378 0078 8288 ldrh r2, [r0, #4] 379 007a 07EE902A vmov s15, r2 @ int - 380 .loc 1 2329 21 view .LVU133 + 380 .loc 1 2379 21 view .LVU133 381 007e F8EE677A vcvt.f32.u32 s15, s15 - 382 .loc 1 2329 19 view .LVU134 + 382 .loc 1 2379 19 view .LVU134 383 0082 C3ED017A vstr.32 s15, [r3, #4] - 384 .loc 1 2329 38 is_stmt 1 view .LVU135 + 384 .loc 1 2379 38 is_stmt 1 view .LVU135 385 .LVL20: -2330:Src/main.c **** task.max_param = (float)(*temp2); temp2++; - 386 .loc 1 2330 2 view .LVU136 - 387 .loc 1 2330 29 is_stmt 0 view .LVU137 +2380:Src/main.c **** task.max_param = (float)(*temp2); temp2++; + 386 .loc 1 2380 2 view .LVU136 + 387 .loc 1 2380 29 is_stmt 0 view .LVU137 388 0086 C288 ldrh r2, [r0, #6] 389 0088 07EE902A vmov s15, r2 @ int - 390 .loc 1 2330 21 view .LVU138 + 390 .loc 1 2380 21 view .LVU138 391 008c F8EE677A vcvt.f32.u32 s15, s15 - 392 .loc 1 2330 19 view .LVU139 - ARM GAS /tmp/ccYgfTud.s page 91 - - + 392 .loc 1 2380 19 view .LVU139 393 0090 C3ED027A vstr.32 s15, [r3, #8] - 394 .loc 1 2330 38 is_stmt 1 view .LVU140 + 394 .loc 1 2380 38 is_stmt 1 view .LVU140 395 .LVL21: -2331:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; - 396 .loc 1 2331 2 view .LVU141 - 397 .loc 1 2331 29 is_stmt 0 view .LVU142 +2381:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; + 396 .loc 1 2381 2 view .LVU141 + 397 .loc 1 2381 29 is_stmt 0 view .LVU142 398 0094 0289 ldrh r2, [r0, #8] + ARM GAS /tmp/ccwR4KB7.s page 92 + + 399 0096 07EE902A vmov s15, r2 @ int - 400 .loc 1 2331 21 view .LVU143 + 400 .loc 1 2381 21 view .LVU143 401 009a F8EE677A vcvt.f32.u32 s15, s15 - 402 .loc 1 2331 19 view .LVU144 + 402 .loc 1 2381 19 view .LVU144 403 009e C3ED037A vstr.32 s15, [r3, #12] - 404 .loc 1 2331 38 is_stmt 1 view .LVU145 + 404 .loc 1 2381 38 is_stmt 1 view .LVU145 405 .LVL22: -2332:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; - 406 .loc 1 2332 2 view .LVU146 - 407 .loc 1 2332 29 is_stmt 0 view .LVU147 +2382:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; + 406 .loc 1 2382 2 view .LVU146 + 407 .loc 1 2382 29 is_stmt 0 view .LVU147 408 00a2 4289 ldrh r2, [r0, #10] 409 00a4 07EE102A vmov s14, r2 @ int - 410 .loc 1 2332 21 view .LVU148 + 410 .loc 1 2382 21 view .LVU148 411 00a8 B8EE477B vcvt.f64.u32 d7, s14 - 412 .loc 1 2332 37 view .LVU149 + 412 .loc 1 2382 37 view .LVU149 413 00ac 9FED285B vldr.64 d5, .L14 414 00b0 87EE056B vdiv.f64 d6, d7, d5 - 415 .loc 1 2332 19 view .LVU150 + 415 .loc 1 2382 19 view .LVU150 416 00b4 FCEEC67B vcvt.u32.f64 s15, d6 417 00b8 CDED017A vstr.32 s15, [sp, #4] @ int 418 00bc 9DF80420 ldrb r2, [sp, #4] @ zero_extendqisi2 419 00c0 1A75 strb r2, [r3, #20] - 420 .loc 1 2332 46 is_stmt 1 view .LVU151 + 420 .loc 1 2382 46 is_stmt 1 view .LVU151 421 .LVL23: -2333:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; - 422 .loc 1 2333 2 view .LVU152 - 423 .loc 1 2333 29 is_stmt 0 view .LVU153 +2383:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; + 422 .loc 1 2383 2 view .LVU152 + 423 .loc 1 2383 29 is_stmt 0 view .LVU153 424 00c2 8189 ldrh r1, [r0, #12] 425 .LVL24: - 426 .loc 1 2333 29 view .LVU154 + 426 .loc 1 2383 29 view .LVU154 427 00c4 07EE901A vmov s15, r1 @ int - 428 .loc 1 2333 21 view .LVU155 + 428 .loc 1 2383 21 view .LVU155 429 00c8 F8EE677A vcvt.f32.u32 s15, s15 - 430 .loc 1 2333 19 view .LVU156 + 430 .loc 1 2383 19 view .LVU156 431 00cc C3ED067A vstr.32 s15, [r3, #24] - 432 .loc 1 2333 38 is_stmt 1 view .LVU157 + 432 .loc 1 2383 38 is_stmt 1 view .LVU157 433 .LVL25: -2334:Src/main.c **** task.curr = (float)(*temp2); temp2++; - 434 .loc 1 2334 2 view .LVU158 - 435 .loc 1 2334 29 is_stmt 0 view .LVU159 +2384:Src/main.c **** task.curr = (float)(*temp2); temp2++; + 434 .loc 1 2384 2 view .LVU158 + 435 .loc 1 2384 29 is_stmt 0 view .LVU159 436 00d0 C189 ldrh r1, [r0, #14] 437 00d2 07EE901A vmov s15, r1 @ int - 438 .loc 1 2334 21 view .LVU160 + 438 .loc 1 2384 21 view .LVU160 439 00d6 F8EE677A vcvt.f32.u32 s15, s15 - 440 .loc 1 2334 19 view .LVU161 + 440 .loc 1 2384 19 view .LVU161 441 00da C3ED077A vstr.32 s15, [r3, #28] - 442 .loc 1 2334 38 is_stmt 1 view .LVU162 + 442 .loc 1 2384 38 is_stmt 1 view .LVU162 443 .LVL26: -2335:Src/main.c **** task.temp = (float)(*temp2); temp2++; - 444 .loc 1 2335 2 view .LVU163 - ARM GAS /tmp/ccYgfTud.s page 92 - - - 445 .loc 1 2335 29 is_stmt 0 view .LVU164 +2385:Src/main.c **** task.temp = (float)(*temp2); temp2++; + 444 .loc 1 2385 2 view .LVU163 + 445 .loc 1 2385 29 is_stmt 0 view .LVU164 446 00de 018A ldrh r1, [r0, #16] 447 00e0 07EE901A vmov s15, r1 @ int - 448 .loc 1 2335 21 view .LVU165 + 448 .loc 1 2385 21 view .LVU165 449 00e4 F8EE677A vcvt.f32.u32 s15, s15 - 450 .loc 1 2335 19 view .LVU166 + 450 .loc 1 2385 19 view .LVU166 451 00e8 C3ED087A vstr.32 s15, [r3, #32] - 452 .loc 1 2335 38 is_stmt 1 view .LVU167 + ARM GAS /tmp/ccwR4KB7.s page 93 + + + 452 .loc 1 2385 38 is_stmt 1 view .LVU167 453 .LVL27: -2336:Src/main.c **** task.tau = (float)(*temp2); temp2++; - 454 .loc 1 2336 2 view .LVU168 - 455 .loc 1 2336 29 is_stmt 0 view .LVU169 +2386:Src/main.c **** task.tau = (float)(*temp2); temp2++; + 454 .loc 1 2386 2 view .LVU168 + 455 .loc 1 2386 29 is_stmt 0 view .LVU169 456 00ec 418A ldrh r1, [r0, #18] - 457 .loc 1 2336 19 view .LVU170 + 457 .loc 1 2386 19 view .LVU170 458 00ee D982 strh r1, [r3, #22] @ movhi - 459 .loc 1 2336 38 is_stmt 1 view .LVU171 + 459 .loc 1 2386 38 is_stmt 1 view .LVU171 460 .LVL28: -2337:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; - 461 .loc 1 2337 2 view .LVU172 - 462 .loc 1 2337 29 is_stmt 0 view .LVU173 +2387:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; + 461 .loc 1 2387 2 view .LVU172 + 462 .loc 1 2387 29 is_stmt 0 view .LVU173 463 00f0 818A ldrh r1, [r0, #20] 464 00f2 07EE901A vmov s15, r1 @ int - 465 .loc 1 2337 21 view .LVU174 + 465 .loc 1 2387 21 view .LVU174 466 00f6 F8EE677A vcvt.f32.u32 s15, s15 - 467 .loc 1 2337 37 view .LVU175 + 467 .loc 1 2387 37 view .LVU175 468 00fa 9FED187A vldr.32 s14, .L14+12 469 00fe 67EE877A vmul.f32 s15, s15, s14 - 470 .loc 1 2337 19 view .LVU176 + 470 .loc 1 2387 19 view .LVU176 471 0102 C3ED0A7A vstr.32 s15, [r3, #40] - 472 .loc 1 2337 46 is_stmt 1 view .LVU177 + 472 .loc 1 2387 46 is_stmt 1 view .LVU177 473 .LVL29: -2338:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; - 474 .loc 1 2338 2 view .LVU178 - 475 .loc 1 2338 29 is_stmt 0 view .LVU179 +2388:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; + 474 .loc 1 2388 2 view .LVU178 + 475 .loc 1 2388 29 is_stmt 0 view .LVU179 476 0106 C18A ldrh r1, [r0, #22] 477 0108 07EE901A vmov s15, r1 @ int - 478 .loc 1 2338 21 view .LVU180 + 478 .loc 1 2388 21 view .LVU180 479 010c F8EE677A vcvt.f32.u32 s15, s15 - 480 .loc 1 2338 37 view .LVU181 + 480 .loc 1 2388 37 view .LVU181 481 0110 67EE877A vmul.f32 s15, s15, s14 - 482 .loc 1 2338 19 view .LVU182 + 482 .loc 1 2388 19 view .LVU182 483 0114 C3ED097A vstr.32 s15, [r3, #36] - 484 .loc 1 2338 46 is_stmt 1 view .LVU183 + 484 .loc 1 2388 46 is_stmt 1 view .LVU183 485 .LVL30: -2339:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; - 486 .loc 1 2339 2 view .LVU184 - 487 .loc 1 2339 29 is_stmt 0 view .LVU185 +2389:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; + 486 .loc 1 2389 2 view .LVU184 + 487 .loc 1 2389 29 is_stmt 0 view .LVU185 488 0118 018B ldrh r1, [r0, #24] 489 011a 07EE901A vmov s15, r1 @ int - 490 .loc 1 2339 21 view .LVU186 + 490 .loc 1 2389 21 view .LVU186 491 011e F8EE677A vcvt.f32.u32 s15, s15 - 492 .loc 1 2339 37 view .LVU187 + 492 .loc 1 2389 37 view .LVU187 493 0122 67EE877A vmul.f32 s15, s15, s14 - 494 .loc 1 2339 19 view .LVU188 + 494 .loc 1 2389 19 view .LVU188 495 0126 C3ED0C7A vstr.32 s15, [r3, #48] - 496 .loc 1 2339 46 is_stmt 1 view .LVU189 + 496 .loc 1 2389 46 is_stmt 1 view .LVU189 497 .LVL31: - ARM GAS /tmp/ccYgfTud.s page 93 - - -2340:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; - 498 .loc 1 2340 2 view .LVU190 - 499 .loc 1 2340 29 is_stmt 0 view .LVU191 +2390:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; + 498 .loc 1 2390 2 view .LVU190 + 499 .loc 1 2390 29 is_stmt 0 view .LVU191 500 012a 418B ldrh r1, [r0, #26] 501 012c 07EE901A vmov s15, r1 @ int - 502 .loc 1 2340 21 view .LVU192 + 502 .loc 1 2390 21 view .LVU192 503 0130 F8EE677A vcvt.f32.u32 s15, s15 - 504 .loc 1 2340 37 view .LVU193 + ARM GAS /tmp/ccwR4KB7.s page 94 + + + 504 .loc 1 2390 37 view .LVU193 505 0134 67EE877A vmul.f32 s15, s15, s14 - 506 .loc 1 2340 19 view .LVU194 + 506 .loc 1 2390 19 view .LVU194 507 0138 C3ED0B7A vstr.32 s15, [r3, #44] - 508 .loc 1 2340 46 is_stmt 1 view .LVU195 + 508 .loc 1 2390 46 is_stmt 1 view .LVU195 509 .LVL32: -2341:Src/main.c **** -2342:Src/main.c **** TO10_counter = task.dt / 10; - 510 .loc 1 2342 2 view .LVU196 - 511 .loc 1 2342 25 is_stmt 0 view .LVU197 +2391:Src/main.c **** +2392:Src/main.c **** TO10_counter = task.dt / 10; + 510 .loc 1 2392 2 view .LVU196 + 511 .loc 1 2392 25 is_stmt 0 view .LVU197 512 013c 084B ldr r3, .L14+16 513 013e A3FB0232 umull r3, r2, r3, r2 514 0142 D208 lsrs r2, r2, #3 - 515 .loc 1 2342 15 view .LVU198 + 515 .loc 1 2392 15 view .LVU198 516 0144 074B ldr r3, .L14+20 517 0146 1A60 str r2, [r3] -2343:Src/main.c **** } - 518 .loc 1 2343 1 view .LVU199 +2393:Src/main.c **** } + 518 .loc 1 2393 1 view .LVU199 519 0148 02B0 add sp, sp, #8 520 .LCFI5: 521 .cfi_def_cfa_offset 0 @@ -5569,755 +5622,996 @@ ARM GAS /tmp/ccYgfTud.s page 1 540 .thumb_func 542 PID_Controller_Temp: 543 .LVL33: - 544 .LFB1221: -2344:Src/main.c **** -2345:Src/main.c **** void OUT_trigger(uint8_t out_n) -2346:Src/main.c **** { -2347:Src/main.c **** switch (out_n) -2348:Src/main.c **** { -2349:Src/main.c **** case 0: -2350:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); -2351:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - ARM GAS /tmp/ccYgfTud.s page 94 + 544 .LFB1224: +2394:Src/main.c **** +2395:Src/main.c **** void OUT_trigger(uint8_t out_n) +2396:Src/main.c **** { +2397:Src/main.c **** switch (out_n) +2398:Src/main.c **** { +2399:Src/main.c **** case 0: +2400:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); +2401:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); +2402:Src/main.c **** break; +2403:Src/main.c **** +2404:Src/main.c **** case 1: +2405:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); +2406:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); +2407:Src/main.c **** break; +2408:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 95 -2352:Src/main.c **** break; -2353:Src/main.c **** -2354:Src/main.c **** case 1: -2355:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); -2356:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); -2357:Src/main.c **** break; -2358:Src/main.c **** -2359:Src/main.c **** case 2: -2360:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); -2361:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); -2362:Src/main.c **** break; -2363:Src/main.c **** -2364:Src/main.c **** case 3: -2365:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); -2366:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); -2367:Src/main.c **** break; -2368:Src/main.c **** -2369:Src/main.c **** case 4: -2370:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); -2371:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); -2372:Src/main.c **** break; -2373:Src/main.c **** -2374:Src/main.c **** case 5: -2375:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); -2376:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); -2377:Src/main.c **** break; -2378:Src/main.c **** -2379:Src/main.c **** case 6: -2380:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); -2381:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); -2382:Src/main.c **** break; -2383:Src/main.c **** -2384:Src/main.c **** case 7: -2385:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); -2386:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); -2387:Src/main.c **** break; -2388:Src/main.c **** -2389:Src/main.c **** case 8: -2390:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); -2391:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); -2392:Src/main.c **** break; -2393:Src/main.c **** -2394:Src/main.c **** case 9: -2395:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); -2396:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); -2397:Src/main.c **** break; -2398:Src/main.c **** } -2399:Src/main.c **** } -2400:Src/main.c **** -2401:Src/main.c **** static void AD9102_Init(void) -2402:Src/main.c **** { -2403:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2404:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); -2405:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -2406:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); -2407:Src/main.c **** -2408:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); - ARM GAS /tmp/ccYgfTud.s page 95 - - -2409:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2410:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2411:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2412:Src/main.c **** } +2409:Src/main.c **** case 2: +2410:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); +2411:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); +2412:Src/main.c **** break; 2413:Src/main.c **** -2414:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value) -2415:Src/main.c **** { -2416:Src/main.c **** uint32_t tmp32 = 0; -2417:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address +2414:Src/main.c **** case 3: +2415:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); +2416:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); +2417:Src/main.c **** break; 2418:Src/main.c **** -2419:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) -2420:Src/main.c **** { -2421:Src/main.c **** LL_SPI_Enable(SPI2); -2422:Src/main.c **** } +2419:Src/main.c **** case 4: +2420:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); +2421:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); +2422:Src/main.c **** break; 2423:Src/main.c **** -2424:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); -2425:Src/main.c **** -2426:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2427:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); -2428:Src/main.c **** tmp32 = 0; -2429:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2430:Src/main.c **** (void) SPI2->DR; -2431:Src/main.c **** -2432:Src/main.c **** tmp32 = 0; -2433:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2434:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); -2435:Src/main.c **** tmp32 = 0; -2436:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2437:Src/main.c **** (void) SPI2->DR; +2424:Src/main.c **** case 5: +2425:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); +2426:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); +2427:Src/main.c **** break; +2428:Src/main.c **** +2429:Src/main.c **** case 6: +2430:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); +2431:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); +2432:Src/main.c **** break; +2433:Src/main.c **** +2434:Src/main.c **** case 7: +2435:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); +2436:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); +2437:Src/main.c **** break; 2438:Src/main.c **** -2439:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2440:Src/main.c **** } -2441:Src/main.c **** -2442:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr) -2443:Src/main.c **** { -2444:Src/main.c **** uint32_t tmp32 = 0; -2445:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) -2446:Src/main.c **** uint16_t value; -2447:Src/main.c **** -2448:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) -2449:Src/main.c **** { -2450:Src/main.c **** LL_SPI_Enable(SPI2); -2451:Src/main.c **** } -2452:Src/main.c **** -2453:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); -2454:Src/main.c **** -2455:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2456:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); -2457:Src/main.c **** tmp32 = 0; -2458:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2459:Src/main.c **** (void) SPI2->DR; -2460:Src/main.c **** -2461:Src/main.c **** tmp32 = 0; -2462:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2463:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); -2464:Src/main.c **** tmp32 = 0; -2465:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - ARM GAS /tmp/ccYgfTud.s page 96 +2439:Src/main.c **** case 8: +2440:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); +2441:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); +2442:Src/main.c **** break; +2443:Src/main.c **** +2444:Src/main.c **** case 9: +2445:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); +2446:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); +2447:Src/main.c **** break; +2448:Src/main.c **** } +2449:Src/main.c **** } +2450:Src/main.c **** +2451:Src/main.c **** static void AD9102_Init(void) +2452:Src/main.c **** { +2453:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2454:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); +2455:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2456:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +2457:Src/main.c **** +2458:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); +2459:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2460:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2461:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2462:Src/main.c **** } +2463:Src/main.c **** +2464:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value) +2465:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 96 -2466:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); -2467:Src/main.c **** -2468:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2469:Src/main.c **** return value; -2470:Src/main.c **** } -2471:Src/main.c **** -2472:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) -2473:Src/main.c **** { -2474:Src/main.c **** for (uint16_t i = 0; i < count; i++) -2475:Src/main.c **** { -2476:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]); -2477:Src/main.c **** } -2478:Src/main.c **** } -2479:Src/main.c **** -2480:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, -2481:Src/main.c **** { -2482:Src/main.c **** if (enable) -2483:Src/main.c **** { -2484:Src/main.c **** uint16_t saw_cfg; -2485:Src/main.c **** uint16_t pat_timebase; -2486:Src/main.c **** -2487:Src/main.c **** if (saw_step == 0u) -2488:Src/main.c **** { -2489:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; -2490:Src/main.c **** } -2491:Src/main.c **** if (saw_step > 63u) -2492:Src/main.c **** { -2493:Src/main.c **** saw_step = 63u; -2494:Src/main.c **** } -2495:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | -2496:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); -2497:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | -2498:Src/main.c **** ((pat_base & 0x0Fu) << 4) | -2499:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); -2500:Src/main.c **** -2501:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); -2502:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); -2503:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); -2504:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); -2505:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat -2506:Src/main.c **** -2507:Src/main.c **** // Update RUN then RAMUPDATE at the end of the write sequence. -2508:Src/main.c **** // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. -2509:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2510:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); -2511:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2512:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -2513:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); -2514:Src/main.c **** } -2515:Src/main.c **** else -2516:Src/main.c **** { -2517:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2518:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2519:Src/main.c **** } -2520:Src/main.c **** -2521:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); -2522:Src/main.c **** } - ARM GAS /tmp/ccYgfTud.s page 97 +2466:Src/main.c **** uint32_t tmp32 = 0; +2467:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address +2468:Src/main.c **** +2469:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) +2470:Src/main.c **** { +2471:Src/main.c **** LL_SPI_Enable(SPI2); +2472:Src/main.c **** } +2473:Src/main.c **** +2474:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2475:Src/main.c **** +2476:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2477:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2478:Src/main.c **** tmp32 = 0; +2479:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2480:Src/main.c **** (void) SPI2->DR; +2481:Src/main.c **** +2482:Src/main.c **** tmp32 = 0; +2483:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2484:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); +2485:Src/main.c **** tmp32 = 0; +2486:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2487:Src/main.c **** (void) SPI2->DR; +2488:Src/main.c **** +2489:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2490:Src/main.c **** } +2491:Src/main.c **** +2492:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr) +2493:Src/main.c **** { +2494:Src/main.c **** uint32_t tmp32 = 0; +2495:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) +2496:Src/main.c **** uint16_t value; +2497:Src/main.c **** +2498:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) +2499:Src/main.c **** { +2500:Src/main.c **** LL_SPI_Enable(SPI2); +2501:Src/main.c **** } +2502:Src/main.c **** +2503:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2504:Src/main.c **** +2505:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2506:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2507:Src/main.c **** tmp32 = 0; +2508:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2509:Src/main.c **** (void) SPI2->DR; +2510:Src/main.c **** +2511:Src/main.c **** tmp32 = 0; +2512:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2513:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); +2514:Src/main.c **** tmp32 = 0; +2515:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2516:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); +2517:Src/main.c **** +2518:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2519:Src/main.c **** return value; +2520:Src/main.c **** } +2521:Src/main.c **** +2522:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) + ARM GAS /tmp/ccwR4KB7.s page 97 -2523:Src/main.c **** -2524:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t -2525:Src/main.c **** { -2526:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); -2527:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); -2528:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); -2529:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); -2530:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | -2531:Src/main.c **** ((pat_base & 0x0Fu) << 4) | -2532:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); -2533:Src/main.c **** -2534:Src/main.c **** if (saw_step == 0u) -2535:Src/main.c **** { -2536:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; -2537:Src/main.c **** } -2538:Src/main.c **** if (saw_step > 63u) -2539:Src/main.c **** { -2540:Src/main.c **** saw_step = 63u; -2541:Src/main.c **** } -2542:Src/main.c **** if (pat_period == 0u) -2543:Src/main.c **** { -2544:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; -2545:Src/main.c **** } -2546:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | -2547:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); -2548:Src/main.c **** -2549:Src/main.c **** uint8_t ok = 1u; +2523:Src/main.c **** { +2524:Src/main.c **** for (uint16_t i = 0; i < count; i++) +2525:Src/main.c **** { +2526:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]); +2527:Src/main.c **** } +2528:Src/main.c **** } +2529:Src/main.c **** +2530:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, +2531:Src/main.c **** { +2532:Src/main.c **** if (enable) +2533:Src/main.c **** { +2534:Src/main.c **** uint16_t saw_cfg; +2535:Src/main.c **** uint16_t pat_timebase; +2536:Src/main.c **** +2537:Src/main.c **** if (saw_step == 0u) +2538:Src/main.c **** { +2539:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +2540:Src/main.c **** } +2541:Src/main.c **** if (saw_step > 63u) +2542:Src/main.c **** { +2543:Src/main.c **** saw_step = 63u; +2544:Src/main.c **** } +2545:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +2547:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +2548:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +2549:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); 2550:Src/main.c **** -2551:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. -2552:Src/main.c **** if (spiconfig != 0x0000u) -2553:Src/main.c **** { -2554:Src/main.c **** ok = 0u; -2555:Src/main.c **** } +2551:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); +2552:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); +2553:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); +2554:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); +2555:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat 2556:Src/main.c **** -2557:Src/main.c **** // Power blocks should not be powered down. -2558:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) -2559:Src/main.c **** { -2560:Src/main.c **** ok = 0u; -2561:Src/main.c **** } -2562:Src/main.c **** -2563:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence). -2564:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) -2565:Src/main.c **** { -2566:Src/main.c **** ok = 0u; -2567:Src/main.c **** } -2568:Src/main.c **** -2569:Src/main.c **** // Any configuration error flags indicate a bad setup. -2570:Src/main.c **** if (cfg_err & 0x003Fu) -2571:Src/main.c **** { -2572:Src/main.c **** ok = 0u; -2573:Src/main.c **** } -2574:Src/main.c **** -2575:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) -2576:Src/main.c **** { -2577:Src/main.c **** ok = 0u; -2578:Src/main.c **** } -2579:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 98 +2557:Src/main.c **** // Update RUN then RAMUPDATE at the end of the write sequence. +2558:Src/main.c **** // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. +2559:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2560:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); +2561:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2562:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2563:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); +2564:Src/main.c **** } +2565:Src/main.c **** else +2566:Src/main.c **** { +2567:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2568:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2569:Src/main.c **** } +2570:Src/main.c **** +2571:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +2572:Src/main.c **** } +2573:Src/main.c **** +2574:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle) +2575:Src/main.c **** { +2576:Src/main.c **** if (samples < 2u) +2577:Src/main.c **** { +2578:Src/main.c **** samples = 2u; +2579:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 98 -2580:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) +2580:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) 2581:Src/main.c **** { -2582:Src/main.c **** ok = 0u; +2582:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; 2583:Src/main.c **** } -2584:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) -2585:Src/main.c **** { -2586:Src/main.c **** ok = 0u; -2587:Src/main.c **** } -2588:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) +2584:Src/main.c **** +2585:Src/main.c **** // Enable SRAM access. +2586:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); +2587:Src/main.c **** +2588:Src/main.c **** for (uint16_t i = 0; i < samples; i++) 2589:Src/main.c **** { -2590:Src/main.c **** ok = 0u; -2591:Src/main.c **** } -2592:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) -2593:Src/main.c **** { -2594:Src/main.c **** ok = 0u; -2595:Src/main.c **** } -2596:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) -2597:Src/main.c **** { -2598:Src/main.c **** ok = 0u; -2599:Src/main.c **** } -2600:Src/main.c **** -2601:Src/main.c **** return (ok ? 0u : 1u); -2602:Src/main.c **** } -2603:Src/main.c **** -2604:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) -2605:Src/main.c **** { -2606:Src/main.c **** uint32_t tmp32; -2607:Src/main.c **** -2608:Src/main.c **** #if AD9102_ON_SPI2 -2609:Src/main.c **** // AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts. -2610:Src/main.c **** if (num == 1 || num == 3) -2611:Src/main.c **** { -2612:Src/main.c **** return; -2613:Src/main.c **** } -2614:Src/main.c **** #endif -2615:Src/main.c **** -2616:Src/main.c **** switch (num) -2617:Src/main.c **** { -2618:Src/main.c **** case 1: -2619:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2620:Src/main.c **** //tmp32=0; -2621:Src/main.c **** //while(tmp32<500){tmp32++;} -2622:Src/main.c **** tmp32 = 0; -2623:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2624:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2625:Src/main.c **** tmp32 = 0; -2626:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2627:Src/main.c **** (void) SPI2->DR; -2628:Src/main.c **** break; -2629:Src/main.c **** case 2: -2630:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes -2631:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2632:Src/main.c **** //tmp32=0; -2633:Src/main.c **** //while(tmp32<500){tmp32++;} -2634:Src/main.c **** tmp32 = 0; -2635:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2636:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - ARM GAS /tmp/ccYgfTud.s page 99 +2590:Src/main.c **** int32_t value; +2591:Src/main.c **** if (triangle) +2592:Src/main.c **** { +2593:Src/main.c **** uint16_t half = samples / 2u; +2594:Src/main.c **** if (half == 0u) +2595:Src/main.c **** { +2596:Src/main.c **** half = 1u; +2597:Src/main.c **** } +2598:Src/main.c **** if (i < half) +2599:Src/main.c **** { +2600:Src/main.c **** uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u; +2601:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + +2602:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; +2603:Src/main.c **** } +2604:Src/main.c **** else +2605:Src/main.c **** { +2606:Src/main.c **** uint16_t tail = (uint16_t)(samples - half); +2607:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; +2608:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - +2609:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom; +2610:Src/main.c **** } +2611:Src/main.c **** } +2612:Src/main.c **** else +2613:Src/main.c **** { +2614:Src/main.c **** uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u; +2615:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + +2616:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; +2617:Src/main.c **** } +2618:Src/main.c **** +2619:Src/main.c **** if (value < -8192) +2620:Src/main.c **** { +2621:Src/main.c **** value = -8192; +2622:Src/main.c **** } +2623:Src/main.c **** else if (value > 8191) +2624:Src/main.c **** { +2625:Src/main.c **** value = 8191; +2626:Src/main.c **** } +2627:Src/main.c **** +2628:Src/main.c **** uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu; +2629:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); +2630:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); +2631:Src/main.c **** } +2632:Src/main.c **** +2633:Src/main.c **** // Disable SRAM access. +2634:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2635:Src/main.c **** } +2636:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 99 -2637:Src/main.c **** tmp32 = 0; -2638:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2639:Src/main.c **** (void) SPI6->DR; -2640:Src/main.c **** break; -2641:Src/main.c **** case 3: -2642:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with -2643:Src/main.c **** //tmp32=0; -2644:Src/main.c **** //while(tmp32<500){tmp32++;} -2645:Src/main.c **** tmp32 = 0; -2646:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2647:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2648:Src/main.c **** tmp32 = 0; -2649:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2650:Src/main.c **** (void) SPI2->DR; -2651:Src/main.c **** break; -2652:Src/main.c **** case 4: -2653:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with -2654:Src/main.c **** //tmp32=0; -2655:Src/main.c **** //while(tmp32<500){tmp32++;} -2656:Src/main.c **** tmp32 = 0; -2657:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2658:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -2659:Src/main.c **** tmp32 = 0; -2660:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2661:Src/main.c **** (void) SPI6->DR; -2662:Src/main.c **** break; -2663:Src/main.c **** } -2664:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 -2665:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 -2666:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 -2667:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 -2668:Src/main.c **** } -2669:Src/main.c **** static uint16_t MPhD_T(uint8_t num) -2670:Src/main.c **** { -2671:Src/main.c **** uint16_t P; -2672:Src/main.c **** uint32_t tmp32; -2673:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2674:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2675:Src/main.c **** tmp32=0; -2676:Src/main.c **** while(tmp32<500){tmp32++;} -2677:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2678:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2679:Src/main.c **** tmp32=0; -2680:Src/main.c **** while(tmp32<500){tmp32++;} -2681:Src/main.c **** if (num==1)//MPD1 -2682:Src/main.c **** { -2683:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2684:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); -2685:Src/main.c **** tmp32=0; -2686:Src/main.c **** while(tmp32<500){tmp32++;} -2687:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2688:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC -2689:Src/main.c **** tmp32 = 0; -2690:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2691:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC -2692:Src/main.c **** while(tmp32<500){tmp32++;} -2693:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - ARM GAS /tmp/ccYgfTud.s page 100 +2637:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle) +2638:Src/main.c **** { +2639:Src/main.c **** if (samples == 0u) +2640:Src/main.c **** { +2641:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; +2642:Src/main.c **** } +2643:Src/main.c **** if (samples < 2u) +2644:Src/main.c **** { +2645:Src/main.c **** samples = 2u; +2646:Src/main.c **** } +2647:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +2648:Src/main.c **** { +2649:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +2650:Src/main.c **** } +2651:Src/main.c **** if (hold == 0u) +2652:Src/main.c **** { +2653:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +2654:Src/main.c **** } +2655:Src/main.c **** if (hold > 0x0Fu) +2656:Src/main.c **** { +2657:Src/main.c **** hold = 0x0Fu; +2658:Src/main.c **** } +2659:Src/main.c **** +2660:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | +2661:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | +2662:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); +2663:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); +2664:Src/main.c **** if (pat_period == 0u) +2665:Src/main.c **** { +2666:Src/main.c **** pat_period = samples; +2667:Src/main.c **** } +2668:Src/main.c **** if (pat_period > 0xFFFFu) +2669:Src/main.c **** { +2670:Src/main.c **** pat_period = 0xFFFFu; +2671:Src/main.c **** } +2672:Src/main.c **** +2673:Src/main.c **** AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); +2674:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2675:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); +2676:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); +2677:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); +2678:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); +2679:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); +2680:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat +2681:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); +2682:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); +2683:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); +2684:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2685:Src/main.c **** +2686:Src/main.c **** AD9102_LoadSramRamp(samples, triangle); +2687:Src/main.c **** +2688:Src/main.c **** if (enable) +2689:Src/main.c **** { +2690:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2691:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); +2692:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2693:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + ARM GAS /tmp/ccwR4KB7.s page 100 -2694:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -2695:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2696:Src/main.c **** } -2697:Src/main.c **** else if (num==2)//MPD2 -2698:Src/main.c **** { -2699:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2700:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); -2701:Src/main.c **** tmp32=0; -2702:Src/main.c **** while(tmp32<500){tmp32++;} -2703:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2704:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC -2705:Src/main.c **** tmp32 = 0; -2706:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2707:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC -2708:Src/main.c **** while(tmp32<500){tmp32++;} -2709:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2710:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2711:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -2712:Src/main.c **** } -2713:Src/main.c **** else if (num==3)//ThrLD1 -2714:Src/main.c **** { -2715:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -2716:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -2717:Src/main.c **** tmp32=0; -2718:Src/main.c **** while(tmp32<500){tmp32++;} -2719:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2720:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC -2721:Src/main.c **** tmp32 = 0; -2722:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2723:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC -2724:Src/main.c **** while(tmp32<500){tmp32++;} -2725:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2726:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2727:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2728:Src/main.c **** } -2729:Src/main.c **** else if (num==4)//ThrLD2 -2730:Src/main.c **** { -2731:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2732:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -2733:Src/main.c **** tmp32=0; -2734:Src/main.c **** while(tmp32<500){tmp32++;} -2735:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2736:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC -2737:Src/main.c **** tmp32 = 0; -2738:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2739:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC -2740:Src/main.c **** while(tmp32<500){tmp32++;} -2741:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2742:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2743:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -2744:Src/main.c **** } -2745:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; -2746:Src/main.c **** -2747:Src/main.c **** Inorm = (float) (65535) / (float) (100); -2748:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); -2749:Src/main.c **** Tnorm2 = 4; -2750:Src/main.c **** Pnorm = (float)(65535) / (float)(20); - ARM GAS /tmp/ccYgfTud.s page 101 +2694:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); +2695:Src/main.c **** } +2696:Src/main.c **** else +2697:Src/main.c **** { +2698:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2699:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2700:Src/main.c **** } +2701:Src/main.c **** +2702:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +2703:Src/main.c **** } +2704:Src/main.c **** +2705:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t +2706:Src/main.c **** { +2707:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); +2708:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); +2709:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); +2710:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); +2711:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +2712:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +2713:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); +2714:Src/main.c **** +2715:Src/main.c **** if (saw_step == 0u) +2716:Src/main.c **** { +2717:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +2718:Src/main.c **** } +2719:Src/main.c **** if (saw_step > 63u) +2720:Src/main.c **** { +2721:Src/main.c **** saw_step = 63u; +2722:Src/main.c **** } +2723:Src/main.c **** if (pat_period == 0u) +2724:Src/main.c **** { +2725:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; +2726:Src/main.c **** } +2727:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +2728:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +2729:Src/main.c **** +2730:Src/main.c **** uint8_t ok = 1u; +2731:Src/main.c **** +2732:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. +2733:Src/main.c **** if (spiconfig != 0x0000u) +2734:Src/main.c **** { +2735:Src/main.c **** ok = 0u; +2736:Src/main.c **** } +2737:Src/main.c **** +2738:Src/main.c **** // Power blocks should not be powered down. +2739:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) +2740:Src/main.c **** { +2741:Src/main.c **** ok = 0u; +2742:Src/main.c **** } +2743:Src/main.c **** +2744:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence). +2745:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) +2746:Src/main.c **** { +2747:Src/main.c **** ok = 0u; +2748:Src/main.c **** } +2749:Src/main.c **** +2750:Src/main.c **** // Any configuration error flags indicate a bad setup. + ARM GAS /tmp/ccwR4KB7.s page 101 -2751:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system -2752:Src/main.c **** T0m = 48.6282; -2753:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; -2754:Src/main.c **** -2755:Src/main.c **** Ith = I0m * expf(T_C/T0m); -2756:Src/main.c **** I_LD = (float) (C_LD) / Inorm; -2757:Src/main.c **** -2758:Src/main.c **** if (I_LD > Ith) -2759:Src/main.c **** { -2760:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ -2761:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; -2762:Src/main.c **** } -2763:Src/main.c **** else -2764:Src/main.c **** { -2765:Src/main.c **** P = 0; -2766:Src/main.c **** } */ -2767:Src/main.c **** return P; -2768:Src/main.c **** } -2769:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time -2770:Src/main.c **** { -2771:Src/main.c **** uint16_t Result; -2772:Src/main.c **** // uint8_t randf; -2773:Src/main.c **** -2774:Src/main.c **** randf = 0; -2775:Src/main.c **** for (uint8_t i = 0; i < 32; i++) -2776:Src/main.c **** { -2777:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; -2778:Src/main.c **** } -2779:Src/main.c **** -2780:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl -2781:Src/main.c **** -2782:Src/main.c **** return (uint16_t)(Result); -2783:Src/main.c **** }*/ -2784:Src/main.c **** static uint16_t Get_ADC(uint8_t num) -2785:Src/main.c **** { -2786:Src/main.c **** uint16_t OUT; -2787:Src/main.c **** switch (num) -2788:Src/main.c **** { -2789:Src/main.c **** case 0: -2790:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on -2791:Src/main.c **** break; -2792:Src/main.c **** case 1: -2793:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion -2794:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc -2795:Src/main.c **** break; -2796:Src/main.c **** case 2: -2797:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off -2798:Src/main.c **** break; -2799:Src/main.c **** case 3: -2800:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on -2801:Src/main.c **** break; -2802:Src/main.c **** case 4: -2803:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion -2804:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc -2805:Src/main.c **** break; -2806:Src/main.c **** case 5: -2807:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off - ARM GAS /tmp/ccYgfTud.s page 102 +2751:Src/main.c **** if (cfg_err & 0x003Fu) +2752:Src/main.c **** { +2753:Src/main.c **** ok = 0u; +2754:Src/main.c **** } +2755:Src/main.c **** +2756:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) +2757:Src/main.c **** { +2758:Src/main.c **** ok = 0u; +2759:Src/main.c **** } +2760:Src/main.c **** +2761:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) +2762:Src/main.c **** { +2763:Src/main.c **** ok = 0u; +2764:Src/main.c **** } +2765:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) +2766:Src/main.c **** { +2767:Src/main.c **** ok = 0u; +2768:Src/main.c **** } +2769:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) +2770:Src/main.c **** { +2771:Src/main.c **** ok = 0u; +2772:Src/main.c **** } +2773:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) +2774:Src/main.c **** { +2775:Src/main.c **** ok = 0u; +2776:Src/main.c **** } +2777:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) +2778:Src/main.c **** { +2779:Src/main.c **** ok = 0u; +2780:Src/main.c **** } +2781:Src/main.c **** +2782:Src/main.c **** return (ok ? 0u : 1u); +2783:Src/main.c **** } +2784:Src/main.c **** +2785:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin +2786:Src/main.c **** { +2787:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); +2788:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); +2789:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); +2790:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); +2791:Src/main.c **** +2792:Src/main.c **** if (samples == 0u) +2793:Src/main.c **** { +2794:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; +2795:Src/main.c **** } +2796:Src/main.c **** if (samples < 2u) +2797:Src/main.c **** { +2798:Src/main.c **** samples = 2u; +2799:Src/main.c **** } +2800:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +2801:Src/main.c **** { +2802:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +2803:Src/main.c **** } +2804:Src/main.c **** if (hold == 0u) +2805:Src/main.c **** { +2806:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +2807:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 102 -2808:Src/main.c **** break; -2809:Src/main.c **** } -2810:Src/main.c **** return OUT; -2811:Src/main.c **** } +2808:Src/main.c **** if (hold > 0x0Fu) +2809:Src/main.c **** { +2810:Src/main.c **** hold = 0x0Fu; +2811:Src/main.c **** } 2812:Src/main.c **** -2813:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results -2814:Src/main.c **** { -2815:Src/main.c **** // Main idea: -2816:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat -2817:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept -2818:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t -2819:Src/main.c **** // So, equation should be look like this: -2820:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) -2821:Src/main.c **** // t -- cycle phase -2822:Src/main.c **** // a,b,c -- constants -2823:Src/main.c **** // -2824:Src/main.c **** // How can we control laser diode temperature? -2825:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. -2826:Src/main.c **** // Then we should measure wavelength. -2827:Src/main.c **** // Calibration sequence: -2828:Src/main.c **** // 1) n +2813:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | +2814:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | +2815:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); +2816:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); +2817:Src/main.c **** if (pat_period == 0u) +2818:Src/main.c **** { +2819:Src/main.c **** pat_period = samples; +2820:Src/main.c **** } +2821:Src/main.c **** if (pat_period > 0xFFFFu) +2822:Src/main.c **** { +2823:Src/main.c **** pat_period = 0xFFFFu; +2824:Src/main.c **** } +2825:Src/main.c **** +2826:Src/main.c **** uint16_t stop_addr = (uint16_t)((samples - 1u) << 4); +2827:Src/main.c **** +2828:Src/main.c **** uint8_t ok = 1u; 2829:Src/main.c **** -2830:Src/main.c **** -2831:Src/main.c **** -2832:Src/main.c **** int e_pid; -2833:Src/main.c **** float P_coef_current;//, I_coef_current; -2834:Src/main.c **** float e_integral; -2835:Src/main.c **** int x_output; -2836:Src/main.c **** -2837:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; -2838:Src/main.c **** -2839:Src/main.c **** e_integral = LDx_results->e_integral; -2840:Src/main.c **** -2841:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ -2842:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 -2843:Src/main.c **** } -2844:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; -2845:Src/main.c **** -2846:Src/main.c **** if (e_integral > 32000){ -2847:Src/main.c **** e_integral = 32000; -2848:Src/main.c **** } -2849:Src/main.c **** else if (e_integral < - 32000){ -2850:Src/main.c **** e_integral = -32000; -2851:Src/main.c **** } -2852:Src/main.c **** LDx_results->e_integral = e_integral; -2853:Src/main.c **** -2854:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in -2855:Src/main.c **** -2856:Src/main.c **** if(x_output < 1000){ -2857:Src/main.c **** x_output = 8800; +2830:Src/main.c **** if (spiconfig != 0x0000u) +2831:Src/main.c **** { +2832:Src/main.c **** ok = 0u; +2833:Src/main.c **** } +2834:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) +2835:Src/main.c **** { +2836:Src/main.c **** ok = 0u; +2837:Src/main.c **** } +2838:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) +2839:Src/main.c **** { +2840:Src/main.c **** ok = 0u; +2841:Src/main.c **** } +2842:Src/main.c **** if (cfg_err & 0x003Fu) +2843:Src/main.c **** { +2844:Src/main.c **** ok = 0u; +2845:Src/main.c **** } +2846:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) +2847:Src/main.c **** { +2848:Src/main.c **** ok = 0u; +2849:Src/main.c **** } +2850:Src/main.c **** +2851:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG) +2852:Src/main.c **** { +2853:Src/main.c **** ok = 0u; +2854:Src/main.c **** } +2855:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) +2856:Src/main.c **** { +2857:Src/main.c **** ok = 0u; 2858:Src/main.c **** } -2859:Src/main.c **** else if(x_output > 56800){ -2860:Src/main.c **** x_output = 56800; -2861:Src/main.c **** } -2862:Src/main.c **** -2863:Src/main.c **** if (num==2) -2864:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - ARM GAS /tmp/ccYgfTud.s page 103 +2859:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period) +2860:Src/main.c **** { +2861:Src/main.c **** ok = 0u; +2862:Src/main.c **** } +2863:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) +2864:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 103 -2865:Src/main.c **** -2866:Src/main.c **** return (uint16_t)x_output; -2867:Src/main.c **** } -2868:Src/main.c **** -2869:Src/main.c **** -2870:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin -2871:Src/main.c **** { - 545 .loc 1 2871 1 is_stmt 1 view -0 +2865:Src/main.c **** ok = 0u; +2866:Src/main.c **** } +2867:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u) +2868:Src/main.c **** { +2869:Src/main.c **** ok = 0u; +2870:Src/main.c **** } +2871:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr) +2872:Src/main.c **** { +2873:Src/main.c **** ok = 0u; +2874:Src/main.c **** } +2875:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT) +2876:Src/main.c **** { +2877:Src/main.c **** ok = 0u; +2878:Src/main.c **** } +2879:Src/main.c **** +2880:Src/main.c **** return (ok ? 0u : 1u); +2881:Src/main.c **** } +2882:Src/main.c **** +2883:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) +2884:Src/main.c **** { +2885:Src/main.c **** uint32_t tmp32; +2886:Src/main.c **** +2887:Src/main.c **** #if AD9102_ON_SPI2 +2888:Src/main.c **** // AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts. +2889:Src/main.c **** if (num == 1 || num == 3) +2890:Src/main.c **** { +2891:Src/main.c **** return; +2892:Src/main.c **** } +2893:Src/main.c **** #endif +2894:Src/main.c **** +2895:Src/main.c **** switch (num) +2896:Src/main.c **** { +2897:Src/main.c **** case 1: +2898:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2899:Src/main.c **** //tmp32=0; +2900:Src/main.c **** //while(tmp32<500){tmp32++;} +2901:Src/main.c **** tmp32 = 0; +2902:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2903:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2904:Src/main.c **** tmp32 = 0; +2905:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2906:Src/main.c **** (void) SPI2->DR; +2907:Src/main.c **** break; +2908:Src/main.c **** case 2: +2909:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes +2910:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2911:Src/main.c **** //tmp32=0; +2912:Src/main.c **** //while(tmp32<500){tmp32++;} +2913:Src/main.c **** tmp32 = 0; +2914:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2915:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +2916:Src/main.c **** tmp32 = 0; +2917:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2918:Src/main.c **** (void) SPI6->DR; +2919:Src/main.c **** break; +2920:Src/main.c **** case 3: +2921:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with + ARM GAS /tmp/ccwR4KB7.s page 104 + + +2922:Src/main.c **** //tmp32=0; +2923:Src/main.c **** //while(tmp32<500){tmp32++;} +2924:Src/main.c **** tmp32 = 0; +2925:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2926:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2927:Src/main.c **** tmp32 = 0; +2928:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2929:Src/main.c **** (void) SPI2->DR; +2930:Src/main.c **** break; +2931:Src/main.c **** case 4: +2932:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with +2933:Src/main.c **** //tmp32=0; +2934:Src/main.c **** //while(tmp32<500){tmp32++;} +2935:Src/main.c **** tmp32 = 0; +2936:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2937:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +2938:Src/main.c **** tmp32 = 0; +2939:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2940:Src/main.c **** (void) SPI6->DR; +2941:Src/main.c **** break; +2942:Src/main.c **** } +2943:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +2944:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +2945:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +2946:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +2947:Src/main.c **** } +2948:Src/main.c **** static uint16_t MPhD_T(uint8_t num) +2949:Src/main.c **** { +2950:Src/main.c **** uint16_t P; +2951:Src/main.c **** uint32_t tmp32; +2952:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2953:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2954:Src/main.c **** tmp32=0; +2955:Src/main.c **** while(tmp32<500){tmp32++;} +2956:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2957:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2958:Src/main.c **** tmp32=0; +2959:Src/main.c **** while(tmp32<500){tmp32++;} +2960:Src/main.c **** if (num==1)//MPD1 +2961:Src/main.c **** { +2962:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +2963:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); +2964:Src/main.c **** tmp32=0; +2965:Src/main.c **** while(tmp32<500){tmp32++;} +2966:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2967:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +2968:Src/main.c **** tmp32 = 0; +2969:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2970:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC +2971:Src/main.c **** while(tmp32<500){tmp32++;} +2972:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2973:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2974:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +2975:Src/main.c **** } +2976:Src/main.c **** else if (num==2)//MPD2 +2977:Src/main.c **** { +2978:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); + ARM GAS /tmp/ccwR4KB7.s page 105 + + +2979:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); +2980:Src/main.c **** tmp32=0; +2981:Src/main.c **** while(tmp32<500){tmp32++;} +2982:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2983:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +2984:Src/main.c **** tmp32 = 0; +2985:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2986:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC +2987:Src/main.c **** while(tmp32<500){tmp32++;} +2988:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2989:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +2990:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2991:Src/main.c **** } +2992:Src/main.c **** else if (num==3)//ThrLD1 +2993:Src/main.c **** { +2994:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2995:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +2996:Src/main.c **** tmp32=0; +2997:Src/main.c **** while(tmp32<500){tmp32++;} +2998:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2999:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC +3000:Src/main.c **** tmp32 = 0; +3001:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3002:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC +3003:Src/main.c **** while(tmp32<500){tmp32++;} +3004:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3005:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +3006:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +3007:Src/main.c **** } +3008:Src/main.c **** else if (num==4)//ThrLD2 +3009:Src/main.c **** { +3010:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +3011:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +3012:Src/main.c **** tmp32=0; +3013:Src/main.c **** while(tmp32<500){tmp32++;} +3014:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3015:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC +3016:Src/main.c **** tmp32 = 0; +3017:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3018:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC +3019:Src/main.c **** while(tmp32<500){tmp32++;} +3020:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3021:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +3022:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +3023:Src/main.c **** } +3024:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; +3025:Src/main.c **** +3026:Src/main.c **** Inorm = (float) (65535) / (float) (100); +3027:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); +3028:Src/main.c **** Tnorm2 = 4; +3029:Src/main.c **** Pnorm = (float)(65535) / (float)(20); +3030:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system +3031:Src/main.c **** T0m = 48.6282; +3032:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; +3033:Src/main.c **** +3034:Src/main.c **** Ith = I0m * expf(T_C/T0m); +3035:Src/main.c **** I_LD = (float) (C_LD) / Inorm; + ARM GAS /tmp/ccwR4KB7.s page 106 + + +3036:Src/main.c **** +3037:Src/main.c **** if (I_LD > Ith) +3038:Src/main.c **** { +3039:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ +3040:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; +3041:Src/main.c **** } +3042:Src/main.c **** else +3043:Src/main.c **** { +3044:Src/main.c **** P = 0; +3045:Src/main.c **** } */ +3046:Src/main.c **** return P; +3047:Src/main.c **** } +3048:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time +3049:Src/main.c **** { +3050:Src/main.c **** uint16_t Result; +3051:Src/main.c **** // uint8_t randf; +3052:Src/main.c **** +3053:Src/main.c **** randf = 0; +3054:Src/main.c **** for (uint8_t i = 0; i < 32; i++) +3055:Src/main.c **** { +3056:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; +3057:Src/main.c **** } +3058:Src/main.c **** +3059:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl +3060:Src/main.c **** +3061:Src/main.c **** return (uint16_t)(Result); +3062:Src/main.c **** }*/ +3063:Src/main.c **** static uint16_t Get_ADC(uint8_t num) +3064:Src/main.c **** { +3065:Src/main.c **** uint16_t OUT; +3066:Src/main.c **** switch (num) +3067:Src/main.c **** { +3068:Src/main.c **** case 0: +3069:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on +3070:Src/main.c **** break; +3071:Src/main.c **** case 1: +3072:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion +3073:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc +3074:Src/main.c **** break; +3075:Src/main.c **** case 2: +3076:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off +3077:Src/main.c **** break; +3078:Src/main.c **** case 3: +3079:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on +3080:Src/main.c **** break; +3081:Src/main.c **** case 4: +3082:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion +3083:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc +3084:Src/main.c **** break; +3085:Src/main.c **** case 5: +3086:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off +3087:Src/main.c **** break; +3088:Src/main.c **** } +3089:Src/main.c **** return OUT; +3090:Src/main.c **** } +3091:Src/main.c **** +3092:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results + ARM GAS /tmp/ccwR4KB7.s page 107 + + +3093:Src/main.c **** { +3094:Src/main.c **** // Main idea: +3095:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat +3096:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept +3097:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t +3098:Src/main.c **** // So, equation should be look like this: +3099:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) +3100:Src/main.c **** // t -- cycle phase +3101:Src/main.c **** // a,b,c -- constants +3102:Src/main.c **** // +3103:Src/main.c **** // How can we control laser diode temperature? +3104:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. +3105:Src/main.c **** // Then we should measure wavelength. +3106:Src/main.c **** // Calibration sequence: +3107:Src/main.c **** // 1) n +3108:Src/main.c **** +3109:Src/main.c **** +3110:Src/main.c **** +3111:Src/main.c **** int e_pid; +3112:Src/main.c **** float P_coef_current;//, I_coef_current; +3113:Src/main.c **** float e_integral; +3114:Src/main.c **** int x_output; +3115:Src/main.c **** +3116:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; +3117:Src/main.c **** +3118:Src/main.c **** e_integral = LDx_results->e_integral; +3119:Src/main.c **** +3120:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ +3121:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 +3122:Src/main.c **** } +3123:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; +3124:Src/main.c **** +3125:Src/main.c **** if (e_integral > 32000){ +3126:Src/main.c **** e_integral = 32000; +3127:Src/main.c **** } +3128:Src/main.c **** else if (e_integral < - 32000){ +3129:Src/main.c **** e_integral = -32000; +3130:Src/main.c **** } +3131:Src/main.c **** LDx_results->e_integral = e_integral; +3132:Src/main.c **** +3133:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in +3134:Src/main.c **** +3135:Src/main.c **** if(x_output < 1000){ +3136:Src/main.c **** x_output = 8800; +3137:Src/main.c **** } +3138:Src/main.c **** else if(x_output > 56800){ +3139:Src/main.c **** x_output = 56800; +3140:Src/main.c **** } +3141:Src/main.c **** +3142:Src/main.c **** if (num==2) +3143:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +3144:Src/main.c **** +3145:Src/main.c **** return (uint16_t)x_output; +3146:Src/main.c **** } +3147:Src/main.c **** +3148:Src/main.c **** +3149:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin + ARM GAS /tmp/ccwR4KB7.s page 108 + + +3150:Src/main.c **** { + 545 .loc 1 3150 1 is_stmt 1 view -0 546 .cfi_startproc 547 @ args = 0, pretend = 0, frame = 0 548 @ frame_needed = 0, uses_anonymous_args = 0 549 @ link register save eliminated. - 550 .loc 1 2871 1 is_stmt 0 view .LVU201 + 550 .loc 1 3150 1 is_stmt 0 view .LVU201 551 0000 30B4 push {r4, r5} 552 .LCFI6: 553 .cfi_def_cfa_offset 8 554 .cfi_offset 4, -8 555 .cfi_offset 5, -4 -2872:Src/main.c **** int e_pid; - 556 .loc 1 2872 2 is_stmt 1 view .LVU202 -2873:Src/main.c **** float P_coef_current;//, I_coef_current; - 557 .loc 1 2873 2 view .LVU203 -2874:Src/main.c **** float e_integral; - 558 .loc 1 2874 2 view .LVU204 -2875:Src/main.c **** int x_output; - 559 .loc 1 2875 2 view .LVU205 -2876:Src/main.c **** -2877:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; - 560 .loc 1 2877 2 view .LVU206 - 561 .loc 1 2877 28 is_stmt 0 view .LVU207 +3151:Src/main.c **** int e_pid; + 556 .loc 1 3151 2 is_stmt 1 view .LVU202 +3152:Src/main.c **** float P_coef_current;//, I_coef_current; + 557 .loc 1 3152 2 view .LVU203 +3153:Src/main.c **** float e_integral; + 558 .loc 1 3153 2 view .LVU204 +3154:Src/main.c **** int x_output; + 559 .loc 1 3154 2 view .LVU205 +3155:Src/main.c **** +3156:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; + 560 .loc 1 3156 2 view .LVU206 + 561 .loc 1 3156 28 is_stmt 0 view .LVU207 562 0002 0B88 ldrh r3, [r1] - 563 .loc 1 2877 65 view .LVU208 + 563 .loc 1 3156 65 view .LVU208 564 0004 0488 ldrh r4, [r0] - 565 .loc 1 2877 8 view .LVU209 + 565 .loc 1 3156 8 view .LVU209 566 0006 1B1B subs r3, r3, r4 567 .LVL34: -2878:Src/main.c **** -2879:Src/main.c **** e_integral = LDx_results->e_integral; - 568 .loc 1 2879 2 is_stmt 1 view .LVU210 - 569 .loc 1 2879 13 is_stmt 0 view .LVU211 +3157:Src/main.c **** +3158:Src/main.c **** e_integral = LDx_results->e_integral; + 568 .loc 1 3158 2 is_stmt 1 view .LVU210 + 569 .loc 1 3158 13 is_stmt 0 view .LVU211 570 0008 D1ED017A vldr.32 s15, [r1, #4] 571 .LVL35: -2880:Src/main.c **** -2881:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ - 572 .loc 1 2881 2 is_stmt 1 view .LVU212 - 573 .loc 1 2881 20 is_stmt 0 view .LVU213 +3159:Src/main.c **** +3160:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ + 572 .loc 1 3160 2 is_stmt 1 view .LVU212 + 573 .loc 1 3160 20 is_stmt 0 view .LVU213 574 000c 03F6B73C addw ip, r3, #2999 - 575 .loc 1 2881 4 view .LVU214 + 575 .loc 1 3160 4 view .LVU214 576 0010 41F26E74 movw r4, #5998 577 0014 A445 cmp ip, r4 578 0016 18D8 bhi .L17 -2882:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 579 .loc 1 2882 3 is_stmt 1 view .LVU215 - 580 .loc 1 2882 31 is_stmt 0 view .LVU216 +3161:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 579 .loc 1 3161 3 is_stmt 1 view .LVU215 + 580 .loc 1 3161 31 is_stmt 0 view .LVU216 581 0018 90ED027A vldr.32 s14, [r0, #8] - 582 .loc 1 2882 47 view .LVU217 + 582 .loc 1 3161 47 view .LVU217 583 001c 06EE903A vmov s13, r3 @ int - ARM GAS /tmp/ccYgfTud.s page 104 - - 584 0020 F8EEE66A vcvt.f32.s32 s13, s13 - 585 .loc 1 2882 45 view .LVU218 + 585 .loc 1 3161 45 view .LVU218 586 0024 27EE267A vmul.f32 s14, s14, s13 - 587 .loc 1 2882 76 view .LVU219 + 587 .loc 1 3161 76 view .LVU219 588 0028 284C ldr r4, .L27 589 002a 2468 ldr r4, [r4] + ARM GAS /tmp/ccwR4KB7.s page 109 + + 590 002c 284D ldr r5, .L27+4 591 002e 2D68 ldr r5, [r5] 592 0030 641B subs r4, r4, r5 - 593 .loc 1 2882 64 view .LVU220 + 593 .loc 1 3161 64 view .LVU220 594 0032 06EE904A vmov s13, r4 @ int 595 0036 F8EE666A vcvt.f32.u32 s13, s13 - 596 .loc 1 2882 62 view .LVU221 + 596 .loc 1 3161 62 view .LVU221 597 003a 27EE267A vmul.f32 s14, s14, s13 - 598 .loc 1 2882 87 view .LVU222 + 598 .loc 1 3161 87 view .LVU222 599 003e 9FED256A vldr.32 s12, .L27+8 600 0042 C7EE066A vdiv.f32 s13, s14, s12 - 601 .loc 1 2882 14 view .LVU223 + 601 .loc 1 3161 14 view .LVU223 602 0046 77EEA67A vadd.f32 s15, s15, s13 603 .LVL36: 604 .L17: -2883:Src/main.c **** } -2884:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; - 605 .loc 1 2884 2 is_stmt 1 view .LVU224 - 606 .loc 1 2884 17 is_stmt 0 view .LVU225 +3162:Src/main.c **** } +3163:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; + 605 .loc 1 3163 2 is_stmt 1 view .LVU224 + 606 .loc 1 3163 17 is_stmt 0 view .LVU225 607 004a D0ED016A vldr.32 s13, [r0, #4] 608 .LVL37: -2885:Src/main.c **** -2886:Src/main.c **** if (e_integral > 32000){ - 609 .loc 1 2886 2 is_stmt 1 view .LVU226 - 610 .loc 1 2886 5 is_stmt 0 view .LVU227 +3164:Src/main.c **** +3165:Src/main.c **** if (e_integral > 32000){ + 609 .loc 1 3165 2 is_stmt 1 view .LVU226 + 610 .loc 1 3165 5 is_stmt 0 view .LVU227 611 004e 9FED227A vldr.32 s14, .L27+12 612 0052 F4EEC77A vcmpe.f32 s15, s14 613 0056 F1EE10FA vmrs APSR_nzcv, FPSCR 614 005a 09DC bgt .L21 -2887:Src/main.c **** e_integral = 32000; -2888:Src/main.c **** } -2889:Src/main.c **** else if (e_integral < - 32000){ - 615 .loc 1 2889 7 is_stmt 1 view .LVU228 - 616 .loc 1 2889 10 is_stmt 0 view .LVU229 +3166:Src/main.c **** e_integral = 32000; +3167:Src/main.c **** } +3168:Src/main.c **** else if (e_integral < - 32000){ + 615 .loc 1 3168 7 is_stmt 1 view .LVU228 + 616 .loc 1 3168 10 is_stmt 0 view .LVU229 617 005c 9FED1F7A vldr.32 s14, .L27+16 618 0060 F4EEC77A vcmpe.f32 s15, s14 619 0064 F1EE10FA vmrs APSR_nzcv, FPSCR 620 0068 04D5 bpl .L18 -2890:Src/main.c **** e_integral = -32000; - 621 .loc 1 2890 15 view .LVU230 +3169:Src/main.c **** e_integral = -32000; + 621 .loc 1 3169 15 view .LVU230 622 006a DFED1C7A vldr.32 s15, .L27+16 623 .LVL38: - 624 .loc 1 2890 15 view .LVU231 + 624 .loc 1 3169 15 view .LVU231 625 006e 01E0 b .L18 626 .LVL39: 627 .L21: -2887:Src/main.c **** e_integral = 32000; - 628 .loc 1 2887 15 view .LVU232 +3166:Src/main.c **** e_integral = 32000; + 628 .loc 1 3166 15 view .LVU232 629 0070 DFED197A vldr.32 s15, .L27+12 630 .LVL40: 631 .L18: - ARM GAS /tmp/ccYgfTud.s page 105 - - -2891:Src/main.c **** } -2892:Src/main.c **** LDx_results->e_integral = e_integral; - 632 .loc 1 2892 2 is_stmt 1 view .LVU233 - 633 .loc 1 2892 26 is_stmt 0 view .LVU234 +3170:Src/main.c **** } +3171:Src/main.c **** LDx_results->e_integral = e_integral; + 632 .loc 1 3171 2 is_stmt 1 view .LVU233 + 633 .loc 1 3171 26 is_stmt 0 view .LVU234 634 0074 C1ED017A vstr.32 s15, [r1, #4] -2893:Src/main.c **** -2894:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in - 635 .loc 1 2894 2 is_stmt 1 view .LVU235 - 636 .loc 1 2894 36 is_stmt 0 view .LVU236 +3172:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 110 + + +3173:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in + 635 .loc 1 3173 2 is_stmt 1 view .LVU235 + 636 .loc 1 3173 36 is_stmt 0 view .LVU236 637 0078 07EE103A vmov s14, r3 @ int 638 007c B8EEC77A vcvt.f32.s32 s14, s14 639 0080 27EE267A vmul.f32 s14, s14, s13 - 640 .loc 1 2894 19 view .LVU237 + 640 .loc 1 3173 19 view .LVU237 641 0084 DFED166A vldr.32 s13, .L27+20 642 .LVL41: - 643 .loc 1 2894 19 view .LVU238 + 643 .loc 1 3173 19 view .LVU238 644 0088 37EE267A vadd.f32 s14, s14, s13 - 645 .loc 1 2894 46 view .LVU239 + 645 .loc 1 3173 46 view .LVU239 646 008c FDEEE77A vcvt.s32.f32 s15, s15 647 .LVL42: - 648 .loc 1 2894 44 view .LVU240 + 648 .loc 1 3173 44 view .LVU240 649 0090 F8EEE77A vcvt.f32.s32 s15, s15 650 0094 77EE877A vadd.f32 s15, s15, s14 - 651 .loc 1 2894 11 view .LVU241 + 651 .loc 1 3173 11 view .LVU241 652 0098 FDEEE77A vcvt.s32.f32 s15, s15 653 009c 17EE900A vmov r0, s15 @ int 654 .LVL43: -2895:Src/main.c **** -2896:Src/main.c **** if(x_output < 1000){ - 655 .loc 1 2896 2 is_stmt 1 view .LVU242 - 656 .loc 1 2896 4 is_stmt 0 view .LVU243 +3174:Src/main.c **** +3175:Src/main.c **** if(x_output < 1000){ + 655 .loc 1 3175 2 is_stmt 1 view .LVU242 + 656 .loc 1 3175 4 is_stmt 0 view .LVU243 657 00a0 B0F57A7F cmp r0, #1000 658 00a4 06DB blt .L23 -2897:Src/main.c **** x_output = 8800; -2898:Src/main.c **** } -2899:Src/main.c **** else if(x_output > 56800){ - 659 .loc 1 2899 7 is_stmt 1 view .LVU244 - 660 .loc 1 2899 9 is_stmt 0 view .LVU245 +3176:Src/main.c **** x_output = 8800; +3177:Src/main.c **** } +3178:Src/main.c **** else if(x_output > 56800){ + 659 .loc 1 3178 7 is_stmt 1 view .LVU244 + 660 .loc 1 3178 9 is_stmt 0 view .LVU245 661 00a6 4DF6E053 movw r3, #56800 662 .LVL44: - 663 .loc 1 2899 9 view .LVU246 + 663 .loc 1 3178 9 view .LVU246 664 00aa 9842 cmp r0, r3 665 00ac 04DD ble .L19 -2900:Src/main.c **** x_output = 56800; - 666 .loc 1 2900 12 view .LVU247 +3179:Src/main.c **** x_output = 56800; + 666 .loc 1 3179 12 view .LVU247 667 00ae 4DF6E050 movw r0, #56800 668 .LVL45: - 669 .loc 1 2900 12 view .LVU248 + 669 .loc 1 3179 12 view .LVU248 670 00b2 01E0 b .L19 671 .LVL46: 672 .L23: -2897:Src/main.c **** x_output = 8800; - 673 .loc 1 2897 12 view .LVU249 +3176:Src/main.c **** x_output = 8800; + 673 .loc 1 3176 12 view .LVU249 674 00b4 42F26020 movw r0, #8800 675 .LVL47: 676 .L19: -2901:Src/main.c **** } - ARM GAS /tmp/ccYgfTud.s page 106 - - -2902:Src/main.c **** -2903:Src/main.c **** if (num==2) - 677 .loc 1 2903 2 is_stmt 1 view .LVU250 - 678 .loc 1 2903 5 is_stmt 0 view .LVU251 +3180:Src/main.c **** } +3181:Src/main.c **** +3182:Src/main.c **** if (num==2) + 677 .loc 1 3182 2 is_stmt 1 view .LVU250 + 678 .loc 1 3182 5 is_stmt 0 view .LVU251 679 00b8 022A cmp r2, #2 680 00ba 02D0 beq .L26 + ARM GAS /tmp/ccwR4KB7.s page 111 + + 681 .LVL48: 682 .L20: -2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -2905:Src/main.c **** -2906:Src/main.c **** return (uint16_t)x_output; - 683 .loc 1 2906 2 is_stmt 1 view .LVU252 -2907:Src/main.c **** } - 684 .loc 1 2907 1 is_stmt 0 view .LVU253 +3183:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +3184:Src/main.c **** +3185:Src/main.c **** return (uint16_t)x_output; + 683 .loc 1 3185 2 is_stmt 1 view .LVU252 +3186:Src/main.c **** } + 684 .loc 1 3186 1 is_stmt 0 view .LVU253 685 00bc 80B2 uxth r0, r0 686 .LVL49: - 687 .loc 1 2907 1 view .LVU254 + 687 .loc 1 3186 1 view .LVU254 688 00be 30BC pop {r4, r5} 689 .LCFI7: 690 .cfi_remember_state @@ -6329,15 +6623,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 696 .L26: 697 .LCFI8: 698 .cfi_restore_state -2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 699 .loc 1 2904 3 is_stmt 1 view .LVU255 -2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 700 .loc 1 2904 11 is_stmt 0 view .LVU256 +3183:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 699 .loc 1 3183 3 is_stmt 1 view .LVU255 +3183:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 700 .loc 1 3183 11 is_stmt 0 view .LVU256 701 00c2 024B ldr r3, .L27 702 00c4 1A68 ldr r2, [r3] 703 .LVL51: -2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 704 .loc 1 2904 11 view .LVU257 +3183:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 704 .loc 1 3183 11 view .LVU257 705 00c6 024B ldr r3, .L27+4 706 00c8 1A60 str r2, [r3] 707 00ca F7E7 b .L20 @@ -6351,25 +6645,25 @@ ARM GAS /tmp/ccYgfTud.s page 1 715 00dc 0000FAC6 .word -956694528 716 00e0 00000047 .word 1191182336 717 .cfi_endproc - 718 .LFE1221: + 718 .LFE1224: 720 .section .text.AD9102_WriteReg,"ax",%progbits 721 .align 1 722 .syntax unified 723 .thumb 724 .thumb_func 726 AD9102_WriteReg: - ARM GAS /tmp/ccYgfTud.s page 107 - - 727 .LVL52: 728 .LFB1212: -2415:Src/main.c **** uint32_t tmp32 = 0; - 729 .loc 1 2415 1 is_stmt 1 view -0 +2465:Src/main.c **** uint32_t tmp32 = 0; + 729 .loc 1 2465 1 is_stmt 1 view -0 730 .cfi_startproc 731 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccwR4KB7.s page 112 + + 732 @ frame_needed = 0, uses_anonymous_args = 0 -2415:Src/main.c **** uint32_t tmp32 = 0; - 733 .loc 1 2415 1 is_stmt 0 view .LVU259 +2465:Src/main.c **** uint32_t tmp32 = 0; + 733 .loc 1 2465 1 is_stmt 0 view .LVU259 734 0000 38B5 push {r3, r4, r5, lr} 735 .LCFI9: 736 .cfi_def_cfa_offset 16 @@ -6378,19 +6672,19 @@ ARM GAS /tmp/ccYgfTud.s page 1 739 .cfi_offset 5, -8 740 .cfi_offset 14, -4 741 0002 0C46 mov r4, r1 -2416:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address - 742 .loc 1 2416 2 is_stmt 1 view .LVU260 +2466:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + 742 .loc 1 2466 2 is_stmt 1 view .LVU260 743 .LVL53: -2417:Src/main.c **** - 744 .loc 1 2417 2 view .LVU261 -2417:Src/main.c **** - 745 .loc 1 2417 11 is_stmt 0 view .LVU262 +2467:Src/main.c **** + 744 .loc 1 2467 2 view .LVU261 +2467:Src/main.c **** + 745 .loc 1 2467 11 is_stmt 0 view .LVU262 746 0004 C0F30E05 ubfx r5, r0, #0, #15 747 .LVL54: -2419:Src/main.c **** { - 748 .loc 1 2419 2 is_stmt 1 view .LVU263 - 749 .LBB337: - 750 .LBI337: +2469:Src/main.c **** { + 748 .loc 1 2469 2 is_stmt 1 view .LVU263 + 749 .LBB339: + 750 .LBI339: 751 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** ****************************************************************************** @@ -6418,15 +6712,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** extern "C" { 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccYgfTud.s page 108 - - 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #include "stm32f7xx.h" 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 113 + + 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defin 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6478,15 +6772,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func - ARM GAS /tmp/ccYgfTud.s page 109 - - 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPR 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @note The communication clock is derived from the master c 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func + ARM GAS /tmp/ccwR4KB7.s page 114 + + 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER. @@ -6538,15 +6832,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/ccYgfTud.s page 110 - - 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_MODE Operation Mode 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 115 + + 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) /*!< Master configuratio 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_MODE_SLAVE 0x00000000U /*!< Slave configuration 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -6598,15 +6892,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccYgfTud.s page 111 - - 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/recei 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_MSB_FIRST 0x00000000U /*!< Data is transmitted/recei 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccwR4KB7.s page 116 + + 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6658,15 +6952,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* USE_FULL_LL_DRIVER */ - ARM GAS /tmp/ccYgfTud.s page 112 - - 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_CRC_LENGTH CRC Length 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRC_8BIT 0x00000000U /*!< 8-bit CRC length */ 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRC_16BIT (SPI_CR1_CRCL) /*!< 16-bit CRC length */ + ARM GAS /tmp/ccwR4KB7.s page 117 + + 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6718,15 +7012,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported macro ------------------------------------------------------------*/ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros - ARM GAS /tmp/ccYgfTud.s page 113 - - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 118 + + 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write a value in SPI register @@ -6778,15 +7072,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SPE LL_SPI_Disable 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 114 - - 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx) 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccwR4KB7.s page 119 + + 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if SPI peripheral is enabled 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SPE LL_SPI_IsEnabled @@ -6795,7 +7089,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) 752 .loc 4 381 26 view .LVU264 - 753 .LBB338: + 753 .LBB340: 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL); 754 .loc 4 383 3 view .LVU265 @@ -6807,15 +7101,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 760 0010 04D1 bne .L30 761 .LVL55: 762 .loc 4 383 69 view .LVU268 - 763 .LBE338: - 764 .LBE337: -2421:Src/main.c **** } - 765 .loc 1 2421 3 is_stmt 1 view .LVU269 - 766 .LBB339: - 767 .LBI339: + 763 .LBE340: + 764 .LBE339: +2471:Src/main.c **** } + 765 .loc 1 2471 3 is_stmt 1 view .LVU269 + 766 .LBB341: + 767 .LBI341: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 768 .loc 4 358 22 view .LVU270 - 769 .LBB340: + 769 .LBB342: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 770 .loc 4 360 3 view .LVU271 771 0012 254A ldr r2, .L44 @@ -6826,37 +7120,37 @@ ARM GAS /tmp/ccYgfTud.s page 1 776 .L30: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 777 .loc 4 360 3 is_stmt 0 view .LVU272 - 778 .LBE340: - 779 .LBE339: -2424:Src/main.c **** - 780 .loc 1 2424 2 is_stmt 1 view .LVU273 + 778 .LBE342: + 779 .LBE341: +2474:Src/main.c **** + 780 .loc 1 2474 2 is_stmt 1 view .LVU273 781 001c 0022 movs r2, #0 782 001e 4FF48051 mov r1, #4096 783 .LVL57: -2424:Src/main.c **** - 784 .loc 1 2424 2 is_stmt 0 view .LVU274 +2474:Src/main.c **** + 784 .loc 1 2474 2 is_stmt 0 view .LVU274 785 0022 2248 ldr r0, .L44+4 786 .LVL58: -2424:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 115 - - - 787 .loc 1 2424 2 view .LVU275 +2474:Src/main.c **** + 787 .loc 1 2474 2 view .LVU275 788 0024 FFF7FEFF bl HAL_GPIO_WritePin 789 .LVL59: -2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 790 .loc 1 2426 2 is_stmt 1 view .LVU276 -2416:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address - 791 .loc 1 2416 11 is_stmt 0 view .LVU277 +2476:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 790 .loc 1 2476 2 is_stmt 1 view .LVU276 +2466:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + ARM GAS /tmp/ccwR4KB7.s page 120 + + + 791 .loc 1 2466 11 is_stmt 0 view .LVU277 792 0028 0023 movs r3, #0 793 .LVL60: 794 .L32: -2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 795 .loc 1 2426 63 is_stmt 1 discriminator 2 view .LVU278 -2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 796 .loc 1 2426 41 discriminator 2 view .LVU279 - 797 .LBB341: - 798 .LBI341: +2476:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 795 .loc 1 2476 63 is_stmt 1 discriminator 2 view .LVU278 +2476:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 796 .loc 1 2476 41 discriminator 2 view .LVU279 + 797 .LBB343: + 798 .LBI343: 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -6898,15 +7192,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_MOTOROLA 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_TI 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 116 - - 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard); 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccwR4KB7.s page 121 + + 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get serial protocol used 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 FRF LL_SPI_GetStandard @@ -6958,15 +7252,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param ClockPolarity This parameter can be one of the following values: 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_LOW 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_HIGH - ARM GAS /tmp/ccYgfTud.s page 117 - - 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccwR4KB7.s page 122 + + 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get clock polarity @@ -7018,15 +7312,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx) 538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccYgfTud.s page 118 - - 539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR)); 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set transfer bit order 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. This bit is not used in S + ARM GAS /tmp/ccwR4KB7.s page 123 + + 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 LSBFIRST LL_SPI_SetTransferBitOrder 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param BitOrder This parameter can be one of the following values: @@ -7078,15 +7372,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIMODE LL_SPI_GetTransferDirection\n 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIOE LL_SPI_GetTransferDirection 595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccYgfTud.s page 119 - - 596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_FULL_DUPLEX 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_SIMPLEX_RX 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_HALF_DUPLEX_RX 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_HALF_DUPLEX_TX 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 124 + + 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx) 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)); @@ -7138,15 +7432,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx) 652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccYgfTud.s page 120 - - 653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS)); 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set threshold of RXFIFO that triggers an RXNE event 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 FRXTH LL_SPI_SetRxFIFOThreshold + ARM GAS /tmp/ccwR4KB7.s page 125 + + 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Threshold This parameter can be one of the following values: 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_RX_FIFO_TH_HALF @@ -7198,15 +7492,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccYgfTud.s page 121 - - 710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx) 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN); 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 126 + + 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if CRC is enabled 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CRCEN LL_SPI_IsEnabledCRC @@ -7258,15 +7552,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT); 765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccYgfTud.s page 122 - - 767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set polynomial for CRC calculation 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CRCPR CRCPOLY LL_SPI_SetCRCPolynomial 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None + ARM GAS /tmp/ccwR4KB7.s page 127 + + 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly) 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -7318,15 +7612,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set NSS mode 822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note LL_SPI_NSS_SOFT Mode is not used in SPI TI mode. 823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SSM LL_SPI_SetNSSMode\n - ARM GAS /tmp/ccYgfTud.s page 123 - - 824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 SSOE LL_SPI_SetNSSMode 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param NSS This parameter can be one of the following values: 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_NSS_SOFT 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_NSS_HARD_INPUT 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_NSS_HARD_OUTPUT + ARM GAS /tmp/ccwR4KB7.s page 128 + + 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS) @@ -7378,15 +7672,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if NSS pulse is enabled - ARM GAS /tmp/ccYgfTud.s page 124 - - 881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. This bit is not used in S 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 NSSP LL_SPI_IsEnabledNSSPulse 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx) + ARM GAS /tmp/ccwR4KB7.s page 129 + + 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL); 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7418,7 +7712,7 @@ ARM GAS /tmp/ccYgfTud.s page 1 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) 799 .loc 4 916 26 view .LVU280 - 800 .LBB342: + 800 .LBB344: 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL); 801 .loc 4 918 3 view .LVU281 @@ -7430,29 +7724,29 @@ ARM GAS /tmp/ccYgfTud.s page 1 807 0032 05D1 bne .L31 808 .LVL61: 809 .loc 4 918 66 view .LVU284 - 810 .LBE342: - 811 .LBE341: -2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 812 .loc 1 2426 50 discriminator 1 view .LVU285 + 810 .LBE344: + 811 .LBE343: +2476:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 812 .loc 1 2476 50 discriminator 1 view .LVU285 813 0034 5A1C adds r2, r3, #1 814 .LVL62: -2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 815 .loc 1 2426 41 discriminator 1 view .LVU286 - ARM GAS /tmp/ccYgfTud.s page 125 - - +2476:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 815 .loc 1 2476 41 discriminator 1 view .LVU286 816 0036 B3F57A7F cmp r3, #1000 817 003a 01D2 bcs .L31 -2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 818 .loc 1 2426 50 discriminator 1 view .LVU287 +2476:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 818 .loc 1 2476 50 discriminator 1 view .LVU287 819 003c 1346 mov r3, r2 820 003e F4E7 b .L32 + ARM GAS /tmp/ccwR4KB7.s page 130 + + 821 .LVL63: 822 .L31: -2427:Src/main.c **** tmp32 = 0; - 823 .loc 1 2427 2 is_stmt 1 view .LVU288 - 824 .LBB343: - 825 .LBI343: +2477:Src/main.c **** tmp32 = 0; + 823 .loc 1 2477 2 is_stmt 1 view .LVU288 + 824 .LBB345: + 825 .LBI345: 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7498,15 +7792,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * each data transfer. 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR BSY LL_SPI_IsActiveFlag_BSY - ARM GAS /tmp/ccYgfTud.s page 126 - - 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL); + ARM GAS /tmp/ccwR4KB7.s page 131 + + 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7558,15 +7852,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx) 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccYgfTud.s page 127 - - 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR); 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear mode fault error flag 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note Clearing this flag is done by a read access to the SPIx_SR + ARM GAS /tmp/ccwR4KB7.s page 132 + + 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * register followed by a write access to the SPIx_CR1 register 1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR MODF LL_SPI_ClearFlag_MODF 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -7618,15 +7912,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_IT_Management Interrupt Management 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccYgfTud.s page 128 - - 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable error interrupt 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccwR4KB7.s page 133 + + 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx) @@ -7678,15 +7972,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE); 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccYgfTud.s page 129 - - 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable Tx buffer empty interrupt 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None + ARM GAS /tmp/ccwR4KB7.s page 134 + + 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx) 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -7738,15 +8032,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable DMA Rx 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccYgfTud.s page 130 - - 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx) 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccwR4KB7.s page 135 + + 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable DMA Rx @@ -7798,15 +8092,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccYgfTud.s page 131 - - 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL); 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 136 + + 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set parity of Last DMA reception 1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMARX LL_SPI_SetDMAParity_RX 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -7858,15 +8152,15 @@ ARM GAS /tmp/ccYgfTud.s page 1 1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx) 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> SPI_CR2_LDMATX_Pos); - ARM GAS /tmp/ccYgfTud.s page 132 - - 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get the data register address used for DMA transfer 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_DMA_GetRegAddr 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccwR4KB7.s page 137 + + 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Address of data register 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx) @@ -7918,22 +8212,22 @@ ARM GAS /tmp/ccYgfTud.s page 1 1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #else 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *((__IO uint8_t *)&SPIx->DR) = TxData; - ARM GAS /tmp/ccYgfTud.s page 133 - - 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* __GNUC__ */ 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 16-Bits in the data register 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_TransmitData16 + ARM GAS /tmp/ccwR4KB7.s page 138 + + 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) 826 .loc 4 1373 22 view .LVU289 - 827 .LBB344: + 827 .LBB346: 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR); @@ -7945,26 +8239,26 @@ ARM GAS /tmp/ccYgfTud.s page 1 832 0042 9D81 strh r5, [r3, #12] @ movhi 833 .LVL64: 834 .loc 4 1377 10 view .LVU293 - 835 .LBE344: - 836 .LBE343: -2428:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 837 .loc 1 2428 2 is_stmt 1 view .LVU294 -2429:Src/main.c **** (void) SPI2->DR; - 838 .loc 1 2429 2 view .LVU295 -2428:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 839 .loc 1 2428 8 is_stmt 0 view .LVU296 + 835 .LBE346: + 836 .LBE345: +2478:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 837 .loc 1 2478 2 is_stmt 1 view .LVU294 +2479:Src/main.c **** (void) SPI2->DR; + 838 .loc 1 2479 2 view .LVU295 +2478:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 839 .loc 1 2478 8 is_stmt 0 view .LVU296 840 0044 0023 movs r3, #0 841 .LVL65: 842 .L34: -2429:Src/main.c **** (void) SPI2->DR; - 843 .loc 1 2429 64 is_stmt 1 discriminator 2 view .LVU297 -2429:Src/main.c **** (void) SPI2->DR; - 844 .loc 1 2429 42 discriminator 2 view .LVU298 - 845 .LBB345: - 846 .LBI345: +2479:Src/main.c **** (void) SPI2->DR; + 843 .loc 1 2479 64 is_stmt 1 discriminator 2 view .LVU297 +2479:Src/main.c **** (void) SPI2->DR; + 844 .loc 1 2479 42 discriminator 2 view .LVU298 + 845 .LBB347: + 846 .LBI347: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 847 .loc 4 905 26 view .LVU299 - 848 .LBB346: + 848 .LBB348: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 849 .loc 4 907 3 view .LVU300 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7978,48 +8272,48 @@ ARM GAS /tmp/ccYgfTud.s page 1 856 .LVL66: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 857 .loc 4 907 68 view .LVU303 - ARM GAS /tmp/ccYgfTud.s page 134 - - - 858 .LBE346: - 859 .LBE345: -2429:Src/main.c **** (void) SPI2->DR; - 860 .loc 1 2429 51 discriminator 1 view .LVU304 + 858 .LBE348: + 859 .LBE347: +2479:Src/main.c **** (void) SPI2->DR; + 860 .loc 1 2479 51 discriminator 1 view .LVU304 861 0050 5A1C adds r2, r3, #1 862 .LVL67: -2429:Src/main.c **** (void) SPI2->DR; - 863 .loc 1 2429 42 discriminator 1 view .LVU305 + ARM GAS /tmp/ccwR4KB7.s page 139 + + +2479:Src/main.c **** (void) SPI2->DR; + 863 .loc 1 2479 42 discriminator 1 view .LVU305 864 0052 B3F57A7F cmp r3, #1000 865 0056 01D2 bcs .L33 -2429:Src/main.c **** (void) SPI2->DR; - 866 .loc 1 2429 51 discriminator 1 view .LVU306 +2479:Src/main.c **** (void) SPI2->DR; + 866 .loc 1 2479 51 discriminator 1 view .LVU306 867 0058 1346 mov r3, r2 868 005a F4E7 b .L34 869 .LVL68: 870 .L33: -2430:Src/main.c **** - 871 .loc 1 2430 2 is_stmt 1 view .LVU307 +2480:Src/main.c **** + 871 .loc 1 2480 2 is_stmt 1 view .LVU307 872 005c 124B ldr r3, .L44 873 005e DB68 ldr r3, [r3, #12] -2432:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 874 .loc 1 2432 2 view .LVU308 +2482:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 874 .loc 1 2482 2 view .LVU308 875 .LVL69: -2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 876 .loc 1 2433 2 view .LVU309 -2432:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 877 .loc 1 2432 8 is_stmt 0 view .LVU310 +2483:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 876 .loc 1 2483 2 view .LVU309 +2482:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 877 .loc 1 2482 8 is_stmt 0 view .LVU310 878 0060 0023 movs r3, #0 879 .LVL70: 880 .L36: -2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 881 .loc 1 2433 63 is_stmt 1 discriminator 2 view .LVU311 -2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 882 .loc 1 2433 41 discriminator 2 view .LVU312 - 883 .LBB347: - 884 .LBI347: +2483:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 881 .loc 1 2483 63 is_stmt 1 discriminator 2 view .LVU311 +2483:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 882 .loc 1 2483 41 discriminator 2 view .LVU312 + 883 .LBB349: + 884 .LBI349: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 885 .loc 4 916 26 view .LVU313 - 886 .LBB348: + 886 .LBB350: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 887 .loc 4 918 3 view .LVU314 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -8033,32 +8327,32 @@ ARM GAS /tmp/ccYgfTud.s page 1 894 .LVL71: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 895 .loc 4 918 66 view .LVU317 - 896 .LBE348: - 897 .LBE347: -2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 898 .loc 1 2433 50 discriminator 1 view .LVU318 + 896 .LBE350: + 897 .LBE349: +2483:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 898 .loc 1 2483 50 discriminator 1 view .LVU318 899 006c 5A1C adds r2, r3, #1 - ARM GAS /tmp/ccYgfTud.s page 135 - - 900 .LVL72: -2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 901 .loc 1 2433 41 discriminator 1 view .LVU319 +2483:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 901 .loc 1 2483 41 discriminator 1 view .LVU319 902 006e B3F57A7F cmp r3, #1000 903 0072 01D2 bcs .L35 -2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 904 .loc 1 2433 50 discriminator 1 view .LVU320 +2483:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + ARM GAS /tmp/ccwR4KB7.s page 140 + + + 904 .loc 1 2483 50 discriminator 1 view .LVU320 905 0074 1346 mov r3, r2 906 0076 F4E7 b .L36 907 .LVL73: 908 .L35: -2434:Src/main.c **** tmp32 = 0; - 909 .loc 1 2434 2 is_stmt 1 view .LVU321 - 910 .LBB349: - 911 .LBI349: +2484:Src/main.c **** tmp32 = 0; + 909 .loc 1 2484 2 is_stmt 1 view .LVU321 + 910 .LBB351: + 911 .LBI351: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 912 .loc 4 1373 22 view .LVU322 - 913 .LBB350: + 913 .LBB352: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; 914 .loc 4 1376 3 view .LVU323 915 .loc 4 1377 3 view .LVU324 @@ -8067,26 +8361,26 @@ ARM GAS /tmp/ccYgfTud.s page 1 918 007a 9C81 strh r4, [r3, #12] @ movhi 919 .LVL74: 920 .loc 4 1377 10 view .LVU326 - 921 .LBE350: - 922 .LBE349: -2435:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 923 .loc 1 2435 2 is_stmt 1 view .LVU327 -2436:Src/main.c **** (void) SPI2->DR; - 924 .loc 1 2436 2 view .LVU328 -2435:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 925 .loc 1 2435 8 is_stmt 0 view .LVU329 + 921 .LBE352: + 922 .LBE351: +2485:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 923 .loc 1 2485 2 is_stmt 1 view .LVU327 +2486:Src/main.c **** (void) SPI2->DR; + 924 .loc 1 2486 2 view .LVU328 +2485:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 925 .loc 1 2485 8 is_stmt 0 view .LVU329 926 007c 0023 movs r3, #0 927 .LVL75: 928 .L38: -2436:Src/main.c **** (void) SPI2->DR; - 929 .loc 1 2436 64 is_stmt 1 discriminator 2 view .LVU330 -2436:Src/main.c **** (void) SPI2->DR; - 930 .loc 1 2436 42 discriminator 2 view .LVU331 - 931 .LBB351: - 932 .LBI351: +2486:Src/main.c **** (void) SPI2->DR; + 929 .loc 1 2486 64 is_stmt 1 discriminator 2 view .LVU330 +2486:Src/main.c **** (void) SPI2->DR; + 930 .loc 1 2486 42 discriminator 2 view .LVU331 + 931 .LBB353: + 932 .LBI353: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 933 .loc 4 905 26 view .LVU332 - 934 .LBB352: + 934 .LBB354: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 935 .loc 4 907 3 view .LVU333 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -8098,45 +8392,45 @@ ARM GAS /tmp/ccYgfTud.s page 1 940 0082 12F0010F tst r2, #1 941 0086 05D1 bne .L37 942 .LVL76: - ARM GAS /tmp/ccYgfTud.s page 136 - - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 943 .loc 4 907 68 view .LVU336 - 944 .LBE352: - 945 .LBE351: -2436:Src/main.c **** (void) SPI2->DR; - 946 .loc 1 2436 51 discriminator 1 view .LVU337 + 944 .LBE354: + 945 .LBE353: +2486:Src/main.c **** (void) SPI2->DR; + 946 .loc 1 2486 51 discriminator 1 view .LVU337 + ARM GAS /tmp/ccwR4KB7.s page 141 + + 947 0088 5A1C adds r2, r3, #1 948 .LVL77: -2436:Src/main.c **** (void) SPI2->DR; - 949 .loc 1 2436 42 discriminator 1 view .LVU338 +2486:Src/main.c **** (void) SPI2->DR; + 949 .loc 1 2486 42 discriminator 1 view .LVU338 950 008a B3F57A7F cmp r3, #1000 951 008e 01D2 bcs .L37 -2436:Src/main.c **** (void) SPI2->DR; - 952 .loc 1 2436 51 discriminator 1 view .LVU339 +2486:Src/main.c **** (void) SPI2->DR; + 952 .loc 1 2486 51 discriminator 1 view .LVU339 953 0090 1346 mov r3, r2 954 0092 F4E7 b .L38 955 .LVL78: 956 .L37: -2437:Src/main.c **** - 957 .loc 1 2437 2 is_stmt 1 view .LVU340 +2487:Src/main.c **** + 957 .loc 1 2487 2 is_stmt 1 view .LVU340 958 0094 044B ldr r3, .L44 959 0096 DB68 ldr r3, [r3, #12] -2439:Src/main.c **** } - 960 .loc 1 2439 2 view .LVU341 +2489:Src/main.c **** } + 960 .loc 1 2489 2 view .LVU341 961 0098 0122 movs r2, #1 962 009a 4FF48051 mov r1, #4096 963 009e 0348 ldr r0, .L44+4 964 00a0 FFF7FEFF bl HAL_GPIO_WritePin 965 .LVL79: -2440:Src/main.c **** - 966 .loc 1 2440 1 is_stmt 0 view .LVU342 +2490:Src/main.c **** + 966 .loc 1 2490 1 is_stmt 0 view .LVU342 967 00a4 38BD pop {r3, r4, r5, pc} 968 .LVL80: 969 .L45: -2440:Src/main.c **** - 970 .loc 1 2440 1 view .LVU343 +2490:Src/main.c **** + 970 .loc 1 2490 1 view .LVU343 971 00a6 00BF .align 2 972 .L44: 973 00a8 00380040 .word 1073756160 @@ -8151,3265 +8445,4385 @@ ARM GAS /tmp/ccYgfTud.s page 1 984 AD9102_WriteRegTable: 985 .LVL81: 986 .LFB1214: -2473:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 987 .loc 1 2473 1 is_stmt 1 view -0 +2523:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 987 .loc 1 2523 1 is_stmt 1 view -0 988 .cfi_startproc 989 @ args = 0, pretend = 0, frame = 0 990 @ frame_needed = 0, uses_anonymous_args = 0 -2473:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 991 .loc 1 2473 1 is_stmt 0 view .LVU345 - ARM GAS /tmp/ccYgfTud.s page 137 - - +2523:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 991 .loc 1 2523 1 is_stmt 0 view .LVU345 992 0000 70B5 push {r4, r5, r6, lr} 993 .LCFI10: 994 .cfi_def_cfa_offset 16 995 .cfi_offset 4, -16 996 .cfi_offset 5, -12 997 .cfi_offset 6, -8 + ARM GAS /tmp/ccwR4KB7.s page 142 + + 998 .cfi_offset 14, -4 999 0002 0646 mov r6, r0 1000 0004 0D46 mov r5, r1 -2474:Src/main.c **** { - 1001 .loc 1 2474 2 is_stmt 1 view .LVU346 - 1002 .LBB353: -2474:Src/main.c **** { - 1003 .loc 1 2474 7 view .LVU347 +2524:Src/main.c **** { + 1001 .loc 1 2524 2 is_stmt 1 view .LVU346 + 1002 .LBB355: +2524:Src/main.c **** { + 1003 .loc 1 2524 7 view .LVU347 1004 .LVL82: -2474:Src/main.c **** { - 1005 .loc 1 2474 16 is_stmt 0 view .LVU348 +2524:Src/main.c **** { + 1005 .loc 1 2524 16 is_stmt 0 view .LVU348 1006 0006 0024 movs r4, #0 -2474:Src/main.c **** { - 1007 .loc 1 2474 2 view .LVU349 +2524:Src/main.c **** { + 1007 .loc 1 2524 2 view .LVU349 1008 0008 08E0 b .L47 1009 .LVL83: 1010 .L48: -2476:Src/main.c **** } - 1011 .loc 1 2476 3 is_stmt 1 view .LVU350 +2526:Src/main.c **** } + 1011 .loc 1 2526 3 is_stmt 1 view .LVU350 1012 000a 36F81410 ldrh r1, [r6, r4, lsl #1] 1013 000e 054B ldr r3, .L50 1014 0010 33F81400 ldrh r0, [r3, r4, lsl #1] 1015 0014 FFF7FEFF bl AD9102_WriteReg 1016 .LVL84: -2474:Src/main.c **** { - 1017 .loc 1 2474 35 discriminator 3 view .LVU351 +2524:Src/main.c **** { + 1017 .loc 1 2524 35 discriminator 3 view .LVU351 1018 0018 0134 adds r4, r4, #1 1019 .LVL85: -2474:Src/main.c **** { - 1020 .loc 1 2474 35 is_stmt 0 discriminator 3 view .LVU352 +2524:Src/main.c **** { + 1020 .loc 1 2524 35 is_stmt 0 discriminator 3 view .LVU352 1021 001a A4B2 uxth r4, r4 1022 .LVL86: 1023 .L47: -2474:Src/main.c **** { - 1024 .loc 1 2474 25 is_stmt 1 discriminator 1 view .LVU353 +2524:Src/main.c **** { + 1024 .loc 1 2524 25 is_stmt 1 discriminator 1 view .LVU353 1025 001c AC42 cmp r4, r5 1026 001e F4D3 bcc .L48 - 1027 .LBE353: -2478:Src/main.c **** - 1028 .loc 1 2478 1 is_stmt 0 view .LVU354 + 1027 .LBE355: +2528:Src/main.c **** + 1028 .loc 1 2528 1 is_stmt 0 view .LVU354 1029 0020 70BD pop {r4, r5, r6, pc} 1030 .LVL87: 1031 .L51: -2478:Src/main.c **** - 1032 .loc 1 2478 1 view .LVU355 +2528:Src/main.c **** + 1032 .loc 1 2528 1 view .LVU355 1033 0022 00BF .align 2 1034 .L50: 1035 0024 00000000 .word ad9102_reg_addr 1036 .cfi_endproc 1037 .LFE1214: - 1039 .section .text.AD9102_Init,"ax",%progbits - ARM GAS /tmp/ccYgfTud.s page 138 - - + 1039 .section .text.AD9102_LoadSramRamp,"ax",%progbits 1040 .align 1 1041 .syntax unified 1042 .thumb 1043 .thumb_func - 1045 AD9102_Init: - 1046 .LFB1211: -2402:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 1047 .loc 1 2402 1 is_stmt 1 view -0 - 1048 .cfi_startproc - 1049 @ args = 0, pretend = 0, frame = 8 - 1050 @ frame_needed = 0, uses_anonymous_args = 0 - 1051 0000 00B5 push {lr} - 1052 .LCFI11: - 1053 .cfi_def_cfa_offset 4 - 1054 .cfi_offset 14, -4 - 1055 0002 83B0 sub sp, sp, #12 - 1056 .LCFI12: - 1057 .cfi_def_cfa_offset 16 -2403:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); - 1058 .loc 1 2403 2 view .LVU357 - 1059 0004 0122 movs r2, #1 - 1060 0006 4FF48051 mov r1, #4096 - 1061 000a 1648 ldr r0, .L56 - 1062 000c FFF7FEFF bl HAL_GPIO_WritePin - 1063 .LVL88: -2404:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - 1064 .loc 1 2404 2 view .LVU358 - 1065 0010 0022 movs r2, #0 - 1066 0012 4021 movs r1, #64 - 1067 0014 1448 ldr r0, .L56+4 - 1068 0016 FFF7FEFF bl HAL_GPIO_WritePin - 1069 .LVL89: -2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1070 .loc 1 2405 2 view .LVU359 - 1071 .LBB354: -2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1072 .loc 1 2405 7 view .LVU360 -2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1073 .loc 1 2405 25 is_stmt 0 view .LVU361 - 1074 001a 0023 movs r3, #0 - 1075 001c 0193 str r3, [sp, #4] -2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1076 .loc 1 2405 2 view .LVU362 - 1077 001e 02E0 b .L53 - 1078 .L54: -2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1079 .loc 1 2405 48 is_stmt 1 discriminator 3 view .LVU363 -2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1080 .loc 1 2405 43 discriminator 3 view .LVU364 - 1081 0020 019B ldr r3, [sp, #4] - 1082 0022 0133 adds r3, r3, #1 - 1083 0024 0193 str r3, [sp, #4] - 1084 .L53: -2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1085 .loc 1 2405 34 discriminator 1 view .LVU365 - 1086 0026 019B ldr r3, [sp, #4] - 1087 0028 B3F57A7F cmp r3, #1000 - ARM GAS /tmp/ccYgfTud.s page 139 + 1045 AD9102_LoadSramRamp: + 1046 .LVL88: + ARM GAS /tmp/ccwR4KB7.s page 143 - 1088 002c F8D3 bcc .L54 - 1089 .LBE354: -2406:Src/main.c **** - 1090 .loc 1 2406 2 view .LVU366 - 1091 002e 0122 movs r2, #1 - 1092 0030 4021 movs r1, #64 - 1093 0032 0D48 ldr r0, .L56+4 - 1094 0034 FFF7FEFF bl HAL_GPIO_WritePin - 1095 .LVL90: -2408:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - 1096 .loc 1 2408 2 view .LVU367 - 1097 0038 4221 movs r1, #66 - 1098 003a 0C48 ldr r0, .L56+8 - 1099 003c FFF7FEFF bl AD9102_WriteRegTable - 1100 .LVL91: -2409:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 1101 .loc 1 2409 2 view .LVU368 - 1102 0040 0021 movs r1, #0 - 1103 0042 1E20 movs r0, #30 - 1104 0044 FFF7FEFF bl AD9102_WriteReg - 1105 .LVL92: -2410:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 1106 .loc 1 2410 2 view .LVU369 - 1107 0048 0121 movs r1, #1 - 1108 004a 1D20 movs r0, #29 - 1109 004c FFF7FEFF bl AD9102_WriteReg - 1110 .LVL93: -2411:Src/main.c **** } - 1111 .loc 1 2411 2 view .LVU370 - 1112 0050 0122 movs r2, #1 - 1113 0052 4FF40061 mov r1, #2048 - 1114 0056 0648 ldr r0, .L56+12 - 1115 0058 FFF7FEFF bl HAL_GPIO_WritePin - 1116 .LVL94: -2412:Src/main.c **** - 1117 .loc 1 2412 1 is_stmt 0 view .LVU371 - 1118 005c 03B0 add sp, sp, #12 - 1119 .LCFI13: - 1120 .cfi_def_cfa_offset 4 - 1121 @ sp needed - 1122 005e 5DF804FB ldr pc, [sp], #4 - 1123 .L57: - 1124 0062 00BF .align 2 - 1125 .L56: - 1126 0064 00040240 .word 1073873920 - 1127 0068 00080240 .word 1073874944 - 1128 006c 00000000 .word ad9102_example4_regval - 1129 0070 000C0240 .word 1073875968 - 1130 .cfi_endproc - 1131 .LFE1211: - 1133 .section .text.AD9102_ReadReg,"ax",%progbits - 1134 .align 1 - 1135 .syntax unified - 1136 .thumb - 1137 .thumb_func - 1139 AD9102_ReadReg: - 1140 .LVL95: - ARM GAS /tmp/ccYgfTud.s page 140 - - - 1141 .LFB1213: -2443:Src/main.c **** uint32_t tmp32 = 0; - 1142 .loc 1 2443 1 is_stmt 1 view -0 - 1143 .cfi_startproc - 1144 @ args = 0, pretend = 0, frame = 0 - 1145 @ frame_needed = 0, uses_anonymous_args = 0 -2443:Src/main.c **** uint32_t tmp32 = 0; - 1146 .loc 1 2443 1 is_stmt 0 view .LVU373 - 1147 0000 10B5 push {r4, lr} - 1148 .LCFI14: - 1149 .cfi_def_cfa_offset 8 - 1150 .cfi_offset 4, -8 - 1151 .cfi_offset 14, -4 -2444:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) - 1152 .loc 1 2444 2 is_stmt 1 view .LVU374 - 1153 .LVL96: -2445:Src/main.c **** uint16_t value; - 1154 .loc 1 2445 2 view .LVU375 -2445:Src/main.c **** uint16_t value; - 1155 .loc 1 2445 11 is_stmt 0 view .LVU376 - 1156 0002 40F40044 orr r4, r0, #32768 - 1157 .LVL97: -2446:Src/main.c **** - 1158 .loc 1 2446 2 is_stmt 1 view .LVU377 -2448:Src/main.c **** { - 1159 .loc 1 2448 2 view .LVU378 - 1160 .LBB355: - 1161 .LBI355: - 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1162 .loc 4 381 26 view .LVU379 - 1163 .LBB356: - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1164 .loc 4 383 3 view .LVU380 - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1165 .loc 4 383 12 is_stmt 0 view .LVU381 - 1166 0006 284B ldr r3, .L73 - 1167 0008 1B68 ldr r3, [r3] - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1168 .loc 4 383 69 view .LVU382 - 1169 000a 13F0400F tst r3, #64 - 1170 000e 04D1 bne .L59 - 1171 .LVL98: - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1172 .loc 4 383 69 view .LVU383 - 1173 .LBE356: - 1174 .LBE355: -2450:Src/main.c **** } - 1175 .loc 1 2450 3 is_stmt 1 view .LVU384 - 1176 .LBB357: - 1177 .LBI357: - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1178 .loc 4 358 22 view .LVU385 - 1179 .LBB358: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1180 .loc 4 360 3 view .LVU386 - 1181 0010 254A ldr r2, .L73 - 1182 0012 1368 ldr r3, [r2] - ARM GAS /tmp/ccYgfTud.s page 141 - - - 1183 0014 43F04003 orr r3, r3, #64 - 1184 0018 1360 str r3, [r2] - 1185 .LVL99: - 1186 .L59: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1187 .loc 4 360 3 is_stmt 0 view .LVU387 - 1188 .LBE358: - 1189 .LBE357: -2453:Src/main.c **** - 1190 .loc 1 2453 2 is_stmt 1 view .LVU388 - 1191 001a 0022 movs r2, #0 - 1192 001c 4FF48051 mov r1, #4096 - 1193 0020 2248 ldr r0, .L73+4 - 1194 .LVL100: -2453:Src/main.c **** - 1195 .loc 1 2453 2 is_stmt 0 view .LVU389 - 1196 0022 FFF7FEFF bl HAL_GPIO_WritePin - 1197 .LVL101: -2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1198 .loc 1 2455 2 is_stmt 1 view .LVU390 -2444:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) - 1199 .loc 1 2444 11 is_stmt 0 view .LVU391 - 1200 0026 0023 movs r3, #0 - 1201 .LVL102: - 1202 .L61: -2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1203 .loc 1 2455 63 is_stmt 1 discriminator 2 view .LVU392 -2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1204 .loc 1 2455 41 discriminator 2 view .LVU393 - 1205 .LBB359: - 1206 .LBI359: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1207 .loc 4 916 26 view .LVU394 - 1208 .LBB360: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1209 .loc 4 918 3 view .LVU395 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1210 .loc 4 918 12 is_stmt 0 view .LVU396 - 1211 0028 1F4A ldr r2, .L73 - 1212 002a 9268 ldr r2, [r2, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1213 .loc 4 918 66 view .LVU397 - 1214 002c 12F0020F tst r2, #2 - 1215 0030 05D1 bne .L60 - 1216 .LVL103: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1217 .loc 4 918 66 view .LVU398 - 1218 .LBE360: - 1219 .LBE359: -2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1220 .loc 1 2455 50 discriminator 1 view .LVU399 - 1221 0032 5A1C adds r2, r3, #1 - 1222 .LVL104: -2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1223 .loc 1 2455 41 discriminator 1 view .LVU400 - 1224 0034 B3F57A7F cmp r3, #1000 - 1225 0038 01D2 bcs .L60 - ARM GAS /tmp/ccYgfTud.s page 142 - - -2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1226 .loc 1 2455 50 discriminator 1 view .LVU401 - 1227 003a 1346 mov r3, r2 - 1228 003c F4E7 b .L61 - 1229 .LVL105: - 1230 .L60: -2456:Src/main.c **** tmp32 = 0; - 1231 .loc 1 2456 2 is_stmt 1 view .LVU402 - 1232 .LBB361: - 1233 .LBI361: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1234 .loc 4 1373 22 view .LVU403 - 1235 .LBB362: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1236 .loc 4 1376 3 view .LVU404 - 1237 .loc 4 1377 3 view .LVU405 - 1238 .loc 4 1377 10 is_stmt 0 view .LVU406 - 1239 003e 1A4B ldr r3, .L73 - 1240 0040 9C81 strh r4, [r3, #12] @ movhi - 1241 .LVL106: - 1242 .loc 4 1377 10 view .LVU407 - 1243 .LBE362: - 1244 .LBE361: -2457:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1245 .loc 1 2457 2 is_stmt 1 view .LVU408 -2458:Src/main.c **** (void) SPI2->DR; - 1246 .loc 1 2458 2 view .LVU409 -2457:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1247 .loc 1 2457 8 is_stmt 0 view .LVU410 - 1248 0042 0023 movs r3, #0 - 1249 .LVL107: - 1250 .L63: -2458:Src/main.c **** (void) SPI2->DR; - 1251 .loc 1 2458 64 is_stmt 1 discriminator 2 view .LVU411 -2458:Src/main.c **** (void) SPI2->DR; - 1252 .loc 1 2458 42 discriminator 2 view .LVU412 - 1253 .LBB363: - 1254 .LBI363: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1255 .loc 4 905 26 view .LVU413 - 1256 .LBB364: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1257 .loc 4 907 3 view .LVU414 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1258 .loc 4 907 12 is_stmt 0 view .LVU415 - 1259 0044 184A ldr r2, .L73 - 1260 0046 9268 ldr r2, [r2, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1261 .loc 4 907 68 view .LVU416 - 1262 0048 12F0010F tst r2, #1 - 1263 004c 05D1 bne .L62 - 1264 .LVL108: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1265 .loc 4 907 68 view .LVU417 - 1266 .LBE364: - 1267 .LBE363: -2458:Src/main.c **** (void) SPI2->DR; - ARM GAS /tmp/ccYgfTud.s page 143 - - - 1268 .loc 1 2458 51 discriminator 1 view .LVU418 - 1269 004e 5A1C adds r2, r3, #1 - 1270 .LVL109: -2458:Src/main.c **** (void) SPI2->DR; - 1271 .loc 1 2458 42 discriminator 1 view .LVU419 - 1272 0050 B3F57A7F cmp r3, #1000 - 1273 0054 01D2 bcs .L62 -2458:Src/main.c **** (void) SPI2->DR; - 1274 .loc 1 2458 51 discriminator 1 view .LVU420 - 1275 0056 1346 mov r3, r2 - 1276 0058 F4E7 b .L63 - 1277 .LVL110: - 1278 .L62: -2459:Src/main.c **** - 1279 .loc 1 2459 2 is_stmt 1 view .LVU421 - 1280 005a 134B ldr r3, .L73 - 1281 005c DB68 ldr r3, [r3, #12] -2461:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1282 .loc 1 2461 2 view .LVU422 - 1283 .LVL111: -2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1284 .loc 1 2462 2 view .LVU423 -2461:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1285 .loc 1 2461 8 is_stmt 0 view .LVU424 - 1286 005e 0023 movs r3, #0 - 1287 .LVL112: - 1288 .L65: -2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1289 .loc 1 2462 63 is_stmt 1 discriminator 2 view .LVU425 -2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1290 .loc 1 2462 41 discriminator 2 view .LVU426 - 1291 .LBB365: - 1292 .LBI365: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1293 .loc 4 916 26 view .LVU427 - 1294 .LBB366: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1295 .loc 4 918 3 view .LVU428 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1296 .loc 4 918 12 is_stmt 0 view .LVU429 - 1297 0060 114A ldr r2, .L73 - 1298 0062 9268 ldr r2, [r2, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1299 .loc 4 918 66 view .LVU430 - 1300 0064 12F0020F tst r2, #2 - 1301 0068 05D1 bne .L64 - 1302 .LVL113: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1303 .loc 4 918 66 view .LVU431 - 1304 .LBE366: - 1305 .LBE365: -2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1306 .loc 1 2462 50 discriminator 1 view .LVU432 - 1307 006a 5A1C adds r2, r3, #1 - 1308 .LVL114: -2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1309 .loc 1 2462 41 discriminator 1 view .LVU433 - ARM GAS /tmp/ccYgfTud.s page 144 - - - 1310 006c B3F57A7F cmp r3, #1000 - 1311 0070 01D2 bcs .L64 -2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1312 .loc 1 2462 50 discriminator 1 view .LVU434 - 1313 0072 1346 mov r3, r2 - 1314 0074 F4E7 b .L65 - 1315 .LVL115: - 1316 .L64: -2463:Src/main.c **** tmp32 = 0; - 1317 .loc 1 2463 2 is_stmt 1 view .LVU435 - 1318 .LBB367: - 1319 .LBI367: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1320 .loc 4 1373 22 view .LVU436 - 1321 .LBB368: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1322 .loc 4 1376 3 view .LVU437 - 1323 .loc 4 1377 3 view .LVU438 - 1324 .loc 4 1377 10 is_stmt 0 view .LVU439 - 1325 0076 0023 movs r3, #0 - 1326 0078 0B4A ldr r2, .L73 - 1327 007a 9381 strh r3, [r2, #12] @ movhi - 1328 .LVL116: - 1329 .loc 4 1377 10 view .LVU440 - 1330 .LBE368: - 1331 .LBE367: -2464:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1332 .loc 1 2464 2 is_stmt 1 view .LVU441 -2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1333 .loc 1 2465 2 view .LVU442 - 1334 .L67: -2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1335 .loc 1 2465 64 discriminator 2 view .LVU443 -2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1336 .loc 1 2465 42 discriminator 2 view .LVU444 - 1337 .LBB369: - 1338 .LBI369: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1339 .loc 4 905 26 view .LVU445 - 1340 .LBB370: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1341 .loc 4 907 3 view .LVU446 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1342 .loc 4 907 12 is_stmt 0 view .LVU447 - 1343 007c 0A4A ldr r2, .L73 - 1344 007e 9268 ldr r2, [r2, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1345 .loc 4 907 68 view .LVU448 - 1346 0080 12F0010F tst r2, #1 - 1347 0084 05D1 bne .L66 - 1348 .LVL117: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1349 .loc 4 907 68 view .LVU449 - 1350 .LBE370: - 1351 .LBE369: -2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1352 .loc 1 2465 51 discriminator 1 view .LVU450 - ARM GAS /tmp/ccYgfTud.s page 145 - - - 1353 0086 5A1C adds r2, r3, #1 - 1354 .LVL118: -2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1355 .loc 1 2465 42 discriminator 1 view .LVU451 - 1356 0088 B3F57A7F cmp r3, #1000 - 1357 008c 01D2 bcs .L66 -2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1358 .loc 1 2465 51 discriminator 1 view .LVU452 - 1359 008e 1346 mov r3, r2 - 1360 0090 F4E7 b .L67 - 1361 .LVL119: - 1362 .L66: -2466:Src/main.c **** - 1363 .loc 1 2466 2 is_stmt 1 view .LVU453 - 1364 .LBB371: - 1365 .LBI371: -1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1366 .loc 4 1344 26 view .LVU454 - 1367 .LBB372: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1368 .loc 4 1346 3 view .LVU455 -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1369 .loc 4 1346 21 is_stmt 0 view .LVU456 - 1370 0092 054B ldr r3, .L73 - 1371 0094 DC68 ldr r4, [r3, #12] - 1372 .LVL120: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1373 .loc 4 1346 10 view .LVU457 - 1374 0096 A4B2 uxth r4, r4 - 1375 .LVL121: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1376 .loc 4 1346 10 view .LVU458 - 1377 .LBE372: - 1378 .LBE371: -2468:Src/main.c **** return value; - 1379 .loc 1 2468 2 is_stmt 1 view .LVU459 - 1380 0098 0122 movs r2, #1 - 1381 009a 4FF48051 mov r1, #4096 - 1382 009e 0348 ldr r0, .L73+4 - 1383 00a0 FFF7FEFF bl HAL_GPIO_WritePin - 1384 .LVL122: -2469:Src/main.c **** } - 1385 .loc 1 2469 2 view .LVU460 -2470:Src/main.c **** - 1386 .loc 1 2470 1 is_stmt 0 view .LVU461 - 1387 00a4 2046 mov r0, r4 - 1388 00a6 10BD pop {r4, pc} - 1389 .LVL123: - 1390 .L74: -2470:Src/main.c **** - 1391 .loc 1 2470 1 view .LVU462 - 1392 .align 2 - 1393 .L73: - 1394 00a8 00380040 .word 1073756160 - 1395 00ac 00040240 .word 1073873920 - 1396 .cfi_endproc - 1397 .LFE1213: - ARM GAS /tmp/ccYgfTud.s page 146 - - - 1399 .section .text.AD9102_CheckFlags,"ax",%progbits - 1400 .align 1 - 1401 .syntax unified - 1402 .thumb - 1403 .thumb_func - 1405 AD9102_CheckFlags: - 1406 .LVL124: - 1407 .LFB1216: -2525:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 1408 .loc 1 2525 1 is_stmt 1 view -0 - 1409 .cfi_startproc - 1410 @ args = 8, pretend = 0, frame = 8 - 1411 @ frame_needed = 0, uses_anonymous_args = 0 -2525:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 1412 .loc 1 2525 1 is_stmt 0 view .LVU464 - 1413 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} - 1414 .LCFI15: - 1415 .cfi_def_cfa_offset 36 - 1416 .cfi_offset 4, -36 - 1417 .cfi_offset 5, -32 - 1418 .cfi_offset 6, -28 - 1419 .cfi_offset 7, -24 - 1420 .cfi_offset 8, -20 - 1421 .cfi_offset 9, -16 - 1422 .cfi_offset 10, -12 - 1423 .cfi_offset 11, -8 - 1424 .cfi_offset 14, -4 - 1425 0004 83B0 sub sp, sp, #12 - 1426 .LCFI16: - 1427 .cfi_def_cfa_offset 48 - 1428 0006 0190 str r0, [sp, #4] - 1429 0008 0F46 mov r7, r1 - 1430 000a 1546 mov r5, r2 - 1431 000c 1C46 mov r4, r3 - 1432 000e BDF834B0 ldrh fp, [sp, #52] -2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1433 .loc 1 2526 2 is_stmt 1 view .LVU465 -2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1434 .loc 1 2526 23 is_stmt 0 view .LVU466 - 1435 0012 0020 movs r0, #0 - 1436 .LVL125: -2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1437 .loc 1 2526 23 view .LVU467 - 1438 0014 FFF7FEFF bl AD9102_ReadReg - 1439 .LVL126: -2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1440 .loc 1 2526 23 view .LVU468 - 1441 0018 8246 mov r10, r0 - 1442 .LVL127: -2527:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 1443 .loc 1 2527 2 is_stmt 1 view .LVU469 -2527:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 1444 .loc 1 2527 22 is_stmt 0 view .LVU470 - 1445 001a 0120 movs r0, #1 - 1446 001c FFF7FEFF bl AD9102_ReadReg - 1447 .LVL128: - 1448 0020 8146 mov r9, r0 - ARM GAS /tmp/ccYgfTud.s page 147 - - - 1449 .LVL129: -2528:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 1450 .loc 1 2528 2 is_stmt 1 view .LVU471 -2528:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 1451 .loc 1 2528 22 is_stmt 0 view .LVU472 - 1452 0022 0220 movs r0, #2 - 1453 0024 FFF7FEFF bl AD9102_ReadReg - 1454 .LVL130: - 1455 0028 8046 mov r8, r0 - 1456 .LVL131: -2529:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 1457 .loc 1 2529 2 is_stmt 1 view .LVU473 -2529:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 1458 .loc 1 2529 21 is_stmt 0 view .LVU474 - 1459 002a 6020 movs r0, #96 - 1460 002c FFF7FEFF bl AD9102_ReadReg - 1461 .LVL132: -2530:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 1462 .loc 1 2530 2 is_stmt 1 view .LVU475 -2531:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 1463 .loc 1 2531 57 is_stmt 0 view .LVU476 - 1464 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2 - 1465 0034 1B01 lsls r3, r3, #4 - 1466 0036 03F0F003 and r3, r3, #240 -2530:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 1467 .loc 1 2530 11 view .LVU477 - 1468 003a 40F20116 movw r6, #257 - 1469 003e 1E43 orrs r6, r6, r3 - 1470 .LVL133: -2534:Src/main.c **** { - 1471 .loc 1 2534 2 is_stmt 1 view .LVU478 -2534:Src/main.c **** { - 1472 .loc 1 2534 5 is_stmt 0 view .LVU479 - 1473 0040 1CB1 cbz r4, .L88 -2538:Src/main.c **** { - 1474 .loc 1 2538 2 is_stmt 1 view .LVU480 -2538:Src/main.c **** { - 1475 .loc 1 2538 5 is_stmt 0 view .LVU481 - 1476 0042 3F2C cmp r4, #63 - 1477 0044 02D9 bls .L76 -2540:Src/main.c **** } - 1478 .loc 1 2540 12 view .LVU482 - 1479 0046 3F24 movs r4, #63 - 1480 .LVL134: -2540:Src/main.c **** } - 1481 .loc 1 2540 12 view .LVU483 - 1482 0048 00E0 b .L76 - 1483 .LVL135: - 1484 .L88: -2536:Src/main.c **** } - 1485 .loc 1 2536 12 view .LVU484 - 1486 004a 0124 movs r4, #1 - 1487 .LVL136: - 1488 .L76: -2542:Src/main.c **** { - 1489 .loc 1 2542 2 is_stmt 1 view .LVU485 -2542:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 148 - - - 1490 .loc 1 2542 5 is_stmt 0 view .LVU486 - 1491 004c BBF1000F cmp fp, #0 - 1492 0050 01D1 bne .L77 -2544:Src/main.c **** } - 1493 .loc 1 2544 14 view .LVU487 - 1494 0052 4FF6FF7B movw fp, #65535 - 1495 .L77: - 1496 .LVL137: -2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1497 .loc 1 2546 2 is_stmt 1 view .LVU488 -2547:Src/main.c **** - 1498 .loc 1 2547 35 is_stmt 0 view .LVU489 - 1499 0056 05F00305 and r5, r5, #3 - 1500 .LVL138: -2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1501 .loc 1 2546 71 view .LVU490 - 1502 005a A400 lsls r4, r4, #2 - 1503 .LVL139: -2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1504 .loc 1 2546 71 view .LVU491 - 1505 005c E4B2 uxtb r4, r4 -2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1506 .loc 1 2546 11 view .LVU492 - 1507 005e 2543 orrs r5, r5, r4 - 1508 .LVL140: -2549:Src/main.c **** - 1509 .loc 1 2549 2 is_stmt 1 view .LVU493 -2552:Src/main.c **** { - 1510 .loc 1 2552 2 view .LVU494 -2552:Src/main.c **** { - 1511 .loc 1 2552 5 is_stmt 0 view .LVU495 - 1512 0060 BAF1000F cmp r10, #0 - 1513 0064 36D1 bne .L91 -2549:Src/main.c **** - 1514 .loc 1 2549 10 view .LVU496 - 1515 0066 0124 movs r4, #1 - 1516 .L78: - 1517 .LVL141: -2558:Src/main.c **** { - 1518 .loc 1 2558 2 is_stmt 1 view .LVU497 -2558:Src/main.c **** { - 1519 .loc 1 2558 5 is_stmt 0 view .LVU498 - 1520 0068 19F4F47F tst r9, #488 - 1521 006c 00D0 beq .L79 -2560:Src/main.c **** } - 1522 .loc 1 2560 6 view .LVU499 - 1523 006e 0024 movs r4, #0 - 1524 .LVL142: - 1525 .L79: -2564:Src/main.c **** { - 1526 .loc 1 2564 2 is_stmt 1 view .LVU500 -2564:Src/main.c **** { - 1527 .loc 1 2564 5 is_stmt 0 view .LVU501 - 1528 0070 18F40E6F tst r8, #2272 - 1529 0074 00D0 beq .L80 -2566:Src/main.c **** } - 1530 .loc 1 2566 6 view .LVU502 - ARM GAS /tmp/ccYgfTud.s page 149 - - - 1531 0076 0024 movs r4, #0 - 1532 .LVL143: - 1533 .L80: -2570:Src/main.c **** { - 1534 .loc 1 2570 2 is_stmt 1 view .LVU503 -2570:Src/main.c **** { - 1535 .loc 1 2570 5 is_stmt 0 view .LVU504 - 1536 0078 10F03F0F tst r0, #63 - 1537 007c 00D0 beq .L81 -2572:Src/main.c **** } - 1538 .loc 1 2572 6 view .LVU505 - 1539 007e 0024 movs r4, #0 - 1540 .LVL144: - 1541 .L81: -2575:Src/main.c **** { - 1542 .loc 1 2575 2 is_stmt 1 view .LVU506 -2575:Src/main.c **** { - 1543 .loc 1 2575 5 is_stmt 0 view .LVU507 - 1544 0080 27B1 cbz r7, .L82 -2575:Src/main.c **** { - 1545 .loc 1 2575 17 discriminator 1 view .LVU508 - 1546 0082 019B ldr r3, [sp, #4] - 1547 0084 13F0010F tst r3, #1 - 1548 0088 00D1 bne .L82 -2577:Src/main.c **** } - 1549 .loc 1 2577 6 view .LVU509 - 1550 008a 0024 movs r4, #0 - 1551 .LVL145: - 1552 .L82: + 1047 .LFB1216: +2575:Src/main.c **** if (samples < 2u) + 1048 .loc 1 2575 1 is_stmt 1 view -0 + 1049 .cfi_startproc + 1050 @ args = 0, pretend = 0, frame = 0 + 1051 @ frame_needed = 0, uses_anonymous_args = 0 +2575:Src/main.c **** if (samples < 2u) + 1052 .loc 1 2575 1 is_stmt 0 view .LVU357 + 1053 0000 70B5 push {r4, r5, r6, lr} + 1054 .LCFI11: + 1055 .cfi_def_cfa_offset 16 + 1056 .cfi_offset 4, -16 + 1057 .cfi_offset 5, -12 + 1058 .cfi_offset 6, -8 + 1059 .cfi_offset 14, -4 + 1060 0002 0E46 mov r6, r1 +2576:Src/main.c **** { + 1061 .loc 1 2576 2 is_stmt 1 view .LVU358 +2576:Src/main.c **** { + 1062 .loc 1 2576 5 is_stmt 0 view .LVU359 + 1063 0004 0128 cmp r0, #1 + 1064 0006 06D9 bls .L64 + 1065 0008 0546 mov r5, r0 2580:Src/main.c **** { - 1553 .loc 1 2580 2 is_stmt 1 view .LVU510 + 1066 .loc 1 2580 2 is_stmt 1 view .LVU360 2580:Src/main.c **** { - 1554 .loc 1 2580 6 is_stmt 0 view .LVU511 - 1555 008c 2720 movs r0, #39 - 1556 .LVL146: -2580:Src/main.c **** { - 1557 .loc 1 2580 6 view .LVU512 - 1558 008e FFF7FEFF bl AD9102_ReadReg - 1559 .LVL147: -2580:Src/main.c **** { - 1560 .loc 1 2580 5 discriminator 1 view .LVU513 - 1561 0092 43F21223 movw r3, #12818 - 1562 0096 9842 cmp r0, r3 - 1563 0098 00D0 beq .L83 + 1067 .loc 1 2580 5 is_stmt 0 view .LVU361 + 1068 000a B0F5805F cmp r0, #4096 + 1069 000e 03D9 bls .L53 2582:Src/main.c **** } - 1564 .loc 1 2582 6 view .LVU514 - 1565 009a 0024 movs r4, #0 - 1566 .LVL148: - 1567 .L83: -2584:Src/main.c **** { - 1568 .loc 1 2584 2 is_stmt 1 view .LVU515 -2584:Src/main.c **** { - 1569 .loc 1 2584 6 is_stmt 0 view .LVU516 - 1570 009c 2820 movs r0, #40 - 1571 009e FFF7FEFF bl AD9102_ReadReg - 1572 .LVL149: -2584:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 150 - - - 1573 .loc 1 2584 5 discriminator 1 view .LVU517 - 1574 00a2 B042 cmp r0, r6 - 1575 00a4 00D0 beq .L84 -2586:Src/main.c **** } - 1576 .loc 1 2586 6 view .LVU518 - 1577 00a6 0024 movs r4, #0 - 1578 .LVL150: - 1579 .L84: + 1070 .loc 1 2582 11 view .LVU362 + 1071 0010 4FF48055 mov r5, #4096 + 1072 0014 00E0 b .L53 + 1073 .L64: +2578:Src/main.c **** } + 1074 .loc 1 2578 11 view .LVU363 + 1075 0016 0225 movs r5, #2 + 1076 .L53: + 1077 .LVL89: +2586:Src/main.c **** + 1078 .loc 1 2586 2 is_stmt 1 view .LVU364 + 1079 0018 0421 movs r1, #4 + 1080 .LVL90: +2586:Src/main.c **** + 1081 .loc 1 2586 2 is_stmt 0 view .LVU365 + 1082 001a 1E20 movs r0, #30 + 1083 001c FFF7FEFF bl AD9102_WriteReg + 1084 .LVL91: 2588:Src/main.c **** { - 1580 .loc 1 2588 2 is_stmt 1 view .LVU519 + 1085 .loc 1 2588 2 is_stmt 1 view .LVU366 + 1086 .LBB356: 2588:Src/main.c **** { - 1581 .loc 1 2588 6 is_stmt 0 view .LVU520 - 1582 00a8 2920 movs r0, #41 - 1583 00aa FFF7FEFF bl AD9102_ReadReg - 1584 .LVL151: + 1087 .loc 1 2588 7 view .LVU367 2588:Src/main.c **** { - 1585 .loc 1 2588 5 discriminator 1 view .LVU521 - 1586 00ae 5845 cmp r0, fp - 1587 00b0 00D0 beq .L85 -2590:Src/main.c **** } - 1588 .loc 1 2590 6 view .LVU522 - 1589 00b2 0024 movs r4, #0 - 1590 .LVL152: - 1591 .L85: -2592:Src/main.c **** { - 1592 .loc 1 2592 2 is_stmt 1 view .LVU523 -2592:Src/main.c **** { - 1593 .loc 1 2592 6 is_stmt 0 view .LVU524 - 1594 00b4 1F20 movs r0, #31 - 1595 00b6 FFF7FEFF bl AD9102_ReadReg - 1596 .LVL153: -2592:Src/main.c **** { - 1597 .loc 1 2592 5 discriminator 1 view .LVU525 - 1598 00ba 00B1 cbz r0, .L86 -2594:Src/main.c **** } - 1599 .loc 1 2594 6 view .LVU526 - 1600 00bc 0024 movs r4, #0 - 1601 .LVL154: - 1602 .L86: -2596:Src/main.c **** { - 1603 .loc 1 2596 2 is_stmt 1 view .LVU527 -2596:Src/main.c **** { - 1604 .loc 1 2596 6 is_stmt 0 view .LVU528 - 1605 00be 3720 movs r0, #55 - 1606 00c0 FFF7FEFF bl AD9102_ReadReg - 1607 .LVL155: -2596:Src/main.c **** { - 1608 .loc 1 2596 5 discriminator 1 view .LVU529 - 1609 00c4 A842 cmp r0, r5 - 1610 00c6 00D0 beq .L87 -2598:Src/main.c **** } - 1611 .loc 1 2598 6 view .LVU530 - 1612 00c8 0024 movs r4, #0 - 1613 .LVL156: - 1614 .L87: -2601:Src/main.c **** } - 1615 .loc 1 2601 2 is_stmt 1 view .LVU531 - ARM GAS /tmp/ccYgfTud.s page 151 + 1088 .loc 1 2588 16 is_stmt 0 view .LVU368 + 1089 0020 0024 movs r4, #0 +2588:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 144 -2602:Src/main.c **** - 1616 .loc 1 2602 1 is_stmt 0 view .LVU532 - 1617 00ca 84F00100 eor r0, r4, #1 - 1618 00ce 03B0 add sp, sp, #12 - 1619 .LCFI17: - 1620 .cfi_remember_state - 1621 .cfi_def_cfa_offset 36 - 1622 @ sp needed - 1623 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} - 1624 .LVL157: - 1625 .L91: - 1626 .LCFI18: - 1627 .cfi_restore_state -2554:Src/main.c **** } - 1628 .loc 1 2554 6 view .LVU533 - 1629 00d4 0024 movs r4, #0 - 1630 00d6 C7E7 b .L78 - 1631 .cfi_endproc - 1632 .LFE1216: - 1634 .section .text.AD9102_Apply,"ax",%progbits - 1635 .align 1 - 1636 .syntax unified - 1637 .thumb - 1638 .thumb_func - 1640 AD9102_Apply: - 1641 .LVL158: - 1642 .LFB1215: -2481:Src/main.c **** if (enable) - 1643 .loc 1 2481 1 is_stmt 1 view -0 - 1644 .cfi_startproc - 1645 @ args = 4, pretend = 0, frame = 8 - 1646 @ frame_needed = 0, uses_anonymous_args = 0 -2481:Src/main.c **** if (enable) - 1647 .loc 1 2481 1 is_stmt 0 view .LVU535 - 1648 0000 30B5 push {r4, r5, lr} - 1649 .LCFI19: - 1650 .cfi_def_cfa_offset 12 - 1651 .cfi_offset 4, -12 - 1652 .cfi_offset 5, -8 - 1653 .cfi_offset 14, -4 - 1654 0002 83B0 sub sp, sp, #12 - 1655 .LCFI20: - 1656 .cfi_def_cfa_offset 24 -2482:Src/main.c **** { - 1657 .loc 1 2482 2 is_stmt 1 view .LVU536 -2482:Src/main.c **** { - 1658 .loc 1 2482 5 is_stmt 0 view .LVU537 - 1659 0004 0029 cmp r1, #0 - 1660 0006 4AD0 beq .L103 - 1661 .LBB373: -2484:Src/main.c **** uint16_t pat_timebase; - 1662 .loc 1 2484 3 is_stmt 1 view .LVU538 -2485:Src/main.c **** - 1663 .loc 1 2485 3 view .LVU539 -2487:Src/main.c **** { - 1664 .loc 1 2487 3 view .LVU540 -2487:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 152 + 1090 .loc 1 2588 2 view .LVU369 + 1091 0022 2FE0 b .L54 + 1092 .LVL92: + 1093 .L74: + 1094 .LBB357: + 1095 .LBB358: +2596:Src/main.c **** } + 1096 .loc 1 2596 10 view .LVU370 + 1097 0024 0123 movs r3, #1 + 1098 .LVL93: +2596:Src/main.c **** } + 1099 .loc 1 2596 10 view .LVU371 + 1100 0026 34E0 b .L56 + 1101 .LVL94: + 1102 .L67: + 1103 .LBB359: +2600:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1104 .loc 1 2600 14 discriminator 2 view .LVU372 + 1105 0028 0122 movs r2, #1 + 1106 002a 38E0 b .L58 + 1107 .L57: + 1108 .LBE359: + 1109 .LBB360: +2606:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; + 1110 .loc 1 2606 5 is_stmt 1 view .LVU373 +2606:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; + 1111 .loc 1 2606 14 is_stmt 0 view .LVU374 + 1112 002c EA1A subs r2, r5, r3 + 1113 002e 92B2 uxth r2, r2 + 1114 .LVL95: +2607:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - + 1115 .loc 1 2607 5 is_stmt 1 view .LVU375 +2607:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - + 1116 .loc 1 2607 14 is_stmt 0 view .LVU376 + 1117 0030 012A cmp r2, #1 + 1118 0032 0ED9 bls .L68 +2607:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - + 1119 .loc 1 2607 14 discriminator 1 view .LVU377 + 1120 0034 013A subs r2, r2, #1 + 1121 .LVL96: +2607:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - + 1122 .loc 1 2607 14 discriminator 1 view .LVU378 + 1123 0036 92B2 uxth r2, r2 + 1124 .LVL97: + 1125 .L60: +2608:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom; + 1126 .loc 1 2608 5 is_stmt 1 view .LVU379 +2609:Src/main.c **** } + 1127 .loc 1 2609 59 is_stmt 0 view .LVU380 + 1128 0038 E31A subs r3, r4, r3 + 1129 .LVL98: +2609:Src/main.c **** } + 1130 .loc 1 2609 45 view .LVU381 + 1131 003a C3EB8333 rsb r3, r3, r3, lsl #14 +2609:Src/main.c **** } + 1132 .loc 1 2609 68 view .LVU382 + 1133 003e 93FBF2F2 sdiv r2, r3, r2 + ARM GAS /tmp/ccwR4KB7.s page 145 - 1665 .loc 1 2487 6 is_stmt 0 view .LVU541 - 1666 0008 1AB1 cbz r2, .L108 -2491:Src/main.c **** { - 1667 .loc 1 2491 3 is_stmt 1 view .LVU542 -2491:Src/main.c **** { - 1668 .loc 1 2491 6 is_stmt 0 view .LVU543 - 1669 000a 3F2A cmp r2, #63 - 1670 000c 02D9 bls .L104 -2493:Src/main.c **** } - 1671 .loc 1 2493 13 view .LVU544 - 1672 000e 3F22 movs r2, #63 - 1673 .LVL159: -2493:Src/main.c **** } - 1674 .loc 1 2493 13 view .LVU545 - 1675 0010 00E0 b .L104 - 1676 .LVL160: - 1677 .L108: -2489:Src/main.c **** } - 1678 .loc 1 2489 13 view .LVU546 - 1679 0012 0122 movs r2, #1 - 1680 .LVL161: - 1681 .L104: -2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1682 .loc 1 2495 3 is_stmt 1 view .LVU547 -2496:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 1683 .loc 1 2496 25 is_stmt 0 view .LVU548 - 1684 0014 00F00300 and r0, r0, #3 - 1685 .LVL162: -2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1686 .loc 1 2495 60 view .LVU549 - 1687 0018 9200 lsls r2, r2, #2 - 1688 .LVL163: -2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1689 .loc 1 2495 60 view .LVU550 - 1690 001a D2B2 uxtb r2, r2 -2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 1691 .loc 1 2495 11 view .LVU551 - 1692 001c 40EA0204 orr r4, r0, r2 - 1693 .LVL164: -2497:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 1694 .loc 1 2497 3 is_stmt 1 view .LVU552 -2498:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 1695 .loc 1 2498 49 is_stmt 0 view .LVU553 - 1696 0020 1B01 lsls r3, r3, #4 - 1697 .LVL165: -2498:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 1698 .loc 1 2498 49 view .LVU554 - 1699 0022 03F0F003 and r3, r3, #240 -2497:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 1700 .loc 1 2497 16 view .LVU555 - 1701 0026 40F20115 movw r5, #257 - 1702 002a 1D43 orrs r5, r5, r3 - 1703 .LVL166: -2501:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); - 1704 .loc 1 2501 3 is_stmt 1 view .LVU556 - 1705 002c 43F21221 movw r1, #12818 - 1706 .LVL167: - ARM GAS /tmp/ccYgfTud.s page 153 + 1134 .LVL99: +2608:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom; + 1135 .loc 1 2608 11 view .LVU383 + 1136 0042 41F6FF71 movw r1, #8191 + 1137 0046 891A subs r1, r1, r2 + 1138 .LVL100: +2608:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom; + 1139 .loc 1 2608 11 view .LVU384 + 1140 .LBE360: + 1141 .LBE358: +2619:Src/main.c **** { + 1142 .loc 1 2619 3 is_stmt 1 view .LVU385 +2619:Src/main.c **** { + 1143 .loc 1 2619 6 is_stmt 0 view .LVU386 + 1144 0048 11F5005F cmn r1, #8192 + 1145 004c 0DDA bge .L59 +2621:Src/main.c **** } + 1146 .loc 1 2621 10 view .LVU387 + 1147 004e 1C49 ldr r1, .L75 + 1148 .LVL101: +2621:Src/main.c **** } + 1149 .loc 1 2621 10 view .LVU388 + 1150 0050 0EE0 b .L61 + 1151 .LVL102: + 1152 .L68: + 1153 .LBB363: + 1154 .LBB361: +2607:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - + 1155 .loc 1 2607 14 discriminator 2 view .LVU389 + 1156 0052 0122 movs r2, #1 + 1157 .LVL103: +2607:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - + 1158 .loc 1 2607 14 discriminator 2 view .LVU390 + 1159 0054 F0E7 b .L60 + 1160 .LVL104: + 1161 .L55: +2607:Src/main.c **** value = AD9102_SRAM_RAMP_MAX - + 1162 .loc 1 2607 14 discriminator 2 view .LVU391 + 1163 .LBE361: + 1164 .LBE363: + 1165 .LBB364: +2614:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1166 .loc 1 2614 4 is_stmt 1 view .LVU392 +2614:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1167 .loc 1 2614 13 is_stmt 0 view .LVU393 + 1168 0056 012D cmp r5, #1 + 1169 0058 28D9 bls .L70 +2614:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1170 .loc 1 2614 13 discriminator 1 view .LVU394 + 1171 005a 6A1E subs r2, r5, #1 + 1172 005c 92B2 uxth r2, r2 + 1173 .L62: + 1174 .LVL105: +2615:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + 1175 .loc 1 2615 4 is_stmt 1 view .LVU395 +2616:Src/main.c **** } + 1176 .loc 1 2616 44 is_stmt 0 view .LVU396 + ARM GAS /tmp/ccwR4KB7.s page 146 -2501:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); - 1707 .loc 1 2501 3 is_stmt 0 view .LVU557 - 1708 0030 2720 movs r0, #39 - 1709 0032 FFF7FEFF bl AD9102_WriteReg - 1710 .LVL168: -2502:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); - 1711 .loc 1 2502 3 is_stmt 1 view .LVU558 - 1712 0036 2146 mov r1, r4 - 1713 0038 3720 movs r0, #55 - 1714 003a FFF7FEFF bl AD9102_WriteReg - 1715 .LVL169: -2503:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); - 1716 .loc 1 2503 3 view .LVU559 - 1717 003e 2946 mov r1, r5 - 1718 0040 2820 movs r0, #40 - 1719 0042 FFF7FEFF bl AD9102_WriteReg - 1720 .LVL170: -2504:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat - 1721 .loc 1 2504 3 view .LVU560 - 1722 0046 BDF81810 ldrh r1, [sp, #24] - 1723 004a 2920 movs r0, #41 - 1724 004c FFF7FEFF bl AD9102_WriteReg - 1725 .LVL171: -2505:Src/main.c **** - 1726 .loc 1 2505 3 view .LVU561 - 1727 0050 0021 movs r1, #0 - 1728 0052 1F20 movs r0, #31 - 1729 0054 FFF7FEFF bl AD9102_WriteReg - 1730 .LVL172: -2509:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); - 1731 .loc 1 2509 3 view .LVU562 - 1732 0058 0122 movs r2, #1 - 1733 005a 4FF40061 mov r1, #2048 - 1734 005e 1548 ldr r0, .L111 - 1735 0060 FFF7FEFF bl HAL_GPIO_WritePin - 1736 .LVL173: -2510:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 1737 .loc 1 2510 3 view .LVU563 - 1738 0064 0121 movs r1, #1 - 1739 0066 1E20 movs r0, #30 - 1740 0068 FFF7FEFF bl AD9102_WriteReg - 1741 .LVL174: -2511:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - 1742 .loc 1 2511 3 view .LVU564 - 1743 006c 0121 movs r1, #1 - 1744 006e 1D20 movs r0, #29 - 1745 0070 FFF7FEFF bl AD9102_WriteReg - 1746 .LVL175: -2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 1747 .loc 1 2512 3 view .LVU565 - 1748 .LBB374: -2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 1749 .loc 1 2512 8 view .LVU566 -2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 1750 .loc 1 2512 26 is_stmt 0 view .LVU567 - 1751 0074 0023 movs r3, #0 - 1752 0076 0193 str r3, [sp, #4] - ARM GAS /tmp/ccYgfTud.s page 154 + 1177 005e C4EB8433 rsb r3, r4, r4, lsl #14 +2616:Src/main.c **** } + 1178 .loc 1 2616 58 view .LVU397 + 1179 0062 93FBF2F3 sdiv r3, r3, r2 +2615:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + 1180 .loc 1 2615 10 view .LVU398 + 1181 0066 A3F50051 sub r1, r3, #8192 + 1182 .LVL106: +2615:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + 1183 .loc 1 2615 10 view .LVU399 + 1184 .LBE364: +2619:Src/main.c **** { + 1185 .loc 1 2619 3 is_stmt 1 view .LVU400 + 1186 .L59: +2623:Src/main.c **** { + 1187 .loc 1 2623 8 view .LVU401 +2623:Src/main.c **** { + 1188 .loc 1 2623 11 is_stmt 0 view .LVU402 + 1189 006a B1F5005F cmp r1, #8192 + 1190 006e 1FDA bge .L71 + 1191 .LVL107: + 1192 .L61: +2628:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); + 1193 .loc 1 2628 3 is_stmt 1 view .LVU403 +2628:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); + 1194 .loc 1 2628 25 is_stmt 0 view .LVU404 + 1195 0070 89B2 uxth r1, r1 + 1196 .LVL108: +2629:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); + 1197 .loc 1 2629 3 is_stmt 1 view .LVU405 +2630:Src/main.c **** } + 1198 .loc 1 2630 3 view .LVU406 + 1199 0072 8900 lsls r1, r1, #2 + 1200 .LVL109: +2630:Src/main.c **** } + 1201 .loc 1 2630 3 is_stmt 0 view .LVU407 + 1202 0074 89B2 uxth r1, r1 + 1203 0076 04F5C040 add r0, r4, #24576 + 1204 007a 80B2 uxth r0, r0 + 1205 007c FFF7FEFF bl AD9102_WriteReg + 1206 .LVL110: + 1207 .LBE357: +2588:Src/main.c **** { + 1208 .loc 1 2588 37 is_stmt 1 discriminator 2 view .LVU408 + 1209 0080 0134 adds r4, r4, #1 + 1210 .LVL111: +2588:Src/main.c **** { + 1211 .loc 1 2588 37 is_stmt 0 discriminator 2 view .LVU409 + 1212 0082 A4B2 uxth r4, r4 + 1213 .LVL112: + 1214 .L54: +2588:Src/main.c **** { + 1215 .loc 1 2588 25 is_stmt 1 discriminator 1 view .LVU410 + 1216 0084 A542 cmp r5, r4 + 1217 0086 16D9 bls .L73 + 1218 .LBB367: +2590:Src/main.c **** if (triangle) + ARM GAS /tmp/ccwR4KB7.s page 147 -2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 1753 .loc 1 2512 3 view .LVU568 - 1754 0078 02E0 b .L105 - 1755 .L106: -2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 1756 .loc 1 2512 49 is_stmt 1 discriminator 3 view .LVU569 -2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 1757 .loc 1 2512 44 discriminator 3 view .LVU570 - 1758 007a 019B ldr r3, [sp, #4] - 1759 007c 0133 adds r3, r3, #1 - 1760 007e 0193 str r3, [sp, #4] - 1761 .L105: -2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 1762 .loc 1 2512 35 discriminator 1 view .LVU571 - 1763 0080 019B ldr r3, [sp, #4] - 1764 0082 B3F57A7F cmp r3, #1000 - 1765 0086 F8D3 bcc .L106 - 1766 .LBE374: -2513:Src/main.c **** } - 1767 .loc 1 2513 3 view .LVU572 - 1768 0088 0022 movs r2, #0 - 1769 008a 4FF40061 mov r1, #2048 - 1770 008e 0948 ldr r0, .L111 - 1771 0090 FFF7FEFF bl HAL_GPIO_WritePin - 1772 .LVL176: - 1773 .L107: -2513:Src/main.c **** } - 1774 .loc 1 2513 3 is_stmt 0 view .LVU573 - 1775 .LBE373: -2521:Src/main.c **** } - 1776 .loc 1 2521 2 is_stmt 1 view .LVU574 -2521:Src/main.c **** } - 1777 .loc 1 2521 9 is_stmt 0 view .LVU575 - 1778 0094 1E20 movs r0, #30 - 1779 0096 FFF7FEFF bl AD9102_ReadReg - 1780 .LVL177: -2522:Src/main.c **** - 1781 .loc 1 2522 1 view .LVU576 - 1782 009a 03B0 add sp, sp, #12 - 1783 .LCFI21: - 1784 .cfi_remember_state - 1785 .cfi_def_cfa_offset 12 - 1786 @ sp needed - 1787 009c 30BD pop {r4, r5, pc} - 1788 .LVL178: - 1789 .L103: - 1790 .LCFI22: - 1791 .cfi_restore_state -2517:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 1792 .loc 1 2517 3 is_stmt 1 view .LVU577 - 1793 009e 0021 movs r1, #0 - 1794 .LVL179: -2517:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 1795 .loc 1 2517 3 is_stmt 0 view .LVU578 - 1796 00a0 1E20 movs r0, #30 - 1797 .LVL180: -2517:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - ARM GAS /tmp/ccYgfTud.s page 155 + 1219 .loc 1 2590 3 view .LVU411 +2591:Src/main.c **** { + 1220 .loc 1 2591 3 view .LVU412 +2591:Src/main.c **** { + 1221 .loc 1 2591 6 is_stmt 0 view .LVU413 + 1222 0088 002E cmp r6, #0 + 1223 008a E4D0 beq .L55 + 1224 .LBB365: +2593:Src/main.c **** if (half == 0u) + 1225 .loc 1 2593 4 is_stmt 1 view .LVU414 +2593:Src/main.c **** if (half == 0u) + 1226 .loc 1 2593 13 is_stmt 0 view .LVU415 + 1227 008c 6B08 lsrs r3, r5, #1 + 1228 .LVL113: +2594:Src/main.c **** { + 1229 .loc 1 2594 4 is_stmt 1 view .LVU416 +2594:Src/main.c **** { + 1230 .loc 1 2594 7 is_stmt 0 view .LVU417 + 1231 008e 012D cmp r5, #1 + 1232 0090 C8D9 bls .L74 + 1233 .LVL114: + 1234 .L56: +2598:Src/main.c **** { + 1235 .loc 1 2598 4 is_stmt 1 view .LVU418 +2598:Src/main.c **** { + 1236 .loc 1 2598 7 is_stmt 0 view .LVU419 + 1237 0092 9C42 cmp r4, r3 + 1238 0094 CAD2 bcs .L57 + 1239 .LBB362: +2600:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1240 .loc 1 2600 5 is_stmt 1 view .LVU420 +2600:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1241 .loc 1 2600 14 is_stmt 0 view .LVU421 + 1242 0096 012B cmp r3, #1 + 1243 0098 C6D9 bls .L67 +2600:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1244 .loc 1 2600 14 discriminator 1 view .LVU422 + 1245 009a 013B subs r3, r3, #1 + 1246 .LVL115: +2600:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1247 .loc 1 2600 14 discriminator 1 view .LVU423 + 1248 009c 9AB2 uxth r2, r3 + 1249 .LVL116: + 1250 .L58: +2601:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + 1251 .loc 1 2601 5 is_stmt 1 view .LVU424 +2602:Src/main.c **** } + 1252 .loc 1 2602 45 is_stmt 0 view .LVU425 + 1253 009e C4EB8433 rsb r3, r4, r4, lsl #14 +2602:Src/main.c **** } + 1254 .loc 1 2602 59 view .LVU426 + 1255 00a2 93FBF2F3 sdiv r3, r3, r2 +2601:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + 1256 .loc 1 2601 11 view .LVU427 + 1257 00a6 A3F50051 sub r1, r3, #8192 + 1258 .LVL117: +2601:Src/main.c **** ((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; + ARM GAS /tmp/ccwR4KB7.s page 148 - 1798 .loc 1 2517 3 view .LVU579 - 1799 00a2 FFF7FEFF bl AD9102_WriteReg - 1800 .LVL181: -2518:Src/main.c **** } - 1801 .loc 1 2518 3 is_stmt 1 view .LVU580 - 1802 00a6 0122 movs r2, #1 - 1803 00a8 4FF40061 mov r1, #2048 - 1804 00ac 0148 ldr r0, .L111 - 1805 00ae FFF7FEFF bl HAL_GPIO_WritePin - 1806 .LVL182: - 1807 00b2 EFE7 b .L107 - 1808 .L112: - 1809 .align 2 - 1810 .L111: - 1811 00b4 000C0240 .word 1073875968 - 1812 .cfi_endproc - 1813 .LFE1215: - 1815 .section .text.OUT_trigger,"ax",%progbits - 1816 .align 1 - 1817 .syntax unified - 1818 .thumb - 1819 .thumb_func - 1821 OUT_trigger: - 1822 .LVL183: - 1823 .LFB1210: -2346:Src/main.c **** switch (out_n) - 1824 .loc 1 2346 1 view -0 - 1825 .cfi_startproc - 1826 @ args = 0, pretend = 0, frame = 0 - 1827 @ frame_needed = 0, uses_anonymous_args = 0 -2346:Src/main.c **** switch (out_n) - 1828 .loc 1 2346 1 is_stmt 0 view .LVU582 - 1829 0000 10B5 push {r4, lr} - 1830 .LCFI23: - 1831 .cfi_def_cfa_offset 8 - 1832 .cfi_offset 4, -8 - 1833 .cfi_offset 14, -4 -2347:Src/main.c **** { - 1834 .loc 1 2347 2 is_stmt 1 view .LVU583 - 1835 0002 0928 cmp r0, #9 - 1836 0004 13D8 bhi .L113 - 1837 0006 DFE800F0 tbb [pc, r0] - 1838 .L116: - 1839 000a 05 .byte (.L125-.L116)/2 - 1840 000b 13 .byte (.L124-.L116)/2 - 1841 000c 21 .byte (.L123-.L116)/2 - 1842 000d 2F .byte (.L122-.L116)/2 - 1843 000e 3D .byte (.L121-.L116)/2 - 1844 000f 4B .byte (.L120-.L116)/2 - 1845 0010 59 .byte (.L119-.L116)/2 - 1846 0011 65 .byte (.L118-.L116)/2 - 1847 0012 71 .byte (.L117-.L116)/2 - 1848 0013 7D .byte (.L115-.L116)/2 - 1849 .p2align 1 - 1850 .L125: -2350:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 1851 .loc 1 2350 3 view .LVU584 - ARM GAS /tmp/ccYgfTud.s page 156 + 1259 .loc 1 2601 11 view .LVU428 + 1260 .LBE362: + 1261 .LBE365: +2619:Src/main.c **** { + 1262 .loc 1 2619 3 is_stmt 1 view .LVU429 + 1263 00aa DEE7 b .L59 + 1264 .LVL118: + 1265 .L70: + 1266 .LBB366: +2614:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1267 .loc 1 2614 13 is_stmt 0 discriminator 2 view .LVU430 + 1268 00ac 0122 movs r2, #1 + 1269 00ae D6E7 b .L62 + 1270 .LVL119: + 1271 .L71: +2614:Src/main.c **** value = AD9102_SRAM_RAMP_MIN + + 1272 .loc 1 2614 13 discriminator 2 view .LVU431 + 1273 .LBE366: +2625:Src/main.c **** } + 1274 .loc 1 2625 10 view .LVU432 + 1275 00b0 41F6FF71 movw r1, #8191 + 1276 .LVL120: +2625:Src/main.c **** } + 1277 .loc 1 2625 10 view .LVU433 + 1278 00b4 DCE7 b .L61 + 1279 .LVL121: + 1280 .L73: +2625:Src/main.c **** } + 1281 .loc 1 2625 10 view .LVU434 + 1282 .LBE367: + 1283 .LBE356: +2634:Src/main.c **** } + 1284 .loc 1 2634 2 is_stmt 1 view .LVU435 + 1285 00b6 0021 movs r1, #0 + 1286 00b8 1E20 movs r0, #30 + 1287 00ba FFF7FEFF bl AD9102_WriteReg + 1288 .LVL122: +2635:Src/main.c **** + 1289 .loc 1 2635 1 is_stmt 0 view .LVU436 + 1290 00be 70BD pop {r4, r5, r6, pc} + 1291 .LVL123: + 1292 .L76: +2635:Src/main.c **** + 1293 .loc 1 2635 1 view .LVU437 + 1294 .align 2 + 1295 .L75: + 1296 00c0 00E0FFFF .word -8192 + 1297 .cfi_endproc + 1298 .LFE1216: + 1300 .section .text.AD9102_Init,"ax",%progbits + 1301 .align 1 + 1302 .syntax unified + 1303 .thumb + 1304 .thumb_func + 1306 AD9102_Init: + 1307 .LFB1211: +2452:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + ARM GAS /tmp/ccwR4KB7.s page 149 - 1852 0014 414C ldr r4, .L128 - 1853 0016 0122 movs r2, #1 - 1854 0018 4FF48061 mov r1, #1024 - 1855 001c 2046 mov r0, r4 - 1856 .LVL184: -2350:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 1857 .loc 1 2350 3 is_stmt 0 view .LVU585 - 1858 001e FFF7FEFF bl HAL_GPIO_WritePin - 1859 .LVL185: -2351:Src/main.c **** break; - 1860 .loc 1 2351 3 is_stmt 1 view .LVU586 - 1861 0022 0022 movs r2, #0 - 1862 0024 4FF48061 mov r1, #1024 - 1863 0028 2046 mov r0, r4 - 1864 002a FFF7FEFF bl HAL_GPIO_WritePin - 1865 .LVL186: -2352:Src/main.c **** - 1866 .loc 1 2352 2 view .LVU587 - 1867 .L113: -2399:Src/main.c **** - 1868 .loc 1 2399 1 is_stmt 0 view .LVU588 - 1869 002e 10BD pop {r4, pc} - 1870 .LVL187: - 1871 .L124: -2355:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 1872 .loc 1 2355 3 is_stmt 1 view .LVU589 - 1873 0030 3A4C ldr r4, .L128 - 1874 0032 0122 movs r2, #1 - 1875 0034 4FF40061 mov r1, #2048 - 1876 0038 2046 mov r0, r4 - 1877 .LVL188: -2355:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 1878 .loc 1 2355 3 is_stmt 0 view .LVU590 - 1879 003a FFF7FEFF bl HAL_GPIO_WritePin - 1880 .LVL189: -2356:Src/main.c **** break; - 1881 .loc 1 2356 3 is_stmt 1 view .LVU591 - 1882 003e 0022 movs r2, #0 - 1883 0040 4FF40061 mov r1, #2048 - 1884 0044 2046 mov r0, r4 - 1885 0046 FFF7FEFF bl HAL_GPIO_WritePin - 1886 .LVL190: -2357:Src/main.c **** - 1887 .loc 1 2357 2 view .LVU592 - 1888 004a F0E7 b .L113 - 1889 .LVL191: - 1890 .L123: -2360:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 1891 .loc 1 2360 3 view .LVU593 - 1892 004c 334C ldr r4, .L128 - 1893 004e 0122 movs r2, #1 - 1894 0050 4FF48051 mov r1, #4096 - 1895 0054 2046 mov r0, r4 - 1896 .LVL192: -2360:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 1897 .loc 1 2360 3 is_stmt 0 view .LVU594 - 1898 0056 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccYgfTud.s page 157 + 1308 .loc 1 2452 1 is_stmt 1 view -0 + 1309 .cfi_startproc + 1310 @ args = 0, pretend = 0, frame = 8 + 1311 @ frame_needed = 0, uses_anonymous_args = 0 + 1312 0000 00B5 push {lr} + 1313 .LCFI12: + 1314 .cfi_def_cfa_offset 4 + 1315 .cfi_offset 14, -4 + 1316 0002 83B0 sub sp, sp, #12 + 1317 .LCFI13: + 1318 .cfi_def_cfa_offset 16 +2453:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); + 1319 .loc 1 2453 2 view .LVU439 + 1320 0004 0122 movs r2, #1 + 1321 0006 4FF48051 mov r1, #4096 + 1322 000a 1648 ldr r0, .L81 + 1323 000c FFF7FEFF bl HAL_GPIO_WritePin + 1324 .LVL124: +2454:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 1325 .loc 1 2454 2 view .LVU440 + 1326 0010 0022 movs r2, #0 + 1327 0012 4021 movs r1, #64 + 1328 0014 1448 ldr r0, .L81+4 + 1329 0016 FFF7FEFF bl HAL_GPIO_WritePin + 1330 .LVL125: +2455:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1331 .loc 1 2455 2 view .LVU441 + 1332 .LBB368: +2455:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1333 .loc 1 2455 7 view .LVU442 +2455:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1334 .loc 1 2455 25 is_stmt 0 view .LVU443 + 1335 001a 0023 movs r3, #0 + 1336 001c 0193 str r3, [sp, #4] +2455:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1337 .loc 1 2455 2 view .LVU444 + 1338 001e 02E0 b .L78 + 1339 .L79: +2455:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1340 .loc 1 2455 48 is_stmt 1 discriminator 3 view .LVU445 +2455:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1341 .loc 1 2455 43 discriminator 3 view .LVU446 + 1342 0020 019B ldr r3, [sp, #4] + 1343 0022 0133 adds r3, r3, #1 + 1344 0024 0193 str r3, [sp, #4] + 1345 .L78: +2455:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1346 .loc 1 2455 34 discriminator 1 view .LVU447 + 1347 0026 019B ldr r3, [sp, #4] + 1348 0028 B3F57A7F cmp r3, #1000 + 1349 002c F8D3 bcc .L79 + 1350 .LBE368: +2456:Src/main.c **** + 1351 .loc 1 2456 2 view .LVU448 + 1352 002e 0122 movs r2, #1 + 1353 0030 4021 movs r1, #64 + 1354 0032 0D48 ldr r0, .L81+4 + ARM GAS /tmp/ccwR4KB7.s page 150 - 1899 .LVL193: -2361:Src/main.c **** break; - 1900 .loc 1 2361 3 is_stmt 1 view .LVU595 - 1901 005a 0022 movs r2, #0 - 1902 005c 4FF48051 mov r1, #4096 - 1903 0060 2046 mov r0, r4 - 1904 0062 FFF7FEFF bl HAL_GPIO_WritePin - 1905 .LVL194: -2362:Src/main.c **** - 1906 .loc 1 2362 2 view .LVU596 - 1907 0066 E2E7 b .L113 - 1908 .LVL195: - 1909 .L122: -2365:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 1910 .loc 1 2365 3 view .LVU597 - 1911 0068 2C4C ldr r4, .L128 - 1912 006a 0122 movs r2, #1 - 1913 006c 4FF40051 mov r1, #8192 - 1914 0070 2046 mov r0, r4 - 1915 .LVL196: -2365:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 1916 .loc 1 2365 3 is_stmt 0 view .LVU598 - 1917 0072 FFF7FEFF bl HAL_GPIO_WritePin - 1918 .LVL197: -2366:Src/main.c **** break; - 1919 .loc 1 2366 3 is_stmt 1 view .LVU599 - 1920 0076 0022 movs r2, #0 - 1921 0078 4FF40051 mov r1, #8192 - 1922 007c 2046 mov r0, r4 - 1923 007e FFF7FEFF bl HAL_GPIO_WritePin - 1924 .LVL198: -2367:Src/main.c **** - 1925 .loc 1 2367 2 view .LVU600 - 1926 0082 D4E7 b .L113 - 1927 .LVL199: - 1928 .L121: -2370:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 1929 .loc 1 2370 3 view .LVU601 - 1930 0084 254C ldr r4, .L128 - 1931 0086 0122 movs r2, #1 - 1932 0088 4FF48041 mov r1, #16384 - 1933 008c 2046 mov r0, r4 - 1934 .LVL200: -2370:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 1935 .loc 1 2370 3 is_stmt 0 view .LVU602 - 1936 008e FFF7FEFF bl HAL_GPIO_WritePin - 1937 .LVL201: -2371:Src/main.c **** break; - 1938 .loc 1 2371 3 is_stmt 1 view .LVU603 - 1939 0092 0022 movs r2, #0 - 1940 0094 4FF48041 mov r1, #16384 - 1941 0098 2046 mov r0, r4 - 1942 009a FFF7FEFF bl HAL_GPIO_WritePin - 1943 .LVL202: -2372:Src/main.c **** - 1944 .loc 1 2372 2 view .LVU604 - 1945 009e C6E7 b .L113 - ARM GAS /tmp/ccYgfTud.s page 158 + 1355 0034 FFF7FEFF bl HAL_GPIO_WritePin + 1356 .LVL126: +2458:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 1357 .loc 1 2458 2 view .LVU449 + 1358 0038 4221 movs r1, #66 + 1359 003a 0C48 ldr r0, .L81+8 + 1360 003c FFF7FEFF bl AD9102_WriteRegTable + 1361 .LVL127: +2459:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 1362 .loc 1 2459 2 view .LVU450 + 1363 0040 0021 movs r1, #0 + 1364 0042 1E20 movs r0, #30 + 1365 0044 FFF7FEFF bl AD9102_WriteReg + 1366 .LVL128: +2460:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1367 .loc 1 2460 2 view .LVU451 + 1368 0048 0121 movs r1, #1 + 1369 004a 1D20 movs r0, #29 + 1370 004c FFF7FEFF bl AD9102_WriteReg + 1371 .LVL129: +2461:Src/main.c **** } + 1372 .loc 1 2461 2 view .LVU452 + 1373 0050 0122 movs r2, #1 + 1374 0052 4FF40061 mov r1, #2048 + 1375 0056 0648 ldr r0, .L81+12 + 1376 0058 FFF7FEFF bl HAL_GPIO_WritePin + 1377 .LVL130: +2462:Src/main.c **** + 1378 .loc 1 2462 1 is_stmt 0 view .LVU453 + 1379 005c 03B0 add sp, sp, #12 + 1380 .LCFI14: + 1381 .cfi_def_cfa_offset 4 + 1382 @ sp needed + 1383 005e 5DF804FB ldr pc, [sp], #4 + 1384 .L82: + 1385 0062 00BF .align 2 + 1386 .L81: + 1387 0064 00040240 .word 1073873920 + 1388 0068 00080240 .word 1073874944 + 1389 006c 00000000 .word ad9102_example4_regval + 1390 0070 000C0240 .word 1073875968 + 1391 .cfi_endproc + 1392 .LFE1211: + 1394 .section .text.AD9102_ReadReg,"ax",%progbits + 1395 .align 1 + 1396 .syntax unified + 1397 .thumb + 1398 .thumb_func + 1400 AD9102_ReadReg: + 1401 .LVL131: + 1402 .LFB1213: +2493:Src/main.c **** uint32_t tmp32 = 0; + 1403 .loc 1 2493 1 is_stmt 1 view -0 + 1404 .cfi_startproc + 1405 @ args = 0, pretend = 0, frame = 0 + 1406 @ frame_needed = 0, uses_anonymous_args = 0 +2493:Src/main.c **** uint32_t tmp32 = 0; + ARM GAS /tmp/ccwR4KB7.s page 151 - 1946 .LVL203: - 1947 .L120: -2375:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 1948 .loc 1 2375 3 view .LVU605 - 1949 00a0 1E4C ldr r4, .L128 - 1950 00a2 0122 movs r2, #1 - 1951 00a4 4FF40041 mov r1, #32768 - 1952 00a8 2046 mov r0, r4 - 1953 .LVL204: -2375:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 1954 .loc 1 2375 3 is_stmt 0 view .LVU606 - 1955 00aa FFF7FEFF bl HAL_GPIO_WritePin - 1956 .LVL205: -2376:Src/main.c **** break; - 1957 .loc 1 2376 3 is_stmt 1 view .LVU607 - 1958 00ae 0022 movs r2, #0 - 1959 00b0 4FF40041 mov r1, #32768 - 1960 00b4 2046 mov r0, r4 - 1961 00b6 FFF7FEFF bl HAL_GPIO_WritePin - 1962 .LVL206: -2377:Src/main.c **** - 1963 .loc 1 2377 2 view .LVU608 - 1964 00ba B8E7 b .L113 - 1965 .LVL207: - 1966 .L119: -2380:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 1967 .loc 1 2380 3 view .LVU609 - 1968 00bc 184C ldr r4, .L128+4 - 1969 00be 0122 movs r2, #1 - 1970 00c0 1021 movs r1, #16 - 1971 00c2 2046 mov r0, r4 - 1972 .LVL208: -2380:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 1973 .loc 1 2380 3 is_stmt 0 view .LVU610 - 1974 00c4 FFF7FEFF bl HAL_GPIO_WritePin - 1975 .LVL209: -2381:Src/main.c **** break; - 1976 .loc 1 2381 3 is_stmt 1 view .LVU611 - 1977 00c8 0022 movs r2, #0 - 1978 00ca 1021 movs r1, #16 - 1979 00cc 2046 mov r0, r4 - 1980 00ce FFF7FEFF bl HAL_GPIO_WritePin - 1981 .LVL210: -2382:Src/main.c **** - 1982 .loc 1 2382 2 view .LVU612 - 1983 00d2 ACE7 b .L113 - 1984 .LVL211: - 1985 .L118: -2385:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 1986 .loc 1 2385 3 view .LVU613 - 1987 00d4 124C ldr r4, .L128+4 - 1988 00d6 0122 movs r2, #1 - 1989 00d8 2021 movs r1, #32 - 1990 00da 2046 mov r0, r4 - 1991 .LVL212: -2385:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 1992 .loc 1 2385 3 is_stmt 0 view .LVU614 - ARM GAS /tmp/ccYgfTud.s page 159 - - - 1993 00dc FFF7FEFF bl HAL_GPIO_WritePin - 1994 .LVL213: -2386:Src/main.c **** break; - 1995 .loc 1 2386 3 is_stmt 1 view .LVU615 - 1996 00e0 0022 movs r2, #0 - 1997 00e2 2021 movs r1, #32 - 1998 00e4 2046 mov r0, r4 - 1999 00e6 FFF7FEFF bl HAL_GPIO_WritePin - 2000 .LVL214: -2387:Src/main.c **** - 2001 .loc 1 2387 2 view .LVU616 - 2002 00ea A0E7 b .L113 - 2003 .LVL215: - 2004 .L117: -2390:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 2005 .loc 1 2390 3 view .LVU617 - 2006 00ec 0C4C ldr r4, .L128+4 - 2007 00ee 0122 movs r2, #1 - 2008 00f0 4021 movs r1, #64 - 2009 00f2 2046 mov r0, r4 - 2010 .LVL216: -2390:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 2011 .loc 1 2390 3 is_stmt 0 view .LVU618 - 2012 00f4 FFF7FEFF bl HAL_GPIO_WritePin - 2013 .LVL217: -2391:Src/main.c **** break; - 2014 .loc 1 2391 3 is_stmt 1 view .LVU619 - 2015 00f8 0022 movs r2, #0 - 2016 00fa 4021 movs r1, #64 - 2017 00fc 2046 mov r0, r4 - 2018 00fe FFF7FEFF bl HAL_GPIO_WritePin - 2019 .LVL218: -2392:Src/main.c **** - 2020 .loc 1 2392 2 view .LVU620 - 2021 0102 94E7 b .L113 - 2022 .LVL219: - 2023 .L115: -2395:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 2024 .loc 1 2395 3 view .LVU621 - 2025 0104 064C ldr r4, .L128+4 - 2026 0106 0122 movs r2, #1 - 2027 0108 8021 movs r1, #128 - 2028 010a 2046 mov r0, r4 - 2029 .LVL220: -2395:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 2030 .loc 1 2395 3 is_stmt 0 view .LVU622 - 2031 010c FFF7FEFF bl HAL_GPIO_WritePin - 2032 .LVL221: -2396:Src/main.c **** break; - 2033 .loc 1 2396 3 is_stmt 1 view .LVU623 - 2034 0110 0022 movs r2, #0 - 2035 0112 8021 movs r1, #128 - 2036 0114 2046 mov r0, r4 - 2037 0116 FFF7FEFF bl HAL_GPIO_WritePin - 2038 .LVL222: -2397:Src/main.c **** } - 2039 .loc 1 2397 2 view .LVU624 - ARM GAS /tmp/ccYgfTud.s page 160 - - -2399:Src/main.c **** - 2040 .loc 1 2399 1 is_stmt 0 view .LVU625 - 2041 011a 88E7 b .L113 - 2042 .L129: - 2043 .align 2 - 2044 .L128: - 2045 011c 00180240 .word 1073879040 - 2046 0120 00040240 .word 1073873920 - 2047 .cfi_endproc - 2048 .LFE1210: - 2050 .section .text.MPhD_T,"ax",%progbits - 2051 .align 1 - 2052 .syntax unified - 2053 .thumb - 2054 .thumb_func - 2056 MPhD_T: - 2057 .LVL223: - 2058 .LFB1218: -2670:Src/main.c **** uint16_t P; - 2059 .loc 1 2670 1 is_stmt 1 view -0 - 2060 .cfi_startproc - 2061 @ args = 0, pretend = 0, frame = 0 - 2062 @ frame_needed = 0, uses_anonymous_args = 0 -2670:Src/main.c **** uint16_t P; - 2063 .loc 1 2670 1 is_stmt 0 view .LVU627 - 2064 0000 38B5 push {r3, r4, r5, lr} - 2065 .LCFI24: - 2066 .cfi_def_cfa_offset 16 - 2067 .cfi_offset 3, -16 - 2068 .cfi_offset 4, -12 - 2069 .cfi_offset 5, -8 - 2070 .cfi_offset 14, -4 - 2071 0002 0446 mov r4, r0 -2671:Src/main.c **** uint32_t tmp32; - 2072 .loc 1 2671 2 is_stmt 1 view .LVU628 -2672:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 2073 .loc 1 2672 2 view .LVU629 -2673:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 2074 .loc 1 2673 2 view .LVU630 - 2075 0004 0022 movs r2, #0 - 2076 0006 4FF48041 mov r1, #16384 - 2077 000a 8148 ldr r0, .L171 - 2078 .LVL224: -2673:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 2079 .loc 1 2673 2 is_stmt 0 view .LVU631 - 2080 000c FFF7FEFF bl HAL_GPIO_WritePin - 2081 .LVL225: -2674:Src/main.c **** tmp32=0; - 2082 .loc 1 2674 2 is_stmt 1 view .LVU632 - 2083 0010 0022 movs r2, #0 - 2084 0012 4FF40071 mov r1, #512 - 2085 0016 7F48 ldr r0, .L171+4 - 2086 0018 FFF7FEFF bl HAL_GPIO_WritePin - 2087 .LVL226: -2675:Src/main.c **** while(tmp32<500){tmp32++;} - 2088 .loc 1 2675 2 view .LVU633 -2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - ARM GAS /tmp/ccYgfTud.s page 161 - - - 2089 .loc 1 2676 2 view .LVU634 -2675:Src/main.c **** while(tmp32<500){tmp32++;} - 2090 .loc 1 2675 7 is_stmt 0 view .LVU635 - 2091 001c 0023 movs r3, #0 -2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 2092 .loc 1 2676 7 view .LVU636 - 2093 001e 00E0 b .L131 - 2094 .LVL227: - 2095 .L132: -2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 2096 .loc 1 2676 19 is_stmt 1 discriminator 2 view .LVU637 -2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 2097 .loc 1 2676 24 is_stmt 0 discriminator 2 view .LVU638 - 2098 0020 0133 adds r3, r3, #1 - 2099 .LVL228: - 2100 .L131: -2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 2101 .loc 1 2676 13 is_stmt 1 discriminator 1 view .LVU639 - 2102 0022 B3F5FA7F cmp r3, #500 - 2103 0026 FBD3 bcc .L132 -2677:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 2104 .loc 1 2677 2 view .LVU640 - 2105 0028 0122 movs r2, #1 - 2106 002a 4FF48041 mov r1, #16384 - 2107 002e 7848 ldr r0, .L171 - 2108 0030 FFF7FEFF bl HAL_GPIO_WritePin - 2109 .LVL229: -2678:Src/main.c **** tmp32=0; - 2110 .loc 1 2678 2 view .LVU641 - 2111 0034 0122 movs r2, #1 - 2112 0036 4FF40071 mov r1, #512 - 2113 003a 7648 ldr r0, .L171+4 - 2114 003c FFF7FEFF bl HAL_GPIO_WritePin - 2115 .LVL230: -2679:Src/main.c **** while(tmp32<500){tmp32++;} - 2116 .loc 1 2679 2 view .LVU642 -2680:Src/main.c **** if (num==1)//MPD1 - 2117 .loc 1 2680 2 view .LVU643 -2679:Src/main.c **** while(tmp32<500){tmp32++;} - 2118 .loc 1 2679 7 is_stmt 0 view .LVU644 - 2119 0040 0023 movs r3, #0 -2680:Src/main.c **** if (num==1)//MPD1 - 2120 .loc 1 2680 7 view .LVU645 - 2121 0042 00E0 b .L133 - 2122 .LVL231: - 2123 .L134: -2680:Src/main.c **** if (num==1)//MPD1 - 2124 .loc 1 2680 19 is_stmt 1 discriminator 2 view .LVU646 -2680:Src/main.c **** if (num==1)//MPD1 - 2125 .loc 1 2680 24 is_stmt 0 discriminator 2 view .LVU647 - 2126 0044 0133 adds r3, r3, #1 - 2127 .LVL232: - 2128 .L133: -2680:Src/main.c **** if (num==1)//MPD1 - 2129 .loc 1 2680 13 is_stmt 1 discriminator 1 view .LVU648 - 2130 0046 B3F5FA7F cmp r3, #500 - 2131 004a FBD3 bcc .L134 - ARM GAS /tmp/ccYgfTud.s page 162 - - -2681:Src/main.c **** { - 2132 .loc 1 2681 2 view .LVU649 - 2133 004c 631E subs r3, r4, #1 - 2134 .LVL233: -2681:Src/main.c **** { - 2135 .loc 1 2681 2 is_stmt 0 view .LVU650 - 2136 004e 032B cmp r3, #3 - 2137 0050 39D8 bhi .L135 - 2138 0052 DFE803F0 tbb [pc, r3] - 2139 .L137: - 2140 0056 02 .byte (.L140-.L137)/2 - 2141 0057 3A .byte (.L139-.L137)/2 - 2142 0058 6F .byte (.L138-.L137)/2 - 2143 0059 A6 .byte (.L136-.L137)/2 - 2144 .p2align 1 - 2145 .L140: -2683:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 2146 .loc 1 2683 3 is_stmt 1 view .LVU651 - 2147 005a 6D4C ldr r4, .L171 - 2148 .LVL234: -2683:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 2149 .loc 1 2683 3 is_stmt 0 view .LVU652 - 2150 005c 0122 movs r2, #1 - 2151 005e 4FF40061 mov r1, #2048 - 2152 0062 2046 mov r0, r4 - 2153 0064 FFF7FEFF bl HAL_GPIO_WritePin - 2154 .LVL235: -2684:Src/main.c **** tmp32=0; - 2155 .loc 1 2684 3 is_stmt 1 view .LVU653 - 2156 0068 0022 movs r2, #0 - 2157 006a 4FF48061 mov r1, #1024 - 2158 006e 2046 mov r0, r4 - 2159 0070 FFF7FEFF bl HAL_GPIO_WritePin - 2160 .LVL236: -2685:Src/main.c **** while(tmp32<500){tmp32++;} - 2161 .loc 1 2685 3 view .LVU654 -2686:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2162 .loc 1 2686 3 view .LVU655 -2685:Src/main.c **** while(tmp32<500){tmp32++;} - 2163 .loc 1 2685 8 is_stmt 0 view .LVU656 - 2164 0074 0023 movs r3, #0 -2686:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2165 .loc 1 2686 8 view .LVU657 - 2166 0076 00E0 b .L141 - 2167 .LVL237: - 2168 .L142: -2686:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2169 .loc 1 2686 20 is_stmt 1 discriminator 2 view .LVU658 -2686:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2170 .loc 1 2686 25 is_stmt 0 discriminator 2 view .LVU659 - 2171 0078 0133 adds r3, r3, #1 - 2172 .LVL238: - 2173 .L141: -2686:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2174 .loc 1 2686 14 is_stmt 1 discriminator 1 view .LVU660 - 2175 007a B3F5FA7F cmp r3, #500 - 2176 007e FBD3 bcc .L142 - ARM GAS /tmp/ccYgfTud.s page 163 - - -2688:Src/main.c **** tmp32 = 0; - 2177 .loc 1 2688 3 view .LVU661 - 2178 .LVL239: - 2179 .LBB375: - 2180 .LBI375: + 1407 .loc 1 2493 1 is_stmt 0 view .LVU455 + 1408 0000 10B5 push {r4, lr} + 1409 .LCFI15: + 1410 .cfi_def_cfa_offset 8 + 1411 .cfi_offset 4, -8 + 1412 .cfi_offset 14, -4 +2494:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 1413 .loc 1 2494 2 is_stmt 1 view .LVU456 + 1414 .LVL132: +2495:Src/main.c **** uint16_t value; + 1415 .loc 1 2495 2 view .LVU457 +2495:Src/main.c **** uint16_t value; + 1416 .loc 1 2495 11 is_stmt 0 view .LVU458 + 1417 0002 40F40044 orr r4, r0, #32768 + 1418 .LVL133: +2496:Src/main.c **** + 1419 .loc 1 2496 2 is_stmt 1 view .LVU459 +2498:Src/main.c **** { + 1420 .loc 1 2498 2 view .LVU460 + 1421 .LBB369: + 1422 .LBI369: + 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1423 .loc 4 381 26 view .LVU461 + 1424 .LBB370: + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1425 .loc 4 383 3 view .LVU462 + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1426 .loc 4 383 12 is_stmt 0 view .LVU463 + 1427 0006 284B ldr r3, .L98 + 1428 0008 1B68 ldr r3, [r3] + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1429 .loc 4 383 69 view .LVU464 + 1430 000a 13F0400F tst r3, #64 + 1431 000e 04D1 bne .L84 + 1432 .LVL134: + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1433 .loc 4 383 69 view .LVU465 + 1434 .LBE370: + 1435 .LBE369: +2500:Src/main.c **** } + 1436 .loc 1 2500 3 is_stmt 1 view .LVU466 + 1437 .LBB371: + 1438 .LBI371: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2181 .loc 4 358 22 view .LVU662 - 2182 .LBB376: + 1439 .loc 4 358 22 view .LVU467 + 1440 .LBB372: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2183 .loc 4 360 3 view .LVU663 - 2184 0080 654A ldr r2, .L171+8 - 2185 0082 1368 ldr r3, [r2] - 2186 .LVL240: + 1441 .loc 4 360 3 view .LVU468 + 1442 0010 254A ldr r2, .L98 + 1443 0012 1368 ldr r3, [r2] + 1444 0014 43F04003 orr r3, r3, #64 + 1445 0018 1360 str r3, [r2] + 1446 .LVL135: + 1447 .L84: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2187 .loc 4 360 3 is_stmt 0 view .LVU664 - 2188 0084 43F04003 orr r3, r3, #64 - 2189 0088 1360 str r3, [r2] - 2190 .LVL241: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2191 .loc 4 360 3 view .LVU665 - 2192 .LBE376: - 2193 .LBE375: -2689:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2194 .loc 1 2689 3 is_stmt 1 view .LVU666 -2690:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 2195 .loc 1 2690 3 view .LVU667 -2689:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2196 .loc 1 2689 9 is_stmt 0 view .LVU668 - 2197 008a 0023 movs r3, #0 - 2198 .LVL242: - 2199 .L143: -2690:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 2200 .loc 1 2690 43 is_stmt 1 discriminator 1 view .LVU669 - 2201 .LBB377: - 2202 .LBI377: + 1448 .loc 4 360 3 is_stmt 0 view .LVU469 + 1449 .LBE372: + ARM GAS /tmp/ccwR4KB7.s page 152 + + + 1450 .LBE371: +2503:Src/main.c **** + 1451 .loc 1 2503 2 is_stmt 1 view .LVU470 + 1452 001a 0022 movs r2, #0 + 1453 001c 4FF48051 mov r1, #4096 + 1454 0020 2248 ldr r0, .L98+4 + 1455 .LVL136: +2503:Src/main.c **** + 1456 .loc 1 2503 2 is_stmt 0 view .LVU471 + 1457 0022 FFF7FEFF bl HAL_GPIO_WritePin + 1458 .LVL137: +2505:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1459 .loc 1 2505 2 is_stmt 1 view .LVU472 +2494:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 1460 .loc 1 2494 11 is_stmt 0 view .LVU473 + 1461 0026 0023 movs r3, #0 + 1462 .LVL138: + 1463 .L86: +2505:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1464 .loc 1 2505 63 is_stmt 1 discriminator 2 view .LVU474 +2505:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1465 .loc 1 2505 41 discriminator 2 view .LVU475 + 1466 .LBB373: + 1467 .LBI373: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1468 .loc 4 916 26 view .LVU476 + 1469 .LBB374: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1470 .loc 4 918 3 view .LVU477 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1471 .loc 4 918 12 is_stmt 0 view .LVU478 + 1472 0028 1F4A ldr r2, .L98 + 1473 002a 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1474 .loc 4 918 66 view .LVU479 + 1475 002c 12F0020F tst r2, #2 + 1476 0030 05D1 bne .L85 + 1477 .LVL139: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1478 .loc 4 918 66 view .LVU480 + 1479 .LBE374: + 1480 .LBE373: +2505:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1481 .loc 1 2505 50 discriminator 1 view .LVU481 + 1482 0032 5A1C adds r2, r3, #1 + 1483 .LVL140: +2505:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1484 .loc 1 2505 41 discriminator 1 view .LVU482 + 1485 0034 B3F57A7F cmp r3, #1000 + 1486 0038 01D2 bcs .L85 +2505:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1487 .loc 1 2505 50 discriminator 1 view .LVU483 + 1488 003a 1346 mov r3, r2 + 1489 003c F4E7 b .L86 + 1490 .LVL141: + 1491 .L85: +2506:Src/main.c **** tmp32 = 0; + ARM GAS /tmp/ccwR4KB7.s page 153 + + + 1492 .loc 1 2506 2 is_stmt 1 view .LVU484 + 1493 .LBB375: + 1494 .LBI375: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1495 .loc 4 1373 22 view .LVU485 + 1496 .LBB376: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 1497 .loc 4 1376 3 view .LVU486 + 1498 .loc 4 1377 3 view .LVU487 + 1499 .loc 4 1377 10 is_stmt 0 view .LVU488 + 1500 003e 1A4B ldr r3, .L98 + 1501 0040 9C81 strh r4, [r3, #12] @ movhi + 1502 .LVL142: + 1503 .loc 4 1377 10 view .LVU489 + 1504 .LBE376: + 1505 .LBE375: +2507:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1506 .loc 1 2507 2 is_stmt 1 view .LVU490 +2508:Src/main.c **** (void) SPI2->DR; + 1507 .loc 1 2508 2 view .LVU491 +2507:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1508 .loc 1 2507 8 is_stmt 0 view .LVU492 + 1509 0042 0023 movs r3, #0 + 1510 .LVL143: + 1511 .L88: +2508:Src/main.c **** (void) SPI2->DR; + 1512 .loc 1 2508 64 is_stmt 1 discriminator 2 view .LVU493 +2508:Src/main.c **** (void) SPI2->DR; + 1513 .loc 1 2508 42 discriminator 2 view .LVU494 + 1514 .LBB377: + 1515 .LBI377: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2203 .loc 4 905 26 view .LVU670 - 2204 .LBB378: + 1516 .loc 4 905 26 view .LVU495 + 1517 .LBB378: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2205 .loc 4 907 3 view .LVU671 + 1518 .loc 4 907 3 view .LVU496 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2206 .loc 4 907 12 is_stmt 0 view .LVU672 - 2207 008c 624A ldr r2, .L171+8 - 2208 008e 9268 ldr r2, [r2, #8] + 1519 .loc 4 907 12 is_stmt 0 view .LVU497 + 1520 0044 184A ldr r2, .L98 + 1521 0046 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2209 .loc 4 907 68 view .LVU673 - 2210 0090 12F0010F tst r2, #1 - 2211 0094 04D1 bne .L144 - 2212 .LVL243: + 1522 .loc 4 907 68 view .LVU498 + 1523 0048 12F0010F tst r2, #1 + 1524 004c 05D1 bne .L87 + 1525 .LVL144: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2213 .loc 4 907 68 view .LVU674 - 2214 .LBE378: - 2215 .LBE377: -2690:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 2216 .loc 1 2690 43 discriminator 2 view .LVU675 - 2217 0096 B3F57A7F cmp r3, #1000 - 2218 009a 01D8 bhi .L144 - ARM GAS /tmp/ccYgfTud.s page 164 + 1526 .loc 4 907 68 view .LVU499 + 1527 .LBE378: + 1528 .LBE377: +2508:Src/main.c **** (void) SPI2->DR; + 1529 .loc 1 2508 51 discriminator 1 view .LVU500 + 1530 004e 5A1C adds r2, r3, #1 + 1531 .LVL145: +2508:Src/main.c **** (void) SPI2->DR; + 1532 .loc 1 2508 42 discriminator 1 view .LVU501 + 1533 0050 B3F57A7F cmp r3, #1000 + 1534 0054 01D2 bcs .L87 + ARM GAS /tmp/ccwR4KB7.s page 154 -2690:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 2219 .loc 1 2690 62 is_stmt 1 discriminator 3 view .LVU676 -2690:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 2220 .loc 1 2690 67 is_stmt 0 discriminator 3 view .LVU677 - 2221 009c 0133 adds r3, r3, #1 - 2222 .LVL244: -2690:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 2223 .loc 1 2690 67 discriminator 3 view .LVU678 - 2224 009e F5E7 b .L143 - 2225 .L144: -2691:Src/main.c **** while(tmp32<500){tmp32++;} - 2226 .loc 1 2691 3 is_stmt 1 view .LVU679 - 2227 .LVL245: - 2228 .LBB379: - 2229 .LBI379: - 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2230 .loc 4 370 22 view .LVU680 - 2231 .LBB380: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2232 .loc 4 372 3 view .LVU681 - 2233 00a0 5D49 ldr r1, .L171+8 - 2234 00a2 0A68 ldr r2, [r1] - 2235 00a4 22F04002 bic r2, r2, #64 - 2236 00a8 0A60 str r2, [r1] - 2237 .LVL246: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2238 .loc 4 372 3 is_stmt 0 view .LVU682 - 2239 .LBE380: - 2240 .LBE379: -2692:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2241 .loc 1 2692 3 is_stmt 1 view .LVU683 - 2242 .LBB382: - 2243 .LBB381: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2244 .loc 4 373 1 is_stmt 0 view .LVU684 - 2245 00aa 00E0 b .L146 - 2246 .L147: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2247 .loc 4 373 1 view .LVU685 - 2248 .LBE381: - 2249 .LBE382: -2692:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2250 .loc 1 2692 20 is_stmt 1 discriminator 2 view .LVU686 -2692:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2251 .loc 1 2692 25 is_stmt 0 discriminator 2 view .LVU687 - 2252 00ac 0133 adds r3, r3, #1 - 2253 .LVL247: - 2254 .L146: -2692:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2255 .loc 1 2692 14 is_stmt 1 discriminator 1 view .LVU688 - 2256 00ae B3F5FA7F cmp r3, #500 - 2257 00b2 FBD3 bcc .L147 -2694:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 2258 .loc 1 2694 3 view .LVU689 - 2259 00b4 0122 movs r2, #1 - 2260 00b6 4FF48061 mov r1, #1024 - 2261 00ba 5548 ldr r0, .L171 - ARM GAS /tmp/ccYgfTud.s page 165 +2508:Src/main.c **** (void) SPI2->DR; + 1535 .loc 1 2508 51 discriminator 1 view .LVU502 + 1536 0056 1346 mov r3, r2 + 1537 0058 F4E7 b .L88 + 1538 .LVL146: + 1539 .L87: +2509:Src/main.c **** + 1540 .loc 1 2509 2 is_stmt 1 view .LVU503 + 1541 005a 134B ldr r3, .L98 + 1542 005c DB68 ldr r3, [r3, #12] +2511:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1543 .loc 1 2511 2 view .LVU504 + 1544 .LVL147: +2512:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1545 .loc 1 2512 2 view .LVU505 +2511:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1546 .loc 1 2511 8 is_stmt 0 view .LVU506 + 1547 005e 0023 movs r3, #0 + 1548 .LVL148: + 1549 .L90: +2512:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1550 .loc 1 2512 63 is_stmt 1 discriminator 2 view .LVU507 +2512:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1551 .loc 1 2512 41 discriminator 2 view .LVU508 + 1552 .LBB379: + 1553 .LBI379: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1554 .loc 4 916 26 view .LVU509 + 1555 .LBB380: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1556 .loc 4 918 3 view .LVU510 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1557 .loc 4 918 12 is_stmt 0 view .LVU511 + 1558 0060 114A ldr r2, .L98 + 1559 0062 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1560 .loc 4 918 66 view .LVU512 + 1561 0064 12F0020F tst r2, #2 + 1562 0068 05D1 bne .L89 + 1563 .LVL149: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1564 .loc 4 918 66 view .LVU513 + 1565 .LBE380: + 1566 .LBE379: +2512:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1567 .loc 1 2512 50 discriminator 1 view .LVU514 + 1568 006a 5A1C adds r2, r3, #1 + 1569 .LVL150: +2512:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1570 .loc 1 2512 41 discriminator 1 view .LVU515 + 1571 006c B3F57A7F cmp r3, #1000 + 1572 0070 01D2 bcs .L89 +2512:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1573 .loc 1 2512 50 discriminator 1 view .LVU516 + 1574 0072 1346 mov r3, r2 + 1575 0074 F4E7 b .L90 + 1576 .LVL151: + ARM GAS /tmp/ccwR4KB7.s page 155 - 2262 00bc FFF7FEFF bl HAL_GPIO_WritePin - 2263 .LVL248: -2695:Src/main.c **** } - 2264 .loc 1 2695 3 view .LVU690 - 2265 .LBB383: - 2266 .LBI383: + 1577 .L89: +2513:Src/main.c **** tmp32 = 0; + 1578 .loc 1 2513 2 is_stmt 1 view .LVU517 + 1579 .LBB381: + 1580 .LBI381: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1581 .loc 4 1373 22 view .LVU518 + 1582 .LBB382: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 1583 .loc 4 1376 3 view .LVU519 + 1584 .loc 4 1377 3 view .LVU520 + 1585 .loc 4 1377 10 is_stmt 0 view .LVU521 + 1586 0076 0023 movs r3, #0 + 1587 0078 0B4A ldr r2, .L98 + 1588 007a 9381 strh r3, [r2, #12] @ movhi + 1589 .LVL152: + 1590 .loc 4 1377 10 view .LVU522 + 1591 .LBE382: + 1592 .LBE381: +2514:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1593 .loc 1 2514 2 is_stmt 1 view .LVU523 +2515:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1594 .loc 1 2515 2 view .LVU524 + 1595 .L92: +2515:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1596 .loc 1 2515 64 discriminator 2 view .LVU525 +2515:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1597 .loc 1 2515 42 discriminator 2 view .LVU526 + 1598 .LBB383: + 1599 .LBI383: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1600 .loc 4 905 26 view .LVU527 + 1601 .LBB384: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1602 .loc 4 907 3 view .LVU528 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1603 .loc 4 907 12 is_stmt 0 view .LVU529 + 1604 007c 0A4A ldr r2, .L98 + 1605 007e 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1606 .loc 4 907 68 view .LVU530 + 1607 0080 12F0010F tst r2, #1 + 1608 0084 05D1 bne .L91 + 1609 .LVL153: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1610 .loc 4 907 68 view .LVU531 + 1611 .LBE384: + 1612 .LBE383: +2515:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1613 .loc 1 2515 51 discriminator 1 view .LVU532 + 1614 0086 5A1C adds r2, r3, #1 + 1615 .LVL154: +2515:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1616 .loc 1 2515 42 discriminator 1 view .LVU533 + 1617 0088 B3F57A7F cmp r3, #1000 + 1618 008c 01D2 bcs .L91 +2515:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + ARM GAS /tmp/ccwR4KB7.s page 156 + + + 1619 .loc 1 2515 51 discriminator 1 view .LVU534 + 1620 008e 1346 mov r3, r2 + 1621 0090 F4E7 b .L92 + 1622 .LVL155: + 1623 .L91: +2516:Src/main.c **** + 1624 .loc 1 2516 2 is_stmt 1 view .LVU535 + 1625 .LBB385: + 1626 .LBI385: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2267 .loc 4 1344 26 view .LVU691 - 2268 .LBB384: + 1627 .loc 4 1344 26 view .LVU536 + 1628 .LBB386: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2269 .loc 4 1346 3 view .LVU692 + 1629 .loc 4 1346 3 view .LVU537 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2270 .loc 4 1346 21 is_stmt 0 view .LVU693 - 2271 00c0 554B ldr r3, .L171+8 - 2272 00c2 DD68 ldr r5, [r3, #12] + 1630 .loc 4 1346 21 is_stmt 0 view .LVU538 + 1631 0092 054B ldr r3, .L98 + 1632 0094 DC68 ldr r4, [r3, #12] + 1633 .LVL156: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2273 .loc 4 1346 10 view .LVU694 - 2274 00c4 ADB2 uxth r5, r5 - 2275 .LVL249: - 2276 .L135: + 1634 .loc 4 1346 10 view .LVU539 + 1635 0096 A4B2 uxth r4, r4 + 1636 .LVL157: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2277 .loc 4 1346 10 view .LVU695 - 2278 .LBE384: - 2279 .LBE383: -2767:Src/main.c **** } - 2280 .loc 1 2767 2 is_stmt 1 view .LVU696 -2768:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time - 2281 .loc 1 2768 1 is_stmt 0 view .LVU697 - 2282 00c6 2846 mov r0, r5 - 2283 00c8 38BD pop {r3, r4, r5, pc} - 2284 .LVL250: - 2285 .L139: -2699:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); - 2286 .loc 1 2699 3 is_stmt 1 view .LVU698 - 2287 00ca 524C ldr r4, .L171+4 - 2288 00cc 0122 movs r2, #1 - 2289 00ce 4FF48061 mov r1, #1024 - 2290 00d2 2046 mov r0, r4 - 2291 00d4 FFF7FEFF bl HAL_GPIO_WritePin - 2292 .LVL251: -2700:Src/main.c **** tmp32=0; - 2293 .loc 1 2700 3 view .LVU699 - 2294 00d8 0022 movs r2, #0 - 2295 00da 4021 movs r1, #64 - 2296 00dc 2046 mov r0, r4 - 2297 00de FFF7FEFF bl HAL_GPIO_WritePin - 2298 .LVL252: -2701:Src/main.c **** while(tmp32<500){tmp32++;} - 2299 .loc 1 2701 3 view .LVU700 -2702:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2300 .loc 1 2702 3 view .LVU701 -2701:Src/main.c **** while(tmp32<500){tmp32++;} - 2301 .loc 1 2701 8 is_stmt 0 view .LVU702 - 2302 00e2 0023 movs r3, #0 -2702:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2303 .loc 1 2702 8 view .LVU703 - 2304 00e4 00E0 b .L148 - ARM GAS /tmp/ccYgfTud.s page 166 + 1637 .loc 4 1346 10 view .LVU540 + 1638 .LBE386: + 1639 .LBE385: +2518:Src/main.c **** return value; + 1640 .loc 1 2518 2 is_stmt 1 view .LVU541 + 1641 0098 0122 movs r2, #1 + 1642 009a 4FF48051 mov r1, #4096 + 1643 009e 0348 ldr r0, .L98+4 + 1644 00a0 FFF7FEFF bl HAL_GPIO_WritePin + 1645 .LVL158: +2519:Src/main.c **** } + 1646 .loc 1 2519 2 view .LVU542 +2520:Src/main.c **** + 1647 .loc 1 2520 1 is_stmt 0 view .LVU543 + 1648 00a4 2046 mov r0, r4 + 1649 00a6 10BD pop {r4, pc} + 1650 .LVL159: + 1651 .L99: +2520:Src/main.c **** + 1652 .loc 1 2520 1 view .LVU544 + 1653 .align 2 + 1654 .L98: + 1655 00a8 00380040 .word 1073756160 + 1656 00ac 00040240 .word 1073873920 + 1657 .cfi_endproc + 1658 .LFE1213: + 1660 .section .text.AD9102_CheckFlagsSram,"ax",%progbits + 1661 .align 1 + 1662 .syntax unified + 1663 .thumb + 1664 .thumb_func + 1666 AD9102_CheckFlagsSram: + 1667 .LVL160: + ARM GAS /tmp/ccwR4KB7.s page 157 + 1668 .LFB1219: +2786:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 1669 .loc 1 2786 1 is_stmt 1 view -0 + 1670 .cfi_startproc + 1671 @ args = 0, pretend = 0, frame = 8 + 1672 @ frame_needed = 0, uses_anonymous_args = 0 +2786:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 1673 .loc 1 2786 1 is_stmt 0 view .LVU546 + 1674 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1675 .LCFI16: + 1676 .cfi_def_cfa_offset 36 + 1677 .cfi_offset 4, -36 + 1678 .cfi_offset 5, -32 + 1679 .cfi_offset 6, -28 + 1680 .cfi_offset 7, -24 + 1681 .cfi_offset 8, -20 + 1682 .cfi_offset 9, -16 + 1683 .cfi_offset 10, -12 + 1684 .cfi_offset 11, -8 + 1685 .cfi_offset 14, -4 + 1686 0004 83B0 sub sp, sp, #12 + 1687 .LCFI17: + 1688 .cfi_def_cfa_offset 48 + 1689 0006 8346 mov fp, r0 + 1690 0008 0F46 mov r7, r1 + 1691 000a 1446 mov r4, r2 + 1692 000c 1D46 mov r5, r3 +2787:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1693 .loc 1 2787 2 is_stmt 1 view .LVU547 +2787:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1694 .loc 1 2787 23 is_stmt 0 view .LVU548 + 1695 000e 0020 movs r0, #0 + 1696 .LVL161: +2787:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1697 .loc 1 2787 23 view .LVU549 + 1698 0010 FFF7FEFF bl AD9102_ReadReg + 1699 .LVL162: +2787:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1700 .loc 1 2787 23 view .LVU550 + 1701 0014 8246 mov r10, r0 + 1702 .LVL163: +2788:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 1703 .loc 1 2788 2 is_stmt 1 view .LVU551 +2788:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 1704 .loc 1 2788 22 is_stmt 0 view .LVU552 + 1705 0016 0120 movs r0, #1 + 1706 0018 FFF7FEFF bl AD9102_ReadReg + 1707 .LVL164: + 1708 001c 8146 mov r9, r0 + 1709 .LVL165: +2789:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 1710 .loc 1 2789 2 is_stmt 1 view .LVU553 +2789:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 1711 .loc 1 2789 22 is_stmt 0 view .LVU554 + 1712 001e 0220 movs r0, #2 + 1713 0020 FFF7FEFF bl AD9102_ReadReg + 1714 .LVL166: + ARM GAS /tmp/ccwR4KB7.s page 158 + + + 1715 0024 8046 mov r8, r0 + 1716 .LVL167: +2790:Src/main.c **** + 1717 .loc 1 2790 2 is_stmt 1 view .LVU555 +2790:Src/main.c **** + 1718 .loc 1 2790 21 is_stmt 0 view .LVU556 + 1719 0026 6020 movs r0, #96 + 1720 0028 FFF7FEFF bl AD9102_ReadReg + 1721 .LVL168: +2792:Src/main.c **** { + 1722 .loc 1 2792 2 is_stmt 1 view .LVU557 +2792:Src/main.c **** { + 1723 .loc 1 2792 5 is_stmt 0 view .LVU558 + 1724 002c 1CB1 cbz r4, .L117 +2796:Src/main.c **** { + 1725 .loc 1 2796 2 is_stmt 1 view .LVU559 +2796:Src/main.c **** { + 1726 .loc 1 2796 5 is_stmt 0 view .LVU560 + 1727 002e 012C cmp r4, #1 + 1728 0030 02D8 bhi .L101 +2798:Src/main.c **** } + 1729 .loc 1 2798 11 view .LVU561 + 1730 0032 0224 movs r4, #2 + 1731 .LVL169: +2798:Src/main.c **** } + 1732 .loc 1 2798 11 view .LVU562 + 1733 0034 03E0 b .L102 + 1734 .LVL170: + 1735 .L117: +2794:Src/main.c **** } + 1736 .loc 1 2794 11 view .LVU563 + 1737 0036 1024 movs r4, #16 + 1738 .LVL171: + 1739 .L101: +2800:Src/main.c **** { + 1740 .loc 1 2800 2 is_stmt 1 view .LVU564 +2800:Src/main.c **** { + 1741 .loc 1 2800 5 is_stmt 0 view .LVU565 + 1742 0038 B4F5805F cmp r4, #4096 + 1743 003c 04D8 bhi .L119 + 1744 .LVL172: + 1745 .L102: +2804:Src/main.c **** { + 1746 .loc 1 2804 2 is_stmt 1 view .LVU566 +2804:Src/main.c **** { + 1747 .loc 1 2804 5 is_stmt 0 view .LVU567 + 1748 003e 35B1 cbz r5, .L120 +2808:Src/main.c **** { + 1749 .loc 1 2808 2 is_stmt 1 view .LVU568 +2808:Src/main.c **** { + 1750 .loc 1 2808 5 is_stmt 0 view .LVU569 + 1751 0040 0F2D cmp r5, #15 + 1752 0042 05D9 bls .L103 +2810:Src/main.c **** } + 1753 .loc 1 2810 8 view .LVU570 + 1754 0044 0F25 movs r5, #15 + 1755 .LVL173: + ARM GAS /tmp/ccwR4KB7.s page 159 + + +2810:Src/main.c **** } + 1756 .loc 1 2810 8 view .LVU571 + 1757 0046 03E0 b .L103 + 1758 .LVL174: + 1759 .L119: +2802:Src/main.c **** } + 1760 .loc 1 2802 11 view .LVU572 + 1761 0048 4FF48054 mov r4, #4096 + 1762 .LVL175: +2802:Src/main.c **** } + 1763 .loc 1 2802 11 view .LVU573 + 1764 004c F7E7 b .L102 + 1765 .LVL176: + 1766 .L120: +2806:Src/main.c **** } + 1767 .loc 1 2806 8 view .LVU574 + 1768 004e 0125 movs r5, #1 + 1769 .LVL177: + 1770 .L103: +2813:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 1771 .loc 1 2813 2 is_stmt 1 view .LVU575 +2813:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 1772 .loc 1 2813 63 is_stmt 0 view .LVU576 + 1773 0050 2E02 lsls r6, r5, #8 + 1774 0052 06F47066 and r6, r6, #3840 +2813:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 1775 .loc 1 2813 11 view .LVU577 + 1776 0056 46F01106 orr r6, r6, #17 + 1777 .LVL178: +2816:Src/main.c **** if (pat_period == 0u) + 1778 .loc 1 2816 2 is_stmt 1 view .LVU578 +2816:Src/main.c **** if (pat_period == 0u) + 1779 .loc 1 2816 24 is_stmt 0 view .LVU579 + 1780 005a 0194 str r4, [sp, #4] +2816:Src/main.c **** if (pat_period == 0u) + 1781 .loc 1 2816 44 view .LVU580 + 1782 005c 05F00F05 and r5, r5, #15 + 1783 .LVL179: +2816:Src/main.c **** if (pat_period == 0u) + 1784 .loc 1 2816 11 view .LVU581 + 1785 0060 04FB05F5 mul r5, r4, r5 + 1786 .LVL180: +2817:Src/main.c **** { + 1787 .loc 1 2817 2 is_stmt 1 view .LVU582 +2817:Src/main.c **** { + 1788 .loc 1 2817 5 is_stmt 0 view .LVU583 + 1789 0064 1DB1 cbz r5, .L104 +2821:Src/main.c **** { + 1790 .loc 1 2821 2 is_stmt 1 view .LVU584 +2821:Src/main.c **** { + 1791 .loc 1 2821 5 is_stmt 0 view .LVU585 + 1792 0066 B5F5803F cmp r5, #65536 + 1793 006a 4CD2 bcs .L122 + 1794 006c 0195 str r5, [sp, #4] + 1795 .L104: + 1796 .LVL181: +2826:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 160 + + + 1797 .loc 1 2826 2 is_stmt 1 view .LVU586 +2826:Src/main.c **** + 1798 .loc 1 2826 43 is_stmt 0 view .LVU587 + 1799 006e 013C subs r4, r4, #1 + 1800 .LVL182: +2826:Src/main.c **** + 1801 .loc 1 2826 43 view .LVU588 + 1802 0070 A4B2 uxth r4, r4 +2826:Src/main.c **** + 1803 .loc 1 2826 11 view .LVU589 + 1804 0072 2401 lsls r4, r4, #4 + 1805 0074 A4B2 uxth r4, r4 + 1806 .LVL183: +2828:Src/main.c **** + 1807 .loc 1 2828 2 is_stmt 1 view .LVU590 +2830:Src/main.c **** { + 1808 .loc 1 2830 2 view .LVU591 +2830:Src/main.c **** { + 1809 .loc 1 2830 5 is_stmt 0 view .LVU592 + 1810 0076 BAF1000F cmp r10, #0 + 1811 007a 48D1 bne .L123 +2828:Src/main.c **** + 1812 .loc 1 2828 10 view .LVU593 + 1813 007c 0125 movs r5, #1 + 1814 .L105: + 1815 .LVL184: +2834:Src/main.c **** { + 1816 .loc 1 2834 2 is_stmt 1 view .LVU594 +2834:Src/main.c **** { + 1817 .loc 1 2834 5 is_stmt 0 view .LVU595 + 1818 007e 19F4F47F tst r9, #488 + 1819 0082 00D0 beq .L106 +2836:Src/main.c **** } + 1820 .loc 1 2836 6 view .LVU596 + 1821 0084 0025 movs r5, #0 + 1822 .LVL185: + 1823 .L106: +2838:Src/main.c **** { + 1824 .loc 1 2838 2 is_stmt 1 view .LVU597 +2838:Src/main.c **** { + 1825 .loc 1 2838 5 is_stmt 0 view .LVU598 + 1826 0086 18F40E6F tst r8, #2272 + 1827 008a 00D0 beq .L107 +2840:Src/main.c **** } + 1828 .loc 1 2840 6 view .LVU599 + 1829 008c 0025 movs r5, #0 + 1830 .LVL186: + 1831 .L107: +2842:Src/main.c **** { + 1832 .loc 1 2842 2 is_stmt 1 view .LVU600 +2842:Src/main.c **** { + 1833 .loc 1 2842 5 is_stmt 0 view .LVU601 + 1834 008e 10F03F0F tst r0, #63 + 1835 0092 00D0 beq .L108 +2844:Src/main.c **** } + 1836 .loc 1 2844 6 view .LVU602 + 1837 0094 0025 movs r5, #0 + ARM GAS /tmp/ccwR4KB7.s page 161 + + + 1838 .LVL187: + 1839 .L108: +2846:Src/main.c **** { + 1840 .loc 1 2846 2 is_stmt 1 view .LVU603 +2846:Src/main.c **** { + 1841 .loc 1 2846 5 is_stmt 0 view .LVU604 + 1842 0096 1FB1 cbz r7, .L109 +2846:Src/main.c **** { + 1843 .loc 1 2846 17 discriminator 1 view .LVU605 + 1844 0098 1BF0010F tst fp, #1 + 1845 009c 00D1 bne .L109 +2848:Src/main.c **** } + 1846 .loc 1 2848 6 view .LVU606 + 1847 009e 0025 movs r5, #0 + 1848 .LVL188: + 1849 .L109: +2851:Src/main.c **** { + 1850 .loc 1 2851 2 is_stmt 1 view .LVU607 +2851:Src/main.c **** { + 1851 .loc 1 2851 6 is_stmt 0 view .LVU608 + 1852 00a0 2720 movs r0, #39 + 1853 .LVL189: +2851:Src/main.c **** { + 1854 .loc 1 2851 6 view .LVU609 + 1855 00a2 FFF7FEFF bl AD9102_ReadReg + 1856 .LVL190: +2851:Src/main.c **** { + 1857 .loc 1 2851 5 discriminator 1 view .LVU610 + 1858 00a6 43F23003 movw r3, #12336 + 1859 00aa 9842 cmp r0, r3 + 1860 00ac 00D0 beq .L110 +2853:Src/main.c **** } + 1861 .loc 1 2853 6 view .LVU611 + 1862 00ae 0025 movs r5, #0 + 1863 .LVL191: + 1864 .L110: +2855:Src/main.c **** { + 1865 .loc 1 2855 2 is_stmt 1 view .LVU612 +2855:Src/main.c **** { + 1866 .loc 1 2855 6 is_stmt 0 view .LVU613 + 1867 00b0 2820 movs r0, #40 + 1868 00b2 FFF7FEFF bl AD9102_ReadReg + 1869 .LVL192: +2855:Src/main.c **** { + 1870 .loc 1 2855 5 discriminator 1 view .LVU614 + 1871 00b6 B042 cmp r0, r6 + 1872 00b8 00D0 beq .L111 +2857:Src/main.c **** } + 1873 .loc 1 2857 6 view .LVU615 + 1874 00ba 0025 movs r5, #0 + 1875 .LVL193: + 1876 .L111: +2859:Src/main.c **** { + 1877 .loc 1 2859 2 is_stmt 1 view .LVU616 +2859:Src/main.c **** { + 1878 .loc 1 2859 6 is_stmt 0 view .LVU617 + 1879 00bc 2920 movs r0, #41 + ARM GAS /tmp/ccwR4KB7.s page 162 + + + 1880 00be FFF7FEFF bl AD9102_ReadReg + 1881 .LVL194: +2859:Src/main.c **** { + 1882 .loc 1 2859 44 discriminator 1 view .LVU618 + 1883 00c2 BDF80430 ldrh r3, [sp, #4] +2859:Src/main.c **** { + 1884 .loc 1 2859 5 discriminator 1 view .LVU619 + 1885 00c6 9842 cmp r0, r3 + 1886 00c8 00D0 beq .L112 +2861:Src/main.c **** } + 1887 .loc 1 2861 6 view .LVU620 + 1888 00ca 0025 movs r5, #0 + 1889 .LVL195: + 1890 .L112: +2863:Src/main.c **** { + 1891 .loc 1 2863 2 is_stmt 1 view .LVU621 +2863:Src/main.c **** { + 1892 .loc 1 2863 6 is_stmt 0 view .LVU622 + 1893 00cc 1F20 movs r0, #31 + 1894 00ce FFF7FEFF bl AD9102_ReadReg + 1895 .LVL196: +2863:Src/main.c **** { + 1896 .loc 1 2863 5 discriminator 1 view .LVU623 + 1897 00d2 00B1 cbz r0, .L113 +2865:Src/main.c **** } + 1898 .loc 1 2865 6 view .LVU624 + 1899 00d4 0025 movs r5, #0 + 1900 .LVL197: + 1901 .L113: +2867:Src/main.c **** { + 1902 .loc 1 2867 2 is_stmt 1 view .LVU625 +2867:Src/main.c **** { + 1903 .loc 1 2867 6 is_stmt 0 view .LVU626 + 1904 00d6 5D20 movs r0, #93 + 1905 00d8 FFF7FEFF bl AD9102_ReadReg + 1906 .LVL198: +2867:Src/main.c **** { + 1907 .loc 1 2867 5 discriminator 1 view .LVU627 + 1908 00dc 00B1 cbz r0, .L114 +2869:Src/main.c **** } + 1909 .loc 1 2869 6 view .LVU628 + 1910 00de 0025 movs r5, #0 + 1911 .LVL199: + 1912 .L114: +2871:Src/main.c **** { + 1913 .loc 1 2871 2 is_stmt 1 view .LVU629 +2871:Src/main.c **** { + 1914 .loc 1 2871 6 is_stmt 0 view .LVU630 + 1915 00e0 5E20 movs r0, #94 + 1916 00e2 FFF7FEFF bl AD9102_ReadReg + 1917 .LVL200: +2871:Src/main.c **** { + 1918 .loc 1 2871 5 discriminator 1 view .LVU631 + 1919 00e6 A042 cmp r0, r4 + 1920 00e8 00D0 beq .L115 +2873:Src/main.c **** } + 1921 .loc 1 2873 6 view .LVU632 + ARM GAS /tmp/ccwR4KB7.s page 163 + + + 1922 00ea 0025 movs r5, #0 + 1923 .LVL201: + 1924 .L115: +2875:Src/main.c **** { + 1925 .loc 1 2875 2 is_stmt 1 view .LVU633 +2875:Src/main.c **** { + 1926 .loc 1 2875 6 is_stmt 0 view .LVU634 + 1927 00ec 2B20 movs r0, #43 + 1928 00ee FFF7FEFF bl AD9102_ReadReg + 1929 .LVL202: +2875:Src/main.c **** { + 1930 .loc 1 2875 5 discriminator 1 view .LVU635 + 1931 00f2 40F20113 movw r3, #257 + 1932 00f6 9842 cmp r0, r3 + 1933 00f8 00D0 beq .L116 +2877:Src/main.c **** } + 1934 .loc 1 2877 6 view .LVU636 + 1935 00fa 0025 movs r5, #0 + 1936 .LVL203: + 1937 .L116: +2880:Src/main.c **** } + 1938 .loc 1 2880 2 is_stmt 1 view .LVU637 +2881:Src/main.c **** + 1939 .loc 1 2881 1 is_stmt 0 view .LVU638 + 1940 00fc 85F00100 eor r0, r5, #1 + 1941 0100 03B0 add sp, sp, #12 + 1942 .LCFI18: + 1943 .cfi_remember_state + 1944 .cfi_def_cfa_offset 36 + 1945 @ sp needed + 1946 0102 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1947 .LVL204: + 1948 .L122: + 1949 .LCFI19: + 1950 .cfi_restore_state +2823:Src/main.c **** } + 1951 .loc 1 2823 14 view .LVU639 + 1952 0106 4FF6FF73 movw r3, #65535 + 1953 010a 0193 str r3, [sp, #4] + 1954 010c AFE7 b .L104 + 1955 .LVL205: + 1956 .L123: +2832:Src/main.c **** } + 1957 .loc 1 2832 6 view .LVU640 + 1958 010e 0025 movs r5, #0 + 1959 0110 B5E7 b .L105 + 1960 .cfi_endproc + 1961 .LFE1219: + 1963 .section .text.AD9102_CheckFlags,"ax",%progbits + 1964 .align 1 + 1965 .syntax unified + 1966 .thumb + 1967 .thumb_func + 1969 AD9102_CheckFlags: + 1970 .LVL206: + 1971 .LFB1218: +2706:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + ARM GAS /tmp/ccwR4KB7.s page 164 + + + 1972 .loc 1 2706 1 is_stmt 1 view -0 + 1973 .cfi_startproc + 1974 @ args = 8, pretend = 0, frame = 8 + 1975 @ frame_needed = 0, uses_anonymous_args = 0 +2706:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 1976 .loc 1 2706 1 is_stmt 0 view .LVU642 + 1977 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1978 .LCFI20: + 1979 .cfi_def_cfa_offset 36 + 1980 .cfi_offset 4, -36 + 1981 .cfi_offset 5, -32 + 1982 .cfi_offset 6, -28 + 1983 .cfi_offset 7, -24 + 1984 .cfi_offset 8, -20 + 1985 .cfi_offset 9, -16 + 1986 .cfi_offset 10, -12 + 1987 .cfi_offset 11, -8 + 1988 .cfi_offset 14, -4 + 1989 0004 83B0 sub sp, sp, #12 + 1990 .LCFI21: + 1991 .cfi_def_cfa_offset 48 + 1992 0006 0190 str r0, [sp, #4] + 1993 0008 0F46 mov r7, r1 + 1994 000a 1546 mov r5, r2 + 1995 000c 1C46 mov r4, r3 + 1996 000e BDF834B0 ldrh fp, [sp, #52] +2707:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1997 .loc 1 2707 2 is_stmt 1 view .LVU643 +2707:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1998 .loc 1 2707 23 is_stmt 0 view .LVU644 + 1999 0012 0020 movs r0, #0 + 2000 .LVL207: +2707:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2001 .loc 1 2707 23 view .LVU645 + 2002 0014 FFF7FEFF bl AD9102_ReadReg + 2003 .LVL208: +2707:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2004 .loc 1 2707 23 view .LVU646 + 2005 0018 8246 mov r10, r0 + 2006 .LVL209: +2708:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 2007 .loc 1 2708 2 is_stmt 1 view .LVU647 +2708:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 2008 .loc 1 2708 22 is_stmt 0 view .LVU648 + 2009 001a 0120 movs r0, #1 + 2010 001c FFF7FEFF bl AD9102_ReadReg + 2011 .LVL210: + 2012 0020 8146 mov r9, r0 + 2013 .LVL211: +2709:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 2014 .loc 1 2709 2 is_stmt 1 view .LVU649 +2709:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 2015 .loc 1 2709 22 is_stmt 0 view .LVU650 + 2016 0022 0220 movs r0, #2 + 2017 0024 FFF7FEFF bl AD9102_ReadReg + 2018 .LVL212: + 2019 0028 8046 mov r8, r0 + ARM GAS /tmp/ccwR4KB7.s page 165 + + + 2020 .LVL213: +2710:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2021 .loc 1 2710 2 is_stmt 1 view .LVU651 +2710:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2022 .loc 1 2710 21 is_stmt 0 view .LVU652 + 2023 002a 6020 movs r0, #96 + 2024 002c FFF7FEFF bl AD9102_ReadReg + 2025 .LVL214: +2711:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2026 .loc 1 2711 2 is_stmt 1 view .LVU653 +2712:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2027 .loc 1 2712 57 is_stmt 0 view .LVU654 + 2028 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2 + 2029 0034 1B01 lsls r3, r3, #4 + 2030 0036 03F0F003 and r3, r3, #240 +2711:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2031 .loc 1 2711 11 view .LVU655 + 2032 003a 40F20116 movw r6, #257 + 2033 003e 1E43 orrs r6, r6, r3 + 2034 .LVL215: +2715:Src/main.c **** { + 2035 .loc 1 2715 2 is_stmt 1 view .LVU656 +2715:Src/main.c **** { + 2036 .loc 1 2715 5 is_stmt 0 view .LVU657 + 2037 0040 1CB1 cbz r4, .L149 +2719:Src/main.c **** { + 2038 .loc 1 2719 2 is_stmt 1 view .LVU658 +2719:Src/main.c **** { + 2039 .loc 1 2719 5 is_stmt 0 view .LVU659 + 2040 0042 3F2C cmp r4, #63 + 2041 0044 02D9 bls .L137 +2721:Src/main.c **** } + 2042 .loc 1 2721 12 view .LVU660 + 2043 0046 3F24 movs r4, #63 + 2044 .LVL216: +2721:Src/main.c **** } + 2045 .loc 1 2721 12 view .LVU661 + 2046 0048 00E0 b .L137 + 2047 .LVL217: + 2048 .L149: +2717:Src/main.c **** } + 2049 .loc 1 2717 12 view .LVU662 + 2050 004a 0124 movs r4, #1 + 2051 .LVL218: + 2052 .L137: +2723:Src/main.c **** { + 2053 .loc 1 2723 2 is_stmt 1 view .LVU663 +2723:Src/main.c **** { + 2054 .loc 1 2723 5 is_stmt 0 view .LVU664 + 2055 004c BBF1000F cmp fp, #0 + 2056 0050 01D1 bne .L138 +2725:Src/main.c **** } + 2057 .loc 1 2725 14 view .LVU665 + 2058 0052 4FF6FF7B movw fp, #65535 + 2059 .L138: + 2060 .LVL219: +2727:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + ARM GAS /tmp/ccwR4KB7.s page 166 + + + 2061 .loc 1 2727 2 is_stmt 1 view .LVU666 +2728:Src/main.c **** + 2062 .loc 1 2728 35 is_stmt 0 view .LVU667 + 2063 0056 05F00305 and r5, r5, #3 + 2064 .LVL220: +2727:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2065 .loc 1 2727 71 view .LVU668 + 2066 005a A400 lsls r4, r4, #2 + 2067 .LVL221: +2727:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2068 .loc 1 2727 71 view .LVU669 + 2069 005c E4B2 uxtb r4, r4 +2727:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2070 .loc 1 2727 11 view .LVU670 + 2071 005e 2543 orrs r5, r5, r4 + 2072 .LVL222: +2730:Src/main.c **** + 2073 .loc 1 2730 2 is_stmt 1 view .LVU671 +2733:Src/main.c **** { + 2074 .loc 1 2733 2 view .LVU672 +2733:Src/main.c **** { + 2075 .loc 1 2733 5 is_stmt 0 view .LVU673 + 2076 0060 BAF1000F cmp r10, #0 + 2077 0064 36D1 bne .L152 +2730:Src/main.c **** + 2078 .loc 1 2730 10 view .LVU674 + 2079 0066 0124 movs r4, #1 + 2080 .L139: + 2081 .LVL223: +2739:Src/main.c **** { + 2082 .loc 1 2739 2 is_stmt 1 view .LVU675 +2739:Src/main.c **** { + 2083 .loc 1 2739 5 is_stmt 0 view .LVU676 + 2084 0068 19F4F47F tst r9, #488 + 2085 006c 00D0 beq .L140 +2741:Src/main.c **** } + 2086 .loc 1 2741 6 view .LVU677 + 2087 006e 0024 movs r4, #0 + 2088 .LVL224: + 2089 .L140: +2745:Src/main.c **** { + 2090 .loc 1 2745 2 is_stmt 1 view .LVU678 +2745:Src/main.c **** { + 2091 .loc 1 2745 5 is_stmt 0 view .LVU679 + 2092 0070 18F40E6F tst r8, #2272 + 2093 0074 00D0 beq .L141 +2747:Src/main.c **** } + 2094 .loc 1 2747 6 view .LVU680 + 2095 0076 0024 movs r4, #0 + 2096 .LVL225: + 2097 .L141: +2751:Src/main.c **** { + 2098 .loc 1 2751 2 is_stmt 1 view .LVU681 +2751:Src/main.c **** { + 2099 .loc 1 2751 5 is_stmt 0 view .LVU682 + 2100 0078 10F03F0F tst r0, #63 + 2101 007c 00D0 beq .L142 + ARM GAS /tmp/ccwR4KB7.s page 167 + + +2753:Src/main.c **** } + 2102 .loc 1 2753 6 view .LVU683 + 2103 007e 0024 movs r4, #0 + 2104 .LVL226: + 2105 .L142: +2756:Src/main.c **** { + 2106 .loc 1 2756 2 is_stmt 1 view .LVU684 +2756:Src/main.c **** { + 2107 .loc 1 2756 5 is_stmt 0 view .LVU685 + 2108 0080 27B1 cbz r7, .L143 +2756:Src/main.c **** { + 2109 .loc 1 2756 17 discriminator 1 view .LVU686 + 2110 0082 019B ldr r3, [sp, #4] + 2111 0084 13F0010F tst r3, #1 + 2112 0088 00D1 bne .L143 +2758:Src/main.c **** } + 2113 .loc 1 2758 6 view .LVU687 + 2114 008a 0024 movs r4, #0 + 2115 .LVL227: + 2116 .L143: +2761:Src/main.c **** { + 2117 .loc 1 2761 2 is_stmt 1 view .LVU688 +2761:Src/main.c **** { + 2118 .loc 1 2761 6 is_stmt 0 view .LVU689 + 2119 008c 2720 movs r0, #39 + 2120 .LVL228: +2761:Src/main.c **** { + 2121 .loc 1 2761 6 view .LVU690 + 2122 008e FFF7FEFF bl AD9102_ReadReg + 2123 .LVL229: +2761:Src/main.c **** { + 2124 .loc 1 2761 5 discriminator 1 view .LVU691 + 2125 0092 43F21223 movw r3, #12818 + 2126 0096 9842 cmp r0, r3 + 2127 0098 00D0 beq .L144 +2763:Src/main.c **** } + 2128 .loc 1 2763 6 view .LVU692 + 2129 009a 0024 movs r4, #0 + 2130 .LVL230: + 2131 .L144: +2765:Src/main.c **** { + 2132 .loc 1 2765 2 is_stmt 1 view .LVU693 +2765:Src/main.c **** { + 2133 .loc 1 2765 6 is_stmt 0 view .LVU694 + 2134 009c 2820 movs r0, #40 + 2135 009e FFF7FEFF bl AD9102_ReadReg + 2136 .LVL231: +2765:Src/main.c **** { + 2137 .loc 1 2765 5 discriminator 1 view .LVU695 + 2138 00a2 B042 cmp r0, r6 + 2139 00a4 00D0 beq .L145 +2767:Src/main.c **** } + 2140 .loc 1 2767 6 view .LVU696 + 2141 00a6 0024 movs r4, #0 + 2142 .LVL232: + 2143 .L145: +2769:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 168 + + + 2144 .loc 1 2769 2 is_stmt 1 view .LVU697 +2769:Src/main.c **** { + 2145 .loc 1 2769 6 is_stmt 0 view .LVU698 + 2146 00a8 2920 movs r0, #41 + 2147 00aa FFF7FEFF bl AD9102_ReadReg + 2148 .LVL233: +2769:Src/main.c **** { + 2149 .loc 1 2769 5 discriminator 1 view .LVU699 + 2150 00ae 5845 cmp r0, fp + 2151 00b0 00D0 beq .L146 +2771:Src/main.c **** } + 2152 .loc 1 2771 6 view .LVU700 + 2153 00b2 0024 movs r4, #0 + 2154 .LVL234: + 2155 .L146: +2773:Src/main.c **** { + 2156 .loc 1 2773 2 is_stmt 1 view .LVU701 +2773:Src/main.c **** { + 2157 .loc 1 2773 6 is_stmt 0 view .LVU702 + 2158 00b4 1F20 movs r0, #31 + 2159 00b6 FFF7FEFF bl AD9102_ReadReg + 2160 .LVL235: +2773:Src/main.c **** { + 2161 .loc 1 2773 5 discriminator 1 view .LVU703 + 2162 00ba 00B1 cbz r0, .L147 +2775:Src/main.c **** } + 2163 .loc 1 2775 6 view .LVU704 + 2164 00bc 0024 movs r4, #0 + 2165 .LVL236: + 2166 .L147: +2777:Src/main.c **** { + 2167 .loc 1 2777 2 is_stmt 1 view .LVU705 +2777:Src/main.c **** { + 2168 .loc 1 2777 6 is_stmt 0 view .LVU706 + 2169 00be 3720 movs r0, #55 + 2170 00c0 FFF7FEFF bl AD9102_ReadReg + 2171 .LVL237: +2777:Src/main.c **** { + 2172 .loc 1 2777 5 discriminator 1 view .LVU707 + 2173 00c4 A842 cmp r0, r5 + 2174 00c6 00D0 beq .L148 +2779:Src/main.c **** } + 2175 .loc 1 2779 6 view .LVU708 + 2176 00c8 0024 movs r4, #0 + 2177 .LVL238: + 2178 .L148: +2782:Src/main.c **** } + 2179 .loc 1 2782 2 is_stmt 1 view .LVU709 +2783:Src/main.c **** + 2180 .loc 1 2783 1 is_stmt 0 view .LVU710 + 2181 00ca 84F00100 eor r0, r4, #1 + 2182 00ce 03B0 add sp, sp, #12 + 2183 .LCFI22: + 2184 .cfi_remember_state + 2185 .cfi_def_cfa_offset 36 + 2186 @ sp needed + 2187 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + ARM GAS /tmp/ccwR4KB7.s page 169 + + + 2188 .LVL239: + 2189 .L152: + 2190 .LCFI23: + 2191 .cfi_restore_state +2735:Src/main.c **** } + 2192 .loc 1 2735 6 view .LVU711 + 2193 00d4 0024 movs r4, #0 + 2194 00d6 C7E7 b .L139 + 2195 .cfi_endproc + 2196 .LFE1218: + 2198 .section .text.AD9102_ApplySram,"ax",%progbits + 2199 .align 1 + 2200 .syntax unified + 2201 .thumb + 2202 .thumb_func + 2204 AD9102_ApplySram: + 2205 .LVL240: + 2206 .LFB1217: +2638:Src/main.c **** if (samples == 0u) + 2207 .loc 1 2638 1 is_stmt 1 view -0 + 2208 .cfi_startproc + 2209 @ args = 0, pretend = 0, frame = 8 + 2210 @ frame_needed = 0, uses_anonymous_args = 0 +2638:Src/main.c **** if (samples == 0u) + 2211 .loc 1 2638 1 is_stmt 0 view .LVU713 + 2212 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 2213 .LCFI24: + 2214 .cfi_def_cfa_offset 24 + 2215 .cfi_offset 4, -24 + 2216 .cfi_offset 5, -20 + 2217 .cfi_offset 6, -16 + 2218 .cfi_offset 7, -12 + 2219 .cfi_offset 8, -8 + 2220 .cfi_offset 14, -4 + 2221 0004 82B0 sub sp, sp, #8 + 2222 .LCFI25: + 2223 .cfi_def_cfa_offset 32 + 2224 0006 0546 mov r5, r0 + 2225 0008 1E46 mov r6, r3 +2639:Src/main.c **** { + 2226 .loc 1 2639 2 is_stmt 1 view .LVU714 +2639:Src/main.c **** { + 2227 .loc 1 2639 5 is_stmt 0 view .LVU715 + 2228 000a 21B1 cbz r1, .L172 + 2229 000c 0C46 mov r4, r1 +2643:Src/main.c **** { + 2230 .loc 1 2643 2 is_stmt 1 view .LVU716 +2643:Src/main.c **** { + 2231 .loc 1 2643 5 is_stmt 0 view .LVU717 + 2232 000e 0129 cmp r1, #1 + 2233 0010 02D8 bhi .L164 +2645:Src/main.c **** } + 2234 .loc 1 2645 11 view .LVU718 + 2235 0012 0224 movs r4, #2 + 2236 0014 03E0 b .L165 + 2237 .L172: +2641:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 170 + + + 2238 .loc 1 2641 11 view .LVU719 + 2239 0016 1024 movs r4, #16 + 2240 .L164: + 2241 .LVL241: +2647:Src/main.c **** { + 2242 .loc 1 2647 2 is_stmt 1 view .LVU720 +2647:Src/main.c **** { + 2243 .loc 1 2647 5 is_stmt 0 view .LVU721 + 2244 0018 B4F5805F cmp r4, #4096 + 2245 001c 04D8 bhi .L174 + 2246 .LVL242: + 2247 .L165: +2651:Src/main.c **** { + 2248 .loc 1 2651 2 is_stmt 1 view .LVU722 +2651:Src/main.c **** { + 2249 .loc 1 2651 5 is_stmt 0 view .LVU723 + 2250 001e 32B1 cbz r2, .L175 +2655:Src/main.c **** { + 2251 .loc 1 2655 2 is_stmt 1 view .LVU724 +2655:Src/main.c **** { + 2252 .loc 1 2655 5 is_stmt 0 view .LVU725 + 2253 0020 0F2A cmp r2, #15 + 2254 0022 05D9 bls .L166 +2657:Src/main.c **** } + 2255 .loc 1 2657 8 view .LVU726 + 2256 0024 0F22 movs r2, #15 + 2257 .LVL243: +2657:Src/main.c **** } + 2258 .loc 1 2657 8 view .LVU727 + 2259 0026 03E0 b .L166 + 2260 .LVL244: + 2261 .L174: +2649:Src/main.c **** } + 2262 .loc 1 2649 11 view .LVU728 + 2263 0028 4FF48054 mov r4, #4096 + 2264 .LVL245: +2649:Src/main.c **** } + 2265 .loc 1 2649 11 view .LVU729 + 2266 002c F7E7 b .L165 + 2267 .LVL246: + 2268 .L175: +2653:Src/main.c **** } + 2269 .loc 1 2653 8 view .LVU730 + 2270 002e 0122 movs r2, #1 + 2271 .LVL247: + 2272 .L166: +2660:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2273 .loc 1 2660 2 is_stmt 1 view .LVU731 +2660:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2274 .loc 1 2660 63 is_stmt 0 view .LVU732 + 2275 0030 1702 lsls r7, r2, #8 + 2276 0032 07F47067 and r7, r7, #3840 +2660:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 2277 .loc 1 2660 11 view .LVU733 + 2278 0036 47F01107 orr r7, r7, #17 + 2279 .LVL248: +2663:Src/main.c **** if (pat_period == 0u) + ARM GAS /tmp/ccwR4KB7.s page 171 + + + 2280 .loc 1 2663 2 is_stmt 1 view .LVU734 +2663:Src/main.c **** if (pat_period == 0u) + 2281 .loc 1 2663 24 is_stmt 0 view .LVU735 + 2282 003a A046 mov r8, r4 +2663:Src/main.c **** if (pat_period == 0u) + 2283 .loc 1 2663 44 view .LVU736 + 2284 003c 02F00F02 and r2, r2, #15 + 2285 .LVL249: +2663:Src/main.c **** if (pat_period == 0u) + 2286 .loc 1 2663 11 view .LVU737 + 2287 0040 04FB02F2 mul r2, r4, r2 + 2288 .LVL250: +2664:Src/main.c **** { + 2289 .loc 1 2664 2 is_stmt 1 view .LVU738 +2664:Src/main.c **** { + 2290 .loc 1 2664 5 is_stmt 0 view .LVU739 + 2291 0044 1AB1 cbz r2, .L167 +2668:Src/main.c **** { + 2292 .loc 1 2668 2 is_stmt 1 view .LVU740 +2668:Src/main.c **** { + 2293 .loc 1 2668 5 is_stmt 0 view .LVU741 + 2294 0046 B2F5803F cmp r2, #65536 + 2295 004a 4DD2 bcs .L177 + 2296 004c 9046 mov r8, r2 + 2297 .L167: + 2298 .LVL251: +2673:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 2299 .loc 1 2673 2 is_stmt 1 view .LVU742 + 2300 004e 4221 movs r1, #66 + 2301 0050 3648 ldr r0, .L179 + 2302 .LVL252: +2673:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 2303 .loc 1 2673 2 is_stmt 0 view .LVU743 + 2304 0052 FFF7FEFF bl AD9102_WriteRegTable 2305 .LVL253: - 2306 .L149: -2702:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2307 .loc 1 2702 20 is_stmt 1 discriminator 2 view .LVU704 -2702:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2308 .loc 1 2702 25 is_stmt 0 discriminator 2 view .LVU705 - 2309 00e6 0133 adds r3, r3, #1 +2674:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); + 2306 .loc 1 2674 2 is_stmt 1 view .LVU744 + 2307 0056 0021 movs r1, #0 + 2308 0058 1E20 movs r0, #30 + 2309 005a FFF7FEFF bl AD9102_WriteReg 2310 .LVL254: - 2311 .L148: -2702:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2312 .loc 1 2702 14 is_stmt 1 discriminator 1 view .LVU706 - 2313 00e8 B3F5FA7F cmp r3, #500 - 2314 00ec FBD3 bcc .L149 -2704:Src/main.c **** tmp32 = 0; - 2315 .loc 1 2704 3 view .LVU707 - 2316 .LVL255: - 2317 .LBB385: - 2318 .LBI385: +2675:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); + 2311 .loc 1 2675 2 view .LVU745 + 2312 005e 43F23001 movw r1, #12336 + 2313 0062 2720 movs r0, #39 + 2314 0064 FFF7FEFF bl AD9102_WriteReg + 2315 .LVL255: +2676:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); + 2316 .loc 1 2676 2 view .LVU746 + 2317 0068 4FF40071 mov r1, #512 + 2318 006c 3720 movs r0, #55 + 2319 006e FFF7FEFF bl AD9102_WriteReg + 2320 .LVL256: +2677:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + 2321 .loc 1 2677 2 view .LVU747 + 2322 0072 40F20111 movw r1, #257 + 2323 0076 2B20 movs r0, #43 + ARM GAS /tmp/ccwR4KB7.s page 172 + + + 2324 0078 FFF7FEFF bl AD9102_WriteReg + 2325 .LVL257: +2678:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); + 2326 .loc 1 2678 2 view .LVU748 + 2327 007c 3946 mov r1, r7 + 2328 007e 2820 movs r0, #40 + 2329 0080 FFF7FEFF bl AD9102_WriteReg + 2330 .LVL258: +2679:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + 2331 .loc 1 2679 2 view .LVU749 + 2332 0084 1FFA88F1 uxth r1, r8 + 2333 0088 2920 movs r0, #41 + 2334 008a FFF7FEFF bl AD9102_WriteReg + 2335 .LVL259: +2680:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); + 2336 .loc 1 2680 2 view .LVU750 + 2337 008e 0021 movs r1, #0 + 2338 0090 1F20 movs r0, #31 + 2339 0092 FFF7FEFF bl AD9102_WriteReg + 2340 .LVL260: +2681:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + 2341 .loc 1 2681 2 view .LVU751 + 2342 0096 0021 movs r1, #0 + 2343 0098 5C20 movs r0, #92 + 2344 009a FFF7FEFF bl AD9102_WriteReg + 2345 .LVL261: +2682:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); + 2346 .loc 1 2682 2 view .LVU752 + 2347 009e 0021 movs r1, #0 + 2348 00a0 5D20 movs r0, #93 + 2349 00a2 FFF7FEFF bl AD9102_WriteReg + 2350 .LVL262: +2683:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2351 .loc 1 2683 2 view .LVU753 +2683:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2352 .loc 1 2683 60 is_stmt 0 view .LVU754 + 2353 00a6 611E subs r1, r4, #1 + 2354 00a8 89B2 uxth r1, r1 +2683:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2355 .loc 1 2683 2 view .LVU755 + 2356 00aa 0901 lsls r1, r1, #4 + 2357 00ac 89B2 uxth r1, r1 + 2358 00ae 5E20 movs r0, #94 + 2359 00b0 FFF7FEFF bl AD9102_WriteReg + 2360 .LVL263: +2684:Src/main.c **** + 2361 .loc 1 2684 2 is_stmt 1 view .LVU756 + 2362 00b4 0121 movs r1, #1 + 2363 00b6 1D20 movs r0, #29 + 2364 00b8 FFF7FEFF bl AD9102_WriteReg + 2365 .LVL264: +2686:Src/main.c **** + 2366 .loc 1 2686 2 view .LVU757 + 2367 00bc 3146 mov r1, r6 + 2368 00be 2046 mov r0, r4 + 2369 00c0 FFF7FEFF bl AD9102_LoadSramRamp + 2370 .LVL265: + ARM GAS /tmp/ccwR4KB7.s page 173 + + +2688:Src/main.c **** { + 2371 .loc 1 2688 2 view .LVU758 +2688:Src/main.c **** { + 2372 .loc 1 2688 5 is_stmt 0 view .LVU759 + 2373 00c4 35B3 cbz r5, .L168 +2690:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + 2374 .loc 1 2690 3 is_stmt 1 view .LVU760 + 2375 00c6 0122 movs r2, #1 + 2376 00c8 4FF40061 mov r1, #2048 + 2377 00cc 1848 ldr r0, .L179+4 + 2378 00ce FFF7FEFF bl HAL_GPIO_WritePin + 2379 .LVL266: +2691:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2380 .loc 1 2691 3 view .LVU761 + 2381 00d2 0121 movs r1, #1 + 2382 00d4 1E20 movs r0, #30 + 2383 00d6 FFF7FEFF bl AD9102_WriteReg + 2384 .LVL267: +2692:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 2385 .loc 1 2692 3 view .LVU762 + 2386 00da 0121 movs r1, #1 + 2387 00dc 1D20 movs r0, #29 + 2388 00de FFF7FEFF bl AD9102_WriteReg + 2389 .LVL268: +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2390 .loc 1 2693 3 view .LVU763 + 2391 .LBB387: +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2392 .loc 1 2693 8 view .LVU764 +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2393 .loc 1 2693 26 is_stmt 0 view .LVU765 + 2394 00e2 0023 movs r3, #0 + 2395 00e4 0193 str r3, [sp, #4] +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2396 .loc 1 2693 3 view .LVU766 + 2397 00e6 05E0 b .L169 + 2398 .LVL269: + 2399 .L177: +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2400 .loc 1 2693 3 view .LVU767 + 2401 .LBE387: +2670:Src/main.c **** } + 2402 .loc 1 2670 14 view .LVU768 + 2403 00e8 4FF6FF78 movw r8, #65535 + 2404 00ec AFE7 b .L167 + 2405 .LVL270: + 2406 .L170: + 2407 .LBB388: +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2408 .loc 1 2693 49 is_stmt 1 discriminator 3 view .LVU769 +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2409 .loc 1 2693 44 discriminator 3 view .LVU770 + 2410 00ee 019B ldr r3, [sp, #4] + 2411 00f0 0133 adds r3, r3, #1 + 2412 00f2 0193 str r3, [sp, #4] + 2413 .L169: +2693:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + ARM GAS /tmp/ccwR4KB7.s page 174 + + + 2414 .loc 1 2693 35 discriminator 1 view .LVU771 + 2415 00f4 019B ldr r3, [sp, #4] + 2416 00f6 B3F57A7F cmp r3, #1000 + 2417 00fa F8D3 bcc .L170 + 2418 .LBE388: +2694:Src/main.c **** } + 2419 .loc 1 2694 3 view .LVU772 + 2420 00fc 0022 movs r2, #0 + 2421 00fe 4FF40061 mov r1, #2048 + 2422 0102 0B48 ldr r0, .L179+4 + 2423 0104 FFF7FEFF bl HAL_GPIO_WritePin + 2424 .LVL271: + 2425 .L171: +2702:Src/main.c **** } + 2426 .loc 1 2702 2 view .LVU773 +2702:Src/main.c **** } + 2427 .loc 1 2702 9 is_stmt 0 view .LVU774 + 2428 0108 1E20 movs r0, #30 + 2429 010a FFF7FEFF bl AD9102_ReadReg + 2430 .LVL272: +2703:Src/main.c **** + 2431 .loc 1 2703 1 view .LVU775 + 2432 010e 02B0 add sp, sp, #8 + 2433 .LCFI26: + 2434 .cfi_remember_state + 2435 .cfi_def_cfa_offset 24 + 2436 @ sp needed + 2437 0110 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 2438 .LVL273: + 2439 .L168: + 2440 .LCFI27: + 2441 .cfi_restore_state +2698:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2442 .loc 1 2698 3 is_stmt 1 view .LVU776 + 2443 0114 0021 movs r1, #0 + 2444 0116 1E20 movs r0, #30 + 2445 0118 FFF7FEFF bl AD9102_WriteReg + 2446 .LVL274: +2699:Src/main.c **** } + 2447 .loc 1 2699 3 view .LVU777 + 2448 011c 0122 movs r2, #1 + 2449 011e 4FF40061 mov r1, #2048 + 2450 0122 0348 ldr r0, .L179+4 + 2451 0124 FFF7FEFF bl HAL_GPIO_WritePin + 2452 .LVL275: + 2453 0128 EEE7 b .L171 + 2454 .L180: + 2455 012a 00BF .align 2 + 2456 .L179: + 2457 012c 00000000 .word ad9102_example2_regval + 2458 0130 000C0240 .word 1073875968 + 2459 .cfi_endproc + 2460 .LFE1217: + 2462 .section .text.AD9102_Apply,"ax",%progbits + 2463 .align 1 + 2464 .syntax unified + 2465 .thumb + ARM GAS /tmp/ccwR4KB7.s page 175 + + + 2466 .thumb_func + 2468 AD9102_Apply: + 2469 .LVL276: + 2470 .LFB1215: +2531:Src/main.c **** if (enable) + 2471 .loc 1 2531 1 view -0 + 2472 .cfi_startproc + 2473 @ args = 4, pretend = 0, frame = 8 + 2474 @ frame_needed = 0, uses_anonymous_args = 0 +2531:Src/main.c **** if (enable) + 2475 .loc 1 2531 1 is_stmt 0 view .LVU779 + 2476 0000 30B5 push {r4, r5, lr} + 2477 .LCFI28: + 2478 .cfi_def_cfa_offset 12 + 2479 .cfi_offset 4, -12 + 2480 .cfi_offset 5, -8 + 2481 .cfi_offset 14, -4 + 2482 0002 83B0 sub sp, sp, #12 + 2483 .LCFI29: + 2484 .cfi_def_cfa_offset 24 +2532:Src/main.c **** { + 2485 .loc 1 2532 2 is_stmt 1 view .LVU780 +2532:Src/main.c **** { + 2486 .loc 1 2532 5 is_stmt 0 view .LVU781 + 2487 0004 0029 cmp r1, #0 + 2488 0006 4AD0 beq .L182 + 2489 .LBB389: +2534:Src/main.c **** uint16_t pat_timebase; + 2490 .loc 1 2534 3 is_stmt 1 view .LVU782 +2535:Src/main.c **** + 2491 .loc 1 2535 3 view .LVU783 +2537:Src/main.c **** { + 2492 .loc 1 2537 3 view .LVU784 +2537:Src/main.c **** { + 2493 .loc 1 2537 6 is_stmt 0 view .LVU785 + 2494 0008 1AB1 cbz r2, .L187 +2541:Src/main.c **** { + 2495 .loc 1 2541 3 is_stmt 1 view .LVU786 +2541:Src/main.c **** { + 2496 .loc 1 2541 6 is_stmt 0 view .LVU787 + 2497 000a 3F2A cmp r2, #63 + 2498 000c 02D9 bls .L183 +2543:Src/main.c **** } + 2499 .loc 1 2543 13 view .LVU788 + 2500 000e 3F22 movs r2, #63 + 2501 .LVL277: +2543:Src/main.c **** } + 2502 .loc 1 2543 13 view .LVU789 + 2503 0010 00E0 b .L183 + 2504 .LVL278: + 2505 .L187: +2539:Src/main.c **** } + 2506 .loc 1 2539 13 view .LVU790 + 2507 0012 0122 movs r2, #1 + 2508 .LVL279: + 2509 .L183: +2545:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + ARM GAS /tmp/ccwR4KB7.s page 176 + + + 2510 .loc 1 2545 3 is_stmt 1 view .LVU791 +2546:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2511 .loc 1 2546 25 is_stmt 0 view .LVU792 + 2512 0014 00F00300 and r0, r0, #3 + 2513 .LVL280: +2545:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2514 .loc 1 2545 60 view .LVU793 + 2515 0018 9200 lsls r2, r2, #2 + 2516 .LVL281: +2545:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2517 .loc 1 2545 60 view .LVU794 + 2518 001a D2B2 uxtb r2, r2 +2545:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2519 .loc 1 2545 11 view .LVU795 + 2520 001c 40EA0204 orr r4, r0, r2 + 2521 .LVL282: +2547:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2522 .loc 1 2547 3 is_stmt 1 view .LVU796 +2548:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2523 .loc 1 2548 49 is_stmt 0 view .LVU797 + 2524 0020 1B01 lsls r3, r3, #4 + 2525 .LVL283: +2548:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2526 .loc 1 2548 49 view .LVU798 + 2527 0022 03F0F003 and r3, r3, #240 +2547:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2528 .loc 1 2547 16 view .LVU799 + 2529 0026 40F20115 movw r5, #257 + 2530 002a 1D43 orrs r5, r5, r3 + 2531 .LVL284: +2551:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + 2532 .loc 1 2551 3 is_stmt 1 view .LVU800 + 2533 002c 43F21221 movw r1, #12818 + 2534 .LVL285: +2551:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + 2535 .loc 1 2551 3 is_stmt 0 view .LVU801 + 2536 0030 2720 movs r0, #39 + 2537 0032 FFF7FEFF bl AD9102_WriteReg + 2538 .LVL286: +2552:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + 2539 .loc 1 2552 3 is_stmt 1 view .LVU802 + 2540 0036 2146 mov r1, r4 + 2541 0038 3720 movs r0, #55 + 2542 003a FFF7FEFF bl AD9102_WriteReg + 2543 .LVL287: +2553:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); + 2544 .loc 1 2553 3 view .LVU803 + 2545 003e 2946 mov r1, r5 + 2546 0040 2820 movs r0, #40 + 2547 0042 FFF7FEFF bl AD9102_WriteReg + 2548 .LVL288: +2554:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + 2549 .loc 1 2554 3 view .LVU804 + 2550 0046 BDF81810 ldrh r1, [sp, #24] + 2551 004a 2920 movs r0, #41 + 2552 004c FFF7FEFF bl AD9102_WriteReg + 2553 .LVL289: + ARM GAS /tmp/ccwR4KB7.s page 177 + + +2555:Src/main.c **** + 2554 .loc 1 2555 3 view .LVU805 + 2555 0050 0021 movs r1, #0 + 2556 0052 1F20 movs r0, #31 + 2557 0054 FFF7FEFF bl AD9102_WriteReg + 2558 .LVL290: +2559:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + 2559 .loc 1 2559 3 view .LVU806 + 2560 0058 0122 movs r2, #1 + 2561 005a 4FF40061 mov r1, #2048 + 2562 005e 1548 ldr r0, .L190 + 2563 0060 FFF7FEFF bl HAL_GPIO_WritePin + 2564 .LVL291: +2560:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2565 .loc 1 2560 3 view .LVU807 + 2566 0064 0121 movs r1, #1 + 2567 0066 1E20 movs r0, #30 + 2568 0068 FFF7FEFF bl AD9102_WriteReg + 2569 .LVL292: +2561:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 2570 .loc 1 2561 3 view .LVU808 + 2571 006c 0121 movs r1, #1 + 2572 006e 1D20 movs r0, #29 + 2573 0070 FFF7FEFF bl AD9102_WriteReg + 2574 .LVL293: +2562:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2575 .loc 1 2562 3 view .LVU809 + 2576 .LBB390: +2562:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2577 .loc 1 2562 8 view .LVU810 +2562:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2578 .loc 1 2562 26 is_stmt 0 view .LVU811 + 2579 0074 0023 movs r3, #0 + 2580 0076 0193 str r3, [sp, #4] +2562:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2581 .loc 1 2562 3 view .LVU812 + 2582 0078 02E0 b .L184 + 2583 .L185: +2562:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2584 .loc 1 2562 49 is_stmt 1 discriminator 3 view .LVU813 +2562:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2585 .loc 1 2562 44 discriminator 3 view .LVU814 + 2586 007a 019B ldr r3, [sp, #4] + 2587 007c 0133 adds r3, r3, #1 + 2588 007e 0193 str r3, [sp, #4] + 2589 .L184: +2562:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 2590 .loc 1 2562 35 discriminator 1 view .LVU815 + 2591 0080 019B ldr r3, [sp, #4] + 2592 0082 B3F57A7F cmp r3, #1000 + 2593 0086 F8D3 bcc .L185 + 2594 .LBE390: +2563:Src/main.c **** } + 2595 .loc 1 2563 3 view .LVU816 + 2596 0088 0022 movs r2, #0 + 2597 008a 4FF40061 mov r1, #2048 + 2598 008e 0948 ldr r0, .L190 + ARM GAS /tmp/ccwR4KB7.s page 178 + + + 2599 0090 FFF7FEFF bl HAL_GPIO_WritePin + 2600 .LVL294: + 2601 .L186: +2563:Src/main.c **** } + 2602 .loc 1 2563 3 is_stmt 0 view .LVU817 + 2603 .LBE389: +2571:Src/main.c **** } + 2604 .loc 1 2571 2 is_stmt 1 view .LVU818 +2571:Src/main.c **** } + 2605 .loc 1 2571 9 is_stmt 0 view .LVU819 + 2606 0094 1E20 movs r0, #30 + 2607 0096 FFF7FEFF bl AD9102_ReadReg + 2608 .LVL295: +2572:Src/main.c **** + 2609 .loc 1 2572 1 view .LVU820 + 2610 009a 03B0 add sp, sp, #12 + 2611 .LCFI30: + 2612 .cfi_remember_state + 2613 .cfi_def_cfa_offset 12 + 2614 @ sp needed + 2615 009c 30BD pop {r4, r5, pc} + 2616 .LVL296: + 2617 .L182: + 2618 .LCFI31: + 2619 .cfi_restore_state +2567:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2620 .loc 1 2567 3 is_stmt 1 view .LVU821 + 2621 009e 0021 movs r1, #0 + 2622 .LVL297: +2567:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2623 .loc 1 2567 3 is_stmt 0 view .LVU822 + 2624 00a0 1E20 movs r0, #30 + 2625 .LVL298: +2567:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 2626 .loc 1 2567 3 view .LVU823 + 2627 00a2 FFF7FEFF bl AD9102_WriteReg + 2628 .LVL299: +2568:Src/main.c **** } + 2629 .loc 1 2568 3 is_stmt 1 view .LVU824 + 2630 00a6 0122 movs r2, #1 + 2631 00a8 4FF40061 mov r1, #2048 + 2632 00ac 0148 ldr r0, .L190 + 2633 00ae FFF7FEFF bl HAL_GPIO_WritePin + 2634 .LVL300: + 2635 00b2 EFE7 b .L186 + 2636 .L191: + 2637 .align 2 + 2638 .L190: + 2639 00b4 000C0240 .word 1073875968 + 2640 .cfi_endproc + 2641 .LFE1215: + 2643 .section .text.OUT_trigger,"ax",%progbits + 2644 .align 1 + 2645 .syntax unified + 2646 .thumb + 2647 .thumb_func + 2649 OUT_trigger: + ARM GAS /tmp/ccwR4KB7.s page 179 + + + 2650 .LVL301: + 2651 .LFB1210: +2396:Src/main.c **** switch (out_n) + 2652 .loc 1 2396 1 view -0 + 2653 .cfi_startproc + 2654 @ args = 0, pretend = 0, frame = 0 + 2655 @ frame_needed = 0, uses_anonymous_args = 0 +2396:Src/main.c **** switch (out_n) + 2656 .loc 1 2396 1 is_stmt 0 view .LVU826 + 2657 0000 10B5 push {r4, lr} + 2658 .LCFI32: + 2659 .cfi_def_cfa_offset 8 + 2660 .cfi_offset 4, -8 + 2661 .cfi_offset 14, -4 +2397:Src/main.c **** { + 2662 .loc 1 2397 2 is_stmt 1 view .LVU827 + 2663 0002 0928 cmp r0, #9 + 2664 0004 13D8 bhi .L192 + 2665 0006 DFE800F0 tbb [pc, r0] + 2666 .L195: + 2667 000a 05 .byte (.L204-.L195)/2 + 2668 000b 13 .byte (.L203-.L195)/2 + 2669 000c 21 .byte (.L202-.L195)/2 + 2670 000d 2F .byte (.L201-.L195)/2 + 2671 000e 3D .byte (.L200-.L195)/2 + 2672 000f 4B .byte (.L199-.L195)/2 + 2673 0010 59 .byte (.L198-.L195)/2 + 2674 0011 65 .byte (.L197-.L195)/2 + 2675 0012 71 .byte (.L196-.L195)/2 + 2676 0013 7D .byte (.L194-.L195)/2 + 2677 .p2align 1 + 2678 .L204: +2400:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 2679 .loc 1 2400 3 view .LVU828 + 2680 0014 414C ldr r4, .L207 + 2681 0016 0122 movs r2, #1 + 2682 0018 4FF48061 mov r1, #1024 + 2683 001c 2046 mov r0, r4 + 2684 .LVL302: +2400:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 2685 .loc 1 2400 3 is_stmt 0 view .LVU829 + 2686 001e FFF7FEFF bl HAL_GPIO_WritePin + 2687 .LVL303: +2401:Src/main.c **** break; + 2688 .loc 1 2401 3 is_stmt 1 view .LVU830 + 2689 0022 0022 movs r2, #0 + 2690 0024 4FF48061 mov r1, #1024 + 2691 0028 2046 mov r0, r4 + 2692 002a FFF7FEFF bl HAL_GPIO_WritePin + 2693 .LVL304: +2402:Src/main.c **** + 2694 .loc 1 2402 2 view .LVU831 + 2695 .L192: +2449:Src/main.c **** + 2696 .loc 1 2449 1 is_stmt 0 view .LVU832 + 2697 002e 10BD pop {r4, pc} + 2698 .LVL305: + ARM GAS /tmp/ccwR4KB7.s page 180 + + + 2699 .L203: +2405:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 2700 .loc 1 2405 3 is_stmt 1 view .LVU833 + 2701 0030 3A4C ldr r4, .L207 + 2702 0032 0122 movs r2, #1 + 2703 0034 4FF40061 mov r1, #2048 + 2704 0038 2046 mov r0, r4 + 2705 .LVL306: +2405:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 2706 .loc 1 2405 3 is_stmt 0 view .LVU834 + 2707 003a FFF7FEFF bl HAL_GPIO_WritePin + 2708 .LVL307: +2406:Src/main.c **** break; + 2709 .loc 1 2406 3 is_stmt 1 view .LVU835 + 2710 003e 0022 movs r2, #0 + 2711 0040 4FF40061 mov r1, #2048 + 2712 0044 2046 mov r0, r4 + 2713 0046 FFF7FEFF bl HAL_GPIO_WritePin + 2714 .LVL308: +2407:Src/main.c **** + 2715 .loc 1 2407 2 view .LVU836 + 2716 004a F0E7 b .L192 + 2717 .LVL309: + 2718 .L202: +2410:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 2719 .loc 1 2410 3 view .LVU837 + 2720 004c 334C ldr r4, .L207 + 2721 004e 0122 movs r2, #1 + 2722 0050 4FF48051 mov r1, #4096 + 2723 0054 2046 mov r0, r4 + 2724 .LVL310: +2410:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 2725 .loc 1 2410 3 is_stmt 0 view .LVU838 + 2726 0056 FFF7FEFF bl HAL_GPIO_WritePin + 2727 .LVL311: +2411:Src/main.c **** break; + 2728 .loc 1 2411 3 is_stmt 1 view .LVU839 + 2729 005a 0022 movs r2, #0 + 2730 005c 4FF48051 mov r1, #4096 + 2731 0060 2046 mov r0, r4 + 2732 0062 FFF7FEFF bl HAL_GPIO_WritePin + 2733 .LVL312: +2412:Src/main.c **** + 2734 .loc 1 2412 2 view .LVU840 + 2735 0066 E2E7 b .L192 + 2736 .LVL313: + 2737 .L201: +2415:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 2738 .loc 1 2415 3 view .LVU841 + 2739 0068 2C4C ldr r4, .L207 + 2740 006a 0122 movs r2, #1 + 2741 006c 4FF40051 mov r1, #8192 + 2742 0070 2046 mov r0, r4 + 2743 .LVL314: +2415:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 2744 .loc 1 2415 3 is_stmt 0 view .LVU842 + 2745 0072 FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccwR4KB7.s page 181 + + + 2746 .LVL315: +2416:Src/main.c **** break; + 2747 .loc 1 2416 3 is_stmt 1 view .LVU843 + 2748 0076 0022 movs r2, #0 + 2749 0078 4FF40051 mov r1, #8192 + 2750 007c 2046 mov r0, r4 + 2751 007e FFF7FEFF bl HAL_GPIO_WritePin + 2752 .LVL316: +2417:Src/main.c **** + 2753 .loc 1 2417 2 view .LVU844 + 2754 0082 D4E7 b .L192 + 2755 .LVL317: + 2756 .L200: +2420:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 2757 .loc 1 2420 3 view .LVU845 + 2758 0084 254C ldr r4, .L207 + 2759 0086 0122 movs r2, #1 + 2760 0088 4FF48041 mov r1, #16384 + 2761 008c 2046 mov r0, r4 + 2762 .LVL318: +2420:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 2763 .loc 1 2420 3 is_stmt 0 view .LVU846 + 2764 008e FFF7FEFF bl HAL_GPIO_WritePin + 2765 .LVL319: +2421:Src/main.c **** break; + 2766 .loc 1 2421 3 is_stmt 1 view .LVU847 + 2767 0092 0022 movs r2, #0 + 2768 0094 4FF48041 mov r1, #16384 + 2769 0098 2046 mov r0, r4 + 2770 009a FFF7FEFF bl HAL_GPIO_WritePin + 2771 .LVL320: +2422:Src/main.c **** + 2772 .loc 1 2422 2 view .LVU848 + 2773 009e C6E7 b .L192 + 2774 .LVL321: + 2775 .L199: +2425:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 2776 .loc 1 2425 3 view .LVU849 + 2777 00a0 1E4C ldr r4, .L207 + 2778 00a2 0122 movs r2, #1 + 2779 00a4 4FF40041 mov r1, #32768 + 2780 00a8 2046 mov r0, r4 + 2781 .LVL322: +2425:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 2782 .loc 1 2425 3 is_stmt 0 view .LVU850 + 2783 00aa FFF7FEFF bl HAL_GPIO_WritePin + 2784 .LVL323: +2426:Src/main.c **** break; + 2785 .loc 1 2426 3 is_stmt 1 view .LVU851 + 2786 00ae 0022 movs r2, #0 + 2787 00b0 4FF40041 mov r1, #32768 + 2788 00b4 2046 mov r0, r4 + 2789 00b6 FFF7FEFF bl HAL_GPIO_WritePin + 2790 .LVL324: +2427:Src/main.c **** + 2791 .loc 1 2427 2 view .LVU852 + 2792 00ba B8E7 b .L192 + ARM GAS /tmp/ccwR4KB7.s page 182 + + + 2793 .LVL325: + 2794 .L198: +2430:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 2795 .loc 1 2430 3 view .LVU853 + 2796 00bc 184C ldr r4, .L207+4 + 2797 00be 0122 movs r2, #1 + 2798 00c0 1021 movs r1, #16 + 2799 00c2 2046 mov r0, r4 + 2800 .LVL326: +2430:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 2801 .loc 1 2430 3 is_stmt 0 view .LVU854 + 2802 00c4 FFF7FEFF bl HAL_GPIO_WritePin + 2803 .LVL327: +2431:Src/main.c **** break; + 2804 .loc 1 2431 3 is_stmt 1 view .LVU855 + 2805 00c8 0022 movs r2, #0 + 2806 00ca 1021 movs r1, #16 + 2807 00cc 2046 mov r0, r4 + 2808 00ce FFF7FEFF bl HAL_GPIO_WritePin + 2809 .LVL328: +2432:Src/main.c **** + 2810 .loc 1 2432 2 view .LVU856 + 2811 00d2 ACE7 b .L192 + 2812 .LVL329: + 2813 .L197: +2435:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 2814 .loc 1 2435 3 view .LVU857 + 2815 00d4 124C ldr r4, .L207+4 + 2816 00d6 0122 movs r2, #1 + 2817 00d8 2021 movs r1, #32 + 2818 00da 2046 mov r0, r4 + 2819 .LVL330: +2435:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 2820 .loc 1 2435 3 is_stmt 0 view .LVU858 + 2821 00dc FFF7FEFF bl HAL_GPIO_WritePin + 2822 .LVL331: +2436:Src/main.c **** break; + 2823 .loc 1 2436 3 is_stmt 1 view .LVU859 + 2824 00e0 0022 movs r2, #0 + 2825 00e2 2021 movs r1, #32 + 2826 00e4 2046 mov r0, r4 + 2827 00e6 FFF7FEFF bl HAL_GPIO_WritePin + 2828 .LVL332: +2437:Src/main.c **** + 2829 .loc 1 2437 2 view .LVU860 + 2830 00ea A0E7 b .L192 + 2831 .LVL333: + 2832 .L196: +2440:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 2833 .loc 1 2440 3 view .LVU861 + 2834 00ec 0C4C ldr r4, .L207+4 + 2835 00ee 0122 movs r2, #1 + 2836 00f0 4021 movs r1, #64 + 2837 00f2 2046 mov r0, r4 + 2838 .LVL334: +2440:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 2839 .loc 1 2440 3 is_stmt 0 view .LVU862 + ARM GAS /tmp/ccwR4KB7.s page 183 + + + 2840 00f4 FFF7FEFF bl HAL_GPIO_WritePin + 2841 .LVL335: +2441:Src/main.c **** break; + 2842 .loc 1 2441 3 is_stmt 1 view .LVU863 + 2843 00f8 0022 movs r2, #0 + 2844 00fa 4021 movs r1, #64 + 2845 00fc 2046 mov r0, r4 + 2846 00fe FFF7FEFF bl HAL_GPIO_WritePin + 2847 .LVL336: +2442:Src/main.c **** + 2848 .loc 1 2442 2 view .LVU864 + 2849 0102 94E7 b .L192 + 2850 .LVL337: + 2851 .L194: +2445:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 2852 .loc 1 2445 3 view .LVU865 + 2853 0104 064C ldr r4, .L207+4 + 2854 0106 0122 movs r2, #1 + 2855 0108 8021 movs r1, #128 + 2856 010a 2046 mov r0, r4 + 2857 .LVL338: +2445:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 2858 .loc 1 2445 3 is_stmt 0 view .LVU866 + 2859 010c FFF7FEFF bl HAL_GPIO_WritePin + 2860 .LVL339: +2446:Src/main.c **** break; + 2861 .loc 1 2446 3 is_stmt 1 view .LVU867 + 2862 0110 0022 movs r2, #0 + 2863 0112 8021 movs r1, #128 + 2864 0114 2046 mov r0, r4 + 2865 0116 FFF7FEFF bl HAL_GPIO_WritePin + 2866 .LVL340: +2447:Src/main.c **** } + 2867 .loc 1 2447 2 view .LVU868 +2449:Src/main.c **** + 2868 .loc 1 2449 1 is_stmt 0 view .LVU869 + 2869 011a 88E7 b .L192 + 2870 .L208: + 2871 .align 2 + 2872 .L207: + 2873 011c 00180240 .word 1073879040 + 2874 0120 00040240 .word 1073873920 + 2875 .cfi_endproc + 2876 .LFE1210: + 2878 .section .text.MPhD_T,"ax",%progbits + 2879 .align 1 + 2880 .syntax unified + 2881 .thumb + 2882 .thumb_func + 2884 MPhD_T: + 2885 .LVL341: + 2886 .LFB1221: +2949:Src/main.c **** uint16_t P; + 2887 .loc 1 2949 1 is_stmt 1 view -0 + 2888 .cfi_startproc + 2889 @ args = 0, pretend = 0, frame = 0 + 2890 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccwR4KB7.s page 184 + + +2949:Src/main.c **** uint16_t P; + 2891 .loc 1 2949 1 is_stmt 0 view .LVU871 + 2892 0000 38B5 push {r3, r4, r5, lr} + 2893 .LCFI33: + 2894 .cfi_def_cfa_offset 16 + 2895 .cfi_offset 3, -16 + 2896 .cfi_offset 4, -12 + 2897 .cfi_offset 5, -8 + 2898 .cfi_offset 14, -4 + 2899 0002 0446 mov r4, r0 +2950:Src/main.c **** uint32_t tmp32; + 2900 .loc 1 2950 2 is_stmt 1 view .LVU872 +2951:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 2901 .loc 1 2951 2 view .LVU873 +2952:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 2902 .loc 1 2952 2 view .LVU874 + 2903 0004 0022 movs r2, #0 + 2904 0006 4FF48041 mov r1, #16384 + 2905 000a 8148 ldr r0, .L250 + 2906 .LVL342: +2952:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 2907 .loc 1 2952 2 is_stmt 0 view .LVU875 + 2908 000c FFF7FEFF bl HAL_GPIO_WritePin + 2909 .LVL343: +2953:Src/main.c **** tmp32=0; + 2910 .loc 1 2953 2 is_stmt 1 view .LVU876 + 2911 0010 0022 movs r2, #0 + 2912 0012 4FF40071 mov r1, #512 + 2913 0016 7F48 ldr r0, .L250+4 + 2914 0018 FFF7FEFF bl HAL_GPIO_WritePin + 2915 .LVL344: +2954:Src/main.c **** while(tmp32<500){tmp32++;} + 2916 .loc 1 2954 2 view .LVU877 +2955:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2917 .loc 1 2955 2 view .LVU878 +2954:Src/main.c **** while(tmp32<500){tmp32++;} + 2918 .loc 1 2954 7 is_stmt 0 view .LVU879 + 2919 001c 0023 movs r3, #0 +2955:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2920 .loc 1 2955 7 view .LVU880 + 2921 001e 00E0 b .L210 + 2922 .LVL345: + 2923 .L211: +2955:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2924 .loc 1 2955 19 is_stmt 1 discriminator 2 view .LVU881 +2955:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2925 .loc 1 2955 24 is_stmt 0 discriminator 2 view .LVU882 + 2926 0020 0133 adds r3, r3, #1 + 2927 .LVL346: + 2928 .L210: +2955:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2929 .loc 1 2955 13 is_stmt 1 discriminator 1 view .LVU883 + 2930 0022 B3F5FA7F cmp r3, #500 + 2931 0026 FBD3 bcc .L211 +2956:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2932 .loc 1 2956 2 view .LVU884 + 2933 0028 0122 movs r2, #1 + ARM GAS /tmp/ccwR4KB7.s page 185 + + + 2934 002a 4FF48041 mov r1, #16384 + 2935 002e 7848 ldr r0, .L250 + 2936 0030 FFF7FEFF bl HAL_GPIO_WritePin + 2937 .LVL347: +2957:Src/main.c **** tmp32=0; + 2938 .loc 1 2957 2 view .LVU885 + 2939 0034 0122 movs r2, #1 + 2940 0036 4FF40071 mov r1, #512 + 2941 003a 7648 ldr r0, .L250+4 + 2942 003c FFF7FEFF bl HAL_GPIO_WritePin + 2943 .LVL348: +2958:Src/main.c **** while(tmp32<500){tmp32++;} + 2944 .loc 1 2958 2 view .LVU886 +2959:Src/main.c **** if (num==1)//MPD1 + 2945 .loc 1 2959 2 view .LVU887 +2958:Src/main.c **** while(tmp32<500){tmp32++;} + 2946 .loc 1 2958 7 is_stmt 0 view .LVU888 + 2947 0040 0023 movs r3, #0 +2959:Src/main.c **** if (num==1)//MPD1 + 2948 .loc 1 2959 7 view .LVU889 + 2949 0042 00E0 b .L212 + 2950 .LVL349: + 2951 .L213: +2959:Src/main.c **** if (num==1)//MPD1 + 2952 .loc 1 2959 19 is_stmt 1 discriminator 2 view .LVU890 +2959:Src/main.c **** if (num==1)//MPD1 + 2953 .loc 1 2959 24 is_stmt 0 discriminator 2 view .LVU891 + 2954 0044 0133 adds r3, r3, #1 + 2955 .LVL350: + 2956 .L212: +2959:Src/main.c **** if (num==1)//MPD1 + 2957 .loc 1 2959 13 is_stmt 1 discriminator 1 view .LVU892 + 2958 0046 B3F5FA7F cmp r3, #500 + 2959 004a FBD3 bcc .L213 +2960:Src/main.c **** { + 2960 .loc 1 2960 2 view .LVU893 + 2961 004c 631E subs r3, r4, #1 + 2962 .LVL351: +2960:Src/main.c **** { + 2963 .loc 1 2960 2 is_stmt 0 view .LVU894 + 2964 004e 032B cmp r3, #3 + 2965 0050 39D8 bhi .L214 + 2966 0052 DFE803F0 tbb [pc, r3] + 2967 .L216: + 2968 0056 02 .byte (.L219-.L216)/2 + 2969 0057 3A .byte (.L218-.L216)/2 + 2970 0058 6F .byte (.L217-.L216)/2 + 2971 0059 A6 .byte (.L215-.L216)/2 + 2972 .p2align 1 + 2973 .L219: +2962:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 2974 .loc 1 2962 3 is_stmt 1 view .LVU895 + 2975 005a 6D4C ldr r4, .L250 + 2976 .LVL352: +2962:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 2977 .loc 1 2962 3 is_stmt 0 view .LVU896 + 2978 005c 0122 movs r2, #1 + ARM GAS /tmp/ccwR4KB7.s page 186 + + + 2979 005e 4FF40061 mov r1, #2048 + 2980 0062 2046 mov r0, r4 + 2981 0064 FFF7FEFF bl HAL_GPIO_WritePin + 2982 .LVL353: +2963:Src/main.c **** tmp32=0; + 2983 .loc 1 2963 3 is_stmt 1 view .LVU897 + 2984 0068 0022 movs r2, #0 + 2985 006a 4FF48061 mov r1, #1024 + 2986 006e 2046 mov r0, r4 + 2987 0070 FFF7FEFF bl HAL_GPIO_WritePin + 2988 .LVL354: +2964:Src/main.c **** while(tmp32<500){tmp32++;} + 2989 .loc 1 2964 3 view .LVU898 +2965:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 2990 .loc 1 2965 3 view .LVU899 +2964:Src/main.c **** while(tmp32<500){tmp32++;} + 2991 .loc 1 2964 8 is_stmt 0 view .LVU900 + 2992 0074 0023 movs r3, #0 +2965:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 2993 .loc 1 2965 8 view .LVU901 + 2994 0076 00E0 b .L220 + 2995 .LVL355: + 2996 .L221: +2965:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 2997 .loc 1 2965 20 is_stmt 1 discriminator 2 view .LVU902 +2965:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 2998 .loc 1 2965 25 is_stmt 0 discriminator 2 view .LVU903 + 2999 0078 0133 adds r3, r3, #1 + 3000 .LVL356: + 3001 .L220: +2965:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3002 .loc 1 2965 14 is_stmt 1 discriminator 1 view .LVU904 + 3003 007a B3F5FA7F cmp r3, #500 + 3004 007e FBD3 bcc .L221 +2967:Src/main.c **** tmp32 = 0; + 3005 .loc 1 2967 3 view .LVU905 + 3006 .LVL357: + 3007 .LBB391: + 3008 .LBI391: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2319 .loc 4 358 22 view .LVU708 - 2320 .LBB386: + 3009 .loc 4 358 22 view .LVU906 + 3010 .LBB392: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2321 .loc 4 360 3 view .LVU709 - 2322 00ee 4B4A ldr r2, .L171+12 - 2323 00f0 1368 ldr r3, [r2] - 2324 .LVL256: + 3011 .loc 4 360 3 view .LVU907 + 3012 0080 654A ldr r2, .L250+8 + 3013 0082 1368 ldr r3, [r2] + 3014 .LVL358: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2325 .loc 4 360 3 is_stmt 0 view .LVU710 - 2326 00f2 43F04003 orr r3, r3, #64 - 2327 00f6 1360 str r3, [r2] - 2328 .LVL257: + 3015 .loc 4 360 3 is_stmt 0 view .LVU908 + 3016 0084 43F04003 orr r3, r3, #64 + 3017 0088 1360 str r3, [r2] + 3018 .LVL359: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2329 .loc 4 360 3 view .LVU711 - 2330 .LBE386: - 2331 .LBE385: -2705:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2332 .loc 1 2705 3 is_stmt 1 view .LVU712 -2706:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 2333 .loc 1 2706 3 view .LVU713 -2705:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2334 .loc 1 2705 9 is_stmt 0 view .LVU714 - 2335 00f8 0023 movs r3, #0 - 2336 .LVL258: - 2337 .L150: -2706:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 2338 .loc 1 2706 43 is_stmt 1 discriminator 1 view .LVU715 - 2339 .LBB387: - 2340 .LBI387: + 3019 .loc 4 360 3 view .LVU909 + 3020 .LBE392: + 3021 .LBE391: +2968:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + ARM GAS /tmp/ccwR4KB7.s page 187 + + + 3022 .loc 1 2968 3 is_stmt 1 view .LVU910 +2969:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3023 .loc 1 2969 3 view .LVU911 +2968:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3024 .loc 1 2968 9 is_stmt 0 view .LVU912 + 3025 008a 0023 movs r3, #0 + 3026 .LVL360: + 3027 .L222: +2969:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3028 .loc 1 2969 43 is_stmt 1 discriminator 1 view .LVU913 + 3029 .LBB393: + 3030 .LBI393: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2341 .loc 4 905 26 view .LVU716 - 2342 .LBB388: + 3031 .loc 4 905 26 view .LVU914 + 3032 .LBB394: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2343 .loc 4 907 3 view .LVU717 + 3033 .loc 4 907 3 view .LVU915 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2344 .loc 4 907 12 is_stmt 0 view .LVU718 - 2345 00fa 484A ldr r2, .L171+12 - 2346 00fc 9268 ldr r2, [r2, #8] - ARM GAS /tmp/ccYgfTud.s page 167 - - + 3034 .loc 4 907 12 is_stmt 0 view .LVU916 + 3035 008c 624A ldr r2, .L250+8 + 3036 008e 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2347 .loc 4 907 68 view .LVU719 - 2348 00fe 12F0010F tst r2, #1 - 2349 0102 04D1 bne .L151 - 2350 .LVL259: + 3037 .loc 4 907 68 view .LVU917 + 3038 0090 12F0010F tst r2, #1 + 3039 0094 04D1 bne .L223 + 3040 .LVL361: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2351 .loc 4 907 68 view .LVU720 - 2352 .LBE388: - 2353 .LBE387: -2706:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 2354 .loc 1 2706 43 discriminator 2 view .LVU721 - 2355 0104 B3F57A7F cmp r3, #1000 - 2356 0108 01D8 bhi .L151 -2706:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 2357 .loc 1 2706 62 is_stmt 1 discriminator 3 view .LVU722 -2706:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 2358 .loc 1 2706 67 is_stmt 0 discriminator 3 view .LVU723 - 2359 010a 0133 adds r3, r3, #1 - 2360 .LVL260: -2706:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 2361 .loc 1 2706 67 discriminator 3 view .LVU724 - 2362 010c F5E7 b .L150 - 2363 .L151: -2707:Src/main.c **** while(tmp32<500){tmp32++;} - 2364 .loc 1 2707 3 is_stmt 1 view .LVU725 - 2365 .LVL261: - 2366 .LBB389: - 2367 .LBI389: + 3041 .loc 4 907 68 view .LVU918 + 3042 .LBE394: + 3043 .LBE393: +2969:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3044 .loc 1 2969 43 discriminator 2 view .LVU919 + 3045 0096 B3F57A7F cmp r3, #1000 + 3046 009a 01D8 bhi .L223 +2969:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3047 .loc 1 2969 62 is_stmt 1 discriminator 3 view .LVU920 +2969:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3048 .loc 1 2969 67 is_stmt 0 discriminator 3 view .LVU921 + 3049 009c 0133 adds r3, r3, #1 + 3050 .LVL362: +2969:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 3051 .loc 1 2969 67 discriminator 3 view .LVU922 + 3052 009e F5E7 b .L222 + 3053 .L223: +2970:Src/main.c **** while(tmp32<500){tmp32++;} + 3054 .loc 1 2970 3 is_stmt 1 view .LVU923 + 3055 .LVL363: + 3056 .LBB395: + 3057 .LBI395: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2368 .loc 4 370 22 view .LVU726 - 2369 .LBB390: + 3058 .loc 4 370 22 view .LVU924 + 3059 .LBB396: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2370 .loc 4 372 3 view .LVU727 - 2371 010e 4349 ldr r1, .L171+12 - 2372 0110 0A68 ldr r2, [r1] - 2373 0112 22F04002 bic r2, r2, #64 - 2374 0116 0A60 str r2, [r1] - 2375 .LVL262: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2376 .loc 4 372 3 is_stmt 0 view .LVU728 - 2377 .LBE390: - 2378 .LBE389: -2708:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2379 .loc 1 2708 3 is_stmt 1 view .LVU729 - 2380 .LBB392: - 2381 .LBB391: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2382 .loc 4 373 1 is_stmt 0 view .LVU730 - 2383 0118 00E0 b .L153 - 2384 .L154: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2385 .loc 4 373 1 view .LVU731 - 2386 .LBE391: - 2387 .LBE392: -2708:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2388 .loc 1 2708 20 is_stmt 1 discriminator 2 view .LVU732 -2708:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - ARM GAS /tmp/ccYgfTud.s page 168 + 3060 .loc 4 372 3 view .LVU925 + 3061 00a0 5D49 ldr r1, .L250+8 + 3062 00a2 0A68 ldr r2, [r1] + 3063 00a4 22F04002 bic r2, r2, #64 + ARM GAS /tmp/ccwR4KB7.s page 188 - 2389 .loc 1 2708 25 is_stmt 0 discriminator 2 view .LVU733 - 2390 011a 0133 adds r3, r3, #1 - 2391 .LVL263: - 2392 .L153: -2708:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2393 .loc 1 2708 14 is_stmt 1 discriminator 1 view .LVU734 - 2394 011c B3F5FA7F cmp r3, #500 - 2395 0120 FBD3 bcc .L154 -2710:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 2396 .loc 1 2710 3 view .LVU735 - 2397 0122 0122 movs r2, #1 - 2398 0124 4021 movs r1, #64 - 2399 0126 3B48 ldr r0, .L171+4 - 2400 0128 FFF7FEFF bl HAL_GPIO_WritePin - 2401 .LVL264: -2711:Src/main.c **** } - 2402 .loc 1 2711 3 view .LVU736 - 2403 .LBB393: - 2404 .LBI393: + 3064 00a8 0A60 str r2, [r1] + 3065 .LVL364: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3066 .loc 4 372 3 is_stmt 0 view .LVU926 + 3067 .LBE396: + 3068 .LBE395: +2971:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3069 .loc 1 2971 3 is_stmt 1 view .LVU927 + 3070 .LBB398: + 3071 .LBB397: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 3072 .loc 4 373 1 is_stmt 0 view .LVU928 + 3073 00aa 00E0 b .L225 + 3074 .L226: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 3075 .loc 4 373 1 view .LVU929 + 3076 .LBE397: + 3077 .LBE398: +2971:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3078 .loc 1 2971 20 is_stmt 1 discriminator 2 view .LVU930 +2971:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3079 .loc 1 2971 25 is_stmt 0 discriminator 2 view .LVU931 + 3080 00ac 0133 adds r3, r3, #1 + 3081 .LVL365: + 3082 .L225: +2971:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3083 .loc 1 2971 14 is_stmt 1 discriminator 1 view .LVU932 + 3084 00ae B3F5FA7F cmp r3, #500 + 3085 00b2 FBD3 bcc .L226 +2973:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 3086 .loc 1 2973 3 view .LVU933 + 3087 00b4 0122 movs r2, #1 + 3088 00b6 4FF48061 mov r1, #1024 + 3089 00ba 5548 ldr r0, .L250 + 3090 00bc FFF7FEFF bl HAL_GPIO_WritePin + 3091 .LVL366: +2974:Src/main.c **** } + 3092 .loc 1 2974 3 view .LVU934 + 3093 .LBB399: + 3094 .LBI399: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2405 .loc 4 1344 26 view .LVU737 - 2406 .LBB394: + 3095 .loc 4 1344 26 view .LVU935 + 3096 .LBB400: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2407 .loc 4 1346 3 view .LVU738 + 3097 .loc 4 1346 3 view .LVU936 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2408 .loc 4 1346 21 is_stmt 0 view .LVU739 - 2409 012c 3B4B ldr r3, .L171+12 - 2410 012e DD68 ldr r5, [r3, #12] + 3098 .loc 4 1346 21 is_stmt 0 view .LVU937 + 3099 00c0 554B ldr r3, .L250+8 + 3100 00c2 DD68 ldr r5, [r3, #12] 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2411 .loc 4 1346 10 view .LVU740 - 2412 0130 ADB2 uxth r5, r5 - 2413 .LVL265: + 3101 .loc 4 1346 10 view .LVU938 + 3102 00c4 ADB2 uxth r5, r5 + 3103 .LVL367: + 3104 .L214: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2414 .loc 4 1346 10 view .LVU741 - 2415 .LBE394: - 2416 .LBE393: - 2417 0132 C8E7 b .L135 - 2418 .LVL266: - 2419 .L138: -2715:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); - 2420 .loc 1 2715 3 is_stmt 1 view .LVU742 - 2421 0134 364C ldr r4, .L171 - 2422 0136 0122 movs r2, #1 - 2423 0138 4FF48061 mov r1, #1024 - 2424 013c 2046 mov r0, r4 - 2425 013e FFF7FEFF bl HAL_GPIO_WritePin - 2426 .LVL267: -2716:Src/main.c **** tmp32=0; - 2427 .loc 1 2716 3 view .LVU743 - 2428 0142 0022 movs r2, #0 - 2429 0144 4FF40061 mov r1, #2048 - 2430 0148 2046 mov r0, r4 - 2431 014a FFF7FEFF bl HAL_GPIO_WritePin - 2432 .LVL268: -2717:Src/main.c **** while(tmp32<500){tmp32++;} - 2433 .loc 1 2717 3 view .LVU744 -2718:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - ARM GAS /tmp/ccYgfTud.s page 169 + 3105 .loc 4 1346 10 view .LVU939 + 3106 .LBE400: + ARM GAS /tmp/ccwR4KB7.s page 189 - 2434 .loc 1 2718 3 view .LVU745 -2717:Src/main.c **** while(tmp32<500){tmp32++;} - 2435 .loc 1 2717 8 is_stmt 0 view .LVU746 - 2436 014e 0023 movs r3, #0 -2718:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2437 .loc 1 2718 8 view .LVU747 - 2438 0150 00E0 b .L155 - 2439 .LVL269: - 2440 .L156: -2718:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2441 .loc 1 2718 20 is_stmt 1 discriminator 2 view .LVU748 -2718:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2442 .loc 1 2718 25 is_stmt 0 discriminator 2 view .LVU749 - 2443 0152 0133 adds r3, r3, #1 - 2444 .LVL270: - 2445 .L155: -2718:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2446 .loc 1 2718 14 is_stmt 1 discriminator 1 view .LVU750 - 2447 0154 B3F5FA7F cmp r3, #500 - 2448 0158 FBD3 bcc .L156 -2720:Src/main.c **** tmp32 = 0; - 2449 .loc 1 2720 3 view .LVU751 - 2450 .LVL271: - 2451 .LBB395: - 2452 .LBI395: + 3107 .LBE399: +3046:Src/main.c **** } + 3108 .loc 1 3046 2 is_stmt 1 view .LVU940 +3047:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time + 3109 .loc 1 3047 1 is_stmt 0 view .LVU941 + 3110 00c6 2846 mov r0, r5 + 3111 00c8 38BD pop {r3, r4, r5, pc} + 3112 .LVL368: + 3113 .L218: +2978:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); + 3114 .loc 1 2978 3 is_stmt 1 view .LVU942 + 3115 00ca 524C ldr r4, .L250+4 + 3116 00cc 0122 movs r2, #1 + 3117 00ce 4FF48061 mov r1, #1024 + 3118 00d2 2046 mov r0, r4 + 3119 00d4 FFF7FEFF bl HAL_GPIO_WritePin + 3120 .LVL369: +2979:Src/main.c **** tmp32=0; + 3121 .loc 1 2979 3 view .LVU943 + 3122 00d8 0022 movs r2, #0 + 3123 00da 4021 movs r1, #64 + 3124 00dc 2046 mov r0, r4 + 3125 00de FFF7FEFF bl HAL_GPIO_WritePin + 3126 .LVL370: +2980:Src/main.c **** while(tmp32<500){tmp32++;} + 3127 .loc 1 2980 3 view .LVU944 +2981:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3128 .loc 1 2981 3 view .LVU945 +2980:Src/main.c **** while(tmp32<500){tmp32++;} + 3129 .loc 1 2980 8 is_stmt 0 view .LVU946 + 3130 00e2 0023 movs r3, #0 +2981:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3131 .loc 1 2981 8 view .LVU947 + 3132 00e4 00E0 b .L227 + 3133 .LVL371: + 3134 .L228: +2981:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3135 .loc 1 2981 20 is_stmt 1 discriminator 2 view .LVU948 +2981:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3136 .loc 1 2981 25 is_stmt 0 discriminator 2 view .LVU949 + 3137 00e6 0133 adds r3, r3, #1 + 3138 .LVL372: + 3139 .L227: +2981:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3140 .loc 1 2981 14 is_stmt 1 discriminator 1 view .LVU950 + 3141 00e8 B3F5FA7F cmp r3, #500 + 3142 00ec FBD3 bcc .L228 +2983:Src/main.c **** tmp32 = 0; + 3143 .loc 1 2983 3 view .LVU951 + 3144 .LVL373: + 3145 .LBB401: + 3146 .LBI401: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2453 .loc 4 358 22 view .LVU752 - 2454 .LBB396: + 3147 .loc 4 358 22 view .LVU952 + 3148 .LBB402: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2455 .loc 4 360 3 view .LVU753 - 2456 015a 2F4A ldr r2, .L171+8 - 2457 015c 1368 ldr r3, [r2] - 2458 .LVL272: + 3149 .loc 4 360 3 view .LVU953 + ARM GAS /tmp/ccwR4KB7.s page 190 + + + 3150 00ee 4B4A ldr r2, .L250+12 + 3151 00f0 1368 ldr r3, [r2] + 3152 .LVL374: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2459 .loc 4 360 3 is_stmt 0 view .LVU754 - 2460 015e 43F04003 orr r3, r3, #64 - 2461 0162 1360 str r3, [r2] - 2462 .LVL273: + 3153 .loc 4 360 3 is_stmt 0 view .LVU954 + 3154 00f2 43F04003 orr r3, r3, #64 + 3155 00f6 1360 str r3, [r2] + 3156 .LVL375: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2463 .loc 4 360 3 view .LVU755 - 2464 .LBE396: - 2465 .LBE395: -2721:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2466 .loc 1 2721 3 is_stmt 1 view .LVU756 -2722:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 2467 .loc 1 2722 3 view .LVU757 -2721:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2468 .loc 1 2721 9 is_stmt 0 view .LVU758 - 2469 0164 0023 movs r3, #0 - 2470 .LVL274: - 2471 .L157: -2722:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 2472 .loc 1 2722 43 is_stmt 1 discriminator 1 view .LVU759 - 2473 .LBB397: - 2474 .LBI397: + 3157 .loc 4 360 3 view .LVU955 + 3158 .LBE402: + 3159 .LBE401: +2984:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3160 .loc 1 2984 3 is_stmt 1 view .LVU956 +2985:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3161 .loc 1 2985 3 view .LVU957 +2984:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3162 .loc 1 2984 9 is_stmt 0 view .LVU958 + 3163 00f8 0023 movs r3, #0 + 3164 .LVL376: + 3165 .L229: +2985:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3166 .loc 1 2985 43 is_stmt 1 discriminator 1 view .LVU959 + 3167 .LBB403: + 3168 .LBI403: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2475 .loc 4 905 26 view .LVU760 - ARM GAS /tmp/ccYgfTud.s page 170 + 3169 .loc 4 905 26 view .LVU960 + 3170 .LBB404: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3171 .loc 4 907 3 view .LVU961 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3172 .loc 4 907 12 is_stmt 0 view .LVU962 + 3173 00fa 484A ldr r2, .L250+12 + 3174 00fc 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3175 .loc 4 907 68 view .LVU963 + 3176 00fe 12F0010F tst r2, #1 + 3177 0102 04D1 bne .L230 + 3178 .LVL377: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3179 .loc 4 907 68 view .LVU964 + 3180 .LBE404: + 3181 .LBE403: +2985:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3182 .loc 1 2985 43 discriminator 2 view .LVU965 + 3183 0104 B3F57A7F cmp r3, #1000 + 3184 0108 01D8 bhi .L230 +2985:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3185 .loc 1 2985 62 is_stmt 1 discriminator 3 view .LVU966 +2985:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3186 .loc 1 2985 67 is_stmt 0 discriminator 3 view .LVU967 + 3187 010a 0133 adds r3, r3, #1 + 3188 .LVL378: +2985:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 3189 .loc 1 2985 67 discriminator 3 view .LVU968 + 3190 010c F5E7 b .L229 + 3191 .L230: + ARM GAS /tmp/ccwR4KB7.s page 191 - 2476 .LBB398: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2477 .loc 4 907 3 view .LVU761 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2478 .loc 4 907 12 is_stmt 0 view .LVU762 - 2479 0166 2C4A ldr r2, .L171+8 - 2480 0168 9268 ldr r2, [r2, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2481 .loc 4 907 68 view .LVU763 - 2482 016a 12F0010F tst r2, #1 - 2483 016e 04D1 bne .L158 - 2484 .LVL275: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2485 .loc 4 907 68 view .LVU764 - 2486 .LBE398: - 2487 .LBE397: -2722:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 2488 .loc 1 2722 43 discriminator 2 view .LVU765 - 2489 0170 B3F57A7F cmp r3, #1000 - 2490 0174 01D8 bhi .L158 -2722:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 2491 .loc 1 2722 62 is_stmt 1 discriminator 3 view .LVU766 -2722:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 2492 .loc 1 2722 67 is_stmt 0 discriminator 3 view .LVU767 - 2493 0176 0133 adds r3, r3, #1 - 2494 .LVL276: -2722:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 2495 .loc 1 2722 67 discriminator 3 view .LVU768 - 2496 0178 F5E7 b .L157 - 2497 .L158: -2723:Src/main.c **** while(tmp32<500){tmp32++;} - 2498 .loc 1 2723 3 is_stmt 1 view .LVU769 - 2499 .LVL277: - 2500 .LBB399: - 2501 .LBI399: +2986:Src/main.c **** while(tmp32<500){tmp32++;} + 3192 .loc 1 2986 3 is_stmt 1 view .LVU969 + 3193 .LVL379: + 3194 .LBB405: + 3195 .LBI405: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2502 .loc 4 370 22 view .LVU770 - 2503 .LBB400: + 3196 .loc 4 370 22 view .LVU970 + 3197 .LBB406: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2504 .loc 4 372 3 view .LVU771 - 2505 017a 2749 ldr r1, .L171+8 - 2506 017c 0A68 ldr r2, [r1] - 2507 017e 22F04002 bic r2, r2, #64 - 2508 0182 0A60 str r2, [r1] - 2509 .LVL278: + 3198 .loc 4 372 3 view .LVU971 + 3199 010e 4349 ldr r1, .L250+12 + 3200 0110 0A68 ldr r2, [r1] + 3201 0112 22F04002 bic r2, r2, #64 + 3202 0116 0A60 str r2, [r1] + 3203 .LVL380: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2510 .loc 4 372 3 is_stmt 0 view .LVU772 - 2511 .LBE400: - 2512 .LBE399: -2724:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2513 .loc 1 2724 3 is_stmt 1 view .LVU773 - 2514 .LBB402: - 2515 .LBB401: + 3204 .loc 4 372 3 is_stmt 0 view .LVU972 + 3205 .LBE406: + 3206 .LBE405: +2987:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3207 .loc 1 2987 3 is_stmt 1 view .LVU973 + 3208 .LBB408: + 3209 .LBB407: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2516 .loc 4 373 1 is_stmt 0 view .LVU774 - 2517 0184 00E0 b .L160 - 2518 .L161: - ARM GAS /tmp/ccYgfTud.s page 171 - - + 3210 .loc 4 373 1 is_stmt 0 view .LVU974 + 3211 0118 00E0 b .L232 + 3212 .L233: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2519 .loc 4 373 1 view .LVU775 - 2520 .LBE401: - 2521 .LBE402: -2724:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2522 .loc 1 2724 20 is_stmt 1 discriminator 2 view .LVU776 -2724:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2523 .loc 1 2724 25 is_stmt 0 discriminator 2 view .LVU777 - 2524 0186 0133 adds r3, r3, #1 - 2525 .LVL279: - 2526 .L160: -2724:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2527 .loc 1 2724 14 is_stmt 1 discriminator 1 view .LVU778 - 2528 0188 B3F5FA7F cmp r3, #500 - 2529 018c FBD3 bcc .L161 -2726:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 2530 .loc 1 2726 3 view .LVU779 - 2531 018e 0122 movs r2, #1 - 2532 0190 4FF40061 mov r1, #2048 - 2533 0194 1E48 ldr r0, .L171 - 2534 0196 FFF7FEFF bl HAL_GPIO_WritePin - 2535 .LVL280: -2727:Src/main.c **** } - 2536 .loc 1 2727 3 view .LVU780 - 2537 .LBB403: - 2538 .LBI403: + 3213 .loc 4 373 1 view .LVU975 + 3214 .LBE407: + 3215 .LBE408: +2987:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3216 .loc 1 2987 20 is_stmt 1 discriminator 2 view .LVU976 +2987:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3217 .loc 1 2987 25 is_stmt 0 discriminator 2 view .LVU977 + 3218 011a 0133 adds r3, r3, #1 + 3219 .LVL381: + 3220 .L232: +2987:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3221 .loc 1 2987 14 is_stmt 1 discriminator 1 view .LVU978 + 3222 011c B3F5FA7F cmp r3, #500 + 3223 0120 FBD3 bcc .L233 +2989:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 3224 .loc 1 2989 3 view .LVU979 + 3225 0122 0122 movs r2, #1 + 3226 0124 4021 movs r1, #64 + 3227 0126 3B48 ldr r0, .L250+4 + 3228 0128 FFF7FEFF bl HAL_GPIO_WritePin + 3229 .LVL382: +2990:Src/main.c **** } + 3230 .loc 1 2990 3 view .LVU980 + 3231 .LBB409: + 3232 .LBI409: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2539 .loc 4 1344 26 view .LVU781 - 2540 .LBB404: + 3233 .loc 4 1344 26 view .LVU981 + 3234 .LBB410: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2541 .loc 4 1346 3 view .LVU782 -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2542 .loc 4 1346 21 is_stmt 0 view .LVU783 - 2543 019a 1F4B ldr r3, .L171+8 - 2544 019c DD68 ldr r5, [r3, #12] -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2545 .loc 4 1346 10 view .LVU784 - 2546 019e ADB2 uxth r5, r5 - 2547 .LVL281: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2548 .loc 4 1346 10 view .LVU785 - 2549 .LBE404: - 2550 .LBE403: - 2551 01a0 91E7 b .L135 - 2552 .LVL282: - 2553 .L136: -2731:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); - 2554 .loc 1 2731 3 is_stmt 1 view .LVU786 - 2555 01a2 1C4C ldr r4, .L171+4 - 2556 01a4 0122 movs r2, #1 - 2557 01a6 4021 movs r1, #64 - 2558 01a8 2046 mov r0, r4 - 2559 01aa FFF7FEFF bl HAL_GPIO_WritePin - 2560 .LVL283: -2732:Src/main.c **** tmp32=0; - 2561 .loc 1 2732 3 view .LVU787 - 2562 01ae 0022 movs r2, #0 - ARM GAS /tmp/ccYgfTud.s page 172 + ARM GAS /tmp/ccwR4KB7.s page 192 - 2563 01b0 4FF48061 mov r1, #1024 - 2564 01b4 2046 mov r0, r4 - 2565 01b6 FFF7FEFF bl HAL_GPIO_WritePin - 2566 .LVL284: -2733:Src/main.c **** while(tmp32<500){tmp32++;} - 2567 .loc 1 2733 3 view .LVU788 -2734:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2568 .loc 1 2734 3 view .LVU789 -2733:Src/main.c **** while(tmp32<500){tmp32++;} - 2569 .loc 1 2733 8 is_stmt 0 view .LVU790 - 2570 01ba 0023 movs r3, #0 -2734:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2571 .loc 1 2734 8 view .LVU791 - 2572 01bc 00E0 b .L162 - 2573 .LVL285: - 2574 .L163: -2734:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2575 .loc 1 2734 20 is_stmt 1 discriminator 2 view .LVU792 -2734:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2576 .loc 1 2734 25 is_stmt 0 discriminator 2 view .LVU793 - 2577 01be 0133 adds r3, r3, #1 - 2578 .LVL286: - 2579 .L162: -2734:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 2580 .loc 1 2734 14 is_stmt 1 discriminator 1 view .LVU794 - 2581 01c0 B3F5FA7F cmp r3, #500 - 2582 01c4 FBD3 bcc .L163 -2736:Src/main.c **** tmp32 = 0; - 2583 .loc 1 2736 3 view .LVU795 - 2584 .LVL287: - 2585 .LBB405: - 2586 .LBI405: + 3235 .loc 4 1346 3 view .LVU982 +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3236 .loc 4 1346 21 is_stmt 0 view .LVU983 + 3237 012c 3B4B ldr r3, .L250+12 + 3238 012e DD68 ldr r5, [r3, #12] +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3239 .loc 4 1346 10 view .LVU984 + 3240 0130 ADB2 uxth r5, r5 + 3241 .LVL383: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3242 .loc 4 1346 10 view .LVU985 + 3243 .LBE410: + 3244 .LBE409: + 3245 0132 C8E7 b .L214 + 3246 .LVL384: + 3247 .L217: +2994:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); + 3248 .loc 1 2994 3 is_stmt 1 view .LVU986 + 3249 0134 364C ldr r4, .L250 + 3250 0136 0122 movs r2, #1 + 3251 0138 4FF48061 mov r1, #1024 + 3252 013c 2046 mov r0, r4 + 3253 013e FFF7FEFF bl HAL_GPIO_WritePin + 3254 .LVL385: +2995:Src/main.c **** tmp32=0; + 3255 .loc 1 2995 3 view .LVU987 + 3256 0142 0022 movs r2, #0 + 3257 0144 4FF40061 mov r1, #2048 + 3258 0148 2046 mov r0, r4 + 3259 014a FFF7FEFF bl HAL_GPIO_WritePin + 3260 .LVL386: +2996:Src/main.c **** while(tmp32<500){tmp32++;} + 3261 .loc 1 2996 3 view .LVU988 +2997:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3262 .loc 1 2997 3 view .LVU989 +2996:Src/main.c **** while(tmp32<500){tmp32++;} + 3263 .loc 1 2996 8 is_stmt 0 view .LVU990 + 3264 014e 0023 movs r3, #0 +2997:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3265 .loc 1 2997 8 view .LVU991 + 3266 0150 00E0 b .L234 + 3267 .LVL387: + 3268 .L235: +2997:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3269 .loc 1 2997 20 is_stmt 1 discriminator 2 view .LVU992 +2997:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3270 .loc 1 2997 25 is_stmt 0 discriminator 2 view .LVU993 + 3271 0152 0133 adds r3, r3, #1 + 3272 .LVL388: + 3273 .L234: +2997:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3274 .loc 1 2997 14 is_stmt 1 discriminator 1 view .LVU994 + 3275 0154 B3F5FA7F cmp r3, #500 + 3276 0158 FBD3 bcc .L235 +2999:Src/main.c **** tmp32 = 0; + 3277 .loc 1 2999 3 view .LVU995 + 3278 .LVL389: + ARM GAS /tmp/ccwR4KB7.s page 193 + + + 3279 .LBB411: + 3280 .LBI411: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2587 .loc 4 358 22 view .LVU796 - 2588 .LBB406: + 3281 .loc 4 358 22 view .LVU996 + 3282 .LBB412: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2589 .loc 4 360 3 view .LVU797 - 2590 01c6 154A ldr r2, .L171+12 - 2591 01c8 1368 ldr r3, [r2] - 2592 .LVL288: + 3283 .loc 4 360 3 view .LVU997 + 3284 015a 2F4A ldr r2, .L250+8 + 3285 015c 1368 ldr r3, [r2] + 3286 .LVL390: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2593 .loc 4 360 3 is_stmt 0 view .LVU798 - 2594 01ca 43F04003 orr r3, r3, #64 - 2595 01ce 1360 str r3, [r2] - 2596 .LVL289: + 3287 .loc 4 360 3 is_stmt 0 view .LVU998 + 3288 015e 43F04003 orr r3, r3, #64 + 3289 0162 1360 str r3, [r2] + 3290 .LVL391: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2597 .loc 4 360 3 view .LVU799 - 2598 .LBE406: - 2599 .LBE405: -2737:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2600 .loc 1 2737 3 is_stmt 1 view .LVU800 -2738:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 2601 .loc 1 2738 3 view .LVU801 -2737:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 2602 .loc 1 2737 9 is_stmt 0 view .LVU802 - 2603 01d0 0023 movs r3, #0 - 2604 .LVL290: - ARM GAS /tmp/ccYgfTud.s page 173 - - - 2605 .L164: -2738:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 2606 .loc 1 2738 43 is_stmt 1 discriminator 1 view .LVU803 - 2607 .LBB407: - 2608 .LBI407: + 3291 .loc 4 360 3 view .LVU999 + 3292 .LBE412: + 3293 .LBE411: +3000:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3294 .loc 1 3000 3 is_stmt 1 view .LVU1000 +3001:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3295 .loc 1 3001 3 view .LVU1001 +3000:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3296 .loc 1 3000 9 is_stmt 0 view .LVU1002 + 3297 0164 0023 movs r3, #0 + 3298 .LVL392: + 3299 .L236: +3001:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3300 .loc 1 3001 43 is_stmt 1 discriminator 1 view .LVU1003 + 3301 .LBB413: + 3302 .LBI413: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2609 .loc 4 905 26 view .LVU804 - 2610 .LBB408: + 3303 .loc 4 905 26 view .LVU1004 + 3304 .LBB414: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2611 .loc 4 907 3 view .LVU805 + 3305 .loc 4 907 3 view .LVU1005 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2612 .loc 4 907 12 is_stmt 0 view .LVU806 - 2613 01d2 124A ldr r2, .L171+12 - 2614 01d4 9268 ldr r2, [r2, #8] + 3306 .loc 4 907 12 is_stmt 0 view .LVU1006 + 3307 0166 2C4A ldr r2, .L250+8 + 3308 0168 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2615 .loc 4 907 68 view .LVU807 - 2616 01d6 12F0010F tst r2, #1 - 2617 01da 04D1 bne .L165 - 2618 .LVL291: + 3309 .loc 4 907 68 view .LVU1007 + 3310 016a 12F0010F tst r2, #1 + 3311 016e 04D1 bne .L237 + 3312 .LVL393: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2619 .loc 4 907 68 view .LVU808 - 2620 .LBE408: - 2621 .LBE407: -2738:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 2622 .loc 1 2738 43 discriminator 2 view .LVU809 - 2623 01dc B3F57A7F cmp r3, #1000 - 2624 01e0 01D8 bhi .L165 -2738:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 2625 .loc 1 2738 62 is_stmt 1 discriminator 3 view .LVU810 -2738:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 2626 .loc 1 2738 67 is_stmt 0 discriminator 3 view .LVU811 - 2627 01e2 0133 adds r3, r3, #1 - 2628 .LVL292: -2738:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 2629 .loc 1 2738 67 discriminator 3 view .LVU812 - 2630 01e4 F5E7 b .L164 - 2631 .L165: -2739:Src/main.c **** while(tmp32<500){tmp32++;} - 2632 .loc 1 2739 3 is_stmt 1 view .LVU813 - 2633 .LVL293: - 2634 .LBB409: - 2635 .LBI409: + 3313 .loc 4 907 68 view .LVU1008 + 3314 .LBE414: + 3315 .LBE413: +3001:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3316 .loc 1 3001 43 discriminator 2 view .LVU1009 + 3317 0170 B3F57A7F cmp r3, #1000 + 3318 0174 01D8 bhi .L237 +3001:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3319 .loc 1 3001 62 is_stmt 1 discriminator 3 view .LVU1010 +3001:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + ARM GAS /tmp/ccwR4KB7.s page 194 + + + 3320 .loc 1 3001 67 is_stmt 0 discriminator 3 view .LVU1011 + 3321 0176 0133 adds r3, r3, #1 + 3322 .LVL394: +3001:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 3323 .loc 1 3001 67 discriminator 3 view .LVU1012 + 3324 0178 F5E7 b .L236 + 3325 .L237: +3002:Src/main.c **** while(tmp32<500){tmp32++;} + 3326 .loc 1 3002 3 is_stmt 1 view .LVU1013 + 3327 .LVL395: + 3328 .LBB415: + 3329 .LBI415: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2636 .loc 4 370 22 view .LVU814 - 2637 .LBB410: + 3330 .loc 4 370 22 view .LVU1014 + 3331 .LBB416: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2638 .loc 4 372 3 view .LVU815 - 2639 01e6 0D49 ldr r1, .L171+12 - 2640 01e8 0A68 ldr r2, [r1] - 2641 01ea 22F04002 bic r2, r2, #64 - 2642 01ee 0A60 str r2, [r1] - 2643 .LVL294: + 3332 .loc 4 372 3 view .LVU1015 + 3333 017a 2749 ldr r1, .L250+8 + 3334 017c 0A68 ldr r2, [r1] + 3335 017e 22F04002 bic r2, r2, #64 + 3336 0182 0A60 str r2, [r1] + 3337 .LVL396: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2644 .loc 4 372 3 is_stmt 0 view .LVU816 - 2645 .LBE410: - 2646 .LBE409: -2740:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - ARM GAS /tmp/ccYgfTud.s page 174 + 3338 .loc 4 372 3 is_stmt 0 view .LVU1016 + 3339 .LBE416: + 3340 .LBE415: +3003:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3341 .loc 1 3003 3 is_stmt 1 view .LVU1017 + 3342 .LBB418: + 3343 .LBB417: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 3344 .loc 4 373 1 is_stmt 0 view .LVU1018 + 3345 0184 00E0 b .L239 + 3346 .L240: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 3347 .loc 4 373 1 view .LVU1019 + 3348 .LBE417: + 3349 .LBE418: +3003:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3350 .loc 1 3003 20 is_stmt 1 discriminator 2 view .LVU1020 +3003:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3351 .loc 1 3003 25 is_stmt 0 discriminator 2 view .LVU1021 + 3352 0186 0133 adds r3, r3, #1 + 3353 .LVL397: + 3354 .L239: +3003:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3355 .loc 1 3003 14 is_stmt 1 discriminator 1 view .LVU1022 + 3356 0188 B3F5FA7F cmp r3, #500 + 3357 018c FBD3 bcc .L240 +3005:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 3358 .loc 1 3005 3 view .LVU1023 + 3359 018e 0122 movs r2, #1 + 3360 0190 4FF40061 mov r1, #2048 + 3361 0194 1E48 ldr r0, .L250 + 3362 0196 FFF7FEFF bl HAL_GPIO_WritePin + 3363 .LVL398: +3006:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 195 - 2647 .loc 1 2740 3 is_stmt 1 view .LVU817 - 2648 .LBB412: - 2649 .LBB411: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2650 .loc 4 373 1 is_stmt 0 view .LVU818 - 2651 01f0 00E0 b .L167 - 2652 .L168: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 2653 .loc 4 373 1 view .LVU819 - 2654 .LBE411: - 2655 .LBE412: -2740:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2656 .loc 1 2740 20 is_stmt 1 discriminator 2 view .LVU820 -2740:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2657 .loc 1 2740 25 is_stmt 0 discriminator 2 view .LVU821 - 2658 01f2 0133 adds r3, r3, #1 - 2659 .LVL295: - 2660 .L167: -2740:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 2661 .loc 1 2740 14 is_stmt 1 discriminator 1 view .LVU822 - 2662 01f4 B3F5FA7F cmp r3, #500 - 2663 01f8 FBD3 bcc .L168 -2742:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 2664 .loc 1 2742 3 view .LVU823 - 2665 01fa 0122 movs r2, #1 - 2666 01fc 4FF48061 mov r1, #1024 - 2667 0200 0448 ldr r0, .L171+4 - 2668 0202 FFF7FEFF bl HAL_GPIO_WritePin - 2669 .LVL296: -2743:Src/main.c **** } - 2670 .loc 1 2743 3 view .LVU824 - 2671 .LBB413: - 2672 .LBI413: + 3364 .loc 1 3006 3 view .LVU1024 + 3365 .LBB419: + 3366 .LBI419: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2673 .loc 4 1344 26 view .LVU825 - 2674 .LBB414: + 3367 .loc 4 1344 26 view .LVU1025 + 3368 .LBB420: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2675 .loc 4 1346 3 view .LVU826 + 3369 .loc 4 1346 3 view .LVU1026 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2676 .loc 4 1346 21 is_stmt 0 view .LVU827 - 2677 0206 054B ldr r3, .L171+12 - 2678 0208 DD68 ldr r5, [r3, #12] + 3370 .loc 4 1346 21 is_stmt 0 view .LVU1027 + 3371 019a 1F4B ldr r3, .L250+8 + 3372 019c DD68 ldr r5, [r3, #12] 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2679 .loc 4 1346 10 view .LVU828 - 2680 020a ADB2 uxth r5, r5 - 2681 .LVL297: + 3373 .loc 4 1346 10 view .LVU1028 + 3374 019e ADB2 uxth r5, r5 + 3375 .LVL399: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2682 .loc 4 1346 10 view .LVU829 - 2683 020c 5BE7 b .L135 - 2684 .L172: - 2685 020e 00BF .align 2 - 2686 .L171: - 2687 0210 00100240 .word 1073876992 - 2688 0214 00140240 .word 1073878016 - 2689 0218 00340140 .word 1073820672 - 2690 021c 00500140 .word 1073827840 - 2691 .LBE414: - ARM GAS /tmp/ccYgfTud.s page 175 + 3376 .loc 4 1346 10 view .LVU1029 + 3377 .LBE420: + 3378 .LBE419: + 3379 01a0 91E7 b .L214 + 3380 .LVL400: + 3381 .L215: +3010:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); + 3382 .loc 1 3010 3 is_stmt 1 view .LVU1030 + 3383 01a2 1C4C ldr r4, .L250+4 + 3384 01a4 0122 movs r2, #1 + 3385 01a6 4021 movs r1, #64 + 3386 01a8 2046 mov r0, r4 + 3387 01aa FFF7FEFF bl HAL_GPIO_WritePin + 3388 .LVL401: +3011:Src/main.c **** tmp32=0; + 3389 .loc 1 3011 3 view .LVU1031 + 3390 01ae 0022 movs r2, #0 + 3391 01b0 4FF48061 mov r1, #1024 + 3392 01b4 2046 mov r0, r4 + 3393 01b6 FFF7FEFF bl HAL_GPIO_WritePin + 3394 .LVL402: +3012:Src/main.c **** while(tmp32<500){tmp32++;} + 3395 .loc 1 3012 3 view .LVU1032 +3013:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3396 .loc 1 3013 3 view .LVU1033 +3012:Src/main.c **** while(tmp32<500){tmp32++;} + 3397 .loc 1 3012 8 is_stmt 0 view .LVU1034 + 3398 01ba 0023 movs r3, #0 +3013:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3399 .loc 1 3013 8 view .LVU1035 + 3400 01bc 00E0 b .L241 + 3401 .LVL403: + 3402 .L242: +3013:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3403 .loc 1 3013 20 is_stmt 1 discriminator 2 view .LVU1036 +3013:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3404 .loc 1 3013 25 is_stmt 0 discriminator 2 view .LVU1037 + 3405 01be 0133 adds r3, r3, #1 + 3406 .LVL404: + 3407 .L241: + ARM GAS /tmp/ccwR4KB7.s page 196 - 2692 .LBE413: - 2693 .cfi_endproc - 2694 .LFE1218: - 2696 .section .text.Stop_TIM10,"ax",%progbits - 2697 .align 1 - 2698 .syntax unified - 2699 .thumb - 2700 .thumb_func - 2702 Stop_TIM10: - 2703 .LFB1229: -2908:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) -2909:Src/main.c **** { -2910:Src/main.c **** uint16_t cl_ind; -2911:Src/main.c **** -2912:Src/main.c **** switch (UART_header) -2913:Src/main.c **** { -2914:Src/main.c **** case 0x7777: -2915:Src/main.c **** cl_ind = TSK_16 - 2; -2916:Src/main.c **** break; -2917:Src/main.c **** case 0x1111: -2918:Src/main.c **** cl_ind = CL_16 - 2; -2919:Src/main.c **** break; -2920:Src/main.c **** default: -2921:Src/main.c **** return 0; -2922:Src/main.c **** break; -2923:Src/main.c **** } -2924:Src/main.c **** -2925:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); -2926:Src/main.c **** -2927:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); -2928:Src/main.c **** } -2929:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) -2930:Src/main.c **** { -2931:Src/main.c **** short i; -2932:Src/main.c **** uint16_t cs = *pbuff; -2933:Src/main.c **** -2934:Src/main.c **** for(i = 1; i < len; i++) -2935:Src/main.c **** { -2936:Src/main.c **** cs ^= *(pbuff+i); -2937:Src/main.c **** } -2938:Src/main.c **** return cs; -2939:Src/main.c **** } -2940:Src/main.c **** -2941:Src/main.c **** /*int SD_Init(void) -2942:Src/main.c **** { -2943:Src/main.c **** int test=0; -2944:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2945:Src/main.c **** { -2946:Src/main.c **** test = Mount_SD("/"); -2947:Src/main.c **** if (test == 0) //0 - suc -2948:Src/main.c **** { -2949:Src/main.c **** //Format_SD(); -2950:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc -2951:Src/main.c **** //Create_File("FILE2.TXT"); -2952:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part -2953:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2954:Src/main.c **** return test; - ARM GAS /tmp/ccYgfTud.s page 176 +3013:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3408 .loc 1 3013 14 is_stmt 1 discriminator 1 view .LVU1038 + 3409 01c0 B3F5FA7F cmp r3, #500 + 3410 01c4 FBD3 bcc .L242 +3015:Src/main.c **** tmp32 = 0; + 3411 .loc 1 3015 3 view .LVU1039 + 3412 .LVL405: + 3413 .LBB421: + 3414 .LBI421: + 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3415 .loc 4 358 22 view .LVU1040 + 3416 .LBB422: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3417 .loc 4 360 3 view .LVU1041 + 3418 01c6 154A ldr r2, .L250+12 + 3419 01c8 1368 ldr r3, [r2] + 3420 .LVL406: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3421 .loc 4 360 3 is_stmt 0 view .LVU1042 + 3422 01ca 43F04003 orr r3, r3, #64 + 3423 01ce 1360 str r3, [r2] + 3424 .LVL407: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3425 .loc 4 360 3 view .LVU1043 + 3426 .LBE422: + 3427 .LBE421: +3016:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3428 .loc 1 3016 3 is_stmt 1 view .LVU1044 +3017:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3429 .loc 1 3017 3 view .LVU1045 +3016:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 3430 .loc 1 3016 9 is_stmt 0 view .LVU1046 + 3431 01d0 0023 movs r3, #0 + 3432 .LVL408: + 3433 .L243: +3017:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3434 .loc 1 3017 43 is_stmt 1 discriminator 1 view .LVU1047 + 3435 .LBB423: + 3436 .LBI423: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3437 .loc 4 905 26 view .LVU1048 + 3438 .LBB424: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3439 .loc 4 907 3 view .LVU1049 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3440 .loc 4 907 12 is_stmt 0 view .LVU1050 + 3441 01d2 124A ldr r2, .L250+12 + 3442 01d4 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3443 .loc 4 907 68 view .LVU1051 + 3444 01d6 12F0010F tst r2, #1 + 3445 01da 04D1 bne .L244 + 3446 .LVL409: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3447 .loc 4 907 68 view .LVU1052 + 3448 .LBE424: + 3449 .LBE423: + ARM GAS /tmp/ccwR4KB7.s page 197 -2955:Src/main.c **** } -2956:Src/main.c **** else -2957:Src/main.c **** { -2958:Src/main.c **** return 1; -2959:Src/main.c **** } -2960:Src/main.c **** } -2961:Src/main.c **** else -2962:Src/main.c **** { -2963:Src/main.c **** return 1; -2964:Src/main.c **** } -2965:Src/main.c **** }*/ -2966:Src/main.c **** -2967:Src/main.c **** int SD_SAVE(uint16_t *pbuff) -2968:Src/main.c **** { -2969:Src/main.c **** int test=0; -2970:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2971:Src/main.c **** { -2972:Src/main.c **** test = Mount_SD("/"); -2973:Src/main.c **** if (test == 0) //0 - suc -2974:Src/main.c **** { -2975:Src/main.c **** //Format_SD(); -2976:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); -2977:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2978:Src/main.c **** return test; -2979:Src/main.c **** } -2980:Src/main.c **** else -2981:Src/main.c **** { -2982:Src/main.c **** return 1; -2983:Src/main.c **** } -2984:Src/main.c **** } -2985:Src/main.c **** else -2986:Src/main.c **** { -2987:Src/main.c **** return 1; -2988:Src/main.c **** } -2989:Src/main.c **** } -2990:Src/main.c **** -2991:Src/main.c **** -2992:Src/main.c **** -2993:Src/main.c **** //uint32_t Get_Length(void) -2994:Src/main.c **** //{ -2995:Src/main.c **** // return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16); -2996:Src/main.c **** //} -2997:Src/main.c **** -2998:Src/main.c **** int SD_READ(uint16_t *pbuff) -2999:Src/main.c **** { -3000:Src/main.c **** int test=0; -3001:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -3002:Src/main.c **** { -3003:Src/main.c **** test = Mount_SD("/"); -3004:Src/main.c **** if (test == 0) //0 - suc -3005:Src/main.c **** { -3006:Src/main.c **** //Format_SD(); -3007:Src/main.c **** test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes -3008:Src/main.c **** fgoto+=DL_8; -3009:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -3010:Src/main.c **** return test; -3011:Src/main.c **** } - ARM GAS /tmp/ccYgfTud.s page 177 +3017:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3450 .loc 1 3017 43 discriminator 2 view .LVU1053 + 3451 01dc B3F57A7F cmp r3, #1000 + 3452 01e0 01D8 bhi .L244 +3017:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3453 .loc 1 3017 62 is_stmt 1 discriminator 3 view .LVU1054 +3017:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3454 .loc 1 3017 67 is_stmt 0 discriminator 3 view .LVU1055 + 3455 01e2 0133 adds r3, r3, #1 + 3456 .LVL410: +3017:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 3457 .loc 1 3017 67 discriminator 3 view .LVU1056 + 3458 01e4 F5E7 b .L243 + 3459 .L244: +3018:Src/main.c **** while(tmp32<500){tmp32++;} + 3460 .loc 1 3018 3 is_stmt 1 view .LVU1057 + 3461 .LVL411: + 3462 .LBB425: + 3463 .LBI425: + 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3464 .loc 4 370 22 view .LVU1058 + 3465 .LBB426: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3466 .loc 4 372 3 view .LVU1059 + 3467 01e6 0D49 ldr r1, .L250+12 + 3468 01e8 0A68 ldr r2, [r1] + 3469 01ea 22F04002 bic r2, r2, #64 + 3470 01ee 0A60 str r2, [r1] + 3471 .LVL412: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3472 .loc 4 372 3 is_stmt 0 view .LVU1060 + 3473 .LBE426: + 3474 .LBE425: +3019:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3475 .loc 1 3019 3 is_stmt 1 view .LVU1061 + 3476 .LBB428: + 3477 .LBB427: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 3478 .loc 4 373 1 is_stmt 0 view .LVU1062 + 3479 01f0 00E0 b .L246 + 3480 .L247: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 3481 .loc 4 373 1 view .LVU1063 + 3482 .LBE427: + 3483 .LBE428: +3019:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3484 .loc 1 3019 20 is_stmt 1 discriminator 2 view .LVU1064 +3019:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3485 .loc 1 3019 25 is_stmt 0 discriminator 2 view .LVU1065 + 3486 01f2 0133 adds r3, r3, #1 + 3487 .LVL413: + 3488 .L246: +3019:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 3489 .loc 1 3019 14 is_stmt 1 discriminator 1 view .LVU1066 + 3490 01f4 B3F5FA7F cmp r3, #500 + 3491 01f8 FBD3 bcc .L247 +3021:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + ARM GAS /tmp/ccwR4KB7.s page 198 -3012:Src/main.c **** else -3013:Src/main.c **** { -3014:Src/main.c **** return 1; -3015:Src/main.c **** } -3016:Src/main.c **** } -3017:Src/main.c **** else -3018:Src/main.c **** { -3019:Src/main.c **** return 1; -3020:Src/main.c **** } -3021:Src/main.c **** -3022:Src/main.c **** /* for (uint16_t j = 0; j < DL_16; j++) -3023:Src/main.c **** { -3024:Src/main.c **** *(pbuff+j) = SD_matr[SD_SLIDE][j]; -3025:Src/main.c **** } -3026:Src/main.c **** if (SD_SLIDEAHB1RSTR, Periphs); 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -11604,6 +13018,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ReleaseReset\n 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ReleaseReset 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: + ARM GAS /tmp/ccwR4KB7.s page 218 + + 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB @@ -11638,9 +13055,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_EnableClockLowPower\n 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_EnableClockLowPower\n 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_EnableClockLowPower\n - ARM GAS /tmp/ccYgfTud.s page 195 - - 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_EnableClockLowPower\n 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_EnableClockLowPower\n 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_EnableClockLowPower\n @@ -11664,6 +13078,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_EnableClockLowPower\n 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_EnableClockLowPower 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: + ARM GAS /tmp/ccwR4KB7.s page 219 + + 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC @@ -11698,9 +13115,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs) 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; - ARM GAS /tmp/ccYgfTud.s page 196 - - 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1LPENR, Periphs); 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs); @@ -11724,6 +13138,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR AXILPEN LL_AHB1_GRP1_DisableClockLowPower\n 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_DisableClockLowPower\n 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccwR4KB7.s page 220 + + 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n @@ -11758,9 +13175,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) - ARM GAS /tmp/ccYgfTud.s page 197 - - 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) @@ -11784,6 +13198,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** + ARM GAS /tmp/ccwR4KB7.s page 221 + + 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripherals clock. 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock\n @@ -11818,9 +13235,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB2 peripheral clock is enabled or not 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock\n 705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccYgfTud.s page 198 - - 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock\n 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock\n 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock\n @@ -11844,6 +13258,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 222 + + 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripherals clock. 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_DisableClock\n @@ -11878,9 +13295,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset\n 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset\n 762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset - ARM GAS /tmp/ccYgfTud.s page 199 - - 763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL 765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) @@ -11904,6 +13318,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ReleaseReset\n 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ReleaseReset\n 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset\n + ARM GAS /tmp/ccwR4KB7.s page 223 + + 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n 788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset\n @@ -11938,9 +13355,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) 819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) - ARM GAS /tmp/ccYgfTud.s page 200 - - 820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) 822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) @@ -11964,6 +13378,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_DisableClockLowPower\n 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_DisableClockLowPower\n 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccwR4KB7.s page 224 + + 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n 845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower\n @@ -11998,9 +13415,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock\n 875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccYgfTud.s page 201 - - 877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @@ -12024,6 +13438,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * + ARM GAS /tmp/ccwR4KB7.s page 225 + + 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ @@ -12058,9 +13475,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/ccYgfTud.s page 202 - - 934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) @@ -12084,6 +13498,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3RSTR, Periphs); 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + ARM GAS /tmp/ccwR4KB7.s page 226 + + 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB3 peripheral clocks in low-power mode @@ -12118,9 +13535,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs) 990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - ARM GAS /tmp/ccYgfTud.s page 203 - - 991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3LPENR, Periphs); 992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -12144,6 +13558,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_EnableClock\n 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock\n + ARM GAS /tmp/ccwR4KB7.s page 227 + + 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n 1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_EnableClock\n @@ -12178,9 +13595,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 1047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 - ARM GAS /tmp/ccYgfTud.s page 204 - - 1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 @@ -12204,6 +13618,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 228 + + 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; @@ -12238,9 +13655,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n 1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_IsEnabledClock\n 1104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccYgfTud.s page 205 - - 1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_IsEnabledClock\n 1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_IsEnabledClock\n 1107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_IsEnabledClock\n @@ -12264,6 +13678,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) + ARM GAS /tmp/ccwR4KB7.s page 229 + + 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 @@ -12298,9 +13715,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_DisableClock\n 1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n 1161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n - ARM GAS /tmp/ccYgfTud.s page 206 - - 1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_DisableClock\n 1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_DisableClock\n 1164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_DisableClock\n @@ -12324,6 +13738,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_DisableClock\n + ARM GAS /tmp/ccwR4KB7.s page 230 + + 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_DisableClock 1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: @@ -12358,9 +13775,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) - ARM GAS /tmp/ccYgfTud.s page 207 - - 1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None @@ -12384,6 +13798,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ForceReset\n 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n + ARM GAS /tmp/ccwR4KB7.s page 231 + + 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n 1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n @@ -12418,9 +13835,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 - ARM GAS /tmp/ccYgfTud.s page 208 - - 1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 @@ -12444,6 +13858,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs); 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + ARM GAS /tmp/ccwR4KB7.s page 232 + + 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release APB1 peripherals reset. @@ -12478,9 +13895,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART7RST LL_APB1_GRP1_ReleaseReset\n 1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART8RST LL_APB1_GRP1_ReleaseReset 1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccYgfTud.s page 209 - - 1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 @@ -12504,6 +13918,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 + ARM GAS /tmp/ccwR4KB7.s page 233 + + 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) @@ -12538,9 +13955,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_EnableClockLowPower\n 1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART2LPEN LL_APB1_GRP1_EnableClockLowPower\n 1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART3LPEN LL_APB1_GRP1_EnableClockLowPower\n - ARM GAS /tmp/ccYgfTud.s page 210 - - 1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_EnableClockLowPower\n 1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_EnableClockLowPower\n 1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n @@ -12564,6 +13978,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 + ARM GAS /tmp/ccwR4KB7.s page 234 + + 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 @@ -12598,9 +14015,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1LPENR, Periphs); 1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1LPENR, Periphs); - ARM GAS /tmp/ccYgfTud.s page 211 - - 1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -12624,6 +14038,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART3LPEN LL_APB1_GRP1_DisableClockLowPower\n 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_DisableClockLowPower\n 1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccwR4KB7.s page 235 + + 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n 1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C3LPEN LL_APB1_GRP1_DisableClockLowPower\n @@ -12658,9 +14075,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 - ARM GAS /tmp/ccYgfTud.s page 212 - - 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 @@ -12684,6 +14098,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 236 + + 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ @@ -12718,9 +14135,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 - ARM GAS /tmp/ccYgfTud.s page 213 - - 1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6 1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 @@ -12744,1391 +14158,1394 @@ ARM GAS /tmp/ccYgfTud.s page 1 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_MDIO (*) 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_OTGPHYC (*) 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * + ARM GAS /tmp/ccwR4KB7.s page 237 + + 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) - 3259 .loc 3 1587 22 view .LVU1016 - 3260 .LBB424: + 4087 .loc 3 1587 22 view .LVU1260 + 4088 .LBB440: 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; - 3261 .loc 3 1589 3 view .LVU1017 + 4089 .loc 3 1589 3 view .LVU1261 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 3262 .loc 3 1590 3 view .LVU1018 - 3263 001e 2A4B ldr r3, .L183 - 3264 0020 5A6C ldr r2, [r3, #68] - 3265 0022 42F40052 orr r2, r2, #8192 - 3266 0026 5A64 str r2, [r3, #68] + 4090 .loc 3 1590 3 view .LVU1262 + 4091 001e 2A4B ldr r3, .L262 + 4092 0020 5A6C ldr r2, [r3, #68] + 4093 0022 42F40052 orr r2, r2, #8192 + 4094 0026 5A64 str r2, [r3, #68] 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs); - 3267 .loc 3 1592 3 view .LVU1019 - 3268 .loc 3 1592 12 is_stmt 0 view .LVU1020 - 3269 0028 5A6C ldr r2, [r3, #68] - 3270 002a 02F40052 and r2, r2, #8192 - 3271 .loc 3 1592 10 view .LVU1021 - 3272 002e 0192 str r2, [sp, #4] + 4095 .loc 3 1592 3 view .LVU1263 + 4096 .loc 3 1592 12 is_stmt 0 view .LVU1264 + 4097 0028 5A6C ldr r2, [r3, #68] + 4098 002a 02F40052 and r2, r2, #8192 + 4099 .loc 3 1592 10 view .LVU1265 + 4100 002e 0192 str r2, [sp, #4] 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3273 .loc 3 1593 3 is_stmt 1 view .LVU1022 - 3274 0030 019A ldr r2, [sp, #4] - 3275 .LVL326: - 3276 .loc 3 1593 3 is_stmt 0 view .LVU1023 - 3277 .LBE424: - 3278 .LBE423: -1192:Src/main.c **** /**SPI4 GPIO Configuration - 3279 .loc 1 1192 3 is_stmt 1 view .LVU1024 - 3280 .LBB425: - 3281 .LBI425: - ARM GAS /tmp/ccYgfTud.s page 214 - - + 4101 .loc 3 1593 3 is_stmt 1 view .LVU1266 + 4102 0030 019A ldr r2, [sp, #4] + 4103 .LVL444: + 4104 .loc 3 1593 3 is_stmt 0 view .LVU1267 + 4105 .LBE440: + 4106 .LBE439: +1242:Src/main.c **** /**SPI4 GPIO Configuration + 4107 .loc 1 1242 3 is_stmt 1 view .LVU1268 + 4108 .LBB441: + 4109 .LBI441: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3282 .loc 3 309 22 view .LVU1025 - 3283 .LBB426: + 4110 .loc 3 309 22 view .LVU1269 + 4111 .LBB442: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 3284 .loc 3 311 3 view .LVU1026 + 4112 .loc 3 311 3 view .LVU1270 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3285 .loc 3 312 3 view .LVU1027 - 3286 0032 1A6B ldr r2, [r3, #48] - 3287 0034 42F01002 orr r2, r2, #16 - 3288 0038 1A63 str r2, [r3, #48] + 4113 .loc 3 312 3 view .LVU1271 + 4114 0032 1A6B ldr r2, [r3, #48] + 4115 0034 42F01002 orr r2, r2, #16 + 4116 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3289 .loc 3 314 3 view .LVU1028 + 4117 .loc 3 314 3 view .LVU1272 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3290 .loc 3 314 12 is_stmt 0 view .LVU1029 - 3291 003a 1B6B ldr r3, [r3, #48] - 3292 003c 03F01003 and r3, r3, #16 + 4118 .loc 3 314 12 is_stmt 0 view .LVU1273 + 4119 003a 1B6B ldr r3, [r3, #48] + 4120 003c 03F01003 and r3, r3, #16 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3293 .loc 3 314 10 view .LVU1030 - 3294 0040 0093 str r3, [sp] + 4121 .loc 3 314 10 view .LVU1274 + 4122 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3295 .loc 3 315 3 is_stmt 1 view .LVU1031 - 3296 0042 009B ldr r3, [sp] - 3297 .LVL327: + 4123 .loc 3 315 3 is_stmt 1 view .LVU1275 + 4124 0042 009B ldr r3, [sp] + 4125 .LVL445: + ARM GAS /tmp/ccwR4KB7.s page 238 + + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3298 .loc 3 315 3 is_stmt 0 view .LVU1032 - 3299 .LBE426: - 3300 .LBE425: -1197:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3301 .loc 1 1197 3 is_stmt 1 view .LVU1033 -1197:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3302 .loc 1 1197 23 is_stmt 0 view .LVU1034 - 3303 0044 4FF48053 mov r3, #4096 - 3304 0048 0293 str r3, [sp, #8] -1198:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3305 .loc 1 1198 3 is_stmt 1 view .LVU1035 -1198:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3306 .loc 1 1198 24 is_stmt 0 view .LVU1036 - 3307 004a 0225 movs r5, #2 - 3308 004c 0395 str r5, [sp, #12] -1199:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3309 .loc 1 1199 3 is_stmt 1 view .LVU1037 -1199:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3310 .loc 1 1199 25 is_stmt 0 view .LVU1038 - 3311 004e 4FF00308 mov r8, #3 - 3312 0052 CDF81080 str r8, [sp, #16] -1200:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3313 .loc 1 1200 3 is_stmt 1 view .LVU1039 -1201:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3314 .loc 1 1201 3 view .LVU1040 -1202:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 3315 .loc 1 1202 3 view .LVU1041 -1202:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 3316 .loc 1 1202 29 is_stmt 0 view .LVU1042 - 3317 0056 0527 movs r7, #5 - 3318 0058 0797 str r7, [sp, #28] -1203:Src/main.c **** - 3319 .loc 1 1203 3 is_stmt 1 view .LVU1043 - ARM GAS /tmp/ccYgfTud.s page 215 - - - 3320 005a 1C4E ldr r6, .L183+4 - 3321 005c 02A9 add r1, sp, #8 - 3322 005e 3046 mov r0, r6 - 3323 0060 FFF7FEFF bl LL_GPIO_Init - 3324 .LVL328: -1205:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3325 .loc 1 1205 3 view .LVU1044 -1205:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3326 .loc 1 1205 23 is_stmt 0 view .LVU1045 - 3327 0064 4FF40053 mov r3, #8192 - 3328 0068 0293 str r3, [sp, #8] -1206:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3329 .loc 1 1206 3 is_stmt 1 view .LVU1046 -1206:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3330 .loc 1 1206 24 is_stmt 0 view .LVU1047 - 3331 006a 0395 str r5, [sp, #12] -1207:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3332 .loc 1 1207 3 is_stmt 1 view .LVU1048 -1207:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3333 .loc 1 1207 25 is_stmt 0 view .LVU1049 - 3334 006c CDF81080 str r8, [sp, #16] -1208:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3335 .loc 1 1208 3 is_stmt 1 view .LVU1050 -1208:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3336 .loc 1 1208 30 is_stmt 0 view .LVU1051 - 3337 0070 0594 str r4, [sp, #20] -1209:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3338 .loc 1 1209 3 is_stmt 1 view .LVU1052 -1209:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3339 .loc 1 1209 24 is_stmt 0 view .LVU1053 - 3340 0072 0694 str r4, [sp, #24] -1210:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 3341 .loc 1 1210 3 is_stmt 1 view .LVU1054 -1210:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 3342 .loc 1 1210 29 is_stmt 0 view .LVU1055 - 3343 0074 0797 str r7, [sp, #28] -1211:Src/main.c **** - 3344 .loc 1 1211 3 is_stmt 1 view .LVU1056 - 3345 0076 02A9 add r1, sp, #8 - 3346 0078 3046 mov r0, r6 - 3347 007a FFF7FEFF bl LL_GPIO_Init - 3348 .LVL329: -1217:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 3349 .loc 1 1217 3 view .LVU1057 -1217:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 3350 .loc 1 1217 36 is_stmt 0 view .LVU1058 - 3351 007e 4FF48063 mov r3, #1024 - 3352 0082 0893 str r3, [sp, #32] -1218:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 3353 .loc 1 1218 3 is_stmt 1 view .LVU1059 -1218:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 3354 .loc 1 1218 23 is_stmt 0 view .LVU1060 - 3355 0084 4FF48273 mov r3, #260 - 3356 0088 0993 str r3, [sp, #36] -1219:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 3357 .loc 1 1219 3 is_stmt 1 view .LVU1061 -1219:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - ARM GAS /tmp/ccYgfTud.s page 216 - - - 3358 .loc 1 1219 28 is_stmt 0 view .LVU1062 - 3359 008a 4FF47063 mov r3, #3840 - 3360 008e 0A93 str r3, [sp, #40] -1220:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 3361 .loc 1 1220 3 is_stmt 1 view .LVU1063 -1220:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 3362 .loc 1 1220 32 is_stmt 0 view .LVU1064 - 3363 0090 0B95 str r5, [sp, #44] -1221:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 3364 .loc 1 1221 3 is_stmt 1 view .LVU1065 -1221:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 3365 .loc 1 1221 29 is_stmt 0 view .LVU1066 - 3366 0092 0C94 str r4, [sp, #48] -1222:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 3367 .loc 1 1222 3 is_stmt 1 view .LVU1067 -1222:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 3368 .loc 1 1222 22 is_stmt 0 view .LVU1068 - 3369 0094 4FF40073 mov r3, #512 - 3370 0098 0D93 str r3, [sp, #52] -1223:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 3371 .loc 1 1223 3 is_stmt 1 view .LVU1069 -1223:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 3372 .loc 1 1223 27 is_stmt 0 view .LVU1070 - 3373 009a 1823 movs r3, #24 - 3374 009c 0E93 str r3, [sp, #56] -1224:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 3375 .loc 1 1224 3 is_stmt 1 view .LVU1071 -1224:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 3376 .loc 1 1224 27 is_stmt 0 view .LVU1072 - 3377 009e 0F94 str r4, [sp, #60] -1225:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 3378 .loc 1 1225 3 is_stmt 1 view .LVU1073 -1225:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 3379 .loc 1 1225 33 is_stmt 0 view .LVU1074 - 3380 00a0 1094 str r4, [sp, #64] -1226:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 3381 .loc 1 1226 3 is_stmt 1 view .LVU1075 -1226:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 3382 .loc 1 1226 26 is_stmt 0 view .LVU1076 - 3383 00a2 0723 movs r3, #7 - 3384 00a4 1193 str r3, [sp, #68] -1227:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); - 3385 .loc 1 1227 3 is_stmt 1 view .LVU1077 - 3386 00a6 0A4C ldr r4, .L183+8 - 3387 00a8 08A9 add r1, sp, #32 - 3388 00aa 2046 mov r0, r4 - 3389 00ac FFF7FEFF bl LL_SPI_Init - 3390 .LVL330: -1228:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); - 3391 .loc 1 1228 3 view .LVU1078 - 3392 .LBB427: - 3393 .LBI427: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3394 .loc 4 426 22 view .LVU1079 - 3395 .LBB428: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3396 .loc 4 428 3 view .LVU1080 - ARM GAS /tmp/ccYgfTud.s page 217 - - - 3397 00b0 6368 ldr r3, [r4, #4] - 3398 00b2 23F01003 bic r3, r3, #16 - 3399 00b6 6360 str r3, [r4, #4] - 3400 .LVL331: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3401 .loc 4 428 3 is_stmt 0 view .LVU1081 - 3402 .LBE428: - 3403 .LBE427: -1229:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ - 3404 .loc 1 1229 3 is_stmt 1 view .LVU1082 - 3405 .LBB429: - 3406 .LBI429: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3407 .loc 4 874 22 view .LVU1083 - 3408 .LBB430: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3409 .loc 4 876 3 view .LVU1084 - 3410 00b8 6368 ldr r3, [r4, #4] - 3411 00ba 23F00803 bic r3, r3, #8 - 3412 00be 6360 str r3, [r4, #4] - 3413 .LVL332: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3414 .loc 4 876 3 is_stmt 0 view .LVU1085 - 3415 .LBE430: - 3416 .LBE429: -1234:Src/main.c **** - 3417 .loc 1 1234 1 view .LVU1086 - 3418 00c0 12B0 add sp, sp, #72 - 3419 .LCFI31: - 3420 .cfi_def_cfa_offset 24 - 3421 @ sp needed - 3422 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 3423 .L184: - 3424 00c6 00BF .align 2 - 3425 .L183: - 3426 00c8 00380240 .word 1073887232 - 3427 00cc 00100240 .word 1073876992 - 3428 00d0 00340140 .word 1073820672 - 3429 .cfi_endproc - 3430 .LFE1192: - 3432 .section .text.MX_SPI2_Init,"ax",%progbits - 3433 .align 1 - 3434 .syntax unified - 3435 .thumb - 3436 .thumb_func - 3438 MX_SPI2_Init: - 3439 .LFB1191: -1107:Src/main.c **** - 3440 .loc 1 1107 1 is_stmt 1 view -0 - 3441 .cfi_startproc - 3442 @ args = 0, pretend = 0, frame = 72 - 3443 @ frame_needed = 0, uses_anonymous_args = 0 - 3444 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 3445 .LCFI32: - 3446 .cfi_def_cfa_offset 24 - 3447 .cfi_offset 4, -24 - 3448 .cfi_offset 5, -20 - ARM GAS /tmp/ccYgfTud.s page 218 - - - 3449 .cfi_offset 6, -16 - 3450 .cfi_offset 7, -12 - 3451 .cfi_offset 8, -8 - 3452 .cfi_offset 14, -4 - 3453 0004 92B0 sub sp, sp, #72 - 3454 .LCFI33: - 3455 .cfi_def_cfa_offset 96 -1113:Src/main.c **** - 3456 .loc 1 1113 3 view .LVU1088 -1113:Src/main.c **** - 3457 .loc 1 1113 22 is_stmt 0 view .LVU1089 - 3458 0006 2822 movs r2, #40 - 3459 0008 0021 movs r1, #0 - 3460 000a 08A8 add r0, sp, #32 - 3461 000c FFF7FEFF bl memset - 3462 .LVL333: -1115:Src/main.c **** - 3463 .loc 1 1115 3 is_stmt 1 view .LVU1090 -1115:Src/main.c **** - 3464 .loc 1 1115 23 is_stmt 0 view .LVU1091 - 3465 0010 0024 movs r4, #0 - 3466 0012 0294 str r4, [sp, #8] - 3467 0014 0394 str r4, [sp, #12] - 3468 0016 0494 str r4, [sp, #16] - 3469 0018 0594 str r4, [sp, #20] - 3470 001a 0694 str r4, [sp, #24] - 3471 001c 0794 str r4, [sp, #28] -1118:Src/main.c **** - 3472 .loc 1 1118 3 is_stmt 1 view .LVU1092 - 3473 .LVL334: - 3474 .LBB431: - 3475 .LBI431: -1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3476 .loc 3 1071 22 view .LVU1093 - 3477 .LBB432: -1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 3478 .loc 3 1073 3 view .LVU1094 -1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3479 .loc 3 1074 3 view .LVU1095 - 3480 001e 2F4B ldr r3, .L187 - 3481 0020 1A6C ldr r2, [r3, #64] - 3482 0022 42F48042 orr r2, r2, #16384 - 3483 0026 1A64 str r2, [r3, #64] -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3484 .loc 3 1076 3 view .LVU1096 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3485 .loc 3 1076 12 is_stmt 0 view .LVU1097 - 3486 0028 1A6C ldr r2, [r3, #64] - 3487 002a 02F48042 and r2, r2, #16384 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3488 .loc 3 1076 10 view .LVU1098 - 3489 002e 0192 str r2, [sp, #4] -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3490 .loc 3 1077 3 is_stmt 1 view .LVU1099 - 3491 0030 019A ldr r2, [sp, #4] - 3492 .LVL335: -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccYgfTud.s page 219 - - - 3493 .loc 3 1077 3 is_stmt 0 view .LVU1100 - 3494 .LBE432: - 3495 .LBE431: -1120:Src/main.c **** /**SPI2 GPIO Configuration - 3496 .loc 1 1120 3 is_stmt 1 view .LVU1101 - 3497 .LBB433: - 3498 .LBI433: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3499 .loc 3 309 22 view .LVU1102 - 3500 .LBB434: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 3501 .loc 3 311 3 view .LVU1103 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3502 .loc 3 312 3 view .LVU1104 - 3503 0032 1A6B ldr r2, [r3, #48] - 3504 0034 42F00202 orr r2, r2, #2 - 3505 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3506 .loc 3 314 3 view .LVU1105 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3507 .loc 3 314 12 is_stmt 0 view .LVU1106 - 3508 003a 1B6B ldr r3, [r3, #48] - 3509 003c 03F00203 and r3, r3, #2 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3510 .loc 3 314 10 view .LVU1107 - 3511 0040 0093 str r3, [sp] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3512 .loc 3 315 3 is_stmt 1 view .LVU1108 - 3513 0042 009B ldr r3, [sp] - 3514 .LVL336: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3515 .loc 3 315 3 is_stmt 0 view .LVU1109 - 3516 .LBE434: - 3517 .LBE433: -1126:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3518 .loc 1 1126 3 is_stmt 1 view .LVU1110 -1126:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3519 .loc 1 1126 23 is_stmt 0 view .LVU1111 - 3520 0044 4FF40053 mov r3, #8192 - 3521 0048 0293 str r3, [sp, #8] -1127:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3522 .loc 1 1127 3 is_stmt 1 view .LVU1112 -1127:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3523 .loc 1 1127 24 is_stmt 0 view .LVU1113 - 3524 004a 4FF00208 mov r8, #2 - 3525 004e CDF80C80 str r8, [sp, #12] -1128:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3526 .loc 1 1128 3 is_stmt 1 view .LVU1114 -1128:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3527 .loc 1 1128 25 is_stmt 0 view .LVU1115 - 3528 0052 0327 movs r7, #3 - 3529 0054 0497 str r7, [sp, #16] -1129:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3530 .loc 1 1129 3 is_stmt 1 view .LVU1116 -1130:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3531 .loc 1 1130 3 view .LVU1117 -1131:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - ARM GAS /tmp/ccYgfTud.s page 220 - - - 3532 .loc 1 1131 3 view .LVU1118 -1131:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 3533 .loc 1 1131 29 is_stmt 0 view .LVU1119 - 3534 0056 0526 movs r6, #5 - 3535 0058 0796 str r6, [sp, #28] -1132:Src/main.c **** - 3536 .loc 1 1132 3 is_stmt 1 view .LVU1120 - 3537 005a 214D ldr r5, .L187+4 - 3538 005c 02A9 add r1, sp, #8 - 3539 005e 2846 mov r0, r5 - 3540 0060 FFF7FEFF bl LL_GPIO_Init - 3541 .LVL337: -1134:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3542 .loc 1 1134 3 view .LVU1121 -1134:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3543 .loc 1 1134 23 is_stmt 0 view .LVU1122 - 3544 0064 4FF48043 mov r3, #16384 - 3545 0068 0293 str r3, [sp, #8] -1135:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3546 .loc 1 1135 3 is_stmt 1 view .LVU1123 -1135:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3547 .loc 1 1135 24 is_stmt 0 view .LVU1124 - 3548 006a CDF80C80 str r8, [sp, #12] -1136:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3549 .loc 1 1136 3 is_stmt 1 view .LVU1125 -1136:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3550 .loc 1 1136 25 is_stmt 0 view .LVU1126 - 3551 006e 0497 str r7, [sp, #16] -1137:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3552 .loc 1 1137 3 is_stmt 1 view .LVU1127 -1137:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3553 .loc 1 1137 30 is_stmt 0 view .LVU1128 - 3554 0070 0594 str r4, [sp, #20] -1138:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3555 .loc 1 1138 3 is_stmt 1 view .LVU1129 -1138:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3556 .loc 1 1138 24 is_stmt 0 view .LVU1130 - 3557 0072 0694 str r4, [sp, #24] -1139:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 3558 .loc 1 1139 3 is_stmt 1 view .LVU1131 -1139:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 3559 .loc 1 1139 29 is_stmt 0 view .LVU1132 - 3560 0074 0796 str r6, [sp, #28] -1140:Src/main.c **** - 3561 .loc 1 1140 3 is_stmt 1 view .LVU1133 - 3562 0076 02A9 add r1, sp, #8 - 3563 0078 2846 mov r0, r5 - 3564 007a FFF7FEFF bl LL_GPIO_Init - 3565 .LVL338: -1142:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3566 .loc 1 1142 3 view .LVU1134 -1142:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3567 .loc 1 1142 23 is_stmt 0 view .LVU1135 - 3568 007e 4FF40043 mov r3, #32768 - 3569 0082 0293 str r3, [sp, #8] -1143:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3570 .loc 1 1143 3 is_stmt 1 view .LVU1136 - ARM GAS /tmp/ccYgfTud.s page 221 - - -1143:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3571 .loc 1 1143 24 is_stmt 0 view .LVU1137 - 3572 0084 CDF80C80 str r8, [sp, #12] -1144:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3573 .loc 1 1144 3 is_stmt 1 view .LVU1138 -1144:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3574 .loc 1 1144 25 is_stmt 0 view .LVU1139 - 3575 0088 0497 str r7, [sp, #16] -1145:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3576 .loc 1 1145 3 is_stmt 1 view .LVU1140 -1145:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3577 .loc 1 1145 30 is_stmt 0 view .LVU1141 - 3578 008a 0594 str r4, [sp, #20] -1146:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3579 .loc 1 1146 3 is_stmt 1 view .LVU1142 -1146:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3580 .loc 1 1146 24 is_stmt 0 view .LVU1143 - 3581 008c 0694 str r4, [sp, #24] -1147:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 3582 .loc 1 1147 3 is_stmt 1 view .LVU1144 -1147:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 3583 .loc 1 1147 29 is_stmt 0 view .LVU1145 - 3584 008e 0796 str r6, [sp, #28] -1148:Src/main.c **** - 3585 .loc 1 1148 3 is_stmt 1 view .LVU1146 - 3586 0090 02A9 add r1, sp, #8 - 3587 0092 2846 mov r0, r5 - 3588 0094 FFF7FEFF bl LL_GPIO_Init - 3589 .LVL339: -1154:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 3590 .loc 1 1154 3 view .LVU1147 -1154:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 3591 .loc 1 1154 36 is_stmt 0 view .LVU1148 - 3592 0098 0894 str r4, [sp, #32] -1155:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 3593 .loc 1 1155 3 is_stmt 1 view .LVU1149 -1155:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 3594 .loc 1 1155 23 is_stmt 0 view .LVU1150 - 3595 009a 4FF48273 mov r3, #260 - 3596 009e 0993 str r3, [sp, #36] -1156:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - 3597 .loc 1 1156 3 is_stmt 1 view .LVU1151 -1156:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - 3598 .loc 1 1156 28 is_stmt 0 view .LVU1152 - 3599 00a0 4FF47063 mov r3, #3840 - 3600 00a4 0A93 str r3, [sp, #40] -1157:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 3601 .loc 1 1157 3 is_stmt 1 view .LVU1153 -1157:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 3602 .loc 1 1157 32 is_stmt 0 view .LVU1154 - 3603 00a6 0B94 str r4, [sp, #44] -1158:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 3604 .loc 1 1158 3 is_stmt 1 view .LVU1155 -1158:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 3605 .loc 1 1158 29 is_stmt 0 view .LVU1156 - 3606 00a8 0C94 str r4, [sp, #48] -1159:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - ARM GAS /tmp/ccYgfTud.s page 222 - - - 3607 .loc 1 1159 3 is_stmt 1 view .LVU1157 -1159:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 3608 .loc 1 1159 22 is_stmt 0 view .LVU1158 - 3609 00aa 4FF40073 mov r3, #512 - 3610 00ae 0D93 str r3, [sp, #52] -1160:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 3611 .loc 1 1160 3 is_stmt 1 view .LVU1159 -1160:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 3612 .loc 1 1160 27 is_stmt 0 view .LVU1160 - 3613 00b0 1023 movs r3, #16 - 3614 00b2 0E93 str r3, [sp, #56] -1161:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 3615 .loc 1 1161 3 is_stmt 1 view .LVU1161 -1161:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 3616 .loc 1 1161 27 is_stmt 0 view .LVU1162 - 3617 00b4 0F94 str r4, [sp, #60] -1162:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 3618 .loc 1 1162 3 is_stmt 1 view .LVU1163 -1162:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 3619 .loc 1 1162 33 is_stmt 0 view .LVU1164 - 3620 00b6 1094 str r4, [sp, #64] -1163:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 3621 .loc 1 1163 3 is_stmt 1 view .LVU1165 -1163:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 3622 .loc 1 1163 26 is_stmt 0 view .LVU1166 - 3623 00b8 0723 movs r3, #7 - 3624 00ba 1193 str r3, [sp, #68] -1164:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); - 3625 .loc 1 1164 3 is_stmt 1 view .LVU1167 - 3626 00bc 094C ldr r4, .L187+8 - 3627 00be 08A9 add r1, sp, #32 - 3628 00c0 2046 mov r0, r4 - 3629 00c2 FFF7FEFF bl LL_SPI_Init - 3630 .LVL340: -1165:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); - 3631 .loc 1 1165 3 view .LVU1168 - 3632 .LBB435: - 3633 .LBI435: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3634 .loc 4 426 22 view .LVU1169 - 3635 .LBB436: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3636 .loc 4 428 3 view .LVU1170 - 3637 00c6 6368 ldr r3, [r4, #4] - 3638 00c8 23F01003 bic r3, r3, #16 - 3639 00cc 6360 str r3, [r4, #4] - 3640 .LVL341: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3641 .loc 4 428 3 is_stmt 0 view .LVU1171 - 3642 .LBE436: - 3643 .LBE435: -1166:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ - 3644 .loc 1 1166 3 is_stmt 1 view .LVU1172 - 3645 .LBB437: - 3646 .LBI437: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3647 .loc 4 874 22 view .LVU1173 - ARM GAS /tmp/ccYgfTud.s page 223 - - - 3648 .LBB438: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3649 .loc 4 876 3 view .LVU1174 - 3650 00ce 6368 ldr r3, [r4, #4] - 3651 00d0 23F00803 bic r3, r3, #8 - 3652 00d4 6360 str r3, [r4, #4] - 3653 .LVL342: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3654 .loc 4 876 3 is_stmt 0 view .LVU1175 - 3655 .LBE438: - 3656 .LBE437: -1171:Src/main.c **** - 3657 .loc 1 1171 1 view .LVU1176 - 3658 00d6 12B0 add sp, sp, #72 - 3659 .LCFI34: - 3660 .cfi_def_cfa_offset 24 - 3661 @ sp needed - 3662 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 3663 .L188: - 3664 .align 2 - 3665 .L187: - 3666 00dc 00380240 .word 1073887232 - 3667 00e0 00040240 .word 1073873920 - 3668 00e4 00380040 .word 1073756160 - 3669 .cfi_endproc - 3670 .LFE1191: - 3672 .section .text.MX_SPI5_Init,"ax",%progbits - 3673 .align 1 - 3674 .syntax unified - 3675 .thumb - 3676 .thumb_func - 3678 MX_SPI5_Init: - 3679 .LFB1193: -1242:Src/main.c **** - 3680 .loc 1 1242 1 is_stmt 1 view -0 - 3681 .cfi_startproc - 3682 @ args = 0, pretend = 0, frame = 72 - 3683 @ frame_needed = 0, uses_anonymous_args = 0 - 3684 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 3685 .LCFI35: - 3686 .cfi_def_cfa_offset 24 - 3687 .cfi_offset 4, -24 - 3688 .cfi_offset 5, -20 - 3689 .cfi_offset 6, -16 - 3690 .cfi_offset 7, -12 - 3691 .cfi_offset 8, -8 - 3692 .cfi_offset 14, -4 - 3693 0004 92B0 sub sp, sp, #72 - 3694 .LCFI36: - 3695 .cfi_def_cfa_offset 96 -1248:Src/main.c **** - 3696 .loc 1 1248 3 view .LVU1178 -1248:Src/main.c **** - 3697 .loc 1 1248 22 is_stmt 0 view .LVU1179 - 3698 0006 2822 movs r2, #40 - 3699 0008 0021 movs r1, #0 - 3700 000a 08A8 add r0, sp, #32 - ARM GAS /tmp/ccYgfTud.s page 224 - - - 3701 000c FFF7FEFF bl memset - 3702 .LVL343: -1250:Src/main.c **** - 3703 .loc 1 1250 3 is_stmt 1 view .LVU1180 -1250:Src/main.c **** - 3704 .loc 1 1250 23 is_stmt 0 view .LVU1181 - 3705 0010 0024 movs r4, #0 - 3706 0012 0294 str r4, [sp, #8] - 3707 0014 0394 str r4, [sp, #12] - 3708 0016 0494 str r4, [sp, #16] - 3709 0018 0594 str r4, [sp, #20] - 3710 001a 0694 str r4, [sp, #24] - 3711 001c 0794 str r4, [sp, #28] + 4126 .loc 3 315 3 is_stmt 0 view .LVU1276 + 4127 .LBE442: + 4128 .LBE441: +1247:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4129 .loc 1 1247 3 is_stmt 1 view .LVU1277 +1247:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4130 .loc 1 1247 23 is_stmt 0 view .LVU1278 + 4131 0044 4FF48053 mov r3, #4096 + 4132 0048 0293 str r3, [sp, #8] +1248:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4133 .loc 1 1248 3 is_stmt 1 view .LVU1279 +1248:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4134 .loc 1 1248 24 is_stmt 0 view .LVU1280 + 4135 004a 0225 movs r5, #2 + 4136 004c 0395 str r5, [sp, #12] +1249:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4137 .loc 1 1249 3 is_stmt 1 view .LVU1281 +1249:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4138 .loc 1 1249 25 is_stmt 0 view .LVU1282 + 4139 004e 4FF00308 mov r8, #3 + 4140 0052 CDF81080 str r8, [sp, #16] +1250:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4141 .loc 1 1250 3 is_stmt 1 view .LVU1283 +1251:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4142 .loc 1 1251 3 view .LVU1284 +1252:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4143 .loc 1 1252 3 view .LVU1285 +1252:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4144 .loc 1 1252 29 is_stmt 0 view .LVU1286 + 4145 0056 0527 movs r7, #5 + 4146 0058 0797 str r7, [sp, #28] 1253:Src/main.c **** - 3712 .loc 1 1253 3 is_stmt 1 view .LVU1182 - 3713 .LVL344: - 3714 .LBB439: - 3715 .LBI439: -1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3716 .loc 3 1587 22 view .LVU1183 - 3717 .LBB440: -1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 3718 .loc 3 1589 3 view .LVU1184 -1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3719 .loc 3 1590 3 view .LVU1185 - 3720 001e 294B ldr r3, .L191 - 3721 0020 5A6C ldr r2, [r3, #68] - 3722 0022 42F48012 orr r2, r2, #1048576 - 3723 0026 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3724 .loc 3 1592 3 view .LVU1186 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3725 .loc 3 1592 12 is_stmt 0 view .LVU1187 - 3726 0028 5A6C ldr r2, [r3, #68] - 3727 002a 02F48012 and r2, r2, #1048576 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3728 .loc 3 1592 10 view .LVU1188 - 3729 002e 0192 str r2, [sp, #4] - 3730 .loc 3 1593 3 is_stmt 1 view .LVU1189 - 3731 0030 019A ldr r2, [sp, #4] - 3732 .LVL345: - 3733 .loc 3 1593 3 is_stmt 0 view .LVU1190 - 3734 .LBE440: - 3735 .LBE439: -1255:Src/main.c **** /**SPI5 GPIO Configuration - 3736 .loc 1 1255 3 is_stmt 1 view .LVU1191 - 3737 .LBB441: - 3738 .LBI441: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3739 .loc 3 309 22 view .LVU1192 - 3740 .LBB442: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 3741 .loc 3 311 3 view .LVU1193 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3742 .loc 3 312 3 view .LVU1194 - 3743 0032 1A6B ldr r2, [r3, #48] - 3744 0034 42F02002 orr r2, r2, #32 - ARM GAS /tmp/ccYgfTud.s page 225 + 4147 .loc 1 1253 3 is_stmt 1 view .LVU1287 + 4148 005a 1C4E ldr r6, .L262+4 + 4149 005c 02A9 add r1, sp, #8 + 4150 005e 3046 mov r0, r6 + 4151 0060 FFF7FEFF bl LL_GPIO_Init + 4152 .LVL446: +1255:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4153 .loc 1 1255 3 view .LVU1288 +1255:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4154 .loc 1 1255 23 is_stmt 0 view .LVU1289 + 4155 0064 4FF40053 mov r3, #8192 + 4156 0068 0293 str r3, [sp, #8] +1256:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4157 .loc 1 1256 3 is_stmt 1 view .LVU1290 +1256:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4158 .loc 1 1256 24 is_stmt 0 view .LVU1291 + 4159 006a 0395 str r5, [sp, #12] +1257:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4160 .loc 1 1257 3 is_stmt 1 view .LVU1292 +1257:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4161 .loc 1 1257 25 is_stmt 0 view .LVU1293 + 4162 006c CDF81080 str r8, [sp, #16] +1258:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4163 .loc 1 1258 3 is_stmt 1 view .LVU1294 + ARM GAS /tmp/ccwR4KB7.s page 239 - 3745 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3746 .loc 3 314 3 view .LVU1195 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3747 .loc 3 314 12 is_stmt 0 view .LVU1196 - 3748 003a 1B6B ldr r3, [r3, #48] - 3749 003c 03F02003 and r3, r3, #32 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3750 .loc 3 314 10 view .LVU1197 - 3751 0040 0093 str r3, [sp] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3752 .loc 3 315 3 is_stmt 1 view .LVU1198 - 3753 0042 009B ldr r3, [sp] - 3754 .LVL346: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3755 .loc 3 315 3 is_stmt 0 view .LVU1199 - 3756 .LBE442: - 3757 .LBE441: -1260:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3758 .loc 1 1260 3 is_stmt 1 view .LVU1200 -1260:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3759 .loc 1 1260 23 is_stmt 0 view .LVU1201 - 3760 0044 8023 movs r3, #128 - 3761 0046 0293 str r3, [sp, #8] -1261:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3762 .loc 1 1261 3 is_stmt 1 view .LVU1202 -1261:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3763 .loc 1 1261 24 is_stmt 0 view .LVU1203 - 3764 0048 0225 movs r5, #2 - 3765 004a 0395 str r5, [sp, #12] -1262:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3766 .loc 1 1262 3 is_stmt 1 view .LVU1204 -1262:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3767 .loc 1 1262 25 is_stmt 0 view .LVU1205 - 3768 004c 4FF00308 mov r8, #3 - 3769 0050 CDF81080 str r8, [sp, #16] -1263:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3770 .loc 1 1263 3 is_stmt 1 view .LVU1206 -1264:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3771 .loc 1 1264 3 view .LVU1207 -1265:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 3772 .loc 1 1265 3 view .LVU1208 -1265:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 3773 .loc 1 1265 29 is_stmt 0 view .LVU1209 - 3774 0054 0527 movs r7, #5 - 3775 0056 0797 str r7, [sp, #28] -1266:Src/main.c **** - 3776 .loc 1 1266 3 is_stmt 1 view .LVU1210 - 3777 0058 1B4E ldr r6, .L191+4 - 3778 005a 02A9 add r1, sp, #8 - 3779 005c 3046 mov r0, r6 - 3780 005e FFF7FEFF bl LL_GPIO_Init - 3781 .LVL347: -1268:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3782 .loc 1 1268 3 view .LVU1211 -1268:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3783 .loc 1 1268 23 is_stmt 0 view .LVU1212 - ARM GAS /tmp/ccYgfTud.s page 226 +1258:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4164 .loc 1 1258 30 is_stmt 0 view .LVU1295 + 4165 0070 0594 str r4, [sp, #20] +1259:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4166 .loc 1 1259 3 is_stmt 1 view .LVU1296 +1259:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4167 .loc 1 1259 24 is_stmt 0 view .LVU1297 + 4168 0072 0694 str r4, [sp, #24] +1260:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4169 .loc 1 1260 3 is_stmt 1 view .LVU1298 +1260:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4170 .loc 1 1260 29 is_stmt 0 view .LVU1299 + 4171 0074 0797 str r7, [sp, #28] +1261:Src/main.c **** + 4172 .loc 1 1261 3 is_stmt 1 view .LVU1300 + 4173 0076 02A9 add r1, sp, #8 + 4174 0078 3046 mov r0, r6 + 4175 007a FFF7FEFF bl LL_GPIO_Init + 4176 .LVL447: +1267:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4177 .loc 1 1267 3 view .LVU1301 +1267:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4178 .loc 1 1267 36 is_stmt 0 view .LVU1302 + 4179 007e 4FF48063 mov r3, #1024 + 4180 0082 0893 str r3, [sp, #32] +1268:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4181 .loc 1 1268 3 is_stmt 1 view .LVU1303 +1268:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4182 .loc 1 1268 23 is_stmt 0 view .LVU1304 + 4183 0084 4FF48273 mov r3, #260 + 4184 0088 0993 str r3, [sp, #36] +1269:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4185 .loc 1 1269 3 is_stmt 1 view .LVU1305 +1269:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4186 .loc 1 1269 28 is_stmt 0 view .LVU1306 + 4187 008a 4FF47063 mov r3, #3840 + 4188 008e 0A93 str r3, [sp, #40] +1270:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4189 .loc 1 1270 3 is_stmt 1 view .LVU1307 +1270:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4190 .loc 1 1270 32 is_stmt 0 view .LVU1308 + 4191 0090 0B95 str r5, [sp, #44] +1271:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4192 .loc 1 1271 3 is_stmt 1 view .LVU1309 +1271:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4193 .loc 1 1271 29 is_stmt 0 view .LVU1310 + 4194 0092 0C94 str r4, [sp, #48] +1272:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4195 .loc 1 1272 3 is_stmt 1 view .LVU1311 +1272:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4196 .loc 1 1272 22 is_stmt 0 view .LVU1312 + 4197 0094 4FF40073 mov r3, #512 + 4198 0098 0D93 str r3, [sp, #52] +1273:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4199 .loc 1 1273 3 is_stmt 1 view .LVU1313 +1273:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4200 .loc 1 1273 27 is_stmt 0 view .LVU1314 + ARM GAS /tmp/ccwR4KB7.s page 240 - 3784 0062 4FF48073 mov r3, #256 - 3785 0066 0293 str r3, [sp, #8] -1269:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3786 .loc 1 1269 3 is_stmt 1 view .LVU1213 -1269:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3787 .loc 1 1269 24 is_stmt 0 view .LVU1214 - 3788 0068 0395 str r5, [sp, #12] -1270:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3789 .loc 1 1270 3 is_stmt 1 view .LVU1215 -1270:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3790 .loc 1 1270 25 is_stmt 0 view .LVU1216 - 3791 006a CDF81080 str r8, [sp, #16] -1271:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3792 .loc 1 1271 3 is_stmt 1 view .LVU1217 -1271:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3793 .loc 1 1271 30 is_stmt 0 view .LVU1218 - 3794 006e 0594 str r4, [sp, #20] -1272:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3795 .loc 1 1272 3 is_stmt 1 view .LVU1219 -1272:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 3796 .loc 1 1272 24 is_stmt 0 view .LVU1220 - 3797 0070 0694 str r4, [sp, #24] -1273:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 3798 .loc 1 1273 3 is_stmt 1 view .LVU1221 -1273:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 3799 .loc 1 1273 29 is_stmt 0 view .LVU1222 - 3800 0072 0797 str r7, [sp, #28] -1274:Src/main.c **** - 3801 .loc 1 1274 3 is_stmt 1 view .LVU1223 - 3802 0074 02A9 add r1, sp, #8 - 3803 0076 3046 mov r0, r6 - 3804 0078 FFF7FEFF bl LL_GPIO_Init - 3805 .LVL348: -1280:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 3806 .loc 1 1280 3 view .LVU1224 -1280:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 3807 .loc 1 1280 36 is_stmt 0 view .LVU1225 - 3808 007c 4FF48063 mov r3, #1024 - 3809 0080 0893 str r3, [sp, #32] -1281:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 3810 .loc 1 1281 3 is_stmt 1 view .LVU1226 -1281:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 3811 .loc 1 1281 23 is_stmt 0 view .LVU1227 - 3812 0082 4FF48273 mov r3, #260 - 3813 0086 0993 str r3, [sp, #36] -1282:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 3814 .loc 1 1282 3 is_stmt 1 view .LVU1228 -1282:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 3815 .loc 1 1282 28 is_stmt 0 view .LVU1229 - 3816 0088 4FF47063 mov r3, #3840 - 3817 008c 0A93 str r3, [sp, #40] -1283:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 3818 .loc 1 1283 3 is_stmt 1 view .LVU1230 -1283:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 3819 .loc 1 1283 32 is_stmt 0 view .LVU1231 - 3820 008e 0B95 str r5, [sp, #44] -1284:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - ARM GAS /tmp/ccYgfTud.s page 227 - - - 3821 .loc 1 1284 3 is_stmt 1 view .LVU1232 -1284:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 3822 .loc 1 1284 29 is_stmt 0 view .LVU1233 - 3823 0090 0C94 str r4, [sp, #48] -1285:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 3824 .loc 1 1285 3 is_stmt 1 view .LVU1234 -1285:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 3825 .loc 1 1285 22 is_stmt 0 view .LVU1235 - 3826 0092 4FF40073 mov r3, #512 - 3827 0096 0D93 str r3, [sp, #52] -1286:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 3828 .loc 1 1286 3 is_stmt 1 view .LVU1236 -1286:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 3829 .loc 1 1286 27 is_stmt 0 view .LVU1237 - 3830 0098 1823 movs r3, #24 - 3831 009a 0E93 str r3, [sp, #56] -1287:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 3832 .loc 1 1287 3 is_stmt 1 view .LVU1238 -1287:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 3833 .loc 1 1287 27 is_stmt 0 view .LVU1239 - 3834 009c 0F94 str r4, [sp, #60] -1288:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 3835 .loc 1 1288 3 is_stmt 1 view .LVU1240 -1288:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 3836 .loc 1 1288 33 is_stmt 0 view .LVU1241 - 3837 009e 1094 str r4, [sp, #64] -1289:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 3838 .loc 1 1289 3 is_stmt 1 view .LVU1242 -1289:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 3839 .loc 1 1289 26 is_stmt 0 view .LVU1243 - 3840 00a0 0723 movs r3, #7 - 3841 00a2 1193 str r3, [sp, #68] -1290:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); - 3842 .loc 1 1290 3 is_stmt 1 view .LVU1244 - 3843 00a4 094C ldr r4, .L191+8 - 3844 00a6 08A9 add r1, sp, #32 - 3845 00a8 2046 mov r0, r4 - 3846 00aa FFF7FEFF bl LL_SPI_Init - 3847 .LVL349: -1291:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); - 3848 .loc 1 1291 3 view .LVU1245 - 3849 .LBB443: - 3850 .LBI443: + 4201 009a 1823 movs r3, #24 + 4202 009c 0E93 str r3, [sp, #56] +1274:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4203 .loc 1 1274 3 is_stmt 1 view .LVU1315 +1274:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4204 .loc 1 1274 27 is_stmt 0 view .LVU1316 + 4205 009e 0F94 str r4, [sp, #60] +1275:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4206 .loc 1 1275 3 is_stmt 1 view .LVU1317 +1275:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4207 .loc 1 1275 33 is_stmt 0 view .LVU1318 + 4208 00a0 1094 str r4, [sp, #64] +1276:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 4209 .loc 1 1276 3 is_stmt 1 view .LVU1319 +1276:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 4210 .loc 1 1276 26 is_stmt 0 view .LVU1320 + 4211 00a2 0723 movs r3, #7 + 4212 00a4 1193 str r3, [sp, #68] +1277:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); + 4213 .loc 1 1277 3 is_stmt 1 view .LVU1321 + 4214 00a6 0A4C ldr r4, .L262+8 + 4215 00a8 08A9 add r1, sp, #32 + 4216 00aa 2046 mov r0, r4 + 4217 00ac FFF7FEFF bl LL_SPI_Init + 4218 .LVL448: +1278:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); + 4219 .loc 1 1278 3 view .LVU1322 + 4220 .LBB443: + 4221 .LBI443: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3851 .loc 4 426 22 view .LVU1246 - 3852 .LBB444: + 4222 .loc 4 426 22 view .LVU1323 + 4223 .LBB444: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3853 .loc 4 428 3 view .LVU1247 - 3854 00ae 6368 ldr r3, [r4, #4] - 3855 00b0 23F01003 bic r3, r3, #16 - 3856 00b4 6360 str r3, [r4, #4] - 3857 .LVL350: + 4224 .loc 4 428 3 view .LVU1324 + 4225 00b0 6368 ldr r3, [r4, #4] + 4226 00b2 23F01003 bic r3, r3, #16 + 4227 00b6 6360 str r3, [r4, #4] + 4228 .LVL449: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3858 .loc 4 428 3 is_stmt 0 view .LVU1248 - 3859 .LBE444: - 3860 .LBE443: -1292:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ - ARM GAS /tmp/ccYgfTud.s page 228 - - - 3861 .loc 1 1292 3 is_stmt 1 view .LVU1249 - 3862 .LBB445: - 3863 .LBI445: + 4229 .loc 4 428 3 is_stmt 0 view .LVU1325 + 4230 .LBE444: + 4231 .LBE443: +1279:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ + 4232 .loc 1 1279 3 is_stmt 1 view .LVU1326 + 4233 .LBB445: + 4234 .LBI445: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3864 .loc 4 874 22 view .LVU1250 - 3865 .LBB446: + 4235 .loc 4 874 22 view .LVU1327 + 4236 .LBB446: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3866 .loc 4 876 3 view .LVU1251 - 3867 00b6 6368 ldr r3, [r4, #4] - 3868 00b8 23F00803 bic r3, r3, #8 - 3869 00bc 6360 str r3, [r4, #4] - 3870 .LVL351: + 4237 .loc 4 876 3 view .LVU1328 + 4238 00b8 6368 ldr r3, [r4, #4] + 4239 00ba 23F00803 bic r3, r3, #8 + 4240 00be 6360 str r3, [r4, #4] + 4241 .LVL450: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3871 .loc 4 876 3 is_stmt 0 view .LVU1252 - 3872 .LBE446: - 3873 .LBE445: -1297:Src/main.c **** - 3874 .loc 1 1297 1 view .LVU1253 - 3875 00be 12B0 add sp, sp, #72 - 3876 .LCFI37: - 3877 .cfi_def_cfa_offset 24 - 3878 @ sp needed - 3879 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 3880 .L192: - 3881 .align 2 - 3882 .L191: - 3883 00c4 00380240 .word 1073887232 - 3884 00c8 00140240 .word 1073878016 - 3885 00cc 00500140 .word 1073827840 - 3886 .cfi_endproc - 3887 .LFE1193: - 3889 .section .text.MX_SPI6_Init,"ax",%progbits - 3890 .align 1 - 3891 .syntax unified - 3892 .thumb - 3893 .thumb_func - 3895 MX_SPI6_Init: - 3896 .LFB1194: -1305:Src/main.c **** - 3897 .loc 1 1305 1 is_stmt 1 view -0 - 3898 .cfi_startproc - 3899 @ args = 0, pretend = 0, frame = 72 - 3900 @ frame_needed = 0, uses_anonymous_args = 0 - 3901 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 3902 .LCFI38: - 3903 .cfi_def_cfa_offset 24 - 3904 .cfi_offset 4, -24 - 3905 .cfi_offset 5, -20 - 3906 .cfi_offset 6, -16 - 3907 .cfi_offset 7, -12 - 3908 .cfi_offset 8, -8 - 3909 .cfi_offset 14, -4 - 3910 0004 92B0 sub sp, sp, #72 - 3911 .LCFI39: - 3912 .cfi_def_cfa_offset 96 -1311:Src/main.c **** - 3913 .loc 1 1311 3 view .LVU1255 - ARM GAS /tmp/ccYgfTud.s page 229 + 4242 .loc 4 876 3 is_stmt 0 view .LVU1329 + ARM GAS /tmp/ccwR4KB7.s page 241 -1311:Src/main.c **** - 3914 .loc 1 1311 22 is_stmt 0 view .LVU1256 - 3915 0006 2822 movs r2, #40 - 3916 0008 0021 movs r1, #0 - 3917 000a 08A8 add r0, sp, #32 - 3918 000c FFF7FEFF bl memset - 3919 .LVL352: -1313:Src/main.c **** - 3920 .loc 1 1313 3 is_stmt 1 view .LVU1257 -1313:Src/main.c **** - 3921 .loc 1 1313 23 is_stmt 0 view .LVU1258 - 3922 0010 0024 movs r4, #0 - 3923 0012 0294 str r4, [sp, #8] - 3924 0014 0394 str r4, [sp, #12] - 3925 0016 0494 str r4, [sp, #16] - 3926 0018 0594 str r4, [sp, #20] - 3927 001a 0694 str r4, [sp, #24] - 3928 001c 0794 str r4, [sp, #28] -1316:Src/main.c **** - 3929 .loc 1 1316 3 is_stmt 1 view .LVU1259 - 3930 .LVL353: - 3931 .LBB447: - 3932 .LBI447: -1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3933 .loc 3 1587 22 view .LVU1260 - 3934 .LBB448: -1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 3935 .loc 3 1589 3 view .LVU1261 -1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3936 .loc 3 1590 3 view .LVU1262 - 3937 001e 294B ldr r3, .L195 - 3938 0020 5A6C ldr r2, [r3, #68] - 3939 0022 42F40012 orr r2, r2, #2097152 - 3940 0026 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3941 .loc 3 1592 3 view .LVU1263 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3942 .loc 3 1592 12 is_stmt 0 view .LVU1264 - 3943 0028 5A6C ldr r2, [r3, #68] - 3944 002a 02F40012 and r2, r2, #2097152 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3945 .loc 3 1592 10 view .LVU1265 - 3946 002e 0192 str r2, [sp, #4] - 3947 .loc 3 1593 3 is_stmt 1 view .LVU1266 - 3948 0030 019A ldr r2, [sp, #4] - 3949 .LVL354: - 3950 .loc 3 1593 3 is_stmt 0 view .LVU1267 - 3951 .LBE448: - 3952 .LBE447: -1318:Src/main.c **** /**SPI6 GPIO Configuration - 3953 .loc 1 1318 3 is_stmt 1 view .LVU1268 - 3954 .LBB449: - 3955 .LBI449: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3956 .loc 3 309 22 view .LVU1269 - 3957 .LBB450: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - ARM GAS /tmp/ccYgfTud.s page 230 + 4243 .LBE446: + 4244 .LBE445: +1284:Src/main.c **** + 4245 .loc 1 1284 1 view .LVU1330 + 4246 00c0 12B0 add sp, sp, #72 + 4247 .LCFI40: + 4248 .cfi_def_cfa_offset 24 + 4249 @ sp needed + 4250 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 4251 .L263: + 4252 00c6 00BF .align 2 + 4253 .L262: + 4254 00c8 00380240 .word 1073887232 + 4255 00cc 00100240 .word 1073876992 + 4256 00d0 00340140 .word 1073820672 + 4257 .cfi_endproc + 4258 .LFE1192: + 4260 .section .text.MX_SPI2_Init,"ax",%progbits + 4261 .align 1 + 4262 .syntax unified + 4263 .thumb + 4264 .thumb_func + 4266 MX_SPI2_Init: + 4267 .LFB1191: +1157:Src/main.c **** + 4268 .loc 1 1157 1 is_stmt 1 view -0 + 4269 .cfi_startproc + 4270 @ args = 0, pretend = 0, frame = 72 + 4271 @ frame_needed = 0, uses_anonymous_args = 0 + 4272 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 4273 .LCFI41: + 4274 .cfi_def_cfa_offset 24 + 4275 .cfi_offset 4, -24 + 4276 .cfi_offset 5, -20 + 4277 .cfi_offset 6, -16 + 4278 .cfi_offset 7, -12 + 4279 .cfi_offset 8, -8 + 4280 .cfi_offset 14, -4 + 4281 0004 92B0 sub sp, sp, #72 + 4282 .LCFI42: + 4283 .cfi_def_cfa_offset 96 +1163:Src/main.c **** + 4284 .loc 1 1163 3 view .LVU1332 +1163:Src/main.c **** + 4285 .loc 1 1163 22 is_stmt 0 view .LVU1333 + 4286 0006 2822 movs r2, #40 + 4287 0008 0021 movs r1, #0 + 4288 000a 08A8 add r0, sp, #32 + 4289 000c FFF7FEFF bl memset + 4290 .LVL451: +1165:Src/main.c **** + 4291 .loc 1 1165 3 is_stmt 1 view .LVU1334 +1165:Src/main.c **** + 4292 .loc 1 1165 23 is_stmt 0 view .LVU1335 + 4293 0010 0024 movs r4, #0 + 4294 0012 0294 str r4, [sp, #8] + 4295 0014 0394 str r4, [sp, #12] + ARM GAS /tmp/ccwR4KB7.s page 242 - 3958 .loc 3 311 3 view .LVU1270 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3959 .loc 3 312 3 view .LVU1271 - 3960 0032 1A6B ldr r2, [r3, #48] - 3961 0034 42F00102 orr r2, r2, #1 - 3962 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3963 .loc 3 314 3 view .LVU1272 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3964 .loc 3 314 12 is_stmt 0 view .LVU1273 - 3965 003a 1B6B ldr r3, [r3, #48] - 3966 003c 03F00103 and r3, r3, #1 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3967 .loc 3 314 10 view .LVU1274 - 3968 0040 0093 str r3, [sp] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3969 .loc 3 315 3 is_stmt 1 view .LVU1275 - 3970 0042 009B ldr r3, [sp] - 3971 .LVL355: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3972 .loc 3 315 3 is_stmt 0 view .LVU1276 - 3973 .LBE450: - 3974 .LBE449: -1323:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3975 .loc 1 1323 3 is_stmt 1 view .LVU1277 -1323:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3976 .loc 1 1323 23 is_stmt 0 view .LVU1278 - 3977 0044 2023 movs r3, #32 - 3978 0046 0293 str r3, [sp, #8] -1324:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3979 .loc 1 1324 3 is_stmt 1 view .LVU1279 -1324:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 3980 .loc 1 1324 24 is_stmt 0 view .LVU1280 - 3981 0048 0225 movs r5, #2 - 3982 004a 0395 str r5, [sp, #12] -1325:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3983 .loc 1 1325 3 is_stmt 1 view .LVU1281 -1325:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 3984 .loc 1 1325 25 is_stmt 0 view .LVU1282 - 3985 004c 4FF00308 mov r8, #3 - 3986 0050 CDF81080 str r8, [sp, #16] -1326:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 3987 .loc 1 1326 3 is_stmt 1 view .LVU1283 -1327:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 3988 .loc 1 1327 3 view .LVU1284 -1328:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 3989 .loc 1 1328 3 view .LVU1285 -1328:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 3990 .loc 1 1328 29 is_stmt 0 view .LVU1286 - 3991 0054 0827 movs r7, #8 - 3992 0056 0797 str r7, [sp, #28] -1329:Src/main.c **** - 3993 .loc 1 1329 3 is_stmt 1 view .LVU1287 - 3994 0058 1B4E ldr r6, .L195+4 - 3995 005a 0DEB0701 add r1, sp, r7 - 3996 005e 3046 mov r0, r6 - 3997 0060 FFF7FEFF bl LL_GPIO_Init - ARM GAS /tmp/ccYgfTud.s page 231 - - - 3998 .LVL356: -1331:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 3999 .loc 1 1331 3 view .LVU1288 -1331:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4000 .loc 1 1331 23 is_stmt 0 view .LVU1289 - 4001 0064 8023 movs r3, #128 - 4002 0066 0293 str r3, [sp, #8] -1332:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4003 .loc 1 1332 3 is_stmt 1 view .LVU1290 -1332:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4004 .loc 1 1332 24 is_stmt 0 view .LVU1291 - 4005 0068 0395 str r5, [sp, #12] -1333:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4006 .loc 1 1333 3 is_stmt 1 view .LVU1292 -1333:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4007 .loc 1 1333 25 is_stmt 0 view .LVU1293 - 4008 006a CDF81080 str r8, [sp, #16] -1334:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4009 .loc 1 1334 3 is_stmt 1 view .LVU1294 -1334:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4010 .loc 1 1334 30 is_stmt 0 view .LVU1295 - 4011 006e 0594 str r4, [sp, #20] -1335:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 4012 .loc 1 1335 3 is_stmt 1 view .LVU1296 -1335:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 4013 .loc 1 1335 24 is_stmt 0 view .LVU1297 - 4014 0070 0694 str r4, [sp, #24] -1336:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 4015 .loc 1 1336 3 is_stmt 1 view .LVU1298 -1336:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 4016 .loc 1 1336 29 is_stmt 0 view .LVU1299 - 4017 0072 0797 str r7, [sp, #28] -1337:Src/main.c **** - 4018 .loc 1 1337 3 is_stmt 1 view .LVU1300 - 4019 0074 0DEB0701 add r1, sp, r7 - 4020 0078 3046 mov r0, r6 - 4021 007a FFF7FEFF bl LL_GPIO_Init - 4022 .LVL357: -1343:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4023 .loc 1 1343 3 view .LVU1301 -1343:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4024 .loc 1 1343 36 is_stmt 0 view .LVU1302 - 4025 007e 0894 str r4, [sp, #32] -1344:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 4026 .loc 1 1344 3 is_stmt 1 view .LVU1303 -1344:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 4027 .loc 1 1344 23 is_stmt 0 view .LVU1304 - 4028 0080 4FF48273 mov r3, #260 - 4029 0084 0993 str r3, [sp, #36] -1345:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 4030 .loc 1 1345 3 is_stmt 1 view .LVU1305 -1345:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 4031 .loc 1 1345 28 is_stmt 0 view .LVU1306 - 4032 0086 4FF47063 mov r3, #3840 - 4033 008a 0A93 str r3, [sp, #40] -1346:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 4034 .loc 1 1346 3 is_stmt 1 view .LVU1307 - ARM GAS /tmp/ccYgfTud.s page 232 - - -1346:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 4035 .loc 1 1346 32 is_stmt 0 view .LVU1308 - 4036 008c 0B95 str r5, [sp, #44] -1347:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4037 .loc 1 1347 3 is_stmt 1 view .LVU1309 -1347:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4038 .loc 1 1347 29 is_stmt 0 view .LVU1310 - 4039 008e 0123 movs r3, #1 - 4040 0090 0C93 str r3, [sp, #48] -1348:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 4041 .loc 1 1348 3 is_stmt 1 view .LVU1311 -1348:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 4042 .loc 1 1348 22 is_stmt 0 view .LVU1312 - 4043 0092 4FF40073 mov r3, #512 - 4044 0096 0D93 str r3, [sp, #52] -1349:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4045 .loc 1 1349 3 is_stmt 1 view .LVU1313 -1349:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4046 .loc 1 1349 27 is_stmt 0 view .LVU1314 - 4047 0098 1823 movs r3, #24 - 4048 009a 0E93 str r3, [sp, #56] -1350:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4049 .loc 1 1350 3 is_stmt 1 view .LVU1315 -1350:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4050 .loc 1 1350 27 is_stmt 0 view .LVU1316 - 4051 009c 0F94 str r4, [sp, #60] -1351:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 4052 .loc 1 1351 3 is_stmt 1 view .LVU1317 -1351:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 4053 .loc 1 1351 33 is_stmt 0 view .LVU1318 - 4054 009e 1094 str r4, [sp, #64] -1352:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 4055 .loc 1 1352 3 is_stmt 1 view .LVU1319 -1352:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 4056 .loc 1 1352 26 is_stmt 0 view .LVU1320 - 4057 00a0 0723 movs r3, #7 - 4058 00a2 1193 str r3, [sp, #68] -1353:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); - 4059 .loc 1 1353 3 is_stmt 1 view .LVU1321 - 4060 00a4 094C ldr r4, .L195+8 - 4061 00a6 08A9 add r1, sp, #32 - 4062 00a8 2046 mov r0, r4 - 4063 00aa FFF7FEFF bl LL_SPI_Init - 4064 .LVL358: -1354:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); - 4065 .loc 1 1354 3 view .LVU1322 - 4066 .LBB451: - 4067 .LBI451: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4068 .loc 4 426 22 view .LVU1323 - 4069 .LBB452: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4070 .loc 4 428 3 view .LVU1324 - 4071 00ae 6368 ldr r3, [r4, #4] - 4072 00b0 23F01003 bic r3, r3, #16 - 4073 00b4 6360 str r3, [r4, #4] - 4074 .LVL359: - ARM GAS /tmp/ccYgfTud.s page 233 - - - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4075 .loc 4 428 3 is_stmt 0 view .LVU1325 - 4076 .LBE452: - 4077 .LBE451: -1355:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ - 4078 .loc 1 1355 3 is_stmt 1 view .LVU1326 - 4079 .LBB453: - 4080 .LBI453: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4081 .loc 4 874 22 view .LVU1327 - 4082 .LBB454: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4083 .loc 4 876 3 view .LVU1328 - 4084 00b6 6368 ldr r3, [r4, #4] - 4085 00b8 23F00803 bic r3, r3, #8 - 4086 00bc 6360 str r3, [r4, #4] - 4087 .LVL360: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4088 .loc 4 876 3 is_stmt 0 view .LVU1329 - 4089 .LBE454: - 4090 .LBE453: -1360:Src/main.c **** - 4091 .loc 1 1360 1 view .LVU1330 - 4092 00be 12B0 add sp, sp, #72 - 4093 .LCFI40: - 4094 .cfi_def_cfa_offset 24 - 4095 @ sp needed - 4096 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 4097 .L196: - 4098 .align 2 - 4099 .L195: - 4100 00c4 00380240 .word 1073887232 - 4101 00c8 00000240 .word 1073872896 - 4102 00cc 00540140 .word 1073828864 - 4103 .cfi_endproc - 4104 .LFE1194: - 4106 .section .text.MX_TIM2_Init,"ax",%progbits - 4107 .align 1 - 4108 .syntax unified - 4109 .thumb - 4110 .thumb_func - 4112 MX_TIM2_Init: - 4113 .LFB1195: -1368:Src/main.c **** - 4114 .loc 1 1368 1 is_stmt 1 view -0 - 4115 .cfi_startproc - 4116 @ args = 0, pretend = 0, frame = 24 - 4117 @ frame_needed = 0, uses_anonymous_args = 0 - 4118 0000 10B5 push {r4, lr} - 4119 .LCFI41: - 4120 .cfi_def_cfa_offset 8 - 4121 .cfi_offset 4, -8 - 4122 .cfi_offset 14, -4 - 4123 0002 86B0 sub sp, sp, #24 - 4124 .LCFI42: - 4125 .cfi_def_cfa_offset 32 -1374:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 234 - - - 4126 .loc 1 1374 3 view .LVU1332 -1374:Src/main.c **** - 4127 .loc 1 1374 22 is_stmt 0 view .LVU1333 - 4128 0004 0024 movs r4, #0 - 4129 0006 0194 str r4, [sp, #4] - 4130 0008 0294 str r4, [sp, #8] - 4131 000a 0394 str r4, [sp, #12] - 4132 000c 0494 str r4, [sp, #16] - 4133 000e 0594 str r4, [sp, #20] -1377:Src/main.c **** - 4134 .loc 1 1377 3 is_stmt 1 view .LVU1334 - 4135 .LVL361: - 4136 .LBB455: - 4137 .LBI455: + 4296 0016 0494 str r4, [sp, #16] + 4297 0018 0594 str r4, [sp, #20] + 4298 001a 0694 str r4, [sp, #24] + 4299 001c 0794 str r4, [sp, #28] +1168:Src/main.c **** + 4300 .loc 1 1168 3 is_stmt 1 view .LVU1336 + 4301 .LVL452: + 4302 .LBB447: + 4303 .LBI447: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4138 .loc 3 1071 22 view .LVU1335 - 4139 .LBB456: + 4304 .loc 3 1071 22 view .LVU1337 + 4305 .LBB448: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 4140 .loc 3 1073 3 view .LVU1336 + 4306 .loc 3 1073 3 view .LVU1338 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4141 .loc 3 1074 3 view .LVU1337 - 4142 0010 1D4B ldr r3, .L199 - 4143 0012 1A6C ldr r2, [r3, #64] - 4144 0014 42F00102 orr r2, r2, #1 - 4145 0018 1A64 str r2, [r3, #64] + 4307 .loc 3 1074 3 view .LVU1339 + 4308 001e 2F4B ldr r3, .L266 + 4309 0020 1A6C ldr r2, [r3, #64] + 4310 0022 42F48042 orr r2, r2, #16384 + 4311 0026 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4146 .loc 3 1076 3 view .LVU1338 + 4312 .loc 3 1076 3 view .LVU1340 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4147 .loc 3 1076 12 is_stmt 0 view .LVU1339 - 4148 001a 1B6C ldr r3, [r3, #64] - 4149 001c 03F00103 and r3, r3, #1 + 4313 .loc 3 1076 12 is_stmt 0 view .LVU1341 + 4314 0028 1A6C ldr r2, [r3, #64] + 4315 002a 02F48042 and r2, r2, #16384 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4150 .loc 3 1076 10 view .LVU1340 - 4151 0020 0093 str r3, [sp] + 4316 .loc 3 1076 10 view .LVU1342 + 4317 002e 0192 str r2, [sp, #4] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4152 .loc 3 1077 3 is_stmt 1 view .LVU1341 - 4153 0022 009B ldr r3, [sp] - 4154 .LVL362: + 4318 .loc 3 1077 3 is_stmt 1 view .LVU1343 + 4319 0030 019A ldr r2, [sp, #4] + 4320 .LVL453: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4155 .loc 3 1077 3 is_stmt 0 view .LVU1342 - 4156 .LBE456: - 4157 .LBE455: -1380:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 4158 .loc 1 1380 3 is_stmt 1 view .LVU1343 - 4159 .LBB457: - 4160 .LBI457: + 4321 .loc 3 1077 3 is_stmt 0 view .LVU1344 + 4322 .LBE448: + 4323 .LBE447: +1170:Src/main.c **** /**SPI2 GPIO Configuration + 4324 .loc 1 1170 3 is_stmt 1 view .LVU1345 + 4325 .LBB449: + 4326 .LBI449: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 4327 .loc 3 309 22 view .LVU1346 + 4328 .LBB450: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 4329 .loc 3 311 3 view .LVU1347 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 4330 .loc 3 312 3 view .LVU1348 + 4331 0032 1A6B ldr r2, [r3, #48] + 4332 0034 42F00202 orr r2, r2, #2 + 4333 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4334 .loc 3 314 3 view .LVU1349 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4335 .loc 3 314 12 is_stmt 0 view .LVU1350 + 4336 003a 1B6B ldr r3, [r3, #48] + 4337 003c 03F00203 and r3, r3, #2 + ARM GAS /tmp/ccwR4KB7.s page 243 + + + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4338 .loc 3 314 10 view .LVU1351 + 4339 0040 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4340 .loc 3 315 3 is_stmt 1 view .LVU1352 + 4341 0042 009B ldr r3, [sp] + 4342 .LVL454: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4343 .loc 3 315 3 is_stmt 0 view .LVU1353 + 4344 .LBE450: + 4345 .LBE449: +1176:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4346 .loc 1 1176 3 is_stmt 1 view .LVU1354 +1176:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4347 .loc 1 1176 23 is_stmt 0 view .LVU1355 + 4348 0044 4FF40053 mov r3, #8192 + 4349 0048 0293 str r3, [sp, #8] +1177:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4350 .loc 1 1177 3 is_stmt 1 view .LVU1356 +1177:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4351 .loc 1 1177 24 is_stmt 0 view .LVU1357 + 4352 004a 4FF00208 mov r8, #2 + 4353 004e CDF80C80 str r8, [sp, #12] +1178:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4354 .loc 1 1178 3 is_stmt 1 view .LVU1358 +1178:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4355 .loc 1 1178 25 is_stmt 0 view .LVU1359 + 4356 0052 0327 movs r7, #3 + 4357 0054 0497 str r7, [sp, #16] +1179:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4358 .loc 1 1179 3 is_stmt 1 view .LVU1360 +1180:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4359 .loc 1 1180 3 view .LVU1361 +1181:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4360 .loc 1 1181 3 view .LVU1362 +1181:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4361 .loc 1 1181 29 is_stmt 0 view .LVU1363 + 4362 0056 0526 movs r6, #5 + 4363 0058 0796 str r6, [sp, #28] +1182:Src/main.c **** + 4364 .loc 1 1182 3 is_stmt 1 view .LVU1364 + 4365 005a 214D ldr r5, .L266+4 + 4366 005c 02A9 add r1, sp, #8 + 4367 005e 2846 mov r0, r5 + 4368 0060 FFF7FEFF bl LL_GPIO_Init + 4369 .LVL455: +1184:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4370 .loc 1 1184 3 view .LVU1365 +1184:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4371 .loc 1 1184 23 is_stmt 0 view .LVU1366 + 4372 0064 4FF48043 mov r3, #16384 + 4373 0068 0293 str r3, [sp, #8] +1185:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4374 .loc 1 1185 3 is_stmt 1 view .LVU1367 +1185:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4375 .loc 1 1185 24 is_stmt 0 view .LVU1368 + 4376 006a CDF80C80 str r8, [sp, #12] + ARM GAS /tmp/ccwR4KB7.s page 244 + + +1186:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4377 .loc 1 1186 3 is_stmt 1 view .LVU1369 +1186:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4378 .loc 1 1186 25 is_stmt 0 view .LVU1370 + 4379 006e 0497 str r7, [sp, #16] +1187:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4380 .loc 1 1187 3 is_stmt 1 view .LVU1371 +1187:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4381 .loc 1 1187 30 is_stmt 0 view .LVU1372 + 4382 0070 0594 str r4, [sp, #20] +1188:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4383 .loc 1 1188 3 is_stmt 1 view .LVU1373 +1188:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4384 .loc 1 1188 24 is_stmt 0 view .LVU1374 + 4385 0072 0694 str r4, [sp, #24] +1189:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4386 .loc 1 1189 3 is_stmt 1 view .LVU1375 +1189:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4387 .loc 1 1189 29 is_stmt 0 view .LVU1376 + 4388 0074 0796 str r6, [sp, #28] +1190:Src/main.c **** + 4389 .loc 1 1190 3 is_stmt 1 view .LVU1377 + 4390 0076 02A9 add r1, sp, #8 + 4391 0078 2846 mov r0, r5 + 4392 007a FFF7FEFF bl LL_GPIO_Init + 4393 .LVL456: +1192:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4394 .loc 1 1192 3 view .LVU1378 +1192:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4395 .loc 1 1192 23 is_stmt 0 view .LVU1379 + 4396 007e 4FF40043 mov r3, #32768 + 4397 0082 0293 str r3, [sp, #8] +1193:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4398 .loc 1 1193 3 is_stmt 1 view .LVU1380 +1193:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4399 .loc 1 1193 24 is_stmt 0 view .LVU1381 + 4400 0084 CDF80C80 str r8, [sp, #12] +1194:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4401 .loc 1 1194 3 is_stmt 1 view .LVU1382 +1194:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4402 .loc 1 1194 25 is_stmt 0 view .LVU1383 + 4403 0088 0497 str r7, [sp, #16] +1195:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4404 .loc 1 1195 3 is_stmt 1 view .LVU1384 +1195:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4405 .loc 1 1195 30 is_stmt 0 view .LVU1385 + 4406 008a 0594 str r4, [sp, #20] +1196:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4407 .loc 1 1196 3 is_stmt 1 view .LVU1386 +1196:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4408 .loc 1 1196 24 is_stmt 0 view .LVU1387 + 4409 008c 0694 str r4, [sp, #24] +1197:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4410 .loc 1 1197 3 is_stmt 1 view .LVU1388 +1197:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4411 .loc 1 1197 29 is_stmt 0 view .LVU1389 + 4412 008e 0796 str r6, [sp, #28] + ARM GAS /tmp/ccwR4KB7.s page 245 + + +1198:Src/main.c **** + 4413 .loc 1 1198 3 is_stmt 1 view .LVU1390 + 4414 0090 02A9 add r1, sp, #8 + 4415 0092 2846 mov r0, r5 + 4416 0094 FFF7FEFF bl LL_GPIO_Init + 4417 .LVL457: +1204:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4418 .loc 1 1204 3 view .LVU1391 +1204:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4419 .loc 1 1204 36 is_stmt 0 view .LVU1392 + 4420 0098 0894 str r4, [sp, #32] +1205:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4421 .loc 1 1205 3 is_stmt 1 view .LVU1393 +1205:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4422 .loc 1 1205 23 is_stmt 0 view .LVU1394 + 4423 009a 4FF48273 mov r3, #260 + 4424 009e 0993 str r3, [sp, #36] +1206:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 4425 .loc 1 1206 3 is_stmt 1 view .LVU1395 +1206:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 4426 .loc 1 1206 28 is_stmt 0 view .LVU1396 + 4427 00a0 4FF47063 mov r3, #3840 + 4428 00a4 0A93 str r3, [sp, #40] +1207:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4429 .loc 1 1207 3 is_stmt 1 view .LVU1397 +1207:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4430 .loc 1 1207 32 is_stmt 0 view .LVU1398 + 4431 00a6 0B94 str r4, [sp, #44] +1208:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4432 .loc 1 1208 3 is_stmt 1 view .LVU1399 +1208:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4433 .loc 1 1208 29 is_stmt 0 view .LVU1400 + 4434 00a8 0C94 str r4, [sp, #48] +1209:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 4435 .loc 1 1209 3 is_stmt 1 view .LVU1401 +1209:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 4436 .loc 1 1209 22 is_stmt 0 view .LVU1402 + 4437 00aa 4FF40073 mov r3, #512 + 4438 00ae 0D93 str r3, [sp, #52] +1210:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4439 .loc 1 1210 3 is_stmt 1 view .LVU1403 +1210:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4440 .loc 1 1210 27 is_stmt 0 view .LVU1404 + 4441 00b0 1023 movs r3, #16 + 4442 00b2 0E93 str r3, [sp, #56] +1211:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4443 .loc 1 1211 3 is_stmt 1 view .LVU1405 +1211:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4444 .loc 1 1211 27 is_stmt 0 view .LVU1406 + 4445 00b4 0F94 str r4, [sp, #60] +1212:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4446 .loc 1 1212 3 is_stmt 1 view .LVU1407 +1212:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4447 .loc 1 1212 33 is_stmt 0 view .LVU1408 + 4448 00b6 1094 str r4, [sp, #64] +1213:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 4449 .loc 1 1213 3 is_stmt 1 view .LVU1409 + ARM GAS /tmp/ccwR4KB7.s page 246 + + +1213:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 4450 .loc 1 1213 26 is_stmt 0 view .LVU1410 + 4451 00b8 0723 movs r3, #7 + 4452 00ba 1193 str r3, [sp, #68] +1214:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); + 4453 .loc 1 1214 3 is_stmt 1 view .LVU1411 + 4454 00bc 094C ldr r4, .L266+8 + 4455 00be 08A9 add r1, sp, #32 + 4456 00c0 2046 mov r0, r4 + 4457 00c2 FFF7FEFF bl LL_SPI_Init + 4458 .LVL458: +1215:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); + 4459 .loc 1 1215 3 view .LVU1412 + 4460 .LBB451: + 4461 .LBI451: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4462 .loc 4 426 22 view .LVU1413 + 4463 .LBB452: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4464 .loc 4 428 3 view .LVU1414 + 4465 00c6 6368 ldr r3, [r4, #4] + 4466 00c8 23F01003 bic r3, r3, #16 + 4467 00cc 6360 str r3, [r4, #4] + 4468 .LVL459: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4469 .loc 4 428 3 is_stmt 0 view .LVU1415 + 4470 .LBE452: + 4471 .LBE451: +1216:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ + 4472 .loc 1 1216 3 is_stmt 1 view .LVU1416 + 4473 .LBB453: + 4474 .LBI453: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4475 .loc 4 874 22 view .LVU1417 + 4476 .LBB454: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4477 .loc 4 876 3 view .LVU1418 + 4478 00ce 6368 ldr r3, [r4, #4] + 4479 00d0 23F00803 bic r3, r3, #8 + 4480 00d4 6360 str r3, [r4, #4] + 4481 .LVL460: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4482 .loc 4 876 3 is_stmt 0 view .LVU1419 + 4483 .LBE454: + 4484 .LBE453: +1221:Src/main.c **** + 4485 .loc 1 1221 1 view .LVU1420 + 4486 00d6 12B0 add sp, sp, #72 + 4487 .LCFI43: + 4488 .cfi_def_cfa_offset 24 + 4489 @ sp needed + 4490 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 4491 .L267: + 4492 .align 2 + 4493 .L266: + 4494 00dc 00380240 .word 1073887232 + 4495 00e0 00040240 .word 1073873920 + ARM GAS /tmp/ccwR4KB7.s page 247 + + + 4496 00e4 00380040 .word 1073756160 + 4497 .cfi_endproc + 4498 .LFE1191: + 4500 .section .text.MX_SPI5_Init,"ax",%progbits + 4501 .align 1 + 4502 .syntax unified + 4503 .thumb + 4504 .thumb_func + 4506 MX_SPI5_Init: + 4507 .LFB1193: +1292:Src/main.c **** + 4508 .loc 1 1292 1 is_stmt 1 view -0 + 4509 .cfi_startproc + 4510 @ args = 0, pretend = 0, frame = 72 + 4511 @ frame_needed = 0, uses_anonymous_args = 0 + 4512 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 4513 .LCFI44: + 4514 .cfi_def_cfa_offset 24 + 4515 .cfi_offset 4, -24 + 4516 .cfi_offset 5, -20 + 4517 .cfi_offset 6, -16 + 4518 .cfi_offset 7, -12 + 4519 .cfi_offset 8, -8 + 4520 .cfi_offset 14, -4 + 4521 0004 92B0 sub sp, sp, #72 + 4522 .LCFI45: + 4523 .cfi_def_cfa_offset 96 +1298:Src/main.c **** + 4524 .loc 1 1298 3 view .LVU1422 +1298:Src/main.c **** + 4525 .loc 1 1298 22 is_stmt 0 view .LVU1423 + 4526 0006 2822 movs r2, #40 + 4527 0008 0021 movs r1, #0 + 4528 000a 08A8 add r0, sp, #32 + 4529 000c FFF7FEFF bl memset + 4530 .LVL461: +1300:Src/main.c **** + 4531 .loc 1 1300 3 is_stmt 1 view .LVU1424 +1300:Src/main.c **** + 4532 .loc 1 1300 23 is_stmt 0 view .LVU1425 + 4533 0010 0024 movs r4, #0 + 4534 0012 0294 str r4, [sp, #8] + 4535 0014 0394 str r4, [sp, #12] + 4536 0016 0494 str r4, [sp, #16] + 4537 0018 0594 str r4, [sp, #20] + 4538 001a 0694 str r4, [sp, #24] + 4539 001c 0794 str r4, [sp, #28] +1303:Src/main.c **** + 4540 .loc 1 1303 3 is_stmt 1 view .LVU1426 + 4541 .LVL462: + 4542 .LBB455: + 4543 .LBI455: +1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 4544 .loc 3 1587 22 view .LVU1427 + 4545 .LBB456: +1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); + 4546 .loc 3 1589 3 view .LVU1428 + ARM GAS /tmp/ccwR4KB7.s page 248 + + +1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 4547 .loc 3 1590 3 view .LVU1429 + 4548 001e 294B ldr r3, .L270 + 4549 0020 5A6C ldr r2, [r3, #68] + 4550 0022 42F48012 orr r2, r2, #1048576 + 4551 0026 5A64 str r2, [r3, #68] +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4552 .loc 3 1592 3 view .LVU1430 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4553 .loc 3 1592 12 is_stmt 0 view .LVU1431 + 4554 0028 5A6C ldr r2, [r3, #68] + 4555 002a 02F48012 and r2, r2, #1048576 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4556 .loc 3 1592 10 view .LVU1432 + 4557 002e 0192 str r2, [sp, #4] + 4558 .loc 3 1593 3 is_stmt 1 view .LVU1433 + 4559 0030 019A ldr r2, [sp, #4] + 4560 .LVL463: + 4561 .loc 3 1593 3 is_stmt 0 view .LVU1434 + 4562 .LBE456: + 4563 .LBE455: +1305:Src/main.c **** /**SPI5 GPIO Configuration + 4564 .loc 1 1305 3 is_stmt 1 view .LVU1435 + 4565 .LBB457: + 4566 .LBI457: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 4567 .loc 3 309 22 view .LVU1436 + 4568 .LBB458: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 4569 .loc 3 311 3 view .LVU1437 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 4570 .loc 3 312 3 view .LVU1438 + 4571 0032 1A6B ldr r2, [r3, #48] + 4572 0034 42F02002 orr r2, r2, #32 + 4573 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4574 .loc 3 314 3 view .LVU1439 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4575 .loc 3 314 12 is_stmt 0 view .LVU1440 + 4576 003a 1B6B ldr r3, [r3, #48] + 4577 003c 03F02003 and r3, r3, #32 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4578 .loc 3 314 10 view .LVU1441 + 4579 0040 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4580 .loc 3 315 3 is_stmt 1 view .LVU1442 + 4581 0042 009B ldr r3, [sp] + 4582 .LVL464: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4583 .loc 3 315 3 is_stmt 0 view .LVU1443 + 4584 .LBE458: + 4585 .LBE457: +1310:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4586 .loc 1 1310 3 is_stmt 1 view .LVU1444 +1310:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4587 .loc 1 1310 23 is_stmt 0 view .LVU1445 + 4588 0044 8023 movs r3, #128 + ARM GAS /tmp/ccwR4KB7.s page 249 + + + 4589 0046 0293 str r3, [sp, #8] +1311:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4590 .loc 1 1311 3 is_stmt 1 view .LVU1446 +1311:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4591 .loc 1 1311 24 is_stmt 0 view .LVU1447 + 4592 0048 0225 movs r5, #2 + 4593 004a 0395 str r5, [sp, #12] +1312:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4594 .loc 1 1312 3 is_stmt 1 view .LVU1448 +1312:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4595 .loc 1 1312 25 is_stmt 0 view .LVU1449 + 4596 004c 4FF00308 mov r8, #3 + 4597 0050 CDF81080 str r8, [sp, #16] +1313:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4598 .loc 1 1313 3 is_stmt 1 view .LVU1450 +1314:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4599 .loc 1 1314 3 view .LVU1451 +1315:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 4600 .loc 1 1315 3 view .LVU1452 +1315:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 4601 .loc 1 1315 29 is_stmt 0 view .LVU1453 + 4602 0054 0527 movs r7, #5 + 4603 0056 0797 str r7, [sp, #28] +1316:Src/main.c **** + 4604 .loc 1 1316 3 is_stmt 1 view .LVU1454 + 4605 0058 1B4E ldr r6, .L270+4 + 4606 005a 02A9 add r1, sp, #8 + 4607 005c 3046 mov r0, r6 + 4608 005e FFF7FEFF bl LL_GPIO_Init + 4609 .LVL465: +1318:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4610 .loc 1 1318 3 view .LVU1455 +1318:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4611 .loc 1 1318 23 is_stmt 0 view .LVU1456 + 4612 0062 4FF48073 mov r3, #256 + 4613 0066 0293 str r3, [sp, #8] +1319:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4614 .loc 1 1319 3 is_stmt 1 view .LVU1457 +1319:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4615 .loc 1 1319 24 is_stmt 0 view .LVU1458 + 4616 0068 0395 str r5, [sp, #12] +1320:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4617 .loc 1 1320 3 is_stmt 1 view .LVU1459 +1320:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4618 .loc 1 1320 25 is_stmt 0 view .LVU1460 + 4619 006a CDF81080 str r8, [sp, #16] +1321:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4620 .loc 1 1321 3 is_stmt 1 view .LVU1461 +1321:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4621 .loc 1 1321 30 is_stmt 0 view .LVU1462 + 4622 006e 0594 str r4, [sp, #20] +1322:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4623 .loc 1 1322 3 is_stmt 1 view .LVU1463 +1322:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 4624 .loc 1 1322 24 is_stmt 0 view .LVU1464 + 4625 0070 0694 str r4, [sp, #24] +1323:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + ARM GAS /tmp/ccwR4KB7.s page 250 + + + 4626 .loc 1 1323 3 is_stmt 1 view .LVU1465 +1323:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 4627 .loc 1 1323 29 is_stmt 0 view .LVU1466 + 4628 0072 0797 str r7, [sp, #28] +1324:Src/main.c **** + 4629 .loc 1 1324 3 is_stmt 1 view .LVU1467 + 4630 0074 02A9 add r1, sp, #8 + 4631 0076 3046 mov r0, r6 + 4632 0078 FFF7FEFF bl LL_GPIO_Init + 4633 .LVL466: +1330:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4634 .loc 1 1330 3 view .LVU1468 +1330:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4635 .loc 1 1330 36 is_stmt 0 view .LVU1469 + 4636 007c 4FF48063 mov r3, #1024 + 4637 0080 0893 str r3, [sp, #32] +1331:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4638 .loc 1 1331 3 is_stmt 1 view .LVU1470 +1331:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4639 .loc 1 1331 23 is_stmt 0 view .LVU1471 + 4640 0082 4FF48273 mov r3, #260 + 4641 0086 0993 str r3, [sp, #36] +1332:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4642 .loc 1 1332 3 is_stmt 1 view .LVU1472 +1332:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4643 .loc 1 1332 28 is_stmt 0 view .LVU1473 + 4644 0088 4FF47063 mov r3, #3840 + 4645 008c 0A93 str r3, [sp, #40] +1333:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4646 .loc 1 1333 3 is_stmt 1 view .LVU1474 +1333:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 4647 .loc 1 1333 32 is_stmt 0 view .LVU1475 + 4648 008e 0B95 str r5, [sp, #44] +1334:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4649 .loc 1 1334 3 is_stmt 1 view .LVU1476 +1334:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4650 .loc 1 1334 29 is_stmt 0 view .LVU1477 + 4651 0090 0C94 str r4, [sp, #48] +1335:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4652 .loc 1 1335 3 is_stmt 1 view .LVU1478 +1335:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4653 .loc 1 1335 22 is_stmt 0 view .LVU1479 + 4654 0092 4FF40073 mov r3, #512 + 4655 0096 0D93 str r3, [sp, #52] +1336:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4656 .loc 1 1336 3 is_stmt 1 view .LVU1480 +1336:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4657 .loc 1 1336 27 is_stmt 0 view .LVU1481 + 4658 0098 1823 movs r3, #24 + 4659 009a 0E93 str r3, [sp, #56] +1337:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4660 .loc 1 1337 3 is_stmt 1 view .LVU1482 +1337:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4661 .loc 1 1337 27 is_stmt 0 view .LVU1483 + 4662 009c 0F94 str r4, [sp, #60] +1338:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4663 .loc 1 1338 3 is_stmt 1 view .LVU1484 + ARM GAS /tmp/ccwR4KB7.s page 251 + + +1338:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4664 .loc 1 1338 33 is_stmt 0 view .LVU1485 + 4665 009e 1094 str r4, [sp, #64] +1339:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 4666 .loc 1 1339 3 is_stmt 1 view .LVU1486 +1339:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 4667 .loc 1 1339 26 is_stmt 0 view .LVU1487 + 4668 00a0 0723 movs r3, #7 + 4669 00a2 1193 str r3, [sp, #68] +1340:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); + 4670 .loc 1 1340 3 is_stmt 1 view .LVU1488 + 4671 00a4 094C ldr r4, .L270+8 + 4672 00a6 08A9 add r1, sp, #32 + 4673 00a8 2046 mov r0, r4 + 4674 00aa FFF7FEFF bl LL_SPI_Init + 4675 .LVL467: +1341:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); + 4676 .loc 1 1341 3 view .LVU1489 + 4677 .LBB459: + 4678 .LBI459: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4679 .loc 4 426 22 view .LVU1490 + 4680 .LBB460: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4681 .loc 4 428 3 view .LVU1491 + 4682 00ae 6368 ldr r3, [r4, #4] + 4683 00b0 23F01003 bic r3, r3, #16 + 4684 00b4 6360 str r3, [r4, #4] + 4685 .LVL468: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4686 .loc 4 428 3 is_stmt 0 view .LVU1492 + 4687 .LBE460: + 4688 .LBE459: +1342:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ + 4689 .loc 1 1342 3 is_stmt 1 view .LVU1493 + 4690 .LBB461: + 4691 .LBI461: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4692 .loc 4 874 22 view .LVU1494 + 4693 .LBB462: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4694 .loc 4 876 3 view .LVU1495 + 4695 00b6 6368 ldr r3, [r4, #4] + 4696 00b8 23F00803 bic r3, r3, #8 + 4697 00bc 6360 str r3, [r4, #4] + 4698 .LVL469: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4699 .loc 4 876 3 is_stmt 0 view .LVU1496 + 4700 .LBE462: + 4701 .LBE461: +1347:Src/main.c **** + 4702 .loc 1 1347 1 view .LVU1497 + 4703 00be 12B0 add sp, sp, #72 + 4704 .LCFI46: + 4705 .cfi_def_cfa_offset 24 + 4706 @ sp needed + 4707 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + ARM GAS /tmp/ccwR4KB7.s page 252 + + + 4708 .L271: + 4709 .align 2 + 4710 .L270: + 4711 00c4 00380240 .word 1073887232 + 4712 00c8 00140240 .word 1073878016 + 4713 00cc 00500140 .word 1073827840 + 4714 .cfi_endproc + 4715 .LFE1193: + 4717 .section .text.MX_SPI6_Init,"ax",%progbits + 4718 .align 1 + 4719 .syntax unified + 4720 .thumb + 4721 .thumb_func + 4723 MX_SPI6_Init: + 4724 .LFB1194: +1355:Src/main.c **** + 4725 .loc 1 1355 1 is_stmt 1 view -0 + 4726 .cfi_startproc + 4727 @ args = 0, pretend = 0, frame = 72 + 4728 @ frame_needed = 0, uses_anonymous_args = 0 + 4729 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 4730 .LCFI47: + 4731 .cfi_def_cfa_offset 24 + 4732 .cfi_offset 4, -24 + 4733 .cfi_offset 5, -20 + 4734 .cfi_offset 6, -16 + 4735 .cfi_offset 7, -12 + 4736 .cfi_offset 8, -8 + 4737 .cfi_offset 14, -4 + 4738 0004 92B0 sub sp, sp, #72 + 4739 .LCFI48: + 4740 .cfi_def_cfa_offset 96 +1361:Src/main.c **** + 4741 .loc 1 1361 3 view .LVU1499 +1361:Src/main.c **** + 4742 .loc 1 1361 22 is_stmt 0 view .LVU1500 + 4743 0006 2822 movs r2, #40 + 4744 0008 0021 movs r1, #0 + 4745 000a 08A8 add r0, sp, #32 + 4746 000c FFF7FEFF bl memset + 4747 .LVL470: +1363:Src/main.c **** + 4748 .loc 1 1363 3 is_stmt 1 view .LVU1501 +1363:Src/main.c **** + 4749 .loc 1 1363 23 is_stmt 0 view .LVU1502 + 4750 0010 0024 movs r4, #0 + 4751 0012 0294 str r4, [sp, #8] + 4752 0014 0394 str r4, [sp, #12] + 4753 0016 0494 str r4, [sp, #16] + 4754 0018 0594 str r4, [sp, #20] + 4755 001a 0694 str r4, [sp, #24] + 4756 001c 0794 str r4, [sp, #28] +1366:Src/main.c **** + 4757 .loc 1 1366 3 is_stmt 1 view .LVU1503 + 4758 .LVL471: + 4759 .LBB463: + 4760 .LBI463: + ARM GAS /tmp/ccwR4KB7.s page 253 + + +1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 4761 .loc 3 1587 22 view .LVU1504 + 4762 .LBB464: +1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); + 4763 .loc 3 1589 3 view .LVU1505 +1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 4764 .loc 3 1590 3 view .LVU1506 + 4765 001e 294B ldr r3, .L274 + 4766 0020 5A6C ldr r2, [r3, #68] + 4767 0022 42F40012 orr r2, r2, #2097152 + 4768 0026 5A64 str r2, [r3, #68] +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4769 .loc 3 1592 3 view .LVU1507 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4770 .loc 3 1592 12 is_stmt 0 view .LVU1508 + 4771 0028 5A6C ldr r2, [r3, #68] + 4772 002a 02F40012 and r2, r2, #2097152 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4773 .loc 3 1592 10 view .LVU1509 + 4774 002e 0192 str r2, [sp, #4] + 4775 .loc 3 1593 3 is_stmt 1 view .LVU1510 + 4776 0030 019A ldr r2, [sp, #4] + 4777 .LVL472: + 4778 .loc 3 1593 3 is_stmt 0 view .LVU1511 + 4779 .LBE464: + 4780 .LBE463: +1368:Src/main.c **** /**SPI6 GPIO Configuration + 4781 .loc 1 1368 3 is_stmt 1 view .LVU1512 + 4782 .LBB465: + 4783 .LBI465: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 4784 .loc 3 309 22 view .LVU1513 + 4785 .LBB466: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 4786 .loc 3 311 3 view .LVU1514 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 4787 .loc 3 312 3 view .LVU1515 + 4788 0032 1A6B ldr r2, [r3, #48] + 4789 0034 42F00102 orr r2, r2, #1 + 4790 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4791 .loc 3 314 3 view .LVU1516 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4792 .loc 3 314 12 is_stmt 0 view .LVU1517 + 4793 003a 1B6B ldr r3, [r3, #48] + 4794 003c 03F00103 and r3, r3, #1 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4795 .loc 3 314 10 view .LVU1518 + 4796 0040 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4797 .loc 3 315 3 is_stmt 1 view .LVU1519 + 4798 0042 009B ldr r3, [sp] + 4799 .LVL473: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4800 .loc 3 315 3 is_stmt 0 view .LVU1520 + 4801 .LBE466: + 4802 .LBE465: + ARM GAS /tmp/ccwR4KB7.s page 254 + + +1373:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4803 .loc 1 1373 3 is_stmt 1 view .LVU1521 +1373:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4804 .loc 1 1373 23 is_stmt 0 view .LVU1522 + 4805 0044 2023 movs r3, #32 + 4806 0046 0293 str r3, [sp, #8] +1374:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4807 .loc 1 1374 3 is_stmt 1 view .LVU1523 +1374:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4808 .loc 1 1374 24 is_stmt 0 view .LVU1524 + 4809 0048 0225 movs r5, #2 + 4810 004a 0395 str r5, [sp, #12] +1375:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4811 .loc 1 1375 3 is_stmt 1 view .LVU1525 +1375:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4812 .loc 1 1375 25 is_stmt 0 view .LVU1526 + 4813 004c 4FF00308 mov r8, #3 + 4814 0050 CDF81080 str r8, [sp, #16] +1376:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4815 .loc 1 1376 3 is_stmt 1 view .LVU1527 +1377:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 4816 .loc 1 1377 3 view .LVU1528 +1378:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4817 .loc 1 1378 3 view .LVU1529 +1378:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4818 .loc 1 1378 29 is_stmt 0 view .LVU1530 + 4819 0054 0827 movs r7, #8 + 4820 0056 0797 str r7, [sp, #28] +1379:Src/main.c **** + 4821 .loc 1 1379 3 is_stmt 1 view .LVU1531 + 4822 0058 1B4E ldr r6, .L274+4 + 4823 005a 0DEB0701 add r1, sp, r7 + 4824 005e 3046 mov r0, r6 + 4825 0060 FFF7FEFF bl LL_GPIO_Init + 4826 .LVL474: +1381:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4827 .loc 1 1381 3 view .LVU1532 +1381:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4828 .loc 1 1381 23 is_stmt 0 view .LVU1533 + 4829 0064 8023 movs r3, #128 + 4830 0066 0293 str r3, [sp, #8] +1382:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4831 .loc 1 1382 3 is_stmt 1 view .LVU1534 +1382:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4832 .loc 1 1382 24 is_stmt 0 view .LVU1535 + 4833 0068 0395 str r5, [sp, #12] +1383:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4834 .loc 1 1383 3 is_stmt 1 view .LVU1536 +1383:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4835 .loc 1 1383 25 is_stmt 0 view .LVU1537 + 4836 006a CDF81080 str r8, [sp, #16] +1384:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4837 .loc 1 1384 3 is_stmt 1 view .LVU1538 +1384:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4838 .loc 1 1384 30 is_stmt 0 view .LVU1539 + 4839 006e 0594 str r4, [sp, #20] +1385:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + ARM GAS /tmp/ccwR4KB7.s page 255 + + + 4840 .loc 1 1385 3 is_stmt 1 view .LVU1540 +1385:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 4841 .loc 1 1385 24 is_stmt 0 view .LVU1541 + 4842 0070 0694 str r4, [sp, #24] +1386:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4843 .loc 1 1386 3 is_stmt 1 view .LVU1542 +1386:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4844 .loc 1 1386 29 is_stmt 0 view .LVU1543 + 4845 0072 0797 str r7, [sp, #28] +1387:Src/main.c **** + 4846 .loc 1 1387 3 is_stmt 1 view .LVU1544 + 4847 0074 0DEB0701 add r1, sp, r7 + 4848 0078 3046 mov r0, r6 + 4849 007a FFF7FEFF bl LL_GPIO_Init + 4850 .LVL475: +1393:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4851 .loc 1 1393 3 view .LVU1545 +1393:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4852 .loc 1 1393 36 is_stmt 0 view .LVU1546 + 4853 007e 0894 str r4, [sp, #32] +1394:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4854 .loc 1 1394 3 is_stmt 1 view .LVU1547 +1394:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4855 .loc 1 1394 23 is_stmt 0 view .LVU1548 + 4856 0080 4FF48273 mov r3, #260 + 4857 0084 0993 str r3, [sp, #36] +1395:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4858 .loc 1 1395 3 is_stmt 1 view .LVU1549 +1395:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4859 .loc 1 1395 28 is_stmt 0 view .LVU1550 + 4860 0086 4FF47063 mov r3, #3840 + 4861 008a 0A93 str r3, [sp, #40] +1396:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 4862 .loc 1 1396 3 is_stmt 1 view .LVU1551 +1396:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 4863 .loc 1 1396 32 is_stmt 0 view .LVU1552 + 4864 008c 0B95 str r5, [sp, #44] +1397:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4865 .loc 1 1397 3 is_stmt 1 view .LVU1553 +1397:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4866 .loc 1 1397 29 is_stmt 0 view .LVU1554 + 4867 008e 0123 movs r3, #1 + 4868 0090 0C93 str r3, [sp, #48] +1398:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4869 .loc 1 1398 3 is_stmt 1 view .LVU1555 +1398:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4870 .loc 1 1398 22 is_stmt 0 view .LVU1556 + 4871 0092 4FF40073 mov r3, #512 + 4872 0096 0D93 str r3, [sp, #52] +1399:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4873 .loc 1 1399 3 is_stmt 1 view .LVU1557 +1399:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4874 .loc 1 1399 27 is_stmt 0 view .LVU1558 + 4875 0098 1823 movs r3, #24 + 4876 009a 0E93 str r3, [sp, #56] +1400:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4877 .loc 1 1400 3 is_stmt 1 view .LVU1559 + ARM GAS /tmp/ccwR4KB7.s page 256 + + +1400:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4878 .loc 1 1400 27 is_stmt 0 view .LVU1560 + 4879 009c 0F94 str r4, [sp, #60] +1401:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4880 .loc 1 1401 3 is_stmt 1 view .LVU1561 +1401:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4881 .loc 1 1401 33 is_stmt 0 view .LVU1562 + 4882 009e 1094 str r4, [sp, #64] +1402:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 4883 .loc 1 1402 3 is_stmt 1 view .LVU1563 +1402:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 4884 .loc 1 1402 26 is_stmt 0 view .LVU1564 + 4885 00a0 0723 movs r3, #7 + 4886 00a2 1193 str r3, [sp, #68] +1403:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); + 4887 .loc 1 1403 3 is_stmt 1 view .LVU1565 + 4888 00a4 094C ldr r4, .L274+8 + 4889 00a6 08A9 add r1, sp, #32 + 4890 00a8 2046 mov r0, r4 + 4891 00aa FFF7FEFF bl LL_SPI_Init + 4892 .LVL476: +1404:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); + 4893 .loc 1 1404 3 view .LVU1566 + 4894 .LBB467: + 4895 .LBI467: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4896 .loc 4 426 22 view .LVU1567 + 4897 .LBB468: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4898 .loc 4 428 3 view .LVU1568 + 4899 00ae 6368 ldr r3, [r4, #4] + 4900 00b0 23F01003 bic r3, r3, #16 + 4901 00b4 6360 str r3, [r4, #4] + 4902 .LVL477: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4903 .loc 4 428 3 is_stmt 0 view .LVU1569 + 4904 .LBE468: + 4905 .LBE467: +1405:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ + 4906 .loc 1 1405 3 is_stmt 1 view .LVU1570 + 4907 .LBB469: + 4908 .LBI469: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4909 .loc 4 874 22 view .LVU1571 + 4910 .LBB470: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4911 .loc 4 876 3 view .LVU1572 + 4912 00b6 6368 ldr r3, [r4, #4] + 4913 00b8 23F00803 bic r3, r3, #8 + 4914 00bc 6360 str r3, [r4, #4] + 4915 .LVL478: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4916 .loc 4 876 3 is_stmt 0 view .LVU1573 + 4917 .LBE470: + 4918 .LBE469: +1410:Src/main.c **** + 4919 .loc 1 1410 1 view .LVU1574 + ARM GAS /tmp/ccwR4KB7.s page 257 + + + 4920 00be 12B0 add sp, sp, #72 + 4921 .LCFI49: + 4922 .cfi_def_cfa_offset 24 + 4923 @ sp needed + 4924 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 4925 .L275: + 4926 .align 2 + 4927 .L274: + 4928 00c4 00380240 .word 1073887232 + 4929 00c8 00000240 .word 1073872896 + 4930 00cc 00540140 .word 1073828864 + 4931 .cfi_endproc + 4932 .LFE1194: + 4934 .section .text.MX_TIM2_Init,"ax",%progbits + 4935 .align 1 + 4936 .syntax unified + 4937 .thumb + 4938 .thumb_func + 4940 MX_TIM2_Init: + 4941 .LFB1195: +1418:Src/main.c **** + 4942 .loc 1 1418 1 is_stmt 1 view -0 + 4943 .cfi_startproc + 4944 @ args = 0, pretend = 0, frame = 24 + 4945 @ frame_needed = 0, uses_anonymous_args = 0 + 4946 0000 10B5 push {r4, lr} + 4947 .LCFI50: + 4948 .cfi_def_cfa_offset 8 + 4949 .cfi_offset 4, -8 + 4950 .cfi_offset 14, -4 + 4951 0002 86B0 sub sp, sp, #24 + 4952 .LCFI51: + 4953 .cfi_def_cfa_offset 32 +1424:Src/main.c **** + 4954 .loc 1 1424 3 view .LVU1576 +1424:Src/main.c **** + 4955 .loc 1 1424 22 is_stmt 0 view .LVU1577 + 4956 0004 0024 movs r4, #0 + 4957 0006 0194 str r4, [sp, #4] + 4958 0008 0294 str r4, [sp, #8] + 4959 000a 0394 str r4, [sp, #12] + 4960 000c 0494 str r4, [sp, #16] + 4961 000e 0594 str r4, [sp, #20] +1427:Src/main.c **** + 4962 .loc 1 1427 3 is_stmt 1 view .LVU1578 + 4963 .LVL479: + 4964 .LBB471: + 4965 .LBI471: +1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 4966 .loc 3 1071 22 view .LVU1579 + 4967 .LBB472: +1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); + 4968 .loc 3 1073 3 view .LVU1580 +1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 4969 .loc 3 1074 3 view .LVU1581 + 4970 0010 1D4B ldr r3, .L278 + 4971 0012 1A6C ldr r2, [r3, #64] + ARM GAS /tmp/ccwR4KB7.s page 258 + + + 4972 0014 42F00102 orr r2, r2, #1 + 4973 0018 1A64 str r2, [r3, #64] +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4974 .loc 3 1076 3 view .LVU1582 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4975 .loc 3 1076 12 is_stmt 0 view .LVU1583 + 4976 001a 1B6C ldr r3, [r3, #64] + 4977 001c 03F00103 and r3, r3, #1 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4978 .loc 3 1076 10 view .LVU1584 + 4979 0020 0093 str r3, [sp] +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4980 .loc 3 1077 3 is_stmt 1 view .LVU1585 + 4981 0022 009B ldr r3, [sp] + 4982 .LVL480: +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4983 .loc 3 1077 3 is_stmt 0 view .LVU1586 + 4984 .LBE472: + 4985 .LBE471: +1430:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 4986 .loc 1 1430 3 is_stmt 1 view .LVU1587 + 4987 .LBB473: + 4988 .LBI473: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 4161 .loc 2 1884 26 view .LVU1344 - 4162 .LBB458: + 4989 .loc 2 1884 26 view .LVU1588 + 4990 .LBB474: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4163 .loc 2 1886 3 view .LVU1345 + 4991 .loc 2 1886 3 view .LVU1589 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4164 .loc 2 1886 26 is_stmt 0 view .LVU1346 - 4165 0024 194B ldr r3, .L199+4 - 4166 0026 D868 ldr r0, [r3, #12] - 4167 .LBE458: - 4168 .LBE457: - ARM GAS /tmp/ccYgfTud.s page 235 - - -1380:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 4169 .loc 1 1380 3 discriminator 1 view .LVU1347 - 4170 0028 2246 mov r2, r4 - 4171 002a 2146 mov r1, r4 - 4172 002c C0F30220 ubfx r0, r0, #8, #3 - 4173 0030 FFF7FEFF bl NVIC_EncodePriority - 4174 .LVL363: - 4175 .LBB459: - 4176 .LBI459: + 4992 .loc 2 1886 26 is_stmt 0 view .LVU1590 + 4993 0024 194B ldr r3, .L278+4 + 4994 0026 D868 ldr r0, [r3, #12] + 4995 .LBE474: + 4996 .LBE473: +1430:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 4997 .loc 1 1430 3 discriminator 1 view .LVU1591 + 4998 0028 2246 mov r2, r4 + 4999 002a 2146 mov r1, r4 + 5000 002c C0F30220 ubfx r0, r0, #8, #3 + 5001 0030 FFF7FEFF bl NVIC_EncodePriority + 5002 .LVL481: + 5003 .LBB475: + 5004 .LBI475: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 4177 .loc 2 2024 22 is_stmt 1 view .LVU1348 - 4178 .LBB460: + 5005 .loc 2 2024 22 is_stmt 1 view .LVU1592 + 5006 .LBB476: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 4179 .loc 2 2026 3 view .LVU1349 + 5007 .loc 2 2026 3 view .LVU1593 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4180 .loc 2 2028 5 view .LVU1350 + 5008 .loc 2 2028 5 view .LVU1594 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4181 .loc 2 2028 49 is_stmt 0 view .LVU1351 - 4182 0034 0001 lsls r0, r0, #4 - 4183 .LVL364: + 5009 .loc 2 2028 49 is_stmt 0 view .LVU1595 + 5010 0034 0001 lsls r0, r0, #4 + 5011 .LVL482: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4184 .loc 2 2028 49 view .LVU1352 - 4185 0036 C0B2 uxtb r0, r0 + 5012 .loc 2 2028 49 view .LVU1596 + 5013 0036 C0B2 uxtb r0, r0 + ARM GAS /tmp/ccwR4KB7.s page 259 + + 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4186 .loc 2 2028 47 view .LVU1353 - 4187 0038 154B ldr r3, .L199+8 - 4188 003a 83F81C03 strb r0, [r3, #796] - 4189 .LVL365: + 5014 .loc 2 2028 47 view .LVU1597 + 5015 0038 154B ldr r3, .L278+8 + 5016 003a 83F81C03 strb r0, [r3, #796] + 5017 .LVL483: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4190 .loc 2 2028 47 view .LVU1354 - 4191 .LBE460: - 4192 .LBE459: -1381:Src/main.c **** - 4193 .loc 1 1381 3 is_stmt 1 view .LVU1355 - 4194 .LBB461: - 4195 .LBI461: + 5018 .loc 2 2028 47 view .LVU1598 + 5019 .LBE476: + 5020 .LBE475: +1431:Src/main.c **** + 5021 .loc 1 1431 3 is_stmt 1 view .LVU1599 + 5022 .LBB477: + 5023 .LBI477: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 4196 .loc 2 1896 22 view .LVU1356 - 4197 .LBB462: + 5024 .loc 2 1896 22 view .LVU1600 + 5025 .LBB478: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 4198 .loc 2 1898 3 view .LVU1357 + 5026 .loc 2 1898 3 view .LVU1601 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4199 .loc 2 1900 5 view .LVU1358 + 5027 .loc 2 1900 5 view .LVU1602 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4200 .loc 2 1900 43 is_stmt 0 view .LVU1359 - 4201 003e 4FF08052 mov r2, #268435456 - 4202 0042 1A60 str r2, [r3] - 4203 .LVL366: + 5028 .loc 2 1900 43 is_stmt 0 view .LVU1603 + 5029 003e 4FF08052 mov r2, #268435456 + 5030 0042 1A60 str r2, [r3] + 5031 .LVL484: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4204 .loc 2 1900 43 view .LVU1360 - 4205 .LBE462: - 4206 .LBE461: -1386:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4207 .loc 1 1386 3 is_stmt 1 view .LVU1361 -1386:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4208 .loc 1 1386 28 is_stmt 0 view .LVU1362 - 4209 0044 4FF47A73 mov r3, #1000 - ARM GAS /tmp/ccYgfTud.s page 236 + 5032 .loc 2 1900 43 view .LVU1604 + 5033 .LBE478: + 5034 .LBE477: +1436:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5035 .loc 1 1436 3 is_stmt 1 view .LVU1605 +1436:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5036 .loc 1 1436 28 is_stmt 0 view .LVU1606 + 5037 0044 4FF47A73 mov r3, #1000 + 5038 0048 ADF80430 strh r3, [sp, #4] @ movhi +1437:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 5039 .loc 1 1437 3 is_stmt 1 view .LVU1607 +1437:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 5040 .loc 1 1437 30 is_stmt 0 view .LVU1608 + 5041 004c 0294 str r4, [sp, #8] +1438:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5042 .loc 1 1438 3 is_stmt 1 view .LVU1609 +1438:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5043 .loc 1 1438 29 is_stmt 0 view .LVU1610 + 5044 004e 114B ldr r3, .L278+12 + 5045 0050 0393 str r3, [sp, #12] +1439:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 5046 .loc 1 1439 3 is_stmt 1 view .LVU1611 +1439:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 5047 .loc 1 1439 32 is_stmt 0 view .LVU1612 + 5048 0052 0494 str r4, [sp, #16] +1440:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); + 5049 .loc 1 1440 3 is_stmt 1 view .LVU1613 + 5050 0054 01A9 add r1, sp, #4 + 5051 0056 4FF08040 mov r0, #1073741824 + 5052 005a FFF7FEFF bl LL_TIM_Init + 5053 .LVL485: + ARM GAS /tmp/ccwR4KB7.s page 260 - 4210 0048 ADF80430 strh r3, [sp, #4] @ movhi -1387:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 4211 .loc 1 1387 3 is_stmt 1 view .LVU1363 -1387:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 4212 .loc 1 1387 30 is_stmt 0 view .LVU1364 - 4213 004c 0294 str r4, [sp, #8] -1388:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 4214 .loc 1 1388 3 is_stmt 1 view .LVU1365 -1388:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 4215 .loc 1 1388 29 is_stmt 0 view .LVU1366 - 4216 004e 114B ldr r3, .L199+12 - 4217 0050 0393 str r3, [sp, #12] -1389:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 4218 .loc 1 1389 3 is_stmt 1 view .LVU1367 -1389:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 4219 .loc 1 1389 32 is_stmt 0 view .LVU1368 - 4220 0052 0494 str r4, [sp, #16] -1390:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); - 4221 .loc 1 1390 3 is_stmt 1 view .LVU1369 - 4222 0054 01A9 add r1, sp, #4 - 4223 0056 4FF08040 mov r0, #1073741824 - 4224 005a FFF7FEFF bl LL_TIM_Init - 4225 .LVL367: -1391:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); - 4226 .loc 1 1391 3 view .LVU1370 - 4227 .LBB463: - 4228 .LBI463: - 4229 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" +1441:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); + 5054 .loc 1 1441 3 view .LVU1614 + 5055 .LBB479: + 5056 .LBI479: + 5057 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h @@ -14158,9 +15575,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #include "stm32f7xx.h" 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 237 - - 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -14184,6 +15598,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 3: TIMx_CH2N */ 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 4: TIMx_CH3 */ 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 5: TIMx_CH3N */ + ARM GAS /tmp/ccwR4KB7.s page 261 + + 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 6: TIMx_CH4 */ 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU, /* 7: TIMx_CH5 */ 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU /* 8: TIMx_CH6 */ @@ -14218,9 +15635,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_CCxP[] = 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: CC1P */ - ARM GAS /tmp/ccYgfTud.s page 238 - - 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2U, /* 1: CC1NP */ 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4U, /* 2: CC2P */ 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 3: CC2NP */ @@ -14244,6 +15658,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 10U /* 8: OIS6 */ 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }; 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 262 + + 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14278,9 +15695,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_2 ((uint8_t)0x80) 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_3 ((uint8_t)0xC0) 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_4 ((uint8_t)0xE0) - ARM GAS /tmp/ccYgfTud.s page 239 - - 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -14304,6 +15718,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 263 + + 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \ 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\ 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\ @@ -14338,9 +15755,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccYgfTud.s page 240 - - 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Time Base configuration structure definition. 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct @@ -14364,6 +15778,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** be a number between 0x0000 and 0xFFFFFFFF. 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function + ARM GAS /tmp/ccwR4KB7.s page 264 + + 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetAutoReload().*/ 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division. @@ -14398,9 +15815,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetMode().*/ 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 241 - - 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCState; /*!< Specifies the TIM Output Compare state. 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE. 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14424,6 +15838,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/ + ARM GAS /tmp/ccwR4KB7.s page 265 + + 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. @@ -14458,9 +15875,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 242 - - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICActiveInput; /*!< Specifies the input. 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14484,6 +15898,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Encoder interface configuration structure definition. 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 266 + + 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). @@ -14518,9 +15935,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - ARM GAS /tmp/ccYgfTud.s page 243 - - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ @@ -14544,6 +15958,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/ 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_ENCODER_InitTypeDef; + ARM GAS /tmp/ccwR4KB7.s page 267 + + 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Hall sensor interface configuration structure definition. @@ -14578,9 +15995,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x0000 and Ma 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function - ARM GAS /tmp/ccYgfTud.s page 244 - - 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetCompareCH2().*/ 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_HALLSENSOR_InitTypeDef; 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14604,6 +16018,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetOffStates() 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccwR4KB7.s page 268 + + 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14638,9 +16055,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK() 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 245 - - 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14664,6 +16078,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Polarity; /*!< Specifies the TIM Break2 Input pin polarity. 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_POLARI + ARM GAS /tmp/ccwR4KB7.s page 269 + + 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2() @@ -14698,9 +16115,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported constants --------------------------------------------------------*/ 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Constants TIM Exported Constants 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ - ARM GAS /tmp/ccYgfTud.s page 246 - - 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines @@ -14724,6 +16138,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapt 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_SBIF TIM_SR_SBIF /*!< System Break interrupt fla 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 270 + + 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14758,9 +16175,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IT IT Defines 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions. - ARM GAS /tmp/ccYgfTud.s page 247 - - 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ @@ -14784,6 +16198,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccwR4KB7.s page 271 + + 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -14818,9 +16235,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccYgfTud.s page 248 - - 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_UP 0x00000000U /*!< Timer counter counts up */ 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR /*!< Timer counter counts down 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -14844,6 +16258,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 272 + + 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -14878,9 +16295,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_DISABLE 0x00000000U /*!< OCx is not active */ 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on - ARM GAS /tmp/ccYgfTud.s page 249 - - 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -14904,6 +16318,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) + ARM GAS /tmp/ccwR4KB7.s page 273 + + 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3 @@ -14938,9 +16355,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_NONE 0x00000000U /*!< No effect of OC5REF on OC - ARM GAS /tmp/ccYgfTud.s page 250 - - 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_OC1REFC TIM_CCR5_GC5C1 /*!< OC1REFC is the logical AN 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_OC2REFC TIM_CCR5_GC5C2 /*!< OC2REFC is the logical AN 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_OC3REFC TIM_CCR5_GC5C3 /*!< OC3REFC is the logical AN @@ -14964,6 +16378,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV1 0x00000000U /*!< No prescaler, ca 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0 << 16U) /*!< Capture is done 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1 << 16U) /*!< Capture is done + ARM GAS /tmp/ccwR4KB7.s page 274 + + 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC << 16U) /*!< Capture is done 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -14998,9 +16415,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_POLARITY_RISING 0x00000000U /*!< The circuit is 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is - ARM GAS /tmp/ccYgfTud.s page 251 - - 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -15024,6 +16438,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 275 + + 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO Trigger Output 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -15058,9 +16475,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC4_RISING_OC6_RISING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2) 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC4_RISING_OC6_FALLING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0) 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC5_RISING_OC6_RISING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1) - ARM GAS /tmp/ccYgfTud.s page 252 - - 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC5_RISING_OC6_FALLING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -15084,6 +16498,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR0 0x00000000U 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR1 TIM_SMCR_TS_0 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR2 TIM_SMCR_TS_1 + ARM GAS /tmp/ccwR4KB7.s page 276 + + 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 | TIM_SMCR_TS_0) @@ -15118,9 +16535,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1 0x00000000U 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1_N2 TIM_SMCR_ETF_0 - ARM GAS /tmp/ccYgfTud.s page 253 - - 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1_N4 TIM_SMCR_ETF_1 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1_N8 (TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV2_N6 TIM_SMCR_ETF_2 @@ -15144,6 +16558,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_POLARITY_LOW 0x00000000U /*!< Break input BRK is ac + ARM GAS /tmp/ccwR4KB7.s page 277 + + 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_POLARITY_HIGH TIM_BDTR_BKP /*!< Break input BRK is ac 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -15178,9 +16595,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_POLARITY_LOW 0x00000000U /*!< Break input BRK2 is act 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_POLARITY_HIGH TIM_BDTR_BK2P /*!< Break input BRK2 is act 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccYgfTud.s page 254 - - 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15204,6 +16618,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N6 0x00E00000U /*!< fSAMPLING=fDTS/32, N=6 */ 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N8 0x00F00000U /*!< fSAMPLING=fDTS/32, N=8 */ 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 278 + + 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15238,9 +16655,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BKIN_SOURCE BKIN SOURCE 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccYgfTud.s page 255 - - 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_SOURCE_BKIN TIM1_AF1_BKINE /*!< BKIN input from AF controll 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_SOURCE_DF1BK TIM1_AF1_BKDF1BKE /*!< internal signal: DFSDM1 bre 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -15264,6 +16678,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_SMCR TIM_DCR_DBA_1 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 | TIM_DCR_DBA_0) + ARM GAS /tmp/ccwR4KB7.s page 279 + + 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) @@ -15298,9 +16715,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_3TRANSFERS TIM_DCR_DBL_1 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_4TRANSFERS (TIM_DCR_DBL_1 | TIM_DCR_DBL_0) 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_5TRANSFERS TIM_DCR_DBL_2 - ARM GAS /tmp/ccYgfTud.s page 256 - - 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_6TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_0) 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_7TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_1) 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_8TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0) @@ -15324,6 +16738,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO TIM2_OR_RMP_MASK /*!< TIM2_ITR1 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_ETH_PTP (TIM2_OR_ITR1_RMP_0 | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1 + ARM GAS /tmp/ccwR4KB7.s page 280 + + 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF (TIM2_OR_ITR1_RMP_1 | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF (TIM2_OR_ITR1_RMP | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -15358,9 +16775,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported macro ------------------------------------------------------------*/ - ARM GAS /tmp/ccYgfTud.s page 257 - - 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Macros TIM Exported Macros 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -15384,6 +16798,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Register value 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) + ARM GAS /tmp/ccwR4KB7.s page 281 + + 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -15418,9 +16835,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__C 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC - ARM GAS /tmp/ccYgfTud.s page 258 - - 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__ 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC @@ -15444,6 +16858,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __FREQ__ output signal frequency (in Hz) 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) + ARM GAS /tmp/ccwR4KB7.s page 282 + + 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) @@ -15478,9 +16895,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the ratio of the input capture prescaler 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ()); - ARM GAS /tmp/ccYgfTud.s page 259 - - 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __ICPSC__ This parameter can be one of the following values: 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 @@ -15504,6 +16918,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 283 + + 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable timer counter. 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter @@ -15538,9 +16955,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccYgfTud.s page 260 - - 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable update event generation. 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -15564,6 +16978,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether update event generation is enabled. + ARM GAS /tmp/ccwR4KB7.s page 284 + + 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Inverted state of bit (0 or 1). @@ -15598,9 +17015,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual event update source 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_GetUpdateSource 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccYgfTud.s page 261 - - 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER @@ -15624,6 +17038,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccwR4KB7.s page 285 + + 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual one pulse mode. 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode @@ -15658,9 +17075,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccYgfTud.s page 262 - - 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode); 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15684,6 +17098,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t counter_mode; 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS)); + ARM GAS /tmp/ccwR4KB7.s page 286 + + 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** if (counter_mode == 0U) 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15711,26 +17128,23 @@ ARM GAS /tmp/ccYgfTud.s page 1 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) - 4230 .loc 5 1504 22 view .LVU1371 - 4231 .LBB464: + 5058 .loc 5 1504 22 view .LVU1615 + 5059 .LBB480: 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); - 4232 .loc 5 1506 3 view .LVU1372 - 4233 005e 4FF08043 mov r3, #1073741824 - 4234 0062 1A68 ldr r2, [r3] - ARM GAS /tmp/ccYgfTud.s page 263 - - - 4235 0064 22F08002 bic r2, r2, #128 - 4236 0068 1A60 str r2, [r3] - 4237 .LVL368: - 4238 .loc 5 1506 3 is_stmt 0 view .LVU1373 - 4239 .LBE464: - 4240 .LBE463: -1392:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - 4241 .loc 1 1392 3 is_stmt 1 view .LVU1374 - 4242 .LBB465: - 4243 .LBI465: + 5060 .loc 5 1506 3 view .LVU1616 + 5061 005e 4FF08043 mov r3, #1073741824 + 5062 0062 1A68 ldr r2, [r3] + 5063 0064 22F08002 bic r2, r2, #128 + 5064 0068 1A60 str r2, [r3] + 5065 .LVL486: + 5066 .loc 5 1506 3 is_stmt 0 view .LVU1617 + 5067 .LBE480: + 5068 .LBE479: +1442:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + 5069 .loc 1 1442 3 is_stmt 1 view .LVU1618 + 5070 .LBB481: + 5071 .LBI481: 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -15744,6 +17158,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccwR4KB7.s page 287 + + 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when supported) and the digital filters. @@ -15778,9 +17195,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx) 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccYgfTud.s page 264 - - 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15804,6 +17218,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_GetCounter 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccwR4KB7.s page 288 + + 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF) 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) @@ -15838,9 +17255,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) 1609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->PSC, Prescaler); - ARM GAS /tmp/ccYgfTud.s page 265 - - 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -15864,6 +17278,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param AutoReload between Min_Data=0 and Max_Data=65535 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccwR4KB7.s page 289 + + 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15898,9 +17315,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->RCR, RepetitionCounter); 1666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 266 - - 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the repetition counter value. 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check @@ -15924,6 +17338,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx) 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccwR4KB7.s page 290 + + 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15958,9 +17375,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload. 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written, - ARM GAS /tmp/ccYgfTud.s page 267 - - 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * they are updated only when a commutation event (COM) occurs. 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Only on channels that have a complementary output. 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check @@ -15984,6 +17398,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx) 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccwR4KB7.s page 291 + + 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC); 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -16018,9 +17435,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request. 1780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccYgfTud.s page 268 - - 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMAReqTrigger This parameter can be one of the following values: 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE @@ -16044,6 +17458,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccwR4KB7.s page 292 + + 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the lock level to freeze the 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * configuration of several capture/compare parameters. @@ -16078,9 +17495,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N - ARM GAS /tmp/ccYgfTud.s page 269 - - 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 @@ -16104,6 +17518,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_DisableChannel\n 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_DisableChannel\n 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_DisableChannel\n + ARM GAS /tmp/ccwR4KB7.s page 293 + + 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_DisableChannel\n 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_DisableChannel 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -16138,9 +17555,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 - ARM GAS /tmp/ccYgfTud.s page 270 - - 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N @@ -16164,6 +17578,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 294 + + 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure an output channel. 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n @@ -16198,9 +17615,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccYgfTud.s page 271 - - 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); @@ -16224,6 +17638,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccwR4KB7.s page 295 + + 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -16258,9 +17675,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n 2008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_GetMode\n 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5M LL_TIM_OC_GetMode\n - ARM GAS /tmp/ccYgfTud.s page 272 - - 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6M LL_TIM_OC_GetMode 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: @@ -16284,6 +17698,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1 + ARM GAS /tmp/ccwR4KB7.s page 296 + + 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) @@ -16318,9 +17735,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values: 2065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW - ARM GAS /tmp/ccYgfTud.s page 273 - - 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) @@ -16344,6 +17758,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N + ARM GAS /tmp/ccwR4KB7.s page 297 + + 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 @@ -16378,9 +17795,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_SetIdleState 2122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: - ARM GAS /tmp/ccYgfTud.s page 274 - - 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -16404,6 +17818,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the IDLE state of an output channel 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n + ARM GAS /tmp/ccwR4KB7.s page 298 + + 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_GetIdleState\n 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n @@ -16438,9 +17855,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode. 2179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_EnableFast\n - ARM GAS /tmp/ccYgfTud.s page 275 - - 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_EnableFast\n 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_EnableFast\n 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_EnableFast\n @@ -16464,6 +17878,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 299 + + 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable fast mode for the output channel. 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n @@ -16498,9 +17915,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n 2236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_IsEnabledFast 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccYgfTud.s page 276 - - 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -16524,6 +17938,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_EnablePreload\n 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_EnablePreload\n 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_EnablePreload\n + ARM GAS /tmp/ccwR4KB7.s page 300 + + 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_EnablePreload\n 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_EnablePreload 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -16558,9 +17975,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/ccYgfTud.s page 277 - - 2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -16584,6 +17998,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccwR4KB7.s page 301 + + 2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -16618,9 +18035,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccYgfTud.s page 278 - - 2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) 2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -16644,6 +18058,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 + ARM GAS /tmp/ccwR4KB7.s page 302 + + 2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -16678,9 +18095,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel) - ARM GAS /tmp/ccYgfTud.s page 279 - - 2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC @@ -16704,6 +18118,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); 2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccwR4KB7.s page 303 + + 2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1). 2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. @@ -16738,9 +18155,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR2, CompareValue); 2464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 280 - - 2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 3 (TIMx_CCR3). 2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. @@ -16764,6 +18178,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not + ARM GAS /tmp/ccwR4KB7.s page 304 + + 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4 2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -16798,9 +18215,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccYgfTud.s page 281 - - 2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue) 2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR6, CompareValue); @@ -16824,6 +18238,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR2) set for output channel 2. + ARM GAS /tmp/ccwR4KB7.s page 305 + + 2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF 2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. @@ -16858,9 +18275,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR4) set for output channel 4. 2578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF 2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check - ARM GAS /tmp/ccYgfTud.s page 282 - - 2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance. @@ -16884,6 +18298,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx) 2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5)); + ARM GAS /tmp/ccwR4KB7.s page 306 + + 2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -16918,9 +18335,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5); 2636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccYgfTud.s page 283 - - 2637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -16944,6 +18358,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_Config\n 2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_Config\n 2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_IC_Config\n + ARM GAS /tmp/ccwR4KB7.s page 307 + + 2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n 2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n 2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n @@ -16978,9 +18395,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the active input. 2693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n - ARM GAS /tmp/ccYgfTud.s page 284 - - 2694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n 2695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n 2696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_SetActiveInput @@ -17004,6 +18418,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 308 + + 2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current active input. 2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n 2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n @@ -17038,9 +18455,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/ccYgfTud.s page 285 - - 2751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICPrescaler This parameter can be one of the following values: 2753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 @@ -17064,6 +18478,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_GetPrescaler 2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: + ARM GAS /tmp/ccwR4KB7.s page 309 + + 2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 @@ -17098,9 +18515,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 2806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 2807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 - ARM GAS /tmp/ccYgfTud.s page 286 - - 2808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 2809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 2810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 @@ -17124,6 +18538,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the input filter duration. + ARM GAS /tmp/ccwR4KB7.s page 310 + + 2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n 2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n 2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n @@ -17158,9 +18575,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann 2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccYgfTud.s page 287 - - 2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the input channel polarity. @@ -17184,6 +18598,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE 2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 311 + + 2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity 2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -17218,9 +18635,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> 2920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SHIFT_TAB_CCxP[iChannel]); 2921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccYgfTud.s page 288 - - 2922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination). @@ -17244,6 +18658,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx) + ARM GAS /tmp/ccwR4KB7.s page 312 + + 2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); 2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -17278,9 +18695,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccYgfTud.s page 289 - - 2979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 2. 2980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF 2981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check @@ -17304,6 +18718,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not 3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 3 is supported by a timer instance. 3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3 + ARM GAS /tmp/ccwR4KB7.s page 313 + + 3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -17338,9 +18755,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable external clock mode 2. 3035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ET - ARM GAS /tmp/ccYgfTud.s page 290 - - 3036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 3037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 3038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_EnableExternalClock @@ -17364,6 +18778,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); 3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccwR4KB7.s page 314 + + 3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled. @@ -17398,32 +18815,32 @@ ARM GAS /tmp/ccYgfTud.s page 1 3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) - ARM GAS /tmp/ccYgfTud.s page 291 - - - 4244 .loc 5 3092 22 view .LVU1375 - 4245 .LBB466: + 5072 .loc 5 3092 22 view .LVU1619 + 5073 .LBB482: 3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); - 4246 .loc 5 3094 3 view .LVU1376 - 4247 006a 9968 ldr r1, [r3, #8] - 4248 006c 0A4A ldr r2, .L199+16 - 4249 006e 0A40 ands r2, r2, r1 - 4250 0070 9A60 str r2, [r3, #8] - 4251 .LVL369: - 4252 .loc 5 3094 3 is_stmt 0 view .LVU1377 - 4253 .LBE466: - 4254 .LBE465: -1393:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); - 4255 .loc 1 1393 3 is_stmt 1 view .LVU1378 - 4256 .LBB467: - 4257 .LBI467: + 5074 .loc 5 3094 3 view .LVU1620 + 5075 006a 9968 ldr r1, [r3, #8] + 5076 006c 0A4A ldr r2, .L278+16 + 5077 006e 0A40 ands r2, r2, r1 + 5078 0070 9A60 str r2, [r3, #8] + 5079 .LVL487: + 5080 .loc 5 3094 3 is_stmt 0 view .LVU1621 + 5081 .LBE482: + 5082 .LBE481: +1443:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); + 5083 .loc 1 1443 3 is_stmt 1 view .LVU1622 + 5084 .LBB483: + 5085 .LBI483: 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the encoder interface mode. 3099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check 3100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports the encoder mode. + ARM GAS /tmp/ccwR4KB7.s page 315 + + 3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode 3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values: @@ -17458,32 +18875,32 @@ ARM GAS /tmp/ccYgfTud.s page 1 3132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC1REF 3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC2REF 3134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC3REF - ARM GAS /tmp/ccYgfTud.s page 292 - - 3135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC4REF 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) - 4258 .loc 5 3138 22 view .LVU1379 - 4259 .LBB468: + 5086 .loc 5 3138 22 view .LVU1623 + 5087 .LBB484: 3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); - 4260 .loc 5 3140 3 view .LVU1380 - 4261 0072 5A68 ldr r2, [r3, #4] - 4262 0074 22F07002 bic r2, r2, #112 - 4263 0078 5A60 str r2, [r3, #4] - 4264 .LVL370: - 4265 .loc 5 3140 3 is_stmt 0 view .LVU1381 - 4266 .LBE468: - 4267 .LBE467: -1394:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ - 4268 .loc 1 1394 3 is_stmt 1 view .LVU1382 - 4269 .LBB469: - 4270 .LBI469: + 5088 .loc 5 3140 3 view .LVU1624 + 5089 0072 5A68 ldr r2, [r3, #4] + 5090 0074 22F07002 bic r2, r2, #112 + 5091 0078 5A60 str r2, [r3, #4] + 5092 .LVL488: + 5093 .loc 5 3140 3 is_stmt 0 view .LVU1625 + 5094 .LBE484: + 5095 .LBE483: +1444:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 5096 .loc 1 1444 3 is_stmt 1 view .LVU1626 + 5097 .LBB485: + 5098 .LBI485: 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 316 + + 3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output 2 (TRGO2) used for ADC synchronization . 3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check 3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can be used for ADC synchronization. @@ -17518,9 +18935,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 3176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer. 3177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetSlaveMode - ARM GAS /tmp/ccYgfTud.s page 293 - - 3178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param SlaveMode This parameter can be one of the following values: 3180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_DISABLED @@ -17544,6 +18958,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TriggerInput This parameter can be one of the following values: 3199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR0 3200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR1 + ARM GAS /tmp/ccwR4KB7.s page 317 + + 3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2 3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3 3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED @@ -17578,1056 +18995,1056 @@ ARM GAS /tmp/ccYgfTud.s page 1 3232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccYgfTud.s page 294 - - 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) - 4271 .loc 5 3235 22 view .LVU1383 - 4272 .LBB470: + 5099 .loc 5 3235 22 view .LVU1627 + 5100 .LBB486: 3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); - 4273 .loc 5 3237 3 view .LVU1384 - 4274 007a 9A68 ldr r2, [r3, #8] - 4275 007c 22F08002 bic r2, r2, #128 - 4276 0080 9A60 str r2, [r3, #8] - 4277 .LVL371: - 4278 .loc 5 3237 3 is_stmt 0 view .LVU1385 - 4279 .LBE470: - 4280 .LBE469: -1399:Src/main.c **** - 4281 .loc 1 1399 1 view .LVU1386 - 4282 0082 06B0 add sp, sp, #24 - 4283 .LCFI43: - 4284 .cfi_def_cfa_offset 8 - 4285 @ sp needed - 4286 0084 10BD pop {r4, pc} - 4287 .L200: - 4288 0086 00BF .align 2 - 4289 .L199: - 4290 0088 00380240 .word 1073887232 - 4291 008c 00ED00E0 .word -536810240 - 4292 0090 00E100E0 .word -536813312 - 4293 0094 40D10C00 .word 840000 - 4294 0098 F8BFFEFF .word -81928 - 4295 .cfi_endproc - 4296 .LFE1195: - 4298 .section .text.MX_TIM5_Init,"ax",%progbits - 4299 .align 1 - 4300 .syntax unified - 4301 .thumb - 4302 .thumb_func - 4304 MX_TIM5_Init: - 4305 .LFB1197: -1466:Src/main.c **** - 4306 .loc 1 1466 1 is_stmt 1 view -0 - 4307 .cfi_startproc - 4308 @ args = 0, pretend = 0, frame = 24 - 4309 @ frame_needed = 0, uses_anonymous_args = 0 - 4310 0000 10B5 push {r4, lr} - 4311 .LCFI44: - 4312 .cfi_def_cfa_offset 8 - 4313 .cfi_offset 4, -8 - 4314 .cfi_offset 14, -4 - 4315 0002 86B0 sub sp, sp, #24 - 4316 .LCFI45: - 4317 .cfi_def_cfa_offset 32 -1472:Src/main.c **** - 4318 .loc 1 1472 3 view .LVU1388 -1472:Src/main.c **** - 4319 .loc 1 1472 22 is_stmt 0 view .LVU1389 - 4320 0004 0024 movs r4, #0 - 4321 0006 0194 str r4, [sp, #4] - 4322 0008 0294 str r4, [sp, #8] - ARM GAS /tmp/ccYgfTud.s page 295 + 5101 .loc 5 3237 3 view .LVU1628 + 5102 007a 9A68 ldr r2, [r3, #8] + 5103 007c 22F08002 bic r2, r2, #128 + 5104 0080 9A60 str r2, [r3, #8] + 5105 .LVL489: + 5106 .loc 5 3237 3 is_stmt 0 view .LVU1629 + 5107 .LBE486: + 5108 .LBE485: +1449:Src/main.c **** + 5109 .loc 1 1449 1 view .LVU1630 + 5110 0082 06B0 add sp, sp, #24 + 5111 .LCFI52: + 5112 .cfi_def_cfa_offset 8 + 5113 @ sp needed + 5114 0084 10BD pop {r4, pc} + 5115 .L279: + 5116 0086 00BF .align 2 + 5117 .L278: + ARM GAS /tmp/ccwR4KB7.s page 318 - 4323 000a 0394 str r4, [sp, #12] - 4324 000c 0494 str r4, [sp, #16] - 4325 000e 0594 str r4, [sp, #20] -1475:Src/main.c **** - 4326 .loc 1 1475 3 is_stmt 1 view .LVU1390 - 4327 .LVL372: - 4328 .LBB471: - 4329 .LBI471: + 5118 0088 00380240 .word 1073887232 + 5119 008c 00ED00E0 .word -536810240 + 5120 0090 00E100E0 .word -536813312 + 5121 0094 40D10C00 .word 840000 + 5122 0098 F8BFFEFF .word -81928 + 5123 .cfi_endproc + 5124 .LFE1195: + 5126 .section .text.MX_TIM5_Init,"ax",%progbits + 5127 .align 1 + 5128 .syntax unified + 5129 .thumb + 5130 .thumb_func + 5132 MX_TIM5_Init: + 5133 .LFB1197: +1516:Src/main.c **** + 5134 .loc 1 1516 1 is_stmt 1 view -0 + 5135 .cfi_startproc + 5136 @ args = 0, pretend = 0, frame = 24 + 5137 @ frame_needed = 0, uses_anonymous_args = 0 + 5138 0000 10B5 push {r4, lr} + 5139 .LCFI53: + 5140 .cfi_def_cfa_offset 8 + 5141 .cfi_offset 4, -8 + 5142 .cfi_offset 14, -4 + 5143 0002 86B0 sub sp, sp, #24 + 5144 .LCFI54: + 5145 .cfi_def_cfa_offset 32 +1522:Src/main.c **** + 5146 .loc 1 1522 3 view .LVU1632 +1522:Src/main.c **** + 5147 .loc 1 1522 22 is_stmt 0 view .LVU1633 + 5148 0004 0024 movs r4, #0 + 5149 0006 0194 str r4, [sp, #4] + 5150 0008 0294 str r4, [sp, #8] + 5151 000a 0394 str r4, [sp, #12] + 5152 000c 0494 str r4, [sp, #16] + 5153 000e 0594 str r4, [sp, #20] +1525:Src/main.c **** + 5154 .loc 1 1525 3 is_stmt 1 view .LVU1634 + 5155 .LVL490: + 5156 .LBB487: + 5157 .LBI487: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4330 .loc 3 1071 22 view .LVU1391 - 4331 .LBB472: + 5158 .loc 3 1071 22 view .LVU1635 + 5159 .LBB488: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 4332 .loc 3 1073 3 view .LVU1392 + 5160 .loc 3 1073 3 view .LVU1636 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4333 .loc 3 1074 3 view .LVU1393 - 4334 0010 1C4B ldr r3, .L203 - 4335 0012 1A6C ldr r2, [r3, #64] - 4336 0014 42F00802 orr r2, r2, #8 - 4337 0018 1A64 str r2, [r3, #64] + 5161 .loc 3 1074 3 view .LVU1637 + 5162 0010 1C4B ldr r3, .L282 + 5163 0012 1A6C ldr r2, [r3, #64] + 5164 0014 42F00802 orr r2, r2, #8 + 5165 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4338 .loc 3 1076 3 view .LVU1394 + 5166 .loc 3 1076 3 view .LVU1638 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4339 .loc 3 1076 12 is_stmt 0 view .LVU1395 - 4340 001a 1B6C ldr r3, [r3, #64] - 4341 001c 03F00803 and r3, r3, #8 + 5167 .loc 3 1076 12 is_stmt 0 view .LVU1639 + ARM GAS /tmp/ccwR4KB7.s page 319 + + + 5168 001a 1B6C ldr r3, [r3, #64] + 5169 001c 03F00803 and r3, r3, #8 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4342 .loc 3 1076 10 view .LVU1396 - 4343 0020 0093 str r3, [sp] + 5170 .loc 3 1076 10 view .LVU1640 + 5171 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4344 .loc 3 1077 3 is_stmt 1 view .LVU1397 - 4345 0022 009B ldr r3, [sp] - 4346 .LVL373: + 5172 .loc 3 1077 3 is_stmt 1 view .LVU1641 + 5173 0022 009B ldr r3, [sp] + 5174 .LVL491: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4347 .loc 3 1077 3 is_stmt 0 view .LVU1398 - 4348 .LBE472: - 4349 .LBE471: -1478:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 4350 .loc 1 1478 3 is_stmt 1 view .LVU1399 - 4351 .LBB473: - 4352 .LBI473: + 5175 .loc 3 1077 3 is_stmt 0 view .LVU1642 + 5176 .LBE488: + 5177 .LBE487: +1528:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 5178 .loc 1 1528 3 is_stmt 1 view .LVU1643 + 5179 .LBB489: + 5180 .LBI489: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 4353 .loc 2 1884 26 view .LVU1400 - 4354 .LBB474: + 5181 .loc 2 1884 26 view .LVU1644 + 5182 .LBB490: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4355 .loc 2 1886 3 view .LVU1401 + 5183 .loc 2 1886 3 view .LVU1645 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4356 .loc 2 1886 26 is_stmt 0 view .LVU1402 - 4357 0024 184B ldr r3, .L203+4 - 4358 0026 D868 ldr r0, [r3, #12] - 4359 .LBE474: - 4360 .LBE473: -1478:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 4361 .loc 1 1478 3 discriminator 1 view .LVU1403 - 4362 0028 2246 mov r2, r4 - 4363 002a 2146 mov r1, r4 - 4364 002c C0F30220 ubfx r0, r0, #8, #3 - 4365 0030 FFF7FEFF bl NVIC_EncodePriority - ARM GAS /tmp/ccYgfTud.s page 296 - - - 4366 .LVL374: - 4367 .LBB475: - 4368 .LBI475: + 5184 .loc 2 1886 26 is_stmt 0 view .LVU1646 + 5185 0024 184B ldr r3, .L282+4 + 5186 0026 D868 ldr r0, [r3, #12] + 5187 .LBE490: + 5188 .LBE489: +1528:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 5189 .loc 1 1528 3 discriminator 1 view .LVU1647 + 5190 0028 2246 mov r2, r4 + 5191 002a 2146 mov r1, r4 + 5192 002c C0F30220 ubfx r0, r0, #8, #3 + 5193 0030 FFF7FEFF bl NVIC_EncodePriority + 5194 .LVL492: + 5195 .LBB491: + 5196 .LBI491: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 4369 .loc 2 2024 22 is_stmt 1 view .LVU1404 - 4370 .LBB476: + 5197 .loc 2 2024 22 is_stmt 1 view .LVU1648 + 5198 .LBB492: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 4371 .loc 2 2026 3 view .LVU1405 + 5199 .loc 2 2026 3 view .LVU1649 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4372 .loc 2 2028 5 view .LVU1406 + 5200 .loc 2 2028 5 view .LVU1650 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4373 .loc 2 2028 49 is_stmt 0 view .LVU1407 - 4374 0034 0001 lsls r0, r0, #4 - 4375 .LVL375: + 5201 .loc 2 2028 49 is_stmt 0 view .LVU1651 + 5202 0034 0001 lsls r0, r0, #4 + 5203 .LVL493: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4376 .loc 2 2028 49 view .LVU1408 - 4377 0036 C0B2 uxtb r0, r0 + 5204 .loc 2 2028 49 view .LVU1652 + 5205 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4378 .loc 2 2028 47 view .LVU1409 - 4379 0038 144B ldr r3, .L203+8 - 4380 003a 83F83203 strb r0, [r3, #818] - 4381 .LVL376: + 5206 .loc 2 2028 47 view .LVU1653 + 5207 0038 144B ldr r3, .L282+8 + 5208 003a 83F83203 strb r0, [r3, #818] + 5209 .LVL494: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4382 .loc 2 2028 47 view .LVU1410 - 4383 .LBE476: - 4384 .LBE475: -1479:Src/main.c **** - 4385 .loc 1 1479 3 is_stmt 1 view .LVU1411 - 4386 .LBB477: - 4387 .LBI477: + ARM GAS /tmp/ccwR4KB7.s page 320 + + + 5210 .loc 2 2028 47 view .LVU1654 + 5211 .LBE492: + 5212 .LBE491: +1529:Src/main.c **** + 5213 .loc 1 1529 3 is_stmt 1 view .LVU1655 + 5214 .LBB493: + 5215 .LBI493: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 4388 .loc 2 1896 22 view .LVU1412 - 4389 .LBB478: + 5216 .loc 2 1896 22 view .LVU1656 + 5217 .LBB494: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 4390 .loc 2 1898 3 view .LVU1413 + 5218 .loc 2 1898 3 view .LVU1657 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4391 .loc 2 1900 5 view .LVU1414 + 5219 .loc 2 1900 5 view .LVU1658 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4392 .loc 2 1900 43 is_stmt 0 view .LVU1415 - 4393 003e 4FF48022 mov r2, #262144 - 4394 0042 5A60 str r2, [r3, #4] - 4395 .LVL377: + 5220 .loc 2 1900 43 is_stmt 0 view .LVU1659 + 5221 003e 4FF48022 mov r2, #262144 + 5222 0042 5A60 str r2, [r3, #4] + 5223 .LVL495: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4396 .loc 2 1900 43 view .LVU1416 - 4397 .LBE478: - 4398 .LBE477: -1484:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4399 .loc 1 1484 3 is_stmt 1 view .LVU1417 -1484:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4400 .loc 1 1484 28 is_stmt 0 view .LVU1418 - 4401 0044 42F21073 movw r3, #10000 - 4402 0048 ADF80430 strh r3, [sp, #4] @ movhi -1485:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 4403 .loc 1 1485 3 is_stmt 1 view .LVU1419 -1485:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 4404 .loc 1 1485 30 is_stmt 0 view .LVU1420 - 4405 004c 0294 str r4, [sp, #8] - ARM GAS /tmp/ccYgfTud.s page 297 - - -1486:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 4406 .loc 1 1486 3 is_stmt 1 view .LVU1421 -1486:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 4407 .loc 1 1486 29 is_stmt 0 view .LVU1422 - 4408 004e 4FF40C73 mov r3, #560 - 4409 0052 0393 str r3, [sp, #12] -1487:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 4410 .loc 1 1487 3 is_stmt 1 view .LVU1423 -1487:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 4411 .loc 1 1487 32 is_stmt 0 view .LVU1424 - 4412 0054 0494 str r4, [sp, #16] -1488:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); - 4413 .loc 1 1488 3 is_stmt 1 view .LVU1425 - 4414 0056 0E4C ldr r4, .L203+12 - 4415 0058 01A9 add r1, sp, #4 - 4416 005a 2046 mov r0, r4 - 4417 005c FFF7FEFF bl LL_TIM_Init - 4418 .LVL378: -1489:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); - 4419 .loc 1 1489 3 view .LVU1426 - 4420 .LBB479: - 4421 .LBI479: + 5224 .loc 2 1900 43 view .LVU1660 + 5225 .LBE494: + 5226 .LBE493: +1534:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5227 .loc 1 1534 3 is_stmt 1 view .LVU1661 +1534:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5228 .loc 1 1534 28 is_stmt 0 view .LVU1662 + 5229 0044 42F21073 movw r3, #10000 + 5230 0048 ADF80430 strh r3, [sp, #4] @ movhi +1535:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 5231 .loc 1 1535 3 is_stmt 1 view .LVU1663 +1535:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 5232 .loc 1 1535 30 is_stmt 0 view .LVU1664 + 5233 004c 0294 str r4, [sp, #8] +1536:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5234 .loc 1 1536 3 is_stmt 1 view .LVU1665 +1536:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 5235 .loc 1 1536 29 is_stmt 0 view .LVU1666 + 5236 004e 4FF40C73 mov r3, #560 + 5237 0052 0393 str r3, [sp, #12] +1537:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 5238 .loc 1 1537 3 is_stmt 1 view .LVU1667 +1537:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 5239 .loc 1 1537 32 is_stmt 0 view .LVU1668 + 5240 0054 0494 str r4, [sp, #16] +1538:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); + 5241 .loc 1 1538 3 is_stmt 1 view .LVU1669 + 5242 0056 0E4C ldr r4, .L282+12 + 5243 0058 01A9 add r1, sp, #4 + 5244 005a 2046 mov r0, r4 + 5245 005c FFF7FEFF bl LL_TIM_Init + 5246 .LVL496: +1539:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); + 5247 .loc 1 1539 3 view .LVU1670 + 5248 .LBB495: + 5249 .LBI495: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4422 .loc 5 1504 22 view .LVU1427 - 4423 .LBB480: + ARM GAS /tmp/ccwR4KB7.s page 321 + + + 5250 .loc 5 1504 22 view .LVU1671 + 5251 .LBB496: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4424 .loc 5 1506 3 view .LVU1428 - 4425 0060 2368 ldr r3, [r4] - 4426 0062 23F08003 bic r3, r3, #128 - 4427 0066 2360 str r3, [r4] - 4428 .LVL379: + 5252 .loc 5 1506 3 view .LVU1672 + 5253 0060 2368 ldr r3, [r4] + 5254 0062 23F08003 bic r3, r3, #128 + 5255 0066 2360 str r3, [r4] + 5256 .LVL497: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4429 .loc 5 1506 3 is_stmt 0 view .LVU1429 - 4430 .LBE480: - 4431 .LBE479: -1490:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); - 4432 .loc 1 1490 3 is_stmt 1 view .LVU1430 - 4433 .LBB481: - 4434 .LBI481: + 5257 .loc 5 1506 3 is_stmt 0 view .LVU1673 + 5258 .LBE496: + 5259 .LBE495: +1540:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); + 5260 .loc 1 1540 3 is_stmt 1 view .LVU1674 + 5261 .LBB497: + 5262 .LBI497: 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4435 .loc 5 3092 22 view .LVU1431 - 4436 .LBB482: + 5263 .loc 5 3092 22 view .LVU1675 + 5264 .LBB498: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4437 .loc 5 3094 3 view .LVU1432 - 4438 0068 A268 ldr r2, [r4, #8] - 4439 006a 0A4B ldr r3, .L203+16 - 4440 006c 1340 ands r3, r3, r2 - 4441 006e A360 str r3, [r4, #8] - 4442 .LVL380: + 5265 .loc 5 3094 3 view .LVU1676 + 5266 0068 A268 ldr r2, [r4, #8] + 5267 006a 0A4B ldr r3, .L282+16 + 5268 006c 1340 ands r3, r3, r2 + 5269 006e A360 str r3, [r4, #8] + 5270 .LVL498: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4443 .loc 5 3094 3 is_stmt 0 view .LVU1433 - 4444 .LBE482: - 4445 .LBE481: -1491:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); - 4446 .loc 1 1491 3 is_stmt 1 view .LVU1434 - 4447 .LBB483: - 4448 .LBI483: - ARM GAS /tmp/ccYgfTud.s page 298 - - + 5271 .loc 5 3094 3 is_stmt 0 view .LVU1677 + 5272 .LBE498: + 5273 .LBE497: +1541:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); + 5274 .loc 1 1541 3 is_stmt 1 view .LVU1678 + 5275 .LBB499: + 5276 .LBI499: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4449 .loc 5 3138 22 view .LVU1435 - 4450 .LBB484: + 5277 .loc 5 3138 22 view .LVU1679 + 5278 .LBB500: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4451 .loc 5 3140 3 view .LVU1436 - 4452 0070 6368 ldr r3, [r4, #4] - 4453 0072 23F07003 bic r3, r3, #112 - 4454 0076 6360 str r3, [r4, #4] - 4455 .LVL381: + 5279 .loc 5 3140 3 view .LVU1680 + 5280 0070 6368 ldr r3, [r4, #4] + 5281 0072 23F07003 bic r3, r3, #112 + 5282 0076 6360 str r3, [r4, #4] + 5283 .LVL499: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4456 .loc 5 3140 3 is_stmt 0 view .LVU1437 - 4457 .LBE484: - 4458 .LBE483: -1492:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ - 4459 .loc 1 1492 3 is_stmt 1 view .LVU1438 - 4460 .LBB485: - 4461 .LBI485: + 5284 .loc 5 3140 3 is_stmt 0 view .LVU1681 + 5285 .LBE500: + 5286 .LBE499: +1542:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ + 5287 .loc 1 1542 3 is_stmt 1 view .LVU1682 + 5288 .LBB501: + 5289 .LBI501: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4462 .loc 5 3235 22 view .LVU1439 - 4463 .LBB486: - 4464 .loc 5 3237 3 view .LVU1440 - 4465 0078 A368 ldr r3, [r4, #8] - 4466 007a 23F08003 bic r3, r3, #128 - 4467 007e A360 str r3, [r4, #8] - 4468 .LVL382: - 4469 .loc 5 3237 3 is_stmt 0 view .LVU1441 - 4470 .LBE486: - 4471 .LBE485: -1497:Src/main.c **** - 4472 .loc 1 1497 1 view .LVU1442 - 4473 0080 06B0 add sp, sp, #24 - 4474 .LCFI46: - 4475 .cfi_def_cfa_offset 8 - 4476 @ sp needed - 4477 0082 10BD pop {r4, pc} - 4478 .L204: - 4479 .align 2 - 4480 .L203: - 4481 0084 00380240 .word 1073887232 - 4482 0088 00ED00E0 .word -536810240 - 4483 008c 00E100E0 .word -536813312 - 4484 0090 000C0040 .word 1073744896 - 4485 0094 F8BFFEFF .word -81928 - 4486 .cfi_endproc - 4487 .LFE1197: - 4489 .section .text.MX_TIM7_Init,"ax",%progbits - 4490 .align 1 - 4491 .syntax unified - 4492 .thumb - 4493 .thumb_func - 4495 MX_TIM7_Init: - 4496 .LFB1199: -1542:Src/main.c **** - 4497 .loc 1 1542 1 is_stmt 1 view -0 - 4498 .cfi_startproc - 4499 @ args = 0, pretend = 0, frame = 24 - 4500 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccYgfTud.s page 299 + 5290 .loc 5 3235 22 view .LVU1683 + 5291 .LBB502: + 5292 .loc 5 3237 3 view .LVU1684 + 5293 0078 A368 ldr r3, [r4, #8] + 5294 007a 23F08003 bic r3, r3, #128 + ARM GAS /tmp/ccwR4KB7.s page 322 + + + 5295 007e A360 str r3, [r4, #8] + 5296 .LVL500: + 5297 .loc 5 3237 3 is_stmt 0 view .LVU1685 + 5298 .LBE502: + 5299 .LBE501: +1547:Src/main.c **** + 5300 .loc 1 1547 1 view .LVU1686 + 5301 0080 06B0 add sp, sp, #24 + 5302 .LCFI55: + 5303 .cfi_def_cfa_offset 8 + 5304 @ sp needed + 5305 0082 10BD pop {r4, pc} + 5306 .L283: + 5307 .align 2 + 5308 .L282: + 5309 0084 00380240 .word 1073887232 + 5310 0088 00ED00E0 .word -536810240 + 5311 008c 00E100E0 .word -536813312 + 5312 0090 000C0040 .word 1073744896 + 5313 0094 F8BFFEFF .word -81928 + 5314 .cfi_endproc + 5315 .LFE1197: + 5317 .section .text.MX_TIM7_Init,"ax",%progbits + 5318 .align 1 + 5319 .syntax unified + 5320 .thumb + 5321 .thumb_func + 5323 MX_TIM7_Init: + 5324 .LFB1199: +1592:Src/main.c **** + 5325 .loc 1 1592 1 is_stmt 1 view -0 + 5326 .cfi_startproc + 5327 @ args = 0, pretend = 0, frame = 24 + 5328 @ frame_needed = 0, uses_anonymous_args = 0 + 5329 0000 10B5 push {r4, lr} + 5330 .LCFI56: + 5331 .cfi_def_cfa_offset 8 + 5332 .cfi_offset 4, -8 + 5333 .cfi_offset 14, -4 + 5334 0002 86B0 sub sp, sp, #24 + 5335 .LCFI57: + 5336 .cfi_def_cfa_offset 32 +1598:Src/main.c **** + 5337 .loc 1 1598 3 view .LVU1688 +1598:Src/main.c **** + 5338 .loc 1 1598 22 is_stmt 0 view .LVU1689 + 5339 0004 0024 movs r4, #0 + 5340 0006 0194 str r4, [sp, #4] + 5341 0008 0294 str r4, [sp, #8] + 5342 000a 0394 str r4, [sp, #12] + 5343 000c 0494 str r4, [sp, #16] + 5344 000e 0594 str r4, [sp, #20] +1601:Src/main.c **** + 5345 .loc 1 1601 3 is_stmt 1 view .LVU1690 + 5346 .LVL501: + 5347 .LBB503: + 5348 .LBI503: + ARM GAS /tmp/ccwR4KB7.s page 323 - 4501 0000 10B5 push {r4, lr} - 4502 .LCFI47: - 4503 .cfi_def_cfa_offset 8 - 4504 .cfi_offset 4, -8 - 4505 .cfi_offset 14, -4 - 4506 0002 86B0 sub sp, sp, #24 - 4507 .LCFI48: - 4508 .cfi_def_cfa_offset 32 -1548:Src/main.c **** - 4509 .loc 1 1548 3 view .LVU1444 -1548:Src/main.c **** - 4510 .loc 1 1548 22 is_stmt 0 view .LVU1445 - 4511 0004 0024 movs r4, #0 - 4512 0006 0194 str r4, [sp, #4] - 4513 0008 0294 str r4, [sp, #8] - 4514 000a 0394 str r4, [sp, #12] - 4515 000c 0494 str r4, [sp, #16] - 4516 000e 0594 str r4, [sp, #20] -1551:Src/main.c **** - 4517 .loc 1 1551 3 is_stmt 1 view .LVU1446 - 4518 .LVL383: - 4519 .LBB487: - 4520 .LBI487: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4521 .loc 3 1071 22 view .LVU1447 - 4522 .LBB488: + 5349 .loc 3 1071 22 view .LVU1691 + 5350 .LBB504: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 4523 .loc 3 1073 3 view .LVU1448 + 5351 .loc 3 1073 3 view .LVU1692 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4524 .loc 3 1074 3 view .LVU1449 - 4525 0010 1A4B ldr r3, .L207 - 4526 0012 1A6C ldr r2, [r3, #64] - 4527 0014 42F02002 orr r2, r2, #32 - 4528 0018 1A64 str r2, [r3, #64] + 5352 .loc 3 1074 3 view .LVU1693 + 5353 0010 1A4B ldr r3, .L286 + 5354 0012 1A6C ldr r2, [r3, #64] + 5355 0014 42F02002 orr r2, r2, #32 + 5356 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4529 .loc 3 1076 3 view .LVU1450 + 5357 .loc 3 1076 3 view .LVU1694 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4530 .loc 3 1076 12 is_stmt 0 view .LVU1451 - 4531 001a 1B6C ldr r3, [r3, #64] - 4532 001c 03F02003 and r3, r3, #32 + 5358 .loc 3 1076 12 is_stmt 0 view .LVU1695 + 5359 001a 1B6C ldr r3, [r3, #64] + 5360 001c 03F02003 and r3, r3, #32 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4533 .loc 3 1076 10 view .LVU1452 - 4534 0020 0093 str r3, [sp] + 5361 .loc 3 1076 10 view .LVU1696 + 5362 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4535 .loc 3 1077 3 is_stmt 1 view .LVU1453 - 4536 0022 009B ldr r3, [sp] - 4537 .LVL384: + 5363 .loc 3 1077 3 is_stmt 1 view .LVU1697 + 5364 0022 009B ldr r3, [sp] + 5365 .LVL502: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4538 .loc 3 1077 3 is_stmt 0 view .LVU1454 - 4539 .LBE488: - 4540 .LBE487: -1554:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 4541 .loc 1 1554 3 is_stmt 1 view .LVU1455 - 4542 .LBB489: - 4543 .LBI489: + 5366 .loc 3 1077 3 is_stmt 0 view .LVU1698 + 5367 .LBE504: + 5368 .LBE503: +1604:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 5369 .loc 1 1604 3 is_stmt 1 view .LVU1699 + 5370 .LBB505: + 5371 .LBI505: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 4544 .loc 2 1884 26 view .LVU1456 - ARM GAS /tmp/ccYgfTud.s page 300 - - - 4545 .LBB490: + 5372 .loc 2 1884 26 view .LVU1700 + 5373 .LBB506: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4546 .loc 2 1886 3 view .LVU1457 + 5374 .loc 2 1886 3 view .LVU1701 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4547 .loc 2 1886 26 is_stmt 0 view .LVU1458 - 4548 0024 164B ldr r3, .L207+4 - 4549 0026 D868 ldr r0, [r3, #12] - 4550 .LBE490: - 4551 .LBE489: -1554:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 4552 .loc 1 1554 3 discriminator 1 view .LVU1459 - 4553 0028 2246 mov r2, r4 - 4554 002a 2146 mov r1, r4 - 4555 002c C0F30220 ubfx r0, r0, #8, #3 - 4556 0030 FFF7FEFF bl NVIC_EncodePriority - 4557 .LVL385: - 4558 .LBB491: - 4559 .LBI491: + 5375 .loc 2 1886 26 is_stmt 0 view .LVU1702 + 5376 0024 164B ldr r3, .L286+4 + 5377 0026 D868 ldr r0, [r3, #12] + 5378 .LBE506: + 5379 .LBE505: +1604:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 5380 .loc 1 1604 3 discriminator 1 view .LVU1703 + 5381 0028 2246 mov r2, r4 + 5382 002a 2146 mov r1, r4 + 5383 002c C0F30220 ubfx r0, r0, #8, #3 + 5384 0030 FFF7FEFF bl NVIC_EncodePriority + 5385 .LVL503: + 5386 .LBB507: + 5387 .LBI507: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 4560 .loc 2 2024 22 is_stmt 1 view .LVU1460 - 4561 .LBB492: + 5388 .loc 2 2024 22 is_stmt 1 view .LVU1704 + 5389 .LBB508: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 4562 .loc 2 2026 3 view .LVU1461 + 5390 .loc 2 2026 3 view .LVU1705 + ARM GAS /tmp/ccwR4KB7.s page 324 + + 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4563 .loc 2 2028 5 view .LVU1462 + 5391 .loc 2 2028 5 view .LVU1706 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4564 .loc 2 2028 49 is_stmt 0 view .LVU1463 - 4565 0034 0001 lsls r0, r0, #4 - 4566 .LVL386: + 5392 .loc 2 2028 49 is_stmt 0 view .LVU1707 + 5393 0034 0001 lsls r0, r0, #4 + 5394 .LVL504: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4567 .loc 2 2028 49 view .LVU1464 - 4568 0036 C0B2 uxtb r0, r0 + 5395 .loc 2 2028 49 view .LVU1708 + 5396 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4569 .loc 2 2028 47 view .LVU1465 - 4570 0038 124B ldr r3, .L207+8 - 4571 003a 83F83703 strb r0, [r3, #823] - 4572 .LVL387: + 5397 .loc 2 2028 47 view .LVU1709 + 5398 0038 124B ldr r3, .L286+8 + 5399 003a 83F83703 strb r0, [r3, #823] + 5400 .LVL505: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4573 .loc 2 2028 47 view .LVU1466 - 4574 .LBE492: - 4575 .LBE491: + 5401 .loc 2 2028 47 view .LVU1710 + 5402 .LBE508: + 5403 .LBE507: +1605:Src/main.c **** + 5404 .loc 1 1605 3 is_stmt 1 view .LVU1711 + 5405 .LBB509: + 5406 .LBI509: +1896:Drivers/CMSIS/Include/core_cm7.h **** { + 5407 .loc 2 1896 22 view .LVU1712 + 5408 .LBB510: +1898:Drivers/CMSIS/Include/core_cm7.h **** { + 5409 .loc 2 1898 3 view .LVU1713 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 5410 .loc 2 1900 5 view .LVU1714 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 5411 .loc 2 1900 43 is_stmt 0 view .LVU1715 + 5412 003e 4FF40002 mov r2, #8388608 + 5413 0042 5A60 str r2, [r3, #4] + 5414 .LVL506: +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 5415 .loc 2 1900 43 view .LVU1716 + 5416 .LBE510: + 5417 .LBE509: +1610:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5418 .loc 1 1610 3 is_stmt 1 view .LVU1717 +1610:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5419 .loc 1 1610 28 is_stmt 0 view .LVU1718 + 5420 0044 40F29733 movw r3, #919 + 5421 0048 ADF80430 strh r3, [sp, #4] @ movhi +1611:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 5422 .loc 1 1611 3 is_stmt 1 view .LVU1719 +1611:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 5423 .loc 1 1611 30 is_stmt 0 view .LVU1720 + 5424 004c 0294 str r4, [sp, #8] +1612:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 5425 .loc 1 1612 3 is_stmt 1 view .LVU1721 +1612:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 5426 .loc 1 1612 29 is_stmt 0 view .LVU1722 + 5427 004e 6323 movs r3, #99 + 5428 0050 0393 str r3, [sp, #12] +1613:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); + 5429 .loc 1 1613 3 is_stmt 1 view .LVU1723 + ARM GAS /tmp/ccwR4KB7.s page 325 + + + 5430 0052 0D4C ldr r4, .L286+12 + 5431 0054 01A9 add r1, sp, #4 + 5432 0056 2046 mov r0, r4 + 5433 0058 FFF7FEFF bl LL_TIM_Init + 5434 .LVL507: +1614:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); + 5435 .loc 1 1614 3 view .LVU1724 + 5436 .LBB511: + 5437 .LBI511: +1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + 5438 .loc 5 1504 22 view .LVU1725 + 5439 .LBB512: +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 5440 .loc 5 1506 3 view .LVU1726 + 5441 005c 2368 ldr r3, [r4] + 5442 005e 23F08003 bic r3, r3, #128 + 5443 0062 2360 str r3, [r4] + 5444 .LVL508: +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 5445 .loc 5 1506 3 is_stmt 0 view .LVU1727 + 5446 .LBE512: + 5447 .LBE511: +1615:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); + 5448 .loc 1 1615 3 is_stmt 1 view .LVU1728 + 5449 .LBB513: + 5450 .LBI513: +3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + 5451 .loc 5 3138 22 view .LVU1729 + 5452 .LBB514: +3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 5453 .loc 5 3140 3 view .LVU1730 + 5454 0064 6368 ldr r3, [r4, #4] + 5455 0066 23F07003 bic r3, r3, #112 + 5456 006a 43F01003 orr r3, r3, #16 + 5457 006e 6360 str r3, [r4, #4] + 5458 .LVL509: +3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 5459 .loc 5 3140 3 is_stmt 0 view .LVU1731 + 5460 .LBE514: + 5461 .LBE513: +1616:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ + 5462 .loc 1 1616 3 is_stmt 1 view .LVU1732 + 5463 .LBB515: + 5464 .LBI515: +3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + 5465 .loc 5 3235 22 view .LVU1733 + 5466 .LBB516: + 5467 .loc 5 3237 3 view .LVU1734 + 5468 0070 A368 ldr r3, [r4, #8] + 5469 0072 23F08003 bic r3, r3, #128 + 5470 0076 A360 str r3, [r4, #8] + 5471 .LVL510: + 5472 .loc 5 3237 3 is_stmt 0 view .LVU1735 + 5473 .LBE516: + 5474 .LBE515: +1621:Src/main.c **** + 5475 .loc 1 1621 1 view .LVU1736 + ARM GAS /tmp/ccwR4KB7.s page 326 + + + 5476 0078 06B0 add sp, sp, #24 + 5477 .LCFI58: + 5478 .cfi_def_cfa_offset 8 + 5479 @ sp needed + 5480 007a 10BD pop {r4, pc} + 5481 .L287: + 5482 .align 2 + 5483 .L286: + 5484 007c 00380240 .word 1073887232 + 5485 0080 00ED00E0 .word -536810240 + 5486 0084 00E100E0 .word -536813312 + 5487 0088 00140040 .word 1073746944 + 5488 .cfi_endproc + 5489 .LFE1199: + 5491 .section .text.MX_TIM6_Init,"ax",%progbits + 5492 .align 1 + 5493 .syntax unified + 5494 .thumb + 5495 .thumb_func + 5497 MX_TIM6_Init: + 5498 .LFB1198: 1555:Src/main.c **** - 4576 .loc 1 1555 3 is_stmt 1 view .LVU1467 - 4577 .LBB493: - 4578 .LBI493: -1896:Drivers/CMSIS/Include/core_cm7.h **** { - 4579 .loc 2 1896 22 view .LVU1468 - 4580 .LBB494: -1898:Drivers/CMSIS/Include/core_cm7.h **** { - 4581 .loc 2 1898 3 view .LVU1469 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4582 .loc 2 1900 5 view .LVU1470 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4583 .loc 2 1900 43 is_stmt 0 view .LVU1471 - 4584 003e 4FF40002 mov r2, #8388608 - 4585 0042 5A60 str r2, [r3, #4] - 4586 .LVL388: - ARM GAS /tmp/ccYgfTud.s page 301 - - -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4587 .loc 2 1900 43 view .LVU1472 - 4588 .LBE494: - 4589 .LBE493: -1560:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4590 .loc 1 1560 3 is_stmt 1 view .LVU1473 -1560:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4591 .loc 1 1560 28 is_stmt 0 view .LVU1474 - 4592 0044 40F29733 movw r3, #919 - 4593 0048 ADF80430 strh r3, [sp, #4] @ movhi -1561:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 4594 .loc 1 1561 3 is_stmt 1 view .LVU1475 -1561:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 4595 .loc 1 1561 30 is_stmt 0 view .LVU1476 - 4596 004c 0294 str r4, [sp, #8] -1562:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 4597 .loc 1 1562 3 is_stmt 1 view .LVU1477 -1562:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 4598 .loc 1 1562 29 is_stmt 0 view .LVU1478 - 4599 004e 6323 movs r3, #99 - 4600 0050 0393 str r3, [sp, #12] -1563:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); - 4601 .loc 1 1563 3 is_stmt 1 view .LVU1479 - 4602 0052 0D4C ldr r4, .L207+12 - 4603 0054 01A9 add r1, sp, #4 - 4604 0056 2046 mov r0, r4 - 4605 0058 FFF7FEFF bl LL_TIM_Init - 4606 .LVL389: -1564:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); - 4607 .loc 1 1564 3 view .LVU1480 - 4608 .LBB495: - 4609 .LBI495: -1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4610 .loc 5 1504 22 view .LVU1481 - 4611 .LBB496: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4612 .loc 5 1506 3 view .LVU1482 - 4613 005c 2368 ldr r3, [r4] - 4614 005e 23F08003 bic r3, r3, #128 - 4615 0062 2360 str r3, [r4] - 4616 .LVL390: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4617 .loc 5 1506 3 is_stmt 0 view .LVU1483 - 4618 .LBE496: - 4619 .LBE495: -1565:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); - 4620 .loc 1 1565 3 is_stmt 1 view .LVU1484 - 4621 .LBB497: - 4622 .LBI497: -3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4623 .loc 5 3138 22 view .LVU1485 - 4624 .LBB498: -3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4625 .loc 5 3140 3 view .LVU1486 - 4626 0064 6368 ldr r3, [r4, #4] - 4627 0066 23F07003 bic r3, r3, #112 - 4628 006a 43F01003 orr r3, r3, #16 - ARM GAS /tmp/ccYgfTud.s page 302 - - - 4629 006e 6360 str r3, [r4, #4] - 4630 .LVL391: -3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4631 .loc 5 3140 3 is_stmt 0 view .LVU1487 - 4632 .LBE498: - 4633 .LBE497: -1566:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ - 4634 .loc 1 1566 3 is_stmt 1 view .LVU1488 - 4635 .LBB499: - 4636 .LBI499: -3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4637 .loc 5 3235 22 view .LVU1489 - 4638 .LBB500: - 4639 .loc 5 3237 3 view .LVU1490 - 4640 0070 A368 ldr r3, [r4, #8] - 4641 0072 23F08003 bic r3, r3, #128 - 4642 0076 A360 str r3, [r4, #8] - 4643 .LVL392: - 4644 .loc 5 3237 3 is_stmt 0 view .LVU1491 - 4645 .LBE500: - 4646 .LBE499: -1571:Src/main.c **** - 4647 .loc 1 1571 1 view .LVU1492 - 4648 0078 06B0 add sp, sp, #24 - 4649 .LCFI49: - 4650 .cfi_def_cfa_offset 8 - 4651 @ sp needed - 4652 007a 10BD pop {r4, pc} - 4653 .L208: - 4654 .align 2 - 4655 .L207: - 4656 007c 00380240 .word 1073887232 - 4657 0080 00ED00E0 .word -536810240 - 4658 0084 00E100E0 .word -536813312 - 4659 0088 00140040 .word 1073746944 - 4660 .cfi_endproc - 4661 .LFE1199: - 4663 .section .text.MX_TIM6_Init,"ax",%progbits - 4664 .align 1 - 4665 .syntax unified - 4666 .thumb - 4667 .thumb_func - 4669 MX_TIM6_Init: - 4670 .LFB1198: -1505:Src/main.c **** - 4671 .loc 1 1505 1 is_stmt 1 view -0 - 4672 .cfi_startproc - 4673 @ args = 0, pretend = 0, frame = 24 - 4674 @ frame_needed = 0, uses_anonymous_args = 0 - 4675 0000 10B5 push {r4, lr} - 4676 .LCFI50: - 4677 .cfi_def_cfa_offset 8 - 4678 .cfi_offset 4, -8 - 4679 .cfi_offset 14, -4 - 4680 0002 86B0 sub sp, sp, #24 - 4681 .LCFI51: - 4682 .cfi_def_cfa_offset 32 - ARM GAS /tmp/ccYgfTud.s page 303 - - -1511:Src/main.c **** - 4683 .loc 1 1511 3 view .LVU1494 -1511:Src/main.c **** - 4684 .loc 1 1511 22 is_stmt 0 view .LVU1495 - 4685 0004 0024 movs r4, #0 - 4686 0006 0194 str r4, [sp, #4] - 4687 0008 0294 str r4, [sp, #8] - 4688 000a 0394 str r4, [sp, #12] - 4689 000c 0494 str r4, [sp, #16] - 4690 000e 0594 str r4, [sp, #20] -1514:Src/main.c **** - 4691 .loc 1 1514 3 is_stmt 1 view .LVU1496 - 4692 .LVL393: - 4693 .LBB501: - 4694 .LBI501: + 5499 .loc 1 1555 1 is_stmt 1 view -0 + 5500 .cfi_startproc + 5501 @ args = 0, pretend = 0, frame = 24 + 5502 @ frame_needed = 0, uses_anonymous_args = 0 + 5503 0000 10B5 push {r4, lr} + 5504 .LCFI59: + 5505 .cfi_def_cfa_offset 8 + 5506 .cfi_offset 4, -8 + 5507 .cfi_offset 14, -4 + 5508 0002 86B0 sub sp, sp, #24 + 5509 .LCFI60: + 5510 .cfi_def_cfa_offset 32 +1561:Src/main.c **** + 5511 .loc 1 1561 3 view .LVU1738 +1561:Src/main.c **** + 5512 .loc 1 1561 22 is_stmt 0 view .LVU1739 + 5513 0004 0024 movs r4, #0 + 5514 0006 0194 str r4, [sp, #4] + 5515 0008 0294 str r4, [sp, #8] + 5516 000a 0394 str r4, [sp, #12] + 5517 000c 0494 str r4, [sp, #16] + 5518 000e 0594 str r4, [sp, #20] +1564:Src/main.c **** + 5519 .loc 1 1564 3 is_stmt 1 view .LVU1740 + 5520 .LVL511: + 5521 .LBB517: + 5522 .LBI517: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4695 .loc 3 1071 22 view .LVU1497 - 4696 .LBB502: + 5523 .loc 3 1071 22 view .LVU1741 + 5524 .LBB518: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 4697 .loc 3 1073 3 view .LVU1498 + 5525 .loc 3 1073 3 view .LVU1742 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4698 .loc 3 1074 3 view .LVU1499 - 4699 0010 1A4B ldr r3, .L211 - 4700 0012 1A6C ldr r2, [r3, #64] - 4701 0014 42F01002 orr r2, r2, #16 - 4702 0018 1A64 str r2, [r3, #64] + 5526 .loc 3 1074 3 view .LVU1743 + 5527 0010 1A4B ldr r3, .L290 + ARM GAS /tmp/ccwR4KB7.s page 327 + + + 5528 0012 1A6C ldr r2, [r3, #64] + 5529 0014 42F01002 orr r2, r2, #16 + 5530 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4703 .loc 3 1076 3 view .LVU1500 + 5531 .loc 3 1076 3 view .LVU1744 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4704 .loc 3 1076 12 is_stmt 0 view .LVU1501 - 4705 001a 1B6C ldr r3, [r3, #64] - 4706 001c 03F01003 and r3, r3, #16 + 5532 .loc 3 1076 12 is_stmt 0 view .LVU1745 + 5533 001a 1B6C ldr r3, [r3, #64] + 5534 001c 03F01003 and r3, r3, #16 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4707 .loc 3 1076 10 view .LVU1502 - 4708 0020 0093 str r3, [sp] + 5535 .loc 3 1076 10 view .LVU1746 + 5536 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4709 .loc 3 1077 3 is_stmt 1 view .LVU1503 - 4710 0022 009B ldr r3, [sp] - 4711 .LVL394: + 5537 .loc 3 1077 3 is_stmt 1 view .LVU1747 + 5538 0022 009B ldr r3, [sp] + 5539 .LVL512: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4712 .loc 3 1077 3 is_stmt 0 view .LVU1504 - 4713 .LBE502: - 4714 .LBE501: -1517:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 4715 .loc 1 1517 3 is_stmt 1 view .LVU1505 - 4716 .LBB503: - 4717 .LBI503: + 5540 .loc 3 1077 3 is_stmt 0 view .LVU1748 + 5541 .LBE518: + 5542 .LBE517: +1567:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 5543 .loc 1 1567 3 is_stmt 1 view .LVU1749 + 5544 .LBB519: + 5545 .LBI519: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 4718 .loc 2 1884 26 view .LVU1506 - 4719 .LBB504: + 5546 .loc 2 1884 26 view .LVU1750 + 5547 .LBB520: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4720 .loc 2 1886 3 view .LVU1507 + 5548 .loc 2 1886 3 view .LVU1751 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 4721 .loc 2 1886 26 is_stmt 0 view .LVU1508 - 4722 0024 164B ldr r3, .L211+4 - 4723 0026 D868 ldr r0, [r3, #12] - 4724 .LBE504: - ARM GAS /tmp/ccYgfTud.s page 304 - - - 4725 .LBE503: -1517:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 4726 .loc 1 1517 3 discriminator 1 view .LVU1509 - 4727 0028 2246 mov r2, r4 - 4728 002a 2146 mov r1, r4 - 4729 002c C0F30220 ubfx r0, r0, #8, #3 - 4730 0030 FFF7FEFF bl NVIC_EncodePriority - 4731 .LVL395: - 4732 .LBB505: - 4733 .LBI505: + 5549 .loc 2 1886 26 is_stmt 0 view .LVU1752 + 5550 0024 164B ldr r3, .L290+4 + 5551 0026 D868 ldr r0, [r3, #12] + 5552 .LBE520: + 5553 .LBE519: +1567:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 5554 .loc 1 1567 3 discriminator 1 view .LVU1753 + 5555 0028 2246 mov r2, r4 + 5556 002a 2146 mov r1, r4 + 5557 002c C0F30220 ubfx r0, r0, #8, #3 + 5558 0030 FFF7FEFF bl NVIC_EncodePriority + 5559 .LVL513: + 5560 .LBB521: + 5561 .LBI521: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 4734 .loc 2 2024 22 is_stmt 1 view .LVU1510 - 4735 .LBB506: + 5562 .loc 2 2024 22 is_stmt 1 view .LVU1754 + 5563 .LBB522: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 4736 .loc 2 2026 3 view .LVU1511 + 5564 .loc 2 2026 3 view .LVU1755 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4737 .loc 2 2028 5 view .LVU1512 + 5565 .loc 2 2028 5 view .LVU1756 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4738 .loc 2 2028 49 is_stmt 0 view .LVU1513 - 4739 0034 0001 lsls r0, r0, #4 - 4740 .LVL396: + 5566 .loc 2 2028 49 is_stmt 0 view .LVU1757 + 5567 0034 0001 lsls r0, r0, #4 + 5568 .LVL514: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4741 .loc 2 2028 49 view .LVU1514 - 4742 0036 C0B2 uxtb r0, r0 + 5569 .loc 2 2028 49 view .LVU1758 + ARM GAS /tmp/ccwR4KB7.s page 328 + + + 5570 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4743 .loc 2 2028 47 view .LVU1515 - 4744 0038 124B ldr r3, .L211+8 - 4745 003a 83F83603 strb r0, [r3, #822] - 4746 .LVL397: + 5571 .loc 2 2028 47 view .LVU1759 + 5572 0038 124B ldr r3, .L290+8 + 5573 003a 83F83603 strb r0, [r3, #822] + 5574 .LVL515: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 4747 .loc 2 2028 47 view .LVU1516 - 4748 .LBE506: - 4749 .LBE505: -1518:Src/main.c **** - 4750 .loc 1 1518 3 is_stmt 1 view .LVU1517 - 4751 .LBB507: - 4752 .LBI507: + 5575 .loc 2 2028 47 view .LVU1760 + 5576 .LBE522: + 5577 .LBE521: +1568:Src/main.c **** + 5578 .loc 1 1568 3 is_stmt 1 view .LVU1761 + 5579 .LBB523: + 5580 .LBI523: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 4753 .loc 2 1896 22 view .LVU1518 - 4754 .LBB508: + 5581 .loc 2 1896 22 view .LVU1762 + 5582 .LBB524: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 4755 .loc 2 1898 3 view .LVU1519 + 5583 .loc 2 1898 3 view .LVU1763 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4756 .loc 2 1900 5 view .LVU1520 + 5584 .loc 2 1900 5 view .LVU1764 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4757 .loc 2 1900 43 is_stmt 0 view .LVU1521 - 4758 003e 4FF48002 mov r2, #4194304 - 4759 0042 5A60 str r2, [r3, #4] - 4760 .LVL398: + 5585 .loc 2 1900 43 is_stmt 0 view .LVU1765 + 5586 003e 4FF48002 mov r2, #4194304 + 5587 0042 5A60 str r2, [r3, #4] + 5588 .LVL516: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 4761 .loc 2 1900 43 view .LVU1522 - 4762 .LBE508: - 4763 .LBE507: -1523:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4764 .loc 1 1523 3 is_stmt 1 view .LVU1523 -1523:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 4765 .loc 1 1523 28 is_stmt 0 view .LVU1524 - ARM GAS /tmp/ccYgfTud.s page 305 + 5589 .loc 2 1900 43 view .LVU1766 + 5590 .LBE524: + 5591 .LBE523: +1573:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5592 .loc 1 1573 3 is_stmt 1 view .LVU1767 +1573:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 5593 .loc 1 1573 28 is_stmt 0 view .LVU1768 + 5594 0044 4BF2AF33 movw r3, #45999 + 5595 0048 ADF80430 strh r3, [sp, #4] @ movhi +1574:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 5596 .loc 1 1574 3 is_stmt 1 view .LVU1769 +1574:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 5597 .loc 1 1574 30 is_stmt 0 view .LVU1770 + 5598 004c 0294 str r4, [sp, #8] +1575:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 5599 .loc 1 1575 3 is_stmt 1 view .LVU1771 +1575:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 5600 .loc 1 1575 29 is_stmt 0 view .LVU1772 + 5601 004e 1323 movs r3, #19 + 5602 0050 0393 str r3, [sp, #12] +1576:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); + 5603 .loc 1 1576 3 is_stmt 1 view .LVU1773 + 5604 0052 0D4C ldr r4, .L290+12 + 5605 0054 01A9 add r1, sp, #4 + 5606 0056 2046 mov r0, r4 + 5607 0058 FFF7FEFF bl LL_TIM_Init + 5608 .LVL517: +1577:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); + 5609 .loc 1 1577 3 view .LVU1774 + 5610 .LBB525: + ARM GAS /tmp/ccwR4KB7.s page 329 - 4766 0044 4BF2AF33 movw r3, #45999 - 4767 0048 ADF80430 strh r3, [sp, #4] @ movhi -1524:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 4768 .loc 1 1524 3 is_stmt 1 view .LVU1525 -1524:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 4769 .loc 1 1524 30 is_stmt 0 view .LVU1526 - 4770 004c 0294 str r4, [sp, #8] -1525:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 4771 .loc 1 1525 3 is_stmt 1 view .LVU1527 -1525:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 4772 .loc 1 1525 29 is_stmt 0 view .LVU1528 - 4773 004e 1323 movs r3, #19 - 4774 0050 0393 str r3, [sp, #12] -1526:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); - 4775 .loc 1 1526 3 is_stmt 1 view .LVU1529 - 4776 0052 0D4C ldr r4, .L211+12 - 4777 0054 01A9 add r1, sp, #4 - 4778 0056 2046 mov r0, r4 - 4779 0058 FFF7FEFF bl LL_TIM_Init - 4780 .LVL399: -1527:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); - 4781 .loc 1 1527 3 view .LVU1530 - 4782 .LBB509: - 4783 .LBI509: + 5611 .LBI525: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4784 .loc 5 1504 22 view .LVU1531 - 4785 .LBB510: + 5612 .loc 5 1504 22 view .LVU1775 + 5613 .LBB526: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4786 .loc 5 1506 3 view .LVU1532 - 4787 005c 2368 ldr r3, [r4] - 4788 005e 23F08003 bic r3, r3, #128 - 4789 0062 2360 str r3, [r4] - 4790 .LVL400: + 5614 .loc 5 1506 3 view .LVU1776 + 5615 005c 2368 ldr r3, [r4] + 5616 005e 23F08003 bic r3, r3, #128 + 5617 0062 2360 str r3, [r4] + 5618 .LVL518: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4791 .loc 5 1506 3 is_stmt 0 view .LVU1533 - 4792 .LBE510: - 4793 .LBE509: -1528:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); - 4794 .loc 1 1528 3 is_stmt 1 view .LVU1534 - 4795 .LBB511: - 4796 .LBI511: + 5619 .loc 5 1506 3 is_stmt 0 view .LVU1777 + 5620 .LBE526: + 5621 .LBE525: +1578:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); + 5622 .loc 1 1578 3 is_stmt 1 view .LVU1778 + 5623 .LBB527: + 5624 .LBI527: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4797 .loc 5 3138 22 view .LVU1535 - 4798 .LBB512: + 5625 .loc 5 3138 22 view .LVU1779 + 5626 .LBB528: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4799 .loc 5 3140 3 view .LVU1536 - 4800 0064 6368 ldr r3, [r4, #4] - 4801 0066 23F07003 bic r3, r3, #112 - 4802 006a 43F01003 orr r3, r3, #16 - 4803 006e 6360 str r3, [r4, #4] - 4804 .LVL401: + 5627 .loc 5 3140 3 view .LVU1780 + 5628 0064 6368 ldr r3, [r4, #4] + 5629 0066 23F07003 bic r3, r3, #112 + 5630 006a 43F01003 orr r3, r3, #16 + 5631 006e 6360 str r3, [r4, #4] + 5632 .LVL519: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 4805 .loc 5 3140 3 is_stmt 0 view .LVU1537 - 4806 .LBE512: - 4807 .LBE511: -1529:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ - 4808 .loc 1 1529 3 is_stmt 1 view .LVU1538 - ARM GAS /tmp/ccYgfTud.s page 306 - - - 4809 .LBB513: - 4810 .LBI513: + 5633 .loc 5 3140 3 is_stmt 0 view .LVU1781 + 5634 .LBE528: + 5635 .LBE527: +1579:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ + 5636 .loc 1 1579 3 is_stmt 1 view .LVU1782 + 5637 .LBB529: + 5638 .LBI529: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 4811 .loc 5 3235 22 view .LVU1539 - 4812 .LBB514: - 4813 .loc 5 3237 3 view .LVU1540 - 4814 0070 A368 ldr r3, [r4, #8] - 4815 0072 23F08003 bic r3, r3, #128 - 4816 0076 A360 str r3, [r4, #8] - 4817 .LVL402: - 4818 .loc 5 3237 3 is_stmt 0 view .LVU1541 - 4819 .LBE514: - 4820 .LBE513: -1534:Src/main.c **** - 4821 .loc 1 1534 1 view .LVU1542 - 4822 0078 06B0 add sp, sp, #24 - 4823 .LCFI52: - 4824 .cfi_def_cfa_offset 8 - 4825 @ sp needed - 4826 007a 10BD pop {r4, pc} - 4827 .L212: - 4828 .align 2 - 4829 .L211: - 4830 007c 00380240 .word 1073887232 - 4831 0080 00ED00E0 .word -536810240 - 4832 0084 00E100E0 .word -536813312 - 4833 0088 00100040 .word 1073745920 - 4834 .cfi_endproc - 4835 .LFE1198: - 4837 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 - 4838 .align 2 - 4839 .LC0: - 4840 0000 2F00 .ascii "/\000" - 4841 0002 0000 .align 2 - 4842 .LC1: - 4843 0004 434F4D4D .ascii "COMMAND.TXT\000" - 4843 414E442E - 4843 54585400 - 4844 .section .text.Init_params,"ax",%progbits - 4845 .align 1 - 4846 .syntax unified - 4847 .thumb - 4848 .thumb_func - 4850 Init_params: - 4851 .LFB1207: -2004:Src/main.c **** TO6 = 0; - 4852 .loc 1 2004 1 is_stmt 1 view -0 - 4853 .cfi_startproc - 4854 @ args = 0, pretend = 0, frame = 0 - 4855 @ frame_needed = 0, uses_anonymous_args = 0 - 4856 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 4857 .LCFI53: - 4858 .cfi_def_cfa_offset 24 - 4859 .cfi_offset 4, -24 - 4860 .cfi_offset 5, -20 - 4861 .cfi_offset 6, -16 - 4862 .cfi_offset 7, -12 - ARM GAS /tmp/ccYgfTud.s page 307 + 5639 .loc 5 3235 22 view .LVU1783 + 5640 .LBB530: + 5641 .loc 5 3237 3 view .LVU1784 + 5642 0070 A368 ldr r3, [r4, #8] + 5643 0072 23F08003 bic r3, r3, #128 + 5644 0076 A360 str r3, [r4, #8] + 5645 .LVL520: + 5646 .loc 5 3237 3 is_stmt 0 view .LVU1785 + 5647 .LBE530: + 5648 .LBE529: +1584:Src/main.c **** + 5649 .loc 1 1584 1 view .LVU1786 + 5650 0078 06B0 add sp, sp, #24 + 5651 .LCFI61: + 5652 .cfi_def_cfa_offset 8 + 5653 @ sp needed + 5654 007a 10BD pop {r4, pc} + 5655 .L291: + 5656 .align 2 + 5657 .L290: + ARM GAS /tmp/ccwR4KB7.s page 330 - 4863 .cfi_offset 8, -8 - 4864 .cfi_offset 14, -4 -2005:Src/main.c **** TO7 = 0; - 4865 .loc 1 2005 2 view .LVU1544 -2005:Src/main.c **** TO7 = 0; - 4866 .loc 1 2005 6 is_stmt 0 view .LVU1545 - 4867 0004 0023 movs r3, #0 - 4868 0006 9F4A ldr r2, .L225 - 4869 0008 1360 str r3, [r2] -2006:Src/main.c **** TO7_before = 0; - 4870 .loc 1 2006 2 is_stmt 1 view .LVU1546 -2006:Src/main.c **** TO7_before = 0; - 4871 .loc 1 2006 6 is_stmt 0 view .LVU1547 - 4872 000a 9F4A ldr r2, .L225+4 - 4873 000c 1360 str r3, [r2] -2007:Src/main.c **** TO6_before = 0; - 4874 .loc 1 2007 2 is_stmt 1 view .LVU1548 -2007:Src/main.c **** TO6_before = 0; - 4875 .loc 1 2007 13 is_stmt 0 view .LVU1549 - 4876 000e 9F4A ldr r2, .L225+8 - 4877 0010 1360 str r3, [r2] -2008:Src/main.c **** TO6_uart = 0; - 4878 .loc 1 2008 2 is_stmt 1 view .LVU1550 -2008:Src/main.c **** TO6_uart = 0; - 4879 .loc 1 2008 13 is_stmt 0 view .LVU1551 - 4880 0012 9F4A ldr r2, .L225+12 - 4881 0014 1360 str r3, [r2] -2009:Src/main.c **** flg_tmt = 0; - 4882 .loc 1 2009 2 is_stmt 1 view .LVU1552 -2009:Src/main.c **** flg_tmt = 0; - 4883 .loc 1 2009 11 is_stmt 0 view .LVU1553 - 4884 0016 9F4A ldr r2, .L225+16 - 4885 0018 1360 str r3, [r2] -2010:Src/main.c **** UART_rec_incr = 0; - 4886 .loc 1 2010 2 is_stmt 1 view .LVU1554 -2010:Src/main.c **** UART_rec_incr = 0; - 4887 .loc 1 2010 10 is_stmt 0 view .LVU1555 - 4888 001a 9F4A ldr r2, .L225+20 - 4889 001c 1370 strb r3, [r2] -2011:Src/main.c **** fgoto = 0; - 4890 .loc 1 2011 2 is_stmt 1 view .LVU1556 -2011:Src/main.c **** fgoto = 0; - 4891 .loc 1 2011 16 is_stmt 0 view .LVU1557 - 4892 001e 9F4A ldr r2, .L225+24 - 4893 0020 1380 strh r3, [r2] @ movhi -2012:Src/main.c **** sizeoffile = 0; - 4894 .loc 1 2012 2 is_stmt 1 view .LVU1558 -2012:Src/main.c **** sizeoffile = 0; - 4895 .loc 1 2012 8 is_stmt 0 view .LVU1559 - 4896 0022 9F4A ldr r2, .L225+28 - 4897 0024 1360 str r3, [r2] -2013:Src/main.c **** u_tx_flg = 0; - 4898 .loc 1 2013 2 is_stmt 1 view .LVU1560 -2013:Src/main.c **** u_tx_flg = 0; - 4899 .loc 1 2013 13 is_stmt 0 view .LVU1561 - 4900 0026 9F4A ldr r2, .L225+32 - 4901 0028 1360 str r3, [r2] - ARM GAS /tmp/ccYgfTud.s page 308 + 5658 007c 00380240 .word 1073887232 + 5659 0080 00ED00E0 .word -536810240 + 5660 0084 00E100E0 .word -536813312 + 5661 0088 00100040 .word 1073745920 + 5662 .cfi_endproc + 5663 .LFE1198: + 5665 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 + 5666 .align 2 + 5667 .LC0: + 5668 0000 2F00 .ascii "/\000" + 5669 0002 0000 .align 2 + 5670 .LC1: + 5671 0004 434F4D4D .ascii "COMMAND.TXT\000" + 5671 414E442E + 5671 54585400 + 5672 .section .text.Init_params,"ax",%progbits + 5673 .align 1 + 5674 .syntax unified + 5675 .thumb + 5676 .thumb_func + 5678 Init_params: + 5679 .LFB1207: +2054:Src/main.c **** TO6 = 0; + 5680 .loc 1 2054 1 is_stmt 1 view -0 + 5681 .cfi_startproc + 5682 @ args = 0, pretend = 0, frame = 0 + 5683 @ frame_needed = 0, uses_anonymous_args = 0 + 5684 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 5685 .LCFI62: + 5686 .cfi_def_cfa_offset 24 + 5687 .cfi_offset 4, -24 + 5688 .cfi_offset 5, -20 + 5689 .cfi_offset 6, -16 + 5690 .cfi_offset 7, -12 + 5691 .cfi_offset 8, -8 + 5692 .cfi_offset 14, -4 +2055:Src/main.c **** TO7 = 0; + 5693 .loc 1 2055 2 view .LVU1788 +2055:Src/main.c **** TO7 = 0; + 5694 .loc 1 2055 6 is_stmt 0 view .LVU1789 + 5695 0004 0023 movs r3, #0 + 5696 0006 9F4A ldr r2, .L304 + 5697 0008 1360 str r3, [r2] +2056:Src/main.c **** TO7_before = 0; + 5698 .loc 1 2056 2 is_stmt 1 view .LVU1790 +2056:Src/main.c **** TO7_before = 0; + 5699 .loc 1 2056 6 is_stmt 0 view .LVU1791 + 5700 000a 9F4A ldr r2, .L304+4 + 5701 000c 1360 str r3, [r2] +2057:Src/main.c **** TO6_before = 0; + 5702 .loc 1 2057 2 is_stmt 1 view .LVU1792 +2057:Src/main.c **** TO6_before = 0; + 5703 .loc 1 2057 13 is_stmt 0 view .LVU1793 + 5704 000e 9F4A ldr r2, .L304+8 + 5705 0010 1360 str r3, [r2] +2058:Src/main.c **** TO6_uart = 0; + 5706 .loc 1 2058 2 is_stmt 1 view .LVU1794 + ARM GAS /tmp/ccwR4KB7.s page 331 -2014:Src/main.c **** u_rx_flg = 0; - 4902 .loc 1 2014 2 is_stmt 1 view .LVU1562 -2014:Src/main.c **** u_rx_flg = 0; - 4903 .loc 1 2014 11 is_stmt 0 view .LVU1563 - 4904 002a 9F4A ldr r2, .L225+36 - 4905 002c 1370 strb r3, [r2] -2015:Src/main.c **** //State_Data[0]=0; - 4906 .loc 1 2015 2 is_stmt 1 view .LVU1564 -2015:Src/main.c **** //State_Data[0]=0; - 4907 .loc 1 2015 11 is_stmt 0 view .LVU1565 - 4908 002e 9F4A ldr r2, .L225+40 - 4909 0030 1370 strb r3, [r2] -2018:Src/main.c **** { - 4910 .loc 1 2018 2 is_stmt 1 view .LVU1566 - 4911 .LBB515: -2018:Src/main.c **** { - 4912 .loc 1 2018 7 view .LVU1567 - 4913 .LVL403: -2018:Src/main.c **** { - 4914 .loc 1 2018 2 is_stmt 0 view .LVU1568 - 4915 0032 05E0 b .L214 - 4916 .LVL404: - 4917 .L215: -2020:Src/main.c **** } - 4918 .loc 1 2020 3 is_stmt 1 view .LVU1569 -2020:Src/main.c **** } - 4919 .loc 1 2020 16 is_stmt 0 view .LVU1570 - 4920 0034 9E4A ldr r2, .L225+44 - 4921 0036 0021 movs r1, #0 - 4922 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi -2018:Src/main.c **** { - 4923 .loc 1 2018 31 is_stmt 1 discriminator 3 view .LVU1571 - 4924 003c 0133 adds r3, r3, #1 - 4925 .LVL405: -2018:Src/main.c **** { - 4926 .loc 1 2018 31 is_stmt 0 discriminator 3 view .LVU1572 - 4927 003e 9BB2 uxth r3, r3 - 4928 .LVL406: - 4929 .L214: -2018:Src/main.c **** { - 4930 .loc 1 2018 22 is_stmt 1 discriminator 1 view .LVU1573 - 4931 0040 0E2B cmp r3, #14 - 4932 0042 F7D9 bls .L215 - 4933 .LBE515: -2022:Src/main.c **** - 4934 .loc 1 2022 2 view .LVU1574 -2022:Src/main.c **** - 4935 .loc 1 2022 14 is_stmt 0 view .LVU1575 - 4936 0044 9A4B ldr r3, .L225+44 - 4937 .LVL407: -2022:Src/main.c **** - 4938 .loc 1 2022 14 view .LVU1576 - 4939 0046 41F21112 movw r2, #4369 - 4940 004a 1A80 strh r2, [r3] @ movhi -2025:Src/main.c **** Def_setup.LD1_EN = 0; - 4941 .loc 1 2025 2 is_stmt 1 view .LVU1577 -2025:Src/main.c **** Def_setup.LD1_EN = 0; - ARM GAS /tmp/ccYgfTud.s page 309 +2058:Src/main.c **** TO6_uart = 0; + 5707 .loc 1 2058 13 is_stmt 0 view .LVU1795 + 5708 0012 9F4A ldr r2, .L304+12 + 5709 0014 1360 str r3, [r2] +2059:Src/main.c **** flg_tmt = 0; + 5710 .loc 1 2059 2 is_stmt 1 view .LVU1796 +2059:Src/main.c **** flg_tmt = 0; + 5711 .loc 1 2059 11 is_stmt 0 view .LVU1797 + 5712 0016 9F4A ldr r2, .L304+16 + 5713 0018 1360 str r3, [r2] +2060:Src/main.c **** UART_rec_incr = 0; + 5714 .loc 1 2060 2 is_stmt 1 view .LVU1798 +2060:Src/main.c **** UART_rec_incr = 0; + 5715 .loc 1 2060 10 is_stmt 0 view .LVU1799 + 5716 001a 9F4A ldr r2, .L304+20 + 5717 001c 1370 strb r3, [r2] +2061:Src/main.c **** fgoto = 0; + 5718 .loc 1 2061 2 is_stmt 1 view .LVU1800 +2061:Src/main.c **** fgoto = 0; + 5719 .loc 1 2061 16 is_stmt 0 view .LVU1801 + 5720 001e 9F4A ldr r2, .L304+24 + 5721 0020 1380 strh r3, [r2] @ movhi +2062:Src/main.c **** sizeoffile = 0; + 5722 .loc 1 2062 2 is_stmt 1 view .LVU1802 +2062:Src/main.c **** sizeoffile = 0; + 5723 .loc 1 2062 8 is_stmt 0 view .LVU1803 + 5724 0022 9F4A ldr r2, .L304+28 + 5725 0024 1360 str r3, [r2] +2063:Src/main.c **** u_tx_flg = 0; + 5726 .loc 1 2063 2 is_stmt 1 view .LVU1804 +2063:Src/main.c **** u_tx_flg = 0; + 5727 .loc 1 2063 13 is_stmt 0 view .LVU1805 + 5728 0026 9F4A ldr r2, .L304+32 + 5729 0028 1360 str r3, [r2] +2064:Src/main.c **** u_rx_flg = 0; + 5730 .loc 1 2064 2 is_stmt 1 view .LVU1806 +2064:Src/main.c **** u_rx_flg = 0; + 5731 .loc 1 2064 11 is_stmt 0 view .LVU1807 + 5732 002a 9F4A ldr r2, .L304+36 + 5733 002c 1370 strb r3, [r2] +2065:Src/main.c **** //State_Data[0]=0; + 5734 .loc 1 2065 2 is_stmt 1 view .LVU1808 +2065:Src/main.c **** //State_Data[0]=0; + 5735 .loc 1 2065 11 is_stmt 0 view .LVU1809 + 5736 002e 9F4A ldr r2, .L304+40 + 5737 0030 1370 strb r3, [r2] +2068:Src/main.c **** { + 5738 .loc 1 2068 2 is_stmt 1 view .LVU1810 + 5739 .LBB531: +2068:Src/main.c **** { + 5740 .loc 1 2068 7 view .LVU1811 + 5741 .LVL521: +2068:Src/main.c **** { + 5742 .loc 1 2068 2 is_stmt 0 view .LVU1812 + 5743 0032 05E0 b .L293 + 5744 .LVL522: + 5745 .L294: + ARM GAS /tmp/ccwR4KB7.s page 332 - 4942 .loc 1 2025 21 is_stmt 0 view .LVU1578 - 4943 004c 994B ldr r3, .L225+48 - 4944 004e 0022 movs r2, #0 - 4945 0050 DA81 strh r2, [r3, #14] @ movhi -2026:Src/main.c **** Def_setup.LD2_EN = 0; - 4946 .loc 1 2026 2 is_stmt 1 view .LVU1579 -2026:Src/main.c **** Def_setup.LD2_EN = 0; - 4947 .loc 1 2026 19 is_stmt 0 view .LVU1580 - 4948 0052 DA70 strb r2, [r3, #3] -2027:Src/main.c **** Def_setup.MES_ID = 0; - 4949 .loc 1 2027 2 is_stmt 1 view .LVU1581 -2027:Src/main.c **** Def_setup.MES_ID = 0; - 4950 .loc 1 2027 19 is_stmt 0 view .LVU1582 - 4951 0054 1A71 strb r2, [r3, #4] -2028:Src/main.c **** Def_setup.PI1_RD = 0; - 4952 .loc 1 2028 2 is_stmt 1 view .LVU1583 -2028:Src/main.c **** Def_setup.PI1_RD = 0; - 4953 .loc 1 2028 19 is_stmt 0 view .LVU1584 - 4954 0056 1A82 strh r2, [r3, #16] @ movhi -2029:Src/main.c **** Def_setup.PI2_RD = 0; - 4955 .loc 1 2029 2 is_stmt 1 view .LVU1585 -2029:Src/main.c **** Def_setup.PI2_RD = 0; - 4956 .loc 1 2029 19 is_stmt 0 view .LVU1586 - 4957 0058 1A73 strb r2, [r3, #12] -2030:Src/main.c **** Def_setup.REF1_EN = 0; - 4958 .loc 1 2030 2 is_stmt 1 view .LVU1587 -2030:Src/main.c **** Def_setup.REF1_EN = 0; - 4959 .loc 1 2030 19 is_stmt 0 view .LVU1588 - 4960 005a 5A73 strb r2, [r3, #13] -2031:Src/main.c **** Def_setup.REF2_EN = 0; - 4961 .loc 1 2031 2 is_stmt 1 view .LVU1589 -2031:Src/main.c **** Def_setup.REF2_EN = 0; - 4962 .loc 1 2031 20 is_stmt 0 view .LVU1590 - 4963 005c 5A71 strb r2, [r3, #5] -2032:Src/main.c **** Def_setup.SD_EN = 0; - 4964 .loc 1 2032 2 is_stmt 1 view .LVU1591 -2032:Src/main.c **** Def_setup.SD_EN = 0; - 4965 .loc 1 2032 20 is_stmt 0 view .LVU1592 - 4966 005e 9A71 strb r2, [r3, #6] -2033:Src/main.c **** Def_setup.TEC1_EN = 0; - 4967 .loc 1 2033 2 is_stmt 1 view .LVU1593 -2033:Src/main.c **** Def_setup.TEC1_EN = 0; - 4968 .loc 1 2033 18 is_stmt 0 view .LVU1594 - 4969 0060 DA72 strb r2, [r3, #11] -2034:Src/main.c **** Def_setup.TEC2_EN = 0; - 4970 .loc 1 2034 2 is_stmt 1 view .LVU1595 -2034:Src/main.c **** Def_setup.TEC2_EN = 0; - 4971 .loc 1 2034 20 is_stmt 0 view .LVU1596 - 4972 0062 DA71 strb r2, [r3, #7] -2035:Src/main.c **** Def_setup.TS1_EN = 0; - 4973 .loc 1 2035 2 is_stmt 1 view .LVU1597 -2035:Src/main.c **** Def_setup.TS1_EN = 0; - 4974 .loc 1 2035 20 is_stmt 0 view .LVU1598 - 4975 0064 1A72 strb r2, [r3, #8] -2036:Src/main.c **** Def_setup.TS2_EN = 0; - 4976 .loc 1 2036 2 is_stmt 1 view .LVU1599 -2036:Src/main.c **** Def_setup.TS2_EN = 0; - ARM GAS /tmp/ccYgfTud.s page 310 +2070:Src/main.c **** } + 5746 .loc 1 2070 3 is_stmt 1 view .LVU1813 +2070:Src/main.c **** } + 5747 .loc 1 2070 16 is_stmt 0 view .LVU1814 + 5748 0034 9E4A ldr r2, .L304+44 + 5749 0036 0021 movs r1, #0 + 5750 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi +2068:Src/main.c **** { + 5751 .loc 1 2068 31 is_stmt 1 discriminator 3 view .LVU1815 + 5752 003c 0133 adds r3, r3, #1 + 5753 .LVL523: +2068:Src/main.c **** { + 5754 .loc 1 2068 31 is_stmt 0 discriminator 3 view .LVU1816 + 5755 003e 9BB2 uxth r3, r3 + 5756 .LVL524: + 5757 .L293: +2068:Src/main.c **** { + 5758 .loc 1 2068 22 is_stmt 1 discriminator 1 view .LVU1817 + 5759 0040 0E2B cmp r3, #14 + 5760 0042 F7D9 bls .L294 + 5761 .LBE531: +2072:Src/main.c **** + 5762 .loc 1 2072 2 view .LVU1818 +2072:Src/main.c **** + 5763 .loc 1 2072 14 is_stmt 0 view .LVU1819 + 5764 0044 9A4B ldr r3, .L304+44 + 5765 .LVL525: +2072:Src/main.c **** + 5766 .loc 1 2072 14 view .LVU1820 + 5767 0046 41F21112 movw r2, #4369 + 5768 004a 1A80 strh r2, [r3] @ movhi +2075:Src/main.c **** Def_setup.LD1_EN = 0; + 5769 .loc 1 2075 2 is_stmt 1 view .LVU1821 +2075:Src/main.c **** Def_setup.LD1_EN = 0; + 5770 .loc 1 2075 21 is_stmt 0 view .LVU1822 + 5771 004c 994B ldr r3, .L304+48 + 5772 004e 0022 movs r2, #0 + 5773 0050 DA81 strh r2, [r3, #14] @ movhi +2076:Src/main.c **** Def_setup.LD2_EN = 0; + 5774 .loc 1 2076 2 is_stmt 1 view .LVU1823 +2076:Src/main.c **** Def_setup.LD2_EN = 0; + 5775 .loc 1 2076 19 is_stmt 0 view .LVU1824 + 5776 0052 DA70 strb r2, [r3, #3] +2077:Src/main.c **** Def_setup.MES_ID = 0; + 5777 .loc 1 2077 2 is_stmt 1 view .LVU1825 +2077:Src/main.c **** Def_setup.MES_ID = 0; + 5778 .loc 1 2077 19 is_stmt 0 view .LVU1826 + 5779 0054 1A71 strb r2, [r3, #4] +2078:Src/main.c **** Def_setup.PI1_RD = 0; + 5780 .loc 1 2078 2 is_stmt 1 view .LVU1827 +2078:Src/main.c **** Def_setup.PI1_RD = 0; + 5781 .loc 1 2078 19 is_stmt 0 view .LVU1828 + 5782 0056 1A82 strh r2, [r3, #16] @ movhi +2079:Src/main.c **** Def_setup.PI2_RD = 0; + 5783 .loc 1 2079 2 is_stmt 1 view .LVU1829 +2079:Src/main.c **** Def_setup.PI2_RD = 0; + 5784 .loc 1 2079 19 is_stmt 0 view .LVU1830 + ARM GAS /tmp/ccwR4KB7.s page 333 - 4977 .loc 1 2036 19 is_stmt 0 view .LVU1600 - 4978 0066 5A72 strb r2, [r3, #9] -2037:Src/main.c **** Def_setup.U5V1_EN = 0; - 4979 .loc 1 2037 2 is_stmt 1 view .LVU1601 -2037:Src/main.c **** Def_setup.U5V1_EN = 0; - 4980 .loc 1 2037 19 is_stmt 0 view .LVU1602 - 4981 0068 9A72 strb r2, [r3, #10] -2038:Src/main.c **** Def_setup.U5V2_EN = 0; - 4982 .loc 1 2038 2 is_stmt 1 view .LVU1603 -2038:Src/main.c **** Def_setup.U5V2_EN = 0; - 4983 .loc 1 2038 20 is_stmt 0 view .LVU1604 - 4984 006a 5A70 strb r2, [r3, #1] -2039:Src/main.c **** Def_setup.WORK_EN = 0; - 4985 .loc 1 2039 2 is_stmt 1 view .LVU1605 -2039:Src/main.c **** Def_setup.WORK_EN = 0; - 4986 .loc 1 2039 20 is_stmt 0 view .LVU1606 - 4987 006c 9A70 strb r2, [r3, #2] -2040:Src/main.c **** - 4988 .loc 1 2040 2 is_stmt 1 view .LVU1607 -2040:Src/main.c **** - 4989 .loc 1 2040 20 is_stmt 0 view .LVU1608 - 4990 006e 1A70 strb r2, [r3] -2042:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 4991 .loc 1 2042 2 is_stmt 1 view .LVU1609 -2042:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 4992 .loc 1 2042 24 is_stmt 0 view .LVU1610 - 4993 0070 914D ldr r5, .L225+52 - 4994 0072 2A80 strh r2, [r5] @ movhi -2043:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 4995 .loc 1 2043 2 is_stmt 1 view .LVU1611 -2043:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 4996 .loc 1 2043 24 is_stmt 0 view .LVU1612 - 4997 0074 914C ldr r4, .L225+56 - 4998 0076 2280 strh r2, [r4] @ movhi -2044:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 4999 .loc 1 2044 2 is_stmt 1 view .LVU1613 -2044:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 5000 .loc 1 2044 28 is_stmt 0 view .LVU1614 - 5001 0078 0022 movs r2, #0 - 5002 007a 6A60 str r2, [r5, #4] @ float -2045:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 5003 .loc 1 2045 2 is_stmt 1 view .LVU1615 -2045:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 5004 .loc 1 2045 28 is_stmt 0 view .LVU1616 - 5005 007c 6260 str r2, [r4, #4] @ float -2046:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 5006 .loc 1 2046 2 is_stmt 1 view .LVU1617 -2046:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 5007 .loc 1 2046 28 is_stmt 0 view .LVU1618 - 5008 007e AA60 str r2, [r5, #8] @ float -2047:Src/main.c **** - 5009 .loc 1 2047 2 is_stmt 1 view .LVU1619 -2047:Src/main.c **** - 5010 .loc 1 2047 28 is_stmt 0 view .LVU1620 - 5011 0080 A260 str r2, [r4, #8] @ float -2050:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 5012 .loc 1 2050 2 is_stmt 1 view .LVU1621 - ARM GAS /tmp/ccYgfTud.s page 311 + 5785 0058 1A73 strb r2, [r3, #12] +2080:Src/main.c **** Def_setup.REF1_EN = 0; + 5786 .loc 1 2080 2 is_stmt 1 view .LVU1831 +2080:Src/main.c **** Def_setup.REF1_EN = 0; + 5787 .loc 1 2080 19 is_stmt 0 view .LVU1832 + 5788 005a 5A73 strb r2, [r3, #13] +2081:Src/main.c **** Def_setup.REF2_EN = 0; + 5789 .loc 1 2081 2 is_stmt 1 view .LVU1833 +2081:Src/main.c **** Def_setup.REF2_EN = 0; + 5790 .loc 1 2081 20 is_stmt 0 view .LVU1834 + 5791 005c 5A71 strb r2, [r3, #5] +2082:Src/main.c **** Def_setup.SD_EN = 0; + 5792 .loc 1 2082 2 is_stmt 1 view .LVU1835 +2082:Src/main.c **** Def_setup.SD_EN = 0; + 5793 .loc 1 2082 20 is_stmt 0 view .LVU1836 + 5794 005e 9A71 strb r2, [r3, #6] +2083:Src/main.c **** Def_setup.TEC1_EN = 0; + 5795 .loc 1 2083 2 is_stmt 1 view .LVU1837 +2083:Src/main.c **** Def_setup.TEC1_EN = 0; + 5796 .loc 1 2083 18 is_stmt 0 view .LVU1838 + 5797 0060 DA72 strb r2, [r3, #11] +2084:Src/main.c **** Def_setup.TEC2_EN = 0; + 5798 .loc 1 2084 2 is_stmt 1 view .LVU1839 +2084:Src/main.c **** Def_setup.TEC2_EN = 0; + 5799 .loc 1 2084 20 is_stmt 0 view .LVU1840 + 5800 0062 DA71 strb r2, [r3, #7] +2085:Src/main.c **** Def_setup.TS1_EN = 0; + 5801 .loc 1 2085 2 is_stmt 1 view .LVU1841 +2085:Src/main.c **** Def_setup.TS1_EN = 0; + 5802 .loc 1 2085 20 is_stmt 0 view .LVU1842 + 5803 0064 1A72 strb r2, [r3, #8] +2086:Src/main.c **** Def_setup.TS2_EN = 0; + 5804 .loc 1 2086 2 is_stmt 1 view .LVU1843 +2086:Src/main.c **** Def_setup.TS2_EN = 0; + 5805 .loc 1 2086 19 is_stmt 0 view .LVU1844 + 5806 0066 5A72 strb r2, [r3, #9] +2087:Src/main.c **** Def_setup.U5V1_EN = 0; + 5807 .loc 1 2087 2 is_stmt 1 view .LVU1845 +2087:Src/main.c **** Def_setup.U5V1_EN = 0; + 5808 .loc 1 2087 19 is_stmt 0 view .LVU1846 + 5809 0068 9A72 strb r2, [r3, #10] +2088:Src/main.c **** Def_setup.U5V2_EN = 0; + 5810 .loc 1 2088 2 is_stmt 1 view .LVU1847 +2088:Src/main.c **** Def_setup.U5V2_EN = 0; + 5811 .loc 1 2088 20 is_stmt 0 view .LVU1848 + 5812 006a 5A70 strb r2, [r3, #1] +2089:Src/main.c **** Def_setup.WORK_EN = 0; + 5813 .loc 1 2089 2 is_stmt 1 view .LVU1849 +2089:Src/main.c **** Def_setup.WORK_EN = 0; + 5814 .loc 1 2089 20 is_stmt 0 view .LVU1850 + 5815 006c 9A70 strb r2, [r3, #2] +2090:Src/main.c **** + 5816 .loc 1 2090 2 is_stmt 1 view .LVU1851 +2090:Src/main.c **** + 5817 .loc 1 2090 20 is_stmt 0 view .LVU1852 + 5818 006e 1A70 strb r2, [r3] +2092:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + ARM GAS /tmp/ccwR4KB7.s page 334 -2050:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 5013 .loc 1 2050 13 is_stmt 0 view .LVU1622 - 5014 0082 8F4E ldr r6, .L225+60 - 5015 0084 9C46 mov ip, r3 - 5016 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} - 5017 008a 0FC6 stmia r6!, {r0, r1, r2, r3} - 5018 008c DCF80030 ldr r3, [ip] - 5019 0090 3380 strh r3, [r6] @ movhi -2051:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 5020 .loc 1 2051 2 is_stmt 1 view .LVU1623 -2051:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 5021 .loc 1 2051 17 is_stmt 0 view .LVU1624 - 5022 0092 8C4E ldr r6, .L225+64 - 5023 0094 95E80F00 ldm r5, {r0, r1, r2, r3} - 5024 0098 86E80F00 stm r6, {r0, r1, r2, r3} -2052:Src/main.c **** - 5025 .loc 1 2052 2 is_stmt 1 view .LVU1625 -2052:Src/main.c **** - 5026 .loc 1 2052 17 is_stmt 0 view .LVU1626 - 5027 009c 8A4D ldr r5, .L225+68 - 5028 009e 94E80F00 ldm r4, {r0, r1, r2, r3} - 5029 00a2 85E80F00 stm r5, {r0, r1, r2, r3} -2057:Src/main.c **** LL_TIM_EnableCounter(TIM6); - 5030 .loc 1 2057 2 is_stmt 1 view .LVU1627 - 5031 .LVL408: - 5032 .LBB516: - 5033 .LBI516: + 5819 .loc 1 2092 2 is_stmt 1 view .LVU1853 +2092:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 5820 .loc 1 2092 24 is_stmt 0 view .LVU1854 + 5821 0070 914D ldr r5, .L304+52 + 5822 0072 2A80 strh r2, [r5] @ movhi +2093:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 5823 .loc 1 2093 2 is_stmt 1 view .LVU1855 +2093:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 5824 .loc 1 2093 24 is_stmt 0 view .LVU1856 + 5825 0074 914C ldr r4, .L304+56 + 5826 0076 2280 strh r2, [r4] @ movhi +2094:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 5827 .loc 1 2094 2 is_stmt 1 view .LVU1857 +2094:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 5828 .loc 1 2094 28 is_stmt 0 view .LVU1858 + 5829 0078 0022 movs r2, #0 + 5830 007a 6A60 str r2, [r5, #4] @ float +2095:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 5831 .loc 1 2095 2 is_stmt 1 view .LVU1859 +2095:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 5832 .loc 1 2095 28 is_stmt 0 view .LVU1860 + 5833 007c 6260 str r2, [r4, #4] @ float +2096:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 5834 .loc 1 2096 2 is_stmt 1 view .LVU1861 +2096:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 5835 .loc 1 2096 28 is_stmt 0 view .LVU1862 + 5836 007e AA60 str r2, [r5, #8] @ float +2097:Src/main.c **** + 5837 .loc 1 2097 2 is_stmt 1 view .LVU1863 +2097:Src/main.c **** + 5838 .loc 1 2097 28 is_stmt 0 view .LVU1864 + 5839 0080 A260 str r2, [r4, #8] @ float +2100:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 5840 .loc 1 2100 2 is_stmt 1 view .LVU1865 +2100:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 5841 .loc 1 2100 13 is_stmt 0 view .LVU1866 + 5842 0082 8F4E ldr r6, .L304+60 + 5843 0084 9C46 mov ip, r3 + 5844 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} + 5845 008a 0FC6 stmia r6!, {r0, r1, r2, r3} + 5846 008c DCF80030 ldr r3, [ip] + 5847 0090 3380 strh r3, [r6] @ movhi +2101:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 5848 .loc 1 2101 2 is_stmt 1 view .LVU1867 +2101:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 5849 .loc 1 2101 17 is_stmt 0 view .LVU1868 + 5850 0092 8C4E ldr r6, .L304+64 + 5851 0094 95E80F00 ldm r5, {r0, r1, r2, r3} + 5852 0098 86E80F00 stm r6, {r0, r1, r2, r3} +2102:Src/main.c **** + 5853 .loc 1 2102 2 is_stmt 1 view .LVU1869 +2102:Src/main.c **** + 5854 .loc 1 2102 17 is_stmt 0 view .LVU1870 + 5855 009c 8A4D ldr r5, .L304+68 + 5856 009e 94E80F00 ldm r4, {r0, r1, r2, r3} + 5857 00a2 85E80F00 stm r5, {r0, r1, r2, r3} +2107:Src/main.c **** LL_TIM_EnableCounter(TIM6); + ARM GAS /tmp/ccwR4KB7.s page 335 + + + 5858 .loc 1 2107 2 is_stmt 1 view .LVU1871 + 5859 .LVL526: + 5860 .LBB532: + 5861 .LBI532: 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -18658,9 +20075,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV1 3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV2 3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV4 - ARM GAS /tmp/ccYgfTud.s page 312 - - 3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV8 3269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRFilter This parameter can be one of the following values: 3270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1 @@ -18684,6 +20098,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale 3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ETRFilter) 3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccwR4KB7.s page 336 + + 3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | 3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -18718,9 +20135,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx) 3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); - ARM GAS /tmp/ccYgfTud.s page 313 - - 3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -18744,6 +20158,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8 3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6 3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8 + ARM GAS /tmp/ccwR4KB7.s page 337 + + 3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5 3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6 3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8 @@ -18778,9 +20195,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_DisableBRK2 3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 314 - - 3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx) 3384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -18804,6 +20218,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8 3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6 3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8 + ARM GAS /tmp/ccwR4KB7.s page 338 + + 3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6 3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8 3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6 @@ -18838,9 +20255,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat 3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccYgfTud.s page 315 - - 3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); 3440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -18864,6 +20278,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput 3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccwR4KB7.s page 339 + + 3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx) 3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -18898,9 +20315,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_MOE); 3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 316 - - 3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register). 3498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by @@ -18924,6 +20338,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 340 + + 3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx) 3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL); @@ -18958,9 +20375,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether 3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection. 3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_DisableBreakInputSource\n - ARM GAS /tmp/ccYgfTud.s page 317 - - 3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_DisableBreakInputSource\n 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_DisableBreakInputSource\n 3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_DisableBreakInputSource @@ -18984,6 +20398,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether 3574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection. 3575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINP LL_TIM_SetBreakInputSourcePolarity\n + ARM GAS /tmp/ccwR4KB7.s page 341 + + 3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKP LL_TIM_SetBreakInputSourcePolarity\n 3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity\n 3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKP LL_TIM_SetBreakInputSourcePolarity @@ -19018,9 +20435,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or 3608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * not a timer instance supports the DMA burst mode. 3609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n - ARM GAS /tmp/ccYgfTud.s page 318 - - 3610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * DCR DBA LL_TIM_ConfigDMABurst 3611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstBaseAddress This parameter can be one of the following values: @@ -19044,6 +20458,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR 3631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR 3632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3 + ARM GAS /tmp/ccwR4KB7.s page 342 + + 3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5 3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6 3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF1 (*) @@ -19078,9 +20495,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 3666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccYgfTud.s page 319 - - 3667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping 3669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -19104,6 +20518,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * ITR1_RMP can be one of the following values 3688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO 3689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_ETH_PTP + ARM GAS /tmp/ccwR4KB7.s page 343 + + 3690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF 3691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF 3692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @@ -19138,9 +20555,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the update interrupt flag (UIF). 3723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE - ARM GAS /tmp/ccYgfTud.s page 320 - - 3724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -19164,6 +20578,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 interrupt flag (CC1F). 3745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1 3746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccwR4KB7.s page 344 + + 3747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) @@ -19198,9 +20615,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2 3779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccYgfTud.s page 321 - - 3781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx) 3783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -19224,6 +20638,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 345 + + 3804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) 3805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); @@ -19258,9 +20675,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccYgfTud.s page 322 - - 3838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF)); 3840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -19284,6 +20698,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx) 3860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccwR4KB7.s page 346 + + 3861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF)); 3862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -19318,9 +20735,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx) 3893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL); - ARM GAS /tmp/ccYgfTud.s page 323 - - 3895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -19344,6 +20758,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL); 3917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccwR4KB7.s page 347 + + 3918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the break interrupt flag (BIF). @@ -19378,9 +20795,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF)); 3950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 324 - - 3952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether break 2 interrupt flag (B2IF) is set (break 2 interrupt is pending). 3954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR B2IF LL_TIM_IsActiveFlag_BRK2 @@ -19404,6 +20818,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 348 + + 3975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set 3976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 1 interrupt is pending). 3977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR @@ -19438,9 +20855,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 4006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL); 4007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 325 - - 4009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF). 4011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR @@ -19464,6 +20878,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 4029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL); 4030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccwR4KB7.s page 349 + + 4032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF). 4034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR @@ -19498,9 +20915,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 4063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF)); 4064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccYgfTud.s page 326 - - 4066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether system break interrupt flag (SBIF) is set (system break interrupt is p 4068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR SBIF LL_TIM_IsActiveFlag_SYSBRK @@ -19524,79 +20938,82 @@ ARM GAS /tmp/ccYgfTud.s page 1 4086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE 4087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 4088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccwR4KB7.s page 350 + + 4089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) - 5034 .loc 5 4090 22 view .LVU1628 - 5035 .LBB517: + 5862 .loc 5 4090 22 view .LVU1872 + 5863 .LBB533: 4091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE); - 5036 .loc 5 4092 3 view .LVU1629 - 5037 00a6 894B ldr r3, .L225+72 - 5038 00a8 DA68 ldr r2, [r3, #12] - 5039 00aa 42F00102 orr r2, r2, #1 - 5040 00ae DA60 str r2, [r3, #12] - 5041 .LVL409: - 5042 .loc 5 4092 3 is_stmt 0 view .LVU1630 - 5043 .LBE517: - 5044 .LBE516: -2058:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); - 5045 .loc 1 2058 2 is_stmt 1 view .LVU1631 - 5046 .LBB518: - 5047 .LBI518: + 5864 .loc 5 4092 3 view .LVU1873 + 5865 00a6 894B ldr r3, .L304+72 + 5866 00a8 DA68 ldr r2, [r3, #12] + 5867 00aa 42F00102 orr r2, r2, #1 + 5868 00ae DA60 str r2, [r3, #12] + 5869 .LVL527: + 5870 .loc 5 4092 3 is_stmt 0 view .LVU1874 + 5871 .LBE533: + 5872 .LBE532: +2108:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); + 5873 .loc 1 2108 2 is_stmt 1 view .LVU1875 + 5874 .LBB534: + 5875 .LBI534: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5048 .loc 5 1313 22 view .LVU1632 - 5049 .LBB519: + 5876 .loc 5 1313 22 view .LVU1876 + 5877 .LBB535: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5050 .loc 5 1315 3 view .LVU1633 - 5051 00b0 1A68 ldr r2, [r3] - 5052 00b2 42F00102 orr r2, r2, #1 - 5053 00b6 1A60 str r2, [r3] - 5054 .LVL410: + 5878 .loc 5 1315 3 view .LVU1877 + 5879 00b0 1A68 ldr r2, [r3] + 5880 00b2 42F00102 orr r2, r2, #1 + 5881 00b6 1A60 str r2, [r3] + 5882 .LVL528: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5055 .loc 5 1315 3 is_stmt 0 view .LVU1634 - 5056 .LBE519: - 5057 .LBE518: -2059:Src/main.c **** LL_TIM_EnableCounter(TIM7); - 5058 .loc 1 2059 2 is_stmt 1 view .LVU1635 - ARM GAS /tmp/ccYgfTud.s page 327 - - - 5059 .LBB520: - 5060 .LBI520: + 5883 .loc 5 1315 3 is_stmt 0 view .LVU1878 + 5884 .LBE535: + 5885 .LBE534: +2109:Src/main.c **** LL_TIM_EnableCounter(TIM7); + 5886 .loc 1 2109 2 is_stmt 1 view .LVU1879 + 5887 .LBB536: + 5888 .LBI536: 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5061 .loc 5 4090 22 view .LVU1636 - 5062 .LBB521: - 5063 .loc 5 4092 3 view .LVU1637 - 5064 00b8 03F58063 add r3, r3, #1024 - 5065 00bc DA68 ldr r2, [r3, #12] - 5066 00be 42F00102 orr r2, r2, #1 - 5067 00c2 DA60 str r2, [r3, #12] - 5068 .LVL411: - 5069 .loc 5 4092 3 is_stmt 0 view .LVU1638 - 5070 .LBE521: - 5071 .LBE520: -2060:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); - 5072 .loc 1 2060 2 is_stmt 1 view .LVU1639 - 5073 .LBB522: - 5074 .LBI522: + 5889 .loc 5 4090 22 view .LVU1880 + 5890 .LBB537: + 5891 .loc 5 4092 3 view .LVU1881 + 5892 00b8 03F58063 add r3, r3, #1024 + 5893 00bc DA68 ldr r2, [r3, #12] + 5894 00be 42F00102 orr r2, r2, #1 + 5895 00c2 DA60 str r2, [r3, #12] + 5896 .LVL529: + 5897 .loc 5 4092 3 is_stmt 0 view .LVU1882 + 5898 .LBE537: + 5899 .LBE536: +2110:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); + 5900 .loc 1 2110 2 is_stmt 1 view .LVU1883 + 5901 .LBB538: + 5902 .LBI538: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5075 .loc 5 1313 22 view .LVU1640 - 5076 .LBB523: + 5903 .loc 5 1313 22 view .LVU1884 + 5904 .LBB539: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5077 .loc 5 1315 3 view .LVU1641 - 5078 00c4 1A68 ldr r2, [r3] - 5079 00c6 42F00102 orr r2, r2, #1 - 5080 00ca 1A60 str r2, [r3] - 5081 .LVL412: + 5905 .loc 5 1315 3 view .LVU1885 + ARM GAS /tmp/ccwR4KB7.s page 351 + + + 5906 00c4 1A68 ldr r2, [r3] + 5907 00c6 42F00102 orr r2, r2, #1 + 5908 00ca 1A60 str r2, [r3] + 5909 .LVL530: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5082 .loc 5 1315 3 is_stmt 0 view .LVU1642 - 5083 .LBE523: - 5084 .LBE522: -2067:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 5085 .loc 1 2067 3 is_stmt 1 view .LVU1643 - 5086 .LBB524: - 5087 .LBI524: - 5088 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" + 5910 .loc 5 1315 3 is_stmt 0 view .LVU1886 + 5911 .LBE539: + 5912 .LBE538: +2117:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 5913 .loc 1 2117 3 is_stmt 1 view .LVU1887 + 5914 .LBB540: + 5915 .LBI540: + 5916 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h @@ -19618,9 +21035,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifndef __STM32F7xx_LL_DMA_H 21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __STM32F7xx_LL_DMA_H - ARM GAS /tmp/ccYgfTud.s page 328 - - 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** extern "C" { @@ -19644,6 +21058,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Private_Variables DMA Private Variables 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 352 + + 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Array used to get the DMA stream register offset versus stream index LL_DMA_STREAM_x */ 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** static const uint8_t STREAM_OFFSET_TAB[] = 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -19678,9 +21095,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined(USE_FULL_LL_DRIVER) 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_ES_INIT DMA Exported Init structure 78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ - ARM GAS /tmp/ccYgfTud.s page 329 - - 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** typedef struct 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -19704,6 +21118,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MODE 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The circular buffer mode cannot be used if the memory 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** data transfer direction is configured on the selected + ARM GAS /tmp/ccwR4KB7.s page 353 + + 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19738,9 +21155,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccYgfTud.s page 330 - - 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Channel; /*!< Specifies the peripheral channel. 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_CHANNEL 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19764,6 +21178,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemBurst; /*!< Specifies the Burst transfer configuration for the memory t + ARM GAS /tmp/ccwR4KB7.s page 354 + + 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** It specifies the amount of data to be transferred in a sing 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** transaction. 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MBURST @@ -19798,9 +21215,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_3 0x00000003U 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_4 0x00000004U 192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_5 0x00000005U - ARM GAS /tmp/ccYgfTud.s page 331 - - 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_6 0x00000006U 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_7 0x00000007U 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_ALL 0xFFFF0000U @@ -19824,6 +21238,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_NORMAL 0x00000000U /*!< Normal Mode 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_CIRCULAR DMA_SxCR_CIRC /*!< Circular Mode 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_PFCTRL DMA_SxCR_PFCTRL /*!< Peripheral flow control mo + ARM GAS /tmp/ccwR4KB7.s page 355 + + 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -19858,9 +21275,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PDATAALIGN PDATAALIGN 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccYgfTud.s page 332 - - 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 /*!< Peripheral data alignment 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 /*!< Peripheral data alignment @@ -19884,6 +21298,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_PSIZE 0x00000000U /*!< Peripheral increment offse 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_FIXEDTO4 DMA_SxCR_PINCOS /*!< Peripheral increment offse 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 356 + + 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19918,9 +21335,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_13 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_14 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) 306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_15 DMA_SxCR_CHSEL - ARM GAS /tmp/ccYgfTud.s page 333 - - 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /* DMA_CHANNEL_SELECTION_8_15 */ 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -19944,6 +21358,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC4 DMA_SxCR_PBURST_0 /*!< Peripheral b 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC8 DMA_SxCR_PBURST_1 /*!< Peripheral b 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC16 (DMA_SxCR_PBURST_0 | DMA_SxCR_PBURST_1) /*!< Peripheral b + ARM GAS /tmp/ccwR4KB7.s page 357 + + 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -19978,9 +21395,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_3_4 DMA_SxFCR_FTH_1 /*!< FIFO thresho 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_FULL DMA_SxFCR_FTH /*!< FIFO thresho 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccYgfTud.s page 334 - - 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -20004,6 +21418,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ + ARM GAS /tmp/ccwR4KB7.s page 358 + + 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Write a value in DMA register @@ -20038,9 +21455,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMAx_Streamy into LL_DMA_STREAM_y - ARM GAS /tmp/ccYgfTud.s page 335 - - 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM_INSTANCE__ DMAx_Streamy 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval LL_DMA_CHANNEL_y 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -20064,6 +21478,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __DMA_INSTANCE__ DMAx + ARM GAS /tmp/ccwR4KB7.s page 359 + + 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM__ LL_DMA_STREAM_y 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval DMAx_Streamy 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -20098,9 +21515,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Functions DMA Exported Functions 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccYgfTud.s page 336 - - 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_Configuration Configuration 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ @@ -20124,6 +21538,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccwR4KB7.s page 360 + + 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable DMA stream. @@ -20141,26 +21558,23 @@ ARM GAS /tmp/ccYgfTud.s page 1 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableStream(DMA_TypeDef *DMAx, uint32_t Stream) - 5089 .loc 6 517 22 view .LVU1644 - 5090 .LBB525: + 5917 .loc 6 517 22 view .LVU1888 + 5918 .LBB541: 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D - 5091 .loc 6 519 3 view .LVU1645 - 5092 00cc 03F51433 add r3, r3, #151552 - 5093 00d0 D3F8B820 ldr r2, [r3, #184] - 5094 00d4 22F00102 bic r2, r2, #1 - 5095 00d8 C3F8B820 str r2, [r3, #184] - 5096 .LVL413: - 5097 .loc 6 519 3 is_stmt 0 view .LVU1646 - 5098 .LBE525: - 5099 .LBE524: -2068:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 5100 .loc 1 2068 3 is_stmt 1 view .LVU1647 - 5101 .LBB526: - 5102 .LBI526: - ARM GAS /tmp/ccYgfTud.s page 337 - - + 5919 .loc 6 519 3 view .LVU1889 + 5920 00cc 03F51433 add r3, r3, #151552 + 5921 00d0 D3F8B820 ldr r2, [r3, #184] + 5922 00d4 22F00102 bic r2, r2, #1 + 5923 00d8 C3F8B820 str r2, [r3, #184] + 5924 .LVL531: + 5925 .loc 6 519 3 is_stmt 0 view .LVU1890 + 5926 .LBE541: + 5927 .LBE540: +2118:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 5928 .loc 1 2118 3 is_stmt 1 view .LVU1891 + 5929 .LBB542: + 5930 .LBI542: 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -20184,6 +21598,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 361 + + 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure all parameters linked to DMA transfer. 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_ConfigTransfer\n 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n @@ -20218,9 +21635,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** DMA_SxCR_DIR | DMA_SxCR_CIRC | DMA_SxCR_PINC | DMA_SxCR_MINC | DMA_SxCR_PSIZE | DMA_Sx 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** Configuration); - ARM GAS /tmp/ccYgfTud.s page 338 - - 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -20244,6 +21658,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccwR4KB7.s page 362 + + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -20278,9 +21695,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccYgfTud.s page 339 - - 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -20304,6 +21718,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PFCTRL LL_DMA_GetMode 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccwR4KB7.s page 363 + + 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -20338,9 +21755,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param IncrementMode This parameter can be one of the following values: 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_NOINCREMENT 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT - ARM GAS /tmp/ccYgfTud.s page 340 - - 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Increment @@ -20364,6 +21778,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_NOINCREMENT 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT + ARM GAS /tmp/ccwR4KB7.s page 364 + + 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream) 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -20398,9 +21815,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MINC LL_DMA_GetMemoryIncMode 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccYgfTud.s page 341 - - 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -20424,6 +21838,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccwR4KB7.s page 365 + + 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -20458,9 +21875,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD - ARM GAS /tmp/ccYgfTud.s page 342 - - 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream) @@ -20484,6 +21898,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Size This parameter can be one of the following values: 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_BYTE 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_HALFWORD + ARM GAS /tmp/ccwR4KB7.s page 366 + + 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_WORD 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -20518,9 +21935,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Peripheral increment offset size. 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINCOS LL_DMA_SetIncOffsetSize - ARM GAS /tmp/ccYgfTud.s page 343 - - 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -20544,6 +21958,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral increment offset size. 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINCOS LL_DMA_GetIncOffsetSize + ARM GAS /tmp/ccwR4KB7.s page 367 + + 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -20578,9 +21995,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Priority This parameter can be one of the following values: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW - ARM GAS /tmp/ccYgfTud.s page 344 - - 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH @@ -20604,6 +22018,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccwR4KB7.s page 368 + + 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM @@ -20638,9 +22055,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->NDTR, 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccYgfTud.s page 345 - - 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Number of data to transfer. 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll NDTR NDT LL_DMA_GetDataLength @@ -20664,6 +22078,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 369 + + 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select Channel number associated to the Stream. 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CHSEL LL_DMA_SetChannelSelection 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -20698,9 +22115,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Channe - ARM GAS /tmp/ccYgfTud.s page 346 - - 1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -20724,6 +22138,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 + ARM GAS /tmp/ccwR4KB7.s page 370 + + 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 @@ -20758,9 +22175,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Mburst This parameter can be one of the following values: 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE - ARM GAS /tmp/ccYgfTud.s page 347 - - 1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC16 @@ -20784,6 +22198,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccwR4KB7.s page 371 + + 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4 @@ -20818,9 +22235,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Pburst) 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D - ARM GAS /tmp/ccYgfTud.s page 348 - - 1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -20844,6 +22258,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream) 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccwR4KB7.s page 372 + + 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -20878,9 +22295,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccYgfTud.s page 349 - - 1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -20904,6 +22318,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 + ARM GAS /tmp/ccwR4KB7.s page 373 + + 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -20938,9 +22355,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get FIFO status. 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FS LL_DMA_GetFIFOStatus - ARM GAS /tmp/ccYgfTud.s page 350 - - 1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -20964,6 +22378,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccwR4KB7.s page 374 + + 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable Fifo mode. 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR DMDIS LL_DMA_DisableFifoMode @@ -20998,9 +22415,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 351 - - 1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream) 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -21024,6 +22438,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4 + ARM GAS /tmp/ccwR4KB7.s page 375 + + 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -21058,9 +22475,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the FIFO . - ARM GAS /tmp/ccYgfTud.s page 352 - - 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_ConfigFifo\n 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * FCR DMDIS LL_DMA_ConfigFifo 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -21084,6 +22498,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ConfigFifo(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t FifoMode, uint3 + ARM GAS /tmp/ccwR4KB7.s page 376 + + 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -21118,9 +22535,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - ARM GAS /tmp/ccYgfTud.s page 353 - - 1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Direction Periph to Memory and Memory to Memory */ 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** else @@ -21144,6 +22558,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 + ARM GAS /tmp/ccwR4KB7.s page 377 + + 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -21178,9 +22595,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory address. - ARM GAS /tmp/ccYgfTud.s page 354 - - 1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_GetMemoryAddress 1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -21204,6 +22618,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Peripheral address. 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetPeriphAddress 1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO + ARM GAS /tmp/ccwR4KB7.s page 378 + + 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -21238,9 +22655,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 355 - - 1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd 1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -21264,6 +22678,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccwR4KB7.s page 379 + + 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -21298,9 +22715,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccYgfTud.s page 356 - - 1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -21324,6 +22738,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 + ARM GAS /tmp/ccwR4KB7.s page 380 + + 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -21358,9 +22775,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} - ARM GAS /tmp/ccYgfTud.s page 357 - - 1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management @@ -21384,6 +22798,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 381 + + 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx) 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1)); @@ -21418,9 +22835,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccYgfTud.s page 358 - - 1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF4)==(DMA_HISR_HTIF4)); 1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -21444,6 +22858,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx) 1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccwR4KB7.s page 382 + + 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF6)==(DMA_HISR_HTIF6)); 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -21478,9 +22895,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx) 1772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF1)==(DMA_LISR_TCIF1)); - ARM GAS /tmp/ccYgfTud.s page 359 - - 1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -21504,6 +22918,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF3)==(DMA_LISR_TCIF3)); 1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccwR4KB7.s page 383 + + 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer complete flag. @@ -21538,9 +22955,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF6)==(DMA_HISR_TCIF6)); 1829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccYgfTud.s page 360 - - 1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer complete flag. 1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF7 LL_DMA_IsActiveFlag_TC7 @@ -21564,6 +22978,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 384 + + 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 transfer error flag. 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF1 LL_DMA_IsActiveFlag_TE1 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -21598,9 +23015,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer error flag. - ARM GAS /tmp/ccYgfTud.s page 361 - - 1888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF4 LL_DMA_IsActiveFlag_TE4 1889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -21624,6 +23038,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 transfer error flag. 1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF6 LL_DMA_IsActiveFlag_TE6 + ARM GAS /tmp/ccwR4KB7.s page 385 + + 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -21658,9 +23075,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 direct mode error flag. 1943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF1 LL_DMA_IsActiveFlag_DME1 1944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccYgfTud.s page 362 - - 1945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME1(DMA_TypeDef *DMAx) @@ -21684,6 +23098,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF3 LL_DMA_IsActiveFlag_DME3 1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccwR4KB7.s page 386 + + 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx) 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -21718,9 +23135,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccYgfTud.s page 363 - - 2002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME6(DMA_TypeDef *DMAx) 2003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF6)==(DMA_HISR_DMEIF6)); @@ -21744,6 +23158,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE0(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccwR4KB7.s page 387 + + 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0)); 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -21778,9 +23195,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE3(DMA_TypeDef *DMAx) 2058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccYgfTud.s page 364 - - 2059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF3)==(DMA_LISR_FEIF3)); 2060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -21804,6 +23218,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE5(DMA_TypeDef *DMAx) 2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF5)==(DMA_HISR_FEIF5)); + ARM GAS /tmp/ccwR4KB7.s page 388 + + 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -21838,9 +23255,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF0); 2115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccYgfTud.s page 365 - - 2116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 half transfer flag. @@ -21864,6 +23278,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2); 2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccwR4KB7.s page 389 + + 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 half transfer flag. 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF3 LL_DMA_ClearFlag_HT3 @@ -21898,9 +23315,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccYgfTud.s page 366 - - 2173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 half transfer flag. 2174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF6 LL_DMA_ClearFlag_HT6 2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -21924,6 +23338,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer complete flag. + ARM GAS /tmp/ccwR4KB7.s page 390 + + 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF0 LL_DMA_ClearFlag_TC0 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -21958,9 +23375,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 transfer complete flag. 2229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF3 LL_DMA_ClearFlag_TC3 - ARM GAS /tmp/ccYgfTud.s page 367 - - 2230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -21984,6 +23398,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer complete flag. 2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF5 LL_DMA_ClearFlag_TC5 2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccwR4KB7.s page 391 + + 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx) @@ -22009,24 +23426,21 @@ ARM GAS /tmp/ccYgfTud.s page 1 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) - 5103 .loc 6 2277 22 view .LVU1648 - 5104 .LBB527: + 5931 .loc 6 2277 22 view .LVU1892 + 5932 .LBB543: 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); - 5105 .loc 6 2279 3 view .LVU1649 - 5106 00dc 4FF00062 mov r2, #134217728 - 5107 00e0 DA60 str r2, [r3, #12] - 5108 .LVL414: - 5109 .loc 6 2279 3 is_stmt 0 view .LVU1650 - ARM GAS /tmp/ccYgfTud.s page 368 - - - 5110 .LBE527: - 5111 .LBE526: -2069:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); - 5112 .loc 1 2069 3 is_stmt 1 view .LVU1651 - 5113 .LBB528: - 5114 .LBI528: + 5933 .loc 6 2279 3 view .LVU1893 + 5934 00dc 4FF00062 mov r2, #134217728 + 5935 00e0 DA60 str r2, [r3, #12] + 5936 .LVL532: + 5937 .loc 6 2279 3 is_stmt 0 view .LVU1894 + 5938 .LBE543: + 5939 .LBE542: +2119:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); + 5940 .loc 1 2119 3 is_stmt 1 view .LVU1895 + 5941 .LBB544: + 5942 .LBI544: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -22044,6 +23458,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 transfer error flag. 2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF1 LL_DMA_ClearFlag_TE1 2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccwR4KB7.s page 392 + + 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx) @@ -22078,9 +23495,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF4 LL_DMA_ClearFlag_TE4 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 369 - - 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx) 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -22104,6 +23518,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 393 + + 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx) 2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF6); @@ -22116,31 +23533,28 @@ ARM GAS /tmp/ccYgfTud.s page 1 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) - 5115 .loc 6 2365 22 view .LVU1652 - 5116 .LBB529: + 5943 .loc 6 2365 22 view .LVU1896 + 5944 .LBB545: 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7); - 5117 .loc 6 2367 3 view .LVU1653 - 5118 00e2 4FF00072 mov r2, #33554432 - 5119 00e6 DA60 str r2, [r3, #12] - 5120 .LVL415: - 5121 .loc 6 2367 3 is_stmt 0 view .LVU1654 - 5122 .LBE529: - 5123 .LBE528: -2070:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); - 5124 .loc 1 2070 3 is_stmt 1 view .LVU1655 - 5125 .LBB530: - 5126 .LBI530: - 5127 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" + 5945 .loc 6 2367 3 view .LVU1897 + 5946 00e2 4FF00072 mov r2, #33554432 + 5947 00e6 DA60 str r2, [r3, #12] + 5948 .LVL533: + 5949 .loc 6 2367 3 is_stmt 0 view .LVU1898 + 5950 .LBE545: + 5951 .LBE544: +2120:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); + 5952 .loc 1 2120 3 is_stmt 1 view .LVU1899 + 5953 .LBB546: + 5954 .LBI546: + 5955 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @file stm32f7xx_ll_usart.h 4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @author MCD Application Team 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Header file of USART LL module. 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** - ARM GAS /tmp/ccYgfTud.s page 370 - - 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @attention 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Copyright (c) 2017 STMicroelectronics. @@ -22164,6 +23578,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #include "stm32f7xx.h" 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccwR4KB7.s page 394 + + 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22198,9 +23615,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported types ------------------------------------------------------------*/ 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER) 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_ES_INIT USART Exported Init structures - ARM GAS /tmp/ccYgfTud.s page 371 - - 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22224,6 +23638,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_STOPBI 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccwR4KB7.s page 395 + + 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetStopBitsLength().*/ 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22258,9 +23675,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** typedef struct 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccYgfTud.s page 372 - - 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_CLOCK. 123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22284,6 +23698,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the l 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data bit (MSB) has to be output on the SCLK pin in synch + ARM GAS /tmp/ccwR4KB7.s page 396 + + 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_LASTCL 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USART HW configuration can be modified afterwards using @@ -22318,9 +23735,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_LBDCF USART_ICR_LBDCF /*!< LIN break detect 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag * 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_RTOCF USART_ICR_RTOCF /*!< Receiver timeout - ARM GAS /tmp/ccYgfTud.s page 373 - - 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_EOBCF USART_ICR_EOBCF /*!< End of block cle 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_CMCF USART_ICR_CMCF /*!< Character match 180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) @@ -22344,6 +23758,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RXNE USART_ISR_RXNE /*!< Read data regist 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission com 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TXE USART_ISR_TXE /*!< Transmit data re + ARM GAS /tmp/ccwR4KB7.s page 397 + + 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detect 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt fl 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ @@ -22378,9 +23795,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt e 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data regist 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission com - ARM GAS /tmp/ccYgfTud.s page 374 - - 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data re 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ 237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_CMIE USART_CR1_CMIE /*!< Character match @@ -22404,6 +23818,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_DIRECTION Communication Direction 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 398 + + 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter @@ -22438,9 +23855,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : S 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : S 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccYgfTud.s page 375 - - 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22464,6 +23878,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /*USE_FULL_LL_DRIVER*/ + ARM GAS /tmp/ccwR4KB7.s page 399 + + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ @@ -22498,9 +23915,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 s 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 - ARM GAS /tmp/ccYgfTud.s page 376 - - 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 s 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} @@ -22524,6 +23938,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccwR4KB7.s page 400 + + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22558,9 +23975,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0 /*!< Fa 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1 /*!< 0x 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x - ARM GAS /tmp/ccYgfTud.s page 377 - - 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22584,6 +23998,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 401 + + 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUS) @@ -22618,9 +24035,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity - ARM GAS /tmp/ccYgfTud.s page 378 - - 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high @@ -22644,6 +24058,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported macro ------------------------------------------------------------*/ 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Macros USART Exported Macros + ARM GAS /tmp/ccwR4KB7.s page 402 + + 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22678,9 +24095,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Compute USARTDIV value according to Peripheral Clock and 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned) - ARM GAS /tmp/ccYgfTud.s page 379 - - 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __BAUDRATE__ Baud rate value to achieve 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case @@ -22704,6 +24118,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 403 + + 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported functions --------------------------------------------------------*/ 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22738,9 +24155,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx) 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR1, USART_CR1_UE); - ARM GAS /tmp/ccYgfTud.s page 380 - - 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -22764,6 +24178,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 UESM LL_USART_EnableInStopMode 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccwR4KB7.s page 404 + + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx) 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -22798,9 +24215,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_UCESM) - ARM GAS /tmp/ccYgfTud.s page 381 - - 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Clock enabled in STOP Mode 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When this function is called, USART Clock is enabled while in STOP mode @@ -22824,6 +24238,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM); 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccwR4KB7.s page 405 + + 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART clock is enabled in STOP Mode @@ -22858,9 +24275,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx) 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE); - ARM GAS /tmp/ccYgfTud.s page 382 - - 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -22884,6 +24298,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE); 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccwR4KB7.s page 406 + + 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure simultaneously enabled/disabled states @@ -22918,9 +24335,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE)); 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccYgfTud.s page 383 - - 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure Parity (enabled/disabled and parity mode if enabled). @@ -22944,6 +24358,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PS LL_USART_GetParity\n + ARM GAS /tmp/ccwR4KB7.s page 407 + + 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_GetParity 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: @@ -22978,9 +24395,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_IDLELINE 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ADDRESSMARK 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccYgfTud.s page 384 - - 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(const USART_TypeDef *USARTx) 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE)); @@ -23004,6 +24418,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) + ARM GAS /tmp/ccwR4KB7.s page 408 + + 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_GetDataWidth\n 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_GetDataWidth 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -23038,9 +24455,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_MME); 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccYgfTud.s page 385 - - 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if switch between Mute Mode and Active mode is allowed @@ -23064,6 +24478,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling) 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccwR4KB7.s page 409 + + 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling); 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23098,9 +24515,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve Clock pulse of the last data bit output configuration - ARM GAS /tmp/ccYgfTud.s page 386 - - 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (Last bit Clock pulse output to the SCLK pin or not) 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. @@ -23124,6 +24538,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param ClockPhase This parameter can be one of the following values: 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE + ARM GAS /tmp/ccwR4KB7.s page 410 + + 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase) @@ -23158,9 +24575,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) - ARM GAS /tmp/ccYgfTud.s page 387 - - 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -23184,6 +24598,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. + ARM GAS /tmp/ccwR4KB7.s page 411 + + 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function @@ -23218,9 +24635,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx) 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccYgfTud.s page 388 - - 1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_CLKEN); 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23244,6 +24658,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccwR4KB7.s page 412 + + 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx) 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -23278,9 +24695,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(const USART_TypeDef *USARTx) 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccYgfTud.s page 389 - - 1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP)); 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23304,6 +24718,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_NONE 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD + ARM GAS /tmp/ccwR4KB7.s page 413 + + 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values: 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1 @@ -23338,9 +24755,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_STANDARD - ARM GAS /tmp/ccYgfTud.s page 390 - - 1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_SWAPPED 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(const USART_TypeDef *USARTx) @@ -23364,6 +24778,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve RX pin active level logic configuration + ARM GAS /tmp/ccwR4KB7.s page 414 + + 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: @@ -23398,9 +24815,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccYgfTud.s page 391 - - 1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV)); 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -23424,6 +24838,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve Binary data configuration 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic + ARM GAS /tmp/ccwR4KB7.s page 415 + + 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE @@ -23458,9 +24875,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BITORDER_LSBFIRST - ARM GAS /tmp/ccYgfTud.s page 392 - - 1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BITORDER_MSBFIRST 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(const USART_TypeDef *USARTx) @@ -23484,6 +24898,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Auto Baud-Rate Detection 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or + ARM GAS /tmp/ccwR4KB7.s page 416 + + 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -23518,9 +24935,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME - ARM GAS /tmp/ccYgfTud.s page 393 - - 1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode) @@ -23544,6 +24958,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE)); 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccwR4KB7.s page 417 + + 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Receiver Timeout @@ -23578,9 +24995,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL); 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 394 - - 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Address of the USART node. 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note This is used in multiprocessor communication during Mute mode or Stop mode, @@ -23604,6 +25018,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param NodeAddress 4 or 7 bit Address of the USART node. 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 418 + + 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_ 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, @@ -23638,9 +25055,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7)); 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 395 - - 1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable RTS HW Flow Control 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not @@ -23664,6 +25078,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx) 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccwR4KB7.s page 419 + + 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23698,9 +25115,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not 1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n - ARM GAS /tmp/ccYgfTud.s page 396 - - 1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 CTSE LL_USART_SetHWFlowCtrl 1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param HardwareFlowControl This parameter can be one of the following values: @@ -23724,6 +25138,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_NONE + ARM GAS /tmp/ccwR4KB7.s page 420 + + 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_CTS 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS_CTS @@ -23758,9 +25175,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if One bit sampling method is enabled 1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp - ARM GAS /tmp/ccYgfTud.s page 397 - - 1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -23784,6 +25198,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Overrun detection 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect 1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccwR4KB7.s page 421 + + 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx) @@ -23818,9 +25235,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type) 1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccYgfTud.s page 398 - - 1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type); 1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23844,6 +25258,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure USART BRR register for achieving expected Baud Rate value. + ARM GAS /tmp/ccwR4KB7.s page 422 + + 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Compute and set USARTDIV value in BRR Register (full BRR content) 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Peripheral clock and Baud rate values provided as function parameters should be valid @@ -23878,9 +25295,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccYgfTud.s page 399 - - 1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return current Baud Rate value, according to USARTDIV present in BRR register 1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (full BRR content), and to used Peripheral Clock and Oversampling mode values 1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be ret @@ -23904,6 +25318,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Do not perform a division by 0 */ 1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccwR4KB7.s page 423 + + 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else if (OverSampling == LL_USART_OVERSAMPLING_8) 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ; @@ -23938,9 +25355,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Get Receiver Time Out Value (expressed in nb of bits duration) 1715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR RTO LL_USART_GetRxTimeout 1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccYgfTud.s page 400 - - 1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x00FFFFFF 1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetRxTimeout(const USART_TypeDef *USARTx) @@ -23964,6 +25378,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Get Block Length value in reception 1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR BLEN LL_USART_GetBlockLength 1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccwR4KB7.s page 424 + + 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx) @@ -23998,9 +25415,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 1772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IREN LL_USART_DisableIrda 1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccYgfTud.s page 401 - - 1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx) @@ -24024,6 +25438,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure IrDA Power Mode (Normal or Low Power) 1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + ARM GAS /tmp/ccwR4KB7.s page 425 + + 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -24058,9 +25475,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 1829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler - ARM GAS /tmp/ccYgfTud.s page 402 - - 1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF 1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -24084,6 +25498,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC)); 1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccwR4KB7.s page 426 + + 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24118,9 +25535,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); 1886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 403 - - 1888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if Smartcard NACK transmission is enabled 1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -24144,6 +25558,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx) 1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccwR4KB7.s page 427 + + 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_SCEN); 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -24178,9 +25595,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 1943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note This bit-field specifies the number of retries in transmit and receive, in Smartcard mo - ARM GAS /tmp/ccYgfTud.s page 404 - - 1945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * In transmission mode, it specifies the number of automatic retransmission retries, befo 1946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * generating a transmission error (FE bit set). 1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * In reception mode, it specifies the number or erroneous reception trials, before genera @@ -24204,6 +25618,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Smartcard Auto-Retry Count value (Value between Min_Data=0 and Max_Data=7) 1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccwR4KB7.s page 428 + + 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos); 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -24238,9 +25655,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccYgfTud.s page 405 - - 2002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods 2003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (GT[7:0] bits : Guard time value) 2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -24264,6 +25678,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF) 2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 429 + + 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx) 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos); @@ -24298,9 +25715,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccYgfTud.s page 406 - - 2059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx) 2060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); @@ -24324,6 +25738,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature + ARM GAS /tmp/ccwR4KB7.s page 430 + + 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -24358,9 +25775,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL)); 2114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 407 - - 2116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable LIN mode 2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not @@ -24384,6 +25798,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx) 2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccwR4KB7.s page 431 + + 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN); 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -24418,9 +25835,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time) - ARM GAS /tmp/ccYgfTud.s page 408 - - 2173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos); 2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -24444,6 +25858,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. 2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 DEAT LL_USART_SetDEAssertionTime 2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccwR4KB7.s page 432 + + 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Time Value between Min_Data=0 and Max_Data=31 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24478,9 +25895,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_DEM); 2228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 409 - - 2230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Driver Enable (DE) Mode 2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not @@ -24504,6 +25918,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(const USART_TypeDef *USARTx) 2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccwR4KB7.s page 433 + + 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -24538,9 +25955,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP)); 2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 410 - - 2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24564,6 +25978,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function 2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function 2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Asynchronous Mode + ARM GAS /tmp/ccwR4KB7.s page 434 + + 2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using 2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n @@ -24598,9 +26015,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function 2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function 2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function - ARM GAS /tmp/ccYgfTud.s page 411 - - 2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function 2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function 2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Synchronous Mode @@ -24624,6 +26038,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Synchronous mode */ 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_CLKEN); + ARM GAS /tmp/ccwR4KB7.s page 435 + + 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -24658,9 +26075,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx) 2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In LIN mode, the following bits must be kept cleared: - ARM GAS /tmp/ccYgfTud.s page 412 - - 2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - STOP and CLKEN bits in the USART_CR2 register, 2402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN, SCEN and HDSEL bits in the USART_CR3 register. 2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24684,6 +26098,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function 2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function 2423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + ARM GAS /tmp/ccwR4KB7.s page 436 + + 2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function 2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function 2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Half Duplex Mode @@ -24718,9 +26135,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also configures Stop bits to 1.5 bits and 2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * sets the USART in Smartcard mode (SCEN bit). 2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Clock Output is also enabled (CLKEN). - ARM GAS /tmp/ccYgfTud.s page 413 - - 2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : @@ -24744,6 +26158,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx) 2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Smartcard mode, the following bits must be kept cleared: + ARM GAS /tmp/ccwR4KB7.s page 437 + + 2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN bit in the USART_CR2 register, 2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN and HDSEL bits in the USART_CR3 register. 2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24778,9 +26195,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n 2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigIrdaMode\n - ARM GAS /tmp/ccYgfTud.s page 414 - - 2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigIrdaMode\n 2516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigIrdaMode\n 2517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigIrdaMode\n @@ -24804,6 +26218,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Multi processor Mode 2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (several USARTs connected in a network, one of the USARTs can be the master, 2537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * its TX output connected to the RX inputs of the other slaves USARTs). + ARM GAS /tmp/ccwR4KB7.s page 438 + + 2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In MultiProcessor mode, the following bits must be kept cleared: 2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, 2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register, @@ -24838,9 +26255,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccYgfTud.s page 415 - - 2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 2573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -24864,6 +26278,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR FE LL_USART_IsActiveFlag_FE 2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccwR4KB7.s page 439 + + 2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx) 2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -24898,9 +26315,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccYgfTud.s page 416 - - 2629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx) 2630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL); @@ -24924,6 +26338,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccwR4KB7.s page 440 + + 2652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL); 2654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -24958,9 +26375,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 2684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CTSIF LL_USART_IsActiveFlag_nCTS 2685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccYgfTud.s page 417 - - 2686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx) @@ -24984,6 +26398,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Time Out Flag is set or not 2708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RTOF LL_USART_IsActiveFlag_RTO + ARM GAS /tmp/ccwR4KB7.s page 441 + + 2709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25018,9 +26435,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL); 2741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 418 - - 2743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Flag is set or not 2745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or @@ -25044,6 +26458,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL); 2765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccwR4KB7.s page 442 + + 2766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Character Match Flag is set or not @@ -25078,9 +26495,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL); 2798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccYgfTud.s page 419 - - 2800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 2801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) 2802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -25104,6 +26518,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 443 + + 2823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx) 2824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL); @@ -25138,9 +26555,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ 2855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Parity Error Flag - ARM GAS /tmp/ccYgfTud.s page 420 - - 2857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR PECF LL_USART_ClearFlag_PE 2858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -25164,6 +26578,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Noise Error detected Flag 2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR NCF LL_USART_ClearFlag_NE + ARM GAS /tmp/ccwR4KB7.s page 444 + + 2880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25198,9 +26615,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Transmission Complete Flag 2912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR TCCF LL_USART_ClearFlag_TC 2913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccYgfTud.s page 421 - - 2914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx) @@ -25224,6 +26638,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear LIN Break Detection Flag + ARM GAS /tmp/ccwR4KB7.s page 445 + + 2937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD @@ -25258,9 +26675,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_RTOCF); 2970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccYgfTud.s page 422 - - 2971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear End Of Block Flag @@ -25284,6 +26698,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx) 2992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CMCF); + ARM GAS /tmp/ccwR4KB7.s page 446 + + 2994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) @@ -25318,9 +26735,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx) - ARM GAS /tmp/ccYgfTud.s page 423 - - 3028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE); 3030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -25344,6 +26758,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx) 3050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccwR4KB7.s page 447 + + 3051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE); 3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -25378,9 +26795,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx) 3083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_CMIE); - ARM GAS /tmp/ccYgfTud.s page 424 - - 3085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -25404,6 +26818,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx) 3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccwR4KB7.s page 448 + + 3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE); 3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -25438,9 +26855,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable CTS Interrupt 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccYgfTud.s page 425 - - 3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS 3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -25464,6 +26878,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx) 3163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE); + ARM GAS /tmp/ccwR4KB7.s page 449 + + 3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ @@ -25498,9 +26915,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable RX Not Empty Interrupt 3198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE - ARM GAS /tmp/ccYgfTud.s page 426 - - 3199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25524,6 +26938,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable TX Empty Interrupt 3220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE 3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccwR4KB7.s page 450 + + 3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx) @@ -25558,9 +26975,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RTOIE LL_USART_DisableIT_RTO 3254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 427 - - 3256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx) 3258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -25584,6 +26998,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable LIN Break Detection Interrupt 3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. + ARM GAS /tmp/ccwR4KB7.s page 451 + + 3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD 3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -25618,9 +27035,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx) 3312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccYgfTud.s page 428 - - 3313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); 3314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -25644,6 +27058,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) 3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccwR4KB7.s page 452 + + 3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt 3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. @@ -25678,9 +27095,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U); 3369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccYgfTud.s page 429 - - 3370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled. @@ -25704,6 +27118,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1U : 0U); 3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccwR4KB7.s page 453 + + 3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Parity Error Interrupt is enabled or disabled. 3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE @@ -25738,9 +27155,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccYgfTud.s page 430 - - 3427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART End Of Block Interrupt is enabled or disabled. 3428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. @@ -25764,6 +27178,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx) 3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL); + ARM GAS /tmp/ccwR4KB7.s page 454 + + 3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -25798,9 +27215,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. 3482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUFIE LL_USART_IsEnabledIT_WKUP 3483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccYgfTud.s page 431 - - 3484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 3485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(const USART_TypeDef *USARTx) @@ -25824,6 +27238,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL); 3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccwR4KB7.s page 455 + + 3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ 3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -25858,9 +27275,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if DMA Mode is enabled for reception - ARM GAS /tmp/ccYgfTud.s page 432 - - 3541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX 3542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -25877,18 +27291,21 @@ ARM GAS /tmp/ccYgfTud.s page 1 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) - 5128 .loc 7 3556 22 view .LVU1656 - 5129 .L216: + 5956 .loc 7 3556 22 view .LVU1900 + 5957 .L295: 3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); - 5130 .loc 7 3558 3 discriminator 1 view .LVU1657 - 5131 .LBB531: - 5132 .loc 7 3558 3 discriminator 1 view .LVU1658 - 5133 .loc 7 3558 3 discriminator 1 view .LVU1659 - 5134 .loc 7 3558 3 discriminator 1 view .LVU1660 - 5135 .LBB532: - 5136 .LBI532: - 5137 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" + 5958 .loc 7 3558 3 discriminator 1 view .LVU1901 + 5959 .LBB547: + 5960 .loc 7 3558 3 discriminator 1 view .LVU1902 + ARM GAS /tmp/ccwR4KB7.s page 456 + + + 5961 .loc 7 3558 3 discriminator 1 view .LVU1903 + 5962 .loc 7 3558 3 discriminator 1 view .LVU1904 + 5963 .LBB548: + 5964 .LBI548: + 5965 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file @@ -25918,9 +27335,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push - ARM GAS /tmp/ccYgfTud.s page 433 - - 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" @@ -25944,6 +27358,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + ARM GAS /tmp/ccwR4KB7.s page 457 + + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED @@ -25978,9 +27395,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ - ARM GAS /tmp/ccYgfTud.s page 434 - - 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" @@ -26004,6 +27418,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccwR4KB7.s page 458 + + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -26038,9 +27455,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccYgfTud.s page 435 - - 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -26064,6 +27478,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + ARM GAS /tmp/ccwR4KB7.s page 459 + + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -26098,9 +27515,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccYgfTud.s page 436 - - 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value @@ -26124,6 +27538,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + ARM GAS /tmp/ccwR4KB7.s page 460 + + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -26158,9 +27575,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccYgfTud.s page 437 - - 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value @@ -26184,6 +27598,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccwR4KB7.s page 461 + + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) @@ -26218,9 +27635,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value - ARM GAS /tmp/ccYgfTud.s page 438 - - 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -26244,6 +27658,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + ARM GAS /tmp/ccwR4KB7.s page 462 + + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. @@ -26278,9 +27695,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccYgfTud.s page 439 - - 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -26304,6 +27718,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + ARM GAS /tmp/ccwR4KB7.s page 463 + + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) @@ -26338,9 +27755,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccYgfTud.s page 440 - - 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ @@ -26364,6 +27778,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccwR4KB7.s page 464 + + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -26398,9 +27815,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccYgfTud.s page 441 - - 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. @@ -26424,6 +27838,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccwR4KB7.s page 465 + + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition @@ -26458,9 +27875,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) - ARM GAS /tmp/ccYgfTud.s page 442 - - 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -26484,6 +27898,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + ARM GAS /tmp/ccwR4KB7.s page 466 + + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -26518,9 +27935,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/ccYgfTud.s page 443 - - 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -26544,6 +27958,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + ARM GAS /tmp/ccwR4KB7.s page 467 + + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -26578,9 +27995,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - ARM GAS /tmp/ccYgfTud.s page 444 - - 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -26604,6 +28018,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + ARM GAS /tmp/ccwR4KB7.s page 468 + + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) @@ -26638,9 +28055,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccYgfTud.s page 445 - - 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -26664,6 +28078,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccwR4KB7.s page 469 + + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) @@ -26698,9 +28115,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) - ARM GAS /tmp/ccYgfTud.s page 446 - - 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ @@ -26724,6 +28138,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccwR4KB7.s page 470 + + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) @@ -26758,9 +28175,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) - ARM GAS /tmp/ccYgfTud.s page 447 - - 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -26784,6 +28198,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + ARM GAS /tmp/ccwR4KB7.s page 471 + + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -26818,9 +28235,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier - ARM GAS /tmp/ccYgfTud.s page 448 - - 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -26844,6 +28258,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + ARM GAS /tmp/ccwR4KB7.s page 472 + + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -26878,9 +28295,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - ARM GAS /tmp/ccYgfTud.s page 449 - - 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -26904,6 +28318,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccwR4KB7.s page 473 + + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. @@ -26938,9 +28355,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccYgfTud.s page 450 - - 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; @@ -26964,6 +28378,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data + ARM GAS /tmp/ccwR4KB7.s page 474 + + 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) @@ -26998,9 +28415,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccYgfTud.s page 451 - - 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ @@ -27014,34 +28428,37 @@ ARM GAS /tmp/ccYgfTud.s page 1 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) - 5138 .loc 8 1068 31 view .LVU1661 - 5139 .LBB533: + 5966 .loc 8 1068 31 view .LVU1905 + 5967 .LBB549: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 5140 .loc 8 1070 5 view .LVU1662 + 5968 .loc 8 1070 5 view .LVU1906 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 5141 .loc 8 1072 4 view .LVU1663 - 5142 00e8 794A ldr r2, .L225+76 - 5143 00ea 02F10803 add r3, r2, #8 - 5144 .syntax unified - 5145 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 5146 00ee 53E8003F ldrex r3, [r3] - 5147 @ 0 "" 2 - 5148 .LVL416: + 5969 .loc 8 1072 4 view .LVU1907 + 5970 00e8 794A ldr r2, .L304+76 + 5971 00ea 02F10803 add r3, r2, #8 + ARM GAS /tmp/ccwR4KB7.s page 475 + + + 5972 .syntax unified + 5973 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5974 00ee 53E8003F ldrex r3, [r3] + 5975 @ 0 "" 2 + 5976 .LVL534: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 5149 .loc 8 1073 4 view .LVU1664 - 5150 .loc 8 1073 4 is_stmt 0 view .LVU1665 - 5151 .thumb - 5152 .syntax unified - 5153 .LBE533: - 5154 .LBE532: - 5155 .loc 7 3558 3 discriminator 1 view .LVU1666 - 5156 00f2 43F08003 orr r3, r3, #128 - 5157 .LVL417: - 5158 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU1667 - 5159 .LBB534: - 5160 .LBI534: + 5977 .loc 8 1073 4 view .LVU1908 + 5978 .loc 8 1073 4 is_stmt 0 view .LVU1909 + 5979 .thumb + 5980 .syntax unified + 5981 .LBE549: + 5982 .LBE548: + 5983 .loc 7 3558 3 discriminator 1 view .LVU1910 + 5984 00f2 43F08003 orr r3, r3, #128 + 5985 .LVL535: + 5986 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU1911 + 5987 .LBB550: + 5988 .LBI550: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -27058,9 +28475,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - ARM GAS /tmp/ccYgfTud.s page 452 - - 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -27084,6 +28498,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 1110:Drivers/CMSIS/Include/cmsis_gcc.h **** 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1112:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) + ARM GAS /tmp/ccwR4KB7.s page 476 + + 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location @@ -27091,42 +28508,39 @@ ARM GAS /tmp/ccYgfTud.s page 1 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) - 5161 .loc 8 1119 31 view .LVU1668 - 5162 .LBB535: + 5989 .loc 8 1119 31 view .LVU1912 + 5990 .LBB551: 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 5163 .loc 8 1121 4 view .LVU1669 + 5991 .loc 8 1121 4 view .LVU1913 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 5164 .loc 8 1123 4 view .LVU1670 - 5165 00f6 0832 adds r2, r2, #8 - 5166 .syntax unified - 5167 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 5168 00f8 42E80031 strex r1, r3, [r2] - 5169 @ 0 "" 2 - 5170 .LVL418: + 5992 .loc 8 1123 4 view .LVU1914 + 5993 00f6 0832 adds r2, r2, #8 + 5994 .syntax unified + 5995 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5996 00f8 42E80031 strex r1, r3, [r2] + 5997 @ 0 "" 2 + 5998 .LVL536: 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 5171 .loc 8 1124 4 view .LVU1671 - 5172 .loc 8 1124 4 is_stmt 0 view .LVU1672 - 5173 .thumb - 5174 .syntax unified - 5175 .LBE535: - 5176 .LBE534: - 5177 .loc 7 3558 3 discriminator 1 view .LVU1673 - 5178 00fc 0029 cmp r1, #0 - 5179 00fe F3D1 bne .L216 - 5180 .LBE531: - 5181 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU1674 - 5182 .LVL419: - ARM GAS /tmp/ccYgfTud.s page 453 - - - 5183 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU1675 - 5184 .LBE530: -2071:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); - 5185 .loc 1 2071 3 is_stmt 1 view .LVU1676 - 5186 .LBB536: - 5187 .LBI536: + 5999 .loc 8 1124 4 view .LVU1915 + 6000 .loc 8 1124 4 is_stmt 0 view .LVU1916 + 6001 .thumb + 6002 .syntax unified + 6003 .LBE551: + 6004 .LBE550: + 6005 .loc 7 3558 3 discriminator 1 view .LVU1917 + 6006 00fc 0029 cmp r1, #0 + 6007 00fe F3D1 bne .L295 + 6008 .LBE547: + 6009 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU1918 + 6010 .LVL537: + 6011 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU1919 + 6012 .LBE546: +2121:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); + 6013 .loc 1 2121 3 is_stmt 1 view .LVU1920 + 6014 .LBB552: + 6015 .LBI552: 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -27144,6 +28558,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 direct mode error flag. 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF1 LL_DMA_ClearFlag_DME1 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccwR4KB7.s page 477 + + 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME1(DMA_TypeDef *DMAx) @@ -27178,9 +28595,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF4 LL_DMA_ClearFlag_DME4 2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccYgfTud.s page 454 - - 2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME4(DMA_TypeDef *DMAx) 2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -27204,6 +28618,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccwR4KB7.s page 478 + + 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME6(DMA_TypeDef *DMAx) 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF6); @@ -27238,9 +28655,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE1(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccYgfTud.s page 455 - - 2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF1); 2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -27264,6 +28678,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE3(DMA_TypeDef *DMAx) 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccwR4KB7.s page 479 + + 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF3); 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -27298,9 +28715,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE6(DMA_TypeDef *DMAx) 2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF6); - ARM GAS /tmp/ccYgfTud.s page 456 - - 2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -27324,6 +28738,9 @@ ARM GAS /tmp/ccYgfTud.s page 1 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable Half transfer interrupt. + ARM GAS /tmp/ccwR4KB7.s page 480 + + 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR HTIE LL_DMA_EnableIT_HT 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -27358,9 +28775,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Stream) - ARM GAS /tmp/ccYgfTud.s page 457 - - 2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -27381,2926 +28795,2926 @@ ARM GAS /tmp/ccYgfTud.s page 1 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream) - 5188 .loc 6 2609 22 view .LVU1677 - 5189 .LBB537: + 6016 .loc 6 2609 22 view .LVU1921 + 6017 .LBB553: 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccwR4KB7.s page 481 + + 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA - 5190 .loc 6 2611 3 view .LVU1678 - 5191 0100 744B ldr r3, .L225+80 - 5192 0102 D3F8B820 ldr r2, [r3, #184] - 5193 0106 42F01002 orr r2, r2, #16 - 5194 010a C3F8B820 str r2, [r3, #184] - 5195 .LVL420: - 5196 .loc 6 2611 3 is_stmt 0 view .LVU1679 - 5197 .LBE537: - 5198 .LBE536: -2072:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 5199 .loc 1 2072 3 is_stmt 1 view .LVU1680 - 5200 .LBB538: - 5201 .LBI538: + 6018 .loc 6 2611 3 view .LVU1922 + 6019 0100 744B ldr r3, .L304+80 + 6020 0102 D3F8B820 ldr r2, [r3, #184] + 6021 0106 42F01002 orr r2, r2, #16 + 6022 010a C3F8B820 str r2, [r3, #184] + 6023 .LVL538: + 6024 .loc 6 2611 3 is_stmt 0 view .LVU1923 + 6025 .LBE553: + 6026 .LBE552: +2122:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 6027 .loc 1 2122 3 is_stmt 1 view .LVU1924 + 6028 .LBB554: + 6029 .LBI554: 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 5202 .loc 6 2589 22 view .LVU1681 - 5203 .LBB539: + 6030 .loc 6 2589 22 view .LVU1925 + 6031 .LBB555: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5204 .loc 6 2591 3 view .LVU1682 - 5205 010e D3F8B820 ldr r2, [r3, #184] - 5206 0112 42F00402 orr r2, r2, #4 - 5207 0116 C3F8B820 str r2, [r3, #184] - 5208 .LVL421: + 6032 .loc 6 2591 3 view .LVU1926 + 6033 010e D3F8B820 ldr r2, [r3, #184] + 6034 0112 42F00402 orr r2, r2, #4 + 6035 0116 C3F8B820 str r2, [r3, #184] + 6036 .LVL539: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5209 .loc 6 2591 3 is_stmt 0 view .LVU1683 - 5210 .LBE539: - 5211 .LBE538: -2073:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 5212 .loc 1 2073 3 is_stmt 1 view .LVU1684 - 5213 .LBB540: - 5214 .LBI540: + 6037 .loc 6 2591 3 is_stmt 0 view .LVU1927 + 6038 .LBE555: + 6039 .LBE554: +2123:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 6040 .loc 1 2123 3 is_stmt 1 view .LVU1928 + 6041 .LBB556: + 6042 .LBI556: 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 5215 .loc 6 2277 22 view .LVU1685 - 5216 .LBB541: - ARM GAS /tmp/ccYgfTud.s page 458 - - + 6043 .loc 6 2277 22 view .LVU1929 + 6044 .LBB557: 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5217 .loc 6 2279 3 view .LVU1686 - 5218 011a 4FF00062 mov r2, #134217728 - 5219 011e DA60 str r2, [r3, #12] - 5220 .LVL422: + 6045 .loc 6 2279 3 view .LVU1930 + 6046 011a 4FF00062 mov r2, #134217728 + 6047 011e DA60 str r2, [r3, #12] + 6048 .LVL540: 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5221 .loc 6 2279 3 is_stmt 0 view .LVU1687 - 5222 .LBE541: - 5223 .LBE540: -2074:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART - 5224 .loc 1 2074 3 is_stmt 1 view .LVU1688 - 5225 .LBB542: - 5226 .LBI542: + 6049 .loc 6 2279 3 is_stmt 0 view .LVU1931 + 6050 .LBE557: + 6051 .LBE556: +2124:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART + 6052 .loc 1 2124 3 is_stmt 1 view .LVU1932 + 6053 .LBB558: + 6054 .LBI558: 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 5227 .loc 6 2365 22 view .LVU1689 - 5228 .LBB543: + 6055 .loc 6 2365 22 view .LVU1933 + 6056 .LBB559: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5229 .loc 6 2367 3 view .LVU1690 - 5230 0120 4FF00072 mov r2, #33554432 - 5231 0124 DA60 str r2, [r3, #12] - 5232 .LVL423: + 6057 .loc 6 2367 3 view .LVU1934 + 6058 0120 4FF00072 mov r2, #33554432 + 6059 0124 DA60 str r2, [r3, #12] + 6060 .LVL541: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5233 .loc 6 2367 3 is_stmt 0 view .LVU1691 - 5234 .LBE543: - 5235 .LBE542: -2075:Src/main.c **** - 5236 .loc 1 2075 3 is_stmt 1 view .LVU1692 - 5237 0126 6C4A ldr r2, .L225+84 - 5238 .LVL424: - 5239 .LBB544: - 5240 .LBI544: + 6061 .loc 6 2367 3 is_stmt 0 view .LVU1935 + ARM GAS /tmp/ccwR4KB7.s page 482 + + + 6062 .LBE559: + 6063 .LBE558: +2125:Src/main.c **** + 6064 .loc 1 2125 3 is_stmt 1 view .LVU1936 + 6065 0126 6C4A ldr r2, .L304+84 + 6066 .LVL542: + 6067 .LBB560: + 6068 .LBI560: 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 5241 .loc 6 621 26 view .LVU1693 - 5242 .LBB545: + 6069 .loc 6 621 26 view .LVU1937 + 6070 .LBB561: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5243 .loc 6 623 3 view .LVU1694 + 6071 .loc 6 623 3 view .LVU1938 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5244 .loc 6 623 11 is_stmt 0 view .LVU1695 - 5245 0128 D3F8B830 ldr r3, [r3, #184] - 5246 012c 03F0C003 and r3, r3, #192 - 5247 .LVL425: + 6072 .loc 6 623 11 is_stmt 0 view .LVU1939 + 6073 0128 D3F8B830 ldr r3, [r3, #184] + 6074 012c 03F0C003 and r3, r3, #192 + 6075 .LVL543: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5248 .loc 6 623 11 view .LVU1696 - 5249 .LBE545: - 5250 .LBE544: - 5251 .LBB546: - 5252 .LBI546: + 6076 .loc 6 623 11 view .LVU1940 + 6077 .LBE561: + 6078 .LBE560: + 6079 .LBB562: + 6080 .LBI562: 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 5253 .loc 6 1425 22 is_stmt 1 view .LVU1697 - 5254 .LBB547: + 6081 .loc 6 1425 22 is_stmt 1 view .LVU1941 + 6082 .LBB563: 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 5255 .loc 6 1428 3 view .LVU1698 + 6083 .loc 6 1428 3 view .LVU1942 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 5256 .loc 6 1428 6 is_stmt 0 view .LVU1699 - 5257 0130 402B cmp r3, #64 - 5258 0132 7DD0 beq .L222 + 6084 .loc 6 1428 6 is_stmt 0 view .LVU1943 + 6085 0130 402B cmp r3, #64 + 6086 0132 7DD0 beq .L301 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - ARM GAS /tmp/ccYgfTud.s page 459 - - - 5259 .loc 6 1436 5 is_stmt 1 view .LVU1700 - 5260 0134 674B ldr r3, .L225+80 - 5261 .LVL426: + 6087 .loc 6 1436 5 is_stmt 1 view .LVU1944 + 6088 0134 674B ldr r3, .L304+80 + 6089 .LVL544: 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - 5262 .loc 6 1436 5 is_stmt 0 view .LVU1701 - 5263 0136 C3F8C020 str r2, [r3, #192] + 6090 .loc 6 1436 5 is_stmt 0 view .LVU1945 + 6091 0136 C3F8C020 str r2, [r3, #192] 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5264 .loc 6 1437 5 is_stmt 1 view .LVU1702 - 5265 013a 684A ldr r2, .L225+88 - 5266 013c C3F8C420 str r2, [r3, #196] - 5267 .L218: - 5268 .LVL427: + 6092 .loc 6 1437 5 is_stmt 1 view .LVU1946 + 6093 013a 684A ldr r2, .L304+88 + 6094 013c C3F8C420 str r2, [r3, #196] + 6095 .L297: + 6096 .LVL545: 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5269 .loc 6 1437 5 is_stmt 0 view .LVU1703 - 5270 .LBE547: - 5271 .LBE546: -2080:Src/main.c **** SD_SLIDE = 0; - 5272 .loc 1 2080 2 is_stmt 1 view .LVU1704 -2080:Src/main.c **** SD_SLIDE = 0; - 5273 .loc 1 2080 10 is_stmt 0 view .LVU1705 - 5274 0140 0024 movs r4, #0 - 5275 0142 674B ldr r3, .L225+92 - 5276 0144 1C60 str r4, [r3] -2081:Src/main.c **** //Reset all periphery - 5277 .loc 1 2081 2 is_stmt 1 view .LVU1706 -2081:Src/main.c **** //Reset all periphery - 5278 .loc 1 2081 11 is_stmt 0 view .LVU1707 - 5279 0146 674B ldr r3, .L225+96 - 5280 0148 1C60 str r4, [r3] -2083:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); - 5281 .loc 1 2083 2 is_stmt 1 view .LVU1708 - 5282 014a 674F ldr r7, .L225+100 - 5283 014c 2246 mov r2, r4 - 5284 014e 0821 movs r1, #8 - 5285 0150 3846 mov r0, r7 - 5286 0152 FFF7FEFF bl HAL_GPIO_WritePin - 5287 .LVL428: -2084:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); - 5288 .loc 1 2084 2 view .LVU1709 - 5289 0156 2246 mov r2, r4 - 5290 0158 0421 movs r1, #4 - 5291 015a 3846 mov r0, r7 - 5292 015c FFF7FEFF bl HAL_GPIO_WritePin - 5293 .LVL429: -2085:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); - 5294 .loc 1 2085 2 view .LVU1710 - 5295 0160 DFF8A881 ldr r8, .L225+136 - 5296 0164 2246 mov r2, r4 - 5297 0166 4FF48071 mov r1, #256 - 5298 016a 4046 mov r0, r8 - 5299 016c FFF7FEFF bl HAL_GPIO_WritePin - 5300 .LVL430: -2086:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); - 5301 .loc 1 2086 2 view .LVU1711 - 5302 0170 2246 mov r2, r4 - 5303 0172 1021 movs r1, #16 - 5304 0174 3846 mov r0, r7 - ARM GAS /tmp/ccYgfTud.s page 460 + 6097 .loc 6 1437 5 is_stmt 0 view .LVU1947 + 6098 .LBE563: + 6099 .LBE562: +2130:Src/main.c **** SD_SLIDE = 0; + 6100 .loc 1 2130 2 is_stmt 1 view .LVU1948 +2130:Src/main.c **** SD_SLIDE = 0; + 6101 .loc 1 2130 10 is_stmt 0 view .LVU1949 + 6102 0140 0024 movs r4, #0 + 6103 0142 674B ldr r3, .L304+92 + 6104 0144 1C60 str r4, [r3] + ARM GAS /tmp/ccwR4KB7.s page 483 - 5305 0176 FFF7FEFF bl HAL_GPIO_WritePin - 5306 .LVL431: -2087:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); - 5307 .loc 1 2087 2 view .LVU1712 - 5308 017a 5C4E ldr r6, .L225+104 - 5309 017c 2246 mov r2, r4 - 5310 017e 4FF48061 mov r1, #1024 - 5311 0182 3046 mov r0, r6 - 5312 0184 FFF7FEFF bl HAL_GPIO_WritePin - 5313 .LVL432: -2088:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); - 5314 .loc 1 2088 2 view .LVU1713 - 5315 0188 594D ldr r5, .L225+108 - 5316 018a 2246 mov r2, r4 - 5317 018c 0821 movs r1, #8 - 5318 018e 2846 mov r0, r5 - 5319 0190 FFF7FEFF bl HAL_GPIO_WritePin - 5320 .LVL433: -2089:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); - 5321 .loc 1 2089 2 view .LVU1714 - 5322 0194 2246 mov r2, r4 - 5323 0196 0121 movs r1, #1 - 5324 0198 2846 mov r0, r5 - 5325 019a FFF7FEFF bl HAL_GPIO_WritePin - 5326 .LVL434: -2090:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 5327 .loc 1 2090 2 view .LVU1715 - 5328 019e 2246 mov r2, r4 - 5329 01a0 0221 movs r1, #2 - 5330 01a2 2846 mov r0, r5 - 5331 01a4 FFF7FEFF bl HAL_GPIO_WritePin - 5332 .LVL435: -2091:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 5333 .loc 1 2091 2 view .LVU1716 - 5334 01a8 2246 mov r2, r4 - 5335 01aa 4FF40061 mov r1, #2048 - 5336 01ae 3046 mov r0, r6 - 5337 01b0 FFF7FEFF bl HAL_GPIO_WritePin - 5338 .LVL436: -2092:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) - 5339 .loc 1 2092 2 view .LVU1717 - 5340 01b4 2246 mov r2, r4 - 5341 01b6 2021 movs r1, #32 - 5342 01b8 3846 mov r0, r7 - 5343 01ba FFF7FEFF bl HAL_GPIO_WritePin - 5344 .LVL437: -2102:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC - 5345 .loc 1 2102 2 view .LVU1718 - 5346 01be 07F50067 add r7, r7, #2048 - 5347 01c2 0122 movs r2, #1 - 5348 01c4 4FF48061 mov r1, #1024 - 5349 01c8 3846 mov r0, r7 - 5350 01ca FFF7FEFF bl HAL_GPIO_WritePin - 5351 .LVL438: -2103:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 5352 .loc 1 2103 2 view .LVU1719 - 5353 01ce 494C ldr r4, .L225+112 - ARM GAS /tmp/ccYgfTud.s page 461 +2131:Src/main.c **** //Reset all periphery + 6105 .loc 1 2131 2 is_stmt 1 view .LVU1950 +2131:Src/main.c **** //Reset all periphery + 6106 .loc 1 2131 11 is_stmt 0 view .LVU1951 + 6107 0146 674B ldr r3, .L304+96 + 6108 0148 1C60 str r4, [r3] +2133:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); + 6109 .loc 1 2133 2 is_stmt 1 view .LVU1952 + 6110 014a 674F ldr r7, .L304+100 + 6111 014c 2246 mov r2, r4 + 6112 014e 0821 movs r1, #8 + 6113 0150 3846 mov r0, r7 + 6114 0152 FFF7FEFF bl HAL_GPIO_WritePin + 6115 .LVL546: +2134:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); + 6116 .loc 1 2134 2 view .LVU1953 + 6117 0156 2246 mov r2, r4 + 6118 0158 0421 movs r1, #4 + 6119 015a 3846 mov r0, r7 + 6120 015c FFF7FEFF bl HAL_GPIO_WritePin + 6121 .LVL547: +2135:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); + 6122 .loc 1 2135 2 view .LVU1954 + 6123 0160 DFF8A881 ldr r8, .L304+136 + 6124 0164 2246 mov r2, r4 + 6125 0166 4FF48071 mov r1, #256 + 6126 016a 4046 mov r0, r8 + 6127 016c FFF7FEFF bl HAL_GPIO_WritePin + 6128 .LVL548: +2136:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); + 6129 .loc 1 2136 2 view .LVU1955 + 6130 0170 2246 mov r2, r4 + 6131 0172 1021 movs r1, #16 + 6132 0174 3846 mov r0, r7 + 6133 0176 FFF7FEFF bl HAL_GPIO_WritePin + 6134 .LVL549: +2137:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); + 6135 .loc 1 2137 2 view .LVU1956 + 6136 017a 5C4E ldr r6, .L304+104 + 6137 017c 2246 mov r2, r4 + 6138 017e 4FF48061 mov r1, #1024 + 6139 0182 3046 mov r0, r6 + 6140 0184 FFF7FEFF bl HAL_GPIO_WritePin + 6141 .LVL550: +2138:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); + 6142 .loc 1 2138 2 view .LVU1957 + 6143 0188 594D ldr r5, .L304+108 + 6144 018a 2246 mov r2, r4 + 6145 018c 0821 movs r1, #8 + 6146 018e 2846 mov r0, r5 + 6147 0190 FFF7FEFF bl HAL_GPIO_WritePin + 6148 .LVL551: +2139:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); + 6149 .loc 1 2139 2 view .LVU1958 + 6150 0194 2246 mov r2, r4 + 6151 0196 0121 movs r1, #1 + 6152 0198 2846 mov r0, r5 + ARM GAS /tmp/ccwR4KB7.s page 484 - 5354 01d0 0122 movs r2, #1 - 5355 01d2 4021 movs r1, #64 - 5356 01d4 2046 mov r0, r4 - 5357 01d6 FFF7FEFF bl HAL_GPIO_WritePin - 5358 .LVL439: -2104:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 5359 .loc 1 2104 2 view .LVU1720 - 5360 01da 0122 movs r2, #1 - 5361 01dc 4FF48041 mov r1, #16384 - 5362 01e0 3846 mov r0, r7 - 5363 01e2 FFF7FEFF bl HAL_GPIO_WritePin - 5364 .LVL440: -2105:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 - 5365 .loc 1 2105 2 view .LVU1721 - 5366 01e6 0122 movs r2, #1 - 5367 01e8 4FF48041 mov r1, #16384 - 5368 01ec 2046 mov r0, r4 - 5369 01ee FFF7FEFF bl HAL_GPIO_WritePin - 5370 .LVL441: -2106:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 5371 .loc 1 2106 2 view .LVU1722 - 5372 01f2 0122 movs r2, #1 - 5373 01f4 4FF48041 mov r1, #16384 - 5374 01f8 3046 mov r0, r6 - 5375 01fa FFF7FEFF bl HAL_GPIO_WritePin - 5376 .LVL442: -2107:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 5377 .loc 1 2107 2 view .LVU1723 - 5378 01fe 0122 movs r2, #1 - 5379 0200 4021 movs r1, #64 - 5380 0202 2846 mov r0, r5 - 5381 0204 FFF7FEFF bl HAL_GPIO_WritePin - 5382 .LVL443: -2108:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 5383 .loc 1 2108 2 view .LVU1724 - 5384 0208 0122 movs r2, #1 - 5385 020a 4FF48051 mov r1, #4096 - 5386 020e 3046 mov r0, r6 - 5387 0210 FFF7FEFF bl HAL_GPIO_WritePin - 5388 .LVL444: -2109:Src/main.c **** - 5389 .loc 1 2109 2 view .LVU1725 - 5390 0214 0122 movs r2, #1 - 5391 0216 1021 movs r1, #16 - 5392 0218 2846 mov r0, r5 - 5393 021a FFF7FEFF bl HAL_GPIO_WritePin - 5394 .LVL445: -2113:Src/main.c **** { - 5395 .loc 1 2113 2 view .LVU1726 -2113:Src/main.c **** { - 5396 .loc 1 2113 6 is_stmt 0 view .LVU1727 - 5397 021e 0121 movs r1, #1 - 5398 0220 4046 mov r0, r8 - 5399 0222 FFF7FEFF bl HAL_GPIO_ReadPin - 5400 .LVL446: -2113:Src/main.c **** { - 5401 .loc 1 2113 5 discriminator 1 view .LVU1728 - ARM GAS /tmp/ccYgfTud.s page 462 + 6153 019a FFF7FEFF bl HAL_GPIO_WritePin + 6154 .LVL552: +2140:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 6155 .loc 1 2140 2 view .LVU1959 + 6156 019e 2246 mov r2, r4 + 6157 01a0 0221 movs r1, #2 + 6158 01a2 2846 mov r0, r5 + 6159 01a4 FFF7FEFF bl HAL_GPIO_WritePin + 6160 .LVL553: +2141:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 6161 .loc 1 2141 2 view .LVU1960 + 6162 01a8 2246 mov r2, r4 + 6163 01aa 4FF40061 mov r1, #2048 + 6164 01ae 3046 mov r0, r6 + 6165 01b0 FFF7FEFF bl HAL_GPIO_WritePin + 6166 .LVL554: +2142:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) + 6167 .loc 1 2142 2 view .LVU1961 + 6168 01b4 2246 mov r2, r4 + 6169 01b6 2021 movs r1, #32 + 6170 01b8 3846 mov r0, r7 + 6171 01ba FFF7FEFF bl HAL_GPIO_WritePin + 6172 .LVL555: +2152:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC + 6173 .loc 1 2152 2 view .LVU1962 + 6174 01be 07F50067 add r7, r7, #2048 + 6175 01c2 0122 movs r2, #1 + 6176 01c4 4FF48061 mov r1, #1024 + 6177 01c8 3846 mov r0, r7 + 6178 01ca FFF7FEFF bl HAL_GPIO_WritePin + 6179 .LVL556: +2153:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 6180 .loc 1 2153 2 view .LVU1963 + 6181 01ce 494C ldr r4, .L304+112 + 6182 01d0 0122 movs r2, #1 + 6183 01d2 4021 movs r1, #64 + 6184 01d4 2046 mov r0, r4 + 6185 01d6 FFF7FEFF bl HAL_GPIO_WritePin + 6186 .LVL557: +2154:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 6187 .loc 1 2154 2 view .LVU1964 + 6188 01da 0122 movs r2, #1 + 6189 01dc 4FF48041 mov r1, #16384 + 6190 01e0 3846 mov r0, r7 + 6191 01e2 FFF7FEFF bl HAL_GPIO_WritePin + 6192 .LVL558: +2155:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 + 6193 .loc 1 2155 2 view .LVU1965 + 6194 01e6 0122 movs r2, #1 + 6195 01e8 4FF48041 mov r1, #16384 + 6196 01ec 2046 mov r0, r4 + 6197 01ee FFF7FEFF bl HAL_GPIO_WritePin + 6198 .LVL559: +2156:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 6199 .loc 1 2156 2 view .LVU1966 + 6200 01f2 0122 movs r2, #1 + 6201 01f4 4FF48041 mov r1, #16384 + ARM GAS /tmp/ccwR4KB7.s page 485 - 5402 0226 50B1 cbz r0, .L223 - 5403 .L219: -2144:Src/main.c **** } - 5404 .loc 1 2144 2 is_stmt 1 view .LVU1729 - 5405 0228 FFF7FEFF bl AD9102_Init - 5406 .LVL447: -2145:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 5407 .loc 1 2145 1 is_stmt 0 view .LVU1730 - 5408 022c BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 5409 .LVL448: - 5410 .L222: - 5411 .LBB549: - 5412 .LBB548: + 6202 01f8 3046 mov r0, r6 + 6203 01fa FFF7FEFF bl HAL_GPIO_WritePin + 6204 .LVL560: +2157:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 6205 .loc 1 2157 2 view .LVU1967 + 6206 01fe 0122 movs r2, #1 + 6207 0200 4021 movs r1, #64 + 6208 0202 2846 mov r0, r5 + 6209 0204 FFF7FEFF bl HAL_GPIO_WritePin + 6210 .LVL561: +2158:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 6211 .loc 1 2158 2 view .LVU1968 + 6212 0208 0122 movs r2, #1 + 6213 020a 4FF48051 mov r1, #4096 + 6214 020e 3046 mov r0, r6 + 6215 0210 FFF7FEFF bl HAL_GPIO_WritePin + 6216 .LVL562: +2159:Src/main.c **** + 6217 .loc 1 2159 2 view .LVU1969 + 6218 0214 0122 movs r2, #1 + 6219 0216 1021 movs r1, #16 + 6220 0218 2846 mov r0, r5 + 6221 021a FFF7FEFF bl HAL_GPIO_WritePin + 6222 .LVL563: +2163:Src/main.c **** { + 6223 .loc 1 2163 2 view .LVU1970 +2163:Src/main.c **** { + 6224 .loc 1 2163 6 is_stmt 0 view .LVU1971 + 6225 021e 0121 movs r1, #1 + 6226 0220 4046 mov r0, r8 + 6227 0222 FFF7FEFF bl HAL_GPIO_ReadPin + 6228 .LVL564: +2163:Src/main.c **** { + 6229 .loc 1 2163 5 discriminator 1 view .LVU1972 + 6230 0226 50B1 cbz r0, .L302 + 6231 .L298: +2194:Src/main.c **** } + 6232 .loc 1 2194 2 is_stmt 1 view .LVU1973 + 6233 0228 FFF7FEFF bl AD9102_Init + 6234 .LVL565: +2195:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 6235 .loc 1 2195 1 is_stmt 0 view .LVU1974 + 6236 022c BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 6237 .LVL566: + 6238 .L301: + 6239 .LBB565: + 6240 .LBB564: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - 5413 .loc 6 1430 5 is_stmt 1 view .LVU1731 - 5414 0230 284B ldr r3, .L225+80 - 5415 .LVL449: + 6241 .loc 6 1430 5 is_stmt 1 view .LVU1975 + 6242 0230 284B ldr r3, .L304+80 + 6243 .LVL567: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - 5416 .loc 6 1430 5 is_stmt 0 view .LVU1732 - 5417 0232 C3F8C420 str r2, [r3, #196] + 6244 .loc 6 1430 5 is_stmt 0 view .LVU1976 + 6245 0232 C3F8C420 str r2, [r3, #196] 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5418 .loc 6 1431 5 is_stmt 1 view .LVU1733 - 5419 0236 294A ldr r2, .L225+88 - 5420 0238 C3F8C020 str r2, [r3, #192] - 5421 023c 80E7 b .L218 - 5422 .LVL450: - 5423 .L223: + 6246 .loc 6 1431 5 is_stmt 1 view .LVU1977 + 6247 0236 294A ldr r2, .L304+88 + ARM GAS /tmp/ccwR4KB7.s page 486 + + + 6248 0238 C3F8C020 str r2, [r3, #192] + 6249 023c 80E7 b .L297 + 6250 .LVL568: + 6251 .L302: 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 5424 .loc 6 1431 5 is_stmt 0 view .LVU1734 - 5425 .LBE548: - 5426 .LBE549: -2116:Src/main.c **** { - 5427 .loc 1 2116 3 is_stmt 1 view .LVU1735 -2116:Src/main.c **** { - 5428 .loc 1 2116 7 is_stmt 0 view .LVU1736 - 5429 023e 4FF48071 mov r1, #256 - 5430 0242 2846 mov r0, r5 - 5431 0244 FFF7FEFF bl HAL_GPIO_ReadPin - 5432 .LVL451: -2116:Src/main.c **** { - 5433 .loc 1 2116 6 discriminator 1 view .LVU1737 - 5434 0248 0028 cmp r0, #0 - 5435 024a EDD1 bne .L219 -2119:Src/main.c **** if (test == 0) //0 - suc - 5436 .loc 1 2119 4 is_stmt 1 view .LVU1738 -2119:Src/main.c **** if (test == 0) //0 - suc - 5437 .loc 1 2119 11 is_stmt 0 view .LVU1739 - 5438 024c 2A48 ldr r0, .L225+116 - 5439 024e FFF7FEFF bl Mount_SD - 5440 .LVL452: -2119:Src/main.c **** if (test == 0) //0 - suc - 5441 .loc 1 2119 9 discriminator 1 view .LVU1740 - 5442 0252 2A4B ldr r3, .L225+120 - 5443 0254 1860 str r0, [r3] -2120:Src/main.c **** { - 5444 .loc 1 2120 4 is_stmt 1 view .LVU1741 -2120:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 463 + 6252 .loc 6 1431 5 is_stmt 0 view .LVU1978 + 6253 .LBE564: + 6254 .LBE565: +2166:Src/main.c **** { + 6255 .loc 1 2166 3 is_stmt 1 view .LVU1979 +2166:Src/main.c **** { + 6256 .loc 1 2166 7 is_stmt 0 view .LVU1980 + 6257 023e 4FF48071 mov r1, #256 + 6258 0242 2846 mov r0, r5 + 6259 0244 FFF7FEFF bl HAL_GPIO_ReadPin + 6260 .LVL569: +2166:Src/main.c **** { + 6261 .loc 1 2166 6 discriminator 1 view .LVU1981 + 6262 0248 0028 cmp r0, #0 + 6263 024a EDD1 bne .L298 +2169:Src/main.c **** if (test == 0) //0 - suc + 6264 .loc 1 2169 4 is_stmt 1 view .LVU1982 +2169:Src/main.c **** if (test == 0) //0 - suc + 6265 .loc 1 2169 11 is_stmt 0 view .LVU1983 + 6266 024c 2A48 ldr r0, .L304+116 + 6267 024e FFF7FEFF bl Mount_SD + 6268 .LVL570: +2169:Src/main.c **** if (test == 0) //0 - suc + 6269 .loc 1 2169 9 discriminator 1 view .LVU1984 + 6270 0252 2A4B ldr r3, .L304+120 + 6271 0254 1860 str r0, [r3] +2170:Src/main.c **** { + 6272 .loc 1 2170 4 is_stmt 1 view .LVU1985 +2170:Src/main.c **** { + 6273 .loc 1 2170 7 is_stmt 0 view .LVU1986 + 6274 0256 18B1 cbz r0, .L303 + 6275 .L299: +2182:Src/main.c **** } + 6276 .loc 1 2182 4 is_stmt 1 view .LVU1987 +2182:Src/main.c **** } + 6277 .loc 1 2182 14 is_stmt 0 view .LVU1988 + 6278 0258 294B ldr r3, .L304+124 + 6279 025a 0122 movs r2, #1 + 6280 025c 1A70 strb r2, [r3] + 6281 025e E3E7 b .L298 + 6282 .L303: +2173:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6283 .loc 1 2173 5 is_stmt 1 view .LVU1989 +2173:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6284 .loc 1 2173 12 is_stmt 0 view .LVU1990 + 6285 0260 1E23 movs r3, #30 + 6286 0262 1A46 mov r2, r3 + 6287 0264 2749 ldr r1, .L304+128 + 6288 0266 2848 ldr r0, .L304+132 + 6289 0268 FFF7FEFF bl Seek_Read_File + 6290 .LVL571: +2173:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + ARM GAS /tmp/ccwR4KB7.s page 487 - 5445 .loc 1 2120 7 is_stmt 0 view .LVU1742 - 5446 0256 18B1 cbz r0, .L224 - 5447 .L220: -2132:Src/main.c **** } - 5448 .loc 1 2132 4 is_stmt 1 view .LVU1743 -2132:Src/main.c **** } - 5449 .loc 1 2132 14 is_stmt 0 view .LVU1744 - 5450 0258 294B ldr r3, .L225+124 - 5451 025a 0122 movs r2, #1 - 5452 025c 1A70 strb r2, [r3] - 5453 025e E3E7 b .L219 - 5454 .L224: -2123:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5455 .loc 1 2123 5 is_stmt 1 view .LVU1745 -2123:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5456 .loc 1 2123 12 is_stmt 0 view .LVU1746 - 5457 0260 1E23 movs r3, #30 - 5458 0262 1A46 mov r2, r3 - 5459 0264 2749 ldr r1, .L225+128 - 5460 0266 2848 ldr r0, .L225+132 - 5461 0268 FFF7FEFF bl Seek_Read_File - 5462 .LVL453: -2123:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5463 .loc 1 2123 10 discriminator 1 view .LVU1747 - 5464 026c 234C ldr r4, .L225+120 - 5465 026e 2060 str r0, [r4] -2124:Src/main.c **** UART_rec_incr = 0; - 5466 .loc 1 2124 5 is_stmt 1 view .LVU1748 -2124:Src/main.c **** UART_rec_incr = 0; - 5467 .loc 1 2124 12 is_stmt 0 view .LVU1749 - 5468 0270 2148 ldr r0, .L225+116 - 5469 0272 FFF7FEFF bl Unmount_SD - 5470 .LVL454: -2124:Src/main.c **** UART_rec_incr = 0; - 5471 .loc 1 2124 10 discriminator 1 view .LVU1750 - 5472 0276 2060 str r0, [r4] -2125:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 5473 .loc 1 2125 5 is_stmt 1 view .LVU1751 -2125:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 5474 .loc 1 2125 19 is_stmt 0 view .LVU1752 - 5475 0278 0023 movs r3, #0 - 5476 027a 084A ldr r2, .L225+24 - 5477 027c 1380 strh r3, [r2] @ movhi -2126:Src/main.c **** } - 5478 .loc 1 2126 5 is_stmt 1 view .LVU1753 -2126:Src/main.c **** } - 5479 .loc 1 2126 13 is_stmt 0 view .LVU1754 - 5480 027e 064A ldr r2, .L225+20 - 5481 0280 1370 strb r3, [r2] - 5482 0282 E9E7 b .L220 - 5483 .L226: - 5484 .align 2 - 5485 .L225: - 5486 0284 00000000 .word TO6 - 5487 0288 00000000 .word TO7 - 5488 028c 00000000 .word TO7_before - 5489 0290 00000000 .word TO6_before - ARM GAS /tmp/ccYgfTud.s page 464 + 6291 .loc 1 2173 10 discriminator 1 view .LVU1991 + 6292 026c 234C ldr r4, .L304+120 + 6293 026e 2060 str r0, [r4] +2174:Src/main.c **** UART_rec_incr = 0; + 6294 .loc 1 2174 5 is_stmt 1 view .LVU1992 +2174:Src/main.c **** UART_rec_incr = 0; + 6295 .loc 1 2174 12 is_stmt 0 view .LVU1993 + 6296 0270 2148 ldr r0, .L304+116 + 6297 0272 FFF7FEFF bl Unmount_SD + 6298 .LVL572: +2174:Src/main.c **** UART_rec_incr = 0; + 6299 .loc 1 2174 10 discriminator 1 view .LVU1994 + 6300 0276 2060 str r0, [r4] +2175:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 6301 .loc 1 2175 5 is_stmt 1 view .LVU1995 +2175:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 6302 .loc 1 2175 19 is_stmt 0 view .LVU1996 + 6303 0278 0023 movs r3, #0 + 6304 027a 084A ldr r2, .L304+24 + 6305 027c 1380 strh r3, [r2] @ movhi +2176:Src/main.c **** } + 6306 .loc 1 2176 5 is_stmt 1 view .LVU1997 +2176:Src/main.c **** } + 6307 .loc 1 2176 13 is_stmt 0 view .LVU1998 + 6308 027e 064A ldr r2, .L304+20 + 6309 0280 1370 strb r3, [r2] + 6310 0282 E9E7 b .L299 + 6311 .L305: + 6312 .align 2 + 6313 .L304: + 6314 0284 00000000 .word TO6 + 6315 0288 00000000 .word TO7 + 6316 028c 00000000 .word TO7_before + 6317 0290 00000000 .word TO6_before + 6318 0294 00000000 .word TO6_uart + 6319 0298 00000000 .word flg_tmt + 6320 029c 00000000 .word UART_rec_incr + 6321 02a0 00000000 .word fgoto + 6322 02a4 00000000 .word sizeoffile + 6323 02a8 00000000 .word u_tx_flg + 6324 02ac 00000000 .word u_rx_flg + 6325 02b0 00000000 .word Long_Data + 6326 02b4 00000000 .word Def_setup + 6327 02b8 00000000 .word LD1_def_setup + 6328 02bc 00000000 .word LD2_def_setup + 6329 02c0 00000000 .word Curr_setup + 6330 02c4 00000000 .word LD1_curr_setup + 6331 02c8 00000000 .word LD2_curr_setup + 6332 02cc 00100040 .word 1073745920 + 6333 02d0 00100140 .word 1073811456 + 6334 02d4 00640240 .word 1073898496 + 6335 02d8 00000000 .word UART_DATA + 6336 02dc 28100140 .word 1073811496 + 6337 02e0 00000000 .word SD_SEEK + 6338 02e4 00000000 .word SD_SLIDE + 6339 02e8 00080240 .word 1073874944 + 6340 02ec 00040240 .word 1073873920 + ARM GAS /tmp/ccwR4KB7.s page 488 - 5490 0294 00000000 .word TO6_uart - 5491 0298 00000000 .word flg_tmt - 5492 029c 00000000 .word UART_rec_incr - 5493 02a0 00000000 .word fgoto - 5494 02a4 00000000 .word sizeoffile - 5495 02a8 00000000 .word u_tx_flg - 5496 02ac 00000000 .word u_rx_flg - 5497 02b0 00000000 .word Long_Data - 5498 02b4 00000000 .word Def_setup - 5499 02b8 00000000 .word LD1_def_setup - 5500 02bc 00000000 .word LD2_def_setup - 5501 02c0 00000000 .word Curr_setup - 5502 02c4 00000000 .word LD1_curr_setup - 5503 02c8 00000000 .word LD2_curr_setup - 5504 02cc 00100040 .word 1073745920 - 5505 02d0 00100140 .word 1073811456 - 5506 02d4 00640240 .word 1073898496 - 5507 02d8 00000000 .word UART_DATA - 5508 02dc 28100140 .word 1073811496 - 5509 02e0 00000000 .word SD_SEEK - 5510 02e4 00000000 .word SD_SLIDE - 5511 02e8 00080240 .word 1073874944 - 5512 02ec 00040240 .word 1073873920 - 5513 02f0 00000240 .word 1073872896 - 5514 02f4 00140240 .word 1073878016 - 5515 02f8 00000000 .word .LC0 - 5516 02fc 00000000 .word test - 5517 0300 00000000 .word CPU_state - 5518 0304 00000000 .word COMMAND - 5519 0308 04000000 .word .LC1 - 5520 030c 000C0240 .word 1073875968 - 5521 .cfi_endproc - 5522 .LFE1207: - 5524 .section .text.Get_ADC,"ax",%progbits - 5525 .align 1 - 5526 .syntax unified - 5527 .thumb - 5528 .thumb_func - 5530 Get_ADC: - 5531 .LVL455: - 5532 .LFB1219: -2785:Src/main.c **** uint16_t OUT; - 5533 .loc 1 2785 1 is_stmt 1 view -0 - 5534 .cfi_startproc - 5535 @ args = 0, pretend = 0, frame = 0 - 5536 @ frame_needed = 0, uses_anonymous_args = 0 -2785:Src/main.c **** uint16_t OUT; - 5537 .loc 1 2785 1 is_stmt 0 view .LVU1756 - 5538 0000 10B5 push {r4, lr} - 5539 .LCFI54: - 5540 .cfi_def_cfa_offset 8 - 5541 .cfi_offset 4, -8 - 5542 .cfi_offset 14, -4 - 5543 0002 0024 movs r4, #0 -2786:Src/main.c **** switch (num) - 5544 .loc 1 2786 2 is_stmt 1 view .LVU1757 -2787:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 465 + 6341 02f0 00000240 .word 1073872896 + 6342 02f4 00140240 .word 1073878016 + 6343 02f8 00000000 .word .LC0 + 6344 02fc 00000000 .word test + 6345 0300 00000000 .word CPU_state + 6346 0304 00000000 .word COMMAND + 6347 0308 04000000 .word .LC1 + 6348 030c 000C0240 .word 1073875968 + 6349 .cfi_endproc + 6350 .LFE1207: + 6352 .section .text.Get_ADC,"ax",%progbits + 6353 .align 1 + 6354 .syntax unified + 6355 .thumb + 6356 .thumb_func + 6358 Get_ADC: + 6359 .LVL573: + 6360 .LFB1222: +3064:Src/main.c **** uint16_t OUT; + 6361 .loc 1 3064 1 is_stmt 1 view -0 + 6362 .cfi_startproc + 6363 @ args = 0, pretend = 0, frame = 0 + 6364 @ frame_needed = 0, uses_anonymous_args = 0 +3064:Src/main.c **** uint16_t OUT; + 6365 .loc 1 3064 1 is_stmt 0 view .LVU2000 + 6366 0000 10B5 push {r4, lr} + 6367 .LCFI63: + 6368 .cfi_def_cfa_offset 8 + 6369 .cfi_offset 4, -8 + 6370 .cfi_offset 14, -4 + 6371 0002 0024 movs r4, #0 +3065:Src/main.c **** switch (num) + 6372 .loc 1 3065 2 is_stmt 1 view .LVU2001 +3066:Src/main.c **** { + 6373 .loc 1 3066 2 view .LVU2002 + 6374 0004 0528 cmp r0, #5 + 6375 0006 2CD8 bhi .L315 + 6376 0008 DFE800F0 tbb [pc, r0] + 6377 .L309: + 6378 000c 03 .byte (.L314-.L309)/2 + 6379 000d 08 .byte (.L313-.L309)/2 + 6380 000e 12 .byte (.L312-.L309)/2 + 6381 000f 17 .byte (.L311-.L309)/2 + 6382 0010 1C .byte (.L310-.L309)/2 + 6383 0011 26 .byte (.L308-.L309)/2 + 6384 .p2align 1 + 6385 .L314: +3069:Src/main.c **** break; + 6386 .loc 1 3069 5 view .LVU2003 + 6387 0012 1548 ldr r0, .L317 + 6388 .LVL574: +3069:Src/main.c **** break; + 6389 .loc 1 3069 5 is_stmt 0 view .LVU2004 + 6390 0014 FFF7FEFF bl HAL_ADC_Start + 6391 .LVL575: +3070:Src/main.c **** case 1: + 6392 .loc 1 3070 4 is_stmt 1 view .LVU2005 + ARM GAS /tmp/ccwR4KB7.s page 489 - 5545 .loc 1 2787 2 view .LVU1758 - 5546 0004 0528 cmp r0, #5 - 5547 0006 2CD8 bhi .L236 - 5548 0008 DFE800F0 tbb [pc, r0] - 5549 .L230: - 5550 000c 03 .byte (.L235-.L230)/2 - 5551 000d 08 .byte (.L234-.L230)/2 - 5552 000e 12 .byte (.L233-.L230)/2 - 5553 000f 17 .byte (.L232-.L230)/2 - 5554 0010 1C .byte (.L231-.L230)/2 - 5555 0011 26 .byte (.L229-.L230)/2 - 5556 .p2align 1 - 5557 .L235: -2790:Src/main.c **** break; - 5558 .loc 1 2790 5 view .LVU1759 - 5559 0012 1548 ldr r0, .L238 - 5560 .LVL456: -2790:Src/main.c **** break; - 5561 .loc 1 2790 5 is_stmt 0 view .LVU1760 - 5562 0014 FFF7FEFF bl HAL_ADC_Start - 5563 .LVL457: -2791:Src/main.c **** case 1: - 5564 .loc 1 2791 4 is_stmt 1 view .LVU1761 - 5565 0018 2046 mov r0, r4 - 5566 .L228: - 5567 .LVL458: -2810:Src/main.c **** } - 5568 .loc 1 2810 2 view .LVU1762 -2811:Src/main.c **** - 5569 .loc 1 2811 1 is_stmt 0 view .LVU1763 - 5570 001a 10BD pop {r4, pc} - 5571 .LVL459: - 5572 .L234: -2793:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 5573 .loc 1 2793 5 is_stmt 1 view .LVU1764 - 5574 001c 124C ldr r4, .L238 - 5575 001e 6421 movs r1, #100 - 5576 0020 2046 mov r0, r4 - 5577 .LVL460: -2793:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 5578 .loc 1 2793 5 is_stmt 0 view .LVU1765 - 5579 0022 FFF7FEFF bl HAL_ADC_PollForConversion - 5580 .LVL461: -2794:Src/main.c **** break; - 5581 .loc 1 2794 9 is_stmt 1 view .LVU1766 -2794:Src/main.c **** break; - 5582 .loc 1 2794 15 is_stmt 0 view .LVU1767 - 5583 0026 2046 mov r0, r4 - 5584 0028 FFF7FEFF bl HAL_ADC_GetValue - 5585 .LVL462: -2794:Src/main.c **** break; - 5586 .loc 1 2794 13 discriminator 1 view .LVU1768 - 5587 002c 80B2 uxth r0, r0 - 5588 .LVL463: -2795:Src/main.c **** case 2: - 5589 .loc 1 2795 4 is_stmt 1 view .LVU1769 - 5590 002e F4E7 b .L228 - ARM GAS /tmp/ccYgfTud.s page 466 + 6393 0018 2046 mov r0, r4 + 6394 .L307: + 6395 .LVL576: +3089:Src/main.c **** } + 6396 .loc 1 3089 2 view .LVU2006 +3090:Src/main.c **** + 6397 .loc 1 3090 1 is_stmt 0 view .LVU2007 + 6398 001a 10BD pop {r4, pc} + 6399 .LVL577: + 6400 .L313: +3072:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 6401 .loc 1 3072 5 is_stmt 1 view .LVU2008 + 6402 001c 124C ldr r4, .L317 + 6403 001e 6421 movs r1, #100 + 6404 0020 2046 mov r0, r4 + 6405 .LVL578: +3072:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 6406 .loc 1 3072 5 is_stmt 0 view .LVU2009 + 6407 0022 FFF7FEFF bl HAL_ADC_PollForConversion + 6408 .LVL579: +3073:Src/main.c **** break; + 6409 .loc 1 3073 9 is_stmt 1 view .LVU2010 +3073:Src/main.c **** break; + 6410 .loc 1 3073 15 is_stmt 0 view .LVU2011 + 6411 0026 2046 mov r0, r4 + 6412 0028 FFF7FEFF bl HAL_ADC_GetValue + 6413 .LVL580: +3073:Src/main.c **** break; + 6414 .loc 1 3073 13 discriminator 1 view .LVU2012 + 6415 002c 80B2 uxth r0, r0 + 6416 .LVL581: +3074:Src/main.c **** case 2: + 6417 .loc 1 3074 4 is_stmt 1 view .LVU2013 + 6418 002e F4E7 b .L307 + 6419 .LVL582: + 6420 .L312: +3076:Src/main.c **** break; + 6421 .loc 1 3076 5 view .LVU2014 + 6422 0030 0D48 ldr r0, .L317 + 6423 .LVL583: +3076:Src/main.c **** break; + 6424 .loc 1 3076 5 is_stmt 0 view .LVU2015 + 6425 0032 FFF7FEFF bl HAL_ADC_Stop + 6426 .LVL584: +3077:Src/main.c **** case 3: + 6427 .loc 1 3077 4 is_stmt 1 view .LVU2016 + 6428 0036 2046 mov r0, r4 + 6429 0038 EFE7 b .L307 + 6430 .LVL585: + 6431 .L311: +3079:Src/main.c **** break; + 6432 .loc 1 3079 5 view .LVU2017 + 6433 003a 0C48 ldr r0, .L317+4 + 6434 .LVL586: +3079:Src/main.c **** break; + 6435 .loc 1 3079 5 is_stmt 0 view .LVU2018 + 6436 003c FFF7FEFF bl HAL_ADC_Start + ARM GAS /tmp/ccwR4KB7.s page 490 - 5591 .LVL464: - 5592 .L233: -2797:Src/main.c **** break; - 5593 .loc 1 2797 5 view .LVU1770 - 5594 0030 0D48 ldr r0, .L238 - 5595 .LVL465: -2797:Src/main.c **** break; - 5596 .loc 1 2797 5 is_stmt 0 view .LVU1771 - 5597 0032 FFF7FEFF bl HAL_ADC_Stop - 5598 .LVL466: -2798:Src/main.c **** case 3: - 5599 .loc 1 2798 4 is_stmt 1 view .LVU1772 - 5600 0036 2046 mov r0, r4 - 5601 0038 EFE7 b .L228 - 5602 .LVL467: - 5603 .L232: -2800:Src/main.c **** break; - 5604 .loc 1 2800 5 view .LVU1773 - 5605 003a 0C48 ldr r0, .L238+4 - 5606 .LVL468: -2800:Src/main.c **** break; - 5607 .loc 1 2800 5 is_stmt 0 view .LVU1774 - 5608 003c FFF7FEFF bl HAL_ADC_Start - 5609 .LVL469: -2801:Src/main.c **** case 4: - 5610 .loc 1 2801 4 is_stmt 1 view .LVU1775 - 5611 0040 2046 mov r0, r4 - 5612 0042 EAE7 b .L228 - 5613 .LVL470: - 5614 .L231: -2803:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 5615 .loc 1 2803 5 view .LVU1776 - 5616 0044 094C ldr r4, .L238+4 - 5617 0046 6421 movs r1, #100 - 5618 0048 2046 mov r0, r4 - 5619 .LVL471: -2803:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 5620 .loc 1 2803 5 is_stmt 0 view .LVU1777 - 5621 004a FFF7FEFF bl HAL_ADC_PollForConversion - 5622 .LVL472: -2804:Src/main.c **** break; - 5623 .loc 1 2804 9 is_stmt 1 view .LVU1778 -2804:Src/main.c **** break; - 5624 .loc 1 2804 15 is_stmt 0 view .LVU1779 - 5625 004e 2046 mov r0, r4 - 5626 0050 FFF7FEFF bl HAL_ADC_GetValue - 5627 .LVL473: -2804:Src/main.c **** break; - 5628 .loc 1 2804 13 discriminator 1 view .LVU1780 - 5629 0054 80B2 uxth r0, r0 - 5630 .LVL474: -2805:Src/main.c **** case 5: - 5631 .loc 1 2805 4 is_stmt 1 view .LVU1781 - 5632 0056 E0E7 b .L228 - 5633 .LVL475: - 5634 .L229: -2807:Src/main.c **** break; - ARM GAS /tmp/ccYgfTud.s page 467 + 6437 .LVL587: +3080:Src/main.c **** case 4: + 6438 .loc 1 3080 4 is_stmt 1 view .LVU2019 + 6439 0040 2046 mov r0, r4 + 6440 0042 EAE7 b .L307 + 6441 .LVL588: + 6442 .L310: +3082:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 6443 .loc 1 3082 5 view .LVU2020 + 6444 0044 094C ldr r4, .L317+4 + 6445 0046 6421 movs r1, #100 + 6446 0048 2046 mov r0, r4 + 6447 .LVL589: +3082:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 6448 .loc 1 3082 5 is_stmt 0 view .LVU2021 + 6449 004a FFF7FEFF bl HAL_ADC_PollForConversion + 6450 .LVL590: +3083:Src/main.c **** break; + 6451 .loc 1 3083 9 is_stmt 1 view .LVU2022 +3083:Src/main.c **** break; + 6452 .loc 1 3083 15 is_stmt 0 view .LVU2023 + 6453 004e 2046 mov r0, r4 + 6454 0050 FFF7FEFF bl HAL_ADC_GetValue + 6455 .LVL591: +3083:Src/main.c **** break; + 6456 .loc 1 3083 13 discriminator 1 view .LVU2024 + 6457 0054 80B2 uxth r0, r0 + 6458 .LVL592: +3084:Src/main.c **** case 5: + 6459 .loc 1 3084 4 is_stmt 1 view .LVU2025 + 6460 0056 E0E7 b .L307 + 6461 .LVL593: + 6462 .L308: +3086:Src/main.c **** break; + 6463 .loc 1 3086 9 view .LVU2026 + 6464 0058 0448 ldr r0, .L317+4 + 6465 .LVL594: +3086:Src/main.c **** break; + 6466 .loc 1 3086 9 is_stmt 0 view .LVU2027 + 6467 005a FFF7FEFF bl HAL_ADC_Stop + 6468 .LVL595: +3087:Src/main.c **** } + 6469 .loc 1 3087 4 is_stmt 1 view .LVU2028 + 6470 005e 2046 mov r0, r4 + 6471 0060 DBE7 b .L307 + 6472 .LVL596: + 6473 .L315: +3066:Src/main.c **** { + 6474 .loc 1 3066 2 is_stmt 0 view .LVU2029 + 6475 0062 2046 mov r0, r4 + 6476 .LVL597: +3066:Src/main.c **** { + 6477 .loc 1 3066 2 view .LVU2030 + 6478 0064 D9E7 b .L307 + 6479 .L318: + 6480 0066 00BF .align 2 + 6481 .L317: + ARM GAS /tmp/ccwR4KB7.s page 491 - 5635 .loc 1 2807 9 view .LVU1782 - 5636 0058 0448 ldr r0, .L238+4 - 5637 .LVL476: -2807:Src/main.c **** break; - 5638 .loc 1 2807 9 is_stmt 0 view .LVU1783 - 5639 005a FFF7FEFF bl HAL_ADC_Stop - 5640 .LVL477: -2808:Src/main.c **** } - 5641 .loc 1 2808 4 is_stmt 1 view .LVU1784 - 5642 005e 2046 mov r0, r4 - 5643 0060 DBE7 b .L228 - 5644 .LVL478: - 5645 .L236: -2787:Src/main.c **** { - 5646 .loc 1 2787 2 is_stmt 0 view .LVU1785 - 5647 0062 2046 mov r0, r4 - 5648 .LVL479: -2787:Src/main.c **** { - 5649 .loc 1 2787 2 view .LVU1786 - 5650 0064 D9E7 b .L228 - 5651 .L239: - 5652 0066 00BF .align 2 - 5653 .L238: - 5654 0068 00000000 .word hadc1 - 5655 006c 00000000 .word hadc3 - 5656 .cfi_endproc - 5657 .LFE1219: - 5659 .section .text.Set_LTEC,"ax",%progbits - 5660 .align 1 - 5661 .global Set_LTEC - 5662 .syntax unified - 5663 .thumb - 5664 .thumb_func - 5666 Set_LTEC: - 5667 .LVL480: - 5668 .LFB1217: -2605:Src/main.c **** uint32_t tmp32; - 5669 .loc 1 2605 1 is_stmt 1 view -0 - 5670 .cfi_startproc - 5671 @ args = 0, pretend = 0, frame = 0 - 5672 @ frame_needed = 0, uses_anonymous_args = 0 -2606:Src/main.c **** - 5673 .loc 1 2606 2 view .LVU1788 -2610:Src/main.c **** { - 5674 .loc 1 2610 2 view .LVU1789 -2610:Src/main.c **** { - 5675 .loc 1 2610 5 is_stmt 0 view .LVU1790 - 5676 0000 0328 cmp r0, #3 - 5677 0002 18BF it ne - 5678 0004 0128 cmpne r0, #1 - 5679 0006 00F0A380 beq .L274 -2605:Src/main.c **** uint32_t tmp32; - 5680 .loc 1 2605 1 view .LVU1791 - 5681 000a 38B5 push {r3, r4, r5, lr} - 5682 .LCFI55: - 5683 .cfi_def_cfa_offset 16 - 5684 .cfi_offset 3, -16 - ARM GAS /tmp/ccYgfTud.s page 468 + 6482 0068 00000000 .word hadc1 + 6483 006c 00000000 .word hadc3 + 6484 .cfi_endproc + 6485 .LFE1222: + 6487 .section .text.Set_LTEC,"ax",%progbits + 6488 .align 1 + 6489 .global Set_LTEC + 6490 .syntax unified + 6491 .thumb + 6492 .thumb_func + 6494 Set_LTEC: + 6495 .LVL598: + 6496 .LFB1220: +2884:Src/main.c **** uint32_t tmp32; + 6497 .loc 1 2884 1 is_stmt 1 view -0 + 6498 .cfi_startproc + 6499 @ args = 0, pretend = 0, frame = 0 + 6500 @ frame_needed = 0, uses_anonymous_args = 0 +2885:Src/main.c **** + 6501 .loc 1 2885 2 view .LVU2032 +2889:Src/main.c **** { + 6502 .loc 1 2889 2 view .LVU2033 +2889:Src/main.c **** { + 6503 .loc 1 2889 5 is_stmt 0 view .LVU2034 + 6504 0000 0328 cmp r0, #3 + 6505 0002 18BF it ne + 6506 0004 0128 cmpne r0, #1 + 6507 0006 00F0A380 beq .L353 +2884:Src/main.c **** uint32_t tmp32; + 6508 .loc 1 2884 1 view .LVU2035 + 6509 000a 38B5 push {r3, r4, r5, lr} + 6510 .LCFI64: + 6511 .cfi_def_cfa_offset 16 + 6512 .cfi_offset 3, -16 + 6513 .cfi_offset 4, -12 + 6514 .cfi_offset 5, -8 + 6515 .cfi_offset 14, -4 + 6516 000c 0C46 mov r4, r1 +2895:Src/main.c **** { + 6517 .loc 1 2895 2 is_stmt 1 view .LVU2036 + 6518 000e 0138 subs r0, r0, #1 + 6519 .LVL599: +2895:Src/main.c **** { + 6520 .loc 1 2895 2 is_stmt 0 view .LVU2037 + 6521 0010 0328 cmp r0, #3 + 6522 0012 23D8 bhi .L321 + 6523 0014 DFE800F0 tbb [pc, r0] + 6524 .L323: + 6525 0018 02 .byte (.L326-.L323)/2 + 6526 0019 3B .byte (.L325-.L323)/2 + 6527 001a 5B .byte (.L324-.L323)/2 + 6528 001b 7C .byte (.L322-.L323)/2 + 6529 .p2align 1 + 6530 .L326: +2898:Src/main.c **** //tmp32=0; + 6531 .loc 1 2898 4 is_stmt 1 view .LVU2038 + 6532 001c 0022 movs r2, #0 + ARM GAS /tmp/ccwR4KB7.s page 492 - 5685 .cfi_offset 4, -12 - 5686 .cfi_offset 5, -8 - 5687 .cfi_offset 14, -4 - 5688 000c 0C46 mov r4, r1 -2616:Src/main.c **** { - 5689 .loc 1 2616 2 is_stmt 1 view .LVU1792 - 5690 000e 0138 subs r0, r0, #1 - 5691 .LVL481: -2616:Src/main.c **** { - 5692 .loc 1 2616 2 is_stmt 0 view .LVU1793 - 5693 0010 0328 cmp r0, #3 - 5694 0012 23D8 bhi .L242 - 5695 0014 DFE800F0 tbb [pc, r0] - 5696 .L244: - 5697 0018 02 .byte (.L247-.L244)/2 - 5698 0019 3B .byte (.L246-.L244)/2 - 5699 001a 5B .byte (.L245-.L244)/2 - 5700 001b 7C .byte (.L243-.L244)/2 - 5701 .p2align 1 - 5702 .L247: -2619:Src/main.c **** //tmp32=0; - 5703 .loc 1 2619 4 is_stmt 1 view .LVU1794 - 5704 001c 0022 movs r2, #0 - 5705 001e 4FF48041 mov r1, #16384 - 5706 .LVL482: -2619:Src/main.c **** //tmp32=0; - 5707 .loc 1 2619 4 is_stmt 0 view .LVU1795 - 5708 0022 4C48 ldr r0, .L277 - 5709 .LVL483: -2619:Src/main.c **** //tmp32=0; - 5710 .loc 1 2619 4 view .LVU1796 - 5711 0024 FFF7FEFF bl HAL_GPIO_WritePin - 5712 .LVL484: -2622:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 5713 .loc 1 2622 4 is_stmt 1 view .LVU1797 -2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5714 .loc 1 2623 4 view .LVU1798 -2622:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 5715 .loc 1 2622 10 is_stmt 0 view .LVU1799 - 5716 0028 0022 movs r2, #0 - 5717 .LVL485: - 5718 .L248: -2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5719 .loc 1 2623 42 is_stmt 1 discriminator 1 view .LVU1800 - 5720 .LBB550: - 5721 .LBI550: + 6533 001e 4FF48041 mov r1, #16384 + 6534 .LVL600: +2898:Src/main.c **** //tmp32=0; + 6535 .loc 1 2898 4 is_stmt 0 view .LVU2039 + 6536 0022 4C48 ldr r0, .L356 + 6537 .LVL601: +2898:Src/main.c **** //tmp32=0; + 6538 .loc 1 2898 4 view .LVU2040 + 6539 0024 FFF7FEFF bl HAL_GPIO_WritePin + 6540 .LVL602: +2901:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6541 .loc 1 2901 4 is_stmt 1 view .LVU2041 +2902:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6542 .loc 1 2902 4 view .LVU2042 +2901:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6543 .loc 1 2901 10 is_stmt 0 view .LVU2043 + 6544 0028 0022 movs r2, #0 + 6545 .LVL603: + 6546 .L327: +2902:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6547 .loc 1 2902 42 is_stmt 1 discriminator 1 view .LVU2044 + 6548 .LBB566: + 6549 .LBI566: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5722 .loc 4 916 26 view .LVU1801 - 5723 .LBB551: + 6550 .loc 4 916 26 view .LVU2045 + 6551 .LBB567: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5724 .loc 4 918 3 view .LVU1802 + 6552 .loc 4 918 3 view .LVU2046 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5725 .loc 4 918 12 is_stmt 0 view .LVU1803 - 5726 002a 4B4B ldr r3, .L277+4 - 5727 002c 9B68 ldr r3, [r3, #8] + 6553 .loc 4 918 12 is_stmt 0 view .LVU2047 + 6554 002a 4B4B ldr r3, .L356+4 + 6555 002c 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5728 .loc 4 918 66 view .LVU1804 - ARM GAS /tmp/ccYgfTud.s page 469 + 6556 .loc 4 918 66 view .LVU2048 + 6557 002e 13F0020F tst r3, #2 + 6558 0032 04D1 bne .L328 + 6559 .LVL604: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6560 .loc 4 918 66 view .LVU2049 + 6561 .LBE567: + 6562 .LBE566: +2902:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6563 .loc 1 2902 42 discriminator 2 view .LVU2050 + 6564 0034 B2F5FA7F cmp r2, #500 + 6565 0038 01D8 bhi .L328 +2902:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6566 .loc 1 2902 59 is_stmt 1 discriminator 3 view .LVU2051 +2902:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6567 .loc 1 2902 64 is_stmt 0 discriminator 3 view .LVU2052 + 6568 003a 0132 adds r2, r2, #1 + 6569 .LVL605: +2902:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6570 .loc 1 2902 64 discriminator 3 view .LVU2053 + 6571 003c F5E7 b .L327 + 6572 .L328: +2903:Src/main.c **** tmp32 = 0; + 6573 .loc 1 2903 4 is_stmt 1 view .LVU2054 + ARM GAS /tmp/ccwR4KB7.s page 493 - 5729 002e 13F0020F tst r3, #2 - 5730 0032 04D1 bne .L249 - 5731 .LVL486: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5732 .loc 4 918 66 view .LVU1805 - 5733 .LBE551: - 5734 .LBE550: -2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5735 .loc 1 2623 42 discriminator 2 view .LVU1806 - 5736 0034 B2F5FA7F cmp r2, #500 - 5737 0038 01D8 bhi .L249 -2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5738 .loc 1 2623 59 is_stmt 1 discriminator 3 view .LVU1807 -2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5739 .loc 1 2623 64 is_stmt 0 discriminator 3 view .LVU1808 - 5740 003a 0132 adds r2, r2, #1 - 5741 .LVL487: -2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5742 .loc 1 2623 64 discriminator 3 view .LVU1809 - 5743 003c F5E7 b .L248 - 5744 .L249: -2624:Src/main.c **** tmp32 = 0; - 5745 .loc 1 2624 4 is_stmt 1 view .LVU1810 - 5746 .LVL488: - 5747 .LBB552: - 5748 .LBI552: + 6574 .LVL606: + 6575 .LBB568: + 6576 .LBI568: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5749 .loc 4 1373 22 view .LVU1811 - 5750 .LBB553: + 6577 .loc 4 1373 22 view .LVU2055 + 6578 .LBB569: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 5751 .loc 4 1376 3 view .LVU1812 - 5752 .loc 4 1377 3 view .LVU1813 - 5753 .loc 4 1377 10 is_stmt 0 view .LVU1814 - 5754 003e 464B ldr r3, .L277+4 - 5755 0040 9C81 strh r4, [r3, #12] @ movhi - 5756 .LVL489: - 5757 .loc 4 1377 10 view .LVU1815 - 5758 .LBE553: - 5759 .LBE552: -2625:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 5760 .loc 1 2625 4 is_stmt 1 view .LVU1816 -2626:Src/main.c **** (void) SPI2->DR; - 5761 .loc 1 2626 4 view .LVU1817 -2625:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 5762 .loc 1 2625 10 is_stmt 0 view .LVU1818 - 5763 0042 0022 movs r2, #0 - 5764 .LVL490: - 5765 .L251: -2626:Src/main.c **** (void) SPI2->DR; - 5766 .loc 1 2626 43 is_stmt 1 discriminator 1 view .LVU1819 - 5767 .LBB554: - 5768 .LBI554: + 6579 .loc 4 1376 3 view .LVU2056 + 6580 .loc 4 1377 3 view .LVU2057 + 6581 .loc 4 1377 10 is_stmt 0 view .LVU2058 + 6582 003e 464B ldr r3, .L356+4 + 6583 0040 9C81 strh r4, [r3, #12] @ movhi + 6584 .LVL607: + 6585 .loc 4 1377 10 view .LVU2059 + 6586 .LBE569: + 6587 .LBE568: +2904:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6588 .loc 1 2904 4 is_stmt 1 view .LVU2060 +2905:Src/main.c **** (void) SPI2->DR; + 6589 .loc 1 2905 4 view .LVU2061 +2904:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6590 .loc 1 2904 10 is_stmt 0 view .LVU2062 + 6591 0042 0022 movs r2, #0 + 6592 .LVL608: + 6593 .L330: +2905:Src/main.c **** (void) SPI2->DR; + 6594 .loc 1 2905 43 is_stmt 1 discriminator 1 view .LVU2063 + 6595 .LBB570: + 6596 .LBI570: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5769 .loc 4 905 26 view .LVU1820 - 5770 .LBB555: + 6597 .loc 4 905 26 view .LVU2064 + 6598 .LBB571: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5771 .loc 4 907 3 view .LVU1821 - ARM GAS /tmp/ccYgfTud.s page 470 + 6599 .loc 4 907 3 view .LVU2065 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6600 .loc 4 907 12 is_stmt 0 view .LVU2066 + 6601 0044 444B ldr r3, .L356+4 + 6602 0046 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6603 .loc 4 907 68 view .LVU2067 + 6604 0048 13F0010F tst r3, #1 + 6605 004c 04D1 bne .L331 + 6606 .LVL609: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6607 .loc 4 907 68 view .LVU2068 + 6608 .LBE571: + 6609 .LBE570: +2905:Src/main.c **** (void) SPI2->DR; + 6610 .loc 1 2905 43 discriminator 2 view .LVU2069 + 6611 004e B2F5FA7F cmp r2, #500 + 6612 0052 01D8 bhi .L331 +2905:Src/main.c **** (void) SPI2->DR; + 6613 .loc 1 2905 60 is_stmt 1 discriminator 3 view .LVU2070 +2905:Src/main.c **** (void) SPI2->DR; + 6614 .loc 1 2905 65 is_stmt 0 discriminator 3 view .LVU2071 + 6615 0054 0132 adds r2, r2, #1 + 6616 .LVL610: + ARM GAS /tmp/ccwR4KB7.s page 494 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5772 .loc 4 907 12 is_stmt 0 view .LVU1822 - 5773 0044 444B ldr r3, .L277+4 - 5774 0046 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5775 .loc 4 907 68 view .LVU1823 - 5776 0048 13F0010F tst r3, #1 - 5777 004c 04D1 bne .L252 - 5778 .LVL491: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5779 .loc 4 907 68 view .LVU1824 - 5780 .LBE555: - 5781 .LBE554: -2626:Src/main.c **** (void) SPI2->DR; - 5782 .loc 1 2626 43 discriminator 2 view .LVU1825 - 5783 004e B2F5FA7F cmp r2, #500 - 5784 0052 01D8 bhi .L252 -2626:Src/main.c **** (void) SPI2->DR; - 5785 .loc 1 2626 60 is_stmt 1 discriminator 3 view .LVU1826 -2626:Src/main.c **** (void) SPI2->DR; - 5786 .loc 1 2626 65 is_stmt 0 discriminator 3 view .LVU1827 - 5787 0054 0132 adds r2, r2, #1 - 5788 .LVL492: -2626:Src/main.c **** (void) SPI2->DR; - 5789 .loc 1 2626 65 discriminator 3 view .LVU1828 - 5790 0056 F5E7 b .L251 - 5791 .L252: -2627:Src/main.c **** break; - 5792 .loc 1 2627 4 is_stmt 1 view .LVU1829 - 5793 0058 3F4B ldr r3, .L277+4 - 5794 005a DB68 ldr r3, [r3, #12] -2628:Src/main.c **** case 2: - 5795 .loc 1 2628 3 view .LVU1830 - 5796 .LVL493: - 5797 .L242: -2664:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 5798 .loc 1 2664 2 view .LVU1831 - 5799 005c 3D4D ldr r5, .L277 - 5800 005e 0122 movs r2, #1 - 5801 0060 4FF48041 mov r1, #16384 - 5802 0064 2846 mov r0, r5 - 5803 0066 FFF7FEFF bl HAL_GPIO_WritePin - 5804 .LVL494: -2665:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 5805 .loc 1 2665 2 view .LVU1832 - 5806 006a 3C4C ldr r4, .L277+8 - 5807 .LVL495: -2665:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 5808 .loc 1 2665 2 is_stmt 0 view .LVU1833 - 5809 006c 0122 movs r2, #1 - 5810 006e 4021 movs r1, #64 - 5811 0070 2046 mov r0, r4 - 5812 0072 FFF7FEFF bl HAL_GPIO_WritePin - 5813 .LVL496: -2666:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 5814 .loc 1 2666 2 is_stmt 1 view .LVU1834 - 5815 0076 0122 movs r2, #1 - ARM GAS /tmp/ccYgfTud.s page 471 +2905:Src/main.c **** (void) SPI2->DR; + 6617 .loc 1 2905 65 discriminator 3 view .LVU2072 + 6618 0056 F5E7 b .L330 + 6619 .L331: +2906:Src/main.c **** break; + 6620 .loc 1 2906 4 is_stmt 1 view .LVU2073 + 6621 0058 3F4B ldr r3, .L356+4 + 6622 005a DB68 ldr r3, [r3, #12] +2907:Src/main.c **** case 2: + 6623 .loc 1 2907 3 view .LVU2074 + 6624 .LVL611: + 6625 .L321: +2943:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 6626 .loc 1 2943 2 view .LVU2075 + 6627 005c 3D4D ldr r5, .L356 + 6628 005e 0122 movs r2, #1 + 6629 0060 4FF48041 mov r1, #16384 + 6630 0064 2846 mov r0, r5 + 6631 0066 FFF7FEFF bl HAL_GPIO_WritePin + 6632 .LVL612: +2944:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 6633 .loc 1 2944 2 view .LVU2076 + 6634 006a 3C4C ldr r4, .L356+8 + 6635 .LVL613: +2944:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 6636 .loc 1 2944 2 is_stmt 0 view .LVU2077 + 6637 006c 0122 movs r2, #1 + 6638 006e 4021 movs r1, #64 + 6639 0070 2046 mov r0, r4 + 6640 0072 FFF7FEFF bl HAL_GPIO_WritePin + 6641 .LVL614: +2945:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 6642 .loc 1 2945 2 is_stmt 1 view .LVU2078 + 6643 0076 0122 movs r2, #1 + 6644 0078 4FF48051 mov r1, #4096 + 6645 007c 2846 mov r0, r5 + 6646 007e FFF7FEFF bl HAL_GPIO_WritePin + 6647 .LVL615: +2946:Src/main.c **** } + 6648 .loc 1 2946 2 view .LVU2079 + 6649 0082 0122 movs r2, #1 + 6650 0084 1021 movs r1, #16 + 6651 0086 2046 mov r0, r4 + 6652 0088 FFF7FEFF bl HAL_GPIO_WritePin + 6653 .LVL616: +2947:Src/main.c **** static uint16_t MPhD_T(uint8_t num) + 6654 .loc 1 2947 1 is_stmt 0 view .LVU2080 + 6655 008c 38BD pop {r3, r4, r5, pc} + 6656 .LVL617: + 6657 .L325: +2910:Src/main.c **** //tmp32=0; + 6658 .loc 1 2910 4 is_stmt 1 view .LVU2081 + 6659 008e 0022 movs r2, #0 + 6660 0090 4021 movs r1, #64 + 6661 .LVL618: +2910:Src/main.c **** //tmp32=0; + 6662 .loc 1 2910 4 is_stmt 0 view .LVU2082 + ARM GAS /tmp/ccwR4KB7.s page 495 - 5816 0078 4FF48051 mov r1, #4096 - 5817 007c 2846 mov r0, r5 - 5818 007e FFF7FEFF bl HAL_GPIO_WritePin - 5819 .LVL497: -2667:Src/main.c **** } - 5820 .loc 1 2667 2 view .LVU1835 - 5821 0082 0122 movs r2, #1 - 5822 0084 1021 movs r1, #16 - 5823 0086 2046 mov r0, r4 - 5824 0088 FFF7FEFF bl HAL_GPIO_WritePin - 5825 .LVL498: -2668:Src/main.c **** static uint16_t MPhD_T(uint8_t num) - 5826 .loc 1 2668 1 is_stmt 0 view .LVU1836 - 5827 008c 38BD pop {r3, r4, r5, pc} - 5828 .LVL499: - 5829 .L246: -2631:Src/main.c **** //tmp32=0; - 5830 .loc 1 2631 4 is_stmt 1 view .LVU1837 - 5831 008e 0022 movs r2, #0 - 5832 0090 4021 movs r1, #64 - 5833 .LVL500: -2631:Src/main.c **** //tmp32=0; - 5834 .loc 1 2631 4 is_stmt 0 view .LVU1838 - 5835 0092 3248 ldr r0, .L277+8 - 5836 0094 FFF7FEFF bl HAL_GPIO_WritePin - 5837 .LVL501: -2634:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 5838 .loc 1 2634 4 is_stmt 1 view .LVU1839 -2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 5839 .loc 1 2635 4 view .LVU1840 -2634:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 5840 .loc 1 2634 10 is_stmt 0 view .LVU1841 - 5841 0098 0022 movs r2, #0 - 5842 .LVL502: - 5843 .L254: -2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 5844 .loc 1 2635 42 is_stmt 1 discriminator 1 view .LVU1842 - 5845 .LBB556: - 5846 .LBI556: + 6663 0092 3248 ldr r0, .L356+8 + 6664 0094 FFF7FEFF bl HAL_GPIO_WritePin + 6665 .LVL619: +2913:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6666 .loc 1 2913 4 is_stmt 1 view .LVU2083 +2914:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6667 .loc 1 2914 4 view .LVU2084 +2913:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6668 .loc 1 2913 10 is_stmt 0 view .LVU2085 + 6669 0098 0022 movs r2, #0 + 6670 .LVL620: + 6671 .L333: +2914:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6672 .loc 1 2914 42 is_stmt 1 discriminator 1 view .LVU2086 + 6673 .LBB572: + 6674 .LBI572: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5847 .loc 4 916 26 view .LVU1843 - 5848 .LBB557: + 6675 .loc 4 916 26 view .LVU2087 + 6676 .LBB573: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5849 .loc 4 918 3 view .LVU1844 + 6677 .loc 4 918 3 view .LVU2088 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5850 .loc 4 918 12 is_stmt 0 view .LVU1845 - 5851 009a 314B ldr r3, .L277+12 - 5852 009c 9B68 ldr r3, [r3, #8] + 6678 .loc 4 918 12 is_stmt 0 view .LVU2089 + 6679 009a 314B ldr r3, .L356+12 + 6680 009c 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5853 .loc 4 918 66 view .LVU1846 - 5854 009e 13F0020F tst r3, #2 - 5855 00a2 04D1 bne .L255 - 5856 .LVL503: + 6681 .loc 4 918 66 view .LVU2090 + 6682 009e 13F0020F tst r3, #2 + 6683 00a2 04D1 bne .L334 + 6684 .LVL621: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5857 .loc 4 918 66 view .LVU1847 - 5858 .LBE557: - 5859 .LBE556: - ARM GAS /tmp/ccYgfTud.s page 472 - - -2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 5860 .loc 1 2635 42 discriminator 2 view .LVU1848 - 5861 00a4 B2F5FA7F cmp r2, #500 - 5862 00a8 01D8 bhi .L255 -2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 5863 .loc 1 2635 59 is_stmt 1 discriminator 3 view .LVU1849 -2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 5864 .loc 1 2635 64 is_stmt 0 discriminator 3 view .LVU1850 - 5865 00aa 0132 adds r2, r2, #1 - 5866 .LVL504: -2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 5867 .loc 1 2635 64 discriminator 3 view .LVU1851 - 5868 00ac F5E7 b .L254 - 5869 .L255: -2636:Src/main.c **** tmp32 = 0; - 5870 .loc 1 2636 4 is_stmt 1 view .LVU1852 - 5871 .LVL505: - 5872 .LBB558: - 5873 .LBI558: + 6685 .loc 4 918 66 view .LVU2091 + 6686 .LBE573: + 6687 .LBE572: +2914:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6688 .loc 1 2914 42 discriminator 2 view .LVU2092 + 6689 00a4 B2F5FA7F cmp r2, #500 + 6690 00a8 01D8 bhi .L334 +2914:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6691 .loc 1 2914 59 is_stmt 1 discriminator 3 view .LVU2093 +2914:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6692 .loc 1 2914 64 is_stmt 0 discriminator 3 view .LVU2094 + 6693 00aa 0132 adds r2, r2, #1 + 6694 .LVL622: +2914:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6695 .loc 1 2914 64 discriminator 3 view .LVU2095 + 6696 00ac F5E7 b .L333 + 6697 .L334: +2915:Src/main.c **** tmp32 = 0; + 6698 .loc 1 2915 4 is_stmt 1 view .LVU2096 + 6699 .LVL623: + 6700 .LBB574: + 6701 .LBI574: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5874 .loc 4 1373 22 view .LVU1853 - 5875 .LBB559: + 6702 .loc 4 1373 22 view .LVU2097 + 6703 .LBB575: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 5876 .loc 4 1376 3 view .LVU1854 - 5877 .loc 4 1377 3 view .LVU1855 - 5878 .loc 4 1377 10 is_stmt 0 view .LVU1856 - 5879 00ae 2C4B ldr r3, .L277+12 - 5880 00b0 9C81 strh r4, [r3, #12] @ movhi - 5881 .LVL506: - 5882 .loc 4 1377 10 view .LVU1857 - 5883 .LBE559: - 5884 .LBE558: -2637:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 5885 .loc 1 2637 4 is_stmt 1 view .LVU1858 -2638:Src/main.c **** (void) SPI6->DR; - 5886 .loc 1 2638 4 view .LVU1859 -2637:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 5887 .loc 1 2637 10 is_stmt 0 view .LVU1860 - 5888 00b2 0022 movs r2, #0 - 5889 .LVL507: - 5890 .L257: -2638:Src/main.c **** (void) SPI6->DR; - 5891 .loc 1 2638 43 is_stmt 1 discriminator 1 view .LVU1861 - 5892 .LBB560: - 5893 .LBI560: + ARM GAS /tmp/ccwR4KB7.s page 496 + + + 6704 .loc 4 1376 3 view .LVU2098 + 6705 .loc 4 1377 3 view .LVU2099 + 6706 .loc 4 1377 10 is_stmt 0 view .LVU2100 + 6707 00ae 2C4B ldr r3, .L356+12 + 6708 00b0 9C81 strh r4, [r3, #12] @ movhi + 6709 .LVL624: + 6710 .loc 4 1377 10 view .LVU2101 + 6711 .LBE575: + 6712 .LBE574: +2916:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6713 .loc 1 2916 4 is_stmt 1 view .LVU2102 +2917:Src/main.c **** (void) SPI6->DR; + 6714 .loc 1 2917 4 view .LVU2103 +2916:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6715 .loc 1 2916 10 is_stmt 0 view .LVU2104 + 6716 00b2 0022 movs r2, #0 + 6717 .LVL625: + 6718 .L336: +2917:Src/main.c **** (void) SPI6->DR; + 6719 .loc 1 2917 43 is_stmt 1 discriminator 1 view .LVU2105 + 6720 .LBB576: + 6721 .LBI576: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5894 .loc 4 905 26 view .LVU1862 - 5895 .LBB561: + 6722 .loc 4 905 26 view .LVU2106 + 6723 .LBB577: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5896 .loc 4 907 3 view .LVU1863 + 6724 .loc 4 907 3 view .LVU2107 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5897 .loc 4 907 12 is_stmt 0 view .LVU1864 - 5898 00b4 2A4B ldr r3, .L277+12 - 5899 00b6 9B68 ldr r3, [r3, #8] + 6725 .loc 4 907 12 is_stmt 0 view .LVU2108 + 6726 00b4 2A4B ldr r3, .L356+12 + 6727 00b6 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5900 .loc 4 907 68 view .LVU1865 - 5901 00b8 13F0010F tst r3, #1 - ARM GAS /tmp/ccYgfTud.s page 473 + 6728 .loc 4 907 68 view .LVU2109 + 6729 00b8 13F0010F tst r3, #1 + 6730 00bc 04D1 bne .L337 + 6731 .LVL626: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6732 .loc 4 907 68 view .LVU2110 + 6733 .LBE577: + 6734 .LBE576: +2917:Src/main.c **** (void) SPI6->DR; + 6735 .loc 1 2917 43 discriminator 2 view .LVU2111 + 6736 00be B2F5FA7F cmp r2, #500 + 6737 00c2 01D8 bhi .L337 +2917:Src/main.c **** (void) SPI6->DR; + 6738 .loc 1 2917 60 is_stmt 1 discriminator 3 view .LVU2112 +2917:Src/main.c **** (void) SPI6->DR; + 6739 .loc 1 2917 65 is_stmt 0 discriminator 3 view .LVU2113 + 6740 00c4 0132 adds r2, r2, #1 + 6741 .LVL627: +2917:Src/main.c **** (void) SPI6->DR; + 6742 .loc 1 2917 65 discriminator 3 view .LVU2114 + 6743 00c6 F5E7 b .L336 + 6744 .L337: +2918:Src/main.c **** break; + 6745 .loc 1 2918 4 is_stmt 1 view .LVU2115 + 6746 00c8 254B ldr r3, .L356+12 + ARM GAS /tmp/ccwR4KB7.s page 497 - 5902 00bc 04D1 bne .L258 - 5903 .LVL508: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5904 .loc 4 907 68 view .LVU1866 - 5905 .LBE561: - 5906 .LBE560: -2638:Src/main.c **** (void) SPI6->DR; - 5907 .loc 1 2638 43 discriminator 2 view .LVU1867 - 5908 00be B2F5FA7F cmp r2, #500 - 5909 00c2 01D8 bhi .L258 -2638:Src/main.c **** (void) SPI6->DR; - 5910 .loc 1 2638 60 is_stmt 1 discriminator 3 view .LVU1868 -2638:Src/main.c **** (void) SPI6->DR; - 5911 .loc 1 2638 65 is_stmt 0 discriminator 3 view .LVU1869 - 5912 00c4 0132 adds r2, r2, #1 - 5913 .LVL509: -2638:Src/main.c **** (void) SPI6->DR; - 5914 .loc 1 2638 65 discriminator 3 view .LVU1870 - 5915 00c6 F5E7 b .L257 - 5916 .L258: -2639:Src/main.c **** break; - 5917 .loc 1 2639 4 is_stmt 1 view .LVU1871 - 5918 00c8 254B ldr r3, .L277+12 - 5919 00ca DB68 ldr r3, [r3, #12] -2640:Src/main.c **** case 3: - 5920 .loc 1 2640 3 view .LVU1872 - 5921 00cc C6E7 b .L242 - 5922 .LVL510: - 5923 .L245: -2642:Src/main.c **** //tmp32=0; - 5924 .loc 1 2642 4 view .LVU1873 - 5925 00ce 0022 movs r2, #0 - 5926 00d0 4FF48051 mov r1, #4096 - 5927 .LVL511: -2642:Src/main.c **** //tmp32=0; - 5928 .loc 1 2642 4 is_stmt 0 view .LVU1874 - 5929 00d4 1F48 ldr r0, .L277 - 5930 00d6 FFF7FEFF bl HAL_GPIO_WritePin - 5931 .LVL512: -2645:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 5932 .loc 1 2645 4 is_stmt 1 view .LVU1875 -2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5933 .loc 1 2646 4 view .LVU1876 -2645:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 5934 .loc 1 2645 10 is_stmt 0 view .LVU1877 - 5935 00da 0022 movs r2, #0 - 5936 .LVL513: - 5937 .L260: -2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5938 .loc 1 2646 42 is_stmt 1 discriminator 1 view .LVU1878 - 5939 .LBB562: - 5940 .LBI562: + 6747 00ca DB68 ldr r3, [r3, #12] +2919:Src/main.c **** case 3: + 6748 .loc 1 2919 3 view .LVU2116 + 6749 00cc C6E7 b .L321 + 6750 .LVL628: + 6751 .L324: +2921:Src/main.c **** //tmp32=0; + 6752 .loc 1 2921 4 view .LVU2117 + 6753 00ce 0022 movs r2, #0 + 6754 00d0 4FF48051 mov r1, #4096 + 6755 .LVL629: +2921:Src/main.c **** //tmp32=0; + 6756 .loc 1 2921 4 is_stmt 0 view .LVU2118 + 6757 00d4 1F48 ldr r0, .L356 + 6758 00d6 FFF7FEFF bl HAL_GPIO_WritePin + 6759 .LVL630: +2924:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6760 .loc 1 2924 4 is_stmt 1 view .LVU2119 +2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6761 .loc 1 2925 4 view .LVU2120 +2924:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6762 .loc 1 2924 10 is_stmt 0 view .LVU2121 + 6763 00da 0022 movs r2, #0 + 6764 .LVL631: + 6765 .L339: +2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6766 .loc 1 2925 42 is_stmt 1 discriminator 1 view .LVU2122 + 6767 .LBB578: + 6768 .LBI578: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5941 .loc 4 916 26 view .LVU1879 - 5942 .LBB563: + 6769 .loc 4 916 26 view .LVU2123 + 6770 .LBB579: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5943 .loc 4 918 3 view .LVU1880 - ARM GAS /tmp/ccYgfTud.s page 474 + 6771 .loc 4 918 3 view .LVU2124 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6772 .loc 4 918 12 is_stmt 0 view .LVU2125 + 6773 00dc 1E4B ldr r3, .L356+4 + 6774 00de 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6775 .loc 4 918 66 view .LVU2126 + 6776 00e0 13F0020F tst r3, #2 + 6777 00e4 04D1 bne .L340 + 6778 .LVL632: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6779 .loc 4 918 66 view .LVU2127 + 6780 .LBE579: + 6781 .LBE578: +2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6782 .loc 1 2925 42 discriminator 2 view .LVU2128 + 6783 00e6 B2F5FA7F cmp r2, #500 + 6784 00ea 01D8 bhi .L340 +2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6785 .loc 1 2925 59 is_stmt 1 discriminator 3 view .LVU2129 +2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6786 .loc 1 2925 64 is_stmt 0 discriminator 3 view .LVU2130 + 6787 00ec 0132 adds r2, r2, #1 + 6788 .LVL633: + ARM GAS /tmp/ccwR4KB7.s page 498 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5944 .loc 4 918 12 is_stmt 0 view .LVU1881 - 5945 00dc 1E4B ldr r3, .L277+4 - 5946 00de 9B68 ldr r3, [r3, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5947 .loc 4 918 66 view .LVU1882 - 5948 00e0 13F0020F tst r3, #2 - 5949 00e4 04D1 bne .L261 - 5950 .LVL514: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5951 .loc 4 918 66 view .LVU1883 - 5952 .LBE563: - 5953 .LBE562: -2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5954 .loc 1 2646 42 discriminator 2 view .LVU1884 - 5955 00e6 B2F5FA7F cmp r2, #500 - 5956 00ea 01D8 bhi .L261 -2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5957 .loc 1 2646 59 is_stmt 1 discriminator 3 view .LVU1885 -2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5958 .loc 1 2646 64 is_stmt 0 discriminator 3 view .LVU1886 - 5959 00ec 0132 adds r2, r2, #1 - 5960 .LVL515: -2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 5961 .loc 1 2646 64 discriminator 3 view .LVU1887 - 5962 00ee F5E7 b .L260 - 5963 .L261: -2647:Src/main.c **** tmp32 = 0; - 5964 .loc 1 2647 4 is_stmt 1 view .LVU1888 - 5965 .LVL516: - 5966 .LBB564: - 5967 .LBI564: +2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 6789 .loc 1 2925 64 discriminator 3 view .LVU2131 + 6790 00ee F5E7 b .L339 + 6791 .L340: +2926:Src/main.c **** tmp32 = 0; + 6792 .loc 1 2926 4 is_stmt 1 view .LVU2132 + 6793 .LVL634: + 6794 .LBB580: + 6795 .LBI580: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5968 .loc 4 1373 22 view .LVU1889 - 5969 .LBB565: + 6796 .loc 4 1373 22 view .LVU2133 + 6797 .LBB581: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 5970 .loc 4 1376 3 view .LVU1890 - 5971 .loc 4 1377 3 view .LVU1891 - 5972 .loc 4 1377 10 is_stmt 0 view .LVU1892 - 5973 00f0 194B ldr r3, .L277+4 - 5974 00f2 9C81 strh r4, [r3, #12] @ movhi - 5975 .LVL517: - 5976 .loc 4 1377 10 view .LVU1893 - 5977 .LBE565: - 5978 .LBE564: -2648:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 5979 .loc 1 2648 4 is_stmt 1 view .LVU1894 -2649:Src/main.c **** (void) SPI2->DR; - 5980 .loc 1 2649 4 view .LVU1895 -2648:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 5981 .loc 1 2648 10 is_stmt 0 view .LVU1896 - 5982 00f4 0022 movs r2, #0 - 5983 .LVL518: - 5984 .L263: -2649:Src/main.c **** (void) SPI2->DR; - 5985 .loc 1 2649 43 is_stmt 1 discriminator 1 view .LVU1897 - 5986 .LBB566: - ARM GAS /tmp/ccYgfTud.s page 475 - - - 5987 .LBI566: + 6798 .loc 4 1376 3 view .LVU2134 + 6799 .loc 4 1377 3 view .LVU2135 + 6800 .loc 4 1377 10 is_stmt 0 view .LVU2136 + 6801 00f0 194B ldr r3, .L356+4 + 6802 00f2 9C81 strh r4, [r3, #12] @ movhi + 6803 .LVL635: + 6804 .loc 4 1377 10 view .LVU2137 + 6805 .LBE581: + 6806 .LBE580: +2927:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6807 .loc 1 2927 4 is_stmt 1 view .LVU2138 +2928:Src/main.c **** (void) SPI2->DR; + 6808 .loc 1 2928 4 view .LVU2139 +2927:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6809 .loc 1 2927 10 is_stmt 0 view .LVU2140 + 6810 00f4 0022 movs r2, #0 + 6811 .LVL636: + 6812 .L342: +2928:Src/main.c **** (void) SPI2->DR; + 6813 .loc 1 2928 43 is_stmt 1 discriminator 1 view .LVU2141 + 6814 .LBB582: + 6815 .LBI582: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5988 .loc 4 905 26 view .LVU1898 - 5989 .LBB567: + 6816 .loc 4 905 26 view .LVU2142 + 6817 .LBB583: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5990 .loc 4 907 3 view .LVU1899 + 6818 .loc 4 907 3 view .LVU2143 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5991 .loc 4 907 12 is_stmt 0 view .LVU1900 - 5992 00f6 184B ldr r3, .L277+4 - 5993 00f8 9B68 ldr r3, [r3, #8] + 6819 .loc 4 907 12 is_stmt 0 view .LVU2144 + 6820 00f6 184B ldr r3, .L356+4 + 6821 00f8 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5994 .loc 4 907 68 view .LVU1901 - 5995 00fa 13F0010F tst r3, #1 - 5996 00fe 04D1 bne .L264 - 5997 .LVL519: + 6822 .loc 4 907 68 view .LVU2145 + 6823 00fa 13F0010F tst r3, #1 + 6824 00fe 04D1 bne .L343 + 6825 .LVL637: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5998 .loc 4 907 68 view .LVU1902 - 5999 .LBE567: - 6000 .LBE566: -2649:Src/main.c **** (void) SPI2->DR; - 6001 .loc 1 2649 43 discriminator 2 view .LVU1903 - 6002 0100 B2F5FA7F cmp r2, #500 - 6003 0104 01D8 bhi .L264 -2649:Src/main.c **** (void) SPI2->DR; - 6004 .loc 1 2649 60 is_stmt 1 discriminator 3 view .LVU1904 -2649:Src/main.c **** (void) SPI2->DR; - 6005 .loc 1 2649 65 is_stmt 0 discriminator 3 view .LVU1905 - 6006 0106 0132 adds r2, r2, #1 - 6007 .LVL520: -2649:Src/main.c **** (void) SPI2->DR; - 6008 .loc 1 2649 65 discriminator 3 view .LVU1906 - 6009 0108 F5E7 b .L263 - 6010 .L264: -2650:Src/main.c **** break; - 6011 .loc 1 2650 4 is_stmt 1 view .LVU1907 - 6012 010a 134B ldr r3, .L277+4 - 6013 010c DB68 ldr r3, [r3, #12] -2651:Src/main.c **** case 4: - 6014 .loc 1 2651 3 view .LVU1908 - 6015 010e A5E7 b .L242 - 6016 .LVL521: - 6017 .L243: -2653:Src/main.c **** //tmp32=0; - 6018 .loc 1 2653 4 view .LVU1909 - 6019 0110 0022 movs r2, #0 - 6020 0112 1021 movs r1, #16 - 6021 .LVL522: -2653:Src/main.c **** //tmp32=0; - 6022 .loc 1 2653 4 is_stmt 0 view .LVU1910 - 6023 0114 1148 ldr r0, .L277+8 - 6024 0116 FFF7FEFF bl HAL_GPIO_WritePin - 6025 .LVL523: -2656:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 6026 .loc 1 2656 4 is_stmt 1 view .LVU1911 -2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 6027 .loc 1 2657 4 view .LVU1912 -2656:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - ARM GAS /tmp/ccYgfTud.s page 476 + 6826 .loc 4 907 68 view .LVU2146 + 6827 .LBE583: + 6828 .LBE582: +2928:Src/main.c **** (void) SPI2->DR; + 6829 .loc 1 2928 43 discriminator 2 view .LVU2147 + 6830 0100 B2F5FA7F cmp r2, #500 + 6831 0104 01D8 bhi .L343 + ARM GAS /tmp/ccwR4KB7.s page 499 - 6028 .loc 1 2656 10 is_stmt 0 view .LVU1913 - 6029 011a 0022 movs r2, #0 - 6030 .LVL524: - 6031 .L266: -2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 6032 .loc 1 2657 42 is_stmt 1 discriminator 1 view .LVU1914 - 6033 .LBB568: - 6034 .LBI568: +2928:Src/main.c **** (void) SPI2->DR; + 6832 .loc 1 2928 60 is_stmt 1 discriminator 3 view .LVU2148 +2928:Src/main.c **** (void) SPI2->DR; + 6833 .loc 1 2928 65 is_stmt 0 discriminator 3 view .LVU2149 + 6834 0106 0132 adds r2, r2, #1 + 6835 .LVL638: +2928:Src/main.c **** (void) SPI2->DR; + 6836 .loc 1 2928 65 discriminator 3 view .LVU2150 + 6837 0108 F5E7 b .L342 + 6838 .L343: +2929:Src/main.c **** break; + 6839 .loc 1 2929 4 is_stmt 1 view .LVU2151 + 6840 010a 134B ldr r3, .L356+4 + 6841 010c DB68 ldr r3, [r3, #12] +2930:Src/main.c **** case 4: + 6842 .loc 1 2930 3 view .LVU2152 + 6843 010e A5E7 b .L321 + 6844 .LVL639: + 6845 .L322: +2932:Src/main.c **** //tmp32=0; + 6846 .loc 1 2932 4 view .LVU2153 + 6847 0110 0022 movs r2, #0 + 6848 0112 1021 movs r1, #16 + 6849 .LVL640: +2932:Src/main.c **** //tmp32=0; + 6850 .loc 1 2932 4 is_stmt 0 view .LVU2154 + 6851 0114 1148 ldr r0, .L356+8 + 6852 0116 FFF7FEFF bl HAL_GPIO_WritePin + 6853 .LVL641: +2935:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6854 .loc 1 2935 4 is_stmt 1 view .LVU2155 +2936:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6855 .loc 1 2936 4 view .LVU2156 +2935:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6856 .loc 1 2935 10 is_stmt 0 view .LVU2157 + 6857 011a 0022 movs r2, #0 + 6858 .LVL642: + 6859 .L345: +2936:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6860 .loc 1 2936 42 is_stmt 1 discriminator 1 view .LVU2158 + 6861 .LBB584: + 6862 .LBI584: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 6035 .loc 4 916 26 view .LVU1915 - 6036 .LBB569: + 6863 .loc 4 916 26 view .LVU2159 + 6864 .LBB585: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6037 .loc 4 918 3 view .LVU1916 + 6865 .loc 4 918 3 view .LVU2160 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6038 .loc 4 918 12 is_stmt 0 view .LVU1917 - 6039 011c 104B ldr r3, .L277+12 - 6040 011e 9B68 ldr r3, [r3, #8] + 6866 .loc 4 918 12 is_stmt 0 view .LVU2161 + 6867 011c 104B ldr r3, .L356+12 + 6868 011e 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6041 .loc 4 918 66 view .LVU1918 - 6042 0120 13F0020F tst r3, #2 - 6043 0124 04D1 bne .L267 - 6044 .LVL525: + 6869 .loc 4 918 66 view .LVU2162 + 6870 0120 13F0020F tst r3, #2 + 6871 0124 04D1 bne .L346 + 6872 .LVL643: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6045 .loc 4 918 66 view .LVU1919 - 6046 .LBE569: - 6047 .LBE568: -2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 6048 .loc 1 2657 42 discriminator 2 view .LVU1920 - 6049 0126 B2F5FA7F cmp r2, #500 - 6050 012a 01D8 bhi .L267 -2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 6051 .loc 1 2657 59 is_stmt 1 discriminator 3 view .LVU1921 -2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 6052 .loc 1 2657 64 is_stmt 0 discriminator 3 view .LVU1922 - 6053 012c 0132 adds r2, r2, #1 - 6054 .LVL526: -2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 6055 .loc 1 2657 64 discriminator 3 view .LVU1923 - 6056 012e F5E7 b .L266 - 6057 .L267: -2658:Src/main.c **** tmp32 = 0; - 6058 .loc 1 2658 4 is_stmt 1 view .LVU1924 - 6059 .LVL527: - 6060 .LBB570: - 6061 .LBI570: + ARM GAS /tmp/ccwR4KB7.s page 500 + + + 6873 .loc 4 918 66 view .LVU2163 + 6874 .LBE585: + 6875 .LBE584: +2936:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6876 .loc 1 2936 42 discriminator 2 view .LVU2164 + 6877 0126 B2F5FA7F cmp r2, #500 + 6878 012a 01D8 bhi .L346 +2936:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6879 .loc 1 2936 59 is_stmt 1 discriminator 3 view .LVU2165 +2936:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6880 .loc 1 2936 64 is_stmt 0 discriminator 3 view .LVU2166 + 6881 012c 0132 adds r2, r2, #1 + 6882 .LVL644: +2936:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6883 .loc 1 2936 64 discriminator 3 view .LVU2167 + 6884 012e F5E7 b .L345 + 6885 .L346: +2937:Src/main.c **** tmp32 = 0; + 6886 .loc 1 2937 4 is_stmt 1 view .LVU2168 + 6887 .LVL645: + 6888 .LBB586: + 6889 .LBI586: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 6062 .loc 4 1373 22 view .LVU1925 - 6063 .LBB571: + 6890 .loc 4 1373 22 view .LVU2169 + 6891 .LBB587: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 6064 .loc 4 1376 3 view .LVU1926 - 6065 .loc 4 1377 3 view .LVU1927 - 6066 .loc 4 1377 10 is_stmt 0 view .LVU1928 - 6067 0130 0B4B ldr r3, .L277+12 - 6068 0132 9C81 strh r4, [r3, #12] @ movhi - 6069 .LVL528: - 6070 .loc 4 1377 10 view .LVU1929 - 6071 .LBE571: - ARM GAS /tmp/ccYgfTud.s page 477 - - - 6072 .LBE570: -2659:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 6073 .loc 1 2659 4 is_stmt 1 view .LVU1930 -2660:Src/main.c **** (void) SPI6->DR; - 6074 .loc 1 2660 4 view .LVU1931 -2659:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 6075 .loc 1 2659 10 is_stmt 0 view .LVU1932 - 6076 0134 0022 movs r2, #0 - 6077 .LVL529: - 6078 .L269: -2660:Src/main.c **** (void) SPI6->DR; - 6079 .loc 1 2660 43 is_stmt 1 discriminator 1 view .LVU1933 - 6080 .LBB572: - 6081 .LBI572: + 6892 .loc 4 1376 3 view .LVU2170 + 6893 .loc 4 1377 3 view .LVU2171 + 6894 .loc 4 1377 10 is_stmt 0 view .LVU2172 + 6895 0130 0B4B ldr r3, .L356+12 + 6896 0132 9C81 strh r4, [r3, #12] @ movhi + 6897 .LVL646: + 6898 .loc 4 1377 10 view .LVU2173 + 6899 .LBE587: + 6900 .LBE586: +2938:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6901 .loc 1 2938 4 is_stmt 1 view .LVU2174 +2939:Src/main.c **** (void) SPI6->DR; + 6902 .loc 1 2939 4 view .LVU2175 +2938:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6903 .loc 1 2938 10 is_stmt 0 view .LVU2176 + 6904 0134 0022 movs r2, #0 + 6905 .LVL647: + 6906 .L348: +2939:Src/main.c **** (void) SPI6->DR; + 6907 .loc 1 2939 43 is_stmt 1 discriminator 1 view .LVU2177 + 6908 .LBB588: + 6909 .LBI588: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 6082 .loc 4 905 26 view .LVU1934 - 6083 .LBB573: + 6910 .loc 4 905 26 view .LVU2178 + 6911 .LBB589: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6084 .loc 4 907 3 view .LVU1935 + 6912 .loc 4 907 3 view .LVU2179 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6085 .loc 4 907 12 is_stmt 0 view .LVU1936 - 6086 0136 0A4B ldr r3, .L277+12 - 6087 0138 9B68 ldr r3, [r3, #8] + 6913 .loc 4 907 12 is_stmt 0 view .LVU2180 + 6914 0136 0A4B ldr r3, .L356+12 + 6915 0138 9B68 ldr r3, [r3, #8] + ARM GAS /tmp/ccwR4KB7.s page 501 + + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6088 .loc 4 907 68 view .LVU1937 - 6089 013a 13F0010F tst r3, #1 - 6090 013e 04D1 bne .L270 - 6091 .LVL530: + 6916 .loc 4 907 68 view .LVU2181 + 6917 013a 13F0010F tst r3, #1 + 6918 013e 04D1 bne .L349 + 6919 .LVL648: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 6092 .loc 4 907 68 view .LVU1938 - 6093 .LBE573: - 6094 .LBE572: -2660:Src/main.c **** (void) SPI6->DR; - 6095 .loc 1 2660 43 discriminator 2 view .LVU1939 - 6096 0140 B2F5FA7F cmp r2, #500 - 6097 0144 01D8 bhi .L270 -2660:Src/main.c **** (void) SPI6->DR; - 6098 .loc 1 2660 60 is_stmt 1 discriminator 3 view .LVU1940 -2660:Src/main.c **** (void) SPI6->DR; - 6099 .loc 1 2660 65 is_stmt 0 discriminator 3 view .LVU1941 - 6100 0146 0132 adds r2, r2, #1 - 6101 .LVL531: -2660:Src/main.c **** (void) SPI6->DR; - 6102 .loc 1 2660 65 discriminator 3 view .LVU1942 - 6103 0148 F5E7 b .L269 - 6104 .L270: -2661:Src/main.c **** break; - 6105 .loc 1 2661 4 is_stmt 1 view .LVU1943 - 6106 014a 054B ldr r3, .L277+12 - 6107 014c DB68 ldr r3, [r3, #12] -2662:Src/main.c **** } - 6108 .loc 1 2662 3 view .LVU1944 - 6109 014e 85E7 b .L242 - 6110 .LVL532: - 6111 .L274: - 6112 .LCFI56: - 6113 .cfi_def_cfa_offset 0 - ARM GAS /tmp/ccYgfTud.s page 478 + 6920 .loc 4 907 68 view .LVU2182 + 6921 .LBE589: + 6922 .LBE588: +2939:Src/main.c **** (void) SPI6->DR; + 6923 .loc 1 2939 43 discriminator 2 view .LVU2183 + 6924 0140 B2F5FA7F cmp r2, #500 + 6925 0144 01D8 bhi .L349 +2939:Src/main.c **** (void) SPI6->DR; + 6926 .loc 1 2939 60 is_stmt 1 discriminator 3 view .LVU2184 +2939:Src/main.c **** (void) SPI6->DR; + 6927 .loc 1 2939 65 is_stmt 0 discriminator 3 view .LVU2185 + 6928 0146 0132 adds r2, r2, #1 + 6929 .LVL649: +2939:Src/main.c **** (void) SPI6->DR; + 6930 .loc 1 2939 65 discriminator 3 view .LVU2186 + 6931 0148 F5E7 b .L348 + 6932 .L349: +2940:Src/main.c **** break; + 6933 .loc 1 2940 4 is_stmt 1 view .LVU2187 + 6934 014a 054B ldr r3, .L356+12 + 6935 014c DB68 ldr r3, [r3, #12] +2941:Src/main.c **** } + 6936 .loc 1 2941 3 view .LVU2188 + 6937 014e 85E7 b .L321 + 6938 .LVL650: + 6939 .L353: + 6940 .LCFI65: + 6941 .cfi_def_cfa_offset 0 + 6942 .cfi_restore 3 + 6943 .cfi_restore 4 + 6944 .cfi_restore 5 + 6945 .cfi_restore 14 +2941:Src/main.c **** } + 6946 .loc 1 2941 3 is_stmt 0 view .LVU2189 + 6947 0150 7047 bx lr + 6948 .L357: + 6949 0152 00BF .align 2 + 6950 .L356: + 6951 0154 00040240 .word 1073873920 + 6952 0158 00380040 .word 1073756160 + 6953 015c 00000240 .word 1073872896 + 6954 0160 00540140 .word 1073828864 + 6955 .cfi_endproc + 6956 .LFE1220: + 6958 .section .text.Decode_uart,"ax",%progbits + 6959 .align 1 + 6960 .syntax unified + 6961 .thumb + 6962 .thumb_func + 6964 Decode_uart: + 6965 .LVL651: + ARM GAS /tmp/ccwR4KB7.s page 502 - 6114 .cfi_restore 3 - 6115 .cfi_restore 4 - 6116 .cfi_restore 5 - 6117 .cfi_restore 14 -2662:Src/main.c **** } - 6118 .loc 1 2662 3 is_stmt 0 view .LVU1945 - 6119 0150 7047 bx lr - 6120 .L278: - 6121 0152 00BF .align 2 - 6122 .L277: - 6123 0154 00040240 .word 1073873920 - 6124 0158 00380040 .word 1073756160 - 6125 015c 00000240 .word 1073872896 - 6126 0160 00540140 .word 1073828864 - 6127 .cfi_endproc - 6128 .LFE1217: - 6130 .section .text.Decode_uart,"ax",%progbits - 6131 .align 1 - 6132 .syntax unified - 6133 .thumb - 6134 .thumb_func - 6136 Decode_uart: - 6137 .LVL533: - 6138 .LFB1208: -2147:Src/main.c **** // uint8_t *temp1; - 6139 .loc 1 2147 1 is_stmt 1 view -0 - 6140 .cfi_startproc - 6141 @ args = 0, pretend = 0, frame = 0 - 6142 @ frame_needed = 0, uses_anonymous_args = 0 -2147:Src/main.c **** // uint8_t *temp1; - 6143 .loc 1 2147 1 is_stmt 0 view .LVU1947 - 6144 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} - 6145 .LCFI57: - 6146 .cfi_def_cfa_offset 32 - 6147 .cfi_offset 3, -32 - 6148 .cfi_offset 4, -28 - 6149 .cfi_offset 5, -24 - 6150 .cfi_offset 6, -20 - 6151 .cfi_offset 7, -16 - 6152 .cfi_offset 8, -12 - 6153 .cfi_offset 9, -8 - 6154 .cfi_offset 14, -4 - 6155 0004 0546 mov r5, r0 - 6156 0006 0F46 mov r7, r1 - 6157 0008 1646 mov r6, r2 - 6158 000a 1C46 mov r4, r3 -2149:Src/main.c **** - 6159 .loc 1 2149 2 is_stmt 1 view .LVU1948 -2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 6160 .loc 1 2154 2 view .LVU1949 -2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 6161 .loc 1 2154 6 is_stmt 0 view .LVU1950 - 6162 000c AF4B ldr r3, .L303 - 6163 .LVL534: -2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 6164 .loc 1 2154 6 view .LVU1951 - 6165 000e 0022 movs r2, #0 - ARM GAS /tmp/ccYgfTud.s page 479 + 6966 .LFB1208: +2197:Src/main.c **** // uint8_t *temp1; + 6967 .loc 1 2197 1 is_stmt 1 view -0 + 6968 .cfi_startproc + 6969 @ args = 0, pretend = 0, frame = 0 + 6970 @ frame_needed = 0, uses_anonymous_args = 0 +2197:Src/main.c **** // uint8_t *temp1; + 6971 .loc 1 2197 1 is_stmt 0 view .LVU2191 + 6972 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 6973 .LCFI66: + 6974 .cfi_def_cfa_offset 32 + 6975 .cfi_offset 3, -32 + 6976 .cfi_offset 4, -28 + 6977 .cfi_offset 5, -24 + 6978 .cfi_offset 6, -20 + 6979 .cfi_offset 7, -16 + 6980 .cfi_offset 8, -12 + 6981 .cfi_offset 9, -8 + 6982 .cfi_offset 14, -4 + 6983 0004 0546 mov r5, r0 + 6984 0006 0F46 mov r7, r1 + 6985 0008 1646 mov r6, r2 + 6986 000a 1C46 mov r4, r3 +2199:Src/main.c **** + 6987 .loc 1 2199 2 is_stmt 1 view .LVU2192 +2204:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6988 .loc 1 2204 2 view .LVU2193 +2204:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6989 .loc 1 2204 6 is_stmt 0 view .LVU2194 + 6990 000c AF4B ldr r3, .L382 + 6991 .LVL652: +2204:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6992 .loc 1 2204 6 view .LVU2195 + 6993 000e 0022 movs r2, #0 + 6994 .LVL653: +2204:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6995 .loc 1 2204 6 view .LVU2196 + 6996 0010 1A60 str r2, [r3] +2205:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6997 .loc 1 2205 2 is_stmt 1 view .LVU2197 +2205:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6998 .loc 1 2205 7 is_stmt 0 view .LVU2198 + 6999 0012 0121 movs r1, #1 + 7000 .LVL654: +2205:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7001 .loc 1 2205 7 view .LVU2199 + 7002 0014 AE48 ldr r0, .L382+4 + 7003 .LVL655: +2205:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7004 .loc 1 2205 7 view .LVU2200 + 7005 0016 FFF7FEFF bl HAL_GPIO_ReadPin + 7006 .LVL656: +2205:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7007 .loc 1 2205 5 discriminator 1 view .LVU2201 + 7008 001a 0028 cmp r0, #0 + 7009 001c 00F0D280 beq .L379 + 7010 .L359: + ARM GAS /tmp/ccwR4KB7.s page 503 - 6166 .LVL535: -2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 6167 .loc 1 2154 6 view .LVU1952 - 6168 0010 1A60 str r2, [r3] -2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 6169 .loc 1 2155 2 is_stmt 1 view .LVU1953 -2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 6170 .loc 1 2155 7 is_stmt 0 view .LVU1954 - 6171 0012 0121 movs r1, #1 - 6172 .LVL536: -2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 6173 .loc 1 2155 7 view .LVU1955 - 6174 0014 AE48 ldr r0, .L303+4 - 6175 .LVL537: -2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 6176 .loc 1 2155 7 view .LVU1956 - 6177 0016 FFF7FEFF bl HAL_GPIO_ReadPin - 6178 .LVL538: -2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 6179 .loc 1 2155 5 discriminator 1 view .LVU1957 - 6180 001a 0028 cmp r0, #0 - 6181 001c 00F0D280 beq .L300 - 6182 .L280: -2170:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 6183 .loc 1 2170 2 is_stmt 1 view .LVU1958 - 6184 .LVL539: -2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 6185 .loc 1 2171 2 view .LVU1959 -2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 6186 .loc 1 2171 36 is_stmt 0 view .LVU1960 - 6187 0020 2B88 ldrh r3, [r5] -2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 6188 .loc 1 2171 48 view .LVU1961 - 6189 0022 03F00103 and r3, r3, #1 -2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 6190 .loc 1 2171 22 view .LVU1962 - 6191 0026 2370 strb r3, [r4] -2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 6192 .loc 1 2172 2 is_stmt 1 view .LVU1963 -2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 6193 .loc 1 2172 36 is_stmt 0 view .LVU1964 - 6194 0028 2B88 ldrh r3, [r5] -2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 6195 .loc 1 2172 48 view .LVU1965 - 6196 002a C3F34003 ubfx r3, r3, #1, #1 -2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 6197 .loc 1 2172 22 view .LVU1966 - 6198 002e 6370 strb r3, [r4, #1] -2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 6199 .loc 1 2173 2 is_stmt 1 view .LVU1967 -2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 6200 .loc 1 2173 36 is_stmt 0 view .LVU1968 - 6201 0030 2B88 ldrh r3, [r5] -2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 6202 .loc 1 2173 48 view .LVU1969 - 6203 0032 C3F38003 ubfx r3, r3, #2, #1 -2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - ARM GAS /tmp/ccYgfTud.s page 480 +2220:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 7011 .loc 1 2220 2 is_stmt 1 view .LVU2202 + 7012 .LVL657: +2221:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7013 .loc 1 2221 2 view .LVU2203 +2221:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7014 .loc 1 2221 36 is_stmt 0 view .LVU2204 + 7015 0020 2B88 ldrh r3, [r5] +2221:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7016 .loc 1 2221 48 view .LVU2205 + 7017 0022 03F00103 and r3, r3, #1 +2221:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 7018 .loc 1 2221 22 view .LVU2206 + 7019 0026 2370 strb r3, [r4] +2222:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7020 .loc 1 2222 2 is_stmt 1 view .LVU2207 +2222:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7021 .loc 1 2222 36 is_stmt 0 view .LVU2208 + 7022 0028 2B88 ldrh r3, [r5] +2222:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7023 .loc 1 2222 48 view .LVU2209 + 7024 002a C3F34003 ubfx r3, r3, #1, #1 +2222:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 7025 .loc 1 2222 22 view .LVU2210 + 7026 002e 6370 strb r3, [r4, #1] +2223:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7027 .loc 1 2223 2 is_stmt 1 view .LVU2211 +2223:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7028 .loc 1 2223 36 is_stmt 0 view .LVU2212 + 7029 0030 2B88 ldrh r3, [r5] +2223:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7030 .loc 1 2223 48 view .LVU2213 + 7031 0032 C3F38003 ubfx r3, r3, #2, #1 +2223:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 7032 .loc 1 2223 22 view .LVU2214 + 7033 0036 A370 strb r3, [r4, #2] +2224:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7034 .loc 1 2224 2 is_stmt 1 view .LVU2215 +2224:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7035 .loc 1 2224 35 is_stmt 0 view .LVU2216 + 7036 0038 2B88 ldrh r3, [r5] +2224:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7037 .loc 1 2224 47 view .LVU2217 + 7038 003a C3F3C003 ubfx r3, r3, #3, #1 +2224:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 7039 .loc 1 2224 21 view .LVU2218 + 7040 003e E370 strb r3, [r4, #3] +2225:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7041 .loc 1 2225 2 is_stmt 1 view .LVU2219 +2225:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7042 .loc 1 2225 35 is_stmt 0 view .LVU2220 + 7043 0040 2B88 ldrh r3, [r5] +2225:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7044 .loc 1 2225 47 view .LVU2221 + 7045 0042 C3F30013 ubfx r3, r3, #4, #1 +2225:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 7046 .loc 1 2225 21 view .LVU2222 + ARM GAS /tmp/ccwR4KB7.s page 504 - 6204 .loc 1 2173 22 view .LVU1970 - 6205 0036 A370 strb r3, [r4, #2] -2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 6206 .loc 1 2174 2 is_stmt 1 view .LVU1971 -2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 6207 .loc 1 2174 35 is_stmt 0 view .LVU1972 - 6208 0038 2B88 ldrh r3, [r5] -2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 6209 .loc 1 2174 47 view .LVU1973 - 6210 003a C3F3C003 ubfx r3, r3, #3, #1 -2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 6211 .loc 1 2174 21 view .LVU1974 - 6212 003e E370 strb r3, [r4, #3] -2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 6213 .loc 1 2175 2 is_stmt 1 view .LVU1975 -2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 6214 .loc 1 2175 35 is_stmt 0 view .LVU1976 - 6215 0040 2B88 ldrh r3, [r5] -2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 6216 .loc 1 2175 47 view .LVU1977 - 6217 0042 C3F30013 ubfx r3, r3, #4, #1 -2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 6218 .loc 1 2175 21 view .LVU1978 - 6219 0046 2371 strb r3, [r4, #4] -2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 6220 .loc 1 2176 2 is_stmt 1 view .LVU1979 -2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 6221 .loc 1 2176 36 is_stmt 0 view .LVU1980 - 6222 0048 2B88 ldrh r3, [r5] -2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 6223 .loc 1 2176 48 view .LVU1981 - 6224 004a C3F34013 ubfx r3, r3, #5, #1 -2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 6225 .loc 1 2176 22 view .LVU1982 - 6226 004e 6371 strb r3, [r4, #5] -2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 6227 .loc 1 2177 2 is_stmt 1 view .LVU1983 -2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 6228 .loc 1 2177 36 is_stmt 0 view .LVU1984 - 6229 0050 2B88 ldrh r3, [r5] -2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 6230 .loc 1 2177 48 view .LVU1985 - 6231 0052 C3F38013 ubfx r3, r3, #6, #1 -2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 6232 .loc 1 2177 22 view .LVU1986 - 6233 0056 A371 strb r3, [r4, #6] -2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 6234 .loc 1 2178 2 is_stmt 1 view .LVU1987 -2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 6235 .loc 1 2178 36 is_stmt 0 view .LVU1988 - 6236 0058 2B88 ldrh r3, [r5] -2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 6237 .loc 1 2178 48 view .LVU1989 - 6238 005a C3F3C013 ubfx r3, r3, #7, #1 -2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 6239 .loc 1 2178 22 view .LVU1990 - 6240 005e E371 strb r3, [r4, #7] - ARM GAS /tmp/ccYgfTud.s page 481 + 7047 0046 2371 strb r3, [r4, #4] +2226:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7048 .loc 1 2226 2 is_stmt 1 view .LVU2223 +2226:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7049 .loc 1 2226 36 is_stmt 0 view .LVU2224 + 7050 0048 2B88 ldrh r3, [r5] +2226:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7051 .loc 1 2226 48 view .LVU2225 + 7052 004a C3F34013 ubfx r3, r3, #5, #1 +2226:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 7053 .loc 1 2226 22 view .LVU2226 + 7054 004e 6371 strb r3, [r4, #5] +2227:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7055 .loc 1 2227 2 is_stmt 1 view .LVU2227 +2227:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7056 .loc 1 2227 36 is_stmt 0 view .LVU2228 + 7057 0050 2B88 ldrh r3, [r5] +2227:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7058 .loc 1 2227 48 view .LVU2229 + 7059 0052 C3F38013 ubfx r3, r3, #6, #1 +2227:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 7060 .loc 1 2227 22 view .LVU2230 + 7061 0056 A371 strb r3, [r4, #6] +2228:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7062 .loc 1 2228 2 is_stmt 1 view .LVU2231 +2228:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7063 .loc 1 2228 36 is_stmt 0 view .LVU2232 + 7064 0058 2B88 ldrh r3, [r5] +2228:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7065 .loc 1 2228 48 view .LVU2233 + 7066 005a C3F3C013 ubfx r3, r3, #7, #1 +2228:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 7067 .loc 1 2228 22 view .LVU2234 + 7068 005e E371 strb r3, [r4, #7] +2229:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7069 .loc 1 2229 2 is_stmt 1 view .LVU2235 +2229:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7070 .loc 1 2229 36 is_stmt 0 view .LVU2236 + 7071 0060 2B88 ldrh r3, [r5] +2229:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7072 .loc 1 2229 48 view .LVU2237 + 7073 0062 C3F30023 ubfx r3, r3, #8, #1 +2229:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 7074 .loc 1 2229 22 view .LVU2238 + 7075 0066 2372 strb r3, [r4, #8] +2230:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7076 .loc 1 2230 2 is_stmt 1 view .LVU2239 +2230:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7077 .loc 1 2230 35 is_stmt 0 view .LVU2240 + 7078 0068 2B88 ldrh r3, [r5] +2230:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7079 .loc 1 2230 47 view .LVU2241 + 7080 006a C3F34023 ubfx r3, r3, #9, #1 +2230:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 7081 .loc 1 2230 21 view .LVU2242 + 7082 006e 6372 strb r3, [r4, #9] +2231:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + ARM GAS /tmp/ccwR4KB7.s page 505 -2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 6241 .loc 1 2179 2 is_stmt 1 view .LVU1991 -2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 6242 .loc 1 2179 36 is_stmt 0 view .LVU1992 - 6243 0060 2B88 ldrh r3, [r5] -2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 6244 .loc 1 2179 48 view .LVU1993 - 6245 0062 C3F30023 ubfx r3, r3, #8, #1 -2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 6246 .loc 1 2179 22 view .LVU1994 - 6247 0066 2372 strb r3, [r4, #8] -2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 6248 .loc 1 2180 2 is_stmt 1 view .LVU1995 -2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 6249 .loc 1 2180 35 is_stmt 0 view .LVU1996 - 6250 0068 2B88 ldrh r3, [r5] -2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 6251 .loc 1 2180 47 view .LVU1997 - 6252 006a C3F34023 ubfx r3, r3, #9, #1 -2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 6253 .loc 1 2180 21 view .LVU1998 - 6254 006e 6372 strb r3, [r4, #9] -2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 6255 .loc 1 2181 2 is_stmt 1 view .LVU1999 -2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 6256 .loc 1 2181 35 is_stmt 0 view .LVU2000 - 6257 0070 2B88 ldrh r3, [r5] -2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 6258 .loc 1 2181 48 view .LVU2001 - 6259 0072 C3F38023 ubfx r3, r3, #10, #1 -2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 6260 .loc 1 2181 21 view .LVU2002 - 6261 0076 A372 strb r3, [r4, #10] -2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 6262 .loc 1 2182 2 is_stmt 1 view .LVU2003 -2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 6263 .loc 1 2182 34 is_stmt 0 view .LVU2004 - 6264 0078 2B88 ldrh r3, [r5] -2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 6265 .loc 1 2182 47 view .LVU2005 - 6266 007a C3F3C023 ubfx r3, r3, #11, #1 -2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 6267 .loc 1 2182 20 view .LVU2006 - 6268 007e E372 strb r3, [r4, #11] -2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 6269 .loc 1 2183 2 is_stmt 1 view .LVU2007 -2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 6270 .loc 1 2183 35 is_stmt 0 view .LVU2008 - 6271 0080 2B88 ldrh r3, [r5] -2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 6272 .loc 1 2183 48 view .LVU2009 - 6273 0082 C3F30033 ubfx r3, r3, #12, #1 -2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 6274 .loc 1 2183 21 view .LVU2010 - 6275 0086 2373 strb r3, [r4, #12] -2184:Src/main.c **** - 6276 .loc 1 2184 2 is_stmt 1 view .LVU2011 - ARM GAS /tmp/ccYgfTud.s page 482 + 7083 .loc 1 2231 2 is_stmt 1 view .LVU2243 +2231:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 7084 .loc 1 2231 35 is_stmt 0 view .LVU2244 + 7085 0070 2B88 ldrh r3, [r5] +2231:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 7086 .loc 1 2231 48 view .LVU2245 + 7087 0072 C3F38023 ubfx r3, r3, #10, #1 +2231:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 7088 .loc 1 2231 21 view .LVU2246 + 7089 0076 A372 strb r3, [r4, #10] +2232:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7090 .loc 1 2232 2 is_stmt 1 view .LVU2247 +2232:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7091 .loc 1 2232 34 is_stmt 0 view .LVU2248 + 7092 0078 2B88 ldrh r3, [r5] +2232:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7093 .loc 1 2232 47 view .LVU2249 + 7094 007a C3F3C023 ubfx r3, r3, #11, #1 +2232:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 7095 .loc 1 2232 20 view .LVU2250 + 7096 007e E372 strb r3, [r4, #11] +2233:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7097 .loc 1 2233 2 is_stmt 1 view .LVU2251 +2233:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7098 .loc 1 2233 35 is_stmt 0 view .LVU2252 + 7099 0080 2B88 ldrh r3, [r5] +2233:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7100 .loc 1 2233 48 view .LVU2253 + 7101 0082 C3F30033 ubfx r3, r3, #12, #1 +2233:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 7102 .loc 1 2233 21 view .LVU2254 + 7103 0086 2373 strb r3, [r4, #12] +2234:Src/main.c **** + 7104 .loc 1 2234 2 is_stmt 1 view .LVU2255 +2234:Src/main.c **** + 7105 .loc 1 2234 35 is_stmt 0 view .LVU2256 + 7106 0088 2B88 ldrh r3, [r5] +2234:Src/main.c **** + 7107 .loc 1 2234 48 view .LVU2257 + 7108 008a C3F34033 ubfx r3, r3, #13, #1 +2234:Src/main.c **** + 7109 .loc 1 2234 21 view .LVU2258 + 7110 008e 6373 strb r3, [r4, #13] +2236:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 7111 .loc 1 2236 2 is_stmt 1 view .LVU2259 + 7112 .LVL658: +2237:Src/main.c **** temp2++; + 7113 .loc 1 2237 2 view .LVU2260 +2237:Src/main.c **** temp2++; + 7114 .loc 1 2237 28 is_stmt 0 view .LVU2261 + 7115 0090 6B88 ldrh r3, [r5, #2] +2237:Src/main.c **** temp2++; + 7116 .loc 1 2237 26 view .LVU2262 + 7117 0092 3B80 strh r3, [r7] @ movhi +2238:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 7118 .loc 1 2238 2 is_stmt 1 view .LVU2263 + 7119 .LVL659: + ARM GAS /tmp/ccwR4KB7.s page 506 -2184:Src/main.c **** - 6277 .loc 1 2184 35 is_stmt 0 view .LVU2012 - 6278 0088 2B88 ldrh r3, [r5] -2184:Src/main.c **** - 6279 .loc 1 2184 48 view .LVU2013 - 6280 008a C3F34033 ubfx r3, r3, #13, #1 -2184:Src/main.c **** - 6281 .loc 1 2184 21 view .LVU2014 - 6282 008e 6373 strb r3, [r4, #13] -2186:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 6283 .loc 1 2186 2 is_stmt 1 view .LVU2015 - 6284 .LVL540: -2187:Src/main.c **** temp2++; - 6285 .loc 1 2187 2 view .LVU2016 -2187:Src/main.c **** temp2++; - 6286 .loc 1 2187 28 is_stmt 0 view .LVU2017 - 6287 0090 6B88 ldrh r3, [r5, #2] -2187:Src/main.c **** temp2++; - 6288 .loc 1 2187 26 view .LVU2018 - 6289 0092 3B80 strh r3, [r7] @ movhi -2188:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 6290 .loc 1 2188 2 is_stmt 1 view .LVU2019 - 6291 .LVL541: -2189:Src/main.c **** temp2++; - 6292 .loc 1 2189 2 view .LVU2020 -2189:Src/main.c **** temp2++; - 6293 .loc 1 2189 28 is_stmt 0 view .LVU2021 - 6294 0094 AB88 ldrh r3, [r5, #4] -2189:Src/main.c **** temp2++; - 6295 .loc 1 2189 26 view .LVU2022 - 6296 0096 3380 strh r3, [r6] @ movhi -2190:Src/main.c **** temp2++; - 6297 .loc 1 2190 2 is_stmt 1 view .LVU2023 - 6298 .LVL542: -2191:Src/main.c **** temp2++; - 6299 .loc 1 2191 2 view .LVU2024 -2192:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); - 6300 .loc 1 2192 2 view .LVU2025 -2193:Src/main.c **** temp2++; - 6301 .loc 1 2193 2 view .LVU2026 -2193:Src/main.c **** temp2++; - 6302 .loc 1 2193 25 is_stmt 0 view .LVU2027 - 6303 0098 6B89 ldrh r3, [r5, #10] -2193:Src/main.c **** temp2++; - 6304 .loc 1 2193 23 view .LVU2028 - 6305 009a E381 strh r3, [r4, #14] @ movhi -2194:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 6306 .loc 1 2194 2 is_stmt 1 view .LVU2029 - 6307 .LVL543: -2195:Src/main.c **** temp2++; - 6308 .loc 1 2195 2 view .LVU2030 -2195:Src/main.c **** temp2++; - 6309 .loc 1 2195 51 is_stmt 0 view .LVU2031 - 6310 009c AB89 ldrh r3, [r5, #12] - 6311 009e 07EE903A vmov s15, r3 @ int -2195:Src/main.c **** temp2++; - 6312 .loc 1 2195 32 view .LVU2032 - ARM GAS /tmp/ccYgfTud.s page 483 +2239:Src/main.c **** temp2++; + 7120 .loc 1 2239 2 view .LVU2264 +2239:Src/main.c **** temp2++; + 7121 .loc 1 2239 28 is_stmt 0 view .LVU2265 + 7122 0094 AB88 ldrh r3, [r5, #4] +2239:Src/main.c **** temp2++; + 7123 .loc 1 2239 26 view .LVU2266 + 7124 0096 3380 strh r3, [r6] @ movhi +2240:Src/main.c **** temp2++; + 7125 .loc 1 2240 2 is_stmt 1 view .LVU2267 + 7126 .LVL660: +2241:Src/main.c **** temp2++; + 7127 .loc 1 2241 2 view .LVU2268 +2242:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); + 7128 .loc 1 2242 2 view .LVU2269 +2243:Src/main.c **** temp2++; + 7129 .loc 1 2243 2 view .LVU2270 +2243:Src/main.c **** temp2++; + 7130 .loc 1 2243 25 is_stmt 0 view .LVU2271 + 7131 0098 6B89 ldrh r3, [r5, #10] +2243:Src/main.c **** temp2++; + 7132 .loc 1 2243 23 view .LVU2272 + 7133 009a E381 strh r3, [r4, #14] @ movhi +2244:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7134 .loc 1 2244 2 is_stmt 1 view .LVU2273 + 7135 .LVL661: +2245:Src/main.c **** temp2++; + 7136 .loc 1 2245 2 view .LVU2274 +2245:Src/main.c **** temp2++; + 7137 .loc 1 2245 51 is_stmt 0 view .LVU2275 + 7138 009c AB89 ldrh r3, [r5, #12] + 7139 009e 07EE903A vmov s15, r3 @ int +2245:Src/main.c **** temp2++; + 7140 .loc 1 2245 32 view .LVU2276 + 7141 00a2 F8EE677A vcvt.f32.u32 s15, s15 +2245:Src/main.c **** temp2++; + 7142 .loc 1 2245 59 view .LVU2277 + 7143 00a6 9FED8B7A vldr.32 s14, .L382+8 + 7144 00aa 67EE877A vmul.f32 s15, s15, s14 +2245:Src/main.c **** temp2++; + 7145 .loc 1 2245 30 view .LVU2278 + 7146 00ae C7ED017A vstr.32 s15, [r7, #4] +2246:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7147 .loc 1 2246 2 is_stmt 1 view .LVU2279 + 7148 .LVL662: +2247:Src/main.c **** temp2++; + 7149 .loc 1 2247 2 view .LVU2280 +2247:Src/main.c **** temp2++; + 7150 .loc 1 2247 51 is_stmt 0 view .LVU2281 + 7151 00b2 EB89 ldrh r3, [r5, #14] + 7152 00b4 07EE903A vmov s15, r3 @ int +2247:Src/main.c **** temp2++; + 7153 .loc 1 2247 32 view .LVU2282 + 7154 00b8 F8EE677A vcvt.f32.u32 s15, s15 +2247:Src/main.c **** temp2++; + 7155 .loc 1 2247 59 view .LVU2283 + 7156 00bc 67EE877A vmul.f32 s15, s15, s14 + ARM GAS /tmp/ccwR4KB7.s page 507 - 6313 00a2 F8EE677A vcvt.f32.u32 s15, s15 -2195:Src/main.c **** temp2++; - 6314 .loc 1 2195 59 view .LVU2033 - 6315 00a6 9FED8B7A vldr.32 s14, .L303+8 - 6316 00aa 67EE877A vmul.f32 s15, s15, s14 -2195:Src/main.c **** temp2++; - 6317 .loc 1 2195 30 view .LVU2034 - 6318 00ae C7ED017A vstr.32 s15, [r7, #4] -2196:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 6319 .loc 1 2196 2 is_stmt 1 view .LVU2035 - 6320 .LVL544: -2197:Src/main.c **** temp2++; - 6321 .loc 1 2197 2 view .LVU2036 -2197:Src/main.c **** temp2++; - 6322 .loc 1 2197 51 is_stmt 0 view .LVU2037 - 6323 00b2 EB89 ldrh r3, [r5, #14] - 6324 00b4 07EE903A vmov s15, r3 @ int -2197:Src/main.c **** temp2++; - 6325 .loc 1 2197 32 view .LVU2038 - 6326 00b8 F8EE677A vcvt.f32.u32 s15, s15 -2197:Src/main.c **** temp2++; - 6327 .loc 1 2197 59 view .LVU2039 - 6328 00bc 67EE877A vmul.f32 s15, s15, s14 -2197:Src/main.c **** temp2++; - 6329 .loc 1 2197 30 view .LVU2040 - 6330 00c0 C7ED027A vstr.32 s15, [r7, #8] -2198:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 6331 .loc 1 2198 2 is_stmt 1 view .LVU2041 - 6332 .LVL545: -2199:Src/main.c **** temp2++; - 6333 .loc 1 2199 2 view .LVU2042 -2199:Src/main.c **** temp2++; - 6334 .loc 1 2199 51 is_stmt 0 view .LVU2043 - 6335 00c4 2B8A ldrh r3, [r5, #16] - 6336 00c6 07EE903A vmov s15, r3 @ int -2199:Src/main.c **** temp2++; - 6337 .loc 1 2199 32 view .LVU2044 - 6338 00ca F8EE677A vcvt.f32.u32 s15, s15 -2199:Src/main.c **** temp2++; - 6339 .loc 1 2199 59 view .LVU2045 - 6340 00ce 67EE877A vmul.f32 s15, s15, s14 -2199:Src/main.c **** temp2++; - 6341 .loc 1 2199 30 view .LVU2046 - 6342 00d2 C6ED017A vstr.32 s15, [r6, #4] -2200:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 6343 .loc 1 2200 2 is_stmt 1 view .LVU2047 - 6344 .LVL546: -2201:Src/main.c **** temp2++; - 6345 .loc 1 2201 2 view .LVU2048 -2201:Src/main.c **** temp2++; - 6346 .loc 1 2201 51 is_stmt 0 view .LVU2049 - 6347 00d6 6B8A ldrh r3, [r5, #18] - 6348 00d8 07EE903A vmov s15, r3 @ int -2201:Src/main.c **** temp2++; - 6349 .loc 1 2201 32 view .LVU2050 - 6350 00dc F8EE677A vcvt.f32.u32 s15, s15 -2201:Src/main.c **** temp2++; - ARM GAS /tmp/ccYgfTud.s page 484 +2247:Src/main.c **** temp2++; + 7157 .loc 1 2247 30 view .LVU2284 + 7158 00c0 C7ED027A vstr.32 s15, [r7, #8] +2248:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7159 .loc 1 2248 2 is_stmt 1 view .LVU2285 + 7160 .LVL663: +2249:Src/main.c **** temp2++; + 7161 .loc 1 2249 2 view .LVU2286 +2249:Src/main.c **** temp2++; + 7162 .loc 1 2249 51 is_stmt 0 view .LVU2287 + 7163 00c4 2B8A ldrh r3, [r5, #16] + 7164 00c6 07EE903A vmov s15, r3 @ int +2249:Src/main.c **** temp2++; + 7165 .loc 1 2249 32 view .LVU2288 + 7166 00ca F8EE677A vcvt.f32.u32 s15, s15 +2249:Src/main.c **** temp2++; + 7167 .loc 1 2249 59 view .LVU2289 + 7168 00ce 67EE877A vmul.f32 s15, s15, s14 +2249:Src/main.c **** temp2++; + 7169 .loc 1 2249 30 view .LVU2290 + 7170 00d2 C6ED017A vstr.32 s15, [r6, #4] +2250:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 7171 .loc 1 2250 2 is_stmt 1 view .LVU2291 + 7172 .LVL664: +2251:Src/main.c **** temp2++; + 7173 .loc 1 2251 2 view .LVU2292 +2251:Src/main.c **** temp2++; + 7174 .loc 1 2251 51 is_stmt 0 view .LVU2293 + 7175 00d6 6B8A ldrh r3, [r5, #18] + 7176 00d8 07EE903A vmov s15, r3 @ int +2251:Src/main.c **** temp2++; + 7177 .loc 1 2251 32 view .LVU2294 + 7178 00dc F8EE677A vcvt.f32.u32 s15, s15 +2251:Src/main.c **** temp2++; + 7179 .loc 1 2251 59 view .LVU2295 + 7180 00e0 67EE877A vmul.f32 s15, s15, s14 +2251:Src/main.c **** temp2++; + 7181 .loc 1 2251 30 view .LVU2296 + 7182 00e4 C6ED027A vstr.32 s15, [r6, #8] +2252:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID + 7183 .loc 1 2252 2 is_stmt 1 view .LVU2297 + 7184 .LVL665: +2253:Src/main.c **** temp2++; + 7185 .loc 1 2253 2 view .LVU2298 +2253:Src/main.c **** temp2++; + 7186 .loc 1 2253 18 is_stmt 0 view .LVU2299 + 7187 00e8 AA8A ldrh r2, [r5, #20] +2253:Src/main.c **** temp2++; + 7188 .loc 1 2253 16 view .LVU2300 + 7189 00ea 7B4B ldr r3, .L382+12 + 7190 00ec 5A83 strh r2, [r3, #26] @ movhi +2254:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); + 7191 .loc 1 2254 2 is_stmt 1 view .LVU2301 + 7192 .LVL666: +2255:Src/main.c **** temp2++; + 7193 .loc 1 2255 2 view .LVU2302 +2255:Src/main.c **** temp2++; + ARM GAS /tmp/ccwR4KB7.s page 508 - 6351 .loc 1 2201 59 view .LVU2051 - 6352 00e0 67EE877A vmul.f32 s15, s15, s14 -2201:Src/main.c **** temp2++; - 6353 .loc 1 2201 30 view .LVU2052 - 6354 00e4 C6ED027A vstr.32 s15, [r6, #8] -2202:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID - 6355 .loc 1 2202 2 is_stmt 1 view .LVU2053 - 6356 .LVL547: -2203:Src/main.c **** temp2++; - 6357 .loc 1 2203 2 view .LVU2054 -2203:Src/main.c **** temp2++; - 6358 .loc 1 2203 18 is_stmt 0 view .LVU2055 - 6359 00e8 AA8A ldrh r2, [r5, #20] -2203:Src/main.c **** temp2++; - 6360 .loc 1 2203 16 view .LVU2056 - 6361 00ea 7B4B ldr r3, .L303+12 - 6362 00ec 5A83 strh r2, [r3, #26] @ movhi -2204:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); - 6363 .loc 1 2204 2 is_stmt 1 view .LVU2057 - 6364 .LVL548: -2205:Src/main.c **** temp2++; - 6365 .loc 1 2205 2 view .LVU2058 -2205:Src/main.c **** temp2++; - 6366 .loc 1 2205 28 is_stmt 0 view .LVU2059 - 6367 00ee EB8A ldrh r3, [r5, #22] -2205:Src/main.c **** temp2++; - 6368 .loc 1 2205 26 view .LVU2060 - 6369 00f0 BB81 strh r3, [r7, #12] @ movhi -2206:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); - 6370 .loc 1 2206 2 is_stmt 1 view .LVU2061 - 6371 .LVL549: -2207:Src/main.c **** temp2++; - 6372 .loc 1 2207 2 view .LVU2062 -2207:Src/main.c **** temp2++; - 6373 .loc 1 2207 28 is_stmt 0 view .LVU2063 - 6374 00f2 2B8B ldrh r3, [r5, #24] -2207:Src/main.c **** temp2++; - 6375 .loc 1 2207 26 view .LVU2064 - 6376 00f4 B381 strh r3, [r6, #12] @ movhi -2208:Src/main.c **** - 6377 .loc 1 2208 2 is_stmt 1 view .LVU2065 - 6378 .LVL550: -2210:Src/main.c **** { - 6379 .loc 1 2210 2 view .LVU2066 -2210:Src/main.c **** { - 6380 .loc 1 2210 16 is_stmt 0 view .LVU2067 - 6381 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 -2210:Src/main.c **** { - 6382 .loc 1 2210 5 view .LVU2068 - 6383 00f8 002B cmp r3, #0 - 6384 00fa 00F09580 beq .L281 -2212:Src/main.c **** } - 6385 .loc 1 2212 3 is_stmt 1 view .LVU2069 - 6386 00fe 0122 movs r2, #1 - 6387 0100 0821 movs r1, #8 - 6388 0102 7648 ldr r0, .L303+16 - 6389 0104 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccYgfTud.s page 485 + 7194 .loc 1 2255 28 is_stmt 0 view .LVU2303 + 7195 00ee EB8A ldrh r3, [r5, #22] +2255:Src/main.c **** temp2++; + 7196 .loc 1 2255 26 view .LVU2304 + 7197 00f0 BB81 strh r3, [r7, #12] @ movhi +2256:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); + 7198 .loc 1 2256 2 is_stmt 1 view .LVU2305 + 7199 .LVL667: +2257:Src/main.c **** temp2++; + 7200 .loc 1 2257 2 view .LVU2306 +2257:Src/main.c **** temp2++; + 7201 .loc 1 2257 28 is_stmt 0 view .LVU2307 + 7202 00f2 2B8B ldrh r3, [r5, #24] +2257:Src/main.c **** temp2++; + 7203 .loc 1 2257 26 view .LVU2308 + 7204 00f4 B381 strh r3, [r6, #12] @ movhi +2258:Src/main.c **** + 7205 .loc 1 2258 2 is_stmt 1 view .LVU2309 + 7206 .LVL668: +2260:Src/main.c **** { + 7207 .loc 1 2260 2 view .LVU2310 +2260:Src/main.c **** { + 7208 .loc 1 2260 16 is_stmt 0 view .LVU2311 + 7209 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 +2260:Src/main.c **** { + 7210 .loc 1 2260 5 view .LVU2312 + 7211 00f8 002B cmp r3, #0 + 7212 00fa 00F09580 beq .L360 +2262:Src/main.c **** } + 7213 .loc 1 2262 3 is_stmt 1 view .LVU2313 + 7214 00fe 0122 movs r2, #1 + 7215 0100 0821 movs r1, #8 + 7216 0102 7648 ldr r0, .L382+16 + 7217 0104 FFF7FEFF bl HAL_GPIO_WritePin + 7218 .LVL669: + 7219 .L361: +2269:Src/main.c **** { + 7220 .loc 1 2269 2 view .LVU2314 +2269:Src/main.c **** { + 7221 .loc 1 2269 16 is_stmt 0 view .LVU2315 + 7222 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 +2269:Src/main.c **** { + 7223 .loc 1 2269 5 view .LVU2316 + 7224 010a 002B cmp r3, #0 + 7225 010c 00F09280 beq .L362 +2271:Src/main.c **** } + 7226 .loc 1 2271 3 is_stmt 1 view .LVU2317 + 7227 0110 0122 movs r2, #1 + 7228 0112 0421 movs r1, #4 + 7229 0114 7148 ldr r0, .L382+16 + 7230 0116 FFF7FEFF bl HAL_GPIO_WritePin + 7231 .LVL670: + 7232 .L363: +2278:Src/main.c **** { + 7233 .loc 1 2278 2 view .LVU2318 +2278:Src/main.c **** { + 7234 .loc 1 2278 16 is_stmt 0 view .LVU2319 + ARM GAS /tmp/ccwR4KB7.s page 509 - 6390 .LVL551: - 6391 .L282: -2219:Src/main.c **** { - 6392 .loc 1 2219 2 view .LVU2070 -2219:Src/main.c **** { - 6393 .loc 1 2219 16 is_stmt 0 view .LVU2071 - 6394 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 -2219:Src/main.c **** { - 6395 .loc 1 2219 5 view .LVU2072 - 6396 010a 002B cmp r3, #0 - 6397 010c 00F09280 beq .L283 -2221:Src/main.c **** } - 6398 .loc 1 2221 3 is_stmt 1 view .LVU2073 - 6399 0110 0122 movs r2, #1 - 6400 0112 0421 movs r1, #4 - 6401 0114 7148 ldr r0, .L303+16 - 6402 0116 FFF7FEFF bl HAL_GPIO_WritePin - 6403 .LVL552: - 6404 .L284: -2228:Src/main.c **** { - 6405 .loc 1 2228 2 view .LVU2074 -2228:Src/main.c **** { - 6406 .loc 1 2228 16 is_stmt 0 view .LVU2075 - 6407 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 -2228:Src/main.c **** { - 6408 .loc 1 2228 5 view .LVU2076 - 6409 011c 002B cmp r3, #0 - 6410 011e 00F08F80 beq .L285 -2230:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC - 6411 .loc 1 2230 3 is_stmt 1 view .LVU2077 - 6412 0122 0122 movs r2, #1 - 6413 0124 4FF48071 mov r1, #256 - 6414 0128 6948 ldr r0, .L303+4 - 6415 012a FFF7FEFF bl HAL_GPIO_WritePin - 6416 .LVL553: - 6417 .L286: -2239:Src/main.c **** { - 6418 .loc 1 2239 2 view .LVU2078 -2239:Src/main.c **** { - 6419 .loc 1 2239 16 is_stmt 0 view .LVU2079 - 6420 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 -2239:Src/main.c **** { - 6421 .loc 1 2239 5 view .LVU2080 - 6422 0130 002B cmp r3, #0 - 6423 0132 00F08C80 beq .L287 -2241:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC - 6424 .loc 1 2241 3 is_stmt 1 view .LVU2081 - 6425 0136 0122 movs r2, #1 - 6426 0138 1021 movs r1, #16 - 6427 013a 6848 ldr r0, .L303+16 - 6428 013c FFF7FEFF bl HAL_GPIO_WritePin - 6429 .LVL554: - 6430 .L288: -2250:Src/main.c **** { - 6431 .loc 1 2250 2 view .LVU2082 -2250:Src/main.c **** { - 6432 .loc 1 2250 16 is_stmt 0 view .LVU2083 - ARM GAS /tmp/ccYgfTud.s page 486 - - - 6433 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 -2250:Src/main.c **** { - 6434 .loc 1 2250 5 view .LVU2084 - 6435 0142 002B cmp r3, #0 - 6436 0144 00F08980 beq .L289 -2252:Src/main.c **** } - 6437 .loc 1 2252 3 is_stmt 1 view .LVU2085 - 6438 0148 0122 movs r2, #1 - 6439 014a 4FF48061 mov r1, #1024 - 6440 014e 6448 ldr r0, .L303+20 - 6441 0150 FFF7FEFF bl HAL_GPIO_WritePin - 6442 .LVL555: - 6443 .L290: -2259:Src/main.c **** { - 6444 .loc 1 2259 2 view .LVU2086 -2259:Src/main.c **** { - 6445 .loc 1 2259 16 is_stmt 0 view .LVU2087 - 6446 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 -2259:Src/main.c **** { - 6447 .loc 1 2259 5 view .LVU2088 - 6448 0156 002B cmp r3, #0 - 6449 0158 00F08680 beq .L291 -2261:Src/main.c **** } - 6450 .loc 1 2261 3 is_stmt 1 view .LVU2089 - 6451 015c 0122 movs r2, #1 - 6452 015e 0821 movs r1, #8 - 6453 0160 6048 ldr r0, .L303+24 - 6454 0162 FFF7FEFF bl HAL_GPIO_WritePin - 6455 .LVL556: - 6456 .L292: -2268:Src/main.c **** { - 6457 .loc 1 2268 2 view .LVU2090 -2268:Src/main.c **** { - 6458 .loc 1 2268 17 is_stmt 0 view .LVU2091 - 6459 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 -2268:Src/main.c **** { - 6460 .loc 1 2268 5 view .LVU2092 - 6461 0168 1BB1 cbz r3, .L293 -2268:Src/main.c **** { - 6462 .loc 1 2268 39 discriminator 1 view .LVU2093 - 6463 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 -2268:Src/main.c **** { - 6464 .loc 1 2268 26 discriminator 1 view .LVU2094 - 6465 016c 002B cmp r3, #0 - 6466 016e 40F08180 bne .L301 - 6467 .L293: -2277:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 6468 .loc 1 2277 3 is_stmt 1 view .LVU2095 - 6469 0172 0022 movs r2, #0 - 6470 0174 0121 movs r1, #1 - 6471 0176 5B48 ldr r0, .L303+24 - 6472 0178 FFF7FEFF bl HAL_GPIO_WritePin - 6473 .LVL557: -2278:Src/main.c **** } - 6474 .loc 1 2278 3 view .LVU2096 - 6475 017c 0022 movs r2, #0 - 6476 017e 4FF40061 mov r1, #2048 - ARM GAS /tmp/ccYgfTud.s page 487 - - - 6477 0182 5748 ldr r0, .L303+20 - 6478 0184 FFF7FEFF bl HAL_GPIO_WritePin - 6479 .LVL558: - 6480 .L294: -2281:Src/main.c **** { - 6481 .loc 1 2281 2 view .LVU2097 -2281:Src/main.c **** { - 6482 .loc 1 2281 17 is_stmt 0 view .LVU2098 - 6483 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 -2281:Src/main.c **** { - 6484 .loc 1 2281 5 view .LVU2099 - 6485 018a 1BB1 cbz r3, .L295 -2281:Src/main.c **** { - 6486 .loc 1 2281 39 discriminator 1 view .LVU2100 - 6487 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 -2281:Src/main.c **** { - 6488 .loc 1 2281 26 discriminator 1 view .LVU2101 - 6489 018e 002B cmp r3, #0 - 6490 0190 40F08680 bne .L302 - 6491 .L295: -2290:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 6492 .loc 1 2290 3 is_stmt 1 view .LVU2102 - 6493 0194 0022 movs r2, #0 - 6494 0196 0221 movs r1, #2 - 6495 0198 5248 ldr r0, .L303+24 - 6496 019a FFF7FEFF bl HAL_GPIO_WritePin - 6497 .LVL559: -2291:Src/main.c **** } - 6498 .loc 1 2291 3 view .LVU2103 - 6499 019e 0022 movs r2, #0 - 6500 01a0 2021 movs r1, #32 - 6501 01a2 4E48 ldr r0, .L303+16 - 6502 01a4 FFF7FEFF bl HAL_GPIO_WritePin - 6503 .LVL560: - 6504 .L296: -2294:Src/main.c **** { - 6505 .loc 1 2294 2 view .LVU2104 -2294:Src/main.c **** { - 6506 .loc 1 2294 16 is_stmt 0 view .LVU2105 - 6507 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 -2294:Src/main.c **** { - 6508 .loc 1 2294 5 view .LVU2106 - 6509 01aa 1BB9 cbnz r3, .L297 -2296:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 6510 .loc 1 2296 3 is_stmt 1 view .LVU2107 -2296:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 6511 .loc 1 2296 31 is_stmt 0 view .LVU2108 - 6512 01ac 4E4B ldr r3, .L303+28 - 6513 01ae 7B60 str r3, [r7, #4] @ float -2297:Src/main.c **** } - 6514 .loc 1 2297 3 is_stmt 1 view .LVU2109 -2297:Src/main.c **** } - 6515 .loc 1 2297 31 is_stmt 0 view .LVU2110 - 6516 01b0 4E4B ldr r3, .L303+32 - 6517 01b2 BB60 str r3, [r7, #8] @ float - 6518 .L297: + 7235 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 +2278:Src/main.c **** { + 7236 .loc 1 2278 5 view .LVU2320 + 7237 011c 002B cmp r3, #0 + 7238 011e 00F08F80 beq .L364 +2280:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC + 7239 .loc 1 2280 3 is_stmt 1 view .LVU2321 + 7240 0122 0122 movs r2, #1 + 7241 0124 4FF48071 mov r1, #256 + 7242 0128 6948 ldr r0, .L382+4 + 7243 012a FFF7FEFF bl HAL_GPIO_WritePin + 7244 .LVL671: + 7245 .L365: +2289:Src/main.c **** { + 7246 .loc 1 2289 2 view .LVU2322 +2289:Src/main.c **** { + 7247 .loc 1 2289 16 is_stmt 0 view .LVU2323 + 7248 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 +2289:Src/main.c **** { + 7249 .loc 1 2289 5 view .LVU2324 + 7250 0130 002B cmp r3, #0 + 7251 0132 00F08C80 beq .L366 +2291:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC + 7252 .loc 1 2291 3 is_stmt 1 view .LVU2325 + 7253 0136 0122 movs r2, #1 + 7254 0138 1021 movs r1, #16 + 7255 013a 6848 ldr r0, .L382+16 + 7256 013c FFF7FEFF bl HAL_GPIO_WritePin + 7257 .LVL672: + 7258 .L367: 2300:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 488 - - - 6519 .loc 1 2300 2 is_stmt 1 view .LVU2111 + 7259 .loc 1 2300 2 view .LVU2326 2300:Src/main.c **** { - 6520 .loc 1 2300 16 is_stmt 0 view .LVU2112 - 6521 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 + 7260 .loc 1 2300 16 is_stmt 0 view .LVU2327 + 7261 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 2300:Src/main.c **** { - 6522 .loc 1 2300 5 view .LVU2113 - 6523 01b6 1BB9 cbnz r3, .L279 -2302:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 6524 .loc 1 2302 3 is_stmt 1 view .LVU2114 -2302:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 6525 .loc 1 2302 31 is_stmt 0 view .LVU2115 - 6526 01b8 4B4B ldr r3, .L303+28 - 6527 01ba 7360 str r3, [r6, #4] @ float -2303:Src/main.c **** } - 6528 .loc 1 2303 3 is_stmt 1 view .LVU2116 -2303:Src/main.c **** } - 6529 .loc 1 2303 31 is_stmt 0 view .LVU2117 - 6530 01bc 4B4B ldr r3, .L303+32 - 6531 01be B360 str r3, [r6, #8] @ float - 6532 .L279: -2305:Src/main.c **** - 6533 .loc 1 2305 1 view .LVU2118 - 6534 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} - 6535 .LVL561: - 6536 .L300: -2156:Src/main.c **** { - 6537 .loc 1 2156 6 view .LVU2119 - 6538 01c4 4FF48071 mov r1, #256 - 6539 01c8 4648 ldr r0, .L303+24 - 6540 01ca FFF7FEFF bl HAL_GPIO_ReadPin - 6541 .LVL562: -2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 6542 .loc 1 2155 78 discriminator 1 view .LVU2120 - 6543 01ce 0128 cmp r0, #1 - 6544 01d0 7FF426AF bne .L280 -2158:Src/main.c **** if (test == 0) //0 - suc - 6545 .loc 1 2158 3 is_stmt 1 view .LVU2121 -2158:Src/main.c **** if (test == 0) //0 - suc - 6546 .loc 1 2158 10 is_stmt 0 view .LVU2122 - 6547 01d4 4648 ldr r0, .L303+36 - 6548 01d6 FFF7FEFF bl Mount_SD - 6549 .LVL563: -2158:Src/main.c **** if (test == 0) //0 - suc - 6550 .loc 1 2158 8 discriminator 1 view .LVU2123 - 6551 01da 3C4B ldr r3, .L303 - 6552 01dc 1860 str r0, [r3] -2159:Src/main.c **** { - 6553 .loc 1 2159 3 is_stmt 1 view .LVU2124 -2159:Src/main.c **** { - 6554 .loc 1 2159 6 is_stmt 0 view .LVU2125 - 6555 01de 0028 cmp r0, #0 - 6556 01e0 7FF41EAF bne .L280 -2162:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 6557 .loc 1 2162 4 is_stmt 1 view .LVU2126 -2162:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 6558 .loc 1 2162 11 is_stmt 0 view .LVU2127 - 6559 01e4 DFF80C91 ldr r9, .L303+40 - ARM GAS /tmp/ccYgfTud.s page 489 + 7262 .loc 1 2300 5 view .LVU2328 + 7263 0142 002B cmp r3, #0 + 7264 0144 00F08980 beq .L368 +2302:Src/main.c **** } + 7265 .loc 1 2302 3 is_stmt 1 view .LVU2329 + 7266 0148 0122 movs r2, #1 + 7267 014a 4FF48061 mov r1, #1024 + 7268 014e 6448 ldr r0, .L382+20 + 7269 0150 FFF7FEFF bl HAL_GPIO_WritePin + 7270 .LVL673: + 7271 .L369: +2309:Src/main.c **** { + 7272 .loc 1 2309 2 view .LVU2330 +2309:Src/main.c **** { + 7273 .loc 1 2309 16 is_stmt 0 view .LVU2331 + 7274 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 +2309:Src/main.c **** { + 7275 .loc 1 2309 5 view .LVU2332 + 7276 0156 002B cmp r3, #0 + 7277 0158 00F08680 beq .L370 +2311:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 510 - 6560 01e8 4846 mov r0, r9 - 6561 01ea FFF7FEFF bl Remove_File - 6562 .LVL564: -2162:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 6563 .loc 1 2162 9 discriminator 1 view .LVU2128 - 6564 01ee DFF8DC80 ldr r8, .L303 - 6565 01f2 C8F80000 str r0, [r8] -2163:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 6566 .loc 1 2163 4 is_stmt 1 view .LVU2129 -2163:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 6567 .loc 1 2163 11 is_stmt 0 view .LVU2130 - 6568 01f6 4846 mov r0, r9 - 6569 01f8 FFF7FEFF bl Create_File - 6570 .LVL565: -2163:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 6571 .loc 1 2163 9 discriminator 1 view .LVU2131 - 6572 01fc C8F80000 str r0, [r8] -2164:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 6573 .loc 1 2164 4 is_stmt 1 view .LVU2132 -2164:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 6574 .loc 1 2164 11 is_stmt 0 view .LVU2133 - 6575 0200 1E22 movs r2, #30 - 6576 0202 2946 mov r1, r5 - 6577 0204 4846 mov r0, r9 - 6578 0206 FFF7FEFF bl Write_File_byte - 6579 .LVL566: -2164:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 6580 .loc 1 2164 9 discriminator 1 view .LVU2134 - 6581 020a C8F80000 str r0, [r8] -2165:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6582 .loc 1 2165 4 is_stmt 1 view .LVU2135 -2165:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6583 .loc 1 2165 11 is_stmt 0 view .LVU2136 - 6584 020e 1E22 movs r2, #30 - 6585 0210 2946 mov r1, r5 - 6586 0212 4846 mov r0, r9 - 6587 0214 FFF7FEFF bl Update_File_byte - 6588 .LVL567: -2165:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6589 .loc 1 2165 9 discriminator 1 view .LVU2137 - 6590 0218 C8F80000 str r0, [r8] -2166:Src/main.c **** } - 6591 .loc 1 2166 4 is_stmt 1 view .LVU2138 -2166:Src/main.c **** } - 6592 .loc 1 2166 11 is_stmt 0 view .LVU2139 - 6593 021c 3448 ldr r0, .L303+36 - 6594 021e FFF7FEFF bl Unmount_SD - 6595 .LVL568: -2166:Src/main.c **** } - 6596 .loc 1 2166 9 discriminator 1 view .LVU2140 - 6597 0222 C8F80000 str r0, [r8] - 6598 0226 FBE6 b .L280 - 6599 .LVL569: - 6600 .L281: -2216:Src/main.c **** } - 6601 .loc 1 2216 3 is_stmt 1 view .LVU2141 - 6602 0228 0022 movs r2, #0 - ARM GAS /tmp/ccYgfTud.s page 490 + 7278 .loc 1 2311 3 is_stmt 1 view .LVU2333 + 7279 015c 0122 movs r2, #1 + 7280 015e 0821 movs r1, #8 + 7281 0160 6048 ldr r0, .L382+24 + 7282 0162 FFF7FEFF bl HAL_GPIO_WritePin + 7283 .LVL674: + 7284 .L371: +2318:Src/main.c **** { + 7285 .loc 1 2318 2 view .LVU2334 +2318:Src/main.c **** { + 7286 .loc 1 2318 17 is_stmt 0 view .LVU2335 + 7287 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 +2318:Src/main.c **** { + 7288 .loc 1 2318 5 view .LVU2336 + 7289 0168 1BB1 cbz r3, .L372 +2318:Src/main.c **** { + 7290 .loc 1 2318 39 discriminator 1 view .LVU2337 + 7291 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 +2318:Src/main.c **** { + 7292 .loc 1 2318 26 discriminator 1 view .LVU2338 + 7293 016c 002B cmp r3, #0 + 7294 016e 40F08180 bne .L380 + 7295 .L372: +2327:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 7296 .loc 1 2327 3 is_stmt 1 view .LVU2339 + 7297 0172 0022 movs r2, #0 + 7298 0174 0121 movs r1, #1 + 7299 0176 5B48 ldr r0, .L382+24 + 7300 0178 FFF7FEFF bl HAL_GPIO_WritePin + 7301 .LVL675: +2328:Src/main.c **** } + 7302 .loc 1 2328 3 view .LVU2340 + 7303 017c 0022 movs r2, #0 + 7304 017e 4FF40061 mov r1, #2048 + 7305 0182 5748 ldr r0, .L382+20 + 7306 0184 FFF7FEFF bl HAL_GPIO_WritePin + 7307 .LVL676: + 7308 .L373: +2331:Src/main.c **** { + 7309 .loc 1 2331 2 view .LVU2341 +2331:Src/main.c **** { + 7310 .loc 1 2331 17 is_stmt 0 view .LVU2342 + 7311 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 +2331:Src/main.c **** { + 7312 .loc 1 2331 5 view .LVU2343 + 7313 018a 1BB1 cbz r3, .L374 +2331:Src/main.c **** { + 7314 .loc 1 2331 39 discriminator 1 view .LVU2344 + 7315 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 +2331:Src/main.c **** { + 7316 .loc 1 2331 26 discriminator 1 view .LVU2345 + 7317 018e 002B cmp r3, #0 + 7318 0190 40F08680 bne .L381 + 7319 .L374: +2340:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 7320 .loc 1 2340 3 is_stmt 1 view .LVU2346 + 7321 0194 0022 movs r2, #0 + ARM GAS /tmp/ccwR4KB7.s page 511 - 6603 022a 0821 movs r1, #8 - 6604 022c 2B48 ldr r0, .L303+16 - 6605 022e FFF7FEFF bl HAL_GPIO_WritePin - 6606 .LVL570: - 6607 0232 69E7 b .L282 - 6608 .L283: -2225:Src/main.c **** } - 6609 .loc 1 2225 3 view .LVU2142 - 6610 0234 0022 movs r2, #0 - 6611 0236 0421 movs r1, #4 - 6612 0238 2848 ldr r0, .L303+16 - 6613 023a FFF7FEFF bl HAL_GPIO_WritePin - 6614 .LVL571: - 6615 023e 6CE7 b .L284 - 6616 .L285: -2235:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC - 6617 .loc 1 2235 3 view .LVU2143 - 6618 0240 0022 movs r2, #0 - 6619 0242 4FF48071 mov r1, #256 - 6620 0246 2248 ldr r0, .L303+4 - 6621 0248 FFF7FEFF bl HAL_GPIO_WritePin - 6622 .LVL572: - 6623 024c 6FE7 b .L286 - 6624 .L287: -2246:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC - 6625 .loc 1 2246 3 view .LVU2144 - 6626 024e 0022 movs r2, #0 - 6627 0250 1021 movs r1, #16 - 6628 0252 2248 ldr r0, .L303+16 - 6629 0254 FFF7FEFF bl HAL_GPIO_WritePin - 6630 .LVL573: - 6631 0258 72E7 b .L288 - 6632 .L289: -2256:Src/main.c **** } - 6633 .loc 1 2256 3 view .LVU2145 - 6634 025a 0022 movs r2, #0 - 6635 025c 4FF48061 mov r1, #1024 - 6636 0260 1F48 ldr r0, .L303+20 - 6637 0262 FFF7FEFF bl HAL_GPIO_WritePin - 6638 .LVL574: - 6639 0266 75E7 b .L290 - 6640 .L291: -2265:Src/main.c **** } - 6641 .loc 1 2265 3 view .LVU2146 - 6642 0268 0022 movs r2, #0 - 6643 026a 0821 movs r1, #8 - 6644 026c 1D48 ldr r0, .L303+24 - 6645 026e FFF7FEFF bl HAL_GPIO_WritePin - 6646 .LVL575: - 6647 0272 78E7 b .L292 - 6648 .L301: -2270:Src/main.c **** Set_LTEC(3,32767); - 6649 .loc 1 2270 3 view .LVU2147 - 6650 0274 47F6FF71 movw r1, #32767 - 6651 0278 0320 movs r0, #3 - 6652 027a FFF7FEFF bl Set_LTEC - 6653 .LVL576: - ARM GAS /tmp/ccYgfTud.s page 491 + 7322 0196 0221 movs r1, #2 + 7323 0198 5248 ldr r0, .L382+24 + 7324 019a FFF7FEFF bl HAL_GPIO_WritePin + 7325 .LVL677: +2341:Src/main.c **** } + 7326 .loc 1 2341 3 view .LVU2347 + 7327 019e 0022 movs r2, #0 + 7328 01a0 2021 movs r1, #32 + 7329 01a2 4E48 ldr r0, .L382+16 + 7330 01a4 FFF7FEFF bl HAL_GPIO_WritePin + 7331 .LVL678: + 7332 .L375: +2344:Src/main.c **** { + 7333 .loc 1 2344 2 view .LVU2348 +2344:Src/main.c **** { + 7334 .loc 1 2344 16 is_stmt 0 view .LVU2349 + 7335 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 +2344:Src/main.c **** { + 7336 .loc 1 2344 5 view .LVU2350 + 7337 01aa 1BB9 cbnz r3, .L376 +2346:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 7338 .loc 1 2346 3 is_stmt 1 view .LVU2351 +2346:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 7339 .loc 1 2346 31 is_stmt 0 view .LVU2352 + 7340 01ac 4E4B ldr r3, .L382+28 + 7341 01ae 7B60 str r3, [r7, #4] @ float +2347:Src/main.c **** } + 7342 .loc 1 2347 3 is_stmt 1 view .LVU2353 +2347:Src/main.c **** } + 7343 .loc 1 2347 31 is_stmt 0 view .LVU2354 + 7344 01b0 4E4B ldr r3, .L382+32 + 7345 01b2 BB60 str r3, [r7, #8] @ float + 7346 .L376: +2350:Src/main.c **** { + 7347 .loc 1 2350 2 is_stmt 1 view .LVU2355 +2350:Src/main.c **** { + 7348 .loc 1 2350 16 is_stmt 0 view .LVU2356 + 7349 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 +2350:Src/main.c **** { + 7350 .loc 1 2350 5 view .LVU2357 + 7351 01b6 1BB9 cbnz r3, .L358 +2352:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 7352 .loc 1 2352 3 is_stmt 1 view .LVU2358 +2352:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 7353 .loc 1 2352 31 is_stmt 0 view .LVU2359 + 7354 01b8 4B4B ldr r3, .L382+28 + 7355 01ba 7360 str r3, [r6, #4] @ float +2353:Src/main.c **** } + 7356 .loc 1 2353 3 is_stmt 1 view .LVU2360 +2353:Src/main.c **** } + 7357 .loc 1 2353 31 is_stmt 0 view .LVU2361 + 7358 01bc 4B4B ldr r3, .L382+32 + 7359 01be B360 str r3, [r6, #8] @ float + 7360 .L358: +2355:Src/main.c **** + 7361 .loc 1 2355 1 view .LVU2362 + 7362 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + ARM GAS /tmp/ccwR4KB7.s page 512 -2271:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); - 6654 .loc 1 2271 3 view .LVU2148 - 6655 027e 47F6FF71 movw r1, #32767 - 6656 0282 0320 movs r0, #3 - 6657 0284 FFF7FEFF bl Set_LTEC - 6658 .LVL577: -2272:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); - 6659 .loc 1 2272 3 view .LVU2149 - 6660 0288 0122 movs r2, #1 - 6661 028a 4FF40061 mov r1, #2048 - 6662 028e 1448 ldr r0, .L303+20 - 6663 0290 FFF7FEFF bl HAL_GPIO_WritePin - 6664 .LVL578: -2273:Src/main.c **** } - 6665 .loc 1 2273 3 view .LVU2150 - 6666 0294 0122 movs r2, #1 - 6667 0296 1146 mov r1, r2 - 6668 0298 1248 ldr r0, .L303+24 - 6669 029a FFF7FEFF bl HAL_GPIO_WritePin - 6670 .LVL579: - 6671 029e 73E7 b .L294 - 6672 .L302: -2283:Src/main.c **** Set_LTEC(4,32767); - 6673 .loc 1 2283 3 view .LVU2151 - 6674 02a0 47F6FF71 movw r1, #32767 - 6675 02a4 0420 movs r0, #4 - 6676 02a6 FFF7FEFF bl Set_LTEC - 6677 .LVL580: -2284:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); - 6678 .loc 1 2284 3 view .LVU2152 - 6679 02aa 47F6FF71 movw r1, #32767 - 6680 02ae 0420 movs r0, #4 - 6681 02b0 FFF7FEFF bl Set_LTEC - 6682 .LVL581: -2285:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); - 6683 .loc 1 2285 3 view .LVU2153 - 6684 02b4 0122 movs r2, #1 - 6685 02b6 2021 movs r1, #32 - 6686 02b8 0848 ldr r0, .L303+16 - 6687 02ba FFF7FEFF bl HAL_GPIO_WritePin - 6688 .LVL582: -2286:Src/main.c **** } - 6689 .loc 1 2286 3 view .LVU2154 - 6690 02be 0122 movs r2, #1 - 6691 02c0 0221 movs r1, #2 - 6692 02c2 0848 ldr r0, .L303+24 - 6693 02c4 FFF7FEFF bl HAL_GPIO_WritePin - 6694 .LVL583: - 6695 02c8 6EE7 b .L296 - 6696 .L304: - 6697 02ca 00BF .align 2 - 6698 .L303: - 6699 02cc 00000000 .word test - 6700 02d0 000C0240 .word 1073875968 - 6701 02d4 0000803B .word 998244352 - 6702 02d8 00000000 .word Long_Data - 6703 02dc 00080240 .word 1073874944 - ARM GAS /tmp/ccYgfTud.s page 492 + 7363 .LVL679: + 7364 .L379: +2206:Src/main.c **** { + 7365 .loc 1 2206 6 view .LVU2363 + 7366 01c4 4FF48071 mov r1, #256 + 7367 01c8 4648 ldr r0, .L382+24 + 7368 01ca FFF7FEFF bl HAL_GPIO_ReadPin + 7369 .LVL680: +2205:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 7370 .loc 1 2205 78 discriminator 1 view .LVU2364 + 7371 01ce 0128 cmp r0, #1 + 7372 01d0 7FF426AF bne .L359 +2208:Src/main.c **** if (test == 0) //0 - suc + 7373 .loc 1 2208 3 is_stmt 1 view .LVU2365 +2208:Src/main.c **** if (test == 0) //0 - suc + 7374 .loc 1 2208 10 is_stmt 0 view .LVU2366 + 7375 01d4 4648 ldr r0, .L382+36 + 7376 01d6 FFF7FEFF bl Mount_SD + 7377 .LVL681: +2208:Src/main.c **** if (test == 0) //0 - suc + 7378 .loc 1 2208 8 discriminator 1 view .LVU2367 + 7379 01da 3C4B ldr r3, .L382 + 7380 01dc 1860 str r0, [r3] +2209:Src/main.c **** { + 7381 .loc 1 2209 3 is_stmt 1 view .LVU2368 +2209:Src/main.c **** { + 7382 .loc 1 2209 6 is_stmt 0 view .LVU2369 + 7383 01de 0028 cmp r0, #0 + 7384 01e0 7FF41EAF bne .L359 +2212:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 7385 .loc 1 2212 4 is_stmt 1 view .LVU2370 +2212:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 7386 .loc 1 2212 11 is_stmt 0 view .LVU2371 + 7387 01e4 DFF80C91 ldr r9, .L382+40 + 7388 01e8 4846 mov r0, r9 + 7389 01ea FFF7FEFF bl Remove_File + 7390 .LVL682: +2212:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 7391 .loc 1 2212 9 discriminator 1 view .LVU2372 + 7392 01ee DFF8DC80 ldr r8, .L382 + 7393 01f2 C8F80000 str r0, [r8] +2213:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 7394 .loc 1 2213 4 is_stmt 1 view .LVU2373 +2213:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 7395 .loc 1 2213 11 is_stmt 0 view .LVU2374 + 7396 01f6 4846 mov r0, r9 + 7397 01f8 FFF7FEFF bl Create_File + 7398 .LVL683: +2213:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 7399 .loc 1 2213 9 discriminator 1 view .LVU2375 + 7400 01fc C8F80000 str r0, [r8] +2214:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 7401 .loc 1 2214 4 is_stmt 1 view .LVU2376 +2214:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 7402 .loc 1 2214 11 is_stmt 0 view .LVU2377 + 7403 0200 1E22 movs r2, #30 + 7404 0202 2946 mov r1, r5 + ARM GAS /tmp/ccwR4KB7.s page 513 - 6704 02e0 00040240 .word 1073873920 - 6705 02e4 00000240 .word 1073872896 - 6706 02e8 00002041 .word 1092616192 - 6707 02ec 0AD7233C .word 1008981770 - 6708 02f0 00000000 .word .LC0 - 6709 02f4 04000000 .word .LC1 - 6710 .cfi_endproc - 6711 .LFE1208: - 6713 .section .text.Advanced_Controller_Temp,"ax",%progbits - 6714 .align 1 - 6715 .global Advanced_Controller_Temp - 6716 .syntax unified - 6717 .thumb - 6718 .thumb_func - 6720 Advanced_Controller_Temp: - 6721 .LVL584: - 6722 .LFB1220: -2814:Src/main.c **** // Main idea: - 6723 .loc 1 2814 1 view -0 - 6724 .cfi_startproc - 6725 @ args = 0, pretend = 0, frame = 0 - 6726 @ frame_needed = 0, uses_anonymous_args = 0 - 6727 @ link register save eliminated. -2814:Src/main.c **** // Main idea: - 6728 .loc 1 2814 1 is_stmt 0 view .LVU2156 - 6729 0000 30B4 push {r4, r5} - 6730 .LCFI58: - 6731 .cfi_def_cfa_offset 8 - 6732 .cfi_offset 4, -8 - 6733 .cfi_offset 5, -4 -2832:Src/main.c **** float P_coef_current;//, I_coef_current; - 6734 .loc 1 2832 2 is_stmt 1 view .LVU2157 -2833:Src/main.c **** float e_integral; - 6735 .loc 1 2833 2 view .LVU2158 -2834:Src/main.c **** int x_output; - 6736 .loc 1 2834 2 view .LVU2159 -2835:Src/main.c **** - 6737 .loc 1 2835 2 view .LVU2160 -2837:Src/main.c **** - 6738 .loc 1 2837 2 view .LVU2161 -2837:Src/main.c **** - 6739 .loc 1 2837 28 is_stmt 0 view .LVU2162 - 6740 0002 0B88 ldrh r3, [r1] -2837:Src/main.c **** - 6741 .loc 1 2837 65 view .LVU2163 - 6742 0004 0488 ldrh r4, [r0] -2837:Src/main.c **** - 6743 .loc 1 2837 8 view .LVU2164 - 6744 0006 1B1B subs r3, r3, r4 - 6745 .LVL585: -2839:Src/main.c **** - 6746 .loc 1 2839 2 is_stmt 1 view .LVU2165 -2839:Src/main.c **** - 6747 .loc 1 2839 13 is_stmt 0 view .LVU2166 - 6748 0008 D1ED017A vldr.32 s15, [r1, #4] - 6749 .LVL586: -2841:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - ARM GAS /tmp/ccYgfTud.s page 493 + 7405 0204 4846 mov r0, r9 + 7406 0206 FFF7FEFF bl Write_File_byte + 7407 .LVL684: +2214:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 7408 .loc 1 2214 9 discriminator 1 view .LVU2378 + 7409 020a C8F80000 str r0, [r8] +2215:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7410 .loc 1 2215 4 is_stmt 1 view .LVU2379 +2215:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7411 .loc 1 2215 11 is_stmt 0 view .LVU2380 + 7412 020e 1E22 movs r2, #30 + 7413 0210 2946 mov r1, r5 + 7414 0212 4846 mov r0, r9 + 7415 0214 FFF7FEFF bl Update_File_byte + 7416 .LVL685: +2215:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7417 .loc 1 2215 9 discriminator 1 view .LVU2381 + 7418 0218 C8F80000 str r0, [r8] +2216:Src/main.c **** } + 7419 .loc 1 2216 4 is_stmt 1 view .LVU2382 +2216:Src/main.c **** } + 7420 .loc 1 2216 11 is_stmt 0 view .LVU2383 + 7421 021c 3448 ldr r0, .L382+36 + 7422 021e FFF7FEFF bl Unmount_SD + 7423 .LVL686: +2216:Src/main.c **** } + 7424 .loc 1 2216 9 discriminator 1 view .LVU2384 + 7425 0222 C8F80000 str r0, [r8] + 7426 0226 FBE6 b .L359 + 7427 .LVL687: + 7428 .L360: +2266:Src/main.c **** } + 7429 .loc 1 2266 3 is_stmt 1 view .LVU2385 + 7430 0228 0022 movs r2, #0 + 7431 022a 0821 movs r1, #8 + 7432 022c 2B48 ldr r0, .L382+16 + 7433 022e FFF7FEFF bl HAL_GPIO_WritePin + 7434 .LVL688: + 7435 0232 69E7 b .L361 + 7436 .L362: +2275:Src/main.c **** } + 7437 .loc 1 2275 3 view .LVU2386 + 7438 0234 0022 movs r2, #0 + 7439 0236 0421 movs r1, #4 + 7440 0238 2848 ldr r0, .L382+16 + 7441 023a FFF7FEFF bl HAL_GPIO_WritePin + 7442 .LVL689: + 7443 023e 6CE7 b .L363 + 7444 .L364: +2285:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC + 7445 .loc 1 2285 3 view .LVU2387 + 7446 0240 0022 movs r2, #0 + 7447 0242 4FF48071 mov r1, #256 + 7448 0246 2248 ldr r0, .L382+4 + 7449 0248 FFF7FEFF bl HAL_GPIO_WritePin + 7450 .LVL690: + 7451 024c 6FE7 b .L365 + ARM GAS /tmp/ccwR4KB7.s page 514 - 6750 .loc 1 2841 2 is_stmt 1 view .LVU2167 -2841:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 6751 .loc 1 2841 20 is_stmt 0 view .LVU2168 - 6752 000c 03F6B73C addw ip, r3, #2999 -2841:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 6753 .loc 1 2841 4 view .LVU2169 - 6754 0010 41F26E74 movw r4, #5998 - 6755 0014 A445 cmp ip, r4 - 6756 0016 18D8 bhi .L306 -2842:Src/main.c **** } - 6757 .loc 1 2842 3 is_stmt 1 view .LVU2170 -2842:Src/main.c **** } - 6758 .loc 1 2842 31 is_stmt 0 view .LVU2171 - 6759 0018 90ED027A vldr.32 s14, [r0, #8] -2842:Src/main.c **** } - 6760 .loc 1 2842 47 view .LVU2172 - 6761 001c 06EE903A vmov s13, r3 @ int - 6762 0020 F8EEE66A vcvt.f32.s32 s13, s13 -2842:Src/main.c **** } - 6763 .loc 1 2842 45 view .LVU2173 - 6764 0024 27EE267A vmul.f32 s14, s14, s13 -2842:Src/main.c **** } - 6765 .loc 1 2842 76 view .LVU2174 - 6766 0028 284C ldr r4, .L316 - 6767 002a 2468 ldr r4, [r4] - 6768 002c 284D ldr r5, .L316+4 - 6769 002e 2D68 ldr r5, [r5] - 6770 0030 641B subs r4, r4, r5 -2842:Src/main.c **** } - 6771 .loc 1 2842 64 view .LVU2175 - 6772 0032 06EE904A vmov s13, r4 @ int - 6773 0036 F8EE666A vcvt.f32.u32 s13, s13 -2842:Src/main.c **** } - 6774 .loc 1 2842 62 view .LVU2176 - 6775 003a 27EE267A vmul.f32 s14, s14, s13 -2842:Src/main.c **** } - 6776 .loc 1 2842 87 view .LVU2177 - 6777 003e 9FED256A vldr.32 s12, .L316+8 - 6778 0042 C7EE066A vdiv.f32 s13, s14, s12 -2842:Src/main.c **** } - 6779 .loc 1 2842 14 view .LVU2178 - 6780 0046 77EEA67A vadd.f32 s15, s15, s13 - 6781 .LVL587: - 6782 .L306: -2844:Src/main.c **** - 6783 .loc 1 2844 2 is_stmt 1 view .LVU2179 -2844:Src/main.c **** - 6784 .loc 1 2844 17 is_stmt 0 view .LVU2180 - 6785 004a D0ED016A vldr.32 s13, [r0, #4] - 6786 .LVL588: -2846:Src/main.c **** e_integral = 32000; - 6787 .loc 1 2846 2 is_stmt 1 view .LVU2181 -2846:Src/main.c **** e_integral = 32000; - 6788 .loc 1 2846 5 is_stmt 0 view .LVU2182 - 6789 004e 9FED227A vldr.32 s14, .L316+12 - 6790 0052 F4EEC77A vcmpe.f32 s15, s14 - 6791 0056 F1EE10FA vmrs APSR_nzcv, FPSCR - ARM GAS /tmp/ccYgfTud.s page 494 + 7452 .L366: +2296:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC + 7453 .loc 1 2296 3 view .LVU2388 + 7454 024e 0022 movs r2, #0 + 7455 0250 1021 movs r1, #16 + 7456 0252 2248 ldr r0, .L382+16 + 7457 0254 FFF7FEFF bl HAL_GPIO_WritePin + 7458 .LVL691: + 7459 0258 72E7 b .L367 + 7460 .L368: +2306:Src/main.c **** } + 7461 .loc 1 2306 3 view .LVU2389 + 7462 025a 0022 movs r2, #0 + 7463 025c 4FF48061 mov r1, #1024 + 7464 0260 1F48 ldr r0, .L382+20 + 7465 0262 FFF7FEFF bl HAL_GPIO_WritePin + 7466 .LVL692: + 7467 0266 75E7 b .L369 + 7468 .L370: +2315:Src/main.c **** } + 7469 .loc 1 2315 3 view .LVU2390 + 7470 0268 0022 movs r2, #0 + 7471 026a 0821 movs r1, #8 + 7472 026c 1D48 ldr r0, .L382+24 + 7473 026e FFF7FEFF bl HAL_GPIO_WritePin + 7474 .LVL693: + 7475 0272 78E7 b .L371 + 7476 .L380: +2320:Src/main.c **** Set_LTEC(3,32767); + 7477 .loc 1 2320 3 view .LVU2391 + 7478 0274 47F6FF71 movw r1, #32767 + 7479 0278 0320 movs r0, #3 + 7480 027a FFF7FEFF bl Set_LTEC + 7481 .LVL694: +2321:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); + 7482 .loc 1 2321 3 view .LVU2392 + 7483 027e 47F6FF71 movw r1, #32767 + 7484 0282 0320 movs r0, #3 + 7485 0284 FFF7FEFF bl Set_LTEC + 7486 .LVL695: +2322:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); + 7487 .loc 1 2322 3 view .LVU2393 + 7488 0288 0122 movs r2, #1 + 7489 028a 4FF40061 mov r1, #2048 + 7490 028e 1448 ldr r0, .L382+20 + 7491 0290 FFF7FEFF bl HAL_GPIO_WritePin + 7492 .LVL696: +2323:Src/main.c **** } + 7493 .loc 1 2323 3 view .LVU2394 + 7494 0294 0122 movs r2, #1 + 7495 0296 1146 mov r1, r2 + 7496 0298 1248 ldr r0, .L382+24 + 7497 029a FFF7FEFF bl HAL_GPIO_WritePin + 7498 .LVL697: + 7499 029e 73E7 b .L373 + 7500 .L381: +2333:Src/main.c **** Set_LTEC(4,32767); + ARM GAS /tmp/ccwR4KB7.s page 515 - 6792 005a 09DC bgt .L310 -2849:Src/main.c **** e_integral = -32000; - 6793 .loc 1 2849 7 is_stmt 1 view .LVU2183 -2849:Src/main.c **** e_integral = -32000; - 6794 .loc 1 2849 10 is_stmt 0 view .LVU2184 - 6795 005c 9FED1F7A vldr.32 s14, .L316+16 - 6796 0060 F4EEC77A vcmpe.f32 s15, s14 - 6797 0064 F1EE10FA vmrs APSR_nzcv, FPSCR - 6798 0068 04D5 bpl .L307 -2850:Src/main.c **** } - 6799 .loc 1 2850 15 view .LVU2185 - 6800 006a DFED1C7A vldr.32 s15, .L316+16 - 6801 .LVL589: -2850:Src/main.c **** } - 6802 .loc 1 2850 15 view .LVU2186 - 6803 006e 01E0 b .L307 - 6804 .LVL590: - 6805 .L310: -2847:Src/main.c **** } - 6806 .loc 1 2847 15 view .LVU2187 - 6807 0070 DFED197A vldr.32 s15, .L316+12 - 6808 .LVL591: - 6809 .L307: -2852:Src/main.c **** - 6810 .loc 1 2852 2 is_stmt 1 view .LVU2188 -2852:Src/main.c **** - 6811 .loc 1 2852 26 is_stmt 0 view .LVU2189 - 6812 0074 C1ED017A vstr.32 s15, [r1, #4] -2854:Src/main.c **** - 6813 .loc 1 2854 2 is_stmt 1 view .LVU2190 -2854:Src/main.c **** - 6814 .loc 1 2854 36 is_stmt 0 view .LVU2191 - 6815 0078 07EE103A vmov s14, r3 @ int - 6816 007c B8EEC77A vcvt.f32.s32 s14, s14 - 6817 0080 27EE267A vmul.f32 s14, s14, s13 -2854:Src/main.c **** - 6818 .loc 1 2854 19 view .LVU2192 - 6819 0084 DFED166A vldr.32 s13, .L316+20 - 6820 .LVL592: -2854:Src/main.c **** - 6821 .loc 1 2854 19 view .LVU2193 - 6822 0088 37EE267A vadd.f32 s14, s14, s13 -2854:Src/main.c **** - 6823 .loc 1 2854 46 view .LVU2194 - 6824 008c FDEEE77A vcvt.s32.f32 s15, s15 - 6825 .LVL593: -2854:Src/main.c **** - 6826 .loc 1 2854 44 view .LVU2195 - 6827 0090 F8EEE77A vcvt.f32.s32 s15, s15 - 6828 0094 77EE877A vadd.f32 s15, s15, s14 -2854:Src/main.c **** - 6829 .loc 1 2854 11 view .LVU2196 - 6830 0098 FDEEE77A vcvt.s32.f32 s15, s15 - 6831 009c 17EE900A vmov r0, s15 @ int - 6832 .LVL594: -2856:Src/main.c **** x_output = 8800; - 6833 .loc 1 2856 2 is_stmt 1 view .LVU2197 - ARM GAS /tmp/ccYgfTud.s page 495 + 7501 .loc 1 2333 3 view .LVU2395 + 7502 02a0 47F6FF71 movw r1, #32767 + 7503 02a4 0420 movs r0, #4 + 7504 02a6 FFF7FEFF bl Set_LTEC + 7505 .LVL698: +2334:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); + 7506 .loc 1 2334 3 view .LVU2396 + 7507 02aa 47F6FF71 movw r1, #32767 + 7508 02ae 0420 movs r0, #4 + 7509 02b0 FFF7FEFF bl Set_LTEC + 7510 .LVL699: +2335:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); + 7511 .loc 1 2335 3 view .LVU2397 + 7512 02b4 0122 movs r2, #1 + 7513 02b6 2021 movs r1, #32 + 7514 02b8 0848 ldr r0, .L382+16 + 7515 02ba FFF7FEFF bl HAL_GPIO_WritePin + 7516 .LVL700: +2336:Src/main.c **** } + 7517 .loc 1 2336 3 view .LVU2398 + 7518 02be 0122 movs r2, #1 + 7519 02c0 0221 movs r1, #2 + 7520 02c2 0848 ldr r0, .L382+24 + 7521 02c4 FFF7FEFF bl HAL_GPIO_WritePin + 7522 .LVL701: + 7523 02c8 6EE7 b .L375 + 7524 .L383: + 7525 02ca 00BF .align 2 + 7526 .L382: + 7527 02cc 00000000 .word test + 7528 02d0 000C0240 .word 1073875968 + 7529 02d4 0000803B .word 998244352 + 7530 02d8 00000000 .word Long_Data + 7531 02dc 00080240 .word 1073874944 + 7532 02e0 00040240 .word 1073873920 + 7533 02e4 00000240 .word 1073872896 + 7534 02e8 00002041 .word 1092616192 + 7535 02ec 0AD7233C .word 1008981770 + 7536 02f0 00000000 .word .LC0 + 7537 02f4 04000000 .word .LC1 + 7538 .cfi_endproc + 7539 .LFE1208: + 7541 .section .text.Advanced_Controller_Temp,"ax",%progbits + 7542 .align 1 + 7543 .global Advanced_Controller_Temp + 7544 .syntax unified + 7545 .thumb + 7546 .thumb_func + 7548 Advanced_Controller_Temp: + 7549 .LVL702: + 7550 .LFB1223: +3093:Src/main.c **** // Main idea: + 7551 .loc 1 3093 1 view -0 + 7552 .cfi_startproc + 7553 @ args = 0, pretend = 0, frame = 0 + 7554 @ frame_needed = 0, uses_anonymous_args = 0 + 7555 @ link register save eliminated. + ARM GAS /tmp/ccwR4KB7.s page 516 -2856:Src/main.c **** x_output = 8800; - 6834 .loc 1 2856 4 is_stmt 0 view .LVU2198 - 6835 00a0 B0F57A7F cmp r0, #1000 - 6836 00a4 06DB blt .L312 -2859:Src/main.c **** x_output = 56800; - 6837 .loc 1 2859 7 is_stmt 1 view .LVU2199 -2859:Src/main.c **** x_output = 56800; - 6838 .loc 1 2859 9 is_stmt 0 view .LVU2200 - 6839 00a6 4DF6E053 movw r3, #56800 - 6840 .LVL595: -2859:Src/main.c **** x_output = 56800; - 6841 .loc 1 2859 9 view .LVU2201 - 6842 00aa 9842 cmp r0, r3 - 6843 00ac 04DD ble .L308 -2860:Src/main.c **** } - 6844 .loc 1 2860 12 view .LVU2202 - 6845 00ae 4DF6E050 movw r0, #56800 - 6846 .LVL596: -2860:Src/main.c **** } - 6847 .loc 1 2860 12 view .LVU2203 - 6848 00b2 01E0 b .L308 - 6849 .LVL597: - 6850 .L312: -2857:Src/main.c **** } - 6851 .loc 1 2857 12 view .LVU2204 - 6852 00b4 42F26020 movw r0, #8800 - 6853 .LVL598: - 6854 .L308: -2863:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 6855 .loc 1 2863 2 is_stmt 1 view .LVU2205 -2863:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 6856 .loc 1 2863 5 is_stmt 0 view .LVU2206 - 6857 00b8 022A cmp r2, #2 - 6858 00ba 02D0 beq .L315 - 6859 .LVL599: - 6860 .L309: -2866:Src/main.c **** } - 6861 .loc 1 2866 2 is_stmt 1 view .LVU2207 -2867:Src/main.c **** - 6862 .loc 1 2867 1 is_stmt 0 view .LVU2208 - 6863 00bc 80B2 uxth r0, r0 - 6864 .LVL600: -2867:Src/main.c **** - 6865 .loc 1 2867 1 view .LVU2209 - 6866 00be 30BC pop {r4, r5} - 6867 .LCFI59: - 6868 .cfi_remember_state - 6869 .cfi_restore 5 - 6870 .cfi_restore 4 - 6871 .cfi_def_cfa_offset 0 - 6872 00c0 7047 bx lr - 6873 .LVL601: - 6874 .L315: - 6875 .LCFI60: - 6876 .cfi_restore_state -2864:Src/main.c **** - 6877 .loc 1 2864 3 is_stmt 1 view .LVU2210 - ARM GAS /tmp/ccYgfTud.s page 496 +3093:Src/main.c **** // Main idea: + 7556 .loc 1 3093 1 is_stmt 0 view .LVU2400 + 7557 0000 30B4 push {r4, r5} + 7558 .LCFI67: + 7559 .cfi_def_cfa_offset 8 + 7560 .cfi_offset 4, -8 + 7561 .cfi_offset 5, -4 +3111:Src/main.c **** float P_coef_current;//, I_coef_current; + 7562 .loc 1 3111 2 is_stmt 1 view .LVU2401 +3112:Src/main.c **** float e_integral; + 7563 .loc 1 3112 2 view .LVU2402 +3113:Src/main.c **** int x_output; + 7564 .loc 1 3113 2 view .LVU2403 +3114:Src/main.c **** + 7565 .loc 1 3114 2 view .LVU2404 +3116:Src/main.c **** + 7566 .loc 1 3116 2 view .LVU2405 +3116:Src/main.c **** + 7567 .loc 1 3116 28 is_stmt 0 view .LVU2406 + 7568 0002 0B88 ldrh r3, [r1] +3116:Src/main.c **** + 7569 .loc 1 3116 65 view .LVU2407 + 7570 0004 0488 ldrh r4, [r0] +3116:Src/main.c **** + 7571 .loc 1 3116 8 view .LVU2408 + 7572 0006 1B1B subs r3, r3, r4 + 7573 .LVL703: +3118:Src/main.c **** + 7574 .loc 1 3118 2 is_stmt 1 view .LVU2409 +3118:Src/main.c **** + 7575 .loc 1 3118 13 is_stmt 0 view .LVU2410 + 7576 0008 D1ED017A vldr.32 s15, [r1, #4] + 7577 .LVL704: +3120:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 7578 .loc 1 3120 2 is_stmt 1 view .LVU2411 +3120:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 7579 .loc 1 3120 20 is_stmt 0 view .LVU2412 + 7580 000c 03F6B73C addw ip, r3, #2999 +3120:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 7581 .loc 1 3120 4 view .LVU2413 + 7582 0010 41F26E74 movw r4, #5998 + 7583 0014 A445 cmp ip, r4 + 7584 0016 18D8 bhi .L385 +3121:Src/main.c **** } + 7585 .loc 1 3121 3 is_stmt 1 view .LVU2414 +3121:Src/main.c **** } + 7586 .loc 1 3121 31 is_stmt 0 view .LVU2415 + 7587 0018 90ED027A vldr.32 s14, [r0, #8] +3121:Src/main.c **** } + 7588 .loc 1 3121 47 view .LVU2416 + 7589 001c 06EE903A vmov s13, r3 @ int + 7590 0020 F8EEE66A vcvt.f32.s32 s13, s13 +3121:Src/main.c **** } + 7591 .loc 1 3121 45 view .LVU2417 + 7592 0024 27EE267A vmul.f32 s14, s14, s13 +3121:Src/main.c **** } + 7593 .loc 1 3121 76 view .LVU2418 + ARM GAS /tmp/ccwR4KB7.s page 517 -2864:Src/main.c **** - 6878 .loc 1 2864 11 is_stmt 0 view .LVU2211 - 6879 00c2 024B ldr r3, .L316 - 6880 00c4 1A68 ldr r2, [r3] - 6881 .LVL602: -2864:Src/main.c **** - 6882 .loc 1 2864 11 view .LVU2212 - 6883 00c6 024B ldr r3, .L316+4 - 6884 00c8 1A60 str r2, [r3] - 6885 00ca F7E7 b .L309 - 6886 .L317: - 6887 .align 2 - 6888 .L316: - 6889 00cc 00000000 .word TO7 - 6890 00d0 00000000 .word TO7_PID - 6891 00d4 0000C842 .word 1120403456 - 6892 00d8 0000FA46 .word 1190789120 - 6893 00dc 0000FAC6 .word -956694528 - 6894 00e0 00000047 .word 1191182336 - 6895 .cfi_endproc - 6896 .LFE1220: - 6898 .section .text.CalculateChecksum,"ax",%progbits - 6899 .align 1 - 6900 .global CalculateChecksum - 6901 .syntax unified - 6902 .thumb - 6903 .thumb_func - 6905 CalculateChecksum: - 6906 .LVL603: - 6907 .LFB1223: -2930:Src/main.c **** short i; - 6908 .loc 1 2930 1 is_stmt 1 view -0 - 6909 .cfi_startproc - 6910 @ args = 0, pretend = 0, frame = 0 - 6911 @ frame_needed = 0, uses_anonymous_args = 0 - 6912 @ link register save eliminated. -2930:Src/main.c **** short i; - 6913 .loc 1 2930 1 is_stmt 0 view .LVU2214 - 6914 0000 8446 mov ip, r0 -2931:Src/main.c **** uint16_t cs = *pbuff; - 6915 .loc 1 2931 2 is_stmt 1 view .LVU2215 -2932:Src/main.c **** - 6916 .loc 1 2932 2 view .LVU2216 -2932:Src/main.c **** - 6917 .loc 1 2932 11 is_stmt 0 view .LVU2217 - 6918 0002 0088 ldrh r0, [r0] - 6919 .LVL604: -2934:Src/main.c **** { - 6920 .loc 1 2934 3 is_stmt 1 view .LVU2218 -2934:Src/main.c **** { - 6921 .loc 1 2934 9 is_stmt 0 view .LVU2219 - 6922 0004 0123 movs r3, #1 -2934:Src/main.c **** { - 6923 .loc 1 2934 3 view .LVU2220 - 6924 0006 04E0 b .L319 - 6925 .LVL605: - 6926 .L320: - ARM GAS /tmp/ccYgfTud.s page 497 + 7594 0028 284C ldr r4, .L395 + 7595 002a 2468 ldr r4, [r4] + 7596 002c 284D ldr r5, .L395+4 + 7597 002e 2D68 ldr r5, [r5] + 7598 0030 641B subs r4, r4, r5 +3121:Src/main.c **** } + 7599 .loc 1 3121 64 view .LVU2419 + 7600 0032 06EE904A vmov s13, r4 @ int + 7601 0036 F8EE666A vcvt.f32.u32 s13, s13 +3121:Src/main.c **** } + 7602 .loc 1 3121 62 view .LVU2420 + 7603 003a 27EE267A vmul.f32 s14, s14, s13 +3121:Src/main.c **** } + 7604 .loc 1 3121 87 view .LVU2421 + 7605 003e 9FED256A vldr.32 s12, .L395+8 + 7606 0042 C7EE066A vdiv.f32 s13, s14, s12 +3121:Src/main.c **** } + 7607 .loc 1 3121 14 view .LVU2422 + 7608 0046 77EEA67A vadd.f32 s15, s15, s13 + 7609 .LVL705: + 7610 .L385: +3123:Src/main.c **** + 7611 .loc 1 3123 2 is_stmt 1 view .LVU2423 +3123:Src/main.c **** + 7612 .loc 1 3123 17 is_stmt 0 view .LVU2424 + 7613 004a D0ED016A vldr.32 s13, [r0, #4] + 7614 .LVL706: +3125:Src/main.c **** e_integral = 32000; + 7615 .loc 1 3125 2 is_stmt 1 view .LVU2425 +3125:Src/main.c **** e_integral = 32000; + 7616 .loc 1 3125 5 is_stmt 0 view .LVU2426 + 7617 004e 9FED227A vldr.32 s14, .L395+12 + 7618 0052 F4EEC77A vcmpe.f32 s15, s14 + 7619 0056 F1EE10FA vmrs APSR_nzcv, FPSCR + 7620 005a 09DC bgt .L389 +3128:Src/main.c **** e_integral = -32000; + 7621 .loc 1 3128 7 is_stmt 1 view .LVU2427 +3128:Src/main.c **** e_integral = -32000; + 7622 .loc 1 3128 10 is_stmt 0 view .LVU2428 + 7623 005c 9FED1F7A vldr.32 s14, .L395+16 + 7624 0060 F4EEC77A vcmpe.f32 s15, s14 + 7625 0064 F1EE10FA vmrs APSR_nzcv, FPSCR + 7626 0068 04D5 bpl .L386 +3129:Src/main.c **** } + 7627 .loc 1 3129 15 view .LVU2429 + 7628 006a DFED1C7A vldr.32 s15, .L395+16 + 7629 .LVL707: +3129:Src/main.c **** } + 7630 .loc 1 3129 15 view .LVU2430 + 7631 006e 01E0 b .L386 + 7632 .LVL708: + 7633 .L389: +3126:Src/main.c **** } + 7634 .loc 1 3126 15 view .LVU2431 + 7635 0070 DFED197A vldr.32 s15, .L395+12 + 7636 .LVL709: + 7637 .L386: + ARM GAS /tmp/ccwR4KB7.s page 518 -2936:Src/main.c **** } - 6927 .loc 1 2936 3 is_stmt 1 view .LVU2221 -2936:Src/main.c **** } - 6928 .loc 1 2936 9 is_stmt 0 view .LVU2222 - 6929 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] -2936:Src/main.c **** } - 6930 .loc 1 2936 6 view .LVU2223 - 6931 000c 5040 eors r0, r0, r2 - 6932 .LVL606: -2934:Src/main.c **** { - 6933 .loc 1 2934 24 is_stmt 1 discriminator 3 view .LVU2224 - 6934 000e 0133 adds r3, r3, #1 - 6935 .LVL607: -2934:Src/main.c **** { - 6936 .loc 1 2934 24 is_stmt 0 discriminator 3 view .LVU2225 - 6937 0010 1BB2 sxth r3, r3 - 6938 .LVL608: - 6939 .L319: -2934:Src/main.c **** { - 6940 .loc 1 2934 16 is_stmt 1 discriminator 1 view .LVU2226 - 6941 0012 8B42 cmp r3, r1 - 6942 0014 F8DB blt .L320 -2938:Src/main.c **** } - 6943 .loc 1 2938 2 view .LVU2227 -2939:Src/main.c **** - 6944 .loc 1 2939 1 is_stmt 0 view .LVU2228 - 6945 0016 7047 bx lr - 6946 .cfi_endproc - 6947 .LFE1223: - 6949 .section .text.CheckChecksum,"ax",%progbits - 6950 .align 1 - 6951 .global CheckChecksum - 6952 .syntax unified - 6953 .thumb - 6954 .thumb_func - 6956 CheckChecksum: - 6957 .LVL609: - 6958 .LFB1222: -2909:Src/main.c **** uint16_t cl_ind; - 6959 .loc 1 2909 1 is_stmt 1 view -0 - 6960 .cfi_startproc - 6961 @ args = 0, pretend = 0, frame = 0 - 6962 @ frame_needed = 0, uses_anonymous_args = 0 -2909:Src/main.c **** uint16_t cl_ind; - 6963 .loc 1 2909 1 is_stmt 0 view .LVU2230 - 6964 0000 10B5 push {r4, lr} - 6965 .LCFI61: - 6966 .cfi_def_cfa_offset 8 - 6967 .cfi_offset 4, -8 - 6968 .cfi_offset 14, -4 -2910:Src/main.c **** - 6969 .loc 1 2910 3 is_stmt 1 view .LVU2231 -2912:Src/main.c **** { - 6970 .loc 1 2912 3 view .LVU2232 - 6971 0002 0E4B ldr r3, .L327 - 6972 0004 1B88 ldrh r3, [r3] - 6973 0006 41F21112 movw r2, #4369 - ARM GAS /tmp/ccYgfTud.s page 498 +3131:Src/main.c **** + 7638 .loc 1 3131 2 is_stmt 1 view .LVU2432 +3131:Src/main.c **** + 7639 .loc 1 3131 26 is_stmt 0 view .LVU2433 + 7640 0074 C1ED017A vstr.32 s15, [r1, #4] +3133:Src/main.c **** + 7641 .loc 1 3133 2 is_stmt 1 view .LVU2434 +3133:Src/main.c **** + 7642 .loc 1 3133 36 is_stmt 0 view .LVU2435 + 7643 0078 07EE103A vmov s14, r3 @ int + 7644 007c B8EEC77A vcvt.f32.s32 s14, s14 + 7645 0080 27EE267A vmul.f32 s14, s14, s13 +3133:Src/main.c **** + 7646 .loc 1 3133 19 view .LVU2436 + 7647 0084 DFED166A vldr.32 s13, .L395+20 + 7648 .LVL710: +3133:Src/main.c **** + 7649 .loc 1 3133 19 view .LVU2437 + 7650 0088 37EE267A vadd.f32 s14, s14, s13 +3133:Src/main.c **** + 7651 .loc 1 3133 46 view .LVU2438 + 7652 008c FDEEE77A vcvt.s32.f32 s15, s15 + 7653 .LVL711: +3133:Src/main.c **** + 7654 .loc 1 3133 44 view .LVU2439 + 7655 0090 F8EEE77A vcvt.f32.s32 s15, s15 + 7656 0094 77EE877A vadd.f32 s15, s15, s14 +3133:Src/main.c **** + 7657 .loc 1 3133 11 view .LVU2440 + 7658 0098 FDEEE77A vcvt.s32.f32 s15, s15 + 7659 009c 17EE900A vmov r0, s15 @ int + 7660 .LVL712: +3135:Src/main.c **** x_output = 8800; + 7661 .loc 1 3135 2 is_stmt 1 view .LVU2441 +3135:Src/main.c **** x_output = 8800; + 7662 .loc 1 3135 4 is_stmt 0 view .LVU2442 + 7663 00a0 B0F57A7F cmp r0, #1000 + 7664 00a4 06DB blt .L391 +3138:Src/main.c **** x_output = 56800; + 7665 .loc 1 3138 7 is_stmt 1 view .LVU2443 +3138:Src/main.c **** x_output = 56800; + 7666 .loc 1 3138 9 is_stmt 0 view .LVU2444 + 7667 00a6 4DF6E053 movw r3, #56800 + 7668 .LVL713: +3138:Src/main.c **** x_output = 56800; + 7669 .loc 1 3138 9 view .LVU2445 + 7670 00aa 9842 cmp r0, r3 + 7671 00ac 04DD ble .L387 +3139:Src/main.c **** } + 7672 .loc 1 3139 12 view .LVU2446 + 7673 00ae 4DF6E050 movw r0, #56800 + 7674 .LVL714: +3139:Src/main.c **** } + 7675 .loc 1 3139 12 view .LVU2447 + 7676 00b2 01E0 b .L387 + 7677 .LVL715: + 7678 .L391: + ARM GAS /tmp/ccwR4KB7.s page 519 - 6974 000a 9342 cmp r3, r2 - 6975 000c 05D0 beq .L324 - 6976 000e 47F27772 movw r2, #30583 - 6977 0012 9342 cmp r3, r2 - 6978 0014 0FD1 bne .L325 - 6979 0016 0E24 movs r4, #14 - 6980 0018 00E0 b .L322 - 6981 .L324: -2918:Src/main.c **** break; - 6982 .loc 1 2918 14 is_stmt 0 view .LVU2233 - 6983 001a 0D24 movs r4, #13 - 6984 .L322: - 6985 .LVL610: -2922:Src/main.c **** } - 6986 .loc 1 2922 5 is_stmt 1 view .LVU2234 -2925:Src/main.c **** - 6987 .loc 1 2925 3 view .LVU2235 -2925:Src/main.c **** - 6988 .loc 1 2925 15 is_stmt 0 view .LVU2236 - 6989 001c 2146 mov r1, r4 - 6990 001e FFF7FEFF bl CalculateChecksum - 6991 .LVL611: -2925:Src/main.c **** - 6992 .loc 1 2925 13 discriminator 1 view .LVU2237 - 6993 0022 074B ldr r3, .L327+4 - 6994 0024 1880 strh r0, [r3] @ movhi -2927:Src/main.c **** } - 6995 .loc 1 2927 3 is_stmt 1 view .LVU2238 -2927:Src/main.c **** } - 6996 .loc 1 2927 32 is_stmt 0 view .LVU2239 - 6997 0026 074B ldr r3, .L327+8 - 6998 0028 33F81430 ldrh r3, [r3, r4, lsl #1] -2927:Src/main.c **** } - 6999 .loc 1 2927 46 view .LVU2240 - 7000 002c 9842 cmp r0, r3 - 7001 002e 14BF ite ne - 7002 0030 0020 movne r0, #0 - 7003 0032 0120 moveq r0, #1 - 7004 .LVL612: - 7005 .L323: -2928:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) - 7006 .loc 1 2928 1 view .LVU2241 - 7007 0034 10BD pop {r4, pc} - 7008 .LVL613: - 7009 .L325: -2912:Src/main.c **** { - 7010 .loc 1 2912 3 view .LVU2242 - 7011 0036 0020 movs r0, #0 - 7012 .LVL614: -2912:Src/main.c **** { - 7013 .loc 1 2912 3 view .LVU2243 - 7014 0038 FCE7 b .L323 - 7015 .L328: - 7016 003a 00BF .align 2 - 7017 .L327: - 7018 003c 00000000 .word UART_header - 7019 0040 00000000 .word CS_result - ARM GAS /tmp/ccYgfTud.s page 499 +3136:Src/main.c **** } + 7679 .loc 1 3136 12 view .LVU2448 + 7680 00b4 42F26020 movw r0, #8800 + 7681 .LVL716: + 7682 .L387: +3142:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 7683 .loc 1 3142 2 is_stmt 1 view .LVU2449 +3142:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 7684 .loc 1 3142 5 is_stmt 0 view .LVU2450 + 7685 00b8 022A cmp r2, #2 + 7686 00ba 02D0 beq .L394 + 7687 .LVL717: + 7688 .L388: +3145:Src/main.c **** } + 7689 .loc 1 3145 2 is_stmt 1 view .LVU2451 +3146:Src/main.c **** + 7690 .loc 1 3146 1 is_stmt 0 view .LVU2452 + 7691 00bc 80B2 uxth r0, r0 + 7692 .LVL718: +3146:Src/main.c **** + 7693 .loc 1 3146 1 view .LVU2453 + 7694 00be 30BC pop {r4, r5} + 7695 .LCFI68: + 7696 .cfi_remember_state + 7697 .cfi_restore 5 + 7698 .cfi_restore 4 + 7699 .cfi_def_cfa_offset 0 + 7700 00c0 7047 bx lr + 7701 .LVL719: + 7702 .L394: + 7703 .LCFI69: + 7704 .cfi_restore_state +3143:Src/main.c **** + 7705 .loc 1 3143 3 is_stmt 1 view .LVU2454 +3143:Src/main.c **** + 7706 .loc 1 3143 11 is_stmt 0 view .LVU2455 + 7707 00c2 024B ldr r3, .L395 + 7708 00c4 1A68 ldr r2, [r3] + 7709 .LVL720: +3143:Src/main.c **** + 7710 .loc 1 3143 11 view .LVU2456 + 7711 00c6 024B ldr r3, .L395+4 + 7712 00c8 1A60 str r2, [r3] + 7713 00ca F7E7 b .L388 + 7714 .L396: + 7715 .align 2 + 7716 .L395: + 7717 00cc 00000000 .word TO7 + 7718 00d0 00000000 .word TO7_PID + 7719 00d4 0000C842 .word 1120403456 + 7720 00d8 0000FA46 .word 1190789120 + 7721 00dc 0000FAC6 .word -956694528 + 7722 00e0 00000047 .word 1191182336 + 7723 .cfi_endproc + 7724 .LFE1223: + 7726 .section .text.CalculateChecksum,"ax",%progbits + 7727 .align 1 + ARM GAS /tmp/ccwR4KB7.s page 520 - 7020 0044 00000000 .word COMMAND - 7021 .cfi_endproc - 7022 .LFE1222: - 7024 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 - 7025 .align 2 - 7026 .LC2: - 7027 0000 46494C45 .ascii "FILE1.TXT\000" - 7027 312E5458 - 7027 5400 - 7028 .section .text.SD_SAVE,"ax",%progbits - 7029 .align 1 - 7030 .global SD_SAVE - 7031 .syntax unified - 7032 .thumb - 7033 .thumb_func - 7035 SD_SAVE: - 7036 .LVL615: - 7037 .LFB1224: -2968:Src/main.c **** int test=0; - 7038 .loc 1 2968 1 is_stmt 1 view -0 - 7039 .cfi_startproc - 7040 @ args = 0, pretend = 0, frame = 0 - 7041 @ frame_needed = 0, uses_anonymous_args = 0 -2968:Src/main.c **** int test=0; - 7042 .loc 1 2968 1 is_stmt 0 view .LVU2245 - 7043 0000 10B5 push {r4, lr} - 7044 .LCFI62: - 7045 .cfi_def_cfa_offset 8 - 7046 .cfi_offset 4, -8 - 7047 .cfi_offset 14, -4 - 7048 0002 0446 mov r4, r0 -2969:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 7049 .loc 1 2969 2 is_stmt 1 view .LVU2246 - 7050 .LVL616: -2970:Src/main.c **** { - 7051 .loc 1 2970 2 view .LVU2247 -2970:Src/main.c **** { - 7052 .loc 1 2970 6 is_stmt 0 view .LVU2248 - 7053 0004 0121 movs r1, #1 - 7054 0006 0A48 ldr r0, .L336 - 7055 .LVL617: -2970:Src/main.c **** { - 7056 .loc 1 2970 6 view .LVU2249 - 7057 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 7058 .LVL618: -2970:Src/main.c **** { - 7059 .loc 1 2970 5 discriminator 1 view .LVU2250 - 7060 000c 08B1 cbz r0, .L334 -2987:Src/main.c **** } - 7061 .loc 1 2987 10 view .LVU2251 - 7062 000e 0120 movs r0, #1 - 7063 .LVL619: - 7064 .L329: -2989:Src/main.c **** - 7065 .loc 1 2989 1 view .LVU2252 - 7066 0010 10BD pop {r4, pc} - 7067 .LVL620: - ARM GAS /tmp/ccYgfTud.s page 500 + 7728 .global CalculateChecksum + 7729 .syntax unified + 7730 .thumb + 7731 .thumb_func + 7733 CalculateChecksum: + 7734 .LVL721: + 7735 .LFB1226: +3209:Src/main.c **** short i; + 7736 .loc 1 3209 1 is_stmt 1 view -0 + 7737 .cfi_startproc + 7738 @ args = 0, pretend = 0, frame = 0 + 7739 @ frame_needed = 0, uses_anonymous_args = 0 + 7740 @ link register save eliminated. +3209:Src/main.c **** short i; + 7741 .loc 1 3209 1 is_stmt 0 view .LVU2458 + 7742 0000 8446 mov ip, r0 +3210:Src/main.c **** uint16_t cs = *pbuff; + 7743 .loc 1 3210 2 is_stmt 1 view .LVU2459 +3211:Src/main.c **** + 7744 .loc 1 3211 2 view .LVU2460 +3211:Src/main.c **** + 7745 .loc 1 3211 11 is_stmt 0 view .LVU2461 + 7746 0002 0088 ldrh r0, [r0] + 7747 .LVL722: +3213:Src/main.c **** { + 7748 .loc 1 3213 3 is_stmt 1 view .LVU2462 +3213:Src/main.c **** { + 7749 .loc 1 3213 9 is_stmt 0 view .LVU2463 + 7750 0004 0123 movs r3, #1 +3213:Src/main.c **** { + 7751 .loc 1 3213 3 view .LVU2464 + 7752 0006 04E0 b .L398 + 7753 .LVL723: + 7754 .L399: +3215:Src/main.c **** } + 7755 .loc 1 3215 3 is_stmt 1 view .LVU2465 +3215:Src/main.c **** } + 7756 .loc 1 3215 9 is_stmt 0 view .LVU2466 + 7757 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] +3215:Src/main.c **** } + 7758 .loc 1 3215 6 view .LVU2467 + 7759 000c 5040 eors r0, r0, r2 + 7760 .LVL724: +3213:Src/main.c **** { + 7761 .loc 1 3213 24 is_stmt 1 discriminator 3 view .LVU2468 + 7762 000e 0133 adds r3, r3, #1 + 7763 .LVL725: +3213:Src/main.c **** { + 7764 .loc 1 3213 24 is_stmt 0 discriminator 3 view .LVU2469 + 7765 0010 1BB2 sxth r3, r3 + 7766 .LVL726: + 7767 .L398: +3213:Src/main.c **** { + 7768 .loc 1 3213 16 is_stmt 1 discriminator 1 view .LVU2470 + 7769 0012 8B42 cmp r3, r1 + 7770 0014 F8DB blt .L399 +3217:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 521 - 7068 .L334: -2972:Src/main.c **** if (test == 0) //0 - suc - 7069 .loc 1 2972 3 is_stmt 1 view .LVU2253 -2972:Src/main.c **** if (test == 0) //0 - suc - 7070 .loc 1 2972 10 is_stmt 0 view .LVU2254 - 7071 0012 0848 ldr r0, .L336+4 - 7072 0014 FFF7FEFF bl Mount_SD - 7073 .LVL621: -2973:Src/main.c **** { - 7074 .loc 1 2973 3 is_stmt 1 view .LVU2255 -2973:Src/main.c **** { - 7075 .loc 1 2973 6 is_stmt 0 view .LVU2256 - 7076 0018 08B1 cbz r0, .L335 -2982:Src/main.c **** } - 7077 .loc 1 2982 11 view .LVU2257 - 7078 001a 0120 movs r0, #1 - 7079 .LVL622: -2982:Src/main.c **** } - 7080 .loc 1 2982 11 view .LVU2258 - 7081 001c F8E7 b .L329 - 7082 .LVL623: - 7083 .L335: -2976:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 7084 .loc 1 2976 4 is_stmt 1 view .LVU2259 -2976:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 7085 .loc 1 2976 11 is_stmt 0 view .LVU2260 - 7086 001e 1E22 movs r2, #30 - 7087 0020 2146 mov r1, r4 - 7088 0022 0548 ldr r0, .L336+8 - 7089 .LVL624: -2976:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 7090 .loc 1 2976 11 view .LVU2261 - 7091 0024 FFF7FEFF bl Update_File_byte - 7092 .LVL625: -2977:Src/main.c **** return test; - 7093 .loc 1 2977 4 is_stmt 1 view .LVU2262 -2977:Src/main.c **** return test; - 7094 .loc 1 2977 11 is_stmt 0 view .LVU2263 - 7095 0028 0248 ldr r0, .L336+4 - 7096 002a FFF7FEFF bl Unmount_SD - 7097 .LVL626: -2978:Src/main.c **** } - 7098 .loc 1 2978 4 is_stmt 1 view .LVU2264 -2978:Src/main.c **** } - 7099 .loc 1 2978 11 is_stmt 0 view .LVU2265 - 7100 002e EFE7 b .L329 - 7101 .L337: - 7102 .align 2 - 7103 .L336: - 7104 0030 000C0240 .word 1073875968 - 7105 0034 00000000 .word .LC0 - 7106 0038 00000000 .word .LC2 - 7107 .cfi_endproc - 7108 .LFE1224: - 7110 .section .text.SD_READ,"ax",%progbits - 7111 .align 1 - 7112 .global SD_READ - ARM GAS /tmp/ccYgfTud.s page 501 + 7771 .loc 1 3217 2 view .LVU2471 +3218:Src/main.c **** + 7772 .loc 1 3218 1 is_stmt 0 view .LVU2472 + 7773 0016 7047 bx lr + 7774 .cfi_endproc + 7775 .LFE1226: + 7777 .section .text.CheckChecksum,"ax",%progbits + 7778 .align 1 + 7779 .global CheckChecksum + 7780 .syntax unified + 7781 .thumb + 7782 .thumb_func + 7784 CheckChecksum: + 7785 .LVL727: + 7786 .LFB1225: +3188:Src/main.c **** uint16_t cl_ind; + 7787 .loc 1 3188 1 is_stmt 1 view -0 + 7788 .cfi_startproc + 7789 @ args = 0, pretend = 0, frame = 0 + 7790 @ frame_needed = 0, uses_anonymous_args = 0 +3188:Src/main.c **** uint16_t cl_ind; + 7791 .loc 1 3188 1 is_stmt 0 view .LVU2474 + 7792 0000 10B5 push {r4, lr} + 7793 .LCFI70: + 7794 .cfi_def_cfa_offset 8 + 7795 .cfi_offset 4, -8 + 7796 .cfi_offset 14, -4 +3189:Src/main.c **** + 7797 .loc 1 3189 3 is_stmt 1 view .LVU2475 +3191:Src/main.c **** { + 7798 .loc 1 3191 3 view .LVU2476 + 7799 0002 0E4B ldr r3, .L406 + 7800 0004 1B88 ldrh r3, [r3] + 7801 0006 41F21112 movw r2, #4369 + 7802 000a 9342 cmp r3, r2 + 7803 000c 05D0 beq .L403 + 7804 000e 47F27772 movw r2, #30583 + 7805 0012 9342 cmp r3, r2 + 7806 0014 0FD1 bne .L404 + 7807 0016 0E24 movs r4, #14 + 7808 0018 00E0 b .L401 + 7809 .L403: +3197:Src/main.c **** break; + 7810 .loc 1 3197 14 is_stmt 0 view .LVU2477 + 7811 001a 0D24 movs r4, #13 + 7812 .L401: + 7813 .LVL728: +3201:Src/main.c **** } + 7814 .loc 1 3201 5 is_stmt 1 view .LVU2478 +3204:Src/main.c **** + 7815 .loc 1 3204 3 view .LVU2479 +3204:Src/main.c **** + 7816 .loc 1 3204 15 is_stmt 0 view .LVU2480 + 7817 001c 2146 mov r1, r4 + 7818 001e FFF7FEFF bl CalculateChecksum + 7819 .LVL729: +3204:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 522 - 7113 .syntax unified - 7114 .thumb - 7115 .thumb_func - 7117 SD_READ: - 7118 .LVL627: - 7119 .LFB1225: -2999:Src/main.c **** int test=0; - 7120 .loc 1 2999 1 is_stmt 1 view -0 - 7121 .cfi_startproc - 7122 @ args = 0, pretend = 0, frame = 0 - 7123 @ frame_needed = 0, uses_anonymous_args = 0 -2999:Src/main.c **** int test=0; - 7124 .loc 1 2999 1 is_stmt 0 view .LVU2267 - 7125 0000 38B5 push {r3, r4, r5, lr} - 7126 .LCFI63: - 7127 .cfi_def_cfa_offset 16 - 7128 .cfi_offset 3, -16 - 7129 .cfi_offset 4, -12 - 7130 .cfi_offset 5, -8 - 7131 .cfi_offset 14, -4 - 7132 0002 0446 mov r4, r0 -3000:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 7133 .loc 1 3000 2 is_stmt 1 view .LVU2268 - 7134 .LVL628: -3001:Src/main.c **** { - 7135 .loc 1 3001 2 view .LVU2269 -3001:Src/main.c **** { - 7136 .loc 1 3001 6 is_stmt 0 view .LVU2270 - 7137 0004 0121 movs r1, #1 - 7138 0006 0D48 ldr r0, .L345 - 7139 .LVL629: -3001:Src/main.c **** { - 7140 .loc 1 3001 6 view .LVU2271 - 7141 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 7142 .LVL630: -3001:Src/main.c **** { - 7143 .loc 1 3001 5 discriminator 1 view .LVU2272 - 7144 000c 08B1 cbz r0, .L343 -3019:Src/main.c **** } - 7145 .loc 1 3019 10 view .LVU2273 - 7146 000e 0120 movs r0, #1 - 7147 .LVL631: - 7148 .L338: -3035:Src/main.c **** - 7149 .loc 1 3035 1 view .LVU2274 - 7150 0010 38BD pop {r3, r4, r5, pc} - 7151 .LVL632: - 7152 .L343: -3003:Src/main.c **** if (test == 0) //0 - suc - 7153 .loc 1 3003 3 is_stmt 1 view .LVU2275 -3003:Src/main.c **** if (test == 0) //0 - suc - 7154 .loc 1 3003 10 is_stmt 0 view .LVU2276 - 7155 0012 0B48 ldr r0, .L345+4 - 7156 0014 FFF7FEFF bl Mount_SD - 7157 .LVL633: -3004:Src/main.c **** { - 7158 .loc 1 3004 3 is_stmt 1 view .LVU2277 - ARM GAS /tmp/ccYgfTud.s page 502 + 7820 .loc 1 3204 13 discriminator 1 view .LVU2481 + 7821 0022 074B ldr r3, .L406+4 + 7822 0024 1880 strh r0, [r3] @ movhi +3206:Src/main.c **** } + 7823 .loc 1 3206 3 is_stmt 1 view .LVU2482 +3206:Src/main.c **** } + 7824 .loc 1 3206 32 is_stmt 0 view .LVU2483 + 7825 0026 074B ldr r3, .L406+8 + 7826 0028 33F81430 ldrh r3, [r3, r4, lsl #1] +3206:Src/main.c **** } + 7827 .loc 1 3206 46 view .LVU2484 + 7828 002c 9842 cmp r0, r3 + 7829 002e 14BF ite ne + 7830 0030 0020 movne r0, #0 + 7831 0032 0120 moveq r0, #1 + 7832 .LVL730: + 7833 .L402: +3207:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) + 7834 .loc 1 3207 1 view .LVU2485 + 7835 0034 10BD pop {r4, pc} + 7836 .LVL731: + 7837 .L404: +3191:Src/main.c **** { + 7838 .loc 1 3191 3 view .LVU2486 + 7839 0036 0020 movs r0, #0 + 7840 .LVL732: +3191:Src/main.c **** { + 7841 .loc 1 3191 3 view .LVU2487 + 7842 0038 FCE7 b .L402 + 7843 .L407: + 7844 003a 00BF .align 2 + 7845 .L406: + 7846 003c 00000000 .word UART_header + 7847 0040 00000000 .word CS_result + 7848 0044 00000000 .word COMMAND + 7849 .cfi_endproc + 7850 .LFE1225: + 7852 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 + 7853 .align 2 + 7854 .LC2: + 7855 0000 46494C45 .ascii "FILE1.TXT\000" + 7855 312E5458 + 7855 5400 + 7856 .section .text.SD_SAVE,"ax",%progbits + 7857 .align 1 + 7858 .global SD_SAVE + 7859 .syntax unified + 7860 .thumb + 7861 .thumb_func + 7863 SD_SAVE: + 7864 .LVL733: + 7865 .LFB1227: +3247:Src/main.c **** int test=0; + 7866 .loc 1 3247 1 is_stmt 1 view -0 + 7867 .cfi_startproc + 7868 @ args = 0, pretend = 0, frame = 0 + 7869 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccwR4KB7.s page 523 -3004:Src/main.c **** { - 7159 .loc 1 3004 6 is_stmt 0 view .LVU2278 - 7160 0018 08B1 cbz r0, .L344 -3014:Src/main.c **** } - 7161 .loc 1 3014 11 view .LVU2279 - 7162 001a 0120 movs r0, #1 - 7163 .LVL634: -3014:Src/main.c **** } - 7164 .loc 1 3014 11 view .LVU2280 - 7165 001c F8E7 b .L338 - 7166 .LVL635: - 7167 .L344: -3007:Src/main.c **** fgoto+=DL_8; - 7168 .loc 1 3007 4 is_stmt 1 view .LVU2281 -3007:Src/main.c **** fgoto+=DL_8; - 7169 .loc 1 3007 11 is_stmt 0 view .LVU2282 - 7170 001e 094D ldr r5, .L345+8 - 7171 0020 2B68 ldr r3, [r5] - 7172 0022 1E22 movs r2, #30 - 7173 0024 2146 mov r1, r4 - 7174 0026 0848 ldr r0, .L345+12 - 7175 .LVL636: -3007:Src/main.c **** fgoto+=DL_8; - 7176 .loc 1 3007 11 view .LVU2283 - 7177 0028 FFF7FEFF bl Seek_Read_File - 7178 .LVL637: -3008:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 7179 .loc 1 3008 4 is_stmt 1 view .LVU2284 -3008:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 7180 .loc 1 3008 9 is_stmt 0 view .LVU2285 - 7181 002c 2B68 ldr r3, [r5] - 7182 002e 1E33 adds r3, r3, #30 - 7183 0030 2B60 str r3, [r5] -3009:Src/main.c **** return test; - 7184 .loc 1 3009 4 is_stmt 1 view .LVU2286 -3009:Src/main.c **** return test; - 7185 .loc 1 3009 11 is_stmt 0 view .LVU2287 - 7186 0032 0348 ldr r0, .L345+4 - 7187 0034 FFF7FEFF bl Unmount_SD - 7188 .LVL638: -3010:Src/main.c **** } - 7189 .loc 1 3010 4 is_stmt 1 view .LVU2288 -3010:Src/main.c **** } - 7190 .loc 1 3010 11 is_stmt 0 view .LVU2289 - 7191 0038 EAE7 b .L338 - 7192 .L346: - 7193 003a 00BF .align 2 - 7194 .L345: - 7195 003c 000C0240 .word 1073875968 - 7196 0040 00000000 .word .LC0 - 7197 0044 00000000 .word fgoto - 7198 0048 00000000 .word .LC2 - 7199 .cfi_endproc - 7200 .LFE1225: - 7202 .section .text.SD_REMOVE,"ax",%progbits - 7203 .align 1 - 7204 .global SD_REMOVE - ARM GAS /tmp/ccYgfTud.s page 503 +3247:Src/main.c **** int test=0; + 7870 .loc 1 3247 1 is_stmt 0 view .LVU2489 + 7871 0000 10B5 push {r4, lr} + 7872 .LCFI71: + 7873 .cfi_def_cfa_offset 8 + 7874 .cfi_offset 4, -8 + 7875 .cfi_offset 14, -4 + 7876 0002 0446 mov r4, r0 +3248:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 7877 .loc 1 3248 2 is_stmt 1 view .LVU2490 + 7878 .LVL734: +3249:Src/main.c **** { + 7879 .loc 1 3249 2 view .LVU2491 +3249:Src/main.c **** { + 7880 .loc 1 3249 6 is_stmt 0 view .LVU2492 + 7881 0004 0121 movs r1, #1 + 7882 0006 0A48 ldr r0, .L415 + 7883 .LVL735: +3249:Src/main.c **** { + 7884 .loc 1 3249 6 view .LVU2493 + 7885 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 7886 .LVL736: +3249:Src/main.c **** { + 7887 .loc 1 3249 5 discriminator 1 view .LVU2494 + 7888 000c 08B1 cbz r0, .L413 +3266:Src/main.c **** } + 7889 .loc 1 3266 10 view .LVU2495 + 7890 000e 0120 movs r0, #1 + 7891 .LVL737: + 7892 .L408: +3268:Src/main.c **** + 7893 .loc 1 3268 1 view .LVU2496 + 7894 0010 10BD pop {r4, pc} + 7895 .LVL738: + 7896 .L413: +3251:Src/main.c **** if (test == 0) //0 - suc + 7897 .loc 1 3251 3 is_stmt 1 view .LVU2497 +3251:Src/main.c **** if (test == 0) //0 - suc + 7898 .loc 1 3251 10 is_stmt 0 view .LVU2498 + 7899 0012 0848 ldr r0, .L415+4 + 7900 0014 FFF7FEFF bl Mount_SD + 7901 .LVL739: +3252:Src/main.c **** { + 7902 .loc 1 3252 3 is_stmt 1 view .LVU2499 +3252:Src/main.c **** { + 7903 .loc 1 3252 6 is_stmt 0 view .LVU2500 + 7904 0018 08B1 cbz r0, .L414 +3261:Src/main.c **** } + 7905 .loc 1 3261 11 view .LVU2501 + 7906 001a 0120 movs r0, #1 + 7907 .LVL740: +3261:Src/main.c **** } + 7908 .loc 1 3261 11 view .LVU2502 + 7909 001c F8E7 b .L408 + 7910 .LVL741: + 7911 .L414: +3255:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + ARM GAS /tmp/ccwR4KB7.s page 524 - 7205 .syntax unified - 7206 .thumb - 7207 .thumb_func - 7209 SD_REMOVE: - 7210 .LFB1226: -3038:Src/main.c **** int test=0; - 7211 .loc 1 3038 1 is_stmt 1 view -0 - 7212 .cfi_startproc - 7213 @ args = 0, pretend = 0, frame = 0 - 7214 @ frame_needed = 0, uses_anonymous_args = 0 - 7215 0000 10B5 push {r4, lr} - 7216 .LCFI64: - 7217 .cfi_def_cfa_offset 8 - 7218 .cfi_offset 4, -8 - 7219 .cfi_offset 14, -4 -3039:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 7220 .loc 1 3039 2 view .LVU2291 - 7221 .LVL639: -3040:Src/main.c **** { - 7222 .loc 1 3040 2 view .LVU2292 -3040:Src/main.c **** { - 7223 .loc 1 3040 6 is_stmt 0 view .LVU2293 - 7224 0002 0121 movs r1, #1 - 7225 0004 0B48 ldr r0, .L354 - 7226 0006 FFF7FEFF bl HAL_GPIO_ReadPin - 7227 .LVL640: -3040:Src/main.c **** { - 7228 .loc 1 3040 5 discriminator 1 view .LVU2294 - 7229 000a 08B1 cbz r0, .L352 -3058:Src/main.c **** } - 7230 .loc 1 3058 10 view .LVU2295 - 7231 000c 0120 movs r0, #1 - 7232 .LVL641: - 7233 .L347: -3060:Src/main.c **** - 7234 .loc 1 3060 1 view .LVU2296 - 7235 000e 10BD pop {r4, pc} - 7236 .LVL642: - 7237 .L352: -3042:Src/main.c **** if (test==FR_OK) - 7238 .loc 1 3042 3 is_stmt 1 view .LVU2297 -3042:Src/main.c **** if (test==FR_OK) - 7239 .loc 1 3042 10 is_stmt 0 view .LVU2298 - 7240 0010 0948 ldr r0, .L354+4 - 7241 0012 FFF7FEFF bl Mount_SD - 7242 .LVL643: -3043:Src/main.c **** { - 7243 .loc 1 3043 3 is_stmt 1 view .LVU2299 -3043:Src/main.c **** { - 7244 .loc 1 3043 6 is_stmt 0 view .LVU2300 - 7245 0016 08B1 cbz r0, .L353 -3053:Src/main.c **** } - 7246 .loc 1 3053 11 view .LVU2301 - 7247 0018 0120 movs r0, #1 - 7248 .LVL644: -3053:Src/main.c **** } - 7249 .loc 1 3053 11 view .LVU2302 - ARM GAS /tmp/ccYgfTud.s page 504 + 7912 .loc 1 3255 4 is_stmt 1 view .LVU2503 +3255:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7913 .loc 1 3255 11 is_stmt 0 view .LVU2504 + 7914 001e 1E22 movs r2, #30 + 7915 0020 2146 mov r1, r4 + 7916 0022 0548 ldr r0, .L415+8 + 7917 .LVL742: +3255:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7918 .loc 1 3255 11 view .LVU2505 + 7919 0024 FFF7FEFF bl Update_File_byte + 7920 .LVL743: +3256:Src/main.c **** return test; + 7921 .loc 1 3256 4 is_stmt 1 view .LVU2506 +3256:Src/main.c **** return test; + 7922 .loc 1 3256 11 is_stmt 0 view .LVU2507 + 7923 0028 0248 ldr r0, .L415+4 + 7924 002a FFF7FEFF bl Unmount_SD + 7925 .LVL744: +3257:Src/main.c **** } + 7926 .loc 1 3257 4 is_stmt 1 view .LVU2508 +3257:Src/main.c **** } + 7927 .loc 1 3257 11 is_stmt 0 view .LVU2509 + 7928 002e EFE7 b .L408 + 7929 .L416: + 7930 .align 2 + 7931 .L415: + 7932 0030 000C0240 .word 1073875968 + 7933 0034 00000000 .word .LC0 + 7934 0038 00000000 .word .LC2 + 7935 .cfi_endproc + 7936 .LFE1227: + 7938 .section .text.SD_READ,"ax",%progbits + 7939 .align 1 + 7940 .global SD_READ + 7941 .syntax unified + 7942 .thumb + 7943 .thumb_func + 7945 SD_READ: + 7946 .LVL745: + 7947 .LFB1228: +3278:Src/main.c **** int test=0; + 7948 .loc 1 3278 1 is_stmt 1 view -0 + 7949 .cfi_startproc + 7950 @ args = 0, pretend = 0, frame = 0 + 7951 @ frame_needed = 0, uses_anonymous_args = 0 +3278:Src/main.c **** int test=0; + 7952 .loc 1 3278 1 is_stmt 0 view .LVU2511 + 7953 0000 38B5 push {r3, r4, r5, lr} + 7954 .LCFI72: + 7955 .cfi_def_cfa_offset 16 + 7956 .cfi_offset 3, -16 + 7957 .cfi_offset 4, -12 + 7958 .cfi_offset 5, -8 + 7959 .cfi_offset 14, -4 + 7960 0002 0446 mov r4, r0 +3279:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 7961 .loc 1 3279 2 is_stmt 1 view .LVU2512 + ARM GAS /tmp/ccwR4KB7.s page 525 - 7250 001a F8E7 b .L347 - 7251 .LVL645: - 7252 .L353: -3045:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 7253 .loc 1 3045 4 is_stmt 1 view .LVU2303 -3045:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 7254 .loc 1 3045 11 is_stmt 0 view .LVU2304 - 7255 001c 074C ldr r4, .L354+8 - 7256 001e 2046 mov r0, r4 - 7257 .LVL646: -3045:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 7258 .loc 1 3045 11 view .LVU2305 - 7259 0020 FFF7FEFF bl Remove_File - 7260 .LVL647: -3046:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 7261 .loc 1 3046 4 is_stmt 1 view .LVU2306 -3046:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 7262 .loc 1 3046 11 is_stmt 0 view .LVU2307 - 7263 0024 2046 mov r0, r4 - 7264 0026 FFF7FEFF bl Create_File - 7265 .LVL648: -3048:Src/main.c **** return test; - 7266 .loc 1 3048 4 is_stmt 1 view .LVU2308 -3048:Src/main.c **** return test; - 7267 .loc 1 3048 11 is_stmt 0 view .LVU2309 - 7268 002a 0348 ldr r0, .L354+4 - 7269 002c FFF7FEFF bl Unmount_SD - 7270 .LVL649: -3049:Src/main.c **** } - 7271 .loc 1 3049 4 is_stmt 1 view .LVU2310 -3049:Src/main.c **** } - 7272 .loc 1 3049 11 is_stmt 0 view .LVU2311 - 7273 0030 EDE7 b .L347 - 7274 .L355: - 7275 0032 00BF .align 2 - 7276 .L354: - 7277 0034 000C0240 .word 1073875968 - 7278 0038 00000000 .word .LC0 - 7279 003c 00000000 .word .LC2 - 7280 .cfi_endproc - 7281 .LFE1226: - 7283 .section .text.USART_TX,"ax",%progbits - 7284 .align 1 - 7285 .global USART_TX - 7286 .syntax unified - 7287 .thumb - 7288 .thumb_func - 7290 USART_TX: - 7291 .LVL650: - 7292 .LFB1227: -3064:Src/main.c **** uint16_t ind = 0; - 7293 .loc 1 3064 1 is_stmt 1 view -0 - 7294 .cfi_startproc - 7295 @ args = 0, pretend = 0, frame = 0 - 7296 @ frame_needed = 0, uses_anonymous_args = 0 - 7297 @ link register save eliminated. -3064:Src/main.c **** uint16_t ind = 0; - ARM GAS /tmp/ccYgfTud.s page 505 + 7962 .LVL746: +3280:Src/main.c **** { + 7963 .loc 1 3280 2 view .LVU2513 +3280:Src/main.c **** { + 7964 .loc 1 3280 6 is_stmt 0 view .LVU2514 + 7965 0004 0121 movs r1, #1 + 7966 0006 0D48 ldr r0, .L424 + 7967 .LVL747: +3280:Src/main.c **** { + 7968 .loc 1 3280 6 view .LVU2515 + 7969 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 7970 .LVL748: +3280:Src/main.c **** { + 7971 .loc 1 3280 5 discriminator 1 view .LVU2516 + 7972 000c 08B1 cbz r0, .L422 +3298:Src/main.c **** } + 7973 .loc 1 3298 10 view .LVU2517 + 7974 000e 0120 movs r0, #1 + 7975 .LVL749: + 7976 .L417: +3314:Src/main.c **** + 7977 .loc 1 3314 1 view .LVU2518 + 7978 0010 38BD pop {r3, r4, r5, pc} + 7979 .LVL750: + 7980 .L422: +3282:Src/main.c **** if (test == 0) //0 - suc + 7981 .loc 1 3282 3 is_stmt 1 view .LVU2519 +3282:Src/main.c **** if (test == 0) //0 - suc + 7982 .loc 1 3282 10 is_stmt 0 view .LVU2520 + 7983 0012 0B48 ldr r0, .L424+4 + 7984 0014 FFF7FEFF bl Mount_SD + 7985 .LVL751: +3283:Src/main.c **** { + 7986 .loc 1 3283 3 is_stmt 1 view .LVU2521 +3283:Src/main.c **** { + 7987 .loc 1 3283 6 is_stmt 0 view .LVU2522 + 7988 0018 08B1 cbz r0, .L423 +3293:Src/main.c **** } + 7989 .loc 1 3293 11 view .LVU2523 + 7990 001a 0120 movs r0, #1 + 7991 .LVL752: +3293:Src/main.c **** } + 7992 .loc 1 3293 11 view .LVU2524 + 7993 001c F8E7 b .L417 + 7994 .LVL753: + 7995 .L423: +3286:Src/main.c **** fgoto+=DL_8; + 7996 .loc 1 3286 4 is_stmt 1 view .LVU2525 +3286:Src/main.c **** fgoto+=DL_8; + 7997 .loc 1 3286 11 is_stmt 0 view .LVU2526 + 7998 001e 094D ldr r5, .L424+8 + 7999 0020 2B68 ldr r3, [r5] + 8000 0022 1E22 movs r2, #30 + 8001 0024 2146 mov r1, r4 + 8002 0026 0848 ldr r0, .L424+12 + 8003 .LVL754: +3286:Src/main.c **** fgoto+=DL_8; + ARM GAS /tmp/ccwR4KB7.s page 526 - 7298 .loc 1 3064 1 is_stmt 0 view .LVU2313 - 7299 0000 8C46 mov ip, r1 -3065:Src/main.c **** while (indRDR); 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccwR4KB7.s page 531 + + 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return data_reg_addr; 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -30418,9 +31835,6 @@ ARM GAS /tmp/ccYgfTud.s page 1 3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccYgfTud.s page 508 - - 3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) 3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll TDR TDR LL_USART_TransmitData8 3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -30428,6145 +31842,6305 @@ ARM GAS /tmp/ccYgfTud.s page 1 3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value) - 7339 .loc 7 3681 22 view .LVU2328 - 7340 .LBB577: + 8167 .loc 7 3681 22 view .LVU2572 + 8168 .LBB593: 3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USARTx->TDR = Value; - 7341 .loc 7 3683 3 view .LVU2329 - 7342 .loc 7 3683 15 is_stmt 0 view .LVU2330 - 7343 0018 034B ldr r3, .L361 - 7344 001a 9962 str r1, [r3, #40] - 7345 .LVL656: - 7346 .loc 7 3683 15 view .LVU2331 - 7347 .LBE577: - 7348 .LBE576: -3070:Src/main.c **** } - 7349 .loc 1 3070 5 is_stmt 1 view .LVU2332 -3070:Src/main.c **** } - 7350 .loc 1 3070 8 is_stmt 0 view .LVU2333 - 7351 001c 0132 adds r2, r2, #1 - 7352 .LVL657: -3070:Src/main.c **** } - 7353 .loc 1 3070 8 view .LVU2334 - 7354 001e 92B2 uxth r2, r2 - 7355 .LVL658: - 7356 .L357: -3066:Src/main.c **** { - 7357 .loc 1 3066 13 is_stmt 1 view .LVU2335 - 7358 0020 6245 cmp r2, ip - 7359 0022 F1D3 bcc .L359 -3072:Src/main.c **** - 7360 .loc 1 3072 1 is_stmt 0 view .LVU2336 - 7361 0024 7047 bx lr - 7362 .L362: - 7363 0026 00BF .align 2 - 7364 .L361: - 7365 0028 00100140 .word 1073811456 - 7366 .cfi_endproc - 7367 .LFE1227: - 7369 .section .text.USART_TX_DMA,"ax",%progbits - 7370 .align 1 - 7371 .global USART_TX_DMA - 7372 .syntax unified - 7373 .thumb - 7374 .thumb_func - 7376 USART_TX_DMA: - 7377 .LFB1228: -3075:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter - 7378 .loc 1 3075 1 is_stmt 1 view -0 - 7379 .cfi_startproc - 7380 @ args = 0, pretend = 0, frame = 0 - 7381 @ frame_needed = 0, uses_anonymous_args = 0 - 7382 @ link register save eliminated. - ARM GAS /tmp/ccYgfTud.s page 509 + 8169 .loc 7 3683 3 view .LVU2573 + 8170 .loc 7 3683 15 is_stmt 0 view .LVU2574 + 8171 0018 034B ldr r3, .L440 + 8172 001a 9962 str r1, [r3, #40] + 8173 .LVL774: + 8174 .loc 7 3683 15 view .LVU2575 + 8175 .LBE593: + 8176 .LBE592: +3349:Src/main.c **** } + 8177 .loc 1 3349 5 is_stmt 1 view .LVU2576 +3349:Src/main.c **** } + 8178 .loc 1 3349 8 is_stmt 0 view .LVU2577 + ARM GAS /tmp/ccwR4KB7.s page 532 - 7383 .LVL659: - 7384 .L364: -3076:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 7385 .loc 1 3076 20 discriminator 1 view .LVU2338 -3076:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 7386 .loc 1 3076 9 discriminator 1 view .LVU2339 - 7387 0000 0D4B ldr r3, .L365 - 7388 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 7389 0004 002B cmp r3, #0 - 7390 0006 FBD1 bne .L364 -3077:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); - 7391 .loc 1 3077 2 view .LVU2340 - 7392 .LVL660: - 7393 .LBB578: - 7394 .LBI578: + 8179 001c 0132 adds r2, r2, #1 + 8180 .LVL775: +3349:Src/main.c **** } + 8181 .loc 1 3349 8 view .LVU2578 + 8182 001e 92B2 uxth r2, r2 + 8183 .LVL776: + 8184 .L436: +3345:Src/main.c **** { + 8185 .loc 1 3345 13 is_stmt 1 view .LVU2579 + 8186 0020 6245 cmp r2, ip + 8187 0022 F1D3 bcc .L438 +3351:Src/main.c **** + 8188 .loc 1 3351 1 is_stmt 0 view .LVU2580 + 8189 0024 7047 bx lr + 8190 .L441: + 8191 0026 00BF .align 2 + 8192 .L440: + 8193 0028 00100140 .word 1073811456 + 8194 .cfi_endproc + 8195 .LFE1230: + 8197 .section .text.USART_TX_DMA,"ax",%progbits + 8198 .align 1 + 8199 .global USART_TX_DMA + 8200 .syntax unified + 8201 .thumb + 8202 .thumb_func + 8204 USART_TX_DMA: + 8205 .LFB1231: +3354:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter + 8206 .loc 1 3354 1 is_stmt 1 view -0 + 8207 .cfi_startproc + 8208 @ args = 0, pretend = 0, frame = 0 + 8209 @ frame_needed = 0, uses_anonymous_args = 0 + 8210 @ link register save eliminated. + 8211 .LVL777: + 8212 .L443: +3355:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 8213 .loc 1 3355 20 discriminator 1 view .LVU2582 +3355:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 8214 .loc 1 3355 9 discriminator 1 view .LVU2583 + 8215 0000 0D4B ldr r3, .L444 + 8216 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 8217 0004 002B cmp r3, #0 + 8218 0006 FBD1 bne .L443 +3356:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); + 8219 .loc 1 3356 2 view .LVU2584 + 8220 .LVL778: + 8221 .LBB594: + 8222 .LBI594: 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 7395 .loc 6 517 22 view .LVU2341 - 7396 .LBB579: + 8223 .loc 6 517 22 view .LVU2585 + 8224 .LBB595: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7397 .loc 6 519 3 view .LVU2342 - 7398 0008 0C4B ldr r3, .L365+4 - 7399 000a D3F8B820 ldr r2, [r3, #184] - 7400 000e 22F00102 bic r2, r2, #1 - 7401 0012 C3F8B820 str r2, [r3, #184] - 7402 .LVL661: + 8225 .loc 6 519 3 view .LVU2586 + 8226 0008 0C4B ldr r3, .L444+4 + 8227 000a D3F8B820 ldr r2, [r3, #184] + 8228 000e 22F00102 bic r2, r2, #1 + ARM GAS /tmp/ccwR4KB7.s page 533 + + + 8229 0012 C3F8B820 str r2, [r3, #184] + 8230 .LVL779: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7403 .loc 6 519 3 is_stmt 0 view .LVU2343 - 7404 .LBE579: - 7405 .LBE578: -3078:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); - 7406 .loc 1 3078 3 is_stmt 1 view .LVU2344 - 7407 .LBB580: - 7408 .LBI580: + 8231 .loc 6 519 3 is_stmt 0 view .LVU2587 + 8232 .LBE595: + 8233 .LBE594: +3357:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); + 8234 .loc 1 3357 3 is_stmt 1 view .LVU2588 + 8235 .LBB596: + 8236 .LBI596: 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 7409 .loc 6 971 22 view .LVU2345 - 7410 .LBB581: + 8237 .loc 6 971 22 view .LVU2589 + 8238 .LBB597: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7411 .loc 6 973 3 view .LVU2346 - 7412 0016 D3F8BC20 ldr r2, [r3, #188] - 7413 001a 6FF30F02 bfc r2, #0, #16 - 7414 001e 1043 orrs r0, r0, r2 - 7415 .LVL662: + 8239 .loc 6 973 3 view .LVU2590 + 8240 0016 D3F8BC20 ldr r2, [r3, #188] + 8241 001a 6FF30F02 bfc r2, #0, #16 + 8242 001e 1043 orrs r0, r0, r2 + 8243 .LVL780: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7416 .loc 6 973 3 is_stmt 0 view .LVU2347 - 7417 0020 C3F8BC00 str r0, [r3, #188] - 7418 .LVL663: + 8244 .loc 6 973 3 is_stmt 0 view .LVU2591 + 8245 0020 C3F8BC00 str r0, [r3, #188] + 8246 .LVL781: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7419 .loc 6 973 3 view .LVU2348 - 7420 .LBE581: - 7421 .LBE580: -3079:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin - 7422 .loc 1 3079 3 is_stmt 1 view .LVU2349 - 7423 .LBB582: - 7424 .LBI582: + 8247 .loc 6 973 3 view .LVU2592 + 8248 .LBE597: + 8249 .LBE596: +3358:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin + 8250 .loc 1 3358 3 is_stmt 1 view .LVU2593 + 8251 .LBB598: + 8252 .LBI598: 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 7425 .loc 6 497 22 view .LVU2350 - 7426 .LBB583: - ARM GAS /tmp/ccYgfTud.s page 510 - - + 8253 .loc 6 497 22 view .LVU2594 + 8254 .LBB599: 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7427 .loc 6 499 3 view .LVU2351 - 7428 0024 D3F8B820 ldr r2, [r3, #184] - 7429 0028 42F00102 orr r2, r2, #1 - 7430 002c C3F8B820 str r2, [r3, #184] - 7431 .LVL664: + 8255 .loc 6 499 3 view .LVU2595 + 8256 0024 D3F8B820 ldr r2, [r3, #184] + 8257 0028 42F00102 orr r2, r2, #1 + 8258 002c C3F8B820 str r2, [r3, #184] + 8259 .LVL782: 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7432 .loc 6 499 3 is_stmt 0 view .LVU2352 - 7433 .LBE583: - 7434 .LBE582: -3080:Src/main.c **** } - 7435 .loc 1 3080 2 is_stmt 1 view .LVU2353 -3080:Src/main.c **** } - 7436 .loc 1 3080 11 is_stmt 0 view .LVU2354 - 7437 0030 014B ldr r3, .L365 - 7438 0032 0122 movs r2, #1 - 7439 0034 1A70 strb r2, [r3] -3081:Src/main.c **** - 7440 .loc 1 3081 1 view .LVU2355 - 7441 0036 7047 bx lr - 7442 .L366: - 7443 .align 2 - 7444 .L365: - 7445 0038 00000000 .word u_tx_flg - 7446 003c 00640240 .word 1073898496 - 7447 .cfi_endproc - 7448 .LFE1228: - 7450 .section .text.Error_Handler,"ax",%progbits - 7451 .align 1 - 7452 .global Error_Handler - 7453 .syntax unified - 7454 .thumb - 7455 .thumb_func - 7457 Error_Handler: - 7458 .LFB1230: -3089:Src/main.c **** //------------------------------------------------------- -3090:Src/main.c **** /* USER CODE END 4 */ -3091:Src/main.c **** -3092:Src/main.c **** /** -3093:Src/main.c **** * @brief This function is executed in case of error occurrence. -3094:Src/main.c **** * @retval None -3095:Src/main.c **** */ -3096:Src/main.c **** void Error_Handler(void) -3097:Src/main.c **** { - 7459 .loc 1 3097 1 is_stmt 1 view -0 - 7460 .cfi_startproc - 7461 @ Volatile: function does not return. - 7462 @ args = 0, pretend = 0, frame = 0 - 7463 @ frame_needed = 0, uses_anonymous_args = 0 - 7464 @ link register save eliminated. -3098:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ -3099:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ -3100:Src/main.c **** __disable_irq(); - 7465 .loc 1 3100 3 view .LVU2357 - 7466 .LBB584: - 7467 .LBI584: - 140:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccYgfTud.s page 511 + 8260 .loc 6 499 3 is_stmt 0 view .LVU2596 + 8261 .LBE599: + 8262 .LBE598: +3359:Src/main.c **** } + 8263 .loc 1 3359 2 is_stmt 1 view .LVU2597 +3359:Src/main.c **** } + 8264 .loc 1 3359 11 is_stmt 0 view .LVU2598 + 8265 0030 014B ldr r3, .L444 + 8266 0032 0122 movs r2, #1 + 8267 0034 1A70 strb r2, [r3] +3360:Src/main.c **** + 8268 .loc 1 3360 1 view .LVU2599 + 8269 0036 7047 bx lr + 8270 .L445: + 8271 .align 2 + 8272 .L444: + ARM GAS /tmp/ccwR4KB7.s page 534 - 7468 .loc 8 140 27 view .LVU2358 - 7469 .LBB585: - 142:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 7470 .loc 8 142 3 view .LVU2359 - 7471 .syntax unified - 7472 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 7473 0000 72B6 cpsid i - 7474 @ 0 "" 2 - 7475 .thumb - 7476 .syntax unified - 7477 .L368: - 7478 .LBE585: - 7479 .LBE584: -3101:Src/main.c **** while (1) - 7480 .loc 1 3101 3 view .LVU2360 -3102:Src/main.c **** { -3103:Src/main.c **** } - 7481 .loc 1 3103 3 view .LVU2361 -3101:Src/main.c **** while (1) - 7482 .loc 1 3101 9 view .LVU2362 - 7483 0002 FEE7 b .L368 - 7484 .cfi_endproc - 7485 .LFE1230: - 7487 .section .text.MX_ADC1_Init,"ax",%progbits - 7488 .align 1 - 7489 .syntax unified - 7490 .thumb - 7491 .thumb_func - 7493 MX_ADC1_Init: - 7494 .LFB1188: - 939:Src/main.c **** - 7495 .loc 1 939 1 view -0 - 7496 .cfi_startproc - 7497 @ args = 0, pretend = 0, frame = 16 - 7498 @ frame_needed = 0, uses_anonymous_args = 0 - 7499 0000 00B5 push {lr} - 7500 .LCFI65: - 7501 .cfi_def_cfa_offset 4 - 7502 .cfi_offset 14, -4 - 7503 0002 85B0 sub sp, sp, #20 - 7504 .LCFI66: - 7505 .cfi_def_cfa_offset 24 - 945:Src/main.c **** - 7506 .loc 1 945 3 view .LVU2364 - 945:Src/main.c **** - 7507 .loc 1 945 26 is_stmt 0 view .LVU2365 - 7508 0004 0023 movs r3, #0 - 7509 0006 0093 str r3, [sp] - 7510 0008 0193 str r3, [sp, #4] - 7511 000a 0293 str r3, [sp, #8] - 7512 000c 0393 str r3, [sp, #12] - 953:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 7513 .loc 1 953 3 is_stmt 1 view .LVU2366 - 953:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 7514 .loc 1 953 18 is_stmt 0 view .LVU2367 - 7515 000e 2B48 ldr r0, .L383 - 7516 0010 2B4A ldr r2, .L383+4 - ARM GAS /tmp/ccYgfTud.s page 512 - - - 7517 0012 0260 str r2, [r0] - 954:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 7518 .loc 1 954 3 is_stmt 1 view .LVU2368 - 954:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 7519 .loc 1 954 29 is_stmt 0 view .LVU2369 - 7520 0014 4FF44032 mov r2, #196608 - 7521 0018 4260 str r2, [r0, #4] - 955:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 7522 .loc 1 955 3 is_stmt 1 view .LVU2370 - 955:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 7523 .loc 1 955 25 is_stmt 0 view .LVU2371 - 7524 001a 8360 str r3, [r0, #8] - 956:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 7525 .loc 1 956 3 is_stmt 1 view .LVU2372 - 956:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 7526 .loc 1 956 27 is_stmt 0 view .LVU2373 - 7527 001c 0122 movs r2, #1 - 7528 001e 0261 str r2, [r0, #16] - 957:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 7529 .loc 1 957 3 is_stmt 1 view .LVU2374 - 957:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 7530 .loc 1 957 33 is_stmt 0 view .LVU2375 - 7531 0020 8361 str r3, [r0, #24] - 958:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 7532 .loc 1 958 3 is_stmt 1 view .LVU2376 - 958:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 7533 .loc 1 958 36 is_stmt 0 view .LVU2377 - 7534 0022 80F82030 strb r3, [r0, #32] - 959:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 7535 .loc 1 959 3 is_stmt 1 view .LVU2378 - 959:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 7536 .loc 1 959 35 is_stmt 0 view .LVU2379 - 7537 0026 C362 str r3, [r0, #44] - 960:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 7538 .loc 1 960 3 is_stmt 1 view .LVU2380 - 960:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 7539 .loc 1 960 31 is_stmt 0 view .LVU2381 - 7540 0028 2649 ldr r1, .L383+8 - 7541 002a 8162 str r1, [r0, #40] - 961:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 7542 .loc 1 961 3 is_stmt 1 view .LVU2382 - 961:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 7543 .loc 1 961 24 is_stmt 0 view .LVU2383 - 7544 002c C360 str r3, [r0, #12] - 962:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 7545 .loc 1 962 3 is_stmt 1 view .LVU2384 - 962:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 7546 .loc 1 962 30 is_stmt 0 view .LVU2385 - 7547 002e 0521 movs r1, #5 - 7548 0030 C161 str r1, [r0, #28] - 963:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 7549 .loc 1 963 3 is_stmt 1 view .LVU2386 - 963:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 7550 .loc 1 963 36 is_stmt 0 view .LVU2387 - 7551 0032 80F83030 strb r3, [r0, #48] - 964:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 7552 .loc 1 964 3 is_stmt 1 view .LVU2388 - ARM GAS /tmp/ccYgfTud.s page 513 - - - 964:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 7553 .loc 1 964 27 is_stmt 0 view .LVU2389 - 7554 0036 4261 str r2, [r0, #20] - 965:Src/main.c **** { - 7555 .loc 1 965 3 is_stmt 1 view .LVU2390 - 965:Src/main.c **** { - 7556 .loc 1 965 7 is_stmt 0 view .LVU2391 - 7557 0038 FFF7FEFF bl HAL_ADC_Init - 7558 .LVL665: - 965:Src/main.c **** { - 7559 .loc 1 965 6 discriminator 1 view .LVU2392 - 7560 003c 0028 cmp r0, #0 - 7561 003e 31D1 bne .L377 - 972:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 7562 .loc 1 972 3 is_stmt 1 view .LVU2393 - 972:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 7563 .loc 1 972 19 is_stmt 0 view .LVU2394 - 7564 0040 0923 movs r3, #9 - 7565 0042 0093 str r3, [sp] - 973:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 7566 .loc 1 973 3 is_stmt 1 view .LVU2395 - 973:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 7567 .loc 1 973 16 is_stmt 0 view .LVU2396 - 7568 0044 0123 movs r3, #1 - 7569 0046 0193 str r3, [sp, #4] - 974:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7570 .loc 1 974 3 is_stmt 1 view .LVU2397 - 974:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7571 .loc 1 974 24 is_stmt 0 view .LVU2398 - 7572 0048 0723 movs r3, #7 - 7573 004a 0293 str r3, [sp, #8] - 975:Src/main.c **** { - 7574 .loc 1 975 3 is_stmt 1 view .LVU2399 - 975:Src/main.c **** { - 7575 .loc 1 975 7 is_stmt 0 view .LVU2400 - 7576 004c 6946 mov r1, sp - 7577 004e 1B48 ldr r0, .L383 - 7578 0050 FFF7FEFF bl HAL_ADC_ConfigChannel - 7579 .LVL666: - 975:Src/main.c **** { - 7580 .loc 1 975 6 discriminator 1 view .LVU2401 - 7581 0054 40BB cbnz r0, .L378 - 982:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 7582 .loc 1 982 3 is_stmt 1 view .LVU2402 - 982:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 7583 .loc 1 982 19 is_stmt 0 view .LVU2403 - 7584 0056 0823 movs r3, #8 - 7585 0058 0093 str r3, [sp] - 983:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7586 .loc 1 983 3 is_stmt 1 view .LVU2404 - 983:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7587 .loc 1 983 16 is_stmt 0 view .LVU2405 - 7588 005a 0223 movs r3, #2 - 7589 005c 0193 str r3, [sp, #4] - 984:Src/main.c **** { - 7590 .loc 1 984 3 is_stmt 1 view .LVU2406 - 984:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 514 - - - 7591 .loc 1 984 7 is_stmt 0 view .LVU2407 - 7592 005e 6946 mov r1, sp - 7593 0060 1648 ldr r0, .L383 - 7594 0062 FFF7FEFF bl HAL_ADC_ConfigChannel - 7595 .LVL667: - 984:Src/main.c **** { - 7596 .loc 1 984 6 discriminator 1 view .LVU2408 - 7597 0066 08BB cbnz r0, .L379 - 991:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 7598 .loc 1 991 3 is_stmt 1 view .LVU2409 - 991:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 7599 .loc 1 991 19 is_stmt 0 view .LVU2410 - 7600 0068 0223 movs r3, #2 - 7601 006a 0093 str r3, [sp] - 992:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7602 .loc 1 992 3 is_stmt 1 view .LVU2411 - 992:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7603 .loc 1 992 16 is_stmt 0 view .LVU2412 - 7604 006c 0323 movs r3, #3 - 7605 006e 0193 str r3, [sp, #4] - 993:Src/main.c **** { - 7606 .loc 1 993 3 is_stmt 1 view .LVU2413 - 993:Src/main.c **** { - 7607 .loc 1 993 7 is_stmt 0 view .LVU2414 - 7608 0070 6946 mov r1, sp - 7609 0072 1248 ldr r0, .L383 - 7610 0074 FFF7FEFF bl HAL_ADC_ConfigChannel - 7611 .LVL668: - 993:Src/main.c **** { - 7612 .loc 1 993 6 discriminator 1 view .LVU2415 - 7613 0078 D0B9 cbnz r0, .L380 -1000:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 7614 .loc 1 1000 3 is_stmt 1 view .LVU2416 -1000:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 7615 .loc 1 1000 19 is_stmt 0 view .LVU2417 - 7616 007a 0A23 movs r3, #10 - 7617 007c 0093 str r3, [sp] -1001:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7618 .loc 1 1001 3 is_stmt 1 view .LVU2418 -1001:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7619 .loc 1 1001 16 is_stmt 0 view .LVU2419 - 7620 007e 0423 movs r3, #4 - 7621 0080 0193 str r3, [sp, #4] -1002:Src/main.c **** { - 7622 .loc 1 1002 3 is_stmt 1 view .LVU2420 -1002:Src/main.c **** { - 7623 .loc 1 1002 7 is_stmt 0 view .LVU2421 - 7624 0082 6946 mov r1, sp - 7625 0084 0D48 ldr r0, .L383 - 7626 0086 FFF7FEFF bl HAL_ADC_ConfigChannel - 7627 .LVL669: -1002:Src/main.c **** { - 7628 .loc 1 1002 6 discriminator 1 view .LVU2422 - 7629 008a 98B9 cbnz r0, .L381 -1009:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 7630 .loc 1 1009 3 is_stmt 1 view .LVU2423 -1009:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - ARM GAS /tmp/ccYgfTud.s page 515 - - - 7631 .loc 1 1009 19 is_stmt 0 view .LVU2424 - 7632 008c 0B23 movs r3, #11 - 7633 008e 0093 str r3, [sp] -1010:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7634 .loc 1 1010 3 is_stmt 1 view .LVU2425 -1010:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 7635 .loc 1 1010 16 is_stmt 0 view .LVU2426 - 7636 0090 0523 movs r3, #5 - 7637 0092 0193 str r3, [sp, #4] -1011:Src/main.c **** { - 7638 .loc 1 1011 3 is_stmt 1 view .LVU2427 -1011:Src/main.c **** { - 7639 .loc 1 1011 7 is_stmt 0 view .LVU2428 - 7640 0094 6946 mov r1, sp - 7641 0096 0948 ldr r0, .L383 - 7642 0098 FFF7FEFF bl HAL_ADC_ConfigChannel - 7643 .LVL670: -1011:Src/main.c **** { - 7644 .loc 1 1011 6 discriminator 1 view .LVU2429 - 7645 009c 60B9 cbnz r0, .L382 -1019:Src/main.c **** - 7646 .loc 1 1019 1 view .LVU2430 - 7647 009e 05B0 add sp, sp, #20 - 7648 .LCFI67: - 7649 .cfi_remember_state - 7650 .cfi_def_cfa_offset 4 - 7651 @ sp needed - 7652 00a0 5DF804FB ldr pc, [sp], #4 - 7653 .L377: - 7654 .LCFI68: - 7655 .cfi_restore_state - 967:Src/main.c **** } - 7656 .loc 1 967 5 is_stmt 1 view .LVU2431 - 7657 00a4 FFF7FEFF bl Error_Handler - 7658 .LVL671: - 7659 .L378: - 977:Src/main.c **** } - 7660 .loc 1 977 5 view .LVU2432 - 7661 00a8 FFF7FEFF bl Error_Handler - 7662 .LVL672: - 7663 .L379: - 986:Src/main.c **** } - 7664 .loc 1 986 5 view .LVU2433 - 7665 00ac FFF7FEFF bl Error_Handler - 7666 .LVL673: - 7667 .L380: - 995:Src/main.c **** } - 7668 .loc 1 995 5 view .LVU2434 - 7669 00b0 FFF7FEFF bl Error_Handler - 7670 .LVL674: - 7671 .L381: -1004:Src/main.c **** } - 7672 .loc 1 1004 5 view .LVU2435 - 7673 00b4 FFF7FEFF bl Error_Handler - 7674 .LVL675: - 7675 .L382: -1013:Src/main.c **** } - ARM GAS /tmp/ccYgfTud.s page 516 - - - 7676 .loc 1 1013 5 view .LVU2436 - 7677 00b8 FFF7FEFF bl Error_Handler - 7678 .LVL676: - 7679 .L384: - 7680 .align 2 - 7681 .L383: - 7682 00bc 00000000 .word hadc1 - 7683 00c0 00200140 .word 1073815552 - 7684 00c4 0100000F .word 251658241 - 7685 .cfi_endproc - 7686 .LFE1188: - 7688 .section .text.MX_ADC3_Init,"ax",%progbits - 7689 .align 1 - 7690 .syntax unified - 7691 .thumb - 7692 .thumb_func - 7694 MX_ADC3_Init: - 7695 .LFB1189: -1027:Src/main.c **** - 7696 .loc 1 1027 1 view -0 - 7697 .cfi_startproc - 7698 @ args = 0, pretend = 0, frame = 16 - 7699 @ frame_needed = 0, uses_anonymous_args = 0 - 7700 0000 00B5 push {lr} - 7701 .LCFI69: - 7702 .cfi_def_cfa_offset 4 - 7703 .cfi_offset 14, -4 - 7704 0002 85B0 sub sp, sp, #20 - 7705 .LCFI70: - 7706 .cfi_def_cfa_offset 24 -1033:Src/main.c **** - 7707 .loc 1 1033 3 view .LVU2438 -1033:Src/main.c **** - 7708 .loc 1 1033 26 is_stmt 0 view .LVU2439 - 7709 0004 0023 movs r3, #0 - 7710 0006 0093 str r3, [sp] - 7711 0008 0193 str r3, [sp, #4] - 7712 000a 0293 str r3, [sp, #8] - 7713 000c 0393 str r3, [sp, #12] -1041:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 7714 .loc 1 1041 3 is_stmt 1 view .LVU2440 -1041:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 7715 .loc 1 1041 18 is_stmt 0 view .LVU2441 - 7716 000e 1448 ldr r0, .L391 - 7717 0010 144A ldr r2, .L391+4 - 7718 0012 0260 str r2, [r0] -1042:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 7719 .loc 1 1042 3 is_stmt 1 view .LVU2442 -1042:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 7720 .loc 1 1042 29 is_stmt 0 view .LVU2443 - 7721 0014 4FF44032 mov r2, #196608 - 7722 0018 4260 str r2, [r0, #4] -1043:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 7723 .loc 1 1043 3 is_stmt 1 view .LVU2444 -1043:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 7724 .loc 1 1043 25 is_stmt 0 view .LVU2445 - 7725 001a 8360 str r3, [r0, #8] - ARM GAS /tmp/ccYgfTud.s page 517 - - -1044:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 7726 .loc 1 1044 3 is_stmt 1 view .LVU2446 -1044:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 7727 .loc 1 1044 27 is_stmt 0 view .LVU2447 - 7728 001c 0361 str r3, [r0, #16] -1045:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 7729 .loc 1 1045 3 is_stmt 1 view .LVU2448 -1045:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 7730 .loc 1 1045 33 is_stmt 0 view .LVU2449 - 7731 001e 8361 str r3, [r0, #24] -1046:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 7732 .loc 1 1046 3 is_stmt 1 view .LVU2450 -1046:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 7733 .loc 1 1046 36 is_stmt 0 view .LVU2451 - 7734 0020 80F82030 strb r3, [r0, #32] -1047:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 7735 .loc 1 1047 3 is_stmt 1 view .LVU2452 -1047:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 7736 .loc 1 1047 35 is_stmt 0 view .LVU2453 - 7737 0024 C362 str r3, [r0, #44] -1048:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 7738 .loc 1 1048 3 is_stmt 1 view .LVU2454 -1048:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 7739 .loc 1 1048 31 is_stmt 0 view .LVU2455 - 7740 0026 104A ldr r2, .L391+8 - 7741 0028 8262 str r2, [r0, #40] -1049:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 7742 .loc 1 1049 3 is_stmt 1 view .LVU2456 -1049:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 7743 .loc 1 1049 24 is_stmt 0 view .LVU2457 - 7744 002a C360 str r3, [r0, #12] -1050:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 7745 .loc 1 1050 3 is_stmt 1 view .LVU2458 -1050:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 7746 .loc 1 1050 30 is_stmt 0 view .LVU2459 - 7747 002c 0122 movs r2, #1 - 7748 002e C261 str r2, [r0, #28] -1051:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 7749 .loc 1 1051 3 is_stmt 1 view .LVU2460 -1051:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 7750 .loc 1 1051 36 is_stmt 0 view .LVU2461 - 7751 0030 80F83030 strb r3, [r0, #48] -1052:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 7752 .loc 1 1052 3 is_stmt 1 view .LVU2462 -1052:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 7753 .loc 1 1052 27 is_stmt 0 view .LVU2463 - 7754 0034 4261 str r2, [r0, #20] -1053:Src/main.c **** { - 7755 .loc 1 1053 3 is_stmt 1 view .LVU2464 -1053:Src/main.c **** { - 7756 .loc 1 1053 7 is_stmt 0 view .LVU2465 - 7757 0036 FFF7FEFF bl HAL_ADC_Init - 7758 .LVL677: -1053:Src/main.c **** { - 7759 .loc 1 1053 6 discriminator 1 view .LVU2466 - 7760 003a 68B9 cbnz r0, .L389 -1060:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - ARM GAS /tmp/ccYgfTud.s page 518 - - - 7761 .loc 1 1060 3 is_stmt 1 view .LVU2467 -1060:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 7762 .loc 1 1060 19 is_stmt 0 view .LVU2468 - 7763 003c 0F23 movs r3, #15 - 7764 003e 0093 str r3, [sp] -1061:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 7765 .loc 1 1061 3 is_stmt 1 view .LVU2469 -1061:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 7766 .loc 1 1061 16 is_stmt 0 view .LVU2470 - 7767 0040 0123 movs r3, #1 - 7768 0042 0193 str r3, [sp, #4] -1062:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 7769 .loc 1 1062 3 is_stmt 1 view .LVU2471 -1062:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 7770 .loc 1 1062 24 is_stmt 0 view .LVU2472 - 7771 0044 0723 movs r3, #7 - 7772 0046 0293 str r3, [sp, #8] -1063:Src/main.c **** { - 7773 .loc 1 1063 3 is_stmt 1 view .LVU2473 -1063:Src/main.c **** { - 7774 .loc 1 1063 7 is_stmt 0 view .LVU2474 - 7775 0048 6946 mov r1, sp - 7776 004a 0548 ldr r0, .L391 - 7777 004c FFF7FEFF bl HAL_ADC_ConfigChannel - 7778 .LVL678: -1063:Src/main.c **** { - 7779 .loc 1 1063 6 discriminator 1 view .LVU2475 - 7780 0050 20B9 cbnz r0, .L390 -1071:Src/main.c **** - 7781 .loc 1 1071 1 view .LVU2476 - 7782 0052 05B0 add sp, sp, #20 - 7783 .LCFI71: - 7784 .cfi_remember_state - 7785 .cfi_def_cfa_offset 4 - 7786 @ sp needed - 7787 0054 5DF804FB ldr pc, [sp], #4 - 7788 .L389: - 7789 .LCFI72: - 7790 .cfi_restore_state -1055:Src/main.c **** } - 7791 .loc 1 1055 5 is_stmt 1 view .LVU2477 - 7792 0058 FFF7FEFF bl Error_Handler - 7793 .LVL679: - 7794 .L390: -1065:Src/main.c **** } - 7795 .loc 1 1065 5 view .LVU2478 - 7796 005c FFF7FEFF bl Error_Handler - 7797 .LVL680: - 7798 .L392: - 7799 .align 2 - 7800 .L391: - 7801 0060 00000000 .word hadc3 - 7802 0064 00220140 .word 1073816064 - 7803 0068 0100000F .word 251658241 - 7804 .cfi_endproc - 7805 .LFE1189: - 7807 .section .text.MX_USART1_UART_Init,"ax",%progbits - ARM GAS /tmp/ccYgfTud.s page 519 - - - 7808 .align 1 - 7809 .syntax unified - 7810 .thumb - 7811 .thumb_func - 7813 MX_USART1_UART_Init: - 7814 .LFB1204: -1738:Src/main.c **** - 7815 .loc 1 1738 1 view -0 - 7816 .cfi_startproc - 7817 @ args = 0, pretend = 0, frame = 208 - 7818 @ frame_needed = 0, uses_anonymous_args = 0 - 7819 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 7820 .LCFI73: - 7821 .cfi_def_cfa_offset 24 - 7822 .cfi_offset 4, -24 - 7823 .cfi_offset 5, -20 - 7824 .cfi_offset 6, -16 - 7825 .cfi_offset 7, -12 - 7826 .cfi_offset 8, -8 - 7827 .cfi_offset 14, -4 - 7828 0004 B4B0 sub sp, sp, #208 - 7829 .LCFI74: - 7830 .cfi_def_cfa_offset 232 -1744:Src/main.c **** - 7831 .loc 1 1744 3 view .LVU2480 -1744:Src/main.c **** - 7832 .loc 1 1744 24 is_stmt 0 view .LVU2481 - 7833 0006 0021 movs r1, #0 - 7834 0008 2D91 str r1, [sp, #180] - 7835 000a 2E91 str r1, [sp, #184] - 7836 000c 2F91 str r1, [sp, #188] - 7837 000e 3091 str r1, [sp, #192] - 7838 0010 3191 str r1, [sp, #196] - 7839 0012 3291 str r1, [sp, #200] - 7840 0014 3391 str r1, [sp, #204] -1746:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 7841 .loc 1 1746 3 is_stmt 1 view .LVU2482 -1746:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 7842 .loc 1 1746 23 is_stmt 0 view .LVU2483 - 7843 0016 2791 str r1, [sp, #156] - 7844 0018 2891 str r1, [sp, #160] - 7845 001a 2991 str r1, [sp, #164] - 7846 001c 2A91 str r1, [sp, #168] - 7847 001e 2B91 str r1, [sp, #172] - 7848 0020 2C91 str r1, [sp, #176] -1747:Src/main.c **** - 7849 .loc 1 1747 3 is_stmt 1 view .LVU2484 -1747:Src/main.c **** - 7850 .loc 1 1747 28 is_stmt 0 view .LVU2485 - 7851 0022 9022 movs r2, #144 - 7852 0024 03A8 add r0, sp, #12 - 7853 0026 FFF7FEFF bl memset - 7854 .LVL681: -1751:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 7855 .loc 1 1751 3 is_stmt 1 view .LVU2486 -1751:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 7856 .loc 1 1751 44 is_stmt 0 view .LVU2487 - ARM GAS /tmp/ccYgfTud.s page 520 - - - 7857 002a 4023 movs r3, #64 - 7858 002c 0393 str r3, [sp, #12] -1752:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 7859 .loc 1 1752 3 is_stmt 1 view .LVU2488 -1753:Src/main.c **** { - 7860 .loc 1 1753 3 view .LVU2489 -1753:Src/main.c **** { - 7861 .loc 1 1753 7 is_stmt 0 view .LVU2490 - 7862 002e 03A8 add r0, sp, #12 - 7863 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig - 7864 .LVL682: -1753:Src/main.c **** { - 7865 .loc 1 1753 6 discriminator 1 view .LVU2491 - 7866 0034 0028 cmp r0, #0 - 7867 0036 40F09E80 bne .L396 -1759:Src/main.c **** - 7868 .loc 1 1759 3 is_stmt 1 view .LVU2492 - 7869 .LVL683: - 7870 .LBB586: - 7871 .LBI586: -1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 7872 .loc 3 1587 22 view .LVU2493 - 7873 .LBB587: -1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 7874 .loc 3 1589 3 view .LVU2494 -1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 7875 .loc 3 1590 3 view .LVU2495 - 7876 003a 504B ldr r3, .L397 - 7877 003c 5A6C ldr r2, [r3, #68] - 7878 003e 42F01002 orr r2, r2, #16 - 7879 0042 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 7880 .loc 3 1592 3 view .LVU2496 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 7881 .loc 3 1592 12 is_stmt 0 view .LVU2497 - 7882 0044 5A6C ldr r2, [r3, #68] - 7883 0046 02F01002 and r2, r2, #16 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 7884 .loc 3 1592 10 view .LVU2498 - 7885 004a 0292 str r2, [sp, #8] - 7886 .loc 3 1593 3 is_stmt 1 view .LVU2499 - 7887 004c 029A ldr r2, [sp, #8] - 7888 .LVL684: - 7889 .loc 3 1593 3 is_stmt 0 view .LVU2500 - 7890 .LBE587: - 7891 .LBE586: -1761:Src/main.c **** /**USART1 GPIO Configuration - 7892 .loc 1 1761 3 is_stmt 1 view .LVU2501 - 7893 .LBB588: - 7894 .LBI588: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 7895 .loc 3 309 22 view .LVU2502 - 7896 .LBB589: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 7897 .loc 3 311 3 view .LVU2503 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 7898 .loc 3 312 3 view .LVU2504 - ARM GAS /tmp/ccYgfTud.s page 521 - - - 7899 004e 1A6B ldr r2, [r3, #48] - 7900 0050 42F00102 orr r2, r2, #1 - 7901 0054 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 7902 .loc 3 314 3 view .LVU2505 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 7903 .loc 3 314 12 is_stmt 0 view .LVU2506 - 7904 0056 1B6B ldr r3, [r3, #48] - 7905 0058 03F00103 and r3, r3, #1 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 7906 .loc 3 314 10 view .LVU2507 - 7907 005c 0193 str r3, [sp, #4] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 7908 .loc 3 315 3 is_stmt 1 view .LVU2508 - 7909 005e 019B ldr r3, [sp, #4] - 7910 .LVL685: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 7911 .loc 3 315 3 is_stmt 0 view .LVU2509 - 7912 .LBE589: - 7913 .LBE588: -1766:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 7914 .loc 1 1766 3 is_stmt 1 view .LVU2510 -1766:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 7915 .loc 1 1766 23 is_stmt 0 view .LVU2511 - 7916 0060 4FF40073 mov r3, #512 - 7917 0064 2793 str r3, [sp, #156] -1767:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 7918 .loc 1 1767 3 is_stmt 1 view .LVU2512 -1767:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 7919 .loc 1 1767 24 is_stmt 0 view .LVU2513 - 7920 0066 4FF00208 mov r8, #2 - 7921 006a CDF8A080 str r8, [sp, #160] -1768:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 7922 .loc 1 1768 3 is_stmt 1 view .LVU2514 -1768:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 7923 .loc 1 1768 25 is_stmt 0 view .LVU2515 - 7924 006e 0327 movs r7, #3 - 7925 0070 2997 str r7, [sp, #164] -1769:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 7926 .loc 1 1769 3 is_stmt 1 view .LVU2516 -1769:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 7927 .loc 1 1769 30 is_stmt 0 view .LVU2517 - 7928 0072 0024 movs r4, #0 - 7929 0074 2A94 str r4, [sp, #168] -1770:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 7930 .loc 1 1770 3 is_stmt 1 view .LVU2518 -1770:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 7931 .loc 1 1770 24 is_stmt 0 view .LVU2519 - 7932 0076 2B94 str r4, [sp, #172] -1771:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 7933 .loc 1 1771 3 is_stmt 1 view .LVU2520 -1771:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 7934 .loc 1 1771 29 is_stmt 0 view .LVU2521 - 7935 0078 0726 movs r6, #7 - 7936 007a 2C96 str r6, [sp, #176] -1772:Src/main.c **** - 7937 .loc 1 1772 3 is_stmt 1 view .LVU2522 - ARM GAS /tmp/ccYgfTud.s page 522 - - - 7938 007c 404D ldr r5, .L397+4 - 7939 007e 27A9 add r1, sp, #156 - 7940 0080 2846 mov r0, r5 - 7941 0082 FFF7FEFF bl LL_GPIO_Init - 7942 .LVL686: -1774:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 7943 .loc 1 1774 3 view .LVU2523 -1774:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 7944 .loc 1 1774 23 is_stmt 0 view .LVU2524 - 7945 0086 4FF48063 mov r3, #1024 - 7946 008a 2793 str r3, [sp, #156] -1775:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 7947 .loc 1 1775 3 is_stmt 1 view .LVU2525 -1775:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 7948 .loc 1 1775 24 is_stmt 0 view .LVU2526 - 7949 008c CDF8A080 str r8, [sp, #160] -1776:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 7950 .loc 1 1776 3 is_stmt 1 view .LVU2527 -1776:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 7951 .loc 1 1776 25 is_stmt 0 view .LVU2528 - 7952 0090 2997 str r7, [sp, #164] -1777:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 7953 .loc 1 1777 3 is_stmt 1 view .LVU2529 -1777:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 7954 .loc 1 1777 30 is_stmt 0 view .LVU2530 - 7955 0092 2A94 str r4, [sp, #168] -1778:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 7956 .loc 1 1778 3 is_stmt 1 view .LVU2531 -1778:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 7957 .loc 1 1778 24 is_stmt 0 view .LVU2532 - 7958 0094 2B94 str r4, [sp, #172] -1779:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 7959 .loc 1 1779 3 is_stmt 1 view .LVU2533 -1779:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 7960 .loc 1 1779 29 is_stmt 0 view .LVU2534 - 7961 0096 2C96 str r6, [sp, #176] -1780:Src/main.c **** - 7962 .loc 1 1780 3 is_stmt 1 view .LVU2535 - 7963 0098 27A9 add r1, sp, #156 - 7964 009a 2846 mov r0, r5 - 7965 009c FFF7FEFF bl LL_GPIO_Init - 7966 .LVL687: -1785:Src/main.c **** - 7967 .loc 1 1785 3 view .LVU2536 - 7968 .LBB590: - 7969 .LBI590: -1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 7970 .loc 6 1032 22 view .LVU2537 - 7971 .LBB591: -1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7972 .loc 6 1034 3 view .LVU2538 - 7973 00a0 384B ldr r3, .L397+8 - 7974 00a2 D3F8B820 ldr r2, [r3, #184] - 7975 00a6 22F0F052 bic r2, r2, #503316480 - 7976 00aa 42F00062 orr r2, r2, #134217728 - 7977 00ae C3F8B820 str r2, [r3, #184] - 7978 .LVL688: - ARM GAS /tmp/ccYgfTud.s page 523 - - -1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7979 .loc 6 1034 3 is_stmt 0 view .LVU2539 - 7980 .LBE591: - 7981 .LBE590: -1787:Src/main.c **** - 7982 .loc 1 1787 3 is_stmt 1 view .LVU2540 - 7983 .LBB592: - 7984 .LBI592: - 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 7985 .loc 6 598 22 view .LVU2541 - 7986 .LBB593: - 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7987 .loc 6 600 3 view .LVU2542 - 7988 00b2 D3F8B820 ldr r2, [r3, #184] - 7989 00b6 22F0C002 bic r2, r2, #192 - 7990 00ba 42F04002 orr r2, r2, #64 - 7991 00be C3F8B820 str r2, [r3, #184] - 7992 .LVL689: - 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 7993 .loc 6 600 3 is_stmt 0 view .LVU2543 - 7994 .LBE593: - 7995 .LBE592: -1789:Src/main.c **** - 7996 .loc 1 1789 3 is_stmt 1 view .LVU2544 - 7997 .LBB594: - 7998 .LBI594: - 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 7999 .loc 6 924 22 view .LVU2545 - 8000 .LBB595: - 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8001 .loc 6 926 3 view .LVU2546 - 8002 00c2 D3F8B820 ldr r2, [r3, #184] - 8003 00c6 42F44032 orr r2, r2, #196608 - 8004 00ca C3F8B820 str r2, [r3, #184] - 8005 .LVL690: - 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8006 .loc 6 926 3 is_stmt 0 view .LVU2547 - 8007 .LBE595: - 8008 .LBE594: -1791:Src/main.c **** - 8009 .loc 1 1791 3 is_stmt 1 view .LVU2548 - 8010 .LBB596: - 8011 .LBI596: - 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8012 .loc 6 646 22 view .LVU2549 - 8013 .LBB597: - 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8014 .loc 6 648 3 view .LVU2550 - 8015 00ce D3F8B820 ldr r2, [r3, #184] - 8016 00d2 22F49072 bic r2, r2, #288 - 8017 00d6 C3F8B820 str r2, [r3, #184] - 8018 .LVL691: - 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8019 .loc 6 648 3 is_stmt 0 view .LVU2551 - 8020 .LBE597: - 8021 .LBE596: -1793:Src/main.c **** - ARM GAS /tmp/ccYgfTud.s page 524 - - - 8022 .loc 1 1793 3 is_stmt 1 view .LVU2552 - 8023 .LBB598: - 8024 .LBI598: - 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8025 .loc 6 693 22 view .LVU2553 - 8026 .LBB599: - 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8027 .loc 6 695 3 view .LVU2554 - 8028 00da D3F8B820 ldr r2, [r3, #184] - 8029 00de 22F40072 bic r2, r2, #512 - 8030 00e2 C3F8B820 str r2, [r3, #184] - 8031 .LVL692: - 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8032 .loc 6 695 3 is_stmt 0 view .LVU2555 - 8033 .LBE599: - 8034 .LBE598: -1795:Src/main.c **** - 8035 .loc 1 1795 3 is_stmt 1 view .LVU2556 - 8036 .LBB600: - 8037 .LBI600: - 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8038 .loc 6 738 22 view .LVU2557 - 8039 .LBB601: - 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8040 .loc 6 740 3 view .LVU2558 - 8041 00e6 D3F8B820 ldr r2, [r3, #184] - 8042 00ea 42F48062 orr r2, r2, #1024 - 8043 00ee C3F8B820 str r2, [r3, #184] - 8044 .LVL693: - 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8045 .loc 6 740 3 is_stmt 0 view .LVU2559 - 8046 .LBE601: - 8047 .LBE600: -1797:Src/main.c **** - 8048 .loc 1 1797 3 is_stmt 1 view .LVU2560 - 8049 .LBB602: - 8050 .LBI602: - 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8051 .loc 6 784 22 view .LVU2561 - 8052 .LBB603: - 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8053 .loc 6 786 3 view .LVU2562 - 8054 00f2 D3F8B820 ldr r2, [r3, #184] - 8055 00f6 22F4C052 bic r2, r2, #6144 - 8056 00fa C3F8B820 str r2, [r3, #184] - 8057 .LVL694: - 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8058 .loc 6 786 3 is_stmt 0 view .LVU2563 - 8059 .LBE603: - 8060 .LBE602: -1799:Src/main.c **** - 8061 .loc 1 1799 3 is_stmt 1 view .LVU2564 - 8062 .LBB604: - 8063 .LBI604: - 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8064 .loc 6 831 22 view .LVU2565 - 8065 .LBB605: - ARM GAS /tmp/ccYgfTud.s page 525 - - - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8066 .loc 6 833 3 view .LVU2566 - 8067 00fe D3F8B820 ldr r2, [r3, #184] - 8068 0102 22F4C042 bic r2, r2, #24576 - 8069 0106 C3F8B820 str r2, [r3, #184] - 8070 .LVL695: - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8071 .loc 6 833 3 is_stmt 0 view .LVU2567 - 8072 .LBE605: - 8073 .LBE604: -1801:Src/main.c **** - 8074 .loc 1 1801 3 is_stmt 1 view .LVU2568 - 8075 .LBB606: - 8076 .LBI606: -1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8077 .loc 6 1299 22 view .LVU2569 - 8078 .LBB607: -1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8079 .loc 6 1301 3 view .LVU2570 - 8080 010a D3F8CC20 ldr r2, [r3, #204] - 8081 010e 22F00402 bic r2, r2, #4 - 8082 0112 C3F8CC20 str r2, [r3, #204] - 8083 .LVL696: -1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8084 .loc 6 1301 3 is_stmt 0 view .LVU2571 - 8085 .LBE607: - 8086 .LBE606: -1804:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 8087 .loc 1 1804 3 is_stmt 1 view .LVU2572 - 8088 .LBB608: - 8089 .LBI608: -1884:Drivers/CMSIS/Include/core_cm7.h **** { - 8090 .loc 2 1884 26 view .LVU2573 - 8091 .LBB609: -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 8092 .loc 2 1886 3 view .LVU2574 -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 8093 .loc 2 1886 26 is_stmt 0 view .LVU2575 - 8094 0116 1C4B ldr r3, .L397+12 - 8095 0118 D868 ldr r0, [r3, #12] - 8096 .LBE609: - 8097 .LBE608: -1804:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 8098 .loc 1 1804 3 discriminator 1 view .LVU2576 - 8099 011a 2246 mov r2, r4 - 8100 011c 2146 mov r1, r4 - 8101 011e C0F30220 ubfx r0, r0, #8, #3 - 8102 0122 FFF7FEFF bl NVIC_EncodePriority - 8103 .LVL697: - 8104 .LBB610: - 8105 .LBI610: -2024:Drivers/CMSIS/Include/core_cm7.h **** { - 8106 .loc 2 2024 22 is_stmt 1 view .LVU2577 - 8107 .LBB611: -2026:Drivers/CMSIS/Include/core_cm7.h **** { - 8108 .loc 2 2026 3 view .LVU2578 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - ARM GAS /tmp/ccYgfTud.s page 526 - - - 8109 .loc 2 2028 5 view .LVU2579 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8110 .loc 2 2028 49 is_stmt 0 view .LVU2580 - 8111 0126 0001 lsls r0, r0, #4 - 8112 .LVL698: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8113 .loc 2 2028 49 view .LVU2581 - 8114 0128 C0B2 uxtb r0, r0 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8115 .loc 2 2028 47 view .LVU2582 - 8116 012a 184B ldr r3, .L397+16 - 8117 012c 83F82503 strb r0, [r3, #805] - 8118 .LVL699: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8119 .loc 2 2028 47 view .LVU2583 - 8120 .LBE611: - 8121 .LBE610: -1805:Src/main.c **** - 8122 .loc 1 1805 3 is_stmt 1 view .LVU2584 - 8123 .LBB612: - 8124 .LBI612: -1896:Drivers/CMSIS/Include/core_cm7.h **** { - 8125 .loc 2 1896 22 view .LVU2585 - 8126 .LBB613: -1898:Drivers/CMSIS/Include/core_cm7.h **** { - 8127 .loc 2 1898 3 view .LVU2586 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8128 .loc 2 1900 5 view .LVU2587 -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8129 .loc 2 1900 43 is_stmt 0 view .LVU2588 - 8130 0130 2022 movs r2, #32 - 8131 0132 5A60 str r2, [r3, #4] - 8132 .LVL700: -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8133 .loc 2 1900 43 view .LVU2589 - 8134 .LBE613: - 8135 .LBE612: -1810:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 8136 .loc 1 1810 3 is_stmt 1 view .LVU2590 -1810:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 8137 .loc 1 1810 29 is_stmt 0 view .LVU2591 - 8138 0134 4FF4E133 mov r3, #115200 - 8139 0138 2D93 str r3, [sp, #180] -1811:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 8140 .loc 1 1811 3 is_stmt 1 view .LVU2592 -1811:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 8141 .loc 1 1811 30 is_stmt 0 view .LVU2593 - 8142 013a 2E94 str r4, [sp, #184] -1812:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 8143 .loc 1 1812 3 is_stmt 1 view .LVU2594 -1812:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 8144 .loc 1 1812 29 is_stmt 0 view .LVU2595 - 8145 013c 2F94 str r4, [sp, #188] -1813:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 8146 .loc 1 1813 3 is_stmt 1 view .LVU2596 -1813:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 8147 .loc 1 1813 27 is_stmt 0 view .LVU2597 - ARM GAS /tmp/ccYgfTud.s page 527 - - - 8148 013e 3094 str r4, [sp, #192] -1814:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 8149 .loc 1 1814 3 is_stmt 1 view .LVU2598 -1814:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 8150 .loc 1 1814 38 is_stmt 0 view .LVU2599 - 8151 0140 0C23 movs r3, #12 - 8152 0142 3193 str r3, [sp, #196] -1815:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 8153 .loc 1 1815 3 is_stmt 1 view .LVU2600 -1815:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 8154 .loc 1 1815 40 is_stmt 0 view .LVU2601 - 8155 0144 3294 str r4, [sp, #200] -1816:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 8156 .loc 1 1816 3 is_stmt 1 view .LVU2602 -1816:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 8157 .loc 1 1816 33 is_stmt 0 view .LVU2603 - 8158 0146 3394 str r4, [sp, #204] -1817:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); - 8159 .loc 1 1817 3 is_stmt 1 view .LVU2604 - 8160 0148 04F18044 add r4, r4, #1073741824 - 8161 014c 04F58834 add r4, r4, #69632 - 8162 0150 2DA9 add r1, sp, #180 - 8163 0152 2046 mov r0, r4 - 8164 0154 FFF7FEFF bl LL_USART_Init - 8165 .LVL701: -1818:Src/main.c **** LL_USART_Enable(USART1); - 8166 .loc 1 1818 3 view .LVU2605 - 8167 .LBB614: - 8168 .LBI614: -2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 8169 .loc 7 2320 22 view .LVU2606 - 8170 .LBB615: -2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); - 8171 .loc 7 2326 3 view .LVU2607 - 8172 0158 6368 ldr r3, [r4, #4] - 8173 015a 23F49043 bic r3, r3, #18432 - 8174 015e 6360 str r3, [r4, #4] -2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8175 .loc 7 2327 3 view .LVU2608 - 8176 0160 A368 ldr r3, [r4, #8] - 8177 0162 23F02A03 bic r3, r3, #42 - 8178 0166 A360 str r3, [r4, #8] - 8179 .LVL702: -2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8180 .loc 7 2327 3 is_stmt 0 view .LVU2609 - 8181 .LBE615: - 8182 .LBE614: -1819:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ - 8183 .loc 1 1819 3 is_stmt 1 view .LVU2610 - 8184 .LBB616: - 8185 .LBI616: - 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 8186 .loc 7 560 22 view .LVU2611 - 8187 .LBB617: - 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8188 .loc 7 562 3 view .LVU2612 - 8189 0168 2368 ldr r3, [r4] - ARM GAS /tmp/ccYgfTud.s page 528 - - - 8190 016a 43F00103 orr r3, r3, #1 - 8191 016e 2360 str r3, [r4] - 8192 .LVL703: - 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8193 .loc 7 562 3 is_stmt 0 view .LVU2613 - 8194 .LBE617: - 8195 .LBE616: -1824:Src/main.c **** - 8196 .loc 1 1824 1 view .LVU2614 - 8197 0170 34B0 add sp, sp, #208 - 8198 .LCFI75: - 8199 .cfi_remember_state - 8200 .cfi_def_cfa_offset 24 - 8201 @ sp needed - 8202 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 8203 .L396: - 8204 .LCFI76: - 8205 .cfi_restore_state -1755:Src/main.c **** } - 8206 .loc 1 1755 5 is_stmt 1 view .LVU2615 - 8207 0176 FFF7FEFF bl Error_Handler - 8208 .LVL704: - 8209 .L398: - 8210 017a 00BF .align 2 - 8211 .L397: - 8212 017c 00380240 .word 1073887232 - 8213 0180 00000240 .word 1073872896 - 8214 0184 00640240 .word 1073898496 - 8215 0188 00ED00E0 .word -536810240 - 8216 018c 00E100E0 .word -536813312 - 8217 .cfi_endproc - 8218 .LFE1204: - 8220 .section .text.MX_TIM10_Init,"ax",%progbits - 8221 .align 1 - 8222 .syntax unified - 8223 .thumb - 8224 .thumb_func - 8226 MX_TIM10_Init: - 8227 .LFB1201: -1626:Src/main.c **** - 8228 .loc 1 1626 1 view -0 - 8229 .cfi_startproc - 8230 @ args = 0, pretend = 0, frame = 0 - 8231 @ frame_needed = 0, uses_anonymous_args = 0 - 8232 0000 08B5 push {r3, lr} - 8233 .LCFI77: - 8234 .cfi_def_cfa_offset 8 - 8235 .cfi_offset 3, -8 - 8236 .cfi_offset 14, -4 -1635:Src/main.c **** htim10.Init.Prescaler = 183; - 8237 .loc 1 1635 3 view .LVU2617 -1635:Src/main.c **** htim10.Init.Prescaler = 183; - 8238 .loc 1 1635 19 is_stmt 0 view .LVU2618 - 8239 0002 0848 ldr r0, .L403 - 8240 0004 084B ldr r3, .L403+4 - 8241 0006 0360 str r3, [r0] -1636:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - ARM GAS /tmp/ccYgfTud.s page 529 - - - 8242 .loc 1 1636 3 is_stmt 1 view .LVU2619 -1636:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 8243 .loc 1 1636 25 is_stmt 0 view .LVU2620 - 8244 0008 B723 movs r3, #183 - 8245 000a 4360 str r3, [r0, #4] -1637:Src/main.c **** htim10.Init.Period = 9; - 8246 .loc 1 1637 3 is_stmt 1 view .LVU2621 -1637:Src/main.c **** htim10.Init.Period = 9; - 8247 .loc 1 1637 27 is_stmt 0 view .LVU2622 - 8248 000c 0023 movs r3, #0 - 8249 000e 8360 str r3, [r0, #8] -1638:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8250 .loc 1 1638 3 is_stmt 1 view .LVU2623 -1638:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8251 .loc 1 1638 22 is_stmt 0 view .LVU2624 - 8252 0010 0922 movs r2, #9 - 8253 0012 C260 str r2, [r0, #12] -1639:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8254 .loc 1 1639 3 is_stmt 1 view .LVU2625 -1639:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8255 .loc 1 1639 29 is_stmt 0 view .LVU2626 - 8256 0014 0361 str r3, [r0, #16] -1640:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 8257 .loc 1 1640 3 is_stmt 1 view .LVU2627 -1640:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 8258 .loc 1 1640 33 is_stmt 0 view .LVU2628 - 8259 0016 8361 str r3, [r0, #24] -1641:Src/main.c **** { - 8260 .loc 1 1641 3 is_stmt 1 view .LVU2629 -1641:Src/main.c **** { - 8261 .loc 1 1641 7 is_stmt 0 view .LVU2630 - 8262 0018 FFF7FEFF bl HAL_TIM_Base_Init - 8263 .LVL705: -1641:Src/main.c **** { - 8264 .loc 1 1641 6 discriminator 1 view .LVU2631 - 8265 001c 00B9 cbnz r0, .L402 -1649:Src/main.c **** - 8266 .loc 1 1649 1 view .LVU2632 - 8267 001e 08BD pop {r3, pc} - 8268 .L402: -1643:Src/main.c **** } - 8269 .loc 1 1643 5 is_stmt 1 view .LVU2633 - 8270 0020 FFF7FEFF bl Error_Handler - 8271 .LVL706: - 8272 .L404: - 8273 .align 2 - 8274 .L403: - 8275 0024 00000000 .word htim10 - 8276 0028 00440140 .word 1073824768 - 8277 .cfi_endproc - 8278 .LFE1201: - 8280 .section .text.MX_UART8_Init,"ax",%progbits - 8281 .align 1 - 8282 .syntax unified - 8283 .thumb - 8284 .thumb_func - 8286 MX_UART8_Init: - ARM GAS /tmp/ccYgfTud.s page 530 - - - 8287 .LFB1203: -1703:Src/main.c **** - 8288 .loc 1 1703 1 view -0 - 8289 .cfi_startproc + 8273 0038 00000000 .word u_tx_flg + 8274 003c 00640240 .word 1073898496 + 8275 .cfi_endproc + 8276 .LFE1231: + 8278 .section .text.Error_Handler,"ax",%progbits + 8279 .align 1 + 8280 .global Error_Handler + 8281 .syntax unified + 8282 .thumb + 8283 .thumb_func + 8285 Error_Handler: + 8286 .LFB1233: +3368:Src/main.c **** //------------------------------------------------------- +3369:Src/main.c **** /* USER CODE END 4 */ +3370:Src/main.c **** +3371:Src/main.c **** /** +3372:Src/main.c **** * @brief This function is executed in case of error occurrence. +3373:Src/main.c **** * @retval None +3374:Src/main.c **** */ +3375:Src/main.c **** void Error_Handler(void) +3376:Src/main.c **** { + 8287 .loc 1 3376 1 is_stmt 1 view -0 + 8288 .cfi_startproc + 8289 @ Volatile: function does not return. 8290 @ args = 0, pretend = 0, frame = 0 8291 @ frame_needed = 0, uses_anonymous_args = 0 - 8292 0000 08B5 push {r3, lr} - 8293 .LCFI78: - 8294 .cfi_def_cfa_offset 8 - 8295 .cfi_offset 3, -8 - 8296 .cfi_offset 14, -4 -1712:Src/main.c **** huart8.Init.BaudRate = 115200; - 8297 .loc 1 1712 3 view .LVU2635 -1712:Src/main.c **** huart8.Init.BaudRate = 115200; - 8298 .loc 1 1712 19 is_stmt 0 view .LVU2636 - 8299 0002 0B48 ldr r0, .L409 - 8300 0004 0B4B ldr r3, .L409+4 - 8301 0006 0360 str r3, [r0] -1713:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 8302 .loc 1 1713 3 is_stmt 1 view .LVU2637 -1713:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 8303 .loc 1 1713 24 is_stmt 0 view .LVU2638 - 8304 0008 4FF4E133 mov r3, #115200 - 8305 000c 4360 str r3, [r0, #4] -1714:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 8306 .loc 1 1714 3 is_stmt 1 view .LVU2639 -1714:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 8307 .loc 1 1714 26 is_stmt 0 view .LVU2640 - 8308 000e 0023 movs r3, #0 - 8309 0010 8360 str r3, [r0, #8] -1715:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 8310 .loc 1 1715 3 is_stmt 1 view .LVU2641 -1715:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 8311 .loc 1 1715 24 is_stmt 0 view .LVU2642 - 8312 0012 C360 str r3, [r0, #12] -1716:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 8313 .loc 1 1716 3 is_stmt 1 view .LVU2643 -1716:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 8314 .loc 1 1716 22 is_stmt 0 view .LVU2644 - 8315 0014 0361 str r3, [r0, #16] -1717:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8316 .loc 1 1717 3 is_stmt 1 view .LVU2645 -1717:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8317 .loc 1 1717 20 is_stmt 0 view .LVU2646 - 8318 0016 0C22 movs r2, #12 - 8319 0018 4261 str r2, [r0, #20] -1718:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 8320 .loc 1 1718 3 is_stmt 1 view .LVU2647 -1718:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 8321 .loc 1 1718 25 is_stmt 0 view .LVU2648 - 8322 001a 8361 str r3, [r0, #24] -1719:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8323 .loc 1 1719 3 is_stmt 1 view .LVU2649 -1719:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8324 .loc 1 1719 28 is_stmt 0 view .LVU2650 - 8325 001c C361 str r3, [r0, #28] -1720:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - ARM GAS /tmp/ccYgfTud.s page 531 + 8292 @ link register save eliminated. +3377:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ +3378:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ +3379:Src/main.c **** __disable_irq(); + 8293 .loc 1 3379 3 view .LVU2601 + 8294 .LBB600: + 8295 .LBI600: + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 8296 .loc 8 140 27 view .LVU2602 + 8297 .LBB601: + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 8298 .loc 8 142 3 view .LVU2603 + 8299 .syntax unified + 8300 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8301 0000 72B6 cpsid i + 8302 @ 0 "" 2 + 8303 .thumb + 8304 .syntax unified + 8305 .L447: + 8306 .LBE601: + 8307 .LBE600: +3380:Src/main.c **** while (1) + 8308 .loc 1 3380 3 view .LVU2604 +3381:Src/main.c **** { +3382:Src/main.c **** } + 8309 .loc 1 3382 3 view .LVU2605 +3380:Src/main.c **** while (1) + 8310 .loc 1 3380 9 view .LVU2606 + 8311 0002 FEE7 b .L447 + 8312 .cfi_endproc + 8313 .LFE1233: + ARM GAS /tmp/ccwR4KB7.s page 535 - 8326 .loc 1 1720 3 is_stmt 1 view .LVU2651 -1720:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 8327 .loc 1 1720 30 is_stmt 0 view .LVU2652 - 8328 001e 0362 str r3, [r0, #32] -1721:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 8329 .loc 1 1721 3 is_stmt 1 view .LVU2653 -1721:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 8330 .loc 1 1721 38 is_stmt 0 view .LVU2654 - 8331 0020 4362 str r3, [r0, #36] -1722:Src/main.c **** { - 8332 .loc 1 1722 3 is_stmt 1 view .LVU2655 -1722:Src/main.c **** { - 8333 .loc 1 1722 7 is_stmt 0 view .LVU2656 - 8334 0022 FFF7FEFF bl HAL_UART_Init - 8335 .LVL707: -1722:Src/main.c **** { - 8336 .loc 1 1722 6 discriminator 1 view .LVU2657 - 8337 0026 00B9 cbnz r0, .L408 -1730:Src/main.c **** - 8338 .loc 1 1730 1 view .LVU2658 - 8339 0028 08BD pop {r3, pc} - 8340 .L408: -1724:Src/main.c **** } - 8341 .loc 1 1724 5 is_stmt 1 view .LVU2659 - 8342 002a FFF7FEFF bl Error_Handler - 8343 .LVL708: - 8344 .L410: - 8345 002e 00BF .align 2 - 8346 .L409: - 8347 0030 00000000 .word huart8 - 8348 0034 007C0040 .word 1073773568 - 8349 .cfi_endproc - 8350 .LFE1203: - 8352 .section .text.MX_TIM8_Init,"ax",%progbits - 8353 .align 1 - 8354 .syntax unified - 8355 .thumb - 8356 .thumb_func - 8358 MX_TIM8_Init: - 8359 .LFB1200: -1579:Src/main.c **** - 8360 .loc 1 1579 1 view -0 - 8361 .cfi_startproc - 8362 @ args = 0, pretend = 0, frame = 32 - 8363 @ frame_needed = 0, uses_anonymous_args = 0 - 8364 0000 00B5 push {lr} - 8365 .LCFI79: - 8366 .cfi_def_cfa_offset 4 - 8367 .cfi_offset 14, -4 - 8368 0002 89B0 sub sp, sp, #36 - 8369 .LCFI80: - 8370 .cfi_def_cfa_offset 40 -1585:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8371 .loc 1 1585 3 view .LVU2661 -1585:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8372 .loc 1 1585 26 is_stmt 0 view .LVU2662 - 8373 0004 0023 movs r3, #0 - ARM GAS /tmp/ccYgfTud.s page 532 + 8315 .section .text.MX_ADC1_Init,"ax",%progbits + 8316 .align 1 + 8317 .syntax unified + 8318 .thumb + 8319 .thumb_func + 8321 MX_ADC1_Init: + 8322 .LFB1188: + 989:Src/main.c **** + 8323 .loc 1 989 1 view -0 + 8324 .cfi_startproc + 8325 @ args = 0, pretend = 0, frame = 16 + 8326 @ frame_needed = 0, uses_anonymous_args = 0 + 8327 0000 00B5 push {lr} + 8328 .LCFI74: + 8329 .cfi_def_cfa_offset 4 + 8330 .cfi_offset 14, -4 + 8331 0002 85B0 sub sp, sp, #20 + 8332 .LCFI75: + 8333 .cfi_def_cfa_offset 24 + 995:Src/main.c **** + 8334 .loc 1 995 3 view .LVU2608 + 995:Src/main.c **** + 8335 .loc 1 995 26 is_stmt 0 view .LVU2609 + 8336 0004 0023 movs r3, #0 + 8337 0006 0093 str r3, [sp] + 8338 0008 0193 str r3, [sp, #4] + 8339 000a 0293 str r3, [sp, #8] + 8340 000c 0393 str r3, [sp, #12] +1003:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 8341 .loc 1 1003 3 is_stmt 1 view .LVU2610 +1003:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 8342 .loc 1 1003 18 is_stmt 0 view .LVU2611 + 8343 000e 2B48 ldr r0, .L462 + 8344 0010 2B4A ldr r2, .L462+4 + 8345 0012 0260 str r2, [r0] +1004:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 8346 .loc 1 1004 3 is_stmt 1 view .LVU2612 +1004:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 8347 .loc 1 1004 29 is_stmt 0 view .LVU2613 + 8348 0014 4FF44032 mov r2, #196608 + 8349 0018 4260 str r2, [r0, #4] +1005:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 8350 .loc 1 1005 3 is_stmt 1 view .LVU2614 +1005:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 8351 .loc 1 1005 25 is_stmt 0 view .LVU2615 + 8352 001a 8360 str r3, [r0, #8] +1006:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 8353 .loc 1 1006 3 is_stmt 1 view .LVU2616 +1006:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 8354 .loc 1 1006 27 is_stmt 0 view .LVU2617 + 8355 001c 0122 movs r2, #1 + 8356 001e 0261 str r2, [r0, #16] +1007:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 8357 .loc 1 1007 3 is_stmt 1 view .LVU2618 +1007:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 8358 .loc 1 1007 33 is_stmt 0 view .LVU2619 + 8359 0020 8361 str r3, [r0, #24] + ARM GAS /tmp/ccwR4KB7.s page 536 - 8374 0006 0493 str r3, [sp, #16] - 8375 0008 0593 str r3, [sp, #20] - 8376 000a 0693 str r3, [sp, #24] - 8377 000c 0793 str r3, [sp, #28] -1586:Src/main.c **** - 8378 .loc 1 1586 3 is_stmt 1 view .LVU2663 -1586:Src/main.c **** - 8379 .loc 1 1586 27 is_stmt 0 view .LVU2664 - 8380 000e 0193 str r3, [sp, #4] - 8381 0010 0293 str r3, [sp, #8] - 8382 0012 0393 str r3, [sp, #12] -1591:Src/main.c **** htim8.Init.Prescaler = 0; - 8383 .loc 1 1591 3 is_stmt 1 view .LVU2665 -1591:Src/main.c **** htim8.Init.Prescaler = 0; - 8384 .loc 1 1591 18 is_stmt 0 view .LVU2666 - 8385 0014 1348 ldr r0, .L419 - 8386 0016 144A ldr r2, .L419+4 - 8387 0018 0260 str r2, [r0] -1592:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 8388 .loc 1 1592 3 is_stmt 1 view .LVU2667 -1592:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 8389 .loc 1 1592 24 is_stmt 0 view .LVU2668 - 8390 001a 4360 str r3, [r0, #4] -1593:Src/main.c **** htim8.Init.Period = 91; - 8391 .loc 1 1593 3 is_stmt 1 view .LVU2669 -1593:Src/main.c **** htim8.Init.Period = 91; - 8392 .loc 1 1593 26 is_stmt 0 view .LVU2670 - 8393 001c 8360 str r3, [r0, #8] -1594:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8394 .loc 1 1594 3 is_stmt 1 view .LVU2671 -1594:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8395 .loc 1 1594 21 is_stmt 0 view .LVU2672 - 8396 001e 5B22 movs r2, #91 - 8397 0020 C260 str r2, [r0, #12] -1595:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 8398 .loc 1 1595 3 is_stmt 1 view .LVU2673 -1595:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 8399 .loc 1 1595 28 is_stmt 0 view .LVU2674 - 8400 0022 0361 str r3, [r0, #16] -1596:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8401 .loc 1 1596 3 is_stmt 1 view .LVU2675 -1596:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8402 .loc 1 1596 32 is_stmt 0 view .LVU2676 - 8403 0024 4361 str r3, [r0, #20] -1597:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 8404 .loc 1 1597 3 is_stmt 1 view .LVU2677 -1597:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 8405 .loc 1 1597 32 is_stmt 0 view .LVU2678 - 8406 0026 8361 str r3, [r0, #24] -1598:Src/main.c **** { - 8407 .loc 1 1598 3 is_stmt 1 view .LVU2679 -1598:Src/main.c **** { - 8408 .loc 1 1598 7 is_stmt 0 view .LVU2680 - 8409 0028 FFF7FEFF bl HAL_TIM_Base_Init - 8410 .LVL709: -1598:Src/main.c **** { - 8411 .loc 1 1598 6 discriminator 1 view .LVU2681 - ARM GAS /tmp/ccYgfTud.s page 533 +1008:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 8360 .loc 1 1008 3 is_stmt 1 view .LVU2620 +1008:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 8361 .loc 1 1008 36 is_stmt 0 view .LVU2621 + 8362 0022 80F82030 strb r3, [r0, #32] +1009:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 8363 .loc 1 1009 3 is_stmt 1 view .LVU2622 +1009:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 8364 .loc 1 1009 35 is_stmt 0 view .LVU2623 + 8365 0026 C362 str r3, [r0, #44] +1010:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 8366 .loc 1 1010 3 is_stmt 1 view .LVU2624 +1010:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 8367 .loc 1 1010 31 is_stmt 0 view .LVU2625 + 8368 0028 2649 ldr r1, .L462+8 + 8369 002a 8162 str r1, [r0, #40] +1011:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 8370 .loc 1 1011 3 is_stmt 1 view .LVU2626 +1011:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 8371 .loc 1 1011 24 is_stmt 0 view .LVU2627 + 8372 002c C360 str r3, [r0, #12] +1012:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 8373 .loc 1 1012 3 is_stmt 1 view .LVU2628 +1012:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 8374 .loc 1 1012 30 is_stmt 0 view .LVU2629 + 8375 002e 0521 movs r1, #5 + 8376 0030 C161 str r1, [r0, #28] +1013:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 8377 .loc 1 1013 3 is_stmt 1 view .LVU2630 +1013:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 8378 .loc 1 1013 36 is_stmt 0 view .LVU2631 + 8379 0032 80F83030 strb r3, [r0, #48] +1014:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 8380 .loc 1 1014 3 is_stmt 1 view .LVU2632 +1014:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 8381 .loc 1 1014 27 is_stmt 0 view .LVU2633 + 8382 0036 4261 str r2, [r0, #20] +1015:Src/main.c **** { + 8383 .loc 1 1015 3 is_stmt 1 view .LVU2634 +1015:Src/main.c **** { + 8384 .loc 1 1015 7 is_stmt 0 view .LVU2635 + 8385 0038 FFF7FEFF bl HAL_ADC_Init + 8386 .LVL783: +1015:Src/main.c **** { + 8387 .loc 1 1015 6 discriminator 1 view .LVU2636 + 8388 003c 0028 cmp r0, #0 + 8389 003e 31D1 bne .L456 +1022:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 8390 .loc 1 1022 3 is_stmt 1 view .LVU2637 +1022:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 8391 .loc 1 1022 19 is_stmt 0 view .LVU2638 + 8392 0040 0923 movs r3, #9 + 8393 0042 0093 str r3, [sp] +1023:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 8394 .loc 1 1023 3 is_stmt 1 view .LVU2639 +1023:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 8395 .loc 1 1023 16 is_stmt 0 view .LVU2640 + ARM GAS /tmp/ccwR4KB7.s page 537 - 8412 002c 98B9 cbnz r0, .L416 -1602:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 8413 .loc 1 1602 3 is_stmt 1 view .LVU2682 -1602:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 8414 .loc 1 1602 34 is_stmt 0 view .LVU2683 - 8415 002e 4FF48053 mov r3, #4096 - 8416 0032 0493 str r3, [sp, #16] -1603:Src/main.c **** { - 8417 .loc 1 1603 3 is_stmt 1 view .LVU2684 -1603:Src/main.c **** { - 8418 .loc 1 1603 7 is_stmt 0 view .LVU2685 - 8419 0034 04A9 add r1, sp, #16 - 8420 0036 0B48 ldr r0, .L419 - 8421 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource - 8422 .LVL710: -1603:Src/main.c **** { - 8423 .loc 1 1603 6 discriminator 1 view .LVU2686 - 8424 003c 68B9 cbnz r0, .L417 -1607:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8425 .loc 1 1607 3 is_stmt 1 view .LVU2687 -1607:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8426 .loc 1 1607 37 is_stmt 0 view .LVU2688 - 8427 003e 0023 movs r3, #0 - 8428 0040 0193 str r3, [sp, #4] -1608:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8429 .loc 1 1608 3 is_stmt 1 view .LVU2689 -1608:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8430 .loc 1 1608 38 is_stmt 0 view .LVU2690 - 8431 0042 0293 str r3, [sp, #8] -1609:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 8432 .loc 1 1609 3 is_stmt 1 view .LVU2691 -1609:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 8433 .loc 1 1609 33 is_stmt 0 view .LVU2692 - 8434 0044 0393 str r3, [sp, #12] -1610:Src/main.c **** { - 8435 .loc 1 1610 3 is_stmt 1 view .LVU2693 -1610:Src/main.c **** { - 8436 .loc 1 1610 7 is_stmt 0 view .LVU2694 - 8437 0046 01A9 add r1, sp, #4 - 8438 0048 0648 ldr r0, .L419 - 8439 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 8440 .LVL711: -1610:Src/main.c **** { - 8441 .loc 1 1610 6 discriminator 1 view .LVU2695 - 8442 004e 30B9 cbnz r0, .L418 -1618:Src/main.c **** - 8443 .loc 1 1618 1 view .LVU2696 - 8444 0050 09B0 add sp, sp, #36 - 8445 .LCFI81: - 8446 .cfi_remember_state - 8447 .cfi_def_cfa_offset 4 - 8448 @ sp needed - 8449 0052 5DF804FB ldr pc, [sp], #4 - 8450 .L416: - 8451 .LCFI82: - 8452 .cfi_restore_state -1600:Src/main.c **** } - ARM GAS /tmp/ccYgfTud.s page 534 + 8396 0044 0123 movs r3, #1 + 8397 0046 0193 str r3, [sp, #4] +1024:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8398 .loc 1 1024 3 is_stmt 1 view .LVU2641 +1024:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8399 .loc 1 1024 24 is_stmt 0 view .LVU2642 + 8400 0048 0723 movs r3, #7 + 8401 004a 0293 str r3, [sp, #8] +1025:Src/main.c **** { + 8402 .loc 1 1025 3 is_stmt 1 view .LVU2643 +1025:Src/main.c **** { + 8403 .loc 1 1025 7 is_stmt 0 view .LVU2644 + 8404 004c 6946 mov r1, sp + 8405 004e 1B48 ldr r0, .L462 + 8406 0050 FFF7FEFF bl HAL_ADC_ConfigChannel + 8407 .LVL784: +1025:Src/main.c **** { + 8408 .loc 1 1025 6 discriminator 1 view .LVU2645 + 8409 0054 40BB cbnz r0, .L457 +1032:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 8410 .loc 1 1032 3 is_stmt 1 view .LVU2646 +1032:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 8411 .loc 1 1032 19 is_stmt 0 view .LVU2647 + 8412 0056 0823 movs r3, #8 + 8413 0058 0093 str r3, [sp] +1033:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8414 .loc 1 1033 3 is_stmt 1 view .LVU2648 +1033:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8415 .loc 1 1033 16 is_stmt 0 view .LVU2649 + 8416 005a 0223 movs r3, #2 + 8417 005c 0193 str r3, [sp, #4] +1034:Src/main.c **** { + 8418 .loc 1 1034 3 is_stmt 1 view .LVU2650 +1034:Src/main.c **** { + 8419 .loc 1 1034 7 is_stmt 0 view .LVU2651 + 8420 005e 6946 mov r1, sp + 8421 0060 1648 ldr r0, .L462 + 8422 0062 FFF7FEFF bl HAL_ADC_ConfigChannel + 8423 .LVL785: +1034:Src/main.c **** { + 8424 .loc 1 1034 6 discriminator 1 view .LVU2652 + 8425 0066 08BB cbnz r0, .L458 +1041:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 8426 .loc 1 1041 3 is_stmt 1 view .LVU2653 +1041:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 8427 .loc 1 1041 19 is_stmt 0 view .LVU2654 + 8428 0068 0223 movs r3, #2 + 8429 006a 0093 str r3, [sp] +1042:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8430 .loc 1 1042 3 is_stmt 1 view .LVU2655 +1042:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8431 .loc 1 1042 16 is_stmt 0 view .LVU2656 + 8432 006c 0323 movs r3, #3 + 8433 006e 0193 str r3, [sp, #4] +1043:Src/main.c **** { + 8434 .loc 1 1043 3 is_stmt 1 view .LVU2657 +1043:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 538 - 8453 .loc 1 1600 5 is_stmt 1 view .LVU2697 - 8454 0056 FFF7FEFF bl Error_Handler - 8455 .LVL712: - 8456 .L417: -1605:Src/main.c **** } - 8457 .loc 1 1605 5 view .LVU2698 - 8458 005a FFF7FEFF bl Error_Handler - 8459 .LVL713: - 8460 .L418: -1612:Src/main.c **** } - 8461 .loc 1 1612 5 view .LVU2699 - 8462 005e FFF7FEFF bl Error_Handler - 8463 .LVL714: - 8464 .L420: - 8465 0062 00BF .align 2 - 8466 .L419: - 8467 0064 00000000 .word htim8 - 8468 0068 00040140 .word 1073808384 - 8469 .cfi_endproc - 8470 .LFE1200: - 8472 .section .text.MX_TIM11_Init,"ax",%progbits - 8473 .align 1 - 8474 .syntax unified - 8475 .thumb - 8476 .thumb_func - 8478 MX_TIM11_Init: - 8479 .LFB1202: -1657:Src/main.c **** - 8480 .loc 1 1657 1 view -0 - 8481 .cfi_startproc - 8482 @ args = 0, pretend = 0, frame = 32 - 8483 @ frame_needed = 0, uses_anonymous_args = 0 - 8484 0000 00B5 push {lr} - 8485 .LCFI83: - 8486 .cfi_def_cfa_offset 4 - 8487 .cfi_offset 14, -4 - 8488 0002 89B0 sub sp, sp, #36 - 8489 .LCFI84: - 8490 .cfi_def_cfa_offset 40 -1663:Src/main.c **** - 8491 .loc 1 1663 3 view .LVU2701 -1663:Src/main.c **** - 8492 .loc 1 1663 22 is_stmt 0 view .LVU2702 - 8493 0004 0023 movs r3, #0 - 8494 0006 0193 str r3, [sp, #4] - 8495 0008 0293 str r3, [sp, #8] - 8496 000a 0393 str r3, [sp, #12] - 8497 000c 0493 str r3, [sp, #16] - 8498 000e 0593 str r3, [sp, #20] - 8499 0010 0693 str r3, [sp, #24] - 8500 0012 0793 str r3, [sp, #28] -1668:Src/main.c **** htim11.Init.Prescaler = 1; - 8501 .loc 1 1668 3 is_stmt 1 view .LVU2703 -1668:Src/main.c **** htim11.Init.Prescaler = 1; - 8502 .loc 1 1668 19 is_stmt 0 view .LVU2704 - 8503 0014 1448 ldr r0, .L429 - 8504 0016 154A ldr r2, .L429+4 - ARM GAS /tmp/ccYgfTud.s page 535 + 8435 .loc 1 1043 7 is_stmt 0 view .LVU2658 + 8436 0070 6946 mov r1, sp + 8437 0072 1248 ldr r0, .L462 + 8438 0074 FFF7FEFF bl HAL_ADC_ConfigChannel + 8439 .LVL786: +1043:Src/main.c **** { + 8440 .loc 1 1043 6 discriminator 1 view .LVU2659 + 8441 0078 D0B9 cbnz r0, .L459 +1050:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 8442 .loc 1 1050 3 is_stmt 1 view .LVU2660 +1050:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 8443 .loc 1 1050 19 is_stmt 0 view .LVU2661 + 8444 007a 0A23 movs r3, #10 + 8445 007c 0093 str r3, [sp] +1051:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8446 .loc 1 1051 3 is_stmt 1 view .LVU2662 +1051:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8447 .loc 1 1051 16 is_stmt 0 view .LVU2663 + 8448 007e 0423 movs r3, #4 + 8449 0080 0193 str r3, [sp, #4] +1052:Src/main.c **** { + 8450 .loc 1 1052 3 is_stmt 1 view .LVU2664 +1052:Src/main.c **** { + 8451 .loc 1 1052 7 is_stmt 0 view .LVU2665 + 8452 0082 6946 mov r1, sp + 8453 0084 0D48 ldr r0, .L462 + 8454 0086 FFF7FEFF bl HAL_ADC_ConfigChannel + 8455 .LVL787: +1052:Src/main.c **** { + 8456 .loc 1 1052 6 discriminator 1 view .LVU2666 + 8457 008a 98B9 cbnz r0, .L460 +1059:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 8458 .loc 1 1059 3 is_stmt 1 view .LVU2667 +1059:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 8459 .loc 1 1059 19 is_stmt 0 view .LVU2668 + 8460 008c 0B23 movs r3, #11 + 8461 008e 0093 str r3, [sp] +1060:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8462 .loc 1 1060 3 is_stmt 1 view .LVU2669 +1060:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 8463 .loc 1 1060 16 is_stmt 0 view .LVU2670 + 8464 0090 0523 movs r3, #5 + 8465 0092 0193 str r3, [sp, #4] +1061:Src/main.c **** { + 8466 .loc 1 1061 3 is_stmt 1 view .LVU2671 +1061:Src/main.c **** { + 8467 .loc 1 1061 7 is_stmt 0 view .LVU2672 + 8468 0094 6946 mov r1, sp + 8469 0096 0948 ldr r0, .L462 + 8470 0098 FFF7FEFF bl HAL_ADC_ConfigChannel + 8471 .LVL788: +1061:Src/main.c **** { + 8472 .loc 1 1061 6 discriminator 1 view .LVU2673 + 8473 009c 60B9 cbnz r0, .L461 +1069:Src/main.c **** + 8474 .loc 1 1069 1 view .LVU2674 + 8475 009e 05B0 add sp, sp, #20 + ARM GAS /tmp/ccwR4KB7.s page 539 - 8505 0018 0260 str r2, [r0] -1669:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 8506 .loc 1 1669 3 is_stmt 1 view .LVU2705 -1669:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 8507 .loc 1 1669 25 is_stmt 0 view .LVU2706 - 8508 001a 0122 movs r2, #1 - 8509 001c 4260 str r2, [r0, #4] -1670:Src/main.c **** htim11.Init.Period = 91; - 8510 .loc 1 1670 3 is_stmt 1 view .LVU2707 -1670:Src/main.c **** htim11.Init.Period = 91; - 8511 .loc 1 1670 27 is_stmt 0 view .LVU2708 - 8512 001e 8360 str r3, [r0, #8] -1671:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8513 .loc 1 1671 3 is_stmt 1 view .LVU2709 -1671:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8514 .loc 1 1671 22 is_stmt 0 view .LVU2710 - 8515 0020 5B22 movs r2, #91 - 8516 0022 C260 str r2, [r0, #12] -1672:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 8517 .loc 1 1672 3 is_stmt 1 view .LVU2711 -1672:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 8518 .loc 1 1672 29 is_stmt 0 view .LVU2712 - 8519 0024 0361 str r3, [r0, #16] -1673:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 8520 .loc 1 1673 3 is_stmt 1 view .LVU2713 -1673:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 8521 .loc 1 1673 33 is_stmt 0 view .LVU2714 - 8522 0026 8023 movs r3, #128 - 8523 0028 8361 str r3, [r0, #24] -1674:Src/main.c **** { - 8524 .loc 1 1674 3 is_stmt 1 view .LVU2715 -1674:Src/main.c **** { - 8525 .loc 1 1674 7 is_stmt 0 view .LVU2716 - 8526 002a FFF7FEFF bl HAL_TIM_Base_Init - 8527 .LVL715: -1674:Src/main.c **** { - 8528 .loc 1 1674 6 discriminator 1 view .LVU2717 - 8529 002e A8B9 cbnz r0, .L426 -1678:Src/main.c **** { - 8530 .loc 1 1678 3 is_stmt 1 view .LVU2718 -1678:Src/main.c **** { - 8531 .loc 1 1678 7 is_stmt 0 view .LVU2719 - 8532 0030 0D48 ldr r0, .L429 - 8533 0032 FFF7FEFF bl HAL_TIM_PWM_Init - 8534 .LVL716: -1678:Src/main.c **** { - 8535 .loc 1 1678 6 discriminator 1 view .LVU2720 - 8536 0036 98B9 cbnz r0, .L427 -1682:Src/main.c **** sConfigOC.Pulse = 91; - 8537 .loc 1 1682 3 is_stmt 1 view .LVU2721 -1682:Src/main.c **** sConfigOC.Pulse = 91; - 8538 .loc 1 1682 20 is_stmt 0 view .LVU2722 - 8539 0038 6023 movs r3, #96 - 8540 003a 0193 str r3, [sp, #4] -1683:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 8541 .loc 1 1683 3 is_stmt 1 view .LVU2723 -1683:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - ARM GAS /tmp/ccYgfTud.s page 536 + 8476 .LCFI76: + 8477 .cfi_remember_state + 8478 .cfi_def_cfa_offset 4 + 8479 @ sp needed + 8480 00a0 5DF804FB ldr pc, [sp], #4 + 8481 .L456: + 8482 .LCFI77: + 8483 .cfi_restore_state +1017:Src/main.c **** } + 8484 .loc 1 1017 5 is_stmt 1 view .LVU2675 + 8485 00a4 FFF7FEFF bl Error_Handler + 8486 .LVL789: + 8487 .L457: +1027:Src/main.c **** } + 8488 .loc 1 1027 5 view .LVU2676 + 8489 00a8 FFF7FEFF bl Error_Handler + 8490 .LVL790: + 8491 .L458: +1036:Src/main.c **** } + 8492 .loc 1 1036 5 view .LVU2677 + 8493 00ac FFF7FEFF bl Error_Handler + 8494 .LVL791: + 8495 .L459: +1045:Src/main.c **** } + 8496 .loc 1 1045 5 view .LVU2678 + 8497 00b0 FFF7FEFF bl Error_Handler + 8498 .LVL792: + 8499 .L460: +1054:Src/main.c **** } + 8500 .loc 1 1054 5 view .LVU2679 + 8501 00b4 FFF7FEFF bl Error_Handler + 8502 .LVL793: + 8503 .L461: +1063:Src/main.c **** } + 8504 .loc 1 1063 5 view .LVU2680 + 8505 00b8 FFF7FEFF bl Error_Handler + 8506 .LVL794: + 8507 .L463: + 8508 .align 2 + 8509 .L462: + 8510 00bc 00000000 .word hadc1 + 8511 00c0 00200140 .word 1073815552 + 8512 00c4 0100000F .word 251658241 + 8513 .cfi_endproc + 8514 .LFE1188: + 8516 .section .text.MX_ADC3_Init,"ax",%progbits + 8517 .align 1 + 8518 .syntax unified + 8519 .thumb + 8520 .thumb_func + 8522 MX_ADC3_Init: + 8523 .LFB1189: +1077:Src/main.c **** + 8524 .loc 1 1077 1 view -0 + 8525 .cfi_startproc + 8526 @ args = 0, pretend = 0, frame = 16 + 8527 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccwR4KB7.s page 540 - 8542 .loc 1 1683 19 is_stmt 0 view .LVU2724 - 8543 003c 5B23 movs r3, #91 - 8544 003e 0293 str r3, [sp, #8] -1684:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8545 .loc 1 1684 3 is_stmt 1 view .LVU2725 -1684:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8546 .loc 1 1684 24 is_stmt 0 view .LVU2726 - 8547 0040 0022 movs r2, #0 - 8548 0042 0392 str r2, [sp, #12] -1685:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 8549 .loc 1 1685 3 is_stmt 1 view .LVU2727 -1685:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 8550 .loc 1 1685 24 is_stmt 0 view .LVU2728 - 8551 0044 0592 str r2, [sp, #20] -1686:Src/main.c **** { - 8552 .loc 1 1686 3 is_stmt 1 view .LVU2729 -1686:Src/main.c **** { - 8553 .loc 1 1686 7 is_stmt 0 view .LVU2730 - 8554 0046 01A9 add r1, sp, #4 - 8555 0048 0748 ldr r0, .L429 - 8556 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 8557 .LVL717: -1686:Src/main.c **** { - 8558 .loc 1 1686 6 discriminator 1 view .LVU2731 - 8559 004e 48B9 cbnz r0, .L428 -1693:Src/main.c **** - 8560 .loc 1 1693 3 is_stmt 1 view .LVU2732 - 8561 0050 0548 ldr r0, .L429 - 8562 0052 FFF7FEFF bl HAL_TIM_MspPostInit - 8563 .LVL718: -1695:Src/main.c **** - 8564 .loc 1 1695 1 is_stmt 0 view .LVU2733 - 8565 0056 09B0 add sp, sp, #36 - 8566 .LCFI85: - 8567 .cfi_remember_state - 8568 .cfi_def_cfa_offset 4 - 8569 @ sp needed - 8570 0058 5DF804FB ldr pc, [sp], #4 - 8571 .L426: - 8572 .LCFI86: - 8573 .cfi_restore_state -1676:Src/main.c **** } - 8574 .loc 1 1676 5 is_stmt 1 view .LVU2734 - 8575 005c FFF7FEFF bl Error_Handler - 8576 .LVL719: - 8577 .L427: -1680:Src/main.c **** } - 8578 .loc 1 1680 5 view .LVU2735 - 8579 0060 FFF7FEFF bl Error_Handler - 8580 .LVL720: - 8581 .L428: -1688:Src/main.c **** } - 8582 .loc 1 1688 5 view .LVU2736 - 8583 0064 FFF7FEFF bl Error_Handler - 8584 .LVL721: - 8585 .L430: - 8586 .align 2 - ARM GAS /tmp/ccYgfTud.s page 537 + 8528 0000 00B5 push {lr} + 8529 .LCFI78: + 8530 .cfi_def_cfa_offset 4 + 8531 .cfi_offset 14, -4 + 8532 0002 85B0 sub sp, sp, #20 + 8533 .LCFI79: + 8534 .cfi_def_cfa_offset 24 +1083:Src/main.c **** + 8535 .loc 1 1083 3 view .LVU2682 +1083:Src/main.c **** + 8536 .loc 1 1083 26 is_stmt 0 view .LVU2683 + 8537 0004 0023 movs r3, #0 + 8538 0006 0093 str r3, [sp] + 8539 0008 0193 str r3, [sp, #4] + 8540 000a 0293 str r3, [sp, #8] + 8541 000c 0393 str r3, [sp, #12] +1091:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 8542 .loc 1 1091 3 is_stmt 1 view .LVU2684 +1091:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 8543 .loc 1 1091 18 is_stmt 0 view .LVU2685 + 8544 000e 1448 ldr r0, .L470 + 8545 0010 144A ldr r2, .L470+4 + 8546 0012 0260 str r2, [r0] +1092:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 8547 .loc 1 1092 3 is_stmt 1 view .LVU2686 +1092:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 8548 .loc 1 1092 29 is_stmt 0 view .LVU2687 + 8549 0014 4FF44032 mov r2, #196608 + 8550 0018 4260 str r2, [r0, #4] +1093:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 8551 .loc 1 1093 3 is_stmt 1 view .LVU2688 +1093:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 8552 .loc 1 1093 25 is_stmt 0 view .LVU2689 + 8553 001a 8360 str r3, [r0, #8] +1094:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 8554 .loc 1 1094 3 is_stmt 1 view .LVU2690 +1094:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 8555 .loc 1 1094 27 is_stmt 0 view .LVU2691 + 8556 001c 0361 str r3, [r0, #16] +1095:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 8557 .loc 1 1095 3 is_stmt 1 view .LVU2692 +1095:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 8558 .loc 1 1095 33 is_stmt 0 view .LVU2693 + 8559 001e 8361 str r3, [r0, #24] +1096:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 8560 .loc 1 1096 3 is_stmt 1 view .LVU2694 +1096:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 8561 .loc 1 1096 36 is_stmt 0 view .LVU2695 + 8562 0020 80F82030 strb r3, [r0, #32] +1097:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 8563 .loc 1 1097 3 is_stmt 1 view .LVU2696 +1097:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 8564 .loc 1 1097 35 is_stmt 0 view .LVU2697 + 8565 0024 C362 str r3, [r0, #44] +1098:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 8566 .loc 1 1098 3 is_stmt 1 view .LVU2698 +1098:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + ARM GAS /tmp/ccwR4KB7.s page 541 - 8587 .L429: - 8588 0068 00000000 .word htim11 - 8589 006c 00480140 .word 1073825792 - 8590 .cfi_endproc - 8591 .LFE1202: - 8593 .section .text.MX_TIM4_Init,"ax",%progbits - 8594 .align 1 - 8595 .syntax unified - 8596 .thumb - 8597 .thumb_func - 8599 MX_TIM4_Init: - 8600 .LFB1196: -1407:Src/main.c **** - 8601 .loc 1 1407 1 view -0 - 8602 .cfi_startproc - 8603 @ args = 0, pretend = 0, frame = 56 - 8604 @ frame_needed = 0, uses_anonymous_args = 0 - 8605 0000 00B5 push {lr} - 8606 .LCFI87: - 8607 .cfi_def_cfa_offset 4 - 8608 .cfi_offset 14, -4 - 8609 0002 8FB0 sub sp, sp, #60 - 8610 .LCFI88: - 8611 .cfi_def_cfa_offset 64 -1413:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8612 .loc 1 1413 3 view .LVU2738 -1413:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8613 .loc 1 1413 26 is_stmt 0 view .LVU2739 - 8614 0004 0023 movs r3, #0 - 8615 0006 0A93 str r3, [sp, #40] - 8616 0008 0B93 str r3, [sp, #44] - 8617 000a 0C93 str r3, [sp, #48] - 8618 000c 0D93 str r3, [sp, #52] -1414:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 8619 .loc 1 1414 3 is_stmt 1 view .LVU2740 -1414:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 8620 .loc 1 1414 27 is_stmt 0 view .LVU2741 - 8621 000e 0793 str r3, [sp, #28] - 8622 0010 0893 str r3, [sp, #32] - 8623 0012 0993 str r3, [sp, #36] -1415:Src/main.c **** - 8624 .loc 1 1415 3 is_stmt 1 view .LVU2742 -1415:Src/main.c **** - 8625 .loc 1 1415 22 is_stmt 0 view .LVU2743 - 8626 0014 0093 str r3, [sp] - 8627 0016 0193 str r3, [sp, #4] - 8628 0018 0293 str r3, [sp, #8] - 8629 001a 0393 str r3, [sp, #12] - 8630 001c 0493 str r3, [sp, #16] - 8631 001e 0593 str r3, [sp, #20] - 8632 0020 0693 str r3, [sp, #24] -1420:Src/main.c **** htim4.Init.Prescaler = 0; - 8633 .loc 1 1420 3 is_stmt 1 view .LVU2744 -1420:Src/main.c **** htim4.Init.Prescaler = 0; - 8634 .loc 1 1420 18 is_stmt 0 view .LVU2745 - 8635 0022 1E48 ldr r0, .L443 - 8636 0024 1E4A ldr r2, .L443+4 - ARM GAS /tmp/ccYgfTud.s page 538 + 8567 .loc 1 1098 31 is_stmt 0 view .LVU2699 + 8568 0026 104A ldr r2, .L470+8 + 8569 0028 8262 str r2, [r0, #40] +1099:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 8570 .loc 1 1099 3 is_stmt 1 view .LVU2700 +1099:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 8571 .loc 1 1099 24 is_stmt 0 view .LVU2701 + 8572 002a C360 str r3, [r0, #12] +1100:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 8573 .loc 1 1100 3 is_stmt 1 view .LVU2702 +1100:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 8574 .loc 1 1100 30 is_stmt 0 view .LVU2703 + 8575 002c 0122 movs r2, #1 + 8576 002e C261 str r2, [r0, #28] +1101:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 8577 .loc 1 1101 3 is_stmt 1 view .LVU2704 +1101:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 8578 .loc 1 1101 36 is_stmt 0 view .LVU2705 + 8579 0030 80F83030 strb r3, [r0, #48] +1102:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 8580 .loc 1 1102 3 is_stmt 1 view .LVU2706 +1102:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 8581 .loc 1 1102 27 is_stmt 0 view .LVU2707 + 8582 0034 4261 str r2, [r0, #20] +1103:Src/main.c **** { + 8583 .loc 1 1103 3 is_stmt 1 view .LVU2708 +1103:Src/main.c **** { + 8584 .loc 1 1103 7 is_stmt 0 view .LVU2709 + 8585 0036 FFF7FEFF bl HAL_ADC_Init + 8586 .LVL795: +1103:Src/main.c **** { + 8587 .loc 1 1103 6 discriminator 1 view .LVU2710 + 8588 003a 68B9 cbnz r0, .L468 +1110:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 8589 .loc 1 1110 3 is_stmt 1 view .LVU2711 +1110:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 8590 .loc 1 1110 19 is_stmt 0 view .LVU2712 + 8591 003c 0F23 movs r3, #15 + 8592 003e 0093 str r3, [sp] +1111:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 8593 .loc 1 1111 3 is_stmt 1 view .LVU2713 +1111:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 8594 .loc 1 1111 16 is_stmt 0 view .LVU2714 + 8595 0040 0123 movs r3, #1 + 8596 0042 0193 str r3, [sp, #4] +1112:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 8597 .loc 1 1112 3 is_stmt 1 view .LVU2715 +1112:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 8598 .loc 1 1112 24 is_stmt 0 view .LVU2716 + 8599 0044 0723 movs r3, #7 + 8600 0046 0293 str r3, [sp, #8] +1113:Src/main.c **** { + 8601 .loc 1 1113 3 is_stmt 1 view .LVU2717 +1113:Src/main.c **** { + 8602 .loc 1 1113 7 is_stmt 0 view .LVU2718 + 8603 0048 6946 mov r1, sp + 8604 004a 0548 ldr r0, .L470 + ARM GAS /tmp/ccwR4KB7.s page 542 - 8637 0026 0260 str r2, [r0] -1421:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 8638 .loc 1 1421 3 is_stmt 1 view .LVU2746 -1421:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 8639 .loc 1 1421 24 is_stmt 0 view .LVU2747 - 8640 0028 4360 str r3, [r0, #4] -1422:Src/main.c **** htim4.Init.Period = 45; - 8641 .loc 1 1422 3 is_stmt 1 view .LVU2748 -1422:Src/main.c **** htim4.Init.Period = 45; - 8642 .loc 1 1422 26 is_stmt 0 view .LVU2749 - 8643 002a 8360 str r3, [r0, #8] -1423:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8644 .loc 1 1423 3 is_stmt 1 view .LVU2750 -1423:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8645 .loc 1 1423 21 is_stmt 0 view .LVU2751 - 8646 002c 2D22 movs r2, #45 - 8647 002e C260 str r2, [r0, #12] -1424:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8648 .loc 1 1424 3 is_stmt 1 view .LVU2752 -1424:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8649 .loc 1 1424 28 is_stmt 0 view .LVU2753 - 8650 0030 0361 str r3, [r0, #16] -1425:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 8651 .loc 1 1425 3 is_stmt 1 view .LVU2754 -1425:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 8652 .loc 1 1425 32 is_stmt 0 view .LVU2755 - 8653 0032 8361 str r3, [r0, #24] -1426:Src/main.c **** { - 8654 .loc 1 1426 3 is_stmt 1 view .LVU2756 -1426:Src/main.c **** { - 8655 .loc 1 1426 7 is_stmt 0 view .LVU2757 - 8656 0034 FFF7FEFF bl HAL_TIM_Base_Init - 8657 .LVL722: -1426:Src/main.c **** { - 8658 .loc 1 1426 6 discriminator 1 view .LVU2758 - 8659 0038 30BB cbnz r0, .L438 -1430:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 8660 .loc 1 1430 3 is_stmt 1 view .LVU2759 -1430:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 8661 .loc 1 1430 34 is_stmt 0 view .LVU2760 - 8662 003a 4FF48053 mov r3, #4096 - 8663 003e 0A93 str r3, [sp, #40] -1431:Src/main.c **** { - 8664 .loc 1 1431 3 is_stmt 1 view .LVU2761 -1431:Src/main.c **** { - 8665 .loc 1 1431 7 is_stmt 0 view .LVU2762 - 8666 0040 0AA9 add r1, sp, #40 - 8667 0042 1648 ldr r0, .L443 - 8668 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource - 8669 .LVL723: -1431:Src/main.c **** { - 8670 .loc 1 1431 6 discriminator 1 view .LVU2763 - 8671 0048 00BB cbnz r0, .L439 -1435:Src/main.c **** { - 8672 .loc 1 1435 3 is_stmt 1 view .LVU2764 -1435:Src/main.c **** { - 8673 .loc 1 1435 7 is_stmt 0 view .LVU2765 - ARM GAS /tmp/ccYgfTud.s page 539 + 8605 004c FFF7FEFF bl HAL_ADC_ConfigChannel + 8606 .LVL796: +1113:Src/main.c **** { + 8607 .loc 1 1113 6 discriminator 1 view .LVU2719 + 8608 0050 20B9 cbnz r0, .L469 +1121:Src/main.c **** + 8609 .loc 1 1121 1 view .LVU2720 + 8610 0052 05B0 add sp, sp, #20 + 8611 .LCFI80: + 8612 .cfi_remember_state + 8613 .cfi_def_cfa_offset 4 + 8614 @ sp needed + 8615 0054 5DF804FB ldr pc, [sp], #4 + 8616 .L468: + 8617 .LCFI81: + 8618 .cfi_restore_state +1105:Src/main.c **** } + 8619 .loc 1 1105 5 is_stmt 1 view .LVU2721 + 8620 0058 FFF7FEFF bl Error_Handler + 8621 .LVL797: + 8622 .L469: +1115:Src/main.c **** } + 8623 .loc 1 1115 5 view .LVU2722 + 8624 005c FFF7FEFF bl Error_Handler + 8625 .LVL798: + 8626 .L471: + 8627 .align 2 + 8628 .L470: + 8629 0060 00000000 .word hadc3 + 8630 0064 00220140 .word 1073816064 + 8631 0068 0100000F .word 251658241 + 8632 .cfi_endproc + 8633 .LFE1189: + 8635 .section .text.MX_USART1_UART_Init,"ax",%progbits + 8636 .align 1 + 8637 .syntax unified + 8638 .thumb + 8639 .thumb_func + 8641 MX_USART1_UART_Init: + 8642 .LFB1204: +1788:Src/main.c **** + 8643 .loc 1 1788 1 view -0 + 8644 .cfi_startproc + 8645 @ args = 0, pretend = 0, frame = 208 + 8646 @ frame_needed = 0, uses_anonymous_args = 0 + 8647 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 8648 .LCFI82: + 8649 .cfi_def_cfa_offset 24 + 8650 .cfi_offset 4, -24 + 8651 .cfi_offset 5, -20 + 8652 .cfi_offset 6, -16 + 8653 .cfi_offset 7, -12 + 8654 .cfi_offset 8, -8 + 8655 .cfi_offset 14, -4 + 8656 0004 B4B0 sub sp, sp, #208 + 8657 .LCFI83: + 8658 .cfi_def_cfa_offset 232 + ARM GAS /tmp/ccwR4KB7.s page 543 - 8674 004a 1448 ldr r0, .L443 - 8675 004c FFF7FEFF bl HAL_TIM_PWM_Init - 8676 .LVL724: -1435:Src/main.c **** { - 8677 .loc 1 1435 6 discriminator 1 view .LVU2766 - 8678 0050 F0B9 cbnz r0, .L440 -1439:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8679 .loc 1 1439 3 is_stmt 1 view .LVU2767 -1439:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8680 .loc 1 1439 37 is_stmt 0 view .LVU2768 - 8681 0052 0023 movs r3, #0 - 8682 0054 0793 str r3, [sp, #28] -1440:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 8683 .loc 1 1440 3 is_stmt 1 view .LVU2769 -1440:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 8684 .loc 1 1440 33 is_stmt 0 view .LVU2770 - 8685 0056 0993 str r3, [sp, #36] -1441:Src/main.c **** { - 8686 .loc 1 1441 3 is_stmt 1 view .LVU2771 -1441:Src/main.c **** { - 8687 .loc 1 1441 7 is_stmt 0 view .LVU2772 - 8688 0058 07A9 add r1, sp, #28 - 8689 005a 1048 ldr r0, .L443 - 8690 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 8691 .LVL725: -1441:Src/main.c **** { - 8692 .loc 1 1441 6 discriminator 1 view .LVU2773 - 8693 0060 C0B9 cbnz r0, .L441 -1445:Src/main.c **** sConfigOC.Pulse = 22; - 8694 .loc 1 1445 3 is_stmt 1 view .LVU2774 -1445:Src/main.c **** sConfigOC.Pulse = 22; - 8695 .loc 1 1445 20 is_stmt 0 view .LVU2775 - 8696 0062 6023 movs r3, #96 - 8697 0064 0093 str r3, [sp] -1446:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 8698 .loc 1 1446 3 is_stmt 1 view .LVU2776 -1446:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 8699 .loc 1 1446 19 is_stmt 0 view .LVU2777 - 8700 0066 1623 movs r3, #22 - 8701 0068 0193 str r3, [sp, #4] -1447:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8702 .loc 1 1447 3 is_stmt 1 view .LVU2778 -1447:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8703 .loc 1 1447 24 is_stmt 0 view .LVU2779 - 8704 006a 0023 movs r3, #0 - 8705 006c 0293 str r3, [sp, #8] -1448:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 8706 .loc 1 1448 3 is_stmt 1 view .LVU2780 -1448:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 8707 .loc 1 1448 24 is_stmt 0 view .LVU2781 - 8708 006e 0493 str r3, [sp, #16] -1449:Src/main.c **** { - 8709 .loc 1 1449 3 is_stmt 1 view .LVU2782 -1449:Src/main.c **** { - 8710 .loc 1 1449 7 is_stmt 0 view .LVU2783 - 8711 0070 0822 movs r2, #8 - 8712 0072 6946 mov r1, sp - ARM GAS /tmp/ccYgfTud.s page 540 +1794:Src/main.c **** + 8659 .loc 1 1794 3 view .LVU2724 +1794:Src/main.c **** + 8660 .loc 1 1794 24 is_stmt 0 view .LVU2725 + 8661 0006 0021 movs r1, #0 + 8662 0008 2D91 str r1, [sp, #180] + 8663 000a 2E91 str r1, [sp, #184] + 8664 000c 2F91 str r1, [sp, #188] + 8665 000e 3091 str r1, [sp, #192] + 8666 0010 3191 str r1, [sp, #196] + 8667 0012 3291 str r1, [sp, #200] + 8668 0014 3391 str r1, [sp, #204] +1796:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 8669 .loc 1 1796 3 is_stmt 1 view .LVU2726 +1796:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 8670 .loc 1 1796 23 is_stmt 0 view .LVU2727 + 8671 0016 2791 str r1, [sp, #156] + 8672 0018 2891 str r1, [sp, #160] + 8673 001a 2991 str r1, [sp, #164] + 8674 001c 2A91 str r1, [sp, #168] + 8675 001e 2B91 str r1, [sp, #172] + 8676 0020 2C91 str r1, [sp, #176] +1797:Src/main.c **** + 8677 .loc 1 1797 3 is_stmt 1 view .LVU2728 +1797:Src/main.c **** + 8678 .loc 1 1797 28 is_stmt 0 view .LVU2729 + 8679 0022 9022 movs r2, #144 + 8680 0024 03A8 add r0, sp, #12 + 8681 0026 FFF7FEFF bl memset + 8682 .LVL799: +1801:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 8683 .loc 1 1801 3 is_stmt 1 view .LVU2730 +1801:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 8684 .loc 1 1801 44 is_stmt 0 view .LVU2731 + 8685 002a 4023 movs r3, #64 + 8686 002c 0393 str r3, [sp, #12] +1802:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + 8687 .loc 1 1802 3 is_stmt 1 view .LVU2732 +1803:Src/main.c **** { + 8688 .loc 1 1803 3 view .LVU2733 +1803:Src/main.c **** { + 8689 .loc 1 1803 7 is_stmt 0 view .LVU2734 + 8690 002e 03A8 add r0, sp, #12 + 8691 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig + 8692 .LVL800: +1803:Src/main.c **** { + 8693 .loc 1 1803 6 discriminator 1 view .LVU2735 + 8694 0034 0028 cmp r0, #0 + 8695 0036 40F09E80 bne .L475 +1809:Src/main.c **** + 8696 .loc 1 1809 3 is_stmt 1 view .LVU2736 + 8697 .LVL801: + 8698 .LBB602: + 8699 .LBI602: +1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 8700 .loc 3 1587 22 view .LVU2737 + 8701 .LBB603: + ARM GAS /tmp/ccwR4KB7.s page 544 - 8713 0074 0948 ldr r0, .L443 - 8714 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 8715 .LVL726: -1449:Src/main.c **** { - 8716 .loc 1 1449 6 discriminator 1 view .LVU2784 - 8717 007a 68B9 cbnz r0, .L442 -1456:Src/main.c **** - 8718 .loc 1 1456 3 is_stmt 1 view .LVU2785 - 8719 007c 0748 ldr r0, .L443 - 8720 007e FFF7FEFF bl HAL_TIM_MspPostInit - 8721 .LVL727: -1458:Src/main.c **** - 8722 .loc 1 1458 1 is_stmt 0 view .LVU2786 - 8723 0082 0FB0 add sp, sp, #60 - 8724 .LCFI89: - 8725 .cfi_remember_state - 8726 .cfi_def_cfa_offset 4 - 8727 @ sp needed - 8728 0084 5DF804FB ldr pc, [sp], #4 - 8729 .L438: - 8730 .LCFI90: - 8731 .cfi_restore_state -1428:Src/main.c **** } - 8732 .loc 1 1428 5 is_stmt 1 view .LVU2787 - 8733 0088 FFF7FEFF bl Error_Handler - 8734 .LVL728: - 8735 .L439: -1433:Src/main.c **** } - 8736 .loc 1 1433 5 view .LVU2788 - 8737 008c FFF7FEFF bl Error_Handler - 8738 .LVL729: - 8739 .L440: -1437:Src/main.c **** } - 8740 .loc 1 1437 5 view .LVU2789 - 8741 0090 FFF7FEFF bl Error_Handler - 8742 .LVL730: - 8743 .L441: -1443:Src/main.c **** } - 8744 .loc 1 1443 5 view .LVU2790 - 8745 0094 FFF7FEFF bl Error_Handler - 8746 .LVL731: - 8747 .L442: -1451:Src/main.c **** } - 8748 .loc 1 1451 5 view .LVU2791 - 8749 0098 FFF7FEFF bl Error_Handler - 8750 .LVL732: - 8751 .L444: - 8752 .align 2 - 8753 .L443: - 8754 009c 00000000 .word htim4 - 8755 00a0 00080040 .word 1073743872 - 8756 .cfi_endproc - 8757 .LFE1196: - 8759 .section .text.SystemClock_Config,"ax",%progbits - 8760 .align 1 - 8761 .global SystemClock_Config - 8762 .syntax unified - ARM GAS /tmp/ccYgfTud.s page 541 +1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); + 8702 .loc 3 1589 3 view .LVU2738 +1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 8703 .loc 3 1590 3 view .LVU2739 + 8704 003a 504B ldr r3, .L476 + 8705 003c 5A6C ldr r2, [r3, #68] + 8706 003e 42F01002 orr r2, r2, #16 + 8707 0042 5A64 str r2, [r3, #68] +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 8708 .loc 3 1592 3 view .LVU2740 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 8709 .loc 3 1592 12 is_stmt 0 view .LVU2741 + 8710 0044 5A6C ldr r2, [r3, #68] + 8711 0046 02F01002 and r2, r2, #16 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 8712 .loc 3 1592 10 view .LVU2742 + 8713 004a 0292 str r2, [sp, #8] + 8714 .loc 3 1593 3 is_stmt 1 view .LVU2743 + 8715 004c 029A ldr r2, [sp, #8] + 8716 .LVL802: + 8717 .loc 3 1593 3 is_stmt 0 view .LVU2744 + 8718 .LBE603: + 8719 .LBE602: +1811:Src/main.c **** /**USART1 GPIO Configuration + 8720 .loc 1 1811 3 is_stmt 1 view .LVU2745 + 8721 .LBB604: + 8722 .LBI604: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 8723 .loc 3 309 22 view .LVU2746 + 8724 .LBB605: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 8725 .loc 3 311 3 view .LVU2747 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 8726 .loc 3 312 3 view .LVU2748 + 8727 004e 1A6B ldr r2, [r3, #48] + 8728 0050 42F00102 orr r2, r2, #1 + 8729 0054 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 8730 .loc 3 314 3 view .LVU2749 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 8731 .loc 3 314 12 is_stmt 0 view .LVU2750 + 8732 0056 1B6B ldr r3, [r3, #48] + 8733 0058 03F00103 and r3, r3, #1 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 8734 .loc 3 314 10 view .LVU2751 + 8735 005c 0193 str r3, [sp, #4] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 8736 .loc 3 315 3 is_stmt 1 view .LVU2752 + 8737 005e 019B ldr r3, [sp, #4] + 8738 .LVL803: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 8739 .loc 3 315 3 is_stmt 0 view .LVU2753 + 8740 .LBE605: + 8741 .LBE604: +1816:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 8742 .loc 1 1816 3 is_stmt 1 view .LVU2754 +1816:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + ARM GAS /tmp/ccwR4KB7.s page 545 - 8763 .thumb - 8764 .thumb_func - 8766 SystemClock_Config: - 8767 .LFB1187: - 885:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8768 .loc 1 885 1 view -0 - 8769 .cfi_startproc - 8770 @ args = 0, pretend = 0, frame = 80 - 8771 @ frame_needed = 0, uses_anonymous_args = 0 - 8772 0000 00B5 push {lr} - 8773 .LCFI91: - 8774 .cfi_def_cfa_offset 4 - 8775 .cfi_offset 14, -4 - 8776 0002 95B0 sub sp, sp, #84 - 8777 .LCFI92: - 8778 .cfi_def_cfa_offset 88 - 886:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8779 .loc 1 886 3 view .LVU2793 - 886:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8780 .loc 1 886 22 is_stmt 0 view .LVU2794 - 8781 0004 3422 movs r2, #52 - 8782 0006 0021 movs r1, #0 - 8783 0008 07A8 add r0, sp, #28 - 8784 000a FFF7FEFF bl memset - 8785 .LVL733: - 887:Src/main.c **** - 8786 .loc 1 887 3 is_stmt 1 view .LVU2795 - 887:Src/main.c **** - 8787 .loc 1 887 22 is_stmt 0 view .LVU2796 - 8788 000e 0023 movs r3, #0 - 8789 0010 0293 str r3, [sp, #8] - 8790 0012 0393 str r3, [sp, #12] - 8791 0014 0493 str r3, [sp, #16] - 8792 0016 0593 str r3, [sp, #20] - 8793 0018 0693 str r3, [sp, #24] - 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8794 .loc 1 891 3 is_stmt 1 view .LVU2797 - 8795 .LBB618: - 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8796 .loc 1 891 3 view .LVU2798 - 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8797 .loc 1 891 3 view .LVU2799 - 8798 001a 244B ldr r3, .L453 - 8799 001c 1A6C ldr r2, [r3, #64] - 8800 001e 42F08052 orr r2, r2, #268435456 - 8801 0022 1A64 str r2, [r3, #64] - 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8802 .loc 1 891 3 view .LVU2800 - 8803 0024 1B6C ldr r3, [r3, #64] - 8804 0026 03F08053 and r3, r3, #268435456 - 8805 002a 0093 str r3, [sp] - 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8806 .loc 1 891 3 view .LVU2801 - 8807 002c 009B ldr r3, [sp] - 8808 .LBE618: - 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8809 .loc 1 891 3 view .LVU2802 - ARM GAS /tmp/ccYgfTud.s page 542 + 8743 .loc 1 1816 23 is_stmt 0 view .LVU2755 + 8744 0060 4FF40073 mov r3, #512 + 8745 0064 2793 str r3, [sp, #156] +1817:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 8746 .loc 1 1817 3 is_stmt 1 view .LVU2756 +1817:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 8747 .loc 1 1817 24 is_stmt 0 view .LVU2757 + 8748 0066 4FF00208 mov r8, #2 + 8749 006a CDF8A080 str r8, [sp, #160] +1818:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 8750 .loc 1 1818 3 is_stmt 1 view .LVU2758 +1818:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 8751 .loc 1 1818 25 is_stmt 0 view .LVU2759 + 8752 006e 0327 movs r7, #3 + 8753 0070 2997 str r7, [sp, #164] +1819:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 8754 .loc 1 1819 3 is_stmt 1 view .LVU2760 +1819:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 8755 .loc 1 1819 30 is_stmt 0 view .LVU2761 + 8756 0072 0024 movs r4, #0 + 8757 0074 2A94 str r4, [sp, #168] +1820:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 8758 .loc 1 1820 3 is_stmt 1 view .LVU2762 +1820:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 8759 .loc 1 1820 24 is_stmt 0 view .LVU2763 + 8760 0076 2B94 str r4, [sp, #172] +1821:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 8761 .loc 1 1821 3 is_stmt 1 view .LVU2764 +1821:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 8762 .loc 1 1821 29 is_stmt 0 view .LVU2765 + 8763 0078 0726 movs r6, #7 + 8764 007a 2C96 str r6, [sp, #176] +1822:Src/main.c **** + 8765 .loc 1 1822 3 is_stmt 1 view .LVU2766 + 8766 007c 404D ldr r5, .L476+4 + 8767 007e 27A9 add r1, sp, #156 + 8768 0080 2846 mov r0, r5 + 8769 0082 FFF7FEFF bl LL_GPIO_Init + 8770 .LVL804: +1824:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 8771 .loc 1 1824 3 view .LVU2767 +1824:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 8772 .loc 1 1824 23 is_stmt 0 view .LVU2768 + 8773 0086 4FF48063 mov r3, #1024 + 8774 008a 2793 str r3, [sp, #156] +1825:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 8775 .loc 1 1825 3 is_stmt 1 view .LVU2769 +1825:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 8776 .loc 1 1825 24 is_stmt 0 view .LVU2770 + 8777 008c CDF8A080 str r8, [sp, #160] +1826:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 8778 .loc 1 1826 3 is_stmt 1 view .LVU2771 +1826:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 8779 .loc 1 1826 25 is_stmt 0 view .LVU2772 + 8780 0090 2997 str r7, [sp, #164] +1827:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 8781 .loc 1 1827 3 is_stmt 1 view .LVU2773 + ARM GAS /tmp/ccwR4KB7.s page 546 - 892:Src/main.c **** - 8810 .loc 1 892 3 view .LVU2803 - 8811 .LBB619: - 892:Src/main.c **** - 8812 .loc 1 892 3 view .LVU2804 - 892:Src/main.c **** - 8813 .loc 1 892 3 view .LVU2805 - 8814 002e 204B ldr r3, .L453+4 - 8815 0030 1A68 ldr r2, [r3] - 8816 0032 42F44042 orr r2, r2, #49152 - 8817 0036 1A60 str r2, [r3] - 892:Src/main.c **** - 8818 .loc 1 892 3 view .LVU2806 - 8819 0038 1B68 ldr r3, [r3] - 8820 003a 03F44043 and r3, r3, #49152 - 8821 003e 0193 str r3, [sp, #4] - 892:Src/main.c **** - 8822 .loc 1 892 3 view .LVU2807 - 8823 0040 019B ldr r3, [sp, #4] - 8824 .LBE619: - 892:Src/main.c **** - 8825 .loc 1 892 3 view .LVU2808 - 897:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8826 .loc 1 897 3 view .LVU2809 - 897:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8827 .loc 1 897 36 is_stmt 0 view .LVU2810 - 8828 0042 0123 movs r3, #1 - 8829 0044 0793 str r3, [sp, #28] - 898:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8830 .loc 1 898 3 is_stmt 1 view .LVU2811 - 898:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8831 .loc 1 898 30 is_stmt 0 view .LVU2812 - 8832 0046 4FF48033 mov r3, #65536 - 8833 004a 0893 str r3, [sp, #32] - 899:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8834 .loc 1 899 3 is_stmt 1 view .LVU2813 - 899:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8835 .loc 1 899 34 is_stmt 0 view .LVU2814 - 8836 004c 0223 movs r3, #2 - 8837 004e 0D93 str r3, [sp, #52] - 900:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 8838 .loc 1 900 3 is_stmt 1 view .LVU2815 - 900:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 8839 .loc 1 900 35 is_stmt 0 view .LVU2816 - 8840 0050 4FF48002 mov r2, #4194304 - 8841 0054 0E92 str r2, [sp, #56] - 901:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 8842 .loc 1 901 3 is_stmt 1 view .LVU2817 - 901:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 8843 .loc 1 901 30 is_stmt 0 view .LVU2818 - 8844 0056 1922 movs r2, #25 - 8845 0058 0F92 str r2, [sp, #60] - 902:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 8846 .loc 1 902 3 is_stmt 1 view .LVU2819 - 902:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 8847 .loc 1 902 30 is_stmt 0 view .LVU2820 - 8848 005a 4FF4B872 mov r2, #368 - ARM GAS /tmp/ccYgfTud.s page 543 +1827:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 8782 .loc 1 1827 30 is_stmt 0 view .LVU2774 + 8783 0092 2A94 str r4, [sp, #168] +1828:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 8784 .loc 1 1828 3 is_stmt 1 view .LVU2775 +1828:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 8785 .loc 1 1828 24 is_stmt 0 view .LVU2776 + 8786 0094 2B94 str r4, [sp, #172] +1829:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 8787 .loc 1 1829 3 is_stmt 1 view .LVU2777 +1829:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 8788 .loc 1 1829 29 is_stmt 0 view .LVU2778 + 8789 0096 2C96 str r6, [sp, #176] +1830:Src/main.c **** + 8790 .loc 1 1830 3 is_stmt 1 view .LVU2779 + 8791 0098 27A9 add r1, sp, #156 + 8792 009a 2846 mov r0, r5 + 8793 009c FFF7FEFF bl LL_GPIO_Init + 8794 .LVL805: +1835:Src/main.c **** + 8795 .loc 1 1835 3 view .LVU2780 + 8796 .LBB606: + 8797 .LBI606: +1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8798 .loc 6 1032 22 view .LVU2781 + 8799 .LBB607: +1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8800 .loc 6 1034 3 view .LVU2782 + 8801 00a0 384B ldr r3, .L476+8 + 8802 00a2 D3F8B820 ldr r2, [r3, #184] + 8803 00a6 22F0F052 bic r2, r2, #503316480 + 8804 00aa 42F00062 orr r2, r2, #134217728 + 8805 00ae C3F8B820 str r2, [r3, #184] + 8806 .LVL806: +1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8807 .loc 6 1034 3 is_stmt 0 view .LVU2783 + 8808 .LBE607: + 8809 .LBE606: +1837:Src/main.c **** + 8810 .loc 1 1837 3 is_stmt 1 view .LVU2784 + 8811 .LBB608: + 8812 .LBI608: + 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8813 .loc 6 598 22 view .LVU2785 + 8814 .LBB609: + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8815 .loc 6 600 3 view .LVU2786 + 8816 00b2 D3F8B820 ldr r2, [r3, #184] + 8817 00b6 22F0C002 bic r2, r2, #192 + 8818 00ba 42F04002 orr r2, r2, #64 + 8819 00be C3F8B820 str r2, [r3, #184] + 8820 .LVL807: + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8821 .loc 6 600 3 is_stmt 0 view .LVU2787 + 8822 .LBE609: + 8823 .LBE608: +1839:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 547 - 8849 005e 1092 str r2, [sp, #64] - 903:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 8850 .loc 1 903 3 is_stmt 1 view .LVU2821 - 903:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 8851 .loc 1 903 30 is_stmt 0 view .LVU2822 - 8852 0060 1193 str r3, [sp, #68] - 904:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 8853 .loc 1 904 3 is_stmt 1 view .LVU2823 - 904:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 8854 .loc 1 904 30 is_stmt 0 view .LVU2824 - 8855 0062 0822 movs r2, #8 - 8856 0064 1292 str r2, [sp, #72] - 905:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8857 .loc 1 905 3 is_stmt 1 view .LVU2825 - 905:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8858 .loc 1 905 30 is_stmt 0 view .LVU2826 - 8859 0066 1393 str r3, [sp, #76] - 906:Src/main.c **** { - 8860 .loc 1 906 3 is_stmt 1 view .LVU2827 - 906:Src/main.c **** { - 8861 .loc 1 906 7 is_stmt 0 view .LVU2828 - 8862 0068 07A8 add r0, sp, #28 - 8863 006a FFF7FEFF bl HAL_RCC_OscConfig - 8864 .LVL734: - 906:Src/main.c **** { - 8865 .loc 1 906 6 discriminator 1 view .LVU2829 - 8866 006e B0B9 cbnz r0, .L450 - 913:Src/main.c **** { - 8867 .loc 1 913 3 is_stmt 1 view .LVU2830 - 913:Src/main.c **** { - 8868 .loc 1 913 7 is_stmt 0 view .LVU2831 - 8869 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive - 8870 .LVL735: - 913:Src/main.c **** { - 8871 .loc 1 913 6 discriminator 1 view .LVU2832 - 8872 0074 A8B9 cbnz r0, .L451 - 920:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 8873 .loc 1 920 3 is_stmt 1 view .LVU2833 - 920:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 8874 .loc 1 920 31 is_stmt 0 view .LVU2834 - 8875 0076 0F23 movs r3, #15 - 8876 0078 0293 str r3, [sp, #8] - 922:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8877 .loc 1 922 3 is_stmt 1 view .LVU2835 - 922:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8878 .loc 1 922 34 is_stmt 0 view .LVU2836 - 8879 007a 0223 movs r3, #2 - 8880 007c 0393 str r3, [sp, #12] - 923:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 8881 .loc 1 923 3 is_stmt 1 view .LVU2837 - 923:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 8882 .loc 1 923 35 is_stmt 0 view .LVU2838 - 8883 007e 0023 movs r3, #0 - 8884 0080 0493 str r3, [sp, #16] - 924:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 8885 .loc 1 924 3 is_stmt 1 view .LVU2839 - 924:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - ARM GAS /tmp/ccYgfTud.s page 544 + 8824 .loc 1 1839 3 is_stmt 1 view .LVU2788 + 8825 .LBB610: + 8826 .LBI610: + 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8827 .loc 6 924 22 view .LVU2789 + 8828 .LBB611: + 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8829 .loc 6 926 3 view .LVU2790 + 8830 00c2 D3F8B820 ldr r2, [r3, #184] + 8831 00c6 42F44032 orr r2, r2, #196608 + 8832 00ca C3F8B820 str r2, [r3, #184] + 8833 .LVL808: + 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8834 .loc 6 926 3 is_stmt 0 view .LVU2791 + 8835 .LBE611: + 8836 .LBE610: +1841:Src/main.c **** + 8837 .loc 1 1841 3 is_stmt 1 view .LVU2792 + 8838 .LBB612: + 8839 .LBI612: + 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8840 .loc 6 646 22 view .LVU2793 + 8841 .LBB613: + 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8842 .loc 6 648 3 view .LVU2794 + 8843 00ce D3F8B820 ldr r2, [r3, #184] + 8844 00d2 22F49072 bic r2, r2, #288 + 8845 00d6 C3F8B820 str r2, [r3, #184] + 8846 .LVL809: + 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8847 .loc 6 648 3 is_stmt 0 view .LVU2795 + 8848 .LBE613: + 8849 .LBE612: +1843:Src/main.c **** + 8850 .loc 1 1843 3 is_stmt 1 view .LVU2796 + 8851 .LBB614: + 8852 .LBI614: + 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8853 .loc 6 693 22 view .LVU2797 + 8854 .LBB615: + 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8855 .loc 6 695 3 view .LVU2798 + 8856 00da D3F8B820 ldr r2, [r3, #184] + 8857 00de 22F40072 bic r2, r2, #512 + 8858 00e2 C3F8B820 str r2, [r3, #184] + 8859 .LVL810: + 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8860 .loc 6 695 3 is_stmt 0 view .LVU2799 + 8861 .LBE615: + 8862 .LBE614: +1845:Src/main.c **** + 8863 .loc 1 1845 3 is_stmt 1 view .LVU2800 + 8864 .LBB616: + 8865 .LBI616: + 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8866 .loc 6 738 22 view .LVU2801 + 8867 .LBB617: + ARM GAS /tmp/ccwR4KB7.s page 548 - 8886 .loc 1 924 36 is_stmt 0 view .LVU2840 - 8887 0082 4FF4A053 mov r3, #5120 - 8888 0086 0593 str r3, [sp, #20] - 925:Src/main.c **** - 8889 .loc 1 925 3 is_stmt 1 view .LVU2841 - 925:Src/main.c **** - 8890 .loc 1 925 36 is_stmt 0 view .LVU2842 - 8891 0088 4FF48053 mov r3, #4096 - 8892 008c 0693 str r3, [sp, #24] - 927:Src/main.c **** { - 8893 .loc 1 927 3 is_stmt 1 view .LVU2843 - 927:Src/main.c **** { - 8894 .loc 1 927 7 is_stmt 0 view .LVU2844 - 8895 008e 0621 movs r1, #6 - 8896 0090 02A8 add r0, sp, #8 - 8897 0092 FFF7FEFF bl HAL_RCC_ClockConfig - 8898 .LVL736: - 927:Src/main.c **** { - 8899 .loc 1 927 6 discriminator 1 view .LVU2845 - 8900 0096 30B9 cbnz r0, .L452 - 931:Src/main.c **** - 8901 .loc 1 931 1 view .LVU2846 - 8902 0098 15B0 add sp, sp, #84 - 8903 .LCFI93: - 8904 .cfi_remember_state - 8905 .cfi_def_cfa_offset 4 - 8906 @ sp needed - 8907 009a 5DF804FB ldr pc, [sp], #4 - 8908 .L450: - 8909 .LCFI94: - 8910 .cfi_restore_state - 908:Src/main.c **** } - 8911 .loc 1 908 5 is_stmt 1 view .LVU2847 - 8912 009e FFF7FEFF bl Error_Handler - 8913 .LVL737: - 8914 .L451: - 915:Src/main.c **** } - 8915 .loc 1 915 5 view .LVU2848 - 8916 00a2 FFF7FEFF bl Error_Handler - 8917 .LVL738: - 8918 .L452: - 929:Src/main.c **** } - 8919 .loc 1 929 5 view .LVU2849 - 8920 00a6 FFF7FEFF bl Error_Handler - 8921 .LVL739: - 8922 .L454: - 8923 00aa 00BF .align 2 - 8924 .L453: - 8925 00ac 00380240 .word 1073887232 - 8926 00b0 00700040 .word 1073770496 - 8927 .cfi_endproc - 8928 .LFE1187: - 8930 .section .text.main,"ax",%progbits - 8931 .align 1 - 8932 .global main - 8933 .syntax unified - 8934 .thumb - ARM GAS /tmp/ccYgfTud.s page 545 + 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8868 .loc 6 740 3 view .LVU2802 + 8869 00e6 D3F8B820 ldr r2, [r3, #184] + 8870 00ea 42F48062 orr r2, r2, #1024 + 8871 00ee C3F8B820 str r2, [r3, #184] + 8872 .LVL811: + 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8873 .loc 6 740 3 is_stmt 0 view .LVU2803 + 8874 .LBE617: + 8875 .LBE616: +1847:Src/main.c **** + 8876 .loc 1 1847 3 is_stmt 1 view .LVU2804 + 8877 .LBB618: + 8878 .LBI618: + 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8879 .loc 6 784 22 view .LVU2805 + 8880 .LBB619: + 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8881 .loc 6 786 3 view .LVU2806 + 8882 00f2 D3F8B820 ldr r2, [r3, #184] + 8883 00f6 22F4C052 bic r2, r2, #6144 + 8884 00fa C3F8B820 str r2, [r3, #184] + 8885 .LVL812: + 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8886 .loc 6 786 3 is_stmt 0 view .LVU2807 + 8887 .LBE619: + 8888 .LBE618: +1849:Src/main.c **** + 8889 .loc 1 1849 3 is_stmt 1 view .LVU2808 + 8890 .LBB620: + 8891 .LBI620: + 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8892 .loc 6 831 22 view .LVU2809 + 8893 .LBB621: + 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8894 .loc 6 833 3 view .LVU2810 + 8895 00fe D3F8B820 ldr r2, [r3, #184] + 8896 0102 22F4C042 bic r2, r2, #24576 + 8897 0106 C3F8B820 str r2, [r3, #184] + 8898 .LVL813: + 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8899 .loc 6 833 3 is_stmt 0 view .LVU2811 + 8900 .LBE621: + 8901 .LBE620: +1851:Src/main.c **** + 8902 .loc 1 1851 3 is_stmt 1 view .LVU2812 + 8903 .LBB622: + 8904 .LBI622: +1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + 8905 .loc 6 1299 22 view .LVU2813 + 8906 .LBB623: +1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8907 .loc 6 1301 3 view .LVU2814 + 8908 010a D3F8CC20 ldr r2, [r3, #204] + 8909 010e 22F00402 bic r2, r2, #4 + 8910 0112 C3F8CC20 str r2, [r3, #204] + 8911 .LVL814: + ARM GAS /tmp/ccwR4KB7.s page 549 - 8935 .thumb_func - 8937 main: - 8938 .LFB1186: - 202:Src/main.c **** - 8939 .loc 1 202 1 view -0 - 8940 .cfi_startproc - 8941 @ args = 0, pretend = 0, frame = 8 - 8942 @ frame_needed = 0, uses_anonymous_args = 0 - 8943 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} - 8944 .LCFI95: - 8945 .cfi_def_cfa_offset 28 - 8946 .cfi_offset 4, -28 - 8947 .cfi_offset 5, -24 - 8948 .cfi_offset 6, -20 - 8949 .cfi_offset 7, -16 - 8950 .cfi_offset 8, -12 - 8951 .cfi_offset 9, -8 - 8952 .cfi_offset 14, -4 - 8953 0004 85B0 sub sp, sp, #20 - 8954 .LCFI96: - 8955 .cfi_def_cfa_offset 48 - 205:Src/main.c **** /* USER CODE END 1 */ - 8956 .loc 1 205 2 view .LVU2851 - 211:Src/main.c **** - 8957 .loc 1 211 3 view .LVU2852 - 8958 0006 FFF7FEFF bl HAL_Init - 8959 .LVL740: - 218:Src/main.c **** - 8960 .loc 1 218 3 view .LVU2853 - 8961 000a FFF7FEFF bl SystemClock_Config - 8962 .LVL741: - 225:Src/main.c **** MX_DMA_Init(); - 8963 .loc 1 225 3 view .LVU2854 - 8964 000e FFF7FEFF bl MX_GPIO_Init - 8965 .LVL742: - 226:Src/main.c **** MX_SPI4_Init(); - 8966 .loc 1 226 3 view .LVU2855 - 8967 0012 FFF7FEFF bl MX_DMA_Init - 8968 .LVL743: - 227:Src/main.c **** MX_FATFS_Init(); - 8969 .loc 1 227 3 view .LVU2856 - 8970 0016 FFF7FEFF bl MX_SPI4_Init - 8971 .LVL744: - 228:Src/main.c **** MX_TIM2_Init(); - 8972 .loc 1 228 3 view .LVU2857 - 8973 001a FFF7FEFF bl MX_FATFS_Init - 8974 .LVL745: - 229:Src/main.c **** MX_TIM5_Init(); - 8975 .loc 1 229 3 view .LVU2858 - 8976 001e FFF7FEFF bl MX_TIM2_Init - 8977 .LVL746: - 230:Src/main.c **** MX_ADC1_Init(); - 8978 .loc 1 230 3 view .LVU2859 - 8979 0022 FFF7FEFF bl MX_TIM5_Init - 8980 .LVL747: - 231:Src/main.c **** MX_ADC3_Init(); - 8981 .loc 1 231 3 view .LVU2860 - ARM GAS /tmp/ccYgfTud.s page 546 - - - 8982 0026 FFF7FEFF bl MX_ADC1_Init - 8983 .LVL748: - 232:Src/main.c **** MX_SPI2_Init(); - 8984 .loc 1 232 3 view .LVU2861 - 8985 002a FFF7FEFF bl MX_ADC3_Init - 8986 .LVL749: - 233:Src/main.c **** MX_SPI5_Init(); - 8987 .loc 1 233 3 view .LVU2862 - 8988 002e FFF7FEFF bl MX_SPI2_Init - 8989 .LVL750: - 234:Src/main.c **** MX_SPI6_Init(); - 8990 .loc 1 234 3 view .LVU2863 - 8991 0032 FFF7FEFF bl MX_SPI5_Init - 8992 .LVL751: - 235:Src/main.c **** MX_USART1_UART_Init(); - 8993 .loc 1 235 3 view .LVU2864 - 8994 0036 FFF7FEFF bl MX_SPI6_Init - 8995 .LVL752: - 236:Src/main.c **** MX_SDMMC1_SD_Init(); - 8996 .loc 1 236 3 view .LVU2865 - 8997 003a FFF7FEFF bl MX_USART1_UART_Init - 8998 .LVL753: - 237:Src/main.c **** MX_TIM7_Init(); - 8999 .loc 1 237 3 view .LVU2866 - 9000 003e FFF7FEFF bl MX_SDMMC1_SD_Init - 9001 .LVL754: - 238:Src/main.c **** MX_TIM6_Init(); - 9002 .loc 1 238 3 view .LVU2867 - 9003 0042 FFF7FEFF bl MX_TIM7_Init - 9004 .LVL755: - 239:Src/main.c **** MX_TIM10_Init(); - 9005 .loc 1 239 3 view .LVU2868 - 9006 0046 FFF7FEFF bl MX_TIM6_Init - 9007 .LVL756: - 240:Src/main.c **** MX_UART8_Init(); - 9008 .loc 1 240 3 view .LVU2869 - 9009 004a FFF7FEFF bl MX_TIM10_Init - 9010 .LVL757: - 241:Src/main.c **** MX_TIM8_Init(); - 9011 .loc 1 241 3 view .LVU2870 - 9012 004e FFF7FEFF bl MX_UART8_Init - 9013 .LVL758: - 242:Src/main.c **** MX_TIM11_Init(); - 9014 .loc 1 242 3 view .LVU2871 - 9015 0052 FFF7FEFF bl MX_TIM8_Init - 9016 .LVL759: - 243:Src/main.c **** MX_TIM4_Init(); - 9017 .loc 1 243 3 view .LVU2872 - 9018 0056 FFF7FEFF bl MX_TIM11_Init - 9019 .LVL760: - 244:Src/main.c **** /* USER CODE BEGIN 2 */ - 9020 .loc 1 244 3 view .LVU2873 - 9021 005a FFF7FEFF bl MX_TIM4_Init - 9022 .LVL761: - 246:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 9023 .loc 1 246 2 view .LVU2874 - 9024 005e FFF7FEFF bl Init_params - ARM GAS /tmp/ccYgfTud.s page 547 - - - 9025 .LVL762: - 257:Src/main.c **** - 9026 .loc 1 257 2 view .LVU2875 - 257:Src/main.c **** - 9027 .loc 1 257 14 is_stmt 0 view .LVU2876 - 9028 0062 854A ldr r2, .L531 - 9029 0064 3523 movs r3, #53 - 9030 0066 D362 str r3, [r2, #44] - 259:Src/main.c **** - 9031 .loc 1 259 2 is_stmt 1 view .LVU2877 - 259:Src/main.c **** - 9032 .loc 1 259 23 is_stmt 0 view .LVU2878 - 9033 0068 D36A ldr r3, [r2, #44] - 259:Src/main.c **** - 9034 .loc 1 259 30 view .LVU2879 - 9035 006a 0133 adds r3, r3, #1 - 259:Src/main.c **** - 9036 .loc 1 259 33 view .LVU2880 - 9037 006c 5B08 lsrs r3, r3, #1 - 259:Src/main.c **** - 9038 .loc 1 259 36 view .LVU2881 - 9039 006e 013B subs r3, r3, #1 - 259:Src/main.c **** - 9040 .loc 1 259 15 view .LVU2882 - 9041 0070 D363 str r3, [r2, #60] - 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 9042 .loc 1 264 2 is_stmt 1 view .LVU2883 - 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 9043 .loc 1 264 23 is_stmt 0 view .LVU2884 - 9044 0072 D36A ldr r3, [r2, #44] - 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 9045 .loc 1 264 36 view .LVU2885 - 9046 0074 9B00 lsls r3, r3, #2 - 9047 0076 0333 adds r3, r3, #3 - 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 9048 .loc 1 264 15 view .LVU2886 - 9049 0078 02F5A032 add r2, r2, #81920 - 9050 007c D362 str r3, [r2, #44] - 265:Src/main.c **** - 9051 .loc 1 265 2 is_stmt 1 view .LVU2887 - 265:Src/main.c **** - 9052 .loc 1 265 25 is_stmt 0 view .LVU2888 - 9053 007e D36A ldr r3, [r2, #44] - 265:Src/main.c **** - 9054 .loc 1 265 32 view .LVU2889 - 9055 0080 0133 adds r3, r3, #1 - 265:Src/main.c **** - 9056 .loc 1 265 35 view .LVU2890 - 9057 0082 5B08 lsrs r3, r3, #1 - 265:Src/main.c **** - 9058 .loc 1 265 38 view .LVU2891 - 9059 0084 013B subs r3, r3, #1 - 265:Src/main.c **** - 9060 .loc 1 265 16 view .LVU2892 - 9061 0086 5363 str r3, [r2, #52] - 9062 0088 4CE0 b .L456 - 9063 .L522: - ARM GAS /tmp/ccYgfTud.s page 548 - - - 279:Src/main.c **** { - 9064 .loc 1 279 85 discriminator 1 view .LVU2893 - 9065 008a 7C4B ldr r3, .L531+4 - 9066 008c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 279:Src/main.c **** { - 9067 .loc 1 279 73 discriminator 1 view .LVU2894 - 9068 008e 002B cmp r3, #0 - 9069 0090 4FD1 bne .L457 - 9070 .L458: - 9071 .LBB620: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9072 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2895 - 9073 .LBB621: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9074 .loc 7 3073 3 discriminator 1 view .LVU2896 -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9075 .loc 7 3073 3 discriminator 1 view .LVU2897 -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9076 .loc 7 3073 3 discriminator 1 view .LVU2898 - 9077 .LVL763: - 9078 .LBB622: - 9079 .LBI622: -1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 9080 .loc 8 1068 31 view .LVU2899 - 9081 .LBB623: -1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9082 .loc 8 1070 5 view .LVU2900 -1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 9083 .loc 8 1072 4 view .LVU2901 - 9084 0092 7B4A ldr r2, .L531+8 - 9085 .syntax unified - 9086 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 9087 0094 52E8003F ldrex r3, [r2] - 9088 @ 0 "" 2 - 9089 .LVL764: -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 9090 .loc 8 1073 4 view .LVU2902 -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 9091 .loc 8 1073 4 is_stmt 0 view .LVU2903 - 9092 .thumb - 9093 .syntax unified - 9094 .LBE623: - 9095 .LBE622: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9096 .loc 7 3073 3 discriminator 1 view .LVU2904 - 9097 0098 43F48073 orr r3, r3, #256 - 9098 .LVL765: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9099 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2905 - 9100 .LBB624: - 9101 .LBI624: -1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 9102 .loc 8 1119 31 view .LVU2906 - 9103 .LBB625: -1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9104 .loc 8 1121 4 view .LVU2907 -1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccYgfTud.s page 549 - - - 9105 .loc 8 1123 4 view .LVU2908 - 9106 .syntax unified - 9107 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 9108 009c 42E80031 strex r1, r3, [r2] - 9109 @ 0 "" 2 - 9110 .LVL766: - 9111 .loc 8 1124 4 view .LVU2909 - 9112 .loc 8 1124 4 is_stmt 0 view .LVU2910 - 9113 .thumb - 9114 .syntax unified - 9115 .LBE625: - 9116 .LBE624: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9117 .loc 7 3073 3 discriminator 1 view .LVU2911 - 9118 00a0 0029 cmp r1, #0 - 9119 00a2 F6D1 bne .L458 - 9120 .LVL767: - 9121 .L459: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9122 .loc 7 3073 3 discriminator 1 view .LVU2912 - 9123 .LBE621: - 9124 .LBE620: - 9125 .LBB626: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9126 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2913 - 9127 .LBB627: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9128 .loc 7 3040 3 discriminator 1 view .LVU2914 -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9129 .loc 7 3040 3 discriminator 1 view .LVU2915 -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9130 .loc 7 3040 3 discriminator 1 view .LVU2916 - 9131 .LBB628: - 9132 .LBI628: -1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 9133 .loc 8 1068 31 view .LVU2917 - 9134 .LBB629: -1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9135 .loc 8 1070 5 view .LVU2918 -1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 9136 .loc 8 1072 4 view .LVU2919 - 9137 00a4 764A ldr r2, .L531+8 - 9138 .syntax unified - 9139 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 9140 00a6 52E8003F ldrex r3, [r2] - 9141 @ 0 "" 2 - 9142 .LVL768: -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 9143 .loc 8 1073 4 view .LVU2920 -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 9144 .loc 8 1073 4 is_stmt 0 view .LVU2921 - 9145 .thumb - 9146 .syntax unified - 9147 .LBE629: - 9148 .LBE628: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9149 .loc 7 3040 3 discriminator 1 view .LVU2922 - ARM GAS /tmp/ccYgfTud.s page 550 - - - 9150 00aa 43F02003 orr r3, r3, #32 - 9151 .LVL769: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9152 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2923 - 9153 .LBB630: - 9154 .LBI630: -1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 9155 .loc 8 1119 31 view .LVU2924 - 9156 .LBB631: -1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9157 .loc 8 1121 4 view .LVU2925 -1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 9158 .loc 8 1123 4 view .LVU2926 - 9159 .syntax unified - 9160 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 9161 00ae 42E80031 strex r1, r3, [r2] - 9162 @ 0 "" 2 - 9163 .LVL770: - 9164 .loc 8 1124 4 view .LVU2927 - 9165 .loc 8 1124 4 is_stmt 0 view .LVU2928 - 9166 .thumb - 9167 .syntax unified - 9168 .LBE631: - 9169 .LBE630: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9170 .loc 7 3040 3 discriminator 1 view .LVU2929 - 9171 00b2 0029 cmp r1, #0 - 9172 00b4 F6D1 bne .L459 - 9173 .LVL771: - 9174 .L460: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9175 .loc 7 3040 3 discriminator 1 view .LVU2930 - 9176 .LBE627: - 9177 .LBE626: - 9178 .LBB632: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9179 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2931 - 9180 .LBB633: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9181 .loc 7 3136 3 discriminator 1 view .LVU2932 -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9182 .loc 7 3136 3 discriminator 1 view .LVU2933 -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9183 .loc 7 3136 3 discriminator 1 view .LVU2934 - 9184 .LBB634: - 9185 .LBI634: -1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 9186 .loc 8 1068 31 view .LVU2935 - 9187 .LBB635: -1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9188 .loc 8 1070 5 view .LVU2936 -1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 9189 .loc 8 1072 4 view .LVU2937 - 9190 00b6 724A ldr r2, .L531+8 - 9191 00b8 02F10803 add r3, r2, #8 - 9192 .syntax unified - 9193 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - ARM GAS /tmp/ccYgfTud.s page 551 - - - 9194 00bc 53E8003F ldrex r3, [r3] - 9195 @ 0 "" 2 - 9196 .LVL772: -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 9197 .loc 8 1073 4 view .LVU2938 -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 9198 .loc 8 1073 4 is_stmt 0 view .LVU2939 - 9199 .thumb - 9200 .syntax unified - 9201 .LBE635: - 9202 .LBE634: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9203 .loc 7 3136 3 discriminator 1 view .LVU2940 - 9204 00c0 43F00103 orr r3, r3, #1 - 9205 .LVL773: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9206 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2941 - 9207 .LBB636: - 9208 .LBI636: -1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 9209 .loc 8 1119 31 view .LVU2942 - 9210 .LBB637: -1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9211 .loc 8 1121 4 view .LVU2943 -1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 9212 .loc 8 1123 4 view .LVU2944 - 9213 00c4 0832 adds r2, r2, #8 - 9214 .syntax unified - 9215 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 9216 00c6 42E80031 strex r1, r3, [r2] - 9217 @ 0 "" 2 - 9218 .LVL774: - 9219 .loc 8 1124 4 view .LVU2945 - 9220 .loc 8 1124 4 is_stmt 0 view .LVU2946 - 9221 .thumb - 9222 .syntax unified - 9223 .LBE637: - 9224 .LBE636: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9225 .loc 7 3136 3 discriminator 1 view .LVU2947 - 9226 00ca 0029 cmp r1, #0 - 9227 00cc F3D1 bne .L460 - 9228 .LBE633: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9229 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU2948 - 9230 .LVL775: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9231 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU2949 - 9232 .LBE632: - 285:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 9233 .loc 1 285 4 is_stmt 1 view .LVU2950 - 9234 .LBB638: - 9235 .LBI638: +1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8912 .loc 6 1301 3 is_stmt 0 view .LVU2815 + 8913 .LBE623: + 8914 .LBE622: +1854:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 8915 .loc 1 1854 3 is_stmt 1 view .LVU2816 + 8916 .LBB624: + 8917 .LBI624: +1884:Drivers/CMSIS/Include/core_cm7.h **** { + 8918 .loc 2 1884 26 view .LVU2817 + 8919 .LBB625: +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 8920 .loc 2 1886 3 view .LVU2818 +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 8921 .loc 2 1886 26 is_stmt 0 view .LVU2819 + 8922 0116 1C4B ldr r3, .L476+12 + 8923 0118 D868 ldr r0, [r3, #12] + 8924 .LBE625: + 8925 .LBE624: +1854:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 8926 .loc 1 1854 3 discriminator 1 view .LVU2820 + 8927 011a 2246 mov r2, r4 + 8928 011c 2146 mov r1, r4 + 8929 011e C0F30220 ubfx r0, r0, #8, #3 + 8930 0122 FFF7FEFF bl NVIC_EncodePriority + 8931 .LVL815: + 8932 .LBB626: + 8933 .LBI626: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 9236 .loc 2 2024 22 view .LVU2951 - 9237 .LBB639: + 8934 .loc 2 2024 22 is_stmt 1 view .LVU2821 + 8935 .LBB627: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccYgfTud.s page 552 - - - 9238 .loc 2 2026 3 view .LVU2952 + 8936 .loc 2 2026 3 view .LVU2822 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9239 .loc 2 2028 5 view .LVU2953 + 8937 .loc 2 2028 5 view .LVU2823 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9240 .loc 2 2028 47 is_stmt 0 view .LVU2954 - 9241 00ce 6D4B ldr r3, .L531+12 - 9242 00d0 0022 movs r2, #0 - 9243 00d2 83F82523 strb r2, [r3, #805] - 9244 .LVL776: + 8938 .loc 2 2028 49 is_stmt 0 view .LVU2824 + 8939 0126 0001 lsls r0, r0, #4 + 8940 .LVL816: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9245 .loc 2 2028 47 view .LVU2955 - 9246 .LBE639: - 9247 .LBE638: - 286:Src/main.c **** u_rx_flg = 1; - 9248 .loc 1 286 4 is_stmt 1 view .LVU2956 - 9249 .LBB640: - 9250 .LBI640: + 8941 .loc 2 2028 49 view .LVU2825 + 8942 0128 C0B2 uxtb r0, r0 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 8943 .loc 2 2028 47 view .LVU2826 + 8944 012a 184B ldr r3, .L476+16 + 8945 012c 83F82503 strb r0, [r3, #805] + 8946 .LVL817: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 8947 .loc 2 2028 47 view .LVU2827 + 8948 .LBE627: + 8949 .LBE626: +1855:Src/main.c **** + 8950 .loc 1 1855 3 is_stmt 1 view .LVU2828 + 8951 .LBB628: + 8952 .LBI628: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 9251 .loc 2 1896 22 view .LVU2957 - 9252 .LBB641: + 8953 .loc 2 1896 22 view .LVU2829 + ARM GAS /tmp/ccwR4KB7.s page 550 + + + 8954 .LBB629: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 9253 .loc 2 1898 3 view .LVU2958 + 8955 .loc 2 1898 3 view .LVU2830 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9254 .loc 2 1900 5 view .LVU2959 + 8956 .loc 2 1900 5 view .LVU2831 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9255 .loc 2 1900 43 is_stmt 0 view .LVU2960 - 9256 00d6 2022 movs r2, #32 - 9257 00d8 5A60 str r2, [r3, #4] - 9258 .LVL777: + 8957 .loc 2 1900 43 is_stmt 0 view .LVU2832 + 8958 0130 2022 movs r2, #32 + 8959 0132 5A60 str r2, [r3, #4] + 8960 .LVL818: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9259 .loc 2 1900 43 view .LVU2961 - 9260 .LBE641: - 9261 .LBE640: - 287:Src/main.c **** } - 9262 .loc 1 287 4 is_stmt 1 view .LVU2962 - 287:Src/main.c **** } - 9263 .loc 1 287 13 is_stmt 0 view .LVU2963 - 9264 00da 684B ldr r3, .L531+4 - 9265 00dc 0122 movs r2, #1 - 9266 00de 1A70 strb r2, [r3] - 9267 00e0 27E0 b .L457 - 9268 .L473: - 297:Src/main.c **** task.current_param = task.min_param; - 9269 .loc 1 297 6 is_stmt 1 view .LVU2964 - 297:Src/main.c **** task.current_param = task.min_param; - 9270 .loc 1 297 20 is_stmt 0 view .LVU2965 - 9271 00e2 694B ldr r3, .L531+16 - 9272 00e4 0022 movs r2, #0 - 9273 00e6 1A70 strb r2, [r3] - 298:Src/main.c **** Stop_TIM10(); - 9274 .loc 1 298 6 is_stmt 1 view .LVU2966 - 298:Src/main.c **** Stop_TIM10(); - 9275 .loc 1 298 31 is_stmt 0 view .LVU2967 - 9276 00e8 684B ldr r3, .L531+20 - 9277 00ea 5A68 ldr r2, [r3, #4] @ float - 298:Src/main.c **** Stop_TIM10(); - 9278 .loc 1 298 25 view .LVU2968 - ARM GAS /tmp/ccYgfTud.s page 553 + 8961 .loc 2 1900 43 view .LVU2833 + 8962 .LBE629: + 8963 .LBE628: +1860:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 8964 .loc 1 1860 3 is_stmt 1 view .LVU2834 +1860:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 8965 .loc 1 1860 29 is_stmt 0 view .LVU2835 + 8966 0134 4FF4E133 mov r3, #115200 + 8967 0138 2D93 str r3, [sp, #180] +1861:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 8968 .loc 1 1861 3 is_stmt 1 view .LVU2836 +1861:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 8969 .loc 1 1861 30 is_stmt 0 view .LVU2837 + 8970 013a 2E94 str r4, [sp, #184] +1862:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 8971 .loc 1 1862 3 is_stmt 1 view .LVU2838 +1862:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 8972 .loc 1 1862 29 is_stmt 0 view .LVU2839 + 8973 013c 2F94 str r4, [sp, #188] +1863:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 8974 .loc 1 1863 3 is_stmt 1 view .LVU2840 +1863:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 8975 .loc 1 1863 27 is_stmt 0 view .LVU2841 + 8976 013e 3094 str r4, [sp, #192] +1864:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 8977 .loc 1 1864 3 is_stmt 1 view .LVU2842 +1864:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 8978 .loc 1 1864 38 is_stmt 0 view .LVU2843 + 8979 0140 0C23 movs r3, #12 + 8980 0142 3193 str r3, [sp, #196] +1865:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 8981 .loc 1 1865 3 is_stmt 1 view .LVU2844 +1865:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 8982 .loc 1 1865 40 is_stmt 0 view .LVU2845 + 8983 0144 3294 str r4, [sp, #200] +1866:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 8984 .loc 1 1866 3 is_stmt 1 view .LVU2846 +1866:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 8985 .loc 1 1866 33 is_stmt 0 view .LVU2847 + 8986 0146 3394 str r4, [sp, #204] +1867:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); + 8987 .loc 1 1867 3 is_stmt 1 view .LVU2848 + 8988 0148 04F18044 add r4, r4, #1073741824 + 8989 014c 04F58834 add r4, r4, #69632 + 8990 0150 2DA9 add r1, sp, #180 + 8991 0152 2046 mov r0, r4 + ARM GAS /tmp/ccwR4KB7.s page 551 - 9279 00ec 1A61 str r2, [r3, #16] @ float - 299:Src/main.c **** break; - 9280 .loc 1 299 6 is_stmt 1 view .LVU2969 - 9281 00ee FFF7FEFF bl Stop_TIM10 - 9282 .LVL778: - 300:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 9283 .loc 1 300 5 view .LVU2970 - 9284 .L461: - 824:Src/main.c **** { - 9285 .loc 1 824 3 view .LVU2971 - 9286 00f2 674B ldr r3, .L531+24 - 9287 00f4 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 9288 00f6 022B cmp r3, #2 - 9289 00f8 00F06884 beq .L507 - 9290 00fc 032B cmp r3, #3 - 9291 00fe 00F09B84 beq .L518 - 9292 0102 012B cmp r3, #1 - 9293 0104 09D1 bne .L509 - 827:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 9294 .loc 1 827 5 view .LVU2972 - 9295 0106 634C ldr r4, .L531+28 - 9296 0108 0221 movs r1, #2 - 9297 010a 2046 mov r0, r4 - 9298 010c FFF7FEFF bl USART_TX - 9299 .LVL779: - 829:Src/main.c **** State_Data[1]=0;//All OK! - 9300 .loc 1 829 5 view .LVU2973 - 829:Src/main.c **** State_Data[1]=0;//All OK! - 9301 .loc 1 829 18 is_stmt 0 view .LVU2974 - 9302 0110 0023 movs r3, #0 - 9303 0112 2370 strb r3, [r4] - 830:Src/main.c **** UART_transmission_request = NO_MESS; - 9304 .loc 1 830 5 is_stmt 1 view .LVU2975 - 830:Src/main.c **** UART_transmission_request = NO_MESS; - 9305 .loc 1 830 18 is_stmt 0 view .LVU2976 - 9306 0114 6370 strb r3, [r4, #1] - 831:Src/main.c **** break; - 9307 .loc 1 831 5 is_stmt 1 view .LVU2977 - 831:Src/main.c **** break; - 9308 .loc 1 831 31 is_stmt 0 view .LVU2978 - 9309 0116 5E4A ldr r2, .L531+24 - 9310 0118 1370 strb r3, [r2] - 832:Src/main.c **** case MESS_02://Transmith packet - 9311 .loc 1 832 4 is_stmt 1 view .LVU2979 - 9312 .L509: - 866:Src/main.c **** { - 9313 .loc 1 866 5 view .LVU2980 - 866:Src/main.c **** { - 9314 .loc 1 866 17 is_stmt 0 view .LVU2981 - 9315 011a 5F4B ldr r3, .L531+32 - 9316 011c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 866:Src/main.c **** { - 9317 .loc 1 866 8 view .LVU2982 - 9318 011e 012B cmp r3, #1 - 9319 0120 00F08C84 beq .L521 - 9320 .L456: - 277:Src/main.c **** { - ARM GAS /tmp/ccYgfTud.s page 554 + 8992 0154 FFF7FEFF bl LL_USART_Init + 8993 .LVL819: +1868:Src/main.c **** LL_USART_Enable(USART1); + 8994 .loc 1 1868 3 view .LVU2849 + 8995 .LBB630: + 8996 .LBI630: +2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + 8997 .loc 7 2320 22 view .LVU2850 + 8998 .LBB631: +2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); + 8999 .loc 7 2326 3 view .LVU2851 + 9000 0158 6368 ldr r3, [r4, #4] + 9001 015a 23F49043 bic r3, r3, #18432 + 9002 015e 6360 str r3, [r4, #4] +2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9003 .loc 7 2327 3 view .LVU2852 + 9004 0160 A368 ldr r3, [r4, #8] + 9005 0162 23F02A03 bic r3, r3, #42 + 9006 0166 A360 str r3, [r4, #8] + 9007 .LVL820: +2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9008 .loc 7 2327 3 is_stmt 0 view .LVU2853 + 9009 .LBE631: + 9010 .LBE630: +1869:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ + 9011 .loc 1 1869 3 is_stmt 1 view .LVU2854 + 9012 .LBB632: + 9013 .LBI632: + 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + 9014 .loc 7 560 22 view .LVU2855 + 9015 .LBB633: + 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9016 .loc 7 562 3 view .LVU2856 + 9017 0168 2368 ldr r3, [r4] + 9018 016a 43F00103 orr r3, r3, #1 + 9019 016e 2360 str r3, [r4] + 9020 .LVL821: + 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9021 .loc 7 562 3 is_stmt 0 view .LVU2857 + 9022 .LBE633: + 9023 .LBE632: +1874:Src/main.c **** + 9024 .loc 1 1874 1 view .LVU2858 + 9025 0170 34B0 add sp, sp, #208 + 9026 .LCFI84: + 9027 .cfi_remember_state + 9028 .cfi_def_cfa_offset 24 + 9029 @ sp needed + 9030 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 9031 .L475: + 9032 .LCFI85: + 9033 .cfi_restore_state +1805:Src/main.c **** } + 9034 .loc 1 1805 5 is_stmt 1 view .LVU2859 + 9035 0176 FFF7FEFF bl Error_Handler + 9036 .LVL822: + 9037 .L477: + ARM GAS /tmp/ccwR4KB7.s page 552 - 9321 .loc 1 277 3 is_stmt 1 view .LVU2983 - 279:Src/main.c **** { - 9322 .loc 1 279 3 view .LVU2984 - 279:Src/main.c **** { - 9323 .loc 1 279 8 is_stmt 0 view .LVU2985 - 9324 0124 4FF48071 mov r1, #256 - 9325 0128 5C48 ldr r0, .L531+36 - 9326 012a FFF7FEFF bl HAL_GPIO_ReadPin - 9327 .LVL780: - 279:Src/main.c **** { - 9328 .loc 1 279 6 discriminator 1 view .LVU2986 - 9329 012e 0128 cmp r0, #1 - 9330 0130 ABD0 beq .L522 - 9331 .L457: - 294:Src/main.c **** { - 9332 .loc 1 294 4 is_stmt 1 view .LVU2987 - 9333 0132 5B4B ldr r3, .L531+40 - 9334 0134 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 9335 0136 0A2B cmp r3, #10 - 9336 0138 DBD8 bhi .L461 - 9337 013a 01A2 adr r2, .L463 - 9338 013c 52F823F0 ldr pc, [r2, r3, lsl #2] - 9339 .p2align 2 - 9340 .L463: - 9341 0140 E3000000 .word .L473+1 - 9342 0144 6D010000 .word .L472+1 - 9343 0148 D7010000 .word .L471+1 - 9344 014c 0D020000 .word .L470+1 - 9345 0150 3D020000 .word .L469+1 - 9346 0154 4D020000 .word .L468+1 - 9347 0158 69020000 .word .L467+1 - 9348 015c CD020000 .word .L466+1 - 9349 0160 B7040000 .word .L465+1 - 9350 0164 FD040000 .word .L464+1 - 9351 0168 21040000 .word .L462+1 - 9352 .p2align 1 - 9353 .L472: - 302:Src/main.c **** if (CheckChecksum(COMMAND)) - 9354 .loc 1 302 6 view .LVU2988 - 302:Src/main.c **** if (CheckChecksum(COMMAND)) - 9355 .loc 1 302 18 is_stmt 0 view .LVU2989 - 9356 016c 4D4C ldr r4, .L531+44 - 9357 016e 0D21 movs r1, #13 - 9358 0170 2046 mov r0, r4 - 9359 0172 FFF7FEFF bl CalculateChecksum - 9360 .LVL781: - 302:Src/main.c **** if (CheckChecksum(COMMAND)) - 9361 .loc 1 302 16 discriminator 1 view .LVU2990 - 9362 0176 4C4B ldr r3, .L531+48 - 9363 0178 1880 strh r0, [r3] @ movhi - 303:Src/main.c **** { - 9364 .loc 1 303 6 is_stmt 1 view .LVU2991 - 303:Src/main.c **** { - 9365 .loc 1 303 10 is_stmt 0 view .LVU2992 - 9366 017a 2046 mov r0, r4 - 9367 017c FFF7FEFF bl CheckChecksum - 9368 .LVL782: - ARM GAS /tmp/ccYgfTud.s page 555 + 9038 017a 00BF .align 2 + 9039 .L476: + 9040 017c 00380240 .word 1073887232 + 9041 0180 00000240 .word 1073872896 + 9042 0184 00640240 .word 1073898496 + 9043 0188 00ED00E0 .word -536810240 + 9044 018c 00E100E0 .word -536813312 + 9045 .cfi_endproc + 9046 .LFE1204: + 9048 .section .text.MX_TIM10_Init,"ax",%progbits + 9049 .align 1 + 9050 .syntax unified + 9051 .thumb + 9052 .thumb_func + 9054 MX_TIM10_Init: + 9055 .LFB1201: +1676:Src/main.c **** + 9056 .loc 1 1676 1 view -0 + 9057 .cfi_startproc + 9058 @ args = 0, pretend = 0, frame = 0 + 9059 @ frame_needed = 0, uses_anonymous_args = 0 + 9060 0000 08B5 push {r3, lr} + 9061 .LCFI86: + 9062 .cfi_def_cfa_offset 8 + 9063 .cfi_offset 3, -8 + 9064 .cfi_offset 14, -4 +1685:Src/main.c **** htim10.Init.Prescaler = 183; + 9065 .loc 1 1685 3 view .LVU2861 +1685:Src/main.c **** htim10.Init.Prescaler = 183; + 9066 .loc 1 1685 19 is_stmt 0 view .LVU2862 + 9067 0002 0848 ldr r0, .L482 + 9068 0004 084B ldr r3, .L482+4 + 9069 0006 0360 str r3, [r0] +1686:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 9070 .loc 1 1686 3 is_stmt 1 view .LVU2863 +1686:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 9071 .loc 1 1686 25 is_stmt 0 view .LVU2864 + 9072 0008 B723 movs r3, #183 + 9073 000a 4360 str r3, [r0, #4] +1687:Src/main.c **** htim10.Init.Period = 9; + 9074 .loc 1 1687 3 is_stmt 1 view .LVU2865 +1687:Src/main.c **** htim10.Init.Period = 9; + 9075 .loc 1 1687 27 is_stmt 0 view .LVU2866 + 9076 000c 0023 movs r3, #0 + 9077 000e 8360 str r3, [r0, #8] +1688:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9078 .loc 1 1688 3 is_stmt 1 view .LVU2867 +1688:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9079 .loc 1 1688 22 is_stmt 0 view .LVU2868 + 9080 0010 0922 movs r2, #9 + 9081 0012 C260 str r2, [r0, #12] +1689:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9082 .loc 1 1689 3 is_stmt 1 view .LVU2869 +1689:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9083 .loc 1 1689 29 is_stmt 0 view .LVU2870 + 9084 0014 0361 str r3, [r0, #16] +1690:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + ARM GAS /tmp/ccwR4KB7.s page 553 - 303:Src/main.c **** { - 9369 .loc 1 303 9 discriminator 1 view .LVU2993 - 9370 0180 70B9 cbnz r0, .L523 - 316:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 9371 .loc 1 316 7 is_stmt 1 view .LVU2994 - 316:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 9372 .loc 1 316 17 is_stmt 0 view .LVU2995 - 9373 0182 444A ldr r2, .L531+28 - 9374 0184 1378 ldrb r3, [r2] @ zero_extendqisi2 - 316:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 9375 .loc 1 316 21 view .LVU2996 - 9376 0186 43F00403 orr r3, r3, #4 - 9377 018a 1370 strb r3, [r2] - 317:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 9378 .loc 1 317 7 is_stmt 1 view .LVU2997 - 317:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 9379 .loc 1 317 17 is_stmt 0 view .LVU2998 - 9380 018c 444B ldr r3, .L531+40 - 9381 018e 0222 movs r2, #2 - 9382 0190 1A70 strb r2, [r3] - 318:Src/main.c **** } - 9383 .loc 1 318 7 is_stmt 1 view .LVU2999 - 318:Src/main.c **** } - 9384 .loc 1 318 21 is_stmt 0 view .LVU3000 - 9385 0192 3D4B ldr r3, .L531+16 - 9386 0194 0022 movs r2, #0 - 9387 0196 1A70 strb r2, [r3] - 9388 .L475: - 320:Src/main.c **** break; - 9389 .loc 1 320 6 is_stmt 1 view .LVU3001 - 320:Src/main.c **** break; - 9390 .loc 1 320 32 is_stmt 0 view .LVU3002 - 9391 0198 3D4B ldr r3, .L531+24 - 9392 019a 0122 movs r2, #1 - 9393 019c 1A70 strb r2, [r3] - 321:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 9394 .loc 1 321 5 is_stmt 1 view .LVU3003 - 9395 019e A8E7 b .L461 - 9396 .L523: - 305:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 9397 .loc 1 305 7 view .LVU3004 - 9398 .LVL783: - 9399 .LBB642: - 9400 .LBI642: - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 9401 .loc 4 358 22 view .LVU3005 - 9402 .LBB643: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9403 .loc 4 360 3 view .LVU3006 - 9404 01a0 424A ldr r2, .L531+52 - 9405 01a2 1368 ldr r3, [r2] - 9406 01a4 43F04003 orr r3, r3, #64 - 9407 01a8 1360 str r3, [r2] - 9408 .LVL784: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9409 .loc 4 360 3 is_stmt 0 view .LVU3007 - 9410 .LBE643: - ARM GAS /tmp/ccYgfTud.s page 556 + 9085 .loc 1 1690 3 is_stmt 1 view .LVU2871 +1690:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 9086 .loc 1 1690 33 is_stmt 0 view .LVU2872 + 9087 0016 8361 str r3, [r0, #24] +1691:Src/main.c **** { + 9088 .loc 1 1691 3 is_stmt 1 view .LVU2873 +1691:Src/main.c **** { + 9089 .loc 1 1691 7 is_stmt 0 view .LVU2874 + 9090 0018 FFF7FEFF bl HAL_TIM_Base_Init + 9091 .LVL823: +1691:Src/main.c **** { + 9092 .loc 1 1691 6 discriminator 1 view .LVU2875 + 9093 001c 00B9 cbnz r0, .L481 +1699:Src/main.c **** + 9094 .loc 1 1699 1 view .LVU2876 + 9095 001e 08BD pop {r3, pc} + 9096 .L481: +1693:Src/main.c **** } + 9097 .loc 1 1693 5 is_stmt 1 view .LVU2877 + 9098 0020 FFF7FEFF bl Error_Handler + 9099 .LVL824: + 9100 .L483: + 9101 .align 2 + 9102 .L482: + 9103 0024 00000000 .word htim10 + 9104 0028 00440140 .word 1073824768 + 9105 .cfi_endproc + 9106 .LFE1201: + 9108 .section .text.MX_UART8_Init,"ax",%progbits + 9109 .align 1 + 9110 .syntax unified + 9111 .thumb + 9112 .thumb_func + 9114 MX_UART8_Init: + 9115 .LFB1203: +1753:Src/main.c **** + 9116 .loc 1 1753 1 view -0 + 9117 .cfi_startproc + 9118 @ args = 0, pretend = 0, frame = 0 + 9119 @ frame_needed = 0, uses_anonymous_args = 0 + 9120 0000 08B5 push {r3, lr} + 9121 .LCFI87: + 9122 .cfi_def_cfa_offset 8 + 9123 .cfi_offset 3, -8 + 9124 .cfi_offset 14, -4 +1762:Src/main.c **** huart8.Init.BaudRate = 115200; + 9125 .loc 1 1762 3 view .LVU2879 +1762:Src/main.c **** huart8.Init.BaudRate = 115200; + 9126 .loc 1 1762 19 is_stmt 0 view .LVU2880 + 9127 0002 0B48 ldr r0, .L488 + 9128 0004 0B4B ldr r3, .L488+4 + 9129 0006 0360 str r3, [r0] +1763:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 9130 .loc 1 1763 3 is_stmt 1 view .LVU2881 +1763:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 9131 .loc 1 1763 24 is_stmt 0 view .LVU2882 + 9132 0008 4FF4E133 mov r3, #115200 + ARM GAS /tmp/ccwR4KB7.s page 554 - 9411 .LBE642: - 306:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 9412 .loc 1 306 7 is_stmt 1 view .LVU3008 - 9413 .LBB644: - 9414 .LBI644: - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 9415 .loc 4 358 22 view .LVU3009 - 9416 .LBB645: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9417 .loc 4 360 3 view .LVU3010 - 9418 01aa 02F58E32 add r2, r2, #72704 - 9419 01ae 1368 ldr r3, [r2] - 9420 01b0 43F04003 orr r3, r3, #64 - 9421 01b4 1360 str r3, [r2] - 9422 .LVL785: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9423 .loc 4 360 3 is_stmt 0 view .LVU3011 - 9424 .LBE645: - 9425 .LBE644: - 307:Src/main.c **** TO6_before = TO6; - 9426 .loc 1 307 7 is_stmt 1 view .LVU3012 - 9427 01b6 3E4B ldr r3, .L531+56 - 9428 01b8 3E4A ldr r2, .L531+60 - 9429 01ba 3F49 ldr r1, .L531+64 - 9430 01bc 2046 mov r0, r4 - 9431 01be FFF7FEFF bl Decode_uart - 9432 .LVL786: - 308:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 9433 .loc 1 308 7 view .LVU3013 - 308:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 9434 .loc 1 308 18 is_stmt 0 view .LVU3014 - 9435 01c2 3E4B ldr r3, .L531+68 - 9436 01c4 1A68 ldr r2, [r3] - 9437 01c6 3E4B ldr r3, .L531+72 - 9438 01c8 1A60 str r2, [r3] - 311:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 9439 .loc 1 311 7 is_stmt 1 view .LVU3015 - 311:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 9440 .loc 1 311 17 is_stmt 0 view .LVU3016 - 9441 01ca 0723 movs r3, #7 - 9442 01cc 344A ldr r2, .L531+40 - 9443 01ce 1370 strb r3, [r2] - 312:Src/main.c **** } - 9444 .loc 1 312 7 is_stmt 1 view .LVU3017 - 312:Src/main.c **** } - 9445 .loc 1 312 21 is_stmt 0 view .LVU3018 - 9446 01d0 2D4A ldr r2, .L531+16 - 9447 01d2 1370 strb r3, [r2] - 9448 01d4 E0E7 b .L475 - 9449 .L471: - 324:Src/main.c **** Stop_TIM10(); - 9450 .loc 1 324 6 is_stmt 1 view .LVU3019 - 324:Src/main.c **** Stop_TIM10(); - 9451 .loc 1 324 31 is_stmt 0 view .LVU3020 - 9452 01d6 2D4B ldr r3, .L531+20 - 9453 01d8 5A68 ldr r2, [r3, #4] @ float - 324:Src/main.c **** Stop_TIM10(); - ARM GAS /tmp/ccYgfTud.s page 557 + 9133 000c 4360 str r3, [r0, #4] +1764:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 9134 .loc 1 1764 3 is_stmt 1 view .LVU2883 +1764:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 9135 .loc 1 1764 26 is_stmt 0 view .LVU2884 + 9136 000e 0023 movs r3, #0 + 9137 0010 8360 str r3, [r0, #8] +1765:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 9138 .loc 1 1765 3 is_stmt 1 view .LVU2885 +1765:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 9139 .loc 1 1765 24 is_stmt 0 view .LVU2886 + 9140 0012 C360 str r3, [r0, #12] +1766:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 9141 .loc 1 1766 3 is_stmt 1 view .LVU2887 +1766:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 9142 .loc 1 1766 22 is_stmt 0 view .LVU2888 + 9143 0014 0361 str r3, [r0, #16] +1767:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 9144 .loc 1 1767 3 is_stmt 1 view .LVU2889 +1767:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 9145 .loc 1 1767 20 is_stmt 0 view .LVU2890 + 9146 0016 0C22 movs r2, #12 + 9147 0018 4261 str r2, [r0, #20] +1768:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 9148 .loc 1 1768 3 is_stmt 1 view .LVU2891 +1768:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 9149 .loc 1 1768 25 is_stmt 0 view .LVU2892 + 9150 001a 8361 str r3, [r0, #24] +1769:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 9151 .loc 1 1769 3 is_stmt 1 view .LVU2893 +1769:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 9152 .loc 1 1769 28 is_stmt 0 view .LVU2894 + 9153 001c C361 str r3, [r0, #28] +1770:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 9154 .loc 1 1770 3 is_stmt 1 view .LVU2895 +1770:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 9155 .loc 1 1770 30 is_stmt 0 view .LVU2896 + 9156 001e 0362 str r3, [r0, #32] +1771:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 9157 .loc 1 1771 3 is_stmt 1 view .LVU2897 +1771:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 9158 .loc 1 1771 38 is_stmt 0 view .LVU2898 + 9159 0020 4362 str r3, [r0, #36] +1772:Src/main.c **** { + 9160 .loc 1 1772 3 is_stmt 1 view .LVU2899 +1772:Src/main.c **** { + 9161 .loc 1 1772 7 is_stmt 0 view .LVU2900 + 9162 0022 FFF7FEFF bl HAL_UART_Init + 9163 .LVL825: +1772:Src/main.c **** { + 9164 .loc 1 1772 6 discriminator 1 view .LVU2901 + 9165 0026 00B9 cbnz r0, .L487 +1780:Src/main.c **** + 9166 .loc 1 1780 1 view .LVU2902 + 9167 0028 08BD pop {r3, pc} + 9168 .L487: +1774:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 555 - 9454 .loc 1 324 25 view .LVU3021 - 9455 01da 1A61 str r2, [r3, #16] @ float - 325:Src/main.c **** Init_params(); - 9456 .loc 1 325 6 is_stmt 1 view .LVU3022 - 9457 01dc FFF7FEFF bl Stop_TIM10 - 9458 .LVL787: - 326:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 9459 .loc 1 326 6 view .LVU3023 - 9460 01e0 FFF7FEFF bl Init_params - 9461 .LVL788: - 327:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 9462 .loc 1 327 6 view .LVU3024 - 9463 .LBB646: - 9464 .LBI646: - 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 9465 .loc 4 370 22 view .LVU3025 - 9466 .LBB647: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9467 .loc 4 372 3 view .LVU3026 - 9468 01e4 314A ldr r2, .L531+52 - 9469 01e6 1368 ldr r3, [r2] - 9470 01e8 23F04003 bic r3, r3, #64 - 9471 01ec 1360 str r3, [r2] - 9472 .LVL789: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9473 .loc 4 372 3 is_stmt 0 view .LVU3027 - 9474 .LBE647: - 9475 .LBE646: - 328:Src/main.c **** CPU_state = HALT; - 9476 .loc 1 328 6 is_stmt 1 view .LVU3028 - 9477 .LBB648: - 9478 .LBI648: - 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 9479 .loc 4 370 22 view .LVU3029 - 9480 .LBB649: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9481 .loc 4 372 3 view .LVU3030 - 9482 01ee 02F58E32 add r2, r2, #72704 - 9483 01f2 1368 ldr r3, [r2] - 9484 01f4 23F04003 bic r3, r3, #64 - 9485 01f8 1360 str r3, [r2] - 9486 .LVL790: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 9487 .loc 4 372 3 is_stmt 0 view .LVU3031 - 9488 .LBE649: - 9489 .LBE648: - 329:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 9490 .loc 1 329 6 is_stmt 1 view .LVU3032 - 329:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 9491 .loc 1 329 16 is_stmt 0 view .LVU3033 - 9492 01fa 0023 movs r3, #0 - 9493 01fc 284A ldr r2, .L531+40 - 9494 01fe 1370 strb r3, [r2] - 330:Src/main.c **** UART_transmission_request = MESS_01; - 9495 .loc 1 330 6 is_stmt 1 view .LVU3034 - 330:Src/main.c **** UART_transmission_request = MESS_01; - 9496 .loc 1 330 20 is_stmt 0 view .LVU3035 - ARM GAS /tmp/ccYgfTud.s page 558 + 9169 .loc 1 1774 5 is_stmt 1 view .LVU2903 + 9170 002a FFF7FEFF bl Error_Handler + 9171 .LVL826: + 9172 .L489: + 9173 002e 00BF .align 2 + 9174 .L488: + 9175 0030 00000000 .word huart8 + 9176 0034 007C0040 .word 1073773568 + 9177 .cfi_endproc + 9178 .LFE1203: + 9180 .section .text.MX_TIM8_Init,"ax",%progbits + 9181 .align 1 + 9182 .syntax unified + 9183 .thumb + 9184 .thumb_func + 9186 MX_TIM8_Init: + 9187 .LFB1200: +1629:Src/main.c **** + 9188 .loc 1 1629 1 view -0 + 9189 .cfi_startproc + 9190 @ args = 0, pretend = 0, frame = 32 + 9191 @ frame_needed = 0, uses_anonymous_args = 0 + 9192 0000 00B5 push {lr} + 9193 .LCFI88: + 9194 .cfi_def_cfa_offset 4 + 9195 .cfi_offset 14, -4 + 9196 0002 89B0 sub sp, sp, #36 + 9197 .LCFI89: + 9198 .cfi_def_cfa_offset 40 +1635:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 9199 .loc 1 1635 3 view .LVU2905 +1635:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 9200 .loc 1 1635 26 is_stmt 0 view .LVU2906 + 9201 0004 0023 movs r3, #0 + 9202 0006 0493 str r3, [sp, #16] + 9203 0008 0593 str r3, [sp, #20] + 9204 000a 0693 str r3, [sp, #24] + 9205 000c 0793 str r3, [sp, #28] +1636:Src/main.c **** + 9206 .loc 1 1636 3 is_stmt 1 view .LVU2907 +1636:Src/main.c **** + 9207 .loc 1 1636 27 is_stmt 0 view .LVU2908 + 9208 000e 0193 str r3, [sp, #4] + 9209 0010 0293 str r3, [sp, #8] + 9210 0012 0393 str r3, [sp, #12] +1641:Src/main.c **** htim8.Init.Prescaler = 0; + 9211 .loc 1 1641 3 is_stmt 1 view .LVU2909 +1641:Src/main.c **** htim8.Init.Prescaler = 0; + 9212 .loc 1 1641 18 is_stmt 0 view .LVU2910 + 9213 0014 1348 ldr r0, .L498 + 9214 0016 144A ldr r2, .L498+4 + 9215 0018 0260 str r2, [r0] +1642:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 9216 .loc 1 1642 3 is_stmt 1 view .LVU2911 +1642:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 9217 .loc 1 1642 24 is_stmt 0 view .LVU2912 + 9218 001a 4360 str r3, [r0, #4] + ARM GAS /tmp/ccwR4KB7.s page 556 - 9497 0200 214A ldr r2, .L531+16 - 9498 0202 1370 strb r3, [r2] - 331:Src/main.c **** break; - 9499 .loc 1 331 6 is_stmt 1 view .LVU3036 - 331:Src/main.c **** break; - 9500 .loc 1 331 32 is_stmt 0 view .LVU3037 - 9501 0204 224B ldr r3, .L531+24 - 9502 0206 0122 movs r2, #1 - 9503 0208 1A70 strb r2, [r3] - 332:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 9504 .loc 1 332 5 is_stmt 1 view .LVU3038 - 9505 020a 72E7 b .L461 - 9506 .L470: - 334:Src/main.c **** State_Data[0]|=temp16&0xff; - 9507 .loc 1 334 6 view .LVU3039 - 334:Src/main.c **** State_Data[0]|=temp16&0xff; - 9508 .loc 1 334 15 is_stmt 0 view .LVU3040 - 9509 020c 2D48 ldr r0, .L531+76 - 9510 020e FFF7FEFF bl SD_READ - 9511 .LVL791: - 334:Src/main.c **** State_Data[0]|=temp16&0xff; - 9512 .loc 1 334 13 discriminator 1 view .LVU3041 - 9513 0212 82B2 uxth r2, r0 - 9514 0214 2C4B ldr r3, .L531+80 - 9515 0216 1A80 strh r2, [r3] @ movhi - 335:Src/main.c **** if (temp16==0) - 9516 .loc 1 335 6 is_stmt 1 view .LVU3042 - 335:Src/main.c **** if (temp16==0) - 9517 .loc 1 335 16 is_stmt 0 view .LVU3043 - 9518 0218 1E49 ldr r1, .L531+28 - 9519 021a 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 335:Src/main.c **** if (temp16==0) - 9520 .loc 1 335 19 view .LVU3044 - 9521 021c 0343 orrs r3, r3, r0 - 9522 021e 0B70 strb r3, [r1] - 336:Src/main.c **** { - 9523 .loc 1 336 6 is_stmt 1 view .LVU3045 - 336:Src/main.c **** { - 9524 .loc 1 336 9 is_stmt 0 view .LVU3046 - 9525 0220 42B9 cbnz r2, .L476 - 338:Src/main.c **** } - 9526 .loc 1 338 7 is_stmt 1 view .LVU3047 - 338:Src/main.c **** } - 9527 .loc 1 338 33 is_stmt 0 view .LVU3048 - 9528 0222 1B4B ldr r3, .L531+24 - 9529 0224 0322 movs r2, #3 - 9530 0226 1A70 strb r2, [r3] - 9531 .L477: - 344:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 9532 .loc 1 344 6 is_stmt 1 view .LVU3049 - 344:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 9533 .loc 1 344 20 is_stmt 0 view .LVU3050 - 9534 0228 0023 movs r3, #0 - 9535 022a 174A ldr r2, .L531+16 - 9536 022c 1370 strb r3, [r2] - 345:Src/main.c **** break; - 9537 .loc 1 345 6 is_stmt 1 view .LVU3051 - ARM GAS /tmp/ccYgfTud.s page 559 +1643:Src/main.c **** htim8.Init.Period = 91; + 9219 .loc 1 1643 3 is_stmt 1 view .LVU2913 +1643:Src/main.c **** htim8.Init.Period = 91; + 9220 .loc 1 1643 26 is_stmt 0 view .LVU2914 + 9221 001c 8360 str r3, [r0, #8] +1644:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9222 .loc 1 1644 3 is_stmt 1 view .LVU2915 +1644:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9223 .loc 1 1644 21 is_stmt 0 view .LVU2916 + 9224 001e 5B22 movs r2, #91 + 9225 0020 C260 str r2, [r0, #12] +1645:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 9226 .loc 1 1645 3 is_stmt 1 view .LVU2917 +1645:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 9227 .loc 1 1645 28 is_stmt 0 view .LVU2918 + 9228 0022 0361 str r3, [r0, #16] +1646:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9229 .loc 1 1646 3 is_stmt 1 view .LVU2919 +1646:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9230 .loc 1 1646 32 is_stmt 0 view .LVU2920 + 9231 0024 4361 str r3, [r0, #20] +1647:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 9232 .loc 1 1647 3 is_stmt 1 view .LVU2921 +1647:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 9233 .loc 1 1647 32 is_stmt 0 view .LVU2922 + 9234 0026 8361 str r3, [r0, #24] +1648:Src/main.c **** { + 9235 .loc 1 1648 3 is_stmt 1 view .LVU2923 +1648:Src/main.c **** { + 9236 .loc 1 1648 7 is_stmt 0 view .LVU2924 + 9237 0028 FFF7FEFF bl HAL_TIM_Base_Init + 9238 .LVL827: +1648:Src/main.c **** { + 9239 .loc 1 1648 6 discriminator 1 view .LVU2925 + 9240 002c 98B9 cbnz r0, .L495 +1652:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 9241 .loc 1 1652 3 is_stmt 1 view .LVU2926 +1652:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 9242 .loc 1 1652 34 is_stmt 0 view .LVU2927 + 9243 002e 4FF48053 mov r3, #4096 + 9244 0032 0493 str r3, [sp, #16] +1653:Src/main.c **** { + 9245 .loc 1 1653 3 is_stmt 1 view .LVU2928 +1653:Src/main.c **** { + 9246 .loc 1 1653 7 is_stmt 0 view .LVU2929 + 9247 0034 04A9 add r1, sp, #16 + 9248 0036 0B48 ldr r0, .L498 + 9249 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource + 9250 .LVL828: +1653:Src/main.c **** { + 9251 .loc 1 1653 6 discriminator 1 view .LVU2930 + 9252 003c 68B9 cbnz r0, .L496 +1657:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 9253 .loc 1 1657 3 is_stmt 1 view .LVU2931 +1657:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 9254 .loc 1 1657 37 is_stmt 0 view .LVU2932 + 9255 003e 0023 movs r3, #0 + ARM GAS /tmp/ccwR4KB7.s page 557 - 345:Src/main.c **** break; - 9538 .loc 1 345 16 is_stmt 0 view .LVU3052 - 9539 022e 1C4A ldr r2, .L531+40 - 9540 0230 1370 strb r3, [r2] - 346:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 9541 .loc 1 346 5 is_stmt 1 view .LVU3053 - 9542 0232 5EE7 b .L461 - 9543 .L476: - 342:Src/main.c **** } - 9544 .loc 1 342 7 view .LVU3054 - 342:Src/main.c **** } - 9545 .loc 1 342 33 is_stmt 0 view .LVU3055 - 9546 0234 164B ldr r3, .L531+24 - 9547 0236 0122 movs r2, #1 - 9548 0238 1A70 strb r2, [r3] - 9549 023a F5E7 b .L477 - 9550 .L469: - 348:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 9551 .loc 1 348 6 is_stmt 1 view .LVU3056 - 348:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 9552 .loc 1 348 32 is_stmt 0 view .LVU3057 - 9553 023c 144B ldr r3, .L531+24 - 9554 023e 0222 movs r2, #2 - 9555 0240 1A70 strb r2, [r3] - 349:Src/main.c **** break; - 9556 .loc 1 349 6 is_stmt 1 view .LVU3058 - 349:Src/main.c **** break; - 9557 .loc 1 349 16 is_stmt 0 view .LVU3059 - 9558 0242 114B ldr r3, .L531+16 - 9559 0244 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 9560 0246 164B ldr r3, .L531+40 - 9561 0248 1A70 strb r2, [r3] - 350:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 9562 .loc 1 350 5 is_stmt 1 view .LVU3060 - 9563 024a 52E7 b .L461 - 9564 .L468: - 352:Src/main.c **** UART_transmission_request = MESS_01; - 9565 .loc 1 352 6 view .LVU3061 - 352:Src/main.c **** UART_transmission_request = MESS_01; - 9566 .loc 1 352 21 is_stmt 0 view .LVU3062 - 9567 024c FFF7FEFF bl SD_REMOVE - 9568 .LVL792: - 352:Src/main.c **** UART_transmission_request = MESS_01; - 9569 .loc 1 352 16 discriminator 1 view .LVU3063 - 9570 0250 104A ldr r2, .L531+28 - 9571 0252 1378 ldrb r3, [r2] @ zero_extendqisi2 - 352:Src/main.c **** UART_transmission_request = MESS_01; - 9572 .loc 1 352 19 discriminator 1 view .LVU3064 - 9573 0254 0343 orrs r3, r3, r0 - 9574 0256 1370 strb r3, [r2] - 353:Src/main.c **** CPU_state = CPU_state_old; - 9575 .loc 1 353 6 is_stmt 1 view .LVU3065 - 353:Src/main.c **** CPU_state = CPU_state_old; - 9576 .loc 1 353 32 is_stmt 0 view .LVU3066 - 9577 0258 0D4B ldr r3, .L531+24 - 9578 025a 0122 movs r2, #1 - 9579 025c 1A70 strb r2, [r3] - ARM GAS /tmp/ccYgfTud.s page 560 + 9256 0040 0193 str r3, [sp, #4] +1658:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 9257 .loc 1 1658 3 is_stmt 1 view .LVU2933 +1658:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 9258 .loc 1 1658 38 is_stmt 0 view .LVU2934 + 9259 0042 0293 str r3, [sp, #8] +1659:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 9260 .loc 1 1659 3 is_stmt 1 view .LVU2935 +1659:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 9261 .loc 1 1659 33 is_stmt 0 view .LVU2936 + 9262 0044 0393 str r3, [sp, #12] +1660:Src/main.c **** { + 9263 .loc 1 1660 3 is_stmt 1 view .LVU2937 +1660:Src/main.c **** { + 9264 .loc 1 1660 7 is_stmt 0 view .LVU2938 + 9265 0046 01A9 add r1, sp, #4 + 9266 0048 0648 ldr r0, .L498 + 9267 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 9268 .LVL829: +1660:Src/main.c **** { + 9269 .loc 1 1660 6 discriminator 1 view .LVU2939 + 9270 004e 30B9 cbnz r0, .L497 +1668:Src/main.c **** + 9271 .loc 1 1668 1 view .LVU2940 + 9272 0050 09B0 add sp, sp, #36 + 9273 .LCFI90: + 9274 .cfi_remember_state + 9275 .cfi_def_cfa_offset 4 + 9276 @ sp needed + 9277 0052 5DF804FB ldr pc, [sp], #4 + 9278 .L495: + 9279 .LCFI91: + 9280 .cfi_restore_state +1650:Src/main.c **** } + 9281 .loc 1 1650 5 is_stmt 1 view .LVU2941 + 9282 0056 FFF7FEFF bl Error_Handler + 9283 .LVL830: + 9284 .L496: +1655:Src/main.c **** } + 9285 .loc 1 1655 5 view .LVU2942 + 9286 005a FFF7FEFF bl Error_Handler + 9287 .LVL831: + 9288 .L497: +1662:Src/main.c **** } + 9289 .loc 1 1662 5 view .LVU2943 + 9290 005e FFF7FEFF bl Error_Handler + 9291 .LVL832: + 9292 .L499: + 9293 0062 00BF .align 2 + 9294 .L498: + 9295 0064 00000000 .word htim8 + 9296 0068 00040140 .word 1073808384 + 9297 .cfi_endproc + 9298 .LFE1200: + 9300 .section .text.MX_TIM11_Init,"ax",%progbits + 9301 .align 1 + 9302 .syntax unified + ARM GAS /tmp/ccwR4KB7.s page 558 + 9303 .thumb + 9304 .thumb_func + 9306 MX_TIM11_Init: + 9307 .LFB1202: +1707:Src/main.c **** + 9308 .loc 1 1707 1 view -0 + 9309 .cfi_startproc + 9310 @ args = 0, pretend = 0, frame = 32 + 9311 @ frame_needed = 0, uses_anonymous_args = 0 + 9312 0000 00B5 push {lr} + 9313 .LCFI92: + 9314 .cfi_def_cfa_offset 4 + 9315 .cfi_offset 14, -4 + 9316 0002 89B0 sub sp, sp, #36 + 9317 .LCFI93: + 9318 .cfi_def_cfa_offset 40 +1713:Src/main.c **** + 9319 .loc 1 1713 3 view .LVU2945 +1713:Src/main.c **** + 9320 .loc 1 1713 22 is_stmt 0 view .LVU2946 + 9321 0004 0023 movs r3, #0 + 9322 0006 0193 str r3, [sp, #4] + 9323 0008 0293 str r3, [sp, #8] + 9324 000a 0393 str r3, [sp, #12] + 9325 000c 0493 str r3, [sp, #16] + 9326 000e 0593 str r3, [sp, #20] + 9327 0010 0693 str r3, [sp, #24] + 9328 0012 0793 str r3, [sp, #28] +1718:Src/main.c **** htim11.Init.Prescaler = 1; + 9329 .loc 1 1718 3 is_stmt 1 view .LVU2947 +1718:Src/main.c **** htim11.Init.Prescaler = 1; + 9330 .loc 1 1718 19 is_stmt 0 view .LVU2948 + 9331 0014 1448 ldr r0, .L508 + 9332 0016 154A ldr r2, .L508+4 + 9333 0018 0260 str r2, [r0] +1719:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 9334 .loc 1 1719 3 is_stmt 1 view .LVU2949 +1719:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 9335 .loc 1 1719 25 is_stmt 0 view .LVU2950 + 9336 001a 0122 movs r2, #1 + 9337 001c 4260 str r2, [r0, #4] +1720:Src/main.c **** htim11.Init.Period = 91; + 9338 .loc 1 1720 3 is_stmt 1 view .LVU2951 +1720:Src/main.c **** htim11.Init.Period = 91; + 9339 .loc 1 1720 27 is_stmt 0 view .LVU2952 + 9340 001e 8360 str r3, [r0, #8] +1721:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9341 .loc 1 1721 3 is_stmt 1 view .LVU2953 +1721:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9342 .loc 1 1721 22 is_stmt 0 view .LVU2954 + 9343 0020 5B22 movs r2, #91 + 9344 0022 C260 str r2, [r0, #12] +1722:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 9345 .loc 1 1722 3 is_stmt 1 view .LVU2955 +1722:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 9346 .loc 1 1722 29 is_stmt 0 view .LVU2956 + 9347 0024 0361 str r3, [r0, #16] + ARM GAS /tmp/ccwR4KB7.s page 559 + + +1723:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 9348 .loc 1 1723 3 is_stmt 1 view .LVU2957 +1723:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 9349 .loc 1 1723 33 is_stmt 0 view .LVU2958 + 9350 0026 8023 movs r3, #128 + 9351 0028 8361 str r3, [r0, #24] +1724:Src/main.c **** { + 9352 .loc 1 1724 3 is_stmt 1 view .LVU2959 +1724:Src/main.c **** { + 9353 .loc 1 1724 7 is_stmt 0 view .LVU2960 + 9354 002a FFF7FEFF bl HAL_TIM_Base_Init + 9355 .LVL833: +1724:Src/main.c **** { + 9356 .loc 1 1724 6 discriminator 1 view .LVU2961 + 9357 002e A8B9 cbnz r0, .L505 +1728:Src/main.c **** { + 9358 .loc 1 1728 3 is_stmt 1 view .LVU2962 +1728:Src/main.c **** { + 9359 .loc 1 1728 7 is_stmt 0 view .LVU2963 + 9360 0030 0D48 ldr r0, .L508 + 9361 0032 FFF7FEFF bl HAL_TIM_PWM_Init + 9362 .LVL834: +1728:Src/main.c **** { + 9363 .loc 1 1728 6 discriminator 1 view .LVU2964 + 9364 0036 98B9 cbnz r0, .L506 +1732:Src/main.c **** sConfigOC.Pulse = 91; + 9365 .loc 1 1732 3 is_stmt 1 view .LVU2965 +1732:Src/main.c **** sConfigOC.Pulse = 91; + 9366 .loc 1 1732 20 is_stmt 0 view .LVU2966 + 9367 0038 6023 movs r3, #96 + 9368 003a 0193 str r3, [sp, #4] +1733:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 9369 .loc 1 1733 3 is_stmt 1 view .LVU2967 +1733:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 9370 .loc 1 1733 19 is_stmt 0 view .LVU2968 + 9371 003c 5B23 movs r3, #91 + 9372 003e 0293 str r3, [sp, #8] +1734:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 9373 .loc 1 1734 3 is_stmt 1 view .LVU2969 +1734:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 9374 .loc 1 1734 24 is_stmt 0 view .LVU2970 + 9375 0040 0022 movs r2, #0 + 9376 0042 0392 str r2, [sp, #12] +1735:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 9377 .loc 1 1735 3 is_stmt 1 view .LVU2971 +1735:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 9378 .loc 1 1735 24 is_stmt 0 view .LVU2972 + 9379 0044 0592 str r2, [sp, #20] +1736:Src/main.c **** { + 9380 .loc 1 1736 3 is_stmt 1 view .LVU2973 +1736:Src/main.c **** { + 9381 .loc 1 1736 7 is_stmt 0 view .LVU2974 + 9382 0046 01A9 add r1, sp, #4 + 9383 0048 0748 ldr r0, .L508 + 9384 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 9385 .LVL835: +1736:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 560 + + + 9386 .loc 1 1736 6 discriminator 1 view .LVU2975 + 9387 004e 48B9 cbnz r0, .L507 +1743:Src/main.c **** + 9388 .loc 1 1743 3 is_stmt 1 view .LVU2976 + 9389 0050 0548 ldr r0, .L508 + 9390 0052 FFF7FEFF bl HAL_TIM_MspPostInit + 9391 .LVL836: +1745:Src/main.c **** + 9392 .loc 1 1745 1 is_stmt 0 view .LVU2977 + 9393 0056 09B0 add sp, sp, #36 + 9394 .LCFI94: + 9395 .cfi_remember_state + 9396 .cfi_def_cfa_offset 4 + 9397 @ sp needed + 9398 0058 5DF804FB ldr pc, [sp], #4 + 9399 .L505: + 9400 .LCFI95: + 9401 .cfi_restore_state +1726:Src/main.c **** } + 9402 .loc 1 1726 5 is_stmt 1 view .LVU2978 + 9403 005c FFF7FEFF bl Error_Handler + 9404 .LVL837: + 9405 .L506: +1730:Src/main.c **** } + 9406 .loc 1 1730 5 view .LVU2979 + 9407 0060 FFF7FEFF bl Error_Handler + 9408 .LVL838: + 9409 .L507: +1738:Src/main.c **** } + 9410 .loc 1 1738 5 view .LVU2980 + 9411 0064 FFF7FEFF bl Error_Handler + 9412 .LVL839: + 9413 .L509: + 9414 .align 2 + 9415 .L508: + 9416 0068 00000000 .word htim11 + 9417 006c 00480140 .word 1073825792 + 9418 .cfi_endproc + 9419 .LFE1202: + 9421 .section .text.MX_TIM4_Init,"ax",%progbits + 9422 .align 1 + 9423 .syntax unified + 9424 .thumb + 9425 .thumb_func + 9427 MX_TIM4_Init: + 9428 .LFB1196: +1457:Src/main.c **** + 9429 .loc 1 1457 1 view -0 + 9430 .cfi_startproc + 9431 @ args = 0, pretend = 0, frame = 56 + 9432 @ frame_needed = 0, uses_anonymous_args = 0 + 9433 0000 00B5 push {lr} + 9434 .LCFI96: + 9435 .cfi_def_cfa_offset 4 + 9436 .cfi_offset 14, -4 + 9437 0002 8FB0 sub sp, sp, #60 + 9438 .LCFI97: + ARM GAS /tmp/ccwR4KB7.s page 561 + + + 9439 .cfi_def_cfa_offset 64 +1463:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 9440 .loc 1 1463 3 view .LVU2982 +1463:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 9441 .loc 1 1463 26 is_stmt 0 view .LVU2983 + 9442 0004 0023 movs r3, #0 + 9443 0006 0A93 str r3, [sp, #40] + 9444 0008 0B93 str r3, [sp, #44] + 9445 000a 0C93 str r3, [sp, #48] + 9446 000c 0D93 str r3, [sp, #52] +1464:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 9447 .loc 1 1464 3 is_stmt 1 view .LVU2984 +1464:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 9448 .loc 1 1464 27 is_stmt 0 view .LVU2985 + 9449 000e 0793 str r3, [sp, #28] + 9450 0010 0893 str r3, [sp, #32] + 9451 0012 0993 str r3, [sp, #36] +1465:Src/main.c **** + 9452 .loc 1 1465 3 is_stmt 1 view .LVU2986 +1465:Src/main.c **** + 9453 .loc 1 1465 22 is_stmt 0 view .LVU2987 + 9454 0014 0093 str r3, [sp] + 9455 0016 0193 str r3, [sp, #4] + 9456 0018 0293 str r3, [sp, #8] + 9457 001a 0393 str r3, [sp, #12] + 9458 001c 0493 str r3, [sp, #16] + 9459 001e 0593 str r3, [sp, #20] + 9460 0020 0693 str r3, [sp, #24] +1470:Src/main.c **** htim4.Init.Prescaler = 0; + 9461 .loc 1 1470 3 is_stmt 1 view .LVU2988 +1470:Src/main.c **** htim4.Init.Prescaler = 0; + 9462 .loc 1 1470 18 is_stmt 0 view .LVU2989 + 9463 0022 1E48 ldr r0, .L522 + 9464 0024 1E4A ldr r2, .L522+4 + 9465 0026 0260 str r2, [r0] +1471:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 9466 .loc 1 1471 3 is_stmt 1 view .LVU2990 +1471:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 9467 .loc 1 1471 24 is_stmt 0 view .LVU2991 + 9468 0028 4360 str r3, [r0, #4] +1472:Src/main.c **** htim4.Init.Period = 45; + 9469 .loc 1 1472 3 is_stmt 1 view .LVU2992 +1472:Src/main.c **** htim4.Init.Period = 45; + 9470 .loc 1 1472 26 is_stmt 0 view .LVU2993 + 9471 002a 8360 str r3, [r0, #8] +1473:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9472 .loc 1 1473 3 is_stmt 1 view .LVU2994 +1473:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 9473 .loc 1 1473 21 is_stmt 0 view .LVU2995 + 9474 002c 2D22 movs r2, #45 + 9475 002e C260 str r2, [r0, #12] +1474:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9476 .loc 1 1474 3 is_stmt 1 view .LVU2996 +1474:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 9477 .loc 1 1474 28 is_stmt 0 view .LVU2997 + 9478 0030 0361 str r3, [r0, #16] +1475:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + ARM GAS /tmp/ccwR4KB7.s page 562 + + + 9479 .loc 1 1475 3 is_stmt 1 view .LVU2998 +1475:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 9480 .loc 1 1475 32 is_stmt 0 view .LVU2999 + 9481 0032 8361 str r3, [r0, #24] +1476:Src/main.c **** { + 9482 .loc 1 1476 3 is_stmt 1 view .LVU3000 +1476:Src/main.c **** { + 9483 .loc 1 1476 7 is_stmt 0 view .LVU3001 + 9484 0034 FFF7FEFF bl HAL_TIM_Base_Init + 9485 .LVL840: +1476:Src/main.c **** { + 9486 .loc 1 1476 6 discriminator 1 view .LVU3002 + 9487 0038 30BB cbnz r0, .L517 +1480:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 9488 .loc 1 1480 3 is_stmt 1 view .LVU3003 +1480:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 9489 .loc 1 1480 34 is_stmt 0 view .LVU3004 + 9490 003a 4FF48053 mov r3, #4096 + 9491 003e 0A93 str r3, [sp, #40] +1481:Src/main.c **** { + 9492 .loc 1 1481 3 is_stmt 1 view .LVU3005 +1481:Src/main.c **** { + 9493 .loc 1 1481 7 is_stmt 0 view .LVU3006 + 9494 0040 0AA9 add r1, sp, #40 + 9495 0042 1648 ldr r0, .L522 + 9496 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource + 9497 .LVL841: +1481:Src/main.c **** { + 9498 .loc 1 1481 6 discriminator 1 view .LVU3007 + 9499 0048 00BB cbnz r0, .L518 +1485:Src/main.c **** { + 9500 .loc 1 1485 3 is_stmt 1 view .LVU3008 +1485:Src/main.c **** { + 9501 .loc 1 1485 7 is_stmt 0 view .LVU3009 + 9502 004a 1448 ldr r0, .L522 + 9503 004c FFF7FEFF bl HAL_TIM_PWM_Init + 9504 .LVL842: +1485:Src/main.c **** { + 9505 .loc 1 1485 6 discriminator 1 view .LVU3010 + 9506 0050 F0B9 cbnz r0, .L519 +1489:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 9507 .loc 1 1489 3 is_stmt 1 view .LVU3011 +1489:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 9508 .loc 1 1489 37 is_stmt 0 view .LVU3012 + 9509 0052 0023 movs r3, #0 + 9510 0054 0793 str r3, [sp, #28] +1490:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 9511 .loc 1 1490 3 is_stmt 1 view .LVU3013 +1490:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 9512 .loc 1 1490 33 is_stmt 0 view .LVU3014 + 9513 0056 0993 str r3, [sp, #36] +1491:Src/main.c **** { + 9514 .loc 1 1491 3 is_stmt 1 view .LVU3015 +1491:Src/main.c **** { + 9515 .loc 1 1491 7 is_stmt 0 view .LVU3016 + 9516 0058 07A9 add r1, sp, #28 + 9517 005a 1048 ldr r0, .L522 + ARM GAS /tmp/ccwR4KB7.s page 563 + + + 9518 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 9519 .LVL843: +1491:Src/main.c **** { + 9520 .loc 1 1491 6 discriminator 1 view .LVU3017 + 9521 0060 C0B9 cbnz r0, .L520 +1495:Src/main.c **** sConfigOC.Pulse = 22; + 9522 .loc 1 1495 3 is_stmt 1 view .LVU3018 +1495:Src/main.c **** sConfigOC.Pulse = 22; + 9523 .loc 1 1495 20 is_stmt 0 view .LVU3019 + 9524 0062 6023 movs r3, #96 + 9525 0064 0093 str r3, [sp] +1496:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 9526 .loc 1 1496 3 is_stmt 1 view .LVU3020 +1496:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 9527 .loc 1 1496 19 is_stmt 0 view .LVU3021 + 9528 0066 1623 movs r3, #22 + 9529 0068 0193 str r3, [sp, #4] +1497:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 9530 .loc 1 1497 3 is_stmt 1 view .LVU3022 +1497:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 9531 .loc 1 1497 24 is_stmt 0 view .LVU3023 + 9532 006a 0023 movs r3, #0 + 9533 006c 0293 str r3, [sp, #8] +1498:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 9534 .loc 1 1498 3 is_stmt 1 view .LVU3024 +1498:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 9535 .loc 1 1498 24 is_stmt 0 view .LVU3025 + 9536 006e 0493 str r3, [sp, #16] +1499:Src/main.c **** { + 9537 .loc 1 1499 3 is_stmt 1 view .LVU3026 +1499:Src/main.c **** { + 9538 .loc 1 1499 7 is_stmt 0 view .LVU3027 + 9539 0070 0822 movs r2, #8 + 9540 0072 6946 mov r1, sp + 9541 0074 0948 ldr r0, .L522 + 9542 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 9543 .LVL844: +1499:Src/main.c **** { + 9544 .loc 1 1499 6 discriminator 1 view .LVU3028 + 9545 007a 68B9 cbnz r0, .L521 +1506:Src/main.c **** + 9546 .loc 1 1506 3 is_stmt 1 view .LVU3029 + 9547 007c 0748 ldr r0, .L522 + 9548 007e FFF7FEFF bl HAL_TIM_MspPostInit + 9549 .LVL845: +1508:Src/main.c **** + 9550 .loc 1 1508 1 is_stmt 0 view .LVU3030 + 9551 0082 0FB0 add sp, sp, #60 + 9552 .LCFI98: + 9553 .cfi_remember_state + 9554 .cfi_def_cfa_offset 4 + 9555 @ sp needed + 9556 0084 5DF804FB ldr pc, [sp], #4 + 9557 .L517: + 9558 .LCFI99: + 9559 .cfi_restore_state +1478:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 564 + + + 9560 .loc 1 1478 5 is_stmt 1 view .LVU3031 + 9561 0088 FFF7FEFF bl Error_Handler + 9562 .LVL846: + 9563 .L518: +1483:Src/main.c **** } + 9564 .loc 1 1483 5 view .LVU3032 + 9565 008c FFF7FEFF bl Error_Handler + 9566 .LVL847: + 9567 .L519: +1487:Src/main.c **** } + 9568 .loc 1 1487 5 view .LVU3033 + 9569 0090 FFF7FEFF bl Error_Handler + 9570 .LVL848: + 9571 .L520: +1493:Src/main.c **** } + 9572 .loc 1 1493 5 view .LVU3034 + 9573 0094 FFF7FEFF bl Error_Handler + 9574 .LVL849: + 9575 .L521: +1501:Src/main.c **** } + 9576 .loc 1 1501 5 view .LVU3035 + 9577 0098 FFF7FEFF bl Error_Handler + 9578 .LVL850: + 9579 .L523: + 9580 .align 2 + 9581 .L522: + 9582 009c 00000000 .word htim4 + 9583 00a0 00080040 .word 1073743872 + 9584 .cfi_endproc + 9585 .LFE1196: + 9587 .section .text.SystemClock_Config,"ax",%progbits + 9588 .align 1 + 9589 .global SystemClock_Config + 9590 .syntax unified + 9591 .thumb + 9592 .thumb_func + 9594 SystemClock_Config: + 9595 .LFB1187: + 935:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 9596 .loc 1 935 1 view -0 + 9597 .cfi_startproc + 9598 @ args = 0, pretend = 0, frame = 80 + 9599 @ frame_needed = 0, uses_anonymous_args = 0 + 9600 0000 00B5 push {lr} + 9601 .LCFI100: + 9602 .cfi_def_cfa_offset 4 + 9603 .cfi_offset 14, -4 + 9604 0002 95B0 sub sp, sp, #84 + 9605 .LCFI101: + 9606 .cfi_def_cfa_offset 88 + 936:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 9607 .loc 1 936 3 view .LVU3037 + 936:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 9608 .loc 1 936 22 is_stmt 0 view .LVU3038 + 9609 0004 3422 movs r2, #52 + 9610 0006 0021 movs r1, #0 + 9611 0008 07A8 add r0, sp, #28 + ARM GAS /tmp/ccwR4KB7.s page 565 + + + 9612 000a FFF7FEFF bl memset + 9613 .LVL851: + 937:Src/main.c **** + 9614 .loc 1 937 3 is_stmt 1 view .LVU3039 + 937:Src/main.c **** + 9615 .loc 1 937 22 is_stmt 0 view .LVU3040 + 9616 000e 0023 movs r3, #0 + 9617 0010 0293 str r3, [sp, #8] + 9618 0012 0393 str r3, [sp, #12] + 9619 0014 0493 str r3, [sp, #16] + 9620 0016 0593 str r3, [sp, #20] + 9621 0018 0693 str r3, [sp, #24] + 941:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 9622 .loc 1 941 3 is_stmt 1 view .LVU3041 + 9623 .LBB634: + 941:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 9624 .loc 1 941 3 view .LVU3042 + 941:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 9625 .loc 1 941 3 view .LVU3043 + 9626 001a 244B ldr r3, .L532 + 9627 001c 1A6C ldr r2, [r3, #64] + 9628 001e 42F08052 orr r2, r2, #268435456 + 9629 0022 1A64 str r2, [r3, #64] + 941:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 9630 .loc 1 941 3 view .LVU3044 + 9631 0024 1B6C ldr r3, [r3, #64] + 9632 0026 03F08053 and r3, r3, #268435456 + 9633 002a 0093 str r3, [sp] + 941:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 9634 .loc 1 941 3 view .LVU3045 + 9635 002c 009B ldr r3, [sp] + 9636 .LBE634: + 941:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 9637 .loc 1 941 3 view .LVU3046 + 942:Src/main.c **** + 9638 .loc 1 942 3 view .LVU3047 + 9639 .LBB635: + 942:Src/main.c **** + 9640 .loc 1 942 3 view .LVU3048 + 942:Src/main.c **** + 9641 .loc 1 942 3 view .LVU3049 + 9642 002e 204B ldr r3, .L532+4 + 9643 0030 1A68 ldr r2, [r3] + 9644 0032 42F44042 orr r2, r2, #49152 + 9645 0036 1A60 str r2, [r3] + 942:Src/main.c **** + 9646 .loc 1 942 3 view .LVU3050 + 9647 0038 1B68 ldr r3, [r3] + 9648 003a 03F44043 and r3, r3, #49152 + 9649 003e 0193 str r3, [sp, #4] + 942:Src/main.c **** + 9650 .loc 1 942 3 view .LVU3051 + 9651 0040 019B ldr r3, [sp, #4] + 9652 .LBE635: + 942:Src/main.c **** + 9653 .loc 1 942 3 view .LVU3052 + 947:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + ARM GAS /tmp/ccwR4KB7.s page 566 + + + 9654 .loc 1 947 3 view .LVU3053 + 947:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 9655 .loc 1 947 36 is_stmt 0 view .LVU3054 + 9656 0042 0123 movs r3, #1 + 9657 0044 0793 str r3, [sp, #28] + 948:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 9658 .loc 1 948 3 is_stmt 1 view .LVU3055 + 948:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 9659 .loc 1 948 30 is_stmt 0 view .LVU3056 + 9660 0046 4FF48033 mov r3, #65536 + 9661 004a 0893 str r3, [sp, #32] + 949:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 9662 .loc 1 949 3 is_stmt 1 view .LVU3057 + 949:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 9663 .loc 1 949 34 is_stmt 0 view .LVU3058 + 9664 004c 0223 movs r3, #2 + 9665 004e 0D93 str r3, [sp, #52] + 950:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 9666 .loc 1 950 3 is_stmt 1 view .LVU3059 + 950:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 9667 .loc 1 950 35 is_stmt 0 view .LVU3060 + 9668 0050 4FF48002 mov r2, #4194304 + 9669 0054 0E92 str r2, [sp, #56] + 951:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 9670 .loc 1 951 3 is_stmt 1 view .LVU3061 + 951:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 9671 .loc 1 951 30 is_stmt 0 view .LVU3062 + 9672 0056 1922 movs r2, #25 + 9673 0058 0F92 str r2, [sp, #60] + 952:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 9674 .loc 1 952 3 is_stmt 1 view .LVU3063 + 952:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 9675 .loc 1 952 30 is_stmt 0 view .LVU3064 + 9676 005a 4FF4B872 mov r2, #368 + 9677 005e 1092 str r2, [sp, #64] + 953:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 9678 .loc 1 953 3 is_stmt 1 view .LVU3065 + 953:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 9679 .loc 1 953 30 is_stmt 0 view .LVU3066 + 9680 0060 1193 str r3, [sp, #68] + 954:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 9681 .loc 1 954 3 is_stmt 1 view .LVU3067 + 954:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 9682 .loc 1 954 30 is_stmt 0 view .LVU3068 + 9683 0062 0822 movs r2, #8 + 9684 0064 1292 str r2, [sp, #72] + 955:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 9685 .loc 1 955 3 is_stmt 1 view .LVU3069 + 955:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 9686 .loc 1 955 30 is_stmt 0 view .LVU3070 + 9687 0066 1393 str r3, [sp, #76] + 956:Src/main.c **** { + 9688 .loc 1 956 3 is_stmt 1 view .LVU3071 + 956:Src/main.c **** { + 9689 .loc 1 956 7 is_stmt 0 view .LVU3072 + 9690 0068 07A8 add r0, sp, #28 + 9691 006a FFF7FEFF bl HAL_RCC_OscConfig + ARM GAS /tmp/ccwR4KB7.s page 567 + + + 9692 .LVL852: + 956:Src/main.c **** { + 9693 .loc 1 956 6 discriminator 1 view .LVU3073 + 9694 006e B0B9 cbnz r0, .L529 + 963:Src/main.c **** { + 9695 .loc 1 963 3 is_stmt 1 view .LVU3074 + 963:Src/main.c **** { + 9696 .loc 1 963 7 is_stmt 0 view .LVU3075 + 9697 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive + 9698 .LVL853: + 963:Src/main.c **** { + 9699 .loc 1 963 6 discriminator 1 view .LVU3076 + 9700 0074 A8B9 cbnz r0, .L530 + 970:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 9701 .loc 1 970 3 is_stmt 1 view .LVU3077 + 970:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 9702 .loc 1 970 31 is_stmt 0 view .LVU3078 + 9703 0076 0F23 movs r3, #15 + 9704 0078 0293 str r3, [sp, #8] + 972:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 9705 .loc 1 972 3 is_stmt 1 view .LVU3079 + 972:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 9706 .loc 1 972 34 is_stmt 0 view .LVU3080 + 9707 007a 0223 movs r3, #2 + 9708 007c 0393 str r3, [sp, #12] + 973:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 9709 .loc 1 973 3 is_stmt 1 view .LVU3081 + 973:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 9710 .loc 1 973 35 is_stmt 0 view .LVU3082 + 9711 007e 0023 movs r3, #0 + 9712 0080 0493 str r3, [sp, #16] + 974:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 9713 .loc 1 974 3 is_stmt 1 view .LVU3083 + 974:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 9714 .loc 1 974 36 is_stmt 0 view .LVU3084 + 9715 0082 4FF4A053 mov r3, #5120 + 9716 0086 0593 str r3, [sp, #20] + 975:Src/main.c **** + 9717 .loc 1 975 3 is_stmt 1 view .LVU3085 + 975:Src/main.c **** + 9718 .loc 1 975 36 is_stmt 0 view .LVU3086 + 9719 0088 4FF48053 mov r3, #4096 + 9720 008c 0693 str r3, [sp, #24] + 977:Src/main.c **** { + 9721 .loc 1 977 3 is_stmt 1 view .LVU3087 + 977:Src/main.c **** { + 9722 .loc 1 977 7 is_stmt 0 view .LVU3088 + 9723 008e 0621 movs r1, #6 + 9724 0090 02A8 add r0, sp, #8 + 9725 0092 FFF7FEFF bl HAL_RCC_ClockConfig + 9726 .LVL854: + 977:Src/main.c **** { + 9727 .loc 1 977 6 discriminator 1 view .LVU3089 + 9728 0096 30B9 cbnz r0, .L531 + 981:Src/main.c **** + 9729 .loc 1 981 1 view .LVU3090 + 9730 0098 15B0 add sp, sp, #84 + ARM GAS /tmp/ccwR4KB7.s page 568 + + + 9731 .LCFI102: + 9732 .cfi_remember_state + 9733 .cfi_def_cfa_offset 4 + 9734 @ sp needed + 9735 009a 5DF804FB ldr pc, [sp], #4 + 9736 .L529: + 9737 .LCFI103: + 9738 .cfi_restore_state + 958:Src/main.c **** } + 9739 .loc 1 958 5 is_stmt 1 view .LVU3091 + 9740 009e FFF7FEFF bl Error_Handler + 9741 .LVL855: + 9742 .L530: + 965:Src/main.c **** } + 9743 .loc 1 965 5 view .LVU3092 + 9744 00a2 FFF7FEFF bl Error_Handler + 9745 .LVL856: + 9746 .L531: + 979:Src/main.c **** } + 9747 .loc 1 979 5 view .LVU3093 + 9748 00a6 FFF7FEFF bl Error_Handler + 9749 .LVL857: + 9750 .L533: + 9751 00aa 00BF .align 2 + 9752 .L532: + 9753 00ac 00380240 .word 1073887232 + 9754 00b0 00700040 .word 1073770496 + 9755 .cfi_endproc + 9756 .LFE1187: + 9758 .section .text.main,"ax",%progbits + 9759 .align 1 + 9760 .global main + 9761 .syntax unified + 9762 .thumb + 9763 .thumb_func + 9765 main: + 9766 .LFB1186: + 236:Src/main.c **** + 9767 .loc 1 236 1 view -0 + 9768 .cfi_startproc + 9769 @ args = 0, pretend = 0, frame = 8 + 9770 @ frame_needed = 0, uses_anonymous_args = 0 + 9771 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 9772 .LCFI104: + 9773 .cfi_def_cfa_offset 28 + 9774 .cfi_offset 4, -28 + 9775 .cfi_offset 5, -24 + 9776 .cfi_offset 6, -20 + 9777 .cfi_offset 7, -16 + 9778 .cfi_offset 8, -12 + 9779 .cfi_offset 9, -8 + 9780 .cfi_offset 14, -4 + 9781 0004 85B0 sub sp, sp, #20 + 9782 .LCFI105: + 9783 .cfi_def_cfa_offset 48 + 239:Src/main.c **** /* USER CODE END 1 */ + 9784 .loc 1 239 2 view .LVU3095 + ARM GAS /tmp/ccwR4KB7.s page 569 + + + 245:Src/main.c **** + 9785 .loc 1 245 3 view .LVU3096 + 9786 0006 FFF7FEFF bl HAL_Init + 9787 .LVL858: + 252:Src/main.c **** + 9788 .loc 1 252 3 view .LVU3097 + 9789 000a FFF7FEFF bl SystemClock_Config + 9790 .LVL859: + 259:Src/main.c **** MX_DMA_Init(); + 9791 .loc 1 259 3 view .LVU3098 + 9792 000e FFF7FEFF bl MX_GPIO_Init + 9793 .LVL860: + 260:Src/main.c **** MX_SPI4_Init(); + 9794 .loc 1 260 3 view .LVU3099 + 9795 0012 FFF7FEFF bl MX_DMA_Init + 9796 .LVL861: + 261:Src/main.c **** MX_FATFS_Init(); + 9797 .loc 1 261 3 view .LVU3100 + 9798 0016 FFF7FEFF bl MX_SPI4_Init + 9799 .LVL862: + 262:Src/main.c **** MX_TIM2_Init(); + 9800 .loc 1 262 3 view .LVU3101 + 9801 001a FFF7FEFF bl MX_FATFS_Init + 9802 .LVL863: + 263:Src/main.c **** MX_TIM5_Init(); + 9803 .loc 1 263 3 view .LVU3102 + 9804 001e FFF7FEFF bl MX_TIM2_Init + 9805 .LVL864: + 264:Src/main.c **** MX_ADC1_Init(); + 9806 .loc 1 264 3 view .LVU3103 + 9807 0022 FFF7FEFF bl MX_TIM5_Init + 9808 .LVL865: + 265:Src/main.c **** MX_ADC3_Init(); + 9809 .loc 1 265 3 view .LVU3104 + 9810 0026 FFF7FEFF bl MX_ADC1_Init + 9811 .LVL866: + 266:Src/main.c **** MX_SPI2_Init(); + 9812 .loc 1 266 3 view .LVU3105 + 9813 002a FFF7FEFF bl MX_ADC3_Init + 9814 .LVL867: + 267:Src/main.c **** MX_SPI5_Init(); + 9815 .loc 1 267 3 view .LVU3106 + 9816 002e FFF7FEFF bl MX_SPI2_Init + 9817 .LVL868: + 268:Src/main.c **** MX_SPI6_Init(); + 9818 .loc 1 268 3 view .LVU3107 + 9819 0032 FFF7FEFF bl MX_SPI5_Init + 9820 .LVL869: + 269:Src/main.c **** MX_USART1_UART_Init(); + 9821 .loc 1 269 3 view .LVU3108 + 9822 0036 FFF7FEFF bl MX_SPI6_Init + 9823 .LVL870: + 270:Src/main.c **** MX_SDMMC1_SD_Init(); + 9824 .loc 1 270 3 view .LVU3109 + 9825 003a FFF7FEFF bl MX_USART1_UART_Init + 9826 .LVL871: + 271:Src/main.c **** MX_TIM7_Init(); + ARM GAS /tmp/ccwR4KB7.s page 570 + + + 9827 .loc 1 271 3 view .LVU3110 + 9828 003e FFF7FEFF bl MX_SDMMC1_SD_Init + 9829 .LVL872: + 272:Src/main.c **** MX_TIM6_Init(); + 9830 .loc 1 272 3 view .LVU3111 + 9831 0042 FFF7FEFF bl MX_TIM7_Init + 9832 .LVL873: + 273:Src/main.c **** MX_TIM10_Init(); + 9833 .loc 1 273 3 view .LVU3112 + 9834 0046 FFF7FEFF bl MX_TIM6_Init + 9835 .LVL874: + 274:Src/main.c **** MX_UART8_Init(); + 9836 .loc 1 274 3 view .LVU3113 + 9837 004a FFF7FEFF bl MX_TIM10_Init + 9838 .LVL875: + 275:Src/main.c **** MX_TIM8_Init(); + 9839 .loc 1 275 3 view .LVU3114 + 9840 004e FFF7FEFF bl MX_UART8_Init + 9841 .LVL876: + 276:Src/main.c **** MX_TIM11_Init(); + 9842 .loc 1 276 3 view .LVU3115 + 9843 0052 FFF7FEFF bl MX_TIM8_Init + 9844 .LVL877: + 277:Src/main.c **** MX_TIM4_Init(); + 9845 .loc 1 277 3 view .LVU3116 + 9846 0056 FFF7FEFF bl MX_TIM11_Init + 9847 .LVL878: + 278:Src/main.c **** /* USER CODE BEGIN 2 */ + 9848 .loc 1 278 3 view .LVU3117 + 9849 005a FFF7FEFF bl MX_TIM4_Init + 9850 .LVL879: + 280:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 9851 .loc 1 280 2 view .LVU3118 + 9852 005e FFF7FEFF bl Init_params + 9853 .LVL880: + 291:Src/main.c **** + 9854 .loc 1 291 2 view .LVU3119 + 291:Src/main.c **** + 9855 .loc 1 291 14 is_stmt 0 view .LVU3120 + 9856 0062 854A ldr r2, .L612 + 9857 0064 3523 movs r3, #53 + 9858 0066 D362 str r3, [r2, #44] + 293:Src/main.c **** + 9859 .loc 1 293 2 is_stmt 1 view .LVU3121 + 293:Src/main.c **** + 9860 .loc 1 293 23 is_stmt 0 view .LVU3122 + 9861 0068 D36A ldr r3, [r2, #44] + 293:Src/main.c **** + 9862 .loc 1 293 30 view .LVU3123 + 9863 006a 0133 adds r3, r3, #1 + 293:Src/main.c **** + 9864 .loc 1 293 33 view .LVU3124 + 9865 006c 5B08 lsrs r3, r3, #1 + 293:Src/main.c **** + 9866 .loc 1 293 36 view .LVU3125 + 9867 006e 013B subs r3, r3, #1 + 293:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 571 + + + 9868 .loc 1 293 15 view .LVU3126 + 9869 0070 D363 str r3, [r2, #60] + 298:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9870 .loc 1 298 2 is_stmt 1 view .LVU3127 + 298:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9871 .loc 1 298 23 is_stmt 0 view .LVU3128 + 9872 0072 D36A ldr r3, [r2, #44] + 298:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9873 .loc 1 298 36 view .LVU3129 + 9874 0074 9B00 lsls r3, r3, #2 + 9875 0076 0333 adds r3, r3, #3 + 298:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9876 .loc 1 298 15 view .LVU3130 + 9877 0078 02F5A032 add r2, r2, #81920 + 9878 007c D362 str r3, [r2, #44] + 299:Src/main.c **** + 9879 .loc 1 299 2 is_stmt 1 view .LVU3131 + 299:Src/main.c **** + 9880 .loc 1 299 25 is_stmt 0 view .LVU3132 + 9881 007e D36A ldr r3, [r2, #44] + 299:Src/main.c **** + 9882 .loc 1 299 32 view .LVU3133 + 9883 0080 0133 adds r3, r3, #1 + 299:Src/main.c **** + 9884 .loc 1 299 35 view .LVU3134 + 9885 0082 5B08 lsrs r3, r3, #1 + 299:Src/main.c **** + 9886 .loc 1 299 38 view .LVU3135 + 9887 0084 013B subs r3, r3, #1 + 299:Src/main.c **** + 9888 .loc 1 299 16 view .LVU3136 + 9889 0086 5363 str r3, [r2, #52] + 9890 0088 4CE0 b .L535 + 9891 .L602: + 313:Src/main.c **** { + 9892 .loc 1 313 85 discriminator 1 view .LVU3137 + 9893 008a 7C4B ldr r3, .L612+4 + 9894 008c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 313:Src/main.c **** { + 9895 .loc 1 313 73 discriminator 1 view .LVU3138 + 9896 008e 002B cmp r3, #0 + 9897 0090 4FD1 bne .L536 + 9898 .L537: + 9899 .LBB636: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9900 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3139 + 9901 .LBB637: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9902 .loc 7 3073 3 discriminator 1 view .LVU3140 +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9903 .loc 7 3073 3 discriminator 1 view .LVU3141 +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9904 .loc 7 3073 3 discriminator 1 view .LVU3142 + 9905 .LVL881: + 9906 .LBB638: + 9907 .LBI638: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccwR4KB7.s page 572 + + + 9908 .loc 8 1068 31 view .LVU3143 + 9909 .LBB639: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9910 .loc 8 1070 5 view .LVU3144 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9911 .loc 8 1072 4 view .LVU3145 + 9912 0092 7B4A ldr r2, .L612+8 + 9913 .syntax unified + 9914 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9915 0094 52E8003F ldrex r3, [r2] + 9916 @ 0 "" 2 + 9917 .LVL882: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9918 .loc 8 1073 4 view .LVU3146 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9919 .loc 8 1073 4 is_stmt 0 view .LVU3147 + 9920 .thumb + 9921 .syntax unified + 9922 .LBE639: + 9923 .LBE638: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9924 .loc 7 3073 3 discriminator 1 view .LVU3148 + 9925 0098 43F48073 orr r3, r3, #256 + 9926 .LVL883: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9927 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3149 + 9928 .LBB640: + 9929 .LBI640: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9930 .loc 8 1119 31 view .LVU3150 + 9931 .LBB641: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9932 .loc 8 1121 4 view .LVU3151 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9933 .loc 8 1123 4 view .LVU3152 + 9934 .syntax unified + 9935 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9936 009c 42E80031 strex r1, r3, [r2] + 9937 @ 0 "" 2 + 9938 .LVL884: + 9939 .loc 8 1124 4 view .LVU3153 + 9940 .loc 8 1124 4 is_stmt 0 view .LVU3154 + 9941 .thumb + 9942 .syntax unified + 9943 .LBE641: + 9944 .LBE640: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9945 .loc 7 3073 3 discriminator 1 view .LVU3155 + 9946 00a0 0029 cmp r1, #0 + 9947 00a2 F6D1 bne .L537 + 9948 .LVL885: + 9949 .L538: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9950 .loc 7 3073 3 discriminator 1 view .LVU3156 + 9951 .LBE637: + 9952 .LBE636: + 9953 .LBB642: + ARM GAS /tmp/ccwR4KB7.s page 573 + + +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9954 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3157 + 9955 .LBB643: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9956 .loc 7 3040 3 discriminator 1 view .LVU3158 +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9957 .loc 7 3040 3 discriminator 1 view .LVU3159 +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9958 .loc 7 3040 3 discriminator 1 view .LVU3160 + 9959 .LBB644: + 9960 .LBI644: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9961 .loc 8 1068 31 view .LVU3161 + 9962 .LBB645: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9963 .loc 8 1070 5 view .LVU3162 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9964 .loc 8 1072 4 view .LVU3163 + 9965 00a4 764A ldr r2, .L612+8 + 9966 .syntax unified + 9967 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9968 00a6 52E8003F ldrex r3, [r2] + 9969 @ 0 "" 2 + 9970 .LVL886: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9971 .loc 8 1073 4 view .LVU3164 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9972 .loc 8 1073 4 is_stmt 0 view .LVU3165 + 9973 .thumb + 9974 .syntax unified + 9975 .LBE645: + 9976 .LBE644: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9977 .loc 7 3040 3 discriminator 1 view .LVU3166 + 9978 00aa 43F02003 orr r3, r3, #32 + 9979 .LVL887: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9980 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3167 + 9981 .LBB646: + 9982 .LBI646: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9983 .loc 8 1119 31 view .LVU3168 + 9984 .LBB647: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9985 .loc 8 1121 4 view .LVU3169 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9986 .loc 8 1123 4 view .LVU3170 + 9987 .syntax unified + 9988 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9989 00ae 42E80031 strex r1, r3, [r2] + 9990 @ 0 "" 2 + 9991 .LVL888: + 9992 .loc 8 1124 4 view .LVU3171 + 9993 .loc 8 1124 4 is_stmt 0 view .LVU3172 + 9994 .thumb + 9995 .syntax unified + 9996 .LBE647: + ARM GAS /tmp/ccwR4KB7.s page 574 + + + 9997 .LBE646: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 9998 .loc 7 3040 3 discriminator 1 view .LVU3173 + 9999 00b2 0029 cmp r1, #0 + 10000 00b4 F6D1 bne .L538 + 10001 .LVL889: + 10002 .L539: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10003 .loc 7 3040 3 discriminator 1 view .LVU3174 + 10004 .LBE643: + 10005 .LBE642: + 10006 .LBB648: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10007 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3175 + 10008 .LBB649: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10009 .loc 7 3136 3 discriminator 1 view .LVU3176 +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10010 .loc 7 3136 3 discriminator 1 view .LVU3177 +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10011 .loc 7 3136 3 discriminator 1 view .LVU3178 + 10012 .LBB650: + 10013 .LBI650: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10014 .loc 8 1068 31 view .LVU3179 + 10015 .LBB651: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10016 .loc 8 1070 5 view .LVU3180 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10017 .loc 8 1072 4 view .LVU3181 + 10018 00b6 724A ldr r2, .L612+8 + 10019 00b8 02F10803 add r3, r2, #8 + 10020 .syntax unified + 10021 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10022 00bc 53E8003F ldrex r3, [r3] + 10023 @ 0 "" 2 + 10024 .LVL890: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10025 .loc 8 1073 4 view .LVU3182 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10026 .loc 8 1073 4 is_stmt 0 view .LVU3183 + 10027 .thumb + 10028 .syntax unified + 10029 .LBE651: + 10030 .LBE650: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10031 .loc 7 3136 3 discriminator 1 view .LVU3184 + 10032 00c0 43F00103 orr r3, r3, #1 + 10033 .LVL891: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10034 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3185 + 10035 .LBB652: + 10036 .LBI652: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10037 .loc 8 1119 31 view .LVU3186 + 10038 .LBB653: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccwR4KB7.s page 575 + + + 10039 .loc 8 1121 4 view .LVU3187 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10040 .loc 8 1123 4 view .LVU3188 + 10041 00c4 0832 adds r2, r2, #8 + 10042 .syntax unified + 10043 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10044 00c6 42E80031 strex r1, r3, [r2] + 10045 @ 0 "" 2 + 10046 .LVL892: + 10047 .loc 8 1124 4 view .LVU3189 + 10048 .loc 8 1124 4 is_stmt 0 view .LVU3190 + 10049 .thumb + 10050 .syntax unified + 10051 .LBE653: + 10052 .LBE652: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10053 .loc 7 3136 3 discriminator 1 view .LVU3191 + 10054 00ca 0029 cmp r1, #0 + 10055 00cc F3D1 bne .L539 + 10056 .LBE649: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10057 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3192 + 10058 .LVL893: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10059 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3193 + 10060 .LBE648: + 319:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 10061 .loc 1 319 4 is_stmt 1 view .LVU3194 + 10062 .LBB654: + 10063 .LBI654: +2024:Drivers/CMSIS/Include/core_cm7.h **** { + 10064 .loc 2 2024 22 view .LVU3195 + 10065 .LBB655: +2026:Drivers/CMSIS/Include/core_cm7.h **** { + 10066 .loc 2 2026 3 view .LVU3196 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 10067 .loc 2 2028 5 view .LVU3197 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 10068 .loc 2 2028 47 is_stmt 0 view .LVU3198 + 10069 00ce 6D4B ldr r3, .L612+12 + 10070 00d0 0022 movs r2, #0 + 10071 00d2 83F82523 strb r2, [r3, #805] + 10072 .LVL894: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 10073 .loc 2 2028 47 view .LVU3199 + 10074 .LBE655: + 10075 .LBE654: + 320:Src/main.c **** u_rx_flg = 1; + 10076 .loc 1 320 4 is_stmt 1 view .LVU3200 + 10077 .LBB656: + 10078 .LBI656: +1896:Drivers/CMSIS/Include/core_cm7.h **** { + 10079 .loc 2 1896 22 view .LVU3201 + 10080 .LBB657: +1898:Drivers/CMSIS/Include/core_cm7.h **** { + 10081 .loc 2 1898 3 view .LVU3202 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + ARM GAS /tmp/ccwR4KB7.s page 576 + + + 10082 .loc 2 1900 5 view .LVU3203 +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 10083 .loc 2 1900 43 is_stmt 0 view .LVU3204 + 10084 00d6 2022 movs r2, #32 + 10085 00d8 5A60 str r2, [r3, #4] + 10086 .LVL895: +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 10087 .loc 2 1900 43 view .LVU3205 + 10088 .LBE657: + 10089 .LBE656: + 321:Src/main.c **** } + 10090 .loc 1 321 4 is_stmt 1 view .LVU3206 + 321:Src/main.c **** } + 10091 .loc 1 321 13 is_stmt 0 view .LVU3207 + 10092 00da 684B ldr r3, .L612+4 + 10093 00dc 0122 movs r2, #1 + 10094 00de 1A70 strb r2, [r3] + 10095 00e0 27E0 b .L536 + 10096 .L552: + 331:Src/main.c **** task.current_param = task.min_param; + 10097 .loc 1 331 6 is_stmt 1 view .LVU3208 + 331:Src/main.c **** task.current_param = task.min_param; + 10098 .loc 1 331 20 is_stmt 0 view .LVU3209 + 10099 00e2 694B ldr r3, .L612+16 + 10100 00e4 0022 movs r2, #0 + 10101 00e6 1A70 strb r2, [r3] + 332:Src/main.c **** Stop_TIM10(); + 10102 .loc 1 332 6 is_stmt 1 view .LVU3210 + 332:Src/main.c **** Stop_TIM10(); + 10103 .loc 1 332 31 is_stmt 0 view .LVU3211 + 10104 00e8 684B ldr r3, .L612+20 + 10105 00ea 5A68 ldr r2, [r3, #4] @ float + 332:Src/main.c **** Stop_TIM10(); + 10106 .loc 1 332 25 view .LVU3212 + 10107 00ec 1A61 str r2, [r3, #16] @ float + 333:Src/main.c **** break; + 10108 .loc 1 333 6 is_stmt 1 view .LVU3213 + 10109 00ee FFF7FEFF bl Stop_TIM10 + 10110 .LVL896: + 334:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 10111 .loc 1 334 5 view .LVU3214 + 10112 .L540: + 874:Src/main.c **** { + 10113 .loc 1 874 3 view .LVU3215 + 10114 00f2 674B ldr r3, .L612+24 + 10115 00f4 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 10116 00f6 022B cmp r3, #2 + 10117 00f8 00F08184 beq .L587 + 10118 00fc 032B cmp r3, #3 + 10119 00fe 00F0B484 beq .L598 + 10120 0102 012B cmp r3, #1 + 10121 0104 09D1 bne .L589 + 877:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 10122 .loc 1 877 5 view .LVU3216 + 10123 0106 634C ldr r4, .L612+28 + 10124 0108 0221 movs r1, #2 + 10125 010a 2046 mov r0, r4 + ARM GAS /tmp/ccwR4KB7.s page 577 + + + 10126 010c FFF7FEFF bl USART_TX + 10127 .LVL897: + 879:Src/main.c **** State_Data[1]=0;//All OK! + 10128 .loc 1 879 5 view .LVU3217 + 879:Src/main.c **** State_Data[1]=0;//All OK! + 10129 .loc 1 879 18 is_stmt 0 view .LVU3218 + 10130 0110 0023 movs r3, #0 + 10131 0112 2370 strb r3, [r4] + 880:Src/main.c **** UART_transmission_request = NO_MESS; + 10132 .loc 1 880 5 is_stmt 1 view .LVU3219 + 880:Src/main.c **** UART_transmission_request = NO_MESS; + 10133 .loc 1 880 18 is_stmt 0 view .LVU3220 + 10134 0114 6370 strb r3, [r4, #1] + 881:Src/main.c **** break; + 10135 .loc 1 881 5 is_stmt 1 view .LVU3221 + 881:Src/main.c **** break; + 10136 .loc 1 881 31 is_stmt 0 view .LVU3222 + 10137 0116 5E4A ldr r2, .L612+24 + 10138 0118 1370 strb r3, [r2] + 882:Src/main.c **** case MESS_02://Transmith packet + 10139 .loc 1 882 4 is_stmt 1 view .LVU3223 + 10140 .L589: + 916:Src/main.c **** { + 10141 .loc 1 916 5 view .LVU3224 + 916:Src/main.c **** { + 10142 .loc 1 916 17 is_stmt 0 view .LVU3225 + 10143 011a 5F4B ldr r3, .L612+32 + 10144 011c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 916:Src/main.c **** { + 10145 .loc 1 916 8 view .LVU3226 + 10146 011e 012B cmp r3, #1 + 10147 0120 00F0A584 beq .L601 + 10148 .L535: + 311:Src/main.c **** { + 10149 .loc 1 311 3 is_stmt 1 view .LVU3227 + 313:Src/main.c **** { + 10150 .loc 1 313 3 view .LVU3228 + 313:Src/main.c **** { + 10151 .loc 1 313 8 is_stmt 0 view .LVU3229 + 10152 0124 4FF48071 mov r1, #256 + 10153 0128 5C48 ldr r0, .L612+36 + 10154 012a FFF7FEFF bl HAL_GPIO_ReadPin + 10155 .LVL898: + 313:Src/main.c **** { + 10156 .loc 1 313 6 discriminator 1 view .LVU3230 + 10157 012e 0128 cmp r0, #1 + 10158 0130 ABD0 beq .L602 + 10159 .L536: + 328:Src/main.c **** { + 10160 .loc 1 328 4 is_stmt 1 view .LVU3231 + 10161 0132 5B4B ldr r3, .L612+40 + 10162 0134 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 10163 0136 0A2B cmp r3, #10 + 10164 0138 DBD8 bhi .L540 + 10165 013a 01A2 adr r2, .L542 + 10166 013c 52F823F0 ldr pc, [r2, r3, lsl #2] + 10167 .p2align 2 + ARM GAS /tmp/ccwR4KB7.s page 578 + + + 10168 .L542: + 10169 0140 E3000000 .word .L552+1 + 10170 0144 6D010000 .word .L551+1 + 10171 0148 D7010000 .word .L550+1 + 10172 014c 0D020000 .word .L549+1 + 10173 0150 3D020000 .word .L548+1 + 10174 0154 4D020000 .word .L547+1 + 10175 0158 69020000 .word .L546+1 + 10176 015c CD020000 .word .L545+1 + 10177 0160 F9040000 .word .L544+1 + 10178 0164 8D050000 .word .L543+1 + 10179 0168 21040000 .word .L541+1 + 10180 .p2align 1 + 10181 .L551: + 336:Src/main.c **** if (CheckChecksum(COMMAND)) + 10182 .loc 1 336 6 view .LVU3232 + 336:Src/main.c **** if (CheckChecksum(COMMAND)) + 10183 .loc 1 336 18 is_stmt 0 view .LVU3233 + 10184 016c 4D4C ldr r4, .L612+44 + 10185 016e 0D21 movs r1, #13 + 10186 0170 2046 mov r0, r4 + 10187 0172 FFF7FEFF bl CalculateChecksum + 10188 .LVL899: + 336:Src/main.c **** if (CheckChecksum(COMMAND)) + 10189 .loc 1 336 16 discriminator 1 view .LVU3234 + 10190 0176 4C4B ldr r3, .L612+48 + 10191 0178 1880 strh r0, [r3] @ movhi + 337:Src/main.c **** { + 10192 .loc 1 337 6 is_stmt 1 view .LVU3235 + 337:Src/main.c **** { + 10193 .loc 1 337 10 is_stmt 0 view .LVU3236 + 10194 017a 2046 mov r0, r4 + 10195 017c FFF7FEFF bl CheckChecksum + 10196 .LVL900: + 337:Src/main.c **** { + 10197 .loc 1 337 9 discriminator 1 view .LVU3237 + 10198 0180 70B9 cbnz r0, .L603 + 350:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10199 .loc 1 350 7 is_stmt 1 view .LVU3238 + 350:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10200 .loc 1 350 17 is_stmt 0 view .LVU3239 + 10201 0182 444A ldr r2, .L612+28 + 10202 0184 1378 ldrb r3, [r2] @ zero_extendqisi2 + 350:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10203 .loc 1 350 21 view .LVU3240 + 10204 0186 43F00403 orr r3, r3, #4 + 10205 018a 1370 strb r3, [r2] + 351:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10206 .loc 1 351 7 is_stmt 1 view .LVU3241 + 351:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10207 .loc 1 351 17 is_stmt 0 view .LVU3242 + 10208 018c 444B ldr r3, .L612+40 + 10209 018e 0222 movs r2, #2 + 10210 0190 1A70 strb r2, [r3] + 352:Src/main.c **** } + 10211 .loc 1 352 7 is_stmt 1 view .LVU3243 + 352:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 579 + + + 10212 .loc 1 352 21 is_stmt 0 view .LVU3244 + 10213 0192 3D4B ldr r3, .L612+16 + 10214 0194 0022 movs r2, #0 + 10215 0196 1A70 strb r2, [r3] + 10216 .L554: 354:Src/main.c **** break; - 9580 .loc 1 354 6 is_stmt 1 view .LVU3067 + 10217 .loc 1 354 6 is_stmt 1 view .LVU3245 354:Src/main.c **** break; - 9581 .loc 1 354 16 is_stmt 0 view .LVU3068 - 9582 025e 0A4B ldr r3, .L531+16 - 9583 0260 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 9584 0262 0F4B ldr r3, .L531+40 - 9585 0264 1A70 strb r2, [r3] - 355:Src/main.c **** case STATE://6 - Transmith state message - 9586 .loc 1 355 5 is_stmt 1 view .LVU3069 - 9587 0266 44E7 b .L461 - 9588 .L467: - 357:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 9589 .loc 1 357 6 view .LVU3070 - 357:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 9590 .loc 1 357 32 is_stmt 0 view .LVU3071 - 9591 0268 094B ldr r3, .L531+24 - 9592 026a 0122 movs r2, #1 - 9593 026c 1A70 strb r2, [r3] - 358:Src/main.c **** break; - 9594 .loc 1 358 6 is_stmt 1 view .LVU3072 - 358:Src/main.c **** break; - 9595 .loc 1 358 16 is_stmt 0 view .LVU3073 - 9596 026e 064B ldr r3, .L531+16 - 9597 0270 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 9598 0272 0B4B ldr r3, .L531+40 - 9599 0274 1A70 strb r2, [r3] - 359:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 9600 .loc 1 359 5 is_stmt 1 view .LVU3074 - 9601 0276 3CE7 b .L461 - 9602 .L532: - 9603 .align 2 - 9604 .L531: - 9605 0278 00080040 .word 1073743872 - 9606 027c 00000000 .word u_rx_flg - 9607 0280 00100140 .word 1073811456 - 9608 0284 00E100E0 .word -536813312 - 9609 0288 00000000 .word CPU_state_old - 9610 028c 00000000 .word task - 9611 0290 00000000 .word UART_transmission_request - 9612 0294 00000000 .word State_Data - 9613 0298 00000000 .word flg_tmt - 9614 029c 00000240 .word 1073872896 - 9615 02a0 00000000 .word CPU_state - 9616 02a4 00000000 .word COMMAND - 9617 02a8 00000000 .word CS_result - 9618 02ac 00380040 .word 1073756160 - 9619 02b0 00000000 .word Curr_setup - 9620 02b4 00000000 .word LD2_curr_setup - 9621 02b8 00000000 .word LD1_curr_setup - 9622 02bc 00000000 .word TO6 - 9623 02c0 00000000 .word TO6_before - 9624 02c4 00000000 .word Long_Data - 9625 02c8 00000000 .word temp16 - 9626 .L466: - 361:Src/main.c **** Stop_TIM10(); - 9627 .loc 1 361 6 view .LVU3075 - ARM GAS /tmp/ccYgfTud.s page 561 + 10218 .loc 1 354 32 is_stmt 0 view .LVU3246 + 10219 0198 3D4B ldr r3, .L612+24 + 10220 019a 0122 movs r2, #1 + 10221 019c 1A70 strb r2, [r3] + 355:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 10222 .loc 1 355 5 is_stmt 1 view .LVU3247 + 10223 019e A8E7 b .L540 + 10224 .L603: + 339:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 10225 .loc 1 339 7 view .LVU3248 + 10226 .LVL901: + 10227 .LBB658: + 10228 .LBI658: + 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 10229 .loc 4 358 22 view .LVU3249 + 10230 .LBB659: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10231 .loc 4 360 3 view .LVU3250 + 10232 01a0 424A ldr r2, .L612+52 + 10233 01a2 1368 ldr r3, [r2] + 10234 01a4 43F04003 orr r3, r3, #64 + 10235 01a8 1360 str r3, [r2] + 10236 .LVL902: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10237 .loc 4 360 3 is_stmt 0 view .LVU3251 + 10238 .LBE659: + 10239 .LBE658: + 340:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 10240 .loc 1 340 7 is_stmt 1 view .LVU3252 + 10241 .LBB660: + 10242 .LBI660: + 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 10243 .loc 4 358 22 view .LVU3253 + 10244 .LBB661: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10245 .loc 4 360 3 view .LVU3254 + 10246 01aa 02F58E32 add r2, r2, #72704 + 10247 01ae 1368 ldr r3, [r2] + 10248 01b0 43F04003 orr r3, r3, #64 + 10249 01b4 1360 str r3, [r2] + 10250 .LVL903: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10251 .loc 4 360 3 is_stmt 0 view .LVU3255 + 10252 .LBE661: + 10253 .LBE660: + 341:Src/main.c **** TO6_before = TO6; + 10254 .loc 1 341 7 is_stmt 1 view .LVU3256 + 10255 01b6 3E4B ldr r3, .L612+56 + 10256 01b8 3E4A ldr r2, .L612+60 + ARM GAS /tmp/ccwR4KB7.s page 580 - 361:Src/main.c **** Stop_TIM10(); - 9628 .loc 1 361 31 is_stmt 0 view .LVU3076 - 9629 02cc 9F4B ldr r3, .L533 - 9630 02ce 5A68 ldr r2, [r3, #4] @ float - 361:Src/main.c **** Stop_TIM10(); - 9631 .loc 1 361 25 view .LVU3077 - 9632 02d0 1A61 str r2, [r3, #16] @ float - 362:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 9633 .loc 1 362 6 is_stmt 1 view .LVU3078 - 9634 02d2 FFF7FEFF bl Stop_TIM10 - 9635 .LVL793: - 363:Src/main.c **** { - 9636 .loc 1 363 6 view .LVU3079 - 363:Src/main.c **** { - 9637 .loc 1 363 13 is_stmt 0 view .LVU3080 - 9638 02d6 9E4B ldr r3, .L533+4 - 9639 02d8 1B68 ldr r3, [r3] - 9640 02da 9E4A ldr r2, .L533+8 - 9641 02dc 1268 ldr r2, [r2] - 363:Src/main.c **** { - 9642 .loc 1 363 9 view .LVU3081 - 9643 02de 9342 cmp r3, r2 - 9644 02e0 7FF607AF bls .L461 - 365:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9645 .loc 1 365 7 is_stmt 1 view .LVU3082 - 365:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9646 .loc 1 365 18 is_stmt 0 view .LVU3083 - 9647 02e4 9B4A ldr r2, .L533+8 - 9648 02e6 1360 str r3, [r2] - 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9649 .loc 1 366 7 is_stmt 1 view .LVU3084 - 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9650 .loc 1 366 25 is_stmt 0 view .LVU3085 - 9651 02e8 0120 movs r0, #1 - 9652 02ea FFF7FEFF bl MPhD_T - 9653 .LVL794: - 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9654 .loc 1 366 23 discriminator 1 view .LVU3086 - 9655 02ee 9A4F ldr r7, .L533+12 - 9656 02f0 3881 strh r0, [r7, #8] @ movhi - 367:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9657 .loc 1 367 7 is_stmt 1 view .LVU3087 - 367:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9658 .loc 1 367 25 is_stmt 0 view .LVU3088 - 9659 02f2 0120 movs r0, #1 - 9660 02f4 FFF7FEFF bl MPhD_T - 9661 .LVL795: - 367:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9662 .loc 1 367 23 discriminator 1 view .LVU3089 - 9663 02f8 3881 strh r0, [r7, #8] @ movhi - 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9664 .loc 1 368 7 is_stmt 1 view .LVU3090 - 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9665 .loc 1 368 25 is_stmt 0 view .LVU3091 - 9666 02fa 0220 movs r0, #2 - 9667 02fc FFF7FEFF bl MPhD_T - 9668 .LVL796: - ARM GAS /tmp/ccYgfTud.s page 562 + 10257 01ba 3F49 ldr r1, .L612+64 + 10258 01bc 2046 mov r0, r4 + 10259 01be FFF7FEFF bl Decode_uart + 10260 .LVL904: + 342:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 10261 .loc 1 342 7 view .LVU3257 + 342:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 10262 .loc 1 342 18 is_stmt 0 view .LVU3258 + 10263 01c2 3E4B ldr r3, .L612+68 + 10264 01c4 1A68 ldr r2, [r3] + 10265 01c6 3E4B ldr r3, .L612+72 + 10266 01c8 1A60 str r2, [r3] + 345:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 10267 .loc 1 345 7 is_stmt 1 view .LVU3259 + 345:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 10268 .loc 1 345 17 is_stmt 0 view .LVU3260 + 10269 01ca 0723 movs r3, #7 + 10270 01cc 344A ldr r2, .L612+40 + 10271 01ce 1370 strb r3, [r2] + 346:Src/main.c **** } + 10272 .loc 1 346 7 is_stmt 1 view .LVU3261 + 346:Src/main.c **** } + 10273 .loc 1 346 21 is_stmt 0 view .LVU3262 + 10274 01d0 2D4A ldr r2, .L612+16 + 10275 01d2 1370 strb r3, [r2] + 10276 01d4 E0E7 b .L554 + 10277 .L550: + 358:Src/main.c **** Stop_TIM10(); + 10278 .loc 1 358 6 is_stmt 1 view .LVU3263 + 358:Src/main.c **** Stop_TIM10(); + 10279 .loc 1 358 31 is_stmt 0 view .LVU3264 + 10280 01d6 2D4B ldr r3, .L612+20 + 10281 01d8 5A68 ldr r2, [r3, #4] @ float + 358:Src/main.c **** Stop_TIM10(); + 10282 .loc 1 358 25 view .LVU3265 + 10283 01da 1A61 str r2, [r3, #16] @ float + 359:Src/main.c **** Init_params(); + 10284 .loc 1 359 6 is_stmt 1 view .LVU3266 + 10285 01dc FFF7FEFF bl Stop_TIM10 + 10286 .LVL905: + 360:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 10287 .loc 1 360 6 view .LVU3267 + 10288 01e0 FFF7FEFF bl Init_params + 10289 .LVL906: + 361:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 10290 .loc 1 361 6 view .LVU3268 + 10291 .LBB662: + 10292 .LBI662: + 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 10293 .loc 4 370 22 view .LVU3269 + 10294 .LBB663: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10295 .loc 4 372 3 view .LVU3270 + 10296 01e4 314A ldr r2, .L612+52 + 10297 01e6 1368 ldr r3, [r2] + 10298 01e8 23F04003 bic r3, r3, #64 + 10299 01ec 1360 str r3, [r2] + ARM GAS /tmp/ccwR4KB7.s page 581 - 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9669 .loc 1 368 23 discriminator 1 view .LVU3092 - 9670 0300 964E ldr r6, .L533+16 - 9671 0302 3081 strh r0, [r6, #8] @ movhi - 369:Src/main.c **** - 9672 .loc 1 369 7 is_stmt 1 view .LVU3093 - 369:Src/main.c **** - 9673 .loc 1 369 25 is_stmt 0 view .LVU3094 - 9674 0304 0220 movs r0, #2 - 9675 0306 FFF7FEFF bl MPhD_T - 9676 .LVL797: - 369:Src/main.c **** - 9677 .loc 1 369 23 discriminator 1 view .LVU3095 - 9678 030a 3081 strh r0, [r6, #8] @ movhi - 372:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 9679 .loc 1 372 7 is_stmt 1 view .LVU3096 - 372:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 9680 .loc 1 372 14 is_stmt 0 view .LVU3097 - 9681 030c 0320 movs r0, #3 - 9682 030e FFF7FEFF bl MPhD_T - 9683 .LVL798: - 373:Src/main.c **** (void) MPhD_T(4); - 9684 .loc 1 373 7 is_stmt 1 view .LVU3098 - 373:Src/main.c **** (void) MPhD_T(4); - 9685 .loc 1 373 32 is_stmt 0 view .LVU3099 - 9686 0312 0320 movs r0, #3 - 9687 0314 FFF7FEFF bl MPhD_T - 9688 .LVL799: - 373:Src/main.c **** (void) MPhD_T(4); - 9689 .loc 1 373 30 discriminator 1 view .LVU3100 - 9690 0318 3880 strh r0, [r7] @ movhi - 374:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 9691 .loc 1 374 7 is_stmt 1 view .LVU3101 - 374:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 9692 .loc 1 374 14 is_stmt 0 view .LVU3102 - 9693 031a 0420 movs r0, #4 - 9694 031c FFF7FEFF bl MPhD_T - 9695 .LVL800: - 375:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9696 .loc 1 375 7 is_stmt 1 view .LVU3103 - 375:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9697 .loc 1 375 32 is_stmt 0 view .LVU3104 - 9698 0320 0420 movs r0, #4 - 9699 0322 FFF7FEFF bl MPhD_T - 9700 .LVL801: - 375:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9701 .loc 1 375 30 discriminator 1 view .LVU3105 - 9702 0326 3080 strh r0, [r6] @ movhi - 376:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 9703 .loc 1 376 7 is_stmt 1 view .LVU3106 - 376:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 9704 .loc 1 376 14 is_stmt 0 view .LVU3107 - 9705 0328 DFF86482 ldr r8, .L533+68 - 9706 032c 0122 movs r2, #1 - 9707 032e 3946 mov r1, r7 - 9708 0330 4046 mov r0, r8 - 9709 0332 FFF7FEFF bl PID_Controller_Temp - ARM GAS /tmp/ccYgfTud.s page 563 + 10300 .LVL907: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10301 .loc 4 372 3 is_stmt 0 view .LVU3271 + 10302 .LBE663: + 10303 .LBE662: + 362:Src/main.c **** CPU_state = HALT; + 10304 .loc 1 362 6 is_stmt 1 view .LVU3272 + 10305 .LBB664: + 10306 .LBI664: + 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 10307 .loc 4 370 22 view .LVU3273 + 10308 .LBB665: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10309 .loc 4 372 3 view .LVU3274 + 10310 01ee 02F58E32 add r2, r2, #72704 + 10311 01f2 1368 ldr r3, [r2] + 10312 01f4 23F04003 bic r3, r3, #64 + 10313 01f8 1360 str r3, [r2] + 10314 .LVL908: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 10315 .loc 4 372 3 is_stmt 0 view .LVU3275 + 10316 .LBE665: + 10317 .LBE664: + 363:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10318 .loc 1 363 6 is_stmt 1 view .LVU3276 + 363:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10319 .loc 1 363 16 is_stmt 0 view .LVU3277 + 10320 01fa 0023 movs r3, #0 + 10321 01fc 284A ldr r2, .L612+40 + 10322 01fe 1370 strb r3, [r2] + 364:Src/main.c **** UART_transmission_request = MESS_01; + 10323 .loc 1 364 6 is_stmt 1 view .LVU3278 + 364:Src/main.c **** UART_transmission_request = MESS_01; + 10324 .loc 1 364 20 is_stmt 0 view .LVU3279 + 10325 0200 214A ldr r2, .L612+16 + 10326 0202 1370 strb r3, [r2] + 365:Src/main.c **** break; + 10327 .loc 1 365 6 is_stmt 1 view .LVU3280 + 365:Src/main.c **** break; + 10328 .loc 1 365 32 is_stmt 0 view .LVU3281 + 10329 0204 224B ldr r3, .L612+24 + 10330 0206 0122 movs r2, #1 + 10331 0208 1A70 strb r2, [r3] + 366:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 10332 .loc 1 366 5 is_stmt 1 view .LVU3282 + 10333 020a 72E7 b .L540 + 10334 .L549: + 368:Src/main.c **** State_Data[0]|=temp16&0xff; + 10335 .loc 1 368 6 view .LVU3283 + 368:Src/main.c **** State_Data[0]|=temp16&0xff; + 10336 .loc 1 368 15 is_stmt 0 view .LVU3284 + 10337 020c 2D48 ldr r0, .L612+76 + 10338 020e FFF7FEFF bl SD_READ + 10339 .LVL909: + 368:Src/main.c **** State_Data[0]|=temp16&0xff; + 10340 .loc 1 368 13 discriminator 1 view .LVU3285 + 10341 0212 82B2 uxth r2, r0 + ARM GAS /tmp/ccwR4KB7.s page 582 - 9710 .LVL802: - 9711 0336 0146 mov r1, r0 - 376:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 9712 .loc 1 376 13 discriminator 1 view .LVU3108 - 9713 0338 894D ldr r5, .L533+20 - 9714 033a 2880 strh r0, [r5] @ movhi - 377:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 9715 .loc 1 377 7 is_stmt 1 view .LVU3109 - 9716 033c 0320 movs r0, #3 - 9717 033e FFF7FEFF bl Set_LTEC - 9718 .LVL803: - 378:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 9719 .loc 1 378 7 view .LVU3110 - 378:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 9720 .loc 1 378 14 is_stmt 0 view .LVU3111 - 9721 0342 DFF84892 ldr r9, .L533+64 - 9722 0346 0222 movs r2, #2 - 9723 0348 3146 mov r1, r6 - 9724 034a 4846 mov r0, r9 - 9725 034c FFF7FEFF bl PID_Controller_Temp - 9726 .LVL804: - 9727 0350 0146 mov r1, r0 - 378:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 9728 .loc 1 378 13 discriminator 1 view .LVU3112 - 9729 0352 2880 strh r0, [r5] @ movhi - 379:Src/main.c **** - 9730 .loc 1 379 7 is_stmt 1 view .LVU3113 - 9731 0354 0420 movs r0, #4 - 9732 0356 FFF7FEFF bl Set_LTEC - 9733 .LVL805: - 381:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9734 .loc 1 381 7 view .LVU3114 - 381:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9735 .loc 1 381 31 is_stmt 0 view .LVU3115 - 9736 035a 3B89 ldrh r3, [r7, #8] - 381:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9737 .loc 1 381 20 view .LVU3116 - 9738 035c 814C ldr r4, .L533+24 - 9739 035e 6380 strh r3, [r4, #2] @ movhi - 382:Src/main.c **** - 9740 .loc 1 382 7 is_stmt 1 view .LVU3117 - 382:Src/main.c **** - 9741 .loc 1 382 31 is_stmt 0 view .LVU3118 - 9742 0360 3389 ldrh r3, [r6, #8] - 382:Src/main.c **** - 9743 .loc 1 382 20 view .LVU3119 - 9744 0362 A380 strh r3, [r4, #4] @ movhi - 384:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 9745 .loc 1 384 7 is_stmt 1 view .LVU3120 - 9746 0364 B8F80C10 ldrh r1, [r8, #12] - 9747 0368 0120 movs r0, #1 - 9748 036a FFF7FEFF bl Set_LTEC - 9749 .LVL806: - 385:Src/main.c **** - 9750 .loc 1 385 7 view .LVU3121 - 9751 036e B9F80C10 ldrh r1, [r9, #12] - 9752 0372 0220 movs r0, #2 - ARM GAS /tmp/ccYgfTud.s page 564 + 10342 0214 2C4B ldr r3, .L612+80 + 10343 0216 1A80 strh r2, [r3] @ movhi + 369:Src/main.c **** if (temp16==0) + 10344 .loc 1 369 6 is_stmt 1 view .LVU3286 + 369:Src/main.c **** if (temp16==0) + 10345 .loc 1 369 16 is_stmt 0 view .LVU3287 + 10346 0218 1E49 ldr r1, .L612+28 + 10347 021a 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 369:Src/main.c **** if (temp16==0) + 10348 .loc 1 369 19 view .LVU3288 + 10349 021c 0343 orrs r3, r3, r0 + 10350 021e 0B70 strb r3, [r1] + 370:Src/main.c **** { + 10351 .loc 1 370 6 is_stmt 1 view .LVU3289 + 370:Src/main.c **** { + 10352 .loc 1 370 9 is_stmt 0 view .LVU3290 + 10353 0220 42B9 cbnz r2, .L555 + 372:Src/main.c **** } + 10354 .loc 1 372 7 is_stmt 1 view .LVU3291 + 372:Src/main.c **** } + 10355 .loc 1 372 33 is_stmt 0 view .LVU3292 + 10356 0222 1B4B ldr r3, .L612+24 + 10357 0224 0322 movs r2, #3 + 10358 0226 1A70 strb r2, [r3] + 10359 .L556: + 378:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 10360 .loc 1 378 6 is_stmt 1 view .LVU3293 + 378:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 10361 .loc 1 378 20 is_stmt 0 view .LVU3294 + 10362 0228 0023 movs r3, #0 + 10363 022a 174A ldr r2, .L612+16 + 10364 022c 1370 strb r3, [r2] + 379:Src/main.c **** break; + 10365 .loc 1 379 6 is_stmt 1 view .LVU3295 + 379:Src/main.c **** break; + 10366 .loc 1 379 16 is_stmt 0 view .LVU3296 + 10367 022e 1C4A ldr r2, .L612+40 + 10368 0230 1370 strb r3, [r2] + 380:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 10369 .loc 1 380 5 is_stmt 1 view .LVU3297 + 10370 0232 5EE7 b .L540 + 10371 .L555: + 376:Src/main.c **** } + 10372 .loc 1 376 7 view .LVU3298 + 376:Src/main.c **** } + 10373 .loc 1 376 33 is_stmt 0 view .LVU3299 + 10374 0234 164B ldr r3, .L612+24 + 10375 0236 0122 movs r2, #1 + 10376 0238 1A70 strb r2, [r3] + 10377 023a F5E7 b .L556 + 10378 .L548: + 382:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 10379 .loc 1 382 6 is_stmt 1 view .LVU3300 + 382:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 10380 .loc 1 382 32 is_stmt 0 view .LVU3301 + 10381 023c 144B ldr r3, .L612+24 + 10382 023e 0222 movs r2, #2 + ARM GAS /tmp/ccwR4KB7.s page 583 - 9753 0374 FFF7FEFF bl Set_LTEC - 9754 .LVL807: - 389:Src/main.c **** temp16 = Get_ADC(1); - 9755 .loc 1 389 7 view .LVU3122 - 389:Src/main.c **** temp16 = Get_ADC(1); - 9756 .loc 1 389 16 is_stmt 0 view .LVU3123 - 9757 0378 0020 movs r0, #0 - 9758 037a FFF7FEFF bl Get_ADC - 9759 .LVL808: - 389:Src/main.c **** temp16 = Get_ADC(1); - 9760 .loc 1 389 14 discriminator 1 view .LVU3124 - 9761 037e 2880 strh r0, [r5] @ movhi - 390:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 9762 .loc 1 390 7 is_stmt 1 view .LVU3125 - 390:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 9763 .loc 1 390 16 is_stmt 0 view .LVU3126 - 9764 0380 0120 movs r0, #1 - 9765 0382 FFF7FEFF bl Get_ADC - 9766 .LVL809: - 390:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 9767 .loc 1 390 14 discriminator 1 view .LVU3127 - 9768 0386 2880 strh r0, [r5] @ movhi - 391:Src/main.c **** - 9769 .loc 1 391 7 is_stmt 1 view .LVU3128 - 391:Src/main.c **** - 9770 .loc 1 391 20 is_stmt 0 view .LVU3129 - 9771 0388 E081 strh r0, [r4, #14] @ movhi - 394:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 9772 .loc 1 394 7 is_stmt 1 view .LVU3130 - 394:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 9773 .loc 1 394 16 is_stmt 0 view .LVU3131 - 9774 038a 0120 movs r0, #1 - 9775 038c FFF7FEFF bl Get_ADC - 9776 .LVL810: - 394:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 9777 .loc 1 394 14 discriminator 1 view .LVU3132 - 9778 0390 2880 strh r0, [r5] @ movhi - 395:Src/main.c **** - 9779 .loc 1 395 7 is_stmt 1 view .LVU3133 - 395:Src/main.c **** - 9780 .loc 1 395 20 is_stmt 0 view .LVU3134 - 9781 0392 2082 strh r0, [r4, #16] @ movhi - 398:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 9782 .loc 1 398 7 is_stmt 1 view .LVU3135 - 398:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 9783 .loc 1 398 16 is_stmt 0 view .LVU3136 - 9784 0394 0120 movs r0, #1 - 9785 0396 FFF7FEFF bl Get_ADC - 9786 .LVL811: - 398:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 9787 .loc 1 398 14 discriminator 1 view .LVU3137 - 9788 039a 2880 strh r0, [r5] @ movhi - 399:Src/main.c **** - 9789 .loc 1 399 7 is_stmt 1 view .LVU3138 - 399:Src/main.c **** - 9790 .loc 1 399 20 is_stmt 0 view .LVU3139 - 9791 039c 6082 strh r0, [r4, #18] @ movhi - ARM GAS /tmp/ccYgfTud.s page 565 + 10383 0240 1A70 strb r2, [r3] + 383:Src/main.c **** break; + 10384 .loc 1 383 6 is_stmt 1 view .LVU3302 + 383:Src/main.c **** break; + 10385 .loc 1 383 16 is_stmt 0 view .LVU3303 + 10386 0242 114B ldr r3, .L612+16 + 10387 0244 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 10388 0246 164B ldr r3, .L612+40 + 10389 0248 1A70 strb r2, [r3] + 384:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 10390 .loc 1 384 5 is_stmt 1 view .LVU3304 + 10391 024a 52E7 b .L540 + 10392 .L547: + 386:Src/main.c **** UART_transmission_request = MESS_01; + 10393 .loc 1 386 6 view .LVU3305 + 386:Src/main.c **** UART_transmission_request = MESS_01; + 10394 .loc 1 386 21 is_stmt 0 view .LVU3306 + 10395 024c FFF7FEFF bl SD_REMOVE + 10396 .LVL910: + 386:Src/main.c **** UART_transmission_request = MESS_01; + 10397 .loc 1 386 16 discriminator 1 view .LVU3307 + 10398 0250 104A ldr r2, .L612+28 + 10399 0252 1378 ldrb r3, [r2] @ zero_extendqisi2 + 386:Src/main.c **** UART_transmission_request = MESS_01; + 10400 .loc 1 386 19 discriminator 1 view .LVU3308 + 10401 0254 0343 orrs r3, r3, r0 + 10402 0256 1370 strb r3, [r2] + 387:Src/main.c **** CPU_state = CPU_state_old; + 10403 .loc 1 387 6 is_stmt 1 view .LVU3309 + 387:Src/main.c **** CPU_state = CPU_state_old; + 10404 .loc 1 387 32 is_stmt 0 view .LVU3310 + 10405 0258 0D4B ldr r3, .L612+24 + 10406 025a 0122 movs r2, #1 + 10407 025c 1A70 strb r2, [r3] + 388:Src/main.c **** break; + 10408 .loc 1 388 6 is_stmt 1 view .LVU3311 + 388:Src/main.c **** break; + 10409 .loc 1 388 16 is_stmt 0 view .LVU3312 + 10410 025e 0A4B ldr r3, .L612+16 + 10411 0260 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 10412 0262 0F4B ldr r3, .L612+40 + 10413 0264 1A70 strb r2, [r3] + 389:Src/main.c **** case STATE://6 - Transmith state message + 10414 .loc 1 389 5 is_stmt 1 view .LVU3313 + 10415 0266 44E7 b .L540 + 10416 .L546: + 391:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 10417 .loc 1 391 6 view .LVU3314 + 391:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 10418 .loc 1 391 32 is_stmt 0 view .LVU3315 + 10419 0268 094B ldr r3, .L612+24 + 10420 026a 0122 movs r2, #1 + 10421 026c 1A70 strb r2, [r3] + 392:Src/main.c **** break; + 10422 .loc 1 392 6 is_stmt 1 view .LVU3316 + 392:Src/main.c **** break; + 10423 .loc 1 392 16 is_stmt 0 view .LVU3317 + ARM GAS /tmp/ccwR4KB7.s page 584 - 402:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 9792 .loc 1 402 7 is_stmt 1 view .LVU3140 - 402:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 9793 .loc 1 402 16 is_stmt 0 view .LVU3141 - 9794 039e 0120 movs r0, #1 - 9795 03a0 FFF7FEFF bl Get_ADC - 9796 .LVL812: - 402:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 9797 .loc 1 402 14 discriminator 1 view .LVU3142 - 9798 03a4 2880 strh r0, [r5] @ movhi + 10424 026e 064B ldr r3, .L612+16 + 10425 0270 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 10426 0272 0B4B ldr r3, .L612+40 + 10427 0274 1A70 strb r2, [r3] + 393:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 10428 .loc 1 393 5 is_stmt 1 view .LVU3318 + 10429 0276 3CE7 b .L540 + 10430 .L613: + 10431 .align 2 + 10432 .L612: + 10433 0278 00080040 .word 1073743872 + 10434 027c 00000000 .word u_rx_flg + 10435 0280 00100140 .word 1073811456 + 10436 0284 00E100E0 .word -536813312 + 10437 0288 00000000 .word CPU_state_old + 10438 028c 00000000 .word task + 10439 0290 00000000 .word UART_transmission_request + 10440 0294 00000000 .word State_Data + 10441 0298 00000000 .word flg_tmt + 10442 029c 00000240 .word 1073872896 + 10443 02a0 00000000 .word CPU_state + 10444 02a4 00000000 .word COMMAND + 10445 02a8 00000000 .word CS_result + 10446 02ac 00380040 .word 1073756160 + 10447 02b0 00000000 .word Curr_setup + 10448 02b4 00000000 .word LD2_curr_setup + 10449 02b8 00000000 .word LD1_curr_setup + 10450 02bc 00000000 .word TO6 + 10451 02c0 00000000 .word TO6_before + 10452 02c4 00000000 .word Long_Data + 10453 02c8 00000000 .word temp16 + 10454 .L545: + 395:Src/main.c **** Stop_TIM10(); + 10455 .loc 1 395 6 view .LVU3319 + 395:Src/main.c **** Stop_TIM10(); + 10456 .loc 1 395 31 is_stmt 0 view .LVU3320 + 10457 02cc 9C4B ldr r3, .L614 + 10458 02ce 5A68 ldr r2, [r3, #4] @ float + 395:Src/main.c **** Stop_TIM10(); + 10459 .loc 1 395 25 view .LVU3321 + 10460 02d0 1A61 str r2, [r3, #16] @ float + 396:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 10461 .loc 1 396 6 is_stmt 1 view .LVU3322 + 10462 02d2 FFF7FEFF bl Stop_TIM10 + 10463 .LVL911: + 397:Src/main.c **** { + 10464 .loc 1 397 6 view .LVU3323 + 397:Src/main.c **** { + 10465 .loc 1 397 13 is_stmt 0 view .LVU3324 + 10466 02d6 9B4B ldr r3, .L614+4 + 10467 02d8 1B68 ldr r3, [r3] + 10468 02da 9B4A ldr r2, .L614+8 + 10469 02dc 1268 ldr r2, [r2] + 397:Src/main.c **** { + 10470 .loc 1 397 9 view .LVU3325 + 10471 02de 9342 cmp r3, r2 + 10472 02e0 7FF607AF bls .L540 + ARM GAS /tmp/ccwR4KB7.s page 585 + + + 399:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10473 .loc 1 399 7 is_stmt 1 view .LVU3326 + 399:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10474 .loc 1 399 18 is_stmt 0 view .LVU3327 + 10475 02e4 984A ldr r2, .L614+8 + 10476 02e6 1360 str r3, [r2] + 400:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10477 .loc 1 400 7 is_stmt 1 view .LVU3328 + 400:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10478 .loc 1 400 25 is_stmt 0 view .LVU3329 + 10479 02e8 0120 movs r0, #1 + 10480 02ea FFF7FEFF bl MPhD_T + 10481 .LVL912: + 400:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10482 .loc 1 400 23 discriminator 1 view .LVU3330 + 10483 02ee 974F ldr r7, .L614+12 + 10484 02f0 3881 strh r0, [r7, #8] @ movhi + 401:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10485 .loc 1 401 7 is_stmt 1 view .LVU3331 + 401:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10486 .loc 1 401 25 is_stmt 0 view .LVU3332 + 10487 02f2 0120 movs r0, #1 + 10488 02f4 FFF7FEFF bl MPhD_T + 10489 .LVL913: + 401:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10490 .loc 1 401 23 discriminator 1 view .LVU3333 + 10491 02f8 3881 strh r0, [r7, #8] @ movhi + 402:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10492 .loc 1 402 7 is_stmt 1 view .LVU3334 + 402:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10493 .loc 1 402 25 is_stmt 0 view .LVU3335 + 10494 02fa 0220 movs r0, #2 + 10495 02fc FFF7FEFF bl MPhD_T + 10496 .LVL914: + 402:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10497 .loc 1 402 23 discriminator 1 view .LVU3336 + 10498 0300 934E ldr r6, .L614+16 + 10499 0302 3081 strh r0, [r6, #8] @ movhi 403:Src/main.c **** - 9799 .loc 1 403 7 is_stmt 1 view .LVU3143 + 10500 .loc 1 403 7 is_stmt 1 view .LVU3337 403:Src/main.c **** - 9800 .loc 1 403 21 is_stmt 0 view .LVU3144 - 9801 03a6 A082 strh r0, [r4, #20] @ movhi - 406:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 9802 .loc 1 406 7 is_stmt 1 view .LVU3145 - 406:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 9803 .loc 1 406 16 is_stmt 0 view .LVU3146 - 9804 03a8 0120 movs r0, #1 - 9805 03aa FFF7FEFF bl Get_ADC - 9806 .LVL813: - 406:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 9807 .loc 1 406 14 discriminator 1 view .LVU3147 - 9808 03ae 2880 strh r0, [r5] @ movhi - 407:Src/main.c **** temp16 = Get_ADC(2); - 9809 .loc 1 407 7 is_stmt 1 view .LVU3148 - 407:Src/main.c **** temp16 = Get_ADC(2); - 9810 .loc 1 407 21 is_stmt 0 view .LVU3149 - 9811 03b0 E082 strh r0, [r4, #22] @ movhi - 408:Src/main.c **** - 9812 .loc 1 408 7 is_stmt 1 view .LVU3150 - 408:Src/main.c **** - 9813 .loc 1 408 16 is_stmt 0 view .LVU3151 - 9814 03b2 0220 movs r0, #2 - 9815 03b4 FFF7FEFF bl Get_ADC - 9816 .LVL814: - 408:Src/main.c **** - 9817 .loc 1 408 14 discriminator 1 view .LVU3152 - 9818 03b8 2880 strh r0, [r5] @ movhi - 411:Src/main.c **** temp16 = Get_ADC(4); - 9819 .loc 1 411 7 is_stmt 1 view .LVU3153 - 411:Src/main.c **** temp16 = Get_ADC(4); - 9820 .loc 1 411 16 is_stmt 0 view .LVU3154 - 9821 03ba 0320 movs r0, #3 - 9822 03bc FFF7FEFF bl Get_ADC - 9823 .LVL815: - 411:Src/main.c **** temp16 = Get_ADC(4); - 9824 .loc 1 411 14 discriminator 1 view .LVU3155 - 9825 03c0 2880 strh r0, [r5] @ movhi - 412:Src/main.c **** Long_Data[12] = temp16; - 9826 .loc 1 412 7 is_stmt 1 view .LVU3156 - 412:Src/main.c **** Long_Data[12] = temp16; - 9827 .loc 1 412 16 is_stmt 0 view .LVU3157 - 9828 03c2 0420 movs r0, #4 - 9829 03c4 FFF7FEFF bl Get_ADC - 9830 .LVL816: - ARM GAS /tmp/ccYgfTud.s page 566 - - - 412:Src/main.c **** Long_Data[12] = temp16; - 9831 .loc 1 412 14 discriminator 1 view .LVU3158 - 9832 03c8 2880 strh r0, [r5] @ movhi - 413:Src/main.c **** temp16 = Get_ADC(5); - 9833 .loc 1 413 7 is_stmt 1 view .LVU3159 - 413:Src/main.c **** temp16 = Get_ADC(5); - 9834 .loc 1 413 21 is_stmt 0 view .LVU3160 - 9835 03ca 2083 strh r0, [r4, #24] @ movhi - 414:Src/main.c **** - 9836 .loc 1 414 7 is_stmt 1 view .LVU3161 - 414:Src/main.c **** - 9837 .loc 1 414 16 is_stmt 0 view .LVU3162 - 9838 03cc 0520 movs r0, #5 - 9839 03ce FFF7FEFF bl Get_ADC - 9840 .LVL817: - 414:Src/main.c **** - 9841 .loc 1 414 14 discriminator 1 view .LVU3163 - 9842 03d2 2880 strh r0, [r5] @ movhi - 417:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9843 .loc 1 417 7 is_stmt 1 view .LVU3164 - 417:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9844 .loc 1 417 16 is_stmt 0 view .LVU3165 - 9845 03d4 644B ldr r3, .L533+28 - 9846 03d6 1B68 ldr r3, [r3] - 9847 03d8 644A ldr r2, .L533+32 - 9848 03da 1360 str r3, [r2] - 418:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9849 .loc 1 418 7 is_stmt 1 view .LVU3166 - 418:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9850 .loc 1 418 20 is_stmt 0 view .LVU3167 - 9851 03dc E380 strh r3, [r4, #6] @ movhi - 419:Src/main.c **** - 9852 .loc 1 419 7 is_stmt 1 view .LVU3168 - 419:Src/main.c **** - 9853 .loc 1 419 31 is_stmt 0 view .LVU3169 - 9854 03de 1B0C lsrs r3, r3, #16 - 419:Src/main.c **** - 9855 .loc 1 419 20 view .LVU3170 - 9856 03e0 2381 strh r3, [r4, #8] @ movhi - 422:Src/main.c **** - 9857 .loc 1 422 7 is_stmt 1 view .LVU3171 - 422:Src/main.c **** - 9858 .loc 1 422 31 is_stmt 0 view .LVU3172 - 9859 03e2 3B88 ldrh r3, [r7] - 422:Src/main.c **** - 9860 .loc 1 422 20 view .LVU3173 - 9861 03e4 6381 strh r3, [r4, #10] @ movhi - 425:Src/main.c **** - 9862 .loc 1 425 7 is_stmt 1 view .LVU3174 - 425:Src/main.c **** - 9863 .loc 1 425 31 is_stmt 0 view .LVU3175 - 9864 03e6 3388 ldrh r3, [r6] - 425:Src/main.c **** - 9865 .loc 1 425 20 view .LVU3176 - 9866 03e8 A381 strh r3, [r4, #12] @ movhi - 427:Src/main.c **** { - 9867 .loc 1 427 7 is_stmt 1 view .LVU3177 - ARM GAS /tmp/ccYgfTud.s page 567 - - - 427:Src/main.c **** { - 9868 .loc 1 427 21 is_stmt 0 view .LVU3178 - 9869 03ea 614B ldr r3, .L533+36 - 9870 03ec DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 - 427:Src/main.c **** { - 9871 .loc 1 427 10 view .LVU3179 - 9872 03ee 012B cmp r3, #1 - 9873 03f0 03D0 beq .L524 - 9874 .L478: - 434:Src/main.c **** } - 9875 .loc 1 434 7 is_stmt 1 view .LVU3180 - 434:Src/main.c **** } - 9876 .loc 1 434 21 is_stmt 0 view .LVU3181 - 9877 03f2 604B ldr r3, .L533+40 - 9878 03f4 0722 movs r2, #7 - 9879 03f6 1A70 strb r2, [r3] - 9880 03f8 7BE6 b .L461 - 9881 .L524: - 429:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9882 .loc 1 429 8 is_stmt 1 view .LVU3182 - 429:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9883 .loc 1 429 20 is_stmt 0 view .LVU3183 - 9884 03fa 0234 adds r4, r4, #2 - 9885 03fc 0D21 movs r1, #13 - 9886 03fe 2046 mov r0, r4 - 9887 0400 FFF7FEFF bl CalculateChecksum - 9888 .LVL818: - 9889 0404 0346 mov r3, r0 - 429:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9890 .loc 1 429 18 discriminator 1 view .LVU3184 - 9891 0406 5C4A ldr r2, .L533+44 - 9892 0408 1080 strh r0, [r2] @ movhi - 430:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 9893 .loc 1 430 8 is_stmt 1 view .LVU3185 - 430:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 9894 .loc 1 430 27 is_stmt 0 view .LVU3186 - 9895 040a A01E subs r0, r4, #2 - 9896 040c 8383 strh r3, [r0, #28] @ movhi - 431:Src/main.c **** State_Data[0]|=temp16&0xff; - 9897 .loc 1 431 8 is_stmt 1 view .LVU3187 - 431:Src/main.c **** State_Data[0]|=temp16&0xff; - 9898 .loc 1 431 17 is_stmt 0 view .LVU3188 - 9899 040e FFF7FEFF bl SD_SAVE - 9900 .LVL819: - 9901 0412 0346 mov r3, r0 - 431:Src/main.c **** State_Data[0]|=temp16&0xff; - 9902 .loc 1 431 15 discriminator 1 view .LVU3189 - 9903 0414 2880 strh r0, [r5] @ movhi - 432:Src/main.c **** } - 9904 .loc 1 432 8 is_stmt 1 view .LVU3190 - 432:Src/main.c **** } - 9905 .loc 1 432 18 is_stmt 0 view .LVU3191 - 9906 0416 5949 ldr r1, .L533+48 - 9907 0418 0A78 ldrb r2, [r1] @ zero_extendqisi2 - 432:Src/main.c **** } - 9908 .loc 1 432 21 view .LVU3192 - 9909 041a 1343 orrs r3, r3, r2 - ARM GAS /tmp/ccYgfTud.s page 568 - - - 9910 041c 0B70 strb r3, [r1] - 9911 041e E8E7 b .L478 - 9912 .L462: - 438:Src/main.c **** { - 9913 .loc 1 438 6 is_stmt 1 view .LVU3193 - 438:Src/main.c **** { - 9914 .loc 1 438 10 is_stmt 0 view .LVU3194 - 9915 0420 574C ldr r4, .L533+52 - 9916 0422 0321 movs r1, #3 - 9917 0424 2046 mov r0, r4 - 9918 0426 FFF7FEFF bl CalculateChecksum - 9919 .LVL820: - 438:Src/main.c **** { - 9920 .loc 1 438 69 discriminator 1 view .LVU3195 - 9921 042a E388 ldrh r3, [r4, #6] - 438:Src/main.c **** { - 9922 .loc 1 438 9 discriminator 1 view .LVU3196 - 9923 042c 9842 cmp r0, r3 - 9924 042e 0CD0 beq .L525 - 481:Src/main.c **** } - 9925 .loc 1 481 7 is_stmt 1 view .LVU3197 - 481:Src/main.c **** } - 9926 .loc 1 481 17 is_stmt 0 view .LVU3198 - 9927 0430 524A ldr r2, .L533+48 - 9928 0432 1378 ldrb r3, [r2] @ zero_extendqisi2 - 481:Src/main.c **** } - 9929 .loc 1 481 21 view .LVU3199 - 9930 0434 43F00403 orr r3, r3, #4 - 9931 0438 1370 strb r3, [r2] - 9932 .L483: - 483:Src/main.c **** CPU_state = CPU_state_old; - 9933 .loc 1 483 6 is_stmt 1 view .LVU3200 - 483:Src/main.c **** CPU_state = CPU_state_old; - 9934 .loc 1 483 32 is_stmt 0 view .LVU3201 - 9935 043a 524B ldr r3, .L533+56 - 9936 043c 0122 movs r2, #1 - 9937 043e 1A70 strb r2, [r3] - 484:Src/main.c **** break; - 9938 .loc 1 484 6 is_stmt 1 view .LVU3202 - 484:Src/main.c **** break; - 9939 .loc 1 484 16 is_stmt 0 view .LVU3203 - 9940 0440 4C4B ldr r3, .L533+40 - 9941 0442 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 9942 0444 504B ldr r3, .L533+60 - 9943 0446 1A70 strb r2, [r3] - 485:Src/main.c **** case DECODE_TASK: - 9944 .loc 1 485 5 is_stmt 1 view .LVU3204 - 9945 0448 53E6 b .L461 - 9946 .L525: - 9947 .LBB650: - 440:Src/main.c **** uint16_t param0 = COMMAND[1]; - 9948 .loc 1 440 7 view .LVU3205 - 440:Src/main.c **** uint16_t param0 = COMMAND[1]; - 9949 .loc 1 440 16 is_stmt 0 view .LVU3206 - 9950 044a 2288 ldrh r2, [r4] - 9951 .LVL821: - 441:Src/main.c **** uint16_t param1 = COMMAND[2]; - ARM GAS /tmp/ccYgfTud.s page 569 - - - 9952 .loc 1 441 7 is_stmt 1 view .LVU3207 - 441:Src/main.c **** uint16_t param1 = COMMAND[2]; - 9953 .loc 1 441 16 is_stmt 0 view .LVU3208 - 9954 044c 6388 ldrh r3, [r4, #2] - 9955 .LVL822: - 442:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 9956 .loc 1 442 7 is_stmt 1 view .LVU3209 - 442:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 9957 .loc 1 442 16 is_stmt 0 view .LVU3210 - 9958 044e A488 ldrh r4, [r4, #4] - 9959 .LVL823: - 443:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 9960 .loc 1 443 7 is_stmt 1 view .LVU3211 - 443:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 9961 .loc 1 443 15 is_stmt 0 view .LVU3212 - 9962 0450 02F00108 and r8, r2, #1 - 9963 .LVL824: - 444:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; - 9964 .loc 1 444 7 is_stmt 1 view .LVU3213 - 444:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; - 9965 .loc 1 444 15 is_stmt 0 view .LVU3214 - 9966 0454 C2F34006 ubfx r6, r2, #1, #1 - 9967 .LVL825: - 445:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 9968 .loc 1 445 7 is_stmt 1 view .LVU3215 - 445:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 9969 .loc 1 445 15 is_stmt 0 view .LVU3216 - 9970 0458 12F0020F tst r2, #2 - 9971 045c 00D0 beq .L480 - 445:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 9972 .loc 1 445 15 discriminator 1 view .LVU3217 - 9973 045e 0226 movs r6, #2 - 9974 .LVL826: - 9975 .L480: - 446:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 9976 .loc 1 446 7 is_stmt 1 view .LVU3218 - 446:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 9977 .loc 1 446 15 is_stmt 0 view .LVU3219 - 9978 0460 DDB2 uxtb r5, r3 - 9979 .LVL827: - 447:Src/main.c **** uint16_t pat_period = param1; - 9980 .loc 1 447 7 is_stmt 1 view .LVU3220 - 447:Src/main.c **** uint16_t pat_period = param1; - 9981 .loc 1 447 15 is_stmt 0 view .LVU3221 - 9982 0462 C3F30327 ubfx r7, r3, #8, #4 - 9983 .LVL828: - 448:Src/main.c **** - 9984 .loc 1 448 7 is_stmt 1 view .LVU3222 - 450:Src/main.c **** { - 9985 .loc 1 450 7 view .LVU3223 - 450:Src/main.c **** { - 9986 .loc 1 450 10 is_stmt 0 view .LVU3224 - 9987 0466 2343 orrs r3, r3, r4 - 9988 .LVL829: - 450:Src/main.c **** { - 9989 .loc 1 450 10 view .LVU3225 - 9990 0468 09D0 beq .L514 - ARM GAS /tmp/ccYgfTud.s page 570 - - - 458:Src/main.c **** { - 9991 .loc 1 458 8 is_stmt 1 view .LVU3226 - 458:Src/main.c **** { - 9992 .loc 1 458 11 is_stmt 0 view .LVU3227 - 9993 046a 1DB1 cbz r5, .L515 - 462:Src/main.c **** { - 9994 .loc 1 462 13 is_stmt 1 view .LVU3228 - 462:Src/main.c **** { - 9995 .loc 1 462 16 is_stmt 0 view .LVU3229 - 9996 046c 3F2D cmp r5, #63 - 9997 046e 02D9 bls .L482 - 464:Src/main.c **** } - 9998 .loc 1 464 18 view .LVU3230 - 9999 0470 3F25 movs r5, #63 - 10000 .LVL830: - 464:Src/main.c **** } - 10001 .loc 1 464 18 view .LVU3231 - 10002 0472 00E0 b .L482 - 10003 .LVL831: - 10004 .L515: - 460:Src/main.c **** } - 10005 .loc 1 460 18 view .LVU3232 - 10006 0474 0125 movs r5, #1 - 10007 .LVL832: - 10008 .L482: - 466:Src/main.c **** { - 10009 .loc 1 466 8 is_stmt 1 view .LVU3233 - 466:Src/main.c **** { - 10010 .loc 1 466 11 is_stmt 0 view .LVU3234 - 10011 0476 34B9 cbnz r4, .L481 - 468:Src/main.c **** } - 10012 .loc 1 468 20 view .LVU3235 - 10013 0478 4FF6FF74 movw r4, #65535 - 10014 .LVL833: - 468:Src/main.c **** } - 10015 .loc 1 468 20 view .LVU3236 - 10016 047c 03E0 b .L481 - 10017 .LVL834: - 10018 .L514: - 454:Src/main.c **** } - 10019 .loc 1 454 19 view .LVU3237 - 10020 047e 4FF6FF74 movw r4, #65535 - 10021 .LVL835: - 453:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 10022 .loc 1 453 17 view .LVU3238 - 10023 0482 0227 movs r7, #2 - 10024 .LVL836: - 452:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; - 10025 .loc 1 452 17 view .LVU3239 - 10026 0484 0125 movs r5, #1 - 10027 .LVL837: - 10028 .L481: - 472:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 10029 .loc 1 472 7 is_stmt 1 view .LVU3240 - 472:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 10030 .loc 1 472 29 is_stmt 0 view .LVU3241 - 10031 0486 0094 str r4, [sp] - ARM GAS /tmp/ccYgfTud.s page 571 - - - 10032 0488 3B46 mov r3, r7 - 10033 048a 2A46 mov r2, r5 - 10034 .LVL838: - 472:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 10035 .loc 1 472 29 view .LVU3242 - 10036 048c 4146 mov r1, r8 - 10037 048e 3046 mov r0, r6 - 10038 0490 FFF7FEFF bl AD9102_Apply - 10039 .LVL839: - 473:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 10040 .loc 1 473 7 is_stmt 1 view .LVU3243 - 473:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 10041 .loc 1 473 21 is_stmt 0 view .LVU3244 - 10042 0494 394B ldr r3, .L533+48 - 10043 0496 5870 strb r0, [r3, #1] - 474:Src/main.c **** { - 10044 .loc 1 474 7 is_stmt 1 view .LVU3245 - 474:Src/main.c **** { - 10045 .loc 1 474 11 is_stmt 0 view .LVU3246 - 10046 0498 0194 str r4, [sp, #4] - 10047 049a 0097 str r7, [sp] - 10048 049c 2B46 mov r3, r5 - 10049 049e 3246 mov r2, r6 - 10050 04a0 4146 mov r1, r8 - 10051 04a2 FFF7FEFF bl AD9102_CheckFlags - 10052 .LVL840: - 474:Src/main.c **** { - 10053 .loc 1 474 10 discriminator 1 view .LVU3247 - 10054 04a6 0028 cmp r0, #0 - 10055 04a8 C7D0 beq .L483 - 476:Src/main.c **** } - 10056 .loc 1 476 8 is_stmt 1 view .LVU3248 - 476:Src/main.c **** } - 10057 .loc 1 476 18 is_stmt 0 view .LVU3249 - 10058 04aa 344A ldr r2, .L533+48 - 10059 04ac 1378 ldrb r3, [r2] @ zero_extendqisi2 - 476:Src/main.c **** } - 10060 .loc 1 476 22 view .LVU3250 - 10061 04ae 63F07F03 orn r3, r3, #127 - 10062 04b2 1370 strb r3, [r2] - 10063 04b4 C1E7 b .L483 - 10064 .LVL841: - 10065 .L465: - 476:Src/main.c **** } - 10066 .loc 1 476 22 view .LVU3251 - 10067 .LBE650: - 487:Src/main.c **** { - 10068 .loc 1 487 6 is_stmt 1 view .LVU3252 - 487:Src/main.c **** { - 10069 .loc 1 487 10 is_stmt 0 view .LVU3253 - 10070 04b6 3248 ldr r0, .L533+52 - 10071 04b8 FFF7FEFF bl CheckChecksum - 10072 .LVL842: - 487:Src/main.c **** { - 10073 .loc 1 487 9 discriminator 1 view .LVU3254 - 10074 04bc 70B9 cbnz r0, .L526 - 496:Src/main.c **** CPU_state = DEFAULT_ENABLE; - ARM GAS /tmp/ccYgfTud.s page 572 - - - 10075 .loc 1 496 7 is_stmt 1 view .LVU3255 - 496:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 10076 .loc 1 496 17 is_stmt 0 view .LVU3256 - 10077 04be 2F4A ldr r2, .L533+48 - 10078 04c0 1378 ldrb r3, [r2] @ zero_extendqisi2 - 496:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 10079 .loc 1 496 21 view .LVU3257 - 10080 04c2 43F00403 orr r3, r3, #4 - 10081 04c6 1370 strb r3, [r2] - 497:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 10082 .loc 1 497 7 is_stmt 1 view .LVU3258 - 497:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 10083 .loc 1 497 17 is_stmt 0 view .LVU3259 - 10084 04c8 2F4B ldr r3, .L533+60 - 10085 04ca 0222 movs r2, #2 - 10086 04cc 1A70 strb r2, [r3] - 498:Src/main.c **** } - 10087 .loc 1 498 7 is_stmt 1 view .LVU3260 - 498:Src/main.c **** } - 10088 .loc 1 498 21 is_stmt 0 view .LVU3261 - 10089 04ce 294B ldr r3, .L533+40 - 10090 04d0 0022 movs r2, #0 - 10091 04d2 1A70 strb r2, [r3] - 10092 .L485: - 500:Src/main.c **** break; - 10093 .loc 1 500 6 is_stmt 1 view .LVU3262 - 500:Src/main.c **** break; - 10094 .loc 1 500 32 is_stmt 0 view .LVU3263 - 10095 04d4 2B4B ldr r3, .L533+56 - 10096 04d6 0122 movs r2, #1 - 10097 04d8 1A70 strb r2, [r3] - 501:Src/main.c **** case RUN_TASK: - 10098 .loc 1 501 5 is_stmt 1 view .LVU3264 - 10099 04da 0AE6 b .L461 - 10100 .L526: - 489:Src/main.c **** TO6_before = TO6; - 10101 .loc 1 489 7 view .LVU3265 - 10102 04dc 244B ldr r3, .L533+36 - 10103 04de 2B4A ldr r2, .L533+64 - 10104 04e0 2B49 ldr r1, .L533+68 - 10105 04e2 2748 ldr r0, .L533+52 - 10106 04e4 FFF7FEFF bl Decode_task - 10107 .LVL843: - 490:Src/main.c **** CPU_state = RUN_TASK; - 10108 .loc 1 490 7 view .LVU3266 - 490:Src/main.c **** CPU_state = RUN_TASK; - 10109 .loc 1 490 18 is_stmt 0 view .LVU3267 - 10110 04e8 1F4B ldr r3, .L533+28 - 10111 04ea 1A68 ldr r2, [r3] - 10112 04ec 294B ldr r3, .L533+72 - 10113 04ee 1A60 str r2, [r3] - 491:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 10114 .loc 1 491 7 is_stmt 1 view .LVU3268 - 491:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 10115 .loc 1 491 17 is_stmt 0 view .LVU3269 - 10116 04f0 0923 movs r3, #9 - 10117 04f2 254A ldr r2, .L533+60 - ARM GAS /tmp/ccYgfTud.s page 573 - - - 10118 04f4 1370 strb r3, [r2] - 492:Src/main.c **** } - 10119 .loc 1 492 7 is_stmt 1 view .LVU3270 - 492:Src/main.c **** } - 10120 .loc 1 492 21 is_stmt 0 view .LVU3271 - 10121 04f6 1F4A ldr r2, .L533+40 - 10122 04f8 1370 strb r3, [r2] - 10123 04fa EBE7 b .L485 - 10124 .L464: - 503:Src/main.c **** { - 10125 .loc 1 503 6 is_stmt 1 view .LVU3272 - 503:Src/main.c **** { - 10126 .loc 1 503 18 is_stmt 0 view .LVU3273 - 10127 04fc 134B ldr r3, .L533 - 10128 04fe 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 10129 0500 012B cmp r3, #1 - 10130 0502 53D0 beq .L486 - 10131 0504 022B cmp r3, #2 - 10132 0506 00F03681 beq .L487 - 10133 .L488: - 758:Src/main.c **** { - 10134 .loc 1 758 6 is_stmt 1 view .LVU3274 - 758:Src/main.c **** { - 10135 .loc 1 758 13 is_stmt 0 view .LVU3275 - 10136 050a 114B ldr r3, .L533+4 - 10137 050c 1B68 ldr r3, [r3] - 10138 050e 114A ldr r2, .L533+8 - 10139 0510 1268 ldr r2, [r2] - 758:Src/main.c **** { - 10140 .loc 1 758 9 view .LVU3276 - 10141 0512 9342 cmp r3, r2 - 10142 0514 00F20782 bhi .L527 - 10143 .L505: - 810:Src/main.c **** - 10144 .loc 1 810 13 is_stmt 1 discriminator 1 view .LVU3277 - 10145 0518 1F4B ldr r3, .L533+76 - 10146 051a 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 10147 051c 002B cmp r3, #0 - 10148 051e FBD0 beq .L505 - 812:Src/main.c **** - 10149 .loc 1 812 6 view .LVU3278 - 10150 0520 FFF7FEFF bl Stop_TIM10 - 10151 .LVL844: - 814:Src/main.c **** { - 10152 .loc 1 814 6 view .LVU3279 - 814:Src/main.c **** { - 10153 .loc 1 814 14 is_stmt 0 view .LVU3280 - 10154 0524 094B ldr r3, .L533 - 10155 0526 DB8A ldrh r3, [r3, #22] - 814:Src/main.c **** { - 10156 .loc 1 814 9 view .LVU3281 - 10157 0528 032B cmp r3, #3 - 10158 052a 0BD9 bls .L506 - 816:Src/main.c **** TO10_counter = task.dt / 10; - 10159 .loc 1 816 7 is_stmt 1 view .LVU3282 - 816:Src/main.c **** TO10_counter = task.dt / 10; - 10160 .loc 1 816 26 is_stmt 0 view .LVU3283 - ARM GAS /tmp/ccYgfTud.s page 574 - - - 10161 052c 1B4B ldr r3, .L533+80 - 10162 052e 1A68 ldr r2, [r3] - 10163 0530 1B4B ldr r3, .L533+84 - 10164 0532 DA60 str r2, [r3, #12] - 817:Src/main.c **** } - 10165 .loc 1 817 7 is_stmt 1 view .LVU3284 - 817:Src/main.c **** } - 10166 .loc 1 817 26 is_stmt 0 view .LVU3285 - 10167 0534 054B ldr r3, .L533 - 10168 0536 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 - 817:Src/main.c **** } - 10169 .loc 1 817 30 view .LVU3286 - 10170 0538 1A4A ldr r2, .L533+88 - 10171 053a A2FB0323 umull r2, r3, r2, r3 - 10172 053e DB08 lsrs r3, r3, #3 - 817:Src/main.c **** } - 10173 .loc 1 817 20 view .LVU3287 - 10174 0540 194A ldr r2, .L533+92 - 10175 0542 1360 str r3, [r2] - 10176 .L506: - 820:Src/main.c **** break; - 10177 .loc 1 820 6 is_stmt 1 view .LVU3288 - 820:Src/main.c **** break; - 10178 .loc 1 820 20 is_stmt 0 view .LVU3289 - 10179 0544 0B4B ldr r3, .L533+40 - 10180 0546 0922 movs r2, #9 - 10181 0548 1A70 strb r2, [r3] - 821:Src/main.c **** } - 10182 .loc 1 821 9 is_stmt 1 view .LVU3290 - 10183 054a D2E5 b .L461 - 10184 .L534: - 10185 .align 2 - 10186 .L533: - 10187 054c 00000000 .word task - 10188 0550 00000000 .word TO7 - 10189 0554 00000000 .word TO7_before - 10190 0558 00000000 .word LD1_param - 10191 055c 00000000 .word LD2_param - 10192 0560 00000000 .word temp16 - 10193 0564 00000000 .word Long_Data - 10194 0568 00000000 .word TO6 - 10195 056c 00000000 .word TO6_stop - 10196 0570 00000000 .word Curr_setup - 10197 0574 00000000 .word CPU_state_old - 10198 0578 00000000 .word CS_result - 10199 057c 00000000 .word State_Data - 10200 0580 00000000 .word COMMAND - 10201 0584 00000000 .word UART_transmission_request - 10202 0588 00000000 .word CPU_state - 10203 058c 00000000 .word LD2_curr_setup - 10204 0590 00000000 .word LD1_curr_setup - 10205 0594 00000000 .word TO6_before - 10206 0598 00000000 .word TIM10_coflag - 10207 059c 00000000 .word TIM10_period - 10208 05a0 00000000 .word htim10 - 10209 05a4 CDCCCCCC .word -858993459 - 10210 05a8 00000000 .word TO10_counter - ARM GAS /tmp/ccYgfTud.s page 575 - - - 10211 .L486: - 10212 .LBB651: - 525:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 10213 .loc 1 525 7 view .LVU3291 - 525:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 10214 .loc 1 525 38 is_stmt 0 view .LVU3292 - 10215 05ac AD4B ldr r3, .L535 - 10216 05ae D3ED077A vldr.32 s15, [r3, #28] - 525:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 10217 .loc 1 525 7 view .LVU3293 - 10218 05b2 FCEEE77A vcvt.u32.f32 s15, s15 - 10219 05b6 17EE903A vmov r3, s15 @ int - 10220 05ba 99B2 uxth r1, r3 - 10221 05bc 0220 movs r0, #2 - 10222 05be FFF7FEFF bl Set_LTEC - 10223 .LVL845: - 526:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 10224 .loc 1 526 7 is_stmt 1 view .LVU3294 - 526:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 10225 .loc 1 526 14 is_stmt 0 view .LVU3295 - 10226 05c2 0320 movs r0, #3 - 10227 05c4 FFF7FEFF bl MPhD_T - 10228 .LVL846: - 527:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 10229 .loc 1 527 7 is_stmt 1 view .LVU3296 - 527:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 10230 .loc 1 527 32 is_stmt 0 view .LVU3297 - 10231 05c8 0320 movs r0, #3 - 10232 05ca FFF7FEFF bl MPhD_T - 10233 .LVL847: - 527:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 10234 .loc 1 527 30 discriminator 1 view .LVU3298 - 10235 05ce A64C ldr r4, .L535+4 - 10236 05d0 2080 strh r0, [r4] @ movhi - 528:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 10237 .loc 1 528 7 is_stmt 1 view .LVU3299 - 528:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 10238 .loc 1 528 14 is_stmt 0 view .LVU3300 - 10239 05d2 0420 movs r0, #4 - 10240 05d4 FFF7FEFF bl MPhD_T - 10241 .LVL848: - 529:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 10242 .loc 1 529 7 is_stmt 1 view .LVU3301 - 529:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 10243 .loc 1 529 32 is_stmt 0 view .LVU3302 - 10244 05d8 0420 movs r0, #4 - 10245 05da FFF7FEFF bl MPhD_T - 10246 .LVL849: - 529:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 10247 .loc 1 529 30 discriminator 1 view .LVU3303 - 10248 05de A34D ldr r5, .L535+8 - 10249 05e0 2880 strh r0, [r5] @ movhi - 530:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 10250 .loc 1 530 7 is_stmt 1 view .LVU3304 - 530:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 10251 .loc 1 530 14 is_stmt 0 view .LVU3305 - 10252 05e2 0122 movs r2, #1 - ARM GAS /tmp/ccYgfTud.s page 576 - - - 10253 05e4 2146 mov r1, r4 - 10254 05e6 A248 ldr r0, .L535+12 - 10255 05e8 FFF7FEFF bl PID_Controller_Temp - 10256 .LVL850: - 10257 05ec 0146 mov r1, r0 - 530:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 10258 .loc 1 530 13 discriminator 1 view .LVU3306 - 10259 05ee A14C ldr r4, .L535+16 - 10260 05f0 2080 strh r0, [r4] @ movhi - 531:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 10261 .loc 1 531 7 is_stmt 1 view .LVU3307 - 10262 05f2 0320 movs r0, #3 - 10263 05f4 FFF7FEFF bl Set_LTEC - 10264 .LVL851: - 532:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 10265 .loc 1 532 7 view .LVU3308 - 532:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 10266 .loc 1 532 14 is_stmt 0 view .LVU3309 - 10267 05f8 0222 movs r2, #2 - 10268 05fa 2946 mov r1, r5 - 10269 05fc 9E48 ldr r0, .L535+20 - 10270 05fe FFF7FEFF bl PID_Controller_Temp - 10271 .LVL852: - 10272 0602 0146 mov r1, r0 - 532:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 10273 .loc 1 532 13 discriminator 1 view .LVU3310 - 10274 0604 2080 strh r0, [r4] @ movhi - 533:Src/main.c **** - 10275 .loc 1 533 7 is_stmt 1 view .LVU3311 - 10276 0606 0420 movs r0, #4 - 10277 0608 FFF7FEFF bl Set_LTEC - 10278 .LVL853: - 536:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10279 .loc 1 536 7 view .LVU3312 - 10280 060c 9B4C ldr r4, .L535+24 - 10281 060e 0122 movs r2, #1 - 10282 0610 8021 movs r1, #128 - 10283 0612 2046 mov r0, r4 - 10284 0614 FFF7FEFF bl HAL_GPIO_WritePin - 10285 .LVL854: - 537:Src/main.c **** - 10286 .loc 1 537 7 view .LVU3313 - 10287 0618 0022 movs r2, #0 - 10288 061a 8021 movs r1, #128 - 10289 061c 2046 mov r0, r4 - 10290 061e FFF7FEFF bl HAL_GPIO_WritePin - 10291 .LVL855: - 539:Src/main.c **** if (st != HAL_OK) - 10292 .loc 1 539 7 view .LVU3314 - 539:Src/main.c **** if (st != HAL_OK) - 10293 .loc 1 539 12 is_stmt 0 view .LVU3315 - 10294 0622 9748 ldr r0, .L535+28 - 10295 0624 FFF7FEFF bl HAL_TIM_Base_Start_IT - 10296 .LVL856: - 540:Src/main.c **** while(1); - 10297 .loc 1 540 7 is_stmt 1 view .LVU3316 - 540:Src/main.c **** while(1); - ARM GAS /tmp/ccYgfTud.s page 577 - - - 10298 .loc 1 540 10 is_stmt 0 view .LVU3317 - 10299 0628 0028 cmp r0, #0 - 10300 062a 75D1 bne .L490 - 543:Src/main.c **** uint16_t trigger_counter = 0; - 10301 .loc 1 543 7 is_stmt 1 view .LVU3318 - 10302 .LVL857: - 544:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 10303 .loc 1 544 7 view .LVU3319 - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10304 .loc 1 545 7 view .LVU3320 - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10305 .loc 1 545 47 is_stmt 0 view .LVU3321 - 10306 062c 8D4B ldr r3, .L535 - 10307 062e 93ED027A vldr.32 s14, [r3, #8] - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10308 .loc 1 545 64 view .LVU3322 - 10309 0632 D3ED047A vldr.32 s15, [r3, #16] - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10310 .loc 1 545 58 view .LVU3323 - 10311 0636 37EE677A vsub.f32 s14, s14, s15 - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10312 .loc 1 545 84 view .LVU3324 - 10313 063a D3ED036A vldr.32 s13, [r3, #12] - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10314 .loc 1 545 79 view .LVU3325 - 10315 063e C7EE267A vdiv.f32 s15, s14, s13 - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10316 .loc 1 545 97 view .LVU3326 - 10317 0642 B2EE047A vmov.f32 s14, #1.0e+1 - 10318 0646 67EE877A vmul.f32 s15, s15, s14 - 545:Src/main.c **** uint16_t task_sheduler = 0; - 10319 .loc 1 545 31 view .LVU3327 - 10320 064a FCEEE77A vcvt.u32.f32 s15, s15 - 10321 064e CDED037A vstr.32 s15, [sp, #12] @ int - 10322 0652 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2 - 10323 .LVL858: - 546:Src/main.c **** - 10324 .loc 1 546 7 is_stmt 1 view .LVU3328 - 550:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 10325 .loc 1 550 7 view .LVU3329 - 10326 0656 DFF85492 ldr r9, .L535+72 - 10327 065a 0021 movs r1, #0 - 10328 065c 4846 mov r0, r9 - 10329 .LVL859: - 550:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 10330 .loc 1 550 7 is_stmt 0 view .LVU3330 - 10331 065e FFF7FEFF bl HAL_TIM_PWM_Stop - 10332 .LVL860: - 551:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 10333 .loc 1 551 7 is_stmt 1 view .LVU3331 - 10334 0662 DFF84C82 ldr r8, .L535+76 - 10335 0666 0821 movs r1, #8 - 10336 0668 4046 mov r0, r8 - 10337 066a FFF7FEFF bl HAL_TIM_PWM_Stop - 10338 .LVL861: - 552:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 10339 .loc 1 552 7 view .LVU3332 - ARM GAS /tmp/ccYgfTud.s page 578 - - - 552:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 10340 .loc 1 552 13 is_stmt 0 view .LVU3333 - 10341 066e 854F ldr r7, .L535+32 - 10342 0670 3B68 ldr r3, [r7] - 552:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 10343 .loc 1 552 20 view .LVU3334 - 10344 0672 23F00803 bic r3, r3, #8 - 10345 0676 3B60 str r3, [r7] - 553:Src/main.c **** - 10346 .loc 1 553 7 is_stmt 1 view .LVU3335 - 553:Src/main.c **** - 10347 .loc 1 553 12 is_stmt 0 view .LVU3336 - 10348 0678 834D ldr r5, .L535+36 - 10349 067a 2B68 ldr r3, [r5] - 553:Src/main.c **** - 10350 .loc 1 553 19 view .LVU3337 - 10351 067c 23F00803 bic r3, r3, #8 - 10352 0680 2B60 str r3, [r5] - 557:Src/main.c **** TIM4 -> CNT = 0; - 10353 .loc 1 557 7 is_stmt 1 view .LVU3338 - 557:Src/main.c **** TIM4 -> CNT = 0; - 10354 .loc 1 557 20 is_stmt 0 view .LVU3339 - 10355 0682 0024 movs r4, #0 - 10356 0684 7C62 str r4, [r7, #36] - 558:Src/main.c **** - 10357 .loc 1 558 7 is_stmt 1 view .LVU3340 - 558:Src/main.c **** - 10358 .loc 1 558 19 is_stmt 0 view .LVU3341 - 10359 0686 6C62 str r4, [r5, #36] - 560:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 10360 .loc 1 560 7 is_stmt 1 view .LVU3342 - 10361 0688 2146 mov r1, r4 - 10362 068a 4846 mov r0, r9 - 10363 068c FFF7FEFF bl HAL_TIM_PWM_Start - 10364 .LVL862: - 561:Src/main.c **** //TIM4 -> CNT = 0; - 10365 .loc 1 561 7 view .LVU3343 - 10366 0690 0821 movs r1, #8 - 10367 0692 4046 mov r0, r8 - 10368 0694 FFF7FEFF bl HAL_TIM_PWM_Start - 10369 .LVL863: - 564:Src/main.c **** TIM11 -> CNT = 0; - 10370 .loc 1 564 7 view .LVU3344 - 564:Src/main.c **** TIM11 -> CNT = 0; - 10371 .loc 1 564 26 is_stmt 0 view .LVU3345 - 10372 0698 EB6A ldr r3, [r5, #44] - 564:Src/main.c **** TIM11 -> CNT = 0; - 10373 .loc 1 564 33 view .LVU3346 - 10374 069a 143B subs r3, r3, #20 - 564:Src/main.c **** TIM11 -> CNT = 0; - 10375 .loc 1 564 19 view .LVU3347 - 10376 069c 6B62 str r3, [r5, #36] - 565:Src/main.c **** - 10377 .loc 1 565 7 is_stmt 1 view .LVU3348 - 565:Src/main.c **** - 10378 .loc 1 565 20 is_stmt 0 view .LVU3349 - 10379 069e 7C62 str r4, [r7, #36] - ARM GAS /tmp/ccYgfTud.s page 579 - - - 568:Src/main.c **** { - 10380 .loc 1 568 7 is_stmt 1 view .LVU3350 - 544:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 10381 .loc 1 544 16 is_stmt 0 view .LVU3351 - 10382 06a0 2546 mov r5, r4 - 10383 .LVL864: - 10384 .L492: - 568:Src/main.c **** { - 10385 .loc 1 568 33 is_stmt 1 view .LVU3352 - 568:Src/main.c **** { - 10386 .loc 1 568 18 is_stmt 0 view .LVU3353 - 10387 06a2 704B ldr r3, .L535 - 10388 06a4 D3ED047A vldr.32 s15, [r3, #16] - 568:Src/main.c **** { - 10389 .loc 1 568 39 view .LVU3354 - 10390 06a8 93ED027A vldr.32 s14, [r3, #8] - 568:Src/main.c **** { - 10391 .loc 1 568 33 view .LVU3355 - 10392 06ac F4EEC77A vcmpe.f32 s15, s14 - 10393 06b0 F1EE10FA vmrs APSR_nzcv, FPSCR - 10394 06b4 37D5 bpl .L528 - 570:Src/main.c **** { - 10395 .loc 1 570 8 is_stmt 1 view .LVU3356 - 570:Src/main.c **** { - 10396 .loc 1 570 12 is_stmt 0 view .LVU3357 - 10397 06b6 754B ldr r3, .L535+40 - 10398 06b8 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 570:Src/main.c **** { - 10399 .loc 1 570 11 view .LVU3358 - 10400 06ba 002B cmp r3, #0 - 10401 06bc F1D0 beq .L492 - 572:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 10402 .loc 1 572 9 is_stmt 1 view .LVU3359 - 10403 06be FCEEE77A vcvt.u32.f32 s15, s15 - 10404 06c2 17EE903A vmov r3, s15 @ int - 10405 06c6 99B2 uxth r1, r3 - 10406 06c8 0120 movs r0, #1 - 10407 06ca FFF7FEFF bl Set_LTEC - 10408 .LVL865: - 575:Src/main.c **** TO10 = 0; - 10409 .loc 1 575 9 view .LVU3360 - 575:Src/main.c **** TO10 = 0; - 10410 .loc 1 575 13 is_stmt 0 view .LVU3361 - 10411 06ce 654B ldr r3, .L535 - 10412 06d0 D3ED047A vldr.32 s15, [r3, #16] - 575:Src/main.c **** TO10 = 0; - 10413 .loc 1 575 35 view .LVU3362 - 10414 06d4 93ED037A vldr.32 s14, [r3, #12] - 575:Src/main.c **** TO10 = 0; - 10415 .loc 1 575 28 view .LVU3363 - 10416 06d8 77EE877A vadd.f32 s15, s15, s14 - 10417 06dc C3ED047A vstr.32 s15, [r3, #16] - 576:Src/main.c **** TIM10_coflag = 0; - 10418 .loc 1 576 9 is_stmt 1 view .LVU3364 - 576:Src/main.c **** TIM10_coflag = 0; - 10419 .loc 1 576 14 is_stmt 0 view .LVU3365 - 10420 06e0 0027 movs r7, #0 - ARM GAS /tmp/ccYgfTud.s page 580 - - - 10421 06e2 6B4B ldr r3, .L535+44 - 10422 06e4 1F60 str r7, [r3] - 577:Src/main.c **** - 10423 .loc 1 577 9 is_stmt 1 view .LVU3366 - 577:Src/main.c **** - 10424 .loc 1 577 22 is_stmt 0 view .LVU3367 - 10425 06e6 694B ldr r3, .L535+40 - 10426 06e8 1F70 strb r7, [r3] - 579:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 10427 .loc 1 579 9 is_stmt 1 view .LVU3368 - 10428 06ea DFF8C881 ldr r8, .L535+80 - 10429 06ee 0122 movs r2, #1 - 10430 06f0 4FF40071 mov r1, #512 - 10431 06f4 4046 mov r0, r8 - 10432 06f6 FFF7FEFF bl HAL_GPIO_WritePin - 10433 .LVL866: - 580:Src/main.c **** //* - 10434 .loc 1 580 9 view .LVU3369 - 10435 06fa 3A46 mov r2, r7 - 10436 06fc 4FF40071 mov r1, #512 - 10437 0700 4046 mov r0, r8 - 10438 0702 FFF7FEFF bl HAL_GPIO_WritePin - 10439 .LVL867: - 582:Src/main.c **** OUT_trigger(trigger_counter); - 10440 .loc 1 582 9 view .LVU3370 - 582:Src/main.c **** OUT_trigger(trigger_counter); - 10441 .loc 1 582 41 is_stmt 0 view .LVU3371 - 10442 0706 B4FBF6F3 udiv r3, r4, r6 - 10443 070a 06FB1343 mls r3, r6, r3, r4 - 10444 070e 9BB2 uxth r3, r3 - 582:Src/main.c **** OUT_trigger(trigger_counter); - 10445 .loc 1 582 12 view .LVU3372 - 10446 0710 1BB1 cbz r3, .L529 - 10447 .L493: - 586:Src/main.c **** //*/ - 10448 .loc 1 586 9 is_stmt 1 view .LVU3373 - 10449 0712 0134 adds r4, r4, #1 - 10450 .LVL868: - 586:Src/main.c **** //*/ - 10451 .loc 1 586 9 is_stmt 0 view .LVU3374 - 10452 0714 A4B2 uxth r4, r4 - 10453 .LVL869: - 586:Src/main.c **** //*/ - 10454 .loc 1 586 9 view .LVU3375 - 10455 0716 C4E7 b .L492 - 10456 .LVL870: - 10457 .L490: - 541:Src/main.c **** - 10458 .loc 1 541 8 is_stmt 1 view .LVU3376 - 541:Src/main.c **** - 10459 .loc 1 541 13 view .LVU3377 - 10460 0718 FEE7 b .L490 - 10461 .LVL871: - 10462 .L529: - 583:Src/main.c **** ++trigger_counter; - 10463 .loc 1 583 10 view .LVU3378 - 10464 071a E8B2 uxtb r0, r5 - ARM GAS /tmp/ccYgfTud.s page 581 - - - 10465 071c FFF7FEFF bl OUT_trigger - 10466 .LVL872: - 584:Src/main.c **** } - 10467 .loc 1 584 10 view .LVU3379 - 10468 0720 0135 adds r5, r5, #1 - 10469 .LVL873: - 584:Src/main.c **** } - 10470 .loc 1 584 10 is_stmt 0 view .LVU3380 - 10471 0722 ADB2 uxth r5, r5 - 10472 .LVL874: - 584:Src/main.c **** } - 10473 .loc 1 584 10 view .LVU3381 - 10474 0724 F5E7 b .L493 - 10475 .L528: - 611:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 10476 .loc 1 611 7 is_stmt 1 view .LVU3382 - 611:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 10477 .loc 1 611 13 is_stmt 0 view .LVU3383 - 10478 0726 574A ldr r2, .L535+32 - 10479 0728 D368 ldr r3, [r2, #12] - 611:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 10480 .loc 1 611 21 view .LVU3384 - 10481 072a 43F00103 orr r3, r3, #1 - 10482 072e D360 str r3, [r2, #12] - 621:Src/main.c **** - 10483 .loc 1 621 7 is_stmt 1 view .LVU3385 - 10484 0730 FFF7FEFF bl Stop_TIM10 - 10485 .LVL875: - 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 10486 .loc 1 623 7 view .LVU3386 - 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 10487 .loc 1 623 32 is_stmt 0 view .LVU3387 - 10488 0734 4B4C ldr r4, .L535 - 10489 .LVL876: - 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 10490 .loc 1 623 32 view .LVU3388 - 10491 0736 D4ED017A vldr.32 s15, [r4, #4] - 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 10492 .loc 1 623 26 view .LVU3389 - 10493 073a C4ED047A vstr.32 s15, [r4, #16] - 624:Src/main.c **** if (task.tau > 3) - 10494 .loc 1 624 7 is_stmt 1 view .LVU3390 - 10495 073e FCEEE77A vcvt.u32.f32 s15, s15 - 10496 0742 17EE903A vmov r3, s15 @ int - 10497 0746 99B2 uxth r1, r3 - 10498 0748 0120 movs r0, #1 - 10499 074a FFF7FEFF bl Set_LTEC - 10500 .LVL877: - 625:Src/main.c **** { - 10501 .loc 1 625 7 view .LVU3391 - 625:Src/main.c **** { - 10502 .loc 1 625 15 is_stmt 0 view .LVU3392 - 10503 074e E38A ldrh r3, [r4, #22] - 625:Src/main.c **** { - 10504 .loc 1 625 10 view .LVU3393 - 10505 0750 032B cmp r3, #3 - 10506 0752 0CD9 bls .L495 - ARM GAS /tmp/ccYgfTud.s page 582 - - - 627:Src/main.c **** htim10.Init.Period = 9999; - 10507 .loc 1 627 8 is_stmt 1 view .LVU3394 - 627:Src/main.c **** htim10.Init.Period = 9999; - 10508 .loc 1 627 34 is_stmt 0 view .LVU3395 - 10509 0754 4A4A ldr r2, .L535+28 - 10510 0756 D068 ldr r0, [r2, #12] - 627:Src/main.c **** htim10.Init.Period = 9999; - 10511 .loc 1 627 21 view .LVU3396 - 10512 0758 4E49 ldr r1, .L535+48 - 10513 075a 0860 str r0, [r1] - 628:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 10514 .loc 1 628 8 is_stmt 1 view .LVU3397 - 628:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 10515 .loc 1 628 27 is_stmt 0 view .LVU3398 - 10516 075c 42F20F71 movw r1, #9999 - 10517 0760 D160 str r1, [r2, #12] - 629:Src/main.c **** } - 10518 .loc 1 629 8 is_stmt 1 view .LVU3399 - 629:Src/main.c **** } - 10519 .loc 1 629 33 is_stmt 0 view .LVU3400 - 10520 0762 013B subs r3, r3, #1 - 629:Src/main.c **** } - 10521 .loc 1 629 38 view .LVU3401 - 10522 0764 6422 movs r2, #100 - 10523 0766 02FB03F3 mul r3, r2, r3 - 629:Src/main.c **** } - 10524 .loc 1 629 21 view .LVU3402 - 10525 076a 4B4A ldr r2, .L535+52 - 10526 076c 1360 str r3, [r2] - 10527 .L495: - 631:Src/main.c **** break; - 10528 .loc 1 631 7 is_stmt 1 view .LVU3403 - 10529 076e 4448 ldr r0, .L535+28 - 10530 0770 FFF7FEFF bl HAL_TIM_Base_Start_IT - 10531 .LVL878: - 632:Src/main.c **** case TT_CHANGE_CURR_2: - 10532 .loc 1 632 6 view .LVU3404 - 10533 0774 C9E6 b .L488 - 10534 .LVL879: - 10535 .L487: - 636:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 10536 .loc 1 636 7 view .LVU3405 - 636:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 10537 .loc 1 636 38 is_stmt 0 view .LVU3406 - 10538 0776 3B4B ldr r3, .L535 - 10539 0778 D3ED077A vldr.32 s15, [r3, #28] - 636:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 10540 .loc 1 636 7 view .LVU3407 - 10541 077c FCEEE77A vcvt.u32.f32 s15, s15 - 10542 0780 17EE903A vmov r3, s15 @ int - 10543 0784 99B2 uxth r1, r3 - 10544 0786 0120 movs r0, #1 - 10545 0788 FFF7FEFF bl Set_LTEC - 10546 .LVL880: - 637:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 10547 .loc 1 637 7 is_stmt 1 view .LVU3408 - 637:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - ARM GAS /tmp/ccYgfTud.s page 583 - - - 10548 .loc 1 637 14 is_stmt 0 view .LVU3409 - 10549 078c 0320 movs r0, #3 - 10550 078e FFF7FEFF bl MPhD_T - 10551 .LVL881: - 638:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 10552 .loc 1 638 7 is_stmt 1 view .LVU3410 - 638:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 10553 .loc 1 638 32 is_stmt 0 view .LVU3411 - 10554 0792 0320 movs r0, #3 - 10555 0794 FFF7FEFF bl MPhD_T - 10556 .LVL882: - 638:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 10557 .loc 1 638 30 discriminator 1 view .LVU3412 - 10558 0798 334C ldr r4, .L535+4 - 10559 079a 2080 strh r0, [r4] @ movhi - 639:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 10560 .loc 1 639 7 is_stmt 1 view .LVU3413 - 639:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 10561 .loc 1 639 14 is_stmt 0 view .LVU3414 - 10562 079c 0420 movs r0, #4 - 10563 079e FFF7FEFF bl MPhD_T - 10564 .LVL883: - 640:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 10565 .loc 1 640 7 is_stmt 1 view .LVU3415 - 640:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 10566 .loc 1 640 32 is_stmt 0 view .LVU3416 - 10567 07a2 0420 movs r0, #4 - 10568 07a4 FFF7FEFF bl MPhD_T - 10569 .LVL884: - 640:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 10570 .loc 1 640 30 discriminator 1 view .LVU3417 - 10571 07a8 304D ldr r5, .L535+8 - 10572 07aa 2880 strh r0, [r5] @ movhi - 641:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 10573 .loc 1 641 7 is_stmt 1 view .LVU3418 - 641:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 10574 .loc 1 641 14 is_stmt 0 view .LVU3419 - 10575 07ac 0122 movs r2, #1 - 10576 07ae 2146 mov r1, r4 - 10577 07b0 2F48 ldr r0, .L535+12 - 10578 07b2 FFF7FEFF bl PID_Controller_Temp - 10579 .LVL885: - 10580 07b6 0146 mov r1, r0 - 641:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 10581 .loc 1 641 13 discriminator 1 view .LVU3420 - 10582 07b8 2E4C ldr r4, .L535+16 - 10583 07ba 2080 strh r0, [r4] @ movhi - 642:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 10584 .loc 1 642 7 is_stmt 1 view .LVU3421 - 10585 07bc 0320 movs r0, #3 - 10586 07be FFF7FEFF bl Set_LTEC - 10587 .LVL886: - 643:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 10588 .loc 1 643 7 view .LVU3422 - 643:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 10589 .loc 1 643 14 is_stmt 0 view .LVU3423 - 10590 07c2 0222 movs r2, #2 - ARM GAS /tmp/ccYgfTud.s page 584 - - - 10591 07c4 2946 mov r1, r5 - 10592 07c6 2C48 ldr r0, .L535+20 - 10593 07c8 FFF7FEFF bl PID_Controller_Temp - 10594 .LVL887: - 10595 07cc 0146 mov r1, r0 - 643:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 10596 .loc 1 643 13 discriminator 1 view .LVU3424 - 10597 07ce 2080 strh r0, [r4] @ movhi - 644:Src/main.c **** - 10598 .loc 1 644 7 is_stmt 1 view .LVU3425 - 10599 07d0 0420 movs r0, #4 - 10600 07d2 FFF7FEFF bl Set_LTEC - 10601 .LVL888: - 646:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 10602 .loc 1 646 7 view .LVU3426 - 646:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 10603 .loc 1 646 28 is_stmt 0 view .LVU3427 - 10604 07d6 314B ldr r3, .L535+56 - 10605 07d8 0222 movs r2, #2 - 10606 07da 1A70 strb r2, [r3] - 647:Src/main.c **** //LD_blinker.param = task.current_param; - 10607 .loc 1 647 7 is_stmt 1 view .LVU3428 - 647:Src/main.c **** //LD_blinker.param = task.current_param; - 10608 .loc 1 647 24 is_stmt 0 view .LVU3429 - 10609 07dc 0022 movs r2, #0 - 10610 07de 9A72 strb r2, [r3, #10] - 649:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 10611 .loc 1 649 7 is_stmt 1 view .LVU3430 - 649:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 10612 .loc 1 649 24 is_stmt 0 view .LVU3431 - 10613 07e0 1A81 strh r2, [r3, #8] @ movhi - 650:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 10614 .loc 1 650 7 is_stmt 1 view .LVU3432 - 650:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 10615 .loc 1 650 24 is_stmt 0 view .LVU3433 - 10616 07e2 4FF47A72 mov r2, #1000 - 10617 07e6 1A81 strh r2, [r3, #8] @ movhi - 651:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 10618 .loc 1 651 7 is_stmt 1 view .LVU3434 - 651:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 10619 .loc 1 651 30 is_stmt 0 view .LVU3435 - 10620 07e8 2D4A ldr r2, .L535+60 - 10621 07ea 5A60 str r2, [r3, #4] - 652:Src/main.c **** - 10622 .loc 1 652 7 is_stmt 1 view .LVU3436 - 652:Src/main.c **** - 10623 .loc 1 652 29 is_stmt 0 view .LVU3437 - 10624 07ec 8022 movs r2, #128 - 10625 07ee 5A80 strh r2, [r3, #2] @ movhi - 654:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 10626 .loc 1 654 7 is_stmt 1 view .LVU3438 - 654:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 10627 .loc 1 654 17 is_stmt 0 view .LVU3439 - 10628 07f0 2C4B ldr r3, .L535+64 - 10629 07f2 42F21072 movw r2, #10000 - 10630 07f6 DA62 str r2, [r3, #44] - 656:Src/main.c **** if (st != HAL_OK) - ARM GAS /tmp/ccYgfTud.s page 585 - - - 10631 .loc 1 656 7 is_stmt 1 view .LVU3440 - 656:Src/main.c **** if (st != HAL_OK) - 10632 .loc 1 656 12 is_stmt 0 view .LVU3441 - 10633 07f8 2B48 ldr r0, .L535+68 - 10634 07fa FFF7FEFF bl HAL_TIM_Base_Start_IT - 10635 .LVL889: - 657:Src/main.c **** while(1); - 10636 .loc 1 657 7 is_stmt 1 view .LVU3442 - 657:Src/main.c **** while(1); - 10637 .loc 1 657 10 is_stmt 0 view .LVU3443 - 10638 07fe 78BB cbnz r0, .L497 - 662:Src/main.c **** uint32_t i = 10000; while (--i){} - 10639 .loc 1 662 7 is_stmt 1 view .LVU3444 - 10640 0800 0122 movs r2, #1 - 10641 0802 8021 movs r1, #128 - 10642 0804 1D48 ldr r0, .L535+24 - 10643 .LVL890: - 662:Src/main.c **** uint32_t i = 10000; while (--i){} - 10644 .loc 1 662 7 is_stmt 0 view .LVU3445 - 10645 0806 FFF7FEFF bl HAL_GPIO_WritePin - 10646 .LVL891: - 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10647 .loc 1 663 7 is_stmt 1 view .LVU3446 - 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10648 .loc 1 663 27 view .LVU3447 - 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10649 .loc 1 663 16 is_stmt 0 view .LVU3448 - 10650 080a 42F21073 movw r3, #10000 - 10651 .LVL892: - 10652 .L498: - 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10653 .loc 1 663 39 is_stmt 1 discriminator 2 view .LVU3449 - 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10654 .loc 1 663 34 discriminator 2 view .LVU3450 - 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10655 .loc 1 663 34 is_stmt 0 discriminator 2 view .LVU3451 - 10656 080e 013B subs r3, r3, #1 - 10657 .LVL893: - 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 10658 .loc 1 663 34 discriminator 2 view .LVU3452 - 10659 0810 FDD1 bne .L498 - 664:Src/main.c **** LD_blinker.state = 2; - 10660 .loc 1 664 7 is_stmt 1 view .LVU3453 - 10661 0812 0022 movs r2, #0 - 10662 0814 8021 movs r1, #128 - 10663 0816 1948 ldr r0, .L535+24 - 10664 0818 FFF7FEFF bl HAL_GPIO_WritePin - 10665 .LVL894: - 665:Src/main.c **** - 10666 .loc 1 665 7 view .LVU3454 - 665:Src/main.c **** - 10667 .loc 1 665 24 is_stmt 0 view .LVU3455 - 10668 081c 1F4B ldr r3, .L535+56 - 10669 081e 0222 movs r2, #2 - 10670 0820 9A72 strb r2, [r3, #10] - 667:Src/main.c **** if (st != HAL_OK) - 10671 .loc 1 667 7 is_stmt 1 view .LVU3456 - ARM GAS /tmp/ccYgfTud.s page 586 - - - 667:Src/main.c **** if (st != HAL_OK) - 10672 .loc 1 667 12 is_stmt 0 view .LVU3457 - 10673 0822 1748 ldr r0, .L535+28 - 10674 0824 FFF7FEFF bl HAL_TIM_Base_Start_IT - 10675 .LVL895: - 668:Src/main.c **** while(1); - 10676 .loc 1 668 7 is_stmt 1 view .LVU3458 - 668:Src/main.c **** while(1); - 10677 .loc 1 668 10 is_stmt 0 view .LVU3459 - 10678 0828 D8B9 cbnz r0, .L500 - 10679 .L501: - 670:Src/main.c **** { - 10680 .loc 1 670 33 is_stmt 1 view .LVU3460 - 670:Src/main.c **** { - 10681 .loc 1 670 18 is_stmt 0 view .LVU3461 - 10682 082a 0E4B ldr r3, .L535 - 10683 082c D3ED047A vldr.32 s15, [r3, #16] - 670:Src/main.c **** { - 10684 .loc 1 670 39 view .LVU3462 - 10685 0830 93ED027A vldr.32 s14, [r3, #8] - 670:Src/main.c **** { - 10686 .loc 1 670 33 view .LVU3463 - 10687 0834 F4EEC77A vcmpe.f32 s15, s14 - 10688 0838 F1EE10FA vmrs APSR_nzcv, FPSCR - 10689 083c 3CD5 bpl .L530 - 672:Src/main.c **** { - 10690 .loc 1 672 8 is_stmt 1 view .LVU3464 - 672:Src/main.c **** { - 10691 .loc 1 672 12 is_stmt 0 view .LVU3465 - 10692 083e 134B ldr r3, .L535+40 - 10693 0840 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 672:Src/main.c **** { - 10694 .loc 1 672 11 view .LVU3466 - 10695 0842 002B cmp r3, #0 - 10696 0844 F1D0 beq .L501 - 677:Src/main.c **** TO10 = 0; - 10697 .loc 1 677 9 is_stmt 1 view .LVU3467 - 677:Src/main.c **** TO10 = 0; - 10698 .loc 1 677 35 is_stmt 0 view .LVU3468 - 10699 0846 074B ldr r3, .L535 - 10700 0848 93ED037A vldr.32 s14, [r3, #12] - 677:Src/main.c **** TO10 = 0; - 10701 .loc 1 677 28 view .LVU3469 - 10702 084c 77EE277A vadd.f32 s15, s14, s15 - 10703 0850 C3ED047A vstr.32 s15, [r3, #16] - 678:Src/main.c **** TIM10_coflag = 0; - 10704 .loc 1 678 9 is_stmt 1 view .LVU3470 - 678:Src/main.c **** TIM10_coflag = 0; - 10705 .loc 1 678 14 is_stmt 0 view .LVU3471 - 10706 0854 0023 movs r3, #0 - 10707 0856 0E4A ldr r2, .L535+44 - 10708 0858 1360 str r3, [r2] - 679:Src/main.c **** - 10709 .loc 1 679 9 is_stmt 1 view .LVU3472 - 679:Src/main.c **** - 10710 .loc 1 679 22 is_stmt 0 view .LVU3473 - 10711 085a 0C4A ldr r2, .L535+40 - ARM GAS /tmp/ccYgfTud.s page 587 - - - 10712 085c 1370 strb r3, [r2] - 10713 085e E4E7 b .L501 - 10714 .LVL896: - 10715 .L497: - 658:Src/main.c **** // */ - 10716 .loc 1 658 8 is_stmt 1 view .LVU3474 - 658:Src/main.c **** // */ - 10717 .loc 1 658 13 view .LVU3475 - 10718 0860 FEE7 b .L497 - 10719 .LVL897: - 10720 .L500: - 669:Src/main.c **** while (task.current_param < task.max_param) - 10721 .loc 1 669 8 view .LVU3476 - 669:Src/main.c **** while (task.current_param < task.max_param) - 10722 .loc 1 669 13 view .LVU3477 - 10723 0862 FEE7 b .L500 - 10724 .L536: - 10725 .align 2 - 10726 .L535: - 10727 0864 00000000 .word task - 10728 0868 00000000 .word LD1_param - 10729 086c 00000000 .word LD2_param - 10730 0870 00000000 .word LD1_curr_setup - 10731 0874 00000000 .word temp16 - 10732 0878 00000000 .word LD2_curr_setup - 10733 087c 000C0240 .word 1073875968 - 10734 0880 00000000 .word htim10 - 10735 0884 00480140 .word 1073825792 - 10736 0888 00080040 .word 1073743872 - 10737 088c 00000000 .word TIM10_coflag - 10738 0890 00000000 .word TO10 - 10739 0894 00000000 .word TIM10_period - 10740 0898 00000000 .word TO10_counter - 10741 089c 00000000 .word LD_blinker - 10742 08a0 00040240 .word 1073873920 - 10743 08a4 00040140 .word 1073808384 - 10744 08a8 00000000 .word htim8 - 10745 08ac 00000000 .word htim11 - 10746 08b0 00000000 .word htim4 - 10747 08b4 00180240 .word 1073879040 - 10748 .L530: - 684:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 10749 .loc 1 684 7 view .LVU3478 - 10750 08b8 6C48 ldr r0, .L537 - 10751 .LVL898: - 684:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 10752 .loc 1 684 7 is_stmt 0 view .LVU3479 - 10753 08ba FFF7FEFF bl HAL_TIM_Base_Stop - 10754 .LVL899: - 685:Src/main.c **** - 10755 .loc 1 685 7 is_stmt 1 view .LVU3480 - 10756 08be 6C4C ldr r4, .L537+4 - 10757 08c0 0122 movs r2, #1 - 10758 08c2 8021 movs r1, #128 - 10759 08c4 2046 mov r0, r4 - 10760 08c6 FFF7FEFF bl HAL_GPIO_WritePin - 10761 .LVL900: - ARM GAS /tmp/ccYgfTud.s page 588 - - - 687:Src/main.c **** - 10762 .loc 1 687 7 view .LVU3481 - 10763 08ca 0022 movs r2, #0 - 10764 08cc 8021 movs r1, #128 - 10765 08ce 2046 mov r0, r4 - 10766 08d0 FFF7FEFF bl HAL_GPIO_WritePin - 10767 .LVL901: - 689:Src/main.c **** TIM8->CNT = 0; - 10768 .loc 1 689 7 view .LVU3482 - 10769 08d4 6748 ldr r0, .L537+8 - 10770 08d6 FFF7FEFF bl HAL_TIM_Base_Stop_IT - 10771 .LVL902: - 690:Src/main.c **** - 10772 .loc 1 690 7 view .LVU3483 - 690:Src/main.c **** - 10773 .loc 1 690 17 is_stmt 0 view .LVU3484 - 10774 08da 674B ldr r3, .L537+12 - 10775 08dc 0022 movs r2, #0 - 10776 08de 5A62 str r2, [r3, #36] - 692:Src/main.c **** task.current_param = task.min_param; - 10777 .loc 1 692 7 is_stmt 1 view .LVU3485 - 10778 08e0 FFF7FEFF bl Stop_TIM10 - 10779 .LVL903: - 693:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 10780 .loc 1 693 7 view .LVU3486 - 693:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 10781 .loc 1 693 32 is_stmt 0 view .LVU3487 - 10782 08e4 654C ldr r4, .L537+16 - 10783 08e6 D4ED017A vldr.32 s15, [r4, #4] - 693:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 10784 .loc 1 693 26 view .LVU3488 - 10785 08ea C4ED047A vstr.32 s15, [r4, #16] - 694:Src/main.c **** if (task.tau > 3) - 10786 .loc 1 694 7 is_stmt 1 view .LVU3489 - 10787 08ee FCEEE77A vcvt.u32.f32 s15, s15 - 10788 08f2 17EE903A vmov r3, s15 @ int - 10789 08f6 99B2 uxth r1, r3 - 10790 08f8 0220 movs r0, #2 - 10791 08fa FFF7FEFF bl Set_LTEC - 10792 .LVL904: - 695:Src/main.c **** { - 10793 .loc 1 695 7 view .LVU3490 - 695:Src/main.c **** { - 10794 .loc 1 695 15 is_stmt 0 view .LVU3491 - 10795 08fe E38A ldrh r3, [r4, #22] - 695:Src/main.c **** { - 10796 .loc 1 695 10 view .LVU3492 - 10797 0900 032B cmp r3, #3 - 10798 0902 0CD9 bls .L503 - 697:Src/main.c **** htim10.Init.Period = 9999; - 10799 .loc 1 697 8 is_stmt 1 view .LVU3493 - 697:Src/main.c **** htim10.Init.Period = 9999; - 10800 .loc 1 697 34 is_stmt 0 view .LVU3494 - 10801 0904 594A ldr r2, .L537 - 10802 0906 D068 ldr r0, [r2, #12] - 697:Src/main.c **** htim10.Init.Period = 9999; - 10803 .loc 1 697 21 view .LVU3495 - ARM GAS /tmp/ccYgfTud.s page 589 - - - 10804 0908 5D49 ldr r1, .L537+20 - 10805 090a 0860 str r0, [r1] - 698:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 10806 .loc 1 698 8 is_stmt 1 view .LVU3496 - 698:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 10807 .loc 1 698 27 is_stmt 0 view .LVU3497 - 10808 090c 42F20F71 movw r1, #9999 - 10809 0910 D160 str r1, [r2, #12] - 699:Src/main.c **** } - 10810 .loc 1 699 8 is_stmt 1 view .LVU3498 - 699:Src/main.c **** } - 10811 .loc 1 699 33 is_stmt 0 view .LVU3499 - 10812 0912 013B subs r3, r3, #1 - 699:Src/main.c **** } - 10813 .loc 1 699 38 view .LVU3500 - 10814 0914 6422 movs r2, #100 - 10815 0916 02FB03F3 mul r3, r2, r3 - 699:Src/main.c **** } - 10816 .loc 1 699 21 view .LVU3501 - 10817 091a 5A4A ldr r2, .L537+24 - 10818 091c 1360 str r3, [r2] - 10819 .L503: - 701:Src/main.c **** - 10820 .loc 1 701 7 is_stmt 1 view .LVU3502 - 10821 091e 5348 ldr r0, .L537 - 10822 0920 FFF7FEFF bl HAL_TIM_Base_Start_IT - 10823 .LVL905: - 749:Src/main.c **** case TT_CHANGE_TEMP_1: - 10824 .loc 1 749 6 view .LVU3503 - 10825 0924 F1E5 b .L488 - 10826 .LVL906: - 10827 .L527: - 749:Src/main.c **** case TT_CHANGE_TEMP_1: - 10828 .loc 1 749 6 is_stmt 0 view .LVU3504 - 10829 .LBE651: - 760:Src/main.c **** - 10830 .loc 1 760 7 is_stmt 1 view .LVU3505 - 760:Src/main.c **** - 10831 .loc 1 760 18 is_stmt 0 view .LVU3506 - 10832 0926 584A ldr r2, .L537+28 - 10833 0928 1360 str r3, [r2] - 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 10834 .loc 1 762 7 is_stmt 1 view .LVU3507 - 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 10835 .loc 1 762 25 is_stmt 0 view .LVU3508 - 10836 092a 0120 movs r0, #1 - 10837 092c FFF7FEFF bl MPhD_T - 10838 .LVL907: - 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 10839 .loc 1 762 23 discriminator 1 view .LVU3509 - 10840 0930 564E ldr r6, .L537+32 - 10841 0932 3081 strh r0, [r6, #8] @ movhi - 763:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 10842 .loc 1 763 7 is_stmt 1 view .LVU3510 - 763:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 10843 .loc 1 763 25 is_stmt 0 view .LVU3511 - 10844 0934 0120 movs r0, #1 - ARM GAS /tmp/ccYgfTud.s page 590 - - - 10845 0936 FFF7FEFF bl MPhD_T - 10846 .LVL908: - 763:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 10847 .loc 1 763 23 discriminator 1 view .LVU3512 - 10848 093a 3081 strh r0, [r6, #8] @ movhi - 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 10849 .loc 1 764 7 is_stmt 1 view .LVU3513 - 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 10850 .loc 1 764 25 is_stmt 0 view .LVU3514 - 10851 093c 0220 movs r0, #2 - 10852 093e FFF7FEFF bl MPhD_T - 10853 .LVL909: - 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 10854 .loc 1 764 23 discriminator 1 view .LVU3515 - 10855 0942 534F ldr r7, .L537+36 - 10856 0944 3881 strh r0, [r7, #8] @ movhi - 765:Src/main.c **** - 10857 .loc 1 765 7 is_stmt 1 view .LVU3516 - 765:Src/main.c **** - 10858 .loc 1 765 25 is_stmt 0 view .LVU3517 - 10859 0946 0220 movs r0, #2 - 10860 0948 FFF7FEFF bl MPhD_T - 10861 .LVL910: - 765:Src/main.c **** - 10862 .loc 1 765 23 discriminator 1 view .LVU3518 - 10863 094c 3881 strh r0, [r7, #8] @ movhi - 767:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 10864 .loc 1 767 7 is_stmt 1 view .LVU3519 - 767:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 10865 .loc 1 767 31 is_stmt 0 view .LVU3520 - 10866 094e 3389 ldrh r3, [r6, #8] - 767:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 10867 .loc 1 767 20 view .LVU3521 - 10868 0950 504C ldr r4, .L537+40 - 10869 0952 6380 strh r3, [r4, #2] @ movhi - 768:Src/main.c **** - 10870 .loc 1 768 7 is_stmt 1 view .LVU3522 - 768:Src/main.c **** - 10871 .loc 1 768 20 is_stmt 0 view .LVU3523 - 10872 0954 A080 strh r0, [r4, #4] @ movhi - 772:Src/main.c **** temp16 = Get_ADC(1); - 10873 .loc 1 772 7 is_stmt 1 view .LVU3524 - 772:Src/main.c **** temp16 = Get_ADC(1); - 10874 .loc 1 772 16 is_stmt 0 view .LVU3525 - 10875 0956 0020 movs r0, #0 - 10876 0958 FFF7FEFF bl Get_ADC - 10877 .LVL911: - 772:Src/main.c **** temp16 = Get_ADC(1); - 10878 .loc 1 772 14 discriminator 1 view .LVU3526 - 10879 095c 4E4D ldr r5, .L537+44 - 10880 095e 2880 strh r0, [r5] @ movhi - 773:Src/main.c **** Long_Data[7] = temp16; - 10881 .loc 1 773 7 is_stmt 1 view .LVU3527 - 773:Src/main.c **** Long_Data[7] = temp16; - 10882 .loc 1 773 16 is_stmt 0 view .LVU3528 - 10883 0960 0120 movs r0, #1 - 10884 0962 FFF7FEFF bl Get_ADC - ARM GAS /tmp/ccYgfTud.s page 591 - - - 10885 .LVL912: - 773:Src/main.c **** Long_Data[7] = temp16; - 10886 .loc 1 773 14 discriminator 1 view .LVU3529 - 10887 0966 2880 strh r0, [r5] @ movhi - 774:Src/main.c **** - 10888 .loc 1 774 7 is_stmt 1 view .LVU3530 - 774:Src/main.c **** - 10889 .loc 1 774 20 is_stmt 0 view .LVU3531 - 10890 0968 E081 strh r0, [r4, #14] @ movhi - 777:Src/main.c **** Long_Data[8] = temp16; - 10891 .loc 1 777 7 is_stmt 1 view .LVU3532 - 777:Src/main.c **** Long_Data[8] = temp16; - 10892 .loc 1 777 16 is_stmt 0 view .LVU3533 - 10893 096a 0120 movs r0, #1 - 10894 096c FFF7FEFF bl Get_ADC - 10895 .LVL913: - 777:Src/main.c **** Long_Data[8] = temp16; - 10896 .loc 1 777 14 discriminator 1 view .LVU3534 - 10897 0970 2880 strh r0, [r5] @ movhi - 778:Src/main.c **** - 10898 .loc 1 778 7 is_stmt 1 view .LVU3535 - 778:Src/main.c **** - 10899 .loc 1 778 20 is_stmt 0 view .LVU3536 - 10900 0972 2082 strh r0, [r4, #16] @ movhi - 781:Src/main.c **** Long_Data[9] = temp16; - 10901 .loc 1 781 7 is_stmt 1 view .LVU3537 - 781:Src/main.c **** Long_Data[9] = temp16; - 10902 .loc 1 781 16 is_stmt 0 view .LVU3538 - 10903 0974 0120 movs r0, #1 - 10904 0976 FFF7FEFF bl Get_ADC - 10905 .LVL914: - 781:Src/main.c **** Long_Data[9] = temp16; - 10906 .loc 1 781 14 discriminator 1 view .LVU3539 - 10907 097a 2880 strh r0, [r5] @ movhi - 782:Src/main.c **** - 10908 .loc 1 782 7 is_stmt 1 view .LVU3540 - 782:Src/main.c **** - 10909 .loc 1 782 20 is_stmt 0 view .LVU3541 - 10910 097c 6082 strh r0, [r4, #18] @ movhi - 785:Src/main.c **** Long_Data[10] = temp16; - 10911 .loc 1 785 7 is_stmt 1 view .LVU3542 - 785:Src/main.c **** Long_Data[10] = temp16; - 10912 .loc 1 785 16 is_stmt 0 view .LVU3543 - 10913 097e 0120 movs r0, #1 - 10914 0980 FFF7FEFF bl Get_ADC - 10915 .LVL915: - 785:Src/main.c **** Long_Data[10] = temp16; - 10916 .loc 1 785 14 discriminator 1 view .LVU3544 - 10917 0984 2880 strh r0, [r5] @ movhi - 786:Src/main.c **** - 10918 .loc 1 786 7 is_stmt 1 view .LVU3545 - 786:Src/main.c **** - 10919 .loc 1 786 21 is_stmt 0 view .LVU3546 - 10920 0986 A082 strh r0, [r4, #20] @ movhi - 789:Src/main.c **** Long_Data[11] = temp16; - 10921 .loc 1 789 7 is_stmt 1 view .LVU3547 - 789:Src/main.c **** Long_Data[11] = temp16; - ARM GAS /tmp/ccYgfTud.s page 592 - - - 10922 .loc 1 789 16 is_stmt 0 view .LVU3548 - 10923 0988 0120 movs r0, #1 - 10924 098a FFF7FEFF bl Get_ADC - 10925 .LVL916: - 789:Src/main.c **** Long_Data[11] = temp16; - 10926 .loc 1 789 14 discriminator 1 view .LVU3549 - 10927 098e 2880 strh r0, [r5] @ movhi - 790:Src/main.c **** temp16 = Get_ADC(2); - 10928 .loc 1 790 7 is_stmt 1 view .LVU3550 - 790:Src/main.c **** temp16 = Get_ADC(2); - 10929 .loc 1 790 21 is_stmt 0 view .LVU3551 - 10930 0990 E082 strh r0, [r4, #22] @ movhi - 791:Src/main.c **** - 10931 .loc 1 791 7 is_stmt 1 view .LVU3552 - 791:Src/main.c **** - 10932 .loc 1 791 16 is_stmt 0 view .LVU3553 - 10933 0992 0220 movs r0, #2 - 10934 0994 FFF7FEFF bl Get_ADC - 10935 .LVL917: - 791:Src/main.c **** - 10936 .loc 1 791 14 discriminator 1 view .LVU3554 - 10937 0998 2880 strh r0, [r5] @ movhi - 794:Src/main.c **** temp16 = Get_ADC(4); - 10938 .loc 1 794 7 is_stmt 1 view .LVU3555 - 794:Src/main.c **** temp16 = Get_ADC(4); - 10939 .loc 1 794 16 is_stmt 0 view .LVU3556 - 10940 099a 0320 movs r0, #3 - 10941 099c FFF7FEFF bl Get_ADC - 10942 .LVL918: - 794:Src/main.c **** temp16 = Get_ADC(4); - 10943 .loc 1 794 14 discriminator 1 view .LVU3557 - 10944 09a0 2880 strh r0, [r5] @ movhi - 795:Src/main.c **** Long_Data[12] = temp16; - 10945 .loc 1 795 7 is_stmt 1 view .LVU3558 - 795:Src/main.c **** Long_Data[12] = temp16; - 10946 .loc 1 795 16 is_stmt 0 view .LVU3559 - 10947 09a2 0420 movs r0, #4 - 10948 09a4 FFF7FEFF bl Get_ADC - 10949 .LVL919: - 795:Src/main.c **** Long_Data[12] = temp16; - 10950 .loc 1 795 14 discriminator 1 view .LVU3560 - 10951 09a8 2880 strh r0, [r5] @ movhi - 796:Src/main.c **** temp16 = Get_ADC(5); - 10952 .loc 1 796 7 is_stmt 1 view .LVU3561 - 796:Src/main.c **** temp16 = Get_ADC(5); - 10953 .loc 1 796 21 is_stmt 0 view .LVU3562 - 10954 09aa 2083 strh r0, [r4, #24] @ movhi - 797:Src/main.c **** - 10955 .loc 1 797 7 is_stmt 1 view .LVU3563 - 797:Src/main.c **** - 10956 .loc 1 797 16 is_stmt 0 view .LVU3564 - 10957 09ac 0520 movs r0, #5 - 10958 09ae FFF7FEFF bl Get_ADC - 10959 .LVL920: - 797:Src/main.c **** - 10960 .loc 1 797 14 discriminator 1 view .LVU3565 - 10961 09b2 2880 strh r0, [r5] @ movhi - ARM GAS /tmp/ccYgfTud.s page 593 - - - 800:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 10962 .loc 1 800 7 is_stmt 1 view .LVU3566 - 800:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 10963 .loc 1 800 16 is_stmt 0 view .LVU3567 - 10964 09b4 394B ldr r3, .L537+48 - 10965 09b6 1B68 ldr r3, [r3] - 10966 09b8 394A ldr r2, .L537+52 - 10967 09ba 1360 str r3, [r2] - 801:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 10968 .loc 1 801 7 is_stmt 1 view .LVU3568 - 801:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 10969 .loc 1 801 20 is_stmt 0 view .LVU3569 - 10970 09bc E380 strh r3, [r4, #6] @ movhi - 802:Src/main.c **** - 10971 .loc 1 802 7 is_stmt 1 view .LVU3570 - 802:Src/main.c **** - 10972 .loc 1 802 31 is_stmt 0 view .LVU3571 - 10973 09be 1B0C lsrs r3, r3, #16 - 802:Src/main.c **** - 10974 .loc 1 802 20 view .LVU3572 - 10975 09c0 2381 strh r3, [r4, #8] @ movhi - 805:Src/main.c **** - 10976 .loc 1 805 7 is_stmt 1 view .LVU3573 - 805:Src/main.c **** - 10977 .loc 1 805 31 is_stmt 0 view .LVU3574 - 10978 09c2 3388 ldrh r3, [r6] - 805:Src/main.c **** - 10979 .loc 1 805 20 view .LVU3575 - 10980 09c4 6381 strh r3, [r4, #10] @ movhi - 808:Src/main.c **** } - 10981 .loc 1 808 7 is_stmt 1 view .LVU3576 - 808:Src/main.c **** } - 10982 .loc 1 808 31 is_stmt 0 view .LVU3577 - 10983 09c6 3B88 ldrh r3, [r7] - 808:Src/main.c **** } - 10984 .loc 1 808 20 view .LVU3578 - 10985 09c8 A381 strh r3, [r4, #12] @ movhi - 10986 09ca A5E5 b .L505 - 10987 .L507: - 836:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 10988 .loc 1 836 5 is_stmt 1 view .LVU3579 - 836:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 10989 .loc 1 836 17 is_stmt 0 view .LVU3580 - 10990 09cc 354C ldr r4, .L537+56 - 10991 09ce 0D21 movs r1, #13 - 10992 09d0 2046 mov r0, r4 - 10993 09d2 FFF7FEFF bl CalculateChecksum - 10994 .LVL921: - 836:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 10995 .loc 1 836 15 discriminator 1 view .LVU3581 - 10996 09d6 344B ldr r3, .L537+60 - 10997 09d8 1880 strh r0, [r3] @ movhi - 837:Src/main.c **** - 10998 .loc 1 837 5 is_stmt 1 view .LVU3582 - 837:Src/main.c **** - 10999 .loc 1 837 24 is_stmt 0 view .LVU3583 - 11000 09da 6083 strh r0, [r4, #26] @ movhi - ARM GAS /tmp/ccYgfTud.s page 594 - - - 839:Src/main.c **** { - 11001 .loc 1 839 5 is_stmt 1 view .LVU3584 - 11002 .LBB652: - 839:Src/main.c **** { - 11003 .loc 1 839 10 view .LVU3585 - 11004 .LVL922: - 839:Src/main.c **** { - 11005 .loc 1 839 19 is_stmt 0 view .LVU3586 - 11006 09dc 0023 movs r3, #0 - 839:Src/main.c **** { - 11007 .loc 1 839 5 view .LVU3587 - 11008 09de 0BE0 b .L510 - 11009 .LVL923: - 11010 .L511: - 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11011 .loc 1 841 6 is_stmt 1 view .LVU3588 - 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11012 .loc 1 841 33 is_stmt 0 view .LVU3589 - 11013 09e0 2C4A ldr r2, .L537+40 - 11014 09e2 32F81320 ldrh r2, [r2, r3, lsl #1] - 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11015 .loc 1 841 17 view .LVU3590 - 11016 09e6 5900 lsls r1, r3, #1 - 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11017 .loc 1 841 21 view .LVU3591 - 11018 09e8 3048 ldr r0, .L537+64 - 11019 09ea 00F81320 strb r2, [r0, r3, lsl #1] - 842:Src/main.c **** } - 11020 .loc 1 842 6 is_stmt 1 view .LVU3592 - 842:Src/main.c **** } - 11021 .loc 1 842 19 is_stmt 0 view .LVU3593 - 11022 09ee 0131 adds r1, r1, #1 - 842:Src/main.c **** } - 11023 .loc 1 842 23 view .LVU3594 - 11024 09f0 120A lsrs r2, r2, #8 - 11025 09f2 4254 strb r2, [r0, r1] - 839:Src/main.c **** { - 11026 .loc 1 839 38 is_stmt 1 discriminator 3 view .LVU3595 - 11027 09f4 0133 adds r3, r3, #1 - 11028 .LVL924: - 839:Src/main.c **** { - 11029 .loc 1 839 38 is_stmt 0 discriminator 3 view .LVU3596 - 11030 09f6 9BB2 uxth r3, r3 - 11031 .LVL925: - 11032 .L510: - 839:Src/main.c **** { - 11033 .loc 1 839 28 is_stmt 1 discriminator 1 view .LVU3597 - 11034 09f8 0E2B cmp r3, #14 - 11035 09fa F1D9 bls .L511 - 11036 .LBE652: - 849:Src/main.c **** UART_transmission_request = NO_MESS; - 11037 .loc 1 849 5 view .LVU3598 - 11038 09fc 1E20 movs r0, #30 - 11039 09fe FFF7FEFF bl USART_TX_DMA - 11040 .LVL926: - 850:Src/main.c **** break; - 11041 .loc 1 850 5 view .LVU3599 - ARM GAS /tmp/ccYgfTud.s page 595 - - - 850:Src/main.c **** break; - 11042 .loc 1 850 31 is_stmt 0 view .LVU3600 - 11043 0a02 2B4B ldr r3, .L537+68 - 11044 0a04 0022 movs r2, #0 - 11045 0a06 1A70 strb r2, [r3] - 851:Src/main.c **** case MESS_03://Transmith saved packet - 11046 .loc 1 851 4 is_stmt 1 view .LVU3601 - 11047 0a08 FFF787BB b .L509 - 11048 .LVL927: - 11049 .L512: - 11050 .LBB653: - 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11051 .loc 1 855 6 view .LVU3602 - 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11052 .loc 1 855 33 is_stmt 0 view .LVU3603 - 11053 0a0c 214A ldr r2, .L537+40 - 11054 0a0e 32F81320 ldrh r2, [r2, r3, lsl #1] - 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11055 .loc 1 855 17 view .LVU3604 - 11056 0a12 5900 lsls r1, r3, #1 - 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 11057 .loc 1 855 21 view .LVU3605 - 11058 0a14 2548 ldr r0, .L537+64 - 11059 0a16 00F81320 strb r2, [r0, r3, lsl #1] - 856:Src/main.c **** } - 11060 .loc 1 856 6 is_stmt 1 view .LVU3606 - 856:Src/main.c **** } - 11061 .loc 1 856 19 is_stmt 0 view .LVU3607 - 11062 0a1a 0131 adds r1, r1, #1 - 856:Src/main.c **** } - 11063 .loc 1 856 23 view .LVU3608 - 11064 0a1c 120A lsrs r2, r2, #8 - 11065 0a1e 4254 strb r2, [r0, r1] - 853:Src/main.c **** { - 11066 .loc 1 853 38 is_stmt 1 discriminator 3 view .LVU3609 - 11067 0a20 0133 adds r3, r3, #1 - 11068 .LVL928: - 853:Src/main.c **** { - 11069 .loc 1 853 38 is_stmt 0 discriminator 3 view .LVU3610 - 11070 0a22 9BB2 uxth r3, r3 - 11071 .LVL929: - 11072 .L508: - 853:Src/main.c **** { - 11073 .loc 1 853 28 is_stmt 1 discriminator 1 view .LVU3611 - 11074 0a24 0E2B cmp r3, #14 - 11075 0a26 F1D9 bls .L512 - 11076 .LBE653: - 862:Src/main.c **** UART_transmission_request = NO_MESS; - 11077 .loc 1 862 5 view .LVU3612 - 11078 0a28 1E20 movs r0, #30 - 11079 0a2a FFF7FEFF bl USART_TX_DMA - 11080 .LVL930: - 863:Src/main.c **** break; - 11081 .loc 1 863 5 view .LVU3613 - 863:Src/main.c **** break; - 11082 .loc 1 863 31 is_stmt 0 view .LVU3614 - 11083 0a2e 204B ldr r3, .L537+68 - ARM GAS /tmp/ccYgfTud.s page 596 - - - 11084 0a30 0022 movs r2, #0 - 11085 0a32 1A70 strb r2, [r3] - 864:Src/main.c **** } - 11086 .loc 1 864 4 is_stmt 1 view .LVU3615 - 11087 0a34 FFF771BB b .L509 - 11088 .LVL931: - 11089 .L518: - 824:Src/main.c **** { - 11090 .loc 1 824 3 is_stmt 0 view .LVU3616 - 11091 0a38 0023 movs r3, #0 - 11092 0a3a F3E7 b .L508 - 11093 .L521: - 866:Src/main.c **** { - 11094 .loc 1 866 28 discriminator 1 view .LVU3617 - 11095 0a3c 174B ldr r3, .L537+48 - 11096 0a3e 1B68 ldr r3, [r3] - 11097 0a40 1C4A ldr r2, .L537+72 - 11098 0a42 1268 ldr r2, [r2] - 11099 0a44 9B1A subs r3, r3, r2 - 866:Src/main.c **** { - 11100 .loc 1 866 21 discriminator 1 view .LVU3618 - 11101 0a46 642B cmp r3, #100 - 11102 0a48 7FF66CAB bls .L456 - 868:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 11103 .loc 1 868 4 is_stmt 1 view .LVU3619 - 868:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 11104 .loc 1 868 18 is_stmt 0 view .LVU3620 - 11105 0a4c 0022 movs r2, #0 - 11106 0a4e 1A4B ldr r3, .L537+76 - 11107 0a50 1A80 strh r2, [r3] @ movhi - 869:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 11108 .loc 1 869 4 is_stmt 1 view .LVU3621 - 869:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 11109 .loc 1 869 14 is_stmt 0 view .LVU3622 - 11110 0a52 1A49 ldr r1, .L537+80 - 11111 0a54 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 869:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 11112 .loc 1 869 18 view .LVU3623 - 11113 0a56 43F00203 orr r3, r3, #2 - 11114 0a5a 0B70 strb r3, [r1] - 870:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 11115 .loc 1 870 4 is_stmt 1 view .LVU3624 - 870:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 11116 .loc 1 870 30 is_stmt 0 view .LVU3625 - 11117 0a5c 144B ldr r3, .L537+68 - 11118 0a5e 0121 movs r1, #1 - 11119 0a60 1970 strb r1, [r3] - 871:Src/main.c **** } - 11120 .loc 1 871 4 is_stmt 1 view .LVU3626 - 871:Src/main.c **** } - 11121 .loc 1 871 12 is_stmt 0 view .LVU3627 - 11122 0a62 174B ldr r3, .L537+84 - 11123 0a64 1A70 strb r2, [r3] - 11124 0a66 FFF75DBB b .L456 - 11125 .L538: - 11126 0a6a 00BF .align 2 - 11127 .L537: - ARM GAS /tmp/ccYgfTud.s page 597 - - - 11128 0a6c 00000000 .word htim10 - 11129 0a70 000C0240 .word 1073875968 - 11130 0a74 00000000 .word htim8 - 11131 0a78 00040140 .word 1073808384 - 11132 0a7c 00000000 .word task - 11133 0a80 00000000 .word TIM10_period - 11134 0a84 00000000 .word TO10_counter - 11135 0a88 00000000 .word TO7_before - 11136 0a8c 00000000 .word LD1_param - 11137 0a90 00000000 .word LD2_param - 11138 0a94 00000000 .word Long_Data - 11139 0a98 00000000 .word temp16 - 11140 0a9c 00000000 .word TO6 - 11141 0aa0 00000000 .word TO6_stop - 11142 0aa4 02000000 .word Long_Data+2 - 11143 0aa8 00000000 .word CS_result - 11144 0aac 00000000 .word UART_DATA - 11145 0ab0 00000000 .word UART_transmission_request - 11146 0ab4 00000000 .word TO6_uart - 11147 0ab8 00000000 .word UART_rec_incr - 11148 0abc 00000000 .word State_Data - 11149 0ac0 00000000 .word flg_tmt - 11150 .cfi_endproc - 11151 .LFE1186: - 11153 .section .rodata.ad9102_example4_regval,"a" - 11154 .align 2 - 11157 ad9102_example4_regval: - 11158 0000 0000 .short 0 - 11159 0002 0000 .short 0 - 11160 0004 0000 .short 0 - 11161 0006 0000 .short 0 - 11162 0008 0000 .short 0 - 11163 000a 0000 .short 0 - 11164 000c 0000 .short 0 - 11165 000e 0040 .short 16384 - 11166 0010 0000 .short 0 - 11167 0012 0000 .short 0 - 11168 0014 0000 .short 0 - 11169 0016 0000 .short 0 - 11170 0018 001F .short 7936 - 11171 001a 0000 .short 0 - 11172 001c 0000 .short 0 - 11173 001e 0000 .short 0 - 11174 0020 0E00 .short 14 - 11175 0022 0000 .short 0 - 11176 0024 0000 .short 0 - 11177 0026 0000 .short 0 - 11178 0028 0000 .short 0 - 11179 002a 0000 .short 0 - 11180 002c 1232 .short 12818 - 11181 002e 2101 .short 289 - 11182 0030 FFFF .short -1 - 11183 0032 0000 .short 0 - 11184 0034 0101 .short 257 - 11185 0036 0300 .short 3 - 11186 0038 0000 .short 0 - 11187 003a 0000 .short 0 - ARM GAS /tmp/ccYgfTud.s page 598 - - - 11188 003c 0000 .short 0 - 11189 003e 0000 .short 0 - 11190 0040 0000 .short 0 - 11191 0042 0000 .short 0 - 11192 0044 0000 .short 0 - 11193 0046 0000 .short 0 - 11194 0048 0040 .short 16384 - 11195 004a 0000 .short 0 - 11196 004c 0606 .short 1542 - 11197 004e 9919 .short 6553 - 11198 0050 009A .short -26112 - 11199 0052 0000 .short 0 - 11200 0054 0000 .short 0 - 11201 0056 0000 .short 0 - 11202 0058 0000 .short 0 - 11203 005a 0000 .short 0 - 11204 005c 0000 .short 0 - 11205 005e 0000 .short 0 - 11206 0060 A00F .short 4000 - 11207 0062 0000 .short 0 - 11208 0064 0000 .short 0 - 11209 0066 0000 .short 0 - 11210 0068 0000 .short 0 - 11211 006a 0000 .short 0 - 11212 006c 0000 .short 0 - 11213 006e 0000 .short 0 - 11214 0070 0000 .short 0 - 11215 0072 0000 .short 0 - 11216 0074 0000 .short 0 - 11217 0076 0000 .short 0 - 11218 0078 0000 .short 0 - 11219 007a 0000 .short 0 - 11220 007c 0000 .short 0 - 11221 007e FF16 .short 5887 - 11222 0080 0100 .short 1 - 11223 0082 0100 .short 1 - 11224 .section .rodata.ad9102_reg_addr,"a" - 11225 .align 2 - 11228 ad9102_reg_addr: - 11229 0000 0000 .short 0 - 11230 0002 0100 .short 1 - 11231 0004 0200 .short 2 - 11232 0006 0300 .short 3 - 11233 0008 0400 .short 4 - 11234 000a 0500 .short 5 - 11235 000c 0600 .short 6 - 11236 000e 0700 .short 7 - 11237 0010 0800 .short 8 - 11238 0012 0900 .short 9 - 11239 0014 0A00 .short 10 - 11240 0016 0B00 .short 11 - 11241 0018 0C00 .short 12 - 11242 001a 0D00 .short 13 - 11243 001c 0E00 .short 14 - 11244 001e 1F00 .short 31 - 11245 0020 2000 .short 32 - 11246 0022 2200 .short 34 - ARM GAS /tmp/ccYgfTud.s page 599 - - - 11247 0024 2300 .short 35 - 11248 0026 2400 .short 36 - 11249 0028 2500 .short 37 - 11250 002a 2600 .short 38 - 11251 002c 2700 .short 39 - 11252 002e 2800 .short 40 - 11253 0030 2900 .short 41 - 11254 0032 2A00 .short 42 - 11255 0034 2B00 .short 43 - 11256 0036 2C00 .short 44 - 11257 0038 2D00 .short 45 - 11258 003a 2E00 .short 46 - 11259 003c 2F00 .short 47 - 11260 003e 3000 .short 48 - 11261 0040 3100 .short 49 - 11262 0042 3200 .short 50 - 11263 0044 3300 .short 51 - 11264 0046 3400 .short 52 - 11265 0048 3500 .short 53 - 11266 004a 3600 .short 54 - 11267 004c 3700 .short 55 - 11268 004e 3E00 .short 62 - 11269 0050 3F00 .short 63 - 11270 0052 4000 .short 64 - 11271 0054 4100 .short 65 - 11272 0056 4200 .short 66 - 11273 0058 4300 .short 67 - 11274 005a 4400 .short 68 - 11275 005c 4500 .short 69 - 11276 005e 4700 .short 71 - 11277 0060 5000 .short 80 - 11278 0062 5100 .short 81 - 11279 0064 5200 .short 82 - 11280 0066 5300 .short 83 - 11281 0068 5400 .short 84 - 11282 006a 5500 .short 85 - 11283 006c 5600 .short 86 - 11284 006e 5700 .short 87 - 11285 0070 5800 .short 88 - 11286 0072 5900 .short 89 - 11287 0074 5A00 .short 90 - 11288 0076 5B00 .short 91 - 11289 0078 5C00 .short 92 - 11290 007a 5D00 .short 93 - 11291 007c 5E00 .short 94 - 11292 007e 5F00 .short 95 - 11293 0080 1E00 .short 30 - 11294 0082 1D00 .short 29 - 11295 .global task - 11296 .section .bss.task,"aw",%nobits - 11297 .align 2 - 11300 task: - 11301 0000 00000000 .space 52 - 11301 00000000 - 11301 00000000 - 11301 00000000 - 11301 00000000 - ARM GAS /tmp/ccYgfTud.s page 600 - - - 11302 .global LD_blinker - 11303 .section .bss.LD_blinker,"aw",%nobits - 11304 .align 2 - 11307 LD_blinker: - 11308 0000 00000000 .space 12 - 11308 00000000 - 11308 00000000 - 11309 .global LD2_param - 11310 .section .bss.LD2_param,"aw",%nobits - 11311 .align 2 - 11314 LD2_param: - 11315 0000 00000000 .space 12 - 11315 00000000 - 11315 00000000 - 11316 .global LD1_param - 11317 .section .bss.LD1_param,"aw",%nobits - 11318 .align 2 - 11321 LD1_param: - 11322 0000 00000000 .space 12 - 11322 00000000 - 11322 00000000 - 11323 .global Def_setup - 11324 .section .bss.Def_setup,"aw",%nobits - 11325 .align 2 - 11328 Def_setup: - 11329 0000 00000000 .space 18 - 11329 00000000 - 11329 00000000 - 11329 00000000 - 11329 0000 - 11330 .global Curr_setup - 11331 .section .bss.Curr_setup,"aw",%nobits - 11332 .align 2 - 11335 Curr_setup: - 11336 0000 00000000 .space 18 - 11336 00000000 - 11336 00000000 - 11336 00000000 - 11336 0000 - 11337 .global LD2_def_setup - 11338 .section .bss.LD2_def_setup,"aw",%nobits - 11339 .align 2 - 11342 LD2_def_setup: - 11343 0000 00000000 .space 16 - 11343 00000000 - 11343 00000000 - 11343 00000000 - 11344 .global LD1_def_setup - 11345 .section .bss.LD1_def_setup,"aw",%nobits - 11346 .align 2 - 11349 LD1_def_setup: - 11350 0000 00000000 .space 16 - 11350 00000000 - 11350 00000000 - 11350 00000000 - 11351 .global LD2_curr_setup - 11352 .section .bss.LD2_curr_setup,"aw",%nobits - ARM GAS /tmp/ccYgfTud.s page 601 - - - 11353 .align 2 - 11356 LD2_curr_setup: - 11357 0000 00000000 .space 16 - 11357 00000000 - 11357 00000000 - 11357 00000000 - 11358 .global LD1_curr_setup - 11359 .section .bss.LD1_curr_setup,"aw",%nobits - 11360 .align 2 - 11363 LD1_curr_setup: - 11364 0000 00000000 .space 16 - 11364 00000000 - 11364 00000000 - 11364 00000000 - 11365 .global sizeoffile - 11366 .section .bss.sizeoffile,"aw",%nobits - 11367 .align 2 - 11370 sizeoffile: - 11371 0000 00000000 .space 4 - 11372 .global fgoto - 11373 .section .bss.fgoto,"aw",%nobits - 11374 .align 2 - 11377 fgoto: - 11378 0000 00000000 .space 4 - 11379 .global test - 11380 .section .bss.test,"aw",%nobits - 11381 .align 2 - 11384 test: - 11385 0000 00000000 .space 4 - 11386 .global fresult - 11387 .section .bss.fresult,"aw",%nobits - 11390 fresult: - 11391 0000 00 .space 1 - 11392 .global COMMAND - 11393 .section .bss.COMMAND,"aw",%nobits - 11394 .align 2 - 11397 COMMAND: - 11398 0000 00000000 .space 30 - 11398 00000000 - 11398 00000000 - 11398 00000000 - 11398 00000000 - 11399 .global Long_Data - 11400 .section .bss.Long_Data,"aw",%nobits - 11401 .align 2 - 11404 Long_Data: - 11405 0000 00000000 .space 30 - 11405 00000000 - 11405 00000000 - 11405 00000000 - 11405 00000000 - 11406 .global temp16 - 11407 .section .bss.temp16,"aw",%nobits - 11408 .align 1 - 11411 temp16: - 11412 0000 0000 .space 2 - 11413 .global CS_result - ARM GAS /tmp/ccYgfTud.s page 602 - - - 11414 .section .bss.CS_result,"aw",%nobits - 11415 .align 1 - 11418 CS_result: - 11419 0000 0000 .space 2 - 11420 .global UART_header - 11421 .section .bss.UART_header,"aw",%nobits - 11422 .align 1 - 11425 UART_header: - 11426 0000 0000 .space 2 - 11427 .global UART_rec_incr - 11428 .section .bss.UART_rec_incr,"aw",%nobits - 11429 .align 1 - 11432 UART_rec_incr: - 11433 0000 0000 .space 2 - 11434 .global TIM10_coflag - 11435 .section .bss.TIM10_coflag,"aw",%nobits - 11438 TIM10_coflag: - 11439 0000 00 .space 1 - 11440 .global u_rx_flg - 11441 .section .bss.u_rx_flg,"aw",%nobits - 11444 u_rx_flg: - 11445 0000 00 .space 1 - 11446 .global u_tx_flg - 11447 .section .bss.u_tx_flg,"aw",%nobits - 11450 u_tx_flg: - 11451 0000 00 .space 1 - 11452 .global flg_tmt - 11453 .section .bss.flg_tmt,"aw",%nobits - 11456 flg_tmt: - 11457 0000 00 .space 1 - 11458 .global UART_DATA - 11459 .section .bss.UART_DATA,"aw",%nobits - 11460 .align 2 - 11463 UART_DATA: - 11464 0000 00000000 .space 30 - 11464 00000000 - 11464 00000000 - 11464 00000000 - 11464 00000000 - 11465 .global State_Data - 11466 .section .bss.State_Data,"aw",%nobits - 11467 .align 2 - 11470 State_Data: - 11471 0000 0000 .space 2 - 11472 .global UART_transmission_request - 11473 .section .bss.UART_transmission_request,"aw",%nobits - 11476 UART_transmission_request: - 11477 0000 00 .space 1 - 11478 .global CPU_state_old - 11479 .section .bss.CPU_state_old,"aw",%nobits - 11482 CPU_state_old: - 11483 0000 00 .space 1 - 11484 .global CPU_state - 11485 .section .bss.CPU_state,"aw",%nobits - 11488 CPU_state: - 11489 0000 00 .space 1 - 11490 .global uart_buf - ARM GAS /tmp/ccYgfTud.s page 603 - - - 11491 .section .bss.uart_buf,"aw",%nobits - 11494 uart_buf: - 11495 0000 00 .space 1 - 11496 .global TIM10_period - 11497 .section .bss.TIM10_period,"aw",%nobits - 11498 .align 2 - 11501 TIM10_period: - 11502 0000 00000000 .space 4 - 11503 .global TO10_counter - 11504 .section .bss.TO10_counter,"aw",%nobits - 11505 .align 2 - 11508 TO10_counter: - 11509 0000 00000000 .space 4 - 11510 .global TO10 - 11511 .section .bss.TO10,"aw",%nobits - 11512 .align 2 - 11515 TO10: - 11516 0000 00000000 .space 4 - 11517 .global TO7_PID - 11518 .section .bss.TO7_PID,"aw",%nobits - 11519 .align 2 - 11522 TO7_PID: - 11523 0000 00000000 .space 4 - 11524 .global TO7_before - 11525 .section .bss.TO7_before,"aw",%nobits - 11526 .align 2 - 11529 TO7_before: - 11530 0000 00000000 .space 4 - 11531 .global TO7 - 11532 .section .bss.TO7,"aw",%nobits - 11533 .align 2 - 11536 TO7: - 11537 0000 00000000 .space 4 - 11538 .global temp32 - 11539 .section .bss.temp32,"aw",%nobits - 11540 .align 2 - 11543 temp32: - 11544 0000 00000000 .space 4 - 11545 .global SD_SLIDE - 11546 .section .bss.SD_SLIDE,"aw",%nobits - 11547 .align 2 - 11550 SD_SLIDE: - 11551 0000 00000000 .space 4 - 11552 .global SD_SEEK - 11553 .section .bss.SD_SEEK,"aw",%nobits - 11554 .align 2 - 11557 SD_SEEK: - 11558 0000 00000000 .space 4 - 11559 .global TO6_uart - 11560 .section .bss.TO6_uart,"aw",%nobits - 11561 .align 2 - 11564 TO6_uart: - 11565 0000 00000000 .space 4 - 11566 .global TO6_stop - 11567 .section .bss.TO6_stop,"aw",%nobits - 11568 .align 2 - 11571 TO6_stop: - ARM GAS /tmp/ccYgfTud.s page 604 - - - 11572 0000 00000000 .space 4 - 11573 .global TO6_before - 11574 .section .bss.TO6_before,"aw",%nobits - 11575 .align 2 - 11578 TO6_before: - 11579 0000 00000000 .space 4 - 11580 .global TO6 - 11581 .section .bss.TO6,"aw",%nobits - 11582 .align 2 - 11585 TO6: - 11586 0000 00000000 .space 4 - 11587 .global huart8 - 11588 .section .bss.huart8,"aw",%nobits - 11589 .align 2 - 11592 huart8: - 11593 0000 00000000 .space 136 - 11593 00000000 - 11593 00000000 - 11593 00000000 - 11593 00000000 - 11594 .global htim11 - 11595 .section .bss.htim11,"aw",%nobits - 11596 .align 2 - 11599 htim11: - 11600 0000 00000000 .space 76 - 11600 00000000 - 11600 00000000 - 11600 00000000 - 11600 00000000 - 11601 .global htim10 - 11602 .section .bss.htim10,"aw",%nobits - 11603 .align 2 - 11606 htim10: - 11607 0000 00000000 .space 76 - 11607 00000000 - 11607 00000000 - 11607 00000000 - 11607 00000000 - 11608 .global htim8 - 11609 .section .bss.htim8,"aw",%nobits - 11610 .align 2 - 11613 htim8: - 11614 0000 00000000 .space 76 - 11614 00000000 - 11614 00000000 - 11614 00000000 - 11614 00000000 - 11615 .global htim4 - 11616 .section .bss.htim4,"aw",%nobits - 11617 .align 2 - 11620 htim4: - 11621 0000 00000000 .space 76 - 11621 00000000 - 11621 00000000 - 11621 00000000 - 11621 00000000 - 11622 .global hsd1 - ARM GAS /tmp/ccYgfTud.s page 605 - - - 11623 .section .bss.hsd1,"aw",%nobits - 11624 .align 2 - 11627 hsd1: - 11628 0000 00000000 .space 132 - 11628 00000000 - 11628 00000000 - 11628 00000000 - 11628 00000000 - 11629 .global hadc3 - 11630 .section .bss.hadc3,"aw",%nobits - 11631 .align 2 - 11634 hadc3: - 11635 0000 00000000 .space 72 - 11635 00000000 - 11635 00000000 - 11635 00000000 - 11635 00000000 - 11636 .global hadc1 - 11637 .section .bss.hadc1,"aw",%nobits - 11638 .align 2 - 11641 hadc1: - 11642 0000 00000000 .space 72 - 11642 00000000 - 11642 00000000 - 11642 00000000 - 11642 00000000 - 11643 .text - 11644 .Letext0: - 11645 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 11646 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 11647 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 11648 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 11649 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" - 11650 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" - 11651 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 11652 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 11653 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 11654 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" - 11655 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" - 11656 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 11657 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" - 11658 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 11659 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" - 11660 .file 24 "Inc/main.h" - 11661 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" - 11662 .file 26 "Inc/File_Handling.h" - 11663 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" - 11664 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" - 11665 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - 11666 .file 30 "Inc/fatfs.h" - 11667 .file 31 "" - ARM GAS /tmp/ccYgfTud.s page 606 + 10501 .loc 1 403 25 is_stmt 0 view .LVU3338 + 10502 0304 0220 movs r0, #2 + 10503 0306 FFF7FEFF bl MPhD_T + 10504 .LVL915: + 403:Src/main.c **** + 10505 .loc 1 403 23 discriminator 1 view .LVU3339 + 10506 030a 3081 strh r0, [r6, #8] @ movhi + 406:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 10507 .loc 1 406 7 is_stmt 1 view .LVU3340 + 406:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 10508 .loc 1 406 14 is_stmt 0 view .LVU3341 + 10509 030c 0320 movs r0, #3 + 10510 030e FFF7FEFF bl MPhD_T + 10511 .LVL916: + 407:Src/main.c **** (void) MPhD_T(4); + 10512 .loc 1 407 7 is_stmt 1 view .LVU3342 + ARM GAS /tmp/ccwR4KB7.s page 586 + + + 407:Src/main.c **** (void) MPhD_T(4); + 10513 .loc 1 407 32 is_stmt 0 view .LVU3343 + 10514 0312 0320 movs r0, #3 + 10515 0314 FFF7FEFF bl MPhD_T + 10516 .LVL917: + 407:Src/main.c **** (void) MPhD_T(4); + 10517 .loc 1 407 30 discriminator 1 view .LVU3344 + 10518 0318 3880 strh r0, [r7] @ movhi + 408:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 10519 .loc 1 408 7 is_stmt 1 view .LVU3345 + 408:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 10520 .loc 1 408 14 is_stmt 0 view .LVU3346 + 10521 031a 0420 movs r0, #4 + 10522 031c FFF7FEFF bl MPhD_T + 10523 .LVL918: + 409:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10524 .loc 1 409 7 is_stmt 1 view .LVU3347 + 409:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10525 .loc 1 409 32 is_stmt 0 view .LVU3348 + 10526 0320 0420 movs r0, #4 + 10527 0322 FFF7FEFF bl MPhD_T + 10528 .LVL919: + 409:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10529 .loc 1 409 30 discriminator 1 view .LVU3349 + 10530 0326 3080 strh r0, [r6] @ movhi + 410:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 10531 .loc 1 410 7 is_stmt 1 view .LVU3350 + 410:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 10532 .loc 1 410 14 is_stmt 0 view .LVU3351 + 10533 0328 DFF85882 ldr r8, .L614+68 + 10534 032c 0122 movs r2, #1 + 10535 032e 3946 mov r1, r7 + 10536 0330 4046 mov r0, r8 + 10537 0332 FFF7FEFF bl PID_Controller_Temp + 10538 .LVL920: + 10539 0336 0146 mov r1, r0 + 410:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 10540 .loc 1 410 13 discriminator 1 view .LVU3352 + 10541 0338 864D ldr r5, .L614+20 + 10542 033a 2880 strh r0, [r5] @ movhi + 411:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 10543 .loc 1 411 7 is_stmt 1 view .LVU3353 + 10544 033c 0320 movs r0, #3 + 10545 033e FFF7FEFF bl Set_LTEC + 10546 .LVL921: + 412:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 10547 .loc 1 412 7 view .LVU3354 + 412:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 10548 .loc 1 412 14 is_stmt 0 view .LVU3355 + 10549 0342 DFF83C92 ldr r9, .L614+64 + 10550 0346 0222 movs r2, #2 + 10551 0348 3146 mov r1, r6 + 10552 034a 4846 mov r0, r9 + 10553 034c FFF7FEFF bl PID_Controller_Temp + 10554 .LVL922: + 10555 0350 0146 mov r1, r0 + 412:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + ARM GAS /tmp/ccwR4KB7.s page 587 + + + 10556 .loc 1 412 13 discriminator 1 view .LVU3356 + 10557 0352 2880 strh r0, [r5] @ movhi + 413:Src/main.c **** + 10558 .loc 1 413 7 is_stmt 1 view .LVU3357 + 10559 0354 0420 movs r0, #4 + 10560 0356 FFF7FEFF bl Set_LTEC + 10561 .LVL923: + 415:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 10562 .loc 1 415 7 view .LVU3358 + 415:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 10563 .loc 1 415 31 is_stmt 0 view .LVU3359 + 10564 035a 3B89 ldrh r3, [r7, #8] + 415:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 10565 .loc 1 415 20 view .LVU3360 + 10566 035c 7E4C ldr r4, .L614+24 + 10567 035e 6380 strh r3, [r4, #2] @ movhi + 416:Src/main.c **** + 10568 .loc 1 416 7 is_stmt 1 view .LVU3361 + 416:Src/main.c **** + 10569 .loc 1 416 31 is_stmt 0 view .LVU3362 + 10570 0360 3389 ldrh r3, [r6, #8] + 416:Src/main.c **** + 10571 .loc 1 416 20 view .LVU3363 + 10572 0362 A380 strh r3, [r4, #4] @ movhi + 418:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 10573 .loc 1 418 7 is_stmt 1 view .LVU3364 + 10574 0364 B8F80C10 ldrh r1, [r8, #12] + 10575 0368 0120 movs r0, #1 + 10576 036a FFF7FEFF bl Set_LTEC + 10577 .LVL924: + 419:Src/main.c **** + 10578 .loc 1 419 7 view .LVU3365 + 10579 036e B9F80C10 ldrh r1, [r9, #12] + 10580 0372 0220 movs r0, #2 + 10581 0374 FFF7FEFF bl Set_LTEC + 10582 .LVL925: + 423:Src/main.c **** temp16 = Get_ADC(1); + 10583 .loc 1 423 7 view .LVU3366 + 423:Src/main.c **** temp16 = Get_ADC(1); + 10584 .loc 1 423 16 is_stmt 0 view .LVU3367 + 10585 0378 0020 movs r0, #0 + 10586 037a FFF7FEFF bl Get_ADC + 10587 .LVL926: + 423:Src/main.c **** temp16 = Get_ADC(1); + 10588 .loc 1 423 14 discriminator 1 view .LVU3368 + 10589 037e 2880 strh r0, [r5] @ movhi + 424:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 10590 .loc 1 424 7 is_stmt 1 view .LVU3369 + 424:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 10591 .loc 1 424 16 is_stmt 0 view .LVU3370 + 10592 0380 0120 movs r0, #1 + 10593 0382 FFF7FEFF bl Get_ADC + 10594 .LVL927: + 424:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 10595 .loc 1 424 14 discriminator 1 view .LVU3371 + 10596 0386 2880 strh r0, [r5] @ movhi + 425:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 588 + + + 10597 .loc 1 425 7 is_stmt 1 view .LVU3372 + 425:Src/main.c **** + 10598 .loc 1 425 20 is_stmt 0 view .LVU3373 + 10599 0388 E081 strh r0, [r4, #14] @ movhi + 428:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 10600 .loc 1 428 7 is_stmt 1 view .LVU3374 + 428:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 10601 .loc 1 428 16 is_stmt 0 view .LVU3375 + 10602 038a 0120 movs r0, #1 + 10603 038c FFF7FEFF bl Get_ADC + 10604 .LVL928: + 428:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 10605 .loc 1 428 14 discriminator 1 view .LVU3376 + 10606 0390 2880 strh r0, [r5] @ movhi + 429:Src/main.c **** + 10607 .loc 1 429 7 is_stmt 1 view .LVU3377 + 429:Src/main.c **** + 10608 .loc 1 429 20 is_stmt 0 view .LVU3378 + 10609 0392 2082 strh r0, [r4, #16] @ movhi + 432:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 10610 .loc 1 432 7 is_stmt 1 view .LVU3379 + 432:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 10611 .loc 1 432 16 is_stmt 0 view .LVU3380 + 10612 0394 0120 movs r0, #1 + 10613 0396 FFF7FEFF bl Get_ADC + 10614 .LVL929: + 432:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 10615 .loc 1 432 14 discriminator 1 view .LVU3381 + 10616 039a 2880 strh r0, [r5] @ movhi + 433:Src/main.c **** + 10617 .loc 1 433 7 is_stmt 1 view .LVU3382 + 433:Src/main.c **** + 10618 .loc 1 433 20 is_stmt 0 view .LVU3383 + 10619 039c 6082 strh r0, [r4, #18] @ movhi + 436:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 10620 .loc 1 436 7 is_stmt 1 view .LVU3384 + 436:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 10621 .loc 1 436 16 is_stmt 0 view .LVU3385 + 10622 039e 0120 movs r0, #1 + 10623 03a0 FFF7FEFF bl Get_ADC + 10624 .LVL930: + 436:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 10625 .loc 1 436 14 discriminator 1 view .LVU3386 + 10626 03a4 2880 strh r0, [r5] @ movhi + 437:Src/main.c **** + 10627 .loc 1 437 7 is_stmt 1 view .LVU3387 + 437:Src/main.c **** + 10628 .loc 1 437 21 is_stmt 0 view .LVU3388 + 10629 03a6 A082 strh r0, [r4, #20] @ movhi + 440:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 10630 .loc 1 440 7 is_stmt 1 view .LVU3389 + 440:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 10631 .loc 1 440 16 is_stmt 0 view .LVU3390 + 10632 03a8 0120 movs r0, #1 + 10633 03aa FFF7FEFF bl Get_ADC + 10634 .LVL931: + 440:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + ARM GAS /tmp/ccwR4KB7.s page 589 + + + 10635 .loc 1 440 14 discriminator 1 view .LVU3391 + 10636 03ae 2880 strh r0, [r5] @ movhi + 441:Src/main.c **** temp16 = Get_ADC(2); + 10637 .loc 1 441 7 is_stmt 1 view .LVU3392 + 441:Src/main.c **** temp16 = Get_ADC(2); + 10638 .loc 1 441 21 is_stmt 0 view .LVU3393 + 10639 03b0 E082 strh r0, [r4, #22] @ movhi + 442:Src/main.c **** + 10640 .loc 1 442 7 is_stmt 1 view .LVU3394 + 442:Src/main.c **** + 10641 .loc 1 442 16 is_stmt 0 view .LVU3395 + 10642 03b2 0220 movs r0, #2 + 10643 03b4 FFF7FEFF bl Get_ADC + 10644 .LVL932: + 442:Src/main.c **** + 10645 .loc 1 442 14 discriminator 1 view .LVU3396 + 10646 03b8 2880 strh r0, [r5] @ movhi + 445:Src/main.c **** temp16 = Get_ADC(4); + 10647 .loc 1 445 7 is_stmt 1 view .LVU3397 + 445:Src/main.c **** temp16 = Get_ADC(4); + 10648 .loc 1 445 16 is_stmt 0 view .LVU3398 + 10649 03ba 0320 movs r0, #3 + 10650 03bc FFF7FEFF bl Get_ADC + 10651 .LVL933: + 445:Src/main.c **** temp16 = Get_ADC(4); + 10652 .loc 1 445 14 discriminator 1 view .LVU3399 + 10653 03c0 2880 strh r0, [r5] @ movhi + 446:Src/main.c **** Long_Data[12] = temp16; + 10654 .loc 1 446 7 is_stmt 1 view .LVU3400 + 446:Src/main.c **** Long_Data[12] = temp16; + 10655 .loc 1 446 16 is_stmt 0 view .LVU3401 + 10656 03c2 0420 movs r0, #4 + 10657 03c4 FFF7FEFF bl Get_ADC + 10658 .LVL934: + 446:Src/main.c **** Long_Data[12] = temp16; + 10659 .loc 1 446 14 discriminator 1 view .LVU3402 + 10660 03c8 2880 strh r0, [r5] @ movhi + 447:Src/main.c **** temp16 = Get_ADC(5); + 10661 .loc 1 447 7 is_stmt 1 view .LVU3403 + 447:Src/main.c **** temp16 = Get_ADC(5); + 10662 .loc 1 447 21 is_stmt 0 view .LVU3404 + 10663 03ca 2083 strh r0, [r4, #24] @ movhi + 448:Src/main.c **** + 10664 .loc 1 448 7 is_stmt 1 view .LVU3405 + 448:Src/main.c **** + 10665 .loc 1 448 16 is_stmt 0 view .LVU3406 + 10666 03cc 0520 movs r0, #5 + 10667 03ce FFF7FEFF bl Get_ADC + 10668 .LVL935: + 448:Src/main.c **** + 10669 .loc 1 448 14 discriminator 1 view .LVU3407 + 10670 03d2 2880 strh r0, [r5] @ movhi + 451:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 10671 .loc 1 451 7 is_stmt 1 view .LVU3408 + 451:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 10672 .loc 1 451 16 is_stmt 0 view .LVU3409 + 10673 03d4 614B ldr r3, .L614+28 + ARM GAS /tmp/ccwR4KB7.s page 590 + + + 10674 03d6 1B68 ldr r3, [r3] + 10675 03d8 614A ldr r2, .L614+32 + 10676 03da 1360 str r3, [r2] + 452:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 10677 .loc 1 452 7 is_stmt 1 view .LVU3410 + 452:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 10678 .loc 1 452 20 is_stmt 0 view .LVU3411 + 10679 03dc E380 strh r3, [r4, #6] @ movhi + 453:Src/main.c **** + 10680 .loc 1 453 7 is_stmt 1 view .LVU3412 + 453:Src/main.c **** + 10681 .loc 1 453 31 is_stmt 0 view .LVU3413 + 10682 03de 1B0C lsrs r3, r3, #16 + 453:Src/main.c **** + 10683 .loc 1 453 20 view .LVU3414 + 10684 03e0 2381 strh r3, [r4, #8] @ movhi + 456:Src/main.c **** + 10685 .loc 1 456 7 is_stmt 1 view .LVU3415 + 456:Src/main.c **** + 10686 .loc 1 456 31 is_stmt 0 view .LVU3416 + 10687 03e2 3B88 ldrh r3, [r7] + 456:Src/main.c **** + 10688 .loc 1 456 20 view .LVU3417 + 10689 03e4 6381 strh r3, [r4, #10] @ movhi + 459:Src/main.c **** + 10690 .loc 1 459 7 is_stmt 1 view .LVU3418 + 459:Src/main.c **** + 10691 .loc 1 459 31 is_stmt 0 view .LVU3419 + 10692 03e6 3388 ldrh r3, [r6] + 459:Src/main.c **** + 10693 .loc 1 459 20 view .LVU3420 + 10694 03e8 A381 strh r3, [r4, #12] @ movhi + 461:Src/main.c **** { + 10695 .loc 1 461 7 is_stmt 1 view .LVU3421 + 461:Src/main.c **** { + 10696 .loc 1 461 21 is_stmt 0 view .LVU3422 + 10697 03ea 5E4B ldr r3, .L614+36 + 10698 03ec DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 + 461:Src/main.c **** { + 10699 .loc 1 461 10 view .LVU3423 + 10700 03ee 012B cmp r3, #1 + 10701 03f0 03D0 beq .L604 + 10702 .L557: + 468:Src/main.c **** } + 10703 .loc 1 468 7 is_stmt 1 view .LVU3424 + 468:Src/main.c **** } + 10704 .loc 1 468 21 is_stmt 0 view .LVU3425 + 10705 03f2 5D4B ldr r3, .L614+40 + 10706 03f4 0722 movs r2, #7 + 10707 03f6 1A70 strb r2, [r3] + 10708 03f8 7BE6 b .L540 + 10709 .L604: + 463:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 10710 .loc 1 463 8 is_stmt 1 view .LVU3426 + 463:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 10711 .loc 1 463 20 is_stmt 0 view .LVU3427 + 10712 03fa 0234 adds r4, r4, #2 + ARM GAS /tmp/ccwR4KB7.s page 591 + + + 10713 03fc 0D21 movs r1, #13 + 10714 03fe 2046 mov r0, r4 + 10715 0400 FFF7FEFF bl CalculateChecksum + 10716 .LVL936: + 10717 0404 0346 mov r3, r0 + 463:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 10718 .loc 1 463 18 discriminator 1 view .LVU3428 + 10719 0406 594A ldr r2, .L614+44 + 10720 0408 1080 strh r0, [r2] @ movhi + 464:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 10721 .loc 1 464 8 is_stmt 1 view .LVU3429 + 464:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 10722 .loc 1 464 27 is_stmt 0 view .LVU3430 + 10723 040a A01E subs r0, r4, #2 + 10724 040c 8383 strh r3, [r0, #28] @ movhi + 465:Src/main.c **** State_Data[0]|=temp16&0xff; + 10725 .loc 1 465 8 is_stmt 1 view .LVU3431 + 465:Src/main.c **** State_Data[0]|=temp16&0xff; + 10726 .loc 1 465 17 is_stmt 0 view .LVU3432 + 10727 040e FFF7FEFF bl SD_SAVE + 10728 .LVL937: + 10729 0412 0346 mov r3, r0 + 465:Src/main.c **** State_Data[0]|=temp16&0xff; + 10730 .loc 1 465 15 discriminator 1 view .LVU3433 + 10731 0414 2880 strh r0, [r5] @ movhi + 466:Src/main.c **** } + 10732 .loc 1 466 8 is_stmt 1 view .LVU3434 + 466:Src/main.c **** } + 10733 .loc 1 466 18 is_stmt 0 view .LVU3435 + 10734 0416 5649 ldr r1, .L614+48 + 10735 0418 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 466:Src/main.c **** } + 10736 .loc 1 466 21 view .LVU3436 + 10737 041a 1343 orrs r3, r3, r2 + 10738 041c 0B70 strb r3, [r1] + 10739 041e E8E7 b .L557 + 10740 .L541: + 472:Src/main.c **** { + 10741 .loc 1 472 6 is_stmt 1 view .LVU3437 + 472:Src/main.c **** { + 10742 .loc 1 472 10 is_stmt 0 view .LVU3438 + 10743 0420 544C ldr r4, .L614+52 + 10744 0422 0321 movs r1, #3 + 10745 0424 2046 mov r0, r4 + 10746 0426 FFF7FEFF bl CalculateChecksum + 10747 .LVL938: + 472:Src/main.c **** { + 10748 .loc 1 472 69 discriminator 1 view .LVU3439 + 10749 042a E388 ldrh r3, [r4, #6] + 472:Src/main.c **** { + 10750 .loc 1 472 9 discriminator 1 view .LVU3440 + 10751 042c 9842 cmp r0, r3 + 10752 042e 0CD0 beq .L605 + 531:Src/main.c **** } + 10753 .loc 1 531 7 is_stmt 1 view .LVU3441 + 531:Src/main.c **** } + 10754 .loc 1 531 17 is_stmt 0 view .LVU3442 + ARM GAS /tmp/ccwR4KB7.s page 592 + + + 10755 0430 4F4A ldr r2, .L614+48 + 10756 0432 1378 ldrb r3, [r2] @ zero_extendqisi2 + 531:Src/main.c **** } + 10757 .loc 1 531 21 view .LVU3443 + 10758 0434 43F00403 orr r3, r3, #4 + 10759 0438 1370 strb r3, [r2] + 10760 .L560: + 533:Src/main.c **** CPU_state = CPU_state_old; + 10761 .loc 1 533 6 is_stmt 1 view .LVU3444 + 533:Src/main.c **** CPU_state = CPU_state_old; + 10762 .loc 1 533 32 is_stmt 0 view .LVU3445 + 10763 043a 4F4B ldr r3, .L614+56 + 10764 043c 0122 movs r2, #1 + 10765 043e 1A70 strb r2, [r3] + 534:Src/main.c **** break; + 10766 .loc 1 534 6 is_stmt 1 view .LVU3446 + 534:Src/main.c **** break; + 10767 .loc 1 534 16 is_stmt 0 view .LVU3447 + 10768 0440 494B ldr r3, .L614+40 + 10769 0442 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 10770 0444 4D4B ldr r3, .L614+60 + 10771 0446 1A70 strb r2, [r3] + 535:Src/main.c **** case DECODE_TASK: + 10772 .loc 1 535 5 is_stmt 1 view .LVU3448 + 10773 0448 53E6 b .L540 + 10774 .L605: + 10775 .LBB666: + 474:Src/main.c **** uint16_t param0 = COMMAND[1]; + 10776 .loc 1 474 7 view .LVU3449 + 474:Src/main.c **** uint16_t param0 = COMMAND[1]; + 10777 .loc 1 474 16 is_stmt 0 view .LVU3450 + 10778 044a 2388 ldrh r3, [r4] + 10779 .LVL939: + 475:Src/main.c **** uint16_t param1 = COMMAND[2]; + 10780 .loc 1 475 7 is_stmt 1 view .LVU3451 + 475:Src/main.c **** uint16_t param1 = COMMAND[2]; + 10781 .loc 1 475 16 is_stmt 0 view .LVU3452 + 10782 044c 6588 ldrh r5, [r4, #2] + 10783 .LVL940: + 476:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 10784 .loc 1 476 7 is_stmt 1 view .LVU3453 + 476:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 10785 .loc 1 476 16 is_stmt 0 view .LVU3454 + 10786 044e A488 ldrh r4, [r4, #4] + 10787 .LVL941: + 477:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 10788 .loc 1 477 7 is_stmt 1 view .LVU3455 + 477:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 10789 .loc 1 477 15 is_stmt 0 view .LVU3456 + 10790 0450 03F00107 and r7, r3, #1 + 10791 .LVL942: + 478:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 10792 .loc 1 478 7 is_stmt 1 view .LVU3457 + 478:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 10793 .loc 1 478 15 is_stmt 0 view .LVU3458 + 10794 0454 C3F34006 ubfx r6, r3, #1, #1 + 10795 .LVL943: + ARM GAS /tmp/ccwR4KB7.s page 593 + + + 479:Src/main.c **** + 10796 .loc 1 479 7 is_stmt 1 view .LVU3459 + 481:Src/main.c **** { + 10797 .loc 1 481 7 view .LVU3460 + 481:Src/main.c **** { + 10798 .loc 1 481 10 is_stmt 0 view .LVU3461 + 10799 0458 13F0040F tst r3, #4 + 10800 045c 10D1 bne .L606 + 10801 .LBB667: + 494:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 10802 .loc 1 494 8 is_stmt 1 view .LVU3462 + 494:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 10803 .loc 1 494 16 is_stmt 0 view .LVU3463 + 10804 045e 06B1 cbz r6, .L561 + 494:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 10805 .loc 1 494 16 discriminator 1 view .LVU3464 + 10806 0460 0226 movs r6, #2 + 10807 .LVL944: + 10808 .L561: + 495:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 10809 .loc 1 495 8 is_stmt 1 view .LVU3465 + 495:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 10810 .loc 1 495 16 is_stmt 0 view .LVU3466 + 10811 0462 5FFA85F8 uxtb r8, r5 + 10812 .LVL945: + 496:Src/main.c **** uint16_t pat_period = param1; + 10813 .loc 1 496 8 is_stmt 1 view .LVU3467 + 496:Src/main.c **** uint16_t pat_period = param1; + 10814 .loc 1 496 16 is_stmt 0 view .LVU3468 + 10815 0466 C5F30329 ubfx r9, r5, #8, #4 + 10816 .LVL946: + 497:Src/main.c **** + 10817 .loc 1 497 8 is_stmt 1 view .LVU3469 + 499:Src/main.c **** { + 10818 .loc 1 499 8 view .LVU3470 + 499:Src/main.c **** { + 10819 .loc 1 499 11 is_stmt 0 view .LVU3471 + 10820 046a 2543 orrs r5, r5, r4 + 10821 .LVL947: + 499:Src/main.c **** { + 10822 .loc 1 499 11 view .LVU3472 + 10823 046c 25D0 beq .L594 + 507:Src/main.c **** { + 10824 .loc 1 507 9 is_stmt 1 view .LVU3473 + 507:Src/main.c **** { + 10825 .loc 1 507 12 is_stmt 0 view .LVU3474 + 10826 046e B8F1000F cmp r8, #0 + 10827 0472 1CD0 beq .L595 + 511:Src/main.c **** { + 10828 .loc 1 511 14 is_stmt 1 view .LVU3475 + 511:Src/main.c **** { + 10829 .loc 1 511 17 is_stmt 0 view .LVU3476 + 10830 0474 B8F13F0F cmp r8, #63 + 10831 0478 1BD9 bls .L563 + 513:Src/main.c **** } + 10832 .loc 1 513 19 view .LVU3477 + 10833 047a 4FF03F08 mov r8, #63 + ARM GAS /tmp/ccwR4KB7.s page 594 + + + 10834 .LVL948: + 513:Src/main.c **** } + 10835 .loc 1 513 19 view .LVU3478 + 10836 047e 18E0 b .L563 + 10837 .LVL949: + 10838 .L606: + 513:Src/main.c **** } + 10839 .loc 1 513 19 view .LVU3479 + 10840 .LBE667: + 10841 .LBB668: + 483:Src/main.c **** uint8_t hold = (uint8_t)(param1 & 0x0Fu); + 10842 .loc 1 483 8 is_stmt 1 view .LVU3480 + 484:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle); + 10843 .loc 1 484 8 view .LVU3481 + 484:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle); + 10844 .loc 1 484 16 is_stmt 0 view .LVU3482 + 10845 0480 04F00F04 and r4, r4, #15 + 10846 .LVL950: + 485:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10847 .loc 1 485 8 is_stmt 1 view .LVU3483 + 485:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10848 .loc 1 485 30 is_stmt 0 view .LVU3484 + 10849 0484 3346 mov r3, r6 + 10850 .LVL951: + 485:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10851 .loc 1 485 30 view .LVU3485 + 10852 0486 2246 mov r2, r4 + 10853 0488 2946 mov r1, r5 + 10854 048a 3846 mov r0, r7 + 10855 048c FFF7FEFF bl AD9102_ApplySram + 10856 .LVL952: + 486:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 10857 .loc 1 486 8 is_stmt 1 view .LVU3486 + 486:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 10858 .loc 1 486 22 is_stmt 0 view .LVU3487 + 10859 0490 374B ldr r3, .L614+48 + 10860 0492 5870 strb r0, [r3, #1] + 487:Src/main.c **** { + 10861 .loc 1 487 8 is_stmt 1 view .LVU3488 + 487:Src/main.c **** { + 10862 .loc 1 487 12 is_stmt 0 view .LVU3489 + 10863 0494 2346 mov r3, r4 + 10864 0496 2A46 mov r2, r5 + 10865 0498 3946 mov r1, r7 + 10866 049a FFF7FEFF bl AD9102_CheckFlagsSram + 10867 .LVL953: + 487:Src/main.c **** { + 10868 .loc 1 487 11 discriminator 1 view .LVU3490 + 10869 049e 0028 cmp r0, #0 + 10870 04a0 CBD0 beq .L560 + 489:Src/main.c **** } + 10871 .loc 1 489 9 is_stmt 1 view .LVU3491 + 489:Src/main.c **** } + 10872 .loc 1 489 19 is_stmt 0 view .LVU3492 + 10873 04a2 334A ldr r2, .L614+48 + 10874 04a4 1378 ldrb r3, [r2] @ zero_extendqisi2 + 489:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 595 + + + 10875 .loc 1 489 23 view .LVU3493 + 10876 04a6 63F07F03 orn r3, r3, #127 + 10877 04aa 1370 strb r3, [r2] + 10878 04ac C5E7 b .L560 + 10879 .LVL954: + 10880 .L595: + 489:Src/main.c **** } + 10881 .loc 1 489 23 view .LVU3494 + 10882 .LBE668: + 10883 .LBB669: + 509:Src/main.c **** } + 10884 .loc 1 509 19 view .LVU3495 + 10885 04ae 4FF00108 mov r8, #1 + 10886 .LVL955: + 10887 .L563: + 515:Src/main.c **** { + 10888 .loc 1 515 9 is_stmt 1 view .LVU3496 + 515:Src/main.c **** { + 10889 .loc 1 515 12 is_stmt 0 view .LVU3497 + 10890 04b2 44B9 cbnz r4, .L562 + 517:Src/main.c **** } + 10891 .loc 1 517 21 view .LVU3498 + 10892 04b4 4FF6FF74 movw r4, #65535 + 10893 .LVL956: + 517:Src/main.c **** } + 10894 .loc 1 517 21 view .LVU3499 + 10895 04b8 05E0 b .L562 + 10896 .LVL957: + 10897 .L594: + 503:Src/main.c **** } + 10898 .loc 1 503 20 view .LVU3500 + 10899 04ba 4FF6FF74 movw r4, #65535 + 10900 .LVL958: + 502:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 10901 .loc 1 502 18 view .LVU3501 + 10902 04be 4FF00209 mov r9, #2 + 10903 .LVL959: + 501:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 10904 .loc 1 501 18 view .LVU3502 + 10905 04c2 4FF00108 mov r8, #1 + 10906 .LVL960: + 10907 .L562: + 521:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10908 .loc 1 521 8 is_stmt 1 view .LVU3503 + 521:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10909 .loc 1 521 30 is_stmt 0 view .LVU3504 + 10910 04c6 0094 str r4, [sp] + 10911 04c8 4B46 mov r3, r9 + 10912 .LVL961: + 521:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10913 .loc 1 521 30 view .LVU3505 + 10914 04ca 4246 mov r2, r8 + 10915 04cc 3946 mov r1, r7 + 10916 04ce 3046 mov r0, r6 + 10917 04d0 FFF7FEFF bl AD9102_Apply + 10918 .LVL962: + 522:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + ARM GAS /tmp/ccwR4KB7.s page 596 + + + 10919 .loc 1 522 8 is_stmt 1 view .LVU3506 + 522:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 10920 .loc 1 522 22 is_stmt 0 view .LVU3507 + 10921 04d4 264B ldr r3, .L614+48 + 10922 04d6 5870 strb r0, [r3, #1] + 523:Src/main.c **** { + 10923 .loc 1 523 8 is_stmt 1 view .LVU3508 + 523:Src/main.c **** { + 10924 .loc 1 523 12 is_stmt 0 view .LVU3509 + 10925 04d8 0194 str r4, [sp, #4] + 10926 04da CDF80090 str r9, [sp] + 10927 04de 4346 mov r3, r8 + 10928 04e0 3246 mov r2, r6 + 10929 04e2 3946 mov r1, r7 + 10930 04e4 FFF7FEFF bl AD9102_CheckFlags + 10931 .LVL963: + 523:Src/main.c **** { + 10932 .loc 1 523 11 discriminator 1 view .LVU3510 + 10933 04e8 0028 cmp r0, #0 + 10934 04ea A6D0 beq .L560 + 525:Src/main.c **** } + 10935 .loc 1 525 9 is_stmt 1 view .LVU3511 + 525:Src/main.c **** } + 10936 .loc 1 525 19 is_stmt 0 view .LVU3512 + 10937 04ec 204A ldr r2, .L614+48 + 10938 04ee 1378 ldrb r3, [r2] @ zero_extendqisi2 + 525:Src/main.c **** } + 10939 .loc 1 525 23 view .LVU3513 + 10940 04f0 63F07F03 orn r3, r3, #127 + 10941 04f4 1370 strb r3, [r2] + 10942 04f6 A0E7 b .L560 + 10943 .LVL964: + 10944 .L544: + 525:Src/main.c **** } + 10945 .loc 1 525 23 view .LVU3514 + 10946 .LBE669: + 10947 .LBE666: + 537:Src/main.c **** { + 10948 .loc 1 537 6 is_stmt 1 view .LVU3515 + 537:Src/main.c **** { + 10949 .loc 1 537 10 is_stmt 0 view .LVU3516 + 10950 04f8 1E48 ldr r0, .L614+52 + 10951 04fa FFF7FEFF bl CheckChecksum + 10952 .LVL965: + 537:Src/main.c **** { + 10953 .loc 1 537 9 discriminator 1 view .LVU3517 + 10954 04fe 70B9 cbnz r0, .L607 + 546:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10955 .loc 1 546 7 is_stmt 1 view .LVU3518 + 546:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10956 .loc 1 546 17 is_stmt 0 view .LVU3519 + 10957 0500 1B4A ldr r2, .L614+48 + 10958 0502 1378 ldrb r3, [r2] @ zero_extendqisi2 + 546:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10959 .loc 1 546 21 view .LVU3520 + 10960 0504 43F00403 orr r3, r3, #4 + 10961 0508 1370 strb r3, [r2] + ARM GAS /tmp/ccwR4KB7.s page 597 + + + 547:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10962 .loc 1 547 7 is_stmt 1 view .LVU3521 + 547:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10963 .loc 1 547 17 is_stmt 0 view .LVU3522 + 10964 050a 1C4B ldr r3, .L614+60 + 10965 050c 0222 movs r2, #2 + 10966 050e 1A70 strb r2, [r3] + 548:Src/main.c **** } + 10967 .loc 1 548 7 is_stmt 1 view .LVU3523 + 548:Src/main.c **** } + 10968 .loc 1 548 21 is_stmt 0 view .LVU3524 + 10969 0510 154B ldr r3, .L614+40 + 10970 0512 0022 movs r2, #0 + 10971 0514 1A70 strb r2, [r3] + 10972 .L565: + 550:Src/main.c **** break; + 10973 .loc 1 550 6 is_stmt 1 view .LVU3525 + 550:Src/main.c **** break; + 10974 .loc 1 550 32 is_stmt 0 view .LVU3526 + 10975 0516 184B ldr r3, .L614+56 + 10976 0518 0122 movs r2, #1 + 10977 051a 1A70 strb r2, [r3] + 551:Src/main.c **** case RUN_TASK: + 10978 .loc 1 551 5 is_stmt 1 view .LVU3527 + 10979 051c E9E5 b .L540 + 10980 .L607: + 539:Src/main.c **** TO6_before = TO6; + 10981 .loc 1 539 7 view .LVU3528 + 10982 051e 114B ldr r3, .L614+36 + 10983 0520 174A ldr r2, .L614+64 + 10984 0522 1849 ldr r1, .L614+68 + 10985 0524 1348 ldr r0, .L614+52 + 10986 0526 FFF7FEFF bl Decode_task + 10987 .LVL966: + 540:Src/main.c **** CPU_state = RUN_TASK; + 10988 .loc 1 540 7 view .LVU3529 + 540:Src/main.c **** CPU_state = RUN_TASK; + 10989 .loc 1 540 18 is_stmt 0 view .LVU3530 + 10990 052a 0C4B ldr r3, .L614+28 + 10991 052c 1A68 ldr r2, [r3] + 10992 052e 164B ldr r3, .L614+72 + 10993 0530 1A60 str r2, [r3] + 541:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 10994 .loc 1 541 7 is_stmt 1 view .LVU3531 + 541:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 10995 .loc 1 541 17 is_stmt 0 view .LVU3532 + 10996 0532 0923 movs r3, #9 + 10997 0534 114A ldr r2, .L614+60 + 10998 0536 1370 strb r3, [r2] + 542:Src/main.c **** } + 10999 .loc 1 542 7 is_stmt 1 view .LVU3533 + 542:Src/main.c **** } + 11000 .loc 1 542 21 is_stmt 0 view .LVU3534 + 11001 0538 0B4A ldr r2, .L614+40 + 11002 053a 1370 strb r3, [r2] + 11003 053c EBE7 b .L565 + 11004 .L615: + ARM GAS /tmp/ccwR4KB7.s page 598 + + + 11005 053e 00BF .align 2 + 11006 .L614: + 11007 0540 00000000 .word task + 11008 0544 00000000 .word TO7 + 11009 0548 00000000 .word TO7_before + 11010 054c 00000000 .word LD1_param + 11011 0550 00000000 .word LD2_param + 11012 0554 00000000 .word temp16 + 11013 0558 00000000 .word Long_Data + 11014 055c 00000000 .word TO6 + 11015 0560 00000000 .word TO6_stop + 11016 0564 00000000 .word Curr_setup + 11017 0568 00000000 .word CPU_state_old + 11018 056c 00000000 .word CS_result + 11019 0570 00000000 .word State_Data + 11020 0574 00000000 .word COMMAND + 11021 0578 00000000 .word UART_transmission_request + 11022 057c 00000000 .word CPU_state + 11023 0580 00000000 .word LD2_curr_setup + 11024 0584 00000000 .word LD1_curr_setup + 11025 0588 00000000 .word TO6_before + 11026 .L543: + 553:Src/main.c **** { + 11027 .loc 1 553 6 is_stmt 1 view .LVU3535 + 553:Src/main.c **** { + 11028 .loc 1 553 18 is_stmt 0 view .LVU3536 + 11029 058c 864B ldr r3, .L616 + 11030 058e 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 11031 0590 012B cmp r3, #1 + 11032 0592 23D0 beq .L566 + 11033 0594 022B cmp r3, #2 + 11034 0596 00F03181 beq .L567 + 11035 .L568: + 808:Src/main.c **** { + 11036 .loc 1 808 6 is_stmt 1 view .LVU3537 + 808:Src/main.c **** { + 11037 .loc 1 808 13 is_stmt 0 view .LVU3538 + 11038 059a 844B ldr r3, .L616+4 + 11039 059c 1B68 ldr r3, [r3] + 11040 059e 844A ldr r2, .L616+8 + 11041 05a0 1268 ldr r2, [r2] + 808:Src/main.c **** { + 11042 .loc 1 808 9 view .LVU3539 + 11043 05a2 9342 cmp r3, r2 + 11044 05a4 00F2D881 bhi .L608 + 11045 .L585: + 860:Src/main.c **** + 11046 .loc 1 860 13 is_stmt 1 discriminator 1 view .LVU3540 + 11047 05a8 824B ldr r3, .L616+12 + 11048 05aa 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 11049 05ac 002B cmp r3, #0 + 11050 05ae FBD0 beq .L585 + 862:Src/main.c **** + 11051 .loc 1 862 6 view .LVU3541 + 11052 05b0 FFF7FEFF bl Stop_TIM10 + 11053 .LVL967: + 864:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 599 + + + 11054 .loc 1 864 6 view .LVU3542 + 864:Src/main.c **** { + 11055 .loc 1 864 14 is_stmt 0 view .LVU3543 + 11056 05b4 7C4B ldr r3, .L616 + 11057 05b6 DB8A ldrh r3, [r3, #22] + 864:Src/main.c **** { + 11058 .loc 1 864 9 view .LVU3544 + 11059 05b8 032B cmp r3, #3 + 11060 05ba 0BD9 bls .L586 + 866:Src/main.c **** TO10_counter = task.dt / 10; + 11061 .loc 1 866 7 is_stmt 1 view .LVU3545 + 866:Src/main.c **** TO10_counter = task.dt / 10; + 11062 .loc 1 866 26 is_stmt 0 view .LVU3546 + 11063 05bc 7E4B ldr r3, .L616+16 + 11064 05be 1A68 ldr r2, [r3] + 11065 05c0 7E4B ldr r3, .L616+20 + 11066 05c2 DA60 str r2, [r3, #12] + 867:Src/main.c **** } + 11067 .loc 1 867 7 is_stmt 1 view .LVU3547 + 867:Src/main.c **** } + 11068 .loc 1 867 26 is_stmt 0 view .LVU3548 + 11069 05c4 784B ldr r3, .L616 + 11070 05c6 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 + 867:Src/main.c **** } + 11071 .loc 1 867 30 view .LVU3549 + 11072 05c8 7D4A ldr r2, .L616+24 + 11073 05ca A2FB0323 umull r2, r3, r2, r3 + 11074 05ce DB08 lsrs r3, r3, #3 + 867:Src/main.c **** } + 11075 .loc 1 867 20 view .LVU3550 + 11076 05d0 7C4A ldr r2, .L616+28 + 11077 05d2 1360 str r3, [r2] + 11078 .L586: + 870:Src/main.c **** break; + 11079 .loc 1 870 6 is_stmt 1 view .LVU3551 + 870:Src/main.c **** break; + 11080 .loc 1 870 20 is_stmt 0 view .LVU3552 + 11081 05d4 7C4B ldr r3, .L616+32 + 11082 05d6 0922 movs r2, #9 + 11083 05d8 1A70 strb r2, [r3] + 871:Src/main.c **** } + 11084 .loc 1 871 9 is_stmt 1 view .LVU3553 + 11085 05da 8AE5 b .L540 + 11086 .L566: + 11087 .LBB670: + 575:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 11088 .loc 1 575 7 view .LVU3554 + 575:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 11089 .loc 1 575 38 is_stmt 0 view .LVU3555 + 11090 05dc 724B ldr r3, .L616 + 11091 05de D3ED077A vldr.32 s15, [r3, #28] + 575:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 11092 .loc 1 575 7 view .LVU3556 + 11093 05e2 FCEEE77A vcvt.u32.f32 s15, s15 + 11094 05e6 17EE903A vmov r3, s15 @ int + 11095 05ea 99B2 uxth r1, r3 + 11096 05ec 0220 movs r0, #2 + ARM GAS /tmp/ccwR4KB7.s page 600 + + + 11097 05ee FFF7FEFF bl Set_LTEC + 11098 .LVL968: + 576:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 11099 .loc 1 576 7 is_stmt 1 view .LVU3557 + 576:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 11100 .loc 1 576 14 is_stmt 0 view .LVU3558 + 11101 05f2 0320 movs r0, #3 + 11102 05f4 FFF7FEFF bl MPhD_T + 11103 .LVL969: + 577:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 11104 .loc 1 577 7 is_stmt 1 view .LVU3559 + 577:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 11105 .loc 1 577 32 is_stmt 0 view .LVU3560 + 11106 05f8 0320 movs r0, #3 + 11107 05fa FFF7FEFF bl MPhD_T + 11108 .LVL970: + 577:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 11109 .loc 1 577 30 discriminator 1 view .LVU3561 + 11110 05fe 734C ldr r4, .L616+36 + 11111 0600 2080 strh r0, [r4] @ movhi + 578:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 11112 .loc 1 578 7 is_stmt 1 view .LVU3562 + 578:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 11113 .loc 1 578 14 is_stmt 0 view .LVU3563 + 11114 0602 0420 movs r0, #4 + 11115 0604 FFF7FEFF bl MPhD_T + 11116 .LVL971: + 579:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11117 .loc 1 579 7 is_stmt 1 view .LVU3564 + 579:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11118 .loc 1 579 32 is_stmt 0 view .LVU3565 + 11119 0608 0420 movs r0, #4 + 11120 060a FFF7FEFF bl MPhD_T + 11121 .LVL972: + 579:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11122 .loc 1 579 30 discriminator 1 view .LVU3566 + 11123 060e 704D ldr r5, .L616+40 + 11124 0610 2880 strh r0, [r5] @ movhi + 580:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 11125 .loc 1 580 7 is_stmt 1 view .LVU3567 + 580:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 11126 .loc 1 580 14 is_stmt 0 view .LVU3568 + 11127 0612 0122 movs r2, #1 + 11128 0614 2146 mov r1, r4 + 11129 0616 6F48 ldr r0, .L616+44 + 11130 0618 FFF7FEFF bl PID_Controller_Temp + 11131 .LVL973: + 11132 061c 0146 mov r1, r0 + 580:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 11133 .loc 1 580 13 discriminator 1 view .LVU3569 + 11134 061e 6E4C ldr r4, .L616+48 + 11135 0620 2080 strh r0, [r4] @ movhi + 581:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 11136 .loc 1 581 7 is_stmt 1 view .LVU3570 + 11137 0622 0320 movs r0, #3 + 11138 0624 FFF7FEFF bl Set_LTEC + 11139 .LVL974: + ARM GAS /tmp/ccwR4KB7.s page 601 + + + 582:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 11140 .loc 1 582 7 view .LVU3571 + 582:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 11141 .loc 1 582 14 is_stmt 0 view .LVU3572 + 11142 0628 0222 movs r2, #2 + 11143 062a 2946 mov r1, r5 + 11144 062c 6B48 ldr r0, .L616+52 + 11145 062e FFF7FEFF bl PID_Controller_Temp + 11146 .LVL975: + 11147 0632 0146 mov r1, r0 + 582:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 11148 .loc 1 582 13 discriminator 1 view .LVU3573 + 11149 0634 2080 strh r0, [r4] @ movhi + 583:Src/main.c **** + 11150 .loc 1 583 7 is_stmt 1 view .LVU3574 + 11151 0636 0420 movs r0, #4 + 11152 0638 FFF7FEFF bl Set_LTEC + 11153 .LVL976: + 586:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11154 .loc 1 586 7 view .LVU3575 + 11155 063c 684C ldr r4, .L616+56 + 11156 063e 0122 movs r2, #1 + 11157 0640 8021 movs r1, #128 + 11158 0642 2046 mov r0, r4 + 11159 0644 FFF7FEFF bl HAL_GPIO_WritePin + 11160 .LVL977: + 587:Src/main.c **** + 11161 .loc 1 587 7 view .LVU3576 + 11162 0648 0022 movs r2, #0 + 11163 064a 8021 movs r1, #128 + 11164 064c 2046 mov r0, r4 + 11165 064e FFF7FEFF bl HAL_GPIO_WritePin + 11166 .LVL978: + 589:Src/main.c **** if (st != HAL_OK) + 11167 .loc 1 589 7 view .LVU3577 + 589:Src/main.c **** if (st != HAL_OK) + 11168 .loc 1 589 12 is_stmt 0 view .LVU3578 + 11169 0652 5A48 ldr r0, .L616+20 + 11170 0654 FFF7FEFF bl HAL_TIM_Base_Start_IT + 11171 .LVL979: + 590:Src/main.c **** while(1); + 11172 .loc 1 590 7 is_stmt 1 view .LVU3579 + 590:Src/main.c **** while(1); + 11173 .loc 1 590 10 is_stmt 0 view .LVU3580 + 11174 0658 0028 cmp r0, #0 + 11175 065a 75D1 bne .L570 + 593:Src/main.c **** uint16_t trigger_counter = 0; + 11176 .loc 1 593 7 is_stmt 1 view .LVU3581 + 11177 .LVL980: + 594:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 11178 .loc 1 594 7 view .LVU3582 + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11179 .loc 1 595 7 view .LVU3583 + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11180 .loc 1 595 47 is_stmt 0 view .LVU3584 + 11181 065c 524B ldr r3, .L616 + 11182 065e 93ED027A vldr.32 s14, [r3, #8] + ARM GAS /tmp/ccwR4KB7.s page 602 + + + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11183 .loc 1 595 64 view .LVU3585 + 11184 0662 D3ED047A vldr.32 s15, [r3, #16] + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11185 .loc 1 595 58 view .LVU3586 + 11186 0666 37EE677A vsub.f32 s14, s14, s15 + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11187 .loc 1 595 84 view .LVU3587 + 11188 066a D3ED036A vldr.32 s13, [r3, #12] + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11189 .loc 1 595 79 view .LVU3588 + 11190 066e C7EE267A vdiv.f32 s15, s14, s13 + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11191 .loc 1 595 97 view .LVU3589 + 11192 0672 B2EE047A vmov.f32 s14, #1.0e+1 + 11193 0676 67EE877A vmul.f32 s15, s15, s14 + 595:Src/main.c **** uint16_t task_sheduler = 0; + 11194 .loc 1 595 31 view .LVU3590 + 11195 067a FCEEE77A vcvt.u32.f32 s15, s15 + 11196 067e CDED037A vstr.32 s15, [sp, #12] @ int + 11197 0682 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2 + 11198 .LVL981: + 596:Src/main.c **** + 11199 .loc 1 596 7 is_stmt 1 view .LVU3591 + 600:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 11200 .loc 1 600 7 view .LVU3592 + 11201 0686 DFF86891 ldr r9, .L616+72 + 11202 068a 0021 movs r1, #0 + 11203 068c 4846 mov r0, r9 + 11204 .LVL982: + 600:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 11205 .loc 1 600 7 is_stmt 0 view .LVU3593 + 11206 068e FFF7FEFF bl HAL_TIM_PWM_Stop + 11207 .LVL983: + 601:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 11208 .loc 1 601 7 is_stmt 1 view .LVU3594 + 11209 0692 DFF86081 ldr r8, .L616+76 + 11210 0696 0821 movs r1, #8 + 11211 0698 4046 mov r0, r8 + 11212 069a FFF7FEFF bl HAL_TIM_PWM_Stop + 11213 .LVL984: + 602:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 11214 .loc 1 602 7 view .LVU3595 + 602:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 11215 .loc 1 602 13 is_stmt 0 view .LVU3596 + 11216 069e 514F ldr r7, .L616+60 + 11217 06a0 3B68 ldr r3, [r7] + 602:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 11218 .loc 1 602 20 view .LVU3597 + 11219 06a2 23F00803 bic r3, r3, #8 + 11220 06a6 3B60 str r3, [r7] + 603:Src/main.c **** + 11221 .loc 1 603 7 is_stmt 1 view .LVU3598 + 603:Src/main.c **** + 11222 .loc 1 603 12 is_stmt 0 view .LVU3599 + 11223 06a8 4F4D ldr r5, .L616+64 + 11224 06aa 2B68 ldr r3, [r5] + ARM GAS /tmp/ccwR4KB7.s page 603 + + + 603:Src/main.c **** + 11225 .loc 1 603 19 view .LVU3600 + 11226 06ac 23F00803 bic r3, r3, #8 + 11227 06b0 2B60 str r3, [r5] + 607:Src/main.c **** TIM4 -> CNT = 0; + 11228 .loc 1 607 7 is_stmt 1 view .LVU3601 + 607:Src/main.c **** TIM4 -> CNT = 0; + 11229 .loc 1 607 20 is_stmt 0 view .LVU3602 + 11230 06b2 0024 movs r4, #0 + 11231 06b4 7C62 str r4, [r7, #36] + 608:Src/main.c **** + 11232 .loc 1 608 7 is_stmt 1 view .LVU3603 + 608:Src/main.c **** + 11233 .loc 1 608 19 is_stmt 0 view .LVU3604 + 11234 06b6 6C62 str r4, [r5, #36] + 610:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 11235 .loc 1 610 7 is_stmt 1 view .LVU3605 + 11236 06b8 2146 mov r1, r4 + 11237 06ba 4846 mov r0, r9 + 11238 06bc FFF7FEFF bl HAL_TIM_PWM_Start + 11239 .LVL985: + 611:Src/main.c **** //TIM4 -> CNT = 0; + 11240 .loc 1 611 7 view .LVU3606 + 11241 06c0 0821 movs r1, #8 + 11242 06c2 4046 mov r0, r8 + 11243 06c4 FFF7FEFF bl HAL_TIM_PWM_Start + 11244 .LVL986: + 614:Src/main.c **** TIM11 -> CNT = 0; + 11245 .loc 1 614 7 view .LVU3607 + 614:Src/main.c **** TIM11 -> CNT = 0; + 11246 .loc 1 614 26 is_stmt 0 view .LVU3608 + 11247 06c8 EB6A ldr r3, [r5, #44] + 614:Src/main.c **** TIM11 -> CNT = 0; + 11248 .loc 1 614 33 view .LVU3609 + 11249 06ca 143B subs r3, r3, #20 + 614:Src/main.c **** TIM11 -> CNT = 0; + 11250 .loc 1 614 19 view .LVU3610 + 11251 06cc 6B62 str r3, [r5, #36] + 615:Src/main.c **** + 11252 .loc 1 615 7 is_stmt 1 view .LVU3611 + 615:Src/main.c **** + 11253 .loc 1 615 20 is_stmt 0 view .LVU3612 + 11254 06ce 7C62 str r4, [r7, #36] + 618:Src/main.c **** { + 11255 .loc 1 618 7 is_stmt 1 view .LVU3613 + 594:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 11256 .loc 1 594 16 is_stmt 0 view .LVU3614 + 11257 06d0 2546 mov r5, r4 + 11258 .LVL987: + 11259 .L572: + 618:Src/main.c **** { + 11260 .loc 1 618 33 is_stmt 1 view .LVU3615 + 618:Src/main.c **** { + 11261 .loc 1 618 18 is_stmt 0 view .LVU3616 + 11262 06d2 354B ldr r3, .L616 + 11263 06d4 D3ED047A vldr.32 s15, [r3, #16] + 618:Src/main.c **** { + ARM GAS /tmp/ccwR4KB7.s page 604 + + + 11264 .loc 1 618 39 view .LVU3617 + 11265 06d8 93ED027A vldr.32 s14, [r3, #8] + 618:Src/main.c **** { + 11266 .loc 1 618 33 view .LVU3618 + 11267 06dc F4EEC77A vcmpe.f32 s15, s14 + 11268 06e0 F1EE10FA vmrs APSR_nzcv, FPSCR + 11269 06e4 37D5 bpl .L609 + 620:Src/main.c **** { + 11270 .loc 1 620 8 is_stmt 1 view .LVU3619 + 620:Src/main.c **** { + 11271 .loc 1 620 12 is_stmt 0 view .LVU3620 + 11272 06e6 334B ldr r3, .L616+12 + 11273 06e8 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 620:Src/main.c **** { + 11274 .loc 1 620 11 view .LVU3621 + 11275 06ea 002B cmp r3, #0 + 11276 06ec F1D0 beq .L572 + 622:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 11277 .loc 1 622 9 is_stmt 1 view .LVU3622 + 11278 06ee FCEEE77A vcvt.u32.f32 s15, s15 + 11279 06f2 17EE903A vmov r3, s15 @ int + 11280 06f6 99B2 uxth r1, r3 + 11281 06f8 0120 movs r0, #1 + 11282 06fa FFF7FEFF bl Set_LTEC + 11283 .LVL988: + 625:Src/main.c **** TO10 = 0; + 11284 .loc 1 625 9 view .LVU3623 + 625:Src/main.c **** TO10 = 0; + 11285 .loc 1 625 13 is_stmt 0 view .LVU3624 + 11286 06fe 2A4B ldr r3, .L616 + 11287 0700 D3ED047A vldr.32 s15, [r3, #16] + 625:Src/main.c **** TO10 = 0; + 11288 .loc 1 625 35 view .LVU3625 + 11289 0704 93ED037A vldr.32 s14, [r3, #12] + 625:Src/main.c **** TO10 = 0; + 11290 .loc 1 625 28 view .LVU3626 + 11291 0708 77EE877A vadd.f32 s15, s15, s14 + 11292 070c C3ED047A vstr.32 s15, [r3, #16] + 626:Src/main.c **** TIM10_coflag = 0; + 11293 .loc 1 626 9 is_stmt 1 view .LVU3627 + 626:Src/main.c **** TIM10_coflag = 0; + 11294 .loc 1 626 14 is_stmt 0 view .LVU3628 + 11295 0710 0027 movs r7, #0 + 11296 0712 364B ldr r3, .L616+68 + 11297 0714 1F60 str r7, [r3] + 627:Src/main.c **** + 11298 .loc 1 627 9 is_stmt 1 view .LVU3629 + 627:Src/main.c **** + 11299 .loc 1 627 22 is_stmt 0 view .LVU3630 + 11300 0716 274B ldr r3, .L616+12 + 11301 0718 1F70 strb r7, [r3] + 629:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 11302 .loc 1 629 9 is_stmt 1 view .LVU3631 + 11303 071a DFF8DC80 ldr r8, .L616+80 + 11304 071e 0122 movs r2, #1 + 11305 0720 4FF40071 mov r1, #512 + 11306 0724 4046 mov r0, r8 + ARM GAS /tmp/ccwR4KB7.s page 605 + + + 11307 0726 FFF7FEFF bl HAL_GPIO_WritePin + 11308 .LVL989: + 630:Src/main.c **** //* + 11309 .loc 1 630 9 view .LVU3632 + 11310 072a 3A46 mov r2, r7 + 11311 072c 4FF40071 mov r1, #512 + 11312 0730 4046 mov r0, r8 + 11313 0732 FFF7FEFF bl HAL_GPIO_WritePin + 11314 .LVL990: + 632:Src/main.c **** OUT_trigger(trigger_counter); + 11315 .loc 1 632 9 view .LVU3633 + 632:Src/main.c **** OUT_trigger(trigger_counter); + 11316 .loc 1 632 41 is_stmt 0 view .LVU3634 + 11317 0736 B4FBF6F3 udiv r3, r4, r6 + 11318 073a 06FB1343 mls r3, r6, r3, r4 + 11319 073e 9BB2 uxth r3, r3 + 632:Src/main.c **** OUT_trigger(trigger_counter); + 11320 .loc 1 632 12 view .LVU3635 + 11321 0740 1BB1 cbz r3, .L610 + 11322 .L573: + 636:Src/main.c **** //*/ + 11323 .loc 1 636 9 is_stmt 1 view .LVU3636 + 11324 0742 0134 adds r4, r4, #1 + 11325 .LVL991: + 636:Src/main.c **** //*/ + 11326 .loc 1 636 9 is_stmt 0 view .LVU3637 + 11327 0744 A4B2 uxth r4, r4 + 11328 .LVL992: + 636:Src/main.c **** //*/ + 11329 .loc 1 636 9 view .LVU3638 + 11330 0746 C4E7 b .L572 + 11331 .LVL993: + 11332 .L570: + 591:Src/main.c **** + 11333 .loc 1 591 8 is_stmt 1 view .LVU3639 + 591:Src/main.c **** + 11334 .loc 1 591 13 view .LVU3640 + 11335 0748 FEE7 b .L570 + 11336 .LVL994: + 11337 .L610: + 633:Src/main.c **** ++trigger_counter; + 11338 .loc 1 633 10 view .LVU3641 + 11339 074a E8B2 uxtb r0, r5 + 11340 074c FFF7FEFF bl OUT_trigger + 11341 .LVL995: + 634:Src/main.c **** } + 11342 .loc 1 634 10 view .LVU3642 + 11343 0750 0135 adds r5, r5, #1 + 11344 .LVL996: + 634:Src/main.c **** } + 11345 .loc 1 634 10 is_stmt 0 view .LVU3643 + 11346 0752 ADB2 uxth r5, r5 + 11347 .LVL997: + 634:Src/main.c **** } + 11348 .loc 1 634 10 view .LVU3644 + 11349 0754 F5E7 b .L573 + 11350 .L609: + ARM GAS /tmp/ccwR4KB7.s page 606 + + + 661:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 11351 .loc 1 661 7 is_stmt 1 view .LVU3645 + 661:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 11352 .loc 1 661 13 is_stmt 0 view .LVU3646 + 11353 0756 234A ldr r2, .L616+60 + 11354 0758 D368 ldr r3, [r2, #12] + 661:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 11355 .loc 1 661 21 view .LVU3647 + 11356 075a 43F00103 orr r3, r3, #1 + 11357 075e D360 str r3, [r2, #12] + 671:Src/main.c **** + 11358 .loc 1 671 7 is_stmt 1 view .LVU3648 + 11359 0760 FFF7FEFF bl Stop_TIM10 + 11360 .LVL998: + 673:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 11361 .loc 1 673 7 view .LVU3649 + 673:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 11362 .loc 1 673 32 is_stmt 0 view .LVU3650 + 11363 0764 104C ldr r4, .L616 + 11364 .LVL999: + 673:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 11365 .loc 1 673 32 view .LVU3651 + 11366 0766 D4ED017A vldr.32 s15, [r4, #4] + 673:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 11367 .loc 1 673 26 view .LVU3652 + 11368 076a C4ED047A vstr.32 s15, [r4, #16] + 674:Src/main.c **** if (task.tau > 3) + 11369 .loc 1 674 7 is_stmt 1 view .LVU3653 + 11370 076e FCEEE77A vcvt.u32.f32 s15, s15 + 11371 0772 17EE903A vmov r3, s15 @ int + 11372 0776 99B2 uxth r1, r3 + 11373 0778 0120 movs r0, #1 + 11374 077a FFF7FEFF bl Set_LTEC + 11375 .LVL1000: + 675:Src/main.c **** { + 11376 .loc 1 675 7 view .LVU3654 + 675:Src/main.c **** { + 11377 .loc 1 675 15 is_stmt 0 view .LVU3655 + 11378 077e E38A ldrh r3, [r4, #22] + 675:Src/main.c **** { + 11379 .loc 1 675 10 view .LVU3656 + 11380 0780 032B cmp r3, #3 + 11381 0782 0CD9 bls .L575 + 677:Src/main.c **** htim10.Init.Period = 9999; + 11382 .loc 1 677 8 is_stmt 1 view .LVU3657 + 677:Src/main.c **** htim10.Init.Period = 9999; + 11383 .loc 1 677 34 is_stmt 0 view .LVU3658 + 11384 0784 0D4A ldr r2, .L616+20 + 11385 0786 D068 ldr r0, [r2, #12] + 677:Src/main.c **** htim10.Init.Period = 9999; + 11386 .loc 1 677 21 view .LVU3659 + 11387 0788 0B49 ldr r1, .L616+16 + 11388 078a 0860 str r0, [r1] + 678:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 11389 .loc 1 678 8 is_stmt 1 view .LVU3660 + 678:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 11390 .loc 1 678 27 is_stmt 0 view .LVU3661 + ARM GAS /tmp/ccwR4KB7.s page 607 + + + 11391 078c 42F20F71 movw r1, #9999 + 11392 0790 D160 str r1, [r2, #12] + 679:Src/main.c **** } + 11393 .loc 1 679 8 is_stmt 1 view .LVU3662 + 679:Src/main.c **** } + 11394 .loc 1 679 33 is_stmt 0 view .LVU3663 + 11395 0792 013B subs r3, r3, #1 + 679:Src/main.c **** } + 11396 .loc 1 679 38 view .LVU3664 + 11397 0794 6422 movs r2, #100 + 11398 0796 02FB03F3 mul r3, r2, r3 + 679:Src/main.c **** } + 11399 .loc 1 679 21 view .LVU3665 + 11400 079a 0A4A ldr r2, .L616+28 + 11401 079c 1360 str r3, [r2] + 11402 .L575: + 681:Src/main.c **** break; + 11403 .loc 1 681 7 is_stmt 1 view .LVU3666 + 11404 079e 0748 ldr r0, .L616+20 + 11405 07a0 FFF7FEFF bl HAL_TIM_Base_Start_IT + 11406 .LVL1001: + 682:Src/main.c **** case TT_CHANGE_CURR_2: + 11407 .loc 1 682 6 view .LVU3667 + 11408 07a4 F9E6 b .L568 + 11409 .L617: + 11410 07a6 00BF .align 2 + 11411 .L616: + 11412 07a8 00000000 .word task + 11413 07ac 00000000 .word TO7 + 11414 07b0 00000000 .word TO7_before + 11415 07b4 00000000 .word TIM10_coflag + 11416 07b8 00000000 .word TIM10_period + 11417 07bc 00000000 .word htim10 + 11418 07c0 CDCCCCCC .word -858993459 + 11419 07c4 00000000 .word TO10_counter + 11420 07c8 00000000 .word CPU_state_old + 11421 07cc 00000000 .word LD1_param + 11422 07d0 00000000 .word LD2_param + 11423 07d4 00000000 .word LD1_curr_setup + 11424 07d8 00000000 .word temp16 + 11425 07dc 00000000 .word LD2_curr_setup + 11426 07e0 000C0240 .word 1073875968 + 11427 07e4 00480140 .word 1073825792 + 11428 07e8 00080040 .word 1073743872 + 11429 07ec 00000000 .word TO10 + 11430 07f0 00000000 .word htim11 + 11431 07f4 00000000 .word htim4 + 11432 07f8 00180240 .word 1073879040 + 11433 .LVL1002: + 11434 .L567: + 686:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 11435 .loc 1 686 7 view .LVU3668 + 686:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 11436 .loc 1 686 38 is_stmt 0 view .LVU3669 + 11437 07fc A74B ldr r3, .L618 + 11438 07fe D3ED077A vldr.32 s15, [r3, #28] + 686:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + ARM GAS /tmp/ccwR4KB7.s page 608 + + + 11439 .loc 1 686 7 view .LVU3670 + 11440 0802 FCEEE77A vcvt.u32.f32 s15, s15 + 11441 0806 17EE903A vmov r3, s15 @ int + 11442 080a 99B2 uxth r1, r3 + 11443 080c 0120 movs r0, #1 + 11444 080e FFF7FEFF bl Set_LTEC + 11445 .LVL1003: + 687:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 11446 .loc 1 687 7 is_stmt 1 view .LVU3671 + 687:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 11447 .loc 1 687 14 is_stmt 0 view .LVU3672 + 11448 0812 0320 movs r0, #3 + 11449 0814 FFF7FEFF bl MPhD_T + 11450 .LVL1004: + 688:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 11451 .loc 1 688 7 is_stmt 1 view .LVU3673 + 688:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 11452 .loc 1 688 32 is_stmt 0 view .LVU3674 + 11453 0818 0320 movs r0, #3 + 11454 081a FFF7FEFF bl MPhD_T + 11455 .LVL1005: + 688:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 11456 .loc 1 688 30 discriminator 1 view .LVU3675 + 11457 081e A04C ldr r4, .L618+4 + 11458 0820 2080 strh r0, [r4] @ movhi + 689:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 11459 .loc 1 689 7 is_stmt 1 view .LVU3676 + 689:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 11460 .loc 1 689 14 is_stmt 0 view .LVU3677 + 11461 0822 0420 movs r0, #4 + 11462 0824 FFF7FEFF bl MPhD_T + 11463 .LVL1006: + 690:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11464 .loc 1 690 7 is_stmt 1 view .LVU3678 + 690:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11465 .loc 1 690 32 is_stmt 0 view .LVU3679 + 11466 0828 0420 movs r0, #4 + 11467 082a FFF7FEFF bl MPhD_T + 11468 .LVL1007: + 690:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11469 .loc 1 690 30 discriminator 1 view .LVU3680 + 11470 082e 9D4D ldr r5, .L618+8 + 11471 0830 2880 strh r0, [r5] @ movhi + 691:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 11472 .loc 1 691 7 is_stmt 1 view .LVU3681 + 691:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 11473 .loc 1 691 14 is_stmt 0 view .LVU3682 + 11474 0832 0122 movs r2, #1 + 11475 0834 2146 mov r1, r4 + 11476 0836 9C48 ldr r0, .L618+12 + 11477 0838 FFF7FEFF bl PID_Controller_Temp + 11478 .LVL1008: + 11479 083c 0146 mov r1, r0 + 691:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 11480 .loc 1 691 13 discriminator 1 view .LVU3683 + 11481 083e 9B4C ldr r4, .L618+16 + 11482 0840 2080 strh r0, [r4] @ movhi + ARM GAS /tmp/ccwR4KB7.s page 609 + + + 692:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 11483 .loc 1 692 7 is_stmt 1 view .LVU3684 + 11484 0842 0320 movs r0, #3 + 11485 0844 FFF7FEFF bl Set_LTEC + 11486 .LVL1009: + 693:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 11487 .loc 1 693 7 view .LVU3685 + 693:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 11488 .loc 1 693 14 is_stmt 0 view .LVU3686 + 11489 0848 0222 movs r2, #2 + 11490 084a 2946 mov r1, r5 + 11491 084c 9848 ldr r0, .L618+20 + 11492 084e FFF7FEFF bl PID_Controller_Temp + 11493 .LVL1010: + 11494 0852 0146 mov r1, r0 + 693:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 11495 .loc 1 693 13 discriminator 1 view .LVU3687 + 11496 0854 2080 strh r0, [r4] @ movhi + 694:Src/main.c **** + 11497 .loc 1 694 7 is_stmt 1 view .LVU3688 + 11498 0856 0420 movs r0, #4 + 11499 0858 FFF7FEFF bl Set_LTEC + 11500 .LVL1011: + 696:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 11501 .loc 1 696 7 view .LVU3689 + 696:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 11502 .loc 1 696 28 is_stmt 0 view .LVU3690 + 11503 085c 954B ldr r3, .L618+24 + 11504 085e 0222 movs r2, #2 + 11505 0860 1A70 strb r2, [r3] + 697:Src/main.c **** //LD_blinker.param = task.current_param; + 11506 .loc 1 697 7 is_stmt 1 view .LVU3691 + 697:Src/main.c **** //LD_blinker.param = task.current_param; + 11507 .loc 1 697 24 is_stmt 0 view .LVU3692 + 11508 0862 0022 movs r2, #0 + 11509 0864 9A72 strb r2, [r3, #10] + 699:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 11510 .loc 1 699 7 is_stmt 1 view .LVU3693 + 699:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 11511 .loc 1 699 24 is_stmt 0 view .LVU3694 + 11512 0866 1A81 strh r2, [r3, #8] @ movhi + 700:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 11513 .loc 1 700 7 is_stmt 1 view .LVU3695 + 700:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 11514 .loc 1 700 24 is_stmt 0 view .LVU3696 + 11515 0868 4FF47A72 mov r2, #1000 + 11516 086c 1A81 strh r2, [r3, #8] @ movhi + 701:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 11517 .loc 1 701 7 is_stmt 1 view .LVU3697 + 701:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 11518 .loc 1 701 30 is_stmt 0 view .LVU3698 + 11519 086e 924A ldr r2, .L618+28 + 11520 0870 5A60 str r2, [r3, #4] + 702:Src/main.c **** + 11521 .loc 1 702 7 is_stmt 1 view .LVU3699 + 702:Src/main.c **** + 11522 .loc 1 702 29 is_stmt 0 view .LVU3700 + ARM GAS /tmp/ccwR4KB7.s page 610 + + + 11523 0872 8022 movs r2, #128 + 11524 0874 5A80 strh r2, [r3, #2] @ movhi + 704:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 11525 .loc 1 704 7 is_stmt 1 view .LVU3701 + 704:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 11526 .loc 1 704 17 is_stmt 0 view .LVU3702 + 11527 0876 914B ldr r3, .L618+32 + 11528 0878 42F21072 movw r2, #10000 + 11529 087c DA62 str r2, [r3, #44] + 706:Src/main.c **** if (st != HAL_OK) + 11530 .loc 1 706 7 is_stmt 1 view .LVU3703 + 706:Src/main.c **** if (st != HAL_OK) + 11531 .loc 1 706 12 is_stmt 0 view .LVU3704 + 11532 087e 9048 ldr r0, .L618+36 + 11533 0880 FFF7FEFF bl HAL_TIM_Base_Start_IT + 11534 .LVL1012: + 707:Src/main.c **** while(1); + 11535 .loc 1 707 7 is_stmt 1 view .LVU3705 + 707:Src/main.c **** while(1); + 11536 .loc 1 707 10 is_stmt 0 view .LVU3706 + 11537 0884 78BB cbnz r0, .L577 + 712:Src/main.c **** uint32_t i = 10000; while (--i){} + 11538 .loc 1 712 7 is_stmt 1 view .LVU3707 + 11539 0886 0122 movs r2, #1 + 11540 0888 8021 movs r1, #128 + 11541 088a 8E48 ldr r0, .L618+40 + 11542 .LVL1013: + 712:Src/main.c **** uint32_t i = 10000; while (--i){} + 11543 .loc 1 712 7 is_stmt 0 view .LVU3708 + 11544 088c FFF7FEFF bl HAL_GPIO_WritePin + 11545 .LVL1014: + 713:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11546 .loc 1 713 7 is_stmt 1 view .LVU3709 + 713:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11547 .loc 1 713 27 view .LVU3710 + 713:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11548 .loc 1 713 16 is_stmt 0 view .LVU3711 + 11549 0890 42F21073 movw r3, #10000 + 11550 .LVL1015: + 11551 .L578: + 713:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11552 .loc 1 713 39 is_stmt 1 discriminator 2 view .LVU3712 + 713:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11553 .loc 1 713 34 discriminator 2 view .LVU3713 + 713:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11554 .loc 1 713 34 is_stmt 0 discriminator 2 view .LVU3714 + 11555 0894 013B subs r3, r3, #1 + 11556 .LVL1016: + 713:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 11557 .loc 1 713 34 discriminator 2 view .LVU3715 + 11558 0896 FDD1 bne .L578 + 714:Src/main.c **** LD_blinker.state = 2; + 11559 .loc 1 714 7 is_stmt 1 view .LVU3716 + 11560 0898 0022 movs r2, #0 + 11561 089a 8021 movs r1, #128 + 11562 089c 8948 ldr r0, .L618+40 + 11563 089e FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccwR4KB7.s page 611 + + + 11564 .LVL1017: + 715:Src/main.c **** + 11565 .loc 1 715 7 view .LVU3717 + 715:Src/main.c **** + 11566 .loc 1 715 24 is_stmt 0 view .LVU3718 + 11567 08a2 844B ldr r3, .L618+24 + 11568 08a4 0222 movs r2, #2 + 11569 08a6 9A72 strb r2, [r3, #10] + 717:Src/main.c **** if (st != HAL_OK) + 11570 .loc 1 717 7 is_stmt 1 view .LVU3719 + 717:Src/main.c **** if (st != HAL_OK) + 11571 .loc 1 717 12 is_stmt 0 view .LVU3720 + 11572 08a8 8748 ldr r0, .L618+44 + 11573 08aa FFF7FEFF bl HAL_TIM_Base_Start_IT + 11574 .LVL1018: + 718:Src/main.c **** while(1); + 11575 .loc 1 718 7 is_stmt 1 view .LVU3721 + 718:Src/main.c **** while(1); + 11576 .loc 1 718 10 is_stmt 0 view .LVU3722 + 11577 08ae D8B9 cbnz r0, .L580 + 11578 .L581: + 720:Src/main.c **** { + 11579 .loc 1 720 33 is_stmt 1 view .LVU3723 + 720:Src/main.c **** { + 11580 .loc 1 720 18 is_stmt 0 view .LVU3724 + 11581 08b0 7A4B ldr r3, .L618 + 11582 08b2 D3ED047A vldr.32 s15, [r3, #16] + 720:Src/main.c **** { + 11583 .loc 1 720 39 view .LVU3725 + 11584 08b6 93ED027A vldr.32 s14, [r3, #8] + 720:Src/main.c **** { + 11585 .loc 1 720 33 view .LVU3726 + 11586 08ba F4EEC77A vcmpe.f32 s15, s14 + 11587 08be F1EE10FA vmrs APSR_nzcv, FPSCR + 11588 08c2 12D5 bpl .L611 + 722:Src/main.c **** { + 11589 .loc 1 722 8 is_stmt 1 view .LVU3727 + 722:Src/main.c **** { + 11590 .loc 1 722 12 is_stmt 0 view .LVU3728 + 11591 08c4 814B ldr r3, .L618+48 + 11592 08c6 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 722:Src/main.c **** { + 11593 .loc 1 722 11 view .LVU3729 + 11594 08c8 002B cmp r3, #0 + 11595 08ca F1D0 beq .L581 + 727:Src/main.c **** TO10 = 0; + 11596 .loc 1 727 9 is_stmt 1 view .LVU3730 + 727:Src/main.c **** TO10 = 0; + 11597 .loc 1 727 35 is_stmt 0 view .LVU3731 + 11598 08cc 734B ldr r3, .L618 + 11599 08ce 93ED037A vldr.32 s14, [r3, #12] + 727:Src/main.c **** TO10 = 0; + 11600 .loc 1 727 28 view .LVU3732 + 11601 08d2 77EE277A vadd.f32 s15, s14, s15 + 11602 08d6 C3ED047A vstr.32 s15, [r3, #16] + 728:Src/main.c **** TIM10_coflag = 0; + 11603 .loc 1 728 9 is_stmt 1 view .LVU3733 + ARM GAS /tmp/ccwR4KB7.s page 612 + + + 728:Src/main.c **** TIM10_coflag = 0; + 11604 .loc 1 728 14 is_stmt 0 view .LVU3734 + 11605 08da 0023 movs r3, #0 + 11606 08dc 7C4A ldr r2, .L618+52 + 11607 08de 1360 str r3, [r2] + 729:Src/main.c **** + 11608 .loc 1 729 9 is_stmt 1 view .LVU3735 + 729:Src/main.c **** + 11609 .loc 1 729 22 is_stmt 0 view .LVU3736 + 11610 08e0 7A4A ldr r2, .L618+48 + 11611 08e2 1370 strb r3, [r2] + 11612 08e4 E4E7 b .L581 + 11613 .LVL1019: + 11614 .L577: + 708:Src/main.c **** // */ + 11615 .loc 1 708 8 is_stmt 1 view .LVU3737 + 708:Src/main.c **** // */ + 11616 .loc 1 708 13 view .LVU3738 + 11617 08e6 FEE7 b .L577 + 11618 .LVL1020: + 11619 .L580: + 719:Src/main.c **** while (task.current_param < task.max_param) + 11620 .loc 1 719 8 view .LVU3739 + 719:Src/main.c **** while (task.current_param < task.max_param) + 11621 .loc 1 719 13 view .LVU3740 + 11622 08e8 FEE7 b .L580 + 11623 .L611: + 734:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 11624 .loc 1 734 7 view .LVU3741 + 11625 08ea 7748 ldr r0, .L618+44 + 11626 .LVL1021: + 734:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 11627 .loc 1 734 7 is_stmt 0 view .LVU3742 + 11628 08ec FFF7FEFF bl HAL_TIM_Base_Stop + 11629 .LVL1022: + 735:Src/main.c **** + 11630 .loc 1 735 7 is_stmt 1 view .LVU3743 + 11631 08f0 744C ldr r4, .L618+40 + 11632 08f2 0122 movs r2, #1 + 11633 08f4 8021 movs r1, #128 + 11634 08f6 2046 mov r0, r4 + 11635 08f8 FFF7FEFF bl HAL_GPIO_WritePin + 11636 .LVL1023: + 737:Src/main.c **** + 11637 .loc 1 737 7 view .LVU3744 + 11638 08fc 0022 movs r2, #0 + 11639 08fe 8021 movs r1, #128 + 11640 0900 2046 mov r0, r4 + 11641 0902 FFF7FEFF bl HAL_GPIO_WritePin + 11642 .LVL1024: + 739:Src/main.c **** TIM8->CNT = 0; + 11643 .loc 1 739 7 view .LVU3745 + 11644 0906 6E48 ldr r0, .L618+36 + 11645 0908 FFF7FEFF bl HAL_TIM_Base_Stop_IT + 11646 .LVL1025: + 740:Src/main.c **** + 11647 .loc 1 740 7 view .LVU3746 + ARM GAS /tmp/ccwR4KB7.s page 613 + + + 740:Src/main.c **** + 11648 .loc 1 740 17 is_stmt 0 view .LVU3747 + 11649 090c 6B4B ldr r3, .L618+32 + 11650 090e 0022 movs r2, #0 + 11651 0910 5A62 str r2, [r3, #36] + 742:Src/main.c **** task.current_param = task.min_param; + 11652 .loc 1 742 7 is_stmt 1 view .LVU3748 + 11653 0912 FFF7FEFF bl Stop_TIM10 + 11654 .LVL1026: + 743:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 11655 .loc 1 743 7 view .LVU3749 + 743:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 11656 .loc 1 743 32 is_stmt 0 view .LVU3750 + 11657 0916 614C ldr r4, .L618 + 11658 0918 D4ED017A vldr.32 s15, [r4, #4] + 743:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 11659 .loc 1 743 26 view .LVU3751 + 11660 091c C4ED047A vstr.32 s15, [r4, #16] + 744:Src/main.c **** if (task.tau > 3) + 11661 .loc 1 744 7 is_stmt 1 view .LVU3752 + 11662 0920 FCEEE77A vcvt.u32.f32 s15, s15 + 11663 0924 17EE903A vmov r3, s15 @ int + 11664 0928 99B2 uxth r1, r3 + 11665 092a 0220 movs r0, #2 + 11666 092c FFF7FEFF bl Set_LTEC + 11667 .LVL1027: + 745:Src/main.c **** { + 11668 .loc 1 745 7 view .LVU3753 + 745:Src/main.c **** { + 11669 .loc 1 745 15 is_stmt 0 view .LVU3754 + 11670 0930 E38A ldrh r3, [r4, #22] + 745:Src/main.c **** { + 11671 .loc 1 745 10 view .LVU3755 + 11672 0932 032B cmp r3, #3 + 11673 0934 0CD9 bls .L583 + 747:Src/main.c **** htim10.Init.Period = 9999; + 11674 .loc 1 747 8 is_stmt 1 view .LVU3756 + 747:Src/main.c **** htim10.Init.Period = 9999; + 11675 .loc 1 747 34 is_stmt 0 view .LVU3757 + 11676 0936 644A ldr r2, .L618+44 + 11677 0938 D068 ldr r0, [r2, #12] + 747:Src/main.c **** htim10.Init.Period = 9999; + 11678 .loc 1 747 21 view .LVU3758 + 11679 093a 6649 ldr r1, .L618+56 + 11680 093c 0860 str r0, [r1] + 748:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 11681 .loc 1 748 8 is_stmt 1 view .LVU3759 + 748:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 11682 .loc 1 748 27 is_stmt 0 view .LVU3760 + 11683 093e 42F20F71 movw r1, #9999 + 11684 0942 D160 str r1, [r2, #12] + 749:Src/main.c **** } + 11685 .loc 1 749 8 is_stmt 1 view .LVU3761 + 749:Src/main.c **** } + 11686 .loc 1 749 33 is_stmt 0 view .LVU3762 + 11687 0944 013B subs r3, r3, #1 + 749:Src/main.c **** } + ARM GAS /tmp/ccwR4KB7.s page 614 + + + 11688 .loc 1 749 38 view .LVU3763 + 11689 0946 6422 movs r2, #100 + 11690 0948 02FB03F3 mul r3, r2, r3 + 749:Src/main.c **** } + 11691 .loc 1 749 21 view .LVU3764 + 11692 094c 624A ldr r2, .L618+60 + 11693 094e 1360 str r3, [r2] + 11694 .L583: + 751:Src/main.c **** + 11695 .loc 1 751 7 is_stmt 1 view .LVU3765 + 11696 0950 5D48 ldr r0, .L618+44 + 11697 0952 FFF7FEFF bl HAL_TIM_Base_Start_IT + 11698 .LVL1028: + 799:Src/main.c **** case TT_CHANGE_TEMP_1: + 11699 .loc 1 799 6 view .LVU3766 + 11700 0956 20E6 b .L568 + 11701 .LVL1029: + 11702 .L608: + 799:Src/main.c **** case TT_CHANGE_TEMP_1: + 11703 .loc 1 799 6 is_stmt 0 view .LVU3767 + 11704 .LBE670: + 810:Src/main.c **** + 11705 .loc 1 810 7 is_stmt 1 view .LVU3768 + 810:Src/main.c **** + 11706 .loc 1 810 18 is_stmt 0 view .LVU3769 + 11707 0958 604A ldr r2, .L618+64 + 11708 095a 1360 str r3, [r2] + 812:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11709 .loc 1 812 7 is_stmt 1 view .LVU3770 + 812:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11710 .loc 1 812 25 is_stmt 0 view .LVU3771 + 11711 095c 0120 movs r0, #1 + 11712 095e FFF7FEFF bl MPhD_T + 11713 .LVL1030: + 812:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11714 .loc 1 812 23 discriminator 1 view .LVU3772 + 11715 0962 4F4E ldr r6, .L618+4 + 11716 0964 3081 strh r0, [r6, #8] @ movhi + 813:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11717 .loc 1 813 7 is_stmt 1 view .LVU3773 + 813:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11718 .loc 1 813 25 is_stmt 0 view .LVU3774 + 11719 0966 0120 movs r0, #1 + 11720 0968 FFF7FEFF bl MPhD_T + 11721 .LVL1031: + 813:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11722 .loc 1 813 23 discriminator 1 view .LVU3775 + 11723 096c 3081 strh r0, [r6, #8] @ movhi + 814:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11724 .loc 1 814 7 is_stmt 1 view .LVU3776 + 814:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11725 .loc 1 814 25 is_stmt 0 view .LVU3777 + 11726 096e 0220 movs r0, #2 + 11727 0970 FFF7FEFF bl MPhD_T + 11728 .LVL1032: + 814:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11729 .loc 1 814 23 discriminator 1 view .LVU3778 + ARM GAS /tmp/ccwR4KB7.s page 615 + + + 11730 0974 4B4F ldr r7, .L618+8 + 11731 0976 3881 strh r0, [r7, #8] @ movhi + 815:Src/main.c **** + 11732 .loc 1 815 7 is_stmt 1 view .LVU3779 + 815:Src/main.c **** + 11733 .loc 1 815 25 is_stmt 0 view .LVU3780 + 11734 0978 0220 movs r0, #2 + 11735 097a FFF7FEFF bl MPhD_T + 11736 .LVL1033: + 815:Src/main.c **** + 11737 .loc 1 815 23 discriminator 1 view .LVU3781 + 11738 097e 3881 strh r0, [r7, #8] @ movhi + 817:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 11739 .loc 1 817 7 is_stmt 1 view .LVU3782 + 817:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 11740 .loc 1 817 31 is_stmt 0 view .LVU3783 + 11741 0980 3389 ldrh r3, [r6, #8] + 817:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 11742 .loc 1 817 20 view .LVU3784 + 11743 0982 574C ldr r4, .L618+68 + 11744 0984 6380 strh r3, [r4, #2] @ movhi + 818:Src/main.c **** + 11745 .loc 1 818 7 is_stmt 1 view .LVU3785 + 818:Src/main.c **** + 11746 .loc 1 818 20 is_stmt 0 view .LVU3786 + 11747 0986 A080 strh r0, [r4, #4] @ movhi + 822:Src/main.c **** temp16 = Get_ADC(1); + 11748 .loc 1 822 7 is_stmt 1 view .LVU3787 + 822:Src/main.c **** temp16 = Get_ADC(1); + 11749 .loc 1 822 16 is_stmt 0 view .LVU3788 + 11750 0988 0020 movs r0, #0 + 11751 098a FFF7FEFF bl Get_ADC + 11752 .LVL1034: + 822:Src/main.c **** temp16 = Get_ADC(1); + 11753 .loc 1 822 14 discriminator 1 view .LVU3789 + 11754 098e 474D ldr r5, .L618+16 + 11755 0990 2880 strh r0, [r5] @ movhi + 823:Src/main.c **** Long_Data[7] = temp16; + 11756 .loc 1 823 7 is_stmt 1 view .LVU3790 + 823:Src/main.c **** Long_Data[7] = temp16; + 11757 .loc 1 823 16 is_stmt 0 view .LVU3791 + 11758 0992 0120 movs r0, #1 + 11759 0994 FFF7FEFF bl Get_ADC + 11760 .LVL1035: + 823:Src/main.c **** Long_Data[7] = temp16; + 11761 .loc 1 823 14 discriminator 1 view .LVU3792 + 11762 0998 2880 strh r0, [r5] @ movhi + 824:Src/main.c **** + 11763 .loc 1 824 7 is_stmt 1 view .LVU3793 + 824:Src/main.c **** + 11764 .loc 1 824 20 is_stmt 0 view .LVU3794 + 11765 099a E081 strh r0, [r4, #14] @ movhi + 827:Src/main.c **** Long_Data[8] = temp16; + 11766 .loc 1 827 7 is_stmt 1 view .LVU3795 + 827:Src/main.c **** Long_Data[8] = temp16; + 11767 .loc 1 827 16 is_stmt 0 view .LVU3796 + 11768 099c 0120 movs r0, #1 + ARM GAS /tmp/ccwR4KB7.s page 616 + + + 11769 099e FFF7FEFF bl Get_ADC + 11770 .LVL1036: + 827:Src/main.c **** Long_Data[8] = temp16; + 11771 .loc 1 827 14 discriminator 1 view .LVU3797 + 11772 09a2 2880 strh r0, [r5] @ movhi + 828:Src/main.c **** + 11773 .loc 1 828 7 is_stmt 1 view .LVU3798 + 828:Src/main.c **** + 11774 .loc 1 828 20 is_stmt 0 view .LVU3799 + 11775 09a4 2082 strh r0, [r4, #16] @ movhi + 831:Src/main.c **** Long_Data[9] = temp16; + 11776 .loc 1 831 7 is_stmt 1 view .LVU3800 + 831:Src/main.c **** Long_Data[9] = temp16; + 11777 .loc 1 831 16 is_stmt 0 view .LVU3801 + 11778 09a6 0120 movs r0, #1 + 11779 09a8 FFF7FEFF bl Get_ADC + 11780 .LVL1037: + 831:Src/main.c **** Long_Data[9] = temp16; + 11781 .loc 1 831 14 discriminator 1 view .LVU3802 + 11782 09ac 2880 strh r0, [r5] @ movhi + 832:Src/main.c **** + 11783 .loc 1 832 7 is_stmt 1 view .LVU3803 + 832:Src/main.c **** + 11784 .loc 1 832 20 is_stmt 0 view .LVU3804 + 11785 09ae 6082 strh r0, [r4, #18] @ movhi + 835:Src/main.c **** Long_Data[10] = temp16; + 11786 .loc 1 835 7 is_stmt 1 view .LVU3805 + 835:Src/main.c **** Long_Data[10] = temp16; + 11787 .loc 1 835 16 is_stmt 0 view .LVU3806 + 11788 09b0 0120 movs r0, #1 + 11789 09b2 FFF7FEFF bl Get_ADC + 11790 .LVL1038: + 835:Src/main.c **** Long_Data[10] = temp16; + 11791 .loc 1 835 14 discriminator 1 view .LVU3807 + 11792 09b6 2880 strh r0, [r5] @ movhi + 836:Src/main.c **** + 11793 .loc 1 836 7 is_stmt 1 view .LVU3808 + 836:Src/main.c **** + 11794 .loc 1 836 21 is_stmt 0 view .LVU3809 + 11795 09b8 A082 strh r0, [r4, #20] @ movhi + 839:Src/main.c **** Long_Data[11] = temp16; + 11796 .loc 1 839 7 is_stmt 1 view .LVU3810 + 839:Src/main.c **** Long_Data[11] = temp16; + 11797 .loc 1 839 16 is_stmt 0 view .LVU3811 + 11798 09ba 0120 movs r0, #1 + 11799 09bc FFF7FEFF bl Get_ADC + 11800 .LVL1039: + 839:Src/main.c **** Long_Data[11] = temp16; + 11801 .loc 1 839 14 discriminator 1 view .LVU3812 + 11802 09c0 2880 strh r0, [r5] @ movhi + 840:Src/main.c **** temp16 = Get_ADC(2); + 11803 .loc 1 840 7 is_stmt 1 view .LVU3813 + 840:Src/main.c **** temp16 = Get_ADC(2); + 11804 .loc 1 840 21 is_stmt 0 view .LVU3814 + 11805 09c2 E082 strh r0, [r4, #22] @ movhi + 841:Src/main.c **** + 11806 .loc 1 841 7 is_stmt 1 view .LVU3815 + ARM GAS /tmp/ccwR4KB7.s page 617 + + + 841:Src/main.c **** + 11807 .loc 1 841 16 is_stmt 0 view .LVU3816 + 11808 09c4 0220 movs r0, #2 + 11809 09c6 FFF7FEFF bl Get_ADC + 11810 .LVL1040: + 841:Src/main.c **** + 11811 .loc 1 841 14 discriminator 1 view .LVU3817 + 11812 09ca 2880 strh r0, [r5] @ movhi + 844:Src/main.c **** temp16 = Get_ADC(4); + 11813 .loc 1 844 7 is_stmt 1 view .LVU3818 + 844:Src/main.c **** temp16 = Get_ADC(4); + 11814 .loc 1 844 16 is_stmt 0 view .LVU3819 + 11815 09cc 0320 movs r0, #3 + 11816 09ce FFF7FEFF bl Get_ADC + 11817 .LVL1041: + 844:Src/main.c **** temp16 = Get_ADC(4); + 11818 .loc 1 844 14 discriminator 1 view .LVU3820 + 11819 09d2 2880 strh r0, [r5] @ movhi + 845:Src/main.c **** Long_Data[12] = temp16; + 11820 .loc 1 845 7 is_stmt 1 view .LVU3821 + 845:Src/main.c **** Long_Data[12] = temp16; + 11821 .loc 1 845 16 is_stmt 0 view .LVU3822 + 11822 09d4 0420 movs r0, #4 + 11823 09d6 FFF7FEFF bl Get_ADC + 11824 .LVL1042: + 845:Src/main.c **** Long_Data[12] = temp16; + 11825 .loc 1 845 14 discriminator 1 view .LVU3823 + 11826 09da 2880 strh r0, [r5] @ movhi + 846:Src/main.c **** temp16 = Get_ADC(5); + 11827 .loc 1 846 7 is_stmt 1 view .LVU3824 + 846:Src/main.c **** temp16 = Get_ADC(5); + 11828 .loc 1 846 21 is_stmt 0 view .LVU3825 + 11829 09dc 2083 strh r0, [r4, #24] @ movhi + 847:Src/main.c **** + 11830 .loc 1 847 7 is_stmt 1 view .LVU3826 + 847:Src/main.c **** + 11831 .loc 1 847 16 is_stmt 0 view .LVU3827 + 11832 09de 0520 movs r0, #5 + 11833 09e0 FFF7FEFF bl Get_ADC + 11834 .LVL1043: + 847:Src/main.c **** + 11835 .loc 1 847 14 discriminator 1 view .LVU3828 + 11836 09e4 2880 strh r0, [r5] @ movhi + 850:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 11837 .loc 1 850 7 is_stmt 1 view .LVU3829 + 850:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 11838 .loc 1 850 16 is_stmt 0 view .LVU3830 + 11839 09e6 3F4B ldr r3, .L618+72 + 11840 09e8 1B68 ldr r3, [r3] + 11841 09ea 3F4A ldr r2, .L618+76 + 11842 09ec 1360 str r3, [r2] + 851:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 11843 .loc 1 851 7 is_stmt 1 view .LVU3831 + 851:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 11844 .loc 1 851 20 is_stmt 0 view .LVU3832 + 11845 09ee E380 strh r3, [r4, #6] @ movhi + 852:Src/main.c **** + ARM GAS /tmp/ccwR4KB7.s page 618 + + + 11846 .loc 1 852 7 is_stmt 1 view .LVU3833 + 852:Src/main.c **** + 11847 .loc 1 852 31 is_stmt 0 view .LVU3834 + 11848 09f0 1B0C lsrs r3, r3, #16 + 852:Src/main.c **** + 11849 .loc 1 852 20 view .LVU3835 + 11850 09f2 2381 strh r3, [r4, #8] @ movhi + 855:Src/main.c **** + 11851 .loc 1 855 7 is_stmt 1 view .LVU3836 + 855:Src/main.c **** + 11852 .loc 1 855 31 is_stmt 0 view .LVU3837 + 11853 09f4 3388 ldrh r3, [r6] + 855:Src/main.c **** + 11854 .loc 1 855 20 view .LVU3838 + 11855 09f6 6381 strh r3, [r4, #10] @ movhi + 858:Src/main.c **** } + 11856 .loc 1 858 7 is_stmt 1 view .LVU3839 + 858:Src/main.c **** } + 11857 .loc 1 858 31 is_stmt 0 view .LVU3840 + 11858 09f8 3B88 ldrh r3, [r7] + 858:Src/main.c **** } + 11859 .loc 1 858 20 view .LVU3841 + 11860 09fa A381 strh r3, [r4, #12] @ movhi + 11861 09fc D4E5 b .L585 + 11862 .L587: + 886:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 11863 .loc 1 886 5 is_stmt 1 view .LVU3842 + 886:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 11864 .loc 1 886 17 is_stmt 0 view .LVU3843 + 11865 09fe 3B4C ldr r4, .L618+80 + 11866 0a00 0D21 movs r1, #13 + 11867 0a02 2046 mov r0, r4 + 11868 0a04 FFF7FEFF bl CalculateChecksum + 11869 .LVL1044: + 886:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 11870 .loc 1 886 15 discriminator 1 view .LVU3844 + 11871 0a08 394B ldr r3, .L618+84 + 11872 0a0a 1880 strh r0, [r3] @ movhi + 887:Src/main.c **** + 11873 .loc 1 887 5 is_stmt 1 view .LVU3845 + 887:Src/main.c **** + 11874 .loc 1 887 24 is_stmt 0 view .LVU3846 + 11875 0a0c 6083 strh r0, [r4, #26] @ movhi + 889:Src/main.c **** { + 11876 .loc 1 889 5 is_stmt 1 view .LVU3847 + 11877 .LBB671: + 889:Src/main.c **** { + 11878 .loc 1 889 10 view .LVU3848 + 11879 .LVL1045: + 889:Src/main.c **** { + 11880 .loc 1 889 19 is_stmt 0 view .LVU3849 + 11881 0a0e 0023 movs r3, #0 + 889:Src/main.c **** { + 11882 .loc 1 889 5 view .LVU3850 + 11883 0a10 0BE0 b .L590 + 11884 .LVL1046: + 11885 .L591: + ARM GAS /tmp/ccwR4KB7.s page 619 + + + 891:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11886 .loc 1 891 6 is_stmt 1 view .LVU3851 + 891:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11887 .loc 1 891 33 is_stmt 0 view .LVU3852 + 11888 0a12 334A ldr r2, .L618+68 + 11889 0a14 32F81320 ldrh r2, [r2, r3, lsl #1] + 891:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11890 .loc 1 891 17 view .LVU3853 + 11891 0a18 5900 lsls r1, r3, #1 + 891:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11892 .loc 1 891 21 view .LVU3854 + 11893 0a1a 3648 ldr r0, .L618+88 + 11894 0a1c 00F81320 strb r2, [r0, r3, lsl #1] + 892:Src/main.c **** } + 11895 .loc 1 892 6 is_stmt 1 view .LVU3855 + 892:Src/main.c **** } + 11896 .loc 1 892 19 is_stmt 0 view .LVU3856 + 11897 0a20 0131 adds r1, r1, #1 + 892:Src/main.c **** } + 11898 .loc 1 892 23 view .LVU3857 + 11899 0a22 120A lsrs r2, r2, #8 + 11900 0a24 4254 strb r2, [r0, r1] + 889:Src/main.c **** { + 11901 .loc 1 889 38 is_stmt 1 discriminator 3 view .LVU3858 + 11902 0a26 0133 adds r3, r3, #1 + 11903 .LVL1047: + 889:Src/main.c **** { + 11904 .loc 1 889 38 is_stmt 0 discriminator 3 view .LVU3859 + 11905 0a28 9BB2 uxth r3, r3 + 11906 .LVL1048: + 11907 .L590: + 889:Src/main.c **** { + 11908 .loc 1 889 28 is_stmt 1 discriminator 1 view .LVU3860 + 11909 0a2a 0E2B cmp r3, #14 + 11910 0a2c F1D9 bls .L591 + 11911 .LBE671: + 899:Src/main.c **** UART_transmission_request = NO_MESS; + 11912 .loc 1 899 5 view .LVU3861 + 11913 0a2e 1E20 movs r0, #30 + 11914 0a30 FFF7FEFF bl USART_TX_DMA + 11915 .LVL1049: + 900:Src/main.c **** break; + 11916 .loc 1 900 5 view .LVU3862 + 900:Src/main.c **** break; + 11917 .loc 1 900 31 is_stmt 0 view .LVU3863 + 11918 0a34 304B ldr r3, .L618+92 + 11919 0a36 0022 movs r2, #0 + 11920 0a38 1A70 strb r2, [r3] + 901:Src/main.c **** case MESS_03://Transmith saved packet + 11921 .loc 1 901 4 is_stmt 1 view .LVU3864 + 11922 0a3a FFF76EBB b .L589 + 11923 .LVL1050: + 11924 .L592: + 11925 .LBB672: + 905:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11926 .loc 1 905 6 view .LVU3865 + 905:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + ARM GAS /tmp/ccwR4KB7.s page 620 + + + 11927 .loc 1 905 33 is_stmt 0 view .LVU3866 + 11928 0a3e 284A ldr r2, .L618+68 + 11929 0a40 32F81320 ldrh r2, [r2, r3, lsl #1] + 905:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11930 .loc 1 905 17 view .LVU3867 + 11931 0a44 5900 lsls r1, r3, #1 + 905:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11932 .loc 1 905 21 view .LVU3868 + 11933 0a46 2B48 ldr r0, .L618+88 + 11934 0a48 00F81320 strb r2, [r0, r3, lsl #1] + 906:Src/main.c **** } + 11935 .loc 1 906 6 is_stmt 1 view .LVU3869 + 906:Src/main.c **** } + 11936 .loc 1 906 19 is_stmt 0 view .LVU3870 + 11937 0a4c 0131 adds r1, r1, #1 + 906:Src/main.c **** } + 11938 .loc 1 906 23 view .LVU3871 + 11939 0a4e 120A lsrs r2, r2, #8 + 11940 0a50 4254 strb r2, [r0, r1] + 903:Src/main.c **** { + 11941 .loc 1 903 38 is_stmt 1 discriminator 3 view .LVU3872 + 11942 0a52 0133 adds r3, r3, #1 + 11943 .LVL1051: + 903:Src/main.c **** { + 11944 .loc 1 903 38 is_stmt 0 discriminator 3 view .LVU3873 + 11945 0a54 9BB2 uxth r3, r3 + 11946 .LVL1052: + 11947 .L588: + 903:Src/main.c **** { + 11948 .loc 1 903 28 is_stmt 1 discriminator 1 view .LVU3874 + 11949 0a56 0E2B cmp r3, #14 + 11950 0a58 F1D9 bls .L592 + 11951 .LBE672: + 912:Src/main.c **** UART_transmission_request = NO_MESS; + 11952 .loc 1 912 5 view .LVU3875 + 11953 0a5a 1E20 movs r0, #30 + 11954 0a5c FFF7FEFF bl USART_TX_DMA + 11955 .LVL1053: + 913:Src/main.c **** break; + 11956 .loc 1 913 5 view .LVU3876 + 913:Src/main.c **** break; + 11957 .loc 1 913 31 is_stmt 0 view .LVU3877 + 11958 0a60 254B ldr r3, .L618+92 + 11959 0a62 0022 movs r2, #0 + 11960 0a64 1A70 strb r2, [r3] + 914:Src/main.c **** } + 11961 .loc 1 914 4 is_stmt 1 view .LVU3878 + 11962 0a66 FFF758BB b .L589 + 11963 .LVL1054: + 11964 .L598: + 874:Src/main.c **** { + 11965 .loc 1 874 3 is_stmt 0 view .LVU3879 + 11966 0a6a 0023 movs r3, #0 + 11967 0a6c F3E7 b .L588 + 11968 .L601: + 916:Src/main.c **** { + 11969 .loc 1 916 28 discriminator 1 view .LVU3880 + ARM GAS /tmp/ccwR4KB7.s page 621 + + + 11970 0a6e 1D4B ldr r3, .L618+72 + 11971 0a70 1B68 ldr r3, [r3] + 11972 0a72 224A ldr r2, .L618+96 + 11973 0a74 1268 ldr r2, [r2] + 11974 0a76 9B1A subs r3, r3, r2 + 916:Src/main.c **** { + 11975 .loc 1 916 21 discriminator 1 view .LVU3881 + 11976 0a78 642B cmp r3, #100 + 11977 0a7a 7FF653AB bls .L535 + 918:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 11978 .loc 1 918 4 is_stmt 1 view .LVU3882 + 918:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 11979 .loc 1 918 18 is_stmt 0 view .LVU3883 + 11980 0a7e 0022 movs r2, #0 + 11981 0a80 1F4B ldr r3, .L618+100 + 11982 0a82 1A80 strh r2, [r3] @ movhi + 919:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 11983 .loc 1 919 4 is_stmt 1 view .LVU3884 + 919:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 11984 .loc 1 919 14 is_stmt 0 view .LVU3885 + 11985 0a84 1F49 ldr r1, .L618+104 + 11986 0a86 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 919:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 11987 .loc 1 919 18 view .LVU3886 + 11988 0a88 43F00203 orr r3, r3, #2 + 11989 0a8c 0B70 strb r3, [r1] + 920:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 11990 .loc 1 920 4 is_stmt 1 view .LVU3887 + 920:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 11991 .loc 1 920 30 is_stmt 0 view .LVU3888 + 11992 0a8e 1A4B ldr r3, .L618+92 + 11993 0a90 0121 movs r1, #1 + 11994 0a92 1970 strb r1, [r3] + 921:Src/main.c **** } + 11995 .loc 1 921 4 is_stmt 1 view .LVU3889 + 921:Src/main.c **** } + 11996 .loc 1 921 12 is_stmt 0 view .LVU3890 + 11997 0a94 1C4B ldr r3, .L618+108 + 11998 0a96 1A70 strb r2, [r3] + 11999 0a98 FFF744BB b .L535 + 12000 .L619: + 12001 .align 2 + 12002 .L618: + 12003 0a9c 00000000 .word task + 12004 0aa0 00000000 .word LD1_param + 12005 0aa4 00000000 .word LD2_param + 12006 0aa8 00000000 .word LD1_curr_setup + 12007 0aac 00000000 .word temp16 + 12008 0ab0 00000000 .word LD2_curr_setup + 12009 0ab4 00000000 .word LD_blinker + 12010 0ab8 00040240 .word 1073873920 + 12011 0abc 00040140 .word 1073808384 + 12012 0ac0 00000000 .word htim8 + 12013 0ac4 000C0240 .word 1073875968 + 12014 0ac8 00000000 .word htim10 + 12015 0acc 00000000 .word TIM10_coflag + 12016 0ad0 00000000 .word TO10 + ARM GAS /tmp/ccwR4KB7.s page 622 + + + 12017 0ad4 00000000 .word TIM10_period + 12018 0ad8 00000000 .word TO10_counter + 12019 0adc 00000000 .word TO7_before + 12020 0ae0 00000000 .word Long_Data + 12021 0ae4 00000000 .word TO6 + 12022 0ae8 00000000 .word TO6_stop + 12023 0aec 02000000 .word Long_Data+2 + 12024 0af0 00000000 .word CS_result + 12025 0af4 00000000 .word UART_DATA + 12026 0af8 00000000 .word UART_transmission_request + 12027 0afc 00000000 .word TO6_uart + 12028 0b00 00000000 .word UART_rec_incr + 12029 0b04 00000000 .word State_Data + 12030 0b08 00000000 .word flg_tmt + 12031 .cfi_endproc + 12032 .LFE1186: + 12034 .section .rodata.ad9102_example2_regval,"a" + 12035 .align 2 + 12038 ad9102_example2_regval: + 12039 0000 0000 .short 0 + 12040 0002 000E .short 3584 + 12041 0004 0000 .short 0 + 12042 0006 0000 .short 0 + 12043 0008 0000 .short 0 + 12044 000a 0000 .short 0 + 12045 000c 0000 .short 0 + 12046 000e 0040 .short 16384 + 12047 0010 0000 .short 0 + 12048 0012 0000 .short 0 + 12049 0014 0000 .short 0 + 12050 0016 0000 .short 0 + 12051 0018 001F .short 7936 + 12052 001a 0000 .short 0 + 12053 001c 0000 .short 0 + 12054 001e 0000 .short 0 + 12055 0020 0E00 .short 14 + 12056 0022 0000 .short 0 + 12057 0024 0000 .short 0 + 12058 0026 0000 .short 0 + 12059 0028 0000 .short 0 + 12060 002a 0000 .short 0 + 12061 002c 3030 .short 12336 + 12062 002e 1101 .short 273 + 12063 0030 FFFF .short -1 + 12064 0032 0000 .short 0 + 12065 0034 0101 .short 257 + 12066 0036 0300 .short 3 + 12067 0038 0000 .short 0 + 12068 003a 0000 .short 0 + 12069 003c 0000 .short 0 + 12070 003e 0000 .short 0 + 12071 0040 0000 .short 0 + 12072 0042 0000 .short 0 + 12073 0044 0000 .short 0 + 12074 0046 0000 .short 0 + 12075 0048 0040 .short 16384 + 12076 004a 0000 .short 0 + ARM GAS /tmp/ccwR4KB7.s page 623 + + + 12077 004c 0002 .short 512 + 12078 004e 0000 .short 0 + 12079 0050 0000 .short 0 + 12080 0052 0000 .short 0 + 12081 0054 0000 .short 0 + 12082 0056 0000 .short 0 + 12083 0058 0000 .short 0 + 12084 005a 0000 .short 0 + 12085 005c 0000 .short 0 + 12086 005e 0000 .short 0 + 12087 0060 0000 .short 0 + 12088 0062 0000 .short 0 + 12089 0064 0000 .short 0 + 12090 0066 0000 .short 0 + 12091 0068 0000 .short 0 + 12092 006a 0000 .short 0 + 12093 006c 0000 .short 0 + 12094 006e 0000 .short 0 + 12095 0070 0000 .short 0 + 12096 0072 0000 .short 0 + 12097 0074 0000 .short 0 + 12098 0076 0000 .short 0 + 12099 0078 A00F .short 4000 + 12100 007a 0000 .short 0 + 12101 007c F03F .short 16368 + 12102 007e 0001 .short 256 + 12103 0080 0100 .short 1 + 12104 0082 0100 .short 1 + 12105 .section .rodata.ad9102_example4_regval,"a" + 12106 .align 2 + 12109 ad9102_example4_regval: + 12110 0000 0000 .short 0 + 12111 0002 0000 .short 0 + 12112 0004 0000 .short 0 + 12113 0006 0000 .short 0 + 12114 0008 0000 .short 0 + 12115 000a 0000 .short 0 + 12116 000c 0000 .short 0 + 12117 000e 0040 .short 16384 + 12118 0010 0000 .short 0 + 12119 0012 0000 .short 0 + 12120 0014 0000 .short 0 + 12121 0016 0000 .short 0 + 12122 0018 001F .short 7936 + 12123 001a 0000 .short 0 + 12124 001c 0000 .short 0 + 12125 001e 0000 .short 0 + 12126 0020 0E00 .short 14 + 12127 0022 0000 .short 0 + 12128 0024 0000 .short 0 + 12129 0026 0000 .short 0 + 12130 0028 0000 .short 0 + 12131 002a 0000 .short 0 + 12132 002c 1232 .short 12818 + 12133 002e 2101 .short 289 + 12134 0030 FFFF .short -1 + 12135 0032 0000 .short 0 + ARM GAS /tmp/ccwR4KB7.s page 624 + + + 12136 0034 0101 .short 257 + 12137 0036 0300 .short 3 + 12138 0038 0000 .short 0 + 12139 003a 0000 .short 0 + 12140 003c 0000 .short 0 + 12141 003e 0000 .short 0 + 12142 0040 0000 .short 0 + 12143 0042 0000 .short 0 + 12144 0044 0000 .short 0 + 12145 0046 0000 .short 0 + 12146 0048 0040 .short 16384 + 12147 004a 0000 .short 0 + 12148 004c 0606 .short 1542 + 12149 004e 9919 .short 6553 + 12150 0050 009A .short -26112 + 12151 0052 0000 .short 0 + 12152 0054 0000 .short 0 + 12153 0056 0000 .short 0 + 12154 0058 0000 .short 0 + 12155 005a 0000 .short 0 + 12156 005c 0000 .short 0 + 12157 005e 0000 .short 0 + 12158 0060 A00F .short 4000 + 12159 0062 0000 .short 0 + 12160 0064 0000 .short 0 + 12161 0066 0000 .short 0 + 12162 0068 0000 .short 0 + 12163 006a 0000 .short 0 + 12164 006c 0000 .short 0 + 12165 006e 0000 .short 0 + 12166 0070 0000 .short 0 + 12167 0072 0000 .short 0 + 12168 0074 0000 .short 0 + 12169 0076 0000 .short 0 + 12170 0078 0000 .short 0 + 12171 007a 0000 .short 0 + 12172 007c 0000 .short 0 + 12173 007e FF16 .short 5887 + 12174 0080 0100 .short 1 + 12175 0082 0100 .short 1 + 12176 .section .rodata.ad9102_reg_addr,"a" + 12177 .align 2 + 12180 ad9102_reg_addr: + 12181 0000 0000 .short 0 + 12182 0002 0100 .short 1 + 12183 0004 0200 .short 2 + 12184 0006 0300 .short 3 + 12185 0008 0400 .short 4 + 12186 000a 0500 .short 5 + 12187 000c 0600 .short 6 + 12188 000e 0700 .short 7 + 12189 0010 0800 .short 8 + 12190 0012 0900 .short 9 + 12191 0014 0A00 .short 10 + 12192 0016 0B00 .short 11 + 12193 0018 0C00 .short 12 + 12194 001a 0D00 .short 13 + ARM GAS /tmp/ccwR4KB7.s page 625 + + + 12195 001c 0E00 .short 14 + 12196 001e 1F00 .short 31 + 12197 0020 2000 .short 32 + 12198 0022 2200 .short 34 + 12199 0024 2300 .short 35 + 12200 0026 2400 .short 36 + 12201 0028 2500 .short 37 + 12202 002a 2600 .short 38 + 12203 002c 2700 .short 39 + 12204 002e 2800 .short 40 + 12205 0030 2900 .short 41 + 12206 0032 2A00 .short 42 + 12207 0034 2B00 .short 43 + 12208 0036 2C00 .short 44 + 12209 0038 2D00 .short 45 + 12210 003a 2E00 .short 46 + 12211 003c 2F00 .short 47 + 12212 003e 3000 .short 48 + 12213 0040 3100 .short 49 + 12214 0042 3200 .short 50 + 12215 0044 3300 .short 51 + 12216 0046 3400 .short 52 + 12217 0048 3500 .short 53 + 12218 004a 3600 .short 54 + 12219 004c 3700 .short 55 + 12220 004e 3E00 .short 62 + 12221 0050 3F00 .short 63 + 12222 0052 4000 .short 64 + 12223 0054 4100 .short 65 + 12224 0056 4200 .short 66 + 12225 0058 4300 .short 67 + 12226 005a 4400 .short 68 + 12227 005c 4500 .short 69 + 12228 005e 4700 .short 71 + 12229 0060 5000 .short 80 + 12230 0062 5100 .short 81 + 12231 0064 5200 .short 82 + 12232 0066 5300 .short 83 + 12233 0068 5400 .short 84 + 12234 006a 5500 .short 85 + 12235 006c 5600 .short 86 + 12236 006e 5700 .short 87 + 12237 0070 5800 .short 88 + 12238 0072 5900 .short 89 + 12239 0074 5A00 .short 90 + 12240 0076 5B00 .short 91 + 12241 0078 5C00 .short 92 + 12242 007a 5D00 .short 93 + 12243 007c 5E00 .short 94 + 12244 007e 5F00 .short 95 + 12245 0080 1E00 .short 30 + 12246 0082 1D00 .short 29 + 12247 .global task + 12248 .section .bss.task,"aw",%nobits + 12249 .align 2 + 12252 task: + 12253 0000 00000000 .space 52 + ARM GAS /tmp/ccwR4KB7.s page 626 + + + 12253 00000000 + 12253 00000000 + 12253 00000000 + 12253 00000000 + 12254 .global LD_blinker + 12255 .section .bss.LD_blinker,"aw",%nobits + 12256 .align 2 + 12259 LD_blinker: + 12260 0000 00000000 .space 12 + 12260 00000000 + 12260 00000000 + 12261 .global LD2_param + 12262 .section .bss.LD2_param,"aw",%nobits + 12263 .align 2 + 12266 LD2_param: + 12267 0000 00000000 .space 12 + 12267 00000000 + 12267 00000000 + 12268 .global LD1_param + 12269 .section .bss.LD1_param,"aw",%nobits + 12270 .align 2 + 12273 LD1_param: + 12274 0000 00000000 .space 12 + 12274 00000000 + 12274 00000000 + 12275 .global Def_setup + 12276 .section .bss.Def_setup,"aw",%nobits + 12277 .align 2 + 12280 Def_setup: + 12281 0000 00000000 .space 18 + 12281 00000000 + 12281 00000000 + 12281 00000000 + 12281 0000 + 12282 .global Curr_setup + 12283 .section .bss.Curr_setup,"aw",%nobits + 12284 .align 2 + 12287 Curr_setup: + 12288 0000 00000000 .space 18 + 12288 00000000 + 12288 00000000 + 12288 00000000 + 12288 0000 + 12289 .global LD2_def_setup + 12290 .section .bss.LD2_def_setup,"aw",%nobits + 12291 .align 2 + 12294 LD2_def_setup: + 12295 0000 00000000 .space 16 + 12295 00000000 + 12295 00000000 + 12295 00000000 + 12296 .global LD1_def_setup + 12297 .section .bss.LD1_def_setup,"aw",%nobits + 12298 .align 2 + 12301 LD1_def_setup: + 12302 0000 00000000 .space 16 + 12302 00000000 + ARM GAS /tmp/ccwR4KB7.s page 627 + + + 12302 00000000 + 12302 00000000 + 12303 .global LD2_curr_setup + 12304 .section .bss.LD2_curr_setup,"aw",%nobits + 12305 .align 2 + 12308 LD2_curr_setup: + 12309 0000 00000000 .space 16 + 12309 00000000 + 12309 00000000 + 12309 00000000 + 12310 .global LD1_curr_setup + 12311 .section .bss.LD1_curr_setup,"aw",%nobits + 12312 .align 2 + 12315 LD1_curr_setup: + 12316 0000 00000000 .space 16 + 12316 00000000 + 12316 00000000 + 12316 00000000 + 12317 .global sizeoffile + 12318 .section .bss.sizeoffile,"aw",%nobits + 12319 .align 2 + 12322 sizeoffile: + 12323 0000 00000000 .space 4 + 12324 .global fgoto + 12325 .section .bss.fgoto,"aw",%nobits + 12326 .align 2 + 12329 fgoto: + 12330 0000 00000000 .space 4 + 12331 .global test + 12332 .section .bss.test,"aw",%nobits + 12333 .align 2 + 12336 test: + 12337 0000 00000000 .space 4 + 12338 .global fresult + 12339 .section .bss.fresult,"aw",%nobits + 12342 fresult: + 12343 0000 00 .space 1 + 12344 .global COMMAND + 12345 .section .bss.COMMAND,"aw",%nobits + 12346 .align 2 + 12349 COMMAND: + 12350 0000 00000000 .space 30 + 12350 00000000 + 12350 00000000 + 12350 00000000 + 12350 00000000 + 12351 .global Long_Data + 12352 .section .bss.Long_Data,"aw",%nobits + 12353 .align 2 + 12356 Long_Data: + 12357 0000 00000000 .space 30 + 12357 00000000 + 12357 00000000 + 12357 00000000 + 12357 00000000 + 12358 .global temp16 + 12359 .section .bss.temp16,"aw",%nobits + ARM GAS /tmp/ccwR4KB7.s page 628 + + + 12360 .align 1 + 12363 temp16: + 12364 0000 0000 .space 2 + 12365 .global CS_result + 12366 .section .bss.CS_result,"aw",%nobits + 12367 .align 1 + 12370 CS_result: + 12371 0000 0000 .space 2 + 12372 .global UART_header + 12373 .section .bss.UART_header,"aw",%nobits + 12374 .align 1 + 12377 UART_header: + 12378 0000 0000 .space 2 + 12379 .global UART_rec_incr + 12380 .section .bss.UART_rec_incr,"aw",%nobits + 12381 .align 1 + 12384 UART_rec_incr: + 12385 0000 0000 .space 2 + 12386 .global TIM10_coflag + 12387 .section .bss.TIM10_coflag,"aw",%nobits + 12390 TIM10_coflag: + 12391 0000 00 .space 1 + 12392 .global u_rx_flg + 12393 .section .bss.u_rx_flg,"aw",%nobits + 12396 u_rx_flg: + 12397 0000 00 .space 1 + 12398 .global u_tx_flg + 12399 .section .bss.u_tx_flg,"aw",%nobits + 12402 u_tx_flg: + 12403 0000 00 .space 1 + 12404 .global flg_tmt + 12405 .section .bss.flg_tmt,"aw",%nobits + 12408 flg_tmt: + 12409 0000 00 .space 1 + 12410 .global UART_DATA + 12411 .section .bss.UART_DATA,"aw",%nobits + 12412 .align 2 + 12415 UART_DATA: + 12416 0000 00000000 .space 30 + 12416 00000000 + 12416 00000000 + 12416 00000000 + 12416 00000000 + 12417 .global State_Data + 12418 .section .bss.State_Data,"aw",%nobits + 12419 .align 2 + 12422 State_Data: + 12423 0000 0000 .space 2 + 12424 .global UART_transmission_request + 12425 .section .bss.UART_transmission_request,"aw",%nobits + 12428 UART_transmission_request: + 12429 0000 00 .space 1 + 12430 .global CPU_state_old + 12431 .section .bss.CPU_state_old,"aw",%nobits + 12434 CPU_state_old: + 12435 0000 00 .space 1 + 12436 .global CPU_state + ARM GAS /tmp/ccwR4KB7.s page 629 + + + 12437 .section .bss.CPU_state,"aw",%nobits + 12440 CPU_state: + 12441 0000 00 .space 1 + 12442 .global uart_buf + 12443 .section .bss.uart_buf,"aw",%nobits + 12446 uart_buf: + 12447 0000 00 .space 1 + 12448 .global TIM10_period + 12449 .section .bss.TIM10_period,"aw",%nobits + 12450 .align 2 + 12453 TIM10_period: + 12454 0000 00000000 .space 4 + 12455 .global TO10_counter + 12456 .section .bss.TO10_counter,"aw",%nobits + 12457 .align 2 + 12460 TO10_counter: + 12461 0000 00000000 .space 4 + 12462 .global TO10 + 12463 .section .bss.TO10,"aw",%nobits + 12464 .align 2 + 12467 TO10: + 12468 0000 00000000 .space 4 + 12469 .global TO7_PID + 12470 .section .bss.TO7_PID,"aw",%nobits + 12471 .align 2 + 12474 TO7_PID: + 12475 0000 00000000 .space 4 + 12476 .global TO7_before + 12477 .section .bss.TO7_before,"aw",%nobits + 12478 .align 2 + 12481 TO7_before: + 12482 0000 00000000 .space 4 + 12483 .global TO7 + 12484 .section .bss.TO7,"aw",%nobits + 12485 .align 2 + 12488 TO7: + 12489 0000 00000000 .space 4 + 12490 .global temp32 + 12491 .section .bss.temp32,"aw",%nobits + 12492 .align 2 + 12495 temp32: + 12496 0000 00000000 .space 4 + 12497 .global SD_SLIDE + 12498 .section .bss.SD_SLIDE,"aw",%nobits + 12499 .align 2 + 12502 SD_SLIDE: + 12503 0000 00000000 .space 4 + 12504 .global SD_SEEK + 12505 .section .bss.SD_SEEK,"aw",%nobits + 12506 .align 2 + 12509 SD_SEEK: + 12510 0000 00000000 .space 4 + 12511 .global TO6_uart + 12512 .section .bss.TO6_uart,"aw",%nobits + 12513 .align 2 + 12516 TO6_uart: + 12517 0000 00000000 .space 4 + ARM GAS /tmp/ccwR4KB7.s page 630 + + + 12518 .global TO6_stop + 12519 .section .bss.TO6_stop,"aw",%nobits + 12520 .align 2 + 12523 TO6_stop: + 12524 0000 00000000 .space 4 + 12525 .global TO6_before + 12526 .section .bss.TO6_before,"aw",%nobits + 12527 .align 2 + 12530 TO6_before: + 12531 0000 00000000 .space 4 + 12532 .global TO6 + 12533 .section .bss.TO6,"aw",%nobits + 12534 .align 2 + 12537 TO6: + 12538 0000 00000000 .space 4 + 12539 .global huart8 + 12540 .section .bss.huart8,"aw",%nobits + 12541 .align 2 + 12544 huart8: + 12545 0000 00000000 .space 136 + 12545 00000000 + 12545 00000000 + 12545 00000000 + 12545 00000000 + 12546 .global htim11 + 12547 .section .bss.htim11,"aw",%nobits + 12548 .align 2 + 12551 htim11: + 12552 0000 00000000 .space 76 + 12552 00000000 + 12552 00000000 + 12552 00000000 + 12552 00000000 + 12553 .global htim10 + 12554 .section .bss.htim10,"aw",%nobits + 12555 .align 2 + 12558 htim10: + 12559 0000 00000000 .space 76 + 12559 00000000 + 12559 00000000 + 12559 00000000 + 12559 00000000 + 12560 .global htim8 + 12561 .section .bss.htim8,"aw",%nobits + 12562 .align 2 + 12565 htim8: + 12566 0000 00000000 .space 76 + 12566 00000000 + 12566 00000000 + 12566 00000000 + 12566 00000000 + 12567 .global htim4 + 12568 .section .bss.htim4,"aw",%nobits + 12569 .align 2 + 12572 htim4: + 12573 0000 00000000 .space 76 + 12573 00000000 + ARM GAS /tmp/ccwR4KB7.s page 631 + + + 12573 00000000 + 12573 00000000 + 12573 00000000 + 12574 .global hsd1 + 12575 .section .bss.hsd1,"aw",%nobits + 12576 .align 2 + 12579 hsd1: + 12580 0000 00000000 .space 132 + 12580 00000000 + 12580 00000000 + 12580 00000000 + 12580 00000000 + 12581 .global hadc3 + 12582 .section .bss.hadc3,"aw",%nobits + 12583 .align 2 + 12586 hadc3: + 12587 0000 00000000 .space 72 + 12587 00000000 + 12587 00000000 + 12587 00000000 + 12587 00000000 + 12588 .global hadc1 + 12589 .section .bss.hadc1,"aw",%nobits + 12590 .align 2 + 12593 hadc1: + 12594 0000 00000000 .space 72 + 12594 00000000 + 12594 00000000 + 12594 00000000 + 12594 00000000 + 12595 .text + 12596 .Letext0: + 12597 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + 12598 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 12599 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 12600 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 12601 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" + 12602 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" + 12603 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 12604 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 12605 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 12606 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" + 12607 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" + 12608 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 12609 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" + 12610 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 12611 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" + 12612 .file 24 "Inc/main.h" + 12613 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" + 12614 .file 26 "Inc/File_Handling.h" + 12615 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" + 12616 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" + 12617 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + 12618 .file 30 "Inc/fatfs.h" + 12619 .file 31 "" + ARM GAS /tmp/ccwR4KB7.s page 632 DEFINED SYMBOLS *ABS*:00000000 main.c - /tmp/ccYgfTud.s:20 .text.NVIC_EncodePriority:00000000 $t - /tmp/ccYgfTud.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority - /tmp/ccYgfTud.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t - /tmp/ccYgfTud.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init - /tmp/ccYgfTud.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d - /tmp/ccYgfTud.s:11627 .bss.hsd1:00000000 hsd1 - /tmp/ccYgfTud.s:137 .text.MX_DMA_Init:00000000 $t - /tmp/ccYgfTud.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init - /tmp/ccYgfTud.s:238 .text.MX_DMA_Init:0000003c $d - /tmp/ccYgfTud.s:245 .text.Decode_task:00000000 $t - /tmp/ccYgfTud.s:250 .text.Decode_task:00000000 Decode_task - /tmp/ccYgfTud.s:527 .text.Decode_task:00000150 $d - /tmp/ccYgfTud.s:11300 .bss.task:00000000 task - /tmp/ccYgfTud.s:11508 .bss.TO10_counter:00000000 TO10_counter - /tmp/ccYgfTud.s:537 .text.PID_Controller_Temp:00000000 $t - /tmp/ccYgfTud.s:542 .text.PID_Controller_Temp:00000000 PID_Controller_Temp - /tmp/ccYgfTud.s:711 .text.PID_Controller_Temp:000000cc $d - /tmp/ccYgfTud.s:11536 .bss.TO7:00000000 TO7 - /tmp/ccYgfTud.s:11522 .bss.TO7_PID:00000000 TO7_PID - /tmp/ccYgfTud.s:721 .text.AD9102_WriteReg:00000000 $t - /tmp/ccYgfTud.s:726 .text.AD9102_WriteReg:00000000 AD9102_WriteReg - /tmp/ccYgfTud.s:973 .text.AD9102_WriteReg:000000a8 $d - /tmp/ccYgfTud.s:979 .text.AD9102_WriteRegTable:00000000 $t - /tmp/ccYgfTud.s:984 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable - /tmp/ccYgfTud.s:1035 .text.AD9102_WriteRegTable:00000024 $d - /tmp/ccYgfTud.s:11228 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr - /tmp/ccYgfTud.s:1040 .text.AD9102_Init:00000000 $t - /tmp/ccYgfTud.s:1045 .text.AD9102_Init:00000000 AD9102_Init - /tmp/ccYgfTud.s:1126 .text.AD9102_Init:00000064 $d - /tmp/ccYgfTud.s:11157 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval - /tmp/ccYgfTud.s:1134 .text.AD9102_ReadReg:00000000 $t - /tmp/ccYgfTud.s:1139 .text.AD9102_ReadReg:00000000 AD9102_ReadReg - /tmp/ccYgfTud.s:1394 .text.AD9102_ReadReg:000000a8 $d - /tmp/ccYgfTud.s:1400 .text.AD9102_CheckFlags:00000000 $t - /tmp/ccYgfTud.s:1405 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags - /tmp/ccYgfTud.s:1635 .text.AD9102_Apply:00000000 $t - /tmp/ccYgfTud.s:1640 .text.AD9102_Apply:00000000 AD9102_Apply - /tmp/ccYgfTud.s:1811 .text.AD9102_Apply:000000b4 $d - /tmp/ccYgfTud.s:1816 .text.OUT_trigger:00000000 $t - /tmp/ccYgfTud.s:1821 .text.OUT_trigger:00000000 OUT_trigger - /tmp/ccYgfTud.s:1839 .text.OUT_trigger:0000000a $d - /tmp/ccYgfTud.s:1849 .text.OUT_trigger:00000014 $t - /tmp/ccYgfTud.s:2045 .text.OUT_trigger:0000011c $d - /tmp/ccYgfTud.s:2051 .text.MPhD_T:00000000 $t - /tmp/ccYgfTud.s:2056 .text.MPhD_T:00000000 MPhD_T - /tmp/ccYgfTud.s:2140 .text.MPhD_T:00000056 $d - /tmp/ccYgfTud.s:2144 .text.MPhD_T:0000005a $t - /tmp/ccYgfTud.s:2687 .text.MPhD_T:00000210 $d - /tmp/ccYgfTud.s:2697 .text.Stop_TIM10:00000000 $t - /tmp/ccYgfTud.s:2702 .text.Stop_TIM10:00000000 Stop_TIM10 - /tmp/ccYgfTud.s:2731 .text.Stop_TIM10:00000014 $d - /tmp/ccYgfTud.s:11606 .bss.htim10:00000000 htim10 - /tmp/ccYgfTud.s:11438 .bss.TIM10_coflag:00000000 TIM10_coflag - /tmp/ccYgfTud.s:11515 .bss.TO10:00000000 TO10 - /tmp/ccYgfTud.s:2738 .text.MX_GPIO_Init:00000000 $t - ARM GAS /tmp/ccYgfTud.s page 607 + /tmp/ccwR4KB7.s:20 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccwR4KB7.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccwR4KB7.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t + /tmp/ccwR4KB7.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init + /tmp/ccwR4KB7.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d + /tmp/ccwR4KB7.s:12579 .bss.hsd1:00000000 hsd1 + /tmp/ccwR4KB7.s:137 .text.MX_DMA_Init:00000000 $t + /tmp/ccwR4KB7.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init + /tmp/ccwR4KB7.s:238 .text.MX_DMA_Init:0000003c $d + /tmp/ccwR4KB7.s:245 .text.Decode_task:00000000 $t + /tmp/ccwR4KB7.s:250 .text.Decode_task:00000000 Decode_task + /tmp/ccwR4KB7.s:527 .text.Decode_task:00000150 $d + /tmp/ccwR4KB7.s:12252 .bss.task:00000000 task + /tmp/ccwR4KB7.s:12460 .bss.TO10_counter:00000000 TO10_counter + /tmp/ccwR4KB7.s:537 .text.PID_Controller_Temp:00000000 $t + /tmp/ccwR4KB7.s:542 .text.PID_Controller_Temp:00000000 PID_Controller_Temp + /tmp/ccwR4KB7.s:711 .text.PID_Controller_Temp:000000cc $d + /tmp/ccwR4KB7.s:12488 .bss.TO7:00000000 TO7 + /tmp/ccwR4KB7.s:12474 .bss.TO7_PID:00000000 TO7_PID + /tmp/ccwR4KB7.s:721 .text.AD9102_WriteReg:00000000 $t + /tmp/ccwR4KB7.s:726 .text.AD9102_WriteReg:00000000 AD9102_WriteReg + /tmp/ccwR4KB7.s:973 .text.AD9102_WriteReg:000000a8 $d + /tmp/ccwR4KB7.s:979 .text.AD9102_WriteRegTable:00000000 $t + /tmp/ccwR4KB7.s:984 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable + /tmp/ccwR4KB7.s:1035 .text.AD9102_WriteRegTable:00000024 $d + /tmp/ccwR4KB7.s:12180 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr + /tmp/ccwR4KB7.s:1040 .text.AD9102_LoadSramRamp:00000000 $t + /tmp/ccwR4KB7.s:1045 .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp + /tmp/ccwR4KB7.s:1296 .text.AD9102_LoadSramRamp:000000c0 $d + /tmp/ccwR4KB7.s:1301 .text.AD9102_Init:00000000 $t + /tmp/ccwR4KB7.s:1306 .text.AD9102_Init:00000000 AD9102_Init + /tmp/ccwR4KB7.s:1387 .text.AD9102_Init:00000064 $d + /tmp/ccwR4KB7.s:12109 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval + /tmp/ccwR4KB7.s:1395 .text.AD9102_ReadReg:00000000 $t + /tmp/ccwR4KB7.s:1400 .text.AD9102_ReadReg:00000000 AD9102_ReadReg + /tmp/ccwR4KB7.s:1655 .text.AD9102_ReadReg:000000a8 $d + /tmp/ccwR4KB7.s:1661 .text.AD9102_CheckFlagsSram:00000000 $t + /tmp/ccwR4KB7.s:1666 .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram + /tmp/ccwR4KB7.s:1964 .text.AD9102_CheckFlags:00000000 $t + /tmp/ccwR4KB7.s:1969 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags + /tmp/ccwR4KB7.s:2199 .text.AD9102_ApplySram:00000000 $t + /tmp/ccwR4KB7.s:2204 .text.AD9102_ApplySram:00000000 AD9102_ApplySram + /tmp/ccwR4KB7.s:2457 .text.AD9102_ApplySram:0000012c $d + /tmp/ccwR4KB7.s:12038 .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval + /tmp/ccwR4KB7.s:2463 .text.AD9102_Apply:00000000 $t + /tmp/ccwR4KB7.s:2468 .text.AD9102_Apply:00000000 AD9102_Apply + /tmp/ccwR4KB7.s:2639 .text.AD9102_Apply:000000b4 $d + /tmp/ccwR4KB7.s:2644 .text.OUT_trigger:00000000 $t + /tmp/ccwR4KB7.s:2649 .text.OUT_trigger:00000000 OUT_trigger + /tmp/ccwR4KB7.s:2667 .text.OUT_trigger:0000000a $d + /tmp/ccwR4KB7.s:2677 .text.OUT_trigger:00000014 $t + /tmp/ccwR4KB7.s:2873 .text.OUT_trigger:0000011c $d + /tmp/ccwR4KB7.s:2879 .text.MPhD_T:00000000 $t + /tmp/ccwR4KB7.s:2884 .text.MPhD_T:00000000 MPhD_T + /tmp/ccwR4KB7.s:2968 .text.MPhD_T:00000056 $d + ARM GAS /tmp/ccwR4KB7.s page 633 - /tmp/ccYgfTud.s:2743 .text.MX_GPIO_Init:00000000 MX_GPIO_Init - /tmp/ccYgfTud.s:3204 .text.MX_GPIO_Init:0000023c $d - /tmp/ccYgfTud.s:3216 .text.MX_SPI4_Init:00000000 $t - /tmp/ccYgfTud.s:3221 .text.MX_SPI4_Init:00000000 MX_SPI4_Init - /tmp/ccYgfTud.s:3426 .text.MX_SPI4_Init:000000c8 $d - /tmp/ccYgfTud.s:3433 .text.MX_SPI2_Init:00000000 $t - /tmp/ccYgfTud.s:3438 .text.MX_SPI2_Init:00000000 MX_SPI2_Init - /tmp/ccYgfTud.s:3666 .text.MX_SPI2_Init:000000dc $d - /tmp/ccYgfTud.s:3673 .text.MX_SPI5_Init:00000000 $t - /tmp/ccYgfTud.s:3678 .text.MX_SPI5_Init:00000000 MX_SPI5_Init - /tmp/ccYgfTud.s:3883 .text.MX_SPI5_Init:000000c4 $d - /tmp/ccYgfTud.s:3890 .text.MX_SPI6_Init:00000000 $t - /tmp/ccYgfTud.s:3895 .text.MX_SPI6_Init:00000000 MX_SPI6_Init - /tmp/ccYgfTud.s:4100 .text.MX_SPI6_Init:000000c4 $d - /tmp/ccYgfTud.s:4107 .text.MX_TIM2_Init:00000000 $t - /tmp/ccYgfTud.s:4112 .text.MX_TIM2_Init:00000000 MX_TIM2_Init - /tmp/ccYgfTud.s:4290 .text.MX_TIM2_Init:00000088 $d - /tmp/ccYgfTud.s:4299 .text.MX_TIM5_Init:00000000 $t - /tmp/ccYgfTud.s:4304 .text.MX_TIM5_Init:00000000 MX_TIM5_Init - /tmp/ccYgfTud.s:4481 .text.MX_TIM5_Init:00000084 $d - /tmp/ccYgfTud.s:4490 .text.MX_TIM7_Init:00000000 $t - /tmp/ccYgfTud.s:4495 .text.MX_TIM7_Init:00000000 MX_TIM7_Init - /tmp/ccYgfTud.s:4656 .text.MX_TIM7_Init:0000007c $d - /tmp/ccYgfTud.s:4664 .text.MX_TIM6_Init:00000000 $t - /tmp/ccYgfTud.s:4669 .text.MX_TIM6_Init:00000000 MX_TIM6_Init - /tmp/ccYgfTud.s:4830 .text.MX_TIM6_Init:0000007c $d - /tmp/ccYgfTud.s:4838 .rodata.Init_params.str1.4:00000000 $d - /tmp/ccYgfTud.s:4845 .text.Init_params:00000000 $t - /tmp/ccYgfTud.s:4850 .text.Init_params:00000000 Init_params - /tmp/ccYgfTud.s:5486 .text.Init_params:00000284 $d - /tmp/ccYgfTud.s:11585 .bss.TO6:00000000 TO6 - /tmp/ccYgfTud.s:11529 .bss.TO7_before:00000000 TO7_before - /tmp/ccYgfTud.s:11578 .bss.TO6_before:00000000 TO6_before - /tmp/ccYgfTud.s:11564 .bss.TO6_uart:00000000 TO6_uart - /tmp/ccYgfTud.s:11456 .bss.flg_tmt:00000000 flg_tmt - /tmp/ccYgfTud.s:11432 .bss.UART_rec_incr:00000000 UART_rec_incr - /tmp/ccYgfTud.s:11377 .bss.fgoto:00000000 fgoto - /tmp/ccYgfTud.s:11370 .bss.sizeoffile:00000000 sizeoffile - /tmp/ccYgfTud.s:11450 .bss.u_tx_flg:00000000 u_tx_flg - /tmp/ccYgfTud.s:11444 .bss.u_rx_flg:00000000 u_rx_flg - /tmp/ccYgfTud.s:11404 .bss.Long_Data:00000000 Long_Data - /tmp/ccYgfTud.s:11328 .bss.Def_setup:00000000 Def_setup - /tmp/ccYgfTud.s:11349 .bss.LD1_def_setup:00000000 LD1_def_setup - /tmp/ccYgfTud.s:11342 .bss.LD2_def_setup:00000000 LD2_def_setup - /tmp/ccYgfTud.s:11335 .bss.Curr_setup:00000000 Curr_setup - /tmp/ccYgfTud.s:11363 .bss.LD1_curr_setup:00000000 LD1_curr_setup - /tmp/ccYgfTud.s:11356 .bss.LD2_curr_setup:00000000 LD2_curr_setup - /tmp/ccYgfTud.s:11463 .bss.UART_DATA:00000000 UART_DATA - /tmp/ccYgfTud.s:11557 .bss.SD_SEEK:00000000 SD_SEEK - /tmp/ccYgfTud.s:11550 .bss.SD_SLIDE:00000000 SD_SLIDE - /tmp/ccYgfTud.s:11384 .bss.test:00000000 test - /tmp/ccYgfTud.s:11488 .bss.CPU_state:00000000 CPU_state - /tmp/ccYgfTud.s:11397 .bss.COMMAND:00000000 COMMAND - /tmp/ccYgfTud.s:5525 .text.Get_ADC:00000000 $t - /tmp/ccYgfTud.s:5530 .text.Get_ADC:00000000 Get_ADC - /tmp/ccYgfTud.s:5550 .text.Get_ADC:0000000c $d - /tmp/ccYgfTud.s:5556 .text.Get_ADC:00000012 $t - ARM GAS /tmp/ccYgfTud.s page 608 + /tmp/ccwR4KB7.s:2972 .text.MPhD_T:0000005a $t + /tmp/ccwR4KB7.s:3515 .text.MPhD_T:00000210 $d + /tmp/ccwR4KB7.s:3525 .text.Stop_TIM10:00000000 $t + /tmp/ccwR4KB7.s:3530 .text.Stop_TIM10:00000000 Stop_TIM10 + /tmp/ccwR4KB7.s:3559 .text.Stop_TIM10:00000014 $d + /tmp/ccwR4KB7.s:12558 .bss.htim10:00000000 htim10 + /tmp/ccwR4KB7.s:12390 .bss.TIM10_coflag:00000000 TIM10_coflag + /tmp/ccwR4KB7.s:12467 .bss.TO10:00000000 TO10 + /tmp/ccwR4KB7.s:3566 .text.MX_GPIO_Init:00000000 $t + /tmp/ccwR4KB7.s:3571 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccwR4KB7.s:4032 .text.MX_GPIO_Init:0000023c $d + /tmp/ccwR4KB7.s:4044 .text.MX_SPI4_Init:00000000 $t + /tmp/ccwR4KB7.s:4049 .text.MX_SPI4_Init:00000000 MX_SPI4_Init + /tmp/ccwR4KB7.s:4254 .text.MX_SPI4_Init:000000c8 $d + /tmp/ccwR4KB7.s:4261 .text.MX_SPI2_Init:00000000 $t + /tmp/ccwR4KB7.s:4266 .text.MX_SPI2_Init:00000000 MX_SPI2_Init + /tmp/ccwR4KB7.s:4494 .text.MX_SPI2_Init:000000dc $d + /tmp/ccwR4KB7.s:4501 .text.MX_SPI5_Init:00000000 $t + /tmp/ccwR4KB7.s:4506 .text.MX_SPI5_Init:00000000 MX_SPI5_Init + /tmp/ccwR4KB7.s:4711 .text.MX_SPI5_Init:000000c4 $d + /tmp/ccwR4KB7.s:4718 .text.MX_SPI6_Init:00000000 $t + /tmp/ccwR4KB7.s:4723 .text.MX_SPI6_Init:00000000 MX_SPI6_Init + /tmp/ccwR4KB7.s:4928 .text.MX_SPI6_Init:000000c4 $d + /tmp/ccwR4KB7.s:4935 .text.MX_TIM2_Init:00000000 $t + /tmp/ccwR4KB7.s:4940 .text.MX_TIM2_Init:00000000 MX_TIM2_Init + /tmp/ccwR4KB7.s:5118 .text.MX_TIM2_Init:00000088 $d + /tmp/ccwR4KB7.s:5127 .text.MX_TIM5_Init:00000000 $t + /tmp/ccwR4KB7.s:5132 .text.MX_TIM5_Init:00000000 MX_TIM5_Init + /tmp/ccwR4KB7.s:5309 .text.MX_TIM5_Init:00000084 $d + /tmp/ccwR4KB7.s:5318 .text.MX_TIM7_Init:00000000 $t + /tmp/ccwR4KB7.s:5323 .text.MX_TIM7_Init:00000000 MX_TIM7_Init + /tmp/ccwR4KB7.s:5484 .text.MX_TIM7_Init:0000007c $d + /tmp/ccwR4KB7.s:5492 .text.MX_TIM6_Init:00000000 $t + /tmp/ccwR4KB7.s:5497 .text.MX_TIM6_Init:00000000 MX_TIM6_Init + /tmp/ccwR4KB7.s:5658 .text.MX_TIM6_Init:0000007c $d + /tmp/ccwR4KB7.s:5666 .rodata.Init_params.str1.4:00000000 $d + /tmp/ccwR4KB7.s:5673 .text.Init_params:00000000 $t + /tmp/ccwR4KB7.s:5678 .text.Init_params:00000000 Init_params + /tmp/ccwR4KB7.s:6314 .text.Init_params:00000284 $d + /tmp/ccwR4KB7.s:12537 .bss.TO6:00000000 TO6 + /tmp/ccwR4KB7.s:12481 .bss.TO7_before:00000000 TO7_before + /tmp/ccwR4KB7.s:12530 .bss.TO6_before:00000000 TO6_before + /tmp/ccwR4KB7.s:12516 .bss.TO6_uart:00000000 TO6_uart + /tmp/ccwR4KB7.s:12408 .bss.flg_tmt:00000000 flg_tmt + /tmp/ccwR4KB7.s:12384 .bss.UART_rec_incr:00000000 UART_rec_incr + /tmp/ccwR4KB7.s:12329 .bss.fgoto:00000000 fgoto + /tmp/ccwR4KB7.s:12322 .bss.sizeoffile:00000000 sizeoffile + /tmp/ccwR4KB7.s:12402 .bss.u_tx_flg:00000000 u_tx_flg + /tmp/ccwR4KB7.s:12396 .bss.u_rx_flg:00000000 u_rx_flg + /tmp/ccwR4KB7.s:12356 .bss.Long_Data:00000000 Long_Data + /tmp/ccwR4KB7.s:12280 .bss.Def_setup:00000000 Def_setup + /tmp/ccwR4KB7.s:12301 .bss.LD1_def_setup:00000000 LD1_def_setup + /tmp/ccwR4KB7.s:12294 .bss.LD2_def_setup:00000000 LD2_def_setup + /tmp/ccwR4KB7.s:12287 .bss.Curr_setup:00000000 Curr_setup + /tmp/ccwR4KB7.s:12315 .bss.LD1_curr_setup:00000000 LD1_curr_setup + /tmp/ccwR4KB7.s:12308 .bss.LD2_curr_setup:00000000 LD2_curr_setup + /tmp/ccwR4KB7.s:12415 .bss.UART_DATA:00000000 UART_DATA + ARM GAS /tmp/ccwR4KB7.s page 634 - /tmp/ccYgfTud.s:5654 .text.Get_ADC:00000068 $d - /tmp/ccYgfTud.s:11641 .bss.hadc1:00000000 hadc1 - /tmp/ccYgfTud.s:11634 .bss.hadc3:00000000 hadc3 - /tmp/ccYgfTud.s:5660 .text.Set_LTEC:00000000 $t - /tmp/ccYgfTud.s:5666 .text.Set_LTEC:00000000 Set_LTEC - /tmp/ccYgfTud.s:5697 .text.Set_LTEC:00000018 $d - /tmp/ccYgfTud.s:5701 .text.Set_LTEC:0000001c $t - /tmp/ccYgfTud.s:6123 .text.Set_LTEC:00000154 $d - /tmp/ccYgfTud.s:6131 .text.Decode_uart:00000000 $t - /tmp/ccYgfTud.s:6136 .text.Decode_uart:00000000 Decode_uart - /tmp/ccYgfTud.s:6699 .text.Decode_uart:000002cc $d - /tmp/ccYgfTud.s:6714 .text.Advanced_Controller_Temp:00000000 $t - /tmp/ccYgfTud.s:6720 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp - /tmp/ccYgfTud.s:6889 .text.Advanced_Controller_Temp:000000cc $d - /tmp/ccYgfTud.s:6899 .text.CalculateChecksum:00000000 $t - /tmp/ccYgfTud.s:6905 .text.CalculateChecksum:00000000 CalculateChecksum - /tmp/ccYgfTud.s:6950 .text.CheckChecksum:00000000 $t - /tmp/ccYgfTud.s:6956 .text.CheckChecksum:00000000 CheckChecksum - /tmp/ccYgfTud.s:7018 .text.CheckChecksum:0000003c $d - /tmp/ccYgfTud.s:11425 .bss.UART_header:00000000 UART_header - /tmp/ccYgfTud.s:11418 .bss.CS_result:00000000 CS_result - /tmp/ccYgfTud.s:7025 .rodata.SD_SAVE.str1.4:00000000 $d - /tmp/ccYgfTud.s:7029 .text.SD_SAVE:00000000 $t - /tmp/ccYgfTud.s:7035 .text.SD_SAVE:00000000 SD_SAVE - /tmp/ccYgfTud.s:7104 .text.SD_SAVE:00000030 $d - /tmp/ccYgfTud.s:7111 .text.SD_READ:00000000 $t - /tmp/ccYgfTud.s:7117 .text.SD_READ:00000000 SD_READ - /tmp/ccYgfTud.s:7195 .text.SD_READ:0000003c $d - /tmp/ccYgfTud.s:7203 .text.SD_REMOVE:00000000 $t - /tmp/ccYgfTud.s:7209 .text.SD_REMOVE:00000000 SD_REMOVE - /tmp/ccYgfTud.s:7277 .text.SD_REMOVE:00000034 $d - /tmp/ccYgfTud.s:7284 .text.USART_TX:00000000 $t - /tmp/ccYgfTud.s:7290 .text.USART_TX:00000000 USART_TX - /tmp/ccYgfTud.s:7365 .text.USART_TX:00000028 $d - /tmp/ccYgfTud.s:7370 .text.USART_TX_DMA:00000000 $t - /tmp/ccYgfTud.s:7376 .text.USART_TX_DMA:00000000 USART_TX_DMA - /tmp/ccYgfTud.s:7445 .text.USART_TX_DMA:00000038 $d - /tmp/ccYgfTud.s:7451 .text.Error_Handler:00000000 $t - /tmp/ccYgfTud.s:7457 .text.Error_Handler:00000000 Error_Handler - /tmp/ccYgfTud.s:7488 .text.MX_ADC1_Init:00000000 $t - /tmp/ccYgfTud.s:7493 .text.MX_ADC1_Init:00000000 MX_ADC1_Init - /tmp/ccYgfTud.s:7682 .text.MX_ADC1_Init:000000bc $d - /tmp/ccYgfTud.s:7689 .text.MX_ADC3_Init:00000000 $t - /tmp/ccYgfTud.s:7694 .text.MX_ADC3_Init:00000000 MX_ADC3_Init - /tmp/ccYgfTud.s:7801 .text.MX_ADC3_Init:00000060 $d - /tmp/ccYgfTud.s:7808 .text.MX_USART1_UART_Init:00000000 $t - /tmp/ccYgfTud.s:7813 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init - /tmp/ccYgfTud.s:8212 .text.MX_USART1_UART_Init:0000017c $d - /tmp/ccYgfTud.s:8221 .text.MX_TIM10_Init:00000000 $t - /tmp/ccYgfTud.s:8226 .text.MX_TIM10_Init:00000000 MX_TIM10_Init - /tmp/ccYgfTud.s:8275 .text.MX_TIM10_Init:00000024 $d - /tmp/ccYgfTud.s:8281 .text.MX_UART8_Init:00000000 $t - /tmp/ccYgfTud.s:8286 .text.MX_UART8_Init:00000000 MX_UART8_Init - /tmp/ccYgfTud.s:8347 .text.MX_UART8_Init:00000030 $d - /tmp/ccYgfTud.s:11592 .bss.huart8:00000000 huart8 - /tmp/ccYgfTud.s:8353 .text.MX_TIM8_Init:00000000 $t - /tmp/ccYgfTud.s:8358 .text.MX_TIM8_Init:00000000 MX_TIM8_Init - ARM GAS /tmp/ccYgfTud.s page 609 + /tmp/ccwR4KB7.s:12509 .bss.SD_SEEK:00000000 SD_SEEK + /tmp/ccwR4KB7.s:12502 .bss.SD_SLIDE:00000000 SD_SLIDE + /tmp/ccwR4KB7.s:12336 .bss.test:00000000 test + /tmp/ccwR4KB7.s:12440 .bss.CPU_state:00000000 CPU_state + /tmp/ccwR4KB7.s:12349 .bss.COMMAND:00000000 COMMAND + /tmp/ccwR4KB7.s:6353 .text.Get_ADC:00000000 $t + /tmp/ccwR4KB7.s:6358 .text.Get_ADC:00000000 Get_ADC + /tmp/ccwR4KB7.s:6378 .text.Get_ADC:0000000c $d + /tmp/ccwR4KB7.s:6384 .text.Get_ADC:00000012 $t + /tmp/ccwR4KB7.s:6482 .text.Get_ADC:00000068 $d + /tmp/ccwR4KB7.s:12593 .bss.hadc1:00000000 hadc1 + /tmp/ccwR4KB7.s:12586 .bss.hadc3:00000000 hadc3 + /tmp/ccwR4KB7.s:6488 .text.Set_LTEC:00000000 $t + /tmp/ccwR4KB7.s:6494 .text.Set_LTEC:00000000 Set_LTEC + /tmp/ccwR4KB7.s:6525 .text.Set_LTEC:00000018 $d + /tmp/ccwR4KB7.s:6529 .text.Set_LTEC:0000001c $t + /tmp/ccwR4KB7.s:6951 .text.Set_LTEC:00000154 $d + /tmp/ccwR4KB7.s:6959 .text.Decode_uart:00000000 $t + /tmp/ccwR4KB7.s:6964 .text.Decode_uart:00000000 Decode_uart + /tmp/ccwR4KB7.s:7527 .text.Decode_uart:000002cc $d + /tmp/ccwR4KB7.s:7542 .text.Advanced_Controller_Temp:00000000 $t + /tmp/ccwR4KB7.s:7548 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp + /tmp/ccwR4KB7.s:7717 .text.Advanced_Controller_Temp:000000cc $d + /tmp/ccwR4KB7.s:7727 .text.CalculateChecksum:00000000 $t + /tmp/ccwR4KB7.s:7733 .text.CalculateChecksum:00000000 CalculateChecksum + /tmp/ccwR4KB7.s:7778 .text.CheckChecksum:00000000 $t + /tmp/ccwR4KB7.s:7784 .text.CheckChecksum:00000000 CheckChecksum + /tmp/ccwR4KB7.s:7846 .text.CheckChecksum:0000003c $d + /tmp/ccwR4KB7.s:12377 .bss.UART_header:00000000 UART_header + /tmp/ccwR4KB7.s:12370 .bss.CS_result:00000000 CS_result + /tmp/ccwR4KB7.s:7853 .rodata.SD_SAVE.str1.4:00000000 $d + /tmp/ccwR4KB7.s:7857 .text.SD_SAVE:00000000 $t + /tmp/ccwR4KB7.s:7863 .text.SD_SAVE:00000000 SD_SAVE + /tmp/ccwR4KB7.s:7932 .text.SD_SAVE:00000030 $d + /tmp/ccwR4KB7.s:7939 .text.SD_READ:00000000 $t + /tmp/ccwR4KB7.s:7945 .text.SD_READ:00000000 SD_READ + /tmp/ccwR4KB7.s:8023 .text.SD_READ:0000003c $d + /tmp/ccwR4KB7.s:8031 .text.SD_REMOVE:00000000 $t + /tmp/ccwR4KB7.s:8037 .text.SD_REMOVE:00000000 SD_REMOVE + /tmp/ccwR4KB7.s:8105 .text.SD_REMOVE:00000034 $d + /tmp/ccwR4KB7.s:8112 .text.USART_TX:00000000 $t + /tmp/ccwR4KB7.s:8118 .text.USART_TX:00000000 USART_TX + /tmp/ccwR4KB7.s:8193 .text.USART_TX:00000028 $d + /tmp/ccwR4KB7.s:8198 .text.USART_TX_DMA:00000000 $t + /tmp/ccwR4KB7.s:8204 .text.USART_TX_DMA:00000000 USART_TX_DMA + /tmp/ccwR4KB7.s:8273 .text.USART_TX_DMA:00000038 $d + /tmp/ccwR4KB7.s:8279 .text.Error_Handler:00000000 $t + /tmp/ccwR4KB7.s:8285 .text.Error_Handler:00000000 Error_Handler + /tmp/ccwR4KB7.s:8316 .text.MX_ADC1_Init:00000000 $t + /tmp/ccwR4KB7.s:8321 .text.MX_ADC1_Init:00000000 MX_ADC1_Init + /tmp/ccwR4KB7.s:8510 .text.MX_ADC1_Init:000000bc $d + /tmp/ccwR4KB7.s:8517 .text.MX_ADC3_Init:00000000 $t + /tmp/ccwR4KB7.s:8522 .text.MX_ADC3_Init:00000000 MX_ADC3_Init + /tmp/ccwR4KB7.s:8629 .text.MX_ADC3_Init:00000060 $d + /tmp/ccwR4KB7.s:8636 .text.MX_USART1_UART_Init:00000000 $t + /tmp/ccwR4KB7.s:8641 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init + /tmp/ccwR4KB7.s:9040 .text.MX_USART1_UART_Init:0000017c $d + ARM GAS /tmp/ccwR4KB7.s page 635 - /tmp/ccYgfTud.s:8467 .text.MX_TIM8_Init:00000064 $d - /tmp/ccYgfTud.s:11613 .bss.htim8:00000000 htim8 - /tmp/ccYgfTud.s:8473 .text.MX_TIM11_Init:00000000 $t - /tmp/ccYgfTud.s:8478 .text.MX_TIM11_Init:00000000 MX_TIM11_Init - /tmp/ccYgfTud.s:8588 .text.MX_TIM11_Init:00000068 $d - /tmp/ccYgfTud.s:11599 .bss.htim11:00000000 htim11 - /tmp/ccYgfTud.s:8594 .text.MX_TIM4_Init:00000000 $t - /tmp/ccYgfTud.s:8599 .text.MX_TIM4_Init:00000000 MX_TIM4_Init - /tmp/ccYgfTud.s:8754 .text.MX_TIM4_Init:0000009c $d - /tmp/ccYgfTud.s:11620 .bss.htim4:00000000 htim4 - /tmp/ccYgfTud.s:8760 .text.SystemClock_Config:00000000 $t - /tmp/ccYgfTud.s:8766 .text.SystemClock_Config:00000000 SystemClock_Config - /tmp/ccYgfTud.s:8925 .text.SystemClock_Config:000000ac $d - /tmp/ccYgfTud.s:8931 .text.main:00000000 $t - /tmp/ccYgfTud.s:8937 .text.main:00000000 main - /tmp/ccYgfTud.s:9341 .text.main:00000140 $d - /tmp/ccYgfTud.s:9352 .text.main:0000016c $t - /tmp/ccYgfTud.s:9605 .text.main:00000278 $d - /tmp/ccYgfTud.s:11482 .bss.CPU_state_old:00000000 CPU_state_old - /tmp/ccYgfTud.s:11476 .bss.UART_transmission_request:00000000 UART_transmission_request - /tmp/ccYgfTud.s:11470 .bss.State_Data:00000000 State_Data - /tmp/ccYgfTud.s:11411 .bss.temp16:00000000 temp16 - /tmp/ccYgfTud.s:9629 .text.main:000002cc $t - /tmp/ccYgfTud.s:10187 .text.main:0000054c $d - /tmp/ccYgfTud.s:11321 .bss.LD1_param:00000000 LD1_param - /tmp/ccYgfTud.s:11314 .bss.LD2_param:00000000 LD2_param - /tmp/ccYgfTud.s:11571 .bss.TO6_stop:00000000 TO6_stop - /tmp/ccYgfTud.s:11501 .bss.TIM10_period:00000000 TIM10_period - /tmp/ccYgfTud.s:10215 .text.main:000005ac $t - /tmp/ccYgfTud.s:10727 .text.main:00000864 $d - /tmp/ccYgfTud.s:11307 .bss.LD_blinker:00000000 LD_blinker - /tmp/ccYgfTud.s:10750 .text.main:000008b8 $t - /tmp/ccYgfTud.s:11128 .text.main:00000a6c $d - /tmp/ccYgfTud.s:11154 .rodata.ad9102_example4_regval:00000000 $d - /tmp/ccYgfTud.s:11225 .rodata.ad9102_reg_addr:00000000 $d - /tmp/ccYgfTud.s:11297 .bss.task:00000000 $d - /tmp/ccYgfTud.s:11304 .bss.LD_blinker:00000000 $d - /tmp/ccYgfTud.s:11311 .bss.LD2_param:00000000 $d - /tmp/ccYgfTud.s:11318 .bss.LD1_param:00000000 $d - /tmp/ccYgfTud.s:11325 .bss.Def_setup:00000000 $d - /tmp/ccYgfTud.s:11332 .bss.Curr_setup:00000000 $d - /tmp/ccYgfTud.s:11339 .bss.LD2_def_setup:00000000 $d - /tmp/ccYgfTud.s:11346 .bss.LD1_def_setup:00000000 $d - /tmp/ccYgfTud.s:11353 .bss.LD2_curr_setup:00000000 $d - /tmp/ccYgfTud.s:11360 .bss.LD1_curr_setup:00000000 $d - /tmp/ccYgfTud.s:11367 .bss.sizeoffile:00000000 $d - /tmp/ccYgfTud.s:11374 .bss.fgoto:00000000 $d - /tmp/ccYgfTud.s:11381 .bss.test:00000000 $d - /tmp/ccYgfTud.s:11390 .bss.fresult:00000000 fresult - /tmp/ccYgfTud.s:11391 .bss.fresult:00000000 $d - /tmp/ccYgfTud.s:11394 .bss.COMMAND:00000000 $d - /tmp/ccYgfTud.s:11401 .bss.Long_Data:00000000 $d - /tmp/ccYgfTud.s:11408 .bss.temp16:00000000 $d - /tmp/ccYgfTud.s:11415 .bss.CS_result:00000000 $d - /tmp/ccYgfTud.s:11422 .bss.UART_header:00000000 $d - /tmp/ccYgfTud.s:11429 .bss.UART_rec_incr:00000000 $d - /tmp/ccYgfTud.s:11439 .bss.TIM10_coflag:00000000 $d - ARM GAS /tmp/ccYgfTud.s page 610 + /tmp/ccwR4KB7.s:9049 .text.MX_TIM10_Init:00000000 $t + /tmp/ccwR4KB7.s:9054 .text.MX_TIM10_Init:00000000 MX_TIM10_Init + /tmp/ccwR4KB7.s:9103 .text.MX_TIM10_Init:00000024 $d + /tmp/ccwR4KB7.s:9109 .text.MX_UART8_Init:00000000 $t + /tmp/ccwR4KB7.s:9114 .text.MX_UART8_Init:00000000 MX_UART8_Init + /tmp/ccwR4KB7.s:9175 .text.MX_UART8_Init:00000030 $d + /tmp/ccwR4KB7.s:12544 .bss.huart8:00000000 huart8 + /tmp/ccwR4KB7.s:9181 .text.MX_TIM8_Init:00000000 $t + /tmp/ccwR4KB7.s:9186 .text.MX_TIM8_Init:00000000 MX_TIM8_Init + /tmp/ccwR4KB7.s:9295 .text.MX_TIM8_Init:00000064 $d + /tmp/ccwR4KB7.s:12565 .bss.htim8:00000000 htim8 + /tmp/ccwR4KB7.s:9301 .text.MX_TIM11_Init:00000000 $t + /tmp/ccwR4KB7.s:9306 .text.MX_TIM11_Init:00000000 MX_TIM11_Init + /tmp/ccwR4KB7.s:9416 .text.MX_TIM11_Init:00000068 $d + /tmp/ccwR4KB7.s:12551 .bss.htim11:00000000 htim11 + /tmp/ccwR4KB7.s:9422 .text.MX_TIM4_Init:00000000 $t + /tmp/ccwR4KB7.s:9427 .text.MX_TIM4_Init:00000000 MX_TIM4_Init + /tmp/ccwR4KB7.s:9582 .text.MX_TIM4_Init:0000009c $d + /tmp/ccwR4KB7.s:12572 .bss.htim4:00000000 htim4 + /tmp/ccwR4KB7.s:9588 .text.SystemClock_Config:00000000 $t + /tmp/ccwR4KB7.s:9594 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccwR4KB7.s:9753 .text.SystemClock_Config:000000ac $d + /tmp/ccwR4KB7.s:9759 .text.main:00000000 $t + /tmp/ccwR4KB7.s:9765 .text.main:00000000 main + /tmp/ccwR4KB7.s:10169 .text.main:00000140 $d + /tmp/ccwR4KB7.s:10180 .text.main:0000016c $t + /tmp/ccwR4KB7.s:10433 .text.main:00000278 $d + /tmp/ccwR4KB7.s:12434 .bss.CPU_state_old:00000000 CPU_state_old + /tmp/ccwR4KB7.s:12428 .bss.UART_transmission_request:00000000 UART_transmission_request + /tmp/ccwR4KB7.s:12422 .bss.State_Data:00000000 State_Data + /tmp/ccwR4KB7.s:12363 .bss.temp16:00000000 temp16 + /tmp/ccwR4KB7.s:10457 .text.main:000002cc $t + /tmp/ccwR4KB7.s:11007 .text.main:00000540 $d + /tmp/ccwR4KB7.s:12273 .bss.LD1_param:00000000 LD1_param + /tmp/ccwR4KB7.s:12266 .bss.LD2_param:00000000 LD2_param + /tmp/ccwR4KB7.s:12523 .bss.TO6_stop:00000000 TO6_stop + /tmp/ccwR4KB7.s:11029 .text.main:0000058c $t + /tmp/ccwR4KB7.s:11412 .text.main:000007a8 $d + /tmp/ccwR4KB7.s:12453 .bss.TIM10_period:00000000 TIM10_period + /tmp/ccwR4KB7.s:11437 .text.main:000007fc $t + /tmp/ccwR4KB7.s:12003 .text.main:00000a9c $d + /tmp/ccwR4KB7.s:12259 .bss.LD_blinker:00000000 LD_blinker + /tmp/ccwR4KB7.s:12035 .rodata.ad9102_example2_regval:00000000 $d + /tmp/ccwR4KB7.s:12106 .rodata.ad9102_example4_regval:00000000 $d + /tmp/ccwR4KB7.s:12177 .rodata.ad9102_reg_addr:00000000 $d + /tmp/ccwR4KB7.s:12249 .bss.task:00000000 $d + /tmp/ccwR4KB7.s:12256 .bss.LD_blinker:00000000 $d + /tmp/ccwR4KB7.s:12263 .bss.LD2_param:00000000 $d + /tmp/ccwR4KB7.s:12270 .bss.LD1_param:00000000 $d + /tmp/ccwR4KB7.s:12277 .bss.Def_setup:00000000 $d + /tmp/ccwR4KB7.s:12284 .bss.Curr_setup:00000000 $d + /tmp/ccwR4KB7.s:12291 .bss.LD2_def_setup:00000000 $d + /tmp/ccwR4KB7.s:12298 .bss.LD1_def_setup:00000000 $d + /tmp/ccwR4KB7.s:12305 .bss.LD2_curr_setup:00000000 $d + /tmp/ccwR4KB7.s:12312 .bss.LD1_curr_setup:00000000 $d + /tmp/ccwR4KB7.s:12319 .bss.sizeoffile:00000000 $d + /tmp/ccwR4KB7.s:12326 .bss.fgoto:00000000 $d + ARM GAS /tmp/ccwR4KB7.s page 636 - /tmp/ccYgfTud.s:11445 .bss.u_rx_flg:00000000 $d - /tmp/ccYgfTud.s:11451 .bss.u_tx_flg:00000000 $d - /tmp/ccYgfTud.s:11457 .bss.flg_tmt:00000000 $d - /tmp/ccYgfTud.s:11460 .bss.UART_DATA:00000000 $d - /tmp/ccYgfTud.s:11467 .bss.State_Data:00000000 $d - /tmp/ccYgfTud.s:11477 .bss.UART_transmission_request:00000000 $d - /tmp/ccYgfTud.s:11483 .bss.CPU_state_old:00000000 $d - /tmp/ccYgfTud.s:11489 .bss.CPU_state:00000000 $d - /tmp/ccYgfTud.s:11494 .bss.uart_buf:00000000 uart_buf - /tmp/ccYgfTud.s:11495 .bss.uart_buf:00000000 $d - /tmp/ccYgfTud.s:11498 .bss.TIM10_period:00000000 $d - /tmp/ccYgfTud.s:11505 .bss.TO10_counter:00000000 $d - /tmp/ccYgfTud.s:11512 .bss.TO10:00000000 $d - /tmp/ccYgfTud.s:11519 .bss.TO7_PID:00000000 $d - /tmp/ccYgfTud.s:11526 .bss.TO7_before:00000000 $d - /tmp/ccYgfTud.s:11533 .bss.TO7:00000000 $d - /tmp/ccYgfTud.s:11543 .bss.temp32:00000000 temp32 - /tmp/ccYgfTud.s:11540 .bss.temp32:00000000 $d - /tmp/ccYgfTud.s:11547 .bss.SD_SLIDE:00000000 $d - /tmp/ccYgfTud.s:11554 .bss.SD_SEEK:00000000 $d - /tmp/ccYgfTud.s:11561 .bss.TO6_uart:00000000 $d - /tmp/ccYgfTud.s:11568 .bss.TO6_stop:00000000 $d - /tmp/ccYgfTud.s:11575 .bss.TO6_before:00000000 $d - /tmp/ccYgfTud.s:11582 .bss.TO6:00000000 $d - /tmp/ccYgfTud.s:11589 .bss.huart8:00000000 $d - /tmp/ccYgfTud.s:11596 .bss.htim11:00000000 $d - /tmp/ccYgfTud.s:11603 .bss.htim10:00000000 $d - /tmp/ccYgfTud.s:11610 .bss.htim8:00000000 $d - /tmp/ccYgfTud.s:11617 .bss.htim4:00000000 $d - /tmp/ccYgfTud.s:11624 .bss.hsd1:00000000 $d - /tmp/ccYgfTud.s:11631 .bss.hadc3:00000000 $d - /tmp/ccYgfTud.s:11638 .bss.hadc1:00000000 $d + /tmp/ccwR4KB7.s:12333 .bss.test:00000000 $d + /tmp/ccwR4KB7.s:12342 .bss.fresult:00000000 fresult + /tmp/ccwR4KB7.s:12343 .bss.fresult:00000000 $d + /tmp/ccwR4KB7.s:12346 .bss.COMMAND:00000000 $d + /tmp/ccwR4KB7.s:12353 .bss.Long_Data:00000000 $d + /tmp/ccwR4KB7.s:12360 .bss.temp16:00000000 $d + /tmp/ccwR4KB7.s:12367 .bss.CS_result:00000000 $d + /tmp/ccwR4KB7.s:12374 .bss.UART_header:00000000 $d + /tmp/ccwR4KB7.s:12381 .bss.UART_rec_incr:00000000 $d + /tmp/ccwR4KB7.s:12391 .bss.TIM10_coflag:00000000 $d + /tmp/ccwR4KB7.s:12397 .bss.u_rx_flg:00000000 $d + /tmp/ccwR4KB7.s:12403 .bss.u_tx_flg:00000000 $d + /tmp/ccwR4KB7.s:12409 .bss.flg_tmt:00000000 $d + /tmp/ccwR4KB7.s:12412 .bss.UART_DATA:00000000 $d + /tmp/ccwR4KB7.s:12419 .bss.State_Data:00000000 $d + /tmp/ccwR4KB7.s:12429 .bss.UART_transmission_request:00000000 $d + /tmp/ccwR4KB7.s:12435 .bss.CPU_state_old:00000000 $d + /tmp/ccwR4KB7.s:12441 .bss.CPU_state:00000000 $d + /tmp/ccwR4KB7.s:12446 .bss.uart_buf:00000000 uart_buf + /tmp/ccwR4KB7.s:12447 .bss.uart_buf:00000000 $d + /tmp/ccwR4KB7.s:12450 .bss.TIM10_period:00000000 $d + /tmp/ccwR4KB7.s:12457 .bss.TO10_counter:00000000 $d + /tmp/ccwR4KB7.s:12464 .bss.TO10:00000000 $d + /tmp/ccwR4KB7.s:12471 .bss.TO7_PID:00000000 $d + /tmp/ccwR4KB7.s:12478 .bss.TO7_before:00000000 $d + /tmp/ccwR4KB7.s:12485 .bss.TO7:00000000 $d + /tmp/ccwR4KB7.s:12495 .bss.temp32:00000000 temp32 + /tmp/ccwR4KB7.s:12492 .bss.temp32:00000000 $d + /tmp/ccwR4KB7.s:12499 .bss.SD_SLIDE:00000000 $d + /tmp/ccwR4KB7.s:12506 .bss.SD_SEEK:00000000 $d + /tmp/ccwR4KB7.s:12513 .bss.TO6_uart:00000000 $d + /tmp/ccwR4KB7.s:12520 .bss.TO6_stop:00000000 $d + /tmp/ccwR4KB7.s:12527 .bss.TO6_before:00000000 $d + /tmp/ccwR4KB7.s:12534 .bss.TO6:00000000 $d + /tmp/ccwR4KB7.s:12541 .bss.huart8:00000000 $d + /tmp/ccwR4KB7.s:12548 .bss.htim11:00000000 $d + /tmp/ccwR4KB7.s:12555 .bss.htim10:00000000 $d + /tmp/ccwR4KB7.s:12562 .bss.htim8:00000000 $d + /tmp/ccwR4KB7.s:12569 .bss.htim4:00000000 $d + /tmp/ccwR4KB7.s:12576 .bss.hsd1:00000000 $d + /tmp/ccwR4KB7.s:12583 .bss.hadc3:00000000 $d + /tmp/ccwR4KB7.s:12590 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin @@ -36582,6 +38156,9 @@ Seek_Read_File Unmount_SD HAL_ADC_Start HAL_ADC_PollForConversion + ARM GAS /tmp/ccwR4KB7.s page 637 + + HAL_ADC_GetValue HAL_ADC_Stop Remove_File @@ -36592,9 +38169,6 @@ HAL_ADC_Init HAL_ADC_ConfigChannel HAL_RCCEx_PeriphCLKConfig LL_USART_Init - ARM GAS /tmp/ccYgfTud.s page 611 - - HAL_TIM_Base_Init HAL_UART_Init HAL_TIM_ConfigClockSource diff --git a/build/main.o b/build/main.o index 1b75b56..7b53f96 100644 Binary files a/build/main.o and b/build/main.o differ