/* USER CODE BEGIN Header */
/**
  ******************************************************************************
  * @file    stm32f7xx_it.c
  * @brief   Interrupt Service Routines.
  ******************************************************************************
  * @attention
  *
  * Copyright (c) 2023 STMicroelectronics.
  * All rights reserved.
  *
  * This software is licensed under terms that can be found in the LICENSE file
  * in the root directory of this software component.
  * If no LICENSE file comes with this software, it is provided AS-IS.
  *
  ******************************************************************************
  */
/* USER CODE END Header */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f7xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

/* USER CODE END TD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */

/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */

/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
	extern uint32_t TO6, TO7, TO6_uart, TO10, TO10_counter;
	extern uint16_t UART_rec_incr, UART_header, COMMAND[CL_16];
	extern uint8_t uart_buf, flg_tmt, CPU_state, State_Data[2], UART_transmission_request, u_tx_flg, TIM10_coflag;
	extern  task_t task;
	extern task_state;
	extern LD_Blinker_StateTypeDef LD_blinker;
/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
void UART_RxCpltCallback(void);
void DMA2_Stream7_TransferComplete(void);
/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */

/* USER CODE END 0 */

/* External variables --------------------------------------------------------*/
extern ADC_HandleTypeDef hadc1;
extern ADC_HandleTypeDef hadc3;
extern TIM_HandleTypeDef htim8;
extern TIM_HandleTypeDef htim10;
/* USER CODE BEGIN EV */

/* USER CODE END EV */

/******************************************************************************/
/*           Cortex-M7 Processor Interruption and Exception Handlers          */
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  while (1)
  {
  }
  /* USER CODE END NonMaskableInt_IRQn 1 */
}

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
    /* USER CODE END W1_HardFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
    /* USER CODE END W1_MemoryManagement_IRQn 0 */
  }
}

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
    /* USER CODE END W1_BusFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
    /* USER CODE END W1_UsageFault_IRQn 0 */
  }
}

/**
  * @brief This function handles System service call via SWI instruction.
  */
void SVC_Handler(void)
{
  /* USER CODE BEGIN SVCall_IRQn 0 */

  /* USER CODE END SVCall_IRQn 0 */
  /* USER CODE BEGIN SVCall_IRQn 1 */

  /* USER CODE END SVCall_IRQn 1 */
}

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
  /* USER CODE BEGIN DebugMonitor_IRQn 0 */

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
  /* USER CODE BEGIN PendSV_IRQn 0 */

  /* USER CODE END PendSV_IRQn 0 */
  /* USER CODE BEGIN PendSV_IRQn 1 */

  /* USER CODE END PendSV_IRQn 1 */
}

/**
  * @brief This function handles System tick timer.
  */
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
  /* USER CODE BEGIN SysTick_IRQn 1 */

  /* USER CODE END SysTick_IRQn 1 */
}

/******************************************************************************/
/* STM32F7xx Peripheral Interrupt Handlers                                    */
/* Add here the Interrupt Handlers for the used peripherals.                  */
/* For the available peripheral interrupt handler names,                      */
/* please refer to the startup file (startup_stm32f7xx.s).                    */
/******************************************************************************/

/**
  * @brief This function handles ADC1, ADC2 and ADC3 global interrupts.
  */
void ADC_IRQHandler(void)
{
  /* USER CODE BEGIN ADC_IRQn 0 */

  /* USER CODE END ADC_IRQn 0 */
  HAL_ADC_IRQHandler(&hadc1);
  HAL_ADC_IRQHandler(&hadc3);
  /* USER CODE BEGIN ADC_IRQn 1 */

  /* USER CODE END ADC_IRQn 1 */
}

/**
  * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
  */
void TIM1_UP_TIM10_IRQHandler(void)
{
  /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
	TO10++;
	if (TO10 == TO10_counter)
		TIM10_coflag = 1;
  /* USER CODE END TIM1_UP_TIM10_IRQn 0 */
  HAL_TIM_IRQHandler(&htim10);
  /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */

  /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
}

/**
  * @brief This function handles TIM2 global interrupt.
  */
void TIM2_IRQHandler(void)
{
  /* USER CODE BEGIN TIM2_IRQn 0 */

  /* USER CODE END TIM2_IRQn 0 */
  /* USER CODE BEGIN TIM2_IRQn 1 */

  /* USER CODE END TIM2_IRQn 1 */
}

/**
  * @brief This function handles USART1 global interrupt.
  */
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */
  volatile uint8_t temp;
  if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
  {
    UART_RxCpltCallback();
  }
  else
  {
    if(LL_USART_IsActiveFlag_ORE(USART1))
    {
      //temp = USART1->RDR;
      temp+= LL_USART_ReceiveData8(USART1);
    }
    else if(LL_USART_IsActiveFlag_FE(USART1))
    {
      //(void) USART1->RDR;
      temp+= LL_USART_ReceiveData8(USART1);
    }
    else if(LL_USART_IsActiveFlag_NE(USART1))
    {
      //(void) USART1->RDR;
      temp+= LL_USART_ReceiveData8(USART1);
    }
    else if(LL_USART_IsActiveFlag_PE(USART1))
    {
      //(void) USART1->RDR;
      temp+= LL_USART_ReceiveData8(USART1);
    }
    else
    {
      if(LL_USART_IsActiveFlag_TC(USART6) && LL_USART_IsEnabledIT_TC(USART6))
      {		
        LL_USART_ClearFlag_TC(USART1);
        //test_counter += 1;
        //if(UART_transmission_busy == 1){
        LL_USART_DisableIT_TC(USART1);
        //UART_transmission_busy = 0;
      }
    }
  }
	
  /* USER CODE END USART1_IRQn 0 */
  /* USER CODE BEGIN USART1_IRQn 1 */

  /* USER CODE END USART1_IRQn 1 */
}

/**
  * @brief This function handles TIM8 update interrupt and TIM13 global interrupt.
  */
void TIM8_UP_TIM13_IRQHandler(void)
{
  /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */
	switch (LD_blinker.state) {
		case 0: //no LD update required
		break;
		case 1: //LD ON, need update
			Set_LTEC(LD_blinker.task_type , LD_blinker.param);
			LD_blinker.state = 0;
		break;
		case 2: //set LD ON, blinking
			Set_LTEC(LD_blinker.task_type , LD_blinker.param);
			HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_SET);
			LD_blinker.state = 3;
		break;
		case 3: //set LD OFF, blinking
			Set_LTEC(LD_blinker.task_type , 0.0);
			HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_RESET);
			LD_blinker.state = 2;
		break;
	}
  /* USER CODE END TIM8_UP_TIM13_IRQn 0 */
  HAL_TIM_IRQHandler(&htim8);
  /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */

  /* USER CODE END TIM8_UP_TIM13_IRQn 1 */
}

/**
  * @brief This function handles TIM5 global interrupt.
  */
void TIM5_IRQHandler(void)
{
  /* USER CODE BEGIN TIM5_IRQn 0 */

  /* USER CODE END TIM5_IRQn 0 */
  /* USER CODE BEGIN TIM5_IRQn 1 */

  /* USER CODE END TIM5_IRQn 1 */
}

/**
  * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
  */
void TIM6_DAC_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */

  /* USER CODE END TIM6_DAC_IRQn 0 */

  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
  if(LL_TIM_IsActiveFlag_UPDATE(TIM6))
  {
    LL_TIM_ClearFlag_UPDATE(TIM6);
    TO6++;//increment tick
    //10 ms or 100 Hz
    HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
    //HAL_GPIO_TogglePin(GPIOD, GPIO_PIN_12);
  }
  /* USER CODE END TIM6_DAC_IRQn 1 */
}

/**
  * @brief This function handles TIM7 global interrupt.
  */
void TIM7_IRQHandler(void)
{
  /* USER CODE BEGIN TIM7_IRQn 0 */

  /* USER CODE END TIM7_IRQn 0 */
  /* USER CODE BEGIN TIM7_IRQn 1 */
  if(LL_TIM_IsActiveFlag_UPDATE(TIM7))
  {
    LL_TIM_ClearFlag_UPDATE(TIM7);
    TO7++;
    //1 ms or 1000 Hz
    //HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
  }
  /* USER CODE END TIM7_IRQn 1 */
}

/**
  * @brief This function handles DMA2 stream7 global interrupt.
  */
void DMA2_Stream7_IRQHandler(void)
{
  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
  if(LL_DMA_IsActiveFlag_TC7(DMA2) == 1)
  {
    DMA2_Stream7_TransferComplete();
    u_tx_flg = 0;//indicate that transfer compete
  }
  else if(LL_DMA_IsActiveFlag_TE7(DMA2) == 1)
  {
    LL_DMA_ClearFlag_TE7(DMA2);
  }
  /* USER CODE END DMA2_Stream7_IRQn 0 */

  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */

  /* USER CODE END DMA2_Stream7_IRQn 1 */
}

/* USER CODE BEGIN 1 */
void UART_RxCpltCallback(void)
{
    uart_buf = LL_USART_ReceiveData8(USART1);
    switch (UART_rec_incr)
    {
    case 0:
        TO6_uart = TO6;//Save the time of start rec. command
        flg_tmt = 1;//Set the timeout flag
        UART_header = uart_buf;
        UART_rec_incr++;
    break;
    case 1:
        UART_header += ((uint16_t)uart_buf<<8);
        switch (UART_header)
        {
        case 0x1111: //received long packet
            UART_rec_incr = 2;//timeout flag is still setting!
        break;
        case 0x2222: //Back to default
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
            CPU_state = DEFAULT_ENABLE;
        break;
        case 0x3333: //Transmith saved DATA
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
            CPU_state = TRANS_S_ENABLE;
        break;
        case 0x4444: //Received packet
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
            CPU_state = TRANS_ENABLE;
        break;
        case 0x5555: //Erase saved DATA
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
            CPU_state = REMOVE_FILE;
        break;
        case 0x6666: //Request state
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
            CPU_state = STATE;
        break;
        case 0x7777:
            UART_rec_incr = 2;//timeout flag is still setting!
            break;
        default: //error decoding header
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
            //UART_transmission_request = MESS_01;
            //CPU_state = HALT;
            State_Data[0] |= UART_ERR;
            CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
        break;
        }
    break;

    case (CL_8 - 1):
        if (UART_header == 0x1111)
        {
            if ((UART_rec_incr & 0x0001) > 0)
                COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
            else
                COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
            CPU_state = DECODE_ENABLE;
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
        }
        else
        {
            if ((UART_rec_incr&0x0001)>0)
                COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
            else
                COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
           UART_rec_incr++;
           UART_transmission_request = NO_MESS;
        }
    break;
    case (TSK_8 - 1):
        if (UART_header == 0x7777)
        {
            if ((UART_rec_incr&0x0001)>0)
    	          COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
    	      else
                COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
            CPU_state = DECODE_TASK;
            UART_rec_incr = 0;
            flg_tmt = 0;//Reset the timeout flag
        }
        else
        {
            if ((UART_rec_incr&0x0001)>0)
                COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
            else
                COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
            UART_rec_incr++;
            UART_transmission_request = NO_MESS;
        }
    break;
    default:
        if ((UART_rec_incr&0x0001)>0)
            COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
        else
            COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
        UART_rec_incr++;
        UART_transmission_request = NO_MESS;
    break;
    }
//    HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
}

//-----------------------------------------------
void DMA2_Stream7_TransferComplete(void)
{
  LL_DMA_ClearFlag_TC7(DMA2);
}
//-----------------------------------------------
/* USER CODE END 1 */
