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RFG_stm32_ADC_STM32F429/build/stm32f4xx_it.lst
2025-12-18 22:42:12 +03:00

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ARM GAS /tmp/ccmTyUBf.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f4xx_it.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/stm32f4xx_it.c"
20 .section .text.NMI_Handler,"ax",%progbits
21 .align 1
22 .global NMI_Handler
23 .syntax unified
24 .thumb
25 .thumb_func
27 NMI_Handler:
28 .LFB239:
1:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32f4xx_it.c **** /**
3:Core/Src/stm32f4xx_it.c **** ******************************************************************************
4:Core/Src/stm32f4xx_it.c **** * @file stm32f4xx_it.c
5:Core/Src/stm32f4xx_it.c **** * @brief Interrupt Service Routines.
6:Core/Src/stm32f4xx_it.c **** ******************************************************************************
7:Core/Src/stm32f4xx_it.c **** * @attention
8:Core/Src/stm32f4xx_it.c **** *
9:Core/Src/stm32f4xx_it.c **** * Copyright (c) 2025 STMicroelectronics.
10:Core/Src/stm32f4xx_it.c **** * All rights reserved.
11:Core/Src/stm32f4xx_it.c **** *
12:Core/Src/stm32f4xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
13:Core/Src/stm32f4xx_it.c **** * in the root directory of this software component.
14:Core/Src/stm32f4xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
15:Core/Src/stm32f4xx_it.c **** *
16:Core/Src/stm32f4xx_it.c **** ******************************************************************************
17:Core/Src/stm32f4xx_it.c **** */
18:Core/Src/stm32f4xx_it.c **** /* USER CODE END Header */
19:Core/Src/stm32f4xx_it.c ****
20:Core/Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/stm32f4xx_it.c **** #include "main.h"
22:Core/Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h"
23:Core/Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/
24:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */
25:Core/Src/stm32f4xx_it.c **** /* USER CODE END Includes */
26:Core/Src/stm32f4xx_it.c ****
27:Core/Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f4xx_it.c ****
30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */
ARM GAS /tmp/ccmTyUBf.s page 2
31:Core/Src/stm32f4xx_it.c ****
32:Core/Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/
33:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */
34:Core/Src/stm32f4xx_it.c ****
35:Core/Src/stm32f4xx_it.c **** /* USER CODE END PD */
36:Core/Src/stm32f4xx_it.c ****
37:Core/Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/
38:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */
39:Core/Src/stm32f4xx_it.c ****
40:Core/Src/stm32f4xx_it.c **** /* USER CODE END PM */
41:Core/Src/stm32f4xx_it.c ****
42:Core/Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/
43:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */
44:Core/Src/stm32f4xx_it.c ****
45:Core/Src/stm32f4xx_it.c **** /* USER CODE END PV */
46:Core/Src/stm32f4xx_it.c ****
47:Core/Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
48:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */
49:Core/Src/stm32f4xx_it.c ****
50:Core/Src/stm32f4xx_it.c **** /* USER CODE END PFP */
51:Core/Src/stm32f4xx_it.c ****
52:Core/Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/
53:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */
54:Core/Src/stm32f4xx_it.c ****
55:Core/Src/stm32f4xx_it.c **** /* USER CODE END 0 */
56:Core/Src/stm32f4xx_it.c ****
57:Core/Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/
58:Core/Src/stm32f4xx_it.c **** extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
59:Core/Src/stm32f4xx_it.c **** extern DMA_HandleTypeDef hdma_adc1;
60:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */
61:Core/Src/stm32f4xx_it.c **** /* Externs are provided via main.h; no extra declarations needed here */
62:Core/Src/stm32f4xx_it.c **** /* USER CODE END EV */
63:Core/Src/stm32f4xx_it.c ****
64:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
65:Core/Src/stm32f4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
66:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
67:Core/Src/stm32f4xx_it.c **** /**
68:Core/Src/stm32f4xx_it.c **** * @brief This function handles Non maskable interrupt.
69:Core/Src/stm32f4xx_it.c **** */
70:Core/Src/stm32f4xx_it.c **** void NMI_Handler(void)
71:Core/Src/stm32f4xx_it.c **** {
29 .loc 1 71 1 view -0
30 .cfi_startproc
31 @ Volatile: function does not return.
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
35 .L2:
72:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
73:Core/Src/stm32f4xx_it.c ****
74:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
75:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
76:Core/Src/stm32f4xx_it.c **** while (1)
36 .loc 1 76 4 view .LVU1
77:Core/Src/stm32f4xx_it.c **** {
78:Core/Src/stm32f4xx_it.c **** }
37 .loc 1 78 3 view .LVU2
ARM GAS /tmp/ccmTyUBf.s page 3
76:Core/Src/stm32f4xx_it.c **** {
38 .loc 1 76 10 view .LVU3
39 0000 FEE7 b .L2
40 .cfi_endproc
41 .LFE239:
43 .section .text.HardFault_Handler,"ax",%progbits
44 .align 1
45 .global HardFault_Handler
46 .syntax unified
47 .thumb
48 .thumb_func
50 HardFault_Handler:
51 .LFB240:
79:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
80:Core/Src/stm32f4xx_it.c **** }
81:Core/Src/stm32f4xx_it.c ****
82:Core/Src/stm32f4xx_it.c **** /**
83:Core/Src/stm32f4xx_it.c **** * @brief This function handles Hard fault interrupt.
84:Core/Src/stm32f4xx_it.c **** */
85:Core/Src/stm32f4xx_it.c **** void HardFault_Handler(void)
86:Core/Src/stm32f4xx_it.c **** {
52 .loc 1 86 1 view -0
53 .cfi_startproc
54 @ Volatile: function does not return.
55 @ args = 0, pretend = 0, frame = 0
56 @ frame_needed = 0, uses_anonymous_args = 0
57 @ link register save eliminated.
58 .L4:
87:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
88:Core/Src/stm32f4xx_it.c ****
89:Core/Src/stm32f4xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
90:Core/Src/stm32f4xx_it.c **** while (1)
59 .loc 1 90 3 view .LVU5
91:Core/Src/stm32f4xx_it.c **** {
92:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
93:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
94:Core/Src/stm32f4xx_it.c **** }
60 .loc 1 94 3 view .LVU6
90:Core/Src/stm32f4xx_it.c **** {
61 .loc 1 90 9 view .LVU7
62 0000 FEE7 b .L4
63 .cfi_endproc
64 .LFE240:
66 .section .text.MemManage_Handler,"ax",%progbits
67 .align 1
68 .global MemManage_Handler
69 .syntax unified
70 .thumb
71 .thumb_func
73 MemManage_Handler:
74 .LFB241:
95:Core/Src/stm32f4xx_it.c **** }
96:Core/Src/stm32f4xx_it.c ****
97:Core/Src/stm32f4xx_it.c **** /**
98:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault.
99:Core/Src/stm32f4xx_it.c **** */
100:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void)
ARM GAS /tmp/ccmTyUBf.s page 4
101:Core/Src/stm32f4xx_it.c **** {
75 .loc 1 101 1 view -0
76 .cfi_startproc
77 @ Volatile: function does not return.
78 @ args = 0, pretend = 0, frame = 0
79 @ frame_needed = 0, uses_anonymous_args = 0
80 @ link register save eliminated.
81 .L6:
102:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
103:Core/Src/stm32f4xx_it.c ****
104:Core/Src/stm32f4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
105:Core/Src/stm32f4xx_it.c **** while (1)
82 .loc 1 105 3 view .LVU9
106:Core/Src/stm32f4xx_it.c **** {
107:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
108:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
109:Core/Src/stm32f4xx_it.c **** }
83 .loc 1 109 3 view .LVU10
105:Core/Src/stm32f4xx_it.c **** {
84 .loc 1 105 9 view .LVU11
85 0000 FEE7 b .L6
86 .cfi_endproc
87 .LFE241:
89 .section .text.BusFault_Handler,"ax",%progbits
90 .align 1
91 .global BusFault_Handler
92 .syntax unified
93 .thumb
94 .thumb_func
96 BusFault_Handler:
97 .LFB242:
110:Core/Src/stm32f4xx_it.c **** }
111:Core/Src/stm32f4xx_it.c ****
112:Core/Src/stm32f4xx_it.c **** /**
113:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
114:Core/Src/stm32f4xx_it.c **** */
115:Core/Src/stm32f4xx_it.c **** void BusFault_Handler(void)
116:Core/Src/stm32f4xx_it.c **** {
98 .loc 1 116 1 view -0
99 .cfi_startproc
100 @ Volatile: function does not return.
101 @ args = 0, pretend = 0, frame = 0
102 @ frame_needed = 0, uses_anonymous_args = 0
103 @ link register save eliminated.
104 .L8:
117:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
118:Core/Src/stm32f4xx_it.c ****
119:Core/Src/stm32f4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
120:Core/Src/stm32f4xx_it.c **** while (1)
105 .loc 1 120 3 view .LVU13
121:Core/Src/stm32f4xx_it.c **** {
122:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
123:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
124:Core/Src/stm32f4xx_it.c **** }
106 .loc 1 124 3 view .LVU14
120:Core/Src/stm32f4xx_it.c **** {
107 .loc 1 120 9 view .LVU15
ARM GAS /tmp/ccmTyUBf.s page 5
108 0000 FEE7 b .L8
109 .cfi_endproc
110 .LFE242:
112 .section .text.UsageFault_Handler,"ax",%progbits
113 .align 1
114 .global UsageFault_Handler
115 .syntax unified
116 .thumb
117 .thumb_func
119 UsageFault_Handler:
120 .LFB243:
125:Core/Src/stm32f4xx_it.c **** }
126:Core/Src/stm32f4xx_it.c ****
127:Core/Src/stm32f4xx_it.c **** /**
128:Core/Src/stm32f4xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
129:Core/Src/stm32f4xx_it.c **** */
130:Core/Src/stm32f4xx_it.c **** void UsageFault_Handler(void)
131:Core/Src/stm32f4xx_it.c **** {
121 .loc 1 131 1 view -0
122 .cfi_startproc
123 @ Volatile: function does not return.
124 @ args = 0, pretend = 0, frame = 0
125 @ frame_needed = 0, uses_anonymous_args = 0
126 @ link register save eliminated.
127 .L10:
132:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
133:Core/Src/stm32f4xx_it.c ****
134:Core/Src/stm32f4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
135:Core/Src/stm32f4xx_it.c **** while (1)
128 .loc 1 135 3 view .LVU17
136:Core/Src/stm32f4xx_it.c **** {
137:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
138:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
139:Core/Src/stm32f4xx_it.c **** }
129 .loc 1 139 3 view .LVU18
135:Core/Src/stm32f4xx_it.c **** {
130 .loc 1 135 9 view .LVU19
131 0000 FEE7 b .L10
132 .cfi_endproc
133 .LFE243:
135 .section .text.SVC_Handler,"ax",%progbits
136 .align 1
137 .global SVC_Handler
138 .syntax unified
139 .thumb
140 .thumb_func
142 SVC_Handler:
143 .LFB244:
140:Core/Src/stm32f4xx_it.c **** }
141:Core/Src/stm32f4xx_it.c ****
142:Core/Src/stm32f4xx_it.c **** /**
143:Core/Src/stm32f4xx_it.c **** * @brief This function handles System service call via SWI instruction.
144:Core/Src/stm32f4xx_it.c **** */
145:Core/Src/stm32f4xx_it.c **** void SVC_Handler(void)
146:Core/Src/stm32f4xx_it.c **** {
144 .loc 1 146 1 view -0
145 .cfi_startproc
ARM GAS /tmp/ccmTyUBf.s page 6
146 @ args = 0, pretend = 0, frame = 0
147 @ frame_needed = 0, uses_anonymous_args = 0
148 @ link register save eliminated.
147:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
148:Core/Src/stm32f4xx_it.c ****
149:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
150:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
151:Core/Src/stm32f4xx_it.c ****
152:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
153:Core/Src/stm32f4xx_it.c **** }
149 .loc 1 153 1 view .LVU21
150 0000 7047 bx lr
151 .cfi_endproc
152 .LFE244:
154 .section .text.DebugMon_Handler,"ax",%progbits
155 .align 1
156 .global DebugMon_Handler
157 .syntax unified
158 .thumb
159 .thumb_func
161 DebugMon_Handler:
162 .LFB245:
154:Core/Src/stm32f4xx_it.c ****
155:Core/Src/stm32f4xx_it.c **** /**
156:Core/Src/stm32f4xx_it.c **** * @brief This function handles Debug monitor.
157:Core/Src/stm32f4xx_it.c **** */
158:Core/Src/stm32f4xx_it.c **** void DebugMon_Handler(void)
159:Core/Src/stm32f4xx_it.c **** {
163 .loc 1 159 1 view -0
164 .cfi_startproc
165 @ args = 0, pretend = 0, frame = 0
166 @ frame_needed = 0, uses_anonymous_args = 0
167 @ link register save eliminated.
160:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
161:Core/Src/stm32f4xx_it.c ****
162:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
163:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
164:Core/Src/stm32f4xx_it.c ****
165:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
166:Core/Src/stm32f4xx_it.c **** }
168 .loc 1 166 1 view .LVU23
169 0000 7047 bx lr
170 .cfi_endproc
171 .LFE245:
173 .section .text.PendSV_Handler,"ax",%progbits
174 .align 1
175 .global PendSV_Handler
176 .syntax unified
177 .thumb
178 .thumb_func
180 PendSV_Handler:
181 .LFB246:
167:Core/Src/stm32f4xx_it.c ****
168:Core/Src/stm32f4xx_it.c **** /**
169:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service.
170:Core/Src/stm32f4xx_it.c **** */
171:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void)
ARM GAS /tmp/ccmTyUBf.s page 7
172:Core/Src/stm32f4xx_it.c **** {
182 .loc 1 172 1 view -0
183 .cfi_startproc
184 @ args = 0, pretend = 0, frame = 0
185 @ frame_needed = 0, uses_anonymous_args = 0
186 @ link register save eliminated.
173:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
174:Core/Src/stm32f4xx_it.c ****
175:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
176:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
177:Core/Src/stm32f4xx_it.c ****
178:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
179:Core/Src/stm32f4xx_it.c **** }
187 .loc 1 179 1 view .LVU25
188 0000 7047 bx lr
189 .cfi_endproc
190 .LFE246:
192 .section .text.SysTick_Handler,"ax",%progbits
193 .align 1
194 .global SysTick_Handler
195 .syntax unified
196 .thumb
197 .thumb_func
199 SysTick_Handler:
200 .LFB247:
180:Core/Src/stm32f4xx_it.c ****
181:Core/Src/stm32f4xx_it.c **** /**
182:Core/Src/stm32f4xx_it.c **** * @brief This function handles System tick timer.
183:Core/Src/stm32f4xx_it.c **** */
184:Core/Src/stm32f4xx_it.c **** void SysTick_Handler(void)
185:Core/Src/stm32f4xx_it.c **** {
201 .loc 1 185 1 view -0
202 .cfi_startproc
203 @ args = 0, pretend = 0, frame = 0
204 @ frame_needed = 0, uses_anonymous_args = 0
205 0000 08B5 push {r3, lr}
206 .LCFI0:
207 .cfi_def_cfa_offset 8
208 .cfi_offset 3, -8
209 .cfi_offset 14, -4
186:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
187:Core/Src/stm32f4xx_it.c ****
188:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
189:Core/Src/stm32f4xx_it.c **** HAL_IncTick();
210 .loc 1 189 3 view .LVU27
211 0002 FFF7FEFF bl HAL_IncTick
212 .LVL0:
190:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
191:Core/Src/stm32f4xx_it.c ****
192:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
193:Core/Src/stm32f4xx_it.c **** }
213 .loc 1 193 1 is_stmt 0 view .LVU28
214 0006 08BD pop {r3, pc}
215 .cfi_endproc
216 .LFE247:
218 .section .text.EXTI0_IRQHandler,"ax",%progbits
219 .align 1
ARM GAS /tmp/ccmTyUBf.s page 8
220 .global EXTI0_IRQHandler
221 .syntax unified
222 .thumb
223 .thumb_func
225 EXTI0_IRQHandler:
226 .LFB248:
194:Core/Src/stm32f4xx_it.c ****
195:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
196:Core/Src/stm32f4xx_it.c **** /* STM32F4xx Peripheral Interrupt Handlers */
197:Core/Src/stm32f4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
198:Core/Src/stm32f4xx_it.c **** /* For the available peripheral interrupt handler names, */
199:Core/Src/stm32f4xx_it.c **** /* please refer to the startup file (startup_stm32f4xx.s). */
200:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
201:Core/Src/stm32f4xx_it.c ****
202:Core/Src/stm32f4xx_it.c **** /**
203:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line0 interrupt.
204:Core/Src/stm32f4xx_it.c **** */
205:Core/Src/stm32f4xx_it.c **** void EXTI0_IRQHandler(void)
206:Core/Src/stm32f4xx_it.c **** {
227 .loc 1 206 1 is_stmt 1 view -0
228 .cfi_startproc
229 @ args = 0, pretend = 0, frame = 0
230 @ frame_needed = 0, uses_anonymous_args = 0
231 0000 08B5 push {r3, lr}
232 .LCFI1:
233 .cfi_def_cfa_offset 8
234 .cfi_offset 3, -8
235 .cfi_offset 14, -4
207:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 0 */
208:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_start_DMA_N = ADC_BUFF_SIZE - hdma_adc1.Instance->NDTR;
236 .loc 1 208 3 view .LVU30
237 .loc 1 208 64 is_stmt 0 view .LVU31
238 0002 0C4B ldr r3, .L20
239 0004 1B68 ldr r3, [r3]
240 .loc 1 208 73 view .LVU32
241 0006 5B68 ldr r3, [r3, #4]
242 .loc 1 208 53 view .LVU33
243 0008 C3F16403 rsb r3, r3, #100
244 .loc 1 208 37 view .LVU34
245 000c 0A4A ldr r2, .L20+4
246 000e 9360 str r3, [r2, #8]
209:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_start_DMA_N < ADC_BUFF_SIZE/2) {
247 .loc 1 209 3 is_stmt 1 view .LVU35
248 .loc 1 209 18 is_stmt 0 view .LVU36
249 0010 9368 ldr r3, [r2, #8]
250 .loc 1 209 6 view .LVU37
251 0012 312B cmp r3, #49
252 0014 0AD8 bhi .L17
210:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =1; // first half DMA buffer
253 .loc 1 210 5 is_stmt 1 view .LVU38
254 .loc 1 210 40 is_stmt 0 view .LVU39
255 0016 1346 mov r3, r2
256 0018 0122 movs r2, #1
257 001a 1A71 strb r2, [r3, #4]
258 .L18:
211:Core/Src/stm32f4xx_it.c **** } else{
212:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =2; // second half DMA buffer
ARM GAS /tmp/ccmTyUBf.s page 9
213:Core/Src/stm32f4xx_it.c **** }
214:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_N++;
259 .loc 1 214 3 is_stmt 1 view .LVU40
260 .loc 1 214 14 is_stmt 0 view .LVU41
261 001c 064A ldr r2, .L20+4
262 001e 1368 ldr r3, [r2]
263 .loc 1 214 26 view .LVU42
264 0020 0133 adds r3, r3, #1
265 0022 1360 str r3, [r2]
215:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 0 */
216:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(CURR_STEP_START_TRG_Pin);
266 .loc 1 216 3 is_stmt 1 view .LVU43
267 0024 0120 movs r0, #1
268 0026 FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler
269 .LVL1:
217:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 1 */
218:Core/Src/stm32f4xx_it.c ****
219:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 1 */
220:Core/Src/stm32f4xx_it.c **** }
270 .loc 1 220 1 is_stmt 0 view .LVU44
271 002a 08BD pop {r3, pc}
272 .L17:
212:Core/Src/stm32f4xx_it.c **** }
273 .loc 1 212 5 is_stmt 1 view .LVU45
212:Core/Src/stm32f4xx_it.c **** }
274 .loc 1 212 40 is_stmt 0 view .LVU46
275 002c 024B ldr r3, .L20+4
276 002e 0222 movs r2, #2
277 0030 1A71 strb r2, [r3, #4]
278 0032 F3E7 b .L18
279 .L21:
280 .align 2
281 .L20:
282 0034 00000000 .word hdma_adc1
283 0038 00000000 .word Sweep_state
284 .cfi_endproc
285 .LFE248:
287 .section .text.EXTI3_IRQHandler,"ax",%progbits
288 .align 1
289 .global EXTI3_IRQHandler
290 .syntax unified
291 .thumb
292 .thumb_func
294 EXTI3_IRQHandler:
295 .LFB249:
221:Core/Src/stm32f4xx_it.c ****
222:Core/Src/stm32f4xx_it.c **** /**
223:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line3 interrupt.
224:Core/Src/stm32f4xx_it.c **** */
225:Core/Src/stm32f4xx_it.c **** void EXTI3_IRQHandler(void)
226:Core/Src/stm32f4xx_it.c **** {
296 .loc 1 226 1 is_stmt 1 view -0
297 .cfi_startproc
298 @ args = 0, pretend = 0, frame = 0
299 @ frame_needed = 0, uses_anonymous_args = 0
300 0000 08B5 push {r3, lr}
301 .LCFI2:
ARM GAS /tmp/ccmTyUBf.s page 10
302 .cfi_def_cfa_offset 8
303 .cfi_offset 3, -8
304 .cfi_offset 14, -4
227:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 0 */
228:Core/Src/stm32f4xx_it.c ****
229:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 0 */
230:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(SWEEP_CYCLE_START_TRG_Pin);
305 .loc 1 230 3 view .LVU48
306 0002 0220 movs r0, #2
307 0004 FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler
308 .LVL2:
231:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 1 */
232:Core/Src/stm32f4xx_it.c ****
233:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 1 */
234:Core/Src/stm32f4xx_it.c **** }
309 .loc 1 234 1 is_stmt 0 view .LVU49
310 0008 08BD pop {r3, pc}
311 .cfi_endproc
312 .LFE249:
314 .section .text.DMA2_Stream0_IRQHandler,"ax",%progbits
315 .align 1
316 .global DMA2_Stream0_IRQHandler
317 .syntax unified
318 .thumb
319 .thumb_func
321 DMA2_Stream0_IRQHandler:
322 .LFB250:
235:Core/Src/stm32f4xx_it.c ****
236:Core/Src/stm32f4xx_it.c **** /**
237:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream0 global interrupt.
238:Core/Src/stm32f4xx_it.c **** */
239:Core/Src/stm32f4xx_it.c **** void DMA2_Stream0_IRQHandler(void)
240:Core/Src/stm32f4xx_it.c **** {
323 .loc 1 240 1 is_stmt 1 view -0
324 .cfi_startproc
325 @ args = 0, pretend = 0, frame = 0
326 @ frame_needed = 0, uses_anonymous_args = 0
327 0000 08B5 push {r3, lr}
328 .LCFI3:
329 .cfi_def_cfa_offset 8
330 .cfi_offset 3, -8
331 .cfi_offset 14, -4
241:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
242:Core/Src/stm32f4xx_it.c ****
243:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 0 */
244:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1);
332 .loc 1 244 3 view .LVU51
333 0002 0248 ldr r0, .L26
334 0004 FFF7FEFF bl HAL_DMA_IRQHandler
335 .LVL3:
245:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
246:Core/Src/stm32f4xx_it.c ****
247:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 1 */
248:Core/Src/stm32f4xx_it.c **** }
336 .loc 1 248 1 is_stmt 0 view .LVU52
337 0008 08BD pop {r3, pc}
338 .L27:
ARM GAS /tmp/ccmTyUBf.s page 11
339 000a 00BF .align 2
340 .L26:
341 000c 00000000 .word hdma_adc1
342 .cfi_endproc
343 .LFE250:
345 .section .text.OTG_FS_IRQHandler,"ax",%progbits
346 .align 1
347 .global OTG_FS_IRQHandler
348 .syntax unified
349 .thumb
350 .thumb_func
352 OTG_FS_IRQHandler:
353 .LFB251:
249:Core/Src/stm32f4xx_it.c ****
250:Core/Src/stm32f4xx_it.c **** /**
251:Core/Src/stm32f4xx_it.c **** * @brief This function handles USB On The Go FS global interrupt.
252:Core/Src/stm32f4xx_it.c **** */
253:Core/Src/stm32f4xx_it.c **** void OTG_FS_IRQHandler(void)
254:Core/Src/stm32f4xx_it.c **** {
354 .loc 1 254 1 is_stmt 1 view -0
355 .cfi_startproc
356 @ args = 0, pretend = 0, frame = 0
357 @ frame_needed = 0, uses_anonymous_args = 0
358 0000 08B5 push {r3, lr}
359 .LCFI4:
360 .cfi_def_cfa_offset 8
361 .cfi_offset 3, -8
362 .cfi_offset 14, -4
255:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 0 */
256:Core/Src/stm32f4xx_it.c ****
257:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 0 */
258:Core/Src/stm32f4xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
363 .loc 1 258 3 view .LVU54
364 0002 0248 ldr r0, .L30
365 0004 FFF7FEFF bl HAL_PCD_IRQHandler
366 .LVL4:
259:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 1 */
260:Core/Src/stm32f4xx_it.c ****
261:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 1 */
262:Core/Src/stm32f4xx_it.c **** }
367 .loc 1 262 1 is_stmt 0 view .LVU55
368 0008 08BD pop {r3, pc}
369 .L31:
370 000a 00BF .align 2
371 .L30:
372 000c 00000000 .word hpcd_USB_OTG_FS
373 .cfi_endproc
374 .LFE251:
376 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits
377 .align 1
378 .global HAL_ADC_ConvCpltCallback
379 .syntax unified
380 .thumb
381 .thumb_func
383 HAL_ADC_ConvCpltCallback:
384 .LVL5:
385 .LFB252:
ARM GAS /tmp/ccmTyUBf.s page 12
263:Core/Src/stm32f4xx_it.c ****
264:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 1 */
265:Core/Src/stm32f4xx_it.c ****
266:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
267:Core/Src/stm32f4xx_it.c **** {
386 .loc 1 267 1 is_stmt 1 view -0
387 .cfi_startproc
388 @ args = 0, pretend = 0, frame = 0
389 @ frame_needed = 0, uses_anonymous_args = 0
390 .loc 1 267 1 is_stmt 0 view .LVU57
391 0000 08B5 push {r3, lr}
392 .LCFI5:
393 .cfi_def_cfa_offset 8
394 .cfi_offset 3, -8
395 .cfi_offset 14, -4
268:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET);
396 .loc 1 268 3 is_stmt 1 view .LVU58
397 0002 0122 movs r2, #1
398 0004 8021 movs r1, #128
399 0006 3448 ldr r0, .L44
400 .LVL6:
401 .loc 1 268 3 is_stmt 0 view .LVU59
402 0008 FFF7FEFF bl HAL_GPIO_WritePin
403 .LVL7:
269:Core/Src/stm32f4xx_it.c ****
270:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 2) {
404 .loc 1 270 3 is_stmt 1 view .LVU60
405 .loc 1 270 18 is_stmt 0 view .LVU61
406 000c 334B ldr r3, .L44+4
407 000e 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2
408 0010 DBB2 uxtb r3, r3
409 .loc 1 270 6 view .LVU62
410 0012 022B cmp r3, #2
411 0014 01D0 beq .L43
412 .LBB2:
271:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half
272:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) {
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
274:Core/Src/stm32f4xx_it.c **** }
275:Core/Src/stm32f4xx_it.c ****
276:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N - ADC_BUFF_SIZE/2;
277:Core/Src/stm32f4xx_it.c ****
278:Core/Src/stm32f4xx_it.c ****
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
282:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
283:Core/Src/stm32f4xx_it.c ****
284:Core/Src/stm32f4xx_it.c ****
285:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
286:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
287:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
288:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
289:Core/Src/stm32f4xx_it.c ****
290:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE; i++) {
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
292:Core/Src/stm32f4xx_it.c **** }
ARM GAS /tmp/ccmTyUBf.s page 13
293:Core/Src/stm32f4xx_it.c **** ADC_proc.N = ADC_BUFF_SIZE - Sweep_state.curr_step_start_DMA_N;
294:Core/Src/stm32f4xx_it.c ****
295:Core/Src/stm32f4xx_it.c ****
296:Core/Src/stm32f4xx_it.c **** }else{
297:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < ADC_BUFF_SIZE; i++) {
413 .loc 1 297 19 view .LVU63
414 0016 3223 movs r3, #50
415 0018 41E0 b .L33
416 .L43:
417 .LBE2:
271:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half
418 .loc 1 271 5 is_stmt 1 view .LVU64
271:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half
419 .loc 1 271 40 is_stmt 0 view .LVU65
420 001a 304B ldr r3, .L44+4
421 001c 0022 movs r2, #0
422 001e 1A71 strb r2, [r3, #4]
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
423 .loc 1 272 5 is_stmt 1 view .LVU66
424 .LBB3:
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
425 .loc 1 272 10 view .LVU67
426 .LVL8:
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
427 .loc 1 272 19 is_stmt 0 view .LVU68
428 0020 3223 movs r3, #50
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
429 .loc 1 272 5 view .LVU69
430 0022 07E0 b .L34
431 .LVL9:
432 .L35:
273:Core/Src/stm32f4xx_it.c **** }
433 .loc 1 273 7 is_stmt 1 view .LVU70
273:Core/Src/stm32f4xx_it.c **** }
434 .loc 1 273 15 is_stmt 0 view .LVU71
435 0024 2E49 ldr r1, .L44+8
436 0026 4A68 ldr r2, [r1, #4]
273:Core/Src/stm32f4xx_it.c **** }
437 .loc 1 273 41 view .LVU72
438 0028 2E48 ldr r0, .L44+12
439 002a 30F81300 ldrh r0, [r0, r3, lsl #1]
273:Core/Src/stm32f4xx_it.c **** }
440 .loc 1 273 20 view .LVU73
441 002e 0244 add r2, r2, r0
442 0030 4A60 str r2, [r1, #4]
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
443 .loc 1 272 80 is_stmt 1 discriminator 3 view .LVU74
444 0032 0133 adds r3, r3, #1
445 .LVL10:
446 .L34:
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
447 .loc 1 272 42 discriminator 1 view .LVU75
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
448 .loc 1 272 55 is_stmt 0 discriminator 1 view .LVU76
449 0034 294A ldr r2, .L44+4
450 0036 9268 ldr r2, [r2, #8]
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
ARM GAS /tmp/ccmTyUBf.s page 14
451 .loc 1 272 42 discriminator 1 view .LVU77
452 0038 9A42 cmp r2, r3
453 003a F3D8 bhi .L35
454 .LBE3:
276:Core/Src/stm32f4xx_it.c ****
455 .loc 1 276 5 is_stmt 1 view .LVU78
276:Core/Src/stm32f4xx_it.c ****
456 .loc 1 276 30 is_stmt 0 view .LVU79
457 003c 2748 ldr r0, .L44+4
458 003e 8168 ldr r1, [r0, #8]
276:Core/Src/stm32f4xx_it.c ****
459 .loc 1 276 53 view .LVU80
460 0040 3239 subs r1, r1, #50
276:Core/Src/stm32f4xx_it.c ****
461 .loc 1 276 13 view .LVU81
462 0042 274B ldr r3, .L44+8
463 .LVL11:
276:Core/Src/stm32f4xx_it.c ****
464 .loc 1 276 13 view .LVU82
465 0044 DA68 ldr r2, [r3, #12]
276:Core/Src/stm32f4xx_it.c ****
466 .loc 1 276 16 view .LVU83
467 0046 0A44 add r2, r2, r1
468 0048 DA60 str r2, [r3, #12]
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
469 .loc 1 279 5 is_stmt 1 view .LVU84
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
470 .loc 1 279 35 is_stmt 0 view .LVU85
471 004a 5968 ldr r1, [r3, #4]
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
472 .loc 1 279 25 view .LVU86
473 004c 264A ldr r2, .L44+16
474 004e 5160 str r1, [r2, #4]
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
475 .loc 1 280 5 is_stmt 1 view .LVU87
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
476 .loc 1 280 35 is_stmt 0 view .LVU88
477 0050 9968 ldr r1, [r3, #8]
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
478 .loc 1 280 25 view .LVU89
479 0052 9160 str r1, [r2, #8]
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
480 .loc 1 281 5 is_stmt 1 view .LVU90
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
481 .loc 1 281 33 is_stmt 0 view .LVU91
482 0054 D968 ldr r1, [r3, #12]
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
483 .loc 1 281 23 view .LVU92
484 0056 D160 str r1, [r2, #12]
282:Core/Src/stm32f4xx_it.c ****
485 .loc 1 282 5 is_stmt 1 view .LVU93
282:Core/Src/stm32f4xx_it.c ****
486 .loc 1 282 28 is_stmt 0 view .LVU94
487 0058 0221 movs r1, #2
488 005a 1170 strb r1, [r2]
285:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
489 .loc 1 285 5 is_stmt 1 view .LVU95
ARM GAS /tmp/ccmTyUBf.s page 15
285:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
490 .loc 1 285 18 is_stmt 0 view .LVU96
491 005c 0022 movs r2, #0
492 005e 5A60 str r2, [r3, #4]
286:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
493 .loc 1 286 5 is_stmt 1 view .LVU97
286:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
494 .loc 1 286 16 is_stmt 0 view .LVU98
495 0060 DA60 str r2, [r3, #12]
287:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
496 .loc 1 287 5 is_stmt 1 view .LVU99
287:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
497 .loc 1 287 18 is_stmt 0 view .LVU100
498 0062 9A60 str r2, [r3, #8]
288:Core/Src/stm32f4xx_it.c ****
499 .loc 1 288 5 is_stmt 1 view .LVU101
288:Core/Src/stm32f4xx_it.c ****
500 .loc 1 288 21 is_stmt 0 view .LVU102
501 0064 0122 movs r2, #1
502 0066 1A70 strb r2, [r3]
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
503 .loc 1 290 5 is_stmt 1 view .LVU103
504 .LBB4:
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
505 .loc 1 290 10 view .LVU104
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
506 .loc 1 290 19 is_stmt 0 view .LVU105
507 0068 8368 ldr r3, [r0, #8]
508 .LVL12:
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
509 .loc 1 290 5 view .LVU106
510 006a 07E0 b .L36
511 .L37:
291:Core/Src/stm32f4xx_it.c **** }
512 .loc 1 291 7 is_stmt 1 view .LVU107
291:Core/Src/stm32f4xx_it.c **** }
513 .loc 1 291 15 is_stmt 0 view .LVU108
514 006c 1C49 ldr r1, .L44+8
515 006e 4A68 ldr r2, [r1, #4]
291:Core/Src/stm32f4xx_it.c **** }
516 .loc 1 291 41 view .LVU109
517 0070 1C48 ldr r0, .L44+12
518 0072 30F81300 ldrh r0, [r0, r3, lsl #1]
291:Core/Src/stm32f4xx_it.c **** }
519 .loc 1 291 20 view .LVU110
520 0076 0244 add r2, r2, r0
521 0078 4A60 str r2, [r1, #4]
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
522 .loc 1 290 78 is_stmt 1 discriminator 3 view .LVU111
523 007a 0133 adds r3, r3, #1
524 .LVL13:
525 .L36:
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
526 .loc 1 290 60 discriminator 1 view .LVU112
527 007c 632B cmp r3, #99
528 007e F5D9 bls .L37
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
ARM GAS /tmp/ccmTyUBf.s page 16
529 .loc 1 290 60 is_stmt 0 discriminator 1 view .LVU113
530 .LBE4:
293:Core/Src/stm32f4xx_it.c ****
531 .loc 1 293 5 is_stmt 1 view .LVU114
293:Core/Src/stm32f4xx_it.c ****
532 .loc 1 293 45 is_stmt 0 view .LVU115
533 0080 164B ldr r3, .L44+4
534 .LVL14:
293:Core/Src/stm32f4xx_it.c ****
535 .loc 1 293 45 view .LVU116
536 0082 9B68 ldr r3, [r3, #8]
293:Core/Src/stm32f4xx_it.c ****
537 .loc 1 293 32 view .LVU117
538 0084 C3F16403 rsb r3, r3, #100
293:Core/Src/stm32f4xx_it.c ****
539 .loc 1 293 16 view .LVU118
540 0088 154A ldr r2, .L44+8
541 008a D360 str r3, [r2, #12]
542 008c 0DE0 b .L38
543 .LVL15:
544 .L39:
545 .LBB5:
298:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
546 .loc 1 298 7 is_stmt 1 view .LVU119
547 .loc 1 298 15 is_stmt 0 view .LVU120
548 008e 1449 ldr r1, .L44+8
549 0090 4A68 ldr r2, [r1, #4]
550 .loc 1 298 41 view .LVU121
551 0092 1448 ldr r0, .L44+12
552 0094 30F81300 ldrh r0, [r0, r3, lsl #1]
553 .loc 1 298 20 view .LVU122
554 0098 0244 add r2, r2, r0
555 009a 4A60 str r2, [r1, #4]
297:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
556 .loc 1 297 60 is_stmt 1 discriminator 3 view .LVU123
557 009c 0133 adds r3, r3, #1
558 .LVL16:
559 .L33:
297:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
560 .loc 1 297 42 discriminator 1 view .LVU124
561 009e 632B cmp r3, #99
562 00a0 F5D9 bls .L39
563 .LBE5:
299:Core/Src/stm32f4xx_it.c **** }
300:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE - ADC_BUFF_SIZE/2;
564 .loc 1 300 5 view .LVU125
565 .loc 1 300 13 is_stmt 0 view .LVU126
566 00a2 0F4A ldr r2, .L44+8
567 00a4 D368 ldr r3, [r2, #12]
568 .LVL17:
569 .loc 1 300 16 view .LVU127
570 00a6 3233 adds r3, r3, #50
571 00a8 D360 str r3, [r2, #12]
572 .LVL18:
573 .L38:
301:Core/Src/stm32f4xx_it.c **** }
302:Core/Src/stm32f4xx_it.c ****
ARM GAS /tmp/ccmTyUBf.s page 17
303:Core/Src/stm32f4xx_it.c **** //if (0){
304:Core/Src/stm32f4xx_it.c **** if (ADC_proc.N >= ADC_BUFF_SIZE*100){
574 .loc 1 304 3 is_stmt 1 view .LVU128
575 .loc 1 304 15 is_stmt 0 view .LVU129
576 00aa 0D4B ldr r3, .L44+8
577 00ac DA68 ldr r2, [r3, #12]
578 .loc 1 304 6 view .LVU130
579 00ae 42F20F73 movw r3, #9999
580 00b2 9A42 cmp r2, r3
581 00b4 0FD9 bls .L32
305:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
582 .loc 1 305 5 is_stmt 1 view .LVU131
583 .loc 1 305 35 is_stmt 0 view .LVU132
584 00b6 0A4B ldr r3, .L44+8
585 00b8 5968 ldr r1, [r3, #4]
586 .loc 1 305 25 view .LVU133
587 00ba 0B4A ldr r2, .L44+16
588 00bc 5160 str r1, [r2, #4]
306:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
589 .loc 1 306 5 is_stmt 1 view .LVU134
590 .loc 1 306 35 is_stmt 0 view .LVU135
591 00be 9968 ldr r1, [r3, #8]
592 .loc 1 306 25 view .LVU136
593 00c0 9160 str r1, [r2, #8]
307:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
594 .loc 1 307 5 is_stmt 1 view .LVU137
595 .loc 1 307 33 is_stmt 0 view .LVU138
596 00c2 D968 ldr r1, [r3, #12]
597 .loc 1 307 23 view .LVU139
598 00c4 D160 str r1, [r2, #12]
308:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
599 .loc 1 308 5 is_stmt 1 view .LVU140
600 .loc 1 308 28 is_stmt 0 view .LVU141
601 00c6 0221 movs r1, #2
602 00c8 1170 strb r1, [r2]
309:Core/Src/stm32f4xx_it.c ****
310:Core/Src/stm32f4xx_it.c ****
311:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
603 .loc 1 311 5 is_stmt 1 view .LVU142
604 .loc 1 311 18 is_stmt 0 view .LVU143
605 00ca 0022 movs r2, #0
606 00cc 5A60 str r2, [r3, #4]
312:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
607 .loc 1 312 5 is_stmt 1 view .LVU144
608 .loc 1 312 16 is_stmt 0 view .LVU145
609 00ce DA60 str r2, [r3, #12]
313:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
610 .loc 1 313 5 is_stmt 1 view .LVU146
611 .loc 1 313 18 is_stmt 0 view .LVU147
612 00d0 9A60 str r2, [r3, #8]
314:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
613 .loc 1 314 5 is_stmt 1 view .LVU148
614 .loc 1 314 21 is_stmt 0 view .LVU149
615 00d2 0122 movs r2, #1
616 00d4 1A70 strb r2, [r3]
617 .L32:
315:Core/Src/stm32f4xx_it.c **** }
ARM GAS /tmp/ccmTyUBf.s page 18
316:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled
317:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here
318:Core/Src/stm32f4xx_it.c **** }
618 .loc 1 318 1 view .LVU150
619 00d6 08BD pop {r3, pc}
620 .L45:
621 .align 2
622 .L44:
623 00d8 00040240 .word 1073873920
624 00dc 00000000 .word Sweep_state
625 00e0 00000000 .word ADC_proc
626 00e4 00000000 .word ADC1_buff_circular
627 00e8 00000000 .word ADC_proc_shadow
628 .cfi_endproc
629 .LFE252:
631 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits
632 .align 1
633 .global HAL_ADC_ConvHalfCpltCallback
634 .syntax unified
635 .thumb
636 .thumb_func
638 HAL_ADC_ConvHalfCpltCallback:
639 .LVL19:
640 .LFB253:
319:Core/Src/stm32f4xx_it.c ****
320:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
321:Core/Src/stm32f4xx_it.c **** {
641 .loc 1 321 1 is_stmt 1 view -0
642 .cfi_startproc
643 @ args = 0, pretend = 0, frame = 0
644 @ frame_needed = 0, uses_anonymous_args = 0
645 .loc 1 321 1 is_stmt 0 view .LVU152
646 0000 08B5 push {r3, lr}
647 .LCFI6:
648 .cfi_def_cfa_offset 8
649 .cfi_offset 3, -8
650 .cfi_offset 14, -4
322:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET);
323:Core/Src/stm32f4xx_it.c ****
324:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin);
651 .loc 1 324 3 is_stmt 1 view .LVU153
652 0002 8021 movs r1, #128
653 0004 2748 ldr r0, .L57
654 .LVL20:
655 .loc 1 324 3 is_stmt 0 view .LVU154
656 0006 FFF7FEFF bl HAL_GPIO_TogglePin
657 .LVL21:
325:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 1) {
658 .loc 1 325 3 is_stmt 1 view .LVU155
659 .loc 1 325 18 is_stmt 0 view .LVU156
660 000a 274B ldr r3, .L57+4
661 000c 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2
662 000e DBB2 uxtb r3, r3
663 .loc 1 325 6 view .LVU157
664 0010 012B cmp r3, #1
665 0012 01D0 beq .L56
666 .LBB6:
ARM GAS /tmp/ccmTyUBf.s page 19
326:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0;
327:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) {
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
329:Core/Src/stm32f4xx_it.c **** }
330:Core/Src/stm32f4xx_it.c ****
331:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N;
332:Core/Src/stm32f4xx_it.c ****
333:Core/Src/stm32f4xx_it.c ****
334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
337:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
338:Core/Src/stm32f4xx_it.c ****
339:Core/Src/stm32f4xx_it.c ****
340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
341:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
342:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
343:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
344:Core/Src/stm32f4xx_it.c ****
345:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE/2; i++) {
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
347:Core/Src/stm32f4xx_it.c **** }
348:Core/Src/stm32f4xx_it.c **** ADC_proc.N = Sweep_state.curr_step_start_DMA_N;
349:Core/Src/stm32f4xx_it.c ****
350:Core/Src/stm32f4xx_it.c **** }else{
351:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < ADC_BUFF_SIZE/2; i++) {
667 .loc 1 351 19 view .LVU158
668 0014 0023 movs r3, #0
669 0016 3DE0 b .L47
670 .L56:
671 .LBE6:
326:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0;
672 .loc 1 326 5 is_stmt 1 view .LVU159
326:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0;
673 .loc 1 326 40 is_stmt 0 view .LVU160
674 0018 0023 movs r3, #0
675 001a 234A ldr r2, .L57+4
676 001c 1371 strb r3, [r2, #4]
327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
677 .loc 1 327 5 is_stmt 1 view .LVU161
678 .LBB7:
327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
679 .loc 1 327 10 view .LVU162
680 .LVL22:
327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
681 .loc 1 327 5 is_stmt 0 view .LVU163
682 001e 07E0 b .L48
683 .LVL23:
684 .L49:
328:Core/Src/stm32f4xx_it.c **** }
685 .loc 1 328 7 is_stmt 1 view .LVU164
328:Core/Src/stm32f4xx_it.c **** }
686 .loc 1 328 15 is_stmt 0 view .LVU165
687 0020 2249 ldr r1, .L57+8
688 0022 4A68 ldr r2, [r1, #4]
328:Core/Src/stm32f4xx_it.c **** }
689 .loc 1 328 41 view .LVU166
ARM GAS /tmp/ccmTyUBf.s page 20
690 0024 2248 ldr r0, .L57+12
691 0026 30F81300 ldrh r0, [r0, r3, lsl #1]
328:Core/Src/stm32f4xx_it.c **** }
692 .loc 1 328 20 view .LVU167
693 002a 0244 add r2, r2, r0
694 002c 4A60 str r2, [r1, #4]
327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
695 .loc 1 327 66 is_stmt 1 discriminator 3 view .LVU168
696 002e 0133 adds r3, r3, #1
697 .LVL24:
698 .L48:
327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
699 .loc 1 327 28 discriminator 1 view .LVU169
327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
700 .loc 1 327 41 is_stmt 0 discriminator 1 view .LVU170
701 0030 1D4A ldr r2, .L57+4
702 0032 9268 ldr r2, [r2, #8]
327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
703 .loc 1 327 28 discriminator 1 view .LVU171
704 0034 9A42 cmp r2, r3
705 0036 F3D8 bhi .L49
706 .LBE7:
331:Core/Src/stm32f4xx_it.c ****
707 .loc 1 331 5 is_stmt 1 view .LVU172
331:Core/Src/stm32f4xx_it.c ****
708 .loc 1 331 30 is_stmt 0 view .LVU173
709 0038 1B49 ldr r1, .L57+4
710 003a 8868 ldr r0, [r1, #8]
331:Core/Src/stm32f4xx_it.c ****
711 .loc 1 331 13 view .LVU174
712 003c 1B4B ldr r3, .L57+8
713 .LVL25:
331:Core/Src/stm32f4xx_it.c ****
714 .loc 1 331 13 view .LVU175
715 003e DA68 ldr r2, [r3, #12]
331:Core/Src/stm32f4xx_it.c ****
716 .loc 1 331 16 view .LVU176
717 0040 0244 add r2, r2, r0
718 0042 DA60 str r2, [r3, #12]
334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
719 .loc 1 334 5 is_stmt 1 view .LVU177
334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
720 .loc 1 334 35 is_stmt 0 view .LVU178
721 0044 5868 ldr r0, [r3, #4]
334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
722 .loc 1 334 25 view .LVU179
723 0046 1B4A ldr r2, .L57+16
724 0048 5060 str r0, [r2, #4]
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
725 .loc 1 335 5 is_stmt 1 view .LVU180
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
726 .loc 1 335 35 is_stmt 0 view .LVU181
727 004a 9868 ldr r0, [r3, #8]
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
728 .loc 1 335 25 view .LVU182
729 004c 9060 str r0, [r2, #8]
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
ARM GAS /tmp/ccmTyUBf.s page 21
730 .loc 1 336 5 is_stmt 1 view .LVU183
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
731 .loc 1 336 33 is_stmt 0 view .LVU184
732 004e D868 ldr r0, [r3, #12]
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
733 .loc 1 336 23 view .LVU185
734 0050 D060 str r0, [r2, #12]
337:Core/Src/stm32f4xx_it.c ****
735 .loc 1 337 5 is_stmt 1 view .LVU186
337:Core/Src/stm32f4xx_it.c ****
736 .loc 1 337 28 is_stmt 0 view .LVU187
737 0052 0220 movs r0, #2
738 0054 1070 strb r0, [r2]
340:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
739 .loc 1 340 5 is_stmt 1 view .LVU188
340:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
740 .loc 1 340 18 is_stmt 0 view .LVU189
741 0056 0022 movs r2, #0
742 0058 5A60 str r2, [r3, #4]
341:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
743 .loc 1 341 5 is_stmt 1 view .LVU190
341:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
744 .loc 1 341 16 is_stmt 0 view .LVU191
745 005a DA60 str r2, [r3, #12]
342:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
746 .loc 1 342 5 is_stmt 1 view .LVU192
342:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
747 .loc 1 342 18 is_stmt 0 view .LVU193
748 005c 9A60 str r2, [r3, #8]
343:Core/Src/stm32f4xx_it.c ****
749 .loc 1 343 5 is_stmt 1 view .LVU194
343:Core/Src/stm32f4xx_it.c ****
750 .loc 1 343 21 is_stmt 0 view .LVU195
751 005e 0122 movs r2, #1
752 0060 1A70 strb r2, [r3]
345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
753 .loc 1 345 5 is_stmt 1 view .LVU196
754 .LBB8:
345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
755 .loc 1 345 10 view .LVU197
345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
756 .loc 1 345 19 is_stmt 0 view .LVU198
757 0062 8B68 ldr r3, [r1, #8]
758 .LVL26:
345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
759 .loc 1 345 5 view .LVU199
760 0064 07E0 b .L50
761 .L51:
346:Core/Src/stm32f4xx_it.c **** }
762 .loc 1 346 7 is_stmt 1 view .LVU200
346:Core/Src/stm32f4xx_it.c **** }
763 .loc 1 346 15 is_stmt 0 view .LVU201
764 0066 1149 ldr r1, .L57+8
765 0068 4A68 ldr r2, [r1, #4]
346:Core/Src/stm32f4xx_it.c **** }
766 .loc 1 346 41 view .LVU202
767 006a 1148 ldr r0, .L57+12
ARM GAS /tmp/ccmTyUBf.s page 22
768 006c 30F81300 ldrh r0, [r0, r3, lsl #1]
346:Core/Src/stm32f4xx_it.c **** }
769 .loc 1 346 20 view .LVU203
770 0070 0244 add r2, r2, r0
771 0072 4A60 str r2, [r1, #4]
345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
772 .loc 1 345 80 is_stmt 1 discriminator 3 view .LVU204
773 0074 0133 adds r3, r3, #1
774 .LVL27:
775 .L50:
345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
776 .loc 1 345 60 discriminator 1 view .LVU205
777 0076 312B cmp r3, #49
778 0078 F5D9 bls .L51
345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
779 .loc 1 345 60 is_stmt 0 discriminator 1 view .LVU206
780 .LBE8:
348:Core/Src/stm32f4xx_it.c ****
781 .loc 1 348 5 is_stmt 1 view .LVU207
348:Core/Src/stm32f4xx_it.c ****
782 .loc 1 348 29 is_stmt 0 view .LVU208
783 007a 0B4B ldr r3, .L57+4
784 .LVL28:
348:Core/Src/stm32f4xx_it.c ****
785 .loc 1 348 29 view .LVU209
786 007c 9A68 ldr r2, [r3, #8]
348:Core/Src/stm32f4xx_it.c ****
787 .loc 1 348 16 view .LVU210
788 007e 0B4B ldr r3, .L57+8
789 0080 DA60 str r2, [r3, #12]
790 0082 0DE0 b .L46
791 .LVL29:
792 .L53:
793 .LBB9:
352:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
794 .loc 1 352 7 is_stmt 1 view .LVU211
795 .loc 1 352 15 is_stmt 0 view .LVU212
796 0084 0949 ldr r1, .L57+8
797 0086 4A68 ldr r2, [r1, #4]
798 .loc 1 352 41 view .LVU213
799 0088 0948 ldr r0, .L57+12
800 008a 30F81300 ldrh r0, [r0, r3, lsl #1]
801 .loc 1 352 20 view .LVU214
802 008e 0244 add r2, r2, r0
803 0090 4A60 str r2, [r1, #4]
351:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
804 .loc 1 351 48 is_stmt 1 discriminator 3 view .LVU215
805 0092 0133 adds r3, r3, #1
806 .LVL30:
807 .L47:
351:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
808 .loc 1 351 28 discriminator 1 view .LVU216
809 0094 312B cmp r3, #49
810 0096 F5D9 bls .L53
811 .LBE9:
353:Core/Src/stm32f4xx_it.c **** }
354:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE/2;
ARM GAS /tmp/ccmTyUBf.s page 23
812 .loc 1 354 5 view .LVU217
813 .loc 1 354 13 is_stmt 0 view .LVU218
814 0098 044A ldr r2, .L57+8
815 009a D368 ldr r3, [r2, #12]
816 .LVL31:
817 .loc 1 354 16 view .LVU219
818 009c 3233 adds r3, r3, #50
819 009e D360 str r3, [r2, #12]
820 .LVL32:
821 .L46:
355:Core/Src/stm32f4xx_it.c **** }
356:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled
357:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here
358:Core/Src/stm32f4xx_it.c **** }
822 .loc 1 358 1 view .LVU220
823 00a0 08BD pop {r3, pc}
824 .L58:
825 00a2 00BF .align 2
826 .L57:
827 00a4 00040240 .word 1073873920
828 00a8 00000000 .word Sweep_state
829 00ac 00000000 .word ADC_proc
830 00b0 00000000 .word ADC1_buff_circular
831 00b4 00000000 .word ADC_proc_shadow
832 .cfi_endproc
833 .LFE253:
835 .text
836 .Letext0:
837 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
838 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h"
839 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
840 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
841 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
842 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
843 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
844 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h"
845 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h"
846 .file 11 "Core/Inc/main.h"
847 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
ARM GAS /tmp/ccmTyUBf.s page 24
DEFINED SYMBOLS
*ABS*:00000000 stm32f4xx_it.c
/tmp/ccmTyUBf.s:21 .text.NMI_Handler:00000000 $t
/tmp/ccmTyUBf.s:27 .text.NMI_Handler:00000000 NMI_Handler
/tmp/ccmTyUBf.s:44 .text.HardFault_Handler:00000000 $t
/tmp/ccmTyUBf.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/ccmTyUBf.s:67 .text.MemManage_Handler:00000000 $t
/tmp/ccmTyUBf.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
/tmp/ccmTyUBf.s:90 .text.BusFault_Handler:00000000 $t
/tmp/ccmTyUBf.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
/tmp/ccmTyUBf.s:113 .text.UsageFault_Handler:00000000 $t
/tmp/ccmTyUBf.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
/tmp/ccmTyUBf.s:136 .text.SVC_Handler:00000000 $t
/tmp/ccmTyUBf.s:142 .text.SVC_Handler:00000000 SVC_Handler
/tmp/ccmTyUBf.s:155 .text.DebugMon_Handler:00000000 $t
/tmp/ccmTyUBf.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
/tmp/ccmTyUBf.s:174 .text.PendSV_Handler:00000000 $t
/tmp/ccmTyUBf.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
/tmp/ccmTyUBf.s:193 .text.SysTick_Handler:00000000 $t
/tmp/ccmTyUBf.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
/tmp/ccmTyUBf.s:219 .text.EXTI0_IRQHandler:00000000 $t
/tmp/ccmTyUBf.s:225 .text.EXTI0_IRQHandler:00000000 EXTI0_IRQHandler
/tmp/ccmTyUBf.s:282 .text.EXTI0_IRQHandler:00000034 $d
/tmp/ccmTyUBf.s:288 .text.EXTI3_IRQHandler:00000000 $t
/tmp/ccmTyUBf.s:294 .text.EXTI3_IRQHandler:00000000 EXTI3_IRQHandler
/tmp/ccmTyUBf.s:315 .text.DMA2_Stream0_IRQHandler:00000000 $t
/tmp/ccmTyUBf.s:321 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler
/tmp/ccmTyUBf.s:341 .text.DMA2_Stream0_IRQHandler:0000000c $d
/tmp/ccmTyUBf.s:346 .text.OTG_FS_IRQHandler:00000000 $t
/tmp/ccmTyUBf.s:352 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler
/tmp/ccmTyUBf.s:372 .text.OTG_FS_IRQHandler:0000000c $d
/tmp/ccmTyUBf.s:377 .text.HAL_ADC_ConvCpltCallback:00000000 $t
/tmp/ccmTyUBf.s:383 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback
/tmp/ccmTyUBf.s:623 .text.HAL_ADC_ConvCpltCallback:000000d8 $d
/tmp/ccmTyUBf.s:632 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t
/tmp/ccmTyUBf.s:638 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback
/tmp/ccmTyUBf.s:827 .text.HAL_ADC_ConvHalfCpltCallback:000000a4 $d
UNDEFINED SYMBOLS
HAL_IncTick
HAL_GPIO_EXTI_IRQHandler
hdma_adc1
Sweep_state
HAL_DMA_IRQHandler
HAL_PCD_IRQHandler
hpcd_USB_OTG_FS
HAL_GPIO_WritePin
ADC_proc
ADC1_buff_circular
ADC_proc_shadow
HAL_GPIO_TogglePin