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RFG_stm32_ADC_STM32F429/build/stm32f4xx_it.lst

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ARM GAS /tmp/ccoyPJk8.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f4xx_it.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/stm32f4xx_it.c"
20 .section .text.NMI_Handler,"ax",%progbits
21 .align 1
22 .global NMI_Handler
23 .syntax unified
24 .thumb
25 .thumb_func
27 NMI_Handler:
28 .LFB239:
1:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32f4xx_it.c **** /**
3:Core/Src/stm32f4xx_it.c **** ******************************************************************************
4:Core/Src/stm32f4xx_it.c **** * @file stm32f4xx_it.c
5:Core/Src/stm32f4xx_it.c **** * @brief Interrupt Service Routines.
6:Core/Src/stm32f4xx_it.c **** ******************************************************************************
7:Core/Src/stm32f4xx_it.c **** * @attention
8:Core/Src/stm32f4xx_it.c **** *
9:Core/Src/stm32f4xx_it.c **** * Copyright (c) 2025 STMicroelectronics.
10:Core/Src/stm32f4xx_it.c **** * All rights reserved.
11:Core/Src/stm32f4xx_it.c **** *
12:Core/Src/stm32f4xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
13:Core/Src/stm32f4xx_it.c **** * in the root directory of this software component.
14:Core/Src/stm32f4xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
15:Core/Src/stm32f4xx_it.c **** *
16:Core/Src/stm32f4xx_it.c **** ******************************************************************************
17:Core/Src/stm32f4xx_it.c **** */
18:Core/Src/stm32f4xx_it.c **** /* USER CODE END Header */
19:Core/Src/stm32f4xx_it.c ****
20:Core/Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/stm32f4xx_it.c **** #include "main.h"
22:Core/Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h"
23:Core/Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/
24:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */
25:Core/Src/stm32f4xx_it.c **** /* USER CODE END Includes */
26:Core/Src/stm32f4xx_it.c ****
27:Core/Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f4xx_it.c ****
30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */
ARM GAS /tmp/ccoyPJk8.s page 2
31:Core/Src/stm32f4xx_it.c ****
32:Core/Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/
33:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */
34:Core/Src/stm32f4xx_it.c ****
35:Core/Src/stm32f4xx_it.c **** /* USER CODE END PD */
36:Core/Src/stm32f4xx_it.c ****
37:Core/Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/
38:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */
39:Core/Src/stm32f4xx_it.c ****
40:Core/Src/stm32f4xx_it.c **** /* USER CODE END PM */
41:Core/Src/stm32f4xx_it.c ****
42:Core/Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/
43:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */
44:Core/Src/stm32f4xx_it.c ****
45:Core/Src/stm32f4xx_it.c **** /* USER CODE END PV */
46:Core/Src/stm32f4xx_it.c ****
47:Core/Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
48:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */
49:Core/Src/stm32f4xx_it.c ****
50:Core/Src/stm32f4xx_it.c **** /* USER CODE END PFP */
51:Core/Src/stm32f4xx_it.c ****
52:Core/Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/
53:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */
54:Core/Src/stm32f4xx_it.c ****
55:Core/Src/stm32f4xx_it.c **** /* USER CODE END 0 */
56:Core/Src/stm32f4xx_it.c ****
57:Core/Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/
58:Core/Src/stm32f4xx_it.c **** extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
59:Core/Src/stm32f4xx_it.c **** extern DMA_HandleTypeDef hdma_adc1;
60:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */
61:Core/Src/stm32f4xx_it.c **** /* Externs are provided via main.h; no extra declarations needed here */
62:Core/Src/stm32f4xx_it.c **** /* USER CODE END EV */
63:Core/Src/stm32f4xx_it.c ****
64:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
65:Core/Src/stm32f4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
66:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
67:Core/Src/stm32f4xx_it.c **** /**
68:Core/Src/stm32f4xx_it.c **** * @brief This function handles Non maskable interrupt.
69:Core/Src/stm32f4xx_it.c **** */
70:Core/Src/stm32f4xx_it.c **** void NMI_Handler(void)
71:Core/Src/stm32f4xx_it.c **** {
29 .loc 1 71 1 view -0
30 .cfi_startproc
31 @ Volatile: function does not return.
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
35 .L2:
72:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
73:Core/Src/stm32f4xx_it.c ****
74:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
75:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
76:Core/Src/stm32f4xx_it.c **** while (1)
36 .loc 1 76 4 view .LVU1
77:Core/Src/stm32f4xx_it.c **** {
78:Core/Src/stm32f4xx_it.c **** }
37 .loc 1 78 3 view .LVU2
ARM GAS /tmp/ccoyPJk8.s page 3
76:Core/Src/stm32f4xx_it.c **** {
38 .loc 1 76 10 view .LVU3
39 0000 FEE7 b .L2
40 .cfi_endproc
41 .LFE239:
43 .section .text.HardFault_Handler,"ax",%progbits
44 .align 1
45 .global HardFault_Handler
46 .syntax unified
47 .thumb
48 .thumb_func
50 HardFault_Handler:
51 .LFB240:
79:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
80:Core/Src/stm32f4xx_it.c **** }
81:Core/Src/stm32f4xx_it.c ****
82:Core/Src/stm32f4xx_it.c **** /**
83:Core/Src/stm32f4xx_it.c **** * @brief This function handles Hard fault interrupt.
84:Core/Src/stm32f4xx_it.c **** */
85:Core/Src/stm32f4xx_it.c **** void HardFault_Handler(void)
86:Core/Src/stm32f4xx_it.c **** {
52 .loc 1 86 1 view -0
53 .cfi_startproc
54 @ Volatile: function does not return.
55 @ args = 0, pretend = 0, frame = 0
56 @ frame_needed = 0, uses_anonymous_args = 0
57 @ link register save eliminated.
58 .L4:
87:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
88:Core/Src/stm32f4xx_it.c ****
89:Core/Src/stm32f4xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
90:Core/Src/stm32f4xx_it.c **** while (1)
59 .loc 1 90 3 view .LVU5
91:Core/Src/stm32f4xx_it.c **** {
92:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
93:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
94:Core/Src/stm32f4xx_it.c **** }
60 .loc 1 94 3 view .LVU6
90:Core/Src/stm32f4xx_it.c **** {
61 .loc 1 90 9 view .LVU7
62 0000 FEE7 b .L4
63 .cfi_endproc
64 .LFE240:
66 .section .text.MemManage_Handler,"ax",%progbits
67 .align 1
68 .global MemManage_Handler
69 .syntax unified
70 .thumb
71 .thumb_func
73 MemManage_Handler:
74 .LFB241:
95:Core/Src/stm32f4xx_it.c **** }
96:Core/Src/stm32f4xx_it.c ****
97:Core/Src/stm32f4xx_it.c **** /**
98:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault.
99:Core/Src/stm32f4xx_it.c **** */
100:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void)
ARM GAS /tmp/ccoyPJk8.s page 4
101:Core/Src/stm32f4xx_it.c **** {
75 .loc 1 101 1 view -0
76 .cfi_startproc
77 @ Volatile: function does not return.
78 @ args = 0, pretend = 0, frame = 0
79 @ frame_needed = 0, uses_anonymous_args = 0
80 @ link register save eliminated.
81 .L6:
102:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
103:Core/Src/stm32f4xx_it.c ****
104:Core/Src/stm32f4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
105:Core/Src/stm32f4xx_it.c **** while (1)
82 .loc 1 105 3 view .LVU9
106:Core/Src/stm32f4xx_it.c **** {
107:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
108:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
109:Core/Src/stm32f4xx_it.c **** }
83 .loc 1 109 3 view .LVU10
105:Core/Src/stm32f4xx_it.c **** {
84 .loc 1 105 9 view .LVU11
85 0000 FEE7 b .L6
86 .cfi_endproc
87 .LFE241:
89 .section .text.BusFault_Handler,"ax",%progbits
90 .align 1
91 .global BusFault_Handler
92 .syntax unified
93 .thumb
94 .thumb_func
96 BusFault_Handler:
97 .LFB242:
110:Core/Src/stm32f4xx_it.c **** }
111:Core/Src/stm32f4xx_it.c ****
112:Core/Src/stm32f4xx_it.c **** /**
113:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
114:Core/Src/stm32f4xx_it.c **** */
115:Core/Src/stm32f4xx_it.c **** void BusFault_Handler(void)
116:Core/Src/stm32f4xx_it.c **** {
98 .loc 1 116 1 view -0
99 .cfi_startproc
100 @ Volatile: function does not return.
101 @ args = 0, pretend = 0, frame = 0
102 @ frame_needed = 0, uses_anonymous_args = 0
103 @ link register save eliminated.
104 .L8:
117:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
118:Core/Src/stm32f4xx_it.c ****
119:Core/Src/stm32f4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
120:Core/Src/stm32f4xx_it.c **** while (1)
105 .loc 1 120 3 view .LVU13
121:Core/Src/stm32f4xx_it.c **** {
122:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
123:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
124:Core/Src/stm32f4xx_it.c **** }
106 .loc 1 124 3 view .LVU14
120:Core/Src/stm32f4xx_it.c **** {
107 .loc 1 120 9 view .LVU15
ARM GAS /tmp/ccoyPJk8.s page 5
108 0000 FEE7 b .L8
109 .cfi_endproc
110 .LFE242:
112 .section .text.UsageFault_Handler,"ax",%progbits
113 .align 1
114 .global UsageFault_Handler
115 .syntax unified
116 .thumb
117 .thumb_func
119 UsageFault_Handler:
120 .LFB243:
125:Core/Src/stm32f4xx_it.c **** }
126:Core/Src/stm32f4xx_it.c ****
127:Core/Src/stm32f4xx_it.c **** /**
128:Core/Src/stm32f4xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
129:Core/Src/stm32f4xx_it.c **** */
130:Core/Src/stm32f4xx_it.c **** void UsageFault_Handler(void)
131:Core/Src/stm32f4xx_it.c **** {
121 .loc 1 131 1 view -0
122 .cfi_startproc
123 @ Volatile: function does not return.
124 @ args = 0, pretend = 0, frame = 0
125 @ frame_needed = 0, uses_anonymous_args = 0
126 @ link register save eliminated.
127 .L10:
132:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
133:Core/Src/stm32f4xx_it.c ****
134:Core/Src/stm32f4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
135:Core/Src/stm32f4xx_it.c **** while (1)
128 .loc 1 135 3 view .LVU17
136:Core/Src/stm32f4xx_it.c **** {
137:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
138:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
139:Core/Src/stm32f4xx_it.c **** }
129 .loc 1 139 3 view .LVU18
135:Core/Src/stm32f4xx_it.c **** {
130 .loc 1 135 9 view .LVU19
131 0000 FEE7 b .L10
132 .cfi_endproc
133 .LFE243:
135 .section .text.SVC_Handler,"ax",%progbits
136 .align 1
137 .global SVC_Handler
138 .syntax unified
139 .thumb
140 .thumb_func
142 SVC_Handler:
143 .LFB244:
140:Core/Src/stm32f4xx_it.c **** }
141:Core/Src/stm32f4xx_it.c ****
142:Core/Src/stm32f4xx_it.c **** /**
143:Core/Src/stm32f4xx_it.c **** * @brief This function handles System service call via SWI instruction.
144:Core/Src/stm32f4xx_it.c **** */
145:Core/Src/stm32f4xx_it.c **** void SVC_Handler(void)
146:Core/Src/stm32f4xx_it.c **** {
144 .loc 1 146 1 view -0
145 .cfi_startproc
ARM GAS /tmp/ccoyPJk8.s page 6
146 @ args = 0, pretend = 0, frame = 0
147 @ frame_needed = 0, uses_anonymous_args = 0
148 @ link register save eliminated.
147:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
148:Core/Src/stm32f4xx_it.c ****
149:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
150:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
151:Core/Src/stm32f4xx_it.c ****
152:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
153:Core/Src/stm32f4xx_it.c **** }
149 .loc 1 153 1 view .LVU21
150 0000 7047 bx lr
151 .cfi_endproc
152 .LFE244:
154 .section .text.DebugMon_Handler,"ax",%progbits
155 .align 1
156 .global DebugMon_Handler
157 .syntax unified
158 .thumb
159 .thumb_func
161 DebugMon_Handler:
162 .LFB245:
154:Core/Src/stm32f4xx_it.c ****
155:Core/Src/stm32f4xx_it.c **** /**
156:Core/Src/stm32f4xx_it.c **** * @brief This function handles Debug monitor.
157:Core/Src/stm32f4xx_it.c **** */
158:Core/Src/stm32f4xx_it.c **** void DebugMon_Handler(void)
159:Core/Src/stm32f4xx_it.c **** {
163 .loc 1 159 1 view -0
164 .cfi_startproc
165 @ args = 0, pretend = 0, frame = 0
166 @ frame_needed = 0, uses_anonymous_args = 0
167 @ link register save eliminated.
160:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
161:Core/Src/stm32f4xx_it.c ****
162:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
163:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
164:Core/Src/stm32f4xx_it.c ****
165:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
166:Core/Src/stm32f4xx_it.c **** }
168 .loc 1 166 1 view .LVU23
169 0000 7047 bx lr
170 .cfi_endproc
171 .LFE245:
173 .section .text.PendSV_Handler,"ax",%progbits
174 .align 1
175 .global PendSV_Handler
176 .syntax unified
177 .thumb
178 .thumb_func
180 PendSV_Handler:
181 .LFB246:
167:Core/Src/stm32f4xx_it.c ****
168:Core/Src/stm32f4xx_it.c **** /**
169:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service.
170:Core/Src/stm32f4xx_it.c **** */
171:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void)
ARM GAS /tmp/ccoyPJk8.s page 7
172:Core/Src/stm32f4xx_it.c **** {
182 .loc 1 172 1 view -0
183 .cfi_startproc
184 @ args = 0, pretend = 0, frame = 0
185 @ frame_needed = 0, uses_anonymous_args = 0
186 @ link register save eliminated.
173:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
174:Core/Src/stm32f4xx_it.c ****
175:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
176:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
177:Core/Src/stm32f4xx_it.c ****
178:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
179:Core/Src/stm32f4xx_it.c **** }
187 .loc 1 179 1 view .LVU25
188 0000 7047 bx lr
189 .cfi_endproc
190 .LFE246:
192 .section .text.SysTick_Handler,"ax",%progbits
193 .align 1
194 .global SysTick_Handler
195 .syntax unified
196 .thumb
197 .thumb_func
199 SysTick_Handler:
200 .LFB247:
180:Core/Src/stm32f4xx_it.c ****
181:Core/Src/stm32f4xx_it.c **** /**
182:Core/Src/stm32f4xx_it.c **** * @brief This function handles System tick timer.
183:Core/Src/stm32f4xx_it.c **** */
184:Core/Src/stm32f4xx_it.c **** void SysTick_Handler(void)
185:Core/Src/stm32f4xx_it.c **** {
201 .loc 1 185 1 view -0
202 .cfi_startproc
203 @ args = 0, pretend = 0, frame = 0
204 @ frame_needed = 0, uses_anonymous_args = 0
205 0000 08B5 push {r3, lr}
206 .LCFI0:
207 .cfi_def_cfa_offset 8
208 .cfi_offset 3, -8
209 .cfi_offset 14, -4
186:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
187:Core/Src/stm32f4xx_it.c ****
188:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
189:Core/Src/stm32f4xx_it.c **** HAL_IncTick();
210 .loc 1 189 3 view .LVU27
211 0002 FFF7FEFF bl HAL_IncTick
212 .LVL0:
190:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
191:Core/Src/stm32f4xx_it.c ****
192:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
193:Core/Src/stm32f4xx_it.c **** }
213 .loc 1 193 1 is_stmt 0 view .LVU28
214 0006 08BD pop {r3, pc}
215 .cfi_endproc
216 .LFE247:
218 .section .text.EXTI0_IRQHandler,"ax",%progbits
219 .align 1
ARM GAS /tmp/ccoyPJk8.s page 8
220 .global EXTI0_IRQHandler
221 .syntax unified
222 .thumb
223 .thumb_func
225 EXTI0_IRQHandler:
226 .LFB248:
194:Core/Src/stm32f4xx_it.c ****
195:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
196:Core/Src/stm32f4xx_it.c **** /* STM32F4xx Peripheral Interrupt Handlers */
197:Core/Src/stm32f4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
198:Core/Src/stm32f4xx_it.c **** /* For the available peripheral interrupt handler names, */
199:Core/Src/stm32f4xx_it.c **** /* please refer to the startup file (startup_stm32f4xx.s). */
200:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
201:Core/Src/stm32f4xx_it.c ****
202:Core/Src/stm32f4xx_it.c **** /**
203:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line0 interrupt.
204:Core/Src/stm32f4xx_it.c **** */
205:Core/Src/stm32f4xx_it.c **** void EXTI0_IRQHandler(void)
206:Core/Src/stm32f4xx_it.c **** {
227 .loc 1 206 1 is_stmt 1 view -0
228 .cfi_startproc
229 @ args = 0, pretend = 0, frame = 0
230 @ frame_needed = 0, uses_anonymous_args = 0
231 0000 08B5 push {r3, lr}
232 .LCFI1:
233 .cfi_def_cfa_offset 8
234 .cfi_offset 3, -8
235 .cfi_offset 14, -4
207:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 0 */
208:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_start_DMA_N = ADC_BUFF_SIZE - hdma_adc1.Instance->NDTR;
236 .loc 1 208 3 view .LVU30
237 .loc 1 208 64 is_stmt 0 view .LVU31
238 0002 0C4B ldr r3, .L20
239 0004 1B68 ldr r3, [r3]
240 .loc 1 208 73 view .LVU32
241 0006 5B68 ldr r3, [r3, #4]
242 .loc 1 208 53 view .LVU33
243 0008 C3F16403 rsb r3, r3, #100
244 .loc 1 208 37 view .LVU34
245 000c 0A4A ldr r2, .L20+4
246 000e 9360 str r3, [r2, #8]
209:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_start_DMA_N < ADC_BUFF_SIZE/2) {
247 .loc 1 209 3 is_stmt 1 view .LVU35
248 .loc 1 209 18 is_stmt 0 view .LVU36
249 0010 9368 ldr r3, [r2, #8]
250 .loc 1 209 6 view .LVU37
251 0012 312B cmp r3, #49
252 0014 0AD8 bhi .L17
210:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =1; // first half DMA buffer
253 .loc 1 210 5 is_stmt 1 view .LVU38
254 .loc 1 210 40 is_stmt 0 view .LVU39
255 0016 1346 mov r3, r2
256 0018 0122 movs r2, #1
257 001a 1A71 strb r2, [r3, #4]
258 .L18:
211:Core/Src/stm32f4xx_it.c **** } else{
212:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =2; // second half DMA buffer
ARM GAS /tmp/ccoyPJk8.s page 9
213:Core/Src/stm32f4xx_it.c **** }
214:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_N++;
259 .loc 1 214 3 is_stmt 1 view .LVU40
260 .loc 1 214 14 is_stmt 0 view .LVU41
261 001c 064A ldr r2, .L20+4
262 001e 1368 ldr r3, [r2]
263 .loc 1 214 26 view .LVU42
264 0020 0133 adds r3, r3, #1
265 0022 1360 str r3, [r2]
215:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 0 */
216:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(CURR_STEP_START_TRG_Pin);
266 .loc 1 216 3 is_stmt 1 view .LVU43
267 0024 0120 movs r0, #1
268 0026 FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler
269 .LVL1:
217:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 1 */
218:Core/Src/stm32f4xx_it.c ****
219:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 1 */
220:Core/Src/stm32f4xx_it.c **** }
270 .loc 1 220 1 is_stmt 0 view .LVU44
271 002a 08BD pop {r3, pc}
272 .L17:
212:Core/Src/stm32f4xx_it.c **** }
273 .loc 1 212 5 is_stmt 1 view .LVU45
212:Core/Src/stm32f4xx_it.c **** }
274 .loc 1 212 40 is_stmt 0 view .LVU46
275 002c 024B ldr r3, .L20+4
276 002e 0222 movs r2, #2
277 0030 1A71 strb r2, [r3, #4]
278 0032 F3E7 b .L18
279 .L21:
280 .align 2
281 .L20:
282 0034 00000000 .word hdma_adc1
283 0038 00000000 .word Sweep_state
284 .cfi_endproc
285 .LFE248:
287 .section .text.EXTI3_IRQHandler,"ax",%progbits
288 .align 1
289 .global EXTI3_IRQHandler
290 .syntax unified
291 .thumb
292 .thumb_func
294 EXTI3_IRQHandler:
295 .LFB249:
221:Core/Src/stm32f4xx_it.c ****
222:Core/Src/stm32f4xx_it.c **** /**
223:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line3 interrupt.
224:Core/Src/stm32f4xx_it.c **** */
225:Core/Src/stm32f4xx_it.c **** void EXTI3_IRQHandler(void)
226:Core/Src/stm32f4xx_it.c **** {
296 .loc 1 226 1 is_stmt 1 view -0
297 .cfi_startproc
298 @ args = 0, pretend = 0, frame = 0
299 @ frame_needed = 0, uses_anonymous_args = 0
300 0000 08B5 push {r3, lr}
301 .LCFI2:
ARM GAS /tmp/ccoyPJk8.s page 10
302 .cfi_def_cfa_offset 8
303 .cfi_offset 3, -8
304 .cfi_offset 14, -4
227:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 0 */
228:Core/Src/stm32f4xx_it.c **** Sweep_state.sweep_cycle_started_flag = 1; //sweep cycle started
305 .loc 1 228 3 view .LVU48
306 .loc 1 228 40 is_stmt 0 view .LVU49
307 0002 044B ldr r3, .L24
308 0004 0122 movs r2, #1
309 0006 1A73 strb r2, [r3, #12]
229:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_N = 0;
310 .loc 1 229 3 is_stmt 1 view .LVU50
311 .loc 1 229 27 is_stmt 0 view .LVU51
312 0008 0022 movs r2, #0
313 000a 1A60 str r2, [r3]
230:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 0 */
231:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(SWEEP_CYCLE_START_TRG_Pin);
314 .loc 1 231 3 is_stmt 1 view .LVU52
315 000c 0820 movs r0, #8
316 000e FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler
317 .LVL2:
232:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 1 */
233:Core/Src/stm32f4xx_it.c ****
234:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 1 */
235:Core/Src/stm32f4xx_it.c **** }
318 .loc 1 235 1 is_stmt 0 view .LVU53
319 0012 08BD pop {r3, pc}
320 .L25:
321 .align 2
322 .L24:
323 0014 00000000 .word Sweep_state
324 .cfi_endproc
325 .LFE249:
327 .section .text.DMA2_Stream0_IRQHandler,"ax",%progbits
328 .align 1
329 .global DMA2_Stream0_IRQHandler
330 .syntax unified
331 .thumb
332 .thumb_func
334 DMA2_Stream0_IRQHandler:
335 .LFB250:
236:Core/Src/stm32f4xx_it.c ****
237:Core/Src/stm32f4xx_it.c **** /**
238:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream0 global interrupt.
239:Core/Src/stm32f4xx_it.c **** */
240:Core/Src/stm32f4xx_it.c **** void DMA2_Stream0_IRQHandler(void)
241:Core/Src/stm32f4xx_it.c **** {
336 .loc 1 241 1 is_stmt 1 view -0
337 .cfi_startproc
338 @ args = 0, pretend = 0, frame = 0
339 @ frame_needed = 0, uses_anonymous_args = 0
340 0000 08B5 push {r3, lr}
341 .LCFI3:
342 .cfi_def_cfa_offset 8
343 .cfi_offset 3, -8
344 .cfi_offset 14, -4
242:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
ARM GAS /tmp/ccoyPJk8.s page 11
243:Core/Src/stm32f4xx_it.c ****
244:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 0 */
245:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1);
345 .loc 1 245 3 view .LVU55
346 0002 0248 ldr r0, .L28
347 0004 FFF7FEFF bl HAL_DMA_IRQHandler
348 .LVL3:
246:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
247:Core/Src/stm32f4xx_it.c ****
248:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 1 */
249:Core/Src/stm32f4xx_it.c **** }
349 .loc 1 249 1 is_stmt 0 view .LVU56
350 0008 08BD pop {r3, pc}
351 .L29:
352 000a 00BF .align 2
353 .L28:
354 000c 00000000 .word hdma_adc1
355 .cfi_endproc
356 .LFE250:
358 .section .text.OTG_FS_IRQHandler,"ax",%progbits
359 .align 1
360 .global OTG_FS_IRQHandler
361 .syntax unified
362 .thumb
363 .thumb_func
365 OTG_FS_IRQHandler:
366 .LFB251:
250:Core/Src/stm32f4xx_it.c ****
251:Core/Src/stm32f4xx_it.c **** /**
252:Core/Src/stm32f4xx_it.c **** * @brief This function handles USB On The Go FS global interrupt.
253:Core/Src/stm32f4xx_it.c **** */
254:Core/Src/stm32f4xx_it.c **** void OTG_FS_IRQHandler(void)
255:Core/Src/stm32f4xx_it.c **** {
367 .loc 1 255 1 is_stmt 1 view -0
368 .cfi_startproc
369 @ args = 0, pretend = 0, frame = 0
370 @ frame_needed = 0, uses_anonymous_args = 0
371 0000 08B5 push {r3, lr}
372 .LCFI4:
373 .cfi_def_cfa_offset 8
374 .cfi_offset 3, -8
375 .cfi_offset 14, -4
256:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 0 */
257:Core/Src/stm32f4xx_it.c ****
258:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 0 */
259:Core/Src/stm32f4xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
376 .loc 1 259 3 view .LVU58
377 0002 0248 ldr r0, .L32
378 0004 FFF7FEFF bl HAL_PCD_IRQHandler
379 .LVL4:
260:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 1 */
261:Core/Src/stm32f4xx_it.c ****
262:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 1 */
263:Core/Src/stm32f4xx_it.c **** }
380 .loc 1 263 1 is_stmt 0 view .LVU59
381 0008 08BD pop {r3, pc}
382 .L33:
ARM GAS /tmp/ccoyPJk8.s page 12
383 000a 00BF .align 2
384 .L32:
385 000c 00000000 .word hpcd_USB_OTG_FS
386 .cfi_endproc
387 .LFE251:
389 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits
390 .align 1
391 .global HAL_ADC_ConvCpltCallback
392 .syntax unified
393 .thumb
394 .thumb_func
396 HAL_ADC_ConvCpltCallback:
397 .LVL5:
398 .LFB252:
264:Core/Src/stm32f4xx_it.c ****
265:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 1 */
266:Core/Src/stm32f4xx_it.c ****
267:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
268:Core/Src/stm32f4xx_it.c **** {
399 .loc 1 268 1 is_stmt 1 view -0
400 .cfi_startproc
401 @ args = 0, pretend = 0, frame = 0
402 @ frame_needed = 0, uses_anonymous_args = 0
403 .loc 1 268 1 is_stmt 0 view .LVU61
404 0000 08B5 push {r3, lr}
405 .LCFI5:
406 .cfi_def_cfa_offset 8
407 .cfi_offset 3, -8
408 .cfi_offset 14, -4
269:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET);
409 .loc 1 269 3 is_stmt 1 view .LVU62
410 0002 0122 movs r2, #1
411 0004 8021 movs r1, #128
412 0006 3448 ldr r0, .L46
413 .LVL6:
414 .loc 1 269 3 is_stmt 0 view .LVU63
415 0008 FFF7FEFF bl HAL_GPIO_WritePin
416 .LVL7:
270:Core/Src/stm32f4xx_it.c ****
271:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 2) {
417 .loc 1 271 3 is_stmt 1 view .LVU64
418 .loc 1 271 18 is_stmt 0 view .LVU65
419 000c 334B ldr r3, .L46+4
420 000e 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2
421 0010 DBB2 uxtb r3, r3
422 .loc 1 271 6 view .LVU66
423 0012 022B cmp r3, #2
424 0014 01D0 beq .L45
425 .LBB2:
272:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half
273:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) {
274:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
275:Core/Src/stm32f4xx_it.c **** }
276:Core/Src/stm32f4xx_it.c ****
277:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N - ADC_BUFF_SIZE/2;
278:Core/Src/stm32f4xx_it.c ****
279:Core/Src/stm32f4xx_it.c ****
ARM GAS /tmp/ccoyPJk8.s page 13
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
282:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
283:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
284:Core/Src/stm32f4xx_it.c ****
285:Core/Src/stm32f4xx_it.c ****
286:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
287:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
288:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
289:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
290:Core/Src/stm32f4xx_it.c ****
291:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE; i++) {
292:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
293:Core/Src/stm32f4xx_it.c **** }
294:Core/Src/stm32f4xx_it.c **** ADC_proc.N = ADC_BUFF_SIZE - Sweep_state.curr_step_start_DMA_N;
295:Core/Src/stm32f4xx_it.c ****
296:Core/Src/stm32f4xx_it.c ****
297:Core/Src/stm32f4xx_it.c **** }else{
298:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < ADC_BUFF_SIZE; i++) {
426 .loc 1 298 19 view .LVU67
427 0016 3223 movs r3, #50
428 0018 41E0 b .L35
429 .L45:
430 .LBE2:
272:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half
431 .loc 1 272 5 is_stmt 1 view .LVU68
272:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half
432 .loc 1 272 40 is_stmt 0 view .LVU69
433 001a 304B ldr r3, .L46+4
434 001c 0022 movs r2, #0
435 001e 1A71 strb r2, [r3, #4]
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
436 .loc 1 273 5 is_stmt 1 view .LVU70
437 .LBB3:
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
438 .loc 1 273 10 view .LVU71
439 .LVL8:
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
440 .loc 1 273 19 is_stmt 0 view .LVU72
441 0020 3223 movs r3, #50
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
442 .loc 1 273 5 view .LVU73
443 0022 07E0 b .L36
444 .LVL9:
445 .L37:
274:Core/Src/stm32f4xx_it.c **** }
446 .loc 1 274 7 is_stmt 1 view .LVU74
274:Core/Src/stm32f4xx_it.c **** }
447 .loc 1 274 15 is_stmt 0 view .LVU75
448 0024 2E49 ldr r1, .L46+8
449 0026 4A68 ldr r2, [r1, #4]
274:Core/Src/stm32f4xx_it.c **** }
450 .loc 1 274 41 view .LVU76
451 0028 2E48 ldr r0, .L46+12
452 002a 30F81300 ldrh r0, [r0, r3, lsl #1]
274:Core/Src/stm32f4xx_it.c **** }
453 .loc 1 274 20 view .LVU77
ARM GAS /tmp/ccoyPJk8.s page 14
454 002e 0244 add r2, r2, r0
455 0030 4A60 str r2, [r1, #4]
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
456 .loc 1 273 80 is_stmt 1 discriminator 3 view .LVU78
457 0032 0133 adds r3, r3, #1
458 .LVL10:
459 .L36:
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
460 .loc 1 273 42 discriminator 1 view .LVU79
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
461 .loc 1 273 55 is_stmt 0 discriminator 1 view .LVU80
462 0034 294A ldr r2, .L46+4
463 0036 9268 ldr r2, [r2, #8]
273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
464 .loc 1 273 42 discriminator 1 view .LVU81
465 0038 9A42 cmp r2, r3
466 003a F3D8 bhi .L37
467 .LBE3:
277:Core/Src/stm32f4xx_it.c ****
468 .loc 1 277 5 is_stmt 1 view .LVU82
277:Core/Src/stm32f4xx_it.c ****
469 .loc 1 277 30 is_stmt 0 view .LVU83
470 003c 2748 ldr r0, .L46+4
471 003e 8168 ldr r1, [r0, #8]
277:Core/Src/stm32f4xx_it.c ****
472 .loc 1 277 53 view .LVU84
473 0040 3239 subs r1, r1, #50
277:Core/Src/stm32f4xx_it.c ****
474 .loc 1 277 13 view .LVU85
475 0042 274B ldr r3, .L46+8
476 .LVL11:
277:Core/Src/stm32f4xx_it.c ****
477 .loc 1 277 13 view .LVU86
478 0044 DA68 ldr r2, [r3, #12]
277:Core/Src/stm32f4xx_it.c ****
479 .loc 1 277 16 view .LVU87
480 0046 0A44 add r2, r2, r1
481 0048 DA60 str r2, [r3, #12]
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
482 .loc 1 280 5 is_stmt 1 view .LVU88
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
483 .loc 1 280 35 is_stmt 0 view .LVU89
484 004a 5968 ldr r1, [r3, #4]
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
485 .loc 1 280 25 view .LVU90
486 004c 264A ldr r2, .L46+16
487 004e 5160 str r1, [r2, #4]
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
488 .loc 1 281 5 is_stmt 1 view .LVU91
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
489 .loc 1 281 35 is_stmt 0 view .LVU92
490 0050 9968 ldr r1, [r3, #8]
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
491 .loc 1 281 25 view .LVU93
492 0052 9160 str r1, [r2, #8]
282:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
493 .loc 1 282 5 is_stmt 1 view .LVU94
ARM GAS /tmp/ccoyPJk8.s page 15
282:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
494 .loc 1 282 33 is_stmt 0 view .LVU95
495 0054 D968 ldr r1, [r3, #12]
282:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
496 .loc 1 282 23 view .LVU96
497 0056 D160 str r1, [r2, #12]
283:Core/Src/stm32f4xx_it.c ****
498 .loc 1 283 5 is_stmt 1 view .LVU97
283:Core/Src/stm32f4xx_it.c ****
499 .loc 1 283 28 is_stmt 0 view .LVU98
500 0058 0221 movs r1, #2
501 005a 1170 strb r1, [r2]
286:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
502 .loc 1 286 5 is_stmt 1 view .LVU99
286:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
503 .loc 1 286 18 is_stmt 0 view .LVU100
504 005c 0022 movs r2, #0
505 005e 5A60 str r2, [r3, #4]
287:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
506 .loc 1 287 5 is_stmt 1 view .LVU101
287:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
507 .loc 1 287 16 is_stmt 0 view .LVU102
508 0060 DA60 str r2, [r3, #12]
288:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
509 .loc 1 288 5 is_stmt 1 view .LVU103
288:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
510 .loc 1 288 18 is_stmt 0 view .LVU104
511 0062 9A60 str r2, [r3, #8]
289:Core/Src/stm32f4xx_it.c ****
512 .loc 1 289 5 is_stmt 1 view .LVU105
289:Core/Src/stm32f4xx_it.c ****
513 .loc 1 289 21 is_stmt 0 view .LVU106
514 0064 0122 movs r2, #1
515 0066 1A70 strb r2, [r3]
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
516 .loc 1 291 5 is_stmt 1 view .LVU107
517 .LBB4:
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
518 .loc 1 291 10 view .LVU108
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
519 .loc 1 291 19 is_stmt 0 view .LVU109
520 0068 8368 ldr r3, [r0, #8]
521 .LVL12:
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
522 .loc 1 291 5 view .LVU110
523 006a 07E0 b .L38
524 .L39:
292:Core/Src/stm32f4xx_it.c **** }
525 .loc 1 292 7 is_stmt 1 view .LVU111
292:Core/Src/stm32f4xx_it.c **** }
526 .loc 1 292 15 is_stmt 0 view .LVU112
527 006c 1C49 ldr r1, .L46+8
528 006e 4A68 ldr r2, [r1, #4]
292:Core/Src/stm32f4xx_it.c **** }
529 .loc 1 292 41 view .LVU113
530 0070 1C48 ldr r0, .L46+12
531 0072 30F81300 ldrh r0, [r0, r3, lsl #1]
ARM GAS /tmp/ccoyPJk8.s page 16
292:Core/Src/stm32f4xx_it.c **** }
532 .loc 1 292 20 view .LVU114
533 0076 0244 add r2, r2, r0
534 0078 4A60 str r2, [r1, #4]
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
535 .loc 1 291 78 is_stmt 1 discriminator 3 view .LVU115
536 007a 0133 adds r3, r3, #1
537 .LVL13:
538 .L38:
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
539 .loc 1 291 60 discriminator 1 view .LVU116
540 007c 632B cmp r3, #99
541 007e F5D9 bls .L39
291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
542 .loc 1 291 60 is_stmt 0 discriminator 1 view .LVU117
543 .LBE4:
294:Core/Src/stm32f4xx_it.c ****
544 .loc 1 294 5 is_stmt 1 view .LVU118
294:Core/Src/stm32f4xx_it.c ****
545 .loc 1 294 45 is_stmt 0 view .LVU119
546 0080 164B ldr r3, .L46+4
547 .LVL14:
294:Core/Src/stm32f4xx_it.c ****
548 .loc 1 294 45 view .LVU120
549 0082 9B68 ldr r3, [r3, #8]
294:Core/Src/stm32f4xx_it.c ****
550 .loc 1 294 32 view .LVU121
551 0084 C3F16403 rsb r3, r3, #100
294:Core/Src/stm32f4xx_it.c ****
552 .loc 1 294 16 view .LVU122
553 0088 154A ldr r2, .L46+8
554 008a D360 str r3, [r2, #12]
555 008c 0DE0 b .L40
556 .LVL15:
557 .L41:
558 .LBB5:
299:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
559 .loc 1 299 7 is_stmt 1 view .LVU123
560 .loc 1 299 15 is_stmt 0 view .LVU124
561 008e 1449 ldr r1, .L46+8
562 0090 4A68 ldr r2, [r1, #4]
563 .loc 1 299 41 view .LVU125
564 0092 1448 ldr r0, .L46+12
565 0094 30F81300 ldrh r0, [r0, r3, lsl #1]
566 .loc 1 299 20 view .LVU126
567 0098 0244 add r2, r2, r0
568 009a 4A60 str r2, [r1, #4]
298:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
569 .loc 1 298 60 is_stmt 1 discriminator 3 view .LVU127
570 009c 0133 adds r3, r3, #1
571 .LVL16:
572 .L35:
298:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
573 .loc 1 298 42 discriminator 1 view .LVU128
574 009e 632B cmp r3, #99
575 00a0 F5D9 bls .L41
576 .LBE5:
ARM GAS /tmp/ccoyPJk8.s page 17
300:Core/Src/stm32f4xx_it.c **** }
301:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE - ADC_BUFF_SIZE/2;
577 .loc 1 301 5 view .LVU129
578 .loc 1 301 13 is_stmt 0 view .LVU130
579 00a2 0F4A ldr r2, .L46+8
580 00a4 D368 ldr r3, [r2, #12]
581 .LVL17:
582 .loc 1 301 16 view .LVU131
583 00a6 3233 adds r3, r3, #50
584 00a8 D360 str r3, [r2, #12]
585 .LVL18:
586 .L40:
302:Core/Src/stm32f4xx_it.c **** }
303:Core/Src/stm32f4xx_it.c ****
304:Core/Src/stm32f4xx_it.c **** //if (0){
305:Core/Src/stm32f4xx_it.c **** if (ADC_proc.N >= ADC_BUFF_SIZE*100){
587 .loc 1 305 3 is_stmt 1 view .LVU132
588 .loc 1 305 15 is_stmt 0 view .LVU133
589 00aa 0D4B ldr r3, .L46+8
590 00ac DA68 ldr r2, [r3, #12]
591 .loc 1 305 6 view .LVU134
592 00ae 42F20F73 movw r3, #9999
593 00b2 9A42 cmp r2, r3
594 00b4 0FD9 bls .L34
306:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
595 .loc 1 306 5 is_stmt 1 view .LVU135
596 .loc 1 306 35 is_stmt 0 view .LVU136
597 00b6 0A4B ldr r3, .L46+8
598 00b8 5968 ldr r1, [r3, #4]
599 .loc 1 306 25 view .LVU137
600 00ba 0B4A ldr r2, .L46+16
601 00bc 5160 str r1, [r2, #4]
307:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
602 .loc 1 307 5 is_stmt 1 view .LVU138
603 .loc 1 307 35 is_stmt 0 view .LVU139
604 00be 9968 ldr r1, [r3, #8]
605 .loc 1 307 25 view .LVU140
606 00c0 9160 str r1, [r2, #8]
308:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
607 .loc 1 308 5 is_stmt 1 view .LVU141
608 .loc 1 308 33 is_stmt 0 view .LVU142
609 00c2 D968 ldr r1, [r3, #12]
610 .loc 1 308 23 view .LVU143
611 00c4 D160 str r1, [r2, #12]
309:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
612 .loc 1 309 5 is_stmt 1 view .LVU144
613 .loc 1 309 28 is_stmt 0 view .LVU145
614 00c6 0221 movs r1, #2
615 00c8 1170 strb r1, [r2]
310:Core/Src/stm32f4xx_it.c ****
311:Core/Src/stm32f4xx_it.c ****
312:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
616 .loc 1 312 5 is_stmt 1 view .LVU146
617 .loc 1 312 18 is_stmt 0 view .LVU147
618 00ca 0022 movs r2, #0
619 00cc 5A60 str r2, [r3, #4]
313:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
ARM GAS /tmp/ccoyPJk8.s page 18
620 .loc 1 313 5 is_stmt 1 view .LVU148
621 .loc 1 313 16 is_stmt 0 view .LVU149
622 00ce DA60 str r2, [r3, #12]
314:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
623 .loc 1 314 5 is_stmt 1 view .LVU150
624 .loc 1 314 18 is_stmt 0 view .LVU151
625 00d0 9A60 str r2, [r3, #8]
315:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
626 .loc 1 315 5 is_stmt 1 view .LVU152
627 .loc 1 315 21 is_stmt 0 view .LVU153
628 00d2 0122 movs r2, #1
629 00d4 1A70 strb r2, [r3]
630 .L34:
316:Core/Src/stm32f4xx_it.c **** }
317:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled
318:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here
319:Core/Src/stm32f4xx_it.c **** }
631 .loc 1 319 1 view .LVU154
632 00d6 08BD pop {r3, pc}
633 .L47:
634 .align 2
635 .L46:
636 00d8 00040240 .word 1073873920
637 00dc 00000000 .word Sweep_state
638 00e0 00000000 .word ADC_proc
639 00e4 00000000 .word ADC1_buff_circular
640 00e8 00000000 .word ADC_proc_shadow
641 .cfi_endproc
642 .LFE252:
644 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits
645 .align 1
646 .global HAL_ADC_ConvHalfCpltCallback
647 .syntax unified
648 .thumb
649 .thumb_func
651 HAL_ADC_ConvHalfCpltCallback:
652 .LVL19:
653 .LFB253:
320:Core/Src/stm32f4xx_it.c ****
321:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
322:Core/Src/stm32f4xx_it.c **** {
654 .loc 1 322 1 is_stmt 1 view -0
655 .cfi_startproc
656 @ args = 0, pretend = 0, frame = 0
657 @ frame_needed = 0, uses_anonymous_args = 0
658 .loc 1 322 1 is_stmt 0 view .LVU156
659 0000 08B5 push {r3, lr}
660 .LCFI6:
661 .cfi_def_cfa_offset 8
662 .cfi_offset 3, -8
663 .cfi_offset 14, -4
323:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET);
324:Core/Src/stm32f4xx_it.c ****
325:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin);
664 .loc 1 325 3 is_stmt 1 view .LVU157
665 0002 8021 movs r1, #128
666 0004 2748 ldr r0, .L59
ARM GAS /tmp/ccoyPJk8.s page 19
667 .LVL20:
668 .loc 1 325 3 is_stmt 0 view .LVU158
669 0006 FFF7FEFF bl HAL_GPIO_TogglePin
670 .LVL21:
326:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 1) {
671 .loc 1 326 3 is_stmt 1 view .LVU159
672 .loc 1 326 18 is_stmt 0 view .LVU160
673 000a 274B ldr r3, .L59+4
674 000c 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2
675 000e DBB2 uxtb r3, r3
676 .loc 1 326 6 view .LVU161
677 0010 012B cmp r3, #1
678 0012 01D0 beq .L58
679 .LBB6:
327:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0;
328:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) {
329:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
330:Core/Src/stm32f4xx_it.c **** }
331:Core/Src/stm32f4xx_it.c ****
332:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N;
333:Core/Src/stm32f4xx_it.c ****
334:Core/Src/stm32f4xx_it.c ****
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
337:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
338:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
339:Core/Src/stm32f4xx_it.c ****
340:Core/Src/stm32f4xx_it.c ****
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
342:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
343:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
344:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
345:Core/Src/stm32f4xx_it.c ****
346:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE/2; i++) {
347:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
348:Core/Src/stm32f4xx_it.c **** }
349:Core/Src/stm32f4xx_it.c **** ADC_proc.N = Sweep_state.curr_step_start_DMA_N;
350:Core/Src/stm32f4xx_it.c ****
351:Core/Src/stm32f4xx_it.c **** }else{
352:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < ADC_BUFF_SIZE/2; i++) {
680 .loc 1 352 19 view .LVU162
681 0014 0023 movs r3, #0
682 0016 3DE0 b .L49
683 .L58:
684 .LBE6:
327:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0;
685 .loc 1 327 5 is_stmt 1 view .LVU163
327:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0;
686 .loc 1 327 40 is_stmt 0 view .LVU164
687 0018 0023 movs r3, #0
688 001a 234A ldr r2, .L59+4
689 001c 1371 strb r3, [r2, #4]
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
690 .loc 1 328 5 is_stmt 1 view .LVU165
691 .LBB7:
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
692 .loc 1 328 10 view .LVU166
ARM GAS /tmp/ccoyPJk8.s page 20
693 .LVL22:
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
694 .loc 1 328 5 is_stmt 0 view .LVU167
695 001e 07E0 b .L50
696 .LVL23:
697 .L51:
329:Core/Src/stm32f4xx_it.c **** }
698 .loc 1 329 7 is_stmt 1 view .LVU168
329:Core/Src/stm32f4xx_it.c **** }
699 .loc 1 329 15 is_stmt 0 view .LVU169
700 0020 2249 ldr r1, .L59+8
701 0022 4A68 ldr r2, [r1, #4]
329:Core/Src/stm32f4xx_it.c **** }
702 .loc 1 329 41 view .LVU170
703 0024 2248 ldr r0, .L59+12
704 0026 30F81300 ldrh r0, [r0, r3, lsl #1]
329:Core/Src/stm32f4xx_it.c **** }
705 .loc 1 329 20 view .LVU171
706 002a 0244 add r2, r2, r0
707 002c 4A60 str r2, [r1, #4]
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
708 .loc 1 328 66 is_stmt 1 discriminator 3 view .LVU172
709 002e 0133 adds r3, r3, #1
710 .LVL24:
711 .L50:
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
712 .loc 1 328 28 discriminator 1 view .LVU173
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
713 .loc 1 328 41 is_stmt 0 discriminator 1 view .LVU174
714 0030 1D4A ldr r2, .L59+4
715 0032 9268 ldr r2, [r2, #8]
328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
716 .loc 1 328 28 discriminator 1 view .LVU175
717 0034 9A42 cmp r2, r3
718 0036 F3D8 bhi .L51
719 .LBE7:
332:Core/Src/stm32f4xx_it.c ****
720 .loc 1 332 5 is_stmt 1 view .LVU176
332:Core/Src/stm32f4xx_it.c ****
721 .loc 1 332 30 is_stmt 0 view .LVU177
722 0038 1B49 ldr r1, .L59+4
723 003a 8868 ldr r0, [r1, #8]
332:Core/Src/stm32f4xx_it.c ****
724 .loc 1 332 13 view .LVU178
725 003c 1B4B ldr r3, .L59+8
726 .LVL25:
332:Core/Src/stm32f4xx_it.c ****
727 .loc 1 332 13 view .LVU179
728 003e DA68 ldr r2, [r3, #12]
332:Core/Src/stm32f4xx_it.c ****
729 .loc 1 332 16 view .LVU180
730 0040 0244 add r2, r2, r0
731 0042 DA60 str r2, [r3, #12]
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
732 .loc 1 335 5 is_stmt 1 view .LVU181
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
733 .loc 1 335 35 is_stmt 0 view .LVU182
ARM GAS /tmp/ccoyPJk8.s page 21
734 0044 5868 ldr r0, [r3, #4]
335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
735 .loc 1 335 25 view .LVU183
736 0046 1B4A ldr r2, .L59+16
737 0048 5060 str r0, [r2, #4]
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
738 .loc 1 336 5 is_stmt 1 view .LVU184
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
739 .loc 1 336 35 is_stmt 0 view .LVU185
740 004a 9868 ldr r0, [r3, #8]
336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
741 .loc 1 336 25 view .LVU186
742 004c 9060 str r0, [r2, #8]
337:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
743 .loc 1 337 5 is_stmt 1 view .LVU187
337:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
744 .loc 1 337 33 is_stmt 0 view .LVU188
745 004e D868 ldr r0, [r3, #12]
337:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
746 .loc 1 337 23 view .LVU189
747 0050 D060 str r0, [r2, #12]
338:Core/Src/stm32f4xx_it.c ****
748 .loc 1 338 5 is_stmt 1 view .LVU190
338:Core/Src/stm32f4xx_it.c ****
749 .loc 1 338 28 is_stmt 0 view .LVU191
750 0052 0220 movs r0, #2
751 0054 1070 strb r0, [r2]
341:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
752 .loc 1 341 5 is_stmt 1 view .LVU192
341:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
753 .loc 1 341 18 is_stmt 0 view .LVU193
754 0056 0022 movs r2, #0
755 0058 5A60 str r2, [r3, #4]
342:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
756 .loc 1 342 5 is_stmt 1 view .LVU194
342:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
757 .loc 1 342 16 is_stmt 0 view .LVU195
758 005a DA60 str r2, [r3, #12]
343:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
759 .loc 1 343 5 is_stmt 1 view .LVU196
343:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
760 .loc 1 343 18 is_stmt 0 view .LVU197
761 005c 9A60 str r2, [r3, #8]
344:Core/Src/stm32f4xx_it.c ****
762 .loc 1 344 5 is_stmt 1 view .LVU198
344:Core/Src/stm32f4xx_it.c ****
763 .loc 1 344 21 is_stmt 0 view .LVU199
764 005e 0122 movs r2, #1
765 0060 1A70 strb r2, [r3]
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
766 .loc 1 346 5 is_stmt 1 view .LVU200
767 .LBB8:
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
768 .loc 1 346 10 view .LVU201
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
769 .loc 1 346 19 is_stmt 0 view .LVU202
770 0062 8B68 ldr r3, [r1, #8]
ARM GAS /tmp/ccoyPJk8.s page 22
771 .LVL26:
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
772 .loc 1 346 5 view .LVU203
773 0064 07E0 b .L52
774 .L53:
347:Core/Src/stm32f4xx_it.c **** }
775 .loc 1 347 7 is_stmt 1 view .LVU204
347:Core/Src/stm32f4xx_it.c **** }
776 .loc 1 347 15 is_stmt 0 view .LVU205
777 0066 1149 ldr r1, .L59+8
778 0068 4A68 ldr r2, [r1, #4]
347:Core/Src/stm32f4xx_it.c **** }
779 .loc 1 347 41 view .LVU206
780 006a 1148 ldr r0, .L59+12
781 006c 30F81300 ldrh r0, [r0, r3, lsl #1]
347:Core/Src/stm32f4xx_it.c **** }
782 .loc 1 347 20 view .LVU207
783 0070 0244 add r2, r2, r0
784 0072 4A60 str r2, [r1, #4]
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
785 .loc 1 346 80 is_stmt 1 discriminator 3 view .LVU208
786 0074 0133 adds r3, r3, #1
787 .LVL27:
788 .L52:
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
789 .loc 1 346 60 discriminator 1 view .LVU209
790 0076 312B cmp r3, #49
791 0078 F5D9 bls .L53
346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
792 .loc 1 346 60 is_stmt 0 discriminator 1 view .LVU210
793 .LBE8:
349:Core/Src/stm32f4xx_it.c ****
794 .loc 1 349 5 is_stmt 1 view .LVU211
349:Core/Src/stm32f4xx_it.c ****
795 .loc 1 349 29 is_stmt 0 view .LVU212
796 007a 0B4B ldr r3, .L59+4
797 .LVL28:
349:Core/Src/stm32f4xx_it.c ****
798 .loc 1 349 29 view .LVU213
799 007c 9A68 ldr r2, [r3, #8]
349:Core/Src/stm32f4xx_it.c ****
800 .loc 1 349 16 view .LVU214
801 007e 0B4B ldr r3, .L59+8
802 0080 DA60 str r2, [r3, #12]
803 0082 0DE0 b .L48
804 .LVL29:
805 .L55:
806 .LBB9:
353:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
807 .loc 1 353 7 is_stmt 1 view .LVU215
808 .loc 1 353 15 is_stmt 0 view .LVU216
809 0084 0949 ldr r1, .L59+8
810 0086 4A68 ldr r2, [r1, #4]
811 .loc 1 353 41 view .LVU217
812 0088 0948 ldr r0, .L59+12
813 008a 30F81300 ldrh r0, [r0, r3, lsl #1]
814 .loc 1 353 20 view .LVU218
ARM GAS /tmp/ccoyPJk8.s page 23
815 008e 0244 add r2, r2, r0
816 0090 4A60 str r2, [r1, #4]
352:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
817 .loc 1 352 48 is_stmt 1 discriminator 3 view .LVU219
818 0092 0133 adds r3, r3, #1
819 .LVL30:
820 .L49:
352:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
821 .loc 1 352 28 discriminator 1 view .LVU220
822 0094 312B cmp r3, #49
823 0096 F5D9 bls .L55
824 .LBE9:
354:Core/Src/stm32f4xx_it.c **** }
355:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE/2;
825 .loc 1 355 5 view .LVU221
826 .loc 1 355 13 is_stmt 0 view .LVU222
827 0098 044A ldr r2, .L59+8
828 009a D368 ldr r3, [r2, #12]
829 .LVL31:
830 .loc 1 355 16 view .LVU223
831 009c 3233 adds r3, r3, #50
832 009e D360 str r3, [r2, #12]
833 .LVL32:
834 .L48:
356:Core/Src/stm32f4xx_it.c **** }
357:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled
358:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here
359:Core/Src/stm32f4xx_it.c **** }
835 .loc 1 359 1 view .LVU224
836 00a0 08BD pop {r3, pc}
837 .L60:
838 00a2 00BF .align 2
839 .L59:
840 00a4 00040240 .word 1073873920
841 00a8 00000000 .word Sweep_state
842 00ac 00000000 .word ADC_proc
843 00b0 00000000 .word ADC1_buff_circular
844 00b4 00000000 .word ADC_proc_shadow
845 .cfi_endproc
846 .LFE253:
848 .text
849 .Letext0:
850 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
851 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h"
852 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
853 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
854 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
855 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
856 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
857 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h"
858 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h"
859 .file 11 "Core/Inc/main.h"
860 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
ARM GAS /tmp/ccoyPJk8.s page 24
DEFINED SYMBOLS
*ABS*:00000000 stm32f4xx_it.c
/tmp/ccoyPJk8.s:21 .text.NMI_Handler:00000000 $t
/tmp/ccoyPJk8.s:27 .text.NMI_Handler:00000000 NMI_Handler
/tmp/ccoyPJk8.s:44 .text.HardFault_Handler:00000000 $t
/tmp/ccoyPJk8.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/ccoyPJk8.s:67 .text.MemManage_Handler:00000000 $t
/tmp/ccoyPJk8.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
/tmp/ccoyPJk8.s:90 .text.BusFault_Handler:00000000 $t
/tmp/ccoyPJk8.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
/tmp/ccoyPJk8.s:113 .text.UsageFault_Handler:00000000 $t
/tmp/ccoyPJk8.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
/tmp/ccoyPJk8.s:136 .text.SVC_Handler:00000000 $t
/tmp/ccoyPJk8.s:142 .text.SVC_Handler:00000000 SVC_Handler
/tmp/ccoyPJk8.s:155 .text.DebugMon_Handler:00000000 $t
/tmp/ccoyPJk8.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
/tmp/ccoyPJk8.s:174 .text.PendSV_Handler:00000000 $t
/tmp/ccoyPJk8.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
/tmp/ccoyPJk8.s:193 .text.SysTick_Handler:00000000 $t
/tmp/ccoyPJk8.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
/tmp/ccoyPJk8.s:219 .text.EXTI0_IRQHandler:00000000 $t
/tmp/ccoyPJk8.s:225 .text.EXTI0_IRQHandler:00000000 EXTI0_IRQHandler
/tmp/ccoyPJk8.s:282 .text.EXTI0_IRQHandler:00000034 $d
/tmp/ccoyPJk8.s:288 .text.EXTI3_IRQHandler:00000000 $t
/tmp/ccoyPJk8.s:294 .text.EXTI3_IRQHandler:00000000 EXTI3_IRQHandler
/tmp/ccoyPJk8.s:323 .text.EXTI3_IRQHandler:00000014 $d
/tmp/ccoyPJk8.s:328 .text.DMA2_Stream0_IRQHandler:00000000 $t
/tmp/ccoyPJk8.s:334 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler
/tmp/ccoyPJk8.s:354 .text.DMA2_Stream0_IRQHandler:0000000c $d
/tmp/ccoyPJk8.s:359 .text.OTG_FS_IRQHandler:00000000 $t
/tmp/ccoyPJk8.s:365 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler
/tmp/ccoyPJk8.s:385 .text.OTG_FS_IRQHandler:0000000c $d
/tmp/ccoyPJk8.s:390 .text.HAL_ADC_ConvCpltCallback:00000000 $t
/tmp/ccoyPJk8.s:396 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback
/tmp/ccoyPJk8.s:636 .text.HAL_ADC_ConvCpltCallback:000000d8 $d
/tmp/ccoyPJk8.s:645 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t
/tmp/ccoyPJk8.s:651 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback
/tmp/ccoyPJk8.s:840 .text.HAL_ADC_ConvHalfCpltCallback:000000a4 $d
UNDEFINED SYMBOLS
HAL_IncTick
HAL_GPIO_EXTI_IRQHandler
hdma_adc1
Sweep_state
HAL_DMA_IRQHandler
HAL_PCD_IRQHandler
hpcd_USB_OTG_FS
HAL_GPIO_WritePin
ADC_proc
ADC1_buff_circular
ADC_proc_shadow
HAL_GPIO_TogglePin