1380 lines
63 KiB
Plaintext
1380 lines
63 KiB
Plaintext
ARM GAS /tmp/ccmc0UgA.s page 1
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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||
7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 1
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "stm32f4xx_it.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Core/Src/stm32f4xx_it.c"
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20 .section .text.NMI_Handler,"ax",%progbits
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21 .align 1
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22 .global NMI_Handler
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23 .syntax unified
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24 .thumb
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25 .thumb_func
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27 NMI_Handler:
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28 .LFB239:
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1:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */
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2:Core/Src/stm32f4xx_it.c **** /**
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3:Core/Src/stm32f4xx_it.c **** ******************************************************************************
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4:Core/Src/stm32f4xx_it.c **** * @file stm32f4xx_it.c
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5:Core/Src/stm32f4xx_it.c **** * @brief Interrupt Service Routines.
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6:Core/Src/stm32f4xx_it.c **** ******************************************************************************
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7:Core/Src/stm32f4xx_it.c **** * @attention
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8:Core/Src/stm32f4xx_it.c **** *
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9:Core/Src/stm32f4xx_it.c **** * Copyright (c) 2025 STMicroelectronics.
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10:Core/Src/stm32f4xx_it.c **** * All rights reserved.
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11:Core/Src/stm32f4xx_it.c **** *
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12:Core/Src/stm32f4xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
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13:Core/Src/stm32f4xx_it.c **** * in the root directory of this software component.
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14:Core/Src/stm32f4xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
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15:Core/Src/stm32f4xx_it.c **** *
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16:Core/Src/stm32f4xx_it.c **** ******************************************************************************
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17:Core/Src/stm32f4xx_it.c **** */
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18:Core/Src/stm32f4xx_it.c **** /* USER CODE END Header */
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19:Core/Src/stm32f4xx_it.c ****
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20:Core/Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/
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21:Core/Src/stm32f4xx_it.c **** #include "main.h"
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22:Core/Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h"
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23:Core/Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/
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24:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */
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25:Core/Src/stm32f4xx_it.c **** /* USER CODE END Includes */
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26:Core/Src/stm32f4xx_it.c ****
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27:Core/Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
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28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */
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29:Core/Src/stm32f4xx_it.c ****
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30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */
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ARM GAS /tmp/ccmc0UgA.s page 2
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31:Core/Src/stm32f4xx_it.c ****
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32:Core/Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/
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33:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */
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34:Core/Src/stm32f4xx_it.c ****
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35:Core/Src/stm32f4xx_it.c **** /* USER CODE END PD */
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36:Core/Src/stm32f4xx_it.c ****
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37:Core/Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/
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38:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */
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39:Core/Src/stm32f4xx_it.c ****
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40:Core/Src/stm32f4xx_it.c **** /* USER CODE END PM */
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41:Core/Src/stm32f4xx_it.c ****
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42:Core/Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/
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43:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */
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44:Core/Src/stm32f4xx_it.c ****
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45:Core/Src/stm32f4xx_it.c **** /* USER CODE END PV */
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46:Core/Src/stm32f4xx_it.c ****
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47:Core/Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
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48:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */
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49:Core/Src/stm32f4xx_it.c ****
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50:Core/Src/stm32f4xx_it.c **** /* USER CODE END PFP */
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51:Core/Src/stm32f4xx_it.c ****
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52:Core/Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/
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53:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */
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54:Core/Src/stm32f4xx_it.c ****
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55:Core/Src/stm32f4xx_it.c **** /* USER CODE END 0 */
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56:Core/Src/stm32f4xx_it.c ****
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57:Core/Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/
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58:Core/Src/stm32f4xx_it.c **** extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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59:Core/Src/stm32f4xx_it.c **** extern DMA_HandleTypeDef hdma_adc1;
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60:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */
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61:Core/Src/stm32f4xx_it.c **** extern struct ADC_proc_typedef ADC_proc, ADC_proc_shadow;
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62:Core/Src/stm32f4xx_it.c **** extern struct Sweep_state_typedef Sweep_state;
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63:Core/Src/stm32f4xx_it.c **** /* USER CODE END EV */
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64:Core/Src/stm32f4xx_it.c ****
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65:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
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66:Core/Src/stm32f4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
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67:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
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68:Core/Src/stm32f4xx_it.c **** /**
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69:Core/Src/stm32f4xx_it.c **** * @brief This function handles Non maskable interrupt.
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70:Core/Src/stm32f4xx_it.c **** */
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71:Core/Src/stm32f4xx_it.c **** void NMI_Handler(void)
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72:Core/Src/stm32f4xx_it.c **** {
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29 .loc 1 72 1 view -0
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30 .cfi_startproc
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31 @ Volatile: function does not return.
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32 @ args = 0, pretend = 0, frame = 0
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33 @ frame_needed = 0, uses_anonymous_args = 0
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34 @ link register save eliminated.
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35 .L2:
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73:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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74:Core/Src/stm32f4xx_it.c ****
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75:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
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76:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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77:Core/Src/stm32f4xx_it.c **** while (1)
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36 .loc 1 77 4 view .LVU1
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78:Core/Src/stm32f4xx_it.c **** {
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79:Core/Src/stm32f4xx_it.c **** }
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ARM GAS /tmp/ccmc0UgA.s page 3
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37 .loc 1 79 3 view .LVU2
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77:Core/Src/stm32f4xx_it.c **** {
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38 .loc 1 77 10 view .LVU3
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39 0000 FEE7 b .L2
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40 .cfi_endproc
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41 .LFE239:
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43 .section .text.HardFault_Handler,"ax",%progbits
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44 .align 1
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45 .global HardFault_Handler
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46 .syntax unified
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47 .thumb
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48 .thumb_func
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50 HardFault_Handler:
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51 .LFB240:
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80:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
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81:Core/Src/stm32f4xx_it.c **** }
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82:Core/Src/stm32f4xx_it.c ****
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83:Core/Src/stm32f4xx_it.c **** /**
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84:Core/Src/stm32f4xx_it.c **** * @brief This function handles Hard fault interrupt.
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85:Core/Src/stm32f4xx_it.c **** */
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86:Core/Src/stm32f4xx_it.c **** void HardFault_Handler(void)
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87:Core/Src/stm32f4xx_it.c **** {
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52 .loc 1 87 1 view -0
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53 .cfi_startproc
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54 @ Volatile: function does not return.
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55 @ args = 0, pretend = 0, frame = 0
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56 @ frame_needed = 0, uses_anonymous_args = 0
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57 @ link register save eliminated.
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58 .L4:
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88:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
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89:Core/Src/stm32f4xx_it.c ****
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90:Core/Src/stm32f4xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
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91:Core/Src/stm32f4xx_it.c **** while (1)
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59 .loc 1 91 3 view .LVU5
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92:Core/Src/stm32f4xx_it.c **** {
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93:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
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94:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
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95:Core/Src/stm32f4xx_it.c **** }
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60 .loc 1 95 3 view .LVU6
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91:Core/Src/stm32f4xx_it.c **** {
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61 .loc 1 91 9 view .LVU7
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62 0000 FEE7 b .L4
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63 .cfi_endproc
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64 .LFE240:
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66 .section .text.MemManage_Handler,"ax",%progbits
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67 .align 1
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68 .global MemManage_Handler
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69 .syntax unified
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70 .thumb
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71 .thumb_func
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73 MemManage_Handler:
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74 .LFB241:
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96:Core/Src/stm32f4xx_it.c **** }
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97:Core/Src/stm32f4xx_it.c ****
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98:Core/Src/stm32f4xx_it.c **** /**
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99:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault.
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100:Core/Src/stm32f4xx_it.c **** */
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ARM GAS /tmp/ccmc0UgA.s page 4
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101:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void)
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102:Core/Src/stm32f4xx_it.c **** {
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75 .loc 1 102 1 view -0
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76 .cfi_startproc
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77 @ Volatile: function does not return.
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78 @ args = 0, pretend = 0, frame = 0
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79 @ frame_needed = 0, uses_anonymous_args = 0
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80 @ link register save eliminated.
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81 .L6:
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103:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
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104:Core/Src/stm32f4xx_it.c ****
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105:Core/Src/stm32f4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
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106:Core/Src/stm32f4xx_it.c **** while (1)
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82 .loc 1 106 3 view .LVU9
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107:Core/Src/stm32f4xx_it.c **** {
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108:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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109:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
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110:Core/Src/stm32f4xx_it.c **** }
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83 .loc 1 110 3 view .LVU10
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106:Core/Src/stm32f4xx_it.c **** {
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84 .loc 1 106 9 view .LVU11
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85 0000 FEE7 b .L6
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86 .cfi_endproc
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87 .LFE241:
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89 .section .text.BusFault_Handler,"ax",%progbits
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90 .align 1
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91 .global BusFault_Handler
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92 .syntax unified
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93 .thumb
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94 .thumb_func
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96 BusFault_Handler:
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97 .LFB242:
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111:Core/Src/stm32f4xx_it.c **** }
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112:Core/Src/stm32f4xx_it.c ****
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113:Core/Src/stm32f4xx_it.c **** /**
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114:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
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115:Core/Src/stm32f4xx_it.c **** */
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116:Core/Src/stm32f4xx_it.c **** void BusFault_Handler(void)
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117:Core/Src/stm32f4xx_it.c **** {
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98 .loc 1 117 1 view -0
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99 .cfi_startproc
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100 @ Volatile: function does not return.
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101 @ args = 0, pretend = 0, frame = 0
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102 @ frame_needed = 0, uses_anonymous_args = 0
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103 @ link register save eliminated.
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104 .L8:
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118:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
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119:Core/Src/stm32f4xx_it.c ****
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120:Core/Src/stm32f4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
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121:Core/Src/stm32f4xx_it.c **** while (1)
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105 .loc 1 121 3 view .LVU13
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122:Core/Src/stm32f4xx_it.c **** {
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123:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
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124:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
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125:Core/Src/stm32f4xx_it.c **** }
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106 .loc 1 125 3 view .LVU14
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121:Core/Src/stm32f4xx_it.c **** {
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ARM GAS /tmp/ccmc0UgA.s page 5
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107 .loc 1 121 9 view .LVU15
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108 0000 FEE7 b .L8
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109 .cfi_endproc
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110 .LFE242:
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112 .section .text.UsageFault_Handler,"ax",%progbits
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113 .align 1
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114 .global UsageFault_Handler
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115 .syntax unified
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116 .thumb
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117 .thumb_func
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119 UsageFault_Handler:
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120 .LFB243:
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126:Core/Src/stm32f4xx_it.c **** }
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127:Core/Src/stm32f4xx_it.c ****
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128:Core/Src/stm32f4xx_it.c **** /**
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129:Core/Src/stm32f4xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
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130:Core/Src/stm32f4xx_it.c **** */
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131:Core/Src/stm32f4xx_it.c **** void UsageFault_Handler(void)
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132:Core/Src/stm32f4xx_it.c **** {
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121 .loc 1 132 1 view -0
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122 .cfi_startproc
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123 @ Volatile: function does not return.
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124 @ args = 0, pretend = 0, frame = 0
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125 @ frame_needed = 0, uses_anonymous_args = 0
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126 @ link register save eliminated.
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127 .L10:
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133:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
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134:Core/Src/stm32f4xx_it.c ****
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135:Core/Src/stm32f4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
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136:Core/Src/stm32f4xx_it.c **** while (1)
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128 .loc 1 136 3 view .LVU17
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137:Core/Src/stm32f4xx_it.c **** {
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138:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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139:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
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140:Core/Src/stm32f4xx_it.c **** }
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129 .loc 1 140 3 view .LVU18
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136:Core/Src/stm32f4xx_it.c **** {
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130 .loc 1 136 9 view .LVU19
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131 0000 FEE7 b .L10
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132 .cfi_endproc
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133 .LFE243:
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135 .section .text.SVC_Handler,"ax",%progbits
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136 .align 1
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137 .global SVC_Handler
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138 .syntax unified
|
||
139 .thumb
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||
140 .thumb_func
|
||
142 SVC_Handler:
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143 .LFB244:
|
||
141:Core/Src/stm32f4xx_it.c **** }
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||
142:Core/Src/stm32f4xx_it.c ****
|
||
143:Core/Src/stm32f4xx_it.c **** /**
|
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144:Core/Src/stm32f4xx_it.c **** * @brief This function handles System service call via SWI instruction.
|
||
145:Core/Src/stm32f4xx_it.c **** */
|
||
146:Core/Src/stm32f4xx_it.c **** void SVC_Handler(void)
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||
147:Core/Src/stm32f4xx_it.c **** {
|
||
144 .loc 1 147 1 view -0
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||
ARM GAS /tmp/ccmc0UgA.s page 6
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145 .cfi_startproc
|
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146 @ args = 0, pretend = 0, frame = 0
|
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147 @ frame_needed = 0, uses_anonymous_args = 0
|
||
148 @ link register save eliminated.
|
||
148:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
|
||
149:Core/Src/stm32f4xx_it.c ****
|
||
150:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
|
||
151:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
|
||
152:Core/Src/stm32f4xx_it.c ****
|
||
153:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
|
||
154:Core/Src/stm32f4xx_it.c **** }
|
||
149 .loc 1 154 1 view .LVU21
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||
150 0000 7047 bx lr
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||
151 .cfi_endproc
|
||
152 .LFE244:
|
||
154 .section .text.DebugMon_Handler,"ax",%progbits
|
||
155 .align 1
|
||
156 .global DebugMon_Handler
|
||
157 .syntax unified
|
||
158 .thumb
|
||
159 .thumb_func
|
||
161 DebugMon_Handler:
|
||
162 .LFB245:
|
||
155:Core/Src/stm32f4xx_it.c ****
|
||
156:Core/Src/stm32f4xx_it.c **** /**
|
||
157:Core/Src/stm32f4xx_it.c **** * @brief This function handles Debug monitor.
|
||
158:Core/Src/stm32f4xx_it.c **** */
|
||
159:Core/Src/stm32f4xx_it.c **** void DebugMon_Handler(void)
|
||
160:Core/Src/stm32f4xx_it.c **** {
|
||
163 .loc 1 160 1 view -0
|
||
164 .cfi_startproc
|
||
165 @ args = 0, pretend = 0, frame = 0
|
||
166 @ frame_needed = 0, uses_anonymous_args = 0
|
||
167 @ link register save eliminated.
|
||
161:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||
162:Core/Src/stm32f4xx_it.c ****
|
||
163:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
|
||
164:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||
165:Core/Src/stm32f4xx_it.c ****
|
||
166:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
|
||
167:Core/Src/stm32f4xx_it.c **** }
|
||
168 .loc 1 167 1 view .LVU23
|
||
169 0000 7047 bx lr
|
||
170 .cfi_endproc
|
||
171 .LFE245:
|
||
173 .section .text.PendSV_Handler,"ax",%progbits
|
||
174 .align 1
|
||
175 .global PendSV_Handler
|
||
176 .syntax unified
|
||
177 .thumb
|
||
178 .thumb_func
|
||
180 PendSV_Handler:
|
||
181 .LFB246:
|
||
168:Core/Src/stm32f4xx_it.c ****
|
||
169:Core/Src/stm32f4xx_it.c **** /**
|
||
170:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service.
|
||
171:Core/Src/stm32f4xx_it.c **** */
|
||
ARM GAS /tmp/ccmc0UgA.s page 7
|
||
|
||
|
||
172:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void)
|
||
173:Core/Src/stm32f4xx_it.c **** {
|
||
182 .loc 1 173 1 view -0
|
||
183 .cfi_startproc
|
||
184 @ args = 0, pretend = 0, frame = 0
|
||
185 @ frame_needed = 0, uses_anonymous_args = 0
|
||
186 @ link register save eliminated.
|
||
174:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
|
||
175:Core/Src/stm32f4xx_it.c ****
|
||
176:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
|
||
177:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
|
||
178:Core/Src/stm32f4xx_it.c ****
|
||
179:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
|
||
180:Core/Src/stm32f4xx_it.c **** }
|
||
187 .loc 1 180 1 view .LVU25
|
||
188 0000 7047 bx lr
|
||
189 .cfi_endproc
|
||
190 .LFE246:
|
||
192 .section .text.SysTick_Handler,"ax",%progbits
|
||
193 .align 1
|
||
194 .global SysTick_Handler
|
||
195 .syntax unified
|
||
196 .thumb
|
||
197 .thumb_func
|
||
199 SysTick_Handler:
|
||
200 .LFB247:
|
||
181:Core/Src/stm32f4xx_it.c ****
|
||
182:Core/Src/stm32f4xx_it.c **** /**
|
||
183:Core/Src/stm32f4xx_it.c **** * @brief This function handles System tick timer.
|
||
184:Core/Src/stm32f4xx_it.c **** */
|
||
185:Core/Src/stm32f4xx_it.c **** void SysTick_Handler(void)
|
||
186:Core/Src/stm32f4xx_it.c **** {
|
||
201 .loc 1 186 1 view -0
|
||
202 .cfi_startproc
|
||
203 @ args = 0, pretend = 0, frame = 0
|
||
204 @ frame_needed = 0, uses_anonymous_args = 0
|
||
205 0000 08B5 push {r3, lr}
|
||
206 .LCFI0:
|
||
207 .cfi_def_cfa_offset 8
|
||
208 .cfi_offset 3, -8
|
||
209 .cfi_offset 14, -4
|
||
187:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
|
||
188:Core/Src/stm32f4xx_it.c ****
|
||
189:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
|
||
190:Core/Src/stm32f4xx_it.c **** HAL_IncTick();
|
||
210 .loc 1 190 3 view .LVU27
|
||
211 0002 FFF7FEFF bl HAL_IncTick
|
||
212 .LVL0:
|
||
191:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
|
||
192:Core/Src/stm32f4xx_it.c ****
|
||
193:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
|
||
194:Core/Src/stm32f4xx_it.c **** }
|
||
213 .loc 1 194 1 is_stmt 0 view .LVU28
|
||
214 0006 08BD pop {r3, pc}
|
||
215 .cfi_endproc
|
||
216 .LFE247:
|
||
218 .section .text.EXTI0_IRQHandler,"ax",%progbits
|
||
ARM GAS /tmp/ccmc0UgA.s page 8
|
||
|
||
|
||
219 .align 1
|
||
220 .global EXTI0_IRQHandler
|
||
221 .syntax unified
|
||
222 .thumb
|
||
223 .thumb_func
|
||
225 EXTI0_IRQHandler:
|
||
226 .LFB248:
|
||
195:Core/Src/stm32f4xx_it.c ****
|
||
196:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
|
||
197:Core/Src/stm32f4xx_it.c **** /* STM32F4xx Peripheral Interrupt Handlers */
|
||
198:Core/Src/stm32f4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
|
||
199:Core/Src/stm32f4xx_it.c **** /* For the available peripheral interrupt handler names, */
|
||
200:Core/Src/stm32f4xx_it.c **** /* please refer to the startup file (startup_stm32f4xx.s). */
|
||
201:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
|
||
202:Core/Src/stm32f4xx_it.c ****
|
||
203:Core/Src/stm32f4xx_it.c **** /**
|
||
204:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line0 interrupt.
|
||
205:Core/Src/stm32f4xx_it.c **** */
|
||
206:Core/Src/stm32f4xx_it.c **** void EXTI0_IRQHandler(void)
|
||
207:Core/Src/stm32f4xx_it.c **** {
|
||
227 .loc 1 207 1 is_stmt 1 view -0
|
||
228 .cfi_startproc
|
||
229 @ args = 0, pretend = 0, frame = 0
|
||
230 @ frame_needed = 0, uses_anonymous_args = 0
|
||
231 0000 08B5 push {r3, lr}
|
||
232 .LCFI1:
|
||
233 .cfi_def_cfa_offset 8
|
||
234 .cfi_offset 3, -8
|
||
235 .cfi_offset 14, -4
|
||
208:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 0 */
|
||
209:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_start_DMA_N = ADC_BUFF_SIZE - hdma_adc1.Instance->NDTR;
|
||
236 .loc 1 209 3 view .LVU30
|
||
237 .loc 1 209 64 is_stmt 0 view .LVU31
|
||
238 0002 0A4B ldr r3, .L20
|
||
239 0004 1B68 ldr r3, [r3]
|
||
240 .loc 1 209 73 view .LVU32
|
||
241 0006 5B68 ldr r3, [r3, #4]
|
||
242 .loc 1 209 53 view .LVU33
|
||
243 0008 C3F16403 rsb r3, r3, #100
|
||
244 .loc 1 209 37 view .LVU34
|
||
245 000c 084A ldr r2, .L20+4
|
||
246 000e 9360 str r3, [r2, #8]
|
||
210:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_start_DMA_N < ADC_BUFF_SIZE/2) {
|
||
247 .loc 1 210 3 is_stmt 1 view .LVU35
|
||
248 .loc 1 210 6 is_stmt 0 view .LVU36
|
||
249 0010 312B cmp r3, #49
|
||
250 0012 06D8 bhi .L17
|
||
211:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =1; // first half DMA buffer
|
||
251 .loc 1 211 5 is_stmt 1 view .LVU37
|
||
252 .loc 1 211 40 is_stmt 0 view .LVU38
|
||
253 0014 1346 mov r3, r2
|
||
254 0016 0122 movs r2, #1
|
||
255 0018 1A71 strb r2, [r3, #4]
|
||
256 .L18:
|
||
212:Core/Src/stm32f4xx_it.c **** } else{
|
||
213:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =2; // second half DMA buffer
|
||
214:Core/Src/stm32f4xx_it.c **** }
|
||
ARM GAS /tmp/ccmc0UgA.s page 9
|
||
|
||
|
||
215:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 0 */
|
||
216:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(CURR_STEP_START_TRG_Pin);
|
||
257 .loc 1 216 3 is_stmt 1 view .LVU39
|
||
258 001a 0120 movs r0, #1
|
||
259 001c FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler
|
||
260 .LVL1:
|
||
217:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 1 */
|
||
218:Core/Src/stm32f4xx_it.c ****
|
||
219:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 1 */
|
||
220:Core/Src/stm32f4xx_it.c **** }
|
||
261 .loc 1 220 1 is_stmt 0 view .LVU40
|
||
262 0020 08BD pop {r3, pc}
|
||
263 .L17:
|
||
213:Core/Src/stm32f4xx_it.c **** }
|
||
264 .loc 1 213 5 is_stmt 1 view .LVU41
|
||
213:Core/Src/stm32f4xx_it.c **** }
|
||
265 .loc 1 213 40 is_stmt 0 view .LVU42
|
||
266 0022 034B ldr r3, .L20+4
|
||
267 0024 0222 movs r2, #2
|
||
268 0026 1A71 strb r2, [r3, #4]
|
||
269 0028 F7E7 b .L18
|
||
270 .L21:
|
||
271 002a 00BF .align 2
|
||
272 .L20:
|
||
273 002c 00000000 .word hdma_adc1
|
||
274 0030 00000000 .word Sweep_state
|
||
275 .cfi_endproc
|
||
276 .LFE248:
|
||
278 .section .text.EXTI3_IRQHandler,"ax",%progbits
|
||
279 .align 1
|
||
280 .global EXTI3_IRQHandler
|
||
281 .syntax unified
|
||
282 .thumb
|
||
283 .thumb_func
|
||
285 EXTI3_IRQHandler:
|
||
286 .LFB249:
|
||
221:Core/Src/stm32f4xx_it.c ****
|
||
222:Core/Src/stm32f4xx_it.c **** /**
|
||
223:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line3 interrupt.
|
||
224:Core/Src/stm32f4xx_it.c **** */
|
||
225:Core/Src/stm32f4xx_it.c **** void EXTI3_IRQHandler(void)
|
||
226:Core/Src/stm32f4xx_it.c **** {
|
||
287 .loc 1 226 1 is_stmt 1 view -0
|
||
288 .cfi_startproc
|
||
289 @ args = 0, pretend = 0, frame = 0
|
||
290 @ frame_needed = 0, uses_anonymous_args = 0
|
||
291 0000 08B5 push {r3, lr}
|
||
292 .LCFI2:
|
||
293 .cfi_def_cfa_offset 8
|
||
294 .cfi_offset 3, -8
|
||
295 .cfi_offset 14, -4
|
||
227:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 0 */
|
||
228:Core/Src/stm32f4xx_it.c ****
|
||
229:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 0 */
|
||
230:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(SWEEP_CYCLE_START_TRG_Pin);
|
||
296 .loc 1 230 3 view .LVU44
|
||
297 0002 0220 movs r0, #2
|
||
ARM GAS /tmp/ccmc0UgA.s page 10
|
||
|
||
|
||
298 0004 FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler
|
||
299 .LVL2:
|
||
231:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 1 */
|
||
232:Core/Src/stm32f4xx_it.c ****
|
||
233:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 1 */
|
||
234:Core/Src/stm32f4xx_it.c **** }
|
||
300 .loc 1 234 1 is_stmt 0 view .LVU45
|
||
301 0008 08BD pop {r3, pc}
|
||
302 .cfi_endproc
|
||
303 .LFE249:
|
||
305 .section .text.DMA2_Stream0_IRQHandler,"ax",%progbits
|
||
306 .align 1
|
||
307 .global DMA2_Stream0_IRQHandler
|
||
308 .syntax unified
|
||
309 .thumb
|
||
310 .thumb_func
|
||
312 DMA2_Stream0_IRQHandler:
|
||
313 .LFB250:
|
||
235:Core/Src/stm32f4xx_it.c ****
|
||
236:Core/Src/stm32f4xx_it.c **** /**
|
||
237:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream0 global interrupt.
|
||
238:Core/Src/stm32f4xx_it.c **** */
|
||
239:Core/Src/stm32f4xx_it.c **** void DMA2_Stream0_IRQHandler(void)
|
||
240:Core/Src/stm32f4xx_it.c **** {
|
||
314 .loc 1 240 1 is_stmt 1 view -0
|
||
315 .cfi_startproc
|
||
316 @ args = 0, pretend = 0, frame = 0
|
||
317 @ frame_needed = 0, uses_anonymous_args = 0
|
||
318 0000 08B5 push {r3, lr}
|
||
319 .LCFI3:
|
||
320 .cfi_def_cfa_offset 8
|
||
321 .cfi_offset 3, -8
|
||
322 .cfi_offset 14, -4
|
||
241:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
|
||
242:Core/Src/stm32f4xx_it.c ****
|
||
243:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 0 */
|
||
244:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1);
|
||
323 .loc 1 244 3 view .LVU47
|
||
324 0002 0248 ldr r0, .L26
|
||
325 0004 FFF7FEFF bl HAL_DMA_IRQHandler
|
||
326 .LVL3:
|
||
245:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
|
||
246:Core/Src/stm32f4xx_it.c ****
|
||
247:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 1 */
|
||
248:Core/Src/stm32f4xx_it.c **** }
|
||
327 .loc 1 248 1 is_stmt 0 view .LVU48
|
||
328 0008 08BD pop {r3, pc}
|
||
329 .L27:
|
||
330 000a 00BF .align 2
|
||
331 .L26:
|
||
332 000c 00000000 .word hdma_adc1
|
||
333 .cfi_endproc
|
||
334 .LFE250:
|
||
336 .section .text.OTG_FS_IRQHandler,"ax",%progbits
|
||
337 .align 1
|
||
338 .global OTG_FS_IRQHandler
|
||
339 .syntax unified
|
||
ARM GAS /tmp/ccmc0UgA.s page 11
|
||
|
||
|
||
340 .thumb
|
||
341 .thumb_func
|
||
343 OTG_FS_IRQHandler:
|
||
344 .LFB251:
|
||
249:Core/Src/stm32f4xx_it.c ****
|
||
250:Core/Src/stm32f4xx_it.c **** /**
|
||
251:Core/Src/stm32f4xx_it.c **** * @brief This function handles USB On The Go FS global interrupt.
|
||
252:Core/Src/stm32f4xx_it.c **** */
|
||
253:Core/Src/stm32f4xx_it.c **** void OTG_FS_IRQHandler(void)
|
||
254:Core/Src/stm32f4xx_it.c **** {
|
||
345 .loc 1 254 1 is_stmt 1 view -0
|
||
346 .cfi_startproc
|
||
347 @ args = 0, pretend = 0, frame = 0
|
||
348 @ frame_needed = 0, uses_anonymous_args = 0
|
||
349 0000 08B5 push {r3, lr}
|
||
350 .LCFI4:
|
||
351 .cfi_def_cfa_offset 8
|
||
352 .cfi_offset 3, -8
|
||
353 .cfi_offset 14, -4
|
||
255:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 0 */
|
||
256:Core/Src/stm32f4xx_it.c ****
|
||
257:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 0 */
|
||
258:Core/Src/stm32f4xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
|
||
354 .loc 1 258 3 view .LVU50
|
||
355 0002 0248 ldr r0, .L30
|
||
356 0004 FFF7FEFF bl HAL_PCD_IRQHandler
|
||
357 .LVL4:
|
||
259:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 1 */
|
||
260:Core/Src/stm32f4xx_it.c ****
|
||
261:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 1 */
|
||
262:Core/Src/stm32f4xx_it.c **** }
|
||
358 .loc 1 262 1 is_stmt 0 view .LVU51
|
||
359 0008 08BD pop {r3, pc}
|
||
360 .L31:
|
||
361 000a 00BF .align 2
|
||
362 .L30:
|
||
363 000c 00000000 .word hpcd_USB_OTG_FS
|
||
364 .cfi_endproc
|
||
365 .LFE251:
|
||
367 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits
|
||
368 .align 1
|
||
369 .global HAL_ADC_ConvCpltCallback
|
||
370 .syntax unified
|
||
371 .thumb
|
||
372 .thumb_func
|
||
374 HAL_ADC_ConvCpltCallback:
|
||
375 .LVL5:
|
||
376 .LFB252:
|
||
263:Core/Src/stm32f4xx_it.c ****
|
||
264:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 1 */
|
||
265:Core/Src/stm32f4xx_it.c ****
|
||
266:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
|
||
267:Core/Src/stm32f4xx_it.c **** {
|
||
377 .loc 1 267 1 is_stmt 1 view -0
|
||
378 .cfi_startproc
|
||
379 @ args = 0, pretend = 0, frame = 0
|
||
380 @ frame_needed = 0, uses_anonymous_args = 0
|
||
ARM GAS /tmp/ccmc0UgA.s page 12
|
||
|
||
|
||
381 .loc 1 267 1 is_stmt 0 view .LVU53
|
||
382 0000 10B5 push {r4, lr}
|
||
383 .LCFI5:
|
||
384 .cfi_def_cfa_offset 8
|
||
385 .cfi_offset 4, -8
|
||
386 .cfi_offset 14, -4
|
||
268:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET);
|
||
387 .loc 1 268 3 is_stmt 1 view .LVU54
|
||
388 0002 0122 movs r2, #1
|
||
389 0004 8021 movs r1, #128
|
||
390 0006 2F48 ldr r0, .L43
|
||
391 .LVL6:
|
||
392 .loc 1 268 3 is_stmt 0 view .LVU55
|
||
393 0008 FFF7FEFF bl HAL_GPIO_WritePin
|
||
394 .LVL7:
|
||
269:Core/Src/stm32f4xx_it.c ****
|
||
270:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 2) {
|
||
395 .loc 1 270 3 is_stmt 1 view .LVU56
|
||
396 .loc 1 270 18 is_stmt 0 view .LVU57
|
||
397 000c 2E4B ldr r3, .L43+4
|
||
398 000e 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2
|
||
399 .loc 1 270 6 view .LVU58
|
||
400 0010 022B cmp r3, #2
|
||
401 0012 22D0 beq .L41
|
||
402 .LBB2:
|
||
271:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
273:Core/Src/stm32f4xx_it.c **** }
|
||
274:Core/Src/stm32f4xx_it.c ****
|
||
275:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N - ADC_BUFF_SIZE/2;
|
||
276:Core/Src/stm32f4xx_it.c ****
|
||
277:Core/Src/stm32f4xx_it.c ****
|
||
278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
|
||
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
|
||
282:Core/Src/stm32f4xx_it.c ****
|
||
283:Core/Src/stm32f4xx_it.c ****
|
||
284:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
|
||
285:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
|
||
286:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
|
||
287:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
|
||
288:Core/Src/stm32f4xx_it.c ****
|
||
289:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE; i++) {
|
||
290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
291:Core/Src/stm32f4xx_it.c **** }
|
||
292:Core/Src/stm32f4xx_it.c **** ADC_proc.N = ADC_BUFF_SIZE - Sweep_state.curr_step_start_DMA_N;
|
||
293:Core/Src/stm32f4xx_it.c ****
|
||
294:Core/Src/stm32f4xx_it.c ****
|
||
295:Core/Src/stm32f4xx_it.c **** }else{
|
||
296:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < ADC_BUFF_SIZE; i++) {
|
||
403 .loc 1 296 19 view .LVU59
|
||
404 0014 3223 movs r3, #50
|
||
405 0016 39E0 b .L34
|
||
406 .LVL8:
|
||
407 .L35:
|
||
408 .loc 1 296 19 view .LVU60
|
||
ARM GAS /tmp/ccmc0UgA.s page 13
|
||
|
||
|
||
409 .LBE2:
|
||
410 .LBB3:
|
||
272:Core/Src/stm32f4xx_it.c **** }
|
||
411 .loc 1 272 7 is_stmt 1 view .LVU61
|
||
272:Core/Src/stm32f4xx_it.c **** }
|
||
412 .loc 1 272 15 is_stmt 0 view .LVU62
|
||
413 0018 2C49 ldr r1, .L43+8
|
||
414 001a 4A68 ldr r2, [r1, #4]
|
||
272:Core/Src/stm32f4xx_it.c **** }
|
||
415 .loc 1 272 41 view .LVU63
|
||
416 001c 2C48 ldr r0, .L43+12
|
||
417 001e 30F81300 ldrh r0, [r0, r3, lsl #1]
|
||
272:Core/Src/stm32f4xx_it.c **** }
|
||
418 .loc 1 272 20 view .LVU64
|
||
419 0022 0244 add r2, r2, r0
|
||
420 0024 4A60 str r2, [r1, #4]
|
||
271:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
421 .loc 1 271 80 is_stmt 1 discriminator 3 view .LVU65
|
||
422 0026 0133 adds r3, r3, #1
|
||
423 .LVL9:
|
||
424 .L33:
|
||
271:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
425 .loc 1 271 42 discriminator 1 view .LVU66
|
||
271:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
426 .loc 1 271 55 is_stmt 0 discriminator 1 view .LVU67
|
||
427 0028 274A ldr r2, .L43+4
|
||
428 002a 9068 ldr r0, [r2, #8]
|
||
271:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
429 .loc 1 271 42 discriminator 1 view .LVU68
|
||
430 002c 9842 cmp r0, r3
|
||
431 002e F3D8 bhi .L35
|
||
432 .LBE3:
|
||
275:Core/Src/stm32f4xx_it.c ****
|
||
433 .loc 1 275 5 is_stmt 1 view .LVU69
|
||
275:Core/Src/stm32f4xx_it.c ****
|
||
434 .loc 1 275 13 is_stmt 0 view .LVU70
|
||
435 0030 264B ldr r3, .L43+8
|
||
436 .LVL10:
|
||
275:Core/Src/stm32f4xx_it.c ****
|
||
437 .loc 1 275 13 view .LVU71
|
||
438 0032 DA68 ldr r2, [r3, #12]
|
||
275:Core/Src/stm32f4xx_it.c ****
|
||
439 .loc 1 275 16 view .LVU72
|
||
440 0034 0244 add r2, r2, r0
|
||
441 0036 323A subs r2, r2, #50
|
||
442 0038 DA60 str r2, [r3, #12]
|
||
278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
443 .loc 1 278 5 is_stmt 1 view .LVU73
|
||
278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
444 .loc 1 278 35 is_stmt 0 view .LVU74
|
||
445 003a 5C68 ldr r4, [r3, #4]
|
||
278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
446 .loc 1 278 25 view .LVU75
|
||
447 003c 2549 ldr r1, .L43+16
|
||
448 003e 4C60 str r4, [r1, #4]
|
||
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
449 .loc 1 279 5 is_stmt 1 view .LVU76
|
||
ARM GAS /tmp/ccmc0UgA.s page 14
|
||
|
||
|
||
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
450 .loc 1 279 35 is_stmt 0 view .LVU77
|
||
451 0040 9C68 ldr r4, [r3, #8]
|
||
279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
452 .loc 1 279 25 view .LVU78
|
||
453 0042 8C60 str r4, [r1, #8]
|
||
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
|
||
454 .loc 1 280 5 is_stmt 1 view .LVU79
|
||
280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
|
||
455 .loc 1 280 23 is_stmt 0 view .LVU80
|
||
456 0044 CA60 str r2, [r1, #12]
|
||
281:Core/Src/stm32f4xx_it.c ****
|
||
457 .loc 1 281 5 is_stmt 1 view .LVU81
|
||
281:Core/Src/stm32f4xx_it.c ****
|
||
458 .loc 1 281 28 is_stmt 0 view .LVU82
|
||
459 0046 0222 movs r2, #2
|
||
460 0048 0A70 strb r2, [r1]
|
||
284:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
|
||
461 .loc 1 284 5 is_stmt 1 view .LVU83
|
||
284:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
|
||
462 .loc 1 284 18 is_stmt 0 view .LVU84
|
||
463 004a 0022 movs r2, #0
|
||
464 004c 5A60 str r2, [r3, #4]
|
||
285:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
|
||
465 .loc 1 285 5 is_stmt 1 view .LVU85
|
||
285:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
|
||
466 .loc 1 285 16 is_stmt 0 view .LVU86
|
||
467 004e DA60 str r2, [r3, #12]
|
||
286:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
|
||
468 .loc 1 286 5 is_stmt 1 view .LVU87
|
||
286:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
|
||
469 .loc 1 286 18 is_stmt 0 view .LVU88
|
||
470 0050 9A60 str r2, [r3, #8]
|
||
287:Core/Src/stm32f4xx_it.c ****
|
||
471 .loc 1 287 5 is_stmt 1 view .LVU89
|
||
287:Core/Src/stm32f4xx_it.c ****
|
||
472 .loc 1 287 21 is_stmt 0 view .LVU90
|
||
473 0052 0122 movs r2, #1
|
||
474 0054 1A70 strb r2, [r3]
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
475 .loc 1 289 5 is_stmt 1 view .LVU91
|
||
476 .LBB4:
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
477 .loc 1 289 10 view .LVU92
|
||
478 .LVL11:
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
479 .loc 1 289 19 is_stmt 0 view .LVU93
|
||
480 0056 0346 mov r3, r0
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
481 .loc 1 289 5 view .LVU94
|
||
482 0058 09E0 b .L36
|
||
483 .LVL12:
|
||
484 .L41:
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
485 .loc 1 289 5 view .LVU95
|
||
486 .LBE4:
|
||
487 .LBB5:
|
||
ARM GAS /tmp/ccmc0UgA.s page 15
|
||
|
||
|
||
271:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
488 .loc 1 271 19 view .LVU96
|
||
489 005a 3223 movs r3, #50
|
||
490 005c E4E7 b .L33
|
||
491 .LVL13:
|
||
492 .L37:
|
||
271:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
493 .loc 1 271 19 view .LVU97
|
||
494 .LBE5:
|
||
495 .LBB6:
|
||
290:Core/Src/stm32f4xx_it.c **** }
|
||
496 .loc 1 290 7 is_stmt 1 view .LVU98
|
||
290:Core/Src/stm32f4xx_it.c **** }
|
||
497 .loc 1 290 15 is_stmt 0 view .LVU99
|
||
498 005e 1B49 ldr r1, .L43+8
|
||
499 0060 4A68 ldr r2, [r1, #4]
|
||
290:Core/Src/stm32f4xx_it.c **** }
|
||
500 .loc 1 290 41 view .LVU100
|
||
501 0062 1B4C ldr r4, .L43+12
|
||
502 0064 34F813C0 ldrh ip, [r4, r3, lsl #1]
|
||
290:Core/Src/stm32f4xx_it.c **** }
|
||
503 .loc 1 290 20 view .LVU101
|
||
504 0068 6244 add r2, r2, ip
|
||
505 006a 4A60 str r2, [r1, #4]
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
506 .loc 1 289 78 is_stmt 1 discriminator 3 view .LVU102
|
||
507 006c 0133 adds r3, r3, #1
|
||
508 .LVL14:
|
||
509 .L36:
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
510 .loc 1 289 60 discriminator 1 view .LVU103
|
||
511 006e 632B cmp r3, #99
|
||
512 0070 F5D9 bls .L37
|
||
289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
513 .loc 1 289 60 is_stmt 0 discriminator 1 view .LVU104
|
||
514 .LBE6:
|
||
292:Core/Src/stm32f4xx_it.c ****
|
||
515 .loc 1 292 5 is_stmt 1 view .LVU105
|
||
292:Core/Src/stm32f4xx_it.c ****
|
||
516 .loc 1 292 32 is_stmt 0 view .LVU106
|
||
517 0072 C0F16400 rsb r0, r0, #100
|
||
292:Core/Src/stm32f4xx_it.c ****
|
||
518 .loc 1 292 16 view .LVU107
|
||
519 0076 154B ldr r3, .L43+8
|
||
520 .LVL15:
|
||
292:Core/Src/stm32f4xx_it.c ****
|
||
521 .loc 1 292 16 view .LVU108
|
||
522 0078 D860 str r0, [r3, #12]
|
||
523 007a 0DE0 b .L38
|
||
524 .LVL16:
|
||
525 .L39:
|
||
526 .LBB7:
|
||
297:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
527 .loc 1 297 7 is_stmt 1 view .LVU109
|
||
528 .loc 1 297 15 is_stmt 0 view .LVU110
|
||
529 007c 1349 ldr r1, .L43+8
|
||
530 007e 4A68 ldr r2, [r1, #4]
|
||
ARM GAS /tmp/ccmc0UgA.s page 16
|
||
|
||
|
||
531 .loc 1 297 41 view .LVU111
|
||
532 0080 1348 ldr r0, .L43+12
|
||
533 0082 30F81300 ldrh r0, [r0, r3, lsl #1]
|
||
534 .loc 1 297 20 view .LVU112
|
||
535 0086 0244 add r2, r2, r0
|
||
536 0088 4A60 str r2, [r1, #4]
|
||
296:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
537 .loc 1 296 60 is_stmt 1 discriminator 3 view .LVU113
|
||
538 008a 0133 adds r3, r3, #1
|
||
539 .LVL17:
|
||
540 .L34:
|
||
296:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
541 .loc 1 296 42 discriminator 1 view .LVU114
|
||
542 008c 632B cmp r3, #99
|
||
543 008e F5D9 bls .L39
|
||
544 .LBE7:
|
||
298:Core/Src/stm32f4xx_it.c **** }
|
||
299:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE - ADC_BUFF_SIZE/2;
|
||
545 .loc 1 299 5 view .LVU115
|
||
546 .loc 1 299 13 is_stmt 0 view .LVU116
|
||
547 0090 0E4A ldr r2, .L43+8
|
||
548 0092 D368 ldr r3, [r2, #12]
|
||
549 .LVL18:
|
||
550 .loc 1 299 16 view .LVU117
|
||
551 0094 3233 adds r3, r3, #50
|
||
552 0096 D360 str r3, [r2, #12]
|
||
553 .LVL19:
|
||
554 .L38:
|
||
300:Core/Src/stm32f4xx_it.c **** }
|
||
301:Core/Src/stm32f4xx_it.c **** if (ADC_proc.N >= ADC_BUFF_SIZE*100){
|
||
555 .loc 1 301 3 is_stmt 1 view .LVU118
|
||
556 .loc 1 301 15 is_stmt 0 view .LVU119
|
||
557 0098 0C4B ldr r3, .L43+8
|
||
558 009a DA68 ldr r2, [r3, #12]
|
||
559 .loc 1 301 6 view .LVU120
|
||
560 009c 42F20F73 movw r3, #9999
|
||
561 00a0 9A42 cmp r2, r3
|
||
562 00a2 0ED9 bls .L32
|
||
302:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
|
||
563 .loc 1 302 5 is_stmt 1 view .LVU121
|
||
564 .loc 1 302 35 is_stmt 0 view .LVU122
|
||
565 00a4 094B ldr r3, .L43+8
|
||
566 00a6 5868 ldr r0, [r3, #4]
|
||
567 .loc 1 302 25 view .LVU123
|
||
568 00a8 0A49 ldr r1, .L43+16
|
||
569 00aa 4860 str r0, [r1, #4]
|
||
303:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
570 .loc 1 303 5 is_stmt 1 view .LVU124
|
||
571 .loc 1 303 35 is_stmt 0 view .LVU125
|
||
572 00ac 9868 ldr r0, [r3, #8]
|
||
573 .loc 1 303 25 view .LVU126
|
||
574 00ae 8860 str r0, [r1, #8]
|
||
304:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
575 .loc 1 304 5 is_stmt 1 view .LVU127
|
||
576 .loc 1 304 23 is_stmt 0 view .LVU128
|
||
577 00b0 CA60 str r2, [r1, #12]
|
||
305:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
|
||
ARM GAS /tmp/ccmc0UgA.s page 17
|
||
|
||
|
||
578 .loc 1 305 5 is_stmt 1 view .LVU129
|
||
579 .loc 1 305 28 is_stmt 0 view .LVU130
|
||
580 00b2 0222 movs r2, #2
|
||
581 00b4 0A70 strb r2, [r1]
|
||
306:Core/Src/stm32f4xx_it.c ****
|
||
307:Core/Src/stm32f4xx_it.c ****
|
||
308:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
|
||
582 .loc 1 308 5 is_stmt 1 view .LVU131
|
||
583 .loc 1 308 18 is_stmt 0 view .LVU132
|
||
584 00b6 0022 movs r2, #0
|
||
585 00b8 5A60 str r2, [r3, #4]
|
||
309:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
|
||
586 .loc 1 309 5 is_stmt 1 view .LVU133
|
||
587 .loc 1 309 16 is_stmt 0 view .LVU134
|
||
588 00ba DA60 str r2, [r3, #12]
|
||
310:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
|
||
589 .loc 1 310 5 is_stmt 1 view .LVU135
|
||
590 .loc 1 310 18 is_stmt 0 view .LVU136
|
||
591 00bc 9A60 str r2, [r3, #8]
|
||
311:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
|
||
592 .loc 1 311 5 is_stmt 1 view .LVU137
|
||
593 .loc 1 311 21 is_stmt 0 view .LVU138
|
||
594 00be 0122 movs r2, #1
|
||
595 00c0 1A70 strb r2, [r3]
|
||
596 .L32:
|
||
312:Core/Src/stm32f4xx_it.c **** }
|
||
313:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled
|
||
314:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here
|
||
315:Core/Src/stm32f4xx_it.c **** }
|
||
597 .loc 1 315 1 view .LVU139
|
||
598 00c2 10BD pop {r4, pc}
|
||
599 .L44:
|
||
600 .align 2
|
||
601 .L43:
|
||
602 00c4 00040240 .word 1073873920
|
||
603 00c8 00000000 .word Sweep_state
|
||
604 00cc 00000000 .word ADC_proc
|
||
605 00d0 00000000 .word ADC1_buff_circular
|
||
606 00d4 00000000 .word ADC_proc_shadow
|
||
607 .cfi_endproc
|
||
608 .LFE252:
|
||
610 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits
|
||
611 .align 1
|
||
612 .global HAL_ADC_ConvHalfCpltCallback
|
||
613 .syntax unified
|
||
614 .thumb
|
||
615 .thumb_func
|
||
617 HAL_ADC_ConvHalfCpltCallback:
|
||
618 .LVL20:
|
||
619 .LFB253:
|
||
316:Core/Src/stm32f4xx_it.c ****
|
||
317:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
|
||
318:Core/Src/stm32f4xx_it.c **** {
|
||
620 .loc 1 318 1 is_stmt 1 view -0
|
||
621 .cfi_startproc
|
||
622 @ args = 0, pretend = 0, frame = 0
|
||
623 @ frame_needed = 0, uses_anonymous_args = 0
|
||
ARM GAS /tmp/ccmc0UgA.s page 18
|
||
|
||
|
||
624 .loc 1 318 1 is_stmt 0 view .LVU141
|
||
625 0000 10B5 push {r4, lr}
|
||
626 .LCFI6:
|
||
627 .cfi_def_cfa_offset 8
|
||
628 .cfi_offset 4, -8
|
||
629 .cfi_offset 14, -4
|
||
319:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET);
|
||
320:Core/Src/stm32f4xx_it.c ****
|
||
321:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin);
|
||
630 .loc 1 321 3 is_stmt 1 view .LVU142
|
||
631 0002 8021 movs r1, #128
|
||
632 0004 2348 ldr r0, .L55
|
||
633 .LVL21:
|
||
634 .loc 1 321 3 is_stmt 0 view .LVU143
|
||
635 0006 FFF7FEFF bl HAL_GPIO_TogglePin
|
||
636 .LVL22:
|
||
322:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 1) {
|
||
637 .loc 1 322 3 is_stmt 1 view .LVU144
|
||
638 .loc 1 322 18 is_stmt 0 view .LVU145
|
||
639 000a 234B ldr r3, .L55+4
|
||
640 000c 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2
|
||
641 .loc 1 322 6 view .LVU146
|
||
642 000e 012B cmp r3, #1
|
||
643 0010 21D0 beq .L53
|
||
644 .LBB8:
|
||
323:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
324:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
325:Core/Src/stm32f4xx_it.c **** }
|
||
326:Core/Src/stm32f4xx_it.c ****
|
||
327:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N;
|
||
328:Core/Src/stm32f4xx_it.c ****
|
||
329:Core/Src/stm32f4xx_it.c ****
|
||
330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum;
|
||
331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
332:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
333:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
|
||
334:Core/Src/stm32f4xx_it.c ****
|
||
335:Core/Src/stm32f4xx_it.c ****
|
||
336:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0;
|
||
337:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
|
||
338:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
|
||
339:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
|
||
340:Core/Src/stm32f4xx_it.c ****
|
||
341:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE/2; i++) {
|
||
342:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
343:Core/Src/stm32f4xx_it.c **** }
|
||
344:Core/Src/stm32f4xx_it.c **** ADC_proc.N = Sweep_state.curr_step_start_DMA_N;
|
||
345:Core/Src/stm32f4xx_it.c ****
|
||
346:Core/Src/stm32f4xx_it.c **** }else{
|
||
347:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < ADC_BUFF_SIZE/2; i++) {
|
||
645 .loc 1 347 19 view .LVU147
|
||
646 0012 0023 movs r3, #0
|
||
647 0014 36E0 b .L47
|
||
648 .LVL23:
|
||
649 .L48:
|
||
650 .loc 1 347 19 view .LVU148
|
||
651 .LBE8:
|
||
ARM GAS /tmp/ccmc0UgA.s page 19
|
||
|
||
|
||
652 .LBB9:
|
||
324:Core/Src/stm32f4xx_it.c **** }
|
||
653 .loc 1 324 7 is_stmt 1 view .LVU149
|
||
324:Core/Src/stm32f4xx_it.c **** }
|
||
654 .loc 1 324 15 is_stmt 0 view .LVU150
|
||
655 0016 2149 ldr r1, .L55+8
|
||
656 0018 4A68 ldr r2, [r1, #4]
|
||
324:Core/Src/stm32f4xx_it.c **** }
|
||
657 .loc 1 324 41 view .LVU151
|
||
658 001a 2148 ldr r0, .L55+12
|
||
659 001c 30F81300 ldrh r0, [r0, r3, lsl #1]
|
||
324:Core/Src/stm32f4xx_it.c **** }
|
||
660 .loc 1 324 20 view .LVU152
|
||
661 0020 0244 add r2, r2, r0
|
||
662 0022 4A60 str r2, [r1, #4]
|
||
323:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
663 .loc 1 323 66 is_stmt 1 discriminator 3 view .LVU153
|
||
664 0024 0133 adds r3, r3, #1
|
||
665 .LVL24:
|
||
666 .L46:
|
||
323:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
667 .loc 1 323 28 discriminator 1 view .LVU154
|
||
323:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
668 .loc 1 323 41 is_stmt 0 discriminator 1 view .LVU155
|
||
669 0026 1C4A ldr r2, .L55+4
|
||
670 0028 9068 ldr r0, [r2, #8]
|
||
323:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) {
|
||
671 .loc 1 323 28 discriminator 1 view .LVU156
|
||
672 002a 9842 cmp r0, r3
|
||
673 002c F3D8 bhi .L48
|
||
674 .LBE9:
|
||
327:Core/Src/stm32f4xx_it.c ****
|
||
675 .loc 1 327 5 is_stmt 1 view .LVU157
|
||
327:Core/Src/stm32f4xx_it.c ****
|
||
676 .loc 1 327 13 is_stmt 0 view .LVU158
|
||
677 002e 1B4B ldr r3, .L55+8
|
||
678 .LVL25:
|
||
327:Core/Src/stm32f4xx_it.c ****
|
||
679 .loc 1 327 13 view .LVU159
|
||
680 0030 D968 ldr r1, [r3, #12]
|
||
327:Core/Src/stm32f4xx_it.c ****
|
||
681 .loc 1 327 16 view .LVU160
|
||
682 0032 0144 add r1, r1, r0
|
||
683 0034 D960 str r1, [r3, #12]
|
||
330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
684 .loc 1 330 5 is_stmt 1 view .LVU161
|
||
330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
685 .loc 1 330 35 is_stmt 0 view .LVU162
|
||
686 0036 5C68 ldr r4, [r3, #4]
|
||
330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg;
|
||
687 .loc 1 330 25 view .LVU163
|
||
688 0038 1A4A ldr r2, .L55+16
|
||
689 003a 5460 str r4, [r2, #4]
|
||
331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
690 .loc 1 331 5 is_stmt 1 view .LVU164
|
||
331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
691 .loc 1 331 35 is_stmt 0 view .LVU165
|
||
ARM GAS /tmp/ccmc0UgA.s page 20
|
||
|
||
|
||
692 003c 9C68 ldr r4, [r3, #8]
|
||
331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N;
|
||
693 .loc 1 331 25 view .LVU166
|
||
694 003e 9460 str r4, [r2, #8]
|
||
332:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
|
||
695 .loc 1 332 5 is_stmt 1 view .LVU167
|
||
332:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled
|
||
696 .loc 1 332 23 is_stmt 0 view .LVU168
|
||
697 0040 D160 str r1, [r2, #12]
|
||
333:Core/Src/stm32f4xx_it.c ****
|
||
698 .loc 1 333 5 is_stmt 1 view .LVU169
|
||
333:Core/Src/stm32f4xx_it.c ****
|
||
699 .loc 1 333 28 is_stmt 0 view .LVU170
|
||
700 0042 0221 movs r1, #2
|
||
701 0044 1170 strb r1, [r2]
|
||
336:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
|
||
702 .loc 1 336 5 is_stmt 1 view .LVU171
|
||
336:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0;
|
||
703 .loc 1 336 18 is_stmt 0 view .LVU172
|
||
704 0046 0022 movs r2, #0
|
||
705 0048 5A60 str r2, [r3, #4]
|
||
337:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
|
||
706 .loc 1 337 5 is_stmt 1 view .LVU173
|
||
337:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0;
|
||
707 .loc 1 337 16 is_stmt 0 view .LVU174
|
||
708 004a DA60 str r2, [r3, #12]
|
||
338:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
|
||
709 .loc 1 338 5 is_stmt 1 view .LVU175
|
||
338:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data
|
||
710 .loc 1 338 18 is_stmt 0 view .LVU176
|
||
711 004c 9A60 str r2, [r3, #8]
|
||
339:Core/Src/stm32f4xx_it.c ****
|
||
712 .loc 1 339 5 is_stmt 1 view .LVU177
|
||
339:Core/Src/stm32f4xx_it.c ****
|
||
713 .loc 1 339 21 is_stmt 0 view .LVU178
|
||
714 004e 0122 movs r2, #1
|
||
715 0050 1A70 strb r2, [r3]
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
716 .loc 1 341 5 is_stmt 1 view .LVU179
|
||
717 .LBB10:
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
718 .loc 1 341 10 view .LVU180
|
||
719 .LVL26:
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
720 .loc 1 341 19 is_stmt 0 view .LVU181
|
||
721 0052 0346 mov r3, r0
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
722 .loc 1 341 5 view .LVU182
|
||
723 0054 09E0 b .L49
|
||
724 .LVL27:
|
||
725 .L53:
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
726 .loc 1 341 5 view .LVU183
|
||
727 .LBE10:
|
||
728 .LBB11:
|
||
323:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
729 .loc 1 323 19 view .LVU184
|
||
ARM GAS /tmp/ccmc0UgA.s page 21
|
||
|
||
|
||
730 0056 0023 movs r3, #0
|
||
731 0058 E5E7 b .L46
|
||
732 .LVL28:
|
||
733 .L50:
|
||
323:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
734 .loc 1 323 19 view .LVU185
|
||
735 .LBE11:
|
||
736 .LBB12:
|
||
342:Core/Src/stm32f4xx_it.c **** }
|
||
737 .loc 1 342 7 is_stmt 1 view .LVU186
|
||
342:Core/Src/stm32f4xx_it.c **** }
|
||
738 .loc 1 342 15 is_stmt 0 view .LVU187
|
||
739 005a 1049 ldr r1, .L55+8
|
||
740 005c 4A68 ldr r2, [r1, #4]
|
||
342:Core/Src/stm32f4xx_it.c **** }
|
||
741 .loc 1 342 41 view .LVU188
|
||
742 005e 104C ldr r4, .L55+12
|
||
743 0060 34F813C0 ldrh ip, [r4, r3, lsl #1]
|
||
342:Core/Src/stm32f4xx_it.c **** }
|
||
744 .loc 1 342 20 view .LVU189
|
||
745 0064 6244 add r2, r2, ip
|
||
746 0066 4A60 str r2, [r1, #4]
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
747 .loc 1 341 80 is_stmt 1 discriminator 3 view .LVU190
|
||
748 0068 0133 adds r3, r3, #1
|
||
749 .LVL29:
|
||
750 .L49:
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
751 .loc 1 341 60 discriminator 1 view .LVU191
|
||
752 006a 312B cmp r3, #49
|
||
753 006c F5D9 bls .L50
|
||
341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
754 .loc 1 341 60 is_stmt 0 discriminator 1 view .LVU192
|
||
755 .LBE12:
|
||
344:Core/Src/stm32f4xx_it.c ****
|
||
756 .loc 1 344 5 is_stmt 1 view .LVU193
|
||
344:Core/Src/stm32f4xx_it.c ****
|
||
757 .loc 1 344 16 is_stmt 0 view .LVU194
|
||
758 006e 0B4B ldr r3, .L55+8
|
||
759 .LVL30:
|
||
344:Core/Src/stm32f4xx_it.c ****
|
||
760 .loc 1 344 16 view .LVU195
|
||
761 0070 D860 str r0, [r3, #12]
|
||
762 0072 0DE0 b .L45
|
||
763 .LVL31:
|
||
764 .L52:
|
||
765 .LBB13:
|
||
348:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
766 .loc 1 348 7 is_stmt 1 view .LVU196
|
||
767 .loc 1 348 15 is_stmt 0 view .LVU197
|
||
768 0074 0949 ldr r1, .L55+8
|
||
769 0076 4A68 ldr r2, [r1, #4]
|
||
770 .loc 1 348 41 view .LVU198
|
||
771 0078 0948 ldr r0, .L55+12
|
||
772 007a 30F81300 ldrh r0, [r0, r3, lsl #1]
|
||
773 .loc 1 348 20 view .LVU199
|
||
774 007e 0244 add r2, r2, r0
|
||
ARM GAS /tmp/ccmc0UgA.s page 22
|
||
|
||
|
||
775 0080 4A60 str r2, [r1, #4]
|
||
347:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
776 .loc 1 347 48 is_stmt 1 discriminator 3 view .LVU200
|
||
777 0082 0133 adds r3, r3, #1
|
||
778 .LVL32:
|
||
779 .L47:
|
||
347:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i];
|
||
780 .loc 1 347 28 discriminator 1 view .LVU201
|
||
781 0084 312B cmp r3, #49
|
||
782 0086 F5D9 bls .L52
|
||
783 .LBE13:
|
||
349:Core/Src/stm32f4xx_it.c **** }
|
||
350:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE/2;
|
||
784 .loc 1 350 5 view .LVU202
|
||
785 .loc 1 350 13 is_stmt 0 view .LVU203
|
||
786 0088 044A ldr r2, .L55+8
|
||
787 008a D368 ldr r3, [r2, #12]
|
||
788 .LVL33:
|
||
789 .loc 1 350 16 view .LVU204
|
||
790 008c 3233 adds r3, r3, #50
|
||
791 008e D360 str r3, [r2, #12]
|
||
792 .LVL34:
|
||
793 .L45:
|
||
351:Core/Src/stm32f4xx_it.c **** }
|
||
352:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled
|
||
353:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here
|
||
354:Core/Src/stm32f4xx_it.c **** }
|
||
794 .loc 1 354 1 view .LVU205
|
||
795 0090 10BD pop {r4, pc}
|
||
796 .L56:
|
||
797 0092 00BF .align 2
|
||
798 .L55:
|
||
799 0094 00040240 .word 1073873920
|
||
800 0098 00000000 .word Sweep_state
|
||
801 009c 00000000 .word ADC_proc
|
||
802 00a0 00000000 .word ADC1_buff_circular
|
||
803 00a4 00000000 .word ADC_proc_shadow
|
||
804 .cfi_endproc
|
||
805 .LFE253:
|
||
807 .global curr_step_start_N
|
||
808 .section .bss.curr_step_start_N,"aw",%nobits
|
||
809 .align 2
|
||
812 curr_step_start_N:
|
||
813 0000 00000000 .space 4
|
||
814 .text
|
||
815 .Letext0:
|
||
816 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
|
||
817 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h"
|
||
818 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
|
||
819 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
|
||
820 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
|
||
821 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
|
||
822 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
|
||
823 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h"
|
||
824 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h"
|
||
825 .file 11 "Core/Inc/main.h"
|
||
826 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
|
||
ARM GAS /tmp/ccmc0UgA.s page 23
|
||
|
||
|
||
ARM GAS /tmp/ccmc0UgA.s page 24
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:00000000 stm32f4xx_it.c
|
||
/tmp/ccmc0UgA.s:21 .text.NMI_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:27 .text.NMI_Handler:00000000 NMI_Handler
|
||
/tmp/ccmc0UgA.s:44 .text.HardFault_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
|
||
/tmp/ccmc0UgA.s:67 .text.MemManage_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
|
||
/tmp/ccmc0UgA.s:90 .text.BusFault_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
|
||
/tmp/ccmc0UgA.s:113 .text.UsageFault_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
|
||
/tmp/ccmc0UgA.s:136 .text.SVC_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:142 .text.SVC_Handler:00000000 SVC_Handler
|
||
/tmp/ccmc0UgA.s:155 .text.DebugMon_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
|
||
/tmp/ccmc0UgA.s:174 .text.PendSV_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
|
||
/tmp/ccmc0UgA.s:193 .text.SysTick_Handler:00000000 $t
|
||
/tmp/ccmc0UgA.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
|
||
/tmp/ccmc0UgA.s:219 .text.EXTI0_IRQHandler:00000000 $t
|
||
/tmp/ccmc0UgA.s:225 .text.EXTI0_IRQHandler:00000000 EXTI0_IRQHandler
|
||
/tmp/ccmc0UgA.s:273 .text.EXTI0_IRQHandler:0000002c $d
|
||
/tmp/ccmc0UgA.s:279 .text.EXTI3_IRQHandler:00000000 $t
|
||
/tmp/ccmc0UgA.s:285 .text.EXTI3_IRQHandler:00000000 EXTI3_IRQHandler
|
||
/tmp/ccmc0UgA.s:306 .text.DMA2_Stream0_IRQHandler:00000000 $t
|
||
/tmp/ccmc0UgA.s:312 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler
|
||
/tmp/ccmc0UgA.s:332 .text.DMA2_Stream0_IRQHandler:0000000c $d
|
||
/tmp/ccmc0UgA.s:337 .text.OTG_FS_IRQHandler:00000000 $t
|
||
/tmp/ccmc0UgA.s:343 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler
|
||
/tmp/ccmc0UgA.s:363 .text.OTG_FS_IRQHandler:0000000c $d
|
||
/tmp/ccmc0UgA.s:368 .text.HAL_ADC_ConvCpltCallback:00000000 $t
|
||
/tmp/ccmc0UgA.s:374 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback
|
||
/tmp/ccmc0UgA.s:602 .text.HAL_ADC_ConvCpltCallback:000000c4 $d
|
||
/tmp/ccmc0UgA.s:611 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t
|
||
/tmp/ccmc0UgA.s:617 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback
|
||
/tmp/ccmc0UgA.s:799 .text.HAL_ADC_ConvHalfCpltCallback:00000094 $d
|
||
/tmp/ccmc0UgA.s:812 .bss.curr_step_start_N:00000000 curr_step_start_N
|
||
/tmp/ccmc0UgA.s:809 .bss.curr_step_start_N:00000000 $d
|
||
|
||
UNDEFINED SYMBOLS
|
||
HAL_IncTick
|
||
HAL_GPIO_EXTI_IRQHandler
|
||
hdma_adc1
|
||
Sweep_state
|
||
HAL_DMA_IRQHandler
|
||
HAL_PCD_IRQHandler
|
||
hpcd_USB_OTG_FS
|
||
HAL_GPIO_WritePin
|
||
ADC_proc
|
||
ADC1_buff_circular
|
||
ADC_proc_shadow
|
||
HAL_GPIO_TogglePin
|