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RFG_stm32_ADC_STM32F429/build/stm32f4xx_hal_rcc.lst

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ARM GAS /tmp/ccP22z8b.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f4xx_hal_rcc.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c"
20 .section .text.HAL_RCC_DeInit,"ax",%progbits
21 .align 1
22 .weak HAL_RCC_DeInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_RCC_DeInit:
28 .LFB239:
1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ******************************************************************************
3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @file stm32f4xx_hal_rcc.c
4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @author MCD Application Team
5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver.
6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral:
8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Initialization and de-initialization functions
9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Peripheral Control functions
10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ==============================================================================
13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC specific features #####
14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ==============================================================================
15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator
17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache
18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and I-Cache are disabled, and all peripherals are off except internal
19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SRAM, Flash and JTAG.
20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** all peripherals mapped on these busses are running at HSI speed.
22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which
24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** are assigned to be used for debug purpose.
25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Once the device started from reset, the user application has to:
28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock
29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (if the application needs higher frequency/performance)
30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings
ARM GAS /tmp/ccP22z8b.s page 2
31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the AHB and APB busses prescalers
32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used
33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals which clocks are not
34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC Limitations #####
37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ==============================================================================
38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral
40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write
41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from/to registers.
42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping.
43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle
44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register
45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle
46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register
47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Implemented Workaround:
50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) For AHB & APB peripherals, a dummy read to the peripheral register has been
51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ******************************************************************************
55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @attention
56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * Copyright (c) 2017 STMicroelectronics.
58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * All rights reserved.
59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This software is licensed under terms that can be found in the LICENSE file in
61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the root directory of this software component.
62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ******************************************************************************
64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #include "stm32f4xx_hal.h"
68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup STM32F4xx_HAL_Driver
70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC RCC
74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver
75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup RCC_Private_Constants
83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
ARM GAS /tmp/ccP22z8b.s page 3
88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA
89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8
90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_GPIO_PORT GPIOC
93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_PIN GPIO_PIN_9
94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @}
96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @}
104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private functions ---------------------------------------------------------*/
107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initialization and Configuration functions
114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Initialization and de-initialization functions #####
118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators
121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and APB2).
123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration
125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the PLL as System clock source.
127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source.
130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source.
133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 168 MHz)
138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz).
140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System
143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt
144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
ARM GAS /tmp/ccP22z8b.s page 4
145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector.
146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PA8 pin.
149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PC9 pin.
152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] System, AHB and APB busses clocks configuration
154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HSE and PLL.
156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable
157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped
158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock
160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the peripherals mapped on these busses. You can use
161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum
164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz.
165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices,
169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz
170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz,
174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 84 MHz and PCLK1 42 MHz.
175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz,
179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 100 MHz and PCLK1 50 MHz.
180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state.
189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below:
190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSI ON and used as system clock source
191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSE and PLL OFF
192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1.
193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - CSS, MCO1 and MCO2 OFF
194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - All interrupts disabled
195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function doesn't modify the configuration of the
196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - Peripheral clocks
197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - LSI, LSE and RTC clocks
198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status
199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_DeInit(void)
201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
ARM GAS /tmp/ccP22z8b.s page 5
29 .loc 1 201 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK;
34 .loc 1 202 3 view .LVU1
203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
35 .loc 1 203 1 is_stmt 0 view .LVU2
36 0000 0020 movs r0, #0
37 0002 7047 bx lr
38 .cfi_endproc
39 .LFE239:
41 .section .text.HAL_RCC_OscConfig,"ax",%progbits
42 .align 1
43 .weak HAL_RCC_OscConfig
44 .syntax unified
45 .thumb
46 .thumb_func
48 HAL_RCC_OscConfig:
49 .LVL0:
50 .LFB240:
204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the
207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC_OscInitTypeDef.
208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators.
210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock.
211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to LSE Off
213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then LSE On or LSE Bypass.
214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to HSE Off
216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then HSE On or HSE Bypass.
217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status
218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct)
220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
51 .loc 1 220 1 is_stmt 1 view -0
52 .cfi_startproc
53 @ args = 0, pretend = 0, frame = 8
54 @ frame_needed = 0, uses_anonymous_args = 0
221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
55 .loc 1 221 3 view .LVU4
222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pll_config;
56 .loc 1 222 3 view .LVU5
223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */
224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_OscInitStruct == NULL)
57 .loc 1 224 3 view .LVU6
58 .loc 1 224 6 is_stmt 0 view .LVU7
59 0000 0028 cmp r0, #0
60 0002 00F0E081 beq .L52
220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
61 .loc 1 220 1 view .LVU8
62 0006 70B5 push {r4, r5, r6, lr}
63 .LCFI0:
ARM GAS /tmp/ccP22z8b.s page 6
64 .cfi_def_cfa_offset 16
65 .cfi_offset 4, -16
66 .cfi_offset 5, -12
67 .cfi_offset 6, -8
68 .cfi_offset 14, -4
69 0008 82B0 sub sp, sp, #8
70 .LCFI1:
71 .cfi_def_cfa_offset 24
72 000a 0446 mov r4, r0
225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
73 .loc 1 230 3 is_stmt 1 view .LVU9
231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/
232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
74 .loc 1 232 3 view .LVU10
75 .loc 1 232 26 is_stmt 0 view .LVU11
76 000c 0368 ldr r3, [r0]
77 .loc 1 232 6 view .LVU12
78 000e 13F0010F tst r3, #1
79 0012 3BD0 beq .L4
233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
80 .loc 1 235 5 is_stmt 1 view .LVU13
236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not dis
237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \
81 .loc 1 237 5 view .LVU14
82 .loc 1 237 10 is_stmt 0 view .LVU15
83 0014 9F4B ldr r3, .L93
84 0016 9B68 ldr r3, [r3, #8]
85 0018 03F00C03 and r3, r3, #12
86 .loc 1 237 8 view .LVU16
87 001c 042B cmp r3, #4
88 001e 2CD0 beq .L5
238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC
89 .loc 1 238 11 view .LVU17
90 0020 9C4B ldr r3, .L93
91 0022 9B68 ldr r3, [r3, #8]
92 0024 03F00C03 and r3, r3, #12
237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC
93 .loc 1 237 61 discriminator 1 view .LVU18
94 0028 082B cmp r3, #8
95 002a 21D0 beq .L79
96 .L6:
239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE
241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/
ARM GAS /tmp/ccP22z8b.s page 7
248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
97 .loc 1 248 7 is_stmt 1 view .LVU19
98 .loc 1 248 7 view .LVU20
99 002c 6368 ldr r3, [r4, #4]
100 002e B3F5803F cmp r3, #65536
101 0032 4FD0 beq .L80
102 .loc 1 248 7 discriminator 2 view .LVU21
103 0034 B3F5A02F cmp r3, #327680
104 0038 52D0 beq .L81
105 .loc 1 248 7 discriminator 5 view .LVU22
106 003a 964B ldr r3, .L93
107 003c 1A68 ldr r2, [r3]
108 003e 22F48032 bic r2, r2, #65536
109 0042 1A60 str r2, [r3]
110 .loc 1 248 7 discriminator 5 view .LVU23
111 0044 1A68 ldr r2, [r3]
112 0046 22F48022 bic r2, r2, #262144
113 004a 1A60 str r2, [r3]
114 .L8:
115 .loc 1 248 7 discriminator 7 view .LVU24
249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE State */
251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
116 .loc 1 251 7 view .LVU25
117 .loc 1 251 29 is_stmt 0 view .LVU26
118 004c 6368 ldr r3, [r4, #4]
119 .loc 1 251 10 view .LVU27
120 004e 002B cmp r3, #0
121 0050 50D0 beq .L10
252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
122 .loc 1 254 9 is_stmt 1 view .LVU28
123 .loc 1 254 21 is_stmt 0 view .LVU29
124 0052 FFF7FEFF bl HAL_GetTick
125 .LVL1:
126 .loc 1 254 21 view .LVU30
127 0056 0546 mov r5, r0
128 .LVL2:
255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is ready */
257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
129 .loc 1 257 9 is_stmt 1 view .LVU31
130 .L11:
131 .loc 1 257 52 view .LVU32
132 .loc 1 257 16 is_stmt 0 view .LVU33
133 0058 8E4B ldr r3, .L93
134 005a 1B68 ldr r3, [r3]
135 .loc 1 257 52 view .LVU34
136 005c 13F4003F tst r3, #131072
137 0060 14D1 bne .L4
258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
138 .loc 1 259 11 is_stmt 1 view .LVU35
139 .loc 1 259 16 is_stmt 0 view .LVU36
140 0062 FFF7FEFF bl HAL_GetTick
141 .LVL3:
ARM GAS /tmp/ccP22z8b.s page 8
142 .loc 1 259 30 discriminator 1 view .LVU37
143 0066 401B subs r0, r0, r5
144 .loc 1 259 14 discriminator 1 view .LVU38
145 0068 6428 cmp r0, #100
146 006a F5D9 bls .L11
260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
147 .loc 1 261 20 view .LVU39
148 006c 0320 movs r0, #3
149 006e B1E1 b .L3
150 .LVL4:
151 .L79:
238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
152 .loc 1 238 70 view .LVU40
153 0070 884B ldr r3, .L93
154 0072 5B68 ldr r3, [r3, #4]
238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
155 .loc 1 238 62 view .LVU41
156 0074 13F4800F tst r3, #4194304
157 0078 D8D0 beq .L6
158 .L5:
240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
159 .loc 1 240 7 is_stmt 1 view .LVU42
240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
160 .loc 1 240 12 is_stmt 0 view .LVU43
161 007a 864B ldr r3, .L93
162 007c 1B68 ldr r3, [r3]
240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
163 .loc 1 240 10 view .LVU44
164 007e 13F4003F tst r3, #131072
165 0082 03D0 beq .L4
240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
166 .loc 1 240 79 discriminator 1 view .LVU45
167 0084 6368 ldr r3, [r4, #4]
240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
168 .loc 1 240 58 discriminator 1 view .LVU46
169 0086 002B cmp r3, #0
170 0088 00F09F81 beq .L82
171 .LVL5:
172 .L4:
262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is bypassed or disabled */
271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/ccP22z8b.s page 9
279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/
282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
173 .loc 1 282 3 is_stmt 1 view .LVU47
174 .loc 1 282 26 is_stmt 0 view .LVU48
175 008c 2368 ldr r3, [r4]
176 .loc 1 282 6 view .LVU49
177 008e 13F0020F tst r3, #2
178 0092 54D0 beq .L15
283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
179 .loc 1 285 5 is_stmt 1 view .LVU50
286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
180 .loc 1 286 5 view .LVU51
287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock *
289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \
181 .loc 1 289 5 view .LVU52
182 .loc 1 289 10 is_stmt 0 view .LVU53
183 0094 7F4B ldr r3, .L93
184 0096 9B68 ldr r3, [r3, #8]
185 .loc 1 289 8 view .LVU54
186 0098 13F00C0F tst r3, #12
187 009c 3ED0 beq .L16
290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC
188 .loc 1 290 11 view .LVU55
189 009e 7D4B ldr r3, .L93
190 00a0 9B68 ldr r3, [r3, #8]
191 00a2 03F00C03 and r3, r3, #12
289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC
192 .loc 1 289 61 discriminator 1 view .LVU56
193 00a6 082B cmp r3, #8
194 00a8 33D0 beq .L83
195 .L17:
291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */
293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI
294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */
298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI State */
307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
196 .loc 1 307 7 is_stmt 1 view .LVU57
197 .loc 1 307 29 is_stmt 0 view .LVU58
198 00aa E368 ldr r3, [r4, #12]
199 .loc 1 307 10 view .LVU59
ARM GAS /tmp/ccP22z8b.s page 10
200 00ac 002B cmp r3, #0
201 00ae 68D0 beq .L19
308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */
310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE();
202 .loc 1 310 9 is_stmt 1 view .LVU60
203 00b0 794B ldr r3, .L93+4
204 00b2 0122 movs r2, #1
205 00b4 1A60 str r2, [r3]
311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
206 .loc 1 313 9 view .LVU61
207 .loc 1 313 21 is_stmt 0 view .LVU62
208 00b6 FFF7FEFF bl HAL_GetTick
209 .LVL6:
210 00ba 0546 mov r5, r0
211 .LVL7:
314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */
316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
212 .loc 1 316 9 is_stmt 1 view .LVU63
213 .L20:
214 .loc 1 316 52 view .LVU64
215 .loc 1 316 16 is_stmt 0 view .LVU65
216 00bc 754B ldr r3, .L93
217 00be 1B68 ldr r3, [r3]
218 .loc 1 316 52 view .LVU66
219 00c0 13F0020F tst r3, #2
220 00c4 54D1 bne .L84
317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
221 .loc 1 318 11 is_stmt 1 view .LVU67
222 .loc 1 318 16 is_stmt 0 view .LVU68
223 00c6 FFF7FEFF bl HAL_GetTick
224 .LVL8:
225 .loc 1 318 30 discriminator 1 view .LVU69
226 00ca 401B subs r0, r0, r5
227 .loc 1 318 14 discriminator 1 view .LVU70
228 00cc 0228 cmp r0, #2
229 00ce F5D9 bls .L20
319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
230 .loc 1 320 20 view .LVU71
231 00d0 0320 movs r0, #3
232 00d2 7FE1 b .L3
233 .LVL9:
234 .L80:
248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
235 .loc 1 248 7 is_stmt 1 discriminator 1 view .LVU72
236 00d4 6F4A ldr r2, .L93
237 00d6 1368 ldr r3, [r2]
238 00d8 43F48033 orr r3, r3, #65536
239 00dc 1360 str r3, [r2]
240 00de B5E7 b .L8
241 .L81:
248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/ccP22z8b.s page 11
242 .loc 1 248 7 discriminator 4 view .LVU73
243 00e0 6C4B ldr r3, .L93
244 00e2 1A68 ldr r2, [r3]
245 00e4 42F48022 orr r2, r2, #262144
246 00e8 1A60 str r2, [r3]
248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
247 .loc 1 248 7 discriminator 4 view .LVU74
248 00ea 1A68 ldr r2, [r3]
249 00ec 42F48032 orr r2, r2, #65536
250 00f0 1A60 str r2, [r3]
251 00f2 ABE7 b .L8
252 .L10:
268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
253 .loc 1 268 9 view .LVU75
268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
254 .loc 1 268 21 is_stmt 0 view .LVU76
255 00f4 FFF7FEFF bl HAL_GetTick
256 .LVL10:
268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
257 .loc 1 268 21 view .LVU77
258 00f8 0546 mov r5, r0
259 .LVL11:
271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
260 .loc 1 271 9 is_stmt 1 view .LVU78
261 .L13:
271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
262 .loc 1 271 52 view .LVU79
271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
263 .loc 1 271 16 is_stmt 0 view .LVU80
264 00fa 664B ldr r3, .L93
265 00fc 1B68 ldr r3, [r3]
271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
266 .loc 1 271 52 view .LVU81
267 00fe 13F4003F tst r3, #131072
268 0102 C3D0 beq .L4
273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
269 .loc 1 273 11 is_stmt 1 view .LVU82
273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
270 .loc 1 273 16 is_stmt 0 view .LVU83
271 0104 FFF7FEFF bl HAL_GetTick
272 .LVL12:
273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
273 .loc 1 273 30 discriminator 1 view .LVU84
274 0108 401B subs r0, r0, r5
273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
275 .loc 1 273 14 discriminator 1 view .LVU85
276 010a 6428 cmp r0, #100
277 010c F5D9 bls .L13
275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
278 .loc 1 275 20 view .LVU86
279 010e 0320 movs r0, #3
280 0110 60E1 b .L3
281 .LVL13:
282 .L83:
290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
283 .loc 1 290 70 view .LVU87
284 0112 604B ldr r3, .L93
ARM GAS /tmp/ccP22z8b.s page 12
285 0114 5B68 ldr r3, [r3, #4]
290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
286 .loc 1 290 62 view .LVU88
287 0116 13F4800F tst r3, #4194304
288 011a C6D1 bne .L17
289 .L16:
293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
290 .loc 1 293 7 is_stmt 1 view .LVU89
293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
291 .loc 1 293 12 is_stmt 0 view .LVU90
292 011c 5D4B ldr r3, .L93
293 011e 1B68 ldr r3, [r3]
293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
294 .loc 1 293 10 view .LVU91
295 0120 13F0020F tst r3, #2
296 0124 03D0 beq .L18
293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
297 .loc 1 293 79 discriminator 1 view .LVU92
298 0126 E368 ldr r3, [r4, #12]
293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
299 .loc 1 293 58 discriminator 1 view .LVU93
300 0128 012B cmp r3, #1
301 012a 40F05081 bne .L56
302 .L18:
301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
303 .loc 1 301 9 is_stmt 1 view .LVU94
304 012e 594A ldr r2, .L93
305 0130 1368 ldr r3, [r2]
306 0132 23F0F803 bic r3, r3, #248
307 0136 2169 ldr r1, [r4, #16]
308 0138 43EAC103 orr r3, r3, r1, lsl #3
309 013c 1360 str r3, [r2]
310 .L15:
321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */
330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE();
331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */
336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/ccP22z8b.s page 13
345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/
347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
311 .loc 1 347 3 view .LVU95
312 .loc 1 347 26 is_stmt 0 view .LVU96
313 013e 2368 ldr r3, [r4]
314 .loc 1 347 6 view .LVU97
315 0140 13F0080F tst r3, #8
316 0144 42D0 beq .L24
348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
317 .loc 1 350 5 is_stmt 1 view .LVU98
351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSI State */
353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
318 .loc 1 353 5 view .LVU99
319 .loc 1 353 27 is_stmt 0 view .LVU100
320 0146 6369 ldr r3, [r4, #20]
321 .loc 1 353 8 view .LVU101
322 0148 6BB3 cbz r3, .L25
354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */
356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE();
323 .loc 1 356 7 is_stmt 1 view .LVU102
324 014a 534B ldr r3, .L93+4
325 014c 0122 movs r2, #1
326 014e C3F8802E str r2, [r3, #3712]
357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
327 .loc 1 359 7 view .LVU103
328 .loc 1 359 19 is_stmt 0 view .LVU104
329 0152 FFF7FEFF bl HAL_GetTick
330 .LVL14:
331 0156 0546 mov r5, r0
332 .LVL15:
360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */
362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
333 .loc 1 362 7 is_stmt 1 view .LVU105
334 .L26:
335 .loc 1 362 50 view .LVU106
336 .loc 1 362 14 is_stmt 0 view .LVU107
337 0158 4E4B ldr r3, .L93
338 015a 5B6F ldr r3, [r3, #116]
339 .loc 1 362 50 view .LVU108
340 015c 13F0020F tst r3, #2
341 0160 34D1 bne .L24
363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
342 .loc 1 364 9 is_stmt 1 view .LVU109
343 .loc 1 364 14 is_stmt 0 view .LVU110
344 0162 FFF7FEFF bl HAL_GetTick
345 .LVL16:
346 .loc 1 364 28 discriminator 1 view .LVU111
347 0166 401B subs r0, r0, r5
ARM GAS /tmp/ccP22z8b.s page 14
348 .loc 1 364 12 discriminator 1 view .LVU112
349 0168 0228 cmp r0, #2
350 016a F5D9 bls .L26
365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
351 .loc 1 366 18 view .LVU113
352 016c 0320 movs r0, #3
353 016e 31E1 b .L3
354 .L84:
325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
355 .loc 1 325 9 is_stmt 1 view .LVU114
356 0170 484A ldr r2, .L93
357 0172 1368 ldr r3, [r2]
358 0174 23F0F803 bic r3, r3, #248
359 0178 2169 ldr r1, [r4, #16]
360 017a 43EAC103 orr r3, r3, r1, lsl #3
361 017e 1360 str r3, [r2]
362 0180 DDE7 b .L15
363 .LVL17:
364 .L19:
330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
365 .loc 1 330 9 view .LVU115
366 0182 454B ldr r3, .L93+4
367 0184 0022 movs r2, #0
368 0186 1A60 str r2, [r3]
333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
369 .loc 1 333 9 view .LVU116
333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
370 .loc 1 333 21 is_stmt 0 view .LVU117
371 0188 FFF7FEFF bl HAL_GetTick
372 .LVL18:
373 018c 0546 mov r5, r0
374 .LVL19:
336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
375 .loc 1 336 9 is_stmt 1 view .LVU118
376 .L22:
336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
377 .loc 1 336 52 view .LVU119
336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
378 .loc 1 336 16 is_stmt 0 view .LVU120
379 018e 414B ldr r3, .L93
380 0190 1B68 ldr r3, [r3]
336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
381 .loc 1 336 52 view .LVU121
382 0192 13F0020F tst r3, #2
383 0196 D2D0 beq .L15
338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
384 .loc 1 338 11 is_stmt 1 view .LVU122
338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
385 .loc 1 338 16 is_stmt 0 view .LVU123
386 0198 FFF7FEFF bl HAL_GetTick
387 .LVL20:
338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
388 .loc 1 338 30 discriminator 1 view .LVU124
389 019c 401B subs r0, r0, r5
338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
390 .loc 1 338 14 discriminator 1 view .LVU125
ARM GAS /tmp/ccP22z8b.s page 15
391 019e 0228 cmp r0, #2
392 01a0 F5D9 bls .L22
340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
393 .loc 1 340 20 view .LVU126
394 01a2 0320 movs r0, #3
395 01a4 16E1 b .L3
396 .LVL21:
397 .L25:
367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */
373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE();
398 .loc 1 373 7 is_stmt 1 view .LVU127
399 01a6 3C4B ldr r3, .L93+4
400 01a8 0022 movs r2, #0
401 01aa C3F8802E str r2, [r3, #3712]
374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
402 .loc 1 376 7 view .LVU128
403 .loc 1 376 19 is_stmt 0 view .LVU129
404 01ae FFF7FEFF bl HAL_GetTick
405 .LVL22:
406 01b2 0546 mov r5, r0
407 .LVL23:
377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */
379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
408 .loc 1 379 7 is_stmt 1 view .LVU130
409 .L28:
410 .loc 1 379 50 view .LVU131
411 .loc 1 379 14 is_stmt 0 view .LVU132
412 01b4 374B ldr r3, .L93
413 01b6 5B6F ldr r3, [r3, #116]
414 .loc 1 379 50 view .LVU133
415 01b8 13F0020F tst r3, #2
416 01bc 06D0 beq .L24
380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
417 .loc 1 381 9 is_stmt 1 view .LVU134
418 .loc 1 381 14 is_stmt 0 view .LVU135
419 01be FFF7FEFF bl HAL_GetTick
420 .LVL24:
421 .loc 1 381 28 discriminator 1 view .LVU136
422 01c2 401B subs r0, r0, r5
423 .loc 1 381 12 discriminator 1 view .LVU137
424 01c4 0228 cmp r0, #2
425 01c6 F5D9 bls .L28
382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
426 .loc 1 383 18 view .LVU138
427 01c8 0320 movs r0, #3
428 01ca 03E1 b .L3
429 .LVL25:
ARM GAS /tmp/ccP22z8b.s page 16
430 .L24:
384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/
389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
431 .loc 1 389 3 is_stmt 1 view .LVU139
432 .loc 1 389 26 is_stmt 0 view .LVU140
433 01cc 2368 ldr r3, [r4]
434 .loc 1 389 6 view .LVU141
435 01ce 13F0040F tst r3, #4
436 01d2 77D0 beq .L30
437 .LBB2:
390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET;
438 .loc 1 391 5 is_stmt 1 view .LVU142
439 .LVL26:
392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
440 .loc 1 394 5 view .LVU143
395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */
397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */
398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_PWR_IS_CLK_DISABLED())
441 .loc 1 398 5 view .LVU144
442 .loc 1 398 9 is_stmt 0 view .LVU145
443 01d4 2F4B ldr r3, .L93
444 01d6 1B6C ldr r3, [r3, #64]
445 .loc 1 398 8 view .LVU146
446 01d8 13F0805F tst r3, #268435456
447 01dc 33D1 bne .L61
399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE();
448 .loc 1 400 7 is_stmt 1 view .LVU147
449 .LBB3:
450 .loc 1 400 7 view .LVU148
451 01de 0023 movs r3, #0
452 01e0 0193 str r3, [sp, #4]
453 .loc 1 400 7 view .LVU149
454 01e2 2C4B ldr r3, .L93
455 01e4 1A6C ldr r2, [r3, #64]
456 01e6 42F08052 orr r2, r2, #268435456
457 01ea 1A64 str r2, [r3, #64]
458 .loc 1 400 7 view .LVU150
459 01ec 1B6C ldr r3, [r3, #64]
460 01ee 03F08053 and r3, r3, #268435456
461 01f2 0193 str r3, [sp, #4]
462 .loc 1 400 7 view .LVU151
463 01f4 019B ldr r3, [sp, #4]
464 .LBE3:
465 .loc 1 400 7 view .LVU152
401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pwrclkchanged = SET;
466 .loc 1 401 7 view .LVU153
467 .LVL27:
468 .loc 1 401 21 is_stmt 0 view .LVU154
ARM GAS /tmp/ccP22z8b.s page 17
469 01f6 0125 movs r5, #1
470 .LVL28:
471 .L31:
402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
472 .loc 1 404 5 is_stmt 1 view .LVU155
473 .loc 1 404 9 is_stmt 0 view .LVU156
474 01f8 284B ldr r3, .L93+8
475 01fa 1B68 ldr r3, [r3]
476 .loc 1 404 8 view .LVU157
477 01fc 13F4807F tst r3, #256
478 0200 23D0 beq .L85
479 .L32:
405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable write access to Backup domain */
407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */
410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/
422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
480 .loc 1 422 5 is_stmt 1 view .LVU158
481 .loc 1 422 5 view .LVU159
482 0202 A368 ldr r3, [r4, #8]
483 0204 012B cmp r3, #1
484 0206 34D0 beq .L86
485 .loc 1 422 5 discriminator 2 view .LVU160
486 0208 052B cmp r3, #5
487 020a 38D0 beq .L87
488 .loc 1 422 5 discriminator 5 view .LVU161
489 020c 214B ldr r3, .L93
490 020e 1A6F ldr r2, [r3, #112]
491 0210 22F00102 bic r2, r2, #1
492 0214 1A67 str r2, [r3, #112]
493 .loc 1 422 5 discriminator 5 view .LVU162
494 0216 1A6F ldr r2, [r3, #112]
495 0218 22F00402 bic r2, r2, #4
496 021c 1A67 str r2, [r3, #112]
497 .L36:
498 .loc 1 422 5 discriminator 7 view .LVU163
423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
499 .loc 1 424 5 view .LVU164
500 .loc 1 424 27 is_stmt 0 view .LVU165
501 021e A368 ldr r3, [r4, #8]
502 .loc 1 424 8 view .LVU166
ARM GAS /tmp/ccP22z8b.s page 18
503 0220 002B cmp r3, #0
504 0222 3DD0 beq .L38
425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
505 .loc 1 427 7 is_stmt 1 view .LVU167
506 .loc 1 427 19 is_stmt 0 view .LVU168
507 0224 FFF7FEFF bl HAL_GetTick
508 .LVL29:
509 0228 0646 mov r6, r0
510 .LVL30:
428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */
430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
511 .loc 1 430 7 is_stmt 1 view .LVU169
512 .L39:
513 .loc 1 430 50 view .LVU170
514 .loc 1 430 14 is_stmt 0 view .LVU171
515 022a 1A4B ldr r3, .L93
516 022c 1B6F ldr r3, [r3, #112]
517 .loc 1 430 50 view .LVU172
518 022e 13F0020F tst r3, #2
519 0232 46D1 bne .L41
431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
520 .loc 1 432 9 is_stmt 1 view .LVU173
521 .loc 1 432 14 is_stmt 0 view .LVU174
522 0234 FFF7FEFF bl HAL_GetTick
523 .LVL31:
524 .loc 1 432 28 discriminator 1 view .LVU175
525 0238 801B subs r0, r0, r6
526 .loc 1 432 12 discriminator 1 view .LVU176
527 023a 41F28833 movw r3, #5000
528 023e 9842 cmp r0, r3
529 0240 F3D9 bls .L39
433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
530 .loc 1 434 18 view .LVU177
531 0242 0320 movs r0, #3
532 0244 C6E0 b .L3
533 .LVL32:
534 .L61:
391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
535 .loc 1 391 22 view .LVU178
536 0246 0025 movs r5, #0
537 0248 D6E7 b .L31
538 .LVL33:
539 .L85:
407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
540 .loc 1 407 7 is_stmt 1 view .LVU179
541 024a 144A ldr r2, .L93+8
542 024c 1368 ldr r3, [r2]
543 024e 43F48073 orr r3, r3, #256
544 0252 1360 str r3, [r2]
410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
545 .loc 1 410 7 view .LVU180
410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/ccP22z8b.s page 19
546 .loc 1 410 19 is_stmt 0 view .LVU181
547 0254 FFF7FEFF bl HAL_GetTick
548 .LVL34:
549 0258 0646 mov r6, r0
550 .LVL35:
412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
551 .loc 1 412 7 is_stmt 1 view .LVU182
552 .L33:
412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
553 .loc 1 412 14 view .LVU183
554 025a 104B ldr r3, .L93+8
555 025c 1B68 ldr r3, [r3]
556 025e 13F4807F tst r3, #256
557 0262 CED1 bne .L32
414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
558 .loc 1 414 9 view .LVU184
414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
559 .loc 1 414 14 is_stmt 0 view .LVU185
560 0264 FFF7FEFF bl HAL_GetTick
561 .LVL36:
414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
562 .loc 1 414 28 discriminator 1 view .LVU186
563 0268 801B subs r0, r0, r6
414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
564 .loc 1 414 12 discriminator 1 view .LVU187
565 026a 0228 cmp r0, #2
566 026c F5D9 bls .L33
416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
567 .loc 1 416 18 view .LVU188
568 026e 0320 movs r0, #3
569 0270 B0E0 b .L3
570 .LVL37:
571 .L86:
422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
572 .loc 1 422 5 is_stmt 1 discriminator 1 view .LVU189
573 0272 084A ldr r2, .L93
574 0274 136F ldr r3, [r2, #112]
575 0276 43F00103 orr r3, r3, #1
576 027a 1367 str r3, [r2, #112]
577 027c CFE7 b .L36
578 .L87:
422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
579 .loc 1 422 5 discriminator 4 view .LVU190
580 027e 054B ldr r3, .L93
581 0280 1A6F ldr r2, [r3, #112]
582 0282 42F00402 orr r2, r2, #4
583 0286 1A67 str r2, [r3, #112]
422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
584 .loc 1 422 5 discriminator 4 view .LVU191
585 0288 1A6F ldr r2, [r3, #112]
586 028a 42F00102 orr r2, r2, #1
587 028e 1A67 str r2, [r3, #112]
588 0290 C5E7 b .L36
589 .L94:
590 0292 00BF .align 2
591 .L93:
592 0294 00380240 .word 1073887232
ARM GAS /tmp/ccP22z8b.s page 20
593 0298 00004742 .word 1111949312
594 029c 00700040 .word 1073770496
595 .L38:
435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
596 .loc 1 441 7 view .LVU192
597 .loc 1 441 19 is_stmt 0 view .LVU193
598 02a0 FFF7FEFF bl HAL_GetTick
599 .LVL38:
600 02a4 0646 mov r6, r0
601 .LVL39:
442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */
444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
602 .loc 1 444 7 is_stmt 1 view .LVU194
603 .L42:
604 .loc 1 444 50 view .LVU195
605 .loc 1 444 14 is_stmt 0 view .LVU196
606 02a6 524B ldr r3, .L95
607 02a8 1B6F ldr r3, [r3, #112]
608 .loc 1 444 50 view .LVU197
609 02aa 13F0020F tst r3, #2
610 02ae 08D0 beq .L41
445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
611 .loc 1 446 9 is_stmt 1 view .LVU198
612 .loc 1 446 14 is_stmt 0 view .LVU199
613 02b0 FFF7FEFF bl HAL_GetTick
614 .LVL40:
615 .loc 1 446 28 discriminator 1 view .LVU200
616 02b4 801B subs r0, r0, r6
617 .loc 1 446 12 discriminator 1 view .LVU201
618 02b6 41F28833 movw r3, #5000
619 02ba 9842 cmp r0, r3
620 02bc F3D9 bls .L42
447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
621 .loc 1 448 18 view .LVU202
622 02be 0320 movs r0, #3
623 02c0 88E0 b .L3
624 .L41:
449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Restore clock configuration if changed */
454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (pwrclkchanged == SET)
625 .loc 1 454 5 is_stmt 1 view .LVU203
626 .loc 1 454 8 is_stmt 0 view .LVU204
627 02c2 EDB9 cbnz r5, .L88
628 .LVL41:
629 .L30:
ARM GAS /tmp/ccP22z8b.s page 21
630 .loc 1 454 8 view .LVU205
631 .LBE2:
455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE();
457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/
460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
632 .loc 1 461 3 is_stmt 1 view .LVU206
462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
633 .loc 1 462 3 view .LVU207
634 .loc 1 462 30 is_stmt 0 view .LVU208
635 02c4 A369 ldr r3, [r4, #24]
636 .loc 1 462 6 view .LVU209
637 02c6 002B cmp r3, #0
638 02c8 00F08380 beq .L65
463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */
465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
639 .loc 1 465 5 is_stmt 1 view .LVU210
640 .loc 1 465 9 is_stmt 0 view .LVU211
641 02cc 484A ldr r2, .L95
642 02ce 9268 ldr r2, [r2, #8]
643 02d0 02F00C02 and r2, r2, #12
644 .loc 1 465 8 view .LVU212
645 02d4 082A cmp r2, #8
646 02d6 51D0 beq .L44
466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
647 .loc 1 467 7 is_stmt 1 view .LVU213
648 .loc 1 467 10 is_stmt 0 view .LVU214
649 02d8 022B cmp r3, #2
650 02da 17D0 beq .L89
468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */
477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is disabled */
483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/ccP22z8b.s page 22
491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the main PLL clock source, multiplication and division factors. */
492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource
493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM
494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)
495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Po
496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the main PLL. */
498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE();
499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */
504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */
515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
651 .loc 1 515 9 is_stmt 1 view .LVU215
652 02dc 454B ldr r3, .L95+4
653 02de 0022 movs r2, #0
654 02e0 1A66 str r2, [r3, #96]
516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
655 .loc 1 518 9 view .LVU216
656 .loc 1 518 21 is_stmt 0 view .LVU217
657 02e2 FFF7FEFF bl HAL_GetTick
658 .LVL42:
659 02e6 0446 mov r4, r0
660 .LVL43:
519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is disabled */
521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
661 .loc 1 521 9 is_stmt 1 view .LVU218
662 .L50:
663 .loc 1 521 52 view .LVU219
664 .loc 1 521 16 is_stmt 0 view .LVU220
665 02e8 414B ldr r3, .L95
666 02ea 1B68 ldr r3, [r3]
667 .loc 1 521 52 view .LVU221
668 02ec 13F0007F tst r3, #33554432
669 02f0 42D0 beq .L90
522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
670 .loc 1 523 11 is_stmt 1 view .LVU222
671 .loc 1 523 16 is_stmt 0 view .LVU223
672 02f2 FFF7FEFF bl HAL_GetTick
673 .LVL44:
674 .loc 1 523 30 discriminator 1 view .LVU224
ARM GAS /tmp/ccP22z8b.s page 23
675 02f6 001B subs r0, r0, r4
676 .loc 1 523 14 discriminator 1 view .LVU225
677 02f8 0228 cmp r0, #2
678 02fa F5D9 bls .L50
524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
679 .loc 1 525 20 view .LVU226
680 02fc 0320 movs r0, #3
681 02fe 69E0 b .L3
682 .LVL45:
683 .L88:
684 .LBB4:
456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
685 .loc 1 456 7 is_stmt 1 view .LVU227
686 0300 3B4A ldr r2, .L95
687 0302 136C ldr r3, [r2, #64]
688 0304 23F08053 bic r3, r3, #268435456
689 0308 1364 str r3, [r2, #64]
690 030a DBE7 b .L30
691 .LVL46:
692 .L89:
456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
693 .loc 1 456 7 is_stmt 0 view .LVU228
694 .LBE4:
470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
695 .loc 1 470 9 is_stmt 1 view .LVU229
471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
696 .loc 1 471 9 view .LVU230
472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
697 .loc 1 472 9 view .LVU231
473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
698 .loc 1 473 9 view .LVU232
474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
699 .loc 1 474 9 view .LVU233
477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
700 .loc 1 477 9 view .LVU234
701 030c 394B ldr r3, .L95+4
702 030e 0022 movs r2, #0
703 0310 1A66 str r2, [r3, #96]
480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
704 .loc 1 480 9 view .LVU235
480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
705 .loc 1 480 21 is_stmt 0 view .LVU236
706 0312 FFF7FEFF bl HAL_GetTick
707 .LVL47:
708 0316 0546 mov r5, r0
709 .LVL48:
483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
710 .loc 1 483 9 is_stmt 1 view .LVU237
711 .L46:
483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
712 .loc 1 483 52 view .LVU238
483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
713 .loc 1 483 16 is_stmt 0 view .LVU239
714 0318 354B ldr r3, .L95
715 031a 1B68 ldr r3, [r3]
483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
ARM GAS /tmp/ccP22z8b.s page 24
716 .loc 1 483 52 view .LVU240
717 031c 13F0007F tst r3, #33554432
718 0320 06D0 beq .L91
485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
719 .loc 1 485 11 is_stmt 1 view .LVU241
485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
720 .loc 1 485 16 is_stmt 0 view .LVU242
721 0322 FFF7FEFF bl HAL_GetTick
722 .LVL49:
485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
723 .loc 1 485 30 discriminator 1 view .LVU243
724 0326 401B subs r0, r0, r5
485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
725 .loc 1 485 14 discriminator 1 view .LVU244
726 0328 0228 cmp r0, #2
727 032a F5D9 bls .L46
487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
728 .loc 1 487 20 view .LVU245
729 032c 0320 movs r0, #3
730 032e 51E0 b .L3
731 .L91:
492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM
732 .loc 1 492 9 is_stmt 1 view .LVU246
733 0330 E369 ldr r3, [r4, #28]
734 0332 226A ldr r2, [r4, #32]
735 0334 1343 orrs r3, r3, r2
736 0336 626A ldr r2, [r4, #36]
737 0338 43EA8213 orr r3, r3, r2, lsl #6
738 033c A26A ldr r2, [r4, #40]
739 033e 5208 lsrs r2, r2, #1
740 0340 013A subs r2, r2, #1
741 0342 43EA0243 orr r3, r3, r2, lsl #16
742 0346 E26A ldr r2, [r4, #44]
743 0348 43EA0263 orr r3, r3, r2, lsl #24
744 034c 284A ldr r2, .L95
745 034e 5360 str r3, [r2, #4]
498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
746 .loc 1 498 9 view .LVU247
747 0350 284B ldr r3, .L95+4
748 0352 0122 movs r2, #1
749 0354 1A66 str r2, [r3, #96]
501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
750 .loc 1 501 9 view .LVU248
501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
751 .loc 1 501 21 is_stmt 0 view .LVU249
752 0356 FFF7FEFF bl HAL_GetTick
753 .LVL50:
754 035a 0446 mov r4, r0
755 .LVL51:
504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
756 .loc 1 504 9 is_stmt 1 view .LVU250
757 .L48:
504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
758 .loc 1 504 52 view .LVU251
504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
759 .loc 1 504 16 is_stmt 0 view .LVU252
760 035c 244B ldr r3, .L95
ARM GAS /tmp/ccP22z8b.s page 25
761 035e 1B68 ldr r3, [r3]
504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
762 .loc 1 504 52 view .LVU253
763 0360 13F0007F tst r3, #33554432
764 0364 06D1 bne .L92
506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
765 .loc 1 506 11 is_stmt 1 view .LVU254
506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
766 .loc 1 506 16 is_stmt 0 view .LVU255
767 0366 FFF7FEFF bl HAL_GetTick
768 .LVL52:
506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
769 .loc 1 506 30 discriminator 1 view .LVU256
770 036a 001B subs r0, r0, r4
506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
771 .loc 1 506 14 discriminator 1 view .LVU257
772 036c 0228 cmp r0, #2
773 036e F5D9 bls .L48
508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
774 .loc 1 508 20 view .LVU258
775 0370 0320 movs r0, #3
776 0372 2FE0 b .L3
777 .L92:
526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */
533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */
540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pll_config = RCC->PLLCFGR;
541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined (RCC_PLLCFGR_PLLR)
542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U))
547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_
549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #else
550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U))
555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_PLLCFGR_PLLR */
557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/ccP22z8b.s page 26
560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK;
778 .loc 1 563 10 view .LVU259
779 0374 0020 movs r0, #0
780 0376 2DE0 b .L3
781 .L90:
782 .loc 1 563 10 view .LVU260
783 0378 0020 movs r0, #0
784 037a 2BE0 b .L3
785 .LVL53:
786 .L44:
533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
787 .loc 1 533 7 is_stmt 1 view .LVU261
533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
788 .loc 1 533 10 is_stmt 0 view .LVU262
789 037c 012B cmp r3, #1
790 037e 2BD0 beq .L69
540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined (RCC_PLLCFGR_PLLR)
791 .loc 1 540 9 is_stmt 1 view .LVU263
540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined (RCC_PLLCFGR_PLLR)
792 .loc 1 540 20 is_stmt 0 view .LVU264
793 0380 1B4B ldr r3, .L95
794 0382 5B68 ldr r3, [r3, #4]
795 .LVL54:
550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
796 .loc 1 550 9 is_stmt 1 view .LVU265
551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
797 .loc 1 551 14 is_stmt 0 view .LVU266
798 0384 03F48001 and r1, r3, #4194304
551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
799 .loc 1 551 80 view .LVU267
800 0388 E269 ldr r2, [r4, #28]
550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
801 .loc 1 550 64 discriminator 1 view .LVU268
802 038a 9142 cmp r1, r2
803 038c 26D1 bne .L70
552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
804 .loc 1 552 14 view .LVU269
805 038e 03F03F02 and r2, r3, #63
552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
806 .loc 1 552 79 view .LVU270
807 0392 216A ldr r1, [r4, #32]
551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
808 .loc 1 551 92 view .LVU271
809 0394 8A42 cmp r2, r1
810 0396 23D1 bne .L71
553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U))
811 .loc 1 553 79 view .LVU272
812 0398 616A ldr r1, [r4, #36]
552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
813 .loc 1 552 111 view .LVU273
814 039a 47F6C072 movw r2, #32704
815 039e 1A40 ands r2, r2, r3
816 03a0 B2EB811F cmp r2, r1, lsl #6
817 03a4 1ED1 bne .L72
ARM GAS /tmp/ccP22z8b.s page 27
554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
818 .loc 1 554 14 view .LVU274
819 03a6 03F44031 and r1, r3, #196608
554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
820 .loc 1 554 81 view .LVU275
821 03aa A26A ldr r2, [r4, #40]
554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
822 .loc 1 554 87 view .LVU276
823 03ac 5208 lsrs r2, r2, #1
554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
824 .loc 1 554 94 view .LVU277
825 03ae 013A subs r2, r2, #1
553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U))
826 .loc 1 553 111 view .LVU278
827 03b0 B1EB024F cmp r1, r2, lsl #16
828 03b4 18D1 bne .L73
555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_PLLCFGR_PLLR */
829 .loc 1 555 14 view .LVU279
830 03b6 03F07063 and r3, r3, #251658240
831 .LVL55:
555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_PLLCFGR_PLLR */
832 .loc 1 555 79 view .LVU280
833 03ba E26A ldr r2, [r4, #44]
554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
834 .loc 1 554 126 view .LVU281
835 03bc B3EB026F cmp r3, r2, lsl #24
836 03c0 14D1 bne .L74
837 .loc 1 563 10 view .LVU282
838 03c2 0020 movs r0, #0
839 03c4 06E0 b .L3
840 .LVL56:
841 .L52:
842 .LCFI2:
843 .cfi_def_cfa_offset 0
844 .cfi_restore 4
845 .cfi_restore 5
846 .cfi_restore 6
847 .cfi_restore 14
226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
848 .loc 1 226 12 view .LVU283
849 03c6 0120 movs r0, #1
850 .LVL57:
564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
851 .loc 1 564 1 view .LVU284
852 03c8 7047 bx lr
853 .LVL58:
854 .L82:
855 .LCFI3:
856 .cfi_def_cfa_offset 24
857 .cfi_offset 4, -16
858 .cfi_offset 5, -12
859 .cfi_offset 6, -8
860 .cfi_offset 14, -4
242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
861 .loc 1 242 16 view .LVU285
862 03ca 0120 movs r0, #1
863 .LVL59:
ARM GAS /tmp/ccP22z8b.s page 28
242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
864 .loc 1 242 16 view .LVU286
865 03cc 02E0 b .L3
866 .L56:
295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
867 .loc 1 295 16 view .LVU287
868 03ce 0120 movs r0, #1
869 03d0 00E0 b .L3
870 .L65:
563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
871 .loc 1 563 10 view .LVU288
872 03d2 0020 movs r0, #0
873 .LVL60:
874 .L3:
875 .loc 1 564 1 view .LVU289
876 03d4 02B0 add sp, sp, #8
877 .LCFI4:
878 .cfi_remember_state
879 .cfi_def_cfa_offset 16
880 @ sp needed
881 03d6 70BD pop {r4, r5, r6, pc}
882 .LVL61:
883 .L69:
884 .LCFI5:
885 .cfi_restore_state
535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
886 .loc 1 535 16 view .LVU290
887 03d8 0120 movs r0, #1
888 03da FBE7 b .L3
889 .LVL62:
890 .L70:
558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
891 .loc 1 558 18 view .LVU291
892 03dc 0120 movs r0, #1
893 03de F9E7 b .L3
894 .L71:
895 03e0 0120 movs r0, #1
896 03e2 F7E7 b .L3
897 .L72:
898 03e4 0120 movs r0, #1
899 03e6 F5E7 b .L3
900 .L73:
901 03e8 0120 movs r0, #1
902 03ea F3E7 b .L3
903 .LVL63:
904 .L74:
558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
905 .loc 1 558 18 view .LVU292
906 03ec 0120 movs r0, #1
907 03ee F1E7 b .L3
908 .L96:
909 .align 2
910 .L95:
911 03f0 00380240 .word 1073887232
912 03f4 00004742 .word 1111949312
913 .cfi_endproc
914 .LFE240:
ARM GAS /tmp/ccP22z8b.s page 29
916 .section .text.HAL_RCC_MCOConfig,"ax",%progbits
917 .align 1
918 .global HAL_RCC_MCOConfig
919 .syntax unified
920 .thumb
921 .thumb_func
923 HAL_RCC_MCOConfig:
924 .LVL64:
925 .LFB242:
565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct.
569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral.
571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param FLatency FLASH Latency, this parameter depend on device selected
572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated by HAL_RCC_GetHCLKFreq() function called within this function
575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after
577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * startup from Reset, wake-up from STOP and STANDBY mode, or in case
578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock
579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled).
580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target
582:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * clock source is ready (clock stable after startup delay or PLL locked).
583:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will
584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * occur when the clock source will be ready.
585:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
586:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Depending on the device voltage range, the software has to set correctly
587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
588:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (for more details refer to section above "Initialization/de-initialization functions")
589:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
590:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLaten
592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
594:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
595:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */
596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_ClkInitStruct == NULL)
597:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
599:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
600:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
601:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
605:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
606:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock
607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HCLK) and the supply voltage of the device. */
608:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */
610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (FLatency > __HAL_FLASH_GET_LATENCY())
611:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
ARM GAS /tmp/ccP22z8b.s page 30
613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
614:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
615:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
616:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_FLASH_GET_LATENCY() != FLatency)
618:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
620:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
621:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
623:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/
624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
626:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the highest APBx dividers in order to ensure that we do not go through
627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */
628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
629:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
632:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
634:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
636:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
640:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
641:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
642:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/
643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
647:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE is selected as System Clock Source */
648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
649:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE ready flag */
651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
652:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
654:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
656:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL is selected as System Clock Source */
657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
658:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
660:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the PLL ready flag */
661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
662:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
664:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
666:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI is selected as System Clock Source */
667:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
669:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI ready flag */
ARM GAS /tmp/ccP22z8b.s page 31
670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
671:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
673:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
675:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
677:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
678:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
680:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
684:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
687:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
690:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */
691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (FLatency < __HAL_FLASH_GET_LATENCY())
692:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
695:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
697:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_FLASH_GET_LATENCY() != FLatency)
699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
701:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
702:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
703:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
704:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/
705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
706:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
709:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
710:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
711:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/
712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
713:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
716:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
717:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
718:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_C
720:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
721:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings */
722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_InitTick(uwTickPrio);
723:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK;
725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
726:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/ccP22z8b.s page 32
727:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
728:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @}
729:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
730:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
731:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
732:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC clocks control functions
733:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
734:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
735:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
736:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Peripheral Control functions #####
737:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
738:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
739:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks
740:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequencies.
741:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
742:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
743:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
744:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
745:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
746:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
747:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9).
748:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note PA8/PC9 should be configured in alternate function mode.
749:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source.
750:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values:
751:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
752:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9).
753:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output.
754:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values:
755:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
756:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
757:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
758:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
759:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
760:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for a
761:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for
762:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
763:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
764:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCOx prescaler.
765:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values:
766:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_1: no division applied to MCOx clock
767:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
768:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
769:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
770:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
771:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have
772:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5).
773:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
774:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
775:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
776:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
926 .loc 1 776 1 is_stmt 1 view -0
927 .cfi_startproc
928 @ args = 0, pretend = 0, frame = 32
929 @ frame_needed = 0, uses_anonymous_args = 0
930 .loc 1 776 1 is_stmt 0 view .LVU294
931 0000 70B5 push {r4, r5, r6, lr}
932 .LCFI6:
ARM GAS /tmp/ccP22z8b.s page 33
933 .cfi_def_cfa_offset 16
934 .cfi_offset 4, -16
935 .cfi_offset 5, -12
936 .cfi_offset 6, -8
937 .cfi_offset 14, -4
938 0002 88B0 sub sp, sp, #32
939 .LCFI7:
940 .cfi_def_cfa_offset 48
941 0004 0C46 mov r4, r1
942 0006 1546 mov r5, r2
777:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct;
943 .loc 1 777 3 is_stmt 1 view .LVU295
778:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
779:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx));
944 .loc 1 779 3 view .LVU296
780:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv));
945 .loc 1 780 3 view .LVU297
781:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC_MCO1 */
782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_MCOx == RCC_MCO1)
946 .loc 1 782 3 view .LVU298
947 .loc 1 782 6 is_stmt 0 view .LVU299
948 0008 00BB cbnz r0, .L98
783:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
784:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
949 .loc 1 784 5 is_stmt 1 view .LVU300
785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
786:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO1 Clock Enable */
787:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO1_CLK_ENABLE();
950 .loc 1 787 5 view .LVU301
951 .LBB5:
952 .loc 1 787 5 view .LVU302
953 000a 0023 movs r3, #0
954 000c 0193 str r3, [sp, #4]
955 .loc 1 787 5 view .LVU303
956 000e 204E ldr r6, .L101
957 0010 326B ldr r2, [r6, #48]
958 .LVL65:
959 .loc 1 787 5 is_stmt 0 view .LVU304
960 0012 42F00102 orr r2, r2, #1
961 0016 3263 str r2, [r6, #48]
962 .loc 1 787 5 is_stmt 1 view .LVU305
963 0018 326B ldr r2, [r6, #48]
964 001a 02F00102 and r2, r2, #1
965 001e 0192 str r2, [sp, #4]
966 .loc 1 787 5 view .LVU306
967 0020 019A ldr r2, [sp, #4]
968 .LBE5:
969 .loc 1 787 5 view .LVU307
788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */
790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO1_PIN;
970 .loc 1 790 5 view .LVU308
971 .loc 1 790 25 is_stmt 0 view .LVU309
972 0022 4FF48072 mov r2, #256
973 0026 0392 str r2, [sp, #12]
791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
974 .loc 1 791 5 is_stmt 1 view .LVU310
ARM GAS /tmp/ccP22z8b.s page 34
975 .loc 1 791 26 is_stmt 0 view .LVU311
976 0028 0222 movs r2, #2
977 002a 0492 str r2, [sp, #16]
792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
978 .loc 1 792 5 is_stmt 1 view .LVU312
979 .loc 1 792 27 is_stmt 0 view .LVU313
980 002c 0322 movs r2, #3
981 002e 0692 str r2, [sp, #24]
793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
982 .loc 1 793 5 is_stmt 1 view .LVU314
983 .loc 1 793 26 is_stmt 0 view .LVU315
984 0030 0593 str r3, [sp, #20]
794:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
985 .loc 1 794 5 is_stmt 1 view .LVU316
986 .loc 1 794 31 is_stmt 0 view .LVU317
987 0032 0793 str r3, [sp, #28]
795:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
988 .loc 1 795 5 is_stmt 1 view .LVU318
989 0034 03A9 add r1, sp, #12
990 .LVL66:
991 .loc 1 795 5 is_stmt 0 view .LVU319
992 0036 1748 ldr r0, .L101+4
993 .LVL67:
994 .loc 1 795 5 view .LVU320
995 0038 FFF7FEFF bl HAL_GPIO_Init
996 .LVL68:
796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
797:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
798:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv));
997 .loc 1 798 5 is_stmt 1 view .LVU321
998 003c B368 ldr r3, [r6, #8]
999 003e 23F0EC63 bic r3, r3, #123731968
1000 0042 2543 orrs r5, r5, r4
1001 .LVL69:
1002 .loc 1 798 5 is_stmt 0 view .LVU322
1003 0044 1D43 orrs r5, r5, r3
1004 0046 B560 str r5, [r6, #8]
1005 .LVL70:
1006 .L97:
799:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
800:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO1 enable feature is available only on STM32F410xx devices */
801:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO1EN)
802:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO1_ENABLE();
803:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO1EN */
804:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
805:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2)
806:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
807:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
809:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
810:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO2 Clock Enable */
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO2_CLK_ENABLE();
812:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
813:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO2 pin in alternate function mode */
814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO2_PIN;
815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
ARM GAS /tmp/ccP22z8b.s page 35
817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
820:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
821:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */
822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U)))
823:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
824:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */
825:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2EN)
826:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO2_ENABLE();
827:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2EN */
828:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
829:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2 */
830:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1007 .loc 1 830 1 view .LVU323
1008 0048 08B0 add sp, sp, #32
1009 .LCFI8:
1010 .cfi_remember_state
1011 .cfi_def_cfa_offset 16
1012 @ sp needed
1013 004a 70BD pop {r4, r5, r6, pc}
1014 .LVL71:
1015 .L98:
1016 .LCFI9:
1017 .cfi_restore_state
808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1018 .loc 1 808 5 is_stmt 1 view .LVU324
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1019 .loc 1 811 5 view .LVU325
1020 .LBB6:
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1021 .loc 1 811 5 view .LVU326
1022 004c 0023 movs r3, #0
1023 004e 0293 str r3, [sp, #8]
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1024 .loc 1 811 5 view .LVU327
1025 0050 0F4E ldr r6, .L101
1026 0052 326B ldr r2, [r6, #48]
1027 .LVL72:
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1028 .loc 1 811 5 is_stmt 0 view .LVU328
1029 0054 42F00402 orr r2, r2, #4
1030 0058 3263 str r2, [r6, #48]
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1031 .loc 1 811 5 is_stmt 1 view .LVU329
1032 005a 326B ldr r2, [r6, #48]
1033 005c 02F00402 and r2, r2, #4
1034 0060 0292 str r2, [sp, #8]
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1035 .loc 1 811 5 view .LVU330
1036 0062 029A ldr r2, [sp, #8]
1037 .LBE6:
811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1038 .loc 1 811 5 view .LVU331
814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1039 .loc 1 814 5 view .LVU332
814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
ARM GAS /tmp/ccP22z8b.s page 36
1040 .loc 1 814 25 is_stmt 0 view .LVU333
1041 0064 4FF40072 mov r2, #512
1042 0068 0392 str r2, [sp, #12]
815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
1043 .loc 1 815 5 is_stmt 1 view .LVU334
815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
1044 .loc 1 815 26 is_stmt 0 view .LVU335
1045 006a 0222 movs r2, #2
1046 006c 0492 str r2, [sp, #16]
816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1047 .loc 1 816 5 is_stmt 1 view .LVU336
816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1048 .loc 1 816 27 is_stmt 0 view .LVU337
1049 006e 0322 movs r2, #3
1050 0070 0692 str r2, [sp, #24]
817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
1051 .loc 1 817 5 is_stmt 1 view .LVU338
817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
1052 .loc 1 817 26 is_stmt 0 view .LVU339
1053 0072 0593 str r3, [sp, #20]
818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
1054 .loc 1 818 5 is_stmt 1 view .LVU340
818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
1055 .loc 1 818 31 is_stmt 0 view .LVU341
1056 0074 0793 str r3, [sp, #28]
819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1057 .loc 1 819 5 is_stmt 1 view .LVU342
1058 0076 03A9 add r1, sp, #12
1059 .LVL73:
819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1060 .loc 1 819 5 is_stmt 0 view .LVU343
1061 0078 0748 ldr r0, .L101+8
1062 .LVL74:
819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1063 .loc 1 819 5 view .LVU344
1064 007a FFF7FEFF bl HAL_GPIO_Init
1065 .LVL75:
822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1066 .loc 1 822 5 is_stmt 1 view .LVU345
1067 007e B368 ldr r3, [r6, #8]
1068 0080 23F07843 bic r3, r3, #-134217728
1069 0084 44EAC504 orr r4, r4, r5, lsl #3
1070 .LVL76:
822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1071 .loc 1 822 5 is_stmt 0 view .LVU346
1072 0088 1C43 orrs r4, r4, r3
1073 008a B460 str r4, [r6, #8]
1074 .loc 1 830 1 view .LVU347
1075 008c DCE7 b .L97
1076 .L102:
1077 008e 00BF .align 2
1078 .L101:
1079 0090 00380240 .word 1073887232
1080 0094 00000240 .word 1073872896
1081 0098 00080240 .word 1073874944
1082 .cfi_endproc
1083 .LFE242:
ARM GAS /tmp/ccP22z8b.s page 37
1085 .section .text.HAL_RCC_EnableCSS,"ax",%progbits
1086 .align 1
1087 .global HAL_RCC_EnableCSS
1088 .syntax unified
1089 .thumb
1090 .thumb_func
1092 HAL_RCC_EnableCSS:
1093 .LFB243:
831:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
832:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
833:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Enables the Clock Security System.
834:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator
835:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the
836:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI),
837:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to
838:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
839:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
840:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
841:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
842:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1094 .loc 1 842 1 is_stmt 1 view -0
1095 .cfi_startproc
1096 @ args = 0, pretend = 0, frame = 0
1097 @ frame_needed = 0, uses_anonymous_args = 0
1098 @ link register save eliminated.
843:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
1099 .loc 1 843 3 view .LVU349
1100 .loc 1 843 38 is_stmt 0 view .LVU350
1101 0000 014B ldr r3, .L104
1102 0002 0122 movs r2, #1
1103 0004 DA64 str r2, [r3, #76]
844:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1104 .loc 1 844 1 view .LVU351
1105 0006 7047 bx lr
1106 .L105:
1107 .align 2
1108 .L104:
1109 0008 00004742 .word 1111949312
1110 .cfi_endproc
1111 .LFE243:
1113 .section .text.HAL_RCC_DisableCSS,"ax",%progbits
1114 .align 1
1115 .global HAL_RCC_DisableCSS
1116 .syntax unified
1117 .thumb
1118 .thumb_func
1120 HAL_RCC_DisableCSS:
1121 .LFB244:
845:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
846:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
847:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Disables the Clock Security System.
848:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
849:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
850:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void)
851:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1122 .loc 1 851 1 is_stmt 1 view -0
1123 .cfi_startproc
ARM GAS /tmp/ccP22z8b.s page 38
1124 @ args = 0, pretend = 0, frame = 0
1125 @ frame_needed = 0, uses_anonymous_args = 0
1126 @ link register save eliminated.
852:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
1127 .loc 1 852 3 view .LVU353
1128 .loc 1 852 38 is_stmt 0 view .LVU354
1129 0000 014B ldr r3, .L107
1130 0002 0022 movs r2, #0
1131 0004 DA64 str r2, [r3, #76]
853:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1132 .loc 1 853 1 view .LVU355
1133 0006 7047 bx lr
1134 .L108:
1135 .align 2
1136 .L107:
1137 0008 00004742 .word 1111949312
1138 .cfi_endproc
1139 .LFE244:
1141 .global __aeabi_uldivmod
1142 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits
1143 .align 1
1144 .weak HAL_RCC_GetSysClockFreq
1145 .syntax unified
1146 .thumb
1147 .thumb_func
1149 HAL_RCC_GetSysClockFreq:
1150 .LFB245:
854:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
855:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
856:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency
857:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
858:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real
859:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined
860:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * constant and the selected clock source:
861:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
862:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
863:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
864:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors.
865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
866:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 16 MHz) but the real value may vary depending on the variations
867:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * in voltage and temperature.
868:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
869:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 25 MHz), user has to ensure that HSE_VALUE is same as the real
870:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may
871:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * have wrong result.
872:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
873:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional
874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * value for HSE crystal.
875:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
876:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function can be used by the user application to compute the
877:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * baudrate for the communication peripherals or configure other parameters.
878:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
879:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the
880:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre
881:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
882:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
883:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval SYSCLK frequency
ARM GAS /tmp/ccP22z8b.s page 39
884:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
885:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak uint32_t HAL_RCC_GetSysClockFreq(void)
886:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1151 .loc 1 886 1 is_stmt 1 view -0
1152 .cfi_startproc
1153 @ args = 0, pretend = 0, frame = 0
1154 @ frame_needed = 0, uses_anonymous_args = 0
1155 0000 08B5 push {r3, lr}
1156 .LCFI10:
1157 .cfi_def_cfa_offset 8
1158 .cfi_offset 3, -8
1159 .cfi_offset 14, -4
887:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllm = 0U;
1160 .loc 1 887 3 view .LVU357
1161 .LVL77:
888:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllvco = 0U;
1162 .loc 1 888 3 view .LVU358
889:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllp = 0U;
1163 .loc 1 889 3 view .LVU359
890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t sysclockfreq = 0U;
1164 .loc 1 890 3 view .LVU360
891:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
892:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/
893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** switch (RCC->CFGR & RCC_CFGR_SWS)
1165 .loc 1 893 3 view .LVU361
1166 .loc 1 893 14 is_stmt 0 view .LVU362
1167 0002 334B ldr r3, .L116
1168 0004 9B68 ldr r3, [r3, #8]
1169 .loc 1 893 21 view .LVU363
1170 0006 03F00C03 and r3, r3, #12
1171 .loc 1 893 3 view .LVU364
1172 000a 042B cmp r3, #4
1173 000c 5BD0 beq .L113
1174 000e 082B cmp r3, #8
1175 0010 5BD1 bne .L114
894:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
895:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
896:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
897:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE;
898:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
899:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
900:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
901:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSE_VALUE;
903:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
904:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
905:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
906:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
907:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
908:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SYSCLK = PLL_VCO / PLLP */
909:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
1176 .loc 1 909 7 is_stmt 1 view .LVU365
1177 .loc 1 909 17 is_stmt 0 view .LVU366
1178 0012 2F4B ldr r3, .L116
1179 0014 5A68 ldr r2, [r3, #4]
1180 .loc 1 909 12 view .LVU367
1181 0016 02F03F02 and r2, r2, #63
ARM GAS /tmp/ccP22z8b.s page 40
1182 .LVL78:
910:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
1183 .loc 1 910 7 is_stmt 1 view .LVU368
1184 .loc 1 910 11 is_stmt 0 view .LVU369
1185 001a 5B68 ldr r3, [r3, #4]
1186 .loc 1 910 10 view .LVU370
1187 001c 13F4800F tst r3, #4194304
1188 0020 2CD0 beq .L111
911:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
912:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE used as PLL clock source */
913:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN)
1189 .loc 1 913 9 is_stmt 1 view .LVU371
1190 .loc 1 913 70 is_stmt 0 view .LVU372
1191 0022 2B4B ldr r3, .L116
1192 0024 5868 ldr r0, [r3, #4]
1193 .loc 1 913 55 view .LVU373
1194 0026 C0F38810 ubfx r0, r0, #6, #9
1195 .loc 1 913 52 view .LVU374
1196 002a 4FEA401C lsl ip, r0, #5
1197 002e BCEB000C subs ip, ip, r0
1198 0032 6EEB0E0E sbc lr, lr, lr
1199 0036 4FEA8E13 lsl r3, lr, #6
1200 003a 43EA9C63 orr r3, r3, ip, lsr #26
1201 003e 4FEA8C11 lsl r1, ip, #6
1202 0042 B1EB0C01 subs r1, r1, ip
1203 0046 63EB0E03 sbc r3, r3, lr
1204 004a DB00 lsls r3, r3, #3
1205 004c 43EA5173 orr r3, r3, r1, lsr #29
1206 0050 C900 lsls r1, r1, #3
1207 0052 11EB000C adds ip, r1, r0
1208 0056 43F10003 adc r3, r3, #0
1209 005a 5902 lsls r1, r3, #9
1210 .loc 1 913 128 view .LVU375
1211 005c 0023 movs r3, #0
1212 005e 4FEA4C20 lsl r0, ip, #9
1213 0062 41EADC51 orr r1, r1, ip, lsr #23
1214 0066 FFF7FEFF bl __aeabi_uldivmod
1215 .LVL79:
1216 .L112:
914:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
915:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
916:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
917:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI used as PLL clock source */
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN)
919:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
920:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U);
1217 .loc 1 920 7 is_stmt 1 view .LVU376
1218 .loc 1 920 21 is_stmt 0 view .LVU377
1219 006a 194B ldr r3, .L116
1220 006c 5B68 ldr r3, [r3, #4]
1221 .loc 1 920 51 view .LVU378
1222 006e C3F30143 ubfx r3, r3, #16, #2
1223 .loc 1 920 76 view .LVU379
1224 0072 0133 adds r3, r3, #1
1225 .loc 1 920 12 view .LVU380
1226 0074 5B00 lsls r3, r3, #1
1227 .LVL80:
ARM GAS /tmp/ccP22z8b.s page 41
921:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
922:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = pllvco / pllp;
1228 .loc 1 922 7 is_stmt 1 view .LVU381
1229 .loc 1 922 20 is_stmt 0 view .LVU382
1230 0076 B0FBF3F0 udiv r0, r0, r3
1231 .LVL81:
923:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
1232 .loc 1 923 7 is_stmt 1 view .LVU383
1233 .L109:
924:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
925:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** default:
926:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
927:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE;
928:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
929:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
930:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return sysclockfreq;
932:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1234 .loc 1 932 1 is_stmt 0 view .LVU384
1235 007a 08BD pop {r3, pc}
1236 .LVL82:
1237 .L111:
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1238 .loc 1 918 9 is_stmt 1 view .LVU385
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1239 .loc 1 918 70 is_stmt 0 view .LVU386
1240 007c 144B ldr r3, .L116
1241 007e 5868 ldr r0, [r3, #4]
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1242 .loc 1 918 55 view .LVU387
1243 0080 C0F38810 ubfx r0, r0, #6, #9
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1244 .loc 1 918 52 view .LVU388
1245 0084 4FEA401C lsl ip, r0, #5
1246 0088 BCEB000C subs ip, ip, r0
1247 008c 6EEB0E0E sbc lr, lr, lr
1248 0090 4FEA8E13 lsl r3, lr, #6
1249 0094 43EA9C63 orr r3, r3, ip, lsr #26
1250 0098 4FEA8C11 lsl r1, ip, #6
1251 009c B1EB0C01 subs r1, r1, ip
1252 00a0 63EB0E03 sbc r3, r3, lr
1253 00a4 DB00 lsls r3, r3, #3
1254 00a6 43EA5173 orr r3, r3, r1, lsr #29
1255 00aa C900 lsls r1, r1, #3
1256 00ac 11EB000C adds ip, r1, r0
1257 00b0 43F10003 adc r3, r3, #0
1258 00b4 9902 lsls r1, r3, #10
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1259 .loc 1 918 128 view .LVU389
1260 00b6 0023 movs r3, #0
1261 00b8 4FEA8C20 lsl r0, ip, #10
1262 00bc 41EA9C51 orr r1, r1, ip, lsr #22
1263 00c0 FFF7FEFF bl __aeabi_uldivmod
1264 .LVL83:
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1265 .loc 1 918 128 view .LVU390
1266 00c4 D1E7 b .L112
ARM GAS /tmp/ccP22z8b.s page 42
1267 .LVL84:
1268 .L113:
902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
1269 .loc 1 902 20 view .LVU391
1270 00c6 0348 ldr r0, .L116+4
1271 00c8 D7E7 b .L109
1272 .L114:
893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1273 .loc 1 893 3 view .LVU392
1274 00ca 0348 ldr r0, .L116+8
1275 .LVL85:
931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1276 .loc 1 931 3 is_stmt 1 view .LVU393
931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1277 .loc 1 931 10 is_stmt 0 view .LVU394
1278 00cc D5E7 b .L109
1279 .L117:
1280 00ce 00BF .align 2
1281 .L116:
1282 00d0 00380240 .word 1073887232
1283 00d4 00127A00 .word 8000000
1284 00d8 0024F400 .word 16000000
1285 .cfi_endproc
1286 .LFE245:
1288 .section .text.HAL_RCC_ClockConfig,"ax",%progbits
1289 .align 1
1290 .global HAL_RCC_ClockConfig
1291 .syntax unified
1292 .thumb
1293 .thumb_func
1295 HAL_RCC_ClockConfig:
1296 .LVL86:
1297 .LFB241:
592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
1298 .loc 1 592 1 is_stmt 1 view -0
1299 .cfi_startproc
1300 @ args = 0, pretend = 0, frame = 0
1301 @ frame_needed = 0, uses_anonymous_args = 0
593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1302 .loc 1 593 3 view .LVU396
596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1303 .loc 1 596 3 view .LVU397
596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1304 .loc 1 596 6 is_stmt 0 view .LVU398
1305 0000 0028 cmp r0, #0
1306 0002 00F09B80 beq .L133
592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
1307 .loc 1 592 1 view .LVU399
1308 0006 70B5 push {r4, r5, r6, lr}
1309 .LCFI11:
1310 .cfi_def_cfa_offset 16
1311 .cfi_offset 4, -16
1312 .cfi_offset 5, -12
1313 .cfi_offset 6, -8
1314 .cfi_offset 14, -4
1315 0008 0D46 mov r5, r1
1316 000a 0446 mov r4, r0
ARM GAS /tmp/ccP22z8b.s page 43
602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
1317 .loc 1 602 3 is_stmt 1 view .LVU400
603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1318 .loc 1 603 3 view .LVU401
610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1319 .loc 1 610 3 view .LVU402
610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1320 .loc 1 610 18 is_stmt 0 view .LVU403
1321 000c 4F4B ldr r3, .L146
1322 000e 1B68 ldr r3, [r3]
1323 0010 03F00F03 and r3, r3, #15
610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1324 .loc 1 610 6 view .LVU404
1325 0014 8B42 cmp r3, r1
1326 0016 08D2 bcs .L120
613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1327 .loc 1 613 5 is_stmt 1 view .LVU405
1328 0018 CBB2 uxtb r3, r1
1329 001a 4C4A ldr r2, .L146
1330 001c 1370 strb r3, [r2]
617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1331 .loc 1 617 5 view .LVU406
617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1332 .loc 1 617 9 is_stmt 0 view .LVU407
1333 001e 1368 ldr r3, [r2]
1334 0020 03F00F03 and r3, r3, #15
617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1335 .loc 1 617 8 view .LVU408
1336 0024 8B42 cmp r3, r1
1337 0026 40F08B80 bne .L134
1338 .L120:
624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1339 .loc 1 624 3 is_stmt 1 view .LVU409
624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1340 .loc 1 624 26 is_stmt 0 view .LVU410
1341 002a 2368 ldr r3, [r4]
624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1342 .loc 1 624 6 view .LVU411
1343 002c 13F0020F tst r3, #2
1344 0030 17D0 beq .L121
628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1345 .loc 1 628 5 is_stmt 1 view .LVU412
628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1346 .loc 1 628 8 is_stmt 0 view .LVU413
1347 0032 13F0040F tst r3, #4
1348 0036 04D0 beq .L122
630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1349 .loc 1 630 7 is_stmt 1 view .LVU414
1350 0038 454A ldr r2, .L146+4
1351 003a 9368 ldr r3, [r2, #8]
1352 003c 43F4E053 orr r3, r3, #7168
1353 0040 9360 str r3, [r2, #8]
1354 .L122:
633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1355 .loc 1 633 5 view .LVU415
633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1356 .loc 1 633 28 is_stmt 0 view .LVU416
ARM GAS /tmp/ccP22z8b.s page 44
1357 0042 2368 ldr r3, [r4]
633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1358 .loc 1 633 8 view .LVU417
1359 0044 13F0080F tst r3, #8
1360 0048 04D0 beq .L123
635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1361 .loc 1 635 7 is_stmt 1 view .LVU418
1362 004a 414A ldr r2, .L146+4
1363 004c 9368 ldr r3, [r2, #8]
1364 004e 43F46043 orr r3, r3, #57344
1365 0052 9360 str r3, [r2, #8]
1366 .L123:
638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
1367 .loc 1 638 5 view .LVU419
639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1368 .loc 1 639 5 view .LVU420
1369 0054 3E4A ldr r2, .L146+4
1370 0056 9368 ldr r3, [r2, #8]
1371 0058 23F0F003 bic r3, r3, #240
1372 005c A168 ldr r1, [r4, #8]
1373 .LVL87:
639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1374 .loc 1 639 5 is_stmt 0 view .LVU421
1375 005e 0B43 orrs r3, r3, r1
1376 0060 9360 str r3, [r2, #8]
1377 .L121:
643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1378 .loc 1 643 3 is_stmt 1 view .LVU422
643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1379 .loc 1 643 26 is_stmt 0 view .LVU423
1380 0062 2368 ldr r3, [r4]
643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1381 .loc 1 643 6 view .LVU424
1382 0064 13F0010F tst r3, #1
1383 0068 32D0 beq .L124
645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1384 .loc 1 645 5 is_stmt 1 view .LVU425
648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1385 .loc 1 648 5 view .LVU426
648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1386 .loc 1 648 26 is_stmt 0 view .LVU427
1387 006a 6368 ldr r3, [r4, #4]
648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1388 .loc 1 648 8 view .LVU428
1389 006c 012B cmp r3, #1
1390 006e 21D0 beq .L144
657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
1391 .loc 1 657 10 is_stmt 1 view .LVU429
657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
1392 .loc 1 657 77 is_stmt 0 view .LVU430
1393 0070 9A1E subs r2, r3, #2
657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
1394 .loc 1 657 13 view .LVU431
1395 0072 012A cmp r2, #1
1396 0074 25D9 bls .L145
670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1397 .loc 1 670 7 is_stmt 1 view .LVU432
ARM GAS /tmp/ccP22z8b.s page 45
670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1398 .loc 1 670 11 is_stmt 0 view .LVU433
1399 0076 364A ldr r2, .L146+4
1400 0078 1268 ldr r2, [r2]
670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1401 .loc 1 670 10 view .LVU434
1402 007a 12F0020F tst r2, #2
1403 007e 61D0 beq .L137
1404 .L126:
676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1405 .loc 1 676 5 is_stmt 1 view .LVU435
1406 0080 3349 ldr r1, .L146+4
1407 0082 8A68 ldr r2, [r1, #8]
1408 0084 22F00302 bic r2, r2, #3
1409 0088 1343 orrs r3, r3, r2
1410 008a 8B60 str r3, [r1, #8]
679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1411 .loc 1 679 5 view .LVU436
679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1412 .loc 1 679 17 is_stmt 0 view .LVU437
1413 008c FFF7FEFF bl HAL_GetTick
1414 .LVL88:
679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1415 .loc 1 679 17 view .LVU438
1416 0090 0646 mov r6, r0
1417 .LVL89:
681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1418 .loc 1 681 5 is_stmt 1 view .LVU439
1419 .L128:
681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1420 .loc 1 681 42 view .LVU440
681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1421 .loc 1 681 12 is_stmt 0 view .LVU441
1422 0092 2F4B ldr r3, .L146+4
1423 0094 9B68 ldr r3, [r3, #8]
1424 0096 03F00C03 and r3, r3, #12
681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1425 .loc 1 681 63 view .LVU442
1426 009a 6268 ldr r2, [r4, #4]
681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1427 .loc 1 681 42 view .LVU443
1428 009c B3EB820F cmp r3, r2, lsl #2
1429 00a0 16D0 beq .L124
683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1430 .loc 1 683 7 is_stmt 1 view .LVU444
683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1431 .loc 1 683 12 is_stmt 0 view .LVU445
1432 00a2 FFF7FEFF bl HAL_GetTick
1433 .LVL90:
683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1434 .loc 1 683 26 discriminator 1 view .LVU446
1435 00a6 801B subs r0, r0, r6
683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1436 .loc 1 683 10 discriminator 1 view .LVU447
1437 00a8 41F28833 movw r3, #5000
1438 00ac 9842 cmp r0, r3
1439 00ae F0D9 bls .L128
ARM GAS /tmp/ccP22z8b.s page 46
685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1440 .loc 1 685 16 view .LVU448
1441 00b0 0320 movs r0, #3
1442 00b2 42E0 b .L119
1443 .LVL91:
1444 .L144:
651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1445 .loc 1 651 7 is_stmt 1 view .LVU449
651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1446 .loc 1 651 11 is_stmt 0 view .LVU450
1447 00b4 264A ldr r2, .L146+4
1448 00b6 1268 ldr r2, [r2]
651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1449 .loc 1 651 10 view .LVU451
1450 00b8 12F4003F tst r2, #131072
1451 00bc E0D1 bne .L126
653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1452 .loc 1 653 16 view .LVU452
1453 00be 0120 movs r0, #1
1454 .LVL92:
653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1455 .loc 1 653 16 view .LVU453
1456 00c0 3BE0 b .L119
1457 .LVL93:
1458 .L145:
661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1459 .loc 1 661 7 is_stmt 1 view .LVU454
661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1460 .loc 1 661 11 is_stmt 0 view .LVU455
1461 00c2 234A ldr r2, .L146+4
1462 00c4 1268 ldr r2, [r2]
661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1463 .loc 1 661 10 view .LVU456
1464 00c6 12F0007F tst r2, #33554432
1465 00ca D9D1 bne .L126
663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1466 .loc 1 663 16 view .LVU457
1467 00cc 0120 movs r0, #1
1468 .LVL94:
663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1469 .loc 1 663 16 view .LVU458
1470 00ce 34E0 b .L119
1471 .L124:
691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1472 .loc 1 691 3 is_stmt 1 view .LVU459
691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1473 .loc 1 691 18 is_stmt 0 view .LVU460
1474 00d0 1E4B ldr r3, .L146
1475 00d2 1B68 ldr r3, [r3]
1476 00d4 03F00F03 and r3, r3, #15
691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1477 .loc 1 691 6 view .LVU461
1478 00d8 AB42 cmp r3, r5
1479 00da 07D9 bls .L130
694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1480 .loc 1 694 5 is_stmt 1 view .LVU462
1481 00dc EAB2 uxtb r2, r5
ARM GAS /tmp/ccP22z8b.s page 47
1482 00de 1B4B ldr r3, .L146
1483 00e0 1A70 strb r2, [r3]
698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1484 .loc 1 698 5 view .LVU463
698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1485 .loc 1 698 9 is_stmt 0 view .LVU464
1486 00e2 1B68 ldr r3, [r3]
1487 00e4 03F00F03 and r3, r3, #15
698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1488 .loc 1 698 8 view .LVU465
1489 00e8 AB42 cmp r3, r5
1490 00ea 2DD1 bne .L139
1491 .L130:
705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1492 .loc 1 705 3 is_stmt 1 view .LVU466
705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1493 .loc 1 705 26 is_stmt 0 view .LVU467
1494 00ec 2368 ldr r3, [r4]
705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1495 .loc 1 705 6 view .LVU468
1496 00ee 13F0040F tst r3, #4
1497 00f2 06D0 beq .L131
707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
1498 .loc 1 707 5 is_stmt 1 view .LVU469
708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1499 .loc 1 708 5 view .LVU470
1500 00f4 164A ldr r2, .L146+4
1501 00f6 9368 ldr r3, [r2, #8]
1502 00f8 23F4E053 bic r3, r3, #7168
1503 00fc E168 ldr r1, [r4, #12]
1504 00fe 0B43 orrs r3, r3, r1
1505 0100 9360 str r3, [r2, #8]
1506 .L131:
712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1507 .loc 1 712 3 view .LVU471
712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1508 .loc 1 712 26 is_stmt 0 view .LVU472
1509 0102 2368 ldr r3, [r4]
712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1510 .loc 1 712 6 view .LVU473
1511 0104 13F0080F tst r3, #8
1512 0108 07D0 beq .L132
714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
1513 .loc 1 714 5 is_stmt 1 view .LVU474
715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1514 .loc 1 715 5 view .LVU475
1515 010a 114A ldr r2, .L146+4
1516 010c 9368 ldr r3, [r2, #8]
1517 010e 23F46043 bic r3, r3, #57344
1518 0112 2169 ldr r1, [r4, #16]
1519 0114 43EAC103 orr r3, r3, r1, lsl #3
1520 0118 9360 str r3, [r2, #8]
1521 .L132:
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1522 .loc 1 719 3 view .LVU476
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1523 .loc 1 719 21 is_stmt 0 view .LVU477
ARM GAS /tmp/ccP22z8b.s page 48
1524 011a FFF7FEFF bl HAL_RCC_GetSysClockFreq
1525 .LVL95:
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1526 .loc 1 719 68 discriminator 1 view .LVU478
1527 011e 0C4B ldr r3, .L146+4
1528 0120 9B68 ldr r3, [r3, #8]
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1529 .loc 1 719 92 discriminator 1 view .LVU479
1530 0122 C3F30313 ubfx r3, r3, #4, #4
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1531 .loc 1 719 63 discriminator 1 view .LVU480
1532 0126 0B4A ldr r2, .L146+8
1533 0128 D35C ldrb r3, [r2, r3] @ zero_extendqisi2
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1534 .loc 1 719 47 discriminator 1 view .LVU481
1535 012a D840 lsrs r0, r0, r3
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1536 .loc 1 719 19 discriminator 1 view .LVU482
1537 012c 0A4B ldr r3, .L146+12
1538 012e 1860 str r0, [r3]
722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1539 .loc 1 722 3 is_stmt 1 view .LVU483
1540 0130 0A4B ldr r3, .L146+16
1541 0132 1868 ldr r0, [r3]
1542 0134 FFF7FEFF bl HAL_InitTick
1543 .LVL96:
724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1544 .loc 1 724 3 view .LVU484
724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1545 .loc 1 724 10 is_stmt 0 view .LVU485
1546 0138 0020 movs r0, #0
1547 .L119:
725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1548 .loc 1 725 1 view .LVU486
1549 013a 70BD pop {r4, r5, r6, pc}
1550 .LVL97:
1551 .L133:
1552 .LCFI12:
1553 .cfi_def_cfa_offset 0
1554 .cfi_restore 4
1555 .cfi_restore 5
1556 .cfi_restore 6
1557 .cfi_restore 14
598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1558 .loc 1 598 12 view .LVU487
1559 013c 0120 movs r0, #1
1560 .LVL98:
725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1561 .loc 1 725 1 view .LVU488
1562 013e 7047 bx lr
1563 .LVL99:
1564 .L134:
1565 .LCFI13:
1566 .cfi_def_cfa_offset 16
1567 .cfi_offset 4, -16
1568 .cfi_offset 5, -12
1569 .cfi_offset 6, -8
ARM GAS /tmp/ccP22z8b.s page 49
1570 .cfi_offset 14, -4
619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1571 .loc 1 619 14 view .LVU489
1572 0140 0120 movs r0, #1
1573 .LVL100:
619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1574 .loc 1 619 14 view .LVU490
1575 0142 FAE7 b .L119
1576 .LVL101:
1577 .L137:
672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1578 .loc 1 672 16 view .LVU491
1579 0144 0120 movs r0, #1
1580 .LVL102:
672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1581 .loc 1 672 16 view .LVU492
1582 0146 F8E7 b .L119
1583 .L139:
700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1584 .loc 1 700 14 view .LVU493
1585 0148 0120 movs r0, #1
1586 014a F6E7 b .L119
1587 .L147:
1588 .align 2
1589 .L146:
1590 014c 003C0240 .word 1073888256
1591 0150 00380240 .word 1073887232
1592 0154 00000000 .word AHBPrescTable
1593 0158 00000000 .word SystemCoreClock
1594 015c 00000000 .word uwTickPrio
1595 .cfi_endproc
1596 .LFE241:
1598 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits
1599 .align 1
1600 .global HAL_RCC_GetHCLKFreq
1601 .syntax unified
1602 .thumb
1603 .thumb_func
1605 HAL_RCC_GetHCLKFreq:
1606 .LFB246:
933:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
934:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
935:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the HCLK frequency
936:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the
937:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect
938:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
939:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
940:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated within this function
941:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HCLK frequency
942:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
943:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
944:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1607 .loc 1 944 1 is_stmt 1 view -0
1608 .cfi_startproc
1609 @ args = 0, pretend = 0, frame = 0
1610 @ frame_needed = 0, uses_anonymous_args = 0
1611 @ link register save eliminated.
ARM GAS /tmp/ccP22z8b.s page 50
945:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return SystemCoreClock;
1612 .loc 1 945 3 view .LVU495
946:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1613 .loc 1 946 1 is_stmt 0 view .LVU496
1614 0000 014B ldr r3, .L149
1615 0002 1868 ldr r0, [r3]
1616 0004 7047 bx lr
1617 .L150:
1618 0006 00BF .align 2
1619 .L149:
1620 0008 00000000 .word SystemCoreClock
1621 .cfi_endproc
1622 .LFE246:
1624 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
1625 .align 1
1626 .global HAL_RCC_GetPCLK1Freq
1627 .syntax unified
1628 .thumb
1629 .thumb_func
1631 HAL_RCC_GetPCLK1Freq:
1632 .LFB247:
947:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
948:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
949:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency
950:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the
951:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
952:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK1 frequency
953:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
954:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
955:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1633 .loc 1 955 1 is_stmt 1 view -0
1634 .cfi_startproc
1635 @ args = 0, pretend = 0, frame = 0
1636 @ frame_needed = 0, uses_anonymous_args = 0
1637 0000 08B5 push {r3, lr}
1638 .LCFI14:
1639 .cfi_def_cfa_offset 8
1640 .cfi_offset 3, -8
1641 .cfi_offset 14, -4
956:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
957:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos
1642 .loc 1 957 3 view .LVU498
1643 .loc 1 957 11 is_stmt 0 view .LVU499
1644 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq
1645 .LVL103:
1646 .loc 1 957 54 discriminator 1 view .LVU500
1647 0006 044B ldr r3, .L153
1648 0008 9B68 ldr r3, [r3, #8]
1649 .loc 1 957 79 discriminator 1 view .LVU501
1650 000a C3F38223 ubfx r3, r3, #10, #3
1651 .loc 1 957 49 discriminator 1 view .LVU502
1652 000e 034A ldr r2, .L153+4
1653 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2
958:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1654 .loc 1 958 1 view .LVU503
1655 0012 D840 lsrs r0, r0, r3
1656 0014 08BD pop {r3, pc}
ARM GAS /tmp/ccP22z8b.s page 51
1657 .L154:
1658 0016 00BF .align 2
1659 .L153:
1660 0018 00380240 .word 1073887232
1661 001c 00000000 .word APBPrescTable
1662 .cfi_endproc
1663 .LFE247:
1665 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits
1666 .align 1
1667 .global HAL_RCC_GetPCLK2Freq
1668 .syntax unified
1669 .thumb
1670 .thumb_func
1672 HAL_RCC_GetPCLK2Freq:
1673 .LFB248:
959:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
960:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency
962:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the
963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec
964:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK2 frequency
965:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
966:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void)
967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1674 .loc 1 967 1 is_stmt 1 view -0
1675 .cfi_startproc
1676 @ args = 0, pretend = 0, frame = 0
1677 @ frame_needed = 0, uses_anonymous_args = 0
1678 0000 08B5 push {r3, lr}
1679 .LCFI15:
1680 .cfi_def_cfa_offset 8
1681 .cfi_offset 3, -8
1682 .cfi_offset 14, -4
968:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
969:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos
1683 .loc 1 969 3 view .LVU505
1684 .loc 1 969 11 is_stmt 0 view .LVU506
1685 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq
1686 .LVL104:
1687 .loc 1 969 54 discriminator 1 view .LVU507
1688 0006 044B ldr r3, .L157
1689 0008 9B68 ldr r3, [r3, #8]
1690 .loc 1 969 79 discriminator 1 view .LVU508
1691 000a C3F34233 ubfx r3, r3, #13, #3
1692 .loc 1 969 49 discriminator 1 view .LVU509
1693 000e 034A ldr r2, .L157+4
1694 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2
970:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1695 .loc 1 970 1 view .LVU510
1696 0012 D840 lsrs r0, r0, r3
1697 0014 08BD pop {r3, pc}
1698 .L158:
1699 0016 00BF .align 2
1700 .L157:
1701 0018 00380240 .word 1073887232
1702 001c 00000000 .word APBPrescTable
1703 .cfi_endproc
ARM GAS /tmp/ccP22z8b.s page 52
1704 .LFE248:
1706 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits
1707 .align 1
1708 .weak HAL_RCC_GetOscConfig
1709 .syntax unified
1710 .thumb
1711 .thumb_func
1713 HAL_RCC_GetOscConfig:
1714 .LVL105:
1715 .LFB249:
971:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
972:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
973:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal
974:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers.
975:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
976:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured.
977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
978:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
979:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
980:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1716 .loc 1 980 1 is_stmt 1 view -0
1717 .cfi_startproc
1718 @ args = 0, pretend = 0, frame = 0
1719 @ frame_needed = 0, uses_anonymous_args = 0
1720 @ link register save eliminated.
981:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/
982:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLA
1721 .loc 1 982 3 view .LVU512
1722 .loc 1 982 37 is_stmt 0 view .LVU513
1723 0000 0F23 movs r3, #15
1724 0002 0360 str r3, [r0]
983:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
984:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/
985:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CR & RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
1725 .loc 1 985 3 is_stmt 1 view .LVU514
1726 .loc 1 985 11 is_stmt 0 view .LVU515
1727 0004 304B ldr r3, .L172
1728 0006 1B68 ldr r3, [r3]
1729 .loc 1 985 6 view .LVU516
1730 0008 13F4802F tst r3, #262144
1731 000c 3BD0 beq .L160
986:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
1732 .loc 1 987 5 is_stmt 1 view .LVU517
1733 .loc 1 987 33 is_stmt 0 view .LVU518
1734 000e 4FF4A023 mov r3, #327680
1735 0012 4360 str r3, [r0, #4]
1736 .L161:
988:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if ((RCC->CR & RCC_CR_HSEON) == RCC_CR_HSEON)
990:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON;
992:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
994:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
996:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/ccP22z8b.s page 53
997:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
998:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/
999:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CR & RCC_CR_HSION) == RCC_CR_HSION)
1737 .loc 1 999 3 is_stmt 1 view .LVU519
1738 .loc 1 999 11 is_stmt 0 view .LVU520
1739 0014 2C4B ldr r3, .L172
1740 0016 1B68 ldr r3, [r3]
1741 .loc 1 999 6 view .LVU521
1742 0018 13F0010F tst r3, #1
1743 001c 3FD0 beq .L163
1000:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1001:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON;
1744 .loc 1 1001 5 is_stmt 1 view .LVU522
1745 .loc 1 1001 33 is_stmt 0 view .LVU523
1746 001e 0123 movs r3, #1
1747 0020 C360 str r3, [r0, #12]
1748 .L164:
1002:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
1004:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
1006:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1007:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1008:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_
1749 .loc 1 1008 3 is_stmt 1 view .LVU524
1750 .loc 1 1008 59 is_stmt 0 view .LVU525
1751 0022 294A ldr r2, .L172
1752 0024 1368 ldr r3, [r2]
1753 .loc 1 1008 44 view .LVU526
1754 0026 C3F3C403 ubfx r3, r3, #3, #5
1755 .loc 1 1008 42 view .LVU527
1756 002a 0361 str r3, [r0, #16]
1009:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1010:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/
1011:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->BDCR & RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
1757 .loc 1 1011 3 is_stmt 1 view .LVU528
1758 .loc 1 1011 11 is_stmt 0 view .LVU529
1759 002c 136F ldr r3, [r2, #112]
1760 .loc 1 1011 6 view .LVU530
1761 002e 13F0040F tst r3, #4
1762 0032 37D0 beq .L165
1012:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
1763 .loc 1 1013 5 is_stmt 1 view .LVU531
1764 .loc 1 1013 33 is_stmt 0 view .LVU532
1765 0034 0523 movs r3, #5
1766 0036 8360 str r3, [r0, #8]
1767 .L166:
1014:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if ((RCC->BDCR & RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
1016:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON;
1018:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1019:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
1020:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
1022:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/ccP22z8b.s page 54
1023:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1024:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/
1025:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CSR & RCC_CSR_LSION) == RCC_CSR_LSION)
1768 .loc 1 1025 3 is_stmt 1 view .LVU533
1769 .loc 1 1025 11 is_stmt 0 view .LVU534
1770 0038 234B ldr r3, .L172
1771 003a 5B6F ldr r3, [r3, #116]
1772 .loc 1 1025 6 view .LVU535
1773 003c 13F0010F tst r3, #1
1774 0040 3BD0 beq .L168
1026:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1027:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON;
1775 .loc 1 1027 5 is_stmt 1 view .LVU536
1776 .loc 1 1027 33 is_stmt 0 view .LVU537
1777 0042 0123 movs r3, #1
1778 0044 4361 str r3, [r0, #20]
1779 .L169:
1028:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1029:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
1030:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
1032:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1033:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1034:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/
1035:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CR & RCC_CR_PLLON) == RCC_CR_PLLON)
1780 .loc 1 1035 3 is_stmt 1 view .LVU538
1781 .loc 1 1035 11 is_stmt 0 view .LVU539
1782 0046 204B ldr r3, .L172
1783 0048 1B68 ldr r3, [r3]
1784 .loc 1 1035 6 view .LVU540
1785 004a 13F0807F tst r3, #16777216
1786 004e 37D0 beq .L170
1036:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1037:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
1787 .loc 1 1037 5 is_stmt 1 view .LVU541
1788 .loc 1 1037 37 is_stmt 0 view .LVU542
1789 0050 0223 movs r3, #2
1790 0052 8361 str r3, [r0, #24]
1791 .L171:
1038:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1039:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
1040:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
1042:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1043:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
1792 .loc 1 1043 3 is_stmt 1 view .LVU543
1793 .loc 1 1043 52 is_stmt 0 view .LVU544
1794 0054 1C4A ldr r2, .L172
1795 0056 5368 ldr r3, [r2, #4]
1796 .loc 1 1043 38 view .LVU545
1797 0058 03F48003 and r3, r3, #4194304
1798 .loc 1 1043 36 view .LVU546
1799 005c C361 str r3, [r0, #28]
1044:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
1800 .loc 1 1044 3 is_stmt 1 view .LVU547
1801 .loc 1 1044 47 is_stmt 0 view .LVU548
1802 005e 5368 ldr r3, [r2, #4]
ARM GAS /tmp/ccP22z8b.s page 55
1803 .loc 1 1044 33 view .LVU549
1804 0060 03F03F03 and r3, r3, #63
1805 .loc 1 1044 31 view .LVU550
1806 0064 0362 str r3, [r0, #32]
1045:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Po
1807 .loc 1 1045 3 is_stmt 1 view .LVU551
1808 .loc 1 1045 48 is_stmt 0 view .LVU552
1809 0066 5368 ldr r3, [r2, #4]
1810 .loc 1 1045 33 view .LVU553
1811 0068 C3F38813 ubfx r3, r3, #6, #9
1812 .loc 1 1045 31 view .LVU554
1813 006c 4362 str r3, [r0, #36]
1046:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0
1814 .loc 1 1046 3 is_stmt 1 view .LVU555
1815 .loc 1 1046 50 is_stmt 0 view .LVU556
1816 006e 5368 ldr r3, [r2, #4]
1817 .loc 1 1046 60 view .LVU557
1818 0070 03F44033 and r3, r3, #196608
1819 .loc 1 1046 80 view .LVU558
1820 0074 03F58033 add r3, r3, #65536
1821 .loc 1 1046 33 view .LVU559
1822 0078 DB0B lsrs r3, r3, #15
1823 .loc 1 1046 31 view .LVU560
1824 007a 8362 str r3, [r0, #40]
1047:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Po
1825 .loc 1 1047 3 is_stmt 1 view .LVU561
1826 .loc 1 1047 48 is_stmt 0 view .LVU562
1827 007c 5368 ldr r3, [r2, #4]
1828 .loc 1 1047 33 view .LVU563
1829 007e C3F30363 ubfx r3, r3, #24, #4
1830 .loc 1 1047 31 view .LVU564
1831 0082 C362 str r3, [r0, #44]
1048:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1832 .loc 1 1048 1 view .LVU565
1833 0084 7047 bx lr
1834 .L160:
989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1835 .loc 1 989 8 is_stmt 1 view .LVU566
989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1836 .loc 1 989 16 is_stmt 0 view .LVU567
1837 0086 104B ldr r3, .L172
1838 0088 1B68 ldr r3, [r3]
989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1839 .loc 1 989 11 view .LVU568
1840 008a 13F4803F tst r3, #65536
1841 008e 03D0 beq .L162
991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1842 .loc 1 991 5 is_stmt 1 view .LVU569
991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1843 .loc 1 991 33 is_stmt 0 view .LVU570
1844 0090 4FF48033 mov r3, #65536
1845 0094 4360 str r3, [r0, #4]
1846 0096 BDE7 b .L161
1847 .L162:
995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1848 .loc 1 995 5 is_stmt 1 view .LVU571
995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/ccP22z8b.s page 56
1849 .loc 1 995 33 is_stmt 0 view .LVU572
1850 0098 0023 movs r3, #0
1851 009a 4360 str r3, [r0, #4]
1852 009c BAE7 b .L161
1853 .L163:
1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1854 .loc 1 1005 5 is_stmt 1 view .LVU573
1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1855 .loc 1 1005 33 is_stmt 0 view .LVU574
1856 009e 0023 movs r3, #0
1857 00a0 C360 str r3, [r0, #12]
1858 00a2 BEE7 b .L164
1859 .L165:
1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1860 .loc 1 1015 8 is_stmt 1 view .LVU575
1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1861 .loc 1 1015 16 is_stmt 0 view .LVU576
1862 00a4 084B ldr r3, .L172
1863 00a6 1B6F ldr r3, [r3, #112]
1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1864 .loc 1 1015 11 view .LVU577
1865 00a8 13F0010F tst r3, #1
1866 00ac 02D0 beq .L167
1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1867 .loc 1 1017 5 is_stmt 1 view .LVU578
1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1868 .loc 1 1017 33 is_stmt 0 view .LVU579
1869 00ae 0123 movs r3, #1
1870 00b0 8360 str r3, [r0, #8]
1871 00b2 C1E7 b .L166
1872 .L167:
1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1873 .loc 1 1021 5 is_stmt 1 view .LVU580
1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1874 .loc 1 1021 33 is_stmt 0 view .LVU581
1875 00b4 0023 movs r3, #0
1876 00b6 8360 str r3, [r0, #8]
1877 00b8 BEE7 b .L166
1878 .L168:
1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1879 .loc 1 1031 5 is_stmt 1 view .LVU582
1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1880 .loc 1 1031 33 is_stmt 0 view .LVU583
1881 00ba 0023 movs r3, #0
1882 00bc 4361 str r3, [r0, #20]
1883 00be C2E7 b .L169
1884 .L170:
1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1885 .loc 1 1041 5 is_stmt 1 view .LVU584
1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1886 .loc 1 1041 37 is_stmt 0 view .LVU585
1887 00c0 0123 movs r3, #1
1888 00c2 8361 str r3, [r0, #24]
1889 00c4 C6E7 b .L171
1890 .L173:
1891 00c6 00BF .align 2
1892 .L172:
ARM GAS /tmp/ccP22z8b.s page 57
1893 00c8 00380240 .word 1073887232
1894 .cfi_endproc
1895 .LFE249:
1897 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits
1898 .align 1
1899 .global HAL_RCC_GetClockConfig
1900 .syntax unified
1901 .thumb
1902 .thumb_func
1904 HAL_RCC_GetClockConfig:
1905 .LVL106:
1906 .LFB250:
1049:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1050:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
1051:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_ClkInitStruct according to the internal
1052:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers.
1053:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that
1054:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured.
1055:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency.
1056:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
1058:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1907 .loc 1 1059 1 is_stmt 1 view -0
1908 .cfi_startproc
1909 @ args = 0, pretend = 0, frame = 0
1910 @ frame_needed = 0, uses_anonymous_args = 0
1911 @ link register save eliminated.
1060:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/
1061:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 |
1912 .loc 1 1061 3 view .LVU587
1913 .loc 1 1061 32 is_stmt 0 view .LVU588
1914 0000 0F23 movs r3, #15
1915 0002 0360 str r3, [r0]
1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1063:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/
1064:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
1916 .loc 1 1064 3 is_stmt 1 view .LVU589
1917 .loc 1 1064 51 is_stmt 0 view .LVU590
1918 0004 0B4B ldr r3, .L175
1919 0006 9A68 ldr r2, [r3, #8]
1920 .loc 1 1064 37 view .LVU591
1921 0008 02F00302 and r2, r2, #3
1922 .loc 1 1064 35 view .LVU592
1923 000c 4260 str r2, [r0, #4]
1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1066:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/
1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
1924 .loc 1 1067 3 is_stmt 1 view .LVU593
1925 .loc 1 1067 52 is_stmt 0 view .LVU594
1926 000e 9A68 ldr r2, [r3, #8]
1927 .loc 1 1067 38 view .LVU595
1928 0010 02F0F002 and r2, r2, #240
1929 .loc 1 1067 36 view .LVU596
1930 0014 8260 str r2, [r0, #8]
1068:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1069:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/
ARM GAS /tmp/ccP22z8b.s page 58
1070:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
1931 .loc 1 1070 3 is_stmt 1 view .LVU597
1932 .loc 1 1070 53 is_stmt 0 view .LVU598
1933 0016 9A68 ldr r2, [r3, #8]
1934 .loc 1 1070 39 view .LVU599
1935 0018 02F4E052 and r2, r2, #7168
1936 .loc 1 1070 37 view .LVU600
1937 001c C260 str r2, [r0, #12]
1071:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1072:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/
1073:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
1938 .loc 1 1073 3 is_stmt 1 view .LVU601
1939 .loc 1 1073 54 is_stmt 0 view .LVU602
1940 001e 9B68 ldr r3, [r3, #8]
1941 .loc 1 1073 39 view .LVU603
1942 0020 DB08 lsrs r3, r3, #3
1943 0022 03F4E053 and r3, r3, #7168
1944 .loc 1 1073 37 view .LVU604
1945 0026 0361 str r3, [r0, #16]
1074:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1075:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/
1076:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
1946 .loc 1 1076 3 is_stmt 1 view .LVU605
1947 .loc 1 1076 32 is_stmt 0 view .LVU606
1948 0028 034B ldr r3, .L175+4
1949 002a 1B68 ldr r3, [r3]
1950 .loc 1 1076 16 view .LVU607
1951 002c 03F00F03 and r3, r3, #15
1952 .loc 1 1076 14 view .LVU608
1953 0030 0B60 str r3, [r1]
1077:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1954 .loc 1 1077 1 view .LVU609
1955 0032 7047 bx lr
1956 .L176:
1957 .align 2
1958 .L175:
1959 0034 00380240 .word 1073887232
1960 0038 003C0240 .word 1073888256
1961 .cfi_endproc
1962 .LFE250:
1964 .section .text.HAL_RCC_CSSCallback,"ax",%progbits
1965 .align 1
1966 .weak HAL_RCC_CSSCallback
1967 .syntax unified
1968 .thumb
1969 .thumb_func
1971 HAL_RCC_CSSCallback:
1972 .LFB252:
1078:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1079:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
1080:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request.
1081:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler().
1082:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
1083:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
1084:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1085:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1086:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */
ARM GAS /tmp/ccP22z8b.s page 59
1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_IT(RCC_IT_CSS))
1088:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1089:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */
1090:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_RCC_CSSCallback();
1091:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1092:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Clear RCC CSS pending bit */
1093:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
1094:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1095:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1096:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1097:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
1098:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback
1099:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
1100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
1101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
1102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1973 .loc 1 1102 1 is_stmt 1 view -0
1974 .cfi_startproc
1975 @ args = 0, pretend = 0, frame = 0
1976 @ frame_needed = 0, uses_anonymous_args = 0
1977 @ link register save eliminated.
1103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed,
1104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file
1105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
1106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1978 .loc 1 1106 1 view .LVU611
1979 0000 7047 bx lr
1980 .cfi_endproc
1981 .LFE252:
1983 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
1984 .align 1
1985 .global HAL_RCC_NMI_IRQHandler
1986 .syntax unified
1987 .thumb
1988 .thumb_func
1990 HAL_RCC_NMI_IRQHandler:
1991 .LFB251:
1085:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */
1992 .loc 1 1085 1 view -0
1993 .cfi_startproc
1994 @ args = 0, pretend = 0, frame = 0
1995 @ frame_needed = 0, uses_anonymous_args = 0
1996 0000 08B5 push {r3, lr}
1997 .LCFI16:
1998 .cfi_def_cfa_offset 8
1999 .cfi_offset 3, -8
2000 .cfi_offset 14, -4
1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
2001 .loc 1 1087 3 view .LVU613
1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
2002 .loc 1 1087 7 is_stmt 0 view .LVU614
2003 0002 064B ldr r3, .L182
2004 0004 DB68 ldr r3, [r3, #12]
1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
2005 .loc 1 1087 6 view .LVU615
2006 0006 13F0800F tst r3, #128
2007 000a 00D1 bne .L181
ARM GAS /tmp/ccP22z8b.s page 60
2008 .L178:
1095:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
2009 .loc 1 1095 1 view .LVU616
2010 000c 08BD pop {r3, pc}
2011 .L181:
1090:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
2012 .loc 1 1090 5 is_stmt 1 view .LVU617
2013 000e FFF7FEFF bl HAL_RCC_CSSCallback
2014 .LVL107:
1093:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
2015 .loc 1 1093 5 view .LVU618
2016 0012 024B ldr r3, .L182
2017 0014 8022 movs r2, #128
2018 0016 9A73 strb r2, [r3, #14]
1095:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
2019 .loc 1 1095 1 is_stmt 0 view .LVU619
2020 0018 F8E7 b .L178
2021 .L183:
2022 001a 00BF .align 2
2023 .L182:
2024 001c 00380240 .word 1073887232
2025 .cfi_endproc
2026 .LFE251:
2028 .text
2029 .Letext0:
2030 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
2031 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h"
2032 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h"
2033 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
2034 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
2035 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h"
2036 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
2037 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
2038 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
ARM GAS /tmp/ccP22z8b.s page 61
DEFINED SYMBOLS
*ABS*:00000000 stm32f4xx_hal_rcc.c
/tmp/ccP22z8b.s:21 .text.HAL_RCC_DeInit:00000000 $t
/tmp/ccP22z8b.s:27 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
/tmp/ccP22z8b.s:42 .text.HAL_RCC_OscConfig:00000000 $t
/tmp/ccP22z8b.s:48 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
/tmp/ccP22z8b.s:592 .text.HAL_RCC_OscConfig:00000294 $d
/tmp/ccP22z8b.s:598 .text.HAL_RCC_OscConfig:000002a0 $t
/tmp/ccP22z8b.s:911 .text.HAL_RCC_OscConfig:000003f0 $d
/tmp/ccP22z8b.s:917 .text.HAL_RCC_MCOConfig:00000000 $t
/tmp/ccP22z8b.s:923 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
/tmp/ccP22z8b.s:1079 .text.HAL_RCC_MCOConfig:00000090 $d
/tmp/ccP22z8b.s:1086 .text.HAL_RCC_EnableCSS:00000000 $t
/tmp/ccP22z8b.s:1092 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
/tmp/ccP22z8b.s:1109 .text.HAL_RCC_EnableCSS:00000008 $d
/tmp/ccP22z8b.s:1114 .text.HAL_RCC_DisableCSS:00000000 $t
/tmp/ccP22z8b.s:1120 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
/tmp/ccP22z8b.s:1137 .text.HAL_RCC_DisableCSS:00000008 $d
/tmp/ccP22z8b.s:1143 .text.HAL_RCC_GetSysClockFreq:00000000 $t
/tmp/ccP22z8b.s:1149 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
/tmp/ccP22z8b.s:1282 .text.HAL_RCC_GetSysClockFreq:000000d0 $d
/tmp/ccP22z8b.s:1289 .text.HAL_RCC_ClockConfig:00000000 $t
/tmp/ccP22z8b.s:1295 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
/tmp/ccP22z8b.s:1590 .text.HAL_RCC_ClockConfig:0000014c $d
/tmp/ccP22z8b.s:1599 .text.HAL_RCC_GetHCLKFreq:00000000 $t
/tmp/ccP22z8b.s:1605 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
/tmp/ccP22z8b.s:1620 .text.HAL_RCC_GetHCLKFreq:00000008 $d
/tmp/ccP22z8b.s:1625 .text.HAL_RCC_GetPCLK1Freq:00000000 $t
/tmp/ccP22z8b.s:1631 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
/tmp/ccP22z8b.s:1660 .text.HAL_RCC_GetPCLK1Freq:00000018 $d
/tmp/ccP22z8b.s:1666 .text.HAL_RCC_GetPCLK2Freq:00000000 $t
/tmp/ccP22z8b.s:1672 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
/tmp/ccP22z8b.s:1701 .text.HAL_RCC_GetPCLK2Freq:00000018 $d
/tmp/ccP22z8b.s:1707 .text.HAL_RCC_GetOscConfig:00000000 $t
/tmp/ccP22z8b.s:1713 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
/tmp/ccP22z8b.s:1893 .text.HAL_RCC_GetOscConfig:000000c8 $d
/tmp/ccP22z8b.s:1898 .text.HAL_RCC_GetClockConfig:00000000 $t
/tmp/ccP22z8b.s:1904 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
/tmp/ccP22z8b.s:1959 .text.HAL_RCC_GetClockConfig:00000034 $d
/tmp/ccP22z8b.s:1965 .text.HAL_RCC_CSSCallback:00000000 $t
/tmp/ccP22z8b.s:1971 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
/tmp/ccP22z8b.s:1984 .text.HAL_RCC_NMI_IRQHandler:00000000 $t
/tmp/ccP22z8b.s:1990 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
/tmp/ccP22z8b.s:2024 .text.HAL_RCC_NMI_IRQHandler:0000001c $d
UNDEFINED SYMBOLS
HAL_GetTick
HAL_GPIO_Init
__aeabi_uldivmod
HAL_InitTick
AHBPrescTable
SystemCoreClock
uwTickPrio
APBPrescTable