ARM GAS /tmp/ccIYQZ4K.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_it.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/stm32f4xx_it.c" 20 .section .text.NMI_Handler,"ax",%progbits 21 .align 1 22 .global NMI_Handler 23 .syntax unified 24 .thumb 25 .thumb_func 27 NMI_Handler: 28 .LFB239: 1:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f4xx_it.c **** /** 3:Core/Src/stm32f4xx_it.c **** ****************************************************************************** 4:Core/Src/stm32f4xx_it.c **** * @file stm32f4xx_it.c 5:Core/Src/stm32f4xx_it.c **** * @brief Interrupt Service Routines. 6:Core/Src/stm32f4xx_it.c **** ****************************************************************************** 7:Core/Src/stm32f4xx_it.c **** * @attention 8:Core/Src/stm32f4xx_it.c **** * 9:Core/Src/stm32f4xx_it.c **** * Copyright (c) 2025 STMicroelectronics. 10:Core/Src/stm32f4xx_it.c **** * All rights reserved. 11:Core/Src/stm32f4xx_it.c **** * 12:Core/Src/stm32f4xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Core/Src/stm32f4xx_it.c **** * in the root directory of this software component. 14:Core/Src/stm32f4xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Core/Src/stm32f4xx_it.c **** * 16:Core/Src/stm32f4xx_it.c **** ****************************************************************************** 17:Core/Src/stm32f4xx_it.c **** */ 18:Core/Src/stm32f4xx_it.c **** /* USER CODE END Header */ 19:Core/Src/stm32f4xx_it.c **** 20:Core/Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/ 21:Core/Src/stm32f4xx_it.c **** #include "main.h" 22:Core/Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h" 23:Core/Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/ 24:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */ 25:Core/Src/stm32f4xx_it.c **** /* USER CODE END Includes */ 26:Core/Src/stm32f4xx_it.c **** 27:Core/Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/ 28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f4xx_it.c **** 30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */ ARM GAS /tmp/ccIYQZ4K.s page 2 31:Core/Src/stm32f4xx_it.c **** 32:Core/Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/ 33:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */ 34:Core/Src/stm32f4xx_it.c **** 35:Core/Src/stm32f4xx_it.c **** /* USER CODE END PD */ 36:Core/Src/stm32f4xx_it.c **** 37:Core/Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/ 38:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */ 39:Core/Src/stm32f4xx_it.c **** 40:Core/Src/stm32f4xx_it.c **** /* USER CODE END PM */ 41:Core/Src/stm32f4xx_it.c **** 42:Core/Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/ 43:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */ 44:Core/Src/stm32f4xx_it.c **** 45:Core/Src/stm32f4xx_it.c **** /* USER CODE END PV */ 46:Core/Src/stm32f4xx_it.c **** 47:Core/Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/ 48:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */ 49:Core/Src/stm32f4xx_it.c **** 50:Core/Src/stm32f4xx_it.c **** /* USER CODE END PFP */ 51:Core/Src/stm32f4xx_it.c **** 52:Core/Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/ 53:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */ 54:Core/Src/stm32f4xx_it.c **** 55:Core/Src/stm32f4xx_it.c **** /* USER CODE END 0 */ 56:Core/Src/stm32f4xx_it.c **** 57:Core/Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/ 58:Core/Src/stm32f4xx_it.c **** extern PCD_HandleTypeDef hpcd_USB_OTG_FS; 59:Core/Src/stm32f4xx_it.c **** extern DMA_HandleTypeDef hdma_adc1; 60:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */ 61:Core/Src/stm32f4xx_it.c **** 62:Core/Src/stm32f4xx_it.c **** /* USER CODE END EV */ 63:Core/Src/stm32f4xx_it.c **** 64:Core/Src/stm32f4xx_it.c **** /******************************************************************************/ 65:Core/Src/stm32f4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */ 66:Core/Src/stm32f4xx_it.c **** /******************************************************************************/ 67:Core/Src/stm32f4xx_it.c **** /** 68:Core/Src/stm32f4xx_it.c **** * @brief This function handles Non maskable interrupt. 69:Core/Src/stm32f4xx_it.c **** */ 70:Core/Src/stm32f4xx_it.c **** void NMI_Handler(void) 71:Core/Src/stm32f4xx_it.c **** { 29 .loc 1 71 1 view -0 30 .cfi_startproc 31 @ Volatile: function does not return. 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 34 @ link register save eliminated. 35 .L2: 72:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 73:Core/Src/stm32f4xx_it.c **** 74:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */ 75:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 76:Core/Src/stm32f4xx_it.c **** while (1) 36 .loc 1 76 4 view .LVU1 77:Core/Src/stm32f4xx_it.c **** { 78:Core/Src/stm32f4xx_it.c **** } 37 .loc 1 78 3 view .LVU2 ARM GAS /tmp/ccIYQZ4K.s page 3 76:Core/Src/stm32f4xx_it.c **** { 38 .loc 1 76 10 view .LVU3 39 0000 FEE7 b .L2 40 .cfi_endproc 41 .LFE239: 43 .section .text.HardFault_Handler,"ax",%progbits 44 .align 1 45 .global HardFault_Handler 46 .syntax unified 47 .thumb 48 .thumb_func 50 HardFault_Handler: 51 .LFB240: 79:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */ 80:Core/Src/stm32f4xx_it.c **** } 81:Core/Src/stm32f4xx_it.c **** 82:Core/Src/stm32f4xx_it.c **** /** 83:Core/Src/stm32f4xx_it.c **** * @brief This function handles Hard fault interrupt. 84:Core/Src/stm32f4xx_it.c **** */ 85:Core/Src/stm32f4xx_it.c **** void HardFault_Handler(void) 86:Core/Src/stm32f4xx_it.c **** { 52 .loc 1 86 1 view -0 53 .cfi_startproc 54 @ Volatile: function does not return. 55 @ args = 0, pretend = 0, frame = 0 56 @ frame_needed = 0, uses_anonymous_args = 0 57 @ link register save eliminated. 58 .L4: 87:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */ 88:Core/Src/stm32f4xx_it.c **** 89:Core/Src/stm32f4xx_it.c **** /* USER CODE END HardFault_IRQn 0 */ 90:Core/Src/stm32f4xx_it.c **** while (1) 59 .loc 1 90 3 view .LVU5 91:Core/Src/stm32f4xx_it.c **** { 92:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 93:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */ 94:Core/Src/stm32f4xx_it.c **** } 60 .loc 1 94 3 view .LVU6 90:Core/Src/stm32f4xx_it.c **** { 61 .loc 1 90 9 view .LVU7 62 0000 FEE7 b .L4 63 .cfi_endproc 64 .LFE240: 66 .section .text.MemManage_Handler,"ax",%progbits 67 .align 1 68 .global MemManage_Handler 69 .syntax unified 70 .thumb 71 .thumb_func 73 MemManage_Handler: 74 .LFB241: 95:Core/Src/stm32f4xx_it.c **** } 96:Core/Src/stm32f4xx_it.c **** 97:Core/Src/stm32f4xx_it.c **** /** 98:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault. 99:Core/Src/stm32f4xx_it.c **** */ 100:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void) ARM GAS /tmp/ccIYQZ4K.s page 4 101:Core/Src/stm32f4xx_it.c **** { 75 .loc 1 101 1 view -0 76 .cfi_startproc 77 @ Volatile: function does not return. 78 @ args = 0, pretend = 0, frame = 0 79 @ frame_needed = 0, uses_anonymous_args = 0 80 @ link register save eliminated. 81 .L6: 102:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 103:Core/Src/stm32f4xx_it.c **** 104:Core/Src/stm32f4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */ 105:Core/Src/stm32f4xx_it.c **** while (1) 82 .loc 1 105 3 view .LVU9 106:Core/Src/stm32f4xx_it.c **** { 107:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 108:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */ 109:Core/Src/stm32f4xx_it.c **** } 83 .loc 1 109 3 view .LVU10 105:Core/Src/stm32f4xx_it.c **** { 84 .loc 1 105 9 view .LVU11 85 0000 FEE7 b .L6 86 .cfi_endproc 87 .LFE241: 89 .section .text.BusFault_Handler,"ax",%progbits 90 .align 1 91 .global BusFault_Handler 92 .syntax unified 93 .thumb 94 .thumb_func 96 BusFault_Handler: 97 .LFB242: 110:Core/Src/stm32f4xx_it.c **** } 111:Core/Src/stm32f4xx_it.c **** 112:Core/Src/stm32f4xx_it.c **** /** 113:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault. 114:Core/Src/stm32f4xx_it.c **** */ 115:Core/Src/stm32f4xx_it.c **** void BusFault_Handler(void) 116:Core/Src/stm32f4xx_it.c **** { 98 .loc 1 116 1 view -0 99 .cfi_startproc 100 @ Volatile: function does not return. 101 @ args = 0, pretend = 0, frame = 0 102 @ frame_needed = 0, uses_anonymous_args = 0 103 @ link register save eliminated. 104 .L8: 117:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */ 118:Core/Src/stm32f4xx_it.c **** 119:Core/Src/stm32f4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */ 120:Core/Src/stm32f4xx_it.c **** while (1) 105 .loc 1 120 3 view .LVU13 121:Core/Src/stm32f4xx_it.c **** { 122:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 123:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */ 124:Core/Src/stm32f4xx_it.c **** } 106 .loc 1 124 3 view .LVU14 120:Core/Src/stm32f4xx_it.c **** { 107 .loc 1 120 9 view .LVU15 ARM GAS /tmp/ccIYQZ4K.s page 5 108 0000 FEE7 b .L8 109 .cfi_endproc 110 .LFE242: 112 .section .text.UsageFault_Handler,"ax",%progbits 113 .align 1 114 .global UsageFault_Handler 115 .syntax unified 116 .thumb 117 .thumb_func 119 UsageFault_Handler: 120 .LFB243: 125:Core/Src/stm32f4xx_it.c **** } 126:Core/Src/stm32f4xx_it.c **** 127:Core/Src/stm32f4xx_it.c **** /** 128:Core/Src/stm32f4xx_it.c **** * @brief This function handles Undefined instruction or illegal state. 129:Core/Src/stm32f4xx_it.c **** */ 130:Core/Src/stm32f4xx_it.c **** void UsageFault_Handler(void) 131:Core/Src/stm32f4xx_it.c **** { 121 .loc 1 131 1 view -0 122 .cfi_startproc 123 @ Volatile: function does not return. 124 @ args = 0, pretend = 0, frame = 0 125 @ frame_needed = 0, uses_anonymous_args = 0 126 @ link register save eliminated. 127 .L10: 132:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */ 133:Core/Src/stm32f4xx_it.c **** 134:Core/Src/stm32f4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */ 135:Core/Src/stm32f4xx_it.c **** while (1) 128 .loc 1 135 3 view .LVU17 136:Core/Src/stm32f4xx_it.c **** { 137:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 138:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */ 139:Core/Src/stm32f4xx_it.c **** } 129 .loc 1 139 3 view .LVU18 135:Core/Src/stm32f4xx_it.c **** { 130 .loc 1 135 9 view .LVU19 131 0000 FEE7 b .L10 132 .cfi_endproc 133 .LFE243: 135 .section .text.SVC_Handler,"ax",%progbits 136 .align 1 137 .global SVC_Handler 138 .syntax unified 139 .thumb 140 .thumb_func 142 SVC_Handler: 143 .LFB244: 140:Core/Src/stm32f4xx_it.c **** } 141:Core/Src/stm32f4xx_it.c **** 142:Core/Src/stm32f4xx_it.c **** /** 143:Core/Src/stm32f4xx_it.c **** * @brief This function handles System service call via SWI instruction. 144:Core/Src/stm32f4xx_it.c **** */ 145:Core/Src/stm32f4xx_it.c **** void SVC_Handler(void) 146:Core/Src/stm32f4xx_it.c **** { 144 .loc 1 146 1 view -0 145 .cfi_startproc ARM GAS /tmp/ccIYQZ4K.s page 6 146 @ args = 0, pretend = 0, frame = 0 147 @ frame_needed = 0, uses_anonymous_args = 0 148 @ link register save eliminated. 147:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */ 148:Core/Src/stm32f4xx_it.c **** 149:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */ 150:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */ 151:Core/Src/stm32f4xx_it.c **** 152:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */ 153:Core/Src/stm32f4xx_it.c **** } 149 .loc 1 153 1 view .LVU21 150 0000 7047 bx lr 151 .cfi_endproc 152 .LFE244: 154 .section .text.DebugMon_Handler,"ax",%progbits 155 .align 1 156 .global DebugMon_Handler 157 .syntax unified 158 .thumb 159 .thumb_func 161 DebugMon_Handler: 162 .LFB245: 154:Core/Src/stm32f4xx_it.c **** 155:Core/Src/stm32f4xx_it.c **** /** 156:Core/Src/stm32f4xx_it.c **** * @brief This function handles Debug monitor. 157:Core/Src/stm32f4xx_it.c **** */ 158:Core/Src/stm32f4xx_it.c **** void DebugMon_Handler(void) 159:Core/Src/stm32f4xx_it.c **** { 163 .loc 1 159 1 view -0 164 .cfi_startproc 165 @ args = 0, pretend = 0, frame = 0 166 @ frame_needed = 0, uses_anonymous_args = 0 167 @ link register save eliminated. 160:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 161:Core/Src/stm32f4xx_it.c **** 162:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */ 163:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 164:Core/Src/stm32f4xx_it.c **** 165:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */ 166:Core/Src/stm32f4xx_it.c **** } 168 .loc 1 166 1 view .LVU23 169 0000 7047 bx lr 170 .cfi_endproc 171 .LFE245: 173 .section .text.PendSV_Handler,"ax",%progbits 174 .align 1 175 .global PendSV_Handler 176 .syntax unified 177 .thumb 178 .thumb_func 180 PendSV_Handler: 181 .LFB246: 167:Core/Src/stm32f4xx_it.c **** 168:Core/Src/stm32f4xx_it.c **** /** 169:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service. 170:Core/Src/stm32f4xx_it.c **** */ 171:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void) ARM GAS /tmp/ccIYQZ4K.s page 7 172:Core/Src/stm32f4xx_it.c **** { 182 .loc 1 172 1 view -0 183 .cfi_startproc 184 @ args = 0, pretend = 0, frame = 0 185 @ frame_needed = 0, uses_anonymous_args = 0 186 @ link register save eliminated. 173:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */ 174:Core/Src/stm32f4xx_it.c **** 175:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */ 176:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */ 177:Core/Src/stm32f4xx_it.c **** 178:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */ 179:Core/Src/stm32f4xx_it.c **** } 187 .loc 1 179 1 view .LVU25 188 0000 7047 bx lr 189 .cfi_endproc 190 .LFE246: 192 .section .text.SysTick_Handler,"ax",%progbits 193 .align 1 194 .global SysTick_Handler 195 .syntax unified 196 .thumb 197 .thumb_func 199 SysTick_Handler: 200 .LFB247: 180:Core/Src/stm32f4xx_it.c **** 181:Core/Src/stm32f4xx_it.c **** /** 182:Core/Src/stm32f4xx_it.c **** * @brief This function handles System tick timer. 183:Core/Src/stm32f4xx_it.c **** */ 184:Core/Src/stm32f4xx_it.c **** void SysTick_Handler(void) 185:Core/Src/stm32f4xx_it.c **** { 201 .loc 1 185 1 view -0 202 .cfi_startproc 203 @ args = 0, pretend = 0, frame = 0 204 @ frame_needed = 0, uses_anonymous_args = 0 205 0000 08B5 push {r3, lr} 206 .LCFI0: 207 .cfi_def_cfa_offset 8 208 .cfi_offset 3, -8 209 .cfi_offset 14, -4 186:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */ 187:Core/Src/stm32f4xx_it.c **** 188:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */ 189:Core/Src/stm32f4xx_it.c **** HAL_IncTick(); 210 .loc 1 189 3 view .LVU27 211 0002 FFF7FEFF bl HAL_IncTick 212 .LVL0: 190:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ 191:Core/Src/stm32f4xx_it.c **** 192:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ 193:Core/Src/stm32f4xx_it.c **** } 213 .loc 1 193 1 is_stmt 0 view .LVU28 214 0006 08BD pop {r3, pc} 215 .cfi_endproc 216 .LFE247: 218 .section .text.DMA2_Stream0_IRQHandler,"ax",%progbits 219 .align 1 ARM GAS /tmp/ccIYQZ4K.s page 8 220 .global DMA2_Stream0_IRQHandler 221 .syntax unified 222 .thumb 223 .thumb_func 225 DMA2_Stream0_IRQHandler: 226 .LFB248: 194:Core/Src/stm32f4xx_it.c **** 195:Core/Src/stm32f4xx_it.c **** /******************************************************************************/ 196:Core/Src/stm32f4xx_it.c **** /* STM32F4xx Peripheral Interrupt Handlers */ 197:Core/Src/stm32f4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */ 198:Core/Src/stm32f4xx_it.c **** /* For the available peripheral interrupt handler names, */ 199:Core/Src/stm32f4xx_it.c **** /* please refer to the startup file (startup_stm32f4xx.s). */ 200:Core/Src/stm32f4xx_it.c **** /******************************************************************************/ 201:Core/Src/stm32f4xx_it.c **** 202:Core/Src/stm32f4xx_it.c **** /** 203:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream0 global interrupt. 204:Core/Src/stm32f4xx_it.c **** */ 205:Core/Src/stm32f4xx_it.c **** void DMA2_Stream0_IRQHandler(void) 206:Core/Src/stm32f4xx_it.c **** { 227 .loc 1 206 1 is_stmt 1 view -0 228 .cfi_startproc 229 @ args = 0, pretend = 0, frame = 0 230 @ frame_needed = 0, uses_anonymous_args = 0 231 0000 08B5 push {r3, lr} 232 .LCFI1: 233 .cfi_def_cfa_offset 8 234 .cfi_offset 3, -8 235 .cfi_offset 14, -4 207:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */ 208:Core/Src/stm32f4xx_it.c **** 209:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 0 */ 210:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1); 236 .loc 1 210 3 view .LVU30 237 0002 0248 ldr r0, .L18 238 0004 FFF7FEFF bl HAL_DMA_IRQHandler 239 .LVL1: 211:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */ 212:Core/Src/stm32f4xx_it.c **** 213:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 1 */ 214:Core/Src/stm32f4xx_it.c **** } 240 .loc 1 214 1 is_stmt 0 view .LVU31 241 0008 08BD pop {r3, pc} 242 .L19: 243 000a 00BF .align 2 244 .L18: 245 000c 00000000 .word hdma_adc1 246 .cfi_endproc 247 .LFE248: 249 .section .text.OTG_FS_IRQHandler,"ax",%progbits 250 .align 1 251 .global OTG_FS_IRQHandler 252 .syntax unified 253 .thumb 254 .thumb_func 256 OTG_FS_IRQHandler: 257 .LFB249: 215:Core/Src/stm32f4xx_it.c **** ARM GAS /tmp/ccIYQZ4K.s page 9 216:Core/Src/stm32f4xx_it.c **** /** 217:Core/Src/stm32f4xx_it.c **** * @brief This function handles USB On The Go FS global interrupt. 218:Core/Src/stm32f4xx_it.c **** */ 219:Core/Src/stm32f4xx_it.c **** void OTG_FS_IRQHandler(void) 220:Core/Src/stm32f4xx_it.c **** { 258 .loc 1 220 1 is_stmt 1 view -0 259 .cfi_startproc 260 @ args = 0, pretend = 0, frame = 0 261 @ frame_needed = 0, uses_anonymous_args = 0 262 0000 08B5 push {r3, lr} 263 .LCFI2: 264 .cfi_def_cfa_offset 8 265 .cfi_offset 3, -8 266 .cfi_offset 14, -4 221:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 0 */ 222:Core/Src/stm32f4xx_it.c **** 223:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 0 */ 224:Core/Src/stm32f4xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); 267 .loc 1 224 3 view .LVU33 268 0002 0248 ldr r0, .L22 269 0004 FFF7FEFF bl HAL_PCD_IRQHandler 270 .LVL2: 225:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 1 */ 226:Core/Src/stm32f4xx_it.c **** 227:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 1 */ 228:Core/Src/stm32f4xx_it.c **** } 271 .loc 1 228 1 is_stmt 0 view .LVU34 272 0008 08BD pop {r3, pc} 273 .L23: 274 000a 00BF .align 2 275 .L22: 276 000c 00000000 .word hpcd_USB_OTG_FS 277 .cfi_endproc 278 .LFE249: 280 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits 281 .align 1 282 .global HAL_ADC_ConvCpltCallback 283 .syntax unified 284 .thumb 285 .thumb_func 287 HAL_ADC_ConvCpltCallback: 288 .LVL3: 289 .LFB250: 229:Core/Src/stm32f4xx_it.c **** 230:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 1 */ 231:Core/Src/stm32f4xx_it.c **** 232:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) 233:Core/Src/stm32f4xx_it.c **** { 290 .loc 1 233 1 is_stmt 1 view -0 291 .cfi_startproc 292 @ args = 0, pretend = 0, frame = 0 293 @ frame_needed = 0, uses_anonymous_args = 0 294 .loc 1 233 1 is_stmt 0 view .LVU36 295 0000 08B5 push {r3, lr} 296 .LCFI3: 297 .cfi_def_cfa_offset 8 298 .cfi_offset 3, -8 ARM GAS /tmp/ccIYQZ4K.s page 10 299 .cfi_offset 14, -4 234:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); 300 .loc 1 234 3 is_stmt 1 view .LVU37 301 0002 0122 movs r2, #1 302 0004 8021 movs r1, #128 303 0006 0248 ldr r0, .L26 304 .LVL4: 305 .loc 1 234 3 is_stmt 0 view .LVU38 306 0008 FFF7FEFF bl HAL_GPIO_WritePin 307 .LVL5: 235:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled 236:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here 237:Core/Src/stm32f4xx_it.c **** } 308 .loc 1 237 1 view .LVU39 309 000c 08BD pop {r3, pc} 310 .L27: 311 000e 00BF .align 2 312 .L26: 313 0010 00040240 .word 1073873920 314 .cfi_endproc 315 .LFE250: 317 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits 318 .align 1 319 .global HAL_ADC_ConvHalfCpltCallback 320 .syntax unified 321 .thumb 322 .thumb_func 324 HAL_ADC_ConvHalfCpltCallback: 325 .LVL6: 326 .LFB251: 238:Core/Src/stm32f4xx_it.c **** 239:Core/Src/stm32f4xx_it.c **** 240:Core/Src/stm32f4xx_it.c **** 241:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) 242:Core/Src/stm32f4xx_it.c **** { 327 .loc 1 242 1 is_stmt 1 view -0 328 .cfi_startproc 329 @ args = 0, pretend = 0, frame = 0 330 @ frame_needed = 0, uses_anonymous_args = 0 331 .loc 1 242 1 is_stmt 0 view .LVU41 332 0000 08B5 push {r3, lr} 333 .LCFI4: 334 .cfi_def_cfa_offset 8 335 .cfi_offset 3, -8 336 .cfi_offset 14, -4 243:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET); 244:Core/Src/stm32f4xx_it.c **** 245:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin); 337 .loc 1 245 3 is_stmt 1 view .LVU42 338 0002 8021 movs r1, #128 339 0004 0148 ldr r0, .L30 340 .LVL7: 341 .loc 1 245 3 is_stmt 0 view .LVU43 342 0006 FFF7FEFF bl HAL_GPIO_TogglePin 343 .LVL8: 246:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled 247:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here ARM GAS /tmp/ccIYQZ4K.s page 11 248:Core/Src/stm32f4xx_it.c **** } 344 .loc 1 248 1 view .LVU44 345 000a 08BD pop {r3, pc} 346 .L31: 347 .align 2 348 .L30: 349 000c 00040240 .word 1073873920 350 .cfi_endproc 351 .LFE251: 353 .text 354 .Letext0: 355 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 356 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" 357 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 358 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 359 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 360 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" 361 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" 362 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h" 363 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h" 364 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" ARM GAS /tmp/ccIYQZ4K.s page 12 DEFINED SYMBOLS *ABS*:00000000 stm32f4xx_it.c /tmp/ccIYQZ4K.s:21 .text.NMI_Handler:00000000 $t /tmp/ccIYQZ4K.s:27 .text.NMI_Handler:00000000 NMI_Handler /tmp/ccIYQZ4K.s:44 .text.HardFault_Handler:00000000 $t /tmp/ccIYQZ4K.s:50 .text.HardFault_Handler:00000000 HardFault_Handler /tmp/ccIYQZ4K.s:67 .text.MemManage_Handler:00000000 $t /tmp/ccIYQZ4K.s:73 .text.MemManage_Handler:00000000 MemManage_Handler /tmp/ccIYQZ4K.s:90 .text.BusFault_Handler:00000000 $t /tmp/ccIYQZ4K.s:96 .text.BusFault_Handler:00000000 BusFault_Handler /tmp/ccIYQZ4K.s:113 .text.UsageFault_Handler:00000000 $t /tmp/ccIYQZ4K.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler /tmp/ccIYQZ4K.s:136 .text.SVC_Handler:00000000 $t /tmp/ccIYQZ4K.s:142 .text.SVC_Handler:00000000 SVC_Handler /tmp/ccIYQZ4K.s:155 .text.DebugMon_Handler:00000000 $t /tmp/ccIYQZ4K.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler /tmp/ccIYQZ4K.s:174 .text.PendSV_Handler:00000000 $t /tmp/ccIYQZ4K.s:180 .text.PendSV_Handler:00000000 PendSV_Handler /tmp/ccIYQZ4K.s:193 .text.SysTick_Handler:00000000 $t /tmp/ccIYQZ4K.s:199 .text.SysTick_Handler:00000000 SysTick_Handler /tmp/ccIYQZ4K.s:219 .text.DMA2_Stream0_IRQHandler:00000000 $t /tmp/ccIYQZ4K.s:225 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler /tmp/ccIYQZ4K.s:245 .text.DMA2_Stream0_IRQHandler:0000000c $d /tmp/ccIYQZ4K.s:250 .text.OTG_FS_IRQHandler:00000000 $t /tmp/ccIYQZ4K.s:256 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler /tmp/ccIYQZ4K.s:276 .text.OTG_FS_IRQHandler:0000000c $d /tmp/ccIYQZ4K.s:281 .text.HAL_ADC_ConvCpltCallback:00000000 $t /tmp/ccIYQZ4K.s:287 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback /tmp/ccIYQZ4K.s:313 .text.HAL_ADC_ConvCpltCallback:00000010 $d /tmp/ccIYQZ4K.s:318 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t /tmp/ccIYQZ4K.s:324 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback /tmp/ccIYQZ4K.s:349 .text.HAL_ADC_ConvHalfCpltCallback:0000000c $d UNDEFINED SYMBOLS HAL_IncTick HAL_DMA_IRQHandler hdma_adc1 HAL_PCD_IRQHandler hpcd_USB_OTG_FS HAL_GPIO_WritePin HAL_GPIO_TogglePin