ARM GAS /tmp/cciRL9JN.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_hal_pwr_ex.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c" 20 .section .text.HAL_PWREx_EnableBkUpReg,"ax",%progbits 21 .align 1 22 .global HAL_PWREx_EnableBkUpReg 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_PWREx_EnableBkUpReg: 28 .LFB239: 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ****************************************************************************** 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @file stm32f4xx_hal_pwr_ex.c 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @author MCD Application Team 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * functionalities of PWR extension peripheral: 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * + Peripheral Extended features functions 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ****************************************************************************** 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @attention 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * Copyright (c) 2017 STMicroelectronics. 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * All rights reserved. 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the root directory of this software component. 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ****************************************************************************** 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #include "stm32f4xx_hal.h" 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup STM32F4xx_HAL_Driver 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{ 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief PWR HAL module driver ARM GAS /tmp/cciRL9JN.s page 2 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{ 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup PWREx_Private_Constants 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{ 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000U 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000U 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_BKPREG_TIMEOUT_VALUE 1000U 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_VOSRDY_TIMEOUT_VALUE 1000U 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @} 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private functions ---------------------------------------------------------*/ 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{ 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions 59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Peripheral Extended features functions 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @verbatim 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** =============================================================================== 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ##### Peripheral extended features functions ##### 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** =============================================================================== 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** Main and Backup Regulators configuration *** 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ================================================ 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..] 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** retained even in Standby or VBAT mode when the low power backup regulator 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is enabled. It can be considered as an internal EEPROM when VBAT is 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** always present. You can use the HAL_PWREx_EnableBkUpReg() function to 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** enable the low power backup regulator. 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD) 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** save battery life. 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** protected to prevent confidential data, such as cryptographic private 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** key, from being accessed. The backup SRAM can be erased only through 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the Flash interface when a protection level change from level 1 to 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** level 0 is requested. 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** -@- Refer to the description of Read protection (RDP) in the Flash 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** programming manual. ARM GAS /tmp/cciRL9JN.s page 3 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The main internal regulator can be configured to have a tradeoff between 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** performance and power consumption when the device does not operate at 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** macro which configure VOS bit in PWR_CR register 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** Refer to the product datasheets for more details. 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** FLASH Power Down configuration **** 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ======================================= 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..] 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) By setting the FPDS bit in the PWR_CR register by using the 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** down mode when the device enters Stop mode. When the Flash memory 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is in power down mode, an additional startup delay is incurred when 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** waking up from Stop mode. 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is OFF and the HSI or HSE clock source is selected as system clock. 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** The new value programmed is active only when the PLL is ON. 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** When the PLL is OFF, the voltage scale 3 is automatically selected. 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** Refer to the datasheets for more details. 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** Over-Drive and Under-Drive configuration **** 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ================================================= 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..] 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 2 operating modes available: 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Normal mode: The CPU and core logic operate at maximum frequency at a given 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** voltage scaling (scale 1, scale 2 or scale 3) 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** higher frequency than the normal mode for a given voltage scaling (scale 1, 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mod 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the sequence described in Reference manual. 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** supplies a low power voltage to the 1.2V domain, thus preserving the content of register 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** and internal SRAM. 2 operating modes are available: 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is used in Scale 3 or 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** low voltage mode. 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is in low voltage mode. 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @endverbatim 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{ 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables the Backup Regulator. 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void) 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 29 .loc 1 142 1 view -0 30 .cfi_startproc ARM GAS /tmp/cciRL9JN.s page 4 31 @ args = 0, pretend = 0, frame = 0 32 @ frame_needed = 0, uses_anonymous_args = 0 33 0000 10B5 push {r4, lr} 34 .LCFI0: 35 .cfi_def_cfa_offset 8 36 .cfi_offset 4, -8 37 .cfi_offset 14, -4 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U; 38 .loc 1 143 3 view .LVU1 39 .LVL0: 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE; 40 .loc 1 145 3 view .LVU2 41 .loc 1 145 33 is_stmt 0 view .LVU3 42 0002 0B4B ldr r3, .L8 43 0004 0122 movs r2, #1 44 0006 C3F8A420 str r2, [r3, #164] 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */ 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 45 .loc 1 148 3 is_stmt 1 view .LVU4 46 .loc 1 148 15 is_stmt 0 view .LVU5 47 000a FFF7FEFF bl HAL_GetTick 48 .LVL1: 49 000e 0446 mov r4, r0 50 .LVL2: 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */ 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET) 51 .loc 1 151 3 is_stmt 1 view .LVU6 52 .L2: 53 .loc 1 151 42 view .LVU7 54 .loc 1 151 9 is_stmt 0 view .LVU8 55 0010 084B ldr r3, .L8+4 56 0012 5B68 ldr r3, [r3, #4] 57 .loc 1 151 42 view .LVU9 58 0014 13F0080F tst r3, #8 59 0018 07D1 bne .L7 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) 60 .loc 1 153 5 is_stmt 1 view .LVU10 61 .loc 1 153 9 is_stmt 0 view .LVU11 62 001a FFF7FEFF bl HAL_GetTick 63 .LVL3: 64 .loc 1 153 23 discriminator 1 view .LVU12 65 001e 001B subs r0, r0, r4 66 .loc 1 153 7 discriminator 1 view .LVU13 67 0020 B0F57A7F cmp r0, #1000 68 0024 F4D9 bls .L2 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 69 .loc 1 155 14 view .LVU14 70 0026 0320 movs r0, #3 71 0028 00E0 b .L3 72 .L7: 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } ARM GAS /tmp/cciRL9JN.s page 5 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK; 73 .loc 1 158 10 view .LVU15 74 002a 0020 movs r0, #0 75 .L3: 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 76 .loc 1 159 1 view .LVU16 77 002c 10BD pop {r4, pc} 78 .LVL4: 79 .L9: 80 .loc 1 159 1 view .LVU17 81 002e 00BF .align 2 82 .L8: 83 0030 00000E42 .word 1108213760 84 0034 00700040 .word 1073770496 85 .cfi_endproc 86 .LFE239: 88 .section .text.HAL_PWREx_DisableBkUpReg,"ax",%progbits 89 .align 1 90 .global HAL_PWREx_DisableBkUpReg 91 .syntax unified 92 .thumb 93 .thumb_func 95 HAL_PWREx_DisableBkUpReg: 96 .LFB240: 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables the Backup Regulator. 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void) 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 97 .loc 1 166 1 is_stmt 1 view -0 98 .cfi_startproc 99 @ args = 0, pretend = 0, frame = 0 100 @ frame_needed = 0, uses_anonymous_args = 0 101 0000 10B5 push {r4, lr} 102 .LCFI1: 103 .cfi_def_cfa_offset 8 104 .cfi_offset 4, -8 105 .cfi_offset 14, -4 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U; 106 .loc 1 167 3 view .LVU19 107 .LVL5: 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE; 108 .loc 1 169 3 view .LVU20 109 .loc 1 169 33 is_stmt 0 view .LVU21 110 0002 0B4B ldr r3, .L17 111 0004 0022 movs r2, #0 112 0006 C3F8A420 str r2, [r3, #164] 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */ 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 113 .loc 1 172 3 is_stmt 1 view .LVU22 114 .loc 1 172 15 is_stmt 0 view .LVU23 115 000a FFF7FEFF bl HAL_GetTick 116 .LVL6: ARM GAS /tmp/cciRL9JN.s page 6 117 000e 0446 mov r4, r0 118 .LVL7: 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */ 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET) 119 .loc 1 175 3 is_stmt 1 view .LVU24 120 .L11: 121 .loc 1 175 42 view .LVU25 122 .loc 1 175 9 is_stmt 0 view .LVU26 123 0010 084B ldr r3, .L17+4 124 0012 5B68 ldr r3, [r3, #4] 125 .loc 1 175 42 view .LVU27 126 0014 13F0080F tst r3, #8 127 0018 07D0 beq .L16 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) 128 .loc 1 177 5 is_stmt 1 view .LVU28 129 .loc 1 177 9 is_stmt 0 view .LVU29 130 001a FFF7FEFF bl HAL_GetTick 131 .LVL8: 132 .loc 1 177 23 discriminator 1 view .LVU30 133 001e 001B subs r0, r0, r4 134 .loc 1 177 7 discriminator 1 view .LVU31 135 0020 B0F57A7F cmp r0, #1000 136 0024 F4D9 bls .L11 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 137 .loc 1 179 14 view .LVU32 138 0026 0320 movs r0, #3 139 0028 00E0 b .L12 140 .L16: 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK; 141 .loc 1 182 10 view .LVU33 142 002a 0020 movs r0, #0 143 .L12: 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 144 .loc 1 183 1 view .LVU34 145 002c 10BD pop {r4, pc} 146 .LVL9: 147 .L18: 148 .loc 1 183 1 view .LVU35 149 002e 00BF .align 2 150 .L17: 151 0030 00000E42 .word 1108213760 152 0034 00700040 .word 1073770496 153 .cfi_endproc 154 .LFE240: 156 .section .text.HAL_PWREx_EnableFlashPowerDown,"ax",%progbits 157 .align 1 158 .global HAL_PWREx_EnableFlashPowerDown 159 .syntax unified 160 .thumb 161 .thumb_func 163 HAL_PWREx_EnableFlashPowerDown: 164 .LFB241: ARM GAS /tmp/cciRL9JN.s page 7 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables the Flash Power Down in Stop mode. 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableFlashPowerDown(void) 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 165 .loc 1 190 1 is_stmt 1 view -0 166 .cfi_startproc 167 @ args = 0, pretend = 0, frame = 0 168 @ frame_needed = 0, uses_anonymous_args = 0 169 @ link register save eliminated. 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE; 170 .loc 1 191 3 view .LVU37 171 .loc 1 191 33 is_stmt 0 view .LVU38 172 0000 014B ldr r3, .L20 173 0002 0122 movs r2, #1 174 0004 5A62 str r2, [r3, #36] 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 175 .loc 1 192 1 view .LVU39 176 0006 7047 bx lr 177 .L21: 178 .align 2 179 .L20: 180 0008 00000E42 .word 1108213760 181 .cfi_endproc 182 .LFE241: 184 .section .text.HAL_PWREx_DisableFlashPowerDown,"ax",%progbits 185 .align 1 186 .global HAL_PWREx_DisableFlashPowerDown 187 .syntax unified 188 .thumb 189 .thumb_func 191 HAL_PWREx_DisableFlashPowerDown: 192 .LFB242: 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables the Flash Power Down in Stop mode. 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableFlashPowerDown(void) 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 193 .loc 1 199 1 is_stmt 1 view -0 194 .cfi_startproc 195 @ args = 0, pretend = 0, frame = 0 196 @ frame_needed = 0, uses_anonymous_args = 0 197 @ link register save eliminated. 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE; 198 .loc 1 200 3 view .LVU41 199 .loc 1 200 33 is_stmt 0 view .LVU42 200 0000 014B ldr r3, .L23 201 0002 0022 movs r2, #0 202 0004 5A62 str r2, [r3, #36] 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 203 .loc 1 201 1 view .LVU43 204 0006 7047 bx lr 205 .L24: ARM GAS /tmp/cciRL9JN.s page 8 206 .align 2 207 .L23: 208 0008 00000E42 .word 1108213760 209 .cfi_endproc 210 .LFE242: 212 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits 213 .align 1 214 .global HAL_PWREx_GetVoltageRange 215 .syntax unified 216 .thumb 217 .thumb_func 219 HAL_PWREx_GetVoltageRange: 220 .LFB243: 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Return Voltage Scaling Range. 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval The configured scale for the regulator voltage(VOS bit field). 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * The returned value can be one of the following: 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void) 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 221 .loc 1 212 1 is_stmt 1 view -0 222 .cfi_startproc 223 @ args = 0, pretend = 0, frame = 0 224 @ frame_needed = 0, uses_anonymous_args = 0 225 @ link register save eliminated. 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return (PWR->CR & PWR_CR_VOS); 226 .loc 1 213 3 view .LVU45 227 .loc 1 213 14 is_stmt 0 view .LVU46 228 0000 024B ldr r3, .L26 229 0002 1868 ldr r0, [r3] 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 230 .loc 1 214 1 view .LVU47 231 0004 00F44040 and r0, r0, #49152 232 0008 7047 bx lr 233 .L27: 234 000a 00BF .align 2 235 .L26: 236 000c 00700040 .word 1073770496 237 .cfi_endproc 238 .LFE243: 240 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits 241 .align 1 242 .global HAL_PWREx_ControlVoltageScaling 243 .syntax unified 244 .thumb 245 .thumb_func 247 HAL_PWREx_ControlVoltageScaling: 248 .LVL10: 249 .LFB244: 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage. ARM GAS /tmp/cciRL9JN.s page 9 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption. 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK = 168 MHz. 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK = 144 MHz. 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note When moving from Range 1 to Range 2, the system frequency must be decreased to 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API. 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * When moving from Range 2 to Range 1, the system frequency can be increased to 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API. 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL Status 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U; 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable PWR RCC Clock Peripheral */ 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Set Range */ 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get Start Tick*/ 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK; 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage. 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption. 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK is 168 MHz. It can be 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 180 MHz by activating the over-drive mode. 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK is 144 MHz. It can be 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 168 MHz by activating the over-drive mode. 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode, 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK is 120 MHz. 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note To update the system clock frequency(SYSCLK): ARM GAS /tmp/cciRL9JN.s page 10 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig(). 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - Call the HAL_RCC_OscConfig() to configure the PLL. 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale. 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - Set the new system clock frequency using the HAL_RCC_ClockConfig(). 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note The scale can be modified only when the HSI or HSE clock source is selected 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * as system clock source, otherwise the API returns HAL_ERROR. 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * value in the PWR_CR1 register are not taken in account. 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note The new voltage scale is active only when the PLL is ON. 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL Status 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 250 .loc 1 289 1 is_stmt 1 view -0 251 .cfi_startproc 252 @ args = 0, pretend = 0, frame = 8 253 @ frame_needed = 0, uses_anonymous_args = 0 254 .loc 1 289 1 is_stmt 0 view .LVU49 255 0000 30B5 push {r4, r5, lr} 256 .LCFI2: 257 .cfi_def_cfa_offset 12 258 .cfi_offset 4, -12 259 .cfi_offset 5, -8 260 .cfi_offset 14, -4 261 0002 83B0 sub sp, sp, #12 262 .LCFI3: 263 .cfi_def_cfa_offset 24 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U; 264 .loc 1 290 3 is_stmt 1 view .LVU50 265 .LVL11: 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); 266 .loc 1 292 3 view .LVU51 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable PWR RCC Clock Peripheral */ 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 267 .loc 1 295 3 view .LVU52 268 .LBB2: 269 .loc 1 295 3 view .LVU53 270 0004 0023 movs r3, #0 271 0006 0093 str r3, [sp] 272 .loc 1 295 3 view .LVU54 273 0008 2A4B ldr r3, .L44 274 000a 1A6C ldr r2, [r3, #64] 275 000c 42F08052 orr r2, r2, #268435456 276 0010 1A64 str r2, [r3, #64] 277 .loc 1 295 3 view .LVU55 278 0012 1A6C ldr r2, [r3, #64] 279 0014 02F08052 and r2, r2, #268435456 280 0018 0092 str r2, [sp] 281 .loc 1 295 3 view .LVU56 282 001a 009A ldr r2, [sp] 283 .LBE2: 284 .loc 1 295 3 view .LVU57 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Check if the PLL is used as system clock or not */ ARM GAS /tmp/cciRL9JN.s page 11 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 285 .loc 1 298 3 view .LVU58 286 .loc 1 298 6 is_stmt 0 view .LVU59 287 001c 9B68 ldr r3, [r3, #8] 288 001e 03F00C03 and r3, r3, #12 289 .loc 1 298 5 view .LVU60 290 0022 082B cmp r3, #8 291 0024 43D0 beq .L36 292 0026 0546 mov r5, r0 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Disable the main PLL */ 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PLL_DISABLE(); 293 .loc 1 301 5 is_stmt 1 view .LVU61 294 0028 234B ldr r3, .L44+4 295 002a 0022 movs r2, #0 296 002c 1A66 str r2, [r3, #96] 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get Start Tick */ 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 297 .loc 1 304 5 view .LVU62 298 .loc 1 304 17 is_stmt 0 view .LVU63 299 002e FFF7FEFF bl HAL_GetTick 300 .LVL12: 301 .loc 1 304 17 view .LVU64 302 0032 0446 mov r4, r0 303 .LVL13: 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till PLL is disabled */ 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 304 .loc 1 306 5 is_stmt 1 view .LVU65 305 .L30: 306 .loc 1 306 47 view .LVU66 307 .loc 1 306 11 is_stmt 0 view .LVU67 308 0034 1F4B ldr r3, .L44 309 0036 1B68 ldr r3, [r3] 310 .loc 1 306 47 view .LVU68 311 0038 13F0007F tst r3, #33554432 312 003c 06D0 beq .L41 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 313 .loc 1 308 7 is_stmt 1 view .LVU69 314 .loc 1 308 11 is_stmt 0 view .LVU70 315 003e FFF7FEFF bl HAL_GetTick 316 .LVL14: 317 .loc 1 308 25 discriminator 1 view .LVU71 318 0042 031B subs r3, r0, r4 319 .loc 1 308 9 discriminator 1 view .LVU72 320 0044 022B cmp r3, #2 321 0046 F5D9 bls .L30 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 322 .loc 1 310 16 view .LVU73 323 0048 0320 movs r0, #3 324 004a 31E0 b .L29 325 .L41: 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ARM GAS /tmp/cciRL9JN.s page 12 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Set Range */ 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); 326 .loc 1 315 5 is_stmt 1 view .LVU74 327 .LBB3: 328 .loc 1 315 5 view .LVU75 329 004c 0023 movs r3, #0 330 004e 0193 str r3, [sp, #4] 331 .loc 1 315 5 view .LVU76 332 0050 1A4A ldr r2, .L44+8 333 0052 1368 ldr r3, [r2] 334 0054 23F44043 bic r3, r3, #49152 335 0058 2B43 orrs r3, r3, r5 336 005a 1360 str r3, [r2] 337 .loc 1 315 5 view .LVU77 338 005c 1368 ldr r3, [r2] 339 005e 03F44043 and r3, r3, #49152 340 0062 0193 str r3, [sp, #4] 341 .loc 1 315 5 view .LVU78 342 0064 019B ldr r3, [sp, #4] 343 .LBE3: 344 .loc 1 315 5 view .LVU79 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable the main PLL */ 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PLL_ENABLE(); 345 .loc 1 318 5 view .LVU80 346 0066 144B ldr r3, .L44+4 347 0068 0122 movs r2, #1 348 006a 1A66 str r2, [r3, #96] 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get Start Tick */ 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 349 .loc 1 321 5 view .LVU81 350 .loc 1 321 17 is_stmt 0 view .LVU82 351 006c FFF7FEFF bl HAL_GetTick 352 .LVL15: 353 0070 0446 mov r4, r0 354 .LVL16: 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till PLL is ready */ 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 355 .loc 1 323 5 is_stmt 1 view .LVU83 356 .L32: 357 .loc 1 323 47 view .LVU84 358 .loc 1 323 11 is_stmt 0 view .LVU85 359 0072 104B ldr r3, .L44 360 0074 1B68 ldr r3, [r3] 361 .loc 1 323 47 view .LVU86 362 0076 13F0007F tst r3, #33554432 363 007a 06D1 bne .L42 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 364 .loc 1 325 7 is_stmt 1 view .LVU87 365 .loc 1 325 11 is_stmt 0 view .LVU88 366 007c FFF7FEFF bl HAL_GetTick 367 .LVL17: 368 .loc 1 325 25 discriminator 1 view .LVU89 369 0080 001B subs r0, r0, r4 370 .loc 1 325 9 discriminator 1 view .LVU90 ARM GAS /tmp/cciRL9JN.s page 13 371 0082 0228 cmp r0, #2 372 0084 F5D9 bls .L32 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 373 .loc 1 327 16 view .LVU91 374 0086 0320 movs r0, #3 375 0088 12E0 b .L29 376 .L42: 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get Start Tick */ 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 377 .loc 1 332 5 is_stmt 1 view .LVU92 378 .loc 1 332 17 is_stmt 0 view .LVU93 379 008a FFF7FEFF bl HAL_GetTick 380 .LVL18: 381 008e 0446 mov r4, r0 382 .LVL19: 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) 383 .loc 1 333 5 is_stmt 1 view .LVU94 384 .L34: 385 .loc 1 333 48 view .LVU95 386 .loc 1 333 12 is_stmt 0 view .LVU96 387 0090 0A4B ldr r3, .L44+8 388 0092 5B68 ldr r3, [r3, #4] 389 .loc 1 333 48 view .LVU97 390 0094 13F4804F tst r3, #16384 391 0098 07D1 bne .L43 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) 392 .loc 1 335 7 is_stmt 1 view .LVU98 393 .loc 1 335 11 is_stmt 0 view .LVU99 394 009a FFF7FEFF bl HAL_GetTick 395 .LVL20: 396 .loc 1 335 25 discriminator 1 view .LVU100 397 009e 001B subs r0, r0, r4 398 .loc 1 335 9 discriminator 1 view .LVU101 399 00a0 B0F57A7F cmp r0, #1000 400 00a4 F4D9 bls .L34 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 401 .loc 1 337 16 view .LVU102 402 00a6 0320 movs r0, #3 403 00a8 02E0 b .L29 404 .L43: 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** else 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_ERROR; 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK; 405 .loc 1 346 10 view .LVU103 406 00aa 0020 movs r0, #0 ARM GAS /tmp/cciRL9JN.s page 14 407 00ac 00E0 b .L29 408 .LVL21: 409 .L36: 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 410 .loc 1 343 12 view .LVU104 411 00ae 0120 movs r0, #1 412 .LVL22: 413 .L29: 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 414 .loc 1 347 1 view .LVU105 415 00b0 03B0 add sp, sp, #12 416 .LCFI4: 417 .cfi_def_cfa_offset 12 418 @ sp needed 419 00b2 30BD pop {r4, r5, pc} 420 .L45: 421 .align 2 422 .L44: 423 00b4 00380240 .word 1073887232 424 00b8 00004742 .word 1111949312 425 00bc 00700040 .word 1073770496 426 .cfi_endproc 427 .LFE244: 429 .section .text.HAL_PWREx_EnableOverDrive,"ax",%progbits 430 .align 1 431 .global HAL_PWREx_EnableOverDrive 432 .syntax unified 433 .thumb 434 .thumb_func 436 HAL_PWREx_EnableOverDrive: 437 .LFB245: 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** defined(STM32F413xx) || defined(STM32F423xx) 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables Main Regulator low voltage mode. 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F41 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * STM32F413xx/STM32F423xx devices. 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableMainRegulatorLowVoltage(void) 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)ENABLE; 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables Main Regulator low voltage mode. 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F41 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * STM32F413xx/STM32F423xxdevices. 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableMainRegulatorLowVoltage(void) 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE; 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } ARM GAS /tmp/cciRL9JN.s page 15 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables Low Power Regulator low voltage mode. 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F41 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * STM32F413xx/STM32F423xx devices. 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableLowRegulatorLowVoltage(void) 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)ENABLE; 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables Low Power Regulator low voltage mode. 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F41 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * STM32F413xx/STM32F423xx devices. 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableLowRegulatorLowVoltage(void) 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE; 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Rx || 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** STM32F413xx || STM32F423xx */ 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Activates the Over-Drive mode. 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This mode allows the CPU and the core logic to operate at a higher frequency 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note It is recommended to enter or exit Over-drive mode when the application is not running 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * critical tasks and when the system clock source is either HSI or HSE. 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * During the Over-drive switch activation, no peripheral clocks should be enabled. 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * The peripheral clocks must be enabled once the Over-drive mode is activated. 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void) 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 438 .loc 1 414 1 is_stmt 1 view -0 439 .cfi_startproc 440 @ args = 0, pretend = 0, frame = 8 441 @ frame_needed = 0, uses_anonymous_args = 0 442 0000 10B5 push {r4, lr} 443 .LCFI5: 444 .cfi_def_cfa_offset 8 445 .cfi_offset 4, -8 446 .cfi_offset 14, -4 447 0002 82B0 sub sp, sp, #8 448 .LCFI6: 449 .cfi_def_cfa_offset 16 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U; 450 .loc 1 415 3 view .LVU107 451 .LVL23: 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ARM GAS /tmp/cciRL9JN.s page 16 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 452 .loc 1 417 3 view .LVU108 453 .LBB4: 454 .loc 1 417 3 view .LVU109 455 0004 0023 movs r3, #0 456 0006 0193 str r3, [sp, #4] 457 .loc 1 417 3 view .LVU110 458 0008 194B ldr r3, .L57 459 000a 1A6C ldr r2, [r3, #64] 460 000c 42F08052 orr r2, r2, #268435456 461 0010 1A64 str r2, [r3, #64] 462 .loc 1 417 3 view .LVU111 463 0012 1B6C ldr r3, [r3, #64] 464 0014 03F08053 and r3, r3, #268435456 465 0018 0193 str r3, [sp, #4] 466 .loc 1 417 3 view .LVU112 467 001a 019B ldr r3, [sp, #4] 468 .LBE4: 469 .loc 1 417 3 view .LVU113 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable the Over-drive to extend the clock frequency to 180 Mhz */ 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVE_ENABLE(); 470 .loc 1 420 3 view .LVU114 471 001c 154B ldr r3, .L57+4 472 001e 0122 movs r2, #1 473 0020 1A64 str r2, [r3, #64] 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */ 423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 474 .loc 1 423 3 view .LVU115 475 .loc 1 423 15 is_stmt 0 view .LVU116 476 0022 FFF7FEFF bl HAL_GetTick 477 .LVL24: 478 0026 0446 mov r4, r0 479 .LVL25: 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 480 .loc 1 425 3 is_stmt 1 view .LVU117 481 .L47: 482 .loc 1 425 9 view .LVU118 483 .loc 1 425 10 is_stmt 0 view .LVU119 484 0028 134B ldr r3, .L57+8 485 002a 5B68 ldr r3, [r3, #4] 486 .loc 1 425 9 view .LVU120 487 002c 13F4803F tst r3, #65536 488 0030 08D1 bne .L55 426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE) 489 .loc 1 427 5 is_stmt 1 view .LVU121 490 .loc 1 427 9 is_stmt 0 view .LVU122 491 0032 FFF7FEFF bl HAL_GetTick 492 .LVL26: 493 .loc 1 427 23 discriminator 1 view .LVU123 494 0036 001B subs r0, r0, r4 495 .loc 1 427 7 discriminator 1 view .LVU124 496 0038 B0F57A7F cmp r0, #1000 497 003c F4D9 bls .L47 ARM GAS /tmp/cciRL9JN.s page 17 428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 498 .loc 1 429 14 view .LVU125 499 003e 0320 movs r0, #3 500 .L48: 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable the Over-drive switch */ 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); 435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */ 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK; 447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 501 .loc 1 447 1 view .LVU126 502 0040 02B0 add sp, sp, #8 503 .LCFI7: 504 .cfi_remember_state 505 .cfi_def_cfa_offset 8 506 @ sp needed 507 0042 10BD pop {r4, pc} 508 .LVL27: 509 .L55: 510 .LCFI8: 511 .cfi_restore_state 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 512 .loc 1 434 3 is_stmt 1 view .LVU127 513 0044 0B4B ldr r3, .L57+4 514 0046 0122 movs r2, #1 515 0048 5A64 str r2, [r3, #68] 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 516 .loc 1 437 3 view .LVU128 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 517 .loc 1 437 15 is_stmt 0 view .LVU129 518 004a FFF7FEFF bl HAL_GetTick 519 .LVL28: 520 004e 0446 mov r4, r0 521 .LVL29: 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 522 .loc 1 439 3 is_stmt 1 view .LVU130 523 .L50: 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 524 .loc 1 439 9 view .LVU131 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 525 .loc 1 439 10 is_stmt 0 view .LVU132 526 0050 094B ldr r3, .L57+8 527 0052 5B68 ldr r3, [r3, #4] 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { ARM GAS /tmp/cciRL9JN.s page 18 528 .loc 1 439 9 view .LVU133 529 0054 13F4003F tst r3, #131072 530 0058 07D1 bne .L56 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 531 .loc 1 441 5 is_stmt 1 view .LVU134 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 532 .loc 1 441 9 is_stmt 0 view .LVU135 533 005a FFF7FEFF bl HAL_GetTick 534 .LVL30: 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 535 .loc 1 441 23 discriminator 1 view .LVU136 536 005e 001B subs r0, r0, r4 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 537 .loc 1 441 7 discriminator 1 view .LVU137 538 0060 B0F57A7F cmp r0, #1000 539 0064 F4D9 bls .L50 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 540 .loc 1 443 14 view .LVU138 541 0066 0320 movs r0, #3 542 0068 EAE7 b .L48 543 .L56: 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 544 .loc 1 446 10 view .LVU139 545 006a 0020 movs r0, #0 546 006c E8E7 b .L48 547 .L58: 548 006e 00BF .align 2 549 .L57: 550 0070 00380240 .word 1073887232 551 0074 00000E42 .word 1108213760 552 0078 00700040 .word 1073770496 553 .cfi_endproc 554 .LFE245: 556 .section .text.HAL_PWREx_DisableOverDrive,"ax",%progbits 557 .align 1 558 .global HAL_PWREx_DisableOverDrive 559 .syntax unified 560 .thumb 561 .thumb_func 563 HAL_PWREx_DisableOverDrive: 564 .LFB246: 448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Deactivates the Over-Drive mode. 451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F 452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This mode allows the CPU and the core logic to operate at a higher frequency 453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). 454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note It is recommended to enter or exit Over-drive mode when the application is not running 455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * critical tasks and when the system clock source is either HSI or HSE. 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * During the Over-drive switch activation, no peripheral clocks should be enabled. 457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * The peripheral clocks must be enabled once the Over-drive mode is activated. 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status 459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void) 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 565 .loc 1 461 1 is_stmt 1 view -0 566 .cfi_startproc ARM GAS /tmp/cciRL9JN.s page 19 567 @ args = 0, pretend = 0, frame = 8 568 @ frame_needed = 0, uses_anonymous_args = 0 569 0000 10B5 push {r4, lr} 570 .LCFI9: 571 .cfi_def_cfa_offset 8 572 .cfi_offset 4, -8 573 .cfi_offset 14, -4 574 0002 82B0 sub sp, sp, #8 575 .LCFI10: 576 .cfi_def_cfa_offset 16 462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U; 577 .loc 1 462 3 view .LVU141 578 .LVL31: 463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 579 .loc 1 464 3 view .LVU142 580 .LBB5: 581 .loc 1 464 3 view .LVU143 582 0004 0021 movs r1, #0 583 0006 0191 str r1, [sp, #4] 584 .loc 1 464 3 view .LVU144 585 0008 184B ldr r3, .L70 586 000a 1A6C ldr r2, [r3, #64] 587 000c 42F08052 orr r2, r2, #268435456 588 0010 1A64 str r2, [r3, #64] 589 .loc 1 464 3 view .LVU145 590 0012 1B6C ldr r3, [r3, #64] 591 0014 03F08053 and r3, r3, #268435456 592 0018 0193 str r3, [sp, #4] 593 .loc 1 464 3 view .LVU146 594 001a 019B ldr r3, [sp, #4] 595 .LBE5: 596 .loc 1 464 3 view .LVU147 465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Disable the Over-drive switch */ 467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVESWITCHING_DISABLE(); 597 .loc 1 467 3 view .LVU148 598 001c 144B ldr r3, .L70+4 599 001e 5964 str r1, [r3, #68] 468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */ 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 600 .loc 1 470 3 view .LVU149 601 .loc 1 470 15 is_stmt 0 view .LVU150 602 0020 FFF7FEFF bl HAL_GetTick 603 .LVL32: 604 0024 0446 mov r4, r0 605 .LVL33: 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 606 .loc 1 472 3 is_stmt 1 view .LVU151 607 .L60: 608 .loc 1 472 9 view .LVU152 609 0026 134B ldr r3, .L70+8 610 0028 5B68 ldr r3, [r3, #4] 611 002a 13F4003F tst r3, #131072 612 002e 08D0 beq .L68 ARM GAS /tmp/cciRL9JN.s page 20 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE) 613 .loc 1 474 5 view .LVU153 614 .loc 1 474 9 is_stmt 0 view .LVU154 615 0030 FFF7FEFF bl HAL_GetTick 616 .LVL34: 617 .loc 1 474 23 discriminator 1 view .LVU155 618 0034 001B subs r0, r0, r4 619 .loc 1 474 7 discriminator 1 view .LVU156 620 0036 B0F57A7F cmp r0, #1000 621 003a F4D9 bls .L60 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 622 .loc 1 476 14 view .LVU157 623 003c 0320 movs r0, #3 624 .L61: 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Disable the Over-drive */ 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_OVERDRIVE_DISABLE(); 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */ 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE) 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK; 495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 625 .loc 1 495 1 view .LVU158 626 003e 02B0 add sp, sp, #8 627 .LCFI11: 628 .cfi_remember_state 629 .cfi_def_cfa_offset 8 630 @ sp needed 631 0040 10BD pop {r4, pc} 632 .LVL35: 633 .L68: 634 .LCFI12: 635 .cfi_restore_state 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 636 .loc 1 481 3 is_stmt 1 view .LVU159 637 0042 0B4B ldr r3, .L70+4 638 0044 0022 movs r2, #0 639 0046 1A64 str r2, [r3, #64] 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 640 .loc 1 484 3 view .LVU160 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 641 .loc 1 484 15 is_stmt 0 view .LVU161 642 0048 FFF7FEFF bl HAL_GetTick 643 .LVL36: ARM GAS /tmp/cciRL9JN.s page 21 644 004c 0446 mov r4, r0 645 .LVL37: 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 646 .loc 1 486 3 is_stmt 1 view .LVU162 647 .L63: 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 648 .loc 1 486 9 view .LVU163 649 004e 094B ldr r3, .L70+8 650 0050 5B68 ldr r3, [r3, #4] 651 0052 13F4803F tst r3, #65536 652 0056 07D0 beq .L69 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 653 .loc 1 488 5 view .LVU164 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 654 .loc 1 488 9 is_stmt 0 view .LVU165 655 0058 FFF7FEFF bl HAL_GetTick 656 .LVL38: 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 657 .loc 1 488 23 discriminator 1 view .LVU166 658 005c 001B subs r0, r0, r4 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 659 .loc 1 488 7 discriminator 1 view .LVU167 660 005e B0F57A7F cmp r0, #1000 661 0062 F4D9 bls .L63 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 662 .loc 1 490 14 view .LVU168 663 0064 0320 movs r0, #3 664 0066 EAE7 b .L61 665 .L69: 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 666 .loc 1 494 10 view .LVU169 667 0068 0020 movs r0, #0 668 006a E8E7 b .L61 669 .L71: 670 .align 2 671 .L70: 672 006c 00380240 .word 1073887232 673 0070 00000E42 .word 1108213760 674 0074 00700040 .word 1073770496 675 .cfi_endproc 676 .LFE246: 678 .section .text.HAL_PWREx_EnterUnderDriveSTOPMode,"ax",%progbits 679 .align 1 680 .global HAL_PWREx_EnterUnderDriveSTOPMode 681 .syntax unified 682 .thumb 683 .thumb_func 685 HAL_PWREx_EnterUnderDriveSTOPMode: 686 .LVL39: 687 .LFB247: 496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enters in Under-Drive STOP mode. 499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This mode is only available for STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F4 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This mode can be selected only when the Under-Drive is already active ARM GAS /tmp/cciRL9JN.s page 22 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note This mode is enabled only with STOP low power mode. 505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * In this mode, the 1.2V domain is preserved in reduced leakage mode. This 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * mode is only available when the main regulator or the low power regulator 507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * is in low voltage mode 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note If the Under-drive mode was enabled, it is automatically disabled after 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * exiting Stop mode. 511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * When the voltage regulator operates in Under-drive mode, an additional 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * startup delay is induced when waking up from Stop mode. 513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note When exiting Stop mode by issuing an interrupt or a wake-up event, 517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock. 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note When the voltage regulator operates in low power mode, an additional 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * startup delay is incurred when waking up from Stop mode. 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * By keeping the internal regulator ON during Stop mode, the consumption 522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * is higher although the startup time is reduced. 523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * 524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @param Regulator specifies the regulator state in STOP mode. 525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode 527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * and Flash memory in power-down when the device is in Stop under-drive mode 528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode 529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * and Flash memory in power-down when the device is in Stop under-drive mode 530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction. 531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */ 536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry) 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 688 .loc 1 537 1 is_stmt 1 view -0 689 .cfi_startproc 690 @ args = 0, pretend = 0, frame = 8 691 @ frame_needed = 0, uses_anonymous_args = 0 692 @ link register save eliminated. 693 .loc 1 537 1 is_stmt 0 view .LVU171 694 0000 82B0 sub sp, sp, #8 695 .LCFI13: 696 .cfi_def_cfa_offset 8 538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tmpreg1 = 0U; 697 .loc 1 538 3 is_stmt 1 view .LVU172 698 .LVL40: 539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Check the parameters */ 541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator)); 699 .loc 1 541 3 view .LVU173 542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); 700 .loc 1 542 3 view .LVU174 543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable Power ctrl clock */ 545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 701 .loc 1 545 3 view .LVU175 ARM GAS /tmp/cciRL9JN.s page 23 702 .LBB6: 703 .loc 1 545 3 view .LVU176 704 0002 0023 movs r3, #0 705 0004 0193 str r3, [sp, #4] 706 .loc 1 545 3 view .LVU177 707 0006 164B ldr r3, .L77 708 0008 1A6C ldr r2, [r3, #64] 709 000a 42F08052 orr r2, r2, #268435456 710 000e 1A64 str r2, [r3, #64] 711 .loc 1 545 3 view .LVU178 712 0010 1B6C ldr r3, [r3, #64] 713 0012 03F08053 and r3, r3, #268435456 714 0016 0193 str r3, [sp, #4] 715 .loc 1 545 3 view .LVU179 716 0018 019B ldr r3, [sp, #4] 717 .LBE6: 718 .loc 1 545 3 view .LVU180 546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable the Under-drive Mode ---------------------------------------------*/ 547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Clear Under-drive flag */ 548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_CLEAR_ODRUDR_FLAG(); 719 .loc 1 548 3 view .LVU181 720 001a 124A ldr r2, .L77+4 721 001c 5368 ldr r3, [r2, #4] 722 001e 43F44023 orr r3, r3, #786432 723 0022 5360 str r3, [r2, #4] 549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable the Under-drive */ 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_UNDERDRIVE_ENABLE(); 724 .loc 1 551 3 view .LVU182 725 0024 1368 ldr r3, [r2] 726 0026 43F44023 orr r3, r3, #786432 727 002a 1360 str r3, [r2] 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Select the regulator state in STOP mode ---------------------------------*/ 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tmpreg1 = PWR->CR; 728 .loc 1 554 3 view .LVU183 729 .loc 1 554 11 is_stmt 0 view .LVU184 730 002c 1368 ldr r3, [r2] 731 .LVL41: 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */ 556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tmpreg1 &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_MRUDS); 732 .loc 1 556 3 is_stmt 1 view .LVU185 733 .loc 1 556 11 is_stmt 0 view .LVU186 734 002e 23F44063 bic r3, r3, #3072 735 .LVL42: 736 .loc 1 556 11 view .LVU187 737 0032 23F00303 bic r3, r3, #3 738 .LVL43: 557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */ 559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tmpreg1 |= Regulator; 739 .loc 1 559 3 is_stmt 1 view .LVU188 740 .loc 1 559 11 is_stmt 0 view .LVU189 741 0036 0343 orrs r3, r3, r0 742 .LVL44: 560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Store the new value */ ARM GAS /tmp/cciRL9JN.s page 24 562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** PWR->CR = tmpreg1; 743 .loc 1 562 3 is_stmt 1 view .LVU190 744 .loc 1 562 11 is_stmt 0 view .LVU191 745 0038 1360 str r3, [r2] 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ 565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; 746 .loc 1 565 3 is_stmt 1 view .LVU192 747 .loc 1 565 6 is_stmt 0 view .LVU193 748 003a 0B4A ldr r2, .L77+8 749 003c 1369 ldr r3, [r2, #16] 750 .LVL45: 751 .loc 1 565 12 view .LVU194 752 003e 43F00403 orr r3, r3, #4 753 0042 1361 str r3, [r2, #16] 754 .LVL46: 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Select STOP mode entry --------------------------------------------------*/ 568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if(STOPEntry == PWR_SLEEPENTRY_WFI) 755 .loc 1 568 3 is_stmt 1 view .LVU195 756 .loc 1 568 5 is_stmt 0 view .LVU196 757 0044 0129 cmp r1, #1 758 0046 08D0 beq .L76 569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */ 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __WFI(); 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** else 574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** { 575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Request Wait For Event */ 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __WFE(); 759 .loc 1 576 5 is_stmt 1 view .LVU197 760 .syntax unified 761 @ 576 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c" 1 762 0048 20BF wfe 763 @ 0 "" 2 764 .thumb 765 .syntax unified 766 .L74: 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ 579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); 767 .loc 1 579 3 view .LVU198 768 .loc 1 579 6 is_stmt 0 view .LVU199 769 004a 074A ldr r2, .L77+8 770 004c 1369 ldr r3, [r2, #16] 771 .loc 1 579 12 view .LVU200 772 004e 23F00403 bic r3, r3, #4 773 0052 1361 str r3, [r2, #16] 580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK; 774 .loc 1 581 3 is_stmt 1 view .LVU201 582:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 775 .loc 1 582 1 is_stmt 0 view .LVU202 776 0054 0020 movs r0, #0 777 .LVL47: 778 .loc 1 582 1 view .LVU203 ARM GAS /tmp/cciRL9JN.s page 25 779 0056 02B0 add sp, sp, #8 780 .LCFI14: 781 .cfi_remember_state 782 .cfi_def_cfa_offset 0 783 @ sp needed 784 0058 7047 bx lr 785 .LVL48: 786 .L76: 787 .LCFI15: 788 .cfi_restore_state 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** } 789 .loc 1 571 5 is_stmt 1 view .LVU204 790 .syntax unified 791 @ 571 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c" 1 792 005a 30BF wfi 793 @ 0 "" 2 794 .thumb 795 .syntax unified 796 005c F5E7 b .L74 797 .L78: 798 005e 00BF .align 2 799 .L77: 800 0060 00380240 .word 1073887232 801 0064 00700040 .word 1073770496 802 0068 00ED00E0 .word -536810240 803 .cfi_endproc 804 .LFE247: 806 .text 807 .Letext0: 808 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 809 .file 3 "Drivers/CMSIS/Include/core_cm4.h" 810 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" 811 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 812 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 813 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" ARM GAS /tmp/cciRL9JN.s page 26 DEFINED SYMBOLS *ABS*:00000000 stm32f4xx_hal_pwr_ex.c /tmp/cciRL9JN.s:21 .text.HAL_PWREx_EnableBkUpReg:00000000 $t /tmp/cciRL9JN.s:27 .text.HAL_PWREx_EnableBkUpReg:00000000 HAL_PWREx_EnableBkUpReg /tmp/cciRL9JN.s:83 .text.HAL_PWREx_EnableBkUpReg:00000030 $d /tmp/cciRL9JN.s:89 .text.HAL_PWREx_DisableBkUpReg:00000000 $t /tmp/cciRL9JN.s:95 .text.HAL_PWREx_DisableBkUpReg:00000000 HAL_PWREx_DisableBkUpReg /tmp/cciRL9JN.s:151 .text.HAL_PWREx_DisableBkUpReg:00000030 $d /tmp/cciRL9JN.s:157 .text.HAL_PWREx_EnableFlashPowerDown:00000000 $t /tmp/cciRL9JN.s:163 .text.HAL_PWREx_EnableFlashPowerDown:00000000 HAL_PWREx_EnableFlashPowerDown /tmp/cciRL9JN.s:180 .text.HAL_PWREx_EnableFlashPowerDown:00000008 $d /tmp/cciRL9JN.s:185 .text.HAL_PWREx_DisableFlashPowerDown:00000000 $t /tmp/cciRL9JN.s:191 .text.HAL_PWREx_DisableFlashPowerDown:00000000 HAL_PWREx_DisableFlashPowerDown /tmp/cciRL9JN.s:208 .text.HAL_PWREx_DisableFlashPowerDown:00000008 $d /tmp/cciRL9JN.s:213 .text.HAL_PWREx_GetVoltageRange:00000000 $t /tmp/cciRL9JN.s:219 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange /tmp/cciRL9JN.s:236 .text.HAL_PWREx_GetVoltageRange:0000000c $d /tmp/cciRL9JN.s:241 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t /tmp/cciRL9JN.s:247 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling /tmp/cciRL9JN.s:423 .text.HAL_PWREx_ControlVoltageScaling:000000b4 $d /tmp/cciRL9JN.s:430 .text.HAL_PWREx_EnableOverDrive:00000000 $t /tmp/cciRL9JN.s:436 .text.HAL_PWREx_EnableOverDrive:00000000 HAL_PWREx_EnableOverDrive /tmp/cciRL9JN.s:550 .text.HAL_PWREx_EnableOverDrive:00000070 $d /tmp/cciRL9JN.s:557 .text.HAL_PWREx_DisableOverDrive:00000000 $t /tmp/cciRL9JN.s:563 .text.HAL_PWREx_DisableOverDrive:00000000 HAL_PWREx_DisableOverDrive /tmp/cciRL9JN.s:672 .text.HAL_PWREx_DisableOverDrive:0000006c $d /tmp/cciRL9JN.s:679 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 $t /tmp/cciRL9JN.s:685 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 HAL_PWREx_EnterUnderDriveSTOPMode /tmp/cciRL9JN.s:800 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000060 $d UNDEFINED SYMBOLS HAL_GetTick