ARM GAS /tmp/ccbK0WkT.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_hal_msp.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/stm32f4xx_hal_msp.c" 20 .section .text.HAL_MspInit,"ax",%progbits 21 .align 1 22 .global HAL_MspInit 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_MspInit: 28 .LFB239: 1:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f4xx_hal_msp.c **** /** 3:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 4:Core/Src/stm32f4xx_hal_msp.c **** * @file stm32f4xx_hal_msp.c 5:Core/Src/stm32f4xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Core/Src/stm32f4xx_hal_msp.c **** * and de-Initialization codes. 7:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 8:Core/Src/stm32f4xx_hal_msp.c **** * @attention 9:Core/Src/stm32f4xx_hal_msp.c **** * 10:Core/Src/stm32f4xx_hal_msp.c **** * Copyright (c) 2025 STMicroelectronics. 11:Core/Src/stm32f4xx_hal_msp.c **** * All rights reserved. 12:Core/Src/stm32f4xx_hal_msp.c **** * 13:Core/Src/stm32f4xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/stm32f4xx_hal_msp.c **** * in the root directory of this software component. 15:Core/Src/stm32f4xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/stm32f4xx_hal_msp.c **** * 17:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 18:Core/Src/stm32f4xx_hal_msp.c **** */ 19:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Header */ 20:Core/Src/stm32f4xx_hal_msp.c **** 21:Core/Src/stm32f4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/stm32f4xx_hal_msp.c **** #include "main.h" 23:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/stm32f4xx_hal_msp.c **** 25:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Includes */ 26:Core/Src/stm32f4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc1; 27:Core/Src/stm32f4xx_hal_msp.c **** 28:Core/Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 29:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */ 30:Core/Src/stm32f4xx_hal_msp.c **** ARM GAS /tmp/ccbK0WkT.s page 2 31:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */ 32:Core/Src/stm32f4xx_hal_msp.c **** 33:Core/Src/stm32f4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 34:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Define */ 35:Core/Src/stm32f4xx_hal_msp.c **** 36:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Define */ 37:Core/Src/stm32f4xx_hal_msp.c **** 38:Core/Src/stm32f4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 39:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 40:Core/Src/stm32f4xx_hal_msp.c **** 41:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Macro */ 42:Core/Src/stm32f4xx_hal_msp.c **** 43:Core/Src/stm32f4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 44:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PV */ 45:Core/Src/stm32f4xx_hal_msp.c **** 46:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PV */ 47:Core/Src/stm32f4xx_hal_msp.c **** 48:Core/Src/stm32f4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 49:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 50:Core/Src/stm32f4xx_hal_msp.c **** 51:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PFP */ 52:Core/Src/stm32f4xx_hal_msp.c **** 53:Core/Src/stm32f4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 54:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 55:Core/Src/stm32f4xx_hal_msp.c **** 56:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 57:Core/Src/stm32f4xx_hal_msp.c **** 58:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 59:Core/Src/stm32f4xx_hal_msp.c **** 60:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END 0 */ 61:Core/Src/stm32f4xx_hal_msp.c **** /** 62:Core/Src/stm32f4xx_hal_msp.c **** * Initializes the Global MSP. 63:Core/Src/stm32f4xx_hal_msp.c **** */ 64:Core/Src/stm32f4xx_hal_msp.c **** void HAL_MspInit(void) 65:Core/Src/stm32f4xx_hal_msp.c **** { 29 .loc 1 65 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 34 0000 82B0 sub sp, sp, #8 35 .LCFI0: 36 .cfi_def_cfa_offset 8 66:Core/Src/stm32f4xx_hal_msp.c **** 67:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 68:Core/Src/stm32f4xx_hal_msp.c **** 69:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 70:Core/Src/stm32f4xx_hal_msp.c **** 71:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 37 .loc 1 71 3 view .LVU1 38 .LBB2: 39 .loc 1 71 3 view .LVU2 40 0002 0021 movs r1, #0 41 0004 0091 str r1, [sp] 42 .loc 1 71 3 view .LVU3 43 0006 0B4B ldr r3, .L3 44 0008 5A6C ldr r2, [r3, #68] ARM GAS /tmp/ccbK0WkT.s page 3 45 000a 42F48042 orr r2, r2, #16384 46 000e 5A64 str r2, [r3, #68] 47 .loc 1 71 3 view .LVU4 48 0010 5A6C ldr r2, [r3, #68] 49 0012 02F48042 and r2, r2, #16384 50 0016 0092 str r2, [sp] 51 .loc 1 71 3 view .LVU5 52 0018 009A ldr r2, [sp] 53 .LBE2: 54 .loc 1 71 3 view .LVU6 72:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 55 .loc 1 72 3 view .LVU7 56 .LBB3: 57 .loc 1 72 3 view .LVU8 58 001a 0191 str r1, [sp, #4] 59 .loc 1 72 3 view .LVU9 60 001c 1A6C ldr r2, [r3, #64] 61 001e 42F08052 orr r2, r2, #268435456 62 0022 1A64 str r2, [r3, #64] 63 .loc 1 72 3 view .LVU10 64 0024 1B6C ldr r3, [r3, #64] 65 0026 03F08053 and r3, r3, #268435456 66 002a 0193 str r3, [sp, #4] 67 .loc 1 72 3 view .LVU11 68 002c 019B ldr r3, [sp, #4] 69 .LBE3: 70 .loc 1 72 3 view .LVU12 73:Core/Src/stm32f4xx_hal_msp.c **** 74:Core/Src/stm32f4xx_hal_msp.c **** /* System interrupt init*/ 75:Core/Src/stm32f4xx_hal_msp.c **** 76:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 77:Core/Src/stm32f4xx_hal_msp.c **** 78:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 79:Core/Src/stm32f4xx_hal_msp.c **** } 71 .loc 1 79 1 is_stmt 0 view .LVU13 72 002e 02B0 add sp, sp, #8 73 .LCFI1: 74 .cfi_def_cfa_offset 0 75 @ sp needed 76 0030 7047 bx lr 77 .L4: 78 0032 00BF .align 2 79 .L3: 80 0034 00380240 .word 1073887232 81 .cfi_endproc 82 .LFE239: 84 .section .text.HAL_ADC_MspInit,"ax",%progbits 85 .align 1 86 .global HAL_ADC_MspInit 87 .syntax unified 88 .thumb 89 .thumb_func 91 HAL_ADC_MspInit: 92 .LVL0: 93 .LFB240: 80:Core/Src/stm32f4xx_hal_msp.c **** 81:Core/Src/stm32f4xx_hal_msp.c **** /** ARM GAS /tmp/ccbK0WkT.s page 4 82:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP Initialization 83:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 84:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer 85:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 86:Core/Src/stm32f4xx_hal_msp.c **** */ 87:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 88:Core/Src/stm32f4xx_hal_msp.c **** { 94 .loc 1 88 1 is_stmt 1 view -0 95 .cfi_startproc 96 @ args = 0, pretend = 0, frame = 32 97 @ frame_needed = 0, uses_anonymous_args = 0 98 .loc 1 88 1 is_stmt 0 view .LVU15 99 0000 70B5 push {r4, r5, r6, lr} 100 .LCFI2: 101 .cfi_def_cfa_offset 16 102 .cfi_offset 4, -16 103 .cfi_offset 5, -12 104 .cfi_offset 6, -8 105 .cfi_offset 14, -4 106 0002 88B0 sub sp, sp, #32 107 .LCFI3: 108 .cfi_def_cfa_offset 48 89:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 109 .loc 1 89 3 is_stmt 1 view .LVU16 110 .loc 1 89 20 is_stmt 0 view .LVU17 111 0004 0023 movs r3, #0 112 0006 0393 str r3, [sp, #12] 113 0008 0493 str r3, [sp, #16] 114 000a 0593 str r3, [sp, #20] 115 000c 0693 str r3, [sp, #24] 116 000e 0793 str r3, [sp, #28] 90:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1) 117 .loc 1 90 3 is_stmt 1 view .LVU18 118 .loc 1 90 10 is_stmt 0 view .LVU19 119 0010 0268 ldr r2, [r0] 120 .loc 1 90 5 view .LVU20 121 0012 03F18043 add r3, r3, #1073741824 122 0016 03F59033 add r3, r3, #73728 123 001a 9A42 cmp r2, r3 124 001c 01D0 beq .L9 125 .LVL1: 126 .L5: 91:Core/Src/stm32f4xx_hal_msp.c **** { 92:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ 93:Core/Src/stm32f4xx_hal_msp.c **** 94:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ 95:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 96:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE(); 97:Core/Src/stm32f4xx_hal_msp.c **** 98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 99:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 100:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 101:Core/Src/stm32f4xx_hal_msp.c **** PC0 ------> ADC1_IN10 102:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3 103:Core/Src/stm32f4xx_hal_msp.c **** */ 104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0; 105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; ARM GAS /tmp/ccbK0WkT.s page 5 106:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 107:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 108:Core/Src/stm32f4xx_hal_msp.c **** 109:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3; 110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 111:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 112:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 113:Core/Src/stm32f4xx_hal_msp.c **** 114:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA Init */ 115:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 Init */ 116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Instance = DMA2_Stream0; 117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0; 118:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 119:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 120:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 121:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 125:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 126:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 127:Core/Src/stm32f4xx_hal_msp.c **** { 128:Core/Src/stm32f4xx_hal_msp.c **** Error_Handler(); 129:Core/Src/stm32f4xx_hal_msp.c **** } 130:Core/Src/stm32f4xx_hal_msp.c **** 131:Core/Src/stm32f4xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 132:Core/Src/stm32f4xx_hal_msp.c **** 133:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ 134:Core/Src/stm32f4xx_hal_msp.c **** 135:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ 136:Core/Src/stm32f4xx_hal_msp.c **** 137:Core/Src/stm32f4xx_hal_msp.c **** } 138:Core/Src/stm32f4xx_hal_msp.c **** 139:Core/Src/stm32f4xx_hal_msp.c **** } 127 .loc 1 139 1 view .LVU21 128 001e 08B0 add sp, sp, #32 129 .LCFI4: 130 .cfi_remember_state 131 .cfi_def_cfa_offset 16 132 @ sp needed 133 0020 70BD pop {r4, r5, r6, pc} 134 .LVL2: 135 .L9: 136 .LCFI5: 137 .cfi_restore_state 138 .loc 1 139 1 view .LVU22 139 0022 0446 mov r4, r0 96:Core/Src/stm32f4xx_hal_msp.c **** 140 .loc 1 96 5 is_stmt 1 view .LVU23 141 .LBB4: 96:Core/Src/stm32f4xx_hal_msp.c **** 142 .loc 1 96 5 view .LVU24 143 0024 0025 movs r5, #0 144 0026 0095 str r5, [sp] 96:Core/Src/stm32f4xx_hal_msp.c **** 145 .loc 1 96 5 view .LVU25 146 0028 03F58C33 add r3, r3, #71680 ARM GAS /tmp/ccbK0WkT.s page 6 147 002c 5A6C ldr r2, [r3, #68] 148 002e 42F48072 orr r2, r2, #256 149 0032 5A64 str r2, [r3, #68] 96:Core/Src/stm32f4xx_hal_msp.c **** 150 .loc 1 96 5 view .LVU26 151 0034 5A6C ldr r2, [r3, #68] 152 0036 02F48072 and r2, r2, #256 153 003a 0092 str r2, [sp] 96:Core/Src/stm32f4xx_hal_msp.c **** 154 .loc 1 96 5 view .LVU27 155 003c 009A ldr r2, [sp] 156 .LBE4: 96:Core/Src/stm32f4xx_hal_msp.c **** 157 .loc 1 96 5 view .LVU28 98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 158 .loc 1 98 5 view .LVU29 159 .LBB5: 98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 160 .loc 1 98 5 view .LVU30 161 003e 0195 str r5, [sp, #4] 98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 162 .loc 1 98 5 view .LVU31 163 0040 1A6B ldr r2, [r3, #48] 164 0042 42F00402 orr r2, r2, #4 165 0046 1A63 str r2, [r3, #48] 98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 166 .loc 1 98 5 view .LVU32 167 0048 1A6B ldr r2, [r3, #48] 168 004a 02F00402 and r2, r2, #4 169 004e 0192 str r2, [sp, #4] 98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 170 .loc 1 98 5 view .LVU33 171 0050 019A ldr r2, [sp, #4] 172 .LBE5: 98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 173 .loc 1 98 5 view .LVU34 99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 174 .loc 1 99 5 view .LVU35 175 .LBB6: 99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 176 .loc 1 99 5 view .LVU36 177 0052 0295 str r5, [sp, #8] 99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 178 .loc 1 99 5 view .LVU37 179 0054 1A6B ldr r2, [r3, #48] 180 0056 42F00102 orr r2, r2, #1 181 005a 1A63 str r2, [r3, #48] 99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 182 .loc 1 99 5 view .LVU38 183 005c 1B6B ldr r3, [r3, #48] 184 005e 03F00103 and r3, r3, #1 185 0062 0293 str r3, [sp, #8] 99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 186 .loc 1 99 5 view .LVU39 187 0064 029B ldr r3, [sp, #8] 188 .LBE6: 99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration ARM GAS /tmp/ccbK0WkT.s page 7 189 .loc 1 99 5 view .LVU40 104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 190 .loc 1 104 5 view .LVU41 104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 191 .loc 1 104 25 is_stmt 0 view .LVU42 192 0066 0123 movs r3, #1 193 0068 0393 str r3, [sp, #12] 105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 194 .loc 1 105 5 is_stmt 1 view .LVU43 105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 195 .loc 1 105 26 is_stmt 0 view .LVU44 196 006a 0326 movs r6, #3 197 006c 0496 str r6, [sp, #16] 106:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 198 .loc 1 106 5 is_stmt 1 view .LVU45 107:Core/Src/stm32f4xx_hal_msp.c **** 199 .loc 1 107 5 view .LVU46 200 006e 03A9 add r1, sp, #12 201 0070 1448 ldr r0, .L11 202 .LVL3: 107:Core/Src/stm32f4xx_hal_msp.c **** 203 .loc 1 107 5 is_stmt 0 view .LVU47 204 0072 FFF7FEFF bl HAL_GPIO_Init 205 .LVL4: 109:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 206 .loc 1 109 5 is_stmt 1 view .LVU48 109:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 207 .loc 1 109 25 is_stmt 0 view .LVU49 208 0076 0823 movs r3, #8 209 0078 0393 str r3, [sp, #12] 110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 210 .loc 1 110 5 is_stmt 1 view .LVU50 110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 211 .loc 1 110 26 is_stmt 0 view .LVU51 212 007a 0496 str r6, [sp, #16] 111:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 213 .loc 1 111 5 is_stmt 1 view .LVU52 111:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 214 .loc 1 111 26 is_stmt 0 view .LVU53 215 007c 0595 str r5, [sp, #20] 112:Core/Src/stm32f4xx_hal_msp.c **** 216 .loc 1 112 5 is_stmt 1 view .LVU54 217 007e 03A9 add r1, sp, #12 218 0080 1148 ldr r0, .L11+4 219 0082 FFF7FEFF bl HAL_GPIO_Init 220 .LVL5: 116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0; 221 .loc 1 116 5 view .LVU55 116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0; 222 .loc 1 116 24 is_stmt 0 view .LVU56 223 0086 1148 ldr r0, .L11+8 224 0088 114B ldr r3, .L11+12 225 008a 0360 str r3, [r0] 117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 226 .loc 1 117 5 is_stmt 1 view .LVU57 117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 227 .loc 1 117 28 is_stmt 0 view .LVU58 ARM GAS /tmp/ccbK0WkT.s page 8 228 008c 4560 str r5, [r0, #4] 118:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 229 .loc 1 118 5 is_stmt 1 view .LVU59 118:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 230 .loc 1 118 30 is_stmt 0 view .LVU60 231 008e 8560 str r5, [r0, #8] 119:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 232 .loc 1 119 5 is_stmt 1 view .LVU61 119:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 233 .loc 1 119 30 is_stmt 0 view .LVU62 234 0090 C560 str r5, [r0, #12] 120:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 235 .loc 1 120 5 is_stmt 1 view .LVU63 120:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 236 .loc 1 120 27 is_stmt 0 view .LVU64 237 0092 4FF48063 mov r3, #1024 238 0096 0361 str r3, [r0, #16] 121:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 239 .loc 1 121 5 is_stmt 1 view .LVU65 121:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 240 .loc 1 121 40 is_stmt 0 view .LVU66 241 0098 4FF40063 mov r3, #2048 242 009c 4361 str r3, [r0, #20] 122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 243 .loc 1 122 5 is_stmt 1 view .LVU67 122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 244 .loc 1 122 37 is_stmt 0 view .LVU68 245 009e 4FF40053 mov r3, #8192 246 00a2 8361 str r3, [r0, #24] 123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 247 .loc 1 123 5 is_stmt 1 view .LVU69 123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 248 .loc 1 123 25 is_stmt 0 view .LVU70 249 00a4 4FF48073 mov r3, #256 250 00a8 C361 str r3, [r0, #28] 124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 251 .loc 1 124 5 is_stmt 1 view .LVU71 124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 252 .loc 1 124 29 is_stmt 0 view .LVU72 253 00aa 0562 str r5, [r0, #32] 125:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 254 .loc 1 125 5 is_stmt 1 view .LVU73 125:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 255 .loc 1 125 29 is_stmt 0 view .LVU74 256 00ac 4562 str r5, [r0, #36] 126:Core/Src/stm32f4xx_hal_msp.c **** { 257 .loc 1 126 5 is_stmt 1 view .LVU75 126:Core/Src/stm32f4xx_hal_msp.c **** { 258 .loc 1 126 9 is_stmt 0 view .LVU76 259 00ae FFF7FEFF bl HAL_DMA_Init 260 .LVL6: 126:Core/Src/stm32f4xx_hal_msp.c **** { 261 .loc 1 126 8 discriminator 1 view .LVU77 262 00b2 18B9 cbnz r0, .L10 263 .L7: 131:Core/Src/stm32f4xx_hal_msp.c **** 264 .loc 1 131 5 is_stmt 1 view .LVU78 ARM GAS /tmp/ccbK0WkT.s page 9 131:Core/Src/stm32f4xx_hal_msp.c **** 265 .loc 1 131 5 view .LVU79 266 00b4 054B ldr r3, .L11+8 267 00b6 A363 str r3, [r4, #56] 131:Core/Src/stm32f4xx_hal_msp.c **** 268 .loc 1 131 5 view .LVU80 269 00b8 9C63 str r4, [r3, #56] 131:Core/Src/stm32f4xx_hal_msp.c **** 270 .loc 1 131 5 discriminator 1 view .LVU81 271 .loc 1 139 1 is_stmt 0 view .LVU82 272 00ba B0E7 b .L5 273 .L10: 128:Core/Src/stm32f4xx_hal_msp.c **** } 274 .loc 1 128 7 is_stmt 1 view .LVU83 275 00bc FFF7FEFF bl Error_Handler 276 .LVL7: 277 00c0 F8E7 b .L7 278 .L12: 279 00c2 00BF .align 2 280 .L11: 281 00c4 00080240 .word 1073874944 282 00c8 00000240 .word 1073872896 283 00cc 00000000 .word hdma_adc1 284 00d0 10640240 .word 1073898512 285 .cfi_endproc 286 .LFE240: 288 .section .text.HAL_ADC_MspDeInit,"ax",%progbits 289 .align 1 290 .global HAL_ADC_MspDeInit 291 .syntax unified 292 .thumb 293 .thumb_func 295 HAL_ADC_MspDeInit: 296 .LVL8: 297 .LFB241: 140:Core/Src/stm32f4xx_hal_msp.c **** 141:Core/Src/stm32f4xx_hal_msp.c **** /** 142:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP De-Initialization 143:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 144:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer 145:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 146:Core/Src/stm32f4xx_hal_msp.c **** */ 147:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) 148:Core/Src/stm32f4xx_hal_msp.c **** { 298 .loc 1 148 1 view -0 299 .cfi_startproc 300 @ args = 0, pretend = 0, frame = 0 301 @ frame_needed = 0, uses_anonymous_args = 0 149:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1) 302 .loc 1 149 3 view .LVU85 303 .loc 1 149 10 is_stmt 0 view .LVU86 304 0000 0268 ldr r2, [r0] 305 .loc 1 149 5 view .LVU87 306 0002 0B4B ldr r3, .L20 307 0004 9A42 cmp r2, r3 308 0006 00D0 beq .L19 309 0008 7047 bx lr ARM GAS /tmp/ccbK0WkT.s page 10 310 .L19: 148:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1) 311 .loc 1 148 1 view .LVU88 312 000a 10B5 push {r4, lr} 313 .LCFI6: 314 .cfi_def_cfa_offset 8 315 .cfi_offset 4, -8 316 .cfi_offset 14, -4 317 000c 0446 mov r4, r0 150:Core/Src/stm32f4xx_hal_msp.c **** { 151:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ 152:Core/Src/stm32f4xx_hal_msp.c **** 153:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ 154:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 155:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE(); 318 .loc 1 155 5 is_stmt 1 view .LVU89 319 000e 094A ldr r2, .L20+4 320 0010 536C ldr r3, [r2, #68] 321 0012 23F48073 bic r3, r3, #256 322 0016 5364 str r3, [r2, #68] 156:Core/Src/stm32f4xx_hal_msp.c **** 157:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 158:Core/Src/stm32f4xx_hal_msp.c **** PC0 ------> ADC1_IN10 159:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3 160:Core/Src/stm32f4xx_hal_msp.c **** */ 161:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0); 323 .loc 1 161 5 view .LVU90 324 0018 0121 movs r1, #1 325 001a 0748 ldr r0, .L20+8 326 .LVL9: 327 .loc 1 161 5 is_stmt 0 view .LVU91 328 001c FFF7FEFF bl HAL_GPIO_DeInit 329 .LVL10: 162:Core/Src/stm32f4xx_hal_msp.c **** 163:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3); 330 .loc 1 163 5 is_stmt 1 view .LVU92 331 0020 0821 movs r1, #8 332 0022 0648 ldr r0, .L20+12 333 0024 FFF7FEFF bl HAL_GPIO_DeInit 334 .LVL11: 164:Core/Src/stm32f4xx_hal_msp.c **** 165:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA DeInit */ 166:Core/Src/stm32f4xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle); 335 .loc 1 166 5 view .LVU93 336 0028 A06B ldr r0, [r4, #56] 337 002a FFF7FEFF bl HAL_DMA_DeInit 338 .LVL12: 167:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ 168:Core/Src/stm32f4xx_hal_msp.c **** 169:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ 170:Core/Src/stm32f4xx_hal_msp.c **** } 171:Core/Src/stm32f4xx_hal_msp.c **** 172:Core/Src/stm32f4xx_hal_msp.c **** } 339 .loc 1 172 1 is_stmt 0 view .LVU94 340 002e 10BD pop {r4, pc} 341 .LVL13: 342 .L21: ARM GAS /tmp/ccbK0WkT.s page 11 343 .loc 1 172 1 view .LVU95 344 .align 2 345 .L20: 346 0030 00200140 .word 1073815552 347 0034 00380240 .word 1073887232 348 0038 00080240 .word 1073874944 349 003c 00000240 .word 1073872896 350 .cfi_endproc 351 .LFE241: 353 .text 354 .Letext0: 355 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 356 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" 357 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 358 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 359 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 360 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" 361 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" 362 .file 9 "Core/Inc/main.h" ARM GAS /tmp/ccbK0WkT.s page 12 DEFINED SYMBOLS *ABS*:00000000 stm32f4xx_hal_msp.c /tmp/ccbK0WkT.s:21 .text.HAL_MspInit:00000000 $t /tmp/ccbK0WkT.s:27 .text.HAL_MspInit:00000000 HAL_MspInit /tmp/ccbK0WkT.s:80 .text.HAL_MspInit:00000034 $d /tmp/ccbK0WkT.s:85 .text.HAL_ADC_MspInit:00000000 $t /tmp/ccbK0WkT.s:91 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit /tmp/ccbK0WkT.s:281 .text.HAL_ADC_MspInit:000000c4 $d /tmp/ccbK0WkT.s:289 .text.HAL_ADC_MspDeInit:00000000 $t /tmp/ccbK0WkT.s:295 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit /tmp/ccbK0WkT.s:346 .text.HAL_ADC_MspDeInit:00000030 $d UNDEFINED SYMBOLS HAL_GPIO_Init HAL_DMA_Init Error_Handler hdma_adc1 HAL_GPIO_DeInit HAL_DMA_DeInit