diff --git a/Core/Src/main.c b/Core/Src/main.c index b6d433f..c91eedb 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -17,9 +17,9 @@ */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ -#include "main.h" -#include "usb_device.h" -#include "usbd_cdc_if.h" +#include "main.h" +#include "usb_device.h" +#include "usbd_cdc_if.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ @@ -60,16 +60,17 @@ static void MX_ADC1_Init(void); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ -/* ADC_proc/ADC_proc_shadow/Sweep_state definitions */ -volatile struct ADC_proc_typedef ADC_proc, ADC_proc_shadow; -volatile struct Sweep_state_typedef Sweep_state; -volatile uint32_t curr_step_start_N = 0; +/* ADC_proc/ADC_proc_shadow/Sweep_state definitions */ +volatile struct ADC_proc_typedef ADC_proc, ADC_proc_shadow; +volatile struct Sweep_state_typedef Sweep_state; +volatile uint32_t curr_step_start_N = 0; /* ADC1 circular DMA buffer definition */ uint16_t ADC1_buff_circular[ADC_BUFF_SIZE]; -char ADC_msg[] = "Received ADC value: ??????????\r\n"; +char ADC_msg[] = "curr_step ?????? ??????????\r\n"; #define ADC_msg_len 32 #define ADC_msg_val_pos 20 +#define ADC_msg_step_pos 12 /* USER CODE END 0 */ /** @@ -118,13 +119,16 @@ int main(void) ADC_proc.sum = 0; ADC_proc.avg = 0; + uint32_t curr_points_N_max = 100; + uint32_t curr_points_N =0; + /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { - HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + //HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); //HAL_Delay(100); if (ADC_proc_shadow.status == 2) { @@ -144,7 +148,24 @@ int main(void) ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + + ADC_msg[ADC_msg_step_pos + 0] = (Sweep_state.curr_step_N / 100000) % 10 + '0'; + ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + + CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); + //HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + + if (Sweep_state.curr_step_N > 1000){ + Sweep_state.curr_step_N = 0; + HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + HAL_DelayUS(10); + CDC_Transmit_FS((uint8_t *)"Sweep_start\n\r", 14); + } } //CDC_Transmit_FS((uint8_t *)"Hello from STM32!\r\n", 19); diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c index d2fc728..0116782 100644 --- a/Core/Src/stm32f4xx_it.c +++ b/Core/Src/stm32f4xx_it.c @@ -57,9 +57,9 @@ /* External variables --------------------------------------------------------*/ extern PCD_HandleTypeDef hpcd_USB_OTG_FS; extern DMA_HandleTypeDef hdma_adc1; -/* USER CODE BEGIN EV */ -/* Externs are provided via main.h; no extra declarations needed here */ -/* USER CODE END EV */ +/* USER CODE BEGIN EV */ +/* Externs are provided via main.h; no extra declarations needed here */ +/* USER CODE END EV */ /******************************************************************************/ /* Cortex-M4 Processor Interruption and Exception Handlers */ @@ -205,12 +205,13 @@ void SysTick_Handler(void) void EXTI0_IRQHandler(void) { /* USER CODE BEGIN EXTI0_IRQn 0 */ - Sweep_state.curr_step_start_DMA_N = ADC_BUFF_SIZE - hdma_adc1.Instance->NDTR; + Sweep_state.curr_step_start_DMA_N = ADC_BUFF_SIZE - hdma_adc1.Instance->NDTR; if (Sweep_state.curr_step_start_DMA_N < ADC_BUFF_SIZE/2) { Sweep_state.curr_step_started_flag =1; // first half DMA buffer } else{ Sweep_state.curr_step_started_flag =2; // second half DMA buffer } + Sweep_state.curr_step_N++; /* USER CODE END EXTI0_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(CURR_STEP_START_TRG_Pin); /* USER CODE BEGIN EXTI0_IRQn 1 */ @@ -267,6 +268,7 @@ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); if (Sweep_state.curr_step_started_flag == 2) { + Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) { ADC_proc.sum += ADC1_buff_circular[i]; } @@ -297,6 +299,8 @@ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) } ADC_proc.N += ADC_BUFF_SIZE - ADC_BUFF_SIZE/2; } + + //if (0){ if (ADC_proc.N >= ADC_BUFF_SIZE*100){ ADC_proc_shadow.sum = ADC_proc.sum; ADC_proc_shadow.avg = ADC_proc.avg; @@ -319,6 +323,7 @@ void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin); if (Sweep_state.curr_step_started_flag == 1) { + Sweep_state.curr_step_started_flag = 0; for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) { ADC_proc.sum += ADC1_buff_circular[i]; } diff --git a/build/main.lst b/build/main.lst index c7a20f6..f2f36a1 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc45044a.s page 1 +ARM GAS /tmp/ccUsVHhJ.s page 1 1 .cpu cortex-m4 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc45044a.s page 1 29:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ 30:Core/Src/main.c **** /* USER CODE BEGIN PTD */ 31:Core/Src/main.c **** - ARM GAS /tmp/cc45044a.s page 2 + ARM GAS /tmp/ccUsVHhJ.s page 2 32:Core/Src/main.c **** /* USER CODE END PTD */ @@ -99,228 +99,249 @@ ARM GAS /tmp/cc45044a.s page 1 67:Core/Src/main.c **** 68:Core/Src/main.c **** /* ADC1 circular DMA buffer definition */ 69:Core/Src/main.c **** uint16_t ADC1_buff_circular[ADC_BUFF_SIZE]; - 70:Core/Src/main.c **** char ADC_msg[] = "Received ADC value: ??????????\r\n"; + 70:Core/Src/main.c **** char ADC_msg[] = "curr_step ?????? ??????????\r\n"; 71:Core/Src/main.c **** #define ADC_msg_len 32 72:Core/Src/main.c **** #define ADC_msg_val_pos 20 - 73:Core/Src/main.c **** /* USER CODE END 0 */ - 74:Core/Src/main.c **** - 75:Core/Src/main.c **** /** - 76:Core/Src/main.c **** * @brief The application entry point. - 77:Core/Src/main.c **** * @retval int - 78:Core/Src/main.c **** */ - 79:Core/Src/main.c **** int main(void) - 80:Core/Src/main.c **** { - 81:Core/Src/main.c **** - 82:Core/Src/main.c **** /* USER CODE BEGIN 1 */ - 83:Core/Src/main.c **** - 84:Core/Src/main.c **** /* USER CODE END 1 */ - 85:Core/Src/main.c **** - 86:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ - 87:Core/Src/main.c **** - 88:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - ARM GAS /tmp/cc45044a.s page 3 + 73:Core/Src/main.c **** #define ADC_msg_step_pos 12 + 74:Core/Src/main.c **** /* USER CODE END 0 */ + 75:Core/Src/main.c **** + 76:Core/Src/main.c **** /** + 77:Core/Src/main.c **** * @brief The application entry point. + 78:Core/Src/main.c **** * @retval int + 79:Core/Src/main.c **** */ + 80:Core/Src/main.c **** int main(void) + 81:Core/Src/main.c **** { + 82:Core/Src/main.c **** + 83:Core/Src/main.c **** /* USER CODE BEGIN 1 */ + 84:Core/Src/main.c **** + 85:Core/Src/main.c **** /* USER CODE END 1 */ + 86:Core/Src/main.c **** + 87:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 88:Core/Src/main.c **** + ARM GAS /tmp/ccUsVHhJ.s page 3 - 89:Core/Src/main.c **** HAL_Init(); - 90:Core/Src/main.c **** - 91:Core/Src/main.c **** /* USER CODE BEGIN Init */ - 92:Core/Src/main.c **** - 93:Core/Src/main.c **** /* USER CODE END Init */ - 94:Core/Src/main.c **** - 95:Core/Src/main.c **** /* Configure the system clock */ - 96:Core/Src/main.c **** SystemClock_Config(); - 97:Core/Src/main.c **** - 98:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ - 99:Core/Src/main.c **** - 100:Core/Src/main.c **** /* USER CODE END SysInit */ - 101:Core/Src/main.c **** - 102:Core/Src/main.c **** /* Initialize all configured peripherals */ - 103:Core/Src/main.c **** MX_GPIO_Init(); - 104:Core/Src/main.c **** MX_DMA_Init(); - 105:Core/Src/main.c **** MX_ADC1_Init(); - 106:Core/Src/main.c **** MX_USB_DEVICE_Init(); - 107:Core/Src/main.c **** /* USER CODE BEGIN 2 */ - 108:Core/Src/main.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); - 109:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); - 110:Core/Src/main.c **** - 111:Core/Src/main.c **** ADC_proc_shadow.status = 0; // ADC started - 112:Core/Src/main.c **** ADC_proc_shadow.N = 0; - 113:Core/Src/main.c **** ADC_proc_shadow.sum = 0; - 114:Core/Src/main.c **** ADC_proc_shadow.avg = 0; - 115:Core/Src/main.c **** - 116:Core/Src/main.c **** ADC_proc.status = 0; // ADC started - 117:Core/Src/main.c **** ADC_proc.N = 0; - 118:Core/Src/main.c **** ADC_proc.sum = 0; - 119:Core/Src/main.c **** ADC_proc.avg = 0; - 120:Core/Src/main.c **** - 121:Core/Src/main.c **** /* USER CODE END 2 */ - 122:Core/Src/main.c **** - 123:Core/Src/main.c **** /* Infinite loop */ - 124:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ - 125:Core/Src/main.c **** while (1) - 126:Core/Src/main.c **** { - 127:Core/Src/main.c **** HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); - 128:Core/Src/main.c **** //HAL_Delay(100); - 129:Core/Src/main.c **** - 130:Core/Src/main.c **** if (ADC_proc_shadow.status == 2) { - 131:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; - 132:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation - 133:Core/Src/main.c **** ADC_proc_shadow.sum = 0; - 134:Core/Src/main.c **** ADC_proc_shadow.N = 0; - 135:Core/Src/main.c **** - 136:Core/Src/main.c **** - 137:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 0] = (ADC_proc_shadow.avg / 10000000000) % 10 + '0'; - 138:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; - 139:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; - 140:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; - 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; - 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; - 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; - 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; - 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; - ARM GAS /tmp/cc45044a.s page 4 + 89:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 90:Core/Src/main.c **** HAL_Init(); + 91:Core/Src/main.c **** + 92:Core/Src/main.c **** /* USER CODE BEGIN Init */ + 93:Core/Src/main.c **** + 94:Core/Src/main.c **** /* USER CODE END Init */ + 95:Core/Src/main.c **** + 96:Core/Src/main.c **** /* Configure the system clock */ + 97:Core/Src/main.c **** SystemClock_Config(); + 98:Core/Src/main.c **** + 99:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ + 100:Core/Src/main.c **** + 101:Core/Src/main.c **** /* USER CODE END SysInit */ + 102:Core/Src/main.c **** + 103:Core/Src/main.c **** /* Initialize all configured peripherals */ + 104:Core/Src/main.c **** MX_GPIO_Init(); + 105:Core/Src/main.c **** MX_DMA_Init(); + 106:Core/Src/main.c **** MX_ADC1_Init(); + 107:Core/Src/main.c **** MX_USB_DEVICE_Init(); + 108:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 109:Core/Src/main.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); + 110:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); + 111:Core/Src/main.c **** + 112:Core/Src/main.c **** ADC_proc_shadow.status = 0; // ADC started + 113:Core/Src/main.c **** ADC_proc_shadow.N = 0; + 114:Core/Src/main.c **** ADC_proc_shadow.sum = 0; + 115:Core/Src/main.c **** ADC_proc_shadow.avg = 0; + 116:Core/Src/main.c **** + 117:Core/Src/main.c **** ADC_proc.status = 0; // ADC started + 118:Core/Src/main.c **** ADC_proc.N = 0; + 119:Core/Src/main.c **** ADC_proc.sum = 0; + 120:Core/Src/main.c **** ADC_proc.avg = 0; + 121:Core/Src/main.c **** + 122:Core/Src/main.c **** uint32_t curr_points_N_max = 100; + 123:Core/Src/main.c **** uint32_t curr_points_N =0; + 124:Core/Src/main.c **** + 125:Core/Src/main.c **** /* USER CODE END 2 */ + 126:Core/Src/main.c **** + 127:Core/Src/main.c **** /* Infinite loop */ + 128:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ + 129:Core/Src/main.c **** while (1) + 130:Core/Src/main.c **** { + 131:Core/Src/main.c **** //HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + 132:Core/Src/main.c **** //HAL_Delay(100); + 133:Core/Src/main.c **** + 134:Core/Src/main.c **** if (ADC_proc_shadow.status == 2) { + 135:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; + 136:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation + 137:Core/Src/main.c **** ADC_proc_shadow.sum = 0; + 138:Core/Src/main.c **** ADC_proc_shadow.N = 0; + 139:Core/Src/main.c **** + 140:Core/Src/main.c **** + 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 0] = (ADC_proc_shadow.avg / 10000000000) % 10 + '0'; + 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; + 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; + 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; + 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; + ARM GAS /tmp/ccUsVHhJ.s page 4 - 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; - 147:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); - 148:Core/Src/main.c **** - 149:Core/Src/main.c **** } - 150:Core/Src/main.c **** //CDC_Transmit_FS((uint8_t *)"Hello from STM32!\r\n", 19); - 151:Core/Src/main.c **** - 152:Core/Src/main.c **** /* USER CODE END WHILE */ - 153:Core/Src/main.c **** - 154:Core/Src/main.c **** /* USER CODE BEGIN 3 */ - 155:Core/Src/main.c **** } - 156:Core/Src/main.c **** /* USER CODE END 3 */ - 157:Core/Src/main.c **** } - 158:Core/Src/main.c **** - 159:Core/Src/main.c **** /** - 160:Core/Src/main.c **** * @brief System Clock Configuration - 161:Core/Src/main.c **** * @retval None - 162:Core/Src/main.c **** */ - 163:Core/Src/main.c **** void SystemClock_Config(void) - 164:Core/Src/main.c **** { - 165:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 166:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 167:Core/Src/main.c **** - 168:Core/Src/main.c **** /** Configure the main internal regulator output voltage - 169:Core/Src/main.c **** */ - 170:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); - 171:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 172:Core/Src/main.c **** - 173:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters - 174:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. - 175:Core/Src/main.c **** */ - 176:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 177:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 178:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 179:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 180:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; - 181:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 182:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 183:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 184:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 185:Core/Src/main.c **** { - 186:Core/Src/main.c **** Error_Handler(); - 187:Core/Src/main.c **** } + 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; + 147:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; + 148:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; + 149:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; + 150:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + 151:Core/Src/main.c **** + 152:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 0] = (Sweep_state.curr_step_N / 100000) % 10 + '0'; + 153:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + 154:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + 155:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + 156:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + 157:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + 158:Core/Src/main.c **** + 159:Core/Src/main.c **** + 160:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); + 161:Core/Src/main.c **** //HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + 162:Core/Src/main.c **** + 163:Core/Src/main.c **** if (Sweep_state.curr_step_N > 1000){ + 164:Core/Src/main.c **** Sweep_state.curr_step_N = 0; + 165:Core/Src/main.c **** HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + 166:Core/Src/main.c **** HAL_DelayUS(10); + 167:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)"Sweep_start\n\r", 14); + 168:Core/Src/main.c **** } + 169:Core/Src/main.c **** + 170:Core/Src/main.c **** } + 171:Core/Src/main.c **** //CDC_Transmit_FS((uint8_t *)"Hello from STM32!\r\n", 19); + 172:Core/Src/main.c **** + 173:Core/Src/main.c **** /* USER CODE END WHILE */ + 174:Core/Src/main.c **** + 175:Core/Src/main.c **** /* USER CODE BEGIN 3 */ + 176:Core/Src/main.c **** } + 177:Core/Src/main.c **** /* USER CODE END 3 */ + 178:Core/Src/main.c **** } + 179:Core/Src/main.c **** + 180:Core/Src/main.c **** /** + 181:Core/Src/main.c **** * @brief System Clock Configuration + 182:Core/Src/main.c **** * @retval None + 183:Core/Src/main.c **** */ + 184:Core/Src/main.c **** void SystemClock_Config(void) + 185:Core/Src/main.c **** { + 186:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 187:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 188:Core/Src/main.c **** - 189:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 189:Core/Src/main.c **** /** Configure the main internal regulator output voltage 190:Core/Src/main.c **** */ - 191:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 192:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 193:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 194:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 195:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 196:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 197:Core/Src/main.c **** - 198:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) - 199:Core/Src/main.c **** { - 200:Core/Src/main.c **** Error_Handler(); - 201:Core/Src/main.c **** } - 202:Core/Src/main.c **** } - ARM GAS /tmp/cc45044a.s page 5 + 191:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 192:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 193:Core/Src/main.c **** + 194:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 195:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. + 196:Core/Src/main.c **** */ + 197:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + 198:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 199:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 200:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 201:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; + 202:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + ARM GAS /tmp/ccUsVHhJ.s page 5 - 203:Core/Src/main.c **** - 204:Core/Src/main.c **** /** - 205:Core/Src/main.c **** * @brief ADC1 Initialization Function - 206:Core/Src/main.c **** * @param None - 207:Core/Src/main.c **** * @retval None - 208:Core/Src/main.c **** */ - 209:Core/Src/main.c **** static void MX_ADC1_Init(void) - 210:Core/Src/main.c **** { - 211:Core/Src/main.c **** - 212:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ - 213:Core/Src/main.c **** - 214:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */ - 215:Core/Src/main.c **** - 216:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; - 217:Core/Src/main.c **** - 218:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ - 219:Core/Src/main.c **** - 220:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */ - 221:Core/Src/main.c **** - 222:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 223:Core/Src/main.c **** */ - 224:Core/Src/main.c **** hadc1.Instance = ADC1; - 225:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - 226:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 227:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; - 228:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 229:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 230:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - 231:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; - 232:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 233:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; - 234:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; - 235:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 236:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 237:Core/Src/main.c **** { - 238:Core/Src/main.c **** Error_Handler(); - 239:Core/Src/main.c **** } + 203:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 204:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 205:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 206:Core/Src/main.c **** { + 207:Core/Src/main.c **** Error_Handler(); + 208:Core/Src/main.c **** } + 209:Core/Src/main.c **** + 210:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 211:Core/Src/main.c **** */ + 212:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 213:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 214:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 215:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 216:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 217:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 218:Core/Src/main.c **** + 219:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) + 220:Core/Src/main.c **** { + 221:Core/Src/main.c **** Error_Handler(); + 222:Core/Src/main.c **** } + 223:Core/Src/main.c **** } + 224:Core/Src/main.c **** + 225:Core/Src/main.c **** /** + 226:Core/Src/main.c **** * @brief ADC1 Initialization Function + 227:Core/Src/main.c **** * @param None + 228:Core/Src/main.c **** * @retval None + 229:Core/Src/main.c **** */ + 230:Core/Src/main.c **** static void MX_ADC1_Init(void) + 231:Core/Src/main.c **** { + 232:Core/Src/main.c **** + 233:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ + 234:Core/Src/main.c **** + 235:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */ + 236:Core/Src/main.c **** + 237:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 238:Core/Src/main.c **** + 239:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ 240:Core/Src/main.c **** - 241:Core/Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 242:Core/Src/main.c **** */ - 243:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_3; - 244:Core/Src/main.c **** sConfig.Rank = 1; - 245:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; - 246:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 247:Core/Src/main.c **** { - 248:Core/Src/main.c **** Error_Handler(); - 249:Core/Src/main.c **** } - 250:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ - 251:Core/Src/main.c **** - 252:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */ - 253:Core/Src/main.c **** - 254:Core/Src/main.c **** } - 255:Core/Src/main.c **** - 256:Core/Src/main.c **** /** - 257:Core/Src/main.c **** * Enable DMA controller clock - 258:Core/Src/main.c **** */ - 259:Core/Src/main.c **** static void MX_DMA_Init(void) - ARM GAS /tmp/cc45044a.s page 6 + 241:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */ + 242:Core/Src/main.c **** + 243:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 244:Core/Src/main.c **** */ + 245:Core/Src/main.c **** hadc1.Instance = ADC1; + 246:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + 247:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 248:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; + 249:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 250:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 251:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + 252:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; + 253:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 254:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; + 255:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; + 256:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 257:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 258:Core/Src/main.c **** { + 259:Core/Src/main.c **** Error_Handler(); + ARM GAS /tmp/ccUsVHhJ.s page 6 - 260:Core/Src/main.c **** { + 260:Core/Src/main.c **** } 261:Core/Src/main.c **** - 262:Core/Src/main.c **** /* DMA controller clock enable */ - 263:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); - 264:Core/Src/main.c **** - 265:Core/Src/main.c **** /* DMA interrupt init */ - 266:Core/Src/main.c **** /* DMA2_Stream0_IRQn interrupt configuration */ - 267:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); - 268:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); - 269:Core/Src/main.c **** - 270:Core/Src/main.c **** } - 271:Core/Src/main.c **** - 272:Core/Src/main.c **** /** - 273:Core/Src/main.c **** * @brief GPIO Initialization Function - 274:Core/Src/main.c **** * @param None - 275:Core/Src/main.c **** * @retval None - 276:Core/Src/main.c **** */ - 277:Core/Src/main.c **** static void MX_GPIO_Init(void) - 278:Core/Src/main.c **** { - 28 .loc 1 278 1 view -0 + 262:Core/Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 263:Core/Src/main.c **** */ + 264:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_3; + 265:Core/Src/main.c **** sConfig.Rank = 1; + 266:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; + 267:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 268:Core/Src/main.c **** { + 269:Core/Src/main.c **** Error_Handler(); + 270:Core/Src/main.c **** } + 271:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ + 272:Core/Src/main.c **** + 273:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */ + 274:Core/Src/main.c **** + 275:Core/Src/main.c **** } + 276:Core/Src/main.c **** + 277:Core/Src/main.c **** /** + 278:Core/Src/main.c **** * Enable DMA controller clock + 279:Core/Src/main.c **** */ + 280:Core/Src/main.c **** static void MX_DMA_Init(void) + 281:Core/Src/main.c **** { + 282:Core/Src/main.c **** + 283:Core/Src/main.c **** /* DMA controller clock enable */ + 284:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); + 285:Core/Src/main.c **** + 286:Core/Src/main.c **** /* DMA interrupt init */ + 287:Core/Src/main.c **** /* DMA2_Stream0_IRQn interrupt configuration */ + 288:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); + 289:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); + 290:Core/Src/main.c **** + 291:Core/Src/main.c **** } + 292:Core/Src/main.c **** + 293:Core/Src/main.c **** /** + 294:Core/Src/main.c **** * @brief GPIO Initialization Function + 295:Core/Src/main.c **** * @param None + 296:Core/Src/main.c **** * @retval None + 297:Core/Src/main.c **** */ + 298:Core/Src/main.c **** static void MX_GPIO_Init(void) + 299:Core/Src/main.c **** { + 28 .loc 1 299 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 40 31 @ frame_needed = 0, uses_anonymous_args = 0 @@ -337,270 +358,270 @@ ARM GAS /tmp/cc45044a.s page 1 42 0004 8BB0 sub sp, sp, #44 43 .LCFI1: 44 .cfi_def_cfa_offset 72 - 279:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; - 45 .loc 1 279 3 view .LVU1 - 46 .loc 1 279 20 is_stmt 0 view .LVU2 + ARM GAS /tmp/ccUsVHhJ.s page 7 + + + 300:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 45 .loc 1 300 3 view .LVU1 + 46 .loc 1 300 20 is_stmt 0 view .LVU2 47 0006 0024 movs r4, #0 48 0008 0594 str r4, [sp, #20] 49 000a 0694 str r4, [sp, #24] 50 000c 0794 str r4, [sp, #28] 51 000e 0894 str r4, [sp, #32] 52 0010 0994 str r4, [sp, #36] - 280:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ - 281:Core/Src/main.c **** - 282:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ - 283:Core/Src/main.c **** - 284:Core/Src/main.c **** /* GPIO Ports Clock Enable */ - 285:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); - 53 .loc 1 285 3 is_stmt 1 view .LVU3 + 301:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ + 302:Core/Src/main.c **** + 303:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ + 304:Core/Src/main.c **** + 305:Core/Src/main.c **** /* GPIO Ports Clock Enable */ + 306:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); + 53 .loc 1 306 3 is_stmt 1 view .LVU3 54 .LBB4: - 55 .loc 1 285 3 view .LVU4 + 55 .loc 1 306 3 view .LVU4 56 0012 0094 str r4, [sp] - 57 .loc 1 285 3 view .LVU5 + 57 .loc 1 306 3 view .LVU5 58 0014 3D4B ldr r3, .L3 - ARM GAS /tmp/cc45044a.s page 7 - - 59 0016 1A6B ldr r2, [r3, #48] 60 0018 42F08002 orr r2, r2, #128 61 001c 1A63 str r2, [r3, #48] - 62 .loc 1 285 3 view .LVU6 + 62 .loc 1 306 3 view .LVU6 63 001e 1A6B ldr r2, [r3, #48] 64 0020 02F08002 and r2, r2, #128 65 0024 0092 str r2, [sp] - 66 .loc 1 285 3 view .LVU7 + 66 .loc 1 306 3 view .LVU7 67 0026 009A ldr r2, [sp] 68 .LBE4: - 69 .loc 1 285 3 view .LVU8 - 286:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); - 70 .loc 1 286 3 view .LVU9 + 69 .loc 1 306 3 view .LVU8 + 307:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); + 70 .loc 1 307 3 view .LVU9 71 .LBB5: - 72 .loc 1 286 3 view .LVU10 + 72 .loc 1 307 3 view .LVU10 73 0028 0194 str r4, [sp, #4] - 74 .loc 1 286 3 view .LVU11 + 74 .loc 1 307 3 view .LVU11 75 002a 1A6B ldr r2, [r3, #48] 76 002c 42F00402 orr r2, r2, #4 77 0030 1A63 str r2, [r3, #48] - 78 .loc 1 286 3 view .LVU12 + 78 .loc 1 307 3 view .LVU12 79 0032 1A6B ldr r2, [r3, #48] 80 0034 02F00402 and r2, r2, #4 81 0038 0192 str r2, [sp, #4] - 82 .loc 1 286 3 view .LVU13 + 82 .loc 1 307 3 view .LVU13 83 003a 019A ldr r2, [sp, #4] 84 .LBE5: - 85 .loc 1 286 3 view .LVU14 - 287:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); - 86 .loc 1 287 3 view .LVU15 + 85 .loc 1 307 3 view .LVU14 + 308:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 86 .loc 1 308 3 view .LVU15 87 .LBB6: - 88 .loc 1 287 3 view .LVU16 + 88 .loc 1 308 3 view .LVU16 89 003c 0294 str r4, [sp, #8] - 90 .loc 1 287 3 view .LVU17 + 90 .loc 1 308 3 view .LVU17 91 003e 1A6B ldr r2, [r3, #48] 92 0040 42F00102 orr r2, r2, #1 + ARM GAS /tmp/ccUsVHhJ.s page 8 + + 93 0044 1A63 str r2, [r3, #48] - 94 .loc 1 287 3 view .LVU18 + 94 .loc 1 308 3 view .LVU18 95 0046 1A6B ldr r2, [r3, #48] 96 0048 02F00102 and r2, r2, #1 97 004c 0292 str r2, [sp, #8] - 98 .loc 1 287 3 view .LVU19 + 98 .loc 1 308 3 view .LVU19 99 004e 029A ldr r2, [sp, #8] 100 .LBE6: - 101 .loc 1 287 3 view .LVU20 - 288:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); - 102 .loc 1 288 3 view .LVU21 + 101 .loc 1 308 3 view .LVU20 + 309:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); + 102 .loc 1 309 3 view .LVU21 103 .LBB7: - 104 .loc 1 288 3 view .LVU22 + 104 .loc 1 309 3 view .LVU22 105 0050 0394 str r4, [sp, #12] - 106 .loc 1 288 3 view .LVU23 + 106 .loc 1 309 3 view .LVU23 107 0052 1A6B ldr r2, [r3, #48] 108 0054 42F02002 orr r2, r2, #32 109 0058 1A63 str r2, [r3, #48] - 110 .loc 1 288 3 view .LVU24 + 110 .loc 1 309 3 view .LVU24 111 005a 1A6B ldr r2, [r3, #48] 112 005c 02F02002 and r2, r2, #32 - ARM GAS /tmp/cc45044a.s page 8 - - 113 0060 0392 str r2, [sp, #12] - 114 .loc 1 288 3 view .LVU25 + 114 .loc 1 309 3 view .LVU25 115 0062 039A ldr r2, [sp, #12] 116 .LBE7: - 117 .loc 1 288 3 view .LVU26 - 289:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); - 118 .loc 1 289 3 view .LVU27 + 117 .loc 1 309 3 view .LVU26 + 310:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 118 .loc 1 310 3 view .LVU27 119 .LBB8: - 120 .loc 1 289 3 view .LVU28 + 120 .loc 1 310 3 view .LVU28 121 0064 0494 str r4, [sp, #16] - 122 .loc 1 289 3 view .LVU29 + 122 .loc 1 310 3 view .LVU29 123 0066 1A6B ldr r2, [r3, #48] 124 0068 42F00202 orr r2, r2, #2 125 006c 1A63 str r2, [r3, #48] - 126 .loc 1 289 3 view .LVU30 + 126 .loc 1 310 3 view .LVU30 127 006e 1B6B ldr r3, [r3, #48] 128 0070 03F00203 and r3, r3, #2 129 0074 0493 str r3, [sp, #16] - 130 .loc 1 289 3 view .LVU31 + 130 .loc 1 310 3 view .LVU31 131 0076 049B ldr r3, [sp, #16] 132 .LBE8: - 133 .loc 1 289 3 view .LVU32 - 290:Core/Src/main.c **** - 291:Core/Src/main.c **** /*Configure GPIO pin Output Level */ - 292:Core/Src/main.c **** HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET); - 134 .loc 1 292 3 view .LVU33 + 133 .loc 1 310 3 view .LVU32 + 311:Core/Src/main.c **** + 312:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 313:Core/Src/main.c **** HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET); + 134 .loc 1 313 3 view .LVU33 135 0078 254D ldr r5, .L3+4 136 007a 2246 mov r2, r4 137 007c 4FF48041 mov r1, #16384 138 0080 2846 mov r0, r5 139 0082 FFF7FEFF bl HAL_GPIO_WritePin 140 .LVL0: - 293:Core/Src/main.c **** - 294:Core/Src/main.c **** /*Configure GPIO pin Output Level */ - 295:Core/Src/main.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); - 141 .loc 1 295 3 view .LVU34 + 314:Core/Src/main.c **** + 315:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 316:Core/Src/main.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); + 141 .loc 1 316 3 view .LVU34 + ARM GAS /tmp/ccUsVHhJ.s page 9 + + 142 0086 0122 movs r2, #1 143 0088 8021 movs r1, #128 144 008a 2846 mov r0, r5 145 008c FFF7FEFF bl HAL_GPIO_WritePin 146 .LVL1: - 296:Core/Src/main.c **** - 297:Core/Src/main.c **** /*Configure GPIO pin : CURR_STEP_START_TRG_Pin */ - 298:Core/Src/main.c **** GPIO_InitStruct.Pin = CURR_STEP_START_TRG_Pin; - 147 .loc 1 298 3 view .LVU35 - 148 .loc 1 298 23 is_stmt 0 view .LVU36 + 317:Core/Src/main.c **** + 318:Core/Src/main.c **** /*Configure GPIO pin : CURR_STEP_START_TRG_Pin */ + 319:Core/Src/main.c **** GPIO_InitStruct.Pin = CURR_STEP_START_TRG_Pin; + 147 .loc 1 319 3 view .LVU35 + 148 .loc 1 319 23 is_stmt 0 view .LVU36 149 0090 0127 movs r7, #1 150 0092 0597 str r7, [sp, #20] - 299:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; - 151 .loc 1 299 3 is_stmt 1 view .LVU37 - 152 .loc 1 299 24 is_stmt 0 view .LVU38 + 320:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; + 151 .loc 1 320 3 is_stmt 1 view .LVU37 + 152 .loc 1 320 24 is_stmt 0 view .LVU38 153 0094 4FF44413 mov r3, #3211264 154 0098 0693 str r3, [sp, #24] - 300:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; - 155 .loc 1 300 3 is_stmt 1 view .LVU39 - 156 .loc 1 300 24 is_stmt 0 view .LVU40 + 321:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; + 155 .loc 1 321 3 is_stmt 1 view .LVU39 + 156 .loc 1 321 24 is_stmt 0 view .LVU40 157 009a 0226 movs r6, #2 - ARM GAS /tmp/cc45044a.s page 9 - - 158 009c 0796 str r6, [sp, #28] - 301:Core/Src/main.c **** HAL_GPIO_Init(CURR_STEP_START_TRG_GPIO_Port, &GPIO_InitStruct); - 159 .loc 1 301 3 is_stmt 1 view .LVU41 + 322:Core/Src/main.c **** HAL_GPIO_Init(CURR_STEP_START_TRG_GPIO_Port, &GPIO_InitStruct); + 159 .loc 1 322 3 is_stmt 1 view .LVU41 160 009e DFF87890 ldr r9, .L3+12 161 00a2 05A9 add r1, sp, #20 162 00a4 4846 mov r0, r9 163 00a6 FFF7FEFF bl HAL_GPIO_Init 164 .LVL2: - 302:Core/Src/main.c **** - 303:Core/Src/main.c **** /*Configure GPIO pin : SWEEP_CYCLE_START_TRG_Pin */ - 304:Core/Src/main.c **** GPIO_InitStruct.Pin = SWEEP_CYCLE_START_TRG_Pin; - 165 .loc 1 304 3 view .LVU42 - 166 .loc 1 304 23 is_stmt 0 view .LVU43 + 323:Core/Src/main.c **** + 324:Core/Src/main.c **** /*Configure GPIO pin : SWEEP_CYCLE_START_TRG_Pin */ + 325:Core/Src/main.c **** GPIO_InitStruct.Pin = SWEEP_CYCLE_START_TRG_Pin; + 165 .loc 1 325 3 view .LVU42 + 166 .loc 1 325 23 is_stmt 0 view .LVU43 167 00aa 0596 str r6, [sp, #20] - 305:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; - 168 .loc 1 305 3 is_stmt 1 view .LVU44 - 169 .loc 1 305 24 is_stmt 0 view .LVU45 + 326:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + 168 .loc 1 326 3 is_stmt 1 view .LVU44 + 169 .loc 1 326 24 is_stmt 0 view .LVU45 170 00ac 4FF48818 mov r8, #1114112 171 00b0 CDF81880 str r8, [sp, #24] - 306:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; - 172 .loc 1 306 3 is_stmt 1 view .LVU46 - 173 .loc 1 306 24 is_stmt 0 view .LVU47 + 327:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; + 172 .loc 1 327 3 is_stmt 1 view .LVU46 + 173 .loc 1 327 24 is_stmt 0 view .LVU47 174 00b4 0796 str r6, [sp, #28] - 307:Core/Src/main.c **** HAL_GPIO_Init(SWEEP_CYCLE_START_TRG_GPIO_Port, &GPIO_InitStruct); - 175 .loc 1 307 3 is_stmt 1 view .LVU48 + 328:Core/Src/main.c **** HAL_GPIO_Init(SWEEP_CYCLE_START_TRG_GPIO_Port, &GPIO_InitStruct); + 175 .loc 1 328 3 is_stmt 1 view .LVU48 176 00b6 05A9 add r1, sp, #20 177 00b8 4846 mov r0, r9 178 00ba FFF7FEFF bl HAL_GPIO_Init 179 .LVL3: - 308:Core/Src/main.c **** - 309:Core/Src/main.c **** /*Configure GPIO pin : PF11 */ - 310:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_11; - 180 .loc 1 310 3 view .LVU49 - 181 .loc 1 310 23 is_stmt 0 view .LVU50 + 329:Core/Src/main.c **** + 330:Core/Src/main.c **** /*Configure GPIO pin : PF11 */ + 331:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_11; + 180 .loc 1 331 3 view .LVU49 + 181 .loc 1 331 23 is_stmt 0 view .LVU50 182 00be 4FF40063 mov r3, #2048 183 00c2 0593 str r3, [sp, #20] - 311:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; - 184 .loc 1 311 3 is_stmt 1 view .LVU51 - 185 .loc 1 311 24 is_stmt 0 view .LVU52 + ARM GAS /tmp/ccUsVHhJ.s page 10 + + + 332:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + 184 .loc 1 332 3 is_stmt 1 view .LVU51 + 185 .loc 1 332 24 is_stmt 0 view .LVU52 186 00c4 CDF81880 str r8, [sp, #24] - 312:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - 187 .loc 1 312 3 is_stmt 1 view .LVU53 - 188 .loc 1 312 24 is_stmt 0 view .LVU54 + 333:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 187 .loc 1 333 3 is_stmt 1 view .LVU53 + 188 .loc 1 333 24 is_stmt 0 view .LVU54 189 00c8 0794 str r4, [sp, #28] - 313:Core/Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 190 .loc 1 313 3 is_stmt 1 view .LVU55 + 334:Core/Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 190 .loc 1 334 3 is_stmt 1 view .LVU55 191 00ca 05A9 add r1, sp, #20 192 00cc 1148 ldr r0, .L3+8 193 00ce FFF7FEFF bl HAL_GPIO_Init 194 .LVL4: - 314:Core/Src/main.c **** - 315:Core/Src/main.c **** /*Configure GPIO pins : LED_RED_Pin LED_BLUE_Pin */ - 316:Core/Src/main.c **** GPIO_InitStruct.Pin = LED_RED_Pin|LED_BLUE_Pin; - 195 .loc 1 316 3 view .LVU56 - 196 .loc 1 316 23 is_stmt 0 view .LVU57 + 335:Core/Src/main.c **** + 336:Core/Src/main.c **** /*Configure GPIO pins : LED_RED_Pin LED_BLUE_Pin */ + 337:Core/Src/main.c **** GPIO_InitStruct.Pin = LED_RED_Pin|LED_BLUE_Pin; + 195 .loc 1 337 3 view .LVU56 + 196 .loc 1 337 23 is_stmt 0 view .LVU57 197 00d2 4FF48143 mov r3, #16512 198 00d6 0593 str r3, [sp, #20] - ARM GAS /tmp/cc45044a.s page 10 - - - 317:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 199 .loc 1 317 3 is_stmt 1 view .LVU58 - 200 .loc 1 317 24 is_stmt 0 view .LVU59 + 338:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 199 .loc 1 338 3 is_stmt 1 view .LVU58 + 200 .loc 1 338 24 is_stmt 0 view .LVU59 201 00d8 0697 str r7, [sp, #24] - 318:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - 202 .loc 1 318 3 is_stmt 1 view .LVU60 - 203 .loc 1 318 24 is_stmt 0 view .LVU61 + 339:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 202 .loc 1 339 3 is_stmt 1 view .LVU60 + 203 .loc 1 339 24 is_stmt 0 view .LVU61 204 00da 0794 str r4, [sp, #28] - 319:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 205 .loc 1 319 3 is_stmt 1 view .LVU62 - 206 .loc 1 319 25 is_stmt 0 view .LVU63 + 340:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 205 .loc 1 340 3 is_stmt 1 view .LVU62 + 206 .loc 1 340 25 is_stmt 0 view .LVU63 207 00dc 0894 str r4, [sp, #32] - 320:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 208 .loc 1 320 3 is_stmt 1 view .LVU64 + 341:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 208 .loc 1 341 3 is_stmt 1 view .LVU64 209 00de 05A9 add r1, sp, #20 210 00e0 2846 mov r0, r5 211 00e2 FFF7FEFF bl HAL_GPIO_Init 212 .LVL5: - 321:Core/Src/main.c **** - 322:Core/Src/main.c **** /* EXTI interrupt init*/ - 323:Core/Src/main.c **** HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0); - 213 .loc 1 323 3 view .LVU65 + 342:Core/Src/main.c **** + 343:Core/Src/main.c **** /* EXTI interrupt init*/ + 344:Core/Src/main.c **** HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0); + 213 .loc 1 344 3 view .LVU65 214 00e6 2246 mov r2, r4 215 00e8 2146 mov r1, r4 216 00ea 0620 movs r0, #6 217 00ec FFF7FEFF bl HAL_NVIC_SetPriority 218 .LVL6: - 324:Core/Src/main.c **** HAL_NVIC_EnableIRQ(EXTI0_IRQn); - 219 .loc 1 324 3 view .LVU66 + 345:Core/Src/main.c **** HAL_NVIC_EnableIRQ(EXTI0_IRQn); + 219 .loc 1 345 3 view .LVU66 220 00f0 0620 movs r0, #6 221 00f2 FFF7FEFF bl HAL_NVIC_EnableIRQ 222 .LVL7: - 325:Core/Src/main.c **** - 326:Core/Src/main.c **** HAL_NVIC_SetPriority(EXTI3_IRQn, 0, 0); - 223 .loc 1 326 3 view .LVU67 + 346:Core/Src/main.c **** + 347:Core/Src/main.c **** HAL_NVIC_SetPriority(EXTI3_IRQn, 0, 0); + 223 .loc 1 347 3 view .LVU67 224 00f6 2246 mov r2, r4 + ARM GAS /tmp/ccUsVHhJ.s page 11 + + 225 00f8 2146 mov r1, r4 226 00fa 0920 movs r0, #9 227 00fc FFF7FEFF bl HAL_NVIC_SetPriority 228 .LVL8: - 327:Core/Src/main.c **** HAL_NVIC_EnableIRQ(EXTI3_IRQn); - 229 .loc 1 327 3 view .LVU68 + 348:Core/Src/main.c **** HAL_NVIC_EnableIRQ(EXTI3_IRQn); + 229 .loc 1 348 3 view .LVU68 230 0100 0920 movs r0, #9 231 0102 FFF7FEFF bl HAL_NVIC_EnableIRQ 232 .LVL9: - 328:Core/Src/main.c **** - 329:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ - 330:Core/Src/main.c **** - 331:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ - 332:Core/Src/main.c **** } - 233 .loc 1 332 1 is_stmt 0 view .LVU69 + 349:Core/Src/main.c **** + 350:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ + 351:Core/Src/main.c **** + 352:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ + 353:Core/Src/main.c **** } + 233 .loc 1 353 1 is_stmt 0 view .LVU69 234 0106 0BB0 add sp, sp, #44 235 .LCFI2: 236 .cfi_def_cfa_offset 28 237 @ sp needed 238 0108 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 239 .L4: - ARM GAS /tmp/cc45044a.s page 11 - - 240 .align 2 241 .L3: 242 010c 00380240 .word 1073887232 @@ -616,8 +637,8 @@ ARM GAS /tmp/cc45044a.s page 1 253 .thumb_func 255 MX_DMA_Init: 256 .LFB246: - 260:Core/Src/main.c **** - 257 .loc 1 260 1 is_stmt 1 view -0 + 281:Core/Src/main.c **** + 257 .loc 1 281 1 is_stmt 1 view -0 258 .cfi_startproc 259 @ args = 0, pretend = 0, frame = 8 260 @ frame_needed = 0, uses_anonymous_args = 0 @@ -628,46 +649,46 @@ ARM GAS /tmp/cc45044a.s page 1 265 0002 83B0 sub sp, sp, #12 266 .LCFI4: 267 .cfi_def_cfa_offset 16 - 263:Core/Src/main.c **** - 268 .loc 1 263 3 view .LVU71 + 284:Core/Src/main.c **** + 268 .loc 1 284 3 view .LVU71 269 .LBB9: - 263:Core/Src/main.c **** - 270 .loc 1 263 3 view .LVU72 + 284:Core/Src/main.c **** + 270 .loc 1 284 3 view .LVU72 271 0004 0021 movs r1, #0 272 0006 0191 str r1, [sp, #4] - 263:Core/Src/main.c **** - 273 .loc 1 263 3 view .LVU73 + 284:Core/Src/main.c **** + 273 .loc 1 284 3 view .LVU73 + ARM GAS /tmp/ccUsVHhJ.s page 12 + + 274 0008 094B ldr r3, .L7 275 000a 1A6B ldr r2, [r3, #48] 276 000c 42F48002 orr r2, r2, #4194304 277 0010 1A63 str r2, [r3, #48] - 263:Core/Src/main.c **** - 278 .loc 1 263 3 view .LVU74 + 284:Core/Src/main.c **** + 278 .loc 1 284 3 view .LVU74 279 0012 1B6B ldr r3, [r3, #48] 280 0014 03F48003 and r3, r3, #4194304 281 0018 0193 str r3, [sp, #4] - 263:Core/Src/main.c **** - 282 .loc 1 263 3 view .LVU75 + 284:Core/Src/main.c **** + 282 .loc 1 284 3 view .LVU75 283 001a 019B ldr r3, [sp, #4] 284 .LBE9: - 263:Core/Src/main.c **** - 285 .loc 1 263 3 view .LVU76 - 267:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); - 286 .loc 1 267 3 view .LVU77 + 284:Core/Src/main.c **** + 285 .loc 1 284 3 view .LVU76 + 288:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); + 286 .loc 1 288 3 view .LVU77 287 001c 0A46 mov r2, r1 288 001e 3820 movs r0, #56 289 0020 FFF7FEFF bl HAL_NVIC_SetPriority 290 .LVL10: - ARM GAS /tmp/cc45044a.s page 12 - - - 268:Core/Src/main.c **** - 291 .loc 1 268 3 view .LVU78 + 289:Core/Src/main.c **** + 291 .loc 1 289 3 view .LVU78 292 0024 3820 movs r0, #56 293 0026 FFF7FEFF bl HAL_NVIC_EnableIRQ 294 .LVL11: - 270:Core/Src/main.c **** - 295 .loc 1 270 1 is_stmt 0 view .LVU79 + 291:Core/Src/main.c **** + 295 .loc 1 291 1 is_stmt 0 view .LVU79 296 002a 03B0 add sp, sp, #12 297 .LCFI5: 298 .cfi_def_cfa_offset 4 @@ -687,27 +708,30 @@ ARM GAS /tmp/cc45044a.s page 1 313 .thumb_func 315 Error_Handler: 316 .LFB248: - 333:Core/Src/main.c **** - 334:Core/Src/main.c **** /* USER CODE BEGIN 4 */ - 335:Core/Src/main.c **** - 336:Core/Src/main.c **** /* USER CODE END 4 */ - 337:Core/Src/main.c **** - 338:Core/Src/main.c **** /** - 339:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. - 340:Core/Src/main.c **** * @retval None - 341:Core/Src/main.c **** */ - 342:Core/Src/main.c **** void Error_Handler(void) - 343:Core/Src/main.c **** { - 317 .loc 1 343 1 is_stmt 1 view -0 + 354:Core/Src/main.c **** + 355:Core/Src/main.c **** /* USER CODE BEGIN 4 */ + 356:Core/Src/main.c **** + 357:Core/Src/main.c **** /* USER CODE END 4 */ + 358:Core/Src/main.c **** + 359:Core/Src/main.c **** /** + 360:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. + 361:Core/Src/main.c **** * @retval None + 362:Core/Src/main.c **** */ + 363:Core/Src/main.c **** void Error_Handler(void) + ARM GAS /tmp/ccUsVHhJ.s page 13 + + + 364:Core/Src/main.c **** { + 317 .loc 1 364 1 is_stmt 1 view -0 318 .cfi_startproc 319 @ Volatile: function does not return. 320 @ args = 0, pretend = 0, frame = 0 321 @ frame_needed = 0, uses_anonymous_args = 0 322 @ link register save eliminated. - 344:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ - 345:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ - 346:Core/Src/main.c **** __disable_irq(); - 323 .loc 1 346 3 view .LVU81 + 365:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ + 366:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ + 367:Core/Src/main.c **** __disable_irq(); + 323 .loc 1 367 3 view .LVU81 324 .LBB10: 325 .LBI10: 326 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" @@ -718,9 +742,6 @@ ARM GAS /tmp/cc45044a.s page 1 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 27. May 2021 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* - ARM GAS /tmp/cc45044a.s page 13 - - 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2021 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 @@ -757,6 +778,9 @@ ARM GAS /tmp/cc45044a.s page 1 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + ARM GAS /tmp/ccUsVHhJ.s page 14 + + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE @@ -778,9 +802,6 @@ ARM GAS /tmp/cc45044a.s page 1 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT - ARM GAS /tmp/cc45044a.s page 14 - - 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION @@ -817,6 +838,9 @@ ARM GAS /tmp/cc45044a.s page 1 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + ARM GAS /tmp/ccUsVHhJ.s page 15 + + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push @@ -838,9 +862,6 @@ ARM GAS /tmp/cc45044a.s page 1 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc45044a.s page 15 - - 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -877,6 +898,9 @@ ARM GAS /tmp/cc45044a.s page 1 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable + ARM GAS /tmp/ccUsVHhJ.s page 16 + + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -898,9 +922,6 @@ ARM GAS /tmp/cc45044a.s page 1 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors - ARM GAS /tmp/cc45044a.s page 16 - - 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE @@ -937,6 +958,9 @@ ARM GAS /tmp/cc45044a.s page 1 212:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 213:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 214:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + ARM GAS /tmp/ccUsVHhJ.s page 17 + + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 216:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 217:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) @@ -958,9 +982,6 @@ ARM GAS /tmp/cc45044a.s page 1 233:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 234:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi":::"memory") 235:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc45044a.s page 17 - - 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 238:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event @@ -997,6 +1018,9 @@ ARM GAS /tmp/cc45044a.s page 1 269:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 270:Drivers/CMSIS/Include/cmsis_gcc.h **** { 271:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + ARM GAS /tmp/ccUsVHhJ.s page 18 + + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** } 273:Drivers/CMSIS/Include/cmsis_gcc.h **** 274:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1018,9 +1042,6 @@ ARM GAS /tmp/cc45044a.s page 1 290:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 291:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 292:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) - ARM GAS /tmp/cc45044a.s page 18 - - 293:Drivers/CMSIS/Include/cmsis_gcc.h **** { 294:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 295:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); @@ -1057,6 +1078,9 @@ ARM GAS /tmp/cc45044a.s page 1 326:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 327:Drivers/CMSIS/Include/cmsis_gcc.h **** { 328:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + ARM GAS /tmp/ccUsVHhJ.s page 19 + + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 330:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 331:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; @@ -1078,9 +1102,6 @@ ARM GAS /tmp/cc45044a.s page 1 347:Drivers/CMSIS/Include/cmsis_gcc.h **** { 348:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 349:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) - ARM GAS /tmp/cc45044a.s page 19 - - 350:Drivers/CMSIS/Include/cmsis_gcc.h **** { 351:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 352:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1117,6 +1138,9 @@ ARM GAS /tmp/cc45044a.s page 1 383:Drivers/CMSIS/Include/cmsis_gcc.h **** 384:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 385:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + ARM GAS /tmp/ccUsVHhJ.s page 20 + + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** { 387:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 388:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; @@ -1138,9 +1162,6 @@ ARM GAS /tmp/cc45044a.s page 1 404:Drivers/CMSIS/Include/cmsis_gcc.h **** { 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 406:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. - ARM GAS /tmp/cc45044a.s page 20 - - 407:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 408:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 409:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it @@ -1177,6 +1198,9 @@ ARM GAS /tmp/cc45044a.s page 1 440:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 441:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 442:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); + ARM GAS /tmp/ccUsVHhJ.s page 21 + + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 444:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 445:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1198,9 +1222,6 @@ ARM GAS /tmp/cc45044a.s page 1 461:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 462:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cc45044a.s page 21 - - 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 465:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ @@ -1237,6 +1258,9 @@ ARM GAS /tmp/cc45044a.s page 1 497:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 498:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 499:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccUsVHhJ.s page 22 + + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** 501:Drivers/CMSIS/Include/cmsis_gcc.h **** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -1258,9 +1282,6 @@ ARM GAS /tmp/cc45044a.s page 1 518:Drivers/CMSIS/Include/cmsis_gcc.h **** 519:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 520:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) - ARM GAS /tmp/cc45044a.s page 22 - - 521:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 522:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location @@ -1297,6 +1318,9 @@ ARM GAS /tmp/cc45044a.s page 1 554:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. + ARM GAS /tmp/ccUsVHhJ.s page 23 + + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 558:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value @@ -1318,9 +1342,6 @@ ARM GAS /tmp/cc45044a.s page 1 575:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 576:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT(ARG1, ARG2) \ - ARM GAS /tmp/cc45044a.s page 23 - - 578:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 579:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 580:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ @@ -1357,6 +1378,9 @@ ARM GAS /tmp/cc45044a.s page 1 611:Drivers/CMSIS/Include/cmsis_gcc.h **** 612:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); + ARM GAS /tmp/ccUsVHhJ.s page 24 + + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 615:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 616:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. @@ -1378,9 +1402,6 @@ ARM GAS /tmp/cc45044a.s page 1 632:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - ARM GAS /tmp/cc45044a.s page 24 - - 635:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); 636:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 637:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not @@ -1417,6 +1438,9 @@ ARM GAS /tmp/cc45044a.s page 1 668:Drivers/CMSIS/Include/cmsis_gcc.h **** { 669:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccUsVHhJ.s page 25 + + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -1438,9 +1462,6 @@ ARM GAS /tmp/cc45044a.s page 1 689:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 690:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 691:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) - ARM GAS /tmp/cc45044a.s page 25 - - 692:Drivers/CMSIS/Include/cmsis_gcc.h **** { 693:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); 694:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1477,6 +1498,9 @@ ARM GAS /tmp/cc45044a.s page 1 725:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 726:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 727:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. + ARM GAS /tmp/ccUsVHhJ.s page 26 + + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 729:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31) 730:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value @@ -1498,9 +1522,6 @@ ARM GAS /tmp/cc45044a.s page 1 746:Drivers/CMSIS/Include/cmsis_gcc.h **** return (uint32_t)val; 747:Drivers/CMSIS/Include/cmsis_gcc.h **** } 748:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc45044a.s page 26 - - 749:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 751:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ @@ -1537,6 +1558,9 @@ ARM GAS /tmp/cc45044a.s page 1 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** } 784:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccUsVHhJ.s page 27 + + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 786:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit) @@ -1558,9 +1582,6 @@ ARM GAS /tmp/cc45044a.s page 1 803:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB instruction for 8 bit values. 804:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 805:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location - ARM GAS /tmp/cc45044a.s page 27 - - 806:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) 808:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -1597,6 +1618,9 @@ ARM GAS /tmp/cc45044a.s page 1 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB exclusive instruction for 8 bit value. 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 841:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) + ARM GAS /tmp/ccUsVHhJ.s page 28 + + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 843:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) 844:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -1618,9 +1642,6 @@ ARM GAS /tmp/cc45044a.s page 1 860:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 861:Drivers/CMSIS/Include/cmsis_gcc.h **** 862:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - ARM GAS /tmp/cc45044a.s page 28 - - 863:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 864:Drivers/CMSIS/Include/cmsis_gcc.h **** } 865:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1657,6 +1678,9 @@ ARM GAS /tmp/cc45044a.s page 1 896:Drivers/CMSIS/Include/cmsis_gcc.h **** } 897:Drivers/CMSIS/Include/cmsis_gcc.h **** 898:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccUsVHhJ.s page 29 + + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit) 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values. @@ -1678,9 +1702,6 @@ ARM GAS /tmp/cc45044a.s page 1 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (32 bit) 918:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL exclusive instruction for 32 bit values. 919:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store - ARM GAS /tmp/cc45044a.s page 29 - - 920:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed @@ -1717,6 +1738,9 @@ ARM GAS /tmp/cc45044a.s page 1 953:Drivers/CMSIS/Include/cmsis_gcc.h **** 954:Drivers/CMSIS/Include/cmsis_gcc.h **** 955:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccUsVHhJ.s page 30 + + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 957:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting special-purpose register PRIMASK. 958:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. @@ -1736,16 +1760,13 @@ ARM GAS /tmp/cc45044a.s page 1 336 .L10: 337 .LBE11: 338 .LBE10: - 347:Core/Src/main.c **** while (1) - 339 .loc 1 347 3 view .LVU84 - ARM GAS /tmp/cc45044a.s page 30 - - - 348:Core/Src/main.c **** { - 349:Core/Src/main.c **** } - 340 .loc 1 349 3 view .LVU85 - 347:Core/Src/main.c **** while (1) - 341 .loc 1 347 9 view .LVU86 + 368:Core/Src/main.c **** while (1) + 339 .loc 1 368 3 view .LVU84 + 369:Core/Src/main.c **** { + 370:Core/Src/main.c **** } + 340 .loc 1 370 3 view .LVU85 + 368:Core/Src/main.c **** while (1) + 341 .loc 1 368 9 view .LVU86 342 0002 FEE7 b .L10 343 .cfi_endproc 344 .LFE248: @@ -1756,8 +1777,8 @@ ARM GAS /tmp/cc45044a.s page 1 350 .thumb_func 352 MX_ADC1_Init: 353 .LFB245: - 210:Core/Src/main.c **** - 354 .loc 1 210 1 view -0 + 231:Core/Src/main.c **** + 354 .loc 1 231 1 view -0 355 .cfi_startproc 356 @ args = 0, pretend = 0, frame = 16 357 @ frame_needed = 0, uses_anonymous_args = 0 @@ -1768,127 +1789,127 @@ ARM GAS /tmp/cc45044a.s page 1 362 0002 85B0 sub sp, sp, #20 363 .LCFI7: 364 .cfi_def_cfa_offset 24 - 216:Core/Src/main.c **** - 365 .loc 1 216 3 view .LVU88 - 216:Core/Src/main.c **** - 366 .loc 1 216 26 is_stmt 0 view .LVU89 + 237:Core/Src/main.c **** + 365 .loc 1 237 3 view .LVU88 + 237:Core/Src/main.c **** + 366 .loc 1 237 26 is_stmt 0 view .LVU89 367 0004 0023 movs r3, #0 368 0006 0093 str r3, [sp] 369 0008 0193 str r3, [sp, #4] 370 000a 0293 str r3, [sp, #8] 371 000c 0393 str r3, [sp, #12] - 224:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - 372 .loc 1 224 3 is_stmt 1 view .LVU90 - 224:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - 373 .loc 1 224 18 is_stmt 0 view .LVU91 + ARM GAS /tmp/ccUsVHhJ.s page 31 + + + 245:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + 372 .loc 1 245 3 is_stmt 1 view .LVU90 + 245:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + 373 .loc 1 245 18 is_stmt 0 view .LVU91 374 000e 1648 ldr r0, .L17 375 0010 164A ldr r2, .L17+4 376 0012 0260 str r2, [r0] - 225:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 377 .loc 1 225 3 is_stmt 1 view .LVU92 - 225:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 378 .loc 1 225 29 is_stmt 0 view .LVU93 + 246:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 377 .loc 1 246 3 is_stmt 1 view .LVU92 + 246:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 378 .loc 1 246 29 is_stmt 0 view .LVU93 379 0014 4FF48032 mov r2, #65536 380 0018 4260 str r2, [r0, #4] - 226:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; - 381 .loc 1 226 3 is_stmt 1 view .LVU94 - 226:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; - 382 .loc 1 226 25 is_stmt 0 view .LVU95 + 247:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; + 381 .loc 1 247 3 is_stmt 1 view .LVU94 + 247:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; + 382 .loc 1 247 25 is_stmt 0 view .LVU95 383 001a 8360 str r3, [r0, #8] - 227:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 384 .loc 1 227 3 is_stmt 1 view .LVU96 - 227:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - ARM GAS /tmp/cc45044a.s page 31 - - - 385 .loc 1 227 27 is_stmt 0 view .LVU97 + 248:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 384 .loc 1 248 3 is_stmt 1 view .LVU96 + 248:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 385 .loc 1 248 27 is_stmt 0 view .LVU97 386 001c 0361 str r3, [r0, #16] - 228:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 387 .loc 1 228 3 is_stmt 1 view .LVU98 - 228:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 388 .loc 1 228 33 is_stmt 0 view .LVU99 + 249:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 387 .loc 1 249 3 is_stmt 1 view .LVU98 + 249:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 388 .loc 1 249 33 is_stmt 0 view .LVU99 389 001e 0376 strb r3, [r0, #24] - 229:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - 390 .loc 1 229 3 is_stmt 1 view .LVU100 - 229:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - 391 .loc 1 229 36 is_stmt 0 view .LVU101 + 250:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + 390 .loc 1 250 3 is_stmt 1 view .LVU100 + 250:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + 391 .loc 1 250 36 is_stmt 0 view .LVU101 392 0020 80F82030 strb r3, [r0, #32] - 230:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; - 393 .loc 1 230 3 is_stmt 1 view .LVU102 - 230:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; - 394 .loc 1 230 35 is_stmt 0 view .LVU103 + 251:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; + 393 .loc 1 251 3 is_stmt 1 view .LVU102 + 251:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; + 394 .loc 1 251 35 is_stmt 0 view .LVU103 395 0024 4FF08052 mov r2, #268435456 396 0028 C262 str r2, [r0, #44] - 231:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 397 .loc 1 231 3 is_stmt 1 view .LVU104 - 231:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 398 .loc 1 231 31 is_stmt 0 view .LVU105 + 252:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 397 .loc 1 252 3 is_stmt 1 view .LVU104 + 252:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 398 .loc 1 252 31 is_stmt 0 view .LVU105 399 002a 4FF07062 mov r2, #251658240 400 002e 8262 str r2, [r0, #40] - 232:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; - 401 .loc 1 232 3 is_stmt 1 view .LVU106 - 232:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; - 402 .loc 1 232 24 is_stmt 0 view .LVU107 + 253:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; + 401 .loc 1 253 3 is_stmt 1 view .LVU106 + 253:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; + 402 .loc 1 253 24 is_stmt 0 view .LVU107 403 0030 C360 str r3, [r0, #12] - 233:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; - 404 .loc 1 233 3 is_stmt 1 view .LVU108 - 233:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; - 405 .loc 1 233 30 is_stmt 0 view .LVU109 + 254:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; + 404 .loc 1 254 3 is_stmt 1 view .LVU108 + 254:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; + 405 .loc 1 254 30 is_stmt 0 view .LVU109 406 0032 0123 movs r3, #1 407 0034 C361 str r3, [r0, #28] - 234:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 408 .loc 1 234 3 is_stmt 1 view .LVU110 - 234:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 409 .loc 1 234 36 is_stmt 0 view .LVU111 + 255:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + ARM GAS /tmp/ccUsVHhJ.s page 32 + + + 408 .loc 1 255 3 is_stmt 1 view .LVU110 + 255:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 409 .loc 1 255 36 is_stmt 0 view .LVU111 410 0036 80F83030 strb r3, [r0, #48] - 235:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 411 .loc 1 235 3 is_stmt 1 view .LVU112 - 235:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 412 .loc 1 235 27 is_stmt 0 view .LVU113 + 256:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 411 .loc 1 256 3 is_stmt 1 view .LVU112 + 256:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 412 .loc 1 256 27 is_stmt 0 view .LVU113 413 003a 4361 str r3, [r0, #20] - 236:Core/Src/main.c **** { - 414 .loc 1 236 3 is_stmt 1 view .LVU114 - 236:Core/Src/main.c **** { - 415 .loc 1 236 7 is_stmt 0 view .LVU115 + 257:Core/Src/main.c **** { + 414 .loc 1 257 3 is_stmt 1 view .LVU114 + 257:Core/Src/main.c **** { + 415 .loc 1 257 7 is_stmt 0 view .LVU115 416 003c FFF7FEFF bl HAL_ADC_Init 417 .LVL12: - 236:Core/Src/main.c **** { - 418 .loc 1 236 6 discriminator 1 view .LVU116 + 257:Core/Src/main.c **** { + 418 .loc 1 257 6 discriminator 1 view .LVU116 419 0040 68B9 cbnz r0, .L15 - 243:Core/Src/main.c **** sConfig.Rank = 1; - 420 .loc 1 243 3 is_stmt 1 view .LVU117 - 243:Core/Src/main.c **** sConfig.Rank = 1; - ARM GAS /tmp/cc45044a.s page 32 - - - 421 .loc 1 243 19 is_stmt 0 view .LVU118 + 264:Core/Src/main.c **** sConfig.Rank = 1; + 420 .loc 1 264 3 is_stmt 1 view .LVU117 + 264:Core/Src/main.c **** sConfig.Rank = 1; + 421 .loc 1 264 19 is_stmt 0 view .LVU118 422 0042 0323 movs r3, #3 423 0044 0093 str r3, [sp] - 244:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; - 424 .loc 1 244 3 is_stmt 1 view .LVU119 - 244:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; - 425 .loc 1 244 16 is_stmt 0 view .LVU120 + 265:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; + 424 .loc 1 265 3 is_stmt 1 view .LVU119 + 265:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; + 425 .loc 1 265 16 is_stmt 0 view .LVU120 426 0046 0123 movs r3, #1 427 0048 0193 str r3, [sp, #4] - 245:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 428 .loc 1 245 3 is_stmt 1 view .LVU121 - 245:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 429 .loc 1 245 24 is_stmt 0 view .LVU122 + 266:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 428 .loc 1 266 3 is_stmt 1 view .LVU121 + 266:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 429 .loc 1 266 24 is_stmt 0 view .LVU122 430 004a 0023 movs r3, #0 431 004c 0293 str r3, [sp, #8] - 246:Core/Src/main.c **** { - 432 .loc 1 246 3 is_stmt 1 view .LVU123 - 246:Core/Src/main.c **** { - 433 .loc 1 246 7 is_stmt 0 view .LVU124 + 267:Core/Src/main.c **** { + 432 .loc 1 267 3 is_stmt 1 view .LVU123 + 267:Core/Src/main.c **** { + 433 .loc 1 267 7 is_stmt 0 view .LVU124 434 004e 6946 mov r1, sp 435 0050 0548 ldr r0, .L17 436 0052 FFF7FEFF bl HAL_ADC_ConfigChannel 437 .LVL13: - 246:Core/Src/main.c **** { - 438 .loc 1 246 6 discriminator 1 view .LVU125 + 267:Core/Src/main.c **** { + 438 .loc 1 267 6 discriminator 1 view .LVU125 439 0056 20B9 cbnz r0, .L16 - 254:Core/Src/main.c **** - 440 .loc 1 254 1 view .LVU126 + 275:Core/Src/main.c **** + 440 .loc 1 275 1 view .LVU126 441 0058 05B0 add sp, sp, #20 442 .LCFI8: 443 .cfi_remember_state @@ -1897,14 +1918,17 @@ ARM GAS /tmp/cc45044a.s page 1 446 005a 5DF804FB ldr pc, [sp], #4 447 .L15: 448 .LCFI9: + ARM GAS /tmp/ccUsVHhJ.s page 33 + + 449 .cfi_restore_state - 238:Core/Src/main.c **** } - 450 .loc 1 238 5 is_stmt 1 view .LVU127 + 259:Core/Src/main.c **** } + 450 .loc 1 259 5 is_stmt 1 view .LVU127 451 005e FFF7FEFF bl Error_Handler 452 .LVL14: 453 .L16: - 248:Core/Src/main.c **** } - 454 .loc 1 248 5 view .LVU128 + 269:Core/Src/main.c **** } + 454 .loc 1 269 5 view .LVU128 455 0062 FFF7FEFF bl Error_Handler 456 .LVL15: 457 .L18: @@ -1918,15 +1942,12 @@ ARM GAS /tmp/cc45044a.s page 1 466 .align 1 467 .global SystemClock_Config 468 .syntax unified - ARM GAS /tmp/cc45044a.s page 33 - - 469 .thumb 470 .thumb_func 472 SystemClock_Config: 473 .LFB244: - 164:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 474 .loc 1 164 1 view -0 + 185:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 474 .loc 1 185 1 view -0 475 .cfi_startproc 476 @ args = 0, pretend = 0, frame = 80 477 @ frame_needed = 0, uses_anonymous_args = 0 @@ -1937,180 +1958,180 @@ ARM GAS /tmp/cc45044a.s page 1 482 0002 95B0 sub sp, sp, #84 483 .LCFI11: 484 .cfi_def_cfa_offset 88 - 165:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 485 .loc 1 165 3 view .LVU130 - 165:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 486 .loc 1 165 22 is_stmt 0 view .LVU131 + 186:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 485 .loc 1 186 3 view .LVU130 + 186:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 486 .loc 1 186 22 is_stmt 0 view .LVU131 487 0004 3022 movs r2, #48 488 0006 0021 movs r1, #0 489 0008 08A8 add r0, sp, #32 490 000a FFF7FEFF bl memset 491 .LVL16: - 166:Core/Src/main.c **** - 492 .loc 1 166 3 is_stmt 1 view .LVU132 - 166:Core/Src/main.c **** - 493 .loc 1 166 22 is_stmt 0 view .LVU133 + 187:Core/Src/main.c **** + 492 .loc 1 187 3 is_stmt 1 view .LVU132 + 187:Core/Src/main.c **** + 493 .loc 1 187 22 is_stmt 0 view .LVU133 494 000e 0023 movs r3, #0 495 0010 0393 str r3, [sp, #12] 496 0012 0493 str r3, [sp, #16] 497 0014 0593 str r3, [sp, #20] 498 0016 0693 str r3, [sp, #24] 499 0018 0793 str r3, [sp, #28] - 170:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 500 .loc 1 170 3 is_stmt 1 view .LVU134 + 191:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + ARM GAS /tmp/ccUsVHhJ.s page 34 + + + 500 .loc 1 191 3 is_stmt 1 view .LVU134 501 .LBB12: - 170:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 502 .loc 1 170 3 view .LVU135 + 191:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 502 .loc 1 191 3 view .LVU135 503 001a 0193 str r3, [sp, #4] - 170:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 504 .loc 1 170 3 view .LVU136 + 191:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 504 .loc 1 191 3 view .LVU136 505 001c 214A ldr r2, .L25 506 001e 116C ldr r1, [r2, #64] 507 0020 41F08051 orr r1, r1, #268435456 508 0024 1164 str r1, [r2, #64] - 170:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 509 .loc 1 170 3 view .LVU137 + 191:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 509 .loc 1 191 3 view .LVU137 510 0026 126C ldr r2, [r2, #64] 511 0028 02F08052 and r2, r2, #268435456 512 002c 0192 str r2, [sp, #4] - 170:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 513 .loc 1 170 3 view .LVU138 + 191:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 513 .loc 1 191 3 view .LVU138 514 002e 019A ldr r2, [sp, #4] 515 .LBE12: - 170:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - ARM GAS /tmp/cc45044a.s page 34 - - - 516 .loc 1 170 3 view .LVU139 - 171:Core/Src/main.c **** - 517 .loc 1 171 3 view .LVU140 + 191:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 516 .loc 1 191 3 view .LVU139 + 192:Core/Src/main.c **** + 517 .loc 1 192 3 view .LVU140 518 .LBB13: - 171:Core/Src/main.c **** - 519 .loc 1 171 3 view .LVU141 + 192:Core/Src/main.c **** + 519 .loc 1 192 3 view .LVU141 520 0030 0293 str r3, [sp, #8] - 171:Core/Src/main.c **** - 521 .loc 1 171 3 view .LVU142 + 192:Core/Src/main.c **** + 521 .loc 1 192 3 view .LVU142 522 0032 1D4B ldr r3, .L25+4 523 0034 1A68 ldr r2, [r3] 524 0036 42F44042 orr r2, r2, #49152 525 003a 1A60 str r2, [r3] - 171:Core/Src/main.c **** - 526 .loc 1 171 3 view .LVU143 + 192:Core/Src/main.c **** + 526 .loc 1 192 3 view .LVU143 527 003c 1B68 ldr r3, [r3] 528 003e 03F44043 and r3, r3, #49152 529 0042 0293 str r3, [sp, #8] - 171:Core/Src/main.c **** - 530 .loc 1 171 3 view .LVU144 + 192:Core/Src/main.c **** + 530 .loc 1 192 3 view .LVU144 531 0044 029B ldr r3, [sp, #8] 532 .LBE13: - 171:Core/Src/main.c **** - 533 .loc 1 171 3 view .LVU145 - 176:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 534 .loc 1 176 3 view .LVU146 - 176:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 535 .loc 1 176 36 is_stmt 0 view .LVU147 + 192:Core/Src/main.c **** + 533 .loc 1 192 3 view .LVU145 + 197:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 534 .loc 1 197 3 view .LVU146 + 197:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 535 .loc 1 197 36 is_stmt 0 view .LVU147 536 0046 0123 movs r3, #1 537 0048 0893 str r3, [sp, #32] - 177:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 538 .loc 1 177 3 is_stmt 1 view .LVU148 - 177:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 539 .loc 1 177 30 is_stmt 0 view .LVU149 + 198:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 538 .loc 1 198 3 is_stmt 1 view .LVU148 + 198:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 539 .loc 1 198 30 is_stmt 0 view .LVU149 540 004a 4FF48033 mov r3, #65536 541 004e 0993 str r3, [sp, #36] - 178:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 542 .loc 1 178 3 is_stmt 1 view .LVU150 - 178:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 543 .loc 1 178 34 is_stmt 0 view .LVU151 + ARM GAS /tmp/ccUsVHhJ.s page 35 + + + 199:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 542 .loc 1 199 3 is_stmt 1 view .LVU150 + 199:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 543 .loc 1 199 34 is_stmt 0 view .LVU151 544 0050 0223 movs r3, #2 545 0052 0E93 str r3, [sp, #56] - 179:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; - 546 .loc 1 179 3 is_stmt 1 view .LVU152 - 179:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; - 547 .loc 1 179 35 is_stmt 0 view .LVU153 + 200:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; + 546 .loc 1 200 3 is_stmt 1 view .LVU152 + 200:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; + 547 .loc 1 200 35 is_stmt 0 view .LVU153 548 0054 4FF48002 mov r2, #4194304 549 0058 0F92 str r2, [sp, #60] - 180:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 550 .loc 1 180 3 is_stmt 1 view .LVU154 - 180:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 551 .loc 1 180 30 is_stmt 0 view .LVU155 + 201:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 550 .loc 1 201 3 is_stmt 1 view .LVU154 + 201:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 551 .loc 1 201 30 is_stmt 0 view .LVU155 552 005a 0822 movs r2, #8 553 005c 1092 str r2, [sp, #64] - 181:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 554 .loc 1 181 3 is_stmt 1 view .LVU156 - 181:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - ARM GAS /tmp/cc45044a.s page 35 - - - 555 .loc 1 181 30 is_stmt 0 view .LVU157 + 202:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 554 .loc 1 202 3 is_stmt 1 view .LVU156 + 202:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 555 .loc 1 202 30 is_stmt 0 view .LVU157 556 005e 4FF4A872 mov r2, #336 557 0062 1192 str r2, [sp, #68] - 182:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 558 .loc 1 182 3 is_stmt 1 view .LVU158 - 182:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 559 .loc 1 182 30 is_stmt 0 view .LVU159 + 203:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 558 .loc 1 203 3 is_stmt 1 view .LVU158 + 203:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 559 .loc 1 203 30 is_stmt 0 view .LVU159 560 0064 1293 str r3, [sp, #72] - 183:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 561 .loc 1 183 3 is_stmt 1 view .LVU160 - 183:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 562 .loc 1 183 30 is_stmt 0 view .LVU161 + 204:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 561 .loc 1 204 3 is_stmt 1 view .LVU160 + 204:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 562 .loc 1 204 30 is_stmt 0 view .LVU161 563 0066 0723 movs r3, #7 564 0068 1393 str r3, [sp, #76] - 184:Core/Src/main.c **** { - 565 .loc 1 184 3 is_stmt 1 view .LVU162 - 184:Core/Src/main.c **** { - 566 .loc 1 184 7 is_stmt 0 view .LVU163 + 205:Core/Src/main.c **** { + 565 .loc 1 205 3 is_stmt 1 view .LVU162 + 205:Core/Src/main.c **** { + 566 .loc 1 205 7 is_stmt 0 view .LVU163 567 006a 08A8 add r0, sp, #32 568 006c FFF7FEFF bl HAL_RCC_OscConfig 569 .LVL17: - 184:Core/Src/main.c **** { - 570 .loc 1 184 6 discriminator 1 view .LVU164 + 205:Core/Src/main.c **** { + 570 .loc 1 205 6 discriminator 1 view .LVU164 571 0070 98B9 cbnz r0, .L23 - 191:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 572 .loc 1 191 3 is_stmt 1 view .LVU165 - 191:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 573 .loc 1 191 31 is_stmt 0 view .LVU166 + 212:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 572 .loc 1 212 3 is_stmt 1 view .LVU165 + 212:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 573 .loc 1 212 31 is_stmt 0 view .LVU166 574 0072 0F23 movs r3, #15 575 0074 0393 str r3, [sp, #12] - 193:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 576 .loc 1 193 3 is_stmt 1 view .LVU167 - 193:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 577 .loc 1 193 34 is_stmt 0 view .LVU168 + 214:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 576 .loc 1 214 3 is_stmt 1 view .LVU167 + 214:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 577 .loc 1 214 34 is_stmt 0 view .LVU168 578 0076 0223 movs r3, #2 579 0078 0493 str r3, [sp, #16] - 194:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 580 .loc 1 194 3 is_stmt 1 view .LVU169 - 194:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 581 .loc 1 194 35 is_stmt 0 view .LVU170 + ARM GAS /tmp/ccUsVHhJ.s page 36 + + + 215:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 580 .loc 1 215 3 is_stmt 1 view .LVU169 + 215:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 581 .loc 1 215 35 is_stmt 0 view .LVU170 582 007a 0023 movs r3, #0 583 007c 0593 str r3, [sp, #20] - 195:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 584 .loc 1 195 3 is_stmt 1 view .LVU171 - 195:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 585 .loc 1 195 36 is_stmt 0 view .LVU172 + 216:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 584 .loc 1 216 3 is_stmt 1 view .LVU171 + 216:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 585 .loc 1 216 36 is_stmt 0 view .LVU172 586 007e 4FF4A053 mov r3, #5120 587 0082 0693 str r3, [sp, #24] - 196:Core/Src/main.c **** - 588 .loc 1 196 3 is_stmt 1 view .LVU173 - 196:Core/Src/main.c **** - 589 .loc 1 196 36 is_stmt 0 view .LVU174 + 217:Core/Src/main.c **** + 588 .loc 1 217 3 is_stmt 1 view .LVU173 + 217:Core/Src/main.c **** + 589 .loc 1 217 36 is_stmt 0 view .LVU174 590 0084 4FF48053 mov r3, #4096 591 0088 0793 str r3, [sp, #28] - 198:Core/Src/main.c **** { - 592 .loc 1 198 3 is_stmt 1 view .LVU175 - 198:Core/Src/main.c **** { - ARM GAS /tmp/cc45044a.s page 36 - - - 593 .loc 1 198 7 is_stmt 0 view .LVU176 + 219:Core/Src/main.c **** { + 592 .loc 1 219 3 is_stmt 1 view .LVU175 + 219:Core/Src/main.c **** { + 593 .loc 1 219 7 is_stmt 0 view .LVU176 594 008a 0521 movs r1, #5 595 008c 03A8 add r0, sp, #12 596 008e FFF7FEFF bl HAL_RCC_ClockConfig 597 .LVL18: - 198:Core/Src/main.c **** { - 598 .loc 1 198 6 discriminator 1 view .LVU177 + 219:Core/Src/main.c **** { + 598 .loc 1 219 6 discriminator 1 view .LVU177 599 0092 20B9 cbnz r0, .L24 - 202:Core/Src/main.c **** - 600 .loc 1 202 1 view .LVU178 + 223:Core/Src/main.c **** + 600 .loc 1 223 1 view .LVU178 601 0094 15B0 add sp, sp, #84 602 .LCFI12: 603 .cfi_remember_state @@ -2120,13 +2141,13 @@ ARM GAS /tmp/cc45044a.s page 1 607 .L23: 608 .LCFI13: 609 .cfi_restore_state - 186:Core/Src/main.c **** } - 610 .loc 1 186 5 is_stmt 1 view .LVU179 + 207:Core/Src/main.c **** } + 610 .loc 1 207 5 is_stmt 1 view .LVU179 611 009a FFF7FEFF bl Error_Handler 612 .LVL19: 613 .L24: - 200:Core/Src/main.c **** } - 614 .loc 1 200 5 view .LVU180 + 221:Core/Src/main.c **** } + 614 .loc 1 221 5 view .LVU180 615 009e FFF7FEFF bl Error_Handler 616 .LVL20: 617 .L26: @@ -2137,574 +2158,753 @@ ARM GAS /tmp/cc45044a.s page 1 622 .cfi_endproc 623 .LFE244: 625 .global __aeabi_ldivmod - 626 .section .text.main,"ax",%progbits - 627 .align 1 - 628 .global main - 629 .syntax unified - 630 .thumb - 631 .thumb_func - 633 main: - 634 .LFB243: - 80:Core/Src/main.c **** - 635 .loc 1 80 1 view -0 - 636 .cfi_startproc - 637 @ Volatile: function does not return. - 638 @ args = 0, pretend = 0, frame = 0 - 639 @ frame_needed = 0, uses_anonymous_args = 0 - 640 0000 08B5 push {r3, lr} - 641 .LCFI14: - 642 .cfi_def_cfa_offset 8 - 643 .cfi_offset 3, -8 - 644 .cfi_offset 14, -4 - 89:Core/Src/main.c **** - 645 .loc 1 89 3 view .LVU182 - ARM GAS /tmp/cc45044a.s page 37 + ARM GAS /tmp/ccUsVHhJ.s page 37 - 646 0002 FFF7FEFF bl HAL_Init - 647 .LVL21: - 96:Core/Src/main.c **** - 648 .loc 1 96 3 view .LVU183 - 649 0006 FFF7FEFF bl SystemClock_Config - 650 .LVL22: - 103:Core/Src/main.c **** MX_DMA_Init(); - 651 .loc 1 103 3 view .LVU184 - 652 000a FFF7FEFF bl MX_GPIO_Init - 653 .LVL23: - 104:Core/Src/main.c **** MX_ADC1_Init(); - 654 .loc 1 104 3 view .LVU185 - 655 000e FFF7FEFF bl MX_DMA_Init - 656 .LVL24: - 105:Core/Src/main.c **** MX_USB_DEVICE_Init(); - 657 .loc 1 105 3 view .LVU186 - 658 0012 FFF7FEFF bl MX_ADC1_Init - 659 .LVL25: - 106:Core/Src/main.c **** /* USER CODE BEGIN 2 */ - 660 .loc 1 106 3 view .LVU187 - 661 0016 FFF7FEFF bl MX_USB_DEVICE_Init - 662 .LVL26: - 108:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); - 663 .loc 1 108 3 view .LVU188 - 664 001a 0122 movs r2, #1 - 665 001c 8021 movs r1, #128 - 666 001e 7648 ldr r0, .L32+8 - 667 0020 FFF7FEFF bl HAL_GPIO_WritePin - 668 .LVL27: - 109:Core/Src/main.c **** - 669 .loc 1 109 3 view .LVU189 - 670 0024 6422 movs r2, #100 - 671 0026 7549 ldr r1, .L32+12 - 672 0028 7548 ldr r0, .L32+16 - 673 002a FFF7FEFF bl HAL_ADC_Start_DMA - 674 .LVL28: - 111:Core/Src/main.c **** ADC_proc_shadow.N = 0; - 675 .loc 1 111 3 view .LVU190 - 111:Core/Src/main.c **** ADC_proc_shadow.N = 0; - 676 .loc 1 111 26 is_stmt 0 view .LVU191 - 677 002e 754A ldr r2, .L32+20 - 678 0030 0023 movs r3, #0 - 679 0032 1370 strb r3, [r2] - 112:Core/Src/main.c **** ADC_proc_shadow.sum = 0; - 680 .loc 1 112 3 is_stmt 1 view .LVU192 - 112:Core/Src/main.c **** ADC_proc_shadow.sum = 0; - 681 .loc 1 112 21 is_stmt 0 view .LVU193 - 682 0034 D360 str r3, [r2, #12] - 113:Core/Src/main.c **** ADC_proc_shadow.avg = 0; - 683 .loc 1 113 3 is_stmt 1 view .LVU194 - 113:Core/Src/main.c **** ADC_proc_shadow.avg = 0; - 684 .loc 1 113 23 is_stmt 0 view .LVU195 - 685 0036 5360 str r3, [r2, #4] - 114:Core/Src/main.c **** - 686 .loc 1 114 3 is_stmt 1 view .LVU196 - 114:Core/Src/main.c **** - 687 .loc 1 114 23 is_stmt 0 view .LVU197 - ARM GAS /tmp/cc45044a.s page 38 + 626 .section .rodata.main.str1.4,"aMS",%progbits,1 + 627 .align 2 + 628 .LC0: + 629 0000 53776565 .ascii "Sweep_start\012\015\000" + 629 705F7374 + 629 6172740A + 629 0D00 + 630 .section .text.main,"ax",%progbits + 631 .align 1 + 632 .global main + 633 .syntax unified + 634 .thumb + 635 .thumb_func + 637 main: + 638 .LFB243: + 81:Core/Src/main.c **** + 639 .loc 1 81 1 view -0 + 640 .cfi_startproc + 641 @ args = 0, pretend = 0, frame = 0 + 642 @ frame_needed = 0, uses_anonymous_args = 0 + 643 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 644 .LCFI14: + 645 .cfi_def_cfa_offset 24 + 646 .cfi_offset 3, -24 + 647 .cfi_offset 4, -20 + 648 .cfi_offset 5, -16 + 649 .cfi_offset 6, -12 + 650 .cfi_offset 7, -8 + 651 .cfi_offset 14, -4 + 90:Core/Src/main.c **** + 652 .loc 1 90 3 view .LVU182 + 653 0002 FFF7FEFF bl HAL_Init + 654 .LVL21: + 97:Core/Src/main.c **** + 655 .loc 1 97 3 view .LVU183 + 656 0006 FFF7FEFF bl SystemClock_Config + 657 .LVL22: + 104:Core/Src/main.c **** MX_DMA_Init(); + 658 .loc 1 104 3 view .LVU184 + 659 000a FFF7FEFF bl MX_GPIO_Init + 660 .LVL23: + 105:Core/Src/main.c **** MX_ADC1_Init(); + 661 .loc 1 105 3 view .LVU185 + 662 000e FFF7FEFF bl MX_DMA_Init + 663 .LVL24: + 106:Core/Src/main.c **** MX_USB_DEVICE_Init(); + 664 .loc 1 106 3 view .LVU186 + 665 0012 FFF7FEFF bl MX_ADC1_Init + 666 .LVL25: + 107:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 667 .loc 1 107 3 view .LVU187 + 668 0016 FFF7FEFF bl MX_USB_DEVICE_Init + 669 .LVL26: + 109:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); + 670 .loc 1 109 3 view .LVU188 + 671 001a 0122 movs r2, #1 + 672 001c 8021 movs r1, #128 + ARM GAS /tmp/ccUsVHhJ.s page 38 - 688 0038 9360 str r3, [r2, #8] - 116:Core/Src/main.c **** ADC_proc.N = 0; - 689 .loc 1 116 3 is_stmt 1 view .LVU198 - 116:Core/Src/main.c **** ADC_proc.N = 0; - 690 .loc 1 116 19 is_stmt 0 view .LVU199 - 691 003a 734A ldr r2, .L32+24 - 692 003c 1370 strb r3, [r2] - 117:Core/Src/main.c **** ADC_proc.sum = 0; - 693 .loc 1 117 3 is_stmt 1 view .LVU200 - 117:Core/Src/main.c **** ADC_proc.sum = 0; - 694 .loc 1 117 14 is_stmt 0 view .LVU201 - 695 003e D360 str r3, [r2, #12] - 118:Core/Src/main.c **** ADC_proc.avg = 0; - 696 .loc 1 118 3 is_stmt 1 view .LVU202 - 118:Core/Src/main.c **** ADC_proc.avg = 0; - 697 .loc 1 118 16 is_stmt 0 view .LVU203 - 698 0040 5360 str r3, [r2, #4] - 119:Core/Src/main.c **** - 699 .loc 1 119 3 is_stmt 1 view .LVU204 - 119:Core/Src/main.c **** - 700 .loc 1 119 16 is_stmt 0 view .LVU205 - 701 0042 9360 str r3, [r2, #8] - 702 .L28: - 125:Core/Src/main.c **** { - 703 .loc 1 125 3 is_stmt 1 view .LVU206 - 127:Core/Src/main.c **** //HAL_Delay(100); - 704 .loc 1 127 5 view .LVU207 - 705 0044 4FF48041 mov r1, #16384 - 706 0048 6B48 ldr r0, .L32+8 - 707 004a FFF7FEFF bl HAL_GPIO_TogglePin - 708 .LVL29: - 130:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; - 709 .loc 1 130 5 view .LVU208 - 130:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; - 710 .loc 1 130 24 is_stmt 0 view .LVU209 - 711 004e 6D4B ldr r3, .L32+20 - 712 0050 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 713 0052 DBB2 uxtb r3, r3 - 130:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; - 714 .loc 1 130 8 view .LVU210 - 715 0054 022B cmp r3, #2 - 716 0056 F5D1 bne .L28 - 131:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation - 717 .loc 1 131 7 is_stmt 1 view .LVU211 - 131:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation - 718 .loc 1 131 44 is_stmt 0 view .LVU212 - 719 0058 6A4B ldr r3, .L32+20 - 720 005a 5A68 ldr r2, [r3, #4] - 131:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation - 721 .loc 1 131 66 view .LVU213 - 722 005c D968 ldr r1, [r3, #12] - 131:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation - 723 .loc 1 131 49 view .LVU214 - 724 005e B2FBF1F2 udiv r2, r2, r1 - 131:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation - 725 .loc 1 131 27 view .LVU215 - 726 0062 9A60 str r2, [r3, #8] - ARM GAS /tmp/cc45044a.s page 39 + 673 001e A048 ldr r0, .L33+8 + 674 0020 FFF7FEFF bl HAL_GPIO_WritePin + 675 .LVL27: + 110:Core/Src/main.c **** + 676 .loc 1 110 3 view .LVU189 + 677 0024 6422 movs r2, #100 + 678 0026 9F49 ldr r1, .L33+12 + 679 0028 9F48 ldr r0, .L33+16 + 680 002a FFF7FEFF bl HAL_ADC_Start_DMA + 681 .LVL28: + 112:Core/Src/main.c **** ADC_proc_shadow.N = 0; + 682 .loc 1 112 3 view .LVU190 + 112:Core/Src/main.c **** ADC_proc_shadow.N = 0; + 683 .loc 1 112 26 is_stmt 0 view .LVU191 + 684 002e 9F4A ldr r2, .L33+20 + 685 0030 0023 movs r3, #0 + 686 0032 1370 strb r3, [r2] + 113:Core/Src/main.c **** ADC_proc_shadow.sum = 0; + 687 .loc 1 113 3 is_stmt 1 view .LVU192 + 113:Core/Src/main.c **** ADC_proc_shadow.sum = 0; + 688 .loc 1 113 21 is_stmt 0 view .LVU193 + 689 0034 D360 str r3, [r2, #12] + 114:Core/Src/main.c **** ADC_proc_shadow.avg = 0; + 690 .loc 1 114 3 is_stmt 1 view .LVU194 + 114:Core/Src/main.c **** ADC_proc_shadow.avg = 0; + 691 .loc 1 114 23 is_stmt 0 view .LVU195 + 692 0036 5360 str r3, [r2, #4] + 115:Core/Src/main.c **** + 693 .loc 1 115 3 is_stmt 1 view .LVU196 + 115:Core/Src/main.c **** + 694 .loc 1 115 23 is_stmt 0 view .LVU197 + 695 0038 9360 str r3, [r2, #8] + 117:Core/Src/main.c **** ADC_proc.N = 0; + 696 .loc 1 117 3 is_stmt 1 view .LVU198 + 117:Core/Src/main.c **** ADC_proc.N = 0; + 697 .loc 1 117 19 is_stmt 0 view .LVU199 + 698 003a 9D4A ldr r2, .L33+24 + 699 003c 1370 strb r3, [r2] + 118:Core/Src/main.c **** ADC_proc.sum = 0; + 700 .loc 1 118 3 is_stmt 1 view .LVU200 + 118:Core/Src/main.c **** ADC_proc.sum = 0; + 701 .loc 1 118 14 is_stmt 0 view .LVU201 + 702 003e D360 str r3, [r2, #12] + 119:Core/Src/main.c **** ADC_proc.avg = 0; + 703 .loc 1 119 3 is_stmt 1 view .LVU202 + 119:Core/Src/main.c **** ADC_proc.avg = 0; + 704 .loc 1 119 16 is_stmt 0 view .LVU203 + 705 0040 5360 str r3, [r2, #4] + 120:Core/Src/main.c **** + 706 .loc 1 120 3 is_stmt 1 view .LVU204 + 120:Core/Src/main.c **** + 707 .loc 1 120 16 is_stmt 0 view .LVU205 + 708 0042 9360 str r3, [r2, #8] + 122:Core/Src/main.c **** uint32_t curr_points_N =0; + 709 .loc 1 122 3 is_stmt 1 view .LVU206 + 710 .LVL29: + 123:Core/Src/main.c **** + ARM GAS /tmp/ccUsVHhJ.s page 39 - 132:Core/Src/main.c **** ADC_proc_shadow.sum = 0; - 727 .loc 1 132 7 is_stmt 1 view .LVU216 - 132:Core/Src/main.c **** ADC_proc_shadow.sum = 0; - 728 .loc 1 132 30 is_stmt 0 view .LVU217 - 729 0064 0122 movs r2, #1 - 730 0066 1A70 strb r2, [r3] - 133:Core/Src/main.c **** ADC_proc_shadow.N = 0; - 731 .loc 1 133 7 is_stmt 1 view .LVU218 - 133:Core/Src/main.c **** ADC_proc_shadow.N = 0; - 732 .loc 1 133 27 is_stmt 0 view .LVU219 - 733 0068 0021 movs r1, #0 - 734 006a 5960 str r1, [r3, #4] - 134:Core/Src/main.c **** - 735 .loc 1 134 7 is_stmt 1 view .LVU220 - 134:Core/Src/main.c **** - 736 .loc 1 134 25 is_stmt 0 view .LVU221 - 737 006c D960 str r1, [r3, #12] - 137:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; - 738 .loc 1 137 7 is_stmt 1 view .LVU222 - 137:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; - 739 .loc 1 137 54 is_stmt 0 view .LVU223 - 740 006e 9868 ldr r0, [r3, #8] - 137:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; - 741 .loc 1 137 59 view .LVU224 - 742 0070 5FA3 adr r3, .L32 - 743 0072 D3E90023 ldrd r2, [r3] - 744 0076 FFF7FEFF bl __aeabi_ldivmod - 745 .LVL30: - 746 007a 8446 mov ip, r0 - 137:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; - 747 .loc 1 137 74 view .LVU225 - 748 007c 4FEAE17E asr lr, r1, #31 - 749 0080 0EF00302 and r2, lr, #3 - 750 0084 20F07043 bic r3, r0, #-268435456 - 751 0088 000F lsrs r0, r0, #28 - 752 008a 40EA0110 orr r0, r0, r1, lsl #4 - 753 008e 20F07040 bic r0, r0, #-268435456 - 754 0092 0344 add r3, r3, r0 - 755 0094 03EB1163 add r3, r3, r1, lsr #24 - 756 0098 1344 add r3, r3, r2 - 757 009a 5C4A ldr r2, .L32+28 - 758 009c A2FB0304 umull r0, r4, r2, r3 - 759 00a0 24F00300 bic r0, r4, #3 - 760 00a4 00EB9400 add r0, r0, r4, lsr #2 - 761 00a8 1B1A subs r3, r3, r0 - 762 00aa 2EF0030E bic lr, lr, #3 - 763 00ae 7344 add r3, r3, lr - 764 00b0 BCEB0300 subs r0, ip, r3 - 765 00b4 61EBE371 sbc r1, r1, r3, asr #31 - 766 00b8 4FF0CC33 mov r3, #-858993460 - 767 00bc 00FB03F3 mul r3, r0, r3 - 768 00c0 02FB0133 mla r3, r2, r1, r3 - 769 00c4 A0FB0202 umull r0, r2, r0, r2 - 770 00c8 1A44 add r2, r2, r3 - 771 00ca D30F lsrs r3, r2, #31 - 772 00cc 1B18 adds r3, r3, r0 - 773 00ce 42F10002 adc r2, r2, #0 - ARM GAS /tmp/cc45044a.s page 40 + 711 .loc 1 123 3 view .LVU207 + 712 .L28: + 129:Core/Src/main.c **** { + 713 .loc 1 129 3 view .LVU208 + 134:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; + 714 .loc 1 134 5 view .LVU209 + 134:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; + 715 .loc 1 134 24 is_stmt 0 view .LVU210 + 716 0044 994B ldr r3, .L33+20 + 717 0046 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 718 0048 DBB2 uxtb r3, r3 + 134:Core/Src/main.c **** ADC_proc_shadow.avg = ADC_proc_shadow.sum / ADC_proc_shadow.N; + 719 .loc 1 134 8 view .LVU211 + 720 004a 022B cmp r3, #2 + 721 004c FAD1 bne .L28 + 135:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation + 722 .loc 1 135 7 is_stmt 1 view .LVU212 + 135:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation + 723 .loc 1 135 44 is_stmt 0 view .LVU213 + 724 004e 974B ldr r3, .L33+20 + 725 0050 5A68 ldr r2, [r3, #4] + 135:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation + 726 .loc 1 135 66 view .LVU214 + 727 0052 D968 ldr r1, [r3, #12] + 135:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation + 728 .loc 1 135 49 view .LVU215 + 729 0054 B2FBF1F2 udiv r2, r2, r1 + 135:Core/Src/main.c **** ADC_proc_shadow.status = 1; // reset for next accumulation + 730 .loc 1 135 27 view .LVU216 + 731 0058 9A60 str r2, [r3, #8] + 136:Core/Src/main.c **** ADC_proc_shadow.sum = 0; + 732 .loc 1 136 7 is_stmt 1 view .LVU217 + 136:Core/Src/main.c **** ADC_proc_shadow.sum = 0; + 733 .loc 1 136 30 is_stmt 0 view .LVU218 + 734 005a 0122 movs r2, #1 + 735 005c 1A70 strb r2, [r3] + 137:Core/Src/main.c **** ADC_proc_shadow.N = 0; + 736 .loc 1 137 7 is_stmt 1 view .LVU219 + 137:Core/Src/main.c **** ADC_proc_shadow.N = 0; + 737 .loc 1 137 27 is_stmt 0 view .LVU220 + 738 005e 0021 movs r1, #0 + 739 0060 5960 str r1, [r3, #4] + 138:Core/Src/main.c **** + 740 .loc 1 138 7 is_stmt 1 view .LVU221 + 138:Core/Src/main.c **** + 741 .loc 1 138 25 is_stmt 0 view .LVU222 + 742 0062 D960 str r1, [r3, #12] + 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; + 743 .loc 1 141 7 is_stmt 1 view .LVU223 + 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; + 744 .loc 1 141 54 is_stmt 0 view .LVU224 + 745 0064 9868 ldr r0, [r3, #8] + 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; + 746 .loc 1 141 59 view .LVU225 + 747 0066 8CA3 adr r3, .L33 + 748 0068 D3E90023 ldrd r2, [r3] + 749 006c FFF7FEFF bl __aeabi_ldivmod + ARM GAS /tmp/ccUsVHhJ.s page 40 - 774 00d2 5B08 lsrs r3, r3, #1 - 775 00d4 43EAC273 orr r3, r3, r2, lsl #31 - 776 00d8 03EB8303 add r3, r3, r3, lsl #2 - 777 00dc ACEB430C sub ip, ip, r3, lsl #1 - 137:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; - 778 .loc 1 137 79 view .LVU226 - 779 00e0 0CF1300C add ip, ip, #48 - 137:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; - 780 .loc 1 137 36 view .LVU227 - 781 00e4 4A48 ldr r0, .L32+32 - 782 00e6 80F814C0 strb ip, [r0, #20] - 138:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; - 783 .loc 1 138 7 is_stmt 1 view .LVU228 - 138:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; - 784 .loc 1 138 54 is_stmt 0 view .LVU229 - 785 00ea 4649 ldr r1, .L32+20 - 786 00ec 8A68 ldr r2, [r1, #8] - 138:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; - 787 .loc 1 138 59 view .LVU230 - 788 00ee 520A lsrs r2, r2, #9 - 789 00f0 484B ldr r3, .L32+36 - 790 00f2 A3FB0232 umull r3, r2, r3, r2 - 138:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; - 791 .loc 1 138 73 view .LVU231 - 792 00f6 454B ldr r3, .L32+28 - 793 00f8 D209 lsrs r2, r2, #7 - 138:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; - 794 .loc 1 138 78 view .LVU232 - 795 00fa 3032 adds r2, r2, #48 - 138:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; - 796 .loc 1 138 36 view .LVU233 - 797 00fc 4275 strb r2, [r0, #21] - 139:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; - 798 .loc 1 139 7 is_stmt 1 view .LVU234 - 139:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; - 799 .loc 1 139 54 is_stmt 0 view .LVU235 - 800 00fe 8A68 ldr r2, [r1, #8] - 139:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; - 801 .loc 1 139 59 view .LVU236 - 802 0100 454C ldr r4, .L32+40 - 803 0102 A4FB024C umull r4, ip, r4, r2 - 804 0106 4FEA9C5C lsr ip, ip, #22 - 139:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; - 805 .loc 1 139 71 view .LVU237 - 806 010a A3FB0C42 umull r4, r2, r3, ip - 807 010e D208 lsrs r2, r2, #3 - 808 0110 02EB8202 add r2, r2, r2, lsl #2 - 809 0114 ACEB4202 sub r2, ip, r2, lsl #1 - 139:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; - 810 .loc 1 139 76 view .LVU238 - 811 0118 3032 adds r2, r2, #48 - 139:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; - 812 .loc 1 139 36 view .LVU239 - 813 011a 8275 strb r2, [r0, #22] - 140:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; - 814 .loc 1 140 7 is_stmt 1 view .LVU240 - 140:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; - ARM GAS /tmp/cc45044a.s page 41 + 750 .LVL30: + 751 0070 8446 mov ip, r0 + 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; + 752 .loc 1 141 74 view .LVU226 + 753 0072 CC17 asrs r4, r1, #31 + 754 0074 04F00302 and r2, r4, #3 + 755 0078 20F07043 bic r3, r0, #-268435456 + 756 007c 000F lsrs r0, r0, #28 + 757 007e 40EA0110 orr r0, r0, r1, lsl #4 + 758 0082 20F07040 bic r0, r0, #-268435456 + 759 0086 0344 add r3, r3, r0 + 760 0088 03EB1163 add r3, r3, r1, lsr #24 + 761 008c 1344 add r3, r3, r2 + 762 008e 894A ldr r2, .L33+28 + 763 0090 A2FB0305 umull r0, r5, r2, r3 + 764 0094 25F00300 bic r0, r5, #3 + 765 0098 00EB9500 add r0, r0, r5, lsr #2 + 766 009c 1B1A subs r3, r3, r0 + 767 009e 24F00304 bic r4, r4, #3 + 768 00a2 2344 add r3, r3, r4 + 769 00a4 BCEB0300 subs r0, ip, r3 + 770 00a8 61EBE371 sbc r1, r1, r3, asr #31 + 771 00ac 4FF0CC33 mov r3, #-858993460 + 772 00b0 00FB03F3 mul r3, r0, r3 + 773 00b4 02FB0133 mla r3, r2, r1, r3 + 774 00b8 A0FB0202 umull r0, r2, r0, r2 + 775 00bc 1A44 add r2, r2, r3 + 776 00be D30F lsrs r3, r2, #31 + 777 00c0 1B18 adds r3, r3, r0 + 778 00c2 42F10002 adc r2, r2, #0 + 779 00c6 5B08 lsrs r3, r3, #1 + 780 00c8 43EAC273 orr r3, r3, r2, lsl #31 + 781 00cc 03EB8303 add r3, r3, r3, lsl #2 + 782 00d0 ACEB430C sub ip, ip, r3, lsl #1 + 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; + 783 .loc 1 141 79 view .LVU227 + 784 00d4 0CF1300C add ip, ip, #48 + 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 1] = (ADC_proc_shadow.avg / 1000000000) % 10 + '0'; + 785 .loc 1 141 36 view .LVU228 + 786 00d8 7748 ldr r0, .L33+32 + 787 00da 80F814C0 strb ip, [r0, #20] + 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; + 788 .loc 1 142 7 is_stmt 1 view .LVU229 + 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; + 789 .loc 1 142 54 is_stmt 0 view .LVU230 + 790 00de 734C ldr r4, .L33+20 + 791 00e0 A268 ldr r2, [r4, #8] + 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; + 792 .loc 1 142 59 view .LVU231 + 793 00e2 520A lsrs r2, r2, #9 + 794 00e4 754B ldr r3, .L33+36 + 795 00e6 A3FB0232 umull r3, r2, r3, r2 + 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; + 796 .loc 1 142 73 view .LVU232 + 797 00ea 724B ldr r3, .L33+28 + 798 00ec D209 lsrs r2, r2, #7 + 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; + ARM GAS /tmp/ccUsVHhJ.s page 41 - 815 .loc 1 140 54 is_stmt 0 view .LVU241 - 816 011c 8A68 ldr r2, [r1, #8] - 140:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; - 817 .loc 1 140 59 view .LVU242 - 818 011e 3F4C ldr r4, .L32+44 - 819 0120 A4FB024C umull r4, ip, r4, r2 - 820 0124 4FEA9C4C lsr ip, ip, #18 - 140:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; - 821 .loc 1 140 70 view .LVU243 - 822 0128 A3FB0C42 umull r4, r2, r3, ip - 823 012c D208 lsrs r2, r2, #3 - 824 012e 02EB8202 add r2, r2, r2, lsl #2 - 825 0132 ACEB4202 sub r2, ip, r2, lsl #1 - 140:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; - 826 .loc 1 140 75 view .LVU244 - 827 0136 3032 adds r2, r2, #48 - 140:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; - 828 .loc 1 140 36 view .LVU245 - 829 0138 C275 strb r2, [r0, #23] - 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; - 830 .loc 1 141 7 is_stmt 1 view .LVU246 - 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; - 831 .loc 1 141 54 is_stmt 0 view .LVU247 - 832 013a 8A68 ldr r2, [r1, #8] - 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; - 833 .loc 1 141 59 view .LVU248 - 834 013c 4FEA521C lsr ip, r2, #5 - 835 0140 374A ldr r2, .L32+48 - 836 0142 A2FB0C2C umull r2, ip, r2, ip - 837 0146 4FEADC1C lsr ip, ip, #7 - 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; - 838 .loc 1 141 69 view .LVU249 - 839 014a A3FB0C42 umull r4, r2, r3, ip - 840 014e D208 lsrs r2, r2, #3 - 841 0150 02EB8202 add r2, r2, r2, lsl #2 - 842 0154 ACEB4202 sub r2, ip, r2, lsl #1 - 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; - 843 .loc 1 141 74 view .LVU250 - 844 0158 3032 adds r2, r2, #48 - 141:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; - 845 .loc 1 141 36 view .LVU251 - 846 015a 0276 strb r2, [r0, #24] - 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; - 847 .loc 1 142 7 is_stmt 1 view .LVU252 - 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; - 848 .loc 1 142 54 is_stmt 0 view .LVU253 - 849 015c 8A68 ldr r2, [r1, #8] - 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; - 850 .loc 1 142 59 view .LVU254 - 851 015e 314C ldr r4, .L32+52 - 852 0160 A4FB024C umull r4, ip, r4, r2 - 853 0164 4FEA5C3C lsr ip, ip, #13 - 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; - 854 .loc 1 142 68 view .LVU255 - 855 0168 A3FB0C42 umull r4, r2, r3, ip - 856 016c D208 lsrs r2, r2, #3 - 857 016e 02EB8202 add r2, r2, r2, lsl #2 - ARM GAS /tmp/cc45044a.s page 42 + 799 .loc 1 142 78 view .LVU233 + 800 00ee 3032 adds r2, r2, #48 + 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 2] = (ADC_proc_shadow.avg / 10000000) % 10 + '0'; + 801 .loc 1 142 36 view .LVU234 + 802 00f0 4275 strb r2, [r0, #21] + 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; + 803 .loc 1 143 7 is_stmt 1 view .LVU235 + 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; + 804 .loc 1 143 54 is_stmt 0 view .LVU236 + 805 00f2 A168 ldr r1, [r4, #8] + 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; + 806 .loc 1 143 59 view .LVU237 + 807 00f4 724A ldr r2, .L33+40 + 808 00f6 A2FB0121 umull r2, r1, r2, r1 + 809 00fa 890D lsrs r1, r1, #22 + 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; + 810 .loc 1 143 71 view .LVU238 + 811 00fc A3FB0152 umull r5, r2, r3, r1 + 812 0100 D208 lsrs r2, r2, #3 + 813 0102 02EB8202 add r2, r2, r2, lsl #2 + 814 0106 A1EB4202 sub r2, r1, r2, lsl #1 + 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; + 815 .loc 1 143 76 view .LVU239 + 816 010a 3032 adds r2, r2, #48 + 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 3] = (ADC_proc_shadow.avg / 1000000) % 10 + '0'; + 817 .loc 1 143 36 view .LVU240 + 818 010c 8275 strb r2, [r0, #22] + 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; + 819 .loc 1 144 7 is_stmt 1 view .LVU241 + 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; + 820 .loc 1 144 54 is_stmt 0 view .LVU242 + 821 010e A168 ldr r1, [r4, #8] + 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; + 822 .loc 1 144 59 view .LVU243 + 823 0110 6C4A ldr r2, .L33+44 + 824 0112 A2FB0121 umull r2, r1, r2, r1 + 825 0116 890C lsrs r1, r1, #18 + 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; + 826 .loc 1 144 70 view .LVU244 + 827 0118 A3FB0152 umull r5, r2, r3, r1 + 828 011c D208 lsrs r2, r2, #3 + 829 011e 02EB8202 add r2, r2, r2, lsl #2 + 830 0122 A1EB4202 sub r2, r1, r2, lsl #1 + 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; + 831 .loc 1 144 75 view .LVU245 + 832 0126 3032 adds r2, r2, #48 + 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 4] = (ADC_proc_shadow.avg / 100000) % 10 + '0'; + 833 .loc 1 144 36 view .LVU246 + 834 0128 C275 strb r2, [r0, #23] + 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; + 835 .loc 1 145 7 is_stmt 1 view .LVU247 + 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; + 836 .loc 1 145 54 is_stmt 0 view .LVU248 + 837 012a A168 ldr r1, [r4, #8] + 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; + 838 .loc 1 145 59 view .LVU249 + 839 012c 4909 lsrs r1, r1, #5 + ARM GAS /tmp/ccUsVHhJ.s page 42 - 858 0172 ACEB4202 sub r2, ip, r2, lsl #1 - 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; - 859 .loc 1 142 73 view .LVU256 - 860 0176 3032 adds r2, r2, #48 - 142:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; - 861 .loc 1 142 36 view .LVU257 - 862 0178 4276 strb r2, [r0, #25] - 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; - 863 .loc 1 143 7 is_stmt 1 view .LVU258 - 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; - 864 .loc 1 143 54 is_stmt 0 view .LVU259 - 865 017a 8A68 ldr r2, [r1, #8] - 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; - 866 .loc 1 143 59 view .LVU260 - 867 017c 2A4C ldr r4, .L32+56 - 868 017e A4FB024C umull r4, ip, r4, r2 - 869 0182 4FEA9C1C lsr ip, ip, #6 - 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; - 870 .loc 1 143 67 view .LVU261 - 871 0186 A3FB0C42 umull r4, r2, r3, ip - 872 018a D208 lsrs r2, r2, #3 - 873 018c 02EB8202 add r2, r2, r2, lsl #2 - 874 0190 ACEB4202 sub r2, ip, r2, lsl #1 - 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; - 875 .loc 1 143 72 view .LVU262 - 876 0194 3032 adds r2, r2, #48 - 143:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; - 877 .loc 1 143 36 view .LVU263 - 878 0196 8276 strb r2, [r0, #26] - 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; - 879 .loc 1 144 7 is_stmt 1 view .LVU264 - 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; - 880 .loc 1 144 54 is_stmt 0 view .LVU265 - 881 0198 8A68 ldr r2, [r1, #8] - 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; - 882 .loc 1 144 59 view .LVU266 - 883 019a 244C ldr r4, .L32+60 - 884 019c A4FB024C umull r4, ip, r4, r2 - 885 01a0 4FEA5C1C lsr ip, ip, #5 - 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; - 886 .loc 1 144 66 view .LVU267 - 887 01a4 A3FB0C42 umull r4, r2, r3, ip - 888 01a8 D208 lsrs r2, r2, #3 - 889 01aa 02EB8202 add r2, r2, r2, lsl #2 - 890 01ae ACEB4202 sub r2, ip, r2, lsl #1 - 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; - 891 .loc 1 144 71 view .LVU268 - 892 01b2 3032 adds r2, r2, #48 - 144:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; - 893 .loc 1 144 36 view .LVU269 - 894 01b4 C276 strb r2, [r0, #27] - 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; - 895 .loc 1 145 7 is_stmt 1 view .LVU270 - 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; - 896 .loc 1 145 54 is_stmt 0 view .LVU271 - 897 01b6 8A68 ldr r2, [r1, #8] - 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; - ARM GAS /tmp/cc45044a.s page 43 + 840 012e 664F ldr r7, .L33+48 + 841 0130 A7FB0121 umull r2, r1, r7, r1 + 842 0134 C909 lsrs r1, r1, #7 + 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; + 843 .loc 1 145 69 view .LVU250 + 844 0136 A3FB0152 umull r5, r2, r3, r1 + 845 013a D208 lsrs r2, r2, #3 + 846 013c 02EB8202 add r2, r2, r2, lsl #2 + 847 0140 A1EB4202 sub r2, r1, r2, lsl #1 + 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; + 848 .loc 1 145 74 view .LVU251 + 849 0144 3032 adds r2, r2, #48 + 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 5] = (ADC_proc_shadow.avg / 10000) % 10 + '0'; + 850 .loc 1 145 36 view .LVU252 + 851 0146 0276 strb r2, [r0, #24] + 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; + 852 .loc 1 146 7 is_stmt 1 view .LVU253 + 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; + 853 .loc 1 146 54 is_stmt 0 view .LVU254 + 854 0148 A168 ldr r1, [r4, #8] + 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; + 855 .loc 1 146 59 view .LVU255 + 856 014a 604E ldr r6, .L33+52 + 857 014c A6FB0121 umull r2, r1, r6, r1 + 858 0150 490B lsrs r1, r1, #13 + 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; + 859 .loc 1 146 68 view .LVU256 + 860 0152 A3FB0152 umull r5, r2, r3, r1 + 861 0156 D208 lsrs r2, r2, #3 + 862 0158 02EB8202 add r2, r2, r2, lsl #2 + 863 015c A1EB4202 sub r2, r1, r2, lsl #1 + 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; + 864 .loc 1 146 73 view .LVU257 + 865 0160 3032 adds r2, r2, #48 + 146:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 6] = (ADC_proc_shadow.avg / 1000) % 10 + '0'; + 866 .loc 1 146 36 view .LVU258 + 867 0162 4276 strb r2, [r0, #25] + 147:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; + 868 .loc 1 147 7 is_stmt 1 view .LVU259 + 147:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; + 869 .loc 1 147 54 is_stmt 0 view .LVU260 + 870 0164 A168 ldr r1, [r4, #8] + 147:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; + 871 .loc 1 147 59 view .LVU261 + 872 0166 5A4D ldr r5, .L33+56 + 873 0168 A5FB0121 umull r2, r1, r5, r1 + 874 016c 8909 lsrs r1, r1, #6 + 147:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; + 875 .loc 1 147 67 view .LVU262 + 876 016e A3FB01C2 umull ip, r2, r3, r1 + 877 0172 D208 lsrs r2, r2, #3 + 878 0174 02EB8202 add r2, r2, r2, lsl #2 + 879 0178 A1EB4202 sub r2, r1, r2, lsl #1 + 147:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; + 880 .loc 1 147 72 view .LVU263 + 881 017c 3032 adds r2, r2, #48 + 147:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 7] = (ADC_proc_shadow.avg / 100) % 10 + '0'; + ARM GAS /tmp/ccUsVHhJ.s page 43 - 898 .loc 1 145 59 view .LVU272 - 899 01b8 A3FB022C umull r2, ip, r3, r2 - 900 01bc 4FEADC0C lsr ip, ip, #3 - 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; - 901 .loc 1 145 65 view .LVU273 - 902 01c0 A3FB0C42 umull r4, r2, r3, ip - 903 01c4 D208 lsrs r2, r2, #3 - 904 01c6 02EB8202 add r2, r2, r2, lsl #2 - 905 01ca ACEB4202 sub r2, ip, r2, lsl #1 - 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; - 906 .loc 1 145 70 view .LVU274 - 907 01ce 3032 adds r2, r2, #48 - 145:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; - 908 .loc 1 145 36 view .LVU275 - 909 01d0 0277 strb r2, [r0, #28] - 146:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); - 910 .loc 1 146 7 is_stmt 1 view .LVU276 - 146:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); - 911 .loc 1 146 54 is_stmt 0 view .LVU277 - 912 01d2 8A68 ldr r2, [r1, #8] - 146:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); - 913 .loc 1 146 64 view .LVU278 - 914 01d4 A3FB0213 umull r1, r3, r3, r2 - 915 01d8 DB08 lsrs r3, r3, #3 - 916 01da 03EB8303 add r3, r3, r3, lsl #2 - 917 01de A2EB4303 sub r3, r2, r3, lsl #1 - 146:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); - 918 .loc 1 146 69 view .LVU279 - 919 01e2 3033 adds r3, r3, #48 - 146:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)ADC_msg, ADC_msg_len); - 920 .loc 1 146 36 view .LVU280 - 921 01e4 4377 strb r3, [r0, #29] - 147:Core/Src/main.c **** - 922 .loc 1 147 7 is_stmt 1 view .LVU281 - 923 01e6 2021 movs r1, #32 - 924 01e8 FFF7FEFF bl CDC_Transmit_FS - 925 .LVL31: - 926 01ec 2AE7 b .L28 - 927 .L33: - 928 01ee 00BF .align 3 - 929 .L32: - 930 01f0 00E40B54 .word 1410065408 - 931 01f4 02000000 .word 2 - 932 01f8 00040240 .word 1073873920 - 933 01fc 00000000 .word ADC1_buff_circular - 934 0200 00000000 .word hadc1 - 935 0204 00000000 .word ADC_proc_shadow - 936 0208 00000000 .word ADC_proc - 937 020c CDCCCCCC .word -858993459 - 938 0210 00000000 .word ADC_msg - 939 0214 834B0400 .word 281475 - 940 0218 6BCA5F6B .word 1801439851 - 941 021c 83DE1B43 .word 1125899907 - 942 0220 C55A7C0A .word 175921861 - 943 0224 5917B7D1 .word -776530087 - 944 0228 D34D6210 .word 274877907 - 945 022c 1F85EB51 .word 1374389535 - ARM GAS /tmp/cc45044a.s page 44 + 882 .loc 1 147 36 view .LVU264 + 883 017e 8276 strb r2, [r0, #26] + 148:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; + 884 .loc 1 148 7 is_stmt 1 view .LVU265 + 148:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; + 885 .loc 1 148 54 is_stmt 0 view .LVU266 + 886 0180 A268 ldr r2, [r4, #8] + 148:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; + 887 .loc 1 148 59 view .LVU267 + 888 0182 5449 ldr r1, .L33+60 + 889 0184 A1FB022C umull r2, ip, r1, r2 + 890 0188 4FEA5C1C lsr ip, ip, #5 + 148:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; + 891 .loc 1 148 66 view .LVU268 + 892 018c A3FB0CE2 umull lr, r2, r3, ip + 893 0190 D208 lsrs r2, r2, #3 + 894 0192 02EB8202 add r2, r2, r2, lsl #2 + 895 0196 ACEB4202 sub r2, ip, r2, lsl #1 + 148:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; + 896 .loc 1 148 71 view .LVU269 + 897 019a 3032 adds r2, r2, #48 + 148:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 8] = (ADC_proc_shadow.avg / 10) % 10 + '0'; + 898 .loc 1 148 36 view .LVU270 + 899 019c C276 strb r2, [r0, #27] + 149:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + 900 .loc 1 149 7 is_stmt 1 view .LVU271 + 149:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + 901 .loc 1 149 54 is_stmt 0 view .LVU272 + 902 019e A268 ldr r2, [r4, #8] + 149:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + 903 .loc 1 149 59 view .LVU273 + 904 01a0 A3FB022C umull r2, ip, r3, r2 + 905 01a4 4FEADC0C lsr ip, ip, #3 + 149:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + 906 .loc 1 149 65 view .LVU274 + 907 01a8 A3FB0CE2 umull lr, r2, r3, ip + 908 01ac D208 lsrs r2, r2, #3 + 909 01ae 02EB8202 add r2, r2, r2, lsl #2 + 910 01b2 ACEB4202 sub r2, ip, r2, lsl #1 + 149:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + 911 .loc 1 149 70 view .LVU275 + 912 01b6 3032 adds r2, r2, #48 + 149:Core/Src/main.c **** ADC_msg[ADC_msg_val_pos + 9] = (ADC_proc_shadow.avg / 1) % 10 + '0'; + 913 .loc 1 149 36 view .LVU276 + 914 01b8 0277 strb r2, [r0, #28] + 150:Core/Src/main.c **** + 915 .loc 1 150 7 is_stmt 1 view .LVU277 + 150:Core/Src/main.c **** + 916 .loc 1 150 54 is_stmt 0 view .LVU278 + 917 01ba A468 ldr r4, [r4, #8] + 150:Core/Src/main.c **** + 918 .loc 1 150 64 view .LVU279 + 919 01bc A3FB04C2 umull ip, r2, r3, r4 + 920 01c0 D208 lsrs r2, r2, #3 + 921 01c2 02EB8202 add r2, r2, r2, lsl #2 + 922 01c6 A4EB4202 sub r2, r4, r2, lsl #1 + 150:Core/Src/main.c **** + ARM GAS /tmp/ccUsVHhJ.s page 44 - 946 .cfi_endproc - 947 .LFE243: - 949 .global ADC_msg - 950 .section .data.ADC_msg,"aw" - 951 .align 2 - 954 ADC_msg: - 955 0000 52656365 .ascii "Received ADC value: ??????????\015\012\000" - 955 69766564 - 955 20414443 - 955 2076616C - 955 75653A20 - 956 .global ADC1_buff_circular - 957 .section .bss.ADC1_buff_circular,"aw",%nobits - 958 .align 2 - 961 ADC1_buff_circular: - 962 0000 00000000 .space 200 - 962 00000000 - 962 00000000 - 962 00000000 - 962 00000000 - 963 .global curr_step_start_N - 964 .section .bss.curr_step_start_N,"aw",%nobits - 965 .align 2 - 968 curr_step_start_N: - 969 0000 00000000 .space 4 - 970 .global Sweep_state - 971 .section .bss.Sweep_state,"aw",%nobits - 972 .align 2 - 975 Sweep_state: - 976 0000 00000000 .space 12 - 976 00000000 - 976 00000000 - 977 .global ADC_proc_shadow - 978 .section .bss.ADC_proc_shadow,"aw",%nobits - 979 .align 2 - 982 ADC_proc_shadow: - 983 0000 00000000 .space 16 - 983 00000000 - 983 00000000 - 983 00000000 - 984 .global ADC_proc - 985 .section .bss.ADC_proc,"aw",%nobits - 986 .align 2 - 989 ADC_proc: - 990 0000 00000000 .space 16 - 990 00000000 - 990 00000000 - 990 00000000 - 991 .global hdma_adc1 - 992 .section .bss.hdma_adc1,"aw",%nobits - 993 .align 2 - 996 hdma_adc1: - 997 0000 00000000 .space 96 - 997 00000000 - 997 00000000 - 997 00000000 - 997 00000000 - ARM GAS /tmp/cc45044a.s page 45 + 923 .loc 1 150 69 view .LVU280 + 924 01ca 3032 adds r2, r2, #48 + 150:Core/Src/main.c **** + 925 .loc 1 150 36 view .LVU281 + 926 01cc 4277 strb r2, [r0, #29] + 152:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + 927 .loc 1 152 7 is_stmt 1 view .LVU282 + 152:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + 928 .loc 1 152 51 is_stmt 0 view .LVU283 + 929 01ce 424C ldr r4, .L33+64 + 930 01d0 2268 ldr r2, [r4] + 152:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + 931 .loc 1 152 64 view .LVU284 + 932 01d2 5209 lsrs r2, r2, #5 + 933 01d4 A7FB0272 umull r7, r2, r7, r2 + 934 01d8 D709 lsrs r7, r2, #7 + 152:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + 935 .loc 1 152 74 view .LVU285 + 936 01da A3FB07C2 umull ip, r2, r3, r7 + 937 01de D208 lsrs r2, r2, #3 + 938 01e0 02EB8202 add r2, r2, r2, lsl #2 + 939 01e4 A7EB4202 sub r2, r7, r2, lsl #1 + 152:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + 940 .loc 1 152 79 view .LVU286 + 941 01e8 3032 adds r2, r2, #48 + 152:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 1] = (Sweep_state.curr_step_N / 10000) % 10 + '0'; + 942 .loc 1 152 37 view .LVU287 + 943 01ea 0273 strb r2, [r0, #12] + 153:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + 944 .loc 1 153 7 is_stmt 1 view .LVU288 + 153:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + 945 .loc 1 153 51 is_stmt 0 view .LVU289 + 946 01ec 2268 ldr r2, [r4] + 153:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + 947 .loc 1 153 64 view .LVU290 + 948 01ee A6FB0262 umull r6, r2, r6, r2 + 949 01f2 560B lsrs r6, r2, #13 + 153:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + 950 .loc 1 153 73 view .LVU291 + 951 01f4 A3FB0672 umull r7, r2, r3, r6 + 952 01f8 D208 lsrs r2, r2, #3 + 953 01fa 02EB8202 add r2, r2, r2, lsl #2 + 954 01fe A6EB4202 sub r2, r6, r2, lsl #1 + 153:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + 955 .loc 1 153 78 view .LVU292 + 956 0202 3032 adds r2, r2, #48 + 153:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 2] = (Sweep_state.curr_step_N / 1000) % 10 + '0'; + 957 .loc 1 153 37 view .LVU293 + 958 0204 4273 strb r2, [r0, #13] + 154:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + 959 .loc 1 154 7 is_stmt 1 view .LVU294 + 154:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + 960 .loc 1 154 51 is_stmt 0 view .LVU295 + 961 0206 2268 ldr r2, [r4] + 154:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + 962 .loc 1 154 64 view .LVU296 + 963 0208 A5FB0252 umull r5, r2, r5, r2 + ARM GAS /tmp/ccUsVHhJ.s page 45 - 998 .global hadc1 - 999 .section .bss.hadc1,"aw",%nobits - 1000 .align 2 - 1003 hadc1: - 1004 0000 00000000 .space 72 - 1004 00000000 - 1004 00000000 - 1004 00000000 - 1004 00000000 - 1005 .text - 1006 .Letext0: - 1007 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" - 1008 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 1009 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" - 1010 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" - 1011 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" - 1012 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" - 1013 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" - 1014 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" - 1015 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" - 1016 .file 12 "Core/Inc/main.h" - 1017 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h" - 1018 .file 14 "USB_DEVICE/App/usbd_cdc_if.h" - 1019 .file 15 "USB_DEVICE/App/usb_device.h" - 1020 .file 16 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" - 1021 .file 17 "" - ARM GAS /tmp/cc45044a.s page 46 + 964 020c 9509 lsrs r5, r2, #6 + 154:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + 965 .loc 1 154 72 view .LVU297 + 966 020e A3FB0562 umull r6, r2, r3, r5 + 967 0212 D208 lsrs r2, r2, #3 + 968 0214 02EB8202 add r2, r2, r2, lsl #2 + 969 0218 A5EB4202 sub r2, r5, r2, lsl #1 + 154:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + 970 .loc 1 154 77 view .LVU298 + 971 021c 3032 adds r2, r2, #48 + 154:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 3] = (Sweep_state.curr_step_N / 100) % 10 + '0'; + 972 .loc 1 154 37 view .LVU299 + 973 021e 8273 strb r2, [r0, #14] + 155:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + 974 .loc 1 155 7 is_stmt 1 view .LVU300 + 155:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + 975 .loc 1 155 51 is_stmt 0 view .LVU301 + 976 0220 2268 ldr r2, [r4] + 155:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + 977 .loc 1 155 64 view .LVU302 + 978 0222 A1FB0212 umull r1, r2, r1, r2 + 979 0226 5109 lsrs r1, r2, #5 + 155:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + 980 .loc 1 155 71 view .LVU303 + 981 0228 A3FB0152 umull r5, r2, r3, r1 + 982 022c D208 lsrs r2, r2, #3 + 983 022e 02EB8202 add r2, r2, r2, lsl #2 + 984 0232 A1EB4202 sub r2, r1, r2, lsl #1 + 155:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + 985 .loc 1 155 76 view .LVU304 + 986 0236 3032 adds r2, r2, #48 + 155:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 4] = (Sweep_state.curr_step_N / 10) % 10 + '0'; + 987 .loc 1 155 37 view .LVU305 + 988 0238 C273 strb r2, [r0, #15] + 156:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + 989 .loc 1 156 7 is_stmt 1 view .LVU306 + 156:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + 990 .loc 1 156 51 is_stmt 0 view .LVU307 + 991 023a 2168 ldr r1, [r4] + 156:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + 992 .loc 1 156 64 view .LVU308 + 993 023c A3FB0121 umull r2, r1, r3, r1 + 994 0240 C908 lsrs r1, r1, #3 + 156:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + 995 .loc 1 156 70 view .LVU309 + 996 0242 A3FB0152 umull r5, r2, r3, r1 + 997 0246 D208 lsrs r2, r2, #3 + 998 0248 02EB8202 add r2, r2, r2, lsl #2 + 999 024c A1EB4202 sub r2, r1, r2, lsl #1 + 156:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + 1000 .loc 1 156 75 view .LVU310 + 1001 0250 3032 adds r2, r2, #48 + 156:Core/Src/main.c **** ADC_msg[ADC_msg_step_pos + 5] = (Sweep_state.curr_step_N / 1) % 10 + '0'; + 1002 .loc 1 156 37 view .LVU311 + 1003 0252 0274 strb r2, [r0, #16] + 157:Core/Src/main.c **** + 1004 .loc 1 157 7 is_stmt 1 view .LVU312 + ARM GAS /tmp/ccUsVHhJ.s page 46 + + + 157:Core/Src/main.c **** + 1005 .loc 1 157 51 is_stmt 0 view .LVU313 + 1006 0254 2268 ldr r2, [r4] + 157:Core/Src/main.c **** + 1007 .loc 1 157 69 view .LVU314 + 1008 0256 A3FB0213 umull r1, r3, r3, r2 + 1009 025a DB08 lsrs r3, r3, #3 + 1010 025c 03EB8303 add r3, r3, r3, lsl #2 + 1011 0260 A2EB4303 sub r3, r2, r3, lsl #1 + 157:Core/Src/main.c **** + 1012 .loc 1 157 74 view .LVU315 + 1013 0264 3033 adds r3, r3, #48 + 157:Core/Src/main.c **** + 1014 .loc 1 157 37 view .LVU316 + 1015 0266 4374 strb r3, [r0, #17] + 160:Core/Src/main.c **** //HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + 1016 .loc 1 160 7 is_stmt 1 view .LVU317 + 1017 0268 2021 movs r1, #32 + 1018 026a FFF7FEFF bl CDC_Transmit_FS + 1019 .LVL31: + 163:Core/Src/main.c **** Sweep_state.curr_step_N = 0; + 1020 .loc 1 163 7 view .LVU318 + 163:Core/Src/main.c **** Sweep_state.curr_step_N = 0; + 1021 .loc 1 163 22 is_stmt 0 view .LVU319 + 1022 026e 2368 ldr r3, [r4] + 163:Core/Src/main.c **** Sweep_state.curr_step_N = 0; + 1023 .loc 1 163 10 view .LVU320 + 1024 0270 B3F57A7F cmp r3, #1000 + 1025 0274 7FF6E6AE bls .L28 + 1026 .LBB14: + 164:Core/Src/main.c **** HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + 1027 .loc 1 164 9 is_stmt 1 view .LVU321 + 164:Core/Src/main.c **** HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + 1028 .loc 1 164 33 is_stmt 0 view .LVU322 + 1029 0278 0022 movs r2, #0 + 1030 027a 2260 str r2, [r4] + 165:Core/Src/main.c **** HAL_DelayUS(10); + 1031 .loc 1 165 9 is_stmt 1 view .LVU323 + 1032 027c 4FF48041 mov r1, #16384 + 1033 0280 0748 ldr r0, .L33+8 + 1034 0282 FFF7FEFF bl HAL_GPIO_TogglePin + 1035 .LVL32: + 166:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)"Sweep_start\n\r", 14); + 1036 .loc 1 166 9 view .LVU324 + 1037 0286 0A20 movs r0, #10 + 1038 0288 FFF7FEFF bl HAL_DelayUS + 1039 .LVL33: + 167:Core/Src/main.c **** } + 1040 .loc 1 167 9 view .LVU325 + 1041 028c 0E21 movs r1, #14 + 1042 028e 1348 ldr r0, .L33+68 + 1043 0290 FFF7FEFF bl CDC_Transmit_FS + 1044 .LVL34: + 1045 0294 D6E6 b .L28 + 1046 .L34: + 1047 0296 00BF .align 3 + 1048 .L33: + ARM GAS /tmp/ccUsVHhJ.s page 47 + + + 1049 0298 00E40B54 .word 1410065408 + 1050 029c 02000000 .word 2 + 1051 02a0 00040240 .word 1073873920 + 1052 02a4 00000000 .word ADC1_buff_circular + 1053 02a8 00000000 .word hadc1 + 1054 02ac 00000000 .word ADC_proc_shadow + 1055 02b0 00000000 .word ADC_proc + 1056 02b4 CDCCCCCC .word -858993459 + 1057 02b8 00000000 .word ADC_msg + 1058 02bc 834B0400 .word 281475 + 1059 02c0 6BCA5F6B .word 1801439851 + 1060 02c4 83DE1B43 .word 1125899907 + 1061 02c8 C55A7C0A .word 175921861 + 1062 02cc 5917B7D1 .word -776530087 + 1063 02d0 D34D6210 .word 274877907 + 1064 02d4 1F85EB51 .word 1374389535 + 1065 02d8 00000000 .word Sweep_state + 1066 02dc 00000000 .word .LC0 + 1067 .LBE14: + 1068 .cfi_endproc + 1069 .LFE243: + 1071 .global ADC_msg + 1072 .section .data.ADC_msg,"aw" + 1073 .align 2 + 1076 ADC_msg: + 1077 0000 63757272 .ascii "curr_step ?????? ??????????\015\012\000" + 1077 5F737465 + 1077 70202020 + 1077 3F3F3F3F + 1077 3F3F2020 + 1078 .global ADC1_buff_circular + 1079 .section .bss.ADC1_buff_circular,"aw",%nobits + 1080 .align 2 + 1083 ADC1_buff_circular: + 1084 0000 00000000 .space 200 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1085 .global curr_step_start_N + 1086 .section .bss.curr_step_start_N,"aw",%nobits + 1087 .align 2 + 1090 curr_step_start_N: + 1091 0000 00000000 .space 4 + 1092 .global Sweep_state + 1093 .section .bss.Sweep_state,"aw",%nobits + 1094 .align 2 + 1097 Sweep_state: + 1098 0000 00000000 .space 12 + 1098 00000000 + 1098 00000000 + 1099 .global ADC_proc_shadow + 1100 .section .bss.ADC_proc_shadow,"aw",%nobits + 1101 .align 2 + 1104 ADC_proc_shadow: + 1105 0000 00000000 .space 16 + 1105 00000000 + ARM GAS /tmp/ccUsVHhJ.s page 48 + + + 1105 00000000 + 1105 00000000 + 1106 .global ADC_proc + 1107 .section .bss.ADC_proc,"aw",%nobits + 1108 .align 2 + 1111 ADC_proc: + 1112 0000 00000000 .space 16 + 1112 00000000 + 1112 00000000 + 1112 00000000 + 1113 .global hdma_adc1 + 1114 .section .bss.hdma_adc1,"aw",%nobits + 1115 .align 2 + 1118 hdma_adc1: + 1119 0000 00000000 .space 96 + 1119 00000000 + 1119 00000000 + 1119 00000000 + 1119 00000000 + 1120 .global hadc1 + 1121 .section .bss.hadc1,"aw",%nobits + 1122 .align 2 + 1125 hadc1: + 1126 0000 00000000 .space 72 + 1126 00000000 + 1126 00000000 + 1126 00000000 + 1126 00000000 + 1127 .text + 1128 .Letext0: + 1129 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" + 1130 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 1131 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" + 1132 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" + 1133 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" + 1134 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" + 1135 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" + 1136 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" + 1137 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" + 1138 .file 12 "Core/Inc/main.h" + 1139 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h" + 1140 .file 14 "USB_DEVICE/App/usbd_cdc_if.h" + 1141 .file 15 "USB_DEVICE/App/usb_device.h" + 1142 .file 16 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" + 1143 .file 17 "" + ARM GAS /tmp/ccUsVHhJ.s page 49 DEFINED SYMBOLS *ABS*:00000000 main.c - /tmp/cc45044a.s:21 .text.MX_GPIO_Init:00000000 $t - /tmp/cc45044a.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init - /tmp/cc45044a.s:242 .text.MX_GPIO_Init:0000010c $d - /tmp/cc45044a.s:250 .text.MX_DMA_Init:00000000 $t - /tmp/cc45044a.s:255 .text.MX_DMA_Init:00000000 MX_DMA_Init - /tmp/cc45044a.s:304 .text.MX_DMA_Init:00000030 $d - /tmp/cc45044a.s:309 .text.Error_Handler:00000000 $t - /tmp/cc45044a.s:315 .text.Error_Handler:00000000 Error_Handler - /tmp/cc45044a.s:347 .text.MX_ADC1_Init:00000000 $t - /tmp/cc45044a.s:352 .text.MX_ADC1_Init:00000000 MX_ADC1_Init - /tmp/cc45044a.s:460 .text.MX_ADC1_Init:00000068 $d - /tmp/cc45044a.s:1003 .bss.hadc1:00000000 hadc1 - /tmp/cc45044a.s:466 .text.SystemClock_Config:00000000 $t - /tmp/cc45044a.s:472 .text.SystemClock_Config:00000000 SystemClock_Config - /tmp/cc45044a.s:620 .text.SystemClock_Config:000000a4 $d - /tmp/cc45044a.s:627 .text.main:00000000 $t - /tmp/cc45044a.s:633 .text.main:00000000 main - /tmp/cc45044a.s:930 .text.main:000001f0 $d - /tmp/cc45044a.s:961 .bss.ADC1_buff_circular:00000000 ADC1_buff_circular - /tmp/cc45044a.s:982 .bss.ADC_proc_shadow:00000000 ADC_proc_shadow - /tmp/cc45044a.s:989 .bss.ADC_proc:00000000 ADC_proc - /tmp/cc45044a.s:954 .data.ADC_msg:00000000 ADC_msg - /tmp/cc45044a.s:951 .data.ADC_msg:00000000 $d - /tmp/cc45044a.s:958 .bss.ADC1_buff_circular:00000000 $d - /tmp/cc45044a.s:968 .bss.curr_step_start_N:00000000 curr_step_start_N - /tmp/cc45044a.s:965 .bss.curr_step_start_N:00000000 $d - /tmp/cc45044a.s:975 .bss.Sweep_state:00000000 Sweep_state - /tmp/cc45044a.s:972 .bss.Sweep_state:00000000 $d - /tmp/cc45044a.s:979 .bss.ADC_proc_shadow:00000000 $d - /tmp/cc45044a.s:986 .bss.ADC_proc:00000000 $d - /tmp/cc45044a.s:996 .bss.hdma_adc1:00000000 hdma_adc1 - /tmp/cc45044a.s:993 .bss.hdma_adc1:00000000 $d - /tmp/cc45044a.s:1000 .bss.hadc1:00000000 $d + /tmp/ccUsVHhJ.s:21 .text.MX_GPIO_Init:00000000 $t + /tmp/ccUsVHhJ.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccUsVHhJ.s:242 .text.MX_GPIO_Init:0000010c $d + /tmp/ccUsVHhJ.s:250 .text.MX_DMA_Init:00000000 $t + /tmp/ccUsVHhJ.s:255 .text.MX_DMA_Init:00000000 MX_DMA_Init + /tmp/ccUsVHhJ.s:304 .text.MX_DMA_Init:00000030 $d + /tmp/ccUsVHhJ.s:309 .text.Error_Handler:00000000 $t + /tmp/ccUsVHhJ.s:315 .text.Error_Handler:00000000 Error_Handler + /tmp/ccUsVHhJ.s:347 .text.MX_ADC1_Init:00000000 $t + /tmp/ccUsVHhJ.s:352 .text.MX_ADC1_Init:00000000 MX_ADC1_Init + /tmp/ccUsVHhJ.s:460 .text.MX_ADC1_Init:00000068 $d + /tmp/ccUsVHhJ.s:1125 .bss.hadc1:00000000 hadc1 + /tmp/ccUsVHhJ.s:466 .text.SystemClock_Config:00000000 $t + /tmp/ccUsVHhJ.s:472 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccUsVHhJ.s:620 .text.SystemClock_Config:000000a4 $d + /tmp/ccUsVHhJ.s:627 .rodata.main.str1.4:00000000 $d + /tmp/ccUsVHhJ.s:631 .text.main:00000000 $t + /tmp/ccUsVHhJ.s:637 .text.main:00000000 main + /tmp/ccUsVHhJ.s:1049 .text.main:00000298 $d + /tmp/ccUsVHhJ.s:1083 .bss.ADC1_buff_circular:00000000 ADC1_buff_circular + /tmp/ccUsVHhJ.s:1104 .bss.ADC_proc_shadow:00000000 ADC_proc_shadow + /tmp/ccUsVHhJ.s:1111 .bss.ADC_proc:00000000 ADC_proc + /tmp/ccUsVHhJ.s:1076 .data.ADC_msg:00000000 ADC_msg + /tmp/ccUsVHhJ.s:1097 .bss.Sweep_state:00000000 Sweep_state + /tmp/ccUsVHhJ.s:1073 .data.ADC_msg:00000000 $d + /tmp/ccUsVHhJ.s:1080 .bss.ADC1_buff_circular:00000000 $d + /tmp/ccUsVHhJ.s:1090 .bss.curr_step_start_N:00000000 curr_step_start_N + /tmp/ccUsVHhJ.s:1087 .bss.curr_step_start_N:00000000 $d + /tmp/ccUsVHhJ.s:1094 .bss.Sweep_state:00000000 $d + /tmp/ccUsVHhJ.s:1101 .bss.ADC_proc_shadow:00000000 $d + /tmp/ccUsVHhJ.s:1108 .bss.ADC_proc:00000000 $d + /tmp/ccUsVHhJ.s:1118 .bss.hdma_adc1:00000000 hdma_adc1 + /tmp/ccUsVHhJ.s:1115 .bss.hdma_adc1:00000000 $d + /tmp/ccUsVHhJ.s:1122 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin @@ -2720,5 +2920,6 @@ __aeabi_ldivmod HAL_Init MX_USB_DEVICE_Init HAL_ADC_Start_DMA -HAL_GPIO_TogglePin CDC_Transmit_FS +HAL_GPIO_TogglePin +HAL_DelayUS diff --git a/build/main.o b/build/main.o index 5ae3aa4..e4792c0 100644 Binary files a/build/main.o and b/build/main.o differ diff --git a/build/stm32_ADC_F429_0.bin b/build/stm32_ADC_F429_0.bin index 46e200a..f97c1bf 100755 Binary files a/build/stm32_ADC_F429_0.bin and b/build/stm32_ADC_F429_0.bin differ diff --git a/build/stm32_ADC_F429_0.hex b/build/stm32_ADC_F429_0.hex index 567374b..1d2f63f 100644 --- a/build/stm32_ADC_F429_0.hex +++ b/build/stm32_ADC_F429_0.hex @@ -1,45 +1,45 @@ :020000040800F2 -:10000000000003208D4F0008610B0008630B0008FF -:10001000650B0008670B0008690B00080000000072 -:100020000000000000000000000000006B0B000852 -:100030006D0B0008000000006F0B0008710B00083A -:10004000DD4F0008DD4F0008DD4F0008DD4F0008E0 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+:1051E00005240600010705820308001009040100D8 +:1051F000020A0000000705010240000007058102C5 +:10520000400000009F4E00083B4E0008214D000862 +:1052100000000000494B0008A54C00086D4C000838 +:10522000000000000000000000000000254C000805 +:10523000DD4B0008954B0008894B00080A06000268 +:08524000000000400100000025 +:04000005080050455A :00000001FF diff --git a/build/stm32_ADC_F429_0.map b/build/stm32_ADC_F429_0.map index 3efae85..b07d20a 100644 --- a/build/stm32_ADC_F429_0.map +++ b/build/stm32_ADC_F429_0.map @@ -1220,7 +1220,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o 0x08000000 g_pfnVectors 0x080001ac . = ALIGN (0x4) -.text 0x080001b0 0x4e48 +.text 0x080001b0 0x4f08 0x080001b0 . = ALIGN (0x4) *(.text) .text 0x080001b0 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o @@ -1251,759 +1251,761 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o 0x08000880 0xac build/main.o 0x08000880 SystemClock_Config *fill* 0x0800092c 0x4 - .text.main 0x08000930 0x230 build/main.o + .text.main 0x08000930 0x2e0 build/main.o 0x08000930 main .text.NMI_Handler - 0x08000b60 0x2 build/stm32f4xx_it.o - 0x08000b60 NMI_Handler + 0x08000c10 0x2 build/stm32f4xx_it.o + 0x08000c10 NMI_Handler .text.HardFault_Handler - 0x08000b62 0x2 build/stm32f4xx_it.o - 0x08000b62 HardFault_Handler + 0x08000c12 0x2 build/stm32f4xx_it.o + 0x08000c12 HardFault_Handler .text.MemManage_Handler - 0x08000b64 0x2 build/stm32f4xx_it.o - 0x08000b64 MemManage_Handler + 0x08000c14 0x2 build/stm32f4xx_it.o + 0x08000c14 MemManage_Handler .text.BusFault_Handler - 0x08000b66 0x2 build/stm32f4xx_it.o - 0x08000b66 BusFault_Handler + 0x08000c16 0x2 build/stm32f4xx_it.o + 0x08000c16 BusFault_Handler .text.UsageFault_Handler - 0x08000b68 0x2 build/stm32f4xx_it.o - 0x08000b68 UsageFault_Handler + 0x08000c18 0x2 build/stm32f4xx_it.o + 0x08000c18 UsageFault_Handler .text.SVC_Handler - 0x08000b6a 0x2 build/stm32f4xx_it.o - 0x08000b6a SVC_Handler + 0x08000c1a 0x2 build/stm32f4xx_it.o + 0x08000c1a SVC_Handler .text.DebugMon_Handler - 0x08000b6c 0x2 build/stm32f4xx_it.o - 0x08000b6c DebugMon_Handler + 0x08000c1c 0x2 build/stm32f4xx_it.o + 0x08000c1c DebugMon_Handler .text.PendSV_Handler - 0x08000b6e 0x2 build/stm32f4xx_it.o - 0x08000b6e PendSV_Handler + 0x08000c1e 0x2 build/stm32f4xx_it.o + 0x08000c1e PendSV_Handler .text.SysTick_Handler - 0x08000b70 0x8 build/stm32f4xx_it.o - 0x08000b70 SysTick_Handler + 0x08000c20 0x8 build/stm32f4xx_it.o + 0x08000c20 SysTick_Handler .text.EXTI0_IRQHandler - 0x08000b78 0x34 build/stm32f4xx_it.o - 0x08000b78 EXTI0_IRQHandler + 0x08000c28 0x3c build/stm32f4xx_it.o + 0x08000c28 EXTI0_IRQHandler .text.EXTI3_IRQHandler - 0x08000bac 0xa build/stm32f4xx_it.o - 0x08000bac EXTI3_IRQHandler - *fill* 0x08000bb6 0x2 + 0x08000c64 0xa build/stm32f4xx_it.o + 0x08000c64 EXTI3_IRQHandler + *fill* 0x08000c6e 0x2 .text.DMA2_Stream0_IRQHandler - 0x08000bb8 0x10 build/stm32f4xx_it.o - 0x08000bb8 DMA2_Stream0_IRQHandler + 0x08000c70 0x10 build/stm32f4xx_it.o + 0x08000c70 DMA2_Stream0_IRQHandler .text.OTG_FS_IRQHandler - 0x08000bc8 0x10 build/stm32f4xx_it.o - 0x08000bc8 OTG_FS_IRQHandler + 0x08000c80 0x10 build/stm32f4xx_it.o + 0x08000c80 OTG_FS_IRQHandler .text.HAL_ADC_ConvCpltCallback - 0x08000bd8 0xe8 build/stm32f4xx_it.o - 0x08000bd8 HAL_ADC_ConvCpltCallback + 0x08000c90 0xec build/stm32f4xx_it.o + 0x08000c90 HAL_ADC_ConvCpltCallback .text.HAL_ADC_ConvHalfCpltCallback - 0x08000cc0 0xb4 build/stm32f4xx_it.o - 0x08000cc0 HAL_ADC_ConvHalfCpltCallback + 0x08000d7c 0xb8 build/stm32f4xx_it.o + 0x08000d7c HAL_ADC_ConvHalfCpltCallback .text.HAL_MspInit - 0x08000d74 0x38 build/stm32f4xx_hal_msp.o - 0x08000d74 HAL_MspInit + 0x08000e34 0x38 build/stm32f4xx_hal_msp.o + 0x08000e34 HAL_MspInit .text.HAL_ADC_MspInit - 0x08000dac 0xac build/stm32f4xx_hal_msp.o - 0x08000dac HAL_ADC_MspInit + 0x08000e6c 0xac build/stm32f4xx_hal_msp.o + 0x08000e6c HAL_ADC_MspInit .text.HAL_RCC_OscConfig - 0x08000e58 0x3f8 build/stm32f4xx_hal_rcc.o - 0x08000e58 HAL_RCC_OscConfig + 0x08000f18 0x3f8 build/stm32f4xx_hal_rcc.o + 0x08000f18 HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x08001250 0xdc build/stm32f4xx_hal_rcc.o - 0x08001250 HAL_RCC_GetSysClockFreq + 0x08001310 0xdc build/stm32f4xx_hal_rcc.o + 0x08001310 HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x0800132c 0x160 build/stm32f4xx_hal_rcc.o - 0x0800132c HAL_RCC_ClockConfig + 0x080013ec 0x160 build/stm32f4xx_hal_rcc.o + 0x080013ec HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x0800148c 0xc build/stm32f4xx_hal_rcc.o - 0x0800148c HAL_RCC_GetHCLKFreq + 0x0800154c 0xc build/stm32f4xx_hal_rcc.o + 0x0800154c HAL_RCC_GetHCLKFreq .text.HAL_GPIO_Init - 0x08001498 0x208 build/stm32f4xx_hal_gpio.o - 0x08001498 HAL_GPIO_Init + 0x08001558 0x208 build/stm32f4xx_hal_gpio.o + 0x08001558 HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x080016a0 0xc build/stm32f4xx_hal_gpio.o - 0x080016a0 HAL_GPIO_WritePin + 0x08001760 0xc build/stm32f4xx_hal_gpio.o + 0x08001760 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x080016ac 0x12 build/stm32f4xx_hal_gpio.o - 0x080016ac HAL_GPIO_TogglePin + 0x0800176c 0x12 build/stm32f4xx_hal_gpio.o + 0x0800176c HAL_GPIO_TogglePin .text.HAL_GPIO_EXTI_Callback - 0x080016be 0x2 build/stm32f4xx_hal_gpio.o - 0x080016be HAL_GPIO_EXTI_Callback + 0x0800177e 0x2 build/stm32f4xx_hal_gpio.o + 0x0800177e HAL_GPIO_EXTI_Callback .text.HAL_GPIO_EXTI_IRQHandler - 0x080016c0 0x1c build/stm32f4xx_hal_gpio.o - 0x080016c0 HAL_GPIO_EXTI_IRQHandler + 0x08001780 0x1c build/stm32f4xx_hal_gpio.o + 0x08001780 HAL_GPIO_EXTI_IRQHandler .text.DMA_SetConfig - 0x080016dc 0x2c build/stm32f4xx_hal_dma.o + 0x0800179c 0x2c build/stm32f4xx_hal_dma.o .text.DMA_CalcBaseAndBitshift - 0x08001708 0x3c build/stm32f4xx_hal_dma.o + 0x080017c8 0x3c build/stm32f4xx_hal_dma.o .text.DMA_CheckFifoParam - 0x08001744 0x8e build/stm32f4xx_hal_dma.o - *fill* 0x080017d2 0x2 + 0x08001804 0x8e build/stm32f4xx_hal_dma.o + *fill* 0x08001892 0x2 .text.HAL_DMA_Init - 0x080017d4 0xcc build/stm32f4xx_hal_dma.o - 0x080017d4 HAL_DMA_Init + 0x08001894 0xcc build/stm32f4xx_hal_dma.o + 0x08001894 HAL_DMA_Init .text.HAL_DMA_Start_IT - 0x080018a0 0x6a build/stm32f4xx_hal_dma.o - 0x080018a0 HAL_DMA_Start_IT - *fill* 0x0800190a 0x2 + 0x08001960 0x6a build/stm32f4xx_hal_dma.o + 0x08001960 HAL_DMA_Start_IT + *fill* 0x080019ca 0x2 .text.HAL_DMA_IRQHandler - 0x0800190c 0x1dc build/stm32f4xx_hal_dma.o - 0x0800190c HAL_DMA_IRQHandler + 0x080019cc 0x1dc build/stm32f4xx_hal_dma.o + 0x080019cc HAL_DMA_IRQHandler .text.__NVIC_EnableIRQ - 0x08001ae8 0x1c build/stm32f4xx_hal_cortex.o + 0x08001ba8 0x1c build/stm32f4xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08001b04 0x28 build/stm32f4xx_hal_cortex.o + 0x08001bc4 0x28 build/stm32f4xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08001b2c 0x3e build/stm32f4xx_hal_cortex.o - *fill* 0x08001b6a 0x2 + 0x08001bec 0x3e build/stm32f4xx_hal_cortex.o + *fill* 0x08001c2a 0x2 .text.HAL_NVIC_SetPriorityGrouping - 0x08001b6c 0x24 build/stm32f4xx_hal_cortex.o - 0x08001b6c HAL_NVIC_SetPriorityGrouping + 0x08001c2c 0x24 build/stm32f4xx_hal_cortex.o + 0x08001c2c HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08001b90 0x20 build/stm32f4xx_hal_cortex.o - 0x08001b90 HAL_NVIC_SetPriority + 0x08001c50 0x20 build/stm32f4xx_hal_cortex.o + 0x08001c50 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08001bb0 0x8 build/stm32f4xx_hal_cortex.o - 0x08001bb0 HAL_NVIC_EnableIRQ + 0x08001c70 0x8 build/stm32f4xx_hal_cortex.o + 0x08001c70 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08001bb8 0x28 build/stm32f4xx_hal_cortex.o - 0x08001bb8 HAL_SYSTICK_Config + 0x08001c78 0x28 build/stm32f4xx_hal_cortex.o + 0x08001c78 HAL_SYSTICK_Config .text.HAL_InitTick - 0x08001be0 0x4c build/stm32f4xx_hal.o - 0x08001be0 HAL_InitTick + 0x08001ca0 0x4c build/stm32f4xx_hal.o + 0x08001ca0 HAL_InitTick .text.HAL_Init - 0x08001c2c 0x34 build/stm32f4xx_hal.o - 0x08001c2c HAL_Init + 0x08001cec 0x34 build/stm32f4xx_hal.o + 0x08001cec HAL_Init .text.HAL_IncTick - 0x08001c60 0x18 build/stm32f4xx_hal.o - 0x08001c60 HAL_IncTick + 0x08001d20 0x18 build/stm32f4xx_hal.o + 0x08001d20 HAL_IncTick .text.HAL_GetTick - 0x08001c78 0xc build/stm32f4xx_hal.o - 0x08001c78 HAL_GetTick + 0x08001d38 0xc build/stm32f4xx_hal.o + 0x08001d38 HAL_GetTick .text.HAL_Delay - 0x08001c84 0x28 build/stm32f4xx_hal.o - 0x08001c84 HAL_Delay + 0x08001d44 0x28 build/stm32f4xx_hal.o + 0x08001d44 HAL_Delay .text.SystemInit - 0x08001cac 0x14 build/system_stm32f4xx.o - 0x08001cac SystemInit + 0x08001d6c 0x14 build/system_stm32f4xx.o + 0x08001d6c SystemInit .text.MX_USB_DEVICE_Init - 0x08001cc0 0x54 build/usb_device.o - 0x08001cc0 MX_USB_DEVICE_Init + 0x08001d80 0x54 build/usb_device.o + 0x08001d80 MX_USB_DEVICE_Init .text.USBD_FS_DeviceDescriptor - 0x08001d14 0xc build/usbd_desc.o - 0x08001d14 USBD_FS_DeviceDescriptor + 0x08001dd4 0xc build/usbd_desc.o + 0x08001dd4 USBD_FS_DeviceDescriptor .text.USBD_FS_LangIDStrDescriptor - 0x08001d20 0xc build/usbd_desc.o - 0x08001d20 USBD_FS_LangIDStrDescriptor + 0x08001de0 0xc build/usbd_desc.o + 0x08001de0 USBD_FS_LangIDStrDescriptor .text.IntToUnicode - 0x08001d2c 0x46 build/usbd_desc.o - *fill* 0x08001d72 0x2 + 0x08001dec 0x46 build/usbd_desc.o + *fill* 0x08001e32 0x2 .text.Get_SerialNum - 0x08001d74 0x38 build/usbd_desc.o + 0x08001e34 0x38 build/usbd_desc.o .text.USBD_FS_SerialStrDescriptor - 0x08001dac 0x14 build/usbd_desc.o - 0x08001dac USBD_FS_SerialStrDescriptor + 0x08001e6c 0x14 build/usbd_desc.o + 0x08001e6c USBD_FS_SerialStrDescriptor .text.USBD_FS_ProductStrDescriptor - 0x08001dc0 0x24 build/usbd_desc.o - 0x08001dc0 USBD_FS_ProductStrDescriptor + 0x08001e80 0x24 build/usbd_desc.o + 0x08001e80 USBD_FS_ProductStrDescriptor .text.USBD_FS_ManufacturerStrDescriptor - 0x08001de4 0x1c build/usbd_desc.o - 0x08001de4 USBD_FS_ManufacturerStrDescriptor + 0x08001ea4 0x1c build/usbd_desc.o + 0x08001ea4 USBD_FS_ManufacturerStrDescriptor .text.USBD_FS_ConfigStrDescriptor - 0x08001e00 0x24 build/usbd_desc.o - 0x08001e00 USBD_FS_ConfigStrDescriptor + 0x08001ec0 0x24 build/usbd_desc.o + 0x08001ec0 USBD_FS_ConfigStrDescriptor .text.USBD_FS_InterfaceStrDescriptor - 0x08001e24 0x24 build/usbd_desc.o - 0x08001e24 USBD_FS_InterfaceStrDescriptor + 0x08001ee4 0x24 build/usbd_desc.o + 0x08001ee4 USBD_FS_InterfaceStrDescriptor .text.CDC_DeInit_FS - 0x08001e48 0x4 build/usbd_cdc_if.o + 0x08001f08 0x4 build/usbd_cdc_if.o .text.CDC_Control_FS - 0x08001e4c 0x4 build/usbd_cdc_if.o + 0x08001f0c 0x4 build/usbd_cdc_if.o .text.CDC_TransmitCplt_FS - 0x08001e50 0x4 build/usbd_cdc_if.o + 0x08001f10 0x4 build/usbd_cdc_if.o .text.CDC_Receive_FS - 0x08001e54 0x1c build/usbd_cdc_if.o + 0x08001f14 0x1c build/usbd_cdc_if.o .text.CDC_Init_FS - 0x08001e70 0x28 build/usbd_cdc_if.o + 0x08001f30 0x28 build/usbd_cdc_if.o .text.CDC_Transmit_FS - 0x08001e98 0x2c build/usbd_cdc_if.o - 0x08001e98 CDC_Transmit_FS + 0x08001f58 0x2c build/usbd_cdc_if.o + 0x08001f58 CDC_Transmit_FS .text.HAL_PCD_MspInit - 0x08001ec4 0x84 build/usbd_conf.o - 0x08001ec4 HAL_PCD_MspInit + 0x08001f84 0x84 build/usbd_conf.o + 0x08001f84 HAL_PCD_MspInit .text.HAL_PCD_SetupStageCallback - 0x08001f48 0x10 build/usbd_conf.o - 0x08001f48 HAL_PCD_SetupStageCallback + 0x08002008 0x10 build/usbd_conf.o + 0x08002008 HAL_PCD_SetupStageCallback .text.HAL_PCD_DataOutStageCallback - 0x08001f58 0x18 build/usbd_conf.o - 0x08001f58 HAL_PCD_DataOutStageCallback + 0x08002018 0x18 build/usbd_conf.o + 0x08002018 HAL_PCD_DataOutStageCallback .text.HAL_PCD_DataInStageCallback - 0x08001f70 0x16 build/usbd_conf.o - 0x08001f70 HAL_PCD_DataInStageCallback + 0x08002030 0x16 build/usbd_conf.o + 0x08002030 HAL_PCD_DataInStageCallback .text.HAL_PCD_SOFCallback - 0x08001f86 0xc build/usbd_conf.o - 0x08001f86 HAL_PCD_SOFCallback + 0x08002046 0xc build/usbd_conf.o + 0x08002046 HAL_PCD_SOFCallback .text.HAL_PCD_ResetCallback - 0x08001f92 0x28 build/usbd_conf.o - 0x08001f92 HAL_PCD_ResetCallback - *fill* 0x08001fba 0x2 + 0x08002052 0x28 build/usbd_conf.o + 0x08002052 HAL_PCD_ResetCallback + *fill* 0x0800207a 0x2 .text.HAL_PCD_SuspendCallback - 0x08001fbc 0x30 build/usbd_conf.o - 0x08001fbc HAL_PCD_SuspendCallback + 0x0800207c 0x30 build/usbd_conf.o + 0x0800207c HAL_PCD_SuspendCallback .text.HAL_PCD_ResumeCallback - 0x08001fec 0xc build/usbd_conf.o - 0x08001fec HAL_PCD_ResumeCallback + 0x080020ac 0xc build/usbd_conf.o + 0x080020ac HAL_PCD_ResumeCallback .text.HAL_PCD_ISOOUTIncompleteCallback - 0x08001ff8 0xc build/usbd_conf.o - 0x08001ff8 HAL_PCD_ISOOUTIncompleteCallback + 0x080020b8 0xc build/usbd_conf.o + 0x080020b8 HAL_PCD_ISOOUTIncompleteCallback .text.HAL_PCD_ISOINIncompleteCallback - 0x08002004 0xc build/usbd_conf.o - 0x08002004 HAL_PCD_ISOINIncompleteCallback + 0x080020c4 0xc build/usbd_conf.o + 0x080020c4 HAL_PCD_ISOINIncompleteCallback .text.HAL_PCD_ConnectCallback - 0x08002010 0xc build/usbd_conf.o - 0x08002010 HAL_PCD_ConnectCallback + 0x080020d0 0xc build/usbd_conf.o + 0x080020d0 HAL_PCD_ConnectCallback .text.HAL_PCD_DisconnectCallback - 0x0800201c 0xc build/usbd_conf.o - 0x0800201c HAL_PCD_DisconnectCallback + 0x080020dc 0xc build/usbd_conf.o + 0x080020dc HAL_PCD_DisconnectCallback .text.USBD_LL_Init - 0x08002028 0x68 build/usbd_conf.o - 0x08002028 USBD_LL_Init + 0x080020e8 0x68 build/usbd_conf.o + 0x080020e8 USBD_LL_Init .text.USBD_LL_IsStallEP - 0x08002090 0x2c build/usbd_conf.o - 0x08002090 USBD_LL_IsStallEP + 0x08002150 0x2c build/usbd_conf.o + 0x08002150 USBD_LL_IsStallEP .text.USBD_LL_GetRxDataSize - 0x080020bc 0xc build/usbd_conf.o - 0x080020bc USBD_LL_GetRxDataSize + 0x0800217c 0xc build/usbd_conf.o + 0x0800217c USBD_LL_GetRxDataSize .text.USBD_static_malloc - 0x080020c8 0x8 build/usbd_conf.o - 0x080020c8 USBD_static_malloc + 0x08002188 0x8 build/usbd_conf.o + 0x08002188 USBD_static_malloc .text.USBD_static_free - 0x080020d0 0x2 build/usbd_conf.o - 0x080020d0 USBD_static_free + 0x08002190 0x2 build/usbd_conf.o + 0x08002190 USBD_static_free .text.USBD_Get_USB_Status - 0x080020d2 0x14 build/usbd_conf.o - 0x080020d2 USBD_Get_USB_Status + 0x08002192 0x14 build/usbd_conf.o + 0x08002192 USBD_Get_USB_Status .text.USBD_LL_Start - 0x080020e6 0x10 build/usbd_conf.o - 0x080020e6 USBD_LL_Start + 0x080021a6 0x10 build/usbd_conf.o + 0x080021a6 USBD_LL_Start .text.USBD_LL_OpenEP - 0x080020f6 0x16 build/usbd_conf.o - 0x080020f6 USBD_LL_OpenEP + 0x080021b6 0x16 build/usbd_conf.o + 0x080021b6 USBD_LL_OpenEP .text.USBD_LL_CloseEP - 0x0800210c 0x10 build/usbd_conf.o - 0x0800210c USBD_LL_CloseEP + 0x080021cc 0x10 build/usbd_conf.o + 0x080021cc USBD_LL_CloseEP .text.USBD_LL_StallEP - 0x0800211c 0x10 build/usbd_conf.o - 0x0800211c USBD_LL_StallEP + 0x080021dc 0x10 build/usbd_conf.o + 0x080021dc USBD_LL_StallEP .text.USBD_LL_ClearStallEP - 0x0800212c 0x10 build/usbd_conf.o - 0x0800212c USBD_LL_ClearStallEP + 0x080021ec 0x10 build/usbd_conf.o + 0x080021ec USBD_LL_ClearStallEP .text.USBD_LL_SetUSBAddress - 0x0800213c 0x10 build/usbd_conf.o - 0x0800213c USBD_LL_SetUSBAddress + 0x080021fc 0x10 build/usbd_conf.o + 0x080021fc USBD_LL_SetUSBAddress .text.USBD_LL_Transmit - 0x0800214c 0x10 build/usbd_conf.o - 0x0800214c USBD_LL_Transmit + 0x0800220c 0x10 build/usbd_conf.o + 0x0800220c USBD_LL_Transmit .text.USBD_LL_PrepareReceive - 0x0800215c 0x10 build/usbd_conf.o - 0x0800215c USBD_LL_PrepareReceive + 0x0800221c 0x10 build/usbd_conf.o + 0x0800221c USBD_LL_PrepareReceive .text.PCD_WriteEmptyTxFifo - 0x0800216c 0xd0 build/stm32f4xx_hal_pcd.o + 0x0800222c 0xd0 build/stm32f4xx_hal_pcd.o .text.HAL_PCD_Init - 0x0800223c 0x102 build/stm32f4xx_hal_pcd.o - 0x0800223c HAL_PCD_Init + 0x080022fc 0x102 build/stm32f4xx_hal_pcd.o + 0x080022fc HAL_PCD_Init .text.HAL_PCD_Start - 0x0800233e 0x44 build/stm32f4xx_hal_pcd.o - 0x0800233e HAL_PCD_Start - *fill* 0x08002382 0x2 + 0x080023fe 0x44 build/stm32f4xx_hal_pcd.o + 0x080023fe HAL_PCD_Start + *fill* 0x08002442 0x2 .text.PCD_EP_OutXfrComplete_int - 0x08002384 0x104 build/stm32f4xx_hal_pcd.o + 0x08002444 0x104 build/stm32f4xx_hal_pcd.o .text.PCD_EP_OutSetupPacket_int - 0x08002488 0x50 build/stm32f4xx_hal_pcd.o + 0x08002548 0x50 build/stm32f4xx_hal_pcd.o .text.HAL_PCD_SetAddress - 0x080024d8 0x26 build/stm32f4xx_hal_pcd.o - 0x080024d8 HAL_PCD_SetAddress + 0x08002598 0x26 build/stm32f4xx_hal_pcd.o + 0x08002598 HAL_PCD_SetAddress .text.HAL_PCD_EP_Open - 0x080024fe 0x8c build/stm32f4xx_hal_pcd.o - 0x080024fe HAL_PCD_EP_Open + 0x080025be 0x8c build/stm32f4xx_hal_pcd.o + 0x080025be HAL_PCD_EP_Open .text.HAL_PCD_EP_Close - 0x0800258a 0x70 build/stm32f4xx_hal_pcd.o - 0x0800258a HAL_PCD_EP_Close + 0x0800264a 0x70 build/stm32f4xx_hal_pcd.o + 0x0800264a HAL_PCD_EP_Close .text.HAL_PCD_EP_Receive - 0x080025fa 0x4a build/stm32f4xx_hal_pcd.o - 0x080025fa HAL_PCD_EP_Receive + 0x080026ba 0x4a build/stm32f4xx_hal_pcd.o + 0x080026ba HAL_PCD_EP_Receive .text.HAL_PCD_EP_GetRxCount - 0x08002644 0x12 build/stm32f4xx_hal_pcd.o - 0x08002644 HAL_PCD_EP_GetRxCount + 0x08002704 0x12 build/stm32f4xx_hal_pcd.o + 0x08002704 HAL_PCD_EP_GetRxCount .text.HAL_PCD_EP_Transmit - 0x08002656 0x4a build/stm32f4xx_hal_pcd.o - 0x08002656 HAL_PCD_EP_Transmit + 0x08002716 0x4a build/stm32f4xx_hal_pcd.o + 0x08002716 HAL_PCD_EP_Transmit .text.HAL_PCD_EP_SetStall - 0x080026a0 0x86 build/stm32f4xx_hal_pcd.o - 0x080026a0 HAL_PCD_EP_SetStall + 0x08002760 0x86 build/stm32f4xx_hal_pcd.o + 0x08002760 HAL_PCD_EP_SetStall .text.HAL_PCD_EP_ClrStall - 0x08002726 0x74 build/stm32f4xx_hal_pcd.o - 0x08002726 HAL_PCD_EP_ClrStall + 0x080027e6 0x74 build/stm32f4xx_hal_pcd.o + 0x080027e6 HAL_PCD_EP_ClrStall .text.HAL_PCD_EP_Abort - 0x0800279a 0x34 build/stm32f4xx_hal_pcd.o - 0x0800279a HAL_PCD_EP_Abort + 0x0800285a 0x34 build/stm32f4xx_hal_pcd.o + 0x0800285a HAL_PCD_EP_Abort .text.HAL_PCD_IRQHandler - 0x080027ce 0x5be build/stm32f4xx_hal_pcd.o - 0x080027ce HAL_PCD_IRQHandler + 0x0800288e 0x5be build/stm32f4xx_hal_pcd.o + 0x0800288e HAL_PCD_IRQHandler .text.HAL_PCDEx_SetTxFiFo - 0x08002d8c 0x4c build/stm32f4xx_hal_pcd_ex.o - 0x08002d8c HAL_PCDEx_SetTxFiFo + 0x08002e4c 0x4c build/stm32f4xx_hal_pcd_ex.o + 0x08002e4c HAL_PCDEx_SetTxFiFo .text.HAL_PCDEx_SetRxFiFo - 0x08002dd8 0x8 build/stm32f4xx_hal_pcd_ex.o - 0x08002dd8 HAL_PCDEx_SetRxFiFo + 0x08002e98 0x8 build/stm32f4xx_hal_pcd_ex.o + 0x08002e98 HAL_PCDEx_SetRxFiFo .text.HAL_PCDEx_LPM_Callback - 0x08002de0 0x2 build/stm32f4xx_hal_pcd_ex.o - 0x08002de0 HAL_PCDEx_LPM_Callback + 0x08002ea0 0x2 build/stm32f4xx_hal_pcd_ex.o + 0x08002ea0 HAL_PCDEx_LPM_Callback .text.USB_CoreReset - 0x08002de2 0x58 build/stm32f4xx_ll_usb.o + 0x08002ea2 0x58 build/stm32f4xx_ll_usb.o .text.USB_CoreInit - 0x08002e3a 0x92 build/stm32f4xx_ll_usb.o - 0x08002e3a USB_CoreInit + 0x08002efa 0x92 build/stm32f4xx_ll_usb.o + 0x08002efa USB_CoreInit .text.USB_SetTurnaroundTime - 0x08002ecc 0xe4 build/stm32f4xx_ll_usb.o - 0x08002ecc USB_SetTurnaroundTime + 0x08002f8c 0xe4 build/stm32f4xx_ll_usb.o + 0x08002f8c USB_SetTurnaroundTime .text.USB_EnableGlobalInt - 0x08002fb0 0xc build/stm32f4xx_ll_usb.o - 0x08002fb0 USB_EnableGlobalInt + 0x08003070 0xc build/stm32f4xx_ll_usb.o + 0x08003070 USB_EnableGlobalInt .text.USB_DisableGlobalInt - 0x08002fbc 0xc build/stm32f4xx_ll_usb.o - 0x08002fbc USB_DisableGlobalInt + 0x0800307c 0xc build/stm32f4xx_ll_usb.o + 0x0800307c USB_DisableGlobalInt .text.USB_FlushTxFifo - 0x08002fc8 0x4a build/stm32f4xx_ll_usb.o - 0x08002fc8 USB_FlushTxFifo + 0x08003088 0x4a build/stm32f4xx_ll_usb.o + 0x08003088 USB_FlushTxFifo .text.USB_FlushRxFifo - 0x08003012 0x46 build/stm32f4xx_ll_usb.o - 0x08003012 USB_FlushRxFifo + 0x080030d2 0x46 build/stm32f4xx_ll_usb.o + 0x080030d2 USB_FlushRxFifo .text.USB_SetDevSpeed - 0x08003058 0xe build/stm32f4xx_ll_usb.o - 0x08003058 USB_SetDevSpeed - *fill* 0x08003066 0x2 + 0x08003118 0xe build/stm32f4xx_ll_usb.o + 0x08003118 USB_SetDevSpeed + *fill* 0x08003126 0x2 .text.USB_DevInit - 0x08003068 0x194 build/stm32f4xx_ll_usb.o - 0x08003068 USB_DevInit + 0x08003128 0x194 build/stm32f4xx_ll_usb.o + 0x08003128 USB_DevInit .text.USB_GetDevSpeed - 0x080031fc 0x22 build/stm32f4xx_ll_usb.o - 0x080031fc USB_GetDevSpeed + 0x080032bc 0x22 build/stm32f4xx_ll_usb.o + 0x080032bc USB_GetDevSpeed .text.USB_ActivateEndpoint - 0x0800321e 0x9a build/stm32f4xx_ll_usb.o - 0x0800321e USB_ActivateEndpoint + 0x080032de 0x9a build/stm32f4xx_ll_usb.o + 0x080032de USB_ActivateEndpoint .text.USB_DeactivateEndpoint - 0x080032b8 0xe0 build/stm32f4xx_ll_usb.o - 0x080032b8 USB_DeactivateEndpoint + 0x08003378 0xe0 build/stm32f4xx_ll_usb.o + 0x08003378 USB_DeactivateEndpoint .text.USB_EPStopXfer - 0x08003398 0xbe build/stm32f4xx_ll_usb.o - 0x08003398 USB_EPStopXfer + 0x08003458 0xbe build/stm32f4xx_ll_usb.o + 0x08003458 USB_EPStopXfer .text.USB_WritePacket - 0x08003456 0x2e build/stm32f4xx_ll_usb.o - 0x08003456 USB_WritePacket + 0x08003516 0x2e build/stm32f4xx_ll_usb.o + 0x08003516 USB_WritePacket .text.USB_EPStartXfer - 0x08003484 0x244 build/stm32f4xx_ll_usb.o - 0x08003484 USB_EPStartXfer + 0x08003544 0x244 build/stm32f4xx_ll_usb.o + 0x08003544 USB_EPStartXfer .text.USB_ReadPacket - 0x080036c8 0x46 build/stm32f4xx_ll_usb.o - 0x080036c8 USB_ReadPacket + 0x08003788 0x46 build/stm32f4xx_ll_usb.o + 0x08003788 USB_ReadPacket .text.USB_EPSetStall - 0x0800370e 0x5a build/stm32f4xx_ll_usb.o - 0x0800370e USB_EPSetStall + 0x080037ce 0x5a build/stm32f4xx_ll_usb.o + 0x080037ce USB_EPSetStall .text.USB_EPClearStall - 0x08003768 0x5c build/stm32f4xx_ll_usb.o - 0x08003768 USB_EPClearStall + 0x08003828 0x5c build/stm32f4xx_ll_usb.o + 0x08003828 USB_EPClearStall .text.USB_SetDevAddress - 0x080037c4 0x20 build/stm32f4xx_ll_usb.o - 0x080037c4 USB_SetDevAddress + 0x08003884 0x20 build/stm32f4xx_ll_usb.o + 0x08003884 USB_SetDevAddress .text.USB_DevConnect - 0x080037e4 0x1c build/stm32f4xx_ll_usb.o - 0x080037e4 USB_DevConnect + 0x080038a4 0x1c build/stm32f4xx_ll_usb.o + 0x080038a4 USB_DevConnect .text.USB_DevDisconnect - 0x08003800 0x1c build/stm32f4xx_ll_usb.o - 0x08003800 USB_DevDisconnect + 0x080038c0 0x1c build/stm32f4xx_ll_usb.o + 0x080038c0 USB_DevDisconnect .text.USB_ReadInterrupts - 0x0800381c 0x8 build/stm32f4xx_ll_usb.o - 0x0800381c USB_ReadInterrupts + 0x080038dc 0x8 build/stm32f4xx_ll_usb.o + 0x080038dc USB_ReadInterrupts .text.USB_ReadDevAllOutEpInterrupt - 0x08003824 0x10 build/stm32f4xx_ll_usb.o - 0x08003824 USB_ReadDevAllOutEpInterrupt + 0x080038e4 0x10 build/stm32f4xx_ll_usb.o + 0x080038e4 USB_ReadDevAllOutEpInterrupt .text.USB_ReadDevAllInEpInterrupt - 0x08003834 0x10 build/stm32f4xx_ll_usb.o - 0x08003834 USB_ReadDevAllInEpInterrupt + 0x080038f4 0x10 build/stm32f4xx_ll_usb.o + 0x080038f4 USB_ReadDevAllInEpInterrupt .text.USB_ReadDevOutEPInterrupt - 0x08003844 0x12 build/stm32f4xx_ll_usb.o - 0x08003844 USB_ReadDevOutEPInterrupt + 0x08003904 0x12 build/stm32f4xx_ll_usb.o + 0x08003904 USB_ReadDevOutEPInterrupt .text.USB_ReadDevInEPInterrupt - 0x08003856 0x24 build/stm32f4xx_ll_usb.o - 0x08003856 USB_ReadDevInEPInterrupt + 0x08003916 0x24 build/stm32f4xx_ll_usb.o + 0x08003916 USB_ReadDevInEPInterrupt .text.USB_GetMode - 0x0800387a 0x8 build/stm32f4xx_ll_usb.o - 0x0800387a USB_GetMode + 0x0800393a 0x8 build/stm32f4xx_ll_usb.o + 0x0800393a USB_GetMode .text.USB_SetCurrentMode - 0x08003882 0x62 build/stm32f4xx_ll_usb.o - 0x08003882 USB_SetCurrentMode + 0x08003942 0x62 build/stm32f4xx_ll_usb.o + 0x08003942 USB_SetCurrentMode .text.USB_ActivateSetup - 0x080038e4 0x1c build/stm32f4xx_ll_usb.o - 0x080038e4 USB_ActivateSetup + 0x080039a4 0x1c build/stm32f4xx_ll_usb.o + 0x080039a4 USB_ActivateSetup .text.USB_EP0_OutStart - 0x08003900 0x60 build/stm32f4xx_ll_usb.o - 0x08003900 USB_EP0_OutStart + 0x080039c0 0x60 build/stm32f4xx_ll_usb.o + 0x080039c0 USB_EP0_OutStart .text.ADC_Init - 0x08003960 0x134 build/stm32f4xx_hal_adc.o + 0x08003a20 0x134 build/stm32f4xx_hal_adc.o .text.HAL_ADC_Init - 0x08003a94 0x56 build/stm32f4xx_hal_adc.o - 0x08003a94 HAL_ADC_Init - *fill* 0x08003aea 0x2 + 0x08003b54 0x56 build/stm32f4xx_hal_adc.o + 0x08003b54 HAL_ADC_Init + *fill* 0x08003baa 0x2 .text.HAL_ADC_Start_DMA - 0x08003aec 0x188 build/stm32f4xx_hal_adc.o - 0x08003aec HAL_ADC_Start_DMA + 0x08003bac 0x188 build/stm32f4xx_hal_adc.o + 0x08003bac HAL_ADC_Start_DMA .text.ADC_DMAHalfConvCplt - 0x08003c74 0xa build/stm32f4xx_hal_adc.o + 0x08003d34 0xa build/stm32f4xx_hal_adc.o .text.HAL_ADC_ErrorCallback - 0x08003c7e 0x2 build/stm32f4xx_hal_adc.o - 0x08003c7e HAL_ADC_ErrorCallback + 0x08003d3e 0x2 build/stm32f4xx_hal_adc.o + 0x08003d3e HAL_ADC_ErrorCallback .text.ADC_DMAError - 0x08003c80 0x16 build/stm32f4xx_hal_adc.o + 0x08003d40 0x16 build/stm32f4xx_hal_adc.o .text.ADC_DMAConvCplt - 0x08003c96 0x72 build/stm32f4xx_hal_adc.o + 0x08003d56 0x72 build/stm32f4xx_hal_adc.o .text.HAL_ADC_ConfigChannel - 0x08003d08 0x1ac build/stm32f4xx_hal_adc.o - 0x08003d08 HAL_ADC_ConfigChannel + 0x08003dc8 0x1ac build/stm32f4xx_hal_adc.o + 0x08003dc8 HAL_ADC_ConfigChannel .text.USBD_Init - 0x08003eb4 0x2e build/usbd_core.o - 0x08003eb4 USBD_Init + 0x08003f74 0x2e build/usbd_core.o + 0x08003f74 USBD_Init .text.USBD_RegisterClass - 0x08003ee2 0x34 build/usbd_core.o - 0x08003ee2 USBD_RegisterClass + 0x08003fa2 0x34 build/usbd_core.o + 0x08003fa2 USBD_RegisterClass .text.USBD_Start - 0x08003f16 0x8 build/usbd_core.o - 0x08003f16 USBD_Start + 0x08003fd6 0x8 build/usbd_core.o + 0x08003fd6 USBD_Start .text.USBD_SetClassConfig - 0x08003f1e 0x12 build/usbd_core.o - 0x08003f1e USBD_SetClassConfig + 0x08003fde 0x12 build/usbd_core.o + 0x08003fde USBD_SetClassConfig .text.USBD_ClrClassConfig - 0x08003f30 0x12 build/usbd_core.o - 0x08003f30 USBD_ClrClassConfig + 0x08003ff0 0x12 build/usbd_core.o + 0x08003ff0 USBD_ClrClassConfig .text.USBD_LL_SetupStage - 0x08003f42 0x58 build/usbd_core.o - 0x08003f42 USBD_LL_SetupStage + 0x08004002 0x58 build/usbd_core.o + 0x08004002 USBD_LL_SetupStage .text.USBD_LL_Reset - 0x08003f9a 0x66 build/usbd_core.o - 0x08003f9a USBD_LL_Reset + 0x0800405a 0x66 build/usbd_core.o + 0x0800405a USBD_LL_Reset .text.USBD_LL_SetSpeed - 0x08004000 0x6 build/usbd_core.o - 0x08004000 USBD_LL_SetSpeed + 0x080040c0 0x6 build/usbd_core.o + 0x080040c0 USBD_LL_SetSpeed .text.USBD_LL_Suspend - 0x08004006 0x1e build/usbd_core.o - 0x08004006 USBD_LL_Suspend + 0x080040c6 0x1e build/usbd_core.o + 0x080040c6 USBD_LL_Suspend .text.USBD_LL_Resume - 0x08004024 0x1a build/usbd_core.o - 0x08004024 USBD_LL_Resume + 0x080040e4 0x1a build/usbd_core.o + 0x080040e4 USBD_LL_Resume .text.USBD_LL_SOF - 0x0800403e 0x22 build/usbd_core.o - 0x0800403e USBD_LL_SOF + 0x080040fe 0x22 build/usbd_core.o + 0x080040fe USBD_LL_SOF .text.USBD_LL_IsoINIncomplete - 0x08004060 0x2e build/usbd_core.o - 0x08004060 USBD_LL_IsoINIncomplete + 0x08004120 0x2e build/usbd_core.o + 0x08004120 USBD_LL_IsoINIncomplete .text.USBD_LL_IsoOUTIncomplete - 0x0800408e 0x2e build/usbd_core.o - 0x0800408e USBD_LL_IsoOUTIncomplete + 0x0800414e 0x2e build/usbd_core.o + 0x0800414e USBD_LL_IsoOUTIncomplete .text.USBD_LL_DevConnected - 0x080040bc 0x4 build/usbd_core.o - 0x080040bc USBD_LL_DevConnected + 0x0800417c 0x4 build/usbd_core.o + 0x0800417c USBD_LL_DevConnected .text.USBD_LL_DevDisconnected - 0x080040c0 0x20 build/usbd_core.o - 0x080040c0 USBD_LL_DevDisconnected + 0x08004180 0x20 build/usbd_core.o + 0x08004180 USBD_LL_DevDisconnected .text.USBD_CoreFindIF - 0x080040e0 0x4 build/usbd_core.o - 0x080040e0 USBD_CoreFindIF + 0x080041a0 0x4 build/usbd_core.o + 0x080041a0 USBD_CoreFindIF .text.USBD_CoreFindEP - 0x080040e4 0x4 build/usbd_core.o - 0x080040e4 USBD_CoreFindEP + 0x080041a4 0x4 build/usbd_core.o + 0x080041a4 USBD_CoreFindEP .text.USBD_LL_DataOutStage - 0x080040e8 0xca build/usbd_core.o - 0x080040e8 USBD_LL_DataOutStage + 0x080041a8 0xca build/usbd_core.o + 0x080041a8 USBD_LL_DataOutStage .text.USBD_LL_DataInStage - 0x080041b2 0xd8 build/usbd_core.o - 0x080041b2 USBD_LL_DataInStage + 0x08004272 0xd8 build/usbd_core.o + 0x08004272 USBD_LL_DataInStage .text.USBD_GetNextDesc - 0x0800428a 0xe build/usbd_core.o - 0x0800428a USBD_GetNextDesc + 0x0800434a 0xe build/usbd_core.o + 0x0800434a USBD_GetNextDesc .text.USBD_GetEpDesc - 0x08004298 0x3e build/usbd_core.o - 0x08004298 USBD_GetEpDesc + 0x08004358 0x3e build/usbd_core.o + 0x08004358 USBD_GetEpDesc .text.USBD_GetLen - 0x080042d6 0x14 build/usbd_ctlreq.o + 0x08004396 0x14 build/usbd_ctlreq.o .text.USBD_ParseSetupRequest - 0x080042ea 0x28 build/usbd_ctlreq.o - 0x080042ea USBD_ParseSetupRequest + 0x080043aa 0x28 build/usbd_ctlreq.o + 0x080043aa USBD_ParseSetupRequest .text.USBD_CtlError - 0x08004312 0x14 build/usbd_ctlreq.o - 0x08004312 USBD_CtlError + 0x080043d2 0x14 build/usbd_ctlreq.o + 0x080043d2 USBD_CtlError .text.USBD_GetDescriptor - 0x08004326 0x18a build/usbd_ctlreq.o + 0x080043e6 0x18a build/usbd_ctlreq.o .text.USBD_SetAddress - 0x080044b0 0x50 build/usbd_ctlreq.o + 0x08004570 0x50 build/usbd_ctlreq.o .text.USBD_SetConfig - 0x08004500 0xcc build/usbd_ctlreq.o + 0x080045c0 0xcc build/usbd_ctlreq.o .text.USBD_GetConfig - 0x080045cc 0x40 build/usbd_ctlreq.o + 0x0800468c 0x40 build/usbd_ctlreq.o .text.USBD_GetStatus - 0x0800460c 0x38 build/usbd_ctlreq.o + 0x080046cc 0x38 build/usbd_ctlreq.o .text.USBD_SetFeature - 0x08004644 0x2a build/usbd_ctlreq.o + 0x08004704 0x2a build/usbd_ctlreq.o .text.USBD_ClrFeature - 0x0800466e 0x26 build/usbd_ctlreq.o + 0x0800472e 0x26 build/usbd_ctlreq.o .text.USBD_StdDevReq - 0x08004694 0x76 build/usbd_ctlreq.o - 0x08004694 USBD_StdDevReq + 0x08004754 0x76 build/usbd_ctlreq.o + 0x08004754 USBD_StdDevReq .text.USBD_StdItfReq - 0x0800470a 0x84 build/usbd_ctlreq.o - 0x0800470a USBD_StdItfReq + 0x080047ca 0x84 build/usbd_ctlreq.o + 0x080047ca USBD_StdItfReq .text.USBD_StdEPReq - 0x0800478e 0x232 build/usbd_ctlreq.o - 0x0800478e USBD_StdEPReq + 0x0800484e 0x232 build/usbd_ctlreq.o + 0x0800484e USBD_StdEPReq .text.USBD_GetString - 0x080049c0 0x46 build/usbd_ctlreq.o - 0x080049c0 USBD_GetString + 0x08004a80 0x46 build/usbd_ctlreq.o + 0x08004a80 USBD_GetString .text.USBD_CtlSendData - 0x08004a06 0x1c build/usbd_ioreq.o - 0x08004a06 USBD_CtlSendData + 0x08004ac6 0x1c build/usbd_ioreq.o + 0x08004ac6 USBD_CtlSendData .text.USBD_CtlContinueSendData - 0x08004a22 0x10 build/usbd_ioreq.o - 0x08004a22 USBD_CtlContinueSendData + 0x08004ae2 0x10 build/usbd_ioreq.o + 0x08004ae2 USBD_CtlContinueSendData .text.USBD_CtlPrepareRx - 0x08004a32 0x22 build/usbd_ioreq.o - 0x08004a32 USBD_CtlPrepareRx + 0x08004af2 0x22 build/usbd_ioreq.o + 0x08004af2 USBD_CtlPrepareRx .text.USBD_CtlContinueRx - 0x08004a54 0x10 build/usbd_ioreq.o - 0x08004a54 USBD_CtlContinueRx + 0x08004b14 0x10 build/usbd_ioreq.o + 0x08004b14 USBD_CtlContinueRx .text.USBD_CtlSendStatus - 0x08004a64 0x16 build/usbd_ioreq.o - 0x08004a64 USBD_CtlSendStatus + 0x08004b24 0x16 build/usbd_ioreq.o + 0x08004b24 USBD_CtlSendStatus .text.USBD_CtlReceiveStatus - 0x08004a7a 0x16 build/usbd_ioreq.o - 0x08004a7a USBD_CtlReceiveStatus + 0x08004b3a 0x16 build/usbd_ioreq.o + 0x08004b3a USBD_CtlReceiveStatus .text.USBD_CDC_EP0_RxReady - 0x08004a90 0x40 build/usbd_cdc.o + 0x08004b50 0x40 build/usbd_cdc.o .text.USBD_CDC_GetDeviceQualifierDescriptor - 0x08004ad0 0xc build/usbd_cdc.o - 0x08004ad0 USBD_CDC_GetDeviceQualifierDescriptor + 0x08004b90 0xc build/usbd_cdc.o + 0x08004b90 USBD_CDC_GetDeviceQualifierDescriptor .text.USBD_CDC_GetOtherSpeedCfgDesc - 0x08004adc 0x48 build/usbd_cdc.o + 0x08004b9c 0x48 build/usbd_cdc.o .text.USBD_CDC_GetFSCfgDesc - 0x08004b24 0x48 build/usbd_cdc.o + 0x08004be4 0x48 build/usbd_cdc.o .text.USBD_CDC_GetHSCfgDesc - 0x08004b6c 0x48 build/usbd_cdc.o + 0x08004c2c 0x48 build/usbd_cdc.o .text.USBD_CDC_DataOut - 0x08004bb4 0x38 build/usbd_cdc.o + 0x08004c74 0x38 build/usbd_cdc.o .text.USBD_CDC_DataIn - 0x08004bec 0x7c build/usbd_cdc.o + 0x08004cac 0x7c build/usbd_cdc.o .text.USBD_CDC_Setup - 0x08004c68 0x11a build/usbd_cdc.o + 0x08004d28 0x11a build/usbd_cdc.o .text.USBD_CDC_DeInit - 0x08004d82 0x64 build/usbd_cdc.o + 0x08004e42 0x64 build/usbd_cdc.o .text.USBD_CDC_Init - 0x08004de6 0xee build/usbd_cdc.o + 0x08004ea6 0xee build/usbd_cdc.o .text.USBD_CDC_RegisterInterface - 0x08004ed4 0x16 build/usbd_cdc.o - 0x08004ed4 USBD_CDC_RegisterInterface + 0x08004f94 0x16 build/usbd_cdc.o + 0x08004f94 USBD_CDC_RegisterInterface .text.USBD_CDC_SetTxBuffer - 0x08004eea 0x1c build/usbd_cdc.o - 0x08004eea USBD_CDC_SetTxBuffer + 0x08004faa 0x1c build/usbd_cdc.o + 0x08004faa USBD_CDC_SetTxBuffer .text.USBD_CDC_SetRxBuffer - 0x08004f06 0x18 build/usbd_cdc.o - 0x08004f06 USBD_CDC_SetRxBuffer + 0x08004fc6 0x18 build/usbd_cdc.o + 0x08004fc6 USBD_CDC_SetRxBuffer .text.USBD_CDC_TransmitPacket - 0x08004f1e 0x36 build/usbd_cdc.o - 0x08004f1e USBD_CDC_TransmitPacket + 0x08004fde 0x36 build/usbd_cdc.o + 0x08004fde USBD_CDC_TransmitPacket .text.USBD_CDC_ReceivePacket - 0x08004f54 0x38 build/usbd_cdc.o - 0x08004f54 USBD_CDC_ReceivePacket + 0x08005014 0x38 build/usbd_cdc.o + 0x08005014 USBD_CDC_ReceivePacket .text.Reset_Handler - 0x08004f8c 0x50 build/startup_stm32f429xx.o - 0x08004f8c Reset_Handler + 0x0800504c 0x50 build/startup_stm32f429xx.o + 0x0800504c Reset_Handler .text.Default_Handler - 0x08004fdc 0x2 build/startup_stm32f429xx.o - 0x08004fdc RTC_Alarm_IRQHandler - 0x08004fdc HASH_RNG_IRQHandler - 0x08004fdc EXTI2_IRQHandler - 0x08004fdc TIM8_CC_IRQHandler - 0x08004fdc UART8_IRQHandler - 0x08004fdc SPI4_IRQHandler - 0x08004fdc TIM1_CC_IRQHandler - 0x08004fdc DMA2_Stream5_IRQHandler - 0x08004fdc DMA1_Stream5_IRQHandler - 0x08004fdc PVD_IRQHandler - 0x08004fdc SDIO_IRQHandler - 0x08004fdc TAMP_STAMP_IRQHandler - 0x08004fdc CAN2_RX1_IRQHandler - 0x08004fdc TIM8_TRG_COM_TIM14_IRQHandler - 0x08004fdc TIM1_UP_TIM10_IRQHandler - 0x08004fdc TIM8_UP_TIM13_IRQHandler - 0x08004fdc I2C3_ER_IRQHandler - 0x08004fdc I2C2_EV_IRQHandler - 0x08004fdc DMA1_Stream2_IRQHandler - 0x08004fdc CAN1_RX0_IRQHandler - 0x08004fdc FPU_IRQHandler - 0x08004fdc OTG_HS_WKUP_IRQHandler - 0x08004fdc LTDC_ER_IRQHandler - 0x08004fdc CAN2_SCE_IRQHandler - 0x08004fdc DMA2_Stream2_IRQHandler - 0x08004fdc SPI1_IRQHandler - 0x08004fdc TIM6_DAC_IRQHandler - 0x08004fdc TIM1_BRK_TIM9_IRQHandler - 0x08004fdc DCMI_IRQHandler - 0x08004fdc CAN2_RX0_IRQHandler - 0x08004fdc DMA2_Stream3_IRQHandler - 0x08004fdc USART6_IRQHandler - 0x08004fdc USART3_IRQHandler - 0x08004fdc CAN1_RX1_IRQHandler - 0x08004fdc UART5_IRQHandler - 0x08004fdc TIM4_IRQHandler - 0x08004fdc I2C1_EV_IRQHandler - 0x08004fdc DMA1_Stream6_IRQHandler - 0x08004fdc DMA1_Stream1_IRQHandler - 0x08004fdc UART4_IRQHandler - 0x08004fdc TIM3_IRQHandler - 0x08004fdc RCC_IRQHandler - 0x08004fdc TIM8_BRK_TIM12_IRQHandler - 0x08004fdc Default_Handler - 0x08004fdc EXTI15_10_IRQHandler - 0x08004fdc ADC_IRQHandler - 0x08004fdc DMA1_Stream7_IRQHandler - 0x08004fdc SPI5_IRQHandler - 0x08004fdc TIM7_IRQHandler - 0x08004fdc CAN2_TX_IRQHandler - 0x08004fdc TIM5_IRQHandler - 0x08004fdc DMA2_Stream7_IRQHandler - 0x08004fdc I2C3_EV_IRQHandler - 0x08004fdc EXTI9_5_IRQHandler - 0x08004fdc RTC_WKUP_IRQHandler - 0x08004fdc LTDC_IRQHandler - 0x08004fdc ETH_WKUP_IRQHandler - 0x08004fdc SPI2_IRQHandler - 0x08004fdc OTG_HS_EP1_IN_IRQHandler - 0x08004fdc DMA1_Stream0_IRQHandler - 0x08004fdc CAN1_TX_IRQHandler - 0x08004fdc EXTI4_IRQHandler - 0x08004fdc ETH_IRQHandler - 0x08004fdc OTG_HS_EP1_OUT_IRQHandler - 0x08004fdc WWDG_IRQHandler - 0x08004fdc SPI6_IRQHandler - 0x08004fdc TIM2_IRQHandler - 0x08004fdc OTG_FS_WKUP_IRQHandler - 0x08004fdc TIM1_TRG_COM_TIM11_IRQHandler - 0x08004fdc OTG_HS_IRQHandler - 0x08004fdc DMA2D_IRQHandler - 0x08004fdc EXTI1_IRQHandler - 0x08004fdc UART7_IRQHandler - 0x08004fdc USART2_IRQHandler - 0x08004fdc I2C2_ER_IRQHandler - 0x08004fdc DMA2_Stream1_IRQHandler - 0x08004fdc CAN1_SCE_IRQHandler - 0x08004fdc FLASH_IRQHandler - 0x08004fdc DMA2_Stream4_IRQHandler - 0x08004fdc USART1_IRQHandler - 0x08004fdc SPI3_IRQHandler - 0x08004fdc DMA1_Stream4_IRQHandler - 0x08004fdc I2C1_ER_IRQHandler - 0x08004fdc FMC_IRQHandler - 0x08004fdc DMA2_Stream6_IRQHandler - 0x08004fdc SAI1_IRQHandler - 0x08004fdc DMA1_Stream3_IRQHandler + 0x0800509c 0x2 build/startup_stm32f429xx.o + 0x0800509c RTC_Alarm_IRQHandler + 0x0800509c HASH_RNG_IRQHandler + 0x0800509c EXTI2_IRQHandler + 0x0800509c TIM8_CC_IRQHandler + 0x0800509c UART8_IRQHandler + 0x0800509c SPI4_IRQHandler + 0x0800509c TIM1_CC_IRQHandler + 0x0800509c DMA2_Stream5_IRQHandler + 0x0800509c DMA1_Stream5_IRQHandler + 0x0800509c PVD_IRQHandler + 0x0800509c SDIO_IRQHandler + 0x0800509c TAMP_STAMP_IRQHandler + 0x0800509c CAN2_RX1_IRQHandler + 0x0800509c TIM8_TRG_COM_TIM14_IRQHandler + 0x0800509c TIM1_UP_TIM10_IRQHandler + 0x0800509c TIM8_UP_TIM13_IRQHandler + 0x0800509c I2C3_ER_IRQHandler + 0x0800509c I2C2_EV_IRQHandler + 0x0800509c DMA1_Stream2_IRQHandler + 0x0800509c CAN1_RX0_IRQHandler + 0x0800509c FPU_IRQHandler + 0x0800509c OTG_HS_WKUP_IRQHandler + 0x0800509c LTDC_ER_IRQHandler + 0x0800509c CAN2_SCE_IRQHandler + 0x0800509c DMA2_Stream2_IRQHandler + 0x0800509c SPI1_IRQHandler + 0x0800509c TIM6_DAC_IRQHandler + 0x0800509c TIM1_BRK_TIM9_IRQHandler + 0x0800509c DCMI_IRQHandler + 0x0800509c CAN2_RX0_IRQHandler + 0x0800509c DMA2_Stream3_IRQHandler + 0x0800509c USART6_IRQHandler + 0x0800509c USART3_IRQHandler + 0x0800509c CAN1_RX1_IRQHandler + 0x0800509c UART5_IRQHandler + 0x0800509c TIM4_IRQHandler + 0x0800509c I2C1_EV_IRQHandler + 0x0800509c DMA1_Stream6_IRQHandler + 0x0800509c DMA1_Stream1_IRQHandler + 0x0800509c UART4_IRQHandler + 0x0800509c TIM3_IRQHandler + 0x0800509c RCC_IRQHandler + 0x0800509c TIM8_BRK_TIM12_IRQHandler + 0x0800509c Default_Handler + 0x0800509c EXTI15_10_IRQHandler + 0x0800509c ADC_IRQHandler + 0x0800509c DMA1_Stream7_IRQHandler + 0x0800509c SPI5_IRQHandler + 0x0800509c TIM7_IRQHandler + 0x0800509c CAN2_TX_IRQHandler + 0x0800509c TIM5_IRQHandler + 0x0800509c DMA2_Stream7_IRQHandler + 0x0800509c I2C3_EV_IRQHandler + 0x0800509c EXTI9_5_IRQHandler + 0x0800509c RTC_WKUP_IRQHandler + 0x0800509c LTDC_IRQHandler + 0x0800509c ETH_WKUP_IRQHandler + 0x0800509c SPI2_IRQHandler + 0x0800509c OTG_HS_EP1_IN_IRQHandler + 0x0800509c DMA1_Stream0_IRQHandler + 0x0800509c CAN1_TX_IRQHandler + 0x0800509c EXTI4_IRQHandler + 0x0800509c ETH_IRQHandler + 0x0800509c OTG_HS_EP1_OUT_IRQHandler + 0x0800509c WWDG_IRQHandler + 0x0800509c SPI6_IRQHandler + 0x0800509c TIM2_IRQHandler + 0x0800509c OTG_FS_WKUP_IRQHandler + 0x0800509c TIM1_TRG_COM_TIM11_IRQHandler + 0x0800509c OTG_HS_IRQHandler + 0x0800509c DMA2D_IRQHandler + 0x0800509c EXTI1_IRQHandler + 0x0800509c UART7_IRQHandler + 0x0800509c USART2_IRQHandler + 0x0800509c I2C2_ER_IRQHandler + 0x0800509c DMA2_Stream1_IRQHandler + 0x0800509c CAN1_SCE_IRQHandler + 0x0800509c FLASH_IRQHandler + 0x0800509c DMA2_Stream4_IRQHandler + 0x0800509c USART1_IRQHandler + 0x0800509c SPI3_IRQHandler + 0x0800509c DMA1_Stream4_IRQHandler + 0x0800509c I2C1_ER_IRQHandler + 0x0800509c FMC_IRQHandler + 0x0800509c DMA2_Stream6_IRQHandler + 0x0800509c SAI1_IRQHandler + 0x0800509c DMA1_Stream3_IRQHandler *(.glue_7) - .glue_7 0x08004fde 0x0 linker stubs + .glue_7 0x0800509e 0x0 linker stubs *(.glue_7t) - .glue_7t 0x08004fde 0x0 linker stubs + .glue_7t 0x0800509e 0x0 linker stubs *(.eh_frame) - *fill* 0x08004fde 0x2 - .eh_frame 0x08004fe0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + *fill* 0x0800509e 0x2 + .eh_frame 0x080050a0 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x08004fe0 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o - 0x08004fe0 _init - .init 0x08004fe4 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x080050a0 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + 0x080050a0 _init + .init 0x080050a4 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x08004fec 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o - 0x08004fec _fini - .fini 0x08004ff0 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o - 0x08004ff8 . = ALIGN (0x4) - 0x08004ff8 _etext = . + .fini 0x080050ac 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + 0x080050ac _fini + .fini 0x080050b0 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + 0x080050b8 . = ALIGN (0x4) + 0x080050b8 _etext = . -.vfp11_veneer 0x08004ff8 0x0 - .vfp11_veneer 0x08004ff8 0x0 linker stubs +.vfp11_veneer 0x080050b8 0x0 + .vfp11_veneer 0x080050b8 0x0 linker stubs -.v4_bx 0x08004ff8 0x0 - .v4_bx 0x08004ff8 0x0 linker stubs +.v4_bx 0x080050b8 0x0 + .v4_bx 0x080050b8 0x0 linker stubs -.iplt 0x08004ff8 0x0 - .iplt 0x08004ff8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x080050b8 0x0 + .iplt 0x080050b8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x08004ff8 0x60 - 0x08004ff8 . = ALIGN (0x4) +.rodata 0x080050b8 0x70 + 0x080050b8 . = ALIGN (0x4) *(.rodata) *(.rodata*) + .rodata.main.str1.4 + 0x080050b8 0x56 build/main.o + 0xe (size before relaxing) + *fill* 0x0800510e 0x2 .rodata.flagBitshiftOffset.0 - 0x08004ff8 0x8 build/stm32f4xx_hal_dma.o + 0x08005110 0x8 build/stm32f4xx_hal_dma.o .rodata.AHBPrescTable - 0x08005000 0x10 build/system_stm32f4xx.o - 0x08005000 AHBPrescTable + 0x08005118 0x10 build/system_stm32f4xx.o + 0x08005118 AHBPrescTable .rodata.USBD_FS_ProductStrDescriptor.str1.4 - 0x08005010 0x46 build/usbd_desc.o - 0x16 (size before relaxing) + 0x08005128 0x16 build/usbd_desc.o .rodata.USBD_FS_ManufacturerStrDescriptor.str1.4 - 0x08005056 0x13 build/usbd_desc.o + 0x08005128 0x13 build/usbd_desc.o .rodata.USBD_FS_ConfigStrDescriptor.str1.4 - 0x08005056 0xb build/usbd_desc.o + 0x08005128 0xb build/usbd_desc.o .rodata.USBD_FS_InterfaceStrDescriptor.str1.4 - 0x08005056 0xe build/usbd_desc.o - 0x0800506c . = ALIGN (0x4) - *fill* 0x08005056 0x2 + 0x08005128 0xe build/usbd_desc.o + 0x08005140 . = ALIGN (0x4) -.ARM.extab 0x08005058 0x0 - 0x08005058 . = ALIGN (0x4) +.ARM.extab 0x08005128 0x0 + 0x08005128 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08005058 . = ALIGN (0x4) + 0x08005128 . = ALIGN (0x4) -.ARM 0x08005058 0x8 - 0x08005058 . = ALIGN (0x4) - 0x08005058 __exidx_start = . +.ARM 0x08005128 0x8 + 0x08005128 . = ALIGN (0x4) + 0x08005128 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x08005058 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - 0x08005060 __exidx_end = . - 0x08005060 . = ALIGN (0x4) + .ARM.exidx 0x08005128 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x08005130 __exidx_end = . + 0x08005130 . = ALIGN (0x4) -.preinit_array 0x08005060 0x0 - 0x08005060 . = ALIGN (0x4) - 0x08005060 PROVIDE (__preinit_array_start = .) +.preinit_array 0x08005130 0x0 + 0x08005130 . = ALIGN (0x4) + 0x08005130 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08005060 PROVIDE (__preinit_array_end = .) - 0x08005060 . = ALIGN (0x4) + 0x08005130 PROVIDE (__preinit_array_end = .) + 0x08005130 . = ALIGN (0x4) -.init_array 0x08005060 0x4 - 0x08005060 . = ALIGN (0x4) - 0x08005060 PROVIDE (__init_array_start = .) +.init_array 0x08005130 0x4 + 0x08005130 . = ALIGN (0x4) + 0x08005130 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08005060 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x08005064 PROVIDE (__init_array_end = .) - 0x08005064 . = ALIGN (0x4) + .init_array 0x08005130 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x08005134 PROVIDE (__init_array_end = .) + 0x08005134 . = ALIGN (0x4) -.fini_array 0x08005064 0x4 - 0x08005064 . = ALIGN (0x4) - 0x08005064 PROVIDE (__fini_array_start = .) +.fini_array 0x08005134 0x4 + 0x08005134 . = ALIGN (0x4) + 0x08005134 PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08005064 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x08005068 PROVIDE (__fini_array_end = .) - 0x08005068 . = ALIGN (0x4) - 0x08005068 _sidata = LOADADDR (.data) + .fini_array 0x08005134 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x08005138 PROVIDE (__fini_array_end = .) + 0x08005138 . = ALIGN (0x4) + 0x08005138 _sidata = LOADADDR (.data) -.rel.dyn 0x08005068 0x0 - .rel.iplt 0x08005068 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x08005138 0x0 + .rel.iplt 0x08005138 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o -.data 0x20000000 0x118 load address 0x08005068 +.data 0x20000000 0x118 load address 0x08005138 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -2049,19 +2051,19 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o 0x20000118 . = ALIGN (0x4) *fill* 0x20000116 0x2 0x20000118 _edata = . - 0x08005180 _siccmram = LOADADDR (.ccmram) + 0x08005250 _siccmram = LOADADDR (.ccmram) .tm_clone_table - 0x20000118 0x0 load address 0x08005180 + 0x20000118 0x0 load address 0x08005250 .tm_clone_table 0x20000118 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o .tm_clone_table 0x20000118 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtend.o -.igot.plt 0x20000118 0x0 load address 0x08005180 +.igot.plt 0x20000118 0x0 load address 0x08005250 .igot.plt 0x20000118 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o -.ccmram 0x10000000 0x0 load address 0x08005180 +.ccmram 0x10000000 0x0 load address 0x08005250 0x10000000 . = ALIGN (0x4) 0x10000000 _sccmram = . *(.ccmram) @@ -2234,88 +2236,88 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtend.o -.debug_info 0x00000000 0x1631e - .debug_info 0x00000000 0x15b1 build/main.o - .debug_info 0x000015b1 0x1050 build/stm32f4xx_it.o - .debug_info 0x00002601 0xb62 build/stm32f4xx_hal_msp.o - .debug_info 0x00003163 0xc12 build/stm32f4xx_hal_rcc.o - .debug_info 0x00003d75 0x846 build/stm32f4xx_hal_gpio.o - .debug_info 0x000045bb 0xbb6 build/stm32f4xx_hal_dma.o - .debug_info 0x00005171 0x11f2 build/stm32f4xx_hal_cortex.o - .debug_info 0x00006363 0xb74 build/stm32f4xx_hal.o - .debug_info 0x00006ed7 0x5bd build/system_stm32f4xx.o - .debug_info 0x00007494 0x874 build/usb_device.o - .debug_info 0x00007d08 0x644 build/usbd_desc.o - .debug_info 0x0000834c 0xad2 build/usbd_cdc_if.o - .debug_info 0x00008e1e 0x24f9 build/usbd_conf.o - .debug_info 0x0000b317 0x1f13 build/stm32f4xx_hal_pcd.o - .debug_info 0x0000d22a 0x7a7 build/stm32f4xx_hal_pcd_ex.o - .debug_info 0x0000d9d1 0x21de build/stm32f4xx_ll_usb.o - .debug_info 0x0000fbaf 0x1036 build/stm32f4xx_hal_adc.o - .debug_info 0x00010be5 0x1440 build/usbd_core.o - .debug_info 0x00012025 0x15a9 build/usbd_ctlreq.o - .debug_info 0x000135ce 0xa05 build/usbd_ioreq.o - .debug_info 0x00013fd3 0x1961 build/usbd_cdc.o - .debug_info 0x00015934 0x30 build/startup_stm32f429xx.o - .debug_info 0x00015964 0x10b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) - .debug_info 0x00015a6f 0x135 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) - .debug_info 0x00015ba4 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_ldivmod.o) - .debug_info 0x00015bc9 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_info 0x00015bed 0x6f5 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - .debug_info 0x000162e2 0x3c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) +.debug_info 0x00000000 0x163a9 + .debug_info 0x00000000 0x162c build/main.o + .debug_info 0x0000162c 0x1060 build/stm32f4xx_it.o + .debug_info 0x0000268c 0xb62 build/stm32f4xx_hal_msp.o + .debug_info 0x000031ee 0xc12 build/stm32f4xx_hal_rcc.o + .debug_info 0x00003e00 0x846 build/stm32f4xx_hal_gpio.o + .debug_info 0x00004646 0xbb6 build/stm32f4xx_hal_dma.o + .debug_info 0x000051fc 0x11f2 build/stm32f4xx_hal_cortex.o + .debug_info 0x000063ee 0xb74 build/stm32f4xx_hal.o + .debug_info 0x00006f62 0x5bd build/system_stm32f4xx.o + .debug_info 0x0000751f 0x874 build/usb_device.o + .debug_info 0x00007d93 0x644 build/usbd_desc.o + .debug_info 0x000083d7 0xad2 build/usbd_cdc_if.o + .debug_info 0x00008ea9 0x24f9 build/usbd_conf.o + .debug_info 0x0000b3a2 0x1f13 build/stm32f4xx_hal_pcd.o + .debug_info 0x0000d2b5 0x7a7 build/stm32f4xx_hal_pcd_ex.o + .debug_info 0x0000da5c 0x21de build/stm32f4xx_ll_usb.o + .debug_info 0x0000fc3a 0x1036 build/stm32f4xx_hal_adc.o + .debug_info 0x00010c70 0x1440 build/usbd_core.o + .debug_info 0x000120b0 0x15a9 build/usbd_ctlreq.o + .debug_info 0x00013659 0xa05 build/usbd_ioreq.o + .debug_info 0x0001405e 0x1961 build/usbd_cdc.o + .debug_info 0x000159bf 0x30 build/startup_stm32f429xx.o + .debug_info 0x000159ef 0x10b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .debug_info 0x00015afa 0x135 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .debug_info 0x00015c2f 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_ldivmod.o) + .debug_info 0x00015c54 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_info 0x00015c78 0x6f5 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .debug_info 0x0001636d 0x3c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) -.debug_abbrev 0x00000000 0x391b - .debug_abbrev 0x00000000 0x304 build/main.o - .debug_abbrev 0x00000304 0x225 build/stm32f4xx_it.o - .debug_abbrev 0x00000529 0x1f7 build/stm32f4xx_hal_msp.o - .debug_abbrev 0x00000720 0x2de build/stm32f4xx_hal_rcc.o - .debug_abbrev 0x000009fe 0x22b build/stm32f4xx_hal_gpio.o - .debug_abbrev 0x00000c29 0x2fe build/stm32f4xx_hal_dma.o - .debug_abbrev 0x00000f27 0x3ca build/stm32f4xx_hal_cortex.o - .debug_abbrev 0x000012f1 0x244 build/stm32f4xx_hal.o - .debug_abbrev 0x00001535 0x11b build/system_stm32f4xx.o - .debug_abbrev 0x00001650 0x19c build/usb_device.o - .debug_abbrev 0x000017ec 0x208 build/usbd_desc.o - .debug_abbrev 0x000019f4 0x2bc build/usbd_cdc_if.o - .debug_abbrev 0x00001cb0 0x34b build/usbd_conf.o - .debug_abbrev 0x00001ffb 0x2e7 build/stm32f4xx_hal_pcd.o - .debug_abbrev 0x000022e2 0x1c5 build/stm32f4xx_hal_pcd_ex.o - .debug_abbrev 0x000024a7 0x344 build/stm32f4xx_ll_usb.o - .debug_abbrev 0x000027eb 0x2c7 build/stm32f4xx_hal_adc.o - .debug_abbrev 0x00002ab2 0x2f7 build/usbd_core.o - .debug_abbrev 0x00002da9 0x359 build/usbd_ctlreq.o - .debug_abbrev 0x00003102 0x195 build/usbd_ioreq.o - .debug_abbrev 0x00003297 0x32f build/usbd_cdc.o - .debug_abbrev 0x000035c6 0x1d build/startup_stm32f429xx.o - .debug_abbrev 0x000035e3 0xc9 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) - .debug_abbrev 0x000036ac 0xb7 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) - .debug_abbrev 0x00003763 0x14 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_ldivmod.o) - .debug_abbrev 0x00003777 0x14 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_abbrev 0x0000378b 0x16a /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - .debug_abbrev 0x000038f5 0x26 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) +.debug_abbrev 0x00000000 0x3951 + .debug_abbrev 0x00000000 0x32f build/main.o + .debug_abbrev 0x0000032f 0x230 build/stm32f4xx_it.o + .debug_abbrev 0x0000055f 0x1f7 build/stm32f4xx_hal_msp.o + .debug_abbrev 0x00000756 0x2de build/stm32f4xx_hal_rcc.o + .debug_abbrev 0x00000a34 0x22b build/stm32f4xx_hal_gpio.o + .debug_abbrev 0x00000c5f 0x2fe build/stm32f4xx_hal_dma.o + .debug_abbrev 0x00000f5d 0x3ca build/stm32f4xx_hal_cortex.o + .debug_abbrev 0x00001327 0x244 build/stm32f4xx_hal.o + .debug_abbrev 0x0000156b 0x11b build/system_stm32f4xx.o + .debug_abbrev 0x00001686 0x19c build/usb_device.o + .debug_abbrev 0x00001822 0x208 build/usbd_desc.o + .debug_abbrev 0x00001a2a 0x2bc build/usbd_cdc_if.o + .debug_abbrev 0x00001ce6 0x34b build/usbd_conf.o + .debug_abbrev 0x00002031 0x2e7 build/stm32f4xx_hal_pcd.o + .debug_abbrev 0x00002318 0x1c5 build/stm32f4xx_hal_pcd_ex.o + .debug_abbrev 0x000024dd 0x344 build/stm32f4xx_ll_usb.o + .debug_abbrev 0x00002821 0x2c7 build/stm32f4xx_hal_adc.o + .debug_abbrev 0x00002ae8 0x2f7 build/usbd_core.o + .debug_abbrev 0x00002ddf 0x359 build/usbd_ctlreq.o + .debug_abbrev 0x00003138 0x195 build/usbd_ioreq.o + .debug_abbrev 0x000032cd 0x32f build/usbd_cdc.o + .debug_abbrev 0x000035fc 0x1d build/startup_stm32f429xx.o + .debug_abbrev 0x00003619 0xc9 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .debug_abbrev 0x000036e2 0xb7 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .debug_abbrev 0x00003799 0x14 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_ldivmod.o) + .debug_abbrev 0x000037ad 0x14 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_abbrev 0x000037c1 0x16a /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .debug_abbrev 0x0000392b 0x26 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) -.debug_loc 0x00000000 0xd511 +.debug_loc 0x00000000 0xd514 .debug_loc 0x00000000 0x11b build/main.o - .debug_loc 0x0000011b 0x1ce build/stm32f4xx_it.o - .debug_loc 0x000002e9 0x10d build/stm32f4xx_hal_msp.o - .debug_loc 0x000003f6 0x720 build/stm32f4xx_hal_rcc.o - .debug_loc 0x00000b16 0x60b build/stm32f4xx_hal_gpio.o - .debug_loc 0x00001121 0xe9a build/stm32f4xx_hal_dma.o - .debug_loc 0x00001fbb 0x8ff build/stm32f4xx_hal_cortex.o - .debug_loc 0x000028ba 0x1f9 build/stm32f4xx_hal.o - .debug_loc 0x00002ab3 0xbd build/system_stm32f4xx.o - .debug_loc 0x00002b70 0x20 build/usb_device.o - .debug_loc 0x00002b90 0x4e7 build/usbd_desc.o - .debug_loc 0x00003077 0x1e6 build/usbd_cdc_if.o - .debug_loc 0x0000325d 0x10f3 build/usbd_conf.o - .debug_loc 0x00004350 0x1832 build/stm32f4xx_hal_pcd.o - .debug_loc 0x00005b82 0x13d build/stm32f4xx_hal_pcd_ex.o - .debug_loc 0x00005cbf 0x2ac8 build/stm32f4xx_ll_usb.o - .debug_loc 0x00008787 0xfe9 build/stm32f4xx_hal_adc.o - .debug_loc 0x00009770 0x115e build/usbd_core.o - .debug_loc 0x0000a8ce 0x1bc1 build/usbd_ctlreq.o - .debug_loc 0x0000c48f 0x3f8 build/usbd_ioreq.o - .debug_loc 0x0000c887 0xc8a build/usbd_cdc.o + .debug_loc 0x0000011b 0x1d1 build/stm32f4xx_it.o + .debug_loc 0x000002ec 0x10d build/stm32f4xx_hal_msp.o + .debug_loc 0x000003f9 0x720 build/stm32f4xx_hal_rcc.o + .debug_loc 0x00000b19 0x60b build/stm32f4xx_hal_gpio.o + .debug_loc 0x00001124 0xe9a build/stm32f4xx_hal_dma.o + .debug_loc 0x00001fbe 0x8ff build/stm32f4xx_hal_cortex.o + .debug_loc 0x000028bd 0x1f9 build/stm32f4xx_hal.o + .debug_loc 0x00002ab6 0xbd build/system_stm32f4xx.o + .debug_loc 0x00002b73 0x20 build/usb_device.o + .debug_loc 0x00002b93 0x4e7 build/usbd_desc.o + .debug_loc 0x0000307a 0x1e6 build/usbd_cdc_if.o + .debug_loc 0x00003260 0x10f3 build/usbd_conf.o + .debug_loc 0x00004353 0x1832 build/stm32f4xx_hal_pcd.o + .debug_loc 0x00005b85 0x13d build/stm32f4xx_hal_pcd_ex.o + .debug_loc 0x00005cc2 0x2ac8 build/stm32f4xx_ll_usb.o + .debug_loc 0x0000878a 0xfe9 build/stm32f4xx_hal_adc.o + .debug_loc 0x00009773 0x115e build/usbd_core.o + .debug_loc 0x0000a8d1 0x1bc1 build/usbd_ctlreq.o + .debug_loc 0x0000c492 0x3f8 build/usbd_ioreq.o + .debug_loc 0x0000c88a 0xc8a build/usbd_cdc.o .debug_aranges 0x00000000 0xda0 .debug_aranges @@ -2375,118 +2377,118 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.debug_frame 0x00002028 0x44 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_ldivmod.o) - .debug_frame 0x0000206c 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_frame 0x00002098 0x34 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) +.debug_frame 0x00000000 0x20d4 + .debug_frame 0x00000000 0xc4 build/main.o + .debug_frame 0x000000c4 0x138 build/stm32f4xx_it.o + .debug_frame 0x000001fc 0x64 build/stm32f4xx_hal_msp.o + .debug_frame 0x00000260 0x16c build/stm32f4xx_hal_rcc.o + .debug_frame 0x000003cc 0xd8 build/stm32f4xx_hal_gpio.o + .debug_frame 0x000004a4 0x188 build/stm32f4xx_hal_dma.o + .debug_frame 0x0000062c 0x214 build/stm32f4xx_hal_cortex.o + .debug_frame 0x00000840 0x20c build/stm32f4xx_hal.o + .debug_frame 0x00000a4c 0x30 build/system_stm32f4xx.o + .debug_frame 0x00000a7c 0x28 build/usb_device.o + .debug_frame 0x00000aa4 0xe0 build/usbd_desc.o + .debug_frame 0x00000b84 0x88 build/usbd_cdc_if.o + .debug_frame 0x00000c0c 0x2e4 build/usbd_conf.o + .debug_frame 0x00000ef0 0x388 build/stm32f4xx_hal_pcd.o + .debug_frame 0x00001278 0x5c build/stm32f4xx_hal_pcd_ex.o + .debug_frame 0x000012d4 0x494 build/stm32f4xx_ll_usb.o + .debug_frame 0x00001768 0x268 build/stm32f4xx_hal_adc.o + .debug_frame 0x000019d0 0x240 build/usbd_core.o + .debug_frame 0x00001c10 0x180 build/usbd_ctlreq.o + .debug_frame 0x00001d90 0xb8 build/usbd_ioreq.o + .debug_frame 0x00001e48 0x190 build/usbd_cdc.o + .debug_frame 0x00001fd8 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .debug_frame 0x00002004 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .debug_frame 0x00002030 0x44 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_ldivmod.o) + .debug_frame 0x00002074 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x000020a0 0x34 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .debug_loclists 0x00000000 0xc0b @@ -2656,6 +2658,7 @@ HAL_DeInit build/stm32f4xx_hal.o HAL_Delay build/stm32f4xx_hal.o build/stm32f4xx_ll_usb.o build/usbd_conf.o +HAL_DelayUS build/main.o HAL_DisableCompensationCell build/stm32f4xx_hal.o HAL_DisableMemorySwappingBank build/stm32f4xx_hal.o HAL_EXTI_ClearConfigLine build/stm32f4xx_hal_exti.o diff --git a/build/stm32f4xx_it.lst b/build/stm32f4xx_it.lst index 536e076..c67161f 100644 --- a/build/stm32f4xx_it.lst +++ b/build/stm32f4xx_it.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccdzv1TD.s page 1 +ARM GAS /tmp/ccmTyUBf.s page 1 1 .cpu cortex-m4 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f4xx_it.c **** 30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */ - ARM GAS /tmp/ccdzv1TD.s page 2 + ARM GAS /tmp/ccmTyUBf.s page 2 31:Core/Src/stm32f4xx_it.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 77:Core/Src/stm32f4xx_it.c **** { 78:Core/Src/stm32f4xx_it.c **** } 37 .loc 1 78 3 view .LVU2 - ARM GAS /tmp/ccdzv1TD.s page 3 + ARM GAS /tmp/ccmTyUBf.s page 3 76:Core/Src/stm32f4xx_it.c **** { @@ -178,7 +178,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 98:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault. 99:Core/Src/stm32f4xx_it.c **** */ 100:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void) - ARM GAS /tmp/ccdzv1TD.s page 4 + ARM GAS /tmp/ccmTyUBf.s page 4 101:Core/Src/stm32f4xx_it.c **** { @@ -238,7 +238,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 106 .loc 1 124 3 view .LVU14 120:Core/Src/stm32f4xx_it.c **** { 107 .loc 1 120 9 view .LVU15 - ARM GAS /tmp/ccdzv1TD.s page 5 + ARM GAS /tmp/ccmTyUBf.s page 5 108 0000 FEE7 b .L8 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 146:Core/Src/stm32f4xx_it.c **** { 144 .loc 1 146 1 view -0 145 .cfi_startproc - ARM GAS /tmp/ccdzv1TD.s page 6 + ARM GAS /tmp/ccmTyUBf.s page 6 146 @ args = 0, pretend = 0, frame = 0 @@ -358,7 +358,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 169:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service. 170:Core/Src/stm32f4xx_it.c **** */ 171:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void) - ARM GAS /tmp/ccdzv1TD.s page 7 + ARM GAS /tmp/ccmTyUBf.s page 7 172:Core/Src/stm32f4xx_it.c **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 216 .LFE247: 218 .section .text.EXTI0_IRQHandler,"ax",%progbits 219 .align 1 - ARM GAS /tmp/ccdzv1TD.s page 8 + ARM GAS /tmp/ccmTyUBf.s page 8 220 .global EXTI0_IRQHandler @@ -453,14 +453,14 @@ ARM GAS /tmp/ccdzv1TD.s page 1 208:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_start_DMA_N = ADC_BUFF_SIZE - hdma_adc1.Instance->NDTR; 236 .loc 1 208 3 view .LVU30 237 .loc 1 208 64 is_stmt 0 view .LVU31 - 238 0002 0A4B ldr r3, .L20 + 238 0002 0C4B ldr r3, .L20 239 0004 1B68 ldr r3, [r3] 240 .loc 1 208 73 view .LVU32 241 0006 5B68 ldr r3, [r3, #4] 242 .loc 1 208 53 view .LVU33 243 0008 C3F16403 rsb r3, r3, #100 244 .loc 1 208 37 view .LVU34 - 245 000c 084A ldr r2, .L20+4 + 245 000c 0A4A ldr r2, .L20+4 246 000e 9360 str r3, [r2, #8] 209:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_start_DMA_N < ADC_BUFF_SIZE/2) { 247 .loc 1 209 3 is_stmt 1 view .LVU35 @@ -468,7 +468,7 @@ ARM GAS /tmp/ccdzv1TD.s page 1 249 0010 9368 ldr r3, [r2, #8] 250 .loc 1 209 6 view .LVU37 251 0012 312B cmp r3, #49 - 252 0014 06D8 bhi .L17 + 252 0014 0AD8 bhi .L17 210:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =1; // first half DMA buffer 253 .loc 1 210 5 is_stmt 1 view .LVU38 254 .loc 1 210 40 is_stmt 0 view .LVU39 @@ -478,913 +478,928 @@ ARM GAS /tmp/ccdzv1TD.s page 1 258 .L18: 211:Core/Src/stm32f4xx_it.c **** } else{ 212:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag =2; // second half DMA buffer - ARM GAS /tmp/ccdzv1TD.s page 9 + ARM GAS /tmp/ccmTyUBf.s page 9 213:Core/Src/stm32f4xx_it.c **** } - 214:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 0 */ - 215:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(CURR_STEP_START_TRG_Pin); - 259 .loc 1 215 3 is_stmt 1 view .LVU40 - 260 001c 0120 movs r0, #1 - 261 001e FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler - 262 .LVL1: - 216:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 1 */ - 217:Core/Src/stm32f4xx_it.c **** - 218:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 1 */ - 219:Core/Src/stm32f4xx_it.c **** } - 263 .loc 1 219 1 is_stmt 0 view .LVU41 - 264 0022 08BD pop {r3, pc} - 265 .L17: + 214:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_N++; + 259 .loc 1 214 3 is_stmt 1 view .LVU40 + 260 .loc 1 214 14 is_stmt 0 view .LVU41 + 261 001c 064A ldr r2, .L20+4 + 262 001e 1368 ldr r3, [r2] + 263 .loc 1 214 26 view .LVU42 + 264 0020 0133 adds r3, r3, #1 + 265 0022 1360 str r3, [r2] + 215:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 0 */ + 216:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(CURR_STEP_START_TRG_Pin); + 266 .loc 1 216 3 is_stmt 1 view .LVU43 + 267 0024 0120 movs r0, #1 + 268 0026 FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler + 269 .LVL1: + 217:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI0_IRQn 1 */ + 218:Core/Src/stm32f4xx_it.c **** + 219:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI0_IRQn 1 */ + 220:Core/Src/stm32f4xx_it.c **** } + 270 .loc 1 220 1 is_stmt 0 view .LVU44 + 271 002a 08BD pop {r3, pc} + 272 .L17: 212:Core/Src/stm32f4xx_it.c **** } - 266 .loc 1 212 5 is_stmt 1 view .LVU42 + 273 .loc 1 212 5 is_stmt 1 view .LVU45 212:Core/Src/stm32f4xx_it.c **** } - 267 .loc 1 212 40 is_stmt 0 view .LVU43 - 268 0024 024B ldr r3, .L20+4 - 269 0026 0222 movs r2, #2 - 270 0028 1A71 strb r2, [r3, #4] - 271 002a F7E7 b .L18 - 272 .L21: - 273 .align 2 - 274 .L20: - 275 002c 00000000 .word hdma_adc1 - 276 0030 00000000 .word Sweep_state - 277 .cfi_endproc - 278 .LFE248: - 280 .section .text.EXTI3_IRQHandler,"ax",%progbits - 281 .align 1 - 282 .global EXTI3_IRQHandler - 283 .syntax unified - 284 .thumb - 285 .thumb_func - 287 EXTI3_IRQHandler: - 288 .LFB249: - 220:Core/Src/stm32f4xx_it.c **** - 221:Core/Src/stm32f4xx_it.c **** /** - 222:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line3 interrupt. - 223:Core/Src/stm32f4xx_it.c **** */ - 224:Core/Src/stm32f4xx_it.c **** void EXTI3_IRQHandler(void) - 225:Core/Src/stm32f4xx_it.c **** { - 289 .loc 1 225 1 is_stmt 1 view -0 - 290 .cfi_startproc - 291 @ args = 0, pretend = 0, frame = 0 - 292 @ frame_needed = 0, uses_anonymous_args = 0 - 293 0000 08B5 push {r3, lr} - 294 .LCFI2: - 295 .cfi_def_cfa_offset 8 - 296 .cfi_offset 3, -8 - 297 .cfi_offset 14, -4 - 226:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 0 */ - 227:Core/Src/stm32f4xx_it.c **** - 228:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 0 */ - 229:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(SWEEP_CYCLE_START_TRG_Pin); - 298 .loc 1 229 3 view .LVU45 - ARM GAS /tmp/ccdzv1TD.s page 10 + 274 .loc 1 212 40 is_stmt 0 view .LVU46 + 275 002c 024B ldr r3, .L20+4 + 276 002e 0222 movs r2, #2 + 277 0030 1A71 strb r2, [r3, #4] + 278 0032 F3E7 b .L18 + 279 .L21: + 280 .align 2 + 281 .L20: + 282 0034 00000000 .word hdma_adc1 + 283 0038 00000000 .word Sweep_state + 284 .cfi_endproc + 285 .LFE248: + 287 .section .text.EXTI3_IRQHandler,"ax",%progbits + 288 .align 1 + 289 .global EXTI3_IRQHandler + 290 .syntax unified + 291 .thumb + 292 .thumb_func + 294 EXTI3_IRQHandler: + 295 .LFB249: + 221:Core/Src/stm32f4xx_it.c **** + 222:Core/Src/stm32f4xx_it.c **** /** + 223:Core/Src/stm32f4xx_it.c **** * @brief This function handles EXTI line3 interrupt. + 224:Core/Src/stm32f4xx_it.c **** */ + 225:Core/Src/stm32f4xx_it.c **** void EXTI3_IRQHandler(void) + 226:Core/Src/stm32f4xx_it.c **** { + 296 .loc 1 226 1 is_stmt 1 view -0 + 297 .cfi_startproc + 298 @ args = 0, pretend = 0, frame = 0 + 299 @ frame_needed = 0, uses_anonymous_args = 0 + 300 0000 08B5 push {r3, lr} + 301 .LCFI2: + ARM GAS /tmp/ccmTyUBf.s page 10 - 299 0002 0220 movs r0, #2 - 300 0004 FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler - 301 .LVL2: - 230:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 1 */ - 231:Core/Src/stm32f4xx_it.c **** - 232:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 1 */ - 233:Core/Src/stm32f4xx_it.c **** } - 302 .loc 1 233 1 is_stmt 0 view .LVU46 - 303 0008 08BD pop {r3, pc} - 304 .cfi_endproc - 305 .LFE249: - 307 .section .text.DMA2_Stream0_IRQHandler,"ax",%progbits - 308 .align 1 - 309 .global DMA2_Stream0_IRQHandler - 310 .syntax unified - 311 .thumb - 312 .thumb_func - 314 DMA2_Stream0_IRQHandler: - 315 .LFB250: - 234:Core/Src/stm32f4xx_it.c **** - 235:Core/Src/stm32f4xx_it.c **** /** - 236:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream0 global interrupt. - 237:Core/Src/stm32f4xx_it.c **** */ - 238:Core/Src/stm32f4xx_it.c **** void DMA2_Stream0_IRQHandler(void) - 239:Core/Src/stm32f4xx_it.c **** { - 316 .loc 1 239 1 is_stmt 1 view -0 - 317 .cfi_startproc - 318 @ args = 0, pretend = 0, frame = 0 - 319 @ frame_needed = 0, uses_anonymous_args = 0 - 320 0000 08B5 push {r3, lr} - 321 .LCFI3: - 322 .cfi_def_cfa_offset 8 - 323 .cfi_offset 3, -8 - 324 .cfi_offset 14, -4 - 240:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */ - 241:Core/Src/stm32f4xx_it.c **** - 242:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 0 */ - 243:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1); - 325 .loc 1 243 3 view .LVU48 - 326 0002 0248 ldr r0, .L26 - 327 0004 FFF7FEFF bl HAL_DMA_IRQHandler - 328 .LVL3: - 244:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */ - 245:Core/Src/stm32f4xx_it.c **** - 246:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 1 */ - 247:Core/Src/stm32f4xx_it.c **** } - 329 .loc 1 247 1 is_stmt 0 view .LVU49 - 330 0008 08BD pop {r3, pc} - 331 .L27: - 332 000a 00BF .align 2 - 333 .L26: - 334 000c 00000000 .word hdma_adc1 - 335 .cfi_endproc - 336 .LFE250: - 338 .section .text.OTG_FS_IRQHandler,"ax",%progbits - 339 .align 1 - 340 .global OTG_FS_IRQHandler - ARM GAS /tmp/ccdzv1TD.s page 11 + 302 .cfi_def_cfa_offset 8 + 303 .cfi_offset 3, -8 + 304 .cfi_offset 14, -4 + 227:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 0 */ + 228:Core/Src/stm32f4xx_it.c **** + 229:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 0 */ + 230:Core/Src/stm32f4xx_it.c **** HAL_GPIO_EXTI_IRQHandler(SWEEP_CYCLE_START_TRG_Pin); + 305 .loc 1 230 3 view .LVU48 + 306 0002 0220 movs r0, #2 + 307 0004 FFF7FEFF bl HAL_GPIO_EXTI_IRQHandler + 308 .LVL2: + 231:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EXTI3_IRQn 1 */ + 232:Core/Src/stm32f4xx_it.c **** + 233:Core/Src/stm32f4xx_it.c **** /* USER CODE END EXTI3_IRQn 1 */ + 234:Core/Src/stm32f4xx_it.c **** } + 309 .loc 1 234 1 is_stmt 0 view .LVU49 + 310 0008 08BD pop {r3, pc} + 311 .cfi_endproc + 312 .LFE249: + 314 .section .text.DMA2_Stream0_IRQHandler,"ax",%progbits + 315 .align 1 + 316 .global DMA2_Stream0_IRQHandler + 317 .syntax unified + 318 .thumb + 319 .thumb_func + 321 DMA2_Stream0_IRQHandler: + 322 .LFB250: + 235:Core/Src/stm32f4xx_it.c **** + 236:Core/Src/stm32f4xx_it.c **** /** + 237:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream0 global interrupt. + 238:Core/Src/stm32f4xx_it.c **** */ + 239:Core/Src/stm32f4xx_it.c **** void DMA2_Stream0_IRQHandler(void) + 240:Core/Src/stm32f4xx_it.c **** { + 323 .loc 1 240 1 is_stmt 1 view -0 + 324 .cfi_startproc + 325 @ args = 0, pretend = 0, frame = 0 + 326 @ frame_needed = 0, uses_anonymous_args = 0 + 327 0000 08B5 push {r3, lr} + 328 .LCFI3: + 329 .cfi_def_cfa_offset 8 + 330 .cfi_offset 3, -8 + 331 .cfi_offset 14, -4 + 241:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */ + 242:Core/Src/stm32f4xx_it.c **** + 243:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 0 */ + 244:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1); + 332 .loc 1 244 3 view .LVU51 + 333 0002 0248 ldr r0, .L26 + 334 0004 FFF7FEFF bl HAL_DMA_IRQHandler + 335 .LVL3: + 245:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */ + 246:Core/Src/stm32f4xx_it.c **** + 247:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream0_IRQn 1 */ + 248:Core/Src/stm32f4xx_it.c **** } + 336 .loc 1 248 1 is_stmt 0 view .LVU52 + 337 0008 08BD pop {r3, pc} + 338 .L27: + ARM GAS /tmp/ccmTyUBf.s page 11 - 341 .syntax unified - 342 .thumb - 343 .thumb_func - 345 OTG_FS_IRQHandler: - 346 .LFB251: - 248:Core/Src/stm32f4xx_it.c **** - 249:Core/Src/stm32f4xx_it.c **** /** - 250:Core/Src/stm32f4xx_it.c **** * @brief This function handles USB On The Go FS global interrupt. - 251:Core/Src/stm32f4xx_it.c **** */ - 252:Core/Src/stm32f4xx_it.c **** void OTG_FS_IRQHandler(void) - 253:Core/Src/stm32f4xx_it.c **** { - 347 .loc 1 253 1 is_stmt 1 view -0 - 348 .cfi_startproc - 349 @ args = 0, pretend = 0, frame = 0 - 350 @ frame_needed = 0, uses_anonymous_args = 0 - 351 0000 08B5 push {r3, lr} - 352 .LCFI4: - 353 .cfi_def_cfa_offset 8 - 354 .cfi_offset 3, -8 - 355 .cfi_offset 14, -4 - 254:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 0 */ - 255:Core/Src/stm32f4xx_it.c **** - 256:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 0 */ - 257:Core/Src/stm32f4xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); - 356 .loc 1 257 3 view .LVU51 - 357 0002 0248 ldr r0, .L30 - 358 0004 FFF7FEFF bl HAL_PCD_IRQHandler - 359 .LVL4: - 258:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 1 */ - 259:Core/Src/stm32f4xx_it.c **** - 260:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 1 */ - 261:Core/Src/stm32f4xx_it.c **** } - 360 .loc 1 261 1 is_stmt 0 view .LVU52 - 361 0008 08BD pop {r3, pc} - 362 .L31: - 363 000a 00BF .align 2 - 364 .L30: - 365 000c 00000000 .word hpcd_USB_OTG_FS - 366 .cfi_endproc - 367 .LFE251: - 369 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits - 370 .align 1 - 371 .global HAL_ADC_ConvCpltCallback - 372 .syntax unified - 373 .thumb - 374 .thumb_func - 376 HAL_ADC_ConvCpltCallback: - 377 .LVL5: - 378 .LFB252: - 262:Core/Src/stm32f4xx_it.c **** - 263:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 1 */ - 264:Core/Src/stm32f4xx_it.c **** - 265:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) - 266:Core/Src/stm32f4xx_it.c **** { - 379 .loc 1 266 1 is_stmt 1 view -0 - 380 .cfi_startproc - 381 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccdzv1TD.s page 12 + 339 000a 00BF .align 2 + 340 .L26: + 341 000c 00000000 .word hdma_adc1 + 342 .cfi_endproc + 343 .LFE250: + 345 .section .text.OTG_FS_IRQHandler,"ax",%progbits + 346 .align 1 + 347 .global OTG_FS_IRQHandler + 348 .syntax unified + 349 .thumb + 350 .thumb_func + 352 OTG_FS_IRQHandler: + 353 .LFB251: + 249:Core/Src/stm32f4xx_it.c **** + 250:Core/Src/stm32f4xx_it.c **** /** + 251:Core/Src/stm32f4xx_it.c **** * @brief This function handles USB On The Go FS global interrupt. + 252:Core/Src/stm32f4xx_it.c **** */ + 253:Core/Src/stm32f4xx_it.c **** void OTG_FS_IRQHandler(void) + 254:Core/Src/stm32f4xx_it.c **** { + 354 .loc 1 254 1 is_stmt 1 view -0 + 355 .cfi_startproc + 356 @ args = 0, pretend = 0, frame = 0 + 357 @ frame_needed = 0, uses_anonymous_args = 0 + 358 0000 08B5 push {r3, lr} + 359 .LCFI4: + 360 .cfi_def_cfa_offset 8 + 361 .cfi_offset 3, -8 + 362 .cfi_offset 14, -4 + 255:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 0 */ + 256:Core/Src/stm32f4xx_it.c **** + 257:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 0 */ + 258:Core/Src/stm32f4xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); + 363 .loc 1 258 3 view .LVU54 + 364 0002 0248 ldr r0, .L30 + 365 0004 FFF7FEFF bl HAL_PCD_IRQHandler + 366 .LVL4: + 259:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN OTG_FS_IRQn 1 */ + 260:Core/Src/stm32f4xx_it.c **** + 261:Core/Src/stm32f4xx_it.c **** /* USER CODE END OTG_FS_IRQn 1 */ + 262:Core/Src/stm32f4xx_it.c **** } + 367 .loc 1 262 1 is_stmt 0 view .LVU55 + 368 0008 08BD pop {r3, pc} + 369 .L31: + 370 000a 00BF .align 2 + 371 .L30: + 372 000c 00000000 .word hpcd_USB_OTG_FS + 373 .cfi_endproc + 374 .LFE251: + 376 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits + 377 .align 1 + 378 .global HAL_ADC_ConvCpltCallback + 379 .syntax unified + 380 .thumb + 381 .thumb_func + 383 HAL_ADC_ConvCpltCallback: + 384 .LVL5: + 385 .LFB252: + ARM GAS /tmp/ccmTyUBf.s page 12 - 382 @ frame_needed = 0, uses_anonymous_args = 0 - 383 .loc 1 266 1 is_stmt 0 view .LVU54 - 384 0000 08B5 push {r3, lr} - 385 .LCFI5: - 386 .cfi_def_cfa_offset 8 - 387 .cfi_offset 3, -8 - 388 .cfi_offset 14, -4 - 267:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); - 389 .loc 1 267 3 is_stmt 1 view .LVU55 - 390 0002 0122 movs r2, #1 - 391 0004 8021 movs r1, #128 - 392 0006 3348 ldr r0, .L43 - 393 .LVL6: - 394 .loc 1 267 3 is_stmt 0 view .LVU56 - 395 0008 FFF7FEFF bl HAL_GPIO_WritePin - 396 .LVL7: - 268:Core/Src/stm32f4xx_it.c **** - 269:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 2) { - 397 .loc 1 269 3 is_stmt 1 view .LVU57 - 398 .loc 1 269 18 is_stmt 0 view .LVU58 - 399 000c 324B ldr r3, .L43+4 - 400 000e 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2 - 401 0010 DBB2 uxtb r3, r3 - 402 .loc 1 269 6 view .LVU59 - 403 0012 022B cmp r3, #2 - 404 0014 25D0 beq .L41 - 405 .LBB2: - 270:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) { - 271:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 272:Core/Src/stm32f4xx_it.c **** } - 273:Core/Src/stm32f4xx_it.c **** - 274:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N - ADC_BUFF_SIZE/2; + 263:Core/Src/stm32f4xx_it.c **** + 264:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 1 */ + 265:Core/Src/stm32f4xx_it.c **** + 266:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) + 267:Core/Src/stm32f4xx_it.c **** { + 386 .loc 1 267 1 is_stmt 1 view -0 + 387 .cfi_startproc + 388 @ args = 0, pretend = 0, frame = 0 + 389 @ frame_needed = 0, uses_anonymous_args = 0 + 390 .loc 1 267 1 is_stmt 0 view .LVU57 + 391 0000 08B5 push {r3, lr} + 392 .LCFI5: + 393 .cfi_def_cfa_offset 8 + 394 .cfi_offset 3, -8 + 395 .cfi_offset 14, -4 + 268:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); + 396 .loc 1 268 3 is_stmt 1 view .LVU58 + 397 0002 0122 movs r2, #1 + 398 0004 8021 movs r1, #128 + 399 0006 3448 ldr r0, .L44 + 400 .LVL6: + 401 .loc 1 268 3 is_stmt 0 view .LVU59 + 402 0008 FFF7FEFF bl HAL_GPIO_WritePin + 403 .LVL7: + 269:Core/Src/stm32f4xx_it.c **** + 270:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 2) { + 404 .loc 1 270 3 is_stmt 1 view .LVU60 + 405 .loc 1 270 18 is_stmt 0 view .LVU61 + 406 000c 334B ldr r3, .L44+4 + 407 000e 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2 + 408 0010 DBB2 uxtb r3, r3 + 409 .loc 1 270 6 view .LVU62 + 410 0012 022B cmp r3, #2 + 411 0014 01D0 beq .L43 + 412 .LBB2: + 271:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half + 272:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) { + 273:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 274:Core/Src/stm32f4xx_it.c **** } 275:Core/Src/stm32f4xx_it.c **** + 276:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N - ADC_BUFF_SIZE/2; + 277:Core/Src/stm32f4xx_it.c **** + 278:Core/Src/stm32f4xx_it.c **** + 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum; + 280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 282:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 283:Core/Src/stm32f4xx_it.c **** + 284:Core/Src/stm32f4xx_it.c **** + 285:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0; + 286:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; + 287:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; + 288:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data + 289:Core/Src/stm32f4xx_it.c **** + 290:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE; i++) { + 291:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 292:Core/Src/stm32f4xx_it.c **** } + ARM GAS /tmp/ccmTyUBf.s page 13 + + + 293:Core/Src/stm32f4xx_it.c **** ADC_proc.N = ADC_BUFF_SIZE - Sweep_state.curr_step_start_DMA_N; + 294:Core/Src/stm32f4xx_it.c **** + 295:Core/Src/stm32f4xx_it.c **** + 296:Core/Src/stm32f4xx_it.c **** }else{ + 297:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < ADC_BUFF_SIZE; i++) { + 413 .loc 1 297 19 view .LVU63 + 414 0016 3223 movs r3, #50 + 415 0018 41E0 b .L33 + 416 .L43: + 417 .LBE2: + 271:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half + 418 .loc 1 271 5 is_stmt 1 view .LVU64 + 271:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; // reset flag after processing second half + 419 .loc 1 271 40 is_stmt 0 view .LVU65 + 420 001a 304B ldr r3, .L44+4 + 421 001c 0022 movs r2, #0 + 422 001e 1A71 strb r2, [r3, #4] + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 423 .loc 1 272 5 is_stmt 1 view .LVU66 + 424 .LBB3: + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 425 .loc 1 272 10 view .LVU67 + 426 .LVL8: + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 427 .loc 1 272 19 is_stmt 0 view .LVU68 + 428 0020 3223 movs r3, #50 + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 429 .loc 1 272 5 view .LVU69 + 430 0022 07E0 b .L34 + 431 .LVL9: + 432 .L35: + 273:Core/Src/stm32f4xx_it.c **** } + 433 .loc 1 273 7 is_stmt 1 view .LVU70 + 273:Core/Src/stm32f4xx_it.c **** } + 434 .loc 1 273 15 is_stmt 0 view .LVU71 + 435 0024 2E49 ldr r1, .L44+8 + 436 0026 4A68 ldr r2, [r1, #4] + 273:Core/Src/stm32f4xx_it.c **** } + 437 .loc 1 273 41 view .LVU72 + 438 0028 2E48 ldr r0, .L44+12 + 439 002a 30F81300 ldrh r0, [r0, r3, lsl #1] + 273:Core/Src/stm32f4xx_it.c **** } + 440 .loc 1 273 20 view .LVU73 + 441 002e 0244 add r2, r2, r0 + 442 0030 4A60 str r2, [r1, #4] + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 443 .loc 1 272 80 is_stmt 1 discriminator 3 view .LVU74 + 444 0032 0133 adds r3, r3, #1 + 445 .LVL10: + 446 .L34: + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 447 .loc 1 272 42 discriminator 1 view .LVU75 + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 448 .loc 1 272 55 is_stmt 0 discriminator 1 view .LVU76 + 449 0034 294A ldr r2, .L44+4 + 450 0036 9268 ldr r2, [r2, #8] + 272:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + ARM GAS /tmp/ccmTyUBf.s page 14 + + + 451 .loc 1 272 42 discriminator 1 view .LVU77 + 452 0038 9A42 cmp r2, r3 + 453 003a F3D8 bhi .L35 + 454 .LBE3: 276:Core/Src/stm32f4xx_it.c **** - 277:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum; - 278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 281:Core/Src/stm32f4xx_it.c **** + 455 .loc 1 276 5 is_stmt 1 view .LVU78 + 276:Core/Src/stm32f4xx_it.c **** + 456 .loc 1 276 30 is_stmt 0 view .LVU79 + 457 003c 2748 ldr r0, .L44+4 + 458 003e 8168 ldr r1, [r0, #8] + 276:Core/Src/stm32f4xx_it.c **** + 459 .loc 1 276 53 view .LVU80 + 460 0040 3239 subs r1, r1, #50 + 276:Core/Src/stm32f4xx_it.c **** + 461 .loc 1 276 13 view .LVU81 + 462 0042 274B ldr r3, .L44+8 + 463 .LVL11: + 276:Core/Src/stm32f4xx_it.c **** + 464 .loc 1 276 13 view .LVU82 + 465 0044 DA68 ldr r2, [r3, #12] + 276:Core/Src/stm32f4xx_it.c **** + 466 .loc 1 276 16 view .LVU83 + 467 0046 0A44 add r2, r2, r1 + 468 0048 DA60 str r2, [r3, #12] + 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 469 .loc 1 279 5 is_stmt 1 view .LVU84 + 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 470 .loc 1 279 35 is_stmt 0 view .LVU85 + 471 004a 5968 ldr r1, [r3, #4] + 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 472 .loc 1 279 25 view .LVU86 + 473 004c 264A ldr r2, .L44+16 + 474 004e 5160 str r1, [r2, #4] + 280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 475 .loc 1 280 5 is_stmt 1 view .LVU87 + 280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 476 .loc 1 280 35 is_stmt 0 view .LVU88 + 477 0050 9968 ldr r1, [r3, #8] + 280:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 478 .loc 1 280 25 view .LVU89 + 479 0052 9160 str r1, [r2, #8] + 281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 480 .loc 1 281 5 is_stmt 1 view .LVU90 + 281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 481 .loc 1 281 33 is_stmt 0 view .LVU91 + 482 0054 D968 ldr r1, [r3, #12] + 281:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 483 .loc 1 281 23 view .LVU92 + 484 0056 D160 str r1, [r2, #12] 282:Core/Src/stm32f4xx_it.c **** - 283:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0; - 284:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; - 285:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; - 286:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data - 287:Core/Src/stm32f4xx_it.c **** - 288:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE; i++) { - 289:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 290:Core/Src/stm32f4xx_it.c **** } - 291:Core/Src/stm32f4xx_it.c **** ADC_proc.N = ADC_BUFF_SIZE - Sweep_state.curr_step_start_DMA_N; - 292:Core/Src/stm32f4xx_it.c **** + 485 .loc 1 282 5 is_stmt 1 view .LVU93 + 282:Core/Src/stm32f4xx_it.c **** + 486 .loc 1 282 28 is_stmt 0 view .LVU94 + 487 0058 0221 movs r1, #2 + 488 005a 1170 strb r1, [r2] + 285:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; + 489 .loc 1 285 5 is_stmt 1 view .LVU95 + ARM GAS /tmp/ccmTyUBf.s page 15 + + + 285:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; + 490 .loc 1 285 18 is_stmt 0 view .LVU96 + 491 005c 0022 movs r2, #0 + 492 005e 5A60 str r2, [r3, #4] + 286:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; + 493 .loc 1 286 5 is_stmt 1 view .LVU97 + 286:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; + 494 .loc 1 286 16 is_stmt 0 view .LVU98 + 495 0060 DA60 str r2, [r3, #12] + 287:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data + 496 .loc 1 287 5 is_stmt 1 view .LVU99 + 287:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data + 497 .loc 1 287 18 is_stmt 0 view .LVU100 + 498 0062 9A60 str r2, [r3, #8] + 288:Core/Src/stm32f4xx_it.c **** + 499 .loc 1 288 5 is_stmt 1 view .LVU101 + 288:Core/Src/stm32f4xx_it.c **** + 500 .loc 1 288 21 is_stmt 0 view .LVU102 + 501 0064 0122 movs r2, #1 + 502 0066 1A70 strb r2, [r3] + 290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 503 .loc 1 290 5 is_stmt 1 view .LVU103 + 504 .LBB4: + 290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 505 .loc 1 290 10 view .LVU104 + 290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 506 .loc 1 290 19 is_stmt 0 view .LVU105 + 507 0068 8368 ldr r3, [r0, #8] + 508 .LVL12: + 290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 509 .loc 1 290 5 view .LVU106 + 510 006a 07E0 b .L36 + 511 .L37: + 291:Core/Src/stm32f4xx_it.c **** } + 512 .loc 1 291 7 is_stmt 1 view .LVU107 + 291:Core/Src/stm32f4xx_it.c **** } + 513 .loc 1 291 15 is_stmt 0 view .LVU108 + 514 006c 1C49 ldr r1, .L44+8 + 515 006e 4A68 ldr r2, [r1, #4] + 291:Core/Src/stm32f4xx_it.c **** } + 516 .loc 1 291 41 view .LVU109 + 517 0070 1C48 ldr r0, .L44+12 + 518 0072 30F81300 ldrh r0, [r0, r3, lsl #1] + 291:Core/Src/stm32f4xx_it.c **** } + 519 .loc 1 291 20 view .LVU110 + 520 0076 0244 add r2, r2, r0 + 521 0078 4A60 str r2, [r1, #4] + 290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 522 .loc 1 290 78 is_stmt 1 discriminator 3 view .LVU111 + 523 007a 0133 adds r3, r3, #1 + 524 .LVL13: + 525 .L36: + 290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 526 .loc 1 290 60 discriminator 1 view .LVU112 + 527 007c 632B cmp r3, #99 + 528 007e F5D9 bls .L37 + 290:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + ARM GAS /tmp/ccmTyUBf.s page 16 + + + 529 .loc 1 290 60 is_stmt 0 discriminator 1 view .LVU113 + 530 .LBE4: 293:Core/Src/stm32f4xx_it.c **** - 294:Core/Src/stm32f4xx_it.c **** }else{ - 295:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < ADC_BUFF_SIZE; i++) { - 406 .loc 1 295 19 view .LVU60 - 407 0016 3223 movs r3, #50 - 408 0018 3EE0 b .L34 - 409 .LVL8: - ARM GAS /tmp/ccdzv1TD.s page 13 + 531 .loc 1 293 5 is_stmt 1 view .LVU114 + 293:Core/Src/stm32f4xx_it.c **** + 532 .loc 1 293 45 is_stmt 0 view .LVU115 + 533 0080 164B ldr r3, .L44+4 + 534 .LVL14: + 293:Core/Src/stm32f4xx_it.c **** + 535 .loc 1 293 45 view .LVU116 + 536 0082 9B68 ldr r3, [r3, #8] + 293:Core/Src/stm32f4xx_it.c **** + 537 .loc 1 293 32 view .LVU117 + 538 0084 C3F16403 rsb r3, r3, #100 + 293:Core/Src/stm32f4xx_it.c **** + 539 .loc 1 293 16 view .LVU118 + 540 0088 154A ldr r2, .L44+8 + 541 008a D360 str r3, [r2, #12] + 542 008c 0DE0 b .L38 + 543 .LVL15: + 544 .L39: + 545 .LBB5: + 298:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 546 .loc 1 298 7 is_stmt 1 view .LVU119 + 547 .loc 1 298 15 is_stmt 0 view .LVU120 + 548 008e 1449 ldr r1, .L44+8 + 549 0090 4A68 ldr r2, [r1, #4] + 550 .loc 1 298 41 view .LVU121 + 551 0092 1448 ldr r0, .L44+12 + 552 0094 30F81300 ldrh r0, [r0, r3, lsl #1] + 553 .loc 1 298 20 view .LVU122 + 554 0098 0244 add r2, r2, r0 + 555 009a 4A60 str r2, [r1, #4] + 297:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 556 .loc 1 297 60 is_stmt 1 discriminator 3 view .LVU123 + 557 009c 0133 adds r3, r3, #1 + 558 .LVL16: + 559 .L33: + 297:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 560 .loc 1 297 42 discriminator 1 view .LVU124 + 561 009e 632B cmp r3, #99 + 562 00a0 F5D9 bls .L39 + 563 .LBE5: + 299:Core/Src/stm32f4xx_it.c **** } + 300:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE - ADC_BUFF_SIZE/2; + 564 .loc 1 300 5 view .LVU125 + 565 .loc 1 300 13 is_stmt 0 view .LVU126 + 566 00a2 0F4A ldr r2, .L44+8 + 567 00a4 D368 ldr r3, [r2, #12] + 568 .LVL17: + 569 .loc 1 300 16 view .LVU127 + 570 00a6 3233 adds r3, r3, #50 + 571 00a8 D360 str r3, [r2, #12] + 572 .LVL18: + 573 .L38: + 301:Core/Src/stm32f4xx_it.c **** } + 302:Core/Src/stm32f4xx_it.c **** + ARM GAS /tmp/ccmTyUBf.s page 17 - 410 .L35: - 411 .loc 1 295 19 view .LVU61 - 412 .LBE2: - 413 .LBB3: - 271:Core/Src/stm32f4xx_it.c **** } - 414 .loc 1 271 7 is_stmt 1 view .LVU62 - 271:Core/Src/stm32f4xx_it.c **** } - 415 .loc 1 271 15 is_stmt 0 view .LVU63 - 416 001a 3049 ldr r1, .L43+8 - 417 001c 4A68 ldr r2, [r1, #4] - 271:Core/Src/stm32f4xx_it.c **** } - 418 .loc 1 271 41 view .LVU64 - 419 001e 3048 ldr r0, .L43+12 - 420 0020 30F81300 ldrh r0, [r0, r3, lsl #1] - 271:Core/Src/stm32f4xx_it.c **** } - 421 .loc 1 271 20 view .LVU65 - 422 0024 0244 add r2, r2, r0 - 423 0026 4A60 str r2, [r1, #4] - 270:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) { - 424 .loc 1 270 80 is_stmt 1 discriminator 3 view .LVU66 - 425 0028 0133 adds r3, r3, #1 - 426 .LVL9: - 427 .L33: - 270:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) { - 428 .loc 1 270 42 discriminator 1 view .LVU67 - 270:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) { - 429 .loc 1 270 55 is_stmt 0 discriminator 1 view .LVU68 - 430 002a 2B4A ldr r2, .L43+4 - 431 002c 9268 ldr r2, [r2, #8] - 270:Core/Src/stm32f4xx_it.c **** for (uint32_t i = ADC_BUFF_SIZE/2; i < Sweep_state.curr_step_start_DMA_N; i++) { - 432 .loc 1 270 42 discriminator 1 view .LVU69 - 433 002e 9A42 cmp r2, r3 - 434 0030 F3D8 bhi .L35 - 435 .LBE3: - 274:Core/Src/stm32f4xx_it.c **** - 436 .loc 1 274 5 is_stmt 1 view .LVU70 - 274:Core/Src/stm32f4xx_it.c **** - 437 .loc 1 274 30 is_stmt 0 view .LVU71 - 438 0032 2948 ldr r0, .L43+4 - 439 0034 8168 ldr r1, [r0, #8] - 274:Core/Src/stm32f4xx_it.c **** - 440 .loc 1 274 53 view .LVU72 - 441 0036 3239 subs r1, r1, #50 - 274:Core/Src/stm32f4xx_it.c **** - 442 .loc 1 274 13 view .LVU73 - 443 0038 284B ldr r3, .L43+8 - 444 .LVL10: - 274:Core/Src/stm32f4xx_it.c **** - 445 .loc 1 274 13 view .LVU74 - 446 003a DA68 ldr r2, [r3, #12] - 274:Core/Src/stm32f4xx_it.c **** - 447 .loc 1 274 16 view .LVU75 - 448 003c 0A44 add r2, r2, r1 - 449 003e DA60 str r2, [r3, #12] - 277:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 450 .loc 1 277 5 is_stmt 1 view .LVU76 - 277:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - ARM GAS /tmp/ccdzv1TD.s page 14 + 303:Core/Src/stm32f4xx_it.c **** //if (0){ + 304:Core/Src/stm32f4xx_it.c **** if (ADC_proc.N >= ADC_BUFF_SIZE*100){ + 574 .loc 1 304 3 is_stmt 1 view .LVU128 + 575 .loc 1 304 15 is_stmt 0 view .LVU129 + 576 00aa 0D4B ldr r3, .L44+8 + 577 00ac DA68 ldr r2, [r3, #12] + 578 .loc 1 304 6 view .LVU130 + 579 00ae 42F20F73 movw r3, #9999 + 580 00b2 9A42 cmp r2, r3 + 581 00b4 0FD9 bls .L32 + 305:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum; + 582 .loc 1 305 5 is_stmt 1 view .LVU131 + 583 .loc 1 305 35 is_stmt 0 view .LVU132 + 584 00b6 0A4B ldr r3, .L44+8 + 585 00b8 5968 ldr r1, [r3, #4] + 586 .loc 1 305 25 view .LVU133 + 587 00ba 0B4A ldr r2, .L44+16 + 588 00bc 5160 str r1, [r2, #4] + 306:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 589 .loc 1 306 5 is_stmt 1 view .LVU134 + 590 .loc 1 306 35 is_stmt 0 view .LVU135 + 591 00be 9968 ldr r1, [r3, #8] + 592 .loc 1 306 25 view .LVU136 + 593 00c0 9160 str r1, [r2, #8] + 307:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 594 .loc 1 307 5 is_stmt 1 view .LVU137 + 595 .loc 1 307 33 is_stmt 0 view .LVU138 + 596 00c2 D968 ldr r1, [r3, #12] + 597 .loc 1 307 23 view .LVU139 + 598 00c4 D160 str r1, [r2, #12] + 308:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 599 .loc 1 308 5 is_stmt 1 view .LVU140 + 600 .loc 1 308 28 is_stmt 0 view .LVU141 + 601 00c6 0221 movs r1, #2 + 602 00c8 1170 strb r1, [r2] + 309:Core/Src/stm32f4xx_it.c **** + 310:Core/Src/stm32f4xx_it.c **** + 311:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0; + 603 .loc 1 311 5 is_stmt 1 view .LVU142 + 604 .loc 1 311 18 is_stmt 0 view .LVU143 + 605 00ca 0022 movs r2, #0 + 606 00cc 5A60 str r2, [r3, #4] + 312:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; + 607 .loc 1 312 5 is_stmt 1 view .LVU144 + 608 .loc 1 312 16 is_stmt 0 view .LVU145 + 609 00ce DA60 str r2, [r3, #12] + 313:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; + 610 .loc 1 313 5 is_stmt 1 view .LVU146 + 611 .loc 1 313 18 is_stmt 0 view .LVU147 + 612 00d0 9A60 str r2, [r3, #8] + 314:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data + 613 .loc 1 314 5 is_stmt 1 view .LVU148 + 614 .loc 1 314 21 is_stmt 0 view .LVU149 + 615 00d2 0122 movs r2, #1 + 616 00d4 1A70 strb r2, [r3] + 617 .L32: + 315:Core/Src/stm32f4xx_it.c **** } + ARM GAS /tmp/ccmTyUBf.s page 18 - 451 .loc 1 277 35 is_stmt 0 view .LVU77 - 452 0040 5968 ldr r1, [r3, #4] - 277:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 453 .loc 1 277 25 view .LVU78 - 454 0042 284A ldr r2, .L43+16 - 455 0044 5160 str r1, [r2, #4] - 278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 456 .loc 1 278 5 is_stmt 1 view .LVU79 - 278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 457 .loc 1 278 35 is_stmt 0 view .LVU80 - 458 0046 9968 ldr r1, [r3, #8] - 278:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 459 .loc 1 278 25 view .LVU81 - 460 0048 9160 str r1, [r2, #8] - 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 461 .loc 1 279 5 is_stmt 1 view .LVU82 - 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 462 .loc 1 279 33 is_stmt 0 view .LVU83 - 463 004a D968 ldr r1, [r3, #12] - 279:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 464 .loc 1 279 23 view .LVU84 - 465 004c D160 str r1, [r2, #12] - 280:Core/Src/stm32f4xx_it.c **** - 466 .loc 1 280 5 is_stmt 1 view .LVU85 - 280:Core/Src/stm32f4xx_it.c **** - 467 .loc 1 280 28 is_stmt 0 view .LVU86 - 468 004e 0221 movs r1, #2 - 469 0050 1170 strb r1, [r2] - 283:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; - 470 .loc 1 283 5 is_stmt 1 view .LVU87 - 283:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; - 471 .loc 1 283 18 is_stmt 0 view .LVU88 - 472 0052 0022 movs r2, #0 - 473 0054 5A60 str r2, [r3, #4] - 284:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; - 474 .loc 1 284 5 is_stmt 1 view .LVU89 - 284:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; - 475 .loc 1 284 16 is_stmt 0 view .LVU90 - 476 0056 DA60 str r2, [r3, #12] - 285:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data - 477 .loc 1 285 5 is_stmt 1 view .LVU91 - 285:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data - 478 .loc 1 285 18 is_stmt 0 view .LVU92 - 479 0058 9A60 str r2, [r3, #8] - 286:Core/Src/stm32f4xx_it.c **** - 480 .loc 1 286 5 is_stmt 1 view .LVU93 - 286:Core/Src/stm32f4xx_it.c **** - 481 .loc 1 286 21 is_stmt 0 view .LVU94 - 482 005a 0122 movs r2, #1 - 483 005c 1A70 strb r2, [r3] - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 484 .loc 1 288 5 is_stmt 1 view .LVU95 - 485 .LBB4: - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 486 .loc 1 288 10 view .LVU96 - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 487 .loc 1 288 19 is_stmt 0 view .LVU97 - ARM GAS /tmp/ccdzv1TD.s page 15 - - - 488 005e 8368 ldr r3, [r0, #8] - 489 .LVL11: - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 490 .loc 1 288 5 view .LVU98 - 491 0060 09E0 b .L36 - 492 .LVL12: - 493 .L41: - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 494 .loc 1 288 5 view .LVU99 - 495 .LBE4: - 496 .LBB5: - 270:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 497 .loc 1 270 19 view .LVU100 - 498 0062 3223 movs r3, #50 - 499 0064 E1E7 b .L33 - 500 .LVL13: - 501 .L37: - 270:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 502 .loc 1 270 19 view .LVU101 - 503 .LBE5: - 504 .LBB6: - 289:Core/Src/stm32f4xx_it.c **** } - 505 .loc 1 289 7 is_stmt 1 view .LVU102 - 289:Core/Src/stm32f4xx_it.c **** } - 506 .loc 1 289 15 is_stmt 0 view .LVU103 - 507 0066 1D49 ldr r1, .L43+8 - 508 0068 4A68 ldr r2, [r1, #4] - 289:Core/Src/stm32f4xx_it.c **** } - 509 .loc 1 289 41 view .LVU104 - 510 006a 1D48 ldr r0, .L43+12 - 511 006c 30F81300 ldrh r0, [r0, r3, lsl #1] - 289:Core/Src/stm32f4xx_it.c **** } - 512 .loc 1 289 20 view .LVU105 - 513 0070 0244 add r2, r2, r0 - 514 0072 4A60 str r2, [r1, #4] - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 515 .loc 1 288 78 is_stmt 1 discriminator 3 view .LVU106 - 516 0074 0133 adds r3, r3, #1 - 517 .LVL14: - 518 .L36: - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 519 .loc 1 288 60 discriminator 1 view .LVU107 - 520 0076 632B cmp r3, #99 - 521 0078 F5D9 bls .L37 - 288:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 522 .loc 1 288 60 is_stmt 0 discriminator 1 view .LVU108 - 523 .LBE6: - 291:Core/Src/stm32f4xx_it.c **** - 524 .loc 1 291 5 is_stmt 1 view .LVU109 - 291:Core/Src/stm32f4xx_it.c **** - 525 .loc 1 291 45 is_stmt 0 view .LVU110 - 526 007a 174B ldr r3, .L43+4 - 527 .LVL15: - 291:Core/Src/stm32f4xx_it.c **** - 528 .loc 1 291 45 view .LVU111 - 529 007c 9B68 ldr r3, [r3, #8] - 291:Core/Src/stm32f4xx_it.c **** - ARM GAS /tmp/ccdzv1TD.s page 16 - - - 530 .loc 1 291 32 view .LVU112 - 531 007e C3F16403 rsb r3, r3, #100 - 291:Core/Src/stm32f4xx_it.c **** - 532 .loc 1 291 16 view .LVU113 - 533 0082 164A ldr r2, .L43+8 - 534 0084 D360 str r3, [r2, #12] - 535 0086 0DE0 b .L38 - 536 .LVL16: - 537 .L39: - 538 .LBB7: - 296:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 539 .loc 1 296 7 is_stmt 1 view .LVU114 - 540 .loc 1 296 15 is_stmt 0 view .LVU115 - 541 0088 1449 ldr r1, .L43+8 - 542 008a 4A68 ldr r2, [r1, #4] - 543 .loc 1 296 41 view .LVU116 - 544 008c 1448 ldr r0, .L43+12 - 545 008e 30F81300 ldrh r0, [r0, r3, lsl #1] - 546 .loc 1 296 20 view .LVU117 - 547 0092 0244 add r2, r2, r0 - 548 0094 4A60 str r2, [r1, #4] - 295:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 549 .loc 1 295 60 is_stmt 1 discriminator 3 view .LVU118 - 550 0096 0133 adds r3, r3, #1 - 551 .LVL17: - 552 .L34: - 295:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 553 .loc 1 295 42 discriminator 1 view .LVU119 - 554 0098 632B cmp r3, #99 - 555 009a F5D9 bls .L39 - 556 .LBE7: - 297:Core/Src/stm32f4xx_it.c **** } - 298:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE - ADC_BUFF_SIZE/2; - 557 .loc 1 298 5 view .LVU120 - 558 .loc 1 298 13 is_stmt 0 view .LVU121 - 559 009c 0F4A ldr r2, .L43+8 - 560 009e D368 ldr r3, [r2, #12] - 561 .LVL18: - 562 .loc 1 298 16 view .LVU122 - 563 00a0 3233 adds r3, r3, #50 - 564 00a2 D360 str r3, [r2, #12] - 565 .LVL19: - 566 .L38: - 299:Core/Src/stm32f4xx_it.c **** } - 300:Core/Src/stm32f4xx_it.c **** if (ADC_proc.N >= ADC_BUFF_SIZE*100){ - 567 .loc 1 300 3 is_stmt 1 view .LVU123 - 568 .loc 1 300 15 is_stmt 0 view .LVU124 - 569 00a4 0D4B ldr r3, .L43+8 - 570 00a6 DA68 ldr r2, [r3, #12] - 571 .loc 1 300 6 view .LVU125 - 572 00a8 42F20F73 movw r3, #9999 - 573 00ac 9A42 cmp r2, r3 - 574 00ae 0FD9 bls .L32 - 301:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum; - 575 .loc 1 301 5 is_stmt 1 view .LVU126 - 576 .loc 1 301 35 is_stmt 0 view .LVU127 - 577 00b0 0A4B ldr r3, .L43+8 - ARM GAS /tmp/ccdzv1TD.s page 17 - - - 578 00b2 5968 ldr r1, [r3, #4] - 579 .loc 1 301 25 view .LVU128 - 580 00b4 0B4A ldr r2, .L43+16 - 581 00b6 5160 str r1, [r2, #4] - 302:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 582 .loc 1 302 5 is_stmt 1 view .LVU129 - 583 .loc 1 302 35 is_stmt 0 view .LVU130 - 584 00b8 9968 ldr r1, [r3, #8] - 585 .loc 1 302 25 view .LVU131 - 586 00ba 9160 str r1, [r2, #8] - 303:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 587 .loc 1 303 5 is_stmt 1 view .LVU132 - 588 .loc 1 303 33 is_stmt 0 view .LVU133 - 589 00bc D968 ldr r1, [r3, #12] - 590 .loc 1 303 23 view .LVU134 - 591 00be D160 str r1, [r2, #12] - 304:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 592 .loc 1 304 5 is_stmt 1 view .LVU135 - 593 .loc 1 304 28 is_stmt 0 view .LVU136 - 594 00c0 0221 movs r1, #2 - 595 00c2 1170 strb r1, [r2] - 305:Core/Src/stm32f4xx_it.c **** - 306:Core/Src/stm32f4xx_it.c **** - 307:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0; - 596 .loc 1 307 5 is_stmt 1 view .LVU137 - 597 .loc 1 307 18 is_stmt 0 view .LVU138 - 598 00c4 0022 movs r2, #0 - 599 00c6 5A60 str r2, [r3, #4] - 308:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; - 600 .loc 1 308 5 is_stmt 1 view .LVU139 - 601 .loc 1 308 16 is_stmt 0 view .LVU140 - 602 00c8 DA60 str r2, [r3, #12] - 309:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; - 603 .loc 1 309 5 is_stmt 1 view .LVU141 - 604 .loc 1 309 18 is_stmt 0 view .LVU142 - 605 00ca 9A60 str r2, [r3, #8] - 310:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data - 606 .loc 1 310 5 is_stmt 1 view .LVU143 - 607 .loc 1 310 21 is_stmt 0 view .LVU144 - 608 00cc 0122 movs r2, #1 - 609 00ce 1A70 strb r2, [r3] - 610 .L32: - 311:Core/Src/stm32f4xx_it.c **** } - 312:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled - 313:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here - 314:Core/Src/stm32f4xx_it.c **** } - 611 .loc 1 314 1 view .LVU145 - 612 00d0 08BD pop {r3, pc} - 613 .L44: - 614 00d2 00BF .align 2 - 615 .L43: - 616 00d4 00040240 .word 1073873920 - 617 00d8 00000000 .word Sweep_state - 618 00dc 00000000 .word ADC_proc - 619 00e0 00000000 .word ADC1_buff_circular - 620 00e4 00000000 .word ADC_proc_shadow - 621 .cfi_endproc - ARM GAS /tmp/ccdzv1TD.s page 18 - - - 622 .LFE252: - 624 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits - 625 .align 1 - 626 .global HAL_ADC_ConvHalfCpltCallback - 627 .syntax unified - 628 .thumb - 629 .thumb_func - 631 HAL_ADC_ConvHalfCpltCallback: - 632 .LVL20: - 633 .LFB253: - 315:Core/Src/stm32f4xx_it.c **** - 316:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) - 317:Core/Src/stm32f4xx_it.c **** { - 634 .loc 1 317 1 is_stmt 1 view -0 - 635 .cfi_startproc - 636 @ args = 0, pretend = 0, frame = 0 - 637 @ frame_needed = 0, uses_anonymous_args = 0 - 638 .loc 1 317 1 is_stmt 0 view .LVU147 - 639 0000 08B5 push {r3, lr} - 640 .LCFI6: - 641 .cfi_def_cfa_offset 8 - 642 .cfi_offset 3, -8 - 643 .cfi_offset 14, -4 - 318:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET); + 316:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled + 317:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here + 318:Core/Src/stm32f4xx_it.c **** } + 618 .loc 1 318 1 view .LVU150 + 619 00d6 08BD pop {r3, pc} + 620 .L45: + 621 .align 2 + 622 .L44: + 623 00d8 00040240 .word 1073873920 + 624 00dc 00000000 .word Sweep_state + 625 00e0 00000000 .word ADC_proc + 626 00e4 00000000 .word ADC1_buff_circular + 627 00e8 00000000 .word ADC_proc_shadow + 628 .cfi_endproc + 629 .LFE252: + 631 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits + 632 .align 1 + 633 .global HAL_ADC_ConvHalfCpltCallback + 634 .syntax unified + 635 .thumb + 636 .thumb_func + 638 HAL_ADC_ConvHalfCpltCallback: + 639 .LVL19: + 640 .LFB253: 319:Core/Src/stm32f4xx_it.c **** - 320:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin); - 644 .loc 1 320 3 is_stmt 1 view .LVU148 - 645 0002 8021 movs r1, #128 - 646 0004 2648 ldr r0, .L55 - 647 .LVL21: - 648 .loc 1 320 3 is_stmt 0 view .LVU149 - 649 0006 FFF7FEFF bl HAL_GPIO_TogglePin - 650 .LVL22: - 321:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 1) { - 651 .loc 1 321 3 is_stmt 1 view .LVU150 - 652 .loc 1 321 18 is_stmt 0 view .LVU151 - 653 000a 264B ldr r3, .L55+4 - 654 000c 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2 - 655 000e DBB2 uxtb r3, r3 - 656 .loc 1 321 6 view .LVU152 - 657 0010 012B cmp r3, #1 - 658 0012 24D0 beq .L53 - 659 .LBB8: - 322:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) { - 323:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 324:Core/Src/stm32f4xx_it.c **** } - 325:Core/Src/stm32f4xx_it.c **** - 326:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N; - 327:Core/Src/stm32f4xx_it.c **** - 328:Core/Src/stm32f4xx_it.c **** - 329:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum; - 330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 332:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 320:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) + 321:Core/Src/stm32f4xx_it.c **** { + 641 .loc 1 321 1 is_stmt 1 view -0 + 642 .cfi_startproc + 643 @ args = 0, pretend = 0, frame = 0 + 644 @ frame_needed = 0, uses_anonymous_args = 0 + 645 .loc 1 321 1 is_stmt 0 view .LVU152 + 646 0000 08B5 push {r3, lr} + 647 .LCFI6: + 648 .cfi_def_cfa_offset 8 + 649 .cfi_offset 3, -8 + 650 .cfi_offset 14, -4 + 322:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET); + 323:Core/Src/stm32f4xx_it.c **** + 324:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin); + 651 .loc 1 324 3 is_stmt 1 view .LVU153 + 652 0002 8021 movs r1, #128 + 653 0004 2748 ldr r0, .L57 + 654 .LVL20: + 655 .loc 1 324 3 is_stmt 0 view .LVU154 + 656 0006 FFF7FEFF bl HAL_GPIO_TogglePin + 657 .LVL21: + 325:Core/Src/stm32f4xx_it.c **** if (Sweep_state.curr_step_started_flag == 1) { + 658 .loc 1 325 3 is_stmt 1 view .LVU155 + 659 .loc 1 325 18 is_stmt 0 view .LVU156 + 660 000a 274B ldr r3, .L57+4 + 661 000c 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2 + 662 000e DBB2 uxtb r3, r3 + 663 .loc 1 325 6 view .LVU157 + 664 0010 012B cmp r3, #1 + 665 0012 01D0 beq .L56 + 666 .LBB6: + ARM GAS /tmp/ccmTyUBf.s page 19 + + + 326:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; + 327:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) { + 328:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 329:Core/Src/stm32f4xx_it.c **** } + 330:Core/Src/stm32f4xx_it.c **** + 331:Core/Src/stm32f4xx_it.c **** ADC_proc.N += Sweep_state.curr_step_start_DMA_N; + 332:Core/Src/stm32f4xx_it.c **** 333:Core/Src/stm32f4xx_it.c **** - 334:Core/Src/stm32f4xx_it.c **** - 335:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0; - ARM GAS /tmp/ccdzv1TD.s page 19 - - - 336:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; - 337:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; - 338:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data + 334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.sum = ADC_proc.sum; + 335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 337:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 338:Core/Src/stm32f4xx_it.c **** 339:Core/Src/stm32f4xx_it.c **** - 340:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE/2; i++) { - 341:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 342:Core/Src/stm32f4xx_it.c **** } - 343:Core/Src/stm32f4xx_it.c **** ADC_proc.N = Sweep_state.curr_step_start_DMA_N; + 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum = 0; + 341:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; + 342:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; + 343:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data 344:Core/Src/stm32f4xx_it.c **** - 345:Core/Src/stm32f4xx_it.c **** }else{ - 346:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < ADC_BUFF_SIZE/2; i++) { - 660 .loc 1 346 19 view .LVU153 - 661 0014 0023 movs r3, #0 - 662 0016 3BE0 b .L47 - 663 .LVL23: - 664 .L48: - 665 .loc 1 346 19 view .LVU154 - 666 .LBE8: - 667 .LBB9: - 323:Core/Src/stm32f4xx_it.c **** } - 668 .loc 1 323 7 is_stmt 1 view .LVU155 - 323:Core/Src/stm32f4xx_it.c **** } - 669 .loc 1 323 15 is_stmt 0 view .LVU156 - 670 0018 2349 ldr r1, .L55+8 - 671 001a 4A68 ldr r2, [r1, #4] - 323:Core/Src/stm32f4xx_it.c **** } - 672 .loc 1 323 41 view .LVU157 - 673 001c 2348 ldr r0, .L55+12 - 674 001e 30F81300 ldrh r0, [r0, r3, lsl #1] - 323:Core/Src/stm32f4xx_it.c **** } - 675 .loc 1 323 20 view .LVU158 - 676 0022 0244 add r2, r2, r0 - 677 0024 4A60 str r2, [r1, #4] - 322:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) { - 678 .loc 1 322 66 is_stmt 1 discriminator 3 view .LVU159 - 679 0026 0133 adds r3, r3, #1 - 680 .LVL24: - 681 .L46: - 322:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) { - 682 .loc 1 322 28 discriminator 1 view .LVU160 - 322:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) { - 683 .loc 1 322 41 is_stmt 0 discriminator 1 view .LVU161 - 684 0028 1E4A ldr r2, .L55+4 - 685 002a 9268 ldr r2, [r2, #8] - 322:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < Sweep_state.curr_step_start_DMA_N; i++) { - 686 .loc 1 322 28 discriminator 1 view .LVU162 - 687 002c 9A42 cmp r2, r3 - 688 002e F3D8 bhi .L48 - 689 .LBE9: - 326:Core/Src/stm32f4xx_it.c **** - 690 .loc 1 326 5 is_stmt 1 view .LVU163 - 326:Core/Src/stm32f4xx_it.c **** - 691 .loc 1 326 30 is_stmt 0 view .LVU164 - 692 0030 1C49 ldr r1, .L55+4 - 693 0032 8868 ldr r0, [r1, #8] - 326:Core/Src/stm32f4xx_it.c **** - 694 .loc 1 326 13 view .LVU165 - ARM GAS /tmp/ccdzv1TD.s page 20 - - - 695 0034 1C4B ldr r3, .L55+8 - 696 .LVL25: - 326:Core/Src/stm32f4xx_it.c **** - 697 .loc 1 326 13 view .LVU166 - 698 0036 DA68 ldr r2, [r3, #12] - 326:Core/Src/stm32f4xx_it.c **** - 699 .loc 1 326 16 view .LVU167 - 700 0038 0244 add r2, r2, r0 - 701 003a DA60 str r2, [r3, #12] - 329:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 702 .loc 1 329 5 is_stmt 1 view .LVU168 - 329:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 703 .loc 1 329 35 is_stmt 0 view .LVU169 - 704 003c 5868 ldr r0, [r3, #4] - 329:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; - 705 .loc 1 329 25 view .LVU170 - 706 003e 1C4A ldr r2, .L55+16 - 707 0040 5060 str r0, [r2, #4] - 330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 708 .loc 1 330 5 is_stmt 1 view .LVU171 - 330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 709 .loc 1 330 35 is_stmt 0 view .LVU172 - 710 0042 9868 ldr r0, [r3, #8] - 330:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; - 711 .loc 1 330 25 view .LVU173 - 712 0044 9060 str r0, [r2, #8] - 331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 713 .loc 1 331 5 is_stmt 1 view .LVU174 - 331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 714 .loc 1 331 33 is_stmt 0 view .LVU175 - 715 0046 D868 ldr r0, [r3, #12] - 331:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled - 716 .loc 1 331 23 view .LVU176 - 717 0048 D060 str r0, [r2, #12] - 332:Core/Src/stm32f4xx_it.c **** - 718 .loc 1 332 5 is_stmt 1 view .LVU177 - 332:Core/Src/stm32f4xx_it.c **** - 719 .loc 1 332 28 is_stmt 0 view .LVU178 - 720 004a 0220 movs r0, #2 - 721 004c 1070 strb r0, [r2] - 335:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; - 722 .loc 1 335 5 is_stmt 1 view .LVU179 - 335:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; - 723 .loc 1 335 18 is_stmt 0 view .LVU180 - 724 004e 0022 movs r2, #0 - 725 0050 5A60 str r2, [r3, #4] - 336:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; - 726 .loc 1 336 5 is_stmt 1 view .LVU181 - 336:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; - 727 .loc 1 336 16 is_stmt 0 view .LVU182 - 728 0052 DA60 str r2, [r3, #12] - 337:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data - 729 .loc 1 337 5 is_stmt 1 view .LVU183 - 337:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data - 730 .loc 1 337 18 is_stmt 0 view .LVU184 - 731 0054 9A60 str r2, [r3, #8] - 338:Core/Src/stm32f4xx_it.c **** - ARM GAS /tmp/ccdzv1TD.s page 21 - - - 732 .loc 1 338 5 is_stmt 1 view .LVU185 - 338:Core/Src/stm32f4xx_it.c **** - 733 .loc 1 338 21 is_stmt 0 view .LVU186 - 734 0056 0122 movs r2, #1 - 735 0058 1A70 strb r2, [r3] - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 736 .loc 1 340 5 is_stmt 1 view .LVU187 - 737 .LBB10: - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 738 .loc 1 340 10 view .LVU188 - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 739 .loc 1 340 19 is_stmt 0 view .LVU189 - 740 005a 8B68 ldr r3, [r1, #8] - 741 .LVL26: - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 742 .loc 1 340 5 view .LVU190 - 743 005c 09E0 b .L49 - 744 .LVL27: - 745 .L53: - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 746 .loc 1 340 5 view .LVU191 - 747 .LBE10: - 748 .LBB11: - 322:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 749 .loc 1 322 19 view .LVU192 - 750 005e 0023 movs r3, #0 - 751 0060 E2E7 b .L46 - 752 .LVL28: - 753 .L50: - 322:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 754 .loc 1 322 19 view .LVU193 - 755 .LBE11: - 756 .LBB12: - 341:Core/Src/stm32f4xx_it.c **** } - 757 .loc 1 341 7 is_stmt 1 view .LVU194 - 341:Core/Src/stm32f4xx_it.c **** } - 758 .loc 1 341 15 is_stmt 0 view .LVU195 - 759 0062 1149 ldr r1, .L55+8 - 760 0064 4A68 ldr r2, [r1, #4] - 341:Core/Src/stm32f4xx_it.c **** } - 761 .loc 1 341 41 view .LVU196 - 762 0066 1148 ldr r0, .L55+12 - 763 0068 30F81300 ldrh r0, [r0, r3, lsl #1] - 341:Core/Src/stm32f4xx_it.c **** } - 764 .loc 1 341 20 view .LVU197 - 765 006c 0244 add r2, r2, r0 - 766 006e 4A60 str r2, [r1, #4] - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 767 .loc 1 340 80 is_stmt 1 discriminator 3 view .LVU198 - 768 0070 0133 adds r3, r3, #1 - 769 .LVL29: - 770 .L49: - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 771 .loc 1 340 60 discriminator 1 view .LVU199 - 772 0072 312B cmp r3, #49 - 773 0074 F5D9 bls .L50 - 340:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - ARM GAS /tmp/ccdzv1TD.s page 22 - - - 774 .loc 1 340 60 is_stmt 0 discriminator 1 view .LVU200 - 775 .LBE12: - 343:Core/Src/stm32f4xx_it.c **** - 776 .loc 1 343 5 is_stmt 1 view .LVU201 - 343:Core/Src/stm32f4xx_it.c **** - 777 .loc 1 343 29 is_stmt 0 view .LVU202 - 778 0076 0B4B ldr r3, .L55+4 - 779 .LVL30: - 343:Core/Src/stm32f4xx_it.c **** - 780 .loc 1 343 29 view .LVU203 - 781 0078 9A68 ldr r2, [r3, #8] - 343:Core/Src/stm32f4xx_it.c **** - 782 .loc 1 343 16 view .LVU204 - 783 007a 0B4B ldr r3, .L55+8 - 784 007c DA60 str r2, [r3, #12] - 785 007e 0DE0 b .L45 - 786 .LVL31: - 787 .L52: - 788 .LBB13: - 347:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 789 .loc 1 347 7 is_stmt 1 view .LVU205 - 790 .loc 1 347 15 is_stmt 0 view .LVU206 - 791 0080 0949 ldr r1, .L55+8 - 792 0082 4A68 ldr r2, [r1, #4] - 793 .loc 1 347 41 view .LVU207 - 794 0084 0948 ldr r0, .L55+12 - 795 0086 30F81300 ldrh r0, [r0, r3, lsl #1] - 796 .loc 1 347 20 view .LVU208 - 797 008a 0244 add r2, r2, r0 - 798 008c 4A60 str r2, [r1, #4] + 345:Core/Src/stm32f4xx_it.c **** for (uint32_t i = Sweep_state.curr_step_start_DMA_N; i < ADC_BUFF_SIZE/2; i++) { 346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 799 .loc 1 346 48 is_stmt 1 discriminator 3 view .LVU209 - 800 008e 0133 adds r3, r3, #1 - 801 .LVL32: - 802 .L47: - 346:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; - 803 .loc 1 346 28 discriminator 1 view .LVU210 - 804 0090 312B cmp r3, #49 - 805 0092 F5D9 bls .L52 - 806 .LBE13: - 348:Core/Src/stm32f4xx_it.c **** } - 349:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE/2; - 807 .loc 1 349 5 view .LVU211 - 808 .loc 1 349 13 is_stmt 0 view .LVU212 - 809 0094 044A ldr r2, .L55+8 - 810 0096 D368 ldr r3, [r2, #12] - 811 .LVL33: - 812 .loc 1 349 16 view .LVU213 - 813 0098 3233 adds r3, r3, #50 - 814 009a D360 str r3, [r2, #12] - 815 .LVL34: - 816 .L45: - 350:Core/Src/stm32f4xx_it.c **** } - 351:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled - 352:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here - 353:Core/Src/stm32f4xx_it.c **** } - 817 .loc 1 353 1 view .LVU214 - ARM GAS /tmp/ccdzv1TD.s page 23 + 347:Core/Src/stm32f4xx_it.c **** } + 348:Core/Src/stm32f4xx_it.c **** ADC_proc.N = Sweep_state.curr_step_start_DMA_N; + 349:Core/Src/stm32f4xx_it.c **** + 350:Core/Src/stm32f4xx_it.c **** }else{ + 351:Core/Src/stm32f4xx_it.c **** for (uint32_t i = 0; i < ADC_BUFF_SIZE/2; i++) { + 667 .loc 1 351 19 view .LVU158 + 668 0014 0023 movs r3, #0 + 669 0016 3DE0 b .L47 + 670 .L56: + 671 .LBE6: + 326:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; + 672 .loc 1 326 5 is_stmt 1 view .LVU159 + 326:Core/Src/stm32f4xx_it.c **** Sweep_state.curr_step_started_flag = 0; + 673 .loc 1 326 40 is_stmt 0 view .LVU160 + 674 0018 0023 movs r3, #0 + 675 001a 234A ldr r2, .L57+4 + 676 001c 1371 strb r3, [r2, #4] + 327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 677 .loc 1 327 5 is_stmt 1 view .LVU161 + 678 .LBB7: + 327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 679 .loc 1 327 10 view .LVU162 + 680 .LVL22: + 327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 681 .loc 1 327 5 is_stmt 0 view .LVU163 + 682 001e 07E0 b .L48 + 683 .LVL23: + 684 .L49: + 328:Core/Src/stm32f4xx_it.c **** } + 685 .loc 1 328 7 is_stmt 1 view .LVU164 + 328:Core/Src/stm32f4xx_it.c **** } + 686 .loc 1 328 15 is_stmt 0 view .LVU165 + 687 0020 2249 ldr r1, .L57+8 + 688 0022 4A68 ldr r2, [r1, #4] + 328:Core/Src/stm32f4xx_it.c **** } + 689 .loc 1 328 41 view .LVU166 + ARM GAS /tmp/ccmTyUBf.s page 20 - 818 009c 08BD pop {r3, pc} - 819 .L56: - 820 009e 00BF .align 2 - 821 .L55: - 822 00a0 00040240 .word 1073873920 - 823 00a4 00000000 .word Sweep_state - 824 00a8 00000000 .word ADC_proc - 825 00ac 00000000 .word ADC1_buff_circular - 826 00b0 00000000 .word ADC_proc_shadow - 827 .cfi_endproc - 828 .LFE253: - 830 .text - 831 .Letext0: - 832 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 833 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" - 834 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" - 835 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" - 836 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" - 837 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" - 838 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" - 839 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h" - 840 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h" - 841 .file 11 "Core/Inc/main.h" - 842 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" - ARM GAS /tmp/ccdzv1TD.s page 24 + 690 0024 2248 ldr r0, .L57+12 + 691 0026 30F81300 ldrh r0, [r0, r3, lsl #1] + 328:Core/Src/stm32f4xx_it.c **** } + 692 .loc 1 328 20 view .LVU167 + 693 002a 0244 add r2, r2, r0 + 694 002c 4A60 str r2, [r1, #4] + 327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 695 .loc 1 327 66 is_stmt 1 discriminator 3 view .LVU168 + 696 002e 0133 adds r3, r3, #1 + 697 .LVL24: + 698 .L48: + 327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 699 .loc 1 327 28 discriminator 1 view .LVU169 + 327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 700 .loc 1 327 41 is_stmt 0 discriminator 1 view .LVU170 + 701 0030 1D4A ldr r2, .L57+4 + 702 0032 9268 ldr r2, [r2, #8] + 327:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 703 .loc 1 327 28 discriminator 1 view .LVU171 + 704 0034 9A42 cmp r2, r3 + 705 0036 F3D8 bhi .L49 + 706 .LBE7: + 331:Core/Src/stm32f4xx_it.c **** + 707 .loc 1 331 5 is_stmt 1 view .LVU172 + 331:Core/Src/stm32f4xx_it.c **** + 708 .loc 1 331 30 is_stmt 0 view .LVU173 + 709 0038 1B49 ldr r1, .L57+4 + 710 003a 8868 ldr r0, [r1, #8] + 331:Core/Src/stm32f4xx_it.c **** + 711 .loc 1 331 13 view .LVU174 + 712 003c 1B4B ldr r3, .L57+8 + 713 .LVL25: + 331:Core/Src/stm32f4xx_it.c **** + 714 .loc 1 331 13 view .LVU175 + 715 003e DA68 ldr r2, [r3, #12] + 331:Core/Src/stm32f4xx_it.c **** + 716 .loc 1 331 16 view .LVU176 + 717 0040 0244 add r2, r2, r0 + 718 0042 DA60 str r2, [r3, #12] + 334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 719 .loc 1 334 5 is_stmt 1 view .LVU177 + 334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 720 .loc 1 334 35 is_stmt 0 view .LVU178 + 721 0044 5868 ldr r0, [r3, #4] + 334:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.avg = ADC_proc.avg; + 722 .loc 1 334 25 view .LVU179 + 723 0046 1B4A ldr r2, .L57+16 + 724 0048 5060 str r0, [r2, #4] + 335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 725 .loc 1 335 5 is_stmt 1 view .LVU180 + 335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 726 .loc 1 335 35 is_stmt 0 view .LVU181 + 727 004a 9868 ldr r0, [r3, #8] + 335:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.N = ADC_proc.N; + 728 .loc 1 335 25 view .LVU182 + 729 004c 9060 str r0, [r2, #8] + 336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + ARM GAS /tmp/ccmTyUBf.s page 21 + + + 730 .loc 1 336 5 is_stmt 1 view .LVU183 + 336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 731 .loc 1 336 33 is_stmt 0 view .LVU184 + 732 004e D868 ldr r0, [r3, #12] + 336:Core/Src/stm32f4xx_it.c **** ADC_proc_shadow.status = 2; // buffer filled + 733 .loc 1 336 23 view .LVU185 + 734 0050 D060 str r0, [r2, #12] + 337:Core/Src/stm32f4xx_it.c **** + 735 .loc 1 337 5 is_stmt 1 view .LVU186 + 337:Core/Src/stm32f4xx_it.c **** + 736 .loc 1 337 28 is_stmt 0 view .LVU187 + 737 0052 0220 movs r0, #2 + 738 0054 1070 strb r0, [r2] + 340:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; + 739 .loc 1 340 5 is_stmt 1 view .LVU188 + 340:Core/Src/stm32f4xx_it.c **** ADC_proc.N = 0; + 740 .loc 1 340 18 is_stmt 0 view .LVU189 + 741 0056 0022 movs r2, #0 + 742 0058 5A60 str r2, [r3, #4] + 341:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; + 743 .loc 1 341 5 is_stmt 1 view .LVU190 + 341:Core/Src/stm32f4xx_it.c **** ADC_proc.avg = 0; + 744 .loc 1 341 16 is_stmt 0 view .LVU191 + 745 005a DA60 str r2, [r3, #12] + 342:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data + 746 .loc 1 342 5 is_stmt 1 view .LVU192 + 342:Core/Src/stm32f4xx_it.c **** ADC_proc.status = 1; // collecting data + 747 .loc 1 342 18 is_stmt 0 view .LVU193 + 748 005c 9A60 str r2, [r3, #8] + 343:Core/Src/stm32f4xx_it.c **** + 749 .loc 1 343 5 is_stmt 1 view .LVU194 + 343:Core/Src/stm32f4xx_it.c **** + 750 .loc 1 343 21 is_stmt 0 view .LVU195 + 751 005e 0122 movs r2, #1 + 752 0060 1A70 strb r2, [r3] + 345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 753 .loc 1 345 5 is_stmt 1 view .LVU196 + 754 .LBB8: + 345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 755 .loc 1 345 10 view .LVU197 + 345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 756 .loc 1 345 19 is_stmt 0 view .LVU198 + 757 0062 8B68 ldr r3, [r1, #8] + 758 .LVL26: + 345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 759 .loc 1 345 5 view .LVU199 + 760 0064 07E0 b .L50 + 761 .L51: + 346:Core/Src/stm32f4xx_it.c **** } + 762 .loc 1 346 7 is_stmt 1 view .LVU200 + 346:Core/Src/stm32f4xx_it.c **** } + 763 .loc 1 346 15 is_stmt 0 view .LVU201 + 764 0066 1149 ldr r1, .L57+8 + 765 0068 4A68 ldr r2, [r1, #4] + 346:Core/Src/stm32f4xx_it.c **** } + 766 .loc 1 346 41 view .LVU202 + 767 006a 1148 ldr r0, .L57+12 + ARM GAS /tmp/ccmTyUBf.s page 22 + + + 768 006c 30F81300 ldrh r0, [r0, r3, lsl #1] + 346:Core/Src/stm32f4xx_it.c **** } + 769 .loc 1 346 20 view .LVU203 + 770 0070 0244 add r2, r2, r0 + 771 0072 4A60 str r2, [r1, #4] + 345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 772 .loc 1 345 80 is_stmt 1 discriminator 3 view .LVU204 + 773 0074 0133 adds r3, r3, #1 + 774 .LVL27: + 775 .L50: + 345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 776 .loc 1 345 60 discriminator 1 view .LVU205 + 777 0076 312B cmp r3, #49 + 778 0078 F5D9 bls .L51 + 345:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 779 .loc 1 345 60 is_stmt 0 discriminator 1 view .LVU206 + 780 .LBE8: + 348:Core/Src/stm32f4xx_it.c **** + 781 .loc 1 348 5 is_stmt 1 view .LVU207 + 348:Core/Src/stm32f4xx_it.c **** + 782 .loc 1 348 29 is_stmt 0 view .LVU208 + 783 007a 0B4B ldr r3, .L57+4 + 784 .LVL28: + 348:Core/Src/stm32f4xx_it.c **** + 785 .loc 1 348 29 view .LVU209 + 786 007c 9A68 ldr r2, [r3, #8] + 348:Core/Src/stm32f4xx_it.c **** + 787 .loc 1 348 16 view .LVU210 + 788 007e 0B4B ldr r3, .L57+8 + 789 0080 DA60 str r2, [r3, #12] + 790 0082 0DE0 b .L46 + 791 .LVL29: + 792 .L53: + 793 .LBB9: + 352:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 794 .loc 1 352 7 is_stmt 1 view .LVU211 + 795 .loc 1 352 15 is_stmt 0 view .LVU212 + 796 0084 0949 ldr r1, .L57+8 + 797 0086 4A68 ldr r2, [r1, #4] + 798 .loc 1 352 41 view .LVU213 + 799 0088 0948 ldr r0, .L57+12 + 800 008a 30F81300 ldrh r0, [r0, r3, lsl #1] + 801 .loc 1 352 20 view .LVU214 + 802 008e 0244 add r2, r2, r0 + 803 0090 4A60 str r2, [r1, #4] + 351:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 804 .loc 1 351 48 is_stmt 1 discriminator 3 view .LVU215 + 805 0092 0133 adds r3, r3, #1 + 806 .LVL30: + 807 .L47: + 351:Core/Src/stm32f4xx_it.c **** ADC_proc.sum += ADC1_buff_circular[i]; + 808 .loc 1 351 28 discriminator 1 view .LVU216 + 809 0094 312B cmp r3, #49 + 810 0096 F5D9 bls .L53 + 811 .LBE9: + 353:Core/Src/stm32f4xx_it.c **** } + 354:Core/Src/stm32f4xx_it.c **** ADC_proc.N += ADC_BUFF_SIZE/2; + ARM GAS /tmp/ccmTyUBf.s page 23 + + + 812 .loc 1 354 5 view .LVU217 + 813 .loc 1 354 13 is_stmt 0 view .LVU218 + 814 0098 044A ldr r2, .L57+8 + 815 009a D368 ldr r3, [r2, #12] + 816 .LVL31: + 817 .loc 1 354 16 view .LVU219 + 818 009c 3233 adds r3, r3, #50 + 819 009e D360 str r3, [r2, #12] + 820 .LVL32: + 821 .L46: + 355:Core/Src/stm32f4xx_it.c **** } + 356:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled + 357:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here + 358:Core/Src/stm32f4xx_it.c **** } + 822 .loc 1 358 1 view .LVU220 + 823 00a0 08BD pop {r3, pc} + 824 .L58: + 825 00a2 00BF .align 2 + 826 .L57: + 827 00a4 00040240 .word 1073873920 + 828 00a8 00000000 .word Sweep_state + 829 00ac 00000000 .word ADC_proc + 830 00b0 00000000 .word ADC1_buff_circular + 831 00b4 00000000 .word ADC_proc_shadow + 832 .cfi_endproc + 833 .LFE253: + 835 .text + 836 .Letext0: + 837 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 838 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" + 839 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" + 840 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" + 841 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" + 842 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" + 843 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" + 844 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h" + 845 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h" + 846 .file 11 "Core/Inc/main.h" + 847 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" + ARM GAS /tmp/ccmTyUBf.s page 24 DEFINED SYMBOLS *ABS*:00000000 stm32f4xx_it.c - /tmp/ccdzv1TD.s:21 .text.NMI_Handler:00000000 $t - /tmp/ccdzv1TD.s:27 .text.NMI_Handler:00000000 NMI_Handler - /tmp/ccdzv1TD.s:44 .text.HardFault_Handler:00000000 $t - /tmp/ccdzv1TD.s:50 .text.HardFault_Handler:00000000 HardFault_Handler - /tmp/ccdzv1TD.s:67 .text.MemManage_Handler:00000000 $t - /tmp/ccdzv1TD.s:73 .text.MemManage_Handler:00000000 MemManage_Handler - /tmp/ccdzv1TD.s:90 .text.BusFault_Handler:00000000 $t - /tmp/ccdzv1TD.s:96 .text.BusFault_Handler:00000000 BusFault_Handler - /tmp/ccdzv1TD.s:113 .text.UsageFault_Handler:00000000 $t - /tmp/ccdzv1TD.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler - /tmp/ccdzv1TD.s:136 .text.SVC_Handler:00000000 $t - /tmp/ccdzv1TD.s:142 .text.SVC_Handler:00000000 SVC_Handler - /tmp/ccdzv1TD.s:155 .text.DebugMon_Handler:00000000 $t - /tmp/ccdzv1TD.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler - /tmp/ccdzv1TD.s:174 .text.PendSV_Handler:00000000 $t - /tmp/ccdzv1TD.s:180 .text.PendSV_Handler:00000000 PendSV_Handler - /tmp/ccdzv1TD.s:193 .text.SysTick_Handler:00000000 $t - /tmp/ccdzv1TD.s:199 .text.SysTick_Handler:00000000 SysTick_Handler - /tmp/ccdzv1TD.s:219 .text.EXTI0_IRQHandler:00000000 $t - /tmp/ccdzv1TD.s:225 .text.EXTI0_IRQHandler:00000000 EXTI0_IRQHandler - /tmp/ccdzv1TD.s:275 .text.EXTI0_IRQHandler:0000002c $d - /tmp/ccdzv1TD.s:281 .text.EXTI3_IRQHandler:00000000 $t - /tmp/ccdzv1TD.s:287 .text.EXTI3_IRQHandler:00000000 EXTI3_IRQHandler - /tmp/ccdzv1TD.s:308 .text.DMA2_Stream0_IRQHandler:00000000 $t - /tmp/ccdzv1TD.s:314 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler - /tmp/ccdzv1TD.s:334 .text.DMA2_Stream0_IRQHandler:0000000c $d - /tmp/ccdzv1TD.s:339 .text.OTG_FS_IRQHandler:00000000 $t - /tmp/ccdzv1TD.s:345 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler - /tmp/ccdzv1TD.s:365 .text.OTG_FS_IRQHandler:0000000c $d - /tmp/ccdzv1TD.s:370 .text.HAL_ADC_ConvCpltCallback:00000000 $t - /tmp/ccdzv1TD.s:376 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback - /tmp/ccdzv1TD.s:616 .text.HAL_ADC_ConvCpltCallback:000000d4 $d - /tmp/ccdzv1TD.s:625 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t - /tmp/ccdzv1TD.s:631 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback - /tmp/ccdzv1TD.s:822 .text.HAL_ADC_ConvHalfCpltCallback:000000a0 $d + /tmp/ccmTyUBf.s:21 .text.NMI_Handler:00000000 $t + /tmp/ccmTyUBf.s:27 .text.NMI_Handler:00000000 NMI_Handler + /tmp/ccmTyUBf.s:44 .text.HardFault_Handler:00000000 $t + /tmp/ccmTyUBf.s:50 .text.HardFault_Handler:00000000 HardFault_Handler + /tmp/ccmTyUBf.s:67 .text.MemManage_Handler:00000000 $t + /tmp/ccmTyUBf.s:73 .text.MemManage_Handler:00000000 MemManage_Handler + /tmp/ccmTyUBf.s:90 .text.BusFault_Handler:00000000 $t + /tmp/ccmTyUBf.s:96 .text.BusFault_Handler:00000000 BusFault_Handler + /tmp/ccmTyUBf.s:113 .text.UsageFault_Handler:00000000 $t + /tmp/ccmTyUBf.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler + /tmp/ccmTyUBf.s:136 .text.SVC_Handler:00000000 $t + /tmp/ccmTyUBf.s:142 .text.SVC_Handler:00000000 SVC_Handler + /tmp/ccmTyUBf.s:155 .text.DebugMon_Handler:00000000 $t + /tmp/ccmTyUBf.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler + /tmp/ccmTyUBf.s:174 .text.PendSV_Handler:00000000 $t + /tmp/ccmTyUBf.s:180 .text.PendSV_Handler:00000000 PendSV_Handler + /tmp/ccmTyUBf.s:193 .text.SysTick_Handler:00000000 $t + /tmp/ccmTyUBf.s:199 .text.SysTick_Handler:00000000 SysTick_Handler + /tmp/ccmTyUBf.s:219 .text.EXTI0_IRQHandler:00000000 $t + /tmp/ccmTyUBf.s:225 .text.EXTI0_IRQHandler:00000000 EXTI0_IRQHandler + /tmp/ccmTyUBf.s:282 .text.EXTI0_IRQHandler:00000034 $d + /tmp/ccmTyUBf.s:288 .text.EXTI3_IRQHandler:00000000 $t + /tmp/ccmTyUBf.s:294 .text.EXTI3_IRQHandler:00000000 EXTI3_IRQHandler + /tmp/ccmTyUBf.s:315 .text.DMA2_Stream0_IRQHandler:00000000 $t + /tmp/ccmTyUBf.s:321 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler + /tmp/ccmTyUBf.s:341 .text.DMA2_Stream0_IRQHandler:0000000c $d + /tmp/ccmTyUBf.s:346 .text.OTG_FS_IRQHandler:00000000 $t + /tmp/ccmTyUBf.s:352 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler + /tmp/ccmTyUBf.s:372 .text.OTG_FS_IRQHandler:0000000c $d + /tmp/ccmTyUBf.s:377 .text.HAL_ADC_ConvCpltCallback:00000000 $t + /tmp/ccmTyUBf.s:383 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback + /tmp/ccmTyUBf.s:623 .text.HAL_ADC_ConvCpltCallback:000000d8 $d + /tmp/ccmTyUBf.s:632 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t + /tmp/ccmTyUBf.s:638 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback + /tmp/ccmTyUBf.s:827 .text.HAL_ADC_ConvHalfCpltCallback:000000a4 $d UNDEFINED SYMBOLS HAL_IncTick diff --git a/build/stm32f4xx_it.o b/build/stm32f4xx_it.o index db22388..054a474 100644 Binary files a/build/stm32f4xx_it.o and b/build/stm32f4xx_it.o differ