ChTheo/RFG_stm32_ADC_STM32F429
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Made two minimal, surgical fixes to stabilize ON/OFF splitting.

Browse Source 
What I changed

  - Core/Inc/main.h:76
      - Set ADC_BUFF_SIZE from 50 to 64 so each half is even (32). This keeps the “i &
        1” parity consistent across half-buffer boundaries.
  - Core/Src/stm32f4xx_it.c:388
      - Fixed N after splitting the first half: ADC_proc.N = (ADC_BUFF_SIZE/2 -
        Sweep_state.curr_step_start_DMA_N)/2;
      - Previously it used (Sweep_state.curr_step_start_DMA_N)/2, which was wrong for
        that segment.

  Why this helps

  - With ADC_BUFF_SIZE=50, half-size is 25 (odd). That flips ON/OFF labeling each half
    because i & 1 parity shifts by 25, mixing levels and driving avg_ON and avg_OFF
    together.
  - The N bug skewed normalization, further flattening differences between averages.

  How to verify

  - Build and flash: make && make flash.
  - Observe avg_ON/avg_OFF over CDC. They should now differ consistently; inverting
    meандр should swap them cleanly.
  - If still needed, I can add a global sample counter (sample_seq) for fully robust
    ON/OFF classification without relying on buffer indices.
This commit is contained in:
Theodor Chikin
2025-12-19 23:41:15 +03:00
parent 186ad1939a
commit 985dbcc87b
18 changed files with 2868 additions and 2866 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
build/stm32f4xx_hal_msp.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccZXUiNz.s page 1
ARM GAS /tmp/ccasRNlf.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
28:Core/Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
29:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */
30:Core/Src/stm32f4xx_hal_msp.c ****
ARM GAS /tmp/ccZXUiNz.s page 2
ARM GAS /tmp/ccasRNlf.s page 2
31:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */
@ -118,7 +118,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
42 .loc 1 71 3 view .LVU3
43 0006 0B4B ldr r3, .L3
44 0008 5A6C ldr r2, [r3, #68]
ARM GAS /tmp/ccZXUiNz.s page 3
ARM GAS /tmp/ccasRNlf.s page 3
45 000a 42F48042 orr r2, r2, #16384
@ -178,7 +178,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
93 .LFB240:
80:Core/Src/stm32f4xx_hal_msp.c ****
81:Core/Src/stm32f4xx_hal_msp.c **** /**
ARM GAS /tmp/ccZXUiNz.s page 4
ARM GAS /tmp/ccasRNlf.s page 4
82:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP Initialization
@ -238,7 +238,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
105:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
106:Core/Src/stm32f4xx_hal_msp.c ****
ARM GAS /tmp/ccZXUiNz.s page 5
ARM GAS /tmp/ccasRNlf.s page 5
107:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA Init */
@ -298,7 +298,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
150 0034 5A6C ldr r2, [r3, #68]
151 0036 02F48072 and r2, r2, #256
152 003a 0192 str r2, [sp, #4]
ARM GAS /tmp/ccZXUiNz.s page 6
ARM GAS /tmp/ccasRNlf.s page 6
96:Core/Src/stm32f4xx_hal_msp.c ****
@ -358,7 +358,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
190 .loc 1 109 24 is_stmt 0 view .LVU43
191 0062 1048 ldr r0, .L11+4
192 0064 104B ldr r3, .L11+8
ARM GAS /tmp/ccZXUiNz.s page 7
ARM GAS /tmp/ccasRNlf.s page 7
193 0066 0360 str r3, [r0]
@ -418,7 +418,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
227 008a FFF7FEFF bl HAL_DMA_Init
228 .LVL5:
119:Core/Src/stm32f4xx_hal_msp.c **** {
ARM GAS /tmp/ccZXUiNz.s page 8
ARM GAS /tmp/ccasRNlf.s page 8
229 .loc 1 119 8 discriminator 1 view .LVU64
@ -478,7 +478,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
270 .loc 1 142 10 is_stmt 0 view .LVU73
271 0000 0268 ldr r2, [r0]
272 .loc 1 142 5 view .LVU74
ARM GAS /tmp/ccZXUiNz.s page 9
ARM GAS /tmp/ccasRNlf.s page 9
273 0002 094B ldr r3, .L20
@ -538,7 +538,7 @@ ARM GAS /tmp/ccZXUiNz.s page 1
306 .align 2
307 .L20:
308 0028 00200140 .word 1073815552
ARM GAS /tmp/ccZXUiNz.s page 10
ARM GAS /tmp/ccasRNlf.s page 10
309 002c 00380240 .word 1073887232
@ -555,20 +555,20 @@ ARM GAS /tmp/ccZXUiNz.s page 1
321 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
322 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
323 .file 9 "Core/Inc/main.h"
ARM GAS /tmp/ccZXUiNz.s page 11
ARM GAS /tmp/ccasRNlf.s page 11
DEFINED SYMBOLS
*ABS*:00000000 stm32f4xx_hal_msp.c
/tmp/ccZXUiNz.s:21 .text.HAL_MspInit:00000000 $t
/tmp/ccZXUiNz.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/ccZXUiNz.s:80 .text.HAL_MspInit:00000034 $d
/tmp/ccZXUiNz.s:85 .text.HAL_ADC_MspInit:00000000 $t
/tmp/ccZXUiNz.s:91 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
/tmp/ccZXUiNz.s:249 .text.HAL_ADC_MspInit:000000a0 $d
/tmp/ccZXUiNz.s:256 .text.HAL_ADC_MspDeInit:00000000 $t
/tmp/ccZXUiNz.s:262 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
/tmp/ccZXUiNz.s:308 .text.HAL_ADC_MspDeInit:00000028 $d
/tmp/ccasRNlf.s:21 .text.HAL_MspInit:00000000 $t
/tmp/ccasRNlf.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/ccasRNlf.s:80 .text.HAL_MspInit:00000034 $d
/tmp/ccasRNlf.s:85 .text.HAL_ADC_MspInit:00000000 $t
/tmp/ccasRNlf.s:91 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
/tmp/ccasRNlf.s:249 .text.HAL_ADC_MspInit:000000a0 $d
/tmp/ccasRNlf.s:256 .text.HAL_ADC_MspDeInit:00000000 $t
/tmp/ccasRNlf.s:262 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
/tmp/ccasRNlf.s:308 .text.HAL_ADC_MspDeInit:00000028 $d
UNDEFINED SYMBOLS
HAL_GPIO_Init