ChTheo/RFG_stm32_ADC_STM32F429
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compiles and works. But needs more testing

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This commit is contained in:
Theodor Chikin
2025-12-18 22:17:13 +03:00
parent 01dae2bccd
commit 7ff25c2893
50 changed files with 6884 additions and 6891 deletions
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148
build/stm32f4xx_hal_pwr.lst
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@ -1,4 +1,4 @@
ARM GAS /tmp/ccOfnEIn.s page 1
ARM GAS /tmp/ccJeaMlM.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */
29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c ****
30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @defgroup PWR PWR
ARM GAS /tmp/ccOfnEIn.s page 2
ARM GAS /tmp/ccJeaMlM.s page 2
31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief PWR HAL module driver
@ -118,7 +118,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c ****
86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /**
87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
ARM GAS /tmp/ccOfnEIn.s page 3
ARM GAS /tmp/ccJeaMlM.s page 3
88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None
@ -178,7 +178,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
63 @ args = 0, pretend = 0, frame = 8
64 @ frame_needed = 0, uses_anonymous_args = 0
65 @ link register save eliminated.
ARM GAS /tmp/ccOfnEIn.s page 4
ARM GAS /tmp/ccJeaMlM.s page 4
66 0000 82B0 sub sp, sp, #8
@ -238,7 +238,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None
127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */
128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void)
ARM GAS /tmp/ccOfnEIn.s page 5
ARM GAS /tmp/ccJeaMlM.s page 5
129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** {
@ -298,7 +298,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c ****
140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Low Power modes configuration functions
ARM GAS /tmp/ccOfnEIn.s page 6
ARM GAS /tmp/ccJeaMlM.s page 6
142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *
@ -358,7 +358,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** Stop mode ***
197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** =================
198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..]
ARM GAS /tmp/ccOfnEIn.s page 7
ARM GAS /tmp/ccJeaMlM.s page 7
199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
@ -418,7 +418,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c ****
255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
ARM GAS /tmp/ccOfnEIn.s page 8
ARM GAS /tmp/ccJeaMlM.s page 8
256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the
@ -478,7 +478,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
175 .loc 1 287 3 view .LVU28
176 0020 9A68 ldr r2, [r3, #8]
ARM GAS /tmp/ccOfnEIn.s page 9
ARM GAS /tmp/ccJeaMlM.s page 9
177 0022 22F48032 bic r2, r2, #65536
@ -538,7 +538,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
213 .loc 1 305 5 is_stmt 1 view .LVU41
214 005c 084A ldr r2, .L17+4
215 005e 9368 ldr r3, [r2, #8]
ARM GAS /tmp/ccOfnEIn.s page 10
ARM GAS /tmp/ccJeaMlM.s page 10
216 0060 43F48033 orr r3, r3, #65536
@ -598,7 +598,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
257 0000 014B ldr r3, .L20
258 0002 0122 movs r2, #1
259 0004 1A61 str r2, [r3, #16]
ARM GAS /tmp/ccOfnEIn.s page 11
ARM GAS /tmp/ccJeaMlM.s page 11
321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** }
@ -658,7 +658,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /**
333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enables the Wake-up PINx functionality.
334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
ARM GAS /tmp/ccOfnEIn.s page 12
ARM GAS /tmp/ccJeaMlM.s page 12
335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values:
@ -718,7 +718,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
337 .loc 1 360 1 is_stmt 1 view -0
338 .cfi_startproc
339 @ args = 0, pretend = 0, frame = 0
ARM GAS /tmp/ccOfnEIn.s page 13
ARM GAS /tmp/ccJeaMlM.s page 13
340 @ frame_needed = 0, uses_anonymous_args = 0
@ -778,7 +778,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */
391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** {
ARM GAS /tmp/ccOfnEIn.s page 14
ARM GAS /tmp/ccJeaMlM.s page 14
367 .loc 1 392 1 is_stmt 1 view -0
@ -838,7 +838,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
398 .syntax unified
399 .L34:
416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** }
ARM GAS /tmp/ccOfnEIn.s page 15
ARM GAS /tmp/ccJeaMlM.s page 15
417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c ****
@ -898,7 +898,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values:
438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI : Enter Stop mode with WFI instruction
439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE : Enter Stop mode with WFE instruction and
ARM GAS /tmp/ccOfnEIn.s page 16
ARM GAS /tmp/ccJeaMlM.s page 16
440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * clear of pending events before.
@ -958,7 +958,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __SEV();
461 .loc 1 468 7 is_stmt 1 view .LVU86
462 .syntax unified
ARM GAS /tmp/ccOfnEIn.s page 17
ARM GAS /tmp/ccJeaMlM.s page 17
463 @ 468 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1
@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
509 .thumb
510 .thumb_func
512 HAL_PWR_EnterSTANDBYMode:
ARM GAS /tmp/ccOfnEIn.s page 18
ARM GAS /tmp/ccJeaMlM.s page 18
513 .LFB249:
@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
541 0018 00700040 .word 1073770496
542 001c 00ED00E0 .word -536810240
543 .cfi_endproc
ARM GAS /tmp/ccOfnEIn.s page 19
ARM GAS /tmp/ccJeaMlM.s page 19
544 .LFE249:
@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
573 .LFB250:
510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check PWR Exti flag */
574 .loc 1 510 1 view -0
ARM GAS /tmp/ccOfnEIn.s page 20
ARM GAS /tmp/ccJeaMlM.s page 20
575 .cfi_startproc
@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on
538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * interruptions handling.
539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None
ARM GAS /tmp/ccOfnEIn.s page 21
ARM GAS /tmp/ccJeaMlM.s page 21
540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */
@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
657 .loc 1 557 1 is_stmt 0 view .LVU112
658 000a 7047 bx lr
659 .L60:
ARM GAS /tmp/ccOfnEIn.s page 22
ARM GAS /tmp/ccJeaMlM.s page 22
660 .align 2
@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccOfnEIn.s page 1
573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended.
575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None
ARM GAS /tmp/ccOfnEIn.s page 23
ARM GAS /tmp/ccJeaMlM.s page 23
576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */
@ -1352,60 +1352,60 @@ ARM GAS /tmp/ccOfnEIn.s page 1
726 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h"
727 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
728 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h"
ARM GAS /tmp/ccOfnEIn.s page 24
ARM GAS /tmp/ccJeaMlM.s page 24
DEFINED SYMBOLS
*ABS*:00000000 stm32f4xx_hal_pwr.c
/tmp/ccOfnEIn.s:21 .text.HAL_PWR_DeInit:00000000 $t
/tmp/ccOfnEIn.s:27 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
/tmp/ccOfnEIn.s:48 .text.HAL_PWR_DeInit:00000014 $d
/tmp/ccOfnEIn.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t
/tmp/ccOfnEIn.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
/tmp/ccOfnEIn.s:92 .text.HAL_PWR_EnableBkUpAccess:00000014 $d
/tmp/ccOfnEIn.s:98 .text.HAL_PWR_DisableBkUpAccess:00000000 $t
/tmp/ccOfnEIn.s:104 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
/tmp/ccOfnEIn.s:137 .text.HAL_PWR_DisableBkUpAccess:00000014 $d
/tmp/ccOfnEIn.s:143 .text.HAL_PWR_ConfigPVD:00000000 $t
/tmp/ccOfnEIn.s:149 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD
/tmp/ccOfnEIn.s:236 .text.HAL_PWR_ConfigPVD:0000007c $d
/tmp/ccOfnEIn.s:242 .text.HAL_PWR_EnablePVD:00000000 $t
/tmp/ccOfnEIn.s:248 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD
/tmp/ccOfnEIn.s:265 .text.HAL_PWR_EnablePVD:00000008 $d
/tmp/ccOfnEIn.s:270 .text.HAL_PWR_DisablePVD:00000000 $t
/tmp/ccOfnEIn.s:276 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD
/tmp/ccOfnEIn.s:293 .text.HAL_PWR_DisablePVD:00000008 $d
/tmp/ccOfnEIn.s:298 .text.HAL_PWR_EnableWakeUpPin:00000000 $t
/tmp/ccOfnEIn.s:304 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
/tmp/ccOfnEIn.s:323 .text.HAL_PWR_EnableWakeUpPin:0000000c $d
/tmp/ccOfnEIn.s:328 .text.HAL_PWR_DisableWakeUpPin:00000000 $t
/tmp/ccOfnEIn.s:334 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
/tmp/ccOfnEIn.s:353 .text.HAL_PWR_DisableWakeUpPin:0000000c $d
/tmp/ccOfnEIn.s:358 .text.HAL_PWR_EnterSLEEPMode:00000000 $t
/tmp/ccOfnEIn.s:364 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
/tmp/ccOfnEIn.s:421 .text.HAL_PWR_EnterSLEEPMode:00000020 $d
/tmp/ccOfnEIn.s:426 .text.HAL_PWR_EnterSTOPMode:00000000 $t
/tmp/ccOfnEIn.s:432 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
/tmp/ccOfnEIn.s:500 .text.HAL_PWR_EnterSTOPMode:00000034 $d
/tmp/ccOfnEIn.s:506 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
/tmp/ccOfnEIn.s:512 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
/tmp/ccOfnEIn.s:541 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d
/tmp/ccOfnEIn.s:547 .text.HAL_PWR_PVDCallback:00000000 $t
/tmp/ccOfnEIn.s:553 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback
/tmp/ccOfnEIn.s:566 .text.HAL_PWR_PVD_IRQHandler:00000000 $t
/tmp/ccOfnEIn.s:572 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler
/tmp/ccOfnEIn.s:606 .text.HAL_PWR_PVD_IRQHandler:0000001c $d
/tmp/ccOfnEIn.s:611 .text.HAL_PWR_EnableSleepOnExit:00000000 $t
/tmp/ccOfnEIn.s:617 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
/tmp/ccOfnEIn.s:634 .text.HAL_PWR_EnableSleepOnExit:0000000c $d
/tmp/ccOfnEIn.s:639 .text.HAL_PWR_DisableSleepOnExit:00000000 $t
/tmp/ccOfnEIn.s:645 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
/tmp/ccOfnEIn.s:662 .text.HAL_PWR_DisableSleepOnExit:0000000c $d
/tmp/ccOfnEIn.s:667 .text.HAL_PWR_EnableSEVOnPend:00000000 $t
/tmp/ccOfnEIn.s:673 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
/tmp/ccOfnEIn.s:690 .text.HAL_PWR_EnableSEVOnPend:0000000c $d
/tmp/ccOfnEIn.s:695 .text.HAL_PWR_DisableSEVOnPend:00000000 $t
/tmp/ccOfnEIn.s:701 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
/tmp/ccOfnEIn.s:718 .text.HAL_PWR_DisableSEVOnPend:0000000c $d
/tmp/ccJeaMlM.s:21 .text.HAL_PWR_DeInit:00000000 $t
/tmp/ccJeaMlM.s:27 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
/tmp/ccJeaMlM.s:48 .text.HAL_PWR_DeInit:00000014 $d
/tmp/ccJeaMlM.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t
/tmp/ccJeaMlM.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
/tmp/ccJeaMlM.s:92 .text.HAL_PWR_EnableBkUpAccess:00000014 $d
/tmp/ccJeaMlM.s:98 .text.HAL_PWR_DisableBkUpAccess:00000000 $t
/tmp/ccJeaMlM.s:104 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
/tmp/ccJeaMlM.s:137 .text.HAL_PWR_DisableBkUpAccess:00000014 $d
/tmp/ccJeaMlM.s:143 .text.HAL_PWR_ConfigPVD:00000000 $t
/tmp/ccJeaMlM.s:149 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD
/tmp/ccJeaMlM.s:236 .text.HAL_PWR_ConfigPVD:0000007c $d
/tmp/ccJeaMlM.s:242 .text.HAL_PWR_EnablePVD:00000000 $t
/tmp/ccJeaMlM.s:248 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD
/tmp/ccJeaMlM.s:265 .text.HAL_PWR_EnablePVD:00000008 $d
/tmp/ccJeaMlM.s:270 .text.HAL_PWR_DisablePVD:00000000 $t
/tmp/ccJeaMlM.s:276 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD
/tmp/ccJeaMlM.s:293 .text.HAL_PWR_DisablePVD:00000008 $d
/tmp/ccJeaMlM.s:298 .text.HAL_PWR_EnableWakeUpPin:00000000 $t
/tmp/ccJeaMlM.s:304 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
/tmp/ccJeaMlM.s:323 .text.HAL_PWR_EnableWakeUpPin:0000000c $d
/tmp/ccJeaMlM.s:328 .text.HAL_PWR_DisableWakeUpPin:00000000 $t
/tmp/ccJeaMlM.s:334 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
/tmp/ccJeaMlM.s:353 .text.HAL_PWR_DisableWakeUpPin:0000000c $d
/tmp/ccJeaMlM.s:358 .text.HAL_PWR_EnterSLEEPMode:00000000 $t
/tmp/ccJeaMlM.s:364 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
/tmp/ccJeaMlM.s:421 .text.HAL_PWR_EnterSLEEPMode:00000020 $d
/tmp/ccJeaMlM.s:426 .text.HAL_PWR_EnterSTOPMode:00000000 $t
/tmp/ccJeaMlM.s:432 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
/tmp/ccJeaMlM.s:500 .text.HAL_PWR_EnterSTOPMode:00000034 $d
/tmp/ccJeaMlM.s:506 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
/tmp/ccJeaMlM.s:512 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
/tmp/ccJeaMlM.s:541 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d
/tmp/ccJeaMlM.s:547 .text.HAL_PWR_PVDCallback:00000000 $t
/tmp/ccJeaMlM.s:553 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback
/tmp/ccJeaMlM.s:566 .text.HAL_PWR_PVD_IRQHandler:00000000 $t
/tmp/ccJeaMlM.s:572 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler
/tmp/ccJeaMlM.s:606 .text.HAL_PWR_PVD_IRQHandler:0000001c $d
/tmp/ccJeaMlM.s:611 .text.HAL_PWR_EnableSleepOnExit:00000000 $t
/tmp/ccJeaMlM.s:617 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
/tmp/ccJeaMlM.s:634 .text.HAL_PWR_EnableSleepOnExit:0000000c $d
/tmp/ccJeaMlM.s:639 .text.HAL_PWR_DisableSleepOnExit:00000000 $t
/tmp/ccJeaMlM.s:645 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
/tmp/ccJeaMlM.s:662 .text.HAL_PWR_DisableSleepOnExit:0000000c $d
/tmp/ccJeaMlM.s:667 .text.HAL_PWR_EnableSEVOnPend:00000000 $t
/tmp/ccJeaMlM.s:673 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
/tmp/ccJeaMlM.s:690 .text.HAL_PWR_EnableSEVOnPend:0000000c $d
/tmp/ccJeaMlM.s:695 .text.HAL_PWR_DisableSEVOnPend:00000000 $t
/tmp/ccJeaMlM.s:701 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
/tmp/ccJeaMlM.s:718 .text.HAL_PWR_DisableSEVOnPend:0000000c $d
NO UNDEFINED SYMBOLS