diff --git a/Core/Src/main.c b/Core/Src/main.c index 234b6f8..c2df412 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -96,7 +96,8 @@ int main(void) MX_ADC1_Init(); MX_USB_DEVICE_Init(); /* USER CODE BEGIN 2 */ - //HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); + HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); + HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); /* USER CODE END 2 */ /* Infinite loop */ diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c index 079ef14..ccb711b 100644 --- a/Core/Src/stm32f4xx_it.c +++ b/Core/Src/stm32f4xx_it.c @@ -228,14 +228,14 @@ void OTG_FS_IRQHandler(void) } /* USER CODE BEGIN 1 */ -/* + void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); // This function is called when the first half of the ADC buffer is filled // You can process the first half of ADC1_buff_circular here } -*/ + void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) diff --git a/build/main.lst b/build/main.lst index b7e2a51..b25a012 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cczOdN3R.s page 1 +ARM GAS /tmp/cchXeloq.s page 1 1 .cpu cortex-m4 @@ -58,7 +58,7 @@ ARM GAS /tmp/cczOdN3R.s page 1 29:Core/Src/main.c **** /* USER CODE BEGIN PTD */ 30:Core/Src/main.c **** 31:Core/Src/main.c **** /* USER CODE END PTD */ - ARM GAS /tmp/cczOdN3R.s page 2 + ARM GAS /tmp/cchXeloq.s page 2 32:Core/Src/main.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/cczOdN3R.s page 1 86:Core/Src/main.c **** /* Configure the system clock */ 87:Core/Src/main.c **** SystemClock_Config(); 88:Core/Src/main.c **** - ARM GAS /tmp/cczOdN3R.s page 3 + ARM GAS /tmp/cchXeloq.s page 3 89:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ @@ -131,150 +131,151 @@ ARM GAS /tmp/cczOdN3R.s page 1 96:Core/Src/main.c **** MX_ADC1_Init(); 97:Core/Src/main.c **** MX_USB_DEVICE_Init(); 98:Core/Src/main.c **** /* USER CODE BEGIN 2 */ - 99:Core/Src/main.c **** //HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); - 100:Core/Src/main.c **** /* USER CODE END 2 */ - 101:Core/Src/main.c **** - 102:Core/Src/main.c **** /* Infinite loop */ - 103:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ - 104:Core/Src/main.c **** while (1) - 105:Core/Src/main.c **** { - 106:Core/Src/main.c **** HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); - 107:Core/Src/main.c **** HAL_Delay(100); - 108:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)"Hello from STM32!\r\n", 19); - 109:Core/Src/main.c **** /* USER CODE END WHILE */ - 110:Core/Src/main.c **** - 111:Core/Src/main.c **** /* USER CODE BEGIN 3 */ - 112:Core/Src/main.c **** } - 113:Core/Src/main.c **** /* USER CODE END 3 */ - 114:Core/Src/main.c **** } - 115:Core/Src/main.c **** - 116:Core/Src/main.c **** /** - 117:Core/Src/main.c **** * @brief System Clock Configuration - 118:Core/Src/main.c **** * @retval None - 119:Core/Src/main.c **** */ - 120:Core/Src/main.c **** void SystemClock_Config(void) - 121:Core/Src/main.c **** { - 122:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 123:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 124:Core/Src/main.c **** - 125:Core/Src/main.c **** /** Configure the main internal regulator output voltage - 126:Core/Src/main.c **** */ - 127:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); - 128:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 129:Core/Src/main.c **** - 130:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters - 131:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. - 132:Core/Src/main.c **** */ - 133:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 134:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 135:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; - 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 140:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 141:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 142:Core/Src/main.c **** { - 143:Core/Src/main.c **** Error_Handler(); - 144:Core/Src/main.c **** } - 145:Core/Src/main.c **** - ARM GAS /tmp/cczOdN3R.s page 4 + 99:Core/Src/main.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); + 100:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); + 101:Core/Src/main.c **** /* USER CODE END 2 */ + 102:Core/Src/main.c **** + 103:Core/Src/main.c **** /* Infinite loop */ + 104:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ + 105:Core/Src/main.c **** while (1) + 106:Core/Src/main.c **** { + 107:Core/Src/main.c **** HAL_GPIO_TogglePin(LED_RED_GPIO_Port, LED_RED_Pin); + 108:Core/Src/main.c **** HAL_Delay(100); + 109:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)"Hello from STM32!\r\n", 19); + 110:Core/Src/main.c **** /* USER CODE END WHILE */ + 111:Core/Src/main.c **** + 112:Core/Src/main.c **** /* USER CODE BEGIN 3 */ + 113:Core/Src/main.c **** } + 114:Core/Src/main.c **** /* USER CODE END 3 */ + 115:Core/Src/main.c **** } + 116:Core/Src/main.c **** + 117:Core/Src/main.c **** /** + 118:Core/Src/main.c **** * @brief System Clock Configuration + 119:Core/Src/main.c **** * @retval None + 120:Core/Src/main.c **** */ + 121:Core/Src/main.c **** void SystemClock_Config(void) + 122:Core/Src/main.c **** { + 123:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 124:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 125:Core/Src/main.c **** + 126:Core/Src/main.c **** /** Configure the main internal regulator output voltage + 127:Core/Src/main.c **** */ + 128:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 129:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 130:Core/Src/main.c **** + 131:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 132:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. + 133:Core/Src/main.c **** */ + 134:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + 135:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; + 139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 140:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 141:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 142:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 143:Core/Src/main.c **** { + 144:Core/Src/main.c **** Error_Handler(); + 145:Core/Src/main.c **** } + ARM GAS /tmp/cchXeloq.s page 4 - 146:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks - 147:Core/Src/main.c **** */ - 148:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 149:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 150:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 151:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 152:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 153:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 154:Core/Src/main.c **** - 155:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) - 156:Core/Src/main.c **** { - 157:Core/Src/main.c **** Error_Handler(); - 158:Core/Src/main.c **** } - 159:Core/Src/main.c **** } - 160:Core/Src/main.c **** - 161:Core/Src/main.c **** /** - 162:Core/Src/main.c **** * @brief ADC1 Initialization Function - 163:Core/Src/main.c **** * @param None - 164:Core/Src/main.c **** * @retval None - 165:Core/Src/main.c **** */ - 166:Core/Src/main.c **** static void MX_ADC1_Init(void) - 167:Core/Src/main.c **** { - 168:Core/Src/main.c **** - 169:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ - 170:Core/Src/main.c **** - 171:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */ - 172:Core/Src/main.c **** - 173:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; - 174:Core/Src/main.c **** - 175:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ - 176:Core/Src/main.c **** - 177:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */ - 178:Core/Src/main.c **** - 179:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 180:Core/Src/main.c **** */ - 181:Core/Src/main.c **** hadc1.Instance = ADC1; - 182:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - 183:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 184:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; - 185:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 186:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 187:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - 188:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; - 189:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 190:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; - 191:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; - 192:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 193:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 194:Core/Src/main.c **** { - 195:Core/Src/main.c **** Error_Handler(); - 196:Core/Src/main.c **** } - 197:Core/Src/main.c **** - 198:Core/Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 199:Core/Src/main.c **** */ - 200:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_3; - 201:Core/Src/main.c **** sConfig.Rank = 1; - 202:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; - ARM GAS /tmp/cczOdN3R.s page 5 + 146:Core/Src/main.c **** + 147:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 148:Core/Src/main.c **** */ + 149:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 150:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 151:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 152:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 153:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 154:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 155:Core/Src/main.c **** + 156:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) + 157:Core/Src/main.c **** { + 158:Core/Src/main.c **** Error_Handler(); + 159:Core/Src/main.c **** } + 160:Core/Src/main.c **** } + 161:Core/Src/main.c **** + 162:Core/Src/main.c **** /** + 163:Core/Src/main.c **** * @brief ADC1 Initialization Function + 164:Core/Src/main.c **** * @param None + 165:Core/Src/main.c **** * @retval None + 166:Core/Src/main.c **** */ + 167:Core/Src/main.c **** static void MX_ADC1_Init(void) + 168:Core/Src/main.c **** { + 169:Core/Src/main.c **** + 170:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ + 171:Core/Src/main.c **** + 172:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */ + 173:Core/Src/main.c **** + 174:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 175:Core/Src/main.c **** + 176:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ + 177:Core/Src/main.c **** + 178:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */ + 179:Core/Src/main.c **** + 180:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 181:Core/Src/main.c **** */ + 182:Core/Src/main.c **** hadc1.Instance = ADC1; + 183:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + 184:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 185:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; + 186:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 187:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 188:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + 189:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; + 190:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 191:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; + 192:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; + 193:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 194:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 195:Core/Src/main.c **** { + 196:Core/Src/main.c **** Error_Handler(); + 197:Core/Src/main.c **** } + 198:Core/Src/main.c **** + 199:Core/Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 200:Core/Src/main.c **** */ + 201:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_3; + 202:Core/Src/main.c **** sConfig.Rank = 1; + ARM GAS /tmp/cchXeloq.s page 5 - 203:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 204:Core/Src/main.c **** { - 205:Core/Src/main.c **** Error_Handler(); - 206:Core/Src/main.c **** } - 207:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ - 208:Core/Src/main.c **** - 209:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */ - 210:Core/Src/main.c **** - 211:Core/Src/main.c **** } - 212:Core/Src/main.c **** - 213:Core/Src/main.c **** /** - 214:Core/Src/main.c **** * Enable DMA controller clock - 215:Core/Src/main.c **** */ - 216:Core/Src/main.c **** static void MX_DMA_Init(void) - 217:Core/Src/main.c **** { - 218:Core/Src/main.c **** - 219:Core/Src/main.c **** /* DMA controller clock enable */ - 220:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); - 221:Core/Src/main.c **** - 222:Core/Src/main.c **** /* DMA interrupt init */ - 223:Core/Src/main.c **** /* DMA2_Stream0_IRQn interrupt configuration */ - 224:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); - 225:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); - 226:Core/Src/main.c **** - 227:Core/Src/main.c **** } - 228:Core/Src/main.c **** - 229:Core/Src/main.c **** /** - 230:Core/Src/main.c **** * @brief GPIO Initialization Function - 231:Core/Src/main.c **** * @param None - 232:Core/Src/main.c **** * @retval None - 233:Core/Src/main.c **** */ - 234:Core/Src/main.c **** static void MX_GPIO_Init(void) - 235:Core/Src/main.c **** { - 28 .loc 1 235 1 view -0 + 203:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; + 204:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 205:Core/Src/main.c **** { + 206:Core/Src/main.c **** Error_Handler(); + 207:Core/Src/main.c **** } + 208:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ + 209:Core/Src/main.c **** + 210:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */ + 211:Core/Src/main.c **** + 212:Core/Src/main.c **** } + 213:Core/Src/main.c **** + 214:Core/Src/main.c **** /** + 215:Core/Src/main.c **** * Enable DMA controller clock + 216:Core/Src/main.c **** */ + 217:Core/Src/main.c **** static void MX_DMA_Init(void) + 218:Core/Src/main.c **** { + 219:Core/Src/main.c **** + 220:Core/Src/main.c **** /* DMA controller clock enable */ + 221:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); + 222:Core/Src/main.c **** + 223:Core/Src/main.c **** /* DMA interrupt init */ + 224:Core/Src/main.c **** /* DMA2_Stream0_IRQn interrupt configuration */ + 225:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); + 226:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); + 227:Core/Src/main.c **** + 228:Core/Src/main.c **** } + 229:Core/Src/main.c **** + 230:Core/Src/main.c **** /** + 231:Core/Src/main.c **** * @brief GPIO Initialization Function + 232:Core/Src/main.c **** * @param None + 233:Core/Src/main.c **** * @retval None + 234:Core/Src/main.c **** */ + 235:Core/Src/main.c **** static void MX_GPIO_Init(void) + 236:Core/Src/main.c **** { + 28 .loc 1 236 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 40 31 @ frame_needed = 0, uses_anonymous_args = 0 @@ -287,188 +288,188 @@ ARM GAS /tmp/cczOdN3R.s page 1 38 0002 8BB0 sub sp, sp, #44 39 .LCFI1: 40 .cfi_def_cfa_offset 56 - 236:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; - 41 .loc 1 236 3 view .LVU1 - 42 .loc 1 236 20 is_stmt 0 view .LVU2 + 237:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 41 .loc 1 237 3 view .LVU1 + 42 .loc 1 237 20 is_stmt 0 view .LVU2 43 0004 0024 movs r4, #0 44 0006 0594 str r4, [sp, #20] 45 0008 0694 str r4, [sp, #24] 46 000a 0794 str r4, [sp, #28] 47 000c 0894 str r4, [sp, #32] 48 000e 0994 str r4, [sp, #36] - 237:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ - 238:Core/Src/main.c **** - ARM GAS /tmp/cczOdN3R.s page 6 + 238:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ + ARM GAS /tmp/cchXeloq.s page 6 - 239:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ - 240:Core/Src/main.c **** - 241:Core/Src/main.c **** /* GPIO Ports Clock Enable */ - 242:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); - 49 .loc 1 242 3 is_stmt 1 view .LVU3 + 239:Core/Src/main.c **** + 240:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ + 241:Core/Src/main.c **** + 242:Core/Src/main.c **** /* GPIO Ports Clock Enable */ + 243:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); + 49 .loc 1 243 3 is_stmt 1 view .LVU3 50 .LBB4: - 51 .loc 1 242 3 view .LVU4 + 51 .loc 1 243 3 view .LVU4 52 0010 0094 str r4, [sp] - 53 .loc 1 242 3 view .LVU5 + 53 .loc 1 243 3 view .LVU5 54 0012 2B4B ldr r3, .L3 55 0014 1A6B ldr r2, [r3, #48] 56 0016 42F08002 orr r2, r2, #128 57 001a 1A63 str r2, [r3, #48] - 58 .loc 1 242 3 view .LVU6 + 58 .loc 1 243 3 view .LVU6 59 001c 1A6B ldr r2, [r3, #48] 60 001e 02F08002 and r2, r2, #128 61 0022 0092 str r2, [sp] - 62 .loc 1 242 3 view .LVU7 + 62 .loc 1 243 3 view .LVU7 63 0024 009A ldr r2, [sp] 64 .LBE4: - 65 .loc 1 242 3 view .LVU8 - 243:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); - 66 .loc 1 243 3 view .LVU9 + 65 .loc 1 243 3 view .LVU8 + 244:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); + 66 .loc 1 244 3 view .LVU9 67 .LBB5: - 68 .loc 1 243 3 view .LVU10 + 68 .loc 1 244 3 view .LVU10 69 0026 0194 str r4, [sp, #4] - 70 .loc 1 243 3 view .LVU11 + 70 .loc 1 244 3 view .LVU11 71 0028 1A6B ldr r2, [r3, #48] 72 002a 42F00402 orr r2, r2, #4 73 002e 1A63 str r2, [r3, #48] - 74 .loc 1 243 3 view .LVU12 + 74 .loc 1 244 3 view .LVU12 75 0030 1A6B ldr r2, [r3, #48] 76 0032 02F00402 and r2, r2, #4 77 0036 0192 str r2, [sp, #4] - 78 .loc 1 243 3 view .LVU13 + 78 .loc 1 244 3 view .LVU13 79 0038 019A ldr r2, [sp, #4] 80 .LBE5: - 81 .loc 1 243 3 view .LVU14 - 244:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); - 82 .loc 1 244 3 view .LVU15 + 81 .loc 1 244 3 view .LVU14 + 245:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 82 .loc 1 245 3 view .LVU15 83 .LBB6: - 84 .loc 1 244 3 view .LVU16 + 84 .loc 1 245 3 view .LVU16 85 003a 0294 str r4, [sp, #8] - 86 .loc 1 244 3 view .LVU17 + 86 .loc 1 245 3 view .LVU17 87 003c 1A6B ldr r2, [r3, #48] 88 003e 42F00102 orr r2, r2, #1 89 0042 1A63 str r2, [r3, #48] - 90 .loc 1 244 3 view .LVU18 + 90 .loc 1 245 3 view .LVU18 91 0044 1A6B ldr r2, [r3, #48] 92 0046 02F00102 and r2, r2, #1 93 004a 0292 str r2, [sp, #8] - 94 .loc 1 244 3 view .LVU19 + 94 .loc 1 245 3 view .LVU19 95 004c 029A ldr r2, [sp, #8] 96 .LBE6: - 97 .loc 1 244 3 view .LVU20 - 245:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); - 98 .loc 1 245 3 view .LVU21 - ARM GAS /tmp/cczOdN3R.s page 7 + 97 .loc 1 245 3 view .LVU20 + 246:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); + ARM GAS /tmp/cchXeloq.s page 7 + 98 .loc 1 246 3 view .LVU21 99 .LBB7: - 100 .loc 1 245 3 view .LVU22 + 100 .loc 1 246 3 view .LVU22 101 004e 0394 str r4, [sp, #12] - 102 .loc 1 245 3 view .LVU23 + 102 .loc 1 246 3 view .LVU23 103 0050 1A6B ldr r2, [r3, #48] 104 0052 42F02002 orr r2, r2, #32 105 0056 1A63 str r2, [r3, #48] - 106 .loc 1 245 3 view .LVU24 + 106 .loc 1 246 3 view .LVU24 107 0058 1A6B ldr r2, [r3, #48] 108 005a 02F02002 and r2, r2, #32 109 005e 0392 str r2, [sp, #12] - 110 .loc 1 245 3 view .LVU25 + 110 .loc 1 246 3 view .LVU25 111 0060 039A ldr r2, [sp, #12] 112 .LBE7: - 113 .loc 1 245 3 view .LVU26 - 246:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); - 114 .loc 1 246 3 view .LVU27 + 113 .loc 1 246 3 view .LVU26 + 247:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 114 .loc 1 247 3 view .LVU27 115 .LBB8: - 116 .loc 1 246 3 view .LVU28 + 116 .loc 1 247 3 view .LVU28 117 0062 0494 str r4, [sp, #16] - 118 .loc 1 246 3 view .LVU29 + 118 .loc 1 247 3 view .LVU29 119 0064 1A6B ldr r2, [r3, #48] 120 0066 42F00202 orr r2, r2, #2 121 006a 1A63 str r2, [r3, #48] - 122 .loc 1 246 3 view .LVU30 + 122 .loc 1 247 3 view .LVU30 123 006c 1B6B ldr r3, [r3, #48] 124 006e 03F00203 and r3, r3, #2 125 0072 0493 str r3, [sp, #16] - 126 .loc 1 246 3 view .LVU31 + 126 .loc 1 247 3 view .LVU31 127 0074 049B ldr r3, [sp, #16] 128 .LBE8: - 129 .loc 1 246 3 view .LVU32 - 247:Core/Src/main.c **** - 248:Core/Src/main.c **** /*Configure GPIO pin Output Level */ - 249:Core/Src/main.c **** HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET); - 130 .loc 1 249 3 view .LVU33 + 129 .loc 1 247 3 view .LVU32 + 248:Core/Src/main.c **** + 249:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 250:Core/Src/main.c **** HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET); + 130 .loc 1 250 3 view .LVU33 131 0076 134D ldr r5, .L3+4 132 0078 2246 mov r2, r4 133 007a 4FF48041 mov r1, #16384 134 007e 2846 mov r0, r5 135 0080 FFF7FEFF bl HAL_GPIO_WritePin 136 .LVL0: - 250:Core/Src/main.c **** - 251:Core/Src/main.c **** /*Configure GPIO pin Output Level */ - 252:Core/Src/main.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); - 137 .loc 1 252 3 view .LVU34 + 251:Core/Src/main.c **** + 252:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 253:Core/Src/main.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); + 137 .loc 1 253 3 view .LVU34 138 0084 0122 movs r2, #1 139 0086 8021 movs r1, #128 140 0088 2846 mov r0, r5 141 008a FFF7FEFF bl HAL_GPIO_WritePin 142 .LVL1: - 253:Core/Src/main.c **** - 254:Core/Src/main.c **** /*Configure GPIO pin : PF11 */ - 255:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_11; - 143 .loc 1 255 3 view .LVU35 - 144 .loc 1 255 23 is_stmt 0 view .LVU36 + 254:Core/Src/main.c **** + 255:Core/Src/main.c **** /*Configure GPIO pin : PF11 */ + 256:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_11; + 143 .loc 1 256 3 view .LVU35 + 144 .loc 1 256 23 is_stmt 0 view .LVU36 + ARM GAS /tmp/cchXeloq.s page 8 + + 145 008e 4FF40063 mov r3, #2048 - ARM GAS /tmp/cczOdN3R.s page 8 - - 146 0092 0593 str r3, [sp, #20] - 256:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; - 147 .loc 1 256 3 is_stmt 1 view .LVU37 - 148 .loc 1 256 24 is_stmt 0 view .LVU38 + 257:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + 147 .loc 1 257 3 is_stmt 1 view .LVU37 + 148 .loc 1 257 24 is_stmt 0 view .LVU38 149 0094 4FF48813 mov r3, #1114112 150 0098 0693 str r3, [sp, #24] - 257:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - 151 .loc 1 257 3 is_stmt 1 view .LVU39 - 152 .loc 1 257 24 is_stmt 0 view .LVU40 + 258:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 151 .loc 1 258 3 is_stmt 1 view .LVU39 + 152 .loc 1 258 24 is_stmt 0 view .LVU40 153 009a 0794 str r4, [sp, #28] - 258:Core/Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 154 .loc 1 258 3 is_stmt 1 view .LVU41 + 259:Core/Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 154 .loc 1 259 3 is_stmt 1 view .LVU41 155 009c 05A9 add r1, sp, #20 156 009e 0A48 ldr r0, .L3+8 157 00a0 FFF7FEFF bl HAL_GPIO_Init 158 .LVL2: - 259:Core/Src/main.c **** - 260:Core/Src/main.c **** /*Configure GPIO pins : LED_RED_Pin LED_BLUE_Pin */ - 261:Core/Src/main.c **** GPIO_InitStruct.Pin = LED_RED_Pin|LED_BLUE_Pin; - 159 .loc 1 261 3 view .LVU42 - 160 .loc 1 261 23 is_stmt 0 view .LVU43 + 260:Core/Src/main.c **** + 261:Core/Src/main.c **** /*Configure GPIO pins : LED_RED_Pin LED_BLUE_Pin */ + 262:Core/Src/main.c **** GPIO_InitStruct.Pin = LED_RED_Pin|LED_BLUE_Pin; + 159 .loc 1 262 3 view .LVU42 + 160 .loc 1 262 23 is_stmt 0 view .LVU43 161 00a4 4FF48143 mov r3, #16512 162 00a8 0593 str r3, [sp, #20] - 262:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 163 .loc 1 262 3 is_stmt 1 view .LVU44 - 164 .loc 1 262 24 is_stmt 0 view .LVU45 + 263:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 163 .loc 1 263 3 is_stmt 1 view .LVU44 + 164 .loc 1 263 24 is_stmt 0 view .LVU45 165 00aa 0123 movs r3, #1 166 00ac 0693 str r3, [sp, #24] - 263:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - 167 .loc 1 263 3 is_stmt 1 view .LVU46 - 168 .loc 1 263 24 is_stmt 0 view .LVU47 + 264:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 167 .loc 1 264 3 is_stmt 1 view .LVU46 + 168 .loc 1 264 24 is_stmt 0 view .LVU47 169 00ae 0794 str r4, [sp, #28] - 264:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 170 .loc 1 264 3 is_stmt 1 view .LVU48 - 171 .loc 1 264 25 is_stmt 0 view .LVU49 + 265:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 170 .loc 1 265 3 is_stmt 1 view .LVU48 + 171 .loc 1 265 25 is_stmt 0 view .LVU49 172 00b0 0894 str r4, [sp, #32] - 265:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 173 .loc 1 265 3 is_stmt 1 view .LVU50 + 266:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 173 .loc 1 266 3 is_stmt 1 view .LVU50 174 00b2 05A9 add r1, sp, #20 175 00b4 2846 mov r0, r5 176 00b6 FFF7FEFF bl HAL_GPIO_Init 177 .LVL3: - 266:Core/Src/main.c **** - 267:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ - 268:Core/Src/main.c **** - 269:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ - 270:Core/Src/main.c **** } - 178 .loc 1 270 1 is_stmt 0 view .LVU51 + 267:Core/Src/main.c **** + 268:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ + 269:Core/Src/main.c **** + 270:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ + 271:Core/Src/main.c **** } + 178 .loc 1 271 1 is_stmt 0 view .LVU51 179 00ba 0BB0 add sp, sp, #44 180 .LCFI2: 181 .cfi_def_cfa_offset 12 @@ -477,10 +478,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 184 .L4: 185 00be 00BF .align 2 186 .L3: + ARM GAS /tmp/cchXeloq.s page 9 + + 187 00c0 00380240 .word 1073887232 - ARM GAS /tmp/cczOdN3R.s page 9 - - 188 00c4 00040240 .word 1073873920 189 00c8 00140240 .word 1073878016 190 .cfi_endproc @@ -492,8 +493,8 @@ ARM GAS /tmp/cczOdN3R.s page 1 197 .thumb_func 199 MX_DMA_Init: 200 .LFB246: - 217:Core/Src/main.c **** - 201 .loc 1 217 1 is_stmt 1 view -0 + 218:Core/Src/main.c **** + 201 .loc 1 218 1 is_stmt 1 view -0 202 .cfi_startproc 203 @ args = 0, pretend = 0, frame = 8 204 @ frame_needed = 0, uses_anonymous_args = 0 @@ -504,46 +505,46 @@ ARM GAS /tmp/cczOdN3R.s page 1 209 0002 83B0 sub sp, sp, #12 210 .LCFI4: 211 .cfi_def_cfa_offset 16 - 220:Core/Src/main.c **** - 212 .loc 1 220 3 view .LVU53 + 221:Core/Src/main.c **** + 212 .loc 1 221 3 view .LVU53 213 .LBB9: - 220:Core/Src/main.c **** - 214 .loc 1 220 3 view .LVU54 + 221:Core/Src/main.c **** + 214 .loc 1 221 3 view .LVU54 215 0004 0021 movs r1, #0 216 0006 0191 str r1, [sp, #4] - 220:Core/Src/main.c **** - 217 .loc 1 220 3 view .LVU55 + 221:Core/Src/main.c **** + 217 .loc 1 221 3 view .LVU55 218 0008 094B ldr r3, .L7 219 000a 1A6B ldr r2, [r3, #48] 220 000c 42F48002 orr r2, r2, #4194304 221 0010 1A63 str r2, [r3, #48] - 220:Core/Src/main.c **** - 222 .loc 1 220 3 view .LVU56 + 221:Core/Src/main.c **** + 222 .loc 1 221 3 view .LVU56 223 0012 1B6B ldr r3, [r3, #48] 224 0014 03F48003 and r3, r3, #4194304 225 0018 0193 str r3, [sp, #4] - 220:Core/Src/main.c **** - 226 .loc 1 220 3 view .LVU57 + 221:Core/Src/main.c **** + 226 .loc 1 221 3 view .LVU57 227 001a 019B ldr r3, [sp, #4] 228 .LBE9: - 220:Core/Src/main.c **** - 229 .loc 1 220 3 view .LVU58 - 224:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); - 230 .loc 1 224 3 view .LVU59 + 221:Core/Src/main.c **** + 229 .loc 1 221 3 view .LVU58 + 225:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); + 230 .loc 1 225 3 view .LVU59 231 001c 0A46 mov r2, r1 232 001e 3820 movs r0, #56 233 0020 FFF7FEFF bl HAL_NVIC_SetPriority 234 .LVL4: - 225:Core/Src/main.c **** - 235 .loc 1 225 3 view .LVU60 + 226:Core/Src/main.c **** + 235 .loc 1 226 3 view .LVU60 236 0024 3820 movs r0, #56 + ARM GAS /tmp/cchXeloq.s page 10 + + 237 0026 FFF7FEFF bl HAL_NVIC_EnableIRQ - ARM GAS /tmp/cczOdN3R.s page 10 - - 238 .LVL5: - 227:Core/Src/main.c **** - 239 .loc 1 227 1 is_stmt 0 view .LVU61 + 228:Core/Src/main.c **** + 239 .loc 1 228 1 is_stmt 0 view .LVU61 240 002a 03B0 add sp, sp, #12 241 .LCFI5: 242 .cfi_def_cfa_offset 4 @@ -563,27 +564,27 @@ ARM GAS /tmp/cczOdN3R.s page 1 257 .thumb_func 259 Error_Handler: 260 .LFB248: - 271:Core/Src/main.c **** - 272:Core/Src/main.c **** /* USER CODE BEGIN 4 */ - 273:Core/Src/main.c **** - 274:Core/Src/main.c **** /* USER CODE END 4 */ - 275:Core/Src/main.c **** - 276:Core/Src/main.c **** /** - 277:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. - 278:Core/Src/main.c **** * @retval None - 279:Core/Src/main.c **** */ - 280:Core/Src/main.c **** void Error_Handler(void) - 281:Core/Src/main.c **** { - 261 .loc 1 281 1 is_stmt 1 view -0 + 272:Core/Src/main.c **** + 273:Core/Src/main.c **** /* USER CODE BEGIN 4 */ + 274:Core/Src/main.c **** + 275:Core/Src/main.c **** /* USER CODE END 4 */ + 276:Core/Src/main.c **** + 277:Core/Src/main.c **** /** + 278:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. + 279:Core/Src/main.c **** * @retval None + 280:Core/Src/main.c **** */ + 281:Core/Src/main.c **** void Error_Handler(void) + 282:Core/Src/main.c **** { + 261 .loc 1 282 1 is_stmt 1 view -0 262 .cfi_startproc 263 @ Volatile: function does not return. 264 @ args = 0, pretend = 0, frame = 0 265 @ frame_needed = 0, uses_anonymous_args = 0 266 @ link register save eliminated. - 282:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ - 283:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ - 284:Core/Src/main.c **** __disable_irq(); - 267 .loc 1 284 3 view .LVU63 + 283:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ + 284:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ + 285:Core/Src/main.c **** __disable_irq(); + 267 .loc 1 285 3 view .LVU63 268 .LBB10: 269 .LBI10: 270 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" @@ -597,10 +598,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2021 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + ARM GAS /tmp/cchXeloq.s page 11 + + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * - ARM GAS /tmp/cczOdN3R.s page 11 - - 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at @@ -657,10 +658,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + ARM GAS /tmp/cchXeloq.s page 12 + + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) - ARM GAS /tmp/cczOdN3R.s page 12 - - 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push @@ -717,10 +718,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cchXeloq.s page 13 + + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections - ARM GAS /tmp/cczOdN3R.s page 13 - - 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. @@ -777,10 +778,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE + ARM GAS /tmp/cchXeloq.s page 14 + + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section(".vectors"))) - ARM GAS /tmp/cczOdN3R.s page 14 - - 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) @@ -837,10 +838,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 238:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + ARM GAS /tmp/cchXeloq.s page 15 + + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter - ARM GAS /tmp/cczOdN3R.s page 15 - - 240:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 241:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 242:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe":::"memory") @@ -897,10 +898,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 293:Drivers/CMSIS/Include/cmsis_gcc.h **** { 294:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 295:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + ARM GAS /tmp/cchXeloq.s page 16 + + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - ARM GAS /tmp/cczOdN3R.s page 16 - - 297:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 298:Drivers/CMSIS/Include/cmsis_gcc.h **** 299:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); @@ -957,10 +958,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 350:Drivers/CMSIS/Include/cmsis_gcc.h **** { 351:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 352:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/cchXeloq.s page 17 + + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); - ARM GAS /tmp/cczOdN3R.s page 17 - - 354:Drivers/CMSIS/Include/cmsis_gcc.h **** } 355:Drivers/CMSIS/Include/cmsis_gcc.h **** 356:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1017,10 +1018,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 407:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 408:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 409:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it + ARM GAS /tmp/cchXeloq.s page 18 + + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". - ARM GAS /tmp/cczOdN3R.s page 18 - - 411:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 412:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 413:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -1077,10 +1078,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 465:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ + ARM GAS /tmp/cchXeloq.s page 19 + + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/cczOdN3R.s page 19 - - 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -1137,10 +1138,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 521:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 522:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location + ARM GAS /tmp/cchXeloq.s page 20 + + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded - ARM GAS /tmp/cczOdN3R.s page 20 - - 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) @@ -1197,10 +1198,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 578:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 579:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 580:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ + ARM GAS /tmp/cchXeloq.s page 21 + + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ - ARM GAS /tmp/cczOdN3R.s page 21 - - 582:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1257,10 +1258,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 635:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); 636:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 637:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + ARM GAS /tmp/cchXeloq.s page 22 + + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. - ARM GAS /tmp/cczOdN3R.s page 22 - - 639:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 641:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -1317,10 +1318,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 692:Drivers/CMSIS/Include/cmsis_gcc.h **** { 693:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); 694:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/cchXeloq.s page 23 + + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cczOdN3R.s page 23 - - 696:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 697:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 698:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ @@ -1377,10 +1378,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 749:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 751:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + ARM GAS /tmp/cchXeloq.s page 24 + + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cczOdN3R.s page 24 - - 753:Drivers/CMSIS/Include/cmsis_gcc.h **** 754:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 755:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) @@ -1437,10 +1438,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 806:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) 808:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cchXeloq.s page 25 + + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); - ARM GAS /tmp/cczOdN3R.s page 25 - - 810:Drivers/CMSIS/Include/cmsis_gcc.h **** } 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1497,10 +1498,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 863:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 864:Drivers/CMSIS/Include/cmsis_gcc.h **** } 865:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cchXeloq.s page 26 + + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cczOdN3R.s page 26 - - 867:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 868:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (32 bit) 869:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA exclusive instruction for 32 bit values. @@ -1557,10 +1558,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 920:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed + ARM GAS /tmp/cchXeloq.s page 27 + + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cczOdN3R.s page 27 - - 924:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) 925:Drivers/CMSIS/Include/cmsis_gcc.h **** { 926:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -1612,16 +1613,16 @@ ARM GAS /tmp/cczOdN3R.s page 1 280 .L10: 281 .LBE11: 282 .LBE10: - 285:Core/Src/main.c **** while (1) - 283 .loc 1 285 3 view .LVU66 - 286:Core/Src/main.c **** { - 287:Core/Src/main.c **** } - 284 .loc 1 287 3 view .LVU67 - 285:Core/Src/main.c **** while (1) - ARM GAS /tmp/cczOdN3R.s page 28 + 286:Core/Src/main.c **** while (1) + 283 .loc 1 286 3 view .LVU66 + 287:Core/Src/main.c **** { + 288:Core/Src/main.c **** } + 284 .loc 1 288 3 view .LVU67 + ARM GAS /tmp/cchXeloq.s page 28 - 285 .loc 1 285 9 view .LVU68 + 286:Core/Src/main.c **** while (1) + 285 .loc 1 286 9 view .LVU68 286 0002 FEE7 b .L10 287 .cfi_endproc 288 .LFE248: @@ -1632,8 +1633,8 @@ ARM GAS /tmp/cczOdN3R.s page 1 294 .thumb_func 296 MX_ADC1_Init: 297 .LFB245: - 167:Core/Src/main.c **** - 298 .loc 1 167 1 view -0 + 168:Core/Src/main.c **** + 298 .loc 1 168 1 view -0 299 .cfi_startproc 300 @ args = 0, pretend = 0, frame = 16 301 @ frame_needed = 0, uses_anonymous_args = 0 @@ -1644,127 +1645,127 @@ ARM GAS /tmp/cczOdN3R.s page 1 306 0002 85B0 sub sp, sp, #20 307 .LCFI7: 308 .cfi_def_cfa_offset 24 - 173:Core/Src/main.c **** - 309 .loc 1 173 3 view .LVU70 - 173:Core/Src/main.c **** - 310 .loc 1 173 26 is_stmt 0 view .LVU71 + 174:Core/Src/main.c **** + 309 .loc 1 174 3 view .LVU70 + 174:Core/Src/main.c **** + 310 .loc 1 174 26 is_stmt 0 view .LVU71 311 0004 0023 movs r3, #0 312 0006 0093 str r3, [sp] 313 0008 0193 str r3, [sp, #4] 314 000a 0293 str r3, [sp, #8] 315 000c 0393 str r3, [sp, #12] - 181:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - 316 .loc 1 181 3 is_stmt 1 view .LVU72 - 181:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - 317 .loc 1 181 18 is_stmt 0 view .LVU73 + 182:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + 316 .loc 1 182 3 is_stmt 1 view .LVU72 + 182:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + 317 .loc 1 182 18 is_stmt 0 view .LVU73 318 000e 1648 ldr r0, .L17 319 0010 164A ldr r2, .L17+4 320 0012 0260 str r2, [r0] - 182:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 321 .loc 1 182 3 is_stmt 1 view .LVU74 - 182:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 322 .loc 1 182 29 is_stmt 0 view .LVU75 + 183:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 321 .loc 1 183 3 is_stmt 1 view .LVU74 + 183:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 322 .loc 1 183 29 is_stmt 0 view .LVU75 323 0014 4FF48032 mov r2, #65536 324 0018 4260 str r2, [r0, #4] - 183:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; - 325 .loc 1 183 3 is_stmt 1 view .LVU76 - 183:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; - 326 .loc 1 183 25 is_stmt 0 view .LVU77 + 184:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; + 325 .loc 1 184 3 is_stmt 1 view .LVU76 + 184:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; + 326 .loc 1 184 25 is_stmt 0 view .LVU77 327 001a 8360 str r3, [r0, #8] - 184:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 328 .loc 1 184 3 is_stmt 1 view .LVU78 - 184:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 329 .loc 1 184 27 is_stmt 0 view .LVU79 + 185:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 328 .loc 1 185 3 is_stmt 1 view .LVU78 + 185:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 329 .loc 1 185 27 is_stmt 0 view .LVU79 330 001c 0361 str r3, [r0, #16] - 185:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 331 .loc 1 185 3 is_stmt 1 view .LVU80 - ARM GAS /tmp/cczOdN3R.s page 29 + 186:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + ARM GAS /tmp/cchXeloq.s page 29 - 185:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 332 .loc 1 185 33 is_stmt 0 view .LVU81 + 331 .loc 1 186 3 is_stmt 1 view .LVU80 + 186:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 332 .loc 1 186 33 is_stmt 0 view .LVU81 333 001e 0376 strb r3, [r0, #24] - 186:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - 334 .loc 1 186 3 is_stmt 1 view .LVU82 - 186:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - 335 .loc 1 186 36 is_stmt 0 view .LVU83 + 187:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + 334 .loc 1 187 3 is_stmt 1 view .LVU82 + 187:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + 335 .loc 1 187 36 is_stmt 0 view .LVU83 336 0020 80F82030 strb r3, [r0, #32] - 187:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; - 337 .loc 1 187 3 is_stmt 1 view .LVU84 - 187:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; - 338 .loc 1 187 35 is_stmt 0 view .LVU85 + 188:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; + 337 .loc 1 188 3 is_stmt 1 view .LVU84 + 188:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_Ext_IT11; + 338 .loc 1 188 35 is_stmt 0 view .LVU85 339 0024 4FF08052 mov r2, #268435456 340 0028 C262 str r2, [r0, #44] - 188:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 341 .loc 1 188 3 is_stmt 1 view .LVU86 - 188:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 342 .loc 1 188 31 is_stmt 0 view .LVU87 + 189:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 341 .loc 1 189 3 is_stmt 1 view .LVU86 + 189:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 342 .loc 1 189 31 is_stmt 0 view .LVU87 343 002a 4FF07062 mov r2, #251658240 344 002e 8262 str r2, [r0, #40] - 189:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; - 345 .loc 1 189 3 is_stmt 1 view .LVU88 - 189:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; - 346 .loc 1 189 24 is_stmt 0 view .LVU89 + 190:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; + 345 .loc 1 190 3 is_stmt 1 view .LVU88 + 190:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; + 346 .loc 1 190 24 is_stmt 0 view .LVU89 347 0030 C360 str r3, [r0, #12] - 190:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; - 348 .loc 1 190 3 is_stmt 1 view .LVU90 - 190:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; - 349 .loc 1 190 30 is_stmt 0 view .LVU91 + 191:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; + 348 .loc 1 191 3 is_stmt 1 view .LVU90 + 191:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; + 349 .loc 1 191 30 is_stmt 0 view .LVU91 350 0032 0123 movs r3, #1 351 0034 C361 str r3, [r0, #28] - 191:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 352 .loc 1 191 3 is_stmt 1 view .LVU92 - 191:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 353 .loc 1 191 36 is_stmt 0 view .LVU93 + 192:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 352 .loc 1 192 3 is_stmt 1 view .LVU92 + 192:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 353 .loc 1 192 36 is_stmt 0 view .LVU93 354 0036 80F83030 strb r3, [r0, #48] - 192:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 355 .loc 1 192 3 is_stmt 1 view .LVU94 - 192:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 356 .loc 1 192 27 is_stmt 0 view .LVU95 + 193:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 355 .loc 1 193 3 is_stmt 1 view .LVU94 + 193:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 356 .loc 1 193 27 is_stmt 0 view .LVU95 357 003a 4361 str r3, [r0, #20] - 193:Core/Src/main.c **** { - 358 .loc 1 193 3 is_stmt 1 view .LVU96 - 193:Core/Src/main.c **** { - 359 .loc 1 193 7 is_stmt 0 view .LVU97 + 194:Core/Src/main.c **** { + 358 .loc 1 194 3 is_stmt 1 view .LVU96 + 194:Core/Src/main.c **** { + 359 .loc 1 194 7 is_stmt 0 view .LVU97 360 003c FFF7FEFF bl HAL_ADC_Init 361 .LVL6: - 193:Core/Src/main.c **** { - 362 .loc 1 193 6 discriminator 1 view .LVU98 + 194:Core/Src/main.c **** { + 362 .loc 1 194 6 discriminator 1 view .LVU98 363 0040 68B9 cbnz r0, .L15 - 200:Core/Src/main.c **** sConfig.Rank = 1; - 364 .loc 1 200 3 is_stmt 1 view .LVU99 - 200:Core/Src/main.c **** sConfig.Rank = 1; - 365 .loc 1 200 19 is_stmt 0 view .LVU100 + 201:Core/Src/main.c **** sConfig.Rank = 1; + 364 .loc 1 201 3 is_stmt 1 view .LVU99 + 201:Core/Src/main.c **** sConfig.Rank = 1; + 365 .loc 1 201 19 is_stmt 0 view .LVU100 366 0042 0323 movs r3, #3 367 0044 0093 str r3, [sp] - 201:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; - ARM GAS /tmp/cczOdN3R.s page 30 + ARM GAS /tmp/cchXeloq.s page 30 - 368 .loc 1 201 3 is_stmt 1 view .LVU101 - 201:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; - 369 .loc 1 201 16 is_stmt 0 view .LVU102 + 202:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; + 368 .loc 1 202 3 is_stmt 1 view .LVU101 + 202:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; + 369 .loc 1 202 16 is_stmt 0 view .LVU102 370 0046 0123 movs r3, #1 371 0048 0193 str r3, [sp, #4] - 202:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 372 .loc 1 202 3 is_stmt 1 view .LVU103 - 202:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 373 .loc 1 202 24 is_stmt 0 view .LVU104 + 203:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 372 .loc 1 203 3 is_stmt 1 view .LVU103 + 203:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 373 .loc 1 203 24 is_stmt 0 view .LVU104 374 004a 0023 movs r3, #0 375 004c 0293 str r3, [sp, #8] - 203:Core/Src/main.c **** { - 376 .loc 1 203 3 is_stmt 1 view .LVU105 - 203:Core/Src/main.c **** { - 377 .loc 1 203 7 is_stmt 0 view .LVU106 + 204:Core/Src/main.c **** { + 376 .loc 1 204 3 is_stmt 1 view .LVU105 + 204:Core/Src/main.c **** { + 377 .loc 1 204 7 is_stmt 0 view .LVU106 378 004e 6946 mov r1, sp 379 0050 0548 ldr r0, .L17 380 0052 FFF7FEFF bl HAL_ADC_ConfigChannel 381 .LVL7: - 203:Core/Src/main.c **** { - 382 .loc 1 203 6 discriminator 1 view .LVU107 + 204:Core/Src/main.c **** { + 382 .loc 1 204 6 discriminator 1 view .LVU107 383 0056 20B9 cbnz r0, .L16 - 211:Core/Src/main.c **** - 384 .loc 1 211 1 view .LVU108 + 212:Core/Src/main.c **** + 384 .loc 1 212 1 view .LVU108 385 0058 05B0 add sp, sp, #20 386 .LCFI8: 387 .cfi_remember_state @@ -1774,13 +1775,13 @@ ARM GAS /tmp/cczOdN3R.s page 1 391 .L15: 392 .LCFI9: 393 .cfi_restore_state - 195:Core/Src/main.c **** } - 394 .loc 1 195 5 is_stmt 1 view .LVU109 + 196:Core/Src/main.c **** } + 394 .loc 1 196 5 is_stmt 1 view .LVU109 395 005e FFF7FEFF bl Error_Handler 396 .LVL8: 397 .L16: - 205:Core/Src/main.c **** } - 398 .loc 1 205 5 view .LVU110 + 206:Core/Src/main.c **** } + 398 .loc 1 206 5 view .LVU110 399 0062 FFF7FEFF bl Error_Handler 400 .LVL9: 401 .L18: @@ -1797,12 +1798,12 @@ ARM GAS /tmp/cczOdN3R.s page 1 413 .thumb 414 .thumb_func 416 SystemClock_Config: + ARM GAS /tmp/cchXeloq.s page 31 + + 417 .LFB244: - ARM GAS /tmp/cczOdN3R.s page 31 - - - 121:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 418 .loc 1 121 1 view -0 + 122:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 418 .loc 1 122 1 view -0 419 .cfi_startproc 420 @ args = 0, pretend = 0, frame = 80 421 @ frame_needed = 0, uses_anonymous_args = 0 @@ -1813,180 +1814,180 @@ ARM GAS /tmp/cczOdN3R.s page 1 426 0002 95B0 sub sp, sp, #84 427 .LCFI11: 428 .cfi_def_cfa_offset 88 - 122:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 429 .loc 1 122 3 view .LVU112 - 122:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 430 .loc 1 122 22 is_stmt 0 view .LVU113 + 123:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 429 .loc 1 123 3 view .LVU112 + 123:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 430 .loc 1 123 22 is_stmt 0 view .LVU113 431 0004 3022 movs r2, #48 432 0006 0021 movs r1, #0 433 0008 08A8 add r0, sp, #32 434 000a FFF7FEFF bl memset 435 .LVL10: - 123:Core/Src/main.c **** - 436 .loc 1 123 3 is_stmt 1 view .LVU114 - 123:Core/Src/main.c **** - 437 .loc 1 123 22 is_stmt 0 view .LVU115 + 124:Core/Src/main.c **** + 436 .loc 1 124 3 is_stmt 1 view .LVU114 + 124:Core/Src/main.c **** + 437 .loc 1 124 22 is_stmt 0 view .LVU115 438 000e 0023 movs r3, #0 439 0010 0393 str r3, [sp, #12] 440 0012 0493 str r3, [sp, #16] 441 0014 0593 str r3, [sp, #20] 442 0016 0693 str r3, [sp, #24] 443 0018 0793 str r3, [sp, #28] - 127:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 444 .loc 1 127 3 is_stmt 1 view .LVU116 + 128:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 444 .loc 1 128 3 is_stmt 1 view .LVU116 445 .LBB12: - 127:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 446 .loc 1 127 3 view .LVU117 + 128:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 446 .loc 1 128 3 view .LVU117 447 001a 0193 str r3, [sp, #4] - 127:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 448 .loc 1 127 3 view .LVU118 + 128:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 448 .loc 1 128 3 view .LVU118 449 001c 214A ldr r2, .L25 450 001e 116C ldr r1, [r2, #64] 451 0020 41F08051 orr r1, r1, #268435456 452 0024 1164 str r1, [r2, #64] - 127:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 453 .loc 1 127 3 view .LVU119 + 128:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 453 .loc 1 128 3 view .LVU119 454 0026 126C ldr r2, [r2, #64] 455 0028 02F08052 and r2, r2, #268435456 456 002c 0192 str r2, [sp, #4] - 127:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 457 .loc 1 127 3 view .LVU120 + 128:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 457 .loc 1 128 3 view .LVU120 458 002e 019A ldr r2, [sp, #4] 459 .LBE12: - 127:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 460 .loc 1 127 3 view .LVU121 - 128:Core/Src/main.c **** - 461 .loc 1 128 3 view .LVU122 + 128:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 460 .loc 1 128 3 view .LVU121 + 129:Core/Src/main.c **** + 461 .loc 1 129 3 view .LVU122 + ARM GAS /tmp/cchXeloq.s page 32 + + 462 .LBB13: - ARM GAS /tmp/cczOdN3R.s page 32 - - - 128:Core/Src/main.c **** - 463 .loc 1 128 3 view .LVU123 + 129:Core/Src/main.c **** + 463 .loc 1 129 3 view .LVU123 464 0030 0293 str r3, [sp, #8] - 128:Core/Src/main.c **** - 465 .loc 1 128 3 view .LVU124 + 129:Core/Src/main.c **** + 465 .loc 1 129 3 view .LVU124 466 0032 1D4B ldr r3, .L25+4 467 0034 1A68 ldr r2, [r3] 468 0036 42F44042 orr r2, r2, #49152 469 003a 1A60 str r2, [r3] - 128:Core/Src/main.c **** - 470 .loc 1 128 3 view .LVU125 + 129:Core/Src/main.c **** + 470 .loc 1 129 3 view .LVU125 471 003c 1B68 ldr r3, [r3] 472 003e 03F44043 and r3, r3, #49152 473 0042 0293 str r3, [sp, #8] - 128:Core/Src/main.c **** - 474 .loc 1 128 3 view .LVU126 + 129:Core/Src/main.c **** + 474 .loc 1 129 3 view .LVU126 475 0044 029B ldr r3, [sp, #8] 476 .LBE13: - 128:Core/Src/main.c **** - 477 .loc 1 128 3 view .LVU127 - 133:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 478 .loc 1 133 3 view .LVU128 - 133:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 479 .loc 1 133 36 is_stmt 0 view .LVU129 + 129:Core/Src/main.c **** + 477 .loc 1 129 3 view .LVU127 + 134:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 478 .loc 1 134 3 view .LVU128 + 134:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 479 .loc 1 134 36 is_stmt 0 view .LVU129 480 0046 0123 movs r3, #1 481 0048 0893 str r3, [sp, #32] - 134:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 482 .loc 1 134 3 is_stmt 1 view .LVU130 - 134:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 483 .loc 1 134 30 is_stmt 0 view .LVU131 + 135:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 482 .loc 1 135 3 is_stmt 1 view .LVU130 + 135:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 483 .loc 1 135 30 is_stmt 0 view .LVU131 484 004a 4FF48033 mov r3, #65536 485 004e 0993 str r3, [sp, #36] - 135:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 486 .loc 1 135 3 is_stmt 1 view .LVU132 - 135:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 487 .loc 1 135 34 is_stmt 0 view .LVU133 + 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 486 .loc 1 136 3 is_stmt 1 view .LVU132 + 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 487 .loc 1 136 34 is_stmt 0 view .LVU133 488 0050 0223 movs r3, #2 489 0052 0E93 str r3, [sp, #56] - 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; - 490 .loc 1 136 3 is_stmt 1 view .LVU134 - 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; - 491 .loc 1 136 35 is_stmt 0 view .LVU135 + 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; + 490 .loc 1 137 3 is_stmt 1 view .LVU134 + 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8; + 491 .loc 1 137 35 is_stmt 0 view .LVU135 492 0054 4FF48002 mov r2, #4194304 493 0058 0F92 str r2, [sp, #60] - 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 494 .loc 1 137 3 is_stmt 1 view .LVU136 - 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 495 .loc 1 137 30 is_stmt 0 view .LVU137 + 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 494 .loc 1 138 3 is_stmt 1 view .LVU136 + 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 495 .loc 1 138 30 is_stmt 0 view .LVU137 496 005a 0822 movs r2, #8 497 005c 1092 str r2, [sp, #64] - 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 498 .loc 1 138 3 is_stmt 1 view .LVU138 - 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 499 .loc 1 138 30 is_stmt 0 view .LVU139 + 139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 498 .loc 1 139 3 is_stmt 1 view .LVU138 + 139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 499 .loc 1 139 30 is_stmt 0 view .LVU139 500 005e 4FF4A872 mov r2, #336 501 0062 1192 str r2, [sp, #68] - 139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - ARM GAS /tmp/cczOdN3R.s page 33 + ARM GAS /tmp/cchXeloq.s page 33 - 502 .loc 1 139 3 is_stmt 1 view .LVU140 - 139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 503 .loc 1 139 30 is_stmt 0 view .LVU141 + 140:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 502 .loc 1 140 3 is_stmt 1 view .LVU140 + 140:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 503 .loc 1 140 30 is_stmt 0 view .LVU141 504 0064 1293 str r3, [sp, #72] - 140:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 505 .loc 1 140 3 is_stmt 1 view .LVU142 - 140:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 506 .loc 1 140 30 is_stmt 0 view .LVU143 + 141:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 505 .loc 1 141 3 is_stmt 1 view .LVU142 + 141:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 506 .loc 1 141 30 is_stmt 0 view .LVU143 507 0066 0723 movs r3, #7 508 0068 1393 str r3, [sp, #76] - 141:Core/Src/main.c **** { - 509 .loc 1 141 3 is_stmt 1 view .LVU144 - 141:Core/Src/main.c **** { - 510 .loc 1 141 7 is_stmt 0 view .LVU145 + 142:Core/Src/main.c **** { + 509 .loc 1 142 3 is_stmt 1 view .LVU144 + 142:Core/Src/main.c **** { + 510 .loc 1 142 7 is_stmt 0 view .LVU145 511 006a 08A8 add r0, sp, #32 512 006c FFF7FEFF bl HAL_RCC_OscConfig 513 .LVL11: - 141:Core/Src/main.c **** { - 514 .loc 1 141 6 discriminator 1 view .LVU146 + 142:Core/Src/main.c **** { + 514 .loc 1 142 6 discriminator 1 view .LVU146 515 0070 98B9 cbnz r0, .L23 - 148:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 516 .loc 1 148 3 is_stmt 1 view .LVU147 - 148:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 517 .loc 1 148 31 is_stmt 0 view .LVU148 + 149:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 516 .loc 1 149 3 is_stmt 1 view .LVU147 + 149:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 517 .loc 1 149 31 is_stmt 0 view .LVU148 518 0072 0F23 movs r3, #15 519 0074 0393 str r3, [sp, #12] - 150:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 520 .loc 1 150 3 is_stmt 1 view .LVU149 - 150:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 521 .loc 1 150 34 is_stmt 0 view .LVU150 + 151:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 520 .loc 1 151 3 is_stmt 1 view .LVU149 + 151:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 521 .loc 1 151 34 is_stmt 0 view .LVU150 522 0076 0223 movs r3, #2 523 0078 0493 str r3, [sp, #16] - 151:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 524 .loc 1 151 3 is_stmt 1 view .LVU151 - 151:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 525 .loc 1 151 35 is_stmt 0 view .LVU152 + 152:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 524 .loc 1 152 3 is_stmt 1 view .LVU151 + 152:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 525 .loc 1 152 35 is_stmt 0 view .LVU152 526 007a 0023 movs r3, #0 527 007c 0593 str r3, [sp, #20] - 152:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 528 .loc 1 152 3 is_stmt 1 view .LVU153 - 152:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 529 .loc 1 152 36 is_stmt 0 view .LVU154 + 153:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 528 .loc 1 153 3 is_stmt 1 view .LVU153 + 153:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 529 .loc 1 153 36 is_stmt 0 view .LVU154 530 007e 4FF4A053 mov r3, #5120 531 0082 0693 str r3, [sp, #24] - 153:Core/Src/main.c **** - 532 .loc 1 153 3 is_stmt 1 view .LVU155 - 153:Core/Src/main.c **** - 533 .loc 1 153 36 is_stmt 0 view .LVU156 + 154:Core/Src/main.c **** + 532 .loc 1 154 3 is_stmt 1 view .LVU155 + 154:Core/Src/main.c **** + 533 .loc 1 154 36 is_stmt 0 view .LVU156 534 0084 4FF48053 mov r3, #4096 535 0088 0793 str r3, [sp, #28] - 155:Core/Src/main.c **** { - 536 .loc 1 155 3 is_stmt 1 view .LVU157 - 155:Core/Src/main.c **** { - 537 .loc 1 155 7 is_stmt 0 view .LVU158 + 156:Core/Src/main.c **** { + 536 .loc 1 156 3 is_stmt 1 view .LVU157 + 156:Core/Src/main.c **** { + 537 .loc 1 156 7 is_stmt 0 view .LVU158 538 008a 0521 movs r1, #5 539 008c 03A8 add r0, sp, #12 + ARM GAS /tmp/cchXeloq.s page 34 + + 540 008e FFF7FEFF bl HAL_RCC_ClockConfig - ARM GAS /tmp/cczOdN3R.s page 34 - - 541 .LVL12: - 155:Core/Src/main.c **** { - 542 .loc 1 155 6 discriminator 1 view .LVU159 + 156:Core/Src/main.c **** { + 542 .loc 1 156 6 discriminator 1 view .LVU159 543 0092 20B9 cbnz r0, .L24 - 159:Core/Src/main.c **** - 544 .loc 1 159 1 view .LVU160 + 160:Core/Src/main.c **** + 544 .loc 1 160 1 view .LVU160 545 0094 15B0 add sp, sp, #84 546 .LCFI12: 547 .cfi_remember_state @@ -1996,13 +1997,13 @@ ARM GAS /tmp/cczOdN3R.s page 1 551 .L23: 552 .LCFI13: 553 .cfi_restore_state - 143:Core/Src/main.c **** } - 554 .loc 1 143 5 is_stmt 1 view .LVU161 + 144:Core/Src/main.c **** } + 554 .loc 1 144 5 is_stmt 1 view .LVU161 555 009a FFF7FEFF bl Error_Handler 556 .LVL13: 557 .L24: - 157:Core/Src/main.c **** } - 558 .loc 1 157 5 view .LVU162 + 158:Core/Src/main.c **** } + 558 .loc 1 158 5 view .LVU162 559 009e FFF7FEFF bl Error_Handler 560 .LVL14: 561 .L26: @@ -2037,10 +2038,10 @@ ARM GAS /tmp/cczOdN3R.s page 1 587 0000 08B5 push {r3, lr} 588 .LCFI14: 589 .cfi_def_cfa_offset 8 + ARM GAS /tmp/cchXeloq.s page 35 + + 590 .cfi_offset 3, -8 - ARM GAS /tmp/cczOdN3R.s page 35 - - 591 .cfi_offset 14, -4 80:Core/Src/main.c **** 592 .loc 1 80 3 view .LVU164 @@ -2066,112 +2067,131 @@ ARM GAS /tmp/cczOdN3R.s page 1 607 .loc 1 97 3 view .LVU169 608 0016 FFF7FEFF bl MX_USB_DEVICE_Init 609 .LVL20: - 610 .L28: - 104:Core/Src/main.c **** { - 611 .loc 1 104 3 view .LVU170 - 612 .LBB14: - 106:Core/Src/main.c **** HAL_Delay(100); - 613 .loc 1 106 5 view .LVU171 - 614 001a 4FF48041 mov r1, #16384 - 615 001e 0548 ldr r0, .L30 - 616 0020 FFF7FEFF bl HAL_GPIO_TogglePin - 617 .LVL21: - 107:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)"Hello from STM32!\r\n", 19); - 618 .loc 1 107 5 view .LVU172 - 619 0024 6420 movs r0, #100 - 620 0026 FFF7FEFF bl HAL_Delay + 99:Core/Src/main.c **** HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1_buff_circular, ADC_BUFF_SIZE); + 610 .loc 1 99 3 view .LVU170 + 611 001a 0122 movs r2, #1 + 612 001c 8021 movs r1, #128 + 613 001e 0A48 ldr r0, .L30 + 614 0020 FFF7FEFF bl HAL_GPIO_WritePin + 615 .LVL21: + 100:Core/Src/main.c **** /* USER CODE END 2 */ + 616 .loc 1 100 3 view .LVU171 + 617 0024 6422 movs r2, #100 + 618 0026 0949 ldr r1, .L30+4 + 619 0028 0948 ldr r0, .L30+8 + 620 002a FFF7FEFF bl HAL_ADC_Start_DMA 621 .LVL22: - 108:Core/Src/main.c **** /* USER CODE END WHILE */ - 622 .loc 1 108 5 discriminator 1 view .LVU173 - 623 002a 1321 movs r1, #19 - 624 002c 0248 ldr r0, .L30+4 - 625 002e FFF7FEFF bl CDC_Transmit_FS - 626 .LVL23: - 627 .LBE14: - 104:Core/Src/main.c **** { - 628 .loc 1 104 9 view .LVU174 - 629 0032 F2E7 b .L28 - 630 .L31: - 631 .align 2 - 632 .L30: - 633 0034 00040240 .word 1073873920 - 634 0038 00000000 .word .LC0 - 635 .cfi_endproc - 636 .LFE243: - ARM GAS /tmp/cczOdN3R.s page 36 + 622 .L28: + 105:Core/Src/main.c **** { + 623 .loc 1 105 3 view .LVU172 + 624 .LBB14: + 107:Core/Src/main.c **** HAL_Delay(100); + 625 .loc 1 107 5 view .LVU173 + 626 002e 4FF48041 mov r1, #16384 + 627 0032 0548 ldr r0, .L30 + 628 0034 FFF7FEFF bl HAL_GPIO_TogglePin + 629 .LVL23: + 108:Core/Src/main.c **** CDC_Transmit_FS((uint8_t *)"Hello from STM32!\r\n", 19); + 630 .loc 1 108 5 view .LVU174 + 631 0038 6420 movs r0, #100 + 632 003a FFF7FEFF bl HAL_Delay + 633 .LVL24: + 109:Core/Src/main.c **** /* USER CODE END WHILE */ + 634 .loc 1 109 5 discriminator 1 view .LVU175 + ARM GAS /tmp/cchXeloq.s page 36 - 638 .global ADC1_buff_circular - 639 .section .bss.ADC1_buff_circular,"aw",%nobits - 640 .align 2 - 643 ADC1_buff_circular: - 644 0000 00000000 .space 200 - 644 00000000 - 644 00000000 - 644 00000000 - 644 00000000 - 645 .global hdma_adc1 - 646 .section .bss.hdma_adc1,"aw",%nobits - 647 .align 2 - 650 hdma_adc1: - 651 0000 00000000 .space 96 - 651 00000000 - 651 00000000 - 651 00000000 - 651 00000000 - 652 .global hadc1 - 653 .section .bss.hadc1,"aw",%nobits + 635 003e 1321 movs r1, #19 + 636 0040 0448 ldr r0, .L30+12 + 637 0042 FFF7FEFF bl CDC_Transmit_FS + 638 .LVL25: + 639 .LBE14: + 105:Core/Src/main.c **** { + 640 .loc 1 105 9 view .LVU176 + 641 0046 F2E7 b .L28 + 642 .L31: + 643 .align 2 + 644 .L30: + 645 0048 00040240 .word 1073873920 + 646 004c 00000000 .word ADC1_buff_circular + 647 0050 00000000 .word hadc1 + 648 0054 00000000 .word .LC0 + 649 .cfi_endproc + 650 .LFE243: + 652 .global ADC1_buff_circular + 653 .section .bss.ADC1_buff_circular,"aw",%nobits 654 .align 2 - 657 hadc1: - 658 0000 00000000 .space 72 + 657 ADC1_buff_circular: + 658 0000 00000000 .space 200 658 00000000 658 00000000 658 00000000 658 00000000 - 659 .text - 660 .Letext0: - 661 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" - 662 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 663 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" - 664 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" - 665 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" - 666 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" - 667 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" - 668 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" - 669 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" - 670 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h" - 671 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" - 672 .file 14 "USB_DEVICE/App/usb_device.h" - 673 .file 15 "" - ARM GAS /tmp/cczOdN3R.s page 37 + 659 .global hdma_adc1 + 660 .section .bss.hdma_adc1,"aw",%nobits + 661 .align 2 + 664 hdma_adc1: + 665 0000 00000000 .space 96 + 665 00000000 + 665 00000000 + 665 00000000 + 665 00000000 + 666 .global hadc1 + 667 .section .bss.hadc1,"aw",%nobits + 668 .align 2 + 671 hadc1: + 672 0000 00000000 .space 72 + 672 00000000 + 672 00000000 + 672 00000000 + 672 00000000 + 673 .text + 674 .Letext0: + 675 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" + 676 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 677 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" + 678 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" + 679 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" + 680 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" + 681 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" + 682 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" + 683 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" + 684 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h" + 685 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" + ARM GAS /tmp/cchXeloq.s page 37 + + + 686 .file 14 "USB_DEVICE/App/usb_device.h" + 687 .file 15 "" + ARM GAS /tmp/cchXeloq.s page 38 DEFINED SYMBOLS *ABS*:00000000 main.c - /tmp/cczOdN3R.s:21 .text.MX_GPIO_Init:00000000 $t - /tmp/cczOdN3R.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init - /tmp/cczOdN3R.s:187 .text.MX_GPIO_Init:000000c0 $d - /tmp/cczOdN3R.s:194 .text.MX_DMA_Init:00000000 $t - /tmp/cczOdN3R.s:199 .text.MX_DMA_Init:00000000 MX_DMA_Init - /tmp/cczOdN3R.s:248 .text.MX_DMA_Init:00000030 $d - /tmp/cczOdN3R.s:253 .text.Error_Handler:00000000 $t - /tmp/cczOdN3R.s:259 .text.Error_Handler:00000000 Error_Handler - /tmp/cczOdN3R.s:291 .text.MX_ADC1_Init:00000000 $t - /tmp/cczOdN3R.s:296 .text.MX_ADC1_Init:00000000 MX_ADC1_Init - /tmp/cczOdN3R.s:404 .text.MX_ADC1_Init:00000068 $d - /tmp/cczOdN3R.s:657 .bss.hadc1:00000000 hadc1 - /tmp/cczOdN3R.s:410 .text.SystemClock_Config:00000000 $t - /tmp/cczOdN3R.s:416 .text.SystemClock_Config:00000000 SystemClock_Config - /tmp/cczOdN3R.s:564 .text.SystemClock_Config:000000a4 $d - /tmp/cczOdN3R.s:570 .rodata.main.str1.4:00000000 $d - /tmp/cczOdN3R.s:574 .text.main:00000000 $t - /tmp/cczOdN3R.s:580 .text.main:00000000 main - /tmp/cczOdN3R.s:633 .text.main:00000034 $d - /tmp/cczOdN3R.s:643 .bss.ADC1_buff_circular:00000000 ADC1_buff_circular - /tmp/cczOdN3R.s:640 .bss.ADC1_buff_circular:00000000 $d - /tmp/cczOdN3R.s:650 .bss.hdma_adc1:00000000 hdma_adc1 - /tmp/cczOdN3R.s:647 .bss.hdma_adc1:00000000 $d - /tmp/cczOdN3R.s:654 .bss.hadc1:00000000 $d + /tmp/cchXeloq.s:21 .text.MX_GPIO_Init:00000000 $t + /tmp/cchXeloq.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/cchXeloq.s:187 .text.MX_GPIO_Init:000000c0 $d + /tmp/cchXeloq.s:194 .text.MX_DMA_Init:00000000 $t + /tmp/cchXeloq.s:199 .text.MX_DMA_Init:00000000 MX_DMA_Init + /tmp/cchXeloq.s:248 .text.MX_DMA_Init:00000030 $d + /tmp/cchXeloq.s:253 .text.Error_Handler:00000000 $t + /tmp/cchXeloq.s:259 .text.Error_Handler:00000000 Error_Handler + /tmp/cchXeloq.s:291 .text.MX_ADC1_Init:00000000 $t + /tmp/cchXeloq.s:296 .text.MX_ADC1_Init:00000000 MX_ADC1_Init + /tmp/cchXeloq.s:404 .text.MX_ADC1_Init:00000068 $d + /tmp/cchXeloq.s:671 .bss.hadc1:00000000 hadc1 + /tmp/cchXeloq.s:410 .text.SystemClock_Config:00000000 $t + /tmp/cchXeloq.s:416 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/cchXeloq.s:564 .text.SystemClock_Config:000000a4 $d + /tmp/cchXeloq.s:570 .rodata.main.str1.4:00000000 $d + /tmp/cchXeloq.s:574 .text.main:00000000 $t + /tmp/cchXeloq.s:580 .text.main:00000000 main + /tmp/cchXeloq.s:645 .text.main:00000048 $d + /tmp/cchXeloq.s:657 .bss.ADC1_buff_circular:00000000 ADC1_buff_circular + /tmp/cchXeloq.s:654 .bss.ADC1_buff_circular:00000000 $d + /tmp/cchXeloq.s:664 .bss.hdma_adc1:00000000 hdma_adc1 + /tmp/cchXeloq.s:661 .bss.hdma_adc1:00000000 $d + /tmp/cchXeloq.s:668 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin @@ -2185,6 +2205,7 @@ HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_Init MX_USB_DEVICE_Init +HAL_ADC_Start_DMA HAL_GPIO_TogglePin HAL_Delay CDC_Transmit_FS diff --git a/build/main.o b/build/main.o index 6a2d05c..476dddc 100644 Binary files a/build/main.o and b/build/main.o differ diff --git a/build/stm32_ADC_F429_0.bin b/build/stm32_ADC_F429_0.bin index b04c376..912aa25 100755 Binary files a/build/stm32_ADC_F429_0.bin and b/build/stm32_ADC_F429_0.bin differ diff --git a/build/stm32_ADC_F429_0.elf b/build/stm32_ADC_F429_0.elf index aa85d79..b6488da 100755 Binary files a/build/stm32_ADC_F429_0.elf and b/build/stm32_ADC_F429_0.elf differ diff --git a/build/stm32_ADC_F429_0.hex b/build/stm32_ADC_F429_0.hex index cec42bb..faff71d 100644 --- a/build/stm32_ADC_F429_0.hex +++ b/build/stm32_ADC_F429_0.hex @@ -1,45 +1,45 @@ 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+:104C80000100052400100105240100010424020292 +:104C9000052406000107058203080010090401002D +:104CA000020A00000007050102400000070581021A +:104CB000400000006B49000807490008ED47000864 +:104CC0000000000015460008714700083947000839 +:104CD000000000000000000000000000F146000895 +:104CE000A946000861460008554600080A06000269 +:084CF00000000040010000007B +:0400000508004B1193 :00000001FF diff --git a/build/stm32_ADC_F429_0.map b/build/stm32_ADC_F429_0.map index 41ffeee..060968c 100644 --- a/build/stm32_ADC_F429_0.map +++ b/build/stm32_ADC_F429_0.map @@ -86,13 +86,9 @@ Discarded input sections .text 0x00000000 0x0 build/main.o .data 0x00000000 0x0 build/main.o .bss 0x00000000 0x0 build/main.o - .bss.ADC1_buff_circular - 0x00000000 0xc8 build/main.o .text 0x00000000 0x0 build/stm32f4xx_it.o .data 0x00000000 0x0 build/stm32f4xx_it.o .bss 0x00000000 0x0 build/stm32f4xx_it.o - .text.HAL_ADC_ConvHalfCpltCallback - 0x00000000 0x10 build/stm32f4xx_it.o .text 0x00000000 0x0 build/stm32f4xx_hal_msp.o .data 0x00000000 0x0 build/stm32f4xx_hal_msp.o .bss 0x00000000 0x0 build/stm32f4xx_hal_msp.o @@ -316,14 +312,10 @@ Discarded input sections .text 0x00000000 0x0 build/stm32f4xx_hal_dma.o .data 0x00000000 0x0 build/stm32f4xx_hal_dma.o .bss 0x00000000 0x0 build/stm32f4xx_hal_dma.o - .text.DMA_SetConfig - 0x00000000 0x2c build/stm32f4xx_hal_dma.o .text.HAL_DMA_DeInit 0x00000000 0x64 build/stm32f4xx_hal_dma.o .text.HAL_DMA_Start 0x00000000 0x48 build/stm32f4xx_hal_dma.o - .text.HAL_DMA_Start_IT - 0x00000000 0x6a build/stm32f4xx_hal_dma.o .text.HAL_DMA_Abort 0x00000000 0x94 build/stm32f4xx_hal_dma.o .text.HAL_DMA_Abort_IT @@ -694,8 +686,6 @@ Discarded input sections 0x00000000 0x150 build/stm32f4xx_hal_adc.o .text.HAL_ADC_Stop_IT 0x00000000 0x4c build/stm32f4xx_hal_adc.o - .text.HAL_ADC_Start_DMA - 0x00000000 0x188 build/stm32f4xx_hal_adc.o .text.HAL_ADC_Stop_DMA 0x00000000 0x78 build/stm32f4xx_hal_adc.o .text.HAL_ADC_GetValue @@ -704,18 +694,10 @@ Discarded input sections 0x00000000 0x2 build/stm32f4xx_hal_adc.o .text.HAL_ADC_ConvHalfCpltCallback 0x00000000 0x2 build/stm32f4xx_hal_adc.o - .text.ADC_DMAHalfConvCplt - 0x00000000 0xa build/stm32f4xx_hal_adc.o .text.HAL_ADC_LevelOutOfWindowCallback 0x00000000 0x2 build/stm32f4xx_hal_adc.o - .text.HAL_ADC_ErrorCallback - 0x00000000 0x2 build/stm32f4xx_hal_adc.o .text.HAL_ADC_IRQHandler 0x00000000 0x142 build/stm32f4xx_hal_adc.o - .text.ADC_DMAError - 0x00000000 0x16 build/stm32f4xx_hal_adc.o - .text.ADC_DMAConvCplt - 0x00000000 0x72 build/stm32f4xx_hal_adc.o .text.HAL_ADC_AnalogWDGConfig 0x00000000 0x76 build/stm32f4xx_hal_adc.o .text.HAL_ADC_GetState @@ -1275,7 +1257,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o 0x08000000 g_pfnVectors 0x080001ac . = ALIGN (0x4) -.text 0x080001ac 0x46dc +.text 0x080001ac 0x49d0 0x080001ac . = ALIGN (0x4) *(.text) .text 0x080001ac 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o @@ -1303,727 +1285,751 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o .text.SystemClock_Config 0x0800078c 0xac build/main.o 0x0800078c SystemClock_Config - .text.main 0x08000838 0x3c build/main.o + .text.main 0x08000838 0x58 build/main.o 0x08000838 main .text.NMI_Handler - 0x08000874 0x2 build/stm32f4xx_it.o - 0x08000874 NMI_Handler + 0x08000890 0x2 build/stm32f4xx_it.o + 0x08000890 NMI_Handler .text.HardFault_Handler - 0x08000876 0x2 build/stm32f4xx_it.o - 0x08000876 HardFault_Handler + 0x08000892 0x2 build/stm32f4xx_it.o + 0x08000892 HardFault_Handler .text.MemManage_Handler - 0x08000878 0x2 build/stm32f4xx_it.o - 0x08000878 MemManage_Handler + 0x08000894 0x2 build/stm32f4xx_it.o + 0x08000894 MemManage_Handler .text.BusFault_Handler - 0x0800087a 0x2 build/stm32f4xx_it.o - 0x0800087a BusFault_Handler + 0x08000896 0x2 build/stm32f4xx_it.o + 0x08000896 BusFault_Handler .text.UsageFault_Handler - 0x0800087c 0x2 build/stm32f4xx_it.o - 0x0800087c UsageFault_Handler + 0x08000898 0x2 build/stm32f4xx_it.o + 0x08000898 UsageFault_Handler .text.SVC_Handler - 0x0800087e 0x2 build/stm32f4xx_it.o - 0x0800087e SVC_Handler + 0x0800089a 0x2 build/stm32f4xx_it.o + 0x0800089a SVC_Handler .text.DebugMon_Handler - 0x08000880 0x2 build/stm32f4xx_it.o - 0x08000880 DebugMon_Handler + 0x0800089c 0x2 build/stm32f4xx_it.o + 0x0800089c DebugMon_Handler .text.PendSV_Handler - 0x08000882 0x2 build/stm32f4xx_it.o - 0x08000882 PendSV_Handler + 0x0800089e 0x2 build/stm32f4xx_it.o + 0x0800089e PendSV_Handler .text.SysTick_Handler - 0x08000884 0x8 build/stm32f4xx_it.o - 0x08000884 SysTick_Handler + 0x080008a0 0x8 build/stm32f4xx_it.o + 0x080008a0 SysTick_Handler .text.DMA2_Stream0_IRQHandler - 0x0800088c 0x10 build/stm32f4xx_it.o - 0x0800088c DMA2_Stream0_IRQHandler + 0x080008a8 0x10 build/stm32f4xx_it.o + 0x080008a8 DMA2_Stream0_IRQHandler .text.OTG_FS_IRQHandler - 0x0800089c 0x10 build/stm32f4xx_it.o - 0x0800089c OTG_FS_IRQHandler + 0x080008b8 0x10 build/stm32f4xx_it.o + 0x080008b8 OTG_FS_IRQHandler + .text.HAL_ADC_ConvCpltCallback + 0x080008c8 0x14 build/stm32f4xx_it.o + 0x080008c8 HAL_ADC_ConvCpltCallback + .text.HAL_ADC_ConvHalfCpltCallback + 0x080008dc 0x10 build/stm32f4xx_it.o + 0x080008dc HAL_ADC_ConvHalfCpltCallback .text.HAL_MspInit - 0x080008ac 0x38 build/stm32f4xx_hal_msp.o - 0x080008ac HAL_MspInit + 0x080008ec 0x38 build/stm32f4xx_hal_msp.o + 0x080008ec HAL_MspInit .text.HAL_ADC_MspInit - 0x080008e4 0xd4 build/stm32f4xx_hal_msp.o - 0x080008e4 HAL_ADC_MspInit + 0x08000924 0xd4 build/stm32f4xx_hal_msp.o + 0x08000924 HAL_ADC_MspInit .text.HAL_RCC_OscConfig - 0x080009b8 0x3f8 build/stm32f4xx_hal_rcc.o - 0x080009b8 HAL_RCC_OscConfig + 0x080009f8 0x3f8 build/stm32f4xx_hal_rcc.o + 0x080009f8 HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x08000db0 0xdc build/stm32f4xx_hal_rcc.o - 0x08000db0 HAL_RCC_GetSysClockFreq + 0x08000df0 0xdc build/stm32f4xx_hal_rcc.o + 0x08000df0 HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x08000e8c 0x160 build/stm32f4xx_hal_rcc.o - 0x08000e8c HAL_RCC_ClockConfig + 0x08000ecc 0x160 build/stm32f4xx_hal_rcc.o + 0x08000ecc HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x08000fec 0xc build/stm32f4xx_hal_rcc.o - 0x08000fec HAL_RCC_GetHCLKFreq + 0x0800102c 0xc build/stm32f4xx_hal_rcc.o + 0x0800102c HAL_RCC_GetHCLKFreq .text.HAL_GPIO_Init - 0x08000ff8 0x208 build/stm32f4xx_hal_gpio.o - 0x08000ff8 HAL_GPIO_Init + 0x08001038 0x208 build/stm32f4xx_hal_gpio.o + 0x08001038 HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x08001200 0xc build/stm32f4xx_hal_gpio.o - 0x08001200 HAL_GPIO_WritePin + 0x08001240 0xc build/stm32f4xx_hal_gpio.o + 0x08001240 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x0800120c 0x12 build/stm32f4xx_hal_gpio.o - 0x0800120c HAL_GPIO_TogglePin - *fill* 0x0800121e 0x2 + 0x0800124c 0x12 build/stm32f4xx_hal_gpio.o + 0x0800124c HAL_GPIO_TogglePin + .text.DMA_SetConfig + 0x0800125e 0x2c build/stm32f4xx_hal_dma.o + *fill* 0x0800128a 0x2 .text.DMA_CalcBaseAndBitshift - 0x08001220 0x3c build/stm32f4xx_hal_dma.o + 0x0800128c 0x3c build/stm32f4xx_hal_dma.o .text.DMA_CheckFifoParam - 0x0800125c 0x8e build/stm32f4xx_hal_dma.o - *fill* 0x080012ea 0x2 + 0x080012c8 0x8e build/stm32f4xx_hal_dma.o + *fill* 0x08001356 0x2 .text.HAL_DMA_Init - 0x080012ec 0xcc build/stm32f4xx_hal_dma.o - 0x080012ec HAL_DMA_Init + 0x08001358 0xcc build/stm32f4xx_hal_dma.o + 0x08001358 HAL_DMA_Init + .text.HAL_DMA_Start_IT + 0x08001424 0x6a build/stm32f4xx_hal_dma.o + 0x08001424 HAL_DMA_Start_IT + *fill* 0x0800148e 0x2 .text.HAL_DMA_IRQHandler - 0x080013b8 0x1dc build/stm32f4xx_hal_dma.o - 0x080013b8 HAL_DMA_IRQHandler + 0x08001490 0x1dc build/stm32f4xx_hal_dma.o + 0x08001490 HAL_DMA_IRQHandler .text.__NVIC_EnableIRQ - 0x08001594 0x1c build/stm32f4xx_hal_cortex.o + 0x0800166c 0x1c build/stm32f4xx_hal_cortex.o .text.__NVIC_SetPriority - 0x080015b0 0x28 build/stm32f4xx_hal_cortex.o + 0x08001688 0x28 build/stm32f4xx_hal_cortex.o .text.NVIC_EncodePriority - 0x080015d8 0x3e build/stm32f4xx_hal_cortex.o - *fill* 0x08001616 0x2 + 0x080016b0 0x3e build/stm32f4xx_hal_cortex.o + *fill* 0x080016ee 0x2 .text.HAL_NVIC_SetPriorityGrouping - 0x08001618 0x24 build/stm32f4xx_hal_cortex.o - 0x08001618 HAL_NVIC_SetPriorityGrouping + 0x080016f0 0x24 build/stm32f4xx_hal_cortex.o + 0x080016f0 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x0800163c 0x20 build/stm32f4xx_hal_cortex.o - 0x0800163c HAL_NVIC_SetPriority + 0x08001714 0x20 build/stm32f4xx_hal_cortex.o + 0x08001714 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x0800165c 0x8 build/stm32f4xx_hal_cortex.o - 0x0800165c HAL_NVIC_EnableIRQ + 0x08001734 0x8 build/stm32f4xx_hal_cortex.o + 0x08001734 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08001664 0x28 build/stm32f4xx_hal_cortex.o - 0x08001664 HAL_SYSTICK_Config + 0x0800173c 0x28 build/stm32f4xx_hal_cortex.o + 0x0800173c HAL_SYSTICK_Config .text.HAL_InitTick - 0x0800168c 0x4c build/stm32f4xx_hal.o - 0x0800168c HAL_InitTick + 0x08001764 0x4c build/stm32f4xx_hal.o + 0x08001764 HAL_InitTick .text.HAL_Init - 0x080016d8 0x34 build/stm32f4xx_hal.o - 0x080016d8 HAL_Init + 0x080017b0 0x34 build/stm32f4xx_hal.o + 0x080017b0 HAL_Init .text.HAL_IncTick - 0x0800170c 0x18 build/stm32f4xx_hal.o - 0x0800170c HAL_IncTick + 0x080017e4 0x18 build/stm32f4xx_hal.o + 0x080017e4 HAL_IncTick .text.HAL_GetTick - 0x08001724 0xc build/stm32f4xx_hal.o - 0x08001724 HAL_GetTick + 0x080017fc 0xc build/stm32f4xx_hal.o + 0x080017fc HAL_GetTick .text.HAL_Delay - 0x08001730 0x28 build/stm32f4xx_hal.o - 0x08001730 HAL_Delay + 0x08001808 0x28 build/stm32f4xx_hal.o + 0x08001808 HAL_Delay .text.SystemInit - 0x08001758 0x14 build/system_stm32f4xx.o - 0x08001758 SystemInit + 0x08001830 0x14 build/system_stm32f4xx.o + 0x08001830 SystemInit .text.MX_USB_DEVICE_Init - 0x0800176c 0x54 build/usb_device.o - 0x0800176c MX_USB_DEVICE_Init + 0x08001844 0x54 build/usb_device.o + 0x08001844 MX_USB_DEVICE_Init .text.USBD_FS_DeviceDescriptor - 0x080017c0 0xc build/usbd_desc.o - 0x080017c0 USBD_FS_DeviceDescriptor + 0x08001898 0xc build/usbd_desc.o + 0x08001898 USBD_FS_DeviceDescriptor .text.USBD_FS_LangIDStrDescriptor - 0x080017cc 0xc build/usbd_desc.o - 0x080017cc USBD_FS_LangIDStrDescriptor + 0x080018a4 0xc build/usbd_desc.o + 0x080018a4 USBD_FS_LangIDStrDescriptor .text.IntToUnicode - 0x080017d8 0x46 build/usbd_desc.o - *fill* 0x0800181e 0x2 + 0x080018b0 0x46 build/usbd_desc.o + *fill* 0x080018f6 0x2 .text.Get_SerialNum - 0x08001820 0x38 build/usbd_desc.o + 0x080018f8 0x38 build/usbd_desc.o .text.USBD_FS_SerialStrDescriptor - 0x08001858 0x14 build/usbd_desc.o - 0x08001858 USBD_FS_SerialStrDescriptor + 0x08001930 0x14 build/usbd_desc.o + 0x08001930 USBD_FS_SerialStrDescriptor .text.USBD_FS_ProductStrDescriptor - 0x0800186c 0x24 build/usbd_desc.o - 0x0800186c USBD_FS_ProductStrDescriptor + 0x08001944 0x24 build/usbd_desc.o + 0x08001944 USBD_FS_ProductStrDescriptor .text.USBD_FS_ManufacturerStrDescriptor - 0x08001890 0x1c build/usbd_desc.o - 0x08001890 USBD_FS_ManufacturerStrDescriptor + 0x08001968 0x1c build/usbd_desc.o + 0x08001968 USBD_FS_ManufacturerStrDescriptor .text.USBD_FS_ConfigStrDescriptor - 0x080018ac 0x24 build/usbd_desc.o - 0x080018ac USBD_FS_ConfigStrDescriptor + 0x08001984 0x24 build/usbd_desc.o + 0x08001984 USBD_FS_ConfigStrDescriptor .text.USBD_FS_InterfaceStrDescriptor - 0x080018d0 0x24 build/usbd_desc.o - 0x080018d0 USBD_FS_InterfaceStrDescriptor + 0x080019a8 0x24 build/usbd_desc.o + 0x080019a8 USBD_FS_InterfaceStrDescriptor .text.CDC_DeInit_FS - 0x080018f4 0x4 build/usbd_cdc_if.o + 0x080019cc 0x4 build/usbd_cdc_if.o .text.CDC_Control_FS - 0x080018f8 0x4 build/usbd_cdc_if.o + 0x080019d0 0x4 build/usbd_cdc_if.o .text.CDC_TransmitCplt_FS - 0x080018fc 0x4 build/usbd_cdc_if.o + 0x080019d4 0x4 build/usbd_cdc_if.o .text.CDC_Receive_FS - 0x08001900 0x1c build/usbd_cdc_if.o + 0x080019d8 0x1c build/usbd_cdc_if.o .text.CDC_Init_FS - 0x0800191c 0x28 build/usbd_cdc_if.o + 0x080019f4 0x28 build/usbd_cdc_if.o .text.CDC_Transmit_FS - 0x08001944 0x2c build/usbd_cdc_if.o - 0x08001944 CDC_Transmit_FS + 0x08001a1c 0x2c build/usbd_cdc_if.o + 0x08001a1c CDC_Transmit_FS .text.HAL_PCD_MspInit - 0x08001970 0x84 build/usbd_conf.o - 0x08001970 HAL_PCD_MspInit + 0x08001a48 0x84 build/usbd_conf.o + 0x08001a48 HAL_PCD_MspInit .text.HAL_PCD_SetupStageCallback - 0x080019f4 0x10 build/usbd_conf.o - 0x080019f4 HAL_PCD_SetupStageCallback + 0x08001acc 0x10 build/usbd_conf.o + 0x08001acc HAL_PCD_SetupStageCallback .text.HAL_PCD_DataOutStageCallback - 0x08001a04 0x18 build/usbd_conf.o - 0x08001a04 HAL_PCD_DataOutStageCallback + 0x08001adc 0x18 build/usbd_conf.o + 0x08001adc HAL_PCD_DataOutStageCallback .text.HAL_PCD_DataInStageCallback - 0x08001a1c 0x16 build/usbd_conf.o - 0x08001a1c HAL_PCD_DataInStageCallback + 0x08001af4 0x16 build/usbd_conf.o + 0x08001af4 HAL_PCD_DataInStageCallback .text.HAL_PCD_SOFCallback - 0x08001a32 0xc build/usbd_conf.o - 0x08001a32 HAL_PCD_SOFCallback + 0x08001b0a 0xc build/usbd_conf.o + 0x08001b0a HAL_PCD_SOFCallback .text.HAL_PCD_ResetCallback - 0x08001a3e 0x28 build/usbd_conf.o - 0x08001a3e HAL_PCD_ResetCallback - *fill* 0x08001a66 0x2 + 0x08001b16 0x28 build/usbd_conf.o + 0x08001b16 HAL_PCD_ResetCallback + *fill* 0x08001b3e 0x2 .text.HAL_PCD_SuspendCallback - 0x08001a68 0x30 build/usbd_conf.o - 0x08001a68 HAL_PCD_SuspendCallback + 0x08001b40 0x30 build/usbd_conf.o + 0x08001b40 HAL_PCD_SuspendCallback .text.HAL_PCD_ResumeCallback - 0x08001a98 0xc build/usbd_conf.o - 0x08001a98 HAL_PCD_ResumeCallback + 0x08001b70 0xc build/usbd_conf.o + 0x08001b70 HAL_PCD_ResumeCallback .text.HAL_PCD_ISOOUTIncompleteCallback - 0x08001aa4 0xc build/usbd_conf.o - 0x08001aa4 HAL_PCD_ISOOUTIncompleteCallback + 0x08001b7c 0xc build/usbd_conf.o + 0x08001b7c HAL_PCD_ISOOUTIncompleteCallback .text.HAL_PCD_ISOINIncompleteCallback - 0x08001ab0 0xc build/usbd_conf.o - 0x08001ab0 HAL_PCD_ISOINIncompleteCallback + 0x08001b88 0xc build/usbd_conf.o + 0x08001b88 HAL_PCD_ISOINIncompleteCallback .text.HAL_PCD_ConnectCallback - 0x08001abc 0xc build/usbd_conf.o - 0x08001abc HAL_PCD_ConnectCallback + 0x08001b94 0xc build/usbd_conf.o + 0x08001b94 HAL_PCD_ConnectCallback .text.HAL_PCD_DisconnectCallback - 0x08001ac8 0xc build/usbd_conf.o - 0x08001ac8 HAL_PCD_DisconnectCallback + 0x08001ba0 0xc build/usbd_conf.o + 0x08001ba0 HAL_PCD_DisconnectCallback .text.USBD_LL_Init - 0x08001ad4 0x68 build/usbd_conf.o - 0x08001ad4 USBD_LL_Init + 0x08001bac 0x68 build/usbd_conf.o + 0x08001bac USBD_LL_Init .text.USBD_LL_IsStallEP - 0x08001b3c 0x2c build/usbd_conf.o - 0x08001b3c USBD_LL_IsStallEP + 0x08001c14 0x2c build/usbd_conf.o + 0x08001c14 USBD_LL_IsStallEP .text.USBD_LL_GetRxDataSize - 0x08001b68 0xc build/usbd_conf.o - 0x08001b68 USBD_LL_GetRxDataSize + 0x08001c40 0xc build/usbd_conf.o + 0x08001c40 USBD_LL_GetRxDataSize .text.USBD_static_malloc - 0x08001b74 0x8 build/usbd_conf.o - 0x08001b74 USBD_static_malloc + 0x08001c4c 0x8 build/usbd_conf.o + 0x08001c4c USBD_static_malloc .text.USBD_static_free - 0x08001b7c 0x2 build/usbd_conf.o - 0x08001b7c USBD_static_free + 0x08001c54 0x2 build/usbd_conf.o + 0x08001c54 USBD_static_free .text.USBD_Get_USB_Status - 0x08001b7e 0x14 build/usbd_conf.o - 0x08001b7e USBD_Get_USB_Status + 0x08001c56 0x14 build/usbd_conf.o + 0x08001c56 USBD_Get_USB_Status .text.USBD_LL_Start - 0x08001b92 0x10 build/usbd_conf.o - 0x08001b92 USBD_LL_Start + 0x08001c6a 0x10 build/usbd_conf.o + 0x08001c6a USBD_LL_Start .text.USBD_LL_OpenEP - 0x08001ba2 0x16 build/usbd_conf.o - 0x08001ba2 USBD_LL_OpenEP + 0x08001c7a 0x16 build/usbd_conf.o + 0x08001c7a USBD_LL_OpenEP .text.USBD_LL_CloseEP - 0x08001bb8 0x10 build/usbd_conf.o - 0x08001bb8 USBD_LL_CloseEP + 0x08001c90 0x10 build/usbd_conf.o + 0x08001c90 USBD_LL_CloseEP .text.USBD_LL_StallEP - 0x08001bc8 0x10 build/usbd_conf.o - 0x08001bc8 USBD_LL_StallEP + 0x08001ca0 0x10 build/usbd_conf.o + 0x08001ca0 USBD_LL_StallEP .text.USBD_LL_ClearStallEP - 0x08001bd8 0x10 build/usbd_conf.o - 0x08001bd8 USBD_LL_ClearStallEP + 0x08001cb0 0x10 build/usbd_conf.o + 0x08001cb0 USBD_LL_ClearStallEP .text.USBD_LL_SetUSBAddress - 0x08001be8 0x10 build/usbd_conf.o - 0x08001be8 USBD_LL_SetUSBAddress + 0x08001cc0 0x10 build/usbd_conf.o + 0x08001cc0 USBD_LL_SetUSBAddress .text.USBD_LL_Transmit - 0x08001bf8 0x10 build/usbd_conf.o - 0x08001bf8 USBD_LL_Transmit + 0x08001cd0 0x10 build/usbd_conf.o + 0x08001cd0 USBD_LL_Transmit .text.USBD_LL_PrepareReceive - 0x08001c08 0x10 build/usbd_conf.o - 0x08001c08 USBD_LL_PrepareReceive + 0x08001ce0 0x10 build/usbd_conf.o + 0x08001ce0 USBD_LL_PrepareReceive .text.PCD_WriteEmptyTxFifo - 0x08001c18 0xd0 build/stm32f4xx_hal_pcd.o + 0x08001cf0 0xd0 build/stm32f4xx_hal_pcd.o .text.HAL_PCD_Init - 0x08001ce8 0x102 build/stm32f4xx_hal_pcd.o - 0x08001ce8 HAL_PCD_Init + 0x08001dc0 0x102 build/stm32f4xx_hal_pcd.o + 0x08001dc0 HAL_PCD_Init .text.HAL_PCD_Start - 0x08001dea 0x44 build/stm32f4xx_hal_pcd.o - 0x08001dea HAL_PCD_Start - *fill* 0x08001e2e 0x2 + 0x08001ec2 0x44 build/stm32f4xx_hal_pcd.o + 0x08001ec2 HAL_PCD_Start + *fill* 0x08001f06 0x2 .text.PCD_EP_OutXfrComplete_int - 0x08001e30 0x104 build/stm32f4xx_hal_pcd.o + 0x08001f08 0x104 build/stm32f4xx_hal_pcd.o .text.PCD_EP_OutSetupPacket_int - 0x08001f34 0x50 build/stm32f4xx_hal_pcd.o + 0x0800200c 0x50 build/stm32f4xx_hal_pcd.o .text.HAL_PCD_SetAddress - 0x08001f84 0x26 build/stm32f4xx_hal_pcd.o - 0x08001f84 HAL_PCD_SetAddress + 0x0800205c 0x26 build/stm32f4xx_hal_pcd.o + 0x0800205c HAL_PCD_SetAddress .text.HAL_PCD_EP_Open - 0x08001faa 0x8c build/stm32f4xx_hal_pcd.o - 0x08001faa HAL_PCD_EP_Open + 0x08002082 0x8c build/stm32f4xx_hal_pcd.o + 0x08002082 HAL_PCD_EP_Open .text.HAL_PCD_EP_Close - 0x08002036 0x70 build/stm32f4xx_hal_pcd.o - 0x08002036 HAL_PCD_EP_Close + 0x0800210e 0x70 build/stm32f4xx_hal_pcd.o + 0x0800210e HAL_PCD_EP_Close .text.HAL_PCD_EP_Receive - 0x080020a6 0x4a build/stm32f4xx_hal_pcd.o - 0x080020a6 HAL_PCD_EP_Receive + 0x0800217e 0x4a build/stm32f4xx_hal_pcd.o + 0x0800217e HAL_PCD_EP_Receive .text.HAL_PCD_EP_GetRxCount - 0x080020f0 0x12 build/stm32f4xx_hal_pcd.o - 0x080020f0 HAL_PCD_EP_GetRxCount + 0x080021c8 0x12 build/stm32f4xx_hal_pcd.o + 0x080021c8 HAL_PCD_EP_GetRxCount .text.HAL_PCD_EP_Transmit - 0x08002102 0x4a build/stm32f4xx_hal_pcd.o - 0x08002102 HAL_PCD_EP_Transmit + 0x080021da 0x4a build/stm32f4xx_hal_pcd.o + 0x080021da HAL_PCD_EP_Transmit .text.HAL_PCD_EP_SetStall - 0x0800214c 0x86 build/stm32f4xx_hal_pcd.o - 0x0800214c HAL_PCD_EP_SetStall + 0x08002224 0x86 build/stm32f4xx_hal_pcd.o + 0x08002224 HAL_PCD_EP_SetStall .text.HAL_PCD_EP_ClrStall - 0x080021d2 0x74 build/stm32f4xx_hal_pcd.o - 0x080021d2 HAL_PCD_EP_ClrStall + 0x080022aa 0x74 build/stm32f4xx_hal_pcd.o + 0x080022aa HAL_PCD_EP_ClrStall .text.HAL_PCD_EP_Abort - 0x08002246 0x34 build/stm32f4xx_hal_pcd.o - 0x08002246 HAL_PCD_EP_Abort + 0x0800231e 0x34 build/stm32f4xx_hal_pcd.o + 0x0800231e HAL_PCD_EP_Abort .text.HAL_PCD_IRQHandler - 0x0800227a 0x5be build/stm32f4xx_hal_pcd.o - 0x0800227a HAL_PCD_IRQHandler + 0x08002352 0x5be build/stm32f4xx_hal_pcd.o + 0x08002352 HAL_PCD_IRQHandler .text.HAL_PCDEx_SetTxFiFo - 0x08002838 0x4c build/stm32f4xx_hal_pcd_ex.o - 0x08002838 HAL_PCDEx_SetTxFiFo + 0x08002910 0x4c build/stm32f4xx_hal_pcd_ex.o + 0x08002910 HAL_PCDEx_SetTxFiFo .text.HAL_PCDEx_SetRxFiFo - 0x08002884 0x8 build/stm32f4xx_hal_pcd_ex.o - 0x08002884 HAL_PCDEx_SetRxFiFo + 0x0800295c 0x8 build/stm32f4xx_hal_pcd_ex.o + 0x0800295c HAL_PCDEx_SetRxFiFo .text.HAL_PCDEx_LPM_Callback - 0x0800288c 0x2 build/stm32f4xx_hal_pcd_ex.o - 0x0800288c HAL_PCDEx_LPM_Callback + 0x08002964 0x2 build/stm32f4xx_hal_pcd_ex.o + 0x08002964 HAL_PCDEx_LPM_Callback .text.USB_CoreReset - 0x0800288e 0x58 build/stm32f4xx_ll_usb.o + 0x08002966 0x58 build/stm32f4xx_ll_usb.o .text.USB_CoreInit - 0x080028e6 0x92 build/stm32f4xx_ll_usb.o - 0x080028e6 USB_CoreInit + 0x080029be 0x92 build/stm32f4xx_ll_usb.o + 0x080029be USB_CoreInit .text.USB_SetTurnaroundTime - 0x08002978 0xe4 build/stm32f4xx_ll_usb.o - 0x08002978 USB_SetTurnaroundTime + 0x08002a50 0xe4 build/stm32f4xx_ll_usb.o + 0x08002a50 USB_SetTurnaroundTime .text.USB_EnableGlobalInt - 0x08002a5c 0xc build/stm32f4xx_ll_usb.o - 0x08002a5c USB_EnableGlobalInt + 0x08002b34 0xc build/stm32f4xx_ll_usb.o + 0x08002b34 USB_EnableGlobalInt .text.USB_DisableGlobalInt - 0x08002a68 0xc build/stm32f4xx_ll_usb.o - 0x08002a68 USB_DisableGlobalInt + 0x08002b40 0xc build/stm32f4xx_ll_usb.o + 0x08002b40 USB_DisableGlobalInt .text.USB_FlushTxFifo - 0x08002a74 0x4a build/stm32f4xx_ll_usb.o - 0x08002a74 USB_FlushTxFifo + 0x08002b4c 0x4a build/stm32f4xx_ll_usb.o + 0x08002b4c USB_FlushTxFifo .text.USB_FlushRxFifo - 0x08002abe 0x46 build/stm32f4xx_ll_usb.o - 0x08002abe USB_FlushRxFifo + 0x08002b96 0x46 build/stm32f4xx_ll_usb.o + 0x08002b96 USB_FlushRxFifo .text.USB_SetDevSpeed - 0x08002b04 0xe build/stm32f4xx_ll_usb.o - 0x08002b04 USB_SetDevSpeed - *fill* 0x08002b12 0x2 + 0x08002bdc 0xe build/stm32f4xx_ll_usb.o + 0x08002bdc USB_SetDevSpeed + *fill* 0x08002bea 0x2 .text.USB_DevInit - 0x08002b14 0x194 build/stm32f4xx_ll_usb.o - 0x08002b14 USB_DevInit + 0x08002bec 0x194 build/stm32f4xx_ll_usb.o + 0x08002bec USB_DevInit .text.USB_GetDevSpeed - 0x08002ca8 0x22 build/stm32f4xx_ll_usb.o - 0x08002ca8 USB_GetDevSpeed + 0x08002d80 0x22 build/stm32f4xx_ll_usb.o + 0x08002d80 USB_GetDevSpeed .text.USB_ActivateEndpoint - 0x08002cca 0x9a build/stm32f4xx_ll_usb.o - 0x08002cca USB_ActivateEndpoint + 0x08002da2 0x9a build/stm32f4xx_ll_usb.o + 0x08002da2 USB_ActivateEndpoint .text.USB_DeactivateEndpoint - 0x08002d64 0xe0 build/stm32f4xx_ll_usb.o - 0x08002d64 USB_DeactivateEndpoint + 0x08002e3c 0xe0 build/stm32f4xx_ll_usb.o + 0x08002e3c USB_DeactivateEndpoint .text.USB_EPStopXfer - 0x08002e44 0xbe build/stm32f4xx_ll_usb.o - 0x08002e44 USB_EPStopXfer + 0x08002f1c 0xbe build/stm32f4xx_ll_usb.o + 0x08002f1c USB_EPStopXfer .text.USB_WritePacket - 0x08002f02 0x2e build/stm32f4xx_ll_usb.o - 0x08002f02 USB_WritePacket + 0x08002fda 0x2e build/stm32f4xx_ll_usb.o + 0x08002fda USB_WritePacket .text.USB_EPStartXfer - 0x08002f30 0x244 build/stm32f4xx_ll_usb.o - 0x08002f30 USB_EPStartXfer + 0x08003008 0x244 build/stm32f4xx_ll_usb.o + 0x08003008 USB_EPStartXfer .text.USB_ReadPacket - 0x08003174 0x46 build/stm32f4xx_ll_usb.o - 0x08003174 USB_ReadPacket + 0x0800324c 0x46 build/stm32f4xx_ll_usb.o + 0x0800324c USB_ReadPacket .text.USB_EPSetStall - 0x080031ba 0x5a build/stm32f4xx_ll_usb.o - 0x080031ba USB_EPSetStall + 0x08003292 0x5a build/stm32f4xx_ll_usb.o + 0x08003292 USB_EPSetStall .text.USB_EPClearStall - 0x08003214 0x5c build/stm32f4xx_ll_usb.o - 0x08003214 USB_EPClearStall + 0x080032ec 0x5c build/stm32f4xx_ll_usb.o + 0x080032ec USB_EPClearStall .text.USB_SetDevAddress - 0x08003270 0x20 build/stm32f4xx_ll_usb.o - 0x08003270 USB_SetDevAddress + 0x08003348 0x20 build/stm32f4xx_ll_usb.o + 0x08003348 USB_SetDevAddress .text.USB_DevConnect - 0x08003290 0x1c build/stm32f4xx_ll_usb.o - 0x08003290 USB_DevConnect + 0x08003368 0x1c build/stm32f4xx_ll_usb.o + 0x08003368 USB_DevConnect .text.USB_DevDisconnect - 0x080032ac 0x1c build/stm32f4xx_ll_usb.o - 0x080032ac USB_DevDisconnect + 0x08003384 0x1c build/stm32f4xx_ll_usb.o + 0x08003384 USB_DevDisconnect .text.USB_ReadInterrupts - 0x080032c8 0x8 build/stm32f4xx_ll_usb.o - 0x080032c8 USB_ReadInterrupts + 0x080033a0 0x8 build/stm32f4xx_ll_usb.o + 0x080033a0 USB_ReadInterrupts .text.USB_ReadDevAllOutEpInterrupt - 0x080032d0 0x10 build/stm32f4xx_ll_usb.o - 0x080032d0 USB_ReadDevAllOutEpInterrupt + 0x080033a8 0x10 build/stm32f4xx_ll_usb.o + 0x080033a8 USB_ReadDevAllOutEpInterrupt .text.USB_ReadDevAllInEpInterrupt - 0x080032e0 0x10 build/stm32f4xx_ll_usb.o - 0x080032e0 USB_ReadDevAllInEpInterrupt + 0x080033b8 0x10 build/stm32f4xx_ll_usb.o + 0x080033b8 USB_ReadDevAllInEpInterrupt .text.USB_ReadDevOutEPInterrupt - 0x080032f0 0x12 build/stm32f4xx_ll_usb.o - 0x080032f0 USB_ReadDevOutEPInterrupt + 0x080033c8 0x12 build/stm32f4xx_ll_usb.o + 0x080033c8 USB_ReadDevOutEPInterrupt .text.USB_ReadDevInEPInterrupt - 0x08003302 0x24 build/stm32f4xx_ll_usb.o - 0x08003302 USB_ReadDevInEPInterrupt + 0x080033da 0x24 build/stm32f4xx_ll_usb.o + 0x080033da USB_ReadDevInEPInterrupt .text.USB_GetMode - 0x08003326 0x8 build/stm32f4xx_ll_usb.o - 0x08003326 USB_GetMode + 0x080033fe 0x8 build/stm32f4xx_ll_usb.o + 0x080033fe USB_GetMode .text.USB_SetCurrentMode - 0x0800332e 0x62 build/stm32f4xx_ll_usb.o - 0x0800332e USB_SetCurrentMode + 0x08003406 0x62 build/stm32f4xx_ll_usb.o + 0x08003406 USB_SetCurrentMode .text.USB_ActivateSetup - 0x08003390 0x1c build/stm32f4xx_ll_usb.o - 0x08003390 USB_ActivateSetup + 0x08003468 0x1c build/stm32f4xx_ll_usb.o + 0x08003468 USB_ActivateSetup .text.USB_EP0_OutStart - 0x080033ac 0x60 build/stm32f4xx_ll_usb.o - 0x080033ac USB_EP0_OutStart + 0x08003484 0x60 build/stm32f4xx_ll_usb.o + 0x08003484 USB_EP0_OutStart .text.ADC_Init - 0x0800340c 0x134 build/stm32f4xx_hal_adc.o + 0x080034e4 0x134 build/stm32f4xx_hal_adc.o .text.HAL_ADC_Init - 0x08003540 0x56 build/stm32f4xx_hal_adc.o - 0x08003540 HAL_ADC_Init - *fill* 0x08003596 0x2 + 0x08003618 0x56 build/stm32f4xx_hal_adc.o + 0x08003618 HAL_ADC_Init + *fill* 0x0800366e 0x2 + .text.HAL_ADC_Start_DMA + 0x08003670 0x188 build/stm32f4xx_hal_adc.o + 0x08003670 HAL_ADC_Start_DMA + .text.ADC_DMAHalfConvCplt + 0x080037f8 0xa build/stm32f4xx_hal_adc.o + .text.HAL_ADC_ErrorCallback + 0x08003802 0x2 build/stm32f4xx_hal_adc.o + 0x08003802 HAL_ADC_ErrorCallback + .text.ADC_DMAError + 0x08003804 0x16 build/stm32f4xx_hal_adc.o + .text.ADC_DMAConvCplt + 0x0800381a 0x72 build/stm32f4xx_hal_adc.o .text.HAL_ADC_ConfigChannel - 0x08003598 0x1ac build/stm32f4xx_hal_adc.o - 0x08003598 HAL_ADC_ConfigChannel + 0x0800388c 0x1ac build/stm32f4xx_hal_adc.o + 0x0800388c HAL_ADC_ConfigChannel .text.USBD_Init - 0x08003744 0x2e build/usbd_core.o - 0x08003744 USBD_Init + 0x08003a38 0x2e build/usbd_core.o + 0x08003a38 USBD_Init .text.USBD_RegisterClass - 0x08003772 0x34 build/usbd_core.o - 0x08003772 USBD_RegisterClass + 0x08003a66 0x34 build/usbd_core.o + 0x08003a66 USBD_RegisterClass .text.USBD_Start - 0x080037a6 0x8 build/usbd_core.o - 0x080037a6 USBD_Start + 0x08003a9a 0x8 build/usbd_core.o + 0x08003a9a USBD_Start .text.USBD_SetClassConfig - 0x080037ae 0x12 build/usbd_core.o - 0x080037ae USBD_SetClassConfig + 0x08003aa2 0x12 build/usbd_core.o + 0x08003aa2 USBD_SetClassConfig .text.USBD_ClrClassConfig - 0x080037c0 0x12 build/usbd_core.o - 0x080037c0 USBD_ClrClassConfig + 0x08003ab4 0x12 build/usbd_core.o + 0x08003ab4 USBD_ClrClassConfig .text.USBD_LL_SetupStage - 0x080037d2 0x58 build/usbd_core.o - 0x080037d2 USBD_LL_SetupStage + 0x08003ac6 0x58 build/usbd_core.o + 0x08003ac6 USBD_LL_SetupStage .text.USBD_LL_Reset - 0x0800382a 0x66 build/usbd_core.o - 0x0800382a USBD_LL_Reset + 0x08003b1e 0x66 build/usbd_core.o + 0x08003b1e USBD_LL_Reset .text.USBD_LL_SetSpeed - 0x08003890 0x6 build/usbd_core.o - 0x08003890 USBD_LL_SetSpeed + 0x08003b84 0x6 build/usbd_core.o + 0x08003b84 USBD_LL_SetSpeed .text.USBD_LL_Suspend - 0x08003896 0x1e build/usbd_core.o - 0x08003896 USBD_LL_Suspend + 0x08003b8a 0x1e build/usbd_core.o + 0x08003b8a USBD_LL_Suspend .text.USBD_LL_Resume - 0x080038b4 0x1a build/usbd_core.o - 0x080038b4 USBD_LL_Resume + 0x08003ba8 0x1a build/usbd_core.o + 0x08003ba8 USBD_LL_Resume .text.USBD_LL_SOF - 0x080038ce 0x22 build/usbd_core.o - 0x080038ce USBD_LL_SOF + 0x08003bc2 0x22 build/usbd_core.o + 0x08003bc2 USBD_LL_SOF .text.USBD_LL_IsoINIncomplete - 0x080038f0 0x2e build/usbd_core.o - 0x080038f0 USBD_LL_IsoINIncomplete + 0x08003be4 0x2e build/usbd_core.o + 0x08003be4 USBD_LL_IsoINIncomplete .text.USBD_LL_IsoOUTIncomplete - 0x0800391e 0x2e build/usbd_core.o - 0x0800391e USBD_LL_IsoOUTIncomplete + 0x08003c12 0x2e build/usbd_core.o + 0x08003c12 USBD_LL_IsoOUTIncomplete .text.USBD_LL_DevConnected - 0x0800394c 0x4 build/usbd_core.o - 0x0800394c USBD_LL_DevConnected + 0x08003c40 0x4 build/usbd_core.o + 0x08003c40 USBD_LL_DevConnected .text.USBD_LL_DevDisconnected - 0x08003950 0x20 build/usbd_core.o - 0x08003950 USBD_LL_DevDisconnected + 0x08003c44 0x20 build/usbd_core.o + 0x08003c44 USBD_LL_DevDisconnected .text.USBD_CoreFindIF - 0x08003970 0x4 build/usbd_core.o - 0x08003970 USBD_CoreFindIF + 0x08003c64 0x4 build/usbd_core.o + 0x08003c64 USBD_CoreFindIF .text.USBD_CoreFindEP - 0x08003974 0x4 build/usbd_core.o - 0x08003974 USBD_CoreFindEP + 0x08003c68 0x4 build/usbd_core.o + 0x08003c68 USBD_CoreFindEP .text.USBD_LL_DataOutStage - 0x08003978 0xca build/usbd_core.o - 0x08003978 USBD_LL_DataOutStage + 0x08003c6c 0xca build/usbd_core.o + 0x08003c6c USBD_LL_DataOutStage .text.USBD_LL_DataInStage - 0x08003a42 0xd8 build/usbd_core.o - 0x08003a42 USBD_LL_DataInStage + 0x08003d36 0xd8 build/usbd_core.o + 0x08003d36 USBD_LL_DataInStage .text.USBD_GetNextDesc - 0x08003b1a 0xe build/usbd_core.o - 0x08003b1a USBD_GetNextDesc + 0x08003e0e 0xe build/usbd_core.o + 0x08003e0e USBD_GetNextDesc .text.USBD_GetEpDesc - 0x08003b28 0x3e build/usbd_core.o - 0x08003b28 USBD_GetEpDesc + 0x08003e1c 0x3e build/usbd_core.o + 0x08003e1c USBD_GetEpDesc .text.USBD_GetLen - 0x08003b66 0x14 build/usbd_ctlreq.o + 0x08003e5a 0x14 build/usbd_ctlreq.o .text.USBD_ParseSetupRequest - 0x08003b7a 0x28 build/usbd_ctlreq.o - 0x08003b7a USBD_ParseSetupRequest + 0x08003e6e 0x28 build/usbd_ctlreq.o + 0x08003e6e USBD_ParseSetupRequest .text.USBD_CtlError - 0x08003ba2 0x14 build/usbd_ctlreq.o - 0x08003ba2 USBD_CtlError + 0x08003e96 0x14 build/usbd_ctlreq.o + 0x08003e96 USBD_CtlError .text.USBD_GetDescriptor - 0x08003bb6 0x18a build/usbd_ctlreq.o + 0x08003eaa 0x18a build/usbd_ctlreq.o .text.USBD_SetAddress - 0x08003d40 0x50 build/usbd_ctlreq.o + 0x08004034 0x50 build/usbd_ctlreq.o .text.USBD_SetConfig - 0x08003d90 0xcc build/usbd_ctlreq.o + 0x08004084 0xcc build/usbd_ctlreq.o .text.USBD_GetConfig - 0x08003e5c 0x40 build/usbd_ctlreq.o + 0x08004150 0x40 build/usbd_ctlreq.o .text.USBD_GetStatus - 0x08003e9c 0x38 build/usbd_ctlreq.o + 0x08004190 0x38 build/usbd_ctlreq.o .text.USBD_SetFeature - 0x08003ed4 0x2a build/usbd_ctlreq.o + 0x080041c8 0x2a build/usbd_ctlreq.o .text.USBD_ClrFeature - 0x08003efe 0x26 build/usbd_ctlreq.o + 0x080041f2 0x26 build/usbd_ctlreq.o .text.USBD_StdDevReq - 0x08003f24 0x76 build/usbd_ctlreq.o - 0x08003f24 USBD_StdDevReq + 0x08004218 0x76 build/usbd_ctlreq.o + 0x08004218 USBD_StdDevReq .text.USBD_StdItfReq - 0x08003f9a 0x84 build/usbd_ctlreq.o - 0x08003f9a USBD_StdItfReq + 0x0800428e 0x84 build/usbd_ctlreq.o + 0x0800428e USBD_StdItfReq .text.USBD_StdEPReq - 0x0800401e 0x232 build/usbd_ctlreq.o - 0x0800401e USBD_StdEPReq + 0x08004312 0x232 build/usbd_ctlreq.o + 0x08004312 USBD_StdEPReq .text.USBD_GetString - 0x08004250 0x46 build/usbd_ctlreq.o - 0x08004250 USBD_GetString + 0x08004544 0x46 build/usbd_ctlreq.o + 0x08004544 USBD_GetString .text.USBD_CtlSendData - 0x08004296 0x1c build/usbd_ioreq.o - 0x08004296 USBD_CtlSendData + 0x0800458a 0x1c build/usbd_ioreq.o + 0x0800458a USBD_CtlSendData .text.USBD_CtlContinueSendData - 0x080042b2 0x10 build/usbd_ioreq.o - 0x080042b2 USBD_CtlContinueSendData + 0x080045a6 0x10 build/usbd_ioreq.o + 0x080045a6 USBD_CtlContinueSendData .text.USBD_CtlPrepareRx - 0x080042c2 0x22 build/usbd_ioreq.o - 0x080042c2 USBD_CtlPrepareRx + 0x080045b6 0x22 build/usbd_ioreq.o + 0x080045b6 USBD_CtlPrepareRx .text.USBD_CtlContinueRx - 0x080042e4 0x10 build/usbd_ioreq.o - 0x080042e4 USBD_CtlContinueRx + 0x080045d8 0x10 build/usbd_ioreq.o + 0x080045d8 USBD_CtlContinueRx .text.USBD_CtlSendStatus - 0x080042f4 0x16 build/usbd_ioreq.o - 0x080042f4 USBD_CtlSendStatus + 0x080045e8 0x16 build/usbd_ioreq.o + 0x080045e8 USBD_CtlSendStatus .text.USBD_CtlReceiveStatus - 0x0800430a 0x16 build/usbd_ioreq.o - 0x0800430a USBD_CtlReceiveStatus + 0x080045fe 0x16 build/usbd_ioreq.o + 0x080045fe USBD_CtlReceiveStatus .text.USBD_CDC_EP0_RxReady - 0x08004320 0x40 build/usbd_cdc.o + 0x08004614 0x40 build/usbd_cdc.o .text.USBD_CDC_GetDeviceQualifierDescriptor - 0x08004360 0xc build/usbd_cdc.o - 0x08004360 USBD_CDC_GetDeviceQualifierDescriptor + 0x08004654 0xc build/usbd_cdc.o + 0x08004654 USBD_CDC_GetDeviceQualifierDescriptor .text.USBD_CDC_GetOtherSpeedCfgDesc - 0x0800436c 0x48 build/usbd_cdc.o + 0x08004660 0x48 build/usbd_cdc.o .text.USBD_CDC_GetFSCfgDesc - 0x080043b4 0x48 build/usbd_cdc.o + 0x080046a8 0x48 build/usbd_cdc.o .text.USBD_CDC_GetHSCfgDesc - 0x080043fc 0x48 build/usbd_cdc.o + 0x080046f0 0x48 build/usbd_cdc.o .text.USBD_CDC_DataOut - 0x08004444 0x38 build/usbd_cdc.o + 0x08004738 0x38 build/usbd_cdc.o .text.USBD_CDC_DataIn - 0x0800447c 0x7c build/usbd_cdc.o + 0x08004770 0x7c build/usbd_cdc.o .text.USBD_CDC_Setup - 0x080044f8 0x11a build/usbd_cdc.o + 0x080047ec 0x11a build/usbd_cdc.o .text.USBD_CDC_DeInit - 0x08004612 0x64 build/usbd_cdc.o + 0x08004906 0x64 build/usbd_cdc.o .text.USBD_CDC_Init - 0x08004676 0xee build/usbd_cdc.o + 0x0800496a 0xee build/usbd_cdc.o .text.USBD_CDC_RegisterInterface - 0x08004764 0x16 build/usbd_cdc.o - 0x08004764 USBD_CDC_RegisterInterface + 0x08004a58 0x16 build/usbd_cdc.o + 0x08004a58 USBD_CDC_RegisterInterface .text.USBD_CDC_SetTxBuffer - 0x0800477a 0x1c build/usbd_cdc.o - 0x0800477a USBD_CDC_SetTxBuffer + 0x08004a6e 0x1c build/usbd_cdc.o + 0x08004a6e USBD_CDC_SetTxBuffer .text.USBD_CDC_SetRxBuffer - 0x08004796 0x18 build/usbd_cdc.o - 0x08004796 USBD_CDC_SetRxBuffer + 0x08004a8a 0x18 build/usbd_cdc.o + 0x08004a8a USBD_CDC_SetRxBuffer .text.USBD_CDC_TransmitPacket - 0x080047ae 0x36 build/usbd_cdc.o - 0x080047ae USBD_CDC_TransmitPacket + 0x08004aa2 0x36 build/usbd_cdc.o + 0x08004aa2 USBD_CDC_TransmitPacket .text.USBD_CDC_ReceivePacket - 0x080047e4 0x38 build/usbd_cdc.o - 0x080047e4 USBD_CDC_ReceivePacket + 0x08004ad8 0x38 build/usbd_cdc.o + 0x08004ad8 USBD_CDC_ReceivePacket .text.Reset_Handler - 0x0800481c 0x50 build/startup_stm32f429xx.o - 0x0800481c Reset_Handler + 0x08004b10 0x50 build/startup_stm32f429xx.o + 0x08004b10 Reset_Handler .text.Default_Handler - 0x0800486c 0x2 build/startup_stm32f429xx.o - 0x0800486c RTC_Alarm_IRQHandler - 0x0800486c HASH_RNG_IRQHandler - 0x0800486c EXTI2_IRQHandler - 0x0800486c TIM8_CC_IRQHandler - 0x0800486c UART8_IRQHandler - 0x0800486c SPI4_IRQHandler - 0x0800486c TIM1_CC_IRQHandler - 0x0800486c DMA2_Stream5_IRQHandler - 0x0800486c DMA1_Stream5_IRQHandler - 0x0800486c PVD_IRQHandler - 0x0800486c SDIO_IRQHandler - 0x0800486c TAMP_STAMP_IRQHandler - 0x0800486c CAN2_RX1_IRQHandler - 0x0800486c EXTI3_IRQHandler - 0x0800486c TIM8_TRG_COM_TIM14_IRQHandler - 0x0800486c TIM1_UP_TIM10_IRQHandler - 0x0800486c TIM8_UP_TIM13_IRQHandler - 0x0800486c I2C3_ER_IRQHandler - 0x0800486c EXTI0_IRQHandler - 0x0800486c I2C2_EV_IRQHandler - 0x0800486c DMA1_Stream2_IRQHandler - 0x0800486c CAN1_RX0_IRQHandler - 0x0800486c FPU_IRQHandler - 0x0800486c OTG_HS_WKUP_IRQHandler - 0x0800486c LTDC_ER_IRQHandler - 0x0800486c CAN2_SCE_IRQHandler - 0x0800486c DMA2_Stream2_IRQHandler - 0x0800486c SPI1_IRQHandler - 0x0800486c TIM6_DAC_IRQHandler - 0x0800486c TIM1_BRK_TIM9_IRQHandler - 0x0800486c DCMI_IRQHandler - 0x0800486c CAN2_RX0_IRQHandler - 0x0800486c DMA2_Stream3_IRQHandler - 0x0800486c USART6_IRQHandler - 0x0800486c USART3_IRQHandler - 0x0800486c CAN1_RX1_IRQHandler - 0x0800486c UART5_IRQHandler - 0x0800486c TIM4_IRQHandler - 0x0800486c I2C1_EV_IRQHandler - 0x0800486c DMA1_Stream6_IRQHandler - 0x0800486c DMA1_Stream1_IRQHandler - 0x0800486c UART4_IRQHandler - 0x0800486c TIM3_IRQHandler - 0x0800486c RCC_IRQHandler - 0x0800486c TIM8_BRK_TIM12_IRQHandler - 0x0800486c Default_Handler - 0x0800486c EXTI15_10_IRQHandler - 0x0800486c ADC_IRQHandler - 0x0800486c DMA1_Stream7_IRQHandler - 0x0800486c SPI5_IRQHandler - 0x0800486c TIM7_IRQHandler - 0x0800486c CAN2_TX_IRQHandler - 0x0800486c TIM5_IRQHandler - 0x0800486c DMA2_Stream7_IRQHandler - 0x0800486c I2C3_EV_IRQHandler - 0x0800486c EXTI9_5_IRQHandler - 0x0800486c RTC_WKUP_IRQHandler - 0x0800486c LTDC_IRQHandler - 0x0800486c ETH_WKUP_IRQHandler - 0x0800486c SPI2_IRQHandler - 0x0800486c OTG_HS_EP1_IN_IRQHandler - 0x0800486c DMA1_Stream0_IRQHandler - 0x0800486c CAN1_TX_IRQHandler - 0x0800486c EXTI4_IRQHandler - 0x0800486c ETH_IRQHandler - 0x0800486c OTG_HS_EP1_OUT_IRQHandler - 0x0800486c WWDG_IRQHandler - 0x0800486c SPI6_IRQHandler - 0x0800486c TIM2_IRQHandler - 0x0800486c OTG_FS_WKUP_IRQHandler - 0x0800486c TIM1_TRG_COM_TIM11_IRQHandler - 0x0800486c OTG_HS_IRQHandler - 0x0800486c DMA2D_IRQHandler - 0x0800486c EXTI1_IRQHandler - 0x0800486c UART7_IRQHandler - 0x0800486c USART2_IRQHandler - 0x0800486c I2C2_ER_IRQHandler - 0x0800486c DMA2_Stream1_IRQHandler - 0x0800486c CAN1_SCE_IRQHandler - 0x0800486c FLASH_IRQHandler - 0x0800486c DMA2_Stream4_IRQHandler - 0x0800486c USART1_IRQHandler - 0x0800486c SPI3_IRQHandler - 0x0800486c DMA1_Stream4_IRQHandler - 0x0800486c I2C1_ER_IRQHandler - 0x0800486c FMC_IRQHandler - 0x0800486c DMA2_Stream6_IRQHandler - 0x0800486c SAI1_IRQHandler - 0x0800486c DMA1_Stream3_IRQHandler + 0x08004b60 0x2 build/startup_stm32f429xx.o + 0x08004b60 RTC_Alarm_IRQHandler + 0x08004b60 HASH_RNG_IRQHandler + 0x08004b60 EXTI2_IRQHandler + 0x08004b60 TIM8_CC_IRQHandler + 0x08004b60 UART8_IRQHandler + 0x08004b60 SPI4_IRQHandler + 0x08004b60 TIM1_CC_IRQHandler + 0x08004b60 DMA2_Stream5_IRQHandler + 0x08004b60 DMA1_Stream5_IRQHandler + 0x08004b60 PVD_IRQHandler + 0x08004b60 SDIO_IRQHandler + 0x08004b60 TAMP_STAMP_IRQHandler + 0x08004b60 CAN2_RX1_IRQHandler + 0x08004b60 EXTI3_IRQHandler + 0x08004b60 TIM8_TRG_COM_TIM14_IRQHandler + 0x08004b60 TIM1_UP_TIM10_IRQHandler + 0x08004b60 TIM8_UP_TIM13_IRQHandler + 0x08004b60 I2C3_ER_IRQHandler + 0x08004b60 EXTI0_IRQHandler + 0x08004b60 I2C2_EV_IRQHandler + 0x08004b60 DMA1_Stream2_IRQHandler + 0x08004b60 CAN1_RX0_IRQHandler + 0x08004b60 FPU_IRQHandler + 0x08004b60 OTG_HS_WKUP_IRQHandler + 0x08004b60 LTDC_ER_IRQHandler + 0x08004b60 CAN2_SCE_IRQHandler + 0x08004b60 DMA2_Stream2_IRQHandler + 0x08004b60 SPI1_IRQHandler + 0x08004b60 TIM6_DAC_IRQHandler + 0x08004b60 TIM1_BRK_TIM9_IRQHandler + 0x08004b60 DCMI_IRQHandler + 0x08004b60 CAN2_RX0_IRQHandler + 0x08004b60 DMA2_Stream3_IRQHandler + 0x08004b60 USART6_IRQHandler + 0x08004b60 USART3_IRQHandler + 0x08004b60 CAN1_RX1_IRQHandler + 0x08004b60 UART5_IRQHandler + 0x08004b60 TIM4_IRQHandler + 0x08004b60 I2C1_EV_IRQHandler + 0x08004b60 DMA1_Stream6_IRQHandler + 0x08004b60 DMA1_Stream1_IRQHandler + 0x08004b60 UART4_IRQHandler + 0x08004b60 TIM3_IRQHandler + 0x08004b60 RCC_IRQHandler + 0x08004b60 TIM8_BRK_TIM12_IRQHandler + 0x08004b60 Default_Handler + 0x08004b60 EXTI15_10_IRQHandler + 0x08004b60 ADC_IRQHandler + 0x08004b60 DMA1_Stream7_IRQHandler + 0x08004b60 SPI5_IRQHandler + 0x08004b60 TIM7_IRQHandler + 0x08004b60 CAN2_TX_IRQHandler + 0x08004b60 TIM5_IRQHandler + 0x08004b60 DMA2_Stream7_IRQHandler + 0x08004b60 I2C3_EV_IRQHandler + 0x08004b60 EXTI9_5_IRQHandler + 0x08004b60 RTC_WKUP_IRQHandler + 0x08004b60 LTDC_IRQHandler + 0x08004b60 ETH_WKUP_IRQHandler + 0x08004b60 SPI2_IRQHandler + 0x08004b60 OTG_HS_EP1_IN_IRQHandler + 0x08004b60 DMA1_Stream0_IRQHandler + 0x08004b60 CAN1_TX_IRQHandler + 0x08004b60 EXTI4_IRQHandler + 0x08004b60 ETH_IRQHandler + 0x08004b60 OTG_HS_EP1_OUT_IRQHandler + 0x08004b60 WWDG_IRQHandler + 0x08004b60 SPI6_IRQHandler + 0x08004b60 TIM2_IRQHandler + 0x08004b60 OTG_FS_WKUP_IRQHandler + 0x08004b60 TIM1_TRG_COM_TIM11_IRQHandler + 0x08004b60 OTG_HS_IRQHandler + 0x08004b60 DMA2D_IRQHandler + 0x08004b60 EXTI1_IRQHandler + 0x08004b60 UART7_IRQHandler + 0x08004b60 USART2_IRQHandler + 0x08004b60 I2C2_ER_IRQHandler + 0x08004b60 DMA2_Stream1_IRQHandler + 0x08004b60 CAN1_SCE_IRQHandler + 0x08004b60 FLASH_IRQHandler + 0x08004b60 DMA2_Stream4_IRQHandler + 0x08004b60 USART1_IRQHandler + 0x08004b60 SPI3_IRQHandler + 0x08004b60 DMA1_Stream4_IRQHandler + 0x08004b60 I2C1_ER_IRQHandler + 0x08004b60 FMC_IRQHandler + 0x08004b60 DMA2_Stream6_IRQHandler + 0x08004b60 SAI1_IRQHandler + 0x08004b60 DMA1_Stream3_IRQHandler *(.glue_7) - .glue_7 0x0800486e 0x0 linker stubs + .glue_7 0x08004b62 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0800486e 0x0 linker stubs + .glue_7t 0x08004b62 0x0 linker stubs *(.eh_frame) - *fill* 0x0800486e 0x2 - .eh_frame 0x08004870 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + *fill* 0x08004b62 0x2 + .eh_frame 0x08004b64 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x08004870 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o - 0x08004870 _init - .init 0x08004874 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x08004b64 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + 0x08004b64 _init + .init 0x08004b68 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x0800487c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o - 0x0800487c _fini - .fini 0x08004880 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o - 0x08004888 . = ALIGN (0x4) - 0x08004888 _etext = . + .fini 0x08004b70 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + 0x08004b70 _fini + .fini 0x08004b74 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + 0x08004b7c . = ALIGN (0x4) + 0x08004b7c _etext = . -.vfp11_veneer 0x08004888 0x0 - .vfp11_veneer 0x08004888 0x0 linker stubs +.vfp11_veneer 0x08004b7c 0x0 + .vfp11_veneer 0x08004b7c 0x0 linker stubs -.v4_bx 0x08004888 0x0 - .v4_bx 0x08004888 0x0 linker stubs +.v4_bx 0x08004b7c 0x0 + .v4_bx 0x08004b7c 0x0 linker stubs -.iplt 0x08004888 0x0 - .iplt 0x08004888 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x08004b7c 0x0 + .iplt 0x08004b7c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x08004888 0x74 - 0x08004888 . = ALIGN (0x4) +.rodata 0x08004b7c 0x74 + 0x08004b7c . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.main.str1.4 - 0x08004888 0x5a build/main.o + 0x08004b7c 0x5a build/main.o 0x14 (size before relaxing) - *fill* 0x080048e2 0x2 + *fill* 0x08004bd6 0x2 .rodata.flagBitshiftOffset.0 - 0x080048e4 0x8 build/stm32f4xx_hal_dma.o + 0x08004bd8 0x8 build/stm32f4xx_hal_dma.o .rodata.AHBPrescTable - 0x080048ec 0x10 build/system_stm32f4xx.o - 0x080048ec AHBPrescTable + 0x08004be0 0x10 build/system_stm32f4xx.o + 0x08004be0 AHBPrescTable .rodata.USBD_FS_ProductStrDescriptor.str1.4 - 0x080048fc 0x16 build/usbd_desc.o + 0x08004bf0 0x16 build/usbd_desc.o .rodata.USBD_FS_ManufacturerStrDescriptor.str1.4 - 0x080048fc 0x13 build/usbd_desc.o + 0x08004bf0 0x13 build/usbd_desc.o .rodata.USBD_FS_ConfigStrDescriptor.str1.4 - 0x080048fc 0xb build/usbd_desc.o + 0x08004bf0 0xb build/usbd_desc.o .rodata.USBD_FS_InterfaceStrDescriptor.str1.4 - 0x080048fc 0xe build/usbd_desc.o - 0x08004914 . = ALIGN (0x4) + 0x08004bf0 0xe build/usbd_desc.o + 0x08004c08 . = ALIGN (0x4) -.ARM.extab 0x080048fc 0x0 - 0x080048fc . = ALIGN (0x4) +.ARM.extab 0x08004bf0 0x0 + 0x08004bf0 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x080048fc . = ALIGN (0x4) + 0x08004bf0 . = ALIGN (0x4) -.ARM 0x080048fc 0x8 - 0x080048fc . = ALIGN (0x4) - 0x080048fc __exidx_start = . +.ARM 0x08004bf0 0x8 + 0x08004bf0 . = ALIGN (0x4) + 0x08004bf0 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x080048fc 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - 0x08004904 __exidx_end = . - 0x08004904 . = ALIGN (0x4) + .ARM.exidx 0x08004bf0 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x08004bf8 __exidx_end = . + 0x08004bf8 . = ALIGN (0x4) -.preinit_array 0x08004904 0x0 - 0x08004904 . = ALIGN (0x4) - 0x08004904 PROVIDE (__preinit_array_start = .) +.preinit_array 0x08004bf8 0x0 + 0x08004bf8 . = ALIGN (0x4) + 0x08004bf8 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08004904 PROVIDE (__preinit_array_end = .) - 0x08004904 . = ALIGN (0x4) + 0x08004bf8 PROVIDE (__preinit_array_end = .) + 0x08004bf8 . = ALIGN (0x4) -.init_array 0x08004904 0x4 - 0x08004904 . = ALIGN (0x4) - 0x08004904 PROVIDE (__init_array_start = .) +.init_array 0x08004bf8 0x4 + 0x08004bf8 . = ALIGN (0x4) + 0x08004bf8 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08004904 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x08004908 PROVIDE (__init_array_end = .) - 0x08004908 . = ALIGN (0x4) + .init_array 0x08004bf8 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x08004bfc PROVIDE (__init_array_end = .) + 0x08004bfc . = ALIGN (0x4) -.fini_array 0x08004908 0x4 - 0x08004908 . = ALIGN (0x4) - 0x08004908 PROVIDE (__fini_array_start = .) +.fini_array 0x08004bfc 0x4 + 0x08004bfc . = ALIGN (0x4) + 0x08004bfc PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08004908 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x0800490c PROVIDE (__fini_array_end = .) - 0x0800490c . = ALIGN (0x4) - 0x0800490c _sidata = LOADADDR (.data) + .fini_array 0x08004bfc 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x08004c00 PROVIDE (__fini_array_end = .) + 0x08004c00 . = ALIGN (0x4) + 0x08004c00 _sidata = LOADADDR (.data) -.rel.dyn 0x0800490c 0x0 - .rel.iplt 0x0800490c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x08004c00 0x0 + .rel.iplt 0x08004c00 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o -.data 0x20000000 0xf8 load address 0x0800490c +.data 0x20000000 0xf8 load address 0x08004c00 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -2067,19 +2073,19 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o 0x200000f8 . = ALIGN (0x4) *fill* 0x200000f6 0x2 0x200000f8 _edata = . - 0x08004a04 _siccmram = LOADADDR (.ccmram) + 0x08004cf8 _siccmram = LOADADDR (.ccmram) .tm_clone_table - 0x200000f8 0x0 load address 0x08004a04 + 0x200000f8 0x0 load address 0x08004cf8 .tm_clone_table 0x200000f8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o .tm_clone_table 0x200000f8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtend.o -.igot.plt 0x200000f8 0x0 load address 0x08004a04 +.igot.plt 0x200000f8 0x0 load address 0x08004cf8 .igot.plt 0x200000f8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o -.ccmram 0x10000000 0x0 load address 0x08004a04 +.ccmram 0x10000000 0x0 load address 0x08004cf8 0x10000000 . = ALIGN (0x4) 0x10000000 _sccmram = . *(.ccmram) @@ -2088,53 +2094,56 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o 0x10000000 _eccmram = . 0x10000000 . = ALIGN (0x4) -.bss 0x200000f8 0x1cac +.bss 0x200000f8 0x1d74 0x200000f8 _sbss = . 0x200000f8 __bss_start__ = _sbss *(.bss) .bss 0x200000f8 0x1c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o *(.bss*) + .bss.ADC1_buff_circular + 0x20000114 0xc8 build/main.o + 0x20000114 ADC1_buff_circular .bss.hdma_adc1 - 0x20000114 0x60 build/main.o - 0x20000114 hdma_adc1 - .bss.hadc1 0x20000174 0x48 build/main.o - 0x20000174 hadc1 - .bss.uwTick 0x200001bc 0x4 build/stm32f4xx_hal.o - 0x200001bc uwTick + 0x200001dc 0x60 build/main.o + 0x200001dc hdma_adc1 + .bss.hadc1 0x2000023c 0x48 build/main.o + 0x2000023c hadc1 + .bss.uwTick 0x20000284 0x4 build/stm32f4xx_hal.o + 0x20000284 uwTick .bss.hUsbDeviceFS - 0x200001c0 0x2dc build/usb_device.o - 0x200001c0 hUsbDeviceFS + 0x20000288 0x2dc build/usb_device.o + 0x20000288 hUsbDeviceFS .bss.USBD_StrDesc - 0x2000049c 0x200 build/usbd_desc.o - 0x2000049c USBD_StrDesc + 0x20000564 0x200 build/usbd_desc.o + 0x20000564 USBD_StrDesc .bss.UserTxBufferFS - 0x2000069c 0x800 build/usbd_cdc_if.o - 0x2000069c UserTxBufferFS + 0x20000764 0x800 build/usbd_cdc_if.o + 0x20000764 UserTxBufferFS .bss.UserRxBufferFS - 0x20000e9c 0x800 build/usbd_cdc_if.o - 0x20000e9c UserRxBufferFS - .bss.mem.0 0x2000169c 0x220 build/usbd_conf.o + 0x20000f64 0x800 build/usbd_cdc_if.o + 0x20000f64 UserRxBufferFS + .bss.mem.0 0x20001764 0x220 build/usbd_conf.o .bss.hpcd_USB_OTG_FS - 0x200018bc 0x4e4 build/usbd_conf.o - 0x200018bc hpcd_USB_OTG_FS - .bss.cfgidx.0 0x20001da0 0x1 build/usbd_ctlreq.o + 0x20001984 0x4e4 build/usbd_conf.o + 0x20001984 hpcd_USB_OTG_FS + .bss.cfgidx.0 0x20001e68 0x1 build/usbd_ctlreq.o *(COMMON) - 0x20001da4 . = ALIGN (0x4) - *fill* 0x20001da1 0x3 - 0x20001da4 _ebss = . - 0x20001da4 __bss_end__ = _ebss + 0x20001e6c . = ALIGN (0x4) + *fill* 0x20001e69 0x3 + 0x20001e6c _ebss = . + 0x20001e6c __bss_end__ = _ebss ._user_heap_stack - 0x20001da4 0x604 - 0x20001da8 . = ALIGN (0x8) - *fill* 0x20001da4 0x4 - 0x20001da8 PROVIDE (end = .) + 0x20001e6c 0x604 + 0x20001e70 . = ALIGN (0x8) + *fill* 0x20001e6c 0x4 + 0x20001e70 PROVIDE (end = .) [!provide] PROVIDE (_end = .) - 0x20001fa8 . = (. + _Min_Heap_Size) - *fill* 0x20001da8 0x200 - 0x200023a8 . = (. + _Min_Stack_Size) - *fill* 0x20001fa8 0x400 - 0x200023a8 . = ALIGN (0x8) + 0x20002070 . = (. + _Min_Heap_Size) + *fill* 0x20001e70 0x200 + 0x20002470 . = (. + _Min_Stack_Size) + *fill* 0x20002070 0x400 + 0x20002470 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -2240,34 +2249,34 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtend.o -.debug_info 0x00000000 0x15eb1 - .debug_info 0x00000000 0x1399 build/main.o - .debug_info 0x00001399 0xdca build/stm32f4xx_it.o - .debug_info 0x00002163 0xbb8 build/stm32f4xx_hal_msp.o - .debug_info 0x00002d1b 0xc12 build/stm32f4xx_hal_rcc.o - .debug_info 0x0000392d 0x846 build/stm32f4xx_hal_gpio.o - .debug_info 0x00004173 0xbb6 build/stm32f4xx_hal_dma.o - .debug_info 0x00004d29 0x11f2 build/stm32f4xx_hal_cortex.o - .debug_info 0x00005f1b 0xb74 build/stm32f4xx_hal.o - .debug_info 0x00006a8f 0x5bd build/system_stm32f4xx.o - .debug_info 0x0000704c 0x874 build/usb_device.o - .debug_info 0x000078c0 0x644 build/usbd_desc.o - .debug_info 0x00007f04 0xad2 build/usbd_cdc_if.o - .debug_info 0x000089d6 0x24f9 build/usbd_conf.o - .debug_info 0x0000aecf 0x1f13 build/stm32f4xx_hal_pcd.o - .debug_info 0x0000cde2 0x7a7 build/stm32f4xx_hal_pcd_ex.o - .debug_info 0x0000d589 0x21de build/stm32f4xx_ll_usb.o - .debug_info 0x0000f767 0x1036 build/stm32f4xx_hal_adc.o - .debug_info 0x0001079d 0x1440 build/usbd_core.o - .debug_info 0x00011bdd 0x15a9 build/usbd_ctlreq.o - .debug_info 0x00013186 0xa05 build/usbd_ioreq.o - .debug_info 0x00013b8b 0x1961 build/usbd_cdc.o - .debug_info 0x000154ec 0x30 build/startup_stm32f429xx.o - .debug_info 0x0001551c 0x10b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) - .debug_info 0x00015627 0x135 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) - .debug_info 0x0001575c 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_info 0x00015780 0x6f5 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - .debug_info 0x00015e75 0x3c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) +.debug_info 0x00000000 0x15fb3 + .debug_info 0x00000000 0x1407 build/main.o + .debug_info 0x00001407 0xe5e build/stm32f4xx_it.o + .debug_info 0x00002265 0xbb8 build/stm32f4xx_hal_msp.o + .debug_info 0x00002e1d 0xc12 build/stm32f4xx_hal_rcc.o + .debug_info 0x00003a2f 0x846 build/stm32f4xx_hal_gpio.o + .debug_info 0x00004275 0xbb6 build/stm32f4xx_hal_dma.o + .debug_info 0x00004e2b 0x11f2 build/stm32f4xx_hal_cortex.o + .debug_info 0x0000601d 0xb74 build/stm32f4xx_hal.o + .debug_info 0x00006b91 0x5bd build/system_stm32f4xx.o + .debug_info 0x0000714e 0x874 build/usb_device.o + .debug_info 0x000079c2 0x644 build/usbd_desc.o + .debug_info 0x00008006 0xad2 build/usbd_cdc_if.o + .debug_info 0x00008ad8 0x24f9 build/usbd_conf.o + .debug_info 0x0000afd1 0x1f13 build/stm32f4xx_hal_pcd.o + .debug_info 0x0000cee4 0x7a7 build/stm32f4xx_hal_pcd_ex.o + .debug_info 0x0000d68b 0x21de build/stm32f4xx_ll_usb.o + .debug_info 0x0000f869 0x1036 build/stm32f4xx_hal_adc.o + .debug_info 0x0001089f 0x1440 build/usbd_core.o + .debug_info 0x00011cdf 0x15a9 build/usbd_ctlreq.o + .debug_info 0x00013288 0xa05 build/usbd_ioreq.o + .debug_info 0x00013c8d 0x1961 build/usbd_cdc.o + .debug_info 0x000155ee 0x30 build/startup_stm32f429xx.o + .debug_info 0x0001561e 0x10b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .debug_info 0x00015729 0x135 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .debug_info 0x0001585e 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_info 0x00015882 0x6f5 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .debug_info 0x00015f77 0x3c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) .debug_abbrev 0x00000000 0x3876 .debug_abbrev 0x00000000 0x2ac build/main.o @@ -2298,142 +2307,142 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a .debug_abbrev 0x000036e6 0x16a /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .debug_abbrev 0x00003850 0x26 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) -.debug_loc 0x00000000 0xd3ed +.debug_loc 0x00000000 0xd438 .debug_loc 0x00000000 0x11a build/main.o - .debug_loc 0x0000011a 0xab build/stm32f4xx_it.o - .debug_loc 0x000001c5 0x10d build/stm32f4xx_hal_msp.o - .debug_loc 0x000002d2 0x720 build/stm32f4xx_hal_rcc.o - .debug_loc 0x000009f2 0x60b build/stm32f4xx_hal_gpio.o - .debug_loc 0x00000ffd 0xe9a build/stm32f4xx_hal_dma.o - .debug_loc 0x00001e97 0x8ff build/stm32f4xx_hal_cortex.o - .debug_loc 0x00002796 0x1f9 build/stm32f4xx_hal.o - .debug_loc 0x0000298f 0xbd build/system_stm32f4xx.o - .debug_loc 0x00002a4c 0x20 build/usb_device.o - .debug_loc 0x00002a6c 0x4e7 build/usbd_desc.o - .debug_loc 0x00002f53 0x1e6 build/usbd_cdc_if.o - .debug_loc 0x00003139 0x10f3 build/usbd_conf.o - .debug_loc 0x0000422c 0x1832 build/stm32f4xx_hal_pcd.o - .debug_loc 0x00005a5e 0x13d build/stm32f4xx_hal_pcd_ex.o - .debug_loc 0x00005b9b 0x2ac8 build/stm32f4xx_ll_usb.o - .debug_loc 0x00008663 0xfe9 build/stm32f4xx_hal_adc.o - .debug_loc 0x0000964c 0x115e build/usbd_core.o - .debug_loc 0x0000a7aa 0x1bc1 build/usbd_ctlreq.o - .debug_loc 0x0000c36b 0x3f8 build/usbd_ioreq.o - .debug_loc 0x0000c763 0xc8a build/usbd_cdc.o + .debug_loc 0x0000011a 0xf6 build/stm32f4xx_it.o + .debug_loc 0x00000210 0x10d build/stm32f4xx_hal_msp.o + .debug_loc 0x0000031d 0x720 build/stm32f4xx_hal_rcc.o + .debug_loc 0x00000a3d 0x60b build/stm32f4xx_hal_gpio.o + .debug_loc 0x00001048 0xe9a build/stm32f4xx_hal_dma.o + .debug_loc 0x00001ee2 0x8ff build/stm32f4xx_hal_cortex.o + .debug_loc 0x000027e1 0x1f9 build/stm32f4xx_hal.o + .debug_loc 0x000029da 0xbd build/system_stm32f4xx.o + .debug_loc 0x00002a97 0x20 build/usb_device.o + .debug_loc 0x00002ab7 0x4e7 build/usbd_desc.o + .debug_loc 0x00002f9e 0x1e6 build/usbd_cdc_if.o + .debug_loc 0x00003184 0x10f3 build/usbd_conf.o + .debug_loc 0x00004277 0x1832 build/stm32f4xx_hal_pcd.o + .debug_loc 0x00005aa9 0x13d build/stm32f4xx_hal_pcd_ex.o + .debug_loc 0x00005be6 0x2ac8 build/stm32f4xx_ll_usb.o + .debug_loc 0x000086ae 0xfe9 build/stm32f4xx_hal_adc.o + .debug_loc 0x00009697 0x115e build/usbd_core.o + .debug_loc 0x0000a7f5 0x1bc1 build/usbd_ctlreq.o + .debug_loc 0x0000c3b6 0x3f8 build/usbd_ioreq.o + .debug_loc 0x0000c7ae 0xc8a build/usbd_cdc.o -.debug_aranges 0x00000000 0xd68 +.debug_aranges 0x00000000 0xd70 .debug_aranges 0x00000000 0x48 build/main.o .debug_aranges - 0x00000048 0x78 build/stm32f4xx_it.o + 0x00000048 0x80 build/stm32f4xx_it.o .debug_aranges - 0x000000c0 0x30 build/stm32f4xx_hal_msp.o + 0x000000c8 0x30 build/stm32f4xx_hal_msp.o .debug_aranges - 0x000000f0 0x88 build/stm32f4xx_hal_rcc.o + 0x000000f8 0x88 build/stm32f4xx_hal_rcc.o .debug_aranges - 0x00000178 0x58 build/stm32f4xx_hal_gpio.o + 0x00000180 0x58 build/stm32f4xx_hal_gpio.o .debug_aranges - 0x000001d0 0x90 build/stm32f4xx_hal_dma.o + 0x000001d8 0x90 build/stm32f4xx_hal_dma.o .debug_aranges - 0x00000260 0xf8 build/stm32f4xx_hal_cortex.o + 0x00000268 0xf8 build/stm32f4xx_hal_cortex.o .debug_aranges - 0x00000358 0x100 build/stm32f4xx_hal.o + 0x00000360 0x100 build/stm32f4xx_hal.o .debug_aranges - 0x00000458 0x28 build/system_stm32f4xx.o + 0x00000460 0x28 build/system_stm32f4xx.o .debug_aranges - 0x00000480 0x20 build/usb_device.o + 0x00000488 0x20 build/usb_device.o .debug_aranges - 0x000004a0 0x60 build/usbd_desc.o + 0x000004a8 0x60 build/usbd_desc.o .debug_aranges - 0x00000500 0x48 build/usbd_cdc_if.o + 0x00000508 0x48 build/usbd_cdc_if.o .debug_aranges - 0x00000548 0x110 build/usbd_conf.o + 0x00000550 0x110 build/usbd_conf.o .debug_aranges - 0x00000658 0x148 build/stm32f4xx_hal_pcd.o + 0x00000660 0x148 build/stm32f4xx_hal_pcd.o .debug_aranges - 0x000007a0 0x38 build/stm32f4xx_hal_pcd_ex.o + 0x000007a8 0x38 build/stm32f4xx_hal_pcd_ex.o .debug_aranges - 0x000007d8 0x1a0 build/stm32f4xx_ll_usb.o + 0x000007e0 0x1a0 build/stm32f4xx_ll_usb.o .debug_aranges - 0x00000978 0xe8 build/stm32f4xx_hal_adc.o + 0x00000980 0xe8 build/stm32f4xx_hal_adc.o .debug_aranges - 0x00000a60 0xd8 build/usbd_core.o + 0x00000a68 0xd8 build/usbd_core.o .debug_aranges - 0x00000b38 0x88 build/usbd_ctlreq.o + 0x00000b40 0x88 build/usbd_ctlreq.o .debug_aranges - 0x00000bc0 0x50 build/usbd_ioreq.o + 0x00000bc8 0x50 build/usbd_ioreq.o .debug_aranges - 0x00000c10 0x90 build/usbd_cdc.o + 0x00000c18 0x90 build/usbd_cdc.o .debug_aranges - 0x00000ca0 0x28 build/startup_stm32f429xx.o + 0x00000ca8 0x28 build/startup_stm32f429xx.o .debug_aranges - 0x00000cc8 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + 0x00000cd0 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) .debug_aranges - 0x00000ce8 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + 0x00000cf0 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) .debug_aranges - 0x00000d08 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + 0x00000d10 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) .debug_aranges - 0x00000d28 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x00000d30 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .debug_aranges - 0x00000d48 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) + 0x00000d50 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) -.debug_ranges 0x00000000 0xb88 +.debug_ranges 0x00000000 0xb90 .debug_ranges 0x00000000 0x38 build/main.o - .debug_ranges 0x00000038 0x68 build/stm32f4xx_it.o - .debug_ranges 0x000000a0 0x20 build/stm32f4xx_hal_msp.o - .debug_ranges 0x000000c0 0x90 build/stm32f4xx_hal_rcc.o - .debug_ranges 0x00000150 0x48 build/stm32f4xx_hal_gpio.o - .debug_ranges 0x00000198 0x80 build/stm32f4xx_hal_dma.o - .debug_ranges 0x00000218 0xe8 build/stm32f4xx_hal_cortex.o - .debug_ranges 0x00000300 0xf0 build/stm32f4xx_hal.o - .debug_ranges 0x000003f0 0x18 build/system_stm32f4xx.o - .debug_ranges 0x00000408 0x10 build/usb_device.o - .debug_ranges 0x00000418 0x50 build/usbd_desc.o - .debug_ranges 0x00000468 0x38 build/usbd_cdc_if.o - .debug_ranges 0x000004a0 0x100 build/usbd_conf.o - .debug_ranges 0x000005a0 0x138 build/stm32f4xx_hal_pcd.o - .debug_ranges 0x000006d8 0x28 build/stm32f4xx_hal_pcd_ex.o - .debug_ranges 0x00000700 0x190 build/stm32f4xx_ll_usb.o - .debug_ranges 0x00000890 0xd8 build/stm32f4xx_hal_adc.o - .debug_ranges 0x00000968 0xc8 build/usbd_core.o - .debug_ranges 0x00000a30 0x78 build/usbd_ctlreq.o - .debug_ranges 0x00000aa8 0x40 build/usbd_ioreq.o - .debug_ranges 0x00000ae8 0x80 build/usbd_cdc.o - .debug_ranges 0x00000b68 0x20 build/startup_stm32f429xx.o + .debug_ranges 0x00000038 0x70 build/stm32f4xx_it.o + .debug_ranges 0x000000a8 0x20 build/stm32f4xx_hal_msp.o + .debug_ranges 0x000000c8 0x90 build/stm32f4xx_hal_rcc.o + .debug_ranges 0x00000158 0x48 build/stm32f4xx_hal_gpio.o + .debug_ranges 0x000001a0 0x80 build/stm32f4xx_hal_dma.o + .debug_ranges 0x00000220 0xe8 build/stm32f4xx_hal_cortex.o + .debug_ranges 0x00000308 0xf0 build/stm32f4xx_hal.o + .debug_ranges 0x000003f8 0x18 build/system_stm32f4xx.o + .debug_ranges 0x00000410 0x10 build/usb_device.o + .debug_ranges 0x00000420 0x50 build/usbd_desc.o + .debug_ranges 0x00000470 0x38 build/usbd_cdc_if.o + .debug_ranges 0x000004a8 0x100 build/usbd_conf.o + .debug_ranges 0x000005a8 0x138 build/stm32f4xx_hal_pcd.o + .debug_ranges 0x000006e0 0x28 build/stm32f4xx_hal_pcd_ex.o + .debug_ranges 0x00000708 0x190 build/stm32f4xx_ll_usb.o + .debug_ranges 0x00000898 0xd8 build/stm32f4xx_hal_adc.o + .debug_ranges 0x00000970 0xc8 build/usbd_core.o + .debug_ranges 0x00000a38 0x78 build/usbd_ctlreq.o + .debug_ranges 0x00000ab0 0x40 build/usbd_ioreq.o + .debug_ranges 0x00000af0 0x80 build/usbd_cdc.o + .debug_ranges 0x00000b70 0x20 build/startup_stm32f429xx.o -.debug_line 0x00000000 0xb500 - .debug_line 0x00000000 0x445 build/main.o - .debug_line 0x00000445 0x296 build/stm32f4xx_it.o - .debug_line 0x000006db 0x283 build/stm32f4xx_hal_msp.o - .debug_line 0x0000095e 0xb39 build/stm32f4xx_hal_rcc.o - .debug_line 0x00001497 0x698 build/stm32f4xx_hal_gpio.o - .debug_line 0x00001b2f 0xdae build/stm32f4xx_hal_dma.o - .debug_line 0x000028dd 0x7a5 build/stm32f4xx_hal_cortex.o - .debug_line 0x00003082 0x51a build/stm32f4xx_hal.o - .debug_line 0x0000359c 0x1c9 build/system_stm32f4xx.o - .debug_line 0x00003765 0x194 build/usb_device.o - .debug_line 0x000038f9 0x2af build/usbd_desc.o - .debug_line 0x00003ba8 0x1e0 build/usbd_cdc_if.o - .debug_line 0x00003d88 0x795 build/usbd_conf.o - .debug_line 0x0000451d 0x13d5 build/stm32f4xx_hal_pcd.o - .debug_line 0x000058f2 0x21b build/stm32f4xx_hal_pcd_ex.o - .debug_line 0x00005b0d 0x1ee6 build/stm32f4xx_ll_usb.o - .debug_line 0x000079f3 0x101e build/stm32f4xx_hal_adc.o - .debug_line 0x00008a11 0x965 build/usbd_core.o - .debug_line 0x00009376 0xc7f build/usbd_ctlreq.o - .debug_line 0x00009ff5 0x231 build/usbd_ioreq.o - .debug_line 0x0000a226 0x987 build/usbd_cdc.o - .debug_line 0x0000abad 0x73 build/startup_stm32f429xx.o - .debug_line 0x0000ac20 0x11e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) - .debug_line 0x0000ad3e 0x1b6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) - .debug_line 0x0000aef4 0x4e /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_line 0x0000af42 0x574 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - .debug_line 0x0000b4b6 0x4a /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) +.debug_line 0x00000000 0xb51f + .debug_line 0x00000000 0x447 build/main.o + .debug_line 0x00000447 0x2b3 build/stm32f4xx_it.o + .debug_line 0x000006fa 0x283 build/stm32f4xx_hal_msp.o + .debug_line 0x0000097d 0xb39 build/stm32f4xx_hal_rcc.o + .debug_line 0x000014b6 0x698 build/stm32f4xx_hal_gpio.o + .debug_line 0x00001b4e 0xdae build/stm32f4xx_hal_dma.o + .debug_line 0x000028fc 0x7a5 build/stm32f4xx_hal_cortex.o + .debug_line 0x000030a1 0x51a build/stm32f4xx_hal.o + .debug_line 0x000035bb 0x1c9 build/system_stm32f4xx.o + .debug_line 0x00003784 0x194 build/usb_device.o + .debug_line 0x00003918 0x2af build/usbd_desc.o + .debug_line 0x00003bc7 0x1e0 build/usbd_cdc_if.o + .debug_line 0x00003da7 0x795 build/usbd_conf.o + .debug_line 0x0000453c 0x13d5 build/stm32f4xx_hal_pcd.o + .debug_line 0x00005911 0x21b build/stm32f4xx_hal_pcd_ex.o + .debug_line 0x00005b2c 0x1ee6 build/stm32f4xx_ll_usb.o + .debug_line 0x00007a12 0x101e build/stm32f4xx_hal_adc.o + .debug_line 0x00008a30 0x965 build/usbd_core.o + .debug_line 0x00009395 0xc7f build/usbd_ctlreq.o + .debug_line 0x0000a014 0x231 build/usbd_ioreq.o + .debug_line 0x0000a245 0x987 build/usbd_cdc.o + .debug_line 0x0000abcc 0x73 build/startup_stm32f429xx.o + .debug_line 0x0000ac3f 0x11e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .debug_line 0x0000ad5d 0x1b6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .debug_line 0x0000af13 0x4e /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_line 0x0000af61 0x574 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .debug_line 0x0000b4d5 0x4a /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) .debug_str 0x00000000 0x4997 .debug_str 0x00000000 0x4997 build/main.o - 0xf73 (size before relaxing) - .debug_str 0x00004997 0xa5f build/stm32f4xx_it.o + 0xf85 (size before relaxing) + .debug_str 0x00004997 0xab4 build/stm32f4xx_it.o .debug_str 0x00004997 0x7b1 build/stm32f4xx_hal_msp.o .debug_str 0x00004997 0x6e8 build/stm32f4xx_hal_rcc.o .debug_str 0x00004997 0x4cd build/stm32f4xx_hal_gpio.o @@ -2460,32 +2469,32 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a .debug_str 0x00004997 0x685 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .debug_str 0x00004997 0xc3 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) -.debug_frame 0x00000000 0x2038 +.debug_frame 0x00000000 0x2050 .debug_frame 0x00000000 0xb4 build/main.o - .debug_frame 0x000000b4 0xf0 build/stm32f4xx_it.o - .debug_frame 0x000001a4 0x64 build/stm32f4xx_hal_msp.o - .debug_frame 0x00000208 0x16c build/stm32f4xx_hal_rcc.o - .debug_frame 0x00000374 0xd8 build/stm32f4xx_hal_gpio.o - .debug_frame 0x0000044c 0x188 build/stm32f4xx_hal_dma.o - .debug_frame 0x000005d4 0x214 build/stm32f4xx_hal_cortex.o - .debug_frame 0x000007e8 0x20c build/stm32f4xx_hal.o - .debug_frame 0x000009f4 0x30 build/system_stm32f4xx.o - .debug_frame 0x00000a24 0x28 build/usb_device.o - .debug_frame 0x00000a4c 0xe0 build/usbd_desc.o - .debug_frame 0x00000b2c 0x88 build/usbd_cdc_if.o - .debug_frame 0x00000bb4 0x2e4 build/usbd_conf.o - .debug_frame 0x00000e98 0x388 build/stm32f4xx_hal_pcd.o - .debug_frame 0x00001220 0x5c build/stm32f4xx_hal_pcd_ex.o - .debug_frame 0x0000127c 0x494 build/stm32f4xx_ll_usb.o - .debug_frame 0x00001710 0x268 build/stm32f4xx_hal_adc.o - .debug_frame 0x00001978 0x240 build/usbd_core.o - .debug_frame 0x00001bb8 0x180 build/usbd_ctlreq.o - .debug_frame 0x00001d38 0xb8 build/usbd_ioreq.o - .debug_frame 0x00001df0 0x190 build/usbd_cdc.o - .debug_frame 0x00001f80 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) - .debug_frame 0x00001fac 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) - .debug_frame 0x00001fd8 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_frame 0x00002004 0x34 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .debug_frame 0x000000b4 0x108 build/stm32f4xx_it.o + .debug_frame 0x000001bc 0x64 build/stm32f4xx_hal_msp.o + .debug_frame 0x00000220 0x16c build/stm32f4xx_hal_rcc.o + .debug_frame 0x0000038c 0xd8 build/stm32f4xx_hal_gpio.o + .debug_frame 0x00000464 0x188 build/stm32f4xx_hal_dma.o + .debug_frame 0x000005ec 0x214 build/stm32f4xx_hal_cortex.o + .debug_frame 0x00000800 0x20c build/stm32f4xx_hal.o + .debug_frame 0x00000a0c 0x30 build/system_stm32f4xx.o + .debug_frame 0x00000a3c 0x28 build/usb_device.o + .debug_frame 0x00000a64 0xe0 build/usbd_desc.o + .debug_frame 0x00000b44 0x88 build/usbd_cdc_if.o + .debug_frame 0x00000bcc 0x2e4 build/usbd_conf.o + .debug_frame 0x00000eb0 0x388 build/stm32f4xx_hal_pcd.o + .debug_frame 0x00001238 0x5c build/stm32f4xx_hal_pcd_ex.o + .debug_frame 0x00001294 0x494 build/stm32f4xx_ll_usb.o + .debug_frame 0x00001728 0x268 build/stm32f4xx_hal_adc.o + .debug_frame 0x00001990 0x240 build/usbd_core.o + .debug_frame 0x00001bd0 0x180 build/usbd_ctlreq.o + .debug_frame 0x00001d50 0xb8 build/usbd_ioreq.o + .debug_frame 0x00001e08 0x190 build/usbd_cdc.o + .debug_frame 0x00001f98 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .debug_frame 0x00001fc4 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .debug_frame 0x00001ff0 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x0000201c 0x34 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .debug_loclists 0x00000000 0xc0b @@ -2589,7 +2598,7 @@ HAL_ADCEx_MultiModeStop_DMA build/stm32f4xx_hal_adc_ex.o HAL_ADC_AnalogWDGConfig build/stm32f4xx_hal_adc.o HAL_ADC_ConfigChannel build/stm32f4xx_hal_adc.o build/main.o -HAL_ADC_ConvCpltCallback build/stm32f4xx_hal_adc.o +HAL_ADC_ConvCpltCallback build/stm32f4xx_it.o build/stm32f4xx_hal_adc_ex.o HAL_ADC_ConvHalfCpltCallback build/stm32f4xx_it.o build/stm32f4xx_hal_adc_ex.o @@ -2609,6 +2618,7 @@ HAL_ADC_PollForConversion build/stm32f4xx_hal_adc.o HAL_ADC_PollForEvent build/stm32f4xx_hal_adc.o HAL_ADC_Start build/stm32f4xx_hal_adc.o HAL_ADC_Start_DMA build/stm32f4xx_hal_adc.o + build/main.o HAL_ADC_Start_IT build/stm32f4xx_hal_adc.o HAL_ADC_Stop build/stm32f4xx_hal_adc.o HAL_ADC_Stop_DMA build/stm32f4xx_hal_adc.o @@ -2696,6 +2706,7 @@ HAL_GPIO_TogglePin build/stm32f4xx_hal_gpio.o build/stm32f4xx_it.o build/main.o HAL_GPIO_WritePin build/stm32f4xx_hal_gpio.o + build/stm32f4xx_it.o build/main.o HAL_GetDEVID build/stm32f4xx_hal.o HAL_GetHalVersion build/stm32f4xx_hal.o diff --git a/build/stm32f4xx_it.lst b/build/stm32f4xx_it.lst index af0bea8..1194fbf 100644 --- a/build/stm32f4xx_it.lst +++ b/build/stm32f4xx_it.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccneQ3RA.s page 1 +ARM GAS /tmp/ccIYQZ4K.s page 1 1 .cpu cortex-m4 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f4xx_it.c **** 30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */ - ARM GAS /tmp/ccneQ3RA.s page 2 + ARM GAS /tmp/ccIYQZ4K.s page 2 31:Core/Src/stm32f4xx_it.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 77:Core/Src/stm32f4xx_it.c **** { 78:Core/Src/stm32f4xx_it.c **** } 37 .loc 1 78 3 view .LVU2 - ARM GAS /tmp/ccneQ3RA.s page 3 + ARM GAS /tmp/ccIYQZ4K.s page 3 76:Core/Src/stm32f4xx_it.c **** { @@ -178,7 +178,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 98:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault. 99:Core/Src/stm32f4xx_it.c **** */ 100:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void) - ARM GAS /tmp/ccneQ3RA.s page 4 + ARM GAS /tmp/ccIYQZ4K.s page 4 101:Core/Src/stm32f4xx_it.c **** { @@ -238,7 +238,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 106 .loc 1 124 3 view .LVU14 120:Core/Src/stm32f4xx_it.c **** { 107 .loc 1 120 9 view .LVU15 - ARM GAS /tmp/ccneQ3RA.s page 5 + ARM GAS /tmp/ccIYQZ4K.s page 5 108 0000 FEE7 b .L8 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 146:Core/Src/stm32f4xx_it.c **** { 144 .loc 1 146 1 view -0 145 .cfi_startproc - ARM GAS /tmp/ccneQ3RA.s page 6 + ARM GAS /tmp/ccIYQZ4K.s page 6 146 @ args = 0, pretend = 0, frame = 0 @@ -358,7 +358,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 169:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service. 170:Core/Src/stm32f4xx_it.c **** */ 171:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void) - ARM GAS /tmp/ccneQ3RA.s page 7 + ARM GAS /tmp/ccIYQZ4K.s page 7 172:Core/Src/stm32f4xx_it.c **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 216 .LFE247: 218 .section .text.DMA2_Stream0_IRQHandler,"ax",%progbits 219 .align 1 - ARM GAS /tmp/ccneQ3RA.s page 8 + ARM GAS /tmp/ccIYQZ4K.s page 8 220 .global DMA2_Stream0_IRQHandler @@ -478,7 +478,7 @@ ARM GAS /tmp/ccneQ3RA.s page 1 256 OTG_FS_IRQHandler: 257 .LFB249: 215:Core/Src/stm32f4xx_it.c **** - ARM GAS /tmp/ccneQ3RA.s page 9 + ARM GAS /tmp/ccIYQZ4K.s page 9 216:Core/Src/stm32f4xx_it.c **** /** @@ -515,105 +515,148 @@ ARM GAS /tmp/ccneQ3RA.s page 1 276 000c 00000000 .word hpcd_USB_OTG_FS 277 .cfi_endproc 278 .LFE249: - 280 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits + 280 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits 281 .align 1 - 282 .global HAL_ADC_ConvHalfCpltCallback + 282 .global HAL_ADC_ConvCpltCallback 283 .syntax unified 284 .thumb 285 .thumb_func - 287 HAL_ADC_ConvHalfCpltCallback: + 287 HAL_ADC_ConvCpltCallback: 288 .LVL3: 289 .LFB250: 229:Core/Src/stm32f4xx_it.c **** 230:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 1 */ - 231:Core/Src/stm32f4xx_it.c **** /* + 231:Core/Src/stm32f4xx_it.c **** 232:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) 233:Core/Src/stm32f4xx_it.c **** { - 234:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); - 235:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled - 236:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here - 237:Core/Src/stm32f4xx_it.c **** } - 238:Core/Src/stm32f4xx_it.c **** */ - 239:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) - 240:Core/Src/stm32f4xx_it.c **** { - 290 .loc 1 240 1 is_stmt 1 view -0 + 290 .loc 1 233 1 is_stmt 1 view -0 291 .cfi_startproc - ARM GAS /tmp/ccneQ3RA.s page 10 - - 292 @ args = 0, pretend = 0, frame = 0 293 @ frame_needed = 0, uses_anonymous_args = 0 - 294 .loc 1 240 1 is_stmt 0 view .LVU36 + 294 .loc 1 233 1 is_stmt 0 view .LVU36 295 0000 08B5 push {r3, lr} 296 .LCFI3: 297 .cfi_def_cfa_offset 8 298 .cfi_offset 3, -8 + ARM GAS /tmp/ccIYQZ4K.s page 10 + + 299 .cfi_offset 14, -4 - 241:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET); - 242:Core/Src/stm32f4xx_it.c **** - 243:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin); - 300 .loc 1 243 3 is_stmt 1 view .LVU37 - 301 0002 8021 movs r1, #128 - 302 0004 0148 ldr r0, .L26 - 303 .LVL4: - 304 .loc 1 243 3 is_stmt 0 view .LVU38 - 305 0006 FFF7FEFF bl HAL_GPIO_TogglePin - 306 .LVL5: - 244:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled - 245:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here - 246:Core/Src/stm32f4xx_it.c **** } - 307 .loc 1 246 1 view .LVU39 - 308 000a 08BD pop {r3, pc} - 309 .L27: - 310 .align 2 - 311 .L26: - 312 000c 00040240 .word 1073873920 - 313 .cfi_endproc - 314 .LFE250: - 316 .text - 317 .Letext0: - 318 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 319 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" - 320 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" - 321 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" - 322 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" - 323 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" - 324 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h" - 325 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h" - 326 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" - 327 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" - ARM GAS /tmp/ccneQ3RA.s page 11 + 234:Core/Src/stm32f4xx_it.c **** HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_SET); + 300 .loc 1 234 3 is_stmt 1 view .LVU37 + 301 0002 0122 movs r2, #1 + 302 0004 8021 movs r1, #128 + 303 0006 0248 ldr r0, .L26 + 304 .LVL4: + 305 .loc 1 234 3 is_stmt 0 view .LVU38 + 306 0008 FFF7FEFF bl HAL_GPIO_WritePin + 307 .LVL5: + 235:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled + 236:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here + 237:Core/Src/stm32f4xx_it.c **** } + 308 .loc 1 237 1 view .LVU39 + 309 000c 08BD pop {r3, pc} + 310 .L27: + 311 000e 00BF .align 2 + 312 .L26: + 313 0010 00040240 .word 1073873920 + 314 .cfi_endproc + 315 .LFE250: + 317 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits + 318 .align 1 + 319 .global HAL_ADC_ConvHalfCpltCallback + 320 .syntax unified + 321 .thumb + 322 .thumb_func + 324 HAL_ADC_ConvHalfCpltCallback: + 325 .LVL6: + 326 .LFB251: + 238:Core/Src/stm32f4xx_it.c **** + 239:Core/Src/stm32f4xx_it.c **** + 240:Core/Src/stm32f4xx_it.c **** + 241:Core/Src/stm32f4xx_it.c **** void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) + 242:Core/Src/stm32f4xx_it.c **** { + 327 .loc 1 242 1 is_stmt 1 view -0 + 328 .cfi_startproc + 329 @ args = 0, pretend = 0, frame = 0 + 330 @ frame_needed = 0, uses_anonymous_args = 0 + 331 .loc 1 242 1 is_stmt 0 view .LVU41 + 332 0000 08B5 push {r3, lr} + 333 .LCFI4: + 334 .cfi_def_cfa_offset 8 + 335 .cfi_offset 3, -8 + 336 .cfi_offset 14, -4 + 243:Core/Src/stm32f4xx_it.c **** //HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET); + 244:Core/Src/stm32f4xx_it.c **** + 245:Core/Src/stm32f4xx_it.c **** HAL_GPIO_TogglePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin); + 337 .loc 1 245 3 is_stmt 1 view .LVU42 + 338 0002 8021 movs r1, #128 + 339 0004 0148 ldr r0, .L30 + 340 .LVL7: + 341 .loc 1 245 3 is_stmt 0 view .LVU43 + 342 0006 FFF7FEFF bl HAL_GPIO_TogglePin + 343 .LVL8: + 246:Core/Src/stm32f4xx_it.c **** // This function is called when the first half of the ADC buffer is filled + 247:Core/Src/stm32f4xx_it.c **** // You can process the first half of ADC1_buff_circular here + ARM GAS /tmp/ccIYQZ4K.s page 11 + + + 248:Core/Src/stm32f4xx_it.c **** } + 344 .loc 1 248 1 view .LVU44 + 345 000a 08BD pop {r3, pc} + 346 .L31: + 347 .align 2 + 348 .L30: + 349 000c 00040240 .word 1073873920 + 350 .cfi_endproc + 351 .LFE251: + 353 .text + 354 .Letext0: + 355 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 356 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h" + 357 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" + 358 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" + 359 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" + 360 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" + 361 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" + 362 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h" + 363 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h" + 364 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" + ARM GAS /tmp/ccIYQZ4K.s page 12 DEFINED SYMBOLS *ABS*:00000000 stm32f4xx_it.c - /tmp/ccneQ3RA.s:21 .text.NMI_Handler:00000000 $t - /tmp/ccneQ3RA.s:27 .text.NMI_Handler:00000000 NMI_Handler - /tmp/ccneQ3RA.s:44 .text.HardFault_Handler:00000000 $t - /tmp/ccneQ3RA.s:50 .text.HardFault_Handler:00000000 HardFault_Handler - /tmp/ccneQ3RA.s:67 .text.MemManage_Handler:00000000 $t - /tmp/ccneQ3RA.s:73 .text.MemManage_Handler:00000000 MemManage_Handler - /tmp/ccneQ3RA.s:90 .text.BusFault_Handler:00000000 $t - /tmp/ccneQ3RA.s:96 .text.BusFault_Handler:00000000 BusFault_Handler - /tmp/ccneQ3RA.s:113 .text.UsageFault_Handler:00000000 $t - /tmp/ccneQ3RA.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler - /tmp/ccneQ3RA.s:136 .text.SVC_Handler:00000000 $t - /tmp/ccneQ3RA.s:142 .text.SVC_Handler:00000000 SVC_Handler - /tmp/ccneQ3RA.s:155 .text.DebugMon_Handler:00000000 $t - /tmp/ccneQ3RA.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler - /tmp/ccneQ3RA.s:174 .text.PendSV_Handler:00000000 $t - /tmp/ccneQ3RA.s:180 .text.PendSV_Handler:00000000 PendSV_Handler - /tmp/ccneQ3RA.s:193 .text.SysTick_Handler:00000000 $t - /tmp/ccneQ3RA.s:199 .text.SysTick_Handler:00000000 SysTick_Handler - /tmp/ccneQ3RA.s:219 .text.DMA2_Stream0_IRQHandler:00000000 $t - /tmp/ccneQ3RA.s:225 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler - /tmp/ccneQ3RA.s:245 .text.DMA2_Stream0_IRQHandler:0000000c $d - /tmp/ccneQ3RA.s:250 .text.OTG_FS_IRQHandler:00000000 $t - /tmp/ccneQ3RA.s:256 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler - /tmp/ccneQ3RA.s:276 .text.OTG_FS_IRQHandler:0000000c $d - /tmp/ccneQ3RA.s:281 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t - /tmp/ccneQ3RA.s:287 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback - /tmp/ccneQ3RA.s:312 .text.HAL_ADC_ConvHalfCpltCallback:0000000c $d + /tmp/ccIYQZ4K.s:21 .text.NMI_Handler:00000000 $t + /tmp/ccIYQZ4K.s:27 .text.NMI_Handler:00000000 NMI_Handler + /tmp/ccIYQZ4K.s:44 .text.HardFault_Handler:00000000 $t + /tmp/ccIYQZ4K.s:50 .text.HardFault_Handler:00000000 HardFault_Handler + /tmp/ccIYQZ4K.s:67 .text.MemManage_Handler:00000000 $t + /tmp/ccIYQZ4K.s:73 .text.MemManage_Handler:00000000 MemManage_Handler + /tmp/ccIYQZ4K.s:90 .text.BusFault_Handler:00000000 $t + /tmp/ccIYQZ4K.s:96 .text.BusFault_Handler:00000000 BusFault_Handler + /tmp/ccIYQZ4K.s:113 .text.UsageFault_Handler:00000000 $t + /tmp/ccIYQZ4K.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler + /tmp/ccIYQZ4K.s:136 .text.SVC_Handler:00000000 $t + /tmp/ccIYQZ4K.s:142 .text.SVC_Handler:00000000 SVC_Handler + /tmp/ccIYQZ4K.s:155 .text.DebugMon_Handler:00000000 $t + /tmp/ccIYQZ4K.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler + /tmp/ccIYQZ4K.s:174 .text.PendSV_Handler:00000000 $t + /tmp/ccIYQZ4K.s:180 .text.PendSV_Handler:00000000 PendSV_Handler + /tmp/ccIYQZ4K.s:193 .text.SysTick_Handler:00000000 $t + /tmp/ccIYQZ4K.s:199 .text.SysTick_Handler:00000000 SysTick_Handler + /tmp/ccIYQZ4K.s:219 .text.DMA2_Stream0_IRQHandler:00000000 $t + /tmp/ccIYQZ4K.s:225 .text.DMA2_Stream0_IRQHandler:00000000 DMA2_Stream0_IRQHandler + /tmp/ccIYQZ4K.s:245 .text.DMA2_Stream0_IRQHandler:0000000c $d + /tmp/ccIYQZ4K.s:250 .text.OTG_FS_IRQHandler:00000000 $t + /tmp/ccIYQZ4K.s:256 .text.OTG_FS_IRQHandler:00000000 OTG_FS_IRQHandler + /tmp/ccIYQZ4K.s:276 .text.OTG_FS_IRQHandler:0000000c $d + /tmp/ccIYQZ4K.s:281 .text.HAL_ADC_ConvCpltCallback:00000000 $t + /tmp/ccIYQZ4K.s:287 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback + /tmp/ccIYQZ4K.s:313 .text.HAL_ADC_ConvCpltCallback:00000010 $d + /tmp/ccIYQZ4K.s:318 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t + /tmp/ccIYQZ4K.s:324 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback + /tmp/ccIYQZ4K.s:349 .text.HAL_ADC_ConvHalfCpltCallback:0000000c $d UNDEFINED SYMBOLS HAL_IncTick @@ -621,4 +664,5 @@ HAL_DMA_IRQHandler hdma_adc1 HAL_PCD_IRQHandler hpcd_USB_OTG_FS +HAL_GPIO_WritePin HAL_GPIO_TogglePin diff --git a/build/stm32f4xx_it.o b/build/stm32f4xx_it.o index 01eeb5b..4708698 100644 Binary files a/build/stm32f4xx_it.o and b/build/stm32f4xx_it.o differ